* [PATCH 0/8] linux: various cleanups and updates to kernel recipes
@ 2013-09-28 22:53 Denys Dmytriyenko
2013-09-28 22:53 ` [PATCH 1/8] linux-omap-2.6.39: remove old beagleboard-specific and not supported kernel Denys Dmytriyenko
` (7 more replies)
0 siblings, 8 replies; 13+ messages in thread
From: Denys Dmytriyenko @ 2013-09-28 22:53 UTC (permalink / raw)
To: meta-ti
From: Denys Dmytriyenko <denys@ti.com>
This series cleans up some old recipes that are no longer used and maintained.
As well as updates them to the latest versions and fixes the MACHINE_KERNEL_PR
dependency.
Denys Dmytriyenko (8):
linux-omap-2.6.39: remove old beagleboard-specific and not supported
kernel
linux-3.0: remove old beagleboard-specific 3.0 and 3.1rc kernel
recipes
linux-omap4-3.1.0: remove old pandaboard-specific kernel
linux-davinci 2.6.32: remove old hawkboard-specific kernel
linux-omap-psp-2.6.32: remove old linux-omap3 PSP kernel
linux-keystone: update from 3.6.6 to 3.8.4
linux-ti-staging: update to 3.12-rc2 with rpmsg, connectivity, audio
and display merged
linux: set PR from MACHINE_KERNEL_PR, bypass machine_kernel_pr.bbclass
from meta-oe
...OMAP3-beagle-add-support-for-expansionboa.patch | 340 -
...0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch | 26 -
.../0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 -
.../linux/linux-3.0+3.1rc/beagleboard/defconfig | 3517 -
.../linux/linux-3.0+3.1rc/fixes/vout.patch | 79 -
...01-Enabling-Hwmon-driver-for-twl4030-madc.patch | 46 -
.../madc/0002-mfd-twl-core-enable-madc-clock.patch | 54 -
recipes-kernel/linux/linux-3.0+3.1rc/patch.sh | 27 -
...001-ARM-L2-Add-and-export-outer_clean_all.patch | 67 -
...e-add-support-for-beagleboard-xM-revision.patch | 196 -
...OMAP3-beagle-add-support-for-expansionboa.patch | 340 -
...0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch | 26 -
.../0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 -
...5-omap3-Add-basic-support-for-720MHz-part.patch | 202 -
...eagleboard-make-wilink-init-look-more-lik.patch | 32 -
...Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch | 33 -
...add-cpu-id-register-to-MAC-address-helper.patch | 89 -
...BeagleBoard-Fix-up-random-or-missing-MAC-.patch | 156 -
...eagleboard-fix-mmc-write-protect-pin-when.patch | 26 -
...d-reinstate-usage-of-hi-speed-PLL-divider.patch | 29 -
.../linux/linux-3.0/beagleboard/defconfig | 3604 -
...3630-PRM-add-ABB-PRM-register-definitions.patch | 93 -
...P3-PM-VP-generalize-PRM-interrupt-helpers.patch | 263 -
...P3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch | 202 -
...P3-ABB-Adaptive-Body-Bias-structures-data.patch | 240 -
...-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch | 194 -
...3-Voltage-add-ABB-data-to-voltage-domains.patch | 83 -
...3-ABB-initialization-transition-functions.patch | 274 -
...-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch | 114 -
...01-Enabling-Hwmon-driver-for-twl4030-madc.patch | 46 -
.../madc/0002-mfd-twl-core-enable-madc-clock.patch | 54 -
...Undef-before-redefining-__attribute_const.patch | 31 -
...llow-OPP-enumeration-to-continue-if-devic.patch | 43 -
...nking-error-in-twl-common.c-for-OMAP2-3-4.patch | 129 -
recipes-kernel/linux/linux-3.0/patch.sh | 29 -
...-introduce-function-to-free-cpufreq-table.patch | 84 -
...q-ensure-driver-initializes-after-cpufreq.patch | 28 -
...PUfreq-ensure-policy-is-fully-initialized.patch | 32 -
.../0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch | 264 -
...AP-PM-CPUFREQ-Fix-conditional-compilation.patch | 33 -
...-cpufreq-fixup-after-new-OPP-layer-merged.patch | 34 -
...q-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch | 673 -
...cpufreq-Add-SMP-support-to-cater-OMAP4430.patch | 171 -
...pufreq-Fix-typo-when-attempting-to-set-mp.patch | 30 -
...P2-cpufreq-move-clk-name-decision-to-init.patch | 64 -
...-cpufreq-deny-initialization-if-no-mpudev.patch | 64 -
...012-OMAP2-cpufreq-dont-support-freq_table.patch | 129 -
...3-OMAP2-cpufreq-only-supports-OPP-library.patch | 46 -
...-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch | 61 -
.../0015-OMAP2-cpufreq-fix-freq_table-leak.patch | 90 -
...eq-Remove-superfluous-check-in-target-for.patch | 58 -
...ufreq-notify-even-with-bad-boot-frequency.patch | 48 -
...req-Enable-all-CPUs-in-shared-policy-mask.patch | 42 -
...eq-update-lpj-with-reference-value-to-avo.patch | 121 -
...egulator-supply-definitions-in-mach-omap2.patch | 1083 -
...style-supply.dev-assignments-common-in-hs.patch | 160 -
...parate-init_irq-functions-to-avoid-cpu_is.patch | 802 -
...parate-timer-init-functions-to-avoid-cpu_.patch | 689 -
...05-omap-Move-dmtimer-defines-to-dmtimer.h.patch | 287 -
...-subset-of-dmtimer-functions-into-inline-.patch | 323 -
...7-omap2-Use-dmtimer-macros-for-clockevent.patch | 279 -
.../0008-omap2-Remove-gptimer_wakeup-for-now.patch | 177 -
...OMAP3-SR-make-notify-independent-of-class.patch | 47 -
...010-OMAP3-SR-disable-interrupt-by-default.patch | 36 -
...1-OMAP3-SR-enable-disable-SR-only-on-need.patch | 40 -
.../0012-OMAP3-SR-fix-cosmetic-indentation.patch | 48 -
...ve-clocksource-and-timesource-and-initial.patch | 125 -
...-omap2-Use-dmtimer-macros-for-clocksource.patch | 163 -
...p2-Remove-omap2_gp_clockevent_set_gptimer.patch | 240 -
...e-timer-gp.c-into-timer.c-to-combine-time.patch | 737 -
.../0017-omap-cleanup-NAND-platform-data.patch | 165 -
...omap-board-omap3evm-Fix-compilation-error.patch | 40 -
.../0019-omap-mcbsp-Drop-SPI-mode-support.patch | 311 -
...map-mcbsp-Drop-in-driver-transfer-support.patch | 548 -
.../voltdm/0021-omap2-fix-build-regression.patch | 29 -
...w-twl-common-for-common-TWL-configuration.patch | 200 -
...common-twl6030-configuration-to-twl-commo.patch | 601 -
...ve-common-twl-configuration-to-twl-common.patch | 827 -
...common-regulator-configuration-to-twl-com.patch | 924 -
...mcbsp-Remove-rx_-tx_word_length-variables.patch | 45 -
.../0027-omap-mcbsp-Remove-port-number-enums.patch | 68 -
.../0028-OMAP-dmtimer-add-missing-include.patch | 31 -
...P2-hwmod-Fix-smart-standby-wakeup-support.patch | 130 -
...4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch | 61 -
...-Enable-module-in-shutdown-to-access-sysc.patch | 37 -
...-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch | 65 -
...wmod-Remove-_populate_mpu_rt_base-warning.patch | 33 -
...4-OMAP2-hwmod-Fix-the-HW-reset-management.patch | 87 -
...-OMAP-hwmod-Add-warnings-if-enable-failed.patch | 30 -
...-Move-pr_debug-to-improve-the-readability.patch | 95 -
...use-a-null-structure-record-to-terminate-.patch | 3529 -
...share-identical-omap_hwmod_addr_space-arr.patch | 1958 -
...use-a-terminator-record-with-omap_hwmod_m.patch | 2904 -
...share-identical-omap_hwmod_mpu_irqs-array.patch | 1815 -
...use-a-terminator-record-with-omap_hwmod_d.patch | 1382 -
...share-identical-omap_hwmod_dma_info-array.patch | 935 -
...share-identical-omap_hwmod_class-omap_hwm.patch | 1730 -
...-data-Fix-L3-interconnect-data-order-and-.patch | 116 -
...-OMAP4-hwmod-data-Remove-un-needed-parens.patch | 42 -
.../0046-OMAP4-hwmod-data-Fix-bad-alignement.patch | 218 -
...-data-Align-interconnect-format-with-regu.patch | 154 -
...48-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch | 31 -
...-data-Remove-usb_host_fs-clkdev-with-NULL.patch | 48 -
...-data-Re-order-some-clock-nodes-and-struc.patch | 229 -
...ck-data-Fix-max-mult-and-div-for-USB-DPLL.patch | 143 -
...OMAP4-prcm-Fix-errors-in-few-defines-name.patch | 256 -
...MAP4-prm-Remove-wrong-clockdomain-offsets.patch | 50 -
...54-OMAP4-powerdomain-data-Fix-indentation.patch | 109 -
...move-RESTORE-macros-to-avoid-access-from-.patch | 1523 -
...6-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch | 111 -
...domain-data-Fix-data-order-and-wrong-name.patch | 294 -
...evice-replace-_find_by_pdev-with-to_omap_.patch | 84 -
...OMAP-PM-remove-OMAP_PM_NONE-config-option.patch | 63 -
...-data-Remove-McASP2-McASP3-and-MMC6-clock.patch | 178 -
...MAP4-clock-data-Remove-UNIPRO-clock-nodes.patch | 99 -
...62-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch | 153 -
...itialise-sleep_switch-to-a-non-valid-valu.patch | 39 -
...domain-data-Fix-core-mem-states-and-missi.patch | 68 -
...-data-Keep-GPMC-clocks-always-enabled-and.patch | 45 -
...domain-data-Remove-unsupported-MPU-powerd.patch | 44 -
...AP4-hwmod-data-Change-DSS-main_clk-scheme.patch | 163 -
...et-hwmod-flags-to-only-allow-16-bit-acces.patch | 133 -
...ncrease-omap_i2c_dev_attr-flags-from-u8-t.patch | 46 -
...AP2-Introduce-I2C-IP-versioning-constants.patch | 61 -
...MAP2-create-omap-I2C-functionality-flags-.patch | 51 -
...ag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch | 77 -
...dd-correct-functionality-flags-to-all-oma.patch | 146 -
...d-fix-the-i2c-reset-timeout-during-bootup.patch | 286 -
...evice-Create-clkdev-entry-for-hwmod-main_.patch | 437 -
...-data-Add-missing-divider-selection-for-a.patch | 292 -
...AP4-hwmod-data-Add-clock-domain-attribute.patch | 724 -
...OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch | 86 -
...-Replace-CLKCTRL-absolute-address-with-of.patch | 976 -
...hwmod-Wait-the-idle-status-to-be-disabled.patch | 153 -
...-Replace-RSTCTRL-absolute-address-with-of.patch | 459 -
...eplace-warm-reset-API-with-the-offset-bas.patch | 125 -
...083-OMAP4-prm-Remove-deprecated-functions.patch | 81 -
...wmod-data-Add-PRM-context-register-offset.patch | 630 -
...-data-Add-modulemode-entry-in-omap_hwmod-.patch | 503 -
...m-Add-two-new-APIs-for-modulemode-control.patch | 88 -
...-Introduce-the-module-control-in-hwmod-co.patch | 129 -
...omain-Remove-redundant-call-to-pwrdm_wait.patch | 30 -
...domain-Add-2-APIs-to-control-clockdomain-.patch | 231 -
...0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch | 141 -
...P2-PM-idle-clkdms-only-if-already-in-idle.patch | 53 -
...domain-Add-per-clkdm-lock-to-prevent-conc.patch | 264 -
...-allow-per-SoC-clock-init-code-to-prevent.patch | 123 -
...-Follow-the-recommended-PRCM-module-enabl.patch | 173 -
...bugfs-node-to-show-the-summary-of-all-clo.patch | 84 -
...hwmod-remove-unused-voltagedomain-pointer.patch | 30 -
...ge-move-PRCM-mod-offets-into-VC-VP-struct.patch | 577 -
...ge-move-prm_irqst_reg-from-VP-into-voltag.patch | 203 -
...ge-start-towards-a-new-voltagedomain-laye.patch | 986 -
...ltage-rename-mpu-voltagedomain-to-mpu_iva.patch | 82 -
...MAP3-voltagedomain-data-add-wakeup-domain.patch | 37 -
...oltage-add-scalable-flag-to-voltagedomain.patch | 93 -
...domain-add-voltagedomain-to-struct-powerd.patch | 51 -
...oltage-domains-and-connect-to-powerdomain.patch | 138 -
...MAP3-powerdomain-data-add-voltage-domains.patch | 161 -
...MAP4-powerdomain-data-add-voltage-domains.patch | 177 -
...domain-add-voltage-domain-lookup-during-r.patch | 89 -
...ge-keep-track-of-powerdomains-in-each-vol.patch | 200 -
...ge-split-voltage-controller-VC-code-into-.patch | 666 -
...ge-move-VC-into-struct-voltagedomain-misc.patch | 544 -
...ge-enable-VC-bypass-scale-method-when-VC-.patch | 37 -
...ge-split-out-voltage-processor-VP-code-in.patch | 874 -
...pport-PMICs-with-separate-voltage-and-com.patch | 109 -
...RM-VP-functions-for-checking-clearing-VP-.patch | 375 -
...place-transaction-done-check-clear-with-V.patch | 142 -
...M-add-register-access-functions-for-VC-VP.patch | 119 -
...ge-convert-to-PRM-register-access-functio.patch | 627 -
...C-cleanup-i2c-slave-address-configuration.patch | 145 -
...eanup-PMIC-register-address-configuration.patch | 185 -
...pass-use-fields-from-VC-struct-instead-of.patch | 42 -
...-cleanup-voltage-setup-time-configuration.patch | 227 -
...ve-on-onlp-ret-off-command-configuration-.patch | 83 -
...AP3-VC-abstract-out-channel-configuration.patch | 267 -
...ge-domain-move-PMIC-struct-from-vdd_info-.patch | 394 -
...ke-I2C-config-programmable-with-PMIC-spec.patch | 221 -
...-handle-mutant-channel-config-for-OMAP4-M.patch | 168 -
...e-last-nominal-voltage-setting-to-get-cur.patch | 31 -
...eanup-move-VP-instance-into-voltdm-misc.-.patch | 643 -
...voltage-remove-unneeded-debugfs-interface.patch | 317 -
...ruct-omap_vp_common-replace-shift-with-__.patch | 214 -
...ve-SoC-specific-sys-clock-rate-retreival-.patch | 184 -
...ve-timing-calculation-config-into-VP-init.patch | 94 -
...eate-VP-helper-function-for-updating-erro.patch | 107 -
...0134-OMAP3-VP-remove-omap_vp_runtime_data.patch | 170 -
...ve-voltage-scale-function-pointer-into-st.patch | 134 -
...6-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch | 81 -
...P3-VP-update_errorgain-return-error-if-VP.patch | 29 -
...P3-VP-remove-unused-omap_vp_get_curr_volt.patch | 70 -
...mbine-setting-init-voltage-into-common-fu.patch | 141 -
...ge-rename-scale-and-reset-functions-using.patch | 141 -
...ge-move-rename-curr_volt-from-vdd_info-in.patch | 106 -
...AP3-voltdm-final-removal-of-omap_vdd_info.patch | 282 -
...ge-rename-omap_voltage_get_nom_volt-voltd.patch | 91 -
...ge-update-nominal-voltage-in-voltdm_scale.patch | 49 -
...PM-TWL6030-fix-voltage-conversion-formula.patch | 85 -
...AP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch | 37 -
...7-OMAP4-PM-TWL6030-address-0V-conversions.patch | 38 -
...-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch | 71 -
.../0149-OMAP4-PM-TWL6030-add-cmd-register.patch | 56 -
...isplay-single-block-read-console-messages.patch | 28 -
...-omap_device-activate-dectivate-latency-m.patch | 49 -
...dd-bootarg-for-selecting-svideo-or-compos.patch | 75 -
...iminate-noisey-uncorrectable-error-messag.patch | 28 -
.../sakoman/0005-video-add-timings-for-hd720.patch | 27 -
...-smsc911x-return-ENODEV-if-device-is-not-.patch | 29 -
...ut-touchscreen-ads7846-return-ENODEV-if-d.patch | 45 -
...08-Revert-omap2_mcspi-Flush-posted-writes.patch | 27 -
...-threaded-IRQ-remove-IRQ-enable-in-interr.patch | 57 -
...0-rtc-twl-Fix-registration-vs.-init-order.patch | 122 -
...Enable-audio-capture-by-default-for-twl40.patch | 27 -
...odecs-twl4030-Turn-on-mic-bias-by-default.patch | 25 -
...l4030-move-clock-input-selection-prior-to.patch | 39 -
...l-add-support-for-backup-battery-recharge.patch | 57 -
...001-ARM-L2-Add-and-export-outer_clean_all.patch | 67 -
...ix-build-break-caused-by-update_mode-remo.patch | 44 -
...-beagleboard-add-bbtoys-ulcd-lite-support.patch | 235 -
...eagleboard-add-support-for-loopthrough-ex.patch | 61 -
...add-initial-support-for-WS2801-controller.patch | 242 -
.../usb/0001-Fix-sprz319-erratum-2.1.patch | 210 -
recipes-kernel/linux/linux-am335x-psp_3.2.bb | 1 +
...001-ARM-6329-1-wire-up-sys_accept4-on-ARM.patch | 51 -
...i-Fix-currently-harmless-typo-in-SATA-PHY.patch | 26 -
...create-sys-fs-cgroup-to-mount-cgroupfs-on.patch | 58 -
...ci-ti-Update-SATA-PHY-configuration-RXCDR.patch | 29 -
...001-board-da850-hawk-Disable-NAND-SUBPAGE.patch | 27 -
.../linux/linux-davinci/hawkboard/configs/stock | 2630 -
.../linux/linux-davinci/hawkboard/defconfig | 2659 -
.../linux-davinci/hawkboard/logo_linux_clut224.ppm | 51363 -----------
.../patch-2.6.33rc4-psp-to-hawkboard.patch | 2775 -
...0001-board-da850-evm-Disable-NAND-SUBPAGE.patch | 29 -
.../0001-uio_pruss1-Core-driver-addition.patch | 334 -
.../0002-uio_pruss2-Platform-changes.patch | 243 -
...uio_pruss3-Workarounds-put-into-core-code.patch | 45 -
.../omapl138/configs/da850_omapl138_defconfig | 1876 -
.../configs/da850_omapl138_defconfig_mmcpm_stats | 1917 -
.../configs/da850_omapl138_defconfig_nandnommc | 1886 -
.../configs/da850_omapl138_defconfig_uivideocap | 1874 -
.../configs/da850_omapl138_defconfig_uivideocapdis | 1874 -
.../linux/linux-davinci/omapl138/defconfig | 1951 -
.../linux-davinci/omapl138/logo_linux_clut224.ppm | 21763 -----
.../linux/linux-davinci/update-mach-types.patch | 160 -
recipes-kernel/linux/linux-davinci_git.bb | 56 -
.../linux/linux-keystone-3.6.6/defconfig | 188 -
.../linux/linux-keystone-3.8.4/defconfig | 1 +
recipes-kernel/linux/linux-keystone_3.6.6.bb | 16 -
recipes-kernel/linux/linux-keystone_3.8.4.bb | 28 +
recipes-kernel/linux/linux-mainline_3.2.bb | 1 +
...e-add-support-for-beagleboard-xM-revision.patch | 117 -
...P3-beagle-add-support-for-expansionboards.patch | 359 -
.../0003-OMAP3-beagle-add-MADC-support.patch | 36 -
...eagle-add-regulators-for-camera-interface.patch | 88 -
.../0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 -
.../beagle/0006-OMAP3-BEAGLE-fix-RTC.patch | 27 -
...mc-Adjust-dto-to-eliminate-timeout-errors.patch | 33 -
...ap3-beagle-Use-GPTIMERi-1-for-clockevents.patch | 42 -
.../linux-omap-2.6.39/beagleboard/configs/stock | 3490 -
.../linux/linux-omap-2.6.39/beagleboard/defconfig | 3517 -
...d-driver-for-Aptina-Micron-mt9p031-sensor.patch | 859 -
.../0002-v4l-Add-mt9v032-sensor-driver.patch | 853 -
...-for-mt9p031-LI-5M03-module-in-Beagleboar.patch | 162 -
...ap-usbhs-crash-when-rmmoding-ehci-or-ohci.patch | 67 -
...-omap_usbhs_alloc_children-error-handling.patch | 50 -
...003-mfd-Add-omap-usbhs-runtime-PM-support.patch | 245 -
...b-ehci-and-ohci-hwmod-structures-for-omap.patch | 406 -
...005-arm-omap-usb-register-hwmods-of-usbhs.patch | 160 -
...b-device-name-change-for-the-clk-names-of.patch | 123 -
...Suspend-and-resume-support-of-ehci-and-oh.patch | 165 -
...-Correct-the-warning-print-during-script-.patch | 36 -
...-Modifying-the-macro-name-Main_Ref-to-all.patch | 61 -
...FD-TWL4030-power-scripts-for-OMAP3-boards.patch | 705 -
.../0011-MFD-TWL4030-TWL-version-checking.patch | 164 -
...TWL4030-workaround-changes-for-Erratum-27.patch | 341 -
...TWL4030-optimizing-resource-configuration.patch | 184 -
...-Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch | 121 -
...-NFS-Revert-NFSROOT-default-mount-options.patch | 13 -
.../0001-OMAP2-cpufreq-free-up-table-on-exit.patch | 38 -
...MAP2-cpufreq-handle-invalid-cpufreq-table.patch | 44 -
.../0003-OMAP2-cpufreq-minor-comment-cleanup.patch | 33 -
...eq-use-clk_init_cpufreq_table-if-OPPs-not.patch | 48 -
...pufreq-use-cpufreq_frequency_table_target.patch | 78 -
.../0006-OMAP2-cpufreq-fix-freq_table-leak.patch | 100 -
...q-helpers-for-walking-the-frequency-table.patch | 134 -
.../0002-cpufreq-introduce-hotplug-governor.patch | 879 -
...q-ensure-driver-initializes-after-cpufreq.patch | 27 -
...PUfreq-ensure-policy-is-fully-initialized.patch | 31 -
.../0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch | 263 -
...AP-PM-CPUFREQ-Fix-conditional-compilation.patch | 32 -
...-cpufreq-fixup-after-new-OPP-layer-merged.patch | 33 -
...q-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch | 669 -
...cpufreq-Add-SMP-support-to-cater-OMAP4430.patch | 170 -
...pufreq-Fix-typo-when-attempting-to-set-mp.patch | 29 -
...-clockdomain-Add-an-api-to-read-idle-mode.patch | 77 -
...kdomain-Add-SoC-support-for-clkdm_is_idle.patch | 86 -
...itialise-sleep_switch-to-a-non-valid-valu.patch | 35 -
...P2-PM-idle-clkdms-only-if-already-in-idle.patch | 50 -
...hwmod-Follow-the-recomended-PRCM-sequence.patch | 46 -
...6-OMAP-Serial-Check-wk_st-only-if-present.patch | 33 -
...age-remove-spurious-pr_notice-for-debugfs.patch | 30 -
...OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch | 41 -
...reflex-fix-sr_late_init-error-path-in-pro.patch | 30 -
...AP3-smartreflex-request-the-memory-region.patch | 36 -
...artreflex-fix-ioremap-leak-on-probe-error.patch | 66 -
...reflex-delete-instance-from-sr_list-on-pr.patch | 29 -
...reflex-delete-debugfs-entries-on-probe-er.patch | 48 -
...uidle-remove-useless-SDP-specific-timings.patch | 57 -
...OMAP3-SR-make-notify-independent-of-class.patch | 48 -
...010-OMAP3-SR-disable-interrupt-by-default.patch | 37 -
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--
1.8.3.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH 1/8] linux-omap-2.6.39: remove old beagleboard-specific and not supported kernel 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko @ 2013-09-28 22:53 ` Denys Dmytriyenko 2013-09-30 14:31 ` Cooper Jr., Franklin 2013-09-28 22:53 ` [PATCH 2/8] linux-3.0: remove old beagleboard-specific 3.0 and 3.1rc kernel recipes Denys Dmytriyenko ` (6 subsequent siblings) 7 siblings, 1 reply; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-28 22:53 UTC (permalink / raw) To: meta-ti From: Denys Dmytriyenko <denys@ti.com> Beagleboard is supported by newer 3.x kernel recipes. Signed-off-by: Denys Dmytriyenko <denys@ti.com> --- ...e-add-support-for-beagleboard-xM-revision.patch | 117 - ...P3-beagle-add-support-for-expansionboards.patch | 359 - .../0003-OMAP3-beagle-add-MADC-support.patch | 36 - ...eagle-add-regulators-for-camera-interface.patch | 88 - .../0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 - .../beagle/0006-OMAP3-BEAGLE-fix-RTC.patch | 27 - ...mc-Adjust-dto-to-eliminate-timeout-errors.patch | 33 - ...ap3-beagle-Use-GPTIMERi-1-for-clockevents.patch | 42 - .../linux-omap-2.6.39/beagleboard/configs/stock | 3490 ------ .../linux/linux-omap-2.6.39/beagleboard/defconfig | 3517 ------ ...d-driver-for-Aptina-Micron-mt9p031-sensor.patch | 859 -- .../0002-v4l-Add-mt9v032-sensor-driver.patch | 853 -- ...-for-mt9p031-LI-5M03-module-in-Beagleboar.patch | 162 - ...ap-usbhs-crash-when-rmmoding-ehci-or-ohci.patch | 67 - ...-omap_usbhs_alloc_children-error-handling.patch | 50 - ...003-mfd-Add-omap-usbhs-runtime-PM-support.patch | 245 - ...b-ehci-and-ohci-hwmod-structures-for-omap.patch | 406 - ...005-arm-omap-usb-register-hwmods-of-usbhs.patch | 160 - ...b-device-name-change-for-the-clk-names-of.patch | 123 - ...Suspend-and-resume-support-of-ehci-and-oh.patch | 165 - ...-Correct-the-warning-print-during-script-.patch | 36 - ...-Modifying-the-macro-name-Main_Ref-to-all.patch | 61 - ...FD-TWL4030-power-scripts-for-OMAP3-boards.patch | 705 -- .../0011-MFD-TWL4030-TWL-version-checking.patch | 164 - ...TWL4030-workaround-changes-for-Erratum-27.patch | 341 - ...TWL4030-optimizing-resource-configuration.patch | 184 - ...-Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch | 121 - ...-NFS-Revert-NFSROOT-default-mount-options.patch | 13 - .../0001-OMAP2-cpufreq-free-up-table-on-exit.patch | 38 - ...MAP2-cpufreq-handle-invalid-cpufreq-table.patch | 44 - .../0003-OMAP2-cpufreq-minor-comment-cleanup.patch | 33 - ...eq-use-clk_init_cpufreq_table-if-OPPs-not.patch | 48 - ...pufreq-use-cpufreq_frequency_table_target.patch | 78 - .../0006-OMAP2-cpufreq-fix-freq_table-leak.patch | 100 - ...q-helpers-for-walking-the-frequency-table.patch | 134 - .../0002-cpufreq-introduce-hotplug-governor.patch | 879 -- ...q-ensure-driver-initializes-after-cpufreq.patch | 27 - ...PUfreq-ensure-policy-is-fully-initialized.patch | 31 - .../0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch | 263 - ...AP-PM-CPUFREQ-Fix-conditional-compilation.patch | 32 - ...-cpufreq-fixup-after-new-OPP-layer-merged.patch | 33 - ...q-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch | 669 -- ...cpufreq-Add-SMP-support-to-cater-OMAP4430.patch | 170 - ...pufreq-Fix-typo-when-attempting-to-set-mp.patch | 29 - ...-clockdomain-Add-an-api-to-read-idle-mode.patch | 77 - ...kdomain-Add-SoC-support-for-clkdm_is_idle.patch | 86 - ...itialise-sleep_switch-to-a-non-valid-valu.patch | 35 - ...P2-PM-idle-clkdms-only-if-already-in-idle.patch | 50 - ...hwmod-Follow-the-recomended-PRCM-sequence.patch | 46 - ...6-OMAP-Serial-Check-wk_st-only-if-present.patch | 33 - ...age-remove-spurious-pr_notice-for-debugfs.patch | 30 - ...OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch | 41 - ...reflex-fix-sr_late_init-error-path-in-pro.patch | 30 - ...AP3-smartreflex-request-the-memory-region.patch | 36 - ...artreflex-fix-ioremap-leak-on-probe-error.patch | 66 - ...reflex-delete-instance-from-sr_list-on-pr.patch | 29 - ...reflex-delete-debugfs-entries-on-probe-er.patch | 48 - ...uidle-remove-useless-SDP-specific-timings.patch | 57 - ...OMAP3-SR-make-notify-independent-of-class.patch | 48 - ...010-OMAP3-SR-disable-interrupt-by-default.patch | 37 - ...1-OMAP3-SR-enable-disable-SR-only-on-need.patch | 41 - .../0012-OMAP3-SR-fix-cosmetic-indentation.patch | 49 - ...01-OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch | 33 - .../0002-OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch | 49 - ...SS2-Fix-Return-correct-lcd-clock-source-f.patch | 43 - .../0004-OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch | 64 - ...-OMAP-DSS2-fix-panel-Kconfig-dependencies.patch | 61 - ...dd-bootarg-for-selecting-svideo-or-compos.patch | 75 - .../sakoman/0007-video-add-timings-for-hd720.patch | 27 - ...-smsc911x-return-ENODEV-if-device-is-not-.patch | 29 - ...ut-touchscreen-ads7846-return-ENODEV-if-d.patch | 47 - ...10-Revert-omap2_mcspi-Flush-posted-writes.patch | 25 - ...p_hsmmc-improve-interrupt-synchronisation.patch | 482 - ...SDIO-cards-off-to-save-power.-Doing-so-wi.patch | 51 - ...13-Enable-the-use-of-SDIO-card-interrupts.patch | 288 - ...Enable-audio-capture-by-default-for-twl40.patch | 27 - ...odecs-twl4030-Turn-on-mic-bias-by-default.patch | 25 - ...C-add-support-for-backup-battery-recharge.patch | 55 - ...mc-twl4030-move-clock-input-selection-pri.patch | 39 - ...wer-off-support-for-the-TWL4030-companion.patch | 103 - ...RM-OMAP-Add-twl4030-madc-support-to-Overo.patch | 33 - ...20-Enabling-Hwmon-driver-for-twl4030-madc.patch | 46 - .../0021-mfd-twl-core-enable-madc-clock.patch | 54 - ...0022-rtc-twl-Switch-to-using-threaded-irq.patch | 25 - ...tomatically-set-musb-mode-in-platform-dat.patch | 49 - ...mc-Adjust-dto-to-eliminate-timeout-errors.patch | 28 - .../0025-omap-Fix-mtd-subpage-read-alignment.patch | 95 - ...ap2-Force-all-buffer-reads-to-u32-alignme.patch | 35 - ...-nand-fix-subpage-ecc-issue-with-prefetch.patch | 63 - .../0028-OMAP-Overo-Add-support-for-spidev.patch | 46 - ...029-unionfs-Add-support-for-unionfs-2.5.9.patch | 11494 ------------------- ...-omap_device-activate-latency-messages-fr.patch | 34 - .../sakoman/0031-omap-overo-Add-opp-init.patch | 105 - ...2-omap3-Add-basic-support-for-720MHz-part.patch | 202 - recipes-kernel/linux/linux-omap_2.6.39.bb | 123 - 95 files changed, 29857 deletions(-) delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0002-OMAP3-beagle-add-support-for-expansionboards.patch delete mode 100644 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recipes-kernel/linux/linux-omap-2.6.39/sakoman/0028-OMAP-Overo-Add-support-for-spidev.patch delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0029-unionfs-Add-support-for-unionfs-2.5.9.patch delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0030-omap-Change-omap_device-activate-latency-messages-fr.patch delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0031-omap-overo-Add-opp-init.patch delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0032-omap3-Add-basic-support-for-720MHz-part.patch delete mode 100644 recipes-kernel/linux/linux-omap_2.6.39.bb diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch deleted file mode 100644 index 7522d6c..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch +++ /dev/null @@ -1,117 +0,0 @@ -From 16c1bdb30f1bcd750b29dffd2ef3003be2d30610 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Fri, 20 May 2011 12:48:37 +0200 -Subject: [PATCH 1/7] OMAP3: beagle: add support for beagleboard xM revision C - -The USB enable GPIO has been inverted and the USER button moved. - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 34 +++++++++++++++++++++++------- - 1 files changed, 26 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 2de4b02..77bafa8 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -62,7 +62,9 @@ - * AXBX = GPIO173, GPIO172, GPIO171: 1 1 1 - * C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0 - * C4 = GPIO173, GPIO172, GPIO171: 1 0 1 -- * XM = GPIO173, GPIO172, GPIO171: 0 0 0 -+ * XMA = GPIO173, GPIO172, GPIO171: 0 0 0 -+ * XMB = GPIO173, GPIO172, GPIO171: 0 0 1 -+ * XMC = GPIO173, GPIO172, GPIO171: 0 1 0 - */ - enum { - OMAP3BEAGLE_BOARD_UNKN = 0, -@@ -70,6 +72,7 @@ enum { - OMAP3BEAGLE_BOARD_C1_3, - OMAP3BEAGLE_BOARD_C4, - OMAP3BEAGLE_BOARD_XM, -+ OMAP3BEAGLE_BOARD_XMC, - }; - - static u8 omap3_beagle_version; -@@ -124,9 +127,18 @@ static void __init omap3_beagle_init_rev(void) - printk(KERN_INFO "OMAP3 Beagle Rev: xM\n"); - omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; - break; -+ case 1: -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM B\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; -+ break; -+ case 2: -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; -+ break; - default: -- printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); -- omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; -+ printk(KERN_INFO -+ "OMAP3 Beagle Rev: unknown %hd, assuming xM C or newer\n", beagle_rev); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; - } - - return; -@@ -278,7 +290,7 @@ static int beagle_twl_gpio_setup(struct device *dev, - { - int r; - -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ if (cpu_is_omap3630()) { - mmc[0].gpio_wp = -EINVAL; - } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || - (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { -@@ -298,7 +310,8 @@ static int beagle_twl_gpio_setup(struct device *dev, - /* REVISIT: need ehci-omap hooks for external VBUS - * power switch and overcurrent detect - */ -- if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM) { -+ if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM -+ && omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XMC) { - r = gpio_request(gpio + 1, "EHCI_nOC"); - if (!r) { - r = gpio_direction_input(gpio + 1); -@@ -320,7 +333,7 @@ static int beagle_twl_gpio_setup(struct device *dev, - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); - - /* DVI reset GPIO is different between beagle revisions */ -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) -+ if (cpu_is_omap3630()) - beagle_dvi_device.reset_gpio = 129; - else - beagle_dvi_device.reset_gpio = 170; -@@ -334,7 +347,7 @@ static int beagle_twl_gpio_setup(struct device *dev, - * P7/P8 revisions(prototype): Camera EN - * A2+ revisions (production): LDO (supplies DVI, serial, led blocks) - */ -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ if (cpu_is_omap3630()) { - r = gpio_request(gpio + 1, "nDVI_PWR_EN"); - if (!r) { - r = gpio_direction_output(gpio + 1, 0); -@@ -625,7 +638,7 @@ static void __init beagle_opp_init(void) - } - - /* Custom OPP enabled for XM */ -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ if (cpu_is_omap3630()) { - struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); - struct omap_hwmod *dh = omap_hwmod_lookup("iva"); - struct device *dev; -@@ -665,6 +678,11 @@ static void __init omap3_beagle_init(void) - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap3_beagle_init_rev(); - omap3_beagle_i2c_init(); -+ -+ if (cpu_is_omap3630()) { -+ gpio_buttons[0].gpio = 4; -+ } -+ - platform_add_devices(omap3_beagle_devices, - ARRAY_SIZE(omap3_beagle_devices)); - omap_display_init(&beagle_dss_data); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0002-OMAP3-beagle-add-support-for-expansionboards.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0002-OMAP3-beagle-add-support-for-expansionboards.patch deleted file mode 100644 index 2e95c76..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0002-OMAP3-beagle-add-support-for-expansionboards.patch +++ /dev/null @@ -1,359 +0,0 @@ -From 27494059a5d005b8cad4e0e8640ff031b86220dc Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Fri, 20 May 2011 13:06:24 +0200 -Subject: [PATCH 2/7] OMAP3: beagle: add support for expansionboards - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 272 ++++++++++++++++++++++++++++++- - 1 files changed, 269 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 77bafa8..db285e1 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -21,6 +21,7 @@ - #include <linux/io.h> - #include <linux/leds.h> - #include <linux/gpio.h> -+#include <linux/irq.h> - #include <linux/input.h> - #include <linux/gpio_keys.h> - #include <linux/opp.h> -@@ -154,6 +155,167 @@ fail0: - return; - } - -+char expansionboard_name[16]; -+ -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) -+#include <linux/regulator/fixed.h> -+#include <linux/wl12xx.h> -+ -+#define OMAP_BEAGLE_WLAN_EN_GPIO (139) -+#define OMAP_BEAGLE_BT_EN_GPIO (138) -+#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) -+#define OMAP_BEAGLE_FM_EN_BT_WU (136) -+ -+struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { -+ .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO), -+ .board_ref_clock = 2, /* 38.4 MHz */ -+}; -+ -+static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, OMAP_BEAGLE_FM_EN_BT_WU, -1}; -+static struct platform_device wl12xx_device = { -+ .name = "kim", -+ .id = -1, -+ .dev.platform_data = &gpios, -+}; -+ -+static struct omap2_hsmmc_info mmcbbt[] = { -+ { -+ .mmc = 1, -+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, -+ .gpio_wp = 29, -+ }, -+ { -+ .name = "wl1271", -+ .mmc = 2, -+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, -+ .gpio_wp = -EINVAL, -+ .gpio_cd = -EINVAL, -+ .ocr_mask = MMC_VDD_165_195, -+ .nonremovable = true, -+ }, -+ {} /* Terminator */ -+ }; -+ -+static struct regulator_consumer_supply beagle_vmmc2_supply = -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+ -+static struct regulator_init_data beagle_vmmc2 = { -+ .constraints = { -+ .min_uV = 1850000, -+ .max_uV = 1850000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vmmc2_supply, -+}; -+ -+static struct fixed_voltage_config beagle_vwlan = { -+ .supply_name = "vwl1271", -+ .microvolts = 1800000, /* 1.8V */ -+ .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, -+ .startup_delay = 70000, /* 70ms */ -+ .enable_high = 1, -+ .enabled_at_boot = 0, -+ .init_data = &beagle_vmmc2, -+}; -+ -+static struct platform_device omap_vwlan_device = { -+ .name = "reg-fixed-voltage", -+ .id = 1, -+ .dev = { -+ .platform_data = &beagle_vwlan, -+ }, -+}; -+#endif -+ -+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) -+ -+#include <plat/mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 -+ -+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = { -+ { -+ .modalias = "enc28j60", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 20000000, -+ .controller_data = &enc28j60_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_enc28j60_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); -+ omap3beagle_zippy_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); -+ irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_enc28j60_init(void) { return; } -+#endif -+ -+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) -+ -+#include <plat/mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 -+ -+static struct omap2_mcspi_device_config ks8851_spi_chip_info = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = { -+ { -+ .modalias = "ks8851", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 36000000, -+ .controller_data = &ks8851_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_ks8851_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); -+ omap3beagle_zippy2_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); -+ irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy2_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_ks8851_init(void) { return; } -+#endif -+ - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -272,6 +434,12 @@ static struct omap2_hsmmc_info mmc[] = { - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, - .gpio_wp = 29, - }, -+ { -+ .mmc = 2, -+ .caps = MMC_CAP_4_BIT_DATA, -+ .transceiver = true, -+ .ocr_mask = 0x00100000, /* 3.3V */ -+ }, - {} /* Terminator */ - }; - -@@ -301,11 +469,25 @@ static int beagle_twl_gpio_setup(struct device *dev, - } - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) { -+ omap2_hsmmc_init(mmcbbt); -+ /* link regulators to MMC adapters */ -+ beagle_vmmc1_supply.dev = mmcbbt[0].dev; -+ beagle_vsim_supply.dev = mmcbbt[0].dev; -+ } else { -+ omap2_hsmmc_init(mmc); -+ /* link regulators to MMC adapters */ -+ beagle_vmmc1_supply.dev = mmc[0].dev; -+ beagle_vsim_supply.dev = mmc[0].dev; -+ } -+#else - omap2_hsmmc_init(mmc); - - /* link regulators to MMC adapters */ - beagle_vmmc1_supply.dev = mmc[0].dev; - beagle_vsim_supply.dev = mmc[0].dev; -+#endif - - /* REVISIT: need ehci-omap hooks for external VBUS - * power switch and overcurrent detect -@@ -466,7 +648,7 @@ static struct twl4030_platform_data beagle_twldata = { - .vpll2 = &beagle_vpll2, - }; - --static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = { -+static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = { - { - I2C_BOARD_INFO("twl4030", 0x48), - .flags = I2C_CLIENT_WAKE, -@@ -481,10 +663,24 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { - }, - }; - -+#if defined(CONFIG_RTC_DRV_DS1307) || \ -+ defined(CONFIG_RTC_DRV_DS1307_MODULE) -+ -+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { -+ { -+ I2C_BOARD_INFO("ds1307", 0x68), -+ }, -+}; -+#else -+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {}; -+#endif -+ - static int __init omap3_beagle_i2c_init(void) - { -- omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo, -- ARRAY_SIZE(beagle_i2c_boardinfo)); -+ omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo, -+ ARRAY_SIZE(beagle_i2c1_boardinfo)); -+ omap_register_i2c_bus(2, 400, beagle_i2c2_boardinfo, -+ ARRAY_SIZE(beagle_i2c2_boardinfo)); - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ - omap_register_i2c_bus(3, 100, beagle_i2c_eeprom, ARRAY_SIZE(beagle_i2c_eeprom)); -@@ -627,6 +823,15 @@ static struct omap_musb_board_data musb_board_data = { - .power = 100, - }; - -+static int __init expansionboard_setup(char *str) -+{ -+ if (!str) -+ return -EINVAL; -+ strncpy(expansionboard_name, str, 16); -+ printk(KERN_INFO "Beagle expansionboard: %s\n", expansionboard_name); -+ return 0; -+} -+ - static void __init beagle_opp_init(void) - { - int r = 0; -@@ -693,6 +898,65 @@ static void __init omap3_beagle_init(void) - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_direction_output(170, true); - -+ if(!strcmp(expansionboard_name, "zippy")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n"); -+ omap3beagle_enc28j60_init(); -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); -+ mmc[1].gpio_wp = 141; -+ mmc[1].gpio_cd = 162; -+ } -+ -+ if(!strcmp(expansionboard_name, "zippy2")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n"); -+ omap3beagle_ks8851_init(); -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); -+ mmc[1].gpio_wp = 141; -+ mmc[1].gpio_cd = 162; -+ } -+ -+ if(!strcmp(expansionboard_name, "trainer")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); -+ gpio_request(130, "sysfs"); -+ gpio_export(130, 1); -+ gpio_request(131, "sysfs"); -+ gpio_export(131, 1); -+ gpio_request(132, "sysfs"); -+ gpio_export(132, 1); -+ gpio_request(133, "sysfs"); -+ gpio_export(133, 1); -+ gpio_request(134, "sysfs"); -+ gpio_export(134, 1); -+ gpio_request(135, "sysfs"); -+ gpio_export(135, 1); -+ gpio_request(136, "sysfs"); -+ gpio_export(136, 1); -+ gpio_request(137, "sysfs"); -+ gpio_export(137, 1); -+ gpio_request(138, "sysfs"); -+ gpio_export(138, 1); -+ gpio_request(139, "sysfs"); -+ gpio_export(139, 1); -+ gpio_request(140, "sysfs"); -+ gpio_export(140, 1); -+ gpio_request(141, "sysfs"); -+ gpio_export(141, 1); -+ gpio_request(162, "sysfs"); -+ gpio_export(162, 1); -+ } -+ -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) -+ { -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) -+ pr_err("error setting wl12xx data\n"); -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx bt platform device\n"); -+ platform_device_register(&wl12xx_device); -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx wifi platform device\n"); -+ platform_device_register(&omap_vwlan_device); -+ } -+ - usb_musb_init(&musb_board_data); - usbhs_init(&usbhs_bdata); - omap3beagle_flash_init(); -@@ -705,6 +969,8 @@ static void __init omap3_beagle_init(void) - beagle_opp_init(); - } - -+early_param("buddy", expansionboard_setup); -+ - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ - .boot_params = 0x80000100, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0003-OMAP3-beagle-add-MADC-support.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0003-OMAP3-beagle-add-MADC-support.patch deleted file mode 100644 index 79097db..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0003-OMAP3-beagle-add-MADC-support.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 91e701f3287923d11dd295b6a62186909e362503 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Sat, 21 May 2011 16:18:30 +0200 -Subject: [PATCH 3/7] OMAP3: beagle: add MADC support - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index db285e1..da4ba50 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -634,6 +634,10 @@ static struct twl4030_codec_data beagle_codec_data = { - .audio = &beagle_audio_data, - }; - -+static struct twl4030_madc_platform_data beagle_madc_data = { -+ .irq_line = 1, -+}; -+ - static struct twl4030_platform_data beagle_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, -@@ -642,6 +646,7 @@ static struct twl4030_platform_data beagle_twldata = { - .usb = &beagle_usb_data, - .gpio = &beagle_gpio_data, - .codec = &beagle_codec_data, -+ .madc = &beagle_madc_data, - .vmmc1 = &beagle_vmmc1, - .vsim = &beagle_vsim, - .vdac = &beagle_vdac, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0004-OMAP3-beagle-add-regulators-for-camera-interface.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0004-OMAP3-beagle-add-regulators-for-camera-interface.patch deleted file mode 100644 index 29e9956..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0004-OMAP3-beagle-add-regulators-for-camera-interface.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 9d7f46abab88c74e674461a2f4e9ab35b524a6ef Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 25 May 2011 08:56:06 +0200 -Subject: [PATCH 4/7] OMAP3: beagle: add regulators for camera interface - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 50 +++++++++++++++++++++++++++++++ - 1 files changed, 50 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index da4ba50..211cbdf 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -453,6 +453,44 @@ static struct regulator_consumer_supply beagle_vsim_supply = { - - static struct gpio_led gpio_leds[]; - -+static struct regulator_consumer_supply beagle_vaux3_supply = { -+ .supply = "cam_1v8", -+}; -+ -+static struct regulator_consumer_supply beagle_vaux4_supply = { -+ .supply = "cam_2v8", -+}; -+ -+/* VAUX3 for CAM_1V8 */ -+static struct regulator_init_data beagle_vaux3 = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vaux3_supply, -+}; -+ -+/* VAUX4 for CAM_2V8 */ -+static struct regulator_init_data beagle_vaux4 = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vaux4_supply, -+}; -+ - static int beagle_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) - { -@@ -504,6 +542,16 @@ static int beagle_twl_gpio_setup(struct device *dev, - pr_err("%s: unable to configure EHCI_nOC\n", __func__); - } - -+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ /* -+ * Power on camera interface - only on pre-production, not -+ * needed on production boards -+ */ -+ gpio_request(gpio + 2, "CAM_EN"); -+ gpio_direction_output(gpio + 2, 1); -+ } -+ -+ - /* - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active - * high / others active low) -@@ -651,6 +699,8 @@ static struct twl4030_platform_data beagle_twldata = { - .vsim = &beagle_vsim, - .vdac = &beagle_vdac, - .vpll2 = &beagle_vpll2, -+ .vaux3 = &beagle_vaux3, -+ .vaux4 = &beagle_vaux4, - }; - - static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch deleted file mode 100644 index 8b65b76..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch +++ /dev/null @@ -1,31 +0,0 @@ -From aa93263ed7827e33148396656b7e7ab4579509a5 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 25 May 2011 08:57:40 +0200 -Subject: [PATCH 5/7] OMAP3: beagle: HACK! add in 1GHz OPP - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 211cbdf..221bfda 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -911,11 +911,13 @@ static void __init beagle_opp_init(void) - /* Enable MPU 1GHz and lower opps */ - dev = &mh->od->pdev.dev; - r = opp_enable(dev, 800000000); -+ r |= opp_enable(dev, 1000000000); - /* TODO: MPU 1GHz needs SR and ABB */ - - /* Enable IVA 800MHz and lower opps */ - dev = &dh->od->pdev.dev; - r |= opp_enable(dev, 660000000); -+ r |= opp_enable(dev, 800000000); - /* TODO: DSP 800MHz needs SR and ABB */ - if (r) { - pr_err("%s: failed to enable higher opp %d\n", --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0006-OMAP3-BEAGLE-fix-RTC.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0006-OMAP3-BEAGLE-fix-RTC.patch deleted file mode 100644 index 76443d9..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0006-OMAP3-BEAGLE-fix-RTC.patch +++ /dev/null @@ -1,27 +0,0 @@ -From dd2c7ba245ec1b17e3d323a6c4a1cad9697dbbbe Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 15 Jun 2011 16:25:50 +0200 -Subject: [PATCH 6/7] OMAP3: BEAGLE: fix RTC - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 221bfda..61564a4 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -941,6 +941,9 @@ static void __init omap3_beagle_init(void) - omap3_beagle_init_rev(); - omap3_beagle_i2c_init(); - -+ /* Ensure msecure is mux'd to be able to set the RTC. */ -+ omap_mux_init_signal("sys_drm_msecure", OMAP_PIN_OFF_OUTPUT_HIGH); -+ - if (cpu_is_omap3630()) { - gpio_buttons[0].gpio = 4; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch deleted file mode 100644 index 8cd314c..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch +++ /dev/null @@ -1,33 +0,0 @@ -From bd0b2f97c48aa6aac0c6a494f1c6ba5af5de486b Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Mon, 18 Jul 2011 23:13:41 -0500 -Subject: [PATCH] omap_hsmmc: Set dto to max value of 14 to avoid SD Card timeouts - -This fixes MMC errors due to timeouts on certain SD Cards following suggestions -to set dto to 14 by Jason Kridner and Steven Kipisz - -Details of the issue: -http://talk.maemo.org/showthread.php?p=1000707#post1000707 - -This fix was originally proposed by Sukumar Ghoral of TI. ---- - drivers/mmc/host/omap_hsmmc.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c -index 9646a75..7443647 100644 ---- a/drivers/mmc/host/omap_hsmmc.c -+++ b/drivers/mmc/host/omap_hsmmc.c -@@ -1049,6 +1049,9 @@ static void set_data_timeout(struct omap_hsmmc_host *host, - dto = 14; - } - -+ /* Set dto to max value of 14 to avoid SD Card timeouts */ -+ dto = 14; -+ - reg &= ~DTO_MASK; - reg |= dto << DTO_SHIFT; - OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); --- -1.7.0.4 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap3-beagle-Use-GPTIMERi-1-for-clockevents.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap3-beagle-Use-GPTIMERi-1-for-clockevents.patch deleted file mode 100644 index d5a4cf6..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap3-beagle-Use-GPTIMERi-1-for-clockevents.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 101b0aedf8152711847e2f9f347d267a3ac7f287 Mon Sep 17 00:00:00 2001 -From: Sanjeev Premi <premi@ti.com> -Date: Fri, 24 Jun 2011 16:23:45 +0000 -Subject: [PATCH 7/7] omap3: beagle: Use GPTIMERi 1 for clockevents - -The current selection of the GPTIMER on was result of -a hardware issue in early versions of the Beagleboards -(Ax and B1 thru B4). [1] [2] - -Its been long since the hardware issue has been fixed. -This patch uses GPTIMER 1 for all newer board revisions -incl. Beagleboard XM. - - [1] http://thread.gmane.org/gmane.comp.hardware.beagleboard.general/91 - [2] Errata #7 at http://elinux.org/BeagleBoard#Errata - -Signed-off-by: Sanjeev Premi <premi@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Reviewed-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 5 ++++- - 1 files changed, 4 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 61564a4..20d5912 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -806,7 +806,10 @@ static void __init omap3_beagle_init_irq(void) - { - omap_init_irq(); - #ifdef CONFIG_OMAP_32K_TIMER -- omap2_gp_clockevent_set_gptimer(12); -+ if (omap3_beagle_version == OMAP3BEAGLE_BOARD_AXBX) -+ omap2_gp_clockevent_set_gptimer(12); -+ else -+ omap2_gp_clockevent_set_gptimer(1); - #endif - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/configs/stock b/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/configs/stock deleted file mode 100644 index dd288e2..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/configs/stock +++ /dev/null @@ -1,3490 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux/arm 2.6.39 Kernel Configuration -# Fri May 20 13:11:13 2011 -# -CONFIG_ARM=y -CONFIG_HAVE_PWM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_HAVE_SCHED_CLOCK=y -CONFIG_GENERIC_GPIO=y -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_KTIME_SCALAR=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_VECTORS_BASE=0xffff0000 -# CONFIG_ARM_PATCH_PHYS_VIRT is not set -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y -CONFIG_HAVE_IRQ_WORK=y -CONFIG_IRQ_WORK=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_FHANDLE=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set -CONFIG_HAVE_GENERIC_HARDIRQS=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_HARDIRQS=y -CONFIG_HAVE_SPARSE_IRQ=y -CONFIG_GENERIC_IRQ_SHOW=y -# CONFIG_SPARSE_IRQ is not set - -# -# RCU Subsystem -# -CONFIG_TREE_PREEMPT_RCU=y -# CONFIG_TINY_RCU is not set -# CONFIG_TINY_PREEMPT_RCU is not set -CONFIG_PREEMPT_RCU=y -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_CGROUPS=y -# CONFIG_CGROUP_DEBUG is not set -CONFIG_CGROUP_NS=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_CGROUP_MEM_RES_CTLR=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_RT_GROUP_SCHED=y -# CONFIG_BLK_CGROUP is not set -# CONFIG_NAMESPACES is not set -CONFIG_SCHED_AUTOGROUP=y -CONFIG_MM_OWNER=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EXPERT=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_EMBEDDED=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_PERF_COUNTERS is not set -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_HW_BREAKPOINT=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CNS3XXX is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_MXS is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_NUC93X is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5P64X0 is not set -# CONFIG_ARCH_S5P6442 is not set -# CONFIG_ARCH_S5PC100 is not set -# CONFIG_ARCH_S5PV210 is not set -# CONFIG_ARCH_EXYNOS4 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_TCC_926 is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_U8500 is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_PLAT_SPEAR is not set -# CONFIG_ARCH_VT8500 is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_KEYBOARD_GPIO_POLLED is not set - -# -# TI OMAP Common Features -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -CONFIG_ARCH_OMAP2PLUS=y - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -CONFIG_OMAP_SMARTREFLEX_CLASS3=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 -CONFIG_OMAP_IOMMU=y -CONFIG_OMAP_IOMMU_DEBUG=m -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_PM_NONE is not set -CONFIG_OMAP_PM_NOOP=y - -# -# TI OMAP2/3/4 Specific Features -# -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set -CONFIG_SOC_OMAP3430=y -# CONFIG_SOC_OMAPTI816X is not set -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -CONFIG_MACH_OMAP3_BEAGLE=y -# CONFIG_MACH_DEVKIT8000 is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OMAP3530_LV_SOM is not set -# CONFIG_MACH_OMAP3_TORPEDO is not set -CONFIG_MACH_OVERO=y -CONFIG_MACH_OMAP3EVM=y -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_CRANEBOARD is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -CONFIG_MACH_OMAP3_TOUCHBOOK=y -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RM680 is not set -# CONFIG_MACH_NOKIA_RX51 is not set -CONFIG_MACH_OMAP_ZOOM2=y -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_CM_T3517 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_IGEP0030 is not set -# CONFIG_MACH_SBC3530 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# System MMU -# - -# -# Processor Type -# -CONFIG_CPU_V7=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_SWP_EMULATE is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_DMA_MEM_BUFFERABLE=y -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -# CONFIG_ARM_ERRATA_743622 is not set -# CONFIG_ARM_ERRATA_754322 is not set - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -CONFIG_MIGRATION=y -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_NEED_PER_CPU_KM=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -# CONFIG_SECCOMP is not set -# CONFIG_CC_STACKPROTECTOR is not set -# CONFIG_DEPRECATED_PARAM_STRUCT is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y -# CONFIG_CRASH_DUMP is not set -# CONFIG_AUTO_ZRELADDR is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_DEBUG=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_PM_SLEEP=y -CONFIG_PM_RUNTIME=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -# CONFIG_PM_ADVANCED_DEBUG is not set -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_CAN_PM_TRACE=y -# CONFIG_APM_EMULATION is not set -CONFIG_ARCH_HAS_OPP=y -CONFIG_PM_OPP=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_ROUTE_CLASSID=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE_DEMUX=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETWORK_PHY_TIMESTAMPING=y -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_ZONES=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CONNTRACK_TIMESTAMP=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_SNMP=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_CT=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_TEE=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_CPU=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -# CONFIG_IP_SET_BITMAP_IP is not set -# CONFIG_IP_SET_BITMAP_IPMAC is not set -# CONFIG_IP_SET_BITMAP_PORT is not set -# CONFIG_IP_SET_HASH_IP is not set -# CONFIG_IP_SET_HASH_IPPORT is not set -# CONFIG_IP_SET_HASH_IPPORTIP is not set -# CONFIG_IP_SET_HASH_IPPORTNET is not set -# CONFIG_IP_SET_HASH_NET is not set -# CONFIG_IP_SET_HASH_NETPORT is not set -# CONFIG_IP_SET_LIST_SET is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y -# CONFIG_IP_VS_PROTO_SCTP is not set - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m -CONFIG_IP_VS_NFCT=y -CONFIG_IP_VS_PE_SIP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV6=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_L2TP=m -CONFIG_L2TP_DEBUGFS=m -CONFIG_L2TP_V3=y -CONFIG_L2TP_IP=m -CONFIG_L2TP_ETH=m -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -# CONFIG_NET_SCH_SFB is not set -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m -CONFIG_NET_SCH_MQPRIO=m -CONFIG_NET_SCH_CHOKE=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -CONFIG_NET_CLS_CGROUP=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -CONFIG_CAN_SLCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_ATH3K=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -CONFIG_BT_ATH3K=m -CONFIG_BT_WILINK=m -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -CONFIG_NL80211_TESTMODE=y -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_CFG80211_INTERNAL_REGDB is not set -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set -# CONFIG_CAIF is not set -CONFIG_CEPH_LIB=m -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -CONFIG_SM_FTL=m -# CONFIG_MTD_OOPS is not set -CONFIG_MTD_SWAP=m - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND_ECC=y -# CONFIG_MTD_NAND_ECC_SMC is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_BCH is not set -# CONFIG_MTD_SM_COMMON is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_BLK_DEV_RBD is not set -# CONFIG_SENSORS_LIS3LV02D is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -CONFIG_SENSORS_BH1780=m -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -CONFIG_HMC6352=m -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -CONFIG_BMP085=m -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=m -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set - -# -# Texas Instruments shared transport line discipline -# -CONFIG_TI_ST=m -# CONFIG_SENSORS_LIS3_SPI is not set -# CONFIG_SENSORS_LIS3_I2C is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -CONFIG_ISCSI_BOOT_SYSFS=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_RAID=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_DM_FLAKEY=m -CONFIG_TARGET_CORE=m -CONFIG_TCM_IBLOCK=m -CONFIG_TCM_FILEIO=m -CONFIG_TCM_PSCSI=m -CONFIG_LOOPBACK_TARGET=m -# CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_MACVTAP=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_MII=y -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -CONFIG_BCM63XX_PHY=m -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -CONFIG_MICREL_PHY=m -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -# CONFIG_AX88796 is not set -CONFIG_SMC91X=y -# CONFIG_TI_DAVINCI_EMAC is not set -CONFIG_TI_DAVINCI_MDIO=m -CONFIG_TI_DAVINCI_CPDMA=m -# CONFIG_DM9000 is not set -CONFIG_ENC28J60=y -# CONFIG_ENC28J60_WRITEVERIFY is not set -# CONFIG_ETHOC is not set -CONFIG_SMC911X=y -CONFIG_SMSC911X=y -# CONFIG_SMSC911X_ARCH_HOOKS is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -CONFIG_KS8842=m -CONFIG_KS8851=y -# CONFIG_KS8851_MLL is not set -# CONFIG_FTMAC100 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -CONFIG_B43=m -# CONFIG_B43_SDIO is not set -CONFIG_B43_PIO=y -CONFIG_B43_PHY_N=y -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -# CONFIG_LIBERTAS_MESH is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -# CONFIG_RT2800USB is not set -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_RTL8192CU=m -CONFIG_RTLWIFI=m -CONFIG_RTL8192C_COMMON=m -CONFIG_WL1251=m -CONFIG_WL1251_SPI=m -CONFIG_WL1251_SDIO=m -CONFIG_WL12XX_MENU=m -CONFIG_WL12XX=m -CONFIG_WL12XX_HT=y -CONFIG_WL12XX_SPI=m -CONFIG_WL12XX_SDIO=m -# CONFIG_WL12XX_SDIO_TEST is not set -CONFIG_WL12XX_PLATFORM_DATA=y -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -CONFIG_WIMAX_IWMC3200_SDIO=y -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=y -CONFIG_USB_KAWETH=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_RTL8150=y -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_CDC_NCM=m -CONFIG_USB_NET_DM9601=y -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_PLUSB=y -CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_NET_CX82310_ETH=m -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -CONFIG_USB_IPHETH=m -CONFIG_USB_SIERRA_NET=m -CONFIG_USB_VL600=m -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set - -# -# CAIF transport drivers -# -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPTP=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_QT1070=m -CONFIG_KEYBOARD_QT2160=m -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -CONFIG_KEYBOARD_MCS=m -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -CONFIG_INPUT_MISC=y -CONFIG_INPUT_AD714X=m -CONFIG_INPUT_AD714X_I2C=m -CONFIG_INPUT_AD714X_SPI=m -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_TWL4030_VIBRA=m -CONFIG_INPUT_UINPUT=y -CONFIG_INPUT_PCF8574=m -CONFIG_INPUT_PWM_BEEPER=m -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -CONFIG_INPUT_ADXL34X=m -CONFIG_INPUT_ADXL34X_I2C=m -CONFIG_INPUT_ADXL34X_SPI=m -CONFIG_INPUT_CMA3000=m -CONFIG_INPUT_CMA3000_I2C=m - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_N_GSM=m -CONFIG_DEVKMEM=y - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX3107 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_OMAP=y -CONFIG_SERIAL_OMAP_CONSOLE=y -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -CONFIG_SERIAL_IFX6X60=m -CONFIG_TTY_PRINTK=y -# CONFIG_HVC_DCC is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_RAMOOPS is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=m - -# -# Multiplexer I2C Chip support -# -CONFIG_I2C_MUX_GPIO=m -# CONFIG_I2C_MUX_PCA9541 is not set -# CONFIG_I2C_MUX_PCA954x is not set -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=m - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PXA_PCI is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -CONFIG_I2C_DIOLAN_U2C=m -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_OC_TINY is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set - -# -# PPS generators support -# -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_MAX730X=m - -# -# Memory mapped GPIO expanders: -# -# CONFIG_GPIO_BASIC_MMIO is not set -# CONFIG_GPIO_IT8761E is not set - -# -# I2C GPIO expanders: -# -CONFIG_GPIO_MAX7300=m -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_SX150X is not set -CONFIG_GPIO_TWL4030=y -CONFIG_GPIO_ADP5588=m - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_74X164 is not set - -# -# AC97 GPIO expanders: -# - -# -# MODULbus GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -CONFIG_TEST_POWER=m -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ20Z75 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_BATTERY_MAX17042=m -CONFIG_CHARGER_ISP1704=m -CONFIG_CHARGER_TWL4030=m -CONFIG_CHARGER_GPIO=m -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -CONFIG_SENSORS_ADT7411=m -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -CONFIG_SENSORS_ASC7621=m -# CONFIG_SENSORS_ATXP1 is not set -CONFIG_SENSORS_DS620=m -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -CONFIG_SENSORS_GPIO_FAN=m -# CONFIG_SENSORS_IT87 is not set -CONFIG_SENSORS_JC42=m -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -CONFIG_SENSORS_SMM665=m -# CONFIG_SENSORS_DME1737 is not set -CONFIG_SENSORS_EMC1403=m -CONFIG_SENSORS_EMC2103=m -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_ADS1015 is not set -# CONFIG_SENSORS_ADS7828 is not set -CONFIG_SENSORS_ADS7871=m -CONFIG_SENSORS_AMC6821=m -# CONFIG_SENSORS_THMC50 is not set -CONFIG_SENSORS_TMP102=m -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -CONFIG_SENSORS_TWL4030_MADC=m -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_BLOCKIO=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set -CONFIG_MFD_SUPPORT=y -CONFIG_MFD_CORE=y -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -CONFIG_TPS6105X=m -# CONFIG_TPS65010 is not set -CONFIG_TPS6507X=m -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_MADC=m -CONFIG_TWL4030_POWER=y -CONFIG_TWL4030_CODEC=y -CONFIG_TWL4030_POWEROFF=y -CONFIG_TWL6030_PWM=m -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13XXX is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_EZX_PCAP is not set -CONFIG_MFD_TPS6586X=y -CONFIG_MFD_WL1273_CORE=m -CONFIG_MFD_OMAP_USB_HOST=y -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_DUMMY=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -CONFIG_REGULATOR_TPS6105X=m -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_TPS6586X=m -CONFIG_REGULATOR_TPS6524X=m -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_MEDIA_CONTROLLER=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_RC_CORE=m -CONFIG_LIRC=m -CONFIG_RC_MAP=m -CONFIG_IR_NEC_DECODER=m -CONFIG_IR_RC5_DECODER=m -CONFIG_IR_RC6_DECODER=m -CONFIG_IR_JVC_DECODER=m -CONFIG_IR_SONY_DECODER=m -CONFIG_IR_RC5_SZ_DECODER=m -CONFIG_IR_LIRC_CODEC=m -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_STREAMZAP is not set -CONFIG_RC_LOOPBACK=m -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y - -# -# Customize TV tuners -# -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_MEDIA_TUNER_TDA18218=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_V4L2_MEM2MEM_DEV=m -CONFIG_VIDEOBUF2_CORE=m -CONFIG_VIDEOBUF2_MEMOPS=m -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -CONFIG_VIDEO_ADV7180=m -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -CONFIG_VIDEO_MT9V011=m -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_TVP7002 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_AK881X is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -CONFIG_VIDEO_VPFE_CAPTURE=y -# CONFIG_VIDEO_DM6446_CCDC is not set -CONFIG_VIDEO_OMAP2_VOUT=y -# CONFIG_VIDEO_CPIA2 is not set -CONFIG_VIDEO_TIMBERDALE=m -# CONFIG_VIDEO_AU0828 is not set -CONFIG_VIDEO_SR030PC30=m -CONFIG_VIDEO_NOON010PC30=m -CONFIG_VIDEO_OMAP3=y -# CONFIG_VIDEO_OMAP3_DEBUG is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_BENQ=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_CPIA1=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -CONFIG_USB_GSPCA_KONICA=m -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_NW80X=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_OV534_9=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SN9C2028=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SPCA1528=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_SQ930X=m -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_VICAM=m -CONFIG_USB_GSPCA_XIRLINK_CIT=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_TLG2300=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_RC=y -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_USB_ET61X251=m -CONFIG_USB_SN9C102=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_TESTDEV=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -CONFIG_RADIO_SAA7706H=m -# CONFIG_RADIO_TEF6862 is not set -CONFIG_RADIO_WL1273=m - -# -# Texas Instruments WL128x FM driver (ST based) -# -CONFIG_RADIO_WL128X=m -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -CONFIG_DVB_USB_AZ6027=m -CONFIG_DVB_USB_LME2510=m -CONFIG_DVB_USB_TECHNISAT_USB2=m -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set - -# -# Multistandard (satellite) frontends -# -CONFIG_DVB_STB0899=m -CONFIG_DVB_STB6100=m -CONFIG_DVB_STV090x=m -CONFIG_DVB_STV6110x=m - -# -# DVB-S (satellite) frontends -# -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_DS3000=m - -# -# DVB-T (terrestrial) frontends -# -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m - -# -# DVB-C (cable) frontends -# -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m - -# -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends -# -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m - -# -# ISDB-T (terrestrial) frontends -# -CONFIG_DVB_S921=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_MB86A20S=m - -# -# Digital terrestrial only tuners/PLL -# -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_TUNER_DIB0090=m - -# -# SEC control devices for DVB-S -# -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GXX=m -CONFIG_DVB_ATBM8830=m -CONFIG_DVB_IX2505V=m - -# -# Tools to develop new frontends -# -# CONFIG_DVB_DUMMY_FE is not set - -# -# Graphics support -# -CONFIG_DRM=m -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -# CONFIG_FB_WMT_GE_ROPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -CONFIG_FB_UDL=m -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set -CONFIG_OMAP2_DSS_DPI=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -CONFIG_FB_OMAP2_NUM_FBS=2 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC_DPI=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -CONFIG_PANEL_NEC_NL8048HL11_01B=y -# CONFIG_PANEL_TAAL is not set -CONFIG_PANEL_TPO_TD043MTEA1=m -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_UA101=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_USB_6FIRE=m -CONFIG_SND_SOC=y -CONFIG_SND_SOC_CACHE_LZO=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OVERO=y -CONFIG_SND_OMAP_SOC_OMAP3EVM=y -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -CONFIG_SND_OMAP_SOC_ZOOM2=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_3M_PCT is not set -CONFIG_HID_A4TECH=y -CONFIG_HID_ACRUX=m -# CONFIG_HID_ACRUX_FF is not set -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -# CONFIG_HID_CANDO is not set -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -# CONFIG_HID_PRODIKEYS is not set -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EMS_FF=m -# CONFIG_HID_ELECOM is not set -CONFIG_HID_EZKEY=y -CONFIG_HID_KEYTOUCH=m -# CONFIG_HID_KYE is not set -CONFIG_HID_UCLOGIC=m -CONFIG_HID_WALTOP=m -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LCPOWER=m -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWII_FF is not set -CONFIG_HID_MAGICMOUSE=m -CONFIG_HID_MICROSOFT=y -# CONFIG_HID_MOSART is not set -CONFIG_HID_MONTEREY=y -CONFIG_HID_MULTITOUCH=m -CONFIG_HID_NTRIG=y -# CONFIG_HID_ORTEK is not set -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_PICOLCD=m -CONFIG_HID_PICOLCD_FB=y -CONFIG_HID_PICOLCD_BACKLIGHT=y -CONFIG_HID_PICOLCD_LEDS=y -CONFIG_HID_QUANTA=m -CONFIG_HID_ROCCAT=m -CONFIG_HID_ROCCAT_COMMON=m -CONFIG_HID_ROCCAT_ARVO=m -CONFIG_HID_ROCCAT_KONE=m -CONFIG_HID_ROCCAT_KONEPLUS=m -CONFIG_HID_ROCCAT_KOVAPLUS=m -# CONFIG_HID_ROCCAT_PYRA is not set -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_STANTUM=m -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -CONFIG_USB_EHCI_HCD_OMAP=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_TUSB6010 is not set -CONFIG_USB_MUSB_OMAP2PLUS=y -# CONFIG_USB_MUSB_AM35X is not set -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_MUSB_DEBUG is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -CONFIG_USB_STORAGE_REALTEK=m -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -CONFIG_USB_STORAGE_ENE_UB6250=m -CONFIG_USB_UAS=m -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=n -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QCAUX=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SAMBA=m -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -CONFIG_USB_SERIAL_TI=n -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=n -# CONFIG_USB_SERIAL_OPTION is not set -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m -CONFIG_USB_SERIAL_ZIO=m -CONFIG_USB_SERIAL_SSU100=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_YUREX=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=480 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_FUSB300 is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA_U2O is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -CONFIG_USB_G_NCM=m -# CONFIG_USB_GADGETFS is not set -CONFIG_USB_FUNCTIONFS=m -# CONFIG_USB_FUNCTIONFS_ETH is not set -CONFIG_USB_FUNCTIONFS_RNDIS=y -# CONFIG_USB_FUNCTIONFS_GENERIC is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set -CONFIG_USB_G_HID=m -CONFIG_USB_G_DBGP=m -# CONFIG_USB_G_DBGP_PRINTK is not set -CONFIG_USB_G_DBGP_SERIAL=y -CONFIG_USB_G_WEBCAM=m - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_TWL6030_USB=m -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y -# CONFIG_MMC_CLKGATE is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=8 -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -CONFIG_MMC_SPI=m -# CONFIG_MMC_DW is not set -CONFIG_MMC_USHC=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -CONFIG_LEDS_LP5521=m -CONFIG_LEDS_LP5523=m -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -CONFIG_LEDS_PWM=m -CONFIG_LEDS_REGULATOR=m -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -CONFIG_LEDS_TRIGGERS=y - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -CONFIG_NFC_DEVICES=y -CONFIG_PN544_NFC=m -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=y -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS3232 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_BQ32K=m -CONFIG_RTC_DRV_TWL4030=m -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -CONFIG_TIMB_DMA=m -CONFIG_DMA_ENGINE=y -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_VIDEO_TM6000 is not set -# CONFIG_USB_IP_COMMON is not set -CONFIG_W35UND=m -CONFIG_PRISM2_USB=m -CONFIG_ECHO=m -CONFIG_BRCM80211=m -CONFIG_BRCMFMAC=y -# CONFIG_BRCMDBG is not set -CONFIG_RT2870=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -CONFIG_R8712U=m -CONFIG_R8712_AP=y -# CONFIG_TRANZPORT is not set -# CONFIG_POHMELFS is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_IIO is not set -CONFIG_XVMALLOC=y -CONFIG_ZRAM=m -# CONFIG_ZRAM_DEBUG is not set -# CONFIG_FB_SM7XX is not set -# CONFIG_LIRC_STAGING is not set -# CONFIG_EASYCAP is not set -# CONFIG_TIDSPBRIDGE is not set -# CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set -CONFIG_MACH_NO_WESTBRIDGE=y -# CONFIG_ATH6K_LEGACY is not set -CONFIG_USB_ENESTORAGE=m -CONFIG_BCM_WIMAX=m -CONFIG_FT1000=m -CONFIG_FT1000_USB=m - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set -CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m -CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m - -# -# Altera FPGA firmware download module -# -# CONFIG_ALTERA_STAPL is not set -CONFIG_CLKDEV_LOOKUP=y - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_XFS_FS=m -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_POSIX_ACL is not set -# CONFIG_XFS_RT is not set -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -# CONFIG_GFS2_FS_LOCKING_DLM is not set -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -CONFIG_BTRFS_FS=m -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_UNION_FS=m -CONFIG_UNION_FS_XATTR=y -# CONFIG_UNION_FS_DEBUG is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_LOGFS=m -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_XATTR is not set -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_PSTORE=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -# CONFIG_NFS_USE_NEW_IDMAPPER is not set -CONFIG_NFSD=m -CONFIG_NFSD_DEPRECATED=y -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_ACL_SUPPORT=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_CEPH_FS=m -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DFS_UPCALL is not set -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -CONFIG_9P_FS=m -# CONFIG_9P_FS_POSIX_ACL is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_HARDLOCKUP_DETECTOR is not set -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_LKDTM is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_DEBUG_PAGEALLOC is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_RING_BUFFER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_ASYNC_RAID6_TEST is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_STRICT_DEVMEM is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_USER_API=m -CONFIG_CRYPTO_USER_API_HASH=m -CONFIG_CRYPTO_USER_API_SKCIPHER=m -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_OMAP_SHAM=m -CONFIG_CRYPTO_DEV_OMAP_AES=m -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_TEST=m -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_BTREE=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y -CONFIG_AVERAGE=y diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/defconfig b/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/defconfig deleted file mode 100644 index 6f97d93..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/defconfig +++ /dev/null @@ -1,3517 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux/arm 2.6.39 Kernel Configuration -# Sun Jun 5 11:03:19 2011 -# -CONFIG_ARM=y -CONFIG_HAVE_PWM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_HAVE_SCHED_CLOCK=y -CONFIG_GENERIC_GPIO=y -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_KTIME_SCALAR=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_VECTORS_BASE=0xffff0000 -# CONFIG_ARM_PATCH_PHYS_VIRT is not set -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y -CONFIG_HAVE_IRQ_WORK=y -CONFIG_IRQ_WORK=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_FHANDLE=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set -CONFIG_HAVE_GENERIC_HARDIRQS=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_HARDIRQS=y -CONFIG_HAVE_SPARSE_IRQ=y -CONFIG_GENERIC_IRQ_SHOW=y -# CONFIG_SPARSE_IRQ is not set - -# -# RCU Subsystem -# -CONFIG_TINY_RCU=y -# CONFIG_PREEMPT_RCU is not set -# CONFIG_RCU_TRACE is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_CGROUPS=y -# CONFIG_CGROUP_DEBUG is not set -CONFIG_CGROUP_NS=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_CGROUP_MEM_RES_CTLR=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_RT_GROUP_SCHED=y -CONFIG_BLK_CGROUP=y -# CONFIG_DEBUG_BLK_CGROUP is not set -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -CONFIG_SCHED_AUTOGROUP=y -CONFIG_MM_OWNER=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EXPERT=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_EMBEDDED=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_PERF_COUNTERS is not set -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_HW_BREAKPOINT=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_THROTTLING=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_CFQ_GROUP_IOSCHED=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CNS3XXX is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_MXS is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_NUC93X is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5P64X0 is not set -# CONFIG_ARCH_S5P6442 is not set -# CONFIG_ARCH_S5PC100 is not set -# CONFIG_ARCH_S5PV210 is not set -# CONFIG_ARCH_EXYNOS4 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_TCC_926 is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_U8500 is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_PLAT_SPEAR is not set -# CONFIG_ARCH_VT8500 is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_KEYBOARD_GPIO_POLLED is not set - -# -# TI OMAP Common Features -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -CONFIG_ARCH_OMAP2PLUS=y - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -CONFIG_OMAP_SMARTREFLEX_CLASS3=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 -CONFIG_OMAP_IOMMU=y -CONFIG_OMAP_IOMMU_DEBUG=m -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_PM_NONE is not set -CONFIG_OMAP_PM_NOOP=y - -# -# TI OMAP2/3/4 Specific Features -# -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set -CONFIG_SOC_OMAP3430=y -# CONFIG_SOC_OMAPTI816X is not set -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -CONFIG_MACH_OMAP3_BEAGLE=y -# CONFIG_MACH_DEVKIT8000 is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OMAP3530_LV_SOM is not set -# CONFIG_MACH_OMAP3_TORPEDO is not set -CONFIG_MACH_OVERO=y -CONFIG_MACH_OMAP3EVM=y -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_CRANEBOARD is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -CONFIG_MACH_OMAP3_TOUCHBOOK=y -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RM680 is not set -# CONFIG_MACH_NOKIA_RX51 is not set -CONFIG_MACH_OMAP_ZOOM2=y -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_CM_T3517 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_IGEP0030 is not set -# CONFIG_MACH_SBC3530 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# System MMU -# - -# -# Processor Type -# -CONFIG_CPU_V7=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_SWP_EMULATE is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_DMA_MEM_BUFFERABLE=y -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -# CONFIG_ARM_ERRATA_743622 is not set -# CONFIG_ARM_ERRATA_754322 is not set - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_VOLUNTARY=y -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -CONFIG_MIGRATION=y -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_NEED_PER_CPU_KM=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -# CONFIG_SECCOMP is not set -# CONFIG_CC_STACKPROTECTOR is not set -# CONFIG_DEPRECATED_PARAM_STRUCT is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y -# CONFIG_CRASH_DUMP is not set -CONFIG_AUTO_ZRELADDR=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_PM_SLEEP=y -CONFIG_PM_RUNTIME=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -# CONFIG_PM_ADVANCED_DEBUG is not set -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_CAN_PM_TRACE=y -# CONFIG_APM_EMULATION is not set -CONFIG_ARCH_HAS_OPP=y -CONFIG_PM_OPP=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_ROUTE_CLASSID=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE_DEMUX=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETWORK_PHY_TIMESTAMPING=y -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_ZONES=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CONNTRACK_TIMESTAMP=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_SNMP=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_CT=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_TEE=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_CPU=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -# CONFIG_IP_SET_BITMAP_IP is not set -# CONFIG_IP_SET_BITMAP_IPMAC is not set -# CONFIG_IP_SET_BITMAP_PORT is not set -# CONFIG_IP_SET_HASH_IP is not set -# CONFIG_IP_SET_HASH_IPPORT is not set -# CONFIG_IP_SET_HASH_IPPORTIP is not set -# CONFIG_IP_SET_HASH_IPPORTNET is not set -# CONFIG_IP_SET_HASH_NET is not set -# CONFIG_IP_SET_HASH_NETPORT is not set -# CONFIG_IP_SET_LIST_SET is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y -# CONFIG_IP_VS_PROTO_SCTP is not set - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m -CONFIG_IP_VS_NFCT=y -CONFIG_IP_VS_PE_SIP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV6=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_L2TP=m -CONFIG_L2TP_DEBUGFS=m -CONFIG_L2TP_V3=y -CONFIG_L2TP_IP=m -CONFIG_L2TP_ETH=m -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -# CONFIG_NET_SCH_SFB is not set -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m -CONFIG_NET_SCH_MQPRIO=m -CONFIG_NET_SCH_CHOKE=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -CONFIG_NET_CLS_CGROUP=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -CONFIG_CAN_SLCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=y -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=y -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_ATH3K=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -CONFIG_BT_MRVL=m -# CONFIG_BT_MRVL_SDIO is not set -CONFIG_BT_ATH3K=m -CONFIG_BT_WILINK=m -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -CONFIG_NL80211_TESTMODE=y -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_CFG80211_INTERNAL_REGDB is not set -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=y -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set -# CONFIG_CAIF is not set -CONFIG_CEPH_LIB=m -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -CONFIG_SM_FTL=m -# CONFIG_MTD_OOPS is not set -CONFIG_MTD_SWAP=m - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND_ECC=y -# CONFIG_MTD_NAND_ECC_SMC is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_BCH is not set -# CONFIG_MTD_SM_COMMON is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_BLK_DEV_RBD is not set -# CONFIG_SENSORS_LIS3LV02D is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -CONFIG_SENSORS_BH1780=m -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -CONFIG_HMC6352=m -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -CONFIG_BMP085=m -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=m -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set - -# -# Texas Instruments shared transport line discipline -# -CONFIG_TI_ST=m -# CONFIG_SENSORS_LIS3_SPI is not set -# CONFIG_SENSORS_LIS3_I2C is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -CONFIG_ISCSI_BOOT_SYSFS=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_RAID=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_DM_FLAKEY=m -CONFIG_TARGET_CORE=m -CONFIG_TCM_IBLOCK=m -CONFIG_TCM_FILEIO=m -CONFIG_TCM_PSCSI=m -CONFIG_LOOPBACK_TARGET=m -# CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_MACVTAP=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_MII=y -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -CONFIG_BCM63XX_PHY=m -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -CONFIG_MICREL_PHY=m -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -# CONFIG_AX88796 is not set -CONFIG_SMC91X=y -# CONFIG_TI_DAVINCI_EMAC is not set -CONFIG_TI_DAVINCI_MDIO=m -CONFIG_TI_DAVINCI_CPDMA=m -# CONFIG_DM9000 is not set -CONFIG_ENC28J60=y -# CONFIG_ENC28J60_WRITEVERIFY is not set -# CONFIG_ETHOC is not set -CONFIG_SMC911X=y -CONFIG_SMSC911X=y -# CONFIG_SMSC911X_ARCH_HOOKS is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -CONFIG_KS8842=m -CONFIG_KS8851=y -# CONFIG_KS8851_MLL is not set -# CONFIG_FTMAC100 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -CONFIG_B43=m -# CONFIG_B43_SDIO is not set -CONFIG_B43_PIO=y -CONFIG_B43_PHY_N=y -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -# CONFIG_LIBERTAS_MESH is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -# CONFIG_RT2800USB is not set -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_RTL8192CU=m -CONFIG_RTLWIFI=m -CONFIG_RTL8192C_COMMON=m -CONFIG_WL1251=m -CONFIG_WL1251_SPI=m -CONFIG_WL1251_SDIO=m -CONFIG_WL12XX_MENU=m -CONFIG_WL12XX=m -CONFIG_WL12XX_HT=y -CONFIG_WL12XX_SPI=m -CONFIG_WL12XX_SDIO=m -# CONFIG_WL12XX_SDIO_TEST is not set -CONFIG_WL12XX_PLATFORM_DATA=y -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -CONFIG_WIMAX_IWMC3200_SDIO=y -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=y -CONFIG_USB_KAWETH=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_RTL8150=y -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_CDC_NCM=m -CONFIG_USB_NET_DM9601=y -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_PLUSB=y -CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_NET_CX82310_ETH=m -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -CONFIG_USB_IPHETH=m -CONFIG_USB_SIERRA_NET=m -CONFIG_USB_VL600=m -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set - -# -# CAIF transport drivers -# -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPTP=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_QT1070=m -CONFIG_KEYBOARD_QT2160=m -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -CONFIG_KEYBOARD_MCS=m -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -CONFIG_INPUT_MISC=y -CONFIG_INPUT_AD714X=m -CONFIG_INPUT_AD714X_I2C=m -CONFIG_INPUT_AD714X_SPI=m -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_TWL4030_VIBRA=m -CONFIG_INPUT_UINPUT=y -CONFIG_INPUT_PCF8574=m -CONFIG_INPUT_PWM_BEEPER=m -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -CONFIG_INPUT_ADXL34X=m -CONFIG_INPUT_ADXL34X_I2C=m -CONFIG_INPUT_ADXL34X_SPI=m -CONFIG_INPUT_CMA3000=m -CONFIG_INPUT_CMA3000_I2C=m - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_N_GSM=m -CONFIG_DEVKMEM=y - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX3107 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_OMAP=y -CONFIG_SERIAL_OMAP_CONSOLE=y -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -CONFIG_SERIAL_IFX6X60=m -CONFIG_TTY_PRINTK=y -# CONFIG_HVC_DCC is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_RAMOOPS is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=m - -# -# Multiplexer I2C Chip support -# -CONFIG_I2C_MUX_GPIO=m -# CONFIG_I2C_MUX_PCA9541 is not set -# CONFIG_I2C_MUX_PCA954x is not set -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=m - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PXA_PCI is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -CONFIG_I2C_DIOLAN_U2C=m -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_OC_TINY is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set - -# -# PPS generators support -# -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_MAX730X=m - -# -# Memory mapped GPIO expanders: -# -# CONFIG_GPIO_BASIC_MMIO is not set -# CONFIG_GPIO_IT8761E is not set - -# -# I2C GPIO expanders: -# -CONFIG_GPIO_MAX7300=m -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_SX150X is not set -CONFIG_GPIO_TWL4030=y -CONFIG_GPIO_ADP5588=m - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_74X164 is not set - -# -# AC97 GPIO expanders: -# - -# -# MODULbus GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -CONFIG_TEST_POWER=m -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ20Z75 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_BATTERY_MAX17042=m -CONFIG_CHARGER_ISP1704=m -CONFIG_CHARGER_TWL4030=m -CONFIG_CHARGER_GPIO=m -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -CONFIG_SENSORS_ADT7411=m -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -CONFIG_SENSORS_ASC7621=m -# CONFIG_SENSORS_ATXP1 is not set -CONFIG_SENSORS_DS620=m -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -CONFIG_SENSORS_GPIO_FAN=m -# CONFIG_SENSORS_IT87 is not set -CONFIG_SENSORS_JC42=m -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -CONFIG_SENSORS_SMM665=m -# CONFIG_SENSORS_DME1737 is not set -CONFIG_SENSORS_EMC1403=m -CONFIG_SENSORS_EMC2103=m -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_ADS1015 is not set -# CONFIG_SENSORS_ADS7828 is not set -CONFIG_SENSORS_ADS7871=m -CONFIG_SENSORS_AMC6821=m -# CONFIG_SENSORS_THMC50 is not set -CONFIG_SENSORS_TMP102=m -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -CONFIG_SENSORS_TWL4030_MADC=m -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_BLOCKIO=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set -CONFIG_MFD_SUPPORT=y -CONFIG_MFD_CORE=y -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -CONFIG_TPS6105X=m -# CONFIG_TPS65010 is not set -CONFIG_TPS6507X=m -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_MADC=m -CONFIG_TWL4030_POWER=y -CONFIG_TWL4030_SCRIPT=y -CONFIG_TWL4030_CODEC=y -CONFIG_TWL4030_POWEROFF=y -CONFIG_TWL6030_PWM=m -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13XXX is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_EZX_PCAP is not set -CONFIG_MFD_TPS6586X=y -CONFIG_MFD_WL1273_CORE=m -CONFIG_MFD_OMAP_USB_HOST=y -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_DUMMY=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -CONFIG_REGULATOR_TPS6105X=m -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_TPS6586X=m -CONFIG_REGULATOR_TPS6524X=m -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_MEDIA_CONTROLLER=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_RC_CORE=m -CONFIG_LIRC=m -CONFIG_RC_MAP=m -CONFIG_IR_NEC_DECODER=m -CONFIG_IR_RC5_DECODER=m -CONFIG_IR_RC6_DECODER=m -CONFIG_IR_JVC_DECODER=m -CONFIG_IR_SONY_DECODER=m -CONFIG_IR_RC5_SZ_DECODER=m -CONFIG_IR_LIRC_CODEC=m -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_STREAMZAP is not set -CONFIG_RC_LOOPBACK=m -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y - -# -# Customize TV tuners -# -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_MEDIA_TUNER_TDA18218=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_V4L2_MEM2MEM_DEV=m -CONFIG_VIDEOBUF2_CORE=m -CONFIG_VIDEOBUF2_MEMOPS=m -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -CONFIG_VIDEO_ADV7180=m -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -CONFIG_VIDEO_OV7670=m -CONFIG_VIDEO_MT9P031=y -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_MT9V032=y -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=m -CONFIG_VIDEO_TVP5150=m -CONFIG_VIDEO_TVP7002=m -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_AK881X is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -CONFIG_VIDEO_VPSS_SYSTEM=m -CONFIG_VIDEO_VPFE_CAPTURE=y -CONFIG_VIDEO_DM6446_CCDC=m -CONFIG_VIDEO_OMAP2_VOUT=y -# CONFIG_VIDEO_CPIA2 is not set -CONFIG_VIDEO_TIMBERDALE=m -# CONFIG_VIDEO_AU0828 is not set -CONFIG_VIDEO_SR030PC30=m -CONFIG_VIDEO_NOON010PC30=m -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_DEBUG=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_BENQ=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_CPIA1=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -CONFIG_USB_GSPCA_KONICA=m -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_NW80X=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_OV534_9=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SN9C2028=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SPCA1528=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_SQ930X=m -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_VICAM=m -CONFIG_USB_GSPCA_XIRLINK_CIT=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_TLG2300=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_RC=y -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_USB_ET61X251=m -CONFIG_USB_SN9C102=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_TESTDEV=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -CONFIG_RADIO_SAA7706H=m -# CONFIG_RADIO_TEF6862 is not set -CONFIG_RADIO_WL1273=m - -# -# Texas Instruments WL128x FM driver (ST based) -# -CONFIG_RADIO_WL128X=m -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -CONFIG_DVB_USB_AZ6027=m -CONFIG_DVB_USB_LME2510=m -CONFIG_DVB_USB_TECHNISAT_USB2=m -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set - -# -# Multistandard (satellite) frontends -# -CONFIG_DVB_STB0899=m -CONFIG_DVB_STB6100=m -CONFIG_DVB_STV090x=m -CONFIG_DVB_STV6110x=m - -# -# DVB-S (satellite) frontends -# -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_DS3000=m - -# -# DVB-T (terrestrial) frontends -# -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m - -# -# DVB-C (cable) frontends -# -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m - -# -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends -# -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m - -# -# ISDB-T (terrestrial) frontends -# -CONFIG_DVB_S921=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_MB86A20S=m - -# -# Digital terrestrial only tuners/PLL -# -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_TUNER_DIB0090=m - -# -# SEC control devices for DVB-S -# -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GXX=m -CONFIG_DVB_ATBM8830=m -CONFIG_DVB_IX2505V=m - -# -# Tools to develop new frontends -# -# CONFIG_DVB_DUMMY_FE is not set - -# -# Graphics support -# -CONFIG_DRM=m -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -# CONFIG_FB_WMT_GE_ROPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -CONFIG_FB_UDL=m -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set -CONFIG_OMAP2_DSS_DPI=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -CONFIG_FB_OMAP2_NUM_FBS=2 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC_DPI=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -CONFIG_PANEL_NEC_NL8048HL11_01B=y -# CONFIG_PANEL_TAAL is not set -CONFIG_PANEL_TPO_TD043MTEA1=m -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_UA101=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_USB_6FIRE=m -CONFIG_SND_SOC=y -CONFIG_SND_SOC_CACHE_LZO=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OVERO=y -CONFIG_SND_OMAP_SOC_OMAP3EVM=y -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -CONFIG_SND_OMAP_SOC_ZOOM2=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_3M_PCT is not set -CONFIG_HID_A4TECH=y -CONFIG_HID_ACRUX=m -# CONFIG_HID_ACRUX_FF is not set -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -# CONFIG_HID_CANDO is not set -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -# CONFIG_HID_PRODIKEYS is not set -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EMS_FF=m -# CONFIG_HID_ELECOM is not set -CONFIG_HID_EZKEY=y -CONFIG_HID_KEYTOUCH=m -# CONFIG_HID_KYE is not set -CONFIG_HID_UCLOGIC=m -CONFIG_HID_WALTOP=m -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LCPOWER=m -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWII_FF is not set -CONFIG_HID_MAGICMOUSE=m -CONFIG_HID_MICROSOFT=y -# CONFIG_HID_MOSART is not set -CONFIG_HID_MONTEREY=y -CONFIG_HID_MULTITOUCH=m -CONFIG_HID_NTRIG=y -# CONFIG_HID_ORTEK is not set -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_PICOLCD=m -CONFIG_HID_PICOLCD_FB=y -CONFIG_HID_PICOLCD_BACKLIGHT=y -CONFIG_HID_PICOLCD_LEDS=y -CONFIG_HID_QUANTA=m -CONFIG_HID_ROCCAT=m -CONFIG_HID_ROCCAT_COMMON=m -CONFIG_HID_ROCCAT_ARVO=m -CONFIG_HID_ROCCAT_KONE=m -CONFIG_HID_ROCCAT_KONEPLUS=m -CONFIG_HID_ROCCAT_KOVAPLUS=m -# CONFIG_HID_ROCCAT_PYRA is not set -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_STANTUM=m -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -CONFIG_USB_EHCI_HCD_OMAP=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_TUSB6010 is not set -CONFIG_USB_MUSB_OMAP2PLUS=y -# CONFIG_USB_MUSB_AM35X is not set -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_MUSB_DEBUG is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -CONFIG_USB_STORAGE_REALTEK=m -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -CONFIG_USB_STORAGE_ENE_UB6250=m -CONFIG_USB_UAS=m -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QCAUX=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SAMBA=m -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -CONFIG_USB_SERIAL_CYBERJACK=m -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OPTION is not set -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m -CONFIG_USB_SERIAL_ZIO=m -CONFIG_USB_SERIAL_SSU100=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_YUREX=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=480 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_FUSB300 is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA_U2O is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -CONFIG_USB_G_NCM=m -# CONFIG_USB_GADGETFS is not set -CONFIG_USB_FUNCTIONFS=m -# CONFIG_USB_FUNCTIONFS_ETH is not set -CONFIG_USB_FUNCTIONFS_RNDIS=y -# CONFIG_USB_FUNCTIONFS_GENERIC is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set -CONFIG_USB_G_HID=m -CONFIG_USB_G_DBGP=m -# CONFIG_USB_G_DBGP_PRINTK is not set -CONFIG_USB_G_DBGP_SERIAL=y -CONFIG_USB_G_WEBCAM=m - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_TWL6030_USB=m -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y -# CONFIG_MMC_CLKGATE is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=8 -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -CONFIG_MMC_SPI=m -# CONFIG_MMC_DW is not set -CONFIG_MMC_USHC=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -CONFIG_LEDS_LP5521=m -CONFIG_LEDS_LP5523=m -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -CONFIG_LEDS_PWM=m -CONFIG_LEDS_REGULATOR=m -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -CONFIG_LEDS_TRIGGERS=y - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -CONFIG_NFC_DEVICES=y -CONFIG_PN544_NFC=m -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=y -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS3232 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_BQ32K=m -CONFIG_RTC_DRV_TWL4030=m -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -CONFIG_TIMB_DMA=m -CONFIG_DMA_ENGINE=y -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_VIDEO_TM6000 is not set -# CONFIG_USB_IP_COMMON is not set -CONFIG_W35UND=m -CONFIG_PRISM2_USB=m -CONFIG_ECHO=m -CONFIG_BRCM80211=m -CONFIG_BRCMFMAC=y -# CONFIG_BRCMDBG is not set -CONFIG_RT2870=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -CONFIG_R8712U=m -CONFIG_R8712_AP=y -# CONFIG_TRANZPORT is not set -# CONFIG_POHMELFS is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_IIO is not set -CONFIG_XVMALLOC=y -CONFIG_ZRAM=m -# CONFIG_ZRAM_DEBUG is not set -# CONFIG_FB_SM7XX is not set -# CONFIG_LIRC_STAGING is not set -# CONFIG_EASYCAP is not set -# CONFIG_TIDSPBRIDGE is not set -# CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set -CONFIG_MACH_NO_WESTBRIDGE=y -# CONFIG_ATH6K_LEGACY is not set -CONFIG_USB_ENESTORAGE=m -CONFIG_BCM_WIMAX=m -CONFIG_FT1000=m -CONFIG_FT1000_USB=m - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set -CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m -CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m - -# -# Altera FPGA firmware download module -# -# CONFIG_ALTERA_STAPL is not set -CONFIG_CLKDEV_LOOKUP=y - -# -# File systems -# -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -CONFIG_JFS_STATISTICS=y -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_POSIX_ACL=y -CONFIG_XFS_RT=y -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -CONFIG_GFS2_FS_LOCKING_DLM=y -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -CONFIG_NILFS2_FS=m -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=m -CONFIG_CUSE=m -CONFIG_GENERIC_ACL=y - -# -# Caches -# -CONFIG_FSCACHE=m -CONFIG_FSCACHE_STATS=y -CONFIG_FSCACHE_HISTOGRAM=y -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_FSCACHE_OBJECT_LIST is not set -CONFIG_CACHEFILES=m -# CONFIG_CACHEFILES_DEBUG is not set -CONFIG_CACHEFILES_HISTOGRAM=y - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_UNION_FS=m -CONFIG_UNION_FS_XATTR=y -# CONFIG_UNION_FS_DEBUG is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_LOGFS=m -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_XATTR is not set -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_PSTORE=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NFS_V4_1=y -CONFIG_PNFS_FILE_LAYOUT=y -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -# CONFIG_NFS_USE_NEW_IDMAPPER is not set -CONFIG_NFSD=m -CONFIG_NFSD_DEPRECATED=y -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_ACL_SUPPORT=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_CEPH_FS=m -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -# CONFIG_CIFS_DEBUG2 is not set -CONFIG_CIFS_DFS_UPCALL=y -CONFIG_CIFS_FSCACHE=y -CONFIG_CIFS_ACL=y -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -# CONFIG_AFS_FSCACHE is not set -CONFIG_9P_FS=m -CONFIG_9P_FSCACHE=y -CONFIG_9P_FS_POSIX_ACL=y - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_HARDLOCKUP_DETECTOR is not set -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_LKDTM is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_DEBUG_PAGEALLOC is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_RING_BUFFER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_ASYNC_RAID6_TEST is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_STRICT_DEVMEM is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_USER_API=m -CONFIG_CRYPTO_USER_API_HASH=m -CONFIG_CRYPTO_USER_API_SKCIPHER=m -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_OMAP_SHAM=m -CONFIG_CRYPTO_DEV_OMAP_AES=m -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_TEST=m -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_BTREE=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y -CONFIG_AVERAGE=y diff --git a/recipes-kernel/linux/linux-omap-2.6.39/camera/0001-Add-driver-for-Aptina-Micron-mt9p031-sensor.patch b/recipes-kernel/linux/linux-omap-2.6.39/camera/0001-Add-driver-for-Aptina-Micron-mt9p031-sensor.patch deleted file mode 100644 index cf9e116..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/camera/0001-Add-driver-for-Aptina-Micron-mt9p031-sensor.patch +++ /dev/null @@ -1,859 +0,0 @@ -From e630a914bf14bf190feaf4a2cc57f6b27c4024e1 Mon Sep 17 00:00:00 2001 -From: Javier Martin <javier.martin@vista-silicon.com> -Date: Wed, 1 Jun 2011 17:36:48 +0200 -Subject: [PATCH 1/3] Add driver for Aptina (Micron) mt9p031 sensor. - -Clock frequency of 57MHz used in previous version was wrong since -when VDD_IO is 1.8V it can only support 48MHz. - -Two new platform flags have been added: - -- vdd_io: indicates whether the chip is powered with 1.8 or 2.8 VDD_IO. -So that it can use the maximum allowed frequency. -- version: monochrome and color versions of the chip have exactly -the same ID, so the only way to select one of them is through -platform data. - -Internal PLL is now used to generate PIXCLK depending on VDD_IO. - -Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> ---- - drivers/media/video/Kconfig | 7 + - drivers/media/video/Makefile | 1 + - drivers/media/video/mt9p031.c | 763 +++++++++++++++++++++++++++++++++++++++++ - include/media/mt9p031.h | 23 ++ - 4 files changed, 794 insertions(+), 0 deletions(-) - create mode 100644 drivers/media/video/mt9p031.c - create mode 100644 include/media/mt9p031.h - -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index 00f51dd..cb87e35 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -329,6 +329,13 @@ config VIDEO_OV7670 - OV7670 VGA camera. It currently only works with the M88ALP01 - controller. - -+config VIDEO_MT9P031 -+ tristate "Aptina MT9P031 support" -+ depends on I2C && VIDEO_V4L2 -+ ---help--- -+ This is a Video4Linux2 sensor-level driver for the Aptina -+ (Micron) mt9p031 5 Mpixel camera. -+ - config VIDEO_MT9V011 - tristate "Micron mt9v011 sensor support" - depends on I2C && VIDEO_V4L2 -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index ace5d8b..912b29b 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -65,6 +65,7 @@ obj-$(CONFIG_VIDEO_UPD64083) += upd64083.o - obj-$(CONFIG_VIDEO_OV7670) += ov7670.o - obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o - obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o -+obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o - obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o - obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o - obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o -diff --git a/drivers/media/video/mt9p031.c b/drivers/media/video/mt9p031.c -new file mode 100644 -index 0000000..cd830b1 ---- /dev/null -+++ b/drivers/media/video/mt9p031.c -@@ -0,0 +1,763 @@ -+/* -+ * Driver for MT9P031 CMOS Image Sensor from Aptina -+ * -+ * Copyright (C) 2011, Javier Martin <javier.martin@vista-silicon.com> -+ * -+ * Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de> -+ * -+ * Based on the MT9V032 driver and Bastian Hecht's code. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/delay.h> -+#include <linux/device.h> -+#include <linux/i2c.h> -+#include <linux/log2.h> -+#include <linux/pm.h> -+#include <linux/slab.h> -+#include <media/v4l2-subdev.h> -+#include <linux/videodev2.h> -+ -+#include <media/mt9p031.h> -+#include <media/v4l2-chip-ident.h> -+#include <media/v4l2-subdev.h> -+#include <media/v4l2-device.h> -+ -+#define MT9P031_EXTCLK_FREQ 20000000 -+ -+#define MT9P031_CHIP_VERSION 0x00 -+#define MT9P031_CHIP_VERSION_VALUE 0x1801 -+#define MT9P031_ROW_START 0x01 -+#define MT9P031_ROW_START_MIN 1 -+#define MT9P031_ROW_START_MAX 2004 -+#define MT9P031_ROW_START_DEF 54 -+#define MT9P031_COLUMN_START 0x02 -+#define MT9P031_COLUMN_START_MIN 1 -+#define MT9P031_COLUMN_START_MAX 2750 -+#define MT9P031_COLUMN_START_DEF 16 -+#define MT9P031_WINDOW_HEIGHT 0x03 -+#define MT9P031_WINDOW_HEIGHT_MIN 2 -+#define MT9P031_WINDOW_HEIGHT_MAX 2003 -+#define MT9P031_WINDOW_HEIGHT_DEF 2003 -+#define MT9P031_WINDOW_WIDTH 0x04 -+#define MT9P031_WINDOW_WIDTH_MIN 18 -+#define MT9P031_WINDOW_WIDTH_MAX 2751 -+#define MT9P031_WINDOW_WIDTH_DEF 2751 -+#define MT9P031_H_BLANKING 0x05 -+#define MT9P031_H_BLANKING_VALUE 0 -+#define MT9P031_V_BLANKING 0x06 -+#define MT9P031_V_BLANKING_VALUE 25 -+#define MT9P031_OUTPUT_CONTROL 0x07 -+#define MT9P031_OUTPUT_CONTROL_CEN 2 -+#define MT9P031_OUTPUT_CONTROL_SYN 1 -+#define MT9P031_SHUTTER_WIDTH_UPPER 0x08 -+#define MT9P031_SHUTTER_WIDTH 0x09 -+#define MT9P031_PLL_CONTROL 0x10 -+#define MT9P031_PLL_CONTROL_PWROFF 0x0050 -+#define MT9P031_PLL_CONTROL_PWRON 0x0051 -+#define MT9P031_PLL_CONTROL_USEPLL 0x0052 -+#define MT9P031_PLL_CONFIG_1 0x11 -+#define MT9P031_PLL_CONFIG_1_M_48MHZ 0x5000 -+#define MT9P031_PLL_CONFIG_1_N_48MHZ 0x05 -+#define MT9P031_PLL_CONFIG_1_M_96MHZ 0x3600 -+#define MT9P031_PLL_CONFIG_1_N_96MHZ 0x05 -+#define MT9P031_PLL_CONFIG_2 0x12 -+#define MT9P031_PLL_CONFIG_2_P1_48MHZ 5 -+#define MT9P031_PLL_CONFIG_2_P1_96MHZ 2 -+#define MT9P031_PIXEL_CLOCK_CONTROL 0x0a -+#define MT9P031_FRAME_RESTART 0x0b -+#define MT9P031_SHUTTER_DELAY 0x0c -+#define MT9P031_RST 0x0d -+#define MT9P031_RST_ENABLE 1 -+#define MT9P031_RST_DISABLE 0 -+#define MT9P031_READ_MODE_1 0x1e -+#define MT9P031_READ_MODE_2 0x20 -+#define MT9P031_READ_MODE_2_ROW_MIR 0x8000 -+#define MT9P031_READ_MODE_2_COL_MIR 0x4000 -+#define MT9P031_ROW_ADDRESS_MODE 0x22 -+#define MT9P031_COLUMN_ADDRESS_MODE 0x23 -+#define MT9P031_GLOBAL_GAIN 0x35 -+ -+struct mt9p031 { -+ struct v4l2_subdev subdev; -+ struct media_pad pad; -+ struct v4l2_rect rect; /* Sensor window */ -+ struct v4l2_mbus_framefmt format; -+ struct mt9p031_platform_data *pdata; -+ struct mutex power_lock; /* lock to protect power_count */ -+ int power_count; -+ u16 xskip; -+ u16 yskip; -+ /* cache register values */ -+ u16 output_control; -+}; -+ -+static struct mt9p031 *to_mt9p031(const struct i2c_client *client) -+{ -+ return container_of(i2c_get_clientdata(client), struct mt9p031, subdev); -+} -+ -+static int reg_read(struct i2c_client *client, const u8 reg) -+{ -+ s32 data = i2c_smbus_read_word_data(client, reg); -+ return data < 0 ? data : swab16(data); -+} -+ -+static int reg_write(struct i2c_client *client, const u8 reg, -+ const u16 data) -+{ -+ return i2c_smbus_write_word_data(client, reg, swab16(data)); -+} -+ -+static int mt9p031_set_output_control(struct mt9p031 *mt9p031, u16 clear, -+ u16 set) -+{ -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); -+ u16 value = (mt9p031->output_control & ~clear) | set; -+ int ret; -+ -+ ret = reg_write(client, MT9P031_OUTPUT_CONTROL, value); -+ if (ret < 0) -+ return ret; -+ mt9p031->output_control = value; -+ return 0; -+} -+ -+static int mt9p031_reset(struct i2c_client *client) -+{ -+ struct mt9p031 *mt9p031 = to_mt9p031(client); -+ int ret; -+ -+ /* Disable chip output, synchronous option update */ -+ ret = reg_write(client, MT9P031_RST, MT9P031_RST_ENABLE); -+ if (ret < 0) -+ return ret; -+ ret = reg_write(client, MT9P031_RST, MT9P031_RST_DISABLE); -+ if (ret < 0) -+ return ret; -+ return mt9p031_set_output_control(mt9p031, -+ MT9P031_OUTPUT_CONTROL_CEN, 0); -+} -+ -+static int mt9p031_power_on(struct mt9p031 *mt9p031) -+{ -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); -+ int ret; -+ -+ /* Ensure RESET_BAR is low */ -+ if (mt9p031->pdata->reset) { -+ mt9p031->pdata->reset(&mt9p031->subdev, 1); -+ msleep(1); -+ } -+ /* Emable clock */ -+ if (mt9p031->pdata->set_xclk) -+ mt9p031->pdata->set_xclk(&mt9p031->subdev, MT9P031_EXTCLK_FREQ); -+ /* Now RESET_BAR must be high */ -+ if (mt9p031->pdata->reset) { -+ mt9p031->pdata->reset(&mt9p031->subdev, 0); -+ msleep(1); -+ } -+ /* soft reset */ -+ ret = mt9p031_reset(client); -+ if (ret < 0) { -+ dev_err(&client->dev, "Failed to reset the camera\n"); -+ return ret; -+ } -+ return 0; -+} -+ -+static void mt9p031_power_off(struct mt9p031 *mt9p031) -+{ -+ if (mt9p031->pdata->reset) { -+ mt9p031->pdata->reset(&mt9p031->subdev, 1); -+ msleep(1); -+ } -+ if (mt9p031->pdata->set_xclk) -+ mt9p031->pdata->set_xclk(&mt9p031->subdev, 0); -+} -+ -+static int mt9p031_enum_mbus_code(struct v4l2_subdev *sd, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_mbus_code_enum *code) -+{ -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ -+ if (code->pad || code->index) -+ return -EINVAL; -+ -+ code->code = mt9p031->format.code; -+ return 0; -+} -+ -+static struct v4l2_mbus_framefmt *mt9p031_get_pad_format( -+ struct mt9p031 *mt9p031, -+ struct v4l2_subdev_fh *fh, -+ unsigned int pad, u32 which) -+{ -+ switch (which) { -+ case V4L2_SUBDEV_FORMAT_TRY: -+ return v4l2_subdev_get_try_format(fh, pad); -+ case V4L2_SUBDEV_FORMAT_ACTIVE: -+ return &mt9p031->format; -+ default: -+ return NULL; -+ } -+} -+ -+static struct v4l2_rect *mt9p031_get_pad_crop(struct mt9p031 *mt9p031, -+ struct v4l2_subdev_fh *fh, unsigned int pad, u32 which) -+{ -+ switch (which) { -+ case V4L2_SUBDEV_FORMAT_TRY: -+ return v4l2_subdev_get_try_crop(fh, pad); -+ case V4L2_SUBDEV_FORMAT_ACTIVE: -+ return &mt9p031->rect; -+ default: -+ return NULL; -+ } -+} -+ -+static int mt9p031_get_crop(struct v4l2_subdev *sd, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_crop *crop) -+{ -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ struct v4l2_rect *rect = mt9p031_get_pad_crop(mt9p031, fh, crop->pad, -+ crop->which); -+ if (!rect) -+ return -EINVAL; -+ -+ crop->rect = *rect; -+ -+ return 0; -+} -+ -+static u16 mt9p031_skip_for_crop(s32 source, s32 *target, s32 max_skip) -+{ -+ unsigned int skip; -+ -+ if (source - source / 4 < *target) { -+ *target = source; -+ return 1; -+ } -+ -+ skip = DIV_ROUND_CLOSEST(source, *target); -+ if (skip > max_skip) -+ skip = max_skip; -+ *target = 2 * DIV_ROUND_UP(source, 2 * skip); -+ -+ return skip; -+} -+ -+static int mt9p031_set_params(struct i2c_client *client, -+ struct v4l2_rect *rect, u16 xskip, u16 yskip) -+{ -+ struct mt9p031 *mt9p031 = to_mt9p031(client); -+ int ret; -+ u16 xbin, ybin; -+ const u16 hblank = MT9P031_H_BLANKING_VALUE, -+ vblank = MT9P031_V_BLANKING_VALUE; -+ __s32 left; -+ -+ /* -+ * TODO: Attention! When implementing horizontal flipping, adjust -+ * alignment according to R2 "Column Start" description in the datasheet -+ */ -+ if (xskip & 1) { -+ xbin = 1; -+ left = rect->left & (~3); -+ } else if (xskip & 2) { -+ xbin = 2; -+ left = rect->left & (~7); -+ } else { -+ xbin = 4; -+ left = rect->left & (~15); -+ } -+ ybin = min(yskip, (u16)4); -+ -+ /* Disable register update, reconfigure atomically */ -+ ret = mt9p031_set_output_control(mt9p031, 0, -+ MT9P031_OUTPUT_CONTROL_SYN); -+ if (ret < 0) -+ return ret; -+ -+ dev_dbg(&client->dev, "skip %u:%u, rect %ux%u@%u:%u\n", -+ xskip, yskip, rect->width, rect->height, rect->left, rect->top); -+ -+ /* Blanking and start values - default... */ -+ ret = reg_write(client, MT9P031_H_BLANKING, hblank); -+ if (ret < 0) -+ return ret; -+ ret = reg_write(client, MT9P031_V_BLANKING, vblank); -+ if (ret < 0) -+ return ret; -+ -+ ret = reg_write(client, MT9P031_COLUMN_ADDRESS_MODE, -+ ((xbin - 1) << 4) | (xskip - 1)); -+ if (ret < 0) -+ return ret; -+ ret = reg_write(client, MT9P031_ROW_ADDRESS_MODE, -+ ((ybin - 1) << 4) | (yskip - 1)); -+ if (ret < 0) -+ return ret; -+ -+ dev_dbg(&client->dev, "new physical left %u, top %u\n", -+ rect->left, rect->top); -+ -+ ret = reg_write(client, MT9P031_COLUMN_START, -+ rect->left); -+ if (ret < 0) -+ return ret; -+ ret = reg_write(client, MT9P031_ROW_START, -+ rect->top); -+ if (ret < 0) -+ return ret; -+ -+ ret = reg_write(client, MT9P031_WINDOW_WIDTH, -+ rect->width - 1); -+ if (ret < 0) -+ return ret; -+ ret = reg_write(client, MT9P031_WINDOW_HEIGHT, -+ rect->height - 1); -+ if (ret < 0) -+ return ret; -+ -+ /* Re-enable register update, commit all changes */ -+ ret = mt9p031_set_output_control(mt9p031, -+ MT9P031_OUTPUT_CONTROL_SYN, 0); -+ if (ret < 0) -+ return ret; -+ -+ mt9p031->xskip = xskip; -+ mt9p031->yskip = yskip; -+ return ret; -+} -+ -+static int mt9p031_set_crop(struct v4l2_subdev *sd, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_crop *crop) -+{ -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ struct v4l2_mbus_framefmt *f; -+ struct v4l2_rect *c; -+ struct v4l2_rect rect; -+ u16 xskip, yskip; -+ s32 width, height; -+ -+ dev_dbg(mt9p031->subdev.v4l2_dev->dev, "%s(%ux%u@%u:%u : %u)\n", -+ __func__, crop->rect.width, crop->rect.height, -+ crop->rect.left, crop->rect.top, crop->which); -+ -+ /* -+ * Clamp the crop rectangle boundaries and align them to a multiple of 2 -+ * pixels. -+ */ -+ rect.width = ALIGN(clamp(crop->rect.width, -+ MT9P031_WINDOW_WIDTH_MIN, -+ MT9P031_WINDOW_WIDTH_MAX), 2); -+ rect.height = ALIGN(clamp(crop->rect.height, -+ MT9P031_WINDOW_HEIGHT_MIN, -+ MT9P031_WINDOW_HEIGHT_MAX), 2); -+ rect.left = ALIGN(clamp(crop->rect.left, -+ MT9P031_COLUMN_START_MIN, -+ MT9P031_COLUMN_START_MAX), 2); -+ rect.top = ALIGN(clamp(crop->rect.top, -+ MT9P031_ROW_START_MIN, -+ MT9P031_ROW_START_MAX), 2); -+ -+ c = mt9p031_get_pad_crop(mt9p031, fh, crop->pad, crop->which); -+ -+ if (rect.width != c->width || rect.height != c->height) { -+ /* -+ * Reset the output image size if the crop rectangle size has -+ * been modified. -+ */ -+ f = mt9p031_get_pad_format(mt9p031, fh, crop->pad, -+ crop->which); -+ width = f->width; -+ height = f->height; -+ -+ xskip = mt9p031_skip_for_crop(rect.width, &width, 7); -+ yskip = mt9p031_skip_for_crop(rect.height, &height, 8); -+ } else { -+ xskip = mt9p031->xskip; -+ yskip = mt9p031->yskip; -+ f = NULL; -+ } -+ if (f) { -+ f->width = width; -+ f->height = height; -+ } -+ -+ *c = rect; -+ crop->rect = rect; -+ -+ mt9p031->xskip = xskip; -+ mt9p031->yskip = yskip; -+ mt9p031->rect = *c; -+ return 0; -+} -+ -+static int mt9p031_get_format(struct v4l2_subdev *sd, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_format *fmt) -+{ -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ -+ fmt->format = -+ *mt9p031_get_pad_format(mt9p031, fh, fmt->pad, fmt->which); -+ return 0; -+} -+ -+static u16 mt9p031_skip_for_scale(s32 *source, s32 target, -+ s32 max_skip, s32 max) -+{ -+ unsigned int skip; -+ -+ if (*source - *source / 4 < target) { -+ *source = target; -+ return 1; -+ } -+ -+ skip = min(max, *source + target / 2) / target; -+ if (skip > max_skip) -+ skip = max_skip; -+ *source = target * skip; -+ -+ return skip; -+} -+ -+static int mt9p031_set_format(struct v4l2_subdev *sd, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_format *format) -+{ -+ struct v4l2_mbus_framefmt *__format; -+ struct v4l2_rect *__crop, rect; -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ unsigned int width; -+ unsigned int height; -+ u16 xskip, yskip; -+ -+ __crop = mt9p031_get_pad_crop(mt9p031, fh, format->pad, format->which); -+ -+ width = clamp_t(int, ALIGN(format->format.width, 2), 2, -+ MT9P031_WINDOW_WIDTH_MAX); -+ height = clamp_t(int, ALIGN(format->format.height, 2), 2, -+ MT9P031_WINDOW_HEIGHT_MAX); -+ -+ rect.width = __crop->width; -+ rect.height = __crop->height; -+ -+ xskip = mt9p031_skip_for_scale(&rect.width, width, 7, -+ MT9P031_WINDOW_WIDTH_MAX); -+ if (rect.width + __crop->left > MT9P031_WINDOW_WIDTH_MAX) -+ rect.left = (MT9P031_WINDOW_WIDTH_MAX - rect.width) / 2; -+ else -+ rect.left = __crop->left; -+ yskip = mt9p031_skip_for_scale(&rect.height, height, 8, -+ MT9P031_WINDOW_HEIGHT_MAX); -+ if (rect.height + __crop->top > MT9P031_WINDOW_HEIGHT_MAX) -+ rect.top = (MT9P031_WINDOW_HEIGHT_MAX - rect.height) / 2; -+ else -+ rect.top = __crop->top; -+ -+ dev_dbg(mt9p031->subdev.v4l2_dev->dev, "%s(%ux%u : %u)\n", __func__, -+ width, height, format->which); -+ if (__crop) -+ *__crop = rect; -+ -+ __format = mt9p031_get_pad_format(mt9p031, fh, format->pad, -+ format->which); -+ __format->width = width; -+ __format->height = height; -+ format->format = *__format; -+ -+ mt9p031->xskip = xskip; -+ mt9p031->yskip = yskip; -+ mt9p031->rect = *__crop; -+ return 0; -+} -+ -+static int mt9p031_pll_enable(struct i2c_client *client) -+{ -+ struct mt9p031 *mt9p031 = to_mt9p031(client); -+ int ret; -+ -+ ret = reg_write(client, MT9P031_PLL_CONTROL, MT9P031_PLL_CONTROL_PWRON); -+ if (ret < 0) -+ return ret; -+ -+ /* Always set the maximum frequency allowed by VDD_IO */ -+ if (mt9p031->pdata->vdd_io == MT9P031_VDD_IO_2V8) { -+ ret = reg_write(client, MT9P031_PLL_CONFIG_1, -+ MT9P031_PLL_CONFIG_1_M_96MHZ | -+ MT9P031_PLL_CONFIG_1_N_96MHZ); -+ if (ret < 0) -+ return ret; -+ ret = reg_write(client, MT9P031_PLL_CONFIG_2, -+ MT9P031_PLL_CONFIG_2_P1_96MHZ); -+ if (ret < 0) -+ return ret; -+ } else { -+ ret = reg_write(client, MT9P031_PLL_CONFIG_1, -+ MT9P031_PLL_CONFIG_1_M_48MHZ | -+ MT9P031_PLL_CONFIG_1_N_48MHZ); -+ if (ret < 0) -+ return ret; -+ ret = reg_write(client, MT9P031_PLL_CONFIG_2, -+ MT9P031_PLL_CONFIG_2_P1_48MHZ); -+ if (ret < 0) -+ return ret; -+ } -+ mdelay(1); -+ ret = reg_write(client, MT9P031_PLL_CONTROL, -+ MT9P031_PLL_CONTROL_PWRON | -+ MT9P031_PLL_CONTROL_USEPLL); -+ mdelay(1); -+ return ret; -+} -+ -+static inline int mt9p031_pll_disable(struct i2c_client *client) -+{ -+ return reg_write(client, MT9P031_PLL_CONTROL, -+ MT9P031_PLL_CONTROL_PWROFF); -+} -+ -+static int mt9p031_s_stream(struct v4l2_subdev *sd, int enable) -+{ -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); -+ struct v4l2_rect rect = mt9p031->rect; -+ u16 xskip = mt9p031->xskip; -+ u16 yskip = mt9p031->yskip; -+ int ret; -+ -+ if (enable) { -+ ret = mt9p031_set_params(client, &rect, xskip, yskip); -+ if (ret < 0) -+ return ret; -+ /* Switch to master "normal" mode */ -+ ret = mt9p031_set_output_control(mt9p031, 0, -+ MT9P031_OUTPUT_CONTROL_CEN); -+ if (ret < 0) -+ return ret; -+ ret = mt9p031_pll_enable(client); -+ } else { -+ /* Stop sensor readout */ -+ ret = mt9p031_set_output_control(mt9p031, -+ MT9P031_OUTPUT_CONTROL_CEN, 0); -+ if (ret < 0) -+ return ret; -+ ret = mt9p031_pll_disable(client); -+ } -+ return ret; -+} -+ -+static int mt9p031_video_probe(struct i2c_client *client) -+{ -+ s32 data; -+ -+ /* Read out the chip version register */ -+ data = reg_read(client, MT9P031_CHIP_VERSION); -+ if (data != MT9P031_CHIP_VERSION_VALUE) { -+ dev_err(&client->dev, -+ "No MT9P031 chip detected, register read %x\n", data); -+ return -ENODEV; -+ } -+ -+ dev_info(&client->dev, "Detected a MT9P031 chip ID %x\n", data); -+ -+ return 0; -+} -+ -+static int mt9p031_set_power(struct v4l2_subdev *sd, int on) -+{ -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ int ret = 0; -+ -+ mutex_lock(&mt9p031->power_lock); -+ -+ /* -+ * If the power count is modified from 0 to != 0 or from != 0 to 0, -+ * update the power state. -+ */ -+ if (mt9p031->power_count == !on) { -+ if (on) { -+ ret = mt9p031_power_on(mt9p031); -+ if (ret) { -+ dev_err(mt9p031->subdev.v4l2_dev->dev, -+ "Failed to power on: %d\n", ret); -+ goto out; -+ } -+ } else { -+ mt9p031_power_off(mt9p031); -+ } -+ } -+ -+ /* Update the power count. */ -+ mt9p031->power_count += on ? 1 : -1; -+ WARN_ON(mt9p031->power_count < 0); -+ -+out: -+ mutex_unlock(&mt9p031->power_lock); -+ return ret; -+} -+ -+static int mt9p031_registered(struct v4l2_subdev *sd) -+{ -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); -+ int ret; -+ -+ ret = mt9p031_set_power(&mt9p031->subdev, 1); -+ if (ret) { -+ dev_err(&client->dev, -+ "Failed to power on device: %d\n", ret); -+ return ret; -+ } -+ -+ ret = mt9p031_video_probe(client); -+ -+ mt9p031_set_power(&mt9p031->subdev, 0); -+ -+ return ret; -+} -+ -+static int mt9p031_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) -+{ -+ struct mt9p031 *mt9p031; -+ mt9p031 = container_of(sd, struct mt9p031, subdev); -+ -+ mt9p031->rect.width = MT9P031_WINDOW_WIDTH_DEF; -+ mt9p031->rect.height = MT9P031_WINDOW_HEIGHT_DEF; -+ mt9p031->rect.left = MT9P031_COLUMN_START_DEF; -+ mt9p031->rect.top = MT9P031_ROW_START_DEF; -+ -+ if (mt9p031->pdata->version == MT9P031_MONOCHROME_VERSION) -+ mt9p031->format.code = V4L2_MBUS_FMT_Y12_1X12; -+ else -+ mt9p031->format.code = V4L2_MBUS_FMT_SGRBG12_1X12; -+ -+ mt9p031->format.width = MT9P031_WINDOW_WIDTH_DEF; -+ mt9p031->format.height = MT9P031_WINDOW_HEIGHT_DEF; -+ mt9p031->format.field = V4L2_FIELD_NONE; -+ mt9p031->format.colorspace = V4L2_COLORSPACE_SRGB; -+ -+ mt9p031->xskip = 1; -+ mt9p031->yskip = 1; -+ return mt9p031_set_power(sd, 1); -+} -+ -+static int mt9p031_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) -+{ -+ return mt9p031_set_power(sd, 0); -+} -+ -+static struct v4l2_subdev_core_ops mt9p031_subdev_core_ops = { -+ .s_power = mt9p031_set_power, -+}; -+ -+static struct v4l2_subdev_video_ops mt9p031_subdev_video_ops = { -+ .s_stream = mt9p031_s_stream, -+}; -+ -+static struct v4l2_subdev_pad_ops mt9p031_subdev_pad_ops = { -+ .enum_mbus_code = mt9p031_enum_mbus_code, -+ .get_fmt = mt9p031_get_format, -+ .set_fmt = mt9p031_set_format, -+ .get_crop = mt9p031_get_crop, -+ .set_crop = mt9p031_set_crop, -+}; -+ -+static struct v4l2_subdev_ops mt9p031_subdev_ops = { -+ .core = &mt9p031_subdev_core_ops, -+ .video = &mt9p031_subdev_video_ops, -+ .pad = &mt9p031_subdev_pad_ops, -+}; -+ -+static const struct v4l2_subdev_internal_ops mt9p031_subdev_internal_ops = { -+ .registered = mt9p031_registered, -+ .open = mt9p031_open, -+ .close = mt9p031_close, -+}; -+ -+static int mt9p031_probe(struct i2c_client *client, -+ const struct i2c_device_id *did) -+{ -+ int ret; -+ struct mt9p031 *mt9p031; -+ struct mt9p031_platform_data *pdata = client->dev.platform_data; -+ struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); -+ -+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { -+ dev_warn(&adapter->dev, -+ "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); -+ return -EIO; -+ } -+ -+ mt9p031 = kzalloc(sizeof(struct mt9p031), GFP_KERNEL); -+ if (!mt9p031) -+ return -ENOMEM; -+ -+ mutex_init(&mt9p031->power_lock); -+ v4l2_i2c_subdev_init(&mt9p031->subdev, client, &mt9p031_subdev_ops); -+ mt9p031->subdev.internal_ops = &mt9p031_subdev_internal_ops; -+ -+ mt9p031->pdata = pdata; -+ -+ mt9p031->pad.flags = MEDIA_PAD_FL_SOURCE; -+ ret = media_entity_init(&mt9p031->subdev.entity, 1, &mt9p031->pad, 0); -+ if (ret) -+ return ret; -+ -+ mt9p031->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; -+ -+ return 0; -+} -+ -+static int mt9p031_remove(struct i2c_client *client) -+{ -+ struct v4l2_subdev *sd = i2c_get_clientdata(client); -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); -+ -+ v4l2_device_unregister_subdev(sd); -+ media_entity_cleanup(&sd->entity); -+ kfree(mt9p031); -+ -+ return 0; -+} -+ -+static const struct i2c_device_id mt9p031_id[] = { -+ { "mt9p031", 0 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, mt9p031_id); -+ -+static struct i2c_driver mt9p031_i2c_driver = { -+ .driver = { -+ .name = "mt9p031", -+ }, -+ .probe = mt9p031_probe, -+ .remove = mt9p031_remove, -+ .id_table = mt9p031_id, -+}; -+ -+static int __init mt9p031_mod_init(void) -+{ -+ return i2c_add_driver(&mt9p031_i2c_driver); -+} -+ -+static void __exit mt9p031_mod_exit(void) -+{ -+ i2c_del_driver(&mt9p031_i2c_driver); -+} -+ -+module_init(mt9p031_mod_init); -+module_exit(mt9p031_mod_exit); -+ -+MODULE_DESCRIPTION("Aptina MT9P031 Camera driver"); -+MODULE_AUTHOR("Bastian Hecht <hechtb@gmail.com>"); -+MODULE_LICENSE("GPL v2"); -diff --git a/include/media/mt9p031.h b/include/media/mt9p031.h -new file mode 100644 -index 0000000..27b4c75 ---- /dev/null -+++ b/include/media/mt9p031.h -@@ -0,0 +1,23 @@ -+#ifndef MT9P031_H -+#define MT9P031_H -+ -+struct v4l2_subdev; -+ -+enum { -+ MT9P031_COLOR_VERSION = 0, -+ MT9P031_MONOCHROME_VERSION = 1, -+}; -+ -+enum { -+ MT9P031_VDD_IO_1V8 = 0, -+ MT9P031_VDD_IO_2V8 = 1, -+}; -+ -+struct mt9p031_platform_data { -+ int (*set_xclk)(struct v4l2_subdev *subdev, int hz); -+ int (*reset)(struct v4l2_subdev *subdev, int active); -+ int vdd_io; /* MT9P031_VDD_IO_1V8 or MT9P031_VDD_IO_2V8 */ -+ int version; /* MT9P031_COLOR_VERSION or MT9P031_MONOCHROME_VERSION */ -+}; -+ -+#endif --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/camera/0002-v4l-Add-mt9v032-sensor-driver.patch b/recipes-kernel/linux/linux-omap-2.6.39/camera/0002-v4l-Add-mt9v032-sensor-driver.patch deleted file mode 100644 index fb7cd20..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/camera/0002-v4l-Add-mt9v032-sensor-driver.patch +++ /dev/null @@ -1,853 +0,0 @@ -From ba65e798c98e9c4d331deb2b51337964336d3f78 Mon Sep 17 00:00:00 2001 -From: Detlev Casanova <detlev.casanova@gmail.com> -Date: Sun, 28 Nov 2010 19:07:20 +0100 -Subject: [PATCH 2/3] v4l: Add mt9v032 sensor driver - -The MT9V032 is a parallel wide VGA sensor from Aptina (formerly Micron) -controlled through I2C. - -The driver creates a V4L2 subdevice. It currently supports binning and -cropping, and the gain, auto gain, exposure, auto exposure and test -pattern controls. - -Signed-off-by: Detlev Casanova <detlev.casanova@gmail.com> -Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> ---- - drivers/media/video/Kconfig | 7 + - drivers/media/video/Makefile | 1 + - drivers/media/video/mt9v032.c | 773 +++++++++++++++++++++++++++++++++++++++++ - include/media/mt9v032.h | 12 + - 4 files changed, 793 insertions(+), 0 deletions(-) - create mode 100644 drivers/media/video/mt9v032.c - create mode 100644 include/media/mt9v032.h - -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index cb87e35..3a5bc57 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -344,6 +344,13 @@ config VIDEO_MT9V011 - mt0v011 1.3 Mpixel camera. It currently only works with the - em28xx driver. - -+config VIDEO_MT9V032 -+ tristate "Micron MT9V032 sensor support" -+ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API -+ ---help--- -+ This is a Video4Linux2 sensor-level driver for the Micron -+ MT9V032 752x480 CMOS sensor. -+ - config VIDEO_TCM825X - tristate "TCM825x camera sensor support" - depends on I2C && VIDEO_V4L2 -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index 912b29b..6679c6a 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -67,6 +67,7 @@ obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o - obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o - obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o - obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o -+obj-$(CONFIG_VIDEO_MT9V032) += mt9v032.o - obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o - obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o - -diff --git a/drivers/media/video/mt9v032.c b/drivers/media/video/mt9v032.c -new file mode 100644 -index 0000000..c64e1dc ---- /dev/null -+++ b/drivers/media/video/mt9v032.c -@@ -0,0 +1,773 @@ -+/* -+ * Driver for MT9V032 CMOS Image Sensor from Micron -+ * -+ * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com> -+ * -+ * Based on the MT9M001 driver, -+ * -+ * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/delay.h> -+#include <linux/i2c.h> -+#include <linux/log2.h> -+#include <linux/mutex.h> -+#include <linux/slab.h> -+#include <linux/videodev2.h> -+#include <linux/v4l2-mediabus.h> -+ -+#include <media/mt9v032.h> -+#include <media/v4l2-ctrls.h> -+#include <media/v4l2-device.h> -+#include <media/v4l2-subdev.h> -+ -+#define MT9V032_PIXEL_ARRAY_HEIGHT 492 -+#define MT9V032_PIXEL_ARRAY_WIDTH 782 -+ -+#define MT9V032_CHIP_VERSION 0x00 -+#define MT9V032_CHIP_ID_REV1 0x1311 -+#define MT9V032_CHIP_ID_REV3 0x1313 -+#define MT9V032_COLUMN_START 0x01 -+#define MT9V032_COLUMN_START_MIN 1 -+#define MT9V032_COLUMN_START_DEF 1 -+#define MT9V032_COLUMN_START_MAX 752 -+#define MT9V032_ROW_START 0x02 -+#define MT9V032_ROW_START_MIN 4 -+#define MT9V032_ROW_START_DEF 5 -+#define MT9V032_ROW_START_MAX 482 -+#define MT9V032_WINDOW_HEIGHT 0x03 -+#define MT9V032_WINDOW_HEIGHT_MIN 1 -+#define MT9V032_WINDOW_HEIGHT_DEF 480 -+#define MT9V032_WINDOW_HEIGHT_MAX 480 -+#define MT9V032_WINDOW_WIDTH 0x04 -+#define MT9V032_WINDOW_WIDTH_MIN 1 -+#define MT9V032_WINDOW_WIDTH_DEF 752 -+#define MT9V032_WINDOW_WIDTH_MAX 752 -+#define MT9V032_HORIZONTAL_BLANKING 0x05 -+#define MT9V032_HORIZONTAL_BLANKING_MIN 43 -+#define MT9V032_HORIZONTAL_BLANKING_MAX 1023 -+#define MT9V032_VERTICAL_BLANKING 0x06 -+#define MT9V032_VERTICAL_BLANKING_MIN 4 -+#define MT9V032_VERTICAL_BLANKING_MAX 3000 -+#define MT9V032_CHIP_CONTROL 0x07 -+#define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3) -+#define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7) -+#define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8) -+#define MT9V032_SHUTTER_WIDTH1 0x08 -+#define MT9V032_SHUTTER_WIDTH2 0x09 -+#define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a -+#define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b -+#define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1 -+#define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480 -+#define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767 -+#define MT9V032_RESET 0x0c -+#define MT9V032_READ_MODE 0x0d -+#define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0) -+#define MT9V032_READ_MODE_ROW_BIN_SHIFT 0 -+#define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2) -+#define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2 -+#define MT9V032_READ_MODE_ROW_FLIP (1 << 4) -+#define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5) -+#define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6) -+#define MT9V032_READ_MODE_DARK_ROWS (1 << 7) -+#define MT9V032_PIXEL_OPERATION_MODE 0x0f -+#define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2) -+#define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6) -+#define MT9V032_ANALOG_GAIN 0x35 -+#define MT9V032_ANALOG_GAIN_MIN 16 -+#define MT9V032_ANALOG_GAIN_DEF 16 -+#define MT9V032_ANALOG_GAIN_MAX 64 -+#define MT9V032_MAX_ANALOG_GAIN 0x36 -+#define MT9V032_MAX_ANALOG_GAIN_MAX 127 -+#define MT9V032_FRAME_DARK_AVERAGE 0x42 -+#define MT9V032_DARK_AVG_THRESH 0x46 -+#define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0) -+#define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0 -+#define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8) -+#define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8 -+#define MT9V032_ROW_NOISE_CORR_CONTROL 0x70 -+#define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5) -+#define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7) -+#define MT9V032_PIXEL_CLOCK 0x74 -+#define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0) -+#define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1) -+#define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2) -+#define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3) -+#define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4) -+#define MT9V032_TEST_PATTERN 0x7f -+#define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0) -+#define MT9V032_TEST_PATTERN_DATA_SHIFT 0 -+#define MT9V032_TEST_PATTERN_USE_DATA (1 << 10) -+#define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11) -+#define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11) -+#define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11) -+#define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11) -+#define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11) -+#define MT9V032_TEST_PATTERN_ENABLE (1 << 13) -+#define MT9V032_TEST_PATTERN_FLIP (1 << 14) -+#define MT9V032_AEC_AGC_ENABLE 0xaf -+#define MT9V032_AEC_ENABLE (1 << 0) -+#define MT9V032_AGC_ENABLE (1 << 1) -+#define MT9V032_THERMAL_INFO 0xc1 -+ -+struct mt9v032 { -+ struct v4l2_subdev subdev; -+ struct media_pad pad; -+ -+ struct v4l2_mbus_framefmt format; -+ struct v4l2_rect crop; -+ -+ struct v4l2_ctrl_handler ctrls; -+ -+ struct mutex power_lock; -+ int power_count; -+ -+ struct mt9v032_platform_data *pdata; -+ u16 chip_control; -+ u16 aec_agc; -+}; -+ -+static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd) -+{ -+ return container_of(sd, struct mt9v032, subdev); -+} -+ -+static int mt9v032_read(struct i2c_client *client, const u8 reg) -+{ -+ s32 data = i2c_smbus_read_word_data(client, reg); -+ dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__, -+ swab16(data), reg); -+ return data < 0 ? data : swab16(data); -+} -+ -+static int mt9v032_write(struct i2c_client *client, const u8 reg, -+ const u16 data) -+{ -+ dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__, -+ data, reg); -+ return i2c_smbus_write_word_data(client, reg, swab16(data)); -+} -+ -+static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set) -+{ -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); -+ u16 value = (mt9v032->chip_control & ~clear) | set; -+ int ret; -+ -+ ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value); -+ if (ret < 0) -+ return ret; -+ -+ mt9v032->chip_control = value; -+ return 0; -+} -+ -+static int -+mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable) -+{ -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); -+ u16 value = mt9v032->aec_agc; -+ int ret; -+ -+ if (enable) -+ value |= which; -+ else -+ value &= ~which; -+ -+ ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value); -+ if (ret < 0) -+ return ret; -+ -+ mt9v032->aec_agc = value; -+ return 0; -+} -+ -+static int mt9v032_power_on(struct mt9v032 *mt9v032) -+{ -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); -+ int ret; -+ -+ if (mt9v032->pdata->set_clock) { -+ mt9v032->pdata->set_clock(&mt9v032->subdev, 25000000); -+ udelay(1); -+ } -+ -+ /* Reset the chip and stop data read out */ -+ ret = mt9v032_write(client, MT9V032_RESET, 1); -+ if (ret < 0) -+ return ret; -+ -+ ret = mt9v032_write(client, MT9V032_RESET, 0); -+ if (ret < 0) -+ return ret; -+ -+ return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0); -+} -+ -+static void mt9v032_power_off(struct mt9v032 *mt9v032) -+{ -+ if (mt9v032->pdata->set_clock) -+ mt9v032->pdata->set_clock(&mt9v032->subdev, 0); -+} -+ -+static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on) -+{ -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); -+ int ret; -+ -+ if (!on) { -+ mt9v032_power_off(mt9v032); -+ return 0; -+ } -+ -+ ret = mt9v032_power_on(mt9v032); -+ if (ret < 0) -+ return ret; -+ -+ /* Configure the pixel clock polarity */ -+ if (mt9v032->pdata && mt9v032->pdata->clk_pol) { -+ ret = mt9v032_write(client, MT9V032_PIXEL_CLOCK, -+ MT9V032_PIXEL_CLOCK_INV_PXL_CLK); -+ if (ret < 0) -+ return ret; -+ } -+ -+ /* Disable the noise correction algorithm and restore the controls. */ -+ ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, 0); -+ if (ret < 0) -+ return ret; -+ -+ return v4l2_ctrl_handler_setup(&mt9v032->ctrls); -+} -+ -+/* ----------------------------------------------------------------------------- -+ * V4L2 subdev video operations -+ */ -+ -+static struct v4l2_mbus_framefmt * -+__mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh, -+ unsigned int pad, enum v4l2_subdev_format_whence which) -+{ -+ switch (which) { -+ case V4L2_SUBDEV_FORMAT_TRY: -+ return v4l2_subdev_get_try_format(fh, pad); -+ case V4L2_SUBDEV_FORMAT_ACTIVE: -+ return &mt9v032->format; -+ default: -+ return NULL; -+ } -+} -+ -+static struct v4l2_rect * -+__mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh, -+ unsigned int pad, enum v4l2_subdev_format_whence which) -+{ -+ switch (which) { -+ case V4L2_SUBDEV_FORMAT_TRY: -+ return v4l2_subdev_get_try_crop(fh, pad); -+ case V4L2_SUBDEV_FORMAT_ACTIVE: -+ return &mt9v032->crop; -+ default: -+ return NULL; -+ } -+} -+ -+static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable) -+{ -+ const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE -+ | MT9V032_CHIP_CONTROL_DOUT_ENABLE -+ | MT9V032_CHIP_CONTROL_SEQUENTIAL; -+ struct i2c_client *client = v4l2_get_subdevdata(subdev); -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); -+ struct v4l2_mbus_framefmt *format = &mt9v032->format; -+ struct v4l2_rect *crop = &mt9v032->crop; -+ unsigned int hratio; -+ unsigned int vratio; -+ int ret; -+ -+ if (!enable) -+ return mt9v032_set_chip_control(mt9v032, mode, 0); -+ -+ /* Configure the window size and row/column bin */ -+ hratio = DIV_ROUND_CLOSEST(crop->width, format->width); -+ vratio = DIV_ROUND_CLOSEST(crop->height, format->height); -+ -+ ret = mt9v032_write(client, MT9V032_READ_MODE, -+ (hratio - 1) << MT9V032_READ_MODE_ROW_BIN_SHIFT | -+ (vratio - 1) << MT9V032_READ_MODE_COLUMN_BIN_SHIFT); -+ if (ret < 0) -+ return ret; -+ -+ ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left); -+ if (ret < 0) -+ return ret; -+ -+ ret = mt9v032_write(client, MT9V032_ROW_START, crop->top); -+ if (ret < 0) -+ return ret; -+ -+ ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop->width); -+ if (ret < 0) -+ return ret; -+ -+ ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop->height); -+ if (ret < 0) -+ return ret; -+ -+ ret = mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING, -+ max(43, 660 - crop->width)); -+ if (ret < 0) -+ return ret; -+ -+ /* Switch to master "normal" mode */ -+ return mt9v032_set_chip_control(mt9v032, 0, mode); -+} -+ -+static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_mbus_code_enum *code) -+{ -+ if (code->index > 0) -+ return -EINVAL; -+ -+ code->code = V4L2_MBUS_FMT_SGRBG10_1X10; -+ return 0; -+} -+ -+static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_frame_size_enum *fse) -+{ -+ if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10) -+ return -EINVAL; -+ -+ fse->min_width = MT9V032_WINDOW_WIDTH_DEF / fse->index; -+ fse->max_width = fse->min_width; -+ fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / fse->index; -+ fse->max_height = fse->min_height; -+ -+ return 0; -+} -+ -+static int mt9v032_get_format(struct v4l2_subdev *subdev, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_format *format) -+{ -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); -+ -+ format->format = *__mt9v032_get_pad_format(mt9v032, fh, format->pad, -+ format->which); -+ return 0; -+} -+ -+static int mt9v032_set_format(struct v4l2_subdev *subdev, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_format *format) -+{ -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); -+ struct v4l2_mbus_framefmt *__format; -+ struct v4l2_rect *__crop; -+ unsigned int width; -+ unsigned int height; -+ unsigned int hratio; -+ unsigned int vratio; -+ -+ __crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad, -+ format->which); -+ -+ /* Clamp the width and height to avoid dividing by zero. */ -+ width = clamp_t(unsigned int, ALIGN(format->format.width, 2), -+ max(__crop->width / 8, MT9V032_WINDOW_WIDTH_MIN), -+ __crop->width); -+ height = clamp_t(unsigned int, ALIGN(format->format.height, 2), -+ max(__crop->height / 8, MT9V032_WINDOW_HEIGHT_MIN), -+ __crop->height); -+ -+ hratio = DIV_ROUND_CLOSEST(__crop->width, width); -+ vratio = DIV_ROUND_CLOSEST(__crop->height, height); -+ -+ __format = __mt9v032_get_pad_format(mt9v032, fh, format->pad, -+ format->which); -+ __format->width = __crop->width / hratio; -+ __format->height = __crop->height / vratio; -+ -+ format->format = *__format; -+ -+ return 0; -+} -+ -+static int mt9v032_get_crop(struct v4l2_subdev *subdev, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_crop *crop) -+{ -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); -+ -+ crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad, -+ crop->which); -+ return 0; -+} -+ -+static int mt9v032_set_crop(struct v4l2_subdev *subdev, -+ struct v4l2_subdev_fh *fh, -+ struct v4l2_subdev_crop *crop) -+{ -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); -+ struct v4l2_mbus_framefmt *__format; -+ struct v4l2_rect *__crop; -+ struct v4l2_rect rect; -+ -+ /* Clamp the crop rectangle boundaries and align them to a non multiple -+ * of 2 pixels to ensure a GRBG Bayer pattern. -+ */ -+ rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1, -+ MT9V032_COLUMN_START_MIN, -+ MT9V032_COLUMN_START_MAX); -+ rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1, -+ MT9V032_ROW_START_MIN, -+ MT9V032_ROW_START_MAX); -+ rect.width = clamp(ALIGN(crop->rect.width, 2), -+ MT9V032_WINDOW_WIDTH_MIN, -+ MT9V032_WINDOW_WIDTH_MAX); -+ rect.height = clamp(ALIGN(crop->rect.height, 2), -+ MT9V032_WINDOW_HEIGHT_MIN, -+ MT9V032_WINDOW_HEIGHT_MAX); -+ -+ rect.width = min(rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left); -+ rect.height = min(rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top); -+ -+ __crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop->which); -+ -+ if (rect.width != __crop->width || rect.height != __crop->height) { -+ /* Reset the output image size if the crop rectangle size has -+ * been modified. -+ */ -+ __format = __mt9v032_get_pad_format(mt9v032, fh, crop->pad, -+ crop->which); -+ __format->width = rect.width; -+ __format->height = rect.height; -+ } -+ -+ *__crop = rect; -+ crop->rect = rect; -+ -+ return 0; -+} -+ -+/* ----------------------------------------------------------------------------- -+ * V4L2 subdev control operations -+ */ -+ -+#define V4L2_CID_TEST_PATTERN (V4L2_CID_USER_BASE | 0x1001) -+ -+static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl) -+{ -+ struct mt9v032 *mt9v032 = -+ container_of(ctrl->handler, struct mt9v032, ctrls); -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); -+ u16 data; -+ -+ switch (ctrl->id) { -+ case V4L2_CID_AUTOGAIN: -+ return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE, -+ ctrl->val); -+ -+ case V4L2_CID_GAIN: -+ return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl->val); -+ -+ case V4L2_CID_EXPOSURE_AUTO: -+ return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE, -+ ctrl->val); -+ -+ case V4L2_CID_EXPOSURE: -+ return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH, -+ ctrl->val); -+ -+ case V4L2_CID_TEST_PATTERN: -+ switch (ctrl->val) { -+ case 0: -+ data = 0; -+ break; -+ case 1: -+ data = MT9V032_TEST_PATTERN_GRAY_VERTICAL -+ | MT9V032_TEST_PATTERN_ENABLE; -+ break; -+ case 2: -+ data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL -+ | MT9V032_TEST_PATTERN_ENABLE; -+ break; -+ case 3: -+ data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL -+ | MT9V032_TEST_PATTERN_ENABLE; -+ break; -+ default: -+ data = (ctrl->val << MT9V032_TEST_PATTERN_DATA_SHIFT) -+ | MT9V032_TEST_PATTERN_USE_DATA -+ | MT9V032_TEST_PATTERN_ENABLE -+ | MT9V032_TEST_PATTERN_FLIP; -+ break; -+ } -+ -+ return mt9v032_write(client, MT9V032_TEST_PATTERN, data); -+ } -+ -+ return 0; -+} -+ -+static struct v4l2_ctrl_ops mt9v032_ctrl_ops = { -+ .s_ctrl = mt9v032_s_ctrl, -+}; -+ -+static const struct v4l2_ctrl_config mt9v032_ctrls[] = { -+ { -+ .ops = &mt9v032_ctrl_ops, -+ .id = V4L2_CID_TEST_PATTERN, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Test pattern", -+ .min = 0, -+ .max = 1023, -+ .step = 1, -+ .def = 0, -+ .flags = 0, -+ } -+}; -+ -+/* ----------------------------------------------------------------------------- -+ * V4L2 subdev core operations -+ */ -+ -+static int mt9v032_set_power(struct v4l2_subdev *subdev, int on) -+{ -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); -+ int ret = 0; -+ -+ mutex_lock(&mt9v032->power_lock); -+ -+ /* If the power count is modified from 0 to != 0 or from != 0 to 0, -+ * update the power state. -+ */ -+ if (mt9v032->power_count == !on) { -+ ret = __mt9v032_set_power(mt9v032, !!on); -+ if (ret < 0) -+ goto done; -+ } -+ -+ /* Update the power count. */ -+ mt9v032->power_count += on ? 1 : -1; -+ WARN_ON(mt9v032->power_count < 0); -+ -+done: -+ mutex_unlock(&mt9v032->power_lock); -+ return ret; -+} -+ -+/* ----------------------------------------------------------------------------- -+ * V4L2 subdev internal operations -+ */ -+ -+static int mt9v032_registered(struct v4l2_subdev *subdev) -+{ -+ struct i2c_client *client = v4l2_get_subdevdata(subdev); -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); -+ s32 data; -+ int ret; -+ -+ dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n", -+ client->addr); -+ -+ ret = mt9v032_power_on(mt9v032); -+ if (ret < 0) { -+ dev_err(&client->dev, "MT9V032 power up failed\n"); -+ return ret; -+ } -+ -+ /* Read and check the sensor version */ -+ data = mt9v032_read(client, MT9V032_CHIP_VERSION); -+ if (data != MT9V032_CHIP_ID_REV1 && data != MT9V032_CHIP_ID_REV3) { -+ dev_err(&client->dev, "MT9V032 not detected, wrong version " -+ "0x%04x\n", data); -+ return -ENODEV; -+ } -+ -+ mt9v032_power_off(mt9v032); -+ -+ dev_info(&client->dev, "MT9V032 detected at address 0x%02x\n", -+ client->addr); -+ -+ return ret; -+} -+ -+static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) -+{ -+ struct v4l2_mbus_framefmt *format; -+ struct v4l2_rect *crop; -+ -+ crop = v4l2_subdev_get_try_crop(fh, 0); -+ crop->left = MT9V032_COLUMN_START_DEF; -+ crop->top = MT9V032_ROW_START_DEF; -+ crop->width = MT9V032_WINDOW_WIDTH_DEF; -+ crop->height = MT9V032_WINDOW_HEIGHT_DEF; -+ -+ format = v4l2_subdev_get_try_format(fh, 0); -+ format->code = V4L2_MBUS_FMT_SGRBG10_1X10; -+ format->width = MT9V032_WINDOW_WIDTH_DEF; -+ format->height = MT9V032_WINDOW_HEIGHT_DEF; -+ format->field = V4L2_FIELD_NONE; -+ format->colorspace = V4L2_COLORSPACE_SRGB; -+ -+ return mt9v032_set_power(subdev, 1); -+} -+ -+static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) -+{ -+ return mt9v032_set_power(subdev, 0); -+} -+ -+static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = { -+ .s_power = mt9v032_set_power, -+}; -+ -+static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = { -+ .s_stream = mt9v032_s_stream, -+}; -+ -+static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = { -+ .enum_mbus_code = mt9v032_enum_mbus_code, -+ .enum_frame_size = mt9v032_enum_frame_size, -+ .get_fmt = mt9v032_get_format, -+ .set_fmt = mt9v032_set_format, -+ .get_crop = mt9v032_get_crop, -+ .set_crop = mt9v032_set_crop, -+}; -+ -+static struct v4l2_subdev_ops mt9v032_subdev_ops = { -+ .core = &mt9v032_subdev_core_ops, -+ .video = &mt9v032_subdev_video_ops, -+ .pad = &mt9v032_subdev_pad_ops, -+}; -+ -+static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = { -+ .registered = mt9v032_registered, -+ .open = mt9v032_open, -+ .close = mt9v032_close, -+}; -+ -+/* ----------------------------------------------------------------------------- -+ * Driver initialization and probing -+ */ -+ -+static int mt9v032_probe(struct i2c_client *client, -+ const struct i2c_device_id *did) -+{ -+ struct mt9v032 *mt9v032; -+ unsigned int i; -+ int ret; -+ -+ if (!i2c_check_functionality(client->adapter, -+ I2C_FUNC_SMBUS_WORD_DATA)) { -+ dev_warn(&client->adapter->dev, -+ "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); -+ return -EIO; -+ } -+ -+ mt9v032 = kzalloc(sizeof(*mt9v032), GFP_KERNEL); -+ if (!mt9v032) -+ return -ENOMEM; -+ -+ mutex_init(&mt9v032->power_lock); -+ mt9v032->pdata = client->dev.platform_data; -+ -+ v4l2_ctrl_handler_init(&mt9v032->ctrls, ARRAY_SIZE(mt9v032_ctrls) + 4); -+ -+ v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, -+ V4L2_CID_AUTOGAIN, 0, 1, 1, 1); -+ v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, -+ V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN, -+ MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF); -+ v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops, -+ V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0, -+ V4L2_EXPOSURE_AUTO); -+ v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, -+ V4L2_CID_EXPOSURE, MT9V032_TOTAL_SHUTTER_WIDTH_MIN, -+ MT9V032_TOTAL_SHUTTER_WIDTH_MAX, 1, -+ MT9V032_TOTAL_SHUTTER_WIDTH_DEF); -+ -+ for (i = 0; i < ARRAY_SIZE(mt9v032_ctrls); ++i) -+ v4l2_ctrl_new_custom(&mt9v032->ctrls, &mt9v032_ctrls[i], NULL); -+ -+ mt9v032->subdev.ctrl_handler = &mt9v032->ctrls; -+ -+ if (mt9v032->ctrls.error) -+ printk(KERN_INFO "%s: control initialization error %d\n", -+ __func__, mt9v032->ctrls.error); -+ -+ mt9v032->crop.left = MT9V032_COLUMN_START_DEF; -+ mt9v032->crop.top = MT9V032_ROW_START_DEF; -+ mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF; -+ mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF; -+ -+ mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10; -+ mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF; -+ mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF; -+ mt9v032->format.field = V4L2_FIELD_NONE; -+ mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB; -+ -+ mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE; -+ -+ v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops); -+ mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops; -+ mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; -+ -+ mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE; -+ ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, 0); -+ if (ret < 0) -+ kfree(mt9v032); -+ -+ return ret; -+} -+ -+static int mt9v032_remove(struct i2c_client *client) -+{ -+ struct v4l2_subdev *subdev = i2c_get_clientdata(client); -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); -+ -+ v4l2_device_unregister_subdev(subdev); -+ media_entity_cleanup(&subdev->entity); -+ kfree(mt9v032); -+ return 0; -+} -+ -+static const struct i2c_device_id mt9v032_id[] = { -+ { "mt9v032", 0 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, mt9v032_id); -+ -+static struct i2c_driver mt9v032_driver = { -+ .driver = { -+ .name = "mt9v032", -+ }, -+ .probe = mt9v032_probe, -+ .remove = mt9v032_remove, -+ .id_table = mt9v032_id, -+}; -+ -+static int __init mt9v032_init(void) -+{ -+ return i2c_add_driver(&mt9v032_driver); -+} -+ -+static void __exit mt9v032_exit(void) -+{ -+ i2c_del_driver(&mt9v032_driver); -+} -+ -+module_init(mt9v032_init); -+module_exit(mt9v032_exit); -+ -+MODULE_DESCRIPTION("Aptina MT9V032 Camera driver"); -+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>"); -+MODULE_LICENSE("GPL"); -diff --git a/include/media/mt9v032.h b/include/media/mt9v032.h -new file mode 100644 -index 0000000..5e27f9b ---- /dev/null -+++ b/include/media/mt9v032.h -@@ -0,0 +1,12 @@ -+#ifndef _MEDIA_MT9V032_H -+#define _MEDIA_MT9V032_H -+ -+struct v4l2_subdev; -+ -+struct mt9v032_platform_data { -+ unsigned int clk_pol:1; -+ -+ void (*set_clock)(struct v4l2_subdev *subdev, unsigned int rate); -+}; -+ -+#endif --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/camera/0003-Add-support-for-mt9p031-LI-5M03-module-in-Beagleboar.patch b/recipes-kernel/linux/linux-omap-2.6.39/camera/0003-Add-support-for-mt9p031-LI-5M03-module-in-Beagleboar.patch deleted file mode 100644 index a1807e7..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/camera/0003-Add-support-for-mt9p031-LI-5M03-module-in-Beagleboar.patch +++ /dev/null @@ -1,162 +0,0 @@ -From f662a8a2b9794121568903f5cc969e50eb151892 Mon Sep 17 00:00:00 2001 -From: Javier Martin <javier.martin@vista-silicon.com> -Date: Mon, 30 May 2011 10:37:17 +0200 -Subject: [PATCH 3/3] Add support for mt9p031 (LI-5M03 module) in Beagleboard xM. - -Since isp clocks have not been exposed yet, this patch -includes a temporal solution for testing mt9p031 driver -in Beagleboard xM. - -Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> ---- - arch/arm/mach-omap2/Makefile | 1 + - arch/arm/mach-omap2/board-omap3beagle-camera.c | 95 ++++++++++++++++++++++++ - arch/arm/mach-omap2/board-omap3beagle.c | 5 + - 3 files changed, 101 insertions(+), 0 deletions(-) - create mode 100644 arch/arm/mach-omap2/board-omap3beagle-camera.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index 512b152..05cd983 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -179,6 +179,7 @@ obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o \ - hsmmc.o - obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o - obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o \ -+ board-omap3beagle-camera.o \ - hsmmc.o - obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o \ - hsmmc.o -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -new file mode 100644 -index 0000000..2632557 ---- /dev/null -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -0,0 +1,95 @@ -+#include <linux/gpio.h> -+#include <linux/regulator/machine.h> -+ -+#include <plat/i2c.h> -+ -+#include <media/mt9p031.h> -+#include <asm/mach-types.h> -+#include "devices.h" -+#include "../../../drivers/media/video/omap3isp/isp.h" -+ -+#define MT9P031_RESET_GPIO 98 -+#define MT9P031_XCLK ISP_XCLK_A -+ -+static struct regulator *reg_1v8, *reg_2v8; -+ -+static int beagle_cam_set_xclk(struct v4l2_subdev *subdev, int hz) -+{ -+ struct isp_device *isp = v4l2_dev_to_isp_device(subdev->v4l2_dev); -+ int ret; -+ -+ ret = isp->platform_cb.set_xclk(isp, hz, MT9P031_XCLK); -+ return 0; -+} -+ -+static int beagle_cam_reset(struct v4l2_subdev *subdev, int active) -+{ -+ /* Set RESET_BAR to !active */ -+ gpio_set_value(MT9P031_RESET_GPIO, !active); -+ -+ return 0; -+} -+ -+static struct mt9p031_platform_data beagle_mt9p031_platform_data = { -+ .set_xclk = beagle_cam_set_xclk, -+ .reset = beagle_cam_reset, -+ .vdd_io = MT9P031_VDD_IO_1V8, -+ .version = MT9P031_COLOR_VERSION, -+}; -+ -+static struct i2c_board_info mt9p031_camera_i2c_device = { -+ I2C_BOARD_INFO("mt9p031", 0x48), -+ .platform_data = &beagle_mt9p031_platform_data, -+}; -+ -+static struct isp_subdev_i2c_board_info mt9p031_camera_subdevs[] = { -+ { -+ .board_info = &mt9p031_camera_i2c_device, -+ .i2c_adapter_id = 2, -+ }, -+ { NULL, 0, }, -+}; -+ -+static struct isp_v4l2_subdevs_group beagle_camera_subdevs[] = { -+ { -+ .subdevs = mt9p031_camera_subdevs, -+ .interface = ISP_INTERFACE_PARALLEL, -+ .bus = { -+ .parallel = { -+ .data_lane_shift = 0, -+ .clk_pol = 1, -+ .bridge = ISPCTRL_PAR_BRIDGE_DISABLE, -+ } -+ }, -+ }, -+ { }, -+}; -+ -+static struct isp_platform_data beagle_isp_platform_data = { -+ .subdevs = beagle_camera_subdevs, -+}; -+ -+static int __init beagle_camera_init(void) -+{ -+ if (!machine_is_omap3_beagle() || !cpu_is_omap3630()) -+ return 0; -+ -+ reg_1v8 = regulator_get(NULL, "cam_1v8"); -+ if (IS_ERR(reg_1v8)) -+ pr_err("%s: cannot get cam_1v8 regulator\n", __func__); -+ else -+ regulator_enable(reg_1v8); -+ -+ reg_2v8 = regulator_get(NULL, "cam_2v8"); -+ if (IS_ERR(reg_2v8)) -+ pr_err("%s: cannot get cam_2v8 regulator\n", __func__); -+ else -+ regulator_enable(reg_2v8); -+ -+ omap_register_i2c_bus(2, 100, NULL, 0); -+ gpio_request(MT9P031_RESET_GPIO, "cam_rst"); -+ gpio_direction_output(MT9P031_RESET_GPIO, 0); -+ omap3_init_camera(&beagle_isp_platform_data); -+ return 0; -+} -+late_initcall(beagle_camera_init); -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 221bfda..dd6e31f 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -25,12 +25,16 @@ - #include <linux/input.h> - #include <linux/gpio_keys.h> - #include <linux/opp.h> -+#include <linux/i2c.h> -+#include <linux/mm.h> -+#include <linux/videodev2.h> - - #include <linux/mtd/mtd.h> - #include <linux/mtd/partitions.h> - #include <linux/mtd/nand.h> - #include <linux/mmc/host.h> - -+#include <linux/gpio.h> - #include <linux/regulator/machine.h> - #include <linux/i2c/twl.h> - -@@ -48,6 +52,7 @@ - #include <plat/nand.h> - #include <plat/usb.h> - #include <plat/omap_device.h> -+#include <plat/i2c.h> - - #include "mux.h" - #include "hsmmc.h" --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0001-mfd-Fix-omap-usbhs-crash-when-rmmoding-ehci-or-ohci.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0001-mfd-Fix-omap-usbhs-crash-when-rmmoding-ehci-or-ohci.patch deleted file mode 100644 index c9f1e6a..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0001-mfd-Fix-omap-usbhs-crash-when-rmmoding-ehci-or-ohci.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 46be90d202c36db19e27c2991cbff401c6c3ee81 Mon Sep 17 00:00:00 2001 -From: Keshava Munegowda <Keshava_mgowda@ti.com> -Date: Mon, 16 May 2011 14:24:58 +0530 -Subject: [PATCH 01/13] mfd: Fix omap usbhs crash when rmmoding ehci or ohci - -The disabling of clocks and freeing GPIO are changed -to fix the occurrence of the crash of rmmod of ehci and ohci -drivers. The GPIOs should be freed after the spin locks are -unlocked. - -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> -Acked-by: Felipe Balbi <balbi@ti.com> -Cc: stable@kernel.org -Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> ---- - drivers/mfd/omap-usb-host.c | 27 +++++++++++++++++++-------- - 1 files changed, 19 insertions(+), 8 deletions(-) - -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c -index 3ab9ffa..55c5d47 100644 ---- a/drivers/mfd/omap-usb-host.c -+++ b/drivers/mfd/omap-usb-host.c -@@ -994,22 +994,33 @@ static void usbhs_disable(struct device *dev) - dev_dbg(dev, "operation timed out\n"); - } - -- if (pdata->ehci_data->phy_reset) { -- if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) -- gpio_free(pdata->ehci_data->reset_gpio_port[0]); -- -- if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) -- gpio_free(pdata->ehci_data->reset_gpio_port[1]); -+ if (is_omap_usbhs_rev2(omap)) { -+ if (is_ehci_tll_mode(pdata->port_mode[0])) -+ clk_enable(omap->usbtll_p1_fck); -+ if (is_ehci_tll_mode(pdata->port_mode[1])) -+ clk_enable(omap->usbtll_p2_fck); -+ clk_disable(omap->utmi_p2_fck); -+ clk_disable(omap->utmi_p1_fck); - } - -- clk_disable(omap->utmi_p2_fck); -- clk_disable(omap->utmi_p1_fck); - clk_disable(omap->usbtll_ick); - clk_disable(omap->usbtll_fck); - clk_disable(omap->usbhost_fs_fck); - clk_disable(omap->usbhost_hs_fck); - clk_disable(omap->usbhost_ick); - -+ /* The gpio_free migh sleep; so unlock the spinlock */ -+ spin_unlock_irqrestore(&omap->lock, flags); -+ -+ if (pdata->ehci_data->phy_reset) { -+ if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) -+ gpio_free(pdata->ehci_data->reset_gpio_port[0]); -+ -+ if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) -+ gpio_free(pdata->ehci_data->reset_gpio_port[1]); -+ } -+ return; -+ - end_disble: - spin_unlock_irqrestore(&omap->lock, flags); - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0002-mfd-Fix-omap_usbhs_alloc_children-error-handling.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0002-mfd-Fix-omap_usbhs_alloc_children-error-handling.patch deleted file mode 100644 index 380dd82..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0002-mfd-Fix-omap_usbhs_alloc_children-error-handling.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 89a903aca8fda3dcf1a6f9a424247e772afdd44e Mon Sep 17 00:00:00 2001 -From: Axel Lin <axel.lin@gmail.com> -Date: Sat, 14 May 2011 14:15:36 +0800 -Subject: [PATCH 02/13] mfd: Fix omap_usbhs_alloc_children error handling - -1. Return proper error if omap_usbhs_alloc_child fails -2. In the case of goto err_ehci, we should call platform_device_unregister(ehci) - instead of platform_device_put(ehci) because we have already added the - platform device to device hierarchy. - -Signed-off-by: Axel Lin <axel.lin@gmail.com> -Signed-off-by: Axel Lin <axel.lin@gmail.com> -Tested-by: Keshava Munegowda <keshava_mgowda@ti.com> -Acked-by: Felipe Balbi <balbi@ti.com> -Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> ---- - drivers/mfd/omap-usb-host.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c -index 55c5d47..1717144 100644 ---- a/drivers/mfd/omap-usb-host.c -+++ b/drivers/mfd/omap-usb-host.c -@@ -281,6 +281,7 @@ static int omap_usbhs_alloc_children(struct platform_device *pdev) - - if (!ehci) { - dev_err(dev, "omap_usbhs_alloc_child failed\n"); -+ ret = -ENOMEM; - goto err_end; - } - -@@ -304,13 +305,14 @@ static int omap_usbhs_alloc_children(struct platform_device *pdev) - sizeof(*ohci_data), dev); - if (!ohci) { - dev_err(dev, "omap_usbhs_alloc_child failed\n"); -+ ret = -ENOMEM; - goto err_ehci; - } - - return 0; - - err_ehci: -- platform_device_put(ehci); -+ platform_device_unregister(ehci); - - err_end: - return ret; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0003-mfd-Add-omap-usbhs-runtime-PM-support.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0003-mfd-Add-omap-usbhs-runtime-PM-support.patch deleted file mode 100644 index b47deb2..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0003-mfd-Add-omap-usbhs-runtime-PM-support.patch +++ /dev/null @@ -1,245 +0,0 @@ -From edc881f9c4897fab11542cd5c36a33b288f702be Mon Sep 17 00:00:00 2001 -From: Keshava Munegowda <Keshava_mgowda@ti.com> -Date: Sun, 22 May 2011 22:51:26 +0200 -Subject: [PATCH 03/13] mfd: Add omap-usbhs runtime PM support - -The usbhs core driver does not enable/disable the interface and -functional clocks; These clocks are handled by hwmod and runtime pm, -hence insted of the clock enable/disable, the runtime pm APIS are -used. however,the port clocks and tll clocks are handled -by the usbhs core. - -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> -Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> ---- - drivers/mfd/omap-usb-host.c | 131 +++---------------------------------------- - 1 files changed, 9 insertions(+), 122 deletions(-) - -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c -index 1717144..8552195 100644 ---- a/drivers/mfd/omap-usb-host.c -+++ b/drivers/mfd/omap-usb-host.c -@@ -26,6 +26,7 @@ - #include <linux/spinlock.h> - #include <linux/gpio.h> - #include <plat/usb.h> -+#include <linux/pm_runtime.h> - - #define USBHS_DRIVER_NAME "usbhs-omap" - #define OMAP_EHCI_DEVICE "ehci-omap" -@@ -146,9 +147,6 @@ - - - struct usbhs_hcd_omap { -- struct clk *usbhost_ick; -- struct clk *usbhost_hs_fck; -- struct clk *usbhost_fs_fck; - struct clk *xclk60mhsp1_ck; - struct clk *xclk60mhsp2_ck; - struct clk *utmi_p1_fck; -@@ -158,8 +156,6 @@ struct usbhs_hcd_omap { - struct clk *usbhost_p2_fck; - struct clk *usbtll_p2_fck; - struct clk *init_60m_fclk; -- struct clk *usbtll_fck; -- struct clk *usbtll_ick; - - void __iomem *uhh_base; - void __iomem *tll_base; -@@ -353,46 +349,13 @@ static int __devinit usbhs_omap_probe(struct platform_device *pdev) - omap->platdata.ehci_data = pdata->ehci_data; - omap->platdata.ohci_data = pdata->ohci_data; - -- omap->usbhost_ick = clk_get(dev, "usbhost_ick"); -- if (IS_ERR(omap->usbhost_ick)) { -- ret = PTR_ERR(omap->usbhost_ick); -- dev_err(dev, "usbhost_ick failed error:%d\n", ret); -- goto err_end; -- } -- -- omap->usbhost_hs_fck = clk_get(dev, "hs_fck"); -- if (IS_ERR(omap->usbhost_hs_fck)) { -- ret = PTR_ERR(omap->usbhost_hs_fck); -- dev_err(dev, "usbhost_hs_fck failed error:%d\n", ret); -- goto err_usbhost_ick; -- } -- -- omap->usbhost_fs_fck = clk_get(dev, "fs_fck"); -- if (IS_ERR(omap->usbhost_fs_fck)) { -- ret = PTR_ERR(omap->usbhost_fs_fck); -- dev_err(dev, "usbhost_fs_fck failed error:%d\n", ret); -- goto err_usbhost_hs_fck; -- } -- -- omap->usbtll_fck = clk_get(dev, "usbtll_fck"); -- if (IS_ERR(omap->usbtll_fck)) { -- ret = PTR_ERR(omap->usbtll_fck); -- dev_err(dev, "usbtll_fck failed error:%d\n", ret); -- goto err_usbhost_fs_fck; -- } -- -- omap->usbtll_ick = clk_get(dev, "usbtll_ick"); -- if (IS_ERR(omap->usbtll_ick)) { -- ret = PTR_ERR(omap->usbtll_ick); -- dev_err(dev, "usbtll_ick failed error:%d\n", ret); -- goto err_usbtll_fck; -- } -+ pm_runtime_enable(&pdev->dev); - - omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk"); - if (IS_ERR(omap->utmi_p1_fck)) { - ret = PTR_ERR(omap->utmi_p1_fck); - dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); -- goto err_usbtll_ick; -+ goto err_end; - } - - omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck"); -@@ -522,22 +485,8 @@ err_xclk60mhsp1_ck: - err_utmi_p1_fck: - clk_put(omap->utmi_p1_fck); - --err_usbtll_ick: -- clk_put(omap->usbtll_ick); -- --err_usbtll_fck: -- clk_put(omap->usbtll_fck); -- --err_usbhost_fs_fck: -- clk_put(omap->usbhost_fs_fck); -- --err_usbhost_hs_fck: -- clk_put(omap->usbhost_hs_fck); -- --err_usbhost_ick: -- clk_put(omap->usbhost_ick); -- - err_end: -+ pm_runtime_disable(&pdev->dev); - kfree(omap); - - end_probe: -@@ -571,11 +520,7 @@ static int __devexit usbhs_omap_remove(struct platform_device *pdev) - clk_put(omap->utmi_p2_fck); - clk_put(omap->xclk60mhsp1_ck); - clk_put(omap->utmi_p1_fck); -- clk_put(omap->usbtll_ick); -- clk_put(omap->usbtll_fck); -- clk_put(omap->usbhost_fs_fck); -- clk_put(omap->usbhost_hs_fck); -- clk_put(omap->usbhost_ick); -+ pm_runtime_disable(&pdev->dev); - kfree(omap); - - return 0; -@@ -695,7 +640,6 @@ static int usbhs_enable(struct device *dev) - struct usbhs_omap_platform_data *pdata = &omap->platdata; - unsigned long flags = 0; - int ret = 0; -- unsigned long timeout; - unsigned reg; - - dev_dbg(dev, "starting TI HSUSB Controller\n"); -@@ -708,11 +652,7 @@ static int usbhs_enable(struct device *dev) - if (omap->count > 0) - goto end_count; - -- clk_enable(omap->usbhost_ick); -- clk_enable(omap->usbhost_hs_fck); -- clk_enable(omap->usbhost_fs_fck); -- clk_enable(omap->usbtll_fck); -- clk_enable(omap->usbtll_ick); -+ pm_runtime_get_sync(dev); - - if (pdata->ehci_data->phy_reset) { - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) { -@@ -736,50 +676,6 @@ static int usbhs_enable(struct device *dev) - omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); - dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); - -- /* perform TLL soft reset, and wait until reset is complete */ -- usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, -- OMAP_USBTLL_SYSCONFIG_SOFTRESET); -- -- /* Wait for TLL reset to complete */ -- timeout = jiffies + msecs_to_jiffies(1000); -- while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS) -- & OMAP_USBTLL_SYSSTATUS_RESETDONE)) { -- cpu_relax(); -- -- if (time_after(jiffies, timeout)) { -- dev_dbg(dev, "operation timed out\n"); -- ret = -EINVAL; -- goto err_tll; -- } -- } -- -- dev_dbg(dev, "TLL RESET DONE\n"); -- -- /* (1<<3) = no idle mode only for initial debugging */ -- usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, -- OMAP_USBTLL_SYSCONFIG_ENAWAKEUP | -- OMAP_USBTLL_SYSCONFIG_SIDLEMODE | -- OMAP_USBTLL_SYSCONFIG_AUTOIDLE); -- -- /* Put UHH in NoIdle/NoStandby mode */ -- reg = usbhs_read(omap->uhh_base, OMAP_UHH_SYSCONFIG); -- if (is_omap_usbhs_rev1(omap)) { -- reg |= (OMAP_UHH_SYSCONFIG_ENAWAKEUP -- | OMAP_UHH_SYSCONFIG_SIDLEMODE -- | OMAP_UHH_SYSCONFIG_CACTIVITY -- | OMAP_UHH_SYSCONFIG_MIDLEMODE); -- reg &= ~OMAP_UHH_SYSCONFIG_AUTOIDLE; -- -- -- } else if (is_omap_usbhs_rev2(omap)) { -- reg &= ~OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR; -- reg |= OMAP4_UHH_SYSCONFIG_NOIDLE; -- reg &= ~OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR; -- reg |= OMAP4_UHH_SYSCONFIG_NOSTDBY; -- } -- -- usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg); -- - reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG); - /* setup ULPI bypass and burst configurations */ - reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN -@@ -919,6 +815,8 @@ end_count: - return 0; - - err_tll: -+ pm_runtime_put_sync(dev); -+ spin_unlock_irqrestore(&omap->lock, flags); - if (pdata->ehci_data->phy_reset) { - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) - gpio_free(pdata->ehci_data->reset_gpio_port[0]); -@@ -926,13 +824,6 @@ err_tll: - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) - gpio_free(pdata->ehci_data->reset_gpio_port[1]); - } -- -- clk_disable(omap->usbtll_ick); -- clk_disable(omap->usbtll_fck); -- clk_disable(omap->usbhost_fs_fck); -- clk_disable(omap->usbhost_hs_fck); -- clk_disable(omap->usbhost_ick); -- spin_unlock_irqrestore(&omap->lock, flags); - return ret; - } - -@@ -1005,11 +896,7 @@ static void usbhs_disable(struct device *dev) - clk_disable(omap->utmi_p1_fck); - } - -- clk_disable(omap->usbtll_ick); -- clk_disable(omap->usbtll_fck); -- clk_disable(omap->usbhost_fs_fck); -- clk_disable(omap->usbhost_hs_fck); -- clk_disable(omap->usbhost_ick); -+ pm_runtime_put_sync(dev); - - /* The gpio_free migh sleep; so unlock the spinlock */ - spin_unlock_irqrestore(&omap->lock, flags); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0004-arm-omap-usb-ehci-and-ohci-hwmod-structures-for-omap.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0004-arm-omap-usb-ehci-and-ohci-hwmod-structures-for-omap.patch deleted file mode 100644 index 3d4d8a2..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0004-arm-omap-usb-ehci-and-ohci-hwmod-structures-for-omap.patch +++ /dev/null @@ -1,406 +0,0 @@ -From 339b167f6f76707a2d6ae3a7c0b921b8278564af Mon Sep 17 00:00:00 2001 -From: Keshava Munegowda <Keshava_mgowda@ti.com> -Date: Wed, 1 Jun 2011 11:02:49 -0700 -Subject: [PATCH 04/13] arm: omap: usb: ehci and ohci hwmod structures for omap3 and omap4 - -Following 2 hwmod strcuture are added: -UHH hwmod of usbhs with uhh base address and -EHCI , OHCI irq and base addresses. -TLL hwmod of usbhs with the TLL base address and irq. - -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> ---- - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 184 ++++++++++++++++++++++++++++ - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 153 +++++++++++++++++++++++ - 2 files changed, 337 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 909a84d..fe9a176 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -84,6 +84,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod; - static struct omap_hwmod omap3xxx_mcbsp5_hwmod; - static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod; - static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod; -+static struct omap_hwmod omap34xx_usb_host_hs_hwmod; -+static struct omap_hwmod omap34xx_usb_tll_hs_hwmod; - - /* L3 -> L4_CORE interface */ - static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { -@@ -3574,6 +3576,185 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), - }; - -+/* -+ * 'usb_host_hs' class -+ * high-speed multi-port usb host controller -+ */ -+static struct omap_hwmod_ocp_if omap34xx_usb_host_hs__l3_main_2 = { -+ .master = &omap34xx_usb_host_hs_hwmod, -+ .slave = &omap3xxx_l3_main_hwmod, -+ .clk = "core_l3_ick", -+ .user = OCP_USER_MPU, -+}; -+ -+static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | -+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = { -+ .name = "usbhs_uhh", -+ .sysc = &omap34xx_usb_host_hs_sysc, -+}; -+ -+static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = { -+ &omap34xx_usb_host_hs__l3_main_2, -+}; -+ -+static struct omap_hwmod_irq_info omap34xx_usb_host_hs_irqs[] = { -+ { .name = "ohci-irq", .irq = 76 }, -+ { .name = "ehci-irq", .irq = 77 }, -+}; -+ -+static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = { -+ { -+ .name = "uhh", -+ .pa_start = 0x48064000, -+ .pa_end = 0x480643ff, -+ .flags = ADDR_TYPE_RT -+ }, -+ { -+ .name = "ohci", -+ .pa_start = 0x48064400, -+ .pa_end = 0x480647FF, -+ .flags = ADDR_MAP_ON_INIT -+ }, -+ { -+ .name = "ehci", -+ .pa_start = 0x48064800, -+ .pa_end = 0x48064CFF, -+ .flags = ADDR_MAP_ON_INIT -+ } -+}; -+ -+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = { -+ .master = &omap3xxx_l4_core_hwmod, -+ .slave = &omap34xx_usb_host_hs_hwmod, -+ .clk = "l4_ick", -+ .addr = omap34xx_usb_host_hs_addrs, -+ .addr_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_addrs), -+ .user = OCP_USER_MPU | OCP_USER_SDMA, -+}; -+ -+static struct omap_hwmod_ocp_if omap34xx_f128m_cfg__usb_host_hs = { -+ .clk = "usbhost_120m_fck", -+ .user = OCP_USER_MPU, -+ .flags = OCPIF_SWSUP_IDLE, -+}; -+ -+static struct omap_hwmod_ocp_if omap34xx_f48m_cfg__usb_host_hs = { -+ .clk = "usbhost_48m_fck", -+ .user = OCP_USER_MPU, -+ .flags = OCPIF_SWSUP_IDLE, -+}; -+ -+static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_slaves[] = { -+ &omap34xx_l4_cfg__usb_host_hs, -+ &omap34xx_f128m_cfg__usb_host_hs, -+ &omap34xx_f48m_cfg__usb_host_hs, -+}; -+ -+static struct omap_hwmod omap34xx_usb_host_hs_hwmod = { -+ .name = "usbhs_uhh", -+ .class = &omap34xx_usb_host_hs_hwmod_class, -+ .mpu_irqs = omap34xx_usb_host_hs_irqs, -+ .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_irqs), -+ .main_clk = "usbhost_ick", -+ .prcm = { -+ .omap2 = { -+ .module_offs = OMAP3430ES2_USBHOST_MOD, -+ .prcm_reg_id = 1, -+ .module_bit = 0, -+ .idlest_reg_id = 1, -+ .idlest_idle_bit = 1, -+ .idlest_stdby_bit = 0, -+ }, -+ }, -+ .slaves = omap34xx_usb_host_hs_slaves, -+ .slaves_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_slaves), -+ .masters = omap34xx_usb_host_hs_masters, -+ .masters_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_masters), -+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -+}; -+ -+/* -+ * 'usb_tll_hs' class -+ * usb_tll_hs module is the adapter on the usb_host_hs ports -+ */ -+static struct omap_hwmod_class_sysconfig omap34xx_usb_tll_hs_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+static struct omap_hwmod_class omap34xx_usb_tll_hs_hwmod_class = { -+ .name = "usbhs_tll", -+ .sysc = &omap34xx_usb_tll_hs_sysc, -+}; -+ -+static struct omap_hwmod_irq_info omap34xx_usb_tll_hs_irqs[] = { -+ { .name = "tll-irq", .irq = 78 }, -+}; -+ -+static struct omap_hwmod_addr_space omap34xx_usb_tll_hs_addrs[] = { -+ { -+ .name = "tll", -+ .pa_start = 0x48062000, -+ .pa_end = 0x48062fff, -+ .flags = ADDR_TYPE_RT -+ }, -+}; -+ -+static struct omap_hwmod_ocp_if omap34xx_f_cfg__usb_tll_hs = { -+ .clk = "usbtll_fck", -+ .user = OCP_USER_MPU, -+ .flags = OCPIF_SWSUP_IDLE, -+}; -+ -+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_tll_hs = { -+ .master = &omap3xxx_l4_core_hwmod, -+ .slave = &omap34xx_usb_tll_hs_hwmod, -+ .clk = "l4_ick", -+ .addr = omap34xx_usb_tll_hs_addrs, -+ .addr_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_addrs), -+ .user = OCP_USER_MPU | OCP_USER_SDMA, -+}; -+ -+static struct omap_hwmod_ocp_if *omap34xx_usb_tll_hs_slaves[] = { -+ &omap34xx_l4_cfg__usb_tll_hs, -+ &omap34xx_f_cfg__usb_tll_hs, -+}; -+ -+static struct omap_hwmod omap34xx_usb_tll_hs_hwmod = { -+ .name = "usbhs_tll", -+ .class = &omap34xx_usb_tll_hs_hwmod_class, -+ .mpu_irqs = omap34xx_usb_tll_hs_irqs, -+ .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_irqs), -+ .main_clk = "usbtll_ick", -+ .prcm = { -+ .omap2 = { -+ .module_offs = CORE_MOD, -+ .prcm_reg_id = 3, -+ .module_bit = 2, -+ .idlest_reg_id = 3, -+ .idlest_idle_bit = 2, -+ }, -+ }, -+ .slaves = omap34xx_usb_tll_hs_slaves, -+ .slaves_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_slaves), -+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -+}; -+ - static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { - &omap3xxx_l3_main_hwmod, - &omap3xxx_l4_core_hwmod, -@@ -3656,6 +3837,9 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { - /* usbotg for am35x */ - &am35xx_usbhsotg_hwmod, - -+ &omap34xx_usb_host_hs_hwmod, -+ &omap34xx_usb_tll_hs_hwmod, -+ - NULL, - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index abc548a..d7112b0 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -66,6 +66,8 @@ static struct omap_hwmod omap44xx_mmc2_hwmod; - static struct omap_hwmod omap44xx_mpu_hwmod; - static struct omap_hwmod omap44xx_mpu_private_hwmod; - static struct omap_hwmod omap44xx_usb_otg_hs_hwmod; -+static struct omap_hwmod omap44xx_usb_host_hs_hwmod; -+static struct omap_hwmod omap44xx_usb_tll_hs_hwmod; - - /* - * Interconnects omap_hwmod structures -@@ -5027,6 +5029,155 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -+/* -+ * 'usb_host_hs' class -+ * high-speed multi-port usb host controller -+ */ -+static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = { -+ .master = &omap44xx_usb_host_hs_hwmod, -+ .slave = &omap44xx_l3_main_2_hwmod, -+ .clk = "l3_div_ck", -+ .user = OCP_USER_MPU | OCP_USER_SDMA, -+}; -+ -+static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | -+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type2, -+}; -+ -+static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = { -+ .name = "usbhs_uhh", -+ .sysc = &omap44xx_usb_host_hs_sysc, -+}; -+ -+static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = { -+ &omap44xx_usb_host_hs__l3_main_2, -+}; -+ -+static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = { -+ { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START }, -+ { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START }, -+}; -+ -+static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = { -+ { -+ .name = "uhh", -+ .pa_start = 0x4a064000, -+ .pa_end = 0x4a0647ff, -+ .flags = ADDR_TYPE_RT -+ }, -+ { -+ .name = "ohci", -+ .pa_start = 0x4A064800, -+ .pa_end = 0x4A064BFF, -+ .flags = ADDR_MAP_ON_INIT -+ }, -+ { -+ .name = "ehci", -+ .pa_start = 0x4A064C00, -+ .pa_end = 0x4A064FFF, -+ .flags = ADDR_MAP_ON_INIT -+ } -+}; -+ -+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = { -+ .master = &omap44xx_l4_cfg_hwmod, -+ .slave = &omap44xx_usb_host_hs_hwmod, -+ .clk = "l4_div_ck", -+ .addr = omap44xx_usb_host_hs_addrs, -+ .addr_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_addrs), -+ .user = OCP_USER_MPU | OCP_USER_SDMA, -+}; -+ -+static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = { -+ &omap44xx_l4_cfg__usb_host_hs, -+}; -+ -+static struct omap_hwmod omap44xx_usb_host_hs_hwmod = { -+ .name = "usbhs_uhh", -+ .class = &omap44xx_usb_host_hs_hwmod_class, -+ .mpu_irqs = omap44xx_usb_host_hs_irqs, -+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_irqs), -+ .main_clk = "usb_host_hs_fck", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL, -+ }, -+ }, -+ .slaves = omap44xx_usb_host_hs_slaves, -+ .slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves), -+ .masters = omap44xx_usb_host_hs_masters, -+ .masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters), -+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -+}; -+ -+/* -+ * 'usb_tll_hs' class -+ * usb_tll_hs module is the adapter on the usb_host_hs ports -+ */ -+static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = { -+ .name = "usbhs_tll", -+ .sysc = &omap44xx_usb_tll_hs_sysc, -+}; -+ -+static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = { -+ { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START }, -+}; -+ -+static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = { -+ { -+ .name = "tll", -+ .pa_start = 0x4a062000, -+ .pa_end = 0x4a063fff, -+ .flags = ADDR_TYPE_RT -+ }, -+}; -+ -+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = { -+ .master = &omap44xx_l4_cfg_hwmod, -+ .slave = &omap44xx_usb_tll_hs_hwmod, -+ .clk = "l4_div_ck", -+ .addr = omap44xx_usb_tll_hs_addrs, -+ .addr_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_addrs), -+ .user = OCP_USER_MPU | OCP_USER_SDMA, -+}; -+ -+static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = { -+ &omap44xx_l4_cfg__usb_tll_hs, -+}; -+ -+static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = { -+ .name = "usbhs_tll", -+ .class = &omap44xx_usb_tll_hs_hwmod_class, -+ .mpu_irqs = omap44xx_usb_tll_hs_irqs, -+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_irqs), -+ .main_clk = "usb_tll_hs_ick", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_reg = OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL, -+ }, -+ }, -+ .slaves = omap44xx_usb_tll_hs_slaves, -+ .slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves), -+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -+}; -+ - static __initdata struct omap_hwmod *omap44xx_hwmods[] = { - - /* dmm class */ -@@ -5173,6 +5324,8 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = { - &omap44xx_wd_timer2_hwmod, - &omap44xx_wd_timer3_hwmod, - -+ &omap44xx_usb_host_hs_hwmod, -+ &omap44xx_usb_tll_hs_hwmod, - NULL, - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0005-arm-omap-usb-register-hwmods-of-usbhs.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0005-arm-omap-usb-register-hwmods-of-usbhs.patch deleted file mode 100644 index 8e9a4ba..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0005-arm-omap-usb-register-hwmods-of-usbhs.patch +++ /dev/null @@ -1,160 +0,0 @@ -From 70f5e1a0e6639710503a9ffb9008ddcd2bb3f06e Mon Sep 17 00:00:00 2001 -From: Keshava Munegowda <Keshava_mgowda@ti.com> -Date: Wed, 1 Jun 2011 11:02:54 -0700 -Subject: [PATCH 05/13] arm: omap: usb: register hwmods of usbhs - -The hwmod structure of uhh and tll are retrived -and registered with omap device - -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> ---- - arch/arm/mach-omap2/usb-host.c | 99 ++++++++++++++-------------------------- - 1 files changed, 35 insertions(+), 64 deletions(-) - -diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c -index 89ae298..9d762c4 100644 ---- a/arch/arm/mach-omap2/usb-host.c -+++ b/arch/arm/mach-omap2/usb-host.c -@@ -28,51 +28,28 @@ - #include <mach/hardware.h> - #include <mach/irqs.h> - #include <plat/usb.h> -+#include <plat/omap_device.h> - - #include "mux.h" - - #ifdef CONFIG_MFD_OMAP_USB_HOST - --#define OMAP_USBHS_DEVICE "usbhs-omap" -- --static struct resource usbhs_resources[] = { -- { -- .name = "uhh", -- .flags = IORESOURCE_MEM, -- }, -- { -- .name = "tll", -- .flags = IORESOURCE_MEM, -- }, -- { -- .name = "ehci", -- .flags = IORESOURCE_MEM, -- }, -- { -- .name = "ehci-irq", -- .flags = IORESOURCE_IRQ, -- }, -- { -- .name = "ohci", -- .flags = IORESOURCE_MEM, -- }, -- { -- .name = "ohci-irq", -- .flags = IORESOURCE_IRQ, -- } --}; -- --static struct platform_device usbhs_device = { -- .name = OMAP_USBHS_DEVICE, -- .id = 0, -- .num_resources = ARRAY_SIZE(usbhs_resources), -- .resource = usbhs_resources, --}; -+#define OMAP_USBHS_DEVICE "usbhs_omap" -+#define USBHS_UHH_HWMODNAME "usbhs_uhh" -+#define USBHS_TLL_HWMODNAME "usbhs_tll" - - static struct usbhs_omap_platform_data usbhs_data; - static struct ehci_hcd_omap_platform_data ehci_data; - static struct ohci_hcd_omap_platform_data ohci_data; - -+static struct omap_device_pm_latency omap_uhhtll_latency[] = { -+ { -+ .deactivate_func = omap_device_idle_hwmods, -+ .activate_func = omap_device_enable_hwmods, -+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, -+ }, -+}; -+ - /* MUX settings for EHCI pins */ - /* - * setup_ehci_io_mux - initialize IO pad mux for USBHOST -@@ -508,7 +485,10 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) - - void __init usbhs_init(const struct usbhs_omap_board_data *pdata) - { -- int i; -+ struct omap_hwmod *oh[2]; -+ struct omap_device *od; -+ int bus_id = -1; -+ int i; - - for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { - usbhs_data.port_mode[i] = pdata->port_mode[i]; -@@ -523,44 +503,35 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata) - usbhs_data.ohci_data = &ohci_data; - - if (cpu_is_omap34xx()) { -- usbhs_resources[0].start = OMAP34XX_UHH_CONFIG_BASE; -- usbhs_resources[0].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1; -- usbhs_resources[1].start = OMAP34XX_USBTLL_BASE; -- usbhs_resources[1].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1; -- usbhs_resources[2].start = OMAP34XX_EHCI_BASE; -- usbhs_resources[2].end = OMAP34XX_EHCI_BASE + SZ_1K - 1; -- usbhs_resources[3].start = INT_34XX_EHCI_IRQ; -- usbhs_resources[4].start = OMAP34XX_OHCI_BASE; -- usbhs_resources[4].end = OMAP34XX_OHCI_BASE + SZ_1K - 1; -- usbhs_resources[5].start = INT_34XX_OHCI_IRQ; - setup_ehci_io_mux(pdata->port_mode); - setup_ohci_io_mux(pdata->port_mode); - } else if (cpu_is_omap44xx()) { -- usbhs_resources[0].start = OMAP44XX_UHH_CONFIG_BASE; -- usbhs_resources[0].end = OMAP44XX_UHH_CONFIG_BASE + SZ_1K - 1; -- usbhs_resources[1].start = OMAP44XX_USBTLL_BASE; -- usbhs_resources[1].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1; -- usbhs_resources[2].start = OMAP44XX_HSUSB_EHCI_BASE; -- usbhs_resources[2].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1; -- usbhs_resources[3].start = OMAP44XX_IRQ_EHCI; -- usbhs_resources[4].start = OMAP44XX_HSUSB_OHCI_BASE; -- usbhs_resources[4].end = OMAP44XX_HSUSB_OHCI_BASE + SZ_1K - 1; -- usbhs_resources[5].start = OMAP44XX_IRQ_OHCI; - setup_4430ehci_io_mux(pdata->port_mode); - setup_4430ohci_io_mux(pdata->port_mode); - } - -- if (platform_device_add_data(&usbhs_device, -- &usbhs_data, sizeof(usbhs_data)) < 0) { -- printk(KERN_ERR "USBHS platform_device_add_data failed\n"); -- goto init_end; -+ oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); -+ if (!oh[0]) { -+ pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME); -+ return; - } - -- if (platform_device_register(&usbhs_device) < 0) -- printk(KERN_ERR "USBHS platform_device_register failed\n"); -+ oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); -+ if (!oh[1]) { -+ pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME); -+ return; -+ } - --init_end: -- return; -+ od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, -+ (void *)&usbhs_data, sizeof(usbhs_data), -+ omap_uhhtll_latency, -+ ARRAY_SIZE(omap_uhhtll_latency), false); -+ -+ if (IS_ERR(od)) { -+ pr_err("Could not build hwmod devices %s, %s\n", -+ USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME); -+ return; -+ } - } - - #else --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0006-arm-omap-usb-device-name-change-for-the-clk-names-of.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0006-arm-omap-usb-device-name-change-for-the-clk-names-of.patch deleted file mode 100644 index c0ac58b..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0006-arm-omap-usb-device-name-change-for-the-clk-names-of.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 64bc651bb56435e4cd86d2ebfa4f301abdbac6e5 Mon Sep 17 00:00:00 2001 -From: Keshava Munegowda <Keshava_mgowda@ti.com> -Date: Wed, 1 Jun 2011 11:02:58 -0700 -Subject: [PATCH 06/13] arm: omap: usb: device name change for the clk names of usbhs - -device name usbhs clocks are changed from -usbhs-omap.0 to usbhs_omap; this is because -in the hwmod registration the device name is set -as usbhs_omap - -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> ---- - arch/arm/mach-omap2/clock3xxx_data.c | 28 ++++++++++++++-------------- - arch/arm/mach-omap2/clock44xx_data.c | 10 +++++----- - drivers/mfd/omap-usb-host.c | 2 +- - 3 files changed, 20 insertions(+), 20 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c -index 75b119b..fabe482 100644 ---- a/arch/arm/mach-omap2/clock3xxx_data.c -+++ b/arch/arm/mach-omap2/clock3xxx_data.c -@@ -3285,7 +3285,7 @@ static struct omap_clk omap3xxx_clks[] = { - CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -- CLK("usbhs-omap.0", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -+ CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), - CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), - CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), -@@ -3321,7 +3321,7 @@ static struct omap_clk omap3xxx_clks[] = { - CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX), - CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX), - CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -- CLK("usbhs-omap.0", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -+ CLK("usbhs_omap", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK("omap_hsmmc.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX), - CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX), -@@ -3367,20 +3367,20 @@ static struct omap_clk omap3xxx_clks[] = { - CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), - CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), - CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -- CLK("usbhs-omap.0", "hs_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -+ CLK("usbhs_omap", "hs_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -- CLK("usbhs-omap.0", "fs_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -+ CLK("usbhs_omap", "fs_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -- CLK("usbhs-omap.0", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -- CLK("usbhs-omap.0", "utmi_p1_gfclk", &dummy_ck, CK_3XXX), -- CLK("usbhs-omap.0", "utmi_p2_gfclk", &dummy_ck, CK_3XXX), -- CLK("usbhs-omap.0", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX), -- CLK("usbhs-omap.0", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX), -- CLK("usbhs-omap.0", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX), -- CLK("usbhs-omap.0", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX), -- CLK("usbhs-omap.0", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX), -- CLK("usbhs-omap.0", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX), -- CLK("usbhs-omap.0", "init_60m_fclk", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -+ CLK("usbhs_omap", "utmi_p1_gfclk", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "utmi_p2_gfclk", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX), -+ CLK("usbhs_omap", "init_60m_fclk", &dummy_ck, CK_3XXX), - CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX), - CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), - CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 8c96567..34e91eb 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -3205,7 +3205,7 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), - CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), - CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X), -- CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), -+ CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck, CK_443X), - CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), - CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), - CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X), -@@ -3217,8 +3217,8 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), - CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), - CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X), -- CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), -- CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), -+ CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck, CK_443X), -+ CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X), - CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), - CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), - CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), -@@ -3227,8 +3227,8 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), - CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), - CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X), -- CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), -- CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), -+ CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick, CK_443X), -+ CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X), - CLK(NULL, "usim_ck", &usim_ck, CK_443X), - CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), - CLK(NULL, "usim_fck", &usim_fck, CK_443X), -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c -index 8552195..43de12a 100644 ---- a/drivers/mfd/omap-usb-host.c -+++ b/drivers/mfd/omap-usb-host.c -@@ -28,7 +28,7 @@ - #include <plat/usb.h> - #include <linux/pm_runtime.h> - --#define USBHS_DRIVER_NAME "usbhs-omap" -+#define USBHS_DRIVER_NAME "usbhs_omap" - #define OMAP_EHCI_DEVICE "ehci-omap" - #define OMAP_OHCI_DEVICE "ohci-omap3" - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0007-mfd-global-Suspend-and-resume-support-of-ehci-and-oh.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0007-mfd-global-Suspend-and-resume-support-of-ehci-and-oh.patch deleted file mode 100644 index 94d5f59..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0007-mfd-global-Suspend-and-resume-support-of-ehci-and-oh.patch +++ /dev/null @@ -1,165 +0,0 @@ -From bf583f2924fd9b2f0356cbd0bbfd58c48d98ef15 Mon Sep 17 00:00:00 2001 -From: Keshava Munegowda <Keshava_mgowda@ti.com> -Date: Wed, 1 Jun 2011 11:03:03 -0700 -Subject: [PATCH 07/13] mfd: global Suspend and resume support of ehci and ohci - -The global suspend and resume functions for usbhs core driver -are implemented.These routine are called when the global suspend -and resume occurs. Before calling these functions, the -bus suspend and resume of ehci and ohci drivers are called -from runtime pm. - -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> ---- - drivers/mfd/omap-usb-host.c | 103 +++++++++++++++++++++++++++++++++++++++++++ - 1 files changed, 103 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c -index 43de12a..32d19e2 100644 ---- a/drivers/mfd/omap-usb-host.c -+++ b/drivers/mfd/omap-usb-host.c -@@ -146,6 +146,10 @@ - #define is_ehci_hsic_mode(x) (x == OMAP_EHCI_PORT_MODE_HSIC) - - -+/* USBHS state bits */ -+#define OMAP_USBHS_INIT 0 -+#define OMAP_USBHS_SUSPEND 4 -+ - struct usbhs_hcd_omap { - struct clk *xclk60mhsp1_ck; - struct clk *xclk60mhsp2_ck; -@@ -165,6 +169,7 @@ struct usbhs_hcd_omap { - u32 usbhs_rev; - spinlock_t lock; - int count; -+ unsigned long state; - }; - /*-------------------------------------------------------------------------*/ - -@@ -809,6 +814,8 @@ static int usbhs_enable(struct device *dev) - (pdata->ehci_data->reset_gpio_port[1], 1); - } - -+ set_bit(OMAP_USBHS_INIT, &omap->state); -+ - end_count: - omap->count++; - spin_unlock_irqrestore(&omap->lock, flags); -@@ -897,6 +904,7 @@ static void usbhs_disable(struct device *dev) - } - - pm_runtime_put_sync(dev); -+ clear_bit(OMAP_USBHS_INIT, &omap->state); - - /* The gpio_free migh sleep; so unlock the spinlock */ - spin_unlock_irqrestore(&omap->lock, flags); -@@ -926,10 +934,105 @@ void omap_usbhs_disable(struct device *dev) - } - EXPORT_SYMBOL_GPL(omap_usbhs_disable); - -+#ifdef CONFIG_PM -+ -+static int usbhs_resume(struct device *dev) -+{ -+ struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); -+ struct usbhs_omap_platform_data *pdata = &omap->platdata; -+ unsigned long flags = 0; -+ -+ dev_dbg(dev, "Resuming TI HSUSB Controller\n"); -+ -+ if (!pdata) { -+ dev_dbg(dev, "missing platform_data\n"); -+ return -ENODEV; -+ } -+ -+ spin_lock_irqsave(&omap->lock, flags); -+ -+ if (!test_bit(OMAP_USBHS_INIT, &omap->state) || -+ !test_bit(OMAP_USBHS_SUSPEND, &omap->state)) -+ goto end_resume; -+ -+ pm_runtime_get_sync(dev); -+ -+ if (is_omap_usbhs_rev2(omap)) { -+ if (is_ehci_tll_mode(pdata->port_mode[0])) { -+ clk_enable(omap->usbhost_p1_fck); -+ clk_enable(omap->usbtll_p1_fck); -+ } -+ if (is_ehci_tll_mode(pdata->port_mode[1])) { -+ clk_enable(omap->usbhost_p2_fck); -+ clk_enable(omap->usbtll_p2_fck); -+ } -+ clk_enable(omap->utmi_p1_fck); -+ clk_enable(omap->utmi_p2_fck); -+ } -+ clear_bit(OMAP_USBHS_SUSPEND, &omap->state); -+ -+end_resume: -+ spin_unlock_irqrestore(&omap->lock, flags); -+ return 0; -+} -+ -+ -+static int usbhs_suspend(struct device *dev) -+{ -+ struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); -+ struct usbhs_omap_platform_data *pdata = &omap->platdata; -+ unsigned long flags = 0; -+ -+ dev_dbg(dev, "Suspending TI HSUSB Controller\n"); -+ -+ if (!pdata) { -+ dev_dbg(dev, "missing platform_data\n"); -+ return -ENODEV; -+ } -+ -+ spin_lock_irqsave(&omap->lock, flags); -+ -+ if (!test_bit(OMAP_USBHS_INIT, &omap->state) || -+ test_bit(OMAP_USBHS_SUSPEND, &omap->state)) -+ goto end_suspend; -+ -+ if (is_omap_usbhs_rev2(omap)) { -+ if (is_ehci_tll_mode(pdata->port_mode[0])) { -+ clk_disable(omap->usbhost_p1_fck); -+ clk_disable(omap->usbtll_p1_fck); -+ } -+ if (is_ehci_tll_mode(pdata->port_mode[1])) { -+ clk_disable(omap->usbhost_p2_fck); -+ clk_disable(omap->usbtll_p2_fck); -+ } -+ clk_disable(omap->utmi_p2_fck); -+ clk_disable(omap->utmi_p1_fck); -+ } -+ -+ set_bit(OMAP_USBHS_SUSPEND, &omap->state); -+ pm_runtime_put_sync(dev); -+ -+end_suspend: -+ spin_unlock_irqrestore(&omap->lock, flags); -+ return 0; -+} -+ -+ -+static const struct dev_pm_ops usbhsomap_dev_pm_ops = { -+ .suspend = usbhs_suspend, -+ .resume = usbhs_resume, -+}; -+ -+#define USBHS_OMAP_DEV_PM_OPS (&usbhsomap_dev_pm_ops) -+#else -+#define USBHS_OMAP_DEV_PM_OPS NULL -+#endif -+ - static struct platform_driver usbhs_omap_driver = { - .driver = { - .name = (char *)usbhs_driver_name, - .owner = THIS_MODULE, -+ .pm = USBHS_OMAP_DEV_PM_OPS, - }, - .remove = __exit_p(usbhs_omap_remove), - }; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0008-MFD-TWL4030-Correct-the-warning-print-during-script-.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0008-MFD-TWL4030-Correct-the-warning-print-during-script-.patch deleted file mode 100644 index e3de467..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0008-MFD-TWL4030-Correct-the-warning-print-during-script-.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 1f2e639755b920398d6592775e0e31f7fb1ca955 Mon Sep 17 00:00:00 2001 -From: Lesly A M <leslyam@ti.com> -Date: Wed, 1 Jun 2011 14:56:38 -0700 -Subject: [PATCH 08/13] MFD: TWL4030: Correct the warning print during script loading - -Correcting the if condition check for printing the warning, -if wakeup script is not updated before updating the sleep script. - -Since the flag 'order' is set to '1' while updating the wakeup script for P1P2, -the condition checking for printing the warning should be if(!order) -(ie: print the warning if wakeup script is not updated before updating the sleep script) - -Signed-off-by: Lesly A M <leslyam@ti.com> -Cc: Nishanth Menon <nm@ti.com> -Cc: David Derrick <dderrick@ti.com> -Cc: Samuel Ortiz <sameo@linux.intel.com> ---- - drivers/mfd/twl4030-power.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c -index 2c0d4d1..8373d79 100644 ---- a/drivers/mfd/twl4030-power.c -+++ b/drivers/mfd/twl4030-power.c -@@ -448,7 +448,7 @@ static int __init load_twl4030_script(struct twl4030_script *tscript, - goto out; - } - if (tscript->flags & TWL4030_SLEEP_SCRIPT) { -- if (order) -+ if (!order) - pr_warning("TWL4030: Bad order of scripts (sleep "\ - "script before wakeup) Leads to boot"\ - "failure on some boards\n"); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0009-MFD-TWL4030-Modifying-the-macro-name-Main_Ref-to-all.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0009-MFD-TWL4030-Modifying-the-macro-name-Main_Ref-to-all.patch deleted file mode 100644 index 6be454a..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0009-MFD-TWL4030-Modifying-the-macro-name-Main_Ref-to-all.patch +++ /dev/null @@ -1,61 +0,0 @@ -From ea9acebfe2d3ca8fb3969eaf327665632142b85d Mon Sep 17 00:00:00 2001 -From: Lesly A M <leslyam@ti.com> -Date: Wed, 1 Jun 2011 14:56:45 -0700 -Subject: [PATCH 09/13] MFD: TWL4030: Modifying the macro name Main_Ref to all caps - -Modifying the macro name Main_Ref to all caps(MAIN_REF). - -Suggested by Nishanth Menon <nm@ti.com> - -Signed-off-by: Lesly A M <leslyam@ti.com> -Cc: Nishanth Menon <nm@ti.com> -Cc: David Derrick <dderrick@ti.com> -Cc: Samuel Ortiz <sameo@linux.intel.com> ---- - arch/arm/mach-omap2/board-rx51-peripherals.c | 2 +- - drivers/mfd/twl4030-power.c | 2 +- - include/linux/i2c/twl.h | 2 +- - 3 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c -index bbcb677..01ee0a1 100644 ---- a/arch/arm/mach-omap2/board-rx51-peripherals.c -+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c -@@ -730,7 +730,7 @@ static struct twl4030_resconfig twl4030_rconfig[] __initdata = { - { .resource = RES_RESET, .devgroup = -1, - .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 - }, -- { .resource = RES_Main_Ref, .devgroup = -1, -+ { .resource = RES_MAIN_REF, .devgroup = -1, - .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 - }, - { 0, 0}, -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c -index 8373d79..8162e43 100644 ---- a/drivers/mfd/twl4030-power.c -+++ b/drivers/mfd/twl4030-power.c -@@ -120,7 +120,7 @@ static u8 res_config_addrs[] = { - [RES_HFCLKOUT] = 0x8b, - [RES_32KCLKOUT] = 0x8e, - [RES_RESET] = 0x91, -- [RES_Main_Ref] = 0x94, -+ [RES_MAIN_REF] = 0x94, - }; - - static int __init twl4030_write_script_byte(u8 address, u8 byte) -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h -index cbbf3b3..aee3a22 100644 ---- a/include/linux/i2c/twl.h -+++ b/include/linux/i2c/twl.h -@@ -502,7 +502,7 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot) - #define RES_32KCLKOUT 26 - #define RES_RESET 27 - /* Power Reference */ --#define RES_Main_Ref 28 -+#define RES_MAIN_REF 28 - - #define TOTAL_RESOURCES 28 - /* --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0010-MFD-TWL4030-power-scripts-for-OMAP3-boards.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0010-MFD-TWL4030-power-scripts-for-OMAP3-boards.patch deleted file mode 100644 index 84e1ae7..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0010-MFD-TWL4030-power-scripts-for-OMAP3-boards.patch +++ /dev/null @@ -1,705 +0,0 @@ -From 0b29e1f61b85dd2d04f035088b70dc287d15b9f0 Mon Sep 17 00:00:00 2001 -From: Lesly A M <leslyam@ti.com> -Date: Wed, 1 Jun 2011 14:56:49 -0700 -Subject: [PATCH 10/13] MFD: TWL4030: power scripts for OMAP3 boards - -Power bus message sequence for TWL4030 to enter sleep/wakeup/warm_reset. - -TWL4030 power scripts which can be used by different OMAP3 boards -with the power companion chip (TWL4030 series). - -The twl4030 generic script can be used by any board file to update -the power data in twl4030_platform_data. - -Since the TWL4030 power script has dependency with APIs in twl4030-power.c -removing the __init for these APIs. - -For more information please see: - http://omapedia.org/wiki/TWL4030_power_scripts - -Signed-off-by: Lesly A M <leslyam@ti.com> -Cc: Nishanth Menon <nm@ti.com> -Cc: David Derrick <dderrick@ti.com> -Cc: Samuel Ortiz <sameo@linux.intel.com> ---- - arch/arm/configs/omap2plus_defconfig | 1 + - arch/arm/mach-omap2/devices.c | 15 ++ - drivers/mfd/Kconfig | 11 + - drivers/mfd/Makefile | 1 + - drivers/mfd/twl4030-power.c | 31 ++-- - drivers/mfd/twl4030-script-omap.c | 373 ++++++++++++++++++++++++++++++++++ - include/linux/i2c/twl.h | 41 ++++- - 7 files changed, 454 insertions(+), 19 deletions(-) - create mode 100644 drivers/mfd/twl4030-script-omap.c - -diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig -index 076db52..d9b9858 100644 ---- a/arch/arm/configs/omap2plus_defconfig -+++ b/arch/arm/configs/omap2plus_defconfig -@@ -184,6 +184,7 @@ CONFIG_TWL4030_WATCHDOG=y - CONFIG_MENELAUS=y - CONFIG_TWL4030_CORE=y - CONFIG_TWL4030_POWER=y -+CONFIG_TWL4030_SCRIPT=m - CONFIG_REGULATOR=y - CONFIG_REGULATOR_TWL4030=y - CONFIG_REGULATOR_TPS65023=y -diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c -index 7b85585..7653329 100644 ---- a/arch/arm/mach-omap2/devices.c -+++ b/arch/arm/mach-omap2/devices.c -@@ -329,6 +329,20 @@ static void omap_init_audio(void) - static inline void omap_init_audio(void) {} - #endif - -+#ifdef CONFIG_ARCH_OMAP3 -+static struct platform_device omap_twl4030_script = { -+ .name = "twl4030_script", -+ .id = -1, -+}; -+ -+static void omap_init_twl4030_script(void) -+{ -+ platform_device_register(&omap_twl4030_script); -+} -+#else -+static inline void omap_init_twl4030_script(void) {} -+#endif -+ - #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) - - #include <plat/mcspi.h> -@@ -691,6 +705,7 @@ static int __init omap2_init_devices(void) - omap_init_sham(); - omap_init_aes(); - omap_init_vout(); -+ omap_init_twl4030_script(); - - return 0; - } -diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig -index fe2370a..ea25d93 100644 ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -204,6 +204,17 @@ config TWL4030_POWER - and load scripts controlling which resources are switched off/on - or reset when a sleep, wakeup or warm reset event occurs. - -+config TWL4030_SCRIPT -+ tristate "Support TWL4030 script for OMAP3 boards" -+ depends on TWL4030_CORE && TWL4030_POWER -+ help -+ Say yes here if you want to use the twl4030 power scripts -+ for OMAP3 boards. Power bus message sequence for -+ TWL4030 to enter sleep/wakeup/warm_reset. -+ -+ TWL4030 power scripts which can be used by different -+ OMAP3 boards with the power companion chip (TWL4030 series). -+ - config TWL4030_CODEC - bool - depends on TWL4030_CORE -diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile -index 419caa9..53ada21 100644 ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -42,6 +42,7 @@ obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o - obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o - obj-$(CONFIG_TWL4030_CODEC) += twl4030-codec.o - obj-$(CONFIG_TWL6030_PWM) += twl6030-pwm.o -+obj-$(CONFIG_TWL4030_SCRIPT) += twl4030-script-omap.o - - obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o - -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c -index 8162e43..91d5bc8 100644 ---- a/drivers/mfd/twl4030-power.c -+++ b/drivers/mfd/twl4030-power.c -@@ -123,7 +123,7 @@ static u8 res_config_addrs[] = { - [RES_MAIN_REF] = 0x94, - }; - --static int __init twl4030_write_script_byte(u8 address, u8 byte) -+static int twl4030_write_script_byte(u8 address, u8 byte) - { - int err; - -@@ -137,7 +137,7 @@ out: - return err; - } - --static int __init twl4030_write_script_ins(u8 address, u16 pmb_message, -+static int twl4030_write_script_ins(u8 address, u16 pmb_message, - u8 delay, u8 next) - { - int err; -@@ -157,7 +157,7 @@ out: - return err; - } - --static int __init twl4030_write_script(u8 address, struct twl4030_ins *script, -+static int twl4030_write_script(u8 address, struct twl4030_ins *script, - int len) - { - int err; -@@ -182,7 +182,7 @@ static int __init twl4030_write_script(u8 address, struct twl4030_ins *script, - return err; - } - --static int __init twl4030_config_wakeup3_sequence(u8 address) -+static int twl4030_config_wakeup3_sequence(u8 address) - { - int err; - u8 data; -@@ -207,7 +207,7 @@ out: - return err; - } - --static int __init twl4030_config_wakeup12_sequence(u8 address) -+static int twl4030_config_wakeup12_sequence(u8 address) - { - int err = 0; - u8 data; -@@ -261,7 +261,7 @@ out: - return err; - } - --static int __init twl4030_config_sleep_sequence(u8 address) -+static int twl4030_config_sleep_sequence(u8 address) - { - int err; - -@@ -275,7 +275,7 @@ static int __init twl4030_config_sleep_sequence(u8 address) - return err; - } - --static int __init twl4030_config_warmreset_sequence(u8 address) -+static int twl4030_config_warmreset_sequence(u8 address) - { - int err; - u8 rd_data; -@@ -323,7 +323,7 @@ out: - return err; - } - --static int __init twl4030_configure_resource(struct twl4030_resconfig *rconfig) -+static int twl4030_configure_resource(struct twl4030_resconfig *rconfig) - { - int rconfig_addr; - int err; -@@ -415,7 +415,7 @@ static int __init twl4030_configure_resource(struct twl4030_resconfig *rconfig) - return 0; - } - --static int __init load_twl4030_script(struct twl4030_script *tscript, -+static int load_twl4030_script(struct twl4030_script *tscript, - u8 address) - { - int err; -@@ -510,8 +510,9 @@ int twl4030_remove_script(u8 flags) - - return err; - } -+EXPORT_SYMBOL_GPL(twl4030_remove_script); - --void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts) -+int twl4030_power_init(struct twl4030_power_data *twl4030_scripts) - { - int err = 0; - int i; -@@ -529,7 +530,6 @@ void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts) - TWL4030_PM_MASTER_PROTECT_KEY); - if (err) - goto unlock; -- - for (i = 0; i < twl4030_scripts->num; i++) { - err = load_twl4030_script(twl4030_scripts->scripts[i], address); - if (err) -@@ -552,18 +552,19 @@ void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts) - TWL4030_PM_MASTER_PROTECT_KEY); - if (err) - pr_err("TWL4030 Unable to relock registers\n"); -- return; -+ return err; - - unlock: - if (err) - pr_err("TWL4030 Unable to unlock registers\n"); -- return; -+ return err; - load: - if (err) - pr_err("TWL4030 failed to load scripts\n"); -- return; -+ return err; - resource: - if (err) - pr_err("TWL4030 failed to configure resource\n"); -- return; -+ return err; - } -+EXPORT_SYMBOL_GPL(twl4030_power_init); -diff --git a/drivers/mfd/twl4030-script-omap.c b/drivers/mfd/twl4030-script-omap.c -new file mode 100644 -index 0000000..867a442 ---- /dev/null -+++ b/drivers/mfd/twl4030-script-omap.c -@@ -0,0 +1,373 @@ -+/* -+ * OMAP power script for PMIC TWL4030 -+ * -+ * Author: Lesly A M <leslyam@ti.com> -+ * -+ * Copyright (C) 2010 Texas Instruments, Inc. -+ * Lesly A M <leslyam@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <linux/i2c/twl.h> -+ -+/* -+ * power management signal connections for OMAP3430 with TWL5030 -+ * -+ * TWL5030 OMAP3430 -+ * ______________________ _____________________ -+ * | | | | -+ * | (P1) NSLEEP1|<----------|SYS_OFFMODE | -+ * | NRESWARM|<----------|NWARMRESET | -+ * | (P2) NSLEEP2|---| | | -+ * | | === | | -+ * | | - | | -+ * | | | | -+ * | VDD1 |---------->| VDD1 | -+ * | VDD2 |---------->| VDD2 | -+ * | VIO |---------->| VDDS | -+ * ________ | VAUX1 | | | -+ * | | | ... | | | -+ * | ENABLE|<--------|CLKEN CLKREQ|<----------|SYS_CLKREQ | -+ * | CLKOUT|-------->|HFCLKIN (P3) HFCLKOUT|---------->|XTALIN | -+ * |________| |______________________| |_____________________| -+ * -+ * -+ * Signal descriptions: -+ * -+ * SYS_OFFMODE - OMAP drives this signal low only when the OMAP is in the -+ * OFF idle mode. It is driven high when a wake up event is detected. -+ * This signal should control the P1 device group in the PMIC. -+ * -+ * SYS_CLKREQ - OMAP should drive this signal low when the OMAP goes into -+ * any idle mode. This signal should control the P3 device group -+ * in the PMIC. It is used to notify PMIC when XTALIN is no longer needed. -+ * -+ * NSLEEP1(P1) - When this signal goes low the P1 sleep sequence is executed -+ * in the PMIC turning off certain resources. When this signal goes high -+ * the P1 active sequence is executed turning back on certain resources. -+ * -+ * NSLEEP2(P2) - This signal controls the P2 device group of the PMIC. -+ * It is not used in this setup and should be tied to ground. -+ * This can be used for connecting a different processor or MODEM chip. -+ * -+ * CLKREQ(P3) - When this signal goes low the P3 sleep sequence is executed -+ * in the PMIC turning off HFCLKOUT. When this signal goes high -+ * the P3 active sequence is executed turning back on HFCLKOUT and other -+ * resources. -+ * -+ * CLKEN - Enable signal for oscillator. Should only go low when OMAP is -+ * in the OFF idle mode due to long oscillator startup times. -+ * -+ * HFCLKIN - Oscillator output clock into PMIC. -+ * -+ * HFCLKOUT - System clock output from PMIC to OMAP. -+ * -+ * XTALIN - OMAP system clock input(HFCLKOUT). -+ */ -+ -+/* -+ * Recommended sleep and active sequences for TWL5030 when connected to OMAP3 -+ * -+ * WARNING: If the board is using NSLEEP2(P2), should modify this script and -+ * setuptime values accordingly. -+ * -+ * Chip Retention/Off (using i2c for scaling voltage): -+ * When OMAP de-assert the SYS_CLKREQ signal, only HFCLKOUT is affected -+ * since it is the only resource assigned to P3 only. -+ * -+ * Sysoff (using sys_off signal): -+ * When OMAP de-assert the SYS_OFFMODE signal A2S(active to sleep sequence) -+ * on the PMIC is executed. This will put resources of TYPE2=1 and TYPE2=2 -+ * into sleep. At this point only resources assigned to P1 only will be -+ * affected (VDD1, VDD2 & VPLL1). -+ * -+ * Next the OMAP will lower SYS_CLKREQ which will allow the A2S sequence -+ * in PMIC to execute again. This will put resources of TYPE2=1 and TYPE2=2 -+ * into sleep but will affect resources that are assigned to P3(HFCLKOUT) -+ * only or assigned to P1 and P3. -+ * -+ * On wakeup event OMAP goes active and pulls the SYS_CLKREQ high, -+ * which will execute the P3 S2A sequence on the PMIC. This will turn on -+ * resources assigned to P3 or assigned to P1 and P3 and of TYPE2=2. -+ * -+ * Next the OMAP will wait the PRM_VOLTOFFSET time and then de-assert -+ * the SYS_OFFMODE pin allowing the PMIC to execute the P1 S2A active -+ * sequence. This will turn on resources assigned to P1 or assigned to -+ * P1 and P3 and of TYPE2=1. -+ * -+ * Timing diagram for OMAP wakeup from OFFMODE using sys_off signal -+ * _____________________________________________________________ -+ * OMAP active __/ -+ * |<--------------------PRM_CLKSETP-------------------->| -+ * ______________________________________________________ -+ * SYS_CLKREQ _________/ -+ * ___________________________________________________ -+ * CLKEN ____________/ -+ * -+ * HFCLKIN _______________________________________________///////////////// -+ * -+ * HFCLKOUT __________________________________________________////////////// -+ * |<---PRM_VOLTOFFSET-->| -+ * ________________________________ -+ * SYS_OFFMODE _______________________________/ -+ * |<--------PRM_VOLTSETUP2------->| -+ * ___________ -+ * VPLL1 ____________________________________________________/ -+ * __ -+ * VDD1 _____________________________________________________________/ -+ * __ -+ * VDD2 _____________________________________________________________/ -+ * -+ * Other resources which are not handled by this script should be -+ * controlled by the respective drivers using them (VAUX1, VAUX2, VAUX3, -+ * VAUX4, VMMC1, VMMC2, VPLL2, VSIM, VDAC, VUSB1V5, VUSB1V8 & VUSB3V1). -+ * -+ * More info: -+ * http://omapedia.org/wiki/TWL4030_power_scripts -+ */ -+ -+/** -+ * DOC: Sleep to active sequence for P1/P2 -+ * -+ * Sequence to control the TWL4030 Power resources, -+ * when the system wakeup from sleep. -+ * Executed upon P1_P2 transition for wakeup -+ * (sys_offmode signal de-asserted on OMAP). -+ */ -+static struct twl4030_ins wakeup_p12_seq[] __initdata = { -+ /* -+ * Broadcast message to put resources to active -+ * -+ * Since we are not using TYPE, resources which have TYPE2 configured -+ * as 1 will be targeted (VPLL1, VDD1, VDD2, REGEN, NRES_PWRON, SYSEN). -+ */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R1, -+ RES_STATE_ACTIVE), 2}, -+}; -+ -+static struct twl4030_script wakeup_p12_script __initdata = { -+ .script = wakeup_p12_seq, -+ .size = ARRAY_SIZE(wakeup_p12_seq), -+ .flags = TWL4030_WAKEUP12_SCRIPT, -+}; -+ -+/** -+ * DOC: Sleep to active sequence for P3 -+ * -+ * Sequence to control the TWL4030 Power resources, -+ * when the system wakeup from sleep. -+ * Executed upon P3 transition for wakeup -+ * (clkreq signal asserted on OMAP). -+ */ -+static struct twl4030_ins wakeup_p3_seq[] __initdata = { -+ /* -+ * Broadcast message to put resources to active -+ * -+ * Since we are not using TYPE, resources which have TYPE2 configured -+ * as 2 will be targeted -+ * (VINTANA1, VINTANA2, VINTDIG, VIO, CLKEN, HFCLKOUT). -+ */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2, -+ RES_STATE_ACTIVE), 2}, -+}; -+ -+static struct twl4030_script wakeup_p3_script __initdata = { -+ .script = wakeup_p3_seq, -+ .size = ARRAY_SIZE(wakeup_p3_seq), -+ .flags = TWL4030_WAKEUP3_SCRIPT, -+}; -+ -+/** -+ * DOC: Active to sleep sequence for P1/P2/P3 -+ * -+ * Sequence to control the TWL4030 Power resources, -+ * when the system goes into sleep. -+ * Executed upon P1_P2/P3 transition for sleep. -+ * (sys_offmode signal asserted/clkreq de-asserted on OMAP). -+ */ -+static struct twl4030_ins sleep_on_seq[] __initdata = { -+ /* Broadcast message to put res to sleep (TYPE2 = 1, 2) */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R1, -+ RES_STATE_SLEEP), 2}, -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2, -+ RES_STATE_SLEEP), 2}, -+}; -+ -+static struct twl4030_script sleep_on_script __initdata = { -+ .script = sleep_on_seq, -+ .size = ARRAY_SIZE(sleep_on_seq), -+ .flags = TWL4030_SLEEP_SCRIPT, -+}; -+ -+/** -+ * DOC: Warm reset sequence -+ * -+ * Sequence to reset the TWL4030 Power resources, -+ * when the system gets warm reset. -+ * Executed upon warm reset signal. -+ * -+ * First the device is put in reset, then the system clock is requested to -+ * the external oscillator, and default ON power reference and power providers -+ * are enabled. Next some additional resources which are software controlled -+ * are enabled. Finally sequence is ended by the release of TWL5030 reset. -+ */ -+static struct twl4030_ins wrst_seq[] __initdata = { -+ /* -+ * As a workaround for OMAP Erratum (ID: i537 - OMAP HS devices are -+ * not recovering from warm reset while in OFF mode) -+ * NRESPWRON is toggled to force a power on reset condition to OMAP -+ */ -+ /* Trun OFF NRES_PWRON */ -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_NRES_PWRON, RES_STATE_OFF), 2}, -+ /* Reset twl4030 */ -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, -+ /* Reset MAIN_REF */ -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_MAIN_REF, RES_STATE_WRST), 2}, -+ /* Reset All type2_group2 */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2, -+ RES_STATE_WRST), 2}, -+ /* Reset VUSB_3v1 */ -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_VUSB_3V1, RES_STATE_WRST), 2}, -+ /* Reset All type2_group1 */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R1, -+ RES_STATE_WRST), 2}, -+ /* Reset the Reset & Contorl_signals */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0, -+ RES_STATE_WRST), 2}, -+ /* Re-enable twl4030 */ -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, -+ /* Trun ON NRES_PWRON */ -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_NRES_PWRON, RES_STATE_ACTIVE), 2}, -+}; -+ -+static struct twl4030_script wrst_script __initdata = { -+ .script = wrst_seq, -+ .size = ARRAY_SIZE(wrst_seq), -+ .flags = TWL4030_WRST_SCRIPT, -+}; -+ -+/* TWL4030 script for sleep, wakeup & warm_reset */ -+static struct twl4030_script *twl4030_scripts[] __initdata = { -+ &wakeup_p12_script, -+ &wakeup_p3_script, -+ &sleep_on_script, -+ &wrst_script, -+}; -+ -+/** -+ * DOC: TWL4030 resource configuration -+ * -+ * Resource which are attached to P1 device group alone -+ * will go to sleep state, when sys_off signal from OMAP is de-asserted. -+ * (VPLL1, VDD1, VDD2) -+ * -+ * None of the resources are attached to P2 device group alone. -+ * (WARNING: If MODEM or connectivity chip is connected to NSLEEP2 PIN on -+ * TWL4030, should modify the resource configuration accordingly). -+ * -+ * Resource which are attached to P3 device group alone -+ * will go to sleep state, when clk_req signal from OMAP is de-asserted. -+ * (HFCLKOUT) -+ * -+ * Resource which are attached to more than one device group -+ * will go to sleep state, when corresponding signals are de-asserted. -+ * (VINTANA1, VINTANA2, VINTDIG, VIO, REGEN, NRESPWRON, CLKEN, SYSEN) -+ * -+ * REGEN is an output of the device which can be connected to slave power ICs -+ * or external LDOs that power on before voltage for the IO interface (VIO). -+ * -+ * SYSEN is a bidirectional signal of the device that controls slave power ICs. -+ * In master mode, the device sets SYSEN high to enable the slave power ICs. -+ * In slave mode, when one of the power ICs drives the SYSEN signal low, -+ * all devices of the platform stay in the wait-on state. -+ * -+ * Resource which are attached to none of the device group by default -+ * will be in sleep state. These resource should be controlled by -+ * the respective drivers using them. -+ * Resource which are controlled by drivers are not modified here. -+ * (VAUX1, VAUX2, VAUX3, VAUX4, VMMC1, VMMC2, VPLL2, VSIM, VDAC, -+ * VUSB1V5, VUSB1V8, VUSB3V1) -+ * -+ * Resource using reset values. -+ * (32KCLKOUT, TRITON_RESET, MAINREF) -+ */ -+static struct twl4030_resconfig twl4030_rconfig[] __initdata = { -+ { .resource = RES_VPLL1, .devgroup = DEV_GRP_P1, .type = 3, -+ .type2 = 1, .remap_sleep = RES_STATE_OFF }, -+ { .resource = RES_VINTANA1, .devgroup = DEV_GRP_ALL, .type = 1, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_VINTANA2, .devgroup = DEV_GRP_ALL, .type = 0, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_VINTDIG, .devgroup = DEV_GRP_ALL, .type = 1, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_VIO, .devgroup = DEV_GRP_ALL, .type = 2, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_VDD1, .devgroup = DEV_GRP_P1, -+ .type = 4, .type2 = 1, .remap_sleep = RES_STATE_OFF }, -+ { .resource = RES_VDD2, .devgroup = DEV_GRP_P1, -+ .type = 3, .type2 = 1, .remap_sleep = RES_STATE_OFF }, -+ { .resource = RES_REGEN, .devgroup = DEV_GRP_ALL, .type = 2, -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_ALL, .type = 0, -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_CLKEN, .devgroup = DEV_GRP_ALL, .type = 3, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_SYSEN, .devgroup = DEV_GRP_ALL, .type = 6, -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, -+ .type = 0, .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { 0, 0}, -+}; -+ -+struct twl4030_power_data twl4030_generic_script __initdata = { -+ .scripts = twl4030_scripts, -+ .num = ARRAY_SIZE(twl4030_scripts), -+ .resource_config = twl4030_rconfig, -+}; -+ -+static int __init twl4030_script_probe(struct platform_device *pdev) -+{ -+ return twl4030_power_init(&twl4030_generic_script); -+} -+ -+static int twl4030_script_remove(struct platform_device *pdev) -+{ -+ return twl4030_remove_script(TWL4030_SLEEP_SCRIPT | -+ TWL4030_WAKEUP12_SCRIPT | TWL4030_WAKEUP3_SCRIPT | -+ TWL4030_WRST_SCRIPT); -+} -+ -+static struct platform_driver twl4030_script_driver = { -+ .remove = twl4030_script_remove, -+ .driver = { -+ .name = "twl4030_script", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init twl4030_script_init(void) -+{ -+ /* Register the TWL4030 script driver */ -+ return platform_driver_probe(&twl4030_script_driver, -+ twl4030_script_probe); -+} -+ -+static void __exit twl4030_script_cleanup(void) -+{ -+ /* Unregister TWL4030 script driver */ -+ platform_driver_unregister(&twl4030_script_driver); -+} -+ -+module_init(twl4030_script_init); -+module_exit(twl4030_script_cleanup); -+ -+MODULE_DESCRIPTION("OMAP TWL4030 script driver"); -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Texas Instruments Inc"); -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h -index aee3a22..f343974 100644 ---- a/include/linux/i2c/twl.h -+++ b/include/linux/i2c/twl.h -@@ -205,6 +205,12 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot) - return -EIO; - } - #endif -+ -+#ifdef CONFIG_TWL4030_POWER -+extern struct twl4030_power_data twl4030_generic_script; -+#else -+#define twl4030_generic_script NULL; -+#endif - /*----------------------------------------------------------------------*/ - - /* -@@ -437,9 +443,23 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot) - - /* Power bus message definitions */ - --/* The TWL4030/5030 splits its power-management resources (the various -- * regulators, clock and reset lines) into 3 processor groups - P1, P2 and -- * P3. These groups can then be configured to transition between sleep, wait-on -+/* -+ * The TWL4030/5030 splits its power-management resources (the various -+ * regulators, clock and reset lines) into 3 processor groups - P1, P2 and P3. -+ * -+ * Resources attached to device group P1 is managed depending on the state of -+ * NSLEEP1 pin of TWL4030, which is connected to sys_off signal from OMAP -+ * -+ * Resources attached to device group P2 is managed depending on the state of -+ * NSLEEP2 pin of TWL4030, which is can be connected to a modem or -+ * connectivity chip -+ * -+ * Resources attached to device group P3 is managed depending on the state of -+ * CLKREQ pin of TWL4030, which is connected to clk request signal from OMAP -+ * -+ * If required these resources can be attached to combination of P1/P2/P3. -+ * -+ * These groups can then be configured to transition between sleep, wait-on - * and active states by sending messages to the power bus. See Section 5.4.2 - * Power Resources of TWL4030 TRM - */ -@@ -449,7 +469,17 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot) - #define DEV_GRP_P1 0x1 /* P1: all OMAP devices */ - #define DEV_GRP_P2 0x2 /* P2: all Modem devices */ - #define DEV_GRP_P3 0x4 /* P3: all peripheral devices */ -+#define DEV_GRP_ALL 0x7 /* P1/P2/P3: all devices */ - -+/* -+ * The 27 power resources in TWL4030 is again divided into -+ * analog resources: -+ * Power Providers - LDO regulators, dc-to-dc regulators -+ * Power Reference - analog reference -+ * -+ * and digital resources: -+ * Reset & Clock - reset and clock signals. -+ */ - /* Resource groups */ - #define RES_GRP_RES 0x0 /* Reserved */ - #define RES_GRP_PP 0x1 /* Power providers */ -@@ -461,7 +491,10 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot) - #define RES_GRP_ALL 0x7 /* All resource groups */ - - #define RES_TYPE2_R0 0x0 -+#define RES_TYPE2_R1 0x1 -+#define RES_TYPE2_R2 0x2 - -+#define RES_TYPE_R0 0x0 - #define RES_TYPE_ALL 0x7 - - /* Resource states */ -@@ -636,7 +669,7 @@ struct twl4030_power_data { - #define TWL4030_RESCONFIG_UNDEF ((u8)-1) - }; - --extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts); -+extern int twl4030_power_init(struct twl4030_power_data *triton2_scripts); - extern int twl4030_remove_script(u8 flags); - - struct twl4030_codec_audio_data { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0011-MFD-TWL4030-TWL-version-checking.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0011-MFD-TWL4030-TWL-version-checking.patch deleted file mode 100644 index 6de2193..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0011-MFD-TWL4030-TWL-version-checking.patch +++ /dev/null @@ -1,164 +0,0 @@ -From 3ceb224732230934aba7d082f3e2ca96c14a9ca0 Mon Sep 17 00:00:00 2001 -From: Lesly A M <leslyam@ti.com> -Date: Wed, 1 Jun 2011 14:56:56 -0700 -Subject: [PATCH 11/13] MFD: TWL4030: TWL version checking - -Added API to get the TWL5030 Si version from the IDCODE register. -It is used for enabling the workaround for TWL erratum 27. - -Signed-off-by: Lesly A M <leslyam@ti.com> -Cc: Nishanth Menon <nm@ti.com> -Cc: David Derrick <dderrick@ti.com> -Cc: Samuel Ortiz <sameo@linux.intel.com> ---- - drivers/mfd/twl-core.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/i2c/twl.h | 17 ++++++++++++- - 2 files changed, 78 insertions(+), 1 deletions(-) - -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c -index 9096d7d..a60601d 100644 ---- a/drivers/mfd/twl-core.c -+++ b/drivers/mfd/twl-core.c -@@ -251,6 +251,9 @@ - /* is driver active, bound to a chip? */ - static bool inuse; - -+/* TWL IDCODE Register value */ -+static u32 twl_idcode; -+ - static unsigned int twl_id; - unsigned int twl_rev(void) - { -@@ -509,6 +512,58 @@ EXPORT_SYMBOL(twl_i2c_read_u8); - - /*----------------------------------------------------------------------*/ - -+/** -+ * twl_read_idcode_register - API to read the IDCODE register. -+ * -+ * Unlocks the IDCODE register and read the 32 bit value. -+ */ -+static int twl_read_idcode_register(void) -+{ -+ int err; -+ -+ err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK, -+ REG_UNLOCK_TEST_REG); -+ if (err) { -+ pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err); -+ goto fail; -+ } -+ -+ err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_idcode), -+ REG_IDCODE_7_0, 4); -+ if (err) { -+ pr_err("TWL4030: unable to read IDCODE -%d\n", err); -+ goto fail; -+ } -+ -+ err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG); -+ if (err) -+ pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err); -+fail: -+ return err; -+} -+ -+/** -+ * twl_get_type - API to get TWL Si type. -+ * -+ * Api to get the TWL Si type from IDCODE value. -+ */ -+int twl_get_type(void) -+{ -+ return TWL_SIL_TYPE(twl_idcode); -+} -+EXPORT_SYMBOL_GPL(twl_get_type); -+ -+/** -+ * twl_get_version - API to get TWL Si version. -+ * -+ * Api to get the TWL Si version from IDCODE value. -+ */ -+int twl_get_version(void) -+{ -+ return TWL_SIL_REV(twl_idcode); -+} -+EXPORT_SYMBOL_GPL(twl_get_version); -+ - static struct device * - add_numbered_child(unsigned chip, const char *name, int num, - void *pdata, unsigned pdata_len, -@@ -1071,6 +1126,7 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id) - unsigned i; - struct twl4030_platform_data *pdata = client->dev.platform_data; - u8 temp; -+ int ret = 0; - - if (!pdata) { - dev_dbg(&client->dev, "no platform data?\n"); -@@ -1117,6 +1173,12 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id) - /* setup clock framework */ - clocks_init(&client->dev, pdata->clock); - -+ /* read TWL IDCODE Register */ -+ if (twl_id == TWL4030_CLASS_ID) { -+ ret = twl_read_idcode_register(); -+ WARN(ret < 0, "Error: reading twl_idcode register value\n"); -+ } -+ - /* load power event scripts */ - if (twl_has_power() && pdata->power) - twl4030_power_init(pdata->power); -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h -index f343974..23ec058 100644 ---- a/include/linux/i2c/twl.h -+++ b/include/linux/i2c/twl.h -@@ -151,7 +151,12 @@ - #define MMC_PU (0x1 << 3) - #define MMC_PD (0x1 << 2) - -- -+#define TWL_SIL_TYPE(rev) ((rev) & 0x00FFFFFF) -+#define TWL_SIL_REV(rev) ((rev) >> 24) -+#define TWL_SIL_5030 0x09002F -+#define TWL5030_REV_1_0 0x00 -+#define TWL5030_REV_1_1 0x10 -+#define TWL5030_REV_1_2 0x30 - - #define TWL4030_CLASS_ID 0x4030 - #define TWL6030_CLASS_ID 0x6030 -@@ -181,6 +186,9 @@ int twl_i2c_read_u8(u8 mod_no, u8 *val, u8 reg); - int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); - int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); - -+int twl_get_type(void); -+int twl_get_version(void); -+ - int twl6030_interrupt_unmask(u8 bit_mask, u8 offset); - int twl6030_interrupt_mask(u8 bit_mask, u8 offset); - -@@ -286,7 +294,12 @@ extern struct twl4030_power_data twl4030_generic_script; - *(Use TWL_4030_MODULE_INTBR) - */ - -+#define REG_IDCODE_7_0 0x00 -+#define REG_IDCODE_15_8 0x01 -+#define REG_IDCODE_16_23 0x02 -+#define REG_IDCODE_31_24 0x03 - #define REG_GPPUPDCTR1 0x0F -+#define REG_UNLOCK_TEST_REG 0x12 - - /*I2C1 and I2C4(SR) SDA/SCL pull-up control bits */ - -@@ -295,6 +308,8 @@ extern struct twl4030_power_data twl4030_generic_script; - #define SR_I2C_SCL_CTRL_PU BIT(4) - #define SR_I2C_SDA_CTRL_PU BIT(6) - -+#define TWL_EEPROM_R_UNLOCK 0x49 -+ - /*----------------------------------------------------------------------*/ - - /* --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0012-MFD-TWL4030-workaround-changes-for-Erratum-27.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0012-MFD-TWL4030-workaround-changes-for-Erratum-27.patch deleted file mode 100644 index 6fe9dbf..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0012-MFD-TWL4030-workaround-changes-for-Erratum-27.patch +++ /dev/null @@ -1,341 +0,0 @@ -From 0bec9f7b20e7c61e0bab93195ec39cf94f1f8e25 Mon Sep 17 00:00:00 2001 -From: Lesly A M <leslyam@ti.com> -Date: Wed, 1 Jun 2011 14:57:01 -0700 -Subject: [PATCH 12/13] MFD: TWL4030: workaround changes for Erratum 27 - -Workaround for TWL5030 Silicon Errata 27 & 28: - 27 - VDD1, VDD2, may have glitches when their output value is updated. - 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal clock - is switched from internal to external. - -Erratum 27: - If the DCDC regulators is running on their internal oscillator, - negative glitches may occur on VDD1, VDD2 output when voltage is changed. - The OMAP device may reboot if the VDD1 or VDD2 go below the - core minimum operating voltage. - - WORKAROUND - Set up the TWL5030 DC-DC power supplies to use the HFCLKIN instead of - the internal oscillator. - -Erratum 28: - VDD1/VDD2 clock system may hang during switching the clock source from - internal oscillator to external. VDD1/VDD2 output voltages may collapse - if clock stops. - - WORKAROUND - If HFCLK is disabled in OFFMODE, modify the sleep/wakeup sequence and - setuptimes to make sure the switching will happen only when HFCLKIN is stable. - Also use the TWL5030 watchdog to safeguard the first switching from - internal oscillator to HFCLKIN during the TWL5030 init. - - IMPACT - power sequence is changed. - sleep/wakeup time values will be changed. - -The workaround changes are called from twl4030_power_init(), since we have to -make some i2c_read calls to check the TWL4030 version & the i2c will not be -initialized in the early stage. - -This workaround is required for TWL5030 Silicon version less than ES1.2 -The power script & setup time changes are recommended by TI HW team. - -For more information please see: - http://omapedia.org/wiki/TWL4030_power_scripts - -Changes taken from TWL4030 Erratum 27 workaround patch by Nishanth Menon. - -Signed-off-by: Lesly A M <leslyam@ti.com> -Cc: Nishanth Menon <nm@ti.com> -Cc: David Derrick <dderrick@ti.com> -Cc: Samuel Ortiz <sameo@linux.intel.com> ---- - drivers/mfd/twl4030-power.c | 79 +++++++++++++++++++ - drivers/mfd/twl4030-script-omap.c | 150 +++++++++++++++++++++++++++++++++++++ - include/linux/i2c/twl.h | 1 + - 3 files changed, 230 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c -index 91d5bc8..8af3fe3 100644 ---- a/drivers/mfd/twl4030-power.c -+++ b/drivers/mfd/twl4030-power.c -@@ -63,6 +63,14 @@ static u8 twl4030_start_script_address = 0x2b; - #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) - #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a) - -+#define R_VDD1_OSC 0x5C -+#define R_VDD2_OSC 0x6A -+#define R_VIO_OSC 0x52 -+#define EXT_FS_CLK_EN BIT(6) -+ -+#define R_WDT_CFG 0x03 -+#define WDT_WRK_TIMEOUT 0x03 -+ - /* resource configuration registers - <RESOURCE>_DEV_GRP at address 'n+0' - <RESOURCE>_TYPE at address 'n+1' -@@ -512,6 +520,67 @@ int twl4030_remove_script(u8 flags) - } - EXPORT_SYMBOL_GPL(twl4030_remove_script); - -+/** -+ * twl_dcdc_use_hfclk - API to use HFCLK for TWL DCDCs -+ * -+ * TWL DCDCs switching to HFCLK instead of using internal RC oscillator. -+ */ -+static int twl_dcdc_use_hfclk(void) -+{ -+ u8 val; -+ u8 smps_osc_reg[] = {R_VDD1_OSC, R_VDD2_OSC, R_VIO_OSC}; -+ int i; -+ int err; -+ -+ for (i = 0; i < sizeof(smps_osc_reg); i++) { -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &val, -+ smps_osc_reg[i]); -+ val |= EXT_FS_CLK_EN; -+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, val, -+ smps_osc_reg[i]); -+ } -+ return err; -+} -+ -+/** -+ * twl_erratum27_workaround - Workaround for TWL5030 Silicon Erratum 27 -+ * 27 - VDD1, VDD2, may have glitches when their output value is updated. -+ * 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal clock is -+ * switched from internal to external. -+ * -+ * Workaround requires the TWL DCDCs to use HFCLK instead of -+ * internal oscillator. Also enable TWL watchdog before switching the osc -+ * to recover if the VDD1/VDD2 stop working. -+ */ -+static void twl_erratum27_workaround(void) -+{ -+ u8 wdt_counter_val = 0; -+ int err; -+ -+ /* Setup the twl wdt to take care of borderline failure case */ -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &wdt_counter_val, -+ R_WDT_CFG); -+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, WDT_WRK_TIMEOUT, -+ R_WDT_CFG); -+ -+ /* TWL DCDC switching to HFCLK */ -+ err |= twl_dcdc_use_hfclk(); -+ -+ /* restore the original value */ -+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, wdt_counter_val, -+ R_WDT_CFG); -+ if (err) -+ pr_warning("TWL4030: workaround setup failed!\n"); -+} -+ -+static bool is_twl5030_erratum27wa_required(void) -+{ -+ if (twl_get_type() == TWL_SIL_5030) -+ return (twl_get_version() < TWL5030_REV_1_2); -+ -+ return 0; -+} -+ - int twl4030_power_init(struct twl4030_power_data *twl4030_scripts) - { - int err = 0; -@@ -530,6 +599,16 @@ int twl4030_power_init(struct twl4030_power_data *twl4030_scripts) - TWL4030_PM_MASTER_PROTECT_KEY); - if (err) - goto unlock; -+ -+ /* Applying TWL5030 Erratum 27 WA based on Si revision & -+ * flag updated from board file*/ -+ if (is_twl5030_erratum27wa_required()) { -+ pr_info("TWL5030: Enabling workaround for Si Erratum 27\n"); -+ twl_erratum27_workaround(); -+ if (twl4030_scripts->twl5030_erratum27wa_script) -+ twl4030_scripts->twl5030_erratum27wa_script(); -+ } -+ - for (i = 0; i < twl4030_scripts->num; i++) { - err = load_twl4030_script(twl4030_scripts->scripts[i], address); - if (err) -diff --git a/drivers/mfd/twl4030-script-omap.c b/drivers/mfd/twl4030-script-omap.c -index 867a442..ff93fd2 100644 ---- a/drivers/mfd/twl4030-script-omap.c -+++ b/drivers/mfd/twl4030-script-omap.c -@@ -326,10 +326,160 @@ static struct twl4030_resconfig twl4030_rconfig[] __initdata = { - { 0, 0}, - }; - -+/* -+ * Sleep and active sequences with changes for TWL5030 Erratum 27 workaround -+ * -+ * Sysoff (using sys_off signal): -+ * When SYS_CLKREQ goes low during retention no resources will be affected -+ * since no resources are assigned to P3 only. -+ * -+ * Since all resources are assigned to P1 and P3 then all resources -+ * will be affected on the falling edge of P3 (SYS_CLKREQ). -+ * When OMAP lower the SYS_CLKREQ signal PMIC will execute the -+ * A2S sequence in which HFCLKOUT is dissabled first and -+ * after 488.32 usec(PRM_VOLTOFFSET) resources assigned to P1 and P3 -+ * and of TYPE2=1 are put to sleep -+ * (VDD1, VDD2, VPLL1, REGEN, NRESPWRON & SYSEN). -+ * Again after a 61.04 usec resources assigned to P1 and P3 -+ * and of TYPE2=2 are put to sleep -+ * (VINTANA1, VINTANA2, VINTDIG, VIO & CLKEN). -+ * -+ * On wakeup event OMAP goes active and pulls the SYS_CLKREQ high, -+ * and will execute the S2A sequence which is same for P1_P2 & P3. -+ * This will turn on all resources of TYPE2=2 to go to the active state. -+ * Three dummy broadcast messages are added to get a delay of ~10 ms -+ * before enabling the HFCLKOUT resource. And after a 30.52 usec -+ * all resources of TYPE2=1 are put to the active state. -+ * -+ * This 10ms delay can be reduced if the oscillator is having less -+ * stabilization time. A should be taken care if it needs more time -+ * for stabilization. -+ * -+ */ -+ -+/** -+ * DOC: Sleep to Active sequence for P1/P2/P3 -+ * -+ * The wakeup sequence is adjusted to do the VDD1/VDD2 voltage ramp-up -+ * only after HFCLKIN is stabilized and the HFCLKOUT is enabled. -+ */ -+static struct twl4030_ins wakeup_seq_erratum27[] __initdata = { -+ /* -+ * Broadcast message to put res(TYPE2 = 2) to active. -+ * Wait for ~10 mS (ramp-up time for OSC on the board) -+ * after HFCLKIN is enabled -+ */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2, -+ RES_STATE_ACTIVE), 55}, -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2, -+ RES_STATE_ACTIVE), 55}, -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2, -+ RES_STATE_ACTIVE), 54}, -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2, -+ RES_STATE_ACTIVE), 1}, -+ /* Singular message to enable HCLKOUT after HFCLKIN is stabilized */ -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_HFCLKOUT, RES_STATE_ACTIVE), 1}, -+ /* -+ * Broadcast message to put res(TYPE2 = 1) to active. -+ * VDD1/VDD2 ramp-up after HFCLKIN is stable and HFCLKOUT is enabled. -+ */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R1, -+ RES_STATE_ACTIVE), 2}, -+}; -+ -+static struct twl4030_script wakeup_script_erratum27 __initdata = { -+ .script = wakeup_seq_erratum27, -+ .size = ARRAY_SIZE(wakeup_seq_erratum27), -+ .flags = TWL4030_WAKEUP12_SCRIPT | TWL4030_WAKEUP3_SCRIPT, -+}; -+ -+/** -+ * DOC: Active to Sleep sequence for P1/P2/P3 -+ * -+ * The sleep sequence is adjusted to do the switching of VDD1/VDD2/VIO OSC from -+ * HFCLKIN to internal oscillator when the HFCLKIN is stable. -+ */ -+static struct twl4030_ins sleep_on_seq_erratum27[] __initdata = { -+ /* -+ * Singular message to disable HCLKOUT. -+ * Wait for ~488.32 uS to do the switching of VDD1/VDD2/VIO OSC from -+ * HFCLKIN to internal oscillator before disabling HFCLKIN. -+ */ -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_HFCLKOUT, RES_STATE_SLEEP), 20}, -+ /* Broadcast message to put res(TYPE2 = 1) to sleep */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R1, -+ RES_STATE_SLEEP), 2}, -+ /* Broadcast message to put res(TYPE2 = 2) to sleep, disable HFCLKIN */ -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2, -+ RES_STATE_SLEEP), 2}, -+}; -+ -+static struct twl4030_script sleep_on_script_erratum27 __initdata = { -+ .script = sleep_on_seq_erratum27, -+ .size = ARRAY_SIZE(sleep_on_seq_erratum27), -+ .flags = TWL4030_SLEEP_SCRIPT, -+}; -+ -+/* TWL4030 script for sleep, wakeup & warm_reset */ -+static struct twl4030_script *twl4030_scripts_erratum27[] __initdata = { -+ &wakeup_script_erratum27, -+ &sleep_on_script_erratum27, -+ &wrst_script, -+}; -+ -+/** -+ * DOC: TWL4030 resource configuration -+ * -+ * VDD1/VDD2/VPLL are assigned to P1 and P3, to have better control -+ * during OFFMODE. HFCLKOUT is assigned to P1 and P3 (*p2) to turn off -+ * only during OFFMODE. -+ * (*P2 is included if the platform uses it for modem/some other processor) -+ */ -+static struct twl4030_resconfig twl4030_rconfig_erratum27[] __initdata = { -+ { .resource = RES_VPLL1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, -+ .type = 3, .type2 = 1, .remap_sleep = RES_STATE_OFF }, -+ { .resource = RES_VINTANA1, .devgroup = DEV_GRP_ALL, .type = 1, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_VINTANA2, .devgroup = DEV_GRP_ALL, .type = 0, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_VINTDIG, .devgroup = DEV_GRP_ALL, .type = 1, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_VIO, .devgroup = DEV_GRP_ALL, .type = 2, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_VDD1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, -+ .type = 4, .type2 = 1, .remap_sleep = RES_STATE_OFF }, -+ { .resource = RES_VDD2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, -+ .type = 3, .type2 = 1, .remap_sleep = RES_STATE_OFF }, -+ { .resource = RES_REGEN, .devgroup = DEV_GRP_ALL, .type = 2, -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_ALL, .type = 0, -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_CLKEN, .devgroup = DEV_GRP_ALL, .type = 3, -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_SYSEN, .devgroup = DEV_GRP_ALL, .type = 6, -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, -+ { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, -+ .type = 0, .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, -+ { 0, 0}, -+}; -+ -+/** -+ * twl5030_script_erratum27() - API to modify TWL4030 script -+ * -+ * Updating the TWL4030 script & resource configuration -+ */ -+static void __init twl5030_script_erratum27(void) -+{ -+ twl4030_generic_script.scripts = twl4030_scripts_erratum27; -+ twl4030_generic_script.num = ARRAY_SIZE(twl4030_scripts_erratum27); -+ twl4030_generic_script.resource_config = twl4030_rconfig_erratum27; -+} -+ - struct twl4030_power_data twl4030_generic_script __initdata = { - .scripts = twl4030_scripts, - .num = ARRAY_SIZE(twl4030_scripts), - .resource_config = twl4030_rconfig, -+ .twl5030_erratum27wa_script = twl5030_script_erratum27, - }; - - static int __init twl4030_script_probe(struct platform_device *pdev) -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h -index 23ec058..10cb6e2 100644 ---- a/include/linux/i2c/twl.h -+++ b/include/linux/i2c/twl.h -@@ -681,6 +681,7 @@ struct twl4030_power_data { - struct twl4030_script **scripts; - unsigned num; - struct twl4030_resconfig *resource_config; -+ void (*twl5030_erratum27wa_script)(void); - #define TWL4030_RESCONFIG_UNDEF ((u8)-1) - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0013-MFD-TWL4030-optimizing-resource-configuration.patch b/recipes-kernel/linux/linux-omap-2.6.39/mfd/0013-MFD-TWL4030-optimizing-resource-configuration.patch deleted file mode 100644 index 8904f8d..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0013-MFD-TWL4030-optimizing-resource-configuration.patch +++ /dev/null @@ -1,184 +0,0 @@ -From bf171753a162d07753208c6bcfae8ca1e5c94af3 Mon Sep 17 00:00:00 2001 -From: Lesly A M <leslyam@ti.com> -Date: Wed, 1 Jun 2011 14:57:05 -0700 -Subject: [PATCH 13/13] MFD: TWL4030: optimizing resource configuration - -Skip the i2c register writes in twl4030_configure_resource() if the new value -is same as the old value, for devgrp/type/remap regs. - -Suggested by David Derrick <dderrick@ti.com> - -Signed-off-by: Lesly A M <leslyam@ti.com> -Cc: Nishanth Menon <nm@ti.com> -Cc: David Derrick <dderrick@ti.com> -Cc: Samuel Ortiz <sameo@linux.intel.com> ---- - drivers/mfd/twl4030-power.c | 126 ++++++++++++++++++++++++------------------ - 1 files changed, 72 insertions(+), 54 deletions(-) - -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c -index 8af3fe3..d82632f 100644 ---- a/drivers/mfd/twl4030-power.c -+++ b/drivers/mfd/twl4030-power.c -@@ -335,9 +335,9 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig) - { - int rconfig_addr; - int err; -- u8 type; -- u8 grp; -- u8 remap; -+ u8 type, type_value; -+ u8 grp, grp_value; -+ u8 remap, remap_value; - - if (rconfig->resource > TOTAL_RESOURCES) { - pr_err("TWL4030 Resource %d does not exist\n", -@@ -348,76 +348,94 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig) - rconfig_addr = res_config_addrs[rconfig->resource]; - - /* Set resource group */ -- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &grp, -+ if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) { -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &grp, - rconfig_addr + DEV_GRP_OFFSET); -- if (err) { -- pr_err("TWL4030 Resource %d group could not be read\n", -- rconfig->resource); -- return err; -- } -+ if (err) { -+ pr_err("TWL4030 Resource %d group could not be read\n", -+ rconfig->resource); -+ return err; -+ } - -- if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) { -- grp &= ~DEV_GRP_MASK; -- grp |= rconfig->devgroup << DEV_GRP_SHIFT; -- err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ grp_value = (grp & DEV_GRP_MASK) >> DEV_GRP_SHIFT; -+ -+ if (rconfig->devgroup != grp_value) { -+ grp &= ~DEV_GRP_MASK; -+ grp |= rconfig->devgroup << DEV_GRP_SHIFT; -+ err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, - grp, rconfig_addr + DEV_GRP_OFFSET); -- if (err < 0) { -- pr_err("TWL4030 failed to program devgroup\n"); -- return err; -+ if (err < 0) { -+ pr_err("TWL4030 failed to program devgroup\n"); -+ return err; -+ } - } - } - - /* Set resource types */ -- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &type, -+ if ((rconfig->type != TWL4030_RESCONFIG_UNDEF) || -+ (rconfig->type2 != TWL4030_RESCONFIG_UNDEF)) { -+ -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &type, - rconfig_addr + TYPE_OFFSET); -- if (err < 0) { -- pr_err("TWL4030 Resource %d type could not be read\n", -- rconfig->resource); -- return err; -- } -+ if (err < 0) { -+ pr_err("TWL4030 Resource %d type could not be read\n", -+ rconfig->resource); -+ return err; -+ } - -- if (rconfig->type != TWL4030_RESCONFIG_UNDEF) { -- type &= ~TYPE_MASK; -- type |= rconfig->type << TYPE_SHIFT; -- } -+ type_value = type; - -- if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) { -- type &= ~TYPE2_MASK; -- type |= rconfig->type2 << TYPE2_SHIFT; -- } -+ if (rconfig->type != TWL4030_RESCONFIG_UNDEF) { -+ type &= ~TYPE_MASK; -+ type |= rconfig->type << TYPE_SHIFT; -+ } - -- err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) { -+ type &= ~TYPE2_MASK; -+ type |= rconfig->type2 << TYPE2_SHIFT; -+ } -+ -+ if (type != type_value) { -+ err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, - type, rconfig_addr + TYPE_OFFSET); -- if (err < 0) { -- pr_err("TWL4030 failed to program resource type\n"); -- return err; -+ if (err < 0) { -+ pr_err("TWL4030 failed to program resource type\n"); -+ return err; -+ } -+ } - } - - /* Set remap states */ -- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &remap, -+ if ((rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) || -+ (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF)) { -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &remap, - rconfig_addr + REMAP_OFFSET); -- if (err < 0) { -- pr_err("TWL4030 Resource %d remap could not be read\n", -- rconfig->resource); -- return err; -- } -+ if (err < 0) { -+ pr_err("TWL4030 Resource %d remap could not be read\n", -+ rconfig->resource); -+ return err; -+ } - -- if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) { -- remap &= ~OFF_STATE_MASK; -- remap |= rconfig->remap_off << OFF_STATE_SHIFT; -- } -+ remap_value = remap; - -- if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) { -- remap &= ~SLEEP_STATE_MASK; -- remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT; -- } -+ if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) { -+ remap &= ~OFF_STATE_MASK; -+ remap |= rconfig->remap_off << OFF_STATE_SHIFT; -+ } - -- err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -- remap, -- rconfig_addr + REMAP_OFFSET); -- if (err < 0) { -- pr_err("TWL4030 failed to program remap\n"); -- return err; -+ if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) { -+ remap &= ~SLEEP_STATE_MASK; -+ remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT; -+ } -+ -+ if (remap != remap_value) { -+ err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ remap, rconfig_addr + REMAP_OFFSET); -+ if (err < 0) { -+ pr_err("TWL4030 failed to program remap\n"); -+ return err; -+ } -+ } - } - - return 0; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/musb/0001-usb-musb-Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch b/recipes-kernel/linux/linux-omap-2.6.39/musb/0001-usb-musb-Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch deleted file mode 100644 index a98a4da..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/musb/0001-usb-musb-Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 2adb339e4988632379971febe5696f21d05c71f2 Mon Sep 17 00:00:00 2001 -From: Anand Gadiyar <gadiyar@ti.com> -Date: Tue, 19 Jul 2011 01:52:14 -0700 -Subject: [PATCH] usb: musb: Enable DMA mode1 RX for USB-Mass-Storage - -This patch enables the DMA mode1 RX support. -This feature is enabled based on the short_not_ok flag passed from -gadget drivers. - -This will result in a thruput performance gain of around -40% for USB mass-storage/mtp use cases. - -Signed-off-by: Anand Gadiyar <gadiyar@ti.com> -Signed-off-by: Moiz Sonasath <m-sonasath@ti.com> -Tested-by: Vikram Pandita <vikram.pandita@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - drivers/usb/musb/musb_gadget.c | 68 ++++++++++++++++++++++++--------------- - 1 files changed, 42 insertions(+), 26 deletions(-) - -diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c -index f47c201..ca32c63 100644 ---- a/drivers/usb/musb/musb_gadget.c -+++ b/drivers/usb/musb/musb_gadget.c -@@ -630,6 +630,7 @@ static void rxstate(struct musb *musb, struct musb_request *req) - u16 len; - u16 csr = musb_readw(epio, MUSB_RXCSR); - struct musb_hw_ep *hw_ep = &musb->endpoints[epnum]; -+ u8 use_mode_1; - - if (hw_ep->is_shared_fifo) - musb_ep = &hw_ep->ep_in; -@@ -679,6 +680,18 @@ static void rxstate(struct musb *musb, struct musb_request *req) - - if (csr & MUSB_RXCSR_RXPKTRDY) { - len = musb_readw(epio, MUSB_RXCOUNT); -+ -+ /* -+ * Enable Mode 1 for RX transfers only for mass-storage -+ * use-case, based on short_not_ok flag which is set only -+ * from file_storage and f_mass_storage drivers -+ */ -+ -+ if (request->short_not_ok && len == musb_ep->packet_sz) -+ use_mode_1 = 1; -+ else -+ use_mode_1 = 0; -+ - if (request->actual < request->length) { - #ifdef CONFIG_USB_INVENTRA_DMA - if (is_buffer_mapped(req)) { -@@ -710,37 +723,40 @@ static void rxstate(struct musb *musb, struct musb_request *req) - * then becomes usable as a runtime "use mode 1" hint... - */ - -- csr |= MUSB_RXCSR_DMAENAB; --#ifdef USE_MODE1 -- csr |= MUSB_RXCSR_AUTOCLEAR; -- /* csr |= MUSB_RXCSR_DMAMODE; */ -- -- /* this special sequence (enabling and then -- * disabling MUSB_RXCSR_DMAMODE) is required -- * to get DMAReq to activate -- */ -- musb_writew(epio, MUSB_RXCSR, -- csr | MUSB_RXCSR_DMAMODE); --#else -- if (!musb_ep->hb_mult && -- musb_ep->hw_ep->rx_double_buffered) -+ /* Experimental: Mode1 works with mass storage use cases */ -+ if (use_mode_1) { - csr |= MUSB_RXCSR_AUTOCLEAR; --#endif -- musb_writew(epio, MUSB_RXCSR, csr); -+ musb_writew(epio, MUSB_RXCSR, csr); -+ csr |= MUSB_RXCSR_DMAENAB; -+ musb_writew(epio, MUSB_RXCSR, csr); -+ -+ /* this special sequence (enabling and then -+ * disabling MUSB_RXCSR_DMAMODE) is required -+ * to get DMAReq to activate -+ */ -+ musb_writew(epio, MUSB_RXCSR, -+ csr | MUSB_RXCSR_DMAMODE); -+ musb_writew(epio, MUSB_RXCSR, csr); -+ -+ } else { -+ if (!musb_ep->hb_mult && -+ musb_ep->hw_ep->rx_double_buffered) -+ csr |= MUSB_RXCSR_AUTOCLEAR; -+ csr |= MUSB_RXCSR_DMAENAB; -+ musb_writew(epio, MUSB_RXCSR, csr); -+ } - - if (request->actual < request->length) { - int transfer_size = 0; --#ifdef USE_MODE1 -- transfer_size = min(request->length - request->actual, -- channel->max_len); --#else -- transfer_size = min(request->length - request->actual, -- (unsigned)len); --#endif -- if (transfer_size <= musb_ep->packet_sz) -- musb_ep->dma->desired_mode = 0; -- else -+ if (use_mode_1) { -+ transfer_size = min(request->length - request->actual, -+ channel->max_len); - musb_ep->dma->desired_mode = 1; -+ } else { -+ transfer_size = min(request->length - request->actual, -+ (unsigned)len); -+ musb_ep->dma->desired_mode = 0; -+ } - - use_dma = c->channel_program( - channel, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/net/0001-NFS-Revert-NFSROOT-default-mount-options.patch b/recipes-kernel/linux/linux-omap-2.6.39/net/0001-NFS-Revert-NFSROOT-default-mount-options.patch deleted file mode 100644 index 617698d..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/net/0001-NFS-Revert-NFSROOT-default-mount-options.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/fs/nfs/nfsroot.c b/fs/nfs/nfsroot.c -index c541093..c4744e1 100644 ---- a/fs/nfs/nfsroot.c -+++ b/fs/nfs/nfsroot.c -@@ -87,7 +87,7 @@ - #define NFS_ROOT "/tftpboot/%s" - - /* Default NFSROOT mount options. */ --#define NFS_DEF_OPTIONS "udp" -+#define NFS_DEF_OPTIONS "vers=2,udp,rsize=4096,wsize=4096" - - /* Parameters passed from the kernel command line */ - static char nfs_root_parms[256] __initdata = ""; diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0001-OMAP2-cpufreq-free-up-table-on-exit.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0001-OMAP2-cpufreq-free-up-table-on-exit.patch deleted file mode 100644 index 9e9a8a0..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0001-OMAP2-cpufreq-free-up-table-on-exit.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 38dd5aadc86725f6018d23679e9daa60ca0a8319 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Thu, 12 May 2011 07:59:52 -0500 -Subject: [PATCH 1/6] OMAP2+: cpufreq: free up table on exit - -freq_table allocated by opp_init_cpufreq_table in omap_cpu_init -needs to be freed in omap_cpu_exit. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index d53ce23..e38ebb8 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -26,6 +26,7 @@ - #include <linux/clk.h> - #include <linux/io.h> - #include <linux/opp.h> -+#include <linux/slab.h> - #include <linux/cpu.h> - - #include <asm/system.h> -@@ -216,6 +217,8 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - static int omap_cpu_exit(struct cpufreq_policy *policy) - { - clk_exit_cpufreq_table(&freq_table); -+ kfree(freq_table); -+ freq_table = NULL; - clk_put(mpu_clk); - return 0; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0002-OMAP2-cpufreq-handle-invalid-cpufreq-table.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0002-OMAP2-cpufreq-handle-invalid-cpufreq-table.patch deleted file mode 100644 index 087724d..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0002-OMAP2-cpufreq-handle-invalid-cpufreq-table.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 5febdc0482e545c2a598f035c5e03931e0c3c808 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Thu, 12 May 2011 08:14:41 -0500 -Subject: [PATCH 2/6] OMAP2+: cpufreq: handle invalid cpufreq table - -Handle the case when cpufreq_frequency_table_cpuinfo fails. freq_table -that we passed failed the internal test of cpufreq generic driver, -so we should'nt be using the freq_table as such. Instead, warn and -fallback to clock functions for validation and operation. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 12 ++++++++++-- - 1 files changed, 10 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index e38ebb8..6e3666a 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -182,10 +182,18 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - - if (freq_table) { - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -- if (!result) -+ if (!result) { - cpufreq_frequency_table_get_attr(freq_table, - policy->cpu); -- } else { -+ } else { -+ WARN(true, "%s: fallback to clk_round(freq_table=%d)\n", -+ __func__, result); -+ kfree(freq_table); -+ freq_table = NULL; -+ } -+ } -+ -+ if (!freq_table) { - policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; - policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, - VERY_HI_RATE) / 1000; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0003-OMAP2-cpufreq-minor-comment-cleanup.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0003-OMAP2-cpufreq-minor-comment-cleanup.patch deleted file mode 100644 index 4f4cdb1..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0003-OMAP2-cpufreq-minor-comment-cleanup.patch +++ /dev/null @@ -1,33 +0,0 @@ -From aef7e862873e6125159a18d22a2e37b1fbab2153 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Thu, 12 May 2011 16:27:45 -0700 -Subject: [PATCH 3/6] OMAP2+: cpufreq: minor comment cleanup - -this should probably get squashed in.. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 6 ++++-- - 1 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 6e3666a..45f1e9e 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -84,8 +84,10 @@ static int omap_target(struct cpufreq_policy *policy, - if (is_smp() && (num_online_cpus() < NR_CPUS)) - return ret; - -- /* Ensure desired rate is within allowed range. Some govenors -- * (ondemand) will just pass target_freq=0 to get the minimum. */ -+ /* -+ * Ensure desired rate is within allowed range. Some govenors -+ * (ondemand) will just pass target_freq=0 to get the minimum. -+ */ - if (target_freq < policy->min) - target_freq = policy->min; - if (target_freq > policy->max) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0004-OMAP2-cpufreq-use-clk_init_cpufreq_table-if-OPPs-not.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0004-OMAP2-cpufreq-use-clk_init_cpufreq_table-if-OPPs-not.patch deleted file mode 100644 index dd23c08..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0004-OMAP2-cpufreq-use-clk_init_cpufreq_table-if-OPPs-not.patch +++ /dev/null @@ -1,48 +0,0 @@ -From f231980dbd0f05229f2020e59b7242872576416f Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Fri, 13 May 2011 05:34:35 -0700 -Subject: [PATCH 4/6] OMAP2: cpufreq: use clk_init_cpufreq_table if OPPs not available - -OMAP2 does not use OPP tables at the moment for DVFS. Currently, -we depend on opp table initialization to give us the freq_table, -which makes sense for OMAP3+. for OMAP2, we should be using -clk_init_cpufreq_table - so if the opp based frequency table -initilization fails, fall back to clk_init_cpufreq_table to give -us the table. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 9 ++++++++- - 1 files changed, 8 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 45f1e9e..854f4b3 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -180,7 +180,13 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - pr_warning("%s: unable to get the mpu device\n", __func__); - return -EINVAL; - } -- opp_init_cpufreq_table(mpu_dev, &freq_table); -+ -+ /* -+ * if we dont get cpufreq table using opp, use traditional omap2 lookup -+ * as a fallback -+ */ -+ if (opp_init_cpufreq_table(mpu_dev, &freq_table)) -+ clk_init_cpufreq_table(&freq_table); - - if (freq_table) { - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -@@ -188,6 +194,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - cpufreq_frequency_table_get_attr(freq_table, - policy->cpu); - } else { -+ clk_exit_cpufreq_table(&freq_table); - WARN(true, "%s: fallback to clk_round(freq_table=%d)\n", - __func__, result); - kfree(freq_table); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0005-OMAP2-cpufreq-use-cpufreq_frequency_table_target.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0005-OMAP2-cpufreq-use-cpufreq_frequency_table_target.patch deleted file mode 100644 index 504d191..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0005-OMAP2-cpufreq-use-cpufreq_frequency_table_target.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 272d76bcb22b9509ccc1b59d3a62e3930d902d17 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Fri, 13 May 2011 05:43:49 -0700 -Subject: [PATCH 5/6] OMAP2+: cpufreq: use cpufreq_frequency_table_target - -Use cpufreq_frequency_table_target for finding the proper target -instead of seeing if the frequency requested is divisible alone. -if we have a frequency table, we should restrict ourselves to -selecting the "approved" frequencies alone and only in the case -where the frequency table is not available should we attempt at -closest roundable clock frequency. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 38 ++++++++++++++++++++++-------- - 1 files changed, 28 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 854f4b3..d0b4f97 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -77,24 +77,42 @@ static int omap_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) - { -- int i, ret = 0; -+ unsigned int i; -+ int ret = 0; - struct cpufreq_freqs freqs; - - /* Changes not allowed until all CPUs are online */ - if (is_smp() && (num_online_cpus() < NR_CPUS)) - return ret; - -- /* -- * Ensure desired rate is within allowed range. Some govenors -- * (ondemand) will just pass target_freq=0 to get the minimum. -- */ -- if (target_freq < policy->min) -- target_freq = policy->min; -- if (target_freq > policy->max) -- target_freq = policy->max; -+ if (freq_table) { -+ ret = cpufreq_frequency_table_target(policy, freq_table, -+ target_freq, relation, &i); -+ if (ret) { -+ pr_debug("%s: cpu%d: no freq match for %d(ret=%d)\n", -+ __func__, policy->cpu, target_freq, ret); -+ return ret; -+ } -+ freqs.new = freq_table[i].frequency; -+ } else { -+ /* -+ * Ensure desired rate is within allowed range. Some govenors -+ * (ondemand) will just pass target_freq=0 to get the minimum. -+ */ -+ if (target_freq < policy->min) -+ target_freq = policy->min; -+ if (target_freq > policy->max) -+ target_freq = policy->max; -+ -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -+ } -+ if (!freqs.new) { -+ pr_err("%s: cpu%d: no match for freq %d\n", __func__, -+ policy->cpu, target_freq); -+ return -EINVAL; -+ } - - freqs.old = omap_getspeed(policy->cpu); -- freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; - freqs.cpu = policy->cpu; - - if (freqs.old == freqs.new) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0006-OMAP2-cpufreq-fix-freq_table-leak.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0006-OMAP2-cpufreq-fix-freq_table-leak.patch deleted file mode 100644 index 0cb4c91..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0006-OMAP2-cpufreq-fix-freq_table-leak.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 42a384af80e07534913d9002ec8d9caf5d4d305c Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 18 May 2011 01:48:23 -0500 -Subject: [PATCH 6/6] OMAP2+: cpufreq: fix freq_table leak - -Since we have two cpus the cpuinit call for cpu1 causes -freq_table of cpu0 to be overwritten. instead, we maintain -a counter to keep track of cpus who use the cpufreq table -allocate it once(one freq table for all CPUs) and free them -once the last user is done with it. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 33 ++++++++++++++++++++++++------ - 1 files changed, 26 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index d0b4f97..fc3d0fb 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -42,6 +42,9 @@ - #define VERY_HI_RATE 900000000 - - static struct cpufreq_frequency_table *freq_table; -+static int freq_table_users; -+static DEFINE_MUTEX(freq_table_lock); -+ - static struct clk *mpu_clk; - - static int omap_verify_speed(struct cpufreq_policy *policy) -@@ -172,6 +175,18 @@ skip_lpj: - return ret; - } - -+static void freq_table_free(void) -+{ -+ if (!freq_table_users) -+ return; -+ freq_table_users--; -+ if (freq_table_users) -+ return; -+ clk_exit_cpufreq_table(&freq_table); -+ kfree(freq_table); -+ freq_table = NULL; -+} -+ - static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - { - int result = 0; -@@ -199,14 +214,18 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - return -EINVAL; - } - -+ mutex_lock(&freq_table_lock); - /* - * if we dont get cpufreq table using opp, use traditional omap2 lookup - * as a fallback - */ -- if (opp_init_cpufreq_table(mpu_dev, &freq_table)) -- clk_init_cpufreq_table(&freq_table); -+ if (!freq_table) { -+ if (opp_init_cpufreq_table(mpu_dev, &freq_table)) -+ clk_init_cpufreq_table(&freq_table); -+ } - - if (freq_table) { -+ freq_table_users++; - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); - if (!result) { - cpufreq_frequency_table_get_attr(freq_table, -@@ -215,10 +234,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - clk_exit_cpufreq_table(&freq_table); - WARN(true, "%s: fallback to clk_round(freq_table=%d)\n", - __func__, result); -- kfree(freq_table); -- freq_table = NULL; -+ freq_table_free(); - } - } -+ mutex_unlock(&freq_table_lock); - - if (!freq_table) { - policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; -@@ -251,9 +270,9 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - - static int omap_cpu_exit(struct cpufreq_policy *policy) - { -- clk_exit_cpufreq_table(&freq_table); -- kfree(freq_table); -- freq_table = NULL; -+ mutex_lock(&freq_table_lock); -+ freq_table_free(); -+ mutex_unlock(&freq_table_lock); - clk_put(mpu_clk); - return 0; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0001-cpufreq-helpers-for-walking-the-frequency-table.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0001-cpufreq-helpers-for-walking-the-frequency-table.patch deleted file mode 100644 index 576cd08..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0001-cpufreq-helpers-for-walking-the-frequency-table.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 8726f3a7218b72a1003904a24bb000b3e4f9b4d1 Mon Sep 17 00:00:00 2001 -From: Mike Turquette <mturquette@ti.com> -Date: Tue, 17 May 2011 09:35:54 -0500 -Subject: [PATCH 1/2] cpufreq: helpers for walking the frequency table - -Two new functions for getting the next higher and next lower frequencies -in the cpufreq table, based upon a frequency supplied in kHz. - -This is useful for cpufreq governors that do not target frequencies -based upon a percentage or a pre-determined value, but instead access -the cpufreq table directly. - -Signed-off-by: Mike Turquette <mturquette@ti.com> -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - drivers/cpufreq/freq_table.c | 73 ++++++++++++++++++++++++++++++++++++++++++ - include/linux/cpufreq.h | 9 +++++ - 2 files changed, 82 insertions(+), 0 deletions(-) - -diff --git a/drivers/cpufreq/freq_table.c b/drivers/cpufreq/freq_table.c -index 0543221..11a307b 100644 ---- a/drivers/cpufreq/freq_table.c -+++ b/drivers/cpufreq/freq_table.c -@@ -13,6 +13,7 @@ - #include <linux/module.h> - #include <linux/init.h> - #include <linux/cpufreq.h> -+#include <linux/err.h> - - #define dprintk(msg...) \ - cpufreq_debug_printk(CPUFREQ_DEBUG_CORE, "freq-table", msg) -@@ -174,6 +175,78 @@ int cpufreq_frequency_table_target(struct cpufreq_policy *policy, - } - EXPORT_SYMBOL_GPL(cpufreq_frequency_table_target); - -+int cpufreq_frequency_table_next_lowest(struct cpufreq_policy *policy, -+ struct cpufreq_frequency_table *table, int *index) -+{ -+ unsigned int cur_freq; -+ unsigned int next_lowest_freq; -+ int optimal_index = -1; -+ int i = 0; -+ -+ if (!policy || IS_ERR(policy) || !table || IS_ERR(table) || -+ !index || IS_ERR(index)) -+ return -ENOMEM; -+ -+ cur_freq = policy->cur; -+ next_lowest_freq = policy->min; -+ -+ /* we're at the lowest frequency in the table already, bail out */ -+ if (cur_freq == policy->min) -+ return -EINVAL; -+ -+ /* walk the list, find closest freq to cur_freq that is below it */ -+ while(table[i].frequency != CPUFREQ_TABLE_END) { -+ if (table[i].frequency < cur_freq && -+ table[i].frequency >= next_lowest_freq) { -+ next_lowest_freq = table[i].frequency; -+ optimal_index = table[i].index; -+ } -+ -+ i++; -+ } -+ -+ *index = optimal_index; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(cpufreq_frequency_table_next_lowest); -+ -+int cpufreq_frequency_table_next_highest(struct cpufreq_policy *policy, -+ struct cpufreq_frequency_table *table, int *index) -+{ -+ unsigned int cur_freq; -+ unsigned int next_higher_freq; -+ int optimal_index = -1; -+ int i = 0; -+ -+ if (!policy || IS_ERR(policy) || !table || IS_ERR(table) || -+ !index || IS_ERR(index)) -+ return -ENOMEM; -+ -+ cur_freq = policy->cur; -+ next_higher_freq = policy->max; -+ -+ /* we're at the highest frequency in the table already, bail out */ -+ if (cur_freq == policy->max) -+ return -EINVAL; -+ -+ /* walk the list, find closest freq to cur_freq that is above it */ -+ while(table[i].frequency != CPUFREQ_TABLE_END) { -+ if (table[i].frequency > cur_freq && -+ table[i].frequency <= next_higher_freq) { -+ next_higher_freq = table[i].frequency; -+ optimal_index = table[i].index; -+ } -+ -+ i++; -+ } -+ -+ *index = optimal_index; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(cpufreq_frequency_table_next_highest); -+ - static DEFINE_PER_CPU(struct cpufreq_frequency_table *, cpufreq_show_table); - /** - * show_available_freqs - show available frequencies for the specified CPU -diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h -index 9343dd3..a38fca8 100644 ---- a/include/linux/cpufreq.h -+++ b/include/linux/cpufreq.h -@@ -396,6 +396,15 @@ void cpufreq_frequency_table_get_attr(struct cpufreq_frequency_table *table, - - void cpufreq_frequency_table_put_attr(unsigned int cpu); - -+/* the following are for use in governors, or anywhere else */ -+extern int cpufreq_frequency_table_next_lowest(struct cpufreq_policy *policy, -+ struct cpufreq_frequency_table *table, -+ int *index); -+ -+extern int cpufreq_frequency_table_next_highest(struct cpufreq_policy *policy, -+ struct cpufreq_frequency_table *table, -+ int *index); -+ - - /********************************************************************* - * UNIFIED DEBUG HELPERS * --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0002-cpufreq-introduce-hotplug-governor.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0002-cpufreq-introduce-hotplug-governor.patch deleted file mode 100644 index 731906c..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0002-cpufreq-introduce-hotplug-governor.patch +++ /dev/null @@ -1,879 +0,0 @@ -From e4c777d8314d7925e4895f00b3a7ebd64a4d830b Mon Sep 17 00:00:00 2001 -From: Mike Turquette <mturquette@ti.com> -Date: Tue, 17 May 2011 09:43:09 -0500 -Subject: [PATCH 2/2] cpufreq: introduce hotplug governor - -The "hotplug" governor scales CPU frequency based on load, similar to -"ondemand". It scales up to the highest frequency when "up_threshold" -is crossed and scales down one frequency at a time when "down_threshold" -is crossed. Unlike those governors, target frequencies are determined -by directly accessing the CPUfreq frequency table, instead of taking -some percentage of maximum available frequency. - -The key difference in the "hotplug" governor is that it will disable -auxillary CPUs when the system is very idle, and enable them again once -the system becomes busy. This is achieved by averaging load over -multiple sampling periods; if CPUs were online or offlined based on a -single sampling period then thrashing will occur. - -Sysfs entries exist for "hotplug_in_sampling_periods" and for -"hotplug_out_sampling_periods" which determine how many consecutive -periods get averaged to determine if auxillery CPUs should be onlined or -offlined. Defaults are 5 periods and 20 periods respectively. -Otherwise the standard sysfs entries you might find for "ondemand" and -"conservative" governors are there. - -To use this governor it is assumed that your CPUfreq driver has -populated the CPUfreq table, CONFIG_NO_HZ is enabled and -CONFIG_HOTPLUG_CPU is enabled. - -Changes in V2: - Corrected default sampling periods - Optimized load history array resizing - Maintain load history when resizing array - Add locking to dbs_check_cpu - Switch from enable_nonboot_cpus to cpu_up - Switch from disable_nonboot_cpus to down_cpu - Fix some printks - Coding style around for-loops - -Signed-off-by: Mike Turquette <mturquette@ti.com> -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - Documentation/cpu-freq/governors.txt | 28 ++ - drivers/cpufreq/Kconfig | 33 ++ - drivers/cpufreq/Makefile | 1 + - drivers/cpufreq/cpufreq_hotplug.c | 705 ++++++++++++++++++++++++++++++++++ - include/linux/cpufreq.h | 3 + - 5 files changed, 770 insertions(+), 0 deletions(-) - create mode 100644 drivers/cpufreq/cpufreq_hotplug.c - -diff --git a/Documentation/cpu-freq/governors.txt b/Documentation/cpu-freq/governors.txt -index e74d0a2..c2e3d3d 100644 ---- a/Documentation/cpu-freq/governors.txt -+++ b/Documentation/cpu-freq/governors.txt -@@ -193,6 +193,34 @@ governor but for the opposite direction. For example when set to its - default value of '20' it means that if the CPU usage needs to be below - 20% between samples to have the frequency decreased. - -+ -+2.6 Hotplug -+----------- -+ -+The CPUfreq governor "hotplug" operates similary to "ondemand" and -+"conservative". It's decisions are based primarily on CPU load. Like -+"ondemand" the "hotplug" governor will ramp up to the highest frequency -+once the run-time tunable "up_threshold" parameter is crossed. Like -+"conservative", the "hotplug" governor exports a "down_threshold" -+parameter that is also tunable at run-time. When the "down_threshold" -+is crossed the CPU transitions to the next lowest frequency in the -+CPUfreq frequency table instead of decrementing the frequency based on a -+percentage of maximum load. -+ -+The main reason "hotplug" governor exists is for architectures requiring -+that only the master CPU be online in order to hit low-power states -+(C-states). OMAP4 is one such example of this. The "hotplug" governor -+is also helpful in reducing thermal output in devices with tight thermal -+constraints. -+ -+Auxillary CPUs are onlined/offline based on CPU load, but the decision -+to do so is made after averaging several sampling windows. This is to -+reduce CPU hotplug "thrashing", which can be caused by normal system -+entropy and leads to lots of spurious plug-in and plug-out transitions. -+The number of sampling periods averaged together is tunable via the -+"hotplug_in_sampling_periods" and "hotplug_out_sampling_periods" -+run-time tunable parameters. -+ - 3. The Governor Interface in the CPUfreq Core - ============================================= - -diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig -index ca8ee80..c716a0e 100644 ---- a/drivers/cpufreq/Kconfig -+++ b/drivers/cpufreq/Kconfig -@@ -110,6 +110,19 @@ config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE - Be aware that not all cpufreq drivers support the conservative - governor. If unsure have a look at the help section of the - driver. Fallback governor will be the performance governor. -+ -+config CPU_FREQ_DEFAULT_GOV_HOTPLUG -+ bool "hotplug" -+ select CPU_FREQ_GOV_HOTPLUG -+ select CPU_FREQ_GOV_PERFORMANCE -+ help -+ Use the CPUFreq governor 'hotplug' as default. This allows you -+ to get a full dynamic frequency capable system with CPU -+ hotplug support by simply loading your cpufreq low-level -+ hardware driver. Be aware that not all cpufreq drivers -+ support the hotplug governor. If unsure have a look at -+ the help section of the driver. Fallback governor will be the -+ performance governor. - endchoice - - config CPU_FREQ_GOV_PERFORMANCE -@@ -190,4 +203,24 @@ config CPU_FREQ_GOV_CONSERVATIVE - - If in doubt, say N. - -+config CPU_FREQ_GOV_HOTPLUG -+ tristate "'hotplug' cpufreq governor" -+ depends on CPU_FREQ && NO_HZ && HOTPLUG_CPU -+ help -+ 'hotplug' - this driver mimics the frequency scaling behavior -+ in 'ondemand', but with several key differences. First is -+ that frequency transitions use the CPUFreq table directly, -+ instead of incrementing in a percentage of the maximum -+ available frequency. Second 'hotplug' will offline auxillary -+ CPUs when the system is idle, and online those CPUs once the -+ system becomes busy again. This last feature is needed for -+ architectures which transition to low power states when only -+ the "master" CPU is online, or for thermally constrained -+ devices. -+ -+ If you don't have one of these architectures or devices, use -+ 'ondemand' instead. -+ -+ If in doubt, say N. -+ - endif # CPU_FREQ -diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile -index 71fc3b4..05d564c 100644 ---- a/drivers/cpufreq/Makefile -+++ b/drivers/cpufreq/Makefile -@@ -9,6 +9,7 @@ obj-$(CONFIG_CPU_FREQ_GOV_POWERSAVE) += cpufreq_powersave.o - obj-$(CONFIG_CPU_FREQ_GOV_USERSPACE) += cpufreq_userspace.o - obj-$(CONFIG_CPU_FREQ_GOV_ONDEMAND) += cpufreq_ondemand.o - obj-$(CONFIG_CPU_FREQ_GOV_CONSERVATIVE) += cpufreq_conservative.o -+obj-$(CONFIG_CPU_FREQ_GOV_HOTPLUG) += cpufreq_hotplug.o - - # CPUfreq cross-arch helpers - obj-$(CONFIG_CPU_FREQ_TABLE) += freq_table.o -diff --git a/drivers/cpufreq/cpufreq_hotplug.c b/drivers/cpufreq/cpufreq_hotplug.c -new file mode 100644 -index 0000000..85aa6d2 ---- /dev/null -+++ b/drivers/cpufreq/cpufreq_hotplug.c -@@ -0,0 +1,705 @@ -+/* -+ * CPUFreq hotplug governor -+ * -+ * Copyright (C) 2010 Texas Instruments, Inc. -+ * Mike Turquette <mturquette@ti.com> -+ * Santosh Shilimkar <santosh.shilimkar@ti.com> -+ * -+ * Based on ondemand governor -+ * Copyright (C) 2001 Russell King -+ * (C) 2003 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>, -+ * Jun Nakajima <jun.nakajima@intel.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/cpufreq.h> -+#include <linux/cpu.h> -+#include <linux/jiffies.h> -+#include <linux/kernel_stat.h> -+#include <linux/mutex.h> -+#include <linux/hrtimer.h> -+#include <linux/tick.h> -+#include <linux/ktime.h> -+#include <linux/sched.h> -+#include <linux/err.h> -+#include <linux/slab.h> -+ -+/* greater than 80% avg load across online CPUs increases frequency */ -+#define DEFAULT_UP_FREQ_MIN_LOAD (80) -+ -+/* less than 20% avg load across online CPUs decreases frequency */ -+#define DEFAULT_DOWN_FREQ_MAX_LOAD (20) -+ -+/* default sampling period (uSec) is bogus; 10x ondemand's default for x86 */ -+#define DEFAULT_SAMPLING_PERIOD (100000) -+ -+/* default number of sampling periods to average before hotplug-in decision */ -+#define DEFAULT_HOTPLUG_IN_SAMPLING_PERIODS (5) -+ -+/* default number of sampling periods to average before hotplug-out decision */ -+#define DEFAULT_HOTPLUG_OUT_SAMPLING_PERIODS (20) -+ -+static void do_dbs_timer(struct work_struct *work); -+static int cpufreq_governor_dbs(struct cpufreq_policy *policy, -+ unsigned int event); -+ -+#ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG -+static -+#endif -+struct cpufreq_governor cpufreq_gov_hotplug = { -+ .name = "hotplug", -+ .governor = cpufreq_governor_dbs, -+ .owner = THIS_MODULE, -+}; -+ -+struct cpu_dbs_info_s { -+ cputime64_t prev_cpu_idle; -+ cputime64_t prev_cpu_wall; -+ cputime64_t prev_cpu_nice; -+ struct cpufreq_policy *cur_policy; -+ struct delayed_work work; -+ struct cpufreq_frequency_table *freq_table; -+ int cpu; -+ /* -+ * percpu mutex that serializes governor limit change with -+ * do_dbs_timer invocation. We do not want do_dbs_timer to run -+ * when user is changing the governor or limits. -+ */ -+ struct mutex timer_mutex; -+}; -+static DEFINE_PER_CPU(struct cpu_dbs_info_s, hp_cpu_dbs_info); -+ -+static unsigned int dbs_enable; /* number of CPUs using this policy */ -+ -+/* -+ * dbs_mutex protects data in dbs_tuners_ins from concurrent changes on -+ * different CPUs. It protects dbs_enable in governor start/stop. -+ */ -+static DEFINE_MUTEX(dbs_mutex); -+ -+static struct workqueue_struct *khotplug_wq; -+ -+static struct dbs_tuners { -+ unsigned int sampling_rate; -+ unsigned int up_threshold; -+ unsigned int down_threshold; -+ unsigned int hotplug_in_sampling_periods; -+ unsigned int hotplug_out_sampling_periods; -+ unsigned int hotplug_load_index; -+ unsigned int *hotplug_load_history; -+ unsigned int ignore_nice; -+ unsigned int io_is_busy; -+} dbs_tuners_ins = { -+ .sampling_rate = DEFAULT_SAMPLING_PERIOD, -+ .up_threshold = DEFAULT_UP_FREQ_MIN_LOAD, -+ .down_threshold = DEFAULT_DOWN_FREQ_MAX_LOAD, -+ .hotplug_in_sampling_periods = DEFAULT_HOTPLUG_IN_SAMPLING_PERIODS, -+ .hotplug_out_sampling_periods = DEFAULT_HOTPLUG_OUT_SAMPLING_PERIODS, -+ .hotplug_load_index = 0, -+ .ignore_nice = 0, -+ .io_is_busy = 0, -+}; -+ -+/* -+ * A corner case exists when switching io_is_busy at run-time: comparing idle -+ * times from a non-io_is_busy period to an io_is_busy period (or vice-versa) -+ * will misrepresent the actual change in system idleness. We ignore this -+ * corner case: enabling io_is_busy might cause freq increase and disabling -+ * might cause freq decrease, which probably matches the original intent. -+ */ -+static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) -+{ -+ u64 idle_time; -+ u64 iowait_time; -+ -+ /* cpufreq-hotplug always assumes CONFIG_NO_HZ */ -+ idle_time = get_cpu_idle_time_us(cpu, wall); -+ -+ /* add time spent doing I/O to idle time */ -+ if (dbs_tuners_ins.io_is_busy) { -+ iowait_time = get_cpu_iowait_time_us(cpu, wall); -+ /* cpufreq-hotplug always assumes CONFIG_NO_HZ */ -+ if (iowait_time != -1ULL && idle_time >= iowait_time) -+ idle_time -= iowait_time; -+ } -+ -+ return idle_time; -+} -+ -+/************************** sysfs interface ************************/ -+ -+/* XXX look at global sysfs macros in cpufreq.h, can those be used here? */ -+ -+/* cpufreq_hotplug Governor Tunables */ -+#define show_one(file_name, object) \ -+static ssize_t show_##file_name \ -+(struct kobject *kobj, struct attribute *attr, char *buf) \ -+{ \ -+ return sprintf(buf, "%u\n", dbs_tuners_ins.object); \ -+} -+show_one(sampling_rate, sampling_rate); -+show_one(up_threshold, up_threshold); -+show_one(down_threshold, down_threshold); -+show_one(hotplug_in_sampling_periods, hotplug_in_sampling_periods); -+show_one(hotplug_out_sampling_periods, hotplug_out_sampling_periods); -+show_one(ignore_nice_load, ignore_nice); -+show_one(io_is_busy, io_is_busy); -+ -+static ssize_t store_sampling_rate(struct kobject *a, struct attribute *b, -+ const char *buf, size_t count) -+{ -+ unsigned int input; -+ int ret; -+ ret = sscanf(buf, "%u", &input); -+ if (ret != 1) -+ return -EINVAL; -+ -+ mutex_lock(&dbs_mutex); -+ dbs_tuners_ins.sampling_rate = input; -+ mutex_unlock(&dbs_mutex); -+ -+ return count; -+} -+ -+static ssize_t store_up_threshold(struct kobject *a, struct attribute *b, -+ const char *buf, size_t count) -+{ -+ unsigned int input; -+ int ret; -+ ret = sscanf(buf, "%u", &input); -+ -+ if (ret != 1 || input <= dbs_tuners_ins.down_threshold) { -+ return -EINVAL; -+ } -+ -+ mutex_lock(&dbs_mutex); -+ dbs_tuners_ins.up_threshold = input; -+ mutex_unlock(&dbs_mutex); -+ -+ return count; -+} -+ -+static ssize_t store_down_threshold(struct kobject *a, struct attribute *b, -+ const char *buf, size_t count) -+{ -+ unsigned int input; -+ int ret; -+ ret = sscanf(buf, "%u", &input); -+ -+ if (ret != 1 || input >= dbs_tuners_ins.up_threshold) { -+ return -EINVAL; -+ } -+ -+ mutex_lock(&dbs_mutex); -+ dbs_tuners_ins.down_threshold = input; -+ mutex_unlock(&dbs_mutex); -+ -+ return count; -+} -+ -+static ssize_t store_hotplug_in_sampling_periods(struct kobject *a, -+ struct attribute *b, const char *buf, size_t count) -+{ -+ unsigned int input; -+ unsigned int *temp; -+ unsigned int max_windows; -+ int ret; -+ ret = sscanf(buf, "%u", &input); -+ -+ if (ret != 1) -+ return -EINVAL; -+ -+ /* already using this value, bail out */ -+ if (input == dbs_tuners_ins.hotplug_in_sampling_periods) -+ return count; -+ -+ mutex_lock(&dbs_mutex); -+ ret = count; -+ max_windows = max(dbs_tuners_ins.hotplug_in_sampling_periods, -+ dbs_tuners_ins.hotplug_out_sampling_periods); -+ -+ /* no need to resize array */ -+ if (input <= max_windows) { -+ dbs_tuners_ins.hotplug_in_sampling_periods = input; -+ goto out; -+ } -+ -+ /* resize array */ -+ temp = kmalloc((sizeof(unsigned int) * input), GFP_KERNEL); -+ -+ if (!temp || IS_ERR(temp)) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ memcpy(temp, dbs_tuners_ins.hotplug_load_history, -+ (max_windows * sizeof(unsigned int))); -+ kfree(dbs_tuners_ins.hotplug_load_history); -+ -+ /* replace old buffer, old number of sampling periods & old index */ -+ dbs_tuners_ins.hotplug_load_history = temp; -+ dbs_tuners_ins.hotplug_in_sampling_periods = input; -+ dbs_tuners_ins.hotplug_load_index = max_windows; -+out: -+ mutex_unlock(&dbs_mutex); -+ -+ return ret; -+} -+ -+static ssize_t store_hotplug_out_sampling_periods(struct kobject *a, -+ struct attribute *b, const char *buf, size_t count) -+{ -+ unsigned int input; -+ unsigned int *temp; -+ unsigned int max_windows; -+ int ret; -+ ret = sscanf(buf, "%u", &input); -+ -+ if (ret != 1) -+ return -EINVAL; -+ -+ /* already using this value, bail out */ -+ if (input == dbs_tuners_ins.hotplug_out_sampling_periods) -+ return count; -+ -+ mutex_lock(&dbs_mutex); -+ ret = count; -+ max_windows = max(dbs_tuners_ins.hotplug_in_sampling_periods, -+ dbs_tuners_ins.hotplug_out_sampling_periods); -+ -+ /* no need to resize array */ -+ if (input <= max_windows) { -+ dbs_tuners_ins.hotplug_out_sampling_periods = input; -+ goto out; -+ } -+ -+ /* resize array */ -+ temp = kmalloc((sizeof(unsigned int) * input), GFP_KERNEL); -+ -+ if (!temp || IS_ERR(temp)) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ memcpy(temp, dbs_tuners_ins.hotplug_load_history, -+ (max_windows * sizeof(unsigned int))); -+ kfree(dbs_tuners_ins.hotplug_load_history); -+ -+ /* replace old buffer, old number of sampling periods & old index */ -+ dbs_tuners_ins.hotplug_load_history = temp; -+ dbs_tuners_ins.hotplug_out_sampling_periods = input; -+ dbs_tuners_ins.hotplug_load_index = max_windows; -+out: -+ mutex_unlock(&dbs_mutex); -+ -+ return ret; -+} -+ -+static ssize_t store_ignore_nice_load(struct kobject *a, struct attribute *b, -+ const char *buf, size_t count) -+{ -+ unsigned int input; -+ int ret; -+ -+ unsigned int j; -+ -+ ret = sscanf(buf, "%u", &input); -+ if (ret != 1) -+ return -EINVAL; -+ -+ if (input > 1) -+ input = 1; -+ -+ mutex_lock(&dbs_mutex); -+ if (input == dbs_tuners_ins.ignore_nice) { /* nothing to do */ -+ mutex_unlock(&dbs_mutex); -+ return count; -+ } -+ dbs_tuners_ins.ignore_nice = input; -+ -+ /* we need to re-evaluate prev_cpu_idle */ -+ for_each_online_cpu(j) { -+ struct cpu_dbs_info_s *dbs_info; -+ dbs_info = &per_cpu(hp_cpu_dbs_info, j); -+ dbs_info->prev_cpu_idle = get_cpu_idle_time(j, -+ &dbs_info->prev_cpu_wall); -+ if (dbs_tuners_ins.ignore_nice) -+ dbs_info->prev_cpu_nice = kstat_cpu(j).cpustat.nice; -+ -+ } -+ mutex_unlock(&dbs_mutex); -+ -+ return count; -+} -+ -+static ssize_t store_io_is_busy(struct kobject *a, struct attribute *b, -+ const char *buf, size_t count) -+{ -+ unsigned int input; -+ int ret; -+ -+ ret = sscanf(buf, "%u", &input); -+ if (ret != 1) -+ return -EINVAL; -+ -+ mutex_lock(&dbs_mutex); -+ dbs_tuners_ins.io_is_busy = !!input; -+ mutex_unlock(&dbs_mutex); -+ -+ return count; -+} -+ -+define_one_global_rw(sampling_rate); -+define_one_global_rw(up_threshold); -+define_one_global_rw(down_threshold); -+define_one_global_rw(hotplug_in_sampling_periods); -+define_one_global_rw(hotplug_out_sampling_periods); -+define_one_global_rw(ignore_nice_load); -+define_one_global_rw(io_is_busy); -+ -+static struct attribute *dbs_attributes[] = { -+ &sampling_rate.attr, -+ &up_threshold.attr, -+ &down_threshold.attr, -+ &hotplug_in_sampling_periods.attr, -+ &hotplug_out_sampling_periods.attr, -+ &ignore_nice_load.attr, -+ &io_is_busy.attr, -+ NULL -+}; -+ -+static struct attribute_group dbs_attr_group = { -+ .attrs = dbs_attributes, -+ .name = "hotplug", -+}; -+ -+/************************** sysfs end ************************/ -+ -+static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info) -+{ -+ /* combined load of all enabled CPUs */ -+ unsigned int total_load = 0; -+ /* single largest CPU load */ -+ unsigned int max_load = 0; -+ /* average load across all enabled CPUs */ -+ unsigned int avg_load = 0; -+ /* average load across multiple sampling periods for hotplug events */ -+ unsigned int hotplug_in_avg_load = 0; -+ unsigned int hotplug_out_avg_load = 0; -+ /* number of sampling periods averaged for hotplug decisions */ -+ unsigned int periods; -+ -+ struct cpufreq_policy *policy; -+ unsigned int index = 0; -+ unsigned int i, j; -+ -+ policy = this_dbs_info->cur_policy; -+ -+ /* -+ * cpu load accounting -+ * get highest load, total load and average load across all CPUs -+ */ -+ for_each_cpu(j, policy->cpus) { -+ unsigned int load; -+ unsigned int idle_time, wall_time; -+ cputime64_t cur_wall_time, cur_idle_time; -+ struct cpu_dbs_info_s *j_dbs_info; -+ -+ j_dbs_info = &per_cpu(hp_cpu_dbs_info, j); -+ -+ /* update both cur_idle_time and cur_wall_time */ -+ cur_idle_time = get_cpu_idle_time(j, &cur_wall_time); -+ -+ /* how much wall time has passed since last iteration? */ -+ wall_time = (unsigned int) cputime64_sub(cur_wall_time, -+ j_dbs_info->prev_cpu_wall); -+ j_dbs_info->prev_cpu_wall = cur_wall_time; -+ -+ /* how much idle time has passed since last iteration? */ -+ idle_time = (unsigned int) cputime64_sub(cur_idle_time, -+ j_dbs_info->prev_cpu_idle); -+ j_dbs_info->prev_cpu_idle = cur_idle_time; -+ -+ if (unlikely(!wall_time || wall_time < idle_time)) -+ continue; -+ -+ /* load is the percentage of time not spent in idle */ -+ load = 100 * (wall_time - idle_time) / wall_time; -+ -+ /* keep track of combined load across all CPUs */ -+ total_load += load; -+ -+ /* keep track of highest single load across all CPUs */ -+ if (load > max_load) -+ max_load = load; -+ } -+ -+ /* calculate the average load across all related CPUs */ -+ avg_load = total_load / num_online_cpus(); -+ -+ -+ /* -+ * hotplug load accounting -+ * average load over multiple sampling periods -+ */ -+ -+ /* how many sampling periods do we use for hotplug decisions? */ -+ periods = max(dbs_tuners_ins.hotplug_in_sampling_periods, -+ dbs_tuners_ins.hotplug_out_sampling_periods); -+ -+ /* store avg_load in the circular buffer */ -+ dbs_tuners_ins.hotplug_load_history[dbs_tuners_ins.hotplug_load_index] -+ = avg_load; -+ -+ /* compute average load across in & out sampling periods */ -+ for (i = 0, j = dbs_tuners_ins.hotplug_load_index; -+ i < periods; i++, j--) { -+ if (i < dbs_tuners_ins.hotplug_in_sampling_periods) -+ hotplug_in_avg_load += -+ dbs_tuners_ins.hotplug_load_history[j]; -+ if (i < dbs_tuners_ins.hotplug_out_sampling_periods) -+ hotplug_out_avg_load += -+ dbs_tuners_ins.hotplug_load_history[j]; -+ -+ if (j == 0) -+ j = periods; -+ } -+ -+ hotplug_in_avg_load = hotplug_in_avg_load / -+ dbs_tuners_ins.hotplug_in_sampling_periods; -+ -+ hotplug_out_avg_load = hotplug_out_avg_load / -+ dbs_tuners_ins.hotplug_out_sampling_periods; -+ -+ /* return to first element if we're at the circular buffer's end */ -+ if (++dbs_tuners_ins.hotplug_load_index == periods) -+ dbs_tuners_ins.hotplug_load_index = 0; -+ -+ /* check for frequency increase */ -+ if (avg_load > dbs_tuners_ins.up_threshold) { -+ /* should we enable auxillary CPUs? */ -+ if (num_online_cpus() < 2 && hotplug_in_avg_load > -+ dbs_tuners_ins.up_threshold) { -+ /* hotplug with cpufreq is nasty -+ * a call to cpufreq_governor_dbs may cause a lockup. -+ * wq is not running here so its safe. -+ */ -+ mutex_unlock(&this_dbs_info->timer_mutex); -+ cpu_up(1); -+ mutex_lock(&this_dbs_info->timer_mutex); -+ goto out; -+ } -+ -+ /* increase to highest frequency supported */ -+ if (policy->cur < policy->max) -+ __cpufreq_driver_target(policy, policy->max, -+ CPUFREQ_RELATION_H); -+ -+ goto out; -+ } -+ -+ /* check for frequency decrease */ -+ if (avg_load < dbs_tuners_ins.down_threshold) { -+ /* are we at the minimum frequency already? */ -+ if (policy->cur == policy->min) { -+ /* should we disable auxillary CPUs? */ -+ if (num_online_cpus() > 1 && hotplug_out_avg_load < -+ dbs_tuners_ins.down_threshold) { -+ mutex_unlock(&this_dbs_info->timer_mutex); -+ cpu_down(1); -+ mutex_lock(&this_dbs_info->timer_mutex); -+ } -+ goto out; -+ } -+ -+ /* bump down to the next lowest frequency in the table */ -+ if (cpufreq_frequency_table_next_lowest(policy, -+ this_dbs_info->freq_table, &index)) { -+ pr_err("%s: failed to get next lowest frequency\n", -+ __func__); -+ goto out; -+ } -+ -+ __cpufreq_driver_target(policy, -+ this_dbs_info->freq_table[index].frequency, -+ CPUFREQ_RELATION_L); -+ } -+out: -+ return; -+} -+ -+static void do_dbs_timer(struct work_struct *work) -+{ -+ struct cpu_dbs_info_s *dbs_info = -+ container_of(work, struct cpu_dbs_info_s, work.work); -+ unsigned int cpu = dbs_info->cpu; -+ -+ /* We want all related CPUs to do sampling nearly on same jiffy */ -+ int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); -+ -+ mutex_lock(&dbs_info->timer_mutex); -+ dbs_check_cpu(dbs_info); -+ queue_delayed_work_on(cpu, khotplug_wq, &dbs_info->work, delay); -+ mutex_unlock(&dbs_info->timer_mutex); -+} -+ -+static inline void dbs_timer_init(struct cpu_dbs_info_s *dbs_info) -+{ -+ /* We want all related CPUs to do sampling nearly on same jiffy */ -+ int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); -+ delay -= jiffies % delay; -+ -+ INIT_DELAYED_WORK_DEFERRABLE(&dbs_info->work, do_dbs_timer); -+ queue_delayed_work_on(dbs_info->cpu, khotplug_wq, &dbs_info->work, -+ delay); -+} -+ -+static inline void dbs_timer_exit(struct cpu_dbs_info_s *dbs_info) -+{ -+ cancel_delayed_work_sync(&dbs_info->work); -+} -+ -+static int cpufreq_governor_dbs(struct cpufreq_policy *policy, -+ unsigned int event) -+{ -+ unsigned int cpu = policy->cpu; -+ struct cpu_dbs_info_s *this_dbs_info; -+ unsigned int i, j, max_periods; -+ int rc; -+ -+ this_dbs_info = &per_cpu(hp_cpu_dbs_info, cpu); -+ -+ switch (event) { -+ case CPUFREQ_GOV_START: -+ if ((!cpu_online(cpu)) || (!policy->cur)) -+ return -EINVAL; -+ -+ mutex_lock(&dbs_mutex); -+ dbs_enable++; -+ for_each_cpu(j, policy->cpus) { -+ struct cpu_dbs_info_s *j_dbs_info; -+ j_dbs_info = &per_cpu(hp_cpu_dbs_info, j); -+ j_dbs_info->cur_policy = policy; -+ -+ j_dbs_info->prev_cpu_idle = get_cpu_idle_time(j, -+ &j_dbs_info->prev_cpu_wall); -+ if (dbs_tuners_ins.ignore_nice) { -+ j_dbs_info->prev_cpu_nice = -+ kstat_cpu(j).cpustat.nice; -+ } -+ -+ max_periods = max(DEFAULT_HOTPLUG_IN_SAMPLING_PERIODS, -+ DEFAULT_HOTPLUG_OUT_SAMPLING_PERIODS); -+ dbs_tuners_ins.hotplug_load_history = kmalloc( -+ (sizeof(unsigned int) * max_periods), -+ GFP_KERNEL); -+ if (!dbs_tuners_ins.hotplug_load_history) { -+ WARN_ON(1); -+ return -ENOMEM; -+ } -+ for (i = 0; i < max_periods; i++) -+ dbs_tuners_ins.hotplug_load_history[i] = 50; -+ } -+ this_dbs_info->cpu = cpu; -+ this_dbs_info->freq_table = cpufreq_frequency_get_table(cpu); -+ /* -+ * Start the timerschedule work, when this governor -+ * is used for first time -+ */ -+ if (dbs_enable == 1) { -+ rc = sysfs_create_group(cpufreq_global_kobject, -+ &dbs_attr_group); -+ if (rc) { -+ mutex_unlock(&dbs_mutex); -+ return rc; -+ } -+ } -+ mutex_unlock(&dbs_mutex); -+ -+ mutex_init(&this_dbs_info->timer_mutex); -+ dbs_timer_init(this_dbs_info); -+ break; -+ -+ case CPUFREQ_GOV_STOP: -+ dbs_timer_exit(this_dbs_info); -+ -+ mutex_lock(&dbs_mutex); -+ mutex_destroy(&this_dbs_info->timer_mutex); -+ dbs_enable--; -+ mutex_unlock(&dbs_mutex); -+ if (!dbs_enable) -+ sysfs_remove_group(cpufreq_global_kobject, -+ &dbs_attr_group); -+ kfree(dbs_tuners_ins.hotplug_load_history); -+ /* -+ * XXX BIG CAVEAT: Stopping the governor with CPU1 offline -+ * will result in it remaining offline until the user onlines -+ * it again. It is up to the user to do this (for now). -+ */ -+ break; -+ -+ case CPUFREQ_GOV_LIMITS: -+ mutex_lock(&this_dbs_info->timer_mutex); -+ if (policy->max < this_dbs_info->cur_policy->cur) -+ __cpufreq_driver_target(this_dbs_info->cur_policy, -+ policy->max, CPUFREQ_RELATION_H); -+ else if (policy->min > this_dbs_info->cur_policy->cur) -+ __cpufreq_driver_target(this_dbs_info->cur_policy, -+ policy->min, CPUFREQ_RELATION_L); -+ mutex_unlock(&this_dbs_info->timer_mutex); -+ break; -+ } -+ return 0; -+} -+ -+static int __init cpufreq_gov_dbs_init(void) -+{ -+ int err; -+ cputime64_t wall; -+ u64 idle_time; -+ int cpu = get_cpu(); -+ -+ idle_time = get_cpu_idle_time_us(cpu, &wall); -+ put_cpu(); -+ if (idle_time != -1ULL) { -+ dbs_tuners_ins.up_threshold = DEFAULT_UP_FREQ_MIN_LOAD; -+ } else { -+ pr_err("cpufreq-hotplug: %s: assumes CONFIG_NO_HZ\n", -+ __func__); -+ return -EINVAL; -+ } -+ -+ khotplug_wq = create_workqueue("khotplug"); -+ if (!khotplug_wq) { -+ pr_err("Creation of khotplug failed\n"); -+ return -EFAULT; -+ } -+ err = cpufreq_register_governor(&cpufreq_gov_hotplug); -+ if (err) -+ destroy_workqueue(khotplug_wq); -+ -+ return err; -+} -+ -+static void __exit cpufreq_gov_dbs_exit(void) -+{ -+ cpufreq_unregister_governor(&cpufreq_gov_hotplug); -+ destroy_workqueue(khotplug_wq); -+} -+ -+MODULE_AUTHOR("Mike Turquette <mturquette@ti.com>"); -+MODULE_DESCRIPTION("'cpufreq_hotplug' - cpufreq governor for dynamic frequency scaling and CPU hotplugging"); -+MODULE_LICENSE("GPL"); -+ -+#ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG -+fs_initcall(cpufreq_gov_dbs_init); -+#else -+module_init(cpufreq_gov_dbs_init); -+#endif -+module_exit(cpufreq_gov_dbs_exit); -diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h -index a38fca8..6cbc3df 100644 ---- a/include/linux/cpufreq.h -+++ b/include/linux/cpufreq.h -@@ -355,6 +355,9 @@ extern struct cpufreq_governor cpufreq_gov_ondemand; - #elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE) - extern struct cpufreq_governor cpufreq_gov_conservative; - #define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_conservative) -+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG) -+extern struct cpufreq_governor cpufreq_gov_hotplug; -+#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_hotplug) - #endif - - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0001-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0001-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch deleted file mode 100644 index d150dfc..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0001-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 33668b07abd5e66a263cc8b4b88587646f38bed0 Mon Sep 17 00:00:00 2001 -From: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> -Date: Wed, 11 Aug 2010 17:02:43 -0700 -Subject: [PATCH 1/8] OMAP: CPUfreq: ensure driver initializes after cpufreq framework and governors - -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> ---- - arch/arm/plat-omap/cpu-omap.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index da4f68d..cd09d4b 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -160,7 +160,7 @@ static int __init omap_cpufreq_init(void) - return cpufreq_register_driver(&omap_driver); - } - --arch_initcall(omap_cpufreq_init); -+late_initcall(omap_cpufreq_init); - - /* - * if ever we want to remove this, upon cleanup call: --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0002-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0002-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch deleted file mode 100644 index d62e04d..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0002-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch +++ /dev/null @@ -1,31 +0,0 @@ -From e89b1544450fb8410a44004e48d6b330bc39f0ce Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@deeprootsystems.com> -Date: Wed, 11 Aug 2010 17:05:38 -0700 -Subject: [PATCH 2/8] OMAP: CPUfreq: ensure policy is fully initialized - -Ensure policy min/max/cur values are initialized when OMAP -CPUfreq driver starts. - -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> ---- - arch/arm/plat-omap/cpu-omap.c | 4 ++++ - 1 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index cd09d4b..1b36664 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -126,6 +126,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - VERY_HI_RATE) / 1000; - } - -+ policy->min = policy->cpuinfo.min_freq; -+ policy->max = policy->cpuinfo.max_freq; -+ policy->cur = omap_getspeed(0); -+ - /* FIXME: what's the actual transition time? */ - policy->cpuinfo.transition_latency = 300 * 1000; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch deleted file mode 100644 index fbe1621..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch +++ /dev/null @@ -1,263 +0,0 @@ -From 948b868e4a83b054e8a58362238bc6cd61c0aeab Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Mon, 10 Nov 2008 17:00:25 +0530 -Subject: [PATCH 3/8] OMAP3 PM: CPUFreq driver for OMAP3 - -CPUFreq driver for OMAP3 - -With additional fixes and cleanups from Tero Kristo: -- Fix rate calculation bug in omap3_select_table_rate -- Refreshed DVFS VDD1 control against latest clock fw - -Signed-off-by: Tero Kristo <tero.kristo@nokia.com> -Signed-off-by: Rajendra Nayak <rnayak@ti.com> - -OMAP3: PM: CPUFreq: Fix omap_getspeed. - -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> - -Make sure omap cpufreq driver initializes after cpufreq framework and governors - -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> - -merge: CPUFreq: remove obsolete funcs - -OMAP3 clock: Update cpufreq driver - -This patch removes all refrences to virtual clock -nodes in CPUFreq driver. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Tero Kristo <tero.kristo@nokia.com> -Signed-off-by: Jean Pihet <jpihet@mvista.com> - -PM: Prevent direct cpufreq scaling during initialization - -It is seen that the OMAP specific cpufreq initialization code tries to -scale the MPU frequency to the highest possible without taking care of -the voltage level. On power on reset the power IC does not provide the -necessary voltage for the highest available MPU frequency (that would -satisfy all Si families). This potentially is an window of opportunity -for things to go wrong. - -Signed-off-by: Romit Dasgupta <romit@ti.com> -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> - -OMAP3: PM: enable 600MHz (overdrive) OPP - -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> - -omap3: introduce cpufreq - -OMAP OPP layer functions now have dependencies of CONFIG_CPU_FREQ only. - -With this patch, omap opp layer now has its compilation flags -bound to CONFIG_CPU_FREQ. Also its code has been removed from pm34xx.c. - -A new file has been created to contain cpu freq code related to -OMAP3: cpufreq34xx.c - -OMAP34xx and OMAP36xx family OPPs are made available - -Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> -Signed-off-by: Romit Dasgupta <romit@ti.com> -Signed-off-by: Rajendra Nayak <rnayak@ti.com> - -omap3: cpufreq: allow default opp table init - -For board files which choose to override the defaults, the existing -mechanism will work, for boards that would like to work with defaults, -allow init_common_hw to call init_opp_table to initialize if not -already initialized. this will allow all omap boards which have opp -tables predefined for a silicon to use the same. - -Originally reported for overo: -http://marc.info/?t=127265269400004&r=1&w=2 - -Signed-off-by: Nishanth Menon <nm@ti.com> -Reported-by: Peter Tseng <tsenpet09@gmail.com> -Cc: Cliff Brake <cliff.brake@gmail.com> -Cc: Kevin Hilman <khilman@deeprootsystems.com> - -OMAP2: update OPP data to be device based - -Cc: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> - -OMAP3: CPUfreq: update to device-based OPP API - -Update usage of OPP API to use new device-based API. This requires -getting the 'struct device' for the MPU and using that with the OPP -API. - -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> - -omap3: opp: make independent of cpufreq - -Make opp3xx data which is registered with the opp layer -dependent purely on CONFIG_PM as opp layer and pm.c users -are CONFIG_PM dependent not cpufreq dependent. -so we rename the data definition to opp3xxx_data.c (inline with what -we have for omap2), also move the build definition to be under -the existing CONFIG_PM build instead of CPUFREQ. - -Cc: Eduardo Valentin <eduardo.valentin@nokia.com> -Cc: Kevin Hilman <khilman@deeprootsystems.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Cc: Sanjeev Premi <premi@ti.com> -Cc: Thara Gopinath <thara@ti.com> -Cc: Tony Lindgren <tony@atomide.com> - -Signed-off-by: Nishanth Menon <nm@ti.com> ---- - arch/arm/mach-omap2/clock.h | 14 +++++++++++++- - arch/arm/mach-omap2/clock34xx.c | 2 ++ - arch/arm/plat-omap/cpu-omap.c | 34 +++++++++++++++++++++++++++++++--- - 3 files changed, 46 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h -index e10ff2b..0a07e50 100644 ---- a/arch/arm/mach-omap2/clock.h -+++ b/arch/arm/mach-omap2/clock.h -@@ -141,7 +141,9 @@ extern const struct clksel_rate gpt_sys_rates[]; - extern const struct clksel_rate gfx_l3_rates[]; - extern const struct clksel_rate dsp_ick_rates[]; - --#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) -+#ifdef CONFIG_CPU_FREQ -+ -+#ifdef CONFIG_ARCH_OMAP2 - extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); - extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); - #else -@@ -149,6 +151,16 @@ extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) - #define omap2_clk_exit_cpufreq_table 0 - #endif - -+#ifdef CONFIG_ARCH_OMAP3 -+extern void omap3_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); -+extern void omap3_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); -+#else -+#define omap3_clk_init_cpufreq_table 0 -+#define omap3_clk_exit_cpufreq_table 0 -+#endif -+ -+#endif /* CONFIG_CPU_FREQ */ -+ - extern const struct clkops clkops_omap2_iclk_dflt_wait; - extern const struct clkops clkops_omap2_iclk_dflt; - extern const struct clkops clkops_omap2_iclk_idle_only; -diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c -index 1fc96b9..119e135 100644 ---- a/arch/arm/mach-omap2/clock34xx.c -+++ b/arch/arm/mach-omap2/clock34xx.c -@@ -20,6 +20,8 @@ - #include <linux/kernel.h> - #include <linux/clk.h> - #include <linux/io.h> -+#include <linux/err.h> -+#include <linux/cpufreq.h> - - #include <plat/clock.h> - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index 1b36664..f0f9430 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -8,6 +8,10 @@ - * - * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King - * -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. -+ * Updated to support OMAP3 -+ * Rajendra Nayak <rnayak@ti.com> -+ * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -@@ -26,12 +30,19 @@ - #include <plat/clock.h> - #include <asm/system.h> - -+#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -+#include <plat/omap-pm.h> -+#include <plat/opp.h> -+#endif -+ - #define VERY_HI_RATE 900000000 - - static struct cpufreq_frequency_table *freq_table; - - #ifdef CONFIG_ARCH_OMAP1 - #define MPU_CLK "mpu" -+#elif CONFIG_ARCH_OMAP3 -+#define MPU_CLK "arm_fck" - #else - #define MPU_CLK "virt_prcm_set" - #endif -@@ -73,7 +84,13 @@ static int omap_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) - { -+#ifdef CONFIG_ARCH_OMAP1 - struct cpufreq_freqs freqs; -+#endif -+#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -+ unsigned long freq; -+ struct device *mpu_dev = omap2_get_mpuss_device(); -+#endif - int ret = 0; - - /* Ensure desired rate is within allowed range. Some govenors -@@ -83,13 +100,13 @@ static int omap_target(struct cpufreq_policy *policy, - if (target_freq > policy->max) - target_freq = policy->max; - -+#ifdef CONFIG_ARCH_OMAP1 - freqs.old = omap_getspeed(0); - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; - freqs.cpu = 0; - - if (freqs.old == freqs.new) - return ret; -- - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); - #ifdef CONFIG_CPU_FREQ_DEBUG - printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", -@@ -97,7 +114,11 @@ static int omap_target(struct cpufreq_policy *policy, - #endif - ret = clk_set_rate(mpu_clk, freqs.new * 1000); - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -- -+#elif defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -+ freq = target_freq * 1000; -+ if (opp_find_freq_ceil(mpu_dev, &freq)) -+ omap_pm_cpu_set_freq(freq); -+#endif - return ret; - } - -@@ -114,7 +135,14 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - - policy->cur = policy->min = policy->max = omap_getspeed(0); - -- clk_init_cpufreq_table(&freq_table); -+ if (!cpu_is_omap34xx()) { -+ clk_init_cpufreq_table(&freq_table); -+ } else { -+ struct device *mpu_dev = omap2_get_mpuss_device(); -+ -+ opp_init_cpufreq_table(mpu_dev, &freq_table); -+ } -+ - if (freq_table) { - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); - if (!result) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0004-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0004-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch deleted file mode 100644 index 36742e4..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0004-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 86227f1eb341e571163464cb0a412ed2179f2541 Mon Sep 17 00:00:00 2001 -From: Silesh C V <silesh@ti.com> -Date: Wed, 29 Sep 2010 14:52:54 +0530 -Subject: [PATCH 4/8] OMAP: PM: CPUFREQ: Fix conditional compilation - -Fix conditional compilation. A conditional expresiion -should follow "#elif", in this case #elif clause should -check whether CONFIG_ARCH_OMAP3 is defined or not -(ie. defined(CONFIG_ARCH_OMAP3)) rather than checking for -the value of the macro. - -Signed-off-by: Silesh C V <silesh@ti.com> ---- - arch/arm/plat-omap/cpu-omap.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index f0f9430..c3ac065 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -41,7 +41,7 @@ static struct cpufreq_frequency_table *freq_table; - - #ifdef CONFIG_ARCH_OMAP1 - #define MPU_CLK "mpu" --#elif CONFIG_ARCH_OMAP3 -+#elif defined(CONFIG_ARCH_OMAP3) - #define MPU_CLK "arm_fck" - #else - #define MPU_CLK "virt_prcm_set" --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0005-cpufreq-fixup-after-new-OPP-layer-merged.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0005-cpufreq-fixup-after-new-OPP-layer-merged.patch deleted file mode 100644 index 7cf6932..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0005-cpufreq-fixup-after-new-OPP-layer-merged.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 4764137dd613362656726a15cb8184724aeb99bb Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@deeprootsystems.com> -Date: Tue, 16 Nov 2010 11:48:41 -0800 -Subject: [PATCH 5/8] cpufreq: fixup after new OPP layer merged - ---- - arch/arm/plat-omap/cpu-omap.c | 3 ++- - 1 files changed, 2 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index c3ac065..9cd2709 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -25,6 +25,7 @@ - #include <linux/err.h> - #include <linux/clk.h> - #include <linux/io.h> -+#include <linux/opp.h> - - #include <mach/hardware.h> - #include <plat/clock.h> -@@ -32,7 +33,7 @@ - - #if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) - #include <plat/omap-pm.h> --#include <plat/opp.h> -+#include <plat/common.h> - #endif - - #define VERY_HI_RATE 900000000 --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0006-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0006-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch deleted file mode 100644 index cfc257e..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0006-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch +++ /dev/null @@ -1,669 +0,0 @@ -From e16548716c5cbc3c9885d05f1654d83d5411a3a7 Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar <santosh.shilimkar@ti.com> -Date: Mon, 14 Mar 2011 17:08:48 +0530 -Subject: [PATCH 6/8] OMAP: cpufreq: Split OMAP1 and OMAP2PLUS CPUfreq drivers. - -This patch is an attempt to cleanup the #ifdeferry in the -omap CPUfreq drivers. - -The split betwenn OMAP1 and OMAP2PLUS is logical because - - OMAP1 doesn't support opp layer. - - OMAP1 build is seperate from omap2plus. - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Cc: Kevin Hilman <khilman@ti.com> -Cc: Vishwanath BS <vishwanath.bs@ti.com> ---- - arch/arm/mach-omap1/Makefile | 3 + - arch/arm/mach-omap1/omap1-cpufreq.c | 176 ++++++++++++++++++++++++++ - arch/arm/mach-omap2/Makefile | 3 + - arch/arm/mach-omap2/omap2plus-cpufreq.c | 201 ++++++++++++++++++++++++++++++ - arch/arm/plat-omap/Makefile | 1 - - arch/arm/plat-omap/cpu-omap.c | 204 ------------------------------- - 6 files changed, 383 insertions(+), 205 deletions(-) - create mode 100644 arch/arm/mach-omap1/omap1-cpufreq.c - create mode 100644 arch/arm/mach-omap2/omap2plus-cpufreq.c - delete mode 100644 arch/arm/plat-omap/cpu-omap.c - -diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile -index af98117..e5082b0 100644 ---- a/arch/arm/mach-omap1/Makefile -+++ b/arch/arm/mach-omap1/Makefile -@@ -10,6 +10,9 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o - - obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o - -+# CPUFREQ driver -+obj-$(CONFIG_CPU_FREQ) += omap1-cpufreq.o -+ - # Power Management - obj-$(CONFIG_PM) += pm.o sleep.o pm_bus.o - -diff --git a/arch/arm/mach-omap1/omap1-cpufreq.c b/arch/arm/mach-omap1/omap1-cpufreq.c -new file mode 100644 -index 0000000..682cdc8 ---- /dev/null -+++ b/arch/arm/mach-omap1/omap1-cpufreq.c -@@ -0,0 +1,176 @@ -+/* -+ * OMAP1 cpufreq driver -+ * -+ * CPU frequency scaling for OMAP -+ * -+ * Copyright (C) 2005 Nokia Corporation -+ * Written by Tony Lindgren <tony@atomide.com> -+ * -+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King -+ * -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. -+ * Updated to support OMAP3 -+ * Rajendra Nayak <rnayak@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/types.h> -+#include <linux/kernel.h> -+#include <linux/sched.h> -+#include <linux/cpufreq.h> -+#include <linux/delay.h> -+#include <linux/init.h> -+#include <linux/err.h> -+#include <linux/clk.h> -+#include <linux/io.h> -+#include <linux/opp.h> -+ -+#include <asm/system.h> -+ -+#include <plat/clock.h> -+#include <plat/omap-pm.h> -+ -+#include <mach/hardware.h> -+ -+#define VERY_HI_RATE 900000000 -+ -+static struct cpufreq_frequency_table *freq_table; -+static struct clk *mpu_clk; -+ -+static int omap_verify_speed(struct cpufreq_policy *policy) -+{ -+ if (freq_table) -+ return cpufreq_frequency_table_verify(policy, freq_table); -+ -+ if (policy->cpu) -+ return -EINVAL; -+ -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ -+ policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; -+ policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ return 0; -+} -+ -+static unsigned int omap_getspeed(unsigned int cpu) -+{ -+ unsigned long rate; -+ -+ if (cpu) -+ return 0; -+ -+ rate = clk_get_rate(mpu_clk) / 1000; -+ return rate; -+} -+ -+static int omap_target(struct cpufreq_policy *policy, -+ unsigned int target_freq, -+ unsigned int relation) -+{ -+ struct cpufreq_freqs freqs; -+ int ret = 0; -+ -+ /* Ensure desired rate is within allowed range. Some govenors -+ * (ondemand) will just pass target_freq=0 to get the minimum. */ -+ if (target_freq < policy->min) -+ target_freq = policy->min; -+ if (target_freq > policy->max) -+ target_freq = policy->max; -+ -+ freqs.old = omap_getspeed(0); -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -+ freqs.cpu = 0; -+ -+ if (freqs.old == freqs.new) -+ return ret; -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ -+#ifdef CONFIG_CPU_FREQ_DEBUG -+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); -+#endif -+ ret = clk_set_rate(mpu_clk, freqs.new * 1000); -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ -+ return ret; -+} -+ -+static int __init omap_cpu_init(struct cpufreq_policy *policy) -+{ -+ int result = 0; -+ -+ mpu_clk = clk_get(NULL, "mpu"); -+ if (IS_ERR(mpu_clk)) -+ return PTR_ERR(mpu_clk); -+ -+ if (policy->cpu != 0) -+ return -EINVAL; -+ -+ policy->cur = policy->min = policy->max = omap_getspeed(0); -+ -+ clk_init_cpufreq_table(&freq_table); -+ -+ if (freq_table) { -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -+ if (!result) -+ cpufreq_frequency_table_get_attr(freq_table, -+ policy->cpu); -+ } else { -+ policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; -+ policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, -+ VERY_HI_RATE) / 1000; -+ } -+ -+ policy->min = policy->cpuinfo.min_freq; -+ policy->max = policy->cpuinfo.max_freq; -+ policy->cur = omap_getspeed(0); -+ -+ /* FIXME: what's the actual transition time? */ -+ policy->cpuinfo.transition_latency = 300 * 1000; -+ -+ return 0; -+} -+ -+static int omap_cpu_exit(struct cpufreq_policy *policy) -+{ -+ clk_exit_cpufreq_table(&freq_table); -+ clk_put(mpu_clk); -+ return 0; -+} -+ -+static struct freq_attr *omap_cpufreq_attr[] = { -+ &cpufreq_freq_attr_scaling_available_freqs, -+ NULL, -+}; -+ -+static struct cpufreq_driver omap_driver = { -+ .flags = CPUFREQ_STICKY, -+ .verify = omap_verify_speed, -+ .target = omap_target, -+ .get = omap_getspeed, -+ .init = omap_cpu_init, -+ .exit = omap_cpu_exit, -+ .name = "omap1", -+ .attr = omap_cpufreq_attr, -+}; -+ -+static int __init omap_cpufreq_init(void) -+{ -+ return cpufreq_register_driver(&omap_driver); -+} -+ -+static void __exit omap_cpufreq_exit(void) -+{ -+ cpufreq_unregister_driver(&omap_driver); -+} -+ -+MODULE_DESCRIPTION("cpufreq driver for OMAP1 SOCs"); -+MODULE_LICENSE("GPL"); -+module_init(omap_cpufreq_init); -+module_exit(omap_cpufreq_exit); -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index 05cd983..e9c2445 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -56,6 +56,9 @@ obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o - obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o - endif - -+# CPUFREQ driver -+obj-$(CONFIG_CPU_FREQ) += omap2plus-cpufreq.o -+ - # Power Management - ifeq ($(CONFIG_PM),y) - obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -new file mode 100644 -index 0000000..14f84cc ---- /dev/null -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -0,0 +1,201 @@ -+/* -+ * OMAP2PLUS cpufreq driver -+ * -+ * CPU frequency scaling for OMAP -+ * -+ * Copyright (C) 2005 Nokia Corporation -+ * Written by Tony Lindgren <tony@atomide.com> -+ * -+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King -+ * -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. -+ * Updated to support OMAP3 -+ * Rajendra Nayak <rnayak@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/types.h> -+#include <linux/kernel.h> -+#include <linux/sched.h> -+#include <linux/cpufreq.h> -+#include <linux/delay.h> -+#include <linux/init.h> -+#include <linux/err.h> -+#include <linux/clk.h> -+#include <linux/io.h> -+#include <linux/opp.h> -+ -+#include <asm/system.h> -+#include <asm/smp_plat.h> -+ -+#include <plat/clock.h> -+#include <plat/omap-pm.h> -+#include <plat/common.h> -+ -+#include <mach/hardware.h> -+ -+#define VERY_HI_RATE 900000000 -+ -+static struct cpufreq_frequency_table *freq_table; -+static struct clk *mpu_clk; -+ -+static int omap_verify_speed(struct cpufreq_policy *policy) -+{ -+ if (freq_table) -+ return cpufreq_frequency_table_verify(policy, freq_table); -+ -+ if (policy->cpu) -+ return -EINVAL; -+ -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ -+ policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; -+ policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ return 0; -+} -+ -+static unsigned int omap_getspeed(unsigned int cpu) -+{ -+ unsigned long rate; -+ -+ if (cpu) -+ return 0; -+ -+ rate = clk_get_rate(mpu_clk) / 1000; -+ return rate; -+} -+ -+static int omap_target(struct cpufreq_policy *policy, -+ unsigned int target_freq, -+ unsigned int relation) -+{ -+ int ret = 0; -+ struct cpufreq_freqs freqs; -+ -+ /* Ensure desired rate is within allowed range. Some govenors -+ * (ondemand) will just pass target_freq=0 to get the minimum. */ -+ if (target_freq < policy->min) -+ target_freq = policy->min; -+ if (target_freq > policy->max) -+ target_freq = policy->max; -+ -+ freqs.old = omap_getspeed(0); -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -+ freqs.cpu = 0; -+ -+ if (freqs.old == freqs.new) -+ return ret; -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ -+#ifdef CONFIG_CPU_FREQ_DEBUG -+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); -+#endif -+ -+ ret = clk_set_rate(mpu_clk, freqs.new * 1000); -+ -+ /* -+ * Generic CPUFREQ driver jiffy update is under !SMP. So jiffies -+ * won't get updated when UP machine cpufreq build with -+ * CONFIG_SMP enabled. Below code is added only to manage that -+ * scenario -+ */ -+ if (!is_smp()) -+ loops_per_jiffy = -+ cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ -+ return ret; -+} -+ -+static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) -+{ -+ int result = 0; -+ struct device *mpu_dev; -+ -+ if (cpu_is_omap24xx()) -+ mpu_clk = clk_get(NULL, "virt_prcm_set"); -+ else if (cpu_is_omap34xx()) -+ mpu_clk = clk_get(NULL, "dpll1_ck"); -+ else if (cpu_is_omap34xx()) -+ mpu_clk = clk_get(NULL, "dpll_mpu_ck"); -+ -+ if (IS_ERR(mpu_clk)) -+ return PTR_ERR(mpu_clk); -+ -+ if (policy->cpu != 0) -+ return -EINVAL; -+ -+ policy->cur = policy->min = policy->max = omap_getspeed(0); -+ -+ mpu_dev = omap2_get_mpuss_device(); -+ if (!mpu_dev) { -+ pr_warning("%s: unable to get the mpu device\n", __func__); -+ return -EINVAL; -+ } -+ opp_init_cpufreq_table(mpu_dev, &freq_table); -+ -+ if (freq_table) { -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -+ if (!result) -+ cpufreq_frequency_table_get_attr(freq_table, -+ policy->cpu); -+ } else { -+ policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; -+ policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, -+ VERY_HI_RATE) / 1000; -+ } -+ -+ policy->min = policy->cpuinfo.min_freq; -+ policy->max = policy->cpuinfo.max_freq; -+ policy->cur = omap_getspeed(0); -+ -+ /* FIXME: what's the actual transition time? */ -+ policy->cpuinfo.transition_latency = 300 * 1000; -+ -+ return 0; -+} -+ -+static int omap_cpu_exit(struct cpufreq_policy *policy) -+{ -+ clk_exit_cpufreq_table(&freq_table); -+ clk_put(mpu_clk); -+ return 0; -+} -+ -+static struct freq_attr *omap_cpufreq_attr[] = { -+ &cpufreq_freq_attr_scaling_available_freqs, -+ NULL, -+}; -+ -+static struct cpufreq_driver omap_driver = { -+ .flags = CPUFREQ_STICKY, -+ .verify = omap_verify_speed, -+ .target = omap_target, -+ .get = omap_getspeed, -+ .init = omap_cpu_init, -+ .exit = omap_cpu_exit, -+ .name = "omap2plus", -+ .attr = omap_cpufreq_attr, -+}; -+ -+static int __init omap_cpufreq_init(void) -+{ -+ return cpufreq_register_driver(&omap_driver); -+} -+ -+static void __exit omap_cpufreq_exit(void) -+{ -+ cpufreq_unregister_driver(&omap_driver); -+} -+ -+MODULE_DESCRIPTION("cpufreq driver for OMAP2PLUS SOCs"); -+MODULE_LICENSE("GPL"); -+module_init(omap_cpufreq_init); -+module_exit(omap_cpufreq_exit); -diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile -index a4a1285..ec7862e 100644 ---- a/arch/arm/plat-omap/Makefile -+++ b/arch/arm/plat-omap/Makefile -@@ -21,7 +21,6 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o - obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o - obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o - --obj-$(CONFIG_CPU_FREQ) += cpu-omap.o - obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o - obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o - obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -deleted file mode 100644 -index 9cd2709..0000000 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ /dev/null -@@ -1,204 +0,0 @@ --/* -- * linux/arch/arm/plat-omap/cpu-omap.c -- * -- * CPU frequency scaling for OMAP -- * -- * Copyright (C) 2005 Nokia Corporation -- * Written by Tony Lindgren <tony@atomide.com> -- * -- * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King -- * -- * Copyright (C) 2007-2008 Texas Instruments, Inc. -- * Updated to support OMAP3 -- * Rajendra Nayak <rnayak@ti.com> -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#include <linux/types.h> --#include <linux/kernel.h> --#include <linux/sched.h> --#include <linux/cpufreq.h> --#include <linux/delay.h> --#include <linux/init.h> --#include <linux/err.h> --#include <linux/clk.h> --#include <linux/io.h> --#include <linux/opp.h> -- --#include <mach/hardware.h> --#include <plat/clock.h> --#include <asm/system.h> -- --#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) --#include <plat/omap-pm.h> --#include <plat/common.h> --#endif -- --#define VERY_HI_RATE 900000000 -- --static struct cpufreq_frequency_table *freq_table; -- --#ifdef CONFIG_ARCH_OMAP1 --#define MPU_CLK "mpu" --#elif defined(CONFIG_ARCH_OMAP3) --#define MPU_CLK "arm_fck" --#else --#define MPU_CLK "virt_prcm_set" --#endif -- --static struct clk *mpu_clk; -- --/* TODO: Add support for SDRAM timing changes */ -- --static int omap_verify_speed(struct cpufreq_policy *policy) --{ -- if (freq_table) -- return cpufreq_frequency_table_verify(policy, freq_table); -- -- if (policy->cpu) -- return -EINVAL; -- -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -- policy->cpuinfo.max_freq); -- -- policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; -- policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -- policy->cpuinfo.max_freq); -- return 0; --} -- --static unsigned int omap_getspeed(unsigned int cpu) --{ -- unsigned long rate; -- -- if (cpu) -- return 0; -- -- rate = clk_get_rate(mpu_clk) / 1000; -- return rate; --} -- --static int omap_target(struct cpufreq_policy *policy, -- unsigned int target_freq, -- unsigned int relation) --{ --#ifdef CONFIG_ARCH_OMAP1 -- struct cpufreq_freqs freqs; --#endif --#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -- unsigned long freq; -- struct device *mpu_dev = omap2_get_mpuss_device(); --#endif -- int ret = 0; -- -- /* Ensure desired rate is within allowed range. Some govenors -- * (ondemand) will just pass target_freq=0 to get the minimum. */ -- if (target_freq < policy->min) -- target_freq = policy->min; -- if (target_freq > policy->max) -- target_freq = policy->max; -- --#ifdef CONFIG_ARCH_OMAP1 -- freqs.old = omap_getspeed(0); -- freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -- freqs.cpu = 0; -- -- if (freqs.old == freqs.new) -- return ret; -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); --#ifdef CONFIG_CPU_FREQ_DEBUG -- printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", -- freqs.old, freqs.new); --#endif -- ret = clk_set_rate(mpu_clk, freqs.new * 1000); -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); --#elif defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -- freq = target_freq * 1000; -- if (opp_find_freq_ceil(mpu_dev, &freq)) -- omap_pm_cpu_set_freq(freq); --#endif -- return ret; --} -- --static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) --{ -- int result = 0; -- -- mpu_clk = clk_get(NULL, MPU_CLK); -- if (IS_ERR(mpu_clk)) -- return PTR_ERR(mpu_clk); -- -- if (policy->cpu != 0) -- return -EINVAL; -- -- policy->cur = policy->min = policy->max = omap_getspeed(0); -- -- if (!cpu_is_omap34xx()) { -- clk_init_cpufreq_table(&freq_table); -- } else { -- struct device *mpu_dev = omap2_get_mpuss_device(); -- -- opp_init_cpufreq_table(mpu_dev, &freq_table); -- } -- -- if (freq_table) { -- result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -- if (!result) -- cpufreq_frequency_table_get_attr(freq_table, -- policy->cpu); -- } else { -- policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; -- policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, -- VERY_HI_RATE) / 1000; -- } -- -- policy->min = policy->cpuinfo.min_freq; -- policy->max = policy->cpuinfo.max_freq; -- policy->cur = omap_getspeed(0); -- -- /* FIXME: what's the actual transition time? */ -- policy->cpuinfo.transition_latency = 300 * 1000; -- -- return 0; --} -- --static int omap_cpu_exit(struct cpufreq_policy *policy) --{ -- clk_exit_cpufreq_table(&freq_table); -- clk_put(mpu_clk); -- return 0; --} -- --static struct freq_attr *omap_cpufreq_attr[] = { -- &cpufreq_freq_attr_scaling_available_freqs, -- NULL, --}; -- --static struct cpufreq_driver omap_driver = { -- .flags = CPUFREQ_STICKY, -- .verify = omap_verify_speed, -- .target = omap_target, -- .get = omap_getspeed, -- .init = omap_cpu_init, -- .exit = omap_cpu_exit, -- .name = "omap", -- .attr = omap_cpufreq_attr, --}; -- --static int __init omap_cpufreq_init(void) --{ -- return cpufreq_register_driver(&omap_driver); --} -- --late_initcall(omap_cpufreq_init); -- --/* -- * if ever we want to remove this, upon cleanup call: -- * -- * cpufreq_unregister_driver() -- * cpufreq_frequency_table_put_attr() -- */ -- --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0007-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0007-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch deleted file mode 100644 index 6624d1e..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0007-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch +++ /dev/null @@ -1,170 +0,0 @@ -From f375d3c39d2835929d34c2a046b8c43cea6d1467 Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar <santosh.shilimkar@ti.com> -Date: Mon, 14 Mar 2011 17:08:49 +0530 -Subject: [PATCH 7/8] OMAP2PLUS: cpufreq: Add SMP support to cater OMAP4430 - -On OMAP SMP configuartion, both processors share the voltage -and clock. So both CPUs needs to be scaled together and hence -needs software co-ordination. - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Cc: Kevin Hilman <khilman@ti.com> -cc: Vishwanath BS <vishwanath.bs@ti.com> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 73 ++++++++++++++++++++++++++----- - 1 files changed, 62 insertions(+), 11 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 14f84cc..8d472f6 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -26,9 +26,11 @@ - #include <linux/clk.h> - #include <linux/io.h> - #include <linux/opp.h> -+#include <linux/cpu.h> - - #include <asm/system.h> - #include <asm/smp_plat.h> -+#include <asm/cpu.h> - - #include <plat/clock.h> - #include <plat/omap-pm.h> -@@ -63,7 +65,7 @@ static unsigned int omap_getspeed(unsigned int cpu) - { - unsigned long rate; - -- if (cpu) -+ if (cpu >= NR_CPUS) - return 0; - - rate = clk_get_rate(mpu_clk) / 1000; -@@ -74,9 +76,13 @@ static int omap_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) - { -- int ret = 0; -+ int i, ret = 0; - struct cpufreq_freqs freqs; - -+ /* Changes not allowed until all CPUs are online */ -+ if (is_smp() && (num_online_cpus() < NR_CPUS)) -+ return ret; -+ - /* Ensure desired rate is within allowed range. Some govenors - * (ondemand) will just pass target_freq=0 to get the minimum. */ - if (target_freq < policy->min) -@@ -84,15 +90,25 @@ static int omap_target(struct cpufreq_policy *policy, - if (target_freq > policy->max) - target_freq = policy->max; - -- freqs.old = omap_getspeed(0); -+ freqs.old = omap_getspeed(policy->cpu); - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -- freqs.cpu = 0; -+ freqs.cpu = policy->cpu; - - if (freqs.old == freqs.new) - return ret; - -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ if (!is_smp()) { -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ goto set_freq; -+ } -+ -+ /* notifiers */ -+ for_each_cpu(i, policy->cpus) { -+ freqs.cpu = i; -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ } - -+set_freq: - #ifdef CONFIG_CPU_FREQ_DEBUG - pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); - #endif -@@ -105,12 +121,33 @@ static int omap_target(struct cpufreq_policy *policy, - * CONFIG_SMP enabled. Below code is added only to manage that - * scenario - */ -- if (!is_smp()) -+ freqs.new = omap_getspeed(policy->cpu); -+ if (!is_smp()) { - loops_per_jiffy = - cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ goto skip_lpj; -+ } - -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+#ifdef CONFIG_SMP -+ /* -+ * Note that loops_per_jiffy is not updated on SMP systems in -+ * cpufreq driver. So, update the per-CPU loops_per_jiffy value -+ * on frequency transition. We need to update all dependent CPUs. -+ */ -+ for_each_cpu(i, policy->cpus) -+ per_cpu(cpu_data, i).loops_per_jiffy = -+ cpufreq_scale(per_cpu(cpu_data, i).loops_per_jiffy, -+ freqs.old, freqs.new); -+#endif - -+ /* notifiers */ -+ for_each_cpu(i, policy->cpus) { -+ freqs.cpu = i; -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ } -+ -+skip_lpj: - return ret; - } - -@@ -118,6 +155,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - { - int result = 0; - struct device *mpu_dev; -+ static cpumask_var_t cpumask; - - if (cpu_is_omap24xx()) - mpu_clk = clk_get(NULL, "virt_prcm_set"); -@@ -129,12 +167,12 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - if (IS_ERR(mpu_clk)) - return PTR_ERR(mpu_clk); - -- if (policy->cpu != 0) -+ if (policy->cpu >= NR_CPUS) - return -EINVAL; - -- policy->cur = policy->min = policy->max = omap_getspeed(0); -- -+ policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); - mpu_dev = omap2_get_mpuss_device(); -+ - if (!mpu_dev) { - pr_warning("%s: unable to get the mpu device\n", __func__); - return -EINVAL; -@@ -154,7 +192,20 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - - policy->min = policy->cpuinfo.min_freq; - policy->max = policy->cpuinfo.max_freq; -- policy->cur = omap_getspeed(0); -+ policy->cur = omap_getspeed(policy->cpu); -+ -+ /* -+ * On OMAP SMP configuartion, both processors share the voltage -+ * and clock. So both CPUs needs to be scaled together and hence -+ * needs software co-ordination. Use cpufreq affected_cpus -+ * interface to handle this scenario. Additional is_smp() check -+ * is to keep SMP_ON_UP build working. -+ */ -+ if (is_smp()) { -+ policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; -+ cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask); -+ cpumask_copy(policy->cpus, cpumask); -+ } - - /* FIXME: what's the actual transition time? */ - policy->cpuinfo.transition_latency = 300 * 1000; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0008-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0008-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch deleted file mode 100644 index 3797443..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0008-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 6e101764a47cb6975a555e2237843ad391a542a4 Mon Sep 17 00:00:00 2001 -From: Jarkko Nikula <jhnikula@gmail.com> -Date: Thu, 14 Apr 2011 16:21:58 +0300 -Subject: [PATCH 8/8] OMAP2PLUS: cpufreq: Fix typo when attempting to set mpu_clk for OMAP4 - -Fix this typo as there is no dpll_mpu_ck for OMAP3 and code flow is clearly -trying to set mpu_clk for OMAP4 for which this dpll_mpu_ck is available. - -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 8d472f6..d53ce23 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -161,7 +161,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - mpu_clk = clk_get(NULL, "virt_prcm_set"); - else if (cpu_is_omap34xx()) - mpu_clk = clk_get(NULL, "dpll1_ck"); -- else if (cpu_is_omap34xx()) -+ else if (cpu_is_omap44xx()) - mpu_clk = clk_get(NULL, "dpll_mpu_ck"); - - if (IS_ERR(mpu_clk)) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0001-OMAP2-clockdomain-Add-an-api-to-read-idle-mode.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0001-OMAP2-clockdomain-Add-an-api-to-read-idle-mode.patch deleted file mode 100644 index d9b0517..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0001-OMAP2-clockdomain-Add-an-api-to-read-idle-mode.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 988f50cb51d18e81ed2f7673a09694d28c9d086a Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Tue, 5 Apr 2011 15:22:31 +0530 -Subject: [PATCH 1/6] OMAP2+: clockdomain: Add an api to read idle mode - -Add a clockdomain api to check if hardware supervised -idle transitions are enabled on a clockdomain. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> ---- - arch/arm/mach-omap2/clockdomain.c | 21 +++++++++++++++++++++ - arch/arm/mach-omap2/clockdomain.h | 3 +++ - 2 files changed, 24 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c -index 6cb6c03..2ab3686 100644 ---- a/arch/arm/mach-omap2/clockdomain.c -+++ b/arch/arm/mach-omap2/clockdomain.c -@@ -795,6 +795,27 @@ void clkdm_deny_idle(struct clockdomain *clkdm) - arch_clkdm->clkdm_deny_idle(clkdm); - } - -+/** -+ * clkdm_is_idle - Check if the clkdm hwsup/autoidle is enabled -+ * @clkdm: struct clockdomain * -+ * -+ * Returns true if the clockdomain is in hardware-supervised -+ * idle mode, or 0 otherwise. -+ * -+ */ -+int clkdm_is_idle(struct clockdomain *clkdm) -+{ -+ if (!clkdm) -+ return -EINVAL; -+ -+ if (!arch_clkdm || !arch_clkdm->clkdm_is_idle) -+ return -EINVAL; -+ -+ pr_debug("clockdomain: reading idle state for %s\n", clkdm->name); -+ -+ return arch_clkdm->clkdm_is_idle(clkdm); -+} -+ - - /* Clockdomain-to-clock framework interface code */ - -diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h -index 5823584..085ed82 100644 ---- a/arch/arm/mach-omap2/clockdomain.h -+++ b/arch/arm/mach-omap2/clockdomain.h -@@ -138,6 +138,7 @@ struct clockdomain { - * @clkdm_wakeup: Force a clockdomain to wakeup - * @clkdm_allow_idle: Enable hw supervised idle transitions for clock domain - * @clkdm_deny_idle: Disable hw supervised idle transitions for clock domain -+ * @clkdm_is_idle: Check if hw supervised idle transitions are enabled - * @clkdm_clk_enable: Put the clkdm in right state for a clock enable - * @clkdm_clk_disable: Put the clkdm in right state for a clock disable - */ -@@ -154,6 +155,7 @@ struct clkdm_ops { - int (*clkdm_wakeup)(struct clockdomain *clkdm); - void (*clkdm_allow_idle)(struct clockdomain *clkdm); - void (*clkdm_deny_idle)(struct clockdomain *clkdm); -+ int (*clkdm_is_idle)(struct clockdomain *clkdm); - int (*clkdm_clk_enable)(struct clockdomain *clkdm); - int (*clkdm_clk_disable)(struct clockdomain *clkdm); - }; -@@ -177,6 +179,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm); - - void clkdm_allow_idle(struct clockdomain *clkdm); - void clkdm_deny_idle(struct clockdomain *clkdm); -+int clkdm_is_idle(struct clockdomain *clkdm); - - int clkdm_wakeup(struct clockdomain *clkdm); - int clkdm_sleep(struct clockdomain *clkdm); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0002-OMAP2-clockdomain-Add-SoC-support-for-clkdm_is_idle.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0002-OMAP2-clockdomain-Add-SoC-support-for-clkdm_is_idle.patch deleted file mode 100644 index c7c1ea0..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0002-OMAP2-clockdomain-Add-SoC-support-for-clkdm_is_idle.patch +++ /dev/null @@ -1,86 +0,0 @@ -From e3ba8d41bfafd782f3ee7f8930d9bf393986c662 Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Tue, 5 Apr 2011 15:22:36 +0530 -Subject: [PATCH 2/6] OMAP2+: clockdomain: Add SoC support for clkdm_is_idle - -Add the SoC specific implemenation for clkdm_is_idle -for OMAP2/3 and OMAP4. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> ---- - arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 12 ++++++++++++ - arch/arm/mach-omap2/clockdomain44xx.c | 7 +++++++ - 2 files changed, 19 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c -index 48d0db7..db49baa 100644 ---- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c -+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c -@@ -13,6 +13,7 @@ - */ - - #include <linux/types.h> -+#include <linux/errno.h> - #include <plat/prcm.h> - #include "prm.h" - #include "prm2xxx_3xxx.h" -@@ -146,6 +147,15 @@ static void omap2_clkdm_deny_idle(struct clockdomain *clkdm) - _clkdm_del_autodeps(clkdm); - } - -+static int omap2_clkdm_is_idle(struct clockdomain *clkdm) -+{ -+ if (!clkdm->clktrctrl_mask) -+ return -1; -+ -+ return omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, -+ clkdm->clktrctrl_mask); -+} -+ - static void _enable_hwsup(struct clockdomain *clkdm) - { - if (cpu_is_omap24xx()) -@@ -252,6 +262,7 @@ struct clkdm_ops omap2_clkdm_operations = { - .clkdm_wakeup = omap2_clkdm_wakeup, - .clkdm_allow_idle = omap2_clkdm_allow_idle, - .clkdm_deny_idle = omap2_clkdm_deny_idle, -+ .clkdm_is_idle = omap2_clkdm_is_idle, - .clkdm_clk_enable = omap2_clkdm_clk_enable, - .clkdm_clk_disable = omap2_clkdm_clk_disable, - }; -@@ -269,6 +280,7 @@ struct clkdm_ops omap3_clkdm_operations = { - .clkdm_wakeup = omap3_clkdm_wakeup, - .clkdm_allow_idle = omap3_clkdm_allow_idle, - .clkdm_deny_idle = omap3_clkdm_deny_idle, -+ .clkdm_is_idle = omap2_clkdm_is_idle, - .clkdm_clk_enable = omap2_clkdm_clk_enable, - .clkdm_clk_disable = omap2_clkdm_clk_disable, - }; -diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c -index a1a4ecd..4b10727 100644 ---- a/arch/arm/mach-omap2/clockdomain44xx.c -+++ b/arch/arm/mach-omap2/clockdomain44xx.c -@@ -93,6 +93,12 @@ static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) - clkdm->cm_inst, clkdm->clkdm_offs); - } - -+static int omap4_clkdm_is_idle(struct clockdomain *clkdm) -+{ -+ return omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, -+ clkdm->cm_inst, clkdm->clkdm_offs); -+} -+ - static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) - { - bool hwsup = false; -@@ -132,6 +138,7 @@ struct clkdm_ops omap4_clkdm_operations = { - .clkdm_wakeup = omap4_clkdm_wakeup, - .clkdm_allow_idle = omap4_clkdm_allow_idle, - .clkdm_deny_idle = omap4_clkdm_deny_idle, -+ .clkdm_is_idle = omap4_clkdm_is_idle, - .clkdm_clk_enable = omap4_clkdm_clk_enable, - .clkdm_clk_disable = omap4_clkdm_clk_disable, - }; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0003-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0003-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch deleted file mode 100644 index cbe5ca2..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0003-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 7cdc87071a4bb390ad5d7ddea210bd2b4d662114 Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Tue, 5 Apr 2011 15:22:41 +0530 -Subject: [PATCH 3/6] OMAP2+: PM: Initialise sleep_switch to a non-valid value - -sleep_switch which is initialised to 0 in omap_set_pwrdm_state -happens to be a valid sleep_switch type (FORCEWAKEUP_SWITCH) -which are defined as -#define FORCEWAKEUP_SWITCH 0 -#define LOWPOWERSTATE_SWITCH 1 - -This causes the function to wrongly program some clock domains -even when the Powerdomain is in ON state. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> ---- - arch/arm/mach-omap2/pm.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c -index 49486f5..d48813f 100644 ---- a/arch/arm/mach-omap2/pm.c -+++ b/arch/arm/mach-omap2/pm.c -@@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void) - int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) - { - u32 cur_state; -- int sleep_switch = 0; -+ int sleep_switch = -1; - int ret = 0; - - if (pwrdm == NULL || IS_ERR(pwrdm)) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0004-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0004-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch deleted file mode 100644 index 16eedf9..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0004-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch +++ /dev/null @@ -1,50 +0,0 @@ -From cec133850aa42c03d912c764aaa441677e782eca Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Tue, 5 Apr 2011 15:22:48 +0530 -Subject: [PATCH 4/6] OMAP2+: PM: idle clkdms only if already in idle - -The omap_set_pwrdm_state function forces clockdomains -to idle, without checking the existing idle state -programmed, instead based solely on the HW capability -of the clockdomain to support idle. -This is wrong and the clockdomains should be idled -post a state_switch *only* if idle transitions on the -clockdomain were already enabled. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> ---- - arch/arm/mach-omap2/pm.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c -index d48813f..840b0e1 100644 ---- a/arch/arm/mach-omap2/pm.c -+++ b/arch/arm/mach-omap2/pm.c -@@ -108,6 +108,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) - u32 cur_state; - int sleep_switch = -1; - int ret = 0; -+ int hwsup = 0; - - if (pwrdm == NULL || IS_ERR(pwrdm)) - return -EINVAL; -@@ -127,6 +128,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) - (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { - sleep_switch = LOWPOWERSTATE_SWITCH; - } else { -+ hwsup = clkdm_is_idle(pwrdm->pwrdm_clkdms[0]); - clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); - pwrdm_wait_transition(pwrdm); - sleep_switch = FORCEWAKEUP_SWITCH; -@@ -142,7 +144,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) - - switch (sleep_switch) { - case FORCEWAKEUP_SWITCH: -- if (pwrdm->pwrdm_clkdms[0]->flags & CLKDM_CAN_ENABLE_AUTO) -+ if (hwsup) - clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); - else - clkdm_sleep(pwrdm->pwrdm_clkdms[0]); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0005-OMAP2-hwmod-Follow-the-recomended-PRCM-sequence.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0005-OMAP2-hwmod-Follow-the-recomended-PRCM-sequence.patch deleted file mode 100644 index b0af9e7..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0005-OMAP2-hwmod-Follow-the-recomended-PRCM-sequence.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 8fb6b7c488b31fbff5b81bdeea5dbb236342458b Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Tue, 29 Mar 2011 22:37:43 +0530 -Subject: [PATCH 5/6] OMAP2+: hwmod: Follow the recomended PRCM sequence - -Follow the recomended PRCM sequence. -This still does not take care of Optional clocks. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 9 ++++++++- - 1 files changed, 8 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index e034294..fc0db0c 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -1223,6 +1223,7 @@ static int _reset(struct omap_hwmod *oh) - static int _enable(struct omap_hwmod *oh) - { - int r; -+ int hwsup = 0; - - if (oh->_state != _HWMOD_STATE_INITIALIZED && - oh->_state != _HWMOD_STATE_IDLE && -@@ -1250,10 +1251,16 @@ static int _enable(struct omap_hwmod *oh) - omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); - - _add_initiator_dep(oh, mpu_oh); -+ if (oh->_clk && oh->_clk->clkdm) { -+ hwsup = clkdm_is_idle(oh->_clk->clkdm); -+ clkdm_wakeup(oh->_clk->clkdm); -+ } - _enable_clocks(oh); -- - r = _wait_target_ready(oh); - if (!r) { -+ if (oh->_clk && oh->_clk->clkdm && hwsup) -+ clkdm_allow_idle(oh->_clk->clkdm); -+ - oh->_state = _HWMOD_STATE_ENABLED; - - /* Access the sysconfig only if the target is ready */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0006-OMAP-Serial-Check-wk_st-only-if-present.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0006-OMAP-Serial-Check-wk_st-only-if-present.patch deleted file mode 100644 index a8fc0c0..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0006-OMAP-Serial-Check-wk_st-only-if-present.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 7b74888d198c260992349fab214cad3adf853ef9 Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Tue, 2 Mar 2010 17:25:30 +0530 -Subject: [PATCH 6/6] OMAP: Serial: Check wk_st only if present - -Uart on the resume path tries to read wk_st registers, even -on architectures were its not present/populated. -This patch fixes the issue. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> ---- - arch/arm/mach-omap2/serial.c | 5 +++-- - 1 files changed, 3 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c -index 1ac361b..a0046ce 100644 ---- a/arch/arm/mach-omap2/serial.c -+++ b/arch/arm/mach-omap2/serial.c -@@ -418,8 +418,9 @@ void omap_uart_resume_idle(int num) - } - - /* Check for normal UART wakeup */ -- if (__raw_readl(uart->wk_st) & uart->wk_mask) -- omap_uart_block_sleep(uart); -+ if (uart->wk_st && uart->wk_mask) -+ if (__raw_readl(uart->wk_st) & uart->wk_mask) -+ omap_uart_block_sleep(uart); - return; - } - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0001-OMAP3-voltage-remove-spurious-pr_notice-for-debugfs.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0001-OMAP3-voltage-remove-spurious-pr_notice-for-debugfs.patch deleted file mode 100644 index 0d1cbce..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0001-OMAP3-voltage-remove-spurious-pr_notice-for-debugfs.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 4af697edf9d1d85d2735e86e86e1203c3509dcba Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Sat, 12 Feb 2011 17:27:14 +0530 -Subject: [PATCH 01/12] OMAP3+: voltage: remove spurious pr_notice for debugfs - -cat of debugfs entry for vp_volt provides voltage. The additional pr_notice -is just spam on console and provides no additional information. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/voltage.c | 1 - - 1 files changed, 0 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 0c1552d..9ef3789 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -148,7 +148,6 @@ static int vp_volt_debug_get(void *data, u64 *val) - } - - vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); -- pr_notice("curr_vsel = %x\n", vsel); - - if (!vdd->pmic_info->vsel_to_uv) { - pr_warning("PMIC function to convert vsel to voltage" --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0002-OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0002-OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch deleted file mode 100644 index 7b13792..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0002-OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 37fb1c8eeecd39542716d3d0c7c5e3ca0eb198f8 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Sun, 13 Mar 2011 09:07:23 +0530 -Subject: [PATCH 02/12] OMAP4: PM: remove redundant #ifdef CONFIG_PM - -pm44xx.c is built only when CONFIG_PM is setup, -remove redundant CONFIG_PM check. - -This also fixes: -https://bugzilla.kernel.org/show_bug.cgi?id=25022 - -Reported-by: Martin Etti <ettl.martin@gmx.de> - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/pm44xx.c | 2 -- - 1 files changed, 0 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c -index 76cfff2..59a870b 100644 ---- a/arch/arm/mach-omap2/pm44xx.c -+++ b/arch/arm/mach-omap2/pm44xx.c -@@ -105,13 +105,11 @@ static int __init omap4_pm_init(void) - - pr_err("Power Management for TI OMAP4.\n"); - --#ifdef CONFIG_PM - ret = pwrdm_for_each(pwrdms_setup, NULL); - if (ret) { - pr_err("Failed to setup powerdomains\n"); - goto err2; - } --#endif - - #ifdef CONFIG_SUSPEND - suspend_set_ops(&omap_pm_ops); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0003-OMAP3-smartreflex-fix-sr_late_init-error-path-in-pro.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0003-OMAP3-smartreflex-fix-sr_late_init-error-path-in-pro.patch deleted file mode 100644 index 6c37b62..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0003-OMAP3-smartreflex-fix-sr_late_init-error-path-in-pro.patch +++ /dev/null @@ -1,30 +0,0 @@ -From a22a0dcefe99c8ee260e0c489bc44e6e14bb1ccb Mon Sep 17 00:00:00 2001 -From: Aaro Koskinen <aaro.koskinen@nokia.com> -Date: Thu, 24 Mar 2011 18:35:31 +0200 -Subject: [PATCH 03/12] OMAP3+: smartreflex: fix sr_late_init() error path in probe - -sr_late_init() will take care of freeing the resources. - -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 13e24f9..dbc4b6f 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -883,7 +883,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) - ret = sr_late_init(sr_info); - if (ret) { - pr_warning("%s: Error in SR late init\n", __func__); -- goto err_release_region; -+ return ret; - } - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0004-OMAP3-smartreflex-request-the-memory-region.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0004-OMAP3-smartreflex-request-the-memory-region.patch deleted file mode 100644 index 263094d..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0004-OMAP3-smartreflex-request-the-memory-region.patch +++ /dev/null @@ -1,36 +0,0 @@ -From db9c7da6a78be8584c96c83a3a2d1c8aeb623da8 Mon Sep 17 00:00:00 2001 -From: Aaro Koskinen <aaro.koskinen@nokia.com> -Date: Thu, 24 Mar 2011 18:35:32 +0200 -Subject: [PATCH 04/12] OMAP3+: smartreflex: request the memory region - -We are releasing the memory region, but never actually request it. - -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 8 ++++++++ - 1 files changed, 8 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index dbc4b6f..703143a 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -847,6 +847,14 @@ static int __init omap_sr_probe(struct platform_device *pdev) - goto err_free_devinfo; - } - -+ mem = request_mem_region(mem->start, resource_size(mem), -+ dev_name(&pdev->dev)); -+ if (!mem) { -+ dev_err(&pdev->dev, "%s: no mem region\n", __func__); -+ ret = -EBUSY; -+ goto err_free_devinfo; -+ } -+ - irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - - pm_runtime_enable(&pdev->dev); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0005-OMAP3-smartreflex-fix-ioremap-leak-on-probe-error.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0005-OMAP3-smartreflex-fix-ioremap-leak-on-probe-error.patch deleted file mode 100644 index ea1e567..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0005-OMAP3-smartreflex-fix-ioremap-leak-on-probe-error.patch +++ /dev/null @@ -1,66 +0,0 @@ -From b3ca51ac09da7c260c28df396d4c830814697ff0 Mon Sep 17 00:00:00 2001 -From: Aaro Koskinen <aaro.koskinen@nokia.com> -Date: Thu, 24 Mar 2011 18:35:33 +0200 -Subject: [PATCH 05/12] OMAP3+: smartreflex: fix ioremap leak on probe error - -Add missing iounmap() to error paths. - -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 10 ++++++---- - 1 files changed, 6 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 703143a..156807e 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -904,7 +904,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) - vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); - if (!vdd_dbg_dir) { - ret = -EINVAL; -- goto err_release_region; -+ goto err_iounmap; - } - - sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); -@@ -912,7 +912,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) - dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", - __func__); - ret = PTR_ERR(sr_info->dbg_dir); -- goto err_release_region; -+ goto err_iounmap; - } - - (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, -@@ -929,7 +929,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) - dev_err(&pdev->dev, "%s: Unable to create debugfs directory" - "for n-values\n", __func__); - ret = PTR_ERR(nvalue_dir); -- goto err_release_region; -+ goto err_iounmap; - } - - omap_voltage_get_volttable(sr_info->voltdm, &volt_data); -@@ -939,7 +939,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) - "entries for n-values\n", - __func__, sr_info->voltdm->name); - ret = -ENODATA; -- goto err_release_region; -+ goto err_iounmap; - } - - for (i = 0; i < sr_info->nvalue_count; i++) { -@@ -953,6 +953,8 @@ static int __init omap_sr_probe(struct platform_device *pdev) - - return ret; - -+err_iounmap: -+ iounmap(sr_info->base); - err_release_region: - release_mem_region(mem->start, resource_size(mem)); - err_free_devinfo: --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0006-OMAP3-smartreflex-delete-instance-from-sr_list-on-pr.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0006-OMAP3-smartreflex-delete-instance-from-sr_list-on-pr.patch deleted file mode 100644 index cda6da6..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0006-OMAP3-smartreflex-delete-instance-from-sr_list-on-pr.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 92e63a2f098ce344cfc51ec9a7420e1a5cf85c3e Mon Sep 17 00:00:00 2001 -From: Aaro Koskinen <aaro.koskinen@nokia.com> -Date: Thu, 24 Mar 2011 18:35:34 +0200 -Subject: [PATCH 06/12] OMAP3+: smartreflex: delete instance from sr_list on probe error - -If the probe fails, the node should be deleted from sr_list. - -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 156807e..f0a488a 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -954,6 +954,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) - return ret; - - err_iounmap: -+ list_del(&sr_info->node); - iounmap(sr_info->base); - err_release_region: - release_mem_region(mem->start, resource_size(mem)); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0007-OMAP3-smartreflex-delete-debugfs-entries-on-probe-er.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0007-OMAP3-smartreflex-delete-debugfs-entries-on-probe-er.patch deleted file mode 100644 index d4543a4..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0007-OMAP3-smartreflex-delete-debugfs-entries-on-probe-er.patch +++ /dev/null @@ -1,48 +0,0 @@ -From c194377152df812bcb29fff8f217ffbde59089be Mon Sep 17 00:00:00 2001 -From: Aaro Koskinen <aaro.koskinen@nokia.com> -Date: Thu, 24 Mar 2011 18:35:35 +0200 -Subject: [PATCH 07/12] OMAP3+: smartreflex: delete debugfs entries on probe error - -Delete created debugfs entries if probe fails. - -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 6 ++++-- - 1 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index f0a488a..fb7dc52 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -929,7 +929,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) - dev_err(&pdev->dev, "%s: Unable to create debugfs directory" - "for n-values\n", __func__); - ret = PTR_ERR(nvalue_dir); -- goto err_iounmap; -+ goto err_debugfs; - } - - omap_voltage_get_volttable(sr_info->voltdm, &volt_data); -@@ -939,7 +939,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) - "entries for n-values\n", - __func__, sr_info->voltdm->name); - ret = -ENODATA; -- goto err_iounmap; -+ goto err_debugfs; - } - - for (i = 0; i < sr_info->nvalue_count; i++) { -@@ -953,6 +953,8 @@ static int __init omap_sr_probe(struct platform_device *pdev) - - return ret; - -+err_debugfs: -+ debugfs_remove_recursive(sr_info->dbg_dir); - err_iounmap: - list_del(&sr_info->node); - iounmap(sr_info->base); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0008-OMAP3-cpuidle-remove-useless-SDP-specific-timings.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0008-OMAP3-cpuidle-remove-useless-SDP-specific-timings.patch deleted file mode 100644 index e3ee041..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0008-OMAP3-cpuidle-remove-useless-SDP-specific-timings.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 2b9e07516cc3853340b5e06e9ae7244ca5681466 Mon Sep 17 00:00:00 2001 -From: Jean Pihet <j-pihet@ti.com> -Date: Fri, 29 Apr 2011 11:26:22 +0200 -Subject: [PATCH 08/12] OMAP3 cpuidle: remove useless SDP specific timings - -The cpuidle states settings can be overriden by some board- -specific settings, by calling omap3_pm_init_cpuidle. -Remove the 3430SDP specific states settings registration -since the figures are identical to the default ones (in cpuidle34xx.c). - -Signed-off-by: Jean Pihet <j-pihet@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-3430sdp.c | 19 ------------------- - 1 files changed, 0 insertions(+), 19 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c -index 9afd087..7ffad7b 100644 ---- a/arch/arm/mach-omap2/board-3430sdp.c -+++ b/arch/arm/mach-omap2/board-3430sdp.c -@@ -59,24 +59,6 @@ - - #define TWL4030_MSECURE_GPIO 22 - --/* FIXME: These values need to be updated based on more profiling on 3430sdp*/ --static struct cpuidle_params omap3_cpuidle_params_table[] = { -- /* C1 */ -- {1, 2, 2, 5}, -- /* C2 */ -- {1, 10, 10, 30}, -- /* C3 */ -- {1, 50, 50, 300}, -- /* C4 */ -- {1, 1500, 1800, 4000}, -- /* C5 */ -- {1, 2500, 7500, 12000}, -- /* C6 */ -- {1, 3000, 8500, 15000}, -- /* C7 */ -- {1, 10000, 30000, 300000}, --}; -- - static uint32_t board_keymap[] = { - KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_RIGHT), -@@ -883,7 +865,6 @@ static void __init omap_3430sdp_init(void) - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap_board_config = sdp3430_config; - omap_board_config_size = ARRAY_SIZE(sdp3430_config); -- omap3_pm_init_cpuidle(omap3_cpuidle_params_table); - omap3430_i2c_init(); - omap_display_init(&sdp3430_dss_data); - if (omap_rev() > OMAP3430_REV_ES1_0) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0009-OMAP3-SR-make-notify-independent-of-class.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0009-OMAP3-SR-make-notify-independent-of-class.patch deleted file mode 100644 index c44371d..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0009-OMAP3-SR-make-notify-independent-of-class.patch +++ /dev/null @@ -1,48 +0,0 @@ -From a0f28097b944930e479998780863b9e5a39e30b3 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Mon, 14 Feb 2011 12:16:36 +0530 -Subject: [PATCH 09/12] OMAP3+: SR: make notify independent of class - -Interrupt notification mechanism of SmartReflex can be used by the -choice of implementation of the class driver. For example, Class 2 and -Class 1.5 of SmartReflex can both use the interrupt notification to -identify the transition of voltage or other events. - -Hence, the actual class does not matter for notifier. Let the class -driver's handling decide how it should be used. SmartReflex driver -should provide just the primitives. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 6 ++---- - 1 files changed, 2 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index fb7dc52..3ee7261 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data) - sr_write_reg(sr_info, IRQSTATUS, status); - } - -- if (sr_class->class_type == SR_CLASS2 && sr_class->notify) -+ if (sr_class->notify) - sr_class->notify(sr_info->voltdm, status); - - return IRQ_HANDLED; -@@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info) - struct resource *mem; - int ret = 0; - -- if (sr_class->class_type == SR_CLASS2 && -- sr_class->notify_flags && sr_info->irq) { -- -+ if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { - name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); - if (name == NULL) { - ret = -ENOMEM; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0010-OMAP3-SR-disable-interrupt-by-default.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0010-OMAP3-SR-disable-interrupt-by-default.patch deleted file mode 100644 index e25c3e8..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0010-OMAP3-SR-disable-interrupt-by-default.patch +++ /dev/null @@ -1,37 +0,0 @@ -From ca5dc57538a566681731102e09a9d1865a4a7020 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Mon, 14 Feb 2011 12:41:10 +0530 -Subject: [PATCH 10/12] OMAP3+: SR: disable interrupt by default - -We will enable and disable interrupt on a need basis in the class -driver. We need to keep the IRQ disabled by default else the -forceupdate or vcbypass events could trigger events that we don't -need/expect to handle. - -This is a preparation for SmartReflex AVS class drivers such as -class 2 and class 1.5 which would need to use interrupts. Existing -SmartReflex AVS class 3 driver does not require to use interrupts -and is not impacted by this change. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 3ee7261..616ef62 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -268,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info) - 0, name, (void *)sr_info); - if (ret) - goto error; -+ disable_irq(sr_info->irq); - } - - if (pdata && pdata->enable_on_init) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch deleted file mode 100644 index b96682e..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 4aa67e94d6b13905abcf3e95cb66ea7be9c2e8dd Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Mon, 14 Feb 2011 21:14:17 +0530 -Subject: [PATCH 11/12] OMAP3+: SR: enable/disable SR only on need - -Since we already know the state of the autocomp enablement, we can -see if the requested state is different from the current state and -enable/disable SR only on the need basis. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 11 +++++++---- - 1 files changed, 7 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 616ef62..3bd9fac 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -807,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, u64 val) - return -EINVAL; - } - -- if (!val) -- sr_stop_vddautocomp(sr_info); -- else -- sr_start_vddautocomp(sr_info); -+ /* control enable/disable only if there is a delta in value */ -+ if (sr_info->autocomp_active != val) { -+ if (!val) -+ sr_stop_vddautocomp(sr_info); -+ else -+ sr_start_vddautocomp(sr_info); -+ } - - return 0; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0012-OMAP3-SR-fix-cosmetic-indentation.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0012-OMAP3-SR-fix-cosmetic-indentation.patch deleted file mode 100644 index eda76a0..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0012-OMAP3-SR-fix-cosmetic-indentation.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 0c2089eecdfc3a85a376eddf9c77857f3d575be6 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Mon, 14 Feb 2011 12:33:13 +0530 -Subject: [PATCH 12/12] OMAP3+: SR: fix cosmetic indentation - -Error label case seems to have a 2 tab indentation when just 1 is -necessary. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/smartreflex.c | 20 ++++++++++---------- - 1 files changed, 10 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 3bd9fac..2ce2fb7 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -277,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info) - return ret; - - error: -- iounmap(sr_info->base); -- mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); -- release_mem_region(mem->start, resource_size(mem)); -- list_del(&sr_info->node); -- dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" -- "interrupt handler. Smartreflex will" -- "not function as desired\n", __func__); -- kfree(name); -- kfree(sr_info); -- return ret; -+ iounmap(sr_info->base); -+ mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); -+ release_mem_region(mem->start, resource_size(mem)); -+ list_del(&sr_info->node); -+ dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" -+ "interrupt handler. Smartreflex will" -+ "not function as desired\n", __func__); -+ kfree(name); -+ kfree(sr_info); -+ return ret; - } - - static void sr_v1_disable(struct omap_sr *sr) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0001-OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0001-OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch deleted file mode 100644 index a66407b..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0001-OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 6aae34d56ba8fef140b60631536272f6b39c1f61 Mon Sep 17 00:00:00 2001 -From: Tomi Valkeinen <tomi.valkeinen@ti.com> -Date: Thu, 7 Apr 2011 15:28:47 +0300 -Subject: [PATCH 01/32] OMAP: DSS2: DSI: fix use_sys_clk & highfreq - -use_sys_clk and highfreq fields in dsi.current_cinfo were never set. -Luckily they weren't used anywhere so it didn't cause any problems. - -This patch fixes those fields and they are now set at the same time as -the rest of the fields. - -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> ---- - drivers/video/omap2/dss/dsi.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c -index 0a7f1a4..8604153 100644 ---- a/drivers/video/omap2/dss/dsi.c -+++ b/drivers/video/omap2/dss/dsi.c -@@ -1276,6 +1276,9 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo) - - DSSDBGF(); - -+ dsi.current_cinfo.use_sys_clk = cinfo->use_sys_clk; -+ dsi.current_cinfo.highfreq = cinfo->highfreq; -+ - dsi.current_cinfo.fint = cinfo->fint; - dsi.current_cinfo.clkin4ddr = cinfo->clkin4ddr; - dsi.current_cinfo.dsi_pll_hsdiv_dispc_clk = --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0002-OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0002-OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch deleted file mode 100644 index 9d5ab61..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0002-OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 5275654d2e873ca5bdbbd8be61dbb2d63c0e04cb Mon Sep 17 00:00:00 2001 -From: Tomi Valkeinen <tomi.valkeinen@ti.com> -Date: Mon, 4 Apr 2011 10:02:53 +0300 -Subject: [PATCH 02/32] OMAP: DSS2: DSI: fix dsi_dump_clocks() - -On OMAP4, reading DSI_PLL_CONFIGURATION2 register requires the L3 clock -(CIO_CLK_ICG) to PLL. Currently dsi_dump_clocks() tries to read that -register without enabling the L3 clock, leading to crash if DSI is not -in use. - -The status of the bit being read from DSI_PLL_CONFIGURATION2 is -available from dsi_clock_info->use_sys_clk, so we can avoid the whole -problem by just using that. - -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> ---- - drivers/video/omap2/dss/dsi.c | 6 +----- - 1 files changed, 1 insertions(+), 5 deletions(-) - -diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c -index 8604153..1464ac4 100644 ---- a/drivers/video/omap2/dss/dsi.c -+++ b/drivers/video/omap2/dss/dsi.c -@@ -1491,7 +1491,6 @@ void dsi_pll_uninit(void) - - void dsi_dump_clocks(struct seq_file *s) - { -- int clksel; - struct dsi_clock_info *cinfo = &dsi.current_cinfo; - enum dss_clk_source dispc_clk_src, dsi_clk_src; - -@@ -1500,13 +1499,10 @@ void dsi_dump_clocks(struct seq_file *s) - - enable_clocks(1); - -- clksel = REG_GET(DSI_PLL_CONFIGURATION2, 11, 11); -- - seq_printf(s, "- DSI PLL -\n"); - - seq_printf(s, "dsi pll source = %s\n", -- clksel == 0 ? -- "dss_sys_clk" : "pclkfree"); -+ cinfo->use_sys_clk ? "dss_sys_clk" : "pclkfree"); - - seq_printf(s, "Fint\t\t%-16luregn %u\n", cinfo->fint, cinfo->regn); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0003-OMAP2PLUS-DSS2-Fix-Return-correct-lcd-clock-source-f.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0003-OMAP2PLUS-DSS2-Fix-Return-correct-lcd-clock-source-f.patch deleted file mode 100644 index 14239fa..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0003-OMAP2PLUS-DSS2-Fix-Return-correct-lcd-clock-source-f.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 9ddb3aafff5f7f6b7eaad32f9b1eea249c0dce8b Mon Sep 17 00:00:00 2001 -From: Archit Taneja <archit@ti.com> -Date: Thu, 31 Mar 2011 13:23:35 +0530 -Subject: [PATCH 03/32] OMAP2PLUS: DSS2: Fix: Return correct lcd clock source for OMAP2/3 - -dss.lcd_clk_source is set to the default value DSS_CLK_SRC_FCK at dss_init. -For OMAP2 and OMAP3, the dss.lcd_clk_source should always be the same as -dss.dispc_clk_source. The function dss_get_lcd_clk_source() always returns the -default value DSS_CLK_SRC_FCK for OMAP2/3. This leads to wrong clock dumps when -dispc_clk_source is not DSS_CLK_SRC_FCK. - -Correct this function to always return dss.dispc_clk_source for OMAP2/3. - -Signed-off-by: Archit Taneja <archit@ti.com> -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> ---- - drivers/video/omap2/dss/dss.c | 10 ++++++++-- - 1 files changed, 8 insertions(+), 2 deletions(-) - -diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c -index 3f1fee6..c3b48a0 100644 ---- a/drivers/video/omap2/dss/dss.c -+++ b/drivers/video/omap2/dss/dss.c -@@ -385,8 +385,14 @@ enum dss_clk_source dss_get_dsi_clk_source(void) - - enum dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel) - { -- int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; -- return dss.lcd_clk_source[ix]; -+ if (dss_has_feature(FEAT_LCD_CLK_SRC)) { -+ int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; -+ return dss.lcd_clk_source[ix]; -+ } else { -+ /* LCD_CLK source is the same as DISPC_FCLK source for -+ * OMAP2 and OMAP3 */ -+ return dss.dispc_clk_source; -+ } - } - - /* calculate clock rates using dividers in cinfo */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0004-OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0004-OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch deleted file mode 100644 index 8c2d6e6..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0004-OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 4a56fbcabd128dbd07895e5167fd131299a1391c Mon Sep 17 00:00:00 2001 -From: Tomi Valkeinen <tomi.valkeinen@ti.com> -Date: Fri, 15 Apr 2011 10:42:59 +0300 -Subject: [PATCH 04/32] OMAP: DSS: DSI: Fix DSI PLL power bug - -OMAP3630 has a HW bug causing DSI PLL power command POWER_ON_DIV (0x3) -to not work properly. The bug prevents us from enabling DSI PLL power -only to HS divider block. - -This patch adds a dss feature for the bug and converts POWER_ON_DIV -requests to POWER_ON_ALL (0x2). - -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> ---- - drivers/video/omap2/dss/dsi.c | 5 +++++ - drivers/video/omap2/dss/dss_features.c | 2 +- - drivers/video/omap2/dss/dss_features.h | 2 ++ - 3 files changed, 8 insertions(+), 1 deletions(-) - -diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c -index 1464ac4..cbd9ca4 100644 ---- a/drivers/video/omap2/dss/dsi.c -+++ b/drivers/video/omap2/dss/dsi.c -@@ -1059,6 +1059,11 @@ static int dsi_pll_power(enum dsi_pll_power_state state) - { - int t = 0; - -+ /* DSI-PLL power command 0x3 is not working */ -+ if (dss_has_feature(FEAT_DSI_PLL_PWR_BUG) && -+ state == DSI_PLL_POWER_ON_DIV) -+ state = DSI_PLL_POWER_ON_ALL; -+ - REG_FLD_MOD(DSI_CLK_CTRL, state, 31, 30); /* PLL_PWR_CMD */ - - /* PLL_PWR_STATUS */ -diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c -index aa16222..8c50e18 100644 ---- a/drivers/video/omap2/dss/dss_features.c -+++ b/drivers/video/omap2/dss/dss_features.c -@@ -271,7 +271,7 @@ static struct omap_dss_features omap3630_dss_features = { - FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE | - FEAT_PRE_MULT_ALPHA | FEAT_FUNCGATED | - FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT | -- FEAT_RESIZECONF, -+ FEAT_RESIZECONF | FEAT_DSI_PLL_PWR_BUG, - - .num_mgrs = 2, - .num_ovls = 3, -diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h -index 12e9c4e..37922ce 100644 ---- a/drivers/video/omap2/dss/dss_features.h -+++ b/drivers/video/omap2/dss/dss_features.h -@@ -40,6 +40,8 @@ enum dss_feat_id { - /* Independent core clk divider */ - FEAT_CORE_CLK_DIV = 1 << 11, - FEAT_LCD_CLK_SRC = 1 << 12, -+ /* DSI-PLL power command 0x3 is not working */ -+ FEAT_DSI_PLL_PWR_BUG = 1 << 13, - }; - - /* DSS register field id */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0005-OMAP-DSS2-fix-panel-Kconfig-dependencies.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0005-OMAP-DSS2-fix-panel-Kconfig-dependencies.patch deleted file mode 100644 index a827924..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0005-OMAP-DSS2-fix-panel-Kconfig-dependencies.patch +++ /dev/null @@ -1,61 +0,0 @@ -From fcb26a06fe1badfaaf7aaa68140c8b3370dd503e Mon Sep 17 00:00:00 2001 -From: Tomi Valkeinen <tomi.valkeinen@ti.com> -Date: Fri, 8 Apr 2011 09:30:27 +0300 -Subject: [PATCH 05/32] OMAP: DSS2: fix panel Kconfig dependencies - -All DPI panels were missing dependency to OMAP2_DSS_DPI. Add the -dependency. - -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> ---- - drivers/video/omap2/displays/Kconfig | 9 +++++---- - 1 files changed, 5 insertions(+), 4 deletions(-) - -diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig -index d18ad6b..609a280 100644 ---- a/drivers/video/omap2/displays/Kconfig -+++ b/drivers/video/omap2/displays/Kconfig -@@ -3,6 +3,7 @@ menu "OMAP2/3 Display Device Drivers" - - config PANEL_GENERIC_DPI - tristate "Generic DPI Panel" -+ depends on OMAP2_DSS_DPI - help - Generic DPI panel driver. - Supports DVI output for Beagle and OMAP3 SDP. -@@ -11,20 +12,20 @@ config PANEL_GENERIC_DPI - - config PANEL_LGPHILIPS_LB035Q02 - tristate "LG.Philips LB035Q02 LCD Panel" -- depends on OMAP2_DSS && SPI -+ depends on OMAP2_DSS_DPI && SPI - help - LCD Panel used on the Gumstix Overo Palo35 - - config PANEL_SHARP_LS037V7DW01 - tristate "Sharp LS037V7DW01 LCD Panel" -- depends on OMAP2_DSS -+ depends on OMAP2_DSS_DPI - select BACKLIGHT_CLASS_DEVICE - help - LCD Panel used in TI's SDP3430 and EVM boards - - config PANEL_NEC_NL8048HL11_01B - tristate "NEC NL8048HL11-01B Panel" -- depends on OMAP2_DSS -+ depends on OMAP2_DSS_DPI - help - This NEC NL8048HL11-01B panel is TFT LCD - used in the Zoom2/3/3630 sdp boards. -@@ -37,7 +38,7 @@ config PANEL_TAAL - - config PANEL_TPO_TD043MTEA1 - tristate "TPO TD043MTEA1 LCD Panel" -- depends on OMAP2_DSS && SPI -+ depends on OMAP2_DSS_DPI && SPI - help - LCD Panel used in OMAP3 Pandora - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0006-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0006-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch deleted file mode 100644 index d899cb0..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0006-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 4bd1d52fff974f5a5d0582f4fa4eae6e03e36fc1 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Tue, 19 Jan 2010 21:19:15 -0800 -Subject: [PATCH 06/32] OMAP: DSS2: add bootarg for selecting svideo or composite for tv output - -also add pal-16 and ntsc-16 omapfb.mode settings for 16bpp ---- - drivers/video/omap2/dss/venc.c | 22 ++++++++++++++++++++++ - drivers/video/omap2/omapfb/omapfb-main.c | 10 +++++++++- - 2 files changed, 31 insertions(+), 1 deletions(-) - -diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c -index 8e35a5b..827723f 100644 ---- a/drivers/video/omap2/dss/venc.c -+++ b/drivers/video/omap2/dss/venc.c -@@ -85,6 +85,11 @@ - #define VENC_OUTPUT_TEST 0xC8 - #define VENC_DAC_B__DAC_C 0xC8 - -+static char *tv_connection; -+ -+module_param_named(tvcable, tv_connection, charp, 0); -+MODULE_PARM_DESC(tvcable, "TV connection type (svideo, composite)"); -+ - struct venc_config { - u32 f_control; - u32 vidout_ctrl; -@@ -458,6 +463,23 @@ static int venc_panel_probe(struct omap_dss_device *dssdev) - { - dssdev->panel.timings = omap_dss_pal_timings; - -+ /* Allow the TV output to be overriden */ -+ if (tv_connection) { -+ if (strcmp(tv_connection, "svideo") == 0) { -+ printk(KERN_INFO -+ "omapdss: tv output is svideo.\n"); -+ dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO; -+ } else if (strcmp(tv_connection, "composite") == 0) { -+ printk(KERN_INFO -+ "omapdss: tv output is composite.\n"); -+ dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE; -+ } else { -+ printk(KERN_INFO -+ "omapdss: unsupported output type'%s'.\n", -+ tv_connection); -+ } -+ } -+ - return 0; - } - -diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c -index 505ec66..eaeded5 100644 ---- a/drivers/video/omap2/omapfb/omapfb-main.c -+++ b/drivers/video/omap2/omapfb/omapfb-main.c -@@ -2036,7 +2036,15 @@ static int omapfb_mode_to_timings(const char *mode_str, - int r; - - #ifdef CONFIG_OMAP2_DSS_VENC -- if (strcmp(mode_str, "pal") == 0) { -+ if (strcmp(mode_str, "pal-16") == 0) { -+ *timings = omap_dss_pal_timings; -+ *bpp = 16; -+ return 0; -+ } else if (strcmp(mode_str, "ntsc-16") == 0) { -+ *timings = omap_dss_ntsc_timings; -+ *bpp = 16; -+ return 0; -+ } else if (strcmp(mode_str, "pal") == 0) { - *timings = omap_dss_pal_timings; - *bpp = 24; - return 0; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0007-video-add-timings-for-hd720.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0007-video-add-timings-for-hd720.patch deleted file mode 100644 index b653e6c..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0007-video-add-timings-for-hd720.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 6d87a3f85ac36205111b4fe71ad06976239cdbe7 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Sat, 19 Dec 2009 06:52:43 -0800 -Subject: [PATCH 07/32] video: add timings for hd720 - ---- - drivers/video/modedb.c | 4 ++++ - 1 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c -index 48c3ea8..b320a30 100644 ---- a/drivers/video/modedb.c -+++ b/drivers/video/modedb.c -@@ -103,6 +103,10 @@ static const struct fb_videomode modedb[] = { - { NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, 0, - FB_VMODE_NONINTERLACED }, - -+ /* 1280x720 @ 60 Hz, 45 kHz hsync, CEA 681-E Format 4 */ -+ { "hd720", 60, 1280, 720, 13468, 220, 110, 20, 5, 40, 5, 0, -+ FB_VMODE_NONINTERLACED }, -+ - /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ - { NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, 0, - FB_VMODE_INTERLACED }, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0008-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0008-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch deleted file mode 100644 index 1e0e057..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0008-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 1e3fcfd74686fa8b02f93bb592cca458942058e4 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <sakoman@gmail.com> -Date: Tue, 15 Dec 2009 15:17:44 -0800 -Subject: [PATCH 08/32] drivers: net: smsc911x: return ENODEV if device is not found - -Signed-off-by: Steve Sakoman <sakoman@gmail.com> ---- - drivers/net/smsc911x.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c -index 4b42ecc..5c1202b 100644 ---- a/drivers/net/smsc911x.c -+++ b/drivers/net/smsc911x.c -@@ -2028,8 +2028,10 @@ static int __devinit smsc911x_drv_probe(struct platform_device *pdev) - } - - retval = smsc911x_init(dev); -- if (retval < 0) -+ if (retval < 0) { -+ retval = -ENODEV; - goto out_unmap_io_3; -+ } - - /* configure irq polarity and type before connecting isr */ - if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0009-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0009-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch deleted file mode 100644 index f753684..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0009-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 078005a9c8b5913ed5eb7a7a9508e4b0a5b18c30 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <sakoman@gmail.com> -Date: Tue, 15 Dec 2009 15:24:10 -0800 -Subject: [PATCH 09/32] drivers: input: touchscreen: ads7846: return ENODEV if device is not found - -Signed-off-by: Steve Sakoman <sakoman@gmail.com> ---- - drivers/input/touchscreen/ads7846.c | 13 ++++++++++--- - 1 files changed, 10 insertions(+), 3 deletions(-) - -diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c -index 1de1c19..097db10 100644 ---- a/drivers/input/touchscreen/ads7846.c -+++ b/drivers/input/touchscreen/ads7846.c -@@ -1338,11 +1338,18 @@ static int __devinit ads7846_probe(struct spi_device *spi) - * the touchscreen, in case it's not connected. - */ - if (ts->model == 7845) -- ads7845_read12_ser(&spi->dev, PWRDOWN); -+ err = ads7845_read12_ser(&spi->dev, PWRDOWN); - else -- (void) ads7846_read12_ser(&spi->dev, -+ err = ads7846_read12_ser(&spi->dev, - READ_12BIT_SER(vaux) | ADS_PD10_ALL_ON); - -+ /* if sample is all 0's or all 1's then there is no device on spi */ -+ if ( (err == 0x000) || (err == 0xfff)) { -+ dev_info(&spi->dev, "no device detected, test read result was 0x%08X\n", err); -+ err = -ENODEV; -+ goto err_free_irq; -+ } -+ - err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group); - if (err) - goto err_remove_hwmon; -@@ -1366,7 +1373,7 @@ static int __devinit ads7846_probe(struct spi_device *spi) - err_put_regulator: - regulator_put(ts->reg); - err_free_gpio: -- if (!ts->get_pendown_state) -+ if (!ts->get_pendown_state && ts->gpio_pendown != -1) - gpio_free(ts->gpio_pendown); - err_cleanup_filter: - if (ts->filter_cleanup) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0010-Revert-omap2_mcspi-Flush-posted-writes.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0010-Revert-omap2_mcspi-Flush-posted-writes.patch deleted file mode 100644 index 6c76843..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0010-Revert-omap2_mcspi-Flush-posted-writes.patch +++ /dev/null @@ -1,25 +0,0 @@ -From ae16b19238b8d0609612d0e1f1a419d293f17c80 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 3 Mar 2011 13:29:30 -0800 -Subject: [PATCH 10/32] Revert "omap2_mcspi: Flush posted writes" - -This reverts commit a330ce2001b290c59fe98c37e981683ef0a75fdf. ---- - drivers/spi/omap2_mcspi.c | 1 - - 1 files changed, 0 insertions(+), 1 deletions(-) - -diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c -index 6f86ba0..6094be7 100644 ---- a/drivers/spi/omap2_mcspi.c -+++ b/drivers/spi/omap2_mcspi.c -@@ -195,7 +195,6 @@ static inline void mcspi_write_chconf0(const struct spi_device *spi, u32 val) - - cs->chconf0 = val; - mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, val); -- mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0); - } - - static void omap2_mcspi_set_dma_req(const struct spi_device *spi, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch deleted file mode 100644 index 78381e9..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch +++ /dev/null @@ -1,482 +0,0 @@ -From 3a66cefdf60033381c623b0425345c41e8c078fe Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Fri, 19 Nov 2010 15:11:19 -0800 -Subject: [PATCH 11/32] Revert "omap_hsmmc: improve interrupt synchronisation" - -This reverts commit b417577d3b9bbb06a4ddc9aa955af9bd503f7242. - -Conflicts: - - drivers/mmc/host/omap_hsmmc.c ---- - drivers/mmc/host/omap_hsmmc.c | 267 ++++++++++++++++++++--------------------- - 1 files changed, 128 insertions(+), 139 deletions(-) - -diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c -index 259ece0..15a023b 100644 ---- a/drivers/mmc/host/omap_hsmmc.c -+++ b/drivers/mmc/host/omap_hsmmc.c -@@ -159,10 +159,12 @@ struct omap_hsmmc_host { - */ - struct regulator *vcc; - struct regulator *vcc_aux; -+ struct semaphore sem; - struct work_struct mmc_carddetect_work; - void __iomem *base; - resource_size_t mapbase; - spinlock_t irq_lock; /* Prevent races with irq handler */ -+ unsigned long flags; - unsigned int id; - unsigned int dma_len; - unsigned int dma_sg_idx; -@@ -183,7 +185,6 @@ struct omap_hsmmc_host { - int protect_card; - int reqs_blocked; - int use_reg; -- int req_in_progress; - - struct omap_mmc_platform_data *pdata; - }; -@@ -556,32 +557,6 @@ static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) - dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); - } - --static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, -- struct mmc_command *cmd) --{ -- unsigned int irq_mask; -- -- if (host->use_dma) -- irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); -- else -- irq_mask = INT_EN_MASK; -- -- /* Disable timeout for erases */ -- if (cmd->opcode == MMC_ERASE) -- irq_mask &= ~DTO_ENABLE; -- -- OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); -- OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); -- OMAP_HSMMC_WRITE(host->base, IE, irq_mask); --} -- --static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) --{ -- OMAP_HSMMC_WRITE(host->base, ISE, 0); -- OMAP_HSMMC_WRITE(host->base, IE, 0); -- OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); --} -- - #ifdef CONFIG_PM - - /* -@@ -650,7 +625,9 @@ static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) - && time_before(jiffies, timeout)) - ; - -- omap_hsmmc_disable_irq(host); -+ OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); -+ OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); - - /* Do not initialize card-specific things if the power is off */ - if (host->power_mode == MMC_POWER_OFF) -@@ -753,8 +730,6 @@ static void send_init_stream(struct omap_hsmmc_host *host) - return; - - disable_irq(host->irq); -- -- OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); - OMAP_HSMMC_WRITE(host->base, CON, - OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); - OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); -@@ -820,7 +795,17 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, - mmc_hostname(host->mmc), cmd->opcode, cmd->arg); - host->cmd = cmd; - -- omap_hsmmc_enable_irq(host, cmd); -+ /* -+ * Clear status bits and enable interrupts -+ */ -+ OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); -+ -+ if (host->use_dma) -+ OMAP_HSMMC_WRITE(host->base, IE, -+ INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE)); -+ else -+ OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); - - host->response_busy = 0; - if (cmd->flags & MMC_RSP_PRESENT) { -@@ -854,7 +839,13 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, - if (host->use_dma) - cmdreg |= DMA_EN; - -- host->req_in_progress = 1; -+ /* -+ * In an interrupt context (i.e. STOP command), the spinlock is unlocked -+ * by the interrupt handler, otherwise (i.e. for a new request) it is -+ * unlocked here. -+ */ -+ if (!in_interrupt()) -+ spin_unlock_irqrestore(&host->irq_lock, host->flags); - - OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); - OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); -@@ -869,23 +860,6 @@ omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) - return DMA_FROM_DEVICE; - } - --static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) --{ -- int dma_ch; -- -- spin_lock(&host->irq_lock); -- host->req_in_progress = 0; -- dma_ch = host->dma_ch; -- spin_unlock(&host->irq_lock); -- -- omap_hsmmc_disable_irq(host); -- /* Do not complete the request if DMA is still in progress */ -- if (mrq->data && host->use_dma && dma_ch != -1) -- return; -- host->mrq = NULL; -- mmc_request_done(host->mmc, mrq); --} -- - /* - * Notify the transfer complete to MMC core - */ -@@ -902,19 +876,25 @@ omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) - return; - } - -- omap_hsmmc_request_done(host, mrq); -+ host->mrq = NULL; -+ mmc_request_done(host->mmc, mrq); - return; - } - - host->data = NULL; - -+ if (host->use_dma && host->dma_ch != -1) -+ dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, -+ omap_hsmmc_get_dma_dir(host, data)); -+ - if (!data->error) - data->bytes_xfered += data->blocks * (data->blksz); - else - data->bytes_xfered = 0; - - if (!data->stop) { -- omap_hsmmc_request_done(host, data->mrq); -+ host->mrq = NULL; -+ mmc_request_done(host->mmc, data->mrq); - return; - } - omap_hsmmc_start_command(host, data->stop, NULL); -@@ -940,8 +920,10 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) - cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); - } - } -- if ((host->data == NULL && !host->response_busy) || cmd->error) -- omap_hsmmc_request_done(host, cmd->mrq); -+ if ((host->data == NULL && !host->response_busy) || cmd->error) { -+ host->mrq = NULL; -+ mmc_request_done(host->mmc, cmd->mrq); -+ } - } - - /* -@@ -949,19 +931,14 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) - */ - static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) - { -- int dma_ch; -- - host->data->error = errno; - -- spin_lock(&host->irq_lock); -- dma_ch = host->dma_ch; -- host->dma_ch = -1; -- spin_unlock(&host->irq_lock); -- -- if (host->use_dma && dma_ch != -1) { -+ if (host->use_dma && host->dma_ch != -1) { - dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, - omap_hsmmc_get_dma_dir(host, host->data)); -- omap_free_dma(dma_ch); -+ omap_free_dma(host->dma_ch); -+ host->dma_ch = -1; -+ up(&host->sem); - } - host->data = NULL; - } -@@ -1034,21 +1011,28 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, - __func__); - } - --static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) -+/* -+ * MMC controller IRQ handler -+ */ -+static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) - { -+ struct omap_hsmmc_host *host = dev_id; - struct mmc_data *data; -- int end_cmd = 0, end_trans = 0; -- -- if (!host->req_in_progress) { -- do { -- OMAP_HSMMC_WRITE(host->base, STAT, status); -- /* Flush posted write */ -- status = OMAP_HSMMC_READ(host->base, STAT); -- } while (status & INT_EN_MASK); -- return; -+ int end_cmd = 0, end_trans = 0, status; -+ -+ spin_lock(&host->irq_lock); -+ -+ if (host->mrq == NULL) { -+ OMAP_HSMMC_WRITE(host->base, STAT, -+ OMAP_HSMMC_READ(host->base, STAT)); -+ /* Flush posted write */ -+ OMAP_HSMMC_READ(host->base, STAT); -+ spin_unlock(&host->irq_lock); -+ return IRQ_HANDLED; - } - - data = host->data; -+ status = OMAP_HSMMC_READ(host->base, STAT); - dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); - - if (status & ERR) { -@@ -1101,27 +1085,15 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) - } - - OMAP_HSMMC_WRITE(host->base, STAT, status); -+ /* Flush posted write */ -+ OMAP_HSMMC_READ(host->base, STAT); - - if (end_cmd || ((status & CC) && host->cmd)) - omap_hsmmc_cmd_done(host, host->cmd); - if ((end_trans || (status & TC)) && host->mrq) - omap_hsmmc_xfer_done(host, data); --} -- --/* -- * MMC controller IRQ handler -- */ --static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) --{ -- struct omap_hsmmc_host *host = dev_id; -- int status; - -- status = OMAP_HSMMC_READ(host->base, STAT); -- do { -- omap_hsmmc_do_irq(host, status); -- /* Flush posted write */ -- status = OMAP_HSMMC_READ(host->base, STAT); -- } while (status & INT_EN_MASK); -+ spin_unlock(&host->irq_lock); - - return IRQ_HANDLED; - } -@@ -1316,11 +1288,9 @@ static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, - /* - * DMA call back function - */ --static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) -+static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *data) - { -- struct omap_hsmmc_host *host = cb_data; -- struct mmc_data *data = host->mrq->data; -- int dma_ch, req_in_progress; -+ struct omap_hsmmc_host *host = data; - - if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { - dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", -@@ -1328,38 +1298,24 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) - return; - } - -- spin_lock(&host->irq_lock); -- if (host->dma_ch < 0) { -- spin_unlock(&host->irq_lock); -+ if (host->dma_ch < 0) - return; -- } - - host->dma_sg_idx++; - if (host->dma_sg_idx < host->dma_len) { - /* Fire up the next transfer. */ -- omap_hsmmc_config_dma_params(host, data, -- data->sg + host->dma_sg_idx); -- spin_unlock(&host->irq_lock); -+ omap_hsmmc_config_dma_params(host, host->data, -+ host->data->sg + host->dma_sg_idx); - return; - } - -- dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, -- omap_hsmmc_get_dma_dir(host, data)); -- -- req_in_progress = host->req_in_progress; -- dma_ch = host->dma_ch; -+ omap_free_dma(host->dma_ch); - host->dma_ch = -1; -- spin_unlock(&host->irq_lock); -- -- omap_free_dma(dma_ch); -- -- /* If DMA has finished after TC, complete the request */ -- if (!req_in_progress) { -- struct mmc_request *mrq = host->mrq; -- -- host->mrq = NULL; -- mmc_request_done(host->mmc, mrq); -- } -+ /* -+ * DMA Callback: run in interrupt context. -+ * mutex_unlock will throw a kernel warning if used. -+ */ -+ up(&host->sem); - } - - /* -@@ -1368,7 +1324,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) - static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, - struct mmc_request *req) - { -- int dma_ch = 0, ret = 0, i; -+ int dma_ch = 0, ret = 0, err = 1, i; - struct mmc_data *data = req->data; - - /* Sanity check: all the SG entries must be aligned by block size. */ -@@ -1385,7 +1341,23 @@ static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, - */ - return -EINVAL; - -- BUG_ON(host->dma_ch != -1); -+ /* -+ * If for some reason the DMA transfer is still active, -+ * we wait for timeout period and free the dma -+ */ -+ if (host->dma_ch != -1) { -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ schedule_timeout(100); -+ if (down_trylock(&host->sem)) { -+ omap_free_dma(host->dma_ch); -+ host->dma_ch = -1; -+ up(&host->sem); -+ return err; -+ } -+ } else { -+ if (down_trylock(&host->sem)) -+ return err; -+ } - - ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), - "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); -@@ -1485,27 +1457,37 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) - struct omap_hsmmc_host *host = mmc_priv(mmc); - int err; - -- BUG_ON(host->req_in_progress); -- BUG_ON(host->dma_ch != -1); -- if (host->protect_card) { -- if (host->reqs_blocked < 3) { -- /* -- * Ensure the controller is left in a consistent -- * state by resetting the command and data state -- * machines. -- */ -- omap_hsmmc_reset_controller_fsm(host, SRD); -- omap_hsmmc_reset_controller_fsm(host, SRC); -- host->reqs_blocked += 1; -- } -- req->cmd->error = -EBADF; -- if (req->data) -- req->data->error = -EBADF; -- req->cmd->retries = 0; -- mmc_request_done(mmc, req); -- return; -- } else if (host->reqs_blocked) -- host->reqs_blocked = 0; -+ /* -+ * Prevent races with the interrupt handler because of unexpected -+ * interrupts, but not if we are already in interrupt context i.e. -+ * retries. -+ */ -+ if (!in_interrupt()) { -+ spin_lock_irqsave(&host->irq_lock, host->flags); -+ /* -+ * Protect the card from I/O if there is a possibility -+ * it can be removed. -+ */ -+ if (host->protect_card) { -+ if (host->reqs_blocked < 3) { -+ /* -+ * Ensure the controller is left in a consistent -+ * state by resetting the command and data state -+ * machines. -+ */ -+ omap_hsmmc_reset_controller_fsm(host, SRD); -+ omap_hsmmc_reset_controller_fsm(host, SRC); -+ host->reqs_blocked += 1; -+ } -+ req->cmd->error = -EBADF; -+ if (req->data) -+ req->data->error = -EBADF; -+ spin_unlock_irqrestore(&host->irq_lock, host->flags); -+ mmc_request_done(mmc, req); -+ return; -+ } else if (host->reqs_blocked) -+ host->reqs_blocked = 0; -+ } - WARN_ON(host->mrq != NULL); - host->mrq = req; - err = omap_hsmmc_prepare_data(host, req); -@@ -1514,6 +1496,8 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) - if (req->data) - req->data->error = err; - host->mrq = NULL; -+ if (!in_interrupt()) -+ spin_unlock_irqrestore(&host->irq_lock, host->flags); - mmc_request_done(mmc, req); - return; - } -@@ -2093,6 +2077,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) - mmc->f_min = 400000; - mmc->f_max = 52000000; - -+ sema_init(&host->sem, 1); - spin_lock_init(&host->irq_lock); - - host->iclk = clk_get(&pdev->dev, "ick"); -@@ -2235,7 +2220,8 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) - pdata->resume = omap_hsmmc_resume_cdirq; - } - -- omap_hsmmc_disable_irq(host); -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); -+ OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); - - mmc_host_lazy_disable(host->mmc); - -@@ -2356,7 +2342,10 @@ static int omap_hsmmc_suspend(struct device *dev) - ret = mmc_suspend_host(host->mmc); - mmc_host_enable(host->mmc); - if (ret == 0) { -- omap_hsmmc_disable_irq(host); -+ OMAP_HSMMC_WRITE(host->base, ISE, 0); -+ OMAP_HSMMC_WRITE(host->base, IE, 0); -+ -+ - OMAP_HSMMC_WRITE(host->base, HCTL, - OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); - mmc_host_disable(host->mmc); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0012-Don-t-turn-SDIO-cards-off-to-save-power.-Doing-so-wi.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0012-Don-t-turn-SDIO-cards-off-to-save-power.-Doing-so-wi.patch deleted file mode 100644 index 1c86b22..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0012-Don-t-turn-SDIO-cards-off-to-save-power.-Doing-so-wi.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 75d9413d575f724e1f7c006fdef374fb1c200346 Mon Sep 17 00:00:00 2001 -From: David Vrabel <david.vrabel@csr.com> -Date: Fri, 2 Apr 2010 08:41:47 -0700 -Subject: [PATCH 12/32] Don't turn SDIO cards off to save power. Doing so will lose all internal state in the card. - -Signed-off-by: David Vrabel <david.vrabel@csr.com> ---- - drivers/mmc/host/omap_hsmmc.c | 12 ++++++++---- - 1 files changed, 8 insertions(+), 4 deletions(-) - -diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c -index 15a023b..83f93ab 100644 ---- a/drivers/mmc/host/omap_hsmmc.c -+++ b/drivers/mmc/host/omap_hsmmc.c -@@ -29,6 +29,7 @@ - #include <linux/mmc/host.h> - #include <linux/mmc/core.h> - #include <linux/mmc/mmc.h> -+#include <linux/mmc/card.h> - #include <linux/io.h> - #include <linux/semaphore.h> - #include <linux/gpio.h> -@@ -1760,8 +1761,12 @@ static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host *host) - mmc_slot(host).card_detect || - (mmc_slot(host).get_cover_state && - mmc_slot(host).get_cover_state(host->dev, host->slot_id)))) { -- mmc_release_host(host->mmc); -- return 0; -+ goto out; -+ } -+ -+ /* Don't turn SDIO cards off. */ -+ if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { -+ goto out; - } - - mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); -@@ -1772,9 +1777,8 @@ static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host *host) - host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); - - host->dpm_state = OFF; -- -+out: - mmc_release_host(host->mmc); -- - return 0; - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0013-Enable-the-use-of-SDIO-card-interrupts.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0013-Enable-the-use-of-SDIO-card-interrupts.patch deleted file mode 100644 index 59d5ec4..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0013-Enable-the-use-of-SDIO-card-interrupts.patch +++ /dev/null @@ -1,288 +0,0 @@ -From 948eeb1f03da5fca0f6734c10efbc35ad63a1d08 Mon Sep 17 00:00:00 2001 -From: David Vrabel <david.vrabel@csr.com> -Date: Fri, 2 Apr 2010 08:42:22 -0700 -Subject: [PATCH 13/32] Enable the use of SDIO card interrupts. - -FCLK must be enabled while SDIO interrupts are enabled or the MMC -module won't wake-up (even though ENAWAKEUP in SYSCONFIG and IWE in -HTCL have been set). Enabling the MMC module to wake-up would require -configuring the MMC module (and the mmci_dat[1] GPIO when the CORE -power domain is OFF) as wake-up sources in the PRCM. - -The writes to STAT and ISE when starting a command are unnecessary and -have been removed. - -Signed-off-by: David Vrabel <david.vrabel@csr.com> ---- - drivers/mmc/host/omap_hsmmc.c | 118 +++++++++++++++++++++++++++++------------ - 1 files changed, 83 insertions(+), 35 deletions(-) - -diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c -index 83f93ab..d57686c 100644 ---- a/drivers/mmc/host/omap_hsmmc.c -+++ b/drivers/mmc/host/omap_hsmmc.c -@@ -67,6 +67,7 @@ - #define SDVS_MASK 0x00000E00 - #define SDVSCLR 0xFFFFF1FF - #define SDVSDET 0x00000400 -+#define ENAWAKEUP (1 << 2) - #define AUTOIDLE 0x1 - #define SDBP (1 << 8) - #define DTO 0xe -@@ -77,10 +78,13 @@ - #define CLKD_SHIFT 6 - #define DTO_MASK 0x000F0000 - #define DTO_SHIFT 16 -+#define CIRQ_ENABLE (1 << 8) - #define INT_EN_MASK 0x307F0033 - #define BWR_ENABLE (1 << 4) - #define BRR_ENABLE (1 << 5) - #define DTO_ENABLE (1 << 20) -+#define CTPL (1 << 11) -+#define CLKEXTFREE (1 << 16) - #define INIT_STREAM (1 << 1) - #define DP_SELECT (1 << 21) - #define DDIR (1 << 4) -@@ -88,10 +92,12 @@ - #define MSBS (1 << 5) - #define BCE (1 << 1) - #define FOUR_BIT (1 << 1) -+#define IWE (1 << 24) - #define DW8 (1 << 5) - #define CC 0x1 - #define TC 0x02 - #define OD 0x1 -+#define CIRQ (1 << 8) - #define ERR (1 << 15) - #define CMD_TIMEOUT (1 << 16) - #define DATA_TIMEOUT (1 << 20) -@@ -186,6 +192,7 @@ struct omap_hsmmc_host { - int protect_card; - int reqs_blocked; - int use_reg; -+ int sdio_int; - - struct omap_mmc_platform_data *pdata; - }; -@@ -598,7 +605,7 @@ static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) - ; - - OMAP_HSMMC_WRITE(host->base, SYSCONFIG, -- OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); -+ OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE | ENAWAKEUP); - - if (host->id == OMAP_MMC1_DEVID) { - if (host->power_mode != MMC_POWER_OFF && -@@ -613,7 +620,7 @@ static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) - } - - OMAP_HSMMC_WRITE(host->base, HCTL, -- OMAP_HSMMC_READ(host->base, HCTL) | hctl); -+ OMAP_HSMMC_READ(host->base, HCTL) | hctl | IWE); - - OMAP_HSMMC_WRITE(host->base, CAPA, - OMAP_HSMMC_READ(host->base, CAPA) | capa); -@@ -627,7 +634,7 @@ static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) - ; - - OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); -- OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ); - OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); - - /* Do not initialize card-specific things if the power is off */ -@@ -791,22 +798,19 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, - struct mmc_data *data) - { - int cmdreg = 0, resptype = 0, cmdtype = 0; -+ int int_en_mask = INT_EN_MASK; - - dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", - mmc_hostname(host->mmc), cmd->opcode, cmd->arg); - host->cmd = cmd; - -- /* -- * Clear status bits and enable interrupts -- */ -- OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); -- OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); -- - if (host->use_dma) -- OMAP_HSMMC_WRITE(host->base, IE, -- INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE)); -- else -- OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); -+ int_en_mask &= ~(BRR_ENABLE | BWR_ENABLE); -+ -+ if (host->sdio_int) -+ int_en_mask |= CIRQ; -+ -+ OMAP_HSMMC_WRITE(host->base, IE, int_en_mask); - - host->response_busy = 0; - if (cmd->flags & MMC_RSP_PRESENT) { -@@ -1019,23 +1023,26 @@ static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) - { - struct omap_hsmmc_host *host = dev_id; - struct mmc_data *data; -- int end_cmd = 0, end_trans = 0, status; -+ u32 status; -+ int end_cmd = 0, end_trans = 0; -+ bool card_irq = false; - - spin_lock(&host->irq_lock); - -- if (host->mrq == NULL) { -- OMAP_HSMMC_WRITE(host->base, STAT, -- OMAP_HSMMC_READ(host->base, STAT)); -- /* Flush posted write */ -- OMAP_HSMMC_READ(host->base, STAT); -- spin_unlock(&host->irq_lock); -- return IRQ_HANDLED; -- } -- -- data = host->data; - status = OMAP_HSMMC_READ(host->base, STAT); -+ OMAP_HSMMC_WRITE(host->base, STAT, status); -+ OMAP_HSMMC_READ(host->base, STAT); /* Flush posted write. */ -+ - dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); - -+ if (status & CIRQ) -+ card_irq = true; -+ -+ if (host->mrq == NULL) -+ goto out; -+ -+ data = host->data; -+ - if (status & ERR) { - #ifdef CONFIG_MMC_DEBUG - omap_hsmmc_report_irq(host, status); -@@ -1085,17 +1092,16 @@ static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) - } - } - -- OMAP_HSMMC_WRITE(host->base, STAT, status); -- /* Flush posted write */ -- OMAP_HSMMC_READ(host->base, STAT); -- - if (end_cmd || ((status & CC) && host->cmd)) - omap_hsmmc_cmd_done(host, host->cmd); - if ((end_trans || (status & TC)) && host->mrq) - omap_hsmmc_xfer_done(host, data); -- -+out: - spin_unlock(&host->irq_lock); - -+ if (card_irq) -+ mmc_signal_sdio_irq(host->mmc); -+ - return IRQ_HANDLED; - } - -@@ -1643,6 +1649,47 @@ static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) - mmc_slot(host).init_card(card); - } - -+static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable) -+{ -+ struct omap_hsmmc_host *host = mmc_priv(mmc); -+ u32 ie, con; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&host->irq_lock, flags); -+ -+ /* -+ * When interrupts are enabled, CTPL must be set to enable -+ * DAT1 input buffer (or the card interrupt is always -+ * asserted) and FCLK must be enabled as wake-up does not -+ * work. Take care to disable FCLK after all the register -+ * accesses as they might not complete if FCLK is off. -+ * -+ * FIXME: if the MMC module (and the mmci_dat[1] GPIO when the -+ * CORE power domain is OFF) are configured as a wake-up -+ * sources in the PRCM, then FCLK could be switched off. This -+ * might add too much latency. -+ */ -+ con = OMAP_HSMMC_READ(host->base, CON); -+ ie = OMAP_HSMMC_READ(host->base, IE); -+ if (enable) { -+ clk_enable(host->fclk); -+ ie |= CIRQ_ENABLE; -+ con |= CTPL | CLKEXTFREE; -+ host->sdio_int = 1; -+ } else { -+ ie &= ~CIRQ_ENABLE; -+ con &= ~(CTPL | CLKEXTFREE); -+ host->sdio_int = 0; -+ } -+ OMAP_HSMMC_WRITE(host->base, CON, con); -+ OMAP_HSMMC_WRITE(host->base, IE, ie); -+ OMAP_HSMMC_READ(host->base, IE); /* flush posted write */ -+ if (!enable) -+ clk_disable(host->fclk); -+ -+ spin_unlock_irqrestore(&host->irq_lock, flags); -+} -+ - static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) - { - u32 hctl, capa, value; -@@ -1657,14 +1704,14 @@ static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) - } - - value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; -- OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); -+ OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl | IWE); - - value = OMAP_HSMMC_READ(host->base, CAPA); - OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); - - /* Set the controller to AUTO IDLE mode */ - value = OMAP_HSMMC_READ(host->base, SYSCONFIG); -- OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); -+ OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE | ENAWAKEUP); - - /* Set SD bus power bit */ - set_sd_bus_power(host); -@@ -1918,7 +1965,7 @@ static const struct mmc_host_ops omap_hsmmc_ops = { - .get_cd = omap_hsmmc_get_cd, - .get_ro = omap_hsmmc_get_ro, - .init_card = omap_hsmmc_init_card, -- /* NYET -- enable_sdio_irq */ -+ .enable_sdio_irq = omap_hsmmc_enable_sdio_irq, - }; - - static const struct mmc_host_ops omap_hsmmc_ps_ops = { -@@ -1929,7 +1976,7 @@ static const struct mmc_host_ops omap_hsmmc_ps_ops = { - .get_cd = omap_hsmmc_get_cd, - .get_ro = omap_hsmmc_get_ro, - .init_card = omap_hsmmc_init_card, -- /* NYET -- enable_sdio_irq */ -+ .enable_sdio_irq = omap_hsmmc_enable_sdio_irq, - }; - - #ifdef CONFIG_DEBUG_FS -@@ -2145,7 +2192,8 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) - mmc->max_seg_size = mmc->max_req_size; - - mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | -- MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; -+ MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE | -+ MMC_CAP_SDIO_IRQ; - - mmc->caps |= mmc_slot(host).caps; - if (mmc->caps & MMC_CAP_8_BIT_DATA) -@@ -2224,7 +2272,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) - pdata->resume = omap_hsmmc_resume_cdirq; - } - -- OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ); - OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); - - mmc_host_lazy_disable(host->mmc); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0014-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0014-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch deleted file mode 100644 index d6e8287..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0014-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch +++ /dev/null @@ -1,27 +0,0 @@ -From f646d3df7a7160fd80f20416c4a0fce55946f527 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 12:45:20 -0800 -Subject: [PATCH 14/32] soc: codecs: Enable audio capture by default for twl4030 - ---- - sound/soc/codecs/twl4030.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c -index 575238d..bd51f72 100644 ---- a/sound/soc/codecs/twl4030.c -+++ b/sound/soc/codecs/twl4030.c -@@ -56,8 +56,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { - 0x00, /* REG_OPTION (0x2) */ - 0x00, /* REG_UNKNOWN (0x3) */ - 0x00, /* REG_MICBIAS_CTL (0x4) */ -- 0x00, /* REG_ANAMICL (0x5) */ -- 0x00, /* REG_ANAMICR (0x6) */ -+ 0x34, /* REG_ANAMICL (0x5) */ -+ 0x14, /* REG_ANAMICR (0x6) */ - 0x00, /* REG_AVADC_CTL (0x7) */ - 0x00, /* REG_ADCMICSEL (0x8) */ - 0x00, /* REG_DIGMIXING (0x9) */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0015-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0015-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch deleted file mode 100644 index 04d9168..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0015-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 00adf70cb5f8706ac5e7b1ec6f5a94f7e490b606 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Wed, 29 Dec 2010 11:39:16 -0800 -Subject: [PATCH 15/32] soc: codecs: twl4030: Turn on mic bias by default - ---- - sound/soc/codecs/twl4030.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c -index bd51f72..8949773 100644 ---- a/sound/soc/codecs/twl4030.c -+++ b/sound/soc/codecs/twl4030.c -@@ -55,7 +55,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { - 0x00, /* REG_CODEC_MODE (0x1) */ - 0x00, /* REG_OPTION (0x2) */ - 0x00, /* REG_UNKNOWN (0x3) */ -- 0x00, /* REG_MICBIAS_CTL (0x4) */ -+ 0x03, /* REG_MICBIAS_CTL (0x4) */ - 0x34, /* REG_ANAMICL (0x5) */ - 0x14, /* REG_ANAMICR (0x6) */ - 0x00, /* REG_AVADC_CTL (0x7) */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0016-RTC-add-support-for-backup-battery-recharge.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0016-RTC-add-support-for-backup-battery-recharge.patch deleted file mode 100644 index cb685cc..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0016-RTC-add-support-for-backup-battery-recharge.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 6f432e1e39f276a41d600d1cc9cd17fc088877d8 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 4 Feb 2010 12:26:22 -0800 -Subject: [PATCH 16/32] RTC: add support for backup battery recharge - ---- - drivers/rtc/rtc-twl.c | 25 +++++++++++++++++++++++++ - 1 files changed, 25 insertions(+), 0 deletions(-) - -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c -index f9a2799..713b8ea 100644 ---- a/drivers/rtc/rtc-twl.c -+++ b/drivers/rtc/rtc-twl.c -@@ -30,6 +30,23 @@ - - #include <linux/i2c/twl.h> - -+/* -+ * PM_RECEIVER block register offsets (use TWL4030_MODULE_PM_RECEIVER) -+ */ -+#define REG_BB_CFG 0x12 -+ -+/* PM_RECEIVER BB_CFG bitfields */ -+#define BIT_PM_RECEIVER_BB_CFG_BBCHEN 0x10 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL 0x0C -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_2V5 0x00 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V0 0x04 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 0x08 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3v2 0x0c -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL 0x03 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA 0x00 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_150UA 0x01 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_500UA 0x02 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_1MA 0x03 - - /* - * RTC block register offsets (use TWL_MODULE_RTC) -@@ -495,6 +512,14 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) - if (ret < 0) - goto out2; - -+ /* enable backup battery charging */ -+ /* use a conservative 25uA @ 3.1V */ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ BIT_PM_RECEIVER_BB_CFG_BBCHEN | -+ BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 | -+ BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA, -+ REG_BB_CFG); -+ - return ret; - - out2: --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0017-ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0017-ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch deleted file mode 100644 index 1e6ba8d..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0017-ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 56dc96df8ff5e3db6afde96d64d74200f85e59c2 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Sun, 24 Jan 2010 09:33:56 -0800 -Subject: [PATCH 17/32] ARM: OMAP2: mmc-twl4030: move clock input selection prior to vcc test - -otherwise it is not executed on systems that use non-twl regulators ---- - arch/arm/mach-omap2/hsmmc.c | 14 ++++++-------- - 1 files changed, 6 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c -index b2f30be..84d5ef6 100644 ---- a/arch/arm/mach-omap2/hsmmc.c -+++ b/arch/arm/mach-omap2/hsmmc.c -@@ -185,15 +185,13 @@ static void hsmmc23_before_set_reg(struct device *dev, int slot, - if (mmc->slots[0].remux) - mmc->slots[0].remux(dev, slot, power_on); - -- if (power_on) { -- /* Only MMC2 supports a CLKIN */ -- if (mmc->slots[0].internal_clock) { -- u32 reg; -+ /* Only MMC2 supports a CLKIN */ -+ if (mmc->slots[0].internal_clock) { -+ u32 reg; - -- reg = omap_ctrl_readl(control_devconf1_offset); -- reg |= OMAP2_MMCSDIO2ADPCLKISEL; -- omap_ctrl_writel(reg, control_devconf1_offset); -- } -+ reg = omap_ctrl_readl(control_devconf1_offset); -+ reg |= OMAP2_MMCSDIO2ADPCLKISEL; -+ omap_ctrl_writel(reg, control_devconf1_offset); - } - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0018-Add-power-off-support-for-the-TWL4030-companion.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0018-Add-power-off-support-for-the-TWL4030-companion.patch deleted file mode 100644 index 3086027..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0018-Add-power-off-support-for-the-TWL4030-companion.patch +++ /dev/null @@ -1,103 +0,0 @@ -From 8c257a6e7460ceb8c899980f7dad701ceb619adc Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Bernhard=20W=C3=B6rndl-Aichriedler?= <bwa@xdevelop.at> -Date: Sat, 15 May 2010 16:34:05 +0200 -Subject: [PATCH 18/32] Add power-off support for the TWL4030 companion - -This patch adds support for the power-off on shutdown feature of the TWL4030 ---- - drivers/mfd/Kconfig | 6 ++++++ - drivers/mfd/twl-core.c | 40 ++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 46 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig -index 3ed3ff0..fe2370a 100644 ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -210,6 +210,12 @@ config TWL4030_CODEC - select MFD_CORE - default n - -+config TWL4030_POWEROFF -+ bool "TWL4030 Allow power-off on shutdown" -+ depends on TWL4030_CORE -+ help -+ Enables the CPU to power-off the system on shutdown -+ - config TWL6030_PWM - tristate "TWL6030 PWM (Pulse Width Modulator) Support" - depends on TWL4030_CORE -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c -index 960b5be..8804550 100644 ---- a/drivers/mfd/twl-core.c -+++ b/drivers/mfd/twl-core.c -@@ -122,6 +122,12 @@ - #define twl_has_bci() false - #endif - -+#if defined (CONFIG_TWL4030_POWEROFF) -+#define twl_has_poweroff() true -+#else -+#define twl_has_poweroff() false -+#endif -+ - /* Triton Core internal information (BEGIN) */ - - /* Last - for index max*/ -@@ -224,6 +230,10 @@ - #define TWL5031 BIT(2) /* twl5031 has different registers */ - #define TWL6030_CLASS BIT(3) /* TWL6030 class */ - -+/* for pm_power_off */ -+#define PWR_P1_SW_EVENTS 0x10 -+#define PWR_DEVOFF (1 << 0) -+ - /*----------------------------------------------------------------------*/ - - /* is driver active, bound to a chip? */ -@@ -1006,6 +1016,30 @@ static int twl_remove(struct i2c_client *client) - return 0; - } - -+static void twl_poweroff(void) -+{ -+ int err; -+ u8 val; -+ -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &val, -+ PWR_P1_SW_EVENTS); -+ if (err) { -+ pr_err("%s: i2c error %d while reading TWL4030" -+ "PM_MASTER P1_SW_EVENTS\n", -+ DRIVER_NAME, err); -+ return; -+ } -+ -+ val |= PWR_DEVOFF; -+ -+ err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, val, -+ PWR_P1_SW_EVENTS); -+ if (err) -+ pr_err("%s: i2c error %d while writing TWL4030" -+ "PM_MASTER P1_SW_EVENTS\n", -+ DRIVER_NAME, err); -+} -+ - /* NOTE: this driver only handles a single twl4030/tps659x0 chip */ - static int __devinit - twl_probe(struct i2c_client *client, const struct i2c_device_id *id) -@@ -1093,6 +1127,12 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id) - twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1); - } - -+ if(twl_has_poweroff()) -+ { -+ /* initialize pm_power_off routine */ -+ pm_power_off = twl_poweroff; -+ } -+ - status = add_children(pdata, id->driver_data); - fail: - if (status < 0) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0019-ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0019-ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch deleted file mode 100644 index 1f139f1..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0019-ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 46ea520a3c80914ae5ad3e35be7b8650706da3e6 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 14:27:15 -0800 -Subject: [PATCH 19/32] ARM: OMAP: Add twl4030 madc support to Overo - -Signed-off-by: Steve Sakoman <steve@sakoman.com> ---- - arch/arm/mach-omap2/board-overo.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 59ca333..86f76e9 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -637,10 +637,15 @@ static struct twl4030_codec_data overo_codec_data = { - .audio = &overo_audio_data, - }; - -+static struct twl4030_madc_platform_data overo_madc_data = { -+ .irq_line = 1, -+}; -+ - static struct twl4030_platform_data overo_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - .gpio = &overo_gpio_data, -+ .madc = &overo_madc_data, - .usb = &overo_usb_data, - .codec = &overo_codec_data, - .vmmc1 = &overo_vmmc1, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0020-Enabling-Hwmon-driver-for-twl4030-madc.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0020-Enabling-Hwmon-driver-for-twl4030-madc.patch deleted file mode 100644 index c80aef9..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0020-Enabling-Hwmon-driver-for-twl4030-madc.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 931bd787effbd6f1f00468c89c647c66c0bbc164 Mon Sep 17 00:00:00 2001 -From: Keerthy <j-keerthy@ti.com> -Date: Wed, 4 May 2011 01:14:50 +0530 -Subject: [PATCH 20/32] Enabling Hwmon driver for twl4030-madc - -Signed-off-by: Keerthy <j-keerthy@ti.com> ---- - drivers/mfd/twl-core.c | 15 +++++++++++++++ - 1 files changed, 15 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c -index 8804550..d9435e4 100644 ---- a/drivers/mfd/twl-core.c -+++ b/drivers/mfd/twl-core.c -@@ -83,6 +83,13 @@ - #define twl_has_madc() false - #endif - -+#if defined(CONFIG_SENSORS_TWL4030_MADC) ||\ -+ defined(CONFIG_SENSORS_TWL4030_MADC_MODULE) -+#define twl_has_madc_hwmon() true -+#else -+#define twl_has_madc_hwmon() false -+#endif -+ - #ifdef CONFIG_TWL4030_POWER - #define twl_has_power() true - #else -@@ -619,6 +626,14 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features) - return PTR_ERR(child); - } - -+if (twl_has_madc_hwmon()) { -+ child = add_child(2, "twl4030_madc_hwmon", -+ NULL, 0, -+ true, pdata->irq_base + MADC_INTR_OFFSET, 0); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ } -+ - if (twl_has_rtc()) { - /* - * REVISIT platform_data here currently might expose the --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0021-mfd-twl-core-enable-madc-clock.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0021-mfd-twl-core-enable-madc-clock.patch deleted file mode 100644 index 732d306..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0021-mfd-twl-core-enable-madc-clock.patch +++ /dev/null @@ -1,54 +0,0 @@ -From aee147073ad84a7c81fba36dd475c6d2d17ed728 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Sat, 23 Jan 2010 06:26:54 -0800 -Subject: [PATCH 21/32] mfd: twl-core: enable madc clock - -Now that the madc driver has been merged it is also necessary to enable the clock to the madc block - -Signed-off-by: Steve Sakoman <steve@sakoman.com> ---- - drivers/mfd/twl-core.c | 8 ++++++++ - include/linux/i2c/twl.h | 1 + - 2 files changed, 9 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c -index d9435e4..9096d7d 100644 ---- a/drivers/mfd/twl-core.c -+++ b/drivers/mfd/twl-core.c -@@ -222,6 +222,11 @@ - - /* Few power values */ - #define R_CFG_BOOT 0x05 -+#define R_GPBR1 0x0C -+ -+/* MADC clock values for R_GPBR1 */ -+#define MADC_HFCLK_EN 0x80 -+#define DEFAULT_MADC_CLK_EN 0x10 - - /* some fields in R_CFG_BOOT */ - #define HFCLK_FREQ_19p2_MHZ (1 << 0) -@@ -992,6 +997,9 @@ static void clocks_init(struct device *dev, - - e |= unprotect_pm_master(); - /* effect->MADC+USB ck en */ -+ if (twl_has_madc()) -+ e |= twl_i2c_write_u8(TWL_MODULE_INTBR, -+ MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, R_GPBR1); - e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); - e |= protect_pm_master(); - -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h -index 0c0d1ae..cbbf3b3 100644 ---- a/include/linux/i2c/twl.h -+++ b/include/linux/i2c/twl.h -@@ -74,6 +74,7 @@ - - #define TWL_MODULE_USB TWL4030_MODULE_USB - #define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE -+#define TWL_MODULE_INTBR TWL4030_MODULE_INTBR - #define TWL_MODULE_PIH TWL4030_MODULE_PIH - #define TWL_MODULE_MADC TWL4030_MODULE_MADC - #define TWL_MODULE_MAIN_CHARGE TWL4030_MODULE_MAIN_CHARGE --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0022-rtc-twl-Switch-to-using-threaded-irq.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0022-rtc-twl-Switch-to-using-threaded-irq.patch deleted file mode 100644 index 0306d4b..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0022-rtc-twl-Switch-to-using-threaded-irq.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 29dd1b5655f60f97a9cee2f4ff1d27d7da1329a1 Mon Sep 17 00:00:00 2001 -From: Ilkka Koskinen <ilkka.koskinen@nokia.com> -Date: Wed, 16 Mar 2011 16:07:14 +0000 -Subject: [PATCH 22/32] rtc-twl: Switch to using threaded irq - ---- - drivers/rtc/rtc-twl.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c -index 713b8ea..1fe1bc9 100644 ---- a/drivers/rtc/rtc-twl.c -+++ b/drivers/rtc/rtc-twl.c -@@ -479,7 +479,7 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) - if (ret < 0) - goto out1; - -- ret = request_irq(irq, twl_rtc_interrupt, -+ ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, - IRQF_TRIGGER_RISING, - dev_name(&rtc->dev), rtc); - if (ret < 0) { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0023-ARM-OMAP-automatically-set-musb-mode-in-platform-dat.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0023-ARM-OMAP-automatically-set-musb-mode-in-platform-dat.patch deleted file mode 100644 index a35d7de..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0023-ARM-OMAP-automatically-set-musb-mode-in-platform-dat.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 92c06791d4d6b537a9a83b27d71d7d3dd348f93f Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Wed, 24 Feb 2010 10:37:22 -0800 -Subject: [PATCH 23/32] ARM: OMAP: automatically set musb mode in platform data based on CONFIG options - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 6 ++++++ - arch/arm/mach-omap2/board-overo.c | 6 ++++++ - 2 files changed, 12 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 33007fd..2de4b02 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -604,7 +604,13 @@ static struct omap_board_mux board_mux[] __initdata = { - - static struct omap_musb_board_data musb_board_data = { - .interface_type = MUSB_INTERFACE_ULPI, -+#if defined(CONFIG_USB_MUSB_OTG) - .mode = MUSB_OTG, -+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) -+ .mode = MUSB_PERIPHERAL, -+#else -+ .mode = MUSB_HOST, -+#endif - .power = 100, - }; - -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 86f76e9..61c59fc 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -729,7 +729,13 @@ static struct omap_board_mux board_mux[] __initdata = { - - static struct omap_musb_board_data musb_board_data = { - .interface_type = MUSB_INTERFACE_ULPI, -+#if defined(CONFIG_USB_MUSB_OTG) - .mode = MUSB_OTG, -+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) -+ .mode = MUSB_PERIPHERAL, -+#else -+ .mode = MUSB_HOST, -+#endif - .power = 100, - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0024-omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0024-omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch deleted file mode 100644 index bd1764a..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0024-omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch +++ /dev/null @@ -1,28 +0,0 @@ -From a442a2b9b2f9f51375f8a796ee88784d3754be00 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Wed, 12 Jan 2011 05:54:55 -0800 -Subject: [PATCH 24/32] omap: mmc: Adjust dto to eliminate timeout errors - -A number of SD card types were experiencing timeout errors. This -could also lead to data corruption in some cases. - -This fix proposed by Sukumar Ghoral of TI. ---- - drivers/mmc/host/omap_hsmmc.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c -index d57686c..7fb03e8 100644 ---- a/drivers/mmc/host/omap_hsmmc.c -+++ b/drivers/mmc/host/omap_hsmmc.c -@@ -1400,6 +1400,7 @@ static void set_data_timeout(struct omap_hsmmc_host *host, - cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); - timeout = timeout_ns / cycle_ns; - timeout += timeout_clks; -+ timeout *= 2; - if (timeout) { - while ((timeout & 0x80000000) == 0) { - dto += 1; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0025-omap-Fix-mtd-subpage-read-alignment.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0025-omap-Fix-mtd-subpage-read-alignment.patch deleted file mode 100644 index 1508da1..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0025-omap-Fix-mtd-subpage-read-alignment.patch +++ /dev/null @@ -1,95 +0,0 @@ -From acf75c8b4d0f6775527636bf9d41bb1f74fc2f97 Mon Sep 17 00:00:00 2001 -From: Charles Manning <cdhmanning@gmail.com> -Date: Tue, 18 Jan 2011 11:25:25 +1300 -Subject: [PATCH 25/32] omap: Fix mtd subpage read alignment - -This allows the omap2 prefetch engine to work properly for subpage -reads. Without this ECC errors will stop UBIFS from working. - -Signed-off-by: Charles Manning <cdhmanning@gmail.com> ---- - drivers/mtd/nand/nand_base.c | 19 +++++++++++++++++++ - drivers/mtd/nand/omap2.c | 1 + - include/linux/mtd/nand.h | 3 +++ - 3 files changed, 23 insertions(+), 0 deletions(-) - -diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c -index c54a4cb..6ca7098 100644 ---- a/drivers/mtd/nand/nand_base.c -+++ b/drivers/mtd/nand/nand_base.c -@@ -1157,6 +1157,22 @@ static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, - } - - /** -+ * nand_align_subpage32 - function to align subpage read to 32-bits -+ * @mtd: mtd info structure -+ * @buf: pointer to offset that needs to be aligned -+ * @len: pointer to length that needs to be aligned. -+ */ -+ -+void nand_align_subpage32(int *offs, int *len) -+{ -+ int diff = *offs & 3; -+ -+ *offs = *offs - diff; -+ *len = (*len + diff + 3) & ~3; -+} -+EXPORT_SYMBOL(nand_align_subpage32); -+ -+/** - * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function - * @mtd: mtd info structure - * @chip: nand chip info structure -@@ -1221,6 +1237,9 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, - if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) - aligned_len++; - -+ if(chip->align_subpage) -+ chip->align_subpage(&aligned_pos, &aligned_len); -+ - chip->cmdfunc(mtd, NAND_CMD_RNDOUT, - mtd->writesize + aligned_pos, -1); - chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); -diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c -index da9a351..bb89c65 100644 ---- a/drivers/mtd/nand/omap2.c -+++ b/drivers/mtd/nand/omap2.c -@@ -1069,6 +1069,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) - info->nand.ecc.correct = omap_correct_data; - info->nand.ecc.mode = NAND_ECC_HW; - } -+ info->nand.align_subpage = nand_align_subpage32; - - /* DIP switches on some boards change between 8 and 16 bit - * bus widths for flash. Try the other width if the first try fails. -diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h -index d441927..311f211 100644 ---- a/include/linux/mtd/nand.h -+++ b/include/linux/mtd/nand.h -@@ -479,6 +479,7 @@ struct nand_buffers { - * additional error status checks (determine if errors are - * correctable). - * @write_page: [REPLACEABLE] High-level page write function -+ * @align_subpage: [OPTIONAL] Aligns subpage read buffer. - */ - - struct nand_chip { -@@ -507,6 +508,7 @@ struct nand_chip { - int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf, int page, int cached, int raw); - -+ void (*align_subpage)(int *offs, int *len); - int chip_delay; - unsigned int options; - -@@ -602,6 +604,7 @@ extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, - int allowbbt); - extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, uint8_t *buf); -+extern void nand_align_subpage32(int *offs, int *len); - - /** - * struct platform_nand_chip - chip level device structure --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0026-mtd-nand-omap2-Force-all-buffer-reads-to-u32-alignme.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0026-mtd-nand-omap2-Force-all-buffer-reads-to-u32-alignme.patch deleted file mode 100644 index 5e06023..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0026-mtd-nand-omap2-Force-all-buffer-reads-to-u32-alignme.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 048c2b85c12ac4aa8cd82201e1ade332557e4380 Mon Sep 17 00:00:00 2001 -From: Charles Manning <manningc2@actrix.gen.nz> -Date: Thu, 16 Dec 2010 20:35:56 -0800 -Subject: [PATCH 26/32] mtd: nand: omap2: Force all buffer reads to u32 alignment - ---- - drivers/mtd/nand/omap2.c | 12 ++++++++++++ - 1 files changed, 12 insertions(+), 0 deletions(-) - -diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c -index bb89c65..832f111 100644 ---- a/drivers/mtd/nand/omap2.c -+++ b/drivers/mtd/nand/omap2.c -@@ -247,6 +247,18 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len) - int ret = 0; - u32 *p = (u32 *)buf; - -+ /* u32 align the buffer and read */ -+ /* NB: This assumes the buf ptr can be aligned *down* which is a valid. -+ * Assumption when dealing with ecc buffers etc. -+ */ -+ u32 addr = (u32)p; -+ -+ int diff = addr & 3; -+ addr -= diff; -+ len += diff; -+ len = (len + 3) & ~3; -+ p = (u32 *)addr; -+ - /* take care of subpage reads */ - if (len % 4) { - if (info->nand.options & NAND_BUSWIDTH_16) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0027-omap-nand-fix-subpage-ecc-issue-with-prefetch.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0027-omap-nand-fix-subpage-ecc-issue-with-prefetch.patch deleted file mode 100644 index 21eb1e9..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0027-omap-nand-fix-subpage-ecc-issue-with-prefetch.patch +++ /dev/null @@ -1,63 +0,0 @@ -From fb4dfff6a6e107e0e526801e7add4a9aaeab1eab Mon Sep 17 00:00:00 2001 -From: kishore kadiyala <kishore.kadiyala@ti.com> -Date: Mon, 2 May 2011 11:10:38 +0000 -Subject: [PATCH 27/32] omap : nand : fix subpage ecc issue with prefetch - -For prefetch engine, read and write got broken in commit '2c01946c'. -We never hit a scenario of not getting 'gpmc_prefetch_enable' -call success. -When reading/writing a subpage with a non divisible by 4 ecc number -of bytes, the mis-aligned bytes gets handled first before enabling -the Prefetch engine, then it reads/writes rest of the bytes. - -Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> -Signed-off-by: Vimal Singh <vimal.newwork@gmail.com> -Reported-by: Bryan DE FARIA <bdefaria@adeneo-embedded.com> ---- - drivers/mtd/nand/omap2.c | 12 +++++------- - 1 files changed, 5 insertions(+), 7 deletions(-) - -diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c -index 832f111..471a39b 100644 ---- a/drivers/mtd/nand/omap2.c -+++ b/drivers/mtd/nand/omap2.c -@@ -275,11 +275,10 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len) - if (ret) { - /* PFPW engine is busy, use cpu copy method */ - if (info->nand.options & NAND_BUSWIDTH_16) -- omap_read_buf16(mtd, buf, len); -+ omap_read_buf16(mtd, (u_char *)p, len); - else -- omap_read_buf8(mtd, buf, len); -+ omap_read_buf8(mtd, (u_char *)p, len); - } else { -- p = (u32 *) buf; - do { - r_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT); - r_count = r_count >> 2; -@@ -305,7 +304,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd, - struct omap_nand_info, mtd); - uint32_t w_count = 0; - int i = 0, ret = 0; -- u16 *p; -+ u16 *p = (u16 *)buf; - unsigned long tim, limit; - - /* take care of subpage writes */ -@@ -321,11 +320,10 @@ static void omap_write_buf_pref(struct mtd_info *mtd, - if (ret) { - /* PFPW engine is busy, use cpu copy method */ - if (info->nand.options & NAND_BUSWIDTH_16) -- omap_write_buf16(mtd, buf, len); -+ omap_write_buf16(mtd, (u_char *)p, len); - else -- omap_write_buf8(mtd, buf, len); -+ omap_write_buf8(mtd, (u_char *)p, len); - } else { -- p = (u16 *) buf; - while (len) { - w_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT); - w_count = w_count >> 1; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0028-OMAP-Overo-Add-support-for-spidev.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0028-OMAP-Overo-Add-support-for-spidev.patch deleted file mode 100644 index be1f963..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0028-OMAP-Overo-Add-support-for-spidev.patch +++ /dev/null @@ -1,46 +0,0 @@ -From ee2dcb39e9255fc0aa6b4e267e9553bdbd11e82b Mon Sep 17 00:00:00 2001 -From: Scott Ellis <scottellis.developer@gmail.com> -Date: Sun, 23 Jan 2011 20:39:35 -0800 -Subject: [PATCH 28/32] OMAP: Overo: Add support for spidev - ---- - arch/arm/mach-omap2/board-overo.c | 16 ++++++++++++++++ - 1 files changed, 16 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 61c59fc..05dd3eb 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -683,6 +683,14 @@ static struct spi_board_info overo_spi_board_info[] __initdata = { - .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), - .platform_data = &ads7846_config, - }, -+#elif defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) -+ { -+ .modalias = "spidev", -+ .bus_num = 1, -+ .chip_select = 0, -+ .max_speed_hz = 48000000, -+ .mode = SPI_MODE_0, -+ }, - #endif - #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ - defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) -@@ -693,6 +701,14 @@ static struct spi_board_info overo_spi_board_info[] __initdata = { - .max_speed_hz = 500000, - .mode = SPI_MODE_3, - }, -+#elif defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) -+ { -+ .modalias = "spidev", -+ .bus_num = 1, -+ .chip_select = 1, -+ .max_speed_hz = 48000000, -+ .mode = SPI_MODE_0, -+ }, - #endif - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0029-unionfs-Add-support-for-unionfs-2.5.9.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0029-unionfs-Add-support-for-unionfs-2.5.9.patch deleted file mode 100644 index c17608b..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0029-unionfs-Add-support-for-unionfs-2.5.9.patch +++ /dev/null @@ -1,11494 +0,0 @@ -From 0de368979f94e7c51940979c6149d34aec08f13f Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Mon, 2 May 2011 16:14:34 -0700 -Subject: [PATCH 29/32] unionfs: Add support for unionfs 2.5.9 - ---- - Documentation/filesystems/00-INDEX | 2 + - Documentation/filesystems/unionfs/00-INDEX | 10 + - Documentation/filesystems/unionfs/concepts.txt | 287 ++++++ - Documentation/filesystems/unionfs/issues.txt | 28 + - Documentation/filesystems/unionfs/rename.txt | 31 + - Documentation/filesystems/unionfs/usage.txt | 134 +++ - MAINTAINERS | 8 + - fs/Kconfig | 1 + - fs/Makefile | 1 + - fs/namei.c | 38 + - fs/splice.c | 22 +- - fs/stack.c | 14 +- - fs/unionfs/Kconfig | 24 + - fs/unionfs/Makefile | 17 + - fs/unionfs/commonfops.c | 898 +++++++++++++++++++ - fs/unionfs/copyup.c | 896 +++++++++++++++++++ - fs/unionfs/debug.c | 548 ++++++++++++ - fs/unionfs/dentry.c | 406 +++++++++ - fs/unionfs/dirfops.c | 302 +++++++ - fs/unionfs/dirhelper.c | 158 ++++ - fs/unionfs/fanout.h | 407 +++++++++ - fs/unionfs/file.c | 382 ++++++++ - fs/unionfs/inode.c | 1099 ++++++++++++++++++++++++ - fs/unionfs/lookup.c | 569 ++++++++++++ - fs/unionfs/main.c | 763 ++++++++++++++++ - fs/unionfs/mmap.c | 89 ++ - fs/unionfs/rdstate.c | 285 ++++++ - fs/unionfs/rename.c | 522 +++++++++++ - fs/unionfs/sioq.c | 101 +++ - fs/unionfs/sioq.h | 91 ++ - fs/unionfs/subr.c | 95 ++ - fs/unionfs/super.c | 1030 ++++++++++++++++++++++ - fs/unionfs/union.h | 679 +++++++++++++++ - fs/unionfs/unlink.c | 278 ++++++ - fs/unionfs/whiteout.c | 601 +++++++++++++ - fs/unionfs/xattr.c | 173 ++++ - include/linux/fs_stack.h | 14 +- - include/linux/magic.h | 2 + - include/linux/namei.h | 3 + - include/linux/splice.h | 5 + - include/linux/union_fs.h | 22 + - security/security.c | 1 + - 42 files changed, 11024 insertions(+), 12 deletions(-) - create mode 100644 Documentation/filesystems/unionfs/00-INDEX - create mode 100644 Documentation/filesystems/unionfs/concepts.txt - create mode 100644 Documentation/filesystems/unionfs/issues.txt - create mode 100644 Documentation/filesystems/unionfs/rename.txt - create mode 100644 Documentation/filesystems/unionfs/usage.txt - create mode 100644 fs/unionfs/Kconfig - create mode 100644 fs/unionfs/Makefile - create mode 100644 fs/unionfs/commonfops.c - create mode 100644 fs/unionfs/copyup.c - create mode 100644 fs/unionfs/debug.c - create mode 100644 fs/unionfs/dentry.c - create mode 100644 fs/unionfs/dirfops.c - create mode 100644 fs/unionfs/dirhelper.c - create mode 100644 fs/unionfs/fanout.h - create mode 100644 fs/unionfs/file.c - create mode 100644 fs/unionfs/inode.c - create mode 100644 fs/unionfs/lookup.c - create mode 100644 fs/unionfs/main.c - create mode 100644 fs/unionfs/mmap.c - create mode 100644 fs/unionfs/rdstate.c - create mode 100644 fs/unionfs/rename.c - create mode 100644 fs/unionfs/sioq.c - create mode 100644 fs/unionfs/sioq.h - create mode 100644 fs/unionfs/subr.c - create mode 100644 fs/unionfs/super.c - create mode 100644 fs/unionfs/union.h - create mode 100644 fs/unionfs/unlink.c - create mode 100644 fs/unionfs/whiteout.c - create mode 100644 fs/unionfs/xattr.c - create mode 100644 include/linux/union_fs.h - -diff --git a/Documentation/filesystems/00-INDEX b/Documentation/filesystems/00-INDEX -index 8c624a1..4aa288b 100644 ---- a/Documentation/filesystems/00-INDEX -+++ b/Documentation/filesystems/00-INDEX -@@ -110,6 +110,8 @@ udf.txt - - info and mount options for the UDF filesystem. - ufs.txt - - info on the ufs filesystem. -+unionfs/ -+ - info on the unionfs filesystem - vfat.txt - - info on using the VFAT filesystem used in Windows NT and Windows 95 - vfs.txt -diff --git a/Documentation/filesystems/unionfs/00-INDEX b/Documentation/filesystems/unionfs/00-INDEX -new file mode 100644 -index 0000000..96fdf67 ---- /dev/null -+++ b/Documentation/filesystems/unionfs/00-INDEX -@@ -0,0 +1,10 @@ -+00-INDEX -+ - this file. -+concepts.txt -+ - A brief introduction of concepts. -+issues.txt -+ - A summary of known issues with unionfs. -+rename.txt -+ - Information regarding rename operations. -+usage.txt -+ - Usage information and examples. -diff --git a/Documentation/filesystems/unionfs/concepts.txt b/Documentation/filesystems/unionfs/concepts.txt -new file mode 100644 -index 0000000..b853788 ---- /dev/null -+++ b/Documentation/filesystems/unionfs/concepts.txt -@@ -0,0 +1,287 @@ -+Unionfs 2.x CONCEPTS: -+===================== -+ -+This file describes the concepts needed by a namespace unification file -+system. -+ -+ -+Branch Priority: -+================ -+ -+Each branch is assigned a unique priority - starting from 0 (highest -+priority). No two branches can have the same priority. -+ -+ -+Branch Mode: -+============ -+ -+Each branch is assigned a mode - read-write or read-only. This allows -+directories on media mounted read-write to be used in a read-only manner. -+ -+ -+Whiteouts: -+========== -+ -+A whiteout removes a file name from the namespace. Whiteouts are needed when -+one attempts to remove a file on a read-only branch. -+ -+Suppose we have a two-branch union, where branch 0 is read-write and branch -+1 is read-only. And a file 'foo' on branch 1: -+ -+./b0/ -+./b1/ -+./b1/foo -+ -+The unified view would simply be: -+ -+./union/ -+./union/foo -+ -+Since 'foo' is stored on a read-only branch, it cannot be removed. A -+whiteout is used to remove the name 'foo' from the unified namespace. Again, -+since branch 1 is read-only, the whiteout cannot be created there. So, we -+try on a higher priority (lower numerically) branch and create the whiteout -+there. -+ -+./b0/ -+./b0/.wh.foo -+./b1/ -+./b1/foo -+ -+Later, when Unionfs traverses branches (due to lookup or readdir), it -+eliminate 'foo' from the namespace (as well as the whiteout itself.) -+ -+ -+Opaque Directories: -+=================== -+ -+Assume we have a unionfs mount comprising of two branches. Branch 0 is -+empty; branch 1 has the directory /a and file /a/f. Let's say we mount a -+union of branch 0 as read-write and branch 1 as read-only. Now, let's say -+we try to perform the following operation in the union: -+ -+ rm -fr a -+ -+Because branch 1 is not writable, we cannot physically remove the file /a/f -+or the directory /a. So instead, we will create a whiteout in branch 0 -+named /.wh.a, masking out the name "a" from branch 1. Next, let's say we -+try to create a directory named "a" as follows: -+ -+ mkdir a -+ -+Because we have a whiteout for "a" already, Unionfs behaves as if "a" -+doesn't exist, and thus will delete the whiteout and replace it with an -+actual directory named "a". -+ -+The problem now is that if you try to "ls" in the union, Unionfs will -+perform is normal directory name unification, for *all* directories named -+"a" in all branches. This will cause the file /a/f from branch 1 to -+re-appear in the union's namespace, which violates Unix semantics. -+ -+To avoid this problem, we have a different form of whiteouts for -+directories, called "opaque directories" (same as BSD Union Mount does). -+Whenever we replace a whiteout with a directory, that directory is marked as -+opaque. In Unionfs 2.x, it means that we create a file named -+/a/.wh.__dir_opaque in branch 0, after having created directory /a there. -+When unionfs notices that a directory is opaque, it stops all namespace -+operations (including merging readdir contents) at that opaque directory. -+This prevents re-exposing names from masked out directories. -+ -+ -+Duplicate Elimination: -+====================== -+ -+It is possible for files on different branches to have the same name. -+Unionfs then has to select which instance of the file to show to the user. -+Given the fact that each branch has a priority associated with it, the -+simplest solution is to take the instance from the highest priority -+(numerically lowest value) and "hide" the others. -+ -+ -+Unlinking: -+========= -+ -+Unlink operation on non-directory instances is optimized to remove the -+maximum possible objects in case multiple underlying branches have the same -+file name. The unlink operation will first try to delete file instances -+from highest priority branch and then move further to delete from remaining -+branches in order of their decreasing priority. Consider a case (F..D..F), -+where F is a file and D is a directory of the same name; here, some -+intermediate branch could have an empty directory instance with the same -+name, so this operation also tries to delete this directory instance and -+proceed further to delete from next possible lower priority branch. The -+unionfs unlink operation will smoothly delete the files with same name from -+all possible underlying branches. In case if some error occurs, it creates -+whiteout in highest priority branch that will hide file instance in rest of -+the branches. An error could occur either if an unlink operations in any of -+the underlying branch failed or if a branch has no write permission. -+ -+This unlinking policy is known as "delete all" and it has the benefit of -+overall reducing the number of inodes used by duplicate files, and further -+reducing the total number of inodes consumed by whiteouts. The cost is of -+extra processing, but testing shows this extra processing is well worth the -+savings. -+ -+ -+Copyup: -+======= -+ -+When a change is made to the contents of a file's data or meta-data, they -+have to be stored somewhere. The best way is to create a copy of the -+original file on a branch that is writable, and then redirect the write -+though to this copy. The copy must be made on a higher priority branch so -+that lookup and readdir return this newer "version" of the file rather than -+the original (see duplicate elimination). -+ -+An entire unionfs mount can be read-only or read-write. If it's read-only, -+then none of the branches will be written to, even if some of the branches -+are physically writeable. If the unionfs mount is read-write, then the -+leftmost (highest priority) branch must be writeable (for copyup to take -+place); the remaining branches can be any mix of read-write and read-only. -+ -+In a writeable mount, unionfs will create new files/dir in the leftmost -+branch. If one tries to modify a file in a read-only branch/media, unionfs -+will copyup the file to the leftmost branch and modify it there. If you try -+to modify a file from a writeable branch which is not the leftmost branch, -+then unionfs will modify it in that branch; this is useful if you, say, -+unify differnet packages (e.g., apache, sendmail, ftpd, etc.) and you want -+changes to specific package files to remain logically in the directory where -+they came from. -+ -+Cache Coherency: -+================ -+ -+Unionfs users often want to be able to modify files and directories directly -+on the lower branches, and have those changes be visible at the Unionfs -+level. This means that data (e.g., pages) and meta-data (dentries, inodes, -+open files, etc.) have to be synchronized between the upper and lower -+layers. In other words, the newest changes from a layer below have to be -+propagated to the Unionfs layer above. If the two layers are not in sync, a -+cache incoherency ensues, which could lead to application failures and even -+oopses. The Linux kernel, however, has a rather limited set of mechanisms -+to ensure this inter-layer cache coherency---so Unionfs has to do most of -+the hard work on its own. -+ -+Maintaining Invariants: -+ -+The way Unionfs ensures cache coherency is as follows. At each entry point -+to a Unionfs file system method, we call a utility function to validate the -+primary objects of this method. Generally, we call unionfs_file_revalidate -+on open files, and __unionfs_d_revalidate_chain on dentries (which also -+validates inodes). These utility functions check to see whether the upper -+Unionfs object is in sync with any of the lower objects that it represents. -+The checks we perform include whether the Unionfs superblock has a newer -+generation number, or if any of the lower objects mtime's or ctime's are -+newer. (Note: generation numbers change when branch-management commands are -+issued, so in a way, maintaining cache coherency is also very important for -+branch-management.) If indeed we determine that any Unionfs object is no -+longer in sync with its lower counterparts, then we rebuild that object -+similarly to how we do so for branch-management. -+ -+While rebuilding Unionfs's objects, we also purge any page mappings and -+truncate inode pages (see fs/unionfs/dentry.c:purge_inode_data). This is to -+ensure that Unionfs will re-get the newer data from the lower branches. We -+perform this purging only if the Unionfs operation in question is a reading -+operation; if Unionfs is performing a data writing operation (e.g., ->write, -+->commit_write, etc.) then we do NOT flush the lower mappings/pages: this is -+because (1) a self-deadlock could occur and (2) the upper Unionfs pages are -+considered more authoritative anyway, as they are newer and will overwrite -+any lower pages. -+ -+Unionfs maintains the following important invariant regarding mtime's, -+ctime's, and atime's: the upper inode object's times are the max() of all of -+the lower ones. For non-directory objects, there's only one object below, -+so the mapping is simple; for directory objects, there could me multiple -+lower objects and we have to sync up with the newest one of all the lower -+ones. This invariant is important to maintain, especially for directories -+(besides, we need this to be POSIX compliant). A union could comprise -+multiple writable branches, each of which could change. If we don't reflect -+the newest possible mtime/ctime, some applications could fail. For example, -+NFSv2/v3 exports check for newer directory mtimes on the server to determine -+if the client-side attribute cache should be purged. -+ -+To maintain these important invariants, of course, Unionfs carefully -+synchronizes upper and lower times in various places. For example, if we -+copy-up a file to a top-level branch, the parent directory where the file -+was copied up to will now have a new mtime: so after a successful copy-up, -+we sync up with the new top-level branch's parent directory mtime. -+ -+Implementation: -+ -+This cache-coherency implementation is efficient because it defers any -+synchronizing between the upper and lower layers until absolutely needed. -+Consider the example a common situation where users perform a lot of lower -+changes, such as untarring a whole package. While these take place, -+typically the user doesn't access the files via Unionfs; only after the -+lower changes are done, does the user try to access the lower files. With -+our cache-coherency implementation, the entirety of the changes to the lower -+branches will not result in a single CPU cycle spent at the Unionfs level -+until the user invokes a system call that goes through Unionfs. -+ -+We have considered two alternate cache-coherency designs. (1) Using the -+dentry/inode notify functionality to register interest in finding out about -+any lower changes. This is a somewhat limited and also a heavy-handed -+approach which could result in many notifications to the Unionfs layer upon -+each small change at the lower layer (imagine a file being modified multiple -+times in rapid succession). (2) Rewriting the VFS to support explicit -+callbacks from lower objects to upper objects. We began exploring such an -+implementation, but found it to be very complicated--it would have resulted -+in massive VFS/MM changes which are unlikely to be accepted by the LKML -+community. We therefore believe that our current cache-coherency design and -+implementation represent the best approach at this time. -+ -+Limitations: -+ -+Our implementation works in that as long as a user process will have caused -+Unionfs to be called, directly or indirectly, even to just do -+->d_revalidate; then we will have purged the current Unionfs data and the -+process will see the new data. For example, a process that continually -+re-reads the same file's data will see the NEW data as soon as the lower -+file had changed, upon the next read(2) syscall (even if the file is still -+open!) However, this doesn't work when the process re-reads the open file's -+data via mmap(2) (unless the user unmaps/closes the file and remaps/reopens -+it). Once we respond to ->readpage(s), then the kernel maps the page into -+the process's address space and there doesn't appear to be a way to force -+the kernel to invalidate those pages/mappings, and force the process to -+re-issue ->readpage. If there's a way to invalidate active mappings and -+force a ->readpage, let us know please (invalidate_inode_pages2 doesn't do -+the trick). -+ -+Our current Unionfs code has to perform many file-revalidation calls. It -+would be really nice if the VFS would export an optional file system hook -+->file_revalidate (similarly to dentry->d_revalidate) that will be called -+before each VFS op that has a "struct file" in it. -+ -+Certain file systems have micro-second granularity (or better) for inode -+times, and asynchronous actions could cause those times to change with some -+small delay. In such cases, Unionfs may see a changed inode time that only -+differs by a tiny fraction of a second: such a change may be a false -+positive indication that the lower object has changed, whereas if unionfs -+waits a little longer, that false indication will not be seen. (These false -+positives are harmless, because they would at most cause unionfs to -+re-validate an object that may need no revalidation, and print a debugging -+message that clutters the console/logs.) Therefore, to minimize the chances -+of these situations, we delay the detection of changed times by a small -+factor of a few seconds, called UNIONFS_MIN_CC_TIME (which defaults to 3 -+seconds, as does NFS). This means that we will detect the change, only a -+couple of seconds later, if indeed the time change persists in the lower -+file object. This delayed detection has an added performance benefit: we -+reduce the number of times that unionfs has to revalidate objects, in case -+there's a lot of concurrent activity on both the upper and lower objects, -+for the same file(s). Lastly, this delayed time attribute detection is -+similar to how NFS clients operate (e.g., acregmin). -+ -+Finally, there is no way currently in Linux to prevent lower directories -+from being moved around (i.e., topology changes); there's no way to prevent -+modifications to directory sub-trees of whole file systems which are mounted -+read-write. It is therefore possible for in-flight operations in unionfs to -+take place, while a lower directory is being moved around. Therefore, if -+you try to, say, create a new file in a directory through unionfs, while the -+directory is being moved around directly, then the new file may get created -+in the new location where that directory was moved to. This is a somewhat -+similar behaviour in NFS: an NFS client could be creating a new file while -+th NFS server is moving th directory around; the file will get successfully -+created in the new location. (The one exception in unionfs is that if the -+branch is marked read-only by unionfs, then a copyup will take place.) -+ -+For more information, see <http://unionfs.filesystems.org/>. -diff --git a/Documentation/filesystems/unionfs/issues.txt b/Documentation/filesystems/unionfs/issues.txt -new file mode 100644 -index 0000000..f4b7e7e ---- /dev/null -+++ b/Documentation/filesystems/unionfs/issues.txt -@@ -0,0 +1,28 @@ -+KNOWN Unionfs 2.x ISSUES: -+========================= -+ -+1. Unionfs should not use lookup_one_len() on the underlying f/s as it -+ confuses NFSv4. Currently, unionfs_lookup() passes lookup intents to the -+ lower file-system, this eliminates part of the problem. The remaining -+ calls to lookup_one_len may need to be changed to pass an intent. We are -+ currently introducing VFS changes to fs/namei.c's do_path_lookup() to -+ allow proper file lookup and opening in stackable file systems. -+ -+2. Lockdep (a debugging feature) isn't aware of stacking, and so it -+ incorrectly complains about locking problems. The problem boils down to -+ this: Lockdep considers all objects of a certain type to be in the same -+ class, for example, all inodes. Lockdep doesn't like to see a lock held -+ on two inodes within the same task, and warns that it could lead to a -+ deadlock. However, stackable file systems do precisely that: they lock -+ an upper object, and then a lower object, in a strict order to avoid -+ locking problems; in addition, Unionfs, as a fan-out file system, may -+ have to lock several lower inodes. We are currently looking into Lockdep -+ to see how to make it aware of stackable file systems. For now, we -+ temporarily disable lockdep when calling vfs methods on lower objects, -+ but only for those places where lockdep complained. While this solution -+ may seem unclean, it is not without precedent: other places in the kernel -+ also do similar temporary disabling, of course after carefully having -+ checked that it is the right thing to do. Anyway, you get any warnings -+ from Lockdep, please report them to the Unionfs maintainers. -+ -+For more information, see <http://unionfs.filesystems.org/>. -diff --git a/Documentation/filesystems/unionfs/rename.txt b/Documentation/filesystems/unionfs/rename.txt -new file mode 100644 -index 0000000..e20bb82 ---- /dev/null -+++ b/Documentation/filesystems/unionfs/rename.txt -@@ -0,0 +1,31 @@ -+Rename is a complex beast. The following table shows which rename(2) operations -+should succeed and which should fail. -+ -+o: success -+E: error (either unionfs or vfs) -+X: EXDEV -+ -+none = file does not exist -+file = file is a file -+dir = file is a empty directory -+child= file is a non-empty directory -+wh = file is a directory containing only whiteouts; this makes it logically -+ empty -+ -+ none file dir child wh -+file o o E E E -+dir o E o E o -+child X E X E X -+wh o E o E o -+ -+ -+Renaming directories: -+===================== -+ -+Whenever a empty (either physically or logically) directory is being renamed, -+the following sequence of events should take place: -+ -+1) Remove whiteouts from both source and destination directory -+2) Rename source to destination -+3) Make destination opaque to prevent anything under it from showing up -+ -diff --git a/Documentation/filesystems/unionfs/usage.txt b/Documentation/filesystems/unionfs/usage.txt -new file mode 100644 -index 0000000..1adde69 ---- /dev/null -+++ b/Documentation/filesystems/unionfs/usage.txt -@@ -0,0 +1,134 @@ -+Unionfs is a stackable unification file system, which can appear to merge -+the contents of several directories (branches), while keeping their physical -+content separate. Unionfs is useful for unified source tree management, -+merged contents of split CD-ROM, merged separate software package -+directories, data grids, and more. Unionfs allows any mix of read-only and -+read-write branches, as well as insertion and deletion of branches anywhere -+in the fan-out. To maintain Unix semantics, Unionfs handles elimination of -+duplicates, partial-error conditions, and more. -+ -+GENERAL SYNTAX -+============== -+ -+# mount -t unionfs -o <OPTIONS>,<BRANCH-OPTIONS> none MOUNTPOINT -+ -+OPTIONS can be any legal combination of: -+ -+- ro # mount file system read-only -+- rw # mount file system read-write -+- remount # remount the file system (see Branch Management below) -+- incgen # increment generation no. (see Cache Consistency below) -+ -+BRANCH-OPTIONS can be either (1) a list of branches given to the "dirs=" -+option, or (2) a list of individual branch manipulation commands, combined -+with the "remount" option, and is further described in the "Branch -+Management" section below. -+ -+The syntax for the "dirs=" mount option is: -+ -+ dirs=branch[=ro|=rw][:...] -+ -+The "dirs=" option takes a colon-delimited list of directories to compose -+the union, with an optional branch mode for each of those directories. -+Directories that come earlier (specified first, on the left) in the list -+have a higher precedence than those which come later. Additionally, -+read-only or read-write permissions of the branch can be specified by -+appending =ro or =rw (default) to each directory. See the Copyup section in -+concepts.txt, for a description of Unionfs's behavior when mixing read-only -+and read-write branches and mounts. -+ -+Syntax: -+ -+ dirs=/branch1[=ro|=rw]:/branch2[=ro|=rw]:...:/branchN[=ro|=rw] -+ -+Example: -+ -+ dirs=/writable_branch=rw:/read-only_branch=ro -+ -+ -+BRANCH MANAGEMENT -+================= -+ -+Once you mount your union for the first time, using the "dirs=" option, you -+can then change the union's overall mode or reconfigure the branches, using -+the remount option, as follows. -+ -+To downgrade a union from read-write to read-only: -+ -+# mount -t unionfs -o remount,ro none MOUNTPOINT -+ -+To upgrade a union from read-only to read-write: -+ -+# mount -t unionfs -o remount,rw none MOUNTPOINT -+ -+To delete a branch /foo, regardless where it is in the current union: -+ -+# mount -t unionfs -o remount,del=/foo none MOUNTPOINT -+ -+To insert (add) a branch /foo before /bar: -+ -+# mount -t unionfs -o remount,add=/bar:/foo none MOUNTPOINT -+ -+To insert (add) a branch /foo (with the "rw" mode flag) before /bar: -+ -+# mount -t unionfs -o remount,add=/bar:/foo=rw none MOUNTPOINT -+ -+To insert (add) a branch /foo (in "rw" mode) at the very beginning (i.e., a -+new highest-priority branch), you can use the above syntax, or use a short -+hand version as follows: -+ -+# mount -t unionfs -o remount,add=/foo none MOUNTPOINT -+ -+To append a branch to the very end (new lowest-priority branch): -+ -+# mount -t unionfs -o remount,add=:/foo none MOUNTPOINT -+ -+To append a branch to the very end (new lowest-priority branch), in -+read-only mode: -+ -+# mount -t unionfs -o remount,add=:/foo=ro none MOUNTPOINT -+ -+Finally, to change the mode of one existing branch, say /foo, from read-only -+to read-write, and change /bar from read-write to read-only: -+ -+# mount -t unionfs -o remount,mode=/foo=rw,mode=/bar=ro none MOUNTPOINT -+ -+Note: in Unionfs 2.x, you cannot set the leftmost branch to readonly because -+then Unionfs won't have any writable place for copyups to take place. -+Moreover, the VFS can get confused when it tries to modify something in a -+file system mounted read-write, but isn't permitted to write to it. -+Instead, you should set the whole union as readonly, as described above. -+If, however, you must set the leftmost branch as readonly, perhaps so you -+can get a snapshot of it at a point in time, then you should insert a new -+writable top-level branch, and mark the one you want as readonly. This can -+be accomplished as follows, assuming that /foo is your current leftmost -+branch: -+ -+# mount -t tmpfs -o size=NNN /new -+# mount -t unionfs -o remount,add=/new,mode=/foo=ro none MOUNTPOINT -+<do what you want safely in /foo> -+# mount -t unionfs -o remount,del=/new,mode=/foo=rw none MOUNTPOINT -+<check if there's anything in /new you want to preserve> -+# umount /new -+ -+CACHE CONSISTENCY -+================= -+ -+If you modify any file on any of the lower branches directly, while there is -+a Unionfs 2.x mounted above any of those branches, you should tell Unionfs -+to purge its caches and re-get the objects. To do that, you have to -+increment the generation number of the superblock using the following -+command: -+ -+# mount -t unionfs -o remount,incgen none MOUNTPOINT -+ -+Note that the older way of incrementing the generation number using an -+ioctl, is no longer supported in Unionfs 2.0 and newer. Ioctls in general -+are not encouraged. Plus, an ioctl is per-file concept, whereas the -+generation number is a per-file-system concept. Worse, such an ioctl -+requires an open file, which then has to be invalidated by the very nature -+of the generation number increase (read: the old generation increase ioctl -+was pretty racy). -+ -+ -+For more information, see <http://unionfs.filesystems.org/>. -diff --git a/MAINTAINERS b/MAINTAINERS -index 69f19f1..fd88a30 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -6319,6 +6319,14 @@ F: Documentation/cdrom/ - F: drivers/cdrom/cdrom.c - F: include/linux/cdrom.h - -+UNIONFS -+P: Erez Zadok -+M: ezk@cs.sunysb.edu -+L: unionfs@filesystems.org -+W: http://unionfs.filesystems.org/ -+T: git git.kernel.org/pub/scm/linux/kernel/git/ezk/unionfs.git -+S: Maintained -+ - UNSORTED BLOCK IMAGES (UBI) - M: Artem Bityutskiy <dedekind1@gmail.com> - W: http://www.linux-mtd.infradead.org/ -diff --git a/fs/Kconfig b/fs/Kconfig -index f3aa9b0..0e6182c 100644 ---- a/fs/Kconfig -+++ b/fs/Kconfig -@@ -170,6 +170,7 @@ if MISC_FILESYSTEMS - source "fs/adfs/Kconfig" - source "fs/affs/Kconfig" - source "fs/ecryptfs/Kconfig" -+source "fs/unionfs/Kconfig" - source "fs/hfs/Kconfig" - source "fs/hfsplus/Kconfig" - source "fs/befs/Kconfig" -diff --git a/fs/Makefile b/fs/Makefile -index fb68c2b..8ca9290 100644 ---- a/fs/Makefile -+++ b/fs/Makefile -@@ -83,6 +83,7 @@ obj-$(CONFIG_ISO9660_FS) += isofs/ - obj-$(CONFIG_HFSPLUS_FS) += hfsplus/ # Before hfs to find wrapped HFS+ - obj-$(CONFIG_HFS_FS) += hfs/ - obj-$(CONFIG_ECRYPT_FS) += ecryptfs/ -+obj-$(CONFIG_UNION_FS) += unionfs/ - obj-$(CONFIG_VXFS_FS) += freevxfs/ - obj-$(CONFIG_NFS_FS) += nfs/ - obj-$(CONFIG_EXPORTFS) += exportfs/ -diff --git a/fs/namei.c b/fs/namei.c -index e3c4f11..d9f99a4 100644 ---- a/fs/namei.c -+++ b/fs/namei.c -@@ -578,6 +578,7 @@ void release_open_intent(struct nameidata *nd) - fput(file); - } - } -+EXPORT_SYMBOL_GPL(release_open_intent); - - static inline int d_revalidate(struct dentry *dentry, struct nameidata *nd) - { -@@ -1819,6 +1820,42 @@ struct dentry *lookup_one_len(const char *name, struct dentry *base, int len) - return __lookup_hash(&this, base, NULL); - } - -+/* pass nameidata from caller (useful for NFS) */ -+struct dentry *lookup_one_len_nd(const char *name, struct dentry *base, -+ int len, struct nameidata *nd) -+{ -+ struct qstr this; -+ unsigned long hash; -+ unsigned int c; -+ -+ WARN_ON_ONCE(!mutex_is_locked(&base->d_inode->i_mutex)); -+ -+ this.name = name; -+ this.len = len; -+ if (!len) -+ return ERR_PTR(-EACCES); -+ -+ hash = init_name_hash(); -+ while (len--) { -+ c = *(const unsigned char *)name++; -+ if (c == '/' || c == '\0') -+ return ERR_PTR(-EACCES); -+ hash = partial_name_hash(c, hash); -+ } -+ this.hash = end_name_hash(hash); -+ /* -+ * See if the low-level filesystem might want -+ * to use its own hash.. -+ */ -+ if (base->d_flags & DCACHE_OP_HASH) { -+ int err = base->d_op->d_hash(base, base->d_inode, &this); -+ if (err < 0) -+ return ERR_PTR(err); -+ } -+ -+ return __lookup_hash(&this, base, nd); -+} -+ - int user_path_at(int dfd, const char __user *name, unsigned flags, - struct path *path) - { -@@ -3422,6 +3459,7 @@ EXPORT_SYMBOL(get_write_access); /* binfmt_aout */ - EXPORT_SYMBOL(getname); - EXPORT_SYMBOL(lock_rename); - EXPORT_SYMBOL(lookup_one_len); -+EXPORT_SYMBOL(lookup_one_len_nd); - EXPORT_SYMBOL(page_follow_link_light); - EXPORT_SYMBOL(page_put_link); - EXPORT_SYMBOL(page_readlink); -diff --git a/fs/splice.c b/fs/splice.c -index 50a5d97..a3af841 100644 ---- a/fs/splice.c -+++ b/fs/splice.c -@@ -1081,8 +1081,8 @@ EXPORT_SYMBOL(generic_splice_sendpage); - /* - * Attempt to initiate a splice from pipe to file. - */ --static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, -- loff_t *ppos, size_t len, unsigned int flags) -+long vfs_splice_from(struct pipe_inode_info *pipe, struct file *out, -+ loff_t *ppos, size_t len, unsigned int flags) - { - ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, - loff_t *, size_t, unsigned int); -@@ -1105,13 +1105,14 @@ static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, - - return splice_write(pipe, out, ppos, len, flags); - } -+EXPORT_SYMBOL_GPL(vfs_splice_from); - - /* - * Attempt to initiate a splice from a file to a pipe. - */ --static long do_splice_to(struct file *in, loff_t *ppos, -- struct pipe_inode_info *pipe, size_t len, -- unsigned int flags) -+long vfs_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags) - { - ssize_t (*splice_read)(struct file *, loff_t *, - struct pipe_inode_info *, size_t, unsigned int); -@@ -1131,6 +1132,7 @@ static long do_splice_to(struct file *in, loff_t *ppos, - - return splice_read(in, ppos, pipe, len, flags); - } -+EXPORT_SYMBOL_GPL(vfs_splice_to); - - /** - * splice_direct_to_actor - splices data directly between two non-pipes -@@ -1200,7 +1202,7 @@ ssize_t splice_direct_to_actor(struct file *in, struct splice_desc *sd, - size_t read_len; - loff_t pos = sd->pos, prev_pos = pos; - -- ret = do_splice_to(in, &pos, pipe, len, flags); -+ ret = vfs_splice_to(in, &pos, pipe, len, flags); - if (unlikely(ret <= 0)) - goto out_release; - -@@ -1259,8 +1261,8 @@ static int direct_splice_actor(struct pipe_inode_info *pipe, - { - struct file *file = sd->u.file; - -- return do_splice_from(pipe, file, &file->f_pos, sd->total_len, -- sd->flags); -+ return vfs_splice_from(pipe, file, &file->f_pos, sd->total_len, -+ sd->flags); - } - - /** -@@ -1345,7 +1347,7 @@ static long do_splice(struct file *in, loff_t __user *off_in, - } else - off = &out->f_pos; - -- ret = do_splice_from(ipipe, out, off, len, flags); -+ ret = vfs_splice_from(ipipe, out, off, len, flags); - - if (off_out && copy_to_user(off_out, off, sizeof(loff_t))) - ret = -EFAULT; -@@ -1365,7 +1367,7 @@ static long do_splice(struct file *in, loff_t __user *off_in, - } else - off = &in->f_pos; - -- ret = do_splice_to(in, off, opipe, len, flags); -+ ret = vfs_splice_to(in, off, opipe, len, flags); - - if (off_in && copy_to_user(off_in, off, sizeof(loff_t))) - ret = -EFAULT; -diff --git a/fs/stack.c b/fs/stack.c -index 4a6f7f4..7eeef12 100644 ---- a/fs/stack.c -+++ b/fs/stack.c -@@ -1,8 +1,20 @@ -+/* -+ * Copyright (c) 2006-2009 Erez Zadok -+ * Copyright (c) 2006-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2006-2009 Stony Brook University -+ * Copyright (c) 2006-2009 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ - #include <linux/module.h> - #include <linux/fs.h> - #include <linux/fs_stack.h> - --/* does _NOT_ require i_mutex to be held. -+/* -+ * does _NOT_ require i_mutex to be held. - * - * This function cannot be inlined since i_size_{read,write} is rather - * heavy-weight on 32-bit systems -diff --git a/fs/unionfs/Kconfig b/fs/unionfs/Kconfig -new file mode 100644 -index 0000000..f3c1ac4 ---- /dev/null -+++ b/fs/unionfs/Kconfig -@@ -0,0 +1,24 @@ -+config UNION_FS -+ tristate "Union file system (EXPERIMENTAL)" -+ depends on EXPERIMENTAL -+ help -+ Unionfs is a stackable unification file system, which appears to -+ merge the contents of several directories (branches), while keeping -+ their physical content separate. -+ -+ See <http://unionfs.filesystems.org> for details -+ -+config UNION_FS_XATTR -+ bool "Unionfs extended attributes" -+ depends on UNION_FS -+ help -+ Extended attributes are name:value pairs associated with inodes by -+ the kernel or by users (see the attr(5) manual page). -+ -+ If unsure, say N. -+ -+config UNION_FS_DEBUG -+ bool "Debug Unionfs" -+ depends on UNION_FS -+ help -+ If you say Y here, you can turn on debugging output from Unionfs. -diff --git a/fs/unionfs/Makefile b/fs/unionfs/Makefile -new file mode 100644 -index 0000000..3e31847 ---- /dev/null -+++ b/fs/unionfs/Makefile -@@ -0,0 +1,17 @@ -+UNIONFS_VERSION="2.5.9 (for 2.6.39-rc5)" -+ -+EXTRA_CFLAGS += -DUNIONFS_VERSION=\"$(UNIONFS_VERSION)\" -+ -+obj-$(CONFIG_UNION_FS) += unionfs.o -+ -+unionfs-y := subr.o dentry.o file.o inode.o main.o super.o \ -+ rdstate.o copyup.o dirhelper.o rename.o unlink.o \ -+ lookup.o commonfops.o dirfops.o sioq.o mmap.o whiteout.o -+ -+unionfs-$(CONFIG_UNION_FS_XATTR) += xattr.o -+ -+unionfs-$(CONFIG_UNION_FS_DEBUG) += debug.o -+ -+ifeq ($(CONFIG_UNION_FS_DEBUG),y) -+EXTRA_CFLAGS += -DDEBUG -+endif -diff --git a/fs/unionfs/commonfops.c b/fs/unionfs/commonfops.c -new file mode 100644 -index 0000000..9f63b1c ---- /dev/null -+++ b/fs/unionfs/commonfops.c -@@ -0,0 +1,898 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * 1) Copyup the file -+ * 2) Rename the file to '.unionfs<original inode#><counter>' - obviously -+ * stolen from NFS's silly rename -+ */ -+static int copyup_deleted_file(struct file *file, struct dentry *dentry, -+ struct dentry *parent, int bstart, int bindex) -+{ -+ static unsigned int counter; -+ const int i_inosize = sizeof(dentry->d_inode->i_ino) * 2; -+ const int countersize = sizeof(counter) * 2; -+ const int nlen = sizeof(".unionfs") + i_inosize + countersize - 1; -+ char name[nlen + 1]; -+ int err; -+ struct dentry *tmp_dentry = NULL; -+ struct dentry *lower_dentry; -+ struct dentry *lower_dir_dentry = NULL; -+ -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bstart); -+ -+ sprintf(name, ".unionfs%*.*lx", -+ i_inosize, i_inosize, lower_dentry->d_inode->i_ino); -+ -+ /* -+ * Loop, looking for an unused temp name to copyup to. -+ * -+ * It's somewhat silly that we look for a free temp tmp name in the -+ * source branch (bstart) instead of the dest branch (bindex), where -+ * the final name will be created. We _will_ catch it if somehow -+ * the name exists in the dest branch, but it'd be nice to catch it -+ * sooner than later. -+ */ -+retry: -+ tmp_dentry = NULL; -+ do { -+ char *suffix = name + nlen - countersize; -+ -+ dput(tmp_dentry); -+ counter++; -+ sprintf(suffix, "%*.*x", countersize, countersize, counter); -+ -+ pr_debug("unionfs: trying to rename %s to %s\n", -+ dentry->d_name.name, name); -+ -+ tmp_dentry = lookup_lck_len(name, lower_dentry->d_parent, -+ nlen); -+ if (IS_ERR(tmp_dentry)) { -+ err = PTR_ERR(tmp_dentry); -+ goto out; -+ } -+ } while (tmp_dentry->d_inode != NULL); /* need negative dentry */ -+ dput(tmp_dentry); -+ -+ err = copyup_named_file(parent->d_inode, file, name, bstart, bindex, -+ i_size_read(file->f_path.dentry->d_inode)); -+ if (err) { -+ if (unlikely(err == -EEXIST)) -+ goto retry; -+ goto out; -+ } -+ -+ /* bring it to the same state as an unlinked file */ -+ lower_dentry = unionfs_lower_dentry_idx(dentry, dbstart(dentry)); -+ if (!unionfs_lower_inode_idx(dentry->d_inode, bindex)) { -+ atomic_inc(&lower_dentry->d_inode->i_count); -+ unionfs_set_lower_inode_idx(dentry->d_inode, bindex, -+ lower_dentry->d_inode); -+ } -+ lower_dir_dentry = lock_parent(lower_dentry); -+ err = vfs_unlink(lower_dir_dentry->d_inode, lower_dentry); -+ unlock_dir(lower_dir_dentry); -+ -+out: -+ if (!err) -+ unionfs_check_dentry(dentry); -+ return err; -+} -+ -+/* -+ * put all references held by upper struct file and free lower file pointer -+ * array -+ */ -+static void cleanup_file(struct file *file) -+{ -+ int bindex, bstart, bend; -+ struct file **lower_files; -+ struct file *lower_file; -+ struct super_block *sb = file->f_path.dentry->d_sb; -+ -+ lower_files = UNIONFS_F(file)->lower_files; -+ bstart = fbstart(file); -+ bend = fbend(file); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ int i; /* holds (possibly) updated branch index */ -+ int old_bid; -+ -+ lower_file = unionfs_lower_file_idx(file, bindex); -+ if (!lower_file) -+ continue; -+ -+ /* -+ * Find new index of matching branch with an open -+ * file, since branches could have been added or -+ * deleted causing the one with open files to shift. -+ */ -+ old_bid = UNIONFS_F(file)->saved_branch_ids[bindex]; -+ i = branch_id_to_idx(sb, old_bid); -+ if (unlikely(i < 0)) { -+ printk(KERN_ERR "unionfs: no superblock for " -+ "file %p\n", file); -+ continue; -+ } -+ -+ /* decrement count of open files */ -+ branchput(sb, i); -+ /* -+ * fput will perform an mntput for us on the correct branch. -+ * Although we're using the file's old branch configuration, -+ * bindex, which is the old index, correctly points to the -+ * right branch in the file's branch list. In other words, -+ * we're going to mntput the correct branch even if branches -+ * have been added/removed. -+ */ -+ fput(lower_file); -+ UNIONFS_F(file)->lower_files[bindex] = NULL; -+ UNIONFS_F(file)->saved_branch_ids[bindex] = -1; -+ } -+ -+ UNIONFS_F(file)->lower_files = NULL; -+ kfree(lower_files); -+ kfree(UNIONFS_F(file)->saved_branch_ids); -+ /* set to NULL because caller needs to know if to kfree on error */ -+ UNIONFS_F(file)->saved_branch_ids = NULL; -+} -+ -+/* open all lower files for a given file */ -+static int open_all_files(struct file *file) -+{ -+ int bindex, bstart, bend, err = 0; -+ struct file *lower_file; -+ struct dentry *lower_dentry; -+ struct dentry *dentry = file->f_path.dentry; -+ struct super_block *sb = dentry->d_sb; -+ -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) -+ continue; -+ -+ dget(lower_dentry); -+ unionfs_mntget(dentry, bindex); -+ branchget(sb, bindex); -+ -+ lower_file = -+ dentry_open(lower_dentry, -+ unionfs_lower_mnt_idx(dentry, bindex), -+ file->f_flags, current_cred()); -+ if (IS_ERR(lower_file)) { -+ branchput(sb, bindex); -+ err = PTR_ERR(lower_file); -+ goto out; -+ } else { -+ unionfs_set_lower_file_idx(file, bindex, lower_file); -+ } -+ } -+out: -+ return err; -+} -+ -+/* open the highest priority file for a given upper file */ -+static int open_highest_file(struct file *file, bool willwrite) -+{ -+ int bindex, bstart, bend, err = 0; -+ struct file *lower_file; -+ struct dentry *lower_dentry; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent = dget_parent(dentry); -+ struct inode *parent_inode = parent->d_inode; -+ struct super_block *sb = dentry->d_sb; -+ -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ if (willwrite && IS_WRITE_FLAG(file->f_flags) && is_robranch(dentry)) { -+ for (bindex = bstart - 1; bindex >= 0; bindex--) { -+ err = copyup_file(parent_inode, file, bstart, bindex, -+ i_size_read(dentry->d_inode)); -+ if (!err) -+ break; -+ } -+ atomic_set(&UNIONFS_F(file)->generation, -+ atomic_read(&UNIONFS_I(dentry->d_inode)-> -+ generation)); -+ goto out; -+ } -+ -+ dget(lower_dentry); -+ unionfs_mntget(dentry, bstart); -+ lower_file = dentry_open(lower_dentry, -+ unionfs_lower_mnt_idx(dentry, bstart), -+ file->f_flags, current_cred()); -+ if (IS_ERR(lower_file)) { -+ err = PTR_ERR(lower_file); -+ goto out; -+ } -+ branchget(sb, bstart); -+ unionfs_set_lower_file(file, lower_file); -+ /* Fix up the position. */ -+ lower_file->f_pos = file->f_pos; -+ -+ memcpy(&lower_file->f_ra, &file->f_ra, sizeof(struct file_ra_state)); -+out: -+ dput(parent); -+ return err; -+} -+ -+/* perform a delayed copyup of a read-write file on a read-only branch */ -+static int do_delayed_copyup(struct file *file, struct dentry *parent) -+{ -+ int bindex, bstart, bend, err = 0; -+ struct dentry *dentry = file->f_path.dentry; -+ struct inode *parent_inode = parent->d_inode; -+ -+ bstart = fbstart(file); -+ bend = fbend(file); -+ -+ BUG_ON(!S_ISREG(dentry->d_inode->i_mode)); -+ -+ unionfs_check_file(file); -+ for (bindex = bstart - 1; bindex >= 0; bindex--) { -+ if (!d_deleted(dentry)) -+ err = copyup_file(parent_inode, file, bstart, -+ bindex, -+ i_size_read(dentry->d_inode)); -+ else -+ err = copyup_deleted_file(file, dentry, parent, -+ bstart, bindex); -+ /* if succeeded, set lower open-file flags and break */ -+ if (!err) { -+ struct file *lower_file; -+ lower_file = unionfs_lower_file_idx(file, bindex); -+ lower_file->f_flags = file->f_flags; -+ break; -+ } -+ } -+ if (err || (bstart <= fbstart(file))) -+ goto out; -+ bend = fbend(file); -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ if (unionfs_lower_file_idx(file, bindex)) { -+ branchput(dentry->d_sb, bindex); -+ fput(unionfs_lower_file_idx(file, bindex)); -+ unionfs_set_lower_file_idx(file, bindex, NULL); -+ } -+ } -+ path_put_lowers(dentry, bstart, bend, false); -+ iput_lowers(dentry->d_inode, bstart, bend, false); -+ /* for reg file, we only open it "once" */ -+ fbend(file) = fbstart(file); -+ dbend(dentry) = dbstart(dentry); -+ ibend(dentry->d_inode) = ibstart(dentry->d_inode); -+ -+out: -+ unionfs_check_file(file); -+ return err; -+} -+ -+/* -+ * Helper function for unionfs_file_revalidate/locked. -+ * Expects dentry/parent to be locked already, and revalidated. -+ */ -+static int __unionfs_file_revalidate(struct file *file, struct dentry *dentry, -+ struct dentry *parent, -+ struct super_block *sb, int sbgen, -+ int dgen, bool willwrite) -+{ -+ int fgen; -+ int bstart, bend, orig_brid; -+ int size; -+ int err = 0; -+ -+ fgen = atomic_read(&UNIONFS_F(file)->generation); -+ -+ /* -+ * There are two cases we are interested in. The first is if the -+ * generation is lower than the super-block. The second is if -+ * someone has copied up this file from underneath us, we also need -+ * to refresh things. -+ */ -+ if ((d_deleted(dentry) && dbstart(dentry) >= fbstart(file)) || -+ (sbgen <= fgen && -+ dbstart(dentry) == fbstart(file) && -+ unionfs_lower_file(file))) -+ goto out_may_copyup; -+ -+ /* save orig branch ID */ -+ orig_brid = UNIONFS_F(file)->saved_branch_ids[fbstart(file)]; -+ -+ /* First we throw out the existing files. */ -+ cleanup_file(file); -+ -+ /* Now we reopen the file(s) as in unionfs_open. */ -+ bstart = fbstart(file) = dbstart(dentry); -+ bend = fbend(file) = dbend(dentry); -+ -+ size = sizeof(struct file *) * sbmax(sb); -+ UNIONFS_F(file)->lower_files = kzalloc(size, GFP_KERNEL); -+ if (unlikely(!UNIONFS_F(file)->lower_files)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ size = sizeof(int) * sbmax(sb); -+ UNIONFS_F(file)->saved_branch_ids = kzalloc(size, GFP_KERNEL); -+ if (unlikely(!UNIONFS_F(file)->saved_branch_ids)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ -+ if (S_ISDIR(dentry->d_inode->i_mode)) { -+ /* We need to open all the files. */ -+ err = open_all_files(file); -+ if (err) -+ goto out; -+ } else { -+ int new_brid; -+ /* We only open the highest priority branch. */ -+ err = open_highest_file(file, willwrite); -+ if (err) -+ goto out; -+ new_brid = UNIONFS_F(file)->saved_branch_ids[fbstart(file)]; -+ if (unlikely(new_brid != orig_brid && sbgen > fgen)) { -+ /* -+ * If we re-opened the file on a different branch -+ * than the original one, and this was due to a new -+ * branch inserted, then update the mnt counts of -+ * the old and new branches accordingly. -+ */ -+ unionfs_mntget(dentry, bstart); -+ unionfs_mntput(sb->s_root, -+ branch_id_to_idx(sb, orig_brid)); -+ } -+ /* regular files have only one open lower file */ -+ fbend(file) = fbstart(file); -+ } -+ atomic_set(&UNIONFS_F(file)->generation, -+ atomic_read(&UNIONFS_I(dentry->d_inode)->generation)); -+ -+out_may_copyup: -+ /* Copyup on the first write to a file on a readonly branch. */ -+ if (willwrite && IS_WRITE_FLAG(file->f_flags) && -+ !IS_WRITE_FLAG(unionfs_lower_file(file)->f_flags) && -+ is_robranch(dentry)) { -+ pr_debug("unionfs: do delay copyup of \"%s\"\n", -+ dentry->d_name.name); -+ err = do_delayed_copyup(file, parent); -+ /* regular files have only one open lower file */ -+ if (!err && !S_ISDIR(dentry->d_inode->i_mode)) -+ fbend(file) = fbstart(file); -+ } -+ -+out: -+ if (err) { -+ kfree(UNIONFS_F(file)->lower_files); -+ kfree(UNIONFS_F(file)->saved_branch_ids); -+ } -+ return err; -+} -+ -+/* -+ * Revalidate the struct file -+ * @file: file to revalidate -+ * @parent: parent dentry (locked by caller) -+ * @willwrite: true if caller may cause changes to the file; false otherwise. -+ * Caller must lock/unlock dentry's branch configuration. -+ */ -+int unionfs_file_revalidate(struct file *file, struct dentry *parent, -+ bool willwrite) -+{ -+ struct super_block *sb; -+ struct dentry *dentry; -+ int sbgen, dgen; -+ int err = 0; -+ -+ dentry = file->f_path.dentry; -+ sb = dentry->d_sb; -+ verify_locked(dentry); -+ verify_locked(parent); -+ -+ /* -+ * First revalidate the dentry inside struct file, -+ * but not unhashed dentries. -+ */ -+ if (!d_deleted(dentry) && -+ !__unionfs_d_revalidate(dentry, parent, willwrite)) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ sbgen = atomic_read(&UNIONFS_SB(sb)->generation); -+ dgen = atomic_read(&UNIONFS_D(dentry)->generation); -+ -+ if (unlikely(sbgen > dgen)) { /* XXX: should never happen */ -+ pr_debug("unionfs: failed to revalidate dentry (%s)\n", -+ dentry->d_name.name); -+ err = -ESTALE; -+ goto out; -+ } -+ -+ err = __unionfs_file_revalidate(file, dentry, parent, sb, -+ sbgen, dgen, willwrite); -+out: -+ return err; -+} -+ -+/* unionfs_open helper function: open a directory */ -+static int __open_dir(struct inode *inode, struct file *file) -+{ -+ struct dentry *lower_dentry; -+ struct file *lower_file; -+ int bindex, bstart, bend; -+ struct vfsmount *mnt; -+ -+ bstart = fbstart(file) = dbstart(file->f_path.dentry); -+ bend = fbend(file) = dbend(file->f_path.dentry); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = -+ unionfs_lower_dentry_idx(file->f_path.dentry, bindex); -+ if (!lower_dentry) -+ continue; -+ -+ dget(lower_dentry); -+ unionfs_mntget(file->f_path.dentry, bindex); -+ mnt = unionfs_lower_mnt_idx(file->f_path.dentry, bindex); -+ lower_file = dentry_open(lower_dentry, mnt, file->f_flags, -+ current_cred()); -+ if (IS_ERR(lower_file)) -+ return PTR_ERR(lower_file); -+ -+ unionfs_set_lower_file_idx(file, bindex, lower_file); -+ -+ /* -+ * The branchget goes after the open, because otherwise -+ * we would miss the reference on release. -+ */ -+ branchget(inode->i_sb, bindex); -+ } -+ -+ return 0; -+} -+ -+/* unionfs_open helper function: open a file */ -+static int __open_file(struct inode *inode, struct file *file, -+ struct dentry *parent) -+{ -+ struct dentry *lower_dentry; -+ struct file *lower_file; -+ int lower_flags; -+ int bindex, bstart, bend; -+ -+ lower_dentry = unionfs_lower_dentry(file->f_path.dentry); -+ lower_flags = file->f_flags; -+ -+ bstart = fbstart(file) = dbstart(file->f_path.dentry); -+ bend = fbend(file) = dbend(file->f_path.dentry); -+ -+ /* -+ * check for the permission for lower file. If the error is -+ * COPYUP_ERR, copyup the file. -+ */ -+ if (lower_dentry->d_inode && is_robranch(file->f_path.dentry)) { -+ /* -+ * if the open will change the file, copy it up otherwise -+ * defer it. -+ */ -+ if (lower_flags & O_TRUNC) { -+ int size = 0; -+ int err = -EROFS; -+ -+ /* copyup the file */ -+ for (bindex = bstart - 1; bindex >= 0; bindex--) { -+ err = copyup_file(parent->d_inode, file, -+ bstart, bindex, size); -+ if (!err) { -+ /* only one regular file open */ -+ fbend(file) = fbstart(file); -+ break; -+ } -+ } -+ return err; -+ } else { -+ /* -+ * turn off writeable flags, to force delayed copyup -+ * by caller. -+ */ -+ lower_flags &= ~(OPEN_WRITE_FLAGS); -+ } -+ } -+ -+ dget(lower_dentry); -+ -+ /* -+ * dentry_open will decrement mnt refcnt if err. -+ * otherwise fput() will do an mntput() for us upon file close. -+ */ -+ unionfs_mntget(file->f_path.dentry, bstart); -+ lower_file = -+ dentry_open(lower_dentry, -+ unionfs_lower_mnt_idx(file->f_path.dentry, bstart), -+ lower_flags, current_cred()); -+ if (IS_ERR(lower_file)) -+ return PTR_ERR(lower_file); -+ -+ unionfs_set_lower_file(file, lower_file); -+ branchget(inode->i_sb, bstart); -+ -+ return 0; -+} -+ -+int unionfs_open(struct inode *inode, struct file *file) -+{ -+ int err = 0; -+ struct file *lower_file = NULL; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ int bindex = 0, bstart = 0, bend = 0; -+ int size; -+ int valid = 0; -+ -+ unionfs_read_lock(inode->i_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ /* don't open unhashed/deleted files */ -+ if (d_deleted(dentry)) { -+ err = -ENOENT; -+ goto out_nofree; -+ } -+ -+ /* XXX: should I change 'false' below to the 'willwrite' flag? */ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out_nofree; -+ } -+ -+ file->private_data = -+ kzalloc(sizeof(struct unionfs_file_info), GFP_KERNEL); -+ if (unlikely(!UNIONFS_F(file))) { -+ err = -ENOMEM; -+ goto out_nofree; -+ } -+ fbstart(file) = -1; -+ fbend(file) = -1; -+ atomic_set(&UNIONFS_F(file)->generation, -+ atomic_read(&UNIONFS_I(inode)->generation)); -+ -+ size = sizeof(struct file *) * sbmax(inode->i_sb); -+ UNIONFS_F(file)->lower_files = kzalloc(size, GFP_KERNEL); -+ if (unlikely(!UNIONFS_F(file)->lower_files)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ size = sizeof(int) * sbmax(inode->i_sb); -+ UNIONFS_F(file)->saved_branch_ids = kzalloc(size, GFP_KERNEL); -+ if (unlikely(!UNIONFS_F(file)->saved_branch_ids)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ -+ bstart = fbstart(file) = dbstart(dentry); -+ bend = fbend(file) = dbend(dentry); -+ -+ /* -+ * open all directories and make the unionfs file struct point to -+ * these lower file structs -+ */ -+ if (S_ISDIR(inode->i_mode)) -+ err = __open_dir(inode, file); /* open a dir */ -+ else -+ err = __open_file(inode, file, parent); /* open a file */ -+ -+ /* freeing the allocated resources, and fput the opened files */ -+ if (err) { -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_file = unionfs_lower_file_idx(file, bindex); -+ if (!lower_file) -+ continue; -+ -+ branchput(dentry->d_sb, bindex); -+ /* fput calls dput for lower_dentry */ -+ fput(lower_file); -+ } -+ } -+ -+out: -+ if (err) { -+ kfree(UNIONFS_F(file)->lower_files); -+ kfree(UNIONFS_F(file)->saved_branch_ids); -+ kfree(UNIONFS_F(file)); -+ } -+out_nofree: -+ if (!err) { -+ unionfs_postcopyup_setmnt(dentry); -+ unionfs_copy_attr_times(inode); -+ unionfs_check_file(file); -+ unionfs_check_inode(inode); -+ } -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(inode->i_sb); -+ return err; -+} -+ -+/* -+ * release all lower object references & free the file info structure -+ * -+ * No need to grab sb info's rwsem. -+ */ -+int unionfs_file_release(struct inode *inode, struct file *file) -+{ -+ struct file *lower_file = NULL; -+ struct unionfs_file_info *fileinfo; -+ struct unionfs_inode_info *inodeinfo; -+ struct super_block *sb = inode->i_sb; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ int bindex, bstart, bend; -+ int err = 0; -+ -+ /* -+ * Since mm/memory.c:might_fault() (under PROVE_LOCKING) was -+ * modified in 2.6.29-rc1 to call might_lock_read on mmap_sem, this -+ * has been causing false positives in file system stacking layers. -+ * In particular, our ->mmap is called after sys_mmap2 already holds -+ * mmap_sem, then we lock our own mutexes; but earlier, it's -+ * possible for lockdep to have locked our mutexes first, and then -+ * we call a lower ->readdir which could call might_fault. The -+ * different ordering of the locks is what lockdep complains about -+ * -- unnecessarily. Therefore, we have no choice but to tell -+ * lockdep to temporarily turn off lockdep here. Note: the comments -+ * inside might_sleep also suggest that it would have been -+ * nicer to only annotate paths that needs that might_lock_read. -+ */ -+ lockdep_off(); -+ unionfs_read_lock(sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ /* -+ * We try to revalidate, but the VFS ignores return return values -+ * from file->release, so we must always try to succeed here, -+ * including to do the kfree and dput below. So if revalidation -+ * failed, all we can do is print some message and keep going. -+ */ -+ err = unionfs_file_revalidate(file, parent, -+ UNIONFS_F(file)->wrote_to_file); -+ if (!err) -+ unionfs_check_file(file); -+ fileinfo = UNIONFS_F(file); -+ BUG_ON(file->f_path.dentry->d_inode != inode); -+ inodeinfo = UNIONFS_I(inode); -+ -+ /* fput all the lower files */ -+ bstart = fbstart(file); -+ bend = fbend(file); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_file = unionfs_lower_file_idx(file, bindex); -+ -+ if (lower_file) { -+ unionfs_set_lower_file_idx(file, bindex, NULL); -+ fput(lower_file); -+ branchput(sb, bindex); -+ } -+ -+ /* if there are no more refs to the dentry, dput it */ -+ if (d_deleted(dentry)) { -+ dput(unionfs_lower_dentry_idx(dentry, bindex)); -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); -+ } -+ } -+ -+ kfree(fileinfo->lower_files); -+ kfree(fileinfo->saved_branch_ids); -+ -+ if (fileinfo->rdstate) { -+ fileinfo->rdstate->access = jiffies; -+ spin_lock(&inodeinfo->rdlock); -+ inodeinfo->rdcount++; -+ list_add_tail(&fileinfo->rdstate->cache, -+ &inodeinfo->readdircache); -+ mark_inode_dirty(inode); -+ spin_unlock(&inodeinfo->rdlock); -+ fileinfo->rdstate = NULL; -+ } -+ kfree(fileinfo); -+ -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(sb); -+ lockdep_on(); -+ return err; -+} -+ -+/* pass the ioctl to the lower fs */ -+static long do_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -+{ -+ struct file *lower_file; -+ int err; -+ -+ lower_file = unionfs_lower_file(file); -+ -+ err = -ENOTTY; -+ if (!lower_file || !lower_file->f_op) -+ goto out; -+ if (lower_file->f_op->unlocked_ioctl) { -+ err = lower_file->f_op->unlocked_ioctl(lower_file, cmd, arg); -+#ifdef CONFIG_COMPAT -+ } else if (lower_file->f_op->ioctl) { -+ err = lower_file->f_op->compat_ioctl( -+ lower_file->f_path.dentry->d_inode, -+ lower_file, cmd, arg); -+#endif -+ } -+ -+out: -+ return err; -+} -+ -+/* -+ * return to user-space the branch indices containing the file in question -+ * -+ * We use fd_set and therefore we are limited to the number of the branches -+ * to FD_SETSIZE, which is currently 1024 - plenty for most people -+ */ -+static int unionfs_ioctl_queryfile(struct file *file, struct dentry *parent, -+ unsigned int cmd, unsigned long arg) -+{ -+ int err = 0; -+ fd_set branchlist; -+ int bstart = 0, bend = 0, bindex = 0; -+ int orig_bstart, orig_bend; -+ struct dentry *dentry, *lower_dentry; -+ struct vfsmount *mnt; -+ -+ dentry = file->f_path.dentry; -+ orig_bstart = dbstart(dentry); -+ orig_bend = dbend(dentry); -+ err = unionfs_partial_lookup(dentry, parent); -+ if (err) -+ goto out; -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ -+ FD_ZERO(&branchlist); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) -+ continue; -+ if (likely(lower_dentry->d_inode)) -+ FD_SET(bindex, &branchlist); -+ /* purge any lower objects after partial_lookup */ -+ if (bindex < orig_bstart || bindex > orig_bend) { -+ dput(lower_dentry); -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); -+ iput(unionfs_lower_inode_idx(dentry->d_inode, bindex)); -+ unionfs_set_lower_inode_idx(dentry->d_inode, bindex, -+ NULL); -+ mnt = unionfs_lower_mnt_idx(dentry, bindex); -+ if (!mnt) -+ continue; -+ unionfs_mntput(dentry, bindex); -+ unionfs_set_lower_mnt_idx(dentry, bindex, NULL); -+ } -+ } -+ /* restore original dentry's offsets */ -+ dbstart(dentry) = orig_bstart; -+ dbend(dentry) = orig_bend; -+ ibstart(dentry->d_inode) = orig_bstart; -+ ibend(dentry->d_inode) = orig_bend; -+ -+ err = copy_to_user((void __user *)arg, &branchlist, sizeof(fd_set)); -+ if (unlikely(err)) -+ err = -EFAULT; -+ -+out: -+ return err < 0 ? err : bend; -+} -+ -+long unionfs_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -+{ -+ long err; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, true); -+ if (unlikely(err)) -+ goto out; -+ -+ /* check if asked for local commands */ -+ switch (cmd) { -+ case UNIONFS_IOCTL_INCGEN: -+ /* Increment the superblock generation count */ -+ pr_info("unionfs: incgen ioctl deprecated; " -+ "use \"-o remount,incgen\"\n"); -+ err = -ENOSYS; -+ break; -+ -+ case UNIONFS_IOCTL_QUERYFILE: -+ /* Return list of branches containing the given file */ -+ err = unionfs_ioctl_queryfile(file, parent, cmd, arg); -+ break; -+ -+ default: -+ /* pass the ioctl down */ -+ err = do_ioctl(file, cmd, arg); -+ break; -+ } -+ -+out: -+ unionfs_check_file(file); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+int unionfs_flush(struct file *file, fl_owner_t id) -+{ -+ int err = 0; -+ struct file *lower_file = NULL; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ int bindex, bstart, bend; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, -+ UNIONFS_F(file)->wrote_to_file); -+ if (unlikely(err)) -+ goto out; -+ unionfs_check_file(file); -+ -+ bstart = fbstart(file); -+ bend = fbend(file); -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_file = unionfs_lower_file_idx(file, bindex); -+ -+ if (lower_file && lower_file->f_op && -+ lower_file->f_op->flush) { -+ err = lower_file->f_op->flush(lower_file, id); -+ if (err) -+ goto out; -+ } -+ -+ } -+ -+out: -+ if (!err) -+ unionfs_check_file(file); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -diff --git a/fs/unionfs/copyup.c b/fs/unionfs/copyup.c -new file mode 100644 -index 0000000..37c2654 ---- /dev/null -+++ b/fs/unionfs/copyup.c -@@ -0,0 +1,896 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * For detailed explanation of copyup see: -+ * Documentation/filesystems/unionfs/concepts.txt -+ */ -+ -+#ifdef CONFIG_UNION_FS_XATTR -+/* copyup all extended attrs for a given dentry */ -+static int copyup_xattrs(struct dentry *old_lower_dentry, -+ struct dentry *new_lower_dentry) -+{ -+ int err = 0; -+ ssize_t list_size = -1; -+ char *name_list = NULL; -+ char *attr_value = NULL; -+ char *name_list_buf = NULL; -+ -+ /* query the actual size of the xattr list */ -+ list_size = vfs_listxattr(old_lower_dentry, NULL, 0); -+ if (list_size <= 0) { -+ err = list_size; -+ goto out; -+ } -+ -+ /* allocate space for the actual list */ -+ name_list = unionfs_xattr_alloc(list_size + 1, XATTR_LIST_MAX); -+ if (unlikely(!name_list || IS_ERR(name_list))) { -+ err = PTR_ERR(name_list); -+ goto out; -+ } -+ -+ name_list_buf = name_list; /* save for kfree at end */ -+ -+ /* now get the actual xattr list of the source file */ -+ list_size = vfs_listxattr(old_lower_dentry, name_list, list_size); -+ if (list_size <= 0) { -+ err = list_size; -+ goto out; -+ } -+ -+ /* allocate space to hold each xattr's value */ -+ attr_value = unionfs_xattr_alloc(XATTR_SIZE_MAX, XATTR_SIZE_MAX); -+ if (unlikely(!attr_value || IS_ERR(attr_value))) { -+ err = PTR_ERR(name_list); -+ goto out; -+ } -+ -+ /* in a loop, get and set each xattr from src to dst file */ -+ while (*name_list) { -+ ssize_t size; -+ -+ /* Lock here since vfs_getxattr doesn't lock for us */ -+ mutex_lock(&old_lower_dentry->d_inode->i_mutex); -+ size = vfs_getxattr(old_lower_dentry, name_list, -+ attr_value, XATTR_SIZE_MAX); -+ mutex_unlock(&old_lower_dentry->d_inode->i_mutex); -+ if (size < 0) { -+ err = size; -+ goto out; -+ } -+ if (size > XATTR_SIZE_MAX) { -+ err = -E2BIG; -+ goto out; -+ } -+ /* Don't lock here since vfs_setxattr does it for us. */ -+ err = vfs_setxattr(new_lower_dentry, name_list, attr_value, -+ size, 0); -+ /* -+ * Selinux depends on "security.*" xattrs, so to maintain -+ * the security of copied-up files, if Selinux is active, -+ * then we must copy these xattrs as well. So we need to -+ * temporarily get FOWNER privileges. -+ * XXX: move entire copyup code to SIOQ. -+ */ -+ if (err == -EPERM && !capable(CAP_FOWNER)) { -+ const struct cred *old_creds; -+ struct cred *new_creds; -+ -+ new_creds = prepare_creds(); -+ if (unlikely(!new_creds)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ cap_raise(new_creds->cap_effective, CAP_FOWNER); -+ old_creds = override_creds(new_creds); -+ err = vfs_setxattr(new_lower_dentry, name_list, -+ attr_value, size, 0); -+ revert_creds(old_creds); -+ } -+ if (err < 0) -+ goto out; -+ name_list += strlen(name_list) + 1; -+ } -+out: -+ unionfs_xattr_kfree(name_list_buf); -+ unionfs_xattr_kfree(attr_value); -+ /* Ignore if xattr isn't supported */ -+ if (err == -ENOTSUPP || err == -EOPNOTSUPP) -+ err = 0; -+ return err; -+} -+#endif /* CONFIG_UNION_FS_XATTR */ -+ -+/* -+ * Determine the mode based on the copyup flags, and the existing dentry. -+ * -+ * Handle file systems which may not support certain options. For example -+ * jffs2 doesn't allow one to chmod a symlink. So we ignore such harmless -+ * errors, rather than propagating them up, which results in copyup errors -+ * and errors returned back to users. -+ */ -+static int copyup_permissions(struct super_block *sb, -+ struct dentry *old_lower_dentry, -+ struct dentry *new_lower_dentry) -+{ -+ struct inode *i = old_lower_dentry->d_inode; -+ struct iattr newattrs; -+ int err; -+ -+ newattrs.ia_atime = i->i_atime; -+ newattrs.ia_mtime = i->i_mtime; -+ newattrs.ia_ctime = i->i_ctime; -+ newattrs.ia_gid = i->i_gid; -+ newattrs.ia_uid = i->i_uid; -+ newattrs.ia_valid = ATTR_CTIME | ATTR_ATIME | ATTR_MTIME | -+ ATTR_ATIME_SET | ATTR_MTIME_SET | ATTR_FORCE | -+ ATTR_GID | ATTR_UID; -+ mutex_lock(&new_lower_dentry->d_inode->i_mutex); -+ err = notify_change(new_lower_dentry, &newattrs); -+ if (err) -+ goto out; -+ -+ /* now try to change the mode and ignore EOPNOTSUPP on symlinks */ -+ newattrs.ia_mode = i->i_mode; -+ newattrs.ia_valid = ATTR_MODE | ATTR_FORCE; -+ err = notify_change(new_lower_dentry, &newattrs); -+ if (err == -EOPNOTSUPP && -+ S_ISLNK(new_lower_dentry->d_inode->i_mode)) { -+ printk(KERN_WARNING -+ "unionfs: changing \"%s\" symlink mode unsupported\n", -+ new_lower_dentry->d_name.name); -+ err = 0; -+ } -+ -+out: -+ mutex_unlock(&new_lower_dentry->d_inode->i_mutex); -+ return err; -+} -+ -+/* -+ * create the new device/file/directory - use copyup_permission to copyup -+ * times, and mode -+ * -+ * if the object being copied up is a regular file, the file is only created, -+ * the contents have to be copied up separately -+ */ -+static int __copyup_ndentry(struct dentry *old_lower_dentry, -+ struct dentry *new_lower_dentry, -+ struct dentry *new_lower_parent_dentry, -+ char *symbuf) -+{ -+ int err = 0; -+ umode_t old_mode = old_lower_dentry->d_inode->i_mode; -+ struct sioq_args args; -+ -+ if (S_ISDIR(old_mode)) { -+ args.mkdir.parent = new_lower_parent_dentry->d_inode; -+ args.mkdir.dentry = new_lower_dentry; -+ args.mkdir.mode = old_mode; -+ -+ run_sioq(__unionfs_mkdir, &args); -+ err = args.err; -+ } else if (S_ISLNK(old_mode)) { -+ args.symlink.parent = new_lower_parent_dentry->d_inode; -+ args.symlink.dentry = new_lower_dentry; -+ args.symlink.symbuf = symbuf; -+ -+ run_sioq(__unionfs_symlink, &args); -+ err = args.err; -+ } else if (S_ISBLK(old_mode) || S_ISCHR(old_mode) || -+ S_ISFIFO(old_mode) || S_ISSOCK(old_mode)) { -+ args.mknod.parent = new_lower_parent_dentry->d_inode; -+ args.mknod.dentry = new_lower_dentry; -+ args.mknod.mode = old_mode; -+ args.mknod.dev = old_lower_dentry->d_inode->i_rdev; -+ -+ run_sioq(__unionfs_mknod, &args); -+ err = args.err; -+ } else if (S_ISREG(old_mode)) { -+ struct nameidata nd; -+ err = init_lower_nd(&nd, LOOKUP_CREATE); -+ if (unlikely(err < 0)) -+ goto out; -+ args.create.nd = &nd; -+ args.create.parent = new_lower_parent_dentry->d_inode; -+ args.create.dentry = new_lower_dentry; -+ args.create.mode = old_mode; -+ -+ run_sioq(__unionfs_create, &args); -+ err = args.err; -+ release_lower_nd(&nd, err); -+ } else { -+ printk(KERN_CRIT "unionfs: unknown inode type %d\n", -+ old_mode); -+ BUG(); -+ } -+ -+out: -+ return err; -+} -+ -+static int __copyup_reg_data(struct dentry *dentry, -+ struct dentry *new_lower_dentry, int new_bindex, -+ struct dentry *old_lower_dentry, int old_bindex, -+ struct file **copyup_file, loff_t len) -+{ -+ struct super_block *sb = dentry->d_sb; -+ struct file *input_file; -+ struct file *output_file; -+ struct vfsmount *output_mnt; -+ mm_segment_t old_fs; -+ char *buf = NULL; -+ ssize_t read_bytes, write_bytes; -+ loff_t size; -+ int err = 0; -+ -+ /* open old file */ -+ unionfs_mntget(dentry, old_bindex); -+ branchget(sb, old_bindex); -+ /* dentry_open calls dput and mntput if it returns an error */ -+ input_file = dentry_open(old_lower_dentry, -+ unionfs_lower_mnt_idx(dentry, old_bindex), -+ O_RDONLY | O_LARGEFILE, current_cred()); -+ if (IS_ERR(input_file)) { -+ dput(old_lower_dentry); -+ err = PTR_ERR(input_file); -+ goto out; -+ } -+ if (unlikely(!input_file->f_op || !input_file->f_op->read)) { -+ err = -EINVAL; -+ goto out_close_in; -+ } -+ -+ /* open new file */ -+ dget(new_lower_dentry); -+ output_mnt = unionfs_mntget(sb->s_root, new_bindex); -+ branchget(sb, new_bindex); -+ output_file = dentry_open(new_lower_dentry, output_mnt, -+ O_RDWR | O_LARGEFILE, current_cred()); -+ if (IS_ERR(output_file)) { -+ err = PTR_ERR(output_file); -+ goto out_close_in2; -+ } -+ if (unlikely(!output_file->f_op || !output_file->f_op->write)) { -+ err = -EINVAL; -+ goto out_close_out; -+ } -+ -+ /* allocating a buffer */ -+ buf = kmalloc(PAGE_SIZE, GFP_KERNEL); -+ if (unlikely(!buf)) { -+ err = -ENOMEM; -+ goto out_close_out; -+ } -+ -+ input_file->f_pos = 0; -+ output_file->f_pos = 0; -+ -+ old_fs = get_fs(); -+ set_fs(KERNEL_DS); -+ -+ size = len; -+ err = 0; -+ do { -+ if (len >= PAGE_SIZE) -+ size = PAGE_SIZE; -+ else if ((len < PAGE_SIZE) && (len > 0)) -+ size = len; -+ -+ len -= PAGE_SIZE; -+ -+ read_bytes = -+ input_file->f_op->read(input_file, -+ (char __user *)buf, size, -+ &input_file->f_pos); -+ if (read_bytes <= 0) { -+ err = read_bytes; -+ break; -+ } -+ -+ /* see Documentation/filesystems/unionfs/issues.txt */ -+ lockdep_off(); -+ write_bytes = -+ output_file->f_op->write(output_file, -+ (char __user *)buf, -+ read_bytes, -+ &output_file->f_pos); -+ lockdep_on(); -+ if ((write_bytes < 0) || (write_bytes < read_bytes)) { -+ err = write_bytes; -+ break; -+ } -+ } while ((read_bytes > 0) && (len > 0)); -+ -+ set_fs(old_fs); -+ -+ kfree(buf); -+ -+ if (!err) -+ err = output_file->f_op->fsync(output_file, 0); -+ -+ if (err) -+ goto out_close_out; -+ -+ if (copyup_file) { -+ *copyup_file = output_file; -+ goto out_close_in; -+ } -+ -+out_close_out: -+ fput(output_file); -+ -+out_close_in2: -+ branchput(sb, new_bindex); -+ -+out_close_in: -+ fput(input_file); -+ -+out: -+ branchput(sb, old_bindex); -+ -+ return err; -+} -+ -+/* -+ * dput the lower references for old and new dentry & clear a lower dentry -+ * pointer -+ */ -+static void __clear(struct dentry *dentry, struct dentry *old_lower_dentry, -+ int old_bstart, int old_bend, -+ struct dentry *new_lower_dentry, int new_bindex) -+{ -+ /* get rid of the lower dentry and all its traces */ -+ unionfs_set_lower_dentry_idx(dentry, new_bindex, NULL); -+ dbstart(dentry) = old_bstart; -+ dbend(dentry) = old_bend; -+ -+ dput(new_lower_dentry); -+ dput(old_lower_dentry); -+} -+ -+/* -+ * Copy up a dentry to a file of specified name. -+ * -+ * @dir: used to pull the ->i_sb to access other branches -+ * @dentry: the non-negative dentry whose lower_inode we should copy -+ * @bstart: the branch of the lower_inode to copy from -+ * @new_bindex: the branch to create the new file in -+ * @name: the name of the file to create -+ * @namelen: length of @name -+ * @copyup_file: the "struct file" to return (optional) -+ * @len: how many bytes to copy-up? -+ */ -+int copyup_dentry(struct inode *dir, struct dentry *dentry, int bstart, -+ int new_bindex, const char *name, int namelen, -+ struct file **copyup_file, loff_t len) -+{ -+ struct dentry *new_lower_dentry; -+ struct dentry *old_lower_dentry = NULL; -+ struct super_block *sb; -+ int err = 0; -+ int old_bindex; -+ int old_bstart; -+ int old_bend; -+ struct dentry *new_lower_parent_dentry = NULL; -+ mm_segment_t oldfs; -+ char *symbuf = NULL; -+ -+ verify_locked(dentry); -+ -+ old_bindex = bstart; -+ old_bstart = dbstart(dentry); -+ old_bend = dbend(dentry); -+ -+ BUG_ON(new_bindex < 0); -+ BUG_ON(new_bindex >= old_bindex); -+ -+ sb = dir->i_sb; -+ -+ err = is_robranch_super(sb, new_bindex); -+ if (err) -+ goto out; -+ -+ /* Create the directory structure above this dentry. */ -+ new_lower_dentry = create_parents(dir, dentry, name, new_bindex); -+ if (IS_ERR(new_lower_dentry)) { -+ err = PTR_ERR(new_lower_dentry); -+ goto out; -+ } -+ -+ old_lower_dentry = unionfs_lower_dentry_idx(dentry, old_bindex); -+ /* we conditionally dput this old_lower_dentry at end of function */ -+ dget(old_lower_dentry); -+ -+ /* For symlinks, we must read the link before we lock the directory. */ -+ if (S_ISLNK(old_lower_dentry->d_inode->i_mode)) { -+ -+ symbuf = kmalloc(PATH_MAX, GFP_KERNEL); -+ if (unlikely(!symbuf)) { -+ __clear(dentry, old_lower_dentry, -+ old_bstart, old_bend, -+ new_lower_dentry, new_bindex); -+ err = -ENOMEM; -+ goto out_free; -+ } -+ -+ oldfs = get_fs(); -+ set_fs(KERNEL_DS); -+ err = old_lower_dentry->d_inode->i_op->readlink( -+ old_lower_dentry, -+ (char __user *)symbuf, -+ PATH_MAX); -+ set_fs(oldfs); -+ if (err < 0) { -+ __clear(dentry, old_lower_dentry, -+ old_bstart, old_bend, -+ new_lower_dentry, new_bindex); -+ goto out_free; -+ } -+ symbuf[err] = '\0'; -+ } -+ -+ /* Now we lock the parent, and create the object in the new branch. */ -+ new_lower_parent_dentry = lock_parent(new_lower_dentry); -+ -+ /* create the new inode */ -+ err = __copyup_ndentry(old_lower_dentry, new_lower_dentry, -+ new_lower_parent_dentry, symbuf); -+ -+ if (err) { -+ __clear(dentry, old_lower_dentry, -+ old_bstart, old_bend, -+ new_lower_dentry, new_bindex); -+ goto out_unlock; -+ } -+ -+ /* We actually copyup the file here. */ -+ if (S_ISREG(old_lower_dentry->d_inode->i_mode)) -+ err = __copyup_reg_data(dentry, new_lower_dentry, new_bindex, -+ old_lower_dentry, old_bindex, -+ copyup_file, len); -+ if (err) -+ goto out_unlink; -+ -+ /* Set permissions. */ -+ err = copyup_permissions(sb, old_lower_dentry, new_lower_dentry); -+ if (err) -+ goto out_unlink; -+ -+#ifdef CONFIG_UNION_FS_XATTR -+ /* Selinux uses extended attributes for permissions. */ -+ err = copyup_xattrs(old_lower_dentry, new_lower_dentry); -+ if (err) -+ goto out_unlink; -+#endif /* CONFIG_UNION_FS_XATTR */ -+ -+ /* do not allow files getting deleted to be re-interposed */ -+ if (!d_deleted(dentry)) -+ unionfs_reinterpose(dentry); -+ -+ goto out_unlock; -+ -+out_unlink: -+ /* -+ * copyup failed, because we possibly ran out of space or -+ * quota, or something else happened so let's unlink; we don't -+ * really care about the return value of vfs_unlink -+ */ -+ vfs_unlink(new_lower_parent_dentry->d_inode, new_lower_dentry); -+ -+ if (copyup_file) { -+ /* need to close the file */ -+ -+ fput(*copyup_file); -+ branchput(sb, new_bindex); -+ } -+ -+ /* -+ * TODO: should we reset the error to something like -EIO? -+ * -+ * If we don't reset, the user may get some nonsensical errors, but -+ * on the other hand, if we reset to EIO, we guarantee that the user -+ * will get a "confusing" error message. -+ */ -+ -+out_unlock: -+ unlock_dir(new_lower_parent_dentry); -+ -+out_free: -+ /* -+ * If old_lower_dentry was not a file, then we need to dput it. If -+ * it was a file, then it was already dput indirectly by other -+ * functions we call above which operate on regular files. -+ */ -+ if (old_lower_dentry && old_lower_dentry->d_inode && -+ !S_ISREG(old_lower_dentry->d_inode->i_mode)) -+ dput(old_lower_dentry); -+ kfree(symbuf); -+ -+ if (err) { -+ /* -+ * if directory creation succeeded, but inode copyup failed, -+ * then purge new dentries. -+ */ -+ if (dbstart(dentry) < old_bstart && -+ ibstart(dentry->d_inode) > dbstart(dentry)) -+ __clear(dentry, NULL, old_bstart, old_bend, -+ unionfs_lower_dentry(dentry), dbstart(dentry)); -+ goto out; -+ } -+ if (!S_ISDIR(dentry->d_inode->i_mode)) { -+ unionfs_postcopyup_release(dentry); -+ if (!unionfs_lower_inode(dentry->d_inode)) { -+ /* -+ * If we got here, then we copied up to an -+ * unlinked-open file, whose name is .unionfsXXXXX. -+ */ -+ struct inode *inode = new_lower_dentry->d_inode; -+ atomic_inc(&inode->i_count); -+ unionfs_set_lower_inode_idx(dentry->d_inode, -+ ibstart(dentry->d_inode), -+ inode); -+ } -+ } -+ unionfs_postcopyup_setmnt(dentry); -+ /* sync inode times from copied-up inode to our inode */ -+ unionfs_copy_attr_times(dentry->d_inode); -+ unionfs_check_inode(dir); -+ unionfs_check_dentry(dentry); -+out: -+ return err; -+} -+ -+/* -+ * This function creates a copy of a file represented by 'file' which -+ * currently resides in branch 'bstart' to branch 'new_bindex.' The copy -+ * will be named "name". -+ */ -+int copyup_named_file(struct inode *dir, struct file *file, char *name, -+ int bstart, int new_bindex, loff_t len) -+{ -+ int err = 0; -+ struct file *output_file = NULL; -+ -+ err = copyup_dentry(dir, file->f_path.dentry, bstart, new_bindex, -+ name, strlen(name), &output_file, len); -+ if (!err) { -+ fbstart(file) = new_bindex; -+ unionfs_set_lower_file_idx(file, new_bindex, output_file); -+ } -+ -+ return err; -+} -+ -+/* -+ * This function creates a copy of a file represented by 'file' which -+ * currently resides in branch 'bstart' to branch 'new_bindex'. -+ */ -+int copyup_file(struct inode *dir, struct file *file, int bstart, -+ int new_bindex, loff_t len) -+{ -+ int err = 0; -+ struct file *output_file = NULL; -+ struct dentry *dentry = file->f_path.dentry; -+ -+ err = copyup_dentry(dir, dentry, bstart, new_bindex, -+ dentry->d_name.name, dentry->d_name.len, -+ &output_file, len); -+ if (!err) { -+ fbstart(file) = new_bindex; -+ unionfs_set_lower_file_idx(file, new_bindex, output_file); -+ } -+ -+ return err; -+} -+ -+/* purge a dentry's lower-branch states (dput/mntput, etc.) */ -+static void __cleanup_dentry(struct dentry *dentry, int bindex, -+ int old_bstart, int old_bend) -+{ -+ int loop_start; -+ int loop_end; -+ int new_bstart = -1; -+ int new_bend = -1; -+ int i; -+ -+ loop_start = min(old_bstart, bindex); -+ loop_end = max(old_bend, bindex); -+ -+ /* -+ * This loop sets the bstart and bend for the new dentry by -+ * traversing from left to right. It also dputs all negative -+ * dentries except bindex -+ */ -+ for (i = loop_start; i <= loop_end; i++) { -+ if (!unionfs_lower_dentry_idx(dentry, i)) -+ continue; -+ -+ if (i == bindex) { -+ new_bend = i; -+ if (new_bstart < 0) -+ new_bstart = i; -+ continue; -+ } -+ -+ if (!unionfs_lower_dentry_idx(dentry, i)->d_inode) { -+ dput(unionfs_lower_dentry_idx(dentry, i)); -+ unionfs_set_lower_dentry_idx(dentry, i, NULL); -+ -+ unionfs_mntput(dentry, i); -+ unionfs_set_lower_mnt_idx(dentry, i, NULL); -+ } else { -+ if (new_bstart < 0) -+ new_bstart = i; -+ new_bend = i; -+ } -+ } -+ -+ if (new_bstart < 0) -+ new_bstart = bindex; -+ if (new_bend < 0) -+ new_bend = bindex; -+ dbstart(dentry) = new_bstart; -+ dbend(dentry) = new_bend; -+ -+} -+ -+/* set lower inode ptr and update bstart & bend if necessary */ -+static void __set_inode(struct dentry *upper, struct dentry *lower, -+ int bindex) -+{ -+ unionfs_set_lower_inode_idx(upper->d_inode, bindex, -+ igrab(lower->d_inode)); -+ if (likely(ibstart(upper->d_inode) > bindex)) -+ ibstart(upper->d_inode) = bindex; -+ if (likely(ibend(upper->d_inode) < bindex)) -+ ibend(upper->d_inode) = bindex; -+ -+} -+ -+/* set lower dentry ptr and update bstart & bend if necessary */ -+static void __set_dentry(struct dentry *upper, struct dentry *lower, -+ int bindex) -+{ -+ unionfs_set_lower_dentry_idx(upper, bindex, lower); -+ if (likely(dbstart(upper) > bindex)) -+ dbstart(upper) = bindex; -+ if (likely(dbend(upper) < bindex)) -+ dbend(upper) = bindex; -+} -+ -+/* -+ * This function replicates the directory structure up-to given dentry -+ * in the bindex branch. -+ */ -+struct dentry *create_parents(struct inode *dir, struct dentry *dentry, -+ const char *name, int bindex) -+{ -+ int err; -+ struct dentry *child_dentry; -+ struct dentry *parent_dentry; -+ struct dentry *lower_parent_dentry = NULL; -+ struct dentry *lower_dentry = NULL; -+ const char *childname; -+ unsigned int childnamelen; -+ int nr_dentry; -+ int count = 0; -+ int old_bstart; -+ int old_bend; -+ struct dentry **path = NULL; -+ struct super_block *sb; -+ -+ verify_locked(dentry); -+ -+ err = is_robranch_super(dir->i_sb, bindex); -+ if (err) { -+ lower_dentry = ERR_PTR(err); -+ goto out; -+ } -+ -+ old_bstart = dbstart(dentry); -+ old_bend = dbend(dentry); -+ -+ lower_dentry = ERR_PTR(-ENOMEM); -+ -+ /* There is no sense allocating any less than the minimum. */ -+ nr_dentry = 1; -+ path = kmalloc(nr_dentry * sizeof(struct dentry *), GFP_KERNEL); -+ if (unlikely(!path)) -+ goto out; -+ -+ /* assume the negative dentry of unionfs as the parent dentry */ -+ parent_dentry = dentry; -+ -+ /* -+ * This loop finds the first parent that exists in the given branch. -+ * We start building the directory structure from there. At the end -+ * of the loop, the following should hold: -+ * - child_dentry is the first nonexistent child -+ * - parent_dentry is the first existent parent -+ * - path[0] is the = deepest child -+ * - path[count] is the first child to create -+ */ -+ do { -+ child_dentry = parent_dentry; -+ -+ /* find the parent directory dentry in unionfs */ -+ parent_dentry = dget_parent(child_dentry); -+ -+ /* find out the lower_parent_dentry in the given branch */ -+ lower_parent_dentry = -+ unionfs_lower_dentry_idx(parent_dentry, bindex); -+ -+ /* grow path table */ -+ if (count == nr_dentry) { -+ void *p; -+ -+ nr_dentry *= 2; -+ p = krealloc(path, nr_dentry * sizeof(struct dentry *), -+ GFP_KERNEL); -+ if (unlikely(!p)) { -+ lower_dentry = ERR_PTR(-ENOMEM); -+ goto out; -+ } -+ path = p; -+ } -+ -+ /* store the child dentry */ -+ path[count++] = child_dentry; -+ } while (!lower_parent_dentry); -+ count--; -+ -+ sb = dentry->d_sb; -+ -+ /* -+ * This code goes between the begin/end labels and basically -+ * emulates a while(child_dentry != dentry), only cleaner and -+ * shorter than what would be a much longer while loop. -+ */ -+begin: -+ /* get lower parent dir in the current branch */ -+ lower_parent_dentry = unionfs_lower_dentry_idx(parent_dentry, bindex); -+ dput(parent_dentry); -+ -+ /* init the values to lookup */ -+ childname = child_dentry->d_name.name; -+ childnamelen = child_dentry->d_name.len; -+ -+ if (child_dentry != dentry) { -+ /* lookup child in the underlying file system */ -+ lower_dentry = lookup_lck_len(childname, lower_parent_dentry, -+ childnamelen); -+ if (IS_ERR(lower_dentry)) -+ goto out; -+ } else { -+ /* -+ * Is the name a whiteout of the child name ? lookup the -+ * whiteout child in the underlying file system -+ */ -+ lower_dentry = lookup_lck_len(name, lower_parent_dentry, -+ strlen(name)); -+ if (IS_ERR(lower_dentry)) -+ goto out; -+ -+ /* Replace the current dentry (if any) with the new one */ -+ dput(unionfs_lower_dentry_idx(dentry, bindex)); -+ unionfs_set_lower_dentry_idx(dentry, bindex, -+ lower_dentry); -+ -+ __cleanup_dentry(dentry, bindex, old_bstart, old_bend); -+ goto out; -+ } -+ -+ if (lower_dentry->d_inode) { -+ /* -+ * since this already exists we dput to avoid -+ * multiple references on the same dentry -+ */ -+ dput(lower_dentry); -+ } else { -+ struct sioq_args args; -+ -+ /* it's a negative dentry, create a new dir */ -+ lower_parent_dentry = lock_parent(lower_dentry); -+ -+ args.mkdir.parent = lower_parent_dentry->d_inode; -+ args.mkdir.dentry = lower_dentry; -+ args.mkdir.mode = child_dentry->d_inode->i_mode; -+ -+ run_sioq(__unionfs_mkdir, &args); -+ err = args.err; -+ -+ if (!err) -+ err = copyup_permissions(dir->i_sb, child_dentry, -+ lower_dentry); -+ unlock_dir(lower_parent_dentry); -+ if (err) { -+ dput(lower_dentry); -+ lower_dentry = ERR_PTR(err); -+ goto out; -+ } -+ -+ } -+ -+ __set_inode(child_dentry, lower_dentry, bindex); -+ __set_dentry(child_dentry, lower_dentry, bindex); -+ /* -+ * update times of this dentry, but also the parent, because if -+ * we changed, the parent may have changed too. -+ */ -+ fsstack_copy_attr_times(parent_dentry->d_inode, -+ lower_parent_dentry->d_inode); -+ unionfs_copy_attr_times(child_dentry->d_inode); -+ -+ parent_dentry = child_dentry; -+ child_dentry = path[--count]; -+ goto begin; -+out: -+ /* cleanup any leftover locks from the do/while loop above */ -+ if (IS_ERR(lower_dentry)) -+ while (count) -+ dput(path[count--]); -+ kfree(path); -+ return lower_dentry; -+} -+ -+/* -+ * Post-copyup helper to ensure we have valid mnts: set lower mnt of -+ * dentry+parents to the first parent node that has an mnt. -+ */ -+void unionfs_postcopyup_setmnt(struct dentry *dentry) -+{ -+ struct dentry *parent, *hasone; -+ int bindex = dbstart(dentry); -+ -+ if (unionfs_lower_mnt_idx(dentry, bindex)) -+ return; -+ hasone = dentry->d_parent; -+ /* this loop should stop at root dentry */ -+ while (!unionfs_lower_mnt_idx(hasone, bindex)) -+ hasone = hasone->d_parent; -+ parent = dentry; -+ while (!unionfs_lower_mnt_idx(parent, bindex)) { -+ unionfs_set_lower_mnt_idx(parent, bindex, -+ unionfs_mntget(hasone, bindex)); -+ parent = parent->d_parent; -+ } -+} -+ -+/* -+ * Post-copyup helper to release all non-directory source objects of a -+ * copied-up file. Regular files should have only one lower object. -+ */ -+void unionfs_postcopyup_release(struct dentry *dentry) -+{ -+ int bstart, bend; -+ -+ BUG_ON(S_ISDIR(dentry->d_inode->i_mode)); -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ -+ path_put_lowers(dentry, bstart + 1, bend, false); -+ iput_lowers(dentry->d_inode, bstart + 1, bend, false); -+ -+ dbend(dentry) = bstart; -+ ibend(dentry->d_inode) = ibstart(dentry->d_inode) = bstart; -+} -diff --git a/fs/unionfs/debug.c b/fs/unionfs/debug.c -new file mode 100644 -index 0000000..6092e69 ---- /dev/null -+++ b/fs/unionfs/debug.c -@@ -0,0 +1,548 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * Helper debugging functions for maintainers (and for users to report back -+ * useful information back to maintainers) -+ */ -+ -+/* it's always useful to know what part of the code called us */ -+#define PRINT_CALLER(fname, fxn, line) \ -+ do { \ -+ if (!printed_caller) { \ -+ pr_debug("PC:%s:%s:%d\n", (fname), (fxn), (line)); \ -+ printed_caller = 1; \ -+ } \ -+ } while (0) -+ -+/* -+ * __unionfs_check_{inode,dentry,file} perform exhaustive sanity checking on -+ * the fan-out of various Unionfs objects. We check that no lower objects -+ * exist outside the start/end branch range; that all objects within are -+ * non-NULL (with some allowed exceptions); that for every lower file -+ * there's a lower dentry+inode; that the start/end ranges match for all -+ * corresponding lower objects; that open files/symlinks have only one lower -+ * objects, but directories can have several; and more. -+ */ -+void __unionfs_check_inode(const struct inode *inode, -+ const char *fname, const char *fxn, int line) -+{ -+ int bindex; -+ int istart, iend; -+ struct inode *lower_inode; -+ struct super_block *sb; -+ int printed_caller = 0; -+ void *poison_ptr; -+ -+ /* for inodes now */ -+ BUG_ON(!inode); -+ sb = inode->i_sb; -+ istart = ibstart(inode); -+ iend = ibend(inode); -+ /* don't check inode if no lower branches */ -+ if (istart < 0 && iend < 0) -+ return; -+ if (unlikely(istart > iend)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Ci0: inode=%p istart/end=%d:%d\n", -+ inode, istart, iend); -+ } -+ if (unlikely((istart == -1 && iend != -1) || -+ (istart != -1 && iend == -1))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Ci1: inode=%p istart/end=%d:%d\n", -+ inode, istart, iend); -+ } -+ if (!S_ISDIR(inode->i_mode)) { -+ if (unlikely(iend != istart)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Ci2: inode=%p istart=%d iend=%d\n", -+ inode, istart, iend); -+ } -+ } -+ -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { -+ if (unlikely(!UNIONFS_I(inode))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Ci3: no inode_info %p\n", inode); -+ return; -+ } -+ if (unlikely(!UNIONFS_I(inode)->lower_inodes)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Ci4: no lower_inodes %p\n", inode); -+ return; -+ } -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (lower_inode) { -+ memset(&poison_ptr, POISON_INUSE, sizeof(void *)); -+ if (unlikely(bindex < istart || bindex > iend)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Ci5: inode/linode=%p:%p bindex=%d " -+ "istart/end=%d:%d\n", inode, -+ lower_inode, bindex, istart, iend); -+ } else if (unlikely(lower_inode == poison_ptr)) { -+ /* freed inode! */ -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Ci6: inode/linode=%p:%p bindex=%d " -+ "istart/end=%d:%d\n", inode, -+ lower_inode, bindex, istart, iend); -+ } -+ continue; -+ } -+ /* if we get here, then lower_inode == NULL */ -+ if (bindex < istart || bindex > iend) -+ continue; -+ /* -+ * directories can have NULL lower inodes in b/t start/end, -+ * but NOT if at the start/end range. -+ */ -+ if (unlikely(S_ISDIR(inode->i_mode) && -+ bindex > istart && bindex < iend)) -+ continue; -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Ci7: inode/linode=%p:%p " -+ "bindex=%d istart/end=%d:%d\n", -+ inode, lower_inode, bindex, istart, iend); -+ } -+} -+ -+void __unionfs_check_dentry(const struct dentry *dentry, -+ const char *fname, const char *fxn, int line) -+{ -+ int bindex; -+ int dstart, dend, istart, iend; -+ struct dentry *lower_dentry; -+ struct inode *inode, *lower_inode; -+ struct super_block *sb; -+ struct vfsmount *lower_mnt; -+ int printed_caller = 0; -+ void *poison_ptr; -+ -+ BUG_ON(!dentry); -+ sb = dentry->d_sb; -+ inode = dentry->d_inode; -+ dstart = dbstart(dentry); -+ dend = dbend(dentry); -+ /* don't check dentry/mnt if no lower branches */ -+ if (dstart < 0 && dend < 0) -+ goto check_inode; -+ BUG_ON(dstart > dend); -+ -+ if (unlikely((dstart == -1 && dend != -1) || -+ (dstart != -1 && dend == -1))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CD0: dentry=%p dstart/end=%d:%d\n", -+ dentry, dstart, dend); -+ } -+ /* -+ * check for NULL dentries inside the start/end range, or -+ * non-NULL dentries outside the start/end range. -+ */ -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (lower_dentry) { -+ if (unlikely(bindex < dstart || bindex > dend)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CD1: dentry/lower=%p:%p(%p) " -+ "bindex=%d dstart/end=%d:%d\n", -+ dentry, lower_dentry, -+ (lower_dentry ? lower_dentry->d_inode : -+ (void *) -1L), -+ bindex, dstart, dend); -+ } -+ } else { /* lower_dentry == NULL */ -+ if (bindex < dstart || bindex > dend) -+ continue; -+ /* -+ * Directories can have NULL lower inodes in b/t -+ * start/end, but NOT if at the start/end range. -+ * Ignore this rule, however, if this is a NULL -+ * dentry or a deleted dentry. -+ */ -+ if (unlikely(!d_deleted((struct dentry *) dentry) && -+ inode && -+ !(inode && S_ISDIR(inode->i_mode) && -+ bindex > dstart && bindex < dend))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CD2: dentry/lower=%p:%p(%p) " -+ "bindex=%d dstart/end=%d:%d\n", -+ dentry, lower_dentry, -+ (lower_dentry ? -+ lower_dentry->d_inode : -+ (void *) -1L), -+ bindex, dstart, dend); -+ } -+ } -+ } -+ -+ /* check for vfsmounts same as for dentries */ -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { -+ lower_mnt = unionfs_lower_mnt_idx(dentry, bindex); -+ if (lower_mnt) { -+ if (unlikely(bindex < dstart || bindex > dend)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CM0: dentry/lmnt=%p:%p bindex=%d " -+ "dstart/end=%d:%d\n", dentry, -+ lower_mnt, bindex, dstart, dend); -+ } -+ } else { /* lower_mnt == NULL */ -+ if (bindex < dstart || bindex > dend) -+ continue; -+ /* -+ * Directories can have NULL lower inodes in b/t -+ * start/end, but NOT if at the start/end range. -+ * Ignore this rule, however, if this is a NULL -+ * dentry. -+ */ -+ if (unlikely(inode && -+ !(inode && S_ISDIR(inode->i_mode) && -+ bindex > dstart && bindex < dend))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CM1: dentry/lmnt=%p:%p " -+ "bindex=%d dstart/end=%d:%d\n", -+ dentry, lower_mnt, bindex, -+ dstart, dend); -+ } -+ } -+ } -+ -+check_inode: -+ /* for inodes now */ -+ if (!inode) -+ return; -+ istart = ibstart(inode); -+ iend = ibend(inode); -+ /* don't check inode if no lower branches */ -+ if (istart < 0 && iend < 0) -+ return; -+ BUG_ON(istart > iend); -+ if (unlikely((istart == -1 && iend != -1) || -+ (istart != -1 && iend == -1))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CI0: dentry/inode=%p:%p istart/end=%d:%d\n", -+ dentry, inode, istart, iend); -+ } -+ if (unlikely(istart != dstart)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CI1: dentry/inode=%p:%p istart=%d dstart=%d\n", -+ dentry, inode, istart, dstart); -+ } -+ if (unlikely(iend != dend)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CI2: dentry/inode=%p:%p iend=%d dend=%d\n", -+ dentry, inode, iend, dend); -+ } -+ -+ if (!S_ISDIR(inode->i_mode)) { -+ if (unlikely(dend != dstart)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CI3: dentry/inode=%p:%p dstart=%d dend=%d\n", -+ dentry, inode, dstart, dend); -+ } -+ if (unlikely(iend != istart)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CI4: dentry/inode=%p:%p istart=%d iend=%d\n", -+ dentry, inode, istart, iend); -+ } -+ } -+ -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (lower_inode) { -+ memset(&poison_ptr, POISON_INUSE, sizeof(void *)); -+ if (unlikely(bindex < istart || bindex > iend)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CI5: dentry/linode=%p:%p bindex=%d " -+ "istart/end=%d:%d\n", dentry, -+ lower_inode, bindex, istart, iend); -+ } else if (unlikely(lower_inode == poison_ptr)) { -+ /* freed inode! */ -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CI6: dentry/linode=%p:%p bindex=%d " -+ "istart/end=%d:%d\n", dentry, -+ lower_inode, bindex, istart, iend); -+ } -+ continue; -+ } -+ /* if we get here, then lower_inode == NULL */ -+ if (bindex < istart || bindex > iend) -+ continue; -+ /* -+ * directories can have NULL lower inodes in b/t start/end, -+ * but NOT if at the start/end range. -+ */ -+ if (unlikely(S_ISDIR(inode->i_mode) && -+ bindex > istart && bindex < iend)) -+ continue; -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CI7: dentry/linode=%p:%p " -+ "bindex=%d istart/end=%d:%d\n", -+ dentry, lower_inode, bindex, istart, iend); -+ } -+ -+ /* -+ * If it's a directory, then intermediate objects b/t start/end can -+ * be NULL. But, check that all three are NULL: lower dentry, mnt, -+ * and inode. -+ */ -+ if (dstart >= 0 && dend >= 0 && S_ISDIR(inode->i_mode)) -+ for (bindex = dstart+1; bindex < dend; bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ lower_dentry = unionfs_lower_dentry_idx(dentry, -+ bindex); -+ lower_mnt = unionfs_lower_mnt_idx(dentry, bindex); -+ if (unlikely(!((lower_inode && lower_dentry && -+ lower_mnt) || -+ (!lower_inode && -+ !lower_dentry && !lower_mnt)))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" Cx: lmnt/ldentry/linode=%p:%p:%p " -+ "bindex=%d dstart/end=%d:%d\n", -+ lower_mnt, lower_dentry, lower_inode, -+ bindex, dstart, dend); -+ } -+ } -+ /* check if lower inode is newer than upper one (it shouldn't) */ -+ if (unlikely(is_newer_lower(dentry) && !is_negative_lower(dentry))) { -+ PRINT_CALLER(fname, fxn, line); -+ for (bindex = ibstart(inode); bindex <= ibend(inode); -+ bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (unlikely(!lower_inode)) -+ continue; -+ pr_debug(" CI8: bindex=%d mtime/lmtime=%lu.%lu/%lu.%lu " -+ "ctime/lctime=%lu.%lu/%lu.%lu\n", -+ bindex, -+ inode->i_mtime.tv_sec, -+ inode->i_mtime.tv_nsec, -+ lower_inode->i_mtime.tv_sec, -+ lower_inode->i_mtime.tv_nsec, -+ inode->i_ctime.tv_sec, -+ inode->i_ctime.tv_nsec, -+ lower_inode->i_ctime.tv_sec, -+ lower_inode->i_ctime.tv_nsec); -+ } -+ } -+} -+ -+void __unionfs_check_file(const struct file *file, -+ const char *fname, const char *fxn, int line) -+{ -+ int bindex; -+ int dstart, dend, fstart, fend; -+ struct dentry *dentry; -+ struct file *lower_file; -+ struct inode *inode; -+ struct super_block *sb; -+ int printed_caller = 0; -+ -+ BUG_ON(!file); -+ dentry = file->f_path.dentry; -+ sb = dentry->d_sb; -+ dstart = dbstart(dentry); -+ dend = dbend(dentry); -+ BUG_ON(dstart > dend); -+ fstart = fbstart(file); -+ fend = fbend(file); -+ BUG_ON(fstart > fend); -+ -+ if (unlikely((fstart == -1 && fend != -1) || -+ (fstart != -1 && fend == -1))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CF0: file/dentry=%p:%p fstart/end=%d:%d\n", -+ file, dentry, fstart, fend); -+ } -+ if (unlikely(fstart != dstart)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CF1: file/dentry=%p:%p fstart=%d dstart=%d\n", -+ file, dentry, fstart, dstart); -+ } -+ if (unlikely(fend != dend)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CF2: file/dentry=%p:%p fend=%d dend=%d\n", -+ file, dentry, fend, dend); -+ } -+ inode = dentry->d_inode; -+ if (!S_ISDIR(inode->i_mode)) { -+ if (unlikely(fend != fstart)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CF3: file/inode=%p:%p fstart=%d fend=%d\n", -+ file, inode, fstart, fend); -+ } -+ if (unlikely(dend != dstart)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CF4: file/dentry=%p:%p dstart=%d dend=%d\n", -+ file, dentry, dstart, dend); -+ } -+ } -+ -+ /* -+ * check for NULL dentries inside the start/end range, or -+ * non-NULL dentries outside the start/end range. -+ */ -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { -+ lower_file = unionfs_lower_file_idx(file, bindex); -+ if (lower_file) { -+ if (unlikely(bindex < fstart || bindex > fend)) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CF5: file/lower=%p:%p bindex=%d " -+ "fstart/end=%d:%d\n", file, -+ lower_file, bindex, fstart, fend); -+ } -+ } else { /* lower_file == NULL */ -+ if (bindex >= fstart && bindex <= fend) { -+ /* -+ * directories can have NULL lower inodes in -+ * b/t start/end, but NOT if at the -+ * start/end range. -+ */ -+ if (unlikely(!(S_ISDIR(inode->i_mode) && -+ bindex > fstart && -+ bindex < fend))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CF6: file/lower=%p:%p " -+ "bindex=%d fstart/end=%d:%d\n", -+ file, lower_file, bindex, -+ fstart, fend); -+ } -+ } -+ } -+ } -+ -+ __unionfs_check_dentry(dentry, fname, fxn, line); -+} -+ -+void __unionfs_check_nd(const struct nameidata *nd, -+ const char *fname, const char *fxn, int line) -+{ -+ struct file *file; -+ int printed_caller = 0; -+ -+ if (unlikely(!nd)) -+ return; -+ if (nd->flags & LOOKUP_OPEN) { -+ file = nd->intent.open.file; -+ if (unlikely(file->f_path.dentry && -+ strcmp(file->f_path.dentry->d_sb->s_type->name, -+ UNIONFS_NAME))) { -+ PRINT_CALLER(fname, fxn, line); -+ pr_debug(" CND1: lower_file of type %s\n", -+ file->f_path.dentry->d_sb->s_type->name); -+ } -+ } -+} -+ -+static unsigned int __mnt_get_count(struct vfsmount *mnt) -+{ -+#ifdef CONFIG_SMP -+ unsigned int count = 0; -+ int cpu; -+ -+ for_each_possible_cpu(cpu) { -+ count += per_cpu_ptr(mnt->mnt_pcp, cpu)->mnt_count; -+ } -+ -+ return count; -+#else -+ return mnt->mnt_count; -+#endif -+} -+ -+/* useful to track vfsmount leaks that could cause EBUSY on unmount */ -+void __show_branch_counts(const struct super_block *sb, -+ const char *file, const char *fxn, int line) -+{ -+ int i; -+ struct vfsmount *mnt; -+ -+ pr_debug("BC:"); -+ for (i = 0; i < sbmax(sb); i++) { -+ if (likely(sb->s_root)) -+ mnt = UNIONFS_D(sb->s_root)->lower_paths[i].mnt; -+ else -+ mnt = NULL; -+ printk(KERN_CONT "%d:", -+ (mnt ? __mnt_get_count(mnt) : -99)); -+ } -+ printk(KERN_CONT "%s:%s:%d\n", file, fxn, line); -+} -+ -+void __show_inode_times(const struct inode *inode, -+ const char *file, const char *fxn, int line) -+{ -+ struct inode *lower_inode; -+ int bindex; -+ -+ for (bindex = ibstart(inode); bindex <= ibend(inode); bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (unlikely(!lower_inode)) -+ continue; -+ pr_debug("IT(%lu:%d): %s:%s:%d " -+ "um=%lu/%lu lm=%lu/%lu uc=%lu/%lu lc=%lu/%lu\n", -+ inode->i_ino, bindex, -+ file, fxn, line, -+ inode->i_mtime.tv_sec, inode->i_mtime.tv_nsec, -+ lower_inode->i_mtime.tv_sec, -+ lower_inode->i_mtime.tv_nsec, -+ inode->i_ctime.tv_sec, inode->i_ctime.tv_nsec, -+ lower_inode->i_ctime.tv_sec, -+ lower_inode->i_ctime.tv_nsec); -+ } -+} -+ -+void __show_dinode_times(const struct dentry *dentry, -+ const char *file, const char *fxn, int line) -+{ -+ struct inode *inode = dentry->d_inode; -+ struct inode *lower_inode; -+ int bindex; -+ -+ for (bindex = ibstart(inode); bindex <= ibend(inode); bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (!lower_inode) -+ continue; -+ pr_debug("DT(%s:%lu:%d): %s:%s:%d " -+ "um=%lu/%lu lm=%lu/%lu uc=%lu/%lu lc=%lu/%lu\n", -+ dentry->d_name.name, inode->i_ino, bindex, -+ file, fxn, line, -+ inode->i_mtime.tv_sec, inode->i_mtime.tv_nsec, -+ lower_inode->i_mtime.tv_sec, -+ lower_inode->i_mtime.tv_nsec, -+ inode->i_ctime.tv_sec, inode->i_ctime.tv_nsec, -+ lower_inode->i_ctime.tv_sec, -+ lower_inode->i_ctime.tv_nsec); -+ } -+} -+ -+void __show_inode_counts(const struct inode *inode, -+ const char *file, const char *fxn, int line) -+{ -+ struct inode *lower_inode; -+ int bindex; -+ -+ if (unlikely(!inode)) { -+ pr_debug("SiC: Null inode\n"); -+ return; -+ } -+ for (bindex = sbstart(inode->i_sb); bindex <= sbend(inode->i_sb); -+ bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (unlikely(!lower_inode)) -+ continue; -+ pr_debug("SIC(%lu:%d:%d): lc=%d %s:%s:%d\n", -+ inode->i_ino, bindex, -+ atomic_read(&(inode)->i_count), -+ atomic_read(&(lower_inode)->i_count), -+ file, fxn, line); -+ } -+} -diff --git a/fs/unionfs/dentry.c b/fs/unionfs/dentry.c -new file mode 100644 -index 0000000..c0205a4 ---- /dev/null -+++ b/fs/unionfs/dentry.c -@@ -0,0 +1,406 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+bool is_negative_lower(const struct dentry *dentry) -+{ -+ int bindex; -+ struct dentry *lower_dentry; -+ -+ BUG_ON(!dentry); -+ /* cache coherency: check if file was deleted on lower branch */ -+ if (dbstart(dentry) < 0) -+ return true; -+ for (bindex = dbstart(dentry); bindex <= dbend(dentry); bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ /* unhashed (i.e., unlinked) lower dentries don't count */ -+ if (lower_dentry && lower_dentry->d_inode && -+ !d_deleted(lower_dentry) && -+ !(lower_dentry->d_flags & DCACHE_NFSFS_RENAMED)) -+ return false; -+ } -+ return true; -+} -+ -+static inline void __dput_lowers(struct dentry *dentry, int start, int end) -+{ -+ struct dentry *lower_dentry; -+ int bindex; -+ -+ if (start < 0) -+ return; -+ for (bindex = start; bindex <= end; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) -+ continue; -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); -+ dput(lower_dentry); -+ } -+} -+ -+/* -+ * Purge and invalidate as many data pages of a unionfs inode. This is -+ * called when the lower inode has changed, and we want to force processes -+ * to re-get the new data. -+ */ -+static inline void purge_inode_data(struct inode *inode) -+{ -+ /* remove all non-private mappings */ -+ unmap_mapping_range(inode->i_mapping, 0, 0, 0); -+ /* invalidate as many pages as possible */ -+ invalidate_mapping_pages(inode->i_mapping, 0, -1); -+ /* -+ * Don't try to truncate_inode_pages here, because this could lead -+ * to a deadlock between some of address_space ops and dentry -+ * revalidation: the address space op is invoked with a lock on our -+ * own page, and truncate_inode_pages will block on locked pages. -+ */ -+} -+ -+/* -+ * Revalidate a single file/symlink/special dentry. Assume that info nodes -+ * of the @dentry and its @parent are locked. Assume parent is valid, -+ * otherwise return false (and let's hope the VFS will try to re-lookup this -+ * dentry). Returns true if valid, false otherwise. -+ */ -+bool __unionfs_d_revalidate(struct dentry *dentry, struct dentry *parent, -+ bool willwrite) -+{ -+ bool valid = true; /* default is valid */ -+ struct dentry *lower_dentry; -+ struct dentry *result; -+ int bindex, bstart, bend; -+ int sbgen, dgen, pdgen; -+ int positive = 0; -+ int interpose_flag; -+ -+ verify_locked(dentry); -+ verify_locked(parent); -+ -+ /* if the dentry is unhashed, do NOT revalidate */ -+ if (d_deleted(dentry)) -+ goto out; -+ -+ dgen = atomic_read(&UNIONFS_D(dentry)->generation); -+ -+ if (is_newer_lower(dentry)) { -+ /* root dentry is always valid */ -+ if (IS_ROOT(dentry)) { -+ unionfs_copy_attr_times(dentry->d_inode); -+ } else { -+ /* -+ * reset generation number to zero, guaranteed to be -+ * "old" -+ */ -+ dgen = 0; -+ atomic_set(&UNIONFS_D(dentry)->generation, dgen); -+ } -+ if (!willwrite) -+ purge_inode_data(dentry->d_inode); -+ } -+ -+ sbgen = atomic_read(&UNIONFS_SB(dentry->d_sb)->generation); -+ -+ BUG_ON(dbstart(dentry) == -1); -+ if (dentry->d_inode) -+ positive = 1; -+ -+ /* if our dentry is valid, then validate all lower ones */ -+ if (sbgen == dgen) -+ goto validate_lowers; -+ -+ /* The root entry should always be valid */ -+ BUG_ON(IS_ROOT(dentry)); -+ -+ /* We can't work correctly if our parent isn't valid. */ -+ pdgen = atomic_read(&UNIONFS_D(parent)->generation); -+ -+ /* Free the pointers for our inodes and this dentry. */ -+ path_put_lowers_all(dentry, false); -+ -+ interpose_flag = INTERPOSE_REVAL_NEG; -+ if (positive) { -+ interpose_flag = INTERPOSE_REVAL; -+ iput_lowers_all(dentry->d_inode, true); -+ } -+ -+ if (realloc_dentry_private_data(dentry) != 0) { -+ valid = false; -+ goto out; -+ } -+ -+ result = unionfs_lookup_full(dentry, parent, interpose_flag); -+ if (result) { -+ if (IS_ERR(result)) { -+ valid = false; -+ goto out; -+ } -+ /* -+ * current unionfs_lookup_backend() doesn't return -+ * a valid dentry -+ */ -+ dput(dentry); -+ dentry = result; -+ } -+ -+ if (unlikely(positive && is_negative_lower(dentry))) { -+ /* call make_bad_inode here ? */ -+ d_drop(dentry); -+ valid = false; -+ goto out; -+ } -+ -+ /* -+ * if we got here then we have revalidated our dentry and all lower -+ * ones, so we can return safely. -+ */ -+ if (!valid) /* lower dentry revalidation failed */ -+ goto out; -+ -+ /* -+ * If the parent's gen no. matches the superblock's gen no., then -+ * we can update our denty's gen no. If they didn't match, then it -+ * was OK to revalidate this dentry with a stale parent, but we'll -+ * purposely not update our dentry's gen no. (so it can be redone); -+ * and, we'll mark our parent dentry as invalid so it'll force it -+ * (and our dentry) to be revalidated. -+ */ -+ if (pdgen == sbgen) -+ atomic_set(&UNIONFS_D(dentry)->generation, sbgen); -+ goto out; -+ -+validate_lowers: -+ -+ /* The revalidation must occur across all branches */ -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ BUG_ON(bstart == -1); -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ int err; -+ struct nameidata lower_nd; -+ -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry || !lower_dentry->d_op -+ || !lower_dentry->d_op->d_revalidate) -+ continue; -+ /* -+ * Don't pass nameidata to lower file system, because we -+ * don't want an arbitrary lower file being opened or -+ * returned to us: it may be useless to us because of the -+ * fanout nature of unionfs (cf. file/directory open-file -+ * invariants). We will open lower files as and when needed -+ * later on. -+ */ -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); -+ if (unlikely(err < 0)) { -+ valid = false; -+ break; -+ } -+ if (!lower_dentry->d_op->d_revalidate(lower_dentry, &lower_nd)) -+ valid = false; -+ release_lower_nd(&lower_nd, err); -+ } -+ -+ if (!dentry->d_inode || -+ ibstart(dentry->d_inode) < 0 || -+ ibend(dentry->d_inode) < 0) { -+ valid = false; -+ goto out; -+ } -+ -+ if (valid) { -+ /* -+ * If we get here, and we copy the meta-data from the lower -+ * inode to our inode, then it is vital that we have already -+ * purged all unionfs-level file data. We do that in the -+ * caller (__unionfs_d_revalidate) by calling -+ * purge_inode_data. -+ */ -+ unionfs_copy_attr_all(dentry->d_inode, -+ unionfs_lower_inode(dentry->d_inode)); -+ fsstack_copy_inode_size(dentry->d_inode, -+ unionfs_lower_inode(dentry->d_inode)); -+ } -+ -+out: -+ return valid; -+} -+ -+/* -+ * Determine if the lower inode objects have changed from below the unionfs -+ * inode. Return true if changed, false otherwise. -+ * -+ * We check if the mtime or ctime have changed. However, the inode times -+ * can be changed by anyone without much protection, including -+ * asynchronously. This can sometimes cause unionfs to find that the lower -+ * file system doesn't change its inode times quick enough, resulting in a -+ * false positive indication (which is harmless, it just makes unionfs do -+ * extra work in re-validating the objects). To minimize the chances of -+ * these situations, we still consider such small time changes valid, but we -+ * don't print debugging messages unless the time changes are greater than -+ * UNIONFS_MIN_CC_TIME (which defaults to 3 seconds, as with NFS's acregmin) -+ * because significant changes are more likely due to users manually -+ * touching lower files. -+ */ -+bool is_newer_lower(const struct dentry *dentry) -+{ -+ int bindex; -+ struct inode *inode; -+ struct inode *lower_inode; -+ -+ /* ignore if we're called on semi-initialized dentries/inodes */ -+ if (!dentry || !UNIONFS_D(dentry)) -+ return false; -+ inode = dentry->d_inode; -+ if (!inode || !UNIONFS_I(inode)->lower_inodes || -+ ibstart(inode) < 0 || ibend(inode) < 0) -+ return false; -+ -+ for (bindex = ibstart(inode); bindex <= ibend(inode); bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (!lower_inode) -+ continue; -+ -+ /* check if mtime/ctime have changed */ -+ if (unlikely(timespec_compare(&inode->i_mtime, -+ &lower_inode->i_mtime) < 0)) { -+ if ((lower_inode->i_mtime.tv_sec - -+ inode->i_mtime.tv_sec) > UNIONFS_MIN_CC_TIME) { -+ pr_info("unionfs: new lower inode mtime " -+ "(bindex=%d, name=%s)\n", bindex, -+ dentry->d_name.name); -+ show_dinode_times(dentry); -+ } -+ return true; -+ } -+ if (unlikely(timespec_compare(&inode->i_ctime, -+ &lower_inode->i_ctime) < 0)) { -+ if ((lower_inode->i_ctime.tv_sec - -+ inode->i_ctime.tv_sec) > UNIONFS_MIN_CC_TIME) { -+ pr_info("unionfs: new lower inode ctime " -+ "(bindex=%d, name=%s)\n", bindex, -+ dentry->d_name.name); -+ show_dinode_times(dentry); -+ } -+ return true; -+ } -+ } -+ -+ /* -+ * Last check: if this is a positive dentry, but somehow all lower -+ * dentries are negative or unhashed, then this dentry needs to be -+ * revalidated, because someone probably deleted the objects from -+ * the lower branches directly. -+ */ -+ if (is_negative_lower(dentry)) -+ return true; -+ -+ return false; /* default: lower is not newer */ -+} -+ -+static int unionfs_d_revalidate(struct dentry *dentry, -+ struct nameidata *nd_unused) -+{ -+ bool valid = true; -+ int err = 1; /* 1 means valid for the VFS */ -+ struct dentry *parent; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (valid) { -+ unionfs_postcopyup_setmnt(dentry); -+ unionfs_check_dentry(dentry); -+ } else { -+ d_drop(dentry); -+ err = valid; -+ } -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ -+ return err; -+} -+ -+static void unionfs_d_release(struct dentry *dentry) -+{ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ if (unlikely(!UNIONFS_D(dentry))) -+ goto out; /* skip if no lower branches */ -+ /* must lock our branch configuration here */ -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ unionfs_check_dentry(dentry); -+ /* this could be a negative dentry, so check first */ -+ if (dbstart(dentry) < 0) { -+ unionfs_unlock_dentry(dentry); -+ goto out; /* due to a (normal) failed lookup */ -+ } -+ -+ /* Release all the lower dentries */ -+ path_put_lowers_all(dentry, true); -+ -+ unionfs_unlock_dentry(dentry); -+ -+out: -+ free_dentry_private_data(dentry); -+ unionfs_read_unlock(dentry->d_sb); -+ return; -+} -+ -+/* -+ * Called when we're removing the last reference to our dentry. So we -+ * should drop all lower references too. -+ */ -+static void unionfs_d_iput(struct dentry *dentry, struct inode *inode) -+{ -+ int rc; -+ -+ BUG_ON(!dentry); -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ if (!UNIONFS_D(dentry) || dbstart(dentry) < 0) -+ goto drop_lower_inodes; -+ path_put_lowers_all(dentry, false); -+ -+drop_lower_inodes: -+ rc = atomic_read(&inode->i_count); -+ if (rc == 1 && inode->i_nlink == 1 && ibstart(inode) >= 0) { -+ /* see Documentation/filesystems/unionfs/issues.txt */ -+ lockdep_off(); -+ iput(unionfs_lower_inode(inode)); -+ lockdep_on(); -+ unionfs_set_lower_inode(inode, NULL); -+ /* XXX: may need to set start/end to -1? */ -+ } -+ -+ iput(inode); -+ -+ unionfs_unlock_dentry(dentry); -+ unionfs_read_unlock(dentry->d_sb); -+} -+ -+struct dentry_operations unionfs_dops = { -+ .d_revalidate = unionfs_d_revalidate, -+ .d_release = unionfs_d_release, -+ .d_iput = unionfs_d_iput, -+}; -diff --git a/fs/unionfs/dirfops.c b/fs/unionfs/dirfops.c -new file mode 100644 -index 0000000..72a9c1a ---- /dev/null -+++ b/fs/unionfs/dirfops.c -@@ -0,0 +1,302 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* Make sure our rdstate is playing by the rules. */ -+static void verify_rdstate_offset(struct unionfs_dir_state *rdstate) -+{ -+ BUG_ON(rdstate->offset >= DIREOF); -+ BUG_ON(rdstate->cookie >= MAXRDCOOKIE); -+} -+ -+struct unionfs_getdents_callback { -+ struct unionfs_dir_state *rdstate; -+ void *dirent; -+ int entries_written; -+ int filldir_called; -+ int filldir_error; -+ filldir_t filldir; -+ struct super_block *sb; -+}; -+ -+/* based on generic filldir in fs/readir.c */ -+static int unionfs_filldir(void *dirent, const char *oname, int namelen, -+ loff_t offset, u64 ino, unsigned int d_type) -+{ -+ struct unionfs_getdents_callback *buf = dirent; -+ struct filldir_node *found = NULL; -+ int err = 0; -+ int is_whiteout; -+ char *name = (char *) oname; -+ -+ buf->filldir_called++; -+ -+ is_whiteout = is_whiteout_name(&name, &namelen); -+ -+ found = find_filldir_node(buf->rdstate, name, namelen, is_whiteout); -+ -+ if (found) { -+ /* -+ * If we had non-whiteout entry in dir cache, then mark it -+ * as a whiteout and but leave it in the dir cache. -+ */ -+ if (is_whiteout && !found->whiteout) -+ found->whiteout = is_whiteout; -+ goto out; -+ } -+ -+ /* if 'name' isn't a whiteout, filldir it. */ -+ if (!is_whiteout) { -+ off_t pos = rdstate2offset(buf->rdstate); -+ u64 unionfs_ino = ino; -+ -+ err = buf->filldir(buf->dirent, name, namelen, pos, -+ unionfs_ino, d_type); -+ buf->rdstate->offset++; -+ verify_rdstate_offset(buf->rdstate); -+ } -+ /* -+ * If we did fill it, stuff it in our hash, otherwise return an -+ * error. -+ */ -+ if (err) { -+ buf->filldir_error = err; -+ goto out; -+ } -+ buf->entries_written++; -+ err = add_filldir_node(buf->rdstate, name, namelen, -+ buf->rdstate->bindex, is_whiteout); -+ if (err) -+ buf->filldir_error = err; -+ -+out: -+ return err; -+} -+ -+static int unionfs_readdir(struct file *file, void *dirent, filldir_t filldir) -+{ -+ int err = 0; -+ struct file *lower_file = NULL; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ struct inode *inode = NULL; -+ struct unionfs_getdents_callback buf; -+ struct unionfs_dir_state *uds; -+ int bend; -+ loff_t offset; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, false); -+ if (unlikely(err)) -+ goto out; -+ -+ inode = dentry->d_inode; -+ -+ uds = UNIONFS_F(file)->rdstate; -+ if (!uds) { -+ if (file->f_pos == DIREOF) { -+ goto out; -+ } else if (file->f_pos > 0) { -+ uds = find_rdstate(inode, file->f_pos); -+ if (unlikely(!uds)) { -+ err = -ESTALE; -+ goto out; -+ } -+ UNIONFS_F(file)->rdstate = uds; -+ } else { -+ init_rdstate(file); -+ uds = UNIONFS_F(file)->rdstate; -+ } -+ } -+ bend = fbend(file); -+ -+ while (uds->bindex <= bend) { -+ lower_file = unionfs_lower_file_idx(file, uds->bindex); -+ if (!lower_file) { -+ uds->bindex++; -+ uds->dirpos = 0; -+ continue; -+ } -+ -+ /* prepare callback buffer */ -+ buf.filldir_called = 0; -+ buf.filldir_error = 0; -+ buf.entries_written = 0; -+ buf.dirent = dirent; -+ buf.filldir = filldir; -+ buf.rdstate = uds; -+ buf.sb = inode->i_sb; -+ -+ /* Read starting from where we last left off. */ -+ offset = vfs_llseek(lower_file, uds->dirpos, SEEK_SET); -+ if (offset < 0) { -+ err = offset; -+ goto out; -+ } -+ err = vfs_readdir(lower_file, unionfs_filldir, &buf); -+ -+ /* Save the position for when we continue. */ -+ offset = vfs_llseek(lower_file, 0, SEEK_CUR); -+ if (offset < 0) { -+ err = offset; -+ goto out; -+ } -+ uds->dirpos = offset; -+ -+ /* Copy the atime. */ -+ fsstack_copy_attr_atime(inode, -+ lower_file->f_path.dentry->d_inode); -+ -+ if (err < 0) -+ goto out; -+ -+ if (buf.filldir_error) -+ break; -+ -+ if (!buf.entries_written) { -+ uds->bindex++; -+ uds->dirpos = 0; -+ } -+ } -+ -+ if (!buf.filldir_error && uds->bindex >= bend) { -+ /* Save the number of hash entries for next time. */ -+ UNIONFS_I(inode)->hashsize = uds->hashentries; -+ free_rdstate(uds); -+ UNIONFS_F(file)->rdstate = NULL; -+ file->f_pos = DIREOF; -+ } else { -+ file->f_pos = rdstate2offset(uds); -+ } -+ -+out: -+ if (!err) -+ unionfs_check_file(file); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+/* -+ * This is not meant to be a generic repositioning function. If you do -+ * things that aren't supported, then we return EINVAL. -+ * -+ * What is allowed: -+ * (1) seeking to the same position that you are currently at -+ * This really has no effect, but returns where you are. -+ * (2) seeking to the beginning of the file -+ * This throws out all state, and lets you begin again. -+ */ -+static loff_t unionfs_dir_llseek(struct file *file, loff_t offset, int origin) -+{ -+ struct unionfs_dir_state *rdstate; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ loff_t err; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, false); -+ if (unlikely(err)) -+ goto out; -+ -+ rdstate = UNIONFS_F(file)->rdstate; -+ -+ /* -+ * we let users seek to their current position, but not anywhere -+ * else. -+ */ -+ if (!offset) { -+ switch (origin) { -+ case SEEK_SET: -+ if (rdstate) { -+ free_rdstate(rdstate); -+ UNIONFS_F(file)->rdstate = NULL; -+ } -+ init_rdstate(file); -+ err = 0; -+ break; -+ case SEEK_CUR: -+ err = file->f_pos; -+ break; -+ case SEEK_END: -+ /* Unsupported, because we would break everything. */ -+ err = -EINVAL; -+ break; -+ } -+ } else { -+ switch (origin) { -+ case SEEK_SET: -+ if (rdstate) { -+ if (offset == rdstate2offset(rdstate)) -+ err = offset; -+ else if (file->f_pos == DIREOF) -+ err = DIREOF; -+ else -+ err = -EINVAL; -+ } else { -+ struct inode *inode; -+ inode = dentry->d_inode; -+ rdstate = find_rdstate(inode, offset); -+ if (rdstate) { -+ UNIONFS_F(file)->rdstate = rdstate; -+ err = rdstate->offset; -+ } else { -+ err = -EINVAL; -+ } -+ } -+ break; -+ case SEEK_CUR: -+ case SEEK_END: -+ /* Unsupported, because we would break everything. */ -+ err = -EINVAL; -+ break; -+ } -+ } -+ -+out: -+ if (!err) -+ unionfs_check_file(file); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+/* -+ * Trimmed directory options, we shouldn't pass everything down since -+ * we don't want to operate on partial directories. -+ */ -+struct file_operations unionfs_dir_fops = { -+ .llseek = unionfs_dir_llseek, -+ .read = generic_read_dir, -+ .readdir = unionfs_readdir, -+ .unlocked_ioctl = unionfs_ioctl, -+ .open = unionfs_open, -+ .release = unionfs_file_release, -+ .flush = unionfs_flush, -+ .fsync = unionfs_fsync, -+ .fasync = unionfs_fasync, -+}; -diff --git a/fs/unionfs/dirhelper.c b/fs/unionfs/dirhelper.c -new file mode 100644 -index 0000000..62ec9af ---- /dev/null -+++ b/fs/unionfs/dirhelper.c -@@ -0,0 +1,158 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+#define RD_NONE 0 -+#define RD_CHECK_EMPTY 1 -+/* The callback structure for check_empty. */ -+struct unionfs_rdutil_callback { -+ int err; -+ int filldir_called; -+ struct unionfs_dir_state *rdstate; -+ int mode; -+}; -+ -+/* This filldir function makes sure only whiteouts exist within a directory. */ -+static int readdir_util_callback(void *dirent, const char *oname, int namelen, -+ loff_t offset, u64 ino, unsigned int d_type) -+{ -+ int err = 0; -+ struct unionfs_rdutil_callback *buf = dirent; -+ int is_whiteout; -+ struct filldir_node *found; -+ char *name = (char *) oname; -+ -+ buf->filldir_called = 1; -+ -+ if (name[0] == '.' && (namelen == 1 || -+ (name[1] == '.' && namelen == 2))) -+ goto out; -+ -+ is_whiteout = is_whiteout_name(&name, &namelen); -+ -+ found = find_filldir_node(buf->rdstate, name, namelen, is_whiteout); -+ /* If it was found in the table there was a previous whiteout. */ -+ if (found) -+ goto out; -+ -+ /* -+ * if it wasn't found and isn't a whiteout, the directory isn't -+ * empty. -+ */ -+ err = -ENOTEMPTY; -+ if ((buf->mode == RD_CHECK_EMPTY) && !is_whiteout) -+ goto out; -+ -+ err = add_filldir_node(buf->rdstate, name, namelen, -+ buf->rdstate->bindex, is_whiteout); -+ -+out: -+ buf->err = err; -+ return err; -+} -+ -+/* Is a directory logically empty? */ -+int check_empty(struct dentry *dentry, struct dentry *parent, -+ struct unionfs_dir_state **namelist) -+{ -+ int err = 0; -+ struct dentry *lower_dentry = NULL; -+ struct vfsmount *mnt; -+ struct super_block *sb; -+ struct file *lower_file; -+ struct unionfs_rdutil_callback *buf = NULL; -+ int bindex, bstart, bend, bopaque; -+ -+ sb = dentry->d_sb; -+ -+ -+ BUG_ON(!S_ISDIR(dentry->d_inode->i_mode)); -+ -+ err = unionfs_partial_lookup(dentry, parent); -+ if (err) -+ goto out; -+ -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ bopaque = dbopaque(dentry); -+ if (0 <= bopaque && bopaque < bend) -+ bend = bopaque; -+ -+ buf = kmalloc(sizeof(struct unionfs_rdutil_callback), GFP_KERNEL); -+ if (unlikely(!buf)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ buf->err = 0; -+ buf->mode = RD_CHECK_EMPTY; -+ buf->rdstate = alloc_rdstate(dentry->d_inode, bstart); -+ if (unlikely(!buf->rdstate)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ -+ /* Process the lower directories with rdutil_callback as a filldir. */ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) -+ continue; -+ if (!lower_dentry->d_inode) -+ continue; -+ if (!S_ISDIR(lower_dentry->d_inode->i_mode)) -+ continue; -+ -+ dget(lower_dentry); -+ mnt = unionfs_mntget(dentry, bindex); -+ branchget(sb, bindex); -+ lower_file = dentry_open(lower_dentry, mnt, O_RDONLY, current_cred()); -+ if (IS_ERR(lower_file)) { -+ err = PTR_ERR(lower_file); -+ branchput(sb, bindex); -+ goto out; -+ } -+ -+ do { -+ buf->filldir_called = 0; -+ buf->rdstate->bindex = bindex; -+ err = vfs_readdir(lower_file, -+ readdir_util_callback, buf); -+ if (buf->err) -+ err = buf->err; -+ } while ((err >= 0) && buf->filldir_called); -+ -+ /* fput calls dput for lower_dentry */ -+ fput(lower_file); -+ branchput(sb, bindex); -+ -+ if (err < 0) -+ goto out; -+ } -+ -+out: -+ if (buf) { -+ if (namelist && !err) -+ *namelist = buf->rdstate; -+ else if (buf->rdstate) -+ free_rdstate(buf->rdstate); -+ kfree(buf); -+ } -+ -+ -+ return err; -+} -diff --git a/fs/unionfs/fanout.h b/fs/unionfs/fanout.h -new file mode 100644 -index 0000000..ae1b86a ---- /dev/null -+++ b/fs/unionfs/fanout.h -@@ -0,0 +1,407 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _FANOUT_H_ -+#define _FANOUT_H_ -+ -+/* -+ * Inode to private data -+ * -+ * Since we use containers and the struct inode is _inside_ the -+ * unionfs_inode_info structure, UNIONFS_I will always (given a non-NULL -+ * inode pointer), return a valid non-NULL pointer. -+ */ -+static inline struct unionfs_inode_info *UNIONFS_I(const struct inode *inode) -+{ -+ return container_of(inode, struct unionfs_inode_info, vfs_inode); -+} -+ -+#define ibstart(ino) (UNIONFS_I(ino)->bstart) -+#define ibend(ino) (UNIONFS_I(ino)->bend) -+ -+/* Dentry to private data */ -+#define UNIONFS_D(dent) ((struct unionfs_dentry_info *)(dent)->d_fsdata) -+#define dbstart(dent) (UNIONFS_D(dent)->bstart) -+#define dbend(dent) (UNIONFS_D(dent)->bend) -+#define dbopaque(dent) (UNIONFS_D(dent)->bopaque) -+ -+/* Superblock to private data */ -+#define UNIONFS_SB(super) ((struct unionfs_sb_info *)(super)->s_fs_info) -+#define sbstart(sb) 0 -+#define sbend(sb) (UNIONFS_SB(sb)->bend) -+#define sbmax(sb) (UNIONFS_SB(sb)->bend + 1) -+#define sbhbid(sb) (UNIONFS_SB(sb)->high_branch_id) -+ -+/* File to private Data */ -+#define UNIONFS_F(file) ((struct unionfs_file_info *)((file)->private_data)) -+#define fbstart(file) (UNIONFS_F(file)->bstart) -+#define fbend(file) (UNIONFS_F(file)->bend) -+ -+/* macros to manipulate branch IDs in stored in our superblock */ -+static inline int branch_id(struct super_block *sb, int index) -+{ -+ BUG_ON(!sb || index < 0); -+ return UNIONFS_SB(sb)->data[index].branch_id; -+} -+ -+static inline void set_branch_id(struct super_block *sb, int index, int val) -+{ -+ BUG_ON(!sb || index < 0); -+ UNIONFS_SB(sb)->data[index].branch_id = val; -+} -+ -+static inline void new_branch_id(struct super_block *sb, int index) -+{ -+ BUG_ON(!sb || index < 0); -+ set_branch_id(sb, index, ++UNIONFS_SB(sb)->high_branch_id); -+} -+ -+/* -+ * Find new index of matching branch with an existing superblock of a known -+ * (possibly old) id. This is needed because branches could have been -+ * added/deleted causing the branches of any open files to shift. -+ * -+ * @sb: the new superblock which may have new/different branch IDs -+ * @id: the old/existing id we're looking for -+ * Returns index of newly found branch (0 or greater), -1 otherwise. -+ */ -+static inline int branch_id_to_idx(struct super_block *sb, int id) -+{ -+ int i; -+ for (i = 0; i < sbmax(sb); i++) { -+ if (branch_id(sb, i) == id) -+ return i; -+ } -+ /* in the non-ODF code, this should really never happen */ -+ printk(KERN_WARNING "unionfs: cannot find branch with id %d\n", id); -+ return -1; -+} -+ -+/* File to lower file. */ -+static inline struct file *unionfs_lower_file(const struct file *f) -+{ -+ BUG_ON(!f); -+ return UNIONFS_F(f)->lower_files[fbstart(f)]; -+} -+ -+static inline struct file *unionfs_lower_file_idx(const struct file *f, -+ int index) -+{ -+ BUG_ON(!f || index < 0); -+ return UNIONFS_F(f)->lower_files[index]; -+} -+ -+static inline void unionfs_set_lower_file_idx(struct file *f, int index, -+ struct file *val) -+{ -+ BUG_ON(!f || index < 0); -+ UNIONFS_F(f)->lower_files[index] = val; -+ /* save branch ID (may be redundant?) */ -+ UNIONFS_F(f)->saved_branch_ids[index] = -+ branch_id((f)->f_path.dentry->d_sb, index); -+} -+ -+static inline void unionfs_set_lower_file(struct file *f, struct file *val) -+{ -+ BUG_ON(!f); -+ unionfs_set_lower_file_idx((f), fbstart(f), (val)); -+} -+ -+/* Inode to lower inode. */ -+static inline struct inode *unionfs_lower_inode(const struct inode *i) -+{ -+ BUG_ON(!i); -+ return UNIONFS_I(i)->lower_inodes[ibstart(i)]; -+} -+ -+static inline struct inode *unionfs_lower_inode_idx(const struct inode *i, -+ int index) -+{ -+ BUG_ON(!i || index < 0); -+ return UNIONFS_I(i)->lower_inodes[index]; -+} -+ -+static inline void unionfs_set_lower_inode_idx(struct inode *i, int index, -+ struct inode *val) -+{ -+ BUG_ON(!i || index < 0); -+ UNIONFS_I(i)->lower_inodes[index] = val; -+} -+ -+static inline void unionfs_set_lower_inode(struct inode *i, struct inode *val) -+{ -+ BUG_ON(!i); -+ UNIONFS_I(i)->lower_inodes[ibstart(i)] = val; -+} -+ -+/* Superblock to lower superblock. */ -+static inline struct super_block *unionfs_lower_super( -+ const struct super_block *sb) -+{ -+ BUG_ON(!sb); -+ return UNIONFS_SB(sb)->data[sbstart(sb)].sb; -+} -+ -+static inline struct super_block *unionfs_lower_super_idx( -+ const struct super_block *sb, -+ int index) -+{ -+ BUG_ON(!sb || index < 0); -+ return UNIONFS_SB(sb)->data[index].sb; -+} -+ -+static inline void unionfs_set_lower_super_idx(struct super_block *sb, -+ int index, -+ struct super_block *val) -+{ -+ BUG_ON(!sb || index < 0); -+ UNIONFS_SB(sb)->data[index].sb = val; -+} -+ -+static inline void unionfs_set_lower_super(struct super_block *sb, -+ struct super_block *val) -+{ -+ BUG_ON(!sb); -+ UNIONFS_SB(sb)->data[sbstart(sb)].sb = val; -+} -+ -+/* Branch count macros. */ -+static inline int branch_count(const struct super_block *sb, int index) -+{ -+ BUG_ON(!sb || index < 0); -+ return atomic_read(&UNIONFS_SB(sb)->data[index].open_files); -+} -+ -+static inline void set_branch_count(struct super_block *sb, int index, int val) -+{ -+ BUG_ON(!sb || index < 0); -+ atomic_set(&UNIONFS_SB(sb)->data[index].open_files, val); -+} -+ -+static inline void branchget(struct super_block *sb, int index) -+{ -+ BUG_ON(!sb || index < 0); -+ atomic_inc(&UNIONFS_SB(sb)->data[index].open_files); -+} -+ -+static inline void branchput(struct super_block *sb, int index) -+{ -+ BUG_ON(!sb || index < 0); -+ atomic_dec(&UNIONFS_SB(sb)->data[index].open_files); -+} -+ -+/* Dentry macros */ -+static inline void unionfs_set_lower_dentry_idx(struct dentry *dent, int index, -+ struct dentry *val) -+{ -+ BUG_ON(!dent || index < 0); -+ UNIONFS_D(dent)->lower_paths[index].dentry = val; -+} -+ -+static inline struct dentry *unionfs_lower_dentry_idx( -+ const struct dentry *dent, -+ int index) -+{ -+ BUG_ON(!dent || index < 0); -+ return UNIONFS_D(dent)->lower_paths[index].dentry; -+} -+ -+static inline struct dentry *unionfs_lower_dentry(const struct dentry *dent) -+{ -+ BUG_ON(!dent); -+ return unionfs_lower_dentry_idx(dent, dbstart(dent)); -+} -+ -+static inline void unionfs_set_lower_mnt_idx(struct dentry *dent, int index, -+ struct vfsmount *mnt) -+{ -+ BUG_ON(!dent || index < 0); -+ UNIONFS_D(dent)->lower_paths[index].mnt = mnt; -+} -+ -+static inline struct vfsmount *unionfs_lower_mnt_idx( -+ const struct dentry *dent, -+ int index) -+{ -+ BUG_ON(!dent || index < 0); -+ return UNIONFS_D(dent)->lower_paths[index].mnt; -+} -+ -+static inline struct vfsmount *unionfs_lower_mnt(const struct dentry *dent) -+{ -+ BUG_ON(!dent); -+ return unionfs_lower_mnt_idx(dent, dbstart(dent)); -+} -+ -+/* Macros for locking a dentry. */ -+enum unionfs_dentry_lock_class { -+ UNIONFS_DMUTEX_NORMAL, -+ UNIONFS_DMUTEX_ROOT, -+ UNIONFS_DMUTEX_PARENT, -+ UNIONFS_DMUTEX_CHILD, -+ UNIONFS_DMUTEX_WHITEOUT, -+ UNIONFS_DMUTEX_REVAL_PARENT, /* for file/dentry revalidate */ -+ UNIONFS_DMUTEX_REVAL_CHILD, /* for file/dentry revalidate */ -+}; -+ -+static inline void unionfs_lock_dentry(struct dentry *d, -+ unsigned int subclass) -+{ -+ BUG_ON(!d); -+ mutex_lock_nested(&UNIONFS_D(d)->lock, subclass); -+} -+ -+static inline void unionfs_unlock_dentry(struct dentry *d) -+{ -+ BUG_ON(!d); -+ mutex_unlock(&UNIONFS_D(d)->lock); -+} -+ -+static inline struct dentry *unionfs_lock_parent(struct dentry *d, -+ unsigned int subclass) -+{ -+ struct dentry *p; -+ -+ BUG_ON(!d); -+ p = dget_parent(d); -+ if (p != d) -+ mutex_lock_nested(&UNIONFS_D(p)->lock, subclass); -+ return p; -+} -+ -+static inline void unionfs_unlock_parent(struct dentry *d, struct dentry *p) -+{ -+ BUG_ON(!d); -+ BUG_ON(!p); -+ if (p != d) { -+ BUG_ON(!mutex_is_locked(&UNIONFS_D(p)->lock)); -+ mutex_unlock(&UNIONFS_D(p)->lock); -+ } -+ dput(p); -+} -+ -+static inline void verify_locked(struct dentry *d) -+{ -+ BUG_ON(!d); -+ BUG_ON(!mutex_is_locked(&UNIONFS_D(d)->lock)); -+} -+ -+/* macros to put lower objects */ -+ -+/* -+ * iput lower inodes of an unionfs dentry, from bstart to bend. If -+ * @free_lower is true, then also kfree the memory used to hold the lower -+ * object pointers. -+ */ -+static inline void iput_lowers(struct inode *inode, -+ int bstart, int bend, bool free_lower) -+{ -+ struct inode *lower_inode; -+ int bindex; -+ -+ BUG_ON(!inode); -+ BUG_ON(!UNIONFS_I(inode)); -+ BUG_ON(bstart < 0); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (lower_inode) { -+ unionfs_set_lower_inode_idx(inode, bindex, NULL); -+ /* see Documentation/filesystems/unionfs/issues.txt */ -+ lockdep_off(); -+ iput(lower_inode); -+ lockdep_on(); -+ } -+ } -+ -+ if (free_lower) { -+ kfree(UNIONFS_I(inode)->lower_inodes); -+ UNIONFS_I(inode)->lower_inodes = NULL; -+ } -+} -+ -+/* iput all lower inodes, and reset start/end branch indices to -1 */ -+static inline void iput_lowers_all(struct inode *inode, bool free_lower) -+{ -+ int bstart, bend; -+ -+ BUG_ON(!inode); -+ BUG_ON(!UNIONFS_I(inode)); -+ bstart = ibstart(inode); -+ bend = ibend(inode); -+ BUG_ON(bstart < 0); -+ -+ iput_lowers(inode, bstart, bend, free_lower); -+ ibstart(inode) = ibend(inode) = -1; -+} -+ -+/* -+ * dput/mntput all lower dentries and vfsmounts of an unionfs dentry, from -+ * bstart to bend. If @free_lower is true, then also kfree the memory used -+ * to hold the lower object pointers. -+ * -+ * XXX: implement using path_put VFS macros -+ */ -+static inline void path_put_lowers(struct dentry *dentry, -+ int bstart, int bend, bool free_lower) -+{ -+ struct dentry *lower_dentry; -+ struct vfsmount *lower_mnt; -+ int bindex; -+ -+ BUG_ON(!dentry); -+ BUG_ON(!UNIONFS_D(dentry)); -+ BUG_ON(bstart < 0); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (lower_dentry) { -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); -+ dput(lower_dentry); -+ } -+ lower_mnt = unionfs_lower_mnt_idx(dentry, bindex); -+ if (lower_mnt) { -+ unionfs_set_lower_mnt_idx(dentry, bindex, NULL); -+ mntput(lower_mnt); -+ } -+ } -+ -+ if (free_lower) { -+ kfree(UNIONFS_D(dentry)->lower_paths); -+ UNIONFS_D(dentry)->lower_paths = NULL; -+ } -+} -+ -+/* -+ * dput/mntput all lower dentries and vfsmounts, and reset start/end branch -+ * indices to -1. -+ */ -+static inline void path_put_lowers_all(struct dentry *dentry, bool free_lower) -+{ -+ int bstart, bend; -+ -+ BUG_ON(!dentry); -+ BUG_ON(!UNIONFS_D(dentry)); -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ BUG_ON(bstart < 0); -+ -+ path_put_lowers(dentry, bstart, bend, free_lower); -+ dbstart(dentry) = dbend(dentry) = -1; -+} -+ -+#endif /* not _FANOUT_H */ -diff --git a/fs/unionfs/file.c b/fs/unionfs/file.c -new file mode 100644 -index 0000000..416c52f ---- /dev/null -+++ b/fs/unionfs/file.c -@@ -0,0 +1,382 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+static ssize_t unionfs_read(struct file *file, char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ int err; -+ struct file *lower_file; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, false); -+ if (unlikely(err)) -+ goto out; -+ -+ lower_file = unionfs_lower_file(file); -+ err = vfs_read(lower_file, buf, count, ppos); -+ /* update our inode atime upon a successful lower read */ -+ if (err >= 0) { -+ fsstack_copy_attr_atime(dentry->d_inode, -+ lower_file->f_path.dentry->d_inode); -+ unionfs_check_file(file); -+ } -+ -+out: -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+static ssize_t unionfs_write(struct file *file, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ int err = 0; -+ struct file *lower_file; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, true); -+ if (unlikely(err)) -+ goto out; -+ -+ lower_file = unionfs_lower_file(file); -+ err = vfs_write(lower_file, buf, count, ppos); -+ /* update our inode times+sizes upon a successful lower write */ -+ if (err >= 0) { -+ fsstack_copy_inode_size(dentry->d_inode, -+ lower_file->f_path.dentry->d_inode); -+ fsstack_copy_attr_times(dentry->d_inode, -+ lower_file->f_path.dentry->d_inode); -+ UNIONFS_F(file)->wrote_to_file = true; /* for delayed copyup */ -+ unionfs_check_file(file); -+ } -+ -+out: -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+static int unionfs_file_readdir(struct file *file, void *dirent, -+ filldir_t filldir) -+{ -+ return -ENOTDIR; -+} -+ -+static int unionfs_mmap(struct file *file, struct vm_area_struct *vma) -+{ -+ int err = 0; -+ bool willwrite; -+ struct file *lower_file; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ const struct vm_operations_struct *saved_vm_ops = NULL; -+ -+ /* -+ * Since mm/memory.c:might_fault() (under PROVE_LOCKING) was -+ * modified in 2.6.29-rc1 to call might_lock_read on mmap_sem, this -+ * has been causing false positives in file system stacking layers. -+ * In particular, our ->mmap is called after sys_mmap2 already holds -+ * mmap_sem, then we lock our own mutexes; but earlier, it's -+ * possible for lockdep to have locked our mutexes first, and then -+ * we call a lower ->readdir which could call might_fault. The -+ * different ordering of the locks is what lockdep complains about -+ * -- unnecessarily. Therefore, we have no choice but to tell -+ * lockdep to temporarily turn off lockdep here. Note: the comments -+ * inside might_sleep also suggest that it would have been -+ * nicer to only annotate paths that needs that might_lock_read. -+ */ -+ lockdep_off(); -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ /* This might be deferred to mmap's writepage */ -+ willwrite = ((vma->vm_flags | VM_SHARED | VM_WRITE) == vma->vm_flags); -+ err = unionfs_file_revalidate(file, parent, willwrite); -+ if (unlikely(err)) -+ goto out; -+ unionfs_check_file(file); -+ -+ /* -+ * File systems which do not implement ->writepage may use -+ * generic_file_readonly_mmap as their ->mmap op. If you call -+ * generic_file_readonly_mmap with VM_WRITE, you'd get an -EINVAL. -+ * But we cannot call the lower ->mmap op, so we can't tell that -+ * writeable mappings won't work. Therefore, our only choice is to -+ * check if the lower file system supports the ->writepage, and if -+ * not, return EINVAL (the same error that -+ * generic_file_readonly_mmap returns in that case). -+ */ -+ lower_file = unionfs_lower_file(file); -+ if (willwrite && !lower_file->f_mapping->a_ops->writepage) { -+ err = -EINVAL; -+ printk(KERN_ERR "unionfs: branch %d file system does not " -+ "support writeable mmap\n", fbstart(file)); -+ goto out; -+ } -+ -+ /* -+ * find and save lower vm_ops. -+ * -+ * XXX: the VFS should have a cleaner way of finding the lower vm_ops -+ */ -+ if (!UNIONFS_F(file)->lower_vm_ops) { -+ err = lower_file->f_op->mmap(lower_file, vma); -+ if (err) { -+ printk(KERN_ERR "unionfs: lower mmap failed %d\n", err); -+ goto out; -+ } -+ saved_vm_ops = vma->vm_ops; -+ err = do_munmap(current->mm, vma->vm_start, -+ vma->vm_end - vma->vm_start); -+ if (err) { -+ printk(KERN_ERR "unionfs: do_munmap failed %d\n", err); -+ goto out; -+ } -+ } -+ -+ file->f_mapping->a_ops = &unionfs_dummy_aops; -+ err = generic_file_mmap(file, vma); -+ file->f_mapping->a_ops = &unionfs_aops; -+ if (err) { -+ printk(KERN_ERR "unionfs: generic_file_mmap failed %d\n", err); -+ goto out; -+ } -+ vma->vm_ops = &unionfs_vm_ops; -+ if (!UNIONFS_F(file)->lower_vm_ops) -+ UNIONFS_F(file)->lower_vm_ops = saved_vm_ops; -+ -+out: -+ if (!err) { -+ /* copyup could cause parent dir times to change */ -+ unionfs_copy_attr_times(parent->d_inode); -+ unionfs_check_file(file); -+ } -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ lockdep_on(); -+ return err; -+} -+ -+int unionfs_fsync(struct file *file, int datasync) -+{ -+ int bindex, bstart, bend; -+ struct file *lower_file; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *lower_dentry; -+ struct dentry *parent; -+ struct inode *lower_inode, *inode; -+ int err = -EINVAL; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, true); -+ if (unlikely(err)) -+ goto out; -+ unionfs_check_file(file); -+ -+ bstart = fbstart(file); -+ bend = fbend(file); -+ if (bstart < 0 || bend < 0) -+ goto out; -+ -+ inode = dentry->d_inode; -+ if (unlikely(!inode)) { -+ printk(KERN_ERR -+ "unionfs: null lower inode in unionfs_fsync\n"); -+ goto out; -+ } -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (!lower_inode || !lower_inode->i_fop->fsync) -+ continue; -+ lower_file = unionfs_lower_file_idx(file, bindex); -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ mutex_lock(&lower_inode->i_mutex); -+ err = lower_inode->i_fop->fsync(lower_file, datasync); -+ if (!err && bindex == bstart) -+ fsstack_copy_attr_times(inode, lower_inode); -+ mutex_unlock(&lower_inode->i_mutex); -+ if (err) -+ goto out; -+ } -+ -+out: -+ if (!err) -+ unionfs_check_file(file); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+int unionfs_fasync(int fd, struct file *file, int flag) -+{ -+ int bindex, bstart, bend; -+ struct file *lower_file; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ struct inode *lower_inode, *inode; -+ int err = 0; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, true); -+ if (unlikely(err)) -+ goto out; -+ unionfs_check_file(file); -+ -+ bstart = fbstart(file); -+ bend = fbend(file); -+ if (bstart < 0 || bend < 0) -+ goto out; -+ -+ inode = dentry->d_inode; -+ if (unlikely(!inode)) { -+ printk(KERN_ERR -+ "unionfs: null lower inode in unionfs_fasync\n"); -+ goto out; -+ } -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (!lower_inode || !lower_inode->i_fop->fasync) -+ continue; -+ lower_file = unionfs_lower_file_idx(file, bindex); -+ mutex_lock(&lower_inode->i_mutex); -+ err = lower_inode->i_fop->fasync(fd, lower_file, flag); -+ if (!err && bindex == bstart) -+ fsstack_copy_attr_times(inode, lower_inode); -+ mutex_unlock(&lower_inode->i_mutex); -+ if (err) -+ goto out; -+ } -+ -+out: -+ if (!err) -+ unionfs_check_file(file); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+static ssize_t unionfs_splice_read(struct file *file, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags) -+{ -+ ssize_t err; -+ struct file *lower_file; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, false); -+ if (unlikely(err)) -+ goto out; -+ -+ lower_file = unionfs_lower_file(file); -+ err = vfs_splice_to(lower_file, ppos, pipe, len, flags); -+ /* update our inode atime upon a successful lower splice-read */ -+ if (err >= 0) { -+ fsstack_copy_attr_atime(dentry->d_inode, -+ lower_file->f_path.dentry->d_inode); -+ unionfs_check_file(file); -+ } -+ -+out: -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+static ssize_t unionfs_splice_write(struct pipe_inode_info *pipe, -+ struct file *file, loff_t *ppos, -+ size_t len, unsigned int flags) -+{ -+ ssize_t err = 0; -+ struct file *lower_file; -+ struct dentry *dentry = file->f_path.dentry; -+ struct dentry *parent; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ err = unionfs_file_revalidate(file, parent, true); -+ if (unlikely(err)) -+ goto out; -+ -+ lower_file = unionfs_lower_file(file); -+ err = vfs_splice_from(pipe, lower_file, ppos, len, flags); -+ /* update our inode times+sizes upon a successful lower write */ -+ if (err >= 0) { -+ fsstack_copy_inode_size(dentry->d_inode, -+ lower_file->f_path.dentry->d_inode); -+ fsstack_copy_attr_times(dentry->d_inode, -+ lower_file->f_path.dentry->d_inode); -+ unionfs_check_file(file); -+ } -+ -+out: -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+struct file_operations unionfs_main_fops = { -+ .llseek = generic_file_llseek, -+ .read = unionfs_read, -+ .write = unionfs_write, -+ .readdir = unionfs_file_readdir, -+ .unlocked_ioctl = unionfs_ioctl, -+#ifdef CONFIG_COMPAT -+ .compat_ioctl = unionfs_ioctl, -+#endif -+ .mmap = unionfs_mmap, -+ .open = unionfs_open, -+ .flush = unionfs_flush, -+ .release = unionfs_file_release, -+ .fsync = unionfs_fsync, -+ .fasync = unionfs_fasync, -+ .splice_read = unionfs_splice_read, -+ .splice_write = unionfs_splice_write, -+}; -diff --git a/fs/unionfs/inode.c b/fs/unionfs/inode.c -new file mode 100644 -index 0000000..b207c13 ---- /dev/null -+++ b/fs/unionfs/inode.c -@@ -0,0 +1,1099 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * Find a writeable branch to create new object in. Checks all writeble -+ * branches of the parent inode, from istart to iend order; if none are -+ * suitable, also tries branch 0 (which may require a copyup). -+ * -+ * Return a lower_dentry we can use to create object in, or ERR_PTR. -+ */ -+static struct dentry *find_writeable_branch(struct inode *parent, -+ struct dentry *dentry) -+{ -+ int err = -EINVAL; -+ int bindex, istart, iend; -+ struct dentry *lower_dentry = NULL; -+ -+ istart = ibstart(parent); -+ iend = ibend(parent); -+ if (istart < 0) -+ goto out; -+ -+begin: -+ for (bindex = istart; bindex <= iend; bindex++) { -+ /* skip non-writeable branches */ -+ err = is_robranch_super(dentry->d_sb, bindex); -+ if (err) { -+ err = -EROFS; -+ continue; -+ } -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) -+ continue; -+ /* -+ * check for whiteouts in writeable branch, and remove them -+ * if necessary. -+ */ -+ err = check_unlink_whiteout(dentry, lower_dentry, bindex); -+ if (err > 0) /* ignore if whiteout found and removed */ -+ err = 0; -+ if (err) -+ continue; -+ /* if get here, we can write to the branch */ -+ break; -+ } -+ /* -+ * If istart wasn't already branch 0, and we got any error, then try -+ * branch 0 (which may require copyup) -+ */ -+ if (err && istart > 0) { -+ istart = iend = 0; -+ goto begin; -+ } -+ -+ /* -+ * If we tried even branch 0, and still got an error, abort. But if -+ * the error was an EROFS, then we should try to copyup. -+ */ -+ if (err && err != -EROFS) -+ goto out; -+ -+ /* -+ * If we get here, then check if copyup needed. If lower_dentry is -+ * NULL, create the entire dentry directory structure in branch 0. -+ */ -+ if (!lower_dentry) { -+ bindex = 0; -+ lower_dentry = create_parents(parent, dentry, -+ dentry->d_name.name, bindex); -+ if (IS_ERR(lower_dentry)) { -+ err = PTR_ERR(lower_dentry); -+ goto out; -+ } -+ } -+ err = 0; /* all's well */ -+out: -+ if (err) -+ return ERR_PTR(err); -+ return lower_dentry; -+} -+ -+static int unionfs_create(struct inode *dir, struct dentry *dentry, -+ int mode, struct nameidata *nd_unused) -+{ -+ int err = 0; -+ struct dentry *lower_dentry = NULL; -+ struct dentry *lower_parent_dentry = NULL; -+ struct dentry *parent; -+ int valid = 0; -+ struct nameidata lower_nd; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; /* same as what real_lookup does */ -+ goto out; -+ } -+ -+ lower_dentry = find_writeable_branch(dir, dentry); -+ if (IS_ERR(lower_dentry)) { -+ err = PTR_ERR(lower_dentry); -+ goto out; -+ } -+ -+ lower_parent_dentry = lock_parent(lower_dentry); -+ if (IS_ERR(lower_parent_dentry)) { -+ err = PTR_ERR(lower_parent_dentry); -+ goto out_unlock; -+ } -+ -+ err = init_lower_nd(&lower_nd, LOOKUP_CREATE); -+ if (unlikely(err < 0)) -+ goto out_unlock; -+ err = vfs_create(lower_parent_dentry->d_inode, lower_dentry, mode, -+ &lower_nd); -+ release_lower_nd(&lower_nd, err); -+ -+ if (!err) { -+ err = PTR_ERR(unionfs_interpose(dentry, dir->i_sb, 0)); -+ if (!err) { -+ unionfs_copy_attr_times(dir); -+ fsstack_copy_inode_size(dir, -+ lower_parent_dentry->d_inode); -+ /* update no. of links on parent directory */ -+ dir->i_nlink = unionfs_get_nlinks(dir); -+ } -+ } -+ -+out_unlock: -+ unlock_dir(lower_parent_dentry); -+out: -+ if (!err) { -+ unionfs_postcopyup_setmnt(dentry); -+ unionfs_check_inode(dir); -+ unionfs_check_dentry(dentry); -+ } -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+/* -+ * unionfs_lookup is the only special function which takes a dentry, yet we -+ * do NOT want to call __unionfs_d_revalidate_chain because by definition, -+ * we don't have a valid dentry here yet. -+ */ -+static struct dentry *unionfs_lookup(struct inode *dir, -+ struct dentry *dentry, -+ struct nameidata *nd_unused) -+{ -+ struct dentry *ret, *parent; -+ int err = 0; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ -+ /* -+ * As long as we lock/dget the parent, then can skip validating the -+ * parent now; we may have to rebuild this dentry on the next -+ * ->d_revalidate, however. -+ */ -+ -+ /* allocate dentry private data. We free it in ->d_release */ -+ err = new_dentry_private_data(dentry, UNIONFS_DMUTEX_CHILD); -+ if (unlikely(err)) { -+ ret = ERR_PTR(err); -+ goto out; -+ } -+ -+ ret = unionfs_lookup_full(dentry, parent, INTERPOSE_LOOKUP); -+ -+ if (!IS_ERR(ret)) { -+ if (ret) -+ dentry = ret; -+ /* lookup_full can return multiple positive dentries */ -+ if (dentry->d_inode && !S_ISDIR(dentry->d_inode->i_mode)) { -+ BUG_ON(dbstart(dentry) < 0); -+ unionfs_postcopyup_release(dentry); -+ } -+ unionfs_copy_attr_times(dentry->d_inode); -+ } -+ -+ unionfs_check_inode(dir); -+ if (!IS_ERR(ret)) -+ unionfs_check_dentry(dentry); -+ unionfs_check_dentry(parent); -+ unionfs_unlock_dentry(dentry); /* locked in new_dentry_private data */ -+ -+out: -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ -+ return ret; -+} -+ -+static int unionfs_link(struct dentry *old_dentry, struct inode *dir, -+ struct dentry *new_dentry) -+{ -+ int err = 0; -+ struct dentry *lower_old_dentry = NULL; -+ struct dentry *lower_new_dentry = NULL; -+ struct dentry *lower_dir_dentry = NULL; -+ struct dentry *old_parent, *new_parent; -+ char *name = NULL; -+ bool valid; -+ -+ unionfs_read_lock(old_dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ old_parent = dget_parent(old_dentry); -+ new_parent = dget_parent(new_dentry); -+ unionfs_double_lock_parents(old_parent, new_parent); -+ unionfs_double_lock_dentry(old_dentry, new_dentry); -+ -+ valid = __unionfs_d_revalidate(old_dentry, old_parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ if (new_dentry->d_inode) { -+ valid = __unionfs_d_revalidate(new_dentry, new_parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ } -+ -+ lower_new_dentry = unionfs_lower_dentry(new_dentry); -+ -+ /* check for a whiteout in new dentry branch, and delete it */ -+ err = check_unlink_whiteout(new_dentry, lower_new_dentry, -+ dbstart(new_dentry)); -+ if (err > 0) { /* whiteout found and removed successfully */ -+ lower_dir_dentry = dget_parent(lower_new_dentry); -+ fsstack_copy_attr_times(dir, lower_dir_dentry->d_inode); -+ dput(lower_dir_dentry); -+ dir->i_nlink = unionfs_get_nlinks(dir); -+ err = 0; -+ } -+ if (err) -+ goto out; -+ -+ /* check if parent hierachy is needed, then link in same branch */ -+ if (dbstart(old_dentry) != dbstart(new_dentry)) { -+ lower_new_dentry = create_parents(dir, new_dentry, -+ new_dentry->d_name.name, -+ dbstart(old_dentry)); -+ err = PTR_ERR(lower_new_dentry); -+ if (IS_COPYUP_ERR(err)) -+ goto docopyup; -+ if (!lower_new_dentry || IS_ERR(lower_new_dentry)) -+ goto out; -+ } -+ lower_new_dentry = unionfs_lower_dentry(new_dentry); -+ lower_old_dentry = unionfs_lower_dentry(old_dentry); -+ -+ BUG_ON(dbstart(old_dentry) != dbstart(new_dentry)); -+ lower_dir_dentry = lock_parent(lower_new_dentry); -+ err = is_robranch(old_dentry); -+ if (!err) { -+ /* see Documentation/filesystems/unionfs/issues.txt */ -+ lockdep_off(); -+ err = vfs_link(lower_old_dentry, lower_dir_dentry->d_inode, -+ lower_new_dentry); -+ lockdep_on(); -+ } -+ unlock_dir(lower_dir_dentry); -+ -+docopyup: -+ if (IS_COPYUP_ERR(err)) { -+ int old_bstart = dbstart(old_dentry); -+ int bindex; -+ -+ for (bindex = old_bstart - 1; bindex >= 0; bindex--) { -+ err = copyup_dentry(old_parent->d_inode, -+ old_dentry, old_bstart, -+ bindex, old_dentry->d_name.name, -+ old_dentry->d_name.len, NULL, -+ i_size_read(old_dentry->d_inode)); -+ if (err) -+ continue; -+ lower_new_dentry = -+ create_parents(dir, new_dentry, -+ new_dentry->d_name.name, -+ bindex); -+ lower_old_dentry = unionfs_lower_dentry(old_dentry); -+ lower_dir_dentry = lock_parent(lower_new_dentry); -+ /* see Documentation/filesystems/unionfs/issues.txt */ -+ lockdep_off(); -+ /* do vfs_link */ -+ err = vfs_link(lower_old_dentry, -+ lower_dir_dentry->d_inode, -+ lower_new_dentry); -+ lockdep_on(); -+ unlock_dir(lower_dir_dentry); -+ goto check_link; -+ } -+ goto out; -+ } -+ -+check_link: -+ if (err || !lower_new_dentry->d_inode) -+ goto out; -+ -+ /* Its a hard link, so use the same inode */ -+ new_dentry->d_inode = igrab(old_dentry->d_inode); -+ d_add(new_dentry, new_dentry->d_inode); -+ unionfs_copy_attr_all(dir, lower_new_dentry->d_parent->d_inode); -+ fsstack_copy_inode_size(dir, lower_new_dentry->d_parent->d_inode); -+ -+ /* propagate number of hard-links */ -+ old_dentry->d_inode->i_nlink = unionfs_get_nlinks(old_dentry->d_inode); -+ /* new dentry's ctime may have changed due to hard-link counts */ -+ unionfs_copy_attr_times(new_dentry->d_inode); -+ -+out: -+ if (!new_dentry->d_inode) -+ d_drop(new_dentry); -+ -+ kfree(name); -+ if (!err) -+ unionfs_postcopyup_setmnt(new_dentry); -+ -+ unionfs_check_inode(dir); -+ unionfs_check_dentry(new_dentry); -+ unionfs_check_dentry(old_dentry); -+ -+ unionfs_double_unlock_dentry(old_dentry, new_dentry); -+ unionfs_double_unlock_parents(old_parent, new_parent); -+ dput(new_parent); -+ dput(old_parent); -+ unionfs_read_unlock(old_dentry->d_sb); -+ -+ return err; -+} -+ -+static int unionfs_symlink(struct inode *dir, struct dentry *dentry, -+ const char *symname) -+{ -+ int err = 0; -+ struct dentry *lower_dentry = NULL; -+ struct dentry *wh_dentry = NULL; -+ struct dentry *lower_parent_dentry = NULL; -+ struct dentry *parent; -+ char *name = NULL; -+ int valid = 0; -+ umode_t mode; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ /* -+ * It's only a bug if this dentry was not negative and couldn't be -+ * revalidated (shouldn't happen). -+ */ -+ BUG_ON(!valid && dentry->d_inode); -+ -+ lower_dentry = find_writeable_branch(dir, dentry); -+ if (IS_ERR(lower_dentry)) { -+ err = PTR_ERR(lower_dentry); -+ goto out; -+ } -+ -+ lower_parent_dentry = lock_parent(lower_dentry); -+ if (IS_ERR(lower_parent_dentry)) { -+ err = PTR_ERR(lower_parent_dentry); -+ goto out_unlock; -+ } -+ -+ mode = S_IALLUGO; -+ err = vfs_symlink(lower_parent_dentry->d_inode, lower_dentry, symname); -+ if (!err) { -+ err = PTR_ERR(unionfs_interpose(dentry, dir->i_sb, 0)); -+ if (!err) { -+ unionfs_copy_attr_times(dir); -+ fsstack_copy_inode_size(dir, -+ lower_parent_dentry->d_inode); -+ /* update no. of links on parent directory */ -+ dir->i_nlink = unionfs_get_nlinks(dir); -+ } -+ } -+ -+out_unlock: -+ unlock_dir(lower_parent_dentry); -+out: -+ dput(wh_dentry); -+ kfree(name); -+ -+ if (!err) { -+ unionfs_postcopyup_setmnt(dentry); -+ unionfs_check_inode(dir); -+ unionfs_check_dentry(dentry); -+ } -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+static int unionfs_mkdir(struct inode *dir, struct dentry *dentry, int mode) -+{ -+ int err = 0; -+ struct dentry *lower_dentry = NULL; -+ struct dentry *lower_parent_dentry = NULL; -+ struct dentry *parent; -+ int bindex = 0, bstart; -+ char *name = NULL; -+ int valid; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; /* same as what real_lookup does */ -+ goto out; -+ } -+ -+ bstart = dbstart(dentry); -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ -+ /* check for a whiteout in new dentry branch, and delete it */ -+ err = check_unlink_whiteout(dentry, lower_dentry, bstart); -+ if (err > 0) /* whiteout found and removed successfully */ -+ err = 0; -+ if (err) { -+ /* exit if the error returned was NOT -EROFS */ -+ if (!IS_COPYUP_ERR(err)) -+ goto out; -+ bstart--; -+ } -+ -+ /* check if copyup's needed, and mkdir */ -+ for (bindex = bstart; bindex >= 0; bindex--) { -+ int i; -+ int bend = dbend(dentry); -+ -+ if (is_robranch_super(dentry->d_sb, bindex)) -+ continue; -+ -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) { -+ lower_dentry = create_parents(dir, dentry, -+ dentry->d_name.name, -+ bindex); -+ if (!lower_dentry || IS_ERR(lower_dentry)) { -+ printk(KERN_ERR "unionfs: lower dentry " -+ " NULL for bindex = %d\n", bindex); -+ continue; -+ } -+ } -+ -+ lower_parent_dentry = lock_parent(lower_dentry); -+ -+ if (IS_ERR(lower_parent_dentry)) { -+ err = PTR_ERR(lower_parent_dentry); -+ goto out; -+ } -+ -+ err = vfs_mkdir(lower_parent_dentry->d_inode, lower_dentry, -+ mode); -+ -+ unlock_dir(lower_parent_dentry); -+ -+ /* did the mkdir succeed? */ -+ if (err) -+ break; -+ -+ for (i = bindex + 1; i <= bend; i++) { -+ /* XXX: use path_put_lowers? */ -+ if (unionfs_lower_dentry_idx(dentry, i)) { -+ dput(unionfs_lower_dentry_idx(dentry, i)); -+ unionfs_set_lower_dentry_idx(dentry, i, NULL); -+ } -+ } -+ dbend(dentry) = bindex; -+ -+ /* -+ * Only INTERPOSE_LOOKUP can return a value other than 0 on -+ * err. -+ */ -+ err = PTR_ERR(unionfs_interpose(dentry, dir->i_sb, 0)); -+ if (!err) { -+ unionfs_copy_attr_times(dir); -+ fsstack_copy_inode_size(dir, -+ lower_parent_dentry->d_inode); -+ -+ /* update number of links on parent directory */ -+ dir->i_nlink = unionfs_get_nlinks(dir); -+ } -+ -+ err = make_dir_opaque(dentry, dbstart(dentry)); -+ if (err) { -+ printk(KERN_ERR "unionfs: mkdir: error creating " -+ ".wh.__dir_opaque: %d\n", err); -+ goto out; -+ } -+ -+ /* we are done! */ -+ break; -+ } -+ -+out: -+ if (!dentry->d_inode) -+ d_drop(dentry); -+ -+ kfree(name); -+ -+ if (!err) { -+ unionfs_copy_attr_times(dentry->d_inode); -+ unionfs_postcopyup_setmnt(dentry); -+ } -+ unionfs_check_inode(dir); -+ unionfs_check_dentry(dentry); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ -+ return err; -+} -+ -+static int unionfs_mknod(struct inode *dir, struct dentry *dentry, int mode, -+ dev_t dev) -+{ -+ int err = 0; -+ struct dentry *lower_dentry = NULL; -+ struct dentry *wh_dentry = NULL; -+ struct dentry *lower_parent_dentry = NULL; -+ struct dentry *parent; -+ char *name = NULL; -+ int valid = 0; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ /* -+ * It's only a bug if this dentry was not negative and couldn't be -+ * revalidated (shouldn't happen). -+ */ -+ BUG_ON(!valid && dentry->d_inode); -+ -+ lower_dentry = find_writeable_branch(dir, dentry); -+ if (IS_ERR(lower_dentry)) { -+ err = PTR_ERR(lower_dentry); -+ goto out; -+ } -+ -+ lower_parent_dentry = lock_parent(lower_dentry); -+ if (IS_ERR(lower_parent_dentry)) { -+ err = PTR_ERR(lower_parent_dentry); -+ goto out_unlock; -+ } -+ -+ err = vfs_mknod(lower_parent_dentry->d_inode, lower_dentry, mode, dev); -+ if (!err) { -+ err = PTR_ERR(unionfs_interpose(dentry, dir->i_sb, 0)); -+ if (!err) { -+ unionfs_copy_attr_times(dir); -+ fsstack_copy_inode_size(dir, -+ lower_parent_dentry->d_inode); -+ /* update no. of links on parent directory */ -+ dir->i_nlink = unionfs_get_nlinks(dir); -+ } -+ } -+ -+out_unlock: -+ unlock_dir(lower_parent_dentry); -+out: -+ dput(wh_dentry); -+ kfree(name); -+ -+ if (!err) { -+ unionfs_postcopyup_setmnt(dentry); -+ unionfs_check_inode(dir); -+ unionfs_check_dentry(dentry); -+ } -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+/* requires sb, dentry, and parent to already be locked */ -+static int __unionfs_readlink(struct dentry *dentry, char __user *buf, -+ int bufsiz) -+{ -+ int err; -+ struct dentry *lower_dentry; -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ -+ if (!lower_dentry->d_inode->i_op || -+ !lower_dentry->d_inode->i_op->readlink) { -+ err = -EINVAL; -+ goto out; -+ } -+ -+ err = lower_dentry->d_inode->i_op->readlink(lower_dentry, -+ buf, bufsiz); -+ if (err >= 0) -+ fsstack_copy_attr_atime(dentry->d_inode, -+ lower_dentry->d_inode); -+ -+out: -+ return err; -+} -+ -+static int unionfs_readlink(struct dentry *dentry, char __user *buf, -+ int bufsiz) -+{ -+ int err; -+ struct dentry *parent; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ if (unlikely(!__unionfs_d_revalidate(dentry, parent, false))) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ err = __unionfs_readlink(dentry, buf, bufsiz); -+ -+out: -+ unionfs_check_dentry(dentry); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ -+ return err; -+} -+ -+static void *unionfs_follow_link(struct dentry *dentry, struct nameidata *nd) -+{ -+ char *buf; -+ int len = PAGE_SIZE, err; -+ mm_segment_t old_fs; -+ struct dentry *parent; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ /* This is freed by the put_link method assuming a successful call. */ -+ buf = kmalloc(len, GFP_KERNEL); -+ if (unlikely(!buf)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ -+ /* read the symlink, and then we will follow it */ -+ old_fs = get_fs(); -+ set_fs(KERNEL_DS); -+ err = __unionfs_readlink(dentry, buf, len); -+ set_fs(old_fs); -+ if (err < 0) { -+ kfree(buf); -+ buf = NULL; -+ goto out; -+ } -+ buf[err] = 0; -+ nd_set_link(nd, buf); -+ err = 0; -+ -+out: -+ if (err >= 0) { -+ unionfs_check_nd(nd); -+ unionfs_check_dentry(dentry); -+ } -+ -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ -+ return ERR_PTR(err); -+} -+ -+/* this @nd *IS* still used */ -+static void unionfs_put_link(struct dentry *dentry, struct nameidata *nd, -+ void *cookie) -+{ -+ struct dentry *parent; -+ char *buf; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ if (unlikely(!__unionfs_d_revalidate(dentry, parent, false))) -+ printk(KERN_ERR -+ "unionfs: put_link failed to revalidate dentry\n"); -+ -+ unionfs_check_dentry(dentry); -+#if 0 -+ /* XXX: can't run this check b/c this fxn can receive a poisoned 'nd' PTR */ -+ unionfs_check_nd(nd); -+#endif -+ buf = nd_get_link(nd); -+ if (!IS_ERR(buf)) -+ kfree(buf); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+} -+ -+/* -+ * This is a variant of fs/namei.c:permission() or inode_permission() which -+ * skips over EROFS tests (because we perform copyup on EROFS). -+ */ -+static int __inode_permission(struct inode *inode, int mask, unsigned int flags) -+{ -+ int retval; -+ -+ /* nobody gets write access to an immutable file */ -+ if ((mask & MAY_WRITE) && IS_IMMUTABLE(inode)) -+ return -EACCES; -+ -+ /* Ordinary permission routines do not understand MAY_APPEND. */ -+ if (inode->i_op && inode->i_op->permission) { -+ retval = inode->i_op->permission(inode, mask, flags); -+ if (!retval) { -+ /* -+ * Exec permission on a regular file is denied if none -+ * of the execute bits are set. -+ * -+ * This check should be done by the ->permission() -+ * method. -+ */ -+ if ((mask & MAY_EXEC) && S_ISREG(inode->i_mode) && -+ !(inode->i_mode & S_IXUGO)) -+ return -EACCES; -+ } -+ } else { -+ retval = generic_permission(inode, mask, flags, NULL); -+ } -+ if (retval) -+ return retval; -+ -+ return security_inode_permission(inode, -+ mask & (MAY_READ|MAY_WRITE|MAY_EXEC|MAY_APPEND)); -+} -+ -+/* -+ * Don't grab the superblock read-lock in unionfs_permission, which prevents -+ * a deadlock with the branch-management "add branch" code (which grabbed -+ * the write lock). It is safe to not grab the read lock here, because even -+ * with branch management taking place, there is no chance that -+ * unionfs_permission, or anything it calls, will use stale branch -+ * information. -+ */ -+static int unionfs_permission(struct inode *inode, int mask, unsigned int flags) -+{ -+ struct inode *lower_inode = NULL; -+ int err = 0; -+ int bindex, bstart, bend; -+ int is_file; -+ const int write_mask = (mask & MAY_WRITE) && !(mask & MAY_READ); -+ struct inode *inode_grabbed; -+ struct dentry *dentry; -+ -+ if (flags & IPERM_FLAG_RCU) { -+ err = -ECHILD; -+ goto out_nograb; -+ } -+ -+ dentry = d_find_alias(inode); -+ if (dentry) -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ inode_grabbed = igrab(inode); -+ is_file = !S_ISDIR(inode->i_mode); -+ -+ if (!UNIONFS_I(inode)->lower_inodes) { -+ if (is_file) /* dirs can be unlinked but chdir'ed to */ -+ err = -ESTALE; /* force revalidate */ -+ goto out; -+ } -+ bstart = ibstart(inode); -+ bend = ibend(inode); -+ if (unlikely(bstart < 0 || bend < 0)) { -+ /* -+ * With branch-management, we can get a stale inode here. -+ * If so, we return ESTALE back to link_path_walk, which -+ * would discard the dcache entry and re-lookup the -+ * dentry+inode. This should be equivalent to issuing -+ * __unionfs_d_revalidate_chain on nd.dentry here. -+ */ -+ if (is_file) /* dirs can be unlinked but chdir'ed to */ -+ err = -ESTALE; /* force revalidate */ -+ goto out; -+ } -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (!lower_inode) -+ continue; -+ -+ /* -+ * check the condition for D-F-D underlying files/directories, -+ * we don't have to check for files, if we are checking for -+ * directories. -+ */ -+ if (!is_file && !S_ISDIR(lower_inode->i_mode)) -+ continue; -+ -+ /* -+ * We check basic permissions, but we ignore any conditions -+ * such as readonly file systems or branches marked as -+ * readonly, because those conditions should lead to a -+ * copyup taking place later on. However, if user never had -+ * access to the file, then no copyup could ever take place. -+ */ -+ err = __inode_permission(lower_inode, mask, flags); -+ if (err && err != -EACCES && err != EPERM && bindex > 0) { -+ umode_t mode = lower_inode->i_mode; -+ if ((is_robranch_super(inode->i_sb, bindex) || -+ __is_rdonly(lower_inode)) && -+ (S_ISREG(mode) || S_ISDIR(mode) || S_ISLNK(mode))) -+ err = 0; -+ if (IS_COPYUP_ERR(err)) -+ err = 0; -+ } -+ -+ /* -+ * NFS HACK: NFSv2/3 return EACCES on readonly-exported, -+ * locally readonly-mounted file systems, instead of EROFS -+ * like other file systems do. So we have no choice here -+ * but to intercept this and ignore it for NFS branches -+ * marked readonly. Specifically, we avoid using NFS's own -+ * "broken" ->permission method, and rely on -+ * generic_permission() to do basic checking for us. -+ */ -+ if (err && err == -EACCES && -+ is_robranch_super(inode->i_sb, bindex) && -+ lower_inode->i_sb->s_magic == NFS_SUPER_MAGIC) -+ err = generic_permission(lower_inode, mask, flags, NULL); -+ -+ /* -+ * The permissions are an intersection of the overall directory -+ * permissions, so we fail if one fails. -+ */ -+ if (err) -+ goto out; -+ -+ /* only the leftmost file matters. */ -+ if (is_file || write_mask) { -+ if (is_file && write_mask) { -+ err = get_write_access(lower_inode); -+ if (!err) -+ put_write_access(lower_inode); -+ } -+ break; -+ } -+ } -+ /* sync times which may have changed (asynchronously) below */ -+ unionfs_copy_attr_times(inode); -+ -+out: -+ unionfs_check_inode(inode); -+ if (dentry) { -+ unionfs_unlock_dentry(dentry); -+ dput(dentry); -+ } -+ iput(inode_grabbed); -+out_nograb: -+ return err; -+} -+ -+static int unionfs_setattr(struct dentry *dentry, struct iattr *ia) -+{ -+ int err = 0; -+ struct dentry *lower_dentry; -+ struct dentry *parent; -+ struct inode *inode; -+ struct inode *lower_inode; -+ int bstart, bend, bindex; -+ loff_t size; -+ struct iattr lower_ia; -+ -+ /* check if user has permission to change inode */ -+ err = inode_change_ok(dentry->d_inode, ia); -+ if (err) -+ goto out_err; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ if (unlikely(!__unionfs_d_revalidate(dentry, parent, false))) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ inode = dentry->d_inode; -+ -+ /* -+ * mode change is for clearing setuid/setgid. Allow lower filesystem -+ * to reinterpret it in its own way. -+ */ -+ if (ia->ia_valid & (ATTR_KILL_SUID | ATTR_KILL_SGID)) -+ ia->ia_valid &= ~ATTR_MODE; -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ if (!lower_dentry) { /* should never happen after above revalidate */ -+ err = -EINVAL; -+ goto out; -+ } -+ -+ /* -+ * Get the lower inode directly from lower dentry, in case ibstart -+ * is -1 (which happens when the file is open but unlinked. -+ */ -+ lower_inode = lower_dentry->d_inode; -+ -+ /* check if user has permission to change lower inode */ -+ err = inode_change_ok(lower_inode, ia); -+ if (err) -+ goto out; -+ -+ /* copyup if the file is on a read only branch */ -+ if (is_robranch_super(dentry->d_sb, bstart) -+ || __is_rdonly(lower_inode)) { -+ /* check if we have a branch to copy up to */ -+ if (bstart <= 0) { -+ err = -EACCES; -+ goto out; -+ } -+ -+ if (ia->ia_valid & ATTR_SIZE) -+ size = ia->ia_size; -+ else -+ size = i_size_read(inode); -+ /* copyup to next available branch */ -+ for (bindex = bstart - 1; bindex >= 0; bindex--) { -+ err = copyup_dentry(parent->d_inode, -+ dentry, bstart, bindex, -+ dentry->d_name.name, -+ dentry->d_name.len, -+ NULL, size); -+ if (!err) -+ break; -+ } -+ if (err) -+ goto out; -+ /* get updated lower_dentry/inode after copyup */ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ lower_inode = unionfs_lower_inode(inode); -+ /* -+ * check for whiteouts in writeable branch, and remove them -+ * if necessary. -+ */ -+ if (lower_dentry) { -+ err = check_unlink_whiteout(dentry, lower_dentry, -+ bindex); -+ if (err > 0) /* ignore if whiteout found and removed */ -+ err = 0; -+ } -+ } -+ -+ /* -+ * If shrinking, first truncate upper level to cancel writing dirty -+ * pages beyond the new eof; and also if its' maxbytes is more -+ * limiting (fail with -EFBIG before making any change to the lower -+ * level). There is no need to vmtruncate the upper level -+ * afterwards in the other cases: we fsstack_copy_inode_size from -+ * the lower level. -+ */ -+ if (ia->ia_valid & ATTR_SIZE) { -+ size = i_size_read(inode); -+ if (ia->ia_size < size || (ia->ia_size > size && -+ inode->i_sb->s_maxbytes < lower_inode->i_sb->s_maxbytes)) { -+ err = vmtruncate(inode, ia->ia_size); -+ if (err) -+ goto out; -+ } -+ } -+ -+ /* notify the (possibly copied-up) lower inode */ -+ /* -+ * Note: we use lower_dentry->d_inode, because lower_inode may be -+ * unlinked (no inode->i_sb and i_ino==0. This happens if someone -+ * tries to open(), unlink(), then ftruncate() a file. -+ */ -+ /* prepare our own lower struct iattr (with our own lower file) */ -+ memcpy(&lower_ia, ia, sizeof(lower_ia)); -+ if (ia->ia_valid & ATTR_FILE) { -+ lower_ia.ia_file = unionfs_lower_file(ia->ia_file); -+ BUG_ON(!lower_ia.ia_file); // XXX? -+ } -+ -+ mutex_lock(&lower_dentry->d_inode->i_mutex); -+ err = notify_change(lower_dentry, &lower_ia); -+ mutex_unlock(&lower_dentry->d_inode->i_mutex); -+ if (err) -+ goto out; -+ -+ /* get attributes from the first lower inode */ -+ if (ibstart(inode) >= 0) -+ unionfs_copy_attr_all(inode, lower_inode); -+ /* -+ * unionfs_copy_attr_all will copy the lower times to our inode if -+ * the lower ones are newer (useful for cache coherency). However, -+ * ->setattr is the only place in which we may have to copy the -+ * lower inode times absolutely, to support utimes(2). -+ */ -+ if (ia->ia_valid & ATTR_MTIME_SET) -+ inode->i_mtime = lower_inode->i_mtime; -+ if (ia->ia_valid & ATTR_CTIME) -+ inode->i_ctime = lower_inode->i_ctime; -+ if (ia->ia_valid & ATTR_ATIME_SET) -+ inode->i_atime = lower_inode->i_atime; -+ fsstack_copy_inode_size(inode, lower_inode); -+ -+out: -+ if (!err) -+ unionfs_check_dentry(dentry); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+out_err: -+ return err; -+} -+ -+struct inode_operations unionfs_symlink_iops = { -+ .readlink = unionfs_readlink, -+ .permission = unionfs_permission, -+ .follow_link = unionfs_follow_link, -+ .setattr = unionfs_setattr, -+ .put_link = unionfs_put_link, -+}; -+ -+struct inode_operations unionfs_dir_iops = { -+ .create = unionfs_create, -+ .lookup = unionfs_lookup, -+ .link = unionfs_link, -+ .unlink = unionfs_unlink, -+ .symlink = unionfs_symlink, -+ .mkdir = unionfs_mkdir, -+ .rmdir = unionfs_rmdir, -+ .mknod = unionfs_mknod, -+ .rename = unionfs_rename, -+ .permission = unionfs_permission, -+ .setattr = unionfs_setattr, -+#ifdef CONFIG_UNION_FS_XATTR -+ .setxattr = unionfs_setxattr, -+ .getxattr = unionfs_getxattr, -+ .removexattr = unionfs_removexattr, -+ .listxattr = unionfs_listxattr, -+#endif /* CONFIG_UNION_FS_XATTR */ -+}; -+ -+struct inode_operations unionfs_main_iops = { -+ .permission = unionfs_permission, -+ .setattr = unionfs_setattr, -+#ifdef CONFIG_UNION_FS_XATTR -+ .setxattr = unionfs_setxattr, -+ .getxattr = unionfs_getxattr, -+ .removexattr = unionfs_removexattr, -+ .listxattr = unionfs_listxattr, -+#endif /* CONFIG_UNION_FS_XATTR */ -+}; -diff --git a/fs/unionfs/lookup.c b/fs/unionfs/lookup.c -new file mode 100644 -index 0000000..3cbde56 ---- /dev/null -+++ b/fs/unionfs/lookup.c -@@ -0,0 +1,569 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * Lookup one path component @name relative to a <base,mnt> path pair. -+ * Behaves nearly the same as lookup_one_len (i.e., return negative dentry -+ * on ENOENT), but uses the @mnt passed, so it can cross bind mounts and -+ * other lower mounts properly. If @new_mnt is non-null, will fill in the -+ * new mnt there. Caller is responsible to dput/mntput/path_put returned -+ * @dentry and @new_mnt. -+ */ -+struct dentry *__lookup_one(struct dentry *base, struct vfsmount *mnt, -+ const char *name, struct vfsmount **new_mnt) -+{ -+ struct dentry *dentry = NULL; -+ struct nameidata lower_nd; -+ int err; -+ -+ /* we use flags=0 to get basic lookup */ -+ err = vfs_path_lookup(base, mnt, name, 0, &lower_nd); -+ -+ switch (err) { -+ case 0: /* no error */ -+ dentry = lower_nd.path.dentry; -+ if (new_mnt) -+ *new_mnt = lower_nd.path.mnt; /* rc already inc'ed */ -+ break; -+ case -ENOENT: -+ /* -+ * We don't consider ENOENT an error, and we want to return -+ * a negative dentry (ala lookup_one_len). As we know -+ * there was no inode for this name before (-ENOENT), then -+ * it's safe to call lookup_one_len (which doesn't take a -+ * vfsmount). -+ */ -+ dentry = lookup_lck_len(name, base, strlen(name)); -+ if (new_mnt) -+ *new_mnt = mntget(lower_nd.path.mnt); -+ break; -+ default: /* all other real errors */ -+ dentry = ERR_PTR(err); -+ break; -+ } -+ -+ return dentry; -+} -+ -+/* -+ * This is a utility function that fills in a unionfs dentry. -+ * Caller must lock this dentry with unionfs_lock_dentry. -+ * -+ * Returns: 0 (ok), or -ERRNO if an error occurred. -+ * XXX: get rid of _partial_lookup and make callers call _lookup_full directly -+ */ -+int unionfs_partial_lookup(struct dentry *dentry, struct dentry *parent) -+{ -+ struct dentry *tmp; -+ int err = -ENOSYS; -+ -+ tmp = unionfs_lookup_full(dentry, parent, INTERPOSE_PARTIAL); -+ -+ if (!tmp) { -+ err = 0; -+ goto out; -+ } -+ if (IS_ERR(tmp)) { -+ err = PTR_ERR(tmp); -+ goto out; -+ } -+ /* XXX: need to change the interface */ -+ BUG_ON(tmp != dentry); -+out: -+ return err; -+} -+ -+/* The dentry cache is just so we have properly sized dentries. */ -+static struct kmem_cache *unionfs_dentry_cachep; -+int unionfs_init_dentry_cache(void) -+{ -+ unionfs_dentry_cachep = -+ kmem_cache_create("unionfs_dentry", -+ sizeof(struct unionfs_dentry_info), -+ 0, SLAB_RECLAIM_ACCOUNT, NULL); -+ -+ return (unionfs_dentry_cachep ? 0 : -ENOMEM); -+} -+ -+void unionfs_destroy_dentry_cache(void) -+{ -+ if (unionfs_dentry_cachep) -+ kmem_cache_destroy(unionfs_dentry_cachep); -+} -+ -+void free_dentry_private_data(struct dentry *dentry) -+{ -+ if (!dentry || !dentry->d_fsdata) -+ return; -+ kfree(UNIONFS_D(dentry)->lower_paths); -+ UNIONFS_D(dentry)->lower_paths = NULL; -+ kmem_cache_free(unionfs_dentry_cachep, dentry->d_fsdata); -+ dentry->d_fsdata = NULL; -+} -+ -+static inline int __realloc_dentry_private_data(struct dentry *dentry) -+{ -+ struct unionfs_dentry_info *info = UNIONFS_D(dentry); -+ void *p; -+ int size; -+ -+ BUG_ON(!info); -+ -+ size = sizeof(struct path) * sbmax(dentry->d_sb); -+ p = krealloc(info->lower_paths, size, GFP_ATOMIC); -+ if (unlikely(!p)) -+ return -ENOMEM; -+ -+ info->lower_paths = p; -+ -+ info->bstart = -1; -+ info->bend = -1; -+ info->bopaque = -1; -+ info->bcount = sbmax(dentry->d_sb); -+ atomic_set(&info->generation, -+ atomic_read(&UNIONFS_SB(dentry->d_sb)->generation)); -+ -+ memset(info->lower_paths, 0, size); -+ -+ return 0; -+} -+ -+/* UNIONFS_D(dentry)->lock must be locked */ -+int realloc_dentry_private_data(struct dentry *dentry) -+{ -+ if (!__realloc_dentry_private_data(dentry)) -+ return 0; -+ -+ kfree(UNIONFS_D(dentry)->lower_paths); -+ free_dentry_private_data(dentry); -+ return -ENOMEM; -+} -+ -+/* allocate new dentry private data */ -+int new_dentry_private_data(struct dentry *dentry, int subclass) -+{ -+ struct unionfs_dentry_info *info = UNIONFS_D(dentry); -+ -+ BUG_ON(info); -+ -+ info = kmem_cache_alloc(unionfs_dentry_cachep, GFP_ATOMIC); -+ if (unlikely(!info)) -+ return -ENOMEM; -+ -+ mutex_init(&info->lock); -+ mutex_lock_nested(&info->lock, subclass); -+ -+ info->lower_paths = NULL; -+ -+ dentry->d_fsdata = info; -+ -+ if (!__realloc_dentry_private_data(dentry)) -+ return 0; -+ -+ mutex_unlock(&info->lock); -+ free_dentry_private_data(dentry); -+ return -ENOMEM; -+} -+ -+/* -+ * scan through the lower dentry objects, and set bstart to reflect the -+ * starting branch -+ */ -+void update_bstart(struct dentry *dentry) -+{ -+ int bindex; -+ int bstart = dbstart(dentry); -+ int bend = dbend(dentry); -+ struct dentry *lower_dentry; -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) -+ continue; -+ if (lower_dentry->d_inode) { -+ dbstart(dentry) = bindex; -+ break; -+ } -+ dput(lower_dentry); -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); -+ } -+} -+ -+ -+/* -+ * Initialize a nameidata structure (the intent part) we can pass to a lower -+ * file system. Returns 0 on success or -error (only -ENOMEM possible). -+ * Inside that nd structure, this function may also return an allocated -+ * struct file (for open intents). The caller, when done with this nd, must -+ * kfree the intent file (using release_lower_nd). -+ * -+ * XXX: this code, and the callers of this code, should be redone using -+ * vfs_path_lookup() when (1) the nameidata structure is refactored into a -+ * separate intent-structure, and (2) open_namei() is broken into a VFS-only -+ * function and a method that other file systems can call. -+ */ -+int init_lower_nd(struct nameidata *nd, unsigned int flags) -+{ -+ int err = 0; -+#ifdef ALLOC_LOWER_ND_FILE -+ /* -+ * XXX: one day we may need to have the lower return an open file -+ * for us. It is not needed in 2.6.23-rc1 for nfs2/nfs3, but may -+ * very well be needed for nfs4. -+ */ -+ struct file *file; -+#endif /* ALLOC_LOWER_ND_FILE */ -+ -+ memset(nd, 0, sizeof(struct nameidata)); -+ if (!flags) -+ return err; -+ -+ switch (flags) { -+ case LOOKUP_CREATE: -+ nd->intent.open.flags |= O_CREAT; -+ /* fall through: shared code for create/open cases */ -+ case LOOKUP_OPEN: -+ nd->flags = flags; -+ nd->intent.open.flags |= (FMODE_READ | FMODE_WRITE); -+#ifdef ALLOC_LOWER_ND_FILE -+ file = kzalloc(sizeof(struct file), GFP_KERNEL); -+ if (unlikely(!file)) { -+ err = -ENOMEM; -+ break; /* exit switch statement and thus return */ -+ } -+ nd->intent.open.file = file; -+#endif /* ALLOC_LOWER_ND_FILE */ -+ break; -+ default: -+ /* -+ * We should never get here, for now. -+ * We can add new cases here later on. -+ */ -+ pr_debug("unionfs: unknown nameidata flag 0x%x\n", flags); -+ BUG(); -+ break; -+ } -+ -+ return err; -+} -+ -+void release_lower_nd(struct nameidata *nd, int err) -+{ -+ if (!nd->intent.open.file) -+ return; -+ else if (!err) -+ release_open_intent(nd); -+#ifdef ALLOC_LOWER_ND_FILE -+ kfree(nd->intent.open.file); -+#endif /* ALLOC_LOWER_ND_FILE */ -+} -+ -+/* -+ * Main (and complex) driver function for Unionfs's lookup -+ * -+ * Returns: NULL (ok), ERR_PTR if an error occurred, or a non-null non-error -+ * PTR if d_splice returned a different dentry. -+ * -+ * If lookupmode is INTERPOSE_PARTIAL/REVAL/REVAL_NEG, the passed dentry's -+ * inode info must be locked. If lookupmode is INTERPOSE_LOOKUP (i.e., a -+ * newly looked-up dentry), then unionfs_lookup_backend will return a locked -+ * dentry's info, which the caller must unlock. -+ */ -+struct dentry *unionfs_lookup_full(struct dentry *dentry, -+ struct dentry *parent, int lookupmode) -+{ -+ int err = 0; -+ struct dentry *lower_dentry = NULL; -+ struct vfsmount *lower_mnt; -+ struct vfsmount *lower_dir_mnt; -+ struct dentry *wh_lower_dentry = NULL; -+ struct dentry *lower_dir_dentry = NULL; -+ struct dentry *d_interposed = NULL; -+ int bindex, bstart, bend, bopaque; -+ int opaque, num_positive = 0; -+ const char *name; -+ int namelen; -+ int pos_start, pos_end; -+ -+ /* -+ * We should already have a lock on this dentry in the case of a -+ * partial lookup, or a revalidation. Otherwise it is returned from -+ * new_dentry_private_data already locked. -+ */ -+ verify_locked(dentry); -+ verify_locked(parent); -+ -+ /* must initialize dentry operations */ -+ dentry->d_op = &unionfs_dops; -+ -+ /* We never partial lookup the root directory. */ -+ if (IS_ROOT(dentry)) -+ goto out; -+ -+ name = dentry->d_name.name; -+ namelen = dentry->d_name.len; -+ -+ /* No dentries should get created for possible whiteout names. */ -+ if (!is_validname(name)) { -+ err = -EPERM; -+ goto out_free; -+ } -+ -+ /* Now start the actual lookup procedure. */ -+ bstart = dbstart(parent); -+ bend = dbend(parent); -+ bopaque = dbopaque(parent); -+ BUG_ON(bstart < 0); -+ -+ /* adjust bend to bopaque if needed */ -+ if ((bopaque >= 0) && (bopaque < bend)) -+ bend = bopaque; -+ -+ /* lookup all possible dentries */ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ lower_mnt = unionfs_lower_mnt_idx(dentry, bindex); -+ -+ /* skip if we already have a positive lower dentry */ -+ if (lower_dentry) { -+ if (dbstart(dentry) < 0) -+ dbstart(dentry) = bindex; -+ if (bindex > dbend(dentry)) -+ dbend(dentry) = bindex; -+ if (lower_dentry->d_inode) -+ num_positive++; -+ continue; -+ } -+ -+ lower_dir_dentry = -+ unionfs_lower_dentry_idx(parent, bindex); -+ /* if the lower dentry's parent does not exist, skip this */ -+ if (!lower_dir_dentry || !lower_dir_dentry->d_inode) -+ continue; -+ -+ /* also skip it if the parent isn't a directory. */ -+ if (!S_ISDIR(lower_dir_dentry->d_inode->i_mode)) -+ continue; /* XXX: should be BUG_ON */ -+ -+ /* check for whiteouts: stop lookup if found */ -+ wh_lower_dentry = lookup_whiteout(name, lower_dir_dentry); -+ if (IS_ERR(wh_lower_dentry)) { -+ err = PTR_ERR(wh_lower_dentry); -+ goto out_free; -+ } -+ if (wh_lower_dentry->d_inode) { -+ dbend(dentry) = dbopaque(dentry) = bindex; -+ if (dbstart(dentry) < 0) -+ dbstart(dentry) = bindex; -+ dput(wh_lower_dentry); -+ break; -+ } -+ dput(wh_lower_dentry); -+ -+ /* Now do regular lookup; lookup @name */ -+ lower_dir_mnt = unionfs_lower_mnt_idx(parent, bindex); -+ lower_mnt = NULL; /* XXX: needed? */ -+ -+ lower_dentry = __lookup_one(lower_dir_dentry, lower_dir_mnt, -+ name, &lower_mnt); -+ -+ if (IS_ERR(lower_dentry)) { -+ err = PTR_ERR(lower_dentry); -+ goto out_free; -+ } -+ unionfs_set_lower_dentry_idx(dentry, bindex, lower_dentry); -+ if (!lower_mnt) -+ lower_mnt = unionfs_mntget(dentry->d_sb->s_root, -+ bindex); -+ unionfs_set_lower_mnt_idx(dentry, bindex, lower_mnt); -+ -+ /* adjust dbstart/end */ -+ if (dbstart(dentry) < 0) -+ dbstart(dentry) = bindex; -+ if (bindex > dbend(dentry)) -+ dbend(dentry) = bindex; -+ /* -+ * We always store the lower dentries above, and update -+ * dbstart/dbend, even if the whole unionfs dentry is -+ * negative (i.e., no lower inodes). -+ */ -+ if (!lower_dentry->d_inode) -+ continue; -+ num_positive++; -+ -+ /* -+ * check if we just found an opaque directory, if so, stop -+ * lookups here. -+ */ -+ if (!S_ISDIR(lower_dentry->d_inode->i_mode)) -+ continue; -+ opaque = is_opaque_dir(dentry, bindex); -+ if (opaque < 0) { -+ err = opaque; -+ goto out_free; -+ } else if (opaque) { -+ dbend(dentry) = dbopaque(dentry) = bindex; -+ break; -+ } -+ dbend(dentry) = bindex; -+ -+ /* update parent directory's atime with the bindex */ -+ fsstack_copy_attr_atime(parent->d_inode, -+ lower_dir_dentry->d_inode); -+ } -+ -+ /* sanity checks, then decide if to process a negative dentry */ -+ BUG_ON(dbstart(dentry) < 0 && dbend(dentry) >= 0); -+ BUG_ON(dbstart(dentry) >= 0 && dbend(dentry) < 0); -+ -+ if (num_positive > 0) -+ goto out_positive; -+ -+ /*** handle NEGATIVE dentries ***/ -+ -+ /* -+ * If negative, keep only first lower negative dentry, to save on -+ * memory. -+ */ -+ if (dbstart(dentry) < dbend(dentry)) { -+ path_put_lowers(dentry, dbstart(dentry) + 1, -+ dbend(dentry), false); -+ dbend(dentry) = dbstart(dentry); -+ } -+ if (lookupmode == INTERPOSE_PARTIAL) -+ goto out; -+ if (lookupmode == INTERPOSE_LOOKUP) { -+ /* -+ * If all we found was a whiteout in the first available -+ * branch, then create a negative dentry for a possibly new -+ * file to be created. -+ */ -+ if (dbopaque(dentry) < 0) -+ goto out; -+ /* XXX: need to get mnt here */ -+ bindex = dbstart(dentry); -+ if (unionfs_lower_dentry_idx(dentry, bindex)) -+ goto out; -+ lower_dir_dentry = -+ unionfs_lower_dentry_idx(parent, bindex); -+ if (!lower_dir_dentry || !lower_dir_dentry->d_inode) -+ goto out; -+ if (!S_ISDIR(lower_dir_dentry->d_inode->i_mode)) -+ goto out; /* XXX: should be BUG_ON */ -+ /* XXX: do we need to cross bind mounts here? */ -+ lower_dentry = lookup_lck_len(name, lower_dir_dentry, namelen); -+ if (IS_ERR(lower_dentry)) { -+ err = PTR_ERR(lower_dentry); -+ goto out; -+ } -+ /* XXX: need to mntget/mntput as needed too! */ -+ unionfs_set_lower_dentry_idx(dentry, bindex, lower_dentry); -+ /* XXX: wrong mnt for crossing bind mounts! */ -+ lower_mnt = unionfs_mntget(dentry->d_sb->s_root, bindex); -+ unionfs_set_lower_mnt_idx(dentry, bindex, lower_mnt); -+ -+ goto out; -+ } -+ -+ /* if we're revalidating a positive dentry, don't make it negative */ -+ if (lookupmode != INTERPOSE_REVAL) -+ d_add(dentry, NULL); -+ -+ goto out; -+ -+out_positive: -+ /*** handle POSITIVE dentries ***/ -+ -+ /* -+ * This unionfs dentry is positive (at least one lower inode -+ * exists), so scan entire dentry from beginning to end, and remove -+ * any negative lower dentries, if any. Then, update dbstart/dbend -+ * to reflect the start/end of positive dentries. -+ */ -+ pos_start = pos_end = -1; -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, -+ bindex); -+ if (lower_dentry && lower_dentry->d_inode) { -+ if (pos_start < 0) -+ pos_start = bindex; -+ if (bindex > pos_end) -+ pos_end = bindex; -+ continue; -+ } -+ path_put_lowers(dentry, bindex, bindex, false); -+ } -+ if (pos_start >= 0) -+ dbstart(dentry) = pos_start; -+ if (pos_end >= 0) -+ dbend(dentry) = pos_end; -+ -+ /* Partial lookups need to re-interpose, or throw away older negs. */ -+ if (lookupmode == INTERPOSE_PARTIAL) { -+ if (dentry->d_inode) { -+ unionfs_reinterpose(dentry); -+ goto out; -+ } -+ -+ /* -+ * This dentry was positive, so it is as if we had a -+ * negative revalidation. -+ */ -+ lookupmode = INTERPOSE_REVAL_NEG; -+ update_bstart(dentry); -+ } -+ -+ /* -+ * Interpose can return a dentry if d_splice returned a different -+ * dentry. -+ */ -+ d_interposed = unionfs_interpose(dentry, dentry->d_sb, lookupmode); -+ if (IS_ERR(d_interposed)) -+ err = PTR_ERR(d_interposed); -+ else if (d_interposed) -+ dentry = d_interposed; -+ -+ if (!err) -+ goto out; -+ d_drop(dentry); -+ -+out_free: -+ /* should dput/mntput all the underlying dentries on error condition */ -+ if (dbstart(dentry) >= 0) -+ path_put_lowers_all(dentry, false); -+ /* free lower_paths unconditionally */ -+ kfree(UNIONFS_D(dentry)->lower_paths); -+ UNIONFS_D(dentry)->lower_paths = NULL; -+ -+out: -+ if (dentry && UNIONFS_D(dentry)) { -+ BUG_ON(dbstart(dentry) < 0 && dbend(dentry) >= 0); -+ BUG_ON(dbstart(dentry) >= 0 && dbend(dentry) < 0); -+ } -+ if (d_interposed && UNIONFS_D(d_interposed)) { -+ BUG_ON(dbstart(d_interposed) < 0 && dbend(d_interposed) >= 0); -+ BUG_ON(dbstart(d_interposed) >= 0 && dbend(d_interposed) < 0); -+ } -+ -+ if (!err && d_interposed) -+ return d_interposed; -+ return ERR_PTR(err); -+} -diff --git a/fs/unionfs/main.c b/fs/unionfs/main.c -new file mode 100644 -index 0000000..fa52f61 ---- /dev/null -+++ b/fs/unionfs/main.c -@@ -0,0 +1,763 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+#include <linux/module.h> -+#include <linux/moduleparam.h> -+ -+static void unionfs_fill_inode(struct dentry *dentry, -+ struct inode *inode) -+{ -+ struct inode *lower_inode; -+ struct dentry *lower_dentry; -+ int bindex, bstart, bend; -+ -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) { -+ unionfs_set_lower_inode_idx(inode, bindex, NULL); -+ continue; -+ } -+ -+ /* Initialize the lower inode to the new lower inode. */ -+ if (!lower_dentry->d_inode) -+ continue; -+ -+ unionfs_set_lower_inode_idx(inode, bindex, -+ igrab(lower_dentry->d_inode)); -+ } -+ -+ ibstart(inode) = dbstart(dentry); -+ ibend(inode) = dbend(dentry); -+ -+ /* Use attributes from the first branch. */ -+ lower_inode = unionfs_lower_inode(inode); -+ -+ /* Use different set of inode ops for symlinks & directories */ -+ if (S_ISLNK(lower_inode->i_mode)) -+ inode->i_op = &unionfs_symlink_iops; -+ else if (S_ISDIR(lower_inode->i_mode)) -+ inode->i_op = &unionfs_dir_iops; -+ -+ /* Use different set of file ops for directories */ -+ if (S_ISDIR(lower_inode->i_mode)) -+ inode->i_fop = &unionfs_dir_fops; -+ -+ /* properly initialize special inodes */ -+ if (S_ISBLK(lower_inode->i_mode) || S_ISCHR(lower_inode->i_mode) || -+ S_ISFIFO(lower_inode->i_mode) || S_ISSOCK(lower_inode->i_mode)) -+ init_special_inode(inode, lower_inode->i_mode, -+ lower_inode->i_rdev); -+ -+ /* all well, copy inode attributes */ -+ unionfs_copy_attr_all(inode, lower_inode); -+ fsstack_copy_inode_size(inode, lower_inode); -+} -+ -+/* -+ * Connect a unionfs inode dentry/inode with several lower ones. This is -+ * the classic stackable file system "vnode interposition" action. -+ * -+ * @sb: unionfs's super_block -+ */ -+struct dentry *unionfs_interpose(struct dentry *dentry, struct super_block *sb, -+ int flag) -+{ -+ int err = 0; -+ struct inode *inode; -+ int need_fill_inode = 1; -+ struct dentry *spliced = NULL; -+ -+ verify_locked(dentry); -+ -+ /* -+ * We allocate our new inode below by calling unionfs_iget, -+ * which will initialize some of the new inode's fields -+ */ -+ -+ /* -+ * On revalidate we've already got our own inode and just need -+ * to fix it up. -+ */ -+ if (flag == INTERPOSE_REVAL) { -+ inode = dentry->d_inode; -+ UNIONFS_I(inode)->bstart = -1; -+ UNIONFS_I(inode)->bend = -1; -+ atomic_set(&UNIONFS_I(inode)->generation, -+ atomic_read(&UNIONFS_SB(sb)->generation)); -+ -+ UNIONFS_I(inode)->lower_inodes = -+ kcalloc(sbmax(sb), sizeof(struct inode *), GFP_KERNEL); -+ if (unlikely(!UNIONFS_I(inode)->lower_inodes)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ } else { -+ /* get unique inode number for unionfs */ -+ inode = unionfs_iget(sb, iunique(sb, UNIONFS_ROOT_INO)); -+ if (IS_ERR(inode)) { -+ err = PTR_ERR(inode); -+ goto out; -+ } -+ if (atomic_read(&inode->i_count) > 1) -+ goto skip; -+ } -+ -+ need_fill_inode = 0; -+ unionfs_fill_inode(dentry, inode); -+ -+skip: -+ /* only (our) lookup wants to do a d_add */ -+ switch (flag) { -+ case INTERPOSE_DEFAULT: -+ /* for operations which create new inodes */ -+ d_add(dentry, inode); -+ break; -+ case INTERPOSE_REVAL_NEG: -+ d_instantiate(dentry, inode); -+ break; -+ case INTERPOSE_LOOKUP: -+ spliced = d_splice_alias(inode, dentry); -+ if (spliced && spliced != dentry) { -+ /* -+ * d_splice can return a dentry if it was -+ * disconnected and had to be moved. We must ensure -+ * that the private data of the new dentry is -+ * correct and that the inode info was filled -+ * properly. Finally we must return this new -+ * dentry. -+ */ -+ spliced->d_op = &unionfs_dops; -+ spliced->d_fsdata = dentry->d_fsdata; -+ dentry->d_fsdata = NULL; -+ dentry = spliced; -+ if (need_fill_inode) { -+ need_fill_inode = 0; -+ unionfs_fill_inode(dentry, inode); -+ } -+ goto out_spliced; -+ } else if (!spliced) { -+ if (need_fill_inode) { -+ need_fill_inode = 0; -+ unionfs_fill_inode(dentry, inode); -+ goto out_spliced; -+ } -+ } -+ break; -+ case INTERPOSE_REVAL: -+ /* Do nothing. */ -+ break; -+ default: -+ printk(KERN_CRIT "unionfs: invalid interpose flag passed!\n"); -+ BUG(); -+ } -+ goto out; -+ -+out_spliced: -+ if (!err) -+ return spliced; -+out: -+ return ERR_PTR(err); -+} -+ -+/* like interpose above, but for an already existing dentry */ -+void unionfs_reinterpose(struct dentry *dentry) -+{ -+ struct dentry *lower_dentry; -+ struct inode *inode; -+ int bindex, bstart, bend; -+ -+ verify_locked(dentry); -+ -+ /* This is pre-allocated inode */ -+ inode = dentry->d_inode; -+ -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry) -+ continue; -+ -+ if (!lower_dentry->d_inode) -+ continue; -+ if (unionfs_lower_inode_idx(inode, bindex)) -+ continue; -+ unionfs_set_lower_inode_idx(inode, bindex, -+ igrab(lower_dentry->d_inode)); -+ } -+ ibstart(inode) = dbstart(dentry); -+ ibend(inode) = dbend(dentry); -+} -+ -+/* -+ * make sure the branch we just looked up (nd) makes sense: -+ * -+ * 1) we're not trying to stack unionfs on top of unionfs -+ * 2) it exists -+ * 3) is a directory -+ */ -+int check_branch(const struct path *path) -+{ -+ /* XXX: remove in ODF code -- stacking unions allowed there */ -+ if (!strcmp(path->dentry->d_sb->s_type->name, UNIONFS_NAME)) -+ return -EINVAL; -+ if (!path->dentry->d_inode) -+ return -ENOENT; -+ if (!S_ISDIR(path->dentry->d_inode->i_mode)) -+ return -ENOTDIR; -+ return 0; -+} -+ -+/* checks if two lower_dentries have overlapping branches */ -+static int is_branch_overlap(struct dentry *dent1, struct dentry *dent2) -+{ -+ struct dentry *dent = NULL; -+ -+ dent = dent1; -+ while ((dent != dent2) && (dent->d_parent != dent)) -+ dent = dent->d_parent; -+ -+ if (dent == dent2) -+ return 1; -+ -+ dent = dent2; -+ while ((dent != dent1) && (dent->d_parent != dent)) -+ dent = dent->d_parent; -+ -+ return (dent == dent1); -+} -+ -+/* -+ * Parse "ro" or "rw" options, but default to "rw" if no mode options was -+ * specified. Fill the mode bits in @perms. If encounter an unknown -+ * string, return -EINVAL. Otherwise return 0. -+ */ -+int parse_branch_mode(const char *name, int *perms) -+{ -+ if (!name || !strcmp(name, "rw")) { -+ *perms = MAY_READ | MAY_WRITE; -+ return 0; -+ } -+ if (!strcmp(name, "ro")) { -+ *perms = MAY_READ; -+ return 0; -+ } -+ return -EINVAL; -+} -+ -+/* -+ * parse the dirs= mount argument -+ * -+ * We don't need to lock the superblock private data's rwsem, as we get -+ * called only by unionfs_read_super - it is still a long time before anyone -+ * can even get a reference to us. -+ */ -+static int parse_dirs_option(struct super_block *sb, struct unionfs_dentry_info -+ *lower_root_info, char *options) -+{ -+ struct path path; -+ char *name; -+ int err = 0; -+ int branches = 1; -+ int bindex = 0; -+ int i = 0; -+ int j = 0; -+ struct dentry *dent1; -+ struct dentry *dent2; -+ -+ if (options[0] == '\0') { -+ printk(KERN_ERR "unionfs: no branches specified\n"); -+ err = -EINVAL; -+ goto out_return; -+ } -+ -+ /* -+ * Each colon means we have a separator, this is really just a rough -+ * guess, since strsep will handle empty fields for us. -+ */ -+ for (i = 0; options[i]; i++) -+ if (options[i] == ':') -+ branches++; -+ -+ /* allocate space for underlying pointers to lower dentry */ -+ UNIONFS_SB(sb)->data = -+ kcalloc(branches, sizeof(struct unionfs_data), GFP_KERNEL); -+ if (unlikely(!UNIONFS_SB(sb)->data)) { -+ err = -ENOMEM; -+ goto out_return; -+ } -+ -+ lower_root_info->lower_paths = -+ kcalloc(branches, sizeof(struct path), GFP_KERNEL); -+ if (unlikely(!lower_root_info->lower_paths)) { -+ err = -ENOMEM; -+ /* free the underlying pointer array */ -+ kfree(UNIONFS_SB(sb)->data); -+ UNIONFS_SB(sb)->data = NULL; -+ goto out_return; -+ } -+ -+ /* now parsing a string such as "b1:b2=rw:b3=ro:b4" */ -+ branches = 0; -+ while ((name = strsep(&options, ":")) != NULL) { -+ int perms; -+ char *mode = strchr(name, '='); -+ -+ if (!name) -+ continue; -+ if (!*name) { /* bad use of ':' (extra colons) */ -+ err = -EINVAL; -+ goto out; -+ } -+ -+ branches++; -+ -+ /* strip off '=' if any */ -+ if (mode) -+ *mode++ = '\0'; -+ -+ err = parse_branch_mode(mode, &perms); -+ if (err) { -+ printk(KERN_ERR "unionfs: invalid mode \"%s\" for " -+ "branch %d\n", mode, bindex); -+ goto out; -+ } -+ /* ensure that leftmost branch is writeable */ -+ if (!bindex && !(perms & MAY_WRITE)) { -+ printk(KERN_ERR "unionfs: leftmost branch cannot be " -+ "read-only (use \"-o ro\" to create a " -+ "read-only union)\n"); -+ err = -EINVAL; -+ goto out; -+ } -+ -+ err = kern_path(name, LOOKUP_FOLLOW, &path); -+ if (err) { -+ printk(KERN_ERR "unionfs: error accessing " -+ "lower directory '%s' (error %d)\n", -+ name, err); -+ goto out; -+ } -+ -+ err = check_branch(&path); -+ if (err) { -+ printk(KERN_ERR "unionfs: lower directory " -+ "'%s' is not a valid branch\n", name); -+ path_put(&path); -+ goto out; -+ } -+ -+ lower_root_info->lower_paths[bindex].dentry = path.dentry; -+ lower_root_info->lower_paths[bindex].mnt = path.mnt; -+ -+ set_branchperms(sb, bindex, perms); -+ set_branch_count(sb, bindex, 0); -+ new_branch_id(sb, bindex); -+ -+ if (lower_root_info->bstart < 0) -+ lower_root_info->bstart = bindex; -+ lower_root_info->bend = bindex; -+ bindex++; -+ } -+ -+ if (branches == 0) { -+ printk(KERN_ERR "unionfs: no branches specified\n"); -+ err = -EINVAL; -+ goto out; -+ } -+ -+ BUG_ON(branches != (lower_root_info->bend + 1)); -+ -+ /* -+ * Ensure that no overlaps exist in the branches. -+ * -+ * This test is required because the Linux kernel has no support -+ * currently for ensuring coherency between stackable layers and -+ * branches. If we were to allow overlapping branches, it would be -+ * possible, for example, to delete a file via one branch, which -+ * would not be reflected in another branch. Such incoherency could -+ * lead to inconsistencies and even kernel oopses. Rather than -+ * implement hacks to work around some of these cache-coherency -+ * problems, we prevent branch overlapping, for now. A complete -+ * solution will involve proper kernel/VFS support for cache -+ * coherency, at which time we could safely remove this -+ * branch-overlapping test. -+ */ -+ for (i = 0; i < branches; i++) { -+ dent1 = lower_root_info->lower_paths[i].dentry; -+ for (j = i + 1; j < branches; j++) { -+ dent2 = lower_root_info->lower_paths[j].dentry; -+ if (is_branch_overlap(dent1, dent2)) { -+ printk(KERN_ERR "unionfs: branches %d and " -+ "%d overlap\n", i, j); -+ err = -EINVAL; -+ goto out; -+ } -+ } -+ } -+ -+out: -+ if (err) { -+ for (i = 0; i < branches; i++) -+ path_put(&lower_root_info->lower_paths[i]); -+ -+ kfree(lower_root_info->lower_paths); -+ kfree(UNIONFS_SB(sb)->data); -+ -+ /* -+ * MUST clear the pointers to prevent potential double free if -+ * the caller dies later on -+ */ -+ lower_root_info->lower_paths = NULL; -+ UNIONFS_SB(sb)->data = NULL; -+ } -+out_return: -+ return err; -+} -+ -+/* -+ * Parse mount options. See the manual page for usage instructions. -+ * -+ * Returns the dentry object of the lower-level (lower) directory; -+ * We want to mount our stackable file system on top of that lower directory. -+ */ -+static struct unionfs_dentry_info *unionfs_parse_options( -+ struct super_block *sb, -+ char *options) -+{ -+ struct unionfs_dentry_info *lower_root_info; -+ char *optname; -+ int err = 0; -+ int bindex; -+ int dirsfound = 0; -+ -+ /* allocate private data area */ -+ err = -ENOMEM; -+ lower_root_info = -+ kzalloc(sizeof(struct unionfs_dentry_info), GFP_KERNEL); -+ if (unlikely(!lower_root_info)) -+ goto out_error; -+ lower_root_info->bstart = -1; -+ lower_root_info->bend = -1; -+ lower_root_info->bopaque = -1; -+ -+ while ((optname = strsep(&options, ",")) != NULL) { -+ char *optarg; -+ -+ if (!optname || !*optname) -+ continue; -+ -+ optarg = strchr(optname, '='); -+ if (optarg) -+ *optarg++ = '\0'; -+ -+ /* -+ * All of our options take an argument now. Insert ones that -+ * don't, above this check. -+ */ -+ if (!optarg) { -+ printk(KERN_ERR "unionfs: %s requires an argument\n", -+ optname); -+ err = -EINVAL; -+ goto out_error; -+ } -+ -+ if (!strcmp("dirs", optname)) { -+ if (++dirsfound > 1) { -+ printk(KERN_ERR -+ "unionfs: multiple dirs specified\n"); -+ err = -EINVAL; -+ goto out_error; -+ } -+ err = parse_dirs_option(sb, lower_root_info, optarg); -+ if (err) -+ goto out_error; -+ continue; -+ } -+ -+ err = -EINVAL; -+ printk(KERN_ERR -+ "unionfs: unrecognized option '%s'\n", optname); -+ goto out_error; -+ } -+ if (dirsfound != 1) { -+ printk(KERN_ERR "unionfs: dirs option required\n"); -+ err = -EINVAL; -+ goto out_error; -+ } -+ goto out; -+ -+out_error: -+ if (lower_root_info && lower_root_info->lower_paths) { -+ for (bindex = lower_root_info->bstart; -+ bindex >= 0 && bindex <= lower_root_info->bend; -+ bindex++) -+ path_put(&lower_root_info->lower_paths[bindex]); -+ } -+ -+ kfree(lower_root_info->lower_paths); -+ kfree(lower_root_info); -+ -+ kfree(UNIONFS_SB(sb)->data); -+ UNIONFS_SB(sb)->data = NULL; -+ -+ lower_root_info = ERR_PTR(err); -+out: -+ return lower_root_info; -+} -+ -+/* -+ * our custom d_alloc_root work-alike -+ * -+ * we can't use d_alloc_root if we want to use our own interpose function -+ * unchanged, so we simply call our own "fake" d_alloc_root -+ */ -+static struct dentry *unionfs_d_alloc_root(struct super_block *sb) -+{ -+ struct dentry *ret = NULL; -+ -+ if (sb) { -+ static const struct qstr name = { -+ .name = "/", -+ .len = 1 -+ }; -+ -+ ret = d_alloc(NULL, &name); -+ if (likely(ret)) { -+ ret->d_op = &unionfs_dops; -+ ret->d_sb = sb; -+ ret->d_parent = ret; -+ } -+ } -+ return ret; -+} -+ -+/* -+ * There is no need to lock the unionfs_super_info's rwsem as there is no -+ * way anyone can have a reference to the superblock at this point in time. -+ */ -+static int unionfs_read_super(struct super_block *sb, void *raw_data, -+ int silent) -+{ -+ int err = 0; -+ struct unionfs_dentry_info *lower_root_info = NULL; -+ int bindex, bstart, bend; -+ -+ if (!raw_data) { -+ printk(KERN_ERR -+ "unionfs: read_super: missing data argument\n"); -+ err = -EINVAL; -+ goto out; -+ } -+ -+ /* Allocate superblock private data */ -+ sb->s_fs_info = kzalloc(sizeof(struct unionfs_sb_info), GFP_KERNEL); -+ if (unlikely(!UNIONFS_SB(sb))) { -+ printk(KERN_CRIT "unionfs: read_super: out of memory\n"); -+ err = -ENOMEM; -+ goto out; -+ } -+ -+ UNIONFS_SB(sb)->bend = -1; -+ atomic_set(&UNIONFS_SB(sb)->generation, 1); -+ init_rwsem(&UNIONFS_SB(sb)->rwsem); -+ UNIONFS_SB(sb)->high_branch_id = -1; /* -1 == invalid branch ID */ -+ -+ lower_root_info = unionfs_parse_options(sb, raw_data); -+ if (IS_ERR(lower_root_info)) { -+ printk(KERN_ERR -+ "unionfs: read_super: error while parsing options " -+ "(err = %ld)\n", PTR_ERR(lower_root_info)); -+ err = PTR_ERR(lower_root_info); -+ lower_root_info = NULL; -+ goto out_free; -+ } -+ if (lower_root_info->bstart == -1) { -+ err = -ENOENT; -+ goto out_free; -+ } -+ -+ /* set the lower superblock field of upper superblock */ -+ bstart = lower_root_info->bstart; -+ BUG_ON(bstart != 0); -+ sbend(sb) = bend = lower_root_info->bend; -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ struct dentry *d = lower_root_info->lower_paths[bindex].dentry; -+ atomic_inc(&d->d_sb->s_active); -+ unionfs_set_lower_super_idx(sb, bindex, d->d_sb); -+ } -+ -+ /* max Bytes is the maximum bytes from highest priority branch */ -+ sb->s_maxbytes = unionfs_lower_super_idx(sb, 0)->s_maxbytes; -+ -+ /* -+ * Our c/m/atime granularity is 1 ns because we may stack on file -+ * systems whose granularity is as good. This is important for our -+ * time-based cache coherency. -+ */ -+ sb->s_time_gran = 1; -+ -+ sb->s_op = &unionfs_sops; -+ -+ /* See comment next to the definition of unionfs_d_alloc_root */ -+ sb->s_root = unionfs_d_alloc_root(sb); -+ if (unlikely(!sb->s_root)) { -+ err = -ENOMEM; -+ goto out_dput; -+ } -+ -+ /* link the upper and lower dentries */ -+ sb->s_root->d_fsdata = NULL; -+ err = new_dentry_private_data(sb->s_root, UNIONFS_DMUTEX_ROOT); -+ if (unlikely(err)) -+ goto out_freedpd; -+ -+ /* Set the lower dentries for s_root */ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ struct dentry *d; -+ struct vfsmount *m; -+ -+ d = lower_root_info->lower_paths[bindex].dentry; -+ m = lower_root_info->lower_paths[bindex].mnt; -+ -+ unionfs_set_lower_dentry_idx(sb->s_root, bindex, d); -+ unionfs_set_lower_mnt_idx(sb->s_root, bindex, m); -+ } -+ dbstart(sb->s_root) = bstart; -+ dbend(sb->s_root) = bend; -+ -+ /* Set the generation number to one, since this is for the mount. */ -+ atomic_set(&UNIONFS_D(sb->s_root)->generation, 1); -+ -+ /* -+ * Call interpose to create the upper level inode. Only -+ * INTERPOSE_LOOKUP can return a value other than 0 on err. -+ */ -+ err = PTR_ERR(unionfs_interpose(sb->s_root, sb, 0)); -+ unionfs_unlock_dentry(sb->s_root); -+ if (!err) -+ goto out; -+ /* else fall through */ -+ -+out_freedpd: -+ if (UNIONFS_D(sb->s_root)) { -+ kfree(UNIONFS_D(sb->s_root)->lower_paths); -+ free_dentry_private_data(sb->s_root); -+ } -+ dput(sb->s_root); -+ -+out_dput: -+ if (lower_root_info && !IS_ERR(lower_root_info)) { -+ for (bindex = lower_root_info->bstart; -+ bindex <= lower_root_info->bend; bindex++) { -+ struct dentry *d; -+ d = lower_root_info->lower_paths[bindex].dentry; -+ /* drop refs we took earlier */ -+ atomic_dec(&d->d_sb->s_active); -+ path_put(&lower_root_info->lower_paths[bindex]); -+ } -+ kfree(lower_root_info->lower_paths); -+ kfree(lower_root_info); -+ lower_root_info = NULL; -+ } -+ -+out_free: -+ kfree(UNIONFS_SB(sb)->data); -+ kfree(UNIONFS_SB(sb)); -+ sb->s_fs_info = NULL; -+ -+out: -+ if (lower_root_info && !IS_ERR(lower_root_info)) { -+ kfree(lower_root_info->lower_paths); -+ kfree(lower_root_info); -+ } -+ return err; -+} -+ -+static struct dentry *unionfs_mount(struct file_system_type *fs_type, -+ int flags, const char *dev_name, -+ void *raw_data) -+{ -+ struct dentry *dentry; -+ -+ dentry = mount_nodev(fs_type, flags, raw_data, unionfs_read_super); -+ if (!PTR_ERR(dentry)) -+ UNIONFS_SB(dentry->d_sb)->dev_name = -+ kstrdup(dev_name, GFP_KERNEL); -+ return dentry; -+} -+ -+static struct file_system_type unionfs_fs_type = { -+ .owner = THIS_MODULE, -+ .name = UNIONFS_NAME, -+ .mount = unionfs_mount, -+ .kill_sb = generic_shutdown_super, -+ .fs_flags = FS_REVAL_DOT, -+}; -+ -+static int __init init_unionfs_fs(void) -+{ -+ int err; -+ -+ pr_info("Registering unionfs " UNIONFS_VERSION "\n"); -+ -+ err = unionfs_init_filldir_cache(); -+ if (unlikely(err)) -+ goto out; -+ err = unionfs_init_inode_cache(); -+ if (unlikely(err)) -+ goto out; -+ err = unionfs_init_dentry_cache(); -+ if (unlikely(err)) -+ goto out; -+ err = init_sioq(); -+ if (unlikely(err)) -+ goto out; -+ err = register_filesystem(&unionfs_fs_type); -+out: -+ if (unlikely(err)) { -+ stop_sioq(); -+ unionfs_destroy_filldir_cache(); -+ unionfs_destroy_inode_cache(); -+ unionfs_destroy_dentry_cache(); -+ } -+ return err; -+} -+ -+static void __exit exit_unionfs_fs(void) -+{ -+ stop_sioq(); -+ unionfs_destroy_filldir_cache(); -+ unionfs_destroy_inode_cache(); -+ unionfs_destroy_dentry_cache(); -+ unregister_filesystem(&unionfs_fs_type); -+ pr_info("Completed unionfs module unload\n"); -+} -+ -+MODULE_AUTHOR("Erez Zadok, Filesystems and Storage Lab, Stony Brook University" -+ " (http://www.fsl.cs.sunysb.edu)"); -+MODULE_DESCRIPTION("Unionfs " UNIONFS_VERSION -+ " (http://unionfs.filesystems.org)"); -+MODULE_LICENSE("GPL"); -+ -+module_init(init_unionfs_fs); -+module_exit(exit_unionfs_fs); -diff --git a/fs/unionfs/mmap.c b/fs/unionfs/mmap.c -new file mode 100644 -index 0000000..bcc5652 ---- /dev/null -+++ b/fs/unionfs/mmap.c -@@ -0,0 +1,89 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2006 Shaya Potter -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+ -+/* -+ * XXX: we need a dummy readpage handler because generic_file_mmap (which we -+ * use in unionfs_mmap) checks for the existence of -+ * mapping->a_ops->readpage, else it returns -ENOEXEC. The VFS will need to -+ * be fixed to allow a file system to define vm_ops->fault without any -+ * address_space_ops whatsoever. -+ * -+ * Otherwise, we don't want to use our readpage method at all. -+ */ -+static int unionfs_readpage(struct file *file, struct page *page) -+{ -+ BUG(); -+ return -EINVAL; -+} -+ -+static int unionfs_fault(struct vm_area_struct *vma, struct vm_fault *vmf) -+{ -+ int err; -+ struct file *file, *lower_file; -+ const struct vm_operations_struct *lower_vm_ops; -+ struct vm_area_struct lower_vma; -+ -+ BUG_ON(!vma); -+ memcpy(&lower_vma, vma, sizeof(struct vm_area_struct)); -+ file = lower_vma.vm_file; -+ lower_vm_ops = UNIONFS_F(file)->lower_vm_ops; -+ BUG_ON(!lower_vm_ops); -+ -+ lower_file = unionfs_lower_file(file); -+ BUG_ON(!lower_file); -+ /* -+ * XXX: vm_ops->fault may be called in parallel. Because we have to -+ * resort to temporarily changing the vma->vm_file to point to the -+ * lower file, a concurrent invocation of unionfs_fault could see a -+ * different value. In this workaround, we keep a different copy of -+ * the vma structure in our stack, so we never expose a different -+ * value of the vma->vm_file called to us, even temporarily. A -+ * better fix would be to change the calling semantics of ->fault to -+ * take an explicit file pointer. -+ */ -+ lower_vma.vm_file = lower_file; -+ err = lower_vm_ops->fault(&lower_vma, vmf); -+ return err; -+} -+ -+/* -+ * XXX: the default address_space_ops for unionfs is empty. We cannot set -+ * our inode->i_mapping->a_ops to NULL because too many code paths expect -+ * the a_ops vector to be non-NULL. -+ */ -+struct address_space_operations unionfs_aops = { -+ /* empty on purpose */ -+}; -+ -+/* -+ * XXX: we need a second, dummy address_space_ops vector, to be used -+ * temporarily during unionfs_mmap, because the latter calls -+ * generic_file_mmap, which checks if ->readpage exists, else returns -+ * -ENOEXEC. -+ */ -+struct address_space_operations unionfs_dummy_aops = { -+ .readpage = unionfs_readpage, -+}; -+ -+struct vm_operations_struct unionfs_vm_ops = { -+ .fault = unionfs_fault, -+}; -diff --git a/fs/unionfs/rdstate.c b/fs/unionfs/rdstate.c -new file mode 100644 -index 0000000..59b7333 ---- /dev/null -+++ b/fs/unionfs/rdstate.c -@@ -0,0 +1,285 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* This file contains the routines for maintaining readdir state. */ -+ -+/* -+ * There are two structures here, rdstate which is a hash table -+ * of the second structure which is a filldir_node. -+ */ -+ -+/* -+ * This is a struct kmem_cache for filldir nodes, because we allocate a lot -+ * of them and they shouldn't waste memory. If the node has a small name -+ * (as defined by the dentry structure), then we use an inline name to -+ * preserve kmalloc space. -+ */ -+static struct kmem_cache *unionfs_filldir_cachep; -+ -+int unionfs_init_filldir_cache(void) -+{ -+ unionfs_filldir_cachep = -+ kmem_cache_create("unionfs_filldir", -+ sizeof(struct filldir_node), 0, -+ SLAB_RECLAIM_ACCOUNT, NULL); -+ -+ return (unionfs_filldir_cachep ? 0 : -ENOMEM); -+} -+ -+void unionfs_destroy_filldir_cache(void) -+{ -+ if (unionfs_filldir_cachep) -+ kmem_cache_destroy(unionfs_filldir_cachep); -+} -+ -+/* -+ * This is a tuning parameter that tells us roughly how big to make the -+ * hash table in directory entries per page. This isn't perfect, but -+ * at least we get a hash table size that shouldn't be too overloaded. -+ * The following averages are based on my home directory. -+ * 14.44693 Overall -+ * 12.29 Single Page Directories -+ * 117.93 Multi-page directories -+ */ -+#define DENTPAGE 4096 -+#define DENTPERONEPAGE 12 -+#define DENTPERPAGE 118 -+#define MINHASHSIZE 1 -+static int guesstimate_hash_size(struct inode *inode) -+{ -+ struct inode *lower_inode; -+ int bindex; -+ int hashsize = MINHASHSIZE; -+ -+ if (UNIONFS_I(inode)->hashsize > 0) -+ return UNIONFS_I(inode)->hashsize; -+ -+ for (bindex = ibstart(inode); bindex <= ibend(inode); bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (!lower_inode) -+ continue; -+ -+ if (i_size_read(lower_inode) == DENTPAGE) -+ hashsize += DENTPERONEPAGE; -+ else -+ hashsize += (i_size_read(lower_inode) / DENTPAGE) * -+ DENTPERPAGE; -+ } -+ -+ return hashsize; -+} -+ -+int init_rdstate(struct file *file) -+{ -+ BUG_ON(sizeof(loff_t) != -+ (sizeof(unsigned int) + sizeof(unsigned int))); -+ BUG_ON(UNIONFS_F(file)->rdstate != NULL); -+ -+ UNIONFS_F(file)->rdstate = alloc_rdstate(file->f_path.dentry->d_inode, -+ fbstart(file)); -+ -+ return (UNIONFS_F(file)->rdstate ? 0 : -ENOMEM); -+} -+ -+struct unionfs_dir_state *find_rdstate(struct inode *inode, loff_t fpos) -+{ -+ struct unionfs_dir_state *rdstate = NULL; -+ struct list_head *pos; -+ -+ spin_lock(&UNIONFS_I(inode)->rdlock); -+ list_for_each(pos, &UNIONFS_I(inode)->readdircache) { -+ struct unionfs_dir_state *r = -+ list_entry(pos, struct unionfs_dir_state, cache); -+ if (fpos == rdstate2offset(r)) { -+ UNIONFS_I(inode)->rdcount--; -+ list_del(&r->cache); -+ rdstate = r; -+ break; -+ } -+ } -+ spin_unlock(&UNIONFS_I(inode)->rdlock); -+ return rdstate; -+} -+ -+struct unionfs_dir_state *alloc_rdstate(struct inode *inode, int bindex) -+{ -+ int i = 0; -+ int hashsize; -+ unsigned long mallocsize = sizeof(struct unionfs_dir_state); -+ struct unionfs_dir_state *rdstate; -+ -+ hashsize = guesstimate_hash_size(inode); -+ mallocsize += hashsize * sizeof(struct list_head); -+ mallocsize = __roundup_pow_of_two(mallocsize); -+ -+ /* This should give us about 500 entries anyway. */ -+ if (mallocsize > PAGE_SIZE) -+ mallocsize = PAGE_SIZE; -+ -+ hashsize = (mallocsize - sizeof(struct unionfs_dir_state)) / -+ sizeof(struct list_head); -+ -+ rdstate = kmalloc(mallocsize, GFP_KERNEL); -+ if (unlikely(!rdstate)) -+ return NULL; -+ -+ spin_lock(&UNIONFS_I(inode)->rdlock); -+ if (UNIONFS_I(inode)->cookie >= (MAXRDCOOKIE - 1)) -+ UNIONFS_I(inode)->cookie = 1; -+ else -+ UNIONFS_I(inode)->cookie++; -+ -+ rdstate->cookie = UNIONFS_I(inode)->cookie; -+ spin_unlock(&UNIONFS_I(inode)->rdlock); -+ rdstate->offset = 1; -+ rdstate->access = jiffies; -+ rdstate->bindex = bindex; -+ rdstate->dirpos = 0; -+ rdstate->hashentries = 0; -+ rdstate->size = hashsize; -+ for (i = 0; i < rdstate->size; i++) -+ INIT_LIST_HEAD(&rdstate->list[i]); -+ -+ return rdstate; -+} -+ -+static void free_filldir_node(struct filldir_node *node) -+{ -+ if (node->namelen >= DNAME_INLINE_LEN) -+ kfree(node->name); -+ kmem_cache_free(unionfs_filldir_cachep, node); -+} -+ -+void free_rdstate(struct unionfs_dir_state *state) -+{ -+ struct filldir_node *tmp; -+ int i; -+ -+ for (i = 0; i < state->size; i++) { -+ struct list_head *head = &(state->list[i]); -+ struct list_head *pos, *n; -+ -+ /* traverse the list and deallocate space */ -+ list_for_each_safe(pos, n, head) { -+ tmp = list_entry(pos, struct filldir_node, file_list); -+ list_del(&tmp->file_list); -+ free_filldir_node(tmp); -+ } -+ } -+ -+ kfree(state); -+} -+ -+struct filldir_node *find_filldir_node(struct unionfs_dir_state *rdstate, -+ const char *name, int namelen, -+ int is_whiteout) -+{ -+ int index; -+ unsigned int hash; -+ struct list_head *head; -+ struct list_head *pos; -+ struct filldir_node *cursor = NULL; -+ int found = 0; -+ -+ BUG_ON(namelen <= 0); -+ -+ hash = full_name_hash(name, namelen); -+ index = hash % rdstate->size; -+ -+ head = &(rdstate->list[index]); -+ list_for_each(pos, head) { -+ cursor = list_entry(pos, struct filldir_node, file_list); -+ -+ if (cursor->namelen == namelen && cursor->hash == hash && -+ !strncmp(cursor->name, name, namelen)) { -+ /* -+ * a duplicate exists, and hence no need to create -+ * entry to the list -+ */ -+ found = 1; -+ -+ /* -+ * if a duplicate is found in this branch, and is -+ * not due to the caller looking for an entry to -+ * whiteout, then the file system may be corrupted. -+ */ -+ if (unlikely(!is_whiteout && -+ cursor->bindex == rdstate->bindex)) -+ printk(KERN_ERR "unionfs: filldir: possible " -+ "I/O error: a file is duplicated " -+ "in the same branch %d: %s\n", -+ rdstate->bindex, cursor->name); -+ break; -+ } -+ } -+ -+ if (!found) -+ cursor = NULL; -+ -+ return cursor; -+} -+ -+int add_filldir_node(struct unionfs_dir_state *rdstate, const char *name, -+ int namelen, int bindex, int whiteout) -+{ -+ struct filldir_node *new; -+ unsigned int hash; -+ int index; -+ int err = 0; -+ struct list_head *head; -+ -+ BUG_ON(namelen <= 0); -+ -+ hash = full_name_hash(name, namelen); -+ index = hash % rdstate->size; -+ head = &(rdstate->list[index]); -+ -+ new = kmem_cache_alloc(unionfs_filldir_cachep, GFP_KERNEL); -+ if (unlikely(!new)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ -+ INIT_LIST_HEAD(&new->file_list); -+ new->namelen = namelen; -+ new->hash = hash; -+ new->bindex = bindex; -+ new->whiteout = whiteout; -+ -+ if (namelen < DNAME_INLINE_LEN) { -+ new->name = new->iname; -+ } else { -+ new->name = kmalloc(namelen + 1, GFP_KERNEL); -+ if (unlikely(!new->name)) { -+ kmem_cache_free(unionfs_filldir_cachep, new); -+ new = NULL; -+ goto out; -+ } -+ } -+ -+ memcpy(new->name, name, namelen); -+ new->name[namelen] = '\0'; -+ -+ rdstate->hashentries++; -+ -+ list_add(&(new->file_list), head); -+out: -+ return err; -+} -diff --git a/fs/unionfs/rename.c b/fs/unionfs/rename.c -new file mode 100644 -index 0000000..c8ab910 ---- /dev/null -+++ b/fs/unionfs/rename.c -@@ -0,0 +1,522 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * This is a helper function for rename, used when rename ends up with hosed -+ * over dentries and we need to revert. -+ */ -+static int unionfs_refresh_lower_dentry(struct dentry *dentry, -+ struct dentry *parent, int bindex) -+{ -+ struct dentry *lower_dentry; -+ struct dentry *lower_parent; -+ int err = 0; -+ struct nameidata lower_nd; -+ -+ verify_locked(dentry); -+ -+ lower_parent = unionfs_lower_dentry_idx(parent, bindex); -+ -+ BUG_ON(!S_ISDIR(lower_parent->d_inode->i_mode)); -+ -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); -+ if (unlikely(err < 0)) -+ goto out; -+ lower_dentry = lookup_one_len_nd(dentry->d_name.name, lower_parent, -+ dentry->d_name.len, &lower_nd); -+ release_lower_nd(&lower_nd, err); -+ if (IS_ERR(lower_dentry)) { -+ err = PTR_ERR(lower_dentry); -+ goto out; -+ } -+ -+ dput(unionfs_lower_dentry_idx(dentry, bindex)); -+ iput(unionfs_lower_inode_idx(dentry->d_inode, bindex)); -+ unionfs_set_lower_inode_idx(dentry->d_inode, bindex, NULL); -+ -+ if (!lower_dentry->d_inode) { -+ dput(lower_dentry); -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); -+ } else { -+ unionfs_set_lower_dentry_idx(dentry, bindex, lower_dentry); -+ unionfs_set_lower_inode_idx(dentry->d_inode, bindex, -+ igrab(lower_dentry->d_inode)); -+ } -+ -+out: -+ return err; -+} -+ -+static int __unionfs_rename(struct inode *old_dir, struct dentry *old_dentry, -+ struct dentry *old_parent, -+ struct inode *new_dir, struct dentry *new_dentry, -+ struct dentry *new_parent, -+ int bindex) -+{ -+ int err = 0; -+ struct dentry *lower_old_dentry; -+ struct dentry *lower_new_dentry; -+ struct dentry *lower_old_dir_dentry; -+ struct dentry *lower_new_dir_dentry; -+ struct dentry *trap; -+ -+ lower_new_dentry = unionfs_lower_dentry_idx(new_dentry, bindex); -+ lower_old_dentry = unionfs_lower_dentry_idx(old_dentry, bindex); -+ -+ if (!lower_new_dentry) { -+ lower_new_dentry = -+ create_parents(new_parent->d_inode, -+ new_dentry, new_dentry->d_name.name, -+ bindex); -+ if (IS_ERR(lower_new_dentry)) { -+ err = PTR_ERR(lower_new_dentry); -+ if (IS_COPYUP_ERR(err)) -+ goto out; -+ printk(KERN_ERR "unionfs: error creating directory " -+ "tree for rename, bindex=%d err=%d\n", -+ bindex, err); -+ goto out; -+ } -+ } -+ -+ /* check for and remove whiteout, if any */ -+ err = check_unlink_whiteout(new_dentry, lower_new_dentry, bindex); -+ if (err > 0) /* ignore if whiteout found and successfully removed */ -+ err = 0; -+ if (err) -+ goto out; -+ -+ /* check of old_dentry branch is writable */ -+ err = is_robranch_super(old_dentry->d_sb, bindex); -+ if (err) -+ goto out; -+ -+ dget(lower_old_dentry); -+ dget(lower_new_dentry); -+ lower_old_dir_dentry = dget_parent(lower_old_dentry); -+ lower_new_dir_dentry = dget_parent(lower_new_dentry); -+ -+ trap = lock_rename(lower_old_dir_dentry, lower_new_dir_dentry); -+ /* source should not be ancenstor of target */ -+ if (trap == lower_old_dentry) { -+ err = -EINVAL; -+ goto out_err_unlock; -+ } -+ /* target should not be ancenstor of source */ -+ if (trap == lower_new_dentry) { -+ err = -ENOTEMPTY; -+ goto out_err_unlock; -+ } -+ err = vfs_rename(lower_old_dir_dentry->d_inode, lower_old_dentry, -+ lower_new_dir_dentry->d_inode, lower_new_dentry); -+out_err_unlock: -+ if (!err) { -+ /* update parent dir times */ -+ fsstack_copy_attr_times(old_dir, lower_old_dir_dentry->d_inode); -+ fsstack_copy_attr_times(new_dir, lower_new_dir_dentry->d_inode); -+ } -+ unlock_rename(lower_old_dir_dentry, lower_new_dir_dentry); -+ -+ dput(lower_old_dir_dentry); -+ dput(lower_new_dir_dentry); -+ dput(lower_old_dentry); -+ dput(lower_new_dentry); -+ -+out: -+ if (!err) { -+ /* Fixup the new_dentry. */ -+ if (bindex < dbstart(new_dentry)) -+ dbstart(new_dentry) = bindex; -+ else if (bindex > dbend(new_dentry)) -+ dbend(new_dentry) = bindex; -+ } -+ -+ return err; -+} -+ -+/* -+ * Main rename code. This is sufficiently complex, that it's documented in -+ * Documentation/filesystems/unionfs/rename.txt. This routine calls -+ * __unionfs_rename() above to perform some of the work. -+ */ -+static int do_unionfs_rename(struct inode *old_dir, -+ struct dentry *old_dentry, -+ struct dentry *old_parent, -+ struct inode *new_dir, -+ struct dentry *new_dentry, -+ struct dentry *new_parent) -+{ -+ int err = 0; -+ int bindex; -+ int old_bstart, old_bend; -+ int new_bstart, new_bend; -+ int do_copyup = -1; -+ int local_err = 0; -+ int eio = 0; -+ int revert = 0; -+ -+ old_bstart = dbstart(old_dentry); -+ old_bend = dbend(old_dentry); -+ -+ new_bstart = dbstart(new_dentry); -+ new_bend = dbend(new_dentry); -+ -+ /* Rename source to destination. */ -+ err = __unionfs_rename(old_dir, old_dentry, old_parent, -+ new_dir, new_dentry, new_parent, -+ old_bstart); -+ if (err) { -+ if (!IS_COPYUP_ERR(err)) -+ goto out; -+ do_copyup = old_bstart - 1; -+ } else { -+ revert = 1; -+ } -+ -+ /* -+ * Unlink all instances of destination that exist to the left of -+ * bstart of source. On error, revert back, goto out. -+ */ -+ for (bindex = old_bstart - 1; bindex >= new_bstart; bindex--) { -+ struct dentry *unlink_dentry; -+ struct dentry *unlink_dir_dentry; -+ -+ BUG_ON(bindex < 0); -+ unlink_dentry = unionfs_lower_dentry_idx(new_dentry, bindex); -+ if (!unlink_dentry) -+ continue; -+ -+ unlink_dir_dentry = lock_parent(unlink_dentry); -+ err = is_robranch_super(old_dir->i_sb, bindex); -+ if (!err) -+ err = vfs_unlink(unlink_dir_dentry->d_inode, -+ unlink_dentry); -+ -+ fsstack_copy_attr_times(new_parent->d_inode, -+ unlink_dir_dentry->d_inode); -+ /* propagate number of hard-links */ -+ new_parent->d_inode->i_nlink = -+ unionfs_get_nlinks(new_parent->d_inode); -+ -+ unlock_dir(unlink_dir_dentry); -+ if (!err) { -+ if (bindex != new_bstart) { -+ dput(unlink_dentry); -+ unionfs_set_lower_dentry_idx(new_dentry, -+ bindex, NULL); -+ } -+ } else if (IS_COPYUP_ERR(err)) { -+ do_copyup = bindex - 1; -+ } else if (revert) { -+ goto revert; -+ } -+ } -+ -+ if (do_copyup != -1) { -+ for (bindex = do_copyup; bindex >= 0; bindex--) { -+ /* -+ * copyup the file into some left directory, so that -+ * you can rename it -+ */ -+ err = copyup_dentry(old_parent->d_inode, -+ old_dentry, old_bstart, bindex, -+ old_dentry->d_name.name, -+ old_dentry->d_name.len, NULL, -+ i_size_read(old_dentry->d_inode)); -+ /* if copyup failed, try next branch to the left */ -+ if (err) -+ continue; -+ /* -+ * create whiteout before calling __unionfs_rename -+ * because the latter will change the old_dentry's -+ * lower name and parent dir, resulting in the -+ * whiteout getting created in the wrong dir. -+ */ -+ err = create_whiteout(old_dentry, bindex); -+ if (err) { -+ printk(KERN_ERR "unionfs: can't create a " -+ "whiteout for %s in rename (err=%d)\n", -+ old_dentry->d_name.name, err); -+ continue; -+ } -+ err = __unionfs_rename(old_dir, old_dentry, old_parent, -+ new_dir, new_dentry, new_parent, -+ bindex); -+ break; -+ } -+ } -+ -+ /* make it opaque */ -+ if (S_ISDIR(old_dentry->d_inode->i_mode)) { -+ err = make_dir_opaque(old_dentry, dbstart(old_dentry)); -+ if (err) -+ goto revert; -+ } -+ -+ /* -+ * Create whiteout for source, only if: -+ * (1) There is more than one underlying instance of source. -+ * (We did a copy_up is taken care of above). -+ */ -+ if ((old_bstart != old_bend) && (do_copyup == -1)) { -+ err = create_whiteout(old_dentry, old_bstart); -+ if (err) { -+ /* can't fix anything now, so we exit with -EIO */ -+ printk(KERN_ERR "unionfs: can't create a whiteout for " -+ "%s in rename!\n", old_dentry->d_name.name); -+ err = -EIO; -+ } -+ } -+ -+out: -+ return err; -+ -+revert: -+ /* Do revert here. */ -+ local_err = unionfs_refresh_lower_dentry(new_dentry, new_parent, -+ old_bstart); -+ if (local_err) { -+ printk(KERN_ERR "unionfs: revert failed in rename: " -+ "the new refresh failed\n"); -+ eio = -EIO; -+ } -+ -+ local_err = unionfs_refresh_lower_dentry(old_dentry, old_parent, -+ old_bstart); -+ if (local_err) { -+ printk(KERN_ERR "unionfs: revert failed in rename: " -+ "the old refresh failed\n"); -+ eio = -EIO; -+ goto revert_out; -+ } -+ -+ if (!unionfs_lower_dentry_idx(new_dentry, bindex) || -+ !unionfs_lower_dentry_idx(new_dentry, bindex)->d_inode) { -+ printk(KERN_ERR "unionfs: revert failed in rename: " -+ "the object disappeared from under us!\n"); -+ eio = -EIO; -+ goto revert_out; -+ } -+ -+ if (unionfs_lower_dentry_idx(old_dentry, bindex) && -+ unionfs_lower_dentry_idx(old_dentry, bindex)->d_inode) { -+ printk(KERN_ERR "unionfs: revert failed in rename: " -+ "the object was created underneath us!\n"); -+ eio = -EIO; -+ goto revert_out; -+ } -+ -+ local_err = __unionfs_rename(new_dir, new_dentry, new_parent, -+ old_dir, old_dentry, old_parent, -+ old_bstart); -+ -+ /* If we can't fix it, then we cop-out with -EIO. */ -+ if (local_err) { -+ printk(KERN_ERR "unionfs: revert failed in rename!\n"); -+ eio = -EIO; -+ } -+ -+ local_err = unionfs_refresh_lower_dentry(new_dentry, new_parent, -+ bindex); -+ if (local_err) -+ eio = -EIO; -+ local_err = unionfs_refresh_lower_dentry(old_dentry, old_parent, -+ bindex); -+ if (local_err) -+ eio = -EIO; -+ -+revert_out: -+ if (eio) -+ err = eio; -+ return err; -+} -+ -+/* -+ * We can't copyup a directory, because it may involve huge numbers of -+ * children, etc. Doing that in the kernel would be bad, so instead we -+ * return EXDEV to the user-space utility that caused this, and let the -+ * user-space recurse and ask us to copy up each file separately. -+ */ -+static int may_rename_dir(struct dentry *dentry, struct dentry *parent) -+{ -+ int err, bstart; -+ -+ err = check_empty(dentry, parent, NULL); -+ if (err == -ENOTEMPTY) { -+ if (is_robranch(dentry)) -+ return -EXDEV; -+ } else if (err) { -+ return err; -+ } -+ -+ bstart = dbstart(dentry); -+ if (dbend(dentry) == bstart || dbopaque(dentry) == bstart) -+ return 0; -+ -+ dbstart(dentry) = bstart + 1; -+ err = check_empty(dentry, parent, NULL); -+ dbstart(dentry) = bstart; -+ if (err == -ENOTEMPTY) -+ err = -EXDEV; -+ return err; -+} -+ -+/* -+ * The locking rules in unionfs_rename are complex. We could use a simpler -+ * superblock-level name-space lock for renames and copy-ups. -+ */ -+int unionfs_rename(struct inode *old_dir, struct dentry *old_dentry, -+ struct inode *new_dir, struct dentry *new_dentry) -+{ -+ int err = 0; -+ struct dentry *wh_dentry; -+ struct dentry *old_parent, *new_parent; -+ int valid = true; -+ -+ unionfs_read_lock(old_dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ old_parent = dget_parent(old_dentry); -+ new_parent = dget_parent(new_dentry); -+ /* un/lock parent dentries only if they differ from old/new_dentry */ -+ if (old_parent != old_dentry && -+ old_parent != new_dentry) -+ unionfs_lock_dentry(old_parent, UNIONFS_DMUTEX_REVAL_PARENT); -+ if (new_parent != old_dentry && -+ new_parent != new_dentry && -+ new_parent != old_parent) -+ unionfs_lock_dentry(new_parent, UNIONFS_DMUTEX_REVAL_CHILD); -+ unionfs_double_lock_dentry(old_dentry, new_dentry); -+ -+ valid = __unionfs_d_revalidate(old_dentry, old_parent, false); -+ if (!valid) { -+ err = -ESTALE; -+ goto out; -+ } -+ if (!d_deleted(new_dentry) && new_dentry->d_inode) { -+ valid = __unionfs_d_revalidate(new_dentry, new_parent, false); -+ if (!valid) { -+ err = -ESTALE; -+ goto out; -+ } -+ } -+ -+ if (!S_ISDIR(old_dentry->d_inode->i_mode)) -+ err = unionfs_partial_lookup(old_dentry, old_parent); -+ else -+ err = may_rename_dir(old_dentry, old_parent); -+ -+ if (err) -+ goto out; -+ -+ err = unionfs_partial_lookup(new_dentry, new_parent); -+ if (err) -+ goto out; -+ -+ /* -+ * if new_dentry is already lower because of whiteout, -+ * simply override it even if the whited-out dir is not empty. -+ */ -+ wh_dentry = find_first_whiteout(new_dentry); -+ if (!IS_ERR(wh_dentry)) { -+ dput(wh_dentry); -+ } else if (new_dentry->d_inode) { -+ if (S_ISDIR(old_dentry->d_inode->i_mode) != -+ S_ISDIR(new_dentry->d_inode->i_mode)) { -+ err = S_ISDIR(old_dentry->d_inode->i_mode) ? -+ -ENOTDIR : -EISDIR; -+ goto out; -+ } -+ -+ if (S_ISDIR(new_dentry->d_inode->i_mode)) { -+ struct unionfs_dir_state *namelist = NULL; -+ /* check if this unionfs directory is empty or not */ -+ err = check_empty(new_dentry, new_parent, &namelist); -+ if (err) -+ goto out; -+ -+ if (!is_robranch(new_dentry)) -+ err = delete_whiteouts(new_dentry, -+ dbstart(new_dentry), -+ namelist); -+ -+ free_rdstate(namelist); -+ -+ if (err) -+ goto out; -+ } -+ } -+ -+ err = do_unionfs_rename(old_dir, old_dentry, old_parent, -+ new_dir, new_dentry, new_parent); -+ if (err) -+ goto out; -+ -+ /* -+ * force re-lookup since the dir on ro branch is not renamed, and -+ * lower dentries still indicate the un-renamed ones. -+ */ -+ if (S_ISDIR(old_dentry->d_inode->i_mode)) -+ atomic_dec(&UNIONFS_D(old_dentry)->generation); -+ else -+ unionfs_postcopyup_release(old_dentry); -+ if (new_dentry->d_inode && !S_ISDIR(new_dentry->d_inode->i_mode)) { -+ unionfs_postcopyup_release(new_dentry); -+ unionfs_postcopyup_setmnt(new_dentry); -+ if (!unionfs_lower_inode(new_dentry->d_inode)) { -+ /* -+ * If we get here, it means that no copyup was -+ * needed, and that a file by the old name already -+ * existing on the destination branch; that file got -+ * renamed earlier in this function, so all we need -+ * to do here is set the lower inode. -+ */ -+ struct inode *inode; -+ inode = unionfs_lower_inode(old_dentry->d_inode); -+ igrab(inode); -+ unionfs_set_lower_inode_idx(new_dentry->d_inode, -+ dbstart(new_dentry), -+ inode); -+ } -+ } -+ /* if all of this renaming succeeded, update our times */ -+ unionfs_copy_attr_times(old_dentry->d_inode); -+ unionfs_copy_attr_times(new_dentry->d_inode); -+ unionfs_check_inode(old_dir); -+ unionfs_check_inode(new_dir); -+ unionfs_check_dentry(old_dentry); -+ unionfs_check_dentry(new_dentry); -+ -+out: -+ if (err) /* clear the new_dentry stuff created */ -+ d_drop(new_dentry); -+ -+ unionfs_double_unlock_dentry(old_dentry, new_dentry); -+ if (new_parent != old_dentry && -+ new_parent != new_dentry && -+ new_parent != old_parent) -+ unionfs_unlock_dentry(new_parent); -+ if (old_parent != old_dentry && -+ old_parent != new_dentry) -+ unionfs_unlock_dentry(old_parent); -+ dput(new_parent); -+ dput(old_parent); -+ unionfs_read_unlock(old_dentry->d_sb); -+ -+ return err; -+} -diff --git a/fs/unionfs/sioq.c b/fs/unionfs/sioq.c -new file mode 100644 -index 0000000..b923742 ---- /dev/null -+++ b/fs/unionfs/sioq.c -@@ -0,0 +1,101 @@ -+/* -+ * Copyright (c) 2006-2011 Erez Zadok -+ * Copyright (c) 2006 Charles P. Wright -+ * Copyright (c) 2006-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2006 Junjiro Okajima -+ * Copyright (c) 2006 David P. Quigley -+ * Copyright (c) 2006-2011 Stony Brook University -+ * Copyright (c) 2006-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * Super-user IO work Queue - sometimes we need to perform actions which -+ * would fail due to the unix permissions on the parent directory (e.g., -+ * rmdir a directory which appears empty, but in reality contains -+ * whiteouts). -+ */ -+ -+static struct workqueue_struct *superio_workqueue; -+ -+int __init init_sioq(void) -+{ -+ int err; -+ -+ superio_workqueue = create_workqueue("unionfs_siod"); -+ if (!IS_ERR(superio_workqueue)) -+ return 0; -+ -+ err = PTR_ERR(superio_workqueue); -+ printk(KERN_ERR "unionfs: create_workqueue failed %d\n", err); -+ superio_workqueue = NULL; -+ return err; -+} -+ -+void stop_sioq(void) -+{ -+ if (superio_workqueue) -+ destroy_workqueue(superio_workqueue); -+} -+ -+void run_sioq(work_func_t func, struct sioq_args *args) -+{ -+ INIT_WORK(&args->work, func); -+ -+ init_completion(&args->comp); -+ while (!queue_work(superio_workqueue, &args->work)) { -+ /* TODO: do accounting if needed */ -+ schedule(); -+ } -+ wait_for_completion(&args->comp); -+} -+ -+void __unionfs_create(struct work_struct *work) -+{ -+ struct sioq_args *args = container_of(work, struct sioq_args, work); -+ struct create_args *c = &args->create; -+ -+ args->err = vfs_create(c->parent, c->dentry, c->mode, c->nd); -+ complete(&args->comp); -+} -+ -+void __unionfs_mkdir(struct work_struct *work) -+{ -+ struct sioq_args *args = container_of(work, struct sioq_args, work); -+ struct mkdir_args *m = &args->mkdir; -+ -+ args->err = vfs_mkdir(m->parent, m->dentry, m->mode); -+ complete(&args->comp); -+} -+ -+void __unionfs_mknod(struct work_struct *work) -+{ -+ struct sioq_args *args = container_of(work, struct sioq_args, work); -+ struct mknod_args *m = &args->mknod; -+ -+ args->err = vfs_mknod(m->parent, m->dentry, m->mode, m->dev); -+ complete(&args->comp); -+} -+ -+void __unionfs_symlink(struct work_struct *work) -+{ -+ struct sioq_args *args = container_of(work, struct sioq_args, work); -+ struct symlink_args *s = &args->symlink; -+ -+ args->err = vfs_symlink(s->parent, s->dentry, s->symbuf); -+ complete(&args->comp); -+} -+ -+void __unionfs_unlink(struct work_struct *work) -+{ -+ struct sioq_args *args = container_of(work, struct sioq_args, work); -+ struct unlink_args *u = &args->unlink; -+ -+ args->err = vfs_unlink(u->parent, u->dentry); -+ complete(&args->comp); -+} -diff --git a/fs/unionfs/sioq.h b/fs/unionfs/sioq.h -new file mode 100644 -index 0000000..c2dfb94 ---- /dev/null -+++ b/fs/unionfs/sioq.h -@@ -0,0 +1,91 @@ -+/* -+ * Copyright (c) 2006-2011 Erez Zadok -+ * Copyright (c) 2006 Charles P. Wright -+ * Copyright (c) 2006-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2006 Junjiro Okajima -+ * Copyright (c) 2006 David P. Quigley -+ * Copyright (c) 2006-2011 Stony Brook University -+ * Copyright (c) 2006-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _SIOQ_H -+#define _SIOQ_H -+ -+struct deletewh_args { -+ struct unionfs_dir_state *namelist; -+ struct dentry *dentry; -+ int bindex; -+}; -+ -+struct is_opaque_args { -+ struct dentry *dentry; -+}; -+ -+struct create_args { -+ struct inode *parent; -+ struct dentry *dentry; -+ umode_t mode; -+ struct nameidata *nd; -+}; -+ -+struct mkdir_args { -+ struct inode *parent; -+ struct dentry *dentry; -+ umode_t mode; -+}; -+ -+struct mknod_args { -+ struct inode *parent; -+ struct dentry *dentry; -+ umode_t mode; -+ dev_t dev; -+}; -+ -+struct symlink_args { -+ struct inode *parent; -+ struct dentry *dentry; -+ char *symbuf; -+}; -+ -+struct unlink_args { -+ struct inode *parent; -+ struct dentry *dentry; -+}; -+ -+ -+struct sioq_args { -+ struct completion comp; -+ struct work_struct work; -+ int err; -+ void *ret; -+ -+ union { -+ struct deletewh_args deletewh; -+ struct is_opaque_args is_opaque; -+ struct create_args create; -+ struct mkdir_args mkdir; -+ struct mknod_args mknod; -+ struct symlink_args symlink; -+ struct unlink_args unlink; -+ }; -+}; -+ -+/* Extern definitions for SIOQ functions */ -+extern int __init init_sioq(void); -+extern void stop_sioq(void); -+extern void run_sioq(work_func_t func, struct sioq_args *args); -+ -+/* Extern definitions for our privilege escalation helpers */ -+extern void __unionfs_create(struct work_struct *work); -+extern void __unionfs_mkdir(struct work_struct *work); -+extern void __unionfs_mknod(struct work_struct *work); -+extern void __unionfs_symlink(struct work_struct *work); -+extern void __unionfs_unlink(struct work_struct *work); -+extern void __delete_whiteouts(struct work_struct *work); -+extern void __is_opaque_dir(struct work_struct *work); -+ -+#endif /* not _SIOQ_H */ -diff --git a/fs/unionfs/subr.c b/fs/unionfs/subr.c -new file mode 100644 -index 0000000..bdca2f7 ---- /dev/null -+++ b/fs/unionfs/subr.c -@@ -0,0 +1,95 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * returns the right n_link value based on the inode type -+ */ -+int unionfs_get_nlinks(const struct inode *inode) -+{ -+ /* don't bother to do all the work since we're unlinked */ -+ if (inode->i_nlink == 0) -+ return 0; -+ -+ if (!S_ISDIR(inode->i_mode)) -+ return unionfs_lower_inode(inode)->i_nlink; -+ -+ /* -+ * For directories, we return 1. The only place that could cares -+ * about links is readdir, and there's d_type there so even that -+ * doesn't matter. -+ */ -+ return 1; -+} -+ -+/* copy a/m/ctime from the lower branch with the newest times */ -+void unionfs_copy_attr_times(struct inode *upper) -+{ -+ int bindex; -+ struct inode *lower; -+ -+ if (!upper) -+ return; -+ if (ibstart(upper) < 0) { -+#ifdef CONFIG_UNION_FS_DEBUG -+ WARN_ON(ibstart(upper) < 0); -+#endif /* CONFIG_UNION_FS_DEBUG */ -+ return; -+ } -+ for (bindex = ibstart(upper); bindex <= ibend(upper); bindex++) { -+ lower = unionfs_lower_inode_idx(upper, bindex); -+ if (!lower) -+ continue; /* not all lower dir objects may exist */ -+ if (unlikely(timespec_compare(&upper->i_mtime, -+ &lower->i_mtime) < 0)) -+ upper->i_mtime = lower->i_mtime; -+ if (unlikely(timespec_compare(&upper->i_ctime, -+ &lower->i_ctime) < 0)) -+ upper->i_ctime = lower->i_ctime; -+ if (unlikely(timespec_compare(&upper->i_atime, -+ &lower->i_atime) < 0)) -+ upper->i_atime = lower->i_atime; -+ } -+} -+ -+/* -+ * A unionfs/fanout version of fsstack_copy_attr_all. Uses a -+ * unionfs_get_nlinks to properly calcluate the number of links to a file. -+ * Also, copies the max() of all a/m/ctimes for all lower inodes (which is -+ * important if the lower inode is a directory type) -+ */ -+void unionfs_copy_attr_all(struct inode *dest, -+ const struct inode *src) -+{ -+ dest->i_mode = src->i_mode; -+ dest->i_uid = src->i_uid; -+ dest->i_gid = src->i_gid; -+ dest->i_rdev = src->i_rdev; -+ -+ unionfs_copy_attr_times(dest); -+ -+ dest->i_blkbits = src->i_blkbits; -+ dest->i_flags = src->i_flags; -+ -+ /* -+ * Update the nlinks AFTER updating the above fields, because the -+ * get_links callback may depend on them. -+ */ -+ dest->i_nlink = unionfs_get_nlinks(dest); -+} -diff --git a/fs/unionfs/super.c b/fs/unionfs/super.c -new file mode 100644 -index 0000000..c3ac814 ---- /dev/null -+++ b/fs/unionfs/super.c -@@ -0,0 +1,1030 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * The inode cache is used with alloc_inode for both our inode info and the -+ * vfs inode. -+ */ -+static struct kmem_cache *unionfs_inode_cachep; -+ -+struct inode *unionfs_iget(struct super_block *sb, unsigned long ino) -+{ -+ int size; -+ struct unionfs_inode_info *info; -+ struct inode *inode; -+ -+ inode = iget_locked(sb, ino); -+ if (!inode) -+ return ERR_PTR(-ENOMEM); -+ if (!(inode->i_state & I_NEW)) -+ return inode; -+ -+ info = UNIONFS_I(inode); -+ memset(info, 0, offsetof(struct unionfs_inode_info, vfs_inode)); -+ info->bstart = -1; -+ info->bend = -1; -+ atomic_set(&info->generation, -+ atomic_read(&UNIONFS_SB(inode->i_sb)->generation)); -+ spin_lock_init(&info->rdlock); -+ info->rdcount = 1; -+ info->hashsize = -1; -+ INIT_LIST_HEAD(&info->readdircache); -+ -+ size = sbmax(inode->i_sb) * sizeof(struct inode *); -+ info->lower_inodes = kzalloc(size, GFP_KERNEL); -+ if (unlikely(!info->lower_inodes)) { -+ printk(KERN_CRIT "unionfs: no kernel memory when allocating " -+ "lower-pointer array!\n"); -+ iget_failed(inode); -+ return ERR_PTR(-ENOMEM); -+ } -+ -+ inode->i_version++; -+ inode->i_op = &unionfs_main_iops; -+ inode->i_fop = &unionfs_main_fops; -+ -+ inode->i_mapping->a_ops = &unionfs_aops; -+ -+ /* -+ * reset times so unionfs_copy_attr_all can keep out time invariants -+ * right (upper inode time being the max of all lower ones). -+ */ -+ inode->i_atime.tv_sec = inode->i_atime.tv_nsec = 0; -+ inode->i_mtime.tv_sec = inode->i_mtime.tv_nsec = 0; -+ inode->i_ctime.tv_sec = inode->i_ctime.tv_nsec = 0; -+ unlock_new_inode(inode); -+ return inode; -+} -+ -+/* -+ * final actions when unmounting a file system -+ * -+ * No need to lock rwsem. -+ */ -+static void unionfs_put_super(struct super_block *sb) -+{ -+ int bindex, bstart, bend; -+ struct unionfs_sb_info *spd; -+ int leaks = 0; -+ -+ spd = UNIONFS_SB(sb); -+ if (!spd) -+ return; -+ -+ bstart = sbstart(sb); -+ bend = sbend(sb); -+ -+ /* Make sure we have no leaks of branchget/branchput. */ -+ for (bindex = bstart; bindex <= bend; bindex++) -+ if (unlikely(branch_count(sb, bindex) != 0)) { -+ printk(KERN_CRIT -+ "unionfs: branch %d has %d references left!\n", -+ bindex, branch_count(sb, bindex)); -+ leaks = 1; -+ } -+ WARN_ON(leaks != 0); -+ -+ /* decrement lower super references */ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ struct super_block *s; -+ s = unionfs_lower_super_idx(sb, bindex); -+ unionfs_set_lower_super_idx(sb, bindex, NULL); -+ atomic_dec(&s->s_active); -+ } -+ -+ kfree(spd->dev_name); -+ kfree(spd->data); -+ kfree(spd); -+ sb->s_fs_info = NULL; -+} -+ -+/* -+ * Since people use this to answer the "How big of a file can I write?" -+ * question, we report the size of the highest priority branch as the size of -+ * the union. -+ */ -+static int unionfs_statfs(struct dentry *dentry, struct kstatfs *buf) -+{ -+ int err = 0; -+ struct super_block *sb; -+ struct dentry *lower_dentry; -+ struct dentry *parent; -+ struct path lower_path; -+ bool valid; -+ -+ sb = dentry->d_sb; -+ -+ unionfs_read_lock(sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ unionfs_check_dentry(dentry); -+ -+ lower_dentry = unionfs_lower_dentry(sb->s_root); -+ lower_path.dentry = lower_dentry; -+ lower_path.mnt = unionfs_mntget(sb->s_root, 0); -+ err = vfs_statfs(&lower_path, buf); -+ mntput(lower_path.mnt); -+ -+ /* set return buf to our f/s to avoid confusing user-level utils */ -+ buf->f_type = UNIONFS_SUPER_MAGIC; -+ /* -+ * Our maximum file name can is shorter by a few bytes because every -+ * file name could potentially be whited-out. -+ * -+ * XXX: this restriction goes away with ODF. -+ */ -+ unionfs_set_max_namelen(&buf->f_namelen); -+ -+ /* -+ * reset two fields to avoid confusing user-land. -+ * XXX: is this still necessary? -+ */ -+ memset(&buf->f_fsid, 0, sizeof(__kernel_fsid_t)); -+ memset(&buf->f_spare, 0, sizeof(buf->f_spare)); -+ -+out: -+ unionfs_check_dentry(dentry); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(sb); -+ return err; -+} -+ -+/* handle mode changing during remount */ -+static noinline_for_stack int do_remount_mode_option( -+ char *optarg, -+ int cur_branches, -+ struct unionfs_data *new_data, -+ struct path *new_lower_paths) -+{ -+ int err = -EINVAL; -+ int perms, idx; -+ char *modename = strchr(optarg, '='); -+ struct path path; -+ -+ /* by now, optarg contains the branch name */ -+ if (!*optarg) { -+ printk(KERN_ERR -+ "unionfs: no branch specified for mode change\n"); -+ goto out; -+ } -+ if (!modename) { -+ printk(KERN_ERR "unionfs: branch \"%s\" requires a mode\n", -+ optarg); -+ goto out; -+ } -+ *modename++ = '\0'; -+ err = parse_branch_mode(modename, &perms); -+ if (err) { -+ printk(KERN_ERR "unionfs: invalid mode \"%s\" for \"%s\"\n", -+ modename, optarg); -+ goto out; -+ } -+ -+ /* -+ * Find matching branch index. For now, this assumes that nothing -+ * has been mounted on top of this Unionfs stack. Once we have /odf -+ * and cache-coherency resolved, we'll address the branch-path -+ * uniqueness. -+ */ -+ err = kern_path(optarg, LOOKUP_FOLLOW, &path); -+ if (err) { -+ printk(KERN_ERR "unionfs: error accessing " -+ "lower directory \"%s\" (error %d)\n", -+ optarg, err); -+ goto out; -+ } -+ for (idx = 0; idx < cur_branches; idx++) -+ if (path.mnt == new_lower_paths[idx].mnt && -+ path.dentry == new_lower_paths[idx].dentry) -+ break; -+ path_put(&path); /* no longer needed */ -+ if (idx == cur_branches) { -+ err = -ENOENT; /* err may have been reset above */ -+ printk(KERN_ERR "unionfs: branch \"%s\" " -+ "not found\n", optarg); -+ goto out; -+ } -+ /* check/change mode for existing branch */ -+ /* we don't warn if perms==branchperms */ -+ new_data[idx].branchperms = perms; -+ err = 0; -+out: -+ return err; -+} -+ -+/* handle branch deletion during remount */ -+static noinline_for_stack int do_remount_del_option( -+ char *optarg, int cur_branches, -+ struct unionfs_data *new_data, -+ struct path *new_lower_paths) -+{ -+ int err = -EINVAL; -+ int idx; -+ struct path path; -+ -+ /* optarg contains the branch name to delete */ -+ -+ /* -+ * Find matching branch index. For now, this assumes that nothing -+ * has been mounted on top of this Unionfs stack. Once we have /odf -+ * and cache-coherency resolved, we'll address the branch-path -+ * uniqueness. -+ */ -+ err = kern_path(optarg, LOOKUP_FOLLOW, &path); -+ if (err) { -+ printk(KERN_ERR "unionfs: error accessing " -+ "lower directory \"%s\" (error %d)\n", -+ optarg, err); -+ goto out; -+ } -+ for (idx = 0; idx < cur_branches; idx++) -+ if (path.mnt == new_lower_paths[idx].mnt && -+ path.dentry == new_lower_paths[idx].dentry) -+ break; -+ path_put(&path); /* no longer needed */ -+ if (idx == cur_branches) { -+ printk(KERN_ERR "unionfs: branch \"%s\" " -+ "not found\n", optarg); -+ err = -ENOENT; -+ goto out; -+ } -+ /* check if there are any open files on the branch to be deleted */ -+ if (atomic_read(&new_data[idx].open_files) > 0) { -+ err = -EBUSY; -+ goto out; -+ } -+ -+ /* -+ * Now we have to delete the branch. First, release any handles it -+ * has. Then, move the remaining array indexes past "idx" in -+ * new_data and new_lower_paths one to the left. Finally, adjust -+ * cur_branches. -+ */ -+ path_put(&new_lower_paths[idx]); -+ -+ if (idx < cur_branches - 1) { -+ /* if idx==cur_branches-1, we delete last branch: easy */ -+ memmove(&new_data[idx], &new_data[idx+1], -+ (cur_branches - 1 - idx) * -+ sizeof(struct unionfs_data)); -+ memmove(&new_lower_paths[idx], &new_lower_paths[idx+1], -+ (cur_branches - 1 - idx) * sizeof(struct path)); -+ } -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/* handle branch insertion during remount */ -+static noinline_for_stack int do_remount_add_option( -+ char *optarg, int cur_branches, -+ struct unionfs_data *new_data, -+ struct path *new_lower_paths, -+ int *high_branch_id) -+{ -+ int err = -EINVAL; -+ int perms; -+ int idx = 0; /* default: insert at beginning */ -+ char *new_branch , *modename = NULL; -+ struct path path; -+ -+ /* -+ * optarg can be of several forms: -+ * -+ * /bar:/foo insert /foo before /bar -+ * /bar:/foo=ro insert /foo in ro mode before /bar -+ * /foo insert /foo in the beginning (prepend) -+ * :/foo insert /foo at the end (append) -+ */ -+ if (*optarg == ':') { /* append? */ -+ new_branch = optarg + 1; /* skip ':' */ -+ idx = cur_branches; -+ goto found_insertion_point; -+ } -+ new_branch = strchr(optarg, ':'); -+ if (!new_branch) { /* prepend? */ -+ new_branch = optarg; -+ goto found_insertion_point; -+ } -+ *new_branch++ = '\0'; /* holds path+mode of new branch */ -+ -+ /* -+ * Find matching branch index. For now, this assumes that nothing -+ * has been mounted on top of this Unionfs stack. Once we have /odf -+ * and cache-coherency resolved, we'll address the branch-path -+ * uniqueness. -+ */ -+ err = kern_path(optarg, LOOKUP_FOLLOW, &path); -+ if (err) { -+ printk(KERN_ERR "unionfs: error accessing " -+ "lower directory \"%s\" (error %d)\n", -+ optarg, err); -+ goto out; -+ } -+ for (idx = 0; idx < cur_branches; idx++) -+ if (path.mnt == new_lower_paths[idx].mnt && -+ path.dentry == new_lower_paths[idx].dentry) -+ break; -+ path_put(&path); /* no longer needed */ -+ if (idx == cur_branches) { -+ printk(KERN_ERR "unionfs: branch \"%s\" " -+ "not found\n", optarg); -+ err = -ENOENT; -+ goto out; -+ } -+ -+ /* -+ * At this point idx will hold the index where the new branch should -+ * be inserted before. -+ */ -+found_insertion_point: -+ /* find the mode for the new branch */ -+ if (new_branch) -+ modename = strchr(new_branch, '='); -+ if (modename) -+ *modename++ = '\0'; -+ if (!new_branch || !*new_branch) { -+ printk(KERN_ERR "unionfs: null new branch\n"); -+ err = -EINVAL; -+ goto out; -+ } -+ err = parse_branch_mode(modename, &perms); -+ if (err) { -+ printk(KERN_ERR "unionfs: invalid mode \"%s\" for " -+ "branch \"%s\"\n", modename, new_branch); -+ goto out; -+ } -+ err = kern_path(new_branch, LOOKUP_FOLLOW, &path); -+ if (err) { -+ printk(KERN_ERR "unionfs: error accessing " -+ "lower directory \"%s\" (error %d)\n", -+ new_branch, err); -+ goto out; -+ } -+ /* -+ * It's probably safe to check_mode the new branch to insert. Note: -+ * we don't allow inserting branches which are unionfs's by -+ * themselves (check_branch returns EINVAL in that case). This is -+ * because this code base doesn't support stacking unionfs: the ODF -+ * code base supports that correctly. -+ */ -+ err = check_branch(&path); -+ if (err) { -+ printk(KERN_ERR "unionfs: lower directory " -+ "\"%s\" is not a valid branch\n", optarg); -+ path_put(&path); -+ goto out; -+ } -+ -+ /* -+ * Now we have to insert the new branch. But first, move the bits -+ * to make space for the new branch, if needed. Finally, adjust -+ * cur_branches. -+ * We don't release nd here; it's kept until umount/remount. -+ */ -+ if (idx < cur_branches) { -+ /* if idx==cur_branches, we append: easy */ -+ memmove(&new_data[idx+1], &new_data[idx], -+ (cur_branches - idx) * sizeof(struct unionfs_data)); -+ memmove(&new_lower_paths[idx+1], &new_lower_paths[idx], -+ (cur_branches - idx) * sizeof(struct path)); -+ } -+ new_lower_paths[idx].dentry = path.dentry; -+ new_lower_paths[idx].mnt = path.mnt; -+ -+ new_data[idx].sb = path.dentry->d_sb; -+ atomic_set(&new_data[idx].open_files, 0); -+ new_data[idx].branchperms = perms; -+ new_data[idx].branch_id = ++*high_branch_id; /* assign new branch ID */ -+ -+ err = 0; -+out: -+ return err; -+} -+ -+ -+/* -+ * Support branch management options on remount. -+ * -+ * See Documentation/filesystems/unionfs/ for details. -+ * -+ * @flags: numeric mount options -+ * @options: mount options string -+ * -+ * This function can rearrange a mounted union dynamically, adding and -+ * removing branches, including changing branch modes. Clearly this has to -+ * be done safely and atomically. Luckily, the VFS already calls this -+ * function with lock_super(sb) and lock_kernel() held, preventing -+ * concurrent mixing of new mounts, remounts, and unmounts. Moreover, -+ * do_remount_sb(), our caller function, already called shrink_dcache_sb(sb) -+ * to purge dentries/inodes from our superblock, and also called -+ * fsync_super(sb) to purge any dirty pages. So we're good. -+ * -+ * XXX: however, our remount code may also need to invalidate mapped pages -+ * so as to force them to be re-gotten from the (newly reconfigured) lower -+ * branches. This has to wait for proper mmap and cache coherency support -+ * in the VFS. -+ * -+ */ -+static int unionfs_remount_fs(struct super_block *sb, int *flags, -+ char *options) -+{ -+ int err = 0; -+ int i; -+ char *optionstmp, *tmp_to_free; /* kstrdup'ed of "options" */ -+ char *optname; -+ int cur_branches = 0; /* no. of current branches */ -+ int new_branches = 0; /* no. of branches actually left in the end */ -+ int add_branches; /* est. no. of branches to add */ -+ int del_branches; /* est. no. of branches to del */ -+ int max_branches; /* max possible no. of branches */ -+ struct unionfs_data *new_data = NULL, *tmp_data = NULL; -+ struct path *new_lower_paths = NULL, *tmp_lower_paths = NULL; -+ struct inode **new_lower_inodes = NULL; -+ int new_high_branch_id; /* new high branch ID */ -+ int size; /* memory allocation size, temp var */ -+ int old_ibstart, old_ibend; -+ -+ unionfs_write_lock(sb); -+ -+ /* -+ * The VFS will take care of "ro" and "rw" flags, and we can safely -+ * ignore MS_SILENT, but anything else left over is an error. So we -+ * need to check if any other flags may have been passed (none are -+ * allowed/supported as of now). -+ */ -+ if ((*flags & ~(MS_RDONLY | MS_SILENT)) != 0) { -+ printk(KERN_ERR -+ "unionfs: remount flags 0x%x unsupported\n", *flags); -+ err = -EINVAL; -+ goto out_error; -+ } -+ -+ /* -+ * If 'options' is NULL, it's probably because the user just changed -+ * the union to a "ro" or "rw" and the VFS took care of it. So -+ * nothing to do and we're done. -+ */ -+ if (!options || options[0] == '\0') -+ goto out_error; -+ -+ /* -+ * Find out how many branches we will have in the end, counting -+ * "add" and "del" commands. Copy the "options" string because -+ * strsep modifies the string and we need it later. -+ */ -+ tmp_to_free = kstrdup(options, GFP_KERNEL); -+ optionstmp = tmp_to_free; -+ if (unlikely(!optionstmp)) { -+ err = -ENOMEM; -+ goto out_free; -+ } -+ cur_branches = sbmax(sb); /* current no. branches */ -+ new_branches = sbmax(sb); -+ del_branches = 0; -+ add_branches = 0; -+ new_high_branch_id = sbhbid(sb); /* save current high_branch_id */ -+ while ((optname = strsep(&optionstmp, ",")) != NULL) { -+ char *optarg; -+ -+ if (!optname || !*optname) -+ continue; -+ -+ optarg = strchr(optname, '='); -+ if (optarg) -+ *optarg++ = '\0'; -+ -+ if (!strcmp("add", optname)) -+ add_branches++; -+ else if (!strcmp("del", optname)) -+ del_branches++; -+ } -+ kfree(tmp_to_free); -+ /* after all changes, will we have at least one branch left? */ -+ if ((new_branches + add_branches - del_branches) < 1) { -+ printk(KERN_ERR -+ "unionfs: no branches left after remount\n"); -+ err = -EINVAL; -+ goto out_free; -+ } -+ -+ /* -+ * Since we haven't actually parsed all the add/del options, nor -+ * have we checked them for errors, we don't know for sure how many -+ * branches we will have after all changes have taken place. In -+ * fact, the total number of branches left could be less than what -+ * we have now. So we need to allocate space for a temporary -+ * placeholder that is at least as large as the maximum number of -+ * branches we *could* have, which is the current number plus all -+ * the additions. Once we're done with these temp placeholders, we -+ * may have to re-allocate the final size, copy over from the temp, -+ * and then free the temps (done near the end of this function). -+ */ -+ max_branches = cur_branches + add_branches; -+ /* allocate space for new pointers to lower dentry */ -+ tmp_data = kcalloc(max_branches, -+ sizeof(struct unionfs_data), GFP_KERNEL); -+ if (unlikely(!tmp_data)) { -+ err = -ENOMEM; -+ goto out_free; -+ } -+ /* allocate space for new pointers to lower paths */ -+ tmp_lower_paths = kcalloc(max_branches, -+ sizeof(struct path), GFP_KERNEL); -+ if (unlikely(!tmp_lower_paths)) { -+ err = -ENOMEM; -+ goto out_free; -+ } -+ /* copy current info into new placeholders, incrementing refcnts */ -+ memcpy(tmp_data, UNIONFS_SB(sb)->data, -+ cur_branches * sizeof(struct unionfs_data)); -+ memcpy(tmp_lower_paths, UNIONFS_D(sb->s_root)->lower_paths, -+ cur_branches * sizeof(struct path)); -+ for (i = 0; i < cur_branches; i++) -+ path_get(&tmp_lower_paths[i]); /* drop refs at end of fxn */ -+ -+ /******************************************************************* -+ * For each branch command, do kern_path on the requested branch, -+ * and apply the change to a temp branch list. To handle errors, we -+ * already dup'ed the old arrays (above), and increased the refcnts -+ * on various f/s objects. So now we can do all the kern_path'ss -+ * and branch-management commands on the new arrays. If it fail mid -+ * way, we free the tmp arrays and *put all objects. If we succeed, -+ * then we free old arrays and *put its objects, and then replace -+ * the arrays with the new tmp list (we may have to re-allocate the -+ * memory because the temp lists could have been larger than what we -+ * actually needed). -+ *******************************************************************/ -+ -+ while ((optname = strsep(&options, ",")) != NULL) { -+ char *optarg; -+ -+ if (!optname || !*optname) -+ continue; -+ /* -+ * At this stage optname holds a comma-delimited option, but -+ * without the commas. Next, we need to break the string on -+ * the '=' symbol to separate CMD=ARG, where ARG itself can -+ * be KEY=VAL. For example, in mode=/foo=rw, CMD is "mode", -+ * KEY is "/foo", and VAL is "rw". -+ */ -+ optarg = strchr(optname, '='); -+ if (optarg) -+ *optarg++ = '\0'; -+ /* incgen remount option (instead of old ioctl) */ -+ if (!strcmp("incgen", optname)) { -+ err = 0; -+ goto out_no_change; -+ } -+ -+ /* -+ * All of our options take an argument now. (Insert ones -+ * that don't above this check.) So at this stage optname -+ * contains the CMD part and optarg contains the ARG part. -+ */ -+ if (!optarg || !*optarg) { -+ printk(KERN_ERR "unionfs: all remount options require " -+ "an argument (%s)\n", optname); -+ err = -EINVAL; -+ goto out_release; -+ } -+ -+ if (!strcmp("add", optname)) { -+ err = do_remount_add_option(optarg, new_branches, -+ tmp_data, -+ tmp_lower_paths, -+ &new_high_branch_id); -+ if (err) -+ goto out_release; -+ new_branches++; -+ if (new_branches > UNIONFS_MAX_BRANCHES) { -+ printk(KERN_ERR "unionfs: command exceeds " -+ "%d branches\n", UNIONFS_MAX_BRANCHES); -+ err = -E2BIG; -+ goto out_release; -+ } -+ continue; -+ } -+ if (!strcmp("del", optname)) { -+ err = do_remount_del_option(optarg, new_branches, -+ tmp_data, -+ tmp_lower_paths); -+ if (err) -+ goto out_release; -+ new_branches--; -+ continue; -+ } -+ if (!strcmp("mode", optname)) { -+ err = do_remount_mode_option(optarg, new_branches, -+ tmp_data, -+ tmp_lower_paths); -+ if (err) -+ goto out_release; -+ continue; -+ } -+ -+ /* -+ * When you use "mount -o remount,ro", mount(8) will -+ * reportedly pass the original dirs= string from -+ * /proc/mounts. So for now, we have to ignore dirs= and -+ * not consider it an error, unless we want to allow users -+ * to pass dirs= in remount. Note that to allow the VFS to -+ * actually process the ro/rw remount options, we have to -+ * return 0 from this function. -+ */ -+ if (!strcmp("dirs", optname)) { -+ printk(KERN_WARNING -+ "unionfs: remount ignoring option \"%s\"\n", -+ optname); -+ continue; -+ } -+ -+ err = -EINVAL; -+ printk(KERN_ERR -+ "unionfs: unrecognized option \"%s\"\n", optname); -+ goto out_release; -+ } -+ -+out_no_change: -+ -+ /****************************************************************** -+ * WE'RE ALMOST DONE: check if leftmost branch might be read-only, -+ * see if we need to allocate a small-sized new vector, copy the -+ * vectors to their correct place, release the refcnt of the older -+ * ones, and return. Also handle invalidating any pages that will -+ * have to be re-read. -+ *******************************************************************/ -+ -+ if (!(tmp_data[0].branchperms & MAY_WRITE)) { -+ printk(KERN_ERR "unionfs: leftmost branch cannot be read-only " -+ "(use \"remount,ro\" to create a read-only union)\n"); -+ err = -EINVAL; -+ goto out_release; -+ } -+ -+ /* (re)allocate space for new pointers to lower dentry */ -+ size = new_branches * sizeof(struct unionfs_data); -+ new_data = krealloc(tmp_data, size, GFP_KERNEL); -+ if (unlikely(!new_data)) { -+ err = -ENOMEM; -+ goto out_release; -+ } -+ -+ /* allocate space for new pointers to lower paths */ -+ size = new_branches * sizeof(struct path); -+ new_lower_paths = krealloc(tmp_lower_paths, size, GFP_KERNEL); -+ if (unlikely(!new_lower_paths)) { -+ err = -ENOMEM; -+ goto out_release; -+ } -+ -+ /* allocate space for new pointers to lower inodes */ -+ new_lower_inodes = kcalloc(new_branches, -+ sizeof(struct inode *), GFP_KERNEL); -+ if (unlikely(!new_lower_inodes)) { -+ err = -ENOMEM; -+ goto out_release; -+ } -+ -+ /* -+ * OK, just before we actually put the new set of branches in place, -+ * we need to ensure that our own f/s has no dirty objects left. -+ * Luckily, do_remount_sb() already calls shrink_dcache_sb(sb) and -+ * fsync_super(sb), taking care of dentries, inodes, and dirty -+ * pages. So all that's left is for us to invalidate any leftover -+ * (non-dirty) pages to ensure that they will be re-read from the -+ * new lower branches (and to support mmap). -+ */ -+ -+ /* -+ * Once we finish the remounting successfully, our superblock -+ * generation number will have increased. This will be detected by -+ * our dentry-revalidation code upon subsequent f/s operations -+ * through unionfs. The revalidation code will rebuild the union of -+ * lower inodes for a given unionfs inode and invalidate any pages -+ * of such "stale" inodes (by calling our purge_inode_data -+ * function). This revalidation will happen lazily and -+ * incrementally, as users perform operations on cached inodes. We -+ * would like to encourage this revalidation to happen sooner if -+ * possible, so we like to try to invalidate as many other pages in -+ * our superblock as we can. We used to call drop_pagecache_sb() or -+ * a variant thereof, but either method was racy (drop_caches alone -+ * is known to be racy). So now we let the revalidation happen on a -+ * per file basis in ->d_revalidate. -+ */ -+ -+ /* grab new lower super references; release old ones */ -+ for (i = 0; i < new_branches; i++) -+ atomic_inc(&new_data[i].sb->s_active); -+ for (i = 0; i < sbmax(sb); i++) -+ atomic_dec(&UNIONFS_SB(sb)->data[i].sb->s_active); -+ -+ /* copy new vectors into their correct place */ -+ tmp_data = UNIONFS_SB(sb)->data; -+ UNIONFS_SB(sb)->data = new_data; -+ new_data = NULL; /* so don't free good pointers below */ -+ tmp_lower_paths = UNIONFS_D(sb->s_root)->lower_paths; -+ UNIONFS_D(sb->s_root)->lower_paths = new_lower_paths; -+ new_lower_paths = NULL; /* so don't free good pointers below */ -+ -+ /* update our unionfs_sb_info and root dentry index of last branch */ -+ i = sbmax(sb); /* save no. of branches to release at end */ -+ sbend(sb) = new_branches - 1; -+ dbend(sb->s_root) = new_branches - 1; -+ old_ibstart = ibstart(sb->s_root->d_inode); -+ old_ibend = ibend(sb->s_root->d_inode); -+ ibend(sb->s_root->d_inode) = new_branches - 1; -+ UNIONFS_D(sb->s_root)->bcount = new_branches; -+ new_branches = i; /* no. of branches to release below */ -+ -+ /* -+ * Update lower inodes: 3 steps -+ * 1. grab ref on all new lower inodes -+ */ -+ for (i = dbstart(sb->s_root); i <= dbend(sb->s_root); i++) { -+ struct dentry *lower_dentry = -+ unionfs_lower_dentry_idx(sb->s_root, i); -+ igrab(lower_dentry->d_inode); -+ new_lower_inodes[i] = lower_dentry->d_inode; -+ } -+ /* 2. release reference on all older lower inodes */ -+ iput_lowers(sb->s_root->d_inode, old_ibstart, old_ibend, true); -+ /* 3. update root dentry's inode to new lower_inodes array */ -+ UNIONFS_I(sb->s_root->d_inode)->lower_inodes = new_lower_inodes; -+ new_lower_inodes = NULL; -+ -+ /* maxbytes may have changed */ -+ sb->s_maxbytes = unionfs_lower_super_idx(sb, 0)->s_maxbytes; -+ /* update high branch ID */ -+ sbhbid(sb) = new_high_branch_id; -+ -+ /* update our sb->generation for revalidating objects */ -+ i = atomic_inc_return(&UNIONFS_SB(sb)->generation); -+ atomic_set(&UNIONFS_D(sb->s_root)->generation, i); -+ atomic_set(&UNIONFS_I(sb->s_root->d_inode)->generation, i); -+ if (!(*flags & MS_SILENT)) -+ pr_info("unionfs: %s: new generation number %d\n", -+ UNIONFS_SB(sb)->dev_name, i); -+ /* finally, update the root dentry's times */ -+ unionfs_copy_attr_times(sb->s_root->d_inode); -+ err = 0; /* reset to success */ -+ -+ /* -+ * The code above falls through to the next label, and releases the -+ * refcnts of the older ones (stored in tmp_*): if we fell through -+ * here, it means success. However, if we jump directly to this -+ * label from any error above, then an error occurred after we -+ * grabbed various refcnts, and so we have to release the -+ * temporarily constructed structures. -+ */ -+out_release: -+ /* no need to cleanup/release anything in tmp_data */ -+ if (tmp_lower_paths) -+ for (i = 0; i < new_branches; i++) -+ path_put(&tmp_lower_paths[i]); -+out_free: -+ kfree(tmp_lower_paths); -+ kfree(tmp_data); -+ kfree(new_lower_paths); -+ kfree(new_data); -+ kfree(new_lower_inodes); -+out_error: -+ unionfs_check_dentry(sb->s_root); -+ unionfs_write_unlock(sb); -+ return err; -+} -+ -+/* -+ * Called by iput() when the inode reference count reached zero -+ * and the inode is not hashed anywhere. Used to clear anything -+ * that needs to be, before the inode is completely destroyed and put -+ * on the inode free list. -+ * -+ * No need to lock sb info's rwsem. -+ */ -+static void unionfs_evict_inode(struct inode *inode) -+{ -+ int bindex, bstart, bend; -+ struct inode *lower_inode; -+ struct list_head *pos, *n; -+ struct unionfs_dir_state *rdstate; -+ -+ truncate_inode_pages(&inode->i_data, 0); -+ end_writeback(inode); -+ -+ list_for_each_safe(pos, n, &UNIONFS_I(inode)->readdircache) { -+ rdstate = list_entry(pos, struct unionfs_dir_state, cache); -+ list_del(&rdstate->cache); -+ free_rdstate(rdstate); -+ } -+ -+ /* -+ * Decrement a reference to a lower_inode, which was incremented -+ * by our read_inode when it was created initially. -+ */ -+ bstart = ibstart(inode); -+ bend = ibend(inode); -+ if (bstart >= 0) { -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); -+ if (!lower_inode) -+ continue; -+ unionfs_set_lower_inode_idx(inode, bindex, NULL); -+ /* see Documentation/filesystems/unionfs/issues.txt */ -+ lockdep_off(); -+ iput(lower_inode); -+ lockdep_on(); -+ } -+ } -+ -+ kfree(UNIONFS_I(inode)->lower_inodes); -+ UNIONFS_I(inode)->lower_inodes = NULL; -+} -+ -+static struct inode *unionfs_alloc_inode(struct super_block *sb) -+{ -+ struct unionfs_inode_info *i; -+ -+ i = kmem_cache_alloc(unionfs_inode_cachep, GFP_KERNEL); -+ if (unlikely(!i)) -+ return NULL; -+ -+ /* memset everything up to the inode to 0 */ -+ memset(i, 0, offsetof(struct unionfs_inode_info, vfs_inode)); -+ -+ i->vfs_inode.i_version = 1; -+ return &i->vfs_inode; -+} -+ -+static void unionfs_destroy_inode(struct inode *inode) -+{ -+ kmem_cache_free(unionfs_inode_cachep, UNIONFS_I(inode)); -+} -+ -+/* unionfs inode cache constructor */ -+static void init_once(void *obj) -+{ -+ struct unionfs_inode_info *i = obj; -+ -+ inode_init_once(&i->vfs_inode); -+} -+ -+int unionfs_init_inode_cache(void) -+{ -+ int err = 0; -+ -+ unionfs_inode_cachep = -+ kmem_cache_create("unionfs_inode_cache", -+ sizeof(struct unionfs_inode_info), 0, -+ SLAB_RECLAIM_ACCOUNT, init_once); -+ if (unlikely(!unionfs_inode_cachep)) -+ err = -ENOMEM; -+ return err; -+} -+ -+/* unionfs inode cache destructor */ -+void unionfs_destroy_inode_cache(void) -+{ -+ if (unionfs_inode_cachep) -+ kmem_cache_destroy(unionfs_inode_cachep); -+} -+ -+/* -+ * Called when we have a dirty inode, right here we only throw out -+ * parts of our readdir list that are too old. -+ * -+ * No need to grab sb info's rwsem. -+ */ -+static int unionfs_write_inode(struct inode *inode, -+ struct writeback_control *wbc) -+{ -+ struct list_head *pos, *n; -+ struct unionfs_dir_state *rdstate; -+ -+ spin_lock(&UNIONFS_I(inode)->rdlock); -+ list_for_each_safe(pos, n, &UNIONFS_I(inode)->readdircache) { -+ rdstate = list_entry(pos, struct unionfs_dir_state, cache); -+ /* We keep this list in LRU order. */ -+ if ((rdstate->access + RDCACHE_JIFFIES) > jiffies) -+ break; -+ UNIONFS_I(inode)->rdcount--; -+ list_del(&rdstate->cache); -+ free_rdstate(rdstate); -+ } -+ spin_unlock(&UNIONFS_I(inode)->rdlock); -+ -+ return 0; -+} -+ -+/* -+ * Used only in nfs, to kill any pending RPC tasks, so that subsequent -+ * code can actually succeed and won't leave tasks that need handling. -+ */ -+static void unionfs_umount_begin(struct super_block *sb) -+{ -+ struct super_block *lower_sb; -+ int bindex, bstart, bend; -+ -+ unionfs_read_lock(sb, UNIONFS_SMUTEX_CHILD); -+ -+ bstart = sbstart(sb); -+ bend = sbend(sb); -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_sb = unionfs_lower_super_idx(sb, bindex); -+ -+ if (lower_sb && lower_sb->s_op && -+ lower_sb->s_op->umount_begin) -+ lower_sb->s_op->umount_begin(lower_sb); -+ } -+ -+ unionfs_read_unlock(sb); -+} -+ -+static int unionfs_show_options(struct seq_file *m, struct vfsmount *mnt) -+{ -+ struct super_block *sb = mnt->mnt_sb; -+ int ret = 0; -+ char *tmp_page; -+ char *path; -+ int bindex, bstart, bend; -+ int perms; -+ -+ /* to prevent a silly lockdep warning with namespace_sem */ -+ lockdep_off(); -+ unionfs_read_lock(sb, UNIONFS_SMUTEX_CHILD); -+ unionfs_lock_dentry(sb->s_root, UNIONFS_DMUTEX_CHILD); -+ -+ tmp_page = (char *) __get_free_page(GFP_KERNEL); -+ if (unlikely(!tmp_page)) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ bstart = sbstart(sb); -+ bend = sbend(sb); -+ -+ seq_printf(m, ",dirs="); -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ struct path p; -+ p.dentry = unionfs_lower_dentry_idx(sb->s_root, bindex); -+ p.mnt = unionfs_lower_mnt_idx(sb->s_root, bindex); -+ path = d_path(&p, tmp_page, PAGE_SIZE); -+ if (IS_ERR(path)) { -+ ret = PTR_ERR(path); -+ goto out; -+ } -+ -+ perms = branchperms(sb, bindex); -+ -+ seq_printf(m, "%s=%s", path, -+ perms & MAY_WRITE ? "rw" : "ro"); -+ if (bindex != bend) -+ seq_printf(m, ":"); -+ } -+ -+out: -+ free_page((unsigned long) tmp_page); -+ -+ unionfs_unlock_dentry(sb->s_root); -+ unionfs_read_unlock(sb); -+ lockdep_on(); -+ -+ return ret; -+} -+ -+struct super_operations unionfs_sops = { -+ .put_super = unionfs_put_super, -+ .statfs = unionfs_statfs, -+ .remount_fs = unionfs_remount_fs, -+ .evict_inode = unionfs_evict_inode, -+ .umount_begin = unionfs_umount_begin, -+ .show_options = unionfs_show_options, -+ .write_inode = unionfs_write_inode, -+ .alloc_inode = unionfs_alloc_inode, -+ .destroy_inode = unionfs_destroy_inode, -+}; -diff --git a/fs/unionfs/union.h b/fs/unionfs/union.h -new file mode 100644 -index 0000000..1821705 ---- /dev/null -+++ b/fs/unionfs/union.h -@@ -0,0 +1,679 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _UNION_H_ -+#define _UNION_H_ -+ -+#include <linux/dcache.h> -+#include <linux/file.h> -+#include <linux/list.h> -+#include <linux/fs.h> -+#include <linux/mm.h> -+#include <linux/module.h> -+#include <linux/mount.h> -+#include <linux/namei.h> -+#include <linux/page-flags.h> -+#include <linux/pagemap.h> -+#include <linux/poll.h> -+#include <linux/security.h> -+#include <linux/seq_file.h> -+#include <linux/slab.h> -+#include <linux/spinlock.h> -+#include <linux/statfs.h> -+#include <linux/string.h> -+#include <linux/vmalloc.h> -+#include <linux/writeback.h> -+#include <linux/buffer_head.h> -+#include <linux/xattr.h> -+#include <linux/fs_stack.h> -+#include <linux/magic.h> -+#include <linux/log2.h> -+#include <linux/poison.h> -+#include <linux/mman.h> -+#include <linux/backing-dev.h> -+#include <linux/splice.h> -+#include <linux/sched.h> -+ -+#include <asm/system.h> -+ -+#include <linux/union_fs.h> -+ -+/* the file system name */ -+#define UNIONFS_NAME "unionfs" -+ -+/* unionfs root inode number */ -+#define UNIONFS_ROOT_INO 1 -+ -+/* number of times we try to get a unique temporary file name */ -+#define GET_TMPNAM_MAX_RETRY 5 -+ -+/* maximum number of branches we support, to avoid memory blowup */ -+#define UNIONFS_MAX_BRANCHES 128 -+ -+/* minimum time (seconds) required for time-based cache-coherency */ -+#define UNIONFS_MIN_CC_TIME 3 -+ -+/* Operations vectors defined in specific files. */ -+extern struct file_operations unionfs_main_fops; -+extern struct file_operations unionfs_dir_fops; -+extern struct inode_operations unionfs_main_iops; -+extern struct inode_operations unionfs_dir_iops; -+extern struct inode_operations unionfs_symlink_iops; -+extern struct super_operations unionfs_sops; -+extern struct dentry_operations unionfs_dops; -+extern struct address_space_operations unionfs_aops, unionfs_dummy_aops; -+extern struct vm_operations_struct unionfs_vm_ops; -+ -+/* How long should an entry be allowed to persist */ -+#define RDCACHE_JIFFIES (5*HZ) -+ -+/* compatibility with Real-Time patches */ -+#ifdef CONFIG_PREEMPT_RT -+# define unionfs_rw_semaphore compat_rw_semaphore -+#else /* not CONFIG_PREEMPT_RT */ -+# define unionfs_rw_semaphore rw_semaphore -+#endif /* not CONFIG_PREEMPT_RT */ -+ -+/* file private data. */ -+struct unionfs_file_info { -+ int bstart; -+ int bend; -+ atomic_t generation; -+ -+ struct unionfs_dir_state *rdstate; -+ struct file **lower_files; -+ int *saved_branch_ids; /* IDs of branches when file was opened */ -+ const struct vm_operations_struct *lower_vm_ops; -+ bool wrote_to_file; /* for delayed copyup */ -+}; -+ -+/* unionfs inode data in memory */ -+struct unionfs_inode_info { -+ int bstart; -+ int bend; -+ atomic_t generation; -+ /* Stuff for readdir over NFS. */ -+ spinlock_t rdlock; -+ struct list_head readdircache; -+ int rdcount; -+ int hashsize; -+ int cookie; -+ -+ /* The lower inodes */ -+ struct inode **lower_inodes; -+ -+ struct inode vfs_inode; -+}; -+ -+/* unionfs dentry data in memory */ -+struct unionfs_dentry_info { -+ /* -+ * The semaphore is used to lock the dentry as soon as we get into a -+ * unionfs function from the VFS. Our lock ordering is that children -+ * go before their parents. -+ */ -+ struct mutex lock; -+ int bstart; -+ int bend; -+ int bopaque; -+ int bcount; -+ atomic_t generation; -+ struct path *lower_paths; -+}; -+ -+/* These are the pointers to our various objects. */ -+struct unionfs_data { -+ struct super_block *sb; /* lower super_block */ -+ atomic_t open_files; /* number of open files on branch */ -+ int branchperms; -+ int branch_id; /* unique branch ID at re/mount time */ -+}; -+ -+/* unionfs super-block data in memory */ -+struct unionfs_sb_info { -+ int bend; -+ -+ atomic_t generation; -+ -+ /* -+ * This rwsem is used to make sure that a branch management -+ * operation... -+ * 1) will not begin before all currently in-flight operations -+ * complete. -+ * 2) any new operations do not execute until the currently -+ * running branch management operation completes. -+ * -+ * The write_lock_owner records the PID of the task which grabbed -+ * the rw_sem for writing. If the same task also tries to grab the -+ * read lock, we allow it. This prevents a self-deadlock when -+ * branch-management is used on a pivot_root'ed union, because we -+ * have to ->lookup paths which belong to the same union. -+ */ -+ struct unionfs_rw_semaphore rwsem; -+ pid_t write_lock_owner; /* PID of rw_sem owner (write lock) */ -+ int high_branch_id; /* last unique branch ID given */ -+ char *dev_name; /* to identify different unions in pr_debug */ -+ struct unionfs_data *data; -+}; -+ -+/* -+ * structure for making the linked list of entries by readdir on left branch -+ * to compare with entries on right branch -+ */ -+struct filldir_node { -+ struct list_head file_list; /* list for directory entries */ -+ char *name; /* name entry */ -+ int hash; /* name hash */ -+ int namelen; /* name len since name is not 0 terminated */ -+ -+ /* -+ * we can check for duplicate whiteouts and files in the same branch -+ * in order to return -EIO. -+ */ -+ int bindex; -+ -+ /* is this a whiteout entry? */ -+ int whiteout; -+ -+ /* Inline name, so we don't need to separately kmalloc small ones */ -+ char iname[DNAME_INLINE_LEN]; -+}; -+ -+/* Directory hash table. */ -+struct unionfs_dir_state { -+ unsigned int cookie; /* the cookie, based off of rdversion */ -+ unsigned int offset; /* The entry we have returned. */ -+ int bindex; -+ loff_t dirpos; /* offset within the lower level directory */ -+ int size; /* How big is the hash table? */ -+ int hashentries; /* How many entries have been inserted? */ -+ unsigned long access; -+ -+ /* This cache list is used when the inode keeps us around. */ -+ struct list_head cache; -+ struct list_head list[0]; -+}; -+ -+/* externs needed for fanout.h or sioq.h */ -+extern int unionfs_get_nlinks(const struct inode *inode); -+extern void unionfs_copy_attr_times(struct inode *upper); -+extern void unionfs_copy_attr_all(struct inode *dest, const struct inode *src); -+ -+/* include miscellaneous macros */ -+#include "fanout.h" -+#include "sioq.h" -+ -+/* externs for cache creation/deletion routines */ -+extern void unionfs_destroy_filldir_cache(void); -+extern int unionfs_init_filldir_cache(void); -+extern int unionfs_init_inode_cache(void); -+extern void unionfs_destroy_inode_cache(void); -+extern int unionfs_init_dentry_cache(void); -+extern void unionfs_destroy_dentry_cache(void); -+ -+/* Initialize and free readdir-specific state. */ -+extern int init_rdstate(struct file *file); -+extern struct unionfs_dir_state *alloc_rdstate(struct inode *inode, -+ int bindex); -+extern struct unionfs_dir_state *find_rdstate(struct inode *inode, -+ loff_t fpos); -+extern void free_rdstate(struct unionfs_dir_state *state); -+extern int add_filldir_node(struct unionfs_dir_state *rdstate, -+ const char *name, int namelen, int bindex, -+ int whiteout); -+extern struct filldir_node *find_filldir_node(struct unionfs_dir_state *rdstate, -+ const char *name, int namelen, -+ int is_whiteout); -+ -+extern struct dentry **alloc_new_dentries(int objs); -+extern struct unionfs_data *alloc_new_data(int objs); -+ -+/* We can only use 32-bits of offset for rdstate --- blech! */ -+#define DIREOF (0xfffff) -+#define RDOFFBITS 20 /* This is the number of bits in DIREOF. */ -+#define MAXRDCOOKIE (0xfff) -+/* Turn an rdstate into an offset. */ -+static inline off_t rdstate2offset(struct unionfs_dir_state *buf) -+{ -+ off_t tmp; -+ -+ tmp = ((buf->cookie & MAXRDCOOKIE) << RDOFFBITS) -+ | (buf->offset & DIREOF); -+ return tmp; -+} -+ -+/* Macros for locking a super_block. */ -+enum unionfs_super_lock_class { -+ UNIONFS_SMUTEX_NORMAL, -+ UNIONFS_SMUTEX_PARENT, /* when locking on behalf of file */ -+ UNIONFS_SMUTEX_CHILD, /* when locking on behalf of dentry */ -+}; -+static inline void unionfs_read_lock(struct super_block *sb, int subclass) -+{ -+ if (UNIONFS_SB(sb)->write_lock_owner && -+ UNIONFS_SB(sb)->write_lock_owner == current->pid) -+ return; -+ down_read_nested(&UNIONFS_SB(sb)->rwsem, subclass); -+} -+static inline void unionfs_read_unlock(struct super_block *sb) -+{ -+ if (UNIONFS_SB(sb)->write_lock_owner && -+ UNIONFS_SB(sb)->write_lock_owner == current->pid) -+ return; -+ up_read(&UNIONFS_SB(sb)->rwsem); -+} -+static inline void unionfs_write_lock(struct super_block *sb) -+{ -+ down_write(&UNIONFS_SB(sb)->rwsem); -+ UNIONFS_SB(sb)->write_lock_owner = current->pid; -+} -+static inline void unionfs_write_unlock(struct super_block *sb) -+{ -+ up_write(&UNIONFS_SB(sb)->rwsem); -+ UNIONFS_SB(sb)->write_lock_owner = 0; -+} -+ -+static inline void unionfs_double_lock_dentry(struct dentry *d1, -+ struct dentry *d2) -+{ -+ BUG_ON(d1 == d2); -+ if (d1 < d2) { -+ unionfs_lock_dentry(d1, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(d2, UNIONFS_DMUTEX_CHILD); -+ } else { -+ unionfs_lock_dentry(d2, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(d1, UNIONFS_DMUTEX_CHILD); -+ } -+} -+ -+static inline void unionfs_double_unlock_dentry(struct dentry *d1, -+ struct dentry *d2) -+{ -+ BUG_ON(d1 == d2); -+ if (d1 < d2) { /* unlock in reverse order than double_lock_dentry */ -+ unionfs_unlock_dentry(d1); -+ unionfs_unlock_dentry(d2); -+ } else { -+ unionfs_unlock_dentry(d2); -+ unionfs_unlock_dentry(d1); -+ } -+} -+ -+static inline void unionfs_double_lock_parents(struct dentry *p1, -+ struct dentry *p2) -+{ -+ if (p1 == p2) { -+ unionfs_lock_dentry(p1, UNIONFS_DMUTEX_REVAL_PARENT); -+ return; -+ } -+ if (p1 < p2) { -+ unionfs_lock_dentry(p1, UNIONFS_DMUTEX_REVAL_PARENT); -+ unionfs_lock_dentry(p2, UNIONFS_DMUTEX_REVAL_CHILD); -+ } else { -+ unionfs_lock_dentry(p2, UNIONFS_DMUTEX_REVAL_PARENT); -+ unionfs_lock_dentry(p1, UNIONFS_DMUTEX_REVAL_CHILD); -+ } -+} -+ -+static inline void unionfs_double_unlock_parents(struct dentry *p1, -+ struct dentry *p2) -+{ -+ if (p1 == p2) { -+ unionfs_unlock_dentry(p1); -+ return; -+ } -+ if (p1 < p2) { /* unlock in reverse order of double_lock_parents */ -+ unionfs_unlock_dentry(p1); -+ unionfs_unlock_dentry(p2); -+ } else { -+ unionfs_unlock_dentry(p2); -+ unionfs_unlock_dentry(p1); -+ } -+} -+ -+extern int new_dentry_private_data(struct dentry *dentry, int subclass); -+extern int realloc_dentry_private_data(struct dentry *dentry); -+extern void free_dentry_private_data(struct dentry *dentry); -+extern void update_bstart(struct dentry *dentry); -+extern int init_lower_nd(struct nameidata *nd, unsigned int flags); -+extern void release_lower_nd(struct nameidata *nd, int err); -+ -+/* -+ * EXTERNALS: -+ */ -+ -+/* replicates the directory structure up to given dentry in given branch */ -+extern struct dentry *create_parents(struct inode *dir, struct dentry *dentry, -+ const char *name, int bindex); -+ -+/* partial lookup */ -+extern int unionfs_partial_lookup(struct dentry *dentry, -+ struct dentry *parent); -+extern struct dentry *unionfs_lookup_full(struct dentry *dentry, -+ struct dentry *parent, -+ int lookupmode); -+ -+/* copies a file from dbstart to newbindex branch */ -+extern int copyup_file(struct inode *dir, struct file *file, int bstart, -+ int newbindex, loff_t size); -+extern int copyup_named_file(struct inode *dir, struct file *file, -+ char *name, int bstart, int new_bindex, -+ loff_t len); -+/* copies a dentry from dbstart to newbindex branch */ -+extern int copyup_dentry(struct inode *dir, struct dentry *dentry, -+ int bstart, int new_bindex, const char *name, -+ int namelen, struct file **copyup_file, loff_t len); -+/* helper functions for post-copyup actions */ -+extern void unionfs_postcopyup_setmnt(struct dentry *dentry); -+extern void unionfs_postcopyup_release(struct dentry *dentry); -+ -+/* Is this directory empty: 0 if it is empty, -ENOTEMPTY if not. */ -+extern int check_empty(struct dentry *dentry, struct dentry *parent, -+ struct unionfs_dir_state **namelist); -+/* whiteout and opaque directory helpers */ -+extern char *alloc_whname(const char *name, int len); -+extern bool is_whiteout_name(char **namep, int *namelenp); -+extern bool is_validname(const char *name); -+extern struct dentry *lookup_whiteout(const char *name, -+ struct dentry *lower_parent); -+extern struct dentry *find_first_whiteout(struct dentry *dentry); -+extern int unlink_whiteout(struct dentry *wh_dentry); -+extern int check_unlink_whiteout(struct dentry *dentry, -+ struct dentry *lower_dentry, int bindex); -+extern int create_whiteout(struct dentry *dentry, int start); -+extern int delete_whiteouts(struct dentry *dentry, int bindex, -+ struct unionfs_dir_state *namelist); -+extern int is_opaque_dir(struct dentry *dentry, int bindex); -+extern int make_dir_opaque(struct dentry *dir, int bindex); -+extern void unionfs_set_max_namelen(long *namelen); -+ -+extern void unionfs_reinterpose(struct dentry *this_dentry); -+extern struct super_block *unionfs_duplicate_super(struct super_block *sb); -+ -+/* Locking functions. */ -+extern int unionfs_setlk(struct file *file, int cmd, struct file_lock *fl); -+extern int unionfs_getlk(struct file *file, struct file_lock *fl); -+ -+/* Common file operations. */ -+extern int unionfs_file_revalidate(struct file *file, struct dentry *parent, -+ bool willwrite); -+extern int unionfs_open(struct inode *inode, struct file *file); -+extern int unionfs_file_release(struct inode *inode, struct file *file); -+extern int unionfs_flush(struct file *file, fl_owner_t id); -+extern long unionfs_ioctl(struct file *file, unsigned int cmd, -+ unsigned long arg); -+extern int unionfs_fsync(struct file *file, int datasync); -+extern int unionfs_fasync(int fd, struct file *file, int flag); -+ -+/* Inode operations */ -+extern struct inode *unionfs_iget(struct super_block *sb, unsigned long ino); -+extern int unionfs_rename(struct inode *old_dir, struct dentry *old_dentry, -+ struct inode *new_dir, struct dentry *new_dentry); -+extern int unionfs_unlink(struct inode *dir, struct dentry *dentry); -+extern int unionfs_rmdir(struct inode *dir, struct dentry *dentry); -+ -+extern bool __unionfs_d_revalidate(struct dentry *dentry, -+ struct dentry *parent, bool willwrite); -+extern bool is_negative_lower(const struct dentry *dentry); -+extern bool is_newer_lower(const struct dentry *dentry); -+extern void purge_sb_data(struct super_block *sb); -+ -+/* The values for unionfs_interpose's flag. */ -+#define INTERPOSE_DEFAULT 0 -+#define INTERPOSE_LOOKUP 1 -+#define INTERPOSE_REVAL 2 -+#define INTERPOSE_REVAL_NEG 3 -+#define INTERPOSE_PARTIAL 4 -+ -+extern struct dentry *unionfs_interpose(struct dentry *this_dentry, -+ struct super_block *sb, int flag); -+ -+#ifdef CONFIG_UNION_FS_XATTR -+/* Extended attribute functions. */ -+extern void *unionfs_xattr_alloc(size_t size, size_t limit); -+static inline void unionfs_xattr_kfree(const void *p) -+{ -+ kfree(p); -+} -+extern ssize_t unionfs_getxattr(struct dentry *dentry, const char *name, -+ void *value, size_t size); -+extern int unionfs_removexattr(struct dentry *dentry, const char *name); -+extern ssize_t unionfs_listxattr(struct dentry *dentry, char *list, -+ size_t size); -+extern int unionfs_setxattr(struct dentry *dentry, const char *name, -+ const void *value, size_t size, int flags); -+#endif /* CONFIG_UNION_FS_XATTR */ -+ -+/* The root directory is unhashed, but isn't deleted. */ -+static inline int d_deleted(struct dentry *d) -+{ -+ return d_unhashed(d) && (d != d->d_sb->s_root); -+} -+ -+/* unionfs_permission, check if we should bypass error to facilitate copyup */ -+#define IS_COPYUP_ERR(err) ((err) == -EROFS) -+ -+/* unionfs_open, check if we need to copyup the file */ -+#define OPEN_WRITE_FLAGS (O_WRONLY | O_RDWR | O_APPEND) -+#define IS_WRITE_FLAG(flag) ((flag) & OPEN_WRITE_FLAGS) -+ -+static inline int branchperms(const struct super_block *sb, int index) -+{ -+ BUG_ON(index < 0); -+ return UNIONFS_SB(sb)->data[index].branchperms; -+} -+ -+static inline int set_branchperms(struct super_block *sb, int index, int perms) -+{ -+ BUG_ON(index < 0); -+ UNIONFS_SB(sb)->data[index].branchperms = perms; -+ return perms; -+} -+ -+/* check if readonly lower inode, but possibly unlinked (no inode->i_sb) */ -+static inline int __is_rdonly(const struct inode *inode) -+{ -+ /* if unlinked, can't be readonly (?) */ -+ if (!inode->i_sb) -+ return 0; -+ return IS_RDONLY(inode); -+ -+} -+/* Is this file on a read-only branch? */ -+static inline int is_robranch_super(const struct super_block *sb, int index) -+{ -+ int ret; -+ -+ ret = (!(branchperms(sb, index) & MAY_WRITE)) ? -EROFS : 0; -+ return ret; -+} -+ -+/* Is this file on a read-only branch? */ -+static inline int is_robranch_idx(const struct dentry *dentry, int index) -+{ -+ struct super_block *lower_sb; -+ -+ BUG_ON(index < 0); -+ -+ if (!(branchperms(dentry->d_sb, index) & MAY_WRITE)) -+ return -EROFS; -+ -+ lower_sb = unionfs_lower_super_idx(dentry->d_sb, index); -+ BUG_ON(lower_sb == NULL); -+ /* -+ * test sb flags directly, not IS_RDONLY(lower_inode) because the -+ * lower_dentry could be a negative. -+ */ -+ if (lower_sb->s_flags & MS_RDONLY) -+ return -EROFS; -+ -+ return 0; -+} -+ -+static inline int is_robranch(const struct dentry *dentry) -+{ -+ int index; -+ -+ index = UNIONFS_D(dentry)->bstart; -+ BUG_ON(index < 0); -+ -+ return is_robranch_idx(dentry, index); -+} -+ -+/* -+ * EXTERNALS: -+ */ -+extern int check_branch(const struct path *path); -+extern int parse_branch_mode(const char *name, int *perms); -+ -+/* locking helpers */ -+static inline struct dentry *lock_parent(struct dentry *dentry) -+{ -+ struct dentry *dir = dget_parent(dentry); -+ mutex_lock_nested(&dir->d_inode->i_mutex, I_MUTEX_PARENT); -+ return dir; -+} -+static inline struct dentry *lock_parent_wh(struct dentry *dentry) -+{ -+ struct dentry *dir = dget_parent(dentry); -+ -+ mutex_lock_nested(&dir->d_inode->i_mutex, UNIONFS_DMUTEX_WHITEOUT); -+ return dir; -+} -+ -+static inline void unlock_dir(struct dentry *dir) -+{ -+ mutex_unlock(&dir->d_inode->i_mutex); -+ dput(dir); -+} -+ -+/* lock base inode mutex before calling lookup_one_len */ -+static inline struct dentry *lookup_lck_len(const char *name, -+ struct dentry *base, int len) -+{ -+ struct dentry *d; -+ struct nameidata lower_nd; -+ int err; -+ -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); -+ if (unlikely(err < 0)) { -+ d = ERR_PTR(err); -+ goto out; -+ } -+ mutex_lock(&base->d_inode->i_mutex); -+ d = lookup_one_len_nd(name, base, len, &lower_nd); -+ release_lower_nd(&lower_nd, err); -+ mutex_unlock(&base->d_inode->i_mutex); -+out: -+ return d; -+} -+ -+static inline struct vfsmount *unionfs_mntget(struct dentry *dentry, -+ int bindex) -+{ -+ struct vfsmount *mnt; -+ -+ BUG_ON(!dentry || bindex < 0); -+ -+ mnt = mntget(unionfs_lower_mnt_idx(dentry, bindex)); -+#ifdef CONFIG_UNION_FS_DEBUG -+ if (!mnt) -+ pr_debug("unionfs: mntget: mnt=%p bindex=%d\n", -+ mnt, bindex); -+#endif /* CONFIG_UNION_FS_DEBUG */ -+ -+ return mnt; -+} -+ -+static inline void unionfs_mntput(struct dentry *dentry, int bindex) -+{ -+ struct vfsmount *mnt; -+ -+ if (!dentry && bindex < 0) -+ return; -+ BUG_ON(!dentry || bindex < 0); -+ -+ mnt = unionfs_lower_mnt_idx(dentry, bindex); -+#ifdef CONFIG_UNION_FS_DEBUG -+ /* -+ * Directories can have NULL lower objects in between start/end, but -+ * NOT if at the start/end range. We cannot verify that this dentry -+ * is a type=DIR, because it may already be a negative dentry. But -+ * if dbstart is greater than dbend, we know that this couldn't have -+ * been a regular file: it had to have been a directory. -+ */ -+ if (!mnt && !(bindex > dbstart(dentry) && bindex < dbend(dentry))) -+ pr_debug("unionfs: mntput: mnt=%p bindex=%d\n", mnt, bindex); -+#endif /* CONFIG_UNION_FS_DEBUG */ -+ mntput(mnt); -+} -+ -+#ifdef CONFIG_UNION_FS_DEBUG -+ -+/* useful for tracking code reachability */ -+#define UDBG pr_debug("DBG:%s:%s:%d\n", __FILE__, __func__, __LINE__) -+ -+#define unionfs_check_inode(i) __unionfs_check_inode((i), \ -+ __FILE__, __func__, __LINE__) -+#define unionfs_check_dentry(d) __unionfs_check_dentry((d), \ -+ __FILE__, __func__, __LINE__) -+#define unionfs_check_file(f) __unionfs_check_file((f), \ -+ __FILE__, __func__, __LINE__) -+#define unionfs_check_nd(n) __unionfs_check_nd((n), \ -+ __FILE__, __func__, __LINE__) -+#define show_branch_counts(sb) __show_branch_counts((sb), \ -+ __FILE__, __func__, __LINE__) -+#define show_inode_times(i) __show_inode_times((i), \ -+ __FILE__, __func__, __LINE__) -+#define show_dinode_times(d) __show_dinode_times((d), \ -+ __FILE__, __func__, __LINE__) -+#define show_inode_counts(i) __show_inode_counts((i), \ -+ __FILE__, __func__, __LINE__) -+ -+extern void __unionfs_check_inode(const struct inode *inode, const char *fname, -+ const char *fxn, int line); -+extern void __unionfs_check_dentry(const struct dentry *dentry, -+ const char *fname, const char *fxn, -+ int line); -+extern void __unionfs_check_file(const struct file *file, -+ const char *fname, const char *fxn, int line); -+extern void __unionfs_check_nd(const struct nameidata *nd, -+ const char *fname, const char *fxn, int line); -+extern void __show_branch_counts(const struct super_block *sb, -+ const char *file, const char *fxn, int line); -+extern void __show_inode_times(const struct inode *inode, -+ const char *file, const char *fxn, int line); -+extern void __show_dinode_times(const struct dentry *dentry, -+ const char *file, const char *fxn, int line); -+extern void __show_inode_counts(const struct inode *inode, -+ const char *file, const char *fxn, int line); -+ -+#else /* not CONFIG_UNION_FS_DEBUG */ -+ -+/* we leave useful hooks for these check functions throughout the code */ -+#define unionfs_check_inode(i) do { } while (0) -+#define unionfs_check_dentry(d) do { } while (0) -+#define unionfs_check_file(f) do { } while (0) -+#define unionfs_check_nd(n) do { } while (0) -+#define show_branch_counts(sb) do { } while (0) -+#define show_inode_times(i) do { } while (0) -+#define show_dinode_times(d) do { } while (0) -+#define show_inode_counts(i) do { } while (0) -+ -+#endif /* not CONFIG_UNION_FS_DEBUG */ -+ -+#endif /* not _UNION_H_ */ -diff --git a/fs/unionfs/unlink.c b/fs/unionfs/unlink.c -new file mode 100644 -index 0000000..bf447bb ---- /dev/null -+++ b/fs/unionfs/unlink.c -@@ -0,0 +1,278 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * Helper function for Unionfs's unlink operation. -+ * -+ * The main goal of this function is to optimize the unlinking of non-dir -+ * objects in unionfs by deleting all possible lower inode objects from the -+ * underlying branches having same dentry name as the non-dir dentry on -+ * which this unlink operation is called. This way we delete as many lower -+ * inodes as possible, and save space. Whiteouts need to be created in -+ * branch0 only if unlinking fails on any of the lower branch other than -+ * branch0, or if a lower branch is marked read-only. -+ * -+ * Also, while unlinking a file, if we encounter any dir type entry in any -+ * intermediate branch, then we remove the directory by calling vfs_rmdir. -+ * The following special cases are also handled: -+ -+ * (1) If an error occurs in branch0 during vfs_unlink, then we return -+ * appropriate error. -+ * -+ * (2) If we get an error during unlink in any of other lower branch other -+ * than branch0, then we create a whiteout in branch0. -+ * -+ * (3) If a whiteout already exists in any intermediate branch, we delete -+ * all possible inodes only up to that branch (this is an "opaqueness" -+ * as as per Documentation/filesystems/unionfs/concepts.txt). -+ * -+ */ -+static int unionfs_unlink_whiteout(struct inode *dir, struct dentry *dentry, -+ struct dentry *parent) -+{ -+ struct dentry *lower_dentry; -+ struct dentry *lower_dir_dentry; -+ int bindex; -+ int err = 0; -+ -+ err = unionfs_partial_lookup(dentry, parent); -+ if (err) -+ goto out; -+ -+ /* trying to unlink all possible valid instances */ -+ for (bindex = dbstart(dentry); bindex <= dbend(dentry); bindex++) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ if (!lower_dentry || !lower_dentry->d_inode) -+ continue; -+ -+ lower_dir_dentry = lock_parent(lower_dentry); -+ -+ /* avoid destroying the lower inode if the object is in use */ -+ dget(lower_dentry); -+ err = is_robranch_super(dentry->d_sb, bindex); -+ if (!err) { -+ /* see Documentation/filesystems/unionfs/issues.txt */ -+ lockdep_off(); -+ if (!S_ISDIR(lower_dentry->d_inode->i_mode)) -+ err = vfs_unlink(lower_dir_dentry->d_inode, -+ lower_dentry); -+ else -+ err = vfs_rmdir(lower_dir_dentry->d_inode, -+ lower_dentry); -+ lockdep_on(); -+ } -+ -+ /* if lower object deletion succeeds, update inode's times */ -+ if (!err) -+ unionfs_copy_attr_times(dentry->d_inode); -+ dput(lower_dentry); -+ fsstack_copy_attr_times(dir, lower_dir_dentry->d_inode); -+ unlock_dir(lower_dir_dentry); -+ -+ if (err) -+ break; -+ } -+ -+ /* -+ * Create the whiteout in branch 0 (highest priority) only if (a) -+ * there was an error in any intermediate branch other than branch 0 -+ * due to failure of vfs_unlink/vfs_rmdir or (b) a branch marked or -+ * mounted read-only. -+ */ -+ if (err) { -+ if ((bindex == 0) || -+ ((bindex == dbstart(dentry)) && -+ (!IS_COPYUP_ERR(err)))) -+ goto out; -+ else { -+ if (!IS_COPYUP_ERR(err)) -+ pr_debug("unionfs: lower object deletion " -+ "failed in branch:%d\n", bindex); -+ err = create_whiteout(dentry, sbstart(dentry->d_sb)); -+ } -+ } -+ -+out: -+ if (!err) -+ inode_dec_link_count(dentry->d_inode); -+ -+ /* We don't want to leave negative leftover dentries for revalidate. */ -+ if (!err && (dbopaque(dentry) != -1)) -+ update_bstart(dentry); -+ -+ return err; -+} -+ -+int unionfs_unlink(struct inode *dir, struct dentry *dentry) -+{ -+ int err = 0; -+ struct inode *inode = dentry->d_inode; -+ struct dentry *parent; -+ int valid; -+ -+ BUG_ON(S_ISDIR(inode->i_mode)); -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ unionfs_check_dentry(dentry); -+ -+ err = unionfs_unlink_whiteout(dir, dentry, parent); -+ /* call d_drop so the system "forgets" about us */ -+ if (!err) { -+ unionfs_postcopyup_release(dentry); -+ unionfs_postcopyup_setmnt(parent); -+ if (inode->i_nlink == 0) /* drop lower inodes */ -+ iput_lowers_all(inode, false); -+ d_drop(dentry); -+ /* -+ * if unlink/whiteout succeeded, parent dir mtime has -+ * changed -+ */ -+ unionfs_copy_attr_times(dir); -+ } -+ -+out: -+ if (!err) { -+ unionfs_check_dentry(dentry); -+ unionfs_check_inode(dir); -+ } -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+static int unionfs_rmdir_first(struct inode *dir, struct dentry *dentry, -+ struct unionfs_dir_state *namelist) -+{ -+ int err; -+ struct dentry *lower_dentry; -+ struct dentry *lower_dir_dentry = NULL; -+ -+ /* Here we need to remove whiteout entries. */ -+ err = delete_whiteouts(dentry, dbstart(dentry), namelist); -+ if (err) -+ goto out; -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ -+ lower_dir_dentry = lock_parent(lower_dentry); -+ -+ /* avoid destroying the lower inode if the file is in use */ -+ dget(lower_dentry); -+ err = is_robranch(dentry); -+ if (!err) -+ err = vfs_rmdir(lower_dir_dentry->d_inode, lower_dentry); -+ dput(lower_dentry); -+ -+ fsstack_copy_attr_times(dir, lower_dir_dentry->d_inode); -+ /* propagate number of hard-links */ -+ dentry->d_inode->i_nlink = unionfs_get_nlinks(dentry->d_inode); -+ -+out: -+ if (lower_dir_dentry) -+ unlock_dir(lower_dir_dentry); -+ return err; -+} -+ -+int unionfs_rmdir(struct inode *dir, struct dentry *dentry) -+{ -+ int err = 0; -+ struct unionfs_dir_state *namelist = NULL; -+ struct dentry *parent; -+ int dstart, dend; -+ bool valid; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ unionfs_check_dentry(dentry); -+ -+ /* check if this unionfs directory is empty or not */ -+ err = check_empty(dentry, parent, &namelist); -+ if (err) -+ goto out; -+ -+ err = unionfs_rmdir_first(dir, dentry, namelist); -+ dstart = dbstart(dentry); -+ dend = dbend(dentry); -+ /* -+ * We create a whiteout for the directory if there was an error to -+ * rmdir the first directory entry in the union. Otherwise, we -+ * create a whiteout only if there is no chance that a lower -+ * priority branch might also have the same named directory. IOW, -+ * if there is not another same-named directory at a lower priority -+ * branch, then we don't need to create a whiteout for it. -+ */ -+ if (!err) { -+ if (dstart < dend) -+ err = create_whiteout(dentry, dstart); -+ } else { -+ int new_err; -+ -+ if (dstart == 0) -+ goto out; -+ -+ /* exit if the error returned was NOT -EROFS */ -+ if (!IS_COPYUP_ERR(err)) -+ goto out; -+ -+ new_err = create_whiteout(dentry, dstart - 1); -+ if (new_err != -EEXIST) -+ err = new_err; -+ } -+ -+out: -+ /* -+ * Drop references to lower dentry/inode so storage space for them -+ * can be reclaimed. Then, call d_drop so the system "forgets" -+ * about us. -+ */ -+ if (!err) { -+ iput_lowers_all(dentry->d_inode, false); -+ dput(unionfs_lower_dentry_idx(dentry, dstart)); -+ unionfs_set_lower_dentry_idx(dentry, dstart, NULL); -+ d_drop(dentry); -+ /* update our lower vfsmnts, in case a copyup took place */ -+ unionfs_postcopyup_setmnt(dentry); -+ unionfs_check_dentry(dentry); -+ unionfs_check_inode(dir); -+ } -+ -+ if (namelist) -+ free_rdstate(namelist); -+ -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -diff --git a/fs/unionfs/whiteout.c b/fs/unionfs/whiteout.c -new file mode 100644 -index 0000000..582cef2 ---- /dev/null -+++ b/fs/unionfs/whiteout.c -@@ -0,0 +1,601 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* -+ * whiteout and opaque directory helpers -+ */ -+ -+/* What do we use for whiteouts. */ -+#define UNIONFS_WHPFX ".wh." -+#define UNIONFS_WHLEN 4 -+/* -+ * If a directory contains this file, then it is opaque. We start with the -+ * .wh. flag so that it is blocked by lookup. -+ */ -+#define UNIONFS_DIR_OPAQUE_NAME "__dir_opaque" -+#define UNIONFS_DIR_OPAQUE UNIONFS_WHPFX UNIONFS_DIR_OPAQUE_NAME -+ -+/* construct whiteout filename */ -+char *alloc_whname(const char *name, int len) -+{ -+ char *buf; -+ -+ buf = kmalloc(len + UNIONFS_WHLEN + 1, GFP_KERNEL); -+ if (unlikely(!buf)) -+ return ERR_PTR(-ENOMEM); -+ -+ strcpy(buf, UNIONFS_WHPFX); -+ strlcat(buf, name, len + UNIONFS_WHLEN + 1); -+ -+ return buf; -+} -+ -+/* -+ * XXX: this can be inline or CPP macro, but is here to keep all whiteout -+ * code in one place. -+ */ -+void unionfs_set_max_namelen(long *namelen) -+{ -+ *namelen -= UNIONFS_WHLEN; -+} -+ -+/* check if @namep is a whiteout, update @namep and @namelenp accordingly */ -+bool is_whiteout_name(char **namep, int *namelenp) -+{ -+ if (*namelenp > UNIONFS_WHLEN && -+ !strncmp(*namep, UNIONFS_WHPFX, UNIONFS_WHLEN)) { -+ *namep += UNIONFS_WHLEN; -+ *namelenp -= UNIONFS_WHLEN; -+ return true; -+ } -+ return false; -+} -+ -+/* is the filename valid == !(whiteout for a file or opaque dir marker) */ -+bool is_validname(const char *name) -+{ -+ if (!strncmp(name, UNIONFS_WHPFX, UNIONFS_WHLEN)) -+ return false; -+ if (!strncmp(name, UNIONFS_DIR_OPAQUE_NAME, -+ sizeof(UNIONFS_DIR_OPAQUE_NAME) - 1)) -+ return false; -+ return true; -+} -+ -+/* -+ * Look for a whiteout @name in @lower_parent directory. If error, return -+ * ERR_PTR. Caller must dput() the returned dentry if not an error. -+ * -+ * XXX: some callers can reuse the whname allocated buffer to avoid repeated -+ * free then re-malloc calls. Need to provide a different API for those -+ * callers. -+ */ -+struct dentry *lookup_whiteout(const char *name, struct dentry *lower_parent) -+{ -+ char *whname = NULL; -+ int err = 0, namelen; -+ struct dentry *wh_dentry = NULL; -+ -+ namelen = strlen(name); -+ whname = alloc_whname(name, namelen); -+ if (unlikely(IS_ERR(whname))) { -+ err = PTR_ERR(whname); -+ goto out; -+ } -+ -+ /* check if whiteout exists in this branch: lookup .wh.foo */ -+ wh_dentry = lookup_lck_len(whname, lower_parent, strlen(whname)); -+ if (IS_ERR(wh_dentry)) { -+ err = PTR_ERR(wh_dentry); -+ goto out; -+ } -+ -+ /* check if negative dentry (ENOENT) */ -+ if (!wh_dentry->d_inode) -+ goto out; -+ -+ /* whiteout found: check if valid type */ -+ if (!S_ISREG(wh_dentry->d_inode->i_mode)) { -+ printk(KERN_ERR "unionfs: invalid whiteout %s entry type %d\n", -+ whname, wh_dentry->d_inode->i_mode); -+ dput(wh_dentry); -+ err = -EIO; -+ goto out; -+ } -+ -+out: -+ kfree(whname); -+ if (err) -+ wh_dentry = ERR_PTR(err); -+ return wh_dentry; -+} -+ -+/* find and return first whiteout in parent directory, else ENOENT */ -+struct dentry *find_first_whiteout(struct dentry *dentry) -+{ -+ int bindex, bstart, bend; -+ struct dentry *parent, *lower_parent, *wh_dentry; -+ -+ parent = dget_parent(dentry); -+ -+ bstart = dbstart(parent); -+ bend = dbend(parent); -+ wh_dentry = ERR_PTR(-ENOENT); -+ -+ for (bindex = bstart; bindex <= bend; bindex++) { -+ lower_parent = unionfs_lower_dentry_idx(parent, bindex); -+ if (!lower_parent) -+ continue; -+ wh_dentry = lookup_whiteout(dentry->d_name.name, lower_parent); -+ if (IS_ERR(wh_dentry)) -+ continue; -+ if (wh_dentry->d_inode) -+ break; -+ dput(wh_dentry); -+ wh_dentry = ERR_PTR(-ENOENT); -+ } -+ -+ dput(parent); -+ -+ return wh_dentry; -+} -+ -+/* -+ * Unlink a whiteout dentry. Returns 0 or -errno. Caller must hold and -+ * release dentry reference. -+ */ -+int unlink_whiteout(struct dentry *wh_dentry) -+{ -+ int err; -+ struct dentry *lower_dir_dentry; -+ -+ /* dget and lock parent dentry */ -+ lower_dir_dentry = lock_parent_wh(wh_dentry); -+ -+ /* see Documentation/filesystems/unionfs/issues.txt */ -+ lockdep_off(); -+ err = vfs_unlink(lower_dir_dentry->d_inode, wh_dentry); -+ lockdep_on(); -+ unlock_dir(lower_dir_dentry); -+ -+ /* -+ * Whiteouts are special files and should be deleted no matter what -+ * (as if they never existed), in order to allow this create -+ * operation to succeed. This is especially important in sticky -+ * directories: a whiteout may have been created by one user, but -+ * the newly created file may be created by another user. -+ * Therefore, in order to maintain Unix semantics, if the vfs_unlink -+ * above failed, then we have to try to directly unlink the -+ * whiteout. Note: in the ODF version of unionfs, whiteout are -+ * handled much more cleanly. -+ */ -+ if (err == -EPERM) { -+ struct inode *inode = lower_dir_dentry->d_inode; -+ err = inode->i_op->unlink(inode, wh_dentry); -+ } -+ if (err) -+ printk(KERN_ERR "unionfs: could not unlink whiteout %s, " -+ "err = %d\n", wh_dentry->d_name.name, err); -+ -+ return err; -+ -+} -+ -+/* -+ * Helper function when creating new objects (create, symlink, mknod, etc.). -+ * Checks to see if there's a whiteout in @lower_dentry's parent directory, -+ * whose name is taken from @dentry. Then tries to remove that whiteout, if -+ * found. If <dentry,bindex> is a branch marked readonly, return -EROFS. -+ * If it finds both a regular file and a whiteout, delete whiteout (this -+ * should never happen). -+ * -+ * Return 0 if no whiteout was found. Return 1 if one was found and -+ * successfully removed. Therefore a value >= 0 tells the caller that -+ * @lower_dentry belongs to a good branch to create the new object in). -+ * Return -ERRNO if an error occurred during whiteout lookup or in trying to -+ * unlink the whiteout. -+ */ -+int check_unlink_whiteout(struct dentry *dentry, struct dentry *lower_dentry, -+ int bindex) -+{ -+ int err; -+ struct dentry *wh_dentry = NULL; -+ struct dentry *lower_dir_dentry = NULL; -+ -+ /* look for whiteout dentry first */ -+ lower_dir_dentry = dget_parent(lower_dentry); -+ wh_dentry = lookup_whiteout(dentry->d_name.name, lower_dir_dentry); -+ dput(lower_dir_dentry); -+ if (IS_ERR(wh_dentry)) { -+ err = PTR_ERR(wh_dentry); -+ goto out; -+ } -+ -+ if (!wh_dentry->d_inode) { /* no whiteout exists*/ -+ err = 0; -+ goto out_dput; -+ } -+ -+ /* check if regular file and whiteout were both found */ -+ if (unlikely(lower_dentry->d_inode)) -+ printk(KERN_WARNING "unionfs: removing whiteout; regular " -+ "file exists in directory %s (branch %d)\n", -+ lower_dir_dentry->d_name.name, bindex); -+ -+ /* check if branch is writeable */ -+ err = is_robranch_super(dentry->d_sb, bindex); -+ if (err) -+ goto out_dput; -+ -+ /* .wh.foo has been found, so let's unlink it */ -+ err = unlink_whiteout(wh_dentry); -+ if (!err) -+ err = 1; /* a whiteout was found and successfully removed */ -+out_dput: -+ dput(wh_dentry); -+out: -+ return err; -+} -+ -+/* -+ * Pass an unionfs dentry and an index. It will try to create a whiteout -+ * for the filename in dentry, and will try in branch 'index'. On error, -+ * it will proceed to a branch to the left. -+ */ -+int create_whiteout(struct dentry *dentry, int start) -+{ -+ int bstart, bend, bindex; -+ struct dentry *lower_dir_dentry; -+ struct dentry *lower_dentry; -+ struct dentry *lower_wh_dentry; -+ struct nameidata nd; -+ char *name = NULL; -+ int err = -EINVAL; -+ -+ verify_locked(dentry); -+ -+ bstart = dbstart(dentry); -+ bend = dbend(dentry); -+ -+ /* create dentry's whiteout equivalent */ -+ name = alloc_whname(dentry->d_name.name, dentry->d_name.len); -+ if (unlikely(IS_ERR(name))) { -+ err = PTR_ERR(name); -+ goto out; -+ } -+ -+ for (bindex = start; bindex >= 0; bindex--) { -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ -+ if (!lower_dentry) { -+ /* -+ * if lower dentry is not present, create the -+ * entire lower dentry directory structure and go -+ * ahead. Since we want to just create whiteout, we -+ * only want the parent dentry, and hence get rid of -+ * this dentry. -+ */ -+ lower_dentry = create_parents(dentry->d_inode, -+ dentry, -+ dentry->d_name.name, -+ bindex); -+ if (!lower_dentry || IS_ERR(lower_dentry)) { -+ int ret = PTR_ERR(lower_dentry); -+ if (!IS_COPYUP_ERR(ret)) -+ printk(KERN_ERR -+ "unionfs: create_parents for " -+ "whiteout failed: bindex=%d " -+ "err=%d\n", bindex, ret); -+ continue; -+ } -+ } -+ -+ lower_wh_dentry = -+ lookup_lck_len(name, lower_dentry->d_parent, -+ dentry->d_name.len + UNIONFS_WHLEN); -+ if (IS_ERR(lower_wh_dentry)) -+ continue; -+ -+ /* -+ * The whiteout already exists. This used to be impossible, -+ * but now is possible because of opaqueness. -+ */ -+ if (lower_wh_dentry->d_inode) { -+ dput(lower_wh_dentry); -+ err = 0; -+ goto out; -+ } -+ -+ err = init_lower_nd(&nd, LOOKUP_CREATE); -+ if (unlikely(err < 0)) -+ goto out; -+ lower_dir_dentry = lock_parent_wh(lower_wh_dentry); -+ err = is_robranch_super(dentry->d_sb, bindex); -+ if (!err) -+ err = vfs_create(lower_dir_dentry->d_inode, -+ lower_wh_dentry, -+ current_umask() & S_IRUGO, -+ &nd); -+ unlock_dir(lower_dir_dentry); -+ dput(lower_wh_dentry); -+ release_lower_nd(&nd, err); -+ -+ if (!err || !IS_COPYUP_ERR(err)) -+ break; -+ } -+ -+ /* set dbopaque so that lookup will not proceed after this branch */ -+ if (!err) -+ dbopaque(dentry) = bindex; -+ -+out: -+ kfree(name); -+ return err; -+} -+ -+/* -+ * Delete all of the whiteouts in a given directory for rmdir. -+ * -+ * lower directory inode should be locked -+ */ -+static int do_delete_whiteouts(struct dentry *dentry, int bindex, -+ struct unionfs_dir_state *namelist) -+{ -+ int err = 0; -+ struct dentry *lower_dir_dentry = NULL; -+ struct dentry *lower_dentry; -+ char *name = NULL, *p; -+ struct inode *lower_dir; -+ int i; -+ struct list_head *pos; -+ struct filldir_node *cursor; -+ -+ /* Find out lower parent dentry */ -+ lower_dir_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ BUG_ON(!S_ISDIR(lower_dir_dentry->d_inode->i_mode)); -+ lower_dir = lower_dir_dentry->d_inode; -+ BUG_ON(!S_ISDIR(lower_dir->i_mode)); -+ -+ err = -ENOMEM; -+ name = __getname(); -+ if (unlikely(!name)) -+ goto out; -+ strcpy(name, UNIONFS_WHPFX); -+ p = name + UNIONFS_WHLEN; -+ -+ err = 0; -+ for (i = 0; !err && i < namelist->size; i++) { -+ list_for_each(pos, &namelist->list[i]) { -+ cursor = -+ list_entry(pos, struct filldir_node, -+ file_list); -+ /* Only operate on whiteouts in this branch. */ -+ if (cursor->bindex != bindex) -+ continue; -+ if (!cursor->whiteout) -+ continue; -+ -+ strlcpy(p, cursor->name, PATH_MAX - UNIONFS_WHLEN); -+ lower_dentry = -+ lookup_lck_len(name, lower_dir_dentry, -+ cursor->namelen + -+ UNIONFS_WHLEN); -+ if (IS_ERR(lower_dentry)) { -+ err = PTR_ERR(lower_dentry); -+ break; -+ } -+ if (lower_dentry->d_inode) -+ err = vfs_unlink(lower_dir, lower_dentry); -+ dput(lower_dentry); -+ if (err) -+ break; -+ } -+ } -+ -+ __putname(name); -+ -+ /* After all of the removals, we should copy the attributes once. */ -+ fsstack_copy_attr_times(dentry->d_inode, lower_dir_dentry->d_inode); -+ -+out: -+ return err; -+} -+ -+ -+void __delete_whiteouts(struct work_struct *work) -+{ -+ struct sioq_args *args = container_of(work, struct sioq_args, work); -+ struct deletewh_args *d = &args->deletewh; -+ -+ args->err = do_delete_whiteouts(d->dentry, d->bindex, d->namelist); -+ complete(&args->comp); -+} -+ -+/* delete whiteouts in a dir (for rmdir operation) using sioq if necessary */ -+int delete_whiteouts(struct dentry *dentry, int bindex, -+ struct unionfs_dir_state *namelist) -+{ -+ int err; -+ struct super_block *sb; -+ struct dentry *lower_dir_dentry; -+ struct inode *lower_dir; -+ struct sioq_args args; -+ -+ sb = dentry->d_sb; -+ -+ BUG_ON(!S_ISDIR(dentry->d_inode->i_mode)); -+ BUG_ON(bindex < dbstart(dentry)); -+ BUG_ON(bindex > dbend(dentry)); -+ err = is_robranch_super(sb, bindex); -+ if (err) -+ goto out; -+ -+ lower_dir_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ BUG_ON(!S_ISDIR(lower_dir_dentry->d_inode->i_mode)); -+ lower_dir = lower_dir_dentry->d_inode; -+ BUG_ON(!S_ISDIR(lower_dir->i_mode)); -+ -+ if (!inode_permission(lower_dir, MAY_WRITE | MAY_EXEC)) { -+ err = do_delete_whiteouts(dentry, bindex, namelist); -+ } else { -+ args.deletewh.namelist = namelist; -+ args.deletewh.dentry = dentry; -+ args.deletewh.bindex = bindex; -+ run_sioq(__delete_whiteouts, &args); -+ err = args.err; -+ } -+ -+out: -+ return err; -+} -+ -+/**************************************************************************** -+ * Opaque directory helpers * -+ ****************************************************************************/ -+ -+/* -+ * is_opaque_dir: returns 0 if it is NOT an opaque dir, 1 if it is, and -+ * -errno if an error occurred trying to figure this out. -+ */ -+int is_opaque_dir(struct dentry *dentry, int bindex) -+{ -+ int err = 0; -+ struct dentry *lower_dentry; -+ struct dentry *wh_lower_dentry; -+ struct inode *lower_inode; -+ struct sioq_args args; -+ struct nameidata lower_nd; -+ -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ lower_inode = lower_dentry->d_inode; -+ -+ BUG_ON(!S_ISDIR(lower_inode->i_mode)); -+ -+ mutex_lock(&lower_inode->i_mutex); -+ -+ if (!inode_permission(lower_inode, MAY_EXEC)) { -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); -+ if (unlikely(err < 0)) { -+ mutex_unlock(&lower_inode->i_mutex); -+ goto out; -+ } -+ wh_lower_dentry = -+ lookup_one_len_nd(UNIONFS_DIR_OPAQUE, lower_dentry, -+ sizeof(UNIONFS_DIR_OPAQUE) - 1, -+ &lower_nd); -+ release_lower_nd(&lower_nd, err); -+ } else { -+ args.is_opaque.dentry = lower_dentry; -+ run_sioq(__is_opaque_dir, &args); -+ wh_lower_dentry = args.ret; -+ } -+ -+ mutex_unlock(&lower_inode->i_mutex); -+ -+ if (IS_ERR(wh_lower_dentry)) { -+ err = PTR_ERR(wh_lower_dentry); -+ goto out; -+ } -+ -+ /* This is an opaque dir iff wh_lower_dentry is positive */ -+ err = !!wh_lower_dentry->d_inode; -+ -+ dput(wh_lower_dentry); -+out: -+ return err; -+} -+ -+void __is_opaque_dir(struct work_struct *work) -+{ -+ struct sioq_args *args = container_of(work, struct sioq_args, work); -+ struct nameidata lower_nd; -+ int err; -+ -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); -+ if (unlikely(err < 0)) -+ return; -+ args->ret = lookup_one_len_nd(UNIONFS_DIR_OPAQUE, -+ args->is_opaque.dentry, -+ sizeof(UNIONFS_DIR_OPAQUE) - 1, -+ &lower_nd); -+ release_lower_nd(&lower_nd, err); -+ complete(&args->comp); -+} -+ -+int make_dir_opaque(struct dentry *dentry, int bindex) -+{ -+ int err = 0; -+ struct dentry *lower_dentry, *diropq; -+ struct inode *lower_dir; -+ struct nameidata nd; -+ const struct cred *old_creds; -+ struct cred *new_creds; -+ -+ /* -+ * Opaque directory whiteout markers are special files (like regular -+ * whiteouts), and should appear to the users as if they don't -+ * exist. They should be created/deleted regardless of directory -+ * search/create permissions, but only for the duration of this -+ * creation of the .wh.__dir_opaque: file. Note, this does not -+ * circumvent normal ->permission). -+ */ -+ new_creds = prepare_creds(); -+ if (unlikely(!new_creds)) { -+ err = -ENOMEM; -+ goto out_err; -+ } -+ cap_raise(new_creds->cap_effective, CAP_DAC_READ_SEARCH); -+ cap_raise(new_creds->cap_effective, CAP_DAC_OVERRIDE); -+ old_creds = override_creds(new_creds); -+ -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); -+ lower_dir = lower_dentry->d_inode; -+ BUG_ON(!S_ISDIR(dentry->d_inode->i_mode) || -+ !S_ISDIR(lower_dir->i_mode)); -+ -+ mutex_lock(&lower_dir->i_mutex); -+ err = init_lower_nd(&nd, LOOKUP_OPEN); -+ if (unlikely(err < 0)) -+ goto out; -+ diropq = lookup_one_len_nd(UNIONFS_DIR_OPAQUE, lower_dentry, -+ sizeof(UNIONFS_DIR_OPAQUE) - 1, &nd); -+ release_lower_nd(&nd, err); -+ if (IS_ERR(diropq)) { -+ err = PTR_ERR(diropq); -+ goto out; -+ } -+ -+ err = init_lower_nd(&nd, LOOKUP_CREATE); -+ if (unlikely(err < 0)) -+ goto out; -+ if (!diropq->d_inode) -+ err = vfs_create(lower_dir, diropq, S_IRUGO, &nd); -+ if (!err) -+ dbopaque(dentry) = bindex; -+ release_lower_nd(&nd, err); -+ -+ dput(diropq); -+ -+out: -+ mutex_unlock(&lower_dir->i_mutex); -+ revert_creds(old_creds); -+out_err: -+ return err; -+} -diff --git a/fs/unionfs/xattr.c b/fs/unionfs/xattr.c -new file mode 100644 -index 0000000..a93d803 ---- /dev/null -+++ b/fs/unionfs/xattr.c -@@ -0,0 +1,173 @@ -+/* -+ * Copyright (c) 2003-2011 Erez Zadok -+ * Copyright (c) 2003-2006 Charles P. Wright -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2005-2006 Junjiro Okajima -+ * Copyright (c) 2005 Arun M. Krishnakumar -+ * Copyright (c) 2004-2006 David P. Quigley -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair -+ * Copyright (c) 2003 Puja Gupta -+ * Copyright (c) 2003 Harikesavan Krishnan -+ * Copyright (c) 2003-2011 Stony Brook University -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "union.h" -+ -+/* This is lifted from fs/xattr.c */ -+void *unionfs_xattr_alloc(size_t size, size_t limit) -+{ -+ void *ptr; -+ -+ if (size > limit) -+ return ERR_PTR(-E2BIG); -+ -+ if (!size) /* size request, no buffer is needed */ -+ return NULL; -+ -+ ptr = kmalloc(size, GFP_KERNEL); -+ if (unlikely(!ptr)) -+ return ERR_PTR(-ENOMEM); -+ return ptr; -+} -+ -+/* -+ * BKL held by caller. -+ * dentry->d_inode->i_mutex locked -+ */ -+ssize_t unionfs_getxattr(struct dentry *dentry, const char *name, void *value, -+ size_t size) -+{ -+ struct dentry *lower_dentry = NULL; -+ struct dentry *parent; -+ int err = -EOPNOTSUPP; -+ bool valid; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ -+ err = vfs_getxattr(lower_dentry, (char *) name, value, size); -+ -+out: -+ unionfs_check_dentry(dentry); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+/* -+ * BKL held by caller. -+ * dentry->d_inode->i_mutex locked -+ */ -+int unionfs_setxattr(struct dentry *dentry, const char *name, -+ const void *value, size_t size, int flags) -+{ -+ struct dentry *lower_dentry = NULL; -+ struct dentry *parent; -+ int err = -EOPNOTSUPP; -+ bool valid; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ -+ err = vfs_setxattr(lower_dentry, (char *) name, (void *) value, -+ size, flags); -+ -+out: -+ unionfs_check_dentry(dentry); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+/* -+ * BKL held by caller. -+ * dentry->d_inode->i_mutex locked -+ */ -+int unionfs_removexattr(struct dentry *dentry, const char *name) -+{ -+ struct dentry *lower_dentry = NULL; -+ struct dentry *parent; -+ int err = -EOPNOTSUPP; -+ bool valid; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ -+ err = vfs_removexattr(lower_dentry, (char *) name); -+ -+out: -+ unionfs_check_dentry(dentry); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -+ -+/* -+ * BKL held by caller. -+ * dentry->d_inode->i_mutex locked -+ */ -+ssize_t unionfs_listxattr(struct dentry *dentry, char *list, size_t size) -+{ -+ struct dentry *lower_dentry = NULL; -+ struct dentry *parent; -+ int err = -EOPNOTSUPP; -+ char *encoded_list = NULL; -+ bool valid; -+ -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); -+ -+ valid = __unionfs_d_revalidate(dentry, parent, false); -+ if (unlikely(!valid)) { -+ err = -ESTALE; -+ goto out; -+ } -+ -+ lower_dentry = unionfs_lower_dentry(dentry); -+ -+ encoded_list = list; -+ err = vfs_listxattr(lower_dentry, encoded_list, size); -+ -+out: -+ unionfs_check_dentry(dentry); -+ unionfs_unlock_dentry(dentry); -+ unionfs_unlock_parent(dentry, parent); -+ unionfs_read_unlock(dentry->d_sb); -+ return err; -+} -diff --git a/include/linux/fs_stack.h b/include/linux/fs_stack.h -index da317c7..64f1ced 100644 ---- a/include/linux/fs_stack.h -+++ b/include/linux/fs_stack.h -@@ -1,7 +1,19 @@ -+/* -+ * Copyright (c) 2006-2009 Erez Zadok -+ * Copyright (c) 2006-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2006-2009 Stony Brook University -+ * Copyright (c) 2006-2009 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ - #ifndef _LINUX_FS_STACK_H - #define _LINUX_FS_STACK_H - --/* This file defines generic functions used primarily by stackable -+/* -+ * This file defines generic functions used primarily by stackable - * filesystems; none of these functions require i_mutex to be held. - */ - -diff --git a/include/linux/magic.h b/include/linux/magic.h -index 1e5df2a..01ee54d 100644 ---- a/include/linux/magic.h -+++ b/include/linux/magic.h -@@ -50,6 +50,8 @@ - #define REISER2FS_SUPER_MAGIC_STRING "ReIsEr2Fs" - #define REISER2FS_JR_SUPER_MAGIC_STRING "ReIsEr3Fs" - -+#define UNIONFS_SUPER_MAGIC 0xf15f083d -+ - #define SMB_SUPER_MAGIC 0x517B - #define USBDEVICE_SUPER_MAGIC 0x9fa2 - #define CGROUP_SUPER_MAGIC 0x27e0eb -diff --git a/include/linux/namei.h b/include/linux/namei.h -index eba45ea..8e19e9c 100644 ---- a/include/linux/namei.h -+++ b/include/linux/namei.h -@@ -81,8 +81,11 @@ extern int vfs_path_lookup(struct dentry *, struct vfsmount *, - - extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry, - int (*open)(struct inode *, struct file *)); -+extern void release_open_intent(struct nameidata *); - - extern struct dentry *lookup_one_len(const char *, struct dentry *, int); -+extern struct dentry *lookup_one_len_nd(const char *, struct dentry *, int, -+ struct nameidata *nd); - - extern int follow_down_one(struct path *); - extern int follow_down(struct path *); -diff --git a/include/linux/splice.h b/include/linux/splice.h -index 997c3b4..54f5501 100644 ---- a/include/linux/splice.h -+++ b/include/linux/splice.h -@@ -81,6 +81,11 @@ extern ssize_t splice_to_pipe(struct pipe_inode_info *, - struct splice_pipe_desc *); - extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *, - splice_direct_actor *); -+extern long vfs_splice_from(struct pipe_inode_info *pipe, struct file *out, -+ loff_t *ppos, size_t len, unsigned int flags); -+extern long vfs_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags); - - /* - * for dynamic pipe sizing -diff --git a/include/linux/union_fs.h b/include/linux/union_fs.h -new file mode 100644 -index 0000000..c84d97e ---- /dev/null -+++ b/include/linux/union_fs.h -@@ -0,0 +1,22 @@ -+/* -+ * Copyright (c) 2003-2009 Erez Zadok -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek -+ * Copyright (c) 2003-2009 Stony Brook University -+ * Copyright (c) 2003-2009 The Research Foundation of SUNY -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _LINUX_UNION_FS_H -+#define _LINUX_UNION_FS_H -+ -+/* -+ * DEFINITIONS FOR USER AND KERNEL CODE: -+ */ -+# define UNIONFS_IOCTL_INCGEN _IOR(0x15, 11, int) -+# define UNIONFS_IOCTL_QUERYFILE _IOR(0x15, 15, int) -+ -+#endif /* _LINUX_UNIONFS_H */ -+ -diff --git a/security/security.c b/security/security.c -index 4ba6d4c..093d8b4 100644 ---- a/security/security.c -+++ b/security/security.c -@@ -520,6 +520,7 @@ int security_inode_permission(struct inode *inode, int mask) - return 0; - return security_ops->inode_permission(inode, mask, 0); - } -+EXPORT_SYMBOL(security_inode_permission); - - int security_inode_exec_permission(struct inode *inode, unsigned int flags) - { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0030-omap-Change-omap_device-activate-latency-messages-fr.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0030-omap-Change-omap_device-activate-latency-messages-fr.patch deleted file mode 100644 index 7dc8090..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0030-omap-Change-omap_device-activate-latency-messages-fr.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 728b784863056a2b2e35134f71082271ebab0892 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Mon, 23 May 2011 12:16:50 -0700 -Subject: [PATCH 30/32] omap: Change omap_device activate latency messages from pr_warning to pr_debug - -Messages can be safely ignored, so reduce console noise - -Signed-off-by: Steve Sakoman <steve@sakoman.com> ---- - arch/arm/plat-omap/omap_device.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c -index 9bbda9a..ca8a479 100644 ---- a/arch/arm/plat-omap/omap_device.c -+++ b/arch/arm/plat-omap/omap_device.c -@@ -145,12 +145,12 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) - odpl->activate_lat_worst = act_lat; - if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { - odpl->activate_lat = act_lat; -- pr_warning("omap_device: %s.%d: new worst case " -+ pr_debug("omap_device: %s.%d: new worst case " - "activate latency %d: %llu\n", - od->pdev.name, od->pdev.id, - od->pm_lat_level, act_lat); - } else -- pr_warning("omap_device: %s.%d: activate " -+ pr_debug("omap_device: %s.%d: activate " - "latency %d higher than exptected. " - "(%llu > %d)\n", - od->pdev.name, od->pdev.id, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0031-omap-overo-Add-opp-init.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0031-omap-overo-Add-opp-init.patch deleted file mode 100644 index 07df763..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0031-omap-overo-Add-opp-init.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 530abfee962141f263344b4de3ca48b57e5e514c Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Tue, 24 May 2011 20:36:07 -0700 -Subject: [PATCH 31/32] omap: overo: Add opp init - -omap: overo: Add opp init - -Work in progress - -Signed-off-by: Steve Sakoman <steve@sakoman.com> ---- - arch/arm/mach-omap2/board-overo.c | 49 +++++++++++++++++++++++++++++++++++++ - 1 files changed, 49 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 05dd3eb..8c2d21f 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -25,6 +25,7 @@ - #include <linux/init.h> - #include <linux/io.h> - #include <linux/kernel.h> -+#include <linux/opp.h> - #include <linux/platform_device.h> - #include <linux/i2c/twl.h> - #include <linux/regulator/machine.h> -@@ -43,6 +44,7 @@ - - #include <plat/board.h> - #include <plat/common.h> -+#include <plat/omap_device.h> - #include <plat/display.h> - #include <plat/panel-generic-dpi.h> - #include <mach/gpio.h> -@@ -54,6 +56,7 @@ - #include <plat/usb.h> - - #include "mux.h" -+#include "pm.h" - #include "sdram-micron-mt46h32m32lf-6.h" - #include "hsmmc.h" - -@@ -755,6 +758,51 @@ static struct omap_musb_board_data musb_board_data = { - .power = 100, - }; - -+static void __init overo_opp_init(void) -+{ -+ int r = 0; -+ -+ /* Initialize the omap3 opp table */ -+ if (omap3_opp_init()) { -+ pr_err("%s: opp default init failed\n", __func__); -+ return; -+ } -+ -+ /* Custom OPP enabled for 36/3730 */ -+ if (cpu_is_omap3630()) { -+ struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); -+ struct omap_hwmod *dh = omap_hwmod_lookup("iva"); -+ struct device *dev; -+ -+ if (!mh || !dh) { -+ pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", -+ __func__, mh, dh); -+ return; -+ } -+ /* Enable MPU 1GHz and lower opps */ -+ dev = &mh->od->pdev.dev; -+ r = opp_enable(dev, 1000000000); -+ -+ /* Enable IVA 800MHz and lower opps */ -+ dev = &dh->od->pdev.dev; -+ r |= opp_enable(dev, 800000000); -+ -+ if (r) { -+ pr_err("%s: failed to enable higher opp %d\n", -+ __func__, r); -+ /* -+ * Cleanup - disable the higher freqs - we dont care -+ * about the results -+ */ -+ dev = &mh->od->pdev.dev; -+ opp_disable(dev, 1000000000); -+ dev = &dh->od->pdev.dev; -+ opp_disable(dev, 800000000); -+ } -+ } -+ return; -+} -+ - static void __init overo_init(void) - { - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); -@@ -770,6 +818,7 @@ static void __init overo_init(void) - overo_display_init(); - overo_init_led(); - overo_init_keys(); -+ overo_opp_init(); - - /* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0032-omap3-Add-basic-support-for-720MHz-part.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0032-omap3-Add-basic-support-for-720MHz-part.patch deleted file mode 100644 index 9a9320d..0000000 --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0032-omap3-Add-basic-support-for-720MHz-part.patch +++ /dev/null @@ -1,202 +0,0 @@ -From cd9682b39f41675c4e551c607425226b38fab17d Mon Sep 17 00:00:00 2001 -From: Sanjeev Premi <premi@ti.com> -Date: Tue, 18 Jan 2011 13:19:55 +0530 -Subject: [PATCH 32/32] omap3: Add basic support for 720MHz part - -This patch adds support for new speed enhanced parts with ARM -and IVA running at 720MHz and 520MHz respectively. These parts -can be probed at run-time by reading PRODID.SKUID[3:0] at -0x4830A20C [1]. - -This patch specifically does following: - * Detect devices capable of 720MHz. - * Add new OPP - * Ensure that OPP is conditionally enabled. - * Check for presence of IVA before attempting to enable - the corresponding OPP. - - [1] http://focus.ti.com/lit/ug/spruff1d/spruff1d.pdf - -Signed-off-by: Sanjeev Premi <premi@ti.com> ---- - arch/arm/mach-omap2/control.h | 7 ++++ - arch/arm/mach-omap2/id.c | 10 +++++ - arch/arm/mach-omap2/opp3xxx_data.c | 63 ++++++++++++++++++++++++++++++++- - arch/arm/plat-omap/include/plat/cpu.h | 2 + - 4 files changed, 81 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h -index c2804c1..6edd7cc 100644 ---- a/arch/arm/mach-omap2/control.h -+++ b/arch/arm/mach-omap2/control.h -@@ -371,6 +371,13 @@ - #define FEAT_NEON 0 - #define FEAT_NEON_NONE 1 - -+/* -+ * Product ID register -+ */ -+#define OMAP3_PRODID 0x020C -+ -+#define OMAP3_SKUID_MASK 0x0f -+#define OMAP3_SKUID_720MHZ 0x08 - - #ifndef __ASSEMBLY__ - #ifdef CONFIG_ARCH_OMAP2PLUS -diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c -index 2537090..b6ed78a 100644 ---- a/arch/arm/mach-omap2/id.c -+++ b/arch/arm/mach-omap2/id.c -@@ -210,6 +210,15 @@ static void __init omap3_check_features(void) - * TODO: Get additional info (where applicable) - * e.g. Size of L2 cache. - */ -+ -+ /* -+ * Does it support 720MHz? -+ */ -+ status = (OMAP3_SKUID_MASK & read_tap_reg(OMAP3_PRODID)); -+ -+ if (status & OMAP3_SKUID_720MHZ) { -+ omap3_features |= OMAP3_HAS_720MHZ; -+ } - } - - static void __init ti816x_check_features(void) -@@ -490,6 +499,7 @@ static void __init omap3_cpuinfo(void) - OMAP3_SHOW_FEATURE(neon); - OMAP3_SHOW_FEATURE(isp); - OMAP3_SHOW_FEATURE(192mhz_clk); -+ OMAP3_SHOW_FEATURE(720mhz); - - printk(")\n"); - } -diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c -index d95f3f9..44fbc84 100644 ---- a/arch/arm/mach-omap2/opp3xxx_data.c -+++ b/arch/arm/mach-omap2/opp3xxx_data.c -@@ -18,8 +18,10 @@ - * GNU General Public License for more details. - */ - #include <linux/module.h> -+#include <linux/opp.h> - - #include <plat/cpu.h> -+#include <plat/omap_device.h> - - #include "control.h" - #include "omap_opp_data.h" -@@ -98,6 +100,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { - OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV), - /* MPU OPP5 */ - OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV), -+ /* MPU OPP6 */ -+ OPP_INITIALIZER("mpu", false, 720000000, 1350000), - - /* - * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is -@@ -123,6 +127,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { - OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV), - /* DSP OPP5 */ - OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV), -+ /* DSP OPP6 */ -+ OPP_INITIALIZER("iva", false, 520000000, 1350000), - }; - - static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { -@@ -150,6 +156,57 @@ static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { - OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV), - }; - -+ -+/** -+ * omap3_opp_enable_720Mhz() - Enable the OPP corresponding to 720MHz -+ * -+ * This function would be executed only if the silicon is capable of -+ * running at the 720MHz. -+ */ -+static int __init omap3_opp_enable_720Mhz(void) -+{ -+ int r = -ENODEV; -+ struct omap_hwmod *oh_mpu = omap_hwmod_lookup("mpu"); -+ struct omap_hwmod *oh_iva; -+ struct platform_device *pdev; -+ -+ if (!oh_mpu || !oh_mpu->od) { -+ goto err; -+ } else { -+ pdev = &oh_mpu->od->pdev; -+ -+ r = opp_enable(&pdev->dev, 720000000); -+ if (r < 0) { -+ dev_err(&pdev->dev, -+ "opp_enable() failed for mpu@720MHz"); -+ goto err; -+ } -+ } -+ -+ if (omap3_has_iva()) { -+ oh_iva = omap_hwmod_lookup("iva"); -+ -+ if (!oh_iva || !oh_iva->od) { -+ r = -ENODEV; -+ goto err; -+ } else { -+ pdev = &oh_iva->od->pdev; -+ -+ r = opp_enable(&pdev->dev, 520000000); -+ if (r < 0) { -+ dev_err(&pdev->dev, -+ "opp_enable() failed for iva@520MHz"); -+ goto err; -+ } -+ } -+ } -+ -+ dev_info(&pdev->dev, "Enabled OPP corresponding to 720MHz\n"); -+ -+err: -+ return r; -+} -+ - /** - * omap3_opp_init() - initialize omap3 opp table - */ -@@ -163,10 +220,14 @@ int __init omap3_opp_init(void) - if (cpu_is_omap3630()) - r = omap_init_opp_table(omap36xx_opp_def_list, - ARRAY_SIZE(omap36xx_opp_def_list)); -- else -+ else { - r = omap_init_opp_table(omap34xx_opp_def_list, - ARRAY_SIZE(omap34xx_opp_def_list)); - -+ if (omap3_has_720mhz()) -+ r = omap3_opp_enable_720Mhz(); -+ } -+ - return r; - } - device_initcall(omap3_opp_init); -diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h -index 8198bb6..5204c1e 100644 ---- a/arch/arm/plat-omap/include/plat/cpu.h -+++ b/arch/arm/plat-omap/include/plat/cpu.h -@@ -478,6 +478,7 @@ extern u32 omap3_features; - #define OMAP3_HAS_192MHZ_CLK BIT(5) - #define OMAP3_HAS_IO_WAKEUP BIT(6) - #define OMAP3_HAS_SDRC BIT(7) -+#define OMAP3_HAS_720MHZ BIT(8) - - #define OMAP3_HAS_FEATURE(feat,flag) \ - static inline unsigned int omap3_has_ ##feat(void) \ -@@ -493,5 +494,6 @@ OMAP3_HAS_FEATURE(isp, ISP) - OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) - OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) - OMAP3_HAS_FEATURE(sdrc, SDRC) -+OMAP3_HAS_FEATURE(720mhz, 720MHZ) - - #endif --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap_2.6.39.bb b/recipes-kernel/linux/linux-omap_2.6.39.bb deleted file mode 100644 index 430fa09..0000000 --- a/recipes-kernel/linux/linux-omap_2.6.39.bb +++ /dev/null @@ -1,123 +0,0 @@ -require linux.inc - -DESCRIPTION = "Linux kernel for OMAP processors" - -COMPATIBLE_MACHINE = "(beagleboard)" - -# The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc -SRCREV_pn-${PN} = "v2.6.39" -MACHINE_KERNEL_PR_append = "o" - -FILESEXTRAPATHS_prepend := "{THISDIR}/${PN}-${PV}:" - -SRC_URI += "git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git;protocol=git \ - file://defconfig" - -SRC_URI_append = " \ - file://sakoman/0001-OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch \ - file://sakoman/0002-OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch \ - file://sakoman/0003-OMAP2PLUS-DSS2-Fix-Return-correct-lcd-clock-source-f.patch \ - file://sakoman/0004-OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch \ - file://sakoman/0005-OMAP-DSS2-fix-panel-Kconfig-dependencies.patch \ - file://sakoman/0006-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch \ - file://sakoman/0007-video-add-timings-for-hd720.patch \ - file://sakoman/0008-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch \ - file://sakoman/0009-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch \ - file://sakoman/0010-Revert-omap2_mcspi-Flush-posted-writes.patch \ - file://sakoman/0011-Revert-omap_hsmmc-improve-interrupt-synchronisation.patch \ - file://sakoman/0012-Don-t-turn-SDIO-cards-off-to-save-power.-Doing-so-wi.patch \ - file://sakoman/0014-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch \ - file://sakoman/0015-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch \ - file://sakoman/0016-RTC-add-support-for-backup-battery-recharge.patch \ - file://sakoman/0017-ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch \ - file://sakoman/0018-Add-power-off-support-for-the-TWL4030-companion.patch \ - file://sakoman/0019-ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch \ - file://sakoman/0020-Enabling-Hwmon-driver-for-twl4030-madc.patch \ - file://sakoman/0021-mfd-twl-core-enable-madc-clock.patch \ - file://sakoman/0022-rtc-twl-Switch-to-using-threaded-irq.patch \ - file://sakoman/0023-ARM-OMAP-automatically-set-musb-mode-in-platform-dat.patch \ - file://sakoman/0024-omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch \ - file://sakoman/0025-omap-Fix-mtd-subpage-read-alignment.patch \ - file://sakoman/0026-mtd-nand-omap2-Force-all-buffer-reads-to-u32-alignme.patch \ - file://sakoman/0027-omap-nand-fix-subpage-ecc-issue-with-prefetch.patch \ - file://sakoman/0028-OMAP-Overo-Add-support-for-spidev.patch \ - file://sakoman/0029-unionfs-Add-support-for-unionfs-2.5.9.patch \ - file://sakoman/0030-omap-Change-omap_device-activate-latency-messages-fr.patch \ - file://sakoman/0031-omap-overo-Add-opp-init.patch \ - file://sakoman/0032-omap3-Add-basic-support-for-720MHz-part.patch \ - \ - file://beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch \ - file://beagle/0002-OMAP3-beagle-add-support-for-expansionboards.patch \ - file://beagle/0003-OMAP3-beagle-add-MADC-support.patch \ - file://beagle/0004-OMAP3-beagle-add-regulators-for-camera-interface.patch \ - file://beagle/0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch \ - file://beagle/0006-OMAP3-BEAGLE-fix-RTC.patch \ - file://beagle/0007-omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch \ - \ - file://camera/0001-Add-driver-for-Aptina-Micron-mt9p031-sensor.patch \ - file://camera/0002-v4l-Add-mt9v032-sensor-driver.patch \ - file://camera/0003-Add-support-for-mt9p031-LI-5M03-module-in-Beagleboar.patch \ - \ - file://pm/linux-omap-2.6.39-ti-pm/0001-OMAP3-voltage-remove-spurious-pr_notice-for-debugfs.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0002-OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0003-OMAP3-smartreflex-fix-sr_late_init-error-path-in-pro.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0004-OMAP3-smartreflex-request-the-memory-region.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0005-OMAP3-smartreflex-fix-ioremap-leak-on-probe-error.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0006-OMAP3-smartreflex-delete-instance-from-sr_list-on-pr.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0007-OMAP3-smartreflex-delete-debugfs-entries-on-probe-er.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0008-OMAP3-cpuidle-remove-useless-SDP-specific-timings.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0009-OMAP3-SR-make-notify-independent-of-class.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0010-OMAP3-SR-disable-interrupt-by-default.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch \ - file://pm/linux-omap-2.6.39-ti-pm/0012-OMAP3-SR-fix-cosmetic-indentation.patch \ - \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0001-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0002-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0004-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0005-cpufreq-fixup-after-new-OPP-layer-merged.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0006-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0007-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0008-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch \ - \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0001-cpufreq-helpers-for-walking-the-frequency-table.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0002-cpufreq-introduce-hotplug-governor.patch \ - \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0001-OMAP2-cpufreq-free-up-table-on-exit.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0002-OMAP2-cpufreq-handle-invalid-cpufreq-table.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0003-OMAP2-cpufreq-minor-comment-cleanup.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0004-OMAP2-cpufreq-use-clk_init_cpufreq_table-if-OPPs-not.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0005-OMAP2-cpufreq-use-cpufreq_frequency_table_target.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0006-OMAP2-cpufreq-fix-freq_table-leak.patch \ - \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0001-OMAP2-clockdomain-Add-an-api-to-read-idle-mode.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0002-OMAP2-clockdomain-Add-SoC-support-for-clkdm_is_idle.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0003-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0004-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0005-OMAP2-hwmod-Follow-the-recomended-PRCM-sequence.patch \ - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0006-OMAP-Serial-Check-wk_st-only-if-present.patch \ - \ - file://mfd/0001-mfd-Fix-omap-usbhs-crash-when-rmmoding-ehci-or-ohci.patch \ - file://mfd/0002-mfd-Fix-omap_usbhs_alloc_children-error-handling.patch \ - file://mfd/0003-mfd-Add-omap-usbhs-runtime-PM-support.patch \ - file://mfd/0004-arm-omap-usb-ehci-and-ohci-hwmod-structures-for-omap.patch \ - file://mfd/0005-arm-omap-usb-register-hwmods-of-usbhs.patch \ - file://mfd/0006-arm-omap-usb-device-name-change-for-the-clk-names-of.patch \ - file://mfd/0007-mfd-global-Suspend-and-resume-support-of-ehci-and-oh.patch \ - file://mfd/0008-MFD-TWL4030-Correct-the-warning-print-during-script-.patch \ - file://mfd/0009-MFD-TWL4030-Modifying-the-macro-name-Main_Ref-to-all.patch \ - file://mfd/0010-MFD-TWL4030-power-scripts-for-OMAP3-boards.patch \ - file://mfd/0011-MFD-TWL4030-TWL-version-checking.patch \ - file://mfd/0012-MFD-TWL4030-workaround-changes-for-Erratum-27.patch \ - file://mfd/0013-MFD-TWL4030-optimizing-resource-configuration.patch \ - \ - file://musb/0001-usb-musb-Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch \ - \ - file://net/0001-NFS-Revert-NFSROOT-default-mount-options.patch \ - " - -SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ -" - -S = "${WORKDIR}/git" - -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 1/8] linux-omap-2.6.39: remove old beagleboard-specific and not supported kernel 2013-09-28 22:53 ` [PATCH 1/8] linux-omap-2.6.39: remove old beagleboard-specific and not supported kernel Denys Dmytriyenko @ 2013-09-30 14:31 ` Cooper Jr., Franklin 0 siblings, 0 replies; 13+ messages in thread From: Cooper Jr., Franklin @ 2013-09-30 14:31 UTC (permalink / raw) To: Denys Dmytriyenko, meta-ti@yoctoproject.org Acked-by: Franklin Cooper Jr. <fcooper@ti.com> > -----Original Message----- > From: meta-ti-bounces@yoctoproject.org [mailto:meta-ti- > bounces@yoctoproject.org] On Behalf Of Denys Dmytriyenko > Sent: Saturday, September 28, 2013 5:54 PM > To: meta-ti@yoctoproject.org > Subject: [meta-ti] [PATCH 1/8] linux-omap-2.6.39: remove old beagleboard- > specific and not supported kernel > > From: Denys Dmytriyenko <denys@ti.com> > > Beagleboard is supported by newer 3.x kernel recipes. > > Signed-off-by: Denys Dmytriyenko <denys@ti.com> > --- > ...e-add-support-for-beagleboard-xM-revision.patch | 117 - > ...P3-beagle-add-support-for-expansionboards.patch | 359 - > .../0003-OMAP3-beagle-add-MADC-support.patch | 36 - > ...eagle-add-regulators-for-camera-interface.patch | 88 - > .../0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 - > .../beagle/0006-OMAP3-BEAGLE-fix-RTC.patch | 27 - > ...mc-Adjust-dto-to-eliminate-timeout-errors.patch | 33 - > ...ap3-beagle-Use-GPTIMERi-1-for-clockevents.patch | 42 - > .../linux-omap-2.6.39/beagleboard/configs/stock | 3490 ------ > .../linux/linux-omap-2.6.39/beagleboard/defconfig | 3517 ------ > ...d-driver-for-Aptina-Micron-mt9p031-sensor.patch | 859 -- > .../0002-v4l-Add-mt9v032-sensor-driver.patch | 853 -- > ...-for-mt9p031-LI-5M03-module-in-Beagleboar.patch | 162 - > ...ap-usbhs-crash-when-rmmoding-ehci-or-ohci.patch | 67 - > ...-omap_usbhs_alloc_children-error-handling.patch | 50 - > ...003-mfd-Add-omap-usbhs-runtime-PM-support.patch | 245 - > ...b-ehci-and-ohci-hwmod-structures-for-omap.patch | 406 - > ...005-arm-omap-usb-register-hwmods-of-usbhs.patch | 160 - > ...b-device-name-change-for-the-clk-names-of.patch | 123 - > ...Suspend-and-resume-support-of-ehci-and-oh.patch | 165 - > ...-Correct-the-warning-print-during-script-.patch | 36 - > ...-Modifying-the-macro-name-Main_Ref-to-all.patch | 61 - > ...FD-TWL4030-power-scripts-for-OMAP3-boards.patch | 705 -- > .../0011-MFD-TWL4030-TWL-version-checking.patch | 164 - > ...TWL4030-workaround-changes-for-Erratum-27.patch | 341 - > ...TWL4030-optimizing-resource-configuration.patch | 184 - > ...-Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch | 121 - > ...-NFS-Revert-NFSROOT-default-mount-options.patch | 13 - > .../0001-OMAP2-cpufreq-free-up-table-on-exit.patch | 38 - > ...MAP2-cpufreq-handle-invalid-cpufreq-table.patch | 44 - > .../0003-OMAP2-cpufreq-minor-comment-cleanup.patch | 33 - > ...eq-use-clk_init_cpufreq_table-if-OPPs-not.patch | 48 - > ...pufreq-use-cpufreq_frequency_table_target.patch | 78 - > .../0006-OMAP2-cpufreq-fix-freq_table-leak.patch | 100 - > ...q-helpers-for-walking-the-frequency-table.patch | 134 - > .../0002-cpufreq-introduce-hotplug-governor.patch | 879 -- > ...q-ensure-driver-initializes-after-cpufreq.patch | 27 - > ...PUfreq-ensure-policy-is-fully-initialized.patch | 31 - > .../0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch | 263 - > ...AP-PM-CPUFREQ-Fix-conditional-compilation.patch | 32 - > ...-cpufreq-fixup-after-new-OPP-layer-merged.patch | 33 - > ...q-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch | 669 -- > ...cpufreq-Add-SMP-support-to-cater-OMAP4430.patch | 170 - > ...pufreq-Fix-typo-when-attempting-to-set-mp.patch | 29 - > ...-clockdomain-Add-an-api-to-read-idle-mode.patch | 77 - > ...kdomain-Add-SoC-support-for-clkdm_is_idle.patch | 86 - > ...itialise-sleep_switch-to-a-non-valid-valu.patch | 35 - > ...P2-PM-idle-clkdms-only-if-already-in-idle.patch | 50 - > ...hwmod-Follow-the-recomended-PRCM-sequence.patch | 46 - > ...6-OMAP-Serial-Check-wk_st-only-if-present.patch | 33 - > ...age-remove-spurious-pr_notice-for-debugfs.patch | 30 - > ...OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch | 41 - > ...reflex-fix-sr_late_init-error-path-in-pro.patch | 30 - > ...AP3-smartreflex-request-the-memory-region.patch | 36 - > ...artreflex-fix-ioremap-leak-on-probe-error.patch | 66 - > ...reflex-delete-instance-from-sr_list-on-pr.patch | 29 - > ...reflex-delete-debugfs-entries-on-probe-er.patch | 48 - > ...uidle-remove-useless-SDP-specific-timings.patch | 57 - > ...OMAP3-SR-make-notify-independent-of-class.patch | 48 - > ...010-OMAP3-SR-disable-interrupt-by-default.patch | 37 - > ...1-OMAP3-SR-enable-disable-SR-only-on-need.patch | 41 - > .../0012-OMAP3-SR-fix-cosmetic-indentation.patch | 49 - > ...01-OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch | 33 - > .../0002-OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch | 49 - > ...SS2-Fix-Return-correct-lcd-clock-source-f.patch | 43 - > .../0004-OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch | 64 - > ...-OMAP-DSS2-fix-panel-Kconfig-dependencies.patch | 61 - > ...dd-bootarg-for-selecting-svideo-or-compos.patch | 75 - > .../sakoman/0007-video-add-timings-for-hd720.patch | 27 - > ...-smsc911x-return-ENODEV-if-device-is-not-.patch | 29 - > ...ut-touchscreen-ads7846-return-ENODEV-if-d.patch | 47 - > ...10-Revert-omap2_mcspi-Flush-posted-writes.patch | 25 - > ...p_hsmmc-improve-interrupt-synchronisation.patch | 482 - > ...SDIO-cards-off-to-save-power.-Doing-so-wi.patch | 51 - > ...13-Enable-the-use-of-SDIO-card-interrupts.patch | 288 - > ...Enable-audio-capture-by-default-for-twl40.patch | 27 - > ...odecs-twl4030-Turn-on-mic-bias-by-default.patch | 25 - > ...C-add-support-for-backup-battery-recharge.patch | 55 - > ...mc-twl4030-move-clock-input-selection-pri.patch | 39 - > ...wer-off-support-for-the-TWL4030-companion.patch | 103 - > ...RM-OMAP-Add-twl4030-madc-support-to-Overo.patch | 33 - > ...20-Enabling-Hwmon-driver-for-twl4030-madc.patch | 46 - > .../0021-mfd-twl-core-enable-madc-clock.patch | 54 - > ...0022-rtc-twl-Switch-to-using-threaded-irq.patch | 25 - > ...tomatically-set-musb-mode-in-platform-dat.patch | 49 - > ...mc-Adjust-dto-to-eliminate-timeout-errors.patch | 28 - > .../0025-omap-Fix-mtd-subpage-read-alignment.patch | 95 - > ...ap2-Force-all-buffer-reads-to-u32-alignme.patch | 35 - > ...-nand-fix-subpage-ecc-issue-with-prefetch.patch | 63 - > .../0028-OMAP-Overo-Add-support-for-spidev.patch | 46 - > ...029-unionfs-Add-support-for-unionfs-2.5.9.patch | 11494 ------------------- > ...-omap_device-activate-latency-messages-fr.patch | 34 - > .../sakoman/0031-omap-overo-Add-opp-init.patch | 105 - > ...2-omap3-Add-basic-support-for-720MHz-part.patch | 202 - > recipes-kernel/linux/linux-omap_2.6.39.bb | 123 - > 95 files changed, 29857 deletions(-) > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0001- > OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0002- > OMAP3-beagle-add-support-for-expansionboards.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0003- > OMAP3-beagle-add-MADC-support.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0004- > OMAP3-beagle-add-regulators-for-camera-interface.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0005- > OMAP3-beagle-HACK-add-in-1GHz-OPP.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0006- > OMAP3-BEAGLE-fix-RTC.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0007- > omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/beagle/0007- > omap3-beagle-Use-GPTIMERi-1-for-clockevents.patch > delete mode 100644 recipes-kernel/linux/linux-omap- > 2.6.39/beagleboard/configs/stock > delete mode 100644 recipes-kernel/linux/linux-omap- > 2.6.39/beagleboard/defconfig > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/camera/0001- > Add-driver-for-Aptina-Micron-mt9p031-sensor.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/camera/0002- > v4l-Add-mt9v032-sensor-driver.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/camera/0003- > Add-support-for-mt9p031-LI-5M03-module-in-Beagleboar.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0001-mfd- > Fix-omap-usbhs-crash-when-rmmoding-ehci-or-ohci.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0002-mfd- > Fix-omap_usbhs_alloc_children-error-handling.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0003-mfd- > Add-omap-usbhs-runtime-PM-support.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0004-arm- > omap-usb-ehci-and-ohci-hwmod-structures-for-omap.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0005-arm- > omap-usb-register-hwmods-of-usbhs.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0006-arm- > omap-usb-device-name-change-for-the-clk-names-of.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0007-mfd- > global-Suspend-and-resume-support-of-ehci-and-oh.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0008-MFD- > TWL4030-Correct-the-warning-print-during-script-.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0009-MFD- > TWL4030-Modifying-the-macro-name-Main_Ref-to-all.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0010-MFD- > TWL4030-power-scripts-for-OMAP3-boards.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0011-MFD- > TWL4030-TWL-version-checking.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0012-MFD- > TWL4030-workaround-changes-for-Erratum-27.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/mfd/0013-MFD- > TWL4030-optimizing-resource-configuration.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/musb/0001-usb- > musb-Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/net/0001-NFS- > Revert-NFSROOT-default-mount-options.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-fixes/0001-OMAP2-cpufreq-free-up-table-on- > exit.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-fixes/0002-OMAP2-cpufreq-handle-invalid-cpufreq- > table.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-fixes/0003-OMAP2-cpufreq-minor-comment- > cleanup.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-fixes/0004-OMAP2-cpufreq-use- > clk_init_cpufreq_table-if-OPPs-not.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-fixes/0005-OMAP2-cpufreq-use- > cpufreq_frequency_table_target.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-fixes/0006-OMAP2-cpufreq-fix-freq_table-leak.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-hotplug/0001-cpufreq-helpers-for-walking-the- > frequency-table.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-hotplug/0002-cpufreq-introduce-hotplug- > governor.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0001-OMAP-CPUfreq-ensure-driver-initializes-after- > cpufreq.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0002-OMAP-CPUfreq-ensure-policy-is-fully- > initialized.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0004-OMAP-PM-CPUFREQ-Fix-conditional- > compilation.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0005-cpufreq-fixup-after-new-OPP-layer- > merged.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0006-OMAP-cpufreq-Split-OMAP1-and- > OMAP2PLUS-CPUfreq-drive.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0007-OMAP2PLUS-cpufreq-Add-SMP-support-to- > cater-OMAP4430.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0008-OMAP2PLUS-cpufreq-Fix-typo-when- > attempting-to-set-mp.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpuidle/0001-OMAP2-clockdomain-Add-an-api-to-read-idle- > mode.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpuidle/0002-OMAP2-clockdomain-Add-SoC-support-for- > clkdm_is_idle.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpuidle/0003-OMAP2-PM-Initialise-sleep_switch-to-a-non- > valid-valu.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpuidle/0004-OMAP2-PM-idle-clkdms-only-if-already-in- > idle.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpuidle/0005-OMAP2-hwmod-Follow-the-recomended- > PRCM-sequence.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpuidle/0006-OMAP-Serial-Check-wk_st-only-if- > present.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0001-OMAP3-voltage-remove-spurious-pr_notice-for- > debugfs.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0002-OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0003-OMAP3-smartreflex-fix-sr_late_init-error-path-in-pro.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0004-OMAP3-smartreflex-request-the-memory-region.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0005-OMAP3-smartreflex-fix-ioremap-leak-on-probe-error.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0006-OMAP3-smartreflex-delete-instance-from-sr_list-on- > pr.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0007-OMAP3-smartreflex-delete-debugfs-entries-on-probe- > er.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0008-OMAP3-cpuidle-remove-useless-SDP-specific-timings.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0009-OMAP3-SR-make-notify-independent-of-class.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0010-OMAP3-SR-disable-interrupt-by-default.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm/0012-OMAP3-SR-fix-cosmetic-indentation.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0001- > OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0002- > OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0003- > OMAP2PLUS-DSS2-Fix-Return-correct-lcd-clock-source-f.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0004- > OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0005- > OMAP-DSS2-fix-panel-Kconfig-dependencies.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0006- > OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0007- > video-add-timings-for-hd720.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0008- > drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0009- > drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0010- > Revert-omap2_mcspi-Flush-posted-writes.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011- > Revert-omap_hsmmc-improve-interrupt-synchronisation.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0012- > Don-t-turn-SDIO-cards-off-to-save-power.-Doing-so-wi.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0013- > Enable-the-use-of-SDIO-card-interrupts.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0014- > soc-codecs-Enable-audio-capture-by-default-for-twl40.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0015- > soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0016- > RTC-add-support-for-backup-battery-recharge.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0017- > ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0018- > Add-power-off-support-for-the-TWL4030-companion.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0019- > ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0020- > Enabling-Hwmon-driver-for-twl4030-madc.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0021- > mfd-twl-core-enable-madc-clock.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0022- > rtc-twl-Switch-to-using-threaded-irq.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0023- > ARM-OMAP-automatically-set-musb-mode-in-platform-dat.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0024- > omap-mmc-Adjust-dto-to-eliminate-timeout-errors.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0025- > omap-Fix-mtd-subpage-read-alignment.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0026- > mtd-nand-omap2-Force-all-buffer-reads-to-u32-alignme.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0027- > omap-nand-fix-subpage-ecc-issue-with-prefetch.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0028- > OMAP-Overo-Add-support-for-spidev.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0029- > unionfs-Add-support-for-unionfs-2.5.9.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0030- > omap-Change-omap_device-activate-latency-messages-fr.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0031- > omap-overo-Add-opp-init.patch > delete mode 100644 recipes-kernel/linux/linux-omap-2.6.39/sakoman/0032- > omap3-Add-basic-support-for-720MHz-part.patch > delete mode 100644 recipes-kernel/linux/linux-omap_2.6.39.bb > > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0001-OMAP3- > beagle-add-support-for-beagleboard-xM-revision.patch b/recipes- > kernel/linux/linux-omap-2.6.39/beagle/0001-OMAP3-beagle-add-support-for- > beagleboard-xM-revision.patch > deleted file mode 100644 > index 7522d6c..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0001-OMAP3-beagle-add- > support-for-beagleboard-xM-revision.patch > +++ /dev/null > @@ -1,117 +0,0 @@ > -From 16c1bdb30f1bcd750b29dffd2ef3003be2d30610 Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Fri, 20 May 2011 12:48:37 +0200 > -Subject: [PATCH 1/7] OMAP3: beagle: add support for beagleboard xM revision > C > - > -The USB enable GPIO has been inverted and the USER button moved. > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 34 > +++++++++++++++++++++++------- > - 1 files changed, 26 insertions(+), 8 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 2de4b02..77bafa8 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -62,7 +62,9 @@ > - * AXBX = GPIO173, GPIO172, GPIO171: 1 1 1 > - * C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0 > - * C4 = GPIO173, GPIO172, GPIO171: 1 0 1 > -- * XM = GPIO173, GPIO172, GPIO171: 0 0 0 > -+ * XMA = GPIO173, GPIO172, GPIO171: 0 0 0 > -+ * XMB = GPIO173, GPIO172, GPIO171: 0 0 1 > -+ * XMC = GPIO173, GPIO172, GPIO171: 0 1 0 > - */ > - enum { > - OMAP3BEAGLE_BOARD_UNKN = 0, > -@@ -70,6 +72,7 @@ enum { > - OMAP3BEAGLE_BOARD_C1_3, > - OMAP3BEAGLE_BOARD_C4, > - OMAP3BEAGLE_BOARD_XM, > -+ OMAP3BEAGLE_BOARD_XMC, > - }; > - > - static u8 omap3_beagle_version; > -@@ -124,9 +127,18 @@ static void __init omap3_beagle_init_rev(void) > - printk(KERN_INFO "OMAP3 Beagle Rev: xM\n"); > - omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; > - break; > -+ case 1: > -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM B\n"); > -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; > -+ break; > -+ case 2: > -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); > -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; > -+ break; > - default: > -- printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", > beagle_rev); > -- omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; > -+ printk(KERN_INFO > -+ "OMAP3 Beagle Rev: unknown %hd, assuming xM C or > newer\n", beagle_rev); > -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; > - } > - > - return; > -@@ -278,7 +290,7 @@ static int beagle_twl_gpio_setup(struct device *dev, > - { > - int r; > - > -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { > -+ if (cpu_is_omap3630()) { > - mmc[0].gpio_wp = -EINVAL; > - } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) > || > - (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { > -@@ -298,7 +310,8 @@ static int beagle_twl_gpio_setup(struct device *dev, > - /* REVISIT: need ehci-omap hooks for external VBUS > - * power switch and overcurrent detect > - */ > -- if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM) { > -+ if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM > -+ && omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XMC) > { > - r = gpio_request(gpio + 1, "EHCI_nOC"); > - if (!r) { > - r = gpio_direction_input(gpio + 1); > -@@ -320,7 +333,7 @@ static int beagle_twl_gpio_setup(struct device *dev, > - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); > - > - /* DVI reset GPIO is different between beagle revisions */ > -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) > -+ if (cpu_is_omap3630()) > - beagle_dvi_device.reset_gpio = 129; > - else > - beagle_dvi_device.reset_gpio = 170; > -@@ -334,7 +347,7 @@ static int beagle_twl_gpio_setup(struct device *dev, > - * P7/P8 revisions(prototype): Camera EN > - * A2+ revisions (production): LDO (supplies DVI, serial, led blocks) > - */ > -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { > -+ if (cpu_is_omap3630()) { > - r = gpio_request(gpio + 1, "nDVI_PWR_EN"); > - if (!r) { > - r = gpio_direction_output(gpio + 1, 0); > -@@ -625,7 +638,7 @@ static void __init beagle_opp_init(void) > - } > - > - /* Custom OPP enabled for XM */ > -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { > -+ if (cpu_is_omap3630()) { > - struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); > - struct omap_hwmod *dh = omap_hwmod_lookup("iva"); > - struct device *dev; > -@@ -665,6 +678,11 @@ static void __init omap3_beagle_init(void) > - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); > - omap3_beagle_init_rev(); > - omap3_beagle_i2c_init(); > -+ > -+ if (cpu_is_omap3630()) { > -+ gpio_buttons[0].gpio = 4; > -+ } > -+ > - platform_add_devices(omap3_beagle_devices, > - ARRAY_SIZE(omap3_beagle_devices)); > - omap_display_init(&beagle_dss_data); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0002-OMAP3- > beagle-add-support-for-expansionboards.patch b/recipes-kernel/linux/linux- > omap-2.6.39/beagle/0002-OMAP3-beagle-add-support-for- > expansionboards.patch > deleted file mode 100644 > index 2e95c76..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0002-OMAP3-beagle-add- > support-for-expansionboards.patch > +++ /dev/null > @@ -1,359 +0,0 @@ > -From 27494059a5d005b8cad4e0e8640ff031b86220dc Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Fri, 20 May 2011 13:06:24 +0200 > -Subject: [PATCH 2/7] OMAP3: beagle: add support for expansionboards > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 272 > ++++++++++++++++++++++++++++++- > - 1 files changed, 269 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 77bafa8..db285e1 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -21,6 +21,7 @@ > - #include <linux/io.h> > - #include <linux/leds.h> > - #include <linux/gpio.h> > -+#include <linux/irq.h> > - #include <linux/input.h> > - #include <linux/gpio_keys.h> > - #include <linux/opp.h> > -@@ -154,6 +155,167 @@ fail0: > - return; > - } > - > -+char expansionboard_name[16]; > -+ > -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) > -+#include <linux/regulator/fixed.h> > -+#include <linux/wl12xx.h> > -+ > -+#define OMAP_BEAGLE_WLAN_EN_GPIO (139) > -+#define OMAP_BEAGLE_BT_EN_GPIO (138) > -+#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) > -+#define OMAP_BEAGLE_FM_EN_BT_WU (136) > -+ > -+struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { > -+ .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO), > -+ .board_ref_clock = 2, /* 38.4 MHz */ > -+}; > -+ > -+static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, > OMAP_BEAGLE_FM_EN_BT_WU, -1}; > -+static struct platform_device wl12xx_device = { > -+ .name = "kim", > -+ .id = -1, > -+ .dev.platform_data = &gpios, > -+}; > -+ > -+static struct omap2_hsmmc_info mmcbbt[] = { > -+ { > -+ .mmc = 1, > -+ .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_8_BIT_DATA, > -+ .gpio_wp = 29, > -+ }, > -+ { > -+ .name = "wl1271", > -+ .mmc = 2, > -+ .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_POWER_OFF_CARD, > -+ .gpio_wp = -EINVAL, > -+ .gpio_cd = -EINVAL, > -+ .ocr_mask = MMC_VDD_165_195, > -+ .nonremovable = true, > -+ }, > -+ {} /* Terminator */ > -+ }; > -+ > -+static struct regulator_consumer_supply beagle_vmmc2_supply = > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); > -+ > -+static struct regulator_init_data beagle_vmmc2 = { > -+ .constraints = { > -+ .min_uV = 1850000, > -+ .max_uV = 1850000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+ .num_consumer_supplies = 1, > -+ .consumer_supplies = &beagle_vmmc2_supply, > -+}; > -+ > -+static struct fixed_voltage_config beagle_vwlan = { > -+ .supply_name = "vwl1271", > -+ .microvolts = 1800000, /* 1.8V */ > -+ .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, > -+ .startup_delay = 70000, /* 70ms */ > -+ .enable_high = 1, > -+ .enabled_at_boot = 0, > -+ .init_data = &beagle_vmmc2, > -+}; > -+ > -+static struct platform_device omap_vwlan_device = { > -+ .name = "reg-fixed-voltage", > -+ .id = 1, > -+ .dev = { > -+ .platform_data = &beagle_vwlan, > -+ }, > -+}; > -+#endif > -+ > -+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) > -+ > -+#include <plat/mcspi.h> > -+#include <linux/spi/spi.h> > -+ > -+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 > -+ > -+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { > -+ .turbo_mode = 0, > -+ .single_channel = 1, /* 0: slave, 1: master */ > -+}; > -+ > -+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata > = { > -+ { > -+ .modalias = "enc28j60", > -+ .bus_num = 4, > -+ .chip_select = 0, > -+ .max_speed_hz = 20000000, > -+ .controller_data = &enc28j60_spi_chip_info, > -+ }, > -+}; > -+ > -+static void __init omap3beagle_enc28j60_init(void) > -+{ > -+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, > "ENC28J60_IRQ") == 0) && > -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { > -+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); > -+ omap3beagle_zippy_spi_board_info[0].irq = > OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); > -+ irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, > IRQ_TYPE_EDGE_FALLING); > -+ } else { > -+ printk(KERN_ERR "could not obtain gpio for > ENC28J60_IRQ\n"); > -+ return; > -+ } > -+ > -+ spi_register_board_info(omap3beagle_zippy_spi_board_info, > -+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); > -+} > -+ > -+#else > -+static inline void __init omap3beagle_enc28j60_init(void) { return; } > -+#endif > -+ > -+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) > -+ > -+#include <plat/mcspi.h> > -+#include <linux/spi/spi.h> > -+ > -+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 > -+ > -+static struct omap2_mcspi_device_config ks8851_spi_chip_info = { > -+ .turbo_mode = 0, > -+ .single_channel = 1, /* 0: slave, 1: master */ > -+}; > -+ > -+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] > __initdata = { > -+ { > -+ .modalias = "ks8851", > -+ .bus_num = 4, > -+ .chip_select = 0, > -+ .max_speed_hz = 36000000, > -+ .controller_data = &ks8851_spi_chip_info, > -+ }, > -+}; > -+ > -+static void __init omap3beagle_ks8851_init(void) > -+{ > -+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") > == 0) && > -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { > -+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); > -+ omap3beagle_zippy2_spi_board_info[0].irq = > OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); > -+ irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, > IRQ_TYPE_EDGE_FALLING); > -+ } else { > -+ printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); > -+ return; > -+ } > -+ > -+ spi_register_board_info(omap3beagle_zippy2_spi_board_info, > -+ > ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); > -+} > -+ > -+#else > -+static inline void __init omap3beagle_ks8851_init(void) { return; } > -+#endif > -+ > - static struct mtd_partition omap3beagle_nand_partitions[] = { > - /* All the partition sizes are listed in terms of NAND block size */ > - { > -@@ -272,6 +434,12 @@ static struct omap2_hsmmc_info mmc[] = { > - .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_8_BIT_DATA, > - .gpio_wp = 29, > - }, > -+ { > -+ .mmc = 2, > -+ .caps = MMC_CAP_4_BIT_DATA, > -+ .transceiver = true, > -+ .ocr_mask = 0x00100000, /* 3.3V */ > -+ }, > - {} /* Terminator */ > - }; > - > -@@ -301,11 +469,25 @@ static int beagle_twl_gpio_setup(struct device > *dev, > - } > - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ > - mmc[0].gpio_cd = gpio + 0; > -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) > -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) { > -+ omap2_hsmmc_init(mmcbbt); > -+ /* link regulators to MMC adapters */ > -+ beagle_vmmc1_supply.dev = mmcbbt[0].dev; > -+ beagle_vsim_supply.dev = mmcbbt[0].dev; > -+ } else { > -+ omap2_hsmmc_init(mmc); > -+ /* link regulators to MMC adapters */ > -+ beagle_vmmc1_supply.dev = mmc[0].dev; > -+ beagle_vsim_supply.dev = mmc[0].dev; > -+ } > -+#else > - omap2_hsmmc_init(mmc); > - > - /* link regulators to MMC adapters */ > - beagle_vmmc1_supply.dev = mmc[0].dev; > - beagle_vsim_supply.dev = mmc[0].dev; > -+#endif > - > - /* REVISIT: need ehci-omap hooks for external VBUS > - * power switch and overcurrent detect > -@@ -466,7 +648,7 @@ static struct twl4030_platform_data beagle_twldata = > { > - .vpll2 = &beagle_vpll2, > - }; > - > --static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = { > -+static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = { > - { > - I2C_BOARD_INFO("twl4030", 0x48), > - .flags = I2C_CLIENT_WAKE, > -@@ -481,10 +663,24 @@ static struct i2c_board_info __initdata > beagle_i2c_eeprom[] = { > - }, > - }; > - > -+#if defined(CONFIG_RTC_DRV_DS1307) || \ > -+ defined(CONFIG_RTC_DRV_DS1307_MODULE) > -+ > -+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { > -+ { > -+ I2C_BOARD_INFO("ds1307", 0x68), > -+ }, > -+}; > -+#else > -+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {}; > -+#endif > -+ > - static int __init omap3_beagle_i2c_init(void) > - { > -- omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo, > -- ARRAY_SIZE(beagle_i2c_boardinfo)); > -+ omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo, > -+ ARRAY_SIZE(beagle_i2c1_boardinfo)); > -+ omap_register_i2c_bus(2, 400, beagle_i2c2_boardinfo, > -+ ARRAY_SIZE(beagle_i2c2_boardinfo)); > - /* Bus 3 is attached to the DVI port where devices like the pico DLP > - * projector don't work reliably with 400kHz */ > - omap_register_i2c_bus(3, 100, beagle_i2c_eeprom, > ARRAY_SIZE(beagle_i2c_eeprom)); > -@@ -627,6 +823,15 @@ static struct omap_musb_board_data > musb_board_data = { > - .power = 100, > - }; > - > -+static int __init expansionboard_setup(char *str) > -+{ > -+ if (!str) > -+ return -EINVAL; > -+ strncpy(expansionboard_name, str, 16); > -+ printk(KERN_INFO "Beagle expansionboard: %s\n", > expansionboard_name); > -+ return 0; > -+} > -+ > - static void __init beagle_opp_init(void) > - { > - int r = 0; > -@@ -693,6 +898,65 @@ static void __init omap3_beagle_init(void) > - /* REVISIT leave DVI powered down until it's needed ... */ > - gpio_direction_output(170, true); > - > -+ if(!strcmp(expansionboard_name, "zippy")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: initializing > enc28j60\n"); > -+ omap3beagle_enc28j60_init(); > -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO > 141 and 162 to MMC1\n"); > -+ mmc[1].gpio_wp = 141; > -+ mmc[1].gpio_cd = 162; > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "zippy2")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: initializing > ks_8851\n"); > -+ omap3beagle_ks8851_init(); > -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO > 141 and 162 to MMC1\n"); > -+ mmc[1].gpio_wp = 141; > -+ mmc[1].gpio_cd = 162; > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "trainer")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs > 130-141,162 to userspace\n"); > -+ gpio_request(130, "sysfs"); > -+ gpio_export(130, 1); > -+ gpio_request(131, "sysfs"); > -+ gpio_export(131, 1); > -+ gpio_request(132, "sysfs"); > -+ gpio_export(132, 1); > -+ gpio_request(133, "sysfs"); > -+ gpio_export(133, 1); > -+ gpio_request(134, "sysfs"); > -+ gpio_export(134, 1); > -+ gpio_request(135, "sysfs"); > -+ gpio_export(135, 1); > -+ gpio_request(136, "sysfs"); > -+ gpio_export(136, 1); > -+ gpio_request(137, "sysfs"); > -+ gpio_export(137, 1); > -+ gpio_request(138, "sysfs"); > -+ gpio_export(138, 1); > -+ gpio_request(139, "sysfs"); > -+ gpio_export(139, 1); > -+ gpio_request(140, "sysfs"); > -+ gpio_export(140, 1); > -+ gpio_request(141, "sysfs"); > -+ gpio_export(141, 1); > -+ gpio_request(162, "sysfs"); > -+ gpio_export(162, 1); > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) > -+ { > -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) > -+ pr_err("error setting wl12xx data\n"); > -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx > bt platform device\n"); > -+ platform_device_register(&wl12xx_device); > -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx > wifi platform device\n"); > -+ platform_device_register(&omap_vwlan_device); > -+ } > -+ > - usb_musb_init(&musb_board_data); > - usbhs_init(&usbhs_bdata); > - omap3beagle_flash_init(); > -@@ -705,6 +969,8 @@ static void __init omap3_beagle_init(void) > - beagle_opp_init(); > - } > - > -+early_param("buddy", expansionboard_setup); > -+ > - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") > - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ > - .boot_params = 0x80000100, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0003-OMAP3- > beagle-add-MADC-support.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/beagle/0003-OMAP3-beagle-add-MADC-support.patch > deleted file mode 100644 > index 79097db..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0003-OMAP3-beagle-add- > MADC-support.patch > +++ /dev/null > @@ -1,36 +0,0 @@ > -From 91e701f3287923d11dd295b6a62186909e362503 Mon Sep 17 > 00:00:00 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Sat, 21 May 2011 16:18:30 +0200 > -Subject: [PATCH 3/7] OMAP3: beagle: add MADC support > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 5 +++++ > - 1 files changed, 5 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index db285e1..da4ba50 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -634,6 +634,10 @@ static struct twl4030_codec_data > beagle_codec_data = { > - .audio = &beagle_audio_data, > - }; > - > -+static struct twl4030_madc_platform_data beagle_madc_data = { > -+ .irq_line = 1, > -+}; > -+ > - static struct twl4030_platform_data beagle_twldata = { > - .irq_base = TWL4030_IRQ_BASE, > - .irq_end = TWL4030_IRQ_END, > -@@ -642,6 +646,7 @@ static struct twl4030_platform_data beagle_twldata = > { > - .usb = &beagle_usb_data, > - .gpio = &beagle_gpio_data, > - .codec = &beagle_codec_data, > -+ .madc = &beagle_madc_data, > - .vmmc1 = &beagle_vmmc1, > - .vsim = &beagle_vsim, > - .vdac = &beagle_vdac, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0004-OMAP3- > beagle-add-regulators-for-camera-interface.patch b/recipes-kernel/linux/linux- > omap-2.6.39/beagle/0004-OMAP3-beagle-add-regulators-for-camera- > interface.patch > deleted file mode 100644 > index 29e9956..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0004-OMAP3-beagle-add- > regulators-for-camera-interface.patch > +++ /dev/null > @@ -1,88 +0,0 @@ > -From 9d7f46abab88c74e674461a2f4e9ab35b524a6ef Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Wed, 25 May 2011 08:56:06 +0200 > -Subject: [PATCH 4/7] OMAP3: beagle: add regulators for camera interface > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 50 > +++++++++++++++++++++++++++++++ > - 1 files changed, 50 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index da4ba50..211cbdf 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -453,6 +453,44 @@ static struct regulator_consumer_supply > beagle_vsim_supply = { > - > - static struct gpio_led gpio_leds[]; > - > -+static struct regulator_consumer_supply beagle_vaux3_supply = { > -+ .supply = "cam_1v8", > -+}; > -+ > -+static struct regulator_consumer_supply beagle_vaux4_supply = { > -+ .supply = "cam_2v8", > -+}; > -+ > -+/* VAUX3 for CAM_1V8 */ > -+static struct regulator_init_data beagle_vaux3 = { > -+ .constraints = { > -+ .min_uV = 1800000, > -+ .max_uV = 1800000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+ .num_consumer_supplies = 1, > -+ .consumer_supplies = &beagle_vaux3_supply, > -+}; > -+ > -+/* VAUX4 for CAM_2V8 */ > -+static struct regulator_init_data beagle_vaux4 = { > -+ .constraints = { > -+ .min_uV = 1800000, > -+ .max_uV = 1800000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+ .num_consumer_supplies = 1, > -+ .consumer_supplies = &beagle_vaux4_supply, > -+}; > -+ > - static int beagle_twl_gpio_setup(struct device *dev, > - unsigned gpio, unsigned ngpio) > - { > -@@ -504,6 +542,16 @@ static int beagle_twl_gpio_setup(struct device *dev, > - pr_err("%s: unable to configure EHCI_nOC\n", > __func__); > - } > - > -+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { > -+ /* > -+ * Power on camera interface - only on pre-production, not > -+ * needed on production boards > -+ */ > -+ gpio_request(gpio + 2, "CAM_EN"); > -+ gpio_direction_output(gpio + 2, 1); > -+ } > -+ > -+ > - /* > - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM > active > - * high / others active low) > -@@ -651,6 +699,8 @@ static struct twl4030_platform_data beagle_twldata = > { > - .vsim = &beagle_vsim, > - .vdac = &beagle_vdac, > - .vpll2 = &beagle_vpll2, > -+ .vaux3 = &beagle_vaux3, > -+ .vaux4 = &beagle_vaux4, > - }; > - > - static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = { > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0005-OMAP3- > beagle-HACK-add-in-1GHz-OPP.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/beagle/0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch > deleted file mode 100644 > index 8b65b76..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0005-OMAP3-beagle- > HACK-add-in-1GHz-OPP.patch > +++ /dev/null > @@ -1,31 +0,0 @@ > -From aa93263ed7827e33148396656b7e7ab4579509a5 Mon Sep 17 > 00:00:00 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Wed, 25 May 2011 08:57:40 +0200 > -Subject: [PATCH 5/7] OMAP3: beagle: HACK! add in 1GHz OPP > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 2 ++ > - 1 files changed, 2 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 211cbdf..221bfda 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -911,11 +911,13 @@ static void __init beagle_opp_init(void) > - /* Enable MPU 1GHz and lower opps */ > - dev = &mh->od->pdev.dev; > - r = opp_enable(dev, 800000000); > -+ r |= opp_enable(dev, 1000000000); > - /* TODO: MPU 1GHz needs SR and ABB */ > - > - /* Enable IVA 800MHz and lower opps */ > - dev = &dh->od->pdev.dev; > - r |= opp_enable(dev, 660000000); > -+ r |= opp_enable(dev, 800000000); > - /* TODO: DSP 800MHz needs SR and ABB */ > - if (r) { > - pr_err("%s: failed to enable higher opp %d\n", > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0006-OMAP3- > BEAGLE-fix-RTC.patch b/recipes-kernel/linux/linux-omap-2.6.39/beagle/0006- > OMAP3-BEAGLE-fix-RTC.patch > deleted file mode 100644 > index 76443d9..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0006-OMAP3-BEAGLE-fix- > RTC.patch > +++ /dev/null > @@ -1,27 +0,0 @@ > -From dd2c7ba245ec1b17e3d323a6c4a1cad9697dbbbe Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Wed, 15 Jun 2011 16:25:50 +0200 > -Subject: [PATCH 6/7] OMAP3: BEAGLE: fix RTC > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 3 +++ > - 1 files changed, 3 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 221bfda..61564a4 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -941,6 +941,9 @@ static void __init omap3_beagle_init(void) > - omap3_beagle_init_rev(); > - omap3_beagle_i2c_init(); > - > -+ /* Ensure msecure is mux'd to be able to set the RTC. */ > -+ omap_mux_init_signal("sys_drm_msecure", > OMAP_PIN_OFF_OUTPUT_HIGH); > -+ > - if (cpu_is_omap3630()) { > - gpio_buttons[0].gpio = 4; > - } > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap-mmc- > Adjust-dto-to-eliminate-timeout-errors.patch b/recipes-kernel/linux/linux- > omap-2.6.39/beagle/0007-omap-mmc-Adjust-dto-to-eliminate-timeout- > errors.patch > deleted file mode 100644 > index 8cd314c..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap-mmc-Adjust- > dto-to-eliminate-timeout-errors.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From bd0b2f97c48aa6aac0c6a494f1c6ba5af5de486b Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Mon, 18 Jul 2011 23:13:41 -0500 > -Subject: [PATCH] omap_hsmmc: Set dto to max value of 14 to avoid SD Card > timeouts > - > -This fixes MMC errors due to timeouts on certain SD Cards following > suggestions > -to set dto to 14 by Jason Kridner and Steven Kipisz > - > -Details of the issue: > -http://talk.maemo.org/showthread.php?p=1000707#post1000707 > - > -This fix was originally proposed by Sukumar Ghoral of TI. > ---- > - drivers/mmc/host/omap_hsmmc.c | 3 +++ > - 1 files changed, 3 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mmc/host/omap_hsmmc.c > b/drivers/mmc/host/omap_hsmmc.c > -index 9646a75..7443647 100644 > ---- a/drivers/mmc/host/omap_hsmmc.c > -+++ b/drivers/mmc/host/omap_hsmmc.c > -@@ -1049,6 +1049,9 @@ static void set_data_timeout(struct > omap_hsmmc_host *host, > - dto = 14; > - } > - > -+ /* Set dto to max value of 14 to avoid SD Card timeouts */ > -+ dto = 14; > -+ > - reg &= ~DTO_MASK; > - reg |= dto << DTO_SHIFT; > - OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); > --- > -1.7.0.4 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap3-beagle- > Use-GPTIMERi-1-for-clockevents.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/beagle/0007-omap3-beagle-Use-GPTIMERi-1-for-clockevents.patch > deleted file mode 100644 > index d5a4cf6..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagle/0007-omap3-beagle-Use- > GPTIMERi-1-for-clockevents.patch > +++ /dev/null > @@ -1,42 +0,0 @@ > -From 101b0aedf8152711847e2f9f347d267a3ac7f287 Mon Sep 17 00:00:00 > 2001 > -From: Sanjeev Premi <premi@ti.com> > -Date: Fri, 24 Jun 2011 16:23:45 +0000 > -Subject: [PATCH 7/7] omap3: beagle: Use GPTIMERi 1 for clockevents > - > -The current selection of the GPTIMER on was result of > -a hardware issue in early versions of the Beagleboards > -(Ax and B1 thru B4). [1] [2] > - > -Its been long since the hardware issue has been fixed. > -This patch uses GPTIMER 1 for all newer board revisions > -incl. Beagleboard XM. > - > - [1] http://thread.gmane.org/gmane.comp.hardware.beagleboard.general/91 > - [2] Errata #7 at http://elinux.org/BeagleBoard#Errata > - > -Signed-off-by: Sanjeev Premi <premi@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Reviewed-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 5 ++++- > - 1 files changed, 4 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 61564a4..20d5912 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -806,7 +806,10 @@ static void __init omap3_beagle_init_irq(void) > - { > - omap_init_irq(); > - #ifdef CONFIG_OMAP_32K_TIMER > -- omap2_gp_clockevent_set_gptimer(12); > -+ if (omap3_beagle_version == OMAP3BEAGLE_BOARD_AXBX) > -+ omap2_gp_clockevent_set_gptimer(12); > -+ else > -+ omap2_gp_clockevent_set_gptimer(1); > - #endif > - } > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/configs/stock > b/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/configs/stock > deleted file mode 100644 > index dd288e2..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/configs/stock > +++ /dev/null > @@ -1,3490 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux/arm 2.6.39 Kernel Configuration > -# Fri May 20 13:11:13 2011 > -# > -CONFIG_ARM=y > -CONFIG_HAVE_PWM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_HAVE_SCHED_CLOCK=y > -CONFIG_GENERIC_GPIO=y > -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_KTIME_SCALAR=y > -CONFIG_HAVE_PROC_CPU=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_NEED_DMA_MAP_STATE=y > -CONFIG_VECTORS_BASE=0xffff0000 > -# CONFIG_ARM_PATCH_PHYS_VIRT is not set > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > -CONFIG_HAVE_IRQ_WORK=y > -CONFIG_IRQ_WORK=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_CROSS_COMPILE="" > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZMA=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -# CONFIG_POSIX_MQUEUE is not set > -CONFIG_BSD_PROCESS_ACCT=y > -# CONFIG_BSD_PROCESS_ACCT_V3 is not set > -CONFIG_FHANDLE=y > -CONFIG_TASKSTATS=y > -CONFIG_TASK_DELAY_ACCT=y > -CONFIG_TASK_XACCT=y > -CONFIG_TASK_IO_ACCOUNTING=y > -# CONFIG_AUDIT is not set > -CONFIG_HAVE_GENERIC_HARDIRQS=y > - > -# > -# IRQ subsystem > -# > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_HAVE_SPARSE_IRQ=y > -CONFIG_GENERIC_IRQ_SHOW=y > -# CONFIG_SPARSE_IRQ is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_PREEMPT_RCU=y > -# CONFIG_TINY_RCU is not set > -# CONFIG_TINY_PREEMPT_RCU is not set > -CONFIG_PREEMPT_RCU=y > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=16 > -CONFIG_CGROUPS=y > -# CONFIG_CGROUP_DEBUG is not set > -CONFIG_CGROUP_NS=y > -CONFIG_CGROUP_FREEZER=y > -CONFIG_CGROUP_DEVICE=y > -CONFIG_CPUSETS=y > -CONFIG_PROC_PID_CPUSET=y > -CONFIG_CGROUP_CPUACCT=y > -CONFIG_RESOURCE_COUNTERS=y > -CONFIG_CGROUP_MEM_RES_CTLR=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y > -CONFIG_CGROUP_PERF=y > -CONFIG_CGROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -CONFIG_RT_GROUP_SCHED=y > -# CONFIG_BLK_CGROUP is not set > -# CONFIG_NAMESPACES is not set > -CONFIG_SCHED_AUTOGROUP=y > -CONFIG_MM_OWNER=y > -# CONFIG_SYSFS_DEPRECATED is not set > -# CONFIG_RELAY is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -# CONFIG_RD_BZIP2 is not set > -# CONFIG_RD_LZMA is not set > -CONFIG_RD_XZ=y > -CONFIG_RD_LZO=y > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EXPERT=y > -CONFIG_UID16=y > -# CONFIG_SYSCTL_SYSCALL is not set > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_ALL is not set > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > -CONFIG_EMBEDDED=y > -CONFIG_HAVE_PERF_EVENTS=y > -CONFIG_PERF_USE_VMALLOC=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_PERF_EVENTS=y > -# CONFIG_PERF_COUNTERS is not set > -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set > -CONFIG_VM_EVENT_COUNTERS=y > -# CONFIG_COMPAT_BRK is not set > -CONFIG_SLAB=y > -# CONFIG_SLUB is not set > -# CONFIG_SLOB is not set > -CONFIG_PROFILING=y > -CONFIG_OPROFILE=y > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y > -CONFIG_HAVE_CLK=y > -CONFIG_HAVE_DMA_API_DEBUG=y > -CONFIG_HAVE_HW_BREAKPOINT=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -CONFIG_MODULE_FORCE_LOAD=y > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -CONFIG_MODULE_SRCVERSION_ALL=y > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -CONFIG_BLK_DEV_BSG=y > -# CONFIG_BLK_DEV_INTEGRITY is not set > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -CONFIG_IOSCHED_DEADLINE=y > -CONFIG_IOSCHED_CFQ=y > -# CONFIG_DEFAULT_DEADLINE is not set > -CONFIG_DEFAULT_CFQ=y > -# CONFIG_DEFAULT_NOOP is not set > -CONFIG_DEFAULT_IOSCHED="cfq" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_VEXPRESS is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_CNS3XXX is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_MXS is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_LPC32XX is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_NUC93X is not set > -# CONFIG_ARCH_TEGRA is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_SHMOBILE is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5P64X0 is not set > -# CONFIG_ARCH_S5P6442 is not set > -# CONFIG_ARCH_S5PC100 is not set > -# CONFIG_ARCH_S5PV210 is not set > -# CONFIG_ARCH_EXYNOS4 is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_TCC_926 is not set > -# CONFIG_ARCH_U300 is not set > -# CONFIG_ARCH_U8500 is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_DAVINCI is not set > -CONFIG_ARCH_OMAP=y > -# CONFIG_PLAT_SPEAR is not set > -# CONFIG_ARCH_VT8500 is not set > -# CONFIG_GPIO_PCA953X is not set > -# CONFIG_KEYBOARD_GPIO_POLLED is not set > - > -# > -# TI OMAP Common Features > -# > -CONFIG_ARCH_OMAP_OTG=y > -# CONFIG_ARCH_OMAP1 is not set > -CONFIG_ARCH_OMAP2PLUS=y > - > -# > -# OMAP Feature Selections > -# > -CONFIG_OMAP_SMARTREFLEX=y > -CONFIG_OMAP_SMARTREFLEX_CLASS3=y > -CONFIG_OMAP_RESET_CLOCKS=y > -# CONFIG_OMAP_MUX is not set > -CONFIG_OMAP_MCBSP=y > -CONFIG_OMAP_MBOX_FWK=m > -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 > -CONFIG_OMAP_IOMMU=y > -CONFIG_OMAP_IOMMU_DEBUG=m > -CONFIG_OMAP_32K_TIMER=y > -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set > -CONFIG_OMAP_32K_TIMER_HZ=128 > -CONFIG_OMAP_DM_TIMER=y > -# CONFIG_OMAP_PM_NONE is not set > -CONFIG_OMAP_PM_NOOP=y > - > -# > -# TI OMAP2/3/4 Specific Features > -# > -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y > -# CONFIG_ARCH_OMAP2 is not set > -CONFIG_ARCH_OMAP3=y > -# CONFIG_ARCH_OMAP4 is not set > -CONFIG_SOC_OMAP3430=y > -# CONFIG_SOC_OMAPTI816X is not set > -CONFIG_OMAP_PACKAGE_CBB=y > - > -# > -# OMAP Board Type > -# > -CONFIG_MACH_OMAP3_BEAGLE=y > -# CONFIG_MACH_DEVKIT8000 is not set > -# CONFIG_MACH_OMAP_LDP is not set > -# CONFIG_MACH_OMAP3530_LV_SOM is not set > -# CONFIG_MACH_OMAP3_TORPEDO is not set > -CONFIG_MACH_OVERO=y > -CONFIG_MACH_OMAP3EVM=y > -# CONFIG_MACH_OMAP3517EVM is not set > -# CONFIG_MACH_CRANEBOARD is not set > -# CONFIG_MACH_OMAP3_PANDORA is not set > -CONFIG_MACH_OMAP3_TOUCHBOOK=y > -# CONFIG_MACH_OMAP_3430SDP is not set > -# CONFIG_MACH_NOKIA_RM680 is not set > -# CONFIG_MACH_NOKIA_RX51 is not set > -CONFIG_MACH_OMAP_ZOOM2=y > -# CONFIG_MACH_OMAP_ZOOM3 is not set > -# CONFIG_MACH_CM_T35 is not set > -# CONFIG_MACH_CM_T3517 is not set > -# CONFIG_MACH_IGEP0020 is not set > -# CONFIG_MACH_IGEP0030 is not set > -# CONFIG_MACH_SBC3530 is not set > -# CONFIG_MACH_OMAP_3630SDP is not set > -# CONFIG_OMAP3_EMU is not set > -# CONFIG_OMAP3_SDRC_AC_TIMING is not set > - > -# > -# System MMU > -# > - > -# > -# Processor Type > -# > -CONFIG_CPU_V7=y > -CONFIG_CPU_32v6K=y > -CONFIG_CPU_32v7=y > -CONFIG_CPU_ABRT_EV7=y > -CONFIG_CPU_PABRT_V7=y > -CONFIG_CPU_CACHE_V7=y > -CONFIG_CPU_CACHE_VIPT=y > -CONFIG_CPU_COPY_V6=y > -CONFIG_CPU_TLB_V7=y > -CONFIG_CPU_HAS_ASID=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -CONFIG_ARM_THUMBEE=y > -# CONFIG_SWP_EMULATE is not set > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_BPREDICT_DISABLE is not set > -CONFIG_ARM_L1_CACHE_SHIFT_6=y > -CONFIG_ARM_L1_CACHE_SHIFT=6 > -CONFIG_ARM_DMA_MEM_BUFFERABLE=y > -CONFIG_ARM_ERRATA_430973=y > -# CONFIG_ARM_ERRATA_458693 is not set > -# CONFIG_ARM_ERRATA_460075 is not set > -# CONFIG_ARM_ERRATA_743622 is not set > -# CONFIG_ARM_ERRATA_754322 is not set > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=128 > -# CONFIG_THUMB2_KERNEL is not set > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_HAVE_MEMBLOCK=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=4 > -CONFIG_COMPACTION=y > -CONFIG_MIGRATION=y > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=0 > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_NEED_PER_CPU_KM=y > -CONFIG_FORCE_MAX_ZONEORDER=11 > -CONFIG_LEDS=y > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > -# CONFIG_SECCOMP is not set > -# CONFIG_CC_STACKPROTECTOR is not set > -# CONFIG_DEPRECATED_PARAM_STRUCT is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE=" debug " > -# CONFIG_CMDLINE_FORCE is not set > -# CONFIG_XIP_KERNEL is not set > -CONFIG_KEXEC=y > -CONFIG_ATAGS_PROC=y > -# CONFIG_CRASH_DUMP is not set > -# CONFIG_AUTO_ZRELADDR is not set > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -CONFIG_CPU_FREQ_DEBUG=y > -CONFIG_CPU_FREQ_STAT=y > -CONFIG_CPU_FREQ_STAT_DETAILS=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -CONFIG_VFP=y > -CONFIG_VFPv3=y > -CONFIG_NEON=y > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -CONFIG_BINFMT_AOUT=m > -CONFIG_BINFMT_MISC=y > - > -# > -# Power management options > -# > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -CONFIG_PM_SLEEP=y > -CONFIG_PM_RUNTIME=y > -CONFIG_PM=y > -CONFIG_PM_DEBUG=y > -# CONFIG_PM_VERBOSE is not set > -# CONFIG_PM_ADVANCED_DEBUG is not set > -# CONFIG_PM_TEST_SUSPEND is not set > -CONFIG_CAN_PM_TRACE=y > -# CONFIG_APM_EMULATION is not set > -CONFIG_ARCH_HAS_OPP=y > -CONFIG_PM_OPP=y > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -CONFIG_XFRM_IPCOMP=m > -CONFIG_NET_KEY=y > -# CONFIG_NET_KEY_MIGRATE is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_ROUTE_CLASSID=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -CONFIG_IP_PNP_BOOTP=y > -CONFIG_IP_PNP_RARP=y > -CONFIG_NET_IPIP=m > -CONFIG_NET_IPGRE_DEMUX=m > -CONFIG_NET_IPGRE=m > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -CONFIG_INET_AH=m > -CONFIG_INET_ESP=m > -CONFIG_INET_IPCOMP=m > -CONFIG_INET_XFRM_TUNNEL=m > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -CONFIG_INET_LRO=y > -CONFIG_INET_DIAG=m > -CONFIG_INET_TCP_DIAG=m > -CONFIG_TCP_CONG_ADVANCED=y > -CONFIG_TCP_CONG_BIC=m > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_TCP_CONG_WESTWOOD=m > -CONFIG_TCP_CONG_HTCP=m > -CONFIG_TCP_CONG_HSTCP=m > -CONFIG_TCP_CONG_HYBLA=m > -CONFIG_TCP_CONG_VEGAS=m > -CONFIG_TCP_CONG_SCALABLE=m > -CONFIG_TCP_CONG_LP=m > -CONFIG_TCP_CONG_VENO=m > -CONFIG_TCP_CONG_YEAH=m > -CONFIG_TCP_CONG_ILLINOIS=m > -CONFIG_DEFAULT_CUBIC=y > -# CONFIG_DEFAULT_RENO is not set > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -CONFIG_INET6_AH=m > -CONFIG_INET6_ESP=m > -CONFIG_INET6_IPCOMP=m > -CONFIG_IPV6_MIP6=m > -CONFIG_INET6_XFRM_TUNNEL=m > -CONFIG_INET6_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -CONFIG_IPV6_TUNNEL=m > -CONFIG_IPV6_MULTIPLE_TABLES=y > -CONFIG_IPV6_SUBTREES=y > -CONFIG_IPV6_MROUTE=y > -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y > -# CONFIG_IPV6_PIMSM_V2 is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETWORK_PHY_TIMESTAMPING=y > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > -CONFIG_BRIDGE_NETFILTER=y > - > -# > -# Core Netfilter Configuration > -# > -CONFIG_NETFILTER_NETLINK=m > -CONFIG_NETFILTER_NETLINK_QUEUE=m > -CONFIG_NETFILTER_NETLINK_LOG=m > -CONFIG_NF_CONNTRACK=m > -CONFIG_NF_CONNTRACK_MARK=y > -CONFIG_NF_CONNTRACK_ZONES=y > -CONFIG_NF_CONNTRACK_EVENTS=y > -CONFIG_NF_CONNTRACK_TIMESTAMP=y > -CONFIG_NF_CT_PROTO_DCCP=m > -CONFIG_NF_CT_PROTO_GRE=m > -CONFIG_NF_CT_PROTO_SCTP=m > -CONFIG_NF_CT_PROTO_UDPLITE=m > -CONFIG_NF_CONNTRACK_AMANDA=m > -CONFIG_NF_CONNTRACK_FTP=m > -CONFIG_NF_CONNTRACK_H323=m > -CONFIG_NF_CONNTRACK_IRC=m > -CONFIG_NF_CONNTRACK_BROADCAST=m > -CONFIG_NF_CONNTRACK_NETBIOS_NS=m > -CONFIG_NF_CONNTRACK_SNMP=m > -CONFIG_NF_CONNTRACK_PPTP=m > -CONFIG_NF_CONNTRACK_SANE=m > -CONFIG_NF_CONNTRACK_SIP=m > -CONFIG_NF_CONNTRACK_TFTP=m > -CONFIG_NF_CT_NETLINK=m > -# CONFIG_NETFILTER_TPROXY is not set > -CONFIG_NETFILTER_XTABLES=m > - > -# > -# Xtables combined modules > -# > -CONFIG_NETFILTER_XT_MARK=m > -CONFIG_NETFILTER_XT_CONNMARK=m > -CONFIG_NETFILTER_XT_SET=m > - > -# > -# Xtables targets > -# > -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m > -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m > -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m > -CONFIG_NETFILTER_XT_TARGET_CT=m > -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set > -CONFIG_NETFILTER_XT_TARGET_HL=m > -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m > -# CONFIG_NETFILTER_XT_TARGET_LED is not set > -CONFIG_NETFILTER_XT_TARGET_MARK=m > -CONFIG_NETFILTER_XT_TARGET_NFLOG=m > -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m > -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set > -CONFIG_NETFILTER_XT_TARGET_RATEEST=m > -CONFIG_NETFILTER_XT_TARGET_TEE=m > -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set > -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m > -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set > - > -# > -# Xtables matches > -# > -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m > -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set > -CONFIG_NETFILTER_XT_MATCH_COMMENT=m > -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m > -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m > -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m > -CONFIG_NETFILTER_XT_MATCH_CPU=m > -CONFIG_NETFILTER_XT_MATCH_DCCP=m > -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m > -CONFIG_NETFILTER_XT_MATCH_DSCP=m > -CONFIG_NETFILTER_XT_MATCH_ESP=m > -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_HELPER=m > -CONFIG_NETFILTER_XT_MATCH_HL=m > -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m > -CONFIG_NETFILTER_XT_MATCH_IPVS=m > -CONFIG_NETFILTER_XT_MATCH_LENGTH=m > -CONFIG_NETFILTER_XT_MATCH_LIMIT=m > -CONFIG_NETFILTER_XT_MATCH_MAC=m > -CONFIG_NETFILTER_XT_MATCH_MARK=m > -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m > -# CONFIG_NETFILTER_XT_MATCH_OSF is not set > -CONFIG_NETFILTER_XT_MATCH_OWNER=m > -CONFIG_NETFILTER_XT_MATCH_POLICY=m > -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set > -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m > -CONFIG_NETFILTER_XT_MATCH_QUOTA=m > -CONFIG_NETFILTER_XT_MATCH_RATEEST=m > -CONFIG_NETFILTER_XT_MATCH_REALM=m > -CONFIG_NETFILTER_XT_MATCH_RECENT=m > -CONFIG_NETFILTER_XT_MATCH_SCTP=m > -CONFIG_NETFILTER_XT_MATCH_STATE=m > -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m > -CONFIG_NETFILTER_XT_MATCH_STRING=m > -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m > -CONFIG_NETFILTER_XT_MATCH_TIME=m > -CONFIG_NETFILTER_XT_MATCH_U32=m > -CONFIG_IP_SET=m > -CONFIG_IP_SET_MAX=256 > -# CONFIG_IP_SET_BITMAP_IP is not set > -# CONFIG_IP_SET_BITMAP_IPMAC is not set > -# CONFIG_IP_SET_BITMAP_PORT is not set > -# CONFIG_IP_SET_HASH_IP is not set > -# CONFIG_IP_SET_HASH_IPPORT is not set > -# CONFIG_IP_SET_HASH_IPPORTIP is not set > -# CONFIG_IP_SET_HASH_IPPORTNET is not set > -# CONFIG_IP_SET_HASH_NET is not set > -# CONFIG_IP_SET_HASH_NETPORT is not set > -# CONFIG_IP_SET_LIST_SET is not set > -CONFIG_IP_VS=m > -CONFIG_IP_VS_IPV6=y > -CONFIG_IP_VS_DEBUG=y > -CONFIG_IP_VS_TAB_BITS=12 > - > -# > -# IPVS transport protocol load balancing support > -# > -CONFIG_IP_VS_PROTO_TCP=y > -CONFIG_IP_VS_PROTO_UDP=y > -CONFIG_IP_VS_PROTO_AH_ESP=y > -CONFIG_IP_VS_PROTO_ESP=y > -CONFIG_IP_VS_PROTO_AH=y > -# CONFIG_IP_VS_PROTO_SCTP is not set > - > -# > -# IPVS scheduler > -# > -CONFIG_IP_VS_RR=m > -CONFIG_IP_VS_WRR=m > -CONFIG_IP_VS_LC=m > -CONFIG_IP_VS_WLC=m > -CONFIG_IP_VS_LBLC=m > -CONFIG_IP_VS_LBLCR=m > -CONFIG_IP_VS_DH=m > -CONFIG_IP_VS_SH=m > -CONFIG_IP_VS_SED=m > -CONFIG_IP_VS_NQ=m > - > -# > -# IPVS application helper > -# > -CONFIG_IP_VS_FTP=m > -CONFIG_IP_VS_NFCT=y > -CONFIG_IP_VS_PE_SIP=m > - > -# > -# IP: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV4=m > -CONFIG_NF_CONNTRACK_IPV4=m > -CONFIG_NF_CONNTRACK_PROC_COMPAT=y > -CONFIG_IP_NF_QUEUE=m > -CONFIG_IP_NF_IPTABLES=m > -CONFIG_IP_NF_MATCH_AH=m > -CONFIG_IP_NF_MATCH_ECN=m > -CONFIG_IP_NF_MATCH_TTL=m > -CONFIG_IP_NF_FILTER=m > -CONFIG_IP_NF_TARGET_REJECT=m > -CONFIG_IP_NF_TARGET_LOG=m > -CONFIG_IP_NF_TARGET_ULOG=m > -CONFIG_NF_NAT=m > -CONFIG_NF_NAT_NEEDED=y > -CONFIG_IP_NF_TARGET_MASQUERADE=m > -CONFIG_IP_NF_TARGET_NETMAP=m > -CONFIG_IP_NF_TARGET_REDIRECT=m > -CONFIG_NF_NAT_SNMP_BASIC=m > -CONFIG_NF_NAT_PROTO_DCCP=m > -CONFIG_NF_NAT_PROTO_GRE=m > -CONFIG_NF_NAT_PROTO_UDPLITE=m > -CONFIG_NF_NAT_PROTO_SCTP=m > -CONFIG_NF_NAT_FTP=m > -CONFIG_NF_NAT_IRC=m > -CONFIG_NF_NAT_TFTP=m > -CONFIG_NF_NAT_AMANDA=m > -CONFIG_NF_NAT_PPTP=m > -CONFIG_NF_NAT_H323=m > -CONFIG_NF_NAT_SIP=m > -CONFIG_IP_NF_MANGLE=m > -CONFIG_IP_NF_TARGET_CLUSTERIP=m > -CONFIG_IP_NF_TARGET_ECN=m > -CONFIG_IP_NF_TARGET_TTL=m > -CONFIG_IP_NF_RAW=m > -CONFIG_IP_NF_ARPTABLES=m > -CONFIG_IP_NF_ARPFILTER=m > -CONFIG_IP_NF_ARP_MANGLE=m > - > -# > -# IPv6: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV6=m > -CONFIG_NF_CONNTRACK_IPV6=m > -CONFIG_IP6_NF_QUEUE=m > -CONFIG_IP6_NF_IPTABLES=m > -CONFIG_IP6_NF_MATCH_AH=m > -CONFIG_IP6_NF_MATCH_EUI64=m > -CONFIG_IP6_NF_MATCH_FRAG=m > -CONFIG_IP6_NF_MATCH_OPTS=m > -CONFIG_IP6_NF_MATCH_HL=m > -CONFIG_IP6_NF_MATCH_IPV6HEADER=m > -CONFIG_IP6_NF_MATCH_MH=m > -CONFIG_IP6_NF_MATCH_RT=m > -CONFIG_IP6_NF_TARGET_HL=m > -CONFIG_IP6_NF_TARGET_LOG=m > -CONFIG_IP6_NF_FILTER=m > -CONFIG_IP6_NF_TARGET_REJECT=m > -CONFIG_IP6_NF_MANGLE=m > -CONFIG_IP6_NF_RAW=m > -# CONFIG_BRIDGE_NF_EBTABLES is not set > -CONFIG_IP_DCCP=m > -CONFIG_INET_DCCP_DIAG=m > - > -# > -# DCCP CCIDs Configuration (EXPERIMENTAL) > -# > -# CONFIG_IP_DCCP_CCID2_DEBUG is not set > -CONFIG_IP_DCCP_CCID3=y > -# CONFIG_IP_DCCP_CCID3_DEBUG is not set > -CONFIG_IP_DCCP_TFRC_LIB=y > - > -# > -# DCCP Kernel Hacking > -# > -# CONFIG_IP_DCCP_DEBUG is not set > -CONFIG_IP_SCTP=m > -# CONFIG_SCTP_DBG_MSG is not set > -# CONFIG_SCTP_DBG_OBJCNT is not set > -# CONFIG_SCTP_HMAC_NONE is not set > -# CONFIG_SCTP_HMAC_SHA1 is not set > -CONFIG_SCTP_HMAC_MD5=y > -# CONFIG_RDS is not set > -CONFIG_TIPC=m > -# CONFIG_TIPC_ADVANCED is not set > -# CONFIG_TIPC_DEBUG is not set > -CONFIG_ATM=m > -CONFIG_ATM_CLIP=m > -# CONFIG_ATM_CLIP_NO_ICMP is not set > -CONFIG_ATM_LANE=m > -CONFIG_ATM_MPOA=m > -CONFIG_ATM_BR2684=m > -# CONFIG_ATM_BR2684_IPFILTER is not set > -CONFIG_L2TP=m > -CONFIG_L2TP_DEBUGFS=m > -CONFIG_L2TP_V3=y > -CONFIG_L2TP_IP=m > -CONFIG_L2TP_ETH=m > -CONFIG_STP=m > -CONFIG_GARP=m > -CONFIG_BRIDGE=m > -CONFIG_BRIDGE_IGMP_SNOOPING=y > -# CONFIG_NET_DSA is not set > -CONFIG_VLAN_8021Q=m > -CONFIG_VLAN_8021Q_GVRP=y > -# CONFIG_DECNET is not set > -CONFIG_LLC=m > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -CONFIG_WAN_ROUTER=m > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -CONFIG_NET_SCHED=y > - > -# > -# Queueing/Scheduling > -# > -CONFIG_NET_SCH_CBQ=m > -CONFIG_NET_SCH_HTB=m > -CONFIG_NET_SCH_HFSC=m > -CONFIG_NET_SCH_ATM=m > -CONFIG_NET_SCH_PRIO=m > -CONFIG_NET_SCH_MULTIQ=m > -CONFIG_NET_SCH_RED=m > -# CONFIG_NET_SCH_SFB is not set > -CONFIG_NET_SCH_SFQ=m > -CONFIG_NET_SCH_TEQL=m > -CONFIG_NET_SCH_TBF=m > -CONFIG_NET_SCH_GRED=m > -CONFIG_NET_SCH_DSMARK=m > -CONFIG_NET_SCH_NETEM=m > -CONFIG_NET_SCH_DRR=m > -CONFIG_NET_SCH_MQPRIO=m > -CONFIG_NET_SCH_CHOKE=m > - > -# > -# Classification > -# > -CONFIG_NET_CLS=y > -CONFIG_NET_CLS_BASIC=m > -CONFIG_NET_CLS_TCINDEX=m > -CONFIG_NET_CLS_ROUTE4=m > -CONFIG_NET_CLS_FW=m > -CONFIG_NET_CLS_U32=m > -CONFIG_CLS_U32_PERF=y > -CONFIG_CLS_U32_MARK=y > -CONFIG_NET_CLS_RSVP=m > -CONFIG_NET_CLS_RSVP6=m > -CONFIG_NET_CLS_FLOW=m > -CONFIG_NET_CLS_CGROUP=m > -# CONFIG_NET_EMATCH is not set > -# CONFIG_NET_CLS_ACT is not set > -CONFIG_NET_CLS_IND=y > -CONFIG_NET_SCH_FIFO=y > -# CONFIG_DCB is not set > -CONFIG_DNS_RESOLVER=y > -# CONFIG_BATMAN_ADV is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -CONFIG_CAN=m > -CONFIG_CAN_RAW=m > -CONFIG_CAN_BCM=m > - > -# > -# CAN Device Drivers > -# > -CONFIG_CAN_VCAN=m > -CONFIG_CAN_SLCAN=m > -# CONFIG_CAN_DEV is not set > -# CONFIG_CAN_DEBUG_DEVICES is not set > -CONFIG_IRDA=m > - > -# > -# IrDA protocols > -# > -CONFIG_IRLAN=m > -CONFIG_IRNET=m > -CONFIG_IRCOMM=m > -CONFIG_IRDA_ULTRA=y > - > -# > -# IrDA options > -# > -CONFIG_IRDA_CACHE_LAST_LSAP=y > -CONFIG_IRDA_FAST_RR=y > -CONFIG_IRDA_DEBUG=y > - > -# > -# Infrared-port device drivers > -# > - > -# > -# SIR device drivers > -# > -CONFIG_IRTTY_SIR=m > - > -# > -# Dongle support > -# > -CONFIG_DONGLE=y > -CONFIG_ESI_DONGLE=m > -CONFIG_ACTISYS_DONGLE=m > -CONFIG_TEKRAM_DONGLE=m > -CONFIG_TOIM3232_DONGLE=m > -CONFIG_LITELINK_DONGLE=m > -CONFIG_MA600_DONGLE=m > -CONFIG_GIRBIL_DONGLE=m > -CONFIG_MCP2120_DONGLE=m > -CONFIG_OLD_BELKIN_DONGLE=m > -# CONFIG_ACT200L_DONGLE is not set > -CONFIG_KINGSUN_DONGLE=m > -CONFIG_KSDAZZLE_DONGLE=m > -CONFIG_KS959_DONGLE=m > - > -# > -# FIR device drivers > -# > -CONFIG_USB_IRDA=m > -CONFIG_SIGMATEL_FIR=m > -CONFIG_MCS_FIR=m > -CONFIG_BT=m > -CONFIG_BT_L2CAP=y > -CONFIG_BT_SCO=y > -CONFIG_BT_RFCOMM=m > -CONFIG_BT_RFCOMM_TTY=y > -CONFIG_BT_BNEP=m > -CONFIG_BT_BNEP_MC_FILTER=y > -CONFIG_BT_BNEP_PROTO_FILTER=y > -CONFIG_BT_HIDP=m > - > -# > -# Bluetooth device drivers > -# > -CONFIG_BT_HCIBTUSB=m > -CONFIG_BT_HCIBTSDIO=m > -CONFIG_BT_HCIUART=m > -CONFIG_BT_HCIUART_H4=y > -CONFIG_BT_HCIUART_BCSP=y > -CONFIG_BT_HCIUART_ATH3K=y > -CONFIG_BT_HCIUART_LL=y > -CONFIG_BT_HCIBCM203X=m > -CONFIG_BT_HCIBPA10X=m > -CONFIG_BT_HCIBFUSB=m > -# CONFIG_BT_HCIVHCI is not set > -# CONFIG_BT_MRVL is not set > -CONFIG_BT_ATH3K=m > -CONFIG_BT_WILINK=m > -CONFIG_AF_RXRPC=m > -# CONFIG_AF_RXRPC_DEBUG is not set > -# CONFIG_RXKAD is not set > -CONFIG_FIB_RULES=y > -CONFIG_WIRELESS=y > -CONFIG_WIRELESS_EXT=y > -CONFIG_WEXT_CORE=y > -CONFIG_WEXT_PROC=y > -CONFIG_WEXT_SPY=y > -CONFIG_WEXT_PRIV=y > -CONFIG_CFG80211=m > -CONFIG_NL80211_TESTMODE=y > -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set > -# CONFIG_CFG80211_REG_DEBUG is not set > -CONFIG_CFG80211_DEFAULT_PS=y > -# CONFIG_CFG80211_DEBUGFS is not set > -# CONFIG_CFG80211_INTERNAL_REGDB is not set > -CONFIG_CFG80211_WEXT=y > -CONFIG_WIRELESS_EXT_SYSFS=y > -CONFIG_LIB80211=y > -CONFIG_LIB80211_CRYPT_WEP=m > -CONFIG_LIB80211_CRYPT_CCMP=m > -CONFIG_LIB80211_CRYPT_TKIP=m > -# CONFIG_LIB80211_DEBUG is not set > -CONFIG_MAC80211=m > -CONFIG_MAC80211_HAS_RC=y > -CONFIG_MAC80211_RC_PID=y > -# CONFIG_MAC80211_RC_MINSTREL is not set > -CONFIG_MAC80211_RC_DEFAULT_PID=y > -CONFIG_MAC80211_RC_DEFAULT="pid" > -# CONFIG_MAC80211_MESH is not set > -CONFIG_MAC80211_LEDS=y > -# CONFIG_MAC80211_DEBUGFS is not set > -# CONFIG_MAC80211_DEBUG_MENU is not set > -CONFIG_WIMAX=m > -CONFIG_WIMAX_DEBUG_LEVEL=8 > -CONFIG_RFKILL=m > -CONFIG_RFKILL_LEDS=y > -CONFIG_RFKILL_INPUT=y > -CONFIG_NET_9P=m > -# CONFIG_NET_9P_DEBUG is not set > -# CONFIG_CAIF is not set > -CONFIG_CEPH_LIB=m > -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="" > -CONFIG_DEVTMPFS=y > -CONFIG_DEVTMPFS_MOUNT=y > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -CONFIG_FW_LOADER=y > -CONFIG_FIRMWARE_IN_KERNEL=y > -CONFIG_EXTRA_FIRMWARE="" > -# CONFIG_DEBUG_DRIVER is not set > -# CONFIG_DEBUG_DEVRES is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -CONFIG_SM_FTL=m > -# CONFIG_MTD_OOPS is not set > -CONFIG_MTD_SWAP=m > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -# CONFIG_MTD_M25P80 is not set > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -CONFIG_MTD_NAND_ECC=y > -# CONFIG_MTD_NAND_ECC_SMC is not set > -CONFIG_MTD_NAND=y > -# CONFIG_MTD_NAND_VERIFY_WRITE is not set > -# CONFIG_MTD_NAND_ECC_BCH is not set > -# CONFIG_MTD_SM_COMMON is not set > -# CONFIG_MTD_NAND_MUSEUM_IDS is not set > -# CONFIG_MTD_NAND_GPIO is not set > -CONFIG_MTD_NAND_OMAP2=y > -CONFIG_MTD_NAND_IDS=y > -# CONFIG_MTD_NAND_DISKONCHIP is not set > -# CONFIG_MTD_NAND_NANDSIM is not set > -CONFIG_MTD_NAND_PLATFORM=y > -# CONFIG_MTD_ALAUDA is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > -CONFIG_MTD_UBI=y > -CONFIG_MTD_UBI_WL_THRESHOLD=4096 > -CONFIG_MTD_UBI_BEB_RESERVE=1 > -# CONFIG_MTD_UBI_GLUEBI is not set > -# CONFIG_MTD_UBI_DEBUG is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=y > -CONFIG_BLK_DEV_CRYPTOLOOP=m > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=16 > -CONFIG_BLK_DEV_RAM_SIZE=16384 > -# CONFIG_BLK_DEV_XIP is not set > -CONFIG_CDROM_PKTCDVD=m > -CONFIG_CDROM_PKTCDVD_BUFFERS=8 > -# CONFIG_CDROM_PKTCDVD_WCACHE is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -# CONFIG_BLK_DEV_RBD is not set > -# CONFIG_SENSORS_LIS3LV02D is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_APDS9802ALS is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_ISL29020 is not set > -# CONFIG_SENSORS_TSL2550 is not set > -CONFIG_SENSORS_BH1780=m > -# CONFIG_SENSORS_BH1770 is not set > -# CONFIG_SENSORS_APDS990X is not set > -CONFIG_HMC6352=m > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -CONFIG_BMP085=m > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=m > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -CONFIG_EEPROM_93CX6=y > -CONFIG_IWMC3200TOP=m > -# CONFIG_IWMC3200TOP_DEBUG is not set > -# CONFIG_IWMC3200TOP_DEBUGFS is not set > - > -# > -# Texas Instruments shared transport line discipline > -# > -CONFIG_TI_ST=m > -# CONFIG_SENSORS_LIS3_SPI is not set > -# CONFIG_SENSORS_LIS3_I2C is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -CONFIG_SCSI_MOD=y > -CONFIG_RAID_ATTRS=m > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -CONFIG_BLK_DEV_SR=y > -CONFIG_BLK_DEV_SR_VENDOR=y > -CONFIG_CHR_DEV_SG=y > -CONFIG_CHR_DEV_SCH=m > -CONFIG_SCSI_MULTI_LUN=y > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -CONFIG_SCSI_ISCSI_ATTRS=m > -# CONFIG_SCSI_SAS_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -CONFIG_ISCSI_TCP=m > -CONFIG_ISCSI_BOOT_SYSFS=m > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -# CONFIG_ATA is not set > -CONFIG_MD=y > -CONFIG_BLK_DEV_MD=m > -CONFIG_MD_LINEAR=m > -CONFIG_MD_RAID0=m > -CONFIG_MD_RAID1=m > -CONFIG_MD_RAID10=m > -CONFIG_MD_RAID456=m > -CONFIG_MD_MULTIPATH=m > -CONFIG_MD_FAULTY=m > -CONFIG_BLK_DEV_DM=m > -# CONFIG_DM_DEBUG is not set > -CONFIG_DM_CRYPT=m > -CONFIG_DM_SNAPSHOT=m > -CONFIG_DM_MIRROR=m > -CONFIG_DM_RAID=m > -# CONFIG_DM_LOG_USERSPACE is not set > -CONFIG_DM_ZERO=m > -CONFIG_DM_MULTIPATH=m > -# CONFIG_DM_MULTIPATH_QL is not set > -# CONFIG_DM_MULTIPATH_ST is not set > -CONFIG_DM_DELAY=m > -# CONFIG_DM_UEVENT is not set > -CONFIG_DM_FLAKEY=m > -CONFIG_TARGET_CORE=m > -CONFIG_TCM_IBLOCK=m > -CONFIG_TCM_FILEIO=m > -CONFIG_TCM_PSCSI=m > -CONFIG_LOOPBACK_TARGET=m > -# CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set > -CONFIG_NETDEVICES=y > -CONFIG_DUMMY=m > -CONFIG_BONDING=m > -CONFIG_MACVLAN=m > -CONFIG_MACVTAP=m > -CONFIG_EQUALIZER=m > -CONFIG_TUN=m > -CONFIG_VETH=m > -CONFIG_MII=y > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -# CONFIG_LXT_PHY is not set > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -# CONFIG_SMSC_PHY is not set > -# CONFIG_BROADCOM_PHY is not set > -CONFIG_BCM63XX_PHY=m > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -# CONFIG_LSI_ET1011C_PHY is not set > -CONFIG_MICREL_PHY=m > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -# CONFIG_AX88796 is not set > -CONFIG_SMC91X=y > -# CONFIG_TI_DAVINCI_EMAC is not set > -CONFIG_TI_DAVINCI_MDIO=m > -CONFIG_TI_DAVINCI_CPDMA=m > -# CONFIG_DM9000 is not set > -CONFIG_ENC28J60=y > -# CONFIG_ENC28J60_WRITEVERIFY is not set > -# CONFIG_ETHOC is not set > -CONFIG_SMC911X=y > -CONFIG_SMSC911X=y > -# CONFIG_SMSC911X_ARCH_HOOKS is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -CONFIG_KS8842=m > -CONFIG_KS8851=y > -# CONFIG_KS8851_MLL is not set > -# CONFIG_FTMAC100 is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_LIBERTAS_THINFIRM is not set > -CONFIG_AT76C50X_USB=m > -CONFIG_USB_ZD1201=m > -CONFIG_USB_NET_RNDIS_WLAN=m > -CONFIG_RTL8187=m > -CONFIG_RTL8187_LEDS=y > -# CONFIG_MAC80211_HWSIM is not set > -# CONFIG_ATH_COMMON is not set > -CONFIG_B43=m > -# CONFIG_B43_SDIO is not set > -CONFIG_B43_PIO=y > -CONFIG_B43_PHY_N=y > -CONFIG_B43_PHY_LP=y > -CONFIG_B43_LEDS=y > -CONFIG_B43_HWRNG=y > -# CONFIG_B43_DEBUG is not set > -# CONFIG_B43LEGACY is not set > -CONFIG_HOSTAP=m > -CONFIG_HOSTAP_FIRMWARE=y > -CONFIG_HOSTAP_FIRMWARE_NVRAM=y > -# CONFIG_IWM is not set > -CONFIG_LIBERTAS=m > -CONFIG_LIBERTAS_USB=m > -# CONFIG_LIBERTAS_SDIO is not set > -# CONFIG_LIBERTAS_SPI is not set > -# CONFIG_LIBERTAS_DEBUG is not set > -# CONFIG_LIBERTAS_MESH is not set > -CONFIG_P54_COMMON=m > -CONFIG_P54_USB=m > -# CONFIG_P54_SPI is not set > -CONFIG_P54_LEDS=y > -CONFIG_RT2X00=m > -CONFIG_RT2500USB=m > -CONFIG_RT73USB=m > -# CONFIG_RT2800USB is not set > -CONFIG_RT2X00_LIB_USB=m > -CONFIG_RT2X00_LIB=m > -CONFIG_RT2X00_LIB_FIRMWARE=y > -CONFIG_RT2X00_LIB_CRYPTO=y > -CONFIG_RT2X00_LIB_LEDS=y > -# CONFIG_RT2X00_DEBUG is not set > -CONFIG_RTL8192CU=m > -CONFIG_RTLWIFI=m > -CONFIG_RTL8192C_COMMON=m > -CONFIG_WL1251=m > -CONFIG_WL1251_SPI=m > -CONFIG_WL1251_SDIO=m > -CONFIG_WL12XX_MENU=m > -CONFIG_WL12XX=m > -CONFIG_WL12XX_HT=y > -CONFIG_WL12XX_SPI=m > -CONFIG_WL12XX_SDIO=m > -# CONFIG_WL12XX_SDIO_TEST is not set > -CONFIG_WL12XX_PLATFORM_DATA=y > -CONFIG_ZD1211RW=m > -# CONFIG_ZD1211RW_DEBUG is not set > - > -# > -# WiMAX Wireless Broadband devices > -# > -CONFIG_WIMAX_I2400M=m > -CONFIG_WIMAX_I2400M_USB=m > -CONFIG_WIMAX_I2400M_SDIO=m > -CONFIG_WIMAX_IWMC3200_SDIO=y > -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 > - > -# > -# USB Network Adapters > -# > -CONFIG_USB_CATC=y > -CONFIG_USB_KAWETH=y > -CONFIG_USB_PEGASUS=y > -CONFIG_USB_RTL8150=y > -CONFIG_USB_USBNET=y > -CONFIG_USB_NET_AX8817X=y > -CONFIG_USB_NET_CDCETHER=y > -# CONFIG_USB_NET_CDC_EEM is not set > -CONFIG_USB_NET_CDC_NCM=m > -CONFIG_USB_NET_DM9601=y > -CONFIG_USB_NET_SMSC75XX=m > -CONFIG_USB_NET_SMSC95XX=y > -CONFIG_USB_NET_GL620A=y > -CONFIG_USB_NET_NET1080=y > -CONFIG_USB_NET_PLUSB=y > -CONFIG_USB_NET_MCS7830=y > -CONFIG_USB_NET_RNDIS_HOST=y > -CONFIG_USB_NET_CDC_SUBSET=y > -CONFIG_USB_ALI_M5632=y > -CONFIG_USB_AN2720=y > -CONFIG_USB_BELKIN=y > -CONFIG_USB_ARMLINUX=y > -CONFIG_USB_EPSON2888=y > -CONFIG_USB_KC2190=y > -CONFIG_USB_NET_ZAURUS=y > -CONFIG_USB_NET_CX82310_ETH=m > -CONFIG_USB_HSO=m > -CONFIG_USB_NET_INT51X1=m > -CONFIG_USB_IPHETH=m > -CONFIG_USB_SIERRA_NET=m > -CONFIG_USB_VL600=m > -# CONFIG_WAN is not set > -CONFIG_ATM_DRIVERS=y > -# CONFIG_ATM_DUMMY is not set > -# CONFIG_ATM_TCP is not set > - > -# > -# CAIF transport drivers > -# > -CONFIG_PPP=m > -CONFIG_PPP_MULTILINK=y > -CONFIG_PPP_FILTER=y > -CONFIG_PPP_ASYNC=m > -CONFIG_PPP_SYNC_TTY=m > -CONFIG_PPP_DEFLATE=m > -CONFIG_PPP_BSDCOMP=m > -CONFIG_PPP_MPPE=m > -CONFIG_PPPOE=m > -CONFIG_PPTP=m > -# CONFIG_PPPOATM is not set > -CONFIG_PPPOL2TP=m > -# CONFIG_SLIP is not set > -CONFIG_SLHC=m > -CONFIG_NETCONSOLE=m > -CONFIG_NETCONSOLE_DYNAMIC=y > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -CONFIG_INPUT_FF_MEMLESS=y > -CONFIG_INPUT_POLLDEV=y > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -CONFIG_INPUT_MOUSEDEV=y > -CONFIG_INPUT_MOUSEDEV_PSAUX=y > -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 > -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -# CONFIG_KEYBOARD_ATKBD is not set > -CONFIG_KEYBOARD_QT1070=m > -CONFIG_KEYBOARD_QT2160=m > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_TCA6416 is not set > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_LM8323 is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -CONFIG_KEYBOARD_MCS=m > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -# CONFIG_KEYBOARD_TWL4030 is not set > -# CONFIG_KEYBOARD_XTKBD is not set > -CONFIG_INPUT_MOUSE=y > -CONFIG_MOUSE_PS2=y > -CONFIG_MOUSE_PS2_ALPS=y > -CONFIG_MOUSE_PS2_LOGIPS2PP=y > -CONFIG_MOUSE_PS2_SYNAPTICS=y > -CONFIG_MOUSE_PS2_TRACKPOINT=y > -# CONFIG_MOUSE_PS2_ELANTECH is not set > -# CONFIG_MOUSE_PS2_SENTELIC is not set > -# CONFIG_MOUSE_PS2_TOUCHKIT is not set > -# CONFIG_MOUSE_SERIAL is not set > -# CONFIG_MOUSE_APPLETOUCH is not set > -# CONFIG_MOUSE_BCM5974 is not set > -# CONFIG_MOUSE_VSXXXAA is not set > -# CONFIG_MOUSE_GPIO is not set > -# CONFIG_MOUSE_SYNAPTICS_I2C is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -# CONFIG_INPUT_TOUCHSCREEN is not set > -CONFIG_INPUT_MISC=y > -CONFIG_INPUT_AD714X=m > -CONFIG_INPUT_AD714X_I2C=m > -CONFIG_INPUT_AD714X_SPI=m > -# CONFIG_INPUT_ATI_REMOTE is not set > -# CONFIG_INPUT_ATI_REMOTE2 is not set > -# CONFIG_INPUT_KEYSPAN_REMOTE is not set > -# CONFIG_INPUT_POWERMATE is not set > -# CONFIG_INPUT_YEALINK is not set > -# CONFIG_INPUT_CM109 is not set > -CONFIG_INPUT_TWL4030_PWRBUTTON=y > -CONFIG_INPUT_TWL4030_VIBRA=m > -CONFIG_INPUT_UINPUT=y > -CONFIG_INPUT_PCF8574=m > -CONFIG_INPUT_PWM_BEEPER=m > -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set > -CONFIG_INPUT_ADXL34X=m > -CONFIG_INPUT_ADXL34X_I2C=m > -CONFIG_INPUT_ADXL34X_SPI=m > -CONFIG_INPUT_CMA3000=m > -CONFIG_INPUT_CMA3000_I2C=m > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_SERIO_PS2MULT is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -CONFIG_VT_CONSOLE=y > -CONFIG_HW_CONSOLE=y > -CONFIG_VT_HW_CONSOLE_BINDING=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -# CONFIG_LEGACY_PTYS is not set > -# CONFIG_SERIAL_NONSTANDARD is not set > -CONFIG_N_GSM=m > -CONFIG_DEVKMEM=y > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=32 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 > -CONFIG_SERIAL_8250_EXTENDED=y > -CONFIG_SERIAL_8250_MANY_PORTS=y > -CONFIG_SERIAL_8250_SHARE_IRQ=y > -CONFIG_SERIAL_8250_DETECT_IRQ=y > -CONFIG_SERIAL_8250_RSA=y > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -# CONFIG_SERIAL_MAX3107 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_SERIAL_OMAP=y > -CONFIG_SERIAL_OMAP_CONSOLE=y > -# CONFIG_SERIAL_TIMBERDALE is not set > -# CONFIG_SERIAL_ALTERA_JTAGUART is not set > -# CONFIG_SERIAL_ALTERA_UART is not set > -CONFIG_SERIAL_IFX6X60=m > -CONFIG_TTY_PRINTK=y > -# CONFIG_HVC_DCC is not set > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=y > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -# CONFIG_RAMOOPS is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_MUX=m > - > -# > -# Multiplexer I2C Chip support > -# > -CONFIG_I2C_MUX_GPIO=m > -# CONFIG_I2C_MUX_PCA9541 is not set > -# CONFIG_I2C_MUX_PCA954x is not set > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=m > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -# CONFIG_I2C_DESIGNWARE is not set > -# CONFIG_I2C_GPIO is not set > -# CONFIG_I2C_OCORES is not set > -CONFIG_I2C_OMAP=y > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_PXA_PCI is not set > -# CONFIG_I2C_SIMTEC is not set > -# CONFIG_I2C_XILINX is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -CONFIG_I2C_DIOLAN_U2C=m > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_STUB is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -CONFIG_SPI=y > -# CONFIG_SPI_DEBUG is not set > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -# CONFIG_SPI_ALTERA is not set > -# CONFIG_SPI_BITBANG is not set > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_OC_TINY is not set > -CONFIG_SPI_OMAP24XX=y > -# CONFIG_SPI_PXA2XX_PCI is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -CONFIG_SPI_SPIDEV=y > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > - > -# > -# PPS generators support > -# > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_DEBUG_GPIO is not set > -CONFIG_GPIO_SYSFS=y > -CONFIG_GPIO_MAX730X=m > - > -# > -# Memory mapped GPIO expanders: > -# > -# CONFIG_GPIO_BASIC_MMIO is not set > -# CONFIG_GPIO_IT8761E is not set > - > -# > -# I2C GPIO expanders: > -# > -CONFIG_GPIO_MAX7300=m > -# CONFIG_GPIO_MAX732X is not set > -# CONFIG_GPIO_PCF857X is not set > -# CONFIG_GPIO_SX150X is not set > -CONFIG_GPIO_TWL4030=y > -CONFIG_GPIO_ADP5588=m > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > -# CONFIG_GPIO_74X164 is not set > - > -# > -# AC97 GPIO expanders: > -# > - > -# > -# MODULbus GPIO expanders: > -# > -# CONFIG_W1 is not set > -CONFIG_POWER_SUPPLY=m > -# CONFIG_POWER_SUPPLY_DEBUG is not set > -# CONFIG_PDA_POWER is not set > -CONFIG_TEST_POWER=m > -# CONFIG_BATTERY_DS2782 is not set > -# CONFIG_BATTERY_BQ20Z75 is not set > -# CONFIG_BATTERY_BQ27x00 is not set > -# CONFIG_BATTERY_MAX17040 is not set > -CONFIG_BATTERY_MAX17042=m > -CONFIG_CHARGER_ISP1704=m > -CONFIG_CHARGER_TWL4030=m > -CONFIG_CHARGER_GPIO=m > -CONFIG_HWMON=y > -# CONFIG_HWMON_VID is not set > -# CONFIG_HWMON_DEBUG_CHIP is not set > - > -# > -# Native drivers > -# > -# CONFIG_SENSORS_AD7414 is not set > -# CONFIG_SENSORS_AD7418 is not set > -# CONFIG_SENSORS_ADCXX is not set > -# CONFIG_SENSORS_ADM1021 is not set > -# CONFIG_SENSORS_ADM1025 is not set > -# CONFIG_SENSORS_ADM1026 is not set > -# CONFIG_SENSORS_ADM1029 is not set > -# CONFIG_SENSORS_ADM1031 is not set > -# CONFIG_SENSORS_ADM9240 is not set > -CONFIG_SENSORS_ADT7411=m > -# CONFIG_SENSORS_ADT7462 is not set > -# CONFIG_SENSORS_ADT7470 is not set > -# CONFIG_SENSORS_ADT7475 is not set > -CONFIG_SENSORS_ASC7621=m > -# CONFIG_SENSORS_ATXP1 is not set > -CONFIG_SENSORS_DS620=m > -# CONFIG_SENSORS_DS1621 is not set > -# CONFIG_SENSORS_F71805F is not set > -# CONFIG_SENSORS_F71882FG is not set > -# CONFIG_SENSORS_F75375S is not set > -# CONFIG_SENSORS_G760A is not set > -# CONFIG_SENSORS_GL518SM is not set > -# CONFIG_SENSORS_GL520SM is not set > -CONFIG_SENSORS_GPIO_FAN=m > -# CONFIG_SENSORS_IT87 is not set > -CONFIG_SENSORS_JC42=m > -# CONFIG_SENSORS_LINEAGE is not set > -# CONFIG_SENSORS_LM63 is not set > -# CONFIG_SENSORS_LM70 is not set > -# CONFIG_SENSORS_LM73 is not set > -# CONFIG_SENSORS_LM75 is not set > -# CONFIG_SENSORS_LM77 is not set > -# CONFIG_SENSORS_LM78 is not set > -# CONFIG_SENSORS_LM80 is not set > -# CONFIG_SENSORS_LM83 is not set > -# CONFIG_SENSORS_LM85 is not set > -# CONFIG_SENSORS_LM87 is not set > -# CONFIG_SENSORS_LM90 is not set > -# CONFIG_SENSORS_LM92 is not set > -# CONFIG_SENSORS_LM93 is not set > -# CONFIG_SENSORS_LTC4151 is not set > -# CONFIG_SENSORS_LTC4215 is not set > -# CONFIG_SENSORS_LTC4245 is not set > -# CONFIG_SENSORS_LTC4261 is not set > -# CONFIG_SENSORS_LM95241 is not set > -# CONFIG_SENSORS_MAX1111 is not set > -# CONFIG_SENSORS_MAX1619 is not set > -# CONFIG_SENSORS_MAX6639 is not set > -# CONFIG_SENSORS_MAX6650 is not set > -# CONFIG_SENSORS_PC87360 is not set > -# CONFIG_SENSORS_PC87427 is not set > -# CONFIG_SENSORS_PCF8591 is not set > -# CONFIG_PMBUS is not set > -# CONFIG_SENSORS_SHT15 is not set > -# CONFIG_SENSORS_SHT21 is not set > -CONFIG_SENSORS_SMM665=m > -# CONFIG_SENSORS_DME1737 is not set > -CONFIG_SENSORS_EMC1403=m > -CONFIG_SENSORS_EMC2103=m > -# CONFIG_SENSORS_SMSC47M1 is not set > -# CONFIG_SENSORS_SMSC47M192 is not set > -# CONFIG_SENSORS_SMSC47B397 is not set > -# CONFIG_SENSORS_SCH5627 is not set > -# CONFIG_SENSORS_ADS1015 is not set > -# CONFIG_SENSORS_ADS7828 is not set > -CONFIG_SENSORS_ADS7871=m > -CONFIG_SENSORS_AMC6821=m > -# CONFIG_SENSORS_THMC50 is not set > -CONFIG_SENSORS_TMP102=m > -# CONFIG_SENSORS_TMP401 is not set > -# CONFIG_SENSORS_TMP421 is not set > -CONFIG_SENSORS_TWL4030_MADC=m > -# CONFIG_SENSORS_VT1211 is not set > -# CONFIG_SENSORS_W83781D is not set > -# CONFIG_SENSORS_W83791D is not set > -# CONFIG_SENSORS_W83792D is not set > -# CONFIG_SENSORS_W83793 is not set > -# CONFIG_SENSORS_W83795 is not set > -# CONFIG_SENSORS_W83L785TS is not set > -# CONFIG_SENSORS_W83L786NG is not set > -# CONFIG_SENSORS_W83627HF is not set > -# CONFIG_SENSORS_W83627EHF is not set > -CONFIG_THERMAL=y > -CONFIG_THERMAL_HWMON=y > -CONFIG_WATCHDOG=y > -CONFIG_WATCHDOG_NOWAYOUT=y > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_OMAP_WATCHDOG=y > -# CONFIG_TWL4030_WATCHDOG is not set > -# CONFIG_MAX63XX_WATCHDOG is not set > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -CONFIG_SSB=y > -CONFIG_SSB_BLOCKIO=y > -CONFIG_SSB_SDIOHOST_POSSIBLE=y > -# CONFIG_SSB_SDIOHOST is not set > -# CONFIG_SSB_SILENT is not set > -# CONFIG_SSB_DEBUG is not set > -CONFIG_MFD_SUPPORT=y > -CONFIG_MFD_CORE=y > -# CONFIG_MFD_88PM860X is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_HTC_I2CPLD is not set > -CONFIG_TPS6105X=m > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507X=m > -CONFIG_TWL4030_CORE=y > -CONFIG_TWL4030_MADC=m > -CONFIG_TWL4030_POWER=y > -CONFIG_TWL4030_CODEC=y > -CONFIG_TWL4030_POWEROFF=y > -CONFIG_TWL6030_PWM=m > -# CONFIG_MFD_STMPE is not set > -# CONFIG_MFD_TC3589X is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_MAX8925 is not set > -# CONFIG_MFD_MAX8997 is not set > -# CONFIG_MFD_MAX8998 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X_I2C is not set > -# CONFIG_MFD_WM831X_SPI is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_WM8994 is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13XXX is not set > -# CONFIG_ABX500_CORE is not set > -# CONFIG_EZX_PCAP is not set > -CONFIG_MFD_TPS6586X=y > -CONFIG_MFD_WL1273_CORE=m > -CONFIG_MFD_OMAP_USB_HOST=y > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -CONFIG_REGULATOR_DUMMY=y > -CONFIG_REGULATOR_FIXED_VOLTAGE=y > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8649 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_MAX8952 is not set > -CONFIG_REGULATOR_TWL4030=y > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_LP3972 is not set > -CONFIG_REGULATOR_TPS6105X=m > -# CONFIG_REGULATOR_TPS65023 is not set > -# CONFIG_REGULATOR_TPS6507X is not set > -# CONFIG_REGULATOR_ISL6271A is not set > -# CONFIG_REGULATOR_AD5398 is not set > -CONFIG_REGULATOR_TPS6586X=m > -CONFIG_REGULATOR_TPS6524X=m > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_MEDIA_CONTROLLER=y > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_V4L2_SUBDEV_API=y > -CONFIG_DVB_CORE=m > -CONFIG_VIDEO_MEDIA=m > - > -# > -# Multimedia drivers > -# > -CONFIG_RC_CORE=m > -CONFIG_LIRC=m > -CONFIG_RC_MAP=m > -CONFIG_IR_NEC_DECODER=m > -CONFIG_IR_RC5_DECODER=m > -CONFIG_IR_RC6_DECODER=m > -CONFIG_IR_JVC_DECODER=m > -CONFIG_IR_SONY_DECODER=m > -CONFIG_IR_RC5_SZ_DECODER=m > -CONFIG_IR_LIRC_CODEC=m > -# CONFIG_IR_IMON is not set > -# CONFIG_IR_MCEUSB is not set > -# CONFIG_IR_STREAMZAP is not set > -CONFIG_RC_LOOPBACK=m > -CONFIG_MEDIA_ATTACH=y > -CONFIG_MEDIA_TUNER=m > -CONFIG_MEDIA_TUNER_CUSTOMISE=y > - > -# > -# Customize TV tuners > -# > -CONFIG_MEDIA_TUNER_SIMPLE=m > -CONFIG_MEDIA_TUNER_TDA8290=m > -CONFIG_MEDIA_TUNER_TDA827X=m > -CONFIG_MEDIA_TUNER_TDA18271=m > -CONFIG_MEDIA_TUNER_TDA9887=m > -CONFIG_MEDIA_TUNER_TEA5761=m > -CONFIG_MEDIA_TUNER_TEA5767=m > -CONFIG_MEDIA_TUNER_MT20XX=m > -CONFIG_MEDIA_TUNER_MT2060=m > -CONFIG_MEDIA_TUNER_MT2266=m > -CONFIG_MEDIA_TUNER_MT2131=m > -CONFIG_MEDIA_TUNER_QT1010=m > -CONFIG_MEDIA_TUNER_XC2028=m > -CONFIG_MEDIA_TUNER_XC5000=m > -CONFIG_MEDIA_TUNER_MXL5005S=m > -CONFIG_MEDIA_TUNER_MXL5007T=m > -CONFIG_MEDIA_TUNER_MC44S803=m > -CONFIG_MEDIA_TUNER_MAX2165=m > -CONFIG_MEDIA_TUNER_TDA18218=m > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_VMALLOC=m > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEOBUF_DVB=m > -CONFIG_VIDEO_TVEEPROM=m > -CONFIG_VIDEO_TUNER=m > -CONFIG_V4L2_MEM2MEM_DEV=m > -CONFIG_VIDEOBUF2_CORE=m > -CONFIG_VIDEOBUF2_MEMOPS=m > -CONFIG_VIDEOBUF2_VMALLOC=m > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -CONFIG_VIDEO_IR_I2C=m > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -CONFIG_VIDEO_MSP3400=m > -# CONFIG_VIDEO_CS5345 is not set > -CONFIG_VIDEO_CS53L32A=m > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -CONFIG_VIDEO_WM8775=m > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -CONFIG_VIDEO_ADV7180=m > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -CONFIG_VIDEO_MT9V011=m > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -CONFIG_VIDEO_SAA711X=m > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -# CONFIG_VIDEO_TVP514X is not set > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_TVP7002 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -CONFIG_VIDEO_CX25840=m > - > -# > -# MPEG video encoders > -# > -CONFIG_VIDEO_CX2341X=m > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > -# CONFIG_VIDEO_AK881X is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -CONFIG_VIDEO_VIVI=m > -CONFIG_VIDEO_VPFE_CAPTURE=y > -# CONFIG_VIDEO_DM6446_CCDC is not set > -CONFIG_VIDEO_OMAP2_VOUT=y > -# CONFIG_VIDEO_CPIA2 is not set > -CONFIG_VIDEO_TIMBERDALE=m > -# CONFIG_VIDEO_AU0828 is not set > -CONFIG_VIDEO_SR030PC30=m > -CONFIG_VIDEO_NOON010PC30=m > -CONFIG_VIDEO_OMAP3=y > -# CONFIG_VIDEO_OMAP3_DEBUG is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=m > -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y > -CONFIG_USB_GSPCA=m > -CONFIG_USB_M5602=m > -CONFIG_USB_STV06XX=m > -# CONFIG_USB_GL860 is not set > -CONFIG_USB_GSPCA_BENQ=m > -CONFIG_USB_GSPCA_CONEX=m > -CONFIG_USB_GSPCA_CPIA1=m > -CONFIG_USB_GSPCA_ETOMS=m > -CONFIG_USB_GSPCA_FINEPIX=m > -# CONFIG_USB_GSPCA_JEILINJ is not set > -CONFIG_USB_GSPCA_KONICA=m > -CONFIG_USB_GSPCA_MARS=m > -# CONFIG_USB_GSPCA_MR97310A is not set > -CONFIG_USB_GSPCA_NW80X=m > -CONFIG_USB_GSPCA_OV519=m > -CONFIG_USB_GSPCA_OV534=m > -CONFIG_USB_GSPCA_OV534_9=m > -CONFIG_USB_GSPCA_PAC207=m > -# CONFIG_USB_GSPCA_PAC7302 is not set > -CONFIG_USB_GSPCA_PAC7311=m > -CONFIG_USB_GSPCA_SN9C2028=m > -# CONFIG_USB_GSPCA_SN9C20X is not set > -CONFIG_USB_GSPCA_SONIXB=m > -CONFIG_USB_GSPCA_SONIXJ=m > -CONFIG_USB_GSPCA_SPCA500=m > -CONFIG_USB_GSPCA_SPCA501=m > -CONFIG_USB_GSPCA_SPCA505=m > -CONFIG_USB_GSPCA_SPCA506=m > -CONFIG_USB_GSPCA_SPCA508=m > -CONFIG_USB_GSPCA_SPCA561=m > -CONFIG_USB_GSPCA_SPCA1528=m > -# CONFIG_USB_GSPCA_SQ905 is not set > -# CONFIG_USB_GSPCA_SQ905C is not set > -CONFIG_USB_GSPCA_SQ930X=m > -CONFIG_USB_GSPCA_STK014=m > -# CONFIG_USB_GSPCA_STV0680 is not set > -CONFIG_USB_GSPCA_SUNPLUS=m > -CONFIG_USB_GSPCA_T613=m > -CONFIG_USB_GSPCA_TV8532=m > -CONFIG_USB_GSPCA_VC032X=m > -CONFIG_USB_GSPCA_VICAM=m > -CONFIG_USB_GSPCA_XIRLINK_CIT=m > -CONFIG_USB_GSPCA_ZC3XX=m > -CONFIG_VIDEO_PVRUSB2=m > -CONFIG_VIDEO_PVRUSB2_SYSFS=y > -CONFIG_VIDEO_PVRUSB2_DVB=y > -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set > -CONFIG_VIDEO_HDPVR=m > -CONFIG_VIDEO_EM28XX=m > -CONFIG_VIDEO_EM28XX_ALSA=m > -CONFIG_VIDEO_EM28XX_DVB=m > -CONFIG_VIDEO_TLG2300=m > -CONFIG_VIDEO_CX231XX=m > -CONFIG_VIDEO_CX231XX_RC=y > -# CONFIG_VIDEO_CX231XX_ALSA is not set > -CONFIG_VIDEO_CX231XX_DVB=m > -CONFIG_VIDEO_USBVISION=m > -CONFIG_USB_ET61X251=m > -CONFIG_USB_SN9C102=m > -CONFIG_USB_PWC=m > -# CONFIG_USB_PWC_DEBUG is not set > -CONFIG_USB_PWC_INPUT_EVDEV=y > -CONFIG_USB_ZR364XX=m > -CONFIG_USB_STKWEBCAM=m > -CONFIG_USB_S2255=m > -CONFIG_V4L_MEM2MEM_DRIVERS=y > -CONFIG_VIDEO_MEM2MEM_TESTDEV=m > -CONFIG_RADIO_ADAPTERS=y > -# CONFIG_I2C_SI4713 is not set > -# CONFIG_RADIO_SI4713 is not set > -# CONFIG_USB_DSBR is not set > -# CONFIG_RADIO_SI470X is not set > -# CONFIG_USB_MR800 is not set > -# CONFIG_RADIO_TEA5764 is not set > -CONFIG_RADIO_SAA7706H=m > -# CONFIG_RADIO_TEF6862 is not set > -CONFIG_RADIO_WL1273=m > - > -# > -# Texas Instruments WL128x FM driver (ST based) > -# > -CONFIG_RADIO_WL128X=m > -CONFIG_DVB_MAX_ADAPTERS=8 > -CONFIG_DVB_DYNAMIC_MINORS=y > -CONFIG_DVB_CAPTURE_DRIVERS=y > -# CONFIG_TTPCI_EEPROM is not set > - > -# > -# Supported USB Adapters > -# > -CONFIG_DVB_USB=m > -# CONFIG_DVB_USB_DEBUG is not set > -CONFIG_DVB_USB_A800=m > -CONFIG_DVB_USB_DIBUSB_MB=m > -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set > -CONFIG_DVB_USB_DIBUSB_MC=m > -CONFIG_DVB_USB_DIB0700=m > -CONFIG_DVB_USB_UMT_010=m > -CONFIG_DVB_USB_CXUSB=m > -CONFIG_DVB_USB_M920X=m > -CONFIG_DVB_USB_GL861=m > -CONFIG_DVB_USB_AU6610=m > -CONFIG_DVB_USB_DIGITV=m > -CONFIG_DVB_USB_VP7045=m > -CONFIG_DVB_USB_VP702X=m > -CONFIG_DVB_USB_GP8PSK=m > -CONFIG_DVB_USB_NOVA_T_USB2=m > -CONFIG_DVB_USB_TTUSB2=m > -CONFIG_DVB_USB_DTT200U=m > -CONFIG_DVB_USB_OPERA1=m > -CONFIG_DVB_USB_AF9005=m > -CONFIG_DVB_USB_AF9005_REMOTE=m > -CONFIG_DVB_USB_DW2102=m > -CONFIG_DVB_USB_CINERGY_T2=m > -CONFIG_DVB_USB_ANYSEE=m > -CONFIG_DVB_USB_DTV5100=m > -CONFIG_DVB_USB_AF9015=m > -# CONFIG_DVB_USB_CE6230 is not set > -# CONFIG_DVB_USB_FRIIO is not set > -# CONFIG_DVB_USB_EC168 is not set > -CONFIG_DVB_USB_AZ6027=m > -CONFIG_DVB_USB_LME2510=m > -CONFIG_DVB_USB_TECHNISAT_USB2=m > -# CONFIG_SMS_SIANO_MDTV is not set > - > -# > -# Supported FlexCopII (B2C2) Adapters > -# > -CONFIG_DVB_B2C2_FLEXCOP=m > -CONFIG_DVB_B2C2_FLEXCOP_USB=m > -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set > - > -# > -# Supported DVB Frontends > -# > -# CONFIG_DVB_FE_CUSTOMISE is not set > - > -# > -# Multistandard (satellite) frontends > -# > -CONFIG_DVB_STB0899=m > -CONFIG_DVB_STB6100=m > -CONFIG_DVB_STV090x=m > -CONFIG_DVB_STV6110x=m > - > -# > -# DVB-S (satellite) frontends > -# > -CONFIG_DVB_CX24123=m > -CONFIG_DVB_MT312=m > -CONFIG_DVB_ZL10039=m > -CONFIG_DVB_S5H1420=m > -CONFIG_DVB_STV0288=m > -CONFIG_DVB_STB6000=m > -CONFIG_DVB_STV0299=m > -CONFIG_DVB_STV6110=m > -CONFIG_DVB_STV0900=m > -CONFIG_DVB_TDA10086=m > -CONFIG_DVB_TUNER_ITD1000=m > -CONFIG_DVB_TUNER_CX24113=m > -CONFIG_DVB_TDA826X=m > -CONFIG_DVB_CX24116=m > -CONFIG_DVB_SI21XX=m > -CONFIG_DVB_DS3000=m > - > -# > -# DVB-T (terrestrial) frontends > -# > -CONFIG_DVB_CX22702=m > -CONFIG_DVB_TDA1004X=m > -CONFIG_DVB_NXT6000=m > -CONFIG_DVB_MT352=m > -CONFIG_DVB_ZL10353=m > -CONFIG_DVB_DIB3000MB=m > -CONFIG_DVB_DIB3000MC=m > -CONFIG_DVB_DIB7000M=m > -CONFIG_DVB_DIB7000P=m > -CONFIG_DVB_TDA10048=m > -CONFIG_DVB_AF9013=m > - > -# > -# DVB-C (cable) frontends > -# > -CONFIG_DVB_TDA10023=m > -CONFIG_DVB_STV0297=m > - > -# > -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends > -# > -CONFIG_DVB_NXT200X=m > -CONFIG_DVB_BCM3510=m > -CONFIG_DVB_LGDT330X=m > -CONFIG_DVB_LGDT3305=m > -CONFIG_DVB_S5H1409=m > -CONFIG_DVB_S5H1411=m > - > -# > -# ISDB-T (terrestrial) frontends > -# > -CONFIG_DVB_S921=m > -CONFIG_DVB_DIB8000=m > -CONFIG_DVB_MB86A20S=m > - > -# > -# Digital terrestrial only tuners/PLL > -# > -CONFIG_DVB_PLL=m > -CONFIG_DVB_TUNER_DIB0070=m > -CONFIG_DVB_TUNER_DIB0090=m > - > -# > -# SEC control devices for DVB-S > -# > -CONFIG_DVB_LNBP21=m > -CONFIG_DVB_ISL6421=m > -CONFIG_DVB_LGS8GXX=m > -CONFIG_DVB_ATBM8830=m > -CONFIG_DVB_IX2505V=m > - > -# > -# Tools to develop new frontends > -# > -# CONFIG_DVB_DUMMY_FE is not set > - > -# > -# Graphics support > -# > -CONFIG_DRM=m > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -CONFIG_FB_SYS_FILLRECT=m > -CONFIG_FB_SYS_COPYAREA=m > -CONFIG_FB_SYS_IMAGEBLIT=m > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -CONFIG_FB_SYS_FOPS=m > -# CONFIG_FB_WMT_GE_ROPS is not set > -CONFIG_FB_DEFERRED_IO=y > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -CONFIG_FB_MODE_HELPERS=y > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_TMIO is not set > -CONFIG_FB_UDL=m > -# CONFIG_FB_VIRTUAL is not set > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set > -CONFIG_OMAP2_VRAM=y > -CONFIG_OMAP2_VRFB=y > -CONFIG_OMAP2_DSS=y > -CONFIG_OMAP2_VRAM_SIZE=14 > -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y > -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set > -CONFIG_OMAP2_DSS_DPI=y > -# CONFIG_OMAP2_DSS_RFBI is not set > -CONFIG_OMAP2_DSS_VENC=y > -# CONFIG_OMAP2_DSS_SDI is not set > -CONFIG_OMAP2_DSS_DSI=y > -CONFIG_OMAP2_DSS_USE_DSI_PLL=y > -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set > -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 > -CONFIG_FB_OMAP2=y > -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y > -CONFIG_FB_OMAP2_NUM_FBS=2 > - > -# > -# OMAP2/3 Display Device Drivers > -# > -CONFIG_PANEL_GENERIC_DPI=y > -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set > -CONFIG_PANEL_SHARP_LS037V7DW01=y > -CONFIG_PANEL_NEC_NL8048HL11_01B=y > -# CONFIG_PANEL_TAAL is not set > -CONFIG_PANEL_TPO_TD043MTEA1=m > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > -CONFIG_BACKLIGHT_CLASS_DEVICE=y > - > -# > -# Display device support > -# > -CONFIG_DISPLAY_SUPPORT=y > - > -# > -# Display hardware drivers > -# > - > -# > -# Console display driver support > -# > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -# CONFIG_LOGO_LINUX_MONO is not set > -# CONFIG_LOGO_LINUX_VGA16 is not set > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -CONFIG_SOUND_OSS_CORE=y > -CONFIG_SOUND_OSS_CORE_PRECLAIM=y > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -CONFIG_SND_SEQUENCER=m > -# CONFIG_SND_SEQ_DUMMY is not set > -CONFIG_SND_OSSEMUL=y > -CONFIG_SND_MIXER_OSS=y > -CONFIG_SND_PCM_OSS=y > -CONFIG_SND_PCM_OSS_PLUGINS=y > -CONFIG_SND_SEQUENCER_OSS=y > -CONFIG_SND_HRTIMER=m > -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y > -CONFIG_SND_DYNAMIC_MINORS=y > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -CONFIG_SND_RAWMIDI_SEQ=m > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -CONFIG_SND_ALOOP=m > -# CONFIG_SND_VIRMIDI is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -# CONFIG_SND_ARM is not set > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -CONFIG_SND_USB_UA101=m > -CONFIG_SND_USB_CAIAQ=m > -CONFIG_SND_USB_CAIAQ_INPUT=y > -CONFIG_SND_USB_6FIRE=m > -CONFIG_SND_SOC=y > -CONFIG_SND_SOC_CACHE_LZO=y > -CONFIG_SND_OMAP_SOC=y > -CONFIG_SND_OMAP_SOC_MCBSP=y > -CONFIG_SND_OMAP_SOC_OVERO=y > -CONFIG_SND_OMAP_SOC_OMAP3EVM=y > -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y > -CONFIG_SND_OMAP_SOC_ZOOM2=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TWL4030=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_3M_PCT is not set > -CONFIG_HID_A4TECH=y > -CONFIG_HID_ACRUX=m > -# CONFIG_HID_ACRUX_FF is not set > -CONFIG_HID_APPLE=y > -CONFIG_HID_BELKIN=y > -# CONFIG_HID_CANDO is not set > -CONFIG_HID_CHERRY=y > -CONFIG_HID_CHICONY=y > -# CONFIG_HID_PRODIKEYS is not set > -CONFIG_HID_CYPRESS=y > -# CONFIG_HID_DRAGONRISE is not set > -CONFIG_HID_EMS_FF=m > -# CONFIG_HID_ELECOM is not set > -CONFIG_HID_EZKEY=y > -CONFIG_HID_KEYTOUCH=m > -# CONFIG_HID_KYE is not set > -CONFIG_HID_UCLOGIC=m > -CONFIG_HID_WALTOP=m > -CONFIG_HID_GYRATION=y > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -CONFIG_HID_LCPOWER=m > -CONFIG_HID_LOGITECH=y > -# CONFIG_LOGITECH_FF is not set > -# CONFIG_LOGIRUMBLEPAD2_FF is not set > -# CONFIG_LOGIG940_FF is not set > -# CONFIG_LOGIWII_FF is not set > -CONFIG_HID_MAGICMOUSE=m > -CONFIG_HID_MICROSOFT=y > -# CONFIG_HID_MOSART is not set > -CONFIG_HID_MONTEREY=y > -CONFIG_HID_MULTITOUCH=m > -CONFIG_HID_NTRIG=y > -# CONFIG_HID_ORTEK is not set > -CONFIG_HID_PANTHERLORD=y > -# CONFIG_PANTHERLORD_FF is not set > -CONFIG_HID_PETALYNX=y > -CONFIG_HID_PICOLCD=m > -CONFIG_HID_PICOLCD_FB=y > -CONFIG_HID_PICOLCD_BACKLIGHT=y > -CONFIG_HID_PICOLCD_LEDS=y > -CONFIG_HID_QUANTA=m > -CONFIG_HID_ROCCAT=m > -CONFIG_HID_ROCCAT_COMMON=m > -CONFIG_HID_ROCCAT_ARVO=m > -CONFIG_HID_ROCCAT_KONE=m > -CONFIG_HID_ROCCAT_KONEPLUS=m > -CONFIG_HID_ROCCAT_KOVAPLUS=m > -# CONFIG_HID_ROCCAT_PYRA is not set > -CONFIG_HID_SAMSUNG=y > -CONFIG_HID_SONY=y > -CONFIG_HID_STANTUM=m > -CONFIG_HID_SUNPLUS=y > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -CONFIG_HID_TOPSEED=y > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_WACOM is not set > -# CONFIG_HID_ZEROPLUS is not set > -# CONFIG_HID_ZYDACRON is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -CONFIG_USB_ARCH_HAS_EHCI=y > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y > - > -# > -# Miscellaneous USB options > -# > -CONFIG_USB_DEVICEFS=y > -CONFIG_USB_DEVICE_CLASS=y > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -CONFIG_USB_OTG=y > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -CONFIG_USB_MON=y > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -CONFIG_USB_EHCI_HCD=y > -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set > -CONFIG_USB_EHCI_TT_NEWSCHED=y > -CONFIG_USB_EHCI_HCD_OMAP=y > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -# CONFIG_USB_OHCI_HCD is not set > -# CONFIG_USB_U132_HCD is not set > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -# CONFIG_USB_MUSB_TUSB6010 is not set > -CONFIG_USB_MUSB_OMAP2PLUS=y > -# CONFIG_USB_MUSB_AM35X is not set > -# CONFIG_USB_MUSB_HOST is not set > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -CONFIG_USB_MUSB_OTG=y > -CONFIG_USB_GADGET_MUSB_HDRC=y > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -CONFIG_USB_INVENTRA_DMA=y > -# CONFIG_USB_TI_CPPI_DMA is not set > -# CONFIG_USB_MUSB_DEBUG is not set > - > -# > -# USB Device Class drivers > -# > -CONFIG_USB_ACM=m > -CONFIG_USB_PRINTER=m > -CONFIG_USB_WDM=m > -CONFIG_USB_TMC=m > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -CONFIG_USB_STORAGE_REALTEK=m > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -CONFIG_USB_STORAGE_ENE_UB6250=m > -CONFIG_USB_UAS=m > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -CONFIG_USB_SERIAL=m > -CONFIG_USB_EZUSB=y > -CONFIG_USB_SERIAL_GENERIC=y > -CONFIG_USB_SERIAL_AIRCABLE=m > -CONFIG_USB_SERIAL_ARK3116=m > -CONFIG_USB_SERIAL_BELKIN=m > -CONFIG_USB_SERIAL_CH341=m > -CONFIG_USB_SERIAL_WHITEHEAT=n > -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m > -# CONFIG_USB_SERIAL_CP210X is not set > -CONFIG_USB_SERIAL_CYPRESS_M8=m > -CONFIG_USB_SERIAL_EMPEG=m > -CONFIG_USB_SERIAL_FTDI_SIO=m > -CONFIG_USB_SERIAL_FUNSOFT=m > -CONFIG_USB_SERIAL_VISOR=m > -CONFIG_USB_SERIAL_IPAQ=m > -CONFIG_USB_SERIAL_IR=m > -CONFIG_USB_SERIAL_EDGEPORT=m > -CONFIG_USB_SERIAL_EDGEPORT_TI=m > -CONFIG_USB_SERIAL_GARMIN=m > -CONFIG_USB_SERIAL_IPW=m > -CONFIG_USB_SERIAL_IUU=m > -CONFIG_USB_SERIAL_KEYSPAN_PDA=m > -CONFIG_USB_SERIAL_KEYSPAN=m > -CONFIG_USB_SERIAL_KEYSPAN_MPR=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19=y > -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y > -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y > -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y > -CONFIG_USB_SERIAL_KLSI=m > -CONFIG_USB_SERIAL_KOBIL_SCT=m > -CONFIG_USB_SERIAL_MCT_U232=m > -CONFIG_USB_SERIAL_MOS7720=m > -CONFIG_USB_SERIAL_MOS7840=m > -CONFIG_USB_SERIAL_MOTOROLA=m > -CONFIG_USB_SERIAL_NAVMAN=m > -CONFIG_USB_SERIAL_PL2303=m > -CONFIG_USB_SERIAL_OTI6858=m > -CONFIG_USB_SERIAL_QCAUX=m > -# CONFIG_USB_SERIAL_QUALCOMM is not set > -CONFIG_USB_SERIAL_SPCP8X5=m > -CONFIG_USB_SERIAL_HP4X=m > -CONFIG_USB_SERIAL_SAFE=m > -# CONFIG_USB_SERIAL_SAFE_PADDED is not set > -CONFIG_USB_SERIAL_SAMBA=m > -CONFIG_USB_SERIAL_SIEMENS_MPI=m > -CONFIG_USB_SERIAL_SIERRAWIRELESS=m > -# CONFIG_USB_SERIAL_SYMBOL is not set > -CONFIG_USB_SERIAL_TI=n > -CONFIG_USB_SERIAL_CYBERJACK=m > -CONFIG_USB_SERIAL_XIRCOM=n > -# CONFIG_USB_SERIAL_OPTION is not set > -CONFIG_USB_SERIAL_OMNINET=m > -CONFIG_USB_SERIAL_OPTICON=m > -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m > -CONFIG_USB_SERIAL_ZIO=m > -CONFIG_USB_SERIAL_SSU100=m > -CONFIG_USB_SERIAL_DEBUG=m > - > -# > -# USB Miscellaneous drivers > -# > -CONFIG_USB_EMI62=m > -CONFIG_USB_EMI26=m > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -CONFIG_USB_LEGOTOWER=m > -CONFIG_USB_LCD=m > -CONFIG_USB_LED=m > -CONFIG_USB_CYPRESS_CY7C63=m > -CONFIG_USB_CYTHERM=m > -CONFIG_USB_IDMOUSE=m > -CONFIG_USB_FTDI_ELAN=m > -# CONFIG_USB_APPLEDISPLAY is not set > -CONFIG_USB_SISUSBVGA=m > -CONFIG_USB_SISUSBVGA_CON=y > -CONFIG_USB_LD=m > -CONFIG_USB_TRANCEVIBRATOR=m > -# CONFIG_USB_IOWARRIOR is not set > -CONFIG_USB_TEST=m > -# CONFIG_USB_ISIGHTFW is not set > -CONFIG_USB_YUREX=m > -CONFIG_USB_ATM=m > -CONFIG_USB_SPEEDTOUCH=m > -CONFIG_USB_CXACRU=m > -CONFIG_USB_UEAGLEATM=m > -CONFIG_USB_XUSBATM=m > -CONFIG_USB_GADGET=y > -# CONFIG_USB_GADGET_DEBUG is not set > -# CONFIG_USB_GADGET_DEBUG_FILES is not set > -CONFIG_USB_GADGET_DEBUG_FS=y > -CONFIG_USB_GADGET_VBUS_DRAW=480 > -CONFIG_USB_GADGET_SELECTED=y > -# CONFIG_USB_GADGET_FUSB300 is not set > -# CONFIG_USB_GADGET_OMAP is not set > -# CONFIG_USB_GADGET_R8A66597 is not set > -# CONFIG_USB_GADGET_PXA_U2O is not set > -# CONFIG_USB_GADGET_M66592 is not set > -# CONFIG_USB_GADGET_DUMMY_HCD is not set > -CONFIG_USB_GADGET_DUALSPEED=y > -# CONFIG_USB_ZERO is not set > -# CONFIG_USB_AUDIO is not set > -CONFIG_USB_ETH=m > -CONFIG_USB_ETH_RNDIS=y > -# CONFIG_USB_ETH_EEM is not set > -CONFIG_USB_G_NCM=m > -# CONFIG_USB_GADGETFS is not set > -CONFIG_USB_FUNCTIONFS=m > -# CONFIG_USB_FUNCTIONFS_ETH is not set > -CONFIG_USB_FUNCTIONFS_RNDIS=y > -# CONFIG_USB_FUNCTIONFS_GENERIC is not set > -# CONFIG_USB_FILE_STORAGE is not set > -# CONFIG_USB_MASS_STORAGE is not set > -# CONFIG_USB_G_SERIAL is not set > -# CONFIG_USB_MIDI_GADGET is not set > -# CONFIG_USB_G_PRINTER is not set > -# CONFIG_USB_CDC_COMPOSITE is not set > -# CONFIG_USB_G_MULTI is not set > -CONFIG_USB_G_HID=m > -CONFIG_USB_G_DBGP=m > -# CONFIG_USB_G_DBGP_PRINTK is not set > -CONFIG_USB_G_DBGP_SERIAL=y > -CONFIG_USB_G_WEBCAM=m > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -CONFIG_USB_GPIO_VBUS=y > -# CONFIG_ISP1301_OMAP is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_TWL4030_USB=y > -CONFIG_TWL6030_USB=m > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -CONFIG_MMC_UNSAFE_RESUME=y > -# CONFIG_MMC_CLKGATE is not set > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_MINORS=8 > -CONFIG_MMC_BLOCK_BOUNCE=y > -CONFIG_SDIO_UART=y > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_OMAP is not set > -CONFIG_MMC_OMAP_HS=y > -CONFIG_MMC_SPI=m > -# CONFIG_MMC_DW is not set > -CONFIG_MMC_USHC=m > -# CONFIG_MEMSTICK is not set > -CONFIG_NEW_LEDS=y > -CONFIG_LEDS_CLASS=y > - > -# > -# LED drivers > -# > -# CONFIG_LEDS_LM3530 is not set > -# CONFIG_LEDS_PCA9532 is not set > -CONFIG_LEDS_GPIO=y > -CONFIG_LEDS_GPIO_PLATFORM=y > -# CONFIG_LEDS_LP3944 is not set > -CONFIG_LEDS_LP5521=m > -CONFIG_LEDS_LP5523=m > -# CONFIG_LEDS_PCA955X is not set > -# CONFIG_LEDS_DAC124S085 is not set > -CONFIG_LEDS_PWM=m > -CONFIG_LEDS_REGULATOR=m > -# CONFIG_LEDS_BD2802 is not set > -# CONFIG_LEDS_LT3593 is not set > -CONFIG_LEDS_TRIGGERS=y > - > -# > -# LED Triggers > -# > -CONFIG_LEDS_TRIGGER_TIMER=m > -CONFIG_LEDS_TRIGGER_HEARTBEAT=y > -CONFIG_LEDS_TRIGGER_BACKLIGHT=m > -CONFIG_LEDS_TRIGGER_GPIO=m > -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m > - > -# > -# iptables trigger is under Netfilter config (LED target) > -# > -CONFIG_NFC_DEVICES=y > -CONFIG_PN544_NFC=m > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -CONFIG_RTC_DRV_DS1307=y > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_DS3232 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_ISL12022 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -CONFIG_RTC_DRV_BQ32K=m > -CONFIG_RTC_DRV_TWL4030=m > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -# CONFIG_DMADEVICES is not set > -CONFIG_TIMB_DMA=m > -CONFIG_DMA_ENGINE=y > -# CONFIG_AUXDISPLAY is not set > -CONFIG_UIO=m > -CONFIG_UIO_PDRV=m > -CONFIG_UIO_PDRV_GENIRQ=m > -CONFIG_STAGING=y > -# CONFIG_STAGING_EXCLUDE_BUILD is not set > -# CONFIG_VIDEO_TM6000 is not set > -# CONFIG_USB_IP_COMMON is not set > -CONFIG_W35UND=m > -CONFIG_PRISM2_USB=m > -CONFIG_ECHO=m > -CONFIG_BRCM80211=m > -CONFIG_BRCMFMAC=y > -# CONFIG_BRCMDBG is not set > -CONFIG_RT2870=m > -# CONFIG_COMEDI is not set > -# CONFIG_ASUS_OLED is not set > -CONFIG_R8712U=m > -CONFIG_R8712_AP=y > -# CONFIG_TRANZPORT is not set > -# CONFIG_POHMELFS is not set > -# CONFIG_LINE6_USB is not set > -# CONFIG_USB_SERIAL_QUATECH2 is not set > -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set > -# CONFIG_VT6656 is not set > -# CONFIG_IIO is not set > -CONFIG_XVMALLOC=y > -CONFIG_ZRAM=m > -# CONFIG_ZRAM_DEBUG is not set > -# CONFIG_FB_SM7XX is not set > -# CONFIG_LIRC_STAGING is not set > -# CONFIG_EASYCAP is not set > -# CONFIG_TIDSPBRIDGE is not set > -# CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set > -CONFIG_MACH_NO_WESTBRIDGE=y > -# CONFIG_ATH6K_LEGACY is not set > -CONFIG_USB_ENESTORAGE=m > -CONFIG_BCM_WIMAX=m > -CONFIG_FT1000=m > -CONFIG_FT1000_USB=m > - > -# > -# Speakup console speech > -# > -# CONFIG_SPEAKUP is not set > -CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m > -CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m > - > -# > -# Altera FPGA firmware download module > -# > -# CONFIG_ALTERA_STAPL is not set > -CONFIG_CLKDEV_LOOKUP=y > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -# CONFIG_EXT3_FS_XATTR is not set > -CONFIG_EXT4_FS=y > -CONFIG_EXT4_FS_XATTR=y > -# CONFIG_EXT4_FS_POSIX_ACL is not set > -# CONFIG_EXT4_FS_SECURITY is not set > -# CONFIG_EXT4_DEBUG is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_JBD2=y > -# CONFIG_JBD2_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -CONFIG_REISERFS_FS=m > -# CONFIG_REISERFS_CHECK is not set > -CONFIG_REISERFS_PROC_INFO=y > -CONFIG_REISERFS_FS_XATTR=y > -# CONFIG_REISERFS_FS_POSIX_ACL is not set > -# CONFIG_REISERFS_FS_SECURITY is not set > -CONFIG_JFS_FS=m > -# CONFIG_JFS_POSIX_ACL is not set > -# CONFIG_JFS_SECURITY is not set > -# CONFIG_JFS_DEBUG is not set > -# CONFIG_JFS_STATISTICS is not set > -CONFIG_XFS_FS=m > -# CONFIG_XFS_QUOTA is not set > -# CONFIG_XFS_POSIX_ACL is not set > -# CONFIG_XFS_RT is not set > -# CONFIG_XFS_DEBUG is not set > -CONFIG_GFS2_FS=m > -# CONFIG_GFS2_FS_LOCKING_DLM is not set > -CONFIG_OCFS2_FS=m > -CONFIG_OCFS2_FS_O2CB=m > -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m > -CONFIG_OCFS2_FS_STATS=y > -CONFIG_OCFS2_DEBUG_MASKLOG=y > -# CONFIG_OCFS2_DEBUG_FS is not set > -CONFIG_BTRFS_FS=m > -# CONFIG_BTRFS_FS_POSIX_ACL is not set > -# CONFIG_NILFS2_FS is not set > -CONFIG_FS_POSIX_ACL=y > -CONFIG_EXPORTFS=y > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY_USER=y > -CONFIG_FANOTIFY=y > -CONFIG_QUOTA=y > -# CONFIG_QUOTA_NETLINK_INTERFACE is not set > -CONFIG_PRINT_QUOTA_WARNING=y > -# CONFIG_QUOTA_DEBUG is not set > -CONFIG_QUOTA_TREE=y > -# CONFIG_QFMT_V1 is not set > -CONFIG_QFMT_V2=y > -CONFIG_QUOTACTL=y > -CONFIG_AUTOFS4_FS=m > -CONFIG_FUSE_FS=m > -# CONFIG_CUSE is not set > -CONFIG_GENERIC_ACL=y > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -CONFIG_ISO9660_FS=m > -CONFIG_JOLIET=y > -CONFIG_ZISOFS=y > -CONFIG_UDF_FS=m > -CONFIG_UDF_NLS=y > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -CONFIG_NTFS_FS=m > -# CONFIG_NTFS_DEBUG is not set > -CONFIG_NTFS_RW=y > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -CONFIG_TMPFS_POSIX_ACL=y > -# CONFIG_HUGETLB_PAGE is not set > -CONFIG_CONFIGFS_FS=m > -CONFIG_MISC_FILESYSTEMS=y > -CONFIG_ADFS_FS=m > -# CONFIG_ADFS_FS_RW is not set > -CONFIG_AFFS_FS=m > -# CONFIG_ECRYPT_FS is not set > -CONFIG_UNION_FS=m > -CONFIG_UNION_FS_XATTR=y > -# CONFIG_UNION_FS_DEBUG is not set > -CONFIG_HFS_FS=m > -CONFIG_HFSPLUS_FS=m > -CONFIG_BEFS_FS=m > -# CONFIG_BEFS_DEBUG is not set > -CONFIG_BFS_FS=m > -CONFIG_EFS_FS=m > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -CONFIG_JFFS2_SUMMARY=y > -CONFIG_JFFS2_FS_XATTR=y > -CONFIG_JFFS2_FS_POSIX_ACL=y > -CONFIG_JFFS2_FS_SECURITY=y > -CONFIG_JFFS2_COMPRESSION_OPTIONS=y > -CONFIG_JFFS2_ZLIB=y > -CONFIG_JFFS2_LZO=y > -CONFIG_JFFS2_RTIME=y > -CONFIG_JFFS2_RUBIN=y > -# CONFIG_JFFS2_CMODE_NONE is not set > -# CONFIG_JFFS2_CMODE_PRIORITY is not set > -# CONFIG_JFFS2_CMODE_SIZE is not set > -CONFIG_JFFS2_CMODE_FAVOURLZO=y > -CONFIG_UBIFS_FS=y > -CONFIG_UBIFS_FS_XATTR=y > -CONFIG_UBIFS_FS_ADVANCED_COMPR=y > -CONFIG_UBIFS_FS_LZO=y > -CONFIG_UBIFS_FS_ZLIB=y > -# CONFIG_UBIFS_FS_DEBUG is not set > -CONFIG_LOGFS=m > -CONFIG_CRAMFS=m > -CONFIG_SQUASHFS=y > -# CONFIG_SQUASHFS_XATTR is not set > -CONFIG_SQUASHFS_LZO=y > -CONFIG_SQUASHFS_XZ=y > -# CONFIG_SQUASHFS_EMBEDDED is not set > -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 > -CONFIG_VXFS_FS=m > -CONFIG_MINIX_FS=m > -CONFIG_OMFS_FS=m > -CONFIG_HPFS_FS=m > -CONFIG_QNX4FS_FS=m > -CONFIG_ROMFS_FS=m > -CONFIG_ROMFS_BACKED_BY_BLOCK=y > -# CONFIG_ROMFS_BACKED_BY_MTD is not set > -# CONFIG_ROMFS_BACKED_BY_BOTH is not set > -CONFIG_ROMFS_ON_BLOCK=y > -CONFIG_PSTORE=y > -CONFIG_SYSV_FS=m > -CONFIG_UFS_FS=m > -# CONFIG_UFS_FS_WRITE is not set > -# CONFIG_UFS_DEBUG is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -CONFIG_NFS_V4=y > -# CONFIG_NFS_V4_1 is not set > -CONFIG_ROOT_NFS=y > -# CONFIG_NFS_USE_LEGACY_DNS is not set > -CONFIG_NFS_USE_KERNEL_DNS=y > -# CONFIG_NFS_USE_NEW_IDMAPPER is not set > -CONFIG_NFSD=m > -CONFIG_NFSD_DEPRECATED=y > -CONFIG_NFSD_V2_ACL=y > -CONFIG_NFSD_V3=y > -CONFIG_NFSD_V3_ACL=y > -CONFIG_NFSD_V4=y > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_NFS_ACL_SUPPORT=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -CONFIG_SUNRPC_GSS=y > -CONFIG_RPCSEC_GSS_KRB5=m > -CONFIG_CEPH_FS=m > -CONFIG_CIFS=m > -CONFIG_CIFS_STATS=y > -CONFIG_CIFS_STATS2=y > -# CONFIG_CIFS_WEAK_PW_HASH is not set > -# CONFIG_CIFS_UPCALL is not set > -# CONFIG_CIFS_XATTR is not set > -# CONFIG_CIFS_DEBUG2 is not set > -# CONFIG_CIFS_DFS_UPCALL is not set > -CONFIG_CIFS_EXPERIMENTAL=y > -CONFIG_NCP_FS=m > -# CONFIG_NCPFS_PACKET_SIGNING is not set > -# CONFIG_NCPFS_IOCTL_LOCKING is not set > -# CONFIG_NCPFS_STRONG is not set > -# CONFIG_NCPFS_NFS_NS is not set > -# CONFIG_NCPFS_OS2_NS is not set > -# CONFIG_NCPFS_SMALLDOS is not set > -# CONFIG_NCPFS_NLS is not set > -# CONFIG_NCPFS_EXTRAS is not set > -CONFIG_CODA_FS=m > -CONFIG_AFS_FS=m > -# CONFIG_AFS_DEBUG is not set > -CONFIG_9P_FS=m > -# CONFIG_9P_FS_POSIX_ACL is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -CONFIG_MAC_PARTITION=y > -CONFIG_MSDOS_PARTITION=y > -CONFIG_BSD_DISKLABEL=y > -CONFIG_MINIX_SUBPARTITION=y > -CONFIG_SOLARIS_X86_PARTITION=y > -# CONFIG_UNIXWARE_DISKLABEL is not set > -CONFIG_LDM_PARTITION=y > -CONFIG_LDM_DEBUG=y > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -CONFIG_EFI_PARTITION=y > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -CONFIG_NLS_CODEPAGE_737=m > -CONFIG_NLS_CODEPAGE_775=m > -CONFIG_NLS_CODEPAGE_850=m > -CONFIG_NLS_CODEPAGE_852=m > -CONFIG_NLS_CODEPAGE_855=m > -CONFIG_NLS_CODEPAGE_857=m > -CONFIG_NLS_CODEPAGE_860=m > -CONFIG_NLS_CODEPAGE_861=m > -CONFIG_NLS_CODEPAGE_862=m > -CONFIG_NLS_CODEPAGE_863=m > -CONFIG_NLS_CODEPAGE_864=m > -CONFIG_NLS_CODEPAGE_865=m > -CONFIG_NLS_CODEPAGE_866=m > -CONFIG_NLS_CODEPAGE_869=m > -CONFIG_NLS_CODEPAGE_936=m > -CONFIG_NLS_CODEPAGE_950=m > -CONFIG_NLS_CODEPAGE_932=m > -CONFIG_NLS_CODEPAGE_949=m > -CONFIG_NLS_CODEPAGE_874=m > -CONFIG_NLS_ISO8859_8=m > -CONFIG_NLS_CODEPAGE_1250=m > -CONFIG_NLS_CODEPAGE_1251=m > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -CONFIG_NLS_ISO8859_2=m > -CONFIG_NLS_ISO8859_3=m > -CONFIG_NLS_ISO8859_4=m > -CONFIG_NLS_ISO8859_5=m > -CONFIG_NLS_ISO8859_6=m > -CONFIG_NLS_ISO8859_7=m > -CONFIG_NLS_ISO8859_9=m > -CONFIG_NLS_ISO8859_13=m > -CONFIG_NLS_ISO8859_14=m > -CONFIG_NLS_ISO8859_15=m > -CONFIG_NLS_KOI8_R=m > -CONFIG_NLS_KOI8_U=m > -CONFIG_NLS_UTF8=y > -CONFIG_DLM=m > -# CONFIG_DLM_DEBUG is not set > - > -# > -# Kernel hacking > -# > -CONFIG_PRINTK_TIME=y > -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 > -CONFIG_ENABLE_WARN_DEPRECATED=y > -CONFIG_ENABLE_MUST_CHECK=y > -CONFIG_FRAME_WARN=1024 > -CONFIG_MAGIC_SYSRQ=y > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -# CONFIG_DEBUG_SECTION_MISMATCH is not set > -CONFIG_DEBUG_KERNEL=y > -# CONFIG_DEBUG_SHIRQ is not set > -# CONFIG_LOCKUP_DETECTOR is not set > -# CONFIG_HARDLOCKUP_DETECTOR is not set > -CONFIG_DETECT_HUNG_TASK=y > -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set > -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 > -CONFIG_SCHED_DEBUG=y > -CONFIG_SCHEDSTATS=y > -CONFIG_TIMER_STATS=y > -# CONFIG_DEBUG_OBJECTS is not set > -# CONFIG_DEBUG_SLAB is not set > -# CONFIG_DEBUG_KMEMLEAK is not set > -CONFIG_DEBUG_PREEMPT=y > -# CONFIG_DEBUG_RT_MUTEXES is not set > -# CONFIG_RT_MUTEX_TESTER is not set > -# CONFIG_DEBUG_SPINLOCK is not set > -CONFIG_DEBUG_MUTEXES=y > -# CONFIG_DEBUG_LOCK_ALLOC is not set > -# CONFIG_PROVE_LOCKING is not set > -# CONFIG_SPARSE_RCU_POINTER is not set > -# CONFIG_LOCK_STAT is not set > -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set > -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set > -# CONFIG_DEBUG_KOBJECT is not set > -# CONFIG_DEBUG_BUGVERBOSE is not set > -# CONFIG_DEBUG_INFO is not set > -# CONFIG_DEBUG_VM is not set > -# CONFIG_DEBUG_WRITECOUNT is not set > -# CONFIG_DEBUG_MEMORY_INIT is not set > -# CONFIG_DEBUG_LIST is not set > -# CONFIG_TEST_LIST_SORT is not set > -# CONFIG_DEBUG_SG is not set > -# CONFIG_DEBUG_NOTIFIERS is not set > -# CONFIG_DEBUG_CREDENTIALS is not set > -# CONFIG_BOOT_PRINTK_DELAY is not set > -# CONFIG_RCU_TORTURE_TEST is not set > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_BACKTRACE_SELF_TEST is not set > -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set > -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set > -# CONFIG_LKDTM is not set > -# CONFIG_FAULT_INJECTION is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -# CONFIG_DEBUG_PAGEALLOC is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y > -CONFIG_HAVE_DYNAMIC_FTRACE=y > -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y > -CONFIG_HAVE_C_RECORDMCOUNT=y > -CONFIG_RING_BUFFER=y > -CONFIG_RING_BUFFER_ALLOW_SWAP=y > -CONFIG_TRACING_SUPPORT=y > -CONFIG_FTRACE=y > -# CONFIG_FUNCTION_TRACER is not set > -# CONFIG_IRQSOFF_TRACER is not set > -# CONFIG_PREEMPT_TRACER is not set > -# CONFIG_SCHED_TRACER is not set > -# CONFIG_ENABLE_DEFAULT_TRACERS is not set > -CONFIG_BRANCH_PROFILE_NONE=y > -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set > -# CONFIG_PROFILE_ALL_BRANCHES is not set > -# CONFIG_STACK_TRACER is not set > -# CONFIG_BLK_DEV_IO_TRACE is not set > -# CONFIG_RING_BUFFER_BENCHMARK is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_DMA_API_DEBUG is not set > -# CONFIG_ATOMIC64_SELFTEST is not set > -# CONFIG_ASYNC_RAID6_TEST is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_KGDB is not set > -# CONFIG_TEST_KSTRTOX is not set > -# CONFIG_STRICT_DEVMEM is not set > -CONFIG_ARM_UNWIND=y > -# CONFIG_DEBUG_USER is not set > -# CONFIG_DEBUG_STACK_USAGE is not set > -# CONFIG_DEBUG_LL is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -CONFIG_KEYS=y > -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set > -# CONFIG_SECURITY_DMESG_RESTRICT is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_XOR_BLOCKS=m > -CONFIG_ASYNC_CORE=m > -CONFIG_ASYNC_MEMCPY=m > -CONFIG_ASYNC_XOR=m > -CONFIG_ASYNC_PQ=m > -CONFIG_ASYNC_RAID6_RECOV=m > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -CONFIG_CRYPTO_ALGAPI=y > -CONFIG_CRYPTO_ALGAPI2=y > -CONFIG_CRYPTO_AEAD=m > -CONFIG_CRYPTO_AEAD2=y > -CONFIG_CRYPTO_BLKCIPHER=y > -CONFIG_CRYPTO_BLKCIPHER2=y > -CONFIG_CRYPTO_HASH=y > -CONFIG_CRYPTO_HASH2=y > -CONFIG_CRYPTO_RNG=m > -CONFIG_CRYPTO_RNG2=y > -CONFIG_CRYPTO_PCOMP2=y > -CONFIG_CRYPTO_MANAGER=y > -CONFIG_CRYPTO_MANAGER2=y > -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y > -CONFIG_CRYPTO_GF128MUL=m > -CONFIG_CRYPTO_NULL=m > -CONFIG_CRYPTO_WORKQUEUE=y > -CONFIG_CRYPTO_CRYPTD=m > -CONFIG_CRYPTO_AUTHENC=m > -CONFIG_CRYPTO_TEST=m > - > -# > -# Authenticated Encryption with Associated Data > -# > -CONFIG_CRYPTO_CCM=m > -CONFIG_CRYPTO_GCM=m > -CONFIG_CRYPTO_SEQIV=m > - > -# > -# Block modes > -# > -CONFIG_CRYPTO_CBC=y > -CONFIG_CRYPTO_CTR=m > -CONFIG_CRYPTO_CTS=m > -CONFIG_CRYPTO_ECB=y > -CONFIG_CRYPTO_LRW=m > -CONFIG_CRYPTO_PCBC=m > -CONFIG_CRYPTO_XTS=m > - > -# > -# Hash modes > -# > -CONFIG_CRYPTO_HMAC=m > -CONFIG_CRYPTO_XCBC=m > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -CONFIG_CRYPTO_CRC32C=y > -CONFIG_CRYPTO_GHASH=m > -CONFIG_CRYPTO_MD4=m > -CONFIG_CRYPTO_MD5=y > -CONFIG_CRYPTO_MICHAEL_MIC=y > -CONFIG_CRYPTO_RMD128=m > -CONFIG_CRYPTO_RMD160=m > -CONFIG_CRYPTO_RMD256=m > -CONFIG_CRYPTO_RMD320=m > -CONFIG_CRYPTO_SHA1=m > -CONFIG_CRYPTO_SHA256=m > -CONFIG_CRYPTO_SHA512=m > -CONFIG_CRYPTO_TGR192=m > -CONFIG_CRYPTO_WP512=m > - > -# > -# Ciphers > -# > -CONFIG_CRYPTO_AES=y > -CONFIG_CRYPTO_ANUBIS=m > -CONFIG_CRYPTO_ARC4=y > -CONFIG_CRYPTO_BLOWFISH=m > -CONFIG_CRYPTO_CAMELLIA=m > -CONFIG_CRYPTO_CAST5=m > -CONFIG_CRYPTO_CAST6=m > -CONFIG_CRYPTO_DES=y > -CONFIG_CRYPTO_FCRYPT=m > -CONFIG_CRYPTO_KHAZAD=m > -CONFIG_CRYPTO_SALSA20=m > -CONFIG_CRYPTO_SEED=m > -CONFIG_CRYPTO_SERPENT=m > -CONFIG_CRYPTO_TEA=m > -CONFIG_CRYPTO_TWOFISH=m > -CONFIG_CRYPTO_TWOFISH_COMMON=m > - > -# > -# Compression > -# > -CONFIG_CRYPTO_DEFLATE=y > -# CONFIG_CRYPTO_ZLIB is not set > -CONFIG_CRYPTO_LZO=y > - > -# > -# Random Number Generation > -# > -CONFIG_CRYPTO_ANSI_CPRNG=m > -CONFIG_CRYPTO_USER_API=m > -CONFIG_CRYPTO_USER_API_HASH=m > -CONFIG_CRYPTO_USER_API_SKCIPHER=m > -CONFIG_CRYPTO_HW=y > -CONFIG_CRYPTO_DEV_OMAP_SHAM=m > -CONFIG_CRYPTO_DEV_OMAP_AES=m > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_RAID6_PQ=m > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=y > -CONFIG_CRC16=y > -CONFIG_CRC_T10DIF=y > -CONFIG_CRC_ITU_T=y > -CONFIG_CRC32=y > -CONFIG_CRC7=y > -CONFIG_LIBCRC32C=y > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_LZO_COMPRESS=y > -CONFIG_LZO_DECOMPRESS=y > -CONFIG_XZ_DEC=y > -CONFIG_XZ_DEC_X86=y > -CONFIG_XZ_DEC_POWERPC=y > -CONFIG_XZ_DEC_IA64=y > -CONFIG_XZ_DEC_ARM=y > -CONFIG_XZ_DEC_ARMTHUMB=y > -CONFIG_XZ_DEC_SPARC=y > -CONFIG_XZ_DEC_BCJ=y > -CONFIG_XZ_DEC_TEST=m > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_DECOMPRESS_XZ=y > -CONFIG_DECOMPRESS_LZO=y > -CONFIG_TEXTSEARCH=y > -CONFIG_TEXTSEARCH_KMP=m > -CONFIG_TEXTSEARCH_BM=m > -CONFIG_TEXTSEARCH_FSM=m > -CONFIG_BTREE=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > -CONFIG_AVERAGE=y > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/defconfig > b/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/defconfig > deleted file mode 100644 > index 6f97d93..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/beagleboard/defconfig > +++ /dev/null > @@ -1,3517 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux/arm 2.6.39 Kernel Configuration > -# Sun Jun 5 11:03:19 2011 > -# > -CONFIG_ARM=y > -CONFIG_HAVE_PWM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_HAVE_SCHED_CLOCK=y > -CONFIG_GENERIC_GPIO=y > -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_KTIME_SCALAR=y > -CONFIG_HAVE_PROC_CPU=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_NEED_DMA_MAP_STATE=y > -CONFIG_VECTORS_BASE=0xffff0000 > -# CONFIG_ARM_PATCH_PHYS_VIRT is not set > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > -CONFIG_HAVE_IRQ_WORK=y > -CONFIG_IRQ_WORK=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_CROSS_COMPILE="" > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZMA=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -CONFIG_BSD_PROCESS_ACCT=y > -# CONFIG_BSD_PROCESS_ACCT_V3 is not set > -CONFIG_FHANDLE=y > -CONFIG_TASKSTATS=y > -CONFIG_TASK_DELAY_ACCT=y > -CONFIG_TASK_XACCT=y > -CONFIG_TASK_IO_ACCOUNTING=y > -# CONFIG_AUDIT is not set > -CONFIG_HAVE_GENERIC_HARDIRQS=y > - > -# > -# IRQ subsystem > -# > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_HAVE_SPARSE_IRQ=y > -CONFIG_GENERIC_IRQ_SHOW=y > -# CONFIG_SPARSE_IRQ is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TINY_RCU=y > -# CONFIG_PREEMPT_RCU is not set > -# CONFIG_RCU_TRACE is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=16 > -CONFIG_CGROUPS=y > -# CONFIG_CGROUP_DEBUG is not set > -CONFIG_CGROUP_NS=y > -CONFIG_CGROUP_FREEZER=y > -CONFIG_CGROUP_DEVICE=y > -CONFIG_CPUSETS=y > -CONFIG_PROC_PID_CPUSET=y > -CONFIG_CGROUP_CPUACCT=y > -CONFIG_RESOURCE_COUNTERS=y > -CONFIG_CGROUP_MEM_RES_CTLR=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y > -CONFIG_CGROUP_PERF=y > -CONFIG_CGROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -CONFIG_RT_GROUP_SCHED=y > -CONFIG_BLK_CGROUP=y > -# CONFIG_DEBUG_BLK_CGROUP is not set > -CONFIG_NAMESPACES=y > -CONFIG_UTS_NS=y > -CONFIG_IPC_NS=y > -CONFIG_USER_NS=y > -CONFIG_PID_NS=y > -CONFIG_NET_NS=y > -CONFIG_SCHED_AUTOGROUP=y > -CONFIG_MM_OWNER=y > -# CONFIG_SYSFS_DEPRECATED is not set > -# CONFIG_RELAY is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -CONFIG_RD_BZIP2=y > -CONFIG_RD_LZMA=y > -CONFIG_RD_XZ=y > -CONFIG_RD_LZO=y > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EXPERT=y > -CONFIG_UID16=y > -# CONFIG_SYSCTL_SYSCALL is not set > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_ALL is not set > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > -CONFIG_EMBEDDED=y > -CONFIG_HAVE_PERF_EVENTS=y > -CONFIG_PERF_USE_VMALLOC=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_PERF_EVENTS=y > -# CONFIG_PERF_COUNTERS is not set > -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set > -CONFIG_VM_EVENT_COUNTERS=y > -# CONFIG_COMPAT_BRK is not set > -CONFIG_SLAB=y > -# CONFIG_SLUB is not set > -# CONFIG_SLOB is not set > -CONFIG_PROFILING=y > -CONFIG_OPROFILE=y > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y > -CONFIG_HAVE_CLK=y > -CONFIG_HAVE_DMA_API_DEBUG=y > -CONFIG_HAVE_HW_BREAKPOINT=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -CONFIG_MODULE_FORCE_LOAD=y > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -CONFIG_MODULE_SRCVERSION_ALL=y > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -CONFIG_BLK_DEV_BSG=y > -CONFIG_BLK_DEV_INTEGRITY=y > -CONFIG_BLK_DEV_THROTTLING=y > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -CONFIG_IOSCHED_DEADLINE=y > -CONFIG_IOSCHED_CFQ=y > -CONFIG_CFQ_GROUP_IOSCHED=y > -# CONFIG_DEFAULT_DEADLINE is not set > -CONFIG_DEFAULT_CFQ=y > -# CONFIG_DEFAULT_NOOP is not set > -CONFIG_DEFAULT_IOSCHED="cfq" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -CONFIG_INLINE_SPIN_UNLOCK=y > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -CONFIG_INLINE_READ_UNLOCK=y > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -CONFIG_INLINE_READ_UNLOCK_IRQ=y > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -CONFIG_INLINE_WRITE_UNLOCK=y > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_VEXPRESS is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_CNS3XXX is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_MXS is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_LPC32XX is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_NUC93X is not set > -# CONFIG_ARCH_TEGRA is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_SHMOBILE is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5P64X0 is not set > -# CONFIG_ARCH_S5P6442 is not set > -# CONFIG_ARCH_S5PC100 is not set > -# CONFIG_ARCH_S5PV210 is not set > -# CONFIG_ARCH_EXYNOS4 is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_TCC_926 is not set > -# CONFIG_ARCH_U300 is not set > -# CONFIG_ARCH_U8500 is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_DAVINCI is not set > -CONFIG_ARCH_OMAP=y > -# CONFIG_PLAT_SPEAR is not set > -# CONFIG_ARCH_VT8500 is not set > -# CONFIG_GPIO_PCA953X is not set > -# CONFIG_KEYBOARD_GPIO_POLLED is not set > - > -# > -# TI OMAP Common Features > -# > -CONFIG_ARCH_OMAP_OTG=y > -# CONFIG_ARCH_OMAP1 is not set > -CONFIG_ARCH_OMAP2PLUS=y > - > -# > -# OMAP Feature Selections > -# > -CONFIG_OMAP_SMARTREFLEX=y > -CONFIG_OMAP_SMARTREFLEX_CLASS3=y > -CONFIG_OMAP_RESET_CLOCKS=y > -# CONFIG_OMAP_MUX is not set > -CONFIG_OMAP_MCBSP=y > -CONFIG_OMAP_MBOX_FWK=m > -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 > -CONFIG_OMAP_IOMMU=y > -CONFIG_OMAP_IOMMU_DEBUG=m > -CONFIG_OMAP_32K_TIMER=y > -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set > -CONFIG_OMAP_32K_TIMER_HZ=128 > -CONFIG_OMAP_DM_TIMER=y > -# CONFIG_OMAP_PM_NONE is not set > -CONFIG_OMAP_PM_NOOP=y > - > -# > -# TI OMAP2/3/4 Specific Features > -# > -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y > -# CONFIG_ARCH_OMAP2 is not set > -CONFIG_ARCH_OMAP3=y > -# CONFIG_ARCH_OMAP4 is not set > -CONFIG_SOC_OMAP3430=y > -# CONFIG_SOC_OMAPTI816X is not set > -CONFIG_OMAP_PACKAGE_CBB=y > - > -# > -# OMAP Board Type > -# > -CONFIG_MACH_OMAP3_BEAGLE=y > -# CONFIG_MACH_DEVKIT8000 is not set > -# CONFIG_MACH_OMAP_LDP is not set > -# CONFIG_MACH_OMAP3530_LV_SOM is not set > -# CONFIG_MACH_OMAP3_TORPEDO is not set > -CONFIG_MACH_OVERO=y > -CONFIG_MACH_OMAP3EVM=y > -# CONFIG_MACH_OMAP3517EVM is not set > -# CONFIG_MACH_CRANEBOARD is not set > -# CONFIG_MACH_OMAP3_PANDORA is not set > -CONFIG_MACH_OMAP3_TOUCHBOOK=y > -# CONFIG_MACH_OMAP_3430SDP is not set > -# CONFIG_MACH_NOKIA_RM680 is not set > -# CONFIG_MACH_NOKIA_RX51 is not set > -CONFIG_MACH_OMAP_ZOOM2=y > -# CONFIG_MACH_OMAP_ZOOM3 is not set > -# CONFIG_MACH_CM_T35 is not set > -# CONFIG_MACH_CM_T3517 is not set > -# CONFIG_MACH_IGEP0020 is not set > -# CONFIG_MACH_IGEP0030 is not set > -# CONFIG_MACH_SBC3530 is not set > -# CONFIG_MACH_OMAP_3630SDP is not set > -# CONFIG_OMAP3_EMU is not set > -# CONFIG_OMAP3_SDRC_AC_TIMING is not set > - > -# > -# System MMU > -# > - > -# > -# Processor Type > -# > -CONFIG_CPU_V7=y > -CONFIG_CPU_32v6K=y > -CONFIG_CPU_32v7=y > -CONFIG_CPU_ABRT_EV7=y > -CONFIG_CPU_PABRT_V7=y > -CONFIG_CPU_CACHE_V7=y > -CONFIG_CPU_CACHE_VIPT=y > -CONFIG_CPU_COPY_V6=y > -CONFIG_CPU_TLB_V7=y > -CONFIG_CPU_HAS_ASID=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -CONFIG_ARM_THUMBEE=y > -# CONFIG_SWP_EMULATE is not set > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_BPREDICT_DISABLE is not set > -CONFIG_ARM_L1_CACHE_SHIFT_6=y > -CONFIG_ARM_L1_CACHE_SHIFT=6 > -CONFIG_ARM_DMA_MEM_BUFFERABLE=y > -CONFIG_ARM_ERRATA_430973=y > -# CONFIG_ARM_ERRATA_458693 is not set > -# CONFIG_ARM_ERRATA_460075 is not set > -# CONFIG_ARM_ERRATA_743622 is not set > -# CONFIG_ARM_ERRATA_754322 is not set > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -CONFIG_PREEMPT_VOLUNTARY=y > -# CONFIG_PREEMPT is not set > -CONFIG_HZ=128 > -# CONFIG_THUMB2_KERNEL is not set > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_HAVE_MEMBLOCK=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=4 > -CONFIG_COMPACTION=y > -CONFIG_MIGRATION=y > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=0 > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_NEED_PER_CPU_KM=y > -CONFIG_FORCE_MAX_ZONEORDER=11 > -CONFIG_LEDS=y > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > -# CONFIG_SECCOMP is not set > -# CONFIG_CC_STACKPROTECTOR is not set > -# CONFIG_DEPRECATED_PARAM_STRUCT is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE=" debug " > -# CONFIG_CMDLINE_FORCE is not set > -# CONFIG_XIP_KERNEL is not set > -CONFIG_KEXEC=y > -CONFIG_ATAGS_PROC=y > -# CONFIG_CRASH_DUMP is not set > -CONFIG_AUTO_ZRELADDR=y > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -CONFIG_CPU_FREQ_STAT_DETAILS=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -CONFIG_VFP=y > -CONFIG_VFPv3=y > -CONFIG_NEON=y > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -CONFIG_BINFMT_AOUT=m > -CONFIG_BINFMT_MISC=y > - > -# > -# Power management options > -# > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -CONFIG_PM_SLEEP=y > -CONFIG_PM_RUNTIME=y > -CONFIG_PM=y > -CONFIG_PM_DEBUG=y > -# CONFIG_PM_VERBOSE is not set > -# CONFIG_PM_ADVANCED_DEBUG is not set > -# CONFIG_PM_TEST_SUSPEND is not set > -CONFIG_CAN_PM_TRACE=y > -# CONFIG_APM_EMULATION is not set > -CONFIG_ARCH_HAS_OPP=y > -CONFIG_PM_OPP=y > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -CONFIG_XFRM_IPCOMP=m > -CONFIG_NET_KEY=y > -# CONFIG_NET_KEY_MIGRATE is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_ROUTE_CLASSID=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -CONFIG_IP_PNP_BOOTP=y > -CONFIG_IP_PNP_RARP=y > -CONFIG_NET_IPIP=m > -CONFIG_NET_IPGRE_DEMUX=m > -CONFIG_NET_IPGRE=m > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -CONFIG_INET_AH=m > -CONFIG_INET_ESP=m > -CONFIG_INET_IPCOMP=m > -CONFIG_INET_XFRM_TUNNEL=m > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -CONFIG_INET_LRO=y > -CONFIG_INET_DIAG=m > -CONFIG_INET_TCP_DIAG=m > -CONFIG_TCP_CONG_ADVANCED=y > -CONFIG_TCP_CONG_BIC=m > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_TCP_CONG_WESTWOOD=m > -CONFIG_TCP_CONG_HTCP=m > -CONFIG_TCP_CONG_HSTCP=m > -CONFIG_TCP_CONG_HYBLA=m > -CONFIG_TCP_CONG_VEGAS=m > -CONFIG_TCP_CONG_SCALABLE=m > -CONFIG_TCP_CONG_LP=m > -CONFIG_TCP_CONG_VENO=m > -CONFIG_TCP_CONG_YEAH=m > -CONFIG_TCP_CONG_ILLINOIS=m > -CONFIG_DEFAULT_CUBIC=y > -# CONFIG_DEFAULT_RENO is not set > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -CONFIG_INET6_AH=m > -CONFIG_INET6_ESP=m > -CONFIG_INET6_IPCOMP=m > -CONFIG_IPV6_MIP6=m > -CONFIG_INET6_XFRM_TUNNEL=m > -CONFIG_INET6_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -CONFIG_IPV6_TUNNEL=m > -CONFIG_IPV6_MULTIPLE_TABLES=y > -CONFIG_IPV6_SUBTREES=y > -CONFIG_IPV6_MROUTE=y > -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y > -# CONFIG_IPV6_PIMSM_V2 is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETWORK_PHY_TIMESTAMPING=y > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > -CONFIG_BRIDGE_NETFILTER=y > - > -# > -# Core Netfilter Configuration > -# > -CONFIG_NETFILTER_NETLINK=m > -CONFIG_NETFILTER_NETLINK_QUEUE=m > -CONFIG_NETFILTER_NETLINK_LOG=m > -CONFIG_NF_CONNTRACK=m > -CONFIG_NF_CONNTRACK_MARK=y > -CONFIG_NF_CONNTRACK_ZONES=y > -CONFIG_NF_CONNTRACK_EVENTS=y > -CONFIG_NF_CONNTRACK_TIMESTAMP=y > -CONFIG_NF_CT_PROTO_DCCP=m > -CONFIG_NF_CT_PROTO_GRE=m > -CONFIG_NF_CT_PROTO_SCTP=m > -CONFIG_NF_CT_PROTO_UDPLITE=m > -CONFIG_NF_CONNTRACK_AMANDA=m > -CONFIG_NF_CONNTRACK_FTP=m > -CONFIG_NF_CONNTRACK_H323=m > -CONFIG_NF_CONNTRACK_IRC=m > -CONFIG_NF_CONNTRACK_BROADCAST=m > -CONFIG_NF_CONNTRACK_NETBIOS_NS=m > -CONFIG_NF_CONNTRACK_SNMP=m > -CONFIG_NF_CONNTRACK_PPTP=m > -CONFIG_NF_CONNTRACK_SANE=m > -CONFIG_NF_CONNTRACK_SIP=m > -CONFIG_NF_CONNTRACK_TFTP=m > -CONFIG_NF_CT_NETLINK=m > -# CONFIG_NETFILTER_TPROXY is not set > -CONFIG_NETFILTER_XTABLES=m > - > -# > -# Xtables combined modules > -# > -CONFIG_NETFILTER_XT_MARK=m > -CONFIG_NETFILTER_XT_CONNMARK=m > -CONFIG_NETFILTER_XT_SET=m > - > -# > -# Xtables targets > -# > -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m > -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m > -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m > -CONFIG_NETFILTER_XT_TARGET_CT=m > -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set > -CONFIG_NETFILTER_XT_TARGET_HL=m > -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m > -# CONFIG_NETFILTER_XT_TARGET_LED is not set > -CONFIG_NETFILTER_XT_TARGET_MARK=m > -CONFIG_NETFILTER_XT_TARGET_NFLOG=m > -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m > -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set > -CONFIG_NETFILTER_XT_TARGET_RATEEST=m > -CONFIG_NETFILTER_XT_TARGET_TEE=m > -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set > -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m > -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set > - > -# > -# Xtables matches > -# > -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m > -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set > -CONFIG_NETFILTER_XT_MATCH_COMMENT=m > -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m > -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m > -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m > -CONFIG_NETFILTER_XT_MATCH_CPU=m > -CONFIG_NETFILTER_XT_MATCH_DCCP=m > -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m > -CONFIG_NETFILTER_XT_MATCH_DSCP=m > -CONFIG_NETFILTER_XT_MATCH_ESP=m > -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_HELPER=m > -CONFIG_NETFILTER_XT_MATCH_HL=m > -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m > -CONFIG_NETFILTER_XT_MATCH_IPVS=m > -CONFIG_NETFILTER_XT_MATCH_LENGTH=m > -CONFIG_NETFILTER_XT_MATCH_LIMIT=m > -CONFIG_NETFILTER_XT_MATCH_MAC=m > -CONFIG_NETFILTER_XT_MATCH_MARK=m > -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m > -# CONFIG_NETFILTER_XT_MATCH_OSF is not set > -CONFIG_NETFILTER_XT_MATCH_OWNER=m > -CONFIG_NETFILTER_XT_MATCH_POLICY=m > -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set > -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m > -CONFIG_NETFILTER_XT_MATCH_QUOTA=m > -CONFIG_NETFILTER_XT_MATCH_RATEEST=m > -CONFIG_NETFILTER_XT_MATCH_REALM=m > -CONFIG_NETFILTER_XT_MATCH_RECENT=m > -CONFIG_NETFILTER_XT_MATCH_SCTP=m > -CONFIG_NETFILTER_XT_MATCH_STATE=m > -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m > -CONFIG_NETFILTER_XT_MATCH_STRING=m > -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m > -CONFIG_NETFILTER_XT_MATCH_TIME=m > -CONFIG_NETFILTER_XT_MATCH_U32=m > -CONFIG_IP_SET=m > -CONFIG_IP_SET_MAX=256 > -# CONFIG_IP_SET_BITMAP_IP is not set > -# CONFIG_IP_SET_BITMAP_IPMAC is not set > -# CONFIG_IP_SET_BITMAP_PORT is not set > -# CONFIG_IP_SET_HASH_IP is not set > -# CONFIG_IP_SET_HASH_IPPORT is not set > -# CONFIG_IP_SET_HASH_IPPORTIP is not set > -# CONFIG_IP_SET_HASH_IPPORTNET is not set > -# CONFIG_IP_SET_HASH_NET is not set > -# CONFIG_IP_SET_HASH_NETPORT is not set > -# CONFIG_IP_SET_LIST_SET is not set > -CONFIG_IP_VS=m > -CONFIG_IP_VS_IPV6=y > -CONFIG_IP_VS_DEBUG=y > -CONFIG_IP_VS_TAB_BITS=12 > - > -# > -# IPVS transport protocol load balancing support > -# > -CONFIG_IP_VS_PROTO_TCP=y > -CONFIG_IP_VS_PROTO_UDP=y > -CONFIG_IP_VS_PROTO_AH_ESP=y > -CONFIG_IP_VS_PROTO_ESP=y > -CONFIG_IP_VS_PROTO_AH=y > -# CONFIG_IP_VS_PROTO_SCTP is not set > - > -# > -# IPVS scheduler > -# > -CONFIG_IP_VS_RR=m > -CONFIG_IP_VS_WRR=m > -CONFIG_IP_VS_LC=m > -CONFIG_IP_VS_WLC=m > -CONFIG_IP_VS_LBLC=m > -CONFIG_IP_VS_LBLCR=m > -CONFIG_IP_VS_DH=m > -CONFIG_IP_VS_SH=m > -CONFIG_IP_VS_SED=m > -CONFIG_IP_VS_NQ=m > - > -# > -# IPVS application helper > -# > -CONFIG_IP_VS_FTP=m > -CONFIG_IP_VS_NFCT=y > -CONFIG_IP_VS_PE_SIP=m > - > -# > -# IP: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV4=m > -CONFIG_NF_CONNTRACK_IPV4=m > -CONFIG_NF_CONNTRACK_PROC_COMPAT=y > -CONFIG_IP_NF_QUEUE=m > -CONFIG_IP_NF_IPTABLES=m > -CONFIG_IP_NF_MATCH_AH=m > -CONFIG_IP_NF_MATCH_ECN=m > -CONFIG_IP_NF_MATCH_TTL=m > -CONFIG_IP_NF_FILTER=m > -CONFIG_IP_NF_TARGET_REJECT=m > -CONFIG_IP_NF_TARGET_LOG=m > -CONFIG_IP_NF_TARGET_ULOG=m > -CONFIG_NF_NAT=m > -CONFIG_NF_NAT_NEEDED=y > -CONFIG_IP_NF_TARGET_MASQUERADE=m > -CONFIG_IP_NF_TARGET_NETMAP=m > -CONFIG_IP_NF_TARGET_REDIRECT=m > -CONFIG_NF_NAT_SNMP_BASIC=m > -CONFIG_NF_NAT_PROTO_DCCP=m > -CONFIG_NF_NAT_PROTO_GRE=m > -CONFIG_NF_NAT_PROTO_UDPLITE=m > -CONFIG_NF_NAT_PROTO_SCTP=m > -CONFIG_NF_NAT_FTP=m > -CONFIG_NF_NAT_IRC=m > -CONFIG_NF_NAT_TFTP=m > -CONFIG_NF_NAT_AMANDA=m > -CONFIG_NF_NAT_PPTP=m > -CONFIG_NF_NAT_H323=m > -CONFIG_NF_NAT_SIP=m > -CONFIG_IP_NF_MANGLE=m > -CONFIG_IP_NF_TARGET_CLUSTERIP=m > -CONFIG_IP_NF_TARGET_ECN=m > -CONFIG_IP_NF_TARGET_TTL=m > -CONFIG_IP_NF_RAW=m > -CONFIG_IP_NF_ARPTABLES=m > -CONFIG_IP_NF_ARPFILTER=m > -CONFIG_IP_NF_ARP_MANGLE=m > - > -# > -# IPv6: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV6=m > -CONFIG_NF_CONNTRACK_IPV6=m > -CONFIG_IP6_NF_QUEUE=m > -CONFIG_IP6_NF_IPTABLES=m > -CONFIG_IP6_NF_MATCH_AH=m > -CONFIG_IP6_NF_MATCH_EUI64=m > -CONFIG_IP6_NF_MATCH_FRAG=m > -CONFIG_IP6_NF_MATCH_OPTS=m > -CONFIG_IP6_NF_MATCH_HL=m > -CONFIG_IP6_NF_MATCH_IPV6HEADER=m > -CONFIG_IP6_NF_MATCH_MH=m > -CONFIG_IP6_NF_MATCH_RT=m > -CONFIG_IP6_NF_TARGET_HL=m > -CONFIG_IP6_NF_TARGET_LOG=m > -CONFIG_IP6_NF_FILTER=m > -CONFIG_IP6_NF_TARGET_REJECT=m > -CONFIG_IP6_NF_MANGLE=m > -CONFIG_IP6_NF_RAW=m > -# CONFIG_BRIDGE_NF_EBTABLES is not set > -CONFIG_IP_DCCP=m > -CONFIG_INET_DCCP_DIAG=m > - > -# > -# DCCP CCIDs Configuration (EXPERIMENTAL) > -# > -# CONFIG_IP_DCCP_CCID2_DEBUG is not set > -CONFIG_IP_DCCP_CCID3=y > -# CONFIG_IP_DCCP_CCID3_DEBUG is not set > -CONFIG_IP_DCCP_TFRC_LIB=y > - > -# > -# DCCP Kernel Hacking > -# > -# CONFIG_IP_DCCP_DEBUG is not set > -CONFIG_IP_SCTP=m > -# CONFIG_SCTP_DBG_MSG is not set > -# CONFIG_SCTP_DBG_OBJCNT is not set > -# CONFIG_SCTP_HMAC_NONE is not set > -# CONFIG_SCTP_HMAC_SHA1 is not set > -CONFIG_SCTP_HMAC_MD5=y > -# CONFIG_RDS is not set > -CONFIG_TIPC=m > -# CONFIG_TIPC_ADVANCED is not set > -# CONFIG_TIPC_DEBUG is not set > -CONFIG_ATM=m > -CONFIG_ATM_CLIP=m > -# CONFIG_ATM_CLIP_NO_ICMP is not set > -CONFIG_ATM_LANE=m > -CONFIG_ATM_MPOA=m > -CONFIG_ATM_BR2684=m > -# CONFIG_ATM_BR2684_IPFILTER is not set > -CONFIG_L2TP=m > -CONFIG_L2TP_DEBUGFS=m > -CONFIG_L2TP_V3=y > -CONFIG_L2TP_IP=m > -CONFIG_L2TP_ETH=m > -CONFIG_STP=m > -CONFIG_GARP=m > -CONFIG_BRIDGE=m > -CONFIG_BRIDGE_IGMP_SNOOPING=y > -# CONFIG_NET_DSA is not set > -CONFIG_VLAN_8021Q=m > -CONFIG_VLAN_8021Q_GVRP=y > -# CONFIG_DECNET is not set > -CONFIG_LLC=m > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -CONFIG_WAN_ROUTER=m > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -CONFIG_NET_SCHED=y > - > -# > -# Queueing/Scheduling > -# > -CONFIG_NET_SCH_CBQ=m > -CONFIG_NET_SCH_HTB=m > -CONFIG_NET_SCH_HFSC=m > -CONFIG_NET_SCH_ATM=m > -CONFIG_NET_SCH_PRIO=m > -CONFIG_NET_SCH_MULTIQ=m > -CONFIG_NET_SCH_RED=m > -# CONFIG_NET_SCH_SFB is not set > -CONFIG_NET_SCH_SFQ=m > -CONFIG_NET_SCH_TEQL=m > -CONFIG_NET_SCH_TBF=m > -CONFIG_NET_SCH_GRED=m > -CONFIG_NET_SCH_DSMARK=m > -CONFIG_NET_SCH_NETEM=m > -CONFIG_NET_SCH_DRR=m > -CONFIG_NET_SCH_MQPRIO=m > -CONFIG_NET_SCH_CHOKE=m > - > -# > -# Classification > -# > -CONFIG_NET_CLS=y > -CONFIG_NET_CLS_BASIC=m > -CONFIG_NET_CLS_TCINDEX=m > -CONFIG_NET_CLS_ROUTE4=m > -CONFIG_NET_CLS_FW=m > -CONFIG_NET_CLS_U32=m > -CONFIG_CLS_U32_PERF=y > -CONFIG_CLS_U32_MARK=y > -CONFIG_NET_CLS_RSVP=m > -CONFIG_NET_CLS_RSVP6=m > -CONFIG_NET_CLS_FLOW=m > -CONFIG_NET_CLS_CGROUP=m > -# CONFIG_NET_EMATCH is not set > -# CONFIG_NET_CLS_ACT is not set > -CONFIG_NET_CLS_IND=y > -CONFIG_NET_SCH_FIFO=y > -# CONFIG_DCB is not set > -CONFIG_DNS_RESOLVER=y > -# CONFIG_BATMAN_ADV is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -CONFIG_CAN=m > -CONFIG_CAN_RAW=m > -CONFIG_CAN_BCM=m > - > -# > -# CAN Device Drivers > -# > -CONFIG_CAN_VCAN=m > -CONFIG_CAN_SLCAN=m > -# CONFIG_CAN_DEV is not set > -# CONFIG_CAN_DEBUG_DEVICES is not set > -CONFIG_IRDA=m > - > -# > -# IrDA protocols > -# > -CONFIG_IRLAN=m > -CONFIG_IRNET=m > -CONFIG_IRCOMM=m > -CONFIG_IRDA_ULTRA=y > - > -# > -# IrDA options > -# > -CONFIG_IRDA_CACHE_LAST_LSAP=y > -CONFIG_IRDA_FAST_RR=y > -CONFIG_IRDA_DEBUG=y > - > -# > -# Infrared-port device drivers > -# > - > -# > -# SIR device drivers > -# > -CONFIG_IRTTY_SIR=m > - > -# > -# Dongle support > -# > -CONFIG_DONGLE=y > -CONFIG_ESI_DONGLE=m > -CONFIG_ACTISYS_DONGLE=m > -CONFIG_TEKRAM_DONGLE=m > -CONFIG_TOIM3232_DONGLE=m > -CONFIG_LITELINK_DONGLE=m > -CONFIG_MA600_DONGLE=m > -CONFIG_GIRBIL_DONGLE=m > -CONFIG_MCP2120_DONGLE=m > -CONFIG_OLD_BELKIN_DONGLE=m > -# CONFIG_ACT200L_DONGLE is not set > -CONFIG_KINGSUN_DONGLE=m > -CONFIG_KSDAZZLE_DONGLE=m > -CONFIG_KS959_DONGLE=m > - > -# > -# FIR device drivers > -# > -CONFIG_USB_IRDA=m > -CONFIG_SIGMATEL_FIR=m > -CONFIG_MCS_FIR=m > -CONFIG_BT=y > -CONFIG_BT_L2CAP=y > -CONFIG_BT_SCO=y > -CONFIG_BT_RFCOMM=m > -CONFIG_BT_RFCOMM_TTY=y > -CONFIG_BT_BNEP=m > -CONFIG_BT_BNEP_MC_FILTER=y > -CONFIG_BT_BNEP_PROTO_FILTER=y > -CONFIG_BT_HIDP=m > - > -# > -# Bluetooth device drivers > -# > -CONFIG_BT_HCIBTUSB=y > -CONFIG_BT_HCIBTSDIO=m > -CONFIG_BT_HCIUART=y > -CONFIG_BT_HCIUART_H4=y > -CONFIG_BT_HCIUART_BCSP=y > -CONFIG_BT_HCIUART_ATH3K=y > -CONFIG_BT_HCIUART_LL=y > -CONFIG_BT_HCIBCM203X=m > -CONFIG_BT_HCIBPA10X=m > -CONFIG_BT_HCIBFUSB=m > -# CONFIG_BT_HCIVHCI is not set > -CONFIG_BT_MRVL=m > -# CONFIG_BT_MRVL_SDIO is not set > -CONFIG_BT_ATH3K=m > -CONFIG_BT_WILINK=m > -CONFIG_AF_RXRPC=m > -# CONFIG_AF_RXRPC_DEBUG is not set > -# CONFIG_RXKAD is not set > -CONFIG_FIB_RULES=y > -CONFIG_WIRELESS=y > -CONFIG_WIRELESS_EXT=y > -CONFIG_WEXT_CORE=y > -CONFIG_WEXT_PROC=y > -CONFIG_WEXT_SPY=y > -CONFIG_WEXT_PRIV=y > -CONFIG_CFG80211=m > -CONFIG_NL80211_TESTMODE=y > -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set > -# CONFIG_CFG80211_REG_DEBUG is not set > -CONFIG_CFG80211_DEFAULT_PS=y > -# CONFIG_CFG80211_DEBUGFS is not set > -# CONFIG_CFG80211_INTERNAL_REGDB is not set > -CONFIG_CFG80211_WEXT=y > -CONFIG_WIRELESS_EXT_SYSFS=y > -CONFIG_LIB80211=y > -CONFIG_LIB80211_CRYPT_WEP=m > -CONFIG_LIB80211_CRYPT_CCMP=m > -CONFIG_LIB80211_CRYPT_TKIP=m > -# CONFIG_LIB80211_DEBUG is not set > -CONFIG_MAC80211=m > -CONFIG_MAC80211_HAS_RC=y > -CONFIG_MAC80211_RC_PID=y > -# CONFIG_MAC80211_RC_MINSTREL is not set > -CONFIG_MAC80211_RC_DEFAULT_PID=y > -CONFIG_MAC80211_RC_DEFAULT="pid" > -# CONFIG_MAC80211_MESH is not set > -CONFIG_MAC80211_LEDS=y > -# CONFIG_MAC80211_DEBUGFS is not set > -# CONFIG_MAC80211_DEBUG_MENU is not set > -CONFIG_WIMAX=m > -CONFIG_WIMAX_DEBUG_LEVEL=8 > -CONFIG_RFKILL=y > -CONFIG_RFKILL_LEDS=y > -CONFIG_RFKILL_INPUT=y > -CONFIG_NET_9P=m > -# CONFIG_NET_9P_DEBUG is not set > -# CONFIG_CAIF is not set > -CONFIG_CEPH_LIB=m > -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="" > -CONFIG_DEVTMPFS=y > -CONFIG_DEVTMPFS_MOUNT=y > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -CONFIG_FW_LOADER=y > -CONFIG_FIRMWARE_IN_KERNEL=y > -CONFIG_EXTRA_FIRMWARE="" > -# CONFIG_DEBUG_DRIVER is not set > -# CONFIG_DEBUG_DEVRES is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -CONFIG_SM_FTL=m > -# CONFIG_MTD_OOPS is not set > -CONFIG_MTD_SWAP=m > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -# CONFIG_MTD_M25P80 is not set > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -CONFIG_MTD_NAND_ECC=y > -# CONFIG_MTD_NAND_ECC_SMC is not set > -CONFIG_MTD_NAND=y > -# CONFIG_MTD_NAND_VERIFY_WRITE is not set > -# CONFIG_MTD_NAND_ECC_BCH is not set > -# CONFIG_MTD_SM_COMMON is not set > -# CONFIG_MTD_NAND_MUSEUM_IDS is not set > -# CONFIG_MTD_NAND_GPIO is not set > -CONFIG_MTD_NAND_OMAP2=y > -CONFIG_MTD_NAND_IDS=y > -# CONFIG_MTD_NAND_DISKONCHIP is not set > -# CONFIG_MTD_NAND_NANDSIM is not set > -CONFIG_MTD_NAND_PLATFORM=y > -# CONFIG_MTD_ALAUDA is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > -CONFIG_MTD_UBI=y > -CONFIG_MTD_UBI_WL_THRESHOLD=4096 > -CONFIG_MTD_UBI_BEB_RESERVE=1 > -# CONFIG_MTD_UBI_GLUEBI is not set > -# CONFIG_MTD_UBI_DEBUG is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=y > -CONFIG_BLK_DEV_CRYPTOLOOP=m > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=16 > -CONFIG_BLK_DEV_RAM_SIZE=16384 > -# CONFIG_BLK_DEV_XIP is not set > -CONFIG_CDROM_PKTCDVD=m > -CONFIG_CDROM_PKTCDVD_BUFFERS=8 > -# CONFIG_CDROM_PKTCDVD_WCACHE is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -# CONFIG_BLK_DEV_RBD is not set > -# CONFIG_SENSORS_LIS3LV02D is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_APDS9802ALS is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_ISL29020 is not set > -# CONFIG_SENSORS_TSL2550 is not set > -CONFIG_SENSORS_BH1780=m > -# CONFIG_SENSORS_BH1770 is not set > -# CONFIG_SENSORS_APDS990X is not set > -CONFIG_HMC6352=m > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -CONFIG_BMP085=m > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=m > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -CONFIG_EEPROM_93CX6=y > -CONFIG_IWMC3200TOP=m > -# CONFIG_IWMC3200TOP_DEBUG is not set > -# CONFIG_IWMC3200TOP_DEBUGFS is not set > - > -# > -# Texas Instruments shared transport line discipline > -# > -CONFIG_TI_ST=m > -# CONFIG_SENSORS_LIS3_SPI is not set > -# CONFIG_SENSORS_LIS3_I2C is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -CONFIG_SCSI_MOD=y > -CONFIG_RAID_ATTRS=m > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -CONFIG_BLK_DEV_SR=y > -CONFIG_BLK_DEV_SR_VENDOR=y > -CONFIG_CHR_DEV_SG=y > -CONFIG_CHR_DEV_SCH=m > -CONFIG_SCSI_MULTI_LUN=y > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -CONFIG_SCSI_ISCSI_ATTRS=m > -# CONFIG_SCSI_SAS_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -CONFIG_ISCSI_TCP=m > -CONFIG_ISCSI_BOOT_SYSFS=m > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -# CONFIG_ATA is not set > -CONFIG_MD=y > -CONFIG_BLK_DEV_MD=m > -CONFIG_MD_LINEAR=m > -CONFIG_MD_RAID0=m > -CONFIG_MD_RAID1=m > -CONFIG_MD_RAID10=m > -CONFIG_MD_RAID456=m > -CONFIG_MD_MULTIPATH=m > -CONFIG_MD_FAULTY=m > -CONFIG_BLK_DEV_DM=m > -# CONFIG_DM_DEBUG is not set > -CONFIG_DM_CRYPT=m > -CONFIG_DM_SNAPSHOT=m > -CONFIG_DM_MIRROR=m > -CONFIG_DM_RAID=m > -# CONFIG_DM_LOG_USERSPACE is not set > -CONFIG_DM_ZERO=m > -CONFIG_DM_MULTIPATH=m > -# CONFIG_DM_MULTIPATH_QL is not set > -# CONFIG_DM_MULTIPATH_ST is not set > -CONFIG_DM_DELAY=m > -# CONFIG_DM_UEVENT is not set > -CONFIG_DM_FLAKEY=m > -CONFIG_TARGET_CORE=m > -CONFIG_TCM_IBLOCK=m > -CONFIG_TCM_FILEIO=m > -CONFIG_TCM_PSCSI=m > -CONFIG_LOOPBACK_TARGET=m > -# CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set > -CONFIG_NETDEVICES=y > -CONFIG_DUMMY=m > -CONFIG_BONDING=m > -CONFIG_MACVLAN=m > -CONFIG_MACVTAP=m > -CONFIG_EQUALIZER=m > -CONFIG_TUN=m > -CONFIG_VETH=m > -CONFIG_MII=y > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -# CONFIG_LXT_PHY is not set > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -# CONFIG_SMSC_PHY is not set > -# CONFIG_BROADCOM_PHY is not set > -CONFIG_BCM63XX_PHY=m > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -# CONFIG_LSI_ET1011C_PHY is not set > -CONFIG_MICREL_PHY=m > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -# CONFIG_AX88796 is not set > -CONFIG_SMC91X=y > -# CONFIG_TI_DAVINCI_EMAC is not set > -CONFIG_TI_DAVINCI_MDIO=m > -CONFIG_TI_DAVINCI_CPDMA=m > -# CONFIG_DM9000 is not set > -CONFIG_ENC28J60=y > -# CONFIG_ENC28J60_WRITEVERIFY is not set > -# CONFIG_ETHOC is not set > -CONFIG_SMC911X=y > -CONFIG_SMSC911X=y > -# CONFIG_SMSC911X_ARCH_HOOKS is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -CONFIG_KS8842=m > -CONFIG_KS8851=y > -# CONFIG_KS8851_MLL is not set > -# CONFIG_FTMAC100 is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_LIBERTAS_THINFIRM is not set > -CONFIG_AT76C50X_USB=m > -CONFIG_USB_ZD1201=m > -CONFIG_USB_NET_RNDIS_WLAN=m > -CONFIG_RTL8187=m > -CONFIG_RTL8187_LEDS=y > -# CONFIG_MAC80211_HWSIM is not set > -# CONFIG_ATH_COMMON is not set > -CONFIG_B43=m > -# CONFIG_B43_SDIO is not set > -CONFIG_B43_PIO=y > -CONFIG_B43_PHY_N=y > -CONFIG_B43_PHY_LP=y > -CONFIG_B43_LEDS=y > -CONFIG_B43_HWRNG=y > -# CONFIG_B43_DEBUG is not set > -# CONFIG_B43LEGACY is not set > -CONFIG_HOSTAP=m > -CONFIG_HOSTAP_FIRMWARE=y > -CONFIG_HOSTAP_FIRMWARE_NVRAM=y > -# CONFIG_IWM is not set > -CONFIG_LIBERTAS=m > -CONFIG_LIBERTAS_USB=m > -# CONFIG_LIBERTAS_SDIO is not set > -# CONFIG_LIBERTAS_SPI is not set > -# CONFIG_LIBERTAS_DEBUG is not set > -# CONFIG_LIBERTAS_MESH is not set > -CONFIG_P54_COMMON=m > -CONFIG_P54_USB=m > -# CONFIG_P54_SPI is not set > -CONFIG_P54_LEDS=y > -CONFIG_RT2X00=m > -CONFIG_RT2500USB=m > -CONFIG_RT73USB=m > -# CONFIG_RT2800USB is not set > -CONFIG_RT2X00_LIB_USB=m > -CONFIG_RT2X00_LIB=m > -CONFIG_RT2X00_LIB_FIRMWARE=y > -CONFIG_RT2X00_LIB_CRYPTO=y > -CONFIG_RT2X00_LIB_LEDS=y > -# CONFIG_RT2X00_DEBUG is not set > -CONFIG_RTL8192CU=m > -CONFIG_RTLWIFI=m > -CONFIG_RTL8192C_COMMON=m > -CONFIG_WL1251=m > -CONFIG_WL1251_SPI=m > -CONFIG_WL1251_SDIO=m > -CONFIG_WL12XX_MENU=m > -CONFIG_WL12XX=m > -CONFIG_WL12XX_HT=y > -CONFIG_WL12XX_SPI=m > -CONFIG_WL12XX_SDIO=m > -# CONFIG_WL12XX_SDIO_TEST is not set > -CONFIG_WL12XX_PLATFORM_DATA=y > -CONFIG_ZD1211RW=m > -# CONFIG_ZD1211RW_DEBUG is not set > - > -# > -# WiMAX Wireless Broadband devices > -# > -CONFIG_WIMAX_I2400M=m > -CONFIG_WIMAX_I2400M_USB=m > -CONFIG_WIMAX_I2400M_SDIO=m > -CONFIG_WIMAX_IWMC3200_SDIO=y > -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 > - > -# > -# USB Network Adapters > -# > -CONFIG_USB_CATC=y > -CONFIG_USB_KAWETH=y > -CONFIG_USB_PEGASUS=y > -CONFIG_USB_RTL8150=y > -CONFIG_USB_USBNET=y > -CONFIG_USB_NET_AX8817X=y > -CONFIG_USB_NET_CDCETHER=y > -# CONFIG_USB_NET_CDC_EEM is not set > -CONFIG_USB_NET_CDC_NCM=m > -CONFIG_USB_NET_DM9601=y > -CONFIG_USB_NET_SMSC75XX=m > -CONFIG_USB_NET_SMSC95XX=y > -CONFIG_USB_NET_GL620A=y > -CONFIG_USB_NET_NET1080=y > -CONFIG_USB_NET_PLUSB=y > -CONFIG_USB_NET_MCS7830=y > -CONFIG_USB_NET_RNDIS_HOST=y > -CONFIG_USB_NET_CDC_SUBSET=y > -CONFIG_USB_ALI_M5632=y > -CONFIG_USB_AN2720=y > -CONFIG_USB_BELKIN=y > -CONFIG_USB_ARMLINUX=y > -CONFIG_USB_EPSON2888=y > -CONFIG_USB_KC2190=y > -CONFIG_USB_NET_ZAURUS=y > -CONFIG_USB_NET_CX82310_ETH=m > -CONFIG_USB_HSO=m > -CONFIG_USB_NET_INT51X1=m > -CONFIG_USB_IPHETH=m > -CONFIG_USB_SIERRA_NET=m > -CONFIG_USB_VL600=m > -# CONFIG_WAN is not set > -CONFIG_ATM_DRIVERS=y > -# CONFIG_ATM_DUMMY is not set > -# CONFIG_ATM_TCP is not set > - > -# > -# CAIF transport drivers > -# > -CONFIG_PPP=m > -CONFIG_PPP_MULTILINK=y > -CONFIG_PPP_FILTER=y > -CONFIG_PPP_ASYNC=m > -CONFIG_PPP_SYNC_TTY=m > -CONFIG_PPP_DEFLATE=m > -CONFIG_PPP_BSDCOMP=m > -CONFIG_PPP_MPPE=m > -CONFIG_PPPOE=m > -CONFIG_PPTP=m > -# CONFIG_PPPOATM is not set > -CONFIG_PPPOL2TP=m > -# CONFIG_SLIP is not set > -CONFIG_SLHC=m > -CONFIG_NETCONSOLE=m > -CONFIG_NETCONSOLE_DYNAMIC=y > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -CONFIG_INPUT_FF_MEMLESS=y > -CONFIG_INPUT_POLLDEV=y > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -CONFIG_INPUT_MOUSEDEV=y > -CONFIG_INPUT_MOUSEDEV_PSAUX=y > -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 > -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -# CONFIG_KEYBOARD_ATKBD is not set > -CONFIG_KEYBOARD_QT1070=m > -CONFIG_KEYBOARD_QT2160=m > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_TCA6416 is not set > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_LM8323 is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -CONFIG_KEYBOARD_MCS=m > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -# CONFIG_KEYBOARD_TWL4030 is not set > -# CONFIG_KEYBOARD_XTKBD is not set > -CONFIG_INPUT_MOUSE=y > -CONFIG_MOUSE_PS2=y > -CONFIG_MOUSE_PS2_ALPS=y > -CONFIG_MOUSE_PS2_LOGIPS2PP=y > -CONFIG_MOUSE_PS2_SYNAPTICS=y > -CONFIG_MOUSE_PS2_TRACKPOINT=y > -# CONFIG_MOUSE_PS2_ELANTECH is not set > -# CONFIG_MOUSE_PS2_SENTELIC is not set > -# CONFIG_MOUSE_PS2_TOUCHKIT is not set > -# CONFIG_MOUSE_SERIAL is not set > -# CONFIG_MOUSE_APPLETOUCH is not set > -# CONFIG_MOUSE_BCM5974 is not set > -# CONFIG_MOUSE_VSXXXAA is not set > -# CONFIG_MOUSE_GPIO is not set > -# CONFIG_MOUSE_SYNAPTICS_I2C is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -# CONFIG_INPUT_TOUCHSCREEN is not set > -CONFIG_INPUT_MISC=y > -CONFIG_INPUT_AD714X=m > -CONFIG_INPUT_AD714X_I2C=m > -CONFIG_INPUT_AD714X_SPI=m > -# CONFIG_INPUT_ATI_REMOTE is not set > -# CONFIG_INPUT_ATI_REMOTE2 is not set > -# CONFIG_INPUT_KEYSPAN_REMOTE is not set > -# CONFIG_INPUT_POWERMATE is not set > -# CONFIG_INPUT_YEALINK is not set > -# CONFIG_INPUT_CM109 is not set > -CONFIG_INPUT_TWL4030_PWRBUTTON=y > -CONFIG_INPUT_TWL4030_VIBRA=m > -CONFIG_INPUT_UINPUT=y > -CONFIG_INPUT_PCF8574=m > -CONFIG_INPUT_PWM_BEEPER=m > -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set > -CONFIG_INPUT_ADXL34X=m > -CONFIG_INPUT_ADXL34X_I2C=m > -CONFIG_INPUT_ADXL34X_SPI=m > -CONFIG_INPUT_CMA3000=m > -CONFIG_INPUT_CMA3000_I2C=m > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_SERIO_PS2MULT is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -CONFIG_VT_CONSOLE=y > -CONFIG_HW_CONSOLE=y > -CONFIG_VT_HW_CONSOLE_BINDING=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -# CONFIG_LEGACY_PTYS is not set > -# CONFIG_SERIAL_NONSTANDARD is not set > -CONFIG_N_GSM=m > -CONFIG_DEVKMEM=y > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=32 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 > -CONFIG_SERIAL_8250_EXTENDED=y > -CONFIG_SERIAL_8250_MANY_PORTS=y > -CONFIG_SERIAL_8250_SHARE_IRQ=y > -CONFIG_SERIAL_8250_DETECT_IRQ=y > -CONFIG_SERIAL_8250_RSA=y > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -# CONFIG_SERIAL_MAX3107 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_SERIAL_OMAP=y > -CONFIG_SERIAL_OMAP_CONSOLE=y > -# CONFIG_SERIAL_TIMBERDALE is not set > -# CONFIG_SERIAL_ALTERA_JTAGUART is not set > -# CONFIG_SERIAL_ALTERA_UART is not set > -CONFIG_SERIAL_IFX6X60=m > -CONFIG_TTY_PRINTK=y > -# CONFIG_HVC_DCC is not set > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=y > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -# CONFIG_RAMOOPS is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_MUX=m > - > -# > -# Multiplexer I2C Chip support > -# > -CONFIG_I2C_MUX_GPIO=m > -# CONFIG_I2C_MUX_PCA9541 is not set > -# CONFIG_I2C_MUX_PCA954x is not set > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=m > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -# CONFIG_I2C_DESIGNWARE is not set > -# CONFIG_I2C_GPIO is not set > -# CONFIG_I2C_OCORES is not set > -CONFIG_I2C_OMAP=y > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_PXA_PCI is not set > -# CONFIG_I2C_SIMTEC is not set > -# CONFIG_I2C_XILINX is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -CONFIG_I2C_DIOLAN_U2C=m > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_STUB is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -CONFIG_SPI=y > -# CONFIG_SPI_DEBUG is not set > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -# CONFIG_SPI_ALTERA is not set > -# CONFIG_SPI_BITBANG is not set > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_OC_TINY is not set > -CONFIG_SPI_OMAP24XX=y > -# CONFIG_SPI_PXA2XX_PCI is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -CONFIG_SPI_SPIDEV=y > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > - > -# > -# PPS generators support > -# > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_DEBUG_GPIO is not set > -CONFIG_GPIO_SYSFS=y > -CONFIG_GPIO_MAX730X=m > - > -# > -# Memory mapped GPIO expanders: > -# > -# CONFIG_GPIO_BASIC_MMIO is not set > -# CONFIG_GPIO_IT8761E is not set > - > -# > -# I2C GPIO expanders: > -# > -CONFIG_GPIO_MAX7300=m > -# CONFIG_GPIO_MAX732X is not set > -# CONFIG_GPIO_PCF857X is not set > -# CONFIG_GPIO_SX150X is not set > -CONFIG_GPIO_TWL4030=y > -CONFIG_GPIO_ADP5588=m > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > -# CONFIG_GPIO_74X164 is not set > - > -# > -# AC97 GPIO expanders: > -# > - > -# > -# MODULbus GPIO expanders: > -# > -# CONFIG_W1 is not set > -CONFIG_POWER_SUPPLY=m > -# CONFIG_POWER_SUPPLY_DEBUG is not set > -# CONFIG_PDA_POWER is not set > -CONFIG_TEST_POWER=m > -# CONFIG_BATTERY_DS2782 is not set > -# CONFIG_BATTERY_BQ20Z75 is not set > -# CONFIG_BATTERY_BQ27x00 is not set > -# CONFIG_BATTERY_MAX17040 is not set > -CONFIG_BATTERY_MAX17042=m > -CONFIG_CHARGER_ISP1704=m > -CONFIG_CHARGER_TWL4030=m > -CONFIG_CHARGER_GPIO=m > -CONFIG_HWMON=y > -# CONFIG_HWMON_VID is not set > -# CONFIG_HWMON_DEBUG_CHIP is not set > - > -# > -# Native drivers > -# > -# CONFIG_SENSORS_AD7414 is not set > -# CONFIG_SENSORS_AD7418 is not set > -# CONFIG_SENSORS_ADCXX is not set > -# CONFIG_SENSORS_ADM1021 is not set > -# CONFIG_SENSORS_ADM1025 is not set > -# CONFIG_SENSORS_ADM1026 is not set > -# CONFIG_SENSORS_ADM1029 is not set > -# CONFIG_SENSORS_ADM1031 is not set > -# CONFIG_SENSORS_ADM9240 is not set > -CONFIG_SENSORS_ADT7411=m > -# CONFIG_SENSORS_ADT7462 is not set > -# CONFIG_SENSORS_ADT7470 is not set > -# CONFIG_SENSORS_ADT7475 is not set > -CONFIG_SENSORS_ASC7621=m > -# CONFIG_SENSORS_ATXP1 is not set > -CONFIG_SENSORS_DS620=m > -# CONFIG_SENSORS_DS1621 is not set > -# CONFIG_SENSORS_F71805F is not set > -# CONFIG_SENSORS_F71882FG is not set > -# CONFIG_SENSORS_F75375S is not set > -# CONFIG_SENSORS_G760A is not set > -# CONFIG_SENSORS_GL518SM is not set > -# CONFIG_SENSORS_GL520SM is not set > -CONFIG_SENSORS_GPIO_FAN=m > -# CONFIG_SENSORS_IT87 is not set > -CONFIG_SENSORS_JC42=m > -# CONFIG_SENSORS_LINEAGE is not set > -# CONFIG_SENSORS_LM63 is not set > -# CONFIG_SENSORS_LM70 is not set > -# CONFIG_SENSORS_LM73 is not set > -# CONFIG_SENSORS_LM75 is not set > -# CONFIG_SENSORS_LM77 is not set > -# CONFIG_SENSORS_LM78 is not set > -# CONFIG_SENSORS_LM80 is not set > -# CONFIG_SENSORS_LM83 is not set > -# CONFIG_SENSORS_LM85 is not set > -# CONFIG_SENSORS_LM87 is not set > -# CONFIG_SENSORS_LM90 is not set > -# CONFIG_SENSORS_LM92 is not set > -# CONFIG_SENSORS_LM93 is not set > -# CONFIG_SENSORS_LTC4151 is not set > -# CONFIG_SENSORS_LTC4215 is not set > -# CONFIG_SENSORS_LTC4245 is not set > -# CONFIG_SENSORS_LTC4261 is not set > -# CONFIG_SENSORS_LM95241 is not set > -# CONFIG_SENSORS_MAX1111 is not set > -# CONFIG_SENSORS_MAX1619 is not set > -# CONFIG_SENSORS_MAX6639 is not set > -# CONFIG_SENSORS_MAX6650 is not set > -# CONFIG_SENSORS_PC87360 is not set > -# CONFIG_SENSORS_PC87427 is not set > -# CONFIG_SENSORS_PCF8591 is not set > -# CONFIG_PMBUS is not set > -# CONFIG_SENSORS_SHT15 is not set > -# CONFIG_SENSORS_SHT21 is not set > -CONFIG_SENSORS_SMM665=m > -# CONFIG_SENSORS_DME1737 is not set > -CONFIG_SENSORS_EMC1403=m > -CONFIG_SENSORS_EMC2103=m > -# CONFIG_SENSORS_SMSC47M1 is not set > -# CONFIG_SENSORS_SMSC47M192 is not set > -# CONFIG_SENSORS_SMSC47B397 is not set > -# CONFIG_SENSORS_SCH5627 is not set > -# CONFIG_SENSORS_ADS1015 is not set > -# CONFIG_SENSORS_ADS7828 is not set > -CONFIG_SENSORS_ADS7871=m > -CONFIG_SENSORS_AMC6821=m > -# CONFIG_SENSORS_THMC50 is not set > -CONFIG_SENSORS_TMP102=m > -# CONFIG_SENSORS_TMP401 is not set > -# CONFIG_SENSORS_TMP421 is not set > -CONFIG_SENSORS_TWL4030_MADC=m > -# CONFIG_SENSORS_VT1211 is not set > -# CONFIG_SENSORS_W83781D is not set > -# CONFIG_SENSORS_W83791D is not set > -# CONFIG_SENSORS_W83792D is not set > -# CONFIG_SENSORS_W83793 is not set > -# CONFIG_SENSORS_W83795 is not set > -# CONFIG_SENSORS_W83L785TS is not set > -# CONFIG_SENSORS_W83L786NG is not set > -# CONFIG_SENSORS_W83627HF is not set > -# CONFIG_SENSORS_W83627EHF is not set > -CONFIG_THERMAL=y > -CONFIG_THERMAL_HWMON=y > -CONFIG_WATCHDOG=y > -CONFIG_WATCHDOG_NOWAYOUT=y > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_OMAP_WATCHDOG=y > -# CONFIG_TWL4030_WATCHDOG is not set > -# CONFIG_MAX63XX_WATCHDOG is not set > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -CONFIG_SSB=y > -CONFIG_SSB_BLOCKIO=y > -CONFIG_SSB_SDIOHOST_POSSIBLE=y > -# CONFIG_SSB_SDIOHOST is not set > -# CONFIG_SSB_SILENT is not set > -# CONFIG_SSB_DEBUG is not set > -CONFIG_MFD_SUPPORT=y > -CONFIG_MFD_CORE=y > -# CONFIG_MFD_88PM860X is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_HTC_I2CPLD is not set > -CONFIG_TPS6105X=m > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507X=m > -CONFIG_TWL4030_CORE=y > -CONFIG_TWL4030_MADC=m > -CONFIG_TWL4030_POWER=y > -CONFIG_TWL4030_SCRIPT=y > -CONFIG_TWL4030_CODEC=y > -CONFIG_TWL4030_POWEROFF=y > -CONFIG_TWL6030_PWM=m > -# CONFIG_MFD_STMPE is not set > -# CONFIG_MFD_TC3589X is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_MAX8925 is not set > -# CONFIG_MFD_MAX8997 is not set > -# CONFIG_MFD_MAX8998 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X_I2C is not set > -# CONFIG_MFD_WM831X_SPI is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_WM8994 is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13XXX is not set > -# CONFIG_ABX500_CORE is not set > -# CONFIG_EZX_PCAP is not set > -CONFIG_MFD_TPS6586X=y > -CONFIG_MFD_WL1273_CORE=m > -CONFIG_MFD_OMAP_USB_HOST=y > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -CONFIG_REGULATOR_DUMMY=y > -CONFIG_REGULATOR_FIXED_VOLTAGE=y > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8649 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_MAX8952 is not set > -CONFIG_REGULATOR_TWL4030=y > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_LP3972 is not set > -CONFIG_REGULATOR_TPS6105X=m > -# CONFIG_REGULATOR_TPS65023 is not set > -# CONFIG_REGULATOR_TPS6507X is not set > -# CONFIG_REGULATOR_ISL6271A is not set > -# CONFIG_REGULATOR_AD5398 is not set > -CONFIG_REGULATOR_TPS6586X=m > -CONFIG_REGULATOR_TPS6524X=m > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_MEDIA_CONTROLLER=y > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_V4L2_SUBDEV_API=y > -CONFIG_DVB_CORE=m > -CONFIG_VIDEO_MEDIA=m > - > -# > -# Multimedia drivers > -# > -CONFIG_RC_CORE=m > -CONFIG_LIRC=m > -CONFIG_RC_MAP=m > -CONFIG_IR_NEC_DECODER=m > -CONFIG_IR_RC5_DECODER=m > -CONFIG_IR_RC6_DECODER=m > -CONFIG_IR_JVC_DECODER=m > -CONFIG_IR_SONY_DECODER=m > -CONFIG_IR_RC5_SZ_DECODER=m > -CONFIG_IR_LIRC_CODEC=m > -# CONFIG_IR_IMON is not set > -# CONFIG_IR_MCEUSB is not set > -# CONFIG_IR_STREAMZAP is not set > -CONFIG_RC_LOOPBACK=m > -CONFIG_MEDIA_ATTACH=y > -CONFIG_MEDIA_TUNER=m > -CONFIG_MEDIA_TUNER_CUSTOMISE=y > - > -# > -# Customize TV tuners > -# > -CONFIG_MEDIA_TUNER_SIMPLE=m > -CONFIG_MEDIA_TUNER_TDA8290=m > -CONFIG_MEDIA_TUNER_TDA827X=m > -CONFIG_MEDIA_TUNER_TDA18271=m > -CONFIG_MEDIA_TUNER_TDA9887=m > -CONFIG_MEDIA_TUNER_TEA5761=m > -CONFIG_MEDIA_TUNER_TEA5767=m > -CONFIG_MEDIA_TUNER_MT20XX=m > -CONFIG_MEDIA_TUNER_MT2060=m > -CONFIG_MEDIA_TUNER_MT2266=m > -CONFIG_MEDIA_TUNER_MT2131=m > -CONFIG_MEDIA_TUNER_QT1010=m > -CONFIG_MEDIA_TUNER_XC2028=m > -CONFIG_MEDIA_TUNER_XC5000=m > -CONFIG_MEDIA_TUNER_MXL5005S=m > -CONFIG_MEDIA_TUNER_MXL5007T=m > -CONFIG_MEDIA_TUNER_MC44S803=m > -CONFIG_MEDIA_TUNER_MAX2165=m > -CONFIG_MEDIA_TUNER_TDA18218=m > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_VMALLOC=m > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEOBUF_DVB=m > -CONFIG_VIDEO_TVEEPROM=m > -CONFIG_VIDEO_TUNER=m > -CONFIG_V4L2_MEM2MEM_DEV=m > -CONFIG_VIDEOBUF2_CORE=m > -CONFIG_VIDEOBUF2_MEMOPS=m > -CONFIG_VIDEOBUF2_VMALLOC=m > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -CONFIG_VIDEO_IR_I2C=m > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -CONFIG_VIDEO_MSP3400=m > -# CONFIG_VIDEO_CS5345 is not set > -CONFIG_VIDEO_CS53L32A=m > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -CONFIG_VIDEO_WM8775=m > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -CONFIG_VIDEO_ADV7180=m > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -CONFIG_VIDEO_OV7670=m > -CONFIG_VIDEO_MT9P031=y > -CONFIG_VIDEO_MT9V011=m > -CONFIG_VIDEO_MT9V032=y > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -CONFIG_VIDEO_SAA711X=m > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -CONFIG_VIDEO_TVP514X=m > -CONFIG_VIDEO_TVP5150=m > -CONFIG_VIDEO_TVP7002=m > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -CONFIG_VIDEO_CX25840=m > - > -# > -# MPEG video encoders > -# > -CONFIG_VIDEO_CX2341X=m > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > -# CONFIG_VIDEO_AK881X is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -CONFIG_VIDEO_VIVI=m > -CONFIG_VIDEO_VPSS_SYSTEM=m > -CONFIG_VIDEO_VPFE_CAPTURE=y > -CONFIG_VIDEO_DM6446_CCDC=m > -CONFIG_VIDEO_OMAP2_VOUT=y > -# CONFIG_VIDEO_CPIA2 is not set > -CONFIG_VIDEO_TIMBERDALE=m > -# CONFIG_VIDEO_AU0828 is not set > -CONFIG_VIDEO_SR030PC30=m > -CONFIG_VIDEO_NOON010PC30=m > -CONFIG_VIDEO_OMAP3=y > -CONFIG_VIDEO_OMAP3_DEBUG=y > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=m > -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y > -CONFIG_USB_GSPCA=m > -CONFIG_USB_M5602=m > -CONFIG_USB_STV06XX=m > -# CONFIG_USB_GL860 is not set > -CONFIG_USB_GSPCA_BENQ=m > -CONFIG_USB_GSPCA_CONEX=m > -CONFIG_USB_GSPCA_CPIA1=m > -CONFIG_USB_GSPCA_ETOMS=m > -CONFIG_USB_GSPCA_FINEPIX=m > -# CONFIG_USB_GSPCA_JEILINJ is not set > -CONFIG_USB_GSPCA_KONICA=m > -CONFIG_USB_GSPCA_MARS=m > -# CONFIG_USB_GSPCA_MR97310A is not set > -CONFIG_USB_GSPCA_NW80X=m > -CONFIG_USB_GSPCA_OV519=m > -CONFIG_USB_GSPCA_OV534=m > -CONFIG_USB_GSPCA_OV534_9=m > -CONFIG_USB_GSPCA_PAC207=m > -# CONFIG_USB_GSPCA_PAC7302 is not set > -CONFIG_USB_GSPCA_PAC7311=m > -CONFIG_USB_GSPCA_SN9C2028=m > -# CONFIG_USB_GSPCA_SN9C20X is not set > -CONFIG_USB_GSPCA_SONIXB=m > -CONFIG_USB_GSPCA_SONIXJ=m > -CONFIG_USB_GSPCA_SPCA500=m > -CONFIG_USB_GSPCA_SPCA501=m > -CONFIG_USB_GSPCA_SPCA505=m > -CONFIG_USB_GSPCA_SPCA506=m > -CONFIG_USB_GSPCA_SPCA508=m > -CONFIG_USB_GSPCA_SPCA561=m > -CONFIG_USB_GSPCA_SPCA1528=m > -# CONFIG_USB_GSPCA_SQ905 is not set > -# CONFIG_USB_GSPCA_SQ905C is not set > -CONFIG_USB_GSPCA_SQ930X=m > -CONFIG_USB_GSPCA_STK014=m > -# CONFIG_USB_GSPCA_STV0680 is not set > -CONFIG_USB_GSPCA_SUNPLUS=m > -CONFIG_USB_GSPCA_T613=m > -CONFIG_USB_GSPCA_TV8532=m > -CONFIG_USB_GSPCA_VC032X=m > -CONFIG_USB_GSPCA_VICAM=m > -CONFIG_USB_GSPCA_XIRLINK_CIT=m > -CONFIG_USB_GSPCA_ZC3XX=m > -CONFIG_VIDEO_PVRUSB2=m > -CONFIG_VIDEO_PVRUSB2_SYSFS=y > -CONFIG_VIDEO_PVRUSB2_DVB=y > -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set > -CONFIG_VIDEO_HDPVR=m > -CONFIG_VIDEO_EM28XX=m > -CONFIG_VIDEO_EM28XX_ALSA=m > -CONFIG_VIDEO_EM28XX_DVB=m > -CONFIG_VIDEO_TLG2300=m > -CONFIG_VIDEO_CX231XX=m > -CONFIG_VIDEO_CX231XX_RC=y > -# CONFIG_VIDEO_CX231XX_ALSA is not set > -CONFIG_VIDEO_CX231XX_DVB=m > -CONFIG_VIDEO_USBVISION=m > -CONFIG_USB_ET61X251=m > -CONFIG_USB_SN9C102=m > -CONFIG_USB_PWC=m > -# CONFIG_USB_PWC_DEBUG is not set > -CONFIG_USB_PWC_INPUT_EVDEV=y > -CONFIG_USB_ZR364XX=m > -CONFIG_USB_STKWEBCAM=m > -CONFIG_USB_S2255=m > -CONFIG_V4L_MEM2MEM_DRIVERS=y > -CONFIG_VIDEO_MEM2MEM_TESTDEV=m > -CONFIG_RADIO_ADAPTERS=y > -# CONFIG_I2C_SI4713 is not set > -# CONFIG_RADIO_SI4713 is not set > -# CONFIG_USB_DSBR is not set > -# CONFIG_RADIO_SI470X is not set > -# CONFIG_USB_MR800 is not set > -# CONFIG_RADIO_TEA5764 is not set > -CONFIG_RADIO_SAA7706H=m > -# CONFIG_RADIO_TEF6862 is not set > -CONFIG_RADIO_WL1273=m > - > -# > -# Texas Instruments WL128x FM driver (ST based) > -# > -CONFIG_RADIO_WL128X=m > -CONFIG_DVB_MAX_ADAPTERS=8 > -CONFIG_DVB_DYNAMIC_MINORS=y > -CONFIG_DVB_CAPTURE_DRIVERS=y > -# CONFIG_TTPCI_EEPROM is not set > - > -# > -# Supported USB Adapters > -# > -CONFIG_DVB_USB=m > -# CONFIG_DVB_USB_DEBUG is not set > -CONFIG_DVB_USB_A800=m > -CONFIG_DVB_USB_DIBUSB_MB=m > -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set > -CONFIG_DVB_USB_DIBUSB_MC=m > -CONFIG_DVB_USB_DIB0700=m > -CONFIG_DVB_USB_UMT_010=m > -CONFIG_DVB_USB_CXUSB=m > -CONFIG_DVB_USB_M920X=m > -CONFIG_DVB_USB_GL861=m > -CONFIG_DVB_USB_AU6610=m > -CONFIG_DVB_USB_DIGITV=m > -CONFIG_DVB_USB_VP7045=m > -CONFIG_DVB_USB_VP702X=m > -CONFIG_DVB_USB_GP8PSK=m > -CONFIG_DVB_USB_NOVA_T_USB2=m > -CONFIG_DVB_USB_TTUSB2=m > -CONFIG_DVB_USB_DTT200U=m > -CONFIG_DVB_USB_OPERA1=m > -CONFIG_DVB_USB_AF9005=m > -CONFIG_DVB_USB_AF9005_REMOTE=m > -CONFIG_DVB_USB_DW2102=m > -CONFIG_DVB_USB_CINERGY_T2=m > -CONFIG_DVB_USB_ANYSEE=m > -CONFIG_DVB_USB_DTV5100=m > -CONFIG_DVB_USB_AF9015=m > -# CONFIG_DVB_USB_CE6230 is not set > -# CONFIG_DVB_USB_FRIIO is not set > -# CONFIG_DVB_USB_EC168 is not set > -CONFIG_DVB_USB_AZ6027=m > -CONFIG_DVB_USB_LME2510=m > -CONFIG_DVB_USB_TECHNISAT_USB2=m > -# CONFIG_SMS_SIANO_MDTV is not set > - > -# > -# Supported FlexCopII (B2C2) Adapters > -# > -CONFIG_DVB_B2C2_FLEXCOP=m > -CONFIG_DVB_B2C2_FLEXCOP_USB=m > -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set > - > -# > -# Supported DVB Frontends > -# > -# CONFIG_DVB_FE_CUSTOMISE is not set > - > -# > -# Multistandard (satellite) frontends > -# > -CONFIG_DVB_STB0899=m > -CONFIG_DVB_STB6100=m > -CONFIG_DVB_STV090x=m > -CONFIG_DVB_STV6110x=m > - > -# > -# DVB-S (satellite) frontends > -# > -CONFIG_DVB_CX24123=m > -CONFIG_DVB_MT312=m > -CONFIG_DVB_ZL10039=m > -CONFIG_DVB_S5H1420=m > -CONFIG_DVB_STV0288=m > -CONFIG_DVB_STB6000=m > -CONFIG_DVB_STV0299=m > -CONFIG_DVB_STV6110=m > -CONFIG_DVB_STV0900=m > -CONFIG_DVB_TDA10086=m > -CONFIG_DVB_TUNER_ITD1000=m > -CONFIG_DVB_TUNER_CX24113=m > -CONFIG_DVB_TDA826X=m > -CONFIG_DVB_CX24116=m > -CONFIG_DVB_SI21XX=m > -CONFIG_DVB_DS3000=m > - > -# > -# DVB-T (terrestrial) frontends > -# > -CONFIG_DVB_CX22702=m > -CONFIG_DVB_TDA1004X=m > -CONFIG_DVB_NXT6000=m > -CONFIG_DVB_MT352=m > -CONFIG_DVB_ZL10353=m > -CONFIG_DVB_DIB3000MB=m > -CONFIG_DVB_DIB3000MC=m > -CONFIG_DVB_DIB7000M=m > -CONFIG_DVB_DIB7000P=m > -CONFIG_DVB_TDA10048=m > -CONFIG_DVB_AF9013=m > - > -# > -# DVB-C (cable) frontends > -# > -CONFIG_DVB_TDA10023=m > -CONFIG_DVB_STV0297=m > - > -# > -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends > -# > -CONFIG_DVB_NXT200X=m > -CONFIG_DVB_BCM3510=m > -CONFIG_DVB_LGDT330X=m > -CONFIG_DVB_LGDT3305=m > -CONFIG_DVB_S5H1409=m > -CONFIG_DVB_S5H1411=m > - > -# > -# ISDB-T (terrestrial) frontends > -# > -CONFIG_DVB_S921=m > -CONFIG_DVB_DIB8000=m > -CONFIG_DVB_MB86A20S=m > - > -# > -# Digital terrestrial only tuners/PLL > -# > -CONFIG_DVB_PLL=m > -CONFIG_DVB_TUNER_DIB0070=m > -CONFIG_DVB_TUNER_DIB0090=m > - > -# > -# SEC control devices for DVB-S > -# > -CONFIG_DVB_LNBP21=m > -CONFIG_DVB_ISL6421=m > -CONFIG_DVB_LGS8GXX=m > -CONFIG_DVB_ATBM8830=m > -CONFIG_DVB_IX2505V=m > - > -# > -# Tools to develop new frontends > -# > -# CONFIG_DVB_DUMMY_FE is not set > - > -# > -# Graphics support > -# > -CONFIG_DRM=m > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -CONFIG_FB_SYS_FILLRECT=m > -CONFIG_FB_SYS_COPYAREA=m > -CONFIG_FB_SYS_IMAGEBLIT=m > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -CONFIG_FB_SYS_FOPS=m > -# CONFIG_FB_WMT_GE_ROPS is not set > -CONFIG_FB_DEFERRED_IO=y > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -CONFIG_FB_MODE_HELPERS=y > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_TMIO is not set > -CONFIG_FB_UDL=m > -# CONFIG_FB_VIRTUAL is not set > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set > -CONFIG_OMAP2_VRAM=y > -CONFIG_OMAP2_VRFB=y > -CONFIG_OMAP2_DSS=y > -CONFIG_OMAP2_VRAM_SIZE=14 > -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y > -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set > -CONFIG_OMAP2_DSS_DPI=y > -# CONFIG_OMAP2_DSS_RFBI is not set > -CONFIG_OMAP2_DSS_VENC=y > -# CONFIG_OMAP2_DSS_SDI is not set > -CONFIG_OMAP2_DSS_DSI=y > -CONFIG_OMAP2_DSS_USE_DSI_PLL=y > -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set > -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 > -CONFIG_FB_OMAP2=y > -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y > -CONFIG_FB_OMAP2_NUM_FBS=2 > - > -# > -# OMAP2/3 Display Device Drivers > -# > -CONFIG_PANEL_GENERIC_DPI=y > -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set > -CONFIG_PANEL_SHARP_LS037V7DW01=y > -CONFIG_PANEL_NEC_NL8048HL11_01B=y > -# CONFIG_PANEL_TAAL is not set > -CONFIG_PANEL_TPO_TD043MTEA1=m > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > -CONFIG_BACKLIGHT_CLASS_DEVICE=y > - > -# > -# Display device support > -# > -CONFIG_DISPLAY_SUPPORT=y > - > -# > -# Display hardware drivers > -# > - > -# > -# Console display driver support > -# > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -# CONFIG_LOGO_LINUX_MONO is not set > -# CONFIG_LOGO_LINUX_VGA16 is not set > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -CONFIG_SOUND_OSS_CORE=y > -CONFIG_SOUND_OSS_CORE_PRECLAIM=y > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -CONFIG_SND_SEQUENCER=m > -# CONFIG_SND_SEQ_DUMMY is not set > -CONFIG_SND_OSSEMUL=y > -CONFIG_SND_MIXER_OSS=y > -CONFIG_SND_PCM_OSS=y > -CONFIG_SND_PCM_OSS_PLUGINS=y > -CONFIG_SND_SEQUENCER_OSS=y > -CONFIG_SND_HRTIMER=m > -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y > -CONFIG_SND_DYNAMIC_MINORS=y > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -CONFIG_SND_RAWMIDI_SEQ=m > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -CONFIG_SND_ALOOP=m > -# CONFIG_SND_VIRMIDI is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -# CONFIG_SND_ARM is not set > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -CONFIG_SND_USB_UA101=m > -CONFIG_SND_USB_CAIAQ=m > -CONFIG_SND_USB_CAIAQ_INPUT=y > -CONFIG_SND_USB_6FIRE=m > -CONFIG_SND_SOC=y > -CONFIG_SND_SOC_CACHE_LZO=y > -CONFIG_SND_OMAP_SOC=y > -CONFIG_SND_OMAP_SOC_MCBSP=y > -CONFIG_SND_OMAP_SOC_OVERO=y > -CONFIG_SND_OMAP_SOC_OMAP3EVM=y > -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y > -CONFIG_SND_OMAP_SOC_ZOOM2=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TWL4030=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_3M_PCT is not set > -CONFIG_HID_A4TECH=y > -CONFIG_HID_ACRUX=m > -# CONFIG_HID_ACRUX_FF is not set > -CONFIG_HID_APPLE=y > -CONFIG_HID_BELKIN=y > -# CONFIG_HID_CANDO is not set > -CONFIG_HID_CHERRY=y > -CONFIG_HID_CHICONY=y > -# CONFIG_HID_PRODIKEYS is not set > -CONFIG_HID_CYPRESS=y > -# CONFIG_HID_DRAGONRISE is not set > -CONFIG_HID_EMS_FF=m > -# CONFIG_HID_ELECOM is not set > -CONFIG_HID_EZKEY=y > -CONFIG_HID_KEYTOUCH=m > -# CONFIG_HID_KYE is not set > -CONFIG_HID_UCLOGIC=m > -CONFIG_HID_WALTOP=m > -CONFIG_HID_GYRATION=y > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -CONFIG_HID_LCPOWER=m > -CONFIG_HID_LOGITECH=y > -# CONFIG_LOGITECH_FF is not set > -# CONFIG_LOGIRUMBLEPAD2_FF is not set > -# CONFIG_LOGIG940_FF is not set > -# CONFIG_LOGIWII_FF is not set > -CONFIG_HID_MAGICMOUSE=m > -CONFIG_HID_MICROSOFT=y > -# CONFIG_HID_MOSART is not set > -CONFIG_HID_MONTEREY=y > -CONFIG_HID_MULTITOUCH=m > -CONFIG_HID_NTRIG=y > -# CONFIG_HID_ORTEK is not set > -CONFIG_HID_PANTHERLORD=y > -# CONFIG_PANTHERLORD_FF is not set > -CONFIG_HID_PETALYNX=y > -CONFIG_HID_PICOLCD=m > -CONFIG_HID_PICOLCD_FB=y > -CONFIG_HID_PICOLCD_BACKLIGHT=y > -CONFIG_HID_PICOLCD_LEDS=y > -CONFIG_HID_QUANTA=m > -CONFIG_HID_ROCCAT=m > -CONFIG_HID_ROCCAT_COMMON=m > -CONFIG_HID_ROCCAT_ARVO=m > -CONFIG_HID_ROCCAT_KONE=m > -CONFIG_HID_ROCCAT_KONEPLUS=m > -CONFIG_HID_ROCCAT_KOVAPLUS=m > -# CONFIG_HID_ROCCAT_PYRA is not set > -CONFIG_HID_SAMSUNG=y > -CONFIG_HID_SONY=y > -CONFIG_HID_STANTUM=m > -CONFIG_HID_SUNPLUS=y > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -CONFIG_HID_TOPSEED=y > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_WACOM is not set > -# CONFIG_HID_ZEROPLUS is not set > -# CONFIG_HID_ZYDACRON is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -CONFIG_USB_ARCH_HAS_EHCI=y > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y > - > -# > -# Miscellaneous USB options > -# > -CONFIG_USB_DEVICEFS=y > -CONFIG_USB_DEVICE_CLASS=y > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -CONFIG_USB_OTG=y > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -CONFIG_USB_MON=y > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -CONFIG_USB_EHCI_HCD=y > -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set > -CONFIG_USB_EHCI_TT_NEWSCHED=y > -CONFIG_USB_EHCI_HCD_OMAP=y > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -# CONFIG_USB_OHCI_HCD is not set > -# CONFIG_USB_U132_HCD is not set > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -# CONFIG_USB_MUSB_TUSB6010 is not set > -CONFIG_USB_MUSB_OMAP2PLUS=y > -# CONFIG_USB_MUSB_AM35X is not set > -# CONFIG_USB_MUSB_HOST is not set > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -CONFIG_USB_MUSB_OTG=y > -CONFIG_USB_GADGET_MUSB_HDRC=y > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -CONFIG_USB_INVENTRA_DMA=y > -# CONFIG_USB_TI_CPPI_DMA is not set > -# CONFIG_USB_MUSB_DEBUG is not set > - > -# > -# USB Device Class drivers > -# > -CONFIG_USB_ACM=m > -CONFIG_USB_PRINTER=m > -CONFIG_USB_WDM=m > -CONFIG_USB_TMC=m > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -CONFIG_USB_STORAGE_REALTEK=m > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -CONFIG_USB_STORAGE_ENE_UB6250=m > -CONFIG_USB_UAS=m > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -CONFIG_USB_SERIAL=m > -CONFIG_USB_EZUSB=y > -CONFIG_USB_SERIAL_GENERIC=y > -CONFIG_USB_SERIAL_AIRCABLE=m > -CONFIG_USB_SERIAL_ARK3116=m > -CONFIG_USB_SERIAL_BELKIN=m > -CONFIG_USB_SERIAL_CH341=m > -# CONFIG_USB_SERIAL_WHITEHEAT is not set > -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m > -# CONFIG_USB_SERIAL_CP210X is not set > -CONFIG_USB_SERIAL_CYPRESS_M8=m > -CONFIG_USB_SERIAL_EMPEG=m > -CONFIG_USB_SERIAL_FTDI_SIO=m > -CONFIG_USB_SERIAL_FUNSOFT=m > -CONFIG_USB_SERIAL_VISOR=m > -CONFIG_USB_SERIAL_IPAQ=m > -CONFIG_USB_SERIAL_IR=m > -CONFIG_USB_SERIAL_EDGEPORT=m > -CONFIG_USB_SERIAL_EDGEPORT_TI=m > -CONFIG_USB_SERIAL_GARMIN=m > -CONFIG_USB_SERIAL_IPW=m > -CONFIG_USB_SERIAL_IUU=m > -CONFIG_USB_SERIAL_KEYSPAN_PDA=m > -CONFIG_USB_SERIAL_KEYSPAN=m > -CONFIG_USB_SERIAL_KEYSPAN_MPR=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19=y > -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y > -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y > -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y > -CONFIG_USB_SERIAL_KLSI=m > -CONFIG_USB_SERIAL_KOBIL_SCT=m > -CONFIG_USB_SERIAL_MCT_U232=m > -CONFIG_USB_SERIAL_MOS7720=m > -CONFIG_USB_SERIAL_MOS7840=m > -CONFIG_USB_SERIAL_MOTOROLA=m > -CONFIG_USB_SERIAL_NAVMAN=m > -CONFIG_USB_SERIAL_PL2303=m > -CONFIG_USB_SERIAL_OTI6858=m > -CONFIG_USB_SERIAL_QCAUX=m > -# CONFIG_USB_SERIAL_QUALCOMM is not set > -CONFIG_USB_SERIAL_SPCP8X5=m > -CONFIG_USB_SERIAL_HP4X=m > -CONFIG_USB_SERIAL_SAFE=m > -# CONFIG_USB_SERIAL_SAFE_PADDED is not set > -CONFIG_USB_SERIAL_SAMBA=m > -CONFIG_USB_SERIAL_SIEMENS_MPI=m > -CONFIG_USB_SERIAL_SIERRAWIRELESS=m > -# CONFIG_USB_SERIAL_SYMBOL is not set > -# CONFIG_USB_SERIAL_TI is not set > -CONFIG_USB_SERIAL_CYBERJACK=m > -# CONFIG_USB_SERIAL_XIRCOM is not set > -# CONFIG_USB_SERIAL_OPTION is not set > -CONFIG_USB_SERIAL_OMNINET=m > -CONFIG_USB_SERIAL_OPTICON=m > -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m > -CONFIG_USB_SERIAL_ZIO=m > -CONFIG_USB_SERIAL_SSU100=m > -CONFIG_USB_SERIAL_DEBUG=m > - > -# > -# USB Miscellaneous drivers > -# > -CONFIG_USB_EMI62=m > -CONFIG_USB_EMI26=m > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -CONFIG_USB_LEGOTOWER=m > -CONFIG_USB_LCD=m > -CONFIG_USB_LED=m > -CONFIG_USB_CYPRESS_CY7C63=m > -CONFIG_USB_CYTHERM=m > -CONFIG_USB_IDMOUSE=m > -CONFIG_USB_FTDI_ELAN=m > -# CONFIG_USB_APPLEDISPLAY is not set > -CONFIG_USB_SISUSBVGA=m > -CONFIG_USB_SISUSBVGA_CON=y > -CONFIG_USB_LD=m > -CONFIG_USB_TRANCEVIBRATOR=m > -# CONFIG_USB_IOWARRIOR is not set > -CONFIG_USB_TEST=m > -# CONFIG_USB_ISIGHTFW is not set > -CONFIG_USB_YUREX=m > -CONFIG_USB_ATM=m > -CONFIG_USB_SPEEDTOUCH=m > -CONFIG_USB_CXACRU=m > -CONFIG_USB_UEAGLEATM=m > -CONFIG_USB_XUSBATM=m > -CONFIG_USB_GADGET=y > -# CONFIG_USB_GADGET_DEBUG is not set > -# CONFIG_USB_GADGET_DEBUG_FILES is not set > -CONFIG_USB_GADGET_DEBUG_FS=y > -CONFIG_USB_GADGET_VBUS_DRAW=480 > -CONFIG_USB_GADGET_SELECTED=y > -# CONFIG_USB_GADGET_FUSB300 is not set > -# CONFIG_USB_GADGET_OMAP is not set > -# CONFIG_USB_GADGET_R8A66597 is not set > -# CONFIG_USB_GADGET_PXA_U2O is not set > -# CONFIG_USB_GADGET_M66592 is not set > -# CONFIG_USB_GADGET_DUMMY_HCD is not set > -CONFIG_USB_GADGET_DUALSPEED=y > -# CONFIG_USB_ZERO is not set > -# CONFIG_USB_AUDIO is not set > -CONFIG_USB_ETH=m > -CONFIG_USB_ETH_RNDIS=y > -# CONFIG_USB_ETH_EEM is not set > -CONFIG_USB_G_NCM=m > -# CONFIG_USB_GADGETFS is not set > -CONFIG_USB_FUNCTIONFS=m > -# CONFIG_USB_FUNCTIONFS_ETH is not set > -CONFIG_USB_FUNCTIONFS_RNDIS=y > -# CONFIG_USB_FUNCTIONFS_GENERIC is not set > -# CONFIG_USB_FILE_STORAGE is not set > -# CONFIG_USB_MASS_STORAGE is not set > -# CONFIG_USB_G_SERIAL is not set > -# CONFIG_USB_MIDI_GADGET is not set > -# CONFIG_USB_G_PRINTER is not set > -# CONFIG_USB_CDC_COMPOSITE is not set > -# CONFIG_USB_G_MULTI is not set > -CONFIG_USB_G_HID=m > -CONFIG_USB_G_DBGP=m > -# CONFIG_USB_G_DBGP_PRINTK is not set > -CONFIG_USB_G_DBGP_SERIAL=y > -CONFIG_USB_G_WEBCAM=m > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -CONFIG_USB_GPIO_VBUS=y > -# CONFIG_ISP1301_OMAP is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_TWL4030_USB=y > -CONFIG_TWL6030_USB=m > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -CONFIG_MMC_UNSAFE_RESUME=y > -# CONFIG_MMC_CLKGATE is not set > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_MINORS=8 > -CONFIG_MMC_BLOCK_BOUNCE=y > -CONFIG_SDIO_UART=y > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_OMAP is not set > -CONFIG_MMC_OMAP_HS=y > -CONFIG_MMC_SPI=m > -# CONFIG_MMC_DW is not set > -CONFIG_MMC_USHC=m > -# CONFIG_MEMSTICK is not set > -CONFIG_NEW_LEDS=y > -CONFIG_LEDS_CLASS=y > - > -# > -# LED drivers > -# > -# CONFIG_LEDS_LM3530 is not set > -# CONFIG_LEDS_PCA9532 is not set > -CONFIG_LEDS_GPIO=y > -CONFIG_LEDS_GPIO_PLATFORM=y > -# CONFIG_LEDS_LP3944 is not set > -CONFIG_LEDS_LP5521=m > -CONFIG_LEDS_LP5523=m > -# CONFIG_LEDS_PCA955X is not set > -# CONFIG_LEDS_DAC124S085 is not set > -CONFIG_LEDS_PWM=m > -CONFIG_LEDS_REGULATOR=m > -# CONFIG_LEDS_BD2802 is not set > -# CONFIG_LEDS_LT3593 is not set > -CONFIG_LEDS_TRIGGERS=y > - > -# > -# LED Triggers > -# > -CONFIG_LEDS_TRIGGER_TIMER=m > -CONFIG_LEDS_TRIGGER_HEARTBEAT=y > -CONFIG_LEDS_TRIGGER_BACKLIGHT=m > -CONFIG_LEDS_TRIGGER_GPIO=m > -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m > - > -# > -# iptables trigger is under Netfilter config (LED target) > -# > -CONFIG_NFC_DEVICES=y > -CONFIG_PN544_NFC=m > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -CONFIG_RTC_DRV_DS1307=y > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_DS3232 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_ISL12022 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -CONFIG_RTC_DRV_BQ32K=m > -CONFIG_RTC_DRV_TWL4030=m > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -# CONFIG_DMADEVICES is not set > -CONFIG_TIMB_DMA=m > -CONFIG_DMA_ENGINE=y > -# CONFIG_AUXDISPLAY is not set > -CONFIG_UIO=m > -CONFIG_UIO_PDRV=m > -CONFIG_UIO_PDRV_GENIRQ=m > -CONFIG_STAGING=y > -# CONFIG_STAGING_EXCLUDE_BUILD is not set > -# CONFIG_VIDEO_TM6000 is not set > -# CONFIG_USB_IP_COMMON is not set > -CONFIG_W35UND=m > -CONFIG_PRISM2_USB=m > -CONFIG_ECHO=m > -CONFIG_BRCM80211=m > -CONFIG_BRCMFMAC=y > -# CONFIG_BRCMDBG is not set > -CONFIG_RT2870=m > -# CONFIG_COMEDI is not set > -# CONFIG_ASUS_OLED is not set > -CONFIG_R8712U=m > -CONFIG_R8712_AP=y > -# CONFIG_TRANZPORT is not set > -# CONFIG_POHMELFS is not set > -# CONFIG_LINE6_USB is not set > -# CONFIG_USB_SERIAL_QUATECH2 is not set > -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set > -# CONFIG_VT6656 is not set > -# CONFIG_IIO is not set > -CONFIG_XVMALLOC=y > -CONFIG_ZRAM=m > -# CONFIG_ZRAM_DEBUG is not set > -# CONFIG_FB_SM7XX is not set > -# CONFIG_LIRC_STAGING is not set > -# CONFIG_EASYCAP is not set > -# CONFIG_TIDSPBRIDGE is not set > -# CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set > -CONFIG_MACH_NO_WESTBRIDGE=y > -# CONFIG_ATH6K_LEGACY is not set > -CONFIG_USB_ENESTORAGE=m > -CONFIG_BCM_WIMAX=m > -CONFIG_FT1000=m > -CONFIG_FT1000_USB=m > - > -# > -# Speakup console speech > -# > -# CONFIG_SPEAKUP is not set > -CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m > -CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m > - > -# > -# Altera FPGA firmware download module > -# > -# CONFIG_ALTERA_STAPL is not set > -CONFIG_CLKDEV_LOOKUP=y > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -CONFIG_EXT2_FS_XATTR=y > -CONFIG_EXT2_FS_POSIX_ACL=y > -CONFIG_EXT2_FS_SECURITY=y > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -CONFIG_EXT3_FS_POSIX_ACL=y > -# CONFIG_EXT3_FS_SECURITY is not set > -CONFIG_EXT4_FS=y > -CONFIG_EXT4_FS_XATTR=y > -CONFIG_EXT4_FS_POSIX_ACL=y > -CONFIG_EXT4_FS_SECURITY=y > -# CONFIG_EXT4_DEBUG is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_JBD2=y > -# CONFIG_JBD2_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -CONFIG_REISERFS_FS=m > -# CONFIG_REISERFS_CHECK is not set > -CONFIG_REISERFS_PROC_INFO=y > -CONFIG_REISERFS_FS_XATTR=y > -# CONFIG_REISERFS_FS_POSIX_ACL is not set > -# CONFIG_REISERFS_FS_SECURITY is not set > -CONFIG_JFS_FS=m > -CONFIG_JFS_POSIX_ACL=y > -# CONFIG_JFS_SECURITY is not set > -# CONFIG_JFS_DEBUG is not set > -CONFIG_JFS_STATISTICS=y > -CONFIG_XFS_FS=m > -CONFIG_XFS_QUOTA=y > -CONFIG_XFS_POSIX_ACL=y > -CONFIG_XFS_RT=y > -# CONFIG_XFS_DEBUG is not set > -CONFIG_GFS2_FS=m > -CONFIG_GFS2_FS_LOCKING_DLM=y > -CONFIG_OCFS2_FS=m > -CONFIG_OCFS2_FS_O2CB=m > -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m > -CONFIG_OCFS2_FS_STATS=y > -CONFIG_OCFS2_DEBUG_MASKLOG=y > -# CONFIG_OCFS2_DEBUG_FS is not set > -CONFIG_BTRFS_FS=m > -CONFIG_BTRFS_FS_POSIX_ACL=y > -CONFIG_NILFS2_FS=m > -CONFIG_FS_POSIX_ACL=y > -CONFIG_EXPORTFS=y > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY_USER=y > -CONFIG_FANOTIFY=y > -CONFIG_QUOTA=y > -# CONFIG_QUOTA_NETLINK_INTERFACE is not set > -CONFIG_PRINT_QUOTA_WARNING=y > -# CONFIG_QUOTA_DEBUG is not set > -CONFIG_QUOTA_TREE=y > -# CONFIG_QFMT_V1 is not set > -CONFIG_QFMT_V2=y > -CONFIG_QUOTACTL=y > -CONFIG_AUTOFS4_FS=y > -CONFIG_FUSE_FS=m > -CONFIG_CUSE=m > -CONFIG_GENERIC_ACL=y > - > -# > -# Caches > -# > -CONFIG_FSCACHE=m > -CONFIG_FSCACHE_STATS=y > -CONFIG_FSCACHE_HISTOGRAM=y > -# CONFIG_FSCACHE_DEBUG is not set > -# CONFIG_FSCACHE_OBJECT_LIST is not set > -CONFIG_CACHEFILES=m > -# CONFIG_CACHEFILES_DEBUG is not set > -CONFIG_CACHEFILES_HISTOGRAM=y > - > -# > -# CD-ROM/DVD Filesystems > -# > -CONFIG_ISO9660_FS=m > -CONFIG_JOLIET=y > -CONFIG_ZISOFS=y > -CONFIG_UDF_FS=m > -CONFIG_UDF_NLS=y > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -CONFIG_NTFS_FS=m > -# CONFIG_NTFS_DEBUG is not set > -# CONFIG_NTFS_RW is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -CONFIG_TMPFS_POSIX_ACL=y > -# CONFIG_HUGETLB_PAGE is not set > -CONFIG_CONFIGFS_FS=m > -CONFIG_MISC_FILESYSTEMS=y > -CONFIG_ADFS_FS=m > -# CONFIG_ADFS_FS_RW is not set > -CONFIG_AFFS_FS=m > -# CONFIG_ECRYPT_FS is not set > -CONFIG_UNION_FS=m > -CONFIG_UNION_FS_XATTR=y > -# CONFIG_UNION_FS_DEBUG is not set > -CONFIG_HFS_FS=m > -CONFIG_HFSPLUS_FS=m > -CONFIG_BEFS_FS=m > -# CONFIG_BEFS_DEBUG is not set > -CONFIG_BFS_FS=m > -CONFIG_EFS_FS=m > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -CONFIG_JFFS2_SUMMARY=y > -CONFIG_JFFS2_FS_XATTR=y > -CONFIG_JFFS2_FS_POSIX_ACL=y > -CONFIG_JFFS2_FS_SECURITY=y > -CONFIG_JFFS2_COMPRESSION_OPTIONS=y > -CONFIG_JFFS2_ZLIB=y > -CONFIG_JFFS2_LZO=y > -CONFIG_JFFS2_RTIME=y > -CONFIG_JFFS2_RUBIN=y > -# CONFIG_JFFS2_CMODE_NONE is not set > -# CONFIG_JFFS2_CMODE_PRIORITY is not set > -# CONFIG_JFFS2_CMODE_SIZE is not set > -CONFIG_JFFS2_CMODE_FAVOURLZO=y > -CONFIG_UBIFS_FS=y > -CONFIG_UBIFS_FS_XATTR=y > -CONFIG_UBIFS_FS_ADVANCED_COMPR=y > -CONFIG_UBIFS_FS_LZO=y > -CONFIG_UBIFS_FS_ZLIB=y > -# CONFIG_UBIFS_FS_DEBUG is not set > -CONFIG_LOGFS=m > -CONFIG_CRAMFS=m > -CONFIG_SQUASHFS=y > -# CONFIG_SQUASHFS_XATTR is not set > -CONFIG_SQUASHFS_LZO=y > -CONFIG_SQUASHFS_XZ=y > -# CONFIG_SQUASHFS_EMBEDDED is not set > -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 > -CONFIG_VXFS_FS=m > -CONFIG_MINIX_FS=m > -CONFIG_OMFS_FS=m > -CONFIG_HPFS_FS=m > -CONFIG_QNX4FS_FS=m > -CONFIG_ROMFS_FS=m > -CONFIG_ROMFS_BACKED_BY_BLOCK=y > -# CONFIG_ROMFS_BACKED_BY_MTD is not set > -# CONFIG_ROMFS_BACKED_BY_BOTH is not set > -CONFIG_ROMFS_ON_BLOCK=y > -CONFIG_PSTORE=y > -CONFIG_SYSV_FS=m > -CONFIG_UFS_FS=m > -# CONFIG_UFS_FS_WRITE is not set > -# CONFIG_UFS_DEBUG is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -CONFIG_NFS_V3_ACL=y > -CONFIG_NFS_V4=y > -CONFIG_NFS_V4_1=y > -CONFIG_PNFS_FILE_LAYOUT=y > -CONFIG_ROOT_NFS=y > -# CONFIG_NFS_USE_LEGACY_DNS is not set > -CONFIG_NFS_USE_KERNEL_DNS=y > -# CONFIG_NFS_USE_NEW_IDMAPPER is not set > -CONFIG_NFSD=m > -CONFIG_NFSD_DEPRECATED=y > -CONFIG_NFSD_V2_ACL=y > -CONFIG_NFSD_V3=y > -CONFIG_NFSD_V3_ACL=y > -CONFIG_NFSD_V4=y > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_NFS_ACL_SUPPORT=y > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -CONFIG_SUNRPC_GSS=y > -CONFIG_RPCSEC_GSS_KRB5=m > -CONFIG_CEPH_FS=m > -CONFIG_CIFS=m > -CONFIG_CIFS_STATS=y > -CONFIG_CIFS_STATS2=y > -# CONFIG_CIFS_WEAK_PW_HASH is not set > -# CONFIG_CIFS_UPCALL is not set > -CONFIG_CIFS_XATTR=y > -CONFIG_CIFS_POSIX=y > -# CONFIG_CIFS_DEBUG2 is not set > -CONFIG_CIFS_DFS_UPCALL=y > -CONFIG_CIFS_FSCACHE=y > -CONFIG_CIFS_ACL=y > -CONFIG_CIFS_EXPERIMENTAL=y > -CONFIG_NCP_FS=m > -# CONFIG_NCPFS_PACKET_SIGNING is not set > -# CONFIG_NCPFS_IOCTL_LOCKING is not set > -# CONFIG_NCPFS_STRONG is not set > -# CONFIG_NCPFS_NFS_NS is not set > -# CONFIG_NCPFS_OS2_NS is not set > -# CONFIG_NCPFS_SMALLDOS is not set > -# CONFIG_NCPFS_NLS is not set > -# CONFIG_NCPFS_EXTRAS is not set > -CONFIG_CODA_FS=m > -CONFIG_AFS_FS=m > -# CONFIG_AFS_DEBUG is not set > -# CONFIG_AFS_FSCACHE is not set > -CONFIG_9P_FS=m > -CONFIG_9P_FSCACHE=y > -CONFIG_9P_FS_POSIX_ACL=y > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -CONFIG_MAC_PARTITION=y > -CONFIG_MSDOS_PARTITION=y > -CONFIG_BSD_DISKLABEL=y > -CONFIG_MINIX_SUBPARTITION=y > -CONFIG_SOLARIS_X86_PARTITION=y > -# CONFIG_UNIXWARE_DISKLABEL is not set > -CONFIG_LDM_PARTITION=y > -CONFIG_LDM_DEBUG=y > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -CONFIG_EFI_PARTITION=y > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -CONFIG_NLS_CODEPAGE_737=m > -CONFIG_NLS_CODEPAGE_775=m > -CONFIG_NLS_CODEPAGE_850=m > -CONFIG_NLS_CODEPAGE_852=m > -CONFIG_NLS_CODEPAGE_855=m > -CONFIG_NLS_CODEPAGE_857=m > -CONFIG_NLS_CODEPAGE_860=m > -CONFIG_NLS_CODEPAGE_861=m > -CONFIG_NLS_CODEPAGE_862=m > -CONFIG_NLS_CODEPAGE_863=m > -CONFIG_NLS_CODEPAGE_864=m > -CONFIG_NLS_CODEPAGE_865=m > -CONFIG_NLS_CODEPAGE_866=m > -CONFIG_NLS_CODEPAGE_869=m > -CONFIG_NLS_CODEPAGE_936=m > -CONFIG_NLS_CODEPAGE_950=m > -CONFIG_NLS_CODEPAGE_932=m > -CONFIG_NLS_CODEPAGE_949=m > -CONFIG_NLS_CODEPAGE_874=m > -CONFIG_NLS_ISO8859_8=m > -CONFIG_NLS_CODEPAGE_1250=m > -CONFIG_NLS_CODEPAGE_1251=m > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -CONFIG_NLS_ISO8859_2=m > -CONFIG_NLS_ISO8859_3=m > -CONFIG_NLS_ISO8859_4=m > -CONFIG_NLS_ISO8859_5=m > -CONFIG_NLS_ISO8859_6=m > -CONFIG_NLS_ISO8859_7=m > -CONFIG_NLS_ISO8859_9=m > -CONFIG_NLS_ISO8859_13=m > -CONFIG_NLS_ISO8859_14=m > -CONFIG_NLS_ISO8859_15=m > -CONFIG_NLS_KOI8_R=m > -CONFIG_NLS_KOI8_U=m > -CONFIG_NLS_UTF8=y > -CONFIG_DLM=m > -# CONFIG_DLM_DEBUG is not set > - > -# > -# Kernel hacking > -# > -CONFIG_PRINTK_TIME=y > -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 > -CONFIG_ENABLE_WARN_DEPRECATED=y > -CONFIG_ENABLE_MUST_CHECK=y > -CONFIG_FRAME_WARN=1024 > -CONFIG_MAGIC_SYSRQ=y > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -# CONFIG_DEBUG_SECTION_MISMATCH is not set > -CONFIG_DEBUG_KERNEL=y > -# CONFIG_DEBUG_SHIRQ is not set > -# CONFIG_LOCKUP_DETECTOR is not set > -# CONFIG_HARDLOCKUP_DETECTOR is not set > -CONFIG_DETECT_HUNG_TASK=y > -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set > -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 > -CONFIG_SCHED_DEBUG=y > -CONFIG_SCHEDSTATS=y > -CONFIG_TIMER_STATS=y > -# CONFIG_DEBUG_OBJECTS is not set > -# CONFIG_DEBUG_SLAB is not set > -# CONFIG_DEBUG_KMEMLEAK is not set > -# CONFIG_DEBUG_RT_MUTEXES is not set > -# CONFIG_RT_MUTEX_TESTER is not set > -# CONFIG_DEBUG_SPINLOCK is not set > -CONFIG_DEBUG_MUTEXES=y > -# CONFIG_DEBUG_LOCK_ALLOC is not set > -# CONFIG_PROVE_LOCKING is not set > -# CONFIG_SPARSE_RCU_POINTER is not set > -# CONFIG_LOCK_STAT is not set > -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set > -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set > -# CONFIG_DEBUG_KOBJECT is not set > -# CONFIG_DEBUG_BUGVERBOSE is not set > -# CONFIG_DEBUG_INFO is not set > -# CONFIG_DEBUG_VM is not set > -# CONFIG_DEBUG_WRITECOUNT is not set > -# CONFIG_DEBUG_MEMORY_INIT is not set > -# CONFIG_DEBUG_LIST is not set > -# CONFIG_TEST_LIST_SORT is not set > -# CONFIG_DEBUG_SG is not set > -# CONFIG_DEBUG_NOTIFIERS is not set > -# CONFIG_DEBUG_CREDENTIALS is not set > -# CONFIG_BOOT_PRINTK_DELAY is not set > -# CONFIG_RCU_TORTURE_TEST is not set > -# CONFIG_BACKTRACE_SELF_TEST is not set > -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set > -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set > -# CONFIG_LKDTM is not set > -# CONFIG_FAULT_INJECTION is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -# CONFIG_DEBUG_PAGEALLOC is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y > -CONFIG_HAVE_DYNAMIC_FTRACE=y > -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y > -CONFIG_HAVE_C_RECORDMCOUNT=y > -CONFIG_RING_BUFFER=y > -CONFIG_RING_BUFFER_ALLOW_SWAP=y > -CONFIG_TRACING_SUPPORT=y > -CONFIG_FTRACE=y > -# CONFIG_FUNCTION_TRACER is not set > -# CONFIG_IRQSOFF_TRACER is not set > -# CONFIG_SCHED_TRACER is not set > -# CONFIG_ENABLE_DEFAULT_TRACERS is not set > -CONFIG_BRANCH_PROFILE_NONE=y > -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set > -# CONFIG_PROFILE_ALL_BRANCHES is not set > -# CONFIG_STACK_TRACER is not set > -# CONFIG_BLK_DEV_IO_TRACE is not set > -# CONFIG_RING_BUFFER_BENCHMARK is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_DMA_API_DEBUG is not set > -# CONFIG_ATOMIC64_SELFTEST is not set > -# CONFIG_ASYNC_RAID6_TEST is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_KGDB is not set > -# CONFIG_TEST_KSTRTOX is not set > -# CONFIG_STRICT_DEVMEM is not set > -CONFIG_ARM_UNWIND=y > -# CONFIG_DEBUG_USER is not set > -# CONFIG_DEBUG_STACK_USAGE is not set > -# CONFIG_DEBUG_LL is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -CONFIG_KEYS=y > -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set > -# CONFIG_SECURITY_DMESG_RESTRICT is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_XOR_BLOCKS=m > -CONFIG_ASYNC_CORE=m > -CONFIG_ASYNC_MEMCPY=m > -CONFIG_ASYNC_XOR=m > -CONFIG_ASYNC_PQ=m > -CONFIG_ASYNC_RAID6_RECOV=m > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -CONFIG_CRYPTO_ALGAPI=y > -CONFIG_CRYPTO_ALGAPI2=y > -CONFIG_CRYPTO_AEAD=m > -CONFIG_CRYPTO_AEAD2=y > -CONFIG_CRYPTO_BLKCIPHER=y > -CONFIG_CRYPTO_BLKCIPHER2=y > -CONFIG_CRYPTO_HASH=y > -CONFIG_CRYPTO_HASH2=y > -CONFIG_CRYPTO_RNG=m > -CONFIG_CRYPTO_RNG2=y > -CONFIG_CRYPTO_PCOMP2=y > -CONFIG_CRYPTO_MANAGER=y > -CONFIG_CRYPTO_MANAGER2=y > -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y > -CONFIG_CRYPTO_GF128MUL=m > -CONFIG_CRYPTO_NULL=m > -CONFIG_CRYPTO_WORKQUEUE=y > -CONFIG_CRYPTO_CRYPTD=m > -CONFIG_CRYPTO_AUTHENC=m > -CONFIG_CRYPTO_TEST=m > - > -# > -# Authenticated Encryption with Associated Data > -# > -CONFIG_CRYPTO_CCM=m > -CONFIG_CRYPTO_GCM=m > -CONFIG_CRYPTO_SEQIV=m > - > -# > -# Block modes > -# > -CONFIG_CRYPTO_CBC=y > -CONFIG_CRYPTO_CTR=m > -CONFIG_CRYPTO_CTS=m > -CONFIG_CRYPTO_ECB=y > -CONFIG_CRYPTO_LRW=m > -CONFIG_CRYPTO_PCBC=m > -CONFIG_CRYPTO_XTS=m > - > -# > -# Hash modes > -# > -CONFIG_CRYPTO_HMAC=m > -CONFIG_CRYPTO_XCBC=m > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -CONFIG_CRYPTO_CRC32C=y > -CONFIG_CRYPTO_GHASH=m > -CONFIG_CRYPTO_MD4=m > -CONFIG_CRYPTO_MD5=y > -CONFIG_CRYPTO_MICHAEL_MIC=y > -CONFIG_CRYPTO_RMD128=m > -CONFIG_CRYPTO_RMD160=m > -CONFIG_CRYPTO_RMD256=m > -CONFIG_CRYPTO_RMD320=m > -CONFIG_CRYPTO_SHA1=m > -CONFIG_CRYPTO_SHA256=m > -CONFIG_CRYPTO_SHA512=m > -CONFIG_CRYPTO_TGR192=m > -CONFIG_CRYPTO_WP512=m > - > -# > -# Ciphers > -# > -CONFIG_CRYPTO_AES=y > -CONFIG_CRYPTO_ANUBIS=m > -CONFIG_CRYPTO_ARC4=y > -CONFIG_CRYPTO_BLOWFISH=m > -CONFIG_CRYPTO_CAMELLIA=m > -CONFIG_CRYPTO_CAST5=m > -CONFIG_CRYPTO_CAST6=m > -CONFIG_CRYPTO_DES=y > -CONFIG_CRYPTO_FCRYPT=m > -CONFIG_CRYPTO_KHAZAD=m > -CONFIG_CRYPTO_SALSA20=m > -CONFIG_CRYPTO_SEED=m > -CONFIG_CRYPTO_SERPENT=m > -CONFIG_CRYPTO_TEA=m > -CONFIG_CRYPTO_TWOFISH=m > -CONFIG_CRYPTO_TWOFISH_COMMON=m > - > -# > -# Compression > -# > -CONFIG_CRYPTO_DEFLATE=y > -# CONFIG_CRYPTO_ZLIB is not set > -CONFIG_CRYPTO_LZO=y > - > -# > -# Random Number Generation > -# > -CONFIG_CRYPTO_ANSI_CPRNG=m > -CONFIG_CRYPTO_USER_API=m > -CONFIG_CRYPTO_USER_API_HASH=m > -CONFIG_CRYPTO_USER_API_SKCIPHER=m > -CONFIG_CRYPTO_HW=y > -CONFIG_CRYPTO_DEV_OMAP_SHAM=m > -CONFIG_CRYPTO_DEV_OMAP_AES=m > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_RAID6_PQ=m > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=y > -CONFIG_CRC16=y > -CONFIG_CRC_T10DIF=y > -CONFIG_CRC_ITU_T=y > -CONFIG_CRC32=y > -CONFIG_CRC7=y > -CONFIG_LIBCRC32C=y > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_LZO_COMPRESS=y > -CONFIG_LZO_DECOMPRESS=y > -CONFIG_XZ_DEC=y > -CONFIG_XZ_DEC_X86=y > -CONFIG_XZ_DEC_POWERPC=y > -CONFIG_XZ_DEC_IA64=y > -CONFIG_XZ_DEC_ARM=y > -CONFIG_XZ_DEC_ARMTHUMB=y > -CONFIG_XZ_DEC_SPARC=y > -CONFIG_XZ_DEC_BCJ=y > -CONFIG_XZ_DEC_TEST=m > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_DECOMPRESS_BZIP2=y > -CONFIG_DECOMPRESS_LZMA=y > -CONFIG_DECOMPRESS_XZ=y > -CONFIG_DECOMPRESS_LZO=y > -CONFIG_TEXTSEARCH=y > -CONFIG_TEXTSEARCH_KMP=m > -CONFIG_TEXTSEARCH_BM=m > -CONFIG_TEXTSEARCH_FSM=m > -CONFIG_BTREE=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > -CONFIG_AVERAGE=y > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/camera/0001-Add-driver- > for-Aptina-Micron-mt9p031-sensor.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/camera/0001-Add-driver-for-Aptina-Micron-mt9p031-sensor.patch > deleted file mode 100644 > index cf9e116..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/camera/0001-Add-driver-for- > Aptina-Micron-mt9p031-sensor.patch > +++ /dev/null > @@ -1,859 +0,0 @@ > -From e630a914bf14bf190feaf4a2cc57f6b27c4024e1 Mon Sep 17 00:00:00 > 2001 > -From: Javier Martin <javier.martin@vista-silicon.com> > -Date: Wed, 1 Jun 2011 17:36:48 +0200 > -Subject: [PATCH 1/3] Add driver for Aptina (Micron) mt9p031 sensor. > - > -Clock frequency of 57MHz used in previous version was wrong since > -when VDD_IO is 1.8V it can only support 48MHz. > - > -Two new platform flags have been added: > - > -- vdd_io: indicates whether the chip is powered with 1.8 or 2.8 VDD_IO. > -So that it can use the maximum allowed frequency. > -- version: monochrome and color versions of the chip have exactly > -the same ID, so the only way to select one of them is through > -platform data. > - > -Internal PLL is now used to generate PIXCLK depending on VDD_IO. > - > -Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> > ---- > - drivers/media/video/Kconfig | 7 + > - drivers/media/video/Makefile | 1 + > - drivers/media/video/mt9p031.c | 763 > +++++++++++++++++++++++++++++++++++++++++ > - include/media/mt9p031.h | 23 ++ > - 4 files changed, 794 insertions(+), 0 deletions(-) > - create mode 100644 drivers/media/video/mt9p031.c > - create mode 100644 include/media/mt9p031.h > - > -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig > -index 00f51dd..cb87e35 100644 > ---- a/drivers/media/video/Kconfig > -+++ b/drivers/media/video/Kconfig > -@@ -329,6 +329,13 @@ config VIDEO_OV7670 > - OV7670 VGA camera. It currently only works with the M88ALP01 > - controller. > - > -+config VIDEO_MT9P031 > -+ tristate "Aptina MT9P031 support" > -+ depends on I2C && VIDEO_V4L2 > -+ ---help--- > -+ This is a Video4Linux2 sensor-level driver for the Aptina > -+ (Micron) mt9p031 5 Mpixel camera. > -+ > - config VIDEO_MT9V011 > - tristate "Micron mt9v011 sensor support" > - depends on I2C && VIDEO_V4L2 > -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile > -index ace5d8b..912b29b 100644 > ---- a/drivers/media/video/Makefile > -+++ b/drivers/media/video/Makefile > -@@ -65,6 +65,7 @@ obj-$(CONFIG_VIDEO_UPD64083) += upd64083.o > - obj-$(CONFIG_VIDEO_OV7670) += ov7670.o > - obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o > - obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o > -+obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o > - obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o > - obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o > - obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o > -diff --git a/drivers/media/video/mt9p031.c b/drivers/media/video/mt9p031.c > -new file mode 100644 > -index 0000000..cd830b1 > ---- /dev/null > -+++ b/drivers/media/video/mt9p031.c > -@@ -0,0 +1,763 @@ > -+/* > -+ * Driver for MT9P031 CMOS Image Sensor from Aptina > -+ * > -+ * Copyright (C) 2011, Javier Martin <javier.martin@vista-silicon.com> > -+ * > -+ * Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de> > -+ * > -+ * Based on the MT9V032 driver and Bastian Hecht's code. > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include <linux/delay.h> > -+#include <linux/device.h> > -+#include <linux/i2c.h> > -+#include <linux/log2.h> > -+#include <linux/pm.h> > -+#include <linux/slab.h> > -+#include <media/v4l2-subdev.h> > -+#include <linux/videodev2.h> > -+ > -+#include <media/mt9p031.h> > -+#include <media/v4l2-chip-ident.h> > -+#include <media/v4l2-subdev.h> > -+#include <media/v4l2-device.h> > -+ > -+#define MT9P031_EXTCLK_FREQ 20000000 > -+ > -+#define MT9P031_CHIP_VERSION 0x00 > -+#define MT9P031_CHIP_VERSION_VALUE 0x1801 > -+#define MT9P031_ROW_START 0x01 > -+#define MT9P031_ROW_START_MIN 1 > -+#define MT9P031_ROW_START_MAX 2004 > -+#define MT9P031_ROW_START_DEF 54 > -+#define MT9P031_COLUMN_START 0x02 > -+#define MT9P031_COLUMN_START_MIN 1 > -+#define MT9P031_COLUMN_START_MAX 2750 > -+#define MT9P031_COLUMN_START_DEF 16 > -+#define MT9P031_WINDOW_HEIGHT 0x03 > -+#define MT9P031_WINDOW_HEIGHT_MIN 2 > -+#define MT9P031_WINDOW_HEIGHT_MAX 2003 > -+#define MT9P031_WINDOW_HEIGHT_DEF 2003 > -+#define MT9P031_WINDOW_WIDTH 0x04 > -+#define MT9P031_WINDOW_WIDTH_MIN 18 > -+#define MT9P031_WINDOW_WIDTH_MAX 2751 > -+#define MT9P031_WINDOW_WIDTH_DEF 2751 > -+#define MT9P031_H_BLANKING 0x05 > -+#define MT9P031_H_BLANKING_VALUE 0 > -+#define MT9P031_V_BLANKING 0x06 > -+#define MT9P031_V_BLANKING_VALUE 25 > -+#define MT9P031_OUTPUT_CONTROL 0x07 > -+#define MT9P031_OUTPUT_CONTROL_CEN 2 > -+#define MT9P031_OUTPUT_CONTROL_SYN 1 > -+#define MT9P031_SHUTTER_WIDTH_UPPER 0x08 > -+#define MT9P031_SHUTTER_WIDTH 0x09 > -+#define MT9P031_PLL_CONTROL 0x10 > -+#define MT9P031_PLL_CONTROL_PWROFF 0x0050 > -+#define MT9P031_PLL_CONTROL_PWRON 0x0051 > -+#define MT9P031_PLL_CONTROL_USEPLL 0x0052 > -+#define MT9P031_PLL_CONFIG_1 0x11 > -+#define MT9P031_PLL_CONFIG_1_M_48MHZ 0x5000 > -+#define MT9P031_PLL_CONFIG_1_N_48MHZ 0x05 > -+#define MT9P031_PLL_CONFIG_1_M_96MHZ 0x3600 > -+#define MT9P031_PLL_CONFIG_1_N_96MHZ 0x05 > -+#define MT9P031_PLL_CONFIG_2 0x12 > -+#define MT9P031_PLL_CONFIG_2_P1_48MHZ 5 > -+#define MT9P031_PLL_CONFIG_2_P1_96MHZ 2 > -+#define MT9P031_PIXEL_CLOCK_CONTROL 0x0a > -+#define MT9P031_FRAME_RESTART 0x0b > -+#define MT9P031_SHUTTER_DELAY 0x0c > -+#define MT9P031_RST 0x0d > -+#define MT9P031_RST_ENABLE 1 > -+#define MT9P031_RST_DISABLE 0 > -+#define MT9P031_READ_MODE_1 0x1e > -+#define MT9P031_READ_MODE_2 0x20 > -+#define MT9P031_READ_MODE_2_ROW_MIR 0x8000 > -+#define MT9P031_READ_MODE_2_COL_MIR 0x4000 > -+#define MT9P031_ROW_ADDRESS_MODE 0x22 > -+#define MT9P031_COLUMN_ADDRESS_MODE 0x23 > -+#define MT9P031_GLOBAL_GAIN 0x35 > -+ > -+struct mt9p031 { > -+ struct v4l2_subdev subdev; > -+ struct media_pad pad; > -+ struct v4l2_rect rect; /* Sensor window */ > -+ struct v4l2_mbus_framefmt format; > -+ struct mt9p031_platform_data *pdata; > -+ struct mutex power_lock; /* lock to protect power_count */ > -+ int power_count; > -+ u16 xskip; > -+ u16 yskip; > -+ /* cache register values */ > -+ u16 output_control; > -+}; > -+ > -+static struct mt9p031 *to_mt9p031(const struct i2c_client *client) > -+{ > -+ return container_of(i2c_get_clientdata(client), struct mt9p031, > subdev); > -+} > -+ > -+static int reg_read(struct i2c_client *client, const u8 reg) > -+{ > -+ s32 data = i2c_smbus_read_word_data(client, reg); > -+ return data < 0 ? data : swab16(data); > -+} > -+ > -+static int reg_write(struct i2c_client *client, const u8 reg, > -+ const u16 data) > -+{ > -+ return i2c_smbus_write_word_data(client, reg, swab16(data)); > -+} > -+ > -+static int mt9p031_set_output_control(struct mt9p031 *mt9p031, u16 clear, > -+ u16 set) > -+{ > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); > -+ u16 value = (mt9p031->output_control & ~clear) | set; > -+ int ret; > -+ > -+ ret = reg_write(client, MT9P031_OUTPUT_CONTROL, value); > -+ if (ret < 0) > -+ return ret; > -+ mt9p031->output_control = value; > -+ return 0; > -+} > -+ > -+static int mt9p031_reset(struct i2c_client *client) > -+{ > -+ struct mt9p031 *mt9p031 = to_mt9p031(client); > -+ int ret; > -+ > -+ /* Disable chip output, synchronous option update */ > -+ ret = reg_write(client, MT9P031_RST, MT9P031_RST_ENABLE); > -+ if (ret < 0) > -+ return ret; > -+ ret = reg_write(client, MT9P031_RST, MT9P031_RST_DISABLE); > -+ if (ret < 0) > -+ return ret; > -+ return mt9p031_set_output_control(mt9p031, > -+ MT9P031_OUTPUT_CONTROL_CEN, > 0); > -+} > -+ > -+static int mt9p031_power_on(struct mt9p031 *mt9p031) > -+{ > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); > -+ int ret; > -+ > -+ /* Ensure RESET_BAR is low */ > -+ if (mt9p031->pdata->reset) { > -+ mt9p031->pdata->reset(&mt9p031->subdev, 1); > -+ msleep(1); > -+ } > -+ /* Emable clock */ > -+ if (mt9p031->pdata->set_xclk) > -+ mt9p031->pdata->set_xclk(&mt9p031->subdev, > MT9P031_EXTCLK_FREQ); > -+ /* Now RESET_BAR must be high */ > -+ if (mt9p031->pdata->reset) { > -+ mt9p031->pdata->reset(&mt9p031->subdev, 0); > -+ msleep(1); > -+ } > -+ /* soft reset */ > -+ ret = mt9p031_reset(client); > -+ if (ret < 0) { > -+ dev_err(&client->dev, "Failed to reset the camera\n"); > -+ return ret; > -+ } > -+ return 0; > -+} > -+ > -+static void mt9p031_power_off(struct mt9p031 *mt9p031) > -+{ > -+ if (mt9p031->pdata->reset) { > -+ mt9p031->pdata->reset(&mt9p031->subdev, 1); > -+ msleep(1); > -+ } > -+ if (mt9p031->pdata->set_xclk) > -+ mt9p031->pdata->set_xclk(&mt9p031->subdev, 0); > -+} > -+ > -+static int mt9p031_enum_mbus_code(struct v4l2_subdev *sd, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_mbus_code_enum *code) > -+{ > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ > -+ if (code->pad || code->index) > -+ return -EINVAL; > -+ > -+ code->code = mt9p031->format.code; > -+ return 0; > -+} > -+ > -+static struct v4l2_mbus_framefmt *mt9p031_get_pad_format( > -+ struct mt9p031 *mt9p031, > -+ struct v4l2_subdev_fh *fh, > -+ unsigned int pad, u32 which) > -+{ > -+ switch (which) { > -+ case V4L2_SUBDEV_FORMAT_TRY: > -+ return v4l2_subdev_get_try_format(fh, pad); > -+ case V4L2_SUBDEV_FORMAT_ACTIVE: > -+ return &mt9p031->format; > -+ default: > -+ return NULL; > -+ } > -+} > -+ > -+static struct v4l2_rect *mt9p031_get_pad_crop(struct mt9p031 *mt9p031, > -+ struct v4l2_subdev_fh *fh, unsigned int pad, u32 > which) > -+{ > -+ switch (which) { > -+ case V4L2_SUBDEV_FORMAT_TRY: > -+ return v4l2_subdev_get_try_crop(fh, pad); > -+ case V4L2_SUBDEV_FORMAT_ACTIVE: > -+ return &mt9p031->rect; > -+ default: > -+ return NULL; > -+ } > -+} > -+ > -+static int mt9p031_get_crop(struct v4l2_subdev *sd, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_crop *crop) > -+{ > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ struct v4l2_rect *rect = mt9p031_get_pad_crop(mt9p031, fh, crop- > >pad, > -+ crop->which); > -+ if (!rect) > -+ return -EINVAL; > -+ > -+ crop->rect = *rect; > -+ > -+ return 0; > -+} > -+ > -+static u16 mt9p031_skip_for_crop(s32 source, s32 *target, s32 max_skip) > -+{ > -+ unsigned int skip; > -+ > -+ if (source - source / 4 < *target) { > -+ *target = source; > -+ return 1; > -+ } > -+ > -+ skip = DIV_ROUND_CLOSEST(source, *target); > -+ if (skip > max_skip) > -+ skip = max_skip; > -+ *target = 2 * DIV_ROUND_UP(source, 2 * skip); > -+ > -+ return skip; > -+} > -+ > -+static int mt9p031_set_params(struct i2c_client *client, > -+ struct v4l2_rect *rect, u16 xskip, u16 yskip) > -+{ > -+ struct mt9p031 *mt9p031 = to_mt9p031(client); > -+ int ret; > -+ u16 xbin, ybin; > -+ const u16 hblank = MT9P031_H_BLANKING_VALUE, > -+ vblank = MT9P031_V_BLANKING_VALUE; > -+ __s32 left; > -+ > -+ /* > -+ * TODO: Attention! When implementing horizontal flipping, adjust > -+ * alignment according to R2 "Column Start" description in the datasheet > -+ */ > -+ if (xskip & 1) { > -+ xbin = 1; > -+ left = rect->left & (~3); > -+ } else if (xskip & 2) { > -+ xbin = 2; > -+ left = rect->left & (~7); > -+ } else { > -+ xbin = 4; > -+ left = rect->left & (~15); > -+ } > -+ ybin = min(yskip, (u16)4); > -+ > -+ /* Disable register update, reconfigure atomically */ > -+ ret = mt9p031_set_output_control(mt9p031, 0, > -+ MT9P031_OUTPUT_CONTROL_SYN); > -+ if (ret < 0) > -+ return ret; > -+ > -+ dev_dbg(&client->dev, "skip %u:%u, rect %ux%u@%u:%u\n", > -+ xskip, yskip, rect->width, rect->height, rect->left, rect->top); > -+ > -+ /* Blanking and start values - default... */ > -+ ret = reg_write(client, MT9P031_H_BLANKING, hblank); > -+ if (ret < 0) > -+ return ret; > -+ ret = reg_write(client, MT9P031_V_BLANKING, vblank); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = reg_write(client, MT9P031_COLUMN_ADDRESS_MODE, > -+ ((xbin - 1) << 4) | (xskip - 1)); > -+ if (ret < 0) > -+ return ret; > -+ ret = reg_write(client, MT9P031_ROW_ADDRESS_MODE, > -+ ((ybin - 1) << 4) | (yskip - 1)); > -+ if (ret < 0) > -+ return ret; > -+ > -+ dev_dbg(&client->dev, "new physical left %u, top %u\n", > -+ rect->left, rect->top); > -+ > -+ ret = reg_write(client, MT9P031_COLUMN_START, > -+ rect->left); > -+ if (ret < 0) > -+ return ret; > -+ ret = reg_write(client, MT9P031_ROW_START, > -+ rect->top); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = reg_write(client, MT9P031_WINDOW_WIDTH, > -+ rect->width - 1); > -+ if (ret < 0) > -+ return ret; > -+ ret = reg_write(client, MT9P031_WINDOW_HEIGHT, > -+ rect->height - 1); > -+ if (ret < 0) > -+ return ret; > -+ > -+ /* Re-enable register update, commit all changes */ > -+ ret = mt9p031_set_output_control(mt9p031, > -+ MT9P031_OUTPUT_CONTROL_SYN, > 0); > -+ if (ret < 0) > -+ return ret; > -+ > -+ mt9p031->xskip = xskip; > -+ mt9p031->yskip = yskip; > -+ return ret; > -+} > -+ > -+static int mt9p031_set_crop(struct v4l2_subdev *sd, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_crop *crop) > -+{ > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ struct v4l2_mbus_framefmt *f; > -+ struct v4l2_rect *c; > -+ struct v4l2_rect rect; > -+ u16 xskip, yskip; > -+ s32 width, height; > -+ > -+ dev_dbg(mt9p031->subdev.v4l2_dev->dev, "%s(%ux%u@%u:%u : > %u)\n", > -+ __func__, crop->rect.width, crop->rect.height, > -+ crop->rect.left, crop->rect.top, crop->which); > -+ > -+ /* > -+ * Clamp the crop rectangle boundaries and align them to a multiple of 2 > -+ * pixels. > -+ */ > -+ rect.width = ALIGN(clamp(crop->rect.width, > -+ MT9P031_WINDOW_WIDTH_MIN, > -+ MT9P031_WINDOW_WIDTH_MAX), 2); > -+ rect.height = ALIGN(clamp(crop->rect.height, > -+ MT9P031_WINDOW_HEIGHT_MIN, > -+ MT9P031_WINDOW_HEIGHT_MAX), 2); > -+ rect.left = ALIGN(clamp(crop->rect.left, > -+ MT9P031_COLUMN_START_MIN, > -+ MT9P031_COLUMN_START_MAX), 2); > -+ rect.top = ALIGN(clamp(crop->rect.top, > -+ MT9P031_ROW_START_MIN, > -+ MT9P031_ROW_START_MAX), 2); > -+ > -+ c = mt9p031_get_pad_crop(mt9p031, fh, crop->pad, crop->which); > -+ > -+ if (rect.width != c->width || rect.height != c->height) { > -+ /* > -+ * Reset the output image size if the crop rectangle size has > -+ * been modified. > -+ */ > -+ f = mt9p031_get_pad_format(mt9p031, fh, crop->pad, > -+ crop->which); > -+ width = f->width; > -+ height = f->height; > -+ > -+ xskip = mt9p031_skip_for_crop(rect.width, &width, 7); > -+ yskip = mt9p031_skip_for_crop(rect.height, &height, 8); > -+ } else { > -+ xskip = mt9p031->xskip; > -+ yskip = mt9p031->yskip; > -+ f = NULL; > -+ } > -+ if (f) { > -+ f->width = width; > -+ f->height = height; > -+ } > -+ > -+ *c = rect; > -+ crop->rect = rect; > -+ > -+ mt9p031->xskip = xskip; > -+ mt9p031->yskip = yskip; > -+ mt9p031->rect = *c; > -+ return 0; > -+} > -+ > -+static int mt9p031_get_format(struct v4l2_subdev *sd, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_format *fmt) > -+{ > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ > -+ fmt->format = > -+ *mt9p031_get_pad_format(mt9p031, fh, fmt->pad, fmt- > >which); > -+ return 0; > -+} > -+ > -+static u16 mt9p031_skip_for_scale(s32 *source, s32 target, > -+ s32 max_skip, s32 max) > -+{ > -+ unsigned int skip; > -+ > -+ if (*source - *source / 4 < target) { > -+ *source = target; > -+ return 1; > -+ } > -+ > -+ skip = min(max, *source + target / 2) / target; > -+ if (skip > max_skip) > -+ skip = max_skip; > -+ *source = target * skip; > -+ > -+ return skip; > -+} > -+ > -+static int mt9p031_set_format(struct v4l2_subdev *sd, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_format *format) > -+{ > -+ struct v4l2_mbus_framefmt *__format; > -+ struct v4l2_rect *__crop, rect; > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ unsigned int width; > -+ unsigned int height; > -+ u16 xskip, yskip; > -+ > -+ __crop = mt9p031_get_pad_crop(mt9p031, fh, format->pad, format- > >which); > -+ > -+ width = clamp_t(int, ALIGN(format->format.width, 2), 2, > -+ > MT9P031_WINDOW_WIDTH_MAX); > -+ height = clamp_t(int, ALIGN(format->format.height, 2), 2, > -+ > MT9P031_WINDOW_HEIGHT_MAX); > -+ > -+ rect.width = __crop->width; > -+ rect.height = __crop->height; > -+ > -+ xskip = mt9p031_skip_for_scale(&rect.width, width, 7, > -+ MT9P031_WINDOW_WIDTH_MAX); > -+ if (rect.width + __crop->left > MT9P031_WINDOW_WIDTH_MAX) > -+ rect.left = (MT9P031_WINDOW_WIDTH_MAX - rect.width) / 2; > -+ else > -+ rect.left = __crop->left; > -+ yskip = mt9p031_skip_for_scale(&rect.height, height, 8, > -+ MT9P031_WINDOW_HEIGHT_MAX); > -+ if (rect.height + __crop->top > MT9P031_WINDOW_HEIGHT_MAX) > -+ rect.top = (MT9P031_WINDOW_HEIGHT_MAX - rect.height) / > 2; > -+ else > -+ rect.top = __crop->top; > -+ > -+ dev_dbg(mt9p031->subdev.v4l2_dev->dev, "%s(%ux%u : %u)\n", > __func__, > -+ width, height, format->which); > -+ if (__crop) > -+ *__crop = rect; > -+ > -+ __format = mt9p031_get_pad_format(mt9p031, fh, format->pad, > -+ format->which); > -+ __format->width = width; > -+ __format->height = height; > -+ format->format = *__format; > -+ > -+ mt9p031->xskip = xskip; > -+ mt9p031->yskip = yskip; > -+ mt9p031->rect = *__crop; > -+ return 0; > -+} > -+ > -+static int mt9p031_pll_enable(struct i2c_client *client) > -+{ > -+ struct mt9p031 *mt9p031 = to_mt9p031(client); > -+ int ret; > -+ > -+ ret = reg_write(client, MT9P031_PLL_CONTROL, > MT9P031_PLL_CONTROL_PWRON); > -+ if (ret < 0) > -+ return ret; > -+ > -+ /* Always set the maximum frequency allowed by VDD_IO */ > -+ if (mt9p031->pdata->vdd_io == MT9P031_VDD_IO_2V8) { > -+ ret = reg_write(client, MT9P031_PLL_CONFIG_1, > -+ MT9P031_PLL_CONFIG_1_M_96MHZ | > -+ MT9P031_PLL_CONFIG_1_N_96MHZ); > -+ if (ret < 0) > -+ return ret; > -+ ret = reg_write(client, MT9P031_PLL_CONFIG_2, > -+ MT9P031_PLL_CONFIG_2_P1_96MHZ); > -+ if (ret < 0) > -+ return ret; > -+ } else { > -+ ret = reg_write(client, MT9P031_PLL_CONFIG_1, > -+ MT9P031_PLL_CONFIG_1_M_48MHZ | > -+ MT9P031_PLL_CONFIG_1_N_48MHZ); > -+ if (ret < 0) > -+ return ret; > -+ ret = reg_write(client, MT9P031_PLL_CONFIG_2, > -+ MT9P031_PLL_CONFIG_2_P1_48MHZ); > -+ if (ret < 0) > -+ return ret; > -+ } > -+ mdelay(1); > -+ ret = reg_write(client, MT9P031_PLL_CONTROL, > -+ MT9P031_PLL_CONTROL_PWRON | > -+ MT9P031_PLL_CONTROL_USEPLL); > -+ mdelay(1); > -+ return ret; > -+} > -+ > -+static inline int mt9p031_pll_disable(struct i2c_client *client) > -+{ > -+ return reg_write(client, MT9P031_PLL_CONTROL, > -+ MT9P031_PLL_CONTROL_PWROFF); > -+} > -+ > -+static int mt9p031_s_stream(struct v4l2_subdev *sd, int enable) > -+{ > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); > -+ struct v4l2_rect rect = mt9p031->rect; > -+ u16 xskip = mt9p031->xskip; > -+ u16 yskip = mt9p031->yskip; > -+ int ret; > -+ > -+ if (enable) { > -+ ret = mt9p031_set_params(client, &rect, xskip, yskip); > -+ if (ret < 0) > -+ return ret; > -+ /* Switch to master "normal" mode */ > -+ ret = mt9p031_set_output_control(mt9p031, 0, > -+ > MT9P031_OUTPUT_CONTROL_CEN); > -+ if (ret < 0) > -+ return ret; > -+ ret = mt9p031_pll_enable(client); > -+ } else { > -+ /* Stop sensor readout */ > -+ ret = mt9p031_set_output_control(mt9p031, > -+ > MT9P031_OUTPUT_CONTROL_CEN, 0); > -+ if (ret < 0) > -+ return ret; > -+ ret = mt9p031_pll_disable(client); > -+ } > -+ return ret; > -+} > -+ > -+static int mt9p031_video_probe(struct i2c_client *client) > -+{ > -+ s32 data; > -+ > -+ /* Read out the chip version register */ > -+ data = reg_read(client, MT9P031_CHIP_VERSION); > -+ if (data != MT9P031_CHIP_VERSION_VALUE) { > -+ dev_err(&client->dev, > -+ "No MT9P031 chip detected, register read %x\n", > data); > -+ return -ENODEV; > -+ } > -+ > -+ dev_info(&client->dev, "Detected a MT9P031 chip ID %x\n", data); > -+ > -+ return 0; > -+} > -+ > -+static int mt9p031_set_power(struct v4l2_subdev *sd, int on) > -+{ > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ int ret = 0; > -+ > -+ mutex_lock(&mt9p031->power_lock); > -+ > -+ /* > -+ * If the power count is modified from 0 to != 0 or from != 0 to 0, > -+ * update the power state. > -+ */ > -+ if (mt9p031->power_count == !on) { > -+ if (on) { > -+ ret = mt9p031_power_on(mt9p031); > -+ if (ret) { > -+ dev_err(mt9p031->subdev.v4l2_dev->dev, > -+ "Failed to power on: %d\n", ret); > -+ goto out; > -+ } > -+ } else { > -+ mt9p031_power_off(mt9p031); > -+ } > -+ } > -+ > -+ /* Update the power count. */ > -+ mt9p031->power_count += on ? 1 : -1; > -+ WARN_ON(mt9p031->power_count < 0); > -+ > -+out: > -+ mutex_unlock(&mt9p031->power_lock); > -+ return ret; > -+} > -+ > -+static int mt9p031_registered(struct v4l2_subdev *sd) > -+{ > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); > -+ int ret; > -+ > -+ ret = mt9p031_set_power(&mt9p031->subdev, 1); > -+ if (ret) { > -+ dev_err(&client->dev, > -+ "Failed to power on device: %d\n", ret); > -+ return ret; > -+ } > -+ > -+ ret = mt9p031_video_probe(client); > -+ > -+ mt9p031_set_power(&mt9p031->subdev, 0); > -+ > -+ return ret; > -+} > -+ > -+static int mt9p031_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) > -+{ > -+ struct mt9p031 *mt9p031; > -+ mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ > -+ mt9p031->rect.width = MT9P031_WINDOW_WIDTH_DEF; > -+ mt9p031->rect.height = MT9P031_WINDOW_HEIGHT_DEF; > -+ mt9p031->rect.left = MT9P031_COLUMN_START_DEF; > -+ mt9p031->rect.top = MT9P031_ROW_START_DEF; > -+ > -+ if (mt9p031->pdata->version == MT9P031_MONOCHROME_VERSION) > -+ mt9p031->format.code = V4L2_MBUS_FMT_Y12_1X12; > -+ else > -+ mt9p031->format.code = V4L2_MBUS_FMT_SGRBG12_1X12; > -+ > -+ mt9p031->format.width = MT9P031_WINDOW_WIDTH_DEF; > -+ mt9p031->format.height = MT9P031_WINDOW_HEIGHT_DEF; > -+ mt9p031->format.field = V4L2_FIELD_NONE; > -+ mt9p031->format.colorspace = V4L2_COLORSPACE_SRGB; > -+ > -+ mt9p031->xskip = 1; > -+ mt9p031->yskip = 1; > -+ return mt9p031_set_power(sd, 1); > -+} > -+ > -+static int mt9p031_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) > -+{ > -+ return mt9p031_set_power(sd, 0); > -+} > -+ > -+static struct v4l2_subdev_core_ops mt9p031_subdev_core_ops = { > -+ .s_power = mt9p031_set_power, > -+}; > -+ > -+static struct v4l2_subdev_video_ops mt9p031_subdev_video_ops = { > -+ .s_stream = mt9p031_s_stream, > -+}; > -+ > -+static struct v4l2_subdev_pad_ops mt9p031_subdev_pad_ops = { > -+ .enum_mbus_code = mt9p031_enum_mbus_code, > -+ .get_fmt = mt9p031_get_format, > -+ .set_fmt = mt9p031_set_format, > -+ .get_crop = mt9p031_get_crop, > -+ .set_crop = mt9p031_set_crop, > -+}; > -+ > -+static struct v4l2_subdev_ops mt9p031_subdev_ops = { > -+ .core = &mt9p031_subdev_core_ops, > -+ .video = &mt9p031_subdev_video_ops, > -+ .pad = &mt9p031_subdev_pad_ops, > -+}; > -+ > -+static const struct v4l2_subdev_internal_ops mt9p031_subdev_internal_ops > = { > -+ .registered = mt9p031_registered, > -+ .open = mt9p031_open, > -+ .close = mt9p031_close, > -+}; > -+ > -+static int mt9p031_probe(struct i2c_client *client, > -+ const struct i2c_device_id *did) > -+{ > -+ int ret; > -+ struct mt9p031 *mt9p031; > -+ struct mt9p031_platform_data *pdata = client->dev.platform_data; > -+ struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); > -+ > -+ if (!i2c_check_functionality(adapter, > I2C_FUNC_SMBUS_WORD_DATA)) { > -+ dev_warn(&adapter->dev, > -+ "I2C-Adapter doesn't support > I2C_FUNC_SMBUS_WORD\n"); > -+ return -EIO; > -+ } > -+ > -+ mt9p031 = kzalloc(sizeof(struct mt9p031), GFP_KERNEL); > -+ if (!mt9p031) > -+ return -ENOMEM; > -+ > -+ mutex_init(&mt9p031->power_lock); > -+ v4l2_i2c_subdev_init(&mt9p031->subdev, client, > &mt9p031_subdev_ops); > -+ mt9p031->subdev.internal_ops = &mt9p031_subdev_internal_ops; > -+ > -+ mt9p031->pdata = pdata; > -+ > -+ mt9p031->pad.flags = MEDIA_PAD_FL_SOURCE; > -+ ret = media_entity_init(&mt9p031->subdev.entity, 1, &mt9p031->pad, > 0); > -+ if (ret) > -+ return ret; > -+ > -+ mt9p031->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; > -+ > -+ return 0; > -+} > -+ > -+static int mt9p031_remove(struct i2c_client *client) > -+{ > -+ struct v4l2_subdev *sd = i2c_get_clientdata(client); > -+ struct mt9p031 *mt9p031 = container_of(sd, struct mt9p031, subdev); > -+ > -+ v4l2_device_unregister_subdev(sd); > -+ media_entity_cleanup(&sd->entity); > -+ kfree(mt9p031); > -+ > -+ return 0; > -+} > -+ > -+static const struct i2c_device_id mt9p031_id[] = { > -+ { "mt9p031", 0 }, > -+ { } > -+}; > -+MODULE_DEVICE_TABLE(i2c, mt9p031_id); > -+ > -+static struct i2c_driver mt9p031_i2c_driver = { > -+ .driver = { > -+ .name = "mt9p031", > -+ }, > -+ .probe = mt9p031_probe, > -+ .remove = mt9p031_remove, > -+ .id_table = mt9p031_id, > -+}; > -+ > -+static int __init mt9p031_mod_init(void) > -+{ > -+ return i2c_add_driver(&mt9p031_i2c_driver); > -+} > -+ > -+static void __exit mt9p031_mod_exit(void) > -+{ > -+ i2c_del_driver(&mt9p031_i2c_driver); > -+} > -+ > -+module_init(mt9p031_mod_init); > -+module_exit(mt9p031_mod_exit); > -+ > -+MODULE_DESCRIPTION("Aptina MT9P031 Camera driver"); > -+MODULE_AUTHOR("Bastian Hecht <hechtb@gmail.com>"); > -+MODULE_LICENSE("GPL v2"); > -diff --git a/include/media/mt9p031.h b/include/media/mt9p031.h > -new file mode 100644 > -index 0000000..27b4c75 > ---- /dev/null > -+++ b/include/media/mt9p031.h > -@@ -0,0 +1,23 @@ > -+#ifndef MT9P031_H > -+#define MT9P031_H > -+ > -+struct v4l2_subdev; > -+ > -+enum { > -+ MT9P031_COLOR_VERSION = 0, > -+ MT9P031_MONOCHROME_VERSION = 1, > -+}; > -+ > -+enum { > -+ MT9P031_VDD_IO_1V8 = 0, > -+ MT9P031_VDD_IO_2V8 = 1, > -+}; > -+ > -+struct mt9p031_platform_data { > -+ int (*set_xclk)(struct v4l2_subdev *subdev, int hz); > -+ int (*reset)(struct v4l2_subdev *subdev, int active); > -+ int vdd_io; /* MT9P031_VDD_IO_1V8 or MT9P031_VDD_IO_2V8 */ > -+ int version; /* MT9P031_COLOR_VERSION or > MT9P031_MONOCHROME_VERSION */ > -+}; > -+ > -+#endif > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/camera/0002-v4l-Add- > mt9v032-sensor-driver.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/camera/0002-v4l-Add-mt9v032-sensor-driver.patch > deleted file mode 100644 > index fb7cd20..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/camera/0002-v4l-Add-mt9v032- > sensor-driver.patch > +++ /dev/null > @@ -1,853 +0,0 @@ > -From ba65e798c98e9c4d331deb2b51337964336d3f78 Mon Sep 17 00:00:00 > 2001 > -From: Detlev Casanova <detlev.casanova@gmail.com> > -Date: Sun, 28 Nov 2010 19:07:20 +0100 > -Subject: [PATCH 2/3] v4l: Add mt9v032 sensor driver > - > -The MT9V032 is a parallel wide VGA sensor from Aptina (formerly Micron) > -controlled through I2C. > - > -The driver creates a V4L2 subdevice. It currently supports binning and > -cropping, and the gain, auto gain, exposure, auto exposure and test > -pattern controls. > - > -Signed-off-by: Detlev Casanova <detlev.casanova@gmail.com> > -Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > ---- > - drivers/media/video/Kconfig | 7 + > - drivers/media/video/Makefile | 1 + > - drivers/media/video/mt9v032.c | 773 > +++++++++++++++++++++++++++++++++++++++++ > - include/media/mt9v032.h | 12 + > - 4 files changed, 793 insertions(+), 0 deletions(-) > - create mode 100644 drivers/media/video/mt9v032.c > - create mode 100644 include/media/mt9v032.h > - > -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig > -index cb87e35..3a5bc57 100644 > ---- a/drivers/media/video/Kconfig > -+++ b/drivers/media/video/Kconfig > -@@ -344,6 +344,13 @@ config VIDEO_MT9V011 > - mt0v011 1.3 Mpixel camera. It currently only works with the > - em28xx driver. > - > -+config VIDEO_MT9V032 > -+ tristate "Micron MT9V032 sensor support" > -+ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API > -+ ---help--- > -+ This is a Video4Linux2 sensor-level driver for the Micron > -+ MT9V032 752x480 CMOS sensor. > -+ > - config VIDEO_TCM825X > - tristate "TCM825x camera sensor support" > - depends on I2C && VIDEO_V4L2 > -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile > -index 912b29b..6679c6a 100644 > ---- a/drivers/media/video/Makefile > -+++ b/drivers/media/video/Makefile > -@@ -67,6 +67,7 @@ obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o > - obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o > - obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o > - obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o > -+obj-$(CONFIG_VIDEO_MT9V032) += mt9v032.o > - obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o > - obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o > - > -diff --git a/drivers/media/video/mt9v032.c b/drivers/media/video/mt9v032.c > -new file mode 100644 > -index 0000000..c64e1dc > ---- /dev/null > -+++ b/drivers/media/video/mt9v032.c > -@@ -0,0 +1,773 @@ > -+/* > -+ * Driver for MT9V032 CMOS Image Sensor from Micron > -+ * > -+ * Copyright (C) 2010, Laurent Pinchart > <laurent.pinchart@ideasonboard.com> > -+ * > -+ * Based on the MT9M001 driver, > -+ * > -+ * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include <linux/delay.h> > -+#include <linux/i2c.h> > -+#include <linux/log2.h> > -+#include <linux/mutex.h> > -+#include <linux/slab.h> > -+#include <linux/videodev2.h> > -+#include <linux/v4l2-mediabus.h> > -+ > -+#include <media/mt9v032.h> > -+#include <media/v4l2-ctrls.h> > -+#include <media/v4l2-device.h> > -+#include <media/v4l2-subdev.h> > -+ > -+#define MT9V032_PIXEL_ARRAY_HEIGHT 492 > -+#define MT9V032_PIXEL_ARRAY_WIDTH 782 > -+ > -+#define MT9V032_CHIP_VERSION 0x00 > -+#define MT9V032_CHIP_ID_REV1 > 0x1311 > -+#define MT9V032_CHIP_ID_REV3 > 0x1313 > -+#define MT9V032_COLUMN_START 0x01 > -+#define MT9V032_COLUMN_START_MIN 1 > -+#define MT9V032_COLUMN_START_DEF 1 > -+#define MT9V032_COLUMN_START_MAX 752 > -+#define MT9V032_ROW_START 0x02 > -+#define MT9V032_ROW_START_MIN 4 > -+#define MT9V032_ROW_START_DEF 5 > -+#define MT9V032_ROW_START_MAX 482 > -+#define MT9V032_WINDOW_HEIGHT 0x03 > -+#define MT9V032_WINDOW_HEIGHT_MIN 1 > -+#define MT9V032_WINDOW_HEIGHT_DEF 480 > -+#define MT9V032_WINDOW_HEIGHT_MAX 480 > -+#define MT9V032_WINDOW_WIDTH 0x04 > -+#define MT9V032_WINDOW_WIDTH_MIN 1 > -+#define MT9V032_WINDOW_WIDTH_DEF 752 > -+#define MT9V032_WINDOW_WIDTH_MAX 752 > -+#define MT9V032_HORIZONTAL_BLANKING 0x05 > -+#define MT9V032_HORIZONTAL_BLANKING_MIN > 43 > -+#define MT9V032_HORIZONTAL_BLANKING_MAX > 1023 > -+#define MT9V032_VERTICAL_BLANKING 0x06 > -+#define MT9V032_VERTICAL_BLANKING_MIN 4 > -+#define MT9V032_VERTICAL_BLANKING_MAX 3000 > -+#define MT9V032_CHIP_CONTROL 0x07 > -+#define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << > 3) > -+#define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << > 7) > -+#define MT9V032_CHIP_CONTROL_SEQUENTIAL > (1 << 8) > -+#define MT9V032_SHUTTER_WIDTH1 0x08 > -+#define MT9V032_SHUTTER_WIDTH2 0x09 > -+#define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a > -+#define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b > -+#define MT9V032_TOTAL_SHUTTER_WIDTH_MIN > 1 > -+#define MT9V032_TOTAL_SHUTTER_WIDTH_DEF > 480 > -+#define MT9V032_TOTAL_SHUTTER_WIDTH_MAX > 32767 > -+#define MT9V032_RESET 0x0c > -+#define MT9V032_READ_MODE 0x0d > -+#define MT9V032_READ_MODE_ROW_BIN_MASK > (3 << 0) > -+#define MT9V032_READ_MODE_ROW_BIN_SHIFT > 0 > -+#define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << > 2) > -+#define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2 > -+#define MT9V032_READ_MODE_ROW_FLIP (1 << > 4) > -+#define MT9V032_READ_MODE_COLUMN_FLIP (1 << > 5) > -+#define MT9V032_READ_MODE_DARK_COLUMNS > (1 << 6) > -+#define MT9V032_READ_MODE_DARK_ROWS (1 << > 7) > -+#define MT9V032_PIXEL_OPERATION_MODE 0x0f > -+#define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << > 2) > -+#define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << > 6) > -+#define MT9V032_ANALOG_GAIN 0x35 > -+#define MT9V032_ANALOG_GAIN_MIN 16 > -+#define MT9V032_ANALOG_GAIN_DEF 16 > -+#define MT9V032_ANALOG_GAIN_MAX 64 > -+#define MT9V032_MAX_ANALOG_GAIN 0x36 > -+#define MT9V032_MAX_ANALOG_GAIN_MAX 127 > -+#define MT9V032_FRAME_DARK_AVERAGE 0x42 > -+#define MT9V032_DARK_AVG_THRESH 0x46 > -+#define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 > << 0) > -+#define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0 > -+#define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 > << 8) > -+#define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8 > -+#define MT9V032_ROW_NOISE_CORR_CONTROL 0x70 > -+#define MT9V032_ROW_NOISE_CORR_ENABLE (1 << > 5) > -+#define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << > 7) > -+#define MT9V032_PIXEL_CLOCK 0x74 > -+#define MT9V032_PIXEL_CLOCK_INV_LINE (1 << > 0) > -+#define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << > 1) > -+#define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << > 2) > -+#define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << > 3) > -+#define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << > 4) > -+#define MT9V032_TEST_PATTERN 0x7f > -+#define MT9V032_TEST_PATTERN_DATA_MASK > (1023 << 0) > -+#define MT9V032_TEST_PATTERN_DATA_SHIFT 0 > -+#define MT9V032_TEST_PATTERN_USE_DATA (1 << > 10) > -+#define MT9V032_TEST_PATTERN_GRAY_MASK (3 << > 11) > -+#define MT9V032_TEST_PATTERN_GRAY_NONE (0 << > 11) > -+#define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << > 11) > -+#define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << > 11) > -+#define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << > 11) > -+#define MT9V032_TEST_PATTERN_ENABLE (1 << > 13) > -+#define MT9V032_TEST_PATTERN_FLIP (1 << 14) > -+#define MT9V032_AEC_AGC_ENABLE 0xaf > -+#define MT9V032_AEC_ENABLE (1 << 0) > -+#define MT9V032_AGC_ENABLE (1 << > 1) > -+#define MT9V032_THERMAL_INFO 0xc1 > -+ > -+struct mt9v032 { > -+ struct v4l2_subdev subdev; > -+ struct media_pad pad; > -+ > -+ struct v4l2_mbus_framefmt format; > -+ struct v4l2_rect crop; > -+ > -+ struct v4l2_ctrl_handler ctrls; > -+ > -+ struct mutex power_lock; > -+ int power_count; > -+ > -+ struct mt9v032_platform_data *pdata; > -+ u16 chip_control; > -+ u16 aec_agc; > -+}; > -+ > -+static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd) > -+{ > -+ return container_of(sd, struct mt9v032, subdev); > -+} > -+ > -+static int mt9v032_read(struct i2c_client *client, const u8 reg) > -+{ > -+ s32 data = i2c_smbus_read_word_data(client, reg); > -+ dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__, > -+ swab16(data), reg); > -+ return data < 0 ? data : swab16(data); > -+} > -+ > -+static int mt9v032_write(struct i2c_client *client, const u8 reg, > -+ const u16 data) > -+{ > -+ dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__, > -+ data, reg); > -+ return i2c_smbus_write_word_data(client, reg, swab16(data)); > -+} > -+ > -+static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, > u16 set) > -+{ > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); > -+ u16 value = (mt9v032->chip_control & ~clear) | set; > -+ int ret; > -+ > -+ ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value); > -+ if (ret < 0) > -+ return ret; > -+ > -+ mt9v032->chip_control = value; > -+ return 0; > -+} > -+ > -+static int > -+mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable) > -+{ > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); > -+ u16 value = mt9v032->aec_agc; > -+ int ret; > -+ > -+ if (enable) > -+ value |= which; > -+ else > -+ value &= ~which; > -+ > -+ ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value); > -+ if (ret < 0) > -+ return ret; > -+ > -+ mt9v032->aec_agc = value; > -+ return 0; > -+} > -+ > -+static int mt9v032_power_on(struct mt9v032 *mt9v032) > -+{ > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); > -+ int ret; > -+ > -+ if (mt9v032->pdata->set_clock) { > -+ mt9v032->pdata->set_clock(&mt9v032->subdev, 25000000); > -+ udelay(1); > -+ } > -+ > -+ /* Reset the chip and stop data read out */ > -+ ret = mt9v032_write(client, MT9V032_RESET, 1); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = mt9v032_write(client, MT9V032_RESET, 0); > -+ if (ret < 0) > -+ return ret; > -+ > -+ return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0); > -+} > -+ > -+static void mt9v032_power_off(struct mt9v032 *mt9v032) > -+{ > -+ if (mt9v032->pdata->set_clock) > -+ mt9v032->pdata->set_clock(&mt9v032->subdev, 0); > -+} > -+ > -+static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on) > -+{ > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); > -+ int ret; > -+ > -+ if (!on) { > -+ mt9v032_power_off(mt9v032); > -+ return 0; > -+ } > -+ > -+ ret = mt9v032_power_on(mt9v032); > -+ if (ret < 0) > -+ return ret; > -+ > -+ /* Configure the pixel clock polarity */ > -+ if (mt9v032->pdata && mt9v032->pdata->clk_pol) { > -+ ret = mt9v032_write(client, MT9V032_PIXEL_CLOCK, > -+ MT9V032_PIXEL_CLOCK_INV_PXL_CLK); > -+ if (ret < 0) > -+ return ret; > -+ } > -+ > -+ /* Disable the noise correction algorithm and restore the controls. */ > -+ ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, > 0); > -+ if (ret < 0) > -+ return ret; > -+ > -+ return v4l2_ctrl_handler_setup(&mt9v032->ctrls); > -+} > -+ > -+/* ----------------------------------------------------------------------------- > -+ * V4L2 subdev video operations > -+ */ > -+ > -+static struct v4l2_mbus_framefmt * > -+__mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct > v4l2_subdev_fh *fh, > -+ unsigned int pad, enum v4l2_subdev_format_whence > which) > -+{ > -+ switch (which) { > -+ case V4L2_SUBDEV_FORMAT_TRY: > -+ return v4l2_subdev_get_try_format(fh, pad); > -+ case V4L2_SUBDEV_FORMAT_ACTIVE: > -+ return &mt9v032->format; > -+ default: > -+ return NULL; > -+ } > -+} > -+ > -+static struct v4l2_rect * > -+__mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct > v4l2_subdev_fh *fh, > -+ unsigned int pad, enum v4l2_subdev_format_whence > which) > -+{ > -+ switch (which) { > -+ case V4L2_SUBDEV_FORMAT_TRY: > -+ return v4l2_subdev_get_try_crop(fh, pad); > -+ case V4L2_SUBDEV_FORMAT_ACTIVE: > -+ return &mt9v032->crop; > -+ default: > -+ return NULL; > -+ } > -+} > -+ > -+static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable) > -+{ > -+ const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE > -+ | MT9V032_CHIP_CONTROL_DOUT_ENABLE > -+ | MT9V032_CHIP_CONTROL_SEQUENTIAL; > -+ struct i2c_client *client = v4l2_get_subdevdata(subdev); > -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); > -+ struct v4l2_mbus_framefmt *format = &mt9v032->format; > -+ struct v4l2_rect *crop = &mt9v032->crop; > -+ unsigned int hratio; > -+ unsigned int vratio; > -+ int ret; > -+ > -+ if (!enable) > -+ return mt9v032_set_chip_control(mt9v032, mode, 0); > -+ > -+ /* Configure the window size and row/column bin */ > -+ hratio = DIV_ROUND_CLOSEST(crop->width, format->width); > -+ vratio = DIV_ROUND_CLOSEST(crop->height, format->height); > -+ > -+ ret = mt9v032_write(client, MT9V032_READ_MODE, > -+ (hratio - 1) << MT9V032_READ_MODE_ROW_BIN_SHIFT | > -+ (vratio - 1) << > MT9V032_READ_MODE_COLUMN_BIN_SHIFT); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = mt9v032_write(client, MT9V032_ROW_START, crop->top); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop- > >width); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop- > >height); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING, > -+ max(43, 660 - crop->width)); > -+ if (ret < 0) > -+ return ret; > -+ > -+ /* Switch to master "normal" mode */ > -+ return mt9v032_set_chip_control(mt9v032, 0, mode); > -+} > -+ > -+static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_mbus_code_enum > *code) > -+{ > -+ if (code->index > 0) > -+ return -EINVAL; > -+ > -+ code->code = V4L2_MBUS_FMT_SGRBG10_1X10; > -+ return 0; > -+} > -+ > -+static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_frame_size_enum *fse) > -+{ > -+ if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10) > -+ return -EINVAL; > -+ > -+ fse->min_width = MT9V032_WINDOW_WIDTH_DEF / fse->index; > -+ fse->max_width = fse->min_width; > -+ fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / fse->index; > -+ fse->max_height = fse->min_height; > -+ > -+ return 0; > -+} > -+ > -+static int mt9v032_get_format(struct v4l2_subdev *subdev, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_format *format) > -+{ > -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); > -+ > -+ format->format = *__mt9v032_get_pad_format(mt9v032, fh, format- > >pad, > -+ format->which); > -+ return 0; > -+} > -+ > -+static int mt9v032_set_format(struct v4l2_subdev *subdev, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_format *format) > -+{ > -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); > -+ struct v4l2_mbus_framefmt *__format; > -+ struct v4l2_rect *__crop; > -+ unsigned int width; > -+ unsigned int height; > -+ unsigned int hratio; > -+ unsigned int vratio; > -+ > -+ __crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad, > -+ format->which); > -+ > -+ /* Clamp the width and height to avoid dividing by zero. */ > -+ width = clamp_t(unsigned int, ALIGN(format->format.width, 2), > -+ max(__crop->width / 8, > MT9V032_WINDOW_WIDTH_MIN), > -+ __crop->width); > -+ height = clamp_t(unsigned int, ALIGN(format->format.height, 2), > -+ max(__crop->height / 8, > MT9V032_WINDOW_HEIGHT_MIN), > -+ __crop->height); > -+ > -+ hratio = DIV_ROUND_CLOSEST(__crop->width, width); > -+ vratio = DIV_ROUND_CLOSEST(__crop->height, height); > -+ > -+ __format = __mt9v032_get_pad_format(mt9v032, fh, format->pad, > -+ format->which); > -+ __format->width = __crop->width / hratio; > -+ __format->height = __crop->height / vratio; > -+ > -+ format->format = *__format; > -+ > -+ return 0; > -+} > -+ > -+static int mt9v032_get_crop(struct v4l2_subdev *subdev, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_crop *crop) > -+{ > -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); > -+ > -+ crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad, > -+ crop->which); > -+ return 0; > -+} > -+ > -+static int mt9v032_set_crop(struct v4l2_subdev *subdev, > -+ struct v4l2_subdev_fh *fh, > -+ struct v4l2_subdev_crop *crop) > -+{ > -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); > -+ struct v4l2_mbus_framefmt *__format; > -+ struct v4l2_rect *__crop; > -+ struct v4l2_rect rect; > -+ > -+ /* Clamp the crop rectangle boundaries and align them to a non > multiple > -+ * of 2 pixels to ensure a GRBG Bayer pattern. > -+ */ > -+ rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1, > -+ MT9V032_COLUMN_START_MIN, > -+ MT9V032_COLUMN_START_MAX); > -+ rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1, > -+ MT9V032_ROW_START_MIN, > -+ MT9V032_ROW_START_MAX); > -+ rect.width = clamp(ALIGN(crop->rect.width, 2), > -+ MT9V032_WINDOW_WIDTH_MIN, > -+ MT9V032_WINDOW_WIDTH_MAX); > -+ rect.height = clamp(ALIGN(crop->rect.height, 2), > -+ MT9V032_WINDOW_HEIGHT_MIN, > -+ MT9V032_WINDOW_HEIGHT_MAX); > -+ > -+ rect.width = min(rect.width, MT9V032_PIXEL_ARRAY_WIDTH - > rect.left); > -+ rect.height = min(rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - > rect.top); > -+ > -+ __crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop- > >which); > -+ > -+ if (rect.width != __crop->width || rect.height != __crop->height) { > -+ /* Reset the output image size if the crop rectangle size has > -+ * been modified. > -+ */ > -+ __format = __mt9v032_get_pad_format(mt9v032, fh, crop- > >pad, > -+ crop->which); > -+ __format->width = rect.width; > -+ __format->height = rect.height; > -+ } > -+ > -+ *__crop = rect; > -+ crop->rect = rect; > -+ > -+ return 0; > -+} > -+ > -+/* ----------------------------------------------------------------------------- > -+ * V4L2 subdev control operations > -+ */ > -+ > -+#define V4L2_CID_TEST_PATTERN (V4L2_CID_USER_BASE | > 0x1001) > -+ > -+static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl) > -+{ > -+ struct mt9v032 *mt9v032 = > -+ container_of(ctrl->handler, struct mt9v032, ctrls); > -+ struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); > -+ u16 data; > -+ > -+ switch (ctrl->id) { > -+ case V4L2_CID_AUTOGAIN: > -+ return mt9v032_update_aec_agc(mt9v032, > MT9V032_AGC_ENABLE, > -+ ctrl->val); > -+ > -+ case V4L2_CID_GAIN: > -+ return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl- > >val); > -+ > -+ case V4L2_CID_EXPOSURE_AUTO: > -+ return mt9v032_update_aec_agc(mt9v032, > MT9V032_AEC_ENABLE, > -+ ctrl->val); > -+ > -+ case V4L2_CID_EXPOSURE: > -+ return mt9v032_write(client, > MT9V032_TOTAL_SHUTTER_WIDTH, > -+ ctrl->val); > -+ > -+ case V4L2_CID_TEST_PATTERN: > -+ switch (ctrl->val) { > -+ case 0: > -+ data = 0; > -+ break; > -+ case 1: > -+ data = MT9V032_TEST_PATTERN_GRAY_VERTICAL > -+ | MT9V032_TEST_PATTERN_ENABLE; > -+ break; > -+ case 2: > -+ data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL > -+ | MT9V032_TEST_PATTERN_ENABLE; > -+ break; > -+ case 3: > -+ data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL > -+ | MT9V032_TEST_PATTERN_ENABLE; > -+ break; > -+ default: > -+ data = (ctrl->val << > MT9V032_TEST_PATTERN_DATA_SHIFT) > -+ | MT9V032_TEST_PATTERN_USE_DATA > -+ | MT9V032_TEST_PATTERN_ENABLE > -+ | MT9V032_TEST_PATTERN_FLIP; > -+ break; > -+ } > -+ > -+ return mt9v032_write(client, MT9V032_TEST_PATTERN, data); > -+ } > -+ > -+ return 0; > -+} > -+ > -+static struct v4l2_ctrl_ops mt9v032_ctrl_ops = { > -+ .s_ctrl = mt9v032_s_ctrl, > -+}; > -+ > -+static const struct v4l2_ctrl_config mt9v032_ctrls[] = { > -+ { > -+ .ops = &mt9v032_ctrl_ops, > -+ .id = V4L2_CID_TEST_PATTERN, > -+ .type = V4L2_CTRL_TYPE_INTEGER, > -+ .name = "Test pattern", > -+ .min = 0, > -+ .max = 1023, > -+ .step = 1, > -+ .def = 0, > -+ .flags = 0, > -+ } > -+}; > -+ > -+/* ----------------------------------------------------------------------------- > -+ * V4L2 subdev core operations > -+ */ > -+ > -+static int mt9v032_set_power(struct v4l2_subdev *subdev, int on) > -+{ > -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); > -+ int ret = 0; > -+ > -+ mutex_lock(&mt9v032->power_lock); > -+ > -+ /* If the power count is modified from 0 to != 0 or from != 0 to 0, > -+ * update the power state. > -+ */ > -+ if (mt9v032->power_count == !on) { > -+ ret = __mt9v032_set_power(mt9v032, !!on); > -+ if (ret < 0) > -+ goto done; > -+ } > -+ > -+ /* Update the power count. */ > -+ mt9v032->power_count += on ? 1 : -1; > -+ WARN_ON(mt9v032->power_count < 0); > -+ > -+done: > -+ mutex_unlock(&mt9v032->power_lock); > -+ return ret; > -+} > -+ > -+/* ----------------------------------------------------------------------------- > -+ * V4L2 subdev internal operations > -+ */ > -+ > -+static int mt9v032_registered(struct v4l2_subdev *subdev) > -+{ > -+ struct i2c_client *client = v4l2_get_subdevdata(subdev); > -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); > -+ s32 data; > -+ int ret; > -+ > -+ dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n", > -+ client->addr); > -+ > -+ ret = mt9v032_power_on(mt9v032); > -+ if (ret < 0) { > -+ dev_err(&client->dev, "MT9V032 power up failed\n"); > -+ return ret; > -+ } > -+ > -+ /* Read and check the sensor version */ > -+ data = mt9v032_read(client, MT9V032_CHIP_VERSION); > -+ if (data != MT9V032_CHIP_ID_REV1 && data != > MT9V032_CHIP_ID_REV3) { > -+ dev_err(&client->dev, "MT9V032 not detected, wrong version > " > -+ "0x%04x\n", data); > -+ return -ENODEV; > -+ } > -+ > -+ mt9v032_power_off(mt9v032); > -+ > -+ dev_info(&client->dev, "MT9V032 detected at address 0x%02x\n", > -+ client->addr); > -+ > -+ return ret; > -+} > -+ > -+static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh > *fh) > -+{ > -+ struct v4l2_mbus_framefmt *format; > -+ struct v4l2_rect *crop; > -+ > -+ crop = v4l2_subdev_get_try_crop(fh, 0); > -+ crop->left = MT9V032_COLUMN_START_DEF; > -+ crop->top = MT9V032_ROW_START_DEF; > -+ crop->width = MT9V032_WINDOW_WIDTH_DEF; > -+ crop->height = MT9V032_WINDOW_HEIGHT_DEF; > -+ > -+ format = v4l2_subdev_get_try_format(fh, 0); > -+ format->code = V4L2_MBUS_FMT_SGRBG10_1X10; > -+ format->width = MT9V032_WINDOW_WIDTH_DEF; > -+ format->height = MT9V032_WINDOW_HEIGHT_DEF; > -+ format->field = V4L2_FIELD_NONE; > -+ format->colorspace = V4L2_COLORSPACE_SRGB; > -+ > -+ return mt9v032_set_power(subdev, 1); > -+} > -+ > -+static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh > *fh) > -+{ > -+ return mt9v032_set_power(subdev, 0); > -+} > -+ > -+static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = { > -+ .s_power = mt9v032_set_power, > -+}; > -+ > -+static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = { > -+ .s_stream = mt9v032_s_stream, > -+}; > -+ > -+static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = { > -+ .enum_mbus_code = mt9v032_enum_mbus_code, > -+ .enum_frame_size = mt9v032_enum_frame_size, > -+ .get_fmt = mt9v032_get_format, > -+ .set_fmt = mt9v032_set_format, > -+ .get_crop = mt9v032_get_crop, > -+ .set_crop = mt9v032_set_crop, > -+}; > -+ > -+static struct v4l2_subdev_ops mt9v032_subdev_ops = { > -+ .core = &mt9v032_subdev_core_ops, > -+ .video = &mt9v032_subdev_video_ops, > -+ .pad = &mt9v032_subdev_pad_ops, > -+}; > -+ > -+static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops > = { > -+ .registered = mt9v032_registered, > -+ .open = mt9v032_open, > -+ .close = mt9v032_close, > -+}; > -+ > -+/* ----------------------------------------------------------------------------- > -+ * Driver initialization and probing > -+ */ > -+ > -+static int mt9v032_probe(struct i2c_client *client, > -+ const struct i2c_device_id *did) > -+{ > -+ struct mt9v032 *mt9v032; > -+ unsigned int i; > -+ int ret; > -+ > -+ if (!i2c_check_functionality(client->adapter, > -+ I2C_FUNC_SMBUS_WORD_DATA)) { > -+ dev_warn(&client->adapter->dev, > -+ "I2C-Adapter doesn't support > I2C_FUNC_SMBUS_WORD\n"); > -+ return -EIO; > -+ } > -+ > -+ mt9v032 = kzalloc(sizeof(*mt9v032), GFP_KERNEL); > -+ if (!mt9v032) > -+ return -ENOMEM; > -+ > -+ mutex_init(&mt9v032->power_lock); > -+ mt9v032->pdata = client->dev.platform_data; > -+ > -+ v4l2_ctrl_handler_init(&mt9v032->ctrls, ARRAY_SIZE(mt9v032_ctrls) + > 4); > -+ > -+ v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, > -+ V4L2_CID_AUTOGAIN, 0, 1, 1, 1); > -+ v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, > -+ V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN, > -+ MT9V032_ANALOG_GAIN_MAX, 1, > MT9V032_ANALOG_GAIN_DEF); > -+ v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops, > -+ V4L2_CID_EXPOSURE_AUTO, > V4L2_EXPOSURE_MANUAL, 0, > -+ V4L2_EXPOSURE_AUTO); > -+ v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, > -+ V4L2_CID_EXPOSURE, > MT9V032_TOTAL_SHUTTER_WIDTH_MIN, > -+ MT9V032_TOTAL_SHUTTER_WIDTH_MAX, 1, > -+ MT9V032_TOTAL_SHUTTER_WIDTH_DEF); > -+ > -+ for (i = 0; i < ARRAY_SIZE(mt9v032_ctrls); ++i) > -+ v4l2_ctrl_new_custom(&mt9v032->ctrls, &mt9v032_ctrls[i], > NULL); > -+ > -+ mt9v032->subdev.ctrl_handler = &mt9v032->ctrls; > -+ > -+ if (mt9v032->ctrls.error) > -+ printk(KERN_INFO "%s: control initialization error %d\n", > -+ __func__, mt9v032->ctrls.error); > -+ > -+ mt9v032->crop.left = MT9V032_COLUMN_START_DEF; > -+ mt9v032->crop.top = MT9V032_ROW_START_DEF; > -+ mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF; > -+ mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF; > -+ > -+ mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10; > -+ mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF; > -+ mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF; > -+ mt9v032->format.field = V4L2_FIELD_NONE; > -+ mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB; > -+ > -+ mt9v032->aec_agc = MT9V032_AEC_ENABLE | > MT9V032_AGC_ENABLE; > -+ > -+ v4l2_i2c_subdev_init(&mt9v032->subdev, client, > &mt9v032_subdev_ops); > -+ mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops; > -+ mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; > -+ > -+ mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE; > -+ ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, > 0); > -+ if (ret < 0) > -+ kfree(mt9v032); > -+ > -+ return ret; > -+} > -+ > -+static int mt9v032_remove(struct i2c_client *client) > -+{ > -+ struct v4l2_subdev *subdev = i2c_get_clientdata(client); > -+ struct mt9v032 *mt9v032 = to_mt9v032(subdev); > -+ > -+ v4l2_device_unregister_subdev(subdev); > -+ media_entity_cleanup(&subdev->entity); > -+ kfree(mt9v032); > -+ return 0; > -+} > -+ > -+static const struct i2c_device_id mt9v032_id[] = { > -+ { "mt9v032", 0 }, > -+ { } > -+}; > -+MODULE_DEVICE_TABLE(i2c, mt9v032_id); > -+ > -+static struct i2c_driver mt9v032_driver = { > -+ .driver = { > -+ .name = "mt9v032", > -+ }, > -+ .probe = mt9v032_probe, > -+ .remove = mt9v032_remove, > -+ .id_table = mt9v032_id, > -+}; > -+ > -+static int __init mt9v032_init(void) > -+{ > -+ return i2c_add_driver(&mt9v032_driver); > -+} > -+ > -+static void __exit mt9v032_exit(void) > -+{ > -+ i2c_del_driver(&mt9v032_driver); > -+} > -+ > -+module_init(mt9v032_init); > -+module_exit(mt9v032_exit); > -+ > -+MODULE_DESCRIPTION("Aptina MT9V032 Camera driver"); > -+MODULE_AUTHOR("Laurent Pinchart > <laurent.pinchart@ideasonboard.com>"); > -+MODULE_LICENSE("GPL"); > -diff --git a/include/media/mt9v032.h b/include/media/mt9v032.h > -new file mode 100644 > -index 0000000..5e27f9b > ---- /dev/null > -+++ b/include/media/mt9v032.h > -@@ -0,0 +1,12 @@ > -+#ifndef _MEDIA_MT9V032_H > -+#define _MEDIA_MT9V032_H > -+ > -+struct v4l2_subdev; > -+ > -+struct mt9v032_platform_data { > -+ unsigned int clk_pol:1; > -+ > -+ void (*set_clock)(struct v4l2_subdev *subdev, unsigned int rate); > -+}; > -+ > -+#endif > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/camera/0003-Add-support- > for-mt9p031-LI-5M03-module-in-Beagleboar.patch b/recipes- > kernel/linux/linux-omap-2.6.39/camera/0003-Add-support-for-mt9p031-LI- > 5M03-module-in-Beagleboar.patch > deleted file mode 100644 > index a1807e7..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/camera/0003-Add-support-for- > mt9p031-LI-5M03-module-in-Beagleboar.patch > +++ /dev/null > @@ -1,162 +0,0 @@ > -From f662a8a2b9794121568903f5cc969e50eb151892 Mon Sep 17 00:00:00 > 2001 > -From: Javier Martin <javier.martin@vista-silicon.com> > -Date: Mon, 30 May 2011 10:37:17 +0200 > -Subject: [PATCH 3/3] Add support for mt9p031 (LI-5M03 module) in > Beagleboard xM. > - > -Since isp clocks have not been exposed yet, this patch > -includes a temporal solution for testing mt9p031 driver > -in Beagleboard xM. > - > -Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> > ---- > - arch/arm/mach-omap2/Makefile | 1 + > - arch/arm/mach-omap2/board-omap3beagle-camera.c | 95 > ++++++++++++++++++++++++ > - arch/arm/mach-omap2/board-omap3beagle.c | 5 + > - 3 files changed, 101 insertions(+), 0 deletions(-) > - create mode 100644 arch/arm/mach-omap2/board-omap3beagle-camera.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index 512b152..05cd983 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -179,6 +179,7 @@ obj-$(CONFIG_MACH_OMAP_2430SDP) > += board-2430sdp.o \ > - hsmmc.o > - obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o > - obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board- > omap3beagle.o \ > -+ board-omap3beagle-camera.o \ > - hsmmc.o > - obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o \ > - hsmmc.o > -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c > b/arch/arm/mach-omap2/board-omap3beagle-camera.c > -new file mode 100644 > -index 0000000..2632557 > ---- /dev/null > -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c > -@@ -0,0 +1,95 @@ > -+#include <linux/gpio.h> > -+#include <linux/regulator/machine.h> > -+ > -+#include <plat/i2c.h> > -+ > -+#include <media/mt9p031.h> > -+#include <asm/mach-types.h> > -+#include "devices.h" > -+#include "../../../drivers/media/video/omap3isp/isp.h" > -+ > -+#define MT9P031_RESET_GPIO 98 > -+#define MT9P031_XCLK ISP_XCLK_A > -+ > -+static struct regulator *reg_1v8, *reg_2v8; > -+ > -+static int beagle_cam_set_xclk(struct v4l2_subdev *subdev, int hz) > -+{ > -+ struct isp_device *isp = v4l2_dev_to_isp_device(subdev->v4l2_dev); > -+ int ret; > -+ > -+ ret = isp->platform_cb.set_xclk(isp, hz, MT9P031_XCLK); > -+ return 0; > -+} > -+ > -+static int beagle_cam_reset(struct v4l2_subdev *subdev, int active) > -+{ > -+ /* Set RESET_BAR to !active */ > -+ gpio_set_value(MT9P031_RESET_GPIO, !active); > -+ > -+ return 0; > -+} > -+ > -+static struct mt9p031_platform_data beagle_mt9p031_platform_data = { > -+ .set_xclk = beagle_cam_set_xclk, > -+ .reset = beagle_cam_reset, > -+ .vdd_io = MT9P031_VDD_IO_1V8, > -+ .version = MT9P031_COLOR_VERSION, > -+}; > -+ > -+static struct i2c_board_info mt9p031_camera_i2c_device = { > -+ I2C_BOARD_INFO("mt9p031", 0x48), > -+ .platform_data = &beagle_mt9p031_platform_data, > -+}; > -+ > -+static struct isp_subdev_i2c_board_info mt9p031_camera_subdevs[] = { > -+ { > -+ .board_info = &mt9p031_camera_i2c_device, > -+ .i2c_adapter_id = 2, > -+ }, > -+ { NULL, 0, }, > -+}; > -+ > -+static struct isp_v4l2_subdevs_group beagle_camera_subdevs[] = { > -+ { > -+ .subdevs = mt9p031_camera_subdevs, > -+ .interface = ISP_INTERFACE_PARALLEL, > -+ .bus = { > -+ .parallel = { > -+ .data_lane_shift = 0, > -+ .clk_pol = 1, > -+ .bridge = > ISPCTRL_PAR_BRIDGE_DISABLE, > -+ } > -+ }, > -+ }, > -+ { }, > -+}; > -+ > -+static struct isp_platform_data beagle_isp_platform_data = { > -+ .subdevs = beagle_camera_subdevs, > -+}; > -+ > -+static int __init beagle_camera_init(void) > -+{ > -+ if (!machine_is_omap3_beagle() || !cpu_is_omap3630()) > -+ return 0; > -+ > -+ reg_1v8 = regulator_get(NULL, "cam_1v8"); > -+ if (IS_ERR(reg_1v8)) > -+ pr_err("%s: cannot get cam_1v8 regulator\n", __func__); > -+ else > -+ regulator_enable(reg_1v8); > -+ > -+ reg_2v8 = regulator_get(NULL, "cam_2v8"); > -+ if (IS_ERR(reg_2v8)) > -+ pr_err("%s: cannot get cam_2v8 regulator\n", __func__); > -+ else > -+ regulator_enable(reg_2v8); > -+ > -+ omap_register_i2c_bus(2, 100, NULL, 0); > -+ gpio_request(MT9P031_RESET_GPIO, "cam_rst"); > -+ gpio_direction_output(MT9P031_RESET_GPIO, 0); > -+ omap3_init_camera(&beagle_isp_platform_data); > -+ return 0; > -+} > -+late_initcall(beagle_camera_init); > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 221bfda..dd6e31f 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -25,12 +25,16 @@ > - #include <linux/input.h> > - #include <linux/gpio_keys.h> > - #include <linux/opp.h> > -+#include <linux/i2c.h> > -+#include <linux/mm.h> > -+#include <linux/videodev2.h> > - > - #include <linux/mtd/mtd.h> > - #include <linux/mtd/partitions.h> > - #include <linux/mtd/nand.h> > - #include <linux/mmc/host.h> > - > -+#include <linux/gpio.h> > - #include <linux/regulator/machine.h> > - #include <linux/i2c/twl.h> > - > -@@ -48,6 +52,7 @@ > - #include <plat/nand.h> > - #include <plat/usb.h> > - #include <plat/omap_device.h> > -+#include <plat/i2c.h> > - > - #include "mux.h" > - #include "hsmmc.h" > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0001-mfd-Fix-omap- > usbhs-crash-when-rmmoding-ehci-or-ohci.patch b/recipes-kernel/linux/linux- > omap-2.6.39/mfd/0001-mfd-Fix-omap-usbhs-crash-when-rmmoding-ehci-or- > ohci.patch > deleted file mode 100644 > index c9f1e6a..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0001-mfd-Fix-omap-usbhs- > crash-when-rmmoding-ehci-or-ohci.patch > +++ /dev/null > @@ -1,67 +0,0 @@ > -From 46be90d202c36db19e27c2991cbff401c6c3ee81 Mon Sep 17 00:00:00 > 2001 > -From: Keshava Munegowda <Keshava_mgowda@ti.com> > -Date: Mon, 16 May 2011 14:24:58 +0530 > -Subject: [PATCH 01/13] mfd: Fix omap usbhs crash when rmmoding ehci or > ohci > - > -The disabling of clocks and freeing GPIO are changed > -to fix the occurrence of the crash of rmmod of ehci and ohci > -drivers. The GPIOs should be freed after the spin locks are > -unlocked. > - > -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> > -Acked-by: Felipe Balbi <balbi@ti.com> > -Cc: stable@kernel.org > -Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> > ---- > - drivers/mfd/omap-usb-host.c | 27 +++++++++++++++++++-------- > - 1 files changed, 19 insertions(+), 8 deletions(-) > - > -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c > -index 3ab9ffa..55c5d47 100644 > ---- a/drivers/mfd/omap-usb-host.c > -+++ b/drivers/mfd/omap-usb-host.c > -@@ -994,22 +994,33 @@ static void usbhs_disable(struct device *dev) > - dev_dbg(dev, "operation timed out\n"); > - } > - > -- if (pdata->ehci_data->phy_reset) { > -- if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) > -- gpio_free(pdata->ehci_data->reset_gpio_port[0]); > -- > -- if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) > -- gpio_free(pdata->ehci_data->reset_gpio_port[1]); > -+ if (is_omap_usbhs_rev2(omap)) { > -+ if (is_ehci_tll_mode(pdata->port_mode[0])) > -+ clk_enable(omap->usbtll_p1_fck); > -+ if (is_ehci_tll_mode(pdata->port_mode[1])) > -+ clk_enable(omap->usbtll_p2_fck); > -+ clk_disable(omap->utmi_p2_fck); > -+ clk_disable(omap->utmi_p1_fck); > - } > - > -- clk_disable(omap->utmi_p2_fck); > -- clk_disable(omap->utmi_p1_fck); > - clk_disable(omap->usbtll_ick); > - clk_disable(omap->usbtll_fck); > - clk_disable(omap->usbhost_fs_fck); > - clk_disable(omap->usbhost_hs_fck); > - clk_disable(omap->usbhost_ick); > - > -+ /* The gpio_free migh sleep; so unlock the spinlock */ > -+ spin_unlock_irqrestore(&omap->lock, flags); > -+ > -+ if (pdata->ehci_data->phy_reset) { > -+ if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) > -+ gpio_free(pdata->ehci_data->reset_gpio_port[0]); > -+ > -+ if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) > -+ gpio_free(pdata->ehci_data->reset_gpio_port[1]); > -+ } > -+ return; > -+ > - end_disble: > - spin_unlock_irqrestore(&omap->lock, flags); > - } > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0002-mfd-Fix- > omap_usbhs_alloc_children-error-handling.patch b/recipes-kernel/linux/linux- > omap-2.6.39/mfd/0002-mfd-Fix-omap_usbhs_alloc_children-error- > handling.patch > deleted file mode 100644 > index 380dd82..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0002-mfd-Fix- > omap_usbhs_alloc_children-error-handling.patch > +++ /dev/null > @@ -1,50 +0,0 @@ > -From 89a903aca8fda3dcf1a6f9a424247e772afdd44e Mon Sep 17 00:00:00 > 2001 > -From: Axel Lin <axel.lin@gmail.com> > -Date: Sat, 14 May 2011 14:15:36 +0800 > -Subject: [PATCH 02/13] mfd: Fix omap_usbhs_alloc_children error handling > - > -1. Return proper error if omap_usbhs_alloc_child fails > -2. In the case of goto err_ehci, we should call platform_device_unregister(ehci) > - instead of platform_device_put(ehci) because we have already added the > - platform device to device hierarchy. > - > -Signed-off-by: Axel Lin <axel.lin@gmail.com> > -Signed-off-by: Axel Lin <axel.lin@gmail.com> > -Tested-by: Keshava Munegowda <keshava_mgowda@ti.com> > -Acked-by: Felipe Balbi <balbi@ti.com> > -Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> > ---- > - drivers/mfd/omap-usb-host.c | 4 +++- > - 1 files changed, 3 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c > -index 55c5d47..1717144 100644 > ---- a/drivers/mfd/omap-usb-host.c > -+++ b/drivers/mfd/omap-usb-host.c > -@@ -281,6 +281,7 @@ static int omap_usbhs_alloc_children(struct > platform_device *pdev) > - > - if (!ehci) { > - dev_err(dev, "omap_usbhs_alloc_child failed\n"); > -+ ret = -ENOMEM; > - goto err_end; > - } > - > -@@ -304,13 +305,14 @@ static int omap_usbhs_alloc_children(struct > platform_device *pdev) > - sizeof(*ohci_data), dev); > - if (!ohci) { > - dev_err(dev, "omap_usbhs_alloc_child failed\n"); > -+ ret = -ENOMEM; > - goto err_ehci; > - } > - > - return 0; > - > - err_ehci: > -- platform_device_put(ehci); > -+ platform_device_unregister(ehci); > - > - err_end: > - return ret; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0003-mfd-Add-omap- > usbhs-runtime-PM-support.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/mfd/0003-mfd-Add-omap-usbhs-runtime-PM-support.patch > deleted file mode 100644 > index b47deb2..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0003-mfd-Add-omap-usbhs- > runtime-PM-support.patch > +++ /dev/null > @@ -1,245 +0,0 @@ > -From edc881f9c4897fab11542cd5c36a33b288f702be Mon Sep 17 00:00:00 > 2001 > -From: Keshava Munegowda <Keshava_mgowda@ti.com> > -Date: Sun, 22 May 2011 22:51:26 +0200 > -Subject: [PATCH 03/13] mfd: Add omap-usbhs runtime PM support > - > -The usbhs core driver does not enable/disable the interface and > -functional clocks; These clocks are handled by hwmod and runtime pm, > -hence insted of the clock enable/disable, the runtime pm APIS are > -used. however,the port clocks and tll clocks are handled > -by the usbhs core. > - > -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> > -Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> > ---- > - drivers/mfd/omap-usb-host.c | 131 +++---------------------------------------- > - 1 files changed, 9 insertions(+), 122 deletions(-) > - > -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c > -index 1717144..8552195 100644 > ---- a/drivers/mfd/omap-usb-host.c > -+++ b/drivers/mfd/omap-usb-host.c > -@@ -26,6 +26,7 @@ > - #include <linux/spinlock.h> > - #include <linux/gpio.h> > - #include <plat/usb.h> > -+#include <linux/pm_runtime.h> > - > - #define USBHS_DRIVER_NAME "usbhs-omap" > - #define OMAP_EHCI_DEVICE "ehci-omap" > -@@ -146,9 +147,6 @@ > - > - > - struct usbhs_hcd_omap { > -- struct clk *usbhost_ick; > -- struct clk *usbhost_hs_fck; > -- struct clk *usbhost_fs_fck; > - struct clk *xclk60mhsp1_ck; > - struct clk *xclk60mhsp2_ck; > - struct clk *utmi_p1_fck; > -@@ -158,8 +156,6 @@ struct usbhs_hcd_omap { > - struct clk *usbhost_p2_fck; > - struct clk *usbtll_p2_fck; > - struct clk *init_60m_fclk; > -- struct clk *usbtll_fck; > -- struct clk *usbtll_ick; > - > - void __iomem *uhh_base; > - void __iomem *tll_base; > -@@ -353,46 +349,13 @@ static int __devinit usbhs_omap_probe(struct > platform_device *pdev) > - omap->platdata.ehci_data = pdata->ehci_data; > - omap->platdata.ohci_data = pdata->ohci_data; > - > -- omap->usbhost_ick = clk_get(dev, "usbhost_ick"); > -- if (IS_ERR(omap->usbhost_ick)) { > -- ret = PTR_ERR(omap->usbhost_ick); > -- dev_err(dev, "usbhost_ick failed error:%d\n", ret); > -- goto err_end; > -- } > -- > -- omap->usbhost_hs_fck = clk_get(dev, "hs_fck"); > -- if (IS_ERR(omap->usbhost_hs_fck)) { > -- ret = PTR_ERR(omap->usbhost_hs_fck); > -- dev_err(dev, "usbhost_hs_fck failed error:%d\n", ret); > -- goto err_usbhost_ick; > -- } > -- > -- omap->usbhost_fs_fck = clk_get(dev, "fs_fck"); > -- if (IS_ERR(omap->usbhost_fs_fck)) { > -- ret = PTR_ERR(omap->usbhost_fs_fck); > -- dev_err(dev, "usbhost_fs_fck failed error:%d\n", ret); > -- goto err_usbhost_hs_fck; > -- } > -- > -- omap->usbtll_fck = clk_get(dev, "usbtll_fck"); > -- if (IS_ERR(omap->usbtll_fck)) { > -- ret = PTR_ERR(omap->usbtll_fck); > -- dev_err(dev, "usbtll_fck failed error:%d\n", ret); > -- goto err_usbhost_fs_fck; > -- } > -- > -- omap->usbtll_ick = clk_get(dev, "usbtll_ick"); > -- if (IS_ERR(omap->usbtll_ick)) { > -- ret = PTR_ERR(omap->usbtll_ick); > -- dev_err(dev, "usbtll_ick failed error:%d\n", ret); > -- goto err_usbtll_fck; > -- } > -+ pm_runtime_enable(&pdev->dev); > - > - omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk"); > - if (IS_ERR(omap->utmi_p1_fck)) { > - ret = PTR_ERR(omap->utmi_p1_fck); > - dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); > -- goto err_usbtll_ick; > -+ goto err_end; > - } > - > - omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck"); > -@@ -522,22 +485,8 @@ err_xclk60mhsp1_ck: > - err_utmi_p1_fck: > - clk_put(omap->utmi_p1_fck); > - > --err_usbtll_ick: > -- clk_put(omap->usbtll_ick); > -- > --err_usbtll_fck: > -- clk_put(omap->usbtll_fck); > -- > --err_usbhost_fs_fck: > -- clk_put(omap->usbhost_fs_fck); > -- > --err_usbhost_hs_fck: > -- clk_put(omap->usbhost_hs_fck); > -- > --err_usbhost_ick: > -- clk_put(omap->usbhost_ick); > -- > - err_end: > -+ pm_runtime_disable(&pdev->dev); > - kfree(omap); > - > - end_probe: > -@@ -571,11 +520,7 @@ static int __devexit usbhs_omap_remove(struct > platform_device *pdev) > - clk_put(omap->utmi_p2_fck); > - clk_put(omap->xclk60mhsp1_ck); > - clk_put(omap->utmi_p1_fck); > -- clk_put(omap->usbtll_ick); > -- clk_put(omap->usbtll_fck); > -- clk_put(omap->usbhost_fs_fck); > -- clk_put(omap->usbhost_hs_fck); > -- clk_put(omap->usbhost_ick); > -+ pm_runtime_disable(&pdev->dev); > - kfree(omap); > - > - return 0; > -@@ -695,7 +640,6 @@ static int usbhs_enable(struct device *dev) > - struct usbhs_omap_platform_data *pdata = &omap->platdata; > - unsigned long flags = 0; > - int ret = 0; > -- unsigned long timeout; > - unsigned reg; > - > - dev_dbg(dev, "starting TI HSUSB Controller\n"); > -@@ -708,11 +652,7 @@ static int usbhs_enable(struct device *dev) > - if (omap->count > 0) > - goto end_count; > - > -- clk_enable(omap->usbhost_ick); > -- clk_enable(omap->usbhost_hs_fck); > -- clk_enable(omap->usbhost_fs_fck); > -- clk_enable(omap->usbtll_fck); > -- clk_enable(omap->usbtll_ick); > -+ pm_runtime_get_sync(dev); > - > - if (pdata->ehci_data->phy_reset) { > - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) { > -@@ -736,50 +676,6 @@ static int usbhs_enable(struct device *dev) > - omap->usbhs_rev = usbhs_read(omap->uhh_base, > OMAP_UHH_REVISION); > - dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); > - > -- /* perform TLL soft reset, and wait until reset is complete */ > -- usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, > -- OMAP_USBTLL_SYSCONFIG_SOFTRESET); > -- > -- /* Wait for TLL reset to complete */ > -- timeout = jiffies + msecs_to_jiffies(1000); > -- while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS) > -- & OMAP_USBTLL_SYSSTATUS_RESETDONE)) { > -- cpu_relax(); > -- > -- if (time_after(jiffies, timeout)) { > -- dev_dbg(dev, "operation timed out\n"); > -- ret = -EINVAL; > -- goto err_tll; > -- } > -- } > -- > -- dev_dbg(dev, "TLL RESET DONE\n"); > -- > -- /* (1<<3) = no idle mode only for initial debugging */ > -- usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, > -- OMAP_USBTLL_SYSCONFIG_ENAWAKEUP | > -- OMAP_USBTLL_SYSCONFIG_SIDLEMODE | > -- OMAP_USBTLL_SYSCONFIG_AUTOIDLE); > -- > -- /* Put UHH in NoIdle/NoStandby mode */ > -- reg = usbhs_read(omap->uhh_base, OMAP_UHH_SYSCONFIG); > -- if (is_omap_usbhs_rev1(omap)) { > -- reg |= (OMAP_UHH_SYSCONFIG_ENAWAKEUP > -- | OMAP_UHH_SYSCONFIG_SIDLEMODE > -- | OMAP_UHH_SYSCONFIG_CACTIVITY > -- | OMAP_UHH_SYSCONFIG_MIDLEMODE); > -- reg &= ~OMAP_UHH_SYSCONFIG_AUTOIDLE; > -- > -- > -- } else if (is_omap_usbhs_rev2(omap)) { > -- reg &= ~OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR; > -- reg |= OMAP4_UHH_SYSCONFIG_NOIDLE; > -- reg &= ~OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR; > -- reg |= OMAP4_UHH_SYSCONFIG_NOSTDBY; > -- } > -- > -- usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg); > -- > - reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG); > - /* setup ULPI bypass and burst configurations */ > - reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN > -@@ -919,6 +815,8 @@ end_count: > - return 0; > - > - err_tll: > -+ pm_runtime_put_sync(dev); > -+ spin_unlock_irqrestore(&omap->lock, flags); > - if (pdata->ehci_data->phy_reset) { > - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) > - gpio_free(pdata->ehci_data->reset_gpio_port[0]); > -@@ -926,13 +824,6 @@ err_tll: > - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) > - gpio_free(pdata->ehci_data->reset_gpio_port[1]); > - } > -- > -- clk_disable(omap->usbtll_ick); > -- clk_disable(omap->usbtll_fck); > -- clk_disable(omap->usbhost_fs_fck); > -- clk_disable(omap->usbhost_hs_fck); > -- clk_disable(omap->usbhost_ick); > -- spin_unlock_irqrestore(&omap->lock, flags); > - return ret; > - } > - > -@@ -1005,11 +896,7 @@ static void usbhs_disable(struct device *dev) > - clk_disable(omap->utmi_p1_fck); > - } > - > -- clk_disable(omap->usbtll_ick); > -- clk_disable(omap->usbtll_fck); > -- clk_disable(omap->usbhost_fs_fck); > -- clk_disable(omap->usbhost_hs_fck); > -- clk_disable(omap->usbhost_ick); > -+ pm_runtime_put_sync(dev); > - > - /* The gpio_free migh sleep; so unlock the spinlock */ > - spin_unlock_irqrestore(&omap->lock, flags); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0004-arm-omap-usb- > ehci-and-ohci-hwmod-structures-for-omap.patch b/recipes-kernel/linux/linux- > omap-2.6.39/mfd/0004-arm-omap-usb-ehci-and-ohci-hwmod-structures-for- > omap.patch > deleted file mode 100644 > index 3d4d8a2..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0004-arm-omap-usb-ehci- > and-ohci-hwmod-structures-for-omap.patch > +++ /dev/null > @@ -1,406 +0,0 @@ > -From 339b167f6f76707a2d6ae3a7c0b921b8278564af Mon Sep 17 00:00:00 > 2001 > -From: Keshava Munegowda <Keshava_mgowda@ti.com> > -Date: Wed, 1 Jun 2011 11:02:49 -0700 > -Subject: [PATCH 04/13] arm: omap: usb: ehci and ohci hwmod structures for > omap3 and omap4 > - > -Following 2 hwmod strcuture are added: > -UHH hwmod of usbhs with uhh base address and > -EHCI , OHCI irq and base addresses. > -TLL hwmod of usbhs with the TLL base address and irq. > - > -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 184 > ++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 153 > +++++++++++++++++++++++ > - 2 files changed, 337 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 909a84d..fe9a176 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -84,6 +84,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod; > - static struct omap_hwmod omap3xxx_mcbsp5_hwmod; > - static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod; > - static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod; > -+static struct omap_hwmod omap34xx_usb_host_hs_hwmod; > -+static struct omap_hwmod omap34xx_usb_tll_hs_hwmod; > - > - /* L3 -> L4_CORE interface */ > - static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { > -@@ -3574,6 +3576,185 @@ static struct omap_hwmod > omap3xxx_mmc3_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > - }; > - > -+/* > -+ * 'usb_host_hs' class > -+ * high-speed multi-port usb host controller > -+ */ > -+static struct omap_hwmod_ocp_if omap34xx_usb_host_hs__l3_main_2 = { > -+ .master = &omap34xx_usb_host_hs_hwmod, > -+ .slave = &omap3xxx_l3_main_hwmod, > -+ .clk = "core_l3_ick", > -+ .user = OCP_USER_MPU, > -+}; > -+ > -+static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > -+ MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = { > -+ .name = "usbhs_uhh", > -+ .sysc = &omap34xx_usb_host_hs_sysc, > -+}; > -+ > -+static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = { > -+ &omap34xx_usb_host_hs__l3_main_2, > -+}; > -+ > -+static struct omap_hwmod_irq_info omap34xx_usb_host_hs_irqs[] = { > -+ { .name = "ohci-irq", .irq = 76 }, > -+ { .name = "ehci-irq", .irq = 77 }, > -+}; > -+ > -+static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = { > -+ { > -+ .name = "uhh", > -+ .pa_start = 0x48064000, > -+ .pa_end = 0x480643ff, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { > -+ .name = "ohci", > -+ .pa_start = 0x48064400, > -+ .pa_end = 0x480647FF, > -+ .flags = ADDR_MAP_ON_INIT > -+ }, > -+ { > -+ .name = "ehci", > -+ .pa_start = 0x48064800, > -+ .pa_end = 0x48064CFF, > -+ .flags = ADDR_MAP_ON_INIT > -+ } > -+}; > -+ > -+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = { > -+ .master = &omap3xxx_l4_core_hwmod, > -+ .slave = &omap34xx_usb_host_hs_hwmod, > -+ .clk = "l4_ick", > -+ .addr = omap34xx_usb_host_hs_addrs, > -+ .addr_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_addrs), > -+ .user = OCP_USER_MPU | OCP_USER_SDMA, > -+}; > -+ > -+static struct omap_hwmod_ocp_if omap34xx_f128m_cfg__usb_host_hs = { > -+ .clk = "usbhost_120m_fck", > -+ .user = OCP_USER_MPU, > -+ .flags = OCPIF_SWSUP_IDLE, > -+}; > -+ > -+static struct omap_hwmod_ocp_if omap34xx_f48m_cfg__usb_host_hs = { > -+ .clk = "usbhost_48m_fck", > -+ .user = OCP_USER_MPU, > -+ .flags = OCPIF_SWSUP_IDLE, > -+}; > -+ > -+static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_slaves[] = { > -+ &omap34xx_l4_cfg__usb_host_hs, > -+ &omap34xx_f128m_cfg__usb_host_hs, > -+ &omap34xx_f48m_cfg__usb_host_hs, > -+}; > -+ > -+static struct omap_hwmod omap34xx_usb_host_hs_hwmod = { > -+ .name = "usbhs_uhh", > -+ .class = &omap34xx_usb_host_hs_hwmod_class, > -+ .mpu_irqs = omap34xx_usb_host_hs_irqs, > -+ .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_irqs), > -+ .main_clk = "usbhost_ick", > -+ .prcm = { > -+ .omap2 = { > -+ .module_offs = OMAP3430ES2_USBHOST_MOD, > -+ .prcm_reg_id = 1, > -+ .module_bit = 0, > -+ .idlest_reg_id = 1, > -+ .idlest_idle_bit = 1, > -+ .idlest_stdby_bit = 0, > -+ }, > -+ }, > -+ .slaves = omap34xx_usb_host_hs_slaves, > -+ .slaves_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_slaves), > -+ .masters = omap34xx_usb_host_hs_masters, > -+ .masters_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_masters), > -+ .flags = HWMOD_SWSUP_SIDLE | > HWMOD_SWSUP_MSTANDBY, > -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > -+}; > -+ > -+/* > -+ * 'usb_tll_hs' class > -+ * usb_tll_hs module is the adapter on the usb_host_hs ports > -+ */ > -+static struct omap_hwmod_class_sysconfig omap34xx_usb_tll_hs_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+static struct omap_hwmod_class omap34xx_usb_tll_hs_hwmod_class = { > -+ .name = "usbhs_tll", > -+ .sysc = &omap34xx_usb_tll_hs_sysc, > -+}; > -+ > -+static struct omap_hwmod_irq_info omap34xx_usb_tll_hs_irqs[] = { > -+ { .name = "tll-irq", .irq = 78 }, > -+}; > -+ > -+static struct omap_hwmod_addr_space omap34xx_usb_tll_hs_addrs[] = { > -+ { > -+ .name = "tll", > -+ .pa_start = 0x48062000, > -+ .pa_end = 0x48062fff, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+}; > -+ > -+static struct omap_hwmod_ocp_if omap34xx_f_cfg__usb_tll_hs = { > -+ .clk = "usbtll_fck", > -+ .user = OCP_USER_MPU, > -+ .flags = OCPIF_SWSUP_IDLE, > -+}; > -+ > -+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_tll_hs = { > -+ .master = &omap3xxx_l4_core_hwmod, > -+ .slave = &omap34xx_usb_tll_hs_hwmod, > -+ .clk = "l4_ick", > -+ .addr = omap34xx_usb_tll_hs_addrs, > -+ .addr_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_addrs), > -+ .user = OCP_USER_MPU | OCP_USER_SDMA, > -+}; > -+ > -+static struct omap_hwmod_ocp_if *omap34xx_usb_tll_hs_slaves[] = { > -+ &omap34xx_l4_cfg__usb_tll_hs, > -+ &omap34xx_f_cfg__usb_tll_hs, > -+}; > -+ > -+static struct omap_hwmod omap34xx_usb_tll_hs_hwmod = { > -+ .name = "usbhs_tll", > -+ .class = &omap34xx_usb_tll_hs_hwmod_class, > -+ .mpu_irqs = omap34xx_usb_tll_hs_irqs, > -+ .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_irqs), > -+ .main_clk = "usbtll_ick", > -+ .prcm = { > -+ .omap2 = { > -+ .module_offs = CORE_MOD, > -+ .prcm_reg_id = 3, > -+ .module_bit = 2, > -+ .idlest_reg_id = 3, > -+ .idlest_idle_bit = 2, > -+ }, > -+ }, > -+ .slaves = omap34xx_usb_tll_hs_slaves, > -+ .slaves_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_slaves), > -+ .flags = HWMOD_SWSUP_SIDLE | > HWMOD_SWSUP_MSTANDBY, > -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > -+}; > -+ > - static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { > - &omap3xxx_l3_main_hwmod, > - &omap3xxx_l4_core_hwmod, > -@@ -3656,6 +3837,9 @@ static __initdata struct omap_hwmod > *omap3xxx_hwmods[] = { > - /* usbotg for am35x */ > - &am35xx_usbhsotg_hwmod, > - > -+ &omap34xx_usb_host_hs_hwmod, > -+ &omap34xx_usb_tll_hs_hwmod, > -+ > - NULL, > - }; > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index abc548a..d7112b0 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -66,6 +66,8 @@ static struct omap_hwmod omap44xx_mmc2_hwmod; > - static struct omap_hwmod omap44xx_mpu_hwmod; > - static struct omap_hwmod omap44xx_mpu_private_hwmod; > - static struct omap_hwmod omap44xx_usb_otg_hs_hwmod; > -+static struct omap_hwmod omap44xx_usb_host_hs_hwmod; > -+static struct omap_hwmod omap44xx_usb_tll_hs_hwmod; > - > - /* > - * Interconnects omap_hwmod structures > -@@ -5027,6 +5029,155 @@ static struct omap_hwmod > omap44xx_wd_timer3_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -+/* > -+ * 'usb_host_hs' class > -+ * high-speed multi-port usb host controller > -+ */ > -+static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = { > -+ .master = &omap44xx_usb_host_hs_hwmod, > -+ .slave = &omap44xx_l3_main_2_hwmod, > -+ .clk = "l3_div_ck", > -+ .user = OCP_USER_MPU | OCP_USER_SDMA, > -+}; > -+ > -+static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > -+ MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type2, > -+}; > -+ > -+static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = { > -+ .name = "usbhs_uhh", > -+ .sysc = &omap44xx_usb_host_hs_sysc, > -+}; > -+ > -+static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = { > -+ &omap44xx_usb_host_hs__l3_main_2, > -+}; > -+ > -+static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = { > -+ { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START }, > -+ { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START }, > -+}; > -+ > -+static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = { > -+ { > -+ .name = "uhh", > -+ .pa_start = 0x4a064000, > -+ .pa_end = 0x4a0647ff, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { > -+ .name = "ohci", > -+ .pa_start = 0x4A064800, > -+ .pa_end = 0x4A064BFF, > -+ .flags = ADDR_MAP_ON_INIT > -+ }, > -+ { > -+ .name = "ehci", > -+ .pa_start = 0x4A064C00, > -+ .pa_end = 0x4A064FFF, > -+ .flags = ADDR_MAP_ON_INIT > -+ } > -+}; > -+ > -+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = { > -+ .master = &omap44xx_l4_cfg_hwmod, > -+ .slave = &omap44xx_usb_host_hs_hwmod, > -+ .clk = "l4_div_ck", > -+ .addr = omap44xx_usb_host_hs_addrs, > -+ .addr_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_addrs), > -+ .user = OCP_USER_MPU | OCP_USER_SDMA, > -+}; > -+ > -+static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = { > -+ &omap44xx_l4_cfg__usb_host_hs, > -+}; > -+ > -+static struct omap_hwmod omap44xx_usb_host_hs_hwmod = { > -+ .name = "usbhs_uhh", > -+ .class = &omap44xx_usb_host_hs_hwmod_class, > -+ .mpu_irqs = omap44xx_usb_host_hs_irqs, > -+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_irqs), > -+ .main_clk = "usb_host_hs_fck", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_reg = > OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL, > -+ }, > -+ }, > -+ .slaves = omap44xx_usb_host_hs_slaves, > -+ .slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves), > -+ .masters = omap44xx_usb_host_hs_masters, > -+ .masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters), > -+ .flags = HWMOD_SWSUP_SIDLE | > HWMOD_SWSUP_MSTANDBY, > -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -+}; > -+ > -+/* > -+ * 'usb_tll_hs' class > -+ * usb_tll_hs module is the adapter on the usb_host_hs ports > -+ */ > -+static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = { > -+ .name = "usbhs_tll", > -+ .sysc = &omap44xx_usb_tll_hs_sysc, > -+}; > -+ > -+static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = { > -+ { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START }, > -+}; > -+ > -+static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = { > -+ { > -+ .name = "tll", > -+ .pa_start = 0x4a062000, > -+ .pa_end = 0x4a063fff, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+}; > -+ > -+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = { > -+ .master = &omap44xx_l4_cfg_hwmod, > -+ .slave = &omap44xx_usb_tll_hs_hwmod, > -+ .clk = "l4_div_ck", > -+ .addr = omap44xx_usb_tll_hs_addrs, > -+ .addr_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_addrs), > -+ .user = OCP_USER_MPU | OCP_USER_SDMA, > -+}; > -+ > -+static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = { > -+ &omap44xx_l4_cfg__usb_tll_hs, > -+}; > -+ > -+static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = { > -+ .name = "usbhs_tll", > -+ .class = &omap44xx_usb_tll_hs_hwmod_class, > -+ .mpu_irqs = omap44xx_usb_tll_hs_irqs, > -+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_irqs), > -+ .main_clk = "usb_tll_hs_ick", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_reg = > OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL, > -+ }, > -+ }, > -+ .slaves = omap44xx_usb_tll_hs_slaves, > -+ .slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves), > -+ .flags = HWMOD_SWSUP_SIDLE | > HWMOD_SWSUP_MSTANDBY, > -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -+}; > -+ > - static __initdata struct omap_hwmod *omap44xx_hwmods[] = { > - > - /* dmm class */ > -@@ -5173,6 +5324,8 @@ static __initdata struct omap_hwmod > *omap44xx_hwmods[] = { > - &omap44xx_wd_timer2_hwmod, > - &omap44xx_wd_timer3_hwmod, > - > -+ &omap44xx_usb_host_hs_hwmod, > -+ &omap44xx_usb_tll_hs_hwmod, > - NULL, > - }; > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0005-arm-omap-usb- > register-hwmods-of-usbhs.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/mfd/0005-arm-omap-usb-register-hwmods-of-usbhs.patch > deleted file mode 100644 > index 8e9a4ba..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0005-arm-omap-usb- > register-hwmods-of-usbhs.patch > +++ /dev/null > @@ -1,160 +0,0 @@ > -From 70f5e1a0e6639710503a9ffb9008ddcd2bb3f06e Mon Sep 17 00:00:00 > 2001 > -From: Keshava Munegowda <Keshava_mgowda@ti.com> > -Date: Wed, 1 Jun 2011 11:02:54 -0700 > -Subject: [PATCH 05/13] arm: omap: usb: register hwmods of usbhs > - > -The hwmod structure of uhh and tll are retrived > -and registered with omap device > - > -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> > ---- > - arch/arm/mach-omap2/usb-host.c | 99 ++++++++++++++------------------------ > -- > - 1 files changed, 35 insertions(+), 64 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb- > host.c > -index 89ae298..9d762c4 100644 > ---- a/arch/arm/mach-omap2/usb-host.c > -+++ b/arch/arm/mach-omap2/usb-host.c > -@@ -28,51 +28,28 @@ > - #include <mach/hardware.h> > - #include <mach/irqs.h> > - #include <plat/usb.h> > -+#include <plat/omap_device.h> > - > - #include "mux.h" > - > - #ifdef CONFIG_MFD_OMAP_USB_HOST > - > --#define OMAP_USBHS_DEVICE "usbhs-omap" > -- > --static struct resource usbhs_resources[] = { > -- { > -- .name = "uhh", > -- .flags = IORESOURCE_MEM, > -- }, > -- { > -- .name = "tll", > -- .flags = IORESOURCE_MEM, > -- }, > -- { > -- .name = "ehci", > -- .flags = IORESOURCE_MEM, > -- }, > -- { > -- .name = "ehci-irq", > -- .flags = IORESOURCE_IRQ, > -- }, > -- { > -- .name = "ohci", > -- .flags = IORESOURCE_MEM, > -- }, > -- { > -- .name = "ohci-irq", > -- .flags = IORESOURCE_IRQ, > -- } > --}; > -- > --static struct platform_device usbhs_device = { > -- .name = OMAP_USBHS_DEVICE, > -- .id = 0, > -- .num_resources = ARRAY_SIZE(usbhs_resources), > -- .resource = usbhs_resources, > --}; > -+#define OMAP_USBHS_DEVICE "usbhs_omap" > -+#define USBHS_UHH_HWMODNAME "usbhs_uhh" > -+#define USBHS_TLL_HWMODNAME "usbhs_tll" > - > - static struct usbhs_omap_platform_data usbhs_data; > - static struct ehci_hcd_omap_platform_data ehci_data; > - static struct ohci_hcd_omap_platform_data ohci_data; > - > -+static struct omap_device_pm_latency omap_uhhtll_latency[] = { > -+ { > -+ .deactivate_func = omap_device_idle_hwmods, > -+ .activate_func = omap_device_enable_hwmods, > -+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, > -+ }, > -+}; > -+ > - /* MUX settings for EHCI pins */ > - /* > - * setup_ehci_io_mux - initialize IO pad mux for USBHOST > -@@ -508,7 +485,10 @@ static void setup_4430ohci_io_mux(const enum > usbhs_omap_port_mode *port_mode) > - > - void __init usbhs_init(const struct usbhs_omap_board_data *pdata) > - { > -- int i; > -+ struct omap_hwmod *oh[2]; > -+ struct omap_device *od; > -+ int bus_id = -1; > -+ int i; > - > - for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { > - usbhs_data.port_mode[i] = pdata->port_mode[i]; > -@@ -523,44 +503,35 @@ void __init usbhs_init(const struct > usbhs_omap_board_data *pdata) > - usbhs_data.ohci_data = &ohci_data; > - > - if (cpu_is_omap34xx()) { > -- usbhs_resources[0].start = OMAP34XX_UHH_CONFIG_BASE; > -- usbhs_resources[0].end = OMAP34XX_UHH_CONFIG_BASE + > SZ_1K - 1; > -- usbhs_resources[1].start = OMAP34XX_USBTLL_BASE; > -- usbhs_resources[1].end = OMAP34XX_USBTLL_BASE + SZ_4K - > 1; > -- usbhs_resources[2].start = OMAP34XX_EHCI_BASE; > -- usbhs_resources[2].end = OMAP34XX_EHCI_BASE + SZ_1K - 1; > -- usbhs_resources[3].start = INT_34XX_EHCI_IRQ; > -- usbhs_resources[4].start = OMAP34XX_OHCI_BASE; > -- usbhs_resources[4].end = OMAP34XX_OHCI_BASE + SZ_1K - > 1; > -- usbhs_resources[5].start = INT_34XX_OHCI_IRQ; > - setup_ehci_io_mux(pdata->port_mode); > - setup_ohci_io_mux(pdata->port_mode); > - } else if (cpu_is_omap44xx()) { > -- usbhs_resources[0].start = OMAP44XX_UHH_CONFIG_BASE; > -- usbhs_resources[0].end = OMAP44XX_UHH_CONFIG_BASE + > SZ_1K - 1; > -- usbhs_resources[1].start = OMAP44XX_USBTLL_BASE; > -- usbhs_resources[1].end = OMAP44XX_USBTLL_BASE + SZ_4K - > 1; > -- usbhs_resources[2].start = OMAP44XX_HSUSB_EHCI_BASE; > -- usbhs_resources[2].end = OMAP44XX_HSUSB_EHCI_BASE + > SZ_1K - 1; > -- usbhs_resources[3].start = OMAP44XX_IRQ_EHCI; > -- usbhs_resources[4].start = OMAP44XX_HSUSB_OHCI_BASE; > -- usbhs_resources[4].end = OMAP44XX_HSUSB_OHCI_BASE + > SZ_1K - 1; > -- usbhs_resources[5].start = OMAP44XX_IRQ_OHCI; > - setup_4430ehci_io_mux(pdata->port_mode); > - setup_4430ohci_io_mux(pdata->port_mode); > - } > - > -- if (platform_device_add_data(&usbhs_device, > -- &usbhs_data, sizeof(usbhs_data)) < 0) { > -- printk(KERN_ERR "USBHS platform_device_add_data > failed\n"); > -- goto init_end; > -+ oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); > -+ if (!oh[0]) { > -+ pr_err("Could not look up %s\n", > USBHS_UHH_HWMODNAME); > -+ return; > - } > - > -- if (platform_device_register(&usbhs_device) < 0) > -- printk(KERN_ERR "USBHS platform_device_register failed\n"); > -+ oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); > -+ if (!oh[1]) { > -+ pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME); > -+ return; > -+ } > - > --init_end: > -- return; > -+ od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, > -+ (void *)&usbhs_data, sizeof(usbhs_data), > -+ omap_uhhtll_latency, > -+ ARRAY_SIZE(omap_uhhtll_latency), false); > -+ > -+ if (IS_ERR(od)) { > -+ pr_err("Could not build hwmod devices %s, %s\n", > -+ USBHS_UHH_HWMODNAME, > USBHS_TLL_HWMODNAME); > -+ return; > -+ } > - } > - > - #else > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0006-arm-omap-usb- > device-name-change-for-the-clk-names-of.patch b/recipes-kernel/linux/linux- > omap-2.6.39/mfd/0006-arm-omap-usb-device-name-change-for-the-clk- > names-of.patch > deleted file mode 100644 > index c0ac58b..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0006-arm-omap-usb-device- > name-change-for-the-clk-names-of.patch > +++ /dev/null > @@ -1,123 +0,0 @@ > -From 64bc651bb56435e4cd86d2ebfa4f301abdbac6e5 Mon Sep 17 00:00:00 > 2001 > -From: Keshava Munegowda <Keshava_mgowda@ti.com> > -Date: Wed, 1 Jun 2011 11:02:58 -0700 > -Subject: [PATCH 06/13] arm: omap: usb: device name change for the clk names > of usbhs > - > -device name usbhs clocks are changed from > -usbhs-omap.0 to usbhs_omap; this is because > -in the hwmod registration the device name is set > -as usbhs_omap > - > -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> > ---- > - arch/arm/mach-omap2/clock3xxx_data.c | 28 ++++++++++++++-------------- > - arch/arm/mach-omap2/clock44xx_data.c | 10 +++++----- > - drivers/mfd/omap-usb-host.c | 2 +- > - 3 files changed, 20 insertions(+), 20 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach- > omap2/clock3xxx_data.c > -index 75b119b..fabe482 100644 > ---- a/arch/arm/mach-omap2/clock3xxx_data.c > -+++ b/arch/arm/mach-omap2/clock3xxx_data.c > -@@ -3285,7 +3285,7 @@ static struct omap_clk omap3xxx_clks[] = { > - CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | > CK_AM35XX | CK_36XX), > - CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | > CK_AM35XX | CK_36XX), > - CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | > CK_AM35XX | CK_36XX), > -- CLK("usbhs-omap.0", "usbtll_fck", &usbtll_fck, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -+ CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > - CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, > CK_3XXX), > - CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, > CK_3XXX), > - CLK(NULL, "core_96m_fck", &core_96m_fck, > CK_3XXX), > -@@ -3321,7 +3321,7 @@ static struct omap_clk omap3xxx_clks[] = { > - CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX), > - CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX), > - CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | > CK_AM35XX | CK_36XX), > -- CLK("usbhs-omap.0", "usbtll_ick", &usbtll_ick, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -+ CLK("usbhs_omap", "usbtll_ick", &usbtll_ick, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > - CLK("omap_hsmmc.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | > CK_AM35XX | CK_36XX), > - CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX), > - CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX), > -@@ -3367,20 +3367,20 @@ static struct omap_clk omap3xxx_clks[] = { > - CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), > - CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, > CK_34XX | CK_36XX), > - CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -- CLK("usbhs-omap.0", "hs_fck", &usbhost_120m_fck, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -+ CLK("usbhs_omap", "hs_fck", &usbhost_120m_fck, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > - CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -- CLK("usbhs-omap.0", "fs_fck", &usbhost_48m_fck, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -+ CLK("usbhs_omap", "fs_fck", &usbhost_48m_fck, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > - CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | > CK_AM35XX | CK_36XX), > -- CLK("usbhs-omap.0", "usbhost_ick", &usbhost_ick, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -- CLK("usbhs-omap.0", "utmi_p1_gfclk", &dummy_ck, > CK_3XXX), > -- CLK("usbhs-omap.0", "utmi_p2_gfclk", &dummy_ck, > CK_3XXX), > -- CLK("usbhs-omap.0", "xclk60mhsp1_ck", &dummy_ck, > CK_3XXX), > -- CLK("usbhs-omap.0", "xclk60mhsp2_ck", &dummy_ck, > CK_3XXX), > -- CLK("usbhs-omap.0", "usb_host_hs_utmi_p1_clk", &dummy_ck, > CK_3XXX), > -- CLK("usbhs-omap.0", "usb_host_hs_utmi_p2_clk", &dummy_ck, > CK_3XXX), > -- CLK("usbhs-omap.0", "usb_tll_hs_usb_ch0_clk", &dummy_ck, > CK_3XXX), > -- CLK("usbhs-omap.0", "usb_tll_hs_usb_ch1_clk", &dummy_ck, > CK_3XXX), > -- CLK("usbhs-omap.0", "init_60m_fclk", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "usbhost_ick", &usbhost_ick, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -+ CLK("usbhs_omap", "utmi_p1_gfclk", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "utmi_p2_gfclk", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "xclk60mhsp1_ck", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "xclk60mhsp2_ck", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "usb_host_hs_utmi_p1_clk", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "usb_host_hs_utmi_p2_clk", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck, > CK_3XXX), > -+ CLK("usbhs_omap", "init_60m_fclk", &dummy_ck, > CK_3XXX), > - CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | > CK_36XX), > - CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), > - CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, > CK_3XXX), > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 8c96567..34e91eb 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -3205,7 +3205,7 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "uart3_fck", &uart3_fck, > CK_443X), > - CLK(NULL, "uart4_fck", &uart4_fck, > CK_443X), > - CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, > CK_443X), > -- CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, > CK_443X), > -+ CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck, > CK_443X), > - CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, > CK_443X), > - CLK(NULL, "usb_host_hs_utmi_p1_clk", > &usb_host_hs_utmi_p1_clk, CK_443X), > - CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, > CK_443X), > -@@ -3217,8 +3217,8 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "usb_host_hs_hsic480m_p2_clk", > &usb_host_hs_hsic480m_p2_clk, CK_443X), > - CLK(NULL, "usb_host_hs_func48mclk", > &usb_host_hs_func48mclk, CK_443X), > - CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, > CK_443X), > -- CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, > CK_443X), > -- CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, > CK_443X), > -+ CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck, > CK_443X), > -+ CLK("usbhs_omap", "usbhost_ick", &dummy_ck, > CK_443X), > - CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, > CK_443X), > - CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, > CK_443X), > - CLK("musb-omap2430", "ick", > &usb_otg_hs_ick, CK_443X), > -@@ -3227,8 +3227,8 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "usb_tll_hs_usb_ch0_clk", > &usb_tll_hs_usb_ch0_clk, CK_443X), > - CLK(NULL, "usb_tll_hs_usb_ch1_clk", > &usb_tll_hs_usb_ch1_clk, CK_443X), > - CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, > CK_443X), > -- CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, > CK_443X), > -- CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, > CK_443X), > -+ CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick, > CK_443X), > -+ CLK("usbhs_omap", "usbtll_fck", &dummy_ck, > CK_443X), > - CLK(NULL, "usim_ck", &usim_ck, > CK_443X), > - CLK(NULL, "usim_fclk", &usim_fclk, > CK_443X), > - CLK(NULL, "usim_fck", &usim_fck, > CK_443X), > -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c > -index 8552195..43de12a 100644 > ---- a/drivers/mfd/omap-usb-host.c > -+++ b/drivers/mfd/omap-usb-host.c > -@@ -28,7 +28,7 @@ > - #include <plat/usb.h> > - #include <linux/pm_runtime.h> > - > --#define USBHS_DRIVER_NAME "usbhs-omap" > -+#define USBHS_DRIVER_NAME "usbhs_omap" > - #define OMAP_EHCI_DEVICE "ehci-omap" > - #define OMAP_OHCI_DEVICE "ohci-omap3" > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0007-mfd-global- > Suspend-and-resume-support-of-ehci-and-oh.patch b/recipes- > kernel/linux/linux-omap-2.6.39/mfd/0007-mfd-global-Suspend-and-resume- > support-of-ehci-and-oh.patch > deleted file mode 100644 > index 94d5f59..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0007-mfd-global-Suspend- > and-resume-support-of-ehci-and-oh.patch > +++ /dev/null > @@ -1,165 +0,0 @@ > -From bf583f2924fd9b2f0356cbd0bbfd58c48d98ef15 Mon Sep 17 00:00:00 > 2001 > -From: Keshava Munegowda <Keshava_mgowda@ti.com> > -Date: Wed, 1 Jun 2011 11:03:03 -0700 > -Subject: [PATCH 07/13] mfd: global Suspend and resume support of ehci and > ohci > - > -The global suspend and resume functions for usbhs core driver > -are implemented.These routine are called when the global suspend > -and resume occurs. Before calling these functions, the > -bus suspend and resume of ehci and ohci drivers are called > -from runtime pm. > - > -Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> > ---- > - drivers/mfd/omap-usb-host.c | 103 > +++++++++++++++++++++++++++++++++++++++++++ > - 1 files changed, 103 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c > -index 43de12a..32d19e2 100644 > ---- a/drivers/mfd/omap-usb-host.c > -+++ b/drivers/mfd/omap-usb-host.c > -@@ -146,6 +146,10 @@ > - #define is_ehci_hsic_mode(x) (x == OMAP_EHCI_PORT_MODE_HSIC) > - > - > -+/* USBHS state bits */ > -+#define OMAP_USBHS_INIT 0 > -+#define OMAP_USBHS_SUSPEND 4 > -+ > - struct usbhs_hcd_omap { > - struct clk *xclk60mhsp1_ck; > - struct clk *xclk60mhsp2_ck; > -@@ -165,6 +169,7 @@ struct usbhs_hcd_omap { > - u32 usbhs_rev; > - spinlock_t lock; > - int count; > -+ unsigned long state; > - }; > - /*-------------------------------------------------------------------------*/ > - > -@@ -809,6 +814,8 @@ static int usbhs_enable(struct device *dev) > - (pdata->ehci_data->reset_gpio_port[1], 1); > - } > - > -+ set_bit(OMAP_USBHS_INIT, &omap->state); > -+ > - end_count: > - omap->count++; > - spin_unlock_irqrestore(&omap->lock, flags); > -@@ -897,6 +904,7 @@ static void usbhs_disable(struct device *dev) > - } > - > - pm_runtime_put_sync(dev); > -+ clear_bit(OMAP_USBHS_INIT, &omap->state); > - > - /* The gpio_free migh sleep; so unlock the spinlock */ > - spin_unlock_irqrestore(&omap->lock, flags); > -@@ -926,10 +934,105 @@ void omap_usbhs_disable(struct device *dev) > - } > - EXPORT_SYMBOL_GPL(omap_usbhs_disable); > - > -+#ifdef CONFIG_PM > -+ > -+static int usbhs_resume(struct device *dev) > -+{ > -+ struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); > -+ struct usbhs_omap_platform_data *pdata = &omap->platdata; > -+ unsigned long flags = 0; > -+ > -+ dev_dbg(dev, "Resuming TI HSUSB Controller\n"); > -+ > -+ if (!pdata) { > -+ dev_dbg(dev, "missing platform_data\n"); > -+ return -ENODEV; > -+ } > -+ > -+ spin_lock_irqsave(&omap->lock, flags); > -+ > -+ if (!test_bit(OMAP_USBHS_INIT, &omap->state) || > -+ !test_bit(OMAP_USBHS_SUSPEND, &omap->state)) > -+ goto end_resume; > -+ > -+ pm_runtime_get_sync(dev); > -+ > -+ if (is_omap_usbhs_rev2(omap)) { > -+ if (is_ehci_tll_mode(pdata->port_mode[0])) { > -+ clk_enable(omap->usbhost_p1_fck); > -+ clk_enable(omap->usbtll_p1_fck); > -+ } > -+ if (is_ehci_tll_mode(pdata->port_mode[1])) { > -+ clk_enable(omap->usbhost_p2_fck); > -+ clk_enable(omap->usbtll_p2_fck); > -+ } > -+ clk_enable(omap->utmi_p1_fck); > -+ clk_enable(omap->utmi_p2_fck); > -+ } > -+ clear_bit(OMAP_USBHS_SUSPEND, &omap->state); > -+ > -+end_resume: > -+ spin_unlock_irqrestore(&omap->lock, flags); > -+ return 0; > -+} > -+ > -+ > -+static int usbhs_suspend(struct device *dev) > -+{ > -+ struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); > -+ struct usbhs_omap_platform_data *pdata = &omap->platdata; > -+ unsigned long flags = 0; > -+ > -+ dev_dbg(dev, "Suspending TI HSUSB Controller\n"); > -+ > -+ if (!pdata) { > -+ dev_dbg(dev, "missing platform_data\n"); > -+ return -ENODEV; > -+ } > -+ > -+ spin_lock_irqsave(&omap->lock, flags); > -+ > -+ if (!test_bit(OMAP_USBHS_INIT, &omap->state) || > -+ test_bit(OMAP_USBHS_SUSPEND, &omap->state)) > -+ goto end_suspend; > -+ > -+ if (is_omap_usbhs_rev2(omap)) { > -+ if (is_ehci_tll_mode(pdata->port_mode[0])) { > -+ clk_disable(omap->usbhost_p1_fck); > -+ clk_disable(omap->usbtll_p1_fck); > -+ } > -+ if (is_ehci_tll_mode(pdata->port_mode[1])) { > -+ clk_disable(omap->usbhost_p2_fck); > -+ clk_disable(omap->usbtll_p2_fck); > -+ } > -+ clk_disable(omap->utmi_p2_fck); > -+ clk_disable(omap->utmi_p1_fck); > -+ } > -+ > -+ set_bit(OMAP_USBHS_SUSPEND, &omap->state); > -+ pm_runtime_put_sync(dev); > -+ > -+end_suspend: > -+ spin_unlock_irqrestore(&omap->lock, flags); > -+ return 0; > -+} > -+ > -+ > -+static const struct dev_pm_ops usbhsomap_dev_pm_ops = { > -+ .suspend = usbhs_suspend, > -+ .resume = usbhs_resume, > -+}; > -+ > -+#define USBHS_OMAP_DEV_PM_OPS (&usbhsomap_dev_pm_ops) > -+#else > -+#define USBHS_OMAP_DEV_PM_OPS NULL > -+#endif > -+ > - static struct platform_driver usbhs_omap_driver = { > - .driver = { > - .name = (char *)usbhs_driver_name, > - .owner = THIS_MODULE, > -+ .pm = USBHS_OMAP_DEV_PM_OPS, > - }, > - .remove = __exit_p(usbhs_omap_remove), > - }; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0008-MFD-TWL4030- > Correct-the-warning-print-during-script-.patch b/recipes-kernel/linux/linux- > omap-2.6.39/mfd/0008-MFD-TWL4030-Correct-the-warning-print-during- > script-.patch > deleted file mode 100644 > index e3de467..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0008-MFD-TWL4030- > Correct-the-warning-print-during-script-.patch > +++ /dev/null > @@ -1,36 +0,0 @@ > -From 1f2e639755b920398d6592775e0e31f7fb1ca955 Mon Sep 17 00:00:00 > 2001 > -From: Lesly A M <leslyam@ti.com> > -Date: Wed, 1 Jun 2011 14:56:38 -0700 > -Subject: [PATCH 08/13] MFD: TWL4030: Correct the warning print during > script loading > - > -Correcting the if condition check for printing the warning, > -if wakeup script is not updated before updating the sleep script. > - > -Since the flag 'order' is set to '1' while updating the wakeup script for P1P2, > -the condition checking for printing the warning should be if(!order) > -(ie: print the warning if wakeup script is not updated before updating the sleep > script) > - > -Signed-off-by: Lesly A M <leslyam@ti.com> > -Cc: Nishanth Menon <nm@ti.com> > -Cc: David Derrick <dderrick@ti.com> > -Cc: Samuel Ortiz <sameo@linux.intel.com> > ---- > - drivers/mfd/twl4030-power.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c > -index 2c0d4d1..8373d79 100644 > ---- a/drivers/mfd/twl4030-power.c > -+++ b/drivers/mfd/twl4030-power.c > -@@ -448,7 +448,7 @@ static int __init load_twl4030_script(struct > twl4030_script *tscript, > - goto out; > - } > - if (tscript->flags & TWL4030_SLEEP_SCRIPT) { > -- if (order) > -+ if (!order) > - pr_warning("TWL4030: Bad order of scripts (sleep "\ > - "script before wakeup) Leads to > boot"\ > - "failure on some boards\n"); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0009-MFD-TWL4030- > Modifying-the-macro-name-Main_Ref-to-all.patch b/recipes-kernel/linux/linux- > omap-2.6.39/mfd/0009-MFD-TWL4030-Modifying-the-macro-name- > Main_Ref-to-all.patch > deleted file mode 100644 > index 6be454a..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0009-MFD-TWL4030- > Modifying-the-macro-name-Main_Ref-to-all.patch > +++ /dev/null > @@ -1,61 +0,0 @@ > -From ea9acebfe2d3ca8fb3969eaf327665632142b85d Mon Sep 17 00:00:00 > 2001 > -From: Lesly A M <leslyam@ti.com> > -Date: Wed, 1 Jun 2011 14:56:45 -0700 > -Subject: [PATCH 09/13] MFD: TWL4030: Modifying the macro name Main_Ref > to all caps > - > -Modifying the macro name Main_Ref to all caps(MAIN_REF). > - > -Suggested by Nishanth Menon <nm@ti.com> > - > -Signed-off-by: Lesly A M <leslyam@ti.com> > -Cc: Nishanth Menon <nm@ti.com> > -Cc: David Derrick <dderrick@ti.com> > -Cc: Samuel Ortiz <sameo@linux.intel.com> > ---- > - arch/arm/mach-omap2/board-rx51-peripherals.c | 2 +- > - drivers/mfd/twl4030-power.c | 2 +- > - include/linux/i2c/twl.h | 2 +- > - 3 files changed, 3 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c > b/arch/arm/mach-omap2/board-rx51-peripherals.c > -index bbcb677..01ee0a1 100644 > ---- a/arch/arm/mach-omap2/board-rx51-peripherals.c > -+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c > -@@ -730,7 +730,7 @@ static struct twl4030_resconfig twl4030_rconfig[] > __initdata = { > - { .resource = RES_RESET, .devgroup = -1, > - .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 > - }, > -- { .resource = RES_Main_Ref, .devgroup = -1, > -+ { .resource = RES_MAIN_REF, .devgroup = -1, > - .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 > - }, > - { 0, 0}, > -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c > -index 8373d79..8162e43 100644 > ---- a/drivers/mfd/twl4030-power.c > -+++ b/drivers/mfd/twl4030-power.c > -@@ -120,7 +120,7 @@ static u8 res_config_addrs[] = { > - [RES_HFCLKOUT] = 0x8b, > - [RES_32KCLKOUT] = 0x8e, > - [RES_RESET] = 0x91, > -- [RES_Main_Ref] = 0x94, > -+ [RES_MAIN_REF] = 0x94, > - }; > - > - static int __init twl4030_write_script_byte(u8 address, u8 byte) > -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h > -index cbbf3b3..aee3a22 100644 > ---- a/include/linux/i2c/twl.h > -+++ b/include/linux/i2c/twl.h > -@@ -502,7 +502,7 @@ static inline int twl6030_mmc_card_detect(struct > device *dev, int slot) > - #define RES_32KCLKOUT 26 > - #define RES_RESET 27 > - /* Power Reference */ > --#define RES_Main_Ref 28 > -+#define RES_MAIN_REF 28 > - > - #define TOTAL_RESOURCES 28 > - /* > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0010-MFD-TWL4030- > power-scripts-for-OMAP3-boards.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/mfd/0010-MFD-TWL4030-power-scripts-for-OMAP3-boards.patch > deleted file mode 100644 > index 84e1ae7..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0010-MFD-TWL4030-power- > scripts-for-OMAP3-boards.patch > +++ /dev/null > @@ -1,705 +0,0 @@ > -From 0b29e1f61b85dd2d04f035088b70dc287d15b9f0 Mon Sep 17 00:00:00 > 2001 > -From: Lesly A M <leslyam@ti.com> > -Date: Wed, 1 Jun 2011 14:56:49 -0700 > -Subject: [PATCH 10/13] MFD: TWL4030: power scripts for OMAP3 boards > - > -Power bus message sequence for TWL4030 to enter > sleep/wakeup/warm_reset. > - > -TWL4030 power scripts which can be used by different OMAP3 boards > -with the power companion chip (TWL4030 series). > - > -The twl4030 generic script can be used by any board file to update > -the power data in twl4030_platform_data. > - > -Since the TWL4030 power script has dependency with APIs in twl4030-power.c > -removing the __init for these APIs. > - > -For more information please see: > - http://omapedia.org/wiki/TWL4030_power_scripts > - > -Signed-off-by: Lesly A M <leslyam@ti.com> > -Cc: Nishanth Menon <nm@ti.com> > -Cc: David Derrick <dderrick@ti.com> > -Cc: Samuel Ortiz <sameo@linux.intel.com> > ---- > - arch/arm/configs/omap2plus_defconfig | 1 + > - arch/arm/mach-omap2/devices.c | 15 ++ > - drivers/mfd/Kconfig | 11 + > - drivers/mfd/Makefile | 1 + > - drivers/mfd/twl4030-power.c | 31 ++-- > - drivers/mfd/twl4030-script-omap.c | 373 > ++++++++++++++++++++++++++++++++++ > - include/linux/i2c/twl.h | 41 ++++- > - 7 files changed, 454 insertions(+), 19 deletions(-) > - create mode 100644 drivers/mfd/twl4030-script-omap.c > - > -diff --git a/arch/arm/configs/omap2plus_defconfig > b/arch/arm/configs/omap2plus_defconfig > -index 076db52..d9b9858 100644 > ---- a/arch/arm/configs/omap2plus_defconfig > -+++ b/arch/arm/configs/omap2plus_defconfig > -@@ -184,6 +184,7 @@ CONFIG_TWL4030_WATCHDOG=y > - CONFIG_MENELAUS=y > - CONFIG_TWL4030_CORE=y > - CONFIG_TWL4030_POWER=y > -+CONFIG_TWL4030_SCRIPT=m > - CONFIG_REGULATOR=y > - CONFIG_REGULATOR_TWL4030=y > - CONFIG_REGULATOR_TPS65023=y > -diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach- > omap2/devices.c > -index 7b85585..7653329 100644 > ---- a/arch/arm/mach-omap2/devices.c > -+++ b/arch/arm/mach-omap2/devices.c > -@@ -329,6 +329,20 @@ static void omap_init_audio(void) > - static inline void omap_init_audio(void) {} > - #endif > - > -+#ifdef CONFIG_ARCH_OMAP3 > -+static struct platform_device omap_twl4030_script = { > -+ .name = "twl4030_script", > -+ .id = -1, > -+}; > -+ > -+static void omap_init_twl4030_script(void) > -+{ > -+ platform_device_register(&omap_twl4030_script); > -+} > -+#else > -+static inline void omap_init_twl4030_script(void) {} > -+#endif > -+ > - #if defined(CONFIG_SPI_OMAP24XX) || > defined(CONFIG_SPI_OMAP24XX_MODULE) > - > - #include <plat/mcspi.h> > -@@ -691,6 +705,7 @@ static int __init omap2_init_devices(void) > - omap_init_sham(); > - omap_init_aes(); > - omap_init_vout(); > -+ omap_init_twl4030_script(); > - > - return 0; > - } > -diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig > -index fe2370a..ea25d93 100644 > ---- a/drivers/mfd/Kconfig > -+++ b/drivers/mfd/Kconfig > -@@ -204,6 +204,17 @@ config TWL4030_POWER > - and load scripts controlling which resources are switched off/on > - or reset when a sleep, wakeup or warm reset event occurs. > - > -+config TWL4030_SCRIPT > -+ tristate "Support TWL4030 script for OMAP3 boards" > -+ depends on TWL4030_CORE && TWL4030_POWER > -+ help > -+ Say yes here if you want to use the twl4030 power scripts > -+ for OMAP3 boards. Power bus message sequence for > -+ TWL4030 to enter sleep/wakeup/warm_reset. > -+ > -+ TWL4030 power scripts which can be used by different > -+ OMAP3 boards with the power companion chip (TWL4030 series). > -+ > - config TWL4030_CODEC > - bool > - depends on TWL4030_CORE > -diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile > -index 419caa9..53ada21 100644 > ---- a/drivers/mfd/Makefile > -+++ b/drivers/mfd/Makefile > -@@ -42,6 +42,7 @@ obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o > - obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o > - obj-$(CONFIG_TWL4030_CODEC) += twl4030-codec.o > - obj-$(CONFIG_TWL6030_PWM) += twl6030-pwm.o > -+obj-$(CONFIG_TWL4030_SCRIPT) += twl4030-script-omap.o > - > - obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o > - > -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c > -index 8162e43..91d5bc8 100644 > ---- a/drivers/mfd/twl4030-power.c > -+++ b/drivers/mfd/twl4030-power.c > -@@ -123,7 +123,7 @@ static u8 res_config_addrs[] = { > - [RES_MAIN_REF] = 0x94, > - }; > - > --static int __init twl4030_write_script_byte(u8 address, u8 byte) > -+static int twl4030_write_script_byte(u8 address, u8 byte) > - { > - int err; > - > -@@ -137,7 +137,7 @@ out: > - return err; > - } > - > --static int __init twl4030_write_script_ins(u8 address, u16 pmb_message, > -+static int twl4030_write_script_ins(u8 address, u16 pmb_message, > - u8 delay, u8 next) > - { > - int err; > -@@ -157,7 +157,7 @@ out: > - return err; > - } > - > --static int __init twl4030_write_script(u8 address, struct twl4030_ins *script, > -+static int twl4030_write_script(u8 address, struct twl4030_ins *script, > - int len) > - { > - int err; > -@@ -182,7 +182,7 @@ static int __init twl4030_write_script(u8 address, > struct twl4030_ins *script, > - return err; > - } > - > --static int __init twl4030_config_wakeup3_sequence(u8 address) > -+static int twl4030_config_wakeup3_sequence(u8 address) > - { > - int err; > - u8 data; > -@@ -207,7 +207,7 @@ out: > - return err; > - } > - > --static int __init twl4030_config_wakeup12_sequence(u8 address) > -+static int twl4030_config_wakeup12_sequence(u8 address) > - { > - int err = 0; > - u8 data; > -@@ -261,7 +261,7 @@ out: > - return err; > - } > - > --static int __init twl4030_config_sleep_sequence(u8 address) > -+static int twl4030_config_sleep_sequence(u8 address) > - { > - int err; > - > -@@ -275,7 +275,7 @@ static int __init twl4030_config_sleep_sequence(u8 > address) > - return err; > - } > - > --static int __init twl4030_config_warmreset_sequence(u8 address) > -+static int twl4030_config_warmreset_sequence(u8 address) > - { > - int err; > - u8 rd_data; > -@@ -323,7 +323,7 @@ out: > - return err; > - } > - > --static int __init twl4030_configure_resource(struct twl4030_resconfig > *rconfig) > -+static int twl4030_configure_resource(struct twl4030_resconfig *rconfig) > - { > - int rconfig_addr; > - int err; > -@@ -415,7 +415,7 @@ static int __init twl4030_configure_resource(struct > twl4030_resconfig *rconfig) > - return 0; > - } > - > --static int __init load_twl4030_script(struct twl4030_script *tscript, > -+static int load_twl4030_script(struct twl4030_script *tscript, > - u8 address) > - { > - int err; > -@@ -510,8 +510,9 @@ int twl4030_remove_script(u8 flags) > - > - return err; > - } > -+EXPORT_SYMBOL_GPL(twl4030_remove_script); > - > --void __init twl4030_power_init(struct twl4030_power_data > *twl4030_scripts) > -+int twl4030_power_init(struct twl4030_power_data *twl4030_scripts) > - { > - int err = 0; > - int i; > -@@ -529,7 +530,6 @@ void __init twl4030_power_init(struct > twl4030_power_data *twl4030_scripts) > - TWL4030_PM_MASTER_PROTECT_KEY); > - if (err) > - goto unlock; > -- > - for (i = 0; i < twl4030_scripts->num; i++) { > - err = load_twl4030_script(twl4030_scripts->scripts[i], > address); > - if (err) > -@@ -552,18 +552,19 @@ void __init twl4030_power_init(struct > twl4030_power_data *twl4030_scripts) > - TWL4030_PM_MASTER_PROTECT_KEY); > - if (err) > - pr_err("TWL4030 Unable to relock registers\n"); > -- return; > -+ return err; > - > - unlock: > - if (err) > - pr_err("TWL4030 Unable to unlock registers\n"); > -- return; > -+ return err; > - load: > - if (err) > - pr_err("TWL4030 failed to load scripts\n"); > -- return; > -+ return err; > - resource: > - if (err) > - pr_err("TWL4030 failed to configure resource\n"); > -- return; > -+ return err; > - } > -+EXPORT_SYMBOL_GPL(twl4030_power_init); > -diff --git a/drivers/mfd/twl4030-script-omap.c b/drivers/mfd/twl4030-script- > omap.c > -new file mode 100644 > -index 0000000..867a442 > ---- /dev/null > -+++ b/drivers/mfd/twl4030-script-omap.c > -@@ -0,0 +1,373 @@ > -+/* > -+ * OMAP power script for PMIC TWL4030 > -+ * > -+ * Author: Lesly A M <leslyam@ti.com> > -+ * > -+ * Copyright (C) 2010 Texas Instruments, Inc. > -+ * Lesly A M <leslyam@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include <linux/kernel.h> > -+#include <linux/module.h> > -+#include <linux/platform_device.h> > -+ > -+#include <linux/i2c/twl.h> > -+ > -+/* > -+ * power management signal connections for OMAP3430 with TWL5030 > -+ * > -+ * TWL5030 OMAP3430 > -+ * ______________________ _____________________ > -+ * | | | | > -+ * | (P1) NSLEEP1|<----------|SYS_OFFMODE | > -+ * | NRESWARM|<----------|NWARMRESET | > -+ * | (P2) NSLEEP2|---| | | > -+ * | | === | | > -+ * | | - | | > -+ * | | | | > -+ * | VDD1 |---------->| VDD1 | > -+ * | VDD2 |---------->| VDD2 | > -+ * | VIO |---------->| VDDS | > -+ * ________ | VAUX1 | | | > -+ * | | | ... | | | > -+ * | ENABLE|<--------|CLKEN CLKREQ|<----------|SYS_CLKREQ | > -+ * | CLKOUT|-------->|HFCLKIN (P3) HFCLKOUT|---------->|XTALIN | > -+ * |________| |______________________| > |_____________________| > -+ * > -+ * > -+ * Signal descriptions: > -+ * > -+ * SYS_OFFMODE - OMAP drives this signal low only when the OMAP is in the > -+ * OFF idle mode. It is driven high when a wake up event is detected. > -+ * This signal should control the P1 device group in the PMIC. > -+ * > -+ * SYS_CLKREQ - OMAP should drive this signal low when the OMAP goes into > -+ * any idle mode. This signal should control the P3 device group > -+ * in the PMIC. It is used to notify PMIC when XTALIN is no longer needed. > -+ * > -+ * NSLEEP1(P1) - When this signal goes low the P1 sleep sequence is executed > -+ * in the PMIC turning off certain resources. When this signal goes high > -+ * the P1 active sequence is executed turning back on certain resources. > -+ * > -+ * NSLEEP2(P2) - This signal controls the P2 device group of the PMIC. > -+ * It is not used in this setup and should be tied to ground. > -+ * This can be used for connecting a different processor or MODEM chip. > -+ * > -+ * CLKREQ(P3) - When this signal goes low the P3 sleep sequence is executed > -+ * in the PMIC turning off HFCLKOUT. When this signal goes high > -+ * the P3 active sequence is executed turning back on HFCLKOUT and > other > -+ * resources. > -+ * > -+ * CLKEN - Enable signal for oscillator. Should only go low when OMAP is > -+ * in the OFF idle mode due to long oscillator startup times. > -+ * > -+ * HFCLKIN - Oscillator output clock into PMIC. > -+ * > -+ * HFCLKOUT - System clock output from PMIC to OMAP. > -+ * > -+ * XTALIN - OMAP system clock input(HFCLKOUT). > -+ */ > -+ > -+/* > -+ * Recommended sleep and active sequences for TWL5030 when connected > to OMAP3 > -+ * > -+ * WARNING: If the board is using NSLEEP2(P2), should modify this script and > -+ * setuptime values accordingly. > -+ * > -+ * Chip Retention/Off (using i2c for scaling voltage): > -+ * When OMAP de-assert the SYS_CLKREQ signal, only HFCLKOUT is > affected > -+ * since it is the only resource assigned to P3 only. > -+ * > -+ * Sysoff (using sys_off signal): > -+ * When OMAP de-assert the SYS_OFFMODE signal A2S(active to sleep > sequence) > -+ * on the PMIC is executed. This will put resources of TYPE2=1 and > TYPE2=2 > -+ * into sleep. At this point only resources assigned to P1 only will be > -+ * affected (VDD1, VDD2 & VPLL1). > -+ * > -+ * Next the OMAP will lower SYS_CLKREQ which will allow the A2S > sequence > -+ * in PMIC to execute again. This will put resources of TYPE2=1 and > TYPE2=2 > -+ * into sleep but will affect resources that are assigned to P3(HFCLKOUT) > -+ * only or assigned to P1 and P3. > -+ * > -+ * On wakeup event OMAP goes active and pulls the SYS_CLKREQ high, > -+ * which will execute the P3 S2A sequence on the PMIC. This will turn on > -+ * resources assigned to P3 or assigned to P1 and P3 and of TYPE2=2. > -+ * > -+ * Next the OMAP will wait the PRM_VOLTOFFSET time and then de-assert > -+ * the SYS_OFFMODE pin allowing the PMIC to execute the P1 S2A active > -+ * sequence. This will turn on resources assigned to P1 or assigned to > -+ * P1 and P3 and of TYPE2=1. > -+ * > -+ * Timing diagram for OMAP wakeup from OFFMODE using sys_off signal > -+ * > _____________________________________________________________ > -+ * OMAP active __/ > -+ * |<--------------------PRM_CLKSETP-------------------->| > -+ * > ______________________________________________________ > -+ * SYS_CLKREQ _________/ > -+ * > ___________________________________________________ > -+ * CLKEN ____________/ > -+ * > -+ * HFCLKIN > _______________________________________________///////////////// > -+ * > -+ * HFCLKOUT > __________________________________________________////////////// > -+ * |<---PRM_VOLTOFFSET-->| > -+ * ________________________________ > -+ * SYS_OFFMODE _______________________________/ > -+ * |<--------PRM_VOLTSETUP2------->| > -+ * ___________ > -+ * VPLL1 > ____________________________________________________/ > -+ * __ > -+ * VDD1 > _____________________________________________________________ > / > -+ * __ > -+ * VDD2 > _____________________________________________________________ > / > -+ * > -+ * Other resources which are not handled by this script should be > -+ * controlled by the respective drivers using them (VAUX1, VAUX2, > VAUX3, > -+ * VAUX4, VMMC1, VMMC2, VPLL2, VSIM, VDAC, VUSB1V5, VUSB1V8 & > VUSB3V1). > -+ * > -+ * More info: > -+ * http://omapedia.org/wiki/TWL4030_power_scripts > -+ */ > -+ > -+/** > -+ * DOC: Sleep to active sequence for P1/P2 > -+ * > -+ * Sequence to control the TWL4030 Power resources, > -+ * when the system wakeup from sleep. > -+ * Executed upon P1_P2 transition for wakeup > -+ * (sys_offmode signal de-asserted on OMAP). > -+ */ > -+static struct twl4030_ins wakeup_p12_seq[] __initdata = { > -+ /* > -+ * Broadcast message to put resources to active > -+ * > -+ * Since we are not using TYPE, resources which have TYPE2 configured > -+ * as 1 will be targeted (VPLL1, VDD1, VDD2, REGEN, NRES_PWRON, > SYSEN). > -+ */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R1, > -+ RES_STATE_ACTIVE), > 2}, > -+}; > -+ > -+static struct twl4030_script wakeup_p12_script __initdata = { > -+ .script = wakeup_p12_seq, > -+ .size = ARRAY_SIZE(wakeup_p12_seq), > -+ .flags = TWL4030_WAKEUP12_SCRIPT, > -+}; > -+ > -+/** > -+ * DOC: Sleep to active sequence for P3 > -+ * > -+ * Sequence to control the TWL4030 Power resources, > -+ * when the system wakeup from sleep. > -+ * Executed upon P3 transition for wakeup > -+ * (clkreq signal asserted on OMAP). > -+ */ > -+static struct twl4030_ins wakeup_p3_seq[] __initdata = { > -+ /* > -+ * Broadcast message to put resources to active > -+ * > -+ * Since we are not using TYPE, resources which have TYPE2 configured > -+ * as 2 will be targeted > -+ * (VINTANA1, VINTANA2, VINTDIG, VIO, CLKEN, HFCLKOUT). > -+ */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R2, > -+ RES_STATE_ACTIVE), > 2}, > -+}; > -+ > -+static struct twl4030_script wakeup_p3_script __initdata = { > -+ .script = wakeup_p3_seq, > -+ .size = ARRAY_SIZE(wakeup_p3_seq), > -+ .flags = TWL4030_WAKEUP3_SCRIPT, > -+}; > -+ > -+/** > -+ * DOC: Active to sleep sequence for P1/P2/P3 > -+ * > -+ * Sequence to control the TWL4030 Power resources, > -+ * when the system goes into sleep. > -+ * Executed upon P1_P2/P3 transition for sleep. > -+ * (sys_offmode signal asserted/clkreq de-asserted on OMAP). > -+ */ > -+static struct twl4030_ins sleep_on_seq[] __initdata = { > -+ /* Broadcast message to put res to sleep (TYPE2 = 1, 2) */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R1, > -+ RES_STATE_SLEEP), > 2}, > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R2, > -+ RES_STATE_SLEEP), > 2}, > -+}; > -+ > -+static struct twl4030_script sleep_on_script __initdata = { > -+ .script = sleep_on_seq, > -+ .size = ARRAY_SIZE(sleep_on_seq), > -+ .flags = TWL4030_SLEEP_SCRIPT, > -+}; > -+ > -+/** > -+ * DOC: Warm reset sequence > -+ * > -+ * Sequence to reset the TWL4030 Power resources, > -+ * when the system gets warm reset. > -+ * Executed upon warm reset signal. > -+ * > -+ * First the device is put in reset, then the system clock is requested to > -+ * the external oscillator, and default ON power reference and power > providers > -+ * are enabled. Next some additional resources which are software controlled > -+ * are enabled. Finally sequence is ended by the release of TWL5030 reset. > -+ */ > -+static struct twl4030_ins wrst_seq[] __initdata = { > -+ /* > -+ * As a workaround for OMAP Erratum (ID: i537 - OMAP HS devices are > -+ * not recovering from warm reset while in OFF mode) > -+ * NRESPWRON is toggled to force a power on reset condition to OMAP > -+ */ > -+ /* Trun OFF NRES_PWRON */ > -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_NRES_PWRON, > RES_STATE_OFF), 2}, > -+ /* Reset twl4030 */ > -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, > -+ /* Reset MAIN_REF */ > -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_MAIN_REF, > RES_STATE_WRST), 2}, > -+ /* Reset All type2_group2 */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R2, > -+ RES_STATE_WRST), > 2}, > -+ /* Reset VUSB_3v1 */ > -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_VUSB_3V1, > RES_STATE_WRST), 2}, > -+ /* Reset All type2_group1 */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R1, > -+ RES_STATE_WRST), > 2}, > -+ /* Reset the Reset & Contorl_signals */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_RC, RES_TYPE_ALL, > RES_TYPE2_R0, > -+ RES_STATE_WRST), > 2}, > -+ /* Re-enable twl4030 */ > -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), > 2}, > -+ /* Trun ON NRES_PWRON */ > -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_NRES_PWRON, > RES_STATE_ACTIVE), 2}, > -+}; > -+ > -+static struct twl4030_script wrst_script __initdata = { > -+ .script = wrst_seq, > -+ .size = ARRAY_SIZE(wrst_seq), > -+ .flags = TWL4030_WRST_SCRIPT, > -+}; > -+ > -+/* TWL4030 script for sleep, wakeup & warm_reset */ > -+static struct twl4030_script *twl4030_scripts[] __initdata = { > -+ &wakeup_p12_script, > -+ &wakeup_p3_script, > -+ &sleep_on_script, > -+ &wrst_script, > -+}; > -+ > -+/** > -+ * DOC: TWL4030 resource configuration > -+ * > -+ * Resource which are attached to P1 device group alone > -+ * will go to sleep state, when sys_off signal from OMAP is de-asserted. > -+ * (VPLL1, VDD1, VDD2) > -+ * > -+ * None of the resources are attached to P2 device group alone. > -+ * (WARNING: If MODEM or connectivity chip is connected to NSLEEP2 PIN on > -+ * TWL4030, should modify the resource configuration accordingly). > -+ * > -+ * Resource which are attached to P3 device group alone > -+ * will go to sleep state, when clk_req signal from OMAP is de-asserted. > -+ * (HFCLKOUT) > -+ * > -+ * Resource which are attached to more than one device group > -+ * will go to sleep state, when corresponding signals are de-asserted. > -+ * (VINTANA1, VINTANA2, VINTDIG, VIO, REGEN, NRESPWRON, CLKEN, > SYSEN) > -+ * > -+ * REGEN is an output of the device which can be connected to slave power ICs > -+ * or external LDOs that power on before voltage for the IO interface (VIO). > -+ * > -+ * SYSEN is a bidirectional signal of the device that controls slave power ICs. > -+ * In master mode, the device sets SYSEN high to enable the slave power ICs. > -+ * In slave mode, when one of the power ICs drives the SYSEN signal low, > -+ * all devices of the platform stay in the wait-on state. > -+ * > -+ * Resource which are attached to none of the device group by default > -+ * will be in sleep state. These resource should be controlled by > -+ * the respective drivers using them. > -+ * Resource which are controlled by drivers are not modified here. > -+ * (VAUX1, VAUX2, VAUX3, VAUX4, VMMC1, VMMC2, VPLL2, VSIM, > VDAC, > -+ * VUSB1V5, VUSB1V8, VUSB3V1) > -+ * > -+ * Resource using reset values. > -+ * (32KCLKOUT, TRITON_RESET, MAINREF) > -+ */ > -+static struct twl4030_resconfig twl4030_rconfig[] __initdata = { > -+ { .resource = RES_VPLL1, .devgroup = DEV_GRP_P1, .type = 3, > -+ .type2 = 1, .remap_sleep = RES_STATE_OFF }, > -+ { .resource = RES_VINTANA1, .devgroup = DEV_GRP_ALL, .type = 1, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_VINTANA2, .devgroup = DEV_GRP_ALL, .type = 0, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_VINTDIG, .devgroup = DEV_GRP_ALL, .type = 1, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_VIO, .devgroup = DEV_GRP_ALL, .type = 2, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_VDD1, .devgroup = DEV_GRP_P1, > -+ .type = 4, .type2 = 1, .remap_sleep = RES_STATE_OFF }, > -+ { .resource = RES_VDD2, .devgroup = DEV_GRP_P1, > -+ .type = 3, .type2 = 1, .remap_sleep = RES_STATE_OFF }, > -+ { .resource = RES_REGEN, .devgroup = DEV_GRP_ALL, .type = 2, > -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_ALL, .type = 0, > -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_CLKEN, .devgroup = DEV_GRP_ALL, .type = 3, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_SYSEN, .devgroup = DEV_GRP_ALL, .type = 6, > -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, > -+ .type = 0, .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { 0, 0}, > -+}; > -+ > -+struct twl4030_power_data twl4030_generic_script __initdata = { > -+ .scripts = twl4030_scripts, > -+ .num = ARRAY_SIZE(twl4030_scripts), > -+ .resource_config = twl4030_rconfig, > -+}; > -+ > -+static int __init twl4030_script_probe(struct platform_device *pdev) > -+{ > -+ return twl4030_power_init(&twl4030_generic_script); > -+} > -+ > -+static int twl4030_script_remove(struct platform_device *pdev) > -+{ > -+ return twl4030_remove_script(TWL4030_SLEEP_SCRIPT | > -+ TWL4030_WAKEUP12_SCRIPT | > TWL4030_WAKEUP3_SCRIPT | > -+ TWL4030_WRST_SCRIPT); > -+} > -+ > -+static struct platform_driver twl4030_script_driver = { > -+ .remove = twl4030_script_remove, > -+ .driver = { > -+ .name = "twl4030_script", > -+ .owner = THIS_MODULE, > -+ }, > -+}; > -+ > -+static int __init twl4030_script_init(void) > -+{ > -+ /* Register the TWL4030 script driver */ > -+ return platform_driver_probe(&twl4030_script_driver, > -+ twl4030_script_probe); > -+} > -+ > -+static void __exit twl4030_script_cleanup(void) > -+{ > -+ /* Unregister TWL4030 script driver */ > -+ platform_driver_unregister(&twl4030_script_driver); > -+} > -+ > -+module_init(twl4030_script_init); > -+module_exit(twl4030_script_cleanup); > -+ > -+MODULE_DESCRIPTION("OMAP TWL4030 script driver"); > -+MODULE_LICENSE("GPL"); > -+MODULE_AUTHOR("Texas Instruments Inc"); > -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h > -index aee3a22..f343974 100644 > ---- a/include/linux/i2c/twl.h > -+++ b/include/linux/i2c/twl.h > -@@ -205,6 +205,12 @@ static inline int twl6030_mmc_card_detect(struct > device *dev, int slot) > - return -EIO; > - } > - #endif > -+ > -+#ifdef CONFIG_TWL4030_POWER > -+extern struct twl4030_power_data twl4030_generic_script; > -+#else > -+#define twl4030_generic_script NULL; > -+#endif > - /*----------------------------------------------------------------------*/ > - > - /* > -@@ -437,9 +443,23 @@ static inline int twl6030_mmc_card_detect(struct > device *dev, int slot) > - > - /* Power bus message definitions */ > - > --/* The TWL4030/5030 splits its power-management resources (the various > -- * regulators, clock and reset lines) into 3 processor groups - P1, P2 and > -- * P3. These groups can then be configured to transition between sleep, wait- > on > -+/* > -+ * The TWL4030/5030 splits its power-management resources (the various > -+ * regulators, clock and reset lines) into 3 processor groups - P1, P2 and P3. > -+ * > -+ * Resources attached to device group P1 is managed depending on the state > of > -+ * NSLEEP1 pin of TWL4030, which is connected to sys_off signal from OMAP > -+ * > -+ * Resources attached to device group P2 is managed depending on the state > of > -+ * NSLEEP2 pin of TWL4030, which is can be connected to a modem or > -+ * connectivity chip > -+ * > -+ * Resources attached to device group P3 is managed depending on the state > of > -+ * CLKREQ pin of TWL4030, which is connected to clk request signal from > OMAP > -+ * > -+ * If required these resources can be attached to combination of P1/P2/P3. > -+ * > -+ * These groups can then be configured to transition between sleep, wait-on > - * and active states by sending messages to the power bus. See Section 5.4.2 > - * Power Resources of TWL4030 TRM > - */ > -@@ -449,7 +469,17 @@ static inline int twl6030_mmc_card_detect(struct > device *dev, int slot) > - #define DEV_GRP_P1 0x1 /* P1: all OMAP devices */ > - #define DEV_GRP_P2 0x2 /* P2: all Modem devices */ > - #define DEV_GRP_P3 0x4 /* P3: all peripheral devices */ > -+#define DEV_GRP_ALL 0x7 /* P1/P2/P3: all devices */ > - > -+/* > -+ * The 27 power resources in TWL4030 is again divided into > -+ * analog resources: > -+ * Power Providers - LDO regulators, dc-to-dc regulators > -+ * Power Reference - analog reference > -+ * > -+ * and digital resources: > -+ * Reset & Clock - reset and clock signals. > -+ */ > - /* Resource groups */ > - #define RES_GRP_RES 0x0 /* Reserved */ > - #define RES_GRP_PP 0x1 /* Power providers */ > -@@ -461,7 +491,10 @@ static inline int twl6030_mmc_card_detect(struct > device *dev, int slot) > - #define RES_GRP_ALL 0x7 /* All resource groups */ > - > - #define RES_TYPE2_R0 0x0 > -+#define RES_TYPE2_R1 0x1 > -+#define RES_TYPE2_R2 0x2 > - > -+#define RES_TYPE_R0 0x0 > - #define RES_TYPE_ALL 0x7 > - > - /* Resource states */ > -@@ -636,7 +669,7 @@ struct twl4030_power_data { > - #define TWL4030_RESCONFIG_UNDEF ((u8)-1) > - }; > - > --extern void twl4030_power_init(struct twl4030_power_data > *triton2_scripts); > -+extern int twl4030_power_init(struct twl4030_power_data *triton2_scripts); > - extern int twl4030_remove_script(u8 flags); > - > - struct twl4030_codec_audio_data { > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0011-MFD-TWL4030- > TWL-version-checking.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/mfd/0011-MFD-TWL4030-TWL-version-checking.patch > deleted file mode 100644 > index 6de2193..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0011-MFD-TWL4030-TWL- > version-checking.patch > +++ /dev/null > @@ -1,164 +0,0 @@ > -From 3ceb224732230934aba7d082f3e2ca96c14a9ca0 Mon Sep 17 00:00:00 > 2001 > -From: Lesly A M <leslyam@ti.com> > -Date: Wed, 1 Jun 2011 14:56:56 -0700 > -Subject: [PATCH 11/13] MFD: TWL4030: TWL version checking > - > -Added API to get the TWL5030 Si version from the IDCODE register. > -It is used for enabling the workaround for TWL erratum 27. > - > -Signed-off-by: Lesly A M <leslyam@ti.com> > -Cc: Nishanth Menon <nm@ti.com> > -Cc: David Derrick <dderrick@ti.com> > -Cc: Samuel Ortiz <sameo@linux.intel.com> > ---- > - drivers/mfd/twl-core.c | 62 > +++++++++++++++++++++++++++++++++++++++++++++++ > - include/linux/i2c/twl.h | 17 ++++++++++++- > - 2 files changed, 78 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c > -index 9096d7d..a60601d 100644 > ---- a/drivers/mfd/twl-core.c > -+++ b/drivers/mfd/twl-core.c > -@@ -251,6 +251,9 @@ > - /* is driver active, bound to a chip? */ > - static bool inuse; > - > -+/* TWL IDCODE Register value */ > -+static u32 twl_idcode; > -+ > - static unsigned int twl_id; > - unsigned int twl_rev(void) > - { > -@@ -509,6 +512,58 @@ EXPORT_SYMBOL(twl_i2c_read_u8); > - > - /*----------------------------------------------------------------------*/ > - > -+/** > -+ * twl_read_idcode_register - API to read the IDCODE register. > -+ * > -+ * Unlocks the IDCODE register and read the 32 bit value. > -+ */ > -+static int twl_read_idcode_register(void) > -+{ > -+ int err; > -+ > -+ err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, > TWL_EEPROM_R_UNLOCK, > -+ REG_UNLOCK_TEST_REG); > -+ if (err) { > -+ pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", > err); > -+ goto fail; > -+ } > -+ > -+ err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_idcode), > -+ REG_IDCODE_7_0, 4); > -+ if (err) { > -+ pr_err("TWL4030: unable to read IDCODE -%d\n", err); > -+ goto fail; > -+ } > -+ > -+ err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, > REG_UNLOCK_TEST_REG); > -+ if (err) > -+ pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", > err); > -+fail: > -+ return err; > -+} > -+ > -+/** > -+ * twl_get_type - API to get TWL Si type. > -+ * > -+ * Api to get the TWL Si type from IDCODE value. > -+ */ > -+int twl_get_type(void) > -+{ > -+ return TWL_SIL_TYPE(twl_idcode); > -+} > -+EXPORT_SYMBOL_GPL(twl_get_type); > -+ > -+/** > -+ * twl_get_version - API to get TWL Si version. > -+ * > -+ * Api to get the TWL Si version from IDCODE value. > -+ */ > -+int twl_get_version(void) > -+{ > -+ return TWL_SIL_REV(twl_idcode); > -+} > -+EXPORT_SYMBOL_GPL(twl_get_version); > -+ > - static struct device * > - add_numbered_child(unsigned chip, const char *name, int num, > - void *pdata, unsigned pdata_len, > -@@ -1071,6 +1126,7 @@ twl_probe(struct i2c_client *client, const struct > i2c_device_id *id) > - unsigned i; > - struct twl4030_platform_data *pdata = client->dev.platform_data; > - u8 temp; > -+ int ret = 0; > - > - if (!pdata) { > - dev_dbg(&client->dev, "no platform data?\n"); > -@@ -1117,6 +1173,12 @@ twl_probe(struct i2c_client *client, const struct > i2c_device_id *id) > - /* setup clock framework */ > - clocks_init(&client->dev, pdata->clock); > - > -+ /* read TWL IDCODE Register */ > -+ if (twl_id == TWL4030_CLASS_ID) { > -+ ret = twl_read_idcode_register(); > -+ WARN(ret < 0, "Error: reading twl_idcode register value\n"); > -+ } > -+ > - /* load power event scripts */ > - if (twl_has_power() && pdata->power) > - twl4030_power_init(pdata->power); > -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h > -index f343974..23ec058 100644 > ---- a/include/linux/i2c/twl.h > -+++ b/include/linux/i2c/twl.h > -@@ -151,7 +151,12 @@ > - #define MMC_PU (0x1 << 3) > - #define MMC_PD (0x1 << 2) > - > -- > -+#define TWL_SIL_TYPE(rev) ((rev) & 0x00FFFFFF) > -+#define TWL_SIL_REV(rev) ((rev) >> 24) > -+#define TWL_SIL_5030 0x09002F > -+#define TWL5030_REV_1_0 0x00 > -+#define TWL5030_REV_1_1 0x10 > -+#define TWL5030_REV_1_2 0x30 > - > - #define TWL4030_CLASS_ID 0x4030 > - #define TWL6030_CLASS_ID 0x6030 > -@@ -181,6 +186,9 @@ int twl_i2c_read_u8(u8 mod_no, u8 *val, u8 reg); > - int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); > - int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); > - > -+int twl_get_type(void); > -+int twl_get_version(void); > -+ > - int twl6030_interrupt_unmask(u8 bit_mask, u8 offset); > - int twl6030_interrupt_mask(u8 bit_mask, u8 offset); > - > -@@ -286,7 +294,12 @@ extern struct twl4030_power_data > twl4030_generic_script; > - *(Use TWL_4030_MODULE_INTBR) > - */ > - > -+#define REG_IDCODE_7_0 0x00 > -+#define REG_IDCODE_15_8 0x01 > -+#define REG_IDCODE_16_23 0x02 > -+#define REG_IDCODE_31_24 0x03 > - #define REG_GPPUPDCTR1 0x0F > -+#define REG_UNLOCK_TEST_REG 0x12 > - > - /*I2C1 and I2C4(SR) SDA/SCL pull-up control bits */ > - > -@@ -295,6 +308,8 @@ extern struct twl4030_power_data > twl4030_generic_script; > - #define SR_I2C_SCL_CTRL_PU BIT(4) > - #define SR_I2C_SDA_CTRL_PU BIT(6) > - > -+#define TWL_EEPROM_R_UNLOCK 0x49 > -+ > - /*----------------------------------------------------------------------*/ > - > - /* > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0012-MFD-TWL4030- > workaround-changes-for-Erratum-27.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/mfd/0012-MFD-TWL4030-workaround-changes-for-Erratum-27.patch > deleted file mode 100644 > index 6fe9dbf..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0012-MFD-TWL4030- > workaround-changes-for-Erratum-27.patch > +++ /dev/null > @@ -1,341 +0,0 @@ > -From 0bec9f7b20e7c61e0bab93195ec39cf94f1f8e25 Mon Sep 17 00:00:00 > 2001 > -From: Lesly A M <leslyam@ti.com> > -Date: Wed, 1 Jun 2011 14:57:01 -0700 > -Subject: [PATCH 12/13] MFD: TWL4030: workaround changes for Erratum 27 > - > -Workaround for TWL5030 Silicon Errata 27 & 28: > - 27 - VDD1, VDD2, may have glitches when their output value is > updated. > - 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal > clock > - is switched from internal to external. > - > -Erratum 27: > - If the DCDC regulators is running on their internal oscillator, > - negative glitches may occur on VDD1, VDD2 output when voltage is > changed. > - The OMAP device may reboot if the VDD1 or VDD2 go below the > - core minimum operating voltage. > - > - WORKAROUND > - Set up the TWL5030 DC-DC power supplies to use the HFCLKIN instead > of > - the internal oscillator. > - > -Erratum 28: > - VDD1/VDD2 clock system may hang during switching the clock source > from > - internal oscillator to external. VDD1/VDD2 output voltages may collapse > - if clock stops. > - > - WORKAROUND > - If HFCLK is disabled in OFFMODE, modify the sleep/wakeup sequence > and > - setuptimes to make sure the switching will happen only when HFCLKIN > is stable. > - Also use the TWL5030 watchdog to safeguard the first switching from > - internal oscillator to HFCLKIN during the TWL5030 init. > - > - IMPACT > - power sequence is changed. > - sleep/wakeup time values will be changed. > - > -The workaround changes are called from twl4030_power_init(), since we have > to > -make some i2c_read calls to check the TWL4030 version & the i2c will not be > -initialized in the early stage. > - > -This workaround is required for TWL5030 Silicon version less than ES1.2 > -The power script & setup time changes are recommended by TI HW team. > - > -For more information please see: > - http://omapedia.org/wiki/TWL4030_power_scripts > - > -Changes taken from TWL4030 Erratum 27 workaround patch by Nishanth > Menon. > - > -Signed-off-by: Lesly A M <leslyam@ti.com> > -Cc: Nishanth Menon <nm@ti.com> > -Cc: David Derrick <dderrick@ti.com> > -Cc: Samuel Ortiz <sameo@linux.intel.com> > ---- > - drivers/mfd/twl4030-power.c | 79 +++++++++++++++++++ > - drivers/mfd/twl4030-script-omap.c | 150 > +++++++++++++++++++++++++++++++++++++ > - include/linux/i2c/twl.h | 1 + > - 3 files changed, 230 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c > -index 91d5bc8..8af3fe3 100644 > ---- a/drivers/mfd/twl4030-power.c > -+++ b/drivers/mfd/twl4030-power.c > -@@ -63,6 +63,14 @@ static u8 twl4030_start_script_address = 0x2b; > - #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) > - #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a) > - > -+#define R_VDD1_OSC 0x5C > -+#define R_VDD2_OSC 0x6A > -+#define R_VIO_OSC 0x52 > -+#define EXT_FS_CLK_EN BIT(6) > -+ > -+#define R_WDT_CFG 0x03 > -+#define WDT_WRK_TIMEOUT 0x03 > -+ > - /* resource configuration registers > - <RESOURCE>_DEV_GRP at address 'n+0' > - <RESOURCE>_TYPE at address 'n+1' > -@@ -512,6 +520,67 @@ int twl4030_remove_script(u8 flags) > - } > - EXPORT_SYMBOL_GPL(twl4030_remove_script); > - > -+/** > -+ * twl_dcdc_use_hfclk - API to use HFCLK for TWL DCDCs > -+ * > -+ * TWL DCDCs switching to HFCLK instead of using internal RC oscillator. > -+ */ > -+static int twl_dcdc_use_hfclk(void) > -+{ > -+ u8 val; > -+ u8 smps_osc_reg[] = {R_VDD1_OSC, R_VDD2_OSC, R_VIO_OSC}; > -+ int i; > -+ int err; > -+ > -+ for (i = 0; i < sizeof(smps_osc_reg); i++) { > -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, > &val, > -+ smps_osc_reg[i]); > -+ val |= EXT_FS_CLK_EN; > -+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > val, > -+ smps_osc_reg[i]); > -+ } > -+ return err; > -+} > -+ > -+/** > -+ * twl_erratum27_workaround - Workaround for TWL5030 Silicon Erratum > 27 > -+ * 27 - VDD1, VDD2, may have glitches when their output value is updated. > -+ * 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal clock > is > -+ * switched from internal to external. > -+ * > -+ * Workaround requires the TWL DCDCs to use HFCLK instead of > -+ * internal oscillator. Also enable TWL watchdog before switching the osc > -+ * to recover if the VDD1/VDD2 stop working. > -+ */ > -+static void twl_erratum27_workaround(void) > -+{ > -+ u8 wdt_counter_val = 0; > -+ int err; > -+ > -+ /* Setup the twl wdt to take care of borderline failure case */ > -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, > &wdt_counter_val, > -+ R_WDT_CFG); > -+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > WDT_WRK_TIMEOUT, > -+ R_WDT_CFG); > -+ > -+ /* TWL DCDC switching to HFCLK */ > -+ err |= twl_dcdc_use_hfclk(); > -+ > -+ /* restore the original value */ > -+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > wdt_counter_val, > -+ R_WDT_CFG); > -+ if (err) > -+ pr_warning("TWL4030: workaround setup failed!\n"); > -+} > -+ > -+static bool is_twl5030_erratum27wa_required(void) > -+{ > -+ if (twl_get_type() == TWL_SIL_5030) > -+ return (twl_get_version() < TWL5030_REV_1_2); > -+ > -+ return 0; > -+} > -+ > - int twl4030_power_init(struct twl4030_power_data *twl4030_scripts) > - { > - int err = 0; > -@@ -530,6 +599,16 @@ int twl4030_power_init(struct twl4030_power_data > *twl4030_scripts) > - TWL4030_PM_MASTER_PROTECT_KEY); > - if (err) > - goto unlock; > -+ > -+ /* Applying TWL5030 Erratum 27 WA based on Si revision & > -+ * flag updated from board file*/ > -+ if (is_twl5030_erratum27wa_required()) { > -+ pr_info("TWL5030: Enabling workaround for Si Erratum > 27\n"); > -+ twl_erratum27_workaround(); > -+ if (twl4030_scripts->twl5030_erratum27wa_script) > -+ twl4030_scripts->twl5030_erratum27wa_script(); > -+ } > -+ > - for (i = 0; i < twl4030_scripts->num; i++) { > - err = load_twl4030_script(twl4030_scripts->scripts[i], > address); > - if (err) > -diff --git a/drivers/mfd/twl4030-script-omap.c b/drivers/mfd/twl4030-script- > omap.c > -index 867a442..ff93fd2 100644 > ---- a/drivers/mfd/twl4030-script-omap.c > -+++ b/drivers/mfd/twl4030-script-omap.c > -@@ -326,10 +326,160 @@ static struct twl4030_resconfig twl4030_rconfig[] > __initdata = { > - { 0, 0}, > - }; > - > -+/* > -+ * Sleep and active sequences with changes for TWL5030 Erratum 27 > workaround > -+ * > -+ * Sysoff (using sys_off signal): > -+ * When SYS_CLKREQ goes low during retention no resources will be > affected > -+ * since no resources are assigned to P3 only. > -+ * > -+ * Since all resources are assigned to P1 and P3 then all resources > -+ * will be affected on the falling edge of P3 (SYS_CLKREQ). > -+ * When OMAP lower the SYS_CLKREQ signal PMIC will execute the > -+ * A2S sequence in which HFCLKOUT is dissabled first and > -+ * after 488.32 usec(PRM_VOLTOFFSET) resources assigned to P1 and P3 > -+ * and of TYPE2=1 are put to sleep > -+ * (VDD1, VDD2, VPLL1, REGEN, NRESPWRON & SYSEN). > -+ * Again after a 61.04 usec resources assigned to P1 and P3 > -+ * and of TYPE2=2 are put to sleep > -+ * (VINTANA1, VINTANA2, VINTDIG, VIO & CLKEN). > -+ * > -+ * On wakeup event OMAP goes active and pulls the SYS_CLKREQ high, > -+ * and will execute the S2A sequence which is same for P1_P2 & P3. > -+ * This will turn on all resources of TYPE2=2 to go to the active state. > -+ * Three dummy broadcast messages are added to get a delay of ~10 ms > -+ * before enabling the HFCLKOUT resource. And after a 30.52 usec > -+ * all resources of TYPE2=1 are put to the active state. > -+ * > -+ * This 10ms delay can be reduced if the oscillator is having less > -+ * stabilization time. A should be taken care if it needs more time > -+ * for stabilization. > -+ * > -+ */ > -+ > -+/** > -+ * DOC: Sleep to Active sequence for P1/P2/P3 > -+ * > -+ * The wakeup sequence is adjusted to do the VDD1/VDD2 voltage ramp-up > -+ * only after HFCLKIN is stabilized and the HFCLKOUT is enabled. > -+ */ > -+static struct twl4030_ins wakeup_seq_erratum27[] __initdata = { > -+ /* > -+ * Broadcast message to put res(TYPE2 = 2) to active. > -+ * Wait for ~10 mS (ramp-up time for OSC on the board) > -+ * after HFCLKIN is enabled > -+ */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R2, > -+ RES_STATE_ACTIVE), > 55}, > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R2, > -+ RES_STATE_ACTIVE), > 55}, > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R2, > -+ RES_STATE_ACTIVE), > 54}, > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R2, > -+ RES_STATE_ACTIVE), > 1}, > -+ /* Singular message to enable HCLKOUT after HFCLKIN is stabilized */ > -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_HFCLKOUT, > RES_STATE_ACTIVE), 1}, > -+ /* > -+ * Broadcast message to put res(TYPE2 = 1) to active. > -+ * VDD1/VDD2 ramp-up after HFCLKIN is stable and HFCLKOUT is > enabled. > -+ */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R1, > -+ RES_STATE_ACTIVE), > 2}, > -+}; > -+ > -+static struct twl4030_script wakeup_script_erratum27 __initdata = { > -+ .script = wakeup_seq_erratum27, > -+ .size = ARRAY_SIZE(wakeup_seq_erratum27), > -+ .flags = TWL4030_WAKEUP12_SCRIPT | > TWL4030_WAKEUP3_SCRIPT, > -+}; > -+ > -+/** > -+ * DOC: Active to Sleep sequence for P1/P2/P3 > -+ * > -+ * The sleep sequence is adjusted to do the switching of VDD1/VDD2/VIO OSC > from > -+ * HFCLKIN to internal oscillator when the HFCLKIN is stable. > -+ */ > -+static struct twl4030_ins sleep_on_seq_erratum27[] __initdata = { > -+ /* > -+ * Singular message to disable HCLKOUT. > -+ * Wait for ~488.32 uS to do the switching of VDD1/VDD2/VIO OSC > from > -+ * HFCLKIN to internal oscillator before disabling HFCLKIN. > -+ */ > -+ {MSG_SINGULAR(DEV_GRP_NULL, RES_HFCLKOUT, > RES_STATE_SLEEP), 20}, > -+ /* Broadcast message to put res(TYPE2 = 1) to sleep */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R1, > -+ RES_STATE_SLEEP), > 2}, > -+ /* Broadcast message to put res(TYPE2 = 2) to sleep, disable HFCLKIN */ > -+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_R0, > RES_TYPE2_R2, > -+ RES_STATE_SLEEP), > 2}, > -+}; > -+ > -+static struct twl4030_script sleep_on_script_erratum27 __initdata = { > -+ .script = sleep_on_seq_erratum27, > -+ .size = ARRAY_SIZE(sleep_on_seq_erratum27), > -+ .flags = TWL4030_SLEEP_SCRIPT, > -+}; > -+ > -+/* TWL4030 script for sleep, wakeup & warm_reset */ > -+static struct twl4030_script *twl4030_scripts_erratum27[] __initdata = { > -+ &wakeup_script_erratum27, > -+ &sleep_on_script_erratum27, > -+ &wrst_script, > -+}; > -+ > -+/** > -+ * DOC: TWL4030 resource configuration > -+ * > -+ * VDD1/VDD2/VPLL are assigned to P1 and P3, to have better control > -+ * during OFFMODE. HFCLKOUT is assigned to P1 and P3 (*p2) to turn off > -+ * only during OFFMODE. > -+ * (*P2 is included if the platform uses it for modem/some other processor) > -+ */ > -+static struct twl4030_resconfig twl4030_rconfig_erratum27[] __initdata = { > -+ { .resource = RES_VPLL1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, > -+ .type = 3, .type2 = 1, .remap_sleep = RES_STATE_OFF }, > -+ { .resource = RES_VINTANA1, .devgroup = DEV_GRP_ALL, .type = 1, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_VINTANA2, .devgroup = DEV_GRP_ALL, .type = 0, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_VINTDIG, .devgroup = DEV_GRP_ALL, .type = 1, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_VIO, .devgroup = DEV_GRP_ALL, .type = 2, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_VDD1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, > -+ .type = 4, .type2 = 1, .remap_sleep = RES_STATE_OFF }, > -+ { .resource = RES_VDD2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, > -+ .type = 3, .type2 = 1, .remap_sleep = RES_STATE_OFF }, > -+ { .resource = RES_REGEN, .devgroup = DEV_GRP_ALL, .type = 2, > -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_ALL, .type = 0, > -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_CLKEN, .devgroup = DEV_GRP_ALL, .type = 3, > -+ .type2 = 2, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_SYSEN, .devgroup = DEV_GRP_ALL, .type = 6, > -+ .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, > -+ { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P1 | > DEV_GRP_P3, > -+ .type = 0, .type2 = 1, .remap_sleep = RES_STATE_SLEEP }, > -+ { 0, 0}, > -+}; > -+ > -+/** > -+ * twl5030_script_erratum27() - API to modify TWL4030 script > -+ * > -+ * Updating the TWL4030 script & resource configuration > -+ */ > -+static void __init twl5030_script_erratum27(void) > -+{ > -+ twl4030_generic_script.scripts = twl4030_scripts_erratum27; > -+ twl4030_generic_script.num = > ARRAY_SIZE(twl4030_scripts_erratum27); > -+ twl4030_generic_script.resource_config = > twl4030_rconfig_erratum27; > -+} > -+ > - struct twl4030_power_data twl4030_generic_script __initdata = { > - .scripts = twl4030_scripts, > - .num = ARRAY_SIZE(twl4030_scripts), > - .resource_config = twl4030_rconfig, > -+ .twl5030_erratum27wa_script = twl5030_script_erratum27, > - }; > - > - static int __init twl4030_script_probe(struct platform_device *pdev) > -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h > -index 23ec058..10cb6e2 100644 > ---- a/include/linux/i2c/twl.h > -+++ b/include/linux/i2c/twl.h > -@@ -681,6 +681,7 @@ struct twl4030_power_data { > - struct twl4030_script **scripts; > - unsigned num; > - struct twl4030_resconfig *resource_config; > -+ void (*twl5030_erratum27wa_script)(void); > - #define TWL4030_RESCONFIG_UNDEF ((u8)-1) > - }; > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0013-MFD-TWL4030- > optimizing-resource-configuration.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/mfd/0013-MFD-TWL4030-optimizing-resource-configuration.patch > deleted file mode 100644 > index 8904f8d..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/mfd/0013-MFD-TWL4030- > optimizing-resource-configuration.patch > +++ /dev/null > @@ -1,184 +0,0 @@ > -From bf171753a162d07753208c6bcfae8ca1e5c94af3 Mon Sep 17 00:00:00 > 2001 > -From: Lesly A M <leslyam@ti.com> > -Date: Wed, 1 Jun 2011 14:57:05 -0700 > -Subject: [PATCH 13/13] MFD: TWL4030: optimizing resource configuration > - > -Skip the i2c register writes in twl4030_configure_resource() if the new value > -is same as the old value, for devgrp/type/remap regs. > - > -Suggested by David Derrick <dderrick@ti.com> > - > -Signed-off-by: Lesly A M <leslyam@ti.com> > -Cc: Nishanth Menon <nm@ti.com> > -Cc: David Derrick <dderrick@ti.com> > -Cc: Samuel Ortiz <sameo@linux.intel.com> > ---- > - drivers/mfd/twl4030-power.c | 126 ++++++++++++++++++++++++------------ > ------ > - 1 files changed, 72 insertions(+), 54 deletions(-) > - > -diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c > -index 8af3fe3..d82632f 100644 > ---- a/drivers/mfd/twl4030-power.c > -+++ b/drivers/mfd/twl4030-power.c > -@@ -335,9 +335,9 @@ static int twl4030_configure_resource(struct > twl4030_resconfig *rconfig) > - { > - int rconfig_addr; > - int err; > -- u8 type; > -- u8 grp; > -- u8 remap; > -+ u8 type, type_value; > -+ u8 grp, grp_value; > -+ u8 remap, remap_value; > - > - if (rconfig->resource > TOTAL_RESOURCES) { > - pr_err("TWL4030 Resource %d does not exist\n", > -@@ -348,76 +348,94 @@ static int twl4030_configure_resource(struct > twl4030_resconfig *rconfig) > - rconfig_addr = res_config_addrs[rconfig->resource]; > - > - /* Set resource group */ > -- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &grp, > -+ if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) { > -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, > &grp, > - rconfig_addr + DEV_GRP_OFFSET); > -- if (err) { > -- pr_err("TWL4030 Resource %d group could not be read\n", > -- rconfig->resource); > -- return err; > -- } > -+ if (err) { > -+ pr_err("TWL4030 Resource %d group could not be > read\n", > -+ rconfig->resource); > -+ return err; > -+ } > - > -- if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) { > -- grp &= ~DEV_GRP_MASK; > -- grp |= rconfig->devgroup << DEV_GRP_SHIFT; > -- err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > -+ grp_value = (grp & DEV_GRP_MASK) >> DEV_GRP_SHIFT; > -+ > -+ if (rconfig->devgroup != grp_value) { > -+ grp &= ~DEV_GRP_MASK; > -+ grp |= rconfig->devgroup << DEV_GRP_SHIFT; > -+ err = > twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > - grp, rconfig_addr + DEV_GRP_OFFSET); > -- if (err < 0) { > -- pr_err("TWL4030 failed to program devgroup\n"); > -- return err; > -+ if (err < 0) { > -+ pr_err("TWL4030 failed to program > devgroup\n"); > -+ return err; > -+ } > - } > - } > - > - /* Set resource types */ > -- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &type, > -+ if ((rconfig->type != TWL4030_RESCONFIG_UNDEF) || > -+ (rconfig->type2 != TWL4030_RESCONFIG_UNDEF)) { > -+ > -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, > &type, > - rconfig_addr + TYPE_OFFSET); > -- if (err < 0) { > -- pr_err("TWL4030 Resource %d type could not be read\n", > -- rconfig->resource); > -- return err; > -- } > -+ if (err < 0) { > -+ pr_err("TWL4030 Resource %d type could not be > read\n", > -+ rconfig->resource); > -+ return err; > -+ } > - > -- if (rconfig->type != TWL4030_RESCONFIG_UNDEF) { > -- type &= ~TYPE_MASK; > -- type |= rconfig->type << TYPE_SHIFT; > -- } > -+ type_value = type; > - > -- if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) { > -- type &= ~TYPE2_MASK; > -- type |= rconfig->type2 << TYPE2_SHIFT; > -- } > -+ if (rconfig->type != TWL4030_RESCONFIG_UNDEF) { > -+ type &= ~TYPE_MASK; > -+ type |= rconfig->type << TYPE_SHIFT; > -+ } > - > -- err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > -+ if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) { > -+ type &= ~TYPE2_MASK; > -+ type |= rconfig->type2 << TYPE2_SHIFT; > -+ } > -+ > -+ if (type != type_value) { > -+ err = > twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > - type, rconfig_addr + TYPE_OFFSET); > -- if (err < 0) { > -- pr_err("TWL4030 failed to program resource type\n"); > -- return err; > -+ if (err < 0) { > -+ pr_err("TWL4030 failed to program resource > type\n"); > -+ return err; > -+ } > -+ } > - } > - > - /* Set remap states */ > -- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &remap, > -+ if ((rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) || > -+ (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF)) { > -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, > &remap, > - rconfig_addr + REMAP_OFFSET); > -- if (err < 0) { > -- pr_err("TWL4030 Resource %d remap could not be read\n", > -- rconfig->resource); > -- return err; > -- } > -+ if (err < 0) { > -+ pr_err("TWL4030 Resource %d remap could not be > read\n", > -+ rconfig->resource); > -+ return err; > -+ } > - > -- if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) { > -- remap &= ~OFF_STATE_MASK; > -- remap |= rconfig->remap_off << OFF_STATE_SHIFT; > -- } > -+ remap_value = remap; > - > -- if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) { > -- remap &= ~SLEEP_STATE_MASK; > -- remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT; > -- } > -+ if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) { > -+ remap &= ~OFF_STATE_MASK; > -+ remap |= rconfig->remap_off << OFF_STATE_SHIFT; > -+ } > - > -- err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > -- remap, > -- rconfig_addr + REMAP_OFFSET); > -- if (err < 0) { > -- pr_err("TWL4030 failed to program remap\n"); > -- return err; > -+ if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) { > -+ remap &= ~SLEEP_STATE_MASK; > -+ remap |= rconfig->remap_sleep << > SLEEP_STATE_SHIFT; > -+ } > -+ > -+ if (remap != remap_value) { > -+ err = > twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > -+ remap, rconfig_addr + REMAP_OFFSET); > -+ if (err < 0) { > -+ pr_err("TWL4030 failed to program > remap\n"); > -+ return err; > -+ } > -+ } > - } > - > - return 0; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/musb/0001-usb-musb- > Enable-DMA-mode1-RX-for-USB-Mass-Storage.patch b/recipes- > kernel/linux/linux-omap-2.6.39/musb/0001-usb-musb-Enable-DMA-mode1-RX- > for-USB-Mass-Storage.patch > deleted file mode 100644 > index a98a4da..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/musb/0001-usb-musb-Enable- > DMA-mode1-RX-for-USB-Mass-Storage.patch > +++ /dev/null > @@ -1,121 +0,0 @@ > -From 2adb339e4988632379971febe5696f21d05c71f2 Mon Sep 17 00:00:00 > 2001 > -From: Anand Gadiyar <gadiyar@ti.com> > -Date: Tue, 19 Jul 2011 01:52:14 -0700 > -Subject: [PATCH] usb: musb: Enable DMA mode1 RX for USB-Mass-Storage > - > -This patch enables the DMA mode1 RX support. > -This feature is enabled based on the short_not_ok flag passed from > -gadget drivers. > - > -This will result in a thruput performance gain of around > -40% for USB mass-storage/mtp use cases. > - > -Signed-off-by: Anand Gadiyar <gadiyar@ti.com> > -Signed-off-by: Moiz Sonasath <m-sonasath@ti.com> > -Tested-by: Vikram Pandita <vikram.pandita@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - drivers/usb/musb/musb_gadget.c | 68 ++++++++++++++++++++++++-------- > ------- > - 1 files changed, 42 insertions(+), 26 deletions(-) > - > -diff --git a/drivers/usb/musb/musb_gadget.c > b/drivers/usb/musb/musb_gadget.c > -index f47c201..ca32c63 100644 > ---- a/drivers/usb/musb/musb_gadget.c > -+++ b/drivers/usb/musb/musb_gadget.c > -@@ -630,6 +630,7 @@ static void rxstate(struct musb *musb, struct > musb_request *req) > - u16 len; > - u16 csr = musb_readw(epio, MUSB_RXCSR); > - struct musb_hw_ep *hw_ep = &musb->endpoints[epnum]; > -+ u8 use_mode_1; > - > - if (hw_ep->is_shared_fifo) > - musb_ep = &hw_ep->ep_in; > -@@ -679,6 +680,18 @@ static void rxstate(struct musb *musb, struct > musb_request *req) > - > - if (csr & MUSB_RXCSR_RXPKTRDY) { > - len = musb_readw(epio, MUSB_RXCOUNT); > -+ > -+ /* > -+ * Enable Mode 1 for RX transfers only for mass-storage > -+ * use-case, based on short_not_ok flag which is set only > -+ * from file_storage and f_mass_storage drivers > -+ */ > -+ > -+ if (request->short_not_ok && len == musb_ep->packet_sz) > -+ use_mode_1 = 1; > -+ else > -+ use_mode_1 = 0; > -+ > - if (request->actual < request->length) { > - #ifdef CONFIG_USB_INVENTRA_DMA > - if (is_buffer_mapped(req)) { > -@@ -710,37 +723,40 @@ static void rxstate(struct musb *musb, struct > musb_request *req) > - * then becomes usable as a runtime "use mode 1" hint... > - */ > - > -- csr |= MUSB_RXCSR_DMAENAB; > --#ifdef USE_MODE1 > -- csr |= MUSB_RXCSR_AUTOCLEAR; > -- /* csr |= MUSB_RXCSR_DMAMODE; */ > -- > -- /* this special sequence (enabling and then > -- * disabling MUSB_RXCSR_DMAMODE) is > required > -- * to get DMAReq to activate > -- */ > -- musb_writew(epio, MUSB_RXCSR, > -- csr | MUSB_RXCSR_DMAMODE); > --#else > -- if (!musb_ep->hb_mult && > -- musb_ep->hw_ep- > >rx_double_buffered) > -+ /* Experimental: Mode1 works with mass > storage use cases */ > -+ if (use_mode_1) { > - csr |= MUSB_RXCSR_AUTOCLEAR; > --#endif > -- musb_writew(epio, MUSB_RXCSR, csr); > -+ musb_writew(epio, MUSB_RXCSR, > csr); > -+ csr |= MUSB_RXCSR_DMAENAB; > -+ musb_writew(epio, MUSB_RXCSR, > csr); > -+ > -+ /* this special sequence (enabling and > then > -+ * disabling MUSB_RXCSR_DMAMODE) > is required > -+ * to get DMAReq to activate > -+ */ > -+ musb_writew(epio, MUSB_RXCSR, > -+ csr | > MUSB_RXCSR_DMAMODE); > -+ musb_writew(epio, MUSB_RXCSR, > csr); > -+ > -+ } else { > -+ if (!musb_ep->hb_mult && > -+ musb_ep->hw_ep- > >rx_double_buffered) > -+ csr |= > MUSB_RXCSR_AUTOCLEAR; > -+ csr |= MUSB_RXCSR_DMAENAB; > -+ musb_writew(epio, MUSB_RXCSR, > csr); > -+ } > - > - if (request->actual < request->length) { > - int transfer_size = 0; > --#ifdef USE_MODE1 > -- transfer_size = min(request->length - > request->actual, > -- channel->max_len); > --#else > -- transfer_size = min(request->length - > request->actual, > -- (unsigned)len); > --#endif > -- if (transfer_size <= musb_ep- > >packet_sz) > -- musb_ep->dma- > >desired_mode = 0; > -- else > -+ if (use_mode_1) { > -+ transfer_size = min(request- > >length - request->actual, > -+ channel- > >max_len); > - musb_ep->dma- > >desired_mode = 1; > -+ } else { > -+ transfer_size = min(request- > >length - request->actual, > -+ > (unsigned)len); > -+ musb_ep->dma- > >desired_mode = 0; > -+ } > - > - use_dma = c->channel_program( > - channel, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/net/0001-NFS-Revert- > NFSROOT-default-mount-options.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/net/0001-NFS-Revert-NFSROOT-default-mount-options.patch > deleted file mode 100644 > index 617698d..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/net/0001-NFS-Revert-NFSROOT- > default-mount-options.patch > +++ /dev/null > @@ -1,13 +0,0 @@ > -diff --git a/fs/nfs/nfsroot.c b/fs/nfs/nfsroot.c > -index c541093..c4744e1 100644 > ---- a/fs/nfs/nfsroot.c > -+++ b/fs/nfs/nfsroot.c > -@@ -87,7 +87,7 @@ > - #define NFS_ROOT "/tftpboot/%s" > - > - /* Default NFSROOT mount options. */ > --#define NFS_DEF_OPTIONS "udp" > -+#define NFS_DEF_OPTIONS "vers=2,udp,rsize=4096,wsize=4096" > - > - /* Parameters passed from the kernel command line */ > - static char nfs_root_parms[256] __initdata = ""; > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-fixes/0001-OMAP2-cpufreq-free-up-table-on-exit.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0001-OMAP2-cpufreq-free-up-table-on-exit.patch > deleted file mode 100644 > index 9e9a8a0..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0001-OMAP2-cpufreq-free-up-table-on-exit.patch > +++ /dev/null > @@ -1,38 +0,0 @@ > -From 38dd5aadc86725f6018d23679e9daa60ca0a8319 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Thu, 12 May 2011 07:59:52 -0500 > -Subject: [PATCH 1/6] OMAP2+: cpufreq: free up table on exit > - > -freq_table allocated by opp_init_cpufreq_table in omap_cpu_init > -needs to be freed in omap_cpu_exit. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 3 +++ > - 1 files changed, 3 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index d53ce23..e38ebb8 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -26,6 +26,7 @@ > - #include <linux/clk.h> > - #include <linux/io.h> > - #include <linux/opp.h> > -+#include <linux/slab.h> > - #include <linux/cpu.h> > - > - #include <asm/system.h> > -@@ -216,6 +217,8 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - static int omap_cpu_exit(struct cpufreq_policy *policy) > - { > - clk_exit_cpufreq_table(&freq_table); > -+ kfree(freq_table); > -+ freq_table = NULL; > - clk_put(mpu_clk); > - return 0; > - } > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-fixes/0002-OMAP2-cpufreq-handle-invalid-cpufreq- > table.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-fixes/0002-OMAP2-cpufreq-handle-invalid-cpufreq- > table.patch > deleted file mode 100644 > index 087724d..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0002-OMAP2-cpufreq-handle-invalid-cpufreq-table.patch > +++ /dev/null > @@ -1,44 +0,0 @@ > -From 5febdc0482e545c2a598f035c5e03931e0c3c808 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Thu, 12 May 2011 08:14:41 -0500 > -Subject: [PATCH 2/6] OMAP2+: cpufreq: handle invalid cpufreq table > - > -Handle the case when cpufreq_frequency_table_cpuinfo fails. freq_table > -that we passed failed the internal test of cpufreq generic driver, > -so we should'nt be using the freq_table as such. Instead, warn and > -fallback to clock functions for validation and operation. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 12 ++++++++++-- > - 1 files changed, 10 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index e38ebb8..6e3666a 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -182,10 +182,18 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - > - if (freq_table) { > - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -- if (!result) > -+ if (!result) { > - cpufreq_frequency_table_get_attr(freq_table, > - policy->cpu); > -- } else { > -+ } else { > -+ WARN(true, "%s: fallback to > clk_round(freq_table=%d)\n", > -+ __func__, result); > -+ kfree(freq_table); > -+ freq_table = NULL; > -+ } > -+ } > -+ > -+ if (!freq_table) { > - policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > - policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, > - VERY_HI_RATE) / > 1000; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-fixes/0003-OMAP2-cpufreq-minor-comment-cleanup.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0003-OMAP2-cpufreq-minor-comment-cleanup.patch > deleted file mode 100644 > index 4f4cdb1..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0003-OMAP2-cpufreq-minor-comment-cleanup.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From aef7e862873e6125159a18d22a2e37b1fbab2153 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Thu, 12 May 2011 16:27:45 -0700 > -Subject: [PATCH 3/6] OMAP2+: cpufreq: minor comment cleanup > - > -this should probably get squashed in.. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 6 ++++-- > - 1 files changed, 4 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 6e3666a..45f1e9e 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -84,8 +84,10 @@ static int omap_target(struct cpufreq_policy *policy, > - if (is_smp() && (num_online_cpus() < NR_CPUS)) > - return ret; > - > -- /* Ensure desired rate is within allowed range. Some govenors > -- * (ondemand) will just pass target_freq=0 to get the minimum. */ > -+ /* > -+ * Ensure desired rate is within allowed range. Some govenors > -+ * (ondemand) will just pass target_freq=0 to get the minimum. > -+ */ > - if (target_freq < policy->min) > - target_freq = policy->min; > - if (target_freq > policy->max) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-fixes/0004-OMAP2-cpufreq-use-clk_init_cpufreq_table-if- > OPPs-not.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq-fixes/0004-OMAP2-cpufreq-use- > clk_init_cpufreq_table-if-OPPs-not.patch > deleted file mode 100644 > index dd23c08..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0004-OMAP2-cpufreq-use-clk_init_cpufreq_table-if-OPPs- > not.patch > +++ /dev/null > @@ -1,48 +0,0 @@ > -From f231980dbd0f05229f2020e59b7242872576416f Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Fri, 13 May 2011 05:34:35 -0700 > -Subject: [PATCH 4/6] OMAP2: cpufreq: use clk_init_cpufreq_table if OPPs not > available > - > -OMAP2 does not use OPP tables at the moment for DVFS. Currently, > -we depend on opp table initialization to give us the freq_table, > -which makes sense for OMAP3+. for OMAP2, we should be using > -clk_init_cpufreq_table - so if the opp based frequency table > -initilization fails, fall back to clk_init_cpufreq_table to give > -us the table. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 9 ++++++++- > - 1 files changed, 8 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 45f1e9e..854f4b3 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -180,7 +180,13 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - pr_warning("%s: unable to get the mpu device\n", __func__); > - return -EINVAL; > - } > -- opp_init_cpufreq_table(mpu_dev, &freq_table); > -+ > -+ /* > -+ * if we dont get cpufreq table using opp, use traditional omap2 lookup > -+ * as a fallback > -+ */ > -+ if (opp_init_cpufreq_table(mpu_dev, &freq_table)) > -+ clk_init_cpufreq_table(&freq_table); > - > - if (freq_table) { > - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -@@ -188,6 +194,7 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - cpufreq_frequency_table_get_attr(freq_table, > - policy->cpu); > - } else { > -+ clk_exit_cpufreq_table(&freq_table); > - WARN(true, "%s: fallback to > clk_round(freq_table=%d)\n", > - __func__, result); > - kfree(freq_table); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-fixes/0005-OMAP2-cpufreq-use- > cpufreq_frequency_table_target.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0005-OMAP2-cpufreq- > use-cpufreq_frequency_table_target.patch > deleted file mode 100644 > index 504d191..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0005-OMAP2-cpufreq-use- > cpufreq_frequency_table_target.patch > +++ /dev/null > @@ -1,78 +0,0 @@ > -From 272d76bcb22b9509ccc1b59d3a62e3930d902d17 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Fri, 13 May 2011 05:43:49 -0700 > -Subject: [PATCH 5/6] OMAP2+: cpufreq: use cpufreq_frequency_table_target > - > -Use cpufreq_frequency_table_target for finding the proper target > -instead of seeing if the frequency requested is divisible alone. > -if we have a frequency table, we should restrict ourselves to > -selecting the "approved" frequencies alone and only in the case > -where the frequency table is not available should we attempt at > -closest roundable clock frequency. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 38 > ++++++++++++++++++++++-------- > - 1 files changed, 28 insertions(+), 10 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 854f4b3..d0b4f97 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -77,24 +77,42 @@ static int omap_target(struct cpufreq_policy *policy, > - unsigned int target_freq, > - unsigned int relation) > - { > -- int i, ret = 0; > -+ unsigned int i; > -+ int ret = 0; > - struct cpufreq_freqs freqs; > - > - /* Changes not allowed until all CPUs are online */ > - if (is_smp() && (num_online_cpus() < NR_CPUS)) > - return ret; > - > -- /* > -- * Ensure desired rate is within allowed range. Some govenors > -- * (ondemand) will just pass target_freq=0 to get the minimum. > -- */ > -- if (target_freq < policy->min) > -- target_freq = policy->min; > -- if (target_freq > policy->max) > -- target_freq = policy->max; > -+ if (freq_table) { > -+ ret = cpufreq_frequency_table_target(policy, freq_table, > -+ target_freq, relation, &i); > -+ if (ret) { > -+ pr_debug("%s: cpu%d: no freq match for > %d(ret=%d)\n", > -+ __func__, policy->cpu, target_freq, ret); > -+ return ret; > -+ } > -+ freqs.new = freq_table[i].frequency; > -+ } else { > -+ /* > -+ * Ensure desired rate is within allowed range. Some govenors > -+ * (ondemand) will just pass target_freq=0 to get the minimum. > -+ */ > -+ if (target_freq < policy->min) > -+ target_freq = policy->min; > -+ if (target_freq > policy->max) > -+ target_freq = policy->max; > -+ > -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / > 1000; > -+ } > -+ if (!freqs.new) { > -+ pr_err("%s: cpu%d: no match for freq %d\n", __func__, > -+ policy->cpu, target_freq); > -+ return -EINVAL; > -+ } > - > - freqs.old = omap_getspeed(policy->cpu); > -- freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > - freqs.cpu = policy->cpu; > - > - if (freqs.old == freqs.new) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-fixes/0006-OMAP2-cpufreq-fix-freq_table-leak.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0006-OMAP2-cpufreq-fix-freq_table-leak.patch > deleted file mode 100644 > index 0cb4c91..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-fixes/0006-OMAP2-cpufreq-fix-freq_table-leak.patch > +++ /dev/null > @@ -1,100 +0,0 @@ > -From 42a384af80e07534913d9002ec8d9caf5d4d305c Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 18 May 2011 01:48:23 -0500 > -Subject: [PATCH 6/6] OMAP2+: cpufreq: fix freq_table leak > - > -Since we have two cpus the cpuinit call for cpu1 causes > -freq_table of cpu0 to be overwritten. instead, we maintain > -a counter to keep track of cpus who use the cpufreq table > -allocate it once(one freq table for all CPUs) and free them > -once the last user is done with it. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 33 > ++++++++++++++++++++++++------ > - 1 files changed, 26 insertions(+), 7 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index d0b4f97..fc3d0fb 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -42,6 +42,9 @@ > - #define VERY_HI_RATE 900000000 > - > - static struct cpufreq_frequency_table *freq_table; > -+static int freq_table_users; > -+static DEFINE_MUTEX(freq_table_lock); > -+ > - static struct clk *mpu_clk; > - > - static int omap_verify_speed(struct cpufreq_policy *policy) > -@@ -172,6 +175,18 @@ skip_lpj: > - return ret; > - } > - > -+static void freq_table_free(void) > -+{ > -+ if (!freq_table_users) > -+ return; > -+ freq_table_users--; > -+ if (freq_table_users) > -+ return; > -+ clk_exit_cpufreq_table(&freq_table); > -+ kfree(freq_table); > -+ freq_table = NULL; > -+} > -+ > - static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) > - { > - int result = 0; > -@@ -199,14 +214,18 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - return -EINVAL; > - } > - > -+ mutex_lock(&freq_table_lock); > - /* > - * if we dont get cpufreq table using opp, use traditional omap2 lookup > - * as a fallback > - */ > -- if (opp_init_cpufreq_table(mpu_dev, &freq_table)) > -- clk_init_cpufreq_table(&freq_table); > -+ if (!freq_table) { > -+ if (opp_init_cpufreq_table(mpu_dev, &freq_table)) > -+ clk_init_cpufreq_table(&freq_table); > -+ } > - > - if (freq_table) { > -+ freq_table_users++; > - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > - if (!result) { > - cpufreq_frequency_table_get_attr(freq_table, > -@@ -215,10 +234,10 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - clk_exit_cpufreq_table(&freq_table); > - WARN(true, "%s: fallback to > clk_round(freq_table=%d)\n", > - __func__, result); > -- kfree(freq_table); > -- freq_table = NULL; > -+ freq_table_free(); > - } > - } > -+ mutex_unlock(&freq_table_lock); > - > - if (!freq_table) { > - policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > -@@ -251,9 +270,9 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - > - static int omap_cpu_exit(struct cpufreq_policy *policy) > - { > -- clk_exit_cpufreq_table(&freq_table); > -- kfree(freq_table); > -- freq_table = NULL; > -+ mutex_lock(&freq_table_lock); > -+ freq_table_free(); > -+ mutex_unlock(&freq_table_lock); > - clk_put(mpu_clk); > - return 0; > - } > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-hotplug/0001-cpufreq-helpers-for-walking-the-frequency- > table.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-hotplug/0001-cpufreq-helpers-for-walking-the-frequency- > table.patch > deleted file mode 100644 > index 576cd08..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-hotplug/0001-cpufreq-helpers-for-walking-the-frequency-table.patch > +++ /dev/null > @@ -1,134 +0,0 @@ > -From 8726f3a7218b72a1003904a24bb000b3e4f9b4d1 Mon Sep 17 00:00:00 > 2001 > -From: Mike Turquette <mturquette@ti.com> > -Date: Tue, 17 May 2011 09:35:54 -0500 > -Subject: [PATCH 1/2] cpufreq: helpers for walking the frequency table > - > -Two new functions for getting the next higher and next lower frequencies > -in the cpufreq table, based upon a frequency supplied in kHz. > - > -This is useful for cpufreq governors that do not target frequencies > -based upon a percentage or a pre-determined value, but instead access > -the cpufreq table directly. > - > -Signed-off-by: Mike Turquette <mturquette@ti.com> > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - drivers/cpufreq/freq_table.c | 73 > ++++++++++++++++++++++++++++++++++++++++++ > - include/linux/cpufreq.h | 9 +++++ > - 2 files changed, 82 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/cpufreq/freq_table.c b/drivers/cpufreq/freq_table.c > -index 0543221..11a307b 100644 > ---- a/drivers/cpufreq/freq_table.c > -+++ b/drivers/cpufreq/freq_table.c > -@@ -13,6 +13,7 @@ > - #include <linux/module.h> > - #include <linux/init.h> > - #include <linux/cpufreq.h> > -+#include <linux/err.h> > - > - #define dprintk(msg...) \ > - cpufreq_debug_printk(CPUFREQ_DEBUG_CORE, "freq-table", msg) > -@@ -174,6 +175,78 @@ int cpufreq_frequency_table_target(struct > cpufreq_policy *policy, > - } > - EXPORT_SYMBOL_GPL(cpufreq_frequency_table_target); > - > -+int cpufreq_frequency_table_next_lowest(struct cpufreq_policy *policy, > -+ struct cpufreq_frequency_table *table, int *index) > -+{ > -+ unsigned int cur_freq; > -+ unsigned int next_lowest_freq; > -+ int optimal_index = -1; > -+ int i = 0; > -+ > -+ if (!policy || IS_ERR(policy) || !table || IS_ERR(table) || > -+ !index || IS_ERR(index)) > -+ return -ENOMEM; > -+ > -+ cur_freq = policy->cur; > -+ next_lowest_freq = policy->min; > -+ > -+ /* we're at the lowest frequency in the table already, bail out */ > -+ if (cur_freq == policy->min) > -+ return -EINVAL; > -+ > -+ /* walk the list, find closest freq to cur_freq that is below it */ > -+ while(table[i].frequency != CPUFREQ_TABLE_END) { > -+ if (table[i].frequency < cur_freq && > -+ table[i].frequency >= next_lowest_freq) { > -+ next_lowest_freq = table[i].frequency; > -+ optimal_index = table[i].index; > -+ } > -+ > -+ i++; > -+ } > -+ > -+ *index = optimal_index; > -+ > -+ return 0; > -+} > -+EXPORT_SYMBOL_GPL(cpufreq_frequency_table_next_lowest); > -+ > -+int cpufreq_frequency_table_next_highest(struct cpufreq_policy *policy, > -+ struct cpufreq_frequency_table *table, int *index) > -+{ > -+ unsigned int cur_freq; > -+ unsigned int next_higher_freq; > -+ int optimal_index = -1; > -+ int i = 0; > -+ > -+ if (!policy || IS_ERR(policy) || !table || IS_ERR(table) || > -+ !index || IS_ERR(index)) > -+ return -ENOMEM; > -+ > -+ cur_freq = policy->cur; > -+ next_higher_freq = policy->max; > -+ > -+ /* we're at the highest frequency in the table already, bail out */ > -+ if (cur_freq == policy->max) > -+ return -EINVAL; > -+ > -+ /* walk the list, find closest freq to cur_freq that is above it */ > -+ while(table[i].frequency != CPUFREQ_TABLE_END) { > -+ if (table[i].frequency > cur_freq && > -+ table[i].frequency <= next_higher_freq) { > -+ next_higher_freq = table[i].frequency; > -+ optimal_index = table[i].index; > -+ } > -+ > -+ i++; > -+ } > -+ > -+ *index = optimal_index; > -+ > -+ return 0; > -+} > -+EXPORT_SYMBOL_GPL(cpufreq_frequency_table_next_highest); > -+ > - static DEFINE_PER_CPU(struct cpufreq_frequency_table *, > cpufreq_show_table); > - /** > - * show_available_freqs - show available frequencies for the specified CPU > -diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h > -index 9343dd3..a38fca8 100644 > ---- a/include/linux/cpufreq.h > -+++ b/include/linux/cpufreq.h > -@@ -396,6 +396,15 @@ void cpufreq_frequency_table_get_attr(struct > cpufreq_frequency_table *table, > - > - void cpufreq_frequency_table_put_attr(unsigned int cpu); > - > -+/* the following are for use in governors, or anywhere else */ > -+extern int cpufreq_frequency_table_next_lowest(struct cpufreq_policy > *policy, > -+ struct cpufreq_frequency_table > *table, > -+ int *index); > -+ > -+extern int cpufreq_frequency_table_next_highest(struct cpufreq_policy > *policy, > -+ struct cpufreq_frequency_table > *table, > -+ int *index); > -+ > - > - > /************************************************************ > ********* > - * UNIFIED DEBUG HELPERS * > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq-hotplug/0002-cpufreq-introduce-hotplug-governor.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-hotplug/0002-cpufreq-introduce-hotplug-governor.patch > deleted file mode 100644 > index 731906c..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq-hotplug/0002-cpufreq-introduce-hotplug-governor.patch > +++ /dev/null > @@ -1,879 +0,0 @@ > -From e4c777d8314d7925e4895f00b3a7ebd64a4d830b Mon Sep 17 00:00:00 > 2001 > -From: Mike Turquette <mturquette@ti.com> > -Date: Tue, 17 May 2011 09:43:09 -0500 > -Subject: [PATCH 2/2] cpufreq: introduce hotplug governor > - > -The "hotplug" governor scales CPU frequency based on load, similar to > -"ondemand". It scales up to the highest frequency when "up_threshold" > -is crossed and scales down one frequency at a time when "down_threshold" > -is crossed. Unlike those governors, target frequencies are determined > -by directly accessing the CPUfreq frequency table, instead of taking > -some percentage of maximum available frequency. > - > -The key difference in the "hotplug" governor is that it will disable > -auxillary CPUs when the system is very idle, and enable them again once > -the system becomes busy. This is achieved by averaging load over > -multiple sampling periods; if CPUs were online or offlined based on a > -single sampling period then thrashing will occur. > - > -Sysfs entries exist for "hotplug_in_sampling_periods" and for > -"hotplug_out_sampling_periods" which determine how many consecutive > -periods get averaged to determine if auxillery CPUs should be onlined or > -offlined. Defaults are 5 periods and 20 periods respectively. > -Otherwise the standard sysfs entries you might find for "ondemand" and > -"conservative" governors are there. > - > -To use this governor it is assumed that your CPUfreq driver has > -populated the CPUfreq table, CONFIG_NO_HZ is enabled and > -CONFIG_HOTPLUG_CPU is enabled. > - > -Changes in V2: > - Corrected default sampling periods > - Optimized load history array resizing > - Maintain load history when resizing array > - Add locking to dbs_check_cpu > - Switch from enable_nonboot_cpus to cpu_up > - Switch from disable_nonboot_cpus to down_cpu > - Fix some printks > - Coding style around for-loops > - > -Signed-off-by: Mike Turquette <mturquette@ti.com> > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - Documentation/cpu-freq/governors.txt | 28 ++ > - drivers/cpufreq/Kconfig | 33 ++ > - drivers/cpufreq/Makefile | 1 + > - drivers/cpufreq/cpufreq_hotplug.c | 705 > ++++++++++++++++++++++++++++++++++ > - include/linux/cpufreq.h | 3 + > - 5 files changed, 770 insertions(+), 0 deletions(-) > - create mode 100644 drivers/cpufreq/cpufreq_hotplug.c > - > -diff --git a/Documentation/cpu-freq/governors.txt b/Documentation/cpu- > freq/governors.txt > -index e74d0a2..c2e3d3d 100644 > ---- a/Documentation/cpu-freq/governors.txt > -+++ b/Documentation/cpu-freq/governors.txt > -@@ -193,6 +193,34 @@ governor but for the opposite direction. For example > when set to its > - default value of '20' it means that if the CPU usage needs to be below > - 20% between samples to have the frequency decreased. > - > -+ > -+2.6 Hotplug > -+----------- > -+ > -+The CPUfreq governor "hotplug" operates similary to "ondemand" and > -+"conservative". It's decisions are based primarily on CPU load. Like > -+"ondemand" the "hotplug" governor will ramp up to the highest frequency > -+once the run-time tunable "up_threshold" parameter is crossed. Like > -+"conservative", the "hotplug" governor exports a "down_threshold" > -+parameter that is also tunable at run-time. When the "down_threshold" > -+is crossed the CPU transitions to the next lowest frequency in the > -+CPUfreq frequency table instead of decrementing the frequency based on a > -+percentage of maximum load. > -+ > -+The main reason "hotplug" governor exists is for architectures requiring > -+that only the master CPU be online in order to hit low-power states > -+(C-states). OMAP4 is one such example of this. The "hotplug" governor > -+is also helpful in reducing thermal output in devices with tight thermal > -+constraints. > -+ > -+Auxillary CPUs are onlined/offline based on CPU load, but the decision > -+to do so is made after averaging several sampling windows. This is to > -+reduce CPU hotplug "thrashing", which can be caused by normal system > -+entropy and leads to lots of spurious plug-in and plug-out transitions. > -+The number of sampling periods averaged together is tunable via the > -+"hotplug_in_sampling_periods" and "hotplug_out_sampling_periods" > -+run-time tunable parameters. > -+ > - 3. The Governor Interface in the CPUfreq Core > - ============================================= > - > -diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig > -index ca8ee80..c716a0e 100644 > ---- a/drivers/cpufreq/Kconfig > -+++ b/drivers/cpufreq/Kconfig > -@@ -110,6 +110,19 @@ config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE > - Be aware that not all cpufreq drivers support the conservative > - governor. If unsure have a look at the help section of the > - driver. Fallback governor will be the performance governor. > -+ > -+config CPU_FREQ_DEFAULT_GOV_HOTPLUG > -+ bool "hotplug" > -+ select CPU_FREQ_GOV_HOTPLUG > -+ select CPU_FREQ_GOV_PERFORMANCE > -+ help > -+ Use the CPUFreq governor 'hotplug' as default. This allows you > -+ to get a full dynamic frequency capable system with CPU > -+ hotplug support by simply loading your cpufreq low-level > -+ hardware driver. Be aware that not all cpufreq drivers > -+ support the hotplug governor. If unsure have a look at > -+ the help section of the driver. Fallback governor will be the > -+ performance governor. > - endchoice > - > - config CPU_FREQ_GOV_PERFORMANCE > -@@ -190,4 +203,24 @@ config CPU_FREQ_GOV_CONSERVATIVE > - > - If in doubt, say N. > - > -+config CPU_FREQ_GOV_HOTPLUG > -+ tristate "'hotplug' cpufreq governor" > -+ depends on CPU_FREQ && NO_HZ && HOTPLUG_CPU > -+ help > -+ 'hotplug' - this driver mimics the frequency scaling behavior > -+ in 'ondemand', but with several key differences. First is > -+ that frequency transitions use the CPUFreq table directly, > -+ instead of incrementing in a percentage of the maximum > -+ available frequency. Second 'hotplug' will offline auxillary > -+ CPUs when the system is idle, and online those CPUs once the > -+ system becomes busy again. This last feature is needed for > -+ architectures which transition to low power states when only > -+ the "master" CPU is online, or for thermally constrained > -+ devices. > -+ > -+ If you don't have one of these architectures or devices, use > -+ 'ondemand' instead. > -+ > -+ If in doubt, say N. > -+ > - endif # CPU_FREQ > -diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile > -index 71fc3b4..05d564c 100644 > ---- a/drivers/cpufreq/Makefile > -+++ b/drivers/cpufreq/Makefile > -@@ -9,6 +9,7 @@ obj-$(CONFIG_CPU_FREQ_GOV_POWERSAVE) += > cpufreq_powersave.o > - obj-$(CONFIG_CPU_FREQ_GOV_USERSPACE) += cpufreq_userspace.o > - obj-$(CONFIG_CPU_FREQ_GOV_ONDEMAND) += cpufreq_ondemand.o > - obj-$(CONFIG_CPU_FREQ_GOV_CONSERVATIVE) += > cpufreq_conservative.o > -+obj-$(CONFIG_CPU_FREQ_GOV_HOTPLUG) += cpufreq_hotplug.o > - > - # CPUfreq cross-arch helpers > - obj-$(CONFIG_CPU_FREQ_TABLE) += freq_table.o > -diff --git a/drivers/cpufreq/cpufreq_hotplug.c > b/drivers/cpufreq/cpufreq_hotplug.c > -new file mode 100644 > -index 0000000..85aa6d2 > ---- /dev/null > -+++ b/drivers/cpufreq/cpufreq_hotplug.c > -@@ -0,0 +1,705 @@ > -+/* > -+ * CPUFreq hotplug governor > -+ * > -+ * Copyright (C) 2010 Texas Instruments, Inc. > -+ * Mike Turquette <mturquette@ti.com> > -+ * Santosh Shilimkar <santosh.shilimkar@ti.com> > -+ * > -+ * Based on ondemand governor > -+ * Copyright (C) 2001 Russell King > -+ * (C) 2003 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>, > -+ * Jun Nakajima <jun.nakajima@intel.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include <linux/kernel.h> > -+#include <linux/module.h> > -+#include <linux/init.h> > -+#include <linux/cpufreq.h> > -+#include <linux/cpu.h> > -+#include <linux/jiffies.h> > -+#include <linux/kernel_stat.h> > -+#include <linux/mutex.h> > -+#include <linux/hrtimer.h> > -+#include <linux/tick.h> > -+#include <linux/ktime.h> > -+#include <linux/sched.h> > -+#include <linux/err.h> > -+#include <linux/slab.h> > -+ > -+/* greater than 80% avg load across online CPUs increases frequency */ > -+#define DEFAULT_UP_FREQ_MIN_LOAD (80) > -+ > -+/* less than 20% avg load across online CPUs decreases frequency */ > -+#define DEFAULT_DOWN_FREQ_MAX_LOAD (20) > -+ > -+/* default sampling period (uSec) is bogus; 10x ondemand's default for x86 */ > -+#define DEFAULT_SAMPLING_PERIOD (100000) > -+ > -+/* default number of sampling periods to average before hotplug-in decision > */ > -+#define DEFAULT_HOTPLUG_IN_SAMPLING_PERIODS (5) > -+ > -+/* default number of sampling periods to average before hotplug-out decision > */ > -+#define DEFAULT_HOTPLUG_OUT_SAMPLING_PERIODS (20) > -+ > -+static void do_dbs_timer(struct work_struct *work); > -+static int cpufreq_governor_dbs(struct cpufreq_policy *policy, > -+ unsigned int event); > -+ > -+#ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG > -+static > -+#endif > -+struct cpufreq_governor cpufreq_gov_hotplug = { > -+ .name = "hotplug", > -+ .governor = cpufreq_governor_dbs, > -+ .owner = THIS_MODULE, > -+}; > -+ > -+struct cpu_dbs_info_s { > -+ cputime64_t prev_cpu_idle; > -+ cputime64_t prev_cpu_wall; > -+ cputime64_t prev_cpu_nice; > -+ struct cpufreq_policy *cur_policy; > -+ struct delayed_work work; > -+ struct cpufreq_frequency_table *freq_table; > -+ int cpu; > -+ /* > -+ * percpu mutex that serializes governor limit change with > -+ * do_dbs_timer invocation. We do not want do_dbs_timer to run > -+ * when user is changing the governor or limits. > -+ */ > -+ struct mutex timer_mutex; > -+}; > -+static DEFINE_PER_CPU(struct cpu_dbs_info_s, hp_cpu_dbs_info); > -+ > -+static unsigned int dbs_enable; /* number of CPUs using this policy */ > -+ > -+/* > -+ * dbs_mutex protects data in dbs_tuners_ins from concurrent changes on > -+ * different CPUs. It protects dbs_enable in governor start/stop. > -+ */ > -+static DEFINE_MUTEX(dbs_mutex); > -+ > -+static struct workqueue_struct *khotplug_wq; > -+ > -+static struct dbs_tuners { > -+ unsigned int sampling_rate; > -+ unsigned int up_threshold; > -+ unsigned int down_threshold; > -+ unsigned int hotplug_in_sampling_periods; > -+ unsigned int hotplug_out_sampling_periods; > -+ unsigned int hotplug_load_index; > -+ unsigned int *hotplug_load_history; > -+ unsigned int ignore_nice; > -+ unsigned int io_is_busy; > -+} dbs_tuners_ins = { > -+ .sampling_rate = DEFAULT_SAMPLING_PERIOD, > -+ .up_threshold = DEFAULT_UP_FREQ_MIN_LOAD, > -+ .down_threshold = DEFAULT_DOWN_FREQ_MAX_LOAD, > -+ .hotplug_in_sampling_periods = > DEFAULT_HOTPLUG_IN_SAMPLING_PERIODS, > -+ .hotplug_out_sampling_periods = > DEFAULT_HOTPLUG_OUT_SAMPLING_PERIODS, > -+ .hotplug_load_index = 0, > -+ .ignore_nice = 0, > -+ .io_is_busy = 0, > -+}; > -+ > -+/* > -+ * A corner case exists when switching io_is_busy at run-time: comparing idle > -+ * times from a non-io_is_busy period to an io_is_busy period (or vice-versa) > -+ * will misrepresent the actual change in system idleness. We ignore this > -+ * corner case: enabling io_is_busy might cause freq increase and disabling > -+ * might cause freq decrease, which probably matches the original intent. > -+ */ > -+static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t > *wall) > -+{ > -+ u64 idle_time; > -+ u64 iowait_time; > -+ > -+ /* cpufreq-hotplug always assumes CONFIG_NO_HZ */ > -+ idle_time = get_cpu_idle_time_us(cpu, wall); > -+ > -+ /* add time spent doing I/O to idle time */ > -+ if (dbs_tuners_ins.io_is_busy) { > -+ iowait_time = get_cpu_iowait_time_us(cpu, wall); > -+ /* cpufreq-hotplug always assumes CONFIG_NO_HZ */ > -+ if (iowait_time != -1ULL && idle_time >= iowait_time) > -+ idle_time -= iowait_time; > -+ } > -+ > -+ return idle_time; > -+} > -+ > -+/************************** sysfs interface > ************************/ > -+ > -+/* XXX look at global sysfs macros in cpufreq.h, can those be used here? */ > -+ > -+/* cpufreq_hotplug Governor Tunables */ > -+#define show_one(file_name, object) \ > -+static ssize_t show_##file_name > \ > -+(struct kobject *kobj, struct attribute *attr, char *buf) \ > -+{ \ > -+ return sprintf(buf, "%u\n", dbs_tuners_ins.object); \ > -+} > -+show_one(sampling_rate, sampling_rate); > -+show_one(up_threshold, up_threshold); > -+show_one(down_threshold, down_threshold); > -+show_one(hotplug_in_sampling_periods, hotplug_in_sampling_periods); > -+show_one(hotplug_out_sampling_periods, hotplug_out_sampling_periods); > -+show_one(ignore_nice_load, ignore_nice); > -+show_one(io_is_busy, io_is_busy); > -+ > -+static ssize_t store_sampling_rate(struct kobject *a, struct attribute *b, > -+ const char *buf, size_t count) > -+{ > -+ unsigned int input; > -+ int ret; > -+ ret = sscanf(buf, "%u", &input); > -+ if (ret != 1) > -+ return -EINVAL; > -+ > -+ mutex_lock(&dbs_mutex); > -+ dbs_tuners_ins.sampling_rate = input; > -+ mutex_unlock(&dbs_mutex); > -+ > -+ return count; > -+} > -+ > -+static ssize_t store_up_threshold(struct kobject *a, struct attribute *b, > -+ const char *buf, size_t count) > -+{ > -+ unsigned int input; > -+ int ret; > -+ ret = sscanf(buf, "%u", &input); > -+ > -+ if (ret != 1 || input <= dbs_tuners_ins.down_threshold) { > -+ return -EINVAL; > -+ } > -+ > -+ mutex_lock(&dbs_mutex); > -+ dbs_tuners_ins.up_threshold = input; > -+ mutex_unlock(&dbs_mutex); > -+ > -+ return count; > -+} > -+ > -+static ssize_t store_down_threshold(struct kobject *a, struct attribute *b, > -+ const char *buf, size_t count) > -+{ > -+ unsigned int input; > -+ int ret; > -+ ret = sscanf(buf, "%u", &input); > -+ > -+ if (ret != 1 || input >= dbs_tuners_ins.up_threshold) { > -+ return -EINVAL; > -+ } > -+ > -+ mutex_lock(&dbs_mutex); > -+ dbs_tuners_ins.down_threshold = input; > -+ mutex_unlock(&dbs_mutex); > -+ > -+ return count; > -+} > -+ > -+static ssize_t store_hotplug_in_sampling_periods(struct kobject *a, > -+ struct attribute *b, const char *buf, size_t count) > -+{ > -+ unsigned int input; > -+ unsigned int *temp; > -+ unsigned int max_windows; > -+ int ret; > -+ ret = sscanf(buf, "%u", &input); > -+ > -+ if (ret != 1) > -+ return -EINVAL; > -+ > -+ /* already using this value, bail out */ > -+ if (input == dbs_tuners_ins.hotplug_in_sampling_periods) > -+ return count; > -+ > -+ mutex_lock(&dbs_mutex); > -+ ret = count; > -+ max_windows = max(dbs_tuners_ins.hotplug_in_sampling_periods, > -+ dbs_tuners_ins.hotplug_out_sampling_periods); > -+ > -+ /* no need to resize array */ > -+ if (input <= max_windows) { > -+ dbs_tuners_ins.hotplug_in_sampling_periods = input; > -+ goto out; > -+ } > -+ > -+ /* resize array */ > -+ temp = kmalloc((sizeof(unsigned int) * input), GFP_KERNEL); > -+ > -+ if (!temp || IS_ERR(temp)) { > -+ ret = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ memcpy(temp, dbs_tuners_ins.hotplug_load_history, > -+ (max_windows * sizeof(unsigned int))); > -+ kfree(dbs_tuners_ins.hotplug_load_history); > -+ > -+ /* replace old buffer, old number of sampling periods & old index */ > -+ dbs_tuners_ins.hotplug_load_history = temp; > -+ dbs_tuners_ins.hotplug_in_sampling_periods = input; > -+ dbs_tuners_ins.hotplug_load_index = max_windows; > -+out: > -+ mutex_unlock(&dbs_mutex); > -+ > -+ return ret; > -+} > -+ > -+static ssize_t store_hotplug_out_sampling_periods(struct kobject *a, > -+ struct attribute *b, const char *buf, size_t count) > -+{ > -+ unsigned int input; > -+ unsigned int *temp; > -+ unsigned int max_windows; > -+ int ret; > -+ ret = sscanf(buf, "%u", &input); > -+ > -+ if (ret != 1) > -+ return -EINVAL; > -+ > -+ /* already using this value, bail out */ > -+ if (input == dbs_tuners_ins.hotplug_out_sampling_periods) > -+ return count; > -+ > -+ mutex_lock(&dbs_mutex); > -+ ret = count; > -+ max_windows = max(dbs_tuners_ins.hotplug_in_sampling_periods, > -+ dbs_tuners_ins.hotplug_out_sampling_periods); > -+ > -+ /* no need to resize array */ > -+ if (input <= max_windows) { > -+ dbs_tuners_ins.hotplug_out_sampling_periods = input; > -+ goto out; > -+ } > -+ > -+ /* resize array */ > -+ temp = kmalloc((sizeof(unsigned int) * input), GFP_KERNEL); > -+ > -+ if (!temp || IS_ERR(temp)) { > -+ ret = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ memcpy(temp, dbs_tuners_ins.hotplug_load_history, > -+ (max_windows * sizeof(unsigned int))); > -+ kfree(dbs_tuners_ins.hotplug_load_history); > -+ > -+ /* replace old buffer, old number of sampling periods & old index */ > -+ dbs_tuners_ins.hotplug_load_history = temp; > -+ dbs_tuners_ins.hotplug_out_sampling_periods = input; > -+ dbs_tuners_ins.hotplug_load_index = max_windows; > -+out: > -+ mutex_unlock(&dbs_mutex); > -+ > -+ return ret; > -+} > -+ > -+static ssize_t store_ignore_nice_load(struct kobject *a, struct attribute *b, > -+ const char *buf, size_t count) > -+{ > -+ unsigned int input; > -+ int ret; > -+ > -+ unsigned int j; > -+ > -+ ret = sscanf(buf, "%u", &input); > -+ if (ret != 1) > -+ return -EINVAL; > -+ > -+ if (input > 1) > -+ input = 1; > -+ > -+ mutex_lock(&dbs_mutex); > -+ if (input == dbs_tuners_ins.ignore_nice) { /* nothing to do */ > -+ mutex_unlock(&dbs_mutex); > -+ return count; > -+ } > -+ dbs_tuners_ins.ignore_nice = input; > -+ > -+ /* we need to re-evaluate prev_cpu_idle */ > -+ for_each_online_cpu(j) { > -+ struct cpu_dbs_info_s *dbs_info; > -+ dbs_info = &per_cpu(hp_cpu_dbs_info, j); > -+ dbs_info->prev_cpu_idle = get_cpu_idle_time(j, > -+ &dbs_info->prev_cpu_wall); > -+ if (dbs_tuners_ins.ignore_nice) > -+ dbs_info->prev_cpu_nice = kstat_cpu(j).cpustat.nice; > -+ > -+ } > -+ mutex_unlock(&dbs_mutex); > -+ > -+ return count; > -+} > -+ > -+static ssize_t store_io_is_busy(struct kobject *a, struct attribute *b, > -+ const char *buf, size_t count) > -+{ > -+ unsigned int input; > -+ int ret; > -+ > -+ ret = sscanf(buf, "%u", &input); > -+ if (ret != 1) > -+ return -EINVAL; > -+ > -+ mutex_lock(&dbs_mutex); > -+ dbs_tuners_ins.io_is_busy = !!input; > -+ mutex_unlock(&dbs_mutex); > -+ > -+ return count; > -+} > -+ > -+define_one_global_rw(sampling_rate); > -+define_one_global_rw(up_threshold); > -+define_one_global_rw(down_threshold); > -+define_one_global_rw(hotplug_in_sampling_periods); > -+define_one_global_rw(hotplug_out_sampling_periods); > -+define_one_global_rw(ignore_nice_load); > -+define_one_global_rw(io_is_busy); > -+ > -+static struct attribute *dbs_attributes[] = { > -+ &sampling_rate.attr, > -+ &up_threshold.attr, > -+ &down_threshold.attr, > -+ &hotplug_in_sampling_periods.attr, > -+ &hotplug_out_sampling_periods.attr, > -+ &ignore_nice_load.attr, > -+ &io_is_busy.attr, > -+ NULL > -+}; > -+ > -+static struct attribute_group dbs_attr_group = { > -+ .attrs = dbs_attributes, > -+ .name = "hotplug", > -+}; > -+ > -+/************************** sysfs end ************************/ > -+ > -+static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info) > -+{ > -+ /* combined load of all enabled CPUs */ > -+ unsigned int total_load = 0; > -+ /* single largest CPU load */ > -+ unsigned int max_load = 0; > -+ /* average load across all enabled CPUs */ > -+ unsigned int avg_load = 0; > -+ /* average load across multiple sampling periods for hotplug events */ > -+ unsigned int hotplug_in_avg_load = 0; > -+ unsigned int hotplug_out_avg_load = 0; > -+ /* number of sampling periods averaged for hotplug decisions */ > -+ unsigned int periods; > -+ > -+ struct cpufreq_policy *policy; > -+ unsigned int index = 0; > -+ unsigned int i, j; > -+ > -+ policy = this_dbs_info->cur_policy; > -+ > -+ /* > -+ * cpu load accounting > -+ * get highest load, total load and average load across all CPUs > -+ */ > -+ for_each_cpu(j, policy->cpus) { > -+ unsigned int load; > -+ unsigned int idle_time, wall_time; > -+ cputime64_t cur_wall_time, cur_idle_time; > -+ struct cpu_dbs_info_s *j_dbs_info; > -+ > -+ j_dbs_info = &per_cpu(hp_cpu_dbs_info, j); > -+ > -+ /* update both cur_idle_time and cur_wall_time */ > -+ cur_idle_time = get_cpu_idle_time(j, &cur_wall_time); > -+ > -+ /* how much wall time has passed since last iteration? */ > -+ wall_time = (unsigned int) cputime64_sub(cur_wall_time, > -+ j_dbs_info->prev_cpu_wall); > -+ j_dbs_info->prev_cpu_wall = cur_wall_time; > -+ > -+ /* how much idle time has passed since last iteration? */ > -+ idle_time = (unsigned int) cputime64_sub(cur_idle_time, > -+ j_dbs_info->prev_cpu_idle); > -+ j_dbs_info->prev_cpu_idle = cur_idle_time; > -+ > -+ if (unlikely(!wall_time || wall_time < idle_time)) > -+ continue; > -+ > -+ /* load is the percentage of time not spent in idle */ > -+ load = 100 * (wall_time - idle_time) / wall_time; > -+ > -+ /* keep track of combined load across all CPUs */ > -+ total_load += load; > -+ > -+ /* keep track of highest single load across all CPUs */ > -+ if (load > max_load) > -+ max_load = load; > -+ } > -+ > -+ /* calculate the average load across all related CPUs */ > -+ avg_load = total_load / num_online_cpus(); > -+ > -+ > -+ /* > -+ * hotplug load accounting > -+ * average load over multiple sampling periods > -+ */ > -+ > -+ /* how many sampling periods do we use for hotplug decisions? */ > -+ periods = max(dbs_tuners_ins.hotplug_in_sampling_periods, > -+ dbs_tuners_ins.hotplug_out_sampling_periods); > -+ > -+ /* store avg_load in the circular buffer */ > -+ > dbs_tuners_ins.hotplug_load_history[dbs_tuners_ins.hotplug_load_in > dex] > -+ = avg_load; > -+ > -+ /* compute average load across in & out sampling periods */ > -+ for (i = 0, j = dbs_tuners_ins.hotplug_load_index; > -+ i < periods; i++, j--) { > -+ if (i < dbs_tuners_ins.hotplug_in_sampling_periods) > -+ hotplug_in_avg_load += > -+ dbs_tuners_ins.hotplug_load_history[j]; > -+ if (i < dbs_tuners_ins.hotplug_out_sampling_periods) > -+ hotplug_out_avg_load += > -+ dbs_tuners_ins.hotplug_load_history[j]; > -+ > -+ if (j == 0) > -+ j = periods; > -+ } > -+ > -+ hotplug_in_avg_load = hotplug_in_avg_load / > -+ dbs_tuners_ins.hotplug_in_sampling_periods; > -+ > -+ hotplug_out_avg_load = hotplug_out_avg_load / > -+ dbs_tuners_ins.hotplug_out_sampling_periods; > -+ > -+ /* return to first element if we're at the circular buffer's end */ > -+ if (++dbs_tuners_ins.hotplug_load_index == periods) > -+ dbs_tuners_ins.hotplug_load_index = 0; > -+ > -+ /* check for frequency increase */ > -+ if (avg_load > dbs_tuners_ins.up_threshold) { > -+ /* should we enable auxillary CPUs? */ > -+ if (num_online_cpus() < 2 && hotplug_in_avg_load > > -+ dbs_tuners_ins.up_threshold) { > -+ /* hotplug with cpufreq is nasty > -+ * a call to cpufreq_governor_dbs may cause a lockup. > -+ * wq is not running here so its safe. > -+ */ > -+ mutex_unlock(&this_dbs_info->timer_mutex); > -+ cpu_up(1); > -+ mutex_lock(&this_dbs_info->timer_mutex); > -+ goto out; > -+ } > -+ > -+ /* increase to highest frequency supported */ > -+ if (policy->cur < policy->max) > -+ __cpufreq_driver_target(policy, policy->max, > -+ CPUFREQ_RELATION_H); > -+ > -+ goto out; > -+ } > -+ > -+ /* check for frequency decrease */ > -+ if (avg_load < dbs_tuners_ins.down_threshold) { > -+ /* are we at the minimum frequency already? */ > -+ if (policy->cur == policy->min) { > -+ /* should we disable auxillary CPUs? */ > -+ if (num_online_cpus() > 1 && hotplug_out_avg_load < > -+ dbs_tuners_ins.down_threshold) { > -+ mutex_unlock(&this_dbs_info->timer_mutex); > -+ cpu_down(1); > -+ mutex_lock(&this_dbs_info->timer_mutex); > -+ } > -+ goto out; > -+ } > -+ > -+ /* bump down to the next lowest frequency in the table */ > -+ if (cpufreq_frequency_table_next_lowest(policy, > -+ this_dbs_info->freq_table, &index)) { > -+ pr_err("%s: failed to get next lowest frequency\n", > -+ __func__); > -+ goto out; > -+ } > -+ > -+ __cpufreq_driver_target(policy, > -+ this_dbs_info->freq_table[index].frequency, > -+ CPUFREQ_RELATION_L); > -+ } > -+out: > -+ return; > -+} > -+ > -+static void do_dbs_timer(struct work_struct *work) > -+{ > -+ struct cpu_dbs_info_s *dbs_info = > -+ container_of(work, struct cpu_dbs_info_s, work.work); > -+ unsigned int cpu = dbs_info->cpu; > -+ > -+ /* We want all related CPUs to do sampling nearly on same jiffy */ > -+ int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); > -+ > -+ mutex_lock(&dbs_info->timer_mutex); > -+ dbs_check_cpu(dbs_info); > -+ queue_delayed_work_on(cpu, khotplug_wq, &dbs_info->work, delay); > -+ mutex_unlock(&dbs_info->timer_mutex); > -+} > -+ > -+static inline void dbs_timer_init(struct cpu_dbs_info_s *dbs_info) > -+{ > -+ /* We want all related CPUs to do sampling nearly on same jiffy */ > -+ int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); > -+ delay -= jiffies % delay; > -+ > -+ INIT_DELAYED_WORK_DEFERRABLE(&dbs_info->work, do_dbs_timer); > -+ queue_delayed_work_on(dbs_info->cpu, khotplug_wq, &dbs_info- > >work, > -+ delay); > -+} > -+ > -+static inline void dbs_timer_exit(struct cpu_dbs_info_s *dbs_info) > -+{ > -+ cancel_delayed_work_sync(&dbs_info->work); > -+} > -+ > -+static int cpufreq_governor_dbs(struct cpufreq_policy *policy, > -+ unsigned int event) > -+{ > -+ unsigned int cpu = policy->cpu; > -+ struct cpu_dbs_info_s *this_dbs_info; > -+ unsigned int i, j, max_periods; > -+ int rc; > -+ > -+ this_dbs_info = &per_cpu(hp_cpu_dbs_info, cpu); > -+ > -+ switch (event) { > -+ case CPUFREQ_GOV_START: > -+ if ((!cpu_online(cpu)) || (!policy->cur)) > -+ return -EINVAL; > -+ > -+ mutex_lock(&dbs_mutex); > -+ dbs_enable++; > -+ for_each_cpu(j, policy->cpus) { > -+ struct cpu_dbs_info_s *j_dbs_info; > -+ j_dbs_info = &per_cpu(hp_cpu_dbs_info, j); > -+ j_dbs_info->cur_policy = policy; > -+ > -+ j_dbs_info->prev_cpu_idle = get_cpu_idle_time(j, > -+ &j_dbs_info- > >prev_cpu_wall); > -+ if (dbs_tuners_ins.ignore_nice) { > -+ j_dbs_info->prev_cpu_nice = > -+ kstat_cpu(j).cpustat.nice; > -+ } > -+ > -+ max_periods = > max(DEFAULT_HOTPLUG_IN_SAMPLING_PERIODS, > -+ > DEFAULT_HOTPLUG_OUT_SAMPLING_PERIODS); > -+ dbs_tuners_ins.hotplug_load_history = kmalloc( > -+ (sizeof(unsigned int) * max_periods), > -+ GFP_KERNEL); > -+ if (!dbs_tuners_ins.hotplug_load_history) { > -+ WARN_ON(1); > -+ return -ENOMEM; > -+ } > -+ for (i = 0; i < max_periods; i++) > -+ dbs_tuners_ins.hotplug_load_history[i] = 50; > -+ } > -+ this_dbs_info->cpu = cpu; > -+ this_dbs_info->freq_table = > cpufreq_frequency_get_table(cpu); > -+ /* > -+ * Start the timerschedule work, when this governor > -+ * is used for first time > -+ */ > -+ if (dbs_enable == 1) { > -+ rc = sysfs_create_group(cpufreq_global_kobject, > -+ &dbs_attr_group); > -+ if (rc) { > -+ mutex_unlock(&dbs_mutex); > -+ return rc; > -+ } > -+ } > -+ mutex_unlock(&dbs_mutex); > -+ > -+ mutex_init(&this_dbs_info->timer_mutex); > -+ dbs_timer_init(this_dbs_info); > -+ break; > -+ > -+ case CPUFREQ_GOV_STOP: > -+ dbs_timer_exit(this_dbs_info); > -+ > -+ mutex_lock(&dbs_mutex); > -+ mutex_destroy(&this_dbs_info->timer_mutex); > -+ dbs_enable--; > -+ mutex_unlock(&dbs_mutex); > -+ if (!dbs_enable) > -+ sysfs_remove_group(cpufreq_global_kobject, > -+ &dbs_attr_group); > -+ kfree(dbs_tuners_ins.hotplug_load_history); > -+ /* > -+ * XXX BIG CAVEAT: Stopping the governor with CPU1 offline > -+ * will result in it remaining offline until the user onlines > -+ * it again. It is up to the user to do this (for now). > -+ */ > -+ break; > -+ > -+ case CPUFREQ_GOV_LIMITS: > -+ mutex_lock(&this_dbs_info->timer_mutex); > -+ if (policy->max < this_dbs_info->cur_policy->cur) > -+ __cpufreq_driver_target(this_dbs_info->cur_policy, > -+ policy->max, CPUFREQ_RELATION_H); > -+ else if (policy->min > this_dbs_info->cur_policy->cur) > -+ __cpufreq_driver_target(this_dbs_info->cur_policy, > -+ policy->min, CPUFREQ_RELATION_L); > -+ mutex_unlock(&this_dbs_info->timer_mutex); > -+ break; > -+ } > -+ return 0; > -+} > -+ > -+static int __init cpufreq_gov_dbs_init(void) > -+{ > -+ int err; > -+ cputime64_t wall; > -+ u64 idle_time; > -+ int cpu = get_cpu(); > -+ > -+ idle_time = get_cpu_idle_time_us(cpu, &wall); > -+ put_cpu(); > -+ if (idle_time != -1ULL) { > -+ dbs_tuners_ins.up_threshold = > DEFAULT_UP_FREQ_MIN_LOAD; > -+ } else { > -+ pr_err("cpufreq-hotplug: %s: assumes CONFIG_NO_HZ\n", > -+ __func__); > -+ return -EINVAL; > -+ } > -+ > -+ khotplug_wq = create_workqueue("khotplug"); > -+ if (!khotplug_wq) { > -+ pr_err("Creation of khotplug failed\n"); > -+ return -EFAULT; > -+ } > -+ err = cpufreq_register_governor(&cpufreq_gov_hotplug); > -+ if (err) > -+ destroy_workqueue(khotplug_wq); > -+ > -+ return err; > -+} > -+ > -+static void __exit cpufreq_gov_dbs_exit(void) > -+{ > -+ cpufreq_unregister_governor(&cpufreq_gov_hotplug); > -+ destroy_workqueue(khotplug_wq); > -+} > -+ > -+MODULE_AUTHOR("Mike Turquette <mturquette@ti.com>"); > -+MODULE_DESCRIPTION("'cpufreq_hotplug' - cpufreq governor for dynamic > frequency scaling and CPU hotplugging"); > -+MODULE_LICENSE("GPL"); > -+ > -+#ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG > -+fs_initcall(cpufreq_gov_dbs_init); > -+#else > -+module_init(cpufreq_gov_dbs_init); > -+#endif > -+module_exit(cpufreq_gov_dbs_exit); > -diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h > -index a38fca8..6cbc3df 100644 > ---- a/include/linux/cpufreq.h > -+++ b/include/linux/cpufreq.h > -@@ -355,6 +355,9 @@ extern struct cpufreq_governor > cpufreq_gov_ondemand; > - #elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE) > - extern struct cpufreq_governor cpufreq_gov_conservative; > - #define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_conservative) > -+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG) > -+extern struct cpufreq_governor cpufreq_gov_hotplug; > -+#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_hotplug) > - #endif > - > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0001-OMAP-CPUfreq-ensure-driver-initializes-after- > cpufreq.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0001-OMAP-CPUfreq-ensure-driver-initializes-after- > cpufreq.patch > deleted file mode 100644 > index d150dfc..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0001-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch > +++ /dev/null > @@ -1,27 +0,0 @@ > -From 33668b07abd5e66a263cc8b4b88587646f38bed0 Mon Sep 17 00:00:00 > 2001 > -From: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> > -Date: Wed, 11 Aug 2010 17:02:43 -0700 > -Subject: [PATCH 1/8] OMAP: CPUfreq: ensure driver initializes after cpufreq > framework and governors > - > -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > ---- > - arch/arm/plat-omap/cpu-omap.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index da4f68d..cd09d4b 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -160,7 +160,7 @@ static int __init omap_cpufreq_init(void) > - return cpufreq_register_driver(&omap_driver); > - } > - > --arch_initcall(omap_cpufreq_init); > -+late_initcall(omap_cpufreq_init); > - > - /* > - * if ever we want to remove this, upon cleanup call: > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0002-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0002-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch > deleted file mode 100644 > index d62e04d..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0002-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch > +++ /dev/null > @@ -1,31 +0,0 @@ > -From e89b1544450fb8410a44004e48d6b330bc39f0ce Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@deeprootsystems.com> > -Date: Wed, 11 Aug 2010 17:05:38 -0700 > -Subject: [PATCH 2/8] OMAP: CPUfreq: ensure policy is fully initialized > - > -Ensure policy min/max/cur values are initialized when OMAP > -CPUfreq driver starts. > - > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > ---- > - arch/arm/plat-omap/cpu-omap.c | 4 ++++ > - 1 files changed, 4 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index cd09d4b..1b36664 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -126,6 +126,10 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - VERY_HI_RATE) / > 1000; > - } > - > -+ policy->min = policy->cpuinfo.min_freq; > -+ policy->max = policy->cpuinfo.max_freq; > -+ policy->cur = omap_getspeed(0); > -+ > - /* FIXME: what's the actual transition time? */ > - policy->cpuinfo.transition_latency = 300 * 1000; > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch > deleted file mode 100644 > index fbe1621..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0003-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch > +++ /dev/null > @@ -1,263 +0,0 @@ > -From 948b868e4a83b054e8a58362238bc6cd61c0aeab Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Mon, 10 Nov 2008 17:00:25 +0530 > -Subject: [PATCH 3/8] OMAP3 PM: CPUFreq driver for OMAP3 > - > -CPUFreq driver for OMAP3 > - > -With additional fixes and cleanups from Tero Kristo: > -- Fix rate calculation bug in omap3_select_table_rate > -- Refreshed DVFS VDD1 control against latest clock fw > - > -Signed-off-by: Tero Kristo <tero.kristo@nokia.com> > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > - > -OMAP3: PM: CPUFreq: Fix omap_getspeed. > - > -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> > - > -Make sure omap cpufreq driver initializes after cpufreq framework and > governors > - > -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> > - > -merge: CPUFreq: remove obsolete funcs > - > -OMAP3 clock: Update cpufreq driver > - > -This patch removes all refrences to virtual clock > -nodes in CPUFreq driver. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Tero Kristo <tero.kristo@nokia.com> > -Signed-off-by: Jean Pihet <jpihet@mvista.com> > - > -PM: Prevent direct cpufreq scaling during initialization > - > -It is seen that the OMAP specific cpufreq initialization code tries to > -scale the MPU frequency to the highest possible without taking care of > -the voltage level. On power on reset the power IC does not provide the > -necessary voltage for the highest available MPU frequency (that would > -satisfy all Si families). This potentially is an window of opportunity > -for things to go wrong. > - > -Signed-off-by: Romit Dasgupta <romit@ti.com> > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > - > -OMAP3: PM: enable 600MHz (overdrive) OPP > - > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > - > -omap3: introduce cpufreq > - > -OMAP OPP layer functions now have dependencies of CONFIG_CPU_FREQ > only. > - > -With this patch, omap opp layer now has its compilation flags > -bound to CONFIG_CPU_FREQ. Also its code has been removed from pm34xx.c. > - > -A new file has been created to contain cpu freq code related to > -OMAP3: cpufreq34xx.c > - > -OMAP34xx and OMAP36xx family OPPs are made available > - > -Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > -Signed-off-by: Romit Dasgupta <romit@ti.com> > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > - > -omap3: cpufreq: allow default opp table init > - > -For board files which choose to override the defaults, the existing > -mechanism will work, for boards that would like to work with defaults, > -allow init_common_hw to call init_opp_table to initialize if not > -already initialized. this will allow all omap boards which have opp > -tables predefined for a silicon to use the same. > - > -Originally reported for overo: > -http://marc.info/?t=127265269400004&r=1&w=2 > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Reported-by: Peter Tseng <tsenpet09@gmail.com> > -Cc: Cliff Brake <cliff.brake@gmail.com> > -Cc: Kevin Hilman <khilman@deeprootsystems.com> > - > -OMAP2: update OPP data to be device based > - > -Cc: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > - > -OMAP3: CPUfreq: update to device-based OPP API > - > -Update usage of OPP API to use new device-based API. This requires > -getting the 'struct device' for the MPU and using that with the OPP > -API. > - > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > - > -omap3: opp: make independent of cpufreq > - > -Make opp3xx data which is registered with the opp layer > -dependent purely on CONFIG_PM as opp layer and pm.c users > -are CONFIG_PM dependent not cpufreq dependent. > -so we rename the data definition to opp3xxx_data.c (inline with what > -we have for omap2), also move the build definition to be under > -the existing CONFIG_PM build instead of CPUFREQ. > - > -Cc: Eduardo Valentin <eduardo.valentin@nokia.com> > -Cc: Kevin Hilman <khilman@deeprootsystems.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Cc: Sanjeev Premi <premi@ti.com> > -Cc: Thara Gopinath <thara@ti.com> > -Cc: Tony Lindgren <tony@atomide.com> > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > ---- > - arch/arm/mach-omap2/clock.h | 14 +++++++++++++- > - arch/arm/mach-omap2/clock34xx.c | 2 ++ > - arch/arm/plat-omap/cpu-omap.c | 34 > +++++++++++++++++++++++++++++++--- > - 3 files changed, 46 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h > -index e10ff2b..0a07e50 100644 > ---- a/arch/arm/mach-omap2/clock.h > -+++ b/arch/arm/mach-omap2/clock.h > -@@ -141,7 +141,9 @@ extern const struct clksel_rate gpt_sys_rates[]; > - extern const struct clksel_rate gfx_l3_rates[]; > - extern const struct clksel_rate dsp_ick_rates[]; > - > --#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) > -+#ifdef CONFIG_CPU_FREQ > -+ > -+#ifdef CONFIG_ARCH_OMAP2 > - extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table > **table); > - extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table > **table); > - #else > -@@ -149,6 +151,16 @@ extern void omap2_clk_exit_cpufreq_table(struct > cpufreq_frequency_table **table) > - #define omap2_clk_exit_cpufreq_table 0 > - #endif > - > -+#ifdef CONFIG_ARCH_OMAP3 > -+extern void omap3_clk_init_cpufreq_table(struct cpufreq_frequency_table > **table); > -+extern void omap3_clk_exit_cpufreq_table(struct cpufreq_frequency_table > **table); > -+#else > -+#define omap3_clk_init_cpufreq_table 0 > -+#define omap3_clk_exit_cpufreq_table 0 > -+#endif > -+ > -+#endif /* CONFIG_CPU_FREQ */ > -+ > - extern const struct clkops clkops_omap2_iclk_dflt_wait; > - extern const struct clkops clkops_omap2_iclk_dflt; > - extern const struct clkops clkops_omap2_iclk_idle_only; > -diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach- > omap2/clock34xx.c > -index 1fc96b9..119e135 100644 > ---- a/arch/arm/mach-omap2/clock34xx.c > -+++ b/arch/arm/mach-omap2/clock34xx.c > -@@ -20,6 +20,8 @@ > - #include <linux/kernel.h> > - #include <linux/clk.h> > - #include <linux/io.h> > -+#include <linux/err.h> > -+#include <linux/cpufreq.h> > - > - #include <plat/clock.h> > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index 1b36664..f0f9430 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -8,6 +8,10 @@ > - * > - * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King > - * > -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. > -+ * Updated to support OMAP3 > -+ * Rajendra Nayak <rnayak@ti.com> > -+ * > - * This program is free software; you can redistribute it and/or modify > - * it under the terms of the GNU General Public License version 2 as > - * published by the Free Software Foundation. > -@@ -26,12 +30,19 @@ > - #include <plat/clock.h> > - #include <asm/system.h> > - > -+#if defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -+#include <plat/omap-pm.h> > -+#include <plat/opp.h> > -+#endif > -+ > - #define VERY_HI_RATE 900000000 > - > - static struct cpufreq_frequency_table *freq_table; > - > - #ifdef CONFIG_ARCH_OMAP1 > - #define MPU_CLK "mpu" > -+#elif CONFIG_ARCH_OMAP3 > -+#define MPU_CLK "arm_fck" > - #else > - #define MPU_CLK "virt_prcm_set" > - #endif > -@@ -73,7 +84,13 @@ static int omap_target(struct cpufreq_policy *policy, > - unsigned int target_freq, > - unsigned int relation) > - { > -+#ifdef CONFIG_ARCH_OMAP1 > - struct cpufreq_freqs freqs; > -+#endif > -+#if defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -+ unsigned long freq; > -+ struct device *mpu_dev = omap2_get_mpuss_device(); > -+#endif > - int ret = 0; > - > - /* Ensure desired rate is within allowed range. Some govenors > -@@ -83,13 +100,13 @@ static int omap_target(struct cpufreq_policy *policy, > - if (target_freq > policy->max) > - target_freq = policy->max; > - > -+#ifdef CONFIG_ARCH_OMAP1 > - freqs.old = omap_getspeed(0); > - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > - freqs.cpu = 0; > - > - if (freqs.old == freqs.new) > - return ret; > -- > - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > - #ifdef CONFIG_CPU_FREQ_DEBUG > - printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", > -@@ -97,7 +114,11 @@ static int omap_target(struct cpufreq_policy *policy, > - #endif > - ret = clk_set_rate(mpu_clk, freqs.new * 1000); > - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -- > -+#elif defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -+ freq = target_freq * 1000; > -+ if (opp_find_freq_ceil(mpu_dev, &freq)) > -+ omap_pm_cpu_set_freq(freq); > -+#endif > - return ret; > - } > - > -@@ -114,7 +135,14 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - > - policy->cur = policy->min = policy->max = omap_getspeed(0); > - > -- clk_init_cpufreq_table(&freq_table); > -+ if (!cpu_is_omap34xx()) { > -+ clk_init_cpufreq_table(&freq_table); > -+ } else { > -+ struct device *mpu_dev = omap2_get_mpuss_device(); > -+ > -+ opp_init_cpufreq_table(mpu_dev, &freq_table); > -+ } > -+ > - if (freq_table) { > - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > - if (!result) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0004-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0004-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch > deleted file mode 100644 > index 36742e4..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0004-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch > +++ /dev/null > @@ -1,32 +0,0 @@ > -From 86227f1eb341e571163464cb0a412ed2179f2541 Mon Sep 17 00:00:00 > 2001 > -From: Silesh C V <silesh@ti.com> > -Date: Wed, 29 Sep 2010 14:52:54 +0530 > -Subject: [PATCH 4/8] OMAP: PM: CPUFREQ: Fix conditional compilation > - > -Fix conditional compilation. A conditional expresiion > -should follow "#elif", in this case #elif clause should > -check whether CONFIG_ARCH_OMAP3 is defined or not > -(ie. defined(CONFIG_ARCH_OMAP3)) rather than checking for > -the value of the macro. > - > -Signed-off-by: Silesh C V <silesh@ti.com> > ---- > - arch/arm/plat-omap/cpu-omap.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index f0f9430..c3ac065 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -41,7 +41,7 @@ static struct cpufreq_frequency_table *freq_table; > - > - #ifdef CONFIG_ARCH_OMAP1 > - #define MPU_CLK "mpu" > --#elif CONFIG_ARCH_OMAP3 > -+#elif defined(CONFIG_ARCH_OMAP3) > - #define MPU_CLK "arm_fck" > - #else > - #define MPU_CLK "virt_prcm_set" > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0005-cpufreq-fixup-after-new-OPP-layer-merged.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0005-cpufreq-fixup-after-new-OPP-layer-merged.patch > deleted file mode 100644 > index 7cf6932..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0005-cpufreq-fixup-after-new-OPP-layer-merged.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From 4764137dd613362656726a15cb8184724aeb99bb Mon Sep 17 > 00:00:00 2001 > -From: Kevin Hilman <khilman@deeprootsystems.com> > -Date: Tue, 16 Nov 2010 11:48:41 -0800 > -Subject: [PATCH 5/8] cpufreq: fixup after new OPP layer merged > - > ---- > - arch/arm/plat-omap/cpu-omap.c | 3 ++- > - 1 files changed, 2 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index c3ac065..9cd2709 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -25,6 +25,7 @@ > - #include <linux/err.h> > - #include <linux/clk.h> > - #include <linux/io.h> > -+#include <linux/opp.h> > - > - #include <mach/hardware.h> > - #include <plat/clock.h> > -@@ -32,7 +33,7 @@ > - > - #if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) > - #include <plat/omap-pm.h> > --#include <plat/opp.h> > -+#include <plat/common.h> > - #endif > - > - #define VERY_HI_RATE 900000000 > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0006-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS- > CPUfreq-drive.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0006-OMAP-cpufreq-Split-OMAP1-and- > OMAP2PLUS-CPUfreq-drive.patch > deleted file mode 100644 > index cfc257e..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0006-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq- > drive.patch > +++ /dev/null > @@ -1,669 +0,0 @@ > -From e16548716c5cbc3c9885d05f1654d83d5411a3a7 Mon Sep 17 00:00:00 > 2001 > -From: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Date: Mon, 14 Mar 2011 17:08:48 +0530 > -Subject: [PATCH 6/8] OMAP: cpufreq: Split OMAP1 and OMAP2PLUS CPUfreq > drivers. > - > -This patch is an attempt to cleanup the #ifdeferry in the > -omap CPUfreq drivers. > - > -The split betwenn OMAP1 and OMAP2PLUS is logical because > - - OMAP1 doesn't support opp layer. > - - OMAP1 build is seperate from omap2plus. > - > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Cc: Kevin Hilman <khilman@ti.com> > -Cc: Vishwanath BS <vishwanath.bs@ti.com> > ---- > - arch/arm/mach-omap1/Makefile | 3 + > - arch/arm/mach-omap1/omap1-cpufreq.c | 176 > ++++++++++++++++++++++++++ > - arch/arm/mach-omap2/Makefile | 3 + > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 201 > ++++++++++++++++++++++++++++++ > - arch/arm/plat-omap/Makefile | 1 - > - arch/arm/plat-omap/cpu-omap.c | 204 ------------------------------- > - 6 files changed, 383 insertions(+), 205 deletions(-) > - create mode 100644 arch/arm/mach-omap1/omap1-cpufreq.c > - create mode 100644 arch/arm/mach-omap2/omap2plus-cpufreq.c > - delete mode 100644 arch/arm/plat-omap/cpu-omap.c > - > -diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach- > omap1/Makefile > -index af98117..e5082b0 100644 > ---- a/arch/arm/mach-omap1/Makefile > -+++ b/arch/arm/mach-omap1/Makefile > -@@ -10,6 +10,9 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o > - > - obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o > - > -+# CPUFREQ driver > -+obj-$(CONFIG_CPU_FREQ) += omap1-cpufreq.o > -+ > - # Power Management > - obj-$(CONFIG_PM) += pm.o sleep.o pm_bus.o > - > -diff --git a/arch/arm/mach-omap1/omap1-cpufreq.c b/arch/arm/mach- > omap1/omap1-cpufreq.c > -new file mode 100644 > -index 0000000..682cdc8 > ---- /dev/null > -+++ b/arch/arm/mach-omap1/omap1-cpufreq.c > -@@ -0,0 +1,176 @@ > -+/* > -+ * OMAP1 cpufreq driver > -+ * > -+ * CPU frequency scaling for OMAP > -+ * > -+ * Copyright (C) 2005 Nokia Corporation > -+ * Written by Tony Lindgren <tony@atomide.com> > -+ * > -+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King > -+ * > -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. > -+ * Updated to support OMAP3 > -+ * Rajendra Nayak <rnayak@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+#include <linux/types.h> > -+#include <linux/kernel.h> > -+#include <linux/sched.h> > -+#include <linux/cpufreq.h> > -+#include <linux/delay.h> > -+#include <linux/init.h> > -+#include <linux/err.h> > -+#include <linux/clk.h> > -+#include <linux/io.h> > -+#include <linux/opp.h> > -+ > -+#include <asm/system.h> > -+ > -+#include <plat/clock.h> > -+#include <plat/omap-pm.h> > -+ > -+#include <mach/hardware.h> > -+ > -+#define VERY_HI_RATE 900000000 > -+ > -+static struct cpufreq_frequency_table *freq_table; > -+static struct clk *mpu_clk; > -+ > -+static int omap_verify_speed(struct cpufreq_policy *policy) > -+{ > -+ if (freq_table) > -+ return cpufreq_frequency_table_verify(policy, freq_table); > -+ > -+ if (policy->cpu) > -+ return -EINVAL; > -+ > -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -+ policy->cpuinfo.max_freq); > -+ > -+ policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; > -+ policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; > -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -+ policy->cpuinfo.max_freq); > -+ return 0; > -+} > -+ > -+static unsigned int omap_getspeed(unsigned int cpu) > -+{ > -+ unsigned long rate; > -+ > -+ if (cpu) > -+ return 0; > -+ > -+ rate = clk_get_rate(mpu_clk) / 1000; > -+ return rate; > -+} > -+ > -+static int omap_target(struct cpufreq_policy *policy, > -+ unsigned int target_freq, > -+ unsigned int relation) > -+{ > -+ struct cpufreq_freqs freqs; > -+ int ret = 0; > -+ > -+ /* Ensure desired rate is within allowed range. Some govenors > -+ * (ondemand) will just pass target_freq=0 to get the minimum. */ > -+ if (target_freq < policy->min) > -+ target_freq = policy->min; > -+ if (target_freq > policy->max) > -+ target_freq = policy->max; > -+ > -+ freqs.old = omap_getspeed(0); > -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > -+ freqs.cpu = 0; > -+ > -+ if (freqs.old == freqs.new) > -+ return ret; > -+ > -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ > -+#ifdef CONFIG_CPU_FREQ_DEBUG > -+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); > -+#endif > -+ ret = clk_set_rate(mpu_clk, freqs.new * 1000); > -+ > -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+ > -+ return ret; > -+} > -+ > -+static int __init omap_cpu_init(struct cpufreq_policy *policy) > -+{ > -+ int result = 0; > -+ > -+ mpu_clk = clk_get(NULL, "mpu"); > -+ if (IS_ERR(mpu_clk)) > -+ return PTR_ERR(mpu_clk); > -+ > -+ if (policy->cpu != 0) > -+ return -EINVAL; > -+ > -+ policy->cur = policy->min = policy->max = omap_getspeed(0); > -+ > -+ clk_init_cpufreq_table(&freq_table); > -+ > -+ if (freq_table) { > -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -+ if (!result) > -+ cpufreq_frequency_table_get_attr(freq_table, > -+ policy->cpu); > -+ } else { > -+ policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > -+ policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, > -+ VERY_HI_RATE) / > 1000; > -+ } > -+ > -+ policy->min = policy->cpuinfo.min_freq; > -+ policy->max = policy->cpuinfo.max_freq; > -+ policy->cur = omap_getspeed(0); > -+ > -+ /* FIXME: what's the actual transition time? */ > -+ policy->cpuinfo.transition_latency = 300 * 1000; > -+ > -+ return 0; > -+} > -+ > -+static int omap_cpu_exit(struct cpufreq_policy *policy) > -+{ > -+ clk_exit_cpufreq_table(&freq_table); > -+ clk_put(mpu_clk); > -+ return 0; > -+} > -+ > -+static struct freq_attr *omap_cpufreq_attr[] = { > -+ &cpufreq_freq_attr_scaling_available_freqs, > -+ NULL, > -+}; > -+ > -+static struct cpufreq_driver omap_driver = { > -+ .flags = CPUFREQ_STICKY, > -+ .verify = omap_verify_speed, > -+ .target = omap_target, > -+ .get = omap_getspeed, > -+ .init = omap_cpu_init, > -+ .exit = omap_cpu_exit, > -+ .name = "omap1", > -+ .attr = omap_cpufreq_attr, > -+}; > -+ > -+static int __init omap_cpufreq_init(void) > -+{ > -+ return cpufreq_register_driver(&omap_driver); > -+} > -+ > -+static void __exit omap_cpufreq_exit(void) > -+{ > -+ cpufreq_unregister_driver(&omap_driver); > -+} > -+ > -+MODULE_DESCRIPTION("cpufreq driver for OMAP1 SOCs"); > -+MODULE_LICENSE("GPL"); > -+module_init(omap_cpufreq_init); > -+module_exit(omap_cpufreq_exit); > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index 05cd983..e9c2445 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -56,6 +56,9 @@ obj-$(CONFIG_ARCH_OMAP3) += > opp3xxx_data.o > - obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o > - endif > - > -+# CPUFREQ driver > -+obj-$(CONFIG_CPU_FREQ) += omap2plus-cpufreq.o > -+ > - # Power Management > - ifeq ($(CONFIG_PM),y) > - obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -new file mode 100644 > -index 0000000..14f84cc > ---- /dev/null > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -0,0 +1,201 @@ > -+/* > -+ * OMAP2PLUS cpufreq driver > -+ * > -+ * CPU frequency scaling for OMAP > -+ * > -+ * Copyright (C) 2005 Nokia Corporation > -+ * Written by Tony Lindgren <tony@atomide.com> > -+ * > -+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King > -+ * > -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. > -+ * Updated to support OMAP3 > -+ * Rajendra Nayak <rnayak@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+#include <linux/types.h> > -+#include <linux/kernel.h> > -+#include <linux/sched.h> > -+#include <linux/cpufreq.h> > -+#include <linux/delay.h> > -+#include <linux/init.h> > -+#include <linux/err.h> > -+#include <linux/clk.h> > -+#include <linux/io.h> > -+#include <linux/opp.h> > -+ > -+#include <asm/system.h> > -+#include <asm/smp_plat.h> > -+ > -+#include <plat/clock.h> > -+#include <plat/omap-pm.h> > -+#include <plat/common.h> > -+ > -+#include <mach/hardware.h> > -+ > -+#define VERY_HI_RATE 900000000 > -+ > -+static struct cpufreq_frequency_table *freq_table; > -+static struct clk *mpu_clk; > -+ > -+static int omap_verify_speed(struct cpufreq_policy *policy) > -+{ > -+ if (freq_table) > -+ return cpufreq_frequency_table_verify(policy, freq_table); > -+ > -+ if (policy->cpu) > -+ return -EINVAL; > -+ > -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -+ policy->cpuinfo.max_freq); > -+ > -+ policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; > -+ policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; > -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -+ policy->cpuinfo.max_freq); > -+ return 0; > -+} > -+ > -+static unsigned int omap_getspeed(unsigned int cpu) > -+{ > -+ unsigned long rate; > -+ > -+ if (cpu) > -+ return 0; > -+ > -+ rate = clk_get_rate(mpu_clk) / 1000; > -+ return rate; > -+} > -+ > -+static int omap_target(struct cpufreq_policy *policy, > -+ unsigned int target_freq, > -+ unsigned int relation) > -+{ > -+ int ret = 0; > -+ struct cpufreq_freqs freqs; > -+ > -+ /* Ensure desired rate is within allowed range. Some govenors > -+ * (ondemand) will just pass target_freq=0 to get the minimum. */ > -+ if (target_freq < policy->min) > -+ target_freq = policy->min; > -+ if (target_freq > policy->max) > -+ target_freq = policy->max; > -+ > -+ freqs.old = omap_getspeed(0); > -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > -+ freqs.cpu = 0; > -+ > -+ if (freqs.old == freqs.new) > -+ return ret; > -+ > -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ > -+#ifdef CONFIG_CPU_FREQ_DEBUG > -+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); > -+#endif > -+ > -+ ret = clk_set_rate(mpu_clk, freqs.new * 1000); > -+ > -+ /* > -+ * Generic CPUFREQ driver jiffy update is under !SMP. So jiffies > -+ * won't get updated when UP machine cpufreq build with > -+ * CONFIG_SMP enabled. Below code is added only to manage that > -+ * scenario > -+ */ > -+ if (!is_smp()) > -+ loops_per_jiffy = > -+ cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); > -+ > -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+ > -+ return ret; > -+} > -+ > -+static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) > -+{ > -+ int result = 0; > -+ struct device *mpu_dev; > -+ > -+ if (cpu_is_omap24xx()) > -+ mpu_clk = clk_get(NULL, "virt_prcm_set"); > -+ else if (cpu_is_omap34xx()) > -+ mpu_clk = clk_get(NULL, "dpll1_ck"); > -+ else if (cpu_is_omap34xx()) > -+ mpu_clk = clk_get(NULL, "dpll_mpu_ck"); > -+ > -+ if (IS_ERR(mpu_clk)) > -+ return PTR_ERR(mpu_clk); > -+ > -+ if (policy->cpu != 0) > -+ return -EINVAL; > -+ > -+ policy->cur = policy->min = policy->max = omap_getspeed(0); > -+ > -+ mpu_dev = omap2_get_mpuss_device(); > -+ if (!mpu_dev) { > -+ pr_warning("%s: unable to get the mpu device\n", __func__); > -+ return -EINVAL; > -+ } > -+ opp_init_cpufreq_table(mpu_dev, &freq_table); > -+ > -+ if (freq_table) { > -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -+ if (!result) > -+ cpufreq_frequency_table_get_attr(freq_table, > -+ policy->cpu); > -+ } else { > -+ policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > -+ policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, > -+ VERY_HI_RATE) / > 1000; > -+ } > -+ > -+ policy->min = policy->cpuinfo.min_freq; > -+ policy->max = policy->cpuinfo.max_freq; > -+ policy->cur = omap_getspeed(0); > -+ > -+ /* FIXME: what's the actual transition time? */ > -+ policy->cpuinfo.transition_latency = 300 * 1000; > -+ > -+ return 0; > -+} > -+ > -+static int omap_cpu_exit(struct cpufreq_policy *policy) > -+{ > -+ clk_exit_cpufreq_table(&freq_table); > -+ clk_put(mpu_clk); > -+ return 0; > -+} > -+ > -+static struct freq_attr *omap_cpufreq_attr[] = { > -+ &cpufreq_freq_attr_scaling_available_freqs, > -+ NULL, > -+}; > -+ > -+static struct cpufreq_driver omap_driver = { > -+ .flags = CPUFREQ_STICKY, > -+ .verify = omap_verify_speed, > -+ .target = omap_target, > -+ .get = omap_getspeed, > -+ .init = omap_cpu_init, > -+ .exit = omap_cpu_exit, > -+ .name = "omap2plus", > -+ .attr = omap_cpufreq_attr, > -+}; > -+ > -+static int __init omap_cpufreq_init(void) > -+{ > -+ return cpufreq_register_driver(&omap_driver); > -+} > -+ > -+static void __exit omap_cpufreq_exit(void) > -+{ > -+ cpufreq_unregister_driver(&omap_driver); > -+} > -+ > -+MODULE_DESCRIPTION("cpufreq driver for OMAP2PLUS SOCs"); > -+MODULE_LICENSE("GPL"); > -+module_init(omap_cpufreq_init); > -+module_exit(omap_cpufreq_exit); > -diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile > -index a4a1285..ec7862e 100644 > ---- a/arch/arm/plat-omap/Makefile > -+++ b/arch/arm/plat-omap/Makefile > -@@ -21,7 +21,6 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o > - obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o > - obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o > - > --obj-$(CONFIG_CPU_FREQ) += cpu-omap.o > - obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o > - obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o > - obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -deleted file mode 100644 > -index 9cd2709..0000000 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ /dev/null > -@@ -1,204 +0,0 @@ > --/* > -- * linux/arch/arm/plat-omap/cpu-omap.c > -- * > -- * CPU frequency scaling for OMAP > -- * > -- * Copyright (C) 2005 Nokia Corporation > -- * Written by Tony Lindgren <tony@atomide.com> > -- * > -- * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King > -- * > -- * Copyright (C) 2007-2008 Texas Instruments, Inc. > -- * Updated to support OMAP3 > -- * Rajendra Nayak <rnayak@ti.com> > -- * > -- * This program is free software; you can redistribute it and/or modify > -- * it under the terms of the GNU General Public License version 2 as > -- * published by the Free Software Foundation. > -- */ > --#include <linux/types.h> > --#include <linux/kernel.h> > --#include <linux/sched.h> > --#include <linux/cpufreq.h> > --#include <linux/delay.h> > --#include <linux/init.h> > --#include <linux/err.h> > --#include <linux/clk.h> > --#include <linux/io.h> > --#include <linux/opp.h> > -- > --#include <mach/hardware.h> > --#include <plat/clock.h> > --#include <asm/system.h> > -- > --#if defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > --#include <plat/omap-pm.h> > --#include <plat/common.h> > --#endif > -- > --#define VERY_HI_RATE 900000000 > -- > --static struct cpufreq_frequency_table *freq_table; > -- > --#ifdef CONFIG_ARCH_OMAP1 > --#define MPU_CLK "mpu" > --#elif defined(CONFIG_ARCH_OMAP3) > --#define MPU_CLK "arm_fck" > --#else > --#define MPU_CLK "virt_prcm_set" > --#endif > -- > --static struct clk *mpu_clk; > -- > --/* TODO: Add support for SDRAM timing changes */ > -- > --static int omap_verify_speed(struct cpufreq_policy *policy) > --{ > -- if (freq_table) > -- return cpufreq_frequency_table_verify(policy, freq_table); > -- > -- if (policy->cpu) > -- return -EINVAL; > -- > -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -- policy->cpuinfo.max_freq); > -- > -- policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; > -- policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; > -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -- policy->cpuinfo.max_freq); > -- return 0; > --} > -- > --static unsigned int omap_getspeed(unsigned int cpu) > --{ > -- unsigned long rate; > -- > -- if (cpu) > -- return 0; > -- > -- rate = clk_get_rate(mpu_clk) / 1000; > -- return rate; > --} > -- > --static int omap_target(struct cpufreq_policy *policy, > -- unsigned int target_freq, > -- unsigned int relation) > --{ > --#ifdef CONFIG_ARCH_OMAP1 > -- struct cpufreq_freqs freqs; > --#endif > --#if defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -- unsigned long freq; > -- struct device *mpu_dev = omap2_get_mpuss_device(); > --#endif > -- int ret = 0; > -- > -- /* Ensure desired rate is within allowed range. Some govenors > -- * (ondemand) will just pass target_freq=0 to get the minimum. */ > -- if (target_freq < policy->min) > -- target_freq = policy->min; > -- if (target_freq > policy->max) > -- target_freq = policy->max; > -- > --#ifdef CONFIG_ARCH_OMAP1 > -- freqs.old = omap_getspeed(0); > -- freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > -- freqs.cpu = 0; > -- > -- if (freqs.old == freqs.new) > -- return ret; > -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > --#ifdef CONFIG_CPU_FREQ_DEBUG > -- printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", > -- freqs.old, freqs.new); > --#endif > -- ret = clk_set_rate(mpu_clk, freqs.new * 1000); > -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > --#elif defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -- freq = target_freq * 1000; > -- if (opp_find_freq_ceil(mpu_dev, &freq)) > -- omap_pm_cpu_set_freq(freq); > --#endif > -- return ret; > --} > -- > --static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) > --{ > -- int result = 0; > -- > -- mpu_clk = clk_get(NULL, MPU_CLK); > -- if (IS_ERR(mpu_clk)) > -- return PTR_ERR(mpu_clk); > -- > -- if (policy->cpu != 0) > -- return -EINVAL; > -- > -- policy->cur = policy->min = policy->max = omap_getspeed(0); > -- > -- if (!cpu_is_omap34xx()) { > -- clk_init_cpufreq_table(&freq_table); > -- } else { > -- struct device *mpu_dev = omap2_get_mpuss_device(); > -- > -- opp_init_cpufreq_table(mpu_dev, &freq_table); > -- } > -- > -- if (freq_table) { > -- result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -- if (!result) > -- cpufreq_frequency_table_get_attr(freq_table, > -- policy->cpu); > -- } else { > -- policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > -- policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, > -- VERY_HI_RATE) / > 1000; > -- } > -- > -- policy->min = policy->cpuinfo.min_freq; > -- policy->max = policy->cpuinfo.max_freq; > -- policy->cur = omap_getspeed(0); > -- > -- /* FIXME: what's the actual transition time? */ > -- policy->cpuinfo.transition_latency = 300 * 1000; > -- > -- return 0; > --} > -- > --static int omap_cpu_exit(struct cpufreq_policy *policy) > --{ > -- clk_exit_cpufreq_table(&freq_table); > -- clk_put(mpu_clk); > -- return 0; > --} > -- > --static struct freq_attr *omap_cpufreq_attr[] = { > -- &cpufreq_freq_attr_scaling_available_freqs, > -- NULL, > --}; > -- > --static struct cpufreq_driver omap_driver = { > -- .flags = CPUFREQ_STICKY, > -- .verify = omap_verify_speed, > -- .target = omap_target, > -- .get = omap_getspeed, > -- .init = omap_cpu_init, > -- .exit = omap_cpu_exit, > -- .name = "omap", > -- .attr = omap_cpufreq_attr, > --}; > -- > --static int __init omap_cpufreq_init(void) > --{ > -- return cpufreq_register_driver(&omap_driver); > --} > -- > --late_initcall(omap_cpufreq_init); > -- > --/* > -- * if ever we want to remove this, upon cleanup call: > -- * > -- * cpufreq_unregister_driver() > -- * cpufreq_frequency_table_put_attr() > -- */ > -- > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0007-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater- > OMAP4430.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpufreq/0007-OMAP2PLUS-cpufreq-Add-SMP-support-to- > cater-OMAP4430.patch > deleted file mode 100644 > index 6624d1e..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0007-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater- > OMAP4430.patch > +++ /dev/null > @@ -1,170 +0,0 @@ > -From f375d3c39d2835929d34c2a046b8c43cea6d1467 Mon Sep 17 00:00:00 > 2001 > -From: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Date: Mon, 14 Mar 2011 17:08:49 +0530 > -Subject: [PATCH 7/8] OMAP2PLUS: cpufreq: Add SMP support to cater > OMAP4430 > - > -On OMAP SMP configuartion, both processors share the voltage > -and clock. So both CPUs needs to be scaled together and hence > -needs software co-ordination. > - > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Cc: Kevin Hilman <khilman@ti.com> > -cc: Vishwanath BS <vishwanath.bs@ti.com> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 73 > ++++++++++++++++++++++++++----- > - 1 files changed, 62 insertions(+), 11 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 14f84cc..8d472f6 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -26,9 +26,11 @@ > - #include <linux/clk.h> > - #include <linux/io.h> > - #include <linux/opp.h> > -+#include <linux/cpu.h> > - > - #include <asm/system.h> > - #include <asm/smp_plat.h> > -+#include <asm/cpu.h> > - > - #include <plat/clock.h> > - #include <plat/omap-pm.h> > -@@ -63,7 +65,7 @@ static unsigned int omap_getspeed(unsigned int cpu) > - { > - unsigned long rate; > - > -- if (cpu) > -+ if (cpu >= NR_CPUS) > - return 0; > - > - rate = clk_get_rate(mpu_clk) / 1000; > -@@ -74,9 +76,13 @@ static int omap_target(struct cpufreq_policy *policy, > - unsigned int target_freq, > - unsigned int relation) > - { > -- int ret = 0; > -+ int i, ret = 0; > - struct cpufreq_freqs freqs; > - > -+ /* Changes not allowed until all CPUs are online */ > -+ if (is_smp() && (num_online_cpus() < NR_CPUS)) > -+ return ret; > -+ > - /* Ensure desired rate is within allowed range. Some govenors > - * (ondemand) will just pass target_freq=0 to get the minimum. */ > - if (target_freq < policy->min) > -@@ -84,15 +90,25 @@ static int omap_target(struct cpufreq_policy *policy, > - if (target_freq > policy->max) > - target_freq = policy->max; > - > -- freqs.old = omap_getspeed(0); > -+ freqs.old = omap_getspeed(policy->cpu); > - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > -- freqs.cpu = 0; > -+ freqs.cpu = policy->cpu; > - > - if (freqs.old == freqs.new) > - return ret; > - > -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ if (!is_smp()) { > -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ goto set_freq; > -+ } > -+ > -+ /* notifiers */ > -+ for_each_cpu(i, policy->cpus) { > -+ freqs.cpu = i; > -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ } > - > -+set_freq: > - #ifdef CONFIG_CPU_FREQ_DEBUG > - pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); > - #endif > -@@ -105,12 +121,33 @@ static int omap_target(struct cpufreq_policy > *policy, > - * CONFIG_SMP enabled. Below code is added only to manage that > - * scenario > - */ > -- if (!is_smp()) > -+ freqs.new = omap_getspeed(policy->cpu); > -+ if (!is_smp()) { > - loops_per_jiffy = > - cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); > -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+ goto skip_lpj; > -+ } > - > -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+#ifdef CONFIG_SMP > -+ /* > -+ * Note that loops_per_jiffy is not updated on SMP systems in > -+ * cpufreq driver. So, update the per-CPU loops_per_jiffy value > -+ * on frequency transition. We need to update all dependent CPUs. > -+ */ > -+ for_each_cpu(i, policy->cpus) > -+ per_cpu(cpu_data, i).loops_per_jiffy = > -+ cpufreq_scale(per_cpu(cpu_data, i).loops_per_jiffy, > -+ freqs.old, freqs.new); > -+#endif > - > -+ /* notifiers */ > -+ for_each_cpu(i, policy->cpus) { > -+ freqs.cpu = i; > -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+ } > -+ > -+skip_lpj: > - return ret; > - } > - > -@@ -118,6 +155,7 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - { > - int result = 0; > - struct device *mpu_dev; > -+ static cpumask_var_t cpumask; > - > - if (cpu_is_omap24xx()) > - mpu_clk = clk_get(NULL, "virt_prcm_set"); > -@@ -129,12 +167,12 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - if (IS_ERR(mpu_clk)) > - return PTR_ERR(mpu_clk); > - > -- if (policy->cpu != 0) > -+ if (policy->cpu >= NR_CPUS) > - return -EINVAL; > - > -- policy->cur = policy->min = policy->max = omap_getspeed(0); > -- > -+ policy->cur = policy->min = policy->max = omap_getspeed(policy- > >cpu); > - mpu_dev = omap2_get_mpuss_device(); > -+ > - if (!mpu_dev) { > - pr_warning("%s: unable to get the mpu device\n", __func__); > - return -EINVAL; > -@@ -154,7 +192,20 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - > - policy->min = policy->cpuinfo.min_freq; > - policy->max = policy->cpuinfo.max_freq; > -- policy->cur = omap_getspeed(0); > -+ policy->cur = omap_getspeed(policy->cpu); > -+ > -+ /* > -+ * On OMAP SMP configuartion, both processors share the voltage > -+ * and clock. So both CPUs needs to be scaled together and hence > -+ * needs software co-ordination. Use cpufreq affected_cpus > -+ * interface to handle this scenario. Additional is_smp() check > -+ * is to keep SMP_ON_UP build working. > -+ */ > -+ if (is_smp()) { > -+ policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; > -+ cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask); > -+ cpumask_copy(policy->cpus, cpumask); > -+ } > - > - /* FIXME: what's the actual transition time? */ > - policy->cpuinfo.transition_latency = 300 * 1000; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0008-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set- > mp.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpufreq/0008-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set- > mp.patch > deleted file mode 100644 > index 3797443..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpufreq/0008-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set- > mp.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From 6e101764a47cb6975a555e2237843ad391a542a4 Mon Sep 17 00:00:00 > 2001 > -From: Jarkko Nikula <jhnikula@gmail.com> > -Date: Thu, 14 Apr 2011 16:21:58 +0300 > -Subject: [PATCH 8/8] OMAP2PLUS: cpufreq: Fix typo when attempting to set > mpu_clk for OMAP4 > - > -Fix this typo as there is no dpll_mpu_ck for OMAP3 and code flow is clearly > -trying to set mpu_clk for OMAP4 for which this dpll_mpu_ck is available. > - > -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 8d472f6..d53ce23 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -161,7 +161,7 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - mpu_clk = clk_get(NULL, "virt_prcm_set"); > - else if (cpu_is_omap34xx()) > - mpu_clk = clk_get(NULL, "dpll1_ck"); > -- else if (cpu_is_omap34xx()) > -+ else if (cpu_is_omap44xx()) > - mpu_clk = clk_get(NULL, "dpll_mpu_ck"); > - > - if (IS_ERR(mpu_clk)) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpuidle/0001-OMAP2-clockdomain-Add-an-api-to-read-idle- > mode.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39- > ti-pm-wip-cpuidle/0001-OMAP2-clockdomain-Add-an-api-to-read-idle- > mode.patch > deleted file mode 100644 > index d9b0517..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpuidle/0001-OMAP2-clockdomain-Add-an-api-to-read-idle-mode.patch > +++ /dev/null > @@ -1,77 +0,0 @@ > -From 988f50cb51d18e81ed2f7673a09694d28c9d086a Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Tue, 5 Apr 2011 15:22:31 +0530 > -Subject: [PATCH 1/6] OMAP2+: clockdomain: Add an api to read idle mode > - > -Add a clockdomain api to check if hardware supervised > -idle transitions are enabled on a clockdomain. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > ---- > - arch/arm/mach-omap2/clockdomain.c | 21 +++++++++++++++++++++ > - arch/arm/mach-omap2/clockdomain.h | 3 +++ > - 2 files changed, 24 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach- > omap2/clockdomain.c > -index 6cb6c03..2ab3686 100644 > ---- a/arch/arm/mach-omap2/clockdomain.c > -+++ b/arch/arm/mach-omap2/clockdomain.c > -@@ -795,6 +795,27 @@ void clkdm_deny_idle(struct clockdomain *clkdm) > - arch_clkdm->clkdm_deny_idle(clkdm); > - } > - > -+/** > -+ * clkdm_is_idle - Check if the clkdm hwsup/autoidle is enabled > -+ * @clkdm: struct clockdomain * > -+ * > -+ * Returns true if the clockdomain is in hardware-supervised > -+ * idle mode, or 0 otherwise. > -+ * > -+ */ > -+int clkdm_is_idle(struct clockdomain *clkdm) > -+{ > -+ if (!clkdm) > -+ return -EINVAL; > -+ > -+ if (!arch_clkdm || !arch_clkdm->clkdm_is_idle) > -+ return -EINVAL; > -+ > -+ pr_debug("clockdomain: reading idle state for %s\n", clkdm->name); > -+ > -+ return arch_clkdm->clkdm_is_idle(clkdm); > -+} > -+ > - > - /* Clockdomain-to-clock framework interface code */ > - > -diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach- > omap2/clockdomain.h > -index 5823584..085ed82 100644 > ---- a/arch/arm/mach-omap2/clockdomain.h > -+++ b/arch/arm/mach-omap2/clockdomain.h > -@@ -138,6 +138,7 @@ struct clockdomain { > - * @clkdm_wakeup: Force a clockdomain to wakeup > - * @clkdm_allow_idle: Enable hw supervised idle transitions for clock domain > - * @clkdm_deny_idle: Disable hw supervised idle transitions for clock domain > -+ * @clkdm_is_idle: Check if hw supervised idle transitions are enabled > - * @clkdm_clk_enable: Put the clkdm in right state for a clock enable > - * @clkdm_clk_disable: Put the clkdm in right state for a clock disable > - */ > -@@ -154,6 +155,7 @@ struct clkdm_ops { > - int (*clkdm_wakeup)(struct clockdomain *clkdm); > - void (*clkdm_allow_idle)(struct clockdomain *clkdm); > - void (*clkdm_deny_idle)(struct clockdomain *clkdm); > -+ int (*clkdm_is_idle)(struct clockdomain *clkdm); > - int (*clkdm_clk_enable)(struct clockdomain *clkdm); > - int (*clkdm_clk_disable)(struct clockdomain *clkdm); > - }; > -@@ -177,6 +179,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain > *clkdm); > - > - void clkdm_allow_idle(struct clockdomain *clkdm); > - void clkdm_deny_idle(struct clockdomain *clkdm); > -+int clkdm_is_idle(struct clockdomain *clkdm); > - > - int clkdm_wakeup(struct clockdomain *clkdm); > - int clkdm_sleep(struct clockdomain *clkdm); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpuidle/0002-OMAP2-clockdomain-Add-SoC-support-for- > clkdm_is_idle.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpuidle/0002-OMAP2-clockdomain-Add-SoC-support-for- > clkdm_is_idle.patch > deleted file mode 100644 > index c7c1ea0..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpuidle/0002-OMAP2-clockdomain-Add-SoC-support-for-clkdm_is_idle.patch > +++ /dev/null > @@ -1,86 +0,0 @@ > -From e3ba8d41bfafd782f3ee7f8930d9bf393986c662 Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Tue, 5 Apr 2011 15:22:36 +0530 > -Subject: [PATCH 2/6] OMAP2+: clockdomain: Add SoC support for > clkdm_is_idle > - > -Add the SoC specific implemenation for clkdm_is_idle > -for OMAP2/3 and OMAP4. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > ---- > - arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 12 ++++++++++++ > - arch/arm/mach-omap2/clockdomain44xx.c | 7 +++++++ > - 2 files changed, 19 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach- > omap2/clockdomain2xxx_3xxx.c > -index 48d0db7..db49baa 100644 > ---- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c > -+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c > -@@ -13,6 +13,7 @@ > - */ > - > - #include <linux/types.h> > -+#include <linux/errno.h> > - #include <plat/prcm.h> > - #include "prm.h" > - #include "prm2xxx_3xxx.h" > -@@ -146,6 +147,15 @@ static void omap2_clkdm_deny_idle(struct > clockdomain *clkdm) > - _clkdm_del_autodeps(clkdm); > - } > - > -+static int omap2_clkdm_is_idle(struct clockdomain *clkdm) > -+{ > -+ if (!clkdm->clktrctrl_mask) > -+ return -1; > -+ > -+ return omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr- > >prcm_offs, > -+ clkdm->clktrctrl_mask); > -+} > -+ > - static void _enable_hwsup(struct clockdomain *clkdm) > - { > - if (cpu_is_omap24xx()) > -@@ -252,6 +262,7 @@ struct clkdm_ops omap2_clkdm_operations = { > - .clkdm_wakeup = omap2_clkdm_wakeup, > - .clkdm_allow_idle = omap2_clkdm_allow_idle, > - .clkdm_deny_idle = omap2_clkdm_deny_idle, > -+ .clkdm_is_idle = omap2_clkdm_is_idle, > - .clkdm_clk_enable = omap2_clkdm_clk_enable, > - .clkdm_clk_disable = omap2_clkdm_clk_disable, > - }; > -@@ -269,6 +280,7 @@ struct clkdm_ops omap3_clkdm_operations = { > - .clkdm_wakeup = omap3_clkdm_wakeup, > - .clkdm_allow_idle = omap3_clkdm_allow_idle, > - .clkdm_deny_idle = omap3_clkdm_deny_idle, > -+ .clkdm_is_idle = omap2_clkdm_is_idle, > - .clkdm_clk_enable = omap2_clkdm_clk_enable, > - .clkdm_clk_disable = omap2_clkdm_clk_disable, > - }; > -diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach- > omap2/clockdomain44xx.c > -index a1a4ecd..4b10727 100644 > ---- a/arch/arm/mach-omap2/clockdomain44xx.c > -+++ b/arch/arm/mach-omap2/clockdomain44xx.c > -@@ -93,6 +93,12 @@ static void omap4_clkdm_deny_idle(struct > clockdomain *clkdm) > - clkdm->cm_inst, clkdm->clkdm_offs); > - } > - > -+static int omap4_clkdm_is_idle(struct clockdomain *clkdm) > -+{ > -+ return omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, > -+ clkdm->cm_inst, clkdm->clkdm_offs); > -+} > -+ > - static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) > - { > - bool hwsup = false; > -@@ -132,6 +138,7 @@ struct clkdm_ops omap4_clkdm_operations = { > - .clkdm_wakeup = omap4_clkdm_wakeup, > - .clkdm_allow_idle = omap4_clkdm_allow_idle, > - .clkdm_deny_idle = omap4_clkdm_deny_idle, > -+ .clkdm_is_idle = omap4_clkdm_is_idle, > - .clkdm_clk_enable = omap4_clkdm_clk_enable, > - .clkdm_clk_disable = omap4_clkdm_clk_disable, > - }; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpuidle/0003-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid- > valu.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpuidle/0003-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid- > valu.patch > deleted file mode 100644 > index cbe5ca2..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpuidle/0003-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch > +++ /dev/null > @@ -1,35 +0,0 @@ > -From 7cdc87071a4bb390ad5d7ddea210bd2b4d662114 Mon Sep 17 > 00:00:00 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Tue, 5 Apr 2011 15:22:41 +0530 > -Subject: [PATCH 3/6] OMAP2+: PM: Initialise sleep_switch to a non-valid value > - > -sleep_switch which is initialised to 0 in omap_set_pwrdm_state > -happens to be a valid sleep_switch type (FORCEWAKEUP_SWITCH) > -which are defined as > -#define FORCEWAKEUP_SWITCH 0 > -#define LOWPOWERSTATE_SWITCH 1 > - > -This causes the function to wrongly program some clock domains > -even when the Powerdomain is in ON state. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > ---- > - arch/arm/mach-omap2/pm.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c > -index 49486f5..d48813f 100644 > ---- a/arch/arm/mach-omap2/pm.c > -+++ b/arch/arm/mach-omap2/pm.c > -@@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void) > - int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) > - { > - u32 cur_state; > -- int sleep_switch = 0; > -+ int sleep_switch = -1; > - int ret = 0; > - > - if (pwrdm == NULL || IS_ERR(pwrdm)) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpuidle/0004-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpuidle/0004-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch > deleted file mode 100644 > index 16eedf9..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpuidle/0004-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch > +++ /dev/null > @@ -1,50 +0,0 @@ > -From cec133850aa42c03d912c764aaa441677e782eca Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Tue, 5 Apr 2011 15:22:48 +0530 > -Subject: [PATCH 4/6] OMAP2+: PM: idle clkdms only if already in idle > - > -The omap_set_pwrdm_state function forces clockdomains > -to idle, without checking the existing idle state > -programmed, instead based solely on the HW capability > -of the clockdomain to support idle. > -This is wrong and the clockdomains should be idled > -post a state_switch *only* if idle transitions on the > -clockdomain were already enabled. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > ---- > - arch/arm/mach-omap2/pm.c | 4 +++- > - 1 files changed, 3 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c > -index d48813f..840b0e1 100644 > ---- a/arch/arm/mach-omap2/pm.c > -+++ b/arch/arm/mach-omap2/pm.c > -@@ -108,6 +108,7 @@ int omap_set_pwrdm_state(struct powerdomain > *pwrdm, u32 state) > - u32 cur_state; > - int sleep_switch = -1; > - int ret = 0; > -+ int hwsup = 0; > - > - if (pwrdm == NULL || IS_ERR(pwrdm)) > - return -EINVAL; > -@@ -127,6 +128,7 @@ int omap_set_pwrdm_state(struct powerdomain > *pwrdm, u32 state) > - (pwrdm->flags & > PWRDM_HAS_LOWPOWERSTATECHANGE)) { > - sleep_switch = LOWPOWERSTATE_SWITCH; > - } else { > -+ hwsup = clkdm_is_idle(pwrdm->pwrdm_clkdms[0]); > - clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); > - pwrdm_wait_transition(pwrdm); > - sleep_switch = FORCEWAKEUP_SWITCH; > -@@ -142,7 +144,7 @@ int omap_set_pwrdm_state(struct powerdomain > *pwrdm, u32 state) > - > - switch (sleep_switch) { > - case FORCEWAKEUP_SWITCH: > -- if (pwrdm->pwrdm_clkdms[0]->flags & > CLKDM_CAN_ENABLE_AUTO) > -+ if (hwsup) > - clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); > - else > - clkdm_sleep(pwrdm->pwrdm_clkdms[0]); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpuidle/0005-OMAP2-hwmod-Follow-the-recomended-PRCM- > sequence.patch b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap- > 2.6.39-ti-pm-wip-cpuidle/0005-OMAP2-hwmod-Follow-the-recomended- > PRCM-sequence.patch > deleted file mode 100644 > index b0af9e7..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpuidle/0005-OMAP2-hwmod-Follow-the-recomended-PRCM-sequence.patch > +++ /dev/null > @@ -1,46 +0,0 @@ > -From 8fb6b7c488b31fbff5b81bdeea5dbb236342458b Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Tue, 29 Mar 2011 22:37:43 +0530 > -Subject: [PATCH 5/6] OMAP2+: hwmod: Follow the recomended PRCM > sequence > - > -Follow the recomended PRCM sequence. > -This still does not take care of Optional clocks. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 9 ++++++++- > - 1 files changed, 8 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index e034294..fc0db0c 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -1223,6 +1223,7 @@ static int _reset(struct omap_hwmod *oh) > - static int _enable(struct omap_hwmod *oh) > - { > - int r; > -+ int hwsup = 0; > - > - if (oh->_state != _HWMOD_STATE_INITIALIZED && > - oh->_state != _HWMOD_STATE_IDLE && > -@@ -1250,10 +1251,16 @@ static int _enable(struct omap_hwmod *oh) > - omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); > - > - _add_initiator_dep(oh, mpu_oh); > -+ if (oh->_clk && oh->_clk->clkdm) { > -+ hwsup = clkdm_is_idle(oh->_clk->clkdm); > -+ clkdm_wakeup(oh->_clk->clkdm); > -+ } > - _enable_clocks(oh); > -- > - r = _wait_target_ready(oh); > - if (!r) { > -+ if (oh->_clk && oh->_clk->clkdm && hwsup) > -+ clkdm_allow_idle(oh->_clk->clkdm); > -+ > - oh->_state = _HWMOD_STATE_ENABLED; > - > - /* Access the sysconfig only if the target is ready */ > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm-wip-cpuidle/0006-OMAP-Serial-Check-wk_st-only-if-present.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpuidle/0006-OMAP-Serial-Check-wk_st-only-if-present.patch > deleted file mode 100644 > index a8fc0c0..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm-wip- > cpuidle/0006-OMAP-Serial-Check-wk_st-only-if-present.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From 7b74888d198c260992349fab214cad3adf853ef9 Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Tue, 2 Mar 2010 17:25:30 +0530 > -Subject: [PATCH 6/6] OMAP: Serial: Check wk_st only if present > - > -Uart on the resume path tries to read wk_st registers, even > -on architectures were its not present/populated. > -This patch fixes the issue. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > ---- > - arch/arm/mach-omap2/serial.c | 5 +++-- > - 1 files changed, 3 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c > -index 1ac361b..a0046ce 100644 > ---- a/arch/arm/mach-omap2/serial.c > -+++ b/arch/arm/mach-omap2/serial.c > -@@ -418,8 +418,9 @@ void omap_uart_resume_idle(int num) > - } > - > - /* Check for normal UART wakeup */ > -- if (__raw_readl(uart->wk_st) & uart->wk_mask) > -- omap_uart_block_sleep(uart); > -+ if (uart->wk_st && uart->wk_mask) > -+ if (__raw_readl(uart->wk_st) & uart- > >wk_mask) > -+ omap_uart_block_sleep(uart); > - return; > - } > - } > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0001-OMAP3-voltage-remove-spurious-pr_notice-for-debugfs.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0001- > OMAP3-voltage-remove-spurious-pr_notice-for-debugfs.patch > deleted file mode 100644 > index 0d1cbce..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0001-OMAP3-voltage-remove-spurious-pr_notice-for-debugfs.patch > +++ /dev/null > @@ -1,30 +0,0 @@ > -From 4af697edf9d1d85d2735e86e86e1203c3509dcba Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Sat, 12 Feb 2011 17:27:14 +0530 > -Subject: [PATCH 01/12] OMAP3+: voltage: remove spurious pr_notice for > debugfs > - > -cat of debugfs entry for vp_volt provides voltage. The additional pr_notice > -is just spam on console and provides no additional information. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/voltage.c | 1 - > - 1 files changed, 0 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 0c1552d..9ef3789 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -148,7 +148,6 @@ static int vp_volt_debug_get(void *data, u64 *val) > - } > - > - vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); > -- pr_notice("curr_vsel = %x\n", vsel); > - > - if (!vdd->pmic_info->vsel_to_uv) { > - pr_warning("PMIC function to convert vsel to voltage" > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0002-OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch b/recipes- > kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0002-OMAP4- > PM-remove-redundant-ifdef-CONFIG_PM.patch > deleted file mode 100644 > index 7b13792..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0002-OMAP4-PM-remove-redundant-ifdef-CONFIG_PM.patch > +++ /dev/null > @@ -1,41 +0,0 @@ > -From 37fb1c8eeecd39542716d3d0c7c5e3ca0eb198f8 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Sun, 13 Mar 2011 09:07:23 +0530 > -Subject: [PATCH 02/12] OMAP4: PM: remove redundant #ifdef CONFIG_PM > - > -pm44xx.c is built only when CONFIG_PM is setup, > -remove redundant CONFIG_PM check. > - > -This also fixes: > -https://bugzilla.kernel.org/show_bug.cgi?id=25022 > - > -Reported-by: Martin Etti <ettl.martin@gmx.de> > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/pm44xx.c | 2 -- > - 1 files changed, 0 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach- > omap2/pm44xx.c > -index 76cfff2..59a870b 100644 > ---- a/arch/arm/mach-omap2/pm44xx.c > -+++ b/arch/arm/mach-omap2/pm44xx.c > -@@ -105,13 +105,11 @@ static int __init omap4_pm_init(void) > - > - pr_err("Power Management for TI OMAP4.\n"); > - > --#ifdef CONFIG_PM > - ret = pwrdm_for_each(pwrdms_setup, NULL); > - if (ret) { > - pr_err("Failed to setup powerdomains\n"); > - goto err2; > - } > --#endif > - > - #ifdef CONFIG_SUSPEND > - suspend_set_ops(&omap_pm_ops); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0003-OMAP3-smartreflex-fix-sr_late_init-error-path-in-pro.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0003- > OMAP3-smartreflex-fix-sr_late_init-error-path-in-pro.patch > deleted file mode 100644 > index 6c37b62..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0003-OMAP3-smartreflex-fix-sr_late_init-error-path-in-pro.patch > +++ /dev/null > @@ -1,30 +0,0 @@ > -From a22a0dcefe99c8ee260e0c489bc44e6e14bb1ccb Mon Sep 17 00:00:00 > 2001 > -From: Aaro Koskinen <aaro.koskinen@nokia.com> > -Date: Thu, 24 Mar 2011 18:35:31 +0200 > -Subject: [PATCH 03/12] OMAP3+: smartreflex: fix sr_late_init() error path in > probe > - > -sr_late_init() will take care of freeing the resources. > - > -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 13e24f9..dbc4b6f 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -883,7 +883,7 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - ret = sr_late_init(sr_info); > - if (ret) { > - pr_warning("%s: Error in SR late init\n", __func__); > -- goto err_release_region; > -+ return ret; > - } > - } > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0004-OMAP3-smartreflex-request-the-memory-region.patch b/recipes- > kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0004-OMAP3- > smartreflex-request-the-memory-region.patch > deleted file mode 100644 > index 263094d..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0004-OMAP3-smartreflex-request-the-memory-region.patch > +++ /dev/null > @@ -1,36 +0,0 @@ > -From db9c7da6a78be8584c96c83a3a2d1c8aeb623da8 Mon Sep 17 00:00:00 > 2001 > -From: Aaro Koskinen <aaro.koskinen@nokia.com> > -Date: Thu, 24 Mar 2011 18:35:32 +0200 > -Subject: [PATCH 04/12] OMAP3+: smartreflex: request the memory region > - > -We are releasing the memory region, but never actually request it. > - > -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 8 ++++++++ > - 1 files changed, 8 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index dbc4b6f..703143a 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -847,6 +847,14 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - goto err_free_devinfo; > - } > - > -+ mem = request_mem_region(mem->start, resource_size(mem), > -+ dev_name(&pdev->dev)); > -+ if (!mem) { > -+ dev_err(&pdev->dev, "%s: no mem region\n", __func__); > -+ ret = -EBUSY; > -+ goto err_free_devinfo; > -+ } > -+ > - irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); > - > - pm_runtime_enable(&pdev->dev); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0005-OMAP3-smartreflex-fix-ioremap-leak-on-probe-error.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0005- > OMAP3-smartreflex-fix-ioremap-leak-on-probe-error.patch > deleted file mode 100644 > index ea1e567..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0005-OMAP3-smartreflex-fix-ioremap-leak-on-probe-error.patch > +++ /dev/null > @@ -1,66 +0,0 @@ > -From b3ca51ac09da7c260c28df396d4c830814697ff0 Mon Sep 17 00:00:00 > 2001 > -From: Aaro Koskinen <aaro.koskinen@nokia.com> > -Date: Thu, 24 Mar 2011 18:35:33 +0200 > -Subject: [PATCH 05/12] OMAP3+: smartreflex: fix ioremap leak on probe error > - > -Add missing iounmap() to error paths. > - > -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 10 ++++++---- > - 1 files changed, 6 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 703143a..156807e 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -904,7 +904,7 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); > - if (!vdd_dbg_dir) { > - ret = -EINVAL; > -- goto err_release_region; > -+ goto err_iounmap; > - } > - > - sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); > -@@ -912,7 +912,7 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - dev_err(&pdev->dev, "%s: Unable to create debugfs > directory\n", > - __func__); > - ret = PTR_ERR(sr_info->dbg_dir); > -- goto err_release_region; > -+ goto err_iounmap; > - } > - > - (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, > -@@ -929,7 +929,7 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - dev_err(&pdev->dev, "%s: Unable to create debugfs directory" > - "for n-values\n", __func__); > - ret = PTR_ERR(nvalue_dir); > -- goto err_release_region; > -+ goto err_iounmap; > - } > - > - omap_voltage_get_volttable(sr_info->voltdm, &volt_data); > -@@ -939,7 +939,7 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - "entries for n-values\n", > - __func__, sr_info->voltdm->name); > - ret = -ENODATA; > -- goto err_release_region; > -+ goto err_iounmap; > - } > - > - for (i = 0; i < sr_info->nvalue_count; i++) { > -@@ -953,6 +953,8 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - > - return ret; > - > -+err_iounmap: > -+ iounmap(sr_info->base); > - err_release_region: > - release_mem_region(mem->start, resource_size(mem)); > - err_free_devinfo: > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0006-OMAP3-smartreflex-delete-instance-from-sr_list-on-pr.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0006- > OMAP3-smartreflex-delete-instance-from-sr_list-on-pr.patch > deleted file mode 100644 > index cda6da6..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0006-OMAP3-smartreflex-delete-instance-from-sr_list-on-pr.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From 92e63a2f098ce344cfc51ec9a7420e1a5cf85c3e Mon Sep 17 00:00:00 > 2001 > -From: Aaro Koskinen <aaro.koskinen@nokia.com> > -Date: Thu, 24 Mar 2011 18:35:34 +0200 > -Subject: [PATCH 06/12] OMAP3+: smartreflex: delete instance from sr_list on > probe error > - > -If the probe fails, the node should be deleted from sr_list. > - > -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 1 + > - 1 files changed, 1 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 156807e..f0a488a 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -954,6 +954,7 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - return ret; > - > - err_iounmap: > -+ list_del(&sr_info->node); > - iounmap(sr_info->base); > - err_release_region: > - release_mem_region(mem->start, resource_size(mem)); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0007-OMAP3-smartreflex-delete-debugfs-entries-on-probe-er.patch > b/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0007- > OMAP3-smartreflex-delete-debugfs-entries-on-probe-er.patch > deleted file mode 100644 > index d4543a4..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0007-OMAP3-smartreflex-delete-debugfs-entries-on-probe-er.patch > +++ /dev/null > @@ -1,48 +0,0 @@ > -From c194377152df812bcb29fff8f217ffbde59089be Mon Sep 17 00:00:00 > 2001 > -From: Aaro Koskinen <aaro.koskinen@nokia.com> > -Date: Thu, 24 Mar 2011 18:35:35 +0200 > -Subject: [PATCH 07/12] OMAP3+: smartreflex: delete debugfs entries on probe > error > - > -Delete created debugfs entries if probe fails. > - > -Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 6 ++++-- > - 1 files changed, 4 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index f0a488a..fb7dc52 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -929,7 +929,7 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - dev_err(&pdev->dev, "%s: Unable to create debugfs directory" > - "for n-values\n", __func__); > - ret = PTR_ERR(nvalue_dir); > -- goto err_iounmap; > -+ goto err_debugfs; > - } > - > - omap_voltage_get_volttable(sr_info->voltdm, &volt_data); > -@@ -939,7 +939,7 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - "entries for n-values\n", > - __func__, sr_info->voltdm->name); > - ret = -ENODATA; > -- goto err_iounmap; > -+ goto err_debugfs; > - } > - > - for (i = 0; i < sr_info->nvalue_count; i++) { > -@@ -953,6 +953,8 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - > - return ret; > - > -+err_debugfs: > -+ debugfs_remove_recursive(sr_info->dbg_dir); > - err_iounmap: > - list_del(&sr_info->node); > - iounmap(sr_info->base); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0008-OMAP3-cpuidle-remove-useless-SDP-specific-timings.patch b/recipes- > kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0008-OMAP3- > cpuidle-remove-useless-SDP-specific-timings.patch > deleted file mode 100644 > index e3ee041..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0008-OMAP3-cpuidle-remove-useless-SDP-specific-timings.patch > +++ /dev/null > @@ -1,57 +0,0 @@ > -From 2b9e07516cc3853340b5e06e9ae7244ca5681466 Mon Sep 17 00:00:00 > 2001 > -From: Jean Pihet <j-pihet@ti.com> > -Date: Fri, 29 Apr 2011 11:26:22 +0200 > -Subject: [PATCH 08/12] OMAP3 cpuidle: remove useless SDP specific timings > - > -The cpuidle states settings can be overriden by some board- > -specific settings, by calling omap3_pm_init_cpuidle. > -Remove the 3430SDP specific states settings registration > -since the figures are identical to the default ones (in cpuidle34xx.c). > - > -Signed-off-by: Jean Pihet <j-pihet@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-3430sdp.c | 19 ------------------- > - 1 files changed, 0 insertions(+), 19 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach- > omap2/board-3430sdp.c > -index 9afd087..7ffad7b 100644 > ---- a/arch/arm/mach-omap2/board-3430sdp.c > -+++ b/arch/arm/mach-omap2/board-3430sdp.c > -@@ -59,24 +59,6 @@ > - > - #define TWL4030_MSECURE_GPIO 22 > - > --/* FIXME: These values need to be updated based on more profiling on > 3430sdp*/ > --static struct cpuidle_params omap3_cpuidle_params_table[] = { > -- /* C1 */ > -- {1, 2, 2, 5}, > -- /* C2 */ > -- {1, 10, 10, 30}, > -- /* C3 */ > -- {1, 50, 50, 300}, > -- /* C4 */ > -- {1, 1500, 1800, 4000}, > -- /* C5 */ > -- {1, 2500, 7500, 12000}, > -- /* C6 */ > -- {1, 3000, 8500, 15000}, > -- /* C7 */ > -- {1, 10000, 30000, 300000}, > --}; > -- > - static uint32_t board_keymap[] = { > - KEY(0, 0, KEY_LEFT), > - KEY(0, 1, KEY_RIGHT), > -@@ -883,7 +865,6 @@ static void __init omap_3430sdp_init(void) > - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); > - omap_board_config = sdp3430_config; > - omap_board_config_size = ARRAY_SIZE(sdp3430_config); > -- omap3_pm_init_cpuidle(omap3_cpuidle_params_table); > - omap3430_i2c_init(); > - omap_display_init(&sdp3430_dss_data); > - if (omap_rev() > OMAP3430_REV_ES1_0) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0009-OMAP3-SR-make-notify-independent-of-class.patch b/recipes- > kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0009-OMAP3-SR- > make-notify-independent-of-class.patch > deleted file mode 100644 > index c44371d..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0009-OMAP3-SR-make-notify-independent-of-class.patch > +++ /dev/null > @@ -1,48 +0,0 @@ > -From a0f28097b944930e479998780863b9e5a39e30b3 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Mon, 14 Feb 2011 12:16:36 +0530 > -Subject: [PATCH 09/12] OMAP3+: SR: make notify independent of class > - > -Interrupt notification mechanism of SmartReflex can be used by the > -choice of implementation of the class driver. For example, Class 2 and > -Class 1.5 of SmartReflex can both use the interrupt notification to > -identify the transition of voltage or other events. > - > -Hence, the actual class does not matter for notifier. Let the class > -driver's handling decide how it should be used. SmartReflex driver > -should provide just the primitives. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 6 ++---- > - 1 files changed, 2 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index fb7dc52..3ee7261 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data) > - sr_write_reg(sr_info, IRQSTATUS, status); > - } > - > -- if (sr_class->class_type == SR_CLASS2 && sr_class->notify) > -+ if (sr_class->notify) > - sr_class->notify(sr_info->voltdm, status); > - > - return IRQ_HANDLED; > -@@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info) > - struct resource *mem; > - int ret = 0; > - > -- if (sr_class->class_type == SR_CLASS2 && > -- sr_class->notify_flags && sr_info->irq) { > -- > -+ if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { > - name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm- > >name); > - if (name == NULL) { > - ret = -ENOMEM; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0010-OMAP3-SR-disable-interrupt-by-default.patch b/recipes- > kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0010-OMAP3-SR- > disable-interrupt-by-default.patch > deleted file mode 100644 > index e25c3e8..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0010-OMAP3-SR-disable-interrupt-by-default.patch > +++ /dev/null > @@ -1,37 +0,0 @@ > -From ca5dc57538a566681731102e09a9d1865a4a7020 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Mon, 14 Feb 2011 12:41:10 +0530 > -Subject: [PATCH 10/12] OMAP3+: SR: disable interrupt by default > - > -We will enable and disable interrupt on a need basis in the class > -driver. We need to keep the IRQ disabled by default else the > -forceupdate or vcbypass events could trigger events that we don't > -need/expect to handle. > - > -This is a preparation for SmartReflex AVS class drivers such as > -class 2 and class 1.5 which would need to use interrupts. Existing > -SmartReflex AVS class 3 driver does not require to use interrupts > -and is not impacted by this change. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 1 + > - 1 files changed, 1 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 3ee7261..616ef62 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -268,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info) > - 0, name, (void *)sr_info); > - if (ret) > - goto error; > -+ disable_irq(sr_info->irq); > - } > - > - if (pdata && pdata->enable_on_init) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch b/recipes- > kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0011-OMAP3-SR- > enable-disable-SR-only-on-need.patch > deleted file mode 100644 > index b96682e..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch > +++ /dev/null > @@ -1,41 +0,0 @@ > -From 4aa67e94d6b13905abcf3e95cb66ea7be9c2e8dd Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Mon, 14 Feb 2011 21:14:17 +0530 > -Subject: [PATCH 11/12] OMAP3+: SR: enable/disable SR only on need > - > -Since we already know the state of the autocomp enablement, we can > -see if the requested state is different from the current state and > -enable/disable SR only on the need basis. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 11 +++++++---- > - 1 files changed, 7 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 616ef62..3bd9fac 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -807,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, > u64 val) > - return -EINVAL; > - } > - > -- if (!val) > -- sr_stop_vddautocomp(sr_info); > -- else > -- sr_start_vddautocomp(sr_info); > -+ /* control enable/disable only if there is a delta in value */ > -+ if (sr_info->autocomp_active != val) { > -+ if (!val) > -+ sr_stop_vddautocomp(sr_info); > -+ else > -+ sr_start_vddautocomp(sr_info); > -+ } > - > - return 0; > - } > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0012-OMAP3-SR-fix-cosmetic-indentation.patch b/recipes- > kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti-pm/0012-OMAP3-SR- > fix-cosmetic-indentation.patch > deleted file mode 100644 > index eda76a0..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/pm/linux-omap-2.6.39-ti- > pm/0012-OMAP3-SR-fix-cosmetic-indentation.patch > +++ /dev/null > @@ -1,49 +0,0 @@ > -From 0c2089eecdfc3a85a376eddf9c77857f3d575be6 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Mon, 14 Feb 2011 12:33:13 +0530 > -Subject: [PATCH 12/12] OMAP3+: SR: fix cosmetic indentation > - > -Error label case seems to have a 2 tab indentation when just 1 is > -necessary. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/smartreflex.c | 20 ++++++++++---------- > - 1 files changed, 10 insertions(+), 10 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 3bd9fac..2ce2fb7 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -277,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info) > - return ret; > - > - error: > -- iounmap(sr_info->base); > -- mem = platform_get_resource(sr_info->pdev, > IORESOURCE_MEM, 0); > -- release_mem_region(mem->start, resource_size(mem)); > -- list_del(&sr_info->node); > -- dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" > -- "interrupt handler. Smartreflex will" > -- "not function as desired\n", __func__); > -- kfree(name); > -- kfree(sr_info); > -- return ret; > -+ iounmap(sr_info->base); > -+ mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); > -+ release_mem_region(mem->start, resource_size(mem)); > -+ list_del(&sr_info->node); > -+ dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" > -+ "interrupt handler. Smartreflex will" > -+ "not function as desired\n", __func__); > -+ kfree(name); > -+ kfree(sr_info); > -+ return ret; > - } > - > - static void sr_v1_disable(struct omap_sr *sr) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0001-OMAP-DSS2- > DSI-fix-use_sys_clk-highfreq.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0001-OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch > deleted file mode 100644 > index a66407b..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0001-OMAP-DSS2-DSI- > fix-use_sys_clk-highfreq.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From 6aae34d56ba8fef140b60631536272f6b39c1f61 Mon Sep 17 00:00:00 > 2001 > -From: Tomi Valkeinen <tomi.valkeinen@ti.com> > -Date: Thu, 7 Apr 2011 15:28:47 +0300 > -Subject: [PATCH 01/32] OMAP: DSS2: DSI: fix use_sys_clk & highfreq > - > -use_sys_clk and highfreq fields in dsi.current_cinfo were never set. > -Luckily they weren't used anywhere so it didn't cause any problems. > - > -This patch fixes those fields and they are now set at the same time as > -the rest of the fields. > - > -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > ---- > - drivers/video/omap2/dss/dsi.c | 3 +++ > - 1 files changed, 3 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c > -index 0a7f1a4..8604153 100644 > ---- a/drivers/video/omap2/dss/dsi.c > -+++ b/drivers/video/omap2/dss/dsi.c > -@@ -1276,6 +1276,9 @@ int dsi_pll_set_clock_div(struct dsi_clock_info > *cinfo) > - > - DSSDBGF(); > - > -+ dsi.current_cinfo.use_sys_clk = cinfo->use_sys_clk; > -+ dsi.current_cinfo.highfreq = cinfo->highfreq; > -+ > - dsi.current_cinfo.fint = cinfo->fint; > - dsi.current_cinfo.clkin4ddr = cinfo->clkin4ddr; > - dsi.current_cinfo.dsi_pll_hsdiv_dispc_clk = > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0002-OMAP-DSS2- > DSI-fix-dsi_dump_clocks.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0002-OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch > deleted file mode 100644 > index 9d5ab61..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0002-OMAP-DSS2-DSI- > fix-dsi_dump_clocks.patch > +++ /dev/null > @@ -1,49 +0,0 @@ > -From 5275654d2e873ca5bdbbd8be61dbb2d63c0e04cb Mon Sep 17 00:00:00 > 2001 > -From: Tomi Valkeinen <tomi.valkeinen@ti.com> > -Date: Mon, 4 Apr 2011 10:02:53 +0300 > -Subject: [PATCH 02/32] OMAP: DSS2: DSI: fix dsi_dump_clocks() > - > -On OMAP4, reading DSI_PLL_CONFIGURATION2 register requires the L3 clock > -(CIO_CLK_ICG) to PLL. Currently dsi_dump_clocks() tries to read that > -register without enabling the L3 clock, leading to crash if DSI is not > -in use. > - > -The status of the bit being read from DSI_PLL_CONFIGURATION2 is > -available from dsi_clock_info->use_sys_clk, so we can avoid the whole > -problem by just using that. > - > -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > ---- > - drivers/video/omap2/dss/dsi.c | 6 +----- > - 1 files changed, 1 insertions(+), 5 deletions(-) > - > -diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c > -index 8604153..1464ac4 100644 > ---- a/drivers/video/omap2/dss/dsi.c > -+++ b/drivers/video/omap2/dss/dsi.c > -@@ -1491,7 +1491,6 @@ void dsi_pll_uninit(void) > - > - void dsi_dump_clocks(struct seq_file *s) > - { > -- int clksel; > - struct dsi_clock_info *cinfo = &dsi.current_cinfo; > - enum dss_clk_source dispc_clk_src, dsi_clk_src; > - > -@@ -1500,13 +1499,10 @@ void dsi_dump_clocks(struct seq_file *s) > - > - enable_clocks(1); > - > -- clksel = REG_GET(DSI_PLL_CONFIGURATION2, 11, 11); > -- > - seq_printf(s, "- DSI PLL -\n"); > - > - seq_printf(s, "dsi pll source = %s\n", > -- clksel == 0 ? > -- "dss_sys_clk" : "pclkfree"); > -+ cinfo->use_sys_clk ? "dss_sys_clk" : "pclkfree"); > - > - seq_printf(s, "Fint\t\t%-16luregn %u\n", cinfo->fint, cinfo->regn); > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0003- > OMAP2PLUS-DSS2-Fix-Return-correct-lcd-clock-source-f.patch b/recipes- > kernel/linux/linux-omap-2.6.39/sakoman/0003-OMAP2PLUS-DSS2-Fix-Return- > correct-lcd-clock-source-f.patch > deleted file mode 100644 > index 14239fa..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0003-OMAP2PLUS- > DSS2-Fix-Return-correct-lcd-clock-source-f.patch > +++ /dev/null > @@ -1,43 +0,0 @@ > -From 9ddb3aafff5f7f6b7eaad32f9b1eea249c0dce8b Mon Sep 17 00:00:00 > 2001 > -From: Archit Taneja <archit@ti.com> > -Date: Thu, 31 Mar 2011 13:23:35 +0530 > -Subject: [PATCH 03/32] OMAP2PLUS: DSS2: Fix: Return correct lcd clock > source for OMAP2/3 > - > -dss.lcd_clk_source is set to the default value DSS_CLK_SRC_FCK at dss_init. > -For OMAP2 and OMAP3, the dss.lcd_clk_source should always be the same as > -dss.dispc_clk_source. The function dss_get_lcd_clk_source() always returns > the > -default value DSS_CLK_SRC_FCK for OMAP2/3. This leads to wrong clock > dumps when > -dispc_clk_source is not DSS_CLK_SRC_FCK. > - > -Correct this function to always return dss.dispc_clk_source for OMAP2/3. > - > -Signed-off-by: Archit Taneja <archit@ti.com> > -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > ---- > - drivers/video/omap2/dss/dss.c | 10 ++++++++-- > - 1 files changed, 8 insertions(+), 2 deletions(-) > - > -diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c > -index 3f1fee6..c3b48a0 100644 > ---- a/drivers/video/omap2/dss/dss.c > -+++ b/drivers/video/omap2/dss/dss.c > -@@ -385,8 +385,14 @@ enum dss_clk_source dss_get_dsi_clk_source(void) > - > - enum dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel) > - { > -- int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; > -- return dss.lcd_clk_source[ix]; > -+ if (dss_has_feature(FEAT_LCD_CLK_SRC)) { > -+ int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; > -+ return dss.lcd_clk_source[ix]; > -+ } else { > -+ /* LCD_CLK source is the same as DISPC_FCLK source for > -+ * OMAP2 and OMAP3 */ > -+ return dss.dispc_clk_source; > -+ } > - } > - > - /* calculate clock rates using dividers in cinfo */ > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0004-OMAP-DSS- > DSI-Fix-DSI-PLL-power-bug.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0004-OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch > deleted file mode 100644 > index 8c2d6e6..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0004-OMAP-DSS-DSI- > Fix-DSI-PLL-power-bug.patch > +++ /dev/null > @@ -1,64 +0,0 @@ > -From 4a56fbcabd128dbd07895e5167fd131299a1391c Mon Sep 17 00:00:00 > 2001 > -From: Tomi Valkeinen <tomi.valkeinen@ti.com> > -Date: Fri, 15 Apr 2011 10:42:59 +0300 > -Subject: [PATCH 04/32] OMAP: DSS: DSI: Fix DSI PLL power bug > - > -OMAP3630 has a HW bug causing DSI PLL power command POWER_ON_DIV > (0x3) > -to not work properly. The bug prevents us from enabling DSI PLL power > -only to HS divider block. > - > -This patch adds a dss feature for the bug and converts POWER_ON_DIV > -requests to POWER_ON_ALL (0x2). > - > -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > ---- > - drivers/video/omap2/dss/dsi.c | 5 +++++ > - drivers/video/omap2/dss/dss_features.c | 2 +- > - drivers/video/omap2/dss/dss_features.h | 2 ++ > - 3 files changed, 8 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c > -index 1464ac4..cbd9ca4 100644 > ---- a/drivers/video/omap2/dss/dsi.c > -+++ b/drivers/video/omap2/dss/dsi.c > -@@ -1059,6 +1059,11 @@ static int dsi_pll_power(enum > dsi_pll_power_state state) > - { > - int t = 0; > - > -+ /* DSI-PLL power command 0x3 is not working */ > -+ if (dss_has_feature(FEAT_DSI_PLL_PWR_BUG) && > -+ state == DSI_PLL_POWER_ON_DIV) > -+ state = DSI_PLL_POWER_ON_ALL; > -+ > - REG_FLD_MOD(DSI_CLK_CTRL, state, 31, 30); /* PLL_PWR_CMD */ > - > - /* PLL_PWR_STATUS */ > -diff --git a/drivers/video/omap2/dss/dss_features.c > b/drivers/video/omap2/dss/dss_features.c > -index aa16222..8c50e18 100644 > ---- a/drivers/video/omap2/dss/dss_features.c > -+++ b/drivers/video/omap2/dss/dss_features.c > -@@ -271,7 +271,7 @@ static struct omap_dss_features > omap3630_dss_features = { > - FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE | > - FEAT_PRE_MULT_ALPHA | FEAT_FUNCGATED | > - FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT | > -- FEAT_RESIZECONF, > -+ FEAT_RESIZECONF | FEAT_DSI_PLL_PWR_BUG, > - > - .num_mgrs = 2, > - .num_ovls = 3, > -diff --git a/drivers/video/omap2/dss/dss_features.h > b/drivers/video/omap2/dss/dss_features.h > -index 12e9c4e..37922ce 100644 > ---- a/drivers/video/omap2/dss/dss_features.h > -+++ b/drivers/video/omap2/dss/dss_features.h > -@@ -40,6 +40,8 @@ enum dss_feat_id { > - /* Independent core clk divider */ > - FEAT_CORE_CLK_DIV = 1 << 11, > - FEAT_LCD_CLK_SRC = 1 << 12, > -+ /* DSI-PLL power command 0x3 is not working */ > -+ FEAT_DSI_PLL_PWR_BUG = 1 << 13, > - }; > - > - /* DSS register field id */ > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0005-OMAP-DSS2- > fix-panel-Kconfig-dependencies.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0005-OMAP-DSS2-fix-panel-Kconfig-dependencies.patch > deleted file mode 100644 > index a827924..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0005-OMAP-DSS2-fix- > panel-Kconfig-dependencies.patch > +++ /dev/null > @@ -1,61 +0,0 @@ > -From fcb26a06fe1badfaaf7aaa68140c8b3370dd503e Mon Sep 17 00:00:00 > 2001 > -From: Tomi Valkeinen <tomi.valkeinen@ti.com> > -Date: Fri, 8 Apr 2011 09:30:27 +0300 > -Subject: [PATCH 05/32] OMAP: DSS2: fix panel Kconfig dependencies > - > -All DPI panels were missing dependency to OMAP2_DSS_DPI. Add the > -dependency. > - > -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > ---- > - drivers/video/omap2/displays/Kconfig | 9 +++++---- > - 1 files changed, 5 insertions(+), 4 deletions(-) > - > -diff --git a/drivers/video/omap2/displays/Kconfig > b/drivers/video/omap2/displays/Kconfig > -index d18ad6b..609a280 100644 > ---- a/drivers/video/omap2/displays/Kconfig > -+++ b/drivers/video/omap2/displays/Kconfig > -@@ -3,6 +3,7 @@ menu "OMAP2/3 Display Device Drivers" > - > - config PANEL_GENERIC_DPI > - tristate "Generic DPI Panel" > -+ depends on OMAP2_DSS_DPI > - help > - Generic DPI panel driver. > - Supports DVI output for Beagle and OMAP3 SDP. > -@@ -11,20 +12,20 @@ config PANEL_GENERIC_DPI > - > - config PANEL_LGPHILIPS_LB035Q02 > - tristate "LG.Philips LB035Q02 LCD Panel" > -- depends on OMAP2_DSS && SPI > -+ depends on OMAP2_DSS_DPI && SPI > - help > - LCD Panel used on the Gumstix Overo Palo35 > - > - config PANEL_SHARP_LS037V7DW01 > - tristate "Sharp LS037V7DW01 LCD Panel" > -- depends on OMAP2_DSS > -+ depends on OMAP2_DSS_DPI > - select BACKLIGHT_CLASS_DEVICE > - help > - LCD Panel used in TI's SDP3430 and EVM boards > - > - config PANEL_NEC_NL8048HL11_01B > - tristate "NEC NL8048HL11-01B Panel" > -- depends on OMAP2_DSS > -+ depends on OMAP2_DSS_DPI > - help > - This NEC NL8048HL11-01B panel is TFT LCD > - used in the Zoom2/3/3630 sdp boards. > -@@ -37,7 +38,7 @@ config PANEL_TAAL > - > - config PANEL_TPO_TD043MTEA1 > - tristate "TPO TD043MTEA1 LCD Panel" > -- depends on OMAP2_DSS && SPI > -+ depends on OMAP2_DSS_DPI && SPI > - help > - LCD Panel used in OMAP3 Pandora > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0006-OMAP-DSS2- > add-bootarg-for-selecting-svideo-or-compos.patch b/recipes-kernel/linux/linux- > omap-2.6.39/sakoman/0006-OMAP-DSS2-add-bootarg-for-selecting-svideo-or- > compos.patch > deleted file mode 100644 > index d899cb0..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0006-OMAP-DSS2-add- > bootarg-for-selecting-svideo-or-compos.patch > +++ /dev/null > @@ -1,75 +0,0 @@ > -From 4bd1d52fff974f5a5d0582f4fa4eae6e03e36fc1 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Tue, 19 Jan 2010 21:19:15 -0800 > -Subject: [PATCH 06/32] OMAP: DSS2: add bootarg for selecting svideo or > composite for tv output > - > -also add pal-16 and ntsc-16 omapfb.mode settings for 16bpp > ---- > - drivers/video/omap2/dss/venc.c | 22 ++++++++++++++++++++++ > - drivers/video/omap2/omapfb/omapfb-main.c | 10 +++++++++- > - 2 files changed, 31 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c > -index 8e35a5b..827723f 100644 > ---- a/drivers/video/omap2/dss/venc.c > -+++ b/drivers/video/omap2/dss/venc.c > -@@ -85,6 +85,11 @@ > - #define VENC_OUTPUT_TEST 0xC8 > - #define VENC_DAC_B__DAC_C 0xC8 > - > -+static char *tv_connection; > -+ > -+module_param_named(tvcable, tv_connection, charp, 0); > -+MODULE_PARM_DESC(tvcable, "TV connection type (svideo, composite)"); > -+ > - struct venc_config { > - u32 f_control; > - u32 vidout_ctrl; > -@@ -458,6 +463,23 @@ static int venc_panel_probe(struct omap_dss_device > *dssdev) > - { > - dssdev->panel.timings = omap_dss_pal_timings; > - > -+ /* Allow the TV output to be overriden */ > -+ if (tv_connection) { > -+ if (strcmp(tv_connection, "svideo") == 0) { > -+ printk(KERN_INFO > -+ "omapdss: tv output is svideo.\n"); > -+ dssdev->phy.venc.type = > OMAP_DSS_VENC_TYPE_SVIDEO; > -+ } else if (strcmp(tv_connection, "composite") == 0) { > -+ printk(KERN_INFO > -+ "omapdss: tv output is composite.\n"); > -+ dssdev->phy.venc.type = > OMAP_DSS_VENC_TYPE_COMPOSITE; > -+ } else { > -+ printk(KERN_INFO > -+ "omapdss: unsupported output type'%s'.\n", > -+ tv_connection); > -+ } > -+ } > -+ > - return 0; > - } > - > -diff --git a/drivers/video/omap2/omapfb/omapfb-main.c > b/drivers/video/omap2/omapfb/omapfb-main.c > -index 505ec66..eaeded5 100644 > ---- a/drivers/video/omap2/omapfb/omapfb-main.c > -+++ b/drivers/video/omap2/omapfb/omapfb-main.c > -@@ -2036,7 +2036,15 @@ static int omapfb_mode_to_timings(const char > *mode_str, > - int r; > - > - #ifdef CONFIG_OMAP2_DSS_VENC > -- if (strcmp(mode_str, "pal") == 0) { > -+ if (strcmp(mode_str, "pal-16") == 0) { > -+ *timings = omap_dss_pal_timings; > -+ *bpp = 16; > -+ return 0; > -+ } else if (strcmp(mode_str, "ntsc-16") == 0) { > -+ *timings = omap_dss_ntsc_timings; > -+ *bpp = 16; > -+ return 0; > -+ } else if (strcmp(mode_str, "pal") == 0) { > - *timings = omap_dss_pal_timings; > - *bpp = 24; > - return 0; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0007-video-add- > timings-for-hd720.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0007-video-add-timings-for-hd720.patch > deleted file mode 100644 > index b653e6c..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0007-video-add-timings- > for-hd720.patch > +++ /dev/null > @@ -1,27 +0,0 @@ > -From 6d87a3f85ac36205111b4fe71ad06976239cdbe7 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Sat, 19 Dec 2009 06:52:43 -0800 > -Subject: [PATCH 07/32] video: add timings for hd720 > - > ---- > - drivers/video/modedb.c | 4 ++++ > - 1 files changed, 4 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c > -index 48c3ea8..b320a30 100644 > ---- a/drivers/video/modedb.c > -+++ b/drivers/video/modedb.c > -@@ -103,6 +103,10 @@ static const struct fb_videomode modedb[] = { > - { NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, 0, > - FB_VMODE_NONINTERLACED }, > - > -+ /* 1280x720 @ 60 Hz, 45 kHz hsync, CEA 681-E Format 4 */ > -+ { "hd720", 60, 1280, 720, 13468, 220, 110, 20, 5, 40, 5, 0, > -+ FB_VMODE_NONINTERLACED }, > -+ > - /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ > - { NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, 0, > - FB_VMODE_INTERLACED }, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0008-drivers-net- > smsc911x-return-ENODEV-if-device-is-not-.patch b/recipes-kernel/linux/linux- > omap-2.6.39/sakoman/0008-drivers-net-smsc911x-return-ENODEV-if-device- > is-not-.patch > deleted file mode 100644 > index 1e0e057..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0008-drivers-net- > smsc911x-return-ENODEV-if-device-is-not-.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From 1e3fcfd74686fa8b02f93bb592cca458942058e4 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <sakoman@gmail.com> > -Date: Tue, 15 Dec 2009 15:17:44 -0800 > -Subject: [PATCH 08/32] drivers: net: smsc911x: return ENODEV if device is not > found > - > -Signed-off-by: Steve Sakoman <sakoman@gmail.com> > ---- > - drivers/net/smsc911x.c | 4 +++- > - 1 files changed, 3 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c > -index 4b42ecc..5c1202b 100644 > ---- a/drivers/net/smsc911x.c > -+++ b/drivers/net/smsc911x.c > -@@ -2028,8 +2028,10 @@ static int __devinit smsc911x_drv_probe(struct > platform_device *pdev) > - } > - > - retval = smsc911x_init(dev); > -- if (retval < 0) > -+ if (retval < 0) { > -+ retval = -ENODEV; > - goto out_unmap_io_3; > -+ } > - > - /* configure irq polarity and type before connecting isr */ > - if (pdata->config.irq_polarity == > SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0009-drivers- > input-touchscreen-ads7846-return-ENODEV-if-d.patch b/recipes- > kernel/linux/linux-omap-2.6.39/sakoman/0009-drivers-input-touchscreen- > ads7846-return-ENODEV-if-d.patch > deleted file mode 100644 > index f753684..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0009-drivers-input- > touchscreen-ads7846-return-ENODEV-if-d.patch > +++ /dev/null > @@ -1,47 +0,0 @@ > -From 078005a9c8b5913ed5eb7a7a9508e4b0a5b18c30 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <sakoman@gmail.com> > -Date: Tue, 15 Dec 2009 15:24:10 -0800 > -Subject: [PATCH 09/32] drivers: input: touchscreen: ads7846: return ENODEV > if device is not found > - > -Signed-off-by: Steve Sakoman <sakoman@gmail.com> > ---- > - drivers/input/touchscreen/ads7846.c | 13 ++++++++++--- > - 1 files changed, 10 insertions(+), 3 deletions(-) > - > -diff --git a/drivers/input/touchscreen/ads7846.c > b/drivers/input/touchscreen/ads7846.c > -index 1de1c19..097db10 100644 > ---- a/drivers/input/touchscreen/ads7846.c > -+++ b/drivers/input/touchscreen/ads7846.c > -@@ -1338,11 +1338,18 @@ static int __devinit ads7846_probe(struct > spi_device *spi) > - * the touchscreen, in case it's not connected. > - */ > - if (ts->model == 7845) > -- ads7845_read12_ser(&spi->dev, PWRDOWN); > -+ err = ads7845_read12_ser(&spi->dev, PWRDOWN); > - else > -- (void) ads7846_read12_ser(&spi->dev, > -+ err = ads7846_read12_ser(&spi->dev, > - READ_12BIT_SER(vaux) | > ADS_PD10_ALL_ON); > - > -+ /* if sample is all 0's or all 1's then there is no device on spi */ > -+ if ( (err == 0x000) || (err == 0xfff)) { > -+ dev_info(&spi->dev, "no device detected, test read result was > 0x%08X\n", err); > -+ err = -ENODEV; > -+ goto err_free_irq; > -+ } > -+ > - err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group); > - if (err) > - goto err_remove_hwmon; > -@@ -1366,7 +1373,7 @@ static int __devinit ads7846_probe(struct > spi_device *spi) > - err_put_regulator: > - regulator_put(ts->reg); > - err_free_gpio: > -- if (!ts->get_pendown_state) > -+ if (!ts->get_pendown_state && ts->gpio_pendown != -1) > - gpio_free(ts->gpio_pendown); > - err_cleanup_filter: > - if (ts->filter_cleanup) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0010-Revert- > omap2_mcspi-Flush-posted-writes.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0010-Revert-omap2_mcspi-Flush-posted-writes.patch > deleted file mode 100644 > index 6c76843..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0010-Revert- > omap2_mcspi-Flush-posted-writes.patch > +++ /dev/null > @@ -1,25 +0,0 @@ > -From ae16b19238b8d0609612d0e1f1a419d293f17c80 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Thu, 3 Mar 2011 13:29:30 -0800 > -Subject: [PATCH 10/32] Revert "omap2_mcspi: Flush posted writes" > - > -This reverts commit a330ce2001b290c59fe98c37e981683ef0a75fdf. > ---- > - drivers/spi/omap2_mcspi.c | 1 - > - 1 files changed, 0 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c > -index 6f86ba0..6094be7 100644 > ---- a/drivers/spi/omap2_mcspi.c > -+++ b/drivers/spi/omap2_mcspi.c > -@@ -195,7 +195,6 @@ static inline void mcspi_write_chconf0(const struct > spi_device *spi, u32 val) > - > - cs->chconf0 = val; > - mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, val); > -- mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0); > - } > - > - static void omap2_mcspi_set_dma_req(const struct spi_device *spi, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert- > omap_hsmmc-improve-interrupt-synchronisation.patch b/recipes- > kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert-omap_hsmmc-improve- > interrupt-synchronisation.patch > deleted file mode 100644 > index 78381e9..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0011-Revert- > omap_hsmmc-improve-interrupt-synchronisation.patch > +++ /dev/null > @@ -1,482 +0,0 @@ > -From 3a66cefdf60033381c623b0425345c41e8c078fe Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Fri, 19 Nov 2010 15:11:19 -0800 > -Subject: [PATCH 11/32] Revert "omap_hsmmc: improve interrupt > synchronisation" > - > -This reverts commit b417577d3b9bbb06a4ddc9aa955af9bd503f7242. > - > -Conflicts: > - > - drivers/mmc/host/omap_hsmmc.c > ---- > - drivers/mmc/host/omap_hsmmc.c | 267 ++++++++++++++++++++------------- > -------- > - 1 files changed, 128 insertions(+), 139 deletions(-) > - > -diff --git a/drivers/mmc/host/omap_hsmmc.c > b/drivers/mmc/host/omap_hsmmc.c > -index 259ece0..15a023b 100644 > ---- a/drivers/mmc/host/omap_hsmmc.c > -+++ b/drivers/mmc/host/omap_hsmmc.c > -@@ -159,10 +159,12 @@ struct omap_hsmmc_host { > - */ > - struct regulator *vcc; > - struct regulator *vcc_aux; > -+ struct semaphore sem; > - struct work_struct mmc_carddetect_work; > - void __iomem *base; > - resource_size_t mapbase; > - spinlock_t irq_lock; /* Prevent races with irq handler */ > -+ unsigned long flags; > - unsigned int id; > - unsigned int dma_len; > - unsigned int dma_sg_idx; > -@@ -183,7 +185,6 @@ struct omap_hsmmc_host { > - int protect_card; > - int reqs_blocked; > - int use_reg; > -- int req_in_progress; > - > - struct omap_mmc_platform_data *pdata; > - }; > -@@ -556,32 +557,6 @@ static void omap_hsmmc_stop_clock(struct > omap_hsmmc_host *host) > - dev_dbg(mmc_dev(host->mmc), "MMC Clock is not > stoped\n"); > - } > - > --static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, > -- struct mmc_command *cmd) > --{ > -- unsigned int irq_mask; > -- > -- if (host->use_dma) > -- irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); > -- else > -- irq_mask = INT_EN_MASK; > -- > -- /* Disable timeout for erases */ > -- if (cmd->opcode == MMC_ERASE) > -- irq_mask &= ~DTO_ENABLE; > -- > -- OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); > -- OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); > -- OMAP_HSMMC_WRITE(host->base, IE, irq_mask); > --} > -- > --static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) > --{ > -- OMAP_HSMMC_WRITE(host->base, ISE, 0); > -- OMAP_HSMMC_WRITE(host->base, IE, 0); > -- OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); > --} > -- > - #ifdef CONFIG_PM > - > - /* > -@@ -650,7 +625,9 @@ static int omap_hsmmc_context_restore(struct > omap_hsmmc_host *host) > - && time_before(jiffies, timeout)) > - ; > - > -- omap_hsmmc_disable_irq(host); > -+ OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); > -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); > -+ OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); > - > - /* Do not initialize card-specific things if the power is off */ > - if (host->power_mode == MMC_POWER_OFF) > -@@ -753,8 +730,6 @@ static void send_init_stream(struct > omap_hsmmc_host *host) > - return; > - > - disable_irq(host->irq); > -- > -- OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); > - OMAP_HSMMC_WRITE(host->base, CON, > - OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); > - OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); > -@@ -820,7 +795,17 @@ omap_hsmmc_start_command(struct > omap_hsmmc_host *host, struct mmc_command *cmd, > - mmc_hostname(host->mmc), cmd->opcode, cmd->arg); > - host->cmd = cmd; > - > -- omap_hsmmc_enable_irq(host, cmd); > -+ /* > -+ * Clear status bits and enable interrupts > -+ */ > -+ OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); > -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); > -+ > -+ if (host->use_dma) > -+ OMAP_HSMMC_WRITE(host->base, IE, > -+ INT_EN_MASK & ~(BRR_ENABLE | > BWR_ENABLE)); > -+ else > -+ OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); > - > - host->response_busy = 0; > - if (cmd->flags & MMC_RSP_PRESENT) { > -@@ -854,7 +839,13 @@ omap_hsmmc_start_command(struct > omap_hsmmc_host *host, struct mmc_command *cmd, > - if (host->use_dma) > - cmdreg |= DMA_EN; > - > -- host->req_in_progress = 1; > -+ /* > -+ * In an interrupt context (i.e. STOP command), the spinlock is unlocked > -+ * by the interrupt handler, otherwise (i.e. for a new request) it is > -+ * unlocked here. > -+ */ > -+ if (!in_interrupt()) > -+ spin_unlock_irqrestore(&host->irq_lock, host->flags); > - > - OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); > - OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); > -@@ -869,23 +860,6 @@ omap_hsmmc_get_dma_dir(struct > omap_hsmmc_host *host, struct mmc_data *data) > - return DMA_FROM_DEVICE; > - } > - > --static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, > struct mmc_request *mrq) > --{ > -- int dma_ch; > -- > -- spin_lock(&host->irq_lock); > -- host->req_in_progress = 0; > -- dma_ch = host->dma_ch; > -- spin_unlock(&host->irq_lock); > -- > -- omap_hsmmc_disable_irq(host); > -- /* Do not complete the request if DMA is still in progress */ > -- if (mrq->data && host->use_dma && dma_ch != -1) > -- return; > -- host->mrq = NULL; > -- mmc_request_done(host->mmc, mrq); > --} > -- > - /* > - * Notify the transfer complete to MMC core > - */ > -@@ -902,19 +876,25 @@ omap_hsmmc_xfer_done(struct > omap_hsmmc_host *host, struct mmc_data *data) > - return; > - } > - > -- omap_hsmmc_request_done(host, mrq); > -+ host->mrq = NULL; > -+ mmc_request_done(host->mmc, mrq); > - return; > - } > - > - host->data = NULL; > - > -+ if (host->use_dma && host->dma_ch != -1) > -+ dma_unmap_sg(mmc_dev(host->mmc), data->sg, host- > >dma_len, > -+ omap_hsmmc_get_dma_dir(host, data)); > -+ > - if (!data->error) > - data->bytes_xfered += data->blocks * (data->blksz); > - else > - data->bytes_xfered = 0; > - > - if (!data->stop) { > -- omap_hsmmc_request_done(host, data->mrq); > -+ host->mrq = NULL; > -+ mmc_request_done(host->mmc, data->mrq); > - return; > - } > - omap_hsmmc_start_command(host, data->stop, NULL); > -@@ -940,8 +920,10 @@ omap_hsmmc_cmd_done(struct > omap_hsmmc_host *host, struct mmc_command *cmd) > - cmd->resp[0] = OMAP_HSMMC_READ(host->base, > RSP10); > - } > - } > -- if ((host->data == NULL && !host->response_busy) || cmd->error) > -- omap_hsmmc_request_done(host, cmd->mrq); > -+ if ((host->data == NULL && !host->response_busy) || cmd->error) { > -+ host->mrq = NULL; > -+ mmc_request_done(host->mmc, cmd->mrq); > -+ } > - } > - > - /* > -@@ -949,19 +931,14 @@ omap_hsmmc_cmd_done(struct > omap_hsmmc_host *host, struct mmc_command *cmd) > - */ > - static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int > errno) > - { > -- int dma_ch; > -- > - host->data->error = errno; > - > -- spin_lock(&host->irq_lock); > -- dma_ch = host->dma_ch; > -- host->dma_ch = -1; > -- spin_unlock(&host->irq_lock); > -- > -- if (host->use_dma && dma_ch != -1) { > -+ if (host->use_dma && host->dma_ch != -1) { > - dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host- > >dma_len, > - omap_hsmmc_get_dma_dir(host, host->data)); > -- omap_free_dma(dma_ch); > -+ omap_free_dma(host->dma_ch); > -+ host->dma_ch = -1; > -+ up(&host->sem); > - } > - host->data = NULL; > - } > -@@ -1034,21 +1011,28 @@ static inline void > omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, > - __func__); > - } > - > --static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) > -+/* > -+ * MMC controller IRQ handler > -+ */ > -+static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) > - { > -+ struct omap_hsmmc_host *host = dev_id; > - struct mmc_data *data; > -- int end_cmd = 0, end_trans = 0; > -- > -- if (!host->req_in_progress) { > -- do { > -- OMAP_HSMMC_WRITE(host->base, STAT, status); > -- /* Flush posted write */ > -- status = OMAP_HSMMC_READ(host->base, STAT); > -- } while (status & INT_EN_MASK); > -- return; > -+ int end_cmd = 0, end_trans = 0, status; > -+ > -+ spin_lock(&host->irq_lock); > -+ > -+ if (host->mrq == NULL) { > -+ OMAP_HSMMC_WRITE(host->base, STAT, > -+ OMAP_HSMMC_READ(host->base, STAT)); > -+ /* Flush posted write */ > -+ OMAP_HSMMC_READ(host->base, STAT); > -+ spin_unlock(&host->irq_lock); > -+ return IRQ_HANDLED; > - } > - > - data = host->data; > -+ status = OMAP_HSMMC_READ(host->base, STAT); > - dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); > - > - if (status & ERR) { > -@@ -1101,27 +1085,15 @@ static void omap_hsmmc_do_irq(struct > omap_hsmmc_host *host, int status) > - } > - > - OMAP_HSMMC_WRITE(host->base, STAT, status); > -+ /* Flush posted write */ > -+ OMAP_HSMMC_READ(host->base, STAT); > - > - if (end_cmd || ((status & CC) && host->cmd)) > - omap_hsmmc_cmd_done(host, host->cmd); > - if ((end_trans || (status & TC)) && host->mrq) > - omap_hsmmc_xfer_done(host, data); > --} > -- > --/* > -- * MMC controller IRQ handler > -- */ > --static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) > --{ > -- struct omap_hsmmc_host *host = dev_id; > -- int status; > - > -- status = OMAP_HSMMC_READ(host->base, STAT); > -- do { > -- omap_hsmmc_do_irq(host, status); > -- /* Flush posted write */ > -- status = OMAP_HSMMC_READ(host->base, STAT); > -- } while (status & INT_EN_MASK); > -+ spin_unlock(&host->irq_lock); > - > - return IRQ_HANDLED; > - } > -@@ -1316,11 +1288,9 @@ static void > omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, > - /* > - * DMA call back function > - */ > --static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) > -+static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *data) > - { > -- struct omap_hsmmc_host *host = cb_data; > -- struct mmc_data *data = host->mrq->data; > -- int dma_ch, req_in_progress; > -+ struct omap_hsmmc_host *host = data; > - > - if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { > - dev_warn(mmc_dev(host->mmc), "unexpected dma status > %x\n", > -@@ -1328,38 +1298,24 @@ static void omap_hsmmc_dma_cb(int lch, u16 > ch_status, void *cb_data) > - return; > - } > - > -- spin_lock(&host->irq_lock); > -- if (host->dma_ch < 0) { > -- spin_unlock(&host->irq_lock); > -+ if (host->dma_ch < 0) > - return; > -- } > - > - host->dma_sg_idx++; > - if (host->dma_sg_idx < host->dma_len) { > - /* Fire up the next transfer. */ > -- omap_hsmmc_config_dma_params(host, data, > -- data->sg + host->dma_sg_idx); > -- spin_unlock(&host->irq_lock); > -+ omap_hsmmc_config_dma_params(host, host->data, > -+ host->data->sg + host->dma_sg_idx); > - return; > - } > - > -- dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, > -- omap_hsmmc_get_dma_dir(host, data)); > -- > -- req_in_progress = host->req_in_progress; > -- dma_ch = host->dma_ch; > -+ omap_free_dma(host->dma_ch); > - host->dma_ch = -1; > -- spin_unlock(&host->irq_lock); > -- > -- omap_free_dma(dma_ch); > -- > -- /* If DMA has finished after TC, complete the request */ > -- if (!req_in_progress) { > -- struct mmc_request *mrq = host->mrq; > -- > -- host->mrq = NULL; > -- mmc_request_done(host->mmc, mrq); > -- } > -+ /* > -+ * DMA Callback: run in interrupt context. > -+ * mutex_unlock will throw a kernel warning if used. > -+ */ > -+ up(&host->sem); > - } > - > - /* > -@@ -1368,7 +1324,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 > ch_status, void *cb_data) > - static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, > - struct mmc_request *req) > - { > -- int dma_ch = 0, ret = 0, i; > -+ int dma_ch = 0, ret = 0, err = 1, i; > - struct mmc_data *data = req->data; > - > - /* Sanity check: all the SG entries must be aligned by block size. */ > -@@ -1385,7 +1341,23 @@ static int > omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, > - */ > - return -EINVAL; > - > -- BUG_ON(host->dma_ch != -1); > -+ /* > -+ * If for some reason the DMA transfer is still active, > -+ * we wait for timeout period and free the dma > -+ */ > -+ if (host->dma_ch != -1) { > -+ set_current_state(TASK_UNINTERRUPTIBLE); > -+ schedule_timeout(100); > -+ if (down_trylock(&host->sem)) { > -+ omap_free_dma(host->dma_ch); > -+ host->dma_ch = -1; > -+ up(&host->sem); > -+ return err; > -+ } > -+ } else { > -+ if (down_trylock(&host->sem)) > -+ return err; > -+ } > - > - ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, > data), > - "MMC/SD", omap_hsmmc_dma_cb, host, > &dma_ch); > -@@ -1485,27 +1457,37 @@ static void omap_hsmmc_request(struct > mmc_host *mmc, struct mmc_request *req) > - struct omap_hsmmc_host *host = mmc_priv(mmc); > - int err; > - > -- BUG_ON(host->req_in_progress); > -- BUG_ON(host->dma_ch != -1); > -- if (host->protect_card) { > -- if (host->reqs_blocked < 3) { > -- /* > -- * Ensure the controller is left in a consistent > -- * state by resetting the command and data state > -- * machines. > -- */ > -- omap_hsmmc_reset_controller_fsm(host, SRD); > -- omap_hsmmc_reset_controller_fsm(host, SRC); > -- host->reqs_blocked += 1; > -- } > -- req->cmd->error = -EBADF; > -- if (req->data) > -- req->data->error = -EBADF; > -- req->cmd->retries = 0; > -- mmc_request_done(mmc, req); > -- return; > -- } else if (host->reqs_blocked) > -- host->reqs_blocked = 0; > -+ /* > -+ * Prevent races with the interrupt handler because of unexpected > -+ * interrupts, but not if we are already in interrupt context i.e. > -+ * retries. > -+ */ > -+ if (!in_interrupt()) { > -+ spin_lock_irqsave(&host->irq_lock, host->flags); > -+ /* > -+ * Protect the card from I/O if there is a possibility > -+ * it can be removed. > -+ */ > -+ if (host->protect_card) { > -+ if (host->reqs_blocked < 3) { > -+ /* > -+ * Ensure the controller is left in a consistent > -+ * state by resetting the command and data > state > -+ * machines. > -+ */ > -+ omap_hsmmc_reset_controller_fsm(host, > SRD); > -+ omap_hsmmc_reset_controller_fsm(host, > SRC); > -+ host->reqs_blocked += 1; > -+ } > -+ req->cmd->error = -EBADF; > -+ if (req->data) > -+ req->data->error = -EBADF; > -+ spin_unlock_irqrestore(&host->irq_lock, host->flags); > -+ mmc_request_done(mmc, req); > -+ return; > -+ } else if (host->reqs_blocked) > -+ host->reqs_blocked = 0; > -+ } > - WARN_ON(host->mrq != NULL); > - host->mrq = req; > - err = omap_hsmmc_prepare_data(host, req); > -@@ -1514,6 +1496,8 @@ static void omap_hsmmc_request(struct mmc_host > *mmc, struct mmc_request *req) > - if (req->data) > - req->data->error = err; > - host->mrq = NULL; > -+ if (!in_interrupt()) > -+ spin_unlock_irqrestore(&host->irq_lock, host->flags); > - mmc_request_done(mmc, req); > - return; > - } > -@@ -2093,6 +2077,7 @@ static int __init omap_hsmmc_probe(struct > platform_device *pdev) > - mmc->f_min = 400000; > - mmc->f_max = 52000000; > - > -+ sema_init(&host->sem, 1); > - spin_lock_init(&host->irq_lock); > - > - host->iclk = clk_get(&pdev->dev, "ick"); > -@@ -2235,7 +2220,8 @@ static int __init omap_hsmmc_probe(struct > platform_device *pdev) > - pdata->resume = omap_hsmmc_resume_cdirq; > - } > - > -- omap_hsmmc_disable_irq(host); > -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); > -+ OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); > - > - mmc_host_lazy_disable(host->mmc); > - > -@@ -2356,7 +2342,10 @@ static int omap_hsmmc_suspend(struct device > *dev) > - ret = mmc_suspend_host(host->mmc); > - mmc_host_enable(host->mmc); > - if (ret == 0) { > -- omap_hsmmc_disable_irq(host); > -+ OMAP_HSMMC_WRITE(host->base, ISE, 0); > -+ OMAP_HSMMC_WRITE(host->base, IE, 0); > -+ > -+ > - OMAP_HSMMC_WRITE(host->base, HCTL, > - OMAP_HSMMC_READ(host->base, HCTL) & > ~SDBP); > - mmc_host_disable(host->mmc); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0012-Don-t-turn- > SDIO-cards-off-to-save-power.-Doing-so-wi.patch b/recipes-kernel/linux/linux- > omap-2.6.39/sakoman/0012-Don-t-turn-SDIO-cards-off-to-save-power.-Doing- > so-wi.patch > deleted file mode 100644 > index 1c86b22..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0012-Don-t-turn-SDIO- > cards-off-to-save-power.-Doing-so-wi.patch > +++ /dev/null > @@ -1,51 +0,0 @@ > -From 75d9413d575f724e1f7c006fdef374fb1c200346 Mon Sep 17 00:00:00 > 2001 > -From: David Vrabel <david.vrabel@csr.com> > -Date: Fri, 2 Apr 2010 08:41:47 -0700 > -Subject: [PATCH 12/32] Don't turn SDIO cards off to save power. Doing so will > lose all internal state in the card. > - > -Signed-off-by: David Vrabel <david.vrabel@csr.com> > ---- > - drivers/mmc/host/omap_hsmmc.c | 12 ++++++++---- > - 1 files changed, 8 insertions(+), 4 deletions(-) > - > -diff --git a/drivers/mmc/host/omap_hsmmc.c > b/drivers/mmc/host/omap_hsmmc.c > -index 15a023b..83f93ab 100644 > ---- a/drivers/mmc/host/omap_hsmmc.c > -+++ b/drivers/mmc/host/omap_hsmmc.c > -@@ -29,6 +29,7 @@ > - #include <linux/mmc/host.h> > - #include <linux/mmc/core.h> > - #include <linux/mmc/mmc.h> > -+#include <linux/mmc/card.h> > - #include <linux/io.h> > - #include <linux/semaphore.h> > - #include <linux/gpio.h> > -@@ -1760,8 +1761,12 @@ static int omap_hsmmc_sleep_to_off(struct > omap_hsmmc_host *host) > - mmc_slot(host).card_detect || > - (mmc_slot(host).get_cover_state && > - mmc_slot(host).get_cover_state(host->dev, host->slot_id)))) { > -- mmc_release_host(host->mmc); > -- return 0; > -+ goto out; > -+ } > -+ > -+ /* Don't turn SDIO cards off. */ > -+ if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { > -+ goto out; > - } > - > - mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); > -@@ -1772,9 +1777,8 @@ static int omap_hsmmc_sleep_to_off(struct > omap_hsmmc_host *host) > - host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); > - > - host->dpm_state = OFF; > -- > -+out: > - mmc_release_host(host->mmc); > -- > - return 0; > - } > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0013-Enable-the- > use-of-SDIO-card-interrupts.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0013-Enable-the-use-of-SDIO-card-interrupts.patch > deleted file mode 100644 > index 59d5ec4..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0013-Enable-the-use-of- > SDIO-card-interrupts.patch > +++ /dev/null > @@ -1,288 +0,0 @@ > -From 948eeb1f03da5fca0f6734c10efbc35ad63a1d08 Mon Sep 17 00:00:00 > 2001 > -From: David Vrabel <david.vrabel@csr.com> > -Date: Fri, 2 Apr 2010 08:42:22 -0700 > -Subject: [PATCH 13/32] Enable the use of SDIO card interrupts. > - > -FCLK must be enabled while SDIO interrupts are enabled or the MMC > -module won't wake-up (even though ENAWAKEUP in SYSCONFIG and IWE in > -HTCL have been set). Enabling the MMC module to wake-up would require > -configuring the MMC module (and the mmci_dat[1] GPIO when the CORE > -power domain is OFF) as wake-up sources in the PRCM. > - > -The writes to STAT and ISE when starting a command are unnecessary and > -have been removed. > - > -Signed-off-by: David Vrabel <david.vrabel@csr.com> > ---- > - drivers/mmc/host/omap_hsmmc.c | 118 > +++++++++++++++++++++++++++++------------ > - 1 files changed, 83 insertions(+), 35 deletions(-) > - > -diff --git a/drivers/mmc/host/omap_hsmmc.c > b/drivers/mmc/host/omap_hsmmc.c > -index 83f93ab..d57686c 100644 > ---- a/drivers/mmc/host/omap_hsmmc.c > -+++ b/drivers/mmc/host/omap_hsmmc.c > -@@ -67,6 +67,7 @@ > - #define SDVS_MASK 0x00000E00 > - #define SDVSCLR 0xFFFFF1FF > - #define SDVSDET 0x00000400 > -+#define ENAWAKEUP (1 << 2) > - #define AUTOIDLE 0x1 > - #define SDBP (1 << 8) > - #define DTO 0xe > -@@ -77,10 +78,13 @@ > - #define CLKD_SHIFT 6 > - #define DTO_MASK 0x000F0000 > - #define DTO_SHIFT 16 > -+#define CIRQ_ENABLE (1 << 8) > - #define INT_EN_MASK 0x307F0033 > - #define BWR_ENABLE (1 << 4) > - #define BRR_ENABLE (1 << 5) > - #define DTO_ENABLE (1 << 20) > -+#define CTPL (1 << 11) > -+#define CLKEXTFREE (1 << 16) > - #define INIT_STREAM (1 << 1) > - #define DP_SELECT (1 << 21) > - #define DDIR (1 << 4) > -@@ -88,10 +92,12 @@ > - #define MSBS (1 << 5) > - #define BCE (1 << 1) > - #define FOUR_BIT (1 << 1) > -+#define IWE (1 << 24) > - #define DW8 (1 << 5) > - #define CC 0x1 > - #define TC 0x02 > - #define OD 0x1 > -+#define CIRQ (1 << 8) > - #define ERR (1 << 15) > - #define CMD_TIMEOUT (1 << 16) > - #define DATA_TIMEOUT (1 << 20) > -@@ -186,6 +192,7 @@ struct omap_hsmmc_host { > - int protect_card; > - int reqs_blocked; > - int use_reg; > -+ int sdio_int; > - > - struct omap_mmc_platform_data *pdata; > - }; > -@@ -598,7 +605,7 @@ static int omap_hsmmc_context_restore(struct > omap_hsmmc_host *host) > - ; > - > - OMAP_HSMMC_WRITE(host->base, SYSCONFIG, > -- OMAP_HSMMC_READ(host->base, SYSCONFIG) | > AUTOIDLE); > -+ OMAP_HSMMC_READ(host->base, SYSCONFIG) | > AUTOIDLE | ENAWAKEUP); > - > - if (host->id == OMAP_MMC1_DEVID) { > - if (host->power_mode != MMC_POWER_OFF && > -@@ -613,7 +620,7 @@ static int omap_hsmmc_context_restore(struct > omap_hsmmc_host *host) > - } > - > - OMAP_HSMMC_WRITE(host->base, HCTL, > -- OMAP_HSMMC_READ(host->base, HCTL) | hctl); > -+ OMAP_HSMMC_READ(host->base, HCTL) | hctl | IWE); > - > - OMAP_HSMMC_WRITE(host->base, CAPA, > - OMAP_HSMMC_READ(host->base, CAPA) | capa); > -@@ -627,7 +634,7 @@ static int omap_hsmmc_context_restore(struct > omap_hsmmc_host *host) > - ; > - > - OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); > -- OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); > -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ); > - OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); > - > - /* Do not initialize card-specific things if the power is off */ > -@@ -791,22 +798,19 @@ omap_hsmmc_start_command(struct > omap_hsmmc_host *host, struct mmc_command *cmd, > - struct mmc_data *data) > - { > - int cmdreg = 0, resptype = 0, cmdtype = 0; > -+ int int_en_mask = INT_EN_MASK; > - > - dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", > - mmc_hostname(host->mmc), cmd->opcode, cmd->arg); > - host->cmd = cmd; > - > -- /* > -- * Clear status bits and enable interrupts > -- */ > -- OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); > -- OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); > -- > - if (host->use_dma) > -- OMAP_HSMMC_WRITE(host->base, IE, > -- INT_EN_MASK & ~(BRR_ENABLE | > BWR_ENABLE)); > -- else > -- OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); > -+ int_en_mask &= ~(BRR_ENABLE | BWR_ENABLE); > -+ > -+ if (host->sdio_int) > -+ int_en_mask |= CIRQ; > -+ > -+ OMAP_HSMMC_WRITE(host->base, IE, int_en_mask); > - > - host->response_busy = 0; > - if (cmd->flags & MMC_RSP_PRESENT) { > -@@ -1019,23 +1023,26 @@ static irqreturn_t omap_hsmmc_irq(int irq, void > *dev_id) > - { > - struct omap_hsmmc_host *host = dev_id; > - struct mmc_data *data; > -- int end_cmd = 0, end_trans = 0, status; > -+ u32 status; > -+ int end_cmd = 0, end_trans = 0; > -+ bool card_irq = false; > - > - spin_lock(&host->irq_lock); > - > -- if (host->mrq == NULL) { > -- OMAP_HSMMC_WRITE(host->base, STAT, > -- OMAP_HSMMC_READ(host->base, STAT)); > -- /* Flush posted write */ > -- OMAP_HSMMC_READ(host->base, STAT); > -- spin_unlock(&host->irq_lock); > -- return IRQ_HANDLED; > -- } > -- > -- data = host->data; > - status = OMAP_HSMMC_READ(host->base, STAT); > -+ OMAP_HSMMC_WRITE(host->base, STAT, status); > -+ OMAP_HSMMC_READ(host->base, STAT); /* Flush posted write. */ > -+ > - dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); > - > -+ if (status & CIRQ) > -+ card_irq = true; > -+ > -+ if (host->mrq == NULL) > -+ goto out; > -+ > -+ data = host->data; > -+ > - if (status & ERR) { > - #ifdef CONFIG_MMC_DEBUG > - omap_hsmmc_report_irq(host, status); > -@@ -1085,17 +1092,16 @@ static irqreturn_t omap_hsmmc_irq(int irq, void > *dev_id) > - } > - } > - > -- OMAP_HSMMC_WRITE(host->base, STAT, status); > -- /* Flush posted write */ > -- OMAP_HSMMC_READ(host->base, STAT); > -- > - if (end_cmd || ((status & CC) && host->cmd)) > - omap_hsmmc_cmd_done(host, host->cmd); > - if ((end_trans || (status & TC)) && host->mrq) > - omap_hsmmc_xfer_done(host, data); > -- > -+out: > - spin_unlock(&host->irq_lock); > - > -+ if (card_irq) > -+ mmc_signal_sdio_irq(host->mmc); > -+ > - return IRQ_HANDLED; > - } > - > -@@ -1643,6 +1649,47 @@ static void omap_hsmmc_init_card(struct > mmc_host *mmc, struct mmc_card *card) > - mmc_slot(host).init_card(card); > - } > - > -+static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int > enable) > -+{ > -+ struct omap_hsmmc_host *host = mmc_priv(mmc); > -+ u32 ie, con; > -+ unsigned long flags; > -+ > -+ spin_lock_irqsave(&host->irq_lock, flags); > -+ > -+ /* > -+ * When interrupts are enabled, CTPL must be set to enable > -+ * DAT1 input buffer (or the card interrupt is always > -+ * asserted) and FCLK must be enabled as wake-up does not > -+ * work. Take care to disable FCLK after all the register > -+ * accesses as they might not complete if FCLK is off. > -+ * > -+ * FIXME: if the MMC module (and the mmci_dat[1] GPIO when the > -+ * CORE power domain is OFF) are configured as a wake-up > -+ * sources in the PRCM, then FCLK could be switched off. This > -+ * might add too much latency. > -+ */ > -+ con = OMAP_HSMMC_READ(host->base, CON); > -+ ie = OMAP_HSMMC_READ(host->base, IE); > -+ if (enable) { > -+ clk_enable(host->fclk); > -+ ie |= CIRQ_ENABLE; > -+ con |= CTPL | CLKEXTFREE; > -+ host->sdio_int = 1; > -+ } else { > -+ ie &= ~CIRQ_ENABLE; > -+ con &= ~(CTPL | CLKEXTFREE); > -+ host->sdio_int = 0; > -+ } > -+ OMAP_HSMMC_WRITE(host->base, CON, con); > -+ OMAP_HSMMC_WRITE(host->base, IE, ie); > -+ OMAP_HSMMC_READ(host->base, IE); /* flush posted write */ > -+ if (!enable) > -+ clk_disable(host->fclk); > -+ > -+ spin_unlock_irqrestore(&host->irq_lock, flags); > -+} > -+ > - static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) > - { > - u32 hctl, capa, value; > -@@ -1657,14 +1704,14 @@ static void > omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) > - } > - > - value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; > -- OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); > -+ OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl | IWE); > - > - value = OMAP_HSMMC_READ(host->base, CAPA); > - OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); > - > - /* Set the controller to AUTO IDLE mode */ > - value = OMAP_HSMMC_READ(host->base, SYSCONFIG); > -- OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); > -+ OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE | > ENAWAKEUP); > - > - /* Set SD bus power bit */ > - set_sd_bus_power(host); > -@@ -1918,7 +1965,7 @@ static const struct mmc_host_ops > omap_hsmmc_ops = { > - .get_cd = omap_hsmmc_get_cd, > - .get_ro = omap_hsmmc_get_ro, > - .init_card = omap_hsmmc_init_card, > -- /* NYET -- enable_sdio_irq */ > -+ .enable_sdio_irq = omap_hsmmc_enable_sdio_irq, > - }; > - > - static const struct mmc_host_ops omap_hsmmc_ps_ops = { > -@@ -1929,7 +1976,7 @@ static const struct mmc_host_ops > omap_hsmmc_ps_ops = { > - .get_cd = omap_hsmmc_get_cd, > - .get_ro = omap_hsmmc_get_ro, > - .init_card = omap_hsmmc_init_card, > -- /* NYET -- enable_sdio_irq */ > -+ .enable_sdio_irq = omap_hsmmc_enable_sdio_irq, > - }; > - > - #ifdef CONFIG_DEBUG_FS > -@@ -2145,7 +2192,8 @@ static int __init omap_hsmmc_probe(struct > platform_device *pdev) > - mmc->max_seg_size = mmc->max_req_size; > - > - mmc->caps |= MMC_CAP_MMC_HIGHSPEED | > MMC_CAP_SD_HIGHSPEED | > -- MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; > -+ MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE | > -+ MMC_CAP_SDIO_IRQ; > - > - mmc->caps |= mmc_slot(host).caps; > - if (mmc->caps & MMC_CAP_8_BIT_DATA) > -@@ -2224,7 +2272,7 @@ static int __init omap_hsmmc_probe(struct > platform_device *pdev) > - pdata->resume = omap_hsmmc_resume_cdirq; > - } > - > -- OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); > -+ OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ); > - OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); > - > - mmc_host_lazy_disable(host->mmc); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0014-soc-codecs- > Enable-audio-capture-by-default-for-twl40.patch b/recipes-kernel/linux/linux- > omap-2.6.39/sakoman/0014-soc-codecs-Enable-audio-capture-by-default-for- > twl40.patch > deleted file mode 100644 > index d6e8287..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0014-soc-codecs- > Enable-audio-capture-by-default-for-twl40.patch > +++ /dev/null > @@ -1,27 +0,0 @@ > -From f646d3df7a7160fd80f20416c4a0fce55946f527 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Thu, 17 Dec 2009 12:45:20 -0800 > -Subject: [PATCH 14/32] soc: codecs: Enable audio capture by default for > twl4030 > - > ---- > - sound/soc/codecs/twl4030.c | 4 ++-- > - 1 files changed, 2 insertions(+), 2 deletions(-) > - > -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c > -index 575238d..bd51f72 100644 > ---- a/sound/soc/codecs/twl4030.c > -+++ b/sound/soc/codecs/twl4030.c > -@@ -56,8 +56,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] > = { > - 0x00, /* REG_OPTION (0x2) */ > - 0x00, /* REG_UNKNOWN (0x3) */ > - 0x00, /* REG_MICBIAS_CTL (0x4) */ > -- 0x00, /* REG_ANAMICL (0x5) */ > -- 0x00, /* REG_ANAMICR (0x6) */ > -+ 0x34, /* REG_ANAMICL (0x5) */ > -+ 0x14, /* REG_ANAMICR (0x6) */ > - 0x00, /* REG_AVADC_CTL (0x7) */ > - 0x00, /* REG_ADCMICSEL (0x8) */ > - 0x00, /* REG_DIGMIXING (0x9) */ > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0015-soc-codecs- > twl4030-Turn-on-mic-bias-by-default.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0015-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch > deleted file mode 100644 > index 04d9168..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0015-soc-codecs- > twl4030-Turn-on-mic-bias-by-default.patch > +++ /dev/null > @@ -1,25 +0,0 @@ > -From 00adf70cb5f8706ac5e7b1ec6f5a94f7e490b606 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Wed, 29 Dec 2010 11:39:16 -0800 > -Subject: [PATCH 15/32] soc: codecs: twl4030: Turn on mic bias by default > - > ---- > - sound/soc/codecs/twl4030.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c > -index bd51f72..8949773 100644 > ---- a/sound/soc/codecs/twl4030.c > -+++ b/sound/soc/codecs/twl4030.c > -@@ -55,7 +55,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] > = { > - 0x00, /* REG_CODEC_MODE (0x1) */ > - 0x00, /* REG_OPTION (0x2) */ > - 0x00, /* REG_UNKNOWN (0x3) */ > -- 0x00, /* REG_MICBIAS_CTL (0x4) */ > -+ 0x03, /* REG_MICBIAS_CTL (0x4) */ > - 0x34, /* REG_ANAMICL (0x5) */ > - 0x14, /* REG_ANAMICR (0x6) */ > - 0x00, /* REG_AVADC_CTL (0x7) */ > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0016-RTC-add- > support-for-backup-battery-recharge.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0016-RTC-add-support-for-backup-battery-recharge.patch > deleted file mode 100644 > index cb685cc..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0016-RTC-add-support- > for-backup-battery-recharge.patch > +++ /dev/null > @@ -1,55 +0,0 @@ > -From 6f432e1e39f276a41d600d1cc9cd17fc088877d8 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Thu, 4 Feb 2010 12:26:22 -0800 > -Subject: [PATCH 16/32] RTC: add support for backup battery recharge > - > ---- > - drivers/rtc/rtc-twl.c | 25 +++++++++++++++++++++++++ > - 1 files changed, 25 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c > -index f9a2799..713b8ea 100644 > ---- a/drivers/rtc/rtc-twl.c > -+++ b/drivers/rtc/rtc-twl.c > -@@ -30,6 +30,23 @@ > - > - #include <linux/i2c/twl.h> > - > -+/* > -+ * PM_RECEIVER block register offsets (use > TWL4030_MODULE_PM_RECEIVER) > -+ */ > -+#define REG_BB_CFG 0x12 > -+ > -+/* PM_RECEIVER BB_CFG bitfields */ > -+#define BIT_PM_RECEIVER_BB_CFG_BBCHEN 0x10 > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL 0x0C > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_2V5 0x00 > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V0 0x04 > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 0x08 > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3v2 0x0c > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL 0x03 > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA 0x00 > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_150UA 0x01 > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_500UA 0x02 > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_1MA 0x03 > - > - /* > - * RTC block register offsets (use TWL_MODULE_RTC) > -@@ -495,6 +512,14 @@ static int __devinit twl_rtc_probe(struct > platform_device *pdev) > - if (ret < 0) > - goto out2; > - > -+ /* enable backup battery charging */ > -+ /* use a conservative 25uA @ 3.1V */ > -+ ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > -+ BIT_PM_RECEIVER_BB_CFG_BBCHEN | > -+ BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 | > -+ BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA, > -+ REG_BB_CFG); > -+ > - return ret; > - > - out2: > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0017-ARM- > OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch b/recipes- > kernel/linux/linux-omap-2.6.39/sakoman/0017-ARM-OMAP2-mmc-twl4030- > move-clock-input-selection-pri.patch > deleted file mode 100644 > index 1e6ba8d..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0017-ARM-OMAP2- > mmc-twl4030-move-clock-input-selection-pri.patch > +++ /dev/null > @@ -1,39 +0,0 @@ > -From 56dc96df8ff5e3db6afde96d64d74200f85e59c2 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Sun, 24 Jan 2010 09:33:56 -0800 > -Subject: [PATCH 17/32] ARM: OMAP2: mmc-twl4030: move clock input > selection prior to vcc test > - > -otherwise it is not executed on systems that use non-twl regulators > ---- > - arch/arm/mach-omap2/hsmmc.c | 14 ++++++-------- > - 1 files changed, 6 insertions(+), 8 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach- > omap2/hsmmc.c > -index b2f30be..84d5ef6 100644 > ---- a/arch/arm/mach-omap2/hsmmc.c > -+++ b/arch/arm/mach-omap2/hsmmc.c > -@@ -185,15 +185,13 @@ static void hsmmc23_before_set_reg(struct device > *dev, int slot, > - if (mmc->slots[0].remux) > - mmc->slots[0].remux(dev, slot, power_on); > - > -- if (power_on) { > -- /* Only MMC2 supports a CLKIN */ > -- if (mmc->slots[0].internal_clock) { > -- u32 reg; > -+ /* Only MMC2 supports a CLKIN */ > -+ if (mmc->slots[0].internal_clock) { > -+ u32 reg; > - > -- reg = omap_ctrl_readl(control_devconf1_offset); > -- reg |= OMAP2_MMCSDIO2ADPCLKISEL; > -- omap_ctrl_writel(reg, control_devconf1_offset); > -- } > -+ reg = omap_ctrl_readl(control_devconf1_offset); > -+ reg |= OMAP2_MMCSDIO2ADPCLKISEL; > -+ omap_ctrl_writel(reg, control_devconf1_offset); > - } > - } > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0018-Add-power- > off-support-for-the-TWL4030-companion.patch b/recipes-kernel/linux/linux- > omap-2.6.39/sakoman/0018-Add-power-off-support-for-the-TWL4030- > companion.patch > deleted file mode 100644 > index 3086027..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0018-Add-power-off- > support-for-the-TWL4030-companion.patch > +++ /dev/null > @@ -1,103 +0,0 @@ > -From 8c257a6e7460ceb8c899980f7dad701ceb619adc Mon Sep 17 00:00:00 > 2001 > -From: =?UTF-8?q?Bernhard=20W=C3=B6rndl-Aichriedler?= > <bwa@xdevelop.at> > -Date: Sat, 15 May 2010 16:34:05 +0200 > -Subject: [PATCH 18/32] Add power-off support for the TWL4030 companion > - > -This patch adds support for the power-off on shutdown feature of the > TWL4030 > ---- > - drivers/mfd/Kconfig | 6 ++++++ > - drivers/mfd/twl-core.c | 40 > ++++++++++++++++++++++++++++++++++++++++ > - 2 files changed, 46 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig > -index 3ed3ff0..fe2370a 100644 > ---- a/drivers/mfd/Kconfig > -+++ b/drivers/mfd/Kconfig > -@@ -210,6 +210,12 @@ config TWL4030_CODEC > - select MFD_CORE > - default n > - > -+config TWL4030_POWEROFF > -+ bool "TWL4030 Allow power-off on shutdown" > -+ depends on TWL4030_CORE > -+ help > -+ Enables the CPU to power-off the system on shutdown > -+ > - config TWL6030_PWM > - tristate "TWL6030 PWM (Pulse Width Modulator) Support" > - depends on TWL4030_CORE > -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c > -index 960b5be..8804550 100644 > ---- a/drivers/mfd/twl-core.c > -+++ b/drivers/mfd/twl-core.c > -@@ -122,6 +122,12 @@ > - #define twl_has_bci() false > - #endif > - > -+#if defined (CONFIG_TWL4030_POWEROFF) > -+#define twl_has_poweroff() true > -+#else > -+#define twl_has_poweroff() false > -+#endif > -+ > - /* Triton Core internal information (BEGIN) */ > - > - /* Last - for index max*/ > -@@ -224,6 +230,10 @@ > - #define TWL5031 BIT(2) /* twl5031 has different > registers */ > - #define TWL6030_CLASS BIT(3) /* TWL6030 class */ > - > -+/* for pm_power_off */ > -+#define PWR_P1_SW_EVENTS 0x10 > -+#define PWR_DEVOFF (1 << 0) > -+ > - /*----------------------------------------------------------------------*/ > - > - /* is driver active, bound to a chip? */ > -@@ -1006,6 +1016,30 @@ static int twl_remove(struct i2c_client *client) > - return 0; > - } > - > -+static void twl_poweroff(void) > -+{ > -+ int err; > -+ u8 val; > -+ > -+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &val, > -+ PWR_P1_SW_EVENTS); > -+ if (err) { > -+ pr_err("%s: i2c error %d while reading TWL4030" > -+ "PM_MASTER P1_SW_EVENTS\n", > -+ DRIVER_NAME, err); > -+ return; > -+ } > -+ > -+ val |= PWR_DEVOFF; > -+ > -+ err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, val, > -+ PWR_P1_SW_EVENTS); > -+ if (err) > -+ pr_err("%s: i2c error %d while writing TWL4030" > -+ "PM_MASTER P1_SW_EVENTS\n", > -+ DRIVER_NAME, err); > -+} > -+ > - /* NOTE: this driver only handles a single twl4030/tps659x0 chip */ > - static int __devinit > - twl_probe(struct i2c_client *client, const struct i2c_device_id *id) > -@@ -1093,6 +1127,12 @@ twl_probe(struct i2c_client *client, const struct > i2c_device_id *id) > - twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, > REG_GPPUPDCTR1); > - } > - > -+ if(twl_has_poweroff()) > -+ { > -+ /* initialize pm_power_off routine */ > -+ pm_power_off = twl_poweroff; > -+ } > -+ > - status = add_children(pdata, id->driver_data); > - fail: > - if (status < 0) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0019-ARM-OMAP- > Add-twl4030-madc-support-to-Overo.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0019-ARM-OMAP-Add-twl4030-madc-support-to- > Overo.patch > deleted file mode 100644 > index 1f139f1..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0019-ARM-OMAP-Add- > twl4030-madc-support-to-Overo.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From 46ea520a3c80914ae5ad3e35be7b8650706da3e6 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Thu, 17 Dec 2009 14:27:15 -0800 > -Subject: [PATCH 19/32] ARM: OMAP: Add twl4030 madc support to Overo > - > -Signed-off-by: Steve Sakoman <steve@sakoman.com> > ---- > - arch/arm/mach-omap2/board-overo.c | 5 +++++ > - 1 files changed, 5 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 59ca333..86f76e9 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -637,10 +637,15 @@ static struct twl4030_codec_data > overo_codec_data = { > - .audio = &overo_audio_data, > - }; > - > -+static struct twl4030_madc_platform_data overo_madc_data = { > -+ .irq_line = 1, > -+}; > -+ > - static struct twl4030_platform_data overo_twldata = { > - .irq_base = TWL4030_IRQ_BASE, > - .irq_end = TWL4030_IRQ_END, > - .gpio = &overo_gpio_data, > -+ .madc = &overo_madc_data, > - .usb = &overo_usb_data, > - .codec = &overo_codec_data, > - .vmmc1 = &overo_vmmc1, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0020-Enabling- > Hwmon-driver-for-twl4030-madc.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0020-Enabling-Hwmon-driver-for-twl4030-madc.patch > deleted file mode 100644 > index c80aef9..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0020-Enabling-Hwmon- > driver-for-twl4030-madc.patch > +++ /dev/null > @@ -1,46 +0,0 @@ > -From 931bd787effbd6f1f00468c89c647c66c0bbc164 Mon Sep 17 00:00:00 > 2001 > -From: Keerthy <j-keerthy@ti.com> > -Date: Wed, 4 May 2011 01:14:50 +0530 > -Subject: [PATCH 20/32] Enabling Hwmon driver for twl4030-madc > - > -Signed-off-by: Keerthy <j-keerthy@ti.com> > ---- > - drivers/mfd/twl-core.c | 15 +++++++++++++++ > - 1 files changed, 15 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c > -index 8804550..d9435e4 100644 > ---- a/drivers/mfd/twl-core.c > -+++ b/drivers/mfd/twl-core.c > -@@ -83,6 +83,13 @@ > - #define twl_has_madc() false > - #endif > - > -+#if defined(CONFIG_SENSORS_TWL4030_MADC) ||\ > -+ defined(CONFIG_SENSORS_TWL4030_MADC_MODULE) > -+#define twl_has_madc_hwmon() true > -+#else > -+#define twl_has_madc_hwmon() false > -+#endif > -+ > - #ifdef CONFIG_TWL4030_POWER > - #define twl_has_power() true > - #else > -@@ -619,6 +626,14 @@ add_children(struct twl4030_platform_data *pdata, > unsigned long features) > - return PTR_ERR(child); > - } > - > -+if (twl_has_madc_hwmon()) { > -+ child = add_child(2, "twl4030_madc_hwmon", > -+ NULL, 0, > -+ true, pdata->irq_base + MADC_INTR_OFFSET, > 0); > -+ if (IS_ERR(child)) > -+ return PTR_ERR(child); > -+ } > -+ > - if (twl_has_rtc()) { > - /* > - * REVISIT platform_data here currently might expose the > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0021-mfd-twl- > core-enable-madc-clock.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0021-mfd-twl-core-enable-madc-clock.patch > deleted file mode 100644 > index 732d306..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0021-mfd-twl-core- > enable-madc-clock.patch > +++ /dev/null > @@ -1,54 +0,0 @@ > -From aee147073ad84a7c81fba36dd475c6d2d17ed728 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Sat, 23 Jan 2010 06:26:54 -0800 > -Subject: [PATCH 21/32] mfd: twl-core: enable madc clock > - > -Now that the madc driver has been merged it is also necessary to enable the > clock to the madc block > - > -Signed-off-by: Steve Sakoman <steve@sakoman.com> > ---- > - drivers/mfd/twl-core.c | 8 ++++++++ > - include/linux/i2c/twl.h | 1 + > - 2 files changed, 9 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c > -index d9435e4..9096d7d 100644 > ---- a/drivers/mfd/twl-core.c > -+++ b/drivers/mfd/twl-core.c > -@@ -222,6 +222,11 @@ > - > - /* Few power values */ > - #define R_CFG_BOOT 0x05 > -+#define R_GPBR1 0x0C > -+ > -+/* MADC clock values for R_GPBR1 */ > -+#define MADC_HFCLK_EN 0x80 > -+#define DEFAULT_MADC_CLK_EN 0x10 > - > - /* some fields in R_CFG_BOOT */ > - #define HFCLK_FREQ_19p2_MHZ (1 << 0) > -@@ -992,6 +997,9 @@ static void clocks_init(struct device *dev, > - > - e |= unprotect_pm_master(); > - /* effect->MADC+USB ck en */ > -+ if (twl_has_madc()) > -+ e |= twl_i2c_write_u8(TWL_MODULE_INTBR, > -+ MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, > R_GPBR1); > - e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, > R_CFG_BOOT); > - e |= protect_pm_master(); > - > -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h > -index 0c0d1ae..cbbf3b3 100644 > ---- a/include/linux/i2c/twl.h > -+++ b/include/linux/i2c/twl.h > -@@ -74,6 +74,7 @@ > - > - #define TWL_MODULE_USB TWL4030_MODULE_USB > - #define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE > -+#define TWL_MODULE_INTBR TWL4030_MODULE_INTBR > - #define TWL_MODULE_PIH TWL4030_MODULE_PIH > - #define TWL_MODULE_MADC TWL4030_MODULE_MADC > - #define TWL_MODULE_MAIN_CHARGE > TWL4030_MODULE_MAIN_CHARGE > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0022-rtc-twl- > Switch-to-using-threaded-irq.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0022-rtc-twl-Switch-to-using-threaded-irq.patch > deleted file mode 100644 > index 0306d4b..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0022-rtc-twl-Switch-to- > using-threaded-irq.patch > +++ /dev/null > @@ -1,25 +0,0 @@ > -From 29dd1b5655f60f97a9cee2f4ff1d27d7da1329a1 Mon Sep 17 00:00:00 > 2001 > -From: Ilkka Koskinen <ilkka.koskinen@nokia.com> > -Date: Wed, 16 Mar 2011 16:07:14 +0000 > -Subject: [PATCH 22/32] rtc-twl: Switch to using threaded irq > - > ---- > - drivers/rtc/rtc-twl.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c > -index 713b8ea..1fe1bc9 100644 > ---- a/drivers/rtc/rtc-twl.c > -+++ b/drivers/rtc/rtc-twl.c > -@@ -479,7 +479,7 @@ static int __devinit twl_rtc_probe(struct > platform_device *pdev) > - if (ret < 0) > - goto out1; > - > -- ret = request_irq(irq, twl_rtc_interrupt, > -+ ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, > - IRQF_TRIGGER_RISING, > - dev_name(&rtc->dev), rtc); > - if (ret < 0) { > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0023-ARM-OMAP- > automatically-set-musb-mode-in-platform-dat.patch b/recipes- > kernel/linux/linux-omap-2.6.39/sakoman/0023-ARM-OMAP-automatically-set- > musb-mode-in-platform-dat.patch > deleted file mode 100644 > index a35d7de..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0023-ARM-OMAP- > automatically-set-musb-mode-in-platform-dat.patch > +++ /dev/null > @@ -1,49 +0,0 @@ > -From 92c06791d4d6b537a9a83b27d71d7d3dd348f93f Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Wed, 24 Feb 2010 10:37:22 -0800 > -Subject: [PATCH 23/32] ARM: OMAP: automatically set musb mode in platform > data based on CONFIG options > - > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 6 ++++++ > - arch/arm/mach-omap2/board-overo.c | 6 ++++++ > - 2 files changed, 12 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 33007fd..2de4b02 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -604,7 +604,13 @@ static struct omap_board_mux board_mux[] > __initdata = { > - > - static struct omap_musb_board_data musb_board_data = { > - .interface_type = MUSB_INTERFACE_ULPI, > -+#if defined(CONFIG_USB_MUSB_OTG) > - .mode = MUSB_OTG, > -+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) > -+ .mode = MUSB_PERIPHERAL, > -+#else > -+ .mode = MUSB_HOST, > -+#endif > - .power = 100, > - }; > - > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 86f76e9..61c59fc 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -729,7 +729,13 @@ static struct omap_board_mux board_mux[] > __initdata = { > - > - static struct omap_musb_board_data musb_board_data = { > - .interface_type = MUSB_INTERFACE_ULPI, > -+#if defined(CONFIG_USB_MUSB_OTG) > - .mode = MUSB_OTG, > -+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) > -+ .mode = MUSB_PERIPHERAL, > -+#else > -+ .mode = MUSB_HOST, > -+#endif > - .power = 100, > - }; > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0024-omap-mmc- > Adjust-dto-to-eliminate-timeout-errors.patch b/recipes-kernel/linux/linux- > omap-2.6.39/sakoman/0024-omap-mmc-Adjust-dto-to-eliminate-timeout- > errors.patch > deleted file mode 100644 > index bd1764a..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0024-omap-mmc- > Adjust-dto-to-eliminate-timeout-errors.patch > +++ /dev/null > @@ -1,28 +0,0 @@ > -From a442a2b9b2f9f51375f8a796ee88784d3754be00 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Wed, 12 Jan 2011 05:54:55 -0800 > -Subject: [PATCH 24/32] omap: mmc: Adjust dto to eliminate timeout errors > - > -A number of SD card types were experiencing timeout errors. This > -could also lead to data corruption in some cases. > - > -This fix proposed by Sukumar Ghoral of TI. > ---- > - drivers/mmc/host/omap_hsmmc.c | 1 + > - 1 files changed, 1 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mmc/host/omap_hsmmc.c > b/drivers/mmc/host/omap_hsmmc.c > -index d57686c..7fb03e8 100644 > ---- a/drivers/mmc/host/omap_hsmmc.c > -+++ b/drivers/mmc/host/omap_hsmmc.c > -@@ -1400,6 +1400,7 @@ static void set_data_timeout(struct > omap_hsmmc_host *host, > - cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); > - timeout = timeout_ns / cycle_ns; > - timeout += timeout_clks; > -+ timeout *= 2; > - if (timeout) { > - while ((timeout & 0x80000000) == 0) { > - dto += 1; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0025-omap-Fix- > mtd-subpage-read-alignment.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0025-omap-Fix-mtd-subpage-read-alignment.patch > deleted file mode 100644 > index 1508da1..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0025-omap-Fix-mtd- > subpage-read-alignment.patch > +++ /dev/null > @@ -1,95 +0,0 @@ > -From acf75c8b4d0f6775527636bf9d41bb1f74fc2f97 Mon Sep 17 00:00:00 > 2001 > -From: Charles Manning <cdhmanning@gmail.com> > -Date: Tue, 18 Jan 2011 11:25:25 +1300 > -Subject: [PATCH 25/32] omap: Fix mtd subpage read alignment > - > -This allows the omap2 prefetch engine to work properly for subpage > -reads. Without this ECC errors will stop UBIFS from working. > - > -Signed-off-by: Charles Manning <cdhmanning@gmail.com> > ---- > - drivers/mtd/nand/nand_base.c | 19 +++++++++++++++++++ > - drivers/mtd/nand/omap2.c | 1 + > - include/linux/mtd/nand.h | 3 +++ > - 3 files changed, 23 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c > -index c54a4cb..6ca7098 100644 > ---- a/drivers/mtd/nand/nand_base.c > -+++ b/drivers/mtd/nand/nand_base.c > -@@ -1157,6 +1157,22 @@ static int nand_read_page_swecc(struct mtd_info > *mtd, struct nand_chip *chip, > - } > - > - /** > -+ * nand_align_subpage32 - function to align subpage read to 32-bits > -+ * @mtd: mtd info structure > -+ * @buf: pointer to offset that needs to be aligned > -+ * @len: pointer to length that needs to be aligned. > -+ */ > -+ > -+void nand_align_subpage32(int *offs, int *len) > -+{ > -+ int diff = *offs & 3; > -+ > -+ *offs = *offs - diff; > -+ *len = (*len + diff + 3) & ~3; > -+} > -+EXPORT_SYMBOL(nand_align_subpage32); > -+ > -+/** > - * nand_read_subpage - [REPLACABLE] software ecc based sub-page read > function > - * @mtd: mtd info structure > - * @chip: nand chip info structure > -@@ -1221,6 +1237,9 @@ static int nand_read_subpage(struct mtd_info > *mtd, struct nand_chip *chip, > - if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) > - aligned_len++; > - > -+ if(chip->align_subpage) > -+ chip->align_subpage(&aligned_pos, &aligned_len); > -+ > - chip->cmdfunc(mtd, NAND_CMD_RNDOUT, > - mtd->writesize + aligned_pos, -1); > - chip->read_buf(mtd, &chip->oob_poi[aligned_pos], > aligned_len); > -diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c > -index da9a351..bb89c65 100644 > ---- a/drivers/mtd/nand/omap2.c > -+++ b/drivers/mtd/nand/omap2.c > -@@ -1069,6 +1069,7 @@ static int __devinit omap_nand_probe(struct > platform_device *pdev) > - info->nand.ecc.correct = omap_correct_data; > - info->nand.ecc.mode = NAND_ECC_HW; > - } > -+ info->nand.align_subpage = nand_align_subpage32; > - > - /* DIP switches on some boards change between 8 and 16 bit > - * bus widths for flash. Try the other width if the first try fails. > -diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h > -index d441927..311f211 100644 > ---- a/include/linux/mtd/nand.h > -+++ b/include/linux/mtd/nand.h > -@@ -479,6 +479,7 @@ struct nand_buffers { > - * additional error status checks (determine if errors are > - * correctable). > - * @write_page: [REPLACEABLE] High-level page write function > -+ * @align_subpage: [OPTIONAL] Aligns subpage read buffer. > - */ > - > - struct nand_chip { > -@@ -507,6 +508,7 @@ struct nand_chip { > - int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, > - const uint8_t *buf, int page, int cached, int raw); > - > -+ void (*align_subpage)(int *offs, int *len); > - int chip_delay; > - unsigned int options; > - > -@@ -602,6 +604,7 @@ extern int nand_erase_nand(struct mtd_info *mtd, > struct erase_info *instr, > - int allowbbt); > - extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, > - size_t *retlen, uint8_t *buf); > -+extern void nand_align_subpage32(int *offs, int *len); > - > - /** > - * struct platform_nand_chip - chip level device structure > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0026-mtd-nand- > omap2-Force-all-buffer-reads-to-u32-alignme.patch b/recipes- > kernel/linux/linux-omap-2.6.39/sakoman/0026-mtd-nand-omap2-Force-all- > buffer-reads-to-u32-alignme.patch > deleted file mode 100644 > index 5e06023..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0026-mtd-nand-omap2- > Force-all-buffer-reads-to-u32-alignme.patch > +++ /dev/null > @@ -1,35 +0,0 @@ > -From 048c2b85c12ac4aa8cd82201e1ade332557e4380 Mon Sep 17 00:00:00 > 2001 > -From: Charles Manning <manningc2@actrix.gen.nz> > -Date: Thu, 16 Dec 2010 20:35:56 -0800 > -Subject: [PATCH 26/32] mtd: nand: omap2: Force all buffer reads to u32 > alignment > - > ---- > - drivers/mtd/nand/omap2.c | 12 ++++++++++++ > - 1 files changed, 12 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c > -index bb89c65..832f111 100644 > ---- a/drivers/mtd/nand/omap2.c > -+++ b/drivers/mtd/nand/omap2.c > -@@ -247,6 +247,18 @@ static void omap_read_buf_pref(struct mtd_info > *mtd, u_char *buf, int len) > - int ret = 0; > - u32 *p = (u32 *)buf; > - > -+ /* u32 align the buffer and read */ > -+ /* NB: This assumes the buf ptr can be aligned *down* which is a valid. > -+ * Assumption when dealing with ecc buffers etc. > -+ */ > -+ u32 addr = (u32)p; > -+ > -+ int diff = addr & 3; > -+ addr -= diff; > -+ len += diff; > -+ len = (len + 3) & ~3; > -+ p = (u32 *)addr; > -+ > - /* take care of subpage reads */ > - if (len % 4) { > - if (info->nand.options & NAND_BUSWIDTH_16) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0027-omap-nand- > fix-subpage-ecc-issue-with-prefetch.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0027-omap-nand-fix-subpage-ecc-issue-with-prefetch.patch > deleted file mode 100644 > index 21eb1e9..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0027-omap-nand-fix- > subpage-ecc-issue-with-prefetch.patch > +++ /dev/null > @@ -1,63 +0,0 @@ > -From fb4dfff6a6e107e0e526801e7add4a9aaeab1eab Mon Sep 17 00:00:00 > 2001 > -From: kishore kadiyala <kishore.kadiyala@ti.com> > -Date: Mon, 2 May 2011 11:10:38 +0000 > -Subject: [PATCH 27/32] omap : nand : fix subpage ecc issue with prefetch > - > -For prefetch engine, read and write got broken in commit '2c01946c'. > -We never hit a scenario of not getting 'gpmc_prefetch_enable' > -call success. > -When reading/writing a subpage with a non divisible by 4 ecc number > -of bytes, the mis-aligned bytes gets handled first before enabling > -the Prefetch engine, then it reads/writes rest of the bytes. > - > -Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> > -Signed-off-by: Vimal Singh <vimal.newwork@gmail.com> > -Reported-by: Bryan DE FARIA <bdefaria@adeneo-embedded.com> > ---- > - drivers/mtd/nand/omap2.c | 12 +++++------- > - 1 files changed, 5 insertions(+), 7 deletions(-) > - > -diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c > -index 832f111..471a39b 100644 > ---- a/drivers/mtd/nand/omap2.c > -+++ b/drivers/mtd/nand/omap2.c > -@@ -275,11 +275,10 @@ static void omap_read_buf_pref(struct mtd_info > *mtd, u_char *buf, int len) > - if (ret) { > - /* PFPW engine is busy, use cpu copy method */ > - if (info->nand.options & NAND_BUSWIDTH_16) > -- omap_read_buf16(mtd, buf, len); > -+ omap_read_buf16(mtd, (u_char *)p, len); > - else > -- omap_read_buf8(mtd, buf, len); > -+ omap_read_buf8(mtd, (u_char *)p, len); > - } else { > -- p = (u32 *) buf; > - do { > - r_count = > gpmc_read_status(GPMC_PREFETCH_FIFO_CNT); > - r_count = r_count >> 2; > -@@ -305,7 +304,7 @@ static void omap_write_buf_pref(struct mtd_info > *mtd, > - struct omap_nand_info, mtd); > - uint32_t w_count = 0; > - int i = 0, ret = 0; > -- u16 *p; > -+ u16 *p = (u16 *)buf; > - unsigned long tim, limit; > - > - /* take care of subpage writes */ > -@@ -321,11 +320,10 @@ static void omap_write_buf_pref(struct mtd_info > *mtd, > - if (ret) { > - /* PFPW engine is busy, use cpu copy method */ > - if (info->nand.options & NAND_BUSWIDTH_16) > -- omap_write_buf16(mtd, buf, len); > -+ omap_write_buf16(mtd, (u_char *)p, len); > - else > -- omap_write_buf8(mtd, buf, len); > -+ omap_write_buf8(mtd, (u_char *)p, len); > - } else { > -- p = (u16 *) buf; > - while (len) { > - w_count = > gpmc_read_status(GPMC_PREFETCH_FIFO_CNT); > - w_count = w_count >> 1; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0028-OMAP- > Overo-Add-support-for-spidev.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0028-OMAP-Overo-Add-support-for-spidev.patch > deleted file mode 100644 > index be1f963..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0028-OMAP-Overo- > Add-support-for-spidev.patch > +++ /dev/null > @@ -1,46 +0,0 @@ > -From ee2dcb39e9255fc0aa6b4e267e9553bdbd11e82b Mon Sep 17 00:00:00 > 2001 > -From: Scott Ellis <scottellis.developer@gmail.com> > -Date: Sun, 23 Jan 2011 20:39:35 -0800 > -Subject: [PATCH 28/32] OMAP: Overo: Add support for spidev > - > ---- > - arch/arm/mach-omap2/board-overo.c | 16 ++++++++++++++++ > - 1 files changed, 16 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 61c59fc..05dd3eb 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -683,6 +683,14 @@ static struct spi_board_info overo_spi_board_info[] > __initdata = { > - .irq = > OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), > - .platform_data = &ads7846_config, > - }, > -+#elif defined(CONFIG_SPI_SPIDEV) || > defined(CONFIG_SPI_SPIDEV_MODULE) > -+ { > -+ .modalias = "spidev", > -+ .bus_num = 1, > -+ .chip_select = 0, > -+ .max_speed_hz = 48000000, > -+ .mode = SPI_MODE_0, > -+ }, > - #endif > - #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ > - defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) > -@@ -693,6 +701,14 @@ static struct spi_board_info overo_spi_board_info[] > __initdata = { > - .max_speed_hz = 500000, > - .mode = SPI_MODE_3, > - }, > -+#elif defined(CONFIG_SPI_SPIDEV) || > defined(CONFIG_SPI_SPIDEV_MODULE) > -+ { > -+ .modalias = "spidev", > -+ .bus_num = 1, > -+ .chip_select = 1, > -+ .max_speed_hz = 48000000, > -+ .mode = SPI_MODE_0, > -+ }, > - #endif > - }; > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0029-unionfs-Add- > support-for-unionfs-2.5.9.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0029-unionfs-Add-support-for-unionfs-2.5.9.patch > deleted file mode 100644 > index c17608b..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0029-unionfs-Add- > support-for-unionfs-2.5.9.patch > +++ /dev/null > @@ -1,11494 +0,0 @@ > -From 0de368979f94e7c51940979c6149d34aec08f13f Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Mon, 2 May 2011 16:14:34 -0700 > -Subject: [PATCH 29/32] unionfs: Add support for unionfs 2.5.9 > - > ---- > - Documentation/filesystems/00-INDEX | 2 + > - Documentation/filesystems/unionfs/00-INDEX | 10 + > - Documentation/filesystems/unionfs/concepts.txt | 287 ++++++ > - Documentation/filesystems/unionfs/issues.txt | 28 + > - Documentation/filesystems/unionfs/rename.txt | 31 + > - Documentation/filesystems/unionfs/usage.txt | 134 +++ > - MAINTAINERS | 8 + > - fs/Kconfig | 1 + > - fs/Makefile | 1 + > - fs/namei.c | 38 + > - fs/splice.c | 22 +- > - fs/stack.c | 14 +- > - fs/unionfs/Kconfig | 24 + > - fs/unionfs/Makefile | 17 + > - fs/unionfs/commonfops.c | 898 +++++++++++++++++++ > - fs/unionfs/copyup.c | 896 +++++++++++++++++++ > - fs/unionfs/debug.c | 548 ++++++++++++ > - fs/unionfs/dentry.c | 406 +++++++++ > - fs/unionfs/dirfops.c | 302 +++++++ > - fs/unionfs/dirhelper.c | 158 ++++ > - fs/unionfs/fanout.h | 407 +++++++++ > - fs/unionfs/file.c | 382 ++++++++ > - fs/unionfs/inode.c | 1099 ++++++++++++++++++++++++ > - fs/unionfs/lookup.c | 569 ++++++++++++ > - fs/unionfs/main.c | 763 ++++++++++++++++ > - fs/unionfs/mmap.c | 89 ++ > - fs/unionfs/rdstate.c | 285 ++++++ > - fs/unionfs/rename.c | 522 +++++++++++ > - fs/unionfs/sioq.c | 101 +++ > - fs/unionfs/sioq.h | 91 ++ > - fs/unionfs/subr.c | 95 ++ > - fs/unionfs/super.c | 1030 ++++++++++++++++++++++ > - fs/unionfs/union.h | 679 +++++++++++++++ > - fs/unionfs/unlink.c | 278 ++++++ > - fs/unionfs/whiteout.c | 601 +++++++++++++ > - fs/unionfs/xattr.c | 173 ++++ > - include/linux/fs_stack.h | 14 +- > - include/linux/magic.h | 2 + > - include/linux/namei.h | 3 + > - include/linux/splice.h | 5 + > - include/linux/union_fs.h | 22 + > - security/security.c | 1 + > - 42 files changed, 11024 insertions(+), 12 deletions(-) > - create mode 100644 Documentation/filesystems/unionfs/00-INDEX > - create mode 100644 Documentation/filesystems/unionfs/concepts.txt > - create mode 100644 Documentation/filesystems/unionfs/issues.txt > - create mode 100644 Documentation/filesystems/unionfs/rename.txt > - create mode 100644 Documentation/filesystems/unionfs/usage.txt > - create mode 100644 fs/unionfs/Kconfig > - create mode 100644 fs/unionfs/Makefile > - create mode 100644 fs/unionfs/commonfops.c > - create mode 100644 fs/unionfs/copyup.c > - create mode 100644 fs/unionfs/debug.c > - create mode 100644 fs/unionfs/dentry.c > - create mode 100644 fs/unionfs/dirfops.c > - create mode 100644 fs/unionfs/dirhelper.c > - create mode 100644 fs/unionfs/fanout.h > - create mode 100644 fs/unionfs/file.c > - create mode 100644 fs/unionfs/inode.c > - create mode 100644 fs/unionfs/lookup.c > - create mode 100644 fs/unionfs/main.c > - create mode 100644 fs/unionfs/mmap.c > - create mode 100644 fs/unionfs/rdstate.c > - create mode 100644 fs/unionfs/rename.c > - create mode 100644 fs/unionfs/sioq.c > - create mode 100644 fs/unionfs/sioq.h > - create mode 100644 fs/unionfs/subr.c > - create mode 100644 fs/unionfs/super.c > - create mode 100644 fs/unionfs/union.h > - create mode 100644 fs/unionfs/unlink.c > - create mode 100644 fs/unionfs/whiteout.c > - create mode 100644 fs/unionfs/xattr.c > - create mode 100644 include/linux/union_fs.h > - > -diff --git a/Documentation/filesystems/00-INDEX > b/Documentation/filesystems/00-INDEX > -index 8c624a1..4aa288b 100644 > ---- a/Documentation/filesystems/00-INDEX > -+++ b/Documentation/filesystems/00-INDEX > -@@ -110,6 +110,8 @@ udf.txt > - - info and mount options for the UDF filesystem. > - ufs.txt > - - info on the ufs filesystem. > -+unionfs/ > -+ - info on the unionfs filesystem > - vfat.txt > - - info on using the VFAT filesystem used in Windows NT and Windows > 95 > - vfs.txt > -diff --git a/Documentation/filesystems/unionfs/00-INDEX > b/Documentation/filesystems/unionfs/00-INDEX > -new file mode 100644 > -index 0000000..96fdf67 > ---- /dev/null > -+++ b/Documentation/filesystems/unionfs/00-INDEX > -@@ -0,0 +1,10 @@ > -+00-INDEX > -+ - this file. > -+concepts.txt > -+ - A brief introduction of concepts. > -+issues.txt > -+ - A summary of known issues with unionfs. > -+rename.txt > -+ - Information regarding rename operations. > -+usage.txt > -+ - Usage information and examples. > -diff --git a/Documentation/filesystems/unionfs/concepts.txt > b/Documentation/filesystems/unionfs/concepts.txt > -new file mode 100644 > -index 0000000..b853788 > ---- /dev/null > -+++ b/Documentation/filesystems/unionfs/concepts.txt > -@@ -0,0 +1,287 @@ > -+Unionfs 2.x CONCEPTS: > -+===================== > -+ > -+This file describes the concepts needed by a namespace unification file > -+system. > -+ > -+ > -+Branch Priority: > -+================ > -+ > -+Each branch is assigned a unique priority - starting from 0 (highest > -+priority). No two branches can have the same priority. > -+ > -+ > -+Branch Mode: > -+============ > -+ > -+Each branch is assigned a mode - read-write or read-only. This allows > -+directories on media mounted read-write to be used in a read-only manner. > -+ > -+ > -+Whiteouts: > -+========== > -+ > -+A whiteout removes a file name from the namespace. Whiteouts are needed > when > -+one attempts to remove a file on a read-only branch. > -+ > -+Suppose we have a two-branch union, where branch 0 is read-write and > branch > -+1 is read-only. And a file 'foo' on branch 1: > -+ > -+./b0/ > -+./b1/ > -+./b1/foo > -+ > -+The unified view would simply be: > -+ > -+./union/ > -+./union/foo > -+ > -+Since 'foo' is stored on a read-only branch, it cannot be removed. A > -+whiteout is used to remove the name 'foo' from the unified namespace. Again, > -+since branch 1 is read-only, the whiteout cannot be created there. So, we > -+try on a higher priority (lower numerically) branch and create the whiteout > -+there. > -+ > -+./b0/ > -+./b0/.wh.foo > -+./b1/ > -+./b1/foo > -+ > -+Later, when Unionfs traverses branches (due to lookup or readdir), it > -+eliminate 'foo' from the namespace (as well as the whiteout itself.) > -+ > -+ > -+Opaque Directories: > -+=================== > -+ > -+Assume we have a unionfs mount comprising of two branches. Branch 0 is > -+empty; branch 1 has the directory /a and file /a/f. Let's say we mount a > -+union of branch 0 as read-write and branch 1 as read-only. Now, let's say > -+we try to perform the following operation in the union: > -+ > -+ rm -fr a > -+ > -+Because branch 1 is not writable, we cannot physically remove the file /a/f > -+or the directory /a. So instead, we will create a whiteout in branch 0 > -+named /.wh.a, masking out the name "a" from branch 1. Next, let's say we > -+try to create a directory named "a" as follows: > -+ > -+ mkdir a > -+ > -+Because we have a whiteout for "a" already, Unionfs behaves as if "a" > -+doesn't exist, and thus will delete the whiteout and replace it with an > -+actual directory named "a". > -+ > -+The problem now is that if you try to "ls" in the union, Unionfs will > -+perform is normal directory name unification, for *all* directories named > -+"a" in all branches. This will cause the file /a/f from branch 1 to > -+re-appear in the union's namespace, which violates Unix semantics. > -+ > -+To avoid this problem, we have a different form of whiteouts for > -+directories, called "opaque directories" (same as BSD Union Mount does). > -+Whenever we replace a whiteout with a directory, that directory is marked as > -+opaque. In Unionfs 2.x, it means that we create a file named > -+/a/.wh.__dir_opaque in branch 0, after having created directory /a there. > -+When unionfs notices that a directory is opaque, it stops all namespace > -+operations (including merging readdir contents) at that opaque directory. > -+This prevents re-exposing names from masked out directories. > -+ > -+ > -+Duplicate Elimination: > -+====================== > -+ > -+It is possible for files on different branches to have the same name. > -+Unionfs then has to select which instance of the file to show to the user. > -+Given the fact that each branch has a priority associated with it, the > -+simplest solution is to take the instance from the highest priority > -+(numerically lowest value) and "hide" the others. > -+ > -+ > -+Unlinking: > -+========= > -+ > -+Unlink operation on non-directory instances is optimized to remove the > -+maximum possible objects in case multiple underlying branches have the same > -+file name. The unlink operation will first try to delete file instances > -+from highest priority branch and then move further to delete from remaining > -+branches in order of their decreasing priority. Consider a case (F..D..F), > -+where F is a file and D is a directory of the same name; here, some > -+intermediate branch could have an empty directory instance with the same > -+name, so this operation also tries to delete this directory instance and > -+proceed further to delete from next possible lower priority branch. The > -+unionfs unlink operation will smoothly delete the files with same name from > -+all possible underlying branches. In case if some error occurs, it creates > -+whiteout in highest priority branch that will hide file instance in rest of > -+the branches. An error could occur either if an unlink operations in any of > -+the underlying branch failed or if a branch has no write permission. > -+ > -+This unlinking policy is known as "delete all" and it has the benefit of > -+overall reducing the number of inodes used by duplicate files, and further > -+reducing the total number of inodes consumed by whiteouts. The cost is of > -+extra processing, but testing shows this extra processing is well worth the > -+savings. > -+ > -+ > -+Copyup: > -+======= > -+ > -+When a change is made to the contents of a file's data or meta-data, they > -+have to be stored somewhere. The best way is to create a copy of the > -+original file on a branch that is writable, and then redirect the write > -+though to this copy. The copy must be made on a higher priority branch so > -+that lookup and readdir return this newer "version" of the file rather than > -+the original (see duplicate elimination). > -+ > -+An entire unionfs mount can be read-only or read-write. If it's read-only, > -+then none of the branches will be written to, even if some of the branches > -+are physically writeable. If the unionfs mount is read-write, then the > -+leftmost (highest priority) branch must be writeable (for copyup to take > -+place); the remaining branches can be any mix of read-write and read-only. > -+ > -+In a writeable mount, unionfs will create new files/dir in the leftmost > -+branch. If one tries to modify a file in a read-only branch/media, unionfs > -+will copyup the file to the leftmost branch and modify it there. If you try > -+to modify a file from a writeable branch which is not the leftmost branch, > -+then unionfs will modify it in that branch; this is useful if you, say, > -+unify differnet packages (e.g., apache, sendmail, ftpd, etc.) and you want > -+changes to specific package files to remain logically in the directory where > -+they came from. > -+ > -+Cache Coherency: > -+================ > -+ > -+Unionfs users often want to be able to modify files and directories directly > -+on the lower branches, and have those changes be visible at the Unionfs > -+level. This means that data (e.g., pages) and meta-data (dentries, inodes, > -+open files, etc.) have to be synchronized between the upper and lower > -+layers. In other words, the newest changes from a layer below have to be > -+propagated to the Unionfs layer above. If the two layers are not in sync, a > -+cache incoherency ensues, which could lead to application failures and even > -+oopses. The Linux kernel, however, has a rather limited set of mechanisms > -+to ensure this inter-layer cache coherency---so Unionfs has to do most of > -+the hard work on its own. > -+ > -+Maintaining Invariants: > -+ > -+The way Unionfs ensures cache coherency is as follows. At each entry point > -+to a Unionfs file system method, we call a utility function to validate the > -+primary objects of this method. Generally, we call unionfs_file_revalidate > -+on open files, and __unionfs_d_revalidate_chain on dentries (which also > -+validates inodes). These utility functions check to see whether the upper > -+Unionfs object is in sync with any of the lower objects that it represents. > -+The checks we perform include whether the Unionfs superblock has a newer > -+generation number, or if any of the lower objects mtime's or ctime's are > -+newer. (Note: generation numbers change when branch-management > commands are > -+issued, so in a way, maintaining cache coherency is also very important for > -+branch-management.) If indeed we determine that any Unionfs object is no > -+longer in sync with its lower counterparts, then we rebuild that object > -+similarly to how we do so for branch-management. > -+ > -+While rebuilding Unionfs's objects, we also purge any page mappings and > -+truncate inode pages (see fs/unionfs/dentry.c:purge_inode_data). This is to > -+ensure that Unionfs will re-get the newer data from the lower branches. We > -+perform this purging only if the Unionfs operation in question is a reading > -+operation; if Unionfs is performing a data writing operation (e.g., ->write, > -+->commit_write, etc.) then we do NOT flush the lower mappings/pages: this is > -+because (1) a self-deadlock could occur and (2) the upper Unionfs pages are > -+considered more authoritative anyway, as they are newer and will overwrite > -+any lower pages. > -+ > -+Unionfs maintains the following important invariant regarding mtime's, > -+ctime's, and atime's: the upper inode object's times are the max() of all of > -+the lower ones. For non-directory objects, there's only one object below, > -+so the mapping is simple; for directory objects, there could me multiple > -+lower objects and we have to sync up with the newest one of all the lower > -+ones. This invariant is important to maintain, especially for directories > -+(besides, we need this to be POSIX compliant). A union could comprise > -+multiple writable branches, each of which could change. If we don't reflect > -+the newest possible mtime/ctime, some applications could fail. For example, > -+NFSv2/v3 exports check for newer directory mtimes on the server to > determine > -+if the client-side attribute cache should be purged. > -+ > -+To maintain these important invariants, of course, Unionfs carefully > -+synchronizes upper and lower times in various places. For example, if we > -+copy-up a file to a top-level branch, the parent directory where the file > -+was copied up to will now have a new mtime: so after a successful copy-up, > -+we sync up with the new top-level branch's parent directory mtime. > -+ > -+Implementation: > -+ > -+This cache-coherency implementation is efficient because it defers any > -+synchronizing between the upper and lower layers until absolutely needed. > -+Consider the example a common situation where users perform a lot of lower > -+changes, such as untarring a whole package. While these take place, > -+typically the user doesn't access the files via Unionfs; only after the > -+lower changes are done, does the user try to access the lower files. With > -+our cache-coherency implementation, the entirety of the changes to the lower > -+branches will not result in a single CPU cycle spent at the Unionfs level > -+until the user invokes a system call that goes through Unionfs. > -+ > -+We have considered two alternate cache-coherency designs. (1) Using the > -+dentry/inode notify functionality to register interest in finding out about > -+any lower changes. This is a somewhat limited and also a heavy-handed > -+approach which could result in many notifications to the Unionfs layer upon > -+each small change at the lower layer (imagine a file being modified multiple > -+times in rapid succession). (2) Rewriting the VFS to support explicit > -+callbacks from lower objects to upper objects. We began exploring such an > -+implementation, but found it to be very complicated--it would have resulted > -+in massive VFS/MM changes which are unlikely to be accepted by the LKML > -+community. We therefore believe that our current cache-coherency design > and > -+implementation represent the best approach at this time. > -+ > -+Limitations: > -+ > -+Our implementation works in that as long as a user process will have caused > -+Unionfs to be called, directly or indirectly, even to just do > -+->d_revalidate; then we will have purged the current Unionfs data and the > -+process will see the new data. For example, a process that continually > -+re-reads the same file's data will see the NEW data as soon as the lower > -+file had changed, upon the next read(2) syscall (even if the file is still > -+open!) However, this doesn't work when the process re-reads the open file's > -+data via mmap(2) (unless the user unmaps/closes the file and remaps/reopens > -+it). Once we respond to ->readpage(s), then the kernel maps the page into > -+the process's address space and there doesn't appear to be a way to force > -+the kernel to invalidate those pages/mappings, and force the process to > -+re-issue ->readpage. If there's a way to invalidate active mappings and > -+force a ->readpage, let us know please (invalidate_inode_pages2 doesn't do > -+the trick). > -+ > -+Our current Unionfs code has to perform many file-revalidation calls. It > -+would be really nice if the VFS would export an optional file system hook > -+->file_revalidate (similarly to dentry->d_revalidate) that will be called > -+before each VFS op that has a "struct file" in it. > -+ > -+Certain file systems have micro-second granularity (or better) for inode > -+times, and asynchronous actions could cause those times to change with some > -+small delay. In such cases, Unionfs may see a changed inode time that only > -+differs by a tiny fraction of a second: such a change may be a false > -+positive indication that the lower object has changed, whereas if unionfs > -+waits a little longer, that false indication will not be seen. (These false > -+positives are harmless, because they would at most cause unionfs to > -+re-validate an object that may need no revalidation, and print a debugging > -+message that clutters the console/logs.) Therefore, to minimize the chances > -+of these situations, we delay the detection of changed times by a small > -+factor of a few seconds, called UNIONFS_MIN_CC_TIME (which defaults to 3 > -+seconds, as does NFS). This means that we will detect the change, only a > -+couple of seconds later, if indeed the time change persists in the lower > -+file object. This delayed detection has an added performance benefit: we > -+reduce the number of times that unionfs has to revalidate objects, in case > -+there's a lot of concurrent activity on both the upper and lower objects, > -+for the same file(s). Lastly, this delayed time attribute detection is > -+similar to how NFS clients operate (e.g., acregmin). > -+ > -+Finally, there is no way currently in Linux to prevent lower directories > -+from being moved around (i.e., topology changes); there's no way to prevent > -+modifications to directory sub-trees of whole file systems which are mounted > -+read-write. It is therefore possible for in-flight operations in unionfs to > -+take place, while a lower directory is being moved around. Therefore, if > -+you try to, say, create a new file in a directory through unionfs, while the > -+directory is being moved around directly, then the new file may get created > -+in the new location where that directory was moved to. This is a somewhat > -+similar behaviour in NFS: an NFS client could be creating a new file while > -+th NFS server is moving th directory around; the file will get successfully > -+created in the new location. (The one exception in unionfs is that if the > -+branch is marked read-only by unionfs, then a copyup will take place.) > -+ > -+For more information, see <http://unionfs.filesystems.org/>. > -diff --git a/Documentation/filesystems/unionfs/issues.txt > b/Documentation/filesystems/unionfs/issues.txt > -new file mode 100644 > -index 0000000..f4b7e7e > ---- /dev/null > -+++ b/Documentation/filesystems/unionfs/issues.txt > -@@ -0,0 +1,28 @@ > -+KNOWN Unionfs 2.x ISSUES: > -+========================= > -+ > -+1. Unionfs should not use lookup_one_len() on the underlying f/s as it > -+ confuses NFSv4. Currently, unionfs_lookup() passes lookup intents to the > -+ lower file-system, this eliminates part of the problem. The remaining > -+ calls to lookup_one_len may need to be changed to pass an intent. We are > -+ currently introducing VFS changes to fs/namei.c's do_path_lookup() to > -+ allow proper file lookup and opening in stackable file systems. > -+ > -+2. Lockdep (a debugging feature) isn't aware of stacking, and so it > -+ incorrectly complains about locking problems. The problem boils down to > -+ this: Lockdep considers all objects of a certain type to be in the same > -+ class, for example, all inodes. Lockdep doesn't like to see a lock held > -+ on two inodes within the same task, and warns that it could lead to a > -+ deadlock. However, stackable file systems do precisely that: they lock > -+ an upper object, and then a lower object, in a strict order to avoid > -+ locking problems; in addition, Unionfs, as a fan-out file system, may > -+ have to lock several lower inodes. We are currently looking into Lockdep > -+ to see how to make it aware of stackable file systems. For now, we > -+ temporarily disable lockdep when calling vfs methods on lower objects, > -+ but only for those places where lockdep complained. While this solution > -+ may seem unclean, it is not without precedent: other places in the kernel > -+ also do similar temporary disabling, of course after carefully having > -+ checked that it is the right thing to do. Anyway, you get any warnings > -+ from Lockdep, please report them to the Unionfs maintainers. > -+ > -+For more information, see <http://unionfs.filesystems.org/>. > -diff --git a/Documentation/filesystems/unionfs/rename.txt > b/Documentation/filesystems/unionfs/rename.txt > -new file mode 100644 > -index 0000000..e20bb82 > ---- /dev/null > -+++ b/Documentation/filesystems/unionfs/rename.txt > -@@ -0,0 +1,31 @@ > -+Rename is a complex beast. The following table shows which rename(2) > operations > -+should succeed and which should fail. > -+ > -+o: success > -+E: error (either unionfs or vfs) > -+X: EXDEV > -+ > -+none = file does not exist > -+file = file is a file > -+dir = file is a empty directory > -+child= file is a non-empty directory > -+wh = file is a directory containing only whiteouts; this makes it logically > -+ empty > -+ > -+ none file dir child wh > -+file o o E E E > -+dir o E o E o > -+child X E X E X > -+wh o E o E o > -+ > -+ > -+Renaming directories: > -+===================== > -+ > -+Whenever a empty (either physically or logically) directory is being renamed, > -+the following sequence of events should take place: > -+ > -+1) Remove whiteouts from both source and destination directory > -+2) Rename source to destination > -+3) Make destination opaque to prevent anything under it from showing up > -+ > -diff --git a/Documentation/filesystems/unionfs/usage.txt > b/Documentation/filesystems/unionfs/usage.txt > -new file mode 100644 > -index 0000000..1adde69 > ---- /dev/null > -+++ b/Documentation/filesystems/unionfs/usage.txt > -@@ -0,0 +1,134 @@ > -+Unionfs is a stackable unification file system, which can appear to merge > -+the contents of several directories (branches), while keeping their physical > -+content separate. Unionfs is useful for unified source tree management, > -+merged contents of split CD-ROM, merged separate software package > -+directories, data grids, and more. Unionfs allows any mix of read-only and > -+read-write branches, as well as insertion and deletion of branches anywhere > -+in the fan-out. To maintain Unix semantics, Unionfs handles elimination of > -+duplicates, partial-error conditions, and more. > -+ > -+GENERAL SYNTAX > -+============== > -+ > -+# mount -t unionfs -o <OPTIONS>,<BRANCH-OPTIONS> none MOUNTPOINT > -+ > -+OPTIONS can be any legal combination of: > -+ > -+- ro # mount file system read-only > -+- rw # mount file system read-write > -+- remount # remount the file system (see Branch Management below) > -+- incgen # increment generation no. (see Cache Consistency below) > -+ > -+BRANCH-OPTIONS can be either (1) a list of branches given to the "dirs=" > -+option, or (2) a list of individual branch manipulation commands, combined > -+with the "remount" option, and is further described in the "Branch > -+Management" section below. > -+ > -+The syntax for the "dirs=" mount option is: > -+ > -+ dirs=branch[=ro|=rw][:...] > -+ > -+The "dirs=" option takes a colon-delimited list of directories to compose > -+the union, with an optional branch mode for each of those directories. > -+Directories that come earlier (specified first, on the left) in the list > -+have a higher precedence than those which come later. Additionally, > -+read-only or read-write permissions of the branch can be specified by > -+appending =ro or =rw (default) to each directory. See the Copyup section in > -+concepts.txt, for a description of Unionfs's behavior when mixing read-only > -+and read-write branches and mounts. > -+ > -+Syntax: > -+ > -+ dirs=/branch1[=ro|=rw]:/branch2[=ro|=rw]:...:/branchN[=ro|=rw] > -+ > -+Example: > -+ > -+ dirs=/writable_branch=rw:/read-only_branch=ro > -+ > -+ > -+BRANCH MANAGEMENT > -+================= > -+ > -+Once you mount your union for the first time, using the "dirs=" option, you > -+can then change the union's overall mode or reconfigure the branches, using > -+the remount option, as follows. > -+ > -+To downgrade a union from read-write to read-only: > -+ > -+# mount -t unionfs -o remount,ro none MOUNTPOINT > -+ > -+To upgrade a union from read-only to read-write: > -+ > -+# mount -t unionfs -o remount,rw none MOUNTPOINT > -+ > -+To delete a branch /foo, regardless where it is in the current union: > -+ > -+# mount -t unionfs -o remount,del=/foo none MOUNTPOINT > -+ > -+To insert (add) a branch /foo before /bar: > -+ > -+# mount -t unionfs -o remount,add=/bar:/foo none MOUNTPOINT > -+ > -+To insert (add) a branch /foo (with the "rw" mode flag) before /bar: > -+ > -+# mount -t unionfs -o remount,add=/bar:/foo=rw none MOUNTPOINT > -+ > -+To insert (add) a branch /foo (in "rw" mode) at the very beginning (i.e., a > -+new highest-priority branch), you can use the above syntax, or use a short > -+hand version as follows: > -+ > -+# mount -t unionfs -o remount,add=/foo none MOUNTPOINT > -+ > -+To append a branch to the very end (new lowest-priority branch): > -+ > -+# mount -t unionfs -o remount,add=:/foo none MOUNTPOINT > -+ > -+To append a branch to the very end (new lowest-priority branch), in > -+read-only mode: > -+ > -+# mount -t unionfs -o remount,add=:/foo=ro none MOUNTPOINT > -+ > -+Finally, to change the mode of one existing branch, say /foo, from read-only > -+to read-write, and change /bar from read-write to read-only: > -+ > -+# mount -t unionfs -o remount,mode=/foo=rw,mode=/bar=ro none > MOUNTPOINT > -+ > -+Note: in Unionfs 2.x, you cannot set the leftmost branch to readonly because > -+then Unionfs won't have any writable place for copyups to take place. > -+Moreover, the VFS can get confused when it tries to modify something in a > -+file system mounted read-write, but isn't permitted to write to it. > -+Instead, you should set the whole union as readonly, as described above. > -+If, however, you must set the leftmost branch as readonly, perhaps so you > -+can get a snapshot of it at a point in time, then you should insert a new > -+writable top-level branch, and mark the one you want as readonly. This can > -+be accomplished as follows, assuming that /foo is your current leftmost > -+branch: > -+ > -+# mount -t tmpfs -o size=NNN /new > -+# mount -t unionfs -o remount,add=/new,mode=/foo=ro none MOUNTPOINT > -+<do what you want safely in /foo> > -+# mount -t unionfs -o remount,del=/new,mode=/foo=rw none MOUNTPOINT > -+<check if there's anything in /new you want to preserve> > -+# umount /new > -+ > -+CACHE CONSISTENCY > -+================= > -+ > -+If you modify any file on any of the lower branches directly, while there is > -+a Unionfs 2.x mounted above any of those branches, you should tell Unionfs > -+to purge its caches and re-get the objects. To do that, you have to > -+increment the generation number of the superblock using the following > -+command: > -+ > -+# mount -t unionfs -o remount,incgen none MOUNTPOINT > -+ > -+Note that the older way of incrementing the generation number using an > -+ioctl, is no longer supported in Unionfs 2.0 and newer. Ioctls in general > -+are not encouraged. Plus, an ioctl is per-file concept, whereas the > -+generation number is a per-file-system concept. Worse, such an ioctl > -+requires an open file, which then has to be invalidated by the very nature > -+of the generation number increase (read: the old generation increase ioctl > -+was pretty racy). > -+ > -+ > -+For more information, see <http://unionfs.filesystems.org/>. > -diff --git a/MAINTAINERS b/MAINTAINERS > -index 69f19f1..fd88a30 100644 > ---- a/MAINTAINERS > -+++ b/MAINTAINERS > -@@ -6319,6 +6319,14 @@ F: Documentation/cdrom/ > - F: drivers/cdrom/cdrom.c > - F: include/linux/cdrom.h > - > -+UNIONFS > -+P: Erez Zadok > -+M: ezk@cs.sunysb.edu > -+L: unionfs@filesystems.org > -+W: http://unionfs.filesystems.org/ > -+T: git git.kernel.org/pub/scm/linux/kernel/git/ezk/unionfs.git > -+S: Maintained > -+ > - UNSORTED BLOCK IMAGES (UBI) > - M: Artem Bityutskiy <dedekind1@gmail.com> > - W: http://www.linux-mtd.infradead.org/ > -diff --git a/fs/Kconfig b/fs/Kconfig > -index f3aa9b0..0e6182c 100644 > ---- a/fs/Kconfig > -+++ b/fs/Kconfig > -@@ -170,6 +170,7 @@ if MISC_FILESYSTEMS > - source "fs/adfs/Kconfig" > - source "fs/affs/Kconfig" > - source "fs/ecryptfs/Kconfig" > -+source "fs/unionfs/Kconfig" > - source "fs/hfs/Kconfig" > - source "fs/hfsplus/Kconfig" > - source "fs/befs/Kconfig" > -diff --git a/fs/Makefile b/fs/Makefile > -index fb68c2b..8ca9290 100644 > ---- a/fs/Makefile > -+++ b/fs/Makefile > -@@ -83,6 +83,7 @@ obj-$(CONFIG_ISO9660_FS) += isofs/ > - obj-$(CONFIG_HFSPLUS_FS) += hfsplus/ # Before hfs to find wrapped HFS+ > - obj-$(CONFIG_HFS_FS) += hfs/ > - obj-$(CONFIG_ECRYPT_FS) += ecryptfs/ > -+obj-$(CONFIG_UNION_FS) += unionfs/ > - obj-$(CONFIG_VXFS_FS) += freevxfs/ > - obj-$(CONFIG_NFS_FS) += nfs/ > - obj-$(CONFIG_EXPORTFS) += exportfs/ > -diff --git a/fs/namei.c b/fs/namei.c > -index e3c4f11..d9f99a4 100644 > ---- a/fs/namei.c > -+++ b/fs/namei.c > -@@ -578,6 +578,7 @@ void release_open_intent(struct nameidata *nd) > - fput(file); > - } > - } > -+EXPORT_SYMBOL_GPL(release_open_intent); > - > - static inline int d_revalidate(struct dentry *dentry, struct nameidata *nd) > - { > -@@ -1819,6 +1820,42 @@ struct dentry *lookup_one_len(const char *name, > struct dentry *base, int len) > - return __lookup_hash(&this, base, NULL); > - } > - > -+/* pass nameidata from caller (useful for NFS) */ > -+struct dentry *lookup_one_len_nd(const char *name, struct dentry *base, > -+ int len, struct nameidata *nd) > -+{ > -+ struct qstr this; > -+ unsigned long hash; > -+ unsigned int c; > -+ > -+ WARN_ON_ONCE(!mutex_is_locked(&base->d_inode->i_mutex)); > -+ > -+ this.name = name; > -+ this.len = len; > -+ if (!len) > -+ return ERR_PTR(-EACCES); > -+ > -+ hash = init_name_hash(); > -+ while (len--) { > -+ c = *(const unsigned char *)name++; > -+ if (c == '/' || c == '\0') > -+ return ERR_PTR(-EACCES); > -+ hash = partial_name_hash(c, hash); > -+ } > -+ this.hash = end_name_hash(hash); > -+ /* > -+ * See if the low-level filesystem might want > -+ * to use its own hash.. > -+ */ > -+ if (base->d_flags & DCACHE_OP_HASH) { > -+ int err = base->d_op->d_hash(base, base->d_inode, &this); > -+ if (err < 0) > -+ return ERR_PTR(err); > -+ } > -+ > -+ return __lookup_hash(&this, base, nd); > -+} > -+ > - int user_path_at(int dfd, const char __user *name, unsigned flags, > - struct path *path) > - { > -@@ -3422,6 +3459,7 @@ EXPORT_SYMBOL(get_write_access); /* > binfmt_aout */ > - EXPORT_SYMBOL(getname); > - EXPORT_SYMBOL(lock_rename); > - EXPORT_SYMBOL(lookup_one_len); > -+EXPORT_SYMBOL(lookup_one_len_nd); > - EXPORT_SYMBOL(page_follow_link_light); > - EXPORT_SYMBOL(page_put_link); > - EXPORT_SYMBOL(page_readlink); > -diff --git a/fs/splice.c b/fs/splice.c > -index 50a5d97..a3af841 100644 > ---- a/fs/splice.c > -+++ b/fs/splice.c > -@@ -1081,8 +1081,8 @@ EXPORT_SYMBOL(generic_splice_sendpage); > - /* > - * Attempt to initiate a splice from pipe to file. > - */ > --static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, > -- loff_t *ppos, size_t len, unsigned int flags) > -+long vfs_splice_from(struct pipe_inode_info *pipe, struct file *out, > -+ loff_t *ppos, size_t len, unsigned int flags) > - { > - ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, > - loff_t *, size_t, unsigned int); > -@@ -1105,13 +1105,14 @@ static long do_splice_from(struct > pipe_inode_info *pipe, struct file *out, > - > - return splice_write(pipe, out, ppos, len, flags); > - } > -+EXPORT_SYMBOL_GPL(vfs_splice_from); > - > - /* > - * Attempt to initiate a splice from a file to a pipe. > - */ > --static long do_splice_to(struct file *in, loff_t *ppos, > -- struct pipe_inode_info *pipe, size_t len, > -- unsigned int flags) > -+long vfs_splice_to(struct file *in, loff_t *ppos, > -+ struct pipe_inode_info *pipe, size_t len, > -+ unsigned int flags) > - { > - ssize_t (*splice_read)(struct file *, loff_t *, > - struct pipe_inode_info *, size_t, unsigned int); > -@@ -1131,6 +1132,7 @@ static long do_splice_to(struct file *in, loff_t *ppos, > - > - return splice_read(in, ppos, pipe, len, flags); > - } > -+EXPORT_SYMBOL_GPL(vfs_splice_to); > - > - /** > - * splice_direct_to_actor - splices data directly between two non-pipes > -@@ -1200,7 +1202,7 @@ ssize_t splice_direct_to_actor(struct file *in, struct > splice_desc *sd, > - size_t read_len; > - loff_t pos = sd->pos, prev_pos = pos; > - > -- ret = do_splice_to(in, &pos, pipe, len, flags); > -+ ret = vfs_splice_to(in, &pos, pipe, len, flags); > - if (unlikely(ret <= 0)) > - goto out_release; > - > -@@ -1259,8 +1261,8 @@ static int direct_splice_actor(struct pipe_inode_info > *pipe, > - { > - struct file *file = sd->u.file; > - > -- return do_splice_from(pipe, file, &file->f_pos, sd->total_len, > -- sd->flags); > -+ return vfs_splice_from(pipe, file, &file->f_pos, sd->total_len, > -+ sd->flags); > - } > - > - /** > -@@ -1345,7 +1347,7 @@ static long do_splice(struct file *in, loff_t __user > *off_in, > - } else > - off = &out->f_pos; > - > -- ret = do_splice_from(ipipe, out, off, len, flags); > -+ ret = vfs_splice_from(ipipe, out, off, len, flags); > - > - if (off_out && copy_to_user(off_out, off, sizeof(loff_t))) > - ret = -EFAULT; > -@@ -1365,7 +1367,7 @@ static long do_splice(struct file *in, loff_t __user > *off_in, > - } else > - off = &in->f_pos; > - > -- ret = do_splice_to(in, off, opipe, len, flags); > -+ ret = vfs_splice_to(in, off, opipe, len, flags); > - > - if (off_in && copy_to_user(off_in, off, sizeof(loff_t))) > - ret = -EFAULT; > -diff --git a/fs/stack.c b/fs/stack.c > -index 4a6f7f4..7eeef12 100644 > ---- a/fs/stack.c > -+++ b/fs/stack.c > -@@ -1,8 +1,20 @@ > -+/* > -+ * Copyright (c) 2006-2009 Erez Zadok > -+ * Copyright (c) 2006-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2006-2009 Stony Brook University > -+ * Copyright (c) 2006-2009 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > - #include <linux/module.h> > - #include <linux/fs.h> > - #include <linux/fs_stack.h> > - > --/* does _NOT_ require i_mutex to be held. > -+/* > -+ * does _NOT_ require i_mutex to be held. > - * > - * This function cannot be inlined since i_size_{read,write} is rather > - * heavy-weight on 32-bit systems > -diff --git a/fs/unionfs/Kconfig b/fs/unionfs/Kconfig > -new file mode 100644 > -index 0000000..f3c1ac4 > ---- /dev/null > -+++ b/fs/unionfs/Kconfig > -@@ -0,0 +1,24 @@ > -+config UNION_FS > -+ tristate "Union file system (EXPERIMENTAL)" > -+ depends on EXPERIMENTAL > -+ help > -+ Unionfs is a stackable unification file system, which appears to > -+ merge the contents of several directories (branches), while keeping > -+ their physical content separate. > -+ > -+ See <http://unionfs.filesystems.org> for details > -+ > -+config UNION_FS_XATTR > -+ bool "Unionfs extended attributes" > -+ depends on UNION_FS > -+ help > -+ Extended attributes are name:value pairs associated with inodes by > -+ the kernel or by users (see the attr(5) manual page). > -+ > -+ If unsure, say N. > -+ > -+config UNION_FS_DEBUG > -+ bool "Debug Unionfs" > -+ depends on UNION_FS > -+ help > -+ If you say Y here, you can turn on debugging output from Unionfs. > -diff --git a/fs/unionfs/Makefile b/fs/unionfs/Makefile > -new file mode 100644 > -index 0000000..3e31847 > ---- /dev/null > -+++ b/fs/unionfs/Makefile > -@@ -0,0 +1,17 @@ > -+UNIONFS_VERSION="2.5.9 (for 2.6.39-rc5)" > -+ > -+EXTRA_CFLAGS += -DUNIONFS_VERSION=\"$(UNIONFS_VERSION)\" > -+ > -+obj-$(CONFIG_UNION_FS) += unionfs.o > -+ > -+unionfs-y := subr.o dentry.o file.o inode.o main.o super.o \ > -+ rdstate.o copyup.o dirhelper.o rename.o unlink.o \ > -+ lookup.o commonfops.o dirfops.o sioq.o mmap.o whiteout.o > -+ > -+unionfs-$(CONFIG_UNION_FS_XATTR) += xattr.o > -+ > -+unionfs-$(CONFIG_UNION_FS_DEBUG) += debug.o > -+ > -+ifeq ($(CONFIG_UNION_FS_DEBUG),y) > -+EXTRA_CFLAGS += -DDEBUG > -+endif > -diff --git a/fs/unionfs/commonfops.c b/fs/unionfs/commonfops.c > -new file mode 100644 > -index 0000000..9f63b1c > ---- /dev/null > -+++ b/fs/unionfs/commonfops.c > -@@ -0,0 +1,898 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * 1) Copyup the file > -+ * 2) Rename the file to '.unionfs<original inode#><counter>' - obviously > -+ * stolen from NFS's silly rename > -+ */ > -+static int copyup_deleted_file(struct file *file, struct dentry *dentry, > -+ struct dentry *parent, int bstart, int bindex) > -+{ > -+ static unsigned int counter; > -+ const int i_inosize = sizeof(dentry->d_inode->i_ino) * 2; > -+ const int countersize = sizeof(counter) * 2; > -+ const int nlen = sizeof(".unionfs") + i_inosize + countersize - 1; > -+ char name[nlen + 1]; > -+ int err; > -+ struct dentry *tmp_dentry = NULL; > -+ struct dentry *lower_dentry; > -+ struct dentry *lower_dir_dentry = NULL; > -+ > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bstart); > -+ > -+ sprintf(name, ".unionfs%*.*lx", > -+ i_inosize, i_inosize, lower_dentry->d_inode->i_ino); > -+ > -+ /* > -+ * Loop, looking for an unused temp name to copyup to. > -+ * > -+ * It's somewhat silly that we look for a free temp tmp name in the > -+ * source branch (bstart) instead of the dest branch (bindex), where > -+ * the final name will be created. We _will_ catch it if somehow > -+ * the name exists in the dest branch, but it'd be nice to catch it > -+ * sooner than later. > -+ */ > -+retry: > -+ tmp_dentry = NULL; > -+ do { > -+ char *suffix = name + nlen - countersize; > -+ > -+ dput(tmp_dentry); > -+ counter++; > -+ sprintf(suffix, "%*.*x", countersize, countersize, counter); > -+ > -+ pr_debug("unionfs: trying to rename %s to %s\n", > -+ dentry->d_name.name, name); > -+ > -+ tmp_dentry = lookup_lck_len(name, lower_dentry->d_parent, > -+ nlen); > -+ if (IS_ERR(tmp_dentry)) { > -+ err = PTR_ERR(tmp_dentry); > -+ goto out; > -+ } > -+ } while (tmp_dentry->d_inode != NULL); /* need negative dentry */ > -+ dput(tmp_dentry); > -+ > -+ err = copyup_named_file(parent->d_inode, file, name, bstart, bindex, > -+ i_size_read(file->f_path.dentry->d_inode)); > -+ if (err) { > -+ if (unlikely(err == -EEXIST)) > -+ goto retry; > -+ goto out; > -+ } > -+ > -+ /* bring it to the same state as an unlinked file */ > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, dbstart(dentry)); > -+ if (!unionfs_lower_inode_idx(dentry->d_inode, bindex)) { > -+ atomic_inc(&lower_dentry->d_inode->i_count); > -+ unionfs_set_lower_inode_idx(dentry->d_inode, bindex, > -+ lower_dentry->d_inode); > -+ } > -+ lower_dir_dentry = lock_parent(lower_dentry); > -+ err = vfs_unlink(lower_dir_dentry->d_inode, lower_dentry); > -+ unlock_dir(lower_dir_dentry); > -+ > -+out: > -+ if (!err) > -+ unionfs_check_dentry(dentry); > -+ return err; > -+} > -+ > -+/* > -+ * put all references held by upper struct file and free lower file pointer > -+ * array > -+ */ > -+static void cleanup_file(struct file *file) > -+{ > -+ int bindex, bstart, bend; > -+ struct file **lower_files; > -+ struct file *lower_file; > -+ struct super_block *sb = file->f_path.dentry->d_sb; > -+ > -+ lower_files = UNIONFS_F(file)->lower_files; > -+ bstart = fbstart(file); > -+ bend = fbend(file); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ int i; /* holds (possibly) updated branch index */ > -+ int old_bid; > -+ > -+ lower_file = unionfs_lower_file_idx(file, bindex); > -+ if (!lower_file) > -+ continue; > -+ > -+ /* > -+ * Find new index of matching branch with an open > -+ * file, since branches could have been added or > -+ * deleted causing the one with open files to shift. > -+ */ > -+ old_bid = UNIONFS_F(file)->saved_branch_ids[bindex]; > -+ i = branch_id_to_idx(sb, old_bid); > -+ if (unlikely(i < 0)) { > -+ printk(KERN_ERR "unionfs: no superblock for " > -+ "file %p\n", file); > -+ continue; > -+ } > -+ > -+ /* decrement count of open files */ > -+ branchput(sb, i); > -+ /* > -+ * fput will perform an mntput for us on the correct branch. > -+ * Although we're using the file's old branch configuration, > -+ * bindex, which is the old index, correctly points to the > -+ * right branch in the file's branch list. In other words, > -+ * we're going to mntput the correct branch even if branches > -+ * have been added/removed. > -+ */ > -+ fput(lower_file); > -+ UNIONFS_F(file)->lower_files[bindex] = NULL; > -+ UNIONFS_F(file)->saved_branch_ids[bindex] = -1; > -+ } > -+ > -+ UNIONFS_F(file)->lower_files = NULL; > -+ kfree(lower_files); > -+ kfree(UNIONFS_F(file)->saved_branch_ids); > -+ /* set to NULL because caller needs to know if to kfree on error */ > -+ UNIONFS_F(file)->saved_branch_ids = NULL; > -+} > -+ > -+/* open all lower files for a given file */ > -+static int open_all_files(struct file *file) > -+{ > -+ int bindex, bstart, bend, err = 0; > -+ struct file *lower_file; > -+ struct dentry *lower_dentry; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct super_block *sb = dentry->d_sb; > -+ > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) > -+ continue; > -+ > -+ dget(lower_dentry); > -+ unionfs_mntget(dentry, bindex); > -+ branchget(sb, bindex); > -+ > -+ lower_file = > -+ dentry_open(lower_dentry, > -+ unionfs_lower_mnt_idx(dentry, bindex), > -+ file->f_flags, current_cred()); > -+ if (IS_ERR(lower_file)) { > -+ branchput(sb, bindex); > -+ err = PTR_ERR(lower_file); > -+ goto out; > -+ } else { > -+ unionfs_set_lower_file_idx(file, bindex, lower_file); > -+ } > -+ } > -+out: > -+ return err; > -+} > -+ > -+/* open the highest priority file for a given upper file */ > -+static int open_highest_file(struct file *file, bool willwrite) > -+{ > -+ int bindex, bstart, bend, err = 0; > -+ struct file *lower_file; > -+ struct dentry *lower_dentry; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent = dget_parent(dentry); > -+ struct inode *parent_inode = parent->d_inode; > -+ struct super_block *sb = dentry->d_sb; > -+ > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ if (willwrite && IS_WRITE_FLAG(file->f_flags) && is_robranch(dentry)) > { > -+ for (bindex = bstart - 1; bindex >= 0; bindex--) { > -+ err = copyup_file(parent_inode, file, bstart, bindex, > -+ i_size_read(dentry->d_inode)); > -+ if (!err) > -+ break; > -+ } > -+ atomic_set(&UNIONFS_F(file)->generation, > -+ atomic_read(&UNIONFS_I(dentry->d_inode)-> > -+ generation)); > -+ goto out; > -+ } > -+ > -+ dget(lower_dentry); > -+ unionfs_mntget(dentry, bstart); > -+ lower_file = dentry_open(lower_dentry, > -+ unionfs_lower_mnt_idx(dentry, bstart), > -+ file->f_flags, current_cred()); > -+ if (IS_ERR(lower_file)) { > -+ err = PTR_ERR(lower_file); > -+ goto out; > -+ } > -+ branchget(sb, bstart); > -+ unionfs_set_lower_file(file, lower_file); > -+ /* Fix up the position. */ > -+ lower_file->f_pos = file->f_pos; > -+ > -+ memcpy(&lower_file->f_ra, &file->f_ra, sizeof(struct file_ra_state)); > -+out: > -+ dput(parent); > -+ return err; > -+} > -+ > -+/* perform a delayed copyup of a read-write file on a read-only branch */ > -+static int do_delayed_copyup(struct file *file, struct dentry *parent) > -+{ > -+ int bindex, bstart, bend, err = 0; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct inode *parent_inode = parent->d_inode; > -+ > -+ bstart = fbstart(file); > -+ bend = fbend(file); > -+ > -+ BUG_ON(!S_ISREG(dentry->d_inode->i_mode)); > -+ > -+ unionfs_check_file(file); > -+ for (bindex = bstart - 1; bindex >= 0; bindex--) { > -+ if (!d_deleted(dentry)) > -+ err = copyup_file(parent_inode, file, bstart, > -+ bindex, > -+ i_size_read(dentry->d_inode)); > -+ else > -+ err = copyup_deleted_file(file, dentry, parent, > -+ bstart, bindex); > -+ /* if succeeded, set lower open-file flags and break */ > -+ if (!err) { > -+ struct file *lower_file; > -+ lower_file = unionfs_lower_file_idx(file, bindex); > -+ lower_file->f_flags = file->f_flags; > -+ break; > -+ } > -+ } > -+ if (err || (bstart <= fbstart(file))) > -+ goto out; > -+ bend = fbend(file); > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ if (unionfs_lower_file_idx(file, bindex)) { > -+ branchput(dentry->d_sb, bindex); > -+ fput(unionfs_lower_file_idx(file, bindex)); > -+ unionfs_set_lower_file_idx(file, bindex, NULL); > -+ } > -+ } > -+ path_put_lowers(dentry, bstart, bend, false); > -+ iput_lowers(dentry->d_inode, bstart, bend, false); > -+ /* for reg file, we only open it "once" */ > -+ fbend(file) = fbstart(file); > -+ dbend(dentry) = dbstart(dentry); > -+ ibend(dentry->d_inode) = ibstart(dentry->d_inode); > -+ > -+out: > -+ unionfs_check_file(file); > -+ return err; > -+} > -+ > -+/* > -+ * Helper function for unionfs_file_revalidate/locked. > -+ * Expects dentry/parent to be locked already, and revalidated. > -+ */ > -+static int __unionfs_file_revalidate(struct file *file, struct dentry *dentry, > -+ struct dentry *parent, > -+ struct super_block *sb, int sbgen, > -+ int dgen, bool willwrite) > -+{ > -+ int fgen; > -+ int bstart, bend, orig_brid; > -+ int size; > -+ int err = 0; > -+ > -+ fgen = atomic_read(&UNIONFS_F(file)->generation); > -+ > -+ /* > -+ * There are two cases we are interested in. The first is if the > -+ * generation is lower than the super-block. The second is if > -+ * someone has copied up this file from underneath us, we also need > -+ * to refresh things. > -+ */ > -+ if ((d_deleted(dentry) && dbstart(dentry) >= fbstart(file)) || > -+ (sbgen <= fgen && > -+ dbstart(dentry) == fbstart(file) && > -+ unionfs_lower_file(file))) > -+ goto out_may_copyup; > -+ > -+ /* save orig branch ID */ > -+ orig_brid = UNIONFS_F(file)->saved_branch_ids[fbstart(file)]; > -+ > -+ /* First we throw out the existing files. */ > -+ cleanup_file(file); > -+ > -+ /* Now we reopen the file(s) as in unionfs_open. */ > -+ bstart = fbstart(file) = dbstart(dentry); > -+ bend = fbend(file) = dbend(dentry); > -+ > -+ size = sizeof(struct file *) * sbmax(sb); > -+ UNIONFS_F(file)->lower_files = kzalloc(size, GFP_KERNEL); > -+ if (unlikely(!UNIONFS_F(file)->lower_files)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ size = sizeof(int) * sbmax(sb); > -+ UNIONFS_F(file)->saved_branch_ids = kzalloc(size, GFP_KERNEL); > -+ if (unlikely(!UNIONFS_F(file)->saved_branch_ids)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ if (S_ISDIR(dentry->d_inode->i_mode)) { > -+ /* We need to open all the files. */ > -+ err = open_all_files(file); > -+ if (err) > -+ goto out; > -+ } else { > -+ int new_brid; > -+ /* We only open the highest priority branch. */ > -+ err = open_highest_file(file, willwrite); > -+ if (err) > -+ goto out; > -+ new_brid = UNIONFS_F(file)->saved_branch_ids[fbstart(file)]; > -+ if (unlikely(new_brid != orig_brid && sbgen > fgen)) { > -+ /* > -+ * If we re-opened the file on a different branch > -+ * than the original one, and this was due to a new > -+ * branch inserted, then update the mnt counts of > -+ * the old and new branches accordingly. > -+ */ > -+ unionfs_mntget(dentry, bstart); > -+ unionfs_mntput(sb->s_root, > -+ branch_id_to_idx(sb, orig_brid)); > -+ } > -+ /* regular files have only one open lower file */ > -+ fbend(file) = fbstart(file); > -+ } > -+ atomic_set(&UNIONFS_F(file)->generation, > -+ atomic_read(&UNIONFS_I(dentry->d_inode)->generation)); > -+ > -+out_may_copyup: > -+ /* Copyup on the first write to a file on a readonly branch. */ > -+ if (willwrite && IS_WRITE_FLAG(file->f_flags) && > -+ !IS_WRITE_FLAG(unionfs_lower_file(file)->f_flags) && > -+ is_robranch(dentry)) { > -+ pr_debug("unionfs: do delay copyup of \"%s\"\n", > -+ dentry->d_name.name); > -+ err = do_delayed_copyup(file, parent); > -+ /* regular files have only one open lower file */ > -+ if (!err && !S_ISDIR(dentry->d_inode->i_mode)) > -+ fbend(file) = fbstart(file); > -+ } > -+ > -+out: > -+ if (err) { > -+ kfree(UNIONFS_F(file)->lower_files); > -+ kfree(UNIONFS_F(file)->saved_branch_ids); > -+ } > -+ return err; > -+} > -+ > -+/* > -+ * Revalidate the struct file > -+ * @file: file to revalidate > -+ * @parent: parent dentry (locked by caller) > -+ * @willwrite: true if caller may cause changes to the file; false otherwise. > -+ * Caller must lock/unlock dentry's branch configuration. > -+ */ > -+int unionfs_file_revalidate(struct file *file, struct dentry *parent, > -+ bool willwrite) > -+{ > -+ struct super_block *sb; > -+ struct dentry *dentry; > -+ int sbgen, dgen; > -+ int err = 0; > -+ > -+ dentry = file->f_path.dentry; > -+ sb = dentry->d_sb; > -+ verify_locked(dentry); > -+ verify_locked(parent); > -+ > -+ /* > -+ * First revalidate the dentry inside struct file, > -+ * but not unhashed dentries. > -+ */ > -+ if (!d_deleted(dentry) && > -+ !__unionfs_d_revalidate(dentry, parent, willwrite)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ sbgen = atomic_read(&UNIONFS_SB(sb)->generation); > -+ dgen = atomic_read(&UNIONFS_D(dentry)->generation); > -+ > -+ if (unlikely(sbgen > dgen)) { /* XXX: should never happen */ > -+ pr_debug("unionfs: failed to revalidate dentry (%s)\n", > -+ dentry->d_name.name); > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ err = __unionfs_file_revalidate(file, dentry, parent, sb, > -+ sbgen, dgen, willwrite); > -+out: > -+ return err; > -+} > -+ > -+/* unionfs_open helper function: open a directory */ > -+static int __open_dir(struct inode *inode, struct file *file) > -+{ > -+ struct dentry *lower_dentry; > -+ struct file *lower_file; > -+ int bindex, bstart, bend; > -+ struct vfsmount *mnt; > -+ > -+ bstart = fbstart(file) = dbstart(file->f_path.dentry); > -+ bend = fbend(file) = dbend(file->f_path.dentry); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = > -+ unionfs_lower_dentry_idx(file->f_path.dentry, > bindex); > -+ if (!lower_dentry) > -+ continue; > -+ > -+ dget(lower_dentry); > -+ unionfs_mntget(file->f_path.dentry, bindex); > -+ mnt = unionfs_lower_mnt_idx(file->f_path.dentry, bindex); > -+ lower_file = dentry_open(lower_dentry, mnt, file->f_flags, > -+ current_cred()); > -+ if (IS_ERR(lower_file)) > -+ return PTR_ERR(lower_file); > -+ > -+ unionfs_set_lower_file_idx(file, bindex, lower_file); > -+ > -+ /* > -+ * The branchget goes after the open, because otherwise > -+ * we would miss the reference on release. > -+ */ > -+ branchget(inode->i_sb, bindex); > -+ } > -+ > -+ return 0; > -+} > -+ > -+/* unionfs_open helper function: open a file */ > -+static int __open_file(struct inode *inode, struct file *file, > -+ struct dentry *parent) > -+{ > -+ struct dentry *lower_dentry; > -+ struct file *lower_file; > -+ int lower_flags; > -+ int bindex, bstart, bend; > -+ > -+ lower_dentry = unionfs_lower_dentry(file->f_path.dentry); > -+ lower_flags = file->f_flags; > -+ > -+ bstart = fbstart(file) = dbstart(file->f_path.dentry); > -+ bend = fbend(file) = dbend(file->f_path.dentry); > -+ > -+ /* > -+ * check for the permission for lower file. If the error is > -+ * COPYUP_ERR, copyup the file. > -+ */ > -+ if (lower_dentry->d_inode && is_robranch(file->f_path.dentry)) { > -+ /* > -+ * if the open will change the file, copy it up otherwise > -+ * defer it. > -+ */ > -+ if (lower_flags & O_TRUNC) { > -+ int size = 0; > -+ int err = -EROFS; > -+ > -+ /* copyup the file */ > -+ for (bindex = bstart - 1; bindex >= 0; bindex--) { > -+ err = copyup_file(parent->d_inode, file, > -+ bstart, bindex, size); > -+ if (!err) { > -+ /* only one regular file open */ > -+ fbend(file) = fbstart(file); > -+ break; > -+ } > -+ } > -+ return err; > -+ } else { > -+ /* > -+ * turn off writeable flags, to force delayed copyup > -+ * by caller. > -+ */ > -+ lower_flags &= ~(OPEN_WRITE_FLAGS); > -+ } > -+ } > -+ > -+ dget(lower_dentry); > -+ > -+ /* > -+ * dentry_open will decrement mnt refcnt if err. > -+ * otherwise fput() will do an mntput() for us upon file close. > -+ */ > -+ unionfs_mntget(file->f_path.dentry, bstart); > -+ lower_file = > -+ dentry_open(lower_dentry, > -+ unionfs_lower_mnt_idx(file->f_path.dentry, bstart), > -+ lower_flags, current_cred()); > -+ if (IS_ERR(lower_file)) > -+ return PTR_ERR(lower_file); > -+ > -+ unionfs_set_lower_file(file, lower_file); > -+ branchget(inode->i_sb, bstart); > -+ > -+ return 0; > -+} > -+ > -+int unionfs_open(struct inode *inode, struct file *file) > -+{ > -+ int err = 0; > -+ struct file *lower_file = NULL; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ int bindex = 0, bstart = 0, bend = 0; > -+ int size; > -+ int valid = 0; > -+ > -+ unionfs_read_lock(inode->i_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ /* don't open unhashed/deleted files */ > -+ if (d_deleted(dentry)) { > -+ err = -ENOENT; > -+ goto out_nofree; > -+ } > -+ > -+ /* XXX: should I change 'false' below to the 'willwrite' flag? */ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out_nofree; > -+ } > -+ > -+ file->private_data = > -+ kzalloc(sizeof(struct unionfs_file_info), GFP_KERNEL); > -+ if (unlikely(!UNIONFS_F(file))) { > -+ err = -ENOMEM; > -+ goto out_nofree; > -+ } > -+ fbstart(file) = -1; > -+ fbend(file) = -1; > -+ atomic_set(&UNIONFS_F(file)->generation, > -+ atomic_read(&UNIONFS_I(inode)->generation)); > -+ > -+ size = sizeof(struct file *) * sbmax(inode->i_sb); > -+ UNIONFS_F(file)->lower_files = kzalloc(size, GFP_KERNEL); > -+ if (unlikely(!UNIONFS_F(file)->lower_files)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ size = sizeof(int) * sbmax(inode->i_sb); > -+ UNIONFS_F(file)->saved_branch_ids = kzalloc(size, GFP_KERNEL); > -+ if (unlikely(!UNIONFS_F(file)->saved_branch_ids)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ bstart = fbstart(file) = dbstart(dentry); > -+ bend = fbend(file) = dbend(dentry); > -+ > -+ /* > -+ * open all directories and make the unionfs file struct point to > -+ * these lower file structs > -+ */ > -+ if (S_ISDIR(inode->i_mode)) > -+ err = __open_dir(inode, file); /* open a dir */ > -+ else > -+ err = __open_file(inode, file, parent); /* open a file */ > -+ > -+ /* freeing the allocated resources, and fput the opened files */ > -+ if (err) { > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_file = unionfs_lower_file_idx(file, bindex); > -+ if (!lower_file) > -+ continue; > -+ > -+ branchput(dentry->d_sb, bindex); > -+ /* fput calls dput for lower_dentry */ > -+ fput(lower_file); > -+ } > -+ } > -+ > -+out: > -+ if (err) { > -+ kfree(UNIONFS_F(file)->lower_files); > -+ kfree(UNIONFS_F(file)->saved_branch_ids); > -+ kfree(UNIONFS_F(file)); > -+ } > -+out_nofree: > -+ if (!err) { > -+ unionfs_postcopyup_setmnt(dentry); > -+ unionfs_copy_attr_times(inode); > -+ unionfs_check_file(file); > -+ unionfs_check_inode(inode); > -+ } > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(inode->i_sb); > -+ return err; > -+} > -+ > -+/* > -+ * release all lower object references & free the file info structure > -+ * > -+ * No need to grab sb info's rwsem. > -+ */ > -+int unionfs_file_release(struct inode *inode, struct file *file) > -+{ > -+ struct file *lower_file = NULL; > -+ struct unionfs_file_info *fileinfo; > -+ struct unionfs_inode_info *inodeinfo; > -+ struct super_block *sb = inode->i_sb; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ int bindex, bstart, bend; > -+ int err = 0; > -+ > -+ /* > -+ * Since mm/memory.c:might_fault() (under PROVE_LOCKING) was > -+ * modified in 2.6.29-rc1 to call might_lock_read on mmap_sem, this > -+ * has been causing false positives in file system stacking layers. > -+ * In particular, our ->mmap is called after sys_mmap2 already holds > -+ * mmap_sem, then we lock our own mutexes; but earlier, it's > -+ * possible for lockdep to have locked our mutexes first, and then > -+ * we call a lower ->readdir which could call might_fault. The > -+ * different ordering of the locks is what lockdep complains about > -+ * -- unnecessarily. Therefore, we have no choice but to tell > -+ * lockdep to temporarily turn off lockdep here. Note: the comments > -+ * inside might_sleep also suggest that it would have been > -+ * nicer to only annotate paths that needs that might_lock_read. > -+ */ > -+ lockdep_off(); > -+ unionfs_read_lock(sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ /* > -+ * We try to revalidate, but the VFS ignores return return values > -+ * from file->release, so we must always try to succeed here, > -+ * including to do the kfree and dput below. So if revalidation > -+ * failed, all we can do is print some message and keep going. > -+ */ > -+ err = unionfs_file_revalidate(file, parent, > -+ UNIONFS_F(file)->wrote_to_file); > -+ if (!err) > -+ unionfs_check_file(file); > -+ fileinfo = UNIONFS_F(file); > -+ BUG_ON(file->f_path.dentry->d_inode != inode); > -+ inodeinfo = UNIONFS_I(inode); > -+ > -+ /* fput all the lower files */ > -+ bstart = fbstart(file); > -+ bend = fbend(file); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_file = unionfs_lower_file_idx(file, bindex); > -+ > -+ if (lower_file) { > -+ unionfs_set_lower_file_idx(file, bindex, NULL); > -+ fput(lower_file); > -+ branchput(sb, bindex); > -+ } > -+ > -+ /* if there are no more refs to the dentry, dput it */ > -+ if (d_deleted(dentry)) { > -+ dput(unionfs_lower_dentry_idx(dentry, bindex)); > -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); > -+ } > -+ } > -+ > -+ kfree(fileinfo->lower_files); > -+ kfree(fileinfo->saved_branch_ids); > -+ > -+ if (fileinfo->rdstate) { > -+ fileinfo->rdstate->access = jiffies; > -+ spin_lock(&inodeinfo->rdlock); > -+ inodeinfo->rdcount++; > -+ list_add_tail(&fileinfo->rdstate->cache, > -+ &inodeinfo->readdircache); > -+ mark_inode_dirty(inode); > -+ spin_unlock(&inodeinfo->rdlock); > -+ fileinfo->rdstate = NULL; > -+ } > -+ kfree(fileinfo); > -+ > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(sb); > -+ lockdep_on(); > -+ return err; > -+} > -+ > -+/* pass the ioctl to the lower fs */ > -+static long do_ioctl(struct file *file, unsigned int cmd, unsigned long arg) > -+{ > -+ struct file *lower_file; > -+ int err; > -+ > -+ lower_file = unionfs_lower_file(file); > -+ > -+ err = -ENOTTY; > -+ if (!lower_file || !lower_file->f_op) > -+ goto out; > -+ if (lower_file->f_op->unlocked_ioctl) { > -+ err = lower_file->f_op->unlocked_ioctl(lower_file, cmd, arg); > -+#ifdef CONFIG_COMPAT > -+ } else if (lower_file->f_op->ioctl) { > -+ err = lower_file->f_op->compat_ioctl( > -+ lower_file->f_path.dentry->d_inode, > -+ lower_file, cmd, arg); > -+#endif > -+ } > -+ > -+out: > -+ return err; > -+} > -+ > -+/* > -+ * return to user-space the branch indices containing the file in question > -+ * > -+ * We use fd_set and therefore we are limited to the number of the branches > -+ * to FD_SETSIZE, which is currently 1024 - plenty for most people > -+ */ > -+static int unionfs_ioctl_queryfile(struct file *file, struct dentry *parent, > -+ unsigned int cmd, unsigned long arg) > -+{ > -+ int err = 0; > -+ fd_set branchlist; > -+ int bstart = 0, bend = 0, bindex = 0; > -+ int orig_bstart, orig_bend; > -+ struct dentry *dentry, *lower_dentry; > -+ struct vfsmount *mnt; > -+ > -+ dentry = file->f_path.dentry; > -+ orig_bstart = dbstart(dentry); > -+ orig_bend = dbend(dentry); > -+ err = unionfs_partial_lookup(dentry, parent); > -+ if (err) > -+ goto out; > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ > -+ FD_ZERO(&branchlist); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) > -+ continue; > -+ if (likely(lower_dentry->d_inode)) > -+ FD_SET(bindex, &branchlist); > -+ /* purge any lower objects after partial_lookup */ > -+ if (bindex < orig_bstart || bindex > orig_bend) { > -+ dput(lower_dentry); > -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); > -+ iput(unionfs_lower_inode_idx(dentry->d_inode, > bindex)); > -+ unionfs_set_lower_inode_idx(dentry->d_inode, > bindex, > -+ NULL); > -+ mnt = unionfs_lower_mnt_idx(dentry, bindex); > -+ if (!mnt) > -+ continue; > -+ unionfs_mntput(dentry, bindex); > -+ unionfs_set_lower_mnt_idx(dentry, bindex, NULL); > -+ } > -+ } > -+ /* restore original dentry's offsets */ > -+ dbstart(dentry) = orig_bstart; > -+ dbend(dentry) = orig_bend; > -+ ibstart(dentry->d_inode) = orig_bstart; > -+ ibend(dentry->d_inode) = orig_bend; > -+ > -+ err = copy_to_user((void __user *)arg, &branchlist, sizeof(fd_set)); > -+ if (unlikely(err)) > -+ err = -EFAULT; > -+ > -+out: > -+ return err < 0 ? err : bend; > -+} > -+ > -+long unionfs_ioctl(struct file *file, unsigned int cmd, unsigned long arg) > -+{ > -+ long err; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, true); > -+ if (unlikely(err)) > -+ goto out; > -+ > -+ /* check if asked for local commands */ > -+ switch (cmd) { > -+ case UNIONFS_IOCTL_INCGEN: > -+ /* Increment the superblock generation count */ > -+ pr_info("unionfs: incgen ioctl deprecated; " > -+ "use \"-o remount,incgen\"\n"); > -+ err = -ENOSYS; > -+ break; > -+ > -+ case UNIONFS_IOCTL_QUERYFILE: > -+ /* Return list of branches containing the given file */ > -+ err = unionfs_ioctl_queryfile(file, parent, cmd, arg); > -+ break; > -+ > -+ default: > -+ /* pass the ioctl down */ > -+ err = do_ioctl(file, cmd, arg); > -+ break; > -+ } > -+ > -+out: > -+ unionfs_check_file(file); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+int unionfs_flush(struct file *file, fl_owner_t id) > -+{ > -+ int err = 0; > -+ struct file *lower_file = NULL; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ int bindex, bstart, bend; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, > -+ UNIONFS_F(file)->wrote_to_file); > -+ if (unlikely(err)) > -+ goto out; > -+ unionfs_check_file(file); > -+ > -+ bstart = fbstart(file); > -+ bend = fbend(file); > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_file = unionfs_lower_file_idx(file, bindex); > -+ > -+ if (lower_file && lower_file->f_op && > -+ lower_file->f_op->flush) { > -+ err = lower_file->f_op->flush(lower_file, id); > -+ if (err) > -+ goto out; > -+ } > -+ > -+ } > -+ > -+out: > -+ if (!err) > -+ unionfs_check_file(file); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -diff --git a/fs/unionfs/copyup.c b/fs/unionfs/copyup.c > -new file mode 100644 > -index 0000000..37c2654 > ---- /dev/null > -+++ b/fs/unionfs/copyup.c > -@@ -0,0 +1,896 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * For detailed explanation of copyup see: > -+ * Documentation/filesystems/unionfs/concepts.txt > -+ */ > -+ > -+#ifdef CONFIG_UNION_FS_XATTR > -+/* copyup all extended attrs for a given dentry */ > -+static int copyup_xattrs(struct dentry *old_lower_dentry, > -+ struct dentry *new_lower_dentry) > -+{ > -+ int err = 0; > -+ ssize_t list_size = -1; > -+ char *name_list = NULL; > -+ char *attr_value = NULL; > -+ char *name_list_buf = NULL; > -+ > -+ /* query the actual size of the xattr list */ > -+ list_size = vfs_listxattr(old_lower_dentry, NULL, 0); > -+ if (list_size <= 0) { > -+ err = list_size; > -+ goto out; > -+ } > -+ > -+ /* allocate space for the actual list */ > -+ name_list = unionfs_xattr_alloc(list_size + 1, XATTR_LIST_MAX); > -+ if (unlikely(!name_list || IS_ERR(name_list))) { > -+ err = PTR_ERR(name_list); > -+ goto out; > -+ } > -+ > -+ name_list_buf = name_list; /* save for kfree at end */ > -+ > -+ /* now get the actual xattr list of the source file */ > -+ list_size = vfs_listxattr(old_lower_dentry, name_list, list_size); > -+ if (list_size <= 0) { > -+ err = list_size; > -+ goto out; > -+ } > -+ > -+ /* allocate space to hold each xattr's value */ > -+ attr_value = unionfs_xattr_alloc(XATTR_SIZE_MAX, XATTR_SIZE_MAX); > -+ if (unlikely(!attr_value || IS_ERR(attr_value))) { > -+ err = PTR_ERR(name_list); > -+ goto out; > -+ } > -+ > -+ /* in a loop, get and set each xattr from src to dst file */ > -+ while (*name_list) { > -+ ssize_t size; > -+ > -+ /* Lock here since vfs_getxattr doesn't lock for us */ > -+ mutex_lock(&old_lower_dentry->d_inode->i_mutex); > -+ size = vfs_getxattr(old_lower_dentry, name_list, > -+ attr_value, XATTR_SIZE_MAX); > -+ mutex_unlock(&old_lower_dentry->d_inode->i_mutex); > -+ if (size < 0) { > -+ err = size; > -+ goto out; > -+ } > -+ if (size > XATTR_SIZE_MAX) { > -+ err = -E2BIG; > -+ goto out; > -+ } > -+ /* Don't lock here since vfs_setxattr does it for us. */ > -+ err = vfs_setxattr(new_lower_dentry, name_list, attr_value, > -+ size, 0); > -+ /* > -+ * Selinux depends on "security.*" xattrs, so to maintain > -+ * the security of copied-up files, if Selinux is active, > -+ * then we must copy these xattrs as well. So we need to > -+ * temporarily get FOWNER privileges. > -+ * XXX: move entire copyup code to SIOQ. > -+ */ > -+ if (err == -EPERM && !capable(CAP_FOWNER)) { > -+ const struct cred *old_creds; > -+ struct cred *new_creds; > -+ > -+ new_creds = prepare_creds(); > -+ if (unlikely(!new_creds)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ cap_raise(new_creds->cap_effective, CAP_FOWNER); > -+ old_creds = override_creds(new_creds); > -+ err = vfs_setxattr(new_lower_dentry, name_list, > -+ attr_value, size, 0); > -+ revert_creds(old_creds); > -+ } > -+ if (err < 0) > -+ goto out; > -+ name_list += strlen(name_list) + 1; > -+ } > -+out: > -+ unionfs_xattr_kfree(name_list_buf); > -+ unionfs_xattr_kfree(attr_value); > -+ /* Ignore if xattr isn't supported */ > -+ if (err == -ENOTSUPP || err == -EOPNOTSUPP) > -+ err = 0; > -+ return err; > -+} > -+#endif /* CONFIG_UNION_FS_XATTR */ > -+ > -+/* > -+ * Determine the mode based on the copyup flags, and the existing dentry. > -+ * > -+ * Handle file systems which may not support certain options. For example > -+ * jffs2 doesn't allow one to chmod a symlink. So we ignore such harmless > -+ * errors, rather than propagating them up, which results in copyup errors > -+ * and errors returned back to users. > -+ */ > -+static int copyup_permissions(struct super_block *sb, > -+ struct dentry *old_lower_dentry, > -+ struct dentry *new_lower_dentry) > -+{ > -+ struct inode *i = old_lower_dentry->d_inode; > -+ struct iattr newattrs; > -+ int err; > -+ > -+ newattrs.ia_atime = i->i_atime; > -+ newattrs.ia_mtime = i->i_mtime; > -+ newattrs.ia_ctime = i->i_ctime; > -+ newattrs.ia_gid = i->i_gid; > -+ newattrs.ia_uid = i->i_uid; > -+ newattrs.ia_valid = ATTR_CTIME | ATTR_ATIME | ATTR_MTIME | > -+ ATTR_ATIME_SET | ATTR_MTIME_SET | ATTR_FORCE | > -+ ATTR_GID | ATTR_UID; > -+ mutex_lock(&new_lower_dentry->d_inode->i_mutex); > -+ err = notify_change(new_lower_dentry, &newattrs); > -+ if (err) > -+ goto out; > -+ > -+ /* now try to change the mode and ignore EOPNOTSUPP on symlinks */ > -+ newattrs.ia_mode = i->i_mode; > -+ newattrs.ia_valid = ATTR_MODE | ATTR_FORCE; > -+ err = notify_change(new_lower_dentry, &newattrs); > -+ if (err == -EOPNOTSUPP && > -+ S_ISLNK(new_lower_dentry->d_inode->i_mode)) { > -+ printk(KERN_WARNING > -+ "unionfs: changing \"%s\" symlink mode unsupported\n", > -+ new_lower_dentry->d_name.name); > -+ err = 0; > -+ } > -+ > -+out: > -+ mutex_unlock(&new_lower_dentry->d_inode->i_mutex); > -+ return err; > -+} > -+ > -+/* > -+ * create the new device/file/directory - use copyup_permission to copyup > -+ * times, and mode > -+ * > -+ * if the object being copied up is a regular file, the file is only created, > -+ * the contents have to be copied up separately > -+ */ > -+static int __copyup_ndentry(struct dentry *old_lower_dentry, > -+ struct dentry *new_lower_dentry, > -+ struct dentry *new_lower_parent_dentry, > -+ char *symbuf) > -+{ > -+ int err = 0; > -+ umode_t old_mode = old_lower_dentry->d_inode->i_mode; > -+ struct sioq_args args; > -+ > -+ if (S_ISDIR(old_mode)) { > -+ args.mkdir.parent = new_lower_parent_dentry->d_inode; > -+ args.mkdir.dentry = new_lower_dentry; > -+ args.mkdir.mode = old_mode; > -+ > -+ run_sioq(__unionfs_mkdir, &args); > -+ err = args.err; > -+ } else if (S_ISLNK(old_mode)) { > -+ args.symlink.parent = new_lower_parent_dentry->d_inode; > -+ args.symlink.dentry = new_lower_dentry; > -+ args.symlink.symbuf = symbuf; > -+ > -+ run_sioq(__unionfs_symlink, &args); > -+ err = args.err; > -+ } else if (S_ISBLK(old_mode) || S_ISCHR(old_mode) || > -+ S_ISFIFO(old_mode) || S_ISSOCK(old_mode)) { > -+ args.mknod.parent = new_lower_parent_dentry->d_inode; > -+ args.mknod.dentry = new_lower_dentry; > -+ args.mknod.mode = old_mode; > -+ args.mknod.dev = old_lower_dentry->d_inode->i_rdev; > -+ > -+ run_sioq(__unionfs_mknod, &args); > -+ err = args.err; > -+ } else if (S_ISREG(old_mode)) { > -+ struct nameidata nd; > -+ err = init_lower_nd(&nd, LOOKUP_CREATE); > -+ if (unlikely(err < 0)) > -+ goto out; > -+ args.create.nd = &nd; > -+ args.create.parent = new_lower_parent_dentry->d_inode; > -+ args.create.dentry = new_lower_dentry; > -+ args.create.mode = old_mode; > -+ > -+ run_sioq(__unionfs_create, &args); > -+ err = args.err; > -+ release_lower_nd(&nd, err); > -+ } else { > -+ printk(KERN_CRIT "unionfs: unknown inode type %d\n", > -+ old_mode); > -+ BUG(); > -+ } > -+ > -+out: > -+ return err; > -+} > -+ > -+static int __copyup_reg_data(struct dentry *dentry, > -+ struct dentry *new_lower_dentry, int new_bindex, > -+ struct dentry *old_lower_dentry, int old_bindex, > -+ struct file **copyup_file, loff_t len) > -+{ > -+ struct super_block *sb = dentry->d_sb; > -+ struct file *input_file; > -+ struct file *output_file; > -+ struct vfsmount *output_mnt; > -+ mm_segment_t old_fs; > -+ char *buf = NULL; > -+ ssize_t read_bytes, write_bytes; > -+ loff_t size; > -+ int err = 0; > -+ > -+ /* open old file */ > -+ unionfs_mntget(dentry, old_bindex); > -+ branchget(sb, old_bindex); > -+ /* dentry_open calls dput and mntput if it returns an error */ > -+ input_file = dentry_open(old_lower_dentry, > -+ unionfs_lower_mnt_idx(dentry, old_bindex), > -+ O_RDONLY | O_LARGEFILE, current_cred()); > -+ if (IS_ERR(input_file)) { > -+ dput(old_lower_dentry); > -+ err = PTR_ERR(input_file); > -+ goto out; > -+ } > -+ if (unlikely(!input_file->f_op || !input_file->f_op->read)) { > -+ err = -EINVAL; > -+ goto out_close_in; > -+ } > -+ > -+ /* open new file */ > -+ dget(new_lower_dentry); > -+ output_mnt = unionfs_mntget(sb->s_root, new_bindex); > -+ branchget(sb, new_bindex); > -+ output_file = dentry_open(new_lower_dentry, output_mnt, > -+ O_RDWR | O_LARGEFILE, current_cred()); > -+ if (IS_ERR(output_file)) { > -+ err = PTR_ERR(output_file); > -+ goto out_close_in2; > -+ } > -+ if (unlikely(!output_file->f_op || !output_file->f_op->write)) { > -+ err = -EINVAL; > -+ goto out_close_out; > -+ } > -+ > -+ /* allocating a buffer */ > -+ buf = kmalloc(PAGE_SIZE, GFP_KERNEL); > -+ if (unlikely(!buf)) { > -+ err = -ENOMEM; > -+ goto out_close_out; > -+ } > -+ > -+ input_file->f_pos = 0; > -+ output_file->f_pos = 0; > -+ > -+ old_fs = get_fs(); > -+ set_fs(KERNEL_DS); > -+ > -+ size = len; > -+ err = 0; > -+ do { > -+ if (len >= PAGE_SIZE) > -+ size = PAGE_SIZE; > -+ else if ((len < PAGE_SIZE) && (len > 0)) > -+ size = len; > -+ > -+ len -= PAGE_SIZE; > -+ > -+ read_bytes = > -+ input_file->f_op->read(input_file, > -+ (char __user *)buf, size, > -+ &input_file->f_pos); > -+ if (read_bytes <= 0) { > -+ err = read_bytes; > -+ break; > -+ } > -+ > -+ /* see Documentation/filesystems/unionfs/issues.txt */ > -+ lockdep_off(); > -+ write_bytes = > -+ output_file->f_op->write(output_file, > -+ (char __user *)buf, > -+ read_bytes, > -+ &output_file->f_pos); > -+ lockdep_on(); > -+ if ((write_bytes < 0) || (write_bytes < read_bytes)) { > -+ err = write_bytes; > -+ break; > -+ } > -+ } while ((read_bytes > 0) && (len > 0)); > -+ > -+ set_fs(old_fs); > -+ > -+ kfree(buf); > -+ > -+ if (!err) > -+ err = output_file->f_op->fsync(output_file, 0); > -+ > -+ if (err) > -+ goto out_close_out; > -+ > -+ if (copyup_file) { > -+ *copyup_file = output_file; > -+ goto out_close_in; > -+ } > -+ > -+out_close_out: > -+ fput(output_file); > -+ > -+out_close_in2: > -+ branchput(sb, new_bindex); > -+ > -+out_close_in: > -+ fput(input_file); > -+ > -+out: > -+ branchput(sb, old_bindex); > -+ > -+ return err; > -+} > -+ > -+/* > -+ * dput the lower references for old and new dentry & clear a lower dentry > -+ * pointer > -+ */ > -+static void __clear(struct dentry *dentry, struct dentry *old_lower_dentry, > -+ int old_bstart, int old_bend, > -+ struct dentry *new_lower_dentry, int new_bindex) > -+{ > -+ /* get rid of the lower dentry and all its traces */ > -+ unionfs_set_lower_dentry_idx(dentry, new_bindex, NULL); > -+ dbstart(dentry) = old_bstart; > -+ dbend(dentry) = old_bend; > -+ > -+ dput(new_lower_dentry); > -+ dput(old_lower_dentry); > -+} > -+ > -+/* > -+ * Copy up a dentry to a file of specified name. > -+ * > -+ * @dir: used to pull the ->i_sb to access other branches > -+ * @dentry: the non-negative dentry whose lower_inode we should copy > -+ * @bstart: the branch of the lower_inode to copy from > -+ * @new_bindex: the branch to create the new file in > -+ * @name: the name of the file to create > -+ * @namelen: length of @name > -+ * @copyup_file: the "struct file" to return (optional) > -+ * @len: how many bytes to copy-up? > -+ */ > -+int copyup_dentry(struct inode *dir, struct dentry *dentry, int bstart, > -+ int new_bindex, const char *name, int namelen, > -+ struct file **copyup_file, loff_t len) > -+{ > -+ struct dentry *new_lower_dentry; > -+ struct dentry *old_lower_dentry = NULL; > -+ struct super_block *sb; > -+ int err = 0; > -+ int old_bindex; > -+ int old_bstart; > -+ int old_bend; > -+ struct dentry *new_lower_parent_dentry = NULL; > -+ mm_segment_t oldfs; > -+ char *symbuf = NULL; > -+ > -+ verify_locked(dentry); > -+ > -+ old_bindex = bstart; > -+ old_bstart = dbstart(dentry); > -+ old_bend = dbend(dentry); > -+ > -+ BUG_ON(new_bindex < 0); > -+ BUG_ON(new_bindex >= old_bindex); > -+ > -+ sb = dir->i_sb; > -+ > -+ err = is_robranch_super(sb, new_bindex); > -+ if (err) > -+ goto out; > -+ > -+ /* Create the directory structure above this dentry. */ > -+ new_lower_dentry = create_parents(dir, dentry, name, new_bindex); > -+ if (IS_ERR(new_lower_dentry)) { > -+ err = PTR_ERR(new_lower_dentry); > -+ goto out; > -+ } > -+ > -+ old_lower_dentry = unionfs_lower_dentry_idx(dentry, old_bindex); > -+ /* we conditionally dput this old_lower_dentry at end of function */ > -+ dget(old_lower_dentry); > -+ > -+ /* For symlinks, we must read the link before we lock the directory. */ > -+ if (S_ISLNK(old_lower_dentry->d_inode->i_mode)) { > -+ > -+ symbuf = kmalloc(PATH_MAX, GFP_KERNEL); > -+ if (unlikely(!symbuf)) { > -+ __clear(dentry, old_lower_dentry, > -+ old_bstart, old_bend, > -+ new_lower_dentry, new_bindex); > -+ err = -ENOMEM; > -+ goto out_free; > -+ } > -+ > -+ oldfs = get_fs(); > -+ set_fs(KERNEL_DS); > -+ err = old_lower_dentry->d_inode->i_op->readlink( > -+ old_lower_dentry, > -+ (char __user *)symbuf, > -+ PATH_MAX); > -+ set_fs(oldfs); > -+ if (err < 0) { > -+ __clear(dentry, old_lower_dentry, > -+ old_bstart, old_bend, > -+ new_lower_dentry, new_bindex); > -+ goto out_free; > -+ } > -+ symbuf[err] = '\0'; > -+ } > -+ > -+ /* Now we lock the parent, and create the object in the new branch. */ > -+ new_lower_parent_dentry = lock_parent(new_lower_dentry); > -+ > -+ /* create the new inode */ > -+ err = __copyup_ndentry(old_lower_dentry, new_lower_dentry, > -+ new_lower_parent_dentry, symbuf); > -+ > -+ if (err) { > -+ __clear(dentry, old_lower_dentry, > -+ old_bstart, old_bend, > -+ new_lower_dentry, new_bindex); > -+ goto out_unlock; > -+ } > -+ > -+ /* We actually copyup the file here. */ > -+ if (S_ISREG(old_lower_dentry->d_inode->i_mode)) > -+ err = __copyup_reg_data(dentry, new_lower_dentry, > new_bindex, > -+ old_lower_dentry, old_bindex, > -+ copyup_file, len); > -+ if (err) > -+ goto out_unlink; > -+ > -+ /* Set permissions. */ > -+ err = copyup_permissions(sb, old_lower_dentry, new_lower_dentry); > -+ if (err) > -+ goto out_unlink; > -+ > -+#ifdef CONFIG_UNION_FS_XATTR > -+ /* Selinux uses extended attributes for permissions. */ > -+ err = copyup_xattrs(old_lower_dentry, new_lower_dentry); > -+ if (err) > -+ goto out_unlink; > -+#endif /* CONFIG_UNION_FS_XATTR */ > -+ > -+ /* do not allow files getting deleted to be re-interposed */ > -+ if (!d_deleted(dentry)) > -+ unionfs_reinterpose(dentry); > -+ > -+ goto out_unlock; > -+ > -+out_unlink: > -+ /* > -+ * copyup failed, because we possibly ran out of space or > -+ * quota, or something else happened so let's unlink; we don't > -+ * really care about the return value of vfs_unlink > -+ */ > -+ vfs_unlink(new_lower_parent_dentry->d_inode, new_lower_dentry); > -+ > -+ if (copyup_file) { > -+ /* need to close the file */ > -+ > -+ fput(*copyup_file); > -+ branchput(sb, new_bindex); > -+ } > -+ > -+ /* > -+ * TODO: should we reset the error to something like -EIO? > -+ * > -+ * If we don't reset, the user may get some nonsensical errors, but > -+ * on the other hand, if we reset to EIO, we guarantee that the user > -+ * will get a "confusing" error message. > -+ */ > -+ > -+out_unlock: > -+ unlock_dir(new_lower_parent_dentry); > -+ > -+out_free: > -+ /* > -+ * If old_lower_dentry was not a file, then we need to dput it. If > -+ * it was a file, then it was already dput indirectly by other > -+ * functions we call above which operate on regular files. > -+ */ > -+ if (old_lower_dentry && old_lower_dentry->d_inode && > -+ !S_ISREG(old_lower_dentry->d_inode->i_mode)) > -+ dput(old_lower_dentry); > -+ kfree(symbuf); > -+ > -+ if (err) { > -+ /* > -+ * if directory creation succeeded, but inode copyup failed, > -+ * then purge new dentries. > -+ */ > -+ if (dbstart(dentry) < old_bstart && > -+ ibstart(dentry->d_inode) > dbstart(dentry)) > -+ __clear(dentry, NULL, old_bstart, old_bend, > -+ unionfs_lower_dentry(dentry), > dbstart(dentry)); > -+ goto out; > -+ } > -+ if (!S_ISDIR(dentry->d_inode->i_mode)) { > -+ unionfs_postcopyup_release(dentry); > -+ if (!unionfs_lower_inode(dentry->d_inode)) { > -+ /* > -+ * If we got here, then we copied up to an > -+ * unlinked-open file, whose name is .unionfsXXXXX. > -+ */ > -+ struct inode *inode = new_lower_dentry->d_inode; > -+ atomic_inc(&inode->i_count); > -+ unionfs_set_lower_inode_idx(dentry->d_inode, > -+ ibstart(dentry->d_inode), > -+ inode); > -+ } > -+ } > -+ unionfs_postcopyup_setmnt(dentry); > -+ /* sync inode times from copied-up inode to our inode */ > -+ unionfs_copy_attr_times(dentry->d_inode); > -+ unionfs_check_inode(dir); > -+ unionfs_check_dentry(dentry); > -+out: > -+ return err; > -+} > -+ > -+/* > -+ * This function creates a copy of a file represented by 'file' which > -+ * currently resides in branch 'bstart' to branch 'new_bindex.' The copy > -+ * will be named "name". > -+ */ > -+int copyup_named_file(struct inode *dir, struct file *file, char *name, > -+ int bstart, int new_bindex, loff_t len) > -+{ > -+ int err = 0; > -+ struct file *output_file = NULL; > -+ > -+ err = copyup_dentry(dir, file->f_path.dentry, bstart, new_bindex, > -+ name, strlen(name), &output_file, len); > -+ if (!err) { > -+ fbstart(file) = new_bindex; > -+ unionfs_set_lower_file_idx(file, new_bindex, output_file); > -+ } > -+ > -+ return err; > -+} > -+ > -+/* > -+ * This function creates a copy of a file represented by 'file' which > -+ * currently resides in branch 'bstart' to branch 'new_bindex'. > -+ */ > -+int copyup_file(struct inode *dir, struct file *file, int bstart, > -+ int new_bindex, loff_t len) > -+{ > -+ int err = 0; > -+ struct file *output_file = NULL; > -+ struct dentry *dentry = file->f_path.dentry; > -+ > -+ err = copyup_dentry(dir, dentry, bstart, new_bindex, > -+ dentry->d_name.name, dentry->d_name.len, > -+ &output_file, len); > -+ if (!err) { > -+ fbstart(file) = new_bindex; > -+ unionfs_set_lower_file_idx(file, new_bindex, output_file); > -+ } > -+ > -+ return err; > -+} > -+ > -+/* purge a dentry's lower-branch states (dput/mntput, etc.) */ > -+static void __cleanup_dentry(struct dentry *dentry, int bindex, > -+ int old_bstart, int old_bend) > -+{ > -+ int loop_start; > -+ int loop_end; > -+ int new_bstart = -1; > -+ int new_bend = -1; > -+ int i; > -+ > -+ loop_start = min(old_bstart, bindex); > -+ loop_end = max(old_bend, bindex); > -+ > -+ /* > -+ * This loop sets the bstart and bend for the new dentry by > -+ * traversing from left to right. It also dputs all negative > -+ * dentries except bindex > -+ */ > -+ for (i = loop_start; i <= loop_end; i++) { > -+ if (!unionfs_lower_dentry_idx(dentry, i)) > -+ continue; > -+ > -+ if (i == bindex) { > -+ new_bend = i; > -+ if (new_bstart < 0) > -+ new_bstart = i; > -+ continue; > -+ } > -+ > -+ if (!unionfs_lower_dentry_idx(dentry, i)->d_inode) { > -+ dput(unionfs_lower_dentry_idx(dentry, i)); > -+ unionfs_set_lower_dentry_idx(dentry, i, NULL); > -+ > -+ unionfs_mntput(dentry, i); > -+ unionfs_set_lower_mnt_idx(dentry, i, NULL); > -+ } else { > -+ if (new_bstart < 0) > -+ new_bstart = i; > -+ new_bend = i; > -+ } > -+ } > -+ > -+ if (new_bstart < 0) > -+ new_bstart = bindex; > -+ if (new_bend < 0) > -+ new_bend = bindex; > -+ dbstart(dentry) = new_bstart; > -+ dbend(dentry) = new_bend; > -+ > -+} > -+ > -+/* set lower inode ptr and update bstart & bend if necessary */ > -+static void __set_inode(struct dentry *upper, struct dentry *lower, > -+ int bindex) > -+{ > -+ unionfs_set_lower_inode_idx(upper->d_inode, bindex, > -+ igrab(lower->d_inode)); > -+ if (likely(ibstart(upper->d_inode) > bindex)) > -+ ibstart(upper->d_inode) = bindex; > -+ if (likely(ibend(upper->d_inode) < bindex)) > -+ ibend(upper->d_inode) = bindex; > -+ > -+} > -+ > -+/* set lower dentry ptr and update bstart & bend if necessary */ > -+static void __set_dentry(struct dentry *upper, struct dentry *lower, > -+ int bindex) > -+{ > -+ unionfs_set_lower_dentry_idx(upper, bindex, lower); > -+ if (likely(dbstart(upper) > bindex)) > -+ dbstart(upper) = bindex; > -+ if (likely(dbend(upper) < bindex)) > -+ dbend(upper) = bindex; > -+} > -+ > -+/* > -+ * This function replicates the directory structure up-to given dentry > -+ * in the bindex branch. > -+ */ > -+struct dentry *create_parents(struct inode *dir, struct dentry *dentry, > -+ const char *name, int bindex) > -+{ > -+ int err; > -+ struct dentry *child_dentry; > -+ struct dentry *parent_dentry; > -+ struct dentry *lower_parent_dentry = NULL; > -+ struct dentry *lower_dentry = NULL; > -+ const char *childname; > -+ unsigned int childnamelen; > -+ int nr_dentry; > -+ int count = 0; > -+ int old_bstart; > -+ int old_bend; > -+ struct dentry **path = NULL; > -+ struct super_block *sb; > -+ > -+ verify_locked(dentry); > -+ > -+ err = is_robranch_super(dir->i_sb, bindex); > -+ if (err) { > -+ lower_dentry = ERR_PTR(err); > -+ goto out; > -+ } > -+ > -+ old_bstart = dbstart(dentry); > -+ old_bend = dbend(dentry); > -+ > -+ lower_dentry = ERR_PTR(-ENOMEM); > -+ > -+ /* There is no sense allocating any less than the minimum. */ > -+ nr_dentry = 1; > -+ path = kmalloc(nr_dentry * sizeof(struct dentry *), GFP_KERNEL); > -+ if (unlikely(!path)) > -+ goto out; > -+ > -+ /* assume the negative dentry of unionfs as the parent dentry */ > -+ parent_dentry = dentry; > -+ > -+ /* > -+ * This loop finds the first parent that exists in the given branch. > -+ * We start building the directory structure from there. At the end > -+ * of the loop, the following should hold: > -+ * - child_dentry is the first nonexistent child > -+ * - parent_dentry is the first existent parent > -+ * - path[0] is the = deepest child > -+ * - path[count] is the first child to create > -+ */ > -+ do { > -+ child_dentry = parent_dentry; > -+ > -+ /* find the parent directory dentry in unionfs */ > -+ parent_dentry = dget_parent(child_dentry); > -+ > -+ /* find out the lower_parent_dentry in the given branch */ > -+ lower_parent_dentry = > -+ unionfs_lower_dentry_idx(parent_dentry, bindex); > -+ > -+ /* grow path table */ > -+ if (count == nr_dentry) { > -+ void *p; > -+ > -+ nr_dentry *= 2; > -+ p = krealloc(path, nr_dentry * sizeof(struct dentry *), > -+ GFP_KERNEL); > -+ if (unlikely(!p)) { > -+ lower_dentry = ERR_PTR(-ENOMEM); > -+ goto out; > -+ } > -+ path = p; > -+ } > -+ > -+ /* store the child dentry */ > -+ path[count++] = child_dentry; > -+ } while (!lower_parent_dentry); > -+ count--; > -+ > -+ sb = dentry->d_sb; > -+ > -+ /* > -+ * This code goes between the begin/end labels and basically > -+ * emulates a while(child_dentry != dentry), only cleaner and > -+ * shorter than what would be a much longer while loop. > -+ */ > -+begin: > -+ /* get lower parent dir in the current branch */ > -+ lower_parent_dentry = unionfs_lower_dentry_idx(parent_dentry, > bindex); > -+ dput(parent_dentry); > -+ > -+ /* init the values to lookup */ > -+ childname = child_dentry->d_name.name; > -+ childnamelen = child_dentry->d_name.len; > -+ > -+ if (child_dentry != dentry) { > -+ /* lookup child in the underlying file system */ > -+ lower_dentry = lookup_lck_len(childname, > lower_parent_dentry, > -+ childnamelen); > -+ if (IS_ERR(lower_dentry)) > -+ goto out; > -+ } else { > -+ /* > -+ * Is the name a whiteout of the child name ? lookup the > -+ * whiteout child in the underlying file system > -+ */ > -+ lower_dentry = lookup_lck_len(name, lower_parent_dentry, > -+ strlen(name)); > -+ if (IS_ERR(lower_dentry)) > -+ goto out; > -+ > -+ /* Replace the current dentry (if any) with the new one */ > -+ dput(unionfs_lower_dentry_idx(dentry, bindex)); > -+ unionfs_set_lower_dentry_idx(dentry, bindex, > -+ lower_dentry); > -+ > -+ __cleanup_dentry(dentry, bindex, old_bstart, old_bend); > -+ goto out; > -+ } > -+ > -+ if (lower_dentry->d_inode) { > -+ /* > -+ * since this already exists we dput to avoid > -+ * multiple references on the same dentry > -+ */ > -+ dput(lower_dentry); > -+ } else { > -+ struct sioq_args args; > -+ > -+ /* it's a negative dentry, create a new dir */ > -+ lower_parent_dentry = lock_parent(lower_dentry); > -+ > -+ args.mkdir.parent = lower_parent_dentry->d_inode; > -+ args.mkdir.dentry = lower_dentry; > -+ args.mkdir.mode = child_dentry->d_inode->i_mode; > -+ > -+ run_sioq(__unionfs_mkdir, &args); > -+ err = args.err; > -+ > -+ if (!err) > -+ err = copyup_permissions(dir->i_sb, child_dentry, > -+ lower_dentry); > -+ unlock_dir(lower_parent_dentry); > -+ if (err) { > -+ dput(lower_dentry); > -+ lower_dentry = ERR_PTR(err); > -+ goto out; > -+ } > -+ > -+ } > -+ > -+ __set_inode(child_dentry, lower_dentry, bindex); > -+ __set_dentry(child_dentry, lower_dentry, bindex); > -+ /* > -+ * update times of this dentry, but also the parent, because if > -+ * we changed, the parent may have changed too. > -+ */ > -+ fsstack_copy_attr_times(parent_dentry->d_inode, > -+ lower_parent_dentry->d_inode); > -+ unionfs_copy_attr_times(child_dentry->d_inode); > -+ > -+ parent_dentry = child_dentry; > -+ child_dentry = path[--count]; > -+ goto begin; > -+out: > -+ /* cleanup any leftover locks from the do/while loop above */ > -+ if (IS_ERR(lower_dentry)) > -+ while (count) > -+ dput(path[count--]); > -+ kfree(path); > -+ return lower_dentry; > -+} > -+ > -+/* > -+ * Post-copyup helper to ensure we have valid mnts: set lower mnt of > -+ * dentry+parents to the first parent node that has an mnt. > -+ */ > -+void unionfs_postcopyup_setmnt(struct dentry *dentry) > -+{ > -+ struct dentry *parent, *hasone; > -+ int bindex = dbstart(dentry); > -+ > -+ if (unionfs_lower_mnt_idx(dentry, bindex)) > -+ return; > -+ hasone = dentry->d_parent; > -+ /* this loop should stop at root dentry */ > -+ while (!unionfs_lower_mnt_idx(hasone, bindex)) > -+ hasone = hasone->d_parent; > -+ parent = dentry; > -+ while (!unionfs_lower_mnt_idx(parent, bindex)) { > -+ unionfs_set_lower_mnt_idx(parent, bindex, > -+ unionfs_mntget(hasone, bindex)); > -+ parent = parent->d_parent; > -+ } > -+} > -+ > -+/* > -+ * Post-copyup helper to release all non-directory source objects of a > -+ * copied-up file. Regular files should have only one lower object. > -+ */ > -+void unionfs_postcopyup_release(struct dentry *dentry) > -+{ > -+ int bstart, bend; > -+ > -+ BUG_ON(S_ISDIR(dentry->d_inode->i_mode)); > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ > -+ path_put_lowers(dentry, bstart + 1, bend, false); > -+ iput_lowers(dentry->d_inode, bstart + 1, bend, false); > -+ > -+ dbend(dentry) = bstart; > -+ ibend(dentry->d_inode) = ibstart(dentry->d_inode) = bstart; > -+} > -diff --git a/fs/unionfs/debug.c b/fs/unionfs/debug.c > -new file mode 100644 > -index 0000000..6092e69 > ---- /dev/null > -+++ b/fs/unionfs/debug.c > -@@ -0,0 +1,548 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * Helper debugging functions for maintainers (and for users to report back > -+ * useful information back to maintainers) > -+ */ > -+ > -+/* it's always useful to know what part of the code called us */ > -+#define PRINT_CALLER(fname, fxn, line) > \ > -+ do { \ > -+ if (!printed_caller) { \ > -+ pr_debug("PC:%s:%s:%d\n", (fname), (fxn), (line)); \ > -+ printed_caller = 1; \ > -+ } \ > -+ } while (0) > -+ > -+/* > -+ * __unionfs_check_{inode,dentry,file} perform exhaustive sanity checking on > -+ * the fan-out of various Unionfs objects. We check that no lower objects > -+ * exist outside the start/end branch range; that all objects within are > -+ * non-NULL (with some allowed exceptions); that for every lower file > -+ * there's a lower dentry+inode; that the start/end ranges match for all > -+ * corresponding lower objects; that open files/symlinks have only one lower > -+ * objects, but directories can have several; and more. > -+ */ > -+void __unionfs_check_inode(const struct inode *inode, > -+ const char *fname, const char *fxn, int line) > -+{ > -+ int bindex; > -+ int istart, iend; > -+ struct inode *lower_inode; > -+ struct super_block *sb; > -+ int printed_caller = 0; > -+ void *poison_ptr; > -+ > -+ /* for inodes now */ > -+ BUG_ON(!inode); > -+ sb = inode->i_sb; > -+ istart = ibstart(inode); > -+ iend = ibend(inode); > -+ /* don't check inode if no lower branches */ > -+ if (istart < 0 && iend < 0) > -+ return; > -+ if (unlikely(istart > iend)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Ci0: inode=%p istart/end=%d:%d\n", > -+ inode, istart, iend); > -+ } > -+ if (unlikely((istart == -1 && iend != -1) || > -+ (istart != -1 && iend == -1))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Ci1: inode=%p istart/end=%d:%d\n", > -+ inode, istart, iend); > -+ } > -+ if (!S_ISDIR(inode->i_mode)) { > -+ if (unlikely(iend != istart)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Ci2: inode=%p istart=%d iend=%d\n", > -+ inode, istart, iend); > -+ } > -+ } > -+ > -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { > -+ if (unlikely(!UNIONFS_I(inode))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Ci3: no inode_info %p\n", inode); > -+ return; > -+ } > -+ if (unlikely(!UNIONFS_I(inode)->lower_inodes)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Ci4: no lower_inodes %p\n", inode); > -+ return; > -+ } > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (lower_inode) { > -+ memset(&poison_ptr, POISON_INUSE, sizeof(void *)); > -+ if (unlikely(bindex < istart || bindex > iend)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Ci5: inode/linode=%p:%p > bindex=%d " > -+ "istart/end=%d:%d\n", inode, > -+ lower_inode, bindex, istart, iend); > -+ } else if (unlikely(lower_inode == poison_ptr)) { > -+ /* freed inode! */ > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Ci6: inode/linode=%p:%p > bindex=%d " > -+ "istart/end=%d:%d\n", inode, > -+ lower_inode, bindex, istart, iend); > -+ } > -+ continue; > -+ } > -+ /* if we get here, then lower_inode == NULL */ > -+ if (bindex < istart || bindex > iend) > -+ continue; > -+ /* > -+ * directories can have NULL lower inodes in b/t start/end, > -+ * but NOT if at the start/end range. > -+ */ > -+ if (unlikely(S_ISDIR(inode->i_mode) && > -+ bindex > istart && bindex < iend)) > -+ continue; > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Ci7: inode/linode=%p:%p " > -+ "bindex=%d istart/end=%d:%d\n", > -+ inode, lower_inode, bindex, istart, iend); > -+ } > -+} > -+ > -+void __unionfs_check_dentry(const struct dentry *dentry, > -+ const char *fname, const char *fxn, int line) > -+{ > -+ int bindex; > -+ int dstart, dend, istart, iend; > -+ struct dentry *lower_dentry; > -+ struct inode *inode, *lower_inode; > -+ struct super_block *sb; > -+ struct vfsmount *lower_mnt; > -+ int printed_caller = 0; > -+ void *poison_ptr; > -+ > -+ BUG_ON(!dentry); > -+ sb = dentry->d_sb; > -+ inode = dentry->d_inode; > -+ dstart = dbstart(dentry); > -+ dend = dbend(dentry); > -+ /* don't check dentry/mnt if no lower branches */ > -+ if (dstart < 0 && dend < 0) > -+ goto check_inode; > -+ BUG_ON(dstart > dend); > -+ > -+ if (unlikely((dstart == -1 && dend != -1) || > -+ (dstart != -1 && dend == -1))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CD0: dentry=%p dstart/end=%d:%d\n", > -+ dentry, dstart, dend); > -+ } > -+ /* > -+ * check for NULL dentries inside the start/end range, or > -+ * non-NULL dentries outside the start/end range. > -+ */ > -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (lower_dentry) { > -+ if (unlikely(bindex < dstart || bindex > dend)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CD1: dentry/lower=%p:%p(%p) " > -+ "bindex=%d dstart/end=%d:%d\n", > -+ dentry, lower_dentry, > -+ (lower_dentry ? lower_dentry- > >d_inode : > -+ (void *) -1L), > -+ bindex, dstart, dend); > -+ } > -+ } else { /* lower_dentry == NULL */ > -+ if (bindex < dstart || bindex > dend) > -+ continue; > -+ /* > -+ * Directories can have NULL lower inodes in b/t > -+ * start/end, but NOT if at the start/end range. > -+ * Ignore this rule, however, if this is a NULL > -+ * dentry or a deleted dentry. > -+ */ > -+ if (unlikely(!d_deleted((struct dentry *) dentry) && > -+ inode && > -+ !(inode && S_ISDIR(inode->i_mode) && > -+ bindex > dstart && bindex < dend))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CD2: dentry/lower=%p:%p(%p) " > -+ "bindex=%d dstart/end=%d:%d\n", > -+ dentry, lower_dentry, > -+ (lower_dentry ? > -+ lower_dentry->d_inode : > -+ (void *) -1L), > -+ bindex, dstart, dend); > -+ } > -+ } > -+ } > -+ > -+ /* check for vfsmounts same as for dentries */ > -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { > -+ lower_mnt = unionfs_lower_mnt_idx(dentry, bindex); > -+ if (lower_mnt) { > -+ if (unlikely(bindex < dstart || bindex > dend)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CM0: dentry/lmnt=%p:%p > bindex=%d " > -+ "dstart/end=%d:%d\n", dentry, > -+ lower_mnt, bindex, dstart, dend); > -+ } > -+ } else { /* lower_mnt == NULL */ > -+ if (bindex < dstart || bindex > dend) > -+ continue; > -+ /* > -+ * Directories can have NULL lower inodes in b/t > -+ * start/end, but NOT if at the start/end range. > -+ * Ignore this rule, however, if this is a NULL > -+ * dentry. > -+ */ > -+ if (unlikely(inode && > -+ !(inode && S_ISDIR(inode->i_mode) && > -+ bindex > dstart && bindex < dend))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CM1: dentry/lmnt=%p:%p " > -+ "bindex=%d dstart/end=%d:%d\n", > -+ dentry, lower_mnt, bindex, > -+ dstart, dend); > -+ } > -+ } > -+ } > -+ > -+check_inode: > -+ /* for inodes now */ > -+ if (!inode) > -+ return; > -+ istart = ibstart(inode); > -+ iend = ibend(inode); > -+ /* don't check inode if no lower branches */ > -+ if (istart < 0 && iend < 0) > -+ return; > -+ BUG_ON(istart > iend); > -+ if (unlikely((istart == -1 && iend != -1) || > -+ (istart != -1 && iend == -1))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CI0: dentry/inode=%p:%p istart/end=%d:%d\n", > -+ dentry, inode, istart, iend); > -+ } > -+ if (unlikely(istart != dstart)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CI1: dentry/inode=%p:%p istart=%d dstart=%d\n", > -+ dentry, inode, istart, dstart); > -+ } > -+ if (unlikely(iend != dend)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CI2: dentry/inode=%p:%p iend=%d dend=%d\n", > -+ dentry, inode, iend, dend); > -+ } > -+ > -+ if (!S_ISDIR(inode->i_mode)) { > -+ if (unlikely(dend != dstart)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CI3: dentry/inode=%p:%p dstart=%d > dend=%d\n", > -+ dentry, inode, dstart, dend); > -+ } > -+ if (unlikely(iend != istart)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CI4: dentry/inode=%p:%p istart=%d > iend=%d\n", > -+ dentry, inode, istart, iend); > -+ } > -+ } > -+ > -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (lower_inode) { > -+ memset(&poison_ptr, POISON_INUSE, sizeof(void *)); > -+ if (unlikely(bindex < istart || bindex > iend)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CI5: dentry/linode=%p:%p > bindex=%d " > -+ "istart/end=%d:%d\n", dentry, > -+ lower_inode, bindex, istart, iend); > -+ } else if (unlikely(lower_inode == poison_ptr)) { > -+ /* freed inode! */ > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CI6: dentry/linode=%p:%p > bindex=%d " > -+ "istart/end=%d:%d\n", dentry, > -+ lower_inode, bindex, istart, iend); > -+ } > -+ continue; > -+ } > -+ /* if we get here, then lower_inode == NULL */ > -+ if (bindex < istart || bindex > iend) > -+ continue; > -+ /* > -+ * directories can have NULL lower inodes in b/t start/end, > -+ * but NOT if at the start/end range. > -+ */ > -+ if (unlikely(S_ISDIR(inode->i_mode) && > -+ bindex > istart && bindex < iend)) > -+ continue; > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CI7: dentry/linode=%p:%p " > -+ "bindex=%d istart/end=%d:%d\n", > -+ dentry, lower_inode, bindex, istart, iend); > -+ } > -+ > -+ /* > -+ * If it's a directory, then intermediate objects b/t start/end can > -+ * be NULL. But, check that all three are NULL: lower dentry, mnt, > -+ * and inode. > -+ */ > -+ if (dstart >= 0 && dend >= 0 && S_ISDIR(inode->i_mode)) > -+ for (bindex = dstart+1; bindex < dend; bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, > bindex); > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, > -+ bindex); > -+ lower_mnt = unionfs_lower_mnt_idx(dentry, bindex); > -+ if (unlikely(!((lower_inode && lower_dentry && > -+ lower_mnt) || > -+ (!lower_inode && > -+ !lower_dentry && !lower_mnt)))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" Cx: > lmnt/ldentry/linode=%p:%p:%p " > -+ "bindex=%d dstart/end=%d:%d\n", > -+ lower_mnt, lower_dentry, > lower_inode, > -+ bindex, dstart, dend); > -+ } > -+ } > -+ /* check if lower inode is newer than upper one (it shouldn't) */ > -+ if (unlikely(is_newer_lower(dentry) && !is_negative_lower(dentry))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ for (bindex = ibstart(inode); bindex <= ibend(inode); > -+ bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, > bindex); > -+ if (unlikely(!lower_inode)) > -+ continue; > -+ pr_debug(" CI8: bindex=%d > mtime/lmtime=%lu.%lu/%lu.%lu " > -+ "ctime/lctime=%lu.%lu/%lu.%lu\n", > -+ bindex, > -+ inode->i_mtime.tv_sec, > -+ inode->i_mtime.tv_nsec, > -+ lower_inode->i_mtime.tv_sec, > -+ lower_inode->i_mtime.tv_nsec, > -+ inode->i_ctime.tv_sec, > -+ inode->i_ctime.tv_nsec, > -+ lower_inode->i_ctime.tv_sec, > -+ lower_inode->i_ctime.tv_nsec); > -+ } > -+ } > -+} > -+ > -+void __unionfs_check_file(const struct file *file, > -+ const char *fname, const char *fxn, int line) > -+{ > -+ int bindex; > -+ int dstart, dend, fstart, fend; > -+ struct dentry *dentry; > -+ struct file *lower_file; > -+ struct inode *inode; > -+ struct super_block *sb; > -+ int printed_caller = 0; > -+ > -+ BUG_ON(!file); > -+ dentry = file->f_path.dentry; > -+ sb = dentry->d_sb; > -+ dstart = dbstart(dentry); > -+ dend = dbend(dentry); > -+ BUG_ON(dstart > dend); > -+ fstart = fbstart(file); > -+ fend = fbend(file); > -+ BUG_ON(fstart > fend); > -+ > -+ if (unlikely((fstart == -1 && fend != -1) || > -+ (fstart != -1 && fend == -1))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CF0: file/dentry=%p:%p fstart/end=%d:%d\n", > -+ file, dentry, fstart, fend); > -+ } > -+ if (unlikely(fstart != dstart)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CF1: file/dentry=%p:%p fstart=%d dstart=%d\n", > -+ file, dentry, fstart, dstart); > -+ } > -+ if (unlikely(fend != dend)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CF2: file/dentry=%p:%p fend=%d dend=%d\n", > -+ file, dentry, fend, dend); > -+ } > -+ inode = dentry->d_inode; > -+ if (!S_ISDIR(inode->i_mode)) { > -+ if (unlikely(fend != fstart)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CF3: file/inode=%p:%p fstart=%d > fend=%d\n", > -+ file, inode, fstart, fend); > -+ } > -+ if (unlikely(dend != dstart)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CF4: file/dentry=%p:%p dstart=%d > dend=%d\n", > -+ file, dentry, dstart, dend); > -+ } > -+ } > -+ > -+ /* > -+ * check for NULL dentries inside the start/end range, or > -+ * non-NULL dentries outside the start/end range. > -+ */ > -+ for (bindex = sbstart(sb); bindex < sbmax(sb); bindex++) { > -+ lower_file = unionfs_lower_file_idx(file, bindex); > -+ if (lower_file) { > -+ if (unlikely(bindex < fstart || bindex > fend)) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CF5: file/lower=%p:%p bindex=%d > " > -+ "fstart/end=%d:%d\n", file, > -+ lower_file, bindex, fstart, fend); > -+ } > -+ } else { /* lower_file == NULL */ > -+ if (bindex >= fstart && bindex <= fend) { > -+ /* > -+ * directories can have NULL lower inodes in > -+ * b/t start/end, but NOT if at the > -+ * start/end range. > -+ */ > -+ if (unlikely(!(S_ISDIR(inode->i_mode) && > -+ bindex > fstart && > -+ bindex < fend))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CF6: file/lower=%p:%p " > -+ "bindex=%d > fstart/end=%d:%d\n", > -+ file, lower_file, bindex, > -+ fstart, fend); > -+ } > -+ } > -+ } > -+ } > -+ > -+ __unionfs_check_dentry(dentry, fname, fxn, line); > -+} > -+ > -+void __unionfs_check_nd(const struct nameidata *nd, > -+ const char *fname, const char *fxn, int line) > -+{ > -+ struct file *file; > -+ int printed_caller = 0; > -+ > -+ if (unlikely(!nd)) > -+ return; > -+ if (nd->flags & LOOKUP_OPEN) { > -+ file = nd->intent.open.file; > -+ if (unlikely(file->f_path.dentry && > -+ strcmp(file->f_path.dentry->d_sb->s_type->name, > -+ UNIONFS_NAME))) { > -+ PRINT_CALLER(fname, fxn, line); > -+ pr_debug(" CND1: lower_file of type %s\n", > -+ file->f_path.dentry->d_sb->s_type->name); > -+ } > -+ } > -+} > -+ > -+static unsigned int __mnt_get_count(struct vfsmount *mnt) > -+{ > -+#ifdef CONFIG_SMP > -+ unsigned int count = 0; > -+ int cpu; > -+ > -+ for_each_possible_cpu(cpu) { > -+ count += per_cpu_ptr(mnt->mnt_pcp, cpu)->mnt_count; > -+ } > -+ > -+ return count; > -+#else > -+ return mnt->mnt_count; > -+#endif > -+} > -+ > -+/* useful to track vfsmount leaks that could cause EBUSY on unmount */ > -+void __show_branch_counts(const struct super_block *sb, > -+ const char *file, const char *fxn, int line) > -+{ > -+ int i; > -+ struct vfsmount *mnt; > -+ > -+ pr_debug("BC:"); > -+ for (i = 0; i < sbmax(sb); i++) { > -+ if (likely(sb->s_root)) > -+ mnt = UNIONFS_D(sb->s_root)->lower_paths[i].mnt; > -+ else > -+ mnt = NULL; > -+ printk(KERN_CONT "%d:", > -+ (mnt ? __mnt_get_count(mnt) : -99)); > -+ } > -+ printk(KERN_CONT "%s:%s:%d\n", file, fxn, line); > -+} > -+ > -+void __show_inode_times(const struct inode *inode, > -+ const char *file, const char *fxn, int line) > -+{ > -+ struct inode *lower_inode; > -+ int bindex; > -+ > -+ for (bindex = ibstart(inode); bindex <= ibend(inode); bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (unlikely(!lower_inode)) > -+ continue; > -+ pr_debug("IT(%lu:%d): %s:%s:%d " > -+ "um=%lu/%lu lm=%lu/%lu uc=%lu/%lu lc=%lu/%lu\n", > -+ inode->i_ino, bindex, > -+ file, fxn, line, > -+ inode->i_mtime.tv_sec, inode->i_mtime.tv_nsec, > -+ lower_inode->i_mtime.tv_sec, > -+ lower_inode->i_mtime.tv_nsec, > -+ inode->i_ctime.tv_sec, inode->i_ctime.tv_nsec, > -+ lower_inode->i_ctime.tv_sec, > -+ lower_inode->i_ctime.tv_nsec); > -+ } > -+} > -+ > -+void __show_dinode_times(const struct dentry *dentry, > -+ const char *file, const char *fxn, int line) > -+{ > -+ struct inode *inode = dentry->d_inode; > -+ struct inode *lower_inode; > -+ int bindex; > -+ > -+ for (bindex = ibstart(inode); bindex <= ibend(inode); bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (!lower_inode) > -+ continue; > -+ pr_debug("DT(%s:%lu:%d): %s:%s:%d " > -+ "um=%lu/%lu lm=%lu/%lu uc=%lu/%lu lc=%lu/%lu\n", > -+ dentry->d_name.name, inode->i_ino, bindex, > -+ file, fxn, line, > -+ inode->i_mtime.tv_sec, inode->i_mtime.tv_nsec, > -+ lower_inode->i_mtime.tv_sec, > -+ lower_inode->i_mtime.tv_nsec, > -+ inode->i_ctime.tv_sec, inode->i_ctime.tv_nsec, > -+ lower_inode->i_ctime.tv_sec, > -+ lower_inode->i_ctime.tv_nsec); > -+ } > -+} > -+ > -+void __show_inode_counts(const struct inode *inode, > -+ const char *file, const char *fxn, int line) > -+{ > -+ struct inode *lower_inode; > -+ int bindex; > -+ > -+ if (unlikely(!inode)) { > -+ pr_debug("SiC: Null inode\n"); > -+ return; > -+ } > -+ for (bindex = sbstart(inode->i_sb); bindex <= sbend(inode->i_sb); > -+ bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (unlikely(!lower_inode)) > -+ continue; > -+ pr_debug("SIC(%lu:%d:%d): lc=%d %s:%s:%d\n", > -+ inode->i_ino, bindex, > -+ atomic_read(&(inode)->i_count), > -+ atomic_read(&(lower_inode)->i_count), > -+ file, fxn, line); > -+ } > -+} > -diff --git a/fs/unionfs/dentry.c b/fs/unionfs/dentry.c > -new file mode 100644 > -index 0000000..c0205a4 > ---- /dev/null > -+++ b/fs/unionfs/dentry.c > -@@ -0,0 +1,406 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+bool is_negative_lower(const struct dentry *dentry) > -+{ > -+ int bindex; > -+ struct dentry *lower_dentry; > -+ > -+ BUG_ON(!dentry); > -+ /* cache coherency: check if file was deleted on lower branch */ > -+ if (dbstart(dentry) < 0) > -+ return true; > -+ for (bindex = dbstart(dentry); bindex <= dbend(dentry); bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ /* unhashed (i.e., unlinked) lower dentries don't count */ > -+ if (lower_dentry && lower_dentry->d_inode && > -+ !d_deleted(lower_dentry) && > -+ !(lower_dentry->d_flags & DCACHE_NFSFS_RENAMED)) > -+ return false; > -+ } > -+ return true; > -+} > -+ > -+static inline void __dput_lowers(struct dentry *dentry, int start, int end) > -+{ > -+ struct dentry *lower_dentry; > -+ int bindex; > -+ > -+ if (start < 0) > -+ return; > -+ for (bindex = start; bindex <= end; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) > -+ continue; > -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); > -+ dput(lower_dentry); > -+ } > -+} > -+ > -+/* > -+ * Purge and invalidate as many data pages of a unionfs inode. This is > -+ * called when the lower inode has changed, and we want to force processes > -+ * to re-get the new data. > -+ */ > -+static inline void purge_inode_data(struct inode *inode) > -+{ > -+ /* remove all non-private mappings */ > -+ unmap_mapping_range(inode->i_mapping, 0, 0, 0); > -+ /* invalidate as many pages as possible */ > -+ invalidate_mapping_pages(inode->i_mapping, 0, -1); > -+ /* > -+ * Don't try to truncate_inode_pages here, because this could lead > -+ * to a deadlock between some of address_space ops and dentry > -+ * revalidation: the address space op is invoked with a lock on our > -+ * own page, and truncate_inode_pages will block on locked pages. > -+ */ > -+} > -+ > -+/* > -+ * Revalidate a single file/symlink/special dentry. Assume that info nodes > -+ * of the @dentry and its @parent are locked. Assume parent is valid, > -+ * otherwise return false (and let's hope the VFS will try to re-lookup this > -+ * dentry). Returns true if valid, false otherwise. > -+ */ > -+bool __unionfs_d_revalidate(struct dentry *dentry, struct dentry *parent, > -+ bool willwrite) > -+{ > -+ bool valid = true; /* default is valid */ > -+ struct dentry *lower_dentry; > -+ struct dentry *result; > -+ int bindex, bstart, bend; > -+ int sbgen, dgen, pdgen; > -+ int positive = 0; > -+ int interpose_flag; > -+ > -+ verify_locked(dentry); > -+ verify_locked(parent); > -+ > -+ /* if the dentry is unhashed, do NOT revalidate */ > -+ if (d_deleted(dentry)) > -+ goto out; > -+ > -+ dgen = atomic_read(&UNIONFS_D(dentry)->generation); > -+ > -+ if (is_newer_lower(dentry)) { > -+ /* root dentry is always valid */ > -+ if (IS_ROOT(dentry)) { > -+ unionfs_copy_attr_times(dentry->d_inode); > -+ } else { > -+ /* > -+ * reset generation number to zero, guaranteed to be > -+ * "old" > -+ */ > -+ dgen = 0; > -+ atomic_set(&UNIONFS_D(dentry)->generation, dgen); > -+ } > -+ if (!willwrite) > -+ purge_inode_data(dentry->d_inode); > -+ } > -+ > -+ sbgen = atomic_read(&UNIONFS_SB(dentry->d_sb)->generation); > -+ > -+ BUG_ON(dbstart(dentry) == -1); > -+ if (dentry->d_inode) > -+ positive = 1; > -+ > -+ /* if our dentry is valid, then validate all lower ones */ > -+ if (sbgen == dgen) > -+ goto validate_lowers; > -+ > -+ /* The root entry should always be valid */ > -+ BUG_ON(IS_ROOT(dentry)); > -+ > -+ /* We can't work correctly if our parent isn't valid. */ > -+ pdgen = atomic_read(&UNIONFS_D(parent)->generation); > -+ > -+ /* Free the pointers for our inodes and this dentry. */ > -+ path_put_lowers_all(dentry, false); > -+ > -+ interpose_flag = INTERPOSE_REVAL_NEG; > -+ if (positive) { > -+ interpose_flag = INTERPOSE_REVAL; > -+ iput_lowers_all(dentry->d_inode, true); > -+ } > -+ > -+ if (realloc_dentry_private_data(dentry) != 0) { > -+ valid = false; > -+ goto out; > -+ } > -+ > -+ result = unionfs_lookup_full(dentry, parent, interpose_flag); > -+ if (result) { > -+ if (IS_ERR(result)) { > -+ valid = false; > -+ goto out; > -+ } > -+ /* > -+ * current unionfs_lookup_backend() doesn't return > -+ * a valid dentry > -+ */ > -+ dput(dentry); > -+ dentry = result; > -+ } > -+ > -+ if (unlikely(positive && is_negative_lower(dentry))) { > -+ /* call make_bad_inode here ? */ > -+ d_drop(dentry); > -+ valid = false; > -+ goto out; > -+ } > -+ > -+ /* > -+ * if we got here then we have revalidated our dentry and all lower > -+ * ones, so we can return safely. > -+ */ > -+ if (!valid) /* lower dentry revalidation failed */ > -+ goto out; > -+ > -+ /* > -+ * If the parent's gen no. matches the superblock's gen no., then > -+ * we can update our denty's gen no. If they didn't match, then it > -+ * was OK to revalidate this dentry with a stale parent, but we'll > -+ * purposely not update our dentry's gen no. (so it can be redone); > -+ * and, we'll mark our parent dentry as invalid so it'll force it > -+ * (and our dentry) to be revalidated. > -+ */ > -+ if (pdgen == sbgen) > -+ atomic_set(&UNIONFS_D(dentry)->generation, sbgen); > -+ goto out; > -+ > -+validate_lowers: > -+ > -+ /* The revalidation must occur across all branches */ > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ BUG_ON(bstart == -1); > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ int err; > -+ struct nameidata lower_nd; > -+ > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry || !lower_dentry->d_op > -+ || !lower_dentry->d_op->d_revalidate) > -+ continue; > -+ /* > -+ * Don't pass nameidata to lower file system, because we > -+ * don't want an arbitrary lower file being opened or > -+ * returned to us: it may be useless to us because of the > -+ * fanout nature of unionfs (cf. file/directory open-file > -+ * invariants). We will open lower files as and when needed > -+ * later on. > -+ */ > -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); > -+ if (unlikely(err < 0)) { > -+ valid = false; > -+ break; > -+ } > -+ if (!lower_dentry->d_op->d_revalidate(lower_dentry, > &lower_nd)) > -+ valid = false; > -+ release_lower_nd(&lower_nd, err); > -+ } > -+ > -+ if (!dentry->d_inode || > -+ ibstart(dentry->d_inode) < 0 || > -+ ibend(dentry->d_inode) < 0) { > -+ valid = false; > -+ goto out; > -+ } > -+ > -+ if (valid) { > -+ /* > -+ * If we get here, and we copy the meta-data from the lower > -+ * inode to our inode, then it is vital that we have already > -+ * purged all unionfs-level file data. We do that in the > -+ * caller (__unionfs_d_revalidate) by calling > -+ * purge_inode_data. > -+ */ > -+ unionfs_copy_attr_all(dentry->d_inode, > -+ unionfs_lower_inode(dentry->d_inode)); > -+ fsstack_copy_inode_size(dentry->d_inode, > -+ unionfs_lower_inode(dentry- > >d_inode)); > -+ } > -+ > -+out: > -+ return valid; > -+} > -+ > -+/* > -+ * Determine if the lower inode objects have changed from below the unionfs > -+ * inode. Return true if changed, false otherwise. > -+ * > -+ * We check if the mtime or ctime have changed. However, the inode times > -+ * can be changed by anyone without much protection, including > -+ * asynchronously. This can sometimes cause unionfs to find that the lower > -+ * file system doesn't change its inode times quick enough, resulting in a > -+ * false positive indication (which is harmless, it just makes unionfs do > -+ * extra work in re-validating the objects). To minimize the chances of > -+ * these situations, we still consider such small time changes valid, but we > -+ * don't print debugging messages unless the time changes are greater than > -+ * UNIONFS_MIN_CC_TIME (which defaults to 3 seconds, as with NFS's > acregmin) > -+ * because significant changes are more likely due to users manually > -+ * touching lower files. > -+ */ > -+bool is_newer_lower(const struct dentry *dentry) > -+{ > -+ int bindex; > -+ struct inode *inode; > -+ struct inode *lower_inode; > -+ > -+ /* ignore if we're called on semi-initialized dentries/inodes */ > -+ if (!dentry || !UNIONFS_D(dentry)) > -+ return false; > -+ inode = dentry->d_inode; > -+ if (!inode || !UNIONFS_I(inode)->lower_inodes || > -+ ibstart(inode) < 0 || ibend(inode) < 0) > -+ return false; > -+ > -+ for (bindex = ibstart(inode); bindex <= ibend(inode); bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (!lower_inode) > -+ continue; > -+ > -+ /* check if mtime/ctime have changed */ > -+ if (unlikely(timespec_compare(&inode->i_mtime, > -+ &lower_inode->i_mtime) < 0)) { > -+ if ((lower_inode->i_mtime.tv_sec - > -+ inode->i_mtime.tv_sec) > UNIONFS_MIN_CC_TIME) > { > -+ pr_info("unionfs: new lower inode mtime " > -+ "(bindex=%d, name=%s)\n", bindex, > -+ dentry->d_name.name); > -+ show_dinode_times(dentry); > -+ } > -+ return true; > -+ } > -+ if (unlikely(timespec_compare(&inode->i_ctime, > -+ &lower_inode->i_ctime) < 0)) { > -+ if ((lower_inode->i_ctime.tv_sec - > -+ inode->i_ctime.tv_sec) > UNIONFS_MIN_CC_TIME) { > -+ pr_info("unionfs: new lower inode ctime " > -+ "(bindex=%d, name=%s)\n", bindex, > -+ dentry->d_name.name); > -+ show_dinode_times(dentry); > -+ } > -+ return true; > -+ } > -+ } > -+ > -+ /* > -+ * Last check: if this is a positive dentry, but somehow all lower > -+ * dentries are negative or unhashed, then this dentry needs to be > -+ * revalidated, because someone probably deleted the objects from > -+ * the lower branches directly. > -+ */ > -+ if (is_negative_lower(dentry)) > -+ return true; > -+ > -+ return false; /* default: lower is not newer */ > -+} > -+ > -+static int unionfs_d_revalidate(struct dentry *dentry, > -+ struct nameidata *nd_unused) > -+{ > -+ bool valid = true; > -+ int err = 1; /* 1 means valid for the VFS */ > -+ struct dentry *parent; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (valid) { > -+ unionfs_postcopyup_setmnt(dentry); > -+ unionfs_check_dentry(dentry); > -+ } else { > -+ d_drop(dentry); > -+ err = valid; > -+ } > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ > -+ return err; > -+} > -+ > -+static void unionfs_d_release(struct dentry *dentry) > -+{ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ if (unlikely(!UNIONFS_D(dentry))) > -+ goto out; /* skip if no lower branches */ > -+ /* must lock our branch configuration here */ > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ unionfs_check_dentry(dentry); > -+ /* this could be a negative dentry, so check first */ > -+ if (dbstart(dentry) < 0) { > -+ unionfs_unlock_dentry(dentry); > -+ goto out; /* due to a (normal) failed lookup */ > -+ } > -+ > -+ /* Release all the lower dentries */ > -+ path_put_lowers_all(dentry, true); > -+ > -+ unionfs_unlock_dentry(dentry); > -+ > -+out: > -+ free_dentry_private_data(dentry); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return; > -+} > -+ > -+/* > -+ * Called when we're removing the last reference to our dentry. So we > -+ * should drop all lower references too. > -+ */ > -+static void unionfs_d_iput(struct dentry *dentry, struct inode *inode) > -+{ > -+ int rc; > -+ > -+ BUG_ON(!dentry); > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ if (!UNIONFS_D(dentry) || dbstart(dentry) < 0) > -+ goto drop_lower_inodes; > -+ path_put_lowers_all(dentry, false); > -+ > -+drop_lower_inodes: > -+ rc = atomic_read(&inode->i_count); > -+ if (rc == 1 && inode->i_nlink == 1 && ibstart(inode) >= 0) { > -+ /* see Documentation/filesystems/unionfs/issues.txt */ > -+ lockdep_off(); > -+ iput(unionfs_lower_inode(inode)); > -+ lockdep_on(); > -+ unionfs_set_lower_inode(inode, NULL); > -+ /* XXX: may need to set start/end to -1? */ > -+ } > -+ > -+ iput(inode); > -+ > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_read_unlock(dentry->d_sb); > -+} > -+ > -+struct dentry_operations unionfs_dops = { > -+ .d_revalidate = unionfs_d_revalidate, > -+ .d_release = unionfs_d_release, > -+ .d_iput = unionfs_d_iput, > -+}; > -diff --git a/fs/unionfs/dirfops.c b/fs/unionfs/dirfops.c > -new file mode 100644 > -index 0000000..72a9c1a > ---- /dev/null > -+++ b/fs/unionfs/dirfops.c > -@@ -0,0 +1,302 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* Make sure our rdstate is playing by the rules. */ > -+static void verify_rdstate_offset(struct unionfs_dir_state *rdstate) > -+{ > -+ BUG_ON(rdstate->offset >= DIREOF); > -+ BUG_ON(rdstate->cookie >= MAXRDCOOKIE); > -+} > -+ > -+struct unionfs_getdents_callback { > -+ struct unionfs_dir_state *rdstate; > -+ void *dirent; > -+ int entries_written; > -+ int filldir_called; > -+ int filldir_error; > -+ filldir_t filldir; > -+ struct super_block *sb; > -+}; > -+ > -+/* based on generic filldir in fs/readir.c */ > -+static int unionfs_filldir(void *dirent, const char *oname, int namelen, > -+ loff_t offset, u64 ino, unsigned int d_type) > -+{ > -+ struct unionfs_getdents_callback *buf = dirent; > -+ struct filldir_node *found = NULL; > -+ int err = 0; > -+ int is_whiteout; > -+ char *name = (char *) oname; > -+ > -+ buf->filldir_called++; > -+ > -+ is_whiteout = is_whiteout_name(&name, &namelen); > -+ > -+ found = find_filldir_node(buf->rdstate, name, namelen, is_whiteout); > -+ > -+ if (found) { > -+ /* > -+ * If we had non-whiteout entry in dir cache, then mark it > -+ * as a whiteout and but leave it in the dir cache. > -+ */ > -+ if (is_whiteout && !found->whiteout) > -+ found->whiteout = is_whiteout; > -+ goto out; > -+ } > -+ > -+ /* if 'name' isn't a whiteout, filldir it. */ > -+ if (!is_whiteout) { > -+ off_t pos = rdstate2offset(buf->rdstate); > -+ u64 unionfs_ino = ino; > -+ > -+ err = buf->filldir(buf->dirent, name, namelen, pos, > -+ unionfs_ino, d_type); > -+ buf->rdstate->offset++; > -+ verify_rdstate_offset(buf->rdstate); > -+ } > -+ /* > -+ * If we did fill it, stuff it in our hash, otherwise return an > -+ * error. > -+ */ > -+ if (err) { > -+ buf->filldir_error = err; > -+ goto out; > -+ } > -+ buf->entries_written++; > -+ err = add_filldir_node(buf->rdstate, name, namelen, > -+ buf->rdstate->bindex, is_whiteout); > -+ if (err) > -+ buf->filldir_error = err; > -+ > -+out: > -+ return err; > -+} > -+ > -+static int unionfs_readdir(struct file *file, void *dirent, filldir_t filldir) > -+{ > -+ int err = 0; > -+ struct file *lower_file = NULL; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ struct inode *inode = NULL; > -+ struct unionfs_getdents_callback buf; > -+ struct unionfs_dir_state *uds; > -+ int bend; > -+ loff_t offset; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, false); > -+ if (unlikely(err)) > -+ goto out; > -+ > -+ inode = dentry->d_inode; > -+ > -+ uds = UNIONFS_F(file)->rdstate; > -+ if (!uds) { > -+ if (file->f_pos == DIREOF) { > -+ goto out; > -+ } else if (file->f_pos > 0) { > -+ uds = find_rdstate(inode, file->f_pos); > -+ if (unlikely(!uds)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ UNIONFS_F(file)->rdstate = uds; > -+ } else { > -+ init_rdstate(file); > -+ uds = UNIONFS_F(file)->rdstate; > -+ } > -+ } > -+ bend = fbend(file); > -+ > -+ while (uds->bindex <= bend) { > -+ lower_file = unionfs_lower_file_idx(file, uds->bindex); > -+ if (!lower_file) { > -+ uds->bindex++; > -+ uds->dirpos = 0; > -+ continue; > -+ } > -+ > -+ /* prepare callback buffer */ > -+ buf.filldir_called = 0; > -+ buf.filldir_error = 0; > -+ buf.entries_written = 0; > -+ buf.dirent = dirent; > -+ buf.filldir = filldir; > -+ buf.rdstate = uds; > -+ buf.sb = inode->i_sb; > -+ > -+ /* Read starting from where we last left off. */ > -+ offset = vfs_llseek(lower_file, uds->dirpos, SEEK_SET); > -+ if (offset < 0) { > -+ err = offset; > -+ goto out; > -+ } > -+ err = vfs_readdir(lower_file, unionfs_filldir, &buf); > -+ > -+ /* Save the position for when we continue. */ > -+ offset = vfs_llseek(lower_file, 0, SEEK_CUR); > -+ if (offset < 0) { > -+ err = offset; > -+ goto out; > -+ } > -+ uds->dirpos = offset; > -+ > -+ /* Copy the atime. */ > -+ fsstack_copy_attr_atime(inode, > -+ lower_file->f_path.dentry->d_inode); > -+ > -+ if (err < 0) > -+ goto out; > -+ > -+ if (buf.filldir_error) > -+ break; > -+ > -+ if (!buf.entries_written) { > -+ uds->bindex++; > -+ uds->dirpos = 0; > -+ } > -+ } > -+ > -+ if (!buf.filldir_error && uds->bindex >= bend) { > -+ /* Save the number of hash entries for next time. */ > -+ UNIONFS_I(inode)->hashsize = uds->hashentries; > -+ free_rdstate(uds); > -+ UNIONFS_F(file)->rdstate = NULL; > -+ file->f_pos = DIREOF; > -+ } else { > -+ file->f_pos = rdstate2offset(uds); > -+ } > -+ > -+out: > -+ if (!err) > -+ unionfs_check_file(file); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+/* > -+ * This is not meant to be a generic repositioning function. If you do > -+ * things that aren't supported, then we return EINVAL. > -+ * > -+ * What is allowed: > -+ * (1) seeking to the same position that you are currently at > -+ * This really has no effect, but returns where you are. > -+ * (2) seeking to the beginning of the file > -+ * This throws out all state, and lets you begin again. > -+ */ > -+static loff_t unionfs_dir_llseek(struct file *file, loff_t offset, int origin) > -+{ > -+ struct unionfs_dir_state *rdstate; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ loff_t err; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, false); > -+ if (unlikely(err)) > -+ goto out; > -+ > -+ rdstate = UNIONFS_F(file)->rdstate; > -+ > -+ /* > -+ * we let users seek to their current position, but not anywhere > -+ * else. > -+ */ > -+ if (!offset) { > -+ switch (origin) { > -+ case SEEK_SET: > -+ if (rdstate) { > -+ free_rdstate(rdstate); > -+ UNIONFS_F(file)->rdstate = NULL; > -+ } > -+ init_rdstate(file); > -+ err = 0; > -+ break; > -+ case SEEK_CUR: > -+ err = file->f_pos; > -+ break; > -+ case SEEK_END: > -+ /* Unsupported, because we would break everything. > */ > -+ err = -EINVAL; > -+ break; > -+ } > -+ } else { > -+ switch (origin) { > -+ case SEEK_SET: > -+ if (rdstate) { > -+ if (offset == rdstate2offset(rdstate)) > -+ err = offset; > -+ else if (file->f_pos == DIREOF) > -+ err = DIREOF; > -+ else > -+ err = -EINVAL; > -+ } else { > -+ struct inode *inode; > -+ inode = dentry->d_inode; > -+ rdstate = find_rdstate(inode, offset); > -+ if (rdstate) { > -+ UNIONFS_F(file)->rdstate = rdstate; > -+ err = rdstate->offset; > -+ } else { > -+ err = -EINVAL; > -+ } > -+ } > -+ break; > -+ case SEEK_CUR: > -+ case SEEK_END: > -+ /* Unsupported, because we would break everything. > */ > -+ err = -EINVAL; > -+ break; > -+ } > -+ } > -+ > -+out: > -+ if (!err) > -+ unionfs_check_file(file); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+/* > -+ * Trimmed directory options, we shouldn't pass everything down since > -+ * we don't want to operate on partial directories. > -+ */ > -+struct file_operations unionfs_dir_fops = { > -+ .llseek = unionfs_dir_llseek, > -+ .read = generic_read_dir, > -+ .readdir = unionfs_readdir, > -+ .unlocked_ioctl = unionfs_ioctl, > -+ .open = unionfs_open, > -+ .release = unionfs_file_release, > -+ .flush = unionfs_flush, > -+ .fsync = unionfs_fsync, > -+ .fasync = unionfs_fasync, > -+}; > -diff --git a/fs/unionfs/dirhelper.c b/fs/unionfs/dirhelper.c > -new file mode 100644 > -index 0000000..62ec9af > ---- /dev/null > -+++ b/fs/unionfs/dirhelper.c > -@@ -0,0 +1,158 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+#define RD_NONE 0 > -+#define RD_CHECK_EMPTY 1 > -+/* The callback structure for check_empty. */ > -+struct unionfs_rdutil_callback { > -+ int err; > -+ int filldir_called; > -+ struct unionfs_dir_state *rdstate; > -+ int mode; > -+}; > -+ > -+/* This filldir function makes sure only whiteouts exist within a directory. */ > -+static int readdir_util_callback(void *dirent, const char *oname, int namelen, > -+ loff_t offset, u64 ino, unsigned int d_type) > -+{ > -+ int err = 0; > -+ struct unionfs_rdutil_callback *buf = dirent; > -+ int is_whiteout; > -+ struct filldir_node *found; > -+ char *name = (char *) oname; > -+ > -+ buf->filldir_called = 1; > -+ > -+ if (name[0] == '.' && (namelen == 1 || > -+ (name[1] == '.' && namelen == 2))) > -+ goto out; > -+ > -+ is_whiteout = is_whiteout_name(&name, &namelen); > -+ > -+ found = find_filldir_node(buf->rdstate, name, namelen, is_whiteout); > -+ /* If it was found in the table there was a previous whiteout. */ > -+ if (found) > -+ goto out; > -+ > -+ /* > -+ * if it wasn't found and isn't a whiteout, the directory isn't > -+ * empty. > -+ */ > -+ err = -ENOTEMPTY; > -+ if ((buf->mode == RD_CHECK_EMPTY) && !is_whiteout) > -+ goto out; > -+ > -+ err = add_filldir_node(buf->rdstate, name, namelen, > -+ buf->rdstate->bindex, is_whiteout); > -+ > -+out: > -+ buf->err = err; > -+ return err; > -+} > -+ > -+/* Is a directory logically empty? */ > -+int check_empty(struct dentry *dentry, struct dentry *parent, > -+ struct unionfs_dir_state **namelist) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry = NULL; > -+ struct vfsmount *mnt; > -+ struct super_block *sb; > -+ struct file *lower_file; > -+ struct unionfs_rdutil_callback *buf = NULL; > -+ int bindex, bstart, bend, bopaque; > -+ > -+ sb = dentry->d_sb; > -+ > -+ > -+ BUG_ON(!S_ISDIR(dentry->d_inode->i_mode)); > -+ > -+ err = unionfs_partial_lookup(dentry, parent); > -+ if (err) > -+ goto out; > -+ > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ bopaque = dbopaque(dentry); > -+ if (0 <= bopaque && bopaque < bend) > -+ bend = bopaque; > -+ > -+ buf = kmalloc(sizeof(struct unionfs_rdutil_callback), GFP_KERNEL); > -+ if (unlikely(!buf)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ buf->err = 0; > -+ buf->mode = RD_CHECK_EMPTY; > -+ buf->rdstate = alloc_rdstate(dentry->d_inode, bstart); > -+ if (unlikely(!buf->rdstate)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ /* Process the lower directories with rdutil_callback as a filldir. */ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) > -+ continue; > -+ if (!lower_dentry->d_inode) > -+ continue; > -+ if (!S_ISDIR(lower_dentry->d_inode->i_mode)) > -+ continue; > -+ > -+ dget(lower_dentry); > -+ mnt = unionfs_mntget(dentry, bindex); > -+ branchget(sb, bindex); > -+ lower_file = dentry_open(lower_dentry, mnt, O_RDONLY, > current_cred()); > -+ if (IS_ERR(lower_file)) { > -+ err = PTR_ERR(lower_file); > -+ branchput(sb, bindex); > -+ goto out; > -+ } > -+ > -+ do { > -+ buf->filldir_called = 0; > -+ buf->rdstate->bindex = bindex; > -+ err = vfs_readdir(lower_file, > -+ readdir_util_callback, buf); > -+ if (buf->err) > -+ err = buf->err; > -+ } while ((err >= 0) && buf->filldir_called); > -+ > -+ /* fput calls dput for lower_dentry */ > -+ fput(lower_file); > -+ branchput(sb, bindex); > -+ > -+ if (err < 0) > -+ goto out; > -+ } > -+ > -+out: > -+ if (buf) { > -+ if (namelist && !err) > -+ *namelist = buf->rdstate; > -+ else if (buf->rdstate) > -+ free_rdstate(buf->rdstate); > -+ kfree(buf); > -+ } > -+ > -+ > -+ return err; > -+} > -diff --git a/fs/unionfs/fanout.h b/fs/unionfs/fanout.h > -new file mode 100644 > -index 0000000..ae1b86a > ---- /dev/null > -+++ b/fs/unionfs/fanout.h > -@@ -0,0 +1,407 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#ifndef _FANOUT_H_ > -+#define _FANOUT_H_ > -+ > -+/* > -+ * Inode to private data > -+ * > -+ * Since we use containers and the struct inode is _inside_ the > -+ * unionfs_inode_info structure, UNIONFS_I will always (given a non-NULL > -+ * inode pointer), return a valid non-NULL pointer. > -+ */ > -+static inline struct unionfs_inode_info *UNIONFS_I(const struct inode *inode) > -+{ > -+ return container_of(inode, struct unionfs_inode_info, vfs_inode); > -+} > -+ > -+#define ibstart(ino) (UNIONFS_I(ino)->bstart) > -+#define ibend(ino) (UNIONFS_I(ino)->bend) > -+ > -+/* Dentry to private data */ > -+#define UNIONFS_D(dent) ((struct unionfs_dentry_info *)(dent)->d_fsdata) > -+#define dbstart(dent) (UNIONFS_D(dent)->bstart) > -+#define dbend(dent) (UNIONFS_D(dent)->bend) > -+#define dbopaque(dent) (UNIONFS_D(dent)->bopaque) > -+ > -+/* Superblock to private data */ > -+#define UNIONFS_SB(super) ((struct unionfs_sb_info *)(super)->s_fs_info) > -+#define sbstart(sb) 0 > -+#define sbend(sb) (UNIONFS_SB(sb)->bend) > -+#define sbmax(sb) (UNIONFS_SB(sb)->bend + 1) > -+#define sbhbid(sb) (UNIONFS_SB(sb)->high_branch_id) > -+ > -+/* File to private Data */ > -+#define UNIONFS_F(file) ((struct unionfs_file_info *)((file)->private_data)) > -+#define fbstart(file) (UNIONFS_F(file)->bstart) > -+#define fbend(file) (UNIONFS_F(file)->bend) > -+ > -+/* macros to manipulate branch IDs in stored in our superblock */ > -+static inline int branch_id(struct super_block *sb, int index) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ return UNIONFS_SB(sb)->data[index].branch_id; > -+} > -+ > -+static inline void set_branch_id(struct super_block *sb, int index, int val) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ UNIONFS_SB(sb)->data[index].branch_id = val; > -+} > -+ > -+static inline void new_branch_id(struct super_block *sb, int index) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ set_branch_id(sb, index, ++UNIONFS_SB(sb)->high_branch_id); > -+} > -+ > -+/* > -+ * Find new index of matching branch with an existing superblock of a known > -+ * (possibly old) id. This is needed because branches could have been > -+ * added/deleted causing the branches of any open files to shift. > -+ * > -+ * @sb: the new superblock which may have new/different branch IDs > -+ * @id: the old/existing id we're looking for > -+ * Returns index of newly found branch (0 or greater), -1 otherwise. > -+ */ > -+static inline int branch_id_to_idx(struct super_block *sb, int id) > -+{ > -+ int i; > -+ for (i = 0; i < sbmax(sb); i++) { > -+ if (branch_id(sb, i) == id) > -+ return i; > -+ } > -+ /* in the non-ODF code, this should really never happen */ > -+ printk(KERN_WARNING "unionfs: cannot find branch with id %d\n", id); > -+ return -1; > -+} > -+ > -+/* File to lower file. */ > -+static inline struct file *unionfs_lower_file(const struct file *f) > -+{ > -+ BUG_ON(!f); > -+ return UNIONFS_F(f)->lower_files[fbstart(f)]; > -+} > -+ > -+static inline struct file *unionfs_lower_file_idx(const struct file *f, > -+ int index) > -+{ > -+ BUG_ON(!f || index < 0); > -+ return UNIONFS_F(f)->lower_files[index]; > -+} > -+ > -+static inline void unionfs_set_lower_file_idx(struct file *f, int index, > -+ struct file *val) > -+{ > -+ BUG_ON(!f || index < 0); > -+ UNIONFS_F(f)->lower_files[index] = val; > -+ /* save branch ID (may be redundant?) */ > -+ UNIONFS_F(f)->saved_branch_ids[index] = > -+ branch_id((f)->f_path.dentry->d_sb, index); > -+} > -+ > -+static inline void unionfs_set_lower_file(struct file *f, struct file *val) > -+{ > -+ BUG_ON(!f); > -+ unionfs_set_lower_file_idx((f), fbstart(f), (val)); > -+} > -+ > -+/* Inode to lower inode. */ > -+static inline struct inode *unionfs_lower_inode(const struct inode *i) > -+{ > -+ BUG_ON(!i); > -+ return UNIONFS_I(i)->lower_inodes[ibstart(i)]; > -+} > -+ > -+static inline struct inode *unionfs_lower_inode_idx(const struct inode *i, > -+ int index) > -+{ > -+ BUG_ON(!i || index < 0); > -+ return UNIONFS_I(i)->lower_inodes[index]; > -+} > -+ > -+static inline void unionfs_set_lower_inode_idx(struct inode *i, int index, > -+ struct inode *val) > -+{ > -+ BUG_ON(!i || index < 0); > -+ UNIONFS_I(i)->lower_inodes[index] = val; > -+} > -+ > -+static inline void unionfs_set_lower_inode(struct inode *i, struct inode *val) > -+{ > -+ BUG_ON(!i); > -+ UNIONFS_I(i)->lower_inodes[ibstart(i)] = val; > -+} > -+ > -+/* Superblock to lower superblock. */ > -+static inline struct super_block *unionfs_lower_super( > -+ const struct super_block *sb) > -+{ > -+ BUG_ON(!sb); > -+ return UNIONFS_SB(sb)->data[sbstart(sb)].sb; > -+} > -+ > -+static inline struct super_block *unionfs_lower_super_idx( > -+ const struct super_block *sb, > -+ int index) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ return UNIONFS_SB(sb)->data[index].sb; > -+} > -+ > -+static inline void unionfs_set_lower_super_idx(struct super_block *sb, > -+ int index, > -+ struct super_block *val) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ UNIONFS_SB(sb)->data[index].sb = val; > -+} > -+ > -+static inline void unionfs_set_lower_super(struct super_block *sb, > -+ struct super_block *val) > -+{ > -+ BUG_ON(!sb); > -+ UNIONFS_SB(sb)->data[sbstart(sb)].sb = val; > -+} > -+ > -+/* Branch count macros. */ > -+static inline int branch_count(const struct super_block *sb, int index) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ return atomic_read(&UNIONFS_SB(sb)->data[index].open_files); > -+} > -+ > -+static inline void set_branch_count(struct super_block *sb, int index, int val) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ atomic_set(&UNIONFS_SB(sb)->data[index].open_files, val); > -+} > -+ > -+static inline void branchget(struct super_block *sb, int index) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ atomic_inc(&UNIONFS_SB(sb)->data[index].open_files); > -+} > -+ > -+static inline void branchput(struct super_block *sb, int index) > -+{ > -+ BUG_ON(!sb || index < 0); > -+ atomic_dec(&UNIONFS_SB(sb)->data[index].open_files); > -+} > -+ > -+/* Dentry macros */ > -+static inline void unionfs_set_lower_dentry_idx(struct dentry *dent, int index, > -+ struct dentry *val) > -+{ > -+ BUG_ON(!dent || index < 0); > -+ UNIONFS_D(dent)->lower_paths[index].dentry = val; > -+} > -+ > -+static inline struct dentry *unionfs_lower_dentry_idx( > -+ const struct dentry *dent, > -+ int index) > -+{ > -+ BUG_ON(!dent || index < 0); > -+ return UNIONFS_D(dent)->lower_paths[index].dentry; > -+} > -+ > -+static inline struct dentry *unionfs_lower_dentry(const struct dentry *dent) > -+{ > -+ BUG_ON(!dent); > -+ return unionfs_lower_dentry_idx(dent, dbstart(dent)); > -+} > -+ > -+static inline void unionfs_set_lower_mnt_idx(struct dentry *dent, int index, > -+ struct vfsmount *mnt) > -+{ > -+ BUG_ON(!dent || index < 0); > -+ UNIONFS_D(dent)->lower_paths[index].mnt = mnt; > -+} > -+ > -+static inline struct vfsmount *unionfs_lower_mnt_idx( > -+ const struct dentry *dent, > -+ int index) > -+{ > -+ BUG_ON(!dent || index < 0); > -+ return UNIONFS_D(dent)->lower_paths[index].mnt; > -+} > -+ > -+static inline struct vfsmount *unionfs_lower_mnt(const struct dentry *dent) > -+{ > -+ BUG_ON(!dent); > -+ return unionfs_lower_mnt_idx(dent, dbstart(dent)); > -+} > -+ > -+/* Macros for locking a dentry. */ > -+enum unionfs_dentry_lock_class { > -+ UNIONFS_DMUTEX_NORMAL, > -+ UNIONFS_DMUTEX_ROOT, > -+ UNIONFS_DMUTEX_PARENT, > -+ UNIONFS_DMUTEX_CHILD, > -+ UNIONFS_DMUTEX_WHITEOUT, > -+ UNIONFS_DMUTEX_REVAL_PARENT, /* for file/dentry revalidate */ > -+ UNIONFS_DMUTEX_REVAL_CHILD, /* for file/dentry revalidate */ > -+}; > -+ > -+static inline void unionfs_lock_dentry(struct dentry *d, > -+ unsigned int subclass) > -+{ > -+ BUG_ON(!d); > -+ mutex_lock_nested(&UNIONFS_D(d)->lock, subclass); > -+} > -+ > -+static inline void unionfs_unlock_dentry(struct dentry *d) > -+{ > -+ BUG_ON(!d); > -+ mutex_unlock(&UNIONFS_D(d)->lock); > -+} > -+ > -+static inline struct dentry *unionfs_lock_parent(struct dentry *d, > -+ unsigned int subclass) > -+{ > -+ struct dentry *p; > -+ > -+ BUG_ON(!d); > -+ p = dget_parent(d); > -+ if (p != d) > -+ mutex_lock_nested(&UNIONFS_D(p)->lock, subclass); > -+ return p; > -+} > -+ > -+static inline void unionfs_unlock_parent(struct dentry *d, struct dentry *p) > -+{ > -+ BUG_ON(!d); > -+ BUG_ON(!p); > -+ if (p != d) { > -+ BUG_ON(!mutex_is_locked(&UNIONFS_D(p)->lock)); > -+ mutex_unlock(&UNIONFS_D(p)->lock); > -+ } > -+ dput(p); > -+} > -+ > -+static inline void verify_locked(struct dentry *d) > -+{ > -+ BUG_ON(!d); > -+ BUG_ON(!mutex_is_locked(&UNIONFS_D(d)->lock)); > -+} > -+ > -+/* macros to put lower objects */ > -+ > -+/* > -+ * iput lower inodes of an unionfs dentry, from bstart to bend. If > -+ * @free_lower is true, then also kfree the memory used to hold the lower > -+ * object pointers. > -+ */ > -+static inline void iput_lowers(struct inode *inode, > -+ int bstart, int bend, bool free_lower) > -+{ > -+ struct inode *lower_inode; > -+ int bindex; > -+ > -+ BUG_ON(!inode); > -+ BUG_ON(!UNIONFS_I(inode)); > -+ BUG_ON(bstart < 0); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (lower_inode) { > -+ unionfs_set_lower_inode_idx(inode, bindex, NULL); > -+ /* see Documentation/filesystems/unionfs/issues.txt */ > -+ lockdep_off(); > -+ iput(lower_inode); > -+ lockdep_on(); > -+ } > -+ } > -+ > -+ if (free_lower) { > -+ kfree(UNIONFS_I(inode)->lower_inodes); > -+ UNIONFS_I(inode)->lower_inodes = NULL; > -+ } > -+} > -+ > -+/* iput all lower inodes, and reset start/end branch indices to -1 */ > -+static inline void iput_lowers_all(struct inode *inode, bool free_lower) > -+{ > -+ int bstart, bend; > -+ > -+ BUG_ON(!inode); > -+ BUG_ON(!UNIONFS_I(inode)); > -+ bstart = ibstart(inode); > -+ bend = ibend(inode); > -+ BUG_ON(bstart < 0); > -+ > -+ iput_lowers(inode, bstart, bend, free_lower); > -+ ibstart(inode) = ibend(inode) = -1; > -+} > -+ > -+/* > -+ * dput/mntput all lower dentries and vfsmounts of an unionfs dentry, from > -+ * bstart to bend. If @free_lower is true, then also kfree the memory used > -+ * to hold the lower object pointers. > -+ * > -+ * XXX: implement using path_put VFS macros > -+ */ > -+static inline void path_put_lowers(struct dentry *dentry, > -+ int bstart, int bend, bool free_lower) > -+{ > -+ struct dentry *lower_dentry; > -+ struct vfsmount *lower_mnt; > -+ int bindex; > -+ > -+ BUG_ON(!dentry); > -+ BUG_ON(!UNIONFS_D(dentry)); > -+ BUG_ON(bstart < 0); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (lower_dentry) { > -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); > -+ dput(lower_dentry); > -+ } > -+ lower_mnt = unionfs_lower_mnt_idx(dentry, bindex); > -+ if (lower_mnt) { > -+ unionfs_set_lower_mnt_idx(dentry, bindex, NULL); > -+ mntput(lower_mnt); > -+ } > -+ } > -+ > -+ if (free_lower) { > -+ kfree(UNIONFS_D(dentry)->lower_paths); > -+ UNIONFS_D(dentry)->lower_paths = NULL; > -+ } > -+} > -+ > -+/* > -+ * dput/mntput all lower dentries and vfsmounts, and reset start/end branch > -+ * indices to -1. > -+ */ > -+static inline void path_put_lowers_all(struct dentry *dentry, bool free_lower) > -+{ > -+ int bstart, bend; > -+ > -+ BUG_ON(!dentry); > -+ BUG_ON(!UNIONFS_D(dentry)); > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ BUG_ON(bstart < 0); > -+ > -+ path_put_lowers(dentry, bstart, bend, free_lower); > -+ dbstart(dentry) = dbend(dentry) = -1; > -+} > -+ > -+#endif /* not _FANOUT_H */ > -diff --git a/fs/unionfs/file.c b/fs/unionfs/file.c > -new file mode 100644 > -index 0000000..416c52f > ---- /dev/null > -+++ b/fs/unionfs/file.c > -@@ -0,0 +1,382 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+static ssize_t unionfs_read(struct file *file, char __user *buf, > -+ size_t count, loff_t *ppos) > -+{ > -+ int err; > -+ struct file *lower_file; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, false); > -+ if (unlikely(err)) > -+ goto out; > -+ > -+ lower_file = unionfs_lower_file(file); > -+ err = vfs_read(lower_file, buf, count, ppos); > -+ /* update our inode atime upon a successful lower read */ > -+ if (err >= 0) { > -+ fsstack_copy_attr_atime(dentry->d_inode, > -+ lower_file->f_path.dentry->d_inode); > -+ unionfs_check_file(file); > -+ } > -+ > -+out: > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+static ssize_t unionfs_write(struct file *file, const char __user *buf, > -+ size_t count, loff_t *ppos) > -+{ > -+ int err = 0; > -+ struct file *lower_file; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, true); > -+ if (unlikely(err)) > -+ goto out; > -+ > -+ lower_file = unionfs_lower_file(file); > -+ err = vfs_write(lower_file, buf, count, ppos); > -+ /* update our inode times+sizes upon a successful lower write */ > -+ if (err >= 0) { > -+ fsstack_copy_inode_size(dentry->d_inode, > -+ lower_file->f_path.dentry->d_inode); > -+ fsstack_copy_attr_times(dentry->d_inode, > -+ lower_file->f_path.dentry->d_inode); > -+ UNIONFS_F(file)->wrote_to_file = true; /* for delayed copyup > */ > -+ unionfs_check_file(file); > -+ } > -+ > -+out: > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+static int unionfs_file_readdir(struct file *file, void *dirent, > -+ filldir_t filldir) > -+{ > -+ return -ENOTDIR; > -+} > -+ > -+static int unionfs_mmap(struct file *file, struct vm_area_struct *vma) > -+{ > -+ int err = 0; > -+ bool willwrite; > -+ struct file *lower_file; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ const struct vm_operations_struct *saved_vm_ops = NULL; > -+ > -+ /* > -+ * Since mm/memory.c:might_fault() (under PROVE_LOCKING) was > -+ * modified in 2.6.29-rc1 to call might_lock_read on mmap_sem, this > -+ * has been causing false positives in file system stacking layers. > -+ * In particular, our ->mmap is called after sys_mmap2 already holds > -+ * mmap_sem, then we lock our own mutexes; but earlier, it's > -+ * possible for lockdep to have locked our mutexes first, and then > -+ * we call a lower ->readdir which could call might_fault. The > -+ * different ordering of the locks is what lockdep complains about > -+ * -- unnecessarily. Therefore, we have no choice but to tell > -+ * lockdep to temporarily turn off lockdep here. Note: the comments > -+ * inside might_sleep also suggest that it would have been > -+ * nicer to only annotate paths that needs that might_lock_read. > -+ */ > -+ lockdep_off(); > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ /* This might be deferred to mmap's writepage */ > -+ willwrite = ((vma->vm_flags | VM_SHARED | VM_WRITE) == vma- > >vm_flags); > -+ err = unionfs_file_revalidate(file, parent, willwrite); > -+ if (unlikely(err)) > -+ goto out; > -+ unionfs_check_file(file); > -+ > -+ /* > -+ * File systems which do not implement ->writepage may use > -+ * generic_file_readonly_mmap as their ->mmap op. If you call > -+ * generic_file_readonly_mmap with VM_WRITE, you'd get an -EINVAL. > -+ * But we cannot call the lower ->mmap op, so we can't tell that > -+ * writeable mappings won't work. Therefore, our only choice is to > -+ * check if the lower file system supports the ->writepage, and if > -+ * not, return EINVAL (the same error that > -+ * generic_file_readonly_mmap returns in that case). > -+ */ > -+ lower_file = unionfs_lower_file(file); > -+ if (willwrite && !lower_file->f_mapping->a_ops->writepage) { > -+ err = -EINVAL; > -+ printk(KERN_ERR "unionfs: branch %d file system does not " > -+ "support writeable mmap\n", fbstart(file)); > -+ goto out; > -+ } > -+ > -+ /* > -+ * find and save lower vm_ops. > -+ * > -+ * XXX: the VFS should have a cleaner way of finding the lower vm_ops > -+ */ > -+ if (!UNIONFS_F(file)->lower_vm_ops) { > -+ err = lower_file->f_op->mmap(lower_file, vma); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: lower mmap failed %d\n", > err); > -+ goto out; > -+ } > -+ saved_vm_ops = vma->vm_ops; > -+ err = do_munmap(current->mm, vma->vm_start, > -+ vma->vm_end - vma->vm_start); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: do_munmap failed %d\n", > err); > -+ goto out; > -+ } > -+ } > -+ > -+ file->f_mapping->a_ops = &unionfs_dummy_aops; > -+ err = generic_file_mmap(file, vma); > -+ file->f_mapping->a_ops = &unionfs_aops; > -+ if (err) { > -+ printk(KERN_ERR "unionfs: generic_file_mmap failed %d\n", > err); > -+ goto out; > -+ } > -+ vma->vm_ops = &unionfs_vm_ops; > -+ if (!UNIONFS_F(file)->lower_vm_ops) > -+ UNIONFS_F(file)->lower_vm_ops = saved_vm_ops; > -+ > -+out: > -+ if (!err) { > -+ /* copyup could cause parent dir times to change */ > -+ unionfs_copy_attr_times(parent->d_inode); > -+ unionfs_check_file(file); > -+ } > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ lockdep_on(); > -+ return err; > -+} > -+ > -+int unionfs_fsync(struct file *file, int datasync) > -+{ > -+ int bindex, bstart, bend; > -+ struct file *lower_file; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *lower_dentry; > -+ struct dentry *parent; > -+ struct inode *lower_inode, *inode; > -+ int err = -EINVAL; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, true); > -+ if (unlikely(err)) > -+ goto out; > -+ unionfs_check_file(file); > -+ > -+ bstart = fbstart(file); > -+ bend = fbend(file); > -+ if (bstart < 0 || bend < 0) > -+ goto out; > -+ > -+ inode = dentry->d_inode; > -+ if (unlikely(!inode)) { > -+ printk(KERN_ERR > -+ "unionfs: null lower inode in unionfs_fsync\n"); > -+ goto out; > -+ } > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (!lower_inode || !lower_inode->i_fop->fsync) > -+ continue; > -+ lower_file = unionfs_lower_file_idx(file, bindex); > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ mutex_lock(&lower_inode->i_mutex); > -+ err = lower_inode->i_fop->fsync(lower_file, datasync); > -+ if (!err && bindex == bstart) > -+ fsstack_copy_attr_times(inode, lower_inode); > -+ mutex_unlock(&lower_inode->i_mutex); > -+ if (err) > -+ goto out; > -+ } > -+ > -+out: > -+ if (!err) > -+ unionfs_check_file(file); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+int unionfs_fasync(int fd, struct file *file, int flag) > -+{ > -+ int bindex, bstart, bend; > -+ struct file *lower_file; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ struct inode *lower_inode, *inode; > -+ int err = 0; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, true); > -+ if (unlikely(err)) > -+ goto out; > -+ unionfs_check_file(file); > -+ > -+ bstart = fbstart(file); > -+ bend = fbend(file); > -+ if (bstart < 0 || bend < 0) > -+ goto out; > -+ > -+ inode = dentry->d_inode; > -+ if (unlikely(!inode)) { > -+ printk(KERN_ERR > -+ "unionfs: null lower inode in unionfs_fasync\n"); > -+ goto out; > -+ } > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (!lower_inode || !lower_inode->i_fop->fasync) > -+ continue; > -+ lower_file = unionfs_lower_file_idx(file, bindex); > -+ mutex_lock(&lower_inode->i_mutex); > -+ err = lower_inode->i_fop->fasync(fd, lower_file, flag); > -+ if (!err && bindex == bstart) > -+ fsstack_copy_attr_times(inode, lower_inode); > -+ mutex_unlock(&lower_inode->i_mutex); > -+ if (err) > -+ goto out; > -+ } > -+ > -+out: > -+ if (!err) > -+ unionfs_check_file(file); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+static ssize_t unionfs_splice_read(struct file *file, loff_t *ppos, > -+ struct pipe_inode_info *pipe, size_t len, > -+ unsigned int flags) > -+{ > -+ ssize_t err; > -+ struct file *lower_file; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, false); > -+ if (unlikely(err)) > -+ goto out; > -+ > -+ lower_file = unionfs_lower_file(file); > -+ err = vfs_splice_to(lower_file, ppos, pipe, len, flags); > -+ /* update our inode atime upon a successful lower splice-read */ > -+ if (err >= 0) { > -+ fsstack_copy_attr_atime(dentry->d_inode, > -+ lower_file->f_path.dentry->d_inode); > -+ unionfs_check_file(file); > -+ } > -+ > -+out: > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+static ssize_t unionfs_splice_write(struct pipe_inode_info *pipe, > -+ struct file *file, loff_t *ppos, > -+ size_t len, unsigned int flags) > -+{ > -+ ssize_t err = 0; > -+ struct file *lower_file; > -+ struct dentry *dentry = file->f_path.dentry; > -+ struct dentry *parent; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_PARENT); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ err = unionfs_file_revalidate(file, parent, true); > -+ if (unlikely(err)) > -+ goto out; > -+ > -+ lower_file = unionfs_lower_file(file); > -+ err = vfs_splice_from(pipe, lower_file, ppos, len, flags); > -+ /* update our inode times+sizes upon a successful lower write */ > -+ if (err >= 0) { > -+ fsstack_copy_inode_size(dentry->d_inode, > -+ lower_file->f_path.dentry->d_inode); > -+ fsstack_copy_attr_times(dentry->d_inode, > -+ lower_file->f_path.dentry->d_inode); > -+ unionfs_check_file(file); > -+ } > -+ > -+out: > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+struct file_operations unionfs_main_fops = { > -+ .llseek = generic_file_llseek, > -+ .read = unionfs_read, > -+ .write = unionfs_write, > -+ .readdir = unionfs_file_readdir, > -+ .unlocked_ioctl = unionfs_ioctl, > -+#ifdef CONFIG_COMPAT > -+ .compat_ioctl = unionfs_ioctl, > -+#endif > -+ .mmap = unionfs_mmap, > -+ .open = unionfs_open, > -+ .flush = unionfs_flush, > -+ .release = unionfs_file_release, > -+ .fsync = unionfs_fsync, > -+ .fasync = unionfs_fasync, > -+ .splice_read = unionfs_splice_read, > -+ .splice_write = unionfs_splice_write, > -+}; > -diff --git a/fs/unionfs/inode.c b/fs/unionfs/inode.c > -new file mode 100644 > -index 0000000..b207c13 > ---- /dev/null > -+++ b/fs/unionfs/inode.c > -@@ -0,0 +1,1099 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * Find a writeable branch to create new object in. Checks all writeble > -+ * branches of the parent inode, from istart to iend order; if none are > -+ * suitable, also tries branch 0 (which may require a copyup). > -+ * > -+ * Return a lower_dentry we can use to create object in, or ERR_PTR. > -+ */ > -+static struct dentry *find_writeable_branch(struct inode *parent, > -+ struct dentry *dentry) > -+{ > -+ int err = -EINVAL; > -+ int bindex, istart, iend; > -+ struct dentry *lower_dentry = NULL; > -+ > -+ istart = ibstart(parent); > -+ iend = ibend(parent); > -+ if (istart < 0) > -+ goto out; > -+ > -+begin: > -+ for (bindex = istart; bindex <= iend; bindex++) { > -+ /* skip non-writeable branches */ > -+ err = is_robranch_super(dentry->d_sb, bindex); > -+ if (err) { > -+ err = -EROFS; > -+ continue; > -+ } > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) > -+ continue; > -+ /* > -+ * check for whiteouts in writeable branch, and remove them > -+ * if necessary. > -+ */ > -+ err = check_unlink_whiteout(dentry, lower_dentry, bindex); > -+ if (err > 0) /* ignore if whiteout found and removed */ > -+ err = 0; > -+ if (err) > -+ continue; > -+ /* if get here, we can write to the branch */ > -+ break; > -+ } > -+ /* > -+ * If istart wasn't already branch 0, and we got any error, then try > -+ * branch 0 (which may require copyup) > -+ */ > -+ if (err && istart > 0) { > -+ istart = iend = 0; > -+ goto begin; > -+ } > -+ > -+ /* > -+ * If we tried even branch 0, and still got an error, abort. But if > -+ * the error was an EROFS, then we should try to copyup. > -+ */ > -+ if (err && err != -EROFS) > -+ goto out; > -+ > -+ /* > -+ * If we get here, then check if copyup needed. If lower_dentry is > -+ * NULL, create the entire dentry directory structure in branch 0. > -+ */ > -+ if (!lower_dentry) { > -+ bindex = 0; > -+ lower_dentry = create_parents(parent, dentry, > -+ dentry->d_name.name, bindex); > -+ if (IS_ERR(lower_dentry)) { > -+ err = PTR_ERR(lower_dentry); > -+ goto out; > -+ } > -+ } > -+ err = 0; /* all's well */ > -+out: > -+ if (err) > -+ return ERR_PTR(err); > -+ return lower_dentry; > -+} > -+ > -+static int unionfs_create(struct inode *dir, struct dentry *dentry, > -+ int mode, struct nameidata *nd_unused) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry = NULL; > -+ struct dentry *lower_parent_dentry = NULL; > -+ struct dentry *parent; > -+ int valid = 0; > -+ struct nameidata lower_nd; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; /* same as what real_lookup does */ > -+ goto out; > -+ } > -+ > -+ lower_dentry = find_writeable_branch(dir, dentry); > -+ if (IS_ERR(lower_dentry)) { > -+ err = PTR_ERR(lower_dentry); > -+ goto out; > -+ } > -+ > -+ lower_parent_dentry = lock_parent(lower_dentry); > -+ if (IS_ERR(lower_parent_dentry)) { > -+ err = PTR_ERR(lower_parent_dentry); > -+ goto out_unlock; > -+ } > -+ > -+ err = init_lower_nd(&lower_nd, LOOKUP_CREATE); > -+ if (unlikely(err < 0)) > -+ goto out_unlock; > -+ err = vfs_create(lower_parent_dentry->d_inode, lower_dentry, mode, > -+ &lower_nd); > -+ release_lower_nd(&lower_nd, err); > -+ > -+ if (!err) { > -+ err = PTR_ERR(unionfs_interpose(dentry, dir->i_sb, 0)); > -+ if (!err) { > -+ unionfs_copy_attr_times(dir); > -+ fsstack_copy_inode_size(dir, > -+ lower_parent_dentry- > >d_inode); > -+ /* update no. of links on parent directory */ > -+ dir->i_nlink = unionfs_get_nlinks(dir); > -+ } > -+ } > -+ > -+out_unlock: > -+ unlock_dir(lower_parent_dentry); > -+out: > -+ if (!err) { > -+ unionfs_postcopyup_setmnt(dentry); > -+ unionfs_check_inode(dir); > -+ unionfs_check_dentry(dentry); > -+ } > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+/* > -+ * unionfs_lookup is the only special function which takes a dentry, yet we > -+ * do NOT want to call __unionfs_d_revalidate_chain because by definition, > -+ * we don't have a valid dentry here yet. > -+ */ > -+static struct dentry *unionfs_lookup(struct inode *dir, > -+ struct dentry *dentry, > -+ struct nameidata *nd_unused) > -+{ > -+ struct dentry *ret, *parent; > -+ int err = 0; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ > -+ /* > -+ * As long as we lock/dget the parent, then can skip validating the > -+ * parent now; we may have to rebuild this dentry on the next > -+ * ->d_revalidate, however. > -+ */ > -+ > -+ /* allocate dentry private data. We free it in ->d_release */ > -+ err = new_dentry_private_data(dentry, UNIONFS_DMUTEX_CHILD); > -+ if (unlikely(err)) { > -+ ret = ERR_PTR(err); > -+ goto out; > -+ } > -+ > -+ ret = unionfs_lookup_full(dentry, parent, INTERPOSE_LOOKUP); > -+ > -+ if (!IS_ERR(ret)) { > -+ if (ret) > -+ dentry = ret; > -+ /* lookup_full can return multiple positive dentries */ > -+ if (dentry->d_inode && !S_ISDIR(dentry->d_inode->i_mode)) { > -+ BUG_ON(dbstart(dentry) < 0); > -+ unionfs_postcopyup_release(dentry); > -+ } > -+ unionfs_copy_attr_times(dentry->d_inode); > -+ } > -+ > -+ unionfs_check_inode(dir); > -+ if (!IS_ERR(ret)) > -+ unionfs_check_dentry(dentry); > -+ unionfs_check_dentry(parent); > -+ unionfs_unlock_dentry(dentry); /* locked in new_dentry_private data > */ > -+ > -+out: > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ > -+ return ret; > -+} > -+ > -+static int unionfs_link(struct dentry *old_dentry, struct inode *dir, > -+ struct dentry *new_dentry) > -+{ > -+ int err = 0; > -+ struct dentry *lower_old_dentry = NULL; > -+ struct dentry *lower_new_dentry = NULL; > -+ struct dentry *lower_dir_dentry = NULL; > -+ struct dentry *old_parent, *new_parent; > -+ char *name = NULL; > -+ bool valid; > -+ > -+ unionfs_read_lock(old_dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ old_parent = dget_parent(old_dentry); > -+ new_parent = dget_parent(new_dentry); > -+ unionfs_double_lock_parents(old_parent, new_parent); > -+ unionfs_double_lock_dentry(old_dentry, new_dentry); > -+ > -+ valid = __unionfs_d_revalidate(old_dentry, old_parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ if (new_dentry->d_inode) { > -+ valid = __unionfs_d_revalidate(new_dentry, new_parent, > false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ } > -+ > -+ lower_new_dentry = unionfs_lower_dentry(new_dentry); > -+ > -+ /* check for a whiteout in new dentry branch, and delete it */ > -+ err = check_unlink_whiteout(new_dentry, lower_new_dentry, > -+ dbstart(new_dentry)); > -+ if (err > 0) { /* whiteout found and removed successfully */ > -+ lower_dir_dentry = dget_parent(lower_new_dentry); > -+ fsstack_copy_attr_times(dir, lower_dir_dentry->d_inode); > -+ dput(lower_dir_dentry); > -+ dir->i_nlink = unionfs_get_nlinks(dir); > -+ err = 0; > -+ } > -+ if (err) > -+ goto out; > -+ > -+ /* check if parent hierachy is needed, then link in same branch */ > -+ if (dbstart(old_dentry) != dbstart(new_dentry)) { > -+ lower_new_dentry = create_parents(dir, new_dentry, > -+ new_dentry->d_name.name, > -+ dbstart(old_dentry)); > -+ err = PTR_ERR(lower_new_dentry); > -+ if (IS_COPYUP_ERR(err)) > -+ goto docopyup; > -+ if (!lower_new_dentry || IS_ERR(lower_new_dentry)) > -+ goto out; > -+ } > -+ lower_new_dentry = unionfs_lower_dentry(new_dentry); > -+ lower_old_dentry = unionfs_lower_dentry(old_dentry); > -+ > -+ BUG_ON(dbstart(old_dentry) != dbstart(new_dentry)); > -+ lower_dir_dentry = lock_parent(lower_new_dentry); > -+ err = is_robranch(old_dentry); > -+ if (!err) { > -+ /* see Documentation/filesystems/unionfs/issues.txt */ > -+ lockdep_off(); > -+ err = vfs_link(lower_old_dentry, lower_dir_dentry->d_inode, > -+ lower_new_dentry); > -+ lockdep_on(); > -+ } > -+ unlock_dir(lower_dir_dentry); > -+ > -+docopyup: > -+ if (IS_COPYUP_ERR(err)) { > -+ int old_bstart = dbstart(old_dentry); > -+ int bindex; > -+ > -+ for (bindex = old_bstart - 1; bindex >= 0; bindex--) { > -+ err = copyup_dentry(old_parent->d_inode, > -+ old_dentry, old_bstart, > -+ bindex, old_dentry->d_name.name, > -+ old_dentry->d_name.len, NULL, > -+ i_size_read(old_dentry->d_inode)); > -+ if (err) > -+ continue; > -+ lower_new_dentry = > -+ create_parents(dir, new_dentry, > -+ new_dentry->d_name.name, > -+ bindex); > -+ lower_old_dentry = > unionfs_lower_dentry(old_dentry); > -+ lower_dir_dentry = lock_parent(lower_new_dentry); > -+ /* see Documentation/filesystems/unionfs/issues.txt */ > -+ lockdep_off(); > -+ /* do vfs_link */ > -+ err = vfs_link(lower_old_dentry, > -+ lower_dir_dentry->d_inode, > -+ lower_new_dentry); > -+ lockdep_on(); > -+ unlock_dir(lower_dir_dentry); > -+ goto check_link; > -+ } > -+ goto out; > -+ } > -+ > -+check_link: > -+ if (err || !lower_new_dentry->d_inode) > -+ goto out; > -+ > -+ /* Its a hard link, so use the same inode */ > -+ new_dentry->d_inode = igrab(old_dentry->d_inode); > -+ d_add(new_dentry, new_dentry->d_inode); > -+ unionfs_copy_attr_all(dir, lower_new_dentry->d_parent->d_inode); > -+ fsstack_copy_inode_size(dir, lower_new_dentry->d_parent- > >d_inode); > -+ > -+ /* propagate number of hard-links */ > -+ old_dentry->d_inode->i_nlink = unionfs_get_nlinks(old_dentry- > >d_inode); > -+ /* new dentry's ctime may have changed due to hard-link counts */ > -+ unionfs_copy_attr_times(new_dentry->d_inode); > -+ > -+out: > -+ if (!new_dentry->d_inode) > -+ d_drop(new_dentry); > -+ > -+ kfree(name); > -+ if (!err) > -+ unionfs_postcopyup_setmnt(new_dentry); > -+ > -+ unionfs_check_inode(dir); > -+ unionfs_check_dentry(new_dentry); > -+ unionfs_check_dentry(old_dentry); > -+ > -+ unionfs_double_unlock_dentry(old_dentry, new_dentry); > -+ unionfs_double_unlock_parents(old_parent, new_parent); > -+ dput(new_parent); > -+ dput(old_parent); > -+ unionfs_read_unlock(old_dentry->d_sb); > -+ > -+ return err; > -+} > -+ > -+static int unionfs_symlink(struct inode *dir, struct dentry *dentry, > -+ const char *symname) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry = NULL; > -+ struct dentry *wh_dentry = NULL; > -+ struct dentry *lower_parent_dentry = NULL; > -+ struct dentry *parent; > -+ char *name = NULL; > -+ int valid = 0; > -+ umode_t mode; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ /* > -+ * It's only a bug if this dentry was not negative and couldn't be > -+ * revalidated (shouldn't happen). > -+ */ > -+ BUG_ON(!valid && dentry->d_inode); > -+ > -+ lower_dentry = find_writeable_branch(dir, dentry); > -+ if (IS_ERR(lower_dentry)) { > -+ err = PTR_ERR(lower_dentry); > -+ goto out; > -+ } > -+ > -+ lower_parent_dentry = lock_parent(lower_dentry); > -+ if (IS_ERR(lower_parent_dentry)) { > -+ err = PTR_ERR(lower_parent_dentry); > -+ goto out_unlock; > -+ } > -+ > -+ mode = S_IALLUGO; > -+ err = vfs_symlink(lower_parent_dentry->d_inode, lower_dentry, > symname); > -+ if (!err) { > -+ err = PTR_ERR(unionfs_interpose(dentry, dir->i_sb, 0)); > -+ if (!err) { > -+ unionfs_copy_attr_times(dir); > -+ fsstack_copy_inode_size(dir, > -+ lower_parent_dentry- > >d_inode); > -+ /* update no. of links on parent directory */ > -+ dir->i_nlink = unionfs_get_nlinks(dir); > -+ } > -+ } > -+ > -+out_unlock: > -+ unlock_dir(lower_parent_dentry); > -+out: > -+ dput(wh_dentry); > -+ kfree(name); > -+ > -+ if (!err) { > -+ unionfs_postcopyup_setmnt(dentry); > -+ unionfs_check_inode(dir); > -+ unionfs_check_dentry(dentry); > -+ } > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+static int unionfs_mkdir(struct inode *dir, struct dentry *dentry, int mode) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry = NULL; > -+ struct dentry *lower_parent_dentry = NULL; > -+ struct dentry *parent; > -+ int bindex = 0, bstart; > -+ char *name = NULL; > -+ int valid; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; /* same as what real_lookup does */ > -+ goto out; > -+ } > -+ > -+ bstart = dbstart(dentry); > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ > -+ /* check for a whiteout in new dentry branch, and delete it */ > -+ err = check_unlink_whiteout(dentry, lower_dentry, bstart); > -+ if (err > 0) /* whiteout found and removed successfully */ > -+ err = 0; > -+ if (err) { > -+ /* exit if the error returned was NOT -EROFS */ > -+ if (!IS_COPYUP_ERR(err)) > -+ goto out; > -+ bstart--; > -+ } > -+ > -+ /* check if copyup's needed, and mkdir */ > -+ for (bindex = bstart; bindex >= 0; bindex--) { > -+ int i; > -+ int bend = dbend(dentry); > -+ > -+ if (is_robranch_super(dentry->d_sb, bindex)) > -+ continue; > -+ > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) { > -+ lower_dentry = create_parents(dir, dentry, > -+ dentry->d_name.name, > -+ bindex); > -+ if (!lower_dentry || IS_ERR(lower_dentry)) { > -+ printk(KERN_ERR "unionfs: lower dentry " > -+ " NULL for bindex = %d\n", bindex); > -+ continue; > -+ } > -+ } > -+ > -+ lower_parent_dentry = lock_parent(lower_dentry); > -+ > -+ if (IS_ERR(lower_parent_dentry)) { > -+ err = PTR_ERR(lower_parent_dentry); > -+ goto out; > -+ } > -+ > -+ err = vfs_mkdir(lower_parent_dentry->d_inode, > lower_dentry, > -+ mode); > -+ > -+ unlock_dir(lower_parent_dentry); > -+ > -+ /* did the mkdir succeed? */ > -+ if (err) > -+ break; > -+ > -+ for (i = bindex + 1; i <= bend; i++) { > -+ /* XXX: use path_put_lowers? */ > -+ if (unionfs_lower_dentry_idx(dentry, i)) { > -+ dput(unionfs_lower_dentry_idx(dentry, i)); > -+ unionfs_set_lower_dentry_idx(dentry, i, > NULL); > -+ } > -+ } > -+ dbend(dentry) = bindex; > -+ > -+ /* > -+ * Only INTERPOSE_LOOKUP can return a value other than 0 on > -+ * err. > -+ */ > -+ err = PTR_ERR(unionfs_interpose(dentry, dir->i_sb, 0)); > -+ if (!err) { > -+ unionfs_copy_attr_times(dir); > -+ fsstack_copy_inode_size(dir, > -+ lower_parent_dentry- > >d_inode); > -+ > -+ /* update number of links on parent directory */ > -+ dir->i_nlink = unionfs_get_nlinks(dir); > -+ } > -+ > -+ err = make_dir_opaque(dentry, dbstart(dentry)); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: mkdir: error creating " > -+ ".wh.__dir_opaque: %d\n", err); > -+ goto out; > -+ } > -+ > -+ /* we are done! */ > -+ break; > -+ } > -+ > -+out: > -+ if (!dentry->d_inode) > -+ d_drop(dentry); > -+ > -+ kfree(name); > -+ > -+ if (!err) { > -+ unionfs_copy_attr_times(dentry->d_inode); > -+ unionfs_postcopyup_setmnt(dentry); > -+ } > -+ unionfs_check_inode(dir); > -+ unionfs_check_dentry(dentry); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ > -+ return err; > -+} > -+ > -+static int unionfs_mknod(struct inode *dir, struct dentry *dentry, int mode, > -+ dev_t dev) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry = NULL; > -+ struct dentry *wh_dentry = NULL; > -+ struct dentry *lower_parent_dentry = NULL; > -+ struct dentry *parent; > -+ char *name = NULL; > -+ int valid = 0; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ /* > -+ * It's only a bug if this dentry was not negative and couldn't be > -+ * revalidated (shouldn't happen). > -+ */ > -+ BUG_ON(!valid && dentry->d_inode); > -+ > -+ lower_dentry = find_writeable_branch(dir, dentry); > -+ if (IS_ERR(lower_dentry)) { > -+ err = PTR_ERR(lower_dentry); > -+ goto out; > -+ } > -+ > -+ lower_parent_dentry = lock_parent(lower_dentry); > -+ if (IS_ERR(lower_parent_dentry)) { > -+ err = PTR_ERR(lower_parent_dentry); > -+ goto out_unlock; > -+ } > -+ > -+ err = vfs_mknod(lower_parent_dentry->d_inode, lower_dentry, > mode, dev); > -+ if (!err) { > -+ err = PTR_ERR(unionfs_interpose(dentry, dir->i_sb, 0)); > -+ if (!err) { > -+ unionfs_copy_attr_times(dir); > -+ fsstack_copy_inode_size(dir, > -+ lower_parent_dentry- > >d_inode); > -+ /* update no. of links on parent directory */ > -+ dir->i_nlink = unionfs_get_nlinks(dir); > -+ } > -+ } > -+ > -+out_unlock: > -+ unlock_dir(lower_parent_dentry); > -+out: > -+ dput(wh_dentry); > -+ kfree(name); > -+ > -+ if (!err) { > -+ unionfs_postcopyup_setmnt(dentry); > -+ unionfs_check_inode(dir); > -+ unionfs_check_dentry(dentry); > -+ } > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+/* requires sb, dentry, and parent to already be locked */ > -+static int __unionfs_readlink(struct dentry *dentry, char __user *buf, > -+ int bufsiz) > -+{ > -+ int err; > -+ struct dentry *lower_dentry; > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ > -+ if (!lower_dentry->d_inode->i_op || > -+ !lower_dentry->d_inode->i_op->readlink) { > -+ err = -EINVAL; > -+ goto out; > -+ } > -+ > -+ err = lower_dentry->d_inode->i_op->readlink(lower_dentry, > -+ buf, bufsiz); > -+ if (err >= 0) > -+ fsstack_copy_attr_atime(dentry->d_inode, > -+ lower_dentry->d_inode); > -+ > -+out: > -+ return err; > -+} > -+ > -+static int unionfs_readlink(struct dentry *dentry, char __user *buf, > -+ int bufsiz) > -+{ > -+ int err; > -+ struct dentry *parent; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ if (unlikely(!__unionfs_d_revalidate(dentry, parent, false))) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ err = __unionfs_readlink(dentry, buf, bufsiz); > -+ > -+out: > -+ unionfs_check_dentry(dentry); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ > -+ return err; > -+} > -+ > -+static void *unionfs_follow_link(struct dentry *dentry, struct nameidata *nd) > -+{ > -+ char *buf; > -+ int len = PAGE_SIZE, err; > -+ mm_segment_t old_fs; > -+ struct dentry *parent; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ /* This is freed by the put_link method assuming a successful call. */ > -+ buf = kmalloc(len, GFP_KERNEL); > -+ if (unlikely(!buf)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ /* read the symlink, and then we will follow it */ > -+ old_fs = get_fs(); > -+ set_fs(KERNEL_DS); > -+ err = __unionfs_readlink(dentry, buf, len); > -+ set_fs(old_fs); > -+ if (err < 0) { > -+ kfree(buf); > -+ buf = NULL; > -+ goto out; > -+ } > -+ buf[err] = 0; > -+ nd_set_link(nd, buf); > -+ err = 0; > -+ > -+out: > -+ if (err >= 0) { > -+ unionfs_check_nd(nd); > -+ unionfs_check_dentry(dentry); > -+ } > -+ > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ > -+ return ERR_PTR(err); > -+} > -+ > -+/* this @nd *IS* still used */ > -+static void unionfs_put_link(struct dentry *dentry, struct nameidata *nd, > -+ void *cookie) > -+{ > -+ struct dentry *parent; > -+ char *buf; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ if (unlikely(!__unionfs_d_revalidate(dentry, parent, false))) > -+ printk(KERN_ERR > -+ "unionfs: put_link failed to revalidate dentry\n"); > -+ > -+ unionfs_check_dentry(dentry); > -+#if 0 > -+ /* XXX: can't run this check b/c this fxn can receive a poisoned 'nd' PTR > */ > -+ unionfs_check_nd(nd); > -+#endif > -+ buf = nd_get_link(nd); > -+ if (!IS_ERR(buf)) > -+ kfree(buf); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+} > -+ > -+/* > -+ * This is a variant of fs/namei.c:permission() or inode_permission() which > -+ * skips over EROFS tests (because we perform copyup on EROFS). > -+ */ > -+static int __inode_permission(struct inode *inode, int mask, unsigned int > flags) > -+{ > -+ int retval; > -+ > -+ /* nobody gets write access to an immutable file */ > -+ if ((mask & MAY_WRITE) && IS_IMMUTABLE(inode)) > -+ return -EACCES; > -+ > -+ /* Ordinary permission routines do not understand MAY_APPEND. */ > -+ if (inode->i_op && inode->i_op->permission) { > -+ retval = inode->i_op->permission(inode, mask, flags); > -+ if (!retval) { > -+ /* > -+ * Exec permission on a regular file is denied if none > -+ * of the execute bits are set. > -+ * > -+ * This check should be done by the ->permission() > -+ * method. > -+ */ > -+ if ((mask & MAY_EXEC) && S_ISREG(inode->i_mode) > && > -+ !(inode->i_mode & S_IXUGO)) > -+ return -EACCES; > -+ } > -+ } else { > -+ retval = generic_permission(inode, mask, flags, NULL); > -+ } > -+ if (retval) > -+ return retval; > -+ > -+ return security_inode_permission(inode, > -+ mask & > (MAY_READ|MAY_WRITE|MAY_EXEC|MAY_APPEND)); > -+} > -+ > -+/* > -+ * Don't grab the superblock read-lock in unionfs_permission, which prevents > -+ * a deadlock with the branch-management "add branch" code (which > grabbed > -+ * the write lock). It is safe to not grab the read lock here, because even > -+ * with branch management taking place, there is no chance that > -+ * unionfs_permission, or anything it calls, will use stale branch > -+ * information. > -+ */ > -+static int unionfs_permission(struct inode *inode, int mask, unsigned int flags) > -+{ > -+ struct inode *lower_inode = NULL; > -+ int err = 0; > -+ int bindex, bstart, bend; > -+ int is_file; > -+ const int write_mask = (mask & MAY_WRITE) && !(mask & > MAY_READ); > -+ struct inode *inode_grabbed; > -+ struct dentry *dentry; > -+ > -+ if (flags & IPERM_FLAG_RCU) { > -+ err = -ECHILD; > -+ goto out_nograb; > -+ } > -+ > -+ dentry = d_find_alias(inode); > -+ if (dentry) > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ inode_grabbed = igrab(inode); > -+ is_file = !S_ISDIR(inode->i_mode); > -+ > -+ if (!UNIONFS_I(inode)->lower_inodes) { > -+ if (is_file) /* dirs can be unlinked but chdir'ed to */ > -+ err = -ESTALE; /* force revalidate */ > -+ goto out; > -+ } > -+ bstart = ibstart(inode); > -+ bend = ibend(inode); > -+ if (unlikely(bstart < 0 || bend < 0)) { > -+ /* > -+ * With branch-management, we can get a stale inode here. > -+ * If so, we return ESTALE back to link_path_walk, which > -+ * would discard the dcache entry and re-lookup the > -+ * dentry+inode. This should be equivalent to issuing > -+ * __unionfs_d_revalidate_chain on nd.dentry here. > -+ */ > -+ if (is_file) /* dirs can be unlinked but chdir'ed to */ > -+ err = -ESTALE; /* force revalidate */ > -+ goto out; > -+ } > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (!lower_inode) > -+ continue; > -+ > -+ /* > -+ * check the condition for D-F-D underlying files/directories, > -+ * we don't have to check for files, if we are checking for > -+ * directories. > -+ */ > -+ if (!is_file && !S_ISDIR(lower_inode->i_mode)) > -+ continue; > -+ > -+ /* > -+ * We check basic permissions, but we ignore any conditions > -+ * such as readonly file systems or branches marked as > -+ * readonly, because those conditions should lead to a > -+ * copyup taking place later on. However, if user never had > -+ * access to the file, then no copyup could ever take place. > -+ */ > -+ err = __inode_permission(lower_inode, mask, flags); > -+ if (err && err != -EACCES && err != EPERM && bindex > 0) { > -+ umode_t mode = lower_inode->i_mode; > -+ if ((is_robranch_super(inode->i_sb, bindex) || > -+ __is_rdonly(lower_inode)) && > -+ (S_ISREG(mode) || S_ISDIR(mode) || > S_ISLNK(mode))) > -+ err = 0; > -+ if (IS_COPYUP_ERR(err)) > -+ err = 0; > -+ } > -+ > -+ /* > -+ * NFS HACK: NFSv2/3 return EACCES on readonly-exported, > -+ * locally readonly-mounted file systems, instead of EROFS > -+ * like other file systems do. So we have no choice here > -+ * but to intercept this and ignore it for NFS branches > -+ * marked readonly. Specifically, we avoid using NFS's own > -+ * "broken" ->permission method, and rely on > -+ * generic_permission() to do basic checking for us. > -+ */ > -+ if (err && err == -EACCES && > -+ is_robranch_super(inode->i_sb, bindex) && > -+ lower_inode->i_sb->s_magic == NFS_SUPER_MAGIC) > -+ err = generic_permission(lower_inode, mask, flags, > NULL); > -+ > -+ /* > -+ * The permissions are an intersection of the overall directory > -+ * permissions, so we fail if one fails. > -+ */ > -+ if (err) > -+ goto out; > -+ > -+ /* only the leftmost file matters. */ > -+ if (is_file || write_mask) { > -+ if (is_file && write_mask) { > -+ err = get_write_access(lower_inode); > -+ if (!err) > -+ put_write_access(lower_inode); > -+ } > -+ break; > -+ } > -+ } > -+ /* sync times which may have changed (asynchronously) below */ > -+ unionfs_copy_attr_times(inode); > -+ > -+out: > -+ unionfs_check_inode(inode); > -+ if (dentry) { > -+ unionfs_unlock_dentry(dentry); > -+ dput(dentry); > -+ } > -+ iput(inode_grabbed); > -+out_nograb: > -+ return err; > -+} > -+ > -+static int unionfs_setattr(struct dentry *dentry, struct iattr *ia) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry; > -+ struct dentry *parent; > -+ struct inode *inode; > -+ struct inode *lower_inode; > -+ int bstart, bend, bindex; > -+ loff_t size; > -+ struct iattr lower_ia; > -+ > -+ /* check if user has permission to change inode */ > -+ err = inode_change_ok(dentry->d_inode, ia); > -+ if (err) > -+ goto out_err; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ if (unlikely(!__unionfs_d_revalidate(dentry, parent, false))) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ inode = dentry->d_inode; > -+ > -+ /* > -+ * mode change is for clearing setuid/setgid. Allow lower filesystem > -+ * to reinterpret it in its own way. > -+ */ > -+ if (ia->ia_valid & (ATTR_KILL_SUID | ATTR_KILL_SGID)) > -+ ia->ia_valid &= ~ATTR_MODE; > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ if (!lower_dentry) { /* should never happen after above revalidate */ > -+ err = -EINVAL; > -+ goto out; > -+ } > -+ > -+ /* > -+ * Get the lower inode directly from lower dentry, in case ibstart > -+ * is -1 (which happens when the file is open but unlinked. > -+ */ > -+ lower_inode = lower_dentry->d_inode; > -+ > -+ /* check if user has permission to change lower inode */ > -+ err = inode_change_ok(lower_inode, ia); > -+ if (err) > -+ goto out; > -+ > -+ /* copyup if the file is on a read only branch */ > -+ if (is_robranch_super(dentry->d_sb, bstart) > -+ || __is_rdonly(lower_inode)) { > -+ /* check if we have a branch to copy up to */ > -+ if (bstart <= 0) { > -+ err = -EACCES; > -+ goto out; > -+ } > -+ > -+ if (ia->ia_valid & ATTR_SIZE) > -+ size = ia->ia_size; > -+ else > -+ size = i_size_read(inode); > -+ /* copyup to next available branch */ > -+ for (bindex = bstart - 1; bindex >= 0; bindex--) { > -+ err = copyup_dentry(parent->d_inode, > -+ dentry, bstart, bindex, > -+ dentry->d_name.name, > -+ dentry->d_name.len, > -+ NULL, size); > -+ if (!err) > -+ break; > -+ } > -+ if (err) > -+ goto out; > -+ /* get updated lower_dentry/inode after copyup */ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ lower_inode = unionfs_lower_inode(inode); > -+ /* > -+ * check for whiteouts in writeable branch, and remove them > -+ * if necessary. > -+ */ > -+ if (lower_dentry) { > -+ err = check_unlink_whiteout(dentry, lower_dentry, > -+ bindex); > -+ if (err > 0) /* ignore if whiteout found and removed */ > -+ err = 0; > -+ } > -+ } > -+ > -+ /* > -+ * If shrinking, first truncate upper level to cancel writing dirty > -+ * pages beyond the new eof; and also if its' maxbytes is more > -+ * limiting (fail with -EFBIG before making any change to the lower > -+ * level). There is no need to vmtruncate the upper level > -+ * afterwards in the other cases: we fsstack_copy_inode_size from > -+ * the lower level. > -+ */ > -+ if (ia->ia_valid & ATTR_SIZE) { > -+ size = i_size_read(inode); > -+ if (ia->ia_size < size || (ia->ia_size > size && > -+ inode->i_sb->s_maxbytes < lower_inode->i_sb- > >s_maxbytes)) { > -+ err = vmtruncate(inode, ia->ia_size); > -+ if (err) > -+ goto out; > -+ } > -+ } > -+ > -+ /* notify the (possibly copied-up) lower inode */ > -+ /* > -+ * Note: we use lower_dentry->d_inode, because lower_inode may be > -+ * unlinked (no inode->i_sb and i_ino==0. This happens if someone > -+ * tries to open(), unlink(), then ftruncate() a file. > -+ */ > -+ /* prepare our own lower struct iattr (with our own lower file) */ > -+ memcpy(&lower_ia, ia, sizeof(lower_ia)); > -+ if (ia->ia_valid & ATTR_FILE) { > -+ lower_ia.ia_file = unionfs_lower_file(ia->ia_file); > -+ BUG_ON(!lower_ia.ia_file); // XXX? > -+ } > -+ > -+ mutex_lock(&lower_dentry->d_inode->i_mutex); > -+ err = notify_change(lower_dentry, &lower_ia); > -+ mutex_unlock(&lower_dentry->d_inode->i_mutex); > -+ if (err) > -+ goto out; > -+ > -+ /* get attributes from the first lower inode */ > -+ if (ibstart(inode) >= 0) > -+ unionfs_copy_attr_all(inode, lower_inode); > -+ /* > -+ * unionfs_copy_attr_all will copy the lower times to our inode if > -+ * the lower ones are newer (useful for cache coherency). However, > -+ * ->setattr is the only place in which we may have to copy the > -+ * lower inode times absolutely, to support utimes(2). > -+ */ > -+ if (ia->ia_valid & ATTR_MTIME_SET) > -+ inode->i_mtime = lower_inode->i_mtime; > -+ if (ia->ia_valid & ATTR_CTIME) > -+ inode->i_ctime = lower_inode->i_ctime; > -+ if (ia->ia_valid & ATTR_ATIME_SET) > -+ inode->i_atime = lower_inode->i_atime; > -+ fsstack_copy_inode_size(inode, lower_inode); > -+ > -+out: > -+ if (!err) > -+ unionfs_check_dentry(dentry); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+out_err: > -+ return err; > -+} > -+ > -+struct inode_operations unionfs_symlink_iops = { > -+ .readlink = unionfs_readlink, > -+ .permission = unionfs_permission, > -+ .follow_link = unionfs_follow_link, > -+ .setattr = unionfs_setattr, > -+ .put_link = unionfs_put_link, > -+}; > -+ > -+struct inode_operations unionfs_dir_iops = { > -+ .create = unionfs_create, > -+ .lookup = unionfs_lookup, > -+ .link = unionfs_link, > -+ .unlink = unionfs_unlink, > -+ .symlink = unionfs_symlink, > -+ .mkdir = unionfs_mkdir, > -+ .rmdir = unionfs_rmdir, > -+ .mknod = unionfs_mknod, > -+ .rename = unionfs_rename, > -+ .permission = unionfs_permission, > -+ .setattr = unionfs_setattr, > -+#ifdef CONFIG_UNION_FS_XATTR > -+ .setxattr = unionfs_setxattr, > -+ .getxattr = unionfs_getxattr, > -+ .removexattr = unionfs_removexattr, > -+ .listxattr = unionfs_listxattr, > -+#endif /* CONFIG_UNION_FS_XATTR */ > -+}; > -+ > -+struct inode_operations unionfs_main_iops = { > -+ .permission = unionfs_permission, > -+ .setattr = unionfs_setattr, > -+#ifdef CONFIG_UNION_FS_XATTR > -+ .setxattr = unionfs_setxattr, > -+ .getxattr = unionfs_getxattr, > -+ .removexattr = unionfs_removexattr, > -+ .listxattr = unionfs_listxattr, > -+#endif /* CONFIG_UNION_FS_XATTR */ > -+}; > -diff --git a/fs/unionfs/lookup.c b/fs/unionfs/lookup.c > -new file mode 100644 > -index 0000000..3cbde56 > ---- /dev/null > -+++ b/fs/unionfs/lookup.c > -@@ -0,0 +1,569 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * Lookup one path component @name relative to a <base,mnt> path pair. > -+ * Behaves nearly the same as lookup_one_len (i.e., return negative dentry > -+ * on ENOENT), but uses the @mnt passed, so it can cross bind mounts and > -+ * other lower mounts properly. If @new_mnt is non-null, will fill in the > -+ * new mnt there. Caller is responsible to dput/mntput/path_put returned > -+ * @dentry and @new_mnt. > -+ */ > -+struct dentry *__lookup_one(struct dentry *base, struct vfsmount *mnt, > -+ const char *name, struct vfsmount **new_mnt) > -+{ > -+ struct dentry *dentry = NULL; > -+ struct nameidata lower_nd; > -+ int err; > -+ > -+ /* we use flags=0 to get basic lookup */ > -+ err = vfs_path_lookup(base, mnt, name, 0, &lower_nd); > -+ > -+ switch (err) { > -+ case 0: /* no error */ > -+ dentry = lower_nd.path.dentry; > -+ if (new_mnt) > -+ *new_mnt = lower_nd.path.mnt; /* rc already inc'ed > */ > -+ break; > -+ case -ENOENT: > -+ /* > -+ * We don't consider ENOENT an error, and we want to return > -+ * a negative dentry (ala lookup_one_len). As we know > -+ * there was no inode for this name before (-ENOENT), then > -+ * it's safe to call lookup_one_len (which doesn't take a > -+ * vfsmount). > -+ */ > -+ dentry = lookup_lck_len(name, base, strlen(name)); > -+ if (new_mnt) > -+ *new_mnt = mntget(lower_nd.path.mnt); > -+ break; > -+ default: /* all other real errors */ > -+ dentry = ERR_PTR(err); > -+ break; > -+ } > -+ > -+ return dentry; > -+} > -+ > -+/* > -+ * This is a utility function that fills in a unionfs dentry. > -+ * Caller must lock this dentry with unionfs_lock_dentry. > -+ * > -+ * Returns: 0 (ok), or -ERRNO if an error occurred. > -+ * XXX: get rid of _partial_lookup and make callers call _lookup_full directly > -+ */ > -+int unionfs_partial_lookup(struct dentry *dentry, struct dentry *parent) > -+{ > -+ struct dentry *tmp; > -+ int err = -ENOSYS; > -+ > -+ tmp = unionfs_lookup_full(dentry, parent, INTERPOSE_PARTIAL); > -+ > -+ if (!tmp) { > -+ err = 0; > -+ goto out; > -+ } > -+ if (IS_ERR(tmp)) { > -+ err = PTR_ERR(tmp); > -+ goto out; > -+ } > -+ /* XXX: need to change the interface */ > -+ BUG_ON(tmp != dentry); > -+out: > -+ return err; > -+} > -+ > -+/* The dentry cache is just so we have properly sized dentries. */ > -+static struct kmem_cache *unionfs_dentry_cachep; > -+int unionfs_init_dentry_cache(void) > -+{ > -+ unionfs_dentry_cachep = > -+ kmem_cache_create("unionfs_dentry", > -+ sizeof(struct unionfs_dentry_info), > -+ 0, SLAB_RECLAIM_ACCOUNT, NULL); > -+ > -+ return (unionfs_dentry_cachep ? 0 : -ENOMEM); > -+} > -+ > -+void unionfs_destroy_dentry_cache(void) > -+{ > -+ if (unionfs_dentry_cachep) > -+ kmem_cache_destroy(unionfs_dentry_cachep); > -+} > -+ > -+void free_dentry_private_data(struct dentry *dentry) > -+{ > -+ if (!dentry || !dentry->d_fsdata) > -+ return; > -+ kfree(UNIONFS_D(dentry)->lower_paths); > -+ UNIONFS_D(dentry)->lower_paths = NULL; > -+ kmem_cache_free(unionfs_dentry_cachep, dentry->d_fsdata); > -+ dentry->d_fsdata = NULL; > -+} > -+ > -+static inline int __realloc_dentry_private_data(struct dentry *dentry) > -+{ > -+ struct unionfs_dentry_info *info = UNIONFS_D(dentry); > -+ void *p; > -+ int size; > -+ > -+ BUG_ON(!info); > -+ > -+ size = sizeof(struct path) * sbmax(dentry->d_sb); > -+ p = krealloc(info->lower_paths, size, GFP_ATOMIC); > -+ if (unlikely(!p)) > -+ return -ENOMEM; > -+ > -+ info->lower_paths = p; > -+ > -+ info->bstart = -1; > -+ info->bend = -1; > -+ info->bopaque = -1; > -+ info->bcount = sbmax(dentry->d_sb); > -+ atomic_set(&info->generation, > -+ atomic_read(&UNIONFS_SB(dentry->d_sb)- > >generation)); > -+ > -+ memset(info->lower_paths, 0, size); > -+ > -+ return 0; > -+} > -+ > -+/* UNIONFS_D(dentry)->lock must be locked */ > -+int realloc_dentry_private_data(struct dentry *dentry) > -+{ > -+ if (!__realloc_dentry_private_data(dentry)) > -+ return 0; > -+ > -+ kfree(UNIONFS_D(dentry)->lower_paths); > -+ free_dentry_private_data(dentry); > -+ return -ENOMEM; > -+} > -+ > -+/* allocate new dentry private data */ > -+int new_dentry_private_data(struct dentry *dentry, int subclass) > -+{ > -+ struct unionfs_dentry_info *info = UNIONFS_D(dentry); > -+ > -+ BUG_ON(info); > -+ > -+ info = kmem_cache_alloc(unionfs_dentry_cachep, GFP_ATOMIC); > -+ if (unlikely(!info)) > -+ return -ENOMEM; > -+ > -+ mutex_init(&info->lock); > -+ mutex_lock_nested(&info->lock, subclass); > -+ > -+ info->lower_paths = NULL; > -+ > -+ dentry->d_fsdata = info; > -+ > -+ if (!__realloc_dentry_private_data(dentry)) > -+ return 0; > -+ > -+ mutex_unlock(&info->lock); > -+ free_dentry_private_data(dentry); > -+ return -ENOMEM; > -+} > -+ > -+/* > -+ * scan through the lower dentry objects, and set bstart to reflect the > -+ * starting branch > -+ */ > -+void update_bstart(struct dentry *dentry) > -+{ > -+ int bindex; > -+ int bstart = dbstart(dentry); > -+ int bend = dbend(dentry); > -+ struct dentry *lower_dentry; > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) > -+ continue; > -+ if (lower_dentry->d_inode) { > -+ dbstart(dentry) = bindex; > -+ break; > -+ } > -+ dput(lower_dentry); > -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); > -+ } > -+} > -+ > -+ > -+/* > -+ * Initialize a nameidata structure (the intent part) we can pass to a lower > -+ * file system. Returns 0 on success or -error (only -ENOMEM possible). > -+ * Inside that nd structure, this function may also return an allocated > -+ * struct file (for open intents). The caller, when done with this nd, must > -+ * kfree the intent file (using release_lower_nd). > -+ * > -+ * XXX: this code, and the callers of this code, should be redone using > -+ * vfs_path_lookup() when (1) the nameidata structure is refactored into a > -+ * separate intent-structure, and (2) open_namei() is broken into a VFS-only > -+ * function and a method that other file systems can call. > -+ */ > -+int init_lower_nd(struct nameidata *nd, unsigned int flags) > -+{ > -+ int err = 0; > -+#ifdef ALLOC_LOWER_ND_FILE > -+ /* > -+ * XXX: one day we may need to have the lower return an open file > -+ * for us. It is not needed in 2.6.23-rc1 for nfs2/nfs3, but may > -+ * very well be needed for nfs4. > -+ */ > -+ struct file *file; > -+#endif /* ALLOC_LOWER_ND_FILE */ > -+ > -+ memset(nd, 0, sizeof(struct nameidata)); > -+ if (!flags) > -+ return err; > -+ > -+ switch (flags) { > -+ case LOOKUP_CREATE: > -+ nd->intent.open.flags |= O_CREAT; > -+ /* fall through: shared code for create/open cases */ > -+ case LOOKUP_OPEN: > -+ nd->flags = flags; > -+ nd->intent.open.flags |= (FMODE_READ | FMODE_WRITE); > -+#ifdef ALLOC_LOWER_ND_FILE > -+ file = kzalloc(sizeof(struct file), GFP_KERNEL); > -+ if (unlikely(!file)) { > -+ err = -ENOMEM; > -+ break; /* exit switch statement and thus return */ > -+ } > -+ nd->intent.open.file = file; > -+#endif /* ALLOC_LOWER_ND_FILE */ > -+ break; > -+ default: > -+ /* > -+ * We should never get here, for now. > -+ * We can add new cases here later on. > -+ */ > -+ pr_debug("unionfs: unknown nameidata flag 0x%x\n", flags); > -+ BUG(); > -+ break; > -+ } > -+ > -+ return err; > -+} > -+ > -+void release_lower_nd(struct nameidata *nd, int err) > -+{ > -+ if (!nd->intent.open.file) > -+ return; > -+ else if (!err) > -+ release_open_intent(nd); > -+#ifdef ALLOC_LOWER_ND_FILE > -+ kfree(nd->intent.open.file); > -+#endif /* ALLOC_LOWER_ND_FILE */ > -+} > -+ > -+/* > -+ * Main (and complex) driver function for Unionfs's lookup > -+ * > -+ * Returns: NULL (ok), ERR_PTR if an error occurred, or a non-null non-error > -+ * PTR if d_splice returned a different dentry. > -+ * > -+ * If lookupmode is INTERPOSE_PARTIAL/REVAL/REVAL_NEG, the passed > dentry's > -+ * inode info must be locked. If lookupmode is INTERPOSE_LOOKUP (i.e., a > -+ * newly looked-up dentry), then unionfs_lookup_backend will return a > locked > -+ * dentry's info, which the caller must unlock. > -+ */ > -+struct dentry *unionfs_lookup_full(struct dentry *dentry, > -+ struct dentry *parent, int lookupmode) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry = NULL; > -+ struct vfsmount *lower_mnt; > -+ struct vfsmount *lower_dir_mnt; > -+ struct dentry *wh_lower_dentry = NULL; > -+ struct dentry *lower_dir_dentry = NULL; > -+ struct dentry *d_interposed = NULL; > -+ int bindex, bstart, bend, bopaque; > -+ int opaque, num_positive = 0; > -+ const char *name; > -+ int namelen; > -+ int pos_start, pos_end; > -+ > -+ /* > -+ * We should already have a lock on this dentry in the case of a > -+ * partial lookup, or a revalidation. Otherwise it is returned from > -+ * new_dentry_private_data already locked. > -+ */ > -+ verify_locked(dentry); > -+ verify_locked(parent); > -+ > -+ /* must initialize dentry operations */ > -+ dentry->d_op = &unionfs_dops; > -+ > -+ /* We never partial lookup the root directory. */ > -+ if (IS_ROOT(dentry)) > -+ goto out; > -+ > -+ name = dentry->d_name.name; > -+ namelen = dentry->d_name.len; > -+ > -+ /* No dentries should get created for possible whiteout names. */ > -+ if (!is_validname(name)) { > -+ err = -EPERM; > -+ goto out_free; > -+ } > -+ > -+ /* Now start the actual lookup procedure. */ > -+ bstart = dbstart(parent); > -+ bend = dbend(parent); > -+ bopaque = dbopaque(parent); > -+ BUG_ON(bstart < 0); > -+ > -+ /* adjust bend to bopaque if needed */ > -+ if ((bopaque >= 0) && (bopaque < bend)) > -+ bend = bopaque; > -+ > -+ /* lookup all possible dentries */ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ lower_mnt = unionfs_lower_mnt_idx(dentry, bindex); > -+ > -+ /* skip if we already have a positive lower dentry */ > -+ if (lower_dentry) { > -+ if (dbstart(dentry) < 0) > -+ dbstart(dentry) = bindex; > -+ if (bindex > dbend(dentry)) > -+ dbend(dentry) = bindex; > -+ if (lower_dentry->d_inode) > -+ num_positive++; > -+ continue; > -+ } > -+ > -+ lower_dir_dentry = > -+ unionfs_lower_dentry_idx(parent, bindex); > -+ /* if the lower dentry's parent does not exist, skip this */ > -+ if (!lower_dir_dentry || !lower_dir_dentry->d_inode) > -+ continue; > -+ > -+ /* also skip it if the parent isn't a directory. */ > -+ if (!S_ISDIR(lower_dir_dentry->d_inode->i_mode)) > -+ continue; /* XXX: should be BUG_ON */ > -+ > -+ /* check for whiteouts: stop lookup if found */ > -+ wh_lower_dentry = lookup_whiteout(name, > lower_dir_dentry); > -+ if (IS_ERR(wh_lower_dentry)) { > -+ err = PTR_ERR(wh_lower_dentry); > -+ goto out_free; > -+ } > -+ if (wh_lower_dentry->d_inode) { > -+ dbend(dentry) = dbopaque(dentry) = bindex; > -+ if (dbstart(dentry) < 0) > -+ dbstart(dentry) = bindex; > -+ dput(wh_lower_dentry); > -+ break; > -+ } > -+ dput(wh_lower_dentry); > -+ > -+ /* Now do regular lookup; lookup @name */ > -+ lower_dir_mnt = unionfs_lower_mnt_idx(parent, bindex); > -+ lower_mnt = NULL; /* XXX: needed? */ > -+ > -+ lower_dentry = __lookup_one(lower_dir_dentry, > lower_dir_mnt, > -+ name, &lower_mnt); > -+ > -+ if (IS_ERR(lower_dentry)) { > -+ err = PTR_ERR(lower_dentry); > -+ goto out_free; > -+ } > -+ unionfs_set_lower_dentry_idx(dentry, bindex, lower_dentry); > -+ if (!lower_mnt) > -+ lower_mnt = unionfs_mntget(dentry->d_sb->s_root, > -+ bindex); > -+ unionfs_set_lower_mnt_idx(dentry, bindex, lower_mnt); > -+ > -+ /* adjust dbstart/end */ > -+ if (dbstart(dentry) < 0) > -+ dbstart(dentry) = bindex; > -+ if (bindex > dbend(dentry)) > -+ dbend(dentry) = bindex; > -+ /* > -+ * We always store the lower dentries above, and update > -+ * dbstart/dbend, even if the whole unionfs dentry is > -+ * negative (i.e., no lower inodes). > -+ */ > -+ if (!lower_dentry->d_inode) > -+ continue; > -+ num_positive++; > -+ > -+ /* > -+ * check if we just found an opaque directory, if so, stop > -+ * lookups here. > -+ */ > -+ if (!S_ISDIR(lower_dentry->d_inode->i_mode)) > -+ continue; > -+ opaque = is_opaque_dir(dentry, bindex); > -+ if (opaque < 0) { > -+ err = opaque; > -+ goto out_free; > -+ } else if (opaque) { > -+ dbend(dentry) = dbopaque(dentry) = bindex; > -+ break; > -+ } > -+ dbend(dentry) = bindex; > -+ > -+ /* update parent directory's atime with the bindex */ > -+ fsstack_copy_attr_atime(parent->d_inode, > -+ lower_dir_dentry->d_inode); > -+ } > -+ > -+ /* sanity checks, then decide if to process a negative dentry */ > -+ BUG_ON(dbstart(dentry) < 0 && dbend(dentry) >= 0); > -+ BUG_ON(dbstart(dentry) >= 0 && dbend(dentry) < 0); > -+ > -+ if (num_positive > 0) > -+ goto out_positive; > -+ > -+ /*** handle NEGATIVE dentries ***/ > -+ > -+ /* > -+ * If negative, keep only first lower negative dentry, to save on > -+ * memory. > -+ */ > -+ if (dbstart(dentry) < dbend(dentry)) { > -+ path_put_lowers(dentry, dbstart(dentry) + 1, > -+ dbend(dentry), false); > -+ dbend(dentry) = dbstart(dentry); > -+ } > -+ if (lookupmode == INTERPOSE_PARTIAL) > -+ goto out; > -+ if (lookupmode == INTERPOSE_LOOKUP) { > -+ /* > -+ * If all we found was a whiteout in the first available > -+ * branch, then create a negative dentry for a possibly new > -+ * file to be created. > -+ */ > -+ if (dbopaque(dentry) < 0) > -+ goto out; > -+ /* XXX: need to get mnt here */ > -+ bindex = dbstart(dentry); > -+ if (unionfs_lower_dentry_idx(dentry, bindex)) > -+ goto out; > -+ lower_dir_dentry = > -+ unionfs_lower_dentry_idx(parent, bindex); > -+ if (!lower_dir_dentry || !lower_dir_dentry->d_inode) > -+ goto out; > -+ if (!S_ISDIR(lower_dir_dentry->d_inode->i_mode)) > -+ goto out; /* XXX: should be BUG_ON */ > -+ /* XXX: do we need to cross bind mounts here? */ > -+ lower_dentry = lookup_lck_len(name, lower_dir_dentry, > namelen); > -+ if (IS_ERR(lower_dentry)) { > -+ err = PTR_ERR(lower_dentry); > -+ goto out; > -+ } > -+ /* XXX: need to mntget/mntput as needed too! */ > -+ unionfs_set_lower_dentry_idx(dentry, bindex, lower_dentry); > -+ /* XXX: wrong mnt for crossing bind mounts! */ > -+ lower_mnt = unionfs_mntget(dentry->d_sb->s_root, bindex); > -+ unionfs_set_lower_mnt_idx(dentry, bindex, lower_mnt); > -+ > -+ goto out; > -+ } > -+ > -+ /* if we're revalidating a positive dentry, don't make it negative */ > -+ if (lookupmode != INTERPOSE_REVAL) > -+ d_add(dentry, NULL); > -+ > -+ goto out; > -+ > -+out_positive: > -+ /*** handle POSITIVE dentries ***/ > -+ > -+ /* > -+ * This unionfs dentry is positive (at least one lower inode > -+ * exists), so scan entire dentry from beginning to end, and remove > -+ * any negative lower dentries, if any. Then, update dbstart/dbend > -+ * to reflect the start/end of positive dentries. > -+ */ > -+ pos_start = pos_end = -1; > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, > -+ bindex); > -+ if (lower_dentry && lower_dentry->d_inode) { > -+ if (pos_start < 0) > -+ pos_start = bindex; > -+ if (bindex > pos_end) > -+ pos_end = bindex; > -+ continue; > -+ } > -+ path_put_lowers(dentry, bindex, bindex, false); > -+ } > -+ if (pos_start >= 0) > -+ dbstart(dentry) = pos_start; > -+ if (pos_end >= 0) > -+ dbend(dentry) = pos_end; > -+ > -+ /* Partial lookups need to re-interpose, or throw away older negs. */ > -+ if (lookupmode == INTERPOSE_PARTIAL) { > -+ if (dentry->d_inode) { > -+ unionfs_reinterpose(dentry); > -+ goto out; > -+ } > -+ > -+ /* > -+ * This dentry was positive, so it is as if we had a > -+ * negative revalidation. > -+ */ > -+ lookupmode = INTERPOSE_REVAL_NEG; > -+ update_bstart(dentry); > -+ } > -+ > -+ /* > -+ * Interpose can return a dentry if d_splice returned a different > -+ * dentry. > -+ */ > -+ d_interposed = unionfs_interpose(dentry, dentry->d_sb, lookupmode); > -+ if (IS_ERR(d_interposed)) > -+ err = PTR_ERR(d_interposed); > -+ else if (d_interposed) > -+ dentry = d_interposed; > -+ > -+ if (!err) > -+ goto out; > -+ d_drop(dentry); > -+ > -+out_free: > -+ /* should dput/mntput all the underlying dentries on error condition */ > -+ if (dbstart(dentry) >= 0) > -+ path_put_lowers_all(dentry, false); > -+ /* free lower_paths unconditionally */ > -+ kfree(UNIONFS_D(dentry)->lower_paths); > -+ UNIONFS_D(dentry)->lower_paths = NULL; > -+ > -+out: > -+ if (dentry && UNIONFS_D(dentry)) { > -+ BUG_ON(dbstart(dentry) < 0 && dbend(dentry) >= 0); > -+ BUG_ON(dbstart(dentry) >= 0 && dbend(dentry) < 0); > -+ } > -+ if (d_interposed && UNIONFS_D(d_interposed)) { > -+ BUG_ON(dbstart(d_interposed) < 0 && dbend(d_interposed) > >= 0); > -+ BUG_ON(dbstart(d_interposed) >= 0 && dbend(d_interposed) > < 0); > -+ } > -+ > -+ if (!err && d_interposed) > -+ return d_interposed; > -+ return ERR_PTR(err); > -+} > -diff --git a/fs/unionfs/main.c b/fs/unionfs/main.c > -new file mode 100644 > -index 0000000..fa52f61 > ---- /dev/null > -+++ b/fs/unionfs/main.c > -@@ -0,0 +1,763 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+#include <linux/module.h> > -+#include <linux/moduleparam.h> > -+ > -+static void unionfs_fill_inode(struct dentry *dentry, > -+ struct inode *inode) > -+{ > -+ struct inode *lower_inode; > -+ struct dentry *lower_dentry; > -+ int bindex, bstart, bend; > -+ > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) { > -+ unionfs_set_lower_inode_idx(inode, bindex, NULL); > -+ continue; > -+ } > -+ > -+ /* Initialize the lower inode to the new lower inode. */ > -+ if (!lower_dentry->d_inode) > -+ continue; > -+ > -+ unionfs_set_lower_inode_idx(inode, bindex, > -+ igrab(lower_dentry->d_inode)); > -+ } > -+ > -+ ibstart(inode) = dbstart(dentry); > -+ ibend(inode) = dbend(dentry); > -+ > -+ /* Use attributes from the first branch. */ > -+ lower_inode = unionfs_lower_inode(inode); > -+ > -+ /* Use different set of inode ops for symlinks & directories */ > -+ if (S_ISLNK(lower_inode->i_mode)) > -+ inode->i_op = &unionfs_symlink_iops; > -+ else if (S_ISDIR(lower_inode->i_mode)) > -+ inode->i_op = &unionfs_dir_iops; > -+ > -+ /* Use different set of file ops for directories */ > -+ if (S_ISDIR(lower_inode->i_mode)) > -+ inode->i_fop = &unionfs_dir_fops; > -+ > -+ /* properly initialize special inodes */ > -+ if (S_ISBLK(lower_inode->i_mode) || S_ISCHR(lower_inode->i_mode) > || > -+ S_ISFIFO(lower_inode->i_mode) || S_ISSOCK(lower_inode- > >i_mode)) > -+ init_special_inode(inode, lower_inode->i_mode, > -+ lower_inode->i_rdev); > -+ > -+ /* all well, copy inode attributes */ > -+ unionfs_copy_attr_all(inode, lower_inode); > -+ fsstack_copy_inode_size(inode, lower_inode); > -+} > -+ > -+/* > -+ * Connect a unionfs inode dentry/inode with several lower ones. This is > -+ * the classic stackable file system "vnode interposition" action. > -+ * > -+ * @sb: unionfs's super_block > -+ */ > -+struct dentry *unionfs_interpose(struct dentry *dentry, struct super_block > *sb, > -+ int flag) > -+{ > -+ int err = 0; > -+ struct inode *inode; > -+ int need_fill_inode = 1; > -+ struct dentry *spliced = NULL; > -+ > -+ verify_locked(dentry); > -+ > -+ /* > -+ * We allocate our new inode below by calling unionfs_iget, > -+ * which will initialize some of the new inode's fields > -+ */ > -+ > -+ /* > -+ * On revalidate we've already got our own inode and just need > -+ * to fix it up. > -+ */ > -+ if (flag == INTERPOSE_REVAL) { > -+ inode = dentry->d_inode; > -+ UNIONFS_I(inode)->bstart = -1; > -+ UNIONFS_I(inode)->bend = -1; > -+ atomic_set(&UNIONFS_I(inode)->generation, > -+ atomic_read(&UNIONFS_SB(sb)->generation)); > -+ > -+ UNIONFS_I(inode)->lower_inodes = > -+ kcalloc(sbmax(sb), sizeof(struct inode *), > GFP_KERNEL); > -+ if (unlikely(!UNIONFS_I(inode)->lower_inodes)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ } else { > -+ /* get unique inode number for unionfs */ > -+ inode = unionfs_iget(sb, iunique(sb, UNIONFS_ROOT_INO)); > -+ if (IS_ERR(inode)) { > -+ err = PTR_ERR(inode); > -+ goto out; > -+ } > -+ if (atomic_read(&inode->i_count) > 1) > -+ goto skip; > -+ } > -+ > -+ need_fill_inode = 0; > -+ unionfs_fill_inode(dentry, inode); > -+ > -+skip: > -+ /* only (our) lookup wants to do a d_add */ > -+ switch (flag) { > -+ case INTERPOSE_DEFAULT: > -+ /* for operations which create new inodes */ > -+ d_add(dentry, inode); > -+ break; > -+ case INTERPOSE_REVAL_NEG: > -+ d_instantiate(dentry, inode); > -+ break; > -+ case INTERPOSE_LOOKUP: > -+ spliced = d_splice_alias(inode, dentry); > -+ if (spliced && spliced != dentry) { > -+ /* > -+ * d_splice can return a dentry if it was > -+ * disconnected and had to be moved. We must ensure > -+ * that the private data of the new dentry is > -+ * correct and that the inode info was filled > -+ * properly. Finally we must return this new > -+ * dentry. > -+ */ > -+ spliced->d_op = &unionfs_dops; > -+ spliced->d_fsdata = dentry->d_fsdata; > -+ dentry->d_fsdata = NULL; > -+ dentry = spliced; > -+ if (need_fill_inode) { > -+ need_fill_inode = 0; > -+ unionfs_fill_inode(dentry, inode); > -+ } > -+ goto out_spliced; > -+ } else if (!spliced) { > -+ if (need_fill_inode) { > -+ need_fill_inode = 0; > -+ unionfs_fill_inode(dentry, inode); > -+ goto out_spliced; > -+ } > -+ } > -+ break; > -+ case INTERPOSE_REVAL: > -+ /* Do nothing. */ > -+ break; > -+ default: > -+ printk(KERN_CRIT "unionfs: invalid interpose flag passed!\n"); > -+ BUG(); > -+ } > -+ goto out; > -+ > -+out_spliced: > -+ if (!err) > -+ return spliced; > -+out: > -+ return ERR_PTR(err); > -+} > -+ > -+/* like interpose above, but for an already existing dentry */ > -+void unionfs_reinterpose(struct dentry *dentry) > -+{ > -+ struct dentry *lower_dentry; > -+ struct inode *inode; > -+ int bindex, bstart, bend; > -+ > -+ verify_locked(dentry); > -+ > -+ /* This is pre-allocated inode */ > -+ inode = dentry->d_inode; > -+ > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry) > -+ continue; > -+ > -+ if (!lower_dentry->d_inode) > -+ continue; > -+ if (unionfs_lower_inode_idx(inode, bindex)) > -+ continue; > -+ unionfs_set_lower_inode_idx(inode, bindex, > -+ igrab(lower_dentry->d_inode)); > -+ } > -+ ibstart(inode) = dbstart(dentry); > -+ ibend(inode) = dbend(dentry); > -+} > -+ > -+/* > -+ * make sure the branch we just looked up (nd) makes sense: > -+ * > -+ * 1) we're not trying to stack unionfs on top of unionfs > -+ * 2) it exists > -+ * 3) is a directory > -+ */ > -+int check_branch(const struct path *path) > -+{ > -+ /* XXX: remove in ODF code -- stacking unions allowed there */ > -+ if (!strcmp(path->dentry->d_sb->s_type->name, UNIONFS_NAME)) > -+ return -EINVAL; > -+ if (!path->dentry->d_inode) > -+ return -ENOENT; > -+ if (!S_ISDIR(path->dentry->d_inode->i_mode)) > -+ return -ENOTDIR; > -+ return 0; > -+} > -+ > -+/* checks if two lower_dentries have overlapping branches */ > -+static int is_branch_overlap(struct dentry *dent1, struct dentry *dent2) > -+{ > -+ struct dentry *dent = NULL; > -+ > -+ dent = dent1; > -+ while ((dent != dent2) && (dent->d_parent != dent)) > -+ dent = dent->d_parent; > -+ > -+ if (dent == dent2) > -+ return 1; > -+ > -+ dent = dent2; > -+ while ((dent != dent1) && (dent->d_parent != dent)) > -+ dent = dent->d_parent; > -+ > -+ return (dent == dent1); > -+} > -+ > -+/* > -+ * Parse "ro" or "rw" options, but default to "rw" if no mode options was > -+ * specified. Fill the mode bits in @perms. If encounter an unknown > -+ * string, return -EINVAL. Otherwise return 0. > -+ */ > -+int parse_branch_mode(const char *name, int *perms) > -+{ > -+ if (!name || !strcmp(name, "rw")) { > -+ *perms = MAY_READ | MAY_WRITE; > -+ return 0; > -+ } > -+ if (!strcmp(name, "ro")) { > -+ *perms = MAY_READ; > -+ return 0; > -+ } > -+ return -EINVAL; > -+} > -+ > -+/* > -+ * parse the dirs= mount argument > -+ * > -+ * We don't need to lock the superblock private data's rwsem, as we get > -+ * called only by unionfs_read_super - it is still a long time before anyone > -+ * can even get a reference to us. > -+ */ > -+static int parse_dirs_option(struct super_block *sb, struct > unionfs_dentry_info > -+ *lower_root_info, char *options) > -+{ > -+ struct path path; > -+ char *name; > -+ int err = 0; > -+ int branches = 1; > -+ int bindex = 0; > -+ int i = 0; > -+ int j = 0; > -+ struct dentry *dent1; > -+ struct dentry *dent2; > -+ > -+ if (options[0] == '\0') { > -+ printk(KERN_ERR "unionfs: no branches specified\n"); > -+ err = -EINVAL; > -+ goto out_return; > -+ } > -+ > -+ /* > -+ * Each colon means we have a separator, this is really just a rough > -+ * guess, since strsep will handle empty fields for us. > -+ */ > -+ for (i = 0; options[i]; i++) > -+ if (options[i] == ':') > -+ branches++; > -+ > -+ /* allocate space for underlying pointers to lower dentry */ > -+ UNIONFS_SB(sb)->data = > -+ kcalloc(branches, sizeof(struct unionfs_data), GFP_KERNEL); > -+ if (unlikely(!UNIONFS_SB(sb)->data)) { > -+ err = -ENOMEM; > -+ goto out_return; > -+ } > -+ > -+ lower_root_info->lower_paths = > -+ kcalloc(branches, sizeof(struct path), GFP_KERNEL); > -+ if (unlikely(!lower_root_info->lower_paths)) { > -+ err = -ENOMEM; > -+ /* free the underlying pointer array */ > -+ kfree(UNIONFS_SB(sb)->data); > -+ UNIONFS_SB(sb)->data = NULL; > -+ goto out_return; > -+ } > -+ > -+ /* now parsing a string such as "b1:b2=rw:b3=ro:b4" */ > -+ branches = 0; > -+ while ((name = strsep(&options, ":")) != NULL) { > -+ int perms; > -+ char *mode = strchr(name, '='); > -+ > -+ if (!name) > -+ continue; > -+ if (!*name) { /* bad use of ':' (extra colons) */ > -+ err = -EINVAL; > -+ goto out; > -+ } > -+ > -+ branches++; > -+ > -+ /* strip off '=' if any */ > -+ if (mode) > -+ *mode++ = '\0'; > -+ > -+ err = parse_branch_mode(mode, &perms); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: invalid mode \"%s\" for " > -+ "branch %d\n", mode, bindex); > -+ goto out; > -+ } > -+ /* ensure that leftmost branch is writeable */ > -+ if (!bindex && !(perms & MAY_WRITE)) { > -+ printk(KERN_ERR "unionfs: leftmost branch cannot be " > -+ "read-only (use \"-o ro\" to create a " > -+ "read-only union)\n"); > -+ err = -EINVAL; > -+ goto out; > -+ } > -+ > -+ err = kern_path(name, LOOKUP_FOLLOW, &path); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: error accessing " > -+ "lower directory '%s' (error %d)\n", > -+ name, err); > -+ goto out; > -+ } > -+ > -+ err = check_branch(&path); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: lower directory " > -+ "'%s' is not a valid branch\n", name); > -+ path_put(&path); > -+ goto out; > -+ } > -+ > -+ lower_root_info->lower_paths[bindex].dentry = path.dentry; > -+ lower_root_info->lower_paths[bindex].mnt = path.mnt; > -+ > -+ set_branchperms(sb, bindex, perms); > -+ set_branch_count(sb, bindex, 0); > -+ new_branch_id(sb, bindex); > -+ > -+ if (lower_root_info->bstart < 0) > -+ lower_root_info->bstart = bindex; > -+ lower_root_info->bend = bindex; > -+ bindex++; > -+ } > -+ > -+ if (branches == 0) { > -+ printk(KERN_ERR "unionfs: no branches specified\n"); > -+ err = -EINVAL; > -+ goto out; > -+ } > -+ > -+ BUG_ON(branches != (lower_root_info->bend + 1)); > -+ > -+ /* > -+ * Ensure that no overlaps exist in the branches. > -+ * > -+ * This test is required because the Linux kernel has no support > -+ * currently for ensuring coherency between stackable layers and > -+ * branches. If we were to allow overlapping branches, it would be > -+ * possible, for example, to delete a file via one branch, which > -+ * would not be reflected in another branch. Such incoherency could > -+ * lead to inconsistencies and even kernel oopses. Rather than > -+ * implement hacks to work around some of these cache-coherency > -+ * problems, we prevent branch overlapping, for now. A complete > -+ * solution will involve proper kernel/VFS support for cache > -+ * coherency, at which time we could safely remove this > -+ * branch-overlapping test. > -+ */ > -+ for (i = 0; i < branches; i++) { > -+ dent1 = lower_root_info->lower_paths[i].dentry; > -+ for (j = i + 1; j < branches; j++) { > -+ dent2 = lower_root_info->lower_paths[j].dentry; > -+ if (is_branch_overlap(dent1, dent2)) { > -+ printk(KERN_ERR "unionfs: branches %d and " > -+ "%d overlap\n", i, j); > -+ err = -EINVAL; > -+ goto out; > -+ } > -+ } > -+ } > -+ > -+out: > -+ if (err) { > -+ for (i = 0; i < branches; i++) > -+ path_put(&lower_root_info->lower_paths[i]); > -+ > -+ kfree(lower_root_info->lower_paths); > -+ kfree(UNIONFS_SB(sb)->data); > -+ > -+ /* > -+ * MUST clear the pointers to prevent potential double free if > -+ * the caller dies later on > -+ */ > -+ lower_root_info->lower_paths = NULL; > -+ UNIONFS_SB(sb)->data = NULL; > -+ } > -+out_return: > -+ return err; > -+} > -+ > -+/* > -+ * Parse mount options. See the manual page for usage instructions. > -+ * > -+ * Returns the dentry object of the lower-level (lower) directory; > -+ * We want to mount our stackable file system on top of that lower directory. > -+ */ > -+static struct unionfs_dentry_info *unionfs_parse_options( > -+ struct super_block *sb, > -+ char *options) > -+{ > -+ struct unionfs_dentry_info *lower_root_info; > -+ char *optname; > -+ int err = 0; > -+ int bindex; > -+ int dirsfound = 0; > -+ > -+ /* allocate private data area */ > -+ err = -ENOMEM; > -+ lower_root_info = > -+ kzalloc(sizeof(struct unionfs_dentry_info), GFP_KERNEL); > -+ if (unlikely(!lower_root_info)) > -+ goto out_error; > -+ lower_root_info->bstart = -1; > -+ lower_root_info->bend = -1; > -+ lower_root_info->bopaque = -1; > -+ > -+ while ((optname = strsep(&options, ",")) != NULL) { > -+ char *optarg; > -+ > -+ if (!optname || !*optname) > -+ continue; > -+ > -+ optarg = strchr(optname, '='); > -+ if (optarg) > -+ *optarg++ = '\0'; > -+ > -+ /* > -+ * All of our options take an argument now. Insert ones that > -+ * don't, above this check. > -+ */ > -+ if (!optarg) { > -+ printk(KERN_ERR "unionfs: %s requires an > argument\n", > -+ optname); > -+ err = -EINVAL; > -+ goto out_error; > -+ } > -+ > -+ if (!strcmp("dirs", optname)) { > -+ if (++dirsfound > 1) { > -+ printk(KERN_ERR > -+ "unionfs: multiple dirs specified\n"); > -+ err = -EINVAL; > -+ goto out_error; > -+ } > -+ err = parse_dirs_option(sb, lower_root_info, optarg); > -+ if (err) > -+ goto out_error; > -+ continue; > -+ } > -+ > -+ err = -EINVAL; > -+ printk(KERN_ERR > -+ "unionfs: unrecognized option '%s'\n", optname); > -+ goto out_error; > -+ } > -+ if (dirsfound != 1) { > -+ printk(KERN_ERR "unionfs: dirs option required\n"); > -+ err = -EINVAL; > -+ goto out_error; > -+ } > -+ goto out; > -+ > -+out_error: > -+ if (lower_root_info && lower_root_info->lower_paths) { > -+ for (bindex = lower_root_info->bstart; > -+ bindex >= 0 && bindex <= lower_root_info->bend; > -+ bindex++) > -+ path_put(&lower_root_info->lower_paths[bindex]); > -+ } > -+ > -+ kfree(lower_root_info->lower_paths); > -+ kfree(lower_root_info); > -+ > -+ kfree(UNIONFS_SB(sb)->data); > -+ UNIONFS_SB(sb)->data = NULL; > -+ > -+ lower_root_info = ERR_PTR(err); > -+out: > -+ return lower_root_info; > -+} > -+ > -+/* > -+ * our custom d_alloc_root work-alike > -+ * > -+ * we can't use d_alloc_root if we want to use our own interpose function > -+ * unchanged, so we simply call our own "fake" d_alloc_root > -+ */ > -+static struct dentry *unionfs_d_alloc_root(struct super_block *sb) > -+{ > -+ struct dentry *ret = NULL; > -+ > -+ if (sb) { > -+ static const struct qstr name = { > -+ .name = "/", > -+ .len = 1 > -+ }; > -+ > -+ ret = d_alloc(NULL, &name); > -+ if (likely(ret)) { > -+ ret->d_op = &unionfs_dops; > -+ ret->d_sb = sb; > -+ ret->d_parent = ret; > -+ } > -+ } > -+ return ret; > -+} > -+ > -+/* > -+ * There is no need to lock the unionfs_super_info's rwsem as there is no > -+ * way anyone can have a reference to the superblock at this point in time. > -+ */ > -+static int unionfs_read_super(struct super_block *sb, void *raw_data, > -+ int silent) > -+{ > -+ int err = 0; > -+ struct unionfs_dentry_info *lower_root_info = NULL; > -+ int bindex, bstart, bend; > -+ > -+ if (!raw_data) { > -+ printk(KERN_ERR > -+ "unionfs: read_super: missing data argument\n"); > -+ err = -EINVAL; > -+ goto out; > -+ } > -+ > -+ /* Allocate superblock private data */ > -+ sb->s_fs_info = kzalloc(sizeof(struct unionfs_sb_info), GFP_KERNEL); > -+ if (unlikely(!UNIONFS_SB(sb))) { > -+ printk(KERN_CRIT "unionfs: read_super: out of memory\n"); > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ UNIONFS_SB(sb)->bend = -1; > -+ atomic_set(&UNIONFS_SB(sb)->generation, 1); > -+ init_rwsem(&UNIONFS_SB(sb)->rwsem); > -+ UNIONFS_SB(sb)->high_branch_id = -1; /* -1 == invalid branch ID */ > -+ > -+ lower_root_info = unionfs_parse_options(sb, raw_data); > -+ if (IS_ERR(lower_root_info)) { > -+ printk(KERN_ERR > -+ "unionfs: read_super: error while parsing options " > -+ "(err = %ld)\n", PTR_ERR(lower_root_info)); > -+ err = PTR_ERR(lower_root_info); > -+ lower_root_info = NULL; > -+ goto out_free; > -+ } > -+ if (lower_root_info->bstart == -1) { > -+ err = -ENOENT; > -+ goto out_free; > -+ } > -+ > -+ /* set the lower superblock field of upper superblock */ > -+ bstart = lower_root_info->bstart; > -+ BUG_ON(bstart != 0); > -+ sbend(sb) = bend = lower_root_info->bend; > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ struct dentry *d = lower_root_info- > >lower_paths[bindex].dentry; > -+ atomic_inc(&d->d_sb->s_active); > -+ unionfs_set_lower_super_idx(sb, bindex, d->d_sb); > -+ } > -+ > -+ /* max Bytes is the maximum bytes from highest priority branch */ > -+ sb->s_maxbytes = unionfs_lower_super_idx(sb, 0)->s_maxbytes; > -+ > -+ /* > -+ * Our c/m/atime granularity is 1 ns because we may stack on file > -+ * systems whose granularity is as good. This is important for our > -+ * time-based cache coherency. > -+ */ > -+ sb->s_time_gran = 1; > -+ > -+ sb->s_op = &unionfs_sops; > -+ > -+ /* See comment next to the definition of unionfs_d_alloc_root */ > -+ sb->s_root = unionfs_d_alloc_root(sb); > -+ if (unlikely(!sb->s_root)) { > -+ err = -ENOMEM; > -+ goto out_dput; > -+ } > -+ > -+ /* link the upper and lower dentries */ > -+ sb->s_root->d_fsdata = NULL; > -+ err = new_dentry_private_data(sb->s_root, > UNIONFS_DMUTEX_ROOT); > -+ if (unlikely(err)) > -+ goto out_freedpd; > -+ > -+ /* Set the lower dentries for s_root */ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ struct dentry *d; > -+ struct vfsmount *m; > -+ > -+ d = lower_root_info->lower_paths[bindex].dentry; > -+ m = lower_root_info->lower_paths[bindex].mnt; > -+ > -+ unionfs_set_lower_dentry_idx(sb->s_root, bindex, d); > -+ unionfs_set_lower_mnt_idx(sb->s_root, bindex, m); > -+ } > -+ dbstart(sb->s_root) = bstart; > -+ dbend(sb->s_root) = bend; > -+ > -+ /* Set the generation number to one, since this is for the mount. */ > -+ atomic_set(&UNIONFS_D(sb->s_root)->generation, 1); > -+ > -+ /* > -+ * Call interpose to create the upper level inode. Only > -+ * INTERPOSE_LOOKUP can return a value other than 0 on err. > -+ */ > -+ err = PTR_ERR(unionfs_interpose(sb->s_root, sb, 0)); > -+ unionfs_unlock_dentry(sb->s_root); > -+ if (!err) > -+ goto out; > -+ /* else fall through */ > -+ > -+out_freedpd: > -+ if (UNIONFS_D(sb->s_root)) { > -+ kfree(UNIONFS_D(sb->s_root)->lower_paths); > -+ free_dentry_private_data(sb->s_root); > -+ } > -+ dput(sb->s_root); > -+ > -+out_dput: > -+ if (lower_root_info && !IS_ERR(lower_root_info)) { > -+ for (bindex = lower_root_info->bstart; > -+ bindex <= lower_root_info->bend; bindex++) { > -+ struct dentry *d; > -+ d = lower_root_info->lower_paths[bindex].dentry; > -+ /* drop refs we took earlier */ > -+ atomic_dec(&d->d_sb->s_active); > -+ path_put(&lower_root_info->lower_paths[bindex]); > -+ } > -+ kfree(lower_root_info->lower_paths); > -+ kfree(lower_root_info); > -+ lower_root_info = NULL; > -+ } > -+ > -+out_free: > -+ kfree(UNIONFS_SB(sb)->data); > -+ kfree(UNIONFS_SB(sb)); > -+ sb->s_fs_info = NULL; > -+ > -+out: > -+ if (lower_root_info && !IS_ERR(lower_root_info)) { > -+ kfree(lower_root_info->lower_paths); > -+ kfree(lower_root_info); > -+ } > -+ return err; > -+} > -+ > -+static struct dentry *unionfs_mount(struct file_system_type *fs_type, > -+ int flags, const char *dev_name, > -+ void *raw_data) > -+{ > -+ struct dentry *dentry; > -+ > -+ dentry = mount_nodev(fs_type, flags, raw_data, unionfs_read_super); > -+ if (!PTR_ERR(dentry)) > -+ UNIONFS_SB(dentry->d_sb)->dev_name = > -+ kstrdup(dev_name, GFP_KERNEL); > -+ return dentry; > -+} > -+ > -+static struct file_system_type unionfs_fs_type = { > -+ .owner = THIS_MODULE, > -+ .name = UNIONFS_NAME, > -+ .mount = unionfs_mount, > -+ .kill_sb = generic_shutdown_super, > -+ .fs_flags = FS_REVAL_DOT, > -+}; > -+ > -+static int __init init_unionfs_fs(void) > -+{ > -+ int err; > -+ > -+ pr_info("Registering unionfs " UNIONFS_VERSION "\n"); > -+ > -+ err = unionfs_init_filldir_cache(); > -+ if (unlikely(err)) > -+ goto out; > -+ err = unionfs_init_inode_cache(); > -+ if (unlikely(err)) > -+ goto out; > -+ err = unionfs_init_dentry_cache(); > -+ if (unlikely(err)) > -+ goto out; > -+ err = init_sioq(); > -+ if (unlikely(err)) > -+ goto out; > -+ err = register_filesystem(&unionfs_fs_type); > -+out: > -+ if (unlikely(err)) { > -+ stop_sioq(); > -+ unionfs_destroy_filldir_cache(); > -+ unionfs_destroy_inode_cache(); > -+ unionfs_destroy_dentry_cache(); > -+ } > -+ return err; > -+} > -+ > -+static void __exit exit_unionfs_fs(void) > -+{ > -+ stop_sioq(); > -+ unionfs_destroy_filldir_cache(); > -+ unionfs_destroy_inode_cache(); > -+ unionfs_destroy_dentry_cache(); > -+ unregister_filesystem(&unionfs_fs_type); > -+ pr_info("Completed unionfs module unload\n"); > -+} > -+ > -+MODULE_AUTHOR("Erez Zadok, Filesystems and Storage Lab, Stony Brook > University" > -+ " (http://www.fsl.cs.sunysb.edu)"); > -+MODULE_DESCRIPTION("Unionfs " UNIONFS_VERSION > -+ " (http://unionfs.filesystems.org)"); > -+MODULE_LICENSE("GPL"); > -+ > -+module_init(init_unionfs_fs); > -+module_exit(exit_unionfs_fs); > -diff --git a/fs/unionfs/mmap.c b/fs/unionfs/mmap.c > -new file mode 100644 > -index 0000000..bcc5652 > ---- /dev/null > -+++ b/fs/unionfs/mmap.c > -@@ -0,0 +1,89 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2006 Shaya Potter > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+ > -+/* > -+ * XXX: we need a dummy readpage handler because generic_file_mmap > (which we > -+ * use in unionfs_mmap) checks for the existence of > -+ * mapping->a_ops->readpage, else it returns -ENOEXEC. The VFS will need to > -+ * be fixed to allow a file system to define vm_ops->fault without any > -+ * address_space_ops whatsoever. > -+ * > -+ * Otherwise, we don't want to use our readpage method at all. > -+ */ > -+static int unionfs_readpage(struct file *file, struct page *page) > -+{ > -+ BUG(); > -+ return -EINVAL; > -+} > -+ > -+static int unionfs_fault(struct vm_area_struct *vma, struct vm_fault *vmf) > -+{ > -+ int err; > -+ struct file *file, *lower_file; > -+ const struct vm_operations_struct *lower_vm_ops; > -+ struct vm_area_struct lower_vma; > -+ > -+ BUG_ON(!vma); > -+ memcpy(&lower_vma, vma, sizeof(struct vm_area_struct)); > -+ file = lower_vma.vm_file; > -+ lower_vm_ops = UNIONFS_F(file)->lower_vm_ops; > -+ BUG_ON(!lower_vm_ops); > -+ > -+ lower_file = unionfs_lower_file(file); > -+ BUG_ON(!lower_file); > -+ /* > -+ * XXX: vm_ops->fault may be called in parallel. Because we have to > -+ * resort to temporarily changing the vma->vm_file to point to the > -+ * lower file, a concurrent invocation of unionfs_fault could see a > -+ * different value. In this workaround, we keep a different copy of > -+ * the vma structure in our stack, so we never expose a different > -+ * value of the vma->vm_file called to us, even temporarily. A > -+ * better fix would be to change the calling semantics of ->fault to > -+ * take an explicit file pointer. > -+ */ > -+ lower_vma.vm_file = lower_file; > -+ err = lower_vm_ops->fault(&lower_vma, vmf); > -+ return err; > -+} > -+ > -+/* > -+ * XXX: the default address_space_ops for unionfs is empty. We cannot set > -+ * our inode->i_mapping->a_ops to NULL because too many code paths > expect > -+ * the a_ops vector to be non-NULL. > -+ */ > -+struct address_space_operations unionfs_aops = { > -+ /* empty on purpose */ > -+}; > -+ > -+/* > -+ * XXX: we need a second, dummy address_space_ops vector, to be used > -+ * temporarily during unionfs_mmap, because the latter calls > -+ * generic_file_mmap, which checks if ->readpage exists, else returns > -+ * -ENOEXEC. > -+ */ > -+struct address_space_operations unionfs_dummy_aops = { > -+ .readpage = unionfs_readpage, > -+}; > -+ > -+struct vm_operations_struct unionfs_vm_ops = { > -+ .fault = unionfs_fault, > -+}; > -diff --git a/fs/unionfs/rdstate.c b/fs/unionfs/rdstate.c > -new file mode 100644 > -index 0000000..59b7333 > ---- /dev/null > -+++ b/fs/unionfs/rdstate.c > -@@ -0,0 +1,285 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* This file contains the routines for maintaining readdir state. */ > -+ > -+/* > -+ * There are two structures here, rdstate which is a hash table > -+ * of the second structure which is a filldir_node. > -+ */ > -+ > -+/* > -+ * This is a struct kmem_cache for filldir nodes, because we allocate a lot > -+ * of them and they shouldn't waste memory. If the node has a small name > -+ * (as defined by the dentry structure), then we use an inline name to > -+ * preserve kmalloc space. > -+ */ > -+static struct kmem_cache *unionfs_filldir_cachep; > -+ > -+int unionfs_init_filldir_cache(void) > -+{ > -+ unionfs_filldir_cachep = > -+ kmem_cache_create("unionfs_filldir", > -+ sizeof(struct filldir_node), 0, > -+ SLAB_RECLAIM_ACCOUNT, NULL); > -+ > -+ return (unionfs_filldir_cachep ? 0 : -ENOMEM); > -+} > -+ > -+void unionfs_destroy_filldir_cache(void) > -+{ > -+ if (unionfs_filldir_cachep) > -+ kmem_cache_destroy(unionfs_filldir_cachep); > -+} > -+ > -+/* > -+ * This is a tuning parameter that tells us roughly how big to make the > -+ * hash table in directory entries per page. This isn't perfect, but > -+ * at least we get a hash table size that shouldn't be too overloaded. > -+ * The following averages are based on my home directory. > -+ * 14.44693 Overall > -+ * 12.29 Single Page Directories > -+ * 117.93 Multi-page directories > -+ */ > -+#define DENTPAGE 4096 > -+#define DENTPERONEPAGE 12 > -+#define DENTPERPAGE 118 > -+#define MINHASHSIZE 1 > -+static int guesstimate_hash_size(struct inode *inode) > -+{ > -+ struct inode *lower_inode; > -+ int bindex; > -+ int hashsize = MINHASHSIZE; > -+ > -+ if (UNIONFS_I(inode)->hashsize > 0) > -+ return UNIONFS_I(inode)->hashsize; > -+ > -+ for (bindex = ibstart(inode); bindex <= ibend(inode); bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, bindex); > -+ if (!lower_inode) > -+ continue; > -+ > -+ if (i_size_read(lower_inode) == DENTPAGE) > -+ hashsize += DENTPERONEPAGE; > -+ else > -+ hashsize += (i_size_read(lower_inode) / DENTPAGE) * > -+ DENTPERPAGE; > -+ } > -+ > -+ return hashsize; > -+} > -+ > -+int init_rdstate(struct file *file) > -+{ > -+ BUG_ON(sizeof(loff_t) != > -+ (sizeof(unsigned int) + sizeof(unsigned int))); > -+ BUG_ON(UNIONFS_F(file)->rdstate != NULL); > -+ > -+ UNIONFS_F(file)->rdstate = alloc_rdstate(file->f_path.dentry->d_inode, > -+ fbstart(file)); > -+ > -+ return (UNIONFS_F(file)->rdstate ? 0 : -ENOMEM); > -+} > -+ > -+struct unionfs_dir_state *find_rdstate(struct inode *inode, loff_t fpos) > -+{ > -+ struct unionfs_dir_state *rdstate = NULL; > -+ struct list_head *pos; > -+ > -+ spin_lock(&UNIONFS_I(inode)->rdlock); > -+ list_for_each(pos, &UNIONFS_I(inode)->readdircache) { > -+ struct unionfs_dir_state *r = > -+ list_entry(pos, struct unionfs_dir_state, cache); > -+ if (fpos == rdstate2offset(r)) { > -+ UNIONFS_I(inode)->rdcount--; > -+ list_del(&r->cache); > -+ rdstate = r; > -+ break; > -+ } > -+ } > -+ spin_unlock(&UNIONFS_I(inode)->rdlock); > -+ return rdstate; > -+} > -+ > -+struct unionfs_dir_state *alloc_rdstate(struct inode *inode, int bindex) > -+{ > -+ int i = 0; > -+ int hashsize; > -+ unsigned long mallocsize = sizeof(struct unionfs_dir_state); > -+ struct unionfs_dir_state *rdstate; > -+ > -+ hashsize = guesstimate_hash_size(inode); > -+ mallocsize += hashsize * sizeof(struct list_head); > -+ mallocsize = __roundup_pow_of_two(mallocsize); > -+ > -+ /* This should give us about 500 entries anyway. */ > -+ if (mallocsize > PAGE_SIZE) > -+ mallocsize = PAGE_SIZE; > -+ > -+ hashsize = (mallocsize - sizeof(struct unionfs_dir_state)) / > -+ sizeof(struct list_head); > -+ > -+ rdstate = kmalloc(mallocsize, GFP_KERNEL); > -+ if (unlikely(!rdstate)) > -+ return NULL; > -+ > -+ spin_lock(&UNIONFS_I(inode)->rdlock); > -+ if (UNIONFS_I(inode)->cookie >= (MAXRDCOOKIE - 1)) > -+ UNIONFS_I(inode)->cookie = 1; > -+ else > -+ UNIONFS_I(inode)->cookie++; > -+ > -+ rdstate->cookie = UNIONFS_I(inode)->cookie; > -+ spin_unlock(&UNIONFS_I(inode)->rdlock); > -+ rdstate->offset = 1; > -+ rdstate->access = jiffies; > -+ rdstate->bindex = bindex; > -+ rdstate->dirpos = 0; > -+ rdstate->hashentries = 0; > -+ rdstate->size = hashsize; > -+ for (i = 0; i < rdstate->size; i++) > -+ INIT_LIST_HEAD(&rdstate->list[i]); > -+ > -+ return rdstate; > -+} > -+ > -+static void free_filldir_node(struct filldir_node *node) > -+{ > -+ if (node->namelen >= DNAME_INLINE_LEN) > -+ kfree(node->name); > -+ kmem_cache_free(unionfs_filldir_cachep, node); > -+} > -+ > -+void free_rdstate(struct unionfs_dir_state *state) > -+{ > -+ struct filldir_node *tmp; > -+ int i; > -+ > -+ for (i = 0; i < state->size; i++) { > -+ struct list_head *head = &(state->list[i]); > -+ struct list_head *pos, *n; > -+ > -+ /* traverse the list and deallocate space */ > -+ list_for_each_safe(pos, n, head) { > -+ tmp = list_entry(pos, struct filldir_node, file_list); > -+ list_del(&tmp->file_list); > -+ free_filldir_node(tmp); > -+ } > -+ } > -+ > -+ kfree(state); > -+} > -+ > -+struct filldir_node *find_filldir_node(struct unionfs_dir_state *rdstate, > -+ const char *name, int namelen, > -+ int is_whiteout) > -+{ > -+ int index; > -+ unsigned int hash; > -+ struct list_head *head; > -+ struct list_head *pos; > -+ struct filldir_node *cursor = NULL; > -+ int found = 0; > -+ > -+ BUG_ON(namelen <= 0); > -+ > -+ hash = full_name_hash(name, namelen); > -+ index = hash % rdstate->size; > -+ > -+ head = &(rdstate->list[index]); > -+ list_for_each(pos, head) { > -+ cursor = list_entry(pos, struct filldir_node, file_list); > -+ > -+ if (cursor->namelen == namelen && cursor->hash == hash && > -+ !strncmp(cursor->name, name, namelen)) { > -+ /* > -+ * a duplicate exists, and hence no need to create > -+ * entry to the list > -+ */ > -+ found = 1; > -+ > -+ /* > -+ * if a duplicate is found in this branch, and is > -+ * not due to the caller looking for an entry to > -+ * whiteout, then the file system may be corrupted. > -+ */ > -+ if (unlikely(!is_whiteout && > -+ cursor->bindex == rdstate->bindex)) > -+ printk(KERN_ERR "unionfs: filldir: possible " > -+ "I/O error: a file is duplicated " > -+ "in the same branch %d: %s\n", > -+ rdstate->bindex, cursor->name); > -+ break; > -+ } > -+ } > -+ > -+ if (!found) > -+ cursor = NULL; > -+ > -+ return cursor; > -+} > -+ > -+int add_filldir_node(struct unionfs_dir_state *rdstate, const char *name, > -+ int namelen, int bindex, int whiteout) > -+{ > -+ struct filldir_node *new; > -+ unsigned int hash; > -+ int index; > -+ int err = 0; > -+ struct list_head *head; > -+ > -+ BUG_ON(namelen <= 0); > -+ > -+ hash = full_name_hash(name, namelen); > -+ index = hash % rdstate->size; > -+ head = &(rdstate->list[index]); > -+ > -+ new = kmem_cache_alloc(unionfs_filldir_cachep, GFP_KERNEL); > -+ if (unlikely(!new)) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ INIT_LIST_HEAD(&new->file_list); > -+ new->namelen = namelen; > -+ new->hash = hash; > -+ new->bindex = bindex; > -+ new->whiteout = whiteout; > -+ > -+ if (namelen < DNAME_INLINE_LEN) { > -+ new->name = new->iname; > -+ } else { > -+ new->name = kmalloc(namelen + 1, GFP_KERNEL); > -+ if (unlikely(!new->name)) { > -+ kmem_cache_free(unionfs_filldir_cachep, new); > -+ new = NULL; > -+ goto out; > -+ } > -+ } > -+ > -+ memcpy(new->name, name, namelen); > -+ new->name[namelen] = '\0'; > -+ > -+ rdstate->hashentries++; > -+ > -+ list_add(&(new->file_list), head); > -+out: > -+ return err; > -+} > -diff --git a/fs/unionfs/rename.c b/fs/unionfs/rename.c > -new file mode 100644 > -index 0000000..c8ab910 > ---- /dev/null > -+++ b/fs/unionfs/rename.c > -@@ -0,0 +1,522 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * This is a helper function for rename, used when rename ends up with hosed > -+ * over dentries and we need to revert. > -+ */ > -+static int unionfs_refresh_lower_dentry(struct dentry *dentry, > -+ struct dentry *parent, int bindex) > -+{ > -+ struct dentry *lower_dentry; > -+ struct dentry *lower_parent; > -+ int err = 0; > -+ struct nameidata lower_nd; > -+ > -+ verify_locked(dentry); > -+ > -+ lower_parent = unionfs_lower_dentry_idx(parent, bindex); > -+ > -+ BUG_ON(!S_ISDIR(lower_parent->d_inode->i_mode)); > -+ > -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); > -+ if (unlikely(err < 0)) > -+ goto out; > -+ lower_dentry = lookup_one_len_nd(dentry->d_name.name, > lower_parent, > -+ dentry->d_name.len, &lower_nd); > -+ release_lower_nd(&lower_nd, err); > -+ if (IS_ERR(lower_dentry)) { > -+ err = PTR_ERR(lower_dentry); > -+ goto out; > -+ } > -+ > -+ dput(unionfs_lower_dentry_idx(dentry, bindex)); > -+ iput(unionfs_lower_inode_idx(dentry->d_inode, bindex)); > -+ unionfs_set_lower_inode_idx(dentry->d_inode, bindex, NULL); > -+ > -+ if (!lower_dentry->d_inode) { > -+ dput(lower_dentry); > -+ unionfs_set_lower_dentry_idx(dentry, bindex, NULL); > -+ } else { > -+ unionfs_set_lower_dentry_idx(dentry, bindex, lower_dentry); > -+ unionfs_set_lower_inode_idx(dentry->d_inode, bindex, > -+ igrab(lower_dentry->d_inode)); > -+ } > -+ > -+out: > -+ return err; > -+} > -+ > -+static int __unionfs_rename(struct inode *old_dir, struct dentry *old_dentry, > -+ struct dentry *old_parent, > -+ struct inode *new_dir, struct dentry *new_dentry, > -+ struct dentry *new_parent, > -+ int bindex) > -+{ > -+ int err = 0; > -+ struct dentry *lower_old_dentry; > -+ struct dentry *lower_new_dentry; > -+ struct dentry *lower_old_dir_dentry; > -+ struct dentry *lower_new_dir_dentry; > -+ struct dentry *trap; > -+ > -+ lower_new_dentry = unionfs_lower_dentry_idx(new_dentry, bindex); > -+ lower_old_dentry = unionfs_lower_dentry_idx(old_dentry, bindex); > -+ > -+ if (!lower_new_dentry) { > -+ lower_new_dentry = > -+ create_parents(new_parent->d_inode, > -+ new_dentry, new_dentry->d_name.name, > -+ bindex); > -+ if (IS_ERR(lower_new_dentry)) { > -+ err = PTR_ERR(lower_new_dentry); > -+ if (IS_COPYUP_ERR(err)) > -+ goto out; > -+ printk(KERN_ERR "unionfs: error creating directory " > -+ "tree for rename, bindex=%d err=%d\n", > -+ bindex, err); > -+ goto out; > -+ } > -+ } > -+ > -+ /* check for and remove whiteout, if any */ > -+ err = check_unlink_whiteout(new_dentry, lower_new_dentry, bindex); > -+ if (err > 0) /* ignore if whiteout found and successfully removed */ > -+ err = 0; > -+ if (err) > -+ goto out; > -+ > -+ /* check of old_dentry branch is writable */ > -+ err = is_robranch_super(old_dentry->d_sb, bindex); > -+ if (err) > -+ goto out; > -+ > -+ dget(lower_old_dentry); > -+ dget(lower_new_dentry); > -+ lower_old_dir_dentry = dget_parent(lower_old_dentry); > -+ lower_new_dir_dentry = dget_parent(lower_new_dentry); > -+ > -+ trap = lock_rename(lower_old_dir_dentry, lower_new_dir_dentry); > -+ /* source should not be ancenstor of target */ > -+ if (trap == lower_old_dentry) { > -+ err = -EINVAL; > -+ goto out_err_unlock; > -+ } > -+ /* target should not be ancenstor of source */ > -+ if (trap == lower_new_dentry) { > -+ err = -ENOTEMPTY; > -+ goto out_err_unlock; > -+ } > -+ err = vfs_rename(lower_old_dir_dentry->d_inode, lower_old_dentry, > -+ lower_new_dir_dentry->d_inode, > lower_new_dentry); > -+out_err_unlock: > -+ if (!err) { > -+ /* update parent dir times */ > -+ fsstack_copy_attr_times(old_dir, lower_old_dir_dentry- > >d_inode); > -+ fsstack_copy_attr_times(new_dir, lower_new_dir_dentry- > >d_inode); > -+ } > -+ unlock_rename(lower_old_dir_dentry, lower_new_dir_dentry); > -+ > -+ dput(lower_old_dir_dentry); > -+ dput(lower_new_dir_dentry); > -+ dput(lower_old_dentry); > -+ dput(lower_new_dentry); > -+ > -+out: > -+ if (!err) { > -+ /* Fixup the new_dentry. */ > -+ if (bindex < dbstart(new_dentry)) > -+ dbstart(new_dentry) = bindex; > -+ else if (bindex > dbend(new_dentry)) > -+ dbend(new_dentry) = bindex; > -+ } > -+ > -+ return err; > -+} > -+ > -+/* > -+ * Main rename code. This is sufficiently complex, that it's documented in > -+ * Documentation/filesystems/unionfs/rename.txt. This routine calls > -+ * __unionfs_rename() above to perform some of the work. > -+ */ > -+static int do_unionfs_rename(struct inode *old_dir, > -+ struct dentry *old_dentry, > -+ struct dentry *old_parent, > -+ struct inode *new_dir, > -+ struct dentry *new_dentry, > -+ struct dentry *new_parent) > -+{ > -+ int err = 0; > -+ int bindex; > -+ int old_bstart, old_bend; > -+ int new_bstart, new_bend; > -+ int do_copyup = -1; > -+ int local_err = 0; > -+ int eio = 0; > -+ int revert = 0; > -+ > -+ old_bstart = dbstart(old_dentry); > -+ old_bend = dbend(old_dentry); > -+ > -+ new_bstart = dbstart(new_dentry); > -+ new_bend = dbend(new_dentry); > -+ > -+ /* Rename source to destination. */ > -+ err = __unionfs_rename(old_dir, old_dentry, old_parent, > -+ new_dir, new_dentry, new_parent, > -+ old_bstart); > -+ if (err) { > -+ if (!IS_COPYUP_ERR(err)) > -+ goto out; > -+ do_copyup = old_bstart - 1; > -+ } else { > -+ revert = 1; > -+ } > -+ > -+ /* > -+ * Unlink all instances of destination that exist to the left of > -+ * bstart of source. On error, revert back, goto out. > -+ */ > -+ for (bindex = old_bstart - 1; bindex >= new_bstart; bindex--) { > -+ struct dentry *unlink_dentry; > -+ struct dentry *unlink_dir_dentry; > -+ > -+ BUG_ON(bindex < 0); > -+ unlink_dentry = unionfs_lower_dentry_idx(new_dentry, > bindex); > -+ if (!unlink_dentry) > -+ continue; > -+ > -+ unlink_dir_dentry = lock_parent(unlink_dentry); > -+ err = is_robranch_super(old_dir->i_sb, bindex); > -+ if (!err) > -+ err = vfs_unlink(unlink_dir_dentry->d_inode, > -+ unlink_dentry); > -+ > -+ fsstack_copy_attr_times(new_parent->d_inode, > -+ unlink_dir_dentry->d_inode); > -+ /* propagate number of hard-links */ > -+ new_parent->d_inode->i_nlink = > -+ unionfs_get_nlinks(new_parent->d_inode); > -+ > -+ unlock_dir(unlink_dir_dentry); > -+ if (!err) { > -+ if (bindex != new_bstart) { > -+ dput(unlink_dentry); > -+ unionfs_set_lower_dentry_idx(new_dentry, > -+ bindex, NULL); > -+ } > -+ } else if (IS_COPYUP_ERR(err)) { > -+ do_copyup = bindex - 1; > -+ } else if (revert) { > -+ goto revert; > -+ } > -+ } > -+ > -+ if (do_copyup != -1) { > -+ for (bindex = do_copyup; bindex >= 0; bindex--) { > -+ /* > -+ * copyup the file into some left directory, so that > -+ * you can rename it > -+ */ > -+ err = copyup_dentry(old_parent->d_inode, > -+ old_dentry, old_bstart, bindex, > -+ old_dentry->d_name.name, > -+ old_dentry->d_name.len, NULL, > -+ i_size_read(old_dentry->d_inode)); > -+ /* if copyup failed, try next branch to the left */ > -+ if (err) > -+ continue; > -+ /* > -+ * create whiteout before calling __unionfs_rename > -+ * because the latter will change the old_dentry's > -+ * lower name and parent dir, resulting in the > -+ * whiteout getting created in the wrong dir. > -+ */ > -+ err = create_whiteout(old_dentry, bindex); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: can't create a " > -+ "whiteout for %s in rename (err=%d)\n", > -+ old_dentry->d_name.name, err); > -+ continue; > -+ } > -+ err = __unionfs_rename(old_dir, old_dentry, > old_parent, > -+ new_dir, new_dentry, > new_parent, > -+ bindex); > -+ break; > -+ } > -+ } > -+ > -+ /* make it opaque */ > -+ if (S_ISDIR(old_dentry->d_inode->i_mode)) { > -+ err = make_dir_opaque(old_dentry, dbstart(old_dentry)); > -+ if (err) > -+ goto revert; > -+ } > -+ > -+ /* > -+ * Create whiteout for source, only if: > -+ * (1) There is more than one underlying instance of source. > -+ * (We did a copy_up is taken care of above). > -+ */ > -+ if ((old_bstart != old_bend) && (do_copyup == -1)) { > -+ err = create_whiteout(old_dentry, old_bstart); > -+ if (err) { > -+ /* can't fix anything now, so we exit with -EIO */ > -+ printk(KERN_ERR "unionfs: can't create a whiteout for > " > -+ "%s in rename!\n", old_dentry->d_name.name); > -+ err = -EIO; > -+ } > -+ } > -+ > -+out: > -+ return err; > -+ > -+revert: > -+ /* Do revert here. */ > -+ local_err = unionfs_refresh_lower_dentry(new_dentry, new_parent, > -+ old_bstart); > -+ if (local_err) { > -+ printk(KERN_ERR "unionfs: revert failed in rename: " > -+ "the new refresh failed\n"); > -+ eio = -EIO; > -+ } > -+ > -+ local_err = unionfs_refresh_lower_dentry(old_dentry, old_parent, > -+ old_bstart); > -+ if (local_err) { > -+ printk(KERN_ERR "unionfs: revert failed in rename: " > -+ "the old refresh failed\n"); > -+ eio = -EIO; > -+ goto revert_out; > -+ } > -+ > -+ if (!unionfs_lower_dentry_idx(new_dentry, bindex) || > -+ !unionfs_lower_dentry_idx(new_dentry, bindex)->d_inode) { > -+ printk(KERN_ERR "unionfs: revert failed in rename: " > -+ "the object disappeared from under us!\n"); > -+ eio = -EIO; > -+ goto revert_out; > -+ } > -+ > -+ if (unionfs_lower_dentry_idx(old_dentry, bindex) && > -+ unionfs_lower_dentry_idx(old_dentry, bindex)->d_inode) { > -+ printk(KERN_ERR "unionfs: revert failed in rename: " > -+ "the object was created underneath us!\n"); > -+ eio = -EIO; > -+ goto revert_out; > -+ } > -+ > -+ local_err = __unionfs_rename(new_dir, new_dentry, new_parent, > -+ old_dir, old_dentry, old_parent, > -+ old_bstart); > -+ > -+ /* If we can't fix it, then we cop-out with -EIO. */ > -+ if (local_err) { > -+ printk(KERN_ERR "unionfs: revert failed in rename!\n"); > -+ eio = -EIO; > -+ } > -+ > -+ local_err = unionfs_refresh_lower_dentry(new_dentry, new_parent, > -+ bindex); > -+ if (local_err) > -+ eio = -EIO; > -+ local_err = unionfs_refresh_lower_dentry(old_dentry, old_parent, > -+ bindex); > -+ if (local_err) > -+ eio = -EIO; > -+ > -+revert_out: > -+ if (eio) > -+ err = eio; > -+ return err; > -+} > -+ > -+/* > -+ * We can't copyup a directory, because it may involve huge numbers of > -+ * children, etc. Doing that in the kernel would be bad, so instead we > -+ * return EXDEV to the user-space utility that caused this, and let the > -+ * user-space recurse and ask us to copy up each file separately. > -+ */ > -+static int may_rename_dir(struct dentry *dentry, struct dentry *parent) > -+{ > -+ int err, bstart; > -+ > -+ err = check_empty(dentry, parent, NULL); > -+ if (err == -ENOTEMPTY) { > -+ if (is_robranch(dentry)) > -+ return -EXDEV; > -+ } else if (err) { > -+ return err; > -+ } > -+ > -+ bstart = dbstart(dentry); > -+ if (dbend(dentry) == bstart || dbopaque(dentry) == bstart) > -+ return 0; > -+ > -+ dbstart(dentry) = bstart + 1; > -+ err = check_empty(dentry, parent, NULL); > -+ dbstart(dentry) = bstart; > -+ if (err == -ENOTEMPTY) > -+ err = -EXDEV; > -+ return err; > -+} > -+ > -+/* > -+ * The locking rules in unionfs_rename are complex. We could use a simpler > -+ * superblock-level name-space lock for renames and copy-ups. > -+ */ > -+int unionfs_rename(struct inode *old_dir, struct dentry *old_dentry, > -+ struct inode *new_dir, struct dentry *new_dentry) > -+{ > -+ int err = 0; > -+ struct dentry *wh_dentry; > -+ struct dentry *old_parent, *new_parent; > -+ int valid = true; > -+ > -+ unionfs_read_lock(old_dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ old_parent = dget_parent(old_dentry); > -+ new_parent = dget_parent(new_dentry); > -+ /* un/lock parent dentries only if they differ from old/new_dentry */ > -+ if (old_parent != old_dentry && > -+ old_parent != new_dentry) > -+ unionfs_lock_dentry(old_parent, > UNIONFS_DMUTEX_REVAL_PARENT); > -+ if (new_parent != old_dentry && > -+ new_parent != new_dentry && > -+ new_parent != old_parent) > -+ unionfs_lock_dentry(new_parent, > UNIONFS_DMUTEX_REVAL_CHILD); > -+ unionfs_double_lock_dentry(old_dentry, new_dentry); > -+ > -+ valid = __unionfs_d_revalidate(old_dentry, old_parent, false); > -+ if (!valid) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ if (!d_deleted(new_dentry) && new_dentry->d_inode) { > -+ valid = __unionfs_d_revalidate(new_dentry, new_parent, > false); > -+ if (!valid) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ } > -+ > -+ if (!S_ISDIR(old_dentry->d_inode->i_mode)) > -+ err = unionfs_partial_lookup(old_dentry, old_parent); > -+ else > -+ err = may_rename_dir(old_dentry, old_parent); > -+ > -+ if (err) > -+ goto out; > -+ > -+ err = unionfs_partial_lookup(new_dentry, new_parent); > -+ if (err) > -+ goto out; > -+ > -+ /* > -+ * if new_dentry is already lower because of whiteout, > -+ * simply override it even if the whited-out dir is not empty. > -+ */ > -+ wh_dentry = find_first_whiteout(new_dentry); > -+ if (!IS_ERR(wh_dentry)) { > -+ dput(wh_dentry); > -+ } else if (new_dentry->d_inode) { > -+ if (S_ISDIR(old_dentry->d_inode->i_mode) != > -+ S_ISDIR(new_dentry->d_inode->i_mode)) { > -+ err = S_ISDIR(old_dentry->d_inode->i_mode) ? > -+ -ENOTDIR : -EISDIR; > -+ goto out; > -+ } > -+ > -+ if (S_ISDIR(new_dentry->d_inode->i_mode)) { > -+ struct unionfs_dir_state *namelist = NULL; > -+ /* check if this unionfs directory is empty or not */ > -+ err = check_empty(new_dentry, new_parent, > &namelist); > -+ if (err) > -+ goto out; > -+ > -+ if (!is_robranch(new_dentry)) > -+ err = delete_whiteouts(new_dentry, > -+ dbstart(new_dentry), > -+ namelist); > -+ > -+ free_rdstate(namelist); > -+ > -+ if (err) > -+ goto out; > -+ } > -+ } > -+ > -+ err = do_unionfs_rename(old_dir, old_dentry, old_parent, > -+ new_dir, new_dentry, new_parent); > -+ if (err) > -+ goto out; > -+ > -+ /* > -+ * force re-lookup since the dir on ro branch is not renamed, and > -+ * lower dentries still indicate the un-renamed ones. > -+ */ > -+ if (S_ISDIR(old_dentry->d_inode->i_mode)) > -+ atomic_dec(&UNIONFS_D(old_dentry)->generation); > -+ else > -+ unionfs_postcopyup_release(old_dentry); > -+ if (new_dentry->d_inode && !S_ISDIR(new_dentry->d_inode- > >i_mode)) { > -+ unionfs_postcopyup_release(new_dentry); > -+ unionfs_postcopyup_setmnt(new_dentry); > -+ if (!unionfs_lower_inode(new_dentry->d_inode)) { > -+ /* > -+ * If we get here, it means that no copyup was > -+ * needed, and that a file by the old name already > -+ * existing on the destination branch; that file got > -+ * renamed earlier in this function, so all we need > -+ * to do here is set the lower inode. > -+ */ > -+ struct inode *inode; > -+ inode = unionfs_lower_inode(old_dentry->d_inode); > -+ igrab(inode); > -+ unionfs_set_lower_inode_idx(new_dentry->d_inode, > -+ dbstart(new_dentry), > -+ inode); > -+ } > -+ } > -+ /* if all of this renaming succeeded, update our times */ > -+ unionfs_copy_attr_times(old_dentry->d_inode); > -+ unionfs_copy_attr_times(new_dentry->d_inode); > -+ unionfs_check_inode(old_dir); > -+ unionfs_check_inode(new_dir); > -+ unionfs_check_dentry(old_dentry); > -+ unionfs_check_dentry(new_dentry); > -+ > -+out: > -+ if (err) /* clear the new_dentry stuff created */ > -+ d_drop(new_dentry); > -+ > -+ unionfs_double_unlock_dentry(old_dentry, new_dentry); > -+ if (new_parent != old_dentry && > -+ new_parent != new_dentry && > -+ new_parent != old_parent) > -+ unionfs_unlock_dentry(new_parent); > -+ if (old_parent != old_dentry && > -+ old_parent != new_dentry) > -+ unionfs_unlock_dentry(old_parent); > -+ dput(new_parent); > -+ dput(old_parent); > -+ unionfs_read_unlock(old_dentry->d_sb); > -+ > -+ return err; > -+} > -diff --git a/fs/unionfs/sioq.c b/fs/unionfs/sioq.c > -new file mode 100644 > -index 0000000..b923742 > ---- /dev/null > -+++ b/fs/unionfs/sioq.c > -@@ -0,0 +1,101 @@ > -+/* > -+ * Copyright (c) 2006-2011 Erez Zadok > -+ * Copyright (c) 2006 Charles P. Wright > -+ * Copyright (c) 2006-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2006 Junjiro Okajima > -+ * Copyright (c) 2006 David P. Quigley > -+ * Copyright (c) 2006-2011 Stony Brook University > -+ * Copyright (c) 2006-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * Super-user IO work Queue - sometimes we need to perform actions which > -+ * would fail due to the unix permissions on the parent directory (e.g., > -+ * rmdir a directory which appears empty, but in reality contains > -+ * whiteouts). > -+ */ > -+ > -+static struct workqueue_struct *superio_workqueue; > -+ > -+int __init init_sioq(void) > -+{ > -+ int err; > -+ > -+ superio_workqueue = create_workqueue("unionfs_siod"); > -+ if (!IS_ERR(superio_workqueue)) > -+ return 0; > -+ > -+ err = PTR_ERR(superio_workqueue); > -+ printk(KERN_ERR "unionfs: create_workqueue failed %d\n", err); > -+ superio_workqueue = NULL; > -+ return err; > -+} > -+ > -+void stop_sioq(void) > -+{ > -+ if (superio_workqueue) > -+ destroy_workqueue(superio_workqueue); > -+} > -+ > -+void run_sioq(work_func_t func, struct sioq_args *args) > -+{ > -+ INIT_WORK(&args->work, func); > -+ > -+ init_completion(&args->comp); > -+ while (!queue_work(superio_workqueue, &args->work)) { > -+ /* TODO: do accounting if needed */ > -+ schedule(); > -+ } > -+ wait_for_completion(&args->comp); > -+} > -+ > -+void __unionfs_create(struct work_struct *work) > -+{ > -+ struct sioq_args *args = container_of(work, struct sioq_args, work); > -+ struct create_args *c = &args->create; > -+ > -+ args->err = vfs_create(c->parent, c->dentry, c->mode, c->nd); > -+ complete(&args->comp); > -+} > -+ > -+void __unionfs_mkdir(struct work_struct *work) > -+{ > -+ struct sioq_args *args = container_of(work, struct sioq_args, work); > -+ struct mkdir_args *m = &args->mkdir; > -+ > -+ args->err = vfs_mkdir(m->parent, m->dentry, m->mode); > -+ complete(&args->comp); > -+} > -+ > -+void __unionfs_mknod(struct work_struct *work) > -+{ > -+ struct sioq_args *args = container_of(work, struct sioq_args, work); > -+ struct mknod_args *m = &args->mknod; > -+ > -+ args->err = vfs_mknod(m->parent, m->dentry, m->mode, m->dev); > -+ complete(&args->comp); > -+} > -+ > -+void __unionfs_symlink(struct work_struct *work) > -+{ > -+ struct sioq_args *args = container_of(work, struct sioq_args, work); > -+ struct symlink_args *s = &args->symlink; > -+ > -+ args->err = vfs_symlink(s->parent, s->dentry, s->symbuf); > -+ complete(&args->comp); > -+} > -+ > -+void __unionfs_unlink(struct work_struct *work) > -+{ > -+ struct sioq_args *args = container_of(work, struct sioq_args, work); > -+ struct unlink_args *u = &args->unlink; > -+ > -+ args->err = vfs_unlink(u->parent, u->dentry); > -+ complete(&args->comp); > -+} > -diff --git a/fs/unionfs/sioq.h b/fs/unionfs/sioq.h > -new file mode 100644 > -index 0000000..c2dfb94 > ---- /dev/null > -+++ b/fs/unionfs/sioq.h > -@@ -0,0 +1,91 @@ > -+/* > -+ * Copyright (c) 2006-2011 Erez Zadok > -+ * Copyright (c) 2006 Charles P. Wright > -+ * Copyright (c) 2006-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2006 Junjiro Okajima > -+ * Copyright (c) 2006 David P. Quigley > -+ * Copyright (c) 2006-2011 Stony Brook University > -+ * Copyright (c) 2006-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#ifndef _SIOQ_H > -+#define _SIOQ_H > -+ > -+struct deletewh_args { > -+ struct unionfs_dir_state *namelist; > -+ struct dentry *dentry; > -+ int bindex; > -+}; > -+ > -+struct is_opaque_args { > -+ struct dentry *dentry; > -+}; > -+ > -+struct create_args { > -+ struct inode *parent; > -+ struct dentry *dentry; > -+ umode_t mode; > -+ struct nameidata *nd; > -+}; > -+ > -+struct mkdir_args { > -+ struct inode *parent; > -+ struct dentry *dentry; > -+ umode_t mode; > -+}; > -+ > -+struct mknod_args { > -+ struct inode *parent; > -+ struct dentry *dentry; > -+ umode_t mode; > -+ dev_t dev; > -+}; > -+ > -+struct symlink_args { > -+ struct inode *parent; > -+ struct dentry *dentry; > -+ char *symbuf; > -+}; > -+ > -+struct unlink_args { > -+ struct inode *parent; > -+ struct dentry *dentry; > -+}; > -+ > -+ > -+struct sioq_args { > -+ struct completion comp; > -+ struct work_struct work; > -+ int err; > -+ void *ret; > -+ > -+ union { > -+ struct deletewh_args deletewh; > -+ struct is_opaque_args is_opaque; > -+ struct create_args create; > -+ struct mkdir_args mkdir; > -+ struct mknod_args mknod; > -+ struct symlink_args symlink; > -+ struct unlink_args unlink; > -+ }; > -+}; > -+ > -+/* Extern definitions for SIOQ functions */ > -+extern int __init init_sioq(void); > -+extern void stop_sioq(void); > -+extern void run_sioq(work_func_t func, struct sioq_args *args); > -+ > -+/* Extern definitions for our privilege escalation helpers */ > -+extern void __unionfs_create(struct work_struct *work); > -+extern void __unionfs_mkdir(struct work_struct *work); > -+extern void __unionfs_mknod(struct work_struct *work); > -+extern void __unionfs_symlink(struct work_struct *work); > -+extern void __unionfs_unlink(struct work_struct *work); > -+extern void __delete_whiteouts(struct work_struct *work); > -+extern void __is_opaque_dir(struct work_struct *work); > -+ > -+#endif /* not _SIOQ_H */ > -diff --git a/fs/unionfs/subr.c b/fs/unionfs/subr.c > -new file mode 100644 > -index 0000000..bdca2f7 > ---- /dev/null > -+++ b/fs/unionfs/subr.c > -@@ -0,0 +1,95 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * returns the right n_link value based on the inode type > -+ */ > -+int unionfs_get_nlinks(const struct inode *inode) > -+{ > -+ /* don't bother to do all the work since we're unlinked */ > -+ if (inode->i_nlink == 0) > -+ return 0; > -+ > -+ if (!S_ISDIR(inode->i_mode)) > -+ return unionfs_lower_inode(inode)->i_nlink; > -+ > -+ /* > -+ * For directories, we return 1. The only place that could cares > -+ * about links is readdir, and there's d_type there so even that > -+ * doesn't matter. > -+ */ > -+ return 1; > -+} > -+ > -+/* copy a/m/ctime from the lower branch with the newest times */ > -+void unionfs_copy_attr_times(struct inode *upper) > -+{ > -+ int bindex; > -+ struct inode *lower; > -+ > -+ if (!upper) > -+ return; > -+ if (ibstart(upper) < 0) { > -+#ifdef CONFIG_UNION_FS_DEBUG > -+ WARN_ON(ibstart(upper) < 0); > -+#endif /* CONFIG_UNION_FS_DEBUG */ > -+ return; > -+ } > -+ for (bindex = ibstart(upper); bindex <= ibend(upper); bindex++) { > -+ lower = unionfs_lower_inode_idx(upper, bindex); > -+ if (!lower) > -+ continue; /* not all lower dir objects may exist */ > -+ if (unlikely(timespec_compare(&upper->i_mtime, > -+ &lower->i_mtime) < 0)) > -+ upper->i_mtime = lower->i_mtime; > -+ if (unlikely(timespec_compare(&upper->i_ctime, > -+ &lower->i_ctime) < 0)) > -+ upper->i_ctime = lower->i_ctime; > -+ if (unlikely(timespec_compare(&upper->i_atime, > -+ &lower->i_atime) < 0)) > -+ upper->i_atime = lower->i_atime; > -+ } > -+} > -+ > -+/* > -+ * A unionfs/fanout version of fsstack_copy_attr_all. Uses a > -+ * unionfs_get_nlinks to properly calcluate the number of links to a file. > -+ * Also, copies the max() of all a/m/ctimes for all lower inodes (which is > -+ * important if the lower inode is a directory type) > -+ */ > -+void unionfs_copy_attr_all(struct inode *dest, > -+ const struct inode *src) > -+{ > -+ dest->i_mode = src->i_mode; > -+ dest->i_uid = src->i_uid; > -+ dest->i_gid = src->i_gid; > -+ dest->i_rdev = src->i_rdev; > -+ > -+ unionfs_copy_attr_times(dest); > -+ > -+ dest->i_blkbits = src->i_blkbits; > -+ dest->i_flags = src->i_flags; > -+ > -+ /* > -+ * Update the nlinks AFTER updating the above fields, because the > -+ * get_links callback may depend on them. > -+ */ > -+ dest->i_nlink = unionfs_get_nlinks(dest); > -+} > -diff --git a/fs/unionfs/super.c b/fs/unionfs/super.c > -new file mode 100644 > -index 0000000..c3ac814 > ---- /dev/null > -+++ b/fs/unionfs/super.c > -@@ -0,0 +1,1030 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * The inode cache is used with alloc_inode for both our inode info and the > -+ * vfs inode. > -+ */ > -+static struct kmem_cache *unionfs_inode_cachep; > -+ > -+struct inode *unionfs_iget(struct super_block *sb, unsigned long ino) > -+{ > -+ int size; > -+ struct unionfs_inode_info *info; > -+ struct inode *inode; > -+ > -+ inode = iget_locked(sb, ino); > -+ if (!inode) > -+ return ERR_PTR(-ENOMEM); > -+ if (!(inode->i_state & I_NEW)) > -+ return inode; > -+ > -+ info = UNIONFS_I(inode); > -+ memset(info, 0, offsetof(struct unionfs_inode_info, vfs_inode)); > -+ info->bstart = -1; > -+ info->bend = -1; > -+ atomic_set(&info->generation, > -+ atomic_read(&UNIONFS_SB(inode->i_sb)->generation)); > -+ spin_lock_init(&info->rdlock); > -+ info->rdcount = 1; > -+ info->hashsize = -1; > -+ INIT_LIST_HEAD(&info->readdircache); > -+ > -+ size = sbmax(inode->i_sb) * sizeof(struct inode *); > -+ info->lower_inodes = kzalloc(size, GFP_KERNEL); > -+ if (unlikely(!info->lower_inodes)) { > -+ printk(KERN_CRIT "unionfs: no kernel memory when allocating > " > -+ "lower-pointer array!\n"); > -+ iget_failed(inode); > -+ return ERR_PTR(-ENOMEM); > -+ } > -+ > -+ inode->i_version++; > -+ inode->i_op = &unionfs_main_iops; > -+ inode->i_fop = &unionfs_main_fops; > -+ > -+ inode->i_mapping->a_ops = &unionfs_aops; > -+ > -+ /* > -+ * reset times so unionfs_copy_attr_all can keep out time invariants > -+ * right (upper inode time being the max of all lower ones). > -+ */ > -+ inode->i_atime.tv_sec = inode->i_atime.tv_nsec = 0; > -+ inode->i_mtime.tv_sec = inode->i_mtime.tv_nsec = 0; > -+ inode->i_ctime.tv_sec = inode->i_ctime.tv_nsec = 0; > -+ unlock_new_inode(inode); > -+ return inode; > -+} > -+ > -+/* > -+ * final actions when unmounting a file system > -+ * > -+ * No need to lock rwsem. > -+ */ > -+static void unionfs_put_super(struct super_block *sb) > -+{ > -+ int bindex, bstart, bend; > -+ struct unionfs_sb_info *spd; > -+ int leaks = 0; > -+ > -+ spd = UNIONFS_SB(sb); > -+ if (!spd) > -+ return; > -+ > -+ bstart = sbstart(sb); > -+ bend = sbend(sb); > -+ > -+ /* Make sure we have no leaks of branchget/branchput. */ > -+ for (bindex = bstart; bindex <= bend; bindex++) > -+ if (unlikely(branch_count(sb, bindex) != 0)) { > -+ printk(KERN_CRIT > -+ "unionfs: branch %d has %d references left!\n", > -+ bindex, branch_count(sb, bindex)); > -+ leaks = 1; > -+ } > -+ WARN_ON(leaks != 0); > -+ > -+ /* decrement lower super references */ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ struct super_block *s; > -+ s = unionfs_lower_super_idx(sb, bindex); > -+ unionfs_set_lower_super_idx(sb, bindex, NULL); > -+ atomic_dec(&s->s_active); > -+ } > -+ > -+ kfree(spd->dev_name); > -+ kfree(spd->data); > -+ kfree(spd); > -+ sb->s_fs_info = NULL; > -+} > -+ > -+/* > -+ * Since people use this to answer the "How big of a file can I write?" > -+ * question, we report the size of the highest priority branch as the size of > -+ * the union. > -+ */ > -+static int unionfs_statfs(struct dentry *dentry, struct kstatfs *buf) > -+{ > -+ int err = 0; > -+ struct super_block *sb; > -+ struct dentry *lower_dentry; > -+ struct dentry *parent; > -+ struct path lower_path; > -+ bool valid; > -+ > -+ sb = dentry->d_sb; > -+ > -+ unionfs_read_lock(sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ unionfs_check_dentry(dentry); > -+ > -+ lower_dentry = unionfs_lower_dentry(sb->s_root); > -+ lower_path.dentry = lower_dentry; > -+ lower_path.mnt = unionfs_mntget(sb->s_root, 0); > -+ err = vfs_statfs(&lower_path, buf); > -+ mntput(lower_path.mnt); > -+ > -+ /* set return buf to our f/s to avoid confusing user-level utils */ > -+ buf->f_type = UNIONFS_SUPER_MAGIC; > -+ /* > -+ * Our maximum file name can is shorter by a few bytes because every > -+ * file name could potentially be whited-out. > -+ * > -+ * XXX: this restriction goes away with ODF. > -+ */ > -+ unionfs_set_max_namelen(&buf->f_namelen); > -+ > -+ /* > -+ * reset two fields to avoid confusing user-land. > -+ * XXX: is this still necessary? > -+ */ > -+ memset(&buf->f_fsid, 0, sizeof(__kernel_fsid_t)); > -+ memset(&buf->f_spare, 0, sizeof(buf->f_spare)); > -+ > -+out: > -+ unionfs_check_dentry(dentry); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(sb); > -+ return err; > -+} > -+ > -+/* handle mode changing during remount */ > -+static noinline_for_stack int do_remount_mode_option( > -+ char *optarg, > -+ int cur_branches, > -+ struct unionfs_data *new_data, > -+ struct path *new_lower_paths) > -+{ > -+ int err = -EINVAL; > -+ int perms, idx; > -+ char *modename = strchr(optarg, '='); > -+ struct path path; > -+ > -+ /* by now, optarg contains the branch name */ > -+ if (!*optarg) { > -+ printk(KERN_ERR > -+ "unionfs: no branch specified for mode change\n"); > -+ goto out; > -+ } > -+ if (!modename) { > -+ printk(KERN_ERR "unionfs: branch \"%s\" requires a mode\n", > -+ optarg); > -+ goto out; > -+ } > -+ *modename++ = '\0'; > -+ err = parse_branch_mode(modename, &perms); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: invalid mode \"%s\" for \"%s\"\n", > -+ modename, optarg); > -+ goto out; > -+ } > -+ > -+ /* > -+ * Find matching branch index. For now, this assumes that nothing > -+ * has been mounted on top of this Unionfs stack. Once we have /odf > -+ * and cache-coherency resolved, we'll address the branch-path > -+ * uniqueness. > -+ */ > -+ err = kern_path(optarg, LOOKUP_FOLLOW, &path); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: error accessing " > -+ "lower directory \"%s\" (error %d)\n", > -+ optarg, err); > -+ goto out; > -+ } > -+ for (idx = 0; idx < cur_branches; idx++) > -+ if (path.mnt == new_lower_paths[idx].mnt && > -+ path.dentry == new_lower_paths[idx].dentry) > -+ break; > -+ path_put(&path); /* no longer needed */ > -+ if (idx == cur_branches) { > -+ err = -ENOENT; /* err may have been reset above */ > -+ printk(KERN_ERR "unionfs: branch \"%s\" " > -+ "not found\n", optarg); > -+ goto out; > -+ } > -+ /* check/change mode for existing branch */ > -+ /* we don't warn if perms==branchperms */ > -+ new_data[idx].branchperms = perms; > -+ err = 0; > -+out: > -+ return err; > -+} > -+ > -+/* handle branch deletion during remount */ > -+static noinline_for_stack int do_remount_del_option( > -+ char *optarg, int cur_branches, > -+ struct unionfs_data *new_data, > -+ struct path *new_lower_paths) > -+{ > -+ int err = -EINVAL; > -+ int idx; > -+ struct path path; > -+ > -+ /* optarg contains the branch name to delete */ > -+ > -+ /* > -+ * Find matching branch index. For now, this assumes that nothing > -+ * has been mounted on top of this Unionfs stack. Once we have /odf > -+ * and cache-coherency resolved, we'll address the branch-path > -+ * uniqueness. > -+ */ > -+ err = kern_path(optarg, LOOKUP_FOLLOW, &path); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: error accessing " > -+ "lower directory \"%s\" (error %d)\n", > -+ optarg, err); > -+ goto out; > -+ } > -+ for (idx = 0; idx < cur_branches; idx++) > -+ if (path.mnt == new_lower_paths[idx].mnt && > -+ path.dentry == new_lower_paths[idx].dentry) > -+ break; > -+ path_put(&path); /* no longer needed */ > -+ if (idx == cur_branches) { > -+ printk(KERN_ERR "unionfs: branch \"%s\" " > -+ "not found\n", optarg); > -+ err = -ENOENT; > -+ goto out; > -+ } > -+ /* check if there are any open files on the branch to be deleted */ > -+ if (atomic_read(&new_data[idx].open_files) > 0) { > -+ err = -EBUSY; > -+ goto out; > -+ } > -+ > -+ /* > -+ * Now we have to delete the branch. First, release any handles it > -+ * has. Then, move the remaining array indexes past "idx" in > -+ * new_data and new_lower_paths one to the left. Finally, adjust > -+ * cur_branches. > -+ */ > -+ path_put(&new_lower_paths[idx]); > -+ > -+ if (idx < cur_branches - 1) { > -+ /* if idx==cur_branches-1, we delete last branch: easy */ > -+ memmove(&new_data[idx], &new_data[idx+1], > -+ (cur_branches - 1 - idx) * > -+ sizeof(struct unionfs_data)); > -+ memmove(&new_lower_paths[idx], > &new_lower_paths[idx+1], > -+ (cur_branches - 1 - idx) * sizeof(struct path)); > -+ } > -+ > -+ err = 0; > -+out: > -+ return err; > -+} > -+ > -+/* handle branch insertion during remount */ > -+static noinline_for_stack int do_remount_add_option( > -+ char *optarg, int cur_branches, > -+ struct unionfs_data *new_data, > -+ struct path *new_lower_paths, > -+ int *high_branch_id) > -+{ > -+ int err = -EINVAL; > -+ int perms; > -+ int idx = 0; /* default: insert at beginning */ > -+ char *new_branch , *modename = NULL; > -+ struct path path; > -+ > -+ /* > -+ * optarg can be of several forms: > -+ * > -+ * /bar:/foo insert /foo before /bar > -+ * /bar:/foo=ro insert /foo in ro mode before /bar > -+ * /foo insert /foo in the beginning (prepend) > -+ * :/foo insert /foo at the end (append) > -+ */ > -+ if (*optarg == ':') { /* append? */ > -+ new_branch = optarg + 1; /* skip ':' */ > -+ idx = cur_branches; > -+ goto found_insertion_point; > -+ } > -+ new_branch = strchr(optarg, ':'); > -+ if (!new_branch) { /* prepend? */ > -+ new_branch = optarg; > -+ goto found_insertion_point; > -+ } > -+ *new_branch++ = '\0'; /* holds path+mode of new branch */ > -+ > -+ /* > -+ * Find matching branch index. For now, this assumes that nothing > -+ * has been mounted on top of this Unionfs stack. Once we have /odf > -+ * and cache-coherency resolved, we'll address the branch-path > -+ * uniqueness. > -+ */ > -+ err = kern_path(optarg, LOOKUP_FOLLOW, &path); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: error accessing " > -+ "lower directory \"%s\" (error %d)\n", > -+ optarg, err); > -+ goto out; > -+ } > -+ for (idx = 0; idx < cur_branches; idx++) > -+ if (path.mnt == new_lower_paths[idx].mnt && > -+ path.dentry == new_lower_paths[idx].dentry) > -+ break; > -+ path_put(&path); /* no longer needed */ > -+ if (idx == cur_branches) { > -+ printk(KERN_ERR "unionfs: branch \"%s\" " > -+ "not found\n", optarg); > -+ err = -ENOENT; > -+ goto out; > -+ } > -+ > -+ /* > -+ * At this point idx will hold the index where the new branch should > -+ * be inserted before. > -+ */ > -+found_insertion_point: > -+ /* find the mode for the new branch */ > -+ if (new_branch) > -+ modename = strchr(new_branch, '='); > -+ if (modename) > -+ *modename++ = '\0'; > -+ if (!new_branch || !*new_branch) { > -+ printk(KERN_ERR "unionfs: null new branch\n"); > -+ err = -EINVAL; > -+ goto out; > -+ } > -+ err = parse_branch_mode(modename, &perms); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: invalid mode \"%s\" for " > -+ "branch \"%s\"\n", modename, new_branch); > -+ goto out; > -+ } > -+ err = kern_path(new_branch, LOOKUP_FOLLOW, &path); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: error accessing " > -+ "lower directory \"%s\" (error %d)\n", > -+ new_branch, err); > -+ goto out; > -+ } > -+ /* > -+ * It's probably safe to check_mode the new branch to insert. Note: > -+ * we don't allow inserting branches which are unionfs's by > -+ * themselves (check_branch returns EINVAL in that case). This is > -+ * because this code base doesn't support stacking unionfs: the ODF > -+ * code base supports that correctly. > -+ */ > -+ err = check_branch(&path); > -+ if (err) { > -+ printk(KERN_ERR "unionfs: lower directory " > -+ "\"%s\" is not a valid branch\n", optarg); > -+ path_put(&path); > -+ goto out; > -+ } > -+ > -+ /* > -+ * Now we have to insert the new branch. But first, move the bits > -+ * to make space for the new branch, if needed. Finally, adjust > -+ * cur_branches. > -+ * We don't release nd here; it's kept until umount/remount. > -+ */ > -+ if (idx < cur_branches) { > -+ /* if idx==cur_branches, we append: easy */ > -+ memmove(&new_data[idx+1], &new_data[idx], > -+ (cur_branches - idx) * sizeof(struct unionfs_data)); > -+ memmove(&new_lower_paths[idx+1], > &new_lower_paths[idx], > -+ (cur_branches - idx) * sizeof(struct path)); > -+ } > -+ new_lower_paths[idx].dentry = path.dentry; > -+ new_lower_paths[idx].mnt = path.mnt; > -+ > -+ new_data[idx].sb = path.dentry->d_sb; > -+ atomic_set(&new_data[idx].open_files, 0); > -+ new_data[idx].branchperms = perms; > -+ new_data[idx].branch_id = ++*high_branch_id; /* assign new branch > ID */ > -+ > -+ err = 0; > -+out: > -+ return err; > -+} > -+ > -+ > -+/* > -+ * Support branch management options on remount. > -+ * > -+ * See Documentation/filesystems/unionfs/ for details. > -+ * > -+ * @flags: numeric mount options > -+ * @options: mount options string > -+ * > -+ * This function can rearrange a mounted union dynamically, adding and > -+ * removing branches, including changing branch modes. Clearly this has to > -+ * be done safely and atomically. Luckily, the VFS already calls this > -+ * function with lock_super(sb) and lock_kernel() held, preventing > -+ * concurrent mixing of new mounts, remounts, and unmounts. Moreover, > -+ * do_remount_sb(), our caller function, already called shrink_dcache_sb(sb) > -+ * to purge dentries/inodes from our superblock, and also called > -+ * fsync_super(sb) to purge any dirty pages. So we're good. > -+ * > -+ * XXX: however, our remount code may also need to invalidate mapped > pages > -+ * so as to force them to be re-gotten from the (newly reconfigured) lower > -+ * branches. This has to wait for proper mmap and cache coherency support > -+ * in the VFS. > -+ * > -+ */ > -+static int unionfs_remount_fs(struct super_block *sb, int *flags, > -+ char *options) > -+{ > -+ int err = 0; > -+ int i; > -+ char *optionstmp, *tmp_to_free; /* kstrdup'ed of "options" */ > -+ char *optname; > -+ int cur_branches = 0; /* no. of current branches */ > -+ int new_branches = 0; /* no. of branches actually left in the end */ > -+ int add_branches; /* est. no. of branches to add */ > -+ int del_branches; /* est. no. of branches to del */ > -+ int max_branches; /* max possible no. of branches */ > -+ struct unionfs_data *new_data = NULL, *tmp_data = NULL; > -+ struct path *new_lower_paths = NULL, *tmp_lower_paths = NULL; > -+ struct inode **new_lower_inodes = NULL; > -+ int new_high_branch_id; /* new high branch ID */ > -+ int size; /* memory allocation size, temp var */ > -+ int old_ibstart, old_ibend; > -+ > -+ unionfs_write_lock(sb); > -+ > -+ /* > -+ * The VFS will take care of "ro" and "rw" flags, and we can safely > -+ * ignore MS_SILENT, but anything else left over is an error. So we > -+ * need to check if any other flags may have been passed (none are > -+ * allowed/supported as of now). > -+ */ > -+ if ((*flags & ~(MS_RDONLY | MS_SILENT)) != 0) { > -+ printk(KERN_ERR > -+ "unionfs: remount flags 0x%x unsupported\n", *flags); > -+ err = -EINVAL; > -+ goto out_error; > -+ } > -+ > -+ /* > -+ * If 'options' is NULL, it's probably because the user just changed > -+ * the union to a "ro" or "rw" and the VFS took care of it. So > -+ * nothing to do and we're done. > -+ */ > -+ if (!options || options[0] == '\0') > -+ goto out_error; > -+ > -+ /* > -+ * Find out how many branches we will have in the end, counting > -+ * "add" and "del" commands. Copy the "options" string because > -+ * strsep modifies the string and we need it later. > -+ */ > -+ tmp_to_free = kstrdup(options, GFP_KERNEL); > -+ optionstmp = tmp_to_free; > -+ if (unlikely(!optionstmp)) { > -+ err = -ENOMEM; > -+ goto out_free; > -+ } > -+ cur_branches = sbmax(sb); /* current no. branches */ > -+ new_branches = sbmax(sb); > -+ del_branches = 0; > -+ add_branches = 0; > -+ new_high_branch_id = sbhbid(sb); /* save current high_branch_id */ > -+ while ((optname = strsep(&optionstmp, ",")) != NULL) { > -+ char *optarg; > -+ > -+ if (!optname || !*optname) > -+ continue; > -+ > -+ optarg = strchr(optname, '='); > -+ if (optarg) > -+ *optarg++ = '\0'; > -+ > -+ if (!strcmp("add", optname)) > -+ add_branches++; > -+ else if (!strcmp("del", optname)) > -+ del_branches++; > -+ } > -+ kfree(tmp_to_free); > -+ /* after all changes, will we have at least one branch left? */ > -+ if ((new_branches + add_branches - del_branches) < 1) { > -+ printk(KERN_ERR > -+ "unionfs: no branches left after remount\n"); > -+ err = -EINVAL; > -+ goto out_free; > -+ } > -+ > -+ /* > -+ * Since we haven't actually parsed all the add/del options, nor > -+ * have we checked them for errors, we don't know for sure how many > -+ * branches we will have after all changes have taken place. In > -+ * fact, the total number of branches left could be less than what > -+ * we have now. So we need to allocate space for a temporary > -+ * placeholder that is at least as large as the maximum number of > -+ * branches we *could* have, which is the current number plus all > -+ * the additions. Once we're done with these temp placeholders, we > -+ * may have to re-allocate the final size, copy over from the temp, > -+ * and then free the temps (done near the end of this function). > -+ */ > -+ max_branches = cur_branches + add_branches; > -+ /* allocate space for new pointers to lower dentry */ > -+ tmp_data = kcalloc(max_branches, > -+ sizeof(struct unionfs_data), GFP_KERNEL); > -+ if (unlikely(!tmp_data)) { > -+ err = -ENOMEM; > -+ goto out_free; > -+ } > -+ /* allocate space for new pointers to lower paths */ > -+ tmp_lower_paths = kcalloc(max_branches, > -+ sizeof(struct path), GFP_KERNEL); > -+ if (unlikely(!tmp_lower_paths)) { > -+ err = -ENOMEM; > -+ goto out_free; > -+ } > -+ /* copy current info into new placeholders, incrementing refcnts */ > -+ memcpy(tmp_data, UNIONFS_SB(sb)->data, > -+ cur_branches * sizeof(struct unionfs_data)); > -+ memcpy(tmp_lower_paths, UNIONFS_D(sb->s_root)->lower_paths, > -+ cur_branches * sizeof(struct path)); > -+ for (i = 0; i < cur_branches; i++) > -+ path_get(&tmp_lower_paths[i]); /* drop refs at end of fxn */ > -+ > -+ > /****************************************************** > ************* > -+ * For each branch command, do kern_path on the requested branch, > -+ * and apply the change to a temp branch list. To handle errors, we > -+ * already dup'ed the old arrays (above), and increased the refcnts > -+ * on various f/s objects. So now we can do all the kern_path'ss > -+ * and branch-management commands on the new arrays. If it fail mid > -+ * way, we free the tmp arrays and *put all objects. If we succeed, > -+ * then we free old arrays and *put its objects, and then replace > -+ * the arrays with the new tmp list (we may have to re-allocate the > -+ * memory because the temp lists could have been larger than what we > -+ * actually needed). > -+ > ************************************************************* > ******/ > -+ > -+ while ((optname = strsep(&options, ",")) != NULL) { > -+ char *optarg; > -+ > -+ if (!optname || !*optname) > -+ continue; > -+ /* > -+ * At this stage optname holds a comma-delimited option, but > -+ * without the commas. Next, we need to break the string on > -+ * the '=' symbol to separate CMD=ARG, where ARG itself can > -+ * be KEY=VAL. For example, in mode=/foo=rw, CMD is > "mode", > -+ * KEY is "/foo", and VAL is "rw". > -+ */ > -+ optarg = strchr(optname, '='); > -+ if (optarg) > -+ *optarg++ = '\0'; > -+ /* incgen remount option (instead of old ioctl) */ > -+ if (!strcmp("incgen", optname)) { > -+ err = 0; > -+ goto out_no_change; > -+ } > -+ > -+ /* > -+ * All of our options take an argument now. (Insert ones > -+ * that don't above this check.) So at this stage optname > -+ * contains the CMD part and optarg contains the ARG part. > -+ */ > -+ if (!optarg || !*optarg) { > -+ printk(KERN_ERR "unionfs: all remount options require > " > -+ "an argument (%s)\n", optname); > -+ err = -EINVAL; > -+ goto out_release; > -+ } > -+ > -+ if (!strcmp("add", optname)) { > -+ err = do_remount_add_option(optarg, new_branches, > -+ tmp_data, > -+ tmp_lower_paths, > -+ &new_high_branch_id); > -+ if (err) > -+ goto out_release; > -+ new_branches++; > -+ if (new_branches > UNIONFS_MAX_BRANCHES) { > -+ printk(KERN_ERR "unionfs: command exceeds > " > -+ "%d branches\n", > UNIONFS_MAX_BRANCHES); > -+ err = -E2BIG; > -+ goto out_release; > -+ } > -+ continue; > -+ } > -+ if (!strcmp("del", optname)) { > -+ err = do_remount_del_option(optarg, new_branches, > -+ tmp_data, > -+ tmp_lower_paths); > -+ if (err) > -+ goto out_release; > -+ new_branches--; > -+ continue; > -+ } > -+ if (!strcmp("mode", optname)) { > -+ err = do_remount_mode_option(optarg, > new_branches, > -+ tmp_data, > -+ tmp_lower_paths); > -+ if (err) > -+ goto out_release; > -+ continue; > -+ } > -+ > -+ /* > -+ * When you use "mount -o remount,ro", mount(8) will > -+ * reportedly pass the original dirs= string from > -+ * /proc/mounts. So for now, we have to ignore dirs= and > -+ * not consider it an error, unless we want to allow users > -+ * to pass dirs= in remount. Note that to allow the VFS to > -+ * actually process the ro/rw remount options, we have to > -+ * return 0 from this function. > -+ */ > -+ if (!strcmp("dirs", optname)) { > -+ printk(KERN_WARNING > -+ "unionfs: remount ignoring option \"%s\"\n", > -+ optname); > -+ continue; > -+ } > -+ > -+ err = -EINVAL; > -+ printk(KERN_ERR > -+ "unionfs: unrecognized option \"%s\"\n", optname); > -+ goto out_release; > -+ } > -+ > -+out_no_change: > -+ > -+ > /****************************************************** > ************ > -+ * WE'RE ALMOST DONE: check if leftmost branch might be read-only, > -+ * see if we need to allocate a small-sized new vector, copy the > -+ * vectors to their correct place, release the refcnt of the older > -+ * ones, and return. Also handle invalidating any pages that will > -+ * have to be re-read. > -+ > ************************************************************* > ******/ > -+ > -+ if (!(tmp_data[0].branchperms & MAY_WRITE)) { > -+ printk(KERN_ERR "unionfs: leftmost branch cannot be read- > only " > -+ "(use \"remount,ro\" to create a read-only union)\n"); > -+ err = -EINVAL; > -+ goto out_release; > -+ } > -+ > -+ /* (re)allocate space for new pointers to lower dentry */ > -+ size = new_branches * sizeof(struct unionfs_data); > -+ new_data = krealloc(tmp_data, size, GFP_KERNEL); > -+ if (unlikely(!new_data)) { > -+ err = -ENOMEM; > -+ goto out_release; > -+ } > -+ > -+ /* allocate space for new pointers to lower paths */ > -+ size = new_branches * sizeof(struct path); > -+ new_lower_paths = krealloc(tmp_lower_paths, size, GFP_KERNEL); > -+ if (unlikely(!new_lower_paths)) { > -+ err = -ENOMEM; > -+ goto out_release; > -+ } > -+ > -+ /* allocate space for new pointers to lower inodes */ > -+ new_lower_inodes = kcalloc(new_branches, > -+ sizeof(struct inode *), GFP_KERNEL); > -+ if (unlikely(!new_lower_inodes)) { > -+ err = -ENOMEM; > -+ goto out_release; > -+ } > -+ > -+ /* > -+ * OK, just before we actually put the new set of branches in place, > -+ * we need to ensure that our own f/s has no dirty objects left. > -+ * Luckily, do_remount_sb() already calls shrink_dcache_sb(sb) and > -+ * fsync_super(sb), taking care of dentries, inodes, and dirty > -+ * pages. So all that's left is for us to invalidate any leftover > -+ * (non-dirty) pages to ensure that they will be re-read from the > -+ * new lower branches (and to support mmap). > -+ */ > -+ > -+ /* > -+ * Once we finish the remounting successfully, our superblock > -+ * generation number will have increased. This will be detected by > -+ * our dentry-revalidation code upon subsequent f/s operations > -+ * through unionfs. The revalidation code will rebuild the union of > -+ * lower inodes for a given unionfs inode and invalidate any pages > -+ * of such "stale" inodes (by calling our purge_inode_data > -+ * function). This revalidation will happen lazily and > -+ * incrementally, as users perform operations on cached inodes. We > -+ * would like to encourage this revalidation to happen sooner if > -+ * possible, so we like to try to invalidate as many other pages in > -+ * our superblock as we can. We used to call drop_pagecache_sb() or > -+ * a variant thereof, but either method was racy (drop_caches alone > -+ * is known to be racy). So now we let the revalidation happen on a > -+ * per file basis in ->d_revalidate. > -+ */ > -+ > -+ /* grab new lower super references; release old ones */ > -+ for (i = 0; i < new_branches; i++) > -+ atomic_inc(&new_data[i].sb->s_active); > -+ for (i = 0; i < sbmax(sb); i++) > -+ atomic_dec(&UNIONFS_SB(sb)->data[i].sb->s_active); > -+ > -+ /* copy new vectors into their correct place */ > -+ tmp_data = UNIONFS_SB(sb)->data; > -+ UNIONFS_SB(sb)->data = new_data; > -+ new_data = NULL; /* so don't free good pointers below */ > -+ tmp_lower_paths = UNIONFS_D(sb->s_root)->lower_paths; > -+ UNIONFS_D(sb->s_root)->lower_paths = new_lower_paths; > -+ new_lower_paths = NULL; /* so don't free good pointers below > */ > -+ > -+ /* update our unionfs_sb_info and root dentry index of last branch */ > -+ i = sbmax(sb); /* save no. of branches to release at end */ > -+ sbend(sb) = new_branches - 1; > -+ dbend(sb->s_root) = new_branches - 1; > -+ old_ibstart = ibstart(sb->s_root->d_inode); > -+ old_ibend = ibend(sb->s_root->d_inode); > -+ ibend(sb->s_root->d_inode) = new_branches - 1; > -+ UNIONFS_D(sb->s_root)->bcount = new_branches; > -+ new_branches = i; /* no. of branches to release below */ > -+ > -+ /* > -+ * Update lower inodes: 3 steps > -+ * 1. grab ref on all new lower inodes > -+ */ > -+ for (i = dbstart(sb->s_root); i <= dbend(sb->s_root); i++) { > -+ struct dentry *lower_dentry = > -+ unionfs_lower_dentry_idx(sb->s_root, i); > -+ igrab(lower_dentry->d_inode); > -+ new_lower_inodes[i] = lower_dentry->d_inode; > -+ } > -+ /* 2. release reference on all older lower inodes */ > -+ iput_lowers(sb->s_root->d_inode, old_ibstart, old_ibend, true); > -+ /* 3. update root dentry's inode to new lower_inodes array */ > -+ UNIONFS_I(sb->s_root->d_inode)->lower_inodes = > new_lower_inodes; > -+ new_lower_inodes = NULL; > -+ > -+ /* maxbytes may have changed */ > -+ sb->s_maxbytes = unionfs_lower_super_idx(sb, 0)->s_maxbytes; > -+ /* update high branch ID */ > -+ sbhbid(sb) = new_high_branch_id; > -+ > -+ /* update our sb->generation for revalidating objects */ > -+ i = atomic_inc_return(&UNIONFS_SB(sb)->generation); > -+ atomic_set(&UNIONFS_D(sb->s_root)->generation, i); > -+ atomic_set(&UNIONFS_I(sb->s_root->d_inode)->generation, i); > -+ if (!(*flags & MS_SILENT)) > -+ pr_info("unionfs: %s: new generation number %d\n", > -+ UNIONFS_SB(sb)->dev_name, i); > -+ /* finally, update the root dentry's times */ > -+ unionfs_copy_attr_times(sb->s_root->d_inode); > -+ err = 0; /* reset to success */ > -+ > -+ /* > -+ * The code above falls through to the next label, and releases the > -+ * refcnts of the older ones (stored in tmp_*): if we fell through > -+ * here, it means success. However, if we jump directly to this > -+ * label from any error above, then an error occurred after we > -+ * grabbed various refcnts, and so we have to release the > -+ * temporarily constructed structures. > -+ */ > -+out_release: > -+ /* no need to cleanup/release anything in tmp_data */ > -+ if (tmp_lower_paths) > -+ for (i = 0; i < new_branches; i++) > -+ path_put(&tmp_lower_paths[i]); > -+out_free: > -+ kfree(tmp_lower_paths); > -+ kfree(tmp_data); > -+ kfree(new_lower_paths); > -+ kfree(new_data); > -+ kfree(new_lower_inodes); > -+out_error: > -+ unionfs_check_dentry(sb->s_root); > -+ unionfs_write_unlock(sb); > -+ return err; > -+} > -+ > -+/* > -+ * Called by iput() when the inode reference count reached zero > -+ * and the inode is not hashed anywhere. Used to clear anything > -+ * that needs to be, before the inode is completely destroyed and put > -+ * on the inode free list. > -+ * > -+ * No need to lock sb info's rwsem. > -+ */ > -+static void unionfs_evict_inode(struct inode *inode) > -+{ > -+ int bindex, bstart, bend; > -+ struct inode *lower_inode; > -+ struct list_head *pos, *n; > -+ struct unionfs_dir_state *rdstate; > -+ > -+ truncate_inode_pages(&inode->i_data, 0); > -+ end_writeback(inode); > -+ > -+ list_for_each_safe(pos, n, &UNIONFS_I(inode)->readdircache) { > -+ rdstate = list_entry(pos, struct unionfs_dir_state, cache); > -+ list_del(&rdstate->cache); > -+ free_rdstate(rdstate); > -+ } > -+ > -+ /* > -+ * Decrement a reference to a lower_inode, which was incremented > -+ * by our read_inode when it was created initially. > -+ */ > -+ bstart = ibstart(inode); > -+ bend = ibend(inode); > -+ if (bstart >= 0) { > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_inode = unionfs_lower_inode_idx(inode, > bindex); > -+ if (!lower_inode) > -+ continue; > -+ unionfs_set_lower_inode_idx(inode, bindex, NULL); > -+ /* see Documentation/filesystems/unionfs/issues.txt */ > -+ lockdep_off(); > -+ iput(lower_inode); > -+ lockdep_on(); > -+ } > -+ } > -+ > -+ kfree(UNIONFS_I(inode)->lower_inodes); > -+ UNIONFS_I(inode)->lower_inodes = NULL; > -+} > -+ > -+static struct inode *unionfs_alloc_inode(struct super_block *sb) > -+{ > -+ struct unionfs_inode_info *i; > -+ > -+ i = kmem_cache_alloc(unionfs_inode_cachep, GFP_KERNEL); > -+ if (unlikely(!i)) > -+ return NULL; > -+ > -+ /* memset everything up to the inode to 0 */ > -+ memset(i, 0, offsetof(struct unionfs_inode_info, vfs_inode)); > -+ > -+ i->vfs_inode.i_version = 1; > -+ return &i->vfs_inode; > -+} > -+ > -+static void unionfs_destroy_inode(struct inode *inode) > -+{ > -+ kmem_cache_free(unionfs_inode_cachep, UNIONFS_I(inode)); > -+} > -+ > -+/* unionfs inode cache constructor */ > -+static void init_once(void *obj) > -+{ > -+ struct unionfs_inode_info *i = obj; > -+ > -+ inode_init_once(&i->vfs_inode); > -+} > -+ > -+int unionfs_init_inode_cache(void) > -+{ > -+ int err = 0; > -+ > -+ unionfs_inode_cachep = > -+ kmem_cache_create("unionfs_inode_cache", > -+ sizeof(struct unionfs_inode_info), 0, > -+ SLAB_RECLAIM_ACCOUNT, init_once); > -+ if (unlikely(!unionfs_inode_cachep)) > -+ err = -ENOMEM; > -+ return err; > -+} > -+ > -+/* unionfs inode cache destructor */ > -+void unionfs_destroy_inode_cache(void) > -+{ > -+ if (unionfs_inode_cachep) > -+ kmem_cache_destroy(unionfs_inode_cachep); > -+} > -+ > -+/* > -+ * Called when we have a dirty inode, right here we only throw out > -+ * parts of our readdir list that are too old. > -+ * > -+ * No need to grab sb info's rwsem. > -+ */ > -+static int unionfs_write_inode(struct inode *inode, > -+ struct writeback_control *wbc) > -+{ > -+ struct list_head *pos, *n; > -+ struct unionfs_dir_state *rdstate; > -+ > -+ spin_lock(&UNIONFS_I(inode)->rdlock); > -+ list_for_each_safe(pos, n, &UNIONFS_I(inode)->readdircache) { > -+ rdstate = list_entry(pos, struct unionfs_dir_state, cache); > -+ /* We keep this list in LRU order. */ > -+ if ((rdstate->access + RDCACHE_JIFFIES) > jiffies) > -+ break; > -+ UNIONFS_I(inode)->rdcount--; > -+ list_del(&rdstate->cache); > -+ free_rdstate(rdstate); > -+ } > -+ spin_unlock(&UNIONFS_I(inode)->rdlock); > -+ > -+ return 0; > -+} > -+ > -+/* > -+ * Used only in nfs, to kill any pending RPC tasks, so that subsequent > -+ * code can actually succeed and won't leave tasks that need handling. > -+ */ > -+static void unionfs_umount_begin(struct super_block *sb) > -+{ > -+ struct super_block *lower_sb; > -+ int bindex, bstart, bend; > -+ > -+ unionfs_read_lock(sb, UNIONFS_SMUTEX_CHILD); > -+ > -+ bstart = sbstart(sb); > -+ bend = sbend(sb); > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_sb = unionfs_lower_super_idx(sb, bindex); > -+ > -+ if (lower_sb && lower_sb->s_op && > -+ lower_sb->s_op->umount_begin) > -+ lower_sb->s_op->umount_begin(lower_sb); > -+ } > -+ > -+ unionfs_read_unlock(sb); > -+} > -+ > -+static int unionfs_show_options(struct seq_file *m, struct vfsmount *mnt) > -+{ > -+ struct super_block *sb = mnt->mnt_sb; > -+ int ret = 0; > -+ char *tmp_page; > -+ char *path; > -+ int bindex, bstart, bend; > -+ int perms; > -+ > -+ /* to prevent a silly lockdep warning with namespace_sem */ > -+ lockdep_off(); > -+ unionfs_read_lock(sb, UNIONFS_SMUTEX_CHILD); > -+ unionfs_lock_dentry(sb->s_root, UNIONFS_DMUTEX_CHILD); > -+ > -+ tmp_page = (char *) __get_free_page(GFP_KERNEL); > -+ if (unlikely(!tmp_page)) { > -+ ret = -ENOMEM; > -+ goto out; > -+ } > -+ > -+ bstart = sbstart(sb); > -+ bend = sbend(sb); > -+ > -+ seq_printf(m, ",dirs="); > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ struct path p; > -+ p.dentry = unionfs_lower_dentry_idx(sb->s_root, bindex); > -+ p.mnt = unionfs_lower_mnt_idx(sb->s_root, bindex); > -+ path = d_path(&p, tmp_page, PAGE_SIZE); > -+ if (IS_ERR(path)) { > -+ ret = PTR_ERR(path); > -+ goto out; > -+ } > -+ > -+ perms = branchperms(sb, bindex); > -+ > -+ seq_printf(m, "%s=%s", path, > -+ perms & MAY_WRITE ? "rw" : "ro"); > -+ if (bindex != bend) > -+ seq_printf(m, ":"); > -+ } > -+ > -+out: > -+ free_page((unsigned long) tmp_page); > -+ > -+ unionfs_unlock_dentry(sb->s_root); > -+ unionfs_read_unlock(sb); > -+ lockdep_on(); > -+ > -+ return ret; > -+} > -+ > -+struct super_operations unionfs_sops = { > -+ .put_super = unionfs_put_super, > -+ .statfs = unionfs_statfs, > -+ .remount_fs = unionfs_remount_fs, > -+ .evict_inode = unionfs_evict_inode, > -+ .umount_begin = unionfs_umount_begin, > -+ .show_options = unionfs_show_options, > -+ .write_inode = unionfs_write_inode, > -+ .alloc_inode = unionfs_alloc_inode, > -+ .destroy_inode = unionfs_destroy_inode, > -+}; > -diff --git a/fs/unionfs/union.h b/fs/unionfs/union.h > -new file mode 100644 > -index 0000000..1821705 > ---- /dev/null > -+++ b/fs/unionfs/union.h > -@@ -0,0 +1,679 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#ifndef _UNION_H_ > -+#define _UNION_H_ > -+ > -+#include <linux/dcache.h> > -+#include <linux/file.h> > -+#include <linux/list.h> > -+#include <linux/fs.h> > -+#include <linux/mm.h> > -+#include <linux/module.h> > -+#include <linux/mount.h> > -+#include <linux/namei.h> > -+#include <linux/page-flags.h> > -+#include <linux/pagemap.h> > -+#include <linux/poll.h> > -+#include <linux/security.h> > -+#include <linux/seq_file.h> > -+#include <linux/slab.h> > -+#include <linux/spinlock.h> > -+#include <linux/statfs.h> > -+#include <linux/string.h> > -+#include <linux/vmalloc.h> > -+#include <linux/writeback.h> > -+#include <linux/buffer_head.h> > -+#include <linux/xattr.h> > -+#include <linux/fs_stack.h> > -+#include <linux/magic.h> > -+#include <linux/log2.h> > -+#include <linux/poison.h> > -+#include <linux/mman.h> > -+#include <linux/backing-dev.h> > -+#include <linux/splice.h> > -+#include <linux/sched.h> > -+ > -+#include <asm/system.h> > -+ > -+#include <linux/union_fs.h> > -+ > -+/* the file system name */ > -+#define UNIONFS_NAME "unionfs" > -+ > -+/* unionfs root inode number */ > -+#define UNIONFS_ROOT_INO 1 > -+ > -+/* number of times we try to get a unique temporary file name */ > -+#define GET_TMPNAM_MAX_RETRY 5 > -+ > -+/* maximum number of branches we support, to avoid memory blowup */ > -+#define UNIONFS_MAX_BRANCHES 128 > -+ > -+/* minimum time (seconds) required for time-based cache-coherency */ > -+#define UNIONFS_MIN_CC_TIME 3 > -+ > -+/* Operations vectors defined in specific files. */ > -+extern struct file_operations unionfs_main_fops; > -+extern struct file_operations unionfs_dir_fops; > -+extern struct inode_operations unionfs_main_iops; > -+extern struct inode_operations unionfs_dir_iops; > -+extern struct inode_operations unionfs_symlink_iops; > -+extern struct super_operations unionfs_sops; > -+extern struct dentry_operations unionfs_dops; > -+extern struct address_space_operations unionfs_aops, > unionfs_dummy_aops; > -+extern struct vm_operations_struct unionfs_vm_ops; > -+ > -+/* How long should an entry be allowed to persist */ > -+#define RDCACHE_JIFFIES (5*HZ) > -+ > -+/* compatibility with Real-Time patches */ > -+#ifdef CONFIG_PREEMPT_RT > -+# define unionfs_rw_semaphore compat_rw_semaphore > -+#else /* not CONFIG_PREEMPT_RT */ > -+# define unionfs_rw_semaphore rw_semaphore > -+#endif /* not CONFIG_PREEMPT_RT */ > -+ > -+/* file private data. */ > -+struct unionfs_file_info { > -+ int bstart; > -+ int bend; > -+ atomic_t generation; > -+ > -+ struct unionfs_dir_state *rdstate; > -+ struct file **lower_files; > -+ int *saved_branch_ids; /* IDs of branches when file was opened */ > -+ const struct vm_operations_struct *lower_vm_ops; > -+ bool wrote_to_file; /* for delayed copyup */ > -+}; > -+ > -+/* unionfs inode data in memory */ > -+struct unionfs_inode_info { > -+ int bstart; > -+ int bend; > -+ atomic_t generation; > -+ /* Stuff for readdir over NFS. */ > -+ spinlock_t rdlock; > -+ struct list_head readdircache; > -+ int rdcount; > -+ int hashsize; > -+ int cookie; > -+ > -+ /* The lower inodes */ > -+ struct inode **lower_inodes; > -+ > -+ struct inode vfs_inode; > -+}; > -+ > -+/* unionfs dentry data in memory */ > -+struct unionfs_dentry_info { > -+ /* > -+ * The semaphore is used to lock the dentry as soon as we get into a > -+ * unionfs function from the VFS. Our lock ordering is that children > -+ * go before their parents. > -+ */ > -+ struct mutex lock; > -+ int bstart; > -+ int bend; > -+ int bopaque; > -+ int bcount; > -+ atomic_t generation; > -+ struct path *lower_paths; > -+}; > -+ > -+/* These are the pointers to our various objects. */ > -+struct unionfs_data { > -+ struct super_block *sb; /* lower super_block */ > -+ atomic_t open_files; /* number of open files on branch */ > -+ int branchperms; > -+ int branch_id; /* unique branch ID at re/mount time */ > -+}; > -+ > -+/* unionfs super-block data in memory */ > -+struct unionfs_sb_info { > -+ int bend; > -+ > -+ atomic_t generation; > -+ > -+ /* > -+ * This rwsem is used to make sure that a branch management > -+ * operation... > -+ * 1) will not begin before all currently in-flight operations > -+ * complete. > -+ * 2) any new operations do not execute until the currently > -+ * running branch management operation completes. > -+ * > -+ * The write_lock_owner records the PID of the task which grabbed > -+ * the rw_sem for writing. If the same task also tries to grab the > -+ * read lock, we allow it. This prevents a self-deadlock when > -+ * branch-management is used on a pivot_root'ed union, because we > -+ * have to ->lookup paths which belong to the same union. > -+ */ > -+ struct unionfs_rw_semaphore rwsem; > -+ pid_t write_lock_owner; /* PID of rw_sem owner (write lock) > */ > -+ int high_branch_id; /* last unique branch ID given */ > -+ char *dev_name; /* to identify different unions in > pr_debug */ > -+ struct unionfs_data *data; > -+}; > -+ > -+/* > -+ * structure for making the linked list of entries by readdir on left branch > -+ * to compare with entries on right branch > -+ */ > -+struct filldir_node { > -+ struct list_head file_list; /* list for directory entries */ > -+ char *name; /* name entry */ > -+ int hash; /* name hash */ > -+ int namelen; /* name len since name is not 0 terminated */ > -+ > -+ /* > -+ * we can check for duplicate whiteouts and files in the same branch > -+ * in order to return -EIO. > -+ */ > -+ int bindex; > -+ > -+ /* is this a whiteout entry? */ > -+ int whiteout; > -+ > -+ /* Inline name, so we don't need to separately kmalloc small ones */ > -+ char iname[DNAME_INLINE_LEN]; > -+}; > -+ > -+/* Directory hash table. */ > -+struct unionfs_dir_state { > -+ unsigned int cookie; /* the cookie, based off of rdversion */ > -+ unsigned int offset; /* The entry we have returned. */ > -+ int bindex; > -+ loff_t dirpos; /* offset within the lower level directory */ > -+ int size; /* How big is the hash table? */ > -+ int hashentries; /* How many entries have been inserted? */ > -+ unsigned long access; > -+ > -+ /* This cache list is used when the inode keeps us around. */ > -+ struct list_head cache; > -+ struct list_head list[0]; > -+}; > -+ > -+/* externs needed for fanout.h or sioq.h */ > -+extern int unionfs_get_nlinks(const struct inode *inode); > -+extern void unionfs_copy_attr_times(struct inode *upper); > -+extern void unionfs_copy_attr_all(struct inode *dest, const struct inode *src); > -+ > -+/* include miscellaneous macros */ > -+#include "fanout.h" > -+#include "sioq.h" > -+ > -+/* externs for cache creation/deletion routines */ > -+extern void unionfs_destroy_filldir_cache(void); > -+extern int unionfs_init_filldir_cache(void); > -+extern int unionfs_init_inode_cache(void); > -+extern void unionfs_destroy_inode_cache(void); > -+extern int unionfs_init_dentry_cache(void); > -+extern void unionfs_destroy_dentry_cache(void); > -+ > -+/* Initialize and free readdir-specific state. */ > -+extern int init_rdstate(struct file *file); > -+extern struct unionfs_dir_state *alloc_rdstate(struct inode *inode, > -+ int bindex); > -+extern struct unionfs_dir_state *find_rdstate(struct inode *inode, > -+ loff_t fpos); > -+extern void free_rdstate(struct unionfs_dir_state *state); > -+extern int add_filldir_node(struct unionfs_dir_state *rdstate, > -+ const char *name, int namelen, int bindex, > -+ int whiteout); > -+extern struct filldir_node *find_filldir_node(struct unionfs_dir_state *rdstate, > -+ const char *name, int namelen, > -+ int is_whiteout); > -+ > -+extern struct dentry **alloc_new_dentries(int objs); > -+extern struct unionfs_data *alloc_new_data(int objs); > -+ > -+/* We can only use 32-bits of offset for rdstate --- blech! */ > -+#define DIREOF (0xfffff) > -+#define RDOFFBITS 20 /* This is the number of bits in DIREOF. > */ > -+#define MAXRDCOOKIE (0xfff) > -+/* Turn an rdstate into an offset. */ > -+static inline off_t rdstate2offset(struct unionfs_dir_state *buf) > -+{ > -+ off_t tmp; > -+ > -+ tmp = ((buf->cookie & MAXRDCOOKIE) << RDOFFBITS) > -+ | (buf->offset & DIREOF); > -+ return tmp; > -+} > -+ > -+/* Macros for locking a super_block. */ > -+enum unionfs_super_lock_class { > -+ UNIONFS_SMUTEX_NORMAL, > -+ UNIONFS_SMUTEX_PARENT, /* when locking on behalf of file */ > -+ UNIONFS_SMUTEX_CHILD, /* when locking on behalf of dentry */ > -+}; > -+static inline void unionfs_read_lock(struct super_block *sb, int subclass) > -+{ > -+ if (UNIONFS_SB(sb)->write_lock_owner && > -+ UNIONFS_SB(sb)->write_lock_owner == current->pid) > -+ return; > -+ down_read_nested(&UNIONFS_SB(sb)->rwsem, subclass); > -+} > -+static inline void unionfs_read_unlock(struct super_block *sb) > -+{ > -+ if (UNIONFS_SB(sb)->write_lock_owner && > -+ UNIONFS_SB(sb)->write_lock_owner == current->pid) > -+ return; > -+ up_read(&UNIONFS_SB(sb)->rwsem); > -+} > -+static inline void unionfs_write_lock(struct super_block *sb) > -+{ > -+ down_write(&UNIONFS_SB(sb)->rwsem); > -+ UNIONFS_SB(sb)->write_lock_owner = current->pid; > -+} > -+static inline void unionfs_write_unlock(struct super_block *sb) > -+{ > -+ up_write(&UNIONFS_SB(sb)->rwsem); > -+ UNIONFS_SB(sb)->write_lock_owner = 0; > -+} > -+ > -+static inline void unionfs_double_lock_dentry(struct dentry *d1, > -+ struct dentry *d2) > -+{ > -+ BUG_ON(d1 == d2); > -+ if (d1 < d2) { > -+ unionfs_lock_dentry(d1, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(d2, UNIONFS_DMUTEX_CHILD); > -+ } else { > -+ unionfs_lock_dentry(d2, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(d1, UNIONFS_DMUTEX_CHILD); > -+ } > -+} > -+ > -+static inline void unionfs_double_unlock_dentry(struct dentry *d1, > -+ struct dentry *d2) > -+{ > -+ BUG_ON(d1 == d2); > -+ if (d1 < d2) { /* unlock in reverse order than double_lock_dentry */ > -+ unionfs_unlock_dentry(d1); > -+ unionfs_unlock_dentry(d2); > -+ } else { > -+ unionfs_unlock_dentry(d2); > -+ unionfs_unlock_dentry(d1); > -+ } > -+} > -+ > -+static inline void unionfs_double_lock_parents(struct dentry *p1, > -+ struct dentry *p2) > -+{ > -+ if (p1 == p2) { > -+ unionfs_lock_dentry(p1, UNIONFS_DMUTEX_REVAL_PARENT); > -+ return; > -+ } > -+ if (p1 < p2) { > -+ unionfs_lock_dentry(p1, UNIONFS_DMUTEX_REVAL_PARENT); > -+ unionfs_lock_dentry(p2, UNIONFS_DMUTEX_REVAL_CHILD); > -+ } else { > -+ unionfs_lock_dentry(p2, UNIONFS_DMUTEX_REVAL_PARENT); > -+ unionfs_lock_dentry(p1, UNIONFS_DMUTEX_REVAL_CHILD); > -+ } > -+} > -+ > -+static inline void unionfs_double_unlock_parents(struct dentry *p1, > -+ struct dentry *p2) > -+{ > -+ if (p1 == p2) { > -+ unionfs_unlock_dentry(p1); > -+ return; > -+ } > -+ if (p1 < p2) { /* unlock in reverse order of double_lock_parents */ > -+ unionfs_unlock_dentry(p1); > -+ unionfs_unlock_dentry(p2); > -+ } else { > -+ unionfs_unlock_dentry(p2); > -+ unionfs_unlock_dentry(p1); > -+ } > -+} > -+ > -+extern int new_dentry_private_data(struct dentry *dentry, int subclass); > -+extern int realloc_dentry_private_data(struct dentry *dentry); > -+extern void free_dentry_private_data(struct dentry *dentry); > -+extern void update_bstart(struct dentry *dentry); > -+extern int init_lower_nd(struct nameidata *nd, unsigned int flags); > -+extern void release_lower_nd(struct nameidata *nd, int err); > -+ > -+/* > -+ * EXTERNALS: > -+ */ > -+ > -+/* replicates the directory structure up to given dentry in given branch */ > -+extern struct dentry *create_parents(struct inode *dir, struct dentry *dentry, > -+ const char *name, int bindex); > -+ > -+/* partial lookup */ > -+extern int unionfs_partial_lookup(struct dentry *dentry, > -+ struct dentry *parent); > -+extern struct dentry *unionfs_lookup_full(struct dentry *dentry, > -+ struct dentry *parent, > -+ int lookupmode); > -+ > -+/* copies a file from dbstart to newbindex branch */ > -+extern int copyup_file(struct inode *dir, struct file *file, int bstart, > -+ int newbindex, loff_t size); > -+extern int copyup_named_file(struct inode *dir, struct file *file, > -+ char *name, int bstart, int new_bindex, > -+ loff_t len); > -+/* copies a dentry from dbstart to newbindex branch */ > -+extern int copyup_dentry(struct inode *dir, struct dentry *dentry, > -+ int bstart, int new_bindex, const char *name, > -+ int namelen, struct file **copyup_file, loff_t len); > -+/* helper functions for post-copyup actions */ > -+extern void unionfs_postcopyup_setmnt(struct dentry *dentry); > -+extern void unionfs_postcopyup_release(struct dentry *dentry); > -+ > -+/* Is this directory empty: 0 if it is empty, -ENOTEMPTY if not. */ > -+extern int check_empty(struct dentry *dentry, struct dentry *parent, > -+ struct unionfs_dir_state **namelist); > -+/* whiteout and opaque directory helpers */ > -+extern char *alloc_whname(const char *name, int len); > -+extern bool is_whiteout_name(char **namep, int *namelenp); > -+extern bool is_validname(const char *name); > -+extern struct dentry *lookup_whiteout(const char *name, > -+ struct dentry *lower_parent); > -+extern struct dentry *find_first_whiteout(struct dentry *dentry); > -+extern int unlink_whiteout(struct dentry *wh_dentry); > -+extern int check_unlink_whiteout(struct dentry *dentry, > -+ struct dentry *lower_dentry, int bindex); > -+extern int create_whiteout(struct dentry *dentry, int start); > -+extern int delete_whiteouts(struct dentry *dentry, int bindex, > -+ struct unionfs_dir_state *namelist); > -+extern int is_opaque_dir(struct dentry *dentry, int bindex); > -+extern int make_dir_opaque(struct dentry *dir, int bindex); > -+extern void unionfs_set_max_namelen(long *namelen); > -+ > -+extern void unionfs_reinterpose(struct dentry *this_dentry); > -+extern struct super_block *unionfs_duplicate_super(struct super_block *sb); > -+ > -+/* Locking functions. */ > -+extern int unionfs_setlk(struct file *file, int cmd, struct file_lock *fl); > -+extern int unionfs_getlk(struct file *file, struct file_lock *fl); > -+ > -+/* Common file operations. */ > -+extern int unionfs_file_revalidate(struct file *file, struct dentry *parent, > -+ bool willwrite); > -+extern int unionfs_open(struct inode *inode, struct file *file); > -+extern int unionfs_file_release(struct inode *inode, struct file *file); > -+extern int unionfs_flush(struct file *file, fl_owner_t id); > -+extern long unionfs_ioctl(struct file *file, unsigned int cmd, > -+ unsigned long arg); > -+extern int unionfs_fsync(struct file *file, int datasync); > -+extern int unionfs_fasync(int fd, struct file *file, int flag); > -+ > -+/* Inode operations */ > -+extern struct inode *unionfs_iget(struct super_block *sb, unsigned long ino); > -+extern int unionfs_rename(struct inode *old_dir, struct dentry *old_dentry, > -+ struct inode *new_dir, struct dentry *new_dentry); > -+extern int unionfs_unlink(struct inode *dir, struct dentry *dentry); > -+extern int unionfs_rmdir(struct inode *dir, struct dentry *dentry); > -+ > -+extern bool __unionfs_d_revalidate(struct dentry *dentry, > -+ struct dentry *parent, bool willwrite); > -+extern bool is_negative_lower(const struct dentry *dentry); > -+extern bool is_newer_lower(const struct dentry *dentry); > -+extern void purge_sb_data(struct super_block *sb); > -+ > -+/* The values for unionfs_interpose's flag. */ > -+#define INTERPOSE_DEFAULT 0 > -+#define INTERPOSE_LOOKUP 1 > -+#define INTERPOSE_REVAL 2 > -+#define INTERPOSE_REVAL_NEG 3 > -+#define INTERPOSE_PARTIAL 4 > -+ > -+extern struct dentry *unionfs_interpose(struct dentry *this_dentry, > -+ struct super_block *sb, int flag); > -+ > -+#ifdef CONFIG_UNION_FS_XATTR > -+/* Extended attribute functions. */ > -+extern void *unionfs_xattr_alloc(size_t size, size_t limit); > -+static inline void unionfs_xattr_kfree(const void *p) > -+{ > -+ kfree(p); > -+} > -+extern ssize_t unionfs_getxattr(struct dentry *dentry, const char *name, > -+ void *value, size_t size); > -+extern int unionfs_removexattr(struct dentry *dentry, const char *name); > -+extern ssize_t unionfs_listxattr(struct dentry *dentry, char *list, > -+ size_t size); > -+extern int unionfs_setxattr(struct dentry *dentry, const char *name, > -+ const void *value, size_t size, int flags); > -+#endif /* CONFIG_UNION_FS_XATTR */ > -+ > -+/* The root directory is unhashed, but isn't deleted. */ > -+static inline int d_deleted(struct dentry *d) > -+{ > -+ return d_unhashed(d) && (d != d->d_sb->s_root); > -+} > -+ > -+/* unionfs_permission, check if we should bypass error to facilitate copyup */ > -+#define IS_COPYUP_ERR(err) ((err) == -EROFS) > -+ > -+/* unionfs_open, check if we need to copyup the file */ > -+#define OPEN_WRITE_FLAGS (O_WRONLY | O_RDWR | O_APPEND) > -+#define IS_WRITE_FLAG(flag) ((flag) & OPEN_WRITE_FLAGS) > -+ > -+static inline int branchperms(const struct super_block *sb, int index) > -+{ > -+ BUG_ON(index < 0); > -+ return UNIONFS_SB(sb)->data[index].branchperms; > -+} > -+ > -+static inline int set_branchperms(struct super_block *sb, int index, int perms) > -+{ > -+ BUG_ON(index < 0); > -+ UNIONFS_SB(sb)->data[index].branchperms = perms; > -+ return perms; > -+} > -+ > -+/* check if readonly lower inode, but possibly unlinked (no inode->i_sb) */ > -+static inline int __is_rdonly(const struct inode *inode) > -+{ > -+ /* if unlinked, can't be readonly (?) */ > -+ if (!inode->i_sb) > -+ return 0; > -+ return IS_RDONLY(inode); > -+ > -+} > -+/* Is this file on a read-only branch? */ > -+static inline int is_robranch_super(const struct super_block *sb, int index) > -+{ > -+ int ret; > -+ > -+ ret = (!(branchperms(sb, index) & MAY_WRITE)) ? -EROFS : 0; > -+ return ret; > -+} > -+ > -+/* Is this file on a read-only branch? */ > -+static inline int is_robranch_idx(const struct dentry *dentry, int index) > -+{ > -+ struct super_block *lower_sb; > -+ > -+ BUG_ON(index < 0); > -+ > -+ if (!(branchperms(dentry->d_sb, index) & MAY_WRITE)) > -+ return -EROFS; > -+ > -+ lower_sb = unionfs_lower_super_idx(dentry->d_sb, index); > -+ BUG_ON(lower_sb == NULL); > -+ /* > -+ * test sb flags directly, not IS_RDONLY(lower_inode) because the > -+ * lower_dentry could be a negative. > -+ */ > -+ if (lower_sb->s_flags & MS_RDONLY) > -+ return -EROFS; > -+ > -+ return 0; > -+} > -+ > -+static inline int is_robranch(const struct dentry *dentry) > -+{ > -+ int index; > -+ > -+ index = UNIONFS_D(dentry)->bstart; > -+ BUG_ON(index < 0); > -+ > -+ return is_robranch_idx(dentry, index); > -+} > -+ > -+/* > -+ * EXTERNALS: > -+ */ > -+extern int check_branch(const struct path *path); > -+extern int parse_branch_mode(const char *name, int *perms); > -+ > -+/* locking helpers */ > -+static inline struct dentry *lock_parent(struct dentry *dentry) > -+{ > -+ struct dentry *dir = dget_parent(dentry); > -+ mutex_lock_nested(&dir->d_inode->i_mutex, I_MUTEX_PARENT); > -+ return dir; > -+} > -+static inline struct dentry *lock_parent_wh(struct dentry *dentry) > -+{ > -+ struct dentry *dir = dget_parent(dentry); > -+ > -+ mutex_lock_nested(&dir->d_inode->i_mutex, > UNIONFS_DMUTEX_WHITEOUT); > -+ return dir; > -+} > -+ > -+static inline void unlock_dir(struct dentry *dir) > -+{ > -+ mutex_unlock(&dir->d_inode->i_mutex); > -+ dput(dir); > -+} > -+ > -+/* lock base inode mutex before calling lookup_one_len */ > -+static inline struct dentry *lookup_lck_len(const char *name, > -+ struct dentry *base, int len) > -+{ > -+ struct dentry *d; > -+ struct nameidata lower_nd; > -+ int err; > -+ > -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); > -+ if (unlikely(err < 0)) { > -+ d = ERR_PTR(err); > -+ goto out; > -+ } > -+ mutex_lock(&base->d_inode->i_mutex); > -+ d = lookup_one_len_nd(name, base, len, &lower_nd); > -+ release_lower_nd(&lower_nd, err); > -+ mutex_unlock(&base->d_inode->i_mutex); > -+out: > -+ return d; > -+} > -+ > -+static inline struct vfsmount *unionfs_mntget(struct dentry *dentry, > -+ int bindex) > -+{ > -+ struct vfsmount *mnt; > -+ > -+ BUG_ON(!dentry || bindex < 0); > -+ > -+ mnt = mntget(unionfs_lower_mnt_idx(dentry, bindex)); > -+#ifdef CONFIG_UNION_FS_DEBUG > -+ if (!mnt) > -+ pr_debug("unionfs: mntget: mnt=%p bindex=%d\n", > -+ mnt, bindex); > -+#endif /* CONFIG_UNION_FS_DEBUG */ > -+ > -+ return mnt; > -+} > -+ > -+static inline void unionfs_mntput(struct dentry *dentry, int bindex) > -+{ > -+ struct vfsmount *mnt; > -+ > -+ if (!dentry && bindex < 0) > -+ return; > -+ BUG_ON(!dentry || bindex < 0); > -+ > -+ mnt = unionfs_lower_mnt_idx(dentry, bindex); > -+#ifdef CONFIG_UNION_FS_DEBUG > -+ /* > -+ * Directories can have NULL lower objects in between start/end, but > -+ * NOT if at the start/end range. We cannot verify that this dentry > -+ * is a type=DIR, because it may already be a negative dentry. But > -+ * if dbstart is greater than dbend, we know that this couldn't have > -+ * been a regular file: it had to have been a directory. > -+ */ > -+ if (!mnt && !(bindex > dbstart(dentry) && bindex < dbend(dentry))) > -+ pr_debug("unionfs: mntput: mnt=%p bindex=%d\n", mnt, > bindex); > -+#endif /* CONFIG_UNION_FS_DEBUG */ > -+ mntput(mnt); > -+} > -+ > -+#ifdef CONFIG_UNION_FS_DEBUG > -+ > -+/* useful for tracking code reachability */ > -+#define UDBG pr_debug("DBG:%s:%s:%d\n", __FILE__, __func__, __LINE__) > -+ > -+#define unionfs_check_inode(i) __unionfs_check_inode((i), \ > -+ __FILE__, __func__, __LINE__) > -+#define unionfs_check_dentry(d) __unionfs_check_dentry((d), \ > -+ __FILE__, __func__, __LINE__) > -+#define unionfs_check_file(f) __unionfs_check_file((f), \ > -+ __FILE__, __func__, __LINE__) > -+#define unionfs_check_nd(n) __unionfs_check_nd((n), \ > -+ __FILE__, __func__, __LINE__) > -+#define show_branch_counts(sb) __show_branch_counts((sb), \ > -+ __FILE__, __func__, __LINE__) > -+#define show_inode_times(i) __show_inode_times((i), \ > -+ __FILE__, __func__, __LINE__) > -+#define show_dinode_times(d) __show_dinode_times((d), \ > -+ __FILE__, __func__, __LINE__) > -+#define show_inode_counts(i) __show_inode_counts((i), \ > -+ __FILE__, __func__, __LINE__) > -+ > -+extern void __unionfs_check_inode(const struct inode *inode, const char > *fname, > -+ const char *fxn, int line); > -+extern void __unionfs_check_dentry(const struct dentry *dentry, > -+ const char *fname, const char *fxn, > -+ int line); > -+extern void __unionfs_check_file(const struct file *file, > -+ const char *fname, const char *fxn, int line); > -+extern void __unionfs_check_nd(const struct nameidata *nd, > -+ const char *fname, const char *fxn, int line); > -+extern void __show_branch_counts(const struct super_block *sb, > -+ const char *file, const char *fxn, int line); > -+extern void __show_inode_times(const struct inode *inode, > -+ const char *file, const char *fxn, int line); > -+extern void __show_dinode_times(const struct dentry *dentry, > -+ const char *file, const char *fxn, int line); > -+extern void __show_inode_counts(const struct inode *inode, > -+ const char *file, const char *fxn, int line); > -+ > -+#else /* not CONFIG_UNION_FS_DEBUG */ > -+ > -+/* we leave useful hooks for these check functions throughout the code */ > -+#define unionfs_check_inode(i) do { } while (0) > -+#define unionfs_check_dentry(d) do { } while (0) > -+#define unionfs_check_file(f) do { } while (0) > -+#define unionfs_check_nd(n) do { } while (0) > -+#define show_branch_counts(sb) do { } while (0) > -+#define show_inode_times(i) do { } while (0) > -+#define show_dinode_times(d) do { } while (0) > -+#define show_inode_counts(i) do { } while (0) > -+ > -+#endif /* not CONFIG_UNION_FS_DEBUG */ > -+ > -+#endif /* not _UNION_H_ */ > -diff --git a/fs/unionfs/unlink.c b/fs/unionfs/unlink.c > -new file mode 100644 > -index 0000000..bf447bb > ---- /dev/null > -+++ b/fs/unionfs/unlink.c > -@@ -0,0 +1,278 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * Helper function for Unionfs's unlink operation. > -+ * > -+ * The main goal of this function is to optimize the unlinking of non-dir > -+ * objects in unionfs by deleting all possible lower inode objects from the > -+ * underlying branches having same dentry name as the non-dir dentry on > -+ * which this unlink operation is called. This way we delete as many lower > -+ * inodes as possible, and save space. Whiteouts need to be created in > -+ * branch0 only if unlinking fails on any of the lower branch other than > -+ * branch0, or if a lower branch is marked read-only. > -+ * > -+ * Also, while unlinking a file, if we encounter any dir type entry in any > -+ * intermediate branch, then we remove the directory by calling vfs_rmdir. > -+ * The following special cases are also handled: > -+ > -+ * (1) If an error occurs in branch0 during vfs_unlink, then we return > -+ * appropriate error. > -+ * > -+ * (2) If we get an error during unlink in any of other lower branch other > -+ * than branch0, then we create a whiteout in branch0. > -+ * > -+ * (3) If a whiteout already exists in any intermediate branch, we delete > -+ * all possible inodes only up to that branch (this is an "opaqueness" > -+ * as as per Documentation/filesystems/unionfs/concepts.txt). > -+ * > -+ */ > -+static int unionfs_unlink_whiteout(struct inode *dir, struct dentry *dentry, > -+ struct dentry *parent) > -+{ > -+ struct dentry *lower_dentry; > -+ struct dentry *lower_dir_dentry; > -+ int bindex; > -+ int err = 0; > -+ > -+ err = unionfs_partial_lookup(dentry, parent); > -+ if (err) > -+ goto out; > -+ > -+ /* trying to unlink all possible valid instances */ > -+ for (bindex = dbstart(dentry); bindex <= dbend(dentry); bindex++) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ if (!lower_dentry || !lower_dentry->d_inode) > -+ continue; > -+ > -+ lower_dir_dentry = lock_parent(lower_dentry); > -+ > -+ /* avoid destroying the lower inode if the object is in use */ > -+ dget(lower_dentry); > -+ err = is_robranch_super(dentry->d_sb, bindex); > -+ if (!err) { > -+ /* see Documentation/filesystems/unionfs/issues.txt */ > -+ lockdep_off(); > -+ if (!S_ISDIR(lower_dentry->d_inode->i_mode)) > -+ err = vfs_unlink(lower_dir_dentry->d_inode, > -+ > lower_dentry); > -+ else > -+ err = vfs_rmdir(lower_dir_dentry->d_inode, > -+ > lower_dentry); > -+ lockdep_on(); > -+ } > -+ > -+ /* if lower object deletion succeeds, update inode's times */ > -+ if (!err) > -+ unionfs_copy_attr_times(dentry->d_inode); > -+ dput(lower_dentry); > -+ fsstack_copy_attr_times(dir, lower_dir_dentry->d_inode); > -+ unlock_dir(lower_dir_dentry); > -+ > -+ if (err) > -+ break; > -+ } > -+ > -+ /* > -+ * Create the whiteout in branch 0 (highest priority) only if (a) > -+ * there was an error in any intermediate branch other than branch 0 > -+ * due to failure of vfs_unlink/vfs_rmdir or (b) a branch marked or > -+ * mounted read-only. > -+ */ > -+ if (err) { > -+ if ((bindex == 0) || > -+ ((bindex == dbstart(dentry)) && > -+ (!IS_COPYUP_ERR(err)))) > -+ goto out; > -+ else { > -+ if (!IS_COPYUP_ERR(err)) > -+ pr_debug("unionfs: lower object deletion " > -+ "failed in branch:%d\n", bindex); > -+ err = create_whiteout(dentry, sbstart(dentry->d_sb)); > -+ } > -+ } > -+ > -+out: > -+ if (!err) > -+ inode_dec_link_count(dentry->d_inode); > -+ > -+ /* We don't want to leave negative leftover dentries for revalidate. */ > -+ if (!err && (dbopaque(dentry) != -1)) > -+ update_bstart(dentry); > -+ > -+ return err; > -+} > -+ > -+int unionfs_unlink(struct inode *dir, struct dentry *dentry) > -+{ > -+ int err = 0; > -+ struct inode *inode = dentry->d_inode; > -+ struct dentry *parent; > -+ int valid; > -+ > -+ BUG_ON(S_ISDIR(inode->i_mode)); > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ unionfs_check_dentry(dentry); > -+ > -+ err = unionfs_unlink_whiteout(dir, dentry, parent); > -+ /* call d_drop so the system "forgets" about us */ > -+ if (!err) { > -+ unionfs_postcopyup_release(dentry); > -+ unionfs_postcopyup_setmnt(parent); > -+ if (inode->i_nlink == 0) /* drop lower inodes */ > -+ iput_lowers_all(inode, false); > -+ d_drop(dentry); > -+ /* > -+ * if unlink/whiteout succeeded, parent dir mtime has > -+ * changed > -+ */ > -+ unionfs_copy_attr_times(dir); > -+ } > -+ > -+out: > -+ if (!err) { > -+ unionfs_check_dentry(dentry); > -+ unionfs_check_inode(dir); > -+ } > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+static int unionfs_rmdir_first(struct inode *dir, struct dentry *dentry, > -+ struct unionfs_dir_state *namelist) > -+{ > -+ int err; > -+ struct dentry *lower_dentry; > -+ struct dentry *lower_dir_dentry = NULL; > -+ > -+ /* Here we need to remove whiteout entries. */ > -+ err = delete_whiteouts(dentry, dbstart(dentry), namelist); > -+ if (err) > -+ goto out; > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ > -+ lower_dir_dentry = lock_parent(lower_dentry); > -+ > -+ /* avoid destroying the lower inode if the file is in use */ > -+ dget(lower_dentry); > -+ err = is_robranch(dentry); > -+ if (!err) > -+ err = vfs_rmdir(lower_dir_dentry->d_inode, lower_dentry); > -+ dput(lower_dentry); > -+ > -+ fsstack_copy_attr_times(dir, lower_dir_dentry->d_inode); > -+ /* propagate number of hard-links */ > -+ dentry->d_inode->i_nlink = unionfs_get_nlinks(dentry->d_inode); > -+ > -+out: > -+ if (lower_dir_dentry) > -+ unlock_dir(lower_dir_dentry); > -+ return err; > -+} > -+ > -+int unionfs_rmdir(struct inode *dir, struct dentry *dentry) > -+{ > -+ int err = 0; > -+ struct unionfs_dir_state *namelist = NULL; > -+ struct dentry *parent; > -+ int dstart, dend; > -+ bool valid; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ unionfs_check_dentry(dentry); > -+ > -+ /* check if this unionfs directory is empty or not */ > -+ err = check_empty(dentry, parent, &namelist); > -+ if (err) > -+ goto out; > -+ > -+ err = unionfs_rmdir_first(dir, dentry, namelist); > -+ dstart = dbstart(dentry); > -+ dend = dbend(dentry); > -+ /* > -+ * We create a whiteout for the directory if there was an error to > -+ * rmdir the first directory entry in the union. Otherwise, we > -+ * create a whiteout only if there is no chance that a lower > -+ * priority branch might also have the same named directory. IOW, > -+ * if there is not another same-named directory at a lower priority > -+ * branch, then we don't need to create a whiteout for it. > -+ */ > -+ if (!err) { > -+ if (dstart < dend) > -+ err = create_whiteout(dentry, dstart); > -+ } else { > -+ int new_err; > -+ > -+ if (dstart == 0) > -+ goto out; > -+ > -+ /* exit if the error returned was NOT -EROFS */ > -+ if (!IS_COPYUP_ERR(err)) > -+ goto out; > -+ > -+ new_err = create_whiteout(dentry, dstart - 1); > -+ if (new_err != -EEXIST) > -+ err = new_err; > -+ } > -+ > -+out: > -+ /* > -+ * Drop references to lower dentry/inode so storage space for them > -+ * can be reclaimed. Then, call d_drop so the system "forgets" > -+ * about us. > -+ */ > -+ if (!err) { > -+ iput_lowers_all(dentry->d_inode, false); > -+ dput(unionfs_lower_dentry_idx(dentry, dstart)); > -+ unionfs_set_lower_dentry_idx(dentry, dstart, NULL); > -+ d_drop(dentry); > -+ /* update our lower vfsmnts, in case a copyup took place */ > -+ unionfs_postcopyup_setmnt(dentry); > -+ unionfs_check_dentry(dentry); > -+ unionfs_check_inode(dir); > -+ } > -+ > -+ if (namelist) > -+ free_rdstate(namelist); > -+ > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -diff --git a/fs/unionfs/whiteout.c b/fs/unionfs/whiteout.c > -new file mode 100644 > -index 0000000..582cef2 > ---- /dev/null > -+++ b/fs/unionfs/whiteout.c > -@@ -0,0 +1,601 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* > -+ * whiteout and opaque directory helpers > -+ */ > -+ > -+/* What do we use for whiteouts. */ > -+#define UNIONFS_WHPFX ".wh." > -+#define UNIONFS_WHLEN 4 > -+/* > -+ * If a directory contains this file, then it is opaque. We start with the > -+ * .wh. flag so that it is blocked by lookup. > -+ */ > -+#define UNIONFS_DIR_OPAQUE_NAME "__dir_opaque" > -+#define UNIONFS_DIR_OPAQUE UNIONFS_WHPFX > UNIONFS_DIR_OPAQUE_NAME > -+ > -+/* construct whiteout filename */ > -+char *alloc_whname(const char *name, int len) > -+{ > -+ char *buf; > -+ > -+ buf = kmalloc(len + UNIONFS_WHLEN + 1, GFP_KERNEL); > -+ if (unlikely(!buf)) > -+ return ERR_PTR(-ENOMEM); > -+ > -+ strcpy(buf, UNIONFS_WHPFX); > -+ strlcat(buf, name, len + UNIONFS_WHLEN + 1); > -+ > -+ return buf; > -+} > -+ > -+/* > -+ * XXX: this can be inline or CPP macro, but is here to keep all whiteout > -+ * code in one place. > -+ */ > -+void unionfs_set_max_namelen(long *namelen) > -+{ > -+ *namelen -= UNIONFS_WHLEN; > -+} > -+ > -+/* check if @namep is a whiteout, update @namep and @namelenp > accordingly */ > -+bool is_whiteout_name(char **namep, int *namelenp) > -+{ > -+ if (*namelenp > UNIONFS_WHLEN && > -+ !strncmp(*namep, UNIONFS_WHPFX, UNIONFS_WHLEN)) { > -+ *namep += UNIONFS_WHLEN; > -+ *namelenp -= UNIONFS_WHLEN; > -+ return true; > -+ } > -+ return false; > -+} > -+ > -+/* is the filename valid == !(whiteout for a file or opaque dir marker) */ > -+bool is_validname(const char *name) > -+{ > -+ if (!strncmp(name, UNIONFS_WHPFX, UNIONFS_WHLEN)) > -+ return false; > -+ if (!strncmp(name, UNIONFS_DIR_OPAQUE_NAME, > -+ sizeof(UNIONFS_DIR_OPAQUE_NAME) - 1)) > -+ return false; > -+ return true; > -+} > -+ > -+/* > -+ * Look for a whiteout @name in @lower_parent directory. If error, return > -+ * ERR_PTR. Caller must dput() the returned dentry if not an error. > -+ * > -+ * XXX: some callers can reuse the whname allocated buffer to avoid repeated > -+ * free then re-malloc calls. Need to provide a different API for those > -+ * callers. > -+ */ > -+struct dentry *lookup_whiteout(const char *name, struct dentry > *lower_parent) > -+{ > -+ char *whname = NULL; > -+ int err = 0, namelen; > -+ struct dentry *wh_dentry = NULL; > -+ > -+ namelen = strlen(name); > -+ whname = alloc_whname(name, namelen); > -+ if (unlikely(IS_ERR(whname))) { > -+ err = PTR_ERR(whname); > -+ goto out; > -+ } > -+ > -+ /* check if whiteout exists in this branch: lookup .wh.foo */ > -+ wh_dentry = lookup_lck_len(whname, lower_parent, strlen(whname)); > -+ if (IS_ERR(wh_dentry)) { > -+ err = PTR_ERR(wh_dentry); > -+ goto out; > -+ } > -+ > -+ /* check if negative dentry (ENOENT) */ > -+ if (!wh_dentry->d_inode) > -+ goto out; > -+ > -+ /* whiteout found: check if valid type */ > -+ if (!S_ISREG(wh_dentry->d_inode->i_mode)) { > -+ printk(KERN_ERR "unionfs: invalid whiteout %s entry type > %d\n", > -+ whname, wh_dentry->d_inode->i_mode); > -+ dput(wh_dentry); > -+ err = -EIO; > -+ goto out; > -+ } > -+ > -+out: > -+ kfree(whname); > -+ if (err) > -+ wh_dentry = ERR_PTR(err); > -+ return wh_dentry; > -+} > -+ > -+/* find and return first whiteout in parent directory, else ENOENT */ > -+struct dentry *find_first_whiteout(struct dentry *dentry) > -+{ > -+ int bindex, bstart, bend; > -+ struct dentry *parent, *lower_parent, *wh_dentry; > -+ > -+ parent = dget_parent(dentry); > -+ > -+ bstart = dbstart(parent); > -+ bend = dbend(parent); > -+ wh_dentry = ERR_PTR(-ENOENT); > -+ > -+ for (bindex = bstart; bindex <= bend; bindex++) { > -+ lower_parent = unionfs_lower_dentry_idx(parent, bindex); > -+ if (!lower_parent) > -+ continue; > -+ wh_dentry = lookup_whiteout(dentry->d_name.name, > lower_parent); > -+ if (IS_ERR(wh_dentry)) > -+ continue; > -+ if (wh_dentry->d_inode) > -+ break; > -+ dput(wh_dentry); > -+ wh_dentry = ERR_PTR(-ENOENT); > -+ } > -+ > -+ dput(parent); > -+ > -+ return wh_dentry; > -+} > -+ > -+/* > -+ * Unlink a whiteout dentry. Returns 0 or -errno. Caller must hold and > -+ * release dentry reference. > -+ */ > -+int unlink_whiteout(struct dentry *wh_dentry) > -+{ > -+ int err; > -+ struct dentry *lower_dir_dentry; > -+ > -+ /* dget and lock parent dentry */ > -+ lower_dir_dentry = lock_parent_wh(wh_dentry); > -+ > -+ /* see Documentation/filesystems/unionfs/issues.txt */ > -+ lockdep_off(); > -+ err = vfs_unlink(lower_dir_dentry->d_inode, wh_dentry); > -+ lockdep_on(); > -+ unlock_dir(lower_dir_dentry); > -+ > -+ /* > -+ * Whiteouts are special files and should be deleted no matter what > -+ * (as if they never existed), in order to allow this create > -+ * operation to succeed. This is especially important in sticky > -+ * directories: a whiteout may have been created by one user, but > -+ * the newly created file may be created by another user. > -+ * Therefore, in order to maintain Unix semantics, if the vfs_unlink > -+ * above failed, then we have to try to directly unlink the > -+ * whiteout. Note: in the ODF version of unionfs, whiteout are > -+ * handled much more cleanly. > -+ */ > -+ if (err == -EPERM) { > -+ struct inode *inode = lower_dir_dentry->d_inode; > -+ err = inode->i_op->unlink(inode, wh_dentry); > -+ } > -+ if (err) > -+ printk(KERN_ERR "unionfs: could not unlink whiteout %s, " > -+ "err = %d\n", wh_dentry->d_name.name, err); > -+ > -+ return err; > -+ > -+} > -+ > -+/* > -+ * Helper function when creating new objects (create, symlink, mknod, etc.). > -+ * Checks to see if there's a whiteout in @lower_dentry's parent directory, > -+ * whose name is taken from @dentry. Then tries to remove that whiteout, if > -+ * found. If <dentry,bindex> is a branch marked readonly, return -EROFS. > -+ * If it finds both a regular file and a whiteout, delete whiteout (this > -+ * should never happen). > -+ * > -+ * Return 0 if no whiteout was found. Return 1 if one was found and > -+ * successfully removed. Therefore a value >= 0 tells the caller that > -+ * @lower_dentry belongs to a good branch to create the new object in). > -+ * Return -ERRNO if an error occurred during whiteout lookup or in trying to > -+ * unlink the whiteout. > -+ */ > -+int check_unlink_whiteout(struct dentry *dentry, struct dentry > *lower_dentry, > -+ int bindex) > -+{ > -+ int err; > -+ struct dentry *wh_dentry = NULL; > -+ struct dentry *lower_dir_dentry = NULL; > -+ > -+ /* look for whiteout dentry first */ > -+ lower_dir_dentry = dget_parent(lower_dentry); > -+ wh_dentry = lookup_whiteout(dentry->d_name.name, > lower_dir_dentry); > -+ dput(lower_dir_dentry); > -+ if (IS_ERR(wh_dentry)) { > -+ err = PTR_ERR(wh_dentry); > -+ goto out; > -+ } > -+ > -+ if (!wh_dentry->d_inode) { /* no whiteout exists*/ > -+ err = 0; > -+ goto out_dput; > -+ } > -+ > -+ /* check if regular file and whiteout were both found */ > -+ if (unlikely(lower_dentry->d_inode)) > -+ printk(KERN_WARNING "unionfs: removing whiteout; regular " > -+ "file exists in directory %s (branch %d)\n", > -+ lower_dir_dentry->d_name.name, bindex); > -+ > -+ /* check if branch is writeable */ > -+ err = is_robranch_super(dentry->d_sb, bindex); > -+ if (err) > -+ goto out_dput; > -+ > -+ /* .wh.foo has been found, so let's unlink it */ > -+ err = unlink_whiteout(wh_dentry); > -+ if (!err) > -+ err = 1; /* a whiteout was found and successfully removed */ > -+out_dput: > -+ dput(wh_dentry); > -+out: > -+ return err; > -+} > -+ > -+/* > -+ * Pass an unionfs dentry and an index. It will try to create a whiteout > -+ * for the filename in dentry, and will try in branch 'index'. On error, > -+ * it will proceed to a branch to the left. > -+ */ > -+int create_whiteout(struct dentry *dentry, int start) > -+{ > -+ int bstart, bend, bindex; > -+ struct dentry *lower_dir_dentry; > -+ struct dentry *lower_dentry; > -+ struct dentry *lower_wh_dentry; > -+ struct nameidata nd; > -+ char *name = NULL; > -+ int err = -EINVAL; > -+ > -+ verify_locked(dentry); > -+ > -+ bstart = dbstart(dentry); > -+ bend = dbend(dentry); > -+ > -+ /* create dentry's whiteout equivalent */ > -+ name = alloc_whname(dentry->d_name.name, dentry->d_name.len); > -+ if (unlikely(IS_ERR(name))) { > -+ err = PTR_ERR(name); > -+ goto out; > -+ } > -+ > -+ for (bindex = start; bindex >= 0; bindex--) { > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ > -+ if (!lower_dentry) { > -+ /* > -+ * if lower dentry is not present, create the > -+ * entire lower dentry directory structure and go > -+ * ahead. Since we want to just create whiteout, we > -+ * only want the parent dentry, and hence get rid of > -+ * this dentry. > -+ */ > -+ lower_dentry = create_parents(dentry->d_inode, > -+ dentry, > -+ dentry->d_name.name, > -+ bindex); > -+ if (!lower_dentry || IS_ERR(lower_dentry)) { > -+ int ret = PTR_ERR(lower_dentry); > -+ if (!IS_COPYUP_ERR(ret)) > -+ printk(KERN_ERR > -+ "unionfs: create_parents for " > -+ "whiteout failed: bindex=%d " > -+ "err=%d\n", bindex, ret); > -+ continue; > -+ } > -+ } > -+ > -+ lower_wh_dentry = > -+ lookup_lck_len(name, lower_dentry->d_parent, > -+ dentry->d_name.len + UNIONFS_WHLEN); > -+ if (IS_ERR(lower_wh_dentry)) > -+ continue; > -+ > -+ /* > -+ * The whiteout already exists. This used to be impossible, > -+ * but now is possible because of opaqueness. > -+ */ > -+ if (lower_wh_dentry->d_inode) { > -+ dput(lower_wh_dentry); > -+ err = 0; > -+ goto out; > -+ } > -+ > -+ err = init_lower_nd(&nd, LOOKUP_CREATE); > -+ if (unlikely(err < 0)) > -+ goto out; > -+ lower_dir_dentry = lock_parent_wh(lower_wh_dentry); > -+ err = is_robranch_super(dentry->d_sb, bindex); > -+ if (!err) > -+ err = vfs_create(lower_dir_dentry->d_inode, > -+ lower_wh_dentry, > -+ current_umask() & S_IRUGO, > -+ &nd); > -+ unlock_dir(lower_dir_dentry); > -+ dput(lower_wh_dentry); > -+ release_lower_nd(&nd, err); > -+ > -+ if (!err || !IS_COPYUP_ERR(err)) > -+ break; > -+ } > -+ > -+ /* set dbopaque so that lookup will not proceed after this branch */ > -+ if (!err) > -+ dbopaque(dentry) = bindex; > -+ > -+out: > -+ kfree(name); > -+ return err; > -+} > -+ > -+/* > -+ * Delete all of the whiteouts in a given directory for rmdir. > -+ * > -+ * lower directory inode should be locked > -+ */ > -+static int do_delete_whiteouts(struct dentry *dentry, int bindex, > -+ struct unionfs_dir_state *namelist) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dir_dentry = NULL; > -+ struct dentry *lower_dentry; > -+ char *name = NULL, *p; > -+ struct inode *lower_dir; > -+ int i; > -+ struct list_head *pos; > -+ struct filldir_node *cursor; > -+ > -+ /* Find out lower parent dentry */ > -+ lower_dir_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ BUG_ON(!S_ISDIR(lower_dir_dentry->d_inode->i_mode)); > -+ lower_dir = lower_dir_dentry->d_inode; > -+ BUG_ON(!S_ISDIR(lower_dir->i_mode)); > -+ > -+ err = -ENOMEM; > -+ name = __getname(); > -+ if (unlikely(!name)) > -+ goto out; > -+ strcpy(name, UNIONFS_WHPFX); > -+ p = name + UNIONFS_WHLEN; > -+ > -+ err = 0; > -+ for (i = 0; !err && i < namelist->size; i++) { > -+ list_for_each(pos, &namelist->list[i]) { > -+ cursor = > -+ list_entry(pos, struct filldir_node, > -+ file_list); > -+ /* Only operate on whiteouts in this branch. */ > -+ if (cursor->bindex != bindex) > -+ continue; > -+ if (!cursor->whiteout) > -+ continue; > -+ > -+ strlcpy(p, cursor->name, PATH_MAX - > UNIONFS_WHLEN); > -+ lower_dentry = > -+ lookup_lck_len(name, lower_dir_dentry, > -+ cursor->namelen + > -+ UNIONFS_WHLEN); > -+ if (IS_ERR(lower_dentry)) { > -+ err = PTR_ERR(lower_dentry); > -+ break; > -+ } > -+ if (lower_dentry->d_inode) > -+ err = vfs_unlink(lower_dir, lower_dentry); > -+ dput(lower_dentry); > -+ if (err) > -+ break; > -+ } > -+ } > -+ > -+ __putname(name); > -+ > -+ /* After all of the removals, we should copy the attributes once. */ > -+ fsstack_copy_attr_times(dentry->d_inode, lower_dir_dentry- > >d_inode); > -+ > -+out: > -+ return err; > -+} > -+ > -+ > -+void __delete_whiteouts(struct work_struct *work) > -+{ > -+ struct sioq_args *args = container_of(work, struct sioq_args, work); > -+ struct deletewh_args *d = &args->deletewh; > -+ > -+ args->err = do_delete_whiteouts(d->dentry, d->bindex, d->namelist); > -+ complete(&args->comp); > -+} > -+ > -+/* delete whiteouts in a dir (for rmdir operation) using sioq if necessary */ > -+int delete_whiteouts(struct dentry *dentry, int bindex, > -+ struct unionfs_dir_state *namelist) > -+{ > -+ int err; > -+ struct super_block *sb; > -+ struct dentry *lower_dir_dentry; > -+ struct inode *lower_dir; > -+ struct sioq_args args; > -+ > -+ sb = dentry->d_sb; > -+ > -+ BUG_ON(!S_ISDIR(dentry->d_inode->i_mode)); > -+ BUG_ON(bindex < dbstart(dentry)); > -+ BUG_ON(bindex > dbend(dentry)); > -+ err = is_robranch_super(sb, bindex); > -+ if (err) > -+ goto out; > -+ > -+ lower_dir_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ BUG_ON(!S_ISDIR(lower_dir_dentry->d_inode->i_mode)); > -+ lower_dir = lower_dir_dentry->d_inode; > -+ BUG_ON(!S_ISDIR(lower_dir->i_mode)); > -+ > -+ if (!inode_permission(lower_dir, MAY_WRITE | MAY_EXEC)) { > -+ err = do_delete_whiteouts(dentry, bindex, namelist); > -+ } else { > -+ args.deletewh.namelist = namelist; > -+ args.deletewh.dentry = dentry; > -+ args.deletewh.bindex = bindex; > -+ run_sioq(__delete_whiteouts, &args); > -+ err = args.err; > -+ } > -+ > -+out: > -+ return err; > -+} > -+ > - > +/*********************************************************** > ***************** > -+ * Opaque directory helpers * > -+ > ************************************************************* > ***************/ > -+ > -+/* > -+ * is_opaque_dir: returns 0 if it is NOT an opaque dir, 1 if it is, and > -+ * -errno if an error occurred trying to figure this out. > -+ */ > -+int is_opaque_dir(struct dentry *dentry, int bindex) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry; > -+ struct dentry *wh_lower_dentry; > -+ struct inode *lower_inode; > -+ struct sioq_args args; > -+ struct nameidata lower_nd; > -+ > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ lower_inode = lower_dentry->d_inode; > -+ > -+ BUG_ON(!S_ISDIR(lower_inode->i_mode)); > -+ > -+ mutex_lock(&lower_inode->i_mutex); > -+ > -+ if (!inode_permission(lower_inode, MAY_EXEC)) { > -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); > -+ if (unlikely(err < 0)) { > -+ mutex_unlock(&lower_inode->i_mutex); > -+ goto out; > -+ } > -+ wh_lower_dentry = > -+ lookup_one_len_nd(UNIONFS_DIR_OPAQUE, > lower_dentry, > -+ sizeof(UNIONFS_DIR_OPAQUE) - 1, > -+ &lower_nd); > -+ release_lower_nd(&lower_nd, err); > -+ } else { > -+ args.is_opaque.dentry = lower_dentry; > -+ run_sioq(__is_opaque_dir, &args); > -+ wh_lower_dentry = args.ret; > -+ } > -+ > -+ mutex_unlock(&lower_inode->i_mutex); > -+ > -+ if (IS_ERR(wh_lower_dentry)) { > -+ err = PTR_ERR(wh_lower_dentry); > -+ goto out; > -+ } > -+ > -+ /* This is an opaque dir iff wh_lower_dentry is positive */ > -+ err = !!wh_lower_dentry->d_inode; > -+ > -+ dput(wh_lower_dentry); > -+out: > -+ return err; > -+} > -+ > -+void __is_opaque_dir(struct work_struct *work) > -+{ > -+ struct sioq_args *args = container_of(work, struct sioq_args, work); > -+ struct nameidata lower_nd; > -+ int err; > -+ > -+ err = init_lower_nd(&lower_nd, LOOKUP_OPEN); > -+ if (unlikely(err < 0)) > -+ return; > -+ args->ret = lookup_one_len_nd(UNIONFS_DIR_OPAQUE, > -+ args->is_opaque.dentry, > -+ sizeof(UNIONFS_DIR_OPAQUE) - 1, > -+ &lower_nd); > -+ release_lower_nd(&lower_nd, err); > -+ complete(&args->comp); > -+} > -+ > -+int make_dir_opaque(struct dentry *dentry, int bindex) > -+{ > -+ int err = 0; > -+ struct dentry *lower_dentry, *diropq; > -+ struct inode *lower_dir; > -+ struct nameidata nd; > -+ const struct cred *old_creds; > -+ struct cred *new_creds; > -+ > -+ /* > -+ * Opaque directory whiteout markers are special files (like regular > -+ * whiteouts), and should appear to the users as if they don't > -+ * exist. They should be created/deleted regardless of directory > -+ * search/create permissions, but only for the duration of this > -+ * creation of the .wh.__dir_opaque: file. Note, this does not > -+ * circumvent normal ->permission). > -+ */ > -+ new_creds = prepare_creds(); > -+ if (unlikely(!new_creds)) { > -+ err = -ENOMEM; > -+ goto out_err; > -+ } > -+ cap_raise(new_creds->cap_effective, CAP_DAC_READ_SEARCH); > -+ cap_raise(new_creds->cap_effective, CAP_DAC_OVERRIDE); > -+ old_creds = override_creds(new_creds); > -+ > -+ lower_dentry = unionfs_lower_dentry_idx(dentry, bindex); > -+ lower_dir = lower_dentry->d_inode; > -+ BUG_ON(!S_ISDIR(dentry->d_inode->i_mode) || > -+ !S_ISDIR(lower_dir->i_mode)); > -+ > -+ mutex_lock(&lower_dir->i_mutex); > -+ err = init_lower_nd(&nd, LOOKUP_OPEN); > -+ if (unlikely(err < 0)) > -+ goto out; > -+ diropq = lookup_one_len_nd(UNIONFS_DIR_OPAQUE, lower_dentry, > -+ sizeof(UNIONFS_DIR_OPAQUE) - 1, &nd); > -+ release_lower_nd(&nd, err); > -+ if (IS_ERR(diropq)) { > -+ err = PTR_ERR(diropq); > -+ goto out; > -+ } > -+ > -+ err = init_lower_nd(&nd, LOOKUP_CREATE); > -+ if (unlikely(err < 0)) > -+ goto out; > -+ if (!diropq->d_inode) > -+ err = vfs_create(lower_dir, diropq, S_IRUGO, &nd); > -+ if (!err) > -+ dbopaque(dentry) = bindex; > -+ release_lower_nd(&nd, err); > -+ > -+ dput(diropq); > -+ > -+out: > -+ mutex_unlock(&lower_dir->i_mutex); > -+ revert_creds(old_creds); > -+out_err: > -+ return err; > -+} > -diff --git a/fs/unionfs/xattr.c b/fs/unionfs/xattr.c > -new file mode 100644 > -index 0000000..a93d803 > ---- /dev/null > -+++ b/fs/unionfs/xattr.c > -@@ -0,0 +1,173 @@ > -+/* > -+ * Copyright (c) 2003-2011 Erez Zadok > -+ * Copyright (c) 2003-2006 Charles P. Wright > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2005-2006 Junjiro Okajima > -+ * Copyright (c) 2005 Arun M. Krishnakumar > -+ * Copyright (c) 2004-2006 David P. Quigley > -+ * Copyright (c) 2003-2004 Mohammad Nayyer Zubair > -+ * Copyright (c) 2003 Puja Gupta > -+ * Copyright (c) 2003 Harikesavan Krishnan > -+ * Copyright (c) 2003-2011 Stony Brook University > -+ * Copyright (c) 2003-2011 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "union.h" > -+ > -+/* This is lifted from fs/xattr.c */ > -+void *unionfs_xattr_alloc(size_t size, size_t limit) > -+{ > -+ void *ptr; > -+ > -+ if (size > limit) > -+ return ERR_PTR(-E2BIG); > -+ > -+ if (!size) /* size request, no buffer is needed */ > -+ return NULL; > -+ > -+ ptr = kmalloc(size, GFP_KERNEL); > -+ if (unlikely(!ptr)) > -+ return ERR_PTR(-ENOMEM); > -+ return ptr; > -+} > -+ > -+/* > -+ * BKL held by caller. > -+ * dentry->d_inode->i_mutex locked > -+ */ > -+ssize_t unionfs_getxattr(struct dentry *dentry, const char *name, void > *value, > -+ size_t size) > -+{ > -+ struct dentry *lower_dentry = NULL; > -+ struct dentry *parent; > -+ int err = -EOPNOTSUPP; > -+ bool valid; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ > -+ err = vfs_getxattr(lower_dentry, (char *) name, value, size); > -+ > -+out: > -+ unionfs_check_dentry(dentry); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+/* > -+ * BKL held by caller. > -+ * dentry->d_inode->i_mutex locked > -+ */ > -+int unionfs_setxattr(struct dentry *dentry, const char *name, > -+ const void *value, size_t size, int flags) > -+{ > -+ struct dentry *lower_dentry = NULL; > -+ struct dentry *parent; > -+ int err = -EOPNOTSUPP; > -+ bool valid; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ > -+ err = vfs_setxattr(lower_dentry, (char *) name, (void *) value, > -+ size, flags); > -+ > -+out: > -+ unionfs_check_dentry(dentry); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+/* > -+ * BKL held by caller. > -+ * dentry->d_inode->i_mutex locked > -+ */ > -+int unionfs_removexattr(struct dentry *dentry, const char *name) > -+{ > -+ struct dentry *lower_dentry = NULL; > -+ struct dentry *parent; > -+ int err = -EOPNOTSUPP; > -+ bool valid; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ > -+ err = vfs_removexattr(lower_dentry, (char *) name); > -+ > -+out: > -+ unionfs_check_dentry(dentry); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -+ > -+/* > -+ * BKL held by caller. > -+ * dentry->d_inode->i_mutex locked > -+ */ > -+ssize_t unionfs_listxattr(struct dentry *dentry, char *list, size_t size) > -+{ > -+ struct dentry *lower_dentry = NULL; > -+ struct dentry *parent; > -+ int err = -EOPNOTSUPP; > -+ char *encoded_list = NULL; > -+ bool valid; > -+ > -+ unionfs_read_lock(dentry->d_sb, UNIONFS_SMUTEX_CHILD); > -+ parent = unionfs_lock_parent(dentry, UNIONFS_DMUTEX_PARENT); > -+ unionfs_lock_dentry(dentry, UNIONFS_DMUTEX_CHILD); > -+ > -+ valid = __unionfs_d_revalidate(dentry, parent, false); > -+ if (unlikely(!valid)) { > -+ err = -ESTALE; > -+ goto out; > -+ } > -+ > -+ lower_dentry = unionfs_lower_dentry(dentry); > -+ > -+ encoded_list = list; > -+ err = vfs_listxattr(lower_dentry, encoded_list, size); > -+ > -+out: > -+ unionfs_check_dentry(dentry); > -+ unionfs_unlock_dentry(dentry); > -+ unionfs_unlock_parent(dentry, parent); > -+ unionfs_read_unlock(dentry->d_sb); > -+ return err; > -+} > -diff --git a/include/linux/fs_stack.h b/include/linux/fs_stack.h > -index da317c7..64f1ced 100644 > ---- a/include/linux/fs_stack.h > -+++ b/include/linux/fs_stack.h > -@@ -1,7 +1,19 @@ > -+/* > -+ * Copyright (c) 2006-2009 Erez Zadok > -+ * Copyright (c) 2006-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2006-2009 Stony Brook University > -+ * Copyright (c) 2006-2009 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > - #ifndef _LINUX_FS_STACK_H > - #define _LINUX_FS_STACK_H > - > --/* This file defines generic functions used primarily by stackable > -+/* > -+ * This file defines generic functions used primarily by stackable > - * filesystems; none of these functions require i_mutex to be held. > - */ > - > -diff --git a/include/linux/magic.h b/include/linux/magic.h > -index 1e5df2a..01ee54d 100644 > ---- a/include/linux/magic.h > -+++ b/include/linux/magic.h > -@@ -50,6 +50,8 @@ > - #define REISER2FS_SUPER_MAGIC_STRING "ReIsEr2Fs" > - #define REISER2FS_JR_SUPER_MAGIC_STRING "ReIsEr3Fs" > - > -+#define UNIONFS_SUPER_MAGIC 0xf15f083d > -+ > - #define SMB_SUPER_MAGIC 0x517B > - #define USBDEVICE_SUPER_MAGIC 0x9fa2 > - #define CGROUP_SUPER_MAGIC 0x27e0eb > -diff --git a/include/linux/namei.h b/include/linux/namei.h > -index eba45ea..8e19e9c 100644 > ---- a/include/linux/namei.h > -+++ b/include/linux/namei.h > -@@ -81,8 +81,11 @@ extern int vfs_path_lookup(struct dentry *, struct > vfsmount *, > - > - extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry > *dentry, > - int (*open)(struct inode *, struct file *)); > -+extern void release_open_intent(struct nameidata *); > - > - extern struct dentry *lookup_one_len(const char *, struct dentry *, int); > -+extern struct dentry *lookup_one_len_nd(const char *, struct dentry *, int, > -+ struct nameidata *nd); > - > - extern int follow_down_one(struct path *); > - extern int follow_down(struct path *); > -diff --git a/include/linux/splice.h b/include/linux/splice.h > -index 997c3b4..54f5501 100644 > ---- a/include/linux/splice.h > -+++ b/include/linux/splice.h > -@@ -81,6 +81,11 @@ extern ssize_t splice_to_pipe(struct pipe_inode_info *, > - struct splice_pipe_desc *); > - extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *, > - splice_direct_actor *); > -+extern long vfs_splice_from(struct pipe_inode_info *pipe, struct file *out, > -+ loff_t *ppos, size_t len, unsigned int flags); > -+extern long vfs_splice_to(struct file *in, loff_t *ppos, > -+ struct pipe_inode_info *pipe, size_t len, > -+ unsigned int flags); > - > - /* > - * for dynamic pipe sizing > -diff --git a/include/linux/union_fs.h b/include/linux/union_fs.h > -new file mode 100644 > -index 0000000..c84d97e > ---- /dev/null > -+++ b/include/linux/union_fs.h > -@@ -0,0 +1,22 @@ > -+/* > -+ * Copyright (c) 2003-2009 Erez Zadok > -+ * Copyright (c) 2005-2007 Josef 'Jeff' Sipek > -+ * Copyright (c) 2003-2009 Stony Brook University > -+ * Copyright (c) 2003-2009 The Research Foundation of SUNY > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#ifndef _LINUX_UNION_FS_H > -+#define _LINUX_UNION_FS_H > -+ > -+/* > -+ * DEFINITIONS FOR USER AND KERNEL CODE: > -+ */ > -+# define UNIONFS_IOCTL_INCGEN _IOR(0x15, 11, int) > -+# define UNIONFS_IOCTL_QUERYFILE _IOR(0x15, 15, int) > -+ > -+#endif /* _LINUX_UNIONFS_H */ > -+ > -diff --git a/security/security.c b/security/security.c > -index 4ba6d4c..093d8b4 100644 > ---- a/security/security.c > -+++ b/security/security.c > -@@ -520,6 +520,7 @@ int security_inode_permission(struct inode *inode, int > mask) > - return 0; > - return security_ops->inode_permission(inode, mask, 0); > - } > -+EXPORT_SYMBOL(security_inode_permission); > - > - int security_inode_exec_permission(struct inode *inode, unsigned int flags) > - { > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0030-omap- > Change-omap_device-activate-latency-messages-fr.patch b/recipes- > kernel/linux/linux-omap-2.6.39/sakoman/0030-omap-Change-omap_device- > activate-latency-messages-fr.patch > deleted file mode 100644 > index 7dc8090..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0030-omap-Change- > omap_device-activate-latency-messages-fr.patch > +++ /dev/null > @@ -1,34 +0,0 @@ > -From 728b784863056a2b2e35134f71082271ebab0892 Mon Sep 17 > 00:00:00 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Mon, 23 May 2011 12:16:50 -0700 > -Subject: [PATCH 30/32] omap: Change omap_device activate latency messages > from pr_warning to pr_debug > - > -Messages can be safely ignored, so reduce console noise > - > -Signed-off-by: Steve Sakoman <steve@sakoman.com> > ---- > - arch/arm/plat-omap/omap_device.c | 4 ++-- > - 1 files changed, 2 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat- > omap/omap_device.c > -index 9bbda9a..ca8a479 100644 > ---- a/arch/arm/plat-omap/omap_device.c > -+++ b/arch/arm/plat-omap/omap_device.c > -@@ -145,12 +145,12 @@ static int _omap_device_activate(struct > omap_device *od, u8 ignore_lat) > - odpl->activate_lat_worst = act_lat; > - if (odpl->flags & > OMAP_DEVICE_LATENCY_AUTO_ADJUST) { > - odpl->activate_lat = act_lat; > -- pr_warning("omap_device: %s.%d: new worst > case " > -+ pr_debug("omap_device: %s.%d: new worst > case " > - "activate latency %d: %llu\n", > - od->pdev.name, od->pdev.id, > - od->pm_lat_level, act_lat); > - } else > -- pr_warning("omap_device: %s.%d: activate " > -+ pr_debug("omap_device: %s.%d: activate " > - "latency %d higher than exptected. " > - "(%llu > %d)\n", > - od->pdev.name, od->pdev.id, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0031-omap-overo- > Add-opp-init.patch b/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0031- > omap-overo-Add-opp-init.patch > deleted file mode 100644 > index 07df763..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0031-omap-overo-Add- > opp-init.patch > +++ /dev/null > @@ -1,105 +0,0 @@ > -From 530abfee962141f263344b4de3ca48b57e5e514c Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Tue, 24 May 2011 20:36:07 -0700 > -Subject: [PATCH 31/32] omap: overo: Add opp init > - > -omap: overo: Add opp init > - > -Work in progress > - > -Signed-off-by: Steve Sakoman <steve@sakoman.com> > ---- > - arch/arm/mach-omap2/board-overo.c | 49 > +++++++++++++++++++++++++++++++++++++ > - 1 files changed, 49 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 05dd3eb..8c2d21f 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -25,6 +25,7 @@ > - #include <linux/init.h> > - #include <linux/io.h> > - #include <linux/kernel.h> > -+#include <linux/opp.h> > - #include <linux/platform_device.h> > - #include <linux/i2c/twl.h> > - #include <linux/regulator/machine.h> > -@@ -43,6 +44,7 @@ > - > - #include <plat/board.h> > - #include <plat/common.h> > -+#include <plat/omap_device.h> > - #include <plat/display.h> > - #include <plat/panel-generic-dpi.h> > - #include <mach/gpio.h> > -@@ -54,6 +56,7 @@ > - #include <plat/usb.h> > - > - #include "mux.h" > -+#include "pm.h" > - #include "sdram-micron-mt46h32m32lf-6.h" > - #include "hsmmc.h" > - > -@@ -755,6 +758,51 @@ static struct omap_musb_board_data > musb_board_data = { > - .power = 100, > - }; > - > -+static void __init overo_opp_init(void) > -+{ > -+ int r = 0; > -+ > -+ /* Initialize the omap3 opp table */ > -+ if (omap3_opp_init()) { > -+ pr_err("%s: opp default init failed\n", __func__); > -+ return; > -+ } > -+ > -+ /* Custom OPP enabled for 36/3730 */ > -+ if (cpu_is_omap3630()) { > -+ struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); > -+ struct omap_hwmod *dh = omap_hwmod_lookup("iva"); > -+ struct device *dev; > -+ > -+ if (!mh || !dh) { > -+ pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", > -+ __func__, mh, dh); > -+ return; > -+ } > -+ /* Enable MPU 1GHz and lower opps */ > -+ dev = &mh->od->pdev.dev; > -+ r = opp_enable(dev, 1000000000); > -+ > -+ /* Enable IVA 800MHz and lower opps */ > -+ dev = &dh->od->pdev.dev; > -+ r |= opp_enable(dev, 800000000); > -+ > -+ if (r) { > -+ pr_err("%s: failed to enable higher opp %d\n", > -+ __func__, r); > -+ /* > -+ * Cleanup - disable the higher freqs - we dont care > -+ * about the results > -+ */ > -+ dev = &mh->od->pdev.dev; > -+ opp_disable(dev, 1000000000); > -+ dev = &dh->od->pdev.dev; > -+ opp_disable(dev, 800000000); > -+ } > -+ } > -+ return; > -+} > -+ > - static void __init overo_init(void) > - { > - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); > -@@ -770,6 +818,7 @@ static void __init overo_init(void) > - overo_display_init(); > - overo_init_led(); > - overo_init_keys(); > -+ overo_opp_init(); > - > - /* Ensure SDRC pins are mux'd for self-refresh */ > - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0032-omap3-Add- > basic-support-for-720MHz-part.patch b/recipes-kernel/linux/linux-omap- > 2.6.39/sakoman/0032-omap3-Add-basic-support-for-720MHz-part.patch > deleted file mode 100644 > index 9a9320d..0000000 > --- a/recipes-kernel/linux/linux-omap-2.6.39/sakoman/0032-omap3-Add-basic- > support-for-720MHz-part.patch > +++ /dev/null > @@ -1,202 +0,0 @@ > -From cd9682b39f41675c4e551c607425226b38fab17d Mon Sep 17 00:00:00 > 2001 > -From: Sanjeev Premi <premi@ti.com> > -Date: Tue, 18 Jan 2011 13:19:55 +0530 > -Subject: [PATCH 32/32] omap3: Add basic support for 720MHz part > - > -This patch adds support for new speed enhanced parts with ARM > -and IVA running at 720MHz and 520MHz respectively. These parts > -can be probed at run-time by reading PRODID.SKUID[3:0] at > -0x4830A20C [1]. > - > -This patch specifically does following: > - * Detect devices capable of 720MHz. > - * Add new OPP > - * Ensure that OPP is conditionally enabled. > - * Check for presence of IVA before attempting to enable > - the corresponding OPP. > - > - [1] http://focus.ti.com/lit/ug/spruff1d/spruff1d.pdf > - > -Signed-off-by: Sanjeev Premi <premi@ti.com> > ---- > - arch/arm/mach-omap2/control.h | 7 ++++ > - arch/arm/mach-omap2/id.c | 10 +++++ > - arch/arm/mach-omap2/opp3xxx_data.c | 63 > ++++++++++++++++++++++++++++++++- > - arch/arm/plat-omap/include/plat/cpu.h | 2 + > - 4 files changed, 81 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach- > omap2/control.h > -index c2804c1..6edd7cc 100644 > ---- a/arch/arm/mach-omap2/control.h > -+++ b/arch/arm/mach-omap2/control.h > -@@ -371,6 +371,13 @@ > - #define FEAT_NEON 0 > - #define FEAT_NEON_NONE 1 > - > -+/* > -+ * Product ID register > -+ */ > -+#define OMAP3_PRODID 0x020C > -+ > -+#define OMAP3_SKUID_MASK 0x0f > -+#define OMAP3_SKUID_720MHZ 0x08 > - > - #ifndef __ASSEMBLY__ > - #ifdef CONFIG_ARCH_OMAP2PLUS > -diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > -index 2537090..b6ed78a 100644 > ---- a/arch/arm/mach-omap2/id.c > -+++ b/arch/arm/mach-omap2/id.c > -@@ -210,6 +210,15 @@ static void __init omap3_check_features(void) > - * TODO: Get additional info (where applicable) > - * e.g. Size of L2 cache. > - */ > -+ > -+ /* > -+ * Does it support 720MHz? > -+ */ > -+ status = (OMAP3_SKUID_MASK & read_tap_reg(OMAP3_PRODID)); > -+ > -+ if (status & OMAP3_SKUID_720MHZ) { > -+ omap3_features |= OMAP3_HAS_720MHZ; > -+ } > - } > - > - static void __init ti816x_check_features(void) > -@@ -490,6 +499,7 @@ static void __init omap3_cpuinfo(void) > - OMAP3_SHOW_FEATURE(neon); > - OMAP3_SHOW_FEATURE(isp); > - OMAP3_SHOW_FEATURE(192mhz_clk); > -+ OMAP3_SHOW_FEATURE(720mhz); > - > - printk(")\n"); > - } > -diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach- > omap2/opp3xxx_data.c > -index d95f3f9..44fbc84 100644 > ---- a/arch/arm/mach-omap2/opp3xxx_data.c > -+++ b/arch/arm/mach-omap2/opp3xxx_data.c > -@@ -18,8 +18,10 @@ > - * GNU General Public License for more details. > - */ > - #include <linux/module.h> > -+#include <linux/opp.h> > - > - #include <plat/cpu.h> > -+#include <plat/omap_device.h> > - > - #include "control.h" > - #include "omap_opp_data.h" > -@@ -98,6 +100,8 @@ static struct omap_opp_def __initdata > omap34xx_opp_def_list[] = { > - OPP_INITIALIZER("mpu", true, 550000000, > OMAP3430_VDD_MPU_OPP4_UV), > - /* MPU OPP5 */ > - OPP_INITIALIZER("mpu", true, 600000000, > OMAP3430_VDD_MPU_OPP5_UV), > -+ /* MPU OPP6 */ > -+ OPP_INITIALIZER("mpu", false, 720000000, 1350000), > - > - /* > - * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is > -@@ -123,6 +127,8 @@ static struct omap_opp_def __initdata > omap34xx_opp_def_list[] = { > - OPP_INITIALIZER("iva", true, 400000000, > OMAP3430_VDD_MPU_OPP4_UV), > - /* DSP OPP5 */ > - OPP_INITIALIZER("iva", true, 430000000, > OMAP3430_VDD_MPU_OPP5_UV), > -+ /* DSP OPP6 */ > -+ OPP_INITIALIZER("iva", false, 520000000, 1350000), > - }; > - > - static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { > -@@ -150,6 +156,57 @@ static struct omap_opp_def __initdata > omap36xx_opp_def_list[] = { > - OPP_INITIALIZER("iva", false, 800000000, > OMAP3630_VDD_MPU_OPP1G_UV), > - }; > - > -+ > -+/** > -+ * omap3_opp_enable_720Mhz() - Enable the OPP corresponding to 720MHz > -+ * > -+ * This function would be executed only if the silicon is capable of > -+ * running at the 720MHz. > -+ */ > -+static int __init omap3_opp_enable_720Mhz(void) > -+{ > -+ int r = -ENODEV; > -+ struct omap_hwmod *oh_mpu = omap_hwmod_lookup("mpu"); > -+ struct omap_hwmod *oh_iva; > -+ struct platform_device *pdev; > -+ > -+ if (!oh_mpu || !oh_mpu->od) { > -+ goto err; > -+ } else { > -+ pdev = &oh_mpu->od->pdev; > -+ > -+ r = opp_enable(&pdev->dev, 720000000); > -+ if (r < 0) { > -+ dev_err(&pdev->dev, > -+ "opp_enable() failed for mpu@720MHz"); > -+ goto err; > -+ } > -+ } > -+ > -+ if (omap3_has_iva()) { > -+ oh_iva = omap_hwmod_lookup("iva"); > -+ > -+ if (!oh_iva || !oh_iva->od) { > -+ r = -ENODEV; > -+ goto err; > -+ } else { > -+ pdev = &oh_iva->od->pdev; > -+ > -+ r = opp_enable(&pdev->dev, 520000000); > -+ if (r < 0) { > -+ dev_err(&pdev->dev, > -+ "opp_enable() failed for > iva@520MHz"); > -+ goto err; > -+ } > -+ } > -+ } > -+ > -+ dev_info(&pdev->dev, "Enabled OPP corresponding to 720MHz\n"); > -+ > -+err: > -+ return r; > -+} > -+ > - /** > - * omap3_opp_init() - initialize omap3 opp table > - */ > -@@ -163,10 +220,14 @@ int __init omap3_opp_init(void) > - if (cpu_is_omap3630()) > - r = omap_init_opp_table(omap36xx_opp_def_list, > - ARRAY_SIZE(omap36xx_opp_def_list)); > -- else > -+ else { > - r = omap_init_opp_table(omap34xx_opp_def_list, > - ARRAY_SIZE(omap34xx_opp_def_list)); > - > -+ if (omap3_has_720mhz()) > -+ r = omap3_opp_enable_720Mhz(); > -+ } > -+ > - return r; > - } > - device_initcall(omap3_opp_init); > -diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat- > omap/include/plat/cpu.h > -index 8198bb6..5204c1e 100644 > ---- a/arch/arm/plat-omap/include/plat/cpu.h > -+++ b/arch/arm/plat-omap/include/plat/cpu.h > -@@ -478,6 +478,7 @@ extern u32 omap3_features; > - #define OMAP3_HAS_192MHZ_CLK BIT(5) > - #define OMAP3_HAS_IO_WAKEUP BIT(6) > - #define OMAP3_HAS_SDRC BIT(7) > -+#define OMAP3_HAS_720MHZ BIT(8) > - > - #define OMAP3_HAS_FEATURE(feat,flag) \ > - static inline unsigned int omap3_has_ ##feat(void) \ > -@@ -493,5 +494,6 @@ OMAP3_HAS_FEATURE(isp, ISP) > - OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) > - OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) > - OMAP3_HAS_FEATURE(sdrc, SDRC) > -+OMAP3_HAS_FEATURE(720mhz, 720MHZ) > - > - #endif > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-omap_2.6.39.bb b/recipes- > kernel/linux/linux-omap_2.6.39.bb > deleted file mode 100644 > index 430fa09..0000000 > --- a/recipes-kernel/linux/linux-omap_2.6.39.bb > +++ /dev/null > @@ -1,123 +0,0 @@ > -require linux.inc > - > -DESCRIPTION = "Linux kernel for OMAP processors" > - > -COMPATIBLE_MACHINE = "(beagleboard)" > - > -# The main PR is now using MACHINE_KERNEL_PR, for omap3 see > conf/machine/include/omap3.inc > -SRCREV_pn-${PN} = "v2.6.39" > -MACHINE_KERNEL_PR_append = "o" > - > -FILESEXTRAPATHS_prepend := "{THISDIR}/${PN}-${PV}:" > - > -SRC_URI += "git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux- > omap.git;protocol=git \ > - file://defconfig" > - > -SRC_URI_append = " \ > - file://sakoman/0001-OMAP-DSS2-DSI-fix-use_sys_clk-highfreq.patch \ > - file://sakoman/0002-OMAP-DSS2-DSI-fix-dsi_dump_clocks.patch \ > - file://sakoman/0003-OMAP2PLUS-DSS2-Fix-Return-correct-lcd-clock- > source-f.patch \ > - file://sakoman/0004-OMAP-DSS-DSI-Fix-DSI-PLL-power-bug.patch \ > - file://sakoman/0005-OMAP-DSS2-fix-panel-Kconfig-dependencies.patch > \ > - file://sakoman/0006-OMAP-DSS2-add-bootarg-for-selecting-svideo-or- > compos.patch \ > - file://sakoman/0007-video-add-timings-for-hd720.patch \ > - file://sakoman/0008-drivers-net-smsc911x-return-ENODEV-if-device-is- > not-.patch \ > - file://sakoman/0009-drivers-input-touchscreen-ads7846-return- > ENODEV-if-d.patch \ > - file://sakoman/0010-Revert-omap2_mcspi-Flush-posted-writes.patch \ > - file://sakoman/0011-Revert-omap_hsmmc-improve-interrupt- > synchronisation.patch \ > - file://sakoman/0012-Don-t-turn-SDIO-cards-off-to-save-power.-Doing- > so-wi.patch \ > - file://sakoman/0014-soc-codecs-Enable-audio-capture-by-default-for- > twl40.patch \ > - file://sakoman/0015-soc-codecs-twl4030-Turn-on-mic-bias-by- > default.patch \ > - file://sakoman/0016-RTC-add-support-for-backup-battery- > recharge.patch \ > - file://sakoman/0017-ARM-OMAP2-mmc-twl4030-move-clock-input- > selection-pri.patch \ > - file://sakoman/0018-Add-power-off-support-for-the-TWL4030- > companion.patch \ > - file://sakoman/0019-ARM-OMAP-Add-twl4030-madc-support-to- > Overo.patch \ > - file://sakoman/0020-Enabling-Hwmon-driver-for-twl4030-madc.patch \ > - file://sakoman/0021-mfd-twl-core-enable-madc-clock.patch \ > - file://sakoman/0022-rtc-twl-Switch-to-using-threaded-irq.patch \ > - file://sakoman/0023-ARM-OMAP-automatically-set-musb-mode-in- > platform-dat.patch \ > - file://sakoman/0024-omap-mmc-Adjust-dto-to-eliminate-timeout- > errors.patch \ > - file://sakoman/0025-omap-Fix-mtd-subpage-read-alignment.patch \ > - file://sakoman/0026-mtd-nand-omap2-Force-all-buffer-reads-to-u32- > alignme.patch \ > - file://sakoman/0027-omap-nand-fix-subpage-ecc-issue-with- > prefetch.patch \ > - file://sakoman/0028-OMAP-Overo-Add-support-for-spidev.patch \ > - file://sakoman/0029-unionfs-Add-support-for-unionfs-2.5.9.patch \ > - file://sakoman/0030-omap-Change-omap_device-activate-latency- > messages-fr.patch \ > - file://sakoman/0031-omap-overo-Add-opp-init.patch \ > - file://sakoman/0032-omap3-Add-basic-support-for-720MHz-part.patch > \ > - \ > - file://beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM- > revision.patch \ > - file://beagle/0002-OMAP3-beagle-add-support-for- > expansionboards.patch \ > - file://beagle/0003-OMAP3-beagle-add-MADC-support.patch \ > - file://beagle/0004-OMAP3-beagle-add-regulators-for-camera- > interface.patch \ > - file://beagle/0005-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch \ > - file://beagle/0006-OMAP3-BEAGLE-fix-RTC.patch \ > - file://beagle/0007-omap-mmc-Adjust-dto-to-eliminate-timeout- > errors.patch \ > - \ > - file://camera/0001-Add-driver-for-Aptina-Micron-mt9p031-sensor.patch > \ > - file://camera/0002-v4l-Add-mt9v032-sensor-driver.patch \ > - file://camera/0003-Add-support-for-mt9p031-LI-5M03-module-in- > Beagleboar.patch \ > - \ > - file://pm/linux-omap-2.6.39-ti-pm/0001-OMAP3-voltage-remove- > spurious-pr_notice-for-debugfs.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0002-OMAP4-PM-remove- > redundant-ifdef-CONFIG_PM.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0003-OMAP3-smartreflex-fix- > sr_late_init-error-path-in-pro.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0004-OMAP3-smartreflex-request- > the-memory-region.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0005-OMAP3-smartreflex-fix- > ioremap-leak-on-probe-error.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0006-OMAP3-smartreflex-delete- > instance-from-sr_list-on-pr.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0007-OMAP3-smartreflex-delete- > debugfs-entries-on-probe-er.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0008-OMAP3-cpuidle-remove- > useless-SDP-specific-timings.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0009-OMAP3-SR-make-notify- > independent-of-class.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0010-OMAP3-SR-disable-interrupt- > by-default.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0011-OMAP3-SR-enable-disable-SR- > only-on-need.patch \ > - file://pm/linux-omap-2.6.39-ti-pm/0012-OMAP3-SR-fix-cosmetic- > indentation.patch \ > - \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0001-OMAP-CPUfreq- > ensure-driver-initializes-after-cpufreq.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0002-OMAP-CPUfreq- > ensure-policy-is-fully-initialized.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0003-OMAP3-PM- > CPUFreq-driver-for-OMAP3.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0004-OMAP-PM- > CPUFREQ-Fix-conditional-compilation.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0005-cpufreq-fixup- > after-new-OPP-layer-merged.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0006-OMAP-cpufreq- > Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0007-OMAP2PLUS- > cpufreq-Add-SMP-support-to-cater-OMAP4430.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq/0008-OMAP2PLUS- > cpufreq-Fix-typo-when-attempting-to-set-mp.patch \ > - \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0001-cpufreq- > helpers-for-walking-the-frequency-table.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-hotplug/0002-cpufreq- > introduce-hotplug-governor.patch \ > - \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0001-OMAP2- > cpufreq-free-up-table-on-exit.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0002-OMAP2- > cpufreq-handle-invalid-cpufreq-table.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0003-OMAP2- > cpufreq-minor-comment-cleanup.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0004-OMAP2- > cpufreq-use-clk_init_cpufreq_table-if-OPPs-not.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0005-OMAP2- > cpufreq-use-cpufreq_frequency_table_target.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpufreq-fixes/0006-OMAP2- > cpufreq-fix-freq_table-leak.patch \ > - \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0001-OMAP2- > clockdomain-Add-an-api-to-read-idle-mode.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0002-OMAP2- > clockdomain-Add-SoC-support-for-clkdm_is_idle.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0003-OMAP2-PM- > Initialise-sleep_switch-to-a-non-valid-valu.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0004-OMAP2-PM-idle- > clkdms-only-if-already-in-idle.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0005-OMAP2-hwmod- > Follow-the-recomended-PRCM-sequence.patch \ > - file://pm/linux-omap-2.6.39-ti-pm-wip-cpuidle/0006-OMAP-Serial- > Check-wk_st-only-if-present.patch \ > - \ > - file://mfd/0001-mfd-Fix-omap-usbhs-crash-when-rmmoding-ehci-or- > ohci.patch \ > - file://mfd/0002-mfd-Fix-omap_usbhs_alloc_children-error- > handling.patch \ > - file://mfd/0003-mfd-Add-omap-usbhs-runtime-PM-support.patch \ > - file://mfd/0004-arm-omap-usb-ehci-and-ohci-hwmod-structures-for- > omap.patch \ > - file://mfd/0005-arm-omap-usb-register-hwmods-of-usbhs.patch \ > - file://mfd/0006-arm-omap-usb-device-name-change-for-the-clk-names- > of.patch \ > - file://mfd/0007-mfd-global-Suspend-and-resume-support-of-ehci-and- > oh.patch \ > - file://mfd/0008-MFD-TWL4030-Correct-the-warning-print-during-script- > .patch \ > - file://mfd/0009-MFD-TWL4030-Modifying-the-macro-name-Main_Ref- > to-all.patch \ > - file://mfd/0010-MFD-TWL4030-power-scripts-for-OMAP3-boards.patch > \ > - file://mfd/0011-MFD-TWL4030-TWL-version-checking.patch \ > - file://mfd/0012-MFD-TWL4030-workaround-changes-for-Erratum- > 27.patch \ > - file://mfd/0013-MFD-TWL4030-optimizing-resource-configuration.patch > \ > - \ > - file://musb/0001-usb-musb-Enable-DMA-mode1-RX-for-USB-Mass- > Storage.patch \ > - \ > - file://net/0001-NFS-Revert-NFSROOT-default-mount-options.patch \ > - " > - > -SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ > -" > - > -S = "${WORKDIR}/git" > - > -- > 1.8.3.2 > > _______________________________________________ > meta-ti mailing list > meta-ti@yoctoproject.org > https://lists.yoctoproject.org/listinfo/meta-ti ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 2/8] linux-3.0: remove old beagleboard-specific 3.0 and 3.1rc kernel recipes 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko 2013-09-28 22:53 ` [PATCH 1/8] linux-omap-2.6.39: remove old beagleboard-specific and not supported kernel Denys Dmytriyenko @ 2013-09-28 22:53 ` Denys Dmytriyenko 2013-09-30 14:32 ` Cooper Jr., Franklin 2013-09-28 22:54 ` [PATCH 3/8] linux-omap4-3.1.0: remove old pandaboard-specific kernel Denys Dmytriyenko ` (5 subsequent siblings) 7 siblings, 1 reply; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-28 22:53 UTC (permalink / raw) To: meta-ti From: Denys Dmytriyenko <denys@ti.com> Beagleboard is supported by newer 3.2 and 3.3.7 kernel recipes. Signed-off-by: Denys Dmytriyenko <denys@ti.com> --- ...OMAP3-beagle-add-support-for-expansionboa.patch | 340 -- ...0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch | 26 - .../0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 - .../linux/linux-3.0+3.1rc/beagleboard/defconfig | 3517 ------------------- .../linux/linux-3.0+3.1rc/fixes/vout.patch | 79 - ...01-Enabling-Hwmon-driver-for-twl4030-madc.patch | 46 - .../madc/0002-mfd-twl-core-enable-madc-clock.patch | 54 - recipes-kernel/linux/linux-3.0+3.1rc/patch.sh | 27 - ...001-ARM-L2-Add-and-export-outer_clean_all.patch | 67 - ...e-add-support-for-beagleboard-xM-revision.patch | 196 -- ...OMAP3-beagle-add-support-for-expansionboa.patch | 340 -- ...0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch | 26 - .../0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 - ...5-omap3-Add-basic-support-for-720MHz-part.patch | 202 -- ...eagleboard-make-wilink-init-look-more-lik.patch | 32 - ...Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch | 33 - ...add-cpu-id-register-to-MAC-address-helper.patch | 89 - ...BeagleBoard-Fix-up-random-or-missing-MAC-.patch | 156 - ...eagleboard-fix-mmc-write-protect-pin-when.patch | 26 - ...d-reinstate-usage-of-hi-speed-PLL-divider.patch | 29 - .../linux/linux-3.0/beagleboard/defconfig | 3604 -------------------- ...3630-PRM-add-ABB-PRM-register-definitions.patch | 93 - ...P3-PM-VP-generalize-PRM-interrupt-helpers.patch | 263 -- ...P3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch | 202 -- ...P3-ABB-Adaptive-Body-Bias-structures-data.patch | 240 -- ...-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch | 194 -- ...3-Voltage-add-ABB-data-to-voltage-domains.patch | 83 - ...3-ABB-initialization-transition-functions.patch | 274 -- ...-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch | 114 - ...01-Enabling-Hwmon-driver-for-twl4030-madc.patch | 46 - .../madc/0002-mfd-twl-core-enable-madc-clock.patch | 54 - ...Undef-before-redefining-__attribute_const.patch | 31 - ...llow-OPP-enumeration-to-continue-if-devic.patch | 43 - ...nking-error-in-twl-common.c-for-OMAP2-3-4.patch | 129 - recipes-kernel/linux/linux-3.0/patch.sh | 29 - ...-introduce-function-to-free-cpufreq-table.patch | 84 - ...q-ensure-driver-initializes-after-cpufreq.patch | 28 - ...PUfreq-ensure-policy-is-fully-initialized.patch | 32 - .../0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch | 264 -- ...AP-PM-CPUFREQ-Fix-conditional-compilation.patch | 33 - ...-cpufreq-fixup-after-new-OPP-layer-merged.patch | 34 - ...q-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch | 673 ---- ...cpufreq-Add-SMP-support-to-cater-OMAP4430.patch | 171 - ...pufreq-Fix-typo-when-attempting-to-set-mp.patch | 30 - ...P2-cpufreq-move-clk-name-decision-to-init.patch | 64 - ...-cpufreq-deny-initialization-if-no-mpudev.patch | 64 - ...012-OMAP2-cpufreq-dont-support-freq_table.patch | 129 - ...3-OMAP2-cpufreq-only-supports-OPP-library.patch | 46 - ...-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch | 61 - .../0015-OMAP2-cpufreq-fix-freq_table-leak.patch | 90 - ...eq-Remove-superfluous-check-in-target-for.patch | 58 - ...ufreq-notify-even-with-bad-boot-frequency.patch | 48 - ...req-Enable-all-CPUs-in-shared-policy-mask.patch | 42 - ...eq-update-lpj-with-reference-value-to-avo.patch | 121 - ...egulator-supply-definitions-in-mach-omap2.patch | 1083 ------ ...style-supply.dev-assignments-common-in-hs.patch | 160 - ...parate-init_irq-functions-to-avoid-cpu_is.patch | 802 ----- ...parate-timer-init-functions-to-avoid-cpu_.patch | 689 ---- ...05-omap-Move-dmtimer-defines-to-dmtimer.h.patch | 287 -- ...-subset-of-dmtimer-functions-into-inline-.patch | 323 -- ...7-omap2-Use-dmtimer-macros-for-clockevent.patch | 279 -- .../0008-omap2-Remove-gptimer_wakeup-for-now.patch | 177 - ...OMAP3-SR-make-notify-independent-of-class.patch | 47 - ...010-OMAP3-SR-disable-interrupt-by-default.patch | 36 - ...1-OMAP3-SR-enable-disable-SR-only-on-need.patch | 40 - .../0012-OMAP3-SR-fix-cosmetic-indentation.patch | 48 - ...ve-clocksource-and-timesource-and-initial.patch | 125 - ...-omap2-Use-dmtimer-macros-for-clocksource.patch | 163 - ...p2-Remove-omap2_gp_clockevent_set_gptimer.patch | 240 -- ...e-timer-gp.c-into-timer.c-to-combine-time.patch | 737 ---- .../0017-omap-cleanup-NAND-platform-data.patch | 165 - ...omap-board-omap3evm-Fix-compilation-error.patch | 40 - .../0019-omap-mcbsp-Drop-SPI-mode-support.patch | 311 -- ...map-mcbsp-Drop-in-driver-transfer-support.patch | 548 --- .../voltdm/0021-omap2-fix-build-regression.patch | 29 - ...w-twl-common-for-common-TWL-configuration.patch | 200 -- ...common-twl6030-configuration-to-twl-commo.patch | 601 ---- ...ve-common-twl-configuration-to-twl-common.patch | 827 ----- ...common-regulator-configuration-to-twl-com.patch | 924 ----- ...mcbsp-Remove-rx_-tx_word_length-variables.patch | 45 - .../0027-omap-mcbsp-Remove-port-number-enums.patch | 68 - .../0028-OMAP-dmtimer-add-missing-include.patch | 31 - ...P2-hwmod-Fix-smart-standby-wakeup-support.patch | 130 - ...4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch | 61 - ...-Enable-module-in-shutdown-to-access-sysc.patch | 37 - ...-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch | 65 - ...wmod-Remove-_populate_mpu_rt_base-warning.patch | 33 - ...4-OMAP2-hwmod-Fix-the-HW-reset-management.patch | 87 - ...-OMAP-hwmod-Add-warnings-if-enable-failed.patch | 30 - ...-Move-pr_debug-to-improve-the-readability.patch | 95 - ...use-a-null-structure-record-to-terminate-.patch | 3529 ------------------- ...share-identical-omap_hwmod_addr_space-arr.patch | 1958 ----------- ...use-a-terminator-record-with-omap_hwmod_m.patch | 2904 ---------------- ...share-identical-omap_hwmod_mpu_irqs-array.patch | 1815 ---------- ...use-a-terminator-record-with-omap_hwmod_d.patch | 1382 -------- ...share-identical-omap_hwmod_dma_info-array.patch | 935 ----- ...share-identical-omap_hwmod_class-omap_hwm.patch | 1730 ---------- ...-data-Fix-L3-interconnect-data-order-and-.patch | 116 - ...-OMAP4-hwmod-data-Remove-un-needed-parens.patch | 42 - .../0046-OMAP4-hwmod-data-Fix-bad-alignement.patch | 218 -- ...-data-Align-interconnect-format-with-regu.patch | 154 - ...48-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch | 31 - ...-data-Remove-usb_host_fs-clkdev-with-NULL.patch | 48 - ...-data-Re-order-some-clock-nodes-and-struc.patch | 229 -- ...ck-data-Fix-max-mult-and-div-for-USB-DPLL.patch | 143 - ...OMAP4-prcm-Fix-errors-in-few-defines-name.patch | 256 -- ...MAP4-prm-Remove-wrong-clockdomain-offsets.patch | 50 - ...54-OMAP4-powerdomain-data-Fix-indentation.patch | 109 - ...move-RESTORE-macros-to-avoid-access-from-.patch | 1523 --------- ...6-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch | 111 - ...domain-data-Fix-data-order-and-wrong-name.patch | 294 -- ...evice-replace-_find_by_pdev-with-to_omap_.patch | 84 - ...OMAP-PM-remove-OMAP_PM_NONE-config-option.patch | 63 - ...-data-Remove-McASP2-McASP3-and-MMC6-clock.patch | 178 - ...MAP4-clock-data-Remove-UNIPRO-clock-nodes.patch | 99 - ...62-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch | 153 - ...itialise-sleep_switch-to-a-non-valid-valu.patch | 39 - ...domain-data-Fix-core-mem-states-and-missi.patch | 68 - ...-data-Keep-GPMC-clocks-always-enabled-and.patch | 45 - ...domain-data-Remove-unsupported-MPU-powerd.patch | 44 - ...AP4-hwmod-data-Change-DSS-main_clk-scheme.patch | 163 - ...et-hwmod-flags-to-only-allow-16-bit-acces.patch | 133 - ...ncrease-omap_i2c_dev_attr-flags-from-u8-t.patch | 46 - ...AP2-Introduce-I2C-IP-versioning-constants.patch | 61 - ...MAP2-create-omap-I2C-functionality-flags-.patch | 51 - ...ag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch | 77 - ...dd-correct-functionality-flags-to-all-oma.patch | 146 - ...d-fix-the-i2c-reset-timeout-during-bootup.patch | 286 -- ...evice-Create-clkdev-entry-for-hwmod-main_.patch | 437 --- ...-data-Add-missing-divider-selection-for-a.patch | 292 -- ...AP4-hwmod-data-Add-clock-domain-attribute.patch | 724 ---- ...OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch | 86 - ...-Replace-CLKCTRL-absolute-address-with-of.patch | 976 ------ ...hwmod-Wait-the-idle-status-to-be-disabled.patch | 153 - ...-Replace-RSTCTRL-absolute-address-with-of.patch | 459 --- ...eplace-warm-reset-API-with-the-offset-bas.patch | 125 - ...083-OMAP4-prm-Remove-deprecated-functions.patch | 81 - ...wmod-data-Add-PRM-context-register-offset.patch | 630 ---- ...-data-Add-modulemode-entry-in-omap_hwmod-.patch | 503 --- ...m-Add-two-new-APIs-for-modulemode-control.patch | 88 - ...-Introduce-the-module-control-in-hwmod-co.patch | 129 - ...omain-Remove-redundant-call-to-pwrdm_wait.patch | 30 - ...domain-Add-2-APIs-to-control-clockdomain-.patch | 231 -- ...0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch | 141 - ...P2-PM-idle-clkdms-only-if-already-in-idle.patch | 53 - ...domain-Add-per-clkdm-lock-to-prevent-conc.patch | 264 -- ...-allow-per-SoC-clock-init-code-to-prevent.patch | 123 - ...-Follow-the-recommended-PRCM-module-enabl.patch | 173 - ...bugfs-node-to-show-the-summary-of-all-clo.patch | 84 - ...hwmod-remove-unused-voltagedomain-pointer.patch | 30 - ...ge-move-PRCM-mod-offets-into-VC-VP-struct.patch | 577 ---- ...ge-move-prm_irqst_reg-from-VP-into-voltag.patch | 203 -- ...ge-start-towards-a-new-voltagedomain-laye.patch | 986 ------ ...ltage-rename-mpu-voltagedomain-to-mpu_iva.patch | 82 - ...MAP3-voltagedomain-data-add-wakeup-domain.patch | 37 - ...oltage-add-scalable-flag-to-voltagedomain.patch | 93 - ...domain-add-voltagedomain-to-struct-powerd.patch | 51 - ...oltage-domains-and-connect-to-powerdomain.patch | 138 - ...MAP3-powerdomain-data-add-voltage-domains.patch | 161 - ...MAP4-powerdomain-data-add-voltage-domains.patch | 177 - ...domain-add-voltage-domain-lookup-during-r.patch | 89 - ...ge-keep-track-of-powerdomains-in-each-vol.patch | 200 -- ...ge-split-voltage-controller-VC-code-into-.patch | 666 ---- ...ge-move-VC-into-struct-voltagedomain-misc.patch | 544 --- ...ge-enable-VC-bypass-scale-method-when-VC-.patch | 37 - ...ge-split-out-voltage-processor-VP-code-in.patch | 874 ----- ...pport-PMICs-with-separate-voltage-and-com.patch | 109 - ...RM-VP-functions-for-checking-clearing-VP-.patch | 375 -- ...place-transaction-done-check-clear-with-V.patch | 142 - ...M-add-register-access-functions-for-VC-VP.patch | 119 - ...ge-convert-to-PRM-register-access-functio.patch | 627 ---- ...C-cleanup-i2c-slave-address-configuration.patch | 145 - ...eanup-PMIC-register-address-configuration.patch | 185 - ...pass-use-fields-from-VC-struct-instead-of.patch | 42 - ...-cleanup-voltage-setup-time-configuration.patch | 227 -- ...ve-on-onlp-ret-off-command-configuration-.patch | 83 - ...AP3-VC-abstract-out-channel-configuration.patch | 267 -- ...ge-domain-move-PMIC-struct-from-vdd_info-.patch | 394 --- ...ke-I2C-config-programmable-with-PMIC-spec.patch | 221 -- ...-handle-mutant-channel-config-for-OMAP4-M.patch | 168 - ...e-last-nominal-voltage-setting-to-get-cur.patch | 31 - ...eanup-move-VP-instance-into-voltdm-misc.-.patch | 643 ---- ...voltage-remove-unneeded-debugfs-interface.patch | 317 -- ...ruct-omap_vp_common-replace-shift-with-__.patch | 214 -- ...ve-SoC-specific-sys-clock-rate-retreival-.patch | 184 - ...ve-timing-calculation-config-into-VP-init.patch | 94 - ...eate-VP-helper-function-for-updating-erro.patch | 107 - ...0134-OMAP3-VP-remove-omap_vp_runtime_data.patch | 170 - ...ve-voltage-scale-function-pointer-into-st.patch | 134 - ...6-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch | 81 - ...P3-VP-update_errorgain-return-error-if-VP.patch | 29 - ...P3-VP-remove-unused-omap_vp_get_curr_volt.patch | 70 - ...mbine-setting-init-voltage-into-common-fu.patch | 141 - ...ge-rename-scale-and-reset-functions-using.patch | 141 - ...ge-move-rename-curr_volt-from-vdd_info-in.patch | 106 - ...AP3-voltdm-final-removal-of-omap_vdd_info.patch | 282 -- ...ge-rename-omap_voltage_get_nom_volt-voltd.patch | 91 - ...ge-update-nominal-voltage-in-voltdm_scale.patch | 49 - ...PM-TWL6030-fix-voltage-conversion-formula.patch | 85 - ...AP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch | 37 - ...7-OMAP4-PM-TWL6030-address-0V-conversions.patch | 38 - ...-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch | 71 - .../0149-OMAP4-PM-TWL6030-add-cmd-register.patch | 56 - ...isplay-single-block-read-console-messages.patch | 28 - ...-omap_device-activate-dectivate-latency-m.patch | 49 - ...dd-bootarg-for-selecting-svideo-or-compos.patch | 75 - ...iminate-noisey-uncorrectable-error-messag.patch | 28 - .../sakoman/0005-video-add-timings-for-hd720.patch | 27 - ...-smsc911x-return-ENODEV-if-device-is-not-.patch | 29 - ...ut-touchscreen-ads7846-return-ENODEV-if-d.patch | 45 - ...08-Revert-omap2_mcspi-Flush-posted-writes.patch | 27 - ...-threaded-IRQ-remove-IRQ-enable-in-interr.patch | 57 - ...0-rtc-twl-Fix-registration-vs.-init-order.patch | 122 - ...Enable-audio-capture-by-default-for-twl40.patch | 27 - ...odecs-twl4030-Turn-on-mic-bias-by-default.patch | 25 - ...l4030-move-clock-input-selection-prior-to.patch | 39 - ...l-add-support-for-backup-battery-recharge.patch | 57 - ...001-ARM-L2-Add-and-export-outer_clean_all.patch | 67 - ...ix-build-break-caused-by-update_mode-remo.patch | 44 - ...-beagleboard-add-bbtoys-ulcd-lite-support.patch | 235 -- ...eagleboard-add-support-for-loopthrough-ex.patch | 61 - ...add-initial-support-for-WS2801-controller.patch | 242 -- .../usb/0001-Fix-sprz319-erratum-2.1.patch | 210 -- recipes-kernel/linux/linux_3.0.bb | 234 -- recipes-kernel/linux/linux_3.1.bb | 33 - 225 files changed, 60457 deletions(-) delete mode 100644 recipes-kernel/linux/linux-3.0+3.1rc/beagle/0001-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch delete mode 100644 recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch delete mode 100644 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<koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 266 +++++++++++++++++++++++++++++++ - 1 files changed, 266 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 32f5f89..f26a9a8 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -21,6 +21,7 @@ - #include <linux/io.h> - #include <linux/leds.h> - #include <linux/gpio.h> -+#include <linux/irq.h> - #include <linux/input.h> - #include <linux/gpio_keys.h> - #include <linux/opp.h> -@@ -156,6 +157,167 @@ static void __init omap3_beagle_init_rev(void) - } - } - -+char expansionboard_name[16]; -+ -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) -+#include <linux/regulator/fixed.h> -+#include <linux/wl12xx.h> -+ -+#define OMAP_BEAGLE_WLAN_EN_GPIO (139) -+#define OMAP_BEAGLE_BT_EN_GPIO (138) -+#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) -+#define OMAP_BEAGLE_FM_EN_BT_WU (136) -+ -+struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { -+ .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO), -+ .board_ref_clock = 2, /* 38.4 MHz */ -+}; -+ -+static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, OMAP_BEAGLE_FM_EN_BT_WU, -1}; -+static struct platform_device wl12xx_device = { -+ .name = "kim", -+ .id = -1, -+ .dev.platform_data = &gpios, -+}; -+ -+static struct omap2_hsmmc_info mmcbbt[] = { -+ { -+ .mmc = 1, -+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, -+ .gpio_wp = 29, -+ }, -+ { -+ .name = "wl1271", -+ .mmc = 2, -+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, -+ .gpio_wp = -EINVAL, -+ .gpio_cd = -EINVAL, -+ .ocr_mask = MMC_VDD_165_195, -+ .nonremovable = true, -+ }, -+ {} /* Terminator */ -+ }; -+ -+static struct regulator_consumer_supply beagle_vmmc2_supply = -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+ -+static struct regulator_init_data beagle_vmmc2 = { -+ .constraints = { -+ .min_uV = 1850000, -+ .max_uV = 1850000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vmmc2_supply, -+}; -+ -+static struct fixed_voltage_config beagle_vwlan = { -+ .supply_name = "vwl1271", -+ .microvolts = 1800000, /* 1.8V */ -+ .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, -+ .startup_delay = 70000, /* 70ms */ -+ .enable_high = 1, -+ .enabled_at_boot = 0, -+ .init_data = &beagle_vmmc2, -+}; -+ -+static struct platform_device omap_vwlan_device = { -+ .name = "reg-fixed-voltage", -+ .id = 1, -+ .dev = { -+ .platform_data = &beagle_vwlan, -+ }, -+}; -+#endif -+ -+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) -+ -+#include <plat/mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 -+ -+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = { -+ { -+ .modalias = "enc28j60", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 20000000, -+ .controller_data = &enc28j60_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_enc28j60_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); -+ omap3beagle_zippy_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); -+ irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_enc28j60_init(void) { return; } -+#endif -+ -+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) -+ -+#include <plat/mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 -+ -+static struct omap2_mcspi_device_config ks8851_spi_chip_info = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = { -+ { -+ .modalias = "ks8851", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 36000000, -+ .controller_data = &ks8851_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_ks8851_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); -+ omap3beagle_zippy2_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); -+ irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy2_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_ks8851_init(void) { return; } -+#endif -+ - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -254,6 +416,12 @@ static struct omap2_hsmmc_info mmc[] = { - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, - .gpio_wp = -EINVAL, - }, -+ { -+ .mmc = 2, -+ .caps = MMC_CAP_4_BIT_DATA, -+ .transceiver = true, -+ .ocr_mask = 0x00100000, /* 3.3V */ -+ }, - {} /* Terminator */ - }; - -@@ -277,7 +445,15 @@ static int beagle_twl_gpio_setup(struct device *dev, - mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) { -+ omap2_hsmmc_init(mmcbbt); -+ } else { -+ omap2_hsmmc_init(mmc); -+ } -+#else - omap2_hsmmc_init(mmc); -+#endif - - /* - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active -@@ -375,6 +551,19 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { - }, - }; - -+#if defined(CONFIG_RTC_DRV_DS1307) || \ -+ defined(CONFIG_RTC_DRV_DS1307_MODULE) -+ -+static struct i2c_board_info __initdata beagle_i2c2_zippy[] = { -+ { -+ I2C_BOARD_INFO("eeprom", 0x50), -+ I2C_BOARD_INFO("ds1307", 0x68), -+ }, -+}; -+#else -+static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; -+#endif -+ - static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, -@@ -479,6 +668,15 @@ static struct omap_board_mux board_mux[] __initdata = { - }; - #endif - -+static int __init expansionboard_setup(char *str) -+{ -+ if (!str) -+ return -EINVAL; -+ strncpy(expansionboard_name, str, 16); -+ printk(KERN_INFO "Beagle expansionboard: %s\n", expansionboard_name); -+ return 0; -+} -+ - static void __init beagle_opp_init(void) - { - int r = 0; -@@ -542,6 +740,72 @@ static void __init omap3_beagle_init(void) - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); - -+ if(!strcmp(expansionboard_name, "zippy")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n"); -+ omap3beagle_enc28j60_init(); -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); -+ mmc[1].gpio_wp = 141; -+ mmc[1].gpio_cd = 162; -+ printk(KERN_INFO "Beagle expansionboard: registering I2C2 for zippy board\n"); -+ omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, -+ ARRAY_SIZE(beagle_i2c2_zippy)); -+ -+ } -+ -+ if(!strcmp(expansionboard_name, "zippy2")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n"); -+ omap3beagle_ks8851_init(); -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); -+ mmc[1].gpio_wp = 141; -+ mmc[1].gpio_cd = 162; -+ printk(KERN_INFO "Beagle expansionboard: registering I2C2 for zippy2 board\n"); -+ omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, -+ ARRAY_SIZE(beagle_i2c2_zippy)); -+ } -+ -+ if(!strcmp(expansionboard_name, "trainer")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); -+ gpio_request(130, "sysfs"); -+ gpio_export(130, 1); -+ gpio_request(131, "sysfs"); -+ gpio_export(131, 1); -+ gpio_request(132, "sysfs"); -+ gpio_export(132, 1); -+ gpio_request(133, "sysfs"); -+ gpio_export(133, 1); -+ gpio_request(134, "sysfs"); -+ gpio_export(134, 1); -+ gpio_request(135, "sysfs"); -+ gpio_export(135, 1); -+ gpio_request(136, "sysfs"); -+ gpio_export(136, 1); -+ gpio_request(137, "sysfs"); -+ gpio_export(137, 1); -+ gpio_request(138, "sysfs"); -+ gpio_export(138, 1); -+ gpio_request(139, "sysfs"); -+ gpio_export(139, 1); -+ gpio_request(140, "sysfs"); -+ gpio_export(140, 1); -+ gpio_request(141, "sysfs"); -+ gpio_export(141, 1); -+ gpio_request(162, "sysfs"); -+ gpio_export(162, 1); -+ } -+ -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) -+ { -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) -+ pr_err("error setting wl12xx data\n"); -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx bt platform device\n"); -+ platform_device_register(&wl12xx_device); -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx wifi platform device\n"); -+ platform_device_register(&omap_vwlan_device); -+ } -+ - usb_musb_init(NULL); - usbhs_init(&usbhs_bdata); - omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, -@@ -558,6 +822,8 @@ static void __init omap3_beagle_init(void) - beagle_opp_init(); - } - -+early_param("buddy", expansionboard_setup); -+ - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ - .boot_params = 0x80000100, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch b/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch deleted file mode 100644 index ebc1456..0000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 6bdb8e890f8e5d11be3c4953d7d10f4a5f160cd4 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Thu, 21 Jul 2011 12:59:20 +0200 -Subject: [PATCH 2/3] HACK: OMAP3: beagle: switch to GPTIMER1 - -Breaks with B3 and older due to clock noise - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index f26a9a8..a04f5a0 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -832,5 +832,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - .init_early = omap3_beagle_init_early, - .init_irq = omap3_beagle_init_irq, - .init_machine = omap3_beagle_init, -- .timer = &omap3_secure_timer, -+ .timer = &omap3_timer, - MACHINE_END --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch b/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch deleted file mode 100644 index defd517..0000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 6667757c5f8a473b9cbbe5f6d64eee65a52aad54 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 25 May 2011 08:57:40 +0200 -Subject: [PATCH 3/3] OMAP3: beagle: HACK! add in 1GHz OPP - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index a04f5a0..5e1d9f9 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -701,11 +701,13 @@ static void __init beagle_opp_init(void) - /* Enable MPU 1GHz and lower opps */ - dev = &mh->od->pdev.dev; - r = opp_enable(dev, 800000000); -+ r |= opp_enable(dev, 1000000000); - /* TODO: MPU 1GHz needs SR and ABB */ - - /* Enable IVA 800MHz and lower opps */ - dev = &dh->od->pdev.dev; - r |= opp_enable(dev, 660000000); -+ r |= opp_enable(dev, 800000000); - /* TODO: DSP 800MHz needs SR and ABB */ - if (r) { - pr_err("%s: failed to enable higher opp %d\n", --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig b/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig deleted file mode 100644 index 1942725..0000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig +++ /dev/null @@ -1,3517 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux/arm 2.6.39 Kernel Configuration -# Sun Jun 5 11:03:19 2011 -# -CONFIG_ARM=y -CONFIG_HAVE_PWM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_HAVE_SCHED_CLOCK=y -CONFIG_GENERIC_GPIO=y -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_KTIME_SCALAR=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_VECTORS_BASE=0xffff0000 -# CONFIG_ARM_PATCH_PHYS_VIRT is not set -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y -CONFIG_HAVE_IRQ_WORK=y -CONFIG_IRQ_WORK=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_FHANDLE=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set -CONFIG_HAVE_GENERIC_HARDIRQS=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_HARDIRQS=y -CONFIG_HAVE_SPARSE_IRQ=y -CONFIG_GENERIC_IRQ_SHOW=y -# CONFIG_SPARSE_IRQ is not set - -# -# RCU Subsystem -# -CONFIG_TINY_RCU=y -# CONFIG_PREEMPT_RCU is not set -# CONFIG_RCU_TRACE is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_CGROUPS=y -# CONFIG_CGROUP_DEBUG is not set -CONFIG_CGROUP_NS=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_CGROUP_MEM_RES_CTLR=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_RT_GROUP_SCHED=y -CONFIG_BLK_CGROUP=y -# CONFIG_DEBUG_BLK_CGROUP is not set -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -CONFIG_SCHED_AUTOGROUP=y -CONFIG_MM_OWNER=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EXPERT=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_EMBEDDED=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_PERF_COUNTERS is not set -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_HW_BREAKPOINT=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_THROTTLING=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_CFQ_GROUP_IOSCHED=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CNS3XXX is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_MXS is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_NUC93X is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5P64X0 is not set -# CONFIG_ARCH_S5P6442 is not set -# CONFIG_ARCH_S5PC100 is not set -# CONFIG_ARCH_S5PV210 is not set -# CONFIG_ARCH_EXYNOS4 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_TCC_926 is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_U8500 is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_PLAT_SPEAR is not set -# CONFIG_ARCH_VT8500 is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_KEYBOARD_GPIO_POLLED is not set - -# -# TI OMAP Common Features -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -CONFIG_ARCH_OMAP2PLUS=y - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -CONFIG_OMAP_SMARTREFLEX_CLASS3=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 -CONFIG_OMAP_IOMMU=y -CONFIG_OMAP_IOMMU_DEBUG=m -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_PM_NONE is not set -CONFIG_OMAP_PM_NOOP=y - -# -# TI OMAP2/3/4 Specific Features -# -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -CONFIG_ARCH_OMAP4=y -CONFIG_SOC_OMAP3430=y -# CONFIG_SOC_OMAPTI816X is not set -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -CONFIG_MACH_OMAP3_BEAGLE=y -# CONFIG_MACH_DEVKIT8000 is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OMAP3530_LV_SOM is not set -# CONFIG_MACH_OMAP3_TORPEDO is not set -CONFIG_MACH_OVERO=y -CONFIG_MACH_OMAP3EVM=y -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_CRANEBOARD is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -CONFIG_MACH_OMAP3_TOUCHBOOK=y -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RM680 is not set -# CONFIG_MACH_NOKIA_RX51 is not set -CONFIG_MACH_OMAP_ZOOM2=y -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_CM_T3517 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_IGEP0030 is not set -# CONFIG_MACH_SBC3530 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# System MMU -# - -# -# Processor Type -# -CONFIG_CPU_V7=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_SWP_EMULATE is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_DMA_MEM_BUFFERABLE=y -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -# CONFIG_ARM_ERRATA_743622 is not set -# CONFIG_ARM_ERRATA_754322 is not set - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_VOLUNTARY=y -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -CONFIG_MIGRATION=y -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_NEED_PER_CPU_KM=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -# CONFIG_SECCOMP is not set -# CONFIG_CC_STACKPROTECTOR is not set -# CONFIG_DEPRECATED_PARAM_STRUCT is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y -# CONFIG_CRASH_DUMP is not set -CONFIG_AUTO_ZRELADDR=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_PM_SLEEP=y -CONFIG_PM_RUNTIME=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -# CONFIG_PM_ADVANCED_DEBUG is not set -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_CAN_PM_TRACE=y -# CONFIG_APM_EMULATION is not set -CONFIG_ARCH_HAS_OPP=y -CONFIG_PM_OPP=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_ROUTE_CLASSID=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE_DEMUX=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETWORK_PHY_TIMESTAMPING=y -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_ZONES=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CONNTRACK_TIMESTAMP=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_SNMP=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_CT=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_TEE=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_CPU=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -# CONFIG_IP_SET_BITMAP_IP is not set -# CONFIG_IP_SET_BITMAP_IPMAC is not set -# CONFIG_IP_SET_BITMAP_PORT is not set -# CONFIG_IP_SET_HASH_IP is not set -# CONFIG_IP_SET_HASH_IPPORT is not set -# CONFIG_IP_SET_HASH_IPPORTIP is not set -# CONFIG_IP_SET_HASH_IPPORTNET is not set -# CONFIG_IP_SET_HASH_NET is not set -# CONFIG_IP_SET_HASH_NETPORT is not set -# CONFIG_IP_SET_LIST_SET is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y -# CONFIG_IP_VS_PROTO_SCTP is not set - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m -CONFIG_IP_VS_NFCT=y -CONFIG_IP_VS_PE_SIP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV6=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_L2TP=m -CONFIG_L2TP_DEBUGFS=m -CONFIG_L2TP_V3=y -CONFIG_L2TP_IP=m -CONFIG_L2TP_ETH=m -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -# CONFIG_NET_SCH_SFB is not set -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m -CONFIG_NET_SCH_MQPRIO=m -CONFIG_NET_SCH_CHOKE=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -CONFIG_NET_CLS_CGROUP=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -CONFIG_CAN_SLCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=y -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=y -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_ATH3K=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -CONFIG_BT_MRVL=m -# CONFIG_BT_MRVL_SDIO is not set -CONFIG_BT_ATH3K=m -CONFIG_BT_WILINK=m -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -CONFIG_NL80211_TESTMODE=y -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_CFG80211_INTERNAL_REGDB is not set -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=y -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set -# CONFIG_CAIF is not set -CONFIG_CEPH_LIB=m -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -CONFIG_SM_FTL=m -# CONFIG_MTD_OOPS is not set -CONFIG_MTD_SWAP=m - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND_ECC=y -# CONFIG_MTD_NAND_ECC_SMC is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_BCH is not set -# CONFIG_MTD_SM_COMMON is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_BLK_DEV_RBD is not set -# CONFIG_SENSORS_LIS3LV02D is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -CONFIG_SENSORS_BH1780=m -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -CONFIG_HMC6352=m -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -CONFIG_BMP085=m -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=m -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set - -# -# Texas Instruments shared transport line discipline -# -CONFIG_TI_ST=m -# CONFIG_SENSORS_LIS3_SPI is not set -# CONFIG_SENSORS_LIS3_I2C is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -CONFIG_ISCSI_BOOT_SYSFS=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_RAID=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_DM_FLAKEY=m -CONFIG_TARGET_CORE=m -CONFIG_TCM_IBLOCK=m -CONFIG_TCM_FILEIO=m -CONFIG_TCM_PSCSI=m -CONFIG_LOOPBACK_TARGET=m -# CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_MACVTAP=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_MII=y -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -CONFIG_BCM63XX_PHY=m -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -CONFIG_MICREL_PHY=m -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -# CONFIG_AX88796 is not set -CONFIG_SMC91X=y -# CONFIG_TI_DAVINCI_EMAC is not set -CONFIG_TI_DAVINCI_MDIO=m -CONFIG_TI_DAVINCI_CPDMA=m -# CONFIG_DM9000 is not set -CONFIG_ENC28J60=y -# CONFIG_ENC28J60_WRITEVERIFY is not set -# CONFIG_ETHOC is not set -CONFIG_SMC911X=y -CONFIG_SMSC911X=y -# CONFIG_SMSC911X_ARCH_HOOKS is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -CONFIG_KS8842=m -CONFIG_KS8851=y -# CONFIG_KS8851_MLL is not set -# CONFIG_FTMAC100 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -CONFIG_B43=m -# CONFIG_B43_SDIO is not set -CONFIG_B43_PIO=y -CONFIG_B43_PHY_N=y -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -# CONFIG_LIBERTAS_MESH is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -# CONFIG_RT2800USB is not set -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_RTL8192CU=m -CONFIG_RTLWIFI=m -CONFIG_RTL8192C_COMMON=m -CONFIG_WL1251=m -CONFIG_WL1251_SPI=m -CONFIG_WL1251_SDIO=m -CONFIG_WL12XX_MENU=m -CONFIG_WL12XX=m -CONFIG_WL12XX_HT=y -CONFIG_WL12XX_SPI=m -CONFIG_WL12XX_SDIO=m -# CONFIG_WL12XX_SDIO_TEST is not set -CONFIG_WL12XX_PLATFORM_DATA=y -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -CONFIG_WIMAX_IWMC3200_SDIO=y -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=y -CONFIG_USB_KAWETH=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_RTL8150=y -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_CDC_NCM=m -CONFIG_USB_NET_DM9601=y -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_PLUSB=y -CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_NET_CX82310_ETH=m -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -CONFIG_USB_IPHETH=m -CONFIG_USB_SIERRA_NET=m -CONFIG_USB_VL600=m -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set - -# -# CAIF transport drivers -# -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPTP=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_QT1070=m -CONFIG_KEYBOARD_QT2160=m -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -CONFIG_KEYBOARD_MCS=m -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -CONFIG_INPUT_MISC=y -CONFIG_INPUT_AD714X=m -CONFIG_INPUT_AD714X_I2C=m -CONFIG_INPUT_AD714X_SPI=m -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_TWL4030_VIBRA=m -CONFIG_INPUT_UINPUT=y -CONFIG_INPUT_PCF8574=m -CONFIG_INPUT_PWM_BEEPER=m -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -CONFIG_INPUT_ADXL34X=m -CONFIG_INPUT_ADXL34X_I2C=m -CONFIG_INPUT_ADXL34X_SPI=m -CONFIG_INPUT_CMA3000=m -CONFIG_INPUT_CMA3000_I2C=m - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_N_GSM=m -CONFIG_DEVKMEM=y - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX3107 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_OMAP=y -CONFIG_SERIAL_OMAP_CONSOLE=y -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -CONFIG_SERIAL_IFX6X60=m -CONFIG_TTY_PRINTK=y -# CONFIG_HVC_DCC is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_RAMOOPS is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=m - -# -# Multiplexer I2C Chip support -# -CONFIG_I2C_MUX_GPIO=m -# CONFIG_I2C_MUX_PCA9541 is not set -# CONFIG_I2C_MUX_PCA954x is not set -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=m - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PXA_PCI is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -CONFIG_I2C_DIOLAN_U2C=m -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_OC_TINY is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set - -# -# PPS generators support -# -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_MAX730X=m - -# -# Memory mapped GPIO expanders: -# -# CONFIG_GPIO_BASIC_MMIO is not set -# CONFIG_GPIO_IT8761E is not set - -# -# I2C GPIO expanders: -# -CONFIG_GPIO_MAX7300=m -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_SX150X is not set -CONFIG_GPIO_TWL4030=y -CONFIG_GPIO_ADP5588=m - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_74X164 is not set - -# -# AC97 GPIO expanders: -# - -# -# MODULbus GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -CONFIG_TEST_POWER=m -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ20Z75 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_BATTERY_MAX17042=m -CONFIG_CHARGER_ISP1704=m -CONFIG_CHARGER_TWL4030=m -CONFIG_CHARGER_GPIO=m -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -CONFIG_SENSORS_ADT7411=m -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -CONFIG_SENSORS_ASC7621=m -# CONFIG_SENSORS_ATXP1 is not set -CONFIG_SENSORS_DS620=m -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -CONFIG_SENSORS_GPIO_FAN=m -# CONFIG_SENSORS_IT87 is not set -CONFIG_SENSORS_JC42=m -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -CONFIG_SENSORS_SMM665=m -# CONFIG_SENSORS_DME1737 is not set -CONFIG_SENSORS_EMC1403=m -CONFIG_SENSORS_EMC2103=m -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_ADS1015 is not set -# CONFIG_SENSORS_ADS7828 is not set -CONFIG_SENSORS_ADS7871=m -CONFIG_SENSORS_AMC6821=m -# CONFIG_SENSORS_THMC50 is not set -CONFIG_SENSORS_TMP102=m -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -CONFIG_SENSORS_TWL4030_MADC=m -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_BLOCKIO=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set -CONFIG_MFD_SUPPORT=y -CONFIG_MFD_CORE=y -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -CONFIG_TPS6105X=m -# CONFIG_TPS65010 is not set -CONFIG_TPS6507X=m -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_MADC=m -CONFIG_TWL4030_POWER=y -CONFIG_TWL4030_SCRIPT=y -CONFIG_TWL4030_CODEC=y -CONFIG_TWL4030_POWEROFF=y -CONFIG_TWL6030_PWM=m -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13XXX is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_EZX_PCAP is not set -CONFIG_MFD_TPS6586X=y -CONFIG_MFD_WL1273_CORE=m -CONFIG_MFD_OMAP_USB_HOST=y -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_DUMMY=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -CONFIG_REGULATOR_TPS6105X=m -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_TPS6586X=m -CONFIG_REGULATOR_TPS6524X=m -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_MEDIA_CONTROLLER=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_RC_CORE=m -CONFIG_LIRC=m -CONFIG_RC_MAP=m -CONFIG_IR_NEC_DECODER=m -CONFIG_IR_RC5_DECODER=m -CONFIG_IR_RC6_DECODER=m -CONFIG_IR_JVC_DECODER=m -CONFIG_IR_SONY_DECODER=m -CONFIG_IR_RC5_SZ_DECODER=m -CONFIG_IR_LIRC_CODEC=m -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_STREAMZAP is not set -CONFIG_RC_LOOPBACK=m -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y - -# -# Customize TV tuners -# -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_MEDIA_TUNER_TDA18218=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_V4L2_MEM2MEM_DEV=m -CONFIG_VIDEOBUF2_CORE=m -CONFIG_VIDEOBUF2_MEMOPS=m -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -CONFIG_VIDEO_ADV7180=m -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -CONFIG_VIDEO_OV7670=m -CONFIG_VIDEO_MT9P031=y -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_MT9V032=y -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=m -CONFIG_VIDEO_TVP5150=m -CONFIG_VIDEO_TVP7002=m -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_AK881X is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -CONFIG_VIDEO_VPSS_SYSTEM=m -CONFIG_VIDEO_VPFE_CAPTURE=y -CONFIG_VIDEO_DM6446_CCDC=m -CONFIG_VIDEO_OMAP2_VOUT=y -# CONFIG_VIDEO_CPIA2 is not set -CONFIG_VIDEO_TIMBERDALE=m -# CONFIG_VIDEO_AU0828 is not set -CONFIG_VIDEO_SR030PC30=m -CONFIG_VIDEO_NOON010PC30=m -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_DEBUG=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_BENQ=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_CPIA1=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -CONFIG_USB_GSPCA_KONICA=m -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_NW80X=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_OV534_9=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SN9C2028=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SPCA1528=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_SQ930X=m -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_VICAM=m -CONFIG_USB_GSPCA_XIRLINK_CIT=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_TLG2300=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_RC=y -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_USB_ET61X251=m -CONFIG_USB_SN9C102=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_TESTDEV=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -CONFIG_RADIO_SAA7706H=m -# CONFIG_RADIO_TEF6862 is not set -CONFIG_RADIO_WL1273=m - -# -# Texas Instruments WL128x FM driver (ST based) -# -CONFIG_RADIO_WL128X=m -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -CONFIG_DVB_USB_AZ6027=m -CONFIG_DVB_USB_LME2510=m -CONFIG_DVB_USB_TECHNISAT_USB2=m -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set - -# -# Multistandard (satellite) frontends -# -CONFIG_DVB_STB0899=m -CONFIG_DVB_STB6100=m -CONFIG_DVB_STV090x=m -CONFIG_DVB_STV6110x=m - -# -# DVB-S (satellite) frontends -# -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_DS3000=m - -# -# DVB-T (terrestrial) frontends -# -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m - -# -# DVB-C (cable) frontends -# -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m - -# -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends -# -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m - -# -# ISDB-T (terrestrial) frontends -# -CONFIG_DVB_S921=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_MB86A20S=m - -# -# Digital terrestrial only tuners/PLL -# -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_TUNER_DIB0090=m - -# -# SEC control devices for DVB-S -# -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GXX=m -CONFIG_DVB_ATBM8830=m -CONFIG_DVB_IX2505V=m - -# -# Tools to develop new frontends -# -# CONFIG_DVB_DUMMY_FE is not set - -# -# Graphics support -# -CONFIG_DRM=m -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -# CONFIG_FB_WMT_GE_ROPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -CONFIG_FB_UDL=m -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set -CONFIG_OMAP2_DSS_DPI=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -CONFIG_FB_OMAP2_NUM_FBS=2 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC_DPI=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -CONFIG_PANEL_NEC_NL8048HL11_01B=y -# CONFIG_PANEL_TAAL is not set -CONFIG_PANEL_TPO_TD043MTEA1=m -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_UA101=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_USB_6FIRE=m -CONFIG_SND_SOC=y -CONFIG_SND_SOC_CACHE_LZO=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OVERO=y -CONFIG_SND_OMAP_SOC_OMAP3EVM=y -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -CONFIG_SND_OMAP_SOC_ZOOM2=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_3M_PCT is not set -CONFIG_HID_A4TECH=y -CONFIG_HID_ACRUX=m -# CONFIG_HID_ACRUX_FF is not set -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -# CONFIG_HID_CANDO is not set -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -# CONFIG_HID_PRODIKEYS is not set -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EMS_FF=m -# CONFIG_HID_ELECOM is not set -CONFIG_HID_EZKEY=y -CONFIG_HID_KEYTOUCH=m -# CONFIG_HID_KYE is not set -CONFIG_HID_UCLOGIC=m -CONFIG_HID_WALTOP=m -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LCPOWER=m -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWII_FF is not set -CONFIG_HID_MAGICMOUSE=m -CONFIG_HID_MICROSOFT=y -# CONFIG_HID_MOSART is not set -CONFIG_HID_MONTEREY=y -CONFIG_HID_MULTITOUCH=m -CONFIG_HID_NTRIG=y -# CONFIG_HID_ORTEK is not set -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_PICOLCD=m -CONFIG_HID_PICOLCD_FB=y -CONFIG_HID_PICOLCD_BACKLIGHT=y -CONFIG_HID_PICOLCD_LEDS=y -CONFIG_HID_QUANTA=m -CONFIG_HID_ROCCAT=m -CONFIG_HID_ROCCAT_COMMON=m -CONFIG_HID_ROCCAT_ARVO=m -CONFIG_HID_ROCCAT_KONE=m -CONFIG_HID_ROCCAT_KONEPLUS=m -CONFIG_HID_ROCCAT_KOVAPLUS=m -# CONFIG_HID_ROCCAT_PYRA is not set -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_STANTUM=m -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -CONFIG_USB_EHCI_HCD_OMAP=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_TUSB6010 is not set -CONFIG_USB_MUSB_OMAP2PLUS=y -# CONFIG_USB_MUSB_AM35X is not set -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_MUSB_DEBUG is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -CONFIG_USB_STORAGE_REALTEK=m -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -CONFIG_USB_STORAGE_ENE_UB6250=m -CONFIG_USB_UAS=m -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QCAUX=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SAMBA=m -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -CONFIG_USB_SERIAL_CYBERJACK=m -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OPTION is not set -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m -CONFIG_USB_SERIAL_ZIO=m -CONFIG_USB_SERIAL_SSU100=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_YUREX=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=480 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_FUSB300 is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA_U2O is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -CONFIG_USB_G_NCM=m -# CONFIG_USB_GADGETFS is not set -CONFIG_USB_FUNCTIONFS=m -# CONFIG_USB_FUNCTIONFS_ETH is not set -CONFIG_USB_FUNCTIONFS_RNDIS=y -# CONFIG_USB_FUNCTIONFS_GENERIC is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set -CONFIG_USB_G_HID=m -CONFIG_USB_G_DBGP=m -# CONFIG_USB_G_DBGP_PRINTK is not set -CONFIG_USB_G_DBGP_SERIAL=y -CONFIG_USB_G_WEBCAM=m - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_TWL6030_USB=m -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y -# CONFIG_MMC_CLKGATE is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=8 -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -CONFIG_MMC_SPI=m -# CONFIG_MMC_DW is not set -CONFIG_MMC_USHC=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -CONFIG_LEDS_LP5521=m -CONFIG_LEDS_LP5523=m -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -CONFIG_LEDS_PWM=m -CONFIG_LEDS_REGULATOR=m -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -CONFIG_LEDS_TRIGGERS=y - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -CONFIG_NFC_DEVICES=y -CONFIG_PN544_NFC=m -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=y -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS3232 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_BQ32K=m -CONFIG_RTC_DRV_TWL4030=m -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -CONFIG_TIMB_DMA=m -CONFIG_DMA_ENGINE=y -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_VIDEO_TM6000 is not set -# CONFIG_USB_IP_COMMON is not set -CONFIG_W35UND=m -CONFIG_PRISM2_USB=m -CONFIG_ECHO=m -CONFIG_BRCM80211=m -CONFIG_BRCMFMAC=y -# CONFIG_BRCMDBG is not set -CONFIG_RT2870=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -CONFIG_R8712U=m -CONFIG_R8712_AP=y -# CONFIG_TRANZPORT is not set -# CONFIG_POHMELFS is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_IIO is not set -CONFIG_XVMALLOC=y -CONFIG_ZRAM=m -# CONFIG_ZRAM_DEBUG is not set -# CONFIG_FB_SM7XX is not set -# CONFIG_LIRC_STAGING is not set -# CONFIG_EASYCAP is not set -# CONFIG_TIDSPBRIDGE is not set -# CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set -CONFIG_MACH_NO_WESTBRIDGE=y -# CONFIG_ATH6K_LEGACY is not set -CONFIG_USB_ENESTORAGE=m -CONFIG_BCM_WIMAX=m -CONFIG_FT1000=m -CONFIG_FT1000_USB=m - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set -CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m -CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m - -# -# Altera FPGA firmware download module -# -# CONFIG_ALTERA_STAPL is not set -CONFIG_CLKDEV_LOOKUP=y - -# -# File systems -# -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -CONFIG_JFS_STATISTICS=y -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_POSIX_ACL=y -CONFIG_XFS_RT=y -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -CONFIG_GFS2_FS_LOCKING_DLM=y -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -CONFIG_NILFS2_FS=m -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=m -CONFIG_CUSE=m -CONFIG_GENERIC_ACL=y - -# -# Caches -# -CONFIG_FSCACHE=m -CONFIG_FSCACHE_STATS=y -CONFIG_FSCACHE_HISTOGRAM=y -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_FSCACHE_OBJECT_LIST is not set -CONFIG_CACHEFILES=m -# CONFIG_CACHEFILES_DEBUG is not set -CONFIG_CACHEFILES_HISTOGRAM=y - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_UNION_FS=m -CONFIG_UNION_FS_XATTR=y -# CONFIG_UNION_FS_DEBUG is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_LOGFS=m -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_XATTR is not set -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_PSTORE=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NFS_V4_1=y -CONFIG_PNFS_FILE_LAYOUT=y -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -# CONFIG_NFS_USE_NEW_IDMAPPER is not set -CONFIG_NFSD=m -CONFIG_NFSD_DEPRECATED=y -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_ACL_SUPPORT=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_CEPH_FS=m -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -# CONFIG_CIFS_DEBUG2 is not set -CONFIG_CIFS_DFS_UPCALL=y -CONFIG_CIFS_FSCACHE=y -CONFIG_CIFS_ACL=y -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -# CONFIG_AFS_FSCACHE is not set -CONFIG_9P_FS=m -CONFIG_9P_FSCACHE=y -CONFIG_9P_FS_POSIX_ACL=y - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_HARDLOCKUP_DETECTOR is not set -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_LKDTM is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_DEBUG_PAGEALLOC is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_RING_BUFFER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_ASYNC_RAID6_TEST is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_STRICT_DEVMEM is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_USER_API=m -CONFIG_CRYPTO_USER_API_HASH=m -CONFIG_CRYPTO_USER_API_SKCIPHER=m -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_OMAP_SHAM=m -CONFIG_CRYPTO_DEV_OMAP_AES=m -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_TEST=m -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_BTREE=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y -CONFIG_AVERAGE=y diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/fixes/vout.patch b/recipes-kernel/linux/linux-3.0+3.1rc/fixes/vout.patch deleted file mode 100644 index 5a14540..0000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/fixes/vout.patch +++ /dev/null @@ -1,79 +0,0 @@ -Delivered-To: koen@dominion.thruhere.net -Received: by 10.236.157.72 with SMTP id n48cs4581yhk; - Fri, 5 Aug 2011 00:10:45 -0700 (PDT) -Received: by 10.147.146.12 with SMTP id y12mr1585882yan.12.1312528245335; - Fri, 05 Aug 2011 00:10:45 -0700 (PDT) -Return-Path: <archit@ti.com> -Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) - by mx.google.com with ESMTPS id x20si3422127ani.205.2011.08.05.00.10.45 - (version=TLSv1/SSLv3 cipher=OTHER); - Fri, 05 Aug 2011 00:10:45 -0700 (PDT) -Received-SPF: pass (google.com: domain of archit@ti.com designates 192.94.94.41 as permitted sender) client-ip=192.94.94.41; -Authentication-Results: mx.google.com; spf=pass (google.com: domain of archit@ti.com designates 192.94.94.41 as permitted sender) smtp.mail=archit@ti.com -Received: from dlep33.itg.ti.com ([157.170.170.112]) - by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id p757AiHb023389 - (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); - Fri, 5 Aug 2011 02:10:44 -0500 -Received: from dlep26.itg.ti.com (smtp-le.itg.ti.com [157.170.170.27]) - by dlep33.itg.ti.com (8.13.7/8.13.8) with ESMTP id p757AiWp004418; - Fri, 5 Aug 2011 02:10:44 -0500 (CDT) -Received: from dlee73.ent.ti.com (localhost [127.0.0.1]) - by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id p757AiBJ012377; - Fri, 5 Aug 2011 02:10:44 -0500 (CDT) -Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE73.ent.ti.com - (157.170.170.88) with Microsoft SMTP Server id 8.3.106.1; Fri, 5 Aug 2011 - 02:10:44 -0500 -Received: from legion.dal.design.ti.com (legion.dal.design.ti.com - [128.247.22.53]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id - p757Ai9V018852; Fri, 5 Aug 2011 02:10:44 -0500 -Received: from localhost (a0393947pc.apr.dhcp.ti.com [172.24.137.144]) by - legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id p757Aef10060; - Fri, 5 Aug 2011 02:10:41 -0500 (CDT) -From: Archit Taneja <archit@ti.com> -To: <hvaibhav@ti.com>, <linux-media@vger.kernel.org> -CC: <koen@dominion.thruhere.net>, <tomi.valkeinen@ti.com>, - <linux-omap@vger.kernel.org>, Archit Taneja <archit@ti.com> -Subject: [PATCH] [media] OMAP_VOUT: Fix build break caused by update_mode removal in DSS2 -Date: Fri, 5 Aug 2011 12:49:21 +0530 -Message-ID: <1312528761-18241-1-git-send-email-archit@ti.com> -X-Mailer: git-send-email 1.7.1 -MIME-Version: 1.0 -Content-Type: text/plain - -The DSS2 driver does not support the configuration of the update_mode of a -panel anymore. Remove the setting of update_mode done in omap_vout_probe(). -Ignore configuration of TE since omap_vout driver doesn't support manual update -displays anyway. - -Signed-off-by: Archit Taneja <archit@ti.com> ---- - drivers/media/video/omap/omap_vout.c | 13 ------------- - 1 files changed, 0 insertions(+), 13 deletions(-) - -diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c -index b5ef362..b3a5ecd 100644 ---- a/drivers/media/video/omap/omap_vout.c -+++ b/drivers/media/video/omap/omap_vout.c -@@ -2194,19 +2194,6 @@ static int __init omap_vout_probe(struct platform_device *pdev) - "'%s' Display already enabled\n", - def_display->name); - } -- /* set the update mode */ -- if (def_display->caps & -- OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { -- if (dssdrv->enable_te) -- dssdrv->enable_te(def_display, 0); -- if (dssdrv->set_update_mode) -- dssdrv->set_update_mode(def_display, -- OMAP_DSS_UPDATE_MANUAL); -- } else { -- if (dssdrv->set_update_mode) -- dssdrv->set_update_mode(def_display, -- OMAP_DSS_UPDATE_AUTO); -- } - } - } - --- -1.7.1 - diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch b/recipes-kernel/linux/linux-3.0+3.1rc/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch deleted file mode 100644 index 38e96e3..0000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 428afa6e7a96419f6f17158a9ac38ab24d664997 Mon Sep 17 00:00:00 2001 -From: Keerthy <j-keerthy@ti.com> -Date: Wed, 4 May 2011 01:14:50 +0530 -Subject: [PATCH 1/2] Enabling Hwmon driver for twl4030-madc - -Signed-off-by: Keerthy <j-keerthy@ti.com> ---- - drivers/mfd/twl-core.c | 15 +++++++++++++++ - 1 files changed, 15 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c -index a2eddc7..81fcf18 100644 ---- a/drivers/mfd/twl-core.c -+++ b/drivers/mfd/twl-core.c -@@ -83,6 +83,13 @@ - #define twl_has_madc() false - #endif - -+#if defined(CONFIG_SENSORS_TWL4030_MADC) ||\ -+ defined(CONFIG_SENSORS_TWL4030_MADC_MODULE) -+#define twl_has_madc_hwmon() true -+#else -+#define twl_has_madc_hwmon() false -+#endif -+ - #ifdef CONFIG_TWL4030_POWER - #define twl_has_power() true - #else -@@ -669,6 +676,14 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features) - return PTR_ERR(child); - } - -+if (twl_has_madc_hwmon()) { -+ child = add_child(2, "twl4030_madc_hwmon", -+ NULL, 0, -+ true, pdata->irq_base + MADC_INTR_OFFSET, 0); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ } -+ - if (twl_has_rtc()) { - /* - * REVISIT platform_data here currently might expose the --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002-mfd-twl-core-enable-madc-clock.patch b/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002-mfd-twl-core-enable-madc-clock.patch deleted file mode 100644 index 7dc8e54..0000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002-mfd-twl-core-enable-madc-clock.patch +++ /dev/null @@ -1,54 +0,0 @@ -From fbfdf09f148219d48ee35e830923ca75bbd0b91b Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Sat, 23 Jan 2010 06:26:54 -0800 -Subject: [PATCH 2/2] mfd: twl-core: enable madc clock - -Now that the madc driver has been merged it is also necessary to enable the clock to the madc block - -Signed-off-by: Steve Sakoman <steve@sakoman.com> ---- - drivers/mfd/twl-core.c | 8 ++++++++ - include/linux/i2c/twl.h | 1 + - 2 files changed, 9 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c -index 81fcf18..08aa64f 100644 ---- a/drivers/mfd/twl-core.c -+++ b/drivers/mfd/twl-core.c -@@ -217,6 +217,11 @@ - - /* Few power values */ - #define R_CFG_BOOT 0x05 -+#define R_GPBR1 0x0C -+ -+/* MADC clock values for R_GPBR1 */ -+#define MADC_HFCLK_EN 0x80 -+#define DEFAULT_MADC_CLK_EN 0x10 - - /* some fields in R_CFG_BOOT */ - #define HFCLK_FREQ_19p2_MHZ (1 << 0) -@@ -1151,6 +1156,9 @@ static void clocks_init(struct device *dev, - - e |= unprotect_pm_master(); - /* effect->MADC+USB ck en */ -+ if (twl_has_madc()) -+ e |= twl_i2c_write_u8(TWL_MODULE_INTBR, -+ MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, R_GPBR1); - e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); - e |= protect_pm_master(); - -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h -index 114c0f6..f060751 100644 ---- a/include/linux/i2c/twl.h -+++ b/include/linux/i2c/twl.h -@@ -74,6 +74,7 @@ - - #define TWL_MODULE_USB TWL4030_MODULE_USB - #define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE -+#define TWL_MODULE_INTBR TWL4030_MODULE_INTBR - #define TWL_MODULE_PIH TWL4030_MODULE_PIH - #define TWL_MODULE_MADC TWL4030_MODULE_MADC - #define TWL_MODULE_MAIN_CHARGE TWL4030_MODULE_MAIN_CHARGE --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/patch.sh b/recipes-kernel/linux/linux-3.0+3.1rc/patch.sh deleted file mode 100644 index 50f146e..0000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/patch.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/bash -# (c) 2009 - 2011 Koen Kooi <koen@dominion.thruhere.net> -# This script will take a set of directories with patches and make a git tree out of it -# After all the patches are applied it will output a SRC_URI fragment you can copy/paste into a recipe - -TAG="mainline/master" -EXTRATAG="-3.1" - -git fetch mainline -git am --abort -git reset --hard ${TAG} -rm export -rf - -previous=${TAG} -PATCHSET="beagle madc sgx" - -# apply patches -for patchset in ${PATCHSET} ; do - git am $patchset/* && git tag "${patchset}${EXTRATAG}" -f -done - -# export patches and output SRC_URI for them -for patchset in ${PATCHSET} ; do - mkdir export/$patchset -p - ( cd export/$patchset && git format-patch ${previous}..${patchset}${EXTRATAG} >& /dev/null && for i in *.patch ; do echo " file://${patchset}/$i \\" ; done ) - previous=${patchset}${EXTRATAG} -done diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch b/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch deleted file mode 100644 index 5d45229..0000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 927d1d96b5c4d3439a301b73804ade67b8cdd81a Mon Sep 17 00:00:00 2001 -From: Vikram Pandita <vikram.pandita@ti.com> -Date: Tue, 31 May 2011 09:24:58 +0100 -Subject: [PATCH] ARM: L2: Add and export outer_clean_all - -The Errata 588369 and 539766 demands that clean all operation be done -as clean each way at a time - -This patch also raps the implementation under the CONFIG errata -macro so that for non-errata version silicon it can be disabled - -Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> -Cc: Woodruff, Richard <r-woodruff2@ti.com> ---- - arch/arm/include/asm/outercache.h | 8 ++++++++ - arch/arm/mm/cache-l2x0.c | 1 + - 2 files changed, 9 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h -index d838743..fa8cbd8 100644 ---- a/arch/arm/include/asm/outercache.h -+++ b/arch/arm/include/asm/outercache.h -@@ -28,6 +28,7 @@ struct outer_cache_fns { - void (*clean_range)(unsigned long, unsigned long); - void (*flush_range)(unsigned long, unsigned long); - void (*flush_all)(void); -+ void (*clean_all)(void); - void (*inv_all)(void); - void (*disable)(void); - #ifdef CONFIG_OUTER_CACHE_SYNC -@@ -61,6 +62,11 @@ static inline void outer_flush_all(void) - if (outer_cache.flush_all) - outer_cache.flush_all(); - } -+static inline void outer_clean_all(void) -+{ -+ if (outer_cache.clean_all) -+ outer_cache.clean_all(); -+} - - static inline void outer_inv_all(void) - { -@@ -97,6 +103,8 @@ static inline void outer_sync(void) - #else - static inline void outer_sync(void) - { } -+static inline void outer_clean_all(void) -+{ } - #endif - - #endif /* __ASM_OUTERCACHE_H */ -diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c -index 44c0867..10b79d6 100644 ---- a/arch/arm/mm/cache-l2x0.c -+++ b/arch/arm/mm/cache-l2x0.c -@@ -346,6 +346,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) - outer_cache.inv_all = l2x0_inv_all; - outer_cache.disable = l2x0_disable; - outer_cache.set_debug = l2x0_set_debug; -+ outer_cache.clean_all = l2x0_clean_all; - - printk(KERN_INFO "%s cache controller enabled\n", type); - printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch b/recipes-kernel/linux/linux-3.0/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch deleted file mode 100644 index d87aee1..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch +++ /dev/null @@ -1,196 +0,0 @@ -From ba3e97075ad35eeaf35191c4e5c2b90de5d96209 Mon Sep 17 00:00:00 2001 -From: Fernandes, Joel A <joelagnel@ti.com> -Date: Tue, 7 Jun 2011 15:54:45 -0500 -Subject: [PATCH 01/10] OMAP3: beagle: add support for beagleboard xM revision C - -OMAP3: beagle: add support for beagleboard xM revision C - -The USB enable GPIO has been in beagleboard xM revision C. -The USER button has been moved since beagleboard xM. -Also, board specific initialization has been moved to beagle_config struct -and initialized in omap3_beagle_init_rev. Default values in struct are for xMC. - -Signed-off-by: Joel A Fernandes <joelagnel@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 78 ++++++++++++++++++++----------- - 1 files changed, 51 insertions(+), 27 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 34f8411..32f5f89 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -60,7 +60,8 @@ - * AXBX = GPIO173, GPIO172, GPIO171: 1 1 1 - * C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0 - * C4 = GPIO173, GPIO172, GPIO171: 1 0 1 -- * XM = GPIO173, GPIO172, GPIO171: 0 0 0 -+ * XMA/XMB = GPIO173, GPIO172, GPIO171: 0 0 0 -+ * XMC = GPIO173, GPIO172, GPIO171: 0 1 0 - */ - enum { - OMAP3BEAGLE_BOARD_UNKN = 0, -@@ -68,14 +69,26 @@ enum { - OMAP3BEAGLE_BOARD_C1_3, - OMAP3BEAGLE_BOARD_C4, - OMAP3BEAGLE_BOARD_XM, -+ OMAP3BEAGLE_BOARD_XMC, - }; - - static u8 omap3_beagle_version; - --static u8 omap3_beagle_get_rev(void) --{ -- return omap3_beagle_version; --} -+/* -+ * Board-specific configuration -+ * Defaults to BeagleBoard-xMC -+ */ -+static struct { -+ int mmc1_gpio_wp; -+ int usb_pwr_level; -+ int reset_gpio; -+ int usr_button_gpio; -+} beagle_config = { -+ .mmc1_gpio_wp = -EINVAL, -+ .usb_pwr_level = GPIOF_OUT_INIT_LOW, -+ .reset_gpio = 129, -+ .usr_button_gpio = 4, -+}; - - static struct gpio omap3_beagle_rev_gpios[] __initdata = { - { 171, GPIOF_IN, "rev_id_0" }, -@@ -110,18 +123,32 @@ static void __init omap3_beagle_init_rev(void) - case 7: - printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); - omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; -+ beagle_config.mmc1_gpio_wp = 29; -+ beagle_config.reset_gpio = 170; -+ beagle_config.usr_button_gpio = 7; - break; - case 6: - printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); - omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; -+ beagle_config.mmc1_gpio_wp = 23; -+ beagle_config.reset_gpio = 170; -+ beagle_config.usr_button_gpio = 7; - break; - case 5: - printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); - omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; -+ beagle_config.mmc1_gpio_wp = 23; -+ beagle_config.reset_gpio = 170; -+ beagle_config.usr_button_gpio = 7; - break; - case 0: -- printk(KERN_INFO "OMAP3 Beagle Rev: xM\n"); -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n"); - omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; -+ beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH; -+ break; -+ case 2: -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; - break; - default: - printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); -@@ -225,7 +252,7 @@ static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, -- .gpio_wp = 29, -+ .gpio_wp = -EINVAL, - }, - {} /* Terminator */ - }; -@@ -243,17 +270,11 @@ static struct gpio_led gpio_leds[]; - static int beagle_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) - { -- int r, usb_pwr_level; -- -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -- mmc[0].gpio_wp = -EINVAL; -- } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || -- (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { -- omap_mux_init_gpio(23, OMAP_PIN_INPUT); -- mmc[0].gpio_wp = 23; -- } else { -- omap_mux_init_gpio(29, OMAP_PIN_INPUT); -- } -+ int r; -+ -+ if (beagle_config.mmc1_gpio_wp != -EINVAL) -+ omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); -+ mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; - omap2_hsmmc_init(mmc); -@@ -263,9 +284,8 @@ static int beagle_twl_gpio_setup(struct device *dev, - * high / others active low) - * DVI reset GPIO is different between beagle revisions - */ -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -- usb_pwr_level = GPIOF_OUT_INIT_HIGH; -- beagle_dvi_device.reset_gpio = 129; -+ /* Valid for all -xM revisions */ -+ if (cpu_is_omap3630()) { - /* - * gpio + 1 on Xm controls the TFP410's enable line (active low) - * gpio + 2 control varies depending on the board rev as below: -@@ -283,8 +303,6 @@ static int beagle_twl_gpio_setup(struct device *dev, - pr_err("%s: unable to configure DVI_LDO_EN\n", - __func__); - } else { -- usb_pwr_level = GPIOF_OUT_INIT_LOW; -- beagle_dvi_device.reset_gpio = 170; - /* - * REVISIT: need ehci-omap hooks for external VBUS - * power switch and overcurrent detect -@@ -292,8 +310,10 @@ static int beagle_twl_gpio_setup(struct device *dev, - if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) - pr_err("%s: unable to configure EHCI_nOC\n", __func__); - } -+ beagle_dvi_device.reset_gpio = beagle_config.reset_gpio; - -- gpio_request_one(gpio + TWL4030_GPIO_MAX, usb_pwr_level, "nEN_USB_PWR"); -+ gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level, -+ "nEN_USB_PWR"); - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; -@@ -404,7 +424,8 @@ static struct platform_device leds_gpio = { - static struct gpio_keys_button gpio_buttons[] = { - { - .code = BTN_EXTRA, -- .gpio = 7, -+ /* Dynamically assigned depending on board */ -+ .gpio = -EINVAL, - .desc = "user", - .wakeup = 1, - }, -@@ -468,8 +489,8 @@ static void __init beagle_opp_init(void) - return; - } - -- /* Custom OPP enabled for XM */ -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ /* Custom OPP enabled for all xM versions */ -+ if (cpu_is_omap3630()) { - struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); - struct omap_hwmod *dh = omap_hwmod_lookup("iva"); - struct device *dev; -@@ -509,6 +530,9 @@ static void __init omap3_beagle_init(void) - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap3_beagle_init_rev(); - omap3_beagle_i2c_init(); -+ -+ gpio_buttons[0].gpio = beagle_config.usr_button_gpio; -+ - platform_add_devices(omap3_beagle_devices, - ARRAY_SIZE(omap3_beagle_devices)); - omap_display_init(&beagle_dss_data); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch b/recipes-kernel/linux/linux-3.0/beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch deleted file mode 100644 index 321aeae..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch +++ /dev/null @@ -1,340 +0,0 @@ -From 73366785ad8400aa22ffc0822ecc701349477de9 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Thu, 21 Jul 2011 14:29:42 +0200 -Subject: [PATCH 02/10] UNFINISHED: OMAP3: beagle: add support for expansionboards - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 266 +++++++++++++++++++++++++++++++ - 1 files changed, 266 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 32f5f89..f26a9a8 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -21,6 +21,7 @@ - #include <linux/io.h> - #include <linux/leds.h> - #include <linux/gpio.h> -+#include <linux/irq.h> - #include <linux/input.h> - #include <linux/gpio_keys.h> - #include <linux/opp.h> -@@ -156,6 +157,167 @@ static void __init omap3_beagle_init_rev(void) - } - } - -+char expansionboard_name[16]; -+ -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) -+#include <linux/regulator/fixed.h> -+#include <linux/wl12xx.h> -+ -+#define OMAP_BEAGLE_WLAN_EN_GPIO (139) -+#define OMAP_BEAGLE_BT_EN_GPIO (138) -+#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) -+#define OMAP_BEAGLE_FM_EN_BT_WU (136) -+ -+struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { -+ .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO), -+ .board_ref_clock = 2, /* 38.4 MHz */ -+}; -+ -+static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, OMAP_BEAGLE_FM_EN_BT_WU, -1}; -+static struct platform_device wl12xx_device = { -+ .name = "kim", -+ .id = -1, -+ .dev.platform_data = &gpios, -+}; -+ -+static struct omap2_hsmmc_info mmcbbt[] = { -+ { -+ .mmc = 1, -+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, -+ .gpio_wp = 29, -+ }, -+ { -+ .name = "wl1271", -+ .mmc = 2, -+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, -+ .gpio_wp = -EINVAL, -+ .gpio_cd = -EINVAL, -+ .ocr_mask = MMC_VDD_165_195, -+ .nonremovable = true, -+ }, -+ {} /* Terminator */ -+ }; -+ -+static struct regulator_consumer_supply beagle_vmmc2_supply = -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+ -+static struct regulator_init_data beagle_vmmc2 = { -+ .constraints = { -+ .min_uV = 1850000, -+ .max_uV = 1850000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vmmc2_supply, -+}; -+ -+static struct fixed_voltage_config beagle_vwlan = { -+ .supply_name = "vwl1271", -+ .microvolts = 1800000, /* 1.8V */ -+ .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, -+ .startup_delay = 70000, /* 70ms */ -+ .enable_high = 1, -+ .enabled_at_boot = 0, -+ .init_data = &beagle_vmmc2, -+}; -+ -+static struct platform_device omap_vwlan_device = { -+ .name = "reg-fixed-voltage", -+ .id = 1, -+ .dev = { -+ .platform_data = &beagle_vwlan, -+ }, -+}; -+#endif -+ -+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) -+ -+#include <plat/mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 -+ -+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = { -+ { -+ .modalias = "enc28j60", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 20000000, -+ .controller_data = &enc28j60_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_enc28j60_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); -+ omap3beagle_zippy_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); -+ irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_enc28j60_init(void) { return; } -+#endif -+ -+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) -+ -+#include <plat/mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 -+ -+static struct omap2_mcspi_device_config ks8851_spi_chip_info = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = { -+ { -+ .modalias = "ks8851", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 36000000, -+ .controller_data = &ks8851_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_ks8851_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); -+ omap3beagle_zippy2_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); -+ irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy2_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_ks8851_init(void) { return; } -+#endif -+ - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -254,6 +416,12 @@ static struct omap2_hsmmc_info mmc[] = { - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, - .gpio_wp = -EINVAL, - }, -+ { -+ .mmc = 2, -+ .caps = MMC_CAP_4_BIT_DATA, -+ .transceiver = true, -+ .ocr_mask = 0x00100000, /* 3.3V */ -+ }, - {} /* Terminator */ - }; - -@@ -277,7 +445,15 @@ static int beagle_twl_gpio_setup(struct device *dev, - mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) { -+ omap2_hsmmc_init(mmcbbt); -+ } else { -+ omap2_hsmmc_init(mmc); -+ } -+#else - omap2_hsmmc_init(mmc); -+#endif - - /* - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active -@@ -375,6 +551,19 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { - }, - }; - -+#if defined(CONFIG_RTC_DRV_DS1307) || \ -+ defined(CONFIG_RTC_DRV_DS1307_MODULE) -+ -+static struct i2c_board_info __initdata beagle_i2c2_zippy[] = { -+ { -+ I2C_BOARD_INFO("eeprom", 0x50), -+ I2C_BOARD_INFO("ds1307", 0x68), -+ }, -+}; -+#else -+static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; -+#endif -+ - static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, -@@ -479,6 +668,15 @@ static struct omap_board_mux board_mux[] __initdata = { - }; - #endif - -+static int __init expansionboard_setup(char *str) -+{ -+ if (!str) -+ return -EINVAL; -+ strncpy(expansionboard_name, str, 16); -+ printk(KERN_INFO "Beagle expansionboard: %s\n", expansionboard_name); -+ return 0; -+} -+ - static void __init beagle_opp_init(void) - { - int r = 0; -@@ -542,6 +740,72 @@ static void __init omap3_beagle_init(void) - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); - -+ if(!strcmp(expansionboard_name, "zippy")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n"); -+ omap3beagle_enc28j60_init(); -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); -+ mmc[1].gpio_wp = 141; -+ mmc[1].gpio_cd = 162; -+ printk(KERN_INFO "Beagle expansionboard: registering I2C2 for zippy board\n"); -+ omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, -+ ARRAY_SIZE(beagle_i2c2_zippy)); -+ -+ } -+ -+ if(!strcmp(expansionboard_name, "zippy2")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n"); -+ omap3beagle_ks8851_init(); -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); -+ mmc[1].gpio_wp = 141; -+ mmc[1].gpio_cd = 162; -+ printk(KERN_INFO "Beagle expansionboard: registering I2C2 for zippy2 board\n"); -+ omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, -+ ARRAY_SIZE(beagle_i2c2_zippy)); -+ } -+ -+ if(!strcmp(expansionboard_name, "trainer")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); -+ gpio_request(130, "sysfs"); -+ gpio_export(130, 1); -+ gpio_request(131, "sysfs"); -+ gpio_export(131, 1); -+ gpio_request(132, "sysfs"); -+ gpio_export(132, 1); -+ gpio_request(133, "sysfs"); -+ gpio_export(133, 1); -+ gpio_request(134, "sysfs"); -+ gpio_export(134, 1); -+ gpio_request(135, "sysfs"); -+ gpio_export(135, 1); -+ gpio_request(136, "sysfs"); -+ gpio_export(136, 1); -+ gpio_request(137, "sysfs"); -+ gpio_export(137, 1); -+ gpio_request(138, "sysfs"); -+ gpio_export(138, 1); -+ gpio_request(139, "sysfs"); -+ gpio_export(139, 1); -+ gpio_request(140, "sysfs"); -+ gpio_export(140, 1); -+ gpio_request(141, "sysfs"); -+ gpio_export(141, 1); -+ gpio_request(162, "sysfs"); -+ gpio_export(162, 1); -+ } -+ -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) -+ { -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) -+ pr_err("error setting wl12xx data\n"); -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx bt platform device\n"); -+ platform_device_register(&wl12xx_device); -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx wifi platform device\n"); -+ platform_device_register(&omap_vwlan_device); -+ } -+ - usb_musb_init(NULL); - usbhs_init(&usbhs_bdata); - omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, -@@ -558,6 +822,8 @@ static void __init omap3_beagle_init(void) - beagle_opp_init(); - } - -+early_param("buddy", expansionboard_setup); -+ - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ - .boot_params = 0x80000100, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch b/recipes-kernel/linux/linux-3.0/beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch deleted file mode 100644 index 8a758ef..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch +++ /dev/null @@ -1,26 +0,0 @@ -From a7e1724833070f01b82381f40b084fd33e46836d Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Thu, 21 Jul 2011 12:59:20 +0200 -Subject: [PATCH 03/10] HACK: OMAP3: beagle: switch to GPTIMER1 - -Breaks with B3 and older due to clock noise - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index f26a9a8..a04f5a0 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -832,5 +832,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - .init_early = omap3_beagle_init_early, - .init_irq = omap3_beagle_init_irq, - .init_machine = omap3_beagle_init, -- .timer = &omap3_secure_timer, -+ .timer = &omap3_timer, - MACHINE_END --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch b/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch deleted file mode 100644 index aaa3dce..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 6ebc5081aba3428762e4e055a154fdda9ebe442e Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 25 May 2011 08:57:40 +0200 -Subject: [PATCH 04/10] OMAP3: beagle: HACK! add in 1GHz OPP - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index a04f5a0..5e1d9f9 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -701,11 +701,13 @@ static void __init beagle_opp_init(void) - /* Enable MPU 1GHz and lower opps */ - dev = &mh->od->pdev.dev; - r = opp_enable(dev, 800000000); -+ r |= opp_enable(dev, 1000000000); - /* TODO: MPU 1GHz needs SR and ABB */ - - /* Enable IVA 800MHz and lower opps */ - dev = &dh->od->pdev.dev; - r |= opp_enable(dev, 660000000); -+ r |= opp_enable(dev, 800000000); - /* TODO: DSP 800MHz needs SR and ABB */ - if (r) { - pr_err("%s: failed to enable higher opp %d\n", --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch b/recipes-kernel/linux/linux-3.0/beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch deleted file mode 100644 index 6930b6d..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch +++ /dev/null @@ -1,202 +0,0 @@ -From f0a23fe6d3c8fc9bbb60a962114b64b923ca4515 Mon Sep 17 00:00:00 2001 -From: Sanjeev Premi <premi@ti.com> -Date: Tue, 18 Jan 2011 13:19:55 +0530 -Subject: [PATCH 05/10] omap3: Add basic support for 720MHz part - -This patch adds support for new speed enhanced parts with ARM -and IVA running at 720MHz and 520MHz respectively. These parts -can be probed at run-time by reading PRODID.SKUID[3:0] at -0x4830A20C [1]. - -This patch specifically does following: - * Detect devices capable of 720MHz. - * Add new OPP - * Ensure that OPP is conditionally enabled. - * Check for presence of IVA before attempting to enable - the corresponding OPP. - - [1] http://focus.ti.com/lit/ug/spruff1d/spruff1d.pdf - -Signed-off-by: Sanjeev Premi <premi@ti.com> ---- - arch/arm/mach-omap2/control.h | 7 ++++ - arch/arm/mach-omap2/id.c | 10 +++++ - arch/arm/mach-omap2/opp3xxx_data.c | 63 ++++++++++++++++++++++++++++++++- - arch/arm/plat-omap/include/plat/cpu.h | 2 + - 4 files changed, 81 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h -index a016c8b..69d0b9c 100644 ---- a/arch/arm/mach-omap2/control.h -+++ b/arch/arm/mach-omap2/control.h -@@ -371,6 +371,13 @@ - #define FEAT_NEON 0 - #define FEAT_NEON_NONE 1 - -+/* -+ * Product ID register -+ */ -+#define OMAP3_PRODID 0x020C -+ -+#define OMAP3_SKUID_MASK 0x0f -+#define OMAP3_SKUID_720MHZ 0x08 - - #ifndef __ASSEMBLY__ - #ifdef CONFIG_ARCH_OMAP2PLUS -diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c -index 2537090..b6ed78a 100644 ---- a/arch/arm/mach-omap2/id.c -+++ b/arch/arm/mach-omap2/id.c -@@ -210,6 +210,15 @@ static void __init omap3_check_features(void) - * TODO: Get additional info (where applicable) - * e.g. Size of L2 cache. - */ -+ -+ /* -+ * Does it support 720MHz? -+ */ -+ status = (OMAP3_SKUID_MASK & read_tap_reg(OMAP3_PRODID)); -+ -+ if (status & OMAP3_SKUID_720MHZ) { -+ omap3_features |= OMAP3_HAS_720MHZ; -+ } - } - - static void __init ti816x_check_features(void) -@@ -490,6 +499,7 @@ static void __init omap3_cpuinfo(void) - OMAP3_SHOW_FEATURE(neon); - OMAP3_SHOW_FEATURE(isp); - OMAP3_SHOW_FEATURE(192mhz_clk); -+ OMAP3_SHOW_FEATURE(720mhz); - - printk(")\n"); - } -diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c -index d95f3f9..44fbc84 100644 ---- a/arch/arm/mach-omap2/opp3xxx_data.c -+++ b/arch/arm/mach-omap2/opp3xxx_data.c -@@ -18,8 +18,10 @@ - * GNU General Public License for more details. - */ - #include <linux/module.h> -+#include <linux/opp.h> - - #include <plat/cpu.h> -+#include <plat/omap_device.h> - - #include "control.h" - #include "omap_opp_data.h" -@@ -98,6 +100,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { - OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV), - /* MPU OPP5 */ - OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV), -+ /* MPU OPP6 */ -+ OPP_INITIALIZER("mpu", false, 720000000, 1350000), - - /* - * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is -@@ -123,6 +127,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { - OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV), - /* DSP OPP5 */ - OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV), -+ /* DSP OPP6 */ -+ OPP_INITIALIZER("iva", false, 520000000, 1350000), - }; - - static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { -@@ -150,6 +156,57 @@ static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { - OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV), - }; - -+ -+/** -+ * omap3_opp_enable_720Mhz() - Enable the OPP corresponding to 720MHz -+ * -+ * This function would be executed only if the silicon is capable of -+ * running at the 720MHz. -+ */ -+static int __init omap3_opp_enable_720Mhz(void) -+{ -+ int r = -ENODEV; -+ struct omap_hwmod *oh_mpu = omap_hwmod_lookup("mpu"); -+ struct omap_hwmod *oh_iva; -+ struct platform_device *pdev; -+ -+ if (!oh_mpu || !oh_mpu->od) { -+ goto err; -+ } else { -+ pdev = &oh_mpu->od->pdev; -+ -+ r = opp_enable(&pdev->dev, 720000000); -+ if (r < 0) { -+ dev_err(&pdev->dev, -+ "opp_enable() failed for mpu@720MHz"); -+ goto err; -+ } -+ } -+ -+ if (omap3_has_iva()) { -+ oh_iva = omap_hwmod_lookup("iva"); -+ -+ if (!oh_iva || !oh_iva->od) { -+ r = -ENODEV; -+ goto err; -+ } else { -+ pdev = &oh_iva->od->pdev; -+ -+ r = opp_enable(&pdev->dev, 520000000); -+ if (r < 0) { -+ dev_err(&pdev->dev, -+ "opp_enable() failed for iva@520MHz"); -+ goto err; -+ } -+ } -+ } -+ -+ dev_info(&pdev->dev, "Enabled OPP corresponding to 720MHz\n"); -+ -+err: -+ return r; -+} -+ - /** - * omap3_opp_init() - initialize omap3 opp table - */ -@@ -163,10 +220,14 @@ int __init omap3_opp_init(void) - if (cpu_is_omap3630()) - r = omap_init_opp_table(omap36xx_opp_def_list, - ARRAY_SIZE(omap36xx_opp_def_list)); -- else -+ else { - r = omap_init_opp_table(omap34xx_opp_def_list, - ARRAY_SIZE(omap34xx_opp_def_list)); - -+ if (omap3_has_720mhz()) -+ r = omap3_opp_enable_720Mhz(); -+ } -+ - return r; - } - device_initcall(omap3_opp_init); -diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h -index 8198bb6..5204c1e 100644 ---- a/arch/arm/plat-omap/include/plat/cpu.h -+++ b/arch/arm/plat-omap/include/plat/cpu.h -@@ -478,6 +478,7 @@ extern u32 omap3_features; - #define OMAP3_HAS_192MHZ_CLK BIT(5) - #define OMAP3_HAS_IO_WAKEUP BIT(6) - #define OMAP3_HAS_SDRC BIT(7) -+#define OMAP3_HAS_720MHZ BIT(8) - - #define OMAP3_HAS_FEATURE(feat,flag) \ - static inline unsigned int omap3_has_ ##feat(void) \ -@@ -493,5 +494,6 @@ OMAP3_HAS_FEATURE(isp, ISP) - OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) - OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) - OMAP3_HAS_FEATURE(sdrc, SDRC) -+OMAP3_HAS_FEATURE(720mhz, 720MHZ) - - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more-lik.patch b/recipes-kernel/linux/linux-3.0/beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more-lik.patch deleted file mode 100644 index b63f9f7..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more-lik.patch +++ /dev/null @@ -1,32 +0,0 @@ -From d9242a243b61059cacde8ce1241b84fc787c57d1 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Thu, 20 Oct 2011 11:14:08 +0200 -Subject: [PATCH 06/10] ARM: OMAP2+: beagleboard: make wilink init look more like pandaboard - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 8 +------- - 1 files changed, 1 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 5e1d9f9..13fffb0 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -203,13 +203,7 @@ static struct regulator_consumer_supply beagle_vmmc2_supply = - - static struct regulator_init_data beagle_vmmc2 = { - .constraints = { -- .min_uV = 1850000, -- .max_uV = 1850000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &beagle_vmmc2_supply, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch b/recipes-kernel/linux/linux-3.0/beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch deleted file mode 100644 index e79f513..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 47be8c9046c22715ce646091dd9e98fa87fc86e1 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Mon, 18 Jul 2011 23:13:41 -0500 -Subject: [PATCH 07/10] omap_hsmmc: Set dto to max value of 14 to avoid SD Card timeouts - -This fixes MMC errors due to timeouts on certain SD Cards following suggestions -to set dto to 14 by Jason Kridner and Steven Kipisz - -Details of the issue: -http://talk.maemo.org/showthread.php?p=1000707#post1000707 - -This fix was originally proposed by Sukumar Ghoral of TI. ---- - drivers/mmc/host/omap_hsmmc.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c -index dedf3da..a8a60d4 100644 ---- a/drivers/mmc/host/omap_hsmmc.c -+++ b/drivers/mmc/host/omap_hsmmc.c -@@ -1441,6 +1441,9 @@ static void set_data_timeout(struct omap_hsmmc_host *host, - dto = 14; - } - -+ /* Set dto to max value of 14 to avoid SD Card timeouts */ -+ dto = 14; -+ - reg &= ~DTO_MASK; - reg |= dto << DTO_SHIFT; - OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch b/recipes-kernel/linux/linux-3.0/beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch deleted file mode 100644 index b864c19..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 2a9282daf94e8b9a1c8dc6fdf5b97461eb15348d Mon Sep 17 00:00:00 2001 -From: Andy Green <andy@warmcat.com> -Date: Thu, 24 Mar 2011 21:27:29 +0000 -Subject: [PATCH 08/10] OMAP2+: add cpu id register to MAC address helper - -Introduce a generic helper function that can set a MAC address using -data from the OMAP unique CPU ID register. - -For comparison purposes this produces a MAC address of - - 2e:40:70:f0:12:06 - -for the ethernet device on my Panda. - -Note that this patch requires the fix patch for CPU ID register -indexes previously posted to linux-omap, otherwise the CPU ID is -misread on Panda by the existing function to do it. This patch -is already on linux-omap. - -"OMAP2+:Common CPU DIE ID reading code reads wrong registers for OMAP4430" -http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=b235e007831dbf57710e59cd4a120e2f374eecb9 - -Signed-off-by: Andy Green <andy.green@linaro.org> ---- - arch/arm/mach-omap2/id.c | 39 +++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/include/mach/id.h | 1 + - 2 files changed, 40 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c -index b6ed78a..de993f1 100644 ---- a/arch/arm/mach-omap2/id.c -+++ b/arch/arm/mach-omap2/id.c -@@ -567,3 +567,42 @@ void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) - else - tap_prod_id = 0x0208; - } -+ -+/* -+ * this uses the unique per-cpu info from the cpu fuses set at factory to -+ * generate a 6-byte MAC address. Two bits in the generated code are used -+ * to elaborate the generated address into four, so it can be used on multiple -+ * network interfaces. -+ */ -+ -+void omap2_die_id_to_ethernet_mac(u8 *mac, int subtype) -+{ -+ struct omap_die_id odi; -+ u32 tap = read_tap_reg(OMAP_TAP_IDCODE); -+ -+ omap_get_die_id(&odi); -+ -+ mac[0] = odi.id_2; -+ mac[1] = odi.id_2 >> 8; -+ mac[2] = odi.id_1; -+ mac[3] = odi.id_1 >> 8; -+ mac[4] = odi.id_1 >> 16; -+ mac[5] = odi.id_1 >> 24; -+ -+ /* XOR other chip-specific data with ID */ -+ -+ tap ^= odi.id_3; -+ -+ mac[0] ^= tap; -+ mac[1] ^= tap >> 8; -+ mac[2] ^= tap >> 16; -+ mac[3] ^= tap >> 24; -+ -+ /* allow four MACs from this same basic data */ -+ -+ mac[1] = (mac[1] & ~0xc0) | ((subtype & 3) << 6); -+ -+ /* mark it as not multicast and outside official 80211 MAC namespace */ -+ -+ mac[0] = (mac[0] & ~1) | 2; -+} -diff --git a/arch/arm/mach-omap2/include/mach/id.h b/arch/arm/mach-omap2/include/mach/id.h -index 02ed3aa..373313a 100644 ---- a/arch/arm/mach-omap2/include/mach/id.h -+++ b/arch/arm/mach-omap2/include/mach/id.h -@@ -18,5 +18,6 @@ struct omap_die_id { - }; - - void omap_get_die_id(struct omap_die_id *odi); -+void omap2_die_id_to_ethernet_mac(u8 *mac, int subtype); - - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or-missing-MAC-.patch b/recipes-kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or-missing-MAC-.patch deleted file mode 100644 index 3da12c7..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or-missing-MAC-.patch +++ /dev/null @@ -1,156 +0,0 @@ -From d0212d089b62cd7ebcd53104717180482e35ec1a Mon Sep 17 00:00:00 2001 -From: Jason Kridner <jdk@ti.com> -Date: Thu, 15 Sep 2011 18:23:02 -0400 -Subject: [PATCH 09/10] HACK: OMAP2+: BeagleBoard: Fix up random or missing MAC addresses for eth0 and wlan0 - -This was borrowed from the Panda implementation at http://patches.linaro.org/777/ - -This patch registers a network device notifier callback to set the mac -addresses for the onboard network assets of the BeagleBoard correctly, despite the -drivers involved have used a random or all-zeros MAC address. - -The technique was suggested by Alan Cox on lkml. - -It works by device path so it corrects the MAC addresses even if the -drivers are in modules loaded in an order that changes their interface -name from usual (eg, the onboard module might be "wlan1" if there is a -USB wireless stick plugged in and its module is inserted first.) - -Cc: Andy Green <andy@warmcat.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 90 +++++++++++++++++++++++++++++++ - 1 files changed, 90 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 13fffb0..5ffe185 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -33,6 +33,8 @@ - - #include <linux/regulator/machine.h> - #include <linux/i2c/twl.h> -+#include <linux/netdevice.h> -+#include <linux/if_ether.h> - - #include <mach/hardware.h> - #include <asm/mach-types.h> -@@ -42,6 +44,7 @@ - - #include <plat/board.h> - #include <plat/common.h> -+#include <mach/id.h> - #include <video/omapdss.h> - #include <video/omap-panel-generic-dpi.h> - #include <plat/gpmc.h> -@@ -91,6 +94,90 @@ static struct { - .usr_button_gpio = 4, - }; - -+/* -+ * This device path represents the onboard USB <-> Ethernet bridge -+ * on the BeagleBoard-xM which needs a random or all-zeros -+ * mac address replaced with a per-cpu stable generated one -+ */ -+ -+static const char * const xm_fixup_mac_device_paths[] = { -+ "usb1/1-2/1-2.1/1-2.1:1.0", -+}; -+ -+static int beagle_device_path_need_mac(struct device *dev) -+{ -+ const char **try = (const char **) xm_fixup_mac_device_paths; -+ const char *path; -+ int count = ARRAY_SIZE(xm_fixup_mac_device_paths); -+ const char *p; -+ int len; -+ struct device *devn; -+ -+ while (count--) { -+ -+ p = *try + strlen(*try); -+ devn = dev; -+ -+ while (devn) { -+ -+ path = dev_name(devn); -+ len = strlen(path); -+ -+ if ((p - *try) < len) { -+ devn = NULL; -+ continue; -+ } -+ -+ p -= len; -+ -+ if (strncmp(path, p, len)) { -+ devn = NULL; -+ continue; -+ } -+ -+ devn = devn->parent; -+ if (p == *try) -+ return count; -+ -+ if (devn != NULL && (p - *try) < 2) -+ devn = NULL; -+ -+ p--; -+ if (devn != NULL && *p != '/') -+ devn = NULL; -+ } -+ -+ try++; -+ } -+ -+ return -ENOENT; -+} -+ -+static int omap_beagle_netdev_event(struct notifier_block *this, -+ unsigned long event, void *ptr) -+{ -+ struct net_device *dev = ptr; -+ struct sockaddr sa; -+ int n; -+ -+ if (event != NETDEV_REGISTER) -+ return NOTIFY_DONE; -+ -+ n = beagle_device_path_need_mac(dev->dev.parent); -+ if (n >= 0) { -+ sa.sa_family = dev->type; -+ omap2_die_id_to_ethernet_mac(sa.sa_data, n); -+ dev->netdev_ops->ndo_set_mac_address(dev, &sa); -+ } -+ -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block omap_beagle_netdev_notifier = { -+ .notifier_call = omap_beagle_netdev_event, -+ .priority = 1, -+}; -+ - static struct gpio omap3_beagle_rev_gpios[] __initdata = { - { 171, GPIOF_IN, "rev_id_0" }, - { 172, GPIOF_IN, "rev_id_1" }, -@@ -146,14 +233,17 @@ static void __init omap3_beagle_init_rev(void) - printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n"); - omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; - beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH; -+ register_netdevice_notifier(&omap_beagle_netdev_notifier); - break; - case 2: - printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); - omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; -+ register_netdevice_notifier(&omap_beagle_netdev_notifier); - break; - default: - printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); - omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; -+ register_netdevice_notifier(&omap_beagle_netdev_notifier); - } - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect-pin-when.patch b/recipes-kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect-pin-when.patch deleted file mode 100644 index bcb7e4f..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect-pin-when.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 713c5b4ce910dacdd75e9616b0f989d643008536 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 19 Oct 2011 12:44:14 +0200 -Subject: [PATCH 10/10] ARM: OMAP2+: beagleboard: fix mmc write protect pin when using the wilink expansion board - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 5ffe185..0124060 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -274,7 +274,7 @@ static struct omap2_hsmmc_info mmcbbt[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, -- .gpio_wp = 29, -+ .gpio_wp = -EINVAL, - }, - { - .name = "wl1271", --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch b/recipes-kernel/linux/linux-3.0/beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch deleted file mode 100644 index 4d2a978..0000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch +++ /dev/null @@ -1,29 +0,0 @@ -From a2139a0efb9472a649465a1080799c73470fd201 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 25 Jan 2012 15:48:36 +0100 -Subject: [PATCH] beagleboard: reinstate usage of hi-speed PLL divider - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 016d0985..c4c7a99 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -467,6 +467,11 @@ static struct omap_dss_device beagle_dvi_device = { - .driver_name = "generic_dpi_panel", - .data = &dvi_panel, - .phy.dpi.data_lines = 24, -+ .clocks = { -+ .dispc = { -+ .dispc_fclk_src = OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, -+ }, -+ }, - .reset_gpio = -EINVAL, - }; - --- -1.7.7.5 - diff --git a/recipes-kernel/linux/linux-3.0/beagleboard/defconfig b/recipes-kernel/linux/linux-3.0/beagleboard/defconfig deleted file mode 100644 index 5be7772..0000000 --- a/recipes-kernel/linux/linux-3.0/beagleboard/defconfig +++ /dev/null @@ -1,3604 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux/arm 3.0.22 Kernel Configuration -# -CONFIG_ARM=y -CONFIG_HAVE_PWM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_HAVE_SCHED_CLOCK=y -CONFIG_GENERIC_GPIO=y -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_KTIME_SCALAR=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_VECTORS_BASE=0xffff0000 -# CONFIG_ARM_PATCH_PHYS_VIRT is not set -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_HAVE_IRQ_WORK=y -CONFIG_IRQ_WORK=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_DEFAULT_HOSTNAME="beagleboard" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_FHANDLE=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set -CONFIG_HAVE_GENERIC_HARDIRQS=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_HARDIRQS=y -CONFIG_HAVE_SPARSE_IRQ=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_CHIP=y -# CONFIG_SPARSE_IRQ is not set - -# -# RCU Subsystem -# -CONFIG_TINY_RCU=y -# CONFIG_PREEMPT_RCU is not set -# CONFIG_RCU_TRACE is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_CGROUPS=y -# CONFIG_CGROUP_DEBUG is not set -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_CGROUP_MEM_RES_CTLR=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_RT_GROUP_SCHED=y -CONFIG_BLK_CGROUP=y -# CONFIG_DEBUG_BLK_CGROUP is not set -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -CONFIG_SCHED_AUTOGROUP=y -CONFIG_MM_OWNER=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EXPERT=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_EMBEDDED=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_PERF_COUNTERS is not set -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_OPROFILE=m -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_HW_BREAKPOINT=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_THROTTLING=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_CFQ_GROUP_IOSCHED=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CNS3XXX is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_MXS is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_NUC93X is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5P64X0 is not set -# CONFIG_ARCH_S5PC100 is not set -# CONFIG_ARCH_S5PV210 is not set -# CONFIG_ARCH_EXYNOS4 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_TCC_926 is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_U8500 is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_PLAT_SPEAR is not set -# CONFIG_ARCH_VT8500 is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_KEYBOARD_GPIO_POLLED is not set - -# -# TI OMAP Common Features -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -CONFIG_ARCH_OMAP2PLUS=y - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -CONFIG_OMAP_SMARTREFLEX_CLASS3=y -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX=y -CONFIG_OMAP_MUX_DEBUG=y -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 -CONFIG_OMAP_IOMMU=y -CONFIG_OMAP_IOMMU_DEBUG=m -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -CONFIG_OMAP_PM_NOOP=y - -# -# TI OMAP2/3/4 Specific Features -# -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set -CONFIG_SOC_OMAP3430=y -# CONFIG_SOC_OMAPTI816X is not set -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -CONFIG_MACH_OMAP3_BEAGLE=y -# CONFIG_MACH_DEVKIT8000 is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OMAP3530_LV_SOM is not set -# CONFIG_MACH_OMAP3_TORPEDO is not set -CONFIG_MACH_OVERO=y -CONFIG_MACH_OMAP3EVM=y -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_CRANEBOARD is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -CONFIG_MACH_OMAP3_TOUCHBOOK=y -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RM680 is not set -# CONFIG_MACH_NOKIA_RX51 is not set -CONFIG_MACH_OMAP_ZOOM2=y -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_CM_T3517 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_IGEP0030 is not set -# CONFIG_MACH_SBC3530 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# System MMU -# - -# -# Processor Type -# -CONFIG_CPU_V7=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_SWP_EMULATE is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_DMA_MEM_BUFFERABLE=y -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -# CONFIG_ARM_ERRATA_743622 is not set -# CONFIG_ARM_ERRATA_754322 is not set - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -CONFIG_HAVE_ARCH_PFN_VALID=y -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -CONFIG_MIGRATION=y -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_NEED_PER_CPU_KM=y -# CONFIG_CLEANCACHE is not set -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -# CONFIG_SECCOMP is not set -# CONFIG_CC_STACKPROTECTOR is not set -# CONFIG_DEPRECATED_PARAM_STRUCT is not set - -# -# Boot options -# -# CONFIG_USE_OF is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -CONFIG_CMDLINE_FROM_BOOTLOADER=y -# CONFIG_CMDLINE_EXTEND is not set -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y -# CONFIG_CRASH_DUMP is not set -CONFIG_AUTO_ZRELADDR=y - -# -# CPU Power Management -# - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_PM_SLEEP=y -CONFIG_PM_RUNTIME=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_ADVANCED_DEBUG is not set -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_CAN_PM_TRACE=y -# CONFIG_APM_EMULATION is not set -CONFIG_ARCH_HAS_OPP=y -CONFIG_PM_OPP=y -CONFIG_PM_RUNTIME_CLK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_ROUTE_CLASSID=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE_DEMUX=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETWORK_PHY_TIMESTAMPING=y -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_ZONES=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CONNTRACK_TIMESTAMP=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_SNMP=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_CT=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_TEE=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_CPU=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -# CONFIG_IP_SET_BITMAP_IP is not set -# CONFIG_IP_SET_BITMAP_IPMAC is not set -# CONFIG_IP_SET_BITMAP_PORT is not set -# CONFIG_IP_SET_HASH_IP is not set -# CONFIG_IP_SET_HASH_IPPORT is not set -# CONFIG_IP_SET_HASH_IPPORTIP is not set -# CONFIG_IP_SET_HASH_IPPORTNET is not set -# CONFIG_IP_SET_HASH_NET is not set -# CONFIG_IP_SET_HASH_NETPORT is not set -# CONFIG_IP_SET_LIST_SET is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y -# CONFIG_IP_VS_PROTO_SCTP is not set - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m -CONFIG_IP_VS_NFCT=y -CONFIG_IP_VS_PE_SIP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV6=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_L2TP=m -CONFIG_L2TP_DEBUGFS=m -CONFIG_L2TP_V3=y -CONFIG_L2TP_IP=m -CONFIG_L2TP_ETH=m -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -# CONFIG_NET_SCH_SFB is not set -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m -CONFIG_NET_SCH_MQPRIO=m -CONFIG_NET_SCH_CHOKE=m -# CONFIG_NET_SCH_QFQ is not set - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -CONFIG_NET_CLS_CGROUP=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -CONFIG_CAN_SLCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=y -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=y -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_ATH3K=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -CONFIG_BT_MRVL=m -# CONFIG_BT_MRVL_SDIO is not set -CONFIG_BT_ATH3K=m -CONFIG_BT_WILINK=m -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -CONFIG_NL80211_TESTMODE=y -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_CFG80211_INTERNAL_REGDB is not set -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=y -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -# CONFIG_RFKILL_REGULATOR is not set -# CONFIG_RFKILL_GPIO is not set -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set -# CONFIG_CAIF is not set -CONFIG_CEPH_LIB=m -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -CONFIG_SM_FTL=m -# CONFIG_MTD_OOPS is not set -CONFIG_MTD_SWAP=m - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND_ECC=y -# CONFIG_MTD_NAND_ECC_SMC is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_BCH is not set -# CONFIG_MTD_SM_COMMON is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_BLK_DEV_RBD is not set -# CONFIG_SENSORS_LIS3LV02D is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_INTEL_MID_PTI is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -CONFIG_SENSORS_BH1780=m -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -CONFIG_HMC6352=m -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -CONFIG_BMP085=m -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=m -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set - -# -# Texas Instruments shared transport line discipline -# -CONFIG_TI_ST=m -# CONFIG_SENSORS_LIS3_SPI is not set -# CONFIG_SENSORS_LIS3_I2C is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -CONFIG_ISCSI_BOOT_SYSFS=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_RAID=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_DM_FLAKEY=m -CONFIG_TARGET_CORE=m -CONFIG_TCM_IBLOCK=m -CONFIG_TCM_FILEIO=m -CONFIG_TCM_PSCSI=m -CONFIG_LOOPBACK_TARGET=m -# CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_MACVTAP=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_MII=y -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -CONFIG_MICREL_PHY=m -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -# CONFIG_AX88796 is not set -CONFIG_SMC91X=y -# CONFIG_TI_DAVINCI_EMAC is not set -CONFIG_TI_DAVINCI_MDIO=m -CONFIG_TI_DAVINCI_CPDMA=m -# CONFIG_DM9000 is not set -CONFIG_ENC28J60=y -# CONFIG_ENC28J60_WRITEVERIFY is not set -# CONFIG_ETHOC is not set -CONFIG_SMC911X=y -CONFIG_SMSC911X=y -# CONFIG_SMSC911X_ARCH_HOOKS is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -CONFIG_KS8851=y -# CONFIG_KS8851_MLL is not set -# CONFIG_FTMAC100 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -CONFIG_ATH_COMMON=m -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -CONFIG_CARL9170=m -CONFIG_CARL9170_LEDS=y -CONFIG_CARL9170_WPC=y -CONFIG_B43=m -CONFIG_B43_SDIO=y -CONFIG_B43_PIO=y -CONFIG_B43_PHY_N=y -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -CONFIG_LIBERTAS_SDIO=m -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -# CONFIG_LIBERTAS_MESH is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_UNKNOWN=y -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_RTL8192SE=m -CONFIG_RTL8192CU=m -CONFIG_RTLWIFI=m -CONFIG_RTL8192C_COMMON=m -CONFIG_WL1251=m -CONFIG_WL1251_SPI=m -CONFIG_WL1251_SDIO=m -CONFIG_WL12XX_MENU=m -CONFIG_WL12XX=m -CONFIG_WL12XX_HT=y -CONFIG_WL12XX_SPI=m -CONFIG_WL12XX_SDIO=m -# CONFIG_WL12XX_SDIO_TEST is not set -CONFIG_WL12XX_PLATFORM_DATA=y -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set -# CONFIG_MWIFIEX is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -CONFIG_WIMAX_IWMC3200_SDIO=y -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=y -CONFIG_USB_KAWETH=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_RTL8150=y -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_CDC_NCM=m -CONFIG_USB_NET_DM9601=y -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_PLUSB=y -CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_NET_CX82310_ETH=m -# CONFIG_USB_NET_KALMIA is not set -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -CONFIG_USB_IPHETH=m -CONFIG_USB_SIERRA_NET=m -CONFIG_USB_VL600=m -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set - -# -# CAIF transport drivers -# -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPTP=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_QT1070=m -CONFIG_KEYBOARD_QT2160=m -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -CONFIG_KEYBOARD_MCS=m -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2005 is not set -CONFIG_TOUCHSCREEN_TSC2007=y -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -CONFIG_INPUT_MISC=y -CONFIG_INPUT_AD714X=m -CONFIG_INPUT_AD714X_I2C=m -CONFIG_INPUT_AD714X_SPI=m -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_TWL4030_VIBRA=m -CONFIG_INPUT_UINPUT=y -CONFIG_INPUT_PCF8574=m -CONFIG_INPUT_PWM_BEEPER=m -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -CONFIG_INPUT_ADXL34X=m -CONFIG_INPUT_ADXL34X_I2C=m -CONFIG_INPUT_ADXL34X_SPI=m -CONFIG_INPUT_CMA3000=m -CONFIG_INPUT_CMA3000_I2C=m - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_SERIAL_NONSTANDARD is not set -CONFIG_N_GSM=m -# CONFIG_TRACE_SINK is not set -CONFIG_DEVKMEM=y - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX3107 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_OMAP=y -CONFIG_SERIAL_OMAP_CONSOLE=y -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -CONFIG_SERIAL_IFX6X60=m -# CONFIG_SERIAL_XILINX_PS_UART is not set -CONFIG_TTY_PRINTK=y -# CONFIG_HVC_DCC is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_RAMOOPS is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=m - -# -# Multiplexer I2C Chip support -# -CONFIG_I2C_MUX_GPIO=m -# CONFIG_I2C_MUX_PCA9541 is not set -# CONFIG_I2C_MUX_PCA954x is not set -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=m - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PXA_PCI is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -CONFIG_I2C_DIOLAN_U2C=m -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_OC_TINY is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set - -# -# PPS generators support -# - -# -# PTP clock support -# - -# -# Enable Device Drivers -> PPS to see the PTP clock options. -# -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_MAX730X=m - -# -# Memory mapped GPIO drivers: -# -# CONFIG_GPIO_BASIC_MMIO is not set -# CONFIG_GPIO_IT8761E is not set - -# -# I2C GPIO expanders: -# -CONFIG_GPIO_MAX7300=m -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_SX150X is not set -CONFIG_GPIO_TWL4030=y -CONFIG_GPIO_ADP5588=m - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_74X164 is not set - -# -# AC97 GPIO expanders: -# - -# -# MODULbus GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -CONFIG_TEST_POWER=m -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ20Z75 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_BATTERY_MAX17042=m -CONFIG_CHARGER_ISP1704=m -# CONFIG_CHARGER_MAX8903 is not set -CONFIG_CHARGER_TWL4030=m -CONFIG_CHARGER_GPIO=m -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -CONFIG_SENSORS_ADT7411=m -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -CONFIG_SENSORS_ASC7621=m -# CONFIG_SENSORS_ATXP1 is not set -CONFIG_SENSORS_DS620=m -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -CONFIG_SENSORS_GPIO_FAN=m -# CONFIG_SENSORS_IT87 is not set -CONFIG_SENSORS_JC42=m -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -CONFIG_SENSORS_SMM665=m -# CONFIG_SENSORS_DME1737 is not set -CONFIG_SENSORS_EMC1403=m -CONFIG_SENSORS_EMC2103=m -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_ADS1015 is not set -# CONFIG_SENSORS_ADS7828 is not set -CONFIG_SENSORS_ADS7871=m -CONFIG_SENSORS_AMC6821=m -# CONFIG_SENSORS_THMC50 is not set -CONFIG_SENSORS_TMP102=m -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -CONFIG_SENSORS_TWL4030_MADC=m -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_BLOCKIO=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -CONFIG_SSB_SDIOHOST=y -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set -CONFIG_BCMA_POSSIBLE=y - -# -# Broadcom specific AMBA -# -# CONFIG_BCMA is not set -CONFIG_MFD_SUPPORT=y -CONFIG_MFD_CORE=y -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -CONFIG_TPS6105X=m -# CONFIG_TPS65010 is not set -CONFIG_TPS6507X=m -CONFIG_MFD_TPS6586X=y -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_MADC=m -CONFIG_TWL4030_POWER=y -CONFIG_TWL4030_CODEC=y -CONFIG_TWL6030_PWM=m -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13XXX is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_EZX_PCAP is not set -CONFIG_MFD_WL1273_CORE=m -CONFIG_MFD_OMAP_USB_HOST=y -# CONFIG_MFD_TPS65910 is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_DUMMY=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -CONFIG_REGULATOR_TPS6105X=m -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_TPS6586X=m -CONFIG_REGULATOR_TPS6524X=m -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_MEDIA_CONTROLLER=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_RC_CORE=m -CONFIG_LIRC=m -CONFIG_RC_MAP=m -CONFIG_IR_NEC_DECODER=m -CONFIG_IR_RC5_DECODER=m -CONFIG_IR_RC6_DECODER=m -CONFIG_IR_JVC_DECODER=m -CONFIG_IR_SONY_DECODER=m -CONFIG_IR_RC5_SZ_DECODER=m -CONFIG_IR_LIRC_CODEC=m -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_REDRAT3 is not set -# CONFIG_IR_STREAMZAP is not set -CONFIG_RC_LOOPBACK=m -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y - -# -# Customize TV tuners -# -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_MEDIA_TUNER_TDA18218=m -CONFIG_MEDIA_TUNER_TDA18212=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_V4L2_MEM2MEM_DEV=m -CONFIG_VIDEOBUF2_CORE=m -CONFIG_VIDEOBUF2_MEMOPS=m -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders, decoders, sensors and other helper chips -# - -# -# Audio decoders, processors and mixers -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -CONFIG_VIDEO_ADV7180=m -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=m -CONFIG_VIDEO_TVP5150=m -CONFIG_VIDEO_TVP7002=m -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_SAA717X is not set -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_AK881X is not set - -# -# Camera sensor devices -# -CONFIG_VIDEO_OV7670=m -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_MT9V032=y -# CONFIG_VIDEO_TCM825X is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set - -# -# Miscelaneous helper chips -# -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_M52790 is not set -CONFIG_VIDEO_VIVI=m -CONFIG_VIDEO_VPSS_SYSTEM=m -CONFIG_VIDEO_VPFE_CAPTURE=y -CONFIG_VIDEO_DM6446_CCDC=m -CONFIG_VIDEO_OMAP2_VOUT=y -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_VIDEO_SR030PC30=m -CONFIG_VIDEO_NOON010PC30=m -# CONFIG_VIDEO_M5MOLS is not set -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_DEBUG=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_BENQ=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_CPIA1=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_KINECT is not set -CONFIG_USB_GSPCA_KONICA=m -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_NW80X=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_OV534_9=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SN9C2028=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SPCA1528=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_SQ930X=m -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_VICAM=m -CONFIG_USB_GSPCA_XIRLINK_CIT=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_TLG2300=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_RC=y -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_USB_ET61X251=m -CONFIG_USB_SN9C102=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_TESTDEV=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -CONFIG_RADIO_SAA7706H=m -# CONFIG_RADIO_TEF6862 is not set -CONFIG_RADIO_WL1273=m - -# -# Texas Instruments WL128x FM driver (ST based) -# -CONFIG_RADIO_WL128X=m -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -CONFIG_DVB_USB_AZ6027=m -CONFIG_DVB_USB_LME2510=m -CONFIG_DVB_USB_TECHNISAT_USB2=m -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set - -# -# Multistandard (satellite) frontends -# -CONFIG_DVB_STB0899=m -CONFIG_DVB_STB6100=m -CONFIG_DVB_STV090x=m -CONFIG_DVB_STV6110x=m - -# -# DVB-S (satellite) frontends -# -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_DS3000=m - -# -# DVB-T (terrestrial) frontends -# -CONFIG_DVB_CX22702=m -CONFIG_DVB_DRXD=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_CXD2820R=m - -# -# DVB-C (cable) frontends -# -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m - -# -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends -# -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m - -# -# ISDB-T (terrestrial) frontends -# -CONFIG_DVB_S921=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_MB86A20S=m - -# -# Digital terrestrial only tuners/PLL -# -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_TUNER_DIB0090=m - -# -# SEC control devices for DVB-S -# -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_ISL6423=m -CONFIG_DVB_LGS8GXX=m -CONFIG_DVB_ATBM8830=m -CONFIG_DVB_IX2505V=m - -# -# Tools to develop new frontends -# -# CONFIG_DVB_DUMMY_FE is not set - -# -# Graphics support -# -CONFIG_DRM=m -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -# CONFIG_FB_WMT_GE_ROPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -CONFIG_FB_UDL=m -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set -CONFIG_OMAP2_DSS_DPI=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_OMAP2_DSS_SLEEP_BEFORE_RESET=y -CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -CONFIG_FB_OMAP2_NUM_FBS=2 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC_DPI=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -CONFIG_PANEL_NEC_NL8048HL11_01B=y -# CONFIG_PANEL_TAAL is not set -CONFIG_PANEL_TPO_TD043MTEA1=m -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_L4F00242T03 is not set -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -# CONFIG_LCD_PLATFORM is not set -# CONFIG_LCD_S6E63M0 is not set -# CONFIG_LCD_LD9040 is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -# CONFIG_BACKLIGHT_PWM is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_UA101=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_USB_6FIRE=m -CONFIG_SND_SOC=y -CONFIG_SND_SOC_CACHE_LZO=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OVERO=y -CONFIG_SND_OMAP_SOC_OMAP3EVM=y -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -CONFIG_SND_OMAP_SOC_ZOOM2=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -CONFIG_HID_ACRUX=m -# CONFIG_HID_ACRUX_FF is not set -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -# CONFIG_HID_PRODIKEYS is not set -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EMS_FF=m -# CONFIG_HID_ELECOM is not set -CONFIG_HID_EZKEY=y -CONFIG_HID_KEYTOUCH=m -# CONFIG_HID_KYE is not set -CONFIG_HID_UCLOGIC=m -CONFIG_HID_WALTOP=m -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LCPOWER=m -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWII_FF is not set -CONFIG_HID_MAGICMOUSE=m -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_MULTITOUCH=m -CONFIG_HID_NTRIG=y -# CONFIG_HID_ORTEK is not set -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_PICOLCD=m -CONFIG_HID_PICOLCD_FB=y -CONFIG_HID_PICOLCD_BACKLIGHT=y -# CONFIG_HID_PICOLCD_LCD is not set -CONFIG_HID_PICOLCD_LEDS=y -CONFIG_HID_QUANTA=m -CONFIG_HID_ROCCAT=m -CONFIG_HID_ROCCAT_COMMON=m -CONFIG_HID_ROCCAT_ARVO=m -CONFIG_HID_ROCCAT_KONE=m -CONFIG_HID_ROCCAT_KONEPLUS=m -CONFIG_HID_ROCCAT_KOVAPLUS=m -# CONFIG_HID_ROCCAT_PYRA is not set -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -CONFIG_USB_EHCI_HCD_OMAP=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_TUSB6010 is not set -CONFIG_USB_MUSB_OMAP2PLUS=y -# CONFIG_USB_MUSB_AM35X is not set -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_UX500_DMA is not set -CONFIG_USB_INVENTRA_DMA=y -# CONFIG_USB_TI_CPPI_DMA is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -CONFIG_USB_STORAGE_REALTEK=m -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -CONFIG_USB_STORAGE_ENE_UB6250=m -CONFIG_USB_UAS=m -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QCAUX=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -CONFIG_USB_SERIAL_CYBERJACK=m -# CONFIG_USB_SERIAL_XIRCOM is not set -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m -CONFIG_USB_SERIAL_ZIO=m -CONFIG_USB_SERIAL_SSU100=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_YUREX=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=480 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_FUSB300 is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA_U2O is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -CONFIG_USB_G_NCM=m -# CONFIG_USB_GADGETFS is not set -CONFIG_USB_FUNCTIONFS=m -# CONFIG_USB_FUNCTIONFS_ETH is not set -CONFIG_USB_FUNCTIONFS_RNDIS=y -# CONFIG_USB_FUNCTIONFS_GENERIC is not set -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -CONFIG_USB_MASS_STORAGE=m -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -CONFIG_USB_CDC_COMPOSITE=m -# CONFIG_USB_G_MULTI is not set -CONFIG_USB_G_HID=m -CONFIG_USB_G_DBGP=m -# CONFIG_USB_G_DBGP_PRINTK is not set -CONFIG_USB_G_DBGP_SERIAL=y -CONFIG_USB_G_WEBCAM=m - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_TWL6030_USB=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y -# CONFIG_MMC_CLKGATE is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=8 -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -CONFIG_MMC_SPI=m -# CONFIG_MMC_DW is not set -# CONFIG_MMC_VUB300 is not set -CONFIG_MMC_USHC=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -CONFIG_LEDS_LP5521=m -CONFIG_LEDS_LP5523=m -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -CONFIG_LEDS_PWM=m -CONFIG_LEDS_REGULATOR=m -# CONFIG_LEDS_BD2802 is not set -CONFIG_LEDS_WS2801=y -# CONFIG_LEDS_LT3593 is not set -CONFIG_LEDS_TRIGGERS=y - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -CONFIG_NFC_DEVICES=y -CONFIG_PN544_NFC=m -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=y -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS3232 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_BQ32K=m -CONFIG_RTC_DRV_TWL4030=m -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T93 is not set -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -CONFIG_STAGING=y -# CONFIG_VIDEO_TM6000 is not set -# CONFIG_USBIP_CORE is not set -CONFIG_W35UND=m -CONFIG_PRISM2_USB=m -CONFIG_ECHO=m -# CONFIG_BRCMUTIL is not set -# CONFIG_ASUS_OLED is not set -CONFIG_R8712U=m -CONFIG_R8712_AP=y -# CONFIG_TRANZPORT is not set -# CONFIG_POHMELFS is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_IIO is not set -CONFIG_XVMALLOC=y -CONFIG_ZRAM=m -# CONFIG_ZRAM_DEBUG is not set -# CONFIG_FB_SM7XX is not set -# CONFIG_LIRC_STAGING is not set -# CONFIG_EASYCAP is not set -# CONFIG_TIDSPBRIDGE is not set -# CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set -CONFIG_MACH_NO_WESTBRIDGE=y -# CONFIG_ATH6K_LEGACY is not set -CONFIG_USB_ENESTORAGE=m -CONFIG_BCM_WIMAX=m -CONFIG_FT1000=m -CONFIG_FT1000_USB=m - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set -CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m -CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m - -# -# Altera FPGA firmware download module -# -# CONFIG_ALTERA_STAPL is not set -CONFIG_CLKDEV_LOOKUP=y - -# -# File systems -# -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -CONFIG_JFS_STATISTICS=y -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_POSIX_ACL=y -CONFIG_XFS_RT=y -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -CONFIG_GFS2_FS_LOCKING_DLM=y -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -CONFIG_NILFS2_FS=m -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=m -CONFIG_CUSE=m -CONFIG_GENERIC_ACL=y - -# -# Caches -# -CONFIG_FSCACHE=m -CONFIG_FSCACHE_STATS=y -CONFIG_FSCACHE_HISTOGRAM=y -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_FSCACHE_OBJECT_LIST is not set -CONFIG_CACHEFILES=m -# CONFIG_CACHEFILES_DEBUG is not set -CONFIG_CACHEFILES_HISTOGRAM=y - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_LOGFS=m -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_XATTR is not set -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_PSTORE=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NFS_V4_1=y -CONFIG_PNFS_FILE_LAYOUT=y -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -# CONFIG_NFS_USE_NEW_IDMAPPER is not set -CONFIG_NFSD=m -CONFIG_NFSD_DEPRECATED=y -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_ACL_SUPPORT=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_CEPH_FS=m -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -# CONFIG_CIFS_DEBUG2 is not set -CONFIG_CIFS_DFS_UPCALL=y -CONFIG_CIFS_FSCACHE=y -CONFIG_CIFS_ACL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -# CONFIG_AFS_FSCACHE is not set -CONFIG_9P_FS=m -CONFIG_9P_FSCACHE=y -CONFIG_9P_FS_POSIX_ACL=y - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_HARDLOCKUP_DETECTOR is not set -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_LKDTM is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_DEBUG_PAGEALLOC is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_RING_BUFFER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_ASYNC_RAID6_TEST is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_STRICT_DEVMEM is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_USER_API=m -CONFIG_CRYPTO_USER_API_HASH=m -CONFIG_CRYPTO_USER_API_SKCIPHER=m -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_OMAP_SHAM=m -CONFIG_CRYPTO_DEV_OMAP_AES=m -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_BITREVERSE=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_TEST=m -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_BTREE=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y -CONFIG_AVERAGE=y diff --git a/recipes-kernel/linux/linux-3.0/bias/0001-OMAP3630-PRM-add-ABB-PRM-register-definitions.patch b/recipes-kernel/linux/linux-3.0/bias/0001-OMAP3630-PRM-add-ABB-PRM-register-definitions.patch deleted file mode 100644 index 8dd595a..0000000 --- a/recipes-kernel/linux/linux-3.0/bias/0001-OMAP3630-PRM-add-ABB-PRM-register-definitions.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 2deaccf427c0fa1e87ed764877c03c2b1ba9b913 Mon Sep 17 00:00:00 2001 -From: Mike Turquette <mturquette@ti.com> -Date: Wed, 29 Jun 2011 17:25:53 -0700 -Subject: [PATCH 1/8] OMAP3630: PRM: add ABB PRM register definitions - -OMAP3630 supports an Adaptive Body-Bias ldo as well as some MPU interrupts -related to voltage control that are not present on OMAP34XX. This patch -adds the offsets, register addresses, bitfield shifts and masks to support -this feature. - -Signed-off-by: Mike Turquette <mturquette@ti.com> ---- - arch/arm/mach-omap2/prm-regbits-34xx.h | 34 ++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/prm2xxx_3xxx.h | 4 +++ - 2 files changed, 38 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h -index 64c087a..0309ff6 100644 ---- a/arch/arm/mach-omap2/prm-regbits-34xx.h -+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h -@@ -216,6 +216,12 @@ - /* PRM_SYSCONFIG specific bits */ - - /* PRM_IRQSTATUS_MPU specific bits */ -+#define OMAP3630_VC_BYPASS_ACK_ST_SHIFT 28 -+#define OMAP3630_VC_BYPASS_ACK_ST_MASK (1 << 28) -+#define OMAP3630_VC_VP1_ACK_ST_SHIFT 27 -+#define OMAP3630_VC_VP1_ACK_ST_MASK (1 << 27) -+#define OMAP3630_ABB_LDO_TRANXDONE_ST_SHIFT 26 -+#define OMAP3630_ABB_LDO_TRANXDONE_ST_MASK (1 << 26) - #define OMAP3430ES2_SND_PERIPH_DPLL_ST_SHIFT 25 - #define OMAP3430ES2_SND_PERIPH_DPLL_ST_MASK (1 << 25) - #define OMAP3430_VC_TIMEOUTERR_ST_MASK (1 << 24) -@@ -248,6 +254,12 @@ - #define OMAP3430_FS_USB_WKUP_ST_MASK (1 << 1) - - /* PRM_IRQENABLE_MPU specific bits */ -+#define OMAP3630_VC_BYPASS_ACK_EN_SHIFT 28 -+#define OMAP3630_VC_BYPASS_ACK_EN_MASK (1 << 28) -+#define OMAP3630_VC_VP1_ACK_EN_SHIFT 27 -+#define OMAP3630_VC_VP1_ACK_EN_MASK (1 << 27) -+#define OMAP3630_ABB_LDO_TRANXDONE_EN_SHIFT 26 -+#define OMAP3630_ABB_LDO_TRANXDONE_EN_MASK (1 << 26) - #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_SHIFT 25 - #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_MASK (1 << 25) - #define OMAP3430_VC_TIMEOUTERR_EN_MASK (1 << 24) -@@ -587,6 +599,28 @@ - - /* PRM_VP2_STATUS specific bits */ - -+/* PRM_LDO_ABB_SETUP specific bits */ -+#define OMAP3630_SR2_IN_TRANSITION_SHIFT 6 -+#define OMAP3630_SR2_IN_TRANSITION_MASK (1 << 6) -+#define OMAP3630_SR2_STATUS_SHIFT 3 -+#define OMAP3630_SR2_STATUS_MASK (3 << 3) -+#define OMAP3630_OPP_CHANGE_SHIFT 2 -+#define OMAP3630_OPP_CHANGE_MASK (1 << 2) -+#define OMAP3630_OPP_SEL_SHIFT 0 -+#define OMAP3630_OPP_SEL_MASK (3 << 0) -+ -+/* PRM_LDO_ABB_CTRL specific bits */ -+#define OMAP3630_SR2_WTCNT_VALUE_SHIFT 8 -+#define OMAP3630_SR2_WTCNT_VALUE_MASK (0xff << 8) -+#define OMAP3630_SLEEP_RBB_SEL_SHIFT 3 -+#define OMAP3630_SLEEP_RBB_SEL_MASK (1 << 3) -+#define OMAP3630_ACTIVE_FBB_SEL_SHIFT 2 -+#define OMAP3630_ACTIVE_FBB_SEL_MASK (1 << 2) -+#define OMAP3630_ACTIVE_RBB_SEL_SHIFT 1 -+#define OMAP3630_ACTIVE_RBB_SEL_MASK (1 << 1) -+#define OMAP3630_SR2EN_SHIFT 0 -+#define OMAP3630_SR2EN_MASK (1 << 0) -+ - /* RM_RSTST_NEON specific bits */ - - /* PM_WKDEP_NEON specific bits */ -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h -index cef533d..408d1c7 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h -@@ -167,6 +167,10 @@ - #define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) - #define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 - #define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) -+#define OMAP3_PRM_LDO_ABB_SETUP_OFFSET 0x00f0 -+#define OMAP3630_PRM_LDO_ABB_SETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f0) -+#define OMAP3_PRM_LDO_ABB_CTRL_OFFSET 0x00f4 -+#define OMAP3630_PRM_LDO_ABB_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f4) - - #define OMAP3_PRM_CLKSEL_OFFSET 0x0040 - #define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/bias/0002-OMAP3-PM-VP-generalize-PRM-interrupt-helpers.patch b/recipes-kernel/linux/linux-3.0/bias/0002-OMAP3-PM-VP-generalize-PRM-interrupt-helpers.patch deleted file mode 100644 index 8ac6433..0000000 --- a/recipes-kernel/linux/linux-3.0/bias/0002-OMAP3-PM-VP-generalize-PRM-interrupt-helpers.patch +++ /dev/null @@ -1,263 +0,0 @@ -From 11401a7b96f5cd53362cd54238a58a5a54a00246 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 29 Jun 2011 17:25:54 -0700 -Subject: [PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers - -We have multiple interrupt status hidden in the PRM interrupt status -reg. Make this handling generic to allow us to pull out LDO status such -as those for ABB from it using the same data structure and indexing. We -hence rename accordingly. - -We also fix a trivial warning as the variable does not need exporting: -arch/arm/mach-omap2/prm2xxx_3xxx.c:172:22: warning: symbol -'omap3_prm_irqs' was not declared. Should it be static? - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Mike Turquette <mturquette@ti.com> ---- - arch/arm/mach-omap2/prm2xxx_3xxx.c | 22 +++++++++++----------- - arch/arm/mach-omap2/prm2xxx_3xxx.h | 7 +++++-- - arch/arm/mach-omap2/prm44xx.c | 28 ++++++++++++++-------------- - arch/arm/mach-omap2/prm44xx.h | 7 +++++-- - arch/arm/mach-omap2/vp.h | 9 --------- - arch/arm/mach-omap2/vp3xxx_data.c | 4 ++-- - arch/arm/mach-omap2/vp44xx_data.c | 6 +++--- - 7 files changed, 40 insertions(+), 43 deletions(-) - -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c -index 3b83763..8a20242 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.c -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c -@@ -162,39 +162,39 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) - /* PRM VP */ - - /* -- * struct omap3_vp - OMAP3 VP register access description. -+ * struct omap3_prm_irq - OMAP3 PRM IRQ register access description. - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg - */ --struct omap3_vp { -+struct omap3_prm_irq { - u32 tranxdone_status; - }; - --struct omap3_vp omap3_vp[] = { -- [OMAP3_VP_VDD_MPU_ID] = { -+static struct omap3_prm_irq omap3_prm_irqs[] = { -+ [OMAP3_PRM_IRQ_VDD_MPU_ID] = { - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, - }, -- [OMAP3_VP_VDD_CORE_ID] = { -+ [OMAP3_PRM_IRQ_VDD_CORE_ID] = { - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, - }, - }; - - #define MAX_VP_ID ARRAY_SIZE(omap3_vp); - --u32 omap3_prm_vp_check_txdone(u8 vp_id) -+u32 omap3_prm_vp_check_txdone(u8 irq_id) - { -- struct omap3_vp *vp = &omap3_vp[vp_id]; -+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; - u32 irqstatus; - - irqstatus = omap2_prm_read_mod_reg(OCP_MOD, - OMAP3_PRM_IRQSTATUS_MPU_OFFSET); -- return irqstatus & vp->tranxdone_status; -+ return irqstatus & irq->tranxdone_status; - } - --void omap3_prm_vp_clear_txdone(u8 vp_id) -+void omap3_prm_vp_clear_txdone(u8 irq_id) - { -- struct omap3_vp *vp = &omap3_vp[vp_id]; -+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; - -- omap2_prm_write_mod_reg(vp->tranxdone_status, -+ omap2_prm_write_mod_reg(irq->tranxdone_status, - OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - } - -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h -index 408d1c7..d90b23f 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h -@@ -307,9 +307,12 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); - extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); - extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); - -+#define OMAP3_PRM_IRQ_VDD_MPU_ID 0 -+#define OMAP3_PRM_IRQ_VDD_CORE_ID 1 - /* OMAP3-specific VP functions */ --u32 omap3_prm_vp_check_txdone(u8 vp_id); --void omap3_prm_vp_clear_txdone(u8 vp_id); -+u32 omap3_prm_vp_check_txdone(u8 irq_id); -+void omap3_prm_vp_clear_txdone(u8 irq_id); -+ - - /* - * OMAP3 access functions for voltage controller (VC) and -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c -index 495a31a..b77d331 100644 ---- a/arch/arm/mach-omap2/prm44xx.c -+++ b/arch/arm/mach-omap2/prm44xx.c -@@ -57,49 +57,49 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) - /* PRM VP */ - - /* -- * struct omap4_vp - OMAP4 VP register access description. -+ * struct omap4_prm_irq - OMAP4 VP register access description. - * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg - */ --struct omap4_vp { -+struct omap4_prm_irq { - u32 irqstatus_mpu; - u32 tranxdone_status; - }; - --static struct omap4_vp omap4_vp[] = { -- [OMAP4_VP_VDD_MPU_ID] = { -+static struct omap4_prm_irq omap4_prm_irqs[] = { -+ [OMAP4_PRM_IRQ_VDD_MPU_ID] = { - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, - .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, - }, -- [OMAP4_VP_VDD_IVA_ID] = { -+ [OMAP4_PRM_IRQ_VDD_IVA_ID] = { - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, - }, -- [OMAP4_VP_VDD_CORE_ID] = { -+ [OMAP4_PRM_IRQ_VDD_CORE_ID] = { - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, - }, - }; - --u32 omap4_prm_vp_check_txdone(u8 vp_id) -+u32 omap4_prm_vp_check_txdone(u8 irq_id) - { -- struct omap4_vp *vp = &omap4_vp[vp_id]; -+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; - u32 irqstatus; - - irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, - OMAP4430_PRM_OCP_SOCKET_INST, -- vp->irqstatus_mpu); -- return irqstatus & vp->tranxdone_status; -+ irq->irqstatus_mpu); -+ return irqstatus & irq->tranxdone_status; - } - --void omap4_prm_vp_clear_txdone(u8 vp_id) -+void omap4_prm_vp_clear_txdone(u8 irq_id) - { -- struct omap4_vp *vp = &omap4_vp[vp_id]; -+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; - -- omap4_prminst_write_inst_reg(vp->tranxdone_status, -+ omap4_prminst_write_inst_reg(irq->tranxdone_status, - OMAP4430_PRM_PARTITION, - OMAP4430_PRM_OCP_SOCKET_INST, -- vp->irqstatus_mpu); -+ irq->irqstatus_mpu); - }; - - u32 omap4_prm_vcvp_read(u8 offset) -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index 3d66ccd..858ee53 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -751,9 +751,12 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); - extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); - extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); - -+#define OMAP4_PRM_IRQ_VDD_CORE_ID 0 -+#define OMAP4_PRM_IRQ_VDD_IVA_ID 1 -+#define OMAP4_PRM_IRQ_VDD_MPU_ID 2 - /* OMAP4-specific VP functions */ --u32 omap4_prm_vp_check_txdone(u8 vp_id); --void omap4_prm_vp_clear_txdone(u8 vp_id); -+u32 omap4_prm_vp_check_txdone(u8 irq_id); -+void omap4_prm_vp_clear_txdone(u8 irq_id); - - /* - * OMAP4 access functions for voltage controller (VC) and -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index d9bc4f1..ee31e2f 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -21,15 +21,6 @@ - - struct voltagedomain; - --/* -- * Voltage Processor (VP) identifiers -- */ --#define OMAP3_VP_VDD_MPU_ID 0 --#define OMAP3_VP_VDD_CORE_ID 1 --#define OMAP4_VP_VDD_CORE_ID 0 --#define OMAP4_VP_VDD_IVA_ID 1 --#define OMAP4_VP_VDD_MPU_ID 2 -- - /* XXX document */ - #define VP_IDLE_TIMEOUT 200 - #define VP_TRANXDONE_TIMEOUT 300 -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c -index 260c554..7bd8181 100644 ---- a/arch/arm/mach-omap2/vp3xxx_data.c -+++ b/arch/arm/mach-omap2/vp3xxx_data.c -@@ -57,7 +57,7 @@ static const struct omap_vp_common omap3_vp_common = { - }; - - struct omap_vp_instance omap3_vp_mpu = { -- .id = OMAP3_VP_VDD_MPU_ID, -+ .id = OMAP3_PRM_IRQ_VDD_MPU_ID, - .common = &omap3_vp_common, - .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, - .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, -@@ -68,7 +68,7 @@ struct omap_vp_instance omap3_vp_mpu = { - }; - - struct omap_vp_instance omap3_vp_core = { -- .id = OMAP3_VP_VDD_CORE_ID, -+ .id = OMAP3_PRM_IRQ_VDD_CORE_ID, - .common = &omap3_vp_common, - .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, - .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c -index b4e7704..6de8ed6 100644 ---- a/arch/arm/mach-omap2/vp44xx_data.c -+++ b/arch/arm/mach-omap2/vp44xx_data.c -@@ -56,7 +56,7 @@ static const struct omap_vp_common omap4_vp_common = { - }; - - struct omap_vp_instance omap4_vp_mpu = { -- .id = OMAP4_VP_VDD_MPU_ID, -+ .id = OMAP4_PRM_IRQ_VDD_MPU_ID, - .common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, -@@ -67,7 +67,7 @@ struct omap_vp_instance omap4_vp_mpu = { - }; - - struct omap_vp_instance omap4_vp_iva = { -- .id = OMAP4_VP_VDD_IVA_ID, -+ .id = OMAP4_PRM_IRQ_VDD_IVA_ID, - .common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, -@@ -78,7 +78,7 @@ struct omap_vp_instance omap4_vp_iva = { - }; - - struct omap_vp_instance omap4_vp_core = { -- .id = OMAP4_VP_VDD_CORE_ID, -+ .id = OMAP4_PRM_IRQ_VDD_CORE_ID, - .common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/bias/0003-OMAP3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch b/recipes-kernel/linux/linux-3.0/bias/0003-OMAP3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch deleted file mode 100644 index 3213861..0000000 --- a/recipes-kernel/linux/linux-3.0/bias/0003-OMAP3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch +++ /dev/null @@ -1,202 +0,0 @@ -From da35165116eabf6149d558b426549784c93af164 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 29 Jun 2011 17:25:55 -0700 -Subject: [PATCH 3/8] OMAP3+: PRM: add tranxdone IRQ handlers for ABB - -OMAP3 and more recent platforms support a PRM interrupt to the MPU for -Adapative Body-Bias ldo transitions. - -Add helpers to the OMAP3 & OMAP4 PRM code to check the status of the -interrupt and also to clear it. These will be called from the ABB code -as part of the greater voltage scaling sequence. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Mike Turquette <mturquette@ti.com> ---- - arch/arm/mach-omap2/prm2xxx_3xxx.c | 35 ++++++++++++++++++++++++++----- - arch/arm/mach-omap2/prm2xxx_3xxx.h | 3 ++ - arch/arm/mach-omap2/prm44xx.c | 40 +++++++++++++++++++++++++++++------ - arch/arm/mach-omap2/prm44xx.h | 3 ++ - 4 files changed, 68 insertions(+), 13 deletions(-) - -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c -index 8a20242..49e9719 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.c -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c -@@ -163,18 +163,23 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) - - /* - * struct omap3_prm_irq - OMAP3 PRM IRQ register access description. -- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg -+ * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg -+ * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg -+ * (ONLY for OMAP3630) - */ - struct omap3_prm_irq { -- u32 tranxdone_status; -+ u32 vp_tranxdone_status; -+ u32 abb_tranxdone_status; - }; - - static struct omap3_prm_irq omap3_prm_irqs[] = { - [OMAP3_PRM_IRQ_VDD_MPU_ID] = { -- .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, -+ .vp_tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, -+ .abb_tranxdone_status = OMAP3630_ABB_LDO_TRANXDONE_ST_MASK, - }, - [OMAP3_PRM_IRQ_VDD_CORE_ID] = { -- .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, -+ .vp_tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, -+ /* no abb for core */ - }, - }; - -@@ -187,14 +192,32 @@ u32 omap3_prm_vp_check_txdone(u8 irq_id) - - irqstatus = omap2_prm_read_mod_reg(OCP_MOD, - OMAP3_PRM_IRQSTATUS_MPU_OFFSET); -- return irqstatus & irq->tranxdone_status; -+ return irqstatus & irq->vp_tranxdone_status; - } - - void omap3_prm_vp_clear_txdone(u8 irq_id) - { - struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; - -- omap2_prm_write_mod_reg(irq->tranxdone_status, -+ omap2_prm_write_mod_reg(irq->vp_tranxdone_status, -+ OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); -+} -+ -+u32 omap36xx_prm_abb_check_txdone(u8 irq_id) -+{ -+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; -+ u32 irqstatus; -+ -+ irqstatus = omap2_prm_read_mod_reg(OCP_MOD, -+ OMAP3_PRM_IRQSTATUS_MPU_OFFSET); -+ return irqstatus & irq->abb_tranxdone_status; -+} -+ -+void omap36xx_prm_abb_clear_txdone(u8 irq_id) -+{ -+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; -+ -+ omap2_prm_write_mod_reg(irq->abb_tranxdone_status, - OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - } - -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h -index d90b23f..08d5f1e 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h -@@ -313,6 +313,9 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); - u32 omap3_prm_vp_check_txdone(u8 irq_id); - void omap3_prm_vp_clear_txdone(u8 irq_id); - -+/* OMAP36xx-specific ABB functions */ -+u32 omap36xx_prm_abb_check_txdone(u8 irq_id); -+void omap36xx_prm_abb_clear_txdone(u8 irq_id); - - /* - * OMAP3 access functions for voltage controller (VC) and -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c -index b77d331..dd3776c 100644 ---- a/arch/arm/mach-omap2/prm44xx.c -+++ b/arch/arm/mach-omap2/prm44xx.c -@@ -59,25 +59,30 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) - /* - * struct omap4_prm_irq - OMAP4 VP register access description. - * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP -- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg -+ * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg -+ * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg - */ - struct omap4_prm_irq { - u32 irqstatus_mpu; -- u32 tranxdone_status; -+ u32 vp_tranxdone_status; -+ u32 abb_tranxdone_status; - }; - - static struct omap4_prm_irq omap4_prm_irqs[] = { - [OMAP4_PRM_IRQ_VDD_MPU_ID] = { - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, -- .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, -+ .vp_tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, -+ .abb_tranxdone_status = OMAP4430_ABB_MPU_DONE_ST_MASK - }, - [OMAP4_PRM_IRQ_VDD_IVA_ID] = { - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, -- .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, -+ .vp_tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, -+ .abb_tranxdone_status = OMAP4430_ABB_IVA_DONE_ST_MASK, - }, - [OMAP4_PRM_IRQ_VDD_CORE_ID] = { - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, -- .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, -+ .vp_tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, -+ /* Core has no ABB */ - }, - }; - -@@ -89,19 +94,40 @@ u32 omap4_prm_vp_check_txdone(u8 irq_id) - irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, - OMAP4430_PRM_OCP_SOCKET_INST, - irq->irqstatus_mpu); -- return irqstatus & irq->tranxdone_status; -+ return irqstatus & irq->vp_tranxdone_status; - } - - void omap4_prm_vp_clear_txdone(u8 irq_id) - { - struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; - -- omap4_prminst_write_inst_reg(irq->tranxdone_status, -+ omap4_prminst_write_inst_reg(irq->vp_tranxdone_status, - OMAP4430_PRM_PARTITION, - OMAP4430_PRM_OCP_SOCKET_INST, - irq->irqstatus_mpu); - }; - -+u32 omap4_prm_abb_check_txdone(u8 irq_id) -+{ -+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; -+ u32 irqstatus; -+ -+ irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_OCP_SOCKET_INST, -+ irq->irqstatus_mpu); -+ return irqstatus & irq->abb_tranxdone_status; -+} -+ -+void omap4_prm_abb_clear_txdone(u8 irq_id) -+{ -+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; -+ -+ omap4_prminst_write_inst_reg(irq->abb_tranxdone_status, -+ OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_OCP_SOCKET_INST, -+ irq->irqstatus_mpu); -+} -+ - u32 omap4_prm_vcvp_read(u8 offset) - { - return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index 858ee53..8ce3207 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -757,6 +757,9 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); - /* OMAP4-specific VP functions */ - u32 omap4_prm_vp_check_txdone(u8 irq_id); - void omap4_prm_vp_clear_txdone(u8 irq_id); -+/* OMAP4-specific ABB functions */ -+u32 omap4_prm_abb_check_txdone(u8 irq_id); -+void omap4_prm_abb_clear_txdone(u8 irq_id); - - /* - * OMAP4 access functions for voltage controller (VC) and --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/bias/0004-OMAP3-ABB-Adaptive-Body-Bias-structures-data.patch b/recipes-kernel/linux/linux-3.0/bias/0004-OMAP3-ABB-Adaptive-Body-Bias-structures-data.patch deleted file mode 100644 index 8d86ccf..0000000 --- a/recipes-kernel/linux/linux-3.0/bias/0004-OMAP3-ABB-Adaptive-Body-Bias-structures-data.patch +++ /dev/null @@ -1,240 +0,0 @@ -From a0a304bd0a2255bc661933ef23b3a0860fbee69d Mon Sep 17 00:00:00 2001 -From: Mike Turquette <mturquette@ti.com> -Date: Wed, 29 Jun 2011 17:25:56 -0700 -Subject: [PATCH 4/8] OMAP3+: ABB: Adaptive Body-Bias structures & data - -Due to voltage domain trimming and silicon characterstics some silicon -may experience instability when operating at a high voltage. To -compensate for this an Adaptive Body-Bias ldo exists. First featured in -OMAP3630, the purpose of this ldo is to provide a voltage boost to PMOS -backgates when a voltage domain is operating at a high OPP. In this -mode the ldo is said to be in Forward Body-Bias. At OPPs within a -nominal voltage range the ABB ldo is bypassed. - -This patch introduces the data structures needed to represent the ABB -ldo's in the voltage layer, and populates the appropriate data for 3630 -and OMAP4. Not all voltage domains have an ABB ldo, and OMAP34xx does -not have it at all; in such cases the voltage data will be marked with -OMAP_ABB_NO_LDO. - -Signed-off-by: Mike Turquette <mturquette@ti.com> ---- - arch/arm/mach-omap2/Makefile | 5 +- - arch/arm/mach-omap2/abb.h | 85 ++++++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/abb36xx_data.c | 38 ++++++++++++++++ - arch/arm/mach-omap2/abb44xx_data.c | 44 ++++++++++++++++++ - 4 files changed, 170 insertions(+), 2 deletions(-) - create mode 100644 arch/arm/mach-omap2/abb.h - create mode 100644 arch/arm/mach-omap2/abb36xx_data.c - create mode 100644 arch/arm/mach-omap2/abb44xx_data.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index 7927dd6..5bc306c 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -82,14 +82,15 @@ endif - # PRCM - obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o - obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \ -- vc3xxx_data.o vp3xxx_data.o -+ vc3xxx_data.o vp3xxx_data.o \ -+ abb36xx_data.o - # XXX The presence of cm2xxx_3xxx.o on the line below is temporary and - # will be removed once the OMAP4 part of the codebase is converted to - # use OMAP4-specific PRCM functions. - obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ - cm44xx.o prcm_mpu44xx.o \ - prminst44xx.o vc44xx_data.o \ -- vp44xx_data.o -+ vp44xx_data.o abb44xx_data.o - - # OMAP voltage domains - ifeq ($(CONFIG_PM),y) -diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h -new file mode 100644 -index 0000000..74f2044 ---- /dev/null -+++ b/arch/arm/mach-omap2/abb.h -@@ -0,0 +1,85 @@ -+/* -+ * OMAP Adaptive Body-Bias structure and macro definitions -+ * -+ * Copyright (C) 2011 Texas Instruments, Inc. -+ * Mike Turquette <mturquette@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef __ARCH_ARM_MACH_OMAP2_ABB_H -+#define __ARCH_ARM_MACH_OMAP2_ABB_H -+ -+#include <linux/kernel.h> -+ -+#include "voltage.h" -+ -+/* NOMINAL_OPP bypasses the ABB ldo, FAST_OPP sets it to Forward Body-Bias */ -+#define OMAP_ABB_NOMINAL_OPP 0 -+#define OMAP_ABB_FAST_OPP 1 -+#define OMAP_ABB_NO_LDO ~0 -+ -+/* Time for the ABB ldo to settle after transition (in micro-seconds) */ -+#define ABB_TRANXDONE_TIMEOUT 50 -+ -+/* -+ * struct omap_abb_ops - per-OMAP operations needed for ABB transition -+ * -+ * @check_tranxdone: return status of ldo transition from PRM_IRQSTATUS -+ * @clear_tranxdone: clear ABB transition status bit from PRM_IRQSTATUS -+ */ -+struct omap_abb_ops { -+ u32 (*check_tranxdone)(u8 irq_id); -+ void (*clear_tranxdone)(u8 irq_id); -+}; -+ -+/* -+ * struct omap_abb_common - ABB data common to an OMAP family -+ * -+ * @opp_sel_mask: CTRL reg uses this to program next state of ldo -+ * @opp_change_mask: CTRL reg uses this to initiate ldo state change -+ * @sr2_wtcnt_value_mask: SETUP reg uses this to program ldo settling time -+ * @sr2en_mask: SETUP reg uses this to enable/disable ldo -+ * @active_fbb_sel_mask: SETUP reg uses this to enable/disable FBB operation -+ * @settling_time: number of micro-seconds it takes for ldo to transition -+ * @clock_cycles: settling_time is counted in multiples of clock cycles -+ * @ops: pointer to common ops for manipulating PRM_IRQSTATUS bits -+ */ -+struct omap_abb_common { -+ u32 opp_sel_mask; -+ u32 opp_change_mask; -+ u32 sr2_wtcnt_value_mask; -+ u32 sr2en_mask; -+ u32 active_fbb_sel_mask; -+ unsigned long settling_time; -+ unsigned long clock_cycles; -+ const struct omap_abb_ops *ops; -+}; -+ -+/* -+ * struct omap_abb_instance - data for each instance of ABB ldo -+ * -+ * @setup_offs: PRM register offset for initial configuration of ABB ldo -+ * @ctrl_offs: PRM register offset for active programming of ABB ldo -+ * @prm_irq_id: IRQ handle used to resolve IRQSTATUS offset & masks -+ * @enabled: track whether ABB ldo is enabled or disabled -+ * @common: pointer to common data for all ABB ldo's -+ * @_opp_sel: internally track last programmed state of ABB ldo. DO NOT USE -+ */ -+struct omap_abb_instance { -+ u8 setup_offs; -+ u8 ctrl_offs; -+ u8 prm_irq_id; -+ bool enabled; -+ const struct omap_abb_common *common; -+ u8 _opp_sel; -+}; -+ -+extern struct omap_abb_instance omap36xx_abb_mpu; -+ -+extern struct omap_abb_instance omap4_abb_mpu; -+extern struct omap_abb_instance omap4_abb_iva; -+ -+#endif -diff --git a/arch/arm/mach-omap2/abb36xx_data.c b/arch/arm/mach-omap2/abb36xx_data.c -new file mode 100644 -index 0000000..0bcfd66 ---- /dev/null -+++ b/arch/arm/mach-omap2/abb36xx_data.c -@@ -0,0 +1,38 @@ -+/* -+ * OMAP36xx Adaptive Body-Bias (ABB) data -+ * -+ * Copyright (C) 2011 Texas Instruments, Inc. -+ * Mike Turquette <mturquette@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "abb.h" -+#include "prm2xxx_3xxx.h" -+#include "prm-regbits-34xx.h" -+ -+static const struct omap_abb_ops omap36xx_abb_ops = { -+ .check_tranxdone = &omap36xx_prm_abb_check_txdone, -+ .clear_tranxdone = &omap36xx_prm_abb_clear_txdone, -+}; -+ -+static const struct omap_abb_common omap36xx_abb_common = { -+ .opp_sel_mask = OMAP3630_OPP_SEL_MASK, -+ .opp_change_mask = OMAP3630_OPP_CHANGE_MASK, -+ .sr2en_mask = OMAP3630_SR2EN_MASK, -+ .active_fbb_sel_mask = OMAP3630_ACTIVE_FBB_SEL_MASK, -+ .sr2_wtcnt_value_mask = OMAP3630_SR2_WTCNT_VALUE_MASK, -+ .settling_time = 30, -+ .clock_cycles = 8, -+ .ops = &omap36xx_abb_ops, -+}; -+ -+/* SETUP & CTRL registers swapped names in OMAP4; thus 36xx looks strange */ -+struct omap_abb_instance omap36xx_abb_mpu = { -+ .setup_offs = OMAP3_PRM_LDO_ABB_CTRL_OFFSET, -+ .ctrl_offs = OMAP3_PRM_LDO_ABB_SETUP_OFFSET, -+ .prm_irq_id = OMAP3_PRM_IRQ_VDD_MPU_ID, -+ .common = &omap36xx_abb_common, -+}; -diff --git a/arch/arm/mach-omap2/abb44xx_data.c b/arch/arm/mach-omap2/abb44xx_data.c -new file mode 100644 -index 0000000..a7cf855 ---- /dev/null -+++ b/arch/arm/mach-omap2/abb44xx_data.c -@@ -0,0 +1,44 @@ -+/* -+ * OMAP44xx Adaptive Body-Bias (ABB) data -+ * -+ * Copyright (C) 2011 Texas Instruments, Inc. -+ * Mike Turquette <mturquette@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include "abb.h" -+#include "prm44xx.h" -+#include "prm-regbits-44xx.h" -+ -+static const struct omap_abb_ops omap4_abb_ops = { -+ .check_tranxdone = &omap4_prm_abb_check_txdone, -+ .clear_tranxdone = &omap4_prm_abb_clear_txdone, -+}; -+ -+static const struct omap_abb_common omap4_abb_common = { -+ .opp_sel_mask = OMAP4430_OPP_SEL_MASK, -+ .opp_change_mask = OMAP4430_OPP_CHANGE_MASK, -+ .sr2en_mask = OMAP4430_SR2EN_MASK, -+ .active_fbb_sel_mask = OMAP4430_ACTIVE_FBB_SEL_MASK, -+ .sr2_wtcnt_value_mask = OMAP4430_SR2_WTCNT_VALUE_MASK, -+ .settling_time = 50, -+ .clock_cycles = 16, -+ .ops = &omap4_abb_ops, -+}; -+ -+struct omap_abb_instance omap4_abb_mpu = { -+ .setup_offs = OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET, -+ .ctrl_offs = OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET, -+ .prm_irq_id = OMAP4_PRM_IRQ_VDD_MPU_ID, -+ .common = &omap4_abb_common, -+}; -+ -+struct omap_abb_instance omap4_abb_iva = { -+ .setup_offs = OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET, -+ .ctrl_offs = OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET, -+ .prm_irq_id = OMAP4_PRM_IRQ_VDD_IVA_ID, -+ .common = &omap4_abb_common, -+}; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/bias/0005-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch b/recipes-kernel/linux/linux-3.0/bias/0005-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch deleted file mode 100644 index eb959ff..0000000 --- a/recipes-kernel/linux/linux-3.0/bias/0005-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch +++ /dev/null @@ -1,194 +0,0 @@ -From 8d85fedcb9866f5041e2c63b54d3eff7fd88cf18 Mon Sep 17 00:00:00 2001 -From: Mike Turquette <mturquette@ti.com> -Date: Wed, 29 Jun 2011 17:25:57 -0700 -Subject: [PATCH 5/8] OMAP3+: OPP: add ABB data to voltage tables - -The operating mode of the Adaptive Body-Bias ldo maps directly to the -voltage of its voltage domain. The two modes supported are bypass and -Forward Body-Bias (FBB). - -This patch models this relationship by adding an opp_sel paramter to -struct omap_volt_data and populates this type in the 3630 and 4430 -voltage tables. - -NOMINAL_OPP causes the ABB ldo to be in bypass at that specific voltage. -FAST_OPP causes the ldo to operate in Forward Body-Bias mode. - -Not all voltage domains have an ABB ldo and 3430 doesn't have one at -all. In such cases voltages are marked with OMAP_ABB_NO_LDO. - -Signed-off-by: Mike Turquette <mturquette@ti.com> ---- - arch/arm/mach-omap2/omap_opp_data.h | 5 ++- - arch/arm/mach-omap2/opp3xxx_data.c | 37 ++++++++++++++++++----------------- - arch/arm/mach-omap2/opp4xxx_data.c | 25 ++++++++++++----------- - arch/arm/mach-omap2/voltage.h | 1 + - 4 files changed, 36 insertions(+), 32 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h -index c784c12..5dd4dea 100644 ---- a/arch/arm/mach-omap2/omap_opp_data.h -+++ b/arch/arm/mach-omap2/omap_opp_data.h -@@ -71,12 +71,13 @@ struct omap_opp_def { - * Initialization wrapper used to define SmartReflex process data - * XXX Is this needed? Just use C99 initializers in data files? - */ --#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \ -+#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain, _opp_sel) \ - { \ - .volt_nominal = _v_nom, \ - .sr_efuse_offs = _efuse_offs, \ - .sr_errminlimit = _errminlimit, \ -- .vp_errgain = _errgain \ -+ .vp_errgain = _errgain, \ -+ .opp_sel = _opp_sel \ - } - - /* Use this to initialize the default table */ -diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c -index d95f3f9..12fc2da 100644 ---- a/arch/arm/mach-omap2/opp3xxx_data.c -+++ b/arch/arm/mach-omap2/opp3xxx_data.c -@@ -24,6 +24,7 @@ - #include "control.h" - #include "omap_opp_data.h" - #include "pm.h" -+#include "abb.h" - - /* 34xx */ - -@@ -36,12 +37,12 @@ - #define OMAP3430_VDD_MPU_OPP5_UV 1350000 - - struct omap_volt_data omap34xx_vddmpu_volt_data[] = { -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18), -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18), -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18), -- VOLT_DATA_DEFINE(0, 0, 0, 0), -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), - }; - - /* VDD2 */ -@@ -51,10 +52,10 @@ struct omap_volt_data omap34xx_vddmpu_volt_data[] = { - #define OMAP3430_VDD_CORE_OPP3_UV 1150000 - - struct omap_volt_data omap34xx_vddcore_volt_data[] = { -- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18), -- VOLT_DATA_DEFINE(0, 0, 0, 0), -+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), - }; - - /* 36xx */ -@@ -67,11 +68,11 @@ struct omap_volt_data omap34xx_vddcore_volt_data[] = { - #define OMAP3630_VDD_MPU_OPP1G_UV 1375000 - - struct omap_volt_data omap36xx_vddmpu_volt_data[] = { -- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16), -- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23), -- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27), -- VOLT_DATA_DEFINE(0, 0, 0, 0), -+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27, OMAP_ABB_FAST_OPP), -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), - }; - - /* VDD2 */ -@@ -80,9 +81,9 @@ struct omap_volt_data omap36xx_vddmpu_volt_data[] = { - #define OMAP3630_VDD_CORE_OPP100_UV 1200000 - - struct omap_volt_data omap36xx_vddcore_volt_data[] = { -- VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16), -- VOLT_DATA_DEFINE(0, 0, 0, 0), -+ VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), - }; - - /* OPP data */ -diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c -index 2293ba2..efdbf91 100644 ---- a/arch/arm/mach-omap2/opp4xxx_data.c -+++ b/arch/arm/mach-omap2/opp4xxx_data.c -@@ -25,6 +25,7 @@ - #include "control.h" - #include "omap_opp_data.h" - #include "pm.h" -+#include "abb.h" - - /* - * Structures containing OMAP4430 voltage supported and various -@@ -37,11 +38,11 @@ - #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000 - - struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { -- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), -- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), -- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), -- VOLT_DATA_DEFINE(0, 0, 0, 0), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27, OMAP_ABB_FAST_OPP), -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), - }; - - #define OMAP4430_VDD_IVA_OPP50_UV 1013000 -@@ -49,19 +50,19 @@ struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { - #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000 - - struct omap_volt_data omap44xx_vdd_iva_volt_data[] = { -- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), -- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), -- VOLT_DATA_DEFINE(0, 0, 0, 0), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP), -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), - }; - - #define OMAP4430_VDD_CORE_OPP50_UV 1025000 - #define OMAP4430_VDD_CORE_OPP100_UV 1200000 - - struct omap_volt_data omap44xx_vdd_core_volt_data[] = { -- VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), -- VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), -- VOLT_DATA_DEFINE(0, 0, 0, 0), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16, OMAP_ABB_NO_LDO), -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), - }; - - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index b4c6259..2aa6c43 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -105,6 +105,7 @@ struct omap_volt_data { - u32 sr_efuse_offs; - u8 sr_errminlimit; - u8 vp_errgain; -+ u32 opp_sel; - }; - - /** --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/bias/0006-OMAP3-Voltage-add-ABB-data-to-voltage-domains.patch b/recipes-kernel/linux/linux-3.0/bias/0006-OMAP3-Voltage-add-ABB-data-to-voltage-domains.patch deleted file mode 100644 index 3850fea..0000000 --- a/recipes-kernel/linux/linux-3.0/bias/0006-OMAP3-Voltage-add-ABB-data-to-voltage-domains.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 4a0f2caa6d49e185eac84e361ee4b40783ffeb16 Mon Sep 17 00:00:00 2001 -From: Mike Turquette <mturquette@ti.com> -Date: Thu, 21 Jul 2011 12:31:50 +0200 -Subject: [PATCH 6/8] OMAP3+: Voltage: add ABB data to voltage domains - -Starting with OMAP36xx, some voltage domains have an ABB ldo meant to -insure stability when that voltage domain is operating at a high OPP. - -This patch adds struct omap_abb_instance to struct voltagedomain and -populates the data for those voltage domains that have an ABB ldo on -both 36xx and 44xx silicon. - -Signed-off-by: Mike Turquette <mturquette@ti.com> ---- - arch/arm/mach-omap2/voltage.h | 1 + - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 3 +++ - arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ - 3 files changed, 7 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 2aa6c43..4fe35d7 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -69,6 +69,7 @@ struct voltagedomain { - struct omap_vc_channel *vc; - const struct omap_vfsm_instance *vfsm; - struct omap_vp_instance *vp; -+ struct omap_abb_instance *abb; - struct omap_voltdm_pmic *pmic; - - /* VC/VP register access functions: SoC specific */ -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index b0d0ae1..cdcfbdf 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -26,6 +26,7 @@ - #include "voltage.h" - #include "vc.h" - #include "vp.h" -+#include "abb.h" - - /* - * VDD data -@@ -90,6 +91,8 @@ void __init omap3xxx_voltagedomains_init(void) - if (cpu_is_omap3630()) { - omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; - omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; -+ -+ omap3_voltdm_mpu.abb = &omap36xx_abb_mpu; - } else { - omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; - omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index c4584e9..11e2458 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -31,6 +31,7 @@ - #include "omap_opp_data.h" - #include "vc.h" - #include "vp.h" -+#include "abb.h" - - static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, -@@ -53,6 +54,7 @@ static struct voltagedomain omap4_voltdm_mpu = { - .vc = &omap4_vc_mpu, - .vfsm = &omap4_vdd_mpu_vfsm, - .vp = &omap4_vp_mpu, -+ .abb = &omap4_abb_mpu, - }; - - static struct voltagedomain omap4_voltdm_iva = { -@@ -64,6 +66,7 @@ static struct voltagedomain omap4_voltdm_iva = { - .vc = &omap4_vc_iva, - .vfsm = &omap4_vdd_iva_vfsm, - .vp = &omap4_vp_iva, -+ .abb = &omap4_abb_iva, - }; - - static struct voltagedomain omap4_voltdm_core = { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3-ABB-initialization-transition-functions.patch b/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3-ABB-initialization-transition-functions.patch deleted file mode 100644 index 88858cf..0000000 --- a/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3-ABB-initialization-transition-functions.patch +++ /dev/null @@ -1,274 +0,0 @@ -From 35fc68e090a4f4241c7b3488fd24e82b3f839994 Mon Sep 17 00:00:00 2001 -From: Mike Turquette <mturquette@ti.com> -Date: Wed, 29 Jun 2011 17:25:59 -0700 -Subject: [PATCH 7/8] OMAP3+: ABB: initialization & transition functions - -The Adaptive Body-Bias ldo can be set to bypass or Forward Body-Bias -after voltage scaling is performed. - -This patch implements the Adaptive Body-Bias ldo initialization routine -and the transition sequence which is needed after a vc_bypass or -vp_forceupdate sequence completes. - -Signed-off-by: Mike Turquette <mturquette@ti.com> ---- - arch/arm/mach-omap2/Makefile | 2 +- - arch/arm/mach-omap2/abb.c | 218 ++++++++++++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/abb.h | 5 + - 3 files changed, 224 insertions(+), 1 deletions(-) - create mode 100644 arch/arm/mach-omap2/abb.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index 5bc306c..d0dd488 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -94,7 +94,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ - - # OMAP voltage domains - ifeq ($(CONFIG_PM),y) --voltagedomain-common := voltage.o vc.o vp.o -+voltagedomain-common := voltage.o vc.o vp.o abb.o - obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ - voltagedomains2xxx_data.o - obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ -diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c -new file mode 100644 -index 0000000..4d42b67 ---- /dev/null -+++ b/arch/arm/mach-omap2/abb.c -@@ -0,0 +1,218 @@ -+/* -+ * OMAP Adaptive Body-Bias core -+ * -+ * Copyright (C) 2011 Texas Instruments, Inc. -+ * Mike Turquette <mturquette@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/init.h> -+#include <linux/delay.h> -+ -+#include "abb.h" -+#include "voltage.h" -+ -+/* -+ * omap_abb_set_opp - program ABB ldo based on new voltage -+ * -+ * @voltdm - pointer to voltage domain that just finished scaling voltage -+ * -+ * Look up the ABB ldo state for the new voltage that voltdm just finished -+ * transitioning to and compare it to current ldo state. If a change is needed -+ * then clear appropriate PRM_IRQSTATUS bit, transition ldo and then clear -+ * PRM_IRQSTATUS bit again. Returns 0 on success, -EERROR otherwise. -+ */ -+int omap_abb_set_opp(struct voltagedomain *voltdm) -+{ -+ struct omap_abb_instance *abb = voltdm->abb; -+ struct omap_volt_data *volt_data; -+ int ret, timeout; -+ u8 opp_sel; -+ -+ /* fetch the ABB ldo OPP_SEL value for the new voltage */ -+ volt_data = omap_voltage_get_voltdata(voltdm, voltdm->nominal_volt); -+ -+ if (IS_ERR_OR_NULL(volt_data)) -+ return -EINVAL; -+ -+ opp_sel = volt_data->opp_sel; -+ -+ /* bail early if no transition is necessary */ -+ if (opp_sel == abb->_opp_sel) -+ return 0; -+ -+ /* clear interrupt status */ -+ timeout = 0; -+ while (timeout++ < ABB_TRANXDONE_TIMEOUT) { -+ abb->common->ops->clear_tranxdone(abb->prm_irq_id); -+ -+ ret = abb->common->ops->check_tranxdone(abb->prm_irq_id); -+ if (!ret) -+ break; -+ -+ udelay(1); -+ } -+ -+ if (timeout>= ABB_TRANXDONE_TIMEOUT) { -+ pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n", -+ __func__, voltdm->name); -+ return -ETIMEDOUT; -+ } -+ -+ /* program next state of ABB ldo */ -+ voltdm->rmw(abb->common->opp_sel_mask, -+ opp_sel << __ffs(abb->common->opp_sel_mask), -+ abb->ctrl_offs); -+ -+ /* initiate ABB ldo change */ -+ voltdm->rmw(abb->common->opp_change_mask, -+ abb->common->opp_change_mask, -+ abb->ctrl_offs); -+ -+ /* clear interrupt status */ -+ timeout = 0; -+ while (timeout++ < ABB_TRANXDONE_TIMEOUT) { -+ abb->common->ops->clear_tranxdone(abb->prm_irq_id); -+ -+ ret = abb->common->ops->check_tranxdone(abb->prm_irq_id); -+ if (!ret) -+ break; -+ -+ udelay(1); -+ } -+ -+ if (timeout>= ABB_TRANXDONE_TIMEOUT) { -+ pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n", -+ __func__, voltdm->name); -+ return -ETIMEDOUT; -+ } -+ -+ /* track internal state */ -+ abb->_opp_sel = opp_sel; -+ -+ return 0; -+} -+ -+/* -+ * omap_abb_enable - enable ABB ldo on a particular voltage domain -+ * -+ * @voltdm - pointer to particular voltage domain -+ */ -+void omap_abb_enable(struct voltagedomain *voltdm) -+{ -+ struct omap_abb_instance *abb = voltdm->abb; -+ -+ if (abb->enabled) -+ return; -+ -+ abb->enabled = true; -+ -+ voltdm->rmw(abb->common->sr2en_mask, abb->common->sr2en_mask, -+ abb->setup_offs); -+} -+ -+/* -+ * omap_abb_disable - disable ABB ldo on a particular voltage domain -+ * -+ * @voltdm - pointer to particular voltage domain -+ * -+ * Included for completeness. Not currently used but will be needed in the -+ * future if ABB is converted to a loadable module. -+ */ -+void omap_abb_disable(struct voltagedomain *voltdm) -+{ -+ struct omap_abb_instance *abb = voltdm->abb; -+ -+ if (!abb->enabled) -+ return; -+ -+ abb->enabled = false; -+ -+ voltdm->rmw(abb->common->sr2en_mask, -+ (0 << __ffs(abb->common->sr2en_mask)), -+ abb->setup_offs); -+} -+ -+/* -+ * omap_abb_init - Initialize an ABB ldo instance -+ * -+ * @voltdm: voltage domain upon which ABB ldo resides -+ * -+ * Initializes an individual ABB ldo for Forward Body-Bias. FBB is used to -+ * insure stability at higher voltages. Note that some older OMAP chips have a -+ * Reverse Body-Bias mode meant to save power at low voltage, but that mode is -+ * unsupported and phased out on newer chips. -+ */ -+void __init omap_abb_init(struct voltagedomain *voltdm) -+{ -+ struct omap_abb_instance *abb = voltdm->abb; -+ u32 sys_clk_rate; -+ u32 sr2_wt_cnt_val; -+ u32 clock_cycles; -+ u32 settling_time; -+ u32 val; -+ -+ if(IS_ERR_OR_NULL(abb)) -+ return; -+ -+ /* -+ * SR2_WTCNT_VALUE is the settling time for the ABB ldo after a -+ * transition and must be programmed with the correct time at boot. -+ * The value programmed into the register is the number of SYS_CLK -+ * clock cycles that match a given wall time profiled for the ldo. -+ * This value depends on: -+ * settling time of ldo in micro-seconds (varies per OMAP family) -+ * # of clock cycles per SYS_CLK period (varies per OMAP family) -+ * the SYS_CLK frequency in MHz (varies per board) -+ * The formula is: -+ * -+ * ldo settling time (in micro-seconds) -+ * SR2_WTCNT_VALUE = ------------------------------------------ -+ * (# system clock cycles) * (sys_clk period) -+ * -+ * Put another way: -+ * -+ * SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK rate)) -+ * -+ * To avoid dividing by zero multiply both "# clock cycles" and -+ * "settling time" by 10 such that the final result is the one we want. -+ */ -+ -+ /* convert SYS_CLK rate to MHz & prevent divide by zero */ -+ sys_clk_rate = DIV_ROUND_CLOSEST(voltdm->sys_clk.rate, 1000000); -+ clock_cycles = abb->common->clock_cycles * 10; -+ settling_time = abb->common->settling_time * 10; -+ -+ /* calculate cycle rate */ -+ clock_cycles = DIV_ROUND_CLOSEST(clock_cycles, sys_clk_rate); -+ -+ /* calulate SR2_WTCNT_VALUE */ -+ sr2_wt_cnt_val = DIV_ROUND_CLOSEST(settling_time, clock_cycles); -+ -+ voltdm->rmw(abb->common->sr2_wtcnt_value_mask, -+ (sr2_wt_cnt_val << __ffs(abb->common->sr2_wtcnt_value_mask)), -+ abb->setup_offs); -+ -+ /* allow Forward Body-Bias */ -+ voltdm->rmw(abb->common->active_fbb_sel_mask, -+ abb->common->active_fbb_sel_mask, -+ abb->setup_offs); -+ -+ /* did bootloader set OPP_SEL? */ -+ val = voltdm->read(abb->ctrl_offs); -+ val &= abb->common->opp_sel_mask; -+ abb->_opp_sel = val >> __ffs(abb->common->opp_sel_mask); -+ -+ /* enable the ldo if not done by bootloader */ -+ val = voltdm->read(abb->setup_offs); -+ val &= abb->common->sr2en_mask; -+ if (val) -+ abb->enabled = true; -+ else -+ omap_abb_enable(voltdm); -+ -+ return; -+} -diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h -index 74f2044..c06c7d6 100644 ---- a/arch/arm/mach-omap2/abb.h -+++ b/arch/arm/mach-omap2/abb.h -@@ -82,4 +82,9 @@ extern struct omap_abb_instance omap36xx_abb_mpu; - extern struct omap_abb_instance omap4_abb_mpu; - extern struct omap_abb_instance omap4_abb_iva; - -+void omap_abb_init(struct voltagedomain *voltdm); -+void omap_abb_enable(struct voltagedomain *voltdm); -+void omap_abb_disble(struct voltagedomain *voltdm); -+int omap_abb_set_opp(struct voltagedomain *voltdm); -+ - #endif --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch b/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch deleted file mode 100644 index bba8410..0000000 --- a/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch +++ /dev/null @@ -1,114 +0,0 @@ -From ee2b116a1ee82ec94108035ed1ae047d69aee215 Mon Sep 17 00:00:00 2001 -From: Mike Turquette <mturquette@ti.com> -Date: Thu, 21 Jul 2011 12:36:37 +0200 -Subject: [PATCH 8/8] OMAP3+: Voltage: add ABB to voltage scaling - -Adaptive Body-Bias ldo state should be transitioned (if necessary) after -a voltage scaling sequence completes via vc_bypass or vp_forceupdate -methods. - -This patch initializes the ABB ldo's as a part of the greater voltage -initialization function and adds the ABB transition routine to both the -vc_bypass and vp_forceupdate sequences. - -Signed-off-by: Mike Turquette <mturquette@ti.com> ---- - arch/arm/mach-omap2/vc.c | 10 ++++++++-- - arch/arm/mach-omap2/voltage.c | 4 ++++ - arch/arm/mach-omap2/vp.c | 9 +++++++-- - 3 files changed, 19 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 16fa912..c5d8550 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -6,6 +6,7 @@ - - #include "voltage.h" - #include "vc.h" -+#include "abb.h" - #include "prm-regbits-34xx.h" - #include "prm-regbits-44xx.h" - #include "prm44xx.h" -@@ -153,7 +154,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, - u32 loop_cnt = 0, retries_cnt = 0; - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; - u8 target_vsel, current_vsel; -- int ret; -+ int ret = 0; - - ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); - if (ret) -@@ -191,7 +192,12 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, - } - - omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); -- return 0; -+ -+ /* transition Adaptive Body-Bias ldo */ -+ if (voltdm->abb) -+ ret = omap_abb_set_opp(voltdm); -+ -+ return ret; - } - - static void __init omap3_vfsm_init(struct voltagedomain *voltdm) -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index cebc8b1..25f8604 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -40,6 +40,7 @@ - - #include "vc.h" - #include "vp.h" -+#include "abb.h" - - static LIST_HEAD(voltdm_list); - -@@ -279,6 +280,9 @@ int __init omap_voltage_late_init(void) - voltdm->scale = omap_vp_forceupdate_scale; - omap_vp_init(voltdm); - } -+ -+ if (voltdm->abb) -+ omap_abb_init(voltdm); - } - - return 0; -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index 66bd700..886be89 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -5,6 +5,7 @@ - - #include "voltage.h" - #include "vp.h" -+#include "abb.h" - #include "prm-regbits-34xx.h" - #include "prm-regbits-44xx.h" - #include "prm44xx.h" -@@ -116,7 +117,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - struct omap_vp_instance *vp = voltdm->vp; - u32 vpconfig; - u8 target_vsel, current_vsel; -- int ret, timeout = 0; -+ int ret = 0, timeout = 0; - - ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); - if (ret) -@@ -178,7 +179,11 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - /* Clear force bit */ - voltdm->write(vpconfig, vp->vpconfig); - -- return 0; -+ /* transition Adaptive Body-Bias LDO */ -+ if (voltdm->abb) -+ ret = omap_abb_set_opp(voltdm); -+ -+ return ret; - } - - /** --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-3.0/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch b/recipes-kernel/linux/linux-3.0/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch deleted file mode 100644 index 35b9abb..0000000 --- a/recipes-kernel/linux/linux-3.0/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 174f636d95d1f6aa6fc6ba3e81282fb49b0feecd Mon Sep 17 00:00:00 2001 -From: Keerthy <j-keerthy@ti.com> -Date: Wed, 4 May 2011 01:14:50 +0530 -Subject: [PATCH 1/2] Enabling Hwmon driver for twl4030-madc - -Signed-off-by: Keerthy <j-keerthy@ti.com> ---- - drivers/mfd/twl-core.c | 15 +++++++++++++++ - 1 files changed, 15 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c -index f82413a..e39dbed 100644 ---- a/drivers/mfd/twl-core.c -+++ b/drivers/mfd/twl-core.c -@@ -83,6 +83,13 @@ - #define twl_has_madc() false - #endif - -+#if defined(CONFIG_SENSORS_TWL4030_MADC) ||\ -+ defined(CONFIG_SENSORS_TWL4030_MADC_MODULE) -+#define twl_has_madc_hwmon() true -+#else -+#define twl_has_madc_hwmon() false -+#endif -+ - #ifdef CONFIG_TWL4030_POWER - #define twl_has_power() true - #else -@@ -669,6 +676,14 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features) - return PTR_ERR(child); - } - -+if (twl_has_madc_hwmon()) { -+ child = add_child(2, "twl4030_madc_hwmon", -+ NULL, 0, -+ true, pdata->irq_base + MADC_INTR_OFFSET, 0); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ } -+ - if (twl_has_rtc()) { - /* - * REVISIT platform_data here currently might expose the --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core-enable-madc-clock.patch b/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core-enable-madc-clock.patch deleted file mode 100644 index 015ab6d..0000000 --- a/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core-enable-madc-clock.patch +++ /dev/null @@ -1,54 +0,0 @@ -From f4aed769e9e59998f44447e7309e192573e6fac6 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Sat, 23 Jan 2010 06:26:54 -0800 -Subject: [PATCH 2/2] mfd: twl-core: enable madc clock - -Now that the madc driver has been merged it is also necessary to enable the clock to the madc block - -Signed-off-by: Steve Sakoman <steve@sakoman.com> ---- - drivers/mfd/twl-core.c | 8 ++++++++ - include/linux/i2c/twl.h | 1 + - 2 files changed, 9 insertions(+), 0 deletions(-) - -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c -index e39dbed..018ee53 100644 ---- a/drivers/mfd/twl-core.c -+++ b/drivers/mfd/twl-core.c -@@ -217,6 +217,11 @@ - - /* Few power values */ - #define R_CFG_BOOT 0x05 -+#define R_GPBR1 0x0C -+ -+/* MADC clock values for R_GPBR1 */ -+#define MADC_HFCLK_EN 0x80 -+#define DEFAULT_MADC_CLK_EN 0x10 - - /* some fields in R_CFG_BOOT */ - #define HFCLK_FREQ_19p2_MHZ (1 << 0) -@@ -1152,6 +1157,9 @@ static void clocks_init(struct device *dev, - - e |= unprotect_pm_master(); - /* effect->MADC+USB ck en */ -+ if (twl_has_madc()) -+ e |= twl_i2c_write_u8(TWL_MODULE_INTBR, -+ MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, R_GPBR1); - e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); - e |= protect_pm_master(); - -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h -index ba4f886..6802efc 100644 ---- a/include/linux/i2c/twl.h -+++ b/include/linux/i2c/twl.h -@@ -74,6 +74,7 @@ - - #define TWL_MODULE_USB TWL4030_MODULE_USB - #define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE -+#define TWL_MODULE_INTBR TWL4030_MODULE_INTBR - #define TWL_MODULE_PIH TWL4030_MODULE_PIH - #define TWL_MODULE_MADC TWL4030_MODULE_MADC - #define TWL_MODULE_MAIN_CHARGE TWL4030_MODULE_MAIN_CHARGE --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/misc/0001-compiler.h-Undef-before-redefining-__attribute_const.patch b/recipes-kernel/linux/linux-3.0/misc/0001-compiler.h-Undef-before-redefining-__attribute_const.patch deleted file mode 100644 index bf2f6e7..0000000 --- a/recipes-kernel/linux/linux-3.0/misc/0001-compiler.h-Undef-before-redefining-__attribute_const.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 6f92ab6de9d8daeb575949bbbcbc7bcdcebc60af Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Thu, 5 Jan 2012 11:42:35 -0800 -Subject: [PATCH] compiler.h: Undef before redefining __attribute_const__ - -This is required to avoid warnings like -util/include/linux/compiler.h:8:0: error: "__attribute_const__" redefined [-Werror] - -Signed-off-by: Khem Raj <raj.khem@gmail.com> - -Upstream-Status: Pending - ---- - tools/perf/util/include/linux/compiler.h | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - ---- a/tools/perf/util/include/linux/compiler.h -+++ b/tools/perf/util/include/linux/compiler.h -@@ -4,9 +4,11 @@ - #ifndef __always_inline - #define __always_inline inline - #endif -+#undef __user - #define __user -+#undef __attribute_const__ - #define __attribute_const__ -- -+#undef __used - #define __used __attribute__((__unused__)) - - #endif diff --git a/recipes-kernel/linux/linux-3.0/misc/0002-OMAP2-OPP-allow-OPP-enumeration-to-continue-if-devic.patch b/recipes-kernel/linux/linux-3.0/misc/0002-OMAP2-OPP-allow-OPP-enumeration-to-continue-if-devic.patch deleted file mode 100644 index 7019381..0000000 --- a/recipes-kernel/linux/linux-3.0/misc/0002-OMAP2-OPP-allow-OPP-enumeration-to-continue-if-devic.patch +++ /dev/null @@ -1,43 +0,0 @@ -From c15f217f7d07c460763a092f31f61b1975a18563 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Fri, 16 Mar 2012 11:19:09 -0500 -Subject: [PATCH 2/2] OMAP2+: OPP: allow OPP enumeration to continue if device is not present - -On platforms such as OMAP3, certain variants may not have IVA, SGX -or some specific component. We currently have a check to aid fixing -wrong population of OPP entries for issues such as typos. This however -causes a conflict with valid requirement where the SoC variant does -not actually have the module present. - -So, reduce the severity of the print to a debug statement and skip -registering that specific OPP, but continue down the list. - -Reported-by: Steve Sakoman <steve@sakoman.com> -Reported-by: Maximilian Schwerin <mvs@tigris.de> -Acked-by: Steve Sakoman <steve@sakoman.com> -Tested-by: Maximilian Schwerin <mvs@tigris.de> -Signed-off-by: Nishanth Menon <nm@ti.com> ---- - arch/arm/mach-omap2/opp.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c -index ab8b35b..f111b82 100644 ---- a/arch/arm/mach-omap2/opp.c -+++ b/arch/arm/mach-omap2/opp.c -@@ -64,10 +64,10 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, - } - oh = omap_hwmod_lookup(opp_def->hwmod_name); - if (!oh || !oh->od) { -- pr_warn("%s: no hwmod or odev for %s, [%d] " -+ pr_debug("%s: no hwmod or odev for %s, [%d] " - "cannot add OPPs.\n", __func__, - opp_def->hwmod_name, i); -- return -EINVAL; -+ continue; - } - dev = &oh->od->pdev.dev; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3-4.patch b/recipes-kernel/linux/linux-3.0/omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3-4.patch deleted file mode 100644 index 695301b..0000000 --- a/recipes-kernel/linux/linux-3.0/omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3-4.patch +++ /dev/null @@ -1,129 +0,0 @@ -From 44ab86140417f173835e19bed62d6832023f2914 Mon Sep 17 00:00:00 2001 -From: Peter Ujfalusi <peter.ujfalusi@ti.com> -Date: Wed, 17 Aug 2011 16:02:55 +0200 -Subject: [PATCH] OMAP: Fix linking error in twl-common.c for OMAP2/3/4 only builds - -Commit b22f954 (OMAP4: Move common twl6030 configuration to twl-common) -caused compile failures for code for OMAP arch which is not selected by -the config. - -Fixes issues like: -With CONFIG_ARCH_OMAP3=y and CONFIG_ARCH_OMAP4=n, I'm getting this: - -arch/arm/mach-omap2/built-in.o:(.data+0xf99c): undefined reference to `omap4430_phy_init' -arch/arm/mach-omap2/built-in.o:(.data+0xf9a0): undefined reference to `omap4430_phy_exit' -arch/arm/mach-omap2/built-in.o:(.data+0xf9a4): undefined reference to `omap4430_phy_power' -arch/arm/mach-omap2/built-in.o:(.data+0xf9a8): undefined reference to `omap4430_phy_set_clk' -arch/arm/mach-omap2/built-in.o:(.data+0xf9ac): undefined reference to `omap4430_phy_suspend' - -Fix the problem by moving the code to ifdef sections for omap3 and omap4. - -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> -[tony@atomide.com: updated comments] -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/twl-common.c | 77 ++++++++++++++++++++------------------ - 1 files changed, 41 insertions(+), 36 deletions(-) - -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c -index 3aaa46f..58409c0 100644 ---- a/arch/arm/mach-omap2/twl-common.c -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -48,14 +48,7 @@ void __init omap_pmic_init(int bus, u32 clkrate, - omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); - } - --static struct twl4030_usb_data omap4_usb_pdata = { -- .phy_init = omap4430_phy_init, -- .phy_exit = omap4430_phy_exit, -- .phy_power = omap4430_phy_power, -- .phy_set_clock = omap4430_phy_set_clk, -- .phy_suspend = omap4430_phy_suspend, --}; -- -+#if defined(CONFIG_ARCH_OMAP3) - static struct twl4030_usb_data omap3_usb_pdata = { - .usb_mode = T2_USB_MODE_ULPI, - }; -@@ -122,6 +115,45 @@ static struct regulator_init_data omap3_vpll2_idata = { - .consumer_supplies = omap3_vpll2_supplies, - }; - -+void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, -+ u32 pdata_flags, u32 regulators_flags) -+{ -+ if (!pmic_data->irq_base) -+ pmic_data->irq_base = TWL4030_IRQ_BASE; -+ if (!pmic_data->irq_end) -+ pmic_data->irq_end = TWL4030_IRQ_END; -+ -+ /* Common platform data configurations */ -+ if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) -+ pmic_data->usb = &omap3_usb_pdata; -+ -+ if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) -+ pmic_data->bci = &omap3_bci_pdata; -+ -+ if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) -+ pmic_data->madc = &omap3_madc_pdata; -+ -+ if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) -+ pmic_data->codec = &omap3_codec_pdata; -+ -+ /* Common regulator configurations */ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) -+ pmic_data->vdac = &omap3_vdac_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) -+ pmic_data->vpll2 = &omap3_vpll2_idata; -+} -+#endif /* CONFIG_ARCH_OMAP3 */ -+ -+#if defined(CONFIG_ARCH_OMAP4) -+static struct twl4030_usb_data omap4_usb_pdata = { -+ .phy_init = omap4430_phy_init, -+ .phy_exit = omap4430_phy_exit, -+ .phy_power = omap4430_phy_power, -+ .phy_set_clock = omap4430_phy_set_clk, -+ .phy_suspend = omap4430_phy_suspend, -+}; -+ - static struct regulator_init_data omap4_vdac_idata = { - .constraints = { - .min_uV = 1800000, -@@ -274,31 +306,4 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, - pmic_data->clk32kg = &omap4_clk32kg_idata; - } - --void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, -- u32 pdata_flags, u32 regulators_flags) --{ -- if (!pmic_data->irq_base) -- pmic_data->irq_base = TWL4030_IRQ_BASE; -- if (!pmic_data->irq_end) -- pmic_data->irq_end = TWL4030_IRQ_END; -- -- /* Common platform data configurations */ -- if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) -- pmic_data->usb = &omap3_usb_pdata; -- -- if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) -- pmic_data->bci = &omap3_bci_pdata; -- -- if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) -- pmic_data->madc = &omap3_madc_pdata; -- -- if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) -- pmic_data->codec = &omap3_codec_pdata; -- -- /* Common regulator configurations */ -- if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) -- pmic_data->vdac = &omap3_vdac_idata; -- -- if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) -- pmic_data->vpll2 = &omap3_vpll2_idata; --} -+#endif /* CONFIG_ARCH_OMAP4 */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/patch.sh b/recipes-kernel/linux/linux-3.0/patch.sh deleted file mode 100755 index 31bdfe1..0000000 --- a/recipes-kernel/linux/linux-3.0/patch.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/bash -# (c) 2009 - 2012 Koen Kooi <koen@dominion.thruhere.net> -# This script will take a set of directories with patches and make a git tree out of it -# After all the patches are applied it will output a SRC_URI fragment you can copy/paste into a recipe -set -e - -TAG="v3.0.17" -EXTRATAG="" -PATCHPATH=$(dirname $0) - -git am --abort || echo "Do you need to make sure the patches apply cleanly first?" -git reset --hard ${TAG} -rm export -rf - -previous=${TAG} -PATCHSET="pm-wip/voltdm pm-wip/cpufreq beagle madc sakoman sgx ulcd omap4 misc usb" - -# apply patches -for patchset in ${PATCHSET} ; do - git am $PATCHPATH/$patchset/* - git tag "${TAG}-${patchset}${EXTRATAG}" -f -done - -# export patches and output SRC_URI for them -for patchset in ${PATCHSET} ; do - mkdir export/$patchset -p - ( cd export/$patchset && git format-patch ${previous}..${TAG}-${patchset}${EXTRATAG} >& /dev/null && for i in *.patch ; do echo " file://${patchset}/$i \\" ; done ) - previous=${TAG}-${patchset}${EXTRATAG} -done diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq-table.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq-table.patch deleted file mode 100644 index 5b28c5f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq-table.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 3dfeff8f9ad8fa7e6e434eb4b450a11ab79131da Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 25 May 2011 00:43:26 -0700 -Subject: [PATCH 01/19] PM: OPP: introduce function to free cpufreq table - -cpufreq table allocated by opp_init_cpufreq_table is better -freed by OPP layer itself. This allows future modifications to -the table handling to be transparent to the users. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Acked-by: Kevin Hilman <khilman@ti.com> ---- - Documentation/power/opp.txt | 2 ++ - drivers/base/power/opp.c | 17 +++++++++++++++++ - include/linux/opp.h | 8 ++++++++ - 3 files changed, 27 insertions(+), 0 deletions(-) - -diff --git a/Documentation/power/opp.txt b/Documentation/power/opp.txt -index 5ae70a12..3035d00 100644 ---- a/Documentation/power/opp.txt -+++ b/Documentation/power/opp.txt -@@ -321,6 +321,8 @@ opp_init_cpufreq_table - cpufreq framework typically is initialized with - addition to CONFIG_PM as power management feature is required to - dynamically scale voltage and frequency in a system. - -+opp_free_cpufreq_table - Free up the table allocated by opp_init_cpufreq_table -+ - 7. Data Structures - ================== - Typically an SoC contains multiple voltage domains which are variable. Each -diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c -index 56a6899..5cc1232 100644 ---- a/drivers/base/power/opp.c -+++ b/drivers/base/power/opp.c -@@ -625,4 +625,21 @@ int opp_init_cpufreq_table(struct device *dev, - - return 0; - } -+ -+/** -+ * opp_free_cpufreq_table() - free the cpufreq table -+ * @dev: device for which we do this operation -+ * @table: table to free -+ * -+ * Free up the table allocated by opp_init_cpufreq_table -+ */ -+void opp_free_cpufreq_table(struct device *dev, -+ struct cpufreq_frequency_table **table) -+{ -+ if (!table) -+ return; -+ -+ kfree(*table); -+ *table = NULL; -+} - #endif /* CONFIG_CPU_FREQ */ -diff --git a/include/linux/opp.h b/include/linux/opp.h -index 5449945..7020e97 100644 ---- a/include/linux/opp.h -+++ b/include/linux/opp.h -@@ -94,12 +94,20 @@ static inline int opp_disable(struct device *dev, unsigned long freq) - #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_PM_OPP) - int opp_init_cpufreq_table(struct device *dev, - struct cpufreq_frequency_table **table); -+void opp_free_cpufreq_table(struct device *dev, -+ struct cpufreq_frequency_table **table); - #else - static inline int opp_init_cpufreq_table(struct device *dev, - struct cpufreq_frequency_table **table) - { - return -EINVAL; - } -+ -+static inline -+void opp_free_cpufreq_table(struct device *dev, -+ struct cpufreq_frequency_table **table) -+{ -+} - #endif /* CONFIG_CPU_FREQ */ - - #endif /* __LINUX_OPP_H__ */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch deleted file mode 100644 index f5fd155..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch +++ /dev/null @@ -1,28 +0,0 @@ -From bc2810462308f15ff90841453961200bf90a814d Mon Sep 17 00:00:00 2001 -From: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> -Date: Wed, 11 Aug 2010 17:02:43 -0700 -Subject: [PATCH 02/19] OMAP: CPUfreq: ensure driver initializes after cpufreq framework and governors - -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/plat-omap/cpu-omap.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index da4f68d..cd09d4b 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -160,7 +160,7 @@ static int __init omap_cpufreq_init(void) - return cpufreq_register_driver(&omap_driver); - } - --arch_initcall(omap_cpufreq_init); -+late_initcall(omap_cpufreq_init); - - /* - * if ever we want to remove this, upon cleanup call: --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch deleted file mode 100644 index 4805b2a..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch +++ /dev/null @@ -1,32 +0,0 @@ -From be4be1a11360222f0b0add1dadfeaf76af199990 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@deeprootsystems.com> -Date: Wed, 11 Aug 2010 17:05:38 -0700 -Subject: [PATCH 03/19] OMAP: CPUfreq: ensure policy is fully initialized - -Ensure policy min/max/cur values are initialized when OMAP -CPUfreq driver starts. - -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/plat-omap/cpu-omap.c | 4 ++++ - 1 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index cd09d4b..1b36664 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -126,6 +126,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - VERY_HI_RATE) / 1000; - } - -+ policy->min = policy->cpuinfo.min_freq; -+ policy->max = policy->cpuinfo.max_freq; -+ policy->cur = omap_getspeed(0); -+ - /* FIXME: what's the actual transition time? */ - policy->cpuinfo.transition_latency = 300 * 1000; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch deleted file mode 100644 index 1ec4593..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch +++ /dev/null @@ -1,264 +0,0 @@ -From fcd436dfb1c2d8e4866001700a5bba2a1d4079aa Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Mon, 10 Nov 2008 17:00:25 +0530 -Subject: [PATCH 04/19] OMAP3 PM: CPUFreq driver for OMAP3 - -CPUFreq driver for OMAP3 - -With additional fixes and cleanups from Tero Kristo: -- Fix rate calculation bug in omap3_select_table_rate -- Refreshed DVFS VDD1 control against latest clock fw - -Signed-off-by: Tero Kristo <tero.kristo@nokia.com> -Signed-off-by: Rajendra Nayak <rnayak@ti.com> - -OMAP3: PM: CPUFreq: Fix omap_getspeed. - -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> - -Make sure omap cpufreq driver initializes after cpufreq framework and governors - -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> - -merge: CPUFreq: remove obsolete funcs - -OMAP3 clock: Update cpufreq driver - -This patch removes all refrences to virtual clock -nodes in CPUFreq driver. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Tero Kristo <tero.kristo@nokia.com> -Signed-off-by: Jean Pihet <jpihet@mvista.com> - -PM: Prevent direct cpufreq scaling during initialization - -It is seen that the OMAP specific cpufreq initialization code tries to -scale the MPU frequency to the highest possible without taking care of -the voltage level. On power on reset the power IC does not provide the -necessary voltage for the highest available MPU frequency (that would -satisfy all Si families). This potentially is an window of opportunity -for things to go wrong. - -Signed-off-by: Romit Dasgupta <romit@ti.com> -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> - -OMAP3: PM: enable 600MHz (overdrive) OPP - -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> - -omap3: introduce cpufreq - -OMAP OPP layer functions now have dependencies of CONFIG_CPU_FREQ only. - -With this patch, omap opp layer now has its compilation flags -bound to CONFIG_CPU_FREQ. Also its code has been removed from pm34xx.c. - -A new file has been created to contain cpu freq code related to -OMAP3: cpufreq34xx.c - -OMAP34xx and OMAP36xx family OPPs are made available - -Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> -Signed-off-by: Romit Dasgupta <romit@ti.com> -Signed-off-by: Rajendra Nayak <rnayak@ti.com> - -omap3: cpufreq: allow default opp table init - -For board files which choose to override the defaults, the existing -mechanism will work, for boards that would like to work with defaults, -allow init_common_hw to call init_opp_table to initialize if not -already initialized. this will allow all omap boards which have opp -tables predefined for a silicon to use the same. - -Originally reported for overo: -http://marc.info/?t=127265269400004&r=1&w=2 - -Signed-off-by: Nishanth Menon <nm@ti.com> -Reported-by: Peter Tseng <tsenpet09@gmail.com> -Cc: Cliff Brake <cliff.brake@gmail.com> -Cc: Kevin Hilman <khilman@deeprootsystems.com> - -OMAP2: update OPP data to be device based - -Cc: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> - -OMAP3: CPUfreq: update to device-based OPP API - -Update usage of OPP API to use new device-based API. This requires -getting the 'struct device' for the MPU and using that with the OPP -API. - -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> - -omap3: opp: make independent of cpufreq - -Make opp3xx data which is registered with the opp layer -dependent purely on CONFIG_PM as opp layer and pm.c users -are CONFIG_PM dependent not cpufreq dependent. -so we rename the data definition to opp3xxx_data.c (inline with what -we have for omap2), also move the build definition to be under -the existing CONFIG_PM build instead of CPUFREQ. - -Cc: Eduardo Valentin <eduardo.valentin@nokia.com> -Cc: Kevin Hilman <khilman@deeprootsystems.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Cc: Sanjeev Premi <premi@ti.com> -Cc: Thara Gopinath <thara@ti.com> -Cc: Tony Lindgren <tony@atomide.com> - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/clock.h | 14 +++++++++++++- - arch/arm/mach-omap2/clock34xx.c | 2 ++ - arch/arm/plat-omap/cpu-omap.c | 34 +++++++++++++++++++++++++++++++--- - 3 files changed, 46 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h -index 48ac568..8bad1c6 100644 ---- a/arch/arm/mach-omap2/clock.h -+++ b/arch/arm/mach-omap2/clock.h -@@ -144,7 +144,9 @@ extern const struct clksel_rate gpt_sys_rates[]; - extern const struct clksel_rate gfx_l3_rates[]; - extern const struct clksel_rate dsp_ick_rates[]; - --#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) -+#ifdef CONFIG_CPU_FREQ -+ -+#ifdef CONFIG_ARCH_OMAP2 - extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); - extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); - #else -@@ -152,6 +154,16 @@ extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) - #define omap2_clk_exit_cpufreq_table 0 - #endif - -+#ifdef CONFIG_ARCH_OMAP3 -+extern void omap3_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); -+extern void omap3_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); -+#else -+#define omap3_clk_init_cpufreq_table 0 -+#define omap3_clk_exit_cpufreq_table 0 -+#endif -+ -+#endif /* CONFIG_CPU_FREQ */ -+ - extern const struct clkops clkops_omap2_iclk_dflt_wait; - extern const struct clkops clkops_omap2_iclk_dflt; - extern const struct clkops clkops_omap2_iclk_idle_only; -diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c -index 1fc96b9..119e135 100644 ---- a/arch/arm/mach-omap2/clock34xx.c -+++ b/arch/arm/mach-omap2/clock34xx.c -@@ -20,6 +20,8 @@ - #include <linux/kernel.h> - #include <linux/clk.h> - #include <linux/io.h> -+#include <linux/err.h> -+#include <linux/cpufreq.h> - - #include <plat/clock.h> - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index 1b36664..f0f9430 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -8,6 +8,10 @@ - * - * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King - * -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. -+ * Updated to support OMAP3 -+ * Rajendra Nayak <rnayak@ti.com> -+ * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -@@ -26,12 +30,19 @@ - #include <plat/clock.h> - #include <asm/system.h> - -+#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -+#include <plat/omap-pm.h> -+#include <plat/opp.h> -+#endif -+ - #define VERY_HI_RATE 900000000 - - static struct cpufreq_frequency_table *freq_table; - - #ifdef CONFIG_ARCH_OMAP1 - #define MPU_CLK "mpu" -+#elif CONFIG_ARCH_OMAP3 -+#define MPU_CLK "arm_fck" - #else - #define MPU_CLK "virt_prcm_set" - #endif -@@ -73,7 +84,13 @@ static int omap_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) - { -+#ifdef CONFIG_ARCH_OMAP1 - struct cpufreq_freqs freqs; -+#endif -+#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -+ unsigned long freq; -+ struct device *mpu_dev = omap2_get_mpuss_device(); -+#endif - int ret = 0; - - /* Ensure desired rate is within allowed range. Some govenors -@@ -83,13 +100,13 @@ static int omap_target(struct cpufreq_policy *policy, - if (target_freq > policy->max) - target_freq = policy->max; - -+#ifdef CONFIG_ARCH_OMAP1 - freqs.old = omap_getspeed(0); - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; - freqs.cpu = 0; - - if (freqs.old == freqs.new) - return ret; -- - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); - #ifdef CONFIG_CPU_FREQ_DEBUG - printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", -@@ -97,7 +114,11 @@ static int omap_target(struct cpufreq_policy *policy, - #endif - ret = clk_set_rate(mpu_clk, freqs.new * 1000); - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -- -+#elif defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -+ freq = target_freq * 1000; -+ if (opp_find_freq_ceil(mpu_dev, &freq)) -+ omap_pm_cpu_set_freq(freq); -+#endif - return ret; - } - -@@ -114,7 +135,14 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - - policy->cur = policy->min = policy->max = omap_getspeed(0); - -- clk_init_cpufreq_table(&freq_table); -+ if (!cpu_is_omap34xx()) { -+ clk_init_cpufreq_table(&freq_table); -+ } else { -+ struct device *mpu_dev = omap2_get_mpuss_device(); -+ -+ opp_init_cpufreq_table(mpu_dev, &freq_table); -+ } -+ - if (freq_table) { - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); - if (!result) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch deleted file mode 100644 index 5527356..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 62275cbaac608a17fe5ff0437e0950667927e5e8 Mon Sep 17 00:00:00 2001 -From: Silesh C V <silesh@ti.com> -Date: Wed, 29 Sep 2010 14:52:54 +0530 -Subject: [PATCH 05/19] OMAP: PM: CPUFREQ: Fix conditional compilation - -Fix conditional compilation. A conditional expresiion -should follow "#elif", in this case #elif clause should -check whether CONFIG_ARCH_OMAP3 is defined or not -(ie. defined(CONFIG_ARCH_OMAP3)) rather than checking for -the value of the macro. - -Signed-off-by: Silesh C V <silesh@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/plat-omap/cpu-omap.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index f0f9430..c3ac065 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -41,7 +41,7 @@ static struct cpufreq_frequency_table *freq_table; - - #ifdef CONFIG_ARCH_OMAP1 - #define MPU_CLK "mpu" --#elif CONFIG_ARCH_OMAP3 -+#elif defined(CONFIG_ARCH_OMAP3) - #define MPU_CLK "arm_fck" - #else - #define MPU_CLK "virt_prcm_set" --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch deleted file mode 100644 index 3d8d572..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch +++ /dev/null @@ -1,34 +0,0 @@ -From ca2d4d46267668daccc156084f8ad6e74a52f392 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@deeprootsystems.com> -Date: Tue, 16 Nov 2010 11:48:41 -0800 -Subject: [PATCH 06/19] cpufreq: fixup after new OPP layer merged - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/plat-omap/cpu-omap.c | 3 ++- - 1 files changed, 2 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -index c3ac065..9cd2709 100644 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ b/arch/arm/plat-omap/cpu-omap.c -@@ -25,6 +25,7 @@ - #include <linux/err.h> - #include <linux/clk.h> - #include <linux/io.h> -+#include <linux/opp.h> - - #include <mach/hardware.h> - #include <plat/clock.h> -@@ -32,7 +33,7 @@ - - #if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) - #include <plat/omap-pm.h> --#include <plat/opp.h> -+#include <plat/common.h> - #endif - - #define VERY_HI_RATE 900000000 --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch deleted file mode 100644 index 25a9de9..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch +++ /dev/null @@ -1,673 +0,0 @@ -From 972aa97a8a36946ebe2274e27c317e524de2cd5c Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar <santosh.shilimkar@ti.com> -Date: Mon, 14 Mar 2011 17:08:48 +0530 -Subject: [PATCH 07/19] OMAP: cpufreq: Split OMAP1 and OMAP2PLUS CPUfreq drivers. - -This patch is an attempt to cleanup the #ifdeferry in the -omap CPUfreq drivers. - -The split betwenn OMAP1 and OMAP2PLUS is logical because - - OMAP1 doesn't support opp layer. - - OMAP1 build is seperate from omap2plus. - -Includes minor header/copyright updates reported by Todd Poynor. - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Cc: Kevin Hilman <khilman@ti.com> -Cc: Vishwanath BS <vishwanath.bs@ti.com> -Cc: Todd Poynor <toddpoynor@google.com> -Cc: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap1/Makefile | 3 + - arch/arm/mach-omap1/omap1-cpufreq.c | 175 ++++++++++++++++++++++++++ - arch/arm/mach-omap2/Makefile | 3 + - arch/arm/mach-omap2/omap2plus-cpufreq.c | 201 ++++++++++++++++++++++++++++++ - arch/arm/plat-omap/Makefile | 1 - - arch/arm/plat-omap/cpu-omap.c | 204 ------------------------------- - 6 files changed, 382 insertions(+), 205 deletions(-) - create mode 100644 arch/arm/mach-omap1/omap1-cpufreq.c - create mode 100644 arch/arm/mach-omap2/omap2plus-cpufreq.c - delete mode 100644 arch/arm/plat-omap/cpu-omap.c - -diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile -index 5b114d1..9600410 100644 ---- a/arch/arm/mach-omap1/Makefile -+++ b/arch/arm/mach-omap1/Makefile -@@ -10,6 +10,9 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o - - obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o - -+# CPUFREQ driver -+obj-$(CONFIG_CPU_FREQ) += omap1-cpufreq.o -+ - # Power Management - obj-$(CONFIG_PM) += pm.o sleep.o - -diff --git a/arch/arm/mach-omap1/omap1-cpufreq.c b/arch/arm/mach-omap1/omap1-cpufreq.c -new file mode 100644 -index 0000000..7c5216e ---- /dev/null -+++ b/arch/arm/mach-omap1/omap1-cpufreq.c -@@ -0,0 +1,175 @@ -+/* -+ * OMAP1 cpufreq driver -+ * -+ * CPU frequency scaling for OMAP -+ * -+ * Copyright (C) 2005 Nokia Corporation -+ * Written by Tony Lindgren <tony@atomide.com> -+ * -+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King -+ * -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. -+ * Rajendra Nayak <rnayak@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/types.h> -+#include <linux/kernel.h> -+#include <linux/sched.h> -+#include <linux/cpufreq.h> -+#include <linux/delay.h> -+#include <linux/init.h> -+#include <linux/err.h> -+#include <linux/clk.h> -+#include <linux/io.h> -+#include <linux/opp.h> -+ -+#include <asm/system.h> -+ -+#include <plat/clock.h> -+#include <plat/omap-pm.h> -+ -+#include <mach/hardware.h> -+ -+#define VERY_HI_RATE 900000000 -+ -+static struct cpufreq_frequency_table *freq_table; -+static struct clk *mpu_clk; -+ -+static int omap_verify_speed(struct cpufreq_policy *policy) -+{ -+ if (freq_table) -+ return cpufreq_frequency_table_verify(policy, freq_table); -+ -+ if (policy->cpu) -+ return -EINVAL; -+ -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ -+ policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; -+ policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ return 0; -+} -+ -+static unsigned int omap_getspeed(unsigned int cpu) -+{ -+ unsigned long rate; -+ -+ if (cpu) -+ return 0; -+ -+ rate = clk_get_rate(mpu_clk) / 1000; -+ return rate; -+} -+ -+static int omap_target(struct cpufreq_policy *policy, -+ unsigned int target_freq, -+ unsigned int relation) -+{ -+ struct cpufreq_freqs freqs; -+ int ret = 0; -+ -+ /* Ensure desired rate is within allowed range. Some govenors -+ * (ondemand) will just pass target_freq=0 to get the minimum. */ -+ if (target_freq < policy->min) -+ target_freq = policy->min; -+ if (target_freq > policy->max) -+ target_freq = policy->max; -+ -+ freqs.old = omap_getspeed(0); -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -+ freqs.cpu = 0; -+ -+ if (freqs.old == freqs.new) -+ return ret; -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ -+#ifdef CONFIG_CPU_FREQ_DEBUG -+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); -+#endif -+ ret = clk_set_rate(mpu_clk, freqs.new * 1000); -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ -+ return ret; -+} -+ -+static int __init omap_cpu_init(struct cpufreq_policy *policy) -+{ -+ int result = 0; -+ -+ mpu_clk = clk_get(NULL, "mpu"); -+ if (IS_ERR(mpu_clk)) -+ return PTR_ERR(mpu_clk); -+ -+ if (policy->cpu != 0) -+ return -EINVAL; -+ -+ policy->cur = policy->min = policy->max = omap_getspeed(0); -+ -+ clk_init_cpufreq_table(&freq_table); -+ -+ if (freq_table) { -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -+ if (!result) -+ cpufreq_frequency_table_get_attr(freq_table, -+ policy->cpu); -+ } else { -+ policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; -+ policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, -+ VERY_HI_RATE) / 1000; -+ } -+ -+ policy->min = policy->cpuinfo.min_freq; -+ policy->max = policy->cpuinfo.max_freq; -+ policy->cur = omap_getspeed(0); -+ -+ /* FIXME: what's the actual transition time? */ -+ policy->cpuinfo.transition_latency = 300 * 1000; -+ -+ return 0; -+} -+ -+static int omap_cpu_exit(struct cpufreq_policy *policy) -+{ -+ clk_exit_cpufreq_table(&freq_table); -+ clk_put(mpu_clk); -+ return 0; -+} -+ -+static struct freq_attr *omap_cpufreq_attr[] = { -+ &cpufreq_freq_attr_scaling_available_freqs, -+ NULL, -+}; -+ -+static struct cpufreq_driver omap_driver = { -+ .flags = CPUFREQ_STICKY, -+ .verify = omap_verify_speed, -+ .target = omap_target, -+ .get = omap_getspeed, -+ .init = omap_cpu_init, -+ .exit = omap_cpu_exit, -+ .name = "omap1", -+ .attr = omap_cpufreq_attr, -+}; -+ -+static int __init omap_cpufreq_init(void) -+{ -+ return cpufreq_register_driver(&omap_driver); -+} -+ -+static void __exit omap_cpufreq_exit(void) -+{ -+ cpufreq_unregister_driver(&omap_driver); -+} -+ -+MODULE_DESCRIPTION("cpufreq driver for OMAP1 SOCs"); -+MODULE_LICENSE("GPL"); -+module_init(omap_cpufreq_init); -+module_exit(omap_cpufreq_exit); -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index 8e79ca5..7927dd6 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -56,6 +56,9 @@ obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o - obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o - endif - -+# CPUFREQ driver -+obj-$(CONFIG_CPU_FREQ) += omap2plus-cpufreq.o -+ - # Power Management - ifeq ($(CONFIG_PM),y) - obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -new file mode 100644 -index 0000000..27f641b ---- /dev/null -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -0,0 +1,201 @@ -+/* -+ * OMAP2PLUS cpufreq driver -+ * -+ * CPU frequency scaling for OMAP -+ * -+ * Copyright (C) 2005 Nokia Corporation -+ * Written by Tony Lindgren <tony@atomide.com> -+ * -+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King -+ * -+ * Copyright (C) 2007-2011 Texas Instruments, Inc. -+ * Updated to support OMAP3 -+ * Rajendra Nayak <rnayak@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/types.h> -+#include <linux/kernel.h> -+#include <linux/sched.h> -+#include <linux/cpufreq.h> -+#include <linux/delay.h> -+#include <linux/init.h> -+#include <linux/err.h> -+#include <linux/clk.h> -+#include <linux/io.h> -+#include <linux/opp.h> -+ -+#include <asm/system.h> -+#include <asm/smp_plat.h> -+ -+#include <plat/clock.h> -+#include <plat/omap-pm.h> -+#include <plat/common.h> -+ -+#include <mach/hardware.h> -+ -+#define VERY_HI_RATE 900000000 -+ -+static struct cpufreq_frequency_table *freq_table; -+static struct clk *mpu_clk; -+ -+static int omap_verify_speed(struct cpufreq_policy *policy) -+{ -+ if (freq_table) -+ return cpufreq_frequency_table_verify(policy, freq_table); -+ -+ if (policy->cpu) -+ return -EINVAL; -+ -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ -+ policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; -+ policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ return 0; -+} -+ -+static unsigned int omap_getspeed(unsigned int cpu) -+{ -+ unsigned long rate; -+ -+ if (cpu) -+ return 0; -+ -+ rate = clk_get_rate(mpu_clk) / 1000; -+ return rate; -+} -+ -+static int omap_target(struct cpufreq_policy *policy, -+ unsigned int target_freq, -+ unsigned int relation) -+{ -+ int ret = 0; -+ struct cpufreq_freqs freqs; -+ -+ /* Ensure desired rate is within allowed range. Some govenors -+ * (ondemand) will just pass target_freq=0 to get the minimum. */ -+ if (target_freq < policy->min) -+ target_freq = policy->min; -+ if (target_freq > policy->max) -+ target_freq = policy->max; -+ -+ freqs.old = omap_getspeed(0); -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -+ freqs.cpu = 0; -+ -+ if (freqs.old == freqs.new) -+ return ret; -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ -+#ifdef CONFIG_CPU_FREQ_DEBUG -+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); -+#endif -+ -+ ret = clk_set_rate(mpu_clk, freqs.new * 1000); -+ -+ /* -+ * Generic CPUFREQ driver jiffy update is under !SMP. So jiffies -+ * won't get updated when UP machine cpufreq build with -+ * CONFIG_SMP enabled. Below code is added only to manage that -+ * scenario -+ */ -+ if (!is_smp()) -+ loops_per_jiffy = -+ cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ -+ return ret; -+} -+ -+static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) -+{ -+ int result = 0; -+ struct device *mpu_dev; -+ -+ if (cpu_is_omap24xx()) -+ mpu_clk = clk_get(NULL, "virt_prcm_set"); -+ else if (cpu_is_omap34xx()) -+ mpu_clk = clk_get(NULL, "dpll1_ck"); -+ else if (cpu_is_omap34xx()) -+ mpu_clk = clk_get(NULL, "dpll_mpu_ck"); -+ -+ if (IS_ERR(mpu_clk)) -+ return PTR_ERR(mpu_clk); -+ -+ if (policy->cpu != 0) -+ return -EINVAL; -+ -+ policy->cur = policy->min = policy->max = omap_getspeed(0); -+ -+ mpu_dev = omap2_get_mpuss_device(); -+ if (!mpu_dev) { -+ pr_warning("%s: unable to get the mpu device\n", __func__); -+ return -EINVAL; -+ } -+ opp_init_cpufreq_table(mpu_dev, &freq_table); -+ -+ if (freq_table) { -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -+ if (!result) -+ cpufreq_frequency_table_get_attr(freq_table, -+ policy->cpu); -+ } else { -+ policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; -+ policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, -+ VERY_HI_RATE) / 1000; -+ } -+ -+ policy->min = policy->cpuinfo.min_freq; -+ policy->max = policy->cpuinfo.max_freq; -+ policy->cur = omap_getspeed(0); -+ -+ /* FIXME: what's the actual transition time? */ -+ policy->cpuinfo.transition_latency = 300 * 1000; -+ -+ return 0; -+} -+ -+static int omap_cpu_exit(struct cpufreq_policy *policy) -+{ -+ clk_exit_cpufreq_table(&freq_table); -+ clk_put(mpu_clk); -+ return 0; -+} -+ -+static struct freq_attr *omap_cpufreq_attr[] = { -+ &cpufreq_freq_attr_scaling_available_freqs, -+ NULL, -+}; -+ -+static struct cpufreq_driver omap_driver = { -+ .flags = CPUFREQ_STICKY, -+ .verify = omap_verify_speed, -+ .target = omap_target, -+ .get = omap_getspeed, -+ .init = omap_cpu_init, -+ .exit = omap_cpu_exit, -+ .name = "omap2plus", -+ .attr = omap_cpufreq_attr, -+}; -+ -+static int __init omap_cpufreq_init(void) -+{ -+ return cpufreq_register_driver(&omap_driver); -+} -+ -+static void __exit omap_cpufreq_exit(void) -+{ -+ cpufreq_unregister_driver(&omap_driver); -+} -+ -+MODULE_DESCRIPTION("cpufreq driver for OMAP2PLUS SOCs"); -+MODULE_LICENSE("GPL"); -+module_init(omap_cpufreq_init); -+module_exit(omap_cpufreq_exit); -diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile -index f0233e6..4ef7493 100644 ---- a/arch/arm/plat-omap/Makefile -+++ b/arch/arm/plat-omap/Makefile -@@ -21,7 +21,6 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o - obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o - obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o - --obj-$(CONFIG_CPU_FREQ) += cpu-omap.o - obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o - obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o - obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c -deleted file mode 100644 -index 9cd2709..0000000 ---- a/arch/arm/plat-omap/cpu-omap.c -+++ /dev/null -@@ -1,204 +0,0 @@ --/* -- * linux/arch/arm/plat-omap/cpu-omap.c -- * -- * CPU frequency scaling for OMAP -- * -- * Copyright (C) 2005 Nokia Corporation -- * Written by Tony Lindgren <tony@atomide.com> -- * -- * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King -- * -- * Copyright (C) 2007-2008 Texas Instruments, Inc. -- * Updated to support OMAP3 -- * Rajendra Nayak <rnayak@ti.com> -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#include <linux/types.h> --#include <linux/kernel.h> --#include <linux/sched.h> --#include <linux/cpufreq.h> --#include <linux/delay.h> --#include <linux/init.h> --#include <linux/err.h> --#include <linux/clk.h> --#include <linux/io.h> --#include <linux/opp.h> -- --#include <mach/hardware.h> --#include <plat/clock.h> --#include <asm/system.h> -- --#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) --#include <plat/omap-pm.h> --#include <plat/common.h> --#endif -- --#define VERY_HI_RATE 900000000 -- --static struct cpufreq_frequency_table *freq_table; -- --#ifdef CONFIG_ARCH_OMAP1 --#define MPU_CLK "mpu" --#elif defined(CONFIG_ARCH_OMAP3) --#define MPU_CLK "arm_fck" --#else --#define MPU_CLK "virt_prcm_set" --#endif -- --static struct clk *mpu_clk; -- --/* TODO: Add support for SDRAM timing changes */ -- --static int omap_verify_speed(struct cpufreq_policy *policy) --{ -- if (freq_table) -- return cpufreq_frequency_table_verify(policy, freq_table); -- -- if (policy->cpu) -- return -EINVAL; -- -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -- policy->cpuinfo.max_freq); -- -- policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; -- policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -- policy->cpuinfo.max_freq); -- return 0; --} -- --static unsigned int omap_getspeed(unsigned int cpu) --{ -- unsigned long rate; -- -- if (cpu) -- return 0; -- -- rate = clk_get_rate(mpu_clk) / 1000; -- return rate; --} -- --static int omap_target(struct cpufreq_policy *policy, -- unsigned int target_freq, -- unsigned int relation) --{ --#ifdef CONFIG_ARCH_OMAP1 -- struct cpufreq_freqs freqs; --#endif --#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -- unsigned long freq; -- struct device *mpu_dev = omap2_get_mpuss_device(); --#endif -- int ret = 0; -- -- /* Ensure desired rate is within allowed range. Some govenors -- * (ondemand) will just pass target_freq=0 to get the minimum. */ -- if (target_freq < policy->min) -- target_freq = policy->min; -- if (target_freq > policy->max) -- target_freq = policy->max; -- --#ifdef CONFIG_ARCH_OMAP1 -- freqs.old = omap_getspeed(0); -- freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -- freqs.cpu = 0; -- -- if (freqs.old == freqs.new) -- return ret; -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); --#ifdef CONFIG_CPU_FREQ_DEBUG -- printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", -- freqs.old, freqs.new); --#endif -- ret = clk_set_rate(mpu_clk, freqs.new * 1000); -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); --#elif defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) -- freq = target_freq * 1000; -- if (opp_find_freq_ceil(mpu_dev, &freq)) -- omap_pm_cpu_set_freq(freq); --#endif -- return ret; --} -- --static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) --{ -- int result = 0; -- -- mpu_clk = clk_get(NULL, MPU_CLK); -- if (IS_ERR(mpu_clk)) -- return PTR_ERR(mpu_clk); -- -- if (policy->cpu != 0) -- return -EINVAL; -- -- policy->cur = policy->min = policy->max = omap_getspeed(0); -- -- if (!cpu_is_omap34xx()) { -- clk_init_cpufreq_table(&freq_table); -- } else { -- struct device *mpu_dev = omap2_get_mpuss_device(); -- -- opp_init_cpufreq_table(mpu_dev, &freq_table); -- } -- -- if (freq_table) { -- result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -- if (!result) -- cpufreq_frequency_table_get_attr(freq_table, -- policy->cpu); -- } else { -- policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; -- policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, -- VERY_HI_RATE) / 1000; -- } -- -- policy->min = policy->cpuinfo.min_freq; -- policy->max = policy->cpuinfo.max_freq; -- policy->cur = omap_getspeed(0); -- -- /* FIXME: what's the actual transition time? */ -- policy->cpuinfo.transition_latency = 300 * 1000; -- -- return 0; --} -- --static int omap_cpu_exit(struct cpufreq_policy *policy) --{ -- clk_exit_cpufreq_table(&freq_table); -- clk_put(mpu_clk); -- return 0; --} -- --static struct freq_attr *omap_cpufreq_attr[] = { -- &cpufreq_freq_attr_scaling_available_freqs, -- NULL, --}; -- --static struct cpufreq_driver omap_driver = { -- .flags = CPUFREQ_STICKY, -- .verify = omap_verify_speed, -- .target = omap_target, -- .get = omap_getspeed, -- .init = omap_cpu_init, -- .exit = omap_cpu_exit, -- .name = "omap", -- .attr = omap_cpufreq_attr, --}; -- --static int __init omap_cpufreq_init(void) --{ -- return cpufreq_register_driver(&omap_driver); --} -- --late_initcall(omap_cpufreq_init); -- --/* -- * if ever we want to remove this, upon cleanup call: -- * -- * cpufreq_unregister_driver() -- * cpufreq_frequency_table_put_attr() -- */ -- --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch deleted file mode 100644 index a152c7f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch +++ /dev/null @@ -1,171 +0,0 @@ -From fed2c5a3d929204d4fc18c6f4a3edbf920e7ee36 Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar <santosh.shilimkar@ti.com> -Date: Mon, 14 Mar 2011 17:08:49 +0530 -Subject: [PATCH 08/19] OMAP2PLUS: cpufreq: Add SMP support to cater OMAP4430 - -On OMAP SMP configuartion, both processors share the voltage -and clock. So both CPUs needs to be scaled together and hence -needs software co-ordination. - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Cc: Kevin Hilman <khilman@ti.com> -cc: Vishwanath BS <vishwanath.bs@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 73 ++++++++++++++++++++++++++----- - 1 files changed, 62 insertions(+), 11 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 27f641b..3730f96 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -26,9 +26,11 @@ - #include <linux/clk.h> - #include <linux/io.h> - #include <linux/opp.h> -+#include <linux/cpu.h> - - #include <asm/system.h> - #include <asm/smp_plat.h> -+#include <asm/cpu.h> - - #include <plat/clock.h> - #include <plat/omap-pm.h> -@@ -63,7 +65,7 @@ static unsigned int omap_getspeed(unsigned int cpu) - { - unsigned long rate; - -- if (cpu) -+ if (cpu >= NR_CPUS) - return 0; - - rate = clk_get_rate(mpu_clk) / 1000; -@@ -74,9 +76,13 @@ static int omap_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) - { -- int ret = 0; -+ int i, ret = 0; - struct cpufreq_freqs freqs; - -+ /* Changes not allowed until all CPUs are online */ -+ if (is_smp() && (num_online_cpus() < NR_CPUS)) -+ return ret; -+ - /* Ensure desired rate is within allowed range. Some govenors - * (ondemand) will just pass target_freq=0 to get the minimum. */ - if (target_freq < policy->min) -@@ -84,15 +90,25 @@ static int omap_target(struct cpufreq_policy *policy, - if (target_freq > policy->max) - target_freq = policy->max; - -- freqs.old = omap_getspeed(0); -+ freqs.old = omap_getspeed(policy->cpu); - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; -- freqs.cpu = 0; -+ freqs.cpu = policy->cpu; - - if (freqs.old == freqs.new) - return ret; - -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ if (!is_smp()) { -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ goto set_freq; -+ } -+ -+ /* notifiers */ -+ for_each_cpu(i, policy->cpus) { -+ freqs.cpu = i; -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ } - -+set_freq: - #ifdef CONFIG_CPU_FREQ_DEBUG - pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); - #endif -@@ -105,12 +121,33 @@ static int omap_target(struct cpufreq_policy *policy, - * CONFIG_SMP enabled. Below code is added only to manage that - * scenario - */ -- if (!is_smp()) -+ freqs.new = omap_getspeed(policy->cpu); -+ if (!is_smp()) { - loops_per_jiffy = - cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ goto skip_lpj; -+ } - -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+#ifdef CONFIG_SMP -+ /* -+ * Note that loops_per_jiffy is not updated on SMP systems in -+ * cpufreq driver. So, update the per-CPU loops_per_jiffy value -+ * on frequency transition. We need to update all dependent CPUs. -+ */ -+ for_each_cpu(i, policy->cpus) -+ per_cpu(cpu_data, i).loops_per_jiffy = -+ cpufreq_scale(per_cpu(cpu_data, i).loops_per_jiffy, -+ freqs.old, freqs.new); -+#endif - -+ /* notifiers */ -+ for_each_cpu(i, policy->cpus) { -+ freqs.cpu = i; -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ } -+ -+skip_lpj: - return ret; - } - -@@ -118,6 +155,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - { - int result = 0; - struct device *mpu_dev; -+ static cpumask_var_t cpumask; - - if (cpu_is_omap24xx()) - mpu_clk = clk_get(NULL, "virt_prcm_set"); -@@ -129,12 +167,12 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - if (IS_ERR(mpu_clk)) - return PTR_ERR(mpu_clk); - -- if (policy->cpu != 0) -+ if (policy->cpu >= NR_CPUS) - return -EINVAL; - -- policy->cur = policy->min = policy->max = omap_getspeed(0); -- -+ policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); - mpu_dev = omap2_get_mpuss_device(); -+ - if (!mpu_dev) { - pr_warning("%s: unable to get the mpu device\n", __func__); - return -EINVAL; -@@ -154,7 +192,20 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - - policy->min = policy->cpuinfo.min_freq; - policy->max = policy->cpuinfo.max_freq; -- policy->cur = omap_getspeed(0); -+ policy->cur = omap_getspeed(policy->cpu); -+ -+ /* -+ * On OMAP SMP configuartion, both processors share the voltage -+ * and clock. So both CPUs needs to be scaled together and hence -+ * needs software co-ordination. Use cpufreq affected_cpus -+ * interface to handle this scenario. Additional is_smp() check -+ * is to keep SMP_ON_UP build working. -+ */ -+ if (is_smp()) { -+ policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; -+ cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask); -+ cpumask_copy(policy->cpus, cpumask); -+ } - - /* FIXME: what's the actual transition time? */ - policy->cpuinfo.transition_latency = 300 * 1000; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch deleted file mode 100644 index c8328b2..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch +++ /dev/null @@ -1,30 +0,0 @@ -From d046bd12930aa5daf951d9af8614c60677c8ff15 Mon Sep 17 00:00:00 2001 -From: Jarkko Nikula <jhnikula@gmail.com> -Date: Thu, 14 Apr 2011 16:21:58 +0300 -Subject: [PATCH 09/19] OMAP2PLUS: cpufreq: Fix typo when attempting to set mpu_clk for OMAP4 - -Fix this typo as there is no dpll_mpu_ck for OMAP3 and code flow is clearly -trying to set mpu_clk for OMAP4 for which this dpll_mpu_ck is available. - -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 3730f96..a725d90 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -161,7 +161,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - mpu_clk = clk_get(NULL, "virt_prcm_set"); - else if (cpu_is_omap34xx()) - mpu_clk = clk_get(NULL, "dpll1_ck"); -- else if (cpu_is_omap34xx()) -+ else if (cpu_is_omap44xx()) - mpu_clk = clk_get(NULL, "dpll_mpu_ck"); - - if (IS_ERR(mpu_clk)) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to-init.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to-init.patch deleted file mode 100644 index d1c1ea5..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to-init.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 0ec2aee24f701ecd6135dce0b3f1a71249583689 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 25 May 2011 16:38:46 -0700 -Subject: [PATCH 10/19] OMAP2+: cpufreq: move clk name decision to init - -Clk name does'nt need to dynamically detected during clk init. -move them off to driver initialization, if we dont have a clk name, -there is no point in registering the driver anyways. The actual clk -get and put is left at cpu_init and exit functions. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 20 +++++++++++++------- - 1 files changed, 13 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index a725d90..c46d0cd 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -42,6 +42,7 @@ - - static struct cpufreq_frequency_table *freq_table; - static struct clk *mpu_clk; -+static char *mpu_clk_name; - - static int omap_verify_speed(struct cpufreq_policy *policy) - { -@@ -157,13 +158,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - struct device *mpu_dev; - static cpumask_var_t cpumask; - -- if (cpu_is_omap24xx()) -- mpu_clk = clk_get(NULL, "virt_prcm_set"); -- else if (cpu_is_omap34xx()) -- mpu_clk = clk_get(NULL, "dpll1_ck"); -- else if (cpu_is_omap44xx()) -- mpu_clk = clk_get(NULL, "dpll_mpu_ck"); -- -+ mpu_clk = clk_get(NULL, mpu_clk_name); - if (IS_ERR(mpu_clk)) - return PTR_ERR(mpu_clk); - -@@ -238,6 +233,17 @@ static struct cpufreq_driver omap_driver = { - - static int __init omap_cpufreq_init(void) - { -+ if (cpu_is_omap24xx()) -+ mpu_clk_name = "virt_prcm_set"; -+ else if (cpu_is_omap34xx()) -+ mpu_clk_name = "dpll1_ck"; -+ else if (cpu_is_omap44xx()) -+ mpu_clk_name = "dpll_mpu_ck"; -+ -+ if (!mpu_clk_name) { -+ pr_err("%s: unsupported Silicon?\n", __func__); -+ return -EINVAL; -+ } - return cpufreq_register_driver(&omap_driver); - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no-mpudev.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no-mpudev.patch deleted file mode 100644 index b37c004..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no-mpudev.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 7c76e002041cd5b084c9a8b6729ab33acf53643e Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 25 May 2011 16:38:47 -0700 -Subject: [PATCH 11/19] OMAP2+: cpufreq: deny initialization if no mpudev - -if we do not have mpu_dev we normally fail in cpu_init. It is better -to fail driver registration if the devices are not available. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 15 ++++++++------- - 1 files changed, 8 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index c46d0cd..33a91ec 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -43,6 +43,7 @@ - static struct cpufreq_frequency_table *freq_table; - static struct clk *mpu_clk; - static char *mpu_clk_name; -+static struct device *mpu_dev; - - static int omap_verify_speed(struct cpufreq_policy *policy) - { -@@ -155,7 +156,6 @@ skip_lpj: - static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - { - int result = 0; -- struct device *mpu_dev; - static cpumask_var_t cpumask; - - mpu_clk = clk_get(NULL, mpu_clk_name); -@@ -166,12 +166,6 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - return -EINVAL; - - policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); -- mpu_dev = omap2_get_mpuss_device(); -- -- if (!mpu_dev) { -- pr_warning("%s: unable to get the mpu device\n", __func__); -- return -EINVAL; -- } - opp_init_cpufreq_table(mpu_dev, &freq_table); - - if (freq_table) { -@@ -244,6 +238,13 @@ static int __init omap_cpufreq_init(void) - pr_err("%s: unsupported Silicon?\n", __func__); - return -EINVAL; - } -+ -+ mpu_dev = omap2_get_mpuss_device(); -+ if (!mpu_dev) { -+ pr_warning("%s: unable to get the mpu device\n", __func__); -+ return -EINVAL; -+ } -+ - return cpufreq_register_driver(&omap_driver); - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch deleted file mode 100644 index 33ffe54..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch +++ /dev/null @@ -1,129 +0,0 @@ -From 407f4d9ed824d458406f139a7698c74a1eb3b8f7 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Thu, 26 May 2011 19:39:17 -0700 -Subject: [PATCH 12/19] OMAP2+: cpufreq: dont support !freq_table - -OMAP2+ all have frequency tables, hence the hacks we had for older -silicon do not need to be carried forward. As part of this change, -use cpufreq_frequency_table_target to find the best match for -frequency requested. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 67 +++++++++++++++---------------- - 1 files changed, 33 insertions(+), 34 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 33a91ec..acf18e8 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -38,8 +38,6 @@ - - #include <mach/hardware.h> - --#define VERY_HI_RATE 900000000 -- - static struct cpufreq_frequency_table *freq_table; - static struct clk *mpu_clk; - static char *mpu_clk_name; -@@ -47,20 +45,9 @@ static struct device *mpu_dev; - - static int omap_verify_speed(struct cpufreq_policy *policy) - { -- if (freq_table) -- return cpufreq_frequency_table_verify(policy, freq_table); -- -- if (policy->cpu) -+ if (!freq_table) - return -EINVAL; -- -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -- policy->cpuinfo.max_freq); -- -- policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; -- policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -- policy->cpuinfo.max_freq); -- return 0; -+ return cpufreq_frequency_table_verify(policy, freq_table); - } - - static unsigned int omap_getspeed(unsigned int cpu) -@@ -78,22 +65,35 @@ static int omap_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) - { -- int i, ret = 0; -+ unsigned int i; -+ int ret = 0; - struct cpufreq_freqs freqs; - - /* Changes not allowed until all CPUs are online */ - if (is_smp() && (num_online_cpus() < NR_CPUS)) - return ret; - -- /* Ensure desired rate is within allowed range. Some govenors -- * (ondemand) will just pass target_freq=0 to get the minimum. */ -- if (target_freq < policy->min) -- target_freq = policy->min; -- if (target_freq > policy->max) -- target_freq = policy->max; -+ if (!freq_table) { -+ dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, -+ policy->cpu); -+ return -EINVAL; -+ } -+ -+ ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, -+ relation, &i); -+ if (ret) { -+ dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", -+ __func__, policy->cpu, target_freq, ret); -+ return ret; -+ } -+ freqs.new = freq_table[i].frequency; -+ if (!freqs.new) { -+ dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, -+ policy->cpu, target_freq); -+ return -EINVAL; -+ } - - freqs.old = omap_getspeed(policy->cpu); -- freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; - freqs.cpu = policy->cpu; - - if (freqs.old == freqs.new) -@@ -166,19 +166,18 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - return -EINVAL; - - policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); -- opp_init_cpufreq_table(mpu_dev, &freq_table); -- -- if (freq_table) { -- result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -- if (!result) -- cpufreq_frequency_table_get_attr(freq_table, -- policy->cpu); -- } else { -- policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; -- policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, -- VERY_HI_RATE) / 1000; -+ result = opp_init_cpufreq_table(mpu_dev, &freq_table); -+ -+ if (result) { -+ dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", -+ __func__, policy->cpu, result); -+ return result; - } - -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -+ if (!result) -+ cpufreq_frequency_table_get_attr(freq_table, policy->cpu); -+ - policy->min = policy->cpuinfo.min_freq; - policy->max = policy->cpuinfo.max_freq; - policy->cur = omap_getspeed(policy->cpu); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch deleted file mode 100644 index d5db432..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 525df87add27c07a76e06c45f0756b204a5a3880 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Thu, 26 May 2011 19:39:18 -0700 -Subject: [PATCH 13/19] OMAP2+: cpufreq: only supports OPP library - -OMAP2 is the only family using clk_[init|exit]_cpufreq_table, however, -the cpufreq code does not currently use clk_init_cpufreq_table. As a -result, it is unusuable for OMAP2 and only usable only on platforms -using OPP library. - -Remove the unbalanced clk_exit_cpufreq_table(). Any platforms where -OPPs are not availble will fail on init because a freq table will not -be properly initialized. - -Signed-off-by: Nishanth Menon <nm@ti.com> -[khilman@ti.com: changelog edits, and graceful failure mode changes] -Acked-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 3 +-- - 1 files changed, 1 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index acf18e8..3af7cda 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -1,7 +1,7 @@ - /* - * OMAP2PLUS cpufreq driver - * -- * CPU frequency scaling for OMAP -+ * CPU frequency scaling for OMAP using OPP information - * - * Copyright (C) 2005 Nokia Corporation - * Written by Tony Lindgren <tony@atomide.com> -@@ -203,7 +203,6 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - - static int omap_cpu_exit(struct cpufreq_policy *policy) - { -- clk_exit_cpufreq_table(&freq_table); - clk_put(mpu_clk); - return 0; - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch deleted file mode 100644 index 709a555..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch +++ /dev/null @@ -1,61 +0,0 @@ -From b0f40f6545e9ae32b6cbd2cb03561de805297bf5 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Thu, 26 May 2011 19:39:19 -0700 -Subject: [PATCH 14/19] OMAP2+: cpufreq: put clk if cpu_init failed - -Release the mpu_clk in fail paths. - -Reported-by: Todd Poynor <toddpoynor@google.com> -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 14 +++++++++++--- - 1 files changed, 11 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 3af7cda..e019297 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -162,8 +162,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - if (IS_ERR(mpu_clk)) - return PTR_ERR(mpu_clk); - -- if (policy->cpu >= NR_CPUS) -- return -EINVAL; -+ if (policy->cpu >= NR_CPUS) { -+ result = -EINVAL; -+ goto fail_ck; -+ } - - policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); - result = opp_init_cpufreq_table(mpu_dev, &freq_table); -@@ -171,12 +173,14 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - if (result) { - dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", - __func__, policy->cpu, result); -- return result; -+ goto fail_ck; - } - - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); - if (!result) - cpufreq_frequency_table_get_attr(freq_table, policy->cpu); -+ else -+ goto fail_ck; - - policy->min = policy->cpuinfo.min_freq; - policy->max = policy->cpuinfo.max_freq; -@@ -199,6 +203,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - policy->cpuinfo.transition_latency = 300 * 1000; - - return 0; -+ -+fail_ck: -+ clk_put(mpu_clk); -+ return result; - } - - static int omap_cpu_exit(struct cpufreq_policy *policy) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch deleted file mode 100644 index a1080e6..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 67324a92ca4778fb6be86058c91ac7c9442ede16 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Thu, 26 May 2011 19:39:20 -0700 -Subject: [PATCH 15/19] OMAP2+: cpufreq: fix freq_table leak - -We use a single frequency table for multiple CPUs. But, with -OMAP4, since we have multiple CPUs, the cpu_init call for CPU1 -causes freq_table previously allocated for CPU0 to be overwritten. -In addition, we dont free the table on exit path. - -We solve this by maintaining an atomic type counter to ensure -just a single table exists at a given time. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 22 +++++++++++++++++----- - 1 files changed, 17 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index e019297..a962a31 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -39,6 +39,7 @@ - #include <mach/hardware.h> - - static struct cpufreq_frequency_table *freq_table; -+static atomic_t freq_table_users = ATOMIC_INIT(0); - static struct clk *mpu_clk; - static char *mpu_clk_name; - static struct device *mpu_dev; -@@ -153,6 +154,12 @@ skip_lpj: - return ret; - } - -+static inline void freq_table_free(void) -+{ -+ if (atomic_dec_and_test(&freq_table_users)) -+ opp_free_cpufreq_table(mpu_dev, &freq_table); -+} -+ - static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - { - int result = 0; -@@ -168,7 +175,9 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - } - - policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); -- result = opp_init_cpufreq_table(mpu_dev, &freq_table); -+ -+ if (atomic_inc_return(&freq_table_users) == 1) -+ result = opp_init_cpufreq_table(mpu_dev, &freq_table); - - if (result) { - dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", -@@ -177,10 +186,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - } - - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); -- if (!result) -- cpufreq_frequency_table_get_attr(freq_table, policy->cpu); -- else -- goto fail_ck; -+ if (result) -+ goto fail_table; -+ -+ cpufreq_frequency_table_get_attr(freq_table, policy->cpu); - - policy->min = policy->cpuinfo.min_freq; - policy->max = policy->cpuinfo.max_freq; -@@ -204,6 +213,8 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - - return 0; - -+fail_table: -+ freq_table_free(); - fail_ck: - clk_put(mpu_clk); - return result; -@@ -211,6 +222,7 @@ fail_ck: - - static int omap_cpu_exit(struct cpufreq_policy *policy) - { -+ freq_table_free(); - clk_put(mpu_clk); - return 0; - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous-check-in-target-for.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous-check-in-target-for.patch deleted file mode 100644 index 2451a21..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous-check-in-target-for.patch +++ /dev/null @@ -1,58 +0,0 @@ -From f0e647da78b80946ab301787aba4330bd7d1429d Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar <santosh.shilimkar@ti.com> -Date: Fri, 3 Jun 2011 17:46:57 +0530 -Subject: [PATCH 16/19] OMAP2+: CPUfreq: Remove superfluous check in target() for online CPU's. - -Current OMAP2PLUS CPUfreq tagret() functions returns when all -the CPU's are not online. This breaks CPUfreq when secondary CPUs -are offlined on SMP system. - -The intention of that check was just avoid CPU frequency change -during the window when CPU becomes online but it's cpufreq_init is -not done yet. Otherwise it can lead to notifiers being sent on -a CPU which is not yet registered to the governor. - -But this race conditions is already managed by the CPUfreq -core driver by updating the available cpumask accordingly. - -OMAP CPUFReq driver make use same cpumask for the notifiers -so the above problem doesn't exist. In my initial implementation -of the OMAP4 CPUFreq driver, I was using 'for_each_online_cpu()' -for notifiers which lead me to add that check. Later I fixed -the notifies but didn't realise that the check has become -redundant then. - -Fix it by removing the superfluous check in target(). - -Thanks for Nishant Menon <nm@ti.com> for reporting issue -with hot-plug and Kevin Hilman <khilman@ti.com> for his -comment on excessive check in target(). - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Reported-by: Nishanth Menon <nm@ti.com> -Tested-by: Vishwanath BS <vishwanath.bs@ti.com> -Cc: Kevin Hilman <khilman@ti.com> -Tested-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 4 ---- - 1 files changed, 0 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index a962a31..eaefa49 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -70,10 +70,6 @@ static int omap_target(struct cpufreq_policy *policy, - int ret = 0; - struct cpufreq_freqs freqs; - -- /* Changes not allowed until all CPUs are online */ -- if (is_smp() && (num_online_cpus() < NR_CPUS)) -- return ret; -- - if (!freq_table) { - dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, - policy->cpu); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad-boot-frequency.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad-boot-frequency.patch deleted file mode 100644 index b5e9734..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad-boot-frequency.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 669ad0bf5d48d8675365a212f561f57bec4d9158 Mon Sep 17 00:00:00 2001 -From: Colin Cross <ccross@google.com> -Date: Mon, 6 Jun 2011 21:05:29 -0500 -Subject: [PATCH 17/19] OMAP2+: cpufreq: notify even with bad boot frequency - -Sometimes, bootloaders starts up with a frequency which is not -in the OPP table. At cpu_init, policy->cur contains the frequency -we pick at boot. It is possible that system might have fixed -it's boot frequency later on as part of power initialization. -After this condition, the first call to omap_target results in the -following: - -omap_getspeed(actual device frequency) != policy->cur(frequency that -cpufreq thinks that the system is at), and it is possible that -freqs.old == freqs.new (because the governor requested a scale down). - -We exit without triggering the notifiers in the current code, which -does'nt let code which depends on cpufreq_notify_transition to have -accurate information as to what the system frequency is. - -Instead, we do a normal transition if policy->cur is wrong, then, -freqs.old will be the actual cpu frequency, freqs.new will be the -actual new cpu frequency and all required notifiers have the accurate -information. - -Acked-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Colin Cross <ccross@google.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index eaefa49..8598928 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -93,7 +93,7 @@ static int omap_target(struct cpufreq_policy *policy, - freqs.old = omap_getspeed(policy->cpu); - freqs.cpu = policy->cpu; - -- if (freqs.old == freqs.new) -+ if (freqs.old == freqs.new && policy->cur == freqs.new) - return ret; - - if (!is_smp()) { --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch deleted file mode 100644 index 923e22f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 0d8c6a265f29587ab9c6df1c6bebe359a8d71d09 Mon Sep 17 00:00:00 2001 -From: Todd Poynor <toddpoynor@google.com> -Date: Tue, 7 Jun 2011 13:57:52 -0700 -Subject: [PATCH 18/19] OMAP2+: cpufreq: Enable all CPUs in shared policy mask - -Enable all CPUs in the shared policy in the CPU init callback. -Otherwise, the governor CPUFREQ_GOV_START event is invoked with -a policy that only includes the first CPU, leaving other CPUs -uninitialized by the governor. - -Signed-off-by: Todd Poynor <toddpoynor@google.com> -Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 4 +--- - 1 files changed, 1 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 8598928..1f3b2e1 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -159,7 +159,6 @@ static inline void freq_table_free(void) - static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - { - int result = 0; -- static cpumask_var_t cpumask; - - mpu_clk = clk_get(NULL, mpu_clk_name); - if (IS_ERR(mpu_clk)) -@@ -200,8 +199,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) - */ - if (is_smp()) { - policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; -- cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask); -- cpumask_copy(policy->cpus, cpumask); -+ cpumask_setall(policy->cpus); - } - - /* FIXME: what's the actual transition time? */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with-reference-value-to-avo.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with-reference-value-to-avo.patch deleted file mode 100644 index 85666bc..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with-reference-value-to-avo.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 550f74e2915393426e15c8d12695707253c8a91d Mon Sep 17 00:00:00 2001 -From: Russell King <rmk+kernel@arm.linux.org.uk> -Date: Mon, 11 Jul 2011 23:10:04 +0530 -Subject: [PATCH 19/19] OMAP2+: CPUfreq: update lpj with reference value to avoid progressive error. - -Adjust _both_ the per-cpu loops_per_jiffy and global lpj. Calibrate them -with with reference to the initial values to avoid a progressively -bigger and bigger error in the value over time. - -While at this, re-use the notifiers for UP/SMP since on -UP machine or UP_ON_SMP policy->cpus mask would contain only -the boot CPU. - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -[santosh.shilimkar@ti.com: re-based against omap cpufreq -upstream branch and fixed notifiers] -Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> -Cc: Kevin Hilman <khilman@ti.com> -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/omap2plus-cpufreq.c | 50 ++++++++++++++++-------------- - 1 files changed, 27 insertions(+), 23 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c -index 1f3b2e1..de82e87 100644 ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c -@@ -38,6 +38,16 @@ - - #include <mach/hardware.h> - -+#ifdef CONFIG_SMP -+struct lpj_info { -+ unsigned long ref; -+ unsigned int freq; -+}; -+ -+static DEFINE_PER_CPU(struct lpj_info, lpj_ref); -+static struct lpj_info global_lpj_ref; -+#endif -+ - static struct cpufreq_frequency_table *freq_table; - static atomic_t freq_table_users = ATOMIC_INIT(0); - static struct clk *mpu_clk; -@@ -96,37 +106,18 @@ static int omap_target(struct cpufreq_policy *policy, - if (freqs.old == freqs.new && policy->cur == freqs.new) - return ret; - -- if (!is_smp()) { -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -- goto set_freq; -- } -- - /* notifiers */ - for_each_cpu(i, policy->cpus) { - freqs.cpu = i; - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); - } - --set_freq: - #ifdef CONFIG_CPU_FREQ_DEBUG - pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); - #endif - - ret = clk_set_rate(mpu_clk, freqs.new * 1000); -- -- /* -- * Generic CPUFREQ driver jiffy update is under !SMP. So jiffies -- * won't get updated when UP machine cpufreq build with -- * CONFIG_SMP enabled. Below code is added only to manage that -- * scenario -- */ - freqs.new = omap_getspeed(policy->cpu); -- if (!is_smp()) { -- loops_per_jiffy = -- cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -- goto skip_lpj; -- } - - #ifdef CONFIG_SMP - /* -@@ -134,10 +125,24 @@ set_freq: - * cpufreq driver. So, update the per-CPU loops_per_jiffy value - * on frequency transition. We need to update all dependent CPUs. - */ -- for_each_cpu(i, policy->cpus) -+ for_each_cpu(i, policy->cpus) { -+ struct lpj_info *lpj = &per_cpu(lpj_ref, i); -+ if (!lpj->freq) { -+ lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; -+ lpj->freq = freqs.old; -+ } -+ - per_cpu(cpu_data, i).loops_per_jiffy = -- cpufreq_scale(per_cpu(cpu_data, i).loops_per_jiffy, -- freqs.old, freqs.new); -+ cpufreq_scale(lpj->ref, lpj->freq, freqs.new); -+ } -+ -+ /* And don't forget to adjust the global one */ -+ if (!global_lpj_ref.freq) { -+ global_lpj_ref.ref = loops_per_jiffy; -+ global_lpj_ref.freq = freqs.old; -+ } -+ loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, -+ freqs.new); - #endif - - /* notifiers */ -@@ -146,7 +151,6 @@ set_freq: - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); - } - --skip_lpj: - return ret; - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach-omap2.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach-omap2.patch deleted file mode 100644 index e86ca6f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach-omap2.patch +++ /dev/null @@ -1,1083 +0,0 @@ -From d95bccb7d0ad132153543bcc018e8da8aba1832d Mon Sep 17 00:00:00 2001 -From: Oleg Drokin <green@linuxhacker.ru> -Date: Mon, 6 Jun 2011 18:57:07 +0000 -Subject: [PATCH 001/149] cleanup regulator supply definitions in mach-omap2 - -to use REGULATOR_SUPPLY arrays. - -CC: Mark Brown <broonie@opensource.wolfsonmicro.com> -CC: Mike Rapoport <mike@compulab.co.il> -CC: Nishant Kamat <nskamat@ti.com> -CC: Steve Sakoman <steve@sakoman.com> -CC: Felipe Balbi <balbi@ti.com> -CC: Santosh Shilimkar <santosh.shilimkar@ti.com> -CC: peter.barada@logicpd.com -Signed-off-by: Oleg Drokin <green@linuxhacker.ru> -Acked-by: Felipe Balbi <balbi@ti.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-4430sdp.c | 13 ++---- - arch/arm/mach-omap2/board-cm-t35.c | 34 +++++++------- - arch/arm/mach-omap2/board-devkit8000.c | 28 ++++++----- - arch/arm/mach-omap2/board-igep0020.c | 27 ++++++----- - arch/arm/mach-omap2/board-ldp.c | 8 ++-- - arch/arm/mach-omap2/board-omap3beagle.c | 25 +++++----- - arch/arm/mach-omap2/board-omap3evm.c | 41 +++++++++-------- - arch/arm/mach-omap2/board-omap3logic.c | 8 ++-- - arch/arm/mach-omap2/board-omap3pandora.c | 63 ++++++++++++++----------- - arch/arm/mach-omap2/board-omap3stalker.c | 25 +++++----- - arch/arm/mach-omap2/board-omap3touchbook.c | 32 +++++++------ - arch/arm/mach-omap2/board-omap4panda.c | 16 +++---- - arch/arm/mach-omap2/board-overo.c | 26 ++++++----- - arch/arm/mach-omap2/board-rx51-peripherals.c | 29 +++++++----- - arch/arm/mach-omap2/board-zoom-peripherals.c | 42 +++++++++--------- - 15 files changed, 218 insertions(+), 199 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c -index 63de2d3..39a8062 100644 ---- a/arch/arm/mach-omap2/board-4430sdp.c -+++ b/arch/arm/mach-omap2/board-4430sdp.c -@@ -333,16 +333,11 @@ static struct omap2_hsmmc_info mmc[] = { - }; - - static struct regulator_consumer_supply sdp4430_vaux_supply[] = { -- { -- .supply = "vmmc", -- .dev_name = "omap_hsmmc.1", -- }, -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), - }; -+ - static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { -- { -- .supply = "vmmc", -- .dev_name = "omap_hsmmc.0", -- }, -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - - static int omap4_twl6030_hsmmc_late_init(struct device *dev) -@@ -399,7 +394,7 @@ static struct regulator_init_data sdp4430_vaux1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -+ .num_consumer_supplies = ARRAY_SIZE(sdp4430_vaux_supply), - .consumer_supplies = sdp4430_vaux_supply, - }; - -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c -index 77456de..e7bf32d 100644 ---- a/arch/arm/mach-omap2/board-cm-t35.c -+++ b/arch/arm/mach-omap2/board-cm-t35.c -@@ -337,19 +337,21 @@ static void __init cm_t35_init_display(void) - } - } - --static struct regulator_consumer_supply cm_t35_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply cm_t35_vsim_supply = { -- .supply = "vmmc_aux", -+static struct regulator_consumer_supply cm_t35_vsim_supply[] = { -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply cm_t35_vdac_supply = -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -+static struct regulator_consumer_supply cm_t35_vdac_supply[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; - --static struct regulator_consumer_supply cm_t35_vdvi_supply = -- REGULATOR_SUPPLY("vdvi", "omapdss"); -+static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { -+ REGULATOR_SUPPLY("vdvi", "omapdss"), -+}; - - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ - static struct regulator_init_data cm_t35_vmmc1 = { -@@ -362,8 +364,8 @@ static struct regulator_init_data cm_t35_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &cm_t35_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply), -+ .consumer_supplies = cm_t35_vmmc1_supply, - }; - - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -@@ -377,8 +379,8 @@ static struct regulator_init_data cm_t35_vsim = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &cm_t35_vsim_supply, -+ .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply), -+ .consumer_supplies = cm_t35_vsim_supply, - }; - - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -@@ -391,8 +393,8 @@ static struct regulator_init_data cm_t35_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &cm_t35_vdac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply), -+ .consumer_supplies = cm_t35_vdac_supply, - }; - - /* VPLL2 for digital video outputs */ -@@ -406,8 +408,8 @@ static struct regulator_init_data cm_t35_vpll2 = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &cm_t35_vdvi_supply, -+ .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply), -+ .consumer_supplies = cm_t35_vdvi_supply, - }; - - static struct twl4030_usb_data cm_t35_usb_data = { -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c -index 34956ec..ead9c1d 100644 ---- a/arch/arm/mach-omap2/board-devkit8000.c -+++ b/arch/arm/mach-omap2/board-devkit8000.c -@@ -130,13 +130,14 @@ static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev) - gpio_set_value_cansleep(dssdev->reset_gpio, 0); - } - --static struct regulator_consumer_supply devkit8000_vmmc1_supply = -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); -- -+static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -+}; - - /* ads7846 on SPI */ --static struct regulator_consumer_supply devkit8000_vio_supply = -- REGULATOR_SUPPLY("vcc", "spi2.0"); -+static struct regulator_consumer_supply devkit8000_vio_supply[] = { -+ REGULATOR_SUPPLY("vcc", "spi2.0"), -+}; - - static struct panel_generic_dpi_data lcd_panel = { - .name = "generic", -@@ -186,8 +187,9 @@ static struct omap_dss_board_info devkit8000_dss_data = { - .default_device = &devkit8000_lcd_device, - }; - --static struct regulator_consumer_supply devkit8000_vdda_dac_supply = -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -+static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; - - static uint32_t board_keymap[] = { - KEY(0, 0, KEY_1), -@@ -284,8 +286,8 @@ static struct regulator_init_data devkit8000_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &devkit8000_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply), -+ .consumer_supplies = devkit8000_vmmc1_supply, - }; - - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -@@ -298,8 +300,8 @@ static struct regulator_init_data devkit8000_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &devkit8000_vdda_dac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(devkit8000_vdda_dac_supply), -+ .consumer_supplies = devkit8000_vdda_dac_supply, - }; - - /* VPLL1 for digital video outputs */ -@@ -327,8 +329,8 @@ static struct regulator_init_data devkit8000_vio = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &devkit8000_vio_supply, -+ .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply), -+ .consumer_supplies = devkit8000_vio_supply, - }; - - static struct twl4030_usb_data devkit8000_usb_data = { -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c -index 0c1bfca..84d2846 100644 ---- a/arch/arm/mach-omap2/board-igep0020.c -+++ b/arch/arm/mach-omap2/board-igep0020.c -@@ -222,8 +222,9 @@ static inline void __init igep2_init_smsc911x(void) - static inline void __init igep2_init_smsc911x(void) { } - #endif - --static struct regulator_consumer_supply igep_vmmc1_supply = -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); -+static struct regulator_consumer_supply igep_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -+}; - - /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ - static struct regulator_init_data igep_vmmc1 = { -@@ -236,12 +237,13 @@ static struct regulator_init_data igep_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &igep_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply), -+ .consumer_supplies = igep_vmmc1_supply, - }; - --static struct regulator_consumer_supply igep_vio_supply = -- REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); -+static struct regulator_consumer_supply igep_vio_supply[] = { -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), -+}; - - static struct regulator_init_data igep_vio = { - .constraints = { -@@ -254,20 +256,21 @@ static struct regulator_init_data igep_vio = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &igep_vio_supply, -+ .num_consumer_supplies = ARRAY_SIZE(igep_vio_supply), -+ .consumer_supplies = igep_vio_supply, - }; - --static struct regulator_consumer_supply igep_vmmc2_supply = -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+static struct regulator_consumer_supply igep_vmmc2_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), -+}; - - static struct regulator_init_data igep_vmmc2 = { - .constraints = { - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .always_on = 1, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &igep_vmmc2_supply, -+ .num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply), -+ .consumer_supplies = igep_vmmc2_supply, - }; - - static struct fixed_voltage_config igep_vwlan = { -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c -index f7d6038..069bc9f 100644 ---- a/arch/arm/mach-omap2/board-ldp.c -+++ b/arch/arm/mach-omap2/board-ldp.c -@@ -213,8 +213,8 @@ static struct twl4030_madc_platform_data ldp_madc_data = { - .irq_line = 1, - }; - --static struct regulator_consumer_supply ldp_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply ldp_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -@@ -228,8 +228,8 @@ static struct regulator_init_data ldp_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &ldp_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(ldp_vmmc1_supply), -+ .consumer_supplies = ldp_vmmc1_supply, - }; - - /* ads7846 on SPI */ -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 7f21d24..4cf7c19 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -210,8 +210,9 @@ static struct omap_dss_board_info beagle_dss_data = { - .default_device = &beagle_dvi_device, - }; - --static struct regulator_consumer_supply beagle_vdac_supply = -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -+static struct regulator_consumer_supply beagle_vdac_supply[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; - - static struct regulator_consumer_supply beagle_vdvi_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -@@ -239,12 +240,12 @@ static struct omap2_hsmmc_info mmc[] = { - {} /* Terminator */ - }; - --static struct regulator_consumer_supply beagle_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply beagle_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply beagle_vsim_supply = { -- .supply = "vmmc_aux", -+static struct regulator_consumer_supply beagle_vsim_supply[] = { -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), - }; - - static struct gpio_led gpio_leds[]; -@@ -336,8 +337,8 @@ static struct regulator_init_data beagle_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &beagle_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(beagle_vmmc1_supply), -+ .consumer_supplies = beagle_vmmc1_supply, - }; - - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -@@ -351,8 +352,8 @@ static struct regulator_init_data beagle_vsim = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &beagle_vsim_supply, -+ .num_consumer_supplies = ARRAY_SIZE(beagle_vsim_supply), -+ .consumer_supplies = beagle_vsim_supply, - }; - - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -@@ -365,8 +366,8 @@ static struct regulator_init_data beagle_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &beagle_vdac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), -+ .consumer_supplies = beagle_vdac_supply, - }; - - /* VPLL2 for digital video outputs */ -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c -index b4d43464..fc7a23a 100644 ---- a/arch/arm/mach-omap2/board-omap3evm.c -+++ b/arch/arm/mach-omap2/board-omap3evm.c -@@ -273,12 +273,12 @@ static struct omap_dss_board_info omap3_evm_dss_data = { - .default_device = &omap3_evm_lcd_device, - }; - --static struct regulator_consumer_supply omap3evm_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply omap3evm_vsim_supply = { -- .supply = "vmmc_aux", -+static struct regulator_consumer_supply omap3evm_vsim_supply[] = { -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), - }; - - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -@@ -292,8 +292,8 @@ static struct regulator_init_data omap3evm_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3evm_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply), -+ .consumer_supplies = omap3evm_vmmc1_supply, - }; - - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -@@ -307,8 +307,8 @@ static struct regulator_init_data omap3evm_vsim = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3evm_vsim_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply), -+ .consumer_supplies = omap3evm_vsim_supply, - }; - - static struct omap2_hsmmc_info mmc[] = { -@@ -449,8 +449,9 @@ static struct twl4030_codec_data omap3evm_codec_data = { - .audio = &omap3evm_audio_data, - }; - --static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -+static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; - - /* VDAC for DSS driving S-Video */ - static struct regulator_init_data omap3_evm_vdac = { -@@ -463,8 +464,8 @@ static struct regulator_init_data omap3_evm_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3_evm_vdda_dac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vdda_dac_supply), -+ .consumer_supplies = omap3_evm_vdda_dac_supply, - }; - - /* VPLL2 for digital video outputs */ -@@ -488,8 +489,9 @@ static struct regulator_init_data omap3_evm_vpll2 = { - }; - - /* ads7846 on SPI */ --static struct regulator_consumer_supply omap3evm_vio_supply = -- REGULATOR_SUPPLY("vcc", "spi1.0"); -+static struct regulator_consumer_supply omap3evm_vio_supply[] = { -+ REGULATOR_SUPPLY("vcc", "spi1.0"), -+}; - - /* VIO for ads7846 */ - static struct regulator_init_data omap3evm_vio = { -@@ -502,8 +504,8 @@ static struct regulator_init_data omap3evm_vio = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3evm_vio_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply), -+ .consumer_supplies = omap3evm_vio_supply, - }; - - #ifdef CONFIG_WL12XX_PLATFORM_DATA -@@ -511,16 +513,17 @@ static struct regulator_init_data omap3evm_vio = { - #define OMAP3EVM_WLAN_PMENA_GPIO (150) - #define OMAP3EVM_WLAN_IRQ_GPIO (149) - --static struct regulator_consumer_supply omap3evm_vmmc2_supply = -+static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+}; - - /* VMMC2 for driving the WL12xx module */ - static struct regulator_init_data omap3evm_vmmc2 = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3evm_vmmc2_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply);, -+ .consumer_supplies = omap3evm_vmmc2_supply, - }; - - static struct fixed_voltage_config omap3evm_vwlan = { -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c -index 60d9be4..ec18435 100644 ---- a/arch/arm/mach-omap2/board-omap3logic.c -+++ b/arch/arm/mach-omap2/board-omap3logic.c -@@ -55,8 +55,8 @@ - #define OMAP3_TORPEDO_MMC_GPIO_CD 127 - #define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ 129 - --static struct regulator_consumer_supply omap3logic_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -@@ -71,8 +71,8 @@ static struct regulator_init_data omap3logic_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3logic_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3logic_vmmc1_supply), -+ .consumer_supplies = omap3logic_vmmc1_supply, - }; - - static struct twl4030_gpio_platform_data omap3logic_gpio_data = { -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c -index 23f71d4..130a278 100644 ---- a/arch/arm/mach-omap2/board-omap3pandora.c -+++ b/arch/arm/mach-omap2/board-omap3pandora.c -@@ -320,17 +320,21 @@ static struct twl4030_gpio_platform_data omap3pandora_gpio_data = { - .setup = omap3pandora_twl_gpio_setup, - }; - --static struct regulator_consumer_supply pandora_vmmc1_supply = -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); -+static struct regulator_consumer_supply pandora_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -+}; - --static struct regulator_consumer_supply pandora_vmmc2_supply = -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+static struct regulator_consumer_supply pandora_vmmc2_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1") -+}; - --static struct regulator_consumer_supply pandora_vmmc3_supply = -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"); -+static struct regulator_consumer_supply pandora_vmmc3_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), -+}; - --static struct regulator_consumer_supply pandora_vdda_dac_supply = -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -+static struct regulator_consumer_supply pandora_vdda_dac_supply[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; - - static struct regulator_consumer_supply pandora_vdds_supplies[] = { - REGULATOR_SUPPLY("vdds_sdi", "omapdss"), -@@ -338,11 +342,13 @@ static struct regulator_consumer_supply pandora_vdds_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), - }; - --static struct regulator_consumer_supply pandora_vcc_lcd_supply = -- REGULATOR_SUPPLY("vcc", "display0"); -+static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = { -+ REGULATOR_SUPPLY("vcc", "display0"), -+}; - --static struct regulator_consumer_supply pandora_usb_phy_supply = -- REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"); -+static struct regulator_consumer_supply pandora_usb_phy_supply[] = { -+ REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"), -+}; - - /* ads7846 on SPI and 2 nub controllers on I2C */ - static struct regulator_consumer_supply pandora_vaux4_supplies[] = { -@@ -351,8 +357,9 @@ static struct regulator_consumer_supply pandora_vaux4_supplies[] = { - REGULATOR_SUPPLY("vcc", "3-0067"), - }; - --static struct regulator_consumer_supply pandora_adac_supply = -- REGULATOR_SUPPLY("vcc", "soc-audio"); -+static struct regulator_consumer_supply pandora_adac_supply[] = { -+ REGULATOR_SUPPLY("vcc", "soc-audio"), -+}; - - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ - static struct regulator_init_data pandora_vmmc1 = { -@@ -365,8 +372,8 @@ static struct regulator_init_data pandora_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &pandora_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc1_supply), -+ .consumer_supplies = pandora_vmmc1_supply, - }; - - /* VMMC2 for MMC2 pins CMD, CLK, DAT0..DAT3 (max 100 mA) */ -@@ -380,8 +387,8 @@ static struct regulator_init_data pandora_vmmc2 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &pandora_vmmc2_supply, -+ .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc2_supply), -+ .consumer_supplies = pandora_vmmc2_supply, - }; - - /* VDAC for DSS driving S-Video */ -@@ -395,8 +402,8 @@ static struct regulator_init_data pandora_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &pandora_vdda_dac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(pandora_vdda_dac_supply), -+ .consumer_supplies = pandora_vdda_dac_supply, - }; - - /* VPLL2 for digital video outputs */ -@@ -425,8 +432,8 @@ static struct regulator_init_data pandora_vaux1 = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &pandora_vcc_lcd_supply, -+ .num_consumer_supplies = ARRAY_SIZE(pandora_vcc_lcd_supply), -+ .consumer_supplies = pandora_vcc_lcd_supply, - }; - - /* VAUX2 for USB host PHY */ -@@ -440,8 +447,8 @@ static struct regulator_init_data pandora_vaux2 = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &pandora_usb_phy_supply, -+ .num_consumer_supplies = ARRAY_SIZE(pandora_usb_phy_supply), -+ .consumer_supplies = pandora_usb_phy_supply, - }; - - /* VAUX4 for ads7846 and nubs */ -@@ -470,8 +477,8 @@ static struct regulator_init_data pandora_vsim = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &pandora_adac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(pandora_adac_supply), -+ .consumer_supplies = pandora_adac_supply, - }; - - /* Fixed regulator internal to Wifi module */ -@@ -479,8 +486,8 @@ static struct regulator_init_data pandora_vmmc3 = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &pandora_vmmc3_supply, -+ .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc3_supply), -+ .consumer_supplies = pandora_vmmc3_supply, - }; - - static struct fixed_voltage_config pandora_vwlan = { -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c -index 0c108a2..99be540 100644 ---- a/arch/arm/mach-omap2/board-omap3stalker.c -+++ b/arch/arm/mach-omap2/board-omap3stalker.c -@@ -206,12 +206,12 @@ static struct omap_dss_board_info omap3_stalker_dss_data = { - .default_device = &omap3_stalker_dvi_device, - }; - --static struct regulator_consumer_supply omap3stalker_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply omap3stalker_vsim_supply = { -- .supply = "vmmc_aux", -+static struct regulator_consumer_supply omap3stalker_vsim_supply[] = { -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), - }; - - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -@@ -224,8 +224,8 @@ static struct regulator_init_data omap3stalker_vmmc1 = { - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3stalker_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vmmc1_supply), -+ .consumer_supplies = omap3stalker_vmmc1_supply, - }; - - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -@@ -238,8 +238,8 @@ static struct regulator_init_data omap3stalker_vsim = { - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3stalker_vsim_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vsim_supply), -+ .consumer_supplies = omap3stalker_vsim_supply, - }; - - static struct omap2_hsmmc_info mmc[] = { -@@ -403,8 +403,9 @@ static struct twl4030_codec_data omap3stalker_codec_data = { - .audio = &omap3stalker_audio_data, - }; - --static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply = -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -+static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; - - /* VDAC for DSS driving S-Video */ - static struct regulator_init_data omap3_stalker_vdac = { -@@ -417,8 +418,8 @@ static struct regulator_init_data omap3_stalker_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap3_stalker_vdda_dac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vdda_dac_supply), -+ .consumer_supplies = omap3_stalker_vdda_dac_supply, - }; - - /* VPLL2 for digital video outputs */ -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index 5f649fa..ab5c37d 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -114,12 +114,12 @@ static struct omap_lcd_config omap3_touchbook_lcd_config __initdata = { - .ctrl_name = "internal", - }; - --static struct regulator_consumer_supply touchbook_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply touchbook_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply touchbook_vsim_supply = { -- .supply = "vmmc_aux", -+static struct regulator_consumer_supply touchbook_vsim_supply[] = { -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), - }; - - static struct gpio_led gpio_leds[]; -@@ -167,14 +167,18 @@ static struct twl4030_gpio_platform_data touchbook_gpio_data = { - .setup = touchbook_twl_gpio_setup, - }; - --static struct regulator_consumer_supply touchbook_vdac_supply = { -+static struct regulator_consumer_supply touchbook_vdac_supply[] = { -+{ - .supply = "vdac", - .dev = &omap3_touchbook_lcd_device.dev, -+}, - }; - --static struct regulator_consumer_supply touchbook_vdvi_supply = { -+static struct regulator_consumer_supply touchbook_vdvi_supply[] = { -+{ - .supply = "vdvi", - .dev = &omap3_touchbook_lcd_device.dev, -+}, - }; - - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -@@ -188,8 +192,8 @@ static struct regulator_init_data touchbook_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &touchbook_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(touchbook_vmmc1_supply), -+ .consumer_supplies = touchbook_vmmc1_supply, - }; - - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -@@ -203,8 +207,8 @@ static struct regulator_init_data touchbook_vsim = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &touchbook_vsim_supply, -+ .num_consumer_supplies = ARRAY_SIZE(touchbook_vsim_supply), -+ .consumer_supplies = touchbook_vsim_supply, - }; - - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -@@ -217,8 +221,8 @@ static struct regulator_init_data touchbook_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &touchbook_vdac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(touchbook_vdac_supply), -+ .consumer_supplies = touchbook_vdac_supply, - }; - - /* VPLL2 for digital video outputs */ -@@ -232,8 +236,8 @@ static struct regulator_init_data touchbook_vpll2 = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &touchbook_vdvi_supply, -+ .num_consumer_supplies = ARRAY_SIZE(touchbook_vdvi_supply), -+ .consumer_supplies = touchbook_vdvi_supply, - }; - - static struct twl4030_usb_data touchbook_usb_data = { -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c -index 0cfe200..6d2372b 100644 ---- a/arch/arm/mach-omap2/board-omap4panda.c -+++ b/arch/arm/mach-omap2/board-omap4panda.c -@@ -183,23 +183,19 @@ static struct omap2_hsmmc_info mmc[] = { - }; - - static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { -- { -- .supply = "vmmc", -- .dev_name = "omap_hsmmc.0", -- }, -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply omap4_panda_vmmc5_supply = { -- .supply = "vmmc", -- .dev_name = "omap_hsmmc.4", -+static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"), - }; - - static struct regulator_init_data panda_vmmc5 = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &omap4_panda_vmmc5_supply, -+ .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc5_supply), -+ .consumer_supplies = omap4_panda_vmmc5_supply, - }; - - static struct fixed_voltage_config panda_vwlan = { -@@ -312,7 +308,7 @@ static struct regulator_init_data omap4_panda_vmmc = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -+ .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc_supply), - .consumer_supplies = omap4_panda_vmmc_supply, - }; - -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 175e1ab..30c7556 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -74,15 +74,16 @@ - defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) - - /* fixed regulator for ads7846 */ --static struct regulator_consumer_supply ads7846_supply = -- REGULATOR_SUPPLY("vcc", "spi1.0"); -+static struct regulator_consumer_supply ads7846_supply[] = { -+ REGULATOR_SUPPLY("vcc", "spi1.0"), -+}; - - static struct regulator_init_data vads7846_regulator = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &ads7846_supply, -+ .num_consumer_supplies = ARRAY_SIZE(ads7846_supply), -+ .consumer_supplies = ads7846_supply, - }; - - static struct fixed_voltage_config vads7846 = { -@@ -264,8 +265,9 @@ static struct omap_dss_board_info overo_dss_data = { - .default_device = &overo_dvi_device, - }; - --static struct regulator_consumer_supply overo_vdda_dac_supply = -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -+static struct regulator_consumer_supply overo_vdda_dac_supply[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; - - static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -@@ -319,8 +321,8 @@ static struct omap2_hsmmc_info mmc[] = { - {} /* Terminator */ - }; - --static struct regulator_consumer_supply overo_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply overo_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - - #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -@@ -447,8 +449,8 @@ static struct regulator_init_data overo_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &overo_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(overo_vmmc1_supply), -+ .consumer_supplies = overo_vmmc1_supply, - }; - - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -@@ -461,8 +463,8 @@ static struct regulator_init_data overo_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &overo_vdda_dac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(overo_vdda_dac_supply), -+ .consumer_supplies = overo_vdda_dac_supply, - }; - - /* VPLL2 for digital video outputs */ -diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c -index c565971..b633ba8 100644 ---- a/arch/arm/mach-omap2/board-rx51-peripherals.c -+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c -@@ -358,14 +358,17 @@ static struct omap2_hsmmc_info mmc[] __initdata = { - {} /* Terminator */ - }; - --static struct regulator_consumer_supply rx51_vmmc1_supply = -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); -+static struct regulator_consumer_supply rx51_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -+}; - --static struct regulator_consumer_supply rx51_vaux3_supply = -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+static struct regulator_consumer_supply rx51_vaux3_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), -+}; - --static struct regulator_consumer_supply rx51_vsim_supply = -- REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); -+static struct regulator_consumer_supply rx51_vsim_supply[] = { -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), -+}; - - static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { - /* tlv320aic3x analog supplies */ -@@ -452,8 +455,8 @@ static struct regulator_init_data rx51_vaux3_mmc = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &rx51_vaux3_supply, -+ .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply), -+ .consumer_supplies = rx51_vaux3_supply, - }; - - static struct regulator_init_data rx51_vaux4 = { -@@ -479,8 +482,8 @@ static struct regulator_init_data rx51_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &rx51_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply), -+ .consumer_supplies = rx51_vmmc1_supply, - }; - - static struct regulator_init_data rx51_vmmc2 = { -@@ -511,8 +514,8 @@ static struct regulator_init_data rx51_vsim = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &rx51_vsim_supply, -+ .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply), -+ .consumer_supplies = rx51_vsim_supply, - }; - - static struct regulator_init_data rx51_vdac = { -@@ -526,7 +529,7 @@ static struct regulator_init_data rx51_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -+ .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply), - .consumer_supplies = rx51_vdac_supply, - }; - -diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c -index 118c6f5..cb012e1 100644 ---- a/arch/arm/mach-omap2/board-zoom-peripherals.c -+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c -@@ -105,21 +105,20 @@ static struct twl4030_keypad_data zoom_kp_twl4030_data = { - .rep = 1, - }; - --static struct regulator_consumer_supply zoom_vmmc1_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply zoom_vmmc1_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply zoom_vsim_supply = { -- .supply = "vmmc_aux", -+static struct regulator_consumer_supply zoom_vsim_supply[] = { -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply zoom_vmmc2_supply = { -- .supply = "vmmc", -+static struct regulator_consumer_supply zoom_vmmc2_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), - }; - --static struct regulator_consumer_supply zoom_vmmc3_supply = { -- .supply = "vmmc", -- .dev_name = "omap_hsmmc.2", -+static struct regulator_consumer_supply zoom_vmmc3_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), - }; - - /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ -@@ -133,8 +132,8 @@ static struct regulator_init_data zoom_vmmc1 = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &zoom_vmmc1_supply, -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc1_supply), -+ .consumer_supplies = zoom_vmmc1_supply, - }; - - /* VMMC2 for MMC2 card */ -@@ -148,8 +147,8 @@ static struct regulator_init_data zoom_vmmc2 = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &zoom_vmmc2_supply, -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc2_supply), -+ .consumer_supplies = zoom_vmmc2_supply, - }; - - /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ -@@ -163,16 +162,16 @@ static struct regulator_init_data zoom_vsim = { - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &zoom_vsim_supply, -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vsim_supply), -+ .consumer_supplies = zoom_vsim_supply, - }; - - static struct regulator_init_data zoom_vmmc3 = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &zoom_vmmc3_supply, -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc3_supply), -+ .consumer_supplies = zoom_vmmc3_supply, - }; - - static struct fixed_voltage_config zoom_vwlan = { -@@ -232,8 +231,9 @@ static struct regulator_consumer_supply zoom_vpll2_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), - }; - --static struct regulator_consumer_supply zoom_vdda_dac_supply = -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -+static struct regulator_consumer_supply zoom_vdda_dac_supply[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; - - static struct regulator_init_data zoom_vpll2 = { - .constraints = { -@@ -257,8 +257,8 @@ static struct regulator_init_data zoom_vdac = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = 1, -- .consumer_supplies = &zoom_vdda_dac_supply, -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vdda_dac_supply), -+ .consumer_supplies = zoom_vdda_dac_supply, - }; - - static int zoom_twl_gpio_setup(struct device *dev, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common-in-hs.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common-in-hs.patch deleted file mode 100644 index 52e6786..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common-in-hs.patch +++ /dev/null @@ -1,160 +0,0 @@ -From a3d13ae14bca7c412e5b0575c244ce7370fa3747 Mon Sep 17 00:00:00 2001 -From: Oleg Drokin <green@linuxhacker.ru> -Date: Mon, 6 Jun 2011 18:57:08 +0000 -Subject: [PATCH 002/149] Remove old-style supply.dev assignments common in hsmmc init - -CC: Mark Brown <broonie@opensource.wolfsonmicro.com> -CC: Mike Rapoport <mike@compulab.co.il> -CC: Nishant Kamat <nskamat@ti.com> -CC: Steve Sakoman <steve@sakoman.com> -CC: Felipe Balbi <balbi@ti.com> -Signed-off-by: Oleg Drokin <green@linuxhacker.ru> -Acked-by: Felipe Balbi <balbi@ti.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-cm-t35.c | 4 ---- - arch/arm/mach-omap2/board-ldp.c | 2 -- - arch/arm/mach-omap2/board-omap3beagle.c | 4 ---- - arch/arm/mach-omap2/board-omap3evm.c | 4 ---- - arch/arm/mach-omap2/board-omap3logic.c | 2 -- - arch/arm/mach-omap2/board-omap3stalker.c | 4 ---- - arch/arm/mach-omap2/board-omap3touchbook.c | 4 ---- - arch/arm/mach-omap2/board-overo.c | 2 -- - arch/arm/mach-omap2/board-zoom-peripherals.c | 7 ------- - 9 files changed, 0 insertions(+), 33 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c -index e7bf32d..ceb581e 100644 ---- a/arch/arm/mach-omap2/board-cm-t35.c -+++ b/arch/arm/mach-omap2/board-cm-t35.c -@@ -483,10 +483,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, - mmc[0].gpio_cd = gpio + 0; - omap2_hsmmc_init(mmc); - -- /* link regulators to MMC adapters */ -- cm_t35_vmmc1_supply.dev = mmc[0].dev; -- cm_t35_vsim_supply.dev = mmc[0].dev; -- - return 0; - } - -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c -index 069bc9f..2d7e0ae 100644 ---- a/arch/arm/mach-omap2/board-ldp.c -+++ b/arch/arm/mach-omap2/board-ldp.c -@@ -341,8 +341,6 @@ static void __init omap_ldp_init(void) - ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); - - omap2_hsmmc_init(mmc); -- /* link regulators to MMC adapters */ -- ldp_vmmc1_supply.dev = mmc[0].dev; - } - - MACHINE_START(OMAP_LDP, "OMAP LDP board") -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 4cf7c19..8ef0e19 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -268,10 +268,6 @@ static int beagle_twl_gpio_setup(struct device *dev, - mmc[0].gpio_cd = gpio + 0; - omap2_hsmmc_init(mmc); - -- /* link regulators to MMC adapters */ -- beagle_vmmc1_supply.dev = mmc[0].dev; -- beagle_vsim_supply.dev = mmc[0].dev; -- - /* - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active - * high / others active low) -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c -index fc7a23a..e2202dd 100644 ---- a/arch/arm/mach-omap2/board-omap3evm.c -+++ b/arch/arm/mach-omap2/board-omap3evm.c -@@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev, - mmc[0].gpio_cd = gpio + 0; - omap2_hsmmc_init(mmc); - -- /* link regulators to MMC adapters */ -- omap3evm_vmmc1_supply.dev = mmc[0].dev; -- omap3evm_vsim_supply.dev = mmc[0].dev; -- - /* - * Most GPIOs are for USB OTG. Some are mostly sent to - * the P2 connector; notably LEDA for the LCD backlight. -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c -index ec18435..eaefb59 100644 ---- a/arch/arm/mach-omap2/board-omap3logic.c -+++ b/arch/arm/mach-omap2/board-omap3logic.c -@@ -130,8 +130,6 @@ static void __init board_mmc_init(void) - } - - omap2_hsmmc_init(board_mmc_info); -- /* link regulators to MMC adapters */ -- omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev; - } - - static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c -index 99be540..63d12a3 100644 ---- a/arch/arm/mach-omap2/board-omap3stalker.c -+++ b/arch/arm/mach-omap2/board-omap3stalker.c -@@ -321,10 +321,6 @@ omap3stalker_twl_gpio_setup(struct device *dev, - mmc[0].gpio_cd = gpio + 0; - omap2_hsmmc_init(mmc); - -- /* link regulators to MMC adapters */ -- omap3stalker_vmmc1_supply.dev = mmc[0].dev; -- omap3stalker_vsim_supply.dev = mmc[0].dev; -- - /* - * Most GPIOs are for USB OTG. Some are mostly sent to - * the P2 connector; notably LEDA for the LCD backlight. -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index ab5c37d..c80e2c3 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -137,10 +137,6 @@ static int touchbook_twl_gpio_setup(struct device *dev, - mmc[0].gpio_cd = gpio + 0; - omap2_hsmmc_init(mmc); - -- /* link regulators to MMC adapters */ -- touchbook_vmmc1_supply.dev = mmc[0].dev; -- touchbook_vsim_supply.dev = mmc[0].dev; -- - /* REVISIT: need ehci-omap hooks for external VBUS - * power switch and overcurrent detect - */ -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 30c7556..031a9a6 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -417,8 +417,6 @@ static int overo_twl_gpio_setup(struct device *dev, - { - omap2_hsmmc_init(mmc); - -- overo_vmmc1_supply.dev = mmc[0].dev; -- - #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; -diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c -index cb012e1..8495f82 100644 ---- a/arch/arm/mach-omap2/board-zoom-peripherals.c -+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c -@@ -270,13 +270,6 @@ static int zoom_twl_gpio_setup(struct device *dev, - mmc[0].gpio_cd = gpio + 0; - omap2_hsmmc_init(mmc); - -- /* link regulators to MMC adapters ... we "know" the -- * regulators will be set up only *after* we return. -- */ -- zoom_vmmc1_supply.dev = mmc[0].dev; -- zoom_vsim_supply.dev = mmc[0].dev; -- zoom_vmmc2_supply.dev = mmc[1].dev; -- - ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, - "lcd enable"); - if (ret) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid-cpu_is.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid-cpu_is.patch deleted file mode 100644 index dbb6972..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid-cpu_is.patch +++ /dev/null @@ -1,802 +0,0 @@ -From 5edd966fdcf04f3166c1b7028215e502ba7d5275 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 17 May 2011 03:51:26 -0700 -Subject: [PATCH 003/149] omap: Use separate init_irq functions to avoid cpu_is_omap tests early - -This allows us to remove cpu_is_omap calls from init_irq functions. -There should not be any need for cpu_is_omap calls as at this point. -During the timer init we only care about SoC generation, and not about -subrevisions. - -The main reason for the patch is that we want to initialize only -minimal omap specific code from the init_early call. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap1/board-ams-delta.c | 2 +- - arch/arm/mach-omap1/board-fsample.c | 2 +- - arch/arm/mach-omap1/board-generic.c | 2 +- - arch/arm/mach-omap1/board-h2.c | 2 +- - arch/arm/mach-omap1/board-h3.c | 2 +- - arch/arm/mach-omap1/board-htcherald.c | 2 +- - arch/arm/mach-omap1/board-innovator.c | 2 +- - arch/arm/mach-omap1/board-nokia770.c | 2 +- - arch/arm/mach-omap1/board-osk.c | 2 +- - arch/arm/mach-omap1/board-palmte.c | 2 +- - arch/arm/mach-omap1/board-palmtt.c | 2 +- - arch/arm/mach-omap1/board-palmz71.c | 2 +- - arch/arm/mach-omap1/board-perseus2.c | 2 +- - arch/arm/mach-omap1/board-sx1.c | 2 +- - arch/arm/mach-omap1/board-voiceblue.c | 2 +- - arch/arm/mach-omap1/irq.c | 2 +- - arch/arm/mach-omap2/board-2430sdp.c | 2 +- - arch/arm/mach-omap2/board-3430sdp.c | 2 +- - arch/arm/mach-omap2/board-3630sdp.c | 2 +- - arch/arm/mach-omap2/board-am3517crane.c | 2 +- - arch/arm/mach-omap2/board-am3517evm.c | 2 +- - arch/arm/mach-omap2/board-apollon.c | 2 +- - arch/arm/mach-omap2/board-cm-t35.c | 2 +- - arch/arm/mach-omap2/board-cm-t3517.c | 2 +- - arch/arm/mach-omap2/board-devkit8000.c | 2 +- - arch/arm/mach-omap2/board-generic.c | 2 +- - arch/arm/mach-omap2/board-h4.c | 2 +- - arch/arm/mach-omap2/board-igep0020.c | 4 +- - arch/arm/mach-omap2/board-ldp.c | 2 +- - arch/arm/mach-omap2/board-n8x0.c | 6 ++-- - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- - arch/arm/mach-omap2/board-omap3evm.c | 2 +- - arch/arm/mach-omap2/board-omap3logic.c | 4 +- - arch/arm/mach-omap2/board-omap3pandora.c | 2 +- - arch/arm/mach-omap2/board-omap3stalker.c | 2 +- - arch/arm/mach-omap2/board-omap3touchbook.c | 2 +- - arch/arm/mach-omap2/board-overo.c | 2 +- - arch/arm/mach-omap2/board-rm680.c | 2 +- - arch/arm/mach-omap2/board-rx51.c | 2 +- - arch/arm/mach-omap2/board-ti8168evm.c | 7 +----- - arch/arm/mach-omap2/board-zoom.c | 4 +- - arch/arm/mach-omap2/io.c | 17 +-------------- - arch/arm/mach-omap2/irq.c | 32 ++++++++++++++++++--------- - arch/arm/mach-omap2/omap4-common.c | 10 ++++---- - arch/arm/plat-omap/include/plat/irqs.h | 6 ++++- - 45 files changed, 78 insertions(+), 84 deletions(-) - -diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c -index f49ce85..e3caef8 100644 ---- a/arch/arm/mach-omap1/board-ams-delta.c -+++ b/arch/arm/mach-omap1/board-ams-delta.c -@@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value) - static void __init ams_delta_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static struct map_desc ams_delta_io_desc[] __initdata = { -diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c -index 87f173d..eaff305 100644 ---- a/arch/arm/mach-omap1/board-fsample.c -+++ b/arch/arm/mach-omap1/board-fsample.c -@@ -329,7 +329,7 @@ static void __init omap_fsample_init(void) - static void __init omap_fsample_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - /* Only FPGA needs to be mapped here. All others are done with ioremap */ -diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c -index 23f4ab9..3fd6b40 100644 ---- a/arch/arm/mach-omap1/board-generic.c -+++ b/arch/arm/mach-omap1/board-generic.c -@@ -31,7 +31,7 @@ - static void __init omap_generic_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - /* assume no Mini-AB port */ -diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c -index ba3bd09..8147b04 100644 ---- a/arch/arm/mach-omap1/board-h2.c -+++ b/arch/arm/mach-omap1/board-h2.c -@@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = { - static void __init h2_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static struct omap_usb_config h2_usb_config __initdata = { -diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c -index ac48677..1b448f6 100644 ---- a/arch/arm/mach-omap1/board-h3.c -+++ b/arch/arm/mach-omap1/board-h3.c -@@ -439,7 +439,7 @@ static void __init h3_init(void) - static void __init h3_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static void __init h3_map_io(void) -diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c -index ba05a51..1bd4d8e 100644 ---- a/arch/arm/mach-omap1/board-htcherald.c -+++ b/arch/arm/mach-omap1/board-htcherald.c -@@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void) - { - printk(KERN_INFO "htcherald_init_irq.\n"); - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - MACHINE_START(HERALD, "HTC Herald") -diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c -index 2d9b8cb..5926b0c 100644 ---- a/arch/arm/mach-omap1/board-innovator.c -+++ b/arch/arm/mach-omap1/board-innovator.c -@@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void) - static void __init innovator_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - #ifdef CONFIG_ARCH_OMAP15XX -diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c -index cfd0849..e3cf21d 100644 ---- a/arch/arm/mach-omap1/board-nokia770.c -+++ b/arch/arm/mach-omap1/board-nokia770.c -@@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void) - omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); - - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static const unsigned int nokia770_keymap[] = { -diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c -index e68dfde..1e7823d 100644 ---- a/arch/arm/mach-omap1/board-osk.c -+++ b/arch/arm/mach-omap1/board-osk.c -@@ -282,7 +282,7 @@ static void __init osk_init_cf(void) - static void __init osk_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static struct omap_usb_config osk_usb_config __initdata = { -diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c -index c9d38f4..8b6a881 100644 ---- a/arch/arm/mach-omap1/board-palmte.c -+++ b/arch/arm/mach-omap1/board-palmte.c -@@ -62,7 +62,7 @@ - static void __init omap_palmte_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static const unsigned int palmte_keymap[] = { -diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c -index f04f2d3..f2de43d 100644 ---- a/arch/arm/mach-omap1/board-palmtt.c -+++ b/arch/arm/mach-omap1/board-palmtt.c -@@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = { - static void __init omap_palmtt_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static struct omap_usb_config palmtt_usb_config __initdata = { -diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c -index 45f01d2..6665d2d 100644 ---- a/arch/arm/mach-omap1/board-palmz71.c -+++ b/arch/arm/mach-omap1/board-palmz71.c -@@ -61,7 +61,7 @@ static void __init - omap_palmz71_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static const unsigned int palmz71_keymap[] = { -diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c -index 3c8ee84..7f019e5 100644 ---- a/arch/arm/mach-omap1/board-perseus2.c -+++ b/arch/arm/mach-omap1/board-perseus2.c -@@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void) - static void __init omap_perseus2_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - /* Only FPGA needs to be mapped here. All others are done with ioremap */ - static struct map_desc omap_perseus2_io_desc[] __initdata = { -diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c -index 0ad781d..24f0f7b 100644 ---- a/arch/arm/mach-omap1/board-sx1.c -+++ b/arch/arm/mach-omap1/board-sx1.c -@@ -411,7 +411,7 @@ static void __init omap_sx1_init(void) - static void __init omap_sx1_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - /*----------------------------------------*/ - -diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c -index 65d2420..98826e2 100644 ---- a/arch/arm/mach-omap1/board-voiceblue.c -+++ b/arch/arm/mach-omap1/board-voiceblue.c -@@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = { - static void __init voiceblue_init_irq(void) - { - omap1_init_common_hw(); -- omap_init_irq(); -+ omap1_init_irq(); - } - - static void __init voiceblue_map_io(void) -diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c -index 5d3da7a..e2b9c90 100644 ---- a/arch/arm/mach-omap1/irq.c -+++ b/arch/arm/mach-omap1/irq.c -@@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = { - .irq_set_wake = omap_wake_irq, - }; - --void __init omap_init_irq(void) -+void __init omap1_init_irq(void) - { - int i, j; - -diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c -index 5de6eac..45cabc5 100644 ---- a/arch/arm/mach-omap2/board-2430sdp.c -+++ b/arch/arm/mach-omap2/board-2430sdp.c -@@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") - .reserve = omap_reserve, - .map_io = omap_2430sdp_map_io, - .init_early = omap_2430sdp_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap2_init_irq, - .init_machine = omap_2430sdp_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c -index 5dac974..85b207f 100644 ---- a/arch/arm/mach-omap2/board-3430sdp.c -+++ b/arch/arm/mach-omap2/board-3430sdp.c -@@ -804,7 +804,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap_3430sdp_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap_3430sdp_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c -index a5933cc..2ec2d76 100644 ---- a/arch/arm/mach-omap2/board-3630sdp.c -+++ b/arch/arm/mach-omap2/board-3630sdp.c -@@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap_sdp_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap_sdp_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c -index 5e438a7..0bed0a4 100644 ---- a/arch/arm/mach-omap2/board-am3517crane.c -+++ b/arch/arm/mach-omap2/board-am3517crane.c -@@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = am3517_crane_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = am3517_crane_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c -index 63af417..0db0fb8 100644 ---- a/arch/arm/mach-omap2/board-am3517evm.c -+++ b/arch/arm/mach-omap2/board-am3517evm.c -@@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = am3517_evm_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = am3517_evm_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c -index b124bdf..93576c8 100644 ---- a/arch/arm/mach-omap2/board-apollon.c -+++ b/arch/arm/mach-omap2/board-apollon.c -@@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") - .reserve = omap_reserve, - .map_io = omap_apollon_map_io, - .init_early = omap_apollon_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap2_init_irq, - .init_machine = omap_apollon_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c -index ceb581e..43b1de5 100644 ---- a/arch/arm/mach-omap2/board-cm-t35.c -+++ b/arch/arm/mach-omap2/board-cm-t35.c -@@ -644,7 +644,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = cm_t35_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = cm_t35_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c -index c3a9fd3..8f15222 100644 ---- a/arch/arm/mach-omap2/board-cm-t3517.c -+++ b/arch/arm/mach-omap2/board-cm-t3517.c -@@ -304,7 +304,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = cm_t3517_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = cm_t3517_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c -index ead9c1d..73f3a22 100644 ---- a/arch/arm/mach-omap2/board-devkit8000.c -+++ b/arch/arm/mach-omap2/board-devkit8000.c -@@ -440,7 +440,7 @@ static void __init devkit8000_init_early(void) - - static void __init devkit8000_init_irq(void) - { -- omap_init_irq(); -+ omap3_init_irq(); - #ifdef CONFIG_OMAP_32K_TIMER - omap2_gp_clockevent_set_gptimer(12); - #endif -diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c -index 73e3c31..ccd503a 100644 ---- a/arch/arm/mach-omap2/board-generic.c -+++ b/arch/arm/mach-omap2/board-generic.c -@@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") - .reserve = omap_reserve, - .map_io = omap_generic_map_io, - .init_early = omap_generic_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap2_init_irq, - .init_machine = omap_generic_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c -index bac7933..2e16d6c 100644 ---- a/arch/arm/mach-omap2/board-h4.c -+++ b/arch/arm/mach-omap2/board-h4.c -@@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void) - - static void __init omap_h4_init_irq(void) - { -- omap_init_irq(); -+ omap2_init_irq(); - } - - static struct at24_platform_data m24c01 = { -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c -index 84d2846..f22a76a 100644 ---- a/arch/arm/mach-omap2/board-igep0020.c -+++ b/arch/arm/mach-omap2/board-igep0020.c -@@ -706,7 +706,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = igep_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = igep_init, - .timer = &omap_timer, - MACHINE_END -@@ -716,7 +716,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = igep_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = igep_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c -index 2d7e0ae..9671843 100644 ---- a/arch/arm/mach-omap2/board-ldp.c -+++ b/arch/arm/mach-omap2/board-ldp.c -@@ -348,7 +348,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap_ldp_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap_ldp_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c -index 8d74318..9c791a2 100644 ---- a/arch/arm/mach-omap2/board-n8x0.c -+++ b/arch/arm/mach-omap2/board-n8x0.c -@@ -699,7 +699,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") - .reserve = omap_reserve, - .map_io = n8x0_map_io, - .init_early = n8x0_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap2_init_irq, - .init_machine = n8x0_init_machine, - .timer = &omap_timer, - MACHINE_END -@@ -709,7 +709,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") - .reserve = omap_reserve, - .map_io = n8x0_map_io, - .init_early = n8x0_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap2_init_irq, - .init_machine = n8x0_init_machine, - .timer = &omap_timer, - MACHINE_END -@@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") - .reserve = omap_reserve, - .map_io = n8x0_map_io, - .init_early = n8x0_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap2_init_irq, - .init_machine = n8x0_init_machine, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 8ef0e19..eaead5e 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -483,7 +483,7 @@ static void __init omap3_beagle_init_early(void) - - static void __init omap3_beagle_init_irq(void) - { -- omap_init_irq(); -+ omap3_init_irq(); - #ifdef CONFIG_OMAP_32K_TIMER - omap2_gp_clockevent_set_gptimer(12); - #endif -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c -index e2202dd..d39f53f 100644 ---- a/arch/arm/mach-omap2/board-omap3evm.c -+++ b/arch/arm/mach-omap2/board-omap3evm.c -@@ -739,7 +739,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap3_evm_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap3_evm_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c -index eaefb59..b63f1c2 100644 ---- a/arch/arm/mach-omap2/board-omap3logic.c -+++ b/arch/arm/mach-omap2/board-omap3logic.c -@@ -213,7 +213,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") - .boot_params = 0x80000100, - .map_io = omap3_map_io, - .init_early = omap3logic_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap3logic_init, - .timer = &omap_timer, - MACHINE_END -@@ -222,7 +222,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") - .boot_params = 0x80000100, - .map_io = omap3_map_io, - .init_early = omap3logic_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap3logic_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c -index 130a278..1d90b90 100644 ---- a/arch/arm/mach-omap2/board-omap3pandora.c -+++ b/arch/arm/mach-omap2/board-omap3pandora.c -@@ -650,7 +650,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap3pandora_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap3pandora_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c -index 63d12a3..dfa1401 100644 ---- a/arch/arm/mach-omap2/board-omap3stalker.c -+++ b/arch/arm/mach-omap2/board-omap3stalker.c -@@ -491,7 +491,7 @@ static void __init omap3_stalker_init_early(void) - - static void __init omap3_stalker_init_irq(void) - { -- omap_init_irq(); -+ omap3_init_irq(); - #ifdef CONFIG_OMAP_32K_TIMER - omap2_gp_clockevent_set_gptimer(12); - #endif -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index c80e2c3..ae97910 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -371,7 +371,7 @@ static void __init omap3_touchbook_init_early(void) - - static void __init omap3_touchbook_init_irq(void) - { -- omap_init_irq(); -+ omap3_init_irq(); - #ifdef CONFIG_OMAP_32K_TIMER - omap2_gp_clockevent_set_gptimer(12); - #endif -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 031a9a6..e3928f23 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -615,7 +615,7 @@ MACHINE_START(OVERO, "Gumstix Overo") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = overo_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = overo_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c -index 42d10b1..9c3d115 100644 ---- a/arch/arm/mach-omap2/board-rm680.c -+++ b/arch/arm/mach-omap2/board-rm680.c -@@ -163,7 +163,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") - .reserve = omap_reserve, - .map_io = rm680_map_io, - .init_early = rm680_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = rm680_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c -index fec4cac..ee35e4e 100644 ---- a/arch/arm/mach-omap2/board-rx51.c -+++ b/arch/arm/mach-omap2/board-rx51.c -@@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") - .reserve = rx51_reserve, - .map_io = rx51_map_io, - .init_early = rx51_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = rx51_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c -index 09fa7bf..713c20f 100644 ---- a/arch/arm/mach-omap2/board-ti8168evm.c -+++ b/arch/arm/mach-omap2/board-ti8168evm.c -@@ -33,11 +33,6 @@ static void __init ti8168_init_early(void) - omap2_init_common_devices(NULL, NULL); - } - --static void __init ti8168_evm_init_irq(void) --{ -- omap_init_irq(); --} -- - static void __init ti8168_evm_init(void) - { - omap_serial_init(); -@@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") - .boot_params = 0x80000100, - .map_io = ti8168_evm_map_io, - .init_early = ti8168_init_early, -- .init_irq = ti8168_evm_init_irq, -+ .init_irq = ti816x_init_irq, - .timer = &omap_timer, - .init_machine = ti8168_evm_init, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c -index 4b133d7..97a3f0b 100644 ---- a/arch/arm/mach-omap2/board-zoom.c -+++ b/arch/arm/mach-omap2/board-zoom.c -@@ -137,7 +137,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap_zoom_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap_zoom_init, - .timer = &omap_timer, - MACHINE_END -@@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap_zoom_init_early, -- .init_irq = omap_init_irq, -+ .init_irq = omap3_init_irq, - .init_machine = omap_zoom_init, - .timer = &omap_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c -index 441e79d..2ce1ce6 100644 ---- a/arch/arm/mach-omap2/io.c -+++ b/arch/arm/mach-omap2/io.c -@@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) - return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); - } - -+/* See irq.c, omap4-common.c and entry-macro.S */ - void __iomem *omap_irq_base; - --/* -- * Initialize asm_irq_base for entry-macro.S -- */ --static inline void omap_irq_base_init(void) --{ -- if (cpu_is_omap24xx()) -- omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); -- else if (cpu_is_omap34xx()) -- omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE); -- else if (cpu_is_omap44xx()) -- omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); -- else -- pr_err("Could not initialize omap_irq_base\n"); --} -- - void __init omap2_init_common_infrastructure(void) - { - u8 postsetup_state; -@@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, - _omap2_init_reprogram_sdrc(); - } - -- omap_irq_base_init(); - } - - /* -diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c -index 3af2b7a..3a12f75 100644 ---- a/arch/arm/mach-omap2/irq.c -+++ b/arch/arm/mach-omap2/irq.c -@@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) - IRQ_NOREQUEST | IRQ_NOPROBE, 0); - } - --void __init omap_init_irq(void) -+static void __init omap_init_irq(u32 base, int nr_irqs) - { - unsigned long nr_of_irqs = 0; - unsigned int nr_banks = 0; - int i, j; - -+ omap_irq_base = ioremap(base, SZ_4K); -+ if (WARN_ON(!omap_irq_base)) -+ return; -+ - for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { -- unsigned long base = 0; - struct omap_irq_bank *bank = irq_banks + i; - -- if (cpu_is_omap24xx()) -- base = OMAP24XX_IC_BASE; -- else if (cpu_is_omap34xx()) -- base = OMAP34XX_IC_BASE; -- -- BUG_ON(!base); -- -- if (cpu_is_ti816x()) -- bank->nr_irqs = 128; -+ bank->nr_irqs = nr_irqs; - - /* Static mapping, never released */ - bank->base_reg = ioremap(base, SZ_4K); -@@ -181,6 +176,21 @@ void __init omap_init_irq(void) - nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); - } - -+void __init omap2_init_irq(void) -+{ -+ omap_init_irq(OMAP24XX_IC_BASE, 96); -+} -+ -+void __init omap3_init_irq(void) -+{ -+ omap_init_irq(OMAP34XX_IC_BASE, 96); -+} -+ -+void __init ti816x_init_irq(void) -+{ -+ omap_init_irq(OMAP34XX_IC_BASE, 128); -+} -+ - #ifdef CONFIG_ARCH_OMAP3 - static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; - -diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c -index 9ef8c29..35ac3e5 100644 ---- a/arch/arm/mach-omap2/omap4-common.c -+++ b/arch/arm/mach-omap2/omap4-common.c -@@ -19,6 +19,8 @@ - #include <asm/hardware/gic.h> - #include <asm/hardware/cache-l2x0.h> - -+#include <plat/irqs.h> -+ - #include <mach/hardware.h> - #include <mach/omap4-common.h> - -@@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr; - - void __init gic_init_irq(void) - { -- void __iomem *gic_cpu_base; -- - /* Static mapping, never released */ - gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); - BUG_ON(!gic_dist_base_addr); - - /* Static mapping, never released */ -- gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); -- BUG_ON(!gic_cpu_base); -+ omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); -+ BUG_ON(!omap_irq_base); - -- gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); -+ gic_init(0, 29, gic_dist_base_addr, omap_irq_base); - } - - #ifdef CONFIG_CACHE_L2X0 -diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h -index 5a25098..c884320 100644 ---- a/arch/arm/plat-omap/include/plat/irqs.h -+++ b/arch/arm/plat-omap/include/plat/irqs.h -@@ -428,7 +428,11 @@ - #define INTCPS_NR_IRQS 96 - - #ifndef __ASSEMBLY__ --extern void omap_init_irq(void); -+extern void __iomem *omap_irq_base; -+void omap1_init_irq(void); -+void omap2_init_irq(void); -+void omap3_init_irq(void); -+void ti816x_init_irq(void); - extern int omap_irq_pending(void); - void omap_intc_save_context(void); - void omap_intc_restore_context(void); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid-cpu_.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid-cpu_.patch deleted file mode 100644 index 8fbbc47..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid-cpu_.patch +++ /dev/null @@ -1,689 +0,0 @@ -From b623b767d19edcc2d08909b044e1ab57956d9d49 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:48 -0700 -Subject: [PATCH 004/149] omap: Set separate timer init functions to avoid cpu_is_omap tests - -This is needed for the following patches so we can initialize the -rest of the hardware timers later on. - -As with the init_irq calls, there's no need to do cpu_is_omap calls -during the timer init as we only care about the major omap generation. -This means that we can initialize the sys_timer with the .timer -entries alone. - -Note that for now we just set stubs for the various sys_timer entries -that will get populated in a later patch. The following patches will -also remove the omap_dm_timer_init calls and change the init for the -rest of the hardware timers to happen with an arch_initcall. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap1/board-ams-delta.c | 2 +- - arch/arm/mach-omap1/board-fsample.c | 2 +- - arch/arm/mach-omap1/board-generic.c | 2 +- - arch/arm/mach-omap1/board-h2.c | 2 +- - arch/arm/mach-omap1/board-h3.c | 2 +- - arch/arm/mach-omap1/board-htcherald.c | 2 +- - arch/arm/mach-omap1/board-innovator.c | 2 +- - arch/arm/mach-omap1/board-nokia770.c | 2 +- - arch/arm/mach-omap1/board-osk.c | 2 +- - arch/arm/mach-omap1/board-palmte.c | 2 +- - arch/arm/mach-omap1/board-palmtt.c | 2 +- - arch/arm/mach-omap1/board-palmz71.c | 2 +- - arch/arm/mach-omap1/board-perseus2.c | 2 +- - arch/arm/mach-omap1/board-sx1.c | 2 +- - arch/arm/mach-omap1/board-voiceblue.c | 2 +- - arch/arm/mach-omap1/time.c | 6 ++-- - arch/arm/mach-omap2/board-2430sdp.c | 2 +- - arch/arm/mach-omap2/board-3430sdp.c | 2 +- - arch/arm/mach-omap2/board-3630sdp.c | 2 +- - arch/arm/mach-omap2/board-4430sdp.c | 2 +- - arch/arm/mach-omap2/board-am3517crane.c | 2 +- - arch/arm/mach-omap2/board-am3517evm.c | 2 +- - arch/arm/mach-omap2/board-apollon.c | 2 +- - arch/arm/mach-omap2/board-cm-t35.c | 2 +- - arch/arm/mach-omap2/board-cm-t3517.c | 2 +- - arch/arm/mach-omap2/board-devkit8000.c | 2 +- - arch/arm/mach-omap2/board-generic.c | 2 +- - arch/arm/mach-omap2/board-h4.c | 2 +- - arch/arm/mach-omap2/board-igep0020.c | 4 +- - arch/arm/mach-omap2/board-ldp.c | 2 +- - arch/arm/mach-omap2/board-n8x0.c | 6 ++-- - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- - arch/arm/mach-omap2/board-omap3evm.c | 2 +- - arch/arm/mach-omap2/board-omap3logic.c | 4 +- - arch/arm/mach-omap2/board-omap3pandora.c | 2 +- - arch/arm/mach-omap2/board-omap3stalker.c | 2 +- - arch/arm/mach-omap2/board-omap3touchbook.c | 2 +- - arch/arm/mach-omap2/board-omap4panda.c | 2 +- - arch/arm/mach-omap2/board-overo.c | 2 +- - arch/arm/mach-omap2/board-rm680.c | 2 +- - arch/arm/mach-omap2/board-rx51.c | 2 +- - arch/arm/mach-omap2/board-ti8168evm.c | 2 +- - arch/arm/mach-omap2/board-zoom.c | 4 +- - arch/arm/mach-omap2/timer-gp.c | 41 +++++++++++++++++++++------- - arch/arm/plat-omap/include/plat/common.h | 6 +++- - arch/arm/plat-omap/include/plat/dmtimer.h | 1 - - 46 files changed, 86 insertions(+), 62 deletions(-) - -diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c -index e3caef8..312ea6b 100644 ---- a/arch/arm/mach-omap1/board-ams-delta.c -+++ b/arch/arm/mach-omap1/board-ams-delta.c -@@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") - .reserve = omap_reserve, - .init_irq = ams_delta_init_irq, - .init_machine = ams_delta_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END - - EXPORT_SYMBOL(ams_delta_latch1_write); -diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c -index eaff305..a6b1bea 100644 ---- a/arch/arm/mach-omap1/board-fsample.c -+++ b/arch/arm/mach-omap1/board-fsample.c -@@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") - .reserve = omap_reserve, - .init_irq = omap_fsample_init_irq, - .init_machine = omap_fsample_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c -index 3fd6b40..04fc356 100644 ---- a/arch/arm/mach-omap1/board-generic.c -+++ b/arch/arm/mach-omap1/board-generic.c -@@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") - .reserve = omap_reserve, - .init_irq = omap_generic_init_irq, - .init_machine = omap_generic_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c -index 8147b04..cb7fb1a 100644 ---- a/arch/arm/mach-omap1/board-h2.c -+++ b/arch/arm/mach-omap1/board-h2.c -@@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2") - .reserve = omap_reserve, - .init_irq = h2_init_irq, - .init_machine = h2_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c -index 1b448f6..31f3487 100644 ---- a/arch/arm/mach-omap1/board-h3.c -+++ b/arch/arm/mach-omap1/board-h3.c -@@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") - .reserve = omap_reserve, - .init_irq = h3_init_irq, - .init_machine = h3_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c -index 1bd4d8e..36e06ea 100644 ---- a/arch/arm/mach-omap1/board-htcherald.c -+++ b/arch/arm/mach-omap1/board-htcherald.c -@@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald") - .reserve = omap_reserve, - .init_irq = htcherald_init_irq, - .init_machine = htcherald_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c -index 5926b0c..0b1ba46 100644 ---- a/arch/arm/mach-omap1/board-innovator.c -+++ b/arch/arm/mach-omap1/board-innovator.c -@@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") - .reserve = omap_reserve, - .init_irq = innovator_init_irq, - .init_machine = innovator_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c -index e3cf21d..5469ce2 100644 ---- a/arch/arm/mach-omap1/board-nokia770.c -+++ b/arch/arm/mach-omap1/board-nokia770.c -@@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770") - .reserve = omap_reserve, - .init_irq = omap_nokia770_init_irq, - .init_machine = omap_nokia770_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c -index 1e7823d..b08a213 100644 ---- a/arch/arm/mach-omap1/board-osk.c -+++ b/arch/arm/mach-omap1/board-osk.c -@@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK") - .reserve = omap_reserve, - .init_irq = osk_init_irq, - .init_machine = osk_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c -index 8b6a881..459cb6b 100644 ---- a/arch/arm/mach-omap1/board-palmte.c -+++ b/arch/arm/mach-omap1/board-palmte.c -@@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") - .reserve = omap_reserve, - .init_irq = omap_palmte_init_irq, - .init_machine = omap_palmte_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c -index f2de43d..b214f45 100644 ---- a/arch/arm/mach-omap1/board-palmtt.c -+++ b/arch/arm/mach-omap1/board-palmtt.c -@@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") - .reserve = omap_reserve, - .init_irq = omap_palmtt_init_irq, - .init_machine = omap_palmtt_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c -index 6665d2d..9b0ea48 100644 ---- a/arch/arm/mach-omap1/board-palmz71.c -+++ b/arch/arm/mach-omap1/board-palmz71.c -@@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") - .reserve = omap_reserve, - .init_irq = omap_palmz71_init_irq, - .init_machine = omap_palmz71_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c -index 7f019e5..67acd41 100644 ---- a/arch/arm/mach-omap1/board-perseus2.c -+++ b/arch/arm/mach-omap1/board-perseus2.c -@@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") - .reserve = omap_reserve, - .init_irq = omap_perseus2_init_irq, - .init_machine = omap_perseus2_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c -index 24f0f7b..9c3b7c5 100644 ---- a/arch/arm/mach-omap1/board-sx1.c -+++ b/arch/arm/mach-omap1/board-sx1.c -@@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1") - .reserve = omap_reserve, - .init_irq = omap_sx1_init_irq, - .init_machine = omap_sx1_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c -index 98826e2..036edc0e 100644 ---- a/arch/arm/mach-omap1/board-voiceblue.c -+++ b/arch/arm/mach-omap1/board-voiceblue.c -@@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") - .reserve = omap_reserve, - .init_irq = voiceblue_init_irq, - .init_machine = voiceblue_init, -- .timer = &omap_timer, -+ .timer = &omap1_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c -index 03e1e10..a183777 100644 ---- a/arch/arm/mach-omap1/time.c -+++ b/arch/arm/mach-omap1/time.c -@@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void) - * Timer initialization - * --------------------------------------------------------------------------- - */ --static void __init omap_timer_init(void) -+static void __init omap1_timer_init(void) - { - if (omap_32k_timer_usable()) { - preferred_sched_clock_init(1); -@@ -307,6 +307,6 @@ static void __init omap_timer_init(void) - } - } - --struct sys_timer omap_timer = { -- .init = omap_timer_init, -+struct sys_timer omap1_timer = { -+ .init = omap1_timer_init, - }; -diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c -index 45cabc5..2028464 100644 ---- a/arch/arm/mach-omap2/board-2430sdp.c -+++ b/arch/arm/mach-omap2/board-2430sdp.c -@@ -262,5 +262,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") - .init_early = omap_2430sdp_init_early, - .init_irq = omap2_init_irq, - .init_machine = omap_2430sdp_init, -- .timer = &omap_timer, -+ .timer = &omap2_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c -index 85b207f..12fae21 100644 ---- a/arch/arm/mach-omap2/board-3430sdp.c -+++ b/arch/arm/mach-omap2/board-3430sdp.c -@@ -806,5 +806,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") - .init_early = omap_3430sdp_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap_3430sdp_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c -index 2ec2d76..e4f37b5 100644 ---- a/arch/arm/mach-omap2/board-3630sdp.c -+++ b/arch/arm/mach-omap2/board-3630sdp.c -@@ -221,5 +221,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") - .init_early = omap_sdp_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap_sdp_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c -index 39a8062..e8caced 100644 ---- a/arch/arm/mach-omap2/board-4430sdp.c -+++ b/arch/arm/mach-omap2/board-4430sdp.c -@@ -768,5 +768,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") - .init_early = omap_4430sdp_init_early, - .init_irq = gic_init_irq, - .init_machine = omap_4430sdp_init, -- .timer = &omap_timer, -+ .timer = &omap4_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c -index 0bed0a4..5f2b55f 100644 ---- a/arch/arm/mach-omap2/board-am3517crane.c -+++ b/arch/arm/mach-omap2/board-am3517crane.c -@@ -106,5 +106,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") - .init_early = am3517_crane_init_early, - .init_irq = omap3_init_irq, - .init_machine = am3517_crane_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c -index 0db0fb8..f3006c3 100644 ---- a/arch/arm/mach-omap2/board-am3517evm.c -+++ b/arch/arm/mach-omap2/board-am3517evm.c -@@ -496,5 +496,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") - .init_early = am3517_evm_init_early, - .init_irq = omap3_init_irq, - .init_machine = am3517_evm_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c -index 93576c8..7021170 100644 ---- a/arch/arm/mach-omap2/board-apollon.c -+++ b/arch/arm/mach-omap2/board-apollon.c -@@ -356,5 +356,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") - .init_early = omap_apollon_init_early, - .init_irq = omap2_init_irq, - .init_machine = omap_apollon_init, -- .timer = &omap_timer, -+ .timer = &omap2_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c -index 43b1de5..1a18d3b 100644 ---- a/arch/arm/mach-omap2/board-cm-t35.c -+++ b/arch/arm/mach-omap2/board-cm-t35.c -@@ -646,5 +646,5 @@ MACHINE_START(CM_T35, "Compulab CM-T35") - .init_early = cm_t35_init_early, - .init_irq = omap3_init_irq, - .init_machine = cm_t35_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c -index 8f15222..aa67240 100644 ---- a/arch/arm/mach-omap2/board-cm-t3517.c -+++ b/arch/arm/mach-omap2/board-cm-t3517.c -@@ -306,5 +306,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") - .init_early = cm_t3517_init_early, - .init_irq = omap3_init_irq, - .init_machine = cm_t3517_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c -index 73f3a22..46d144d 100644 ---- a/arch/arm/mach-omap2/board-devkit8000.c -+++ b/arch/arm/mach-omap2/board-devkit8000.c -@@ -709,5 +709,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") - .init_early = devkit8000_init_early, - .init_irq = devkit8000_init_irq, - .init_machine = devkit8000_init, -- .timer = &omap_timer, -+ .timer = &omap3_secure_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c -index ccd503a..c6ecf60 100644 ---- a/arch/arm/mach-omap2/board-generic.c -+++ b/arch/arm/mach-omap2/board-generic.c -@@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") - .init_early = omap_generic_init_early, - .init_irq = omap2_init_irq, - .init_machine = omap_generic_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c -index 2e16d6c..45de2b3 100644 ---- a/arch/arm/mach-omap2/board-h4.c -+++ b/arch/arm/mach-omap2/board-h4.c -@@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") - .init_early = omap_h4_init_early, - .init_irq = omap_h4_init_irq, - .init_machine = omap_h4_init, -- .timer = &omap_timer, -+ .timer = &omap2_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c -index f22a76a..f683835 100644 ---- a/arch/arm/mach-omap2/board-igep0020.c -+++ b/arch/arm/mach-omap2/board-igep0020.c -@@ -708,7 +708,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") - .init_early = igep_init_early, - .init_irq = omap3_init_irq, - .init_machine = igep_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END - - MACHINE_START(IGEP0030, "IGEP OMAP3 module") -@@ -718,5 +718,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") - .init_early = igep_init_early, - .init_irq = omap3_init_irq, - .init_machine = igep_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c -index 9671843..5d4328f 100644 ---- a/arch/arm/mach-omap2/board-ldp.c -+++ b/arch/arm/mach-omap2/board-ldp.c -@@ -350,5 +350,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") - .init_early = omap_ldp_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap_ldp_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c -index 9c791a2..e11f0c5 100644 ---- a/arch/arm/mach-omap2/board-n8x0.c -+++ b/arch/arm/mach-omap2/board-n8x0.c -@@ -701,7 +701,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") - .init_early = n8x0_init_early, - .init_irq = omap2_init_irq, - .init_machine = n8x0_init_machine, -- .timer = &omap_timer, -+ .timer = &omap2_timer, - MACHINE_END - - MACHINE_START(NOKIA_N810, "Nokia N810") -@@ -711,7 +711,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") - .init_early = n8x0_init_early, - .init_irq = omap2_init_irq, - .init_machine = n8x0_init_machine, -- .timer = &omap_timer, -+ .timer = &omap2_timer, - MACHINE_END - - MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") -@@ -721,5 +721,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") - .init_early = n8x0_init_early, - .init_irq = omap2_init_irq, - .init_machine = n8x0_init_machine, -- .timer = &omap_timer, -+ .timer = &omap2_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index eaead5e..9ee16f6 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -596,5 +596,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - .init_early = omap3_beagle_init_early, - .init_irq = omap3_beagle_init_irq, - .init_machine = omap3_beagle_init, -- .timer = &omap_timer, -+ .timer = &omap3_secure_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c -index d39f53f..6f957ed 100644 ---- a/arch/arm/mach-omap2/board-omap3evm.c -+++ b/arch/arm/mach-omap2/board-omap3evm.c -@@ -741,5 +741,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") - .init_early = omap3_evm_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap3_evm_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c -index b63f1c2..469259a 100644 ---- a/arch/arm/mach-omap2/board-omap3logic.c -+++ b/arch/arm/mach-omap2/board-omap3logic.c -@@ -215,7 +215,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") - .init_early = omap3logic_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap3logic_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END - - MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") -@@ -224,5 +224,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") - .init_early = omap3logic_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap3logic_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c -index 1d90b90..d4ea940 100644 ---- a/arch/arm/mach-omap2/board-omap3pandora.c -+++ b/arch/arm/mach-omap2/board-omap3pandora.c -@@ -652,5 +652,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") - .init_early = omap3pandora_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap3pandora_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c -index dfa1401..2fa8fae 100644 ---- a/arch/arm/mach-omap2/board-omap3stalker.c -+++ b/arch/arm/mach-omap2/board-omap3stalker.c -@@ -557,5 +557,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") - .init_early = omap3_stalker_init_early, - .init_irq = omap3_stalker_init_irq, - .init_machine = omap3_stalker_init, -- .timer = &omap_timer, -+ .timer = &omap3_secure_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index ae97910..8c71fd2 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -449,5 +449,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") - .init_early = omap3_touchbook_init_early, - .init_irq = omap3_touchbook_init_irq, - .init_machine = omap3_touchbook_init, -- .timer = &omap_timer, -+ .timer = &omap3_secure_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c -index 6d2372b..dc1d6dc 100644 ---- a/arch/arm/mach-omap2/board-omap4panda.c -+++ b/arch/arm/mach-omap2/board-omap4panda.c -@@ -712,5 +712,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") - .init_early = omap4_panda_init_early, - .init_irq = gic_init_irq, - .init_machine = omap4_panda_init, -- .timer = &omap_timer, -+ .timer = &omap4_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index e3928f23..1bf2f39 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -617,5 +617,5 @@ MACHINE_START(OVERO, "Gumstix Overo") - .init_early = overo_init_early, - .init_irq = omap3_init_irq, - .init_machine = overo_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c -index 9c3d115..54dceb1 100644 ---- a/arch/arm/mach-omap2/board-rm680.c -+++ b/arch/arm/mach-omap2/board-rm680.c -@@ -165,5 +165,5 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") - .init_early = rm680_init_early, - .init_irq = omap3_init_irq, - .init_machine = rm680_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c -index ee35e4e..5ea142f 100644 ---- a/arch/arm/mach-omap2/board-rx51.c -+++ b/arch/arm/mach-omap2/board-rx51.c -@@ -162,5 +162,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") - .init_early = rx51_init_early, - .init_irq = omap3_init_irq, - .init_machine = rx51_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c -index 713c20f..a85d5b0 100644 ---- a/arch/arm/mach-omap2/board-ti8168evm.c -+++ b/arch/arm/mach-omap2/board-ti8168evm.c -@@ -52,6 +52,6 @@ MACHINE_START(TI8168EVM, "ti8168evm") - .map_io = ti8168_evm_map_io, - .init_early = ti8168_init_early, - .init_irq = ti816x_init_irq, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - .init_machine = ti8168_evm_init, - MACHINE_END -diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c -index 97a3f0b..8a98c3c 100644 ---- a/arch/arm/mach-omap2/board-zoom.c -+++ b/arch/arm/mach-omap2/board-zoom.c -@@ -139,7 +139,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") - .init_early = omap_zoom_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap_zoom_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END - - MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") -@@ -149,5 +149,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") - .init_early = omap_zoom_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap_zoom_init, -- .timer = &omap_timer, -+ .timer = &omap3_timer, - MACHINE_END -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c -index 3b9cf85..a0d8e83 100644 ---- a/arch/arm/mach-omap2/timer-gp.c -+++ b/arch/arm/mach-omap2/timer-gp.c -@@ -247,20 +247,41 @@ static void __init omap2_gp_clocksource_init(void) - } - #endif - --static void __init omap2_gp_timer_init(void) -+#define OMAP_SYS_TIMER_INIT(name) \ -+static void __init omap##name##_timer_init(void) \ -+{ \ -+ omap_dm_timer_init(); \ -+ omap2_gp_clockevent_init(); \ -+ omap2_gp_clocksource_init(); \ -+} -+ -+#define OMAP_SYS_TIMER(name) \ -+struct sys_timer omap##name##_timer = { \ -+ .init = omap##name##_timer_init, \ -+}; -+ -+#ifdef CONFIG_ARCH_OMAP2 -+OMAP_SYS_TIMER_INIT(2) -+OMAP_SYS_TIMER(2) -+#endif -+ -+#ifdef CONFIG_ARCH_OMAP3 -+OMAP_SYS_TIMER_INIT(3) -+OMAP_SYS_TIMER(3) -+OMAP_SYS_TIMER_INIT(3_secure) -+OMAP_SYS_TIMER(3_secure) -+#endif -+ -+#ifdef CONFIG_ARCH_OMAP4 -+static void __init omap4_timer_init(void) - { - #ifdef CONFIG_LOCAL_TIMERS -- if (cpu_is_omap44xx()) { -- twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); -- BUG_ON(!twd_base); -- } -+ twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); -+ BUG_ON(!twd_base); - #endif - omap_dm_timer_init(); -- - omap2_gp_clockevent_init(); - omap2_gp_clocksource_init(); - } -- --struct sys_timer omap_timer = { -- .init = omap2_gp_timer_init, --}; -+OMAP_SYS_TIMER(4) -+#endif -diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h -index 5288130..4564cc6 100644 ---- a/arch/arm/plat-omap/include/plat/common.h -+++ b/arch/arm/plat-omap/include/plat/common.h -@@ -34,7 +34,11 @@ - struct sys_timer; - - extern void omap_map_common_io(void); --extern struct sys_timer omap_timer; -+extern struct sys_timer omap1_timer; -+extern struct sys_timer omap2_timer; -+extern struct sys_timer omap3_timer; -+extern struct sys_timer omap3_secure_timer; -+extern struct sys_timer omap4_timer; - extern bool omap_32k_timer_init(void); - extern int __init omap_init_clocksource_32k(void); - extern unsigned long long notrace omap_32k_sched_clock(void); -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h -index d6c70d2..330bd17 100644 ---- a/arch/arm/plat-omap/include/plat/dmtimer.h -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h -@@ -57,7 +57,6 @@ - #define OMAP_TIMER_IP_VERSION_1 0x1 - struct omap_dm_timer; - extern struct omap_dm_timer *gptimer_wakeup; --extern struct sys_timer omap_timer; - struct clk; - - int omap_dm_timer_init(void); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch deleted file mode 100644 index ba3bc42..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch +++ /dev/null @@ -1,287 +0,0 @@ -From 99573b33f37eede2d3d36ae71c34f5d72ccdc672 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:48 -0700 -Subject: [PATCH 005/149] omap: Move dmtimer defines to dmtimer.h - -These will be needed when dmtimer platform init code gets split -for omap1 and omap2+. These will also be needed for separate -sys_timer init and driver init for the rest of the hardware timers -in the following patches. No functional changes. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/plat-omap/dmtimer.c | 121 ---------------------------- - arch/arm/plat-omap/include/plat/dmtimer.h | 125 +++++++++++++++++++++++++++++ - 2 files changed, 125 insertions(+), 121 deletions(-) - -diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c -index ee9f6eb..dfdc3b2 100644 ---- a/arch/arm/plat-omap/dmtimer.c -+++ b/arch/arm/plat-omap/dmtimer.c -@@ -41,127 +41,6 @@ - #include <plat/dmtimer.h> - #include <mach/irqs.h> - --/* register offsets */ --#define _OMAP_TIMER_ID_OFFSET 0x00 --#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 --#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 --#define _OMAP_TIMER_STAT_OFFSET 0x18 --#define _OMAP_TIMER_INT_EN_OFFSET 0x1c --#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 --#define _OMAP_TIMER_CTRL_OFFSET 0x24 --#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) --#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) --#define OMAP_TIMER_CTRL_PT (1 << 12) --#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) --#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) --#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) --#define OMAP_TIMER_CTRL_SCPWM (1 << 7) --#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ --#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ --#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */ --#define OMAP_TIMER_CTRL_POSTED (1 << 2) --#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ --#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ --#define _OMAP_TIMER_COUNTER_OFFSET 0x28 --#define _OMAP_TIMER_LOAD_OFFSET 0x2c --#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 --#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 --#define WP_NONE 0 /* no write pending bit */ --#define WP_TCLR (1 << 0) --#define WP_TCRR (1 << 1) --#define WP_TLDR (1 << 2) --#define WP_TTGR (1 << 3) --#define WP_TMAR (1 << 4) --#define WP_TPIR (1 << 5) --#define WP_TNIR (1 << 6) --#define WP_TCVR (1 << 7) --#define WP_TOCR (1 << 8) --#define WP_TOWR (1 << 9) --#define _OMAP_TIMER_MATCH_OFFSET 0x38 --#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c --#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 --#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */ --#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */ --#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */ --#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */ --#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */ --#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */ -- --/* register offsets with the write pending bit encoded */ --#define WPSHIFT 16 -- --#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \ -- | (WP_TCLR << WPSHIFT)) -- --#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \ -- | (WP_TCRR << WPSHIFT)) -- --#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \ -- | (WP_TLDR << WPSHIFT)) -- --#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \ -- | (WP_TTGR << WPSHIFT)) -- --#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \ -- | (WP_TMAR << WPSHIFT)) -- --#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \ -- | (WP_NONE << WPSHIFT)) -- --#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \ -- | (WP_TPIR << WPSHIFT)) -- --#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \ -- | (WP_TNIR << WPSHIFT)) -- --#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \ -- | (WP_TCVR << WPSHIFT)) -- --#define OMAP_TIMER_TICK_INT_MASK_SET_REG \ -- (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT)) -- --#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \ -- (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) -- --struct omap_dm_timer { -- unsigned long phys_base; -- int irq; --#ifdef CONFIG_ARCH_OMAP2PLUS -- struct clk *iclk, *fclk; --#endif -- void __iomem *io_base; -- unsigned reserved:1; -- unsigned enabled:1; -- unsigned posted:1; --}; -- - static int dm_timer_count; - - #ifdef CONFIG_ARCH_OMAP1 -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h -index 330bd17..3203105 100644 ---- a/arch/arm/plat-omap/include/plat/dmtimer.h -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h -@@ -92,5 +92,130 @@ void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value - - int omap_dm_timers_active(void); - -+/* -+ * Do not use the defines below, they are not needed. They should be only -+ * used by dmtimer.c and sys_timer related code. -+ */ -+ -+/* register offsets */ -+#define _OMAP_TIMER_ID_OFFSET 0x00 -+#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 -+#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 -+#define _OMAP_TIMER_STAT_OFFSET 0x18 -+#define _OMAP_TIMER_INT_EN_OFFSET 0x1c -+#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 -+#define _OMAP_TIMER_CTRL_OFFSET 0x24 -+#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) -+#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) -+#define OMAP_TIMER_CTRL_PT (1 << 12) -+#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) -+#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) -+#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) -+#define OMAP_TIMER_CTRL_SCPWM (1 << 7) -+#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ -+#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ -+#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */ -+#define OMAP_TIMER_CTRL_POSTED (1 << 2) -+#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ -+#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ -+#define _OMAP_TIMER_COUNTER_OFFSET 0x28 -+#define _OMAP_TIMER_LOAD_OFFSET 0x2c -+#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 -+#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 -+#define WP_NONE 0 /* no write pending bit */ -+#define WP_TCLR (1 << 0) -+#define WP_TCRR (1 << 1) -+#define WP_TLDR (1 << 2) -+#define WP_TTGR (1 << 3) -+#define WP_TMAR (1 << 4) -+#define WP_TPIR (1 << 5) -+#define WP_TNIR (1 << 6) -+#define WP_TCVR (1 << 7) -+#define WP_TOCR (1 << 8) -+#define WP_TOWR (1 << 9) -+#define _OMAP_TIMER_MATCH_OFFSET 0x38 -+#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c -+#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 -+#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */ -+#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */ -+#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */ -+#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */ -+#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */ -+#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */ -+ -+/* register offsets with the write pending bit encoded */ -+#define WPSHIFT 16 -+ -+#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \ -+ | (WP_TCLR << WPSHIFT)) -+ -+#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \ -+ | (WP_TCRR << WPSHIFT)) -+ -+#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \ -+ | (WP_TLDR << WPSHIFT)) -+ -+#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \ -+ | (WP_TTGR << WPSHIFT)) -+ -+#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \ -+ | (WP_TMAR << WPSHIFT)) -+ -+#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \ -+ | (WP_NONE << WPSHIFT)) -+ -+#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \ -+ | (WP_TPIR << WPSHIFT)) -+ -+#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \ -+ | (WP_TNIR << WPSHIFT)) -+ -+#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \ -+ | (WP_TCVR << WPSHIFT)) -+ -+#define OMAP_TIMER_TICK_INT_MASK_SET_REG \ -+ (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT)) -+ -+#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \ -+ (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) -+ -+struct omap_dm_timer { -+ unsigned long phys_base; -+ int irq; -+#ifdef CONFIG_ARCH_OMAP2PLUS -+ struct clk *iclk, *fclk; -+#endif -+ void __iomem *io_base; -+ unsigned reserved:1; -+ unsigned enabled:1; -+ unsigned posted:1; -+}; - - #endif /* __ASM_ARCH_DMTIMER_H */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into-inline-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into-inline-.patch deleted file mode 100644 index 36a9142..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into-inline-.patch +++ /dev/null @@ -1,323 +0,0 @@ -From 902f3165afa284d4bd6ff22db7654318c98a5ce0 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:48 -0700 -Subject: [PATCH 006/149] omap: Make a subset of dmtimer functions into inline functions - -This will allow us to share the code between system timer and -dmtimer device driver code without having to initialize all the -dmtimers early. This change will also make the timer_set_next_event -more efficient as the inline functions will optimize the code -better for the timer reprogramming. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/plat-omap/dmtimer.c | 78 ++++--------------- - arch/arm/plat-omap/include/plat/dmtimer.h | 119 +++++++++++++++++++++++++++++ - 2 files changed, 136 insertions(+), 61 deletions(-) - -diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c -index dfdc3b2..7c5cb4e 100644 ---- a/arch/arm/plat-omap/dmtimer.c -+++ b/arch/arm/plat-omap/dmtimer.c -@@ -170,11 +170,7 @@ static spinlock_t dm_timer_lock; - */ - static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) - { -- if (timer->posted) -- while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) -- & (reg >> WPSHIFT)) -- cpu_relax(); -- return readl(timer->io_base + (reg & 0xff)); -+ return __omap_dm_timer_read(timer->io_base, reg, timer->posted); - } - - /* -@@ -186,11 +182,7 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) - static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, - u32 value) - { -- if (timer->posted) -- while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) -- & (reg >> WPSHIFT)) -- cpu_relax(); -- writel(value, timer->io_base + (reg & 0xff)); -+ __omap_dm_timer_write(timer->io_base, reg, value, timer->posted); - } - - static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) -@@ -209,7 +201,7 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) - - static void omap_dm_timer_reset(struct omap_dm_timer *timer) - { -- u32 l; -+ int autoidle = 0, wakeup = 0; - - if (!cpu_class_is_omap2() || timer != &dm_timers[0]) { - omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); -@@ -217,28 +209,21 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer) - } - omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); - -- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG); -- l |= 0x02 << 3; /* Set to smart-idle mode */ -- l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ -- - /* Enable autoidle on OMAP2 / OMAP3 */ - if (cpu_is_omap24xx() || cpu_is_omap34xx()) -- l |= 0x1 << 0; -+ autoidle = 1; - - /* - * Enable wake-up on OMAP2 CPUs. - */ - if (cpu_class_is_omap2()) -- l |= 1 << 2; -- omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l); -+ wakeup = 1; - -- /* Match hardware reset default of posted mode */ -- omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, -- OMAP_TIMER_CTRL_POSTED); -+ __omap_dm_timer_reset(timer->io_base, autoidle, wakeup); - timer->posted = 1; - } - --static void omap_dm_timer_prepare(struct omap_dm_timer *timer) -+void omap_dm_timer_prepare(struct omap_dm_timer *timer) - { - omap_dm_timer_enable(timer); - omap_dm_timer_reset(timer); -@@ -410,25 +395,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start); - - void omap_dm_timer_stop(struct omap_dm_timer *timer) - { -- u32 l; -+ unsigned long rate = 0; - -- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); -- if (l & OMAP_TIMER_CTRL_ST) { -- l &= ~0x1; -- omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); - #ifdef CONFIG_ARCH_OMAP2PLUS -- /* Readback to make sure write has completed */ -- omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); -- /* -- * Wait for functional clock period x 3.5 to make sure that -- * timer is stopped -- */ -- udelay(3500000 / clk_get_rate(timer->fclk) + 1); -+ rate = clk_get_rate(timer->fclk); - #endif -- } -- /* Ack possibly pending interrupt */ -- omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, -- OMAP_TIMER_INT_OVERFLOW); -+ -+ __omap_dm_timer_stop(timer->io_base, timer->posted, rate); - } - EXPORT_SYMBOL_GPL(omap_dm_timer_stop); - -@@ -451,22 +424,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); - - int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) - { -- int ret = -EINVAL; -- - if (source < 0 || source >= 3) - return -EINVAL; - -- clk_disable(timer->fclk); -- ret = clk_set_parent(timer->fclk, dm_source_clocks[source]); -- clk_enable(timer->fclk); -- -- /* -- * When the functional clock disappears, too quick writes seem -- * to cause an abort. XXX Is this still necessary? -- */ -- __delay(300000); -- -- return ret; -+ return __omap_dm_timer_set_source(timer->fclk, -+ dm_source_clocks[source]); - } - EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); - -@@ -504,8 +466,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, - } - l |= OMAP_TIMER_CTRL_ST; - -- omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load); -- omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); -+ __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted); - } - EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); - -@@ -558,8 +519,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler); - void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, - unsigned int value) - { -- omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value); -- omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value); -+ __omap_dm_timer_int_enable(timer->io_base, value); - } - EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); - -@@ -575,17 +535,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status); - - void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) - { -- omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); -+ __omap_dm_timer_write_status(timer->io_base, value); - } - EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); - - unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) - { -- unsigned int l; -- -- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG); -- -- return l; -+ return __omap_dm_timer_read_counter(timer->io_base, timer->posted); - } - EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); - -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h -index 3203105..54664a7 100644 ---- a/arch/arm/plat-omap/include/plat/dmtimer.h -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h -@@ -32,6 +32,9 @@ - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -+#include <linux/clk.h> -+#include <linux/delay.h> -+ - #ifndef __ASM_ARCH_DMTIMER_H - #define __ASM_ARCH_DMTIMER_H - -@@ -218,4 +221,120 @@ struct omap_dm_timer { - unsigned posted:1; - }; - -+void omap_dm_timer_prepare(struct omap_dm_timer *timer); -+ -+static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg, -+ int posted) -+{ -+ if (posted) -+ while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) -+ & (reg >> WPSHIFT)) -+ cpu_relax(); -+ -+ return __raw_readl(base + (reg & 0xff)); -+} -+ -+static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val, -+ int posted) -+{ -+ if (posted) -+ while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) -+ & (reg >> WPSHIFT)) -+ cpu_relax(); -+ -+ __raw_writel(val, base + (reg & 0xff)); -+} -+ -+/* Assumes the source clock has been set by caller */ -+static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle, -+ int wakeup) -+{ -+ u32 l; -+ -+ l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0); -+ l |= 0x02 << 3; /* Set to smart-idle mode */ -+ l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ -+ -+ if (autoidle) -+ l |= 0x1 << 0; -+ -+ if (wakeup) -+ l |= 1 << 2; -+ -+ __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0); -+ -+ /* Match hardware reset default of posted mode */ -+ __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG, -+ OMAP_TIMER_CTRL_POSTED, 0); -+} -+ -+static inline int __omap_dm_timer_set_source(struct clk *timer_fck, -+ struct clk *parent) -+{ -+ int ret; -+ -+ clk_disable(timer_fck); -+ ret = clk_set_parent(timer_fck, parent); -+ clk_enable(timer_fck); -+ -+ /* -+ * When the functional clock disappears, too quick writes seem -+ * to cause an abort. XXX Is this still necessary? -+ */ -+ __delay(300000); -+ -+ return ret; -+} -+ -+static inline void __omap_dm_timer_stop(void __iomem *base, int posted, -+ unsigned long rate) -+{ -+ u32 l; -+ -+ l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); -+ if (l & OMAP_TIMER_CTRL_ST) { -+ l &= ~0x1; -+ __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, posted); -+#ifdef CONFIG_ARCH_OMAP2PLUS -+ /* Readback to make sure write has completed */ -+ __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); -+ /* -+ * Wait for functional clock period x 3.5 to make sure that -+ * timer is stopped -+ */ -+ udelay(3500000 / rate + 1); -+#endif -+ } -+ -+ /* Ack possibly pending interrupt */ -+ __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, -+ OMAP_TIMER_INT_OVERFLOW, 0); -+} -+ -+static inline void __omap_dm_timer_load_start(void __iomem *base, u32 ctrl, -+ unsigned int load, int posted) -+{ -+ __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, posted); -+ __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, posted); -+} -+ -+static inline void __omap_dm_timer_int_enable(void __iomem *base, -+ unsigned int value) -+{ -+ __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0); -+ __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, value, 0); -+} -+ -+static inline unsigned int __omap_dm_timer_read_counter(void __iomem *base, -+ int posted) -+{ -+ return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, posted); -+} -+ -+static inline void __omap_dm_timer_write_status(void __iomem *base, -+ unsigned int value) -+{ -+ __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0); -+} -+ - #endif /* __ASM_ARCH_DMTIMER_H */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch deleted file mode 100644 index c7747ed..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch +++ /dev/null @@ -1,279 +0,0 @@ -From 8f322fa141e55da412c5d73f07f93c1e02965522 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:48 -0700 -Subject: [PATCH 007/149] omap2+: Use dmtimer macros for clockevent - -This patch makes timer-gp.c to use only a subset of dmtimer -functions without the need to initialize dmtimer code early. - -Also note that now with the inline functions, timer_set_next_event -becomes more efficient in the lines of assembly code. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/timer-gp.c | 147 ++++++++++++++++++++++------- - arch/arm/plat-omap/include/plat/dmtimer.h | 1 + - 2 files changed, 113 insertions(+), 35 deletions(-) - -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c -index a0d8e83..62c0d5c 100644 ---- a/arch/arm/mach-omap2/timer-gp.c -+++ b/arch/arm/mach-omap2/timer-gp.c -@@ -45,10 +45,33 @@ - - #include "timer-gp.h" - -+/* Parent clocks, eventually these will come from the clock framework */ -+ -+#define OMAP2_MPU_SOURCE "sys_ck" -+#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE -+#define OMAP4_MPU_SOURCE "sys_clkin_ck" -+#define OMAP2_32K_SOURCE "func_32k_ck" -+#define OMAP3_32K_SOURCE "omap_32k_fck" -+#define OMAP4_32K_SOURCE "sys_32k_ck" -+ -+#ifdef CONFIG_OMAP_32K_TIMER -+#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE -+#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE -+#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE -+#define OMAP3_SECURE_TIMER 12 -+#else -+#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE -+#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE -+#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE -+#define OMAP3_SECURE_TIMER 1 -+#endif - - /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ - #define MAX_GPTIMER_ID 12 - -+/* Clockevent code */ -+ -+static struct omap_dm_timer clkev; - static struct omap_dm_timer *gptimer; - static struct clock_event_device clockevent_gpt; - static u8 __initdata gptimer_id = 1; -@@ -57,10 +80,9 @@ struct omap_dm_timer *gptimer_wakeup; - - static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) - { -- struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id; - struct clock_event_device *evt = &clockevent_gpt; - -- omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW); -+ __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); - - evt->event_handler(evt); - return IRQ_HANDLED; -@@ -75,7 +97,8 @@ static struct irqaction omap2_gp_timer_irq = { - static int omap2_gp_timer_set_next_event(unsigned long cycles, - struct clock_event_device *evt) - { -- omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles); -+ __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, -+ 0xffffffff - cycles, 1); - - return 0; - } -@@ -85,13 +108,18 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, - { - u32 period; - -- omap_dm_timer_stop(gptimer); -+ __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); - - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: -- period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; -+ period = clkev.rate / HZ; - period -= 1; -- omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); -+ /* Looks like we need to first set the load value separately */ -+ __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, -+ 0xffffffff - period, 1); -+ __omap_dm_timer_load_start(clkev.io_base, -+ OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, -+ 0xffffffff - period, 1); - break; - case CLOCK_EVT_MODE_ONESHOT: - break; -@@ -130,43 +158,89 @@ int __init omap2_gp_clockevent_set_gptimer(u8 id) - return 0; - } - --static void __init omap2_gp_clockevent_init(void) -+static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, -+ int gptimer_id, -+ const char *fck_source) - { -- u32 tick_rate; -- int src; -- char clockevent_hwmod_name[8]; /* 8 = sizeof("timerXX0") */ -+ char name[10]; /* 10 = sizeof("gptXX_Xck0") */ -+ struct omap_hwmod *oh; -+ size_t size; -+ int res = 0; -+ -+ sprintf(name, "timer%d", gptimer_id); -+ omap_hwmod_setup_one(name); -+ oh = omap_hwmod_lookup(name); -+ if (!oh) -+ return -ENODEV; -+ -+ timer->irq = oh->mpu_irqs[0].irq; -+ timer->phys_base = oh->slaves[0]->addr->pa_start; -+ size = oh->slaves[0]->addr->pa_end - timer->phys_base; -+ -+ /* Static mapping, never released */ -+ timer->io_base = ioremap(timer->phys_base, size); -+ if (!timer->io_base) -+ return -ENXIO; -+ -+ /* After the dmtimer is using hwmod these clocks won't be needed */ -+ sprintf(name, "gpt%d_fck", gptimer_id); -+ timer->fclk = clk_get(NULL, name); -+ if (IS_ERR(timer->fclk)) -+ return -ENODEV; -+ -+ sprintf(name, "gpt%d_ick", gptimer_id); -+ timer->iclk = clk_get(NULL, name); -+ if (IS_ERR(timer->iclk)) { -+ clk_put(timer->fclk); -+ return -ENODEV; -+ } - -- inited = 1; -+ omap_hwmod_enable(oh); -+ -+ if (gptimer_id != 12) { -+ struct clk *src; -+ -+ src = clk_get(NULL, fck_source); -+ if (IS_ERR(src)) { -+ res = -EINVAL; -+ } else { -+ res = __omap_dm_timer_set_source(timer->fclk, src); -+ if (IS_ERR_VALUE(res)) -+ pr_warning("%s: timer%i cannot set source\n", -+ __func__, gptimer_id); -+ clk_put(src); -+ } -+ } -+ __omap_dm_timer_reset(timer->io_base, 1, 1); -+ timer->posted = 1; -+ -+ timer->rate = clk_get_rate(timer->fclk); - -- sprintf(clockevent_hwmod_name, "timer%d", gptimer_id); -- omap_hwmod_setup_one(clockevent_hwmod_name); -+ timer->reserved = 1; - - gptimer = omap_dm_timer_request_specific(gptimer_id); - BUG_ON(gptimer == NULL); - gptimer_wakeup = gptimer; - --#if defined(CONFIG_OMAP_32K_TIMER) -- src = OMAP_TIMER_SRC_32_KHZ; --#else -- src = OMAP_TIMER_SRC_SYS_CLK; -- WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the " -- "secure 32KiHz clock source\n"); --#endif -+ return res; -+} - -- if (gptimer_id != 12) -- WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)), -- "timer-gp: omap_dm_timer_set_source() failed\n"); -+static void __init omap2_gp_clockevent_init(int gptimer_id, -+ const char *fck_source) -+{ -+ int res; - -- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); -+ inited = 1; - -- pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", -- gptimer_id, tick_rate); -+ res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); -+ BUG_ON(res); - - omap2_gp_timer_irq.dev_id = (void *)gptimer; -- setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); -- omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); -+ setup_irq(clkev.irq, &omap2_gp_timer_irq); - -- clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC, -+ __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); -+ -+ clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, - clockevent_gpt.shift); - clockevent_gpt.max_delta_ns = - clockevent_delta2ns(0xffffffff, &clockevent_gpt); -@@ -176,6 +250,9 @@ static void __init omap2_gp_clockevent_init(void) - - clockevent_gpt.cpumask = cpumask_of(0); - clockevents_register_device(&clockevent_gpt); -+ -+ pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", -+ gptimer_id, clkev.rate); - } - - /* Clocksource code */ -@@ -247,11 +324,11 @@ static void __init omap2_gp_clocksource_init(void) - } - #endif - --#define OMAP_SYS_TIMER_INIT(name) \ -+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \ - static void __init omap##name##_timer_init(void) \ - { \ - omap_dm_timer_init(); \ -- omap2_gp_clockevent_init(); \ -+ omap2_gp_clockevent_init((clkev_nr), clkev_src); \ - omap2_gp_clocksource_init(); \ - } - -@@ -261,14 +338,14 @@ struct sys_timer omap##name##_timer = { \ - }; - - #ifdef CONFIG_ARCH_OMAP2 --OMAP_SYS_TIMER_INIT(2) -+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE) - OMAP_SYS_TIMER(2) - #endif - - #ifdef CONFIG_ARCH_OMAP3 --OMAP_SYS_TIMER_INIT(3) -+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE) - OMAP_SYS_TIMER(3) --OMAP_SYS_TIMER_INIT(3_secure) -+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE) - OMAP_SYS_TIMER(3_secure) - #endif - -@@ -280,7 +357,7 @@ static void __init omap4_timer_init(void) - BUG_ON(!twd_base); - #endif - omap_dm_timer_init(); -- omap2_gp_clockevent_init(); -+ omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); - omap2_gp_clocksource_init(); - } - OMAP_SYS_TIMER(4) -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h -index 54664a7..dd8b3ff 100644 ---- a/arch/arm/plat-omap/include/plat/dmtimer.h -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h -@@ -216,6 +216,7 @@ struct omap_dm_timer { - struct clk *iclk, *fclk; - #endif - void __iomem *io_base; -+ unsigned long rate; - unsigned reserved:1; - unsigned enabled:1; - unsigned posted:1; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch deleted file mode 100644 index 98e356c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch +++ /dev/null @@ -1,177 +0,0 @@ -From 6e1cacccf1349d97c83c7bc93e4d3c15e731c3ad Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:49 -0700 -Subject: [PATCH 008/149] omap2+: Remove gptimer_wakeup for now - -This removes the support for setting the wake-up timer for debugging. - -Later on we can reserve gptimer1 for PM code only and have similar -functionality. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/pm-debug.c | 28 ---------------------------- - arch/arm/mach-omap2/pm.h | 6 ------ - arch/arm/mach-omap2/pm34xx.c | 4 ---- - arch/arm/mach-omap2/timer-gp.c | 8 +------- - arch/arm/plat-omap/include/plat/dmtimer.h | 1 - - 5 files changed, 1 insertions(+), 46 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c -index e01da45..2c35bd3 100644 ---- a/arch/arm/mach-omap2/pm-debug.c -+++ b/arch/arm/mach-omap2/pm-debug.c -@@ -31,7 +31,6 @@ - #include <plat/board.h> - #include "powerdomain.h" - #include "clockdomain.h" --#include <plat/dmtimer.h> - #include <plat/omap-pm.h> - - #include "cm2xxx_3xxx.h" -@@ -41,8 +40,6 @@ - int omap2_pm_debug; - u32 enable_off_mode; - u32 sleep_while_idle; --u32 wakeup_timer_seconds; --u32 wakeup_timer_milliseconds; - - #define DUMP_PRM_MOD_REG(mod, reg) \ - regs[reg_count].name = #mod "." #reg; \ -@@ -162,23 +159,6 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) - printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); - } - --void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds) --{ -- u32 tick_rate, cycles; -- -- if (!seconds && !milliseconds) -- return; -- -- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup)); -- cycles = tick_rate * seconds + tick_rate * milliseconds / 1000; -- omap_dm_timer_stop(gptimer_wakeup); -- omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles); -- -- pr_info("PM: Resume timer in %u.%03u secs" -- " (%d ticks at %d ticks/sec.)\n", -- seconds, milliseconds, cycles, tick_rate); --} -- - #ifdef CONFIG_DEBUG_FS - #include <linux/debugfs.h> - #include <linux/seq_file.h> -@@ -576,9 +556,6 @@ static int option_set(void *data, u64 val) - { - u32 *option = data; - -- if (option == &wakeup_timer_milliseconds && val >= 1000) -- return -EINVAL; -- - *option = val; - - if (option == &enable_off_mode) { -@@ -641,11 +618,6 @@ static int pm_dbg_init(void) - &enable_off_mode, &pm_dbg_option_fops); - (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, - &sleep_while_idle, &pm_dbg_option_fops); -- (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d, -- &wakeup_timer_seconds, &pm_dbg_option_fops); -- (void) debugfs_create_file("wakeup_timer_milliseconds", -- S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds, -- &pm_dbg_option_fops); - pm_dbg_init_done = 1; - - return 0; -diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h -index 45bcfce..c3a367e 100644 ---- a/arch/arm/mach-omap2/pm.h -+++ b/arch/arm/mach-omap2/pm.h -@@ -60,19 +60,13 @@ inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) - extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); - extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); - --extern u32 wakeup_timer_seconds; --extern u32 wakeup_timer_milliseconds; --extern struct omap_dm_timer *gptimer_wakeup; -- - #ifdef CONFIG_PM_DEBUG - extern void omap2_pm_dump(int mode, int resume, unsigned int us); --extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds); - extern int omap2_pm_debug; - extern u32 enable_off_mode; - extern u32 sleep_while_idle; - #else - #define omap2_pm_dump(mode, resume, us) do {} while (0); --#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0); - #define omap2_pm_debug 0 - #define enable_off_mode 0 - #define sleep_while_idle 0 -diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c -index c155c9d..4cb636a 100644 ---- a/arch/arm/mach-omap2/pm34xx.c -+++ b/arch/arm/mach-omap2/pm34xx.c -@@ -534,10 +534,6 @@ static int omap3_pm_suspend(void) - struct power_state *pwrst; - int state, ret = 0; - -- if (wakeup_timer_seconds || wakeup_timer_milliseconds) -- omap2_pm_wakeup_on_timer(wakeup_timer_seconds, -- wakeup_timer_milliseconds); -- - /* Read current next_pwrsts */ - list_for_each_entry(pwrst, &pwrst_list, node) - pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm); -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c -index 62c0d5c..578e9df 100644 ---- a/arch/arm/mach-omap2/timer-gp.c -+++ b/arch/arm/mach-omap2/timer-gp.c -@@ -72,11 +72,9 @@ - /* Clockevent code */ - - static struct omap_dm_timer clkev; --static struct omap_dm_timer *gptimer; - static struct clock_event_device clockevent_gpt; - static u8 __initdata gptimer_id = 1; - static u8 __initdata inited; --struct omap_dm_timer *gptimer_wakeup; - - static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) - { -@@ -218,10 +216,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, - - timer->reserved = 1; - -- gptimer = omap_dm_timer_request_specific(gptimer_id); -- BUG_ON(gptimer == NULL); -- gptimer_wakeup = gptimer; -- - return res; - } - -@@ -235,7 +229,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, - res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); - BUG_ON(res); - -- omap2_gp_timer_irq.dev_id = (void *)gptimer; -+ omap2_gp_timer_irq.dev_id = (void *)&clkev; - setup_irq(clkev.irq, &omap2_gp_timer_irq); - - __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h -index dd8b3ff..8adcb18 100644 ---- a/arch/arm/plat-omap/include/plat/dmtimer.h -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h -@@ -59,7 +59,6 @@ - */ - #define OMAP_TIMER_IP_VERSION_1 0x1 - struct omap_dm_timer; --extern struct omap_dm_timer *gptimer_wakeup; - struct clk; - - int omap_dm_timer_init(void); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch deleted file mode 100644 index 17b3eda..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch +++ /dev/null @@ -1,47 +0,0 @@ -From b3d437835cf2885fe7a8c6470ca7639e5c11850a Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Mon, 14 Feb 2011 12:16:36 +0530 -Subject: [PATCH 009/149] OMAP3+: SR: make notify independent of class - -Interrupt notification mechanism of SmartReflex can be used by the -choice of implementation of the class driver. For example, Class 2 and -Class 1.5 of SmartReflex can both use the interrupt notification to -identify the transition of voltage or other events. - -Hence, the actual class does not matter for notifier. Let the class -driver's handling decide how it should be used. SmartReflex driver -should provide just the primitives. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/smartreflex.c | 6 ++---- - 1 files changed, 2 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index f5a6bc1..785ed4c 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data) - sr_write_reg(sr_info, IRQSTATUS, status); - } - -- if (sr_class->class_type == SR_CLASS2 && sr_class->notify) -+ if (sr_class->notify) - sr_class->notify(sr_info->voltdm, status); - - return IRQ_HANDLED; -@@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info) - struct resource *mem; - int ret = 0; - -- if (sr_class->class_type == SR_CLASS2 && -- sr_class->notify_flags && sr_info->irq) { -- -+ if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { - name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); - if (name == NULL) { - ret = -ENOMEM; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch deleted file mode 100644 index 7d8ef30..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 252ef25d54768a725289253c494e1f37a5eec526 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Mon, 14 Feb 2011 12:41:10 +0530 -Subject: [PATCH 010/149] OMAP3+: SR: disable interrupt by default - -We will enable and disable interrupt on a need basis in the class -driver. We need to keep the IRQ disabled by default else the -forceupdate or vcbypass events could trigger events that we don't -need/expect to handle. - -This is a preparation for SmartReflex AVS class drivers such as -class 2 and class 1.5 which would need to use interrupts. Existing -SmartReflex AVS class 3 driver does not require to use interrupts -and is not impacted by this change. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/smartreflex.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 785ed4c..6b69ada 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -268,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info) - 0, name, (void *)sr_info); - if (ret) - goto error; -+ disable_irq(sr_info->irq); - } - - if (pdata && pdata->enable_on_init) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch deleted file mode 100644 index ffc8c8c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch +++ /dev/null @@ -1,40 +0,0 @@ -From e060d73eef027063f687feae1c3d0ad2418a88aa Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Mon, 14 Feb 2011 21:14:17 +0530 -Subject: [PATCH 011/149] OMAP3+: SR: enable/disable SR only on need - -Since we already know the state of the autocomp enablement, we can -see if the requested state is different from the current state and -enable/disable SR only on the need basis. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/smartreflex.c | 11 +++++++---- - 1 files changed, 7 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 6b69ada..1a370b9 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -807,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, u64 val) - return -EINVAL; - } - -- if (!val) -- sr_stop_vddautocomp(sr_info); -- else -- sr_start_vddautocomp(sr_info); -+ /* control enable/disable only if there is a delta in value */ -+ if (sr_info->autocomp_active != val) { -+ if (!val) -+ sr_stop_vddautocomp(sr_info); -+ else -+ sr_start_vddautocomp(sr_info); -+ } - - return 0; - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch deleted file mode 100644 index 63c8230..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch +++ /dev/null @@ -1,48 +0,0 @@ -From d9d17d6ea5a56b81a7d6d134aeeeff6a3b9fbf88 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Mon, 14 Feb 2011 12:33:13 +0530 -Subject: [PATCH 012/149] OMAP3+: SR: fix cosmetic indentation - -Error label case seems to have a 2 tab indentation when just 1 is -necessary. - -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/smartreflex.c | 20 ++++++++++---------- - 1 files changed, 10 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index 1a370b9..be6add0 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -277,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info) - return ret; - - error: -- iounmap(sr_info->base); -- mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); -- release_mem_region(mem->start, resource_size(mem)); -- list_del(&sr_info->node); -- dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" -- "interrupt handler. Smartreflex will" -- "not function as desired\n", __func__); -- kfree(name); -- kfree(sr_info); -- return ret; -+ iounmap(sr_info->base); -+ mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); -+ release_mem_region(mem->start, resource_size(mem)); -+ list_del(&sr_info->node); -+ dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" -+ "interrupt handler. Smartreflex will" -+ "not function as desired\n", __func__); -+ kfree(name); -+ kfree(sr_info); -+ return ret; - } - - static void sr_v1_disable(struct omap_sr *sr) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and-initial.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and-initial.patch deleted file mode 100644 index db4f8e5..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and-initial.patch +++ /dev/null @@ -1,125 +0,0 @@ -From 8009544b2ea8ceba920455bb7e5e267cc78d3827 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:49 -0700 -Subject: [PATCH 013/149] omap2+: Reserve clocksource and timesource and initialize dmtimer later - -There's no need to initialize the dmtimer framework early. -Just mark the clocksource and timesource as reserved, and -initialize dmtimer with an arch_initcall. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap1/timer32k.c | 4 ---- - arch/arm/mach-omap2/timer-gp.c | 6 ++++-- - arch/arm/plat-omap/dmtimer.c | 10 +++++++++- - arch/arm/plat-omap/include/plat/dmtimer.h | 3 +-- - 4 files changed, 14 insertions(+), 9 deletions(-) - -diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c -index 13d7b8f..96604a5 100644 ---- a/arch/arm/mach-omap1/timer32k.c -+++ b/arch/arm/mach-omap1/timer32k.c -@@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void) - bool __init omap_32k_timer_init(void) - { - omap_init_clocksource_32k(); -- --#ifdef CONFIG_OMAP_DM_TIMER -- omap_dm_timer_init(); --#endif - omap_init_32k_timer(); - - return true; -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c -index 578e9df..cf2ec85 100644 ---- a/arch/arm/mach-omap2/timer-gp.c -+++ b/arch/arm/mach-omap2/timer-gp.c -@@ -69,6 +69,8 @@ - /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ - #define MAX_GPTIMER_ID 12 - -+u32 sys_timer_reserved; -+ - /* Clockevent code */ - - static struct omap_dm_timer clkev; -@@ -195,6 +197,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, - - omap_hwmod_enable(oh); - -+ sys_timer_reserved |= (1 << (gptimer_id - 1)); -+ - if (gptimer_id != 12) { - struct clk *src; - -@@ -321,7 +325,6 @@ static void __init omap2_gp_clocksource_init(void) - #define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \ - static void __init omap##name##_timer_init(void) \ - { \ -- omap_dm_timer_init(); \ - omap2_gp_clockevent_init((clkev_nr), clkev_src); \ - omap2_gp_clocksource_init(); \ - } -@@ -350,7 +353,6 @@ static void __init omap4_timer_init(void) - twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); - BUG_ON(!twd_base); - #endif -- omap_dm_timer_init(); - omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); - omap2_gp_clocksource_init(); - } -diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c -index 7c5cb4e..8dfb818 100644 ---- a/arch/arm/plat-omap/dmtimer.c -+++ b/arch/arm/plat-omap/dmtimer.c -@@ -572,7 +572,7 @@ int omap_dm_timers_active(void) - } - EXPORT_SYMBOL_GPL(omap_dm_timers_active); - --int __init omap_dm_timer_init(void) -+static int __init omap_dm_timer_init(void) - { - struct omap_dm_timer *timer; - int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */ -@@ -625,8 +625,16 @@ int __init omap_dm_timer_init(void) - sprintf(clk_name, "gpt%d_fck", i + 1); - timer->fclk = clk_get(NULL, clk_name); - } -+ -+ /* One or two timers may be set up early for sys_timer */ -+ if (sys_timer_reserved & (1 << i)) { -+ timer->reserved = 1; -+ timer->posted = 1; -+ } - #endif - } - - return 0; - } -+ -+arch_initcall(omap_dm_timer_init); -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h -index 8adcb18..d0f3a2d 100644 ---- a/arch/arm/plat-omap/include/plat/dmtimer.h -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h -@@ -61,8 +61,6 @@ - struct omap_dm_timer; - struct clk; - --int omap_dm_timer_init(void); -- - struct omap_dm_timer *omap_dm_timer_request(void); - struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); - void omap_dm_timer_free(struct omap_dm_timer *timer); -@@ -221,6 +219,7 @@ struct omap_dm_timer { - unsigned posted:1; - }; - -+extern u32 sys_timer_reserved; - void omap_dm_timer_prepare(struct omap_dm_timer *timer); - - static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch deleted file mode 100644 index 2e72dad..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch +++ /dev/null @@ -1,163 +0,0 @@ -From 595da70cb0e039cbe04d9c7ce179883e6f8878c1 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:49 -0700 -Subject: [PATCH 014/149] omap2+: Use dmtimer macros for clocksource - -Use dmtimer macros for clocksource. As with the clockevent, -this allows us to initialize the rest of dmtimer code later on. - -Note that eventually we will be initializing the timesource -from init_early so sched_clock will work properly for -CONFIG_PRINTK_TIME. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/timer-gp.c | 64 +++++++++++++++++++++---------------- - arch/arm/plat-omap/counter_32k.c | 2 +- - 2 files changed, 37 insertions(+), 29 deletions(-) - -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c -index cf2ec85..2b8cb70 100644 ---- a/arch/arm/mach-omap2/timer-gp.c -+++ b/arch/arm/mach-omap2/timer-gp.c -@@ -262,20 +262,22 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, - * sync counter. See clocksource setup in plat-omap/counter_32k.c - */ - --static void __init omap2_gp_clocksource_init(void) -+static void __init omap2_gp_clocksource_init(int unused, const char *dummy) - { - omap_init_clocksource_32k(); - } - - #else -+ -+static struct omap_dm_timer clksrc; -+ - /* - * clocksource - */ - static DEFINE_CLOCK_DATA(cd); --static struct omap_dm_timer *gpt_clocksource; - static cycle_t clocksource_read_cycles(struct clocksource *cs) - { -- return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource); -+ return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); - } - - static struct clocksource clocksource_gpt = { -@@ -290,43 +292,48 @@ static void notrace dmtimer_update_sched_clock(void) - { - u32 cyc; - -- cyc = omap_dm_timer_read_counter(gpt_clocksource); -+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); - - update_sched_clock(&cd, cyc, (u32)~0); - } - --/* Setup free-running counter for clocksource */ --static void __init omap2_gp_clocksource_init(void) -+unsigned long long notrace sched_clock(void) - { -- static struct omap_dm_timer *gpt; -- u32 tick_rate; -- static char err1[] __initdata = KERN_ERR -- "%s: failed to request dm-timer\n"; -- static char err2[] __initdata = KERN_ERR -- "%s: can't register clocksource!\n"; -+ u32 cyc = 0; - -- gpt = omap_dm_timer_request(); -- if (!gpt) -- printk(err1, clocksource_gpt.name); -- gpt_clocksource = gpt; -+ if (clksrc.reserved) -+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); - -- omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK); -- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt)); -+ return cyc_to_sched_clock(&cd, cyc, (u32)~0); -+} -+ -+/* Setup free-running counter for clocksource */ -+static void __init omap2_gp_clocksource_init(int gptimer_id, -+ const char *fck_source) -+{ -+ int res; -+ -+ res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); -+ BUG_ON(res); - -- omap_dm_timer_set_load_start(gpt, 1, 0); -+ pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", -+ gptimer_id, clksrc.rate); - -- init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); -+ __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1); -+ init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); - -- if (clocksource_register_hz(&clocksource_gpt, tick_rate)) -- printk(err2, clocksource_gpt.name); -+ if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) -+ pr_err("Could not register clocksource %s\n", -+ clocksource_gpt.name); - } - #endif - --#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \ -+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ -+ clksrc_nr, clksrc_src) \ - static void __init omap##name##_timer_init(void) \ - { \ - omap2_gp_clockevent_init((clkev_nr), clkev_src); \ -- omap2_gp_clocksource_init(); \ -+ omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ - } - - #define OMAP_SYS_TIMER(name) \ -@@ -335,14 +342,15 @@ struct sys_timer omap##name##_timer = { \ - }; - - #ifdef CONFIG_ARCH_OMAP2 --OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE) -+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE) - OMAP_SYS_TIMER(2) - #endif - - #ifdef CONFIG_ARCH_OMAP3 --OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE) -+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE) - OMAP_SYS_TIMER(3) --OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE) -+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, -+ 2, OMAP3_MPU_SOURCE) - OMAP_SYS_TIMER(3_secure) - #endif - -@@ -354,7 +362,7 @@ static void __init omap4_timer_init(void) - BUG_ON(!twd_base); - #endif - omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); -- omap2_gp_clocksource_init(); -+ omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); - } - OMAP_SYS_TIMER(4) - #endif -diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c -index f7fed60..c13bc3d 100644 ---- a/arch/arm/plat-omap/counter_32k.c -+++ b/arch/arm/plat-omap/counter_32k.c -@@ -126,7 +126,7 @@ static inline unsigned long long notrace _omap_32k_sched_clock(void) - return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); - } - --#ifndef CONFIG_OMAP_MPU_TIMER -+#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER) - unsigned long long notrace sched_clock(void) - { - return _omap_32k_sched_clock(); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2-Remove-omap2_gp_clockevent_set_gptimer.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2-Remove-omap2_gp_clockevent_set_gptimer.patch deleted file mode 100644 index 298f82d..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2-Remove-omap2_gp_clockevent_set_gptimer.patch +++ /dev/null @@ -1,240 +0,0 @@ -From e50befd53e52f2c72a26e33812ad896d5f8524fa Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:49 -0700 -Subject: [PATCH 015/149] omap2+: Remove omap2_gp_clockevent_set_gptimer - -This is no longer needed as we now just set the desired -.timer in MACHINE_START. We can now also remove timer-gp.h. - -Signed-off-by: Tony Lindgren <tony@atomide.com> -Reviewed-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/board-4430sdp.c | 4 ---- - arch/arm/mach-omap2/board-devkit8000.c | 4 ---- - arch/arm/mach-omap2/board-omap3beagle.c | 4 ---- - arch/arm/mach-omap2/board-omap3logic.c | 1 - - arch/arm/mach-omap2/board-omap3stalker.c | 4 ---- - arch/arm/mach-omap2/board-omap3touchbook.c | 4 ---- - arch/arm/mach-omap2/board-omap4panda.c | 1 - - arch/arm/mach-omap2/timer-gp.c | 26 -------------------------- - arch/arm/mach-omap2/timer-gp.h | 16 ---------------- - 9 files changed, 0 insertions(+), 64 deletions(-) - delete mode 100644 arch/arm/mach-omap2/timer-gp.h - -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c -index e8caced..d7df07e 100644 ---- a/arch/arm/mach-omap2/board-4430sdp.c -+++ b/arch/arm/mach-omap2/board-4430sdp.c -@@ -40,7 +40,6 @@ - - #include "mux.h" - #include "hsmmc.h" --#include "timer-gp.h" - #include "control.h" - #include "common-board-devices.h" - -@@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void) - { - omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); --#ifdef CONFIG_OMAP_32K_TIMER -- omap2_gp_clockevent_set_gptimer(1); --#endif - } - - static struct omap_musb_board_data musb_board_data = { -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c -index 46d144d..949dbea 100644 ---- a/arch/arm/mach-omap2/board-devkit8000.c -+++ b/arch/arm/mach-omap2/board-devkit8000.c -@@ -58,7 +58,6 @@ - - #include "mux.h" - #include "hsmmc.h" --#include "timer-gp.h" - #include "common-board-devices.h" - - #define OMAP_DM9000_GPIO_IRQ 25 -@@ -441,9 +440,6 @@ static void __init devkit8000_init_early(void) - static void __init devkit8000_init_irq(void) - { - omap3_init_irq(); --#ifdef CONFIG_OMAP_32K_TIMER -- omap2_gp_clockevent_set_gptimer(12); --#endif - } - - #define OMAP_DM9000_BASE 0x2c000000 -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 9ee16f6..2d8dfb3 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -50,7 +50,6 @@ - - #include "mux.h" - #include "hsmmc.h" --#include "timer-gp.h" - #include "pm.h" - #include "common-board-devices.h" - -@@ -484,9 +483,6 @@ static void __init omap3_beagle_init_early(void) - static void __init omap3_beagle_init_irq(void) - { - omap3_init_irq(); --#ifdef CONFIG_OMAP_32K_TIMER -- omap2_gp_clockevent_set_gptimer(12); --#endif - } - - static struct platform_device *omap3_beagle_devices[] __initdata = { -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c -index 469259a..703aeb5 100644 ---- a/arch/arm/mach-omap2/board-omap3logic.c -+++ b/arch/arm/mach-omap2/board-omap3logic.c -@@ -35,7 +35,6 @@ - - #include "mux.h" - #include "hsmmc.h" --#include "timer-gp.h" - #include "control.h" - #include "common-board-devices.h" - -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c -index 2fa8fae..b8ad4dd 100644 ---- a/arch/arm/mach-omap2/board-omap3stalker.c -+++ b/arch/arm/mach-omap2/board-omap3stalker.c -@@ -52,7 +52,6 @@ - #include "sdram-micron-mt46h32m32lf-6.h" - #include "mux.h" - #include "hsmmc.h" --#include "timer-gp.h" - #include "common-board-devices.h" - - #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) -@@ -492,9 +491,6 @@ static void __init omap3_stalker_init_early(void) - static void __init omap3_stalker_init_irq(void) - { - omap3_init_irq(); --#ifdef CONFIG_OMAP_32K_TIMER -- omap2_gp_clockevent_set_gptimer(12); --#endif - } - - static struct platform_device *omap3_stalker_devices[] __initdata = { -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index 8c71fd2..57e6ed3 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -51,7 +51,6 @@ - - #include "mux.h" - #include "hsmmc.h" --#include "timer-gp.h" - #include "common-board-devices.h" - - #include <asm/setup.h> -@@ -372,9 +371,6 @@ static void __init omap3_touchbook_init_early(void) - static void __init omap3_touchbook_init_irq(void) - { - omap3_init_irq(); --#ifdef CONFIG_OMAP_32K_TIMER -- omap2_gp_clockevent_set_gptimer(12); --#endif - } - - static struct platform_device *omap3_touchbook_devices[] __initdata = { -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c -index dc1d6dc..ee2034e 100644 ---- a/arch/arm/mach-omap2/board-omap4panda.c -+++ b/arch/arm/mach-omap2/board-omap4panda.c -@@ -41,7 +41,6 @@ - #include <plat/usb.h> - #include <plat/mmc.h> - #include <video/omap-panel-generic-dpi.h> --#include "timer-gp.h" - - #include "hsmmc.h" - #include "control.h" -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c -index 2b8cb70..ab1931c 100644 ---- a/arch/arm/mach-omap2/timer-gp.c -+++ b/arch/arm/mach-omap2/timer-gp.c -@@ -43,8 +43,6 @@ - #include <plat/common.h> - #include <plat/omap_hwmod.h> - --#include "timer-gp.h" -- - /* Parent clocks, eventually these will come from the clock framework */ - - #define OMAP2_MPU_SOURCE "sys_ck" -@@ -75,8 +73,6 @@ u32 sys_timer_reserved; - - static struct omap_dm_timer clkev; - static struct clock_event_device clockevent_gpt; --static u8 __initdata gptimer_id = 1; --static u8 __initdata inited; - - static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) - { -@@ -138,26 +134,6 @@ static struct clock_event_device clockevent_gpt = { - .set_mode = omap2_gp_timer_set_mode, - }; - --/** -- * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents -- * @id: GPTIMER to use (1..MAX_GPTIMER_ID) -- * -- * Define the GPTIMER that the system should use for the tick timer. -- * Meant to be called from board-*.c files in the event that GPTIMER1, the -- * default, is unsuitable. Returns -EINVAL on error or 0 on success. -- */ --int __init omap2_gp_clockevent_set_gptimer(u8 id) --{ -- if (id < 1 || id > MAX_GPTIMER_ID) -- return -EINVAL; -- -- BUG_ON(inited); -- -- gptimer_id = id; -- -- return 0; --} -- - static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, - int gptimer_id, - const char *fck_source) -@@ -228,8 +204,6 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, - { - int res; - -- inited = 1; -- - res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); - BUG_ON(res); - -diff --git a/arch/arm/mach-omap2/timer-gp.h b/arch/arm/mach-omap2/timer-gp.h -deleted file mode 100644 -index 5c1072c..0000000 ---- a/arch/arm/mach-omap2/timer-gp.h -+++ /dev/null -@@ -1,16 +0,0 @@ --/* -- * OMAP2/3 GPTIMER support.headers -- * -- * Copyright (C) 2009 Nokia Corporation -- * -- * This file is subject to the terms and conditions of the GNU General Public -- * License. See the file "COPYING" in the main directory of this archive -- * for more details. -- */ -- --#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H --#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H -- --extern int __init omap2_gp_clockevent_set_gptimer(u8 id); -- --#endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to-combine-time.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to-combine-time.patch deleted file mode 100644 index c511aa9..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to-combine-time.patch +++ /dev/null @@ -1,737 +0,0 @@ -From 5cdb1497ccc5b9dae8795e1e5e9c74f11e4e7401 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren <tony@atomide.com> -Date: Tue, 29 Mar 2011 15:54:50 -0700 -Subject: [PATCH 016/149] omap2+: Rename timer-gp.c into timer.c to combine timer init functions - -We can keep everything sys_timer and gptimer.c related code in -timer.c as the code will be very minimal. - -Later on we can also remove timer-mpu.c, as it can be called from -omap4_timer_init function. - -This allows us to get rid of confusing existing files. We currently -have timer-gp.c, timer-mpu.c, and patches have been posted to add -dmtimer.c. There's no need to have these multiple files, we can -put everything into timer.c. - -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/Makefile | 2 +- - arch/arm/mach-omap2/timer-gp.c | 342 ---------------------------------------- - arch/arm/mach-omap2/timer.c | 342 ++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 343 insertions(+), 343 deletions(-) - delete mode 100644 arch/arm/mach-omap2/timer-gp.c - create mode 100644 arch/arm/mach-omap2/timer.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index b148077..adbe82d 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -3,7 +3,7 @@ - # - - # Common support --obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \ -+obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ - common.o gpio.o dma.o wd_timer.o - - omap-2-3-common = irq.o sdrc.o -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c -deleted file mode 100644 -index ab1931c..0000000 ---- a/arch/arm/mach-omap2/timer-gp.c -+++ /dev/null -@@ -1,342 +0,0 @@ --/* -- * linux/arch/arm/mach-omap2/timer-gp.c -- * -- * OMAP2 GP timer support. -- * -- * Copyright (C) 2009 Nokia Corporation -- * -- * Update to use new clocksource/clockevent layers -- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> -- * Copyright (C) 2007 MontaVista Software, Inc. -- * -- * Original driver: -- * Copyright (C) 2005 Nokia Corporation -- * Author: Paul Mundt <paul.mundt@nokia.com> -- * Juha Yrjölä <juha.yrjola@nokia.com> -- * OMAP Dual-mode timer framework support by Timo Teras -- * -- * Some parts based off of TI's 24xx code: -- * -- * Copyright (C) 2004-2009 Texas Instruments, Inc. -- * -- * Roughly modelled after the OMAP1 MPU timer code. -- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> -- * -- * This file is subject to the terms and conditions of the GNU General Public -- * License. See the file "COPYING" in the main directory of this archive -- * for more details. -- */ --#include <linux/init.h> --#include <linux/time.h> --#include <linux/interrupt.h> --#include <linux/err.h> --#include <linux/clk.h> --#include <linux/delay.h> --#include <linux/irq.h> --#include <linux/clocksource.h> --#include <linux/clockchips.h> -- --#include <asm/mach/time.h> --#include <plat/dmtimer.h> --#include <asm/localtimer.h> --#include <asm/sched_clock.h> --#include <plat/common.h> --#include <plat/omap_hwmod.h> -- --/* Parent clocks, eventually these will come from the clock framework */ -- --#define OMAP2_MPU_SOURCE "sys_ck" --#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE --#define OMAP4_MPU_SOURCE "sys_clkin_ck" --#define OMAP2_32K_SOURCE "func_32k_ck" --#define OMAP3_32K_SOURCE "omap_32k_fck" --#define OMAP4_32K_SOURCE "sys_32k_ck" -- --#ifdef CONFIG_OMAP_32K_TIMER --#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE --#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE --#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE --#define OMAP3_SECURE_TIMER 12 --#else --#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE --#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE --#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE --#define OMAP3_SECURE_TIMER 1 --#endif -- --/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ --#define MAX_GPTIMER_ID 12 -- --u32 sys_timer_reserved; -- --/* Clockevent code */ -- --static struct omap_dm_timer clkev; --static struct clock_event_device clockevent_gpt; -- --static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) --{ -- struct clock_event_device *evt = &clockevent_gpt; -- -- __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); -- -- evt->event_handler(evt); -- return IRQ_HANDLED; --} -- --static struct irqaction omap2_gp_timer_irq = { -- .name = "gp timer", -- .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, -- .handler = omap2_gp_timer_interrupt, --}; -- --static int omap2_gp_timer_set_next_event(unsigned long cycles, -- struct clock_event_device *evt) --{ -- __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, -- 0xffffffff - cycles, 1); -- -- return 0; --} -- --static void omap2_gp_timer_set_mode(enum clock_event_mode mode, -- struct clock_event_device *evt) --{ -- u32 period; -- -- __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); -- -- switch (mode) { -- case CLOCK_EVT_MODE_PERIODIC: -- period = clkev.rate / HZ; -- period -= 1; -- /* Looks like we need to first set the load value separately */ -- __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, -- 0xffffffff - period, 1); -- __omap_dm_timer_load_start(clkev.io_base, -- OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, -- 0xffffffff - period, 1); -- break; -- case CLOCK_EVT_MODE_ONESHOT: -- break; -- case CLOCK_EVT_MODE_UNUSED: -- case CLOCK_EVT_MODE_SHUTDOWN: -- case CLOCK_EVT_MODE_RESUME: -- break; -- } --} -- --static struct clock_event_device clockevent_gpt = { -- .name = "gp timer", -- .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, -- .shift = 32, -- .set_next_event = omap2_gp_timer_set_next_event, -- .set_mode = omap2_gp_timer_set_mode, --}; -- --static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, -- int gptimer_id, -- const char *fck_source) --{ -- char name[10]; /* 10 = sizeof("gptXX_Xck0") */ -- struct omap_hwmod *oh; -- size_t size; -- int res = 0; -- -- sprintf(name, "timer%d", gptimer_id); -- omap_hwmod_setup_one(name); -- oh = omap_hwmod_lookup(name); -- if (!oh) -- return -ENODEV; -- -- timer->irq = oh->mpu_irqs[0].irq; -- timer->phys_base = oh->slaves[0]->addr->pa_start; -- size = oh->slaves[0]->addr->pa_end - timer->phys_base; -- -- /* Static mapping, never released */ -- timer->io_base = ioremap(timer->phys_base, size); -- if (!timer->io_base) -- return -ENXIO; -- -- /* After the dmtimer is using hwmod these clocks won't be needed */ -- sprintf(name, "gpt%d_fck", gptimer_id); -- timer->fclk = clk_get(NULL, name); -- if (IS_ERR(timer->fclk)) -- return -ENODEV; -- -- sprintf(name, "gpt%d_ick", gptimer_id); -- timer->iclk = clk_get(NULL, name); -- if (IS_ERR(timer->iclk)) { -- clk_put(timer->fclk); -- return -ENODEV; -- } -- -- omap_hwmod_enable(oh); -- -- sys_timer_reserved |= (1 << (gptimer_id - 1)); -- -- if (gptimer_id != 12) { -- struct clk *src; -- -- src = clk_get(NULL, fck_source); -- if (IS_ERR(src)) { -- res = -EINVAL; -- } else { -- res = __omap_dm_timer_set_source(timer->fclk, src); -- if (IS_ERR_VALUE(res)) -- pr_warning("%s: timer%i cannot set source\n", -- __func__, gptimer_id); -- clk_put(src); -- } -- } -- __omap_dm_timer_reset(timer->io_base, 1, 1); -- timer->posted = 1; -- -- timer->rate = clk_get_rate(timer->fclk); -- -- timer->reserved = 1; -- -- return res; --} -- --static void __init omap2_gp_clockevent_init(int gptimer_id, -- const char *fck_source) --{ -- int res; -- -- res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); -- BUG_ON(res); -- -- omap2_gp_timer_irq.dev_id = (void *)&clkev; -- setup_irq(clkev.irq, &omap2_gp_timer_irq); -- -- __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); -- -- clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, -- clockevent_gpt.shift); -- clockevent_gpt.max_delta_ns = -- clockevent_delta2ns(0xffffffff, &clockevent_gpt); -- clockevent_gpt.min_delta_ns = -- clockevent_delta2ns(3, &clockevent_gpt); -- /* Timer internal resynch latency. */ -- -- clockevent_gpt.cpumask = cpumask_of(0); -- clockevents_register_device(&clockevent_gpt); -- -- pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", -- gptimer_id, clkev.rate); --} -- --/* Clocksource code */ -- --#ifdef CONFIG_OMAP_32K_TIMER --/* -- * When 32k-timer is enabled, don't use GPTimer for clocksource -- * instead, just leave default clocksource which uses the 32k -- * sync counter. See clocksource setup in plat-omap/counter_32k.c -- */ -- --static void __init omap2_gp_clocksource_init(int unused, const char *dummy) --{ -- omap_init_clocksource_32k(); --} -- --#else -- --static struct omap_dm_timer clksrc; -- --/* -- * clocksource -- */ --static DEFINE_CLOCK_DATA(cd); --static cycle_t clocksource_read_cycles(struct clocksource *cs) --{ -- return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); --} -- --static struct clocksource clocksource_gpt = { -- .name = "gp timer", -- .rating = 300, -- .read = clocksource_read_cycles, -- .mask = CLOCKSOURCE_MASK(32), -- .flags = CLOCK_SOURCE_IS_CONTINUOUS, --}; -- --static void notrace dmtimer_update_sched_clock(void) --{ -- u32 cyc; -- -- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); -- -- update_sched_clock(&cd, cyc, (u32)~0); --} -- --unsigned long long notrace sched_clock(void) --{ -- u32 cyc = 0; -- -- if (clksrc.reserved) -- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); -- -- return cyc_to_sched_clock(&cd, cyc, (u32)~0); --} -- --/* Setup free-running counter for clocksource */ --static void __init omap2_gp_clocksource_init(int gptimer_id, -- const char *fck_source) --{ -- int res; -- -- res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); -- BUG_ON(res); -- -- pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", -- gptimer_id, clksrc.rate); -- -- __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1); -- init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); -- -- if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) -- pr_err("Could not register clocksource %s\n", -- clocksource_gpt.name); --} --#endif -- --#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ -- clksrc_nr, clksrc_src) \ --static void __init omap##name##_timer_init(void) \ --{ \ -- omap2_gp_clockevent_init((clkev_nr), clkev_src); \ -- omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ --} -- --#define OMAP_SYS_TIMER(name) \ --struct sys_timer omap##name##_timer = { \ -- .init = omap##name##_timer_init, \ --}; -- --#ifdef CONFIG_ARCH_OMAP2 --OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE) --OMAP_SYS_TIMER(2) --#endif -- --#ifdef CONFIG_ARCH_OMAP3 --OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE) --OMAP_SYS_TIMER(3) --OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, -- 2, OMAP3_MPU_SOURCE) --OMAP_SYS_TIMER(3_secure) --#endif -- --#ifdef CONFIG_ARCH_OMAP4 --static void __init omap4_timer_init(void) --{ --#ifdef CONFIG_LOCAL_TIMERS -- twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); -- BUG_ON(!twd_base); --#endif -- omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); -- omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); --} --OMAP_SYS_TIMER(4) --#endif -diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c -new file mode 100644 -index 0000000..e964072 ---- /dev/null -+++ b/arch/arm/mach-omap2/timer.c -@@ -0,0 +1,342 @@ -+/* -+ * linux/arch/arm/mach-omap2/timer.c -+ * -+ * OMAP2 GP timer support. -+ * -+ * Copyright (C) 2009 Nokia Corporation -+ * -+ * Update to use new clocksource/clockevent layers -+ * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> -+ * Copyright (C) 2007 MontaVista Software, Inc. -+ * -+ * Original driver: -+ * Copyright (C) 2005 Nokia Corporation -+ * Author: Paul Mundt <paul.mundt@nokia.com> -+ * Juha Yrjölä <juha.yrjola@nokia.com> -+ * OMAP Dual-mode timer framework support by Timo Teras -+ * -+ * Some parts based off of TI's 24xx code: -+ * -+ * Copyright (C) 2004-2009 Texas Instruments, Inc. -+ * -+ * Roughly modelled after the OMAP1 MPU timer code. -+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ */ -+#include <linux/init.h> -+#include <linux/time.h> -+#include <linux/interrupt.h> -+#include <linux/err.h> -+#include <linux/clk.h> -+#include <linux/delay.h> -+#include <linux/irq.h> -+#include <linux/clocksource.h> -+#include <linux/clockchips.h> -+ -+#include <asm/mach/time.h> -+#include <plat/dmtimer.h> -+#include <asm/localtimer.h> -+#include <asm/sched_clock.h> -+#include <plat/common.h> -+#include <plat/omap_hwmod.h> -+ -+/* Parent clocks, eventually these will come from the clock framework */ -+ -+#define OMAP2_MPU_SOURCE "sys_ck" -+#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE -+#define OMAP4_MPU_SOURCE "sys_clkin_ck" -+#define OMAP2_32K_SOURCE "func_32k_ck" -+#define OMAP3_32K_SOURCE "omap_32k_fck" -+#define OMAP4_32K_SOURCE "sys_32k_ck" -+ -+#ifdef CONFIG_OMAP_32K_TIMER -+#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE -+#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE -+#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE -+#define OMAP3_SECURE_TIMER 12 -+#else -+#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE -+#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE -+#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE -+#define OMAP3_SECURE_TIMER 1 -+#endif -+ -+/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ -+#define MAX_GPTIMER_ID 12 -+ -+u32 sys_timer_reserved; -+ -+/* Clockevent code */ -+ -+static struct omap_dm_timer clkev; -+static struct clock_event_device clockevent_gpt; -+ -+static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) -+{ -+ struct clock_event_device *evt = &clockevent_gpt; -+ -+ __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); -+ -+ evt->event_handler(evt); -+ return IRQ_HANDLED; -+} -+ -+static struct irqaction omap2_gp_timer_irq = { -+ .name = "gp timer", -+ .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, -+ .handler = omap2_gp_timer_interrupt, -+}; -+ -+static int omap2_gp_timer_set_next_event(unsigned long cycles, -+ struct clock_event_device *evt) -+{ -+ __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, -+ 0xffffffff - cycles, 1); -+ -+ return 0; -+} -+ -+static void omap2_gp_timer_set_mode(enum clock_event_mode mode, -+ struct clock_event_device *evt) -+{ -+ u32 period; -+ -+ __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); -+ -+ switch (mode) { -+ case CLOCK_EVT_MODE_PERIODIC: -+ period = clkev.rate / HZ; -+ period -= 1; -+ /* Looks like we need to first set the load value separately */ -+ __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, -+ 0xffffffff - period, 1); -+ __omap_dm_timer_load_start(clkev.io_base, -+ OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, -+ 0xffffffff - period, 1); -+ break; -+ case CLOCK_EVT_MODE_ONESHOT: -+ break; -+ case CLOCK_EVT_MODE_UNUSED: -+ case CLOCK_EVT_MODE_SHUTDOWN: -+ case CLOCK_EVT_MODE_RESUME: -+ break; -+ } -+} -+ -+static struct clock_event_device clockevent_gpt = { -+ .name = "gp timer", -+ .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, -+ .shift = 32, -+ .set_next_event = omap2_gp_timer_set_next_event, -+ .set_mode = omap2_gp_timer_set_mode, -+}; -+ -+static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, -+ int gptimer_id, -+ const char *fck_source) -+{ -+ char name[10]; /* 10 = sizeof("gptXX_Xck0") */ -+ struct omap_hwmod *oh; -+ size_t size; -+ int res = 0; -+ -+ sprintf(name, "timer%d", gptimer_id); -+ omap_hwmod_setup_one(name); -+ oh = omap_hwmod_lookup(name); -+ if (!oh) -+ return -ENODEV; -+ -+ timer->irq = oh->mpu_irqs[0].irq; -+ timer->phys_base = oh->slaves[0]->addr->pa_start; -+ size = oh->slaves[0]->addr->pa_end - timer->phys_base; -+ -+ /* Static mapping, never released */ -+ timer->io_base = ioremap(timer->phys_base, size); -+ if (!timer->io_base) -+ return -ENXIO; -+ -+ /* After the dmtimer is using hwmod these clocks won't be needed */ -+ sprintf(name, "gpt%d_fck", gptimer_id); -+ timer->fclk = clk_get(NULL, name); -+ if (IS_ERR(timer->fclk)) -+ return -ENODEV; -+ -+ sprintf(name, "gpt%d_ick", gptimer_id); -+ timer->iclk = clk_get(NULL, name); -+ if (IS_ERR(timer->iclk)) { -+ clk_put(timer->fclk); -+ return -ENODEV; -+ } -+ -+ omap_hwmod_enable(oh); -+ -+ sys_timer_reserved |= (1 << (gptimer_id - 1)); -+ -+ if (gptimer_id != 12) { -+ struct clk *src; -+ -+ src = clk_get(NULL, fck_source); -+ if (IS_ERR(src)) { -+ res = -EINVAL; -+ } else { -+ res = __omap_dm_timer_set_source(timer->fclk, src); -+ if (IS_ERR_VALUE(res)) -+ pr_warning("%s: timer%i cannot set source\n", -+ __func__, gptimer_id); -+ clk_put(src); -+ } -+ } -+ __omap_dm_timer_reset(timer->io_base, 1, 1); -+ timer->posted = 1; -+ -+ timer->rate = clk_get_rate(timer->fclk); -+ -+ timer->reserved = 1; -+ -+ return res; -+} -+ -+static void __init omap2_gp_clockevent_init(int gptimer_id, -+ const char *fck_source) -+{ -+ int res; -+ -+ res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); -+ BUG_ON(res); -+ -+ omap2_gp_timer_irq.dev_id = (void *)&clkev; -+ setup_irq(clkev.irq, &omap2_gp_timer_irq); -+ -+ __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); -+ -+ clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, -+ clockevent_gpt.shift); -+ clockevent_gpt.max_delta_ns = -+ clockevent_delta2ns(0xffffffff, &clockevent_gpt); -+ clockevent_gpt.min_delta_ns = -+ clockevent_delta2ns(3, &clockevent_gpt); -+ /* Timer internal resynch latency. */ -+ -+ clockevent_gpt.cpumask = cpumask_of(0); -+ clockevents_register_device(&clockevent_gpt); -+ -+ pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", -+ gptimer_id, clkev.rate); -+} -+ -+/* Clocksource code */ -+ -+#ifdef CONFIG_OMAP_32K_TIMER -+/* -+ * When 32k-timer is enabled, don't use GPTimer for clocksource -+ * instead, just leave default clocksource which uses the 32k -+ * sync counter. See clocksource setup in plat-omap/counter_32k.c -+ */ -+ -+static void __init omap2_gp_clocksource_init(int unused, const char *dummy) -+{ -+ omap_init_clocksource_32k(); -+} -+ -+#else -+ -+static struct omap_dm_timer clksrc; -+ -+/* -+ * clocksource -+ */ -+static DEFINE_CLOCK_DATA(cd); -+static cycle_t clocksource_read_cycles(struct clocksource *cs) -+{ -+ return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); -+} -+ -+static struct clocksource clocksource_gpt = { -+ .name = "gp timer", -+ .rating = 300, -+ .read = clocksource_read_cycles, -+ .mask = CLOCKSOURCE_MASK(32), -+ .flags = CLOCK_SOURCE_IS_CONTINUOUS, -+}; -+ -+static void notrace dmtimer_update_sched_clock(void) -+{ -+ u32 cyc; -+ -+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); -+ -+ update_sched_clock(&cd, cyc, (u32)~0); -+} -+ -+unsigned long long notrace sched_clock(void) -+{ -+ u32 cyc = 0; -+ -+ if (clksrc.reserved) -+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); -+ -+ return cyc_to_sched_clock(&cd, cyc, (u32)~0); -+} -+ -+/* Setup free-running counter for clocksource */ -+static void __init omap2_gp_clocksource_init(int gptimer_id, -+ const char *fck_source) -+{ -+ int res; -+ -+ res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); -+ BUG_ON(res); -+ -+ pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", -+ gptimer_id, clksrc.rate); -+ -+ __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1); -+ init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); -+ -+ if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) -+ pr_err("Could not register clocksource %s\n", -+ clocksource_gpt.name); -+} -+#endif -+ -+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ -+ clksrc_nr, clksrc_src) \ -+static void __init omap##name##_timer_init(void) \ -+{ \ -+ omap2_gp_clockevent_init((clkev_nr), clkev_src); \ -+ omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ -+} -+ -+#define OMAP_SYS_TIMER(name) \ -+struct sys_timer omap##name##_timer = { \ -+ .init = omap##name##_timer_init, \ -+}; -+ -+#ifdef CONFIG_ARCH_OMAP2 -+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE) -+OMAP_SYS_TIMER(2) -+#endif -+ -+#ifdef CONFIG_ARCH_OMAP3 -+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE) -+OMAP_SYS_TIMER(3) -+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, -+ 2, OMAP3_MPU_SOURCE) -+OMAP_SYS_TIMER(3_secure) -+#endif -+ -+#ifdef CONFIG_ARCH_OMAP4 -+static void __init omap4_timer_init(void) -+{ -+#ifdef CONFIG_LOCAL_TIMERS -+ twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); -+ BUG_ON(!twd_base); -+#endif -+ omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); -+ omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); -+} -+OMAP_SYS_TIMER(4) -+#endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch deleted file mode 100644 index 792d76a..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch +++ /dev/null @@ -1,165 +0,0 @@ -From a72eaf768c2f553f72e7afc0b1c52661b2913022 Mon Sep 17 00:00:00 2001 -From: Grazvydas Ignotas <notasas@gmail.com> -Date: Fri, 3 Jun 2011 19:56:33 +0000 -Subject: [PATCH 017/149] omap: cleanup NAND platform data - -omap_nand_platform_data fields 'options', 'gpio_irq', 'nand_setup' and -'dma_channel' are never referenced by the NAND driver, yet various -board files are initializing those fields. This is both incorrect and -confusing, so remove them. This allows to get rid of a global -variable in gpmc-nand.c. - -This also corrects an issue where some boards are trying to pass NAND -16bit flag through .options, but the driver is using .devsize instead -and ignoring .options. - -Finally, .dev_ready is treated as a flag by the driver, so make it bool -instead of a function pointer. - -Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-cm-t35.c | 2 -- - arch/arm/mach-omap2/board-cm-t3517.c | 1 - - arch/arm/mach-omap2/board-flash.c | 4 ---- - arch/arm/mach-omap2/common-board-devices.c | 6 ++---- - arch/arm/mach-omap2/gpmc-nand.c | 10 +++------- - arch/arm/plat-omap/include/plat/nand.h | 6 +----- - 6 files changed, 6 insertions(+), 23 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c -index 1a18d3b..d76dca7 100644 ---- a/arch/arm/mach-omap2/board-cm-t35.c -+++ b/arch/arm/mach-omap2/board-cm-t35.c -@@ -162,9 +162,7 @@ static struct mtd_partition cm_t35_nand_partitions[] = { - static struct omap_nand_platform_data cm_t35_nand_data = { - .parts = cm_t35_nand_partitions, - .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions), -- .dma_channel = -1, /* disable DMA in OMAP NAND driver */ - .cs = 0, -- - }; - - static void __init cm_t35_init_nand(void) -diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c -index aa67240..05c72f4 100644 ---- a/arch/arm/mach-omap2/board-cm-t3517.c -+++ b/arch/arm/mach-omap2/board-cm-t3517.c -@@ -236,7 +236,6 @@ static struct mtd_partition cm_t3517_nand_partitions[] = { - static struct omap_nand_platform_data cm_t3517_nand_data = { - .parts = cm_t3517_nand_partitions, - .nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions), -- .dma_channel = -1, /* disable DMA in OMAP NAND driver */ - .cs = 0, - }; - -diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c -index 729892f..aa1b0cb 100644 ---- a/arch/arm/mach-omap2/board-flash.c -+++ b/arch/arm/mach-omap2/board-flash.c -@@ -132,11 +132,7 @@ static struct gpmc_timings nand_timings = { - }; - - static struct omap_nand_platform_data board_nand_data = { -- .nand_setup = NULL, - .gpmc_t = &nand_timings, -- .dma_channel = -1, /* disable DMA in OMAP NAND driver */ -- .dev_ready = NULL, -- .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */ - }; - - void -diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c -index 94ccf46..0043fa8 100644 ---- a/arch/arm/mach-omap2/common-board-devices.c -+++ b/arch/arm/mach-omap2/common-board-devices.c -@@ -115,9 +115,7 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, - #endif - - #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) --static struct omap_nand_platform_data nand_data = { -- .dma_channel = -1, /* disable DMA in OMAP NAND driver */ --}; -+static struct omap_nand_platform_data nand_data; - - void __init omap_nand_flash_init(int options, struct mtd_partition *parts, - int nr_parts) -@@ -148,7 +146,7 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts, - nand_data.cs = nandcs; - nand_data.parts = parts; - nand_data.nr_parts = nr_parts; -- nand_data.options = options; -+ nand_data.devsize = options; - - printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); - if (gpmc_nand_init(&nand_data) < 0) -diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c -index c1791d0..8ad210b 100644 ---- a/arch/arm/mach-omap2/gpmc-nand.c -+++ b/arch/arm/mach-omap2/gpmc-nand.c -@@ -20,8 +20,6 @@ - #include <plat/board.h> - #include <plat/gpmc.h> - --static struct omap_nand_platform_data *gpmc_nand_data; -- - static struct resource gpmc_nand_resource = { - .flags = IORESOURCE_MEM, - }; -@@ -33,7 +31,7 @@ static struct platform_device gpmc_nand_device = { - .resource = &gpmc_nand_resource, - }; - --static int omap2_nand_gpmc_retime(void) -+static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data) - { - struct gpmc_timings t; - int err; -@@ -83,13 +81,11 @@ static int omap2_nand_gpmc_retime(void) - return 0; - } - --int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) -+int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) - { - int err = 0; - struct device *dev = &gpmc_nand_device.dev; - -- gpmc_nand_data = _nand_data; -- gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime; - gpmc_nand_device.dev.platform_data = gpmc_nand_data; - - err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, -@@ -100,7 +96,7 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) - } - - /* Set timings in GPMC */ -- err = omap2_nand_gpmc_retime(); -+ err = omap2_nand_gpmc_retime(gpmc_nand_data); - if (err < 0) { - dev_err(dev, "Unable to set gpmc timings: %d\n", err); - return err; -diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h -index d86d1ec..67fc506 100644 ---- a/arch/arm/plat-omap/include/plat/nand.h -+++ b/arch/arm/plat-omap/include/plat/nand.h -@@ -19,15 +19,11 @@ enum nand_io { - }; - - struct omap_nand_platform_data { -- unsigned int options; - int cs; -- int gpio_irq; - struct mtd_partition *parts; - struct gpmc_timings *gpmc_t; - int nr_parts; -- int (*nand_setup)(void); -- int (*dev_ready)(struct omap_nand_platform_data *); -- int dma_channel; -+ bool dev_ready; - int gpmc_irq; - enum nand_io xfer_type; - unsigned long phys_base; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch deleted file mode 100644 index aa9cc6e..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 3e0e5636effabe150374f2a212974f1e954be5b2 Mon Sep 17 00:00:00 2001 -From: Peter Ujfalusi <peter.ujfalusi@ti.com> -Date: Tue, 28 Jun 2011 10:16:55 +0000 -Subject: [PATCH 018/149] omap: board-omap3evm: Fix compilation error - -Fix compilation error introduced with 786b01a8c1db0c0decca55d660a2a3ebd7cfb26b -(cleanup regulator supply definitions in mach-omap2). - -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> -[tony@atomide.com: updated comments] -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-omap3evm.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c -index 6f957ed..57bce0f 100644 ---- a/arch/arm/mach-omap2/board-omap3evm.c -+++ b/arch/arm/mach-omap2/board-omap3evm.c -@@ -510,7 +510,7 @@ static struct regulator_init_data omap3evm_vio = { - #define OMAP3EVM_WLAN_IRQ_GPIO (149) - - static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), - }; - - /* VMMC2 for driving the WL12xx module */ -@@ -518,7 +518,7 @@ static struct regulator_init_data omap3evm_vmmc2 = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply);, -+ .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply), - .consumer_supplies = omap3evm_vmmc2_supply, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch deleted file mode 100644 index b233473..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch +++ /dev/null @@ -1,311 +0,0 @@ -From 20f244f6b795ee54f053eee5a5e0f9313a13e403 Mon Sep 17 00:00:00 2001 -From: Jarkko Nikula <jhnikula@gmail.com> -Date: Tue, 14 Jun 2011 11:23:51 +0000 -Subject: [PATCH 019/149] omap: mcbsp: Drop SPI mode support - -We haven't seen any use for the SPI API in McBSP driver over the years. More -over, Peter Ujfalusi <peter.ujfalusi@ti.com> noticed that SPI mode is not -even supported since OMAP2430 so it's very unlikely that we'll see any use -for it in the future either. - -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> -Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/plat-omap/include/plat/mcbsp.h | 37 ------ - arch/arm/plat-omap/mcbsp.c | 214 ------------------------------- - 2 files changed, 0 insertions(+), 251 deletions(-) - -diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h -index f8f690a..3fc75a8 100644 ---- a/arch/arm/plat-omap/include/plat/mcbsp.h -+++ b/arch/arm/plat-omap/include/plat/mcbsp.h -@@ -353,38 +353,6 @@ typedef enum { - OMAP_MCBSP_WORD_32, - } omap_mcbsp_word_length; - --typedef enum { -- OMAP_MCBSP_CLK_RISING = 0, -- OMAP_MCBSP_CLK_FALLING, --} omap_mcbsp_clk_polarity; -- --typedef enum { -- OMAP_MCBSP_FS_ACTIVE_HIGH = 0, -- OMAP_MCBSP_FS_ACTIVE_LOW, --} omap_mcbsp_fs_polarity; -- --typedef enum { -- OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0, -- OMAP_MCBSP_CLK_STP_MODE_DELAY, --} omap_mcbsp_clk_stp_mode; -- -- --/******* SPI specific mode **********/ --typedef enum { -- OMAP_MCBSP_SPI_MASTER = 0, -- OMAP_MCBSP_SPI_SLAVE, --} omap_mcbsp_spi_mode; -- --struct omap_mcbsp_spi_cfg { -- omap_mcbsp_spi_mode spi_mode; -- omap_mcbsp_clk_polarity rx_clock_polarity; -- omap_mcbsp_clk_polarity tx_clock_polarity; -- omap_mcbsp_fs_polarity fsx_polarity; -- u8 clk_div; -- omap_mcbsp_clk_stp_mode clk_stp_mode; -- omap_mcbsp_word_length word_length; --}; -- - /* Platform specific configuration */ - struct omap_mcbsp_ops { - void (*request)(unsigned int); -@@ -504,14 +472,9 @@ u32 omap_mcbsp_recv_word(unsigned int id); - - int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); - int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); --int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word); --int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word); -- - - /* McBSP functional clock source changing function */ - extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); --/* SPI specific API */ --void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg); - - /* Polled read/write functions */ - int omap_mcbsp_pollread(unsigned int id, u16 * buf); -diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c -index 5587acf..1de2724 100644 ---- a/arch/arm/plat-omap/mcbsp.c -+++ b/arch/arm/plat-omap/mcbsp.c -@@ -1175,147 +1175,6 @@ u32 omap_mcbsp_recv_word(unsigned int id) - } - EXPORT_SYMBOL(omap_mcbsp_recv_word); - --int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) --{ -- struct omap_mcbsp *mcbsp; -- omap_mcbsp_word_length tx_word_length; -- omap_mcbsp_word_length rx_word_length; -- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return -ENODEV; -- } -- mcbsp = id_to_mcbsp_ptr(id); -- tx_word_length = mcbsp->tx_word_length; -- rx_word_length = mcbsp->rx_word_length; -- -- if (tx_word_length != rx_word_length) -- return -EINVAL; -- -- /* First we wait for the transmitter to be ready */ -- spcr2 = MCBSP_READ(mcbsp, SPCR2); -- while (!(spcr2 & XRDY)) { -- spcr2 = MCBSP_READ(mcbsp, SPCR2); -- if (attempts++ > 1000) { -- /* We must reset the transmitter */ -- MCBSP_WRITE(mcbsp, SPCR2, -- MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST)); -- udelay(10); -- MCBSP_WRITE(mcbsp, SPCR2, -- MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST); -- udelay(10); -- dev_err(mcbsp->dev, "McBSP%d transmitter not " -- "ready\n", mcbsp->id); -- return -EAGAIN; -- } -- } -- -- /* Now we can push the data */ -- if (tx_word_length > OMAP_MCBSP_WORD_16) -- MCBSP_WRITE(mcbsp, DXR2, word >> 16); -- MCBSP_WRITE(mcbsp, DXR1, word & 0xffff); -- -- /* We wait for the receiver to be ready */ -- spcr1 = MCBSP_READ(mcbsp, SPCR1); -- while (!(spcr1 & RRDY)) { -- spcr1 = MCBSP_READ(mcbsp, SPCR1); -- if (attempts++ > 1000) { -- /* We must reset the receiver */ -- MCBSP_WRITE(mcbsp, SPCR1, -- MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST)); -- udelay(10); -- MCBSP_WRITE(mcbsp, SPCR1, -- MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST); -- udelay(10); -- dev_err(mcbsp->dev, "McBSP%d receiver not " -- "ready\n", mcbsp->id); -- return -EAGAIN; -- } -- } -- -- /* Receiver is ready, let's read the dummy data */ -- if (rx_word_length > OMAP_MCBSP_WORD_16) -- word_msb = MCBSP_READ(mcbsp, DRR2); -- word_lsb = MCBSP_READ(mcbsp, DRR1); -- -- return 0; --} --EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll); -- --int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) --{ -- struct omap_mcbsp *mcbsp; -- u32 clock_word = 0; -- omap_mcbsp_word_length tx_word_length; -- omap_mcbsp_word_length rx_word_length; -- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return -ENODEV; -- } -- -- mcbsp = id_to_mcbsp_ptr(id); -- -- tx_word_length = mcbsp->tx_word_length; -- rx_word_length = mcbsp->rx_word_length; -- -- if (tx_word_length != rx_word_length) -- return -EINVAL; -- -- /* First we wait for the transmitter to be ready */ -- spcr2 = MCBSP_READ(mcbsp, SPCR2); -- while (!(spcr2 & XRDY)) { -- spcr2 = MCBSP_READ(mcbsp, SPCR2); -- if (attempts++ > 1000) { -- /* We must reset the transmitter */ -- MCBSP_WRITE(mcbsp, SPCR2, -- MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST)); -- udelay(10); -- MCBSP_WRITE(mcbsp, SPCR2, -- MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST); -- udelay(10); -- dev_err(mcbsp->dev, "McBSP%d transmitter not " -- "ready\n", mcbsp->id); -- return -EAGAIN; -- } -- } -- -- /* We first need to enable the bus clock */ -- if (tx_word_length > OMAP_MCBSP_WORD_16) -- MCBSP_WRITE(mcbsp, DXR2, clock_word >> 16); -- MCBSP_WRITE(mcbsp, DXR1, clock_word & 0xffff); -- -- /* We wait for the receiver to be ready */ -- spcr1 = MCBSP_READ(mcbsp, SPCR1); -- while (!(spcr1 & RRDY)) { -- spcr1 = MCBSP_READ(mcbsp, SPCR1); -- if (attempts++ > 1000) { -- /* We must reset the receiver */ -- MCBSP_WRITE(mcbsp, SPCR1, -- MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST)); -- udelay(10); -- MCBSP_WRITE(mcbsp, SPCR1, -- MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST); -- udelay(10); -- dev_err(mcbsp->dev, "McBSP%d receiver not " -- "ready\n", mcbsp->id); -- return -EAGAIN; -- } -- } -- -- /* Receiver is ready, there is something for us */ -- if (rx_word_length > OMAP_MCBSP_WORD_16) -- word_msb = MCBSP_READ(mcbsp, DRR2); -- word_lsb = MCBSP_READ(mcbsp, DRR1); -- -- word[0] = (word_lsb | (word_msb << 16)); -- -- return 0; --} --EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll); -- - /* - * Simple DMA based buffer rx/tx routines. - * Nothing fancy, just a single buffer tx/rx through DMA. -@@ -1449,79 +1308,6 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, - } - EXPORT_SYMBOL(omap_mcbsp_recv_buffer); - --/* -- * SPI wrapper. -- * Since SPI setup is much simpler than the generic McBSP one, -- * this wrapper just need an omap_mcbsp_spi_cfg structure as an input. -- * Once this is done, you can call omap_mcbsp_start(). -- */ --void omap_mcbsp_set_spi_mode(unsigned int id, -- const struct omap_mcbsp_spi_cfg *spi_cfg) --{ -- struct omap_mcbsp *mcbsp; -- struct omap_mcbsp_reg_cfg mcbsp_cfg; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return; -- } -- mcbsp = id_to_mcbsp_ptr(id); -- -- memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg)); -- -- /* SPI has only one frame */ -- mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0)); -- mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0)); -- -- /* Clock stop mode */ -- if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY) -- mcbsp_cfg.spcr1 |= (1 << 12); -- else -- mcbsp_cfg.spcr1 |= (3 << 11); -- -- /* Set clock parities */ -- if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING) -- mcbsp_cfg.pcr0 |= CLKRP; -- else -- mcbsp_cfg.pcr0 &= ~CLKRP; -- -- if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING) -- mcbsp_cfg.pcr0 &= ~CLKXP; -- else -- mcbsp_cfg.pcr0 |= CLKXP; -- -- /* Set SCLKME to 0 and CLKSM to 1 */ -- mcbsp_cfg.pcr0 &= ~SCLKME; -- mcbsp_cfg.srgr2 |= CLKSM; -- -- /* Set FSXP */ -- if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH) -- mcbsp_cfg.pcr0 &= ~FSXP; -- else -- mcbsp_cfg.pcr0 |= FSXP; -- -- if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) { -- mcbsp_cfg.pcr0 |= CLKXM; -- mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1); -- mcbsp_cfg.pcr0 |= FSXM; -- mcbsp_cfg.srgr2 &= ~FSGM; -- mcbsp_cfg.xcr2 |= XDATDLY(1); -- mcbsp_cfg.rcr2 |= RDATDLY(1); -- } else { -- mcbsp_cfg.pcr0 &= ~CLKXM; -- mcbsp_cfg.srgr1 |= CLKGDV(1); -- mcbsp_cfg.pcr0 &= ~FSXM; -- mcbsp_cfg.xcr2 &= ~XDATDLY(3); -- mcbsp_cfg.rcr2 &= ~RDATDLY(3); -- } -- -- mcbsp_cfg.xcr2 &= ~XPHASE; -- mcbsp_cfg.rcr2 &= ~RPHASE; -- -- omap_mcbsp_config(id, &mcbsp_cfg); --} --EXPORT_SYMBOL(omap_mcbsp_set_spi_mode); -- - #ifdef CONFIG_ARCH_OMAP3 - #define max_thres(m) (mcbsp->pdata->buffer_size) - #define valid_threshold(m, val) ((val) <= max_thres(m)) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch deleted file mode 100644 index 510a22d..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch +++ /dev/null @@ -1,548 +0,0 @@ -From 8eea6f162c7a82d44c8e7c444cadfa43c4d586e5 Mon Sep 17 00:00:00 2001 -From: Jarkko Nikula <jhnikula@gmail.com> -Date: Tue, 14 Jun 2011 11:23:52 +0000 -Subject: [PATCH 020/149] omap: mcbsp: Drop in-driver transfer support - -We haven't seen either use for in-driver transfer API in McBSP driver -over the years so it looks they can be removed too. - -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/plat-omap/include/plat/mcbsp.h | 25 -- - arch/arm/plat-omap/mcbsp.c | 382 ++----------------------------- - 2 files changed, 19 insertions(+), 388 deletions(-) - -diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h -index 3fc75a8..6c53508 100644 ---- a/arch/arm/plat-omap/include/plat/mcbsp.h -+++ b/arch/arm/plat-omap/include/plat/mcbsp.h -@@ -24,7 +24,6 @@ - #ifndef __ASM_ARCH_OMAP_MCBSP_H - #define __ASM_ARCH_OMAP_MCBSP_H - --#include <linux/completion.h> - #include <linux/spinlock.h> - - #include <mach/hardware.h> -@@ -340,10 +339,6 @@ typedef enum { - OMAP_MCBSP5 - } omap_mcbsp_id; - --typedef int __bitwise omap_mcbsp_io_type_t; --#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1) --#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2) -- - typedef enum { - OMAP_MCBSP_WORD_8 = 0, - OMAP_MCBSP_WORD_12, -@@ -393,22 +388,12 @@ struct omap_mcbsp { - omap_mcbsp_word_length rx_word_length; - omap_mcbsp_word_length tx_word_length; - -- omap_mcbsp_io_type_t io_type; /* IRQ or poll */ -- /* IRQ based TX/RX */ - int rx_irq; - int tx_irq; - - /* DMA stuff */ - u8 dma_rx_sync; -- short dma_rx_lch; - u8 dma_tx_sync; -- short dma_tx_lch; -- -- /* Completion queues */ -- struct completion tx_irq_completion; -- struct completion rx_irq_completion; -- struct completion tx_dma_completion; -- struct completion rx_dma_completion; - - /* Protect the field .free, while checking if the mcbsp is in use */ - spinlock_t lock; -@@ -467,20 +452,10 @@ int omap_mcbsp_request(unsigned int id); - void omap_mcbsp_free(unsigned int id); - void omap_mcbsp_start(unsigned int id, int tx, int rx); - void omap_mcbsp_stop(unsigned int id, int tx, int rx); --void omap_mcbsp_xmit_word(unsigned int id, u32 word); --u32 omap_mcbsp_recv_word(unsigned int id); -- --int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); --int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); - - /* McBSP functional clock source changing function */ - extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); - --/* Polled read/write functions */ --int omap_mcbsp_pollread(unsigned int id, u16 * buf); --int omap_mcbsp_pollwrite(unsigned int id, u16 buf); --int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type); -- - /* McBSP signal muxing API */ - void omap2_mcbsp1_mux_clkr_src(u8 mux); - void omap2_mcbsp1_mux_fsr_src(u8 mux); -diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c -index 1de2724..455eadc 100644 ---- a/arch/arm/plat-omap/mcbsp.c -+++ b/arch/arm/plat-omap/mcbsp.c -@@ -16,8 +16,6 @@ - #include <linux/init.h> - #include <linux/device.h> - #include <linux/platform_device.h> --#include <linux/wait.h> --#include <linux/completion.h> - #include <linux/interrupt.h> - #include <linux/err.h> - #include <linux/clk.h> -@@ -25,7 +23,6 @@ - #include <linux/io.h> - #include <linux/slab.h> - --#include <plat/dma.h> - #include <plat/mcbsp.h> - #include <plat/omap_device.h> - #include <linux/pm_runtime.h> -@@ -136,8 +133,6 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) - irqst_spcr2); - /* Writing zero to XSYNC_ERR clears the IRQ */ - MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2)); -- } else { -- complete(&mcbsp_tx->tx_irq_completion); - } - - return IRQ_HANDLED; -@@ -156,41 +151,11 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) - irqst_spcr1); - /* Writing zero to RSYNC_ERR clears the IRQ */ - MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1)); -- } else { -- complete(&mcbsp_rx->rx_irq_completion); - } - - return IRQ_HANDLED; - } - --static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) --{ -- struct omap_mcbsp *mcbsp_dma_tx = data; -- -- dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n", -- MCBSP_READ(mcbsp_dma_tx, SPCR2)); -- -- /* We can free the channels */ -- omap_free_dma(mcbsp_dma_tx->dma_tx_lch); -- mcbsp_dma_tx->dma_tx_lch = -1; -- -- complete(&mcbsp_dma_tx->tx_dma_completion); --} -- --static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data) --{ -- struct omap_mcbsp *mcbsp_dma_rx = data; -- -- dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n", -- MCBSP_READ(mcbsp_dma_rx, SPCR2)); -- -- /* We can free the channels */ -- omap_free_dma(mcbsp_dma_rx->dma_rx_lch); -- mcbsp_dma_rx->dma_rx_lch = -1; -- -- complete(&mcbsp_dma_rx->rx_dma_completion); --} -- - /* - * omap_mcbsp_config simply write a config to the - * appropriate McBSP. -@@ -758,37 +723,6 @@ static inline void omap_st_start(struct omap_mcbsp *mcbsp) {} - static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {} - #endif - --/* -- * We can choose between IRQ based or polled IO. -- * This needs to be called before omap_mcbsp_request(). -- */ --int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type) --{ -- struct omap_mcbsp *mcbsp; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return -ENODEV; -- } -- mcbsp = id_to_mcbsp_ptr(id); -- -- spin_lock(&mcbsp->lock); -- -- if (!mcbsp->free) { -- dev_err(mcbsp->dev, "McBSP%d is currently in use\n", -- mcbsp->id); -- spin_unlock(&mcbsp->lock); -- return -EINVAL; -- } -- -- mcbsp->io_type = io_type; -- -- spin_unlock(&mcbsp->lock); -- -- return 0; --} --EXPORT_SYMBOL(omap_mcbsp_set_io_type); -- - int omap_mcbsp_request(unsigned int id) - { - struct omap_mcbsp *mcbsp; -@@ -833,29 +767,24 @@ int omap_mcbsp_request(unsigned int id) - MCBSP_WRITE(mcbsp, SPCR1, 0); - MCBSP_WRITE(mcbsp, SPCR2, 0); - -- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { -- /* We need to get IRQs here */ -- init_completion(&mcbsp->tx_irq_completion); -- err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, -- 0, "McBSP", (void *)mcbsp); -+ err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, -+ 0, "McBSP", (void *)mcbsp); -+ if (err != 0) { -+ dev_err(mcbsp->dev, "Unable to request TX IRQ %d " -+ "for McBSP%d\n", mcbsp->tx_irq, -+ mcbsp->id); -+ goto err_clk_disable; -+ } -+ -+ if (mcbsp->rx_irq) { -+ err = request_irq(mcbsp->rx_irq, -+ omap_mcbsp_rx_irq_handler, -+ 0, "McBSP", (void *)mcbsp); - if (err != 0) { -- dev_err(mcbsp->dev, "Unable to request TX IRQ %d " -- "for McBSP%d\n", mcbsp->tx_irq, -+ dev_err(mcbsp->dev, "Unable to request RX IRQ %d " -+ "for McBSP%d\n", mcbsp->rx_irq, - mcbsp->id); -- goto err_clk_disable; -- } -- -- if (mcbsp->rx_irq) { -- init_completion(&mcbsp->rx_irq_completion); -- err = request_irq(mcbsp->rx_irq, -- omap_mcbsp_rx_irq_handler, -- 0, "McBSP", (void *)mcbsp); -- if (err != 0) { -- dev_err(mcbsp->dev, "Unable to request RX IRQ %d " -- "for McBSP%d\n", mcbsp->rx_irq, -- mcbsp->id); -- goto err_free_irq; -- } -+ goto err_free_irq; - } - } - -@@ -901,12 +830,9 @@ void omap_mcbsp_free(unsigned int id) - - pm_runtime_put_sync(mcbsp->dev); - -- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { -- /* Free IRQs */ -- if (mcbsp->rx_irq) -- free_irq(mcbsp->rx_irq, (void *)mcbsp); -- free_irq(mcbsp->tx_irq, (void *)mcbsp); -- } -+ if (mcbsp->rx_irq) -+ free_irq(mcbsp->rx_irq, (void *)mcbsp); -+ free_irq(mcbsp->tx_irq, (void *)mcbsp); - - reg_cache = mcbsp->reg_cache; - -@@ -1043,271 +969,6 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) - } - EXPORT_SYMBOL(omap_mcbsp_stop); - --/* polled mcbsp i/o operations */ --int omap_mcbsp_pollwrite(unsigned int id, u16 buf) --{ -- struct omap_mcbsp *mcbsp; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return -ENODEV; -- } -- -- mcbsp = id_to_mcbsp_ptr(id); -- -- MCBSP_WRITE(mcbsp, DXR1, buf); -- /* if frame sync error - clear the error */ -- if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) { -- /* clear error */ -- MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2)); -- /* resend */ -- return -1; -- } else { -- /* wait for transmit confirmation */ -- int attemps = 0; -- while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) { -- if (attemps++ > 1000) { -- MCBSP_WRITE(mcbsp, SPCR2, -- MCBSP_READ_CACHE(mcbsp, SPCR2) & -- (~XRST)); -- udelay(10); -- MCBSP_WRITE(mcbsp, SPCR2, -- MCBSP_READ_CACHE(mcbsp, SPCR2) | -- (XRST)); -- udelay(10); -- dev_err(mcbsp->dev, "Could not write to" -- " McBSP%d Register\n", mcbsp->id); -- return -2; -- } -- } -- } -- -- return 0; --} --EXPORT_SYMBOL(omap_mcbsp_pollwrite); -- --int omap_mcbsp_pollread(unsigned int id, u16 *buf) --{ -- struct omap_mcbsp *mcbsp; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return -ENODEV; -- } -- mcbsp = id_to_mcbsp_ptr(id); -- -- /* if frame sync error - clear the error */ -- if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) { -- /* clear error */ -- MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1)); -- /* resend */ -- return -1; -- } else { -- /* wait for receive confirmation */ -- int attemps = 0; -- while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) { -- if (attemps++ > 1000) { -- MCBSP_WRITE(mcbsp, SPCR1, -- MCBSP_READ_CACHE(mcbsp, SPCR1) & -- (~RRST)); -- udelay(10); -- MCBSP_WRITE(mcbsp, SPCR1, -- MCBSP_READ_CACHE(mcbsp, SPCR1) | -- (RRST)); -- udelay(10); -- dev_err(mcbsp->dev, "Could not read from" -- " McBSP%d Register\n", mcbsp->id); -- return -2; -- } -- } -- } -- *buf = MCBSP_READ(mcbsp, DRR1); -- -- return 0; --} --EXPORT_SYMBOL(omap_mcbsp_pollread); -- --/* -- * IRQ based word transmission. -- */ --void omap_mcbsp_xmit_word(unsigned int id, u32 word) --{ -- struct omap_mcbsp *mcbsp; -- omap_mcbsp_word_length word_length; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return; -- } -- -- mcbsp = id_to_mcbsp_ptr(id); -- word_length = mcbsp->tx_word_length; -- -- wait_for_completion(&mcbsp->tx_irq_completion); -- -- if (word_length > OMAP_MCBSP_WORD_16) -- MCBSP_WRITE(mcbsp, DXR2, word >> 16); -- MCBSP_WRITE(mcbsp, DXR1, word & 0xffff); --} --EXPORT_SYMBOL(omap_mcbsp_xmit_word); -- --u32 omap_mcbsp_recv_word(unsigned int id) --{ -- struct omap_mcbsp *mcbsp; -- u16 word_lsb, word_msb = 0; -- omap_mcbsp_word_length word_length; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return -ENODEV; -- } -- mcbsp = id_to_mcbsp_ptr(id); -- -- word_length = mcbsp->rx_word_length; -- -- wait_for_completion(&mcbsp->rx_irq_completion); -- -- if (word_length > OMAP_MCBSP_WORD_16) -- word_msb = MCBSP_READ(mcbsp, DRR2); -- word_lsb = MCBSP_READ(mcbsp, DRR1); -- -- return (word_lsb | (word_msb << 16)); --} --EXPORT_SYMBOL(omap_mcbsp_recv_word); -- --/* -- * Simple DMA based buffer rx/tx routines. -- * Nothing fancy, just a single buffer tx/rx through DMA. -- * The DMA resources are released once the transfer is done. -- * For anything fancier, you should use your own customized DMA -- * routines and callbacks. -- */ --int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, -- unsigned int length) --{ -- struct omap_mcbsp *mcbsp; -- int dma_tx_ch; -- int src_port = 0; -- int dest_port = 0; -- int sync_dev = 0; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return -ENODEV; -- } -- mcbsp = id_to_mcbsp_ptr(id); -- -- if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX", -- omap_mcbsp_tx_dma_callback, -- mcbsp, -- &dma_tx_ch)) { -- dev_err(mcbsp->dev, " Unable to request DMA channel for " -- "McBSP%d TX. Trying IRQ based TX\n", -- mcbsp->id); -- return -EAGAIN; -- } -- mcbsp->dma_tx_lch = dma_tx_ch; -- -- dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id, -- dma_tx_ch); -- -- init_completion(&mcbsp->tx_dma_completion); -- -- if (cpu_class_is_omap1()) { -- src_port = OMAP_DMA_PORT_TIPB; -- dest_port = OMAP_DMA_PORT_EMIFF; -- } -- if (cpu_class_is_omap2()) -- sync_dev = mcbsp->dma_tx_sync; -- -- omap_set_dma_transfer_params(mcbsp->dma_tx_lch, -- OMAP_DMA_DATA_TYPE_S16, -- length >> 1, 1, -- OMAP_DMA_SYNC_ELEMENT, -- sync_dev, 0); -- -- omap_set_dma_dest_params(mcbsp->dma_tx_lch, -- src_port, -- OMAP_DMA_AMODE_CONSTANT, -- mcbsp->phys_base + OMAP_MCBSP_REG_DXR1, -- 0, 0); -- -- omap_set_dma_src_params(mcbsp->dma_tx_lch, -- dest_port, -- OMAP_DMA_AMODE_POST_INC, -- buffer, -- 0, 0); -- -- omap_start_dma(mcbsp->dma_tx_lch); -- wait_for_completion(&mcbsp->tx_dma_completion); -- -- return 0; --} --EXPORT_SYMBOL(omap_mcbsp_xmit_buffer); -- --int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, -- unsigned int length) --{ -- struct omap_mcbsp *mcbsp; -- int dma_rx_ch; -- int src_port = 0; -- int dest_port = 0; -- int sync_dev = 0; -- -- if (!omap_mcbsp_check_valid_id(id)) { -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); -- return -ENODEV; -- } -- mcbsp = id_to_mcbsp_ptr(id); -- -- if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX", -- omap_mcbsp_rx_dma_callback, -- mcbsp, -- &dma_rx_ch)) { -- dev_err(mcbsp->dev, "Unable to request DMA channel for " -- "McBSP%d RX. Trying IRQ based RX\n", -- mcbsp->id); -- return -EAGAIN; -- } -- mcbsp->dma_rx_lch = dma_rx_ch; -- -- dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id, -- dma_rx_ch); -- -- init_completion(&mcbsp->rx_dma_completion); -- -- if (cpu_class_is_omap1()) { -- src_port = OMAP_DMA_PORT_TIPB; -- dest_port = OMAP_DMA_PORT_EMIFF; -- } -- if (cpu_class_is_omap2()) -- sync_dev = mcbsp->dma_rx_sync; -- -- omap_set_dma_transfer_params(mcbsp->dma_rx_lch, -- OMAP_DMA_DATA_TYPE_S16, -- length >> 1, 1, -- OMAP_DMA_SYNC_ELEMENT, -- sync_dev, 0); -- -- omap_set_dma_src_params(mcbsp->dma_rx_lch, -- src_port, -- OMAP_DMA_AMODE_CONSTANT, -- mcbsp->phys_base + OMAP_MCBSP_REG_DRR1, -- 0, 0); -- -- omap_set_dma_dest_params(mcbsp->dma_rx_lch, -- dest_port, -- OMAP_DMA_AMODE_POST_INC, -- buffer, -- 0, 0); -- -- omap_start_dma(mcbsp->dma_rx_lch); -- wait_for_completion(&mcbsp->rx_dma_completion); -- -- return 0; --} --EXPORT_SYMBOL(omap_mcbsp_recv_buffer); -- - #ifdef CONFIG_ARCH_OMAP3 - #define max_thres(m) (mcbsp->pdata->buffer_size) - #define valid_threshold(m, val) ((val) <= max_thres(m)) -@@ -1619,8 +1280,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) - spin_lock_init(&mcbsp->lock); - mcbsp->id = id + 1; - mcbsp->free = true; -- mcbsp->dma_tx_lch = -1; -- mcbsp->dma_rx_lch = -1; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); - if (!res) { -@@ -1646,9 +1305,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) - else - mcbsp->phys_dma_base = res->start; - -- /* Default I/O is IRQ based */ -- mcbsp->io_type = OMAP_MCBSP_IRQ_IO; -- - mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); - mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021-omap2-fix-build-regression.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021-omap2-fix-build-regression.patch deleted file mode 100644 index 0b63867..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021-omap2-fix-build-regression.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 742b21718c968c17ac951b73b4ba79f4a489d35b Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann <arnd@arndb.de> -Date: Thu, 30 Jun 2011 12:58:01 +0000 -Subject: [PATCH 021/149] omap2+: fix build regression - -board-generic.c now contains a reference to omap3_timer, but depends -only on ARCH_OMAP2, not on ARCH_OMAP3, which controls that symbol. -omap2_timer seems to be more appropriate anyway, so use that instead. - -Signed-off-by: Arnd Bergmann <arnd@arndb.de> -Acked-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-generic.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c -index c6ecf60..54db41a 100644 ---- a/arch/arm/mach-omap2/board-generic.c -+++ b/arch/arm/mach-omap2/board-generic.c -@@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") - .init_early = omap_generic_init_early, - .init_irq = omap2_init_irq, - .init_machine = omap_generic_init, -- .timer = &omap3_timer, -+ .timer = &omap2_timer, - MACHINE_END --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New-twl-common-for-common-TWL-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New-twl-common-for-common-TWL-configuration.patch deleted file mode 100644 index a0ccdd3..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New-twl-common-for-common-TWL-configuration.patch +++ /dev/null @@ -1,200 +0,0 @@ -From 552daa4d00a2c1835e5114af852efc65175e1cc0 Mon Sep 17 00:00:00 2001 -From: Peter Ujfalusi <peter.ujfalusi@ti.com> -Date: Sat, 4 Jun 2011 08:16:41 +0300 -Subject: [PATCH 022/149] OMAP: New twl-common for common TWL configuration - -Introduce a new file, which will be used to configure -common pmic (TWL) devices, regulators, and TWL audio. - -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> -Acked-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/Makefile | 2 +- - arch/arm/mach-omap2/common-board-devices.c | 21 ------------- - arch/arm/mach-omap2/common-board-devices.h | 26 +-------------- - arch/arm/mach-omap2/twl-common.c | 46 ++++++++++++++++++++++++++++ - arch/arm/mach-omap2/twl-common.h | 28 +++++++++++++++++ - 5 files changed, 77 insertions(+), 46 deletions(-) - create mode 100644 arch/arm/mach-omap2/twl-common.c - create mode 100644 arch/arm/mach-omap2/twl-common.h - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index adbe82d..ff1466f 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -269,4 +269,4 @@ obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o - disp-$(CONFIG_OMAP2_DSS) := display.o - obj-y += $(disp-m) $(disp-y) - --obj-y += common-board-devices.o -+obj-y += common-board-devices.o twl-common.o -diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c -index 0043fa8..bcb0c58 100644 ---- a/arch/arm/mach-omap2/common-board-devices.c -+++ b/arch/arm/mach-omap2/common-board-devices.c -@@ -20,36 +20,15 @@ - * - */ - --#include <linux/i2c.h> --#include <linux/i2c/twl.h> -- - #include <linux/gpio.h> - #include <linux/spi/spi.h> - #include <linux/spi/ads7846.h> - --#include <plat/i2c.h> - #include <plat/mcspi.h> - #include <plat/nand.h> - - #include "common-board-devices.h" - --static struct i2c_board_info __initdata pmic_i2c_board_info = { -- .addr = 0x48, -- .flags = I2C_CLIENT_WAKE, --}; -- --void __init omap_pmic_init(int bus, u32 clkrate, -- const char *pmic_type, int pmic_irq, -- struct twl4030_platform_data *pmic_data) --{ -- strncpy(pmic_i2c_board_info.type, pmic_type, -- sizeof(pmic_i2c_board_info.type)); -- pmic_i2c_board_info.irq = pmic_irq; -- pmic_i2c_board_info.platform_data = pmic_data; -- -- omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); --} -- - #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ - defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) - static struct omap2_mcspi_device_config ads7846_mcspi_config = { -diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h -index 6797190..a0b4a428 100644 ---- a/arch/arm/mach-omap2/common-board-devices.h -+++ b/arch/arm/mach-omap2/common-board-devices.h -@@ -1,33 +1,11 @@ - #ifndef __OMAP_COMMON_BOARD_DEVICES__ - #define __OMAP_COMMON_BOARD_DEVICES__ - -+#include "twl-common.h" -+ - #define NAND_BLOCK_SIZE SZ_128K - --struct twl4030_platform_data; - struct mtd_partition; -- --void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, -- struct twl4030_platform_data *pmic_data); -- --static inline void omap2_pmic_init(const char *pmic_type, -- struct twl4030_platform_data *pmic_data) --{ -- omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data); --} -- --static inline void omap3_pmic_init(const char *pmic_type, -- struct twl4030_platform_data *pmic_data) --{ -- omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); --} -- --static inline void omap4_pmic_init(const char *pmic_type, -- struct twl4030_platform_data *pmic_data) --{ -- /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ -- omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); --} -- - struct ads7846_platform_data; - - void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c -new file mode 100644 -index 0000000..4f7b24c ---- /dev/null -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -0,0 +1,46 @@ -+/* -+ * twl-common.c -+ * -+ * Copyright (C) 2011 Texas Instruments, Inc.. -+ * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA -+ * 02110-1301 USA -+ * -+ */ -+ -+#include <linux/i2c.h> -+#include <linux/i2c/twl.h> -+#include <linux/gpio.h> -+ -+#include <plat/i2c.h> -+ -+#include "twl-common.h" -+ -+static struct i2c_board_info __initdata pmic_i2c_board_info = { -+ .addr = 0x48, -+ .flags = I2C_CLIENT_WAKE, -+}; -+ -+void __init omap_pmic_init(int bus, u32 clkrate, -+ const char *pmic_type, int pmic_irq, -+ struct twl4030_platform_data *pmic_data) -+{ -+ strncpy(pmic_i2c_board_info.type, pmic_type, -+ sizeof(pmic_i2c_board_info.type)); -+ pmic_i2c_board_info.irq = pmic_irq; -+ pmic_i2c_board_info.platform_data = pmic_data; -+ -+ omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); -+} -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h -new file mode 100644 -index 0000000..e9fe2ab ---- /dev/null -+++ b/arch/arm/mach-omap2/twl-common.h -@@ -0,0 +1,28 @@ -+#ifndef __OMAP_PMIC_COMMON__ -+#define __OMAP_PMIC_COMMON__ -+ -+struct twl4030_platform_data; -+ -+void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, -+ struct twl4030_platform_data *pmic_data); -+ -+static inline void omap2_pmic_init(const char *pmic_type, -+ struct twl4030_platform_data *pmic_data) -+{ -+ omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data); -+} -+ -+static inline void omap3_pmic_init(const char *pmic_type, -+ struct twl4030_platform_data *pmic_data) -+{ -+ omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); -+} -+ -+static inline void omap4_pmic_init(const char *pmic_type, -+ struct twl4030_platform_data *pmic_data) -+{ -+ /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ -+ omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); -+} -+ -+#endif /* __OMAP_PMIC_COMMON__ */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move-common-twl6030-configuration-to-twl-commo.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move-common-twl6030-configuration-to-twl-commo.patch deleted file mode 100644 index b04d1f8..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move-common-twl6030-configuration-to-twl-commo.patch +++ /dev/null @@ -1,601 +0,0 @@ -From db3a6400c5bc9c99a39fe9b34b7b3c59ae4be245 Mon Sep 17 00:00:00 2001 -From: Peter Ujfalusi <peter.ujfalusi@ti.com> -Date: Tue, 7 Jun 2011 10:26:46 +0300 -Subject: [PATCH 023/149] OMAP4: Move common twl6030 configuration to twl-common - -Reduce the amount of duplicated code by moving the common -configuration for TWL6030 (on OMAP4 platform) to the -twl-common file. -Use the omap4_pmic_get_config function from board files to -properly configure the PMIC with the common fields. - -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> -Acked-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-4430sdp.c | 141 ++------------------------- - arch/arm/mach-omap2/board-omap4panda.c | 146 +++-------------------------- - arch/arm/mach-omap2/twl-common.c | 163 ++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/twl-common.h | 20 ++++ - 4 files changed, 205 insertions(+), 265 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c -index d7df07e..933b25b 100644 ---- a/arch/arm/mach-omap2/board-4430sdp.c -+++ b/arch/arm/mach-omap2/board-4430sdp.c -@@ -302,14 +302,6 @@ static struct omap_musb_board_data musb_board_data = { - .power = 100, - }; - --static struct twl4030_usb_data omap4_usbphy_data = { -- .phy_init = omap4430_phy_init, -- .phy_exit = omap4430_phy_exit, -- .phy_power = omap4430_phy_power, -- .phy_set_clock = omap4430_phy_set_clk, -- .phy_suspend = omap4430_phy_suspend, --}; -- - static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 2, -@@ -332,10 +324,6 @@ static struct regulator_consumer_supply sdp4430_vaux_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), - }; - --static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), --}; -- - static int omap4_twl6030_hsmmc_late_init(struct device *dev) - { - int ret = 0; -@@ -394,61 +382,6 @@ static struct regulator_init_data sdp4430_vaux1 = { - .consumer_supplies = sdp4430_vaux_supply, - }; - --static struct regulator_init_data sdp4430_vaux2 = { -- .constraints = { -- .min_uV = 1200000, -- .max_uV = 2800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -- | REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data sdp4430_vaux3 = { -- .constraints = { -- .min_uV = 1000000, -- .max_uV = 3000000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -- | REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --/* VMMC1 for MMC1 card */ --static struct regulator_init_data sdp4430_vmmc = { -- .constraints = { -- .min_uV = 1200000, -- .max_uV = 3000000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -- | REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = 1, -- .consumer_supplies = sdp4430_vmmc_supply, --}; -- --static struct regulator_init_data sdp4430_vpp = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 2500000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -- | REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- - static struct regulator_init_data sdp4430_vusim = { - .constraints = { - .min_uV = 1200000, -@@ -462,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = { - }, - }; - --static struct regulator_init_data sdp4430_vana = { -- .constraints = { -- .min_uV = 2100000, -- .max_uV = 2100000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data sdp4430_vcxio = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data sdp4430_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data sdp4430_vusb = { -- .constraints = { -- .min_uV = 3300000, -- .max_uV = 3300000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data sdp4430_clk32kg = { -- .constraints = { -- .valid_ops_mask = REGULATOR_CHANGE_STATUS, -- }, --}; -- - static struct twl4030_platform_data sdp4430_twldata = { -- .irq_base = TWL6030_IRQ_BASE, -- .irq_end = TWL6030_IRQ_END, -- - /* Regulators */ -- .vmmc = &sdp4430_vmmc, -- .vpp = &sdp4430_vpp, - .vusim = &sdp4430_vusim, -- .vana = &sdp4430_vana, -- .vcxio = &sdp4430_vcxio, -- .vdac = &sdp4430_vdac, -- .vusb = &sdp4430_vusb, - .vaux1 = &sdp4430_vaux1, -- .vaux2 = &sdp4430_vaux2, -- .vaux3 = &sdp4430_vaux3, -- .clk32kg = &sdp4430_clk32kg, -- .usb = &omap4_usbphy_data - }; - - static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = { -@@ -547,6 +416,16 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = { - }; - static int __init omap4_i2c_init(void) - { -+ omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB, -+ TWL_COMMON_REGULATOR_VDAC | -+ TWL_COMMON_REGULATOR_VAUX2 | -+ TWL_COMMON_REGULATOR_VAUX3 | -+ TWL_COMMON_REGULATOR_VMMC | -+ TWL_COMMON_REGULATOR_VPP | -+ TWL_COMMON_REGULATOR_VANA | -+ TWL_COMMON_REGULATOR_VCXIO | -+ TWL_COMMON_REGULATOR_VUSB | -+ TWL_COMMON_REGULATOR_CLK32KG); - omap4_pmic_init("twl6030", &sdp4430_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c -index ee2034e..9aaa960 100644 ---- a/arch/arm/mach-omap2/board-omap4panda.c -+++ b/arch/arm/mach-omap2/board-omap4panda.c -@@ -154,14 +154,6 @@ static struct omap_musb_board_data musb_board_data = { - .power = 100, - }; - --static struct twl4030_usb_data omap4_usbphy_data = { -- .phy_init = omap4430_phy_init, -- .phy_exit = omap4430_phy_exit, -- .phy_power = omap4430_phy_power, -- .phy_set_clock = omap4430_phy_set_clk, -- .phy_suspend = omap4430_phy_suspend, --}; -- - static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, -@@ -181,10 +173,6 @@ static struct omap2_hsmmc_info mmc[] = { - {} /* Terminator */ - }; - --static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), --}; -- - static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"), - }; -@@ -269,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) - return 0; - } - --static struct regulator_init_data omap4_panda_vaux2 = { -- .constraints = { -- .min_uV = 1200000, -- .max_uV = 2800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -- | REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data omap4_panda_vaux3 = { -- .constraints = { -- .min_uV = 1000000, -- .max_uV = 3000000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -- | REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --/* VMMC1 for MMC1 card */ --static struct regulator_init_data omap4_panda_vmmc = { -- .constraints = { -- .min_uV = 1200000, -- .max_uV = 3000000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -- | REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc_supply), -- .consumer_supplies = omap4_panda_vmmc_supply, --}; -- --static struct regulator_init_data omap4_panda_vpp = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 2500000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -- | REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data omap4_panda_vana = { -- .constraints = { -- .min_uV = 2100000, -- .max_uV = 2100000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data omap4_panda_vcxio = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data omap4_panda_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data omap4_panda_vusb = { -- .constraints = { -- .min_uV = 3300000, -- .max_uV = 3300000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct regulator_init_data omap4_panda_clk32kg = { -- .constraints = { -- .valid_ops_mask = REGULATOR_CHANGE_STATUS, -- }, --}; -- --static struct twl4030_platform_data omap4_panda_twldata = { -- .irq_base = TWL6030_IRQ_BASE, -- .irq_end = TWL6030_IRQ_END, -- -- /* Regulators */ -- .vmmc = &omap4_panda_vmmc, -- .vpp = &omap4_panda_vpp, -- .vana = &omap4_panda_vana, -- .vcxio = &omap4_panda_vcxio, -- .vdac = &omap4_panda_vdac, -- .vusb = &omap4_panda_vusb, -- .vaux2 = &omap4_panda_vaux2, -- .vaux3 = &omap4_panda_vaux3, -- .clk32kg = &omap4_panda_clk32kg, -- .usb = &omap4_usbphy_data, --}; -+/* Panda board uses the common PMIC configuration */ -+static struct twl4030_platform_data omap4_panda_twldata; - - /* - * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM -@@ -404,6 +272,16 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = { - - static int __init omap4_panda_i2c_init(void) - { -+ omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB, -+ TWL_COMMON_REGULATOR_VDAC | -+ TWL_COMMON_REGULATOR_VAUX2 | -+ TWL_COMMON_REGULATOR_VAUX3 | -+ TWL_COMMON_REGULATOR_VMMC | -+ TWL_COMMON_REGULATOR_VPP | -+ TWL_COMMON_REGULATOR_VANA | -+ TWL_COMMON_REGULATOR_VCXIO | -+ TWL_COMMON_REGULATOR_VUSB | -+ TWL_COMMON_REGULATOR_CLK32KG); - omap4_pmic_init("twl6030", &omap4_panda_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - /* -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c -index 4f7b24c..cf80f4c 100644 ---- a/arch/arm/mach-omap2/twl-common.c -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -23,8 +23,11 @@ - #include <linux/i2c.h> - #include <linux/i2c/twl.h> - #include <linux/gpio.h> -+#include <linux/regulator/machine.h> -+#include <linux/regulator/fixed.h> - - #include <plat/i2c.h> -+#include <plat/usb.h> - - #include "twl-common.h" - -@@ -44,3 +47,163 @@ void __init omap_pmic_init(int bus, u32 clkrate, - - omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); - } -+ -+static struct twl4030_usb_data omap4_usb_pdata = { -+ .phy_init = omap4430_phy_init, -+ .phy_exit = omap4430_phy_exit, -+ .phy_power = omap4430_phy_power, -+ .phy_set_clock = omap4430_phy_set_clk, -+ .phy_suspend = omap4430_phy_suspend, -+}; -+ -+static struct regulator_init_data omap4_vdac_idata = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+}; -+ -+static struct regulator_init_data omap4_vaux2_idata = { -+ .constraints = { -+ .min_uV = 1200000, -+ .max_uV = 2800000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -+ | REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+}; -+ -+static struct regulator_init_data omap4_vaux3_idata = { -+ .constraints = { -+ .min_uV = 1000000, -+ .max_uV = 3000000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -+ | REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+}; -+ -+static struct regulator_consumer_supply omap4_vmmc_supply[] = { -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -+}; -+ -+/* VMMC1 for MMC1 card */ -+static struct regulator_init_data omap4_vmmc_idata = { -+ .constraints = { -+ .min_uV = 1200000, -+ .max_uV = 3000000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -+ | REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply), -+ .consumer_supplies = omap4_vmmc_supply, -+}; -+ -+static struct regulator_init_data omap4_vpp_idata = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 2500000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE -+ | REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+}; -+ -+static struct regulator_init_data omap4_vana_idata = { -+ .constraints = { -+ .min_uV = 2100000, -+ .max_uV = 2100000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+}; -+ -+static struct regulator_init_data omap4_vcxio_idata = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+}; -+ -+static struct regulator_init_data omap4_vusb_idata = { -+ .constraints = { -+ .min_uV = 3300000, -+ .max_uV = 3300000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+}; -+ -+static struct regulator_init_data omap4_clk32kg_idata = { -+ .constraints = { -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ }, -+}; -+ -+void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, -+ u32 pdata_flags, u32 regulators_flags) -+{ -+ if (!pmic_data->irq_base) -+ pmic_data->irq_base = TWL6030_IRQ_BASE; -+ if (!pmic_data->irq_end) -+ pmic_data->irq_end = TWL6030_IRQ_END; -+ -+ /* Common platform data configurations */ -+ if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) -+ pmic_data->usb = &omap4_usb_pdata; -+ -+ /* Common regulator configurations */ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) -+ pmic_data->vdac = &omap4_vdac_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2) -+ pmic_data->vaux2 = &omap4_vaux2_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3) -+ pmic_data->vaux3 = &omap4_vaux3_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc) -+ pmic_data->vmmc = &omap4_vmmc_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp) -+ pmic_data->vpp = &omap4_vpp_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana) -+ pmic_data->vana = &omap4_vana_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio) -+ pmic_data->vcxio = &omap4_vcxio_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb) -+ pmic_data->vusb = &omap4_vusb_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG && -+ !pmic_data->clk32kg) -+ pmic_data->clk32kg = &omap4_clk32kg_idata; -+} -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h -index e9fe2ab..d96c289 100644 ---- a/arch/arm/mach-omap2/twl-common.h -+++ b/arch/arm/mach-omap2/twl-common.h -@@ -1,6 +1,23 @@ - #ifndef __OMAP_PMIC_COMMON__ - #define __OMAP_PMIC_COMMON__ - -+#define TWL_COMMON_PDATA_USB (1 << 0) -+ -+/* Common LDO regulators for TWL4030/TWL6030 */ -+#define TWL_COMMON_REGULATOR_VDAC (1 << 0) -+#define TWL_COMMON_REGULATOR_VAUX1 (1 << 1) -+#define TWL_COMMON_REGULATOR_VAUX2 (1 << 2) -+#define TWL_COMMON_REGULATOR_VAUX3 (1 << 3) -+ -+/* TWL6030 LDO regulators */ -+#define TWL_COMMON_REGULATOR_VMMC (1 << 4) -+#define TWL_COMMON_REGULATOR_VPP (1 << 5) -+#define TWL_COMMON_REGULATOR_VUSIM (1 << 6) -+#define TWL_COMMON_REGULATOR_VANA (1 << 7) -+#define TWL_COMMON_REGULATOR_VCXIO (1 << 8) -+#define TWL_COMMON_REGULATOR_VUSB (1 << 9) -+#define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) -+ - struct twl4030_platform_data; - - void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, -@@ -25,4 +42,7 @@ static inline void omap4_pmic_init(const char *pmic_type, - omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); - } - -+void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, -+ u32 pdata_flags, u32 regulators_flags); -+ - #endif /* __OMAP_PMIC_COMMON__ */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl-common.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl-common.patch deleted file mode 100644 index 6dfcc2c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl-common.patch +++ /dev/null @@ -1,827 +0,0 @@ -From 4a1b31f8aed87737ba84e1e5724ecfbe45732bc8 Mon Sep 17 00:00:00 2001 -From: Peter Ujfalusi <peter.ujfalusi@ti.com> -Date: Tue, 7 Jun 2011 10:28:54 +0300 -Subject: [PATCH 024/149] OMAP3: Move common twl configuration to twl-common - -Reduce the amount of duplicated code by moving the common -configuration for twl4030/5030/tpsxx to the twl-common file. -Use the omap3_pmic_get_config function from board files to -properly configure the PMIC with the common fields. - -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> -Acked-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-3430sdp.c | 42 ++------------------ - arch/arm/mach-omap2/board-cm-t35.c | 9 +---- - arch/arm/mach-omap2/board-devkit8000.c | 18 +-------- - arch/arm/mach-omap2/board-igep0020.c | 20 ++-------- - arch/arm/mach-omap2/board-ldp.c | 15 +------ - arch/arm/mach-omap2/board-omap3beagle.c | 18 +-------- - arch/arm/mach-omap2/board-omap3evm.c | 24 +---------- - arch/arm/mach-omap2/board-omap3pandora.c | 17 +------- - arch/arm/mach-omap2/board-omap3stalker.c | 24 +---------- - arch/arm/mach-omap2/board-omap3touchbook.c | 19 +-------- - arch/arm/mach-omap2/board-overo.c | 17 +------- - arch/arm/mach-omap2/board-rm680.c | 8 +--- - arch/arm/mach-omap2/board-rx51-peripherals.c | 15 +------ - arch/arm/mach-omap2/board-zoom-peripherals.c | 51 +++++-------------------- - arch/arm/mach-omap2/twl-common.c | 53 ++++++++++++++++++++++++++ - arch/arm/mach-omap2/twl-common.h | 6 +++ - 16 files changed, 99 insertions(+), 257 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c -index 12fae21..8bbd4e0 100644 ---- a/arch/arm/mach-omap2/board-3430sdp.c -+++ b/arch/arm/mach-omap2/board-3430sdp.c -@@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void) - omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL); - } - --static int sdp3430_batt_table[] = { --/* 0 C*/ --30800, 29500, 28300, 27100, --26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, --17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, --11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, --8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, --5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, --4040, 3910, 3790, 3670, 3550 --}; -- --static struct twl4030_bci_platform_data sdp3430_bci_data = { -- .battery_tmp_tbl = sdp3430_batt_table, -- .tblsize = ARRAY_SIZE(sdp3430_batt_table), --}; -- - static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, -@@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data sdp3430_gpio_data = { - .setup = sdp3430_twl_gpio_setup, - }; - --static struct twl4030_usb_data sdp3430_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- --static struct twl4030_madc_platform_data sdp3430_madc_data = { -- .irq_line = 1, --}; -- - /* regulator consumer mappings */ - - /* ads7846 on SPI */ -@@ -463,24 +439,10 @@ static struct regulator_init_data sdp3430_vpll2 = { - .consumer_supplies = sdp3430_vpll2_supplies, - }; - --static struct twl4030_codec_audio_data sdp3430_audio; -- --static struct twl4030_codec_data sdp3430_codec = { -- .audio_mclk = 26000000, -- .audio = &sdp3430_audio, --}; -- - static struct twl4030_platform_data sdp3430_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ -- .bci = &sdp3430_bci_data, - .gpio = &sdp3430_gpio_data, -- .madc = &sdp3430_madc_data, - .keypad = &sdp3430_kp_data, -- .usb = &sdp3430_usb_data, -- .codec = &sdp3430_codec, - - .vaux1 = &sdp3430_vaux1, - .vaux2 = &sdp3430_vaux2, -@@ -496,7 +458,11 @@ static struct twl4030_platform_data sdp3430_twldata = { - static int __init omap3430_i2c_init(void) - { - /* i2c1 for PMIC only */ -+ omap3_pmic_get_config(&sdp3430_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | -+ TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); - omap3_pmic_init("twl4030", &sdp3430_twldata); -+ - /* i2c2 on camera connector (for sensor control) and optional isp1301 */ - omap_register_i2c_bus(2, 400, NULL, 0); - /* i2c3 on display connector (for DVI, tfp410) */ -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c -index d76dca7..cb00abc 100644 ---- a/arch/arm/mach-omap2/board-cm-t35.c -+++ b/arch/arm/mach-omap2/board-cm-t35.c -@@ -410,10 +410,6 @@ static struct regulator_init_data cm_t35_vpll2 = { - .consumer_supplies = cm_t35_vdvi_supply, - }; - --static struct twl4030_usb_data cm_t35_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static uint32_t cm_t35_keymap[] = { - KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), - KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), -@@ -492,12 +488,8 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = { - }; - - static struct twl4030_platform_data cm_t35_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ - .keypad = &cm_t35_kp_data, -- .usb = &cm_t35_usb_data, - .gpio = &cm_t35_gpio_data, - .vmmc1 = &cm_t35_vmmc1, - .vsim = &cm_t35_vsim, -@@ -507,6 +499,7 @@ static struct twl4030_platform_data cm_t35_twldata = { - - static void __init cm_t35_init_i2c(void) - { -+ omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 0); - omap3_pmic_init("tps65930", &cm_t35_twldata); - } - -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c -index 949dbea..364942e 100644 ---- a/arch/arm/mach-omap2/board-devkit8000.c -+++ b/arch/arm/mach-omap2/board-devkit8000.c -@@ -332,25 +332,9 @@ static struct regulator_init_data devkit8000_vio = { - .consumer_supplies = devkit8000_vio_supply, - }; - --static struct twl4030_usb_data devkit8000_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- --static struct twl4030_codec_audio_data devkit8000_audio_data; -- --static struct twl4030_codec_data devkit8000_codec_data = { -- .audio_mclk = 26000000, -- .audio = &devkit8000_audio_data, --}; -- - static struct twl4030_platform_data devkit8000_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ -- .usb = &devkit8000_usb_data, - .gpio = &devkit8000_gpio_data, -- .codec = &devkit8000_codec_data, - .vmmc1 = &devkit8000_vmmc1, - .vdac = &devkit8000_vdac, - .vpll1 = &devkit8000_vpll1, -@@ -360,6 +344,8 @@ static struct twl4030_platform_data devkit8000_twldata = { - - static int __init devkit8000_i2c_init(void) - { -+ omap3_pmic_get_config(&devkit8000_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); - omap3_pmic_init("tps65930", &devkit8000_twldata); - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c -index f683835..e0a6687 100644 ---- a/arch/arm/mach-omap2/board-igep0020.c -+++ b/arch/arm/mach-omap2/board-igep0020.c -@@ -443,10 +443,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = { - .setup = igep_twl_gpio_setup, - }; - --static struct twl4030_usb_data igep_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static int igep2_enable_dvi(struct omap_dss_device *dssdev) - { - gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1); -@@ -522,13 +518,6 @@ static void __init igep_init_early(void) - m65kxxxxam_sdrc_params); - } - --static struct twl4030_codec_audio_data igep2_audio_data; -- --static struct twl4030_codec_data igep2_codec_data = { -- .audio_mclk = 26000000, -- .audio = &igep2_audio_data, --}; -- - static int igep2_keymap[] = { - KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_RIGHT), -@@ -561,11 +550,7 @@ static struct twl4030_keypad_data igep2_keypad_pdata = { - }; - - static struct twl4030_platform_data igep_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ -- .usb = &igep_usb_data, - .gpio = &igep_twl4030_gpio_pdata, - .vmmc1 = &igep_vmmc1, - .vio = &igep_vio, -@@ -581,6 +566,8 @@ static void __init igep_i2c_init(void) - { - int ret; - -+ omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, 0); -+ - if (machine_is_igep0020()) { - /* - * Bus 3 is attached to the DVI port where devices like the -@@ -591,9 +578,10 @@ static void __init igep_i2c_init(void) - if (ret) - pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); - -- igep_twldata.codec = &igep2_codec_data; - igep_twldata.keypad = &igep2_keypad_pdata; - igep_twldata.vpll2 = &igep2_vpll2; -+ /* Use common codec data */ -+ omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0); - } - - omap3_pmic_init("twl4030", &igep_twldata); -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c -index 5d4328f..218764c 100644 ---- a/arch/arm/mach-omap2/board-ldp.c -+++ b/arch/arm/mach-omap2/board-ldp.c -@@ -199,20 +199,12 @@ static void __init omap_ldp_init_early(void) - omap2_init_common_devices(NULL, NULL); - } - --static struct twl4030_usb_data ldp_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static struct twl4030_gpio_platform_data ldp_gpio_data = { - .gpio_base = OMAP_MAX_GPIO_LINES, - .irq_base = TWL4030_GPIO_IRQ_BASE, - .irq_end = TWL4030_GPIO_IRQ_END, - }; - --static struct twl4030_madc_platform_data ldp_madc_data = { -- .irq_line = 1, --}; -- - static struct regulator_consumer_supply ldp_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; -@@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = { - }; - - static struct twl4030_platform_data ldp_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ -- .madc = &ldp_madc_data, -- .usb = &ldp_usb_data, - .vmmc1 = &ldp_vmmc1, - .vaux1 = &ldp_vaux1, - .gpio = &ldp_gpio_data, -@@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = { - - static int __init omap_i2c_init(void) - { -+ omap3_pmic_get_config(&ldp_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); - omap3_pmic_init("twl4030", &ldp_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, NULL, 0); -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 2d8dfb3..ec61e9c 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -380,25 +380,9 @@ static struct regulator_init_data beagle_vpll2 = { - .consumer_supplies = beagle_vdvi_supplies, - }; - --static struct twl4030_usb_data beagle_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- --static struct twl4030_codec_audio_data beagle_audio_data; -- --static struct twl4030_codec_data beagle_codec_data = { -- .audio_mclk = 26000000, -- .audio = &beagle_audio_data, --}; -- - static struct twl4030_platform_data beagle_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ -- .usb = &beagle_usb_data, - .gpio = &beagle_gpio_data, -- .codec = &beagle_codec_data, - .vmmc1 = &beagle_vmmc1, - .vsim = &beagle_vsim, - .vdac = &beagle_vdac, -@@ -413,6 +397,8 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { - - static int __init omap3_beagle_i2c_init(void) - { -+ omap3_pmic_get_config(&beagle_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); - omap3_pmic_init("twl4030", &beagle_twldata); - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c -index 57bce0f..1ca298a 100644 ---- a/arch/arm/mach-omap2/board-omap3evm.c -+++ b/arch/arm/mach-omap2/board-omap3evm.c -@@ -396,10 +396,6 @@ static struct twl4030_gpio_platform_data omap3evm_gpio_data = { - .setup = omap3evm_twl_gpio_setup, - }; - --static struct twl4030_usb_data omap3evm_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static uint32_t board_keymap[] = { - KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_DOWN), -@@ -434,17 +430,6 @@ static struct twl4030_keypad_data omap3evm_kp_data = { - .rep = 1, - }; - --static struct twl4030_madc_platform_data omap3evm_madc_data = { -- .irq_line = 1, --}; -- --static struct twl4030_codec_audio_data omap3evm_audio_data; -- --static struct twl4030_codec_data omap3evm_codec_data = { -- .audio_mclk = 26000000, -- .audio = &omap3evm_audio_data, --}; -- - static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), - }; -@@ -547,15 +532,9 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = { - #endif - - static struct twl4030_platform_data omap3evm_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ - .keypad = &omap3evm_kp_data, -- .madc = &omap3evm_madc_data, -- .usb = &omap3evm_usb_data, - .gpio = &omap3evm_gpio_data, -- .codec = &omap3evm_codec_data, - .vdac = &omap3_evm_vdac, - .vpll2 = &omap3_evm_vpll2, - .vio = &omap3evm_vio, -@@ -565,6 +544,9 @@ static struct twl4030_platform_data omap3evm_twldata = { - - static int __init omap3_evm_i2c_init(void) - { -+ omap3_pmic_get_config(&omap3evm_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | -+ TWL_COMMON_PDATA_AUDIO, 0); - omap3_pmic_init("twl4030", &omap3evm_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, NULL, 0); -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c -index d4ea940..f5abf76 100644 ---- a/arch/arm/mach-omap2/board-omap3pandora.c -+++ b/arch/arm/mach-omap2/board-omap3pandora.c -@@ -508,25 +508,10 @@ static struct platform_device pandora_vwlan_device = { - }, - }; - --static struct twl4030_usb_data omap3pandora_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- --static struct twl4030_codec_audio_data omap3pandora_audio_data; -- --static struct twl4030_codec_data omap3pandora_codec_data = { -- .audio_mclk = 26000000, -- .audio = &omap3pandora_audio_data, --}; -- - static struct twl4030_bci_platform_data pandora_bci_data; - - static struct twl4030_platform_data omap3pandora_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, - .gpio = &omap3pandora_gpio_data, -- .usb = &omap3pandora_usb_data, -- .codec = &omap3pandora_codec_data, - .vmmc1 = &pandora_vmmc1, - .vmmc2 = &pandora_vmmc2, - .vdac = &pandora_vdac, -@@ -548,6 +533,8 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { - - static int __init omap3pandora_i2c_init(void) - { -+ omap3_pmic_get_config(&omap3pandora_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); - omap3_pmic_init("tps65950", &omap3pandora_twldata); - /* i2c2 pins are not connected */ - omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c -index b8ad4dd..6e59e59 100644 ---- a/arch/arm/mach-omap2/board-omap3stalker.c -+++ b/arch/arm/mach-omap2/board-omap3stalker.c -@@ -349,10 +349,6 @@ static struct twl4030_gpio_platform_data omap3stalker_gpio_data = { - .setup = omap3stalker_twl_gpio_setup, - }; - --static struct twl4030_usb_data omap3stalker_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static uint32_t board_keymap[] = { - KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_DOWN), -@@ -387,17 +383,6 @@ static struct twl4030_keypad_data omap3stalker_kp_data = { - .rep = 1, - }; - --static struct twl4030_madc_platform_data omap3stalker_madc_data = { -- .irq_line = 1, --}; -- --static struct twl4030_codec_audio_data omap3stalker_audio_data; -- --static struct twl4030_codec_data omap3stalker_codec_data = { -- .audio_mclk = 26000000, -- .audio = &omap3stalker_audio_data, --}; -- - static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), - }; -@@ -439,15 +424,9 @@ static struct regulator_init_data omap3_stalker_vpll2 = { - }; - - static struct twl4030_platform_data omap3stalker_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ - .keypad = &omap3stalker_kp_data, -- .madc = &omap3stalker_madc_data, -- .usb = &omap3stalker_usb_data, - .gpio = &omap3stalker_gpio_data, -- .codec = &omap3stalker_codec_data, - .vdac = &omap3_stalker_vdac, - .vpll2 = &omap3_stalker_vpll2, - .vmmc1 = &omap3stalker_vmmc1, -@@ -470,6 +449,9 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = { - - static int __init omap3_stalker_i2c_init(void) - { -+ omap3_pmic_get_config(&omap3stalker_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | -+ TWL_COMMON_PDATA_AUDIO, 0); - omap3_pmic_init("twl4030", &omap3stalker_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index 57e6ed3..717972c 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -235,25 +235,9 @@ static struct regulator_init_data touchbook_vpll2 = { - .consumer_supplies = touchbook_vdvi_supply, - }; - --static struct twl4030_usb_data touchbook_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- --static struct twl4030_codec_audio_data touchbook_audio_data; -- --static struct twl4030_codec_data touchbook_codec_data = { -- .audio_mclk = 26000000, -- .audio = &touchbook_audio_data, --}; -- - static struct twl4030_platform_data touchbook_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ -- .usb = &touchbook_usb_data, - .gpio = &touchbook_gpio_data, -- .codec = &touchbook_codec_data, - .vmmc1 = &touchbook_vmmc1, - .vsim = &touchbook_vsim, - .vdac = &touchbook_vdac, -@@ -269,8 +253,9 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { - static int __init omap3_touchbook_i2c_init(void) - { - /* Standard TouchBook bus */ -+ omap3_pmic_get_config(&touchbook_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); - omap3_pmic_init("twl4030", &touchbook_twldata); -- - /* Additional TouchBook bus */ - omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, - ARRAY_SIZE(touchBook_i2c_boardinfo)); -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 1bf2f39..776b444 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -433,10 +433,6 @@ static struct twl4030_gpio_platform_data overo_gpio_data = { - .setup = overo_twl_gpio_setup, - }; - --static struct twl4030_usb_data overo_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static struct regulator_init_data overo_vmmc1 = { - .constraints = { - .min_uV = 1850000, -@@ -480,19 +476,8 @@ static struct regulator_init_data overo_vpll2 = { - .consumer_supplies = overo_vdds_dsi_supply, - }; - --static struct twl4030_codec_audio_data overo_audio_data; -- --static struct twl4030_codec_data overo_codec_data = { -- .audio_mclk = 26000000, -- .audio = &overo_audio_data, --}; -- - static struct twl4030_platform_data overo_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, - .gpio = &overo_gpio_data, -- .usb = &overo_usb_data, -- .codec = &overo_codec_data, - .vmmc1 = &overo_vmmc1, - .vdac = &overo_vdac, - .vpll2 = &overo_vpll2, -@@ -500,6 +485,8 @@ static struct twl4030_platform_data overo_twldata = { - - static int __init overo_i2c_init(void) - { -+ omap3_pmic_get_config(&overo_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); - omap3_pmic_init("tps65950", &overo_twldata); - /* i2c2 pins are used for gpio */ - omap_register_i2c_bus(3, 400, NULL, 0); -diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c -index 54dceb1..7dfed24 100644 ---- a/arch/arm/mach-omap2/board-rm680.c -+++ b/arch/arm/mach-omap2/board-rm680.c -@@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data rm680_gpio_data = { - .pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15), - }; - --static struct twl4030_usb_data rm680_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static struct twl4030_platform_data rm680_twl_data = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, - .gpio = &rm680_gpio_data, -- .usb = &rm680_usb_data, - /* add rest of the children here */ - }; - - static void __init rm680_i2c_init(void) - { -+ omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0); - omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, NULL, 0); -diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c -index b633ba8..3cdea39 100644 ---- a/arch/arm/mach-omap2/board-rx51-peripherals.c -+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c -@@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = { - .rep = 1, - }; - --static struct twl4030_madc_platform_data rx51_madc_data = { -- .irq_line = 1, --}; -- - /* Enable input logic and pull all lines up when eMMC is on. */ - static struct omap_board_mux rx51_mmc2_on_mux[] = { - OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), -@@ -603,10 +599,6 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = { - .setup = rx51_twlgpio_setup, - }; - --static struct twl4030_usb_data rx51_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static struct twl4030_ins sleep_on_seq[] __initdata = { - /* - * Turn off everything -@@ -778,14 +770,9 @@ struct twl4030_codec_data rx51_codec_data __initdata = { - }; - - static struct twl4030_platform_data rx51_twldata __initdata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ - .gpio = &rx51_gpio_data, - .keypad = &rx51_kp_data, -- .madc = &rx51_madc_data, -- .usb = &rx51_usb_data, - .power = &rx51_t2scripts_data, - .codec = &rx51_codec_data, - -@@ -850,6 +837,8 @@ static int __init rx51_i2c_init(void) - rx51_twldata.vaux3 = &rx51_vaux3_cam; - } - rx51_twldata.vmmc2 = &rx51_vmmc2; -+ omap3_pmic_get_config(&rx51_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); - omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); - omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, - ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); -diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c -index 8495f82..6d8df1b 100644 ---- a/arch/arm/mach-omap2/board-zoom-peripherals.c -+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c -@@ -285,26 +285,6 @@ static void zoom2_set_hs_extmute(int mute) - gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute); - } - --static int zoom_batt_table[] = { --/* 0 C*/ --30800, 29500, 28300, 27100, --26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, --17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, --11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, --8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, --5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, --4040, 3910, 3790, 3670, 3550 --}; -- --static struct twl4030_bci_platform_data zoom_bci_data = { -- .battery_tmp_tbl = zoom_batt_table, -- .tblsize = ARRAY_SIZE(zoom_batt_table), --}; -- --static struct twl4030_usb_data zoom_usb_data = { -- .usb_mode = T2_USB_MODE_ULPI, --}; -- - static struct twl4030_gpio_platform_data zoom_gpio_data = { - .gpio_base = OMAP_MAX_GPIO_LINES, - .irq_base = TWL4030_GPIO_IRQ_BASE, -@@ -312,28 +292,10 @@ static struct twl4030_gpio_platform_data zoom_gpio_data = { - .setup = zoom_twl_gpio_setup, - }; - --static struct twl4030_madc_platform_data zoom_madc_data = { -- .irq_line = 1, --}; -- --static struct twl4030_codec_audio_data zoom_audio_data; -- --static struct twl4030_codec_data zoom_codec_data = { -- .audio_mclk = 26000000, -- .audio = &zoom_audio_data, --}; -- - static struct twl4030_platform_data zoom_twldata = { -- .irq_base = TWL4030_IRQ_BASE, -- .irq_end = TWL4030_IRQ_END, -- - /* platform_data for children goes here */ -- .bci = &zoom_bci_data, -- .madc = &zoom_madc_data, -- .usb = &zoom_usb_data, - .gpio = &zoom_gpio_data, - .keypad = &zoom_kp_twl4030_data, -- .codec = &zoom_codec_data, - .vmmc1 = &zoom_vmmc1, - .vmmc2 = &zoom_vmmc2, - .vsim = &zoom_vsim, -@@ -343,10 +305,17 @@ static struct twl4030_platform_data zoom_twldata = { - - static int __init omap_i2c_init(void) - { -+ omap3_pmic_get_config(&zoom_twldata, -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | -+ TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); -+ - if (machine_is_omap_zoom2()) { -- zoom_audio_data.ramp_delay_value = 3; /* 161 ms */ -- zoom_audio_data.hs_extmute = 1; -- zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute; -+ struct twl4030_codec_audio_data *audio_data; -+ audio_data = zoom_twldata.codec->audio; -+ -+ audio_data->ramp_delay_value = 3; /* 161 ms */ -+ audio_data->hs_extmute = 1; -+ audio_data->set_hs_extmute = zoom2_set_hs_extmute; - } - omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c -index cf80f4c..9e8decf 100644 ---- a/arch/arm/mach-omap2/twl-common.c -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -56,6 +56,37 @@ static struct twl4030_usb_data omap4_usb_pdata = { - .phy_suspend = omap4430_phy_suspend, - }; - -+static struct twl4030_usb_data omap3_usb_pdata = { -+ .usb_mode = T2_USB_MODE_ULPI, -+}; -+ -+static int omap3_batt_table[] = { -+/* 0 C */ -+30800, 29500, 28300, 27100, -+26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, -+17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, -+11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, -+8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, -+5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, -+4040, 3910, 3790, 3670, 3550 -+}; -+ -+static struct twl4030_bci_platform_data omap3_bci_pdata = { -+ .battery_tmp_tbl = omap3_batt_table, -+ .tblsize = ARRAY_SIZE(omap3_batt_table), -+}; -+ -+static struct twl4030_madc_platform_data omap3_madc_pdata = { -+ .irq_line = 1, -+}; -+ -+static struct twl4030_codec_audio_data omap3_audio; -+ -+static struct twl4030_codec_data omap3_codec_pdata = { -+ .audio_mclk = 26000000, -+ .audio = &omap3_audio, -+}; -+ - static struct regulator_init_data omap4_vdac_idata = { - .constraints = { - .min_uV = 1800000, -@@ -207,3 +238,25 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, - !pmic_data->clk32kg) - pmic_data->clk32kg = &omap4_clk32kg_idata; - } -+ -+void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, -+ u32 pdata_flags, u32 regulators_flags) -+{ -+ if (!pmic_data->irq_base) -+ pmic_data->irq_base = TWL4030_IRQ_BASE; -+ if (!pmic_data->irq_end) -+ pmic_data->irq_end = TWL4030_IRQ_END; -+ -+ /* Common platform data configurations */ -+ if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) -+ pmic_data->usb = &omap3_usb_pdata; -+ -+ if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) -+ pmic_data->bci = &omap3_bci_pdata; -+ -+ if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) -+ pmic_data->madc = &omap3_madc_pdata; -+ -+ if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) -+ pmic_data->codec = &omap3_codec_pdata; -+} -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h -index d96c289..3b4b05d 100644 ---- a/arch/arm/mach-omap2/twl-common.h -+++ b/arch/arm/mach-omap2/twl-common.h -@@ -2,6 +2,9 @@ - #define __OMAP_PMIC_COMMON__ - - #define TWL_COMMON_PDATA_USB (1 << 0) -+#define TWL_COMMON_PDATA_BCI (1 << 1) -+#define TWL_COMMON_PDATA_MADC (1 << 2) -+#define TWL_COMMON_PDATA_AUDIO (1 << 3) - - /* Common LDO regulators for TWL4030/TWL6030 */ - #define TWL_COMMON_REGULATOR_VDAC (1 << 0) -@@ -42,6 +45,9 @@ static inline void omap4_pmic_init(const char *pmic_type, - omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); - } - -+void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, -+ u32 pdata_flags, u32 regulators_flags); -+ - void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, - u32 pdata_flags, u32 regulators_flags); - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move-common-regulator-configuration-to-twl-com.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move-common-regulator-configuration-to-twl-com.patch deleted file mode 100644 index 4ea0aca..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move-common-regulator-configuration-to-twl-com.patch +++ /dev/null @@ -1,924 +0,0 @@ -From df02a0c8e1d42d1f861d138d1283172872c602ed Mon Sep 17 00:00:00 2001 -From: Peter Ujfalusi <peter.ujfalusi@ti.com> -Date: Tue, 7 Jun 2011 11:38:24 +0300 -Subject: [PATCH 025/149] OMAP3: Move common regulator configuration to twl-common - -Some regulator config can be moved out from board files, -since they are close to identical. - -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> -Acked-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-3430sdp.c | 51 ++++---------------------- - arch/arm/mach-omap2/board-cm-t35.c | 44 ++++------------------ - arch/arm/mach-omap2/board-devkit8000.c | 22 +---------- - arch/arm/mach-omap2/board-igep0020.c | 28 +++------------ - arch/arm/mach-omap2/board-omap3beagle.c | 46 +++--------------------- - arch/arm/mach-omap2/board-omap3evm.c | 50 ++++---------------------- - arch/arm/mach-omap2/board-omap3pandora.c | 47 +++++------------------- - arch/arm/mach-omap2/board-omap3stalker.c | 50 ++++---------------------- - arch/arm/mach-omap2/board-omap3touchbook.c | 44 ++++++---------------- - arch/arm/mach-omap2/board-overo.c | 46 +++--------------------- - arch/arm/mach-omap2/board-rx51-peripherals.c | 27 +++----------- - arch/arm/mach-omap2/board-zoom-peripherals.c | 42 ++-------------------- - arch/arm/mach-omap2/twl-common.c | 42 +++++++++++++++++++++ - arch/arm/mach-omap2/twl-common.h | 5 +++ - 14 files changed, 124 insertions(+), 420 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c -index 8bbd4e0..bd600cf 100644 ---- a/arch/arm/mach-omap2/board-3430sdp.c -+++ b/arch/arm/mach-omap2/board-3430sdp.c -@@ -283,16 +283,6 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = { - REGULATOR_SUPPLY("vcc", "spi1.0"), - }; - --static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- --/* VPLL2 for digital video outputs */ --static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), --}; -- - static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; -@@ -409,36 +399,6 @@ static struct regulator_init_data sdp3430_vsim = { - .consumer_supplies = sdp3430_vsim_supplies, - }; - --/* VDAC for DSS driving S-Video */ --static struct regulator_init_data sdp3430_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies), -- .consumer_supplies = sdp3430_vdda_dac_supplies, --}; -- --static struct regulator_init_data sdp3430_vpll2 = { -- .constraints = { -- .name = "VDVI", -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies), -- .consumer_supplies = sdp3430_vpll2_supplies, --}; -- - static struct twl4030_platform_data sdp3430_twldata = { - /* platform_data for children goes here */ - .gpio = &sdp3430_gpio_data, -@@ -451,16 +411,19 @@ static struct twl4030_platform_data sdp3430_twldata = { - .vmmc1 = &sdp3430_vmmc1, - .vmmc2 = &sdp3430_vmmc2, - .vsim = &sdp3430_vsim, -- .vdac = &sdp3430_vdac, -- .vpll2 = &sdp3430_vpll2, - }; - - static int __init omap3430_i2c_init(void) - { - /* i2c1 for PMIC only */ - omap3_pmic_get_config(&sdp3430_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | -- TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | -+ TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); -+ sdp3430_twldata.vdac->constraints.apply_uV = true; -+ sdp3430_twldata.vpll2->constraints.apply_uV = true; -+ sdp3430_twldata.vpll2->constraints.name = "VDVI"; -+ - omap3_pmic_init("twl4030", &sdp3430_twldata); - - /* i2c2 on camera connector (for sensor control) and optional isp1301 */ -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c -index cb00abc..35891d4 100644 ---- a/arch/arm/mach-omap2/board-cm-t35.c -+++ b/arch/arm/mach-omap2/board-cm-t35.c -@@ -343,10 +343,6 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = { - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), - }; - --static struct regulator_consumer_supply cm_t35_vdac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- - static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { - REGULATOR_SUPPLY("vdvi", "omapdss"), - }; -@@ -381,35 +377,6 @@ static struct regulator_init_data cm_t35_vsim = { - .consumer_supplies = cm_t35_vsim_supply, - }; - --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ --static struct regulator_init_data cm_t35_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply), -- .consumer_supplies = cm_t35_vdac_supply, --}; -- --/* VPLL2 for digital video outputs */ --static struct regulator_init_data cm_t35_vpll2 = { -- .constraints = { -- .name = "VDVI", -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply), -- .consumer_supplies = cm_t35_vdvi_supply, --}; -- - static uint32_t cm_t35_keymap[] = { - KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), - KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), -@@ -493,13 +460,18 @@ static struct twl4030_platform_data cm_t35_twldata = { - .gpio = &cm_t35_gpio_data, - .vmmc1 = &cm_t35_vmmc1, - .vsim = &cm_t35_vsim, -- .vdac = &cm_t35_vdac, -- .vpll2 = &cm_t35_vpll2, - }; - - static void __init cm_t35_init_i2c(void) - { -- omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 0); -+ omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); -+ -+ cm_t35_twldata.vpll2->constraints.name = "VDVI"; -+ cm_t35_twldata.vpll2->num_consumer_supplies = -+ ARRAY_SIZE(cm_t35_vdvi_supply); -+ cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply; -+ - omap3_pmic_init("tps65930", &cm_t35_twldata); - } - -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c -index 364942e..b6002ec 100644 ---- a/arch/arm/mach-omap2/board-devkit8000.c -+++ b/arch/arm/mach-omap2/board-devkit8000.c -@@ -186,10 +186,6 @@ static struct omap_dss_board_info devkit8000_dss_data = { - .default_device = &devkit8000_lcd_device, - }; - --static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- - static uint32_t board_keymap[] = { - KEY(0, 0, KEY_1), - KEY(1, 0, KEY_2), -@@ -289,20 +285,6 @@ static struct regulator_init_data devkit8000_vmmc1 = { - .consumer_supplies = devkit8000_vmmc1_supply, - }; - --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ --static struct regulator_init_data devkit8000_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(devkit8000_vdda_dac_supply), -- .consumer_supplies = devkit8000_vdda_dac_supply, --}; -- - /* VPLL1 for digital video outputs */ - static struct regulator_init_data devkit8000_vpll1 = { - .constraints = { -@@ -336,7 +318,6 @@ static struct twl4030_platform_data devkit8000_twldata = { - /* platform_data for children goes here */ - .gpio = &devkit8000_gpio_data, - .vmmc1 = &devkit8000_vmmc1, -- .vdac = &devkit8000_vdac, - .vpll1 = &devkit8000_vpll1, - .vio = &devkit8000_vio, - .keypad = &devkit8000_kp_data, -@@ -345,7 +326,8 @@ static struct twl4030_platform_data devkit8000_twldata = { - static int __init devkit8000_i2c_init(void) - { - omap3_pmic_get_config(&devkit8000_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC); - omap3_pmic_init("tps65930", &devkit8000_twldata); - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c -index e0a6687..35be778 100644 ---- a/arch/arm/mach-omap2/board-igep0020.c -+++ b/arch/arm/mach-omap2/board-igep0020.c -@@ -479,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = { - .default_device = &igep2_dvi_device, - }; - --static struct regulator_consumer_supply igep2_vpll2_supplies[] = { -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), --}; -- --static struct regulator_init_data igep2_vpll2 = { -- .constraints = { -- .name = "VDVI", -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies), -- .consumer_supplies = igep2_vpll2_supplies, --}; -- - static void __init igep2_display_init(void) - { - int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH, -@@ -579,9 +559,11 @@ static void __init igep_i2c_init(void) - pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); - - igep_twldata.keypad = &igep2_keypad_pdata; -- igep_twldata.vpll2 = &igep2_vpll2; -- /* Use common codec data */ -- omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0); -+ /* Get common pmic data */ -+ omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VPLL2); -+ igep_twldata.vpll2->constraints.apply_uV = true; -+ igep_twldata.vpll2->constraints.name = "VDVI"; - } - - omap3_pmic_init("twl4030", &igep_twldata); -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index ec61e9c..34f8411 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -209,15 +209,6 @@ static struct omap_dss_board_info beagle_dss_data = { - .default_device = &beagle_dvi_device, - }; - --static struct regulator_consumer_supply beagle_vdac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- --static struct regulator_consumer_supply beagle_vdvi_supplies[] = { -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), --}; -- - static void __init beagle_display_init(void) - { - int r; -@@ -351,42 +342,11 @@ static struct regulator_init_data beagle_vsim = { - .consumer_supplies = beagle_vsim_supply, - }; - --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ --static struct regulator_init_data beagle_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), -- .consumer_supplies = beagle_vdac_supply, --}; -- --/* VPLL2 for digital video outputs */ --static struct regulator_init_data beagle_vpll2 = { -- .constraints = { -- .name = "VDVI", -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies), -- .consumer_supplies = beagle_vdvi_supplies, --}; -- - static struct twl4030_platform_data beagle_twldata = { - /* platform_data for children goes here */ - .gpio = &beagle_gpio_data, - .vmmc1 = &beagle_vmmc1, - .vsim = &beagle_vsim, -- .vdac = &beagle_vdac, -- .vpll2 = &beagle_vpll2, - }; - - static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { -@@ -398,7 +358,11 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { - static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); -+ -+ beagle_twldata.vpll2->constraints.name = "VDVI"; -+ - omap3_pmic_init("twl4030", &beagle_twldata); - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c -index 1ca298a..c452b3f 100644 ---- a/arch/arm/mach-omap2/board-omap3evm.c -+++ b/arch/arm/mach-omap2/board-omap3evm.c -@@ -430,45 +430,6 @@ static struct twl4030_keypad_data omap3evm_kp_data = { - .rep = 1, - }; - --static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- --/* VDAC for DSS driving S-Video */ --static struct regulator_init_data omap3_evm_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vdda_dac_supply), -- .consumer_supplies = omap3_evm_vdda_dac_supply, --}; -- --/* VPLL2 for digital video outputs */ --static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = { -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), --}; -- --static struct regulator_init_data omap3_evm_vpll2 = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies), -- .consumer_supplies = omap3_evm_vpll2_supplies, --}; -- - /* ads7846 on SPI */ - static struct regulator_consumer_supply omap3evm_vio_supply[] = { - REGULATOR_SUPPLY("vcc", "spi1.0"), -@@ -535,8 +496,6 @@ static struct twl4030_platform_data omap3evm_twldata = { - /* platform_data for children goes here */ - .keypad = &omap3evm_kp_data, - .gpio = &omap3evm_gpio_data, -- .vdac = &omap3_evm_vdac, -- .vpll2 = &omap3_evm_vpll2, - .vio = &omap3evm_vio, - .vmmc1 = &omap3evm_vmmc1, - .vsim = &omap3evm_vsim, -@@ -545,8 +504,13 @@ static struct twl4030_platform_data omap3evm_twldata = { - static int __init omap3_evm_i2c_init(void) - { - omap3_pmic_get_config(&omap3evm_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | -- TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | -+ TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); -+ -+ omap3evm_twldata.vdac->constraints.apply_uV = true; -+ omap3evm_twldata.vpll2->constraints.apply_uV = true; -+ - omap3_pmic_init("twl4030", &omap3evm_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, NULL, 0); -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c -index f5abf76..080d7bd 100644 ---- a/arch/arm/mach-omap2/board-omap3pandora.c -+++ b/arch/arm/mach-omap2/board-omap3pandora.c -@@ -332,10 +332,6 @@ static struct regulator_consumer_supply pandora_vmmc3_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), - }; - --static struct regulator_consumer_supply pandora_vdda_dac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- - static struct regulator_consumer_supply pandora_vdds_supplies[] = { - REGULATOR_SUPPLY("vdds_sdi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -@@ -391,36 +387,6 @@ static struct regulator_init_data pandora_vmmc2 = { - .consumer_supplies = pandora_vmmc2_supply, - }; - --/* VDAC for DSS driving S-Video */ --static struct regulator_init_data pandora_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(pandora_vdda_dac_supply), -- .consumer_supplies = pandora_vdda_dac_supply, --}; -- --/* VPLL2 for digital video outputs */ --static struct regulator_init_data pandora_vpll2 = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(pandora_vdds_supplies), -- .consumer_supplies = pandora_vdds_supplies, --}; -- - /* VAUX1 for LCD */ - static struct regulator_init_data pandora_vaux1 = { - .constraints = { -@@ -514,8 +480,6 @@ static struct twl4030_platform_data omap3pandora_twldata = { - .gpio = &omap3pandora_gpio_data, - .vmmc1 = &pandora_vmmc1, - .vmmc2 = &pandora_vmmc2, -- .vdac = &pandora_vdac, -- .vpll2 = &pandora_vpll2, - .vaux1 = &pandora_vaux1, - .vaux2 = &pandora_vaux2, - .vaux4 = &pandora_vaux4, -@@ -534,7 +498,16 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { - static int __init omap3pandora_i2c_init(void) - { - omap3_pmic_get_config(&omap3pandora_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); -+ -+ omap3pandora_twldata.vdac->constraints.apply_uV = true; -+ -+ omap3pandora_twldata.vpll2->constraints.apply_uV = true; -+ omap3pandora_twldata.vpll2->num_consumer_supplies = -+ ARRAY_SIZE(pandora_vdds_supplies); -+ omap3pandora_twldata.vpll2->consumer_supplies = pandora_vdds_supplies; -+ - omap3_pmic_init("tps65950", &omap3pandora_twldata); - /* i2c2 pins are not connected */ - omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c -index 6e59e59..8e10498 100644 ---- a/arch/arm/mach-omap2/board-omap3stalker.c -+++ b/arch/arm/mach-omap2/board-omap3stalker.c -@@ -383,52 +383,10 @@ static struct twl4030_keypad_data omap3stalker_kp_data = { - .rep = 1, - }; - --static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- --/* VDAC for DSS driving S-Video */ --static struct regulator_init_data omap3_stalker_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vdda_dac_supply), -- .consumer_supplies = omap3_stalker_vdda_dac_supply, --}; -- --/* VPLL2 for digital video outputs */ --static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = { -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), --}; -- --static struct regulator_init_data omap3_stalker_vpll2 = { -- .constraints = { -- .name = "VDVI", -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies), -- .consumer_supplies = omap3_stalker_vpll2_supplies, --}; -- - static struct twl4030_platform_data omap3stalker_twldata = { - /* platform_data for children goes here */ - .keypad = &omap3stalker_kp_data, - .gpio = &omap3stalker_gpio_data, -- .vdac = &omap3_stalker_vdac, -- .vpll2 = &omap3_stalker_vpll2, - .vmmc1 = &omap3stalker_vmmc1, - .vsim = &omap3stalker_vsim, - }; -@@ -451,7 +409,13 @@ static int __init omap3_stalker_i2c_init(void) - { - omap3_pmic_get_config(&omap3stalker_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | -- TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); -+ -+ omap3stalker_twldata.vdac->constraints.apply_uV = true; -+ omap3stalker_twldata.vpll2->constraints.apply_uV = true; -+ omap3stalker_twldata.vpll2->constraints.name = "VDVI"; -+ - omap3_pmic_init("twl4030", &omap3stalker_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index 717972c..852ea04 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -206,42 +206,11 @@ static struct regulator_init_data touchbook_vsim = { - .consumer_supplies = touchbook_vsim_supply, - }; - --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ --static struct regulator_init_data touchbook_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(touchbook_vdac_supply), -- .consumer_supplies = touchbook_vdac_supply, --}; -- --/* VPLL2 for digital video outputs */ --static struct regulator_init_data touchbook_vpll2 = { -- .constraints = { -- .name = "VDVI", -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(touchbook_vdvi_supply), -- .consumer_supplies = touchbook_vdvi_supply, --}; -- - static struct twl4030_platform_data touchbook_twldata = { - /* platform_data for children goes here */ - .gpio = &touchbook_gpio_data, - .vmmc1 = &touchbook_vmmc1, - .vsim = &touchbook_vsim, -- .vdac = &touchbook_vdac, -- .vpll2 = &touchbook_vpll2, - }; - - static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { -@@ -254,7 +223,18 @@ static int __init omap3_touchbook_i2c_init(void) - { - /* Standard TouchBook bus */ - omap3_pmic_get_config(&touchbook_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); -+ -+ touchbook_twldata.vdac->num_consumer_supplies = -+ ARRAY_SIZE(touchbook_vdac_supply); -+ touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply; -+ -+ touchbook_twldata.vpll2->constraints.name = "VDVI"; -+ touchbook_twldata.vpll2->num_consumer_supplies = -+ ARRAY_SIZE(touchbook_vdvi_supply); -+ touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply; -+ - omap3_pmic_init("twl4030", &touchbook_twldata); - /* Additional TouchBook bus */ - omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 776b444..f1f18d0 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -265,15 +265,6 @@ static struct omap_dss_board_info overo_dss_data = { - .default_device = &overo_dvi_device, - }; - --static struct regulator_consumer_supply overo_vdda_dac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- --static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), --}; -- - static struct mtd_partition overo_nand_partitions[] = { - { - .name = "xloader", -@@ -447,46 +438,19 @@ static struct regulator_init_data overo_vmmc1 = { - .consumer_supplies = overo_vmmc1_supply, - }; - --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ --static struct regulator_init_data overo_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(overo_vdda_dac_supply), -- .consumer_supplies = overo_vdda_dac_supply, --}; -- --/* VPLL2 for digital video outputs */ --static struct regulator_init_data overo_vpll2 = { -- .constraints = { -- .name = "VDVI", -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply), -- .consumer_supplies = overo_vdds_dsi_supply, --}; -- - static struct twl4030_platform_data overo_twldata = { - .gpio = &overo_gpio_data, - .vmmc1 = &overo_vmmc1, -- .vdac = &overo_vdac, -- .vpll2 = &overo_vpll2, - }; - - static int __init overo_i2c_init(void) - { - omap3_pmic_get_config(&overo_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); -+ -+ overo_twldata.vpll2->constraints.name = "VDVI"; -+ - omap3_pmic_init("tps65950", &overo_twldata); - /* i2c2 pins are used for gpio */ - omap_register_i2c_bus(3, 400, NULL, 0); -diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c -index 3cdea39..d99e462 100644 ---- a/arch/arm/mach-omap2/board-rx51-peripherals.c -+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c -@@ -394,10 +394,6 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = { - REGULATOR_SUPPLY("vdd", "2-0063"), - }; - --static struct regulator_consumer_supply rx51_vdac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- - static struct regulator_init_data rx51_vaux1 = { - .constraints = { - .name = "V28", -@@ -514,21 +510,6 @@ static struct regulator_init_data rx51_vsim = { - .consumer_supplies = rx51_vsim_supply, - }; - --static struct regulator_init_data rx51_vdac = { -- .constraints = { -- .name = "VDAC", -- .min_uV = 1800000, -- .max_uV = 1800000, -- .apply_uV = true, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply), -- .consumer_supplies = rx51_vdac_supply, --}; -- - static struct regulator_init_data rx51_vio = { - .constraints = { - .min_uV = 1800000, -@@ -781,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata __initdata = { - .vaux4 = &rx51_vaux4, - .vmmc1 = &rx51_vmmc1, - .vsim = &rx51_vsim, -- .vdac = &rx51_vdac, - .vio = &rx51_vio, - }; - -@@ -838,7 +818,12 @@ static int __init rx51_i2c_init(void) - } - rx51_twldata.vmmc2 = &rx51_vmmc2; - omap3_pmic_get_config(&rx51_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, -+ TWL_COMMON_REGULATOR_VDAC); -+ -+ rx51_twldata.vdac->constraints.apply_uV = true; -+ rx51_twldata.vdac->constraints.name = "VDAC"; -+ - omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); - omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, - ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); -diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c -index 6d8df1b..13a6442 100644 ---- a/arch/arm/mach-omap2/board-zoom-peripherals.c -+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c -@@ -226,41 +226,6 @@ static struct omap2_hsmmc_info mmc[] = { - {} /* Terminator */ - }; - --static struct regulator_consumer_supply zoom_vpll2_supplies[] = { -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), --}; -- --static struct regulator_consumer_supply zoom_vdda_dac_supply[] = { -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), --}; -- --static struct regulator_init_data zoom_vpll2 = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies), -- .consumer_supplies = zoom_vpll2_supplies, --}; -- --static struct regulator_init_data zoom_vdac = { -- .constraints = { -- .min_uV = 1800000, -- .max_uV = 1800000, -- .valid_modes_mask = REGULATOR_MODE_NORMAL -- | REGULATOR_MODE_STANDBY, -- .valid_ops_mask = REGULATOR_CHANGE_MODE -- | REGULATOR_CHANGE_STATUS, -- }, -- .num_consumer_supplies = ARRAY_SIZE(zoom_vdda_dac_supply), -- .consumer_supplies = zoom_vdda_dac_supply, --}; -- - static int zoom_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) - { -@@ -299,15 +264,14 @@ static struct twl4030_platform_data zoom_twldata = { - .vmmc1 = &zoom_vmmc1, - .vmmc2 = &zoom_vmmc2, - .vsim = &zoom_vsim, -- .vpll2 = &zoom_vpll2, -- .vdac = &zoom_vdac, - }; - - static int __init omap_i2c_init(void) - { - omap3_pmic_get_config(&zoom_twldata, -- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | -- TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); -+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | -+ TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); - - if (machine_is_omap_zoom2()) { - struct twl4030_codec_audio_data *audio_data; -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c -index 9e8decf..3aaa46f 100644 ---- a/arch/arm/mach-omap2/twl-common.c -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -87,6 +87,41 @@ static struct twl4030_codec_data omap3_codec_pdata = { - .audio = &omap3_audio, - }; - -+static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = { -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -+}; -+ -+static struct regulator_init_data omap3_vdac_idata = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies), -+ .consumer_supplies = omap3_vdda_dac_supplies, -+}; -+ -+static struct regulator_consumer_supply omap3_vpll2_supplies[] = { -+ REGULATOR_SUPPLY("vdds_dsi", "omapdss"), -+ REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), -+}; -+ -+static struct regulator_init_data omap3_vpll2_idata = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies), -+ .consumer_supplies = omap3_vpll2_supplies, -+}; -+ - static struct regulator_init_data omap4_vdac_idata = { - .constraints = { - .min_uV = 1800000, -@@ -259,4 +294,11 @@ void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, - - if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) - pmic_data->codec = &omap3_codec_pdata; -+ -+ /* Common regulator configurations */ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) -+ pmic_data->vdac = &omap3_vdac_idata; -+ -+ if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) -+ pmic_data->vpll2 = &omap3_vpll2_idata; - } -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h -index 3b4b05d..5e83a5b 100644 ---- a/arch/arm/mach-omap2/twl-common.h -+++ b/arch/arm/mach-omap2/twl-common.h -@@ -21,6 +21,11 @@ - #define TWL_COMMON_REGULATOR_VUSB (1 << 9) - #define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) - -+/* TWL4030 LDO regulators */ -+#define TWL_COMMON_REGULATOR_VPLL1 (1 << 4) -+#define TWL_COMMON_REGULATOR_VPLL2 (1 << 5) -+ -+ - struct twl4030_platform_data; - - void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length-variables.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length-variables.patch deleted file mode 100644 index f1a4682..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length-variables.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 7a7bf2e165760ed106b0f4c8beb7191e3abe944f Mon Sep 17 00:00:00 2001 -From: Jarkko Nikula <jhnikula@gmail.com> -Date: Fri, 1 Jul 2011 08:52:26 +0000 -Subject: [PATCH 026/149] omap: mcbsp: Remove rx_/tx_word_length variables - -These variables got unused after ("omap: mcbsp: Drop in-driver transfer -support") but was noticed only afterwards. - -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/plat-omap/include/plat/mcbsp.h | 2 -- - arch/arm/plat-omap/mcbsp.c | 3 --- - 2 files changed, 0 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h -index 6c53508..63464ad 100644 ---- a/arch/arm/plat-omap/include/plat/mcbsp.h -+++ b/arch/arm/plat-omap/include/plat/mcbsp.h -@@ -385,8 +385,6 @@ struct omap_mcbsp { - void __iomem *io_base; - u8 id; - u8 free; -- omap_mcbsp_word_length rx_word_length; -- omap_mcbsp_word_length tx_word_length; - - int rx_irq; - int tx_irq; -diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c -index 455eadc..3c1fbdc 100644 ---- a/arch/arm/plat-omap/mcbsp.c -+++ b/arch/arm/plat-omap/mcbsp.c -@@ -869,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx) - if (cpu_is_omap34xx()) - omap_st_start(mcbsp); - -- mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7; -- mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7; -- - /* Only enable SRG, if McBSP is master */ - w = MCBSP_READ_CACHE(mcbsp, PCR0); - if (w & (FSXM | FSRM | CLKXM | CLKRM)) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch deleted file mode 100644 index b8389db..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch +++ /dev/null @@ -1,68 +0,0 @@ -From a16f9faa682c8cdd3bbd14618600ec67e4a56963 Mon Sep 17 00:00:00 2001 -From: Jarkko Nikula <jhnikula@gmail.com> -Date: Fri, 1 Jul 2011 08:52:27 +0000 -Subject: [PATCH 027/149] omap: mcbsp: Remove port number enums - -These McBSP port number enums are used only in two places in the McBSP code -so we may remove then and just use numeric values like rest of the code does. - -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap1/mcbsp.c | 4 ++-- - arch/arm/plat-omap/include/plat/mcbsp.h | 10 +--------- - 2 files changed, 3 insertions(+), 11 deletions(-) - -diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c -index d9af981..ab7395d 100644 ---- a/arch/arm/mach-omap1/mcbsp.c -+++ b/arch/arm/mach-omap1/mcbsp.c -@@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id) - * On 1510, 1610 and 1710, McBSP1 and McBSP3 - * are DSP public peripherals. - */ -- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { -+ if (id == 0 || id == 2) { - if (dsp_use++ == 0) { - api_clk = clk_get(NULL, "api_ck"); - dsp_clk = clk_get(NULL, "dsp_ck"); -@@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id) - - static void omap1_mcbsp_free(unsigned int id) - { -- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { -+ if (id == 0 || id == 2) { - if (--dsp_use == 0) { - if (!IS_ERR(api_clk)) { - clk_disable(api_clk); -diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h -index 63464ad..9882c657 100644 ---- a/arch/arm/plat-omap/include/plat/mcbsp.h -+++ b/arch/arm/plat-omap/include/plat/mcbsp.h -@@ -33,7 +33,7 @@ - #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \ - static struct platform_device omap_mcbsp##port_nr = { \ - .name = "omap-mcbsp-dai", \ -- .id = OMAP_MCBSP##port_nr, \ -+ .id = port_nr - 1, \ - } - - #define MCBSP_CONFIG_TYPE2 0x2 -@@ -332,14 +332,6 @@ struct omap_mcbsp_reg_cfg { - }; - - typedef enum { -- OMAP_MCBSP1 = 0, -- OMAP_MCBSP2, -- OMAP_MCBSP3, -- OMAP_MCBSP4, -- OMAP_MCBSP5 --} omap_mcbsp_id; -- --typedef enum { - OMAP_MCBSP_WORD_8 = 0, - OMAP_MCBSP_WORD_12, - OMAP_MCBSP_WORD_16, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch deleted file mode 100644 index 04a711e..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 4e6a7403182e1e30f8b403e7931ce7c832cb5db3 Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sat, 9 Jul 2011 18:00:25 -0600 -Subject: [PATCH 028/149] OMAP: dmtimer: add missing include - -After commit caf64f2fdc48472995d40656eb1a75524c464447 ("omap: Make a subset -of dmtimer functions into inline functions"), -arch/arm/plat-omap/include/plat/dmtimer.h is missing an include of linux/io.h -- add it. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> -Cc: Tony Lindgren <tony@atomide.com> ---- - arch/arm/plat-omap/include/plat/dmtimer.h | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h -index d0f3a2d..eb5d16c 100644 ---- a/arch/arm/plat-omap/include/plat/dmtimer.h -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h -@@ -34,6 +34,7 @@ - - #include <linux/clk.h> - #include <linux/delay.h> -+#include <linux/io.h> - - #ifndef __ASM_ARCH_DMTIMER_H - #define __ASM_ARCH_DMTIMER_H --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup-support.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup-support.patch deleted file mode 100644 index 95384bb..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup-support.patch +++ /dev/null @@ -1,130 +0,0 @@ -From 8a9259c5eedfeb7e2dd3e001aa68e4e1a9149b41 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Fri, 1 Jul 2011 22:54:00 +0200 -Subject: [PATCH 029/149] OMAP2+: hwmod: Fix smart-standby + wakeup support - -The commit 86009eb326afde34ffdc5648cd344aa86b8d58d4 was adding -the wakeup support for new OMAP4 IPs. This support is incomplete for -busmaster IPs that need as well to use smart-standby with wakeup. - -This new standbymode is suported on HSI and USB_HOST_FS for the moment. - -Add the new MSTANDBY_SMART_WKUP flag to mark the IPs that support this -capability. - -Enable this new mode when applicable in _enable_wakeup, _disable_wakeup, -_enable_sysc and _idle_sysc. - -The omap_hwmod_44xx_data.c will have to be updated to add this new flag. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Djamil Elaidi <d-elaidi@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 34 +++++++++++++++++++++---- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +- - 2 files changed, 29 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 293fa6c..384d3c3 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -391,7 +391,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) - - if (!oh->class->sysc || - !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || -- (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) -+ (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || -+ (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) - return -EINVAL; - - if (!oh->class->sysc->sysc_fields) { -@@ -405,6 +406,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) - - if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) - _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); -+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) -+ _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); - - /* XXX test pwrdm_get_wken for this hwmod's subsystem */ - -@@ -426,7 +429,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) - - if (!oh->class->sysc || - !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || -- (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) -+ (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || -+ (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) - return -EINVAL; - - if (!oh->class->sysc->sysc_fields) { -@@ -440,6 +444,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) - - if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) - _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); -+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) -+ _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); - - /* XXX test pwrdm_get_wken for this hwmod's subsystem */ - -@@ -781,8 +787,16 @@ static void _enable_sysc(struct omap_hwmod *oh) - } - - if (sf & SYSC_HAS_MIDLEMODE) { -- idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? -- HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; -+ if (oh->flags & HWMOD_SWSUP_MSTANDBY) { -+ idlemode = HWMOD_IDLEMODE_NO; -+ } else { -+ if (sf & SYSC_HAS_ENAWAKEUP) -+ _enable_wakeup(oh, &v); -+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) -+ idlemode = HWMOD_IDLEMODE_SMART_WKUP; -+ else -+ idlemode = HWMOD_IDLEMODE_SMART; -+ } - _set_master_standbymode(oh, idlemode, &v); - } - -@@ -840,8 +854,16 @@ static void _idle_sysc(struct omap_hwmod *oh) - } - - if (sf & SYSC_HAS_MIDLEMODE) { -- idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? -- HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; -+ if (oh->flags & HWMOD_SWSUP_MSTANDBY) { -+ idlemode = HWMOD_IDLEMODE_FORCE; -+ } else { -+ if (sf & SYSC_HAS_ENAWAKEUP) -+ _enable_wakeup(oh, &v); -+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) -+ idlemode = HWMOD_IDLEMODE_SMART_WKUP; -+ else -+ idlemode = HWMOD_IDLEMODE_SMART; -+ } - _set_master_standbymode(oh, idlemode, &v); - } - -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index 1adea9c..e93438c 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -77,7 +77,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; - #define HWMOD_IDLEMODE_FORCE (1 << 0) - #define HWMOD_IDLEMODE_NO (1 << 1) - #define HWMOD_IDLEMODE_SMART (1 << 2) --/* Slave idle mode flag only */ - #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) - - /** -@@ -258,6 +257,7 @@ struct omap_hwmod_ocp_if { - #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) - #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) - #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) -+#define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT) - - /* omap_hwmod_sysconfig.sysc_flags capability flags */ - #define SYSC_HAS_AUTOIDLE (1 << 0) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch deleted file mode 100644 index a5a664e..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 8823fd9b9f1d6e6406c0b98438ad6282491b0ae5 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Fri, 1 Jul 2011 22:54:01 +0200 -Subject: [PATCH 030/149] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag - -Add the flag to every IPs that support it to allow the -framework to enable it instead of the SMART_STANDBY default -mode. -Without that, an IP with busmaster capability will not -be able to wakeup the interconnect at all. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++---- - 1 files changed, 5 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index e1c69ff..8cbbfbf 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -660,7 +660,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc = { - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | -- MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART | -+ MSTANDBY_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, - }; - -@@ -2044,7 +2045,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_hsi_sysc = { - SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | -- MSTANDBY_SMART), -+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type1, - }; - -@@ -2446,7 +2447,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | -- MSTANDBY_SMART), -+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, - }; - -@@ -3420,7 +3421,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_mmc_sysc = { - SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | -- MSTANDBY_SMART), -+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in-shutdown-to-access-sysc.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in-shutdown-to-access-sysc.patch deleted file mode 100644 index ec066b4..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in-shutdown-to-access-sysc.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 3097e6265e79329635b528dd97b7fa3ed7dbb805 Mon Sep 17 00:00:00 2001 -From: Miguel Vadillo <vadillo@ti.com> -Date: Fri, 1 Jul 2011 22:54:02 +0200 -Subject: [PATCH 031/149] OMAP2+: hwmod: Enable module in shutdown to access sysconfig - -When calling the shutdown, the module may be already in idle. -Accessing the sysconfig register will then lead to a crash. -In that case, re-enable the module in order to allow the access -to the sysconfig register. - -Signed-off-by: Miguel Vadillo <vadillo@ti.com> -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 5 ++++- - 1 files changed, 4 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 384d3c3..cbc2a8a 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -1396,8 +1396,11 @@ static int _shutdown(struct omap_hwmod *oh) - } - } - -- if (oh->class->sysc) -+ if (oh->class->sysc) { -+ if (oh->_state == _HWMOD_STATE_IDLE) -+ _enable(oh); - _shutdown_sysc(oh); -+ } - - /* - * If an IP contains only one HW reset line, then assert it --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch deleted file mode 100644 index 6f92108..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 0b7a00a668b460c5a541d2d9d77a96cd0de3f57d Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Fri, 1 Jul 2011 22:54:03 +0200 -Subject: [PATCH 032/149] OMAP2+: hwmod: Do not write the enawakeup bit if SYSC_HAS_ENAWAKEUP is not set - -The Type 2 type of IPs will not have any enawakeup bit in their sysconfig. -Writing to that bit will instead trigger a softreset. -Check the flag to write this bit only if the module supports it. - -Reported-by: Miguel Vadillo <vadillo@ti.com> -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 14 ++++---------- - 1 files changed, 4 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index cbc2a8a..3800084 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -387,8 +387,6 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, - */ - static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) - { -- u32 wakeup_mask; -- - if (!oh->class->sysc || - !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || -@@ -400,9 +398,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) - return -EINVAL; - } - -- wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); -- -- *v |= wakeup_mask; -+ if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) -+ *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; - - if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) - _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); -@@ -425,8 +422,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) - */ - static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) - { -- u32 wakeup_mask; -- - if (!oh->class->sysc || - !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || -@@ -438,9 +433,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) - return -EINVAL; - } - -- wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); -- -- *v &= ~wakeup_mask; -+ if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) -+ *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); - - if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) - _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2-hwmod-Remove-_populate_mpu_rt_base-warning.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2-hwmod-Remove-_populate_mpu_rt_base-warning.patch deleted file mode 100644 index 8963785..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2-hwmod-Remove-_populate_mpu_rt_base-warning.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 9c5dd6c8e5a9dd6fc98e30a45a3d929034de664b Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Fri, 1 Jul 2011 22:54:04 +0200 -Subject: [PATCH 033/149] OMAP2+: hwmod: Remove _populate_mpu_rt_base warning - -It is perfectly valid for some hwmod to not have any -register target address for sysconfig. This is especially -true for interconnect hwmods. -Remove the warning. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 3 --- - 1 files changed, 0 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 3800084..f401417 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -1704,9 +1704,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data) - return 0; - - oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); -- if (!oh->_mpu_rt_va) -- pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n", -- __func__, oh->name); - - return 0; - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset-management.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset-management.patch deleted file mode 100644 index 7e390ed..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset-management.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 0fdacba393a3d2b2c87b4a9c4b2bb811bd896c09 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Fri, 1 Jul 2011 22:54:05 +0200 -Subject: [PATCH 034/149] OMAP2+: hwmod: Fix the HW reset management - -The HW reset must be de-assert after the clocks are enabled -but before waiting for the target to be ready. Otherwise the -reset might not work properly since the clock is not running -to proceed the reset. - -De-assert the reset after _enable_clocks and before -_wait_target_ready. -Re-assert it only when the clocks are disabled. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 32 ++++++++++++++++---------------- - 1 files changed, 16 insertions(+), 16 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index f401417..df91bb1 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh) - - pr_debug("omap_hwmod: %s: enabling\n", oh->name); - -- /* -- * If an IP contains only one HW reset line, then de-assert it in order -- * to allow to enable the clocks. Otherwise the PRCM will return -- * Intransition status, and the init will failed. -- */ -- if ((oh->_state == _HWMOD_STATE_INITIALIZED || -- oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) -- _deassert_hardreset(oh, oh->rst_lines[0].name); -- - /* Mux pins for device runtime if populated */ - if (oh->mux && (!oh->mux->enabled || - ((oh->_state == _HWMOD_STATE_IDLE) && -@@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh) - _add_initiator_dep(oh, mpu_oh); - _enable_clocks(oh); - -+ /* -+ * If an IP contains only one HW reset line, then de-assert it in order -+ * to allow the module state transition. Otherwise the PRCM will return -+ * Intransition status, and the init will failed. -+ */ -+ if ((oh->_state == _HWMOD_STATE_INITIALIZED || -+ oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) -+ _deassert_hardreset(oh, oh->rst_lines[0].name); -+ - r = _wait_target_ready(oh); - if (!r) { - oh->_state = _HWMOD_STATE_ENABLED; -@@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh) - _shutdown_sysc(oh); - } - -- /* -- * If an IP contains only one HW reset line, then assert it -- * before disabling the clocks and shutting down the IP. -- */ -- if (oh->rst_lines_cnt == 1) -- _assert_hardreset(oh, oh->rst_lines[0].name); -- - /* clocks and deps are already disabled in idle */ - if (oh->_state == _HWMOD_STATE_ENABLED) { - _del_initiator_dep(oh, mpu_oh); -@@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh) - } - /* XXX Should this code also force-disable the optional clocks? */ - -+ /* -+ * If an IP contains only one HW reset line, then assert it -+ * after disabling the clocks and before shutting down the IP. -+ */ -+ if (oh->rst_lines_cnt == 1) -+ _assert_hardreset(oh, oh->rst_lines[0].name); -+ - /* Mux pins to safe mode or use populated off mode values */ - if (oh->mux) - omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch deleted file mode 100644 index fbedcef..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch +++ /dev/null @@ -1,30 +0,0 @@ -From ea1e84fd91f4bfa506f7d44c4183ab649308b940 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Fri, 1 Jul 2011 22:54:06 +0200 -Subject: [PATCH 035/149] OMAP: hwmod: Add warnings if enable failed - -Change the debug into warning to check what IPs are failing. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index df91bb1..64e9830 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -944,6 +944,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) - - if (!ret) - oh->_state = _HWMOD_STATE_CLKS_INITED; -+ else -+ pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name); - - return ret; - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the-readability.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the-readability.patch deleted file mode 100644 index e484c43..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the-readability.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 1a090fd9d66008314ef1963ff7335462b4231d8b Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Fri, 1 Jul 2011 22:54:07 +0200 -Subject: [PATCH 036/149] OMAP: hwmod: Move pr_debug to improve the readability - -Move the pr_debug at the top of the function -to trace the entry even if the first test is failing. -That help understanding that we entered the function -but failed in it. - -Move the _enable last part out of the test to reduce -indentation and improve readability. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 32 +++++++++++++++++--------------- - 1 files changed, 17 insertions(+), 15 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 64e9830..e530bcb 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -1242,6 +1242,8 @@ static int _enable(struct omap_hwmod *oh) - { - int r; - -+ pr_debug("omap_hwmod: %s: enabling\n", oh->name); -+ - if (oh->_state != _HWMOD_STATE_INITIALIZED && - oh->_state != _HWMOD_STATE_IDLE && - oh->_state != _HWMOD_STATE_DISABLED) { -@@ -1250,8 +1252,6 @@ static int _enable(struct omap_hwmod *oh) - return -EINVAL; - } - -- pr_debug("omap_hwmod: %s: enabling\n", oh->name); -- - /* Mux pins for device runtime if populated */ - if (oh->mux && (!oh->mux->enabled || - ((oh->_state == _HWMOD_STATE_IDLE) && -@@ -1271,19 +1271,21 @@ static int _enable(struct omap_hwmod *oh) - _deassert_hardreset(oh, oh->rst_lines[0].name); - - r = _wait_target_ready(oh); -- if (!r) { -- oh->_state = _HWMOD_STATE_ENABLED; -- -- /* Access the sysconfig only if the target is ready */ -- if (oh->class->sysc) { -- if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) -- _update_sysc_cache(oh); -- _enable_sysc(oh); -- } -- } else { -- _disable_clocks(oh); -+ if (r) { - pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", - oh->name, r); -+ _disable_clocks(oh); -+ -+ return r; -+ } -+ -+ oh->_state = _HWMOD_STATE_ENABLED; -+ -+ /* Access the sysconfig only if the target is ready */ -+ if (oh->class->sysc) { -+ if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) -+ _update_sysc_cache(oh); -+ _enable_sysc(oh); - } - - return r; -@@ -1299,14 +1301,14 @@ static int _enable(struct omap_hwmod *oh) - */ - static int _idle(struct omap_hwmod *oh) - { -+ pr_debug("omap_hwmod: %s: idling\n", oh->name); -+ - if (oh->_state != _HWMOD_STATE_ENABLED) { - WARN(1, "omap_hwmod: %s: idle state can only be entered from " - "enabled state\n", oh->name); - return -EINVAL; - } - -- pr_debug("omap_hwmod: %s: idling\n", oh->name); -- - if (oh->class->sysc) - _idle_sysc(oh); - _del_initiator_dep(oh, mpu_oh); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to-terminate-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to-terminate-.patch deleted file mode 100644 index 8618e74..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to-terminate-.patch +++ /dev/null @@ -1,3529 +0,0 @@ -From 2c900775f726b160e5ce702e75554282c2869d60 Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sat, 9 Jul 2011 19:14:05 -0600 -Subject: [PATCH 037/149] omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays - -Previously, struct omap_hwmod_addr_space arrays were unterminated; and -users of these arrays used the ARRAY_SIZE() macro to determine the -length of the array. However, ARRAY_SIZE() only works when the array -is in the same scope as the macro user. - -So far this hasn't been a problem. However, to reduce duplicated -data, a subsequent patch will move common data to a separate, shared -file. When this is done, ARRAY_SIZE() will no longer be usable. - -This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space -arrays and uses a null structure member as the array terminator -instead. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 45 ++++++-- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 66 +++++----- - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 83 ++++++------- - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 108 ++++++++-------- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 170 +++++++++++++------------- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 - - 6 files changed, 249 insertions(+), 225 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index e530bcb..73599f0 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -2,6 +2,7 @@ - * omap_hwmod implementation for OMAP2/3/4 - * - * Copyright (C) 2009-2011 Nokia Corporation -+ * Copyright (C) 2011 Texas Instruments, Inc. - * - * Paul Walmsley, Benoît Cousson, Kevin Hilman - * -@@ -678,6 +679,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) - } - - /** -+ * _count_ocp_if_addr_spaces - count the number of address space entries for @oh -+ * @oh: struct omap_hwmod *oh -+ * -+ * Count and return the number of address space ranges associated with -+ * the hwmod @oh. Used to allocate struct resource data. Returns 0 -+ * if @oh is NULL. -+ */ -+static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) -+{ -+ struct omap_hwmod_addr_space *mem; -+ int i = 0; -+ -+ if (!os || !os->addr) -+ return 0; -+ -+ do { -+ mem = &os->addr[i++]; -+ } while (mem->pa_start != mem->pa_end); -+ -+ return i; -+} -+ -+/** - * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use - * @oh: struct omap_hwmod * - * -@@ -722,8 +746,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) - { - struct omap_hwmod_ocp_if *os; - struct omap_hwmod_addr_space *mem; -- int i; -- int found = 0; -+ int i = 0, found = 0; - void __iomem *va_start; - - if (!oh || oh->slaves_cnt == 0) -@@ -731,12 +754,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) - - os = oh->slaves[index]; - -- for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { -- if (mem->flags & ADDR_TYPE_RT) { -+ if (!os->addr) -+ return NULL; -+ -+ do { -+ mem = &os->addr[i++]; -+ if (mem->flags & ADDR_TYPE_RT) - found = 1; -- break; -- } -- } -+ } while (!found && mem->pa_start != mem->pa_end); - - if (found) { - va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); -@@ -1962,7 +1987,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) - ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; - - for (i = 0; i < oh->slaves_cnt; i++) -- ret += oh->slaves[i]->addr_cnt; -+ ret += _count_ocp_if_addr_spaces(oh->slaves[i]); - - return ret; - } -@@ -2002,10 +2027,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) - - for (i = 0; i < oh->slaves_cnt; i++) { - struct omap_hwmod_ocp_if *os; -+ int addr_cnt; - - os = oh->slaves[i]; -+ addr_cnt = _count_ocp_if_addr_spaces(os); - -- for (j = 0; j < os->addr_cnt; j++) { -+ for (j = 0; j < addr_cnt; j++) { - (res + r)->name = (os->addr + j)->name; - (res + r)->start = (os->addr + j)->pa_start; - (res + r)->end = (os->addr + j)->pa_end; -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index c4d0ae8..1a7ce3e 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -1,7 +1,7 @@ - /* - * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips - * -- * Copyright (C) 2009-2010 Nokia Corporation -+ * Copyright (C) 2009-2011 Nokia Corporation - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify -@@ -120,6 +120,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { -@@ -127,7 +128,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { - .slave = &omap2420_mcspi1_hwmod, - .clk = "mcspi1_ick", - .addr = omap2420_mcspi1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -138,6 +138,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { -@@ -145,7 +146,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { - .slave = &omap2420_mcspi2_hwmod, - .clk = "mcspi2_ick", - .addr = omap2420_mcspi2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -163,6 +163,7 @@ static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { -@@ -170,7 +171,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { - .slave = &omap2420_uart1_hwmod, - .clk = "uart1_ick", - .addr = omap2420_uart1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -181,6 +181,7 @@ static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { -@@ -188,7 +189,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { - .slave = &omap2420_uart2_hwmod, - .clk = "uart2_ick", - .addr = omap2420_uart2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -199,6 +199,7 @@ static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { -@@ -206,7 +207,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { - .slave = &omap2420_uart3_hwmod, - .clk = "uart3_ick", - .addr = omap2420_uart3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { -@@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { - .slave = &omap2420_i2c1_hwmod, - .clk = "i2c1_ick", - .addr = omap2420_i2c1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -238,6 +238,7 @@ static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { -@@ -245,7 +246,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { - .slave = &omap2420_i2c2_hwmod, - .clk = "i2c2_ick", - .addr = omap2420_i2c2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -370,6 +370,7 @@ static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { - .pa_end = 0x48028000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_wkup -> timer1 */ -@@ -378,7 +379,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { - .slave = &omap2420_timer1_hwmod, - .clk = "gpt1_ick", - .addr = omap2420_timer1_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -420,6 +420,7 @@ static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { - .pa_end = 0x4802a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer2 */ -@@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { - .slave = &omap2420_timer2_hwmod, - .clk = "gpt2_ick", - .addr = omap2420_timer2_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -470,6 +470,7 @@ static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { - .pa_end = 0x48078000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer3 */ -@@ -478,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { - .slave = &omap2420_timer3_hwmod, - .clk = "gpt3_ick", - .addr = omap2420_timer3_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -520,6 +520,7 @@ static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { - .pa_end = 0x4807a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer4 */ -@@ -528,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { - .slave = &omap2420_timer4_hwmod, - .clk = "gpt4_ick", - .addr = omap2420_timer4_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -570,6 +570,7 @@ static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { - .pa_end = 0x4807c000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer5 */ -@@ -578,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { - .slave = &omap2420_timer5_hwmod, - .clk = "gpt5_ick", - .addr = omap2420_timer5_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer5_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { - .pa_end = 0x4807e000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer6 */ -@@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { - .slave = &omap2420_timer6_hwmod, - .clk = "gpt6_ick", - .addr = omap2420_timer6_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer6_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { - .pa_end = 0x48080000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer7 */ -@@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { - .slave = &omap2420_timer7_hwmod, - .clk = "gpt7_ick", - .addr = omap2420_timer7_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer7_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { - .pa_end = 0x48082000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer8 */ -@@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { - .slave = &omap2420_timer8_hwmod, - .clk = "gpt8_ick", - .addr = omap2420_timer8_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer8_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { - .pa_end = 0x48084000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer9 */ -@@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { - .slave = &omap2420_timer9_hwmod, - .clk = "gpt9_ick", - .addr = omap2420_timer9_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer9_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer10 */ -@@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { - .slave = &omap2420_timer10_hwmod, - .clk = "gpt10_ick", - .addr = omap2420_timer10_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer10_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer11 */ -@@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { - .slave = &omap2420_timer11_hwmod, - .clk = "gpt11_ick", - .addr = omap2420_timer11_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer11_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { - .pa_end = 0x4808a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer12 */ -@@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { - .slave = &omap2420_timer12_hwmod, - .clk = "gpt12_ick", - .addr = omap2420_timer12_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_timer12_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -966,6 +966,7 @@ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { - .pa_end = 0x4802207f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { -@@ -973,7 +974,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { - .slave = &omap2420_wd_timer2_hwmod, - .clk = "mpu_wdt_ick", - .addr = omap2420_wd_timer2_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1184,6 +1184,7 @@ static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss */ -@@ -1192,7 +1193,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { - .slave = &omap2420_dss_core_hwmod, - .clk = "dss_ick", - .addr = omap2420_dss_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_dss_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, -@@ -1268,6 +1268,7 @@ static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_dispc */ -@@ -1276,7 +1277,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { - .slave = &omap2420_dss_dispc_hwmod, - .clk = "dss_ick", - .addr = omap2420_dss_dispc_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_dss_dispc_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, -@@ -1338,6 +1338,7 @@ static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_rfbi */ -@@ -1346,7 +1347,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { - .slave = &omap2420_dss_rfbi_hwmod, - .clk = "dss_ick", - .addr = omap2420_dss_rfbi_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_dss_rfbi_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, -@@ -1394,6 +1394,7 @@ static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_venc */ -@@ -1402,7 +1403,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { - .slave = &omap2420_dss_venc_hwmod, - .clk = "dss_54m_fck", - .addr = omap2420_dss_venc_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_dss_venc_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, -@@ -1536,6 +1536,7 @@ static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { - .pa_end = 0x480181ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { -@@ -1543,7 +1544,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { - .slave = &omap2420_gpio1_hwmod, - .clk = "gpios_ick", - .addr = omap2420_gpio1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_gpio1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1554,6 +1554,7 @@ static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { - .pa_end = 0x4801a1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { -@@ -1561,7 +1562,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { - .slave = &omap2420_gpio2_hwmod, - .clk = "gpios_ick", - .addr = omap2420_gpio2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_gpio2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1572,6 +1572,7 @@ static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { - .pa_end = 0x4801c1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { -@@ -1579,7 +1580,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { - .slave = &omap2420_gpio3_hwmod, - .clk = "gpios_ick", - .addr = omap2420_gpio3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_gpio3_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1590,6 +1590,7 @@ static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { - .pa_end = 0x4801e1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { -@@ -1597,7 +1598,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { - .slave = &omap2420_gpio4_hwmod, - .clk = "gpios_ick", - .addr = omap2420_gpio4_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2420_gpio4_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1789,6 +1789,7 @@ static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { - .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* dma_system -> L3 */ -@@ -1810,7 +1811,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { - .slave = &omap2420_dma_system_hwmod, - .clk = "sdma_ick", - .addr = omap2420_dma_system_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1868,6 +1868,7 @@ static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { - .pa_end = 0x480941ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - /* l4_core -> mailbox */ -@@ -1875,7 +1876,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_mailbox_hwmod, - .addr = omap2420_mailbox_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_mailbox_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2044,6 +2044,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp1 */ -@@ -2052,7 +2053,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { - .slave = &omap2420_mcbsp1_hwmod, - .clk = "mcbsp1_ick", - .addr = omap2420_mcbsp1_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2101,6 +2101,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { - .pa_end = 0x480760ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp2 */ -@@ -2109,7 +2110,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { - .slave = &omap2420_mcbsp2_hwmod, - .clk = "mcbsp2_ick", - .addr = omap2420_mcbsp2_addrs, -- .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index 9682dd5..da28794 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -1,7 +1,7 @@ - /* - * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips - * -- * Copyright (C) 2009-2010 Nokia Corporation -+ * Copyright (C) 2009-2011 Nokia Corporation - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify -@@ -141,6 +141,7 @@ static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { -@@ -148,7 +149,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { - .slave = &omap2430_i2c1_hwmod, - .clk = "i2c1_ick", - .addr = omap2430_i2c1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -159,6 +159,7 @@ static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { -@@ -166,7 +167,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { - .slave = &omap2430_i2c2_hwmod, - .clk = "i2c2_ick", - .addr = omap2430_i2c2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -184,6 +184,7 @@ static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { -@@ -191,7 +192,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { - .slave = &omap2430_uart1_hwmod, - .clk = "uart1_ick", - .addr = omap2430_uart1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -202,6 +202,7 @@ static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { -@@ -209,7 +210,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { - .slave = &omap2430_uart2_hwmod, - .clk = "uart2_ick", - .addr = omap2430_uart2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { -@@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { - .slave = &omap2430_uart3_hwmod, - .clk = "uart3_ick", - .addr = omap2430_uart3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -248,7 +248,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { - .slave = &omap2430_usbhsotg_hwmod, - .clk = "usb_l4_ick", - .addr = omap2430_usbhsotg_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_usbhsotg_addrs), - .user = OCP_USER_MPU, - }; - -@@ -267,6 +266,7 @@ static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { - .pa_end = 0x4809c1ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { -@@ -274,7 +274,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { - .slave = &omap2430_mmc1_hwmod, - .clk = "mmchs1_ick", - .addr = omap2430_mmc1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_mmc1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -285,14 +284,14 @@ static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { - .pa_end = 0x480b41ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mmc2_hwmod, -- .addr = omap2430_mmc2_addr_space, - .clk = "mmchs2_ick", -- .addr_cnt = ARRAY_SIZE(omap2430_mmc2_addr_space), -+ .addr = omap2430_mmc2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -339,6 +338,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { -@@ -346,7 +346,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { - .slave = &omap2430_mcspi1_hwmod, - .clk = "mcspi1_ick", - .addr = omap2430_mcspi1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -357,6 +356,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { -@@ -364,7 +364,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { - .slave = &omap2430_mcspi2_hwmod, - .clk = "mcspi2_ick", - .addr = omap2430_mcspi2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -375,6 +374,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { - .pa_end = 0x480b80ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { -@@ -382,7 +382,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { - .slave = &omap2430_mcspi3_hwmod, - .clk = "mcspi3_ick", - .addr = omap2430_mcspi3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -471,6 +470,7 @@ static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { - .pa_end = 0x49018000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_wkup -> timer1 */ -@@ -479,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { - .slave = &omap2430_timer1_hwmod, - .clk = "gpt1_ick", - .addr = omap2430_timer1_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -521,6 +520,7 @@ static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { - .pa_end = 0x4802a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer2 */ -@@ -529,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { - .slave = &omap2430_timer2_hwmod, - .clk = "gpt2_ick", - .addr = omap2430_timer2_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -571,6 +570,7 @@ static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { - .pa_end = 0x48078000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer3 */ -@@ -579,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { - .slave = &omap2430_timer3_hwmod, - .clk = "gpt3_ick", - .addr = omap2430_timer3_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -621,6 +620,7 @@ static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { - .pa_end = 0x4807a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer4 */ -@@ -629,7 +629,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { - .slave = &omap2430_timer4_hwmod, - .clk = "gpt4_ick", - .addr = omap2430_timer4_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -671,6 +670,7 @@ static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { - .pa_end = 0x4807c000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer5 */ -@@ -679,7 +679,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { - .slave = &omap2430_timer5_hwmod, - .clk = "gpt5_ick", - .addr = omap2430_timer5_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer5_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -721,6 +720,7 @@ static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { - .pa_end = 0x4807e000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer6 */ -@@ -729,7 +729,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { - .slave = &omap2430_timer6_hwmod, - .clk = "gpt6_ick", - .addr = omap2430_timer6_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer6_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -771,6 +770,7 @@ static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { - .pa_end = 0x48080000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer7 */ -@@ -779,7 +779,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { - .slave = &omap2430_timer7_hwmod, - .clk = "gpt7_ick", - .addr = omap2430_timer7_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer7_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -821,6 +820,7 @@ static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { - .pa_end = 0x48082000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer8 */ -@@ -829,7 +829,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { - .slave = &omap2430_timer8_hwmod, - .clk = "gpt8_ick", - .addr = omap2430_timer8_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer8_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -871,6 +870,7 @@ static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { - .pa_end = 0x48084000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer9 */ -@@ -879,7 +879,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { - .slave = &omap2430_timer9_hwmod, - .clk = "gpt9_ick", - .addr = omap2430_timer9_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer9_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -921,6 +920,7 @@ static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer10 */ -@@ -929,7 +929,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { - .slave = &omap2430_timer10_hwmod, - .clk = "gpt10_ick", - .addr = omap2430_timer10_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer10_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -971,6 +970,7 @@ static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer11 */ -@@ -979,7 +979,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { - .slave = &omap2430_timer11_hwmod, - .clk = "gpt11_ick", - .addr = omap2430_timer11_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer11_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1021,6 +1020,7 @@ static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { - .pa_end = 0x4808a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer12 */ -@@ -1029,7 +1029,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { - .slave = &omap2430_timer12_hwmod, - .clk = "gpt12_ick", - .addr = omap2430_timer12_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_timer12_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1066,6 +1065,7 @@ static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { - .pa_end = 0x4901607f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { -@@ -1073,7 +1073,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { - .slave = &omap2430_wd_timer2_hwmod, - .clk = "mpu_wdt_ick", - .addr = omap2430_wd_timer2_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1284,6 +1283,7 @@ static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss */ -@@ -1292,7 +1292,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { - .slave = &omap2430_dss_core_hwmod, - .clk = "dss_ick", - .addr = omap2430_dss_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_dss_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1362,6 +1361,7 @@ static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_dispc */ -@@ -1370,7 +1370,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { - .slave = &omap2430_dss_dispc_hwmod, - .clk = "dss_ick", - .addr = omap2430_dss_dispc_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_dss_dispc_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1426,6 +1425,7 @@ static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_rfbi */ -@@ -1434,7 +1434,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { - .slave = &omap2430_dss_rfbi_hwmod, - .clk = "dss_ick", - .addr = omap2430_dss_rfbi_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_dss_rfbi_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1476,6 +1475,7 @@ static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_venc */ -@@ -1484,7 +1484,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { - .slave = &omap2430_dss_venc_hwmod, - .clk = "dss_54m_fck", - .addr = omap2430_dss_venc_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_dss_venc_addrs), - .flags = OCPIF_SWSUP_IDLE, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; -@@ -1621,6 +1620,7 @@ static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { - .pa_end = 0x4900C1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { -@@ -1628,7 +1628,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { - .slave = &omap2430_gpio1_hwmod, - .clk = "gpios_ick", - .addr = omap2430_gpio1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_gpio1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1639,6 +1638,7 @@ static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { - .pa_end = 0x4900E1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { -@@ -1646,7 +1646,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { - .slave = &omap2430_gpio2_hwmod, - .clk = "gpios_ick", - .addr = omap2430_gpio2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_gpio2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1657,6 +1656,7 @@ static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { - .pa_end = 0x490101ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { -@@ -1664,7 +1664,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { - .slave = &omap2430_gpio3_hwmod, - .clk = "gpios_ick", - .addr = omap2430_gpio3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_gpio3_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1675,6 +1674,7 @@ static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { - .pa_end = 0x490121ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { -@@ -1682,7 +1682,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { - .slave = &omap2430_gpio4_hwmod, - .clk = "gpios_ick", - .addr = omap2430_gpio4_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_gpio4_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1693,6 +1692,7 @@ static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { - .pa_end = 0x480B61ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { -@@ -1700,7 +1700,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { - .slave = &omap2430_gpio5_hwmod, - .clk = "gpio5_ick", - .addr = omap2430_gpio5_addr_space, -- .addr_cnt = ARRAY_SIZE(omap2430_gpio5_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1923,6 +1922,7 @@ static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { - .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* dma_system -> L3 */ -@@ -1944,7 +1944,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { - .slave = &omap2430_dma_system_hwmod, - .clk = "sdma_ick", - .addr = omap2430_dma_system_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2001,6 +2000,7 @@ static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { - .pa_end = 0x480941ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - /* l4_core -> mailbox */ -@@ -2008,7 +2008,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mailbox_hwmod, - .addr = omap2430_mailbox_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_mailbox_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2287,6 +2286,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp1 */ -@@ -2295,7 +2295,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { - .slave = &omap2430_mcbsp1_hwmod, - .clk = "mcbsp1_ick", - .addr = omap2430_mcbsp1_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2345,6 +2344,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { - .pa_end = 0x480760ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp2 */ -@@ -2353,7 +2353,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { - .slave = &omap2430_mcbsp2_hwmod, - .clk = "mcbsp2_ick", - .addr = omap2430_mcbsp2_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2403,6 +2402,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { - .pa_end = 0x4808C0ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp3 */ -@@ -2411,7 +2411,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { - .slave = &omap2430_mcbsp3_hwmod, - .clk = "mcbsp3_ick", - .addr = omap2430_mcbsp3_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2461,6 +2460,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { - .pa_end = 0x4808E0ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp4 */ -@@ -2469,7 +2469,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { - .slave = &omap2430_mcbsp4_hwmod, - .clk = "mcbsp4_ick", - .addr = omap2430_mcbsp4_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2519,6 +2518,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { - .pa_end = 0x480960ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp5 */ -@@ -2527,7 +2527,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { - .slave = &omap2430_mcbsp5_hwmod, - .clk = "mcbsp5_ick", - .addr = omap2430_mcbsp5_addrs, -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 909a84d..6410779 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -1,7 +1,7 @@ - /* - * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips - * -- * Copyright (C) 2009-2010 Nokia Corporation -+ * Copyright (C) 2009-2011 Nokia Corporation - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify -@@ -111,6 +111,7 @@ static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { - .pa_end = 0x6800ffff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - /* MPU -> L3 interface */ -@@ -118,7 +119,6 @@ static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = { - .master = &omap3xxx_mpu_hwmod, - .slave = &omap3xxx_l3_main_hwmod, - .addr = omap3xxx_l3_main_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_l3_main_addrs), - .user = OCP_USER_MPU, - }; - -@@ -196,6 +196,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { - .pa_end = 0x4809c1ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { -@@ -203,7 +204,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { - .slave = &omap3xxx_mmc1_hwmod, - .clk = "mmchs1_ick", - .addr = omap3xxx_mmc1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mmc1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 - }; -@@ -215,6 +215,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { - .pa_end = 0x480b41ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { -@@ -222,7 +223,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { - .slave = &omap3xxx_mmc2_hwmod, - .clk = "mmchs2_ick", - .addr = omap3xxx_mmc2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mmc2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 - }; -@@ -234,6 +234,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = { - .pa_end = 0x480ad1ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { -@@ -241,7 +242,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { - .slave = &omap3xxx_mmc3_hwmod, - .clk = "mmchs3_ick", - .addr = omap3xxx_mmc3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mmc3_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 - }; -@@ -253,6 +253,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = { - .pa_end = OMAP3_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { -@@ -260,7 +261,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { - .slave = &omap3xxx_uart1_hwmod, - .clk = "uart1_ick", - .addr = omap3xxx_uart1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_uart1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -271,6 +271,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = { - .pa_end = OMAP3_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { -@@ -278,7 +279,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { - .slave = &omap3xxx_uart2_hwmod, - .clk = "uart2_ick", - .addr = omap3xxx_uart2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_uart2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -289,6 +289,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = { - .pa_end = OMAP3_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { -@@ -296,7 +297,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { - .slave = &omap3xxx_uart3_hwmod, - .clk = "uart3_ick", - .addr = omap3xxx_uart3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_uart3_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -307,6 +307,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = { - .pa_end = OMAP3_UART4_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { -@@ -314,7 +315,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { - .slave = &omap3xxx_uart4_hwmod, - .clk = "uart4_ick", - .addr = omap3xxx_uart4_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_uart4_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -328,6 +328,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { -@@ -335,7 +336,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { - .slave = &omap3xxx_i2c1_hwmod, - .clk = "i2c1_ick", - .addr = omap3xxx_i2c1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_i2c1_addr_space), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, -@@ -353,6 +353,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { -@@ -360,7 +361,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { - .slave = &omap3xxx_i2c2_hwmod, - .clk = "i2c2_ick", - .addr = omap3xxx_i2c2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_i2c2_addr_space), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, -@@ -378,6 +378,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { - .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { -@@ -385,7 +386,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { - .slave = &omap3xxx_i2c3_hwmod, - .clk = "i2c3_ick", - .addr = omap3xxx_i2c3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3xxx_i2c3_addr_space), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_I2C3_REGION, -@@ -403,6 +403,7 @@ static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { - .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { -@@ -410,7 +411,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { - .slave = &omap34xx_sr1_hwmod, - .clk = "sr_l4_ick", - .addr = omap3_sr1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), - .user = OCP_USER_MPU, - }; - -@@ -421,6 +421,7 @@ static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { - .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { -@@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { - .slave = &omap34xx_sr2_hwmod, - .clk = "sr_l4_ick", - .addr = omap3_sr2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space), - .user = OCP_USER_MPU, - }; - -@@ -442,6 +442,7 @@ static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = { - .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> usbhsotg */ -@@ -450,7 +451,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { - .slave = &omap3xxx_usbhsotg_hwmod, - .clk = "l4_ick", - .addr = omap3xxx_usbhsotg_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs), - .user = OCP_USER_MPU, - }; - -@@ -468,6 +468,7 @@ static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = { - .pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> usbhsotg */ -@@ -476,7 +477,6 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = { - .slave = &am35xx_usbhsotg_hwmod, - .clk = "l4_ick", - .addr = am35xx_usbhsotg_addrs, -- .addr_cnt = ARRAY_SIZE(am35xx_usbhsotg_addrs), - .user = OCP_USER_MPU, - }; - -@@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { - .pa_end = 0x48318000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_wkup -> timer1 */ -@@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { - .slave = &omap3xxx_timer1_hwmod, - .clk = "gpt1_ick", - .addr = omap3xxx_timer1_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { - .pa_end = 0x49032000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer2 */ -@@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { - .slave = &omap3xxx_timer2_hwmod, - .clk = "gpt2_ick", - .addr = omap3xxx_timer2_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { - .pa_end = 0x49034000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer3 */ -@@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { - .slave = &omap3xxx_timer3_hwmod, - .clk = "gpt3_ick", - .addr = omap3xxx_timer3_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { - .pa_end = 0x49036000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer4 */ -@@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = { - .slave = &omap3xxx_timer4_hwmod, - .clk = "gpt4_ick", - .addr = omap3xxx_timer4_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { - .pa_end = 0x49038000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer5 */ -@@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = { - .slave = &omap3xxx_timer5_hwmod, - .clk = "gpt5_ick", - .addr = omap3xxx_timer5_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer5_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { - .pa_end = 0x4903A000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer6 */ -@@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = { - .slave = &omap3xxx_timer6_hwmod, - .clk = "gpt6_ick", - .addr = omap3xxx_timer6_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer6_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { - .pa_end = 0x4903C000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer7 */ -@@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = { - .slave = &omap3xxx_timer7_hwmod, - .clk = "gpt7_ick", - .addr = omap3xxx_timer7_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer7_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -971,6 +971,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { - .pa_end = 0x4903E000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer8 */ -@@ -979,7 +980,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = { - .slave = &omap3xxx_timer8_hwmod, - .clk = "gpt8_ick", - .addr = omap3xxx_timer8_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer8_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1021,6 +1021,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { - .pa_end = 0x49040000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer9 */ -@@ -1029,7 +1030,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = { - .slave = &omap3xxx_timer9_hwmod, - .clk = "gpt9_ick", - .addr = omap3xxx_timer9_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer9_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1071,6 +1071,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer10 */ -@@ -1079,7 +1080,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { - .slave = &omap3xxx_timer10_hwmod, - .clk = "gpt10_ick", - .addr = omap3xxx_timer10_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer10_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1121,6 +1121,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer11 */ -@@ -1129,7 +1130,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { - .slave = &omap3xxx_timer11_hwmod, - .clk = "gpt11_ick", - .addr = omap3xxx_timer11_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer11_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1171,6 +1171,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { - .pa_end = 0x48304000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> timer12 */ -@@ -1179,7 +1180,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer12 = { - .slave = &omap3xxx_timer12_hwmod, - .clk = "gpt12_ick", - .addr = omap3xxx_timer12_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer12_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1216,6 +1216,7 @@ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { - .pa_end = 0x4831407f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { -@@ -1223,7 +1224,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { - .slave = &omap3xxx_wd_timer2_hwmod, - .clk = "wdt2_ick", - .addr = omap3xxx_wd_timer2_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss */ -@@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { - .slave = &omap3430es1_dss_core_hwmod, - .clk = "dss_ick", - .addr = omap3xxx_dss_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, -@@ -1521,7 +1521,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { - .slave = &omap3xxx_dss_core_hwmod, - .clk = "dss_ick", - .addr = omap3xxx_dss_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, -@@ -1632,6 +1631,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_dispc */ -@@ -1640,7 +1640,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { - .slave = &omap3xxx_dss_dispc_hwmod, - .clk = "dss_ick", - .addr = omap3xxx_dss_dispc_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, -@@ -1697,6 +1696,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { - .pa_end = 0x4804FFFF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_dsi1 */ -@@ -1704,7 +1704,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_dss_dsi1_hwmod, - .addr = omap3xxx_dss_dsi1_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DSI_REGION, -@@ -1767,6 +1766,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_rfbi */ -@@ -1775,7 +1775,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { - .slave = &omap3xxx_dss_rfbi_hwmod, - .clk = "dss_ick", - .addr = omap3xxx_dss_rfbi_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, -@@ -1826,6 +1825,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> dss_venc */ -@@ -1834,7 +1834,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { - .slave = &omap3xxx_dss_venc_hwmod, - .clk = "dss_tv_fck", - .addr = omap3xxx_dss_venc_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_venc_addrs), - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, -@@ -2003,13 +2002,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = { - .pa_end = 0x483101ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = { - .master = &omap3xxx_l4_wkup_hwmod, - .slave = &omap3xxx_gpio1_hwmod, - .addr = omap3xxx_gpio1_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2020,13 +2019,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = { - .pa_end = 0x490501ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = { - .master = &omap3xxx_l4_per_hwmod, - .slave = &omap3xxx_gpio2_hwmod, - .addr = omap3xxx_gpio2_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2037,13 +2036,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = { - .pa_end = 0x490521ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = { - .master = &omap3xxx_l4_per_hwmod, - .slave = &omap3xxx_gpio3_hwmod, - .addr = omap3xxx_gpio3_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2054,13 +2053,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = { - .pa_end = 0x490541ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = { - .master = &omap3xxx_l4_per_hwmod, - .slave = &omap3xxx_gpio4_hwmod, - .addr = omap3xxx_gpio4_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2071,13 +2070,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = { - .pa_end = 0x490561ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = { - .master = &omap3xxx_l4_per_hwmod, - .slave = &omap3xxx_gpio5_hwmod, - .addr = omap3xxx_gpio5_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio5_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2088,13 +2087,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = { - .pa_end = 0x490581ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = { - .master = &omap3xxx_l4_per_hwmod, - .slave = &omap3xxx_gpio6_hwmod, - .addr = omap3xxx_gpio6_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio6_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2395,6 +2394,7 @@ static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { - .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* dma_system master ports */ -@@ -2408,7 +2408,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = { - .slave = &omap3xxx_dma_system_hwmod, - .clk = "core_l4_ick", - .addr = omap3xxx_dma_system_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2480,6 +2479,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp1 */ -@@ -2488,7 +2488,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = { - .slave = &omap3xxx_mcbsp1_hwmod, - .clk = "mcbsp1_ick", - .addr = omap3xxx_mcbsp1_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2538,6 +2537,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { - .pa_end = 0x490220ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcbsp2 */ -@@ -2546,7 +2546,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { - .slave = &omap3xxx_mcbsp2_hwmod, - .clk = "mcbsp2_ick", - .addr = omap3xxx_mcbsp2_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_addrs), -+ - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2601,6 +2601,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { - .pa_end = 0x490240ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcbsp3 */ -@@ -2609,7 +2610,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = { - .slave = &omap3xxx_mcbsp3_hwmod, - .clk = "mcbsp3_ick", - .addr = omap3xxx_mcbsp3_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { - .pa_end = 0x490260ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcbsp4 */ -@@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = { - .slave = &omap3xxx_mcbsp4_hwmod, - .clk = "mcbsp4_ick", - .addr = omap3xxx_mcbsp4_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2722,6 +2722,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { - .pa_end = 0x480960ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_core -> mcbsp5 */ -@@ -2730,7 +2731,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = { - .slave = &omap3xxx_mcbsp5_hwmod, - .clk = "mcbsp5_ick", - .addr = omap3xxx_mcbsp5_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2785,6 +2785,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { - .pa_end = 0x490280ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcbsp2_sidetone */ -@@ -2793,7 +2794,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = { - .slave = &omap3xxx_mcbsp2_sidetone_hwmod, - .clk = "mcbsp2_ick", - .addr = omap3xxx_mcbsp2_sidetone_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs), - .user = OCP_USER_MPU, - }; - -@@ -2834,6 +2834,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { - .pa_end = 0x4902A0ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcbsp3_sidetone */ -@@ -2842,7 +2843,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = { - .slave = &omap3xxx_mcbsp3_sidetone_hwmod, - .clk = "mcbsp3_ick", - .addr = omap3xxx_mcbsp3_sidetone_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs), - .user = OCP_USER_MPU, - }; - -@@ -3033,6 +3033,7 @@ static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { - .pa_end = 0x480941ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - /* l4_core -> mailbox */ -@@ -3040,7 +3041,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_mailbox_hwmod, - .addr = omap3xxx_mailbox_addrs, -- .addr_cnt = ARRAY_SIZE(omap3xxx_mailbox_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3076,6 +3076,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { -@@ -3083,7 +3084,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { - .slave = &omap34xx_mcspi1, - .clk = "mcspi1_ick", - .addr = omap34xx_mcspi1_addr_space, -- .addr_cnt = ARRAY_SIZE(omap34xx_mcspi1_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3094,6 +3094,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { -@@ -3101,7 +3102,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { - .slave = &omap34xx_mcspi2, - .clk = "mcspi2_ick", - .addr = omap34xx_mcspi2_addr_space, -- .addr_cnt = ARRAY_SIZE(omap34xx_mcspi2_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3112,6 +3112,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { - .pa_end = 0x480b80ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { -@@ -3119,7 +3120,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { - .slave = &omap34xx_mcspi3, - .clk = "mcspi3_ick", - .addr = omap34xx_mcspi3_addr_space, -- .addr_cnt = ARRAY_SIZE(omap34xx_mcspi3_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3130,6 +3130,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = { - .pa_end = 0x480ba0ff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { -@@ -3137,7 +3138,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { - .slave = &omap34xx_mcspi4, - .clk = "mcspi4_ick", - .addr = omap34xx_mcspi4_addr_space, -- .addr_cnt = ARRAY_SIZE(omap34xx_mcspi4_addr_space), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 8cbbfbf..f8ccc4a 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -95,6 +95,7 @@ static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = { - .pa_end = 0x4e0007ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* mpu -> dmm */ -@@ -103,7 +104,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = { - .slave = &omap44xx_dmm_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dmm_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dmm_addrs), - .user = OCP_USER_MPU, - }; - -@@ -150,6 +150,7 @@ static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = { - .pa_end = 0x4a20c0ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> emif_fw */ -@@ -158,7 +159,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = { - .slave = &omap44xx_emif_fw_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_emif_fw_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_emif_fw_addrs), - .user = OCP_USER_MPU, - }; - -@@ -276,6 +276,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { - .pa_end = 0x44000fff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - /* mpu -> l3_main_1 */ -@@ -284,7 +285,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -356,6 +356,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { - .pa_end = 0x44801fff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - /* l3_main_1 -> l3_main_2 */ -@@ -364,7 +365,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -411,6 +411,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { - .pa_end = 0x45000fff, - .flags = ADDR_TYPE_RT, - }, -+ { } - }; - - /* l3_main_1 -> l3_main_3 */ -@@ -419,7 +420,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { - .slave = &omap44xx_l3_main_3_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -697,6 +697,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { - .pa_end = 0x401f13ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> aess */ -@@ -705,7 +706,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { - .slave = &omap44xx_aess_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_aess_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_aess_addrs), - .user = OCP_USER_MPU, - }; - -@@ -715,6 +715,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = { - .pa_end = 0x490f13ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> aess (dma) */ -@@ -723,7 +724,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { - .slave = &omap44xx_aess_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_aess_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_aess_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -807,6 +807,7 @@ static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = { - .pa_end = 0x4a30401f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_wkup -> counter_32k */ -@@ -815,7 +816,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { - .slave = &omap44xx_counter_32k_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_counter_32k_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_counter_32k_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -889,6 +889,7 @@ static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { - .pa_end = 0x4a056fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> dma_system */ -@@ -897,7 +898,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = { - .slave = &omap44xx_dma_system_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dma_system_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dma_system_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -961,6 +961,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { - .pa_end = 0x4012e07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> dmic */ -@@ -969,7 +970,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { - .slave = &omap44xx_dmic_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_dmic_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dmic_addrs), - .user = OCP_USER_MPU, - }; - -@@ -979,6 +979,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { - .pa_end = 0x4902e07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> dmic (dma) */ -@@ -987,7 +988,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = { - .slave = &omap44xx_dmic_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_dmic_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dmic_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -1128,6 +1128,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { - .pa_end = 0x5800007f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> dss */ -@@ -1136,7 +1137,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { - .slave = &omap44xx_dss_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dss_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -1146,6 +1146,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = { - .pa_end = 0x4804007f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> dss */ -@@ -1154,7 +1155,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = { - .slave = &omap44xx_dss_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs), - .user = OCP_USER_MPU, - }; - -@@ -1228,6 +1228,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { - .pa_end = 0x58001fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> dss_dispc */ -@@ -1236,7 +1237,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { - .slave = &omap44xx_dss_dispc_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dss_dispc_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -1246,6 +1246,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { - .pa_end = 0x48041fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> dss_dispc */ -@@ -1254,7 +1255,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { - .slave = &omap44xx_dss_dispc_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_dispc_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs), - .user = OCP_USER_MPU, - }; - -@@ -1319,6 +1319,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { - .pa_end = 0x580041ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> dss_dsi1 */ -@@ -1327,7 +1328,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { - .slave = &omap44xx_dss_dsi1_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dss_dsi1_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -1337,6 +1337,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = { - .pa_end = 0x480441ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> dss_dsi1 */ -@@ -1345,7 +1346,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = { - .slave = &omap44xx_dss_dsi1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_dsi1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs), - .user = OCP_USER_MPU, - }; - -@@ -1389,6 +1389,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { - .pa_end = 0x580051ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> dss_dsi2 */ -@@ -1397,7 +1398,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { - .slave = &omap44xx_dss_dsi2_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dss_dsi2_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -1407,6 +1407,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = { - .pa_end = 0x480451ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> dss_dsi2 */ -@@ -1415,7 +1416,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = { - .slave = &omap44xx_dss_dsi2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_dsi2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs), - .user = OCP_USER_MPU, - }; - -@@ -1479,6 +1479,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { - .pa_end = 0x58006fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> dss_hdmi */ -@@ -1487,7 +1488,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { - .slave = &omap44xx_dss_hdmi_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dss_hdmi_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = { - .pa_end = 0x48046fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> dss_hdmi */ -@@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = { - .slave = &omap44xx_dss_hdmi_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_hdmi_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs), - .user = OCP_USER_MPU, - }; - -@@ -1565,6 +1565,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { - .pa_end = 0x580020ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> dss_rfbi */ -@@ -1573,7 +1574,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { - .slave = &omap44xx_dss_rfbi_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dss_rfbi_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -1583,6 +1583,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = { - .pa_end = 0x480420ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> dss_rfbi */ -@@ -1591,7 +1592,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = { - .slave = &omap44xx_dss_rfbi_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_rfbi_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs), - .user = OCP_USER_MPU, - }; - -@@ -1634,6 +1634,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { - .pa_end = 0x580030ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> dss_venc */ -@@ -1642,7 +1643,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { - .slave = &omap44xx_dss_venc_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_dss_venc_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -1652,6 +1652,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = { - .pa_end = 0x480430ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> dss_venc */ -@@ -1660,7 +1661,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { - .slave = &omap44xx_dss_venc_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_dss_venc_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs), - .user = OCP_USER_MPU, - }; - -@@ -1725,6 +1725,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { - .pa_end = 0x4a3101ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_wkup -> gpio1 */ -@@ -1733,7 +1734,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { - .slave = &omap44xx_gpio1_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_gpio1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1777,6 +1777,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { - .pa_end = 0x480551ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> gpio2 */ -@@ -1785,7 +1786,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { - .slave = &omap44xx_gpio2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1830,6 +1830,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { - .pa_end = 0x480571ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> gpio3 */ -@@ -1838,7 +1839,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { - .slave = &omap44xx_gpio3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1883,6 +1883,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { - .pa_end = 0x480591ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> gpio4 */ -@@ -1891,7 +1892,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { - .slave = &omap44xx_gpio4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio4_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1936,6 +1936,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { - .pa_end = 0x4805b1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> gpio5 */ -@@ -1944,7 +1945,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { - .slave = &omap44xx_gpio5_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio5_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio5_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1989,6 +1989,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { - .pa_end = 0x4805d1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> gpio6 */ -@@ -1997,7 +1998,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { - .slave = &omap44xx_gpio6_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_gpio6_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio6_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2072,6 +2072,7 @@ static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = { - .pa_end = 0x4a05bfff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> hsi */ -@@ -2080,7 +2081,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = { - .slave = &omap44xx_hsi_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_hsi_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_hsi_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2145,6 +2145,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { - .pa_end = 0x480700ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> i2c1 */ -@@ -2153,7 +2154,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = { - .slave = &omap44xx_i2c1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_i2c1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_i2c1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2198,6 +2198,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { - .pa_end = 0x480720ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> i2c2 */ -@@ -2206,7 +2207,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = { - .slave = &omap44xx_i2c2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_i2c2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_i2c2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2251,6 +2251,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { - .pa_end = 0x480600ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> i2c3 */ -@@ -2259,7 +2260,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = { - .slave = &omap44xx_i2c3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_i2c3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_i2c3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2304,6 +2304,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { - .pa_end = 0x483500ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> i2c4 */ -@@ -2312,7 +2313,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = { - .slave = &omap44xx_i2c4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_i2c4_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_i2c4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2479,6 +2479,7 @@ static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = { - .pa_end = 0x520000ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> iss */ -@@ -2487,7 +2488,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = { - .slave = &omap44xx_iss_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_iss_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_iss_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2562,6 +2562,7 @@ static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = { - .pa_end = 0x5a07ffff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l3_main_2 -> iva */ -@@ -2570,7 +2571,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = { - .slave = &omap44xx_iva_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_iva_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_iva_addrs), - .user = OCP_USER_MPU, - }; - -@@ -2665,6 +2665,7 @@ static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { - .pa_end = 0x4a31c07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_wkup -> kbd */ -@@ -2673,7 +2674,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = { - .slave = &omap44xx_kbd_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_kbd_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_kbd_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2730,6 +2730,7 @@ static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { - .pa_end = 0x4a0f41ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> mailbox */ -@@ -2738,7 +2739,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { - .slave = &omap44xx_mailbox_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mailbox_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mailbox_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2799,6 +2799,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { - .pa_end = 0x401220ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> mcbsp1 */ -@@ -2807,7 +2808,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { - .slave = &omap44xx_mcbsp1_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_addrs), - .user = OCP_USER_MPU, - }; - -@@ -2818,6 +2818,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = { - .pa_end = 0x490220ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> mcbsp1 (dma) */ -@@ -2826,7 +2827,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { - .slave = &omap44xx_mcbsp1_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp1_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -2872,6 +2872,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { - .pa_end = 0x401240ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> mcbsp2 */ -@@ -2880,7 +2881,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { - .slave = &omap44xx_mcbsp2_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_addrs), - .user = OCP_USER_MPU, - }; - -@@ -2891,6 +2891,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = { - .pa_end = 0x490240ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> mcbsp2 (dma) */ -@@ -2899,7 +2900,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { - .slave = &omap44xx_mcbsp2_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp2_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -2945,6 +2945,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { - .pa_end = 0x401260ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> mcbsp3 */ -@@ -2953,7 +2954,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { - .slave = &omap44xx_mcbsp3_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_addrs), - .user = OCP_USER_MPU, - }; - -@@ -2964,6 +2964,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = { - .pa_end = 0x490260ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> mcbsp3 (dma) */ -@@ -2972,7 +2973,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { - .slave = &omap44xx_mcbsp3_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcbsp3_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -3017,6 +3017,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { - .pa_end = 0x480960ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcbsp4 */ -@@ -3025,7 +3026,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = { - .slave = &omap44xx_mcbsp4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcbsp4_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3090,6 +3090,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { - .pa_end = 0x4013207f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> mcpdm */ -@@ -3098,7 +3099,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { - .slave = &omap44xx_mcpdm_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcpdm_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_addrs), - .user = OCP_USER_MPU, - }; - -@@ -3108,6 +3108,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = { - .pa_end = 0x4903207f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> mcpdm (dma) */ -@@ -3116,7 +3117,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = { - .slave = &omap44xx_mcpdm_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_mcpdm_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -3189,6 +3189,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { - .pa_end = 0x480981ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcspi1 */ -@@ -3197,7 +3198,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = { - .slave = &omap44xx_mcspi1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcspi1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcspi1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3249,6 +3249,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { - .pa_end = 0x4809a1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcspi2 */ -@@ -3257,7 +3258,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = { - .slave = &omap44xx_mcspi2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcspi2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcspi2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3309,6 +3309,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { - .pa_end = 0x480b81ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcspi3 */ -@@ -3317,7 +3318,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = { - .slave = &omap44xx_mcspi3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcspi3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcspi3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3367,6 +3367,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { - .pa_end = 0x480ba1ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mcspi4 */ -@@ -3375,7 +3376,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = { - .slave = &omap44xx_mcspi4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mcspi4_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mcspi4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3452,6 +3452,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = { - .pa_end = 0x4809c3ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mmc1 */ -@@ -3460,7 +3461,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = { - .slave = &omap44xx_mmc1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3516,6 +3516,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = { - .pa_end = 0x480b43ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mmc2 */ -@@ -3524,7 +3525,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = { - .slave = &omap44xx_mmc2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3570,6 +3570,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { - .pa_end = 0x480ad3ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mmc3 */ -@@ -3578,7 +3579,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = { - .slave = &omap44xx_mmc3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3622,6 +3622,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { - .pa_end = 0x480d13ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mmc4 */ -@@ -3630,7 +3631,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = { - .slave = &omap44xx_mmc4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc4_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3674,6 +3674,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { - .pa_end = 0x480d53ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> mmc5 */ -@@ -3682,7 +3683,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = { - .slave = &omap44xx_mmc5_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_mmc5_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc5_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3787,6 +3787,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { - .pa_end = 0x4a0dd03f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> smartreflex_core */ -@@ -3795,7 +3796,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = { - .slave = &omap44xx_smartreflex_core_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_smartreflex_core_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3833,6 +3833,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { - .pa_end = 0x4a0db03f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> smartreflex_iva */ -@@ -3841,7 +3842,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = { - .slave = &omap44xx_smartreflex_iva_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_smartreflex_iva_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3879,6 +3879,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { - .pa_end = 0x4a0d903f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> smartreflex_mpu */ -@@ -3887,7 +3888,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = { - .slave = &omap44xx_smartreflex_mpu_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_smartreflex_mpu_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -3944,6 +3944,7 @@ static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = { - .pa_end = 0x4a0f6fff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> spinlock */ -@@ -3952,7 +3953,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = { - .slave = &omap44xx_spinlock_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_spinlock_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_spinlock_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4024,6 +4024,7 @@ static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { - .pa_end = 0x4a31807f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_wkup -> timer1 */ -@@ -4032,7 +4033,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { - .slave = &omap44xx_timer1_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_timer1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4069,6 +4069,7 @@ static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { - .pa_end = 0x4803207f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer2 */ -@@ -4077,7 +4078,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = { - .slave = &omap44xx_timer2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4114,6 +4114,7 @@ static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { - .pa_end = 0x4803407f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer3 */ -@@ -4122,7 +4123,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = { - .slave = &omap44xx_timer3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4159,6 +4159,7 @@ static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { - .pa_end = 0x4803607f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer4 */ -@@ -4167,7 +4168,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = { - .slave = &omap44xx_timer4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer4_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4204,6 +4204,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { - .pa_end = 0x4013807f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> timer5 */ -@@ -4212,7 +4213,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { - .slave = &omap44xx_timer5_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer5_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer5_addrs), - .user = OCP_USER_MPU, - }; - -@@ -4222,6 +4222,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = { - .pa_end = 0x4903807f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> timer5 (dma) */ -@@ -4230,7 +4231,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = { - .slave = &omap44xx_timer5_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer5_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer5_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -4268,6 +4268,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { - .pa_end = 0x4013a07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> timer6 */ -@@ -4276,7 +4277,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { - .slave = &omap44xx_timer6_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer6_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer6_addrs), - .user = OCP_USER_MPU, - }; - -@@ -4286,6 +4286,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = { - .pa_end = 0x4903a07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> timer6 (dma) */ -@@ -4294,7 +4295,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = { - .slave = &omap44xx_timer6_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer6_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer6_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -4332,6 +4332,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { - .pa_end = 0x4013c07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> timer7 */ -@@ -4340,7 +4341,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { - .slave = &omap44xx_timer7_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer7_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer7_addrs), - .user = OCP_USER_MPU, - }; - -@@ -4350,6 +4350,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = { - .pa_end = 0x4903c07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> timer7 (dma) */ -@@ -4358,7 +4359,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = { - .slave = &omap44xx_timer7_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer7_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer7_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -4396,6 +4396,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { - .pa_end = 0x4013e07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> timer8 */ -@@ -4404,7 +4405,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { - .slave = &omap44xx_timer8_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer8_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer8_addrs), - .user = OCP_USER_MPU, - }; - -@@ -4414,6 +4414,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = { - .pa_end = 0x4903e07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> timer8 (dma) */ -@@ -4422,7 +4423,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = { - .slave = &omap44xx_timer8_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_timer8_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer8_dma_addrs), - .user = OCP_USER_SDMA, - }; - -@@ -4460,6 +4460,7 @@ static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { - .pa_end = 0x4803e07f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer9 */ -@@ -4468,7 +4469,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = { - .slave = &omap44xx_timer9_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer9_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer9_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4505,6 +4505,7 @@ static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { - .pa_end = 0x4808607f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer10 */ -@@ -4513,7 +4514,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = { - .slave = &omap44xx_timer10_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer10_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer10_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4550,6 +4550,7 @@ static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { - .pa_end = 0x4808807f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> timer11 */ -@@ -4558,7 +4559,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = { - .slave = &omap44xx_timer11_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_timer11_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_timer11_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4622,6 +4622,7 @@ static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { - .pa_end = 0x4806a0ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> uart1 */ -@@ -4630,7 +4631,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = { - .slave = &omap44xx_uart1_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_uart1_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_uart1_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4674,6 +4674,7 @@ static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { - .pa_end = 0x4806c0ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> uart2 */ -@@ -4682,7 +4683,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = { - .slave = &omap44xx_uart2_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_uart2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_uart2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4726,6 +4726,7 @@ static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { - .pa_end = 0x480200ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> uart3 */ -@@ -4734,7 +4735,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = { - .slave = &omap44xx_uart3_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_uart3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_uart3_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4779,6 +4779,7 @@ static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { - .pa_end = 0x4806e0ff, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_per -> uart4 */ -@@ -4787,7 +4788,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = { - .slave = &omap44xx_uart4_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_uart4_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_uart4_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4854,6 +4854,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { - .pa_end = 0x4a0ab003, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_cfg -> usb_otg_hs */ -@@ -4862,7 +4863,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = { - .slave = &omap44xx_usb_otg_hs_hwmod, - .clk = "l4_div_ck", - .addr = omap44xx_usb_otg_hs_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4931,6 +4931,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { - .pa_end = 0x4a31407f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_wkup -> wd_timer2 */ -@@ -4939,7 +4940,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = { - .slave = &omap44xx_wd_timer2_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_wd_timer2_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -4976,6 +4976,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { - .pa_end = 0x4013007f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> wd_timer3 */ -@@ -4984,7 +4985,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = { - .slave = &omap44xx_wd_timer3_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_wd_timer3_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs), - .user = OCP_USER_MPU, - }; - -@@ -4994,6 +4994,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = { - .pa_end = 0x4903007f, - .flags = ADDR_TYPE_RT - }, -+ { } - }; - - /* l4_abe -> wd_timer3 (dma) */ -@@ -5002,7 +5003,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = { - .slave = &omap44xx_wd_timer3_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_wd_timer3_dma_addrs, -- .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs), - .user = OCP_USER_SDMA, - }; - -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index e93438c..f3a3bff 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -219,7 +219,6 @@ struct omap_hwmod_addr_space { - * @clk: interface clock: OMAP clock name - * @_clk: pointer to the interface struct clk (filled in at runtime) - * @fw: interface firewall data -- * @addr_cnt: ARRAY_SIZE(@addr) - * @width: OCP data width - * @user: initiators using this interface (see OCP_USER_* macros above) - * @flags: OCP interface flags (see OCPIF_* macros above) -@@ -238,7 +237,6 @@ struct omap_hwmod_ocp_if { - union { - struct omap_hwmod_omap2_firewall omap2; - } fw; -- u8 addr_cnt; - u8 width; - u8 user; - u8 flags; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch deleted file mode 100644 index 991fe9a..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch +++ /dev/null @@ -1,1958 +0,0 @@ -From 6d88f17e46fda46214da43af303c4f4aa442bd39 Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sat, 9 Jul 2011 19:14:06 -0600 -Subject: [PATCH 038/149] omap_hwmod: share identical omap_hwmod_addr_space arrays - -To reduce kernel source file data duplication, share struct -omap_hwmod_addr_space arrays across OMAP2xxx and 3xxx hwmod data -files. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/Makefile | 11 +- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 291 ++---------------- - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 319 ++------------------ - .../omap_hwmod_2xxx_3xxx_interconnect_data.c | 173 +++++++++++ - .../mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 130 ++++++++ - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 151 +--------- - arch/arm/mach-omap2/omap_hwmod_common_data.h | 38 +++- - 7 files changed, 414 insertions(+), 699 deletions(-) - create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c - create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index ff1466f..8a75d17 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -145,9 +145,14 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o - obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o - - # hwmod data --obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o --obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o --obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o -+obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ -+ omap_hwmod_2xxx_3xxx_interconnect_data.o \ -+ omap_hwmod_2420_data.o -+obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ -+ omap_hwmod_2xxx_3xxx_interconnect_data.o \ -+ omap_hwmod_2430_data.o -+obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ -+ omap_hwmod_3xxx_data.o - obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o - - # EMU peripherals -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index 1a7ce3e..3ec625c 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod; - static struct omap_hwmod omap2420_mcbsp2_hwmod; - - /* l4 core -> mcspi1 interface */ --static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { -- { -- .pa_start = 0x48098000, -- .pa_end = 0x480980ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_mcspi1_hwmod, - .clk = "mcspi1_ick", -- .addr = omap2420_mcspi1_addr_space, -+ .addr = omap2_mcspi1_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* l4 core -> mcspi2 interface */ --static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { -- { -- .pa_start = 0x4809a000, -- .pa_end = 0x4809a0ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_mcspi2_hwmod, - .clk = "mcspi2_ick", -- .addr = omap2420_mcspi2_addr_space, -+ .addr = omap2_mcspi2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { - }; - - /* L4 CORE -> UART1 interface */ --static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { -- { -- .pa_start = OMAP2_UART1_BASE, -- .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_uart1_hwmod, - .clk = "uart1_ick", -- .addr = omap2420_uart1_addr_space, -+ .addr = omap2xxx_uart1_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* L4 CORE -> UART2 interface */ --static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { -- { -- .pa_start = OMAP2_UART2_BASE, -- .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_uart2_hwmod, - .clk = "uart2_ick", -- .addr = omap2420_uart2_addr_space, -+ .addr = omap2xxx_uart2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* L4 PER -> UART3 interface */ --static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { -- { -- .pa_start = OMAP2_UART3_BASE, -- .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_uart3_hwmod, - .clk = "uart3_ick", -- .addr = omap2420_uart3_addr_space, -+ .addr = omap2xxx_uart3_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - --/* I2C IP block address space length (in bytes) */ --#define OMAP2_I2C_AS_LEN 128 -- - /* L4 CORE -> I2C1 interface */ --static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { -- { -- .pa_start = 0x48070000, -- .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_i2c1_hwmod, - .clk = "i2c1_ick", -- .addr = omap2420_i2c1_addr_space, -+ .addr = omap2_i2c1_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* L4 CORE -> I2C2 interface */ --static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { -- { -- .pa_start = 0x48072000, -- .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_i2c2_hwmod, - .clk = "i2c2_ick", -- .addr = omap2420_i2c2_addr_space, -+ .addr = omap2_i2c2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { - { .irq = 38, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { -- { -- .pa_start = 0x4802a000, -- .pa_end = 0x4802a000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; - - /* l4_core -> timer2 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer2_hwmod, - .clk = "gpt2_ick", -- .addr = omap2420_timer2_addrs, -+ .addr = omap2xxx_timer2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { - { .irq = 39, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { -- { -- .pa_start = 0x48078000, -- .pa_end = 0x48078000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer3 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer3_hwmod, - .clk = "gpt3_ick", -- .addr = omap2420_timer3_addrs, -+ .addr = omap2xxx_timer3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { - { .irq = 40, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { -- { -- .pa_start = 0x4807a000, -- .pa_end = 0x4807a000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer4 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer4_hwmod, - .clk = "gpt4_ick", -- .addr = omap2420_timer4_addrs, -+ .addr = omap2xxx_timer4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { - { .irq = 41, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { -- { -- .pa_start = 0x4807c000, -- .pa_end = 0x4807c000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer5 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer5_hwmod, - .clk = "gpt5_ick", -- .addr = omap2420_timer5_addrs, -+ .addr = omap2xxx_timer5_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { - { .irq = 42, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { -- { -- .pa_start = 0x4807e000, -- .pa_end = 0x4807e000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer6 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer6_hwmod, - .clk = "gpt6_ick", -- .addr = omap2420_timer6_addrs, -+ .addr = omap2xxx_timer6_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { - { .irq = 43, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { -- { -- .pa_start = 0x48080000, -- .pa_end = 0x48080000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer7 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer7_hwmod, - .clk = "gpt7_ick", -- .addr = omap2420_timer7_addrs, -+ .addr = omap2xxx_timer7_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { - { .irq = 44, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { -- { -- .pa_start = 0x48082000, -- .pa_end = 0x48082000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer8 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer8_hwmod, - .clk = "gpt8_ick", -- .addr = omap2420_timer8_addrs, -+ .addr = omap2xxx_timer8_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { - { .irq = 45, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { -- { -- .pa_start = 0x48084000, -- .pa_end = 0x48084000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer9 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer9_hwmod, - .clk = "gpt9_ick", -- .addr = omap2420_timer9_addrs, -+ .addr = omap2xxx_timer9_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { - { .irq = 46, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { -- { -- .pa_start = 0x48086000, -- .pa_end = 0x48086000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer10 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer10_hwmod, - .clk = "gpt10_ick", -- .addr = omap2420_timer10_addrs, -+ .addr = omap2_timer10_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { - { .irq = 47, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { -- { -- .pa_start = 0x48088000, -- .pa_end = 0x48088000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer11 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer11_hwmod, - .clk = "gpt11_ick", -- .addr = omap2420_timer11_addrs, -+ .addr = omap2_timer11_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { - { .irq = 48, }, - }; - --static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { -- { -- .pa_start = 0x4808a000, -- .pa_end = 0x4808a000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer12 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_timer12_hwmod, - .clk = "gpt12_ick", -- .addr = omap2420_timer12_addrs, -+ .addr = omap2xxx_timer12_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { - &omap2420_dss__l3, - }; - --static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { -- { -- .pa_start = 0x48050000, -- .pa_end = 0x480503FF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss */ - static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_dss_core_hwmod, - .clk = "dss_ick", -- .addr = omap2420_dss_addrs, -+ .addr = omap2_dss_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, -@@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { - { .irq = 25 }, - }; - --static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { -- { -- .pa_start = 0x48050400, -- .pa_end = 0x480507FF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_dss_dispc_hwmod, - .clk = "dss_ick", -- .addr = omap2420_dss_dispc_addrs, -+ .addr = omap2_dss_dispc_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, -@@ -1332,21 +1150,12 @@ static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { - .sysc = &omap2420_rfbi_sysc, - }; - --static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { -- { -- .pa_start = 0x48050800, -- .pa_end = 0x48050BFF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_rfbi */ - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_dss_rfbi_hwmod, - .clk = "dss_ick", -- .addr = omap2420_dss_rfbi_addrs, -+ .addr = omap2_dss_rfbi_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, -@@ -1387,22 +1196,12 @@ static struct omap_hwmod_class omap2420_venc_hwmod_class = { - .name = "venc", - }; - --/* dss_venc */ --static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { -- { -- .pa_start = 0x48050C00, -- .pa_end = 0x48050FFF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_venc */ - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_dss_venc_hwmod, - .clk = "dss_54m_fck", -- .addr = omap2420_dss_venc_addrs, -+ .addr = omap2_dss_venc_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, -@@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ - }; - --static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { -- { -- .pa_start = 0x48056000, -- .pa_end = 0x48056fff, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* dma_system -> L3 */ - static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { - .master = &omap2420_dma_system_hwmod, -@@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_dma_system_hwmod, - .clk = "sdma_ick", -- .addr = omap2420_dma_system_addrs, -+ .addr = omap2_dma_system_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { - { .name = "iva", .irq = 34 }, - }; - --static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { -- { -- .pa_start = 0x48094000, -- .pa_end = 0x480941ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - /* l4_core -> mailbox */ - static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_mailbox_hwmod, -- .addr = omap2420_mailbox_addrs, -+ .addr = omap2_mailbox_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { - { .name = "tx", .dma_req = 31 }, - }; - --static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { -- { -- .name = "mpu", -- .pa_start = 0x48074000, -- .pa_end = 0x480740ff, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> mcbsp1 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_mcbsp1_hwmod, - .clk = "mcbsp1_ick", -- .addr = omap2420_mcbsp1_addrs, -+ .addr = omap2_mcbsp1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { - { .name = "tx", .dma_req = 33 }, - }; - --static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { -- { -- .name = "mpu", -- .pa_start = 0x48076000, -- .pa_end = 0x480760ff, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> mcbsp2 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { - .master = &omap2420_l4_core_hwmod, - .slave = &omap2420_mcbsp2_hwmod, - .clk = "mcbsp2_ick", -- .addr = omap2420_mcbsp2_addrs, -+ .addr = omap2xxx_mcbsp2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index da28794..9531ef2 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -131,42 +131,21 @@ static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { - .user = OCP_USER_MPU, - }; - --/* I2C IP block address space length (in bytes) */ --#define OMAP2_I2C_AS_LEN 128 -- - /* L4 CORE -> I2C1 interface */ --static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { -- { -- .pa_start = 0x48070000, -- .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_i2c1_hwmod, - .clk = "i2c1_ick", -- .addr = omap2430_i2c1_addr_space, -+ .addr = omap2_i2c1_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* L4 CORE -> I2C2 interface */ --static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { -- { -- .pa_start = 0x48072000, -- .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_i2c2_hwmod, - .clk = "i2c2_ick", -- .addr = omap2430_i2c2_addr_space, -+ .addr = omap2_i2c2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -178,56 +157,29 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { - }; - - /* L4 CORE -> UART1 interface */ --static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { -- { -- .pa_start = OMAP2_UART1_BASE, -- .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_uart1_hwmod, - .clk = "uart1_ick", -- .addr = omap2430_uart1_addr_space, -+ .addr = omap2xxx_uart1_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* L4 CORE -> UART2 interface */ --static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { -- { -- .pa_start = OMAP2_UART2_BASE, -- .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_uart2_hwmod, - .clk = "uart2_ick", -- .addr = omap2430_uart2_addr_space, -+ .addr = omap2xxx_uart2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* L4 PER -> UART3 interface */ --static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { -- { -- .pa_start = OMAP2_UART3_BASE, -- .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_uart3_hwmod, - .clk = "uart3_ick", -- .addr = omap2430_uart3_addr_space, -+ .addr = omap2xxx_uart3_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -260,15 +212,6 @@ static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = { - }; - - /* L4 CORE -> MMC1 interface */ --static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { -- { -- .pa_start = 0x4809c000, -- .pa_end = 0x4809c1ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mmc1_hwmod, -@@ -278,15 +221,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { - }; - - /* L4 CORE -> MMC2 interface */ --static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { -- { -- .pa_start = 0x480b4000, -- .pa_end = 0x480b41ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mmc2_hwmod, -@@ -332,51 +266,24 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { - }; - - /* l4 core -> mcspi1 interface */ --static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { -- { -- .pa_start = 0x48098000, -- .pa_end = 0x480980ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mcspi1_hwmod, - .clk = "mcspi1_ick", -- .addr = omap2430_mcspi1_addr_space, -+ .addr = omap2_mcspi1_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* l4 core -> mcspi2 interface */ --static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { -- { -- .pa_start = 0x4809a000, -- .pa_end = 0x4809a0ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mcspi2_hwmod, - .clk = "mcspi2_ick", -- .addr = omap2430_mcspi2_addr_space, -+ .addr = omap2_mcspi2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* l4 core -> mcspi3 interface */ --static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { -- { -- .pa_start = 0x480b8000, -- .pa_end = 0x480b80ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mcspi3_hwmod, -@@ -514,21 +421,12 @@ static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { - { .irq = 38, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { -- { -- .pa_start = 0x4802a000, -- .pa_end = 0x4802a000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer2 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer2_hwmod, - .clk = "gpt2_ick", -- .addr = omap2430_timer2_addrs, -+ .addr = omap2xxx_timer2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -564,21 +462,12 @@ static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { - { .irq = 39, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { -- { -- .pa_start = 0x48078000, -- .pa_end = 0x48078000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer3 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer3_hwmod, - .clk = "gpt3_ick", -- .addr = omap2430_timer3_addrs, -+ .addr = omap2xxx_timer3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -614,21 +503,12 @@ static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { - { .irq = 40, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { -- { -- .pa_start = 0x4807a000, -- .pa_end = 0x4807a000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer4 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer4_hwmod, - .clk = "gpt4_ick", -- .addr = omap2430_timer4_addrs, -+ .addr = omap2xxx_timer4_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -664,21 +544,12 @@ static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { - { .irq = 41, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { -- { -- .pa_start = 0x4807c000, -- .pa_end = 0x4807c000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer5 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer5_hwmod, - .clk = "gpt5_ick", -- .addr = omap2430_timer5_addrs, -+ .addr = omap2xxx_timer5_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -714,21 +585,12 @@ static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { - { .irq = 42, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { -- { -- .pa_start = 0x4807e000, -- .pa_end = 0x4807e000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer6 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer6_hwmod, - .clk = "gpt6_ick", -- .addr = omap2430_timer6_addrs, -+ .addr = omap2xxx_timer6_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -764,21 +626,12 @@ static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { - { .irq = 43, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { -- { -- .pa_start = 0x48080000, -- .pa_end = 0x48080000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer7 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer7_hwmod, - .clk = "gpt7_ick", -- .addr = omap2430_timer7_addrs, -+ .addr = omap2xxx_timer7_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -814,21 +667,12 @@ static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { - { .irq = 44, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { -- { -- .pa_start = 0x48082000, -- .pa_end = 0x48082000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer8 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer8_hwmod, - .clk = "gpt8_ick", -- .addr = omap2430_timer8_addrs, -+ .addr = omap2xxx_timer8_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -864,21 +708,12 @@ static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { - { .irq = 45, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { -- { -- .pa_start = 0x48084000, -- .pa_end = 0x48084000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer9 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer9_hwmod, - .clk = "gpt9_ick", -- .addr = omap2430_timer9_addrs, -+ .addr = omap2xxx_timer9_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -914,21 +749,12 @@ static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { - { .irq = 46, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { -- { -- .pa_start = 0x48086000, -- .pa_end = 0x48086000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer10 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer10_hwmod, - .clk = "gpt10_ick", -- .addr = omap2430_timer10_addrs, -+ .addr = omap2_timer10_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -964,21 +790,12 @@ static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { - { .irq = 47, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { -- { -- .pa_start = 0x48088000, -- .pa_end = 0x48088000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer11 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer11_hwmod, - .clk = "gpt11_ick", -- .addr = omap2430_timer11_addrs, -+ .addr = omap2_timer11_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1014,21 +831,12 @@ static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { - { .irq = 48, }, - }; - --static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { -- { -- .pa_start = 0x4808a000, -- .pa_end = 0x4808a000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer12 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_timer12_hwmod, - .clk = "gpt12_ick", -- .addr = omap2430_timer12_addrs, -+ .addr = omap2xxx_timer12_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1277,21 +1085,12 @@ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { - &omap2430_dss__l3, - }; - --static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { -- { -- .pa_start = 0x48050000, -- .pa_end = 0x480503FF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss */ - static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_dss_core_hwmod, - .clk = "dss_ick", -- .addr = omap2430_dss_addrs, -+ .addr = omap2_dss_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1355,21 +1154,12 @@ static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { - { .irq = 25 }, - }; - --static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { -- { -- .pa_start = 0x48050400, -- .pa_end = 0x480507FF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_dss_dispc_hwmod, - .clk = "dss_ick", -- .addr = omap2430_dss_dispc_addrs, -+ .addr = omap2_dss_dispc_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1419,21 +1209,12 @@ static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { - .sysc = &omap2430_rfbi_sysc, - }; - --static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { -- { -- .pa_start = 0x48050800, -- .pa_end = 0x48050BFF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_rfbi */ - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_dss_rfbi_hwmod, - .clk = "dss_ick", -- .addr = omap2430_dss_rfbi_addrs, -+ .addr = omap2_dss_rfbi_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1468,22 +1249,12 @@ static struct omap_hwmod_class omap2430_venc_hwmod_class = { - .name = "venc", - }; - --/* dss_venc */ --static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { -- { -- .pa_start = 0x48050C00, -- .pa_end = 0x48050FFF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_venc */ - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_dss_venc_hwmod, - .clk = "dss_54m_fck", -- .addr = omap2430_dss_venc_addrs, -+ .addr = omap2_dss_venc_addrs, - .flags = OCPIF_SWSUP_IDLE, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; -@@ -1916,15 +1687,6 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ - }; - --static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { -- { -- .pa_start = 0x48056000, -- .pa_end = 0x48056fff, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* dma_system -> L3 */ - static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { - .master = &omap2430_dma_system_hwmod, -@@ -1943,7 +1705,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_dma_system_hwmod, - .clk = "sdma_ick", -- .addr = omap2430_dma_system_addrs, -+ .addr = omap2_dma_system_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1994,20 +1756,11 @@ static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { - { .irq = 26 }, - }; - --static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { -- { -- .pa_start = 0x48094000, -- .pa_end = 0x480941ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - /* l4_core -> mailbox */ - static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mailbox_hwmod, -- .addr = omap2430_mailbox_addrs, -+ .addr = omap2_mailbox_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2279,22 +2032,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { - { .name = "tx", .dma_req = 31 }, - }; - --static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { -- { -- .name = "mpu", -- .pa_start = 0x48074000, -- .pa_end = 0x480740ff, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> mcbsp1 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mcbsp1_hwmod, - .clk = "mcbsp1_ick", -- .addr = omap2430_mcbsp1_addrs, -+ .addr = omap2_mcbsp1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2337,22 +2080,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { - { .name = "tx", .dma_req = 33 }, - }; - --static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { -- { -- .name = "mpu", -- .pa_start = 0x48076000, -- .pa_end = 0x480760ff, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> mcbsp2 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { - .master = &omap2430_l4_core_hwmod, - .slave = &omap2430_mcbsp2_hwmod, - .clk = "mcbsp2_ick", -- .addr = omap2430_mcbsp2_addrs, -+ .addr = omap2xxx_mcbsp2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c -new file mode 100644 -index 0000000..04637fa ---- /dev/null -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c -@@ -0,0 +1,173 @@ -+/* -+ * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3 -+ * -+ * Copyright (C) 2009-2011 Nokia Corporation -+ * Paul Walmsley -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * XXX handle crossbar/shared link difference for L3? -+ * XXX these should be marked initdata for multi-OMAP kernels -+ */ -+#include <asm/sizes.h> -+ -+#include <plat/omap_hwmod.h> -+#include <plat/serial.h> -+ -+#include "omap_hwmod_common_data.h" -+ -+struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { -+ { -+ .pa_start = 0x4809c000, -+ .pa_end = 0x4809c1ff, -+ .flags = ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { -+ { -+ .pa_start = 0x480b4000, -+ .pa_end = 0x480b41ff, -+ .flags = ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = { -+ { -+ .pa_start = 0x48070000, -+ .pa_end = 0x48070000 + SZ_128 - 1, -+ .flags = ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = { -+ { -+ .pa_start = 0x48072000, -+ .pa_end = 0x48072000 + SZ_128 - 1, -+ .flags = ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_dss_addrs[] = { -+ { -+ .pa_start = 0x48050000, -+ .pa_end = 0x48050000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = { -+ { -+ .pa_start = 0x48050400, -+ .pa_end = 0x48050400 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = { -+ { -+ .pa_start = 0x48050800, -+ .pa_end = 0x48050800 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = { -+ { -+ .pa_start = 0x48050C00, -+ .pa_end = 0x48050C00 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_timer10_addrs[] = { -+ { -+ .pa_start = 0x48086000, -+ .pa_end = 0x48086000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_timer11_addrs[] = { -+ { -+ .pa_start = 0x48088000, -+ .pa_end = 0x48088000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = { -+ { -+ .pa_start = 0x4808a000, -+ .pa_end = 0x4808a000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = { -+ { -+ .pa_start = 0x48098000, -+ .pa_end = 0x48098000 + SZ_256 - 1, -+ .flags = ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = { -+ { -+ .pa_start = 0x4809a000, -+ .pa_end = 0x4809a000 + SZ_256 - 1, -+ .flags = ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { -+ { -+ .pa_start = 0x480b8000, -+ .pa_end = 0x480b8000 + SZ_256 - 1, -+ .flags = ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_dma_system_addrs[] = { -+ { -+ .pa_start = 0x48056000, -+ .pa_end = 0x48056000 + SZ_4K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_mailbox_addrs[] = { -+ { -+ .pa_start = 0x48094000, -+ .pa_end = 0x48094000 + SZ_512 - 1, -+ .flags = ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = { -+ { -+ .name = "mpu", -+ .pa_start = 0x48074000, -+ .pa_end = 0x480740ff, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c -new file mode 100644 -index 0000000..4f3547c ---- /dev/null -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c -@@ -0,0 +1,130 @@ -+/* -+ * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx -+ * -+ * Copyright (C) 2009-2011 Nokia Corporation -+ * Paul Walmsley -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * XXX handle crossbar/shared link difference for L3? -+ * XXX these should be marked initdata for multi-OMAP kernels -+ */ -+#include <asm/sizes.h> -+ -+#include <plat/omap_hwmod.h> -+#include <plat/serial.h> -+ -+#include "omap_hwmod_common_data.h" -+ -+struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = { -+ { -+ .pa_start = OMAP2_UART1_BASE, -+ .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, -+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = { -+ { -+ .pa_start = OMAP2_UART2_BASE, -+ .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, -+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = { -+ { -+ .pa_start = OMAP2_UART3_BASE, -+ .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, -+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = { -+ { -+ .pa_start = 0x4802a000, -+ .pa_end = 0x4802a000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = { -+ { -+ .pa_start = 0x48078000, -+ .pa_end = 0x48078000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = { -+ { -+ .pa_start = 0x4807a000, -+ .pa_end = 0x4807a000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = { -+ { -+ .pa_start = 0x4807c000, -+ .pa_end = 0x4807c000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = { -+ { -+ .pa_start = 0x4807e000, -+ .pa_end = 0x4807e000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = { -+ { -+ .pa_start = 0x48080000, -+ .pa_end = 0x48080000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = { -+ { -+ .pa_start = 0x48082000, -+ .pa_end = 0x48082000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = { -+ { -+ .pa_start = 0x48084000, -+ .pa_end = 0x48084000 + SZ_1K - 1, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = { -+ { -+ .name = "mpu", -+ .pa_start = 0x48076000, -+ .pa_end = 0x480760ff, -+ .flags = ADDR_TYPE_RT -+ }, -+ { } -+}; -+ -+ -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 6410779..791f9b2 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -190,39 +190,21 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { - }; - - /* L4 CORE -> MMC1 interface */ --static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { -- { -- .pa_start = 0x4809c000, -- .pa_end = 0x4809c1ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_mmc1_hwmod, - .clk = "mmchs1_ick", -- .addr = omap3xxx_mmc1_addr_space, -+ .addr = omap2430_mmc1_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 - }; - - /* L4 CORE -> MMC2 interface */ --static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { -- { -- .pa_start = 0x480b4000, -- .pa_end = 0x480b41ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_mmc2_hwmod, - .clk = "mmchs2_ick", -- .addr = omap3xxx_mmc2_addr_space, -+ .addr = omap2430_mmc2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 - }; -@@ -318,24 +300,12 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - --/* I2C IP block address space length (in bytes) */ --#define OMAP2_I2C_AS_LEN 128 -- - /* L4 CORE -> I2C1 interface */ --static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { -- { -- .pa_start = 0x48070000, -- .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_i2c1_hwmod, - .clk = "i2c1_ick", -- .addr = omap3xxx_i2c1_addr_space, -+ .addr = omap2_i2c1_addr_space, - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, -@@ -347,20 +317,11 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { - }; - - /* L4 CORE -> I2C2 interface */ --static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { -- { -- .pa_start = 0x48072000, -- .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_i2c2_hwmod, - .clk = "i2c2_ick", -- .addr = omap3xxx_i2c2_addr_space, -+ .addr = omap2_i2c2_addr_space, - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, -@@ -375,7 +336,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { - static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { - { - .pa_start = 0x48060000, -- .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, -+ .pa_end = 0x48060000 + SZ_128 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -@@ -1065,21 +1026,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { - { .irq = 46, }, - }; - --static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { -- { -- .pa_start = 0x48086000, -- .pa_end = 0x48086000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer10 */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_timer10_hwmod, - .clk = "gpt10_ick", -- .addr = omap3xxx_timer10_addrs, -+ .addr = omap2_timer10_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1115,21 +1067,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { - { .irq = 47, }, - }; - --static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { -- { -- .pa_start = 0x48088000, -- .pa_end = 0x48088000 + SZ_1K - 1, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> timer11 */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_timer11_hwmod, - .clk = "gpt11_ick", -- .addr = omap3xxx_timer11_addrs, -+ .addr = omap2_timer11_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -1491,21 +1434,12 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = { - &omap3xxx_dss__l3, - }; - --static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { -- { -- .pa_start = 0x48050000, -- .pa_end = 0x480503FF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss */ - static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3430es1_dss_core_hwmod, - .clk = "dss_ick", -- .addr = omap3xxx_dss_addrs, -+ .addr = omap2_dss_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, -@@ -1520,7 +1454,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_dss_core_hwmod, - .clk = "dss_ick", -- .addr = omap3xxx_dss_addrs, -+ .addr = omap2_dss_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, -@@ -1625,21 +1559,12 @@ static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { - { .irq = 25 }, - }; - --static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { -- { -- .pa_start = 0x48050400, -- .pa_end = 0x480507FF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_dss_dispc_hwmod, - .clk = "dss_ick", -- .addr = omap3xxx_dss_dispc_addrs, -+ .addr = omap2_dss_dispc_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, -@@ -1760,21 +1685,12 @@ static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { - .sysc = &omap3xxx_rfbi_sysc, - }; - --static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { -- { -- .pa_start = 0x48050800, -- .pa_end = 0x48050BFF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_rfbi */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_dss_rfbi_hwmod, - .clk = "dss_ick", -- .addr = omap3xxx_dss_rfbi_addrs, -+ .addr = omap2_dss_rfbi_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, -@@ -1818,22 +1734,12 @@ static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { - .name = "venc", - }; - --/* dss_venc */ --static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { -- { -- .pa_start = 0x48050C00, -- .pa_end = 0x48050FFF, -- .flags = ADDR_TYPE_RT -- }, -- { } --}; -- - /* l4_core -> dss_venc */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_dss_venc_hwmod, - .clk = "dss_tv_fck", -- .addr = omap3xxx_dss_venc_addrs, -+ .addr = omap2_dss_venc_addrs, - .fw = { - .omap2 = { - .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, -@@ -3070,56 +2976,29 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { - }; - - /* l4 core -> mcspi1 interface */ --static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { -- { -- .pa_start = 0x48098000, -- .pa_end = 0x480980ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap34xx_mcspi1, - .clk = "mcspi1_ick", -- .addr = omap34xx_mcspi1_addr_space, -+ .addr = omap2_mcspi1_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* l4 core -> mcspi2 interface */ --static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { -- { -- .pa_start = 0x4809a000, -- .pa_end = 0x4809a0ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap34xx_mcspi2, - .clk = "mcspi2_ick", -- .addr = omap34xx_mcspi2_addr_space, -+ .addr = omap2_mcspi2_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - - /* l4 core -> mcspi3 interface */ --static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { -- { -- .pa_start = 0x480b8000, -- .pa_end = 0x480b80ff, -- .flags = ADDR_TYPE_RT, -- }, -- { } --}; -- - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap34xx_mcspi3, - .clk = "mcspi3_ick", -- .addr = omap34xx_mcspi3_addr_space, -+ .addr = omap2430_mcspi3_addr_space, - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h -index c34e98b..76a2f11 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.h -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h -@@ -1,10 +1,10 @@ - /* - * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations - * -- * Copyright (C) 2010 Nokia Corporation -+ * Copyright (C) 2010-2011 Nokia Corporation - * Paul Walmsley - * -- * Copyright (C) 2010 Texas Instruments, Inc. -+ * Copyright (C) 2010-2011 Texas Instruments, Inc. - * Benoît Cousson - * - * This program is free software; you can redistribute it and/or modify -@@ -16,10 +16,44 @@ - - #include <plat/omap_hwmod.h> - -+/* Common address space across OMAP2xxx */ -+extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[]; -+extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[]; -+extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[]; -+extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[]; -+ -+/* Common address space across OMAP2xxx/3xxx */ -+extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[]; -+extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[]; -+extern struct omap_hwmod_addr_space omap2_dss_addrs[]; -+extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[]; -+extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[]; -+extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[]; -+extern struct omap_hwmod_addr_space omap2_timer10_addrs[]; -+extern struct omap_hwmod_addr_space omap2_timer11_addrs[]; -+extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[]; -+extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[]; -+extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[]; -+extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[]; -+extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[]; -+extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; -+extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; -+extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; -+ - /* OMAP hwmod classes - forward declarations */ - extern struct omap_hwmod_class l3_hwmod_class; - extern struct omap_hwmod_class l4_hwmod_class; - extern struct omap_hwmod_class mpu_hwmod_class; - extern struct omap_hwmod_class iva_hwmod_class; - -+ - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch deleted file mode 100644 index b83e6df..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch +++ /dev/null @@ -1,2904 +0,0 @@ -From 75a125341387435415e8390130066d56178291ef Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sat, 9 Jul 2011 19:14:06 -0600 -Subject: [PATCH 039/149] omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays - -Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and -users of these arrays used the ARRAY_SIZE() macro to determine the -length of the array. However, ARRAY_SIZE() only works when the array -is in the same scope as the macro user. - -So far this hasn't been a problem. However, to reduce duplicated -data, a subsequent patch will move common data to a separate, shared -file. When this is done, ARRAY_SIZE() will no longer be usable. - -This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs -arrays and uses a sentinel value (irq == -1) as the array terminator -instead. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 56 ++++++------ - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 72 +++++++------- - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 92 +++++++++--------- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 127 +++++++++++++------------- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +- - 6 files changed, 205 insertions(+), 180 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 73599f0..b761968 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -679,6 +679,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) - } - - /** -+ * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh -+ * @oh: struct omap_hwmod *oh -+ * -+ * Count and return the number of MPU IRQs associated with the hwmod -+ * @oh. Used to allocate struct resource data. Returns 0 if @oh is -+ * NULL. -+ */ -+static int _count_mpu_irqs(struct omap_hwmod *oh) -+{ -+ struct omap_hwmod_irq_info *ohii; -+ int i = 0; -+ -+ if (!oh || !oh->mpu_irqs) -+ return 0; -+ -+ do { -+ ohii = &oh->mpu_irqs[i++]; -+ } while (ohii->irq != -1); -+ -+ return i; -+} -+ -+/** - * _count_ocp_if_addr_spaces - count the number of address space entries for @oh - * @oh: struct omap_hwmod *oh - * -@@ -1984,7 +2007,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) - { - int ret, i; - -- ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; -+ ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; - - for (i = 0; i < oh->slaves_cnt; i++) - ret += _count_ocp_if_addr_spaces(oh->slaves[i]); -@@ -2004,12 +2027,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) - */ - int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) - { -- int i, j; -+ int i, j, mpu_irqs_cnt; - int r = 0; - - /* For each IRQ, DMA, memory area, fill in array.*/ - -- for (i = 0; i < oh->mpu_irqs_cnt; i++) { -+ mpu_irqs_cnt = _count_mpu_irqs(oh); -+ for (i = 0; i < mpu_irqs_cnt; i++) { - (res + r)->name = (oh->mpu_irqs + i)->name; - (res + r)->start = (oh->mpu_irqs + i)->irq; - (res + r)->end = (oh->mpu_irqs + i)->irq; -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index 3ec625c..04730d3 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -296,6 +296,7 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { - static struct omap_hwmod omap2420_timer1_hwmod; - static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { - { .irq = 37, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { -@@ -325,7 +326,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { - static struct omap_hwmod omap2420_timer1_hwmod = { - .name = "timer1", - .mpu_irqs = omap2420_timer1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs), - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { -@@ -346,6 +346,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { - static struct omap_hwmod omap2420_timer2_hwmod; - static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { - { .irq = 38, }, -+ { .irq = -1 } - }; - - -@@ -367,7 +368,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { - static struct omap_hwmod omap2420_timer2_hwmod = { - .name = "timer2", - .mpu_irqs = omap2420_timer2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs), - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { -@@ -388,6 +388,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { - static struct omap_hwmod omap2420_timer3_hwmod; - static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { - { .irq = 39, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer3 */ -@@ -408,7 +409,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { - static struct omap_hwmod omap2420_timer3_hwmod = { - .name = "timer3", - .mpu_irqs = omap2420_timer3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs), - .main_clk = "gpt3_fck", - .prcm = { - .omap2 = { -@@ -429,6 +429,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { - static struct omap_hwmod omap2420_timer4_hwmod; - static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { - { .irq = 40, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer4 */ -@@ -449,7 +450,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { - static struct omap_hwmod omap2420_timer4_hwmod = { - .name = "timer4", - .mpu_irqs = omap2420_timer4_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs), - .main_clk = "gpt4_fck", - .prcm = { - .omap2 = { -@@ -470,6 +470,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { - static struct omap_hwmod omap2420_timer5_hwmod; - static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { - { .irq = 41, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer5 */ -@@ -490,7 +491,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { - static struct omap_hwmod omap2420_timer5_hwmod = { - .name = "timer5", - .mpu_irqs = omap2420_timer5_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs), - .main_clk = "gpt5_fck", - .prcm = { - .omap2 = { -@@ -512,6 +512,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { - static struct omap_hwmod omap2420_timer6_hwmod; - static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { - { .irq = 42, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer6 */ -@@ -532,7 +533,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { - static struct omap_hwmod omap2420_timer6_hwmod = { - .name = "timer6", - .mpu_irqs = omap2420_timer6_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs), - .main_clk = "gpt6_fck", - .prcm = { - .omap2 = { -@@ -553,6 +553,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { - static struct omap_hwmod omap2420_timer7_hwmod; - static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { - { .irq = 43, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer7 */ -@@ -573,7 +574,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { - static struct omap_hwmod omap2420_timer7_hwmod = { - .name = "timer7", - .mpu_irqs = omap2420_timer7_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs), - .main_clk = "gpt7_fck", - .prcm = { - .omap2 = { -@@ -594,6 +594,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { - static struct omap_hwmod omap2420_timer8_hwmod; - static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { - { .irq = 44, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer8 */ -@@ -614,7 +615,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { - static struct omap_hwmod omap2420_timer8_hwmod = { - .name = "timer8", - .mpu_irqs = omap2420_timer8_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs), - .main_clk = "gpt8_fck", - .prcm = { - .omap2 = { -@@ -635,6 +635,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { - static struct omap_hwmod omap2420_timer9_hwmod; - static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { - { .irq = 45, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer9 */ -@@ -655,7 +656,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { - static struct omap_hwmod omap2420_timer9_hwmod = { - .name = "timer9", - .mpu_irqs = omap2420_timer9_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs), - .main_clk = "gpt9_fck", - .prcm = { - .omap2 = { -@@ -676,6 +676,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { - static struct omap_hwmod omap2420_timer10_hwmod; - static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { - { .irq = 46, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer10 */ -@@ -696,7 +697,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { - static struct omap_hwmod omap2420_timer10_hwmod = { - .name = "timer10", - .mpu_irqs = omap2420_timer10_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs), - .main_clk = "gpt10_fck", - .prcm = { - .omap2 = { -@@ -717,6 +717,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { - static struct omap_hwmod omap2420_timer11_hwmod; - static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { - { .irq = 47, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer11 */ -@@ -737,7 +738,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { - static struct omap_hwmod omap2420_timer11_hwmod = { - .name = "timer11", - .mpu_irqs = omap2420_timer11_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs), - .main_clk = "gpt11_fck", - .prcm = { - .omap2 = { -@@ -758,6 +758,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { - static struct omap_hwmod omap2420_timer12_hwmod; - static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { - { .irq = 48, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer12 */ -@@ -778,7 +779,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { - static struct omap_hwmod omap2420_timer12_hwmod = { - .name = "timer12", - .mpu_irqs = omap2420_timer12_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs), - .main_clk = "gpt12_fck", - .prcm = { - .omap2 = { -@@ -879,6 +879,7 @@ static struct omap_hwmod_class uart_class = { - - static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { -@@ -893,7 +894,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { - static struct omap_hwmod omap2420_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), - .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", -@@ -916,6 +916,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { - - static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { -@@ -930,7 +931,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { - static struct omap_hwmod omap2420_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), - .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", -@@ -953,6 +953,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { - - static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { -@@ -967,7 +968,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { - static struct omap_hwmod omap2420_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), - .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", -@@ -1087,6 +1087,7 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { - - static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { - { .irq = 25 }, -+ { .irq = -1 } - }; - - /* l4_core -> dss_dispc */ -@@ -1113,7 +1114,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap2420_dispc_hwmod_class, - .mpu_irqs = omap2420_dispc_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), - .main_clk = "dss1_fck", - .prcm = { - .omap2 = { -@@ -1254,6 +1254,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; - - static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { -@@ -1268,7 +1269,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { - static struct omap_hwmod omap2420_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), - .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2c1_fck", -@@ -1293,6 +1293,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { - - static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { -@@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { - static struct omap_hwmod omap2420_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), - .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2c2_fck", -@@ -1430,6 +1430,7 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { - /* gpio1 */ - static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { -@@ -1440,7 +1441,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { - .name = "gpio1", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1461,6 +1461,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { - /* gpio2 */ - static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { -@@ -1471,7 +1472,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { - .name = "gpio2", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1492,6 +1492,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { - /* gpio3 */ - static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { -@@ -1502,7 +1503,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { - .name = "gpio3", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1523,6 +1523,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { - /* gpio4 */ - static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { -@@ -1533,7 +1534,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { - .name = "gpio4", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1580,6 +1580,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ -+ { .irq = -1 } - }; - - /* dma_system -> L3 */ -@@ -1613,7 +1614,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { - .name = "dma", - .class = &omap2420_dma_hwmod_class, - .mpu_irqs = omap2420_dma_system_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs), - .main_clk = "core_l3_ck", - .slaves = omap2420_dma_system_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), -@@ -1650,6 +1650,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod; - static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { - { .name = "dsp", .irq = 26 }, - { .name = "iva", .irq = 34 }, -+ { .irq = -1 } - }; - - /* l4_core -> mailbox */ -@@ -1669,7 +1670,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { - .name = "mailbox", - .class = &omap2420_mailbox_hwmod_class, - .mpu_irqs = omap2420_mailbox_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs), - .main_clk = "mailboxes_ick", - .prcm = { - .omap2 = { -@@ -1711,6 +1711,7 @@ static struct omap_hwmod_class omap2420_mcspi_class = { - /* mcspi1 */ - static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { - { .irq = 65 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { -@@ -1735,7 +1736,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - static struct omap_hwmod omap2420_mcspi1_hwmod = { - .name = "mcspi1_hwmod", - .mpu_irqs = omap2420_mcspi1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), - .sdma_reqs = omap2420_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", -@@ -1758,6 +1758,7 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { - /* mcspi2 */ - static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { - { .irq = 66 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { -@@ -1778,7 +1779,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - static struct omap_hwmod omap2420_mcspi2_hwmod = { - .name = "mcspi2_hwmod", - .mpu_irqs = omap2420_mcspi2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), - .sdma_reqs = omap2420_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", -@@ -1811,6 +1811,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { - static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { - { .name = "tx", .irq = 59 }, - { .name = "rx", .irq = 60 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { -@@ -1836,7 +1837,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { - .name = "mcbsp1", - .class = &omap2420_mcbsp_hwmod_class, - .mpu_irqs = omap2420_mcbsp1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs), - .sdma_reqs = omap2420_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), - .main_clk = "mcbsp1_fck", -@@ -1858,6 +1858,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { - static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { - { .name = "tx", .irq = 62 }, - { .name = "rx", .irq = 63 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { -@@ -1883,7 +1884,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { - .name = "mcbsp2", - .class = &omap2420_mcbsp_hwmod_class, - .mpu_irqs = omap2420_mcbsp2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs), - .sdma_reqs = omap2420_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), - .main_clk = "mcbsp2_fck", -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index 9531ef2..2c28468 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -369,6 +369,7 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { - static struct omap_hwmod omap2430_timer1_hwmod; - static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { - { .irq = 37, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { -@@ -398,7 +399,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { - static struct omap_hwmod omap2430_timer1_hwmod = { - .name = "timer1", - .mpu_irqs = omap2430_timer1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs), - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { -@@ -419,6 +419,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { - static struct omap_hwmod omap2430_timer2_hwmod; - static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { - { .irq = 38, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer2 */ -@@ -439,7 +440,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { - static struct omap_hwmod omap2430_timer2_hwmod = { - .name = "timer2", - .mpu_irqs = omap2430_timer2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs), - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { -@@ -460,6 +460,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { - static struct omap_hwmod omap2430_timer3_hwmod; - static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { - { .irq = 39, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer3 */ -@@ -480,7 +481,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { - static struct omap_hwmod omap2430_timer3_hwmod = { - .name = "timer3", - .mpu_irqs = omap2430_timer3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs), - .main_clk = "gpt3_fck", - .prcm = { - .omap2 = { -@@ -501,6 +501,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { - static struct omap_hwmod omap2430_timer4_hwmod; - static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { - { .irq = 40, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer4 */ -@@ -521,7 +522,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { - static struct omap_hwmod omap2430_timer4_hwmod = { - .name = "timer4", - .mpu_irqs = omap2430_timer4_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs), - .main_clk = "gpt4_fck", - .prcm = { - .omap2 = { -@@ -542,6 +542,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { - static struct omap_hwmod omap2430_timer5_hwmod; - static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { - { .irq = 41, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer5 */ -@@ -562,7 +563,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { - static struct omap_hwmod omap2430_timer5_hwmod = { - .name = "timer5", - .mpu_irqs = omap2430_timer5_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs), - .main_clk = "gpt5_fck", - .prcm = { - .omap2 = { -@@ -583,6 +583,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { - static struct omap_hwmod omap2430_timer6_hwmod; - static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { - { .irq = 42, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer6 */ -@@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { - static struct omap_hwmod omap2430_timer6_hwmod = { - .name = "timer6", - .mpu_irqs = omap2430_timer6_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs), - .main_clk = "gpt6_fck", - .prcm = { - .omap2 = { -@@ -624,6 +624,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { - static struct omap_hwmod omap2430_timer7_hwmod; - static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { - { .irq = 43, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer7 */ -@@ -644,7 +645,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { - static struct omap_hwmod omap2430_timer7_hwmod = { - .name = "timer7", - .mpu_irqs = omap2430_timer7_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs), - .main_clk = "gpt7_fck", - .prcm = { - .omap2 = { -@@ -665,6 +665,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { - static struct omap_hwmod omap2430_timer8_hwmod; - static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { - { .irq = 44, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer8 */ -@@ -685,7 +686,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { - static struct omap_hwmod omap2430_timer8_hwmod = { - .name = "timer8", - .mpu_irqs = omap2430_timer8_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs), - .main_clk = "gpt8_fck", - .prcm = { - .omap2 = { -@@ -706,6 +706,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { - static struct omap_hwmod omap2430_timer9_hwmod; - static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { - { .irq = 45, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer9 */ -@@ -726,7 +727,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { - static struct omap_hwmod omap2430_timer9_hwmod = { - .name = "timer9", - .mpu_irqs = omap2430_timer9_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs), - .main_clk = "gpt9_fck", - .prcm = { - .omap2 = { -@@ -747,6 +747,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { - static struct omap_hwmod omap2430_timer10_hwmod; - static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { - { .irq = 46, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer10 */ -@@ -767,7 +768,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { - static struct omap_hwmod omap2430_timer10_hwmod = { - .name = "timer10", - .mpu_irqs = omap2430_timer10_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs), - .main_clk = "gpt10_fck", - .prcm = { - .omap2 = { -@@ -788,6 +788,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { - static struct omap_hwmod omap2430_timer11_hwmod; - static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { - { .irq = 47, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer11 */ -@@ -808,7 +809,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { - static struct omap_hwmod omap2430_timer11_hwmod = { - .name = "timer11", - .mpu_irqs = omap2430_timer11_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs), - .main_clk = "gpt11_fck", - .prcm = { - .omap2 = { -@@ -829,6 +829,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { - static struct omap_hwmod omap2430_timer12_hwmod; - static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { - { .irq = 48, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer12 */ -@@ -849,7 +850,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { - static struct omap_hwmod omap2430_timer12_hwmod = { - .name = "timer12", - .mpu_irqs = omap2430_timer12_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs), - .main_clk = "gpt12_fck", - .prcm = { - .omap2 = { -@@ -950,6 +950,7 @@ static struct omap_hwmod_class uart_class = { - - static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { -@@ -964,7 +965,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { - static struct omap_hwmod omap2430_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), - .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", -@@ -987,6 +987,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { - - static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { -@@ -1001,7 +1002,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { - static struct omap_hwmod omap2430_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), - .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", -@@ -1024,6 +1024,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { - - static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { -@@ -1038,7 +1039,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { - static struct omap_hwmod omap2430_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), - .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", -@@ -1152,6 +1152,7 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { - - static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { - { .irq = 25 }, -+ { .irq = -1 } - }; - - /* l4_core -> dss_dispc */ -@@ -1172,7 +1173,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap2430_dispc_hwmod_class, - .mpu_irqs = omap2430_dispc_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), - .main_clk = "dss1_fck", - .prcm = { - .omap2 = { -@@ -1304,6 +1304,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { - - static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { -@@ -1318,7 +1319,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { - static struct omap_hwmod omap2430_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), - .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2chs1_fck", -@@ -1350,6 +1350,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { - - static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { -@@ -1364,7 +1365,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { - static struct omap_hwmod omap2430_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), - .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2chs2_fck", -@@ -1504,6 +1504,7 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { - /* gpio1 */ - static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { -@@ -1514,7 +1515,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { - .name = "gpio1", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1535,6 +1535,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { - /* gpio2 */ - static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { -@@ -1545,7 +1546,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { - .name = "gpio2", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1566,6 +1566,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { - /* gpio3 */ - static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { -@@ -1576,7 +1577,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { - .name = "gpio3", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1597,6 +1597,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { - /* gpio4 */ - static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { -@@ -1607,7 +1608,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { - .name = "gpio4", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1628,6 +1628,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { - /* gpio5 */ - static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { - { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { -@@ -1638,7 +1639,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { - .name = "gpio5", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio5_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), - .main_clk = "gpio5_fck", - .prcm = { - .omap2 = { -@@ -1685,6 +1685,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ -+ { .irq = -1 } - }; - - /* dma_system -> L3 */ -@@ -1718,7 +1719,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { - .name = "dma", - .class = &omap2430_dma_hwmod_class, - .mpu_irqs = omap2430_dma_system_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), - .main_clk = "core_l3_ck", - .slaves = omap2430_dma_system_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), -@@ -1754,6 +1754,7 @@ static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { - static struct omap_hwmod omap2430_mailbox_hwmod; - static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { - { .irq = 26 }, -+ { .irq = -1 } - }; - - /* l4_core -> mailbox */ -@@ -1773,7 +1774,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { - .name = "mailbox", - .class = &omap2430_mailbox_hwmod_class, - .mpu_irqs = omap2430_mailbox_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs), - .main_clk = "mailboxes_ick", - .prcm = { - .omap2 = { -@@ -1815,6 +1815,7 @@ static struct omap_hwmod_class omap2430_mcspi_class = { - /* mcspi1 */ - static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { - { .irq = 65 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { -@@ -1839,7 +1840,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - static struct omap_hwmod omap2430_mcspi1_hwmod = { - .name = "mcspi1_hwmod", - .mpu_irqs = omap2430_mcspi1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), - .sdma_reqs = omap2430_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", -@@ -1862,6 +1862,7 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { - /* mcspi2 */ - static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { - { .irq = 66 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { -@@ -1882,7 +1883,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - static struct omap_hwmod omap2430_mcspi2_hwmod = { - .name = "mcspi2_hwmod", - .mpu_irqs = omap2430_mcspi2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), - .sdma_reqs = omap2430_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", -@@ -1905,6 +1905,7 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { - /* mcspi3 */ - static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { - { .irq = 91 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { -@@ -1925,7 +1926,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { - static struct omap_hwmod omap2430_mcspi3_hwmod = { - .name = "mcspi3_hwmod", - .mpu_irqs = omap2430_mcspi3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), - .sdma_reqs = omap2430_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), - .main_clk = "mcspi3_fck", -@@ -1970,12 +1970,12 @@ static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { - - { .name = "mc", .irq = 92 }, - { .name = "dma", .irq = 93 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod omap2430_usbhsotg_hwmod = { - .name = "usb_otg_hs", - .mpu_irqs = omap2430_usbhsotg_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs), - .main_clk = "usbhs_ick", - .prcm = { - .omap2 = { -@@ -2025,6 +2025,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { - { .name = "rx", .irq = 60 }, - { .name = "ovr", .irq = 61 }, - { .name = "common", .irq = 64 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { -@@ -2050,7 +2051,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { - .name = "mcbsp1", - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs), - .sdma_reqs = omap2430_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), - .main_clk = "mcbsp1_fck", -@@ -2073,6 +2073,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { - { .name = "tx", .irq = 62 }, - { .name = "rx", .irq = 63 }, - { .name = "common", .irq = 16 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { -@@ -2098,7 +2099,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { - .name = "mcbsp2", - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs), - .sdma_reqs = omap2430_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), - .main_clk = "mcbsp2_fck", -@@ -2121,6 +2121,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { - { .name = "tx", .irq = 89 }, - { .name = "rx", .irq = 90 }, - { .name = "common", .irq = 17 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { -@@ -2156,7 +2157,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { - .name = "mcbsp3", - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs), - .sdma_reqs = omap2430_mcbsp3_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), - .main_clk = "mcbsp3_fck", -@@ -2179,6 +2179,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { - { .name = "tx", .irq = 54 }, - { .name = "rx", .irq = 55 }, - { .name = "common", .irq = 18 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { -@@ -2214,7 +2215,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { - .name = "mcbsp4", - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs), - .sdma_reqs = omap2430_mcbsp4_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), - .main_clk = "mcbsp4_fck", -@@ -2237,6 +2237,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { - { .name = "tx", .irq = 81 }, - { .name = "rx", .irq = 82 }, - { .name = "common", .irq = 19 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { -@@ -2272,7 +2273,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { - .name = "mcbsp5", - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp5_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs), - .sdma_reqs = omap2430_mcbsp5_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), - .main_clk = "mcbsp5_fck", -@@ -2312,6 +2312,7 @@ static struct omap_hwmod_class omap2430_mmc_class = { - - static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { - { .irq = 83 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { -@@ -2335,7 +2336,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { - .name = "mmc1", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap2430_mmc1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs), - .sdma_reqs = omap2430_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), - .opt_clks = omap2430_mmc1_opt_clks, -@@ -2361,6 +2361,7 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { - - static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { - { .irq = 86 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { -@@ -2380,7 +2381,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { - .name = "mmc2", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap2430_mmc2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs), - .sdma_reqs = omap2430_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), - .opt_clks = omap2430_mmc2_opt_clks, -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 791f9b2..cc178b5 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = { - static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = { - { .irq = INT_34XX_L3_DBG_IRQ }, - { .irq = INT_34XX_L3_APP_IRQ }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { -@@ -151,7 +152,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = { - .name = "l3_main", - .class = &l3_hwmod_class, - .mpu_irqs = omap3xxx_l3_main_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_l3_main_irqs), - .masters = omap3xxx_l3_main_masters, - .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), - .slaves = omap3xxx_l3_main_slaves, -@@ -574,6 +574,7 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { - static struct omap_hwmod omap3xxx_timer1_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { - { .irq = 37, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { -@@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { - static struct omap_hwmod omap3xxx_timer1_hwmod = { - .name = "timer1", - .mpu_irqs = omap3xxx_timer1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs), - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { -@@ -624,6 +624,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { - static struct omap_hwmod omap3xxx_timer2_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { - { .irq = 38, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { -@@ -653,7 +654,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { - static struct omap_hwmod omap3xxx_timer2_hwmod = { - .name = "timer2", - .mpu_irqs = omap3xxx_timer2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs), - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { -@@ -674,6 +674,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { - static struct omap_hwmod omap3xxx_timer3_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { - { .irq = 39, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { -@@ -703,7 +704,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { - static struct omap_hwmod omap3xxx_timer3_hwmod = { - .name = "timer3", - .mpu_irqs = omap3xxx_timer3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs), - .main_clk = "gpt3_fck", - .prcm = { - .omap2 = { -@@ -724,6 +724,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { - static struct omap_hwmod omap3xxx_timer4_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { - { .irq = 40, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { -@@ -753,7 +754,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { - static struct omap_hwmod omap3xxx_timer4_hwmod = { - .name = "timer4", - .mpu_irqs = omap3xxx_timer4_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs), - .main_clk = "gpt4_fck", - .prcm = { - .omap2 = { -@@ -774,6 +774,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { - static struct omap_hwmod omap3xxx_timer5_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { - { .irq = 41, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { -@@ -803,7 +804,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { - static struct omap_hwmod omap3xxx_timer5_hwmod = { - .name = "timer5", - .mpu_irqs = omap3xxx_timer5_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs), - .main_clk = "gpt5_fck", - .prcm = { - .omap2 = { -@@ -824,6 +824,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { - static struct omap_hwmod omap3xxx_timer6_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { - { .irq = 42, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { -@@ -853,7 +854,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { - static struct omap_hwmod omap3xxx_timer6_hwmod = { - .name = "timer6", - .mpu_irqs = omap3xxx_timer6_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs), - .main_clk = "gpt6_fck", - .prcm = { - .omap2 = { -@@ -874,6 +874,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { - static struct omap_hwmod omap3xxx_timer7_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { - { .irq = 43, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { -@@ -903,7 +904,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { - static struct omap_hwmod omap3xxx_timer7_hwmod = { - .name = "timer7", - .mpu_irqs = omap3xxx_timer7_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs), - .main_clk = "gpt7_fck", - .prcm = { - .omap2 = { -@@ -924,6 +924,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { - static struct omap_hwmod omap3xxx_timer8_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { - { .irq = 44, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { -@@ -953,7 +954,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { - static struct omap_hwmod omap3xxx_timer8_hwmod = { - .name = "timer8", - .mpu_irqs = omap3xxx_timer8_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs), - .main_clk = "gpt8_fck", - .prcm = { - .omap2 = { -@@ -974,6 +974,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { - static struct omap_hwmod omap3xxx_timer9_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { - { .irq = 45, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { -@@ -1003,7 +1004,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { - static struct omap_hwmod omap3xxx_timer9_hwmod = { - .name = "timer9", - .mpu_irqs = omap3xxx_timer9_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs), - .main_clk = "gpt9_fck", - .prcm = { - .omap2 = { -@@ -1024,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { - static struct omap_hwmod omap3xxx_timer10_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { - { .irq = 46, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer10 */ -@@ -1044,7 +1045,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { - static struct omap_hwmod omap3xxx_timer10_hwmod = { - .name = "timer10", - .mpu_irqs = omap3xxx_timer10_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs), - .main_clk = "gpt10_fck", - .prcm = { - .omap2 = { -@@ -1065,6 +1065,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { - static struct omap_hwmod omap3xxx_timer11_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { - { .irq = 47, }, -+ { .irq = -1 } - }; - - /* l4_core -> timer11 */ -@@ -1085,7 +1086,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { - static struct omap_hwmod omap3xxx_timer11_hwmod = { - .name = "timer11", - .mpu_irqs = omap3xxx_timer11_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs), - .main_clk = "gpt11_fck", - .prcm = { - .omap2 = { -@@ -1106,6 +1106,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { - static struct omap_hwmod omap3xxx_timer12_hwmod; - static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = { - { .irq = 95, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { -@@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = { - static struct omap_hwmod omap3xxx_timer12_hwmod = { - .name = "timer12", - .mpu_irqs = omap3xxx_timer12_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs), - .main_clk = "gpt12_fck", - .prcm = { - .omap2 = { -@@ -1256,6 +1256,7 @@ static struct omap_hwmod_class uart_class = { - - static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { -@@ -1270,7 +1271,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { - static struct omap_hwmod omap3xxx_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), - .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", -@@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { - - static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { -@@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { - static struct omap_hwmod omap3xxx_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), - .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", -@@ -1330,6 +1330,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { - - static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { -@@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { - static struct omap_hwmod omap3xxx_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), - .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", -@@ -1367,6 +1367,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { - - static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { - { .irq = INT_36XX_UART4_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { -@@ -1381,7 +1382,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { - static struct omap_hwmod omap3xxx_uart4_hwmod = { - .name = "uart4", - .mpu_irqs = uart4_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs), - .sdma_reqs = uart4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), - .main_clk = "uart4_fck", -@@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { - - static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { - { .irq = 25 }, -+ { .irq = -1 } - }; - - /* l4_core -> dss_dispc */ -@@ -1584,7 +1585,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap3xxx_dispc_hwmod_class, - .mpu_irqs = omap3xxx_dispc_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs), - .main_clk = "dss1_alwon_fck", - .prcm = { - .omap2 = { -@@ -1612,6 +1612,7 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = { - - static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { - { .irq = 25 }, -+ { .irq = -1 } - }; - - /* dss_dsi1 */ -@@ -1648,7 +1649,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { - .name = "dss_dsi1", - .class = &omap3xxx_dsi_hwmod_class, - .mpu_irqs = omap3xxx_dsi1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs), - .main_clk = "dss1_alwon_fck", - .prcm = { - .omap2 = { -@@ -1783,6 +1783,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { - - static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { -@@ -1797,7 +1798,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { - static struct omap_hwmod omap3xxx_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), - .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2c1_fck", -@@ -1825,6 +1825,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { - - static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { -@@ -1839,7 +1840,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { - static struct omap_hwmod omap3xxx_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), - .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2c2_fck", -@@ -1867,6 +1867,7 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = { - - static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { - { .irq = INT_34XX_I2C3_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { -@@ -1881,7 +1882,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { - static struct omap_hwmod omap3xxx_i2c3_hwmod = { - .name = "i2c3", - .mpu_irqs = i2c3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs), - .sdma_reqs = i2c3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), - .main_clk = "i2c3_fck", -@@ -2034,6 +2034,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { - /* gpio1 */ - static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { - { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { -@@ -2048,7 +2049,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { - .name = "gpio1", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), - .main_clk = "gpio1_ick", - .opt_clks = gpio1_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), -@@ -2071,6 +2071,7 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { - /* gpio2 */ - static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { - { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { -@@ -2085,7 +2086,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { - .name = "gpio2", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), - .main_clk = "gpio2_ick", - .opt_clks = gpio2_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), -@@ -2108,6 +2108,7 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { - /* gpio3 */ - static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { - { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { -@@ -2122,7 +2123,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { - .name = "gpio3", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), - .main_clk = "gpio3_ick", - .opt_clks = gpio3_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), -@@ -2145,6 +2145,7 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { - /* gpio4 */ - static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { - { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { -@@ -2159,7 +2160,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { - .name = "gpio4", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), - .main_clk = "gpio4_ick", - .opt_clks = gpio4_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), -@@ -2182,6 +2182,7 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { - /* gpio5 */ - static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = { - { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { -@@ -2196,7 +2197,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { - .name = "gpio5", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio5_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), - .main_clk = "gpio5_ick", - .opt_clks = gpio5_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), -@@ -2219,6 +2219,7 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { - /* gpio6 */ - static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = { - { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { -@@ -2233,7 +2234,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = { - .name = "gpio6", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio6_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), - .main_clk = "gpio6_ick", - .opt_clks = gpio6_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), -@@ -2292,6 +2292,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { -@@ -2326,7 +2327,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = { - .name = "dma", - .class = &omap3xxx_dma_hwmod_class, - .mpu_irqs = omap3xxx_dma_system_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs), - .main_clk = "core_l3_ick", - .prcm = { - .omap2 = { -@@ -2371,6 +2371,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { - { .name = "irq", .irq = 16 }, - { .name = "tx", .irq = 59 }, - { .name = "rx", .irq = 60 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { -@@ -2406,7 +2407,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { - .name = "mcbsp1", - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs), - .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), - .main_clk = "mcbsp1_fck", -@@ -2429,6 +2429,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { - { .name = "irq", .irq = 17 }, - { .name = "tx", .irq = 62 }, - { .name = "rx", .irq = 63 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { -@@ -2469,7 +2470,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { - .name = "mcbsp2", - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs), - .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), - .main_clk = "mcbsp2_fck", -@@ -2493,6 +2493,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { - { .name = "irq", .irq = 22 }, - { .name = "tx", .irq = 89 }, - { .name = "rx", .irq = 90 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { -@@ -2532,7 +2533,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { - .name = "mcbsp3", - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs), - .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), - .main_clk = "mcbsp3_fck", -@@ -2556,6 +2556,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { - { .name = "irq", .irq = 23 }, - { .name = "tx", .irq = 54 }, - { .name = "rx", .irq = 55 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { -@@ -2591,7 +2592,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { - .name = "mcbsp4", - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs), - .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), - .main_clk = "mcbsp4_fck", -@@ -2614,6 +2614,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { - { .name = "irq", .irq = 27 }, - { .name = "tx", .irq = 81 }, - { .name = "rx", .irq = 82 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { -@@ -2649,7 +2650,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { - .name = "mcbsp5", - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp5_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs), - .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), - .main_clk = "mcbsp5_fck", -@@ -2682,6 +2682,7 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = { - /* mcbsp2_sidetone */ - static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { - { .name = "irq", .irq = 4 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { -@@ -2712,7 +2713,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { - .name = "mcbsp2_sidetone", - .class = &omap3xxx_mcbsp_sidetone_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs), - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { -@@ -2731,6 +2731,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { - /* mcbsp3_sidetone */ - static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { - { .name = "irq", .irq = 5 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { -@@ -2761,7 +2762,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { - .name = "mcbsp3_sidetone", - .class = &omap3xxx_mcbsp_sidetone_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs), - .main_clk = "mcbsp3_fck", - .prcm = { - .omap2 = { -@@ -2931,6 +2931,7 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = { - static struct omap_hwmod omap3xxx_mailbox_hwmod; - static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { - { .irq = 26 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { -@@ -2959,7 +2960,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { - .name = "mailbox", - .class = &omap3xxx_mailbox_hwmod_class, - .mpu_irqs = omap3xxx_mailbox_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mailbox_irqs), - .main_clk = "mailboxes_ick", - .prcm = { - .omap2 = { -@@ -3046,6 +3046,7 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { - /* mcspi1 */ - static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { - { .name = "irq", .irq = 65 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { -@@ -3070,7 +3071,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - static struct omap_hwmod omap34xx_mcspi1 = { - .name = "mcspi1", - .mpu_irqs = omap34xx_mcspi1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs), - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", -@@ -3093,6 +3093,7 @@ static struct omap_hwmod omap34xx_mcspi1 = { - /* mcspi2 */ - static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { - { .name = "irq", .irq = 66 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { -@@ -3113,7 +3114,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - static struct omap_hwmod omap34xx_mcspi2 = { - .name = "mcspi2", - .mpu_irqs = omap34xx_mcspi2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs), - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", -@@ -3136,6 +3136,7 @@ static struct omap_hwmod omap34xx_mcspi2 = { - /* mcspi3 */ - static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = { - { .name = "irq", .irq = 91 }, /* 91 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { -@@ -3156,7 +3157,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { - static struct omap_hwmod omap34xx_mcspi3 = { - .name = "mcspi3", - .mpu_irqs = omap34xx_mcspi3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs), - .sdma_reqs = omap34xx_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), - .main_clk = "mcspi3_fck", -@@ -3179,6 +3179,7 @@ static struct omap_hwmod omap34xx_mcspi3 = { - /* SPI4 */ - static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { - { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */ -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { -@@ -3197,7 +3198,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = { - static struct omap_hwmod omap34xx_mcspi4 = { - .name = "mcspi4", - .mpu_irqs = omap34xx_mcspi4_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs), - .sdma_reqs = omap34xx_mcspi4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), - .main_clk = "mcspi4_fck", -@@ -3241,12 +3241,12 @@ static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = { - - { .name = "mc", .irq = 92 }, - { .name = "dma", .irq = 93 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { - .name = "usb_otg_hs", - .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs), - .main_clk = "hsotgusb_ick", - .prcm = { - .omap2 = { -@@ -3278,6 +3278,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { - static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { - - { .name = "mc", .irq = 71 }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_class am35xx_usbotg_class = { -@@ -3288,7 +3289,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = { - static struct omap_hwmod am35xx_usbhsotg_hwmod = { - .name = "am35x_otg_hs", - .mpu_irqs = am35xx_usbhsotg_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs), - .main_clk = NULL, - .prcm = { - .omap2 = { -@@ -3324,6 +3324,7 @@ static struct omap_hwmod_class omap34xx_mmc_class = { - - static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { - { .irq = 83, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { -@@ -3346,7 +3347,6 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = { - static struct omap_hwmod omap3xxx_mmc1_hwmod = { - .name = "mmc1", - .mpu_irqs = omap34xx_mmc1_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs), - .sdma_reqs = omap34xx_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), - .opt_clks = omap34xx_mmc1_opt_clks, -@@ -3372,6 +3372,7 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { - - static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { - { .irq = INT_24XX_MMC2_IRQ, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { -@@ -3390,7 +3391,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = { - static struct omap_hwmod omap3xxx_mmc2_hwmod = { - .name = "mmc2", - .mpu_irqs = omap34xx_mmc2_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs), - .sdma_reqs = omap34xx_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), - .opt_clks = omap34xx_mmc2_opt_clks, -@@ -3415,6 +3415,7 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { - - static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { - { .irq = 94, }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { -@@ -3433,7 +3434,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = { - static struct omap_hwmod omap3xxx_mmc3_hwmod = { - .name = "mmc3", - .mpu_irqs = omap34xx_mmc3_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs), - .sdma_reqs = omap34xx_mmc3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), - .opt_clks = omap34xx_mmc3_opt_clks, -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index f8ccc4a..f7ff937 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -115,6 +115,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { - - static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { - { .irq = 113 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod omap44xx_dmm_hwmod = { -@@ -123,7 +124,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { - .slaves = omap44xx_dmm_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), - .mpu_irqs = omap44xx_dmm_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmm_irqs), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -@@ -268,6 +268,7 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { - static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { - { .irq = 9 + OMAP44XX_IRQ_GIC_START }, - { .irq = 10 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { -@@ -303,7 +304,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { - .name = "l3_main_1", - .class = &omap44xx_l3_hwmod_class, - .mpu_irqs = omap44xx_l3_targ_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs), - .slaves = omap44xx_l3_main_1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -673,6 +673,7 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = { - /* aess */ - static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = { - { .irq = 99 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { -@@ -737,7 +738,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { - .name = "aess", - .class = &omap44xx_aess_hwmod_class, - .mpu_irqs = omap44xx_aess_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs), - .sdma_reqs = omap44xx_aess_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), - .main_clk = "aess_fck", -@@ -876,6 +876,7 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = { - { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START }, - { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START }, - { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - /* dma_system master ports */ -@@ -910,7 +911,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { - .name = "dma_system", - .class = &omap44xx_dma_hwmod_class, - .mpu_irqs = omap44xx_dma_system_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs), - .main_clk = "l3_div_ck", - .prcm = { - .omap4 = { -@@ -949,6 +949,7 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = { - static struct omap_hwmod omap44xx_dmic_hwmod; - static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { - { .irq = 114 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { -@@ -1001,7 +1002,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { - .name = "dmic", - .class = &omap44xx_dmic_hwmod_class, - .mpu_irqs = omap44xx_dmic_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs), - .sdma_reqs = omap44xx_dmic_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), - .main_clk = "dmic_fck", -@@ -1027,6 +1027,7 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = { - /* dsp */ - static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = { - { .irq = 28 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = { -@@ -1083,7 +1084,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { - .name = "dsp", - .class = &omap44xx_dsp_hwmod_class, - .mpu_irqs = omap44xx_dsp_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs), - .rst_lines = omap44xx_dsp_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), - .main_clk = "dsp_fck", -@@ -1216,6 +1216,7 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = { - static struct omap_hwmod omap44xx_dss_dispc_hwmod; - static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { - { .irq = 25 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { -@@ -1268,7 +1269,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap44xx_dispc_hwmod_class, - .mpu_irqs = omap44xx_dss_dispc_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs), - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), - .main_clk = "dss_fck", -@@ -1307,6 +1307,7 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = { - static struct omap_hwmod omap44xx_dss_dsi1_hwmod; - static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { - { .irq = 53 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { -@@ -1359,7 +1360,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - .name = "dss_dsi1", - .class = &omap44xx_dsi_hwmod_class, - .mpu_irqs = omap44xx_dss_dsi1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs), - .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), - .main_clk = "dss_fck", -@@ -1377,6 +1377,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - static struct omap_hwmod omap44xx_dss_dsi2_hwmod; - static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { - { .irq = 84 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { -@@ -1429,7 +1430,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { - .name = "dss_dsi2", - .class = &omap44xx_dsi_hwmod_class, - .mpu_irqs = omap44xx_dss_dsi2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs), - .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), - .main_clk = "dss_fck", -@@ -1467,6 +1467,7 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = { - static struct omap_hwmod omap44xx_dss_hdmi_hwmod; - static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { - { .irq = 101 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { -@@ -1519,7 +1520,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { - .name = "dss_hdmi", - .class = &omap44xx_hdmi_hwmod_class, - .mpu_irqs = omap44xx_dss_hdmi_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs), - .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), - .main_clk = "dss_fck", -@@ -1717,6 +1717,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { - static struct omap_hwmod omap44xx_gpio1_hwmod; - static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = { - { .irq = 29 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { -@@ -1750,7 +1751,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { - .name = "gpio1", - .class = &omap44xx_gpio_hwmod_class, - .mpu_irqs = omap44xx_gpio1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs), - .main_clk = "gpio1_ick", - .prcm = { - .omap4 = { -@@ -1769,6 +1769,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { - static struct omap_hwmod omap44xx_gpio2_hwmod; - static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = { - { .irq = 30 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { -@@ -1803,7 +1804,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { - .class = &omap44xx_gpio_hwmod_class, - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs), - .main_clk = "gpio2_ick", - .prcm = { - .omap4 = { -@@ -1822,6 +1822,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { - static struct omap_hwmod omap44xx_gpio3_hwmod; - static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = { - { .irq = 31 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { -@@ -1856,7 +1857,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { - .class = &omap44xx_gpio_hwmod_class, - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs), - .main_clk = "gpio3_ick", - .prcm = { - .omap4 = { -@@ -1875,6 +1875,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { - static struct omap_hwmod omap44xx_gpio4_hwmod; - static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = { - { .irq = 32 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { -@@ -1909,7 +1910,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { - .class = &omap44xx_gpio_hwmod_class, - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs), - .main_clk = "gpio4_ick", - .prcm = { - .omap4 = { -@@ -1928,6 +1928,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { - static struct omap_hwmod omap44xx_gpio5_hwmod; - static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = { - { .irq = 33 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { -@@ -1962,7 +1963,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { - .class = &omap44xx_gpio_hwmod_class, - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio5_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs), - .main_clk = "gpio5_ick", - .prcm = { - .omap4 = { -@@ -1981,6 +1981,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { - static struct omap_hwmod omap44xx_gpio6_hwmod; - static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = { - { .irq = 34 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { -@@ -2015,7 +2016,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { - .class = &omap44xx_gpio_hwmod_class, - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio6_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs), - .main_clk = "gpio6_ick", - .prcm = { - .omap4 = { -@@ -2059,6 +2059,7 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = { - { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START }, - { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START }, - { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - /* hsi master ports */ -@@ -2093,7 +2094,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { - .name = "hsi", - .class = &omap44xx_hsi_hwmod_class, - .mpu_irqs = omap44xx_hsi_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs), - .main_clk = "hsi_fck", - .prcm = { - .omap4 = { -@@ -2132,6 +2132,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { - static struct omap_hwmod omap44xx_i2c1_hwmod; - static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { - { .irq = 56 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { -@@ -2167,7 +2168,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { - .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs), - .sdma_reqs = omap44xx_i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), - .main_clk = "i2c1_fck", -@@ -2185,6 +2185,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { - static struct omap_hwmod omap44xx_i2c2_hwmod; - static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { - { .irq = 57 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { -@@ -2220,7 +2221,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { - .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs), - .sdma_reqs = omap44xx_i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), - .main_clk = "i2c2_fck", -@@ -2238,6 +2238,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { - static struct omap_hwmod omap44xx_i2c3_hwmod; - static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { - { .irq = 61 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { -@@ -2273,7 +2274,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { - .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs), - .sdma_reqs = omap44xx_i2c3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), - .main_clk = "i2c3_fck", -@@ -2291,6 +2291,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { - static struct omap_hwmod omap44xx_i2c4_hwmod; - static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { - { .irq = 62 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { -@@ -2326,7 +2327,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { - .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs), - .sdma_reqs = omap44xx_i2c4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), - .main_clk = "i2c4_fck", -@@ -2352,6 +2352,7 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = { - /* ipu */ - static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = { - { .irq = 100 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = { -@@ -2418,7 +2419,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { - .name = "ipu", - .class = &omap44xx_ipu_hwmod_class, - .mpu_irqs = omap44xx_ipu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs), - .rst_lines = omap44xx_ipu_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), - .main_clk = "ipu_fck", -@@ -2459,6 +2459,7 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = { - /* iss */ - static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = { - { .irq = 24 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { -@@ -2504,7 +2505,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { - .name = "iss", - .class = &omap44xx_iss_hwmod_class, - .mpu_irqs = omap44xx_iss_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs), - .sdma_reqs = omap44xx_iss_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), - .main_clk = "iss_fck", -@@ -2536,6 +2536,7 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = { - { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START }, - { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START }, - { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_rst_info omap44xx_iva_resets[] = { -@@ -2614,7 +2615,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = { - .name = "iva", - .class = &omap44xx_iva_hwmod_class, - .mpu_irqs = omap44xx_iva_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs), - .rst_lines = omap44xx_iva_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), - .main_clk = "iva_fck", -@@ -2657,6 +2657,7 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = { - static struct omap_hwmod omap44xx_kbd_hwmod; - static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = { - { .irq = 120 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { -@@ -2686,7 +2687,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { - .name = "kbd", - .class = &omap44xx_kbd_hwmod_class, - .mpu_irqs = omap44xx_kbd_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs), - .main_clk = "kbd_fck", - .prcm = { - .omap4 = { -@@ -2722,6 +2722,7 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = { - static struct omap_hwmod omap44xx_mailbox_hwmod; - static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { - { .irq = 26 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { -@@ -2751,7 +2752,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { - .name = "mailbox", - .class = &omap44xx_mailbox_hwmod_class, - .mpu_irqs = omap44xx_mailbox_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs), - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, -@@ -2785,6 +2785,7 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = { - static struct omap_hwmod omap44xx_mcbsp1_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { - { .irq = 17 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { -@@ -2840,7 +2841,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { - .name = "mcbsp1", - .class = &omap44xx_mcbsp_hwmod_class, - .mpu_irqs = omap44xx_mcbsp1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs), - .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), - .main_clk = "mcbsp1_fck", -@@ -2858,6 +2858,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { - static struct omap_hwmod omap44xx_mcbsp2_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { - { .irq = 22 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { -@@ -2913,7 +2914,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { - .name = "mcbsp2", - .class = &omap44xx_mcbsp_hwmod_class, - .mpu_irqs = omap44xx_mcbsp2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs), - .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), - .main_clk = "mcbsp2_fck", -@@ -2931,6 +2931,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { - static struct omap_hwmod omap44xx_mcbsp3_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { - { .irq = 23 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { -@@ -2986,7 +2987,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { - .name = "mcbsp3", - .class = &omap44xx_mcbsp_hwmod_class, - .mpu_irqs = omap44xx_mcbsp3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs), - .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), - .main_clk = "mcbsp3_fck", -@@ -3004,6 +3004,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { - static struct omap_hwmod omap44xx_mcbsp4_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { - { .irq = 16 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { -@@ -3038,7 +3039,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { - .name = "mcbsp4", - .class = &omap44xx_mcbsp_hwmod_class, - .mpu_irqs = omap44xx_mcbsp4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs), - .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), - .main_clk = "mcbsp4_fck", -@@ -3077,6 +3077,7 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = { - static struct omap_hwmod omap44xx_mcpdm_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { - { .irq = 112 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { -@@ -3130,7 +3131,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { - .name = "mcpdm", - .class = &omap44xx_mcpdm_hwmod_class, - .mpu_irqs = omap44xx_mcpdm_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs), - .sdma_reqs = omap44xx_mcpdm_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), - .main_clk = "mcpdm_fck", -@@ -3170,6 +3170,7 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = { - static struct omap_hwmod omap44xx_mcspi1_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = { - { .irq = 65 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { -@@ -3215,7 +3216,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { - .name = "mcspi1", - .class = &omap44xx_mcspi_hwmod_class, - .mpu_irqs = omap44xx_mcspi1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs), - .sdma_reqs = omap44xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", -@@ -3234,6 +3234,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { - static struct omap_hwmod omap44xx_mcspi2_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = { - { .irq = 66 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { -@@ -3275,7 +3276,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { - .name = "mcspi2", - .class = &omap44xx_mcspi_hwmod_class, - .mpu_irqs = omap44xx_mcspi2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs), - .sdma_reqs = omap44xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", -@@ -3294,6 +3294,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { - static struct omap_hwmod omap44xx_mcspi3_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = { - { .irq = 91 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { -@@ -3335,7 +3336,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { - .name = "mcspi3", - .class = &omap44xx_mcspi_hwmod_class, - .mpu_irqs = omap44xx_mcspi3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs), - .sdma_reqs = omap44xx_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), - .main_clk = "mcspi3_fck", -@@ -3354,6 +3354,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { - static struct omap_hwmod omap44xx_mcspi4_hwmod; - static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { - { .irq = 48 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { -@@ -3393,7 +3394,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { - .name = "mcspi4", - .class = &omap44xx_mcspi_hwmod_class, - .mpu_irqs = omap44xx_mcspi4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs), - .sdma_reqs = omap44xx_mcspi4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), - .main_clk = "mcspi4_fck", -@@ -3434,6 +3434,7 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { - - static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { - { .irq = 83 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { -@@ -3478,7 +3479,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { - .name = "mmc1", - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs), - .sdma_reqs = omap44xx_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), - .main_clk = "mmc1_fck", -@@ -3498,6 +3498,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { - /* mmc2 */ - static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { - { .irq = 86 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { -@@ -3537,7 +3538,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { - .name = "mmc2", - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs), - .sdma_reqs = omap44xx_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), - .main_clk = "mmc2_fck", -@@ -3557,6 +3557,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { - static struct omap_hwmod omap44xx_mmc3_hwmod; - static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { - { .irq = 94 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { -@@ -3591,7 +3592,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { - .name = "mmc3", - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs), - .sdma_reqs = omap44xx_mmc3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), - .main_clk = "mmc3_fck", -@@ -3609,6 +3609,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { - static struct omap_hwmod omap44xx_mmc4_hwmod; - static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { - { .irq = 96 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { -@@ -3643,7 +3644,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { - .name = "mmc4", - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs), -+ - .sdma_reqs = omap44xx_mmc4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), - .main_clk = "mmc4_fck", -@@ -3661,6 +3662,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { - static struct omap_hwmod omap44xx_mmc5_hwmod; - static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { - { .irq = 59 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { -@@ -3695,7 +3697,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { - .name = "mmc5", - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc5_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs), - .sdma_reqs = omap44xx_mmc5_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), - .main_clk = "mmc5_fck", -@@ -3723,6 +3724,7 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = { - { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START }, - { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START }, - { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - /* mpu master ports */ -@@ -3737,7 +3739,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { - .class = &omap44xx_mpu_hwmod_class, - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .mpu_irqs = omap44xx_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs), - .main_clk = "dpll_mpu_m2_ck", - .prcm = { - .omap4 = { -@@ -3779,6 +3780,7 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = { - static struct omap_hwmod omap44xx_smartreflex_core_hwmod; - static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { - { .irq = 19 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { -@@ -3808,7 +3810,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { - .name = "smartreflex_core", - .class = &omap44xx_smartreflex_hwmod_class, - .mpu_irqs = omap44xx_smartreflex_core_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs), -+ - .main_clk = "smartreflex_core_fck", - .vdd_name = "core", - .prcm = { -@@ -3825,6 +3827,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { - static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; - static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { - { .irq = 102 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { -@@ -3854,7 +3857,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { - .name = "smartreflex_iva", - .class = &omap44xx_smartreflex_hwmod_class, - .mpu_irqs = omap44xx_smartreflex_iva_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs), - .main_clk = "smartreflex_iva_fck", - .vdd_name = "iva", - .prcm = { -@@ -3871,6 +3873,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { - static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; - static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { - { .irq = 18 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { -@@ -3900,7 +3903,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { - .name = "smartreflex_mpu", - .class = &omap44xx_smartreflex_hwmod_class, - .mpu_irqs = omap44xx_smartreflex_mpu_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs), - .main_clk = "smartreflex_mpu_fck", - .vdd_name = "mpu", - .prcm = { -@@ -4016,6 +4018,7 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = { - static struct omap_hwmod omap44xx_timer1_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { - { .irq = 37 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { -@@ -4045,7 +4048,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { - .name = "timer1", - .class = &omap44xx_timer_1ms_hwmod_class, - .mpu_irqs = omap44xx_timer1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs), - .main_clk = "timer1_fck", - .prcm = { - .omap4 = { -@@ -4061,6 +4063,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { - static struct omap_hwmod omap44xx_timer2_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = { - { .irq = 38 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { -@@ -4090,7 +4093,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { - .name = "timer2", - .class = &omap44xx_timer_1ms_hwmod_class, - .mpu_irqs = omap44xx_timer2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs), - .main_clk = "timer2_fck", - .prcm = { - .omap4 = { -@@ -4106,6 +4108,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { - static struct omap_hwmod omap44xx_timer3_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = { - { .irq = 39 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { -@@ -4135,7 +4138,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { - .name = "timer3", - .class = &omap44xx_timer_hwmod_class, - .mpu_irqs = omap44xx_timer3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs), - .main_clk = "timer3_fck", - .prcm = { - .omap4 = { -@@ -4151,6 +4153,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { - static struct omap_hwmod omap44xx_timer4_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = { - { .irq = 40 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { -@@ -4180,7 +4183,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { - .name = "timer4", - .class = &omap44xx_timer_hwmod_class, - .mpu_irqs = omap44xx_timer4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs), - .main_clk = "timer4_fck", - .prcm = { - .omap4 = { -@@ -4196,6 +4198,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { - static struct omap_hwmod omap44xx_timer5_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = { - { .irq = 41 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { -@@ -4244,7 +4247,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { - .name = "timer5", - .class = &omap44xx_timer_hwmod_class, - .mpu_irqs = omap44xx_timer5_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs), - .main_clk = "timer5_fck", - .prcm = { - .omap4 = { -@@ -4260,6 +4262,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { - static struct omap_hwmod omap44xx_timer6_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = { - { .irq = 42 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { -@@ -4308,7 +4311,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { - .name = "timer6", - .class = &omap44xx_timer_hwmod_class, - .mpu_irqs = omap44xx_timer6_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs), -+ - .main_clk = "timer6_fck", - .prcm = { - .omap4 = { -@@ -4324,6 +4327,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { - static struct omap_hwmod omap44xx_timer7_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = { - { .irq = 43 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { -@@ -4372,7 +4376,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { - .name = "timer7", - .class = &omap44xx_timer_hwmod_class, - .mpu_irqs = omap44xx_timer7_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs), - .main_clk = "timer7_fck", - .prcm = { - .omap4 = { -@@ -4388,6 +4391,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { - static struct omap_hwmod omap44xx_timer8_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = { - { .irq = 44 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { -@@ -4436,7 +4440,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { - .name = "timer8", - .class = &omap44xx_timer_hwmod_class, - .mpu_irqs = omap44xx_timer8_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs), - .main_clk = "timer8_fck", - .prcm = { - .omap4 = { -@@ -4452,6 +4455,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { - static struct omap_hwmod omap44xx_timer9_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = { - { .irq = 45 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { -@@ -4481,7 +4485,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { - .name = "timer9", - .class = &omap44xx_timer_hwmod_class, - .mpu_irqs = omap44xx_timer9_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs), - .main_clk = "timer9_fck", - .prcm = { - .omap4 = { -@@ -4497,6 +4500,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { - static struct omap_hwmod omap44xx_timer10_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = { - { .irq = 46 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { -@@ -4526,7 +4530,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { - .name = "timer10", - .class = &omap44xx_timer_1ms_hwmod_class, - .mpu_irqs = omap44xx_timer10_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs), - .main_clk = "timer10_fck", - .prcm = { - .omap4 = { -@@ -4542,6 +4545,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { - static struct omap_hwmod omap44xx_timer11_hwmod; - static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = { - { .irq = 47 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { -@@ -4571,7 +4575,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { - .name = "timer11", - .class = &omap44xx_timer_hwmod_class, - .mpu_irqs = omap44xx_timer11_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs), - .main_clk = "timer11_fck", - .prcm = { - .omap4 = { -@@ -4609,6 +4612,7 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = { - static struct omap_hwmod omap44xx_uart1_hwmod; - static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { - { .irq = 72 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { -@@ -4643,7 +4647,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { - .name = "uart1", - .class = &omap44xx_uart_hwmod_class, - .mpu_irqs = omap44xx_uart1_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs), - .sdma_reqs = omap44xx_uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), - .main_clk = "uart1_fck", -@@ -4661,6 +4664,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { - static struct omap_hwmod omap44xx_uart2_hwmod; - static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { - { .irq = 73 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { -@@ -4695,7 +4699,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { - .name = "uart2", - .class = &omap44xx_uart_hwmod_class, - .mpu_irqs = omap44xx_uart2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs), - .sdma_reqs = omap44xx_uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), - .main_clk = "uart2_fck", -@@ -4713,6 +4716,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { - static struct omap_hwmod omap44xx_uart3_hwmod; - static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { - { .irq = 74 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { -@@ -4748,7 +4752,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { - .class = &omap44xx_uart_hwmod_class, - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .mpu_irqs = omap44xx_uart3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs), - .sdma_reqs = omap44xx_uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), - .main_clk = "uart3_fck", -@@ -4766,6 +4769,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { - static struct omap_hwmod omap44xx_uart4_hwmod; - static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { - { .irq = 70 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { -@@ -4800,7 +4804,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { - .name = "uart4", - .class = &omap44xx_uart_hwmod_class, - .mpu_irqs = omap44xx_uart4_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs), - .sdma_reqs = omap44xx_uart4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), - .main_clk = "uart4_fck", -@@ -4841,6 +4844,7 @@ static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { - static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { - { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START }, - { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - /* usb_otg_hs master ports */ -@@ -4880,7 +4884,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { - .class = &omap44xx_usb_otg_hs_hwmod_class, - .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, - .mpu_irqs = omap44xx_usb_otg_hs_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs), - .main_clk = "usb_otg_hs_ick", - .prcm = { - .omap4 = { -@@ -4923,6 +4926,7 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = { - static struct omap_hwmod omap44xx_wd_timer2_hwmod; - static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { - { .irq = 80 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { -@@ -4952,7 +4956,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { - .name = "wd_timer2", - .class = &omap44xx_wd_timer_hwmod_class, - .mpu_irqs = omap44xx_wd_timer2_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs), - .main_clk = "wd_timer2_fck", - .prcm = { - .omap4 = { -@@ -4968,6 +4971,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { - static struct omap_hwmod omap44xx_wd_timer3_hwmod; - static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { - { .irq = 36 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { -@@ -5016,7 +5020,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { - .name = "wd_timer3", - .class = &omap44xx_wd_timer_hwmod_class, - .mpu_irqs = omap44xx_wd_timer3_irqs, -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs), - .main_clk = "wd_timer3_fck", - .prcm = { - .omap4 = { -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index f3a3bff..b8385e2 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -97,7 +97,7 @@ struct omap_hwmod_mux_info { - /** - * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod - * @name: name of the IRQ channel (module local name) -- * @irq_ch: IRQ channel ID -+ * @irq: IRQ channel ID (should be non-negative except -1 = terminator) - * - * @name should be something short, e.g., "tx" or "rx". It is for use - * by platform_get_resource_byname(). It is defined locally to the -@@ -105,7 +105,7 @@ struct omap_hwmod_mux_info { - */ - struct omap_hwmod_irq_info { - const char *name; -- u16 irq; -+ s16 irq; - }; - - /** -@@ -466,7 +466,7 @@ struct omap_hwmod_class { - * @name: name of the hwmod - * @class: struct omap_hwmod_class * to the class of this hwmod - * @od: struct omap_device currently associated with this hwmod (internal use) -- * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) -+ * @mpu_irqs: ptr to an array of MPU IRQs - * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) - * @prcm: PRCM data pertaining to this hwmod - * @main_clk: main clock: OMAP clock name -@@ -480,7 +480,6 @@ struct omap_hwmod_class { - * @_sysc_cache: internal-use hwmod flags - * @_mpu_rt_va: cached register target start address (internal use) - * @_mpu_port_index: cached MPU register target slave ID (internal use) -- * @mpu_irqs_cnt: number of @mpu_irqs - * @sdma_reqs_cnt: number of @sdma_reqs - * @opt_clks_cnt: number of @opt_clks - * @master_cnt: number of @master entries -@@ -529,7 +528,6 @@ struct omap_hwmod { - u16 flags; - u8 _mpu_port_index; - u8 response_lat; -- u8 mpu_irqs_cnt; - u8 sdma_reqs_cnt; - u8 rst_lines_cnt; - u8 opt_clks_cnt; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod-share-identical-omap_hwmod_mpu_irqs-array.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod-share-identical-omap_hwmod_mpu_irqs-array.patch deleted file mode 100644 index fabe223..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod-share-identical-omap_hwmod_mpu_irqs-array.patch +++ /dev/null @@ -1,1815 +0,0 @@ -From 5cd00a6a7afe6757255da2256157ce5504cf4b1a Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sat, 9 Jul 2011 19:14:07 -0600 -Subject: [PATCH 040/149] omap_hwmod: share identical omap_hwmod_mpu_irqs arrays - -To reduce kernel source file data duplication, share struct -omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/Makefile | 11 +- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 +++----------------- - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 166 +++----------------- - .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 142 +++++++++++++++++ - arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 21 +++ - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 162 +++---------------- - arch/arm/mach-omap2/omap_hwmod_common_data.h | 29 ++++ - 7 files changed, 275 insertions(+), 423 deletions(-) - create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c - create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index 8a75d17..f343365 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -145,13 +145,18 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o - obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o - - # hwmod data --obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ -+obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \ -+ omap_hwmod_2xxx_3xxx_ipblock_data.o \ -+ omap_hwmod_2xxx_interconnect_data.o \ - omap_hwmod_2xxx_3xxx_interconnect_data.o \ - omap_hwmod_2420_data.o --obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ -+obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \ -+ omap_hwmod_2xxx_3xxx_ipblock_data.o \ -+ omap_hwmod_2xxx_interconnect_data.o \ - omap_hwmod_2xxx_3xxx_interconnect_data.o \ - omap_hwmod_2430_data.o --obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ -+obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \ -+ omap_hwmod_2xxx_3xxx_interconnect_data.o \ - omap_hwmod_3xxx_data.o - obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index 04730d3..73157ee 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -294,10 +294,6 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { - - /* timer1 */ - static struct omap_hwmod omap2420_timer1_hwmod; --static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { -- { .irq = 37, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { - { -@@ -325,7 +321,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { - /* timer1 hwmod */ - static struct omap_hwmod omap2420_timer1_hwmod = { - .name = "timer1", -- .mpu_irqs = omap2420_timer1_mpu_irqs, -+ .mpu_irqs = omap2_timer1_mpu_irqs, - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { -@@ -344,11 +340,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = { - - /* timer2 */ - static struct omap_hwmod omap2420_timer2_hwmod; --static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { -- { .irq = 38, }, -- { .irq = -1 } --}; -- - - /* l4_core -> timer2 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { -@@ -367,7 +358,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { - /* timer2 hwmod */ - static struct omap_hwmod omap2420_timer2_hwmod = { - .name = "timer2", -- .mpu_irqs = omap2420_timer2_mpu_irqs, -+ .mpu_irqs = omap2_timer2_mpu_irqs, - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { -@@ -386,10 +377,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = { - - /* timer3 */ - static struct omap_hwmod omap2420_timer3_hwmod; --static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { -- { .irq = 39, }, -- { .irq = -1 } --}; - - /* l4_core -> timer3 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { -@@ -408,7 +395,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { - /* timer3 hwmod */ - static struct omap_hwmod omap2420_timer3_hwmod = { - .name = "timer3", -- .mpu_irqs = omap2420_timer3_mpu_irqs, -+ .mpu_irqs = omap2_timer3_mpu_irqs, - .main_clk = "gpt3_fck", - .prcm = { - .omap2 = { -@@ -427,10 +414,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = { - - /* timer4 */ - static struct omap_hwmod omap2420_timer4_hwmod; --static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { -- { .irq = 40, }, -- { .irq = -1 } --}; - - /* l4_core -> timer4 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { -@@ -449,7 +432,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { - /* timer4 hwmod */ - static struct omap_hwmod omap2420_timer4_hwmod = { - .name = "timer4", -- .mpu_irqs = omap2420_timer4_mpu_irqs, -+ .mpu_irqs = omap2_timer4_mpu_irqs, - .main_clk = "gpt4_fck", - .prcm = { - .omap2 = { -@@ -468,10 +451,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = { - - /* timer5 */ - static struct omap_hwmod omap2420_timer5_hwmod; --static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { -- { .irq = 41, }, -- { .irq = -1 } --}; - - /* l4_core -> timer5 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { -@@ -490,7 +469,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { - /* timer5 hwmod */ - static struct omap_hwmod omap2420_timer5_hwmod = { - .name = "timer5", -- .mpu_irqs = omap2420_timer5_mpu_irqs, -+ .mpu_irqs = omap2_timer5_mpu_irqs, - .main_clk = "gpt5_fck", - .prcm = { - .omap2 = { -@@ -510,10 +489,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = { - - /* timer6 */ - static struct omap_hwmod omap2420_timer6_hwmod; --static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { -- { .irq = 42, }, -- { .irq = -1 } --}; - - /* l4_core -> timer6 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { -@@ -532,7 +507,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { - /* timer6 hwmod */ - static struct omap_hwmod omap2420_timer6_hwmod = { - .name = "timer6", -- .mpu_irqs = omap2420_timer6_mpu_irqs, -+ .mpu_irqs = omap2_timer6_mpu_irqs, - .main_clk = "gpt6_fck", - .prcm = { - .omap2 = { -@@ -551,10 +526,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = { - - /* timer7 */ - static struct omap_hwmod omap2420_timer7_hwmod; --static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { -- { .irq = 43, }, -- { .irq = -1 } --}; - - /* l4_core -> timer7 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { -@@ -573,7 +544,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { - /* timer7 hwmod */ - static struct omap_hwmod omap2420_timer7_hwmod = { - .name = "timer7", -- .mpu_irqs = omap2420_timer7_mpu_irqs, -+ .mpu_irqs = omap2_timer7_mpu_irqs, - .main_clk = "gpt7_fck", - .prcm = { - .omap2 = { -@@ -592,10 +563,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = { - - /* timer8 */ - static struct omap_hwmod omap2420_timer8_hwmod; --static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { -- { .irq = 44, }, -- { .irq = -1 } --}; - - /* l4_core -> timer8 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { -@@ -614,7 +581,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { - /* timer8 hwmod */ - static struct omap_hwmod omap2420_timer8_hwmod = { - .name = "timer8", -- .mpu_irqs = omap2420_timer8_mpu_irqs, -+ .mpu_irqs = omap2_timer8_mpu_irqs, - .main_clk = "gpt8_fck", - .prcm = { - .omap2 = { -@@ -633,10 +600,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = { - - /* timer9 */ - static struct omap_hwmod omap2420_timer9_hwmod; --static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { -- { .irq = 45, }, -- { .irq = -1 } --}; - - /* l4_core -> timer9 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { -@@ -655,7 +618,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { - /* timer9 hwmod */ - static struct omap_hwmod omap2420_timer9_hwmod = { - .name = "timer9", -- .mpu_irqs = omap2420_timer9_mpu_irqs, -+ .mpu_irqs = omap2_timer9_mpu_irqs, - .main_clk = "gpt9_fck", - .prcm = { - .omap2 = { -@@ -674,10 +637,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = { - - /* timer10 */ - static struct omap_hwmod omap2420_timer10_hwmod; --static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { -- { .irq = 46, }, -- { .irq = -1 } --}; - - /* l4_core -> timer10 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { -@@ -696,7 +655,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { - /* timer10 hwmod */ - static struct omap_hwmod omap2420_timer10_hwmod = { - .name = "timer10", -- .mpu_irqs = omap2420_timer10_mpu_irqs, -+ .mpu_irqs = omap2_timer10_mpu_irqs, - .main_clk = "gpt10_fck", - .prcm = { - .omap2 = { -@@ -715,10 +674,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = { - - /* timer11 */ - static struct omap_hwmod omap2420_timer11_hwmod; --static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { -- { .irq = 47, }, -- { .irq = -1 } --}; - - /* l4_core -> timer11 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { -@@ -737,7 +692,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { - /* timer11 hwmod */ - static struct omap_hwmod omap2420_timer11_hwmod = { - .name = "timer11", -- .mpu_irqs = omap2420_timer11_mpu_irqs, -+ .mpu_irqs = omap2_timer11_mpu_irqs, - .main_clk = "gpt11_fck", - .prcm = { - .omap2 = { -@@ -756,10 +711,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = { - - /* timer12 */ - static struct omap_hwmod omap2420_timer12_hwmod; --static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { -- { .irq = 48, }, -- { .irq = -1 } --}; - - /* l4_core -> timer12 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { -@@ -778,7 +729,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { - /* timer12 hwmod */ - static struct omap_hwmod omap2420_timer12_hwmod = { - .name = "timer12", -- .mpu_irqs = omap2420_timer12_mpu_irqs, -+ .mpu_irqs = omap2xxx_timer12_mpu_irqs, - .main_clk = "gpt12_fck", - .prcm = { - .omap2 = { -@@ -877,11 +828,6 @@ static struct omap_hwmod_class uart_class = { - - /* UART1 */ - --static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { -- { .irq = INT_24XX_UART1_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -@@ -893,7 +839,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { - - static struct omap_hwmod omap2420_uart1_hwmod = { - .name = "uart1", -- .mpu_irqs = uart1_mpu_irqs, -+ .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", -@@ -914,11 +860,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { - - /* UART2 */ - --static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { -- { .irq = INT_24XX_UART2_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -@@ -930,7 +871,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { - - static struct omap_hwmod omap2420_uart2_hwmod = { - .name = "uart2", -- .mpu_irqs = uart2_mpu_irqs, -+ .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", -@@ -951,11 +892,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { - - /* UART3 */ - --static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { -- { .irq = INT_24XX_UART3_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -@@ -967,7 +903,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { - - static struct omap_hwmod omap2420_uart3_hwmod = { - .name = "uart3", -- .mpu_irqs = uart3_mpu_irqs, -+ .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", -@@ -1085,11 +1021,6 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { - .sysc = &omap2420_dispc_sysc, - }; - --static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { -- { .irq = 25 }, -- { .irq = -1 } --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { - .master = &omap2420_l4_core_hwmod, -@@ -1113,7 +1044,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { - static struct omap_hwmod omap2420_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap2420_dispc_hwmod_class, -- .mpu_irqs = omap2420_dispc_irqs, -+ .mpu_irqs = omap2_dispc_irqs, - .main_clk = "dss1_fck", - .prcm = { - .omap2 = { -@@ -1252,11 +1183,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; - - /* I2C1 */ - --static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { -- { .irq = INT_24XX_I2C1_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -@@ -1268,7 +1194,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { - - static struct omap_hwmod omap2420_i2c1_hwmod = { - .name = "i2c1", -- .mpu_irqs = i2c1_mpu_irqs, -+ .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2c1_fck", -@@ -1291,11 +1217,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { - - /* I2C2 */ - --static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { -- { .irq = INT_24XX_I2C2_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -@@ -1307,7 +1228,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { - - static struct omap_hwmod omap2420_i2c2_hwmod = { - .name = "i2c2", -- .mpu_irqs = i2c2_mpu_irqs, -+ .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2c2_fck", -@@ -1428,11 +1349,6 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { - }; - - /* gpio1 */ --static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { -- { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { - &omap2420_l4_wkup__gpio1, - }; -@@ -1440,7 +1356,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { - static struct omap_hwmod omap2420_gpio1_hwmod = { - .name = "gpio1", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap242x_gpio1_irqs, -+ .mpu_irqs = omap2_gpio1_irqs, - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1459,11 +1375,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { - }; - - /* gpio2 */ --static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { -- { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { - &omap2420_l4_wkup__gpio2, - }; -@@ -1471,7 +1382,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { - static struct omap_hwmod omap2420_gpio2_hwmod = { - .name = "gpio2", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap242x_gpio2_irqs, -+ .mpu_irqs = omap2_gpio2_irqs, - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1490,11 +1401,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { - }; - - /* gpio3 */ --static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { -- { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { - &omap2420_l4_wkup__gpio3, - }; -@@ -1502,7 +1408,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { - static struct omap_hwmod omap2420_gpio3_hwmod = { - .name = "gpio3", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap242x_gpio3_irqs, -+ .mpu_irqs = omap2_gpio3_irqs, - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1521,11 +1427,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { - }; - - /* gpio4 */ --static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { -- { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { - &omap2420_l4_wkup__gpio4, - }; -@@ -1533,7 +1434,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { - static struct omap_hwmod omap2420_gpio4_hwmod = { - .name = "gpio4", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap242x_gpio4_irqs, -+ .mpu_irqs = omap2_gpio4_irqs, - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1575,14 +1476,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { - .lch_count = 32, - }; - --static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { -- { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ -- { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ -- { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ -- { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ -- { .irq = -1 } --}; -- - /* dma_system -> L3 */ - static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { - .master = &omap2420_dma_system_hwmod, -@@ -1613,7 +1506,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { - static struct omap_hwmod omap2420_dma_system_hwmod = { - .name = "dma", - .class = &omap2420_dma_hwmod_class, -- .mpu_irqs = omap2420_dma_system_irqs, -+ .mpu_irqs = omap2_dma_system_irqs, - .main_clk = "core_l3_ck", - .slaves = omap2420_dma_system_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), -@@ -1709,11 +1602,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { - }; - - /* mcspi1 */ --static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { -- { .irq = 65 }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ -@@ -1735,7 +1623,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - - static struct omap_hwmod omap2420_mcspi1_hwmod = { - .name = "mcspi1_hwmod", -- .mpu_irqs = omap2420_mcspi1_mpu_irqs, -+ .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2420_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", -@@ -1756,11 +1644,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { - }; - - /* mcspi2 */ --static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { -- { .irq = 66 }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ -@@ -1778,7 +1661,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - - static struct omap_hwmod omap2420_mcspi2_hwmod = { - .name = "mcspi2_hwmod", -- .mpu_irqs = omap2420_mcspi2_mpu_irqs, -+ .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2420_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index 2c28468..62ecc68 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -367,10 +367,6 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { - - /* timer1 */ - static struct omap_hwmod omap2430_timer1_hwmod; --static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { -- { .irq = 37, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { - { -@@ -398,7 +394,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { - /* timer1 hwmod */ - static struct omap_hwmod omap2430_timer1_hwmod = { - .name = "timer1", -- .mpu_irqs = omap2430_timer1_mpu_irqs, -+ .mpu_irqs = omap2_timer1_mpu_irqs, - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { -@@ -417,10 +413,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = { - - /* timer2 */ - static struct omap_hwmod omap2430_timer2_hwmod; --static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { -- { .irq = 38, }, -- { .irq = -1 } --}; - - /* l4_core -> timer2 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { -@@ -439,7 +431,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { - /* timer2 hwmod */ - static struct omap_hwmod omap2430_timer2_hwmod = { - .name = "timer2", -- .mpu_irqs = omap2430_timer2_mpu_irqs, -+ .mpu_irqs = omap2_timer2_mpu_irqs, - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { -@@ -458,10 +450,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = { - - /* timer3 */ - static struct omap_hwmod omap2430_timer3_hwmod; --static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { -- { .irq = 39, }, -- { .irq = -1 } --}; - - /* l4_core -> timer3 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { -@@ -480,7 +468,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { - /* timer3 hwmod */ - static struct omap_hwmod omap2430_timer3_hwmod = { - .name = "timer3", -- .mpu_irqs = omap2430_timer3_mpu_irqs, -+ .mpu_irqs = omap2_timer3_mpu_irqs, - .main_clk = "gpt3_fck", - .prcm = { - .omap2 = { -@@ -499,10 +487,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = { - - /* timer4 */ - static struct omap_hwmod omap2430_timer4_hwmod; --static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { -- { .irq = 40, }, -- { .irq = -1 } --}; - - /* l4_core -> timer4 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { -@@ -521,7 +505,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { - /* timer4 hwmod */ - static struct omap_hwmod omap2430_timer4_hwmod = { - .name = "timer4", -- .mpu_irqs = omap2430_timer4_mpu_irqs, -+ .mpu_irqs = omap2_timer4_mpu_irqs, - .main_clk = "gpt4_fck", - .prcm = { - .omap2 = { -@@ -540,10 +524,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = { - - /* timer5 */ - static struct omap_hwmod omap2430_timer5_hwmod; --static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { -- { .irq = 41, }, -- { .irq = -1 } --}; - - /* l4_core -> timer5 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { -@@ -562,7 +542,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { - /* timer5 hwmod */ - static struct omap_hwmod omap2430_timer5_hwmod = { - .name = "timer5", -- .mpu_irqs = omap2430_timer5_mpu_irqs, -+ .mpu_irqs = omap2_timer5_mpu_irqs, - .main_clk = "gpt5_fck", - .prcm = { - .omap2 = { -@@ -581,10 +561,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = { - - /* timer6 */ - static struct omap_hwmod omap2430_timer6_hwmod; --static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { -- { .irq = 42, }, -- { .irq = -1 } --}; - - /* l4_core -> timer6 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { -@@ -603,7 +579,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { - /* timer6 hwmod */ - static struct omap_hwmod omap2430_timer6_hwmod = { - .name = "timer6", -- .mpu_irqs = omap2430_timer6_mpu_irqs, -+ .mpu_irqs = omap2_timer6_mpu_irqs, - .main_clk = "gpt6_fck", - .prcm = { - .omap2 = { -@@ -622,10 +598,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = { - - /* timer7 */ - static struct omap_hwmod omap2430_timer7_hwmod; --static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { -- { .irq = 43, }, -- { .irq = -1 } --}; - - /* l4_core -> timer7 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { -@@ -644,7 +616,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { - /* timer7 hwmod */ - static struct omap_hwmod omap2430_timer7_hwmod = { - .name = "timer7", -- .mpu_irqs = omap2430_timer7_mpu_irqs, -+ .mpu_irqs = omap2_timer7_mpu_irqs, - .main_clk = "gpt7_fck", - .prcm = { - .omap2 = { -@@ -663,10 +635,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = { - - /* timer8 */ - static struct omap_hwmod omap2430_timer8_hwmod; --static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { -- { .irq = 44, }, -- { .irq = -1 } --}; - - /* l4_core -> timer8 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { -@@ -685,7 +653,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { - /* timer8 hwmod */ - static struct omap_hwmod omap2430_timer8_hwmod = { - .name = "timer8", -- .mpu_irqs = omap2430_timer8_mpu_irqs, -+ .mpu_irqs = omap2_timer8_mpu_irqs, - .main_clk = "gpt8_fck", - .prcm = { - .omap2 = { -@@ -704,10 +672,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = { - - /* timer9 */ - static struct omap_hwmod omap2430_timer9_hwmod; --static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { -- { .irq = 45, }, -- { .irq = -1 } --}; - - /* l4_core -> timer9 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { -@@ -726,7 +690,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { - /* timer9 hwmod */ - static struct omap_hwmod omap2430_timer9_hwmod = { - .name = "timer9", -- .mpu_irqs = omap2430_timer9_mpu_irqs, -+ .mpu_irqs = omap2_timer9_mpu_irqs, - .main_clk = "gpt9_fck", - .prcm = { - .omap2 = { -@@ -745,10 +709,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = { - - /* timer10 */ - static struct omap_hwmod omap2430_timer10_hwmod; --static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { -- { .irq = 46, }, -- { .irq = -1 } --}; - - /* l4_core -> timer10 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { -@@ -767,7 +727,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { - /* timer10 hwmod */ - static struct omap_hwmod omap2430_timer10_hwmod = { - .name = "timer10", -- .mpu_irqs = omap2430_timer10_mpu_irqs, -+ .mpu_irqs = omap2_timer10_mpu_irqs, - .main_clk = "gpt10_fck", - .prcm = { - .omap2 = { -@@ -786,10 +746,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = { - - /* timer11 */ - static struct omap_hwmod omap2430_timer11_hwmod; --static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { -- { .irq = 47, }, -- { .irq = -1 } --}; - - /* l4_core -> timer11 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { -@@ -808,7 +764,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { - /* timer11 hwmod */ - static struct omap_hwmod omap2430_timer11_hwmod = { - .name = "timer11", -- .mpu_irqs = omap2430_timer11_mpu_irqs, -+ .mpu_irqs = omap2_timer11_mpu_irqs, - .main_clk = "gpt11_fck", - .prcm = { - .omap2 = { -@@ -827,10 +783,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = { - - /* timer12 */ - static struct omap_hwmod omap2430_timer12_hwmod; --static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { -- { .irq = 48, }, -- { .irq = -1 } --}; - - /* l4_core -> timer12 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { -@@ -849,7 +801,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { - /* timer12 hwmod */ - static struct omap_hwmod omap2430_timer12_hwmod = { - .name = "timer12", -- .mpu_irqs = omap2430_timer12_mpu_irqs, -+ .mpu_irqs = omap2xxx_timer12_mpu_irqs, - .main_clk = "gpt12_fck", - .prcm = { - .omap2 = { -@@ -948,11 +900,6 @@ static struct omap_hwmod_class uart_class = { - - /* UART1 */ - --static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { -- { .irq = INT_24XX_UART1_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -@@ -964,7 +911,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { - - static struct omap_hwmod omap2430_uart1_hwmod = { - .name = "uart1", -- .mpu_irqs = uart1_mpu_irqs, -+ .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", -@@ -985,11 +932,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { - - /* UART2 */ - --static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { -- { .irq = INT_24XX_UART2_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -@@ -1001,7 +943,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { - - static struct omap_hwmod omap2430_uart2_hwmod = { - .name = "uart2", -- .mpu_irqs = uart2_mpu_irqs, -+ .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", -@@ -1022,11 +964,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { - - /* UART3 */ - --static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { -- { .irq = INT_24XX_UART3_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -@@ -1038,7 +975,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { - - static struct omap_hwmod omap2430_uart3_hwmod = { - .name = "uart3", -- .mpu_irqs = uart3_mpu_irqs, -+ .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", -@@ -1150,11 +1087,6 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { - .sysc = &omap2430_dispc_sysc, - }; - --static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { -- { .irq = 25 }, -- { .irq = -1 } --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { - .master = &omap2430_l4_core_hwmod, -@@ -1172,7 +1104,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { - static struct omap_hwmod omap2430_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap2430_dispc_hwmod_class, -- .mpu_irqs = omap2430_dispc_irqs, -+ .mpu_irqs = omap2_dispc_irqs, - .main_clk = "dss1_fck", - .prcm = { - .omap2 = { -@@ -1302,11 +1234,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { - - /* I2C1 */ - --static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { -- { .irq = INT_24XX_I2C1_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -@@ -1318,7 +1245,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { - - static struct omap_hwmod omap2430_i2c1_hwmod = { - .name = "i2c1", -- .mpu_irqs = i2c1_mpu_irqs, -+ .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2chs1_fck", -@@ -1348,11 +1275,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { - - /* I2C2 */ - --static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { -- { .irq = INT_24XX_I2C2_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -@@ -1364,7 +1286,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { - - static struct omap_hwmod omap2430_i2c2_hwmod = { - .name = "i2c2", -- .mpu_irqs = i2c2_mpu_irqs, -+ .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2chs2_fck", -@@ -1502,11 +1424,6 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { - }; - - /* gpio1 */ --static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { -- { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { - &omap2430_l4_wkup__gpio1, - }; -@@ -1514,7 +1431,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { - static struct omap_hwmod omap2430_gpio1_hwmod = { - .name = "gpio1", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap243x_gpio1_irqs, -+ .mpu_irqs = omap2_gpio1_irqs, - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1533,11 +1450,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { - }; - - /* gpio2 */ --static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { -- { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { - &omap2430_l4_wkup__gpio2, - }; -@@ -1545,7 +1457,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { - static struct omap_hwmod omap2430_gpio2_hwmod = { - .name = "gpio2", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap243x_gpio2_irqs, -+ .mpu_irqs = omap2_gpio2_irqs, - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1564,11 +1476,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { - }; - - /* gpio3 */ --static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { -- { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { - &omap2430_l4_wkup__gpio3, - }; -@@ -1576,7 +1483,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { - static struct omap_hwmod omap2430_gpio3_hwmod = { - .name = "gpio3", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap243x_gpio3_irqs, -+ .mpu_irqs = omap2_gpio3_irqs, - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1595,11 +1502,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { - }; - - /* gpio4 */ --static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { -- { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { - &omap2430_l4_wkup__gpio4, - }; -@@ -1607,7 +1509,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { - static struct omap_hwmod omap2430_gpio4_hwmod = { - .name = "gpio4", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap243x_gpio4_irqs, -+ .mpu_irqs = omap2_gpio4_irqs, - .main_clk = "gpios_fck", - .prcm = { - .omap2 = { -@@ -1680,14 +1582,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { - .lch_count = 32, - }; - --static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { -- { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ -- { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ -- { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ -- { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ -- { .irq = -1 } --}; -- - /* dma_system -> L3 */ - static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { - .master = &omap2430_dma_system_hwmod, -@@ -1718,7 +1612,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { - static struct omap_hwmod omap2430_dma_system_hwmod = { - .name = "dma", - .class = &omap2430_dma_hwmod_class, -- .mpu_irqs = omap2430_dma_system_irqs, -+ .mpu_irqs = omap2_dma_system_irqs, - .main_clk = "core_l3_ck", - .slaves = omap2430_dma_system_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), -@@ -1813,11 +1707,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { - }; - - /* mcspi1 */ --static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { -- { .irq = 65 }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ -@@ -1839,7 +1728,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - - static struct omap_hwmod omap2430_mcspi1_hwmod = { - .name = "mcspi1_hwmod", -- .mpu_irqs = omap2430_mcspi1_mpu_irqs, -+ .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2430_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", -@@ -1860,11 +1749,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { - }; - - /* mcspi2 */ --static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { -- { .irq = 66 }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ -@@ -1882,7 +1766,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - - static struct omap_hwmod omap2430_mcspi2_hwmod = { - .name = "mcspi2_hwmod", -- .mpu_irqs = omap2430_mcspi2_mpu_irqs, -+ .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2430_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c -new file mode 100644 -index 0000000..245294b ---- /dev/null -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c -@@ -0,0 +1,142 @@ -+/* -+ * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3 -+ * -+ * Copyright (C) 2011 Nokia Corporation -+ * Paul Walmsley -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <plat/omap_hwmod.h> -+#include <plat/serial.h> -+ -+#include <mach/irqs.h> -+ -+#include "omap_hwmod_common_data.h" -+ -+struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { -+ { .irq = 37, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = { -+ { .irq = 38, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = { -+ { .irq = 39, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = { -+ { .irq = 40, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = { -+ { .irq = 41, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = { -+ { .irq = 42, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = { -+ { .irq = 43, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = { -+ { .irq = 44, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = { -+ { .irq = 45, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = { -+ { .irq = 46, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = { -+ { .irq = 47, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = { -+ { .irq = INT_24XX_UART1_IRQ, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = { -+ { .irq = INT_24XX_UART2_IRQ, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = { -+ { .irq = INT_24XX_UART3_IRQ, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_dispc_irqs[] = { -+ { .irq = 25 }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = { -+ { .irq = INT_24XX_I2C1_IRQ, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = { -+ { .irq = INT_24XX_I2C2_IRQ, }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_gpio1_irqs[] = { -+ { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_gpio2_irqs[] = { -+ { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_gpio3_irqs[] = { -+ { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_gpio4_irqs[] = { -+ { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_dma_system_irqs[] = { -+ { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ -+ { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ -+ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ -+ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = { -+ { .irq = 65 }, -+ { .irq = -1 } -+}; -+ -+struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { -+ { .irq = 66 }, -+ { .irq = -1 } -+}; -+ -+ -+ -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c -new file mode 100644 -index 0000000..5a078a6 ---- /dev/null -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c -@@ -0,0 +1,21 @@ -+/* -+ * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx -+ * -+ * Copyright (C) 2011 Nokia Corporation -+ * Paul Walmsley -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <plat/omap_hwmod.h> -+#include <plat/serial.h> -+ -+#include <mach/irqs.h> -+ -+#include "omap_hwmod_common_data.h" -+ -+struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { -+ { .irq = 48, }, -+ { .irq = -1 } -+}; -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index cc178b5..6bac4bb 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -151,7 +151,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = { - static struct omap_hwmod omap3xxx_l3_main_hwmod = { - .name = "l3_main", - .class = &l3_hwmod_class, -- .mpu_irqs = omap3xxx_l3_main_irqs, -+ .mpu_irqs = omap3xxx_l3_main_irqs, - .masters = omap3xxx_l3_main_masters, - .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), - .slaves = omap3xxx_l3_main_slaves, -@@ -572,10 +572,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { - - /* timer1 */ - static struct omap_hwmod omap3xxx_timer1_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { -- { .irq = 37, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { - { -@@ -603,7 +599,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { - /* timer1 hwmod */ - static struct omap_hwmod omap3xxx_timer1_hwmod = { - .name = "timer1", -- .mpu_irqs = omap3xxx_timer1_mpu_irqs, -+ .mpu_irqs = omap2_timer1_mpu_irqs, - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { -@@ -622,10 +618,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { - - /* timer2 */ - static struct omap_hwmod omap3xxx_timer2_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { -- { .irq = 38, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { - { -@@ -653,7 +645,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { - /* timer2 hwmod */ - static struct omap_hwmod omap3xxx_timer2_hwmod = { - .name = "timer2", -- .mpu_irqs = omap3xxx_timer2_mpu_irqs, -+ .mpu_irqs = omap2_timer2_mpu_irqs, - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { -@@ -672,10 +664,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { - - /* timer3 */ - static struct omap_hwmod omap3xxx_timer3_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { -- { .irq = 39, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { - { -@@ -703,7 +691,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { - /* timer3 hwmod */ - static struct omap_hwmod omap3xxx_timer3_hwmod = { - .name = "timer3", -- .mpu_irqs = omap3xxx_timer3_mpu_irqs, -+ .mpu_irqs = omap2_timer3_mpu_irqs, - .main_clk = "gpt3_fck", - .prcm = { - .omap2 = { -@@ -722,10 +710,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { - - /* timer4 */ - static struct omap_hwmod omap3xxx_timer4_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { -- { .irq = 40, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { - { -@@ -753,7 +737,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { - /* timer4 hwmod */ - static struct omap_hwmod omap3xxx_timer4_hwmod = { - .name = "timer4", -- .mpu_irqs = omap3xxx_timer4_mpu_irqs, -+ .mpu_irqs = omap2_timer4_mpu_irqs, - .main_clk = "gpt4_fck", - .prcm = { - .omap2 = { -@@ -772,10 +756,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { - - /* timer5 */ - static struct omap_hwmod omap3xxx_timer5_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { -- { .irq = 41, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { - { -@@ -803,7 +783,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { - /* timer5 hwmod */ - static struct omap_hwmod omap3xxx_timer5_hwmod = { - .name = "timer5", -- .mpu_irqs = omap3xxx_timer5_mpu_irqs, -+ .mpu_irqs = omap2_timer5_mpu_irqs, - .main_clk = "gpt5_fck", - .prcm = { - .omap2 = { -@@ -822,10 +802,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { - - /* timer6 */ - static struct omap_hwmod omap3xxx_timer6_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { -- { .irq = 42, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { - { -@@ -853,7 +829,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { - /* timer6 hwmod */ - static struct omap_hwmod omap3xxx_timer6_hwmod = { - .name = "timer6", -- .mpu_irqs = omap3xxx_timer6_mpu_irqs, -+ .mpu_irqs = omap2_timer6_mpu_irqs, - .main_clk = "gpt6_fck", - .prcm = { - .omap2 = { -@@ -872,10 +848,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { - - /* timer7 */ - static struct omap_hwmod omap3xxx_timer7_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { -- { .irq = 43, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { - { -@@ -903,7 +875,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { - /* timer7 hwmod */ - static struct omap_hwmod omap3xxx_timer7_hwmod = { - .name = "timer7", -- .mpu_irqs = omap3xxx_timer7_mpu_irqs, -+ .mpu_irqs = omap2_timer7_mpu_irqs, - .main_clk = "gpt7_fck", - .prcm = { - .omap2 = { -@@ -922,10 +894,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { - - /* timer8 */ - static struct omap_hwmod omap3xxx_timer8_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { -- { .irq = 44, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { - { -@@ -953,7 +921,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { - /* timer8 hwmod */ - static struct omap_hwmod omap3xxx_timer8_hwmod = { - .name = "timer8", -- .mpu_irqs = omap3xxx_timer8_mpu_irqs, -+ .mpu_irqs = omap2_timer8_mpu_irqs, - .main_clk = "gpt8_fck", - .prcm = { - .omap2 = { -@@ -972,10 +940,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { - - /* timer9 */ - static struct omap_hwmod omap3xxx_timer9_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { -- { .irq = 45, }, -- { .irq = -1 } --}; - - static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { - { -@@ -1003,7 +967,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { - /* timer9 hwmod */ - static struct omap_hwmod omap3xxx_timer9_hwmod = { - .name = "timer9", -- .mpu_irqs = omap3xxx_timer9_mpu_irqs, -+ .mpu_irqs = omap2_timer9_mpu_irqs, - .main_clk = "gpt9_fck", - .prcm = { - .omap2 = { -@@ -1022,10 +986,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { - - /* timer10 */ - static struct omap_hwmod omap3xxx_timer10_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { -- { .irq = 46, }, -- { .irq = -1 } --}; - - /* l4_core -> timer10 */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { -@@ -1044,7 +1004,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { - /* timer10 hwmod */ - static struct omap_hwmod omap3xxx_timer10_hwmod = { - .name = "timer10", -- .mpu_irqs = omap3xxx_timer10_mpu_irqs, -+ .mpu_irqs = omap2_timer10_mpu_irqs, - .main_clk = "gpt10_fck", - .prcm = { - .omap2 = { -@@ -1063,10 +1023,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { - - /* timer11 */ - static struct omap_hwmod omap3xxx_timer11_hwmod; --static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { -- { .irq = 47, }, -- { .irq = -1 } --}; - - /* l4_core -> timer11 */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { -@@ -1085,7 +1041,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { - /* timer11 hwmod */ - static struct omap_hwmod omap3xxx_timer11_hwmod = { - .name = "timer11", -- .mpu_irqs = omap3xxx_timer11_mpu_irqs, -+ .mpu_irqs = omap2_timer11_mpu_irqs, - .main_clk = "gpt11_fck", - .prcm = { - .omap2 = { -@@ -1254,11 +1210,6 @@ static struct omap_hwmod_class uart_class = { - - /* UART1 */ - --static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { -- { .irq = INT_24XX_UART1_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, -@@ -1270,7 +1221,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { - - static struct omap_hwmod omap3xxx_uart1_hwmod = { - .name = "uart1", -- .mpu_irqs = uart1_mpu_irqs, -+ .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", -@@ -1291,11 +1242,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { - - /* UART2 */ - --static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { -- { .irq = INT_24XX_UART2_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, -@@ -1307,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { - - static struct omap_hwmod omap3xxx_uart2_hwmod = { - .name = "uart2", -- .mpu_irqs = uart2_mpu_irqs, -+ .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", -@@ -1328,11 +1274,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { - - /* UART3 */ - --static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { -- { .irq = INT_24XX_UART3_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, -@@ -1344,7 +1285,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { - - static struct omap_hwmod omap3xxx_uart3_hwmod = { - .name = "uart3", -- .mpu_irqs = uart3_mpu_irqs, -+ .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", -@@ -1555,11 +1496,6 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { - .sysc = &omap3xxx_dispc_sysc, - }; - --static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { -- { .irq = 25 }, -- { .irq = -1 } --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { - .master = &omap3xxx_l4_core_hwmod, -@@ -1584,7 +1520,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { - static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap3xxx_dispc_hwmod_class, -- .mpu_irqs = omap3xxx_dispc_irqs, -+ .mpu_irqs = omap2_dispc_irqs, - .main_clk = "dss1_alwon_fck", - .prcm = { - .omap2 = { -@@ -1781,11 +1717,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { - .fifo_depth = 8, /* bytes */ - }; - --static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { -- { .irq = INT_24XX_I2C1_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -@@ -1797,7 +1728,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { - - static struct omap_hwmod omap3xxx_i2c1_hwmod = { - .name = "i2c1", -- .mpu_irqs = i2c1_mpu_irqs, -+ .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2c1_fck", -@@ -1823,11 +1754,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { - .fifo_depth = 8, /* bytes */ - }; - --static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { -- { .irq = INT_24XX_I2C2_IRQ, }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -@@ -1839,7 +1765,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { - - static struct omap_hwmod omap3xxx_i2c2_hwmod = { - .name = "i2c2", -- .mpu_irqs = i2c2_mpu_irqs, -+ .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2c2_fck", -@@ -2032,11 +1958,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { - }; - - /* gpio1 */ --static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { -- { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { - { .role = "dbclk", .clk = "gpio1_dbck", }, - }; -@@ -2048,7 +1969,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = { - static struct omap_hwmod omap3xxx_gpio1_hwmod = { - .name = "gpio1", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap3xxx_gpio1_irqs, -+ .mpu_irqs = omap2_gpio1_irqs, - .main_clk = "gpio1_ick", - .opt_clks = gpio1_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), -@@ -2069,11 +1990,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { - }; - - /* gpio2 */ --static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { -- { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { - { .role = "dbclk", .clk = "gpio2_dbck", }, - }; -@@ -2085,7 +2001,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = { - static struct omap_hwmod omap3xxx_gpio2_hwmod = { - .name = "gpio2", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap3xxx_gpio2_irqs, -+ .mpu_irqs = omap2_gpio2_irqs, - .main_clk = "gpio2_ick", - .opt_clks = gpio2_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), -@@ -2106,11 +2022,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { - }; - - /* gpio3 */ --static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { -- { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { - { .role = "dbclk", .clk = "gpio3_dbck", }, - }; -@@ -2122,7 +2033,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = { - static struct omap_hwmod omap3xxx_gpio3_hwmod = { - .name = "gpio3", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap3xxx_gpio3_irqs, -+ .mpu_irqs = omap2_gpio3_irqs, - .main_clk = "gpio3_ick", - .opt_clks = gpio3_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), -@@ -2143,11 +2054,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { - }; - - /* gpio4 */ --static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { -- { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { - { .role = "dbclk", .clk = "gpio4_dbck", }, - }; -@@ -2159,7 +2065,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = { - static struct omap_hwmod omap3xxx_gpio4_hwmod = { - .name = "gpio4", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -- .mpu_irqs = omap3xxx_gpio4_irqs, -+ .mpu_irqs = omap2_gpio4_irqs, - .main_clk = "gpio4_ick", - .opt_clks = gpio4_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), -@@ -2287,14 +2193,6 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = { - }; - - /* dma_system */ --static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { -- { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ -- { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ -- { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ -- { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ -- { .irq = -1 } --}; -- - static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { - { - .pa_start = 0x48056000, -@@ -2326,7 +2224,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = { - static struct omap_hwmod omap3xxx_dma_system_hwmod = { - .name = "dma", - .class = &omap3xxx_dma_hwmod_class, -- .mpu_irqs = omap3xxx_dma_system_irqs, -+ .mpu_irqs = omap2_dma_system_irqs, - .main_clk = "core_l3_ick", - .prcm = { - .omap2 = { -@@ -3044,11 +2942,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { - }; - - /* mcspi1 */ --static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { -- { .name = "irq", .irq = 65 }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, - { .name = "rx0", .dma_req = 36 }, -@@ -3070,7 +2963,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - - static struct omap_hwmod omap34xx_mcspi1 = { - .name = "mcspi1", -- .mpu_irqs = omap34xx_mcspi1_mpu_irqs, -+ .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", -@@ -3091,11 +2984,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { - }; - - /* mcspi2 */ --static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { -- { .name = "irq", .irq = 66 }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, - { .name = "rx0", .dma_req = 44 }, -@@ -3113,7 +3001,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - - static struct omap_hwmod omap34xx_mcspi2 = { - .name = "mcspi2", -- .mpu_irqs = omap34xx_mcspi2_mpu_irqs, -+ .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h -index 76a2f11..1ac878c 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.h -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h -@@ -49,6 +49,35 @@ extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; - extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; - extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; - -+/* Common IP block data across OMAP2xxx */ -+extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; -+ -+/* Common IP block data across OMAP2/3 */ -+extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_dispc_irqs[]; -+extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_gpio1_irqs[]; -+extern struct omap_hwmod_irq_info omap2_gpio2_irqs[]; -+extern struct omap_hwmod_irq_info omap2_gpio3_irqs[]; -+extern struct omap_hwmod_irq_info omap2_gpio4_irqs[]; -+extern struct omap_hwmod_irq_info omap2_dma_system_irqs[]; -+extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[]; -+extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[]; -+ - /* OMAP hwmod classes - forward declarations */ - extern struct omap_hwmod_class l3_hwmod_class; - extern struct omap_hwmod_class l4_hwmod_class; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record-with-omap_hwmod_d.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record-with-omap_hwmod_d.patch deleted file mode 100644 index b1722a2..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record-with-omap_hwmod_d.patch +++ /dev/null @@ -1,1382 +0,0 @@ -From e890f701dbd58ecb9377097e1a565e34cbf73e4b Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sat, 9 Jul 2011 19:14:07 -0600 -Subject: [PATCH 041/149] omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays - -Previously, struct omap_hwmod_dma_info arrays were unterminated; and -users of these arrays used the ARRAY_SIZE() macro to determine the -length of the array. However, ARRAY_SIZE() only works when the array -is in the same scope as the macro user. - -So far this hasn't been a problem. However, to reduce duplicated -data, a subsequent patch will move common data to a separate, shared -file. When this is done, ARRAY_SIZE() will no longer be usable. - -This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info -arrays and uses a sentinel value (irq == -1) as the array terminator -instead. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++++++++- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 ++++---- - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 32 +++++++------- - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 43 +++++++++---------- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 60 +++++++++++++------------- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +-- - 6 files changed, 106 insertions(+), 87 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index b761968..7d242c9 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -702,6 +702,29 @@ static int _count_mpu_irqs(struct omap_hwmod *oh) - } - - /** -+ * _count_sdma_reqs - count the number of SDMA request lines associated with @oh -+ * @oh: struct omap_hwmod *oh -+ * -+ * Count and return the number of SDMA request lines associated with -+ * the hwmod @oh. Used to allocate struct resource data. Returns 0 -+ * if @oh is NULL. -+ */ -+static int _count_sdma_reqs(struct omap_hwmod *oh) -+{ -+ struct omap_hwmod_dma_info *ohdi; -+ int i = 0; -+ -+ if (!oh || !oh->sdma_reqs) -+ return 0; -+ -+ do { -+ ohdi = &oh->sdma_reqs[i++]; -+ } while (ohdi->dma_req != -1); -+ -+ return i; -+} -+ -+/** - * _count_ocp_if_addr_spaces - count the number of address space entries for @oh - * @oh: struct omap_hwmod *oh - * -@@ -2007,7 +2030,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) - { - int ret, i; - -- ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; -+ ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh); - - for (i = 0; i < oh->slaves_cnt; i++) - ret += _count_ocp_if_addr_spaces(oh->slaves[i]); -@@ -2027,7 +2050,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) - */ - int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) - { -- int i, j, mpu_irqs_cnt; -+ int i, j, mpu_irqs_cnt, sdma_reqs_cnt; - int r = 0; - - /* For each IRQ, DMA, memory area, fill in array.*/ -@@ -2041,7 +2064,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) - r++; - } - -- for (i = 0; i < oh->sdma_reqs_cnt; i++) { -+ sdma_reqs_cnt = _count_sdma_reqs(oh); -+ for (i = 0; i < sdma_reqs_cnt; i++) { - (res + r)->name = (oh->sdma_reqs + i)->name; - (res + r)->start = (oh->sdma_reqs + i)->dma_req; - (res + r)->end = (oh->sdma_reqs + i)->dma_req; -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index 73157ee..60c817e 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -831,6 +831,7 @@ static struct omap_hwmod_class uart_class = { - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { -@@ -841,7 +842,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", - .prcm = { - .omap2 = { -@@ -863,6 +863,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { -@@ -873,7 +874,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", - .prcm = { - .omap2 = { -@@ -895,6 +895,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { -@@ -905,7 +906,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", - .prcm = { - .omap2 = { -@@ -942,6 +942,7 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { - - static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, -+ { .dma_req = -1 } - }; - - /* dss */ -@@ -980,7 +981,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { - .class = &omap2420_dss_hwmod_class, - .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2420_dss_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), - .prcm = { - .omap2 = { - .prcm_reg_id = 1, -@@ -1186,6 +1186,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { -@@ -1196,7 +1197,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2c1_fck", - .prcm = { - .omap2 = { -@@ -1220,6 +1220,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { -@@ -1230,7 +1231,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2c2_fck", - .prcm = { - .omap2 = { -@@ -1611,6 +1611,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { -@@ -1625,7 +1626,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { - .name = "mcspi1_hwmod", - .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2420_mcspi1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", - .prcm = { - .omap2 = { -@@ -1649,6 +1649,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { -@@ -1663,7 +1664,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { - .name = "mcspi2_hwmod", - .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2420_mcspi2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", - .prcm = { - .omap2 = { -@@ -1700,6 +1700,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { - static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, -+ { .dma_req = -1 } - }; - - /* l4_core -> mcbsp1 */ -@@ -1721,7 +1722,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { - .class = &omap2420_mcbsp_hwmod_class, - .mpu_irqs = omap2420_mcbsp1_irqs, - .sdma_reqs = omap2420_mcbsp1_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), - .main_clk = "mcbsp1_fck", - .prcm = { - .omap2 = { -@@ -1747,6 +1747,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { - static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, -+ { .dma_req = -1 } - }; - - /* l4_core -> mcbsp2 */ -@@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { - .class = &omap2420_mcbsp_hwmod_class, - .mpu_irqs = omap2420_mcbsp2_irqs, - .sdma_reqs = omap2420_mcbsp2_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index 62ecc68..af758b3 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -903,6 +903,7 @@ static struct omap_hwmod_class uart_class = { - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { -@@ -913,7 +914,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", - .prcm = { - .omap2 = { -@@ -935,6 +935,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { -@@ -945,7 +946,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", - .prcm = { - .omap2 = { -@@ -967,6 +967,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { -@@ -977,7 +978,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", - .prcm = { - .omap2 = { -@@ -1014,6 +1014,7 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { - - static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, -+ { .dma_req = -1 } - }; - - /* dss */ -@@ -1046,7 +1047,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { - .class = &omap2430_dss_hwmod_class, - .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2430_dss_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), - .prcm = { - .omap2 = { - .prcm_reg_id = 1, -@@ -1237,6 +1237,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { -@@ -1247,7 +1248,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2chs1_fck", - .prcm = { - .omap2 = { -@@ -1278,6 +1278,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { -@@ -1288,7 +1289,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2chs2_fck", - .prcm = { - .omap2 = { -@@ -1716,6 +1716,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { -@@ -1730,7 +1731,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { - .name = "mcspi1_hwmod", - .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2430_mcspi1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", - .prcm = { - .omap2 = { -@@ -1754,6 +1754,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { -@@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { - .name = "mcspi2_hwmod", - .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2430_mcspi2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", - .prcm = { - .omap2 = { -@@ -1797,6 +1797,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { - { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ - { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ - { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { -@@ -1811,7 +1812,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { - .name = "mcspi3_hwmod", - .mpu_irqs = omap2430_mcspi3_mpu_irqs, - .sdma_reqs = omap2430_mcspi3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), - .main_clk = "mcspi3_fck", - .prcm = { - .omap2 = { -@@ -1915,6 +1915,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { - static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, -+ { .dma_req = -1 } - }; - - /* l4_core -> mcbsp1 */ -@@ -1936,7 +1937,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp1_irqs, - .sdma_reqs = omap2430_mcbsp1_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), - .main_clk = "mcbsp1_fck", - .prcm = { - .omap2 = { -@@ -1963,6 +1963,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { - static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, -+ { .dma_req = -1 } - }; - - /* l4_core -> mcbsp2 */ -@@ -1984,7 +1985,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp2_irqs, - .sdma_reqs = omap2430_mcbsp2_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { -@@ -2011,6 +2011,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { - static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { -@@ -2042,7 +2043,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp3_irqs, - .sdma_reqs = omap2430_mcbsp3_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), - .main_clk = "mcbsp3_fck", - .prcm = { - .omap2 = { -@@ -2069,6 +2069,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { - static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { - { .name = "rx", .dma_req = 20 }, - { .name = "tx", .dma_req = 19 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { -@@ -2100,7 +2101,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp4_irqs, - .sdma_reqs = omap2430_mcbsp4_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), - .main_clk = "mcbsp4_fck", - .prcm = { - .omap2 = { -@@ -2127,6 +2127,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { - static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { - { .name = "rx", .dma_req = 22 }, - { .name = "tx", .dma_req = 21 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { -@@ -2158,7 +2159,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp5_irqs, - .sdma_reqs = omap2430_mcbsp5_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), - .main_clk = "mcbsp5_fck", - .prcm = { - .omap2 = { -@@ -2202,6 +2202,7 @@ static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { - static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { - { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ - { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { -@@ -2221,7 +2222,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap2430_mmc1_mpu_irqs, - .sdma_reqs = omap2430_mmc1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), - .opt_clks = omap2430_mmc1_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), - .main_clk = "mmchs1_fck", -@@ -2251,6 +2251,7 @@ static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { - static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { - { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ - { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { -@@ -2266,7 +2267,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap2430_mmc2_mpu_irqs, - .sdma_reqs = omap2430_mmc2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), - .opt_clks = omap2430_mmc2_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), - .main_clk = "mmchs2_fck", -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 6bac4bb..265f0b1 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -1213,6 +1213,7 @@ static struct omap_hwmod_class uart_class = { - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { -@@ -1223,7 +1224,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), - .main_clk = "uart1_fck", - .prcm = { - .omap2 = { -@@ -1245,6 +1245,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { -@@ -1255,7 +1256,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), - .main_clk = "uart2_fck", - .prcm = { - .omap2 = { -@@ -1277,6 +1277,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { -@@ -1287,7 +1288,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), - .main_clk = "uart3_fck", - .prcm = { - .omap2 = { -@@ -1314,6 +1314,7 @@ static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { - static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, }, - { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { -@@ -1324,7 +1325,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { - .name = "uart4", - .mpu_irqs = uart4_mpu_irqs, - .sdma_reqs = uart4_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), - .main_clk = "uart4_fck", - .prcm = { - .omap2 = { -@@ -1367,6 +1367,7 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, - { .name = "dsi1", .dma_req = 74 }, -+ { .dma_req = -1 } - }; - - /* dss */ -@@ -1426,8 +1427,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { - .class = &omap3xxx_dss_hwmod_class, - .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ - .sdma_reqs = omap3xxx_dss_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), -- - .prcm = { - .omap2 = { - .prcm_reg_id = 1, -@@ -1452,8 +1451,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { - .class = &omap3xxx_dss_hwmod_class, - .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ - .sdma_reqs = omap3xxx_dss_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), -- - .prcm = { - .omap2 = { - .prcm_reg_id = 1, -@@ -1720,6 +1717,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { -@@ -1730,7 +1728,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), - .main_clk = "i2c1_fck", - .prcm = { - .omap2 = { -@@ -1757,6 +1754,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { -@@ -1767,7 +1765,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), - .main_clk = "i2c2_fck", - .prcm = { - .omap2 = { -@@ -1799,6 +1796,7 @@ static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { - static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX }, - { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { -@@ -1809,7 +1807,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = { - .name = "i2c3", - .mpu_irqs = i2c3_mpu_irqs, - .sdma_reqs = i2c3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), - .main_clk = "i2c3_fck", - .prcm = { - .omap2 = { -@@ -2275,6 +2272,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { - static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { -@@ -2306,7 +2304,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp1_irqs, - .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), - .main_clk = "mcbsp1_fck", - .prcm = { - .omap2 = { -@@ -2333,6 +2330,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { - static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { -@@ -2369,7 +2367,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp2_irqs, - .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { -@@ -2397,6 +2394,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { - static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { -@@ -2432,7 +2430,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp3_irqs, - .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), - .main_clk = "mcbsp3_fck", - .prcm = { - .omap2 = { -@@ -2460,6 +2457,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { - static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { - { .name = "rx", .dma_req = 20 }, - { .name = "tx", .dma_req = 19 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { -@@ -2491,7 +2489,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp4_irqs, - .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), - .main_clk = "mcbsp4_fck", - .prcm = { - .omap2 = { -@@ -2518,6 +2515,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { - static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { - { .name = "rx", .dma_req = 22 }, - { .name = "tx", .dma_req = 21 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { -@@ -2549,7 +2547,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp5_irqs, - .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), - .main_clk = "mcbsp5_fck", - .prcm = { - .omap2 = { -@@ -2951,6 +2948,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { - { .name = "rx2", .dma_req = 40 }, - { .name = "tx3", .dma_req = 41 }, - { .name = "rx3", .dma_req = 42 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { -@@ -2965,7 +2963,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { - .name = "mcspi1", - .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", - .prcm = { - .omap2 = { -@@ -2989,6 +2986,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { - { .name = "rx0", .dma_req = 44 }, - { .name = "tx1", .dma_req = 45 }, - { .name = "rx1", .dma_req = 46 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { -@@ -3003,7 +3001,6 @@ static struct omap_hwmod omap34xx_mcspi2 = { - .name = "mcspi2", - .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", - .prcm = { - .omap2 = { -@@ -3032,6 +3029,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { - { .name = "rx0", .dma_req = 16 }, - { .name = "tx1", .dma_req = 23 }, - { .name = "rx1", .dma_req = 24 }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = { -@@ -3046,7 +3044,6 @@ static struct omap_hwmod omap34xx_mcspi3 = { - .name = "mcspi3", - .mpu_irqs = omap34xx_mcspi3_mpu_irqs, - .sdma_reqs = omap34xx_mcspi3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), - .main_clk = "mcspi3_fck", - .prcm = { - .omap2 = { -@@ -3073,6 +3070,7 @@ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { - static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { - { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */ - { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */ -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = { -@@ -3087,7 +3085,6 @@ static struct omap_hwmod omap34xx_mcspi4 = { - .name = "mcspi4", - .mpu_irqs = omap34xx_mcspi4_mpu_irqs, - .sdma_reqs = omap34xx_mcspi4_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), - .main_clk = "mcspi4_fck", - .prcm = { - .omap2 = { -@@ -3218,6 +3215,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { - static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { - { .name = "tx", .dma_req = 61, }, - { .name = "rx", .dma_req = 62, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = { -@@ -3236,7 +3234,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { - .name = "mmc1", - .mpu_irqs = omap34xx_mmc1_mpu_irqs, - .sdma_reqs = omap34xx_mmc1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), - .opt_clks = omap34xx_mmc1_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), - .main_clk = "mmchs1_fck", -@@ -3266,6 +3263,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { - static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { - { .name = "tx", .dma_req = 47, }, - { .name = "rx", .dma_req = 48, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = { -@@ -3280,7 +3278,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { - .name = "mmc2", - .mpu_irqs = omap34xx_mmc2_mpu_irqs, - .sdma_reqs = omap34xx_mmc2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), - .opt_clks = omap34xx_mmc2_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), - .main_clk = "mmchs2_fck", -@@ -3309,6 +3306,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { - static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { - { .name = "tx", .dma_req = 77, }, - { .name = "rx", .dma_req = 78, }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { -@@ -3323,7 +3321,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = { - .name = "mmc3", - .mpu_irqs = omap34xx_mmc3_mpu_irqs, - .sdma_reqs = omap34xx_mmc3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), - .opt_clks = omap34xx_mmc3_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks), - .main_clk = "mmchs3_fck", -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index f7ff937..316e922 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -685,6 +685,7 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { - { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START }, - { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START }, - { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - /* aess master ports */ -@@ -739,7 +740,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { - .class = &omap44xx_aess_hwmod_class, - .mpu_irqs = omap44xx_aess_irqs, - .sdma_reqs = omap44xx_aess_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), - .main_clk = "aess_fck", - .prcm = { - .omap4 = { -@@ -954,6 +954,7 @@ static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { - - static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { - { .dma_req = 66 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { -@@ -1003,7 +1004,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { - .class = &omap44xx_dmic_hwmod_class, - .mpu_irqs = omap44xx_dmic_irqs, - .sdma_reqs = omap44xx_dmic_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), - .main_clk = "dmic_fck", - .prcm = { - .omap4 = { -@@ -1221,6 +1221,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { - - static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { - { .dma_req = 5 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { -@@ -1270,7 +1271,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { - .class = &omap44xx_dispc_hwmod_class, - .mpu_irqs = omap44xx_dss_dispc_irqs, - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), - .main_clk = "dss_fck", - .prcm = { - .omap4 = { -@@ -1312,6 +1312,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { - - static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { - { .dma_req = 74 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { -@@ -1361,7 +1362,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - .class = &omap44xx_dsi_hwmod_class, - .mpu_irqs = omap44xx_dss_dsi1_irqs, - .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), - .main_clk = "dss_fck", - .prcm = { - .omap4 = { -@@ -1382,6 +1382,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { - - static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { - { .dma_req = 83 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { -@@ -1431,7 +1432,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { - .class = &omap44xx_dsi_hwmod_class, - .mpu_irqs = omap44xx_dss_dsi2_irqs, - .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), - .main_clk = "dss_fck", - .prcm = { - .omap4 = { -@@ -1472,6 +1472,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { - - static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { - { .dma_req = 75 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { -@@ -1521,7 +1522,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { - .class = &omap44xx_hdmi_hwmod_class, - .mpu_irqs = omap44xx_dss_hdmi_irqs, - .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), - .main_clk = "dss_fck", - .prcm = { - .omap4 = { -@@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = { - static struct omap_hwmod omap44xx_dss_rfbi_hwmod; - static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { - { .dma_req = 13 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { -@@ -1605,7 +1606,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { - .name = "dss_rfbi", - .class = &omap44xx_rfbi_hwmod_class, - .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs), - .main_clk = "dss_fck", - .prcm = { - .omap4 = { -@@ -2138,6 +2138,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { -@@ -2169,7 +2170,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { - .flags = HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c1_irqs, - .sdma_reqs = omap44xx_i2c1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), - .main_clk = "i2c1_fck", - .prcm = { - .omap4 = { -@@ -2191,6 +2191,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { -@@ -2222,7 +2223,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { - .flags = HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c2_irqs, - .sdma_reqs = omap44xx_i2c2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), - .main_clk = "i2c2_fck", - .prcm = { - .omap4 = { -@@ -2244,6 +2244,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { - { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { -@@ -2275,7 +2276,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { - .flags = HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c3_irqs, - .sdma_reqs = omap44xx_i2c3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), - .main_clk = "i2c3_fck", - .prcm = { - .omap4 = { -@@ -2297,6 +2297,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { - { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { -@@ -2328,7 +2329,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { - .flags = HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c4_irqs, - .sdma_reqs = omap44xx_i2c4_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), - .main_clk = "i2c4_fck", - .prcm = { - .omap4 = { -@@ -2467,6 +2467,7 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { - { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START }, - { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START }, - { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - /* iss master ports */ -@@ -2506,7 +2507,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { - .class = &omap44xx_iss_hwmod_class, - .mpu_irqs = omap44xx_iss_irqs, - .sdma_reqs = omap44xx_iss_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), - .main_clk = "iss_fck", - .prcm = { - .omap4 = { -@@ -2791,6 +2791,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { - { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { -@@ -2842,7 +2843,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { - .class = &omap44xx_mcbsp_hwmod_class, - .mpu_irqs = omap44xx_mcbsp1_irqs, - .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), - .main_clk = "mcbsp1_fck", - .prcm = { - .omap4 = { -@@ -2864,6 +2864,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { - { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { -@@ -2915,7 +2916,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { - .class = &omap44xx_mcbsp_hwmod_class, - .mpu_irqs = omap44xx_mcbsp2_irqs, - .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), - .main_clk = "mcbsp2_fck", - .prcm = { - .omap4 = { -@@ -2937,6 +2937,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { - { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { -@@ -2988,7 +2989,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { - .class = &omap44xx_mcbsp_hwmod_class, - .mpu_irqs = omap44xx_mcbsp3_irqs, - .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), - .main_clk = "mcbsp3_fck", - .prcm = { - .omap4 = { -@@ -3010,6 +3010,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { - { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { -@@ -3040,7 +3041,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { - .class = &omap44xx_mcbsp_hwmod_class, - .mpu_irqs = omap44xx_mcbsp4_irqs, - .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), - .main_clk = "mcbsp4_fck", - .prcm = { - .omap4 = { -@@ -3083,6 +3083,7 @@ static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { - { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START }, - { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { -@@ -3132,7 +3133,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { - .class = &omap44xx_mcpdm_hwmod_class, - .mpu_irqs = omap44xx_mcpdm_irqs, - .sdma_reqs = omap44xx_mcpdm_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), - .main_clk = "mcpdm_fck", - .prcm = { - .omap4 = { -@@ -3182,6 +3182,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { - { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START }, - { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START }, - { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { -@@ -3217,7 +3218,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { - .class = &omap44xx_mcspi_hwmod_class, - .mpu_irqs = omap44xx_mcspi1_irqs, - .sdma_reqs = omap44xx_mcspi1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), - .main_clk = "mcspi1_fck", - .prcm = { - .omap4 = { -@@ -3242,6 +3242,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { - { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START }, - { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START }, - { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { -@@ -3277,7 +3278,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { - .class = &omap44xx_mcspi_hwmod_class, - .mpu_irqs = omap44xx_mcspi2_irqs, - .sdma_reqs = omap44xx_mcspi2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), - .main_clk = "mcspi2_fck", - .prcm = { - .omap4 = { -@@ -3302,6 +3302,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { - { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START }, - { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START }, - { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { -@@ -3337,7 +3338,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { - .class = &omap44xx_mcspi_hwmod_class, - .mpu_irqs = omap44xx_mcspi3_irqs, - .sdma_reqs = omap44xx_mcspi3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), - .main_clk = "mcspi3_fck", - .prcm = { - .omap4 = { -@@ -3360,6 +3360,7 @@ static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { - { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START }, - { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { -@@ -3395,7 +3396,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { - .class = &omap44xx_mcspi_hwmod_class, - .mpu_irqs = omap44xx_mcspi4_irqs, - .sdma_reqs = omap44xx_mcspi4_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), - .main_clk = "mcspi4_fck", - .prcm = { - .omap4 = { -@@ -3440,6 +3440,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { - { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - /* mmc1 master ports */ -@@ -3480,7 +3481,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc1_irqs, - .sdma_reqs = omap44xx_mmc1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), - .main_clk = "mmc1_fck", - .prcm = { - .omap4 = { -@@ -3504,6 +3504,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { - { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - /* mmc2 master ports */ -@@ -3539,7 +3540,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc2_irqs, - .sdma_reqs = omap44xx_mmc2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), - .main_clk = "mmc2_fck", - .prcm = { - .omap4 = { -@@ -3563,6 +3563,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { - { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { -@@ -3593,7 +3594,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc3_irqs, - .sdma_reqs = omap44xx_mmc3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), - .main_clk = "mmc3_fck", - .prcm = { - .omap4 = { -@@ -3615,6 +3615,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { - { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { -@@ -3646,7 +3647,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { - .mpu_irqs = omap44xx_mmc4_irqs, - - .sdma_reqs = omap44xx_mmc4_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), - .main_clk = "mmc4_fck", - .prcm = { - .omap4 = { -@@ -3668,6 +3668,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { - { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { -@@ -3698,7 +3699,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { - .class = &omap44xx_mmc_hwmod_class, - .mpu_irqs = omap44xx_mmc5_irqs, - .sdma_reqs = omap44xx_mmc5_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), - .main_clk = "mmc5_fck", - .prcm = { - .omap4 = { -@@ -4618,6 +4618,7 @@ static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { - { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { -@@ -4648,7 +4649,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { - .class = &omap44xx_uart_hwmod_class, - .mpu_irqs = omap44xx_uart1_irqs, - .sdma_reqs = omap44xx_uart1_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), - .main_clk = "uart1_fck", - .prcm = { - .omap4 = { -@@ -4670,6 +4670,7 @@ static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { - { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { -@@ -4700,7 +4701,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { - .class = &omap44xx_uart_hwmod_class, - .mpu_irqs = omap44xx_uart2_irqs, - .sdma_reqs = omap44xx_uart2_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), - .main_clk = "uart2_fck", - .prcm = { - .omap4 = { -@@ -4722,6 +4722,7 @@ static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { - { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { -@@ -4753,7 +4754,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .mpu_irqs = omap44xx_uart3_irqs, - .sdma_reqs = omap44xx_uart3_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), - .main_clk = "uart3_fck", - .prcm = { - .omap4 = { -@@ -4775,6 +4775,7 @@ static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { - static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { - { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START }, - { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START }, -+ { .dma_req = -1 } - }; - - static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { -@@ -4805,7 +4806,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { - .class = &omap44xx_uart_hwmod_class, - .mpu_irqs = omap44xx_uart4_irqs, - .sdma_reqs = omap44xx_uart4_sdma_reqs, -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), - .main_clk = "uart4_fck", - .prcm = { - .omap4 = { -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index b8385e2..ce06ac6 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -111,7 +111,7 @@ struct omap_hwmod_irq_info { - /** - * struct omap_hwmod_dma_info - DMA channels used by the hwmod - * @name: name of the DMA channel (module local name) -- * @dma_req: DMA request ID -+ * @dma_req: DMA request ID (should be non-negative except -1 = terminator) - * - * @name should be something short, e.g., "tx" or "rx". It is for use - * by platform_get_resource_byname(). It is defined locally to the -@@ -119,7 +119,7 @@ struct omap_hwmod_irq_info { - */ - struct omap_hwmod_dma_info { - const char *name; -- u16 dma_req; -+ s16 dma_req; - }; - - /** -@@ -467,7 +467,7 @@ struct omap_hwmod_class { - * @class: struct omap_hwmod_class * to the class of this hwmod - * @od: struct omap_device currently associated with this hwmod (internal use) - * @mpu_irqs: ptr to an array of MPU IRQs -- * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) -+ * @sdma_reqs: ptr to an array of System DMA request IDs - * @prcm: PRCM data pertaining to this hwmod - * @main_clk: main clock: OMAP clock name - * @_clk: pointer to the main struct clk (filled in at runtime) -@@ -480,7 +480,6 @@ struct omap_hwmod_class { - * @_sysc_cache: internal-use hwmod flags - * @_mpu_rt_va: cached register target start address (internal use) - * @_mpu_port_index: cached MPU register target slave ID (internal use) -- * @sdma_reqs_cnt: number of @sdma_reqs - * @opt_clks_cnt: number of @opt_clks - * @master_cnt: number of @master entries - * @slaves_cnt: number of @slave entries -@@ -528,7 +527,6 @@ struct omap_hwmod { - u16 flags; - u8 _mpu_port_index; - u8 response_lat; -- u8 sdma_reqs_cnt; - u8 rst_lines_cnt; - u8 opt_clks_cnt; - u8 masters_cnt; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod-share-identical-omap_hwmod_dma_info-array.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod-share-identical-omap_hwmod_dma_info-array.patch deleted file mode 100644 index 56bc227..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod-share-identical-omap_hwmod_dma_info-array.patch +++ /dev/null @@ -1,935 +0,0 @@ -From 79a8b76e605e0930ef1c52c2a757eb523340cda1 Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sat, 9 Jul 2011 19:14:07 -0600 -Subject: [PATCH 042/149] omap_hwmod: share identical omap_hwmod_dma_info arrays - -To reduce kernel source file data duplication, share struct -omap_hwmod_dma_info arrays across OMAP2xxx and 3xxx hwmod data files. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 87 ++---------------- - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 95 +++----------------- - .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 92 +++++++++++++++++++ - arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 6 ++ - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 89 ++---------------- - arch/arm/mach-omap2/omap_hwmod_common_data.c | 20 ---- - arch/arm/mach-omap2/omap_hwmod_common_data.h | 15 +++ - 7 files changed, 144 insertions(+), 260 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index 60c817e..6acc01f 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -828,12 +828,6 @@ static struct omap_hwmod_class uart_class = { - - /* UART1 */ - --static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { - &omap2_l4_core__uart1, - }; -@@ -841,7 +835,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { - static struct omap_hwmod omap2420_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = omap2_uart1_mpu_irqs, -- .sdma_reqs = uart1_sdma_reqs, -+ .sdma_reqs = omap2_uart1_sdma_reqs, - .main_clk = "uart1_fck", - .prcm = { - .omap2 = { -@@ -860,12 +854,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { - - /* UART2 */ - --static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { - &omap2_l4_core__uart2, - }; -@@ -873,7 +861,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { - static struct omap_hwmod omap2420_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = omap2_uart2_mpu_irqs, -- .sdma_reqs = uart2_sdma_reqs, -+ .sdma_reqs = omap2_uart2_sdma_reqs, - .main_clk = "uart2_fck", - .prcm = { - .omap2 = { -@@ -892,12 +880,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { - - /* UART3 */ - --static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { - &omap2_l4_core__uart3, - }; -@@ -905,7 +887,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { - static struct omap_hwmod omap2420_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = omap2_uart3_mpu_irqs, -- .sdma_reqs = uart3_sdma_reqs, -+ .sdma_reqs = omap2_uart3_sdma_reqs, - .main_clk = "uart3_fck", - .prcm = { - .omap2 = { -@@ -940,11 +922,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { - .sysc = &omap2420_dss_sysc, - }; - --static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { -- { .name = "dispc", .dma_req = 5 }, -- { .dma_req = -1 } --}; -- - /* dss */ - /* dss master ports */ - static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { -@@ -980,7 +957,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { - .name = "dss_core", - .class = &omap2420_dss_hwmod_class, - .main_clk = "dss1_fck", /* instead of dss_fck */ -- .sdma_reqs = omap2420_dss_sdma_chs, -+ .sdma_reqs = omap2xxx_dss_sdma_chs, - .prcm = { - .omap2 = { - .prcm_reg_id = 1, -@@ -1183,12 +1160,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; - - /* I2C1 */ - --static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { - &omap2420_l4_core__i2c1, - }; -@@ -1196,7 +1167,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { - static struct omap_hwmod omap2420_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = omap2_i2c1_mpu_irqs, -- .sdma_reqs = i2c1_sdma_reqs, -+ .sdma_reqs = omap2_i2c1_sdma_reqs, - .main_clk = "i2c1_fck", - .prcm = { - .omap2 = { -@@ -1217,12 +1188,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { - - /* I2C2 */ - --static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { - &omap2420_l4_core__i2c2, - }; -@@ -1230,7 +1195,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { - static struct omap_hwmod omap2420_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = omap2_i2c2_mpu_irqs, -- .sdma_reqs = i2c2_sdma_reqs, -+ .sdma_reqs = omap2_i2c2_sdma_reqs, - .main_clk = "i2c2_fck", - .prcm = { - .omap2 = { -@@ -1602,18 +1567,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { - }; - - /* mcspi1 */ --static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { -- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ -- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ -- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ -- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ -- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ -- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ -- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ -- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { - &omap2420_l4_core__mcspi1, - }; -@@ -1625,7 +1578,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - static struct omap_hwmod omap2420_mcspi1_hwmod = { - .name = "mcspi1_hwmod", - .mpu_irqs = omap2_mcspi1_mpu_irqs, -- .sdma_reqs = omap2420_mcspi1_sdma_reqs, -+ .sdma_reqs = omap2_mcspi1_sdma_reqs, - .main_clk = "mcspi1_fck", - .prcm = { - .omap2 = { -@@ -1644,14 +1597,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { - }; - - /* mcspi2 */ --static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { -- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ -- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ -- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ -- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { - &omap2420_l4_core__mcspi2, - }; -@@ -1663,7 +1608,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - static struct omap_hwmod omap2420_mcspi2_hwmod = { - .name = "mcspi2_hwmod", - .mpu_irqs = omap2_mcspi2_mpu_irqs, -- .sdma_reqs = omap2420_mcspi2_sdma_reqs, -+ .sdma_reqs = omap2_mcspi2_sdma_reqs, - .main_clk = "mcspi2_fck", - .prcm = { - .omap2 = { -@@ -1697,12 +1642,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { - { .irq = -1 } - }; - --static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { -- { .name = "rx", .dma_req = 32 }, -- { .name = "tx", .dma_req = 31 }, -- { .dma_req = -1 } --}; -- - /* l4_core -> mcbsp1 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { - .master = &omap2420_l4_core_hwmod, -@@ -1721,7 +1660,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { - .name = "mcbsp1", - .class = &omap2420_mcbsp_hwmod_class, - .mpu_irqs = omap2420_mcbsp1_irqs, -- .sdma_reqs = omap2420_mcbsp1_sdma_chs, -+ .sdma_reqs = omap2_mcbsp1_sdma_reqs, - .main_clk = "mcbsp1_fck", - .prcm = { - .omap2 = { -@@ -1744,12 +1683,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { - { .irq = -1 } - }; - --static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { -- { .name = "rx", .dma_req = 34 }, -- { .name = "tx", .dma_req = 33 }, -- { .dma_req = -1 } --}; -- - /* l4_core -> mcbsp2 */ - static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { - .master = &omap2420_l4_core_hwmod, -@@ -1768,7 +1701,7 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { - .name = "mcbsp2", - .class = &omap2420_mcbsp_hwmod_class, - .mpu_irqs = omap2420_mcbsp2_irqs, -- .sdma_reqs = omap2420_mcbsp2_sdma_chs, -+ .sdma_reqs = omap2_mcbsp2_sdma_reqs, - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index af758b3..639acd5 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -900,12 +900,6 @@ static struct omap_hwmod_class uart_class = { - - /* UART1 */ - --static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { - &omap2_l4_core__uart1, - }; -@@ -913,7 +907,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { - static struct omap_hwmod omap2430_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = omap2_uart1_mpu_irqs, -- .sdma_reqs = uart1_sdma_reqs, -+ .sdma_reqs = omap2_uart1_sdma_reqs, - .main_clk = "uart1_fck", - .prcm = { - .omap2 = { -@@ -932,12 +926,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { - - /* UART2 */ - --static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { - &omap2_l4_core__uart2, - }; -@@ -945,7 +933,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { - static struct omap_hwmod omap2430_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = omap2_uart2_mpu_irqs, -- .sdma_reqs = uart2_sdma_reqs, -+ .sdma_reqs = omap2_uart2_sdma_reqs, - .main_clk = "uart2_fck", - .prcm = { - .omap2 = { -@@ -964,12 +952,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { - - /* UART3 */ - --static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { - &omap2_l4_core__uart3, - }; -@@ -977,7 +959,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { - static struct omap_hwmod omap2430_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = omap2_uart3_mpu_irqs, -- .sdma_reqs = uart3_sdma_reqs, -+ .sdma_reqs = omap2_uart3_sdma_reqs, - .main_clk = "uart3_fck", - .prcm = { - .omap2 = { -@@ -1012,11 +994,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { - .sysc = &omap2430_dss_sysc, - }; - --static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { -- { .name = "dispc", .dma_req = 5 }, -- { .dma_req = -1 } --}; -- - /* dss */ - /* dss master ports */ - static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { -@@ -1046,7 +1023,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { - .name = "dss_core", - .class = &omap2430_dss_hwmod_class, - .main_clk = "dss1_fck", /* instead of dss_fck */ -- .sdma_reqs = omap2430_dss_sdma_chs, -+ .sdma_reqs = omap2xxx_dss_sdma_chs, - .prcm = { - .omap2 = { - .prcm_reg_id = 1, -@@ -1234,12 +1211,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { - - /* I2C1 */ - --static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { - &omap2430_l4_core__i2c1, - }; -@@ -1247,7 +1218,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { - static struct omap_hwmod omap2430_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = omap2_i2c1_mpu_irqs, -- .sdma_reqs = i2c1_sdma_reqs, -+ .sdma_reqs = omap2_i2c1_sdma_reqs, - .main_clk = "i2chs1_fck", - .prcm = { - .omap2 = { -@@ -1275,12 +1246,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { - - /* I2C2 */ - --static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { - &omap2430_l4_core__i2c2, - }; -@@ -1288,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { - static struct omap_hwmod omap2430_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = omap2_i2c2_mpu_irqs, -- .sdma_reqs = i2c2_sdma_reqs, -+ .sdma_reqs = omap2_i2c2_sdma_reqs, - .main_clk = "i2chs2_fck", - .prcm = { - .omap2 = { -@@ -1707,18 +1672,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { - }; - - /* mcspi1 */ --static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { -- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ -- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ -- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ -- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ -- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ -- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ -- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ -- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { - &omap2430_l4_core__mcspi1, - }; -@@ -1730,7 +1683,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - static struct omap_hwmod omap2430_mcspi1_hwmod = { - .name = "mcspi1_hwmod", - .mpu_irqs = omap2_mcspi1_mpu_irqs, -- .sdma_reqs = omap2430_mcspi1_sdma_reqs, -+ .sdma_reqs = omap2_mcspi1_sdma_reqs, - .main_clk = "mcspi1_fck", - .prcm = { - .omap2 = { -@@ -1749,14 +1702,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { - }; - - /* mcspi2 */ --static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { -- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ -- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ -- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ -- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { - &omap2430_l4_core__mcspi2, - }; -@@ -1768,7 +1713,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - static struct omap_hwmod omap2430_mcspi2_hwmod = { - .name = "mcspi2_hwmod", - .mpu_irqs = omap2_mcspi2_mpu_irqs, -- .sdma_reqs = omap2430_mcspi2_sdma_reqs, -+ .sdma_reqs = omap2_mcspi2_sdma_reqs, - .main_clk = "mcspi2_fck", - .prcm = { - .omap2 = { -@@ -1912,12 +1857,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { - { .irq = -1 } - }; - --static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { -- { .name = "rx", .dma_req = 32 }, -- { .name = "tx", .dma_req = 31 }, -- { .dma_req = -1 } --}; -- - /* l4_core -> mcbsp1 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { - .master = &omap2430_l4_core_hwmod, -@@ -1936,7 +1875,7 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { - .name = "mcbsp1", - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp1_irqs, -- .sdma_reqs = omap2430_mcbsp1_sdma_chs, -+ .sdma_reqs = omap2_mcbsp1_sdma_reqs, - .main_clk = "mcbsp1_fck", - .prcm = { - .omap2 = { -@@ -1960,12 +1899,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { - { .irq = -1 } - }; - --static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { -- { .name = "rx", .dma_req = 34 }, -- { .name = "tx", .dma_req = 33 }, -- { .dma_req = -1 } --}; -- - /* l4_core -> mcbsp2 */ - static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { - .master = &omap2430_l4_core_hwmod, -@@ -1984,7 +1917,7 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { - .name = "mcbsp2", - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp2_irqs, -- .sdma_reqs = omap2430_mcbsp2_sdma_chs, -+ .sdma_reqs = omap2_mcbsp2_sdma_reqs, - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { -@@ -2008,12 +1941,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { - { .irq = -1 } - }; - --static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { -- { .name = "rx", .dma_req = 18 }, -- { .name = "tx", .dma_req = 17 }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { - { - .name = "mpu", -@@ -2042,7 +1969,7 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { - .name = "mcbsp3", - .class = &omap2430_mcbsp_hwmod_class, - .mpu_irqs = omap2430_mcbsp3_irqs, -- .sdma_reqs = omap2430_mcbsp3_sdma_chs, -+ .sdma_reqs = omap2_mcbsp3_sdma_reqs, - .main_clk = "mcbsp3_fck", - .prcm = { - .omap2 = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c -index 245294b..7c4f5ab 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c -@@ -10,11 +10,35 @@ - */ - #include <plat/omap_hwmod.h> - #include <plat/serial.h> -+#include <plat/dma.h> - - #include <mach/irqs.h> - - #include "omap_hwmod_common_data.h" - -+ -+/* -+ * omap_hwmod class data -+ */ -+ -+struct omap_hwmod_class l3_hwmod_class = { -+ .name = "l3" -+}; -+ -+struct omap_hwmod_class l4_hwmod_class = { -+ .name = "l4" -+}; -+ -+struct omap_hwmod_class mpu_hwmod_class = { -+ .name = "mpu" -+}; -+ -+struct omap_hwmod_class iva_hwmod_class = { -+ .name = "iva" -+}; -+ -+/* Common MPU IRQ line data */ -+ - struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { - { .irq = 37, }, - { .irq = -1 } -@@ -138,5 +162,73 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { - { .irq = -1 } - }; - -+/* Common DMA request line data */ -+struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { -+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, -+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { -+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, -+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { -+ { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ -+ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ -+ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ -+ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ -+ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ -+ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ -+ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ -+ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { -+ { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ -+ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ -+ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ -+ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { -+ { .name = "rx", .dma_req = 32 }, -+ { .name = "tx", .dma_req = 31 }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { -+ { .name = "rx", .dma_req = 34 }, -+ { .name = "tx", .dma_req = 33 }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { -+ { .name = "rx", .dma_req = 18 }, -+ { .name = "tx", .dma_req = 17 }, -+ { .dma_req = -1 } -+}; - - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c -index 5a078a6..f5b63ef 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c -@@ -10,6 +10,7 @@ - */ - #include <plat/omap_hwmod.h> - #include <plat/serial.h> -+#include <plat/dma.h> - - #include <mach/irqs.h> - -@@ -19,3 +20,8 @@ struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { - { .irq = 48, }, - { .irq = -1 } - }; -+ -+struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { -+ { .name = "dispc", .dma_req = 5 }, -+ { .dma_req = -1 } -+}; -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 265f0b1..001f67b 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -1210,12 +1210,6 @@ static struct omap_hwmod_class uart_class = { - - /* UART1 */ - --static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { - &omap3_l4_core__uart1, - }; -@@ -1223,7 +1217,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { - static struct omap_hwmod omap3xxx_uart1_hwmod = { - .name = "uart1", - .mpu_irqs = omap2_uart1_mpu_irqs, -- .sdma_reqs = uart1_sdma_reqs, -+ .sdma_reqs = omap2_uart1_sdma_reqs, - .main_clk = "uart1_fck", - .prcm = { - .omap2 = { -@@ -1242,12 +1236,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { - - /* UART2 */ - --static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { - &omap3_l4_core__uart2, - }; -@@ -1255,7 +1243,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { - static struct omap_hwmod omap3xxx_uart2_hwmod = { - .name = "uart2", - .mpu_irqs = omap2_uart2_mpu_irqs, -- .sdma_reqs = uart2_sdma_reqs, -+ .sdma_reqs = omap2_uart2_sdma_reqs, - .main_clk = "uart2_fck", - .prcm = { - .omap2 = { -@@ -1274,12 +1262,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { - - /* UART3 */ - --static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { - &omap3_l4_per__uart3, - }; -@@ -1287,7 +1269,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { - static struct omap_hwmod omap3xxx_uart3_hwmod = { - .name = "uart3", - .mpu_irqs = omap2_uart3_mpu_irqs, -- .sdma_reqs = uart3_sdma_reqs, -+ .sdma_reqs = omap2_uart3_sdma_reqs, - .main_clk = "uart3_fck", - .prcm = { - .omap2 = { -@@ -1714,12 +1696,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { - .fifo_depth = 8, /* bytes */ - }; - --static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { - &omap3_l4_core__i2c1, - }; -@@ -1727,7 +1703,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { - static struct omap_hwmod omap3xxx_i2c1_hwmod = { - .name = "i2c1", - .mpu_irqs = omap2_i2c1_mpu_irqs, -- .sdma_reqs = i2c1_sdma_reqs, -+ .sdma_reqs = omap2_i2c1_sdma_reqs, - .main_clk = "i2c1_fck", - .prcm = { - .omap2 = { -@@ -1751,12 +1727,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { - .fifo_depth = 8, /* bytes */ - }; - --static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { - &omap3_l4_core__i2c2, - }; -@@ -1764,7 +1734,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { - static struct omap_hwmod omap3xxx_i2c2_hwmod = { - .name = "i2c2", - .mpu_irqs = omap2_i2c2_mpu_irqs, -- .sdma_reqs = i2c2_sdma_reqs, -+ .sdma_reqs = omap2_i2c2_sdma_reqs, - .main_clk = "i2c2_fck", - .prcm = { - .omap2 = { -@@ -2269,12 +2239,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { - { .irq = -1 } - }; - --static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { -- { .name = "rx", .dma_req = 32 }, -- { .name = "tx", .dma_req = 31 }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { - { - .name = "mpu", -@@ -2303,7 +2267,7 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { - .name = "mcbsp1", - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp1_irqs, -- .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, -+ .sdma_reqs = omap2_mcbsp1_sdma_reqs, - .main_clk = "mcbsp1_fck", - .prcm = { - .omap2 = { -@@ -2327,12 +2291,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { - { .irq = -1 } - }; - --static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { -- { .name = "rx", .dma_req = 34 }, -- { .name = "tx", .dma_req = 33 }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { - { - .name = "mpu", -@@ -2349,7 +2307,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { - .slave = &omap3xxx_mcbsp2_hwmod, - .clk = "mcbsp2_ick", - .addr = omap3xxx_mcbsp2_addrs, -- - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - -@@ -2366,7 +2323,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { - .name = "mcbsp2", - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp2_irqs, -- .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, -+ .sdma_reqs = omap2_mcbsp2_sdma_reqs, - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { -@@ -2391,12 +2348,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { - { .irq = -1 } - }; - --static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { -- { .name = "rx", .dma_req = 18 }, -- { .name = "tx", .dma_req = 17 }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { - { - .name = "mpu", -@@ -2429,7 +2380,7 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { - .name = "mcbsp3", - .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp3_irqs, -- .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, -+ .sdma_reqs = omap2_mcbsp3_sdma_reqs, - .main_clk = "mcbsp3_fck", - .prcm = { - .omap2 = { -@@ -2939,18 +2890,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { - }; - - /* mcspi1 */ --static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { -- { .name = "tx0", .dma_req = 35 }, -- { .name = "rx0", .dma_req = 36 }, -- { .name = "tx1", .dma_req = 37 }, -- { .name = "rx1", .dma_req = 38 }, -- { .name = "tx2", .dma_req = 39 }, -- { .name = "rx2", .dma_req = 40 }, -- { .name = "tx3", .dma_req = 41 }, -- { .name = "rx3", .dma_req = 42 }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { - &omap34xx_l4_core__mcspi1, - }; -@@ -2962,7 +2901,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { - static struct omap_hwmod omap34xx_mcspi1 = { - .name = "mcspi1", - .mpu_irqs = omap2_mcspi1_mpu_irqs, -- .sdma_reqs = omap34xx_mcspi1_sdma_reqs, -+ .sdma_reqs = omap2_mcspi1_sdma_reqs, - .main_clk = "mcspi1_fck", - .prcm = { - .omap2 = { -@@ -2981,14 +2920,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { - }; - - /* mcspi2 */ --static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { -- { .name = "tx0", .dma_req = 43 }, -- { .name = "rx0", .dma_req = 44 }, -- { .name = "tx1", .dma_req = 45 }, -- { .name = "rx1", .dma_req = 46 }, -- { .dma_req = -1 } --}; -- - static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { - &omap34xx_l4_core__mcspi2, - }; -@@ -3000,7 +2931,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { - static struct omap_hwmod omap34xx_mcspi2 = { - .name = "mcspi2", - .mpu_irqs = omap2_mcspi2_mpu_irqs, -- .sdma_reqs = omap34xx_mcspi2_sdma_reqs, -+ .sdma_reqs = omap2_mcspi2_sdma_reqs, - .main_clk = "mcspi2_fck", - .prcm = { - .omap2 = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c -index 08a1342..de832eb 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c -@@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = { - .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, - }; - -- --/* -- * omap_hwmod class data -- */ -- --struct omap_hwmod_class l3_hwmod_class = { -- .name = "l3" --}; -- --struct omap_hwmod_class l4_hwmod_class = { -- .name = "l4" --}; -- --struct omap_hwmod_class mpu_hwmod_class = { -- .name = "mpu" --}; -- --struct omap_hwmod_class iva_hwmod_class = { -- .name = "iva" --}; -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h -index 1ac878c..b636cf6 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.h -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h -@@ -51,6 +51,21 @@ extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; - - /* Common IP block data across OMAP2xxx */ - extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; -+extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[]; -+ -+/* Common IP block data */ -+extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[]; -+extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[]; -+extern struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[]; -+extern struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[]; -+extern struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[]; -+extern struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[]; -+extern struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[]; -+extern struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[]; -+extern struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[]; -+ -+/* Common IP block data on OMAP2430/OMAP3 */ -+extern struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[]; - - /* Common IP block data across OMAP2/3 */ - extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch deleted file mode 100644 index f4e644b..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch +++ /dev/null @@ -1,1730 +0,0 @@ -From 7fb59da1fff606542858e006b001e1cb63e1d708 Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sat, 9 Jul 2011 19:14:08 -0600 -Subject: [PATCH 043/149] omap_hwmod: share identical omap_hwmod_class, omap_hwmod_class_sysconfig arrays - -To reduce kernel source file data duplication, share struct -omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx -and 3xxx hwmod data files. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 267 +++----------------- - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 273 +++----------------- - .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 228 +++++++++++----- - arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 123 +++++++++ - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 105 +------- - arch/arm/mach-omap2/omap_hwmod_common_data.h | 11 + - 6 files changed, 364 insertions(+), 643 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index 6acc01f..f3901ab 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -274,24 +274,6 @@ static struct omap_hwmod omap2420_iva_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - --/* Timer Common */ --static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2420_timer_hwmod_class = { -- .name = "timer", -- .sysc = &omap2420_timer_sysc, -- .rev = OMAP_TIMER_IP_VERSION_1, --}; -- - /* timer1 */ - static struct omap_hwmod omap2420_timer1_hwmod; - -@@ -334,7 +316,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { - }, - .slaves = omap2420_timer1_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -371,7 +353,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { - }, - .slaves = omap2420_timer2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -408,7 +390,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { - }, - .slaves = omap2420_timer3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -445,7 +427,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { - }, - .slaves = omap2420_timer4_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -482,7 +464,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { - }, - .slaves = omap2420_timer5_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -520,7 +502,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { - }, - .slaves = omap2420_timer6_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -557,7 +539,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { - }, - .slaves = omap2420_timer7_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -594,7 +576,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { - }, - .slaves = omap2420_timer8_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -631,7 +613,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { - }, - .slaves = omap2420_timer9_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -668,7 +650,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { - }, - .slaves = omap2420_timer10_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -705,7 +687,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { - }, - .slaves = omap2420_timer11_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -742,7 +724,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = { - }, - .slaves = omap2420_timer12_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), -- .class = &omap2420_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) - }; - -@@ -764,27 +746,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - --/* -- * 'wd_timer' class -- * 32-bit watchdog upward counter that generates a pulse on the reset pin on -- * overflow condition -- */ -- --static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { -- .name = "wd_timer", -- .sysc = &omap2420_wd_timer_sysc, -- .pre_shutdown = &omap2_wd_timer_disable --}; -- - /* wd_timer2 */ - static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { - &omap2420_l4_wkup__wd_timer2, -@@ -792,7 +753,7 @@ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { - - static struct omap_hwmod omap2420_wd_timer2_hwmod = { - .name = "wd_timer2", -- .class = &omap2420_wd_timer_hwmod_class, -+ .class = &omap2xxx_wd_timer_hwmod_class, - .main_clk = "mpu_wdt_fck", - .prcm = { - .omap2 = { -@@ -808,24 +769,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; - --/* UART */ -- --static struct omap_hwmod_class_sysconfig uart_sysc = { -- .rev_offs = 0x50, -- .sysc_offs = 0x54, -- .syss_offs = 0x58, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class uart_class = { -- .name = "uart", -- .sysc = &uart_sysc, --}; -- - /* UART1 */ - - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { -@@ -848,7 +791,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { - }, - .slaves = omap2420_uart1_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; - -@@ -874,7 +817,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { - }, - .slaves = omap2420_uart2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; - -@@ -900,28 +843,10 @@ static struct omap_hwmod omap2420_uart3_hwmod = { - }, - .slaves = omap2420_uart3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; - --/* -- * 'dss' class -- * display sub-system -- */ -- --static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2420_dss_hwmod_class = { -- .name = "dss", -- .sysc = &omap2420_dss_sysc, --}; -- - /* dss */ - /* dss master ports */ - static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { -@@ -955,7 +880,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { - - static struct omap_hwmod omap2420_dss_core_hwmod = { - .name = "dss_core", -- .class = &omap2420_dss_hwmod_class, -+ .class = &omap2_dss_hwmod_class, - .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2xxx_dss_sdma_chs, - .prcm = { -@@ -977,27 +902,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'dispc' class -- * display controller -- */ -- --static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | -- MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2420_dispc_hwmod_class = { -- .name = "dispc", -- .sysc = &omap2420_dispc_sysc, --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { - .master = &omap2420_l4_core_hwmod, -@@ -1020,7 +924,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { - - static struct omap_hwmod omap2420_dss_dispc_hwmod = { - .name = "dss_dispc", -- .class = &omap2420_dispc_hwmod_class, -+ .class = &omap2_dispc_hwmod_class, - .mpu_irqs = omap2_dispc_irqs, - .main_clk = "dss1_fck", - .prcm = { -@@ -1038,26 +942,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'rfbi' class -- * remote frame buffer interface -- */ -- --static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { -- .name = "rfbi", -- .sysc = &omap2420_rfbi_sysc, --}; -- - /* l4_core -> dss_rfbi */ - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { - .master = &omap2420_l4_core_hwmod, -@@ -1080,7 +964,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = { - - static struct omap_hwmod omap2420_dss_rfbi_hwmod = { - .name = "dss_rfbi", -- .class = &omap2420_rfbi_hwmod_class, -+ .class = &omap2_rfbi_hwmod_class, - .main_clk = "dss1_fck", - .prcm = { - .omap2 = { -@@ -1095,15 +979,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'venc' class -- * video encoder -- */ -- --static struct omap_hwmod_class omap2420_venc_hwmod_class = { -- .name = "venc", --}; -- - /* l4_core -> dss_venc */ - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { - .master = &omap2420_l4_core_hwmod, -@@ -1127,7 +1002,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = { - - static struct omap_hwmod omap2420_dss_venc_hwmod = { - .name = "dss_venc", -- .class = &omap2420_venc_hwmod_class, -+ .class = &omap2_venc_hwmod_class, - .main_clk = "dss1_fck", - .prcm = { - .omap2 = { -@@ -1292,27 +1167,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { - .dbck_flag = false, - }; - --static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | -- SYSS_HAS_RESET_STATUS), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --/* -- * 'gpio' class -- * general purpose io module -- */ --static struct omap_hwmod_class omap242x_gpio_hwmod_class = { -- .name = "gpio", -- .sysc = &omap242x_gpio_sysc, -- .rev = 0, --}; -- - /* gpio1 */ - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { - &omap2420_l4_wkup__gpio1, -@@ -1334,7 +1188,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { - }, - .slaves = omap2420_gpio1_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), -- .class = &omap242x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; -@@ -1360,7 +1214,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { - }, - .slaves = omap2420_gpio2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), -- .class = &omap242x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; -@@ -1386,7 +1240,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { - }, - .slaves = omap2420_gpio3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), -- .class = &omap242x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; -@@ -1412,28 +1266,11 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { - }, - .slaves = omap2420_gpio4_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), -- .class = &omap242x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; - --/* system dma */ --static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x002c, -- .syss_offs = 0x0028, -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | -- SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2420_dma_hwmod_class = { -- .name = "dma", -- .sysc = &omap2420_dma_sysc, --}; -- - /* dma attributes */ - static struct omap_dma_dev_attr dma_dev_attr = { - .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | -@@ -1470,7 +1307,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { - - static struct omap_hwmod omap2420_dma_system_hwmod = { - .name = "dma", -- .class = &omap2420_dma_hwmod_class, -+ .class = &omap2xxx_dma_hwmod_class, - .mpu_irqs = omap2_dma_system_irqs, - .main_clk = "core_l3_ck", - .slaves = omap2420_dma_system_slaves, -@@ -1482,27 +1319,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'mailbox' class -- * mailbox module allowing communication between the on-chip processors -- * using a queued mailbox-interrupt mechanism. -- */ -- --static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = { -- .rev_offs = 0x000, -- .sysc_offs = 0x010, -- .syss_offs = 0x014, -- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2420_mailbox_hwmod_class = { -- .name = "mailbox", -- .sysc = &omap2420_mailbox_sysc, --}; -- - /* mailbox */ - static struct omap_hwmod omap2420_mailbox_hwmod; - static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { -@@ -1526,7 +1342,7 @@ static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = { - - static struct omap_hwmod omap2420_mailbox_hwmod = { - .name = "mailbox", -- .class = &omap2420_mailbox_hwmod_class, -+ .class = &omap2xxx_mailbox_hwmod_class, - .mpu_irqs = omap2420_mailbox_irqs, - .main_clk = "mailboxes_ick", - .prcm = { -@@ -1543,29 +1359,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; - --/* -- * 'mcspi' class -- * multichannel serial port interface (mcspi) / master/slave synchronous serial -- * bus -- */ -- --static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2420_mcspi_class = { -- .name = "mcspi", -- .sysc = &omap2420_mcspi_sysc, -- .rev = OMAP2_MCSPI_REV, --}; -- - /* mcspi1 */ - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { - &omap2420_l4_core__mcspi1, -@@ -1591,8 +1384,8 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { - }, - .slaves = omap2420_mcspi1_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), -- .class = &omap2420_mcspi_class, -- .dev_attr = &omap_mcspi1_dev_attr, -+ .class = &omap2xxx_mcspi_class, -+ .dev_attr = &omap_mcspi1_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; - -@@ -1621,8 +1414,8 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { - }, - .slaves = omap2420_mcspi2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), -- .class = &omap2420_mcspi_class, -- .dev_attr = &omap_mcspi2_dev_attr, -+ .class = &omap2xxx_mcspi_class, -+ .dev_attr = &omap_mcspi2_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index 639acd5..2a52f02 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -347,24 +347,6 @@ static struct omap_hwmod omap2430_iva_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - --/* Timer Common */ --static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2430_timer_hwmod_class = { -- .name = "timer", -- .sysc = &omap2430_timer_sysc, -- .rev = OMAP_TIMER_IP_VERSION_1, --}; -- - /* timer1 */ - static struct omap_hwmod omap2430_timer1_hwmod; - -@@ -407,7 +389,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { - }, - .slaves = omap2430_timer1_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -444,7 +426,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { - }, - .slaves = omap2430_timer2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -481,7 +463,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { - }, - .slaves = omap2430_timer3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -518,7 +500,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { - }, - .slaves = omap2430_timer4_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -555,7 +537,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { - }, - .slaves = omap2430_timer5_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -592,7 +574,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { - }, - .slaves = omap2430_timer6_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -629,7 +611,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { - }, - .slaves = omap2430_timer7_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -666,7 +648,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { - }, - .slaves = omap2430_timer8_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -703,7 +685,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { - }, - .slaves = omap2430_timer9_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -740,7 +722,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { - }, - .slaves = omap2430_timer10_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -777,7 +759,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { - }, - .slaves = omap2430_timer11_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -814,7 +796,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = { - }, - .slaves = omap2430_timer12_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), -- .class = &omap2430_timer_hwmod_class, -+ .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }; - -@@ -836,27 +818,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - --/* -- * 'wd_timer' class -- * 32-bit watchdog upward counter that generates a pulse on the reset pin on -- * overflow condition -- */ -- --static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { -- .rev_offs = 0x0, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { -- .name = "wd_timer", -- .sysc = &omap2430_wd_timer_sysc, -- .pre_shutdown = &omap2_wd_timer_disable --}; -- - /* wd_timer2 */ - static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { - &omap2430_l4_wkup__wd_timer2, -@@ -864,7 +825,7 @@ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { - - static struct omap_hwmod omap2430_wd_timer2_hwmod = { - .name = "wd_timer2", -- .class = &omap2430_wd_timer_hwmod_class, -+ .class = &omap2xxx_wd_timer_hwmod_class, - .main_clk = "mpu_wdt_fck", - .prcm = { - .omap2 = { -@@ -880,24 +841,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - --/* UART */ -- --static struct omap_hwmod_class_sysconfig uart_sysc = { -- .rev_offs = 0x50, -- .sysc_offs = 0x54, -- .syss_offs = 0x58, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class uart_class = { -- .name = "uart", -- .sysc = &uart_sysc, --}; -- - /* UART1 */ - - static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { -@@ -920,7 +863,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { - }, - .slaves = omap2430_uart1_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - -@@ -946,7 +889,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { - }, - .slaves = omap2430_uart2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - -@@ -972,28 +915,10 @@ static struct omap_hwmod omap2430_uart3_hwmod = { - }, - .slaves = omap2430_uart3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - --/* -- * 'dss' class -- * display sub-system -- */ -- --static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2430_dss_hwmod_class = { -- .name = "dss", -- .sysc = &omap2430_dss_sysc, --}; -- - /* dss */ - /* dss master ports */ - static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { -@@ -1021,7 +946,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { - - static struct omap_hwmod omap2430_dss_core_hwmod = { - .name = "dss_core", -- .class = &omap2430_dss_hwmod_class, -+ .class = &omap2_dss_hwmod_class, - .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2xxx_dss_sdma_chs, - .prcm = { -@@ -1043,27 +968,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'dispc' class -- * display controller -- */ -- --static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | -- MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2430_dispc_hwmod_class = { -- .name = "dispc", -- .sysc = &omap2430_dispc_sysc, --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { - .master = &omap2430_l4_core_hwmod, -@@ -1080,7 +984,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { - - static struct omap_hwmod omap2430_dss_dispc_hwmod = { - .name = "dss_dispc", -- .class = &omap2430_dispc_hwmod_class, -+ .class = &omap2_dispc_hwmod_class, - .mpu_irqs = omap2_dispc_irqs, - .main_clk = "dss1_fck", - .prcm = { -@@ -1098,26 +1002,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'rfbi' class -- * remote frame buffer interface -- */ -- --static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { -- .name = "rfbi", -- .sysc = &omap2430_rfbi_sysc, --}; -- - /* l4_core -> dss_rfbi */ - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { - .master = &omap2430_l4_core_hwmod, -@@ -1134,7 +1018,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = { - - static struct omap_hwmod omap2430_dss_rfbi_hwmod = { - .name = "dss_rfbi", -- .class = &omap2430_rfbi_hwmod_class, -+ .class = &omap2_rfbi_hwmod_class, - .main_clk = "dss1_fck", - .prcm = { - .omap2 = { -@@ -1149,15 +1033,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'venc' class -- * video encoder -- */ -- --static struct omap_hwmod_class omap2430_venc_hwmod_class = { -- .name = "venc", --}; -- - /* l4_core -> dss_venc */ - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { - .master = &omap2430_l4_core_hwmod, -@@ -1175,7 +1050,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = { - - static struct omap_hwmod omap2430_dss_venc_hwmod = { - .name = "dss_venc", -- .class = &omap2430_venc_hwmod_class, -+ .class = &omap2_venc_hwmod_class, - .main_clk = "dss1_fck", - .prcm = { - .omap2 = { -@@ -1367,27 +1242,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { - .dbck_flag = false, - }; - --static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | -- SYSS_HAS_RESET_STATUS), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --/* -- * 'gpio' class -- * general purpose io module -- */ --static struct omap_hwmod_class omap243x_gpio_hwmod_class = { -- .name = "gpio", -- .sysc = &omap243x_gpio_sysc, -- .rev = 0, --}; -- - /* gpio1 */ - static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { - &omap2430_l4_wkup__gpio1, -@@ -1409,7 +1263,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { - }, - .slaves = omap2430_gpio1_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), -- .class = &omap243x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; -@@ -1435,7 +1289,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { - }, - .slaves = omap2430_gpio2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), -- .class = &omap243x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; -@@ -1461,7 +1315,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { - }, - .slaves = omap2430_gpio3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), -- .class = &omap243x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; -@@ -1487,7 +1341,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { - }, - .slaves = omap2430_gpio4_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), -- .class = &omap243x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; -@@ -1518,28 +1372,11 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { - }, - .slaves = omap2430_gpio5_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), -- .class = &omap243x_gpio_hwmod_class, -+ .class = &omap2xxx_gpio_hwmod_class, - .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - --/* dma_system */ --static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x002c, -- .syss_offs = 0x0028, -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | -- SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2430_dma_hwmod_class = { -- .name = "dma", -- .sysc = &omap2430_dma_sysc, --}; -- - /* dma attributes */ - static struct omap_dma_dev_attr dma_dev_attr = { - .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | -@@ -1576,7 +1413,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { - - static struct omap_hwmod omap2430_dma_system_hwmod = { - .name = "dma", -- .class = &omap2430_dma_hwmod_class, -+ .class = &omap2xxx_dma_hwmod_class, - .mpu_irqs = omap2_dma_system_irqs, - .main_clk = "core_l3_ck", - .slaves = omap2430_dma_system_slaves, -@@ -1588,27 +1425,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'mailbox' class -- * mailbox module allowing communication between the on-chip processors -- * using a queued mailbox-interrupt mechanism. -- */ -- --static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = { -- .rev_offs = 0x000, -- .sysc_offs = 0x010, -- .syss_offs = 0x014, -- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { -- .name = "mailbox", -- .sysc = &omap2430_mailbox_sysc, --}; -- - /* mailbox */ - static struct omap_hwmod omap2430_mailbox_hwmod; - static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { -@@ -1631,7 +1447,7 @@ static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = { - - static struct omap_hwmod omap2430_mailbox_hwmod = { - .name = "mailbox", -- .class = &omap2430_mailbox_hwmod_class, -+ .class = &omap2xxx_mailbox_hwmod_class, - .mpu_irqs = omap2430_mailbox_irqs, - .main_clk = "mailboxes_ick", - .prcm = { -@@ -1648,29 +1464,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - --/* -- * 'mcspi' class -- * multichannel serial port interface (mcspi) / master/slave synchronous serial -- * bus -- */ -- --static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap2430_mcspi_class = { -- .name = "mcspi", -- .sysc = &omap2430_mcspi_sysc, -- .rev = OMAP2_MCSPI_REV, --}; -- - /* mcspi1 */ - static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { - &omap2430_l4_core__mcspi1, -@@ -1696,8 +1489,8 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { - }, - .slaves = omap2430_mcspi1_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), -- .class = &omap2430_mcspi_class, -- .dev_attr = &omap_mcspi1_dev_attr, -+ .class = &omap2xxx_mcspi_class, -+ .dev_attr = &omap_mcspi1_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - -@@ -1726,8 +1519,8 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { - }, - .slaves = omap2430_mcspi2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), -- .class = &omap2430_mcspi_class, -- .dev_attr = &omap_mcspi2_dev_attr, -+ .class = &omap2xxx_mcspi_class, -+ .dev_attr = &omap_mcspi2_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - -@@ -1769,8 +1562,8 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { - }, - .slaves = omap2430_mcspi3_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), -- .class = &omap2430_mcspi_class, -- .dev_attr = &omap_mcspi3_dev_attr, -+ .class = &omap2xxx_mcspi_class, -+ .dev_attr = &omap_mcspi3_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), - }; - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c -index 7c4f5ab..c451729 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c -@@ -16,6 +16,164 @@ - - #include "omap_hwmod_common_data.h" - -+/* UART */ -+ -+static struct omap_hwmod_class_sysconfig omap2_uart_sysc = { -+ .rev_offs = 0x50, -+ .sysc_offs = 0x54, -+ .syss_offs = 0x58, -+ .sysc_flags = (SYSC_HAS_SIDLEMODE | -+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2_uart_class = { -+ .name = "uart", -+ .sysc = &omap2_uart_sysc, -+}; -+ -+/* -+ * 'dss' class -+ * display sub-system -+ */ -+ -+static struct omap_hwmod_class_sysconfig omap2_dss_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2_dss_hwmod_class = { -+ .name = "dss", -+ .sysc = &omap2_dss_sysc, -+}; -+ -+/* -+ * 'dispc' class -+ * display controller -+ */ -+ -+static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | -+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | -+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2_dispc_hwmod_class = { -+ .name = "dispc", -+ .sysc = &omap2_dispc_sysc, -+}; -+ -+/* -+ * 'rfbi' class -+ * remote frame buffer interface -+ */ -+ -+static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | -+ SYSC_HAS_AUTOIDLE), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2_rfbi_hwmod_class = { -+ .name = "rfbi", -+ .sysc = &omap2_rfbi_sysc, -+}; -+ -+/* -+ * 'venc' class -+ * video encoder -+ */ -+ -+struct omap_hwmod_class omap2_venc_hwmod_class = { -+ .name = "venc", -+}; -+ -+ -+/* Common DMA request line data */ -+struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { -+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, -+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { -+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, -+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { -+ { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ -+ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ -+ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ -+ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ -+ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ -+ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ -+ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ -+ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { -+ { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ -+ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ -+ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ -+ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { -+ { .name = "rx", .dma_req = 32 }, -+ { .name = "tx", .dma_req = 31 }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { -+ { .name = "rx", .dma_req = 34 }, -+ { .name = "tx", .dma_req = 33 }, -+ { .dma_req = -1 } -+}; -+ -+struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { -+ { .name = "rx", .dma_req = 18 }, -+ { .name = "tx", .dma_req = 17 }, -+ { .dma_req = -1 } -+}; -+ -+/* Other IP block data */ -+ - - /* - * omap_hwmod class data -@@ -162,73 +320,3 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { - { .irq = -1 } - }; - --/* Common DMA request line data */ --struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { -- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ -- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ -- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ -- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ -- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ -- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ -- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ -- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { -- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ -- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ -- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ -- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { -- { .name = "rx", .dma_req = 32 }, -- { .name = "tx", .dma_req = 31 }, -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { -- { .name = "rx", .dma_req = 34 }, -- { .name = "tx", .dma_req = 33 }, -- { .dma_req = -1 } --}; -- --struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { -- { .name = "rx", .dma_req = 18 }, -- { .name = "tx", .dma_req = 17 }, -- { .dma_req = -1 } --}; -- -- -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c -index f5b63ef..177dee2 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c -@@ -11,10 +11,13 @@ - #include <plat/omap_hwmod.h> - #include <plat/serial.h> - #include <plat/dma.h> -+#include <plat/dmtimer.h> -+#include <plat/mcspi.h> - - #include <mach/irqs.h> - - #include "omap_hwmod_common_data.h" -+#include "wd_timer.h" - - struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { - { .irq = 48, }, -@@ -25,3 +28,123 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, - { .dma_req = -1 } - }; -+/* OMAP2xxx Timer Common */ -+static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | -+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -+ SYSC_HAS_AUTOIDLE), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2xxx_timer_hwmod_class = { -+ .name = "timer", -+ .sysc = &omap2xxx_timer_sysc, -+ .rev = OMAP_TIMER_IP_VERSION_1, -+}; -+ -+/* -+ * 'wd_timer' class -+ * 32-bit watchdog upward counter that generates a pulse on the reset pin on -+ * overflow condition -+ */ -+ -+static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | -+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = { -+ .name = "wd_timer", -+ .sysc = &omap2xxx_wd_timer_sysc, -+ .pre_shutdown = &omap2_wd_timer_disable -+}; -+ -+/* -+ * 'gpio' class -+ * general purpose io module -+ */ -+static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | -+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | -+ SYSS_HAS_RESET_STATUS), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2xxx_gpio_hwmod_class = { -+ .name = "gpio", -+ .sysc = &omap2xxx_gpio_sysc, -+ .rev = 0, -+}; -+ -+/* system dma */ -+static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x002c, -+ .syss_offs = 0x0028, -+ .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | -+ SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | -+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -+ .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2xxx_dma_hwmod_class = { -+ .name = "dma", -+ .sysc = &omap2xxx_dma_sysc, -+}; -+ -+/* -+ * 'mailbox' class -+ * mailbox module allowing communication between the on-chip processors -+ * using a queued mailbox-interrupt mechanism. -+ */ -+ -+static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = { -+ .rev_offs = 0x000, -+ .sysc_offs = 0x010, -+ .syss_offs = 0x014, -+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | -+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = { -+ .name = "mailbox", -+ .sysc = &omap2xxx_mailbox_sysc, -+}; -+ -+/* -+ * 'mcspi' class -+ * multichannel serial port interface (mcspi) / master/slave synchronous serial -+ * bus -+ */ -+ -+static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = { -+ .rev_offs = 0x0000, -+ .sysc_offs = 0x0010, -+ .syss_offs = 0x0014, -+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | -+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -+ .sysc_fields = &omap_hwmod_sysc_type1, -+}; -+ -+struct omap_hwmod_class omap2xxx_mcspi_class = { -+ .name = "mcspi", -+ .sysc = &omap2xxx_mcspi_sysc, -+ .rev = OMAP2_MCSPI_REV, -+}; -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 001f67b..1a52716 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -1190,24 +1190,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { - .flags = HWMOD_SWSUP_SIDLE, - }; - --/* UART common */ -- --static struct omap_hwmod_class_sysconfig uart_sysc = { -- .rev_offs = 0x50, -- .sysc_offs = 0x54, -- .syss_offs = 0x58, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class uart_class = { -- .name = "uart", -- .sysc = &uart_sysc, --}; -- - /* UART1 */ - - static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { -@@ -1230,7 +1212,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { - }, - .slaves = omap3xxx_uart1_slaves, - .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), - }; - -@@ -1256,7 +1238,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { - }, - .slaves = omap3xxx_uart2_slaves, - .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), - }; - -@@ -1282,7 +1264,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { - }, - .slaves = omap3xxx_uart3_slaves, - .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), - }; - -@@ -1319,7 +1301,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { - }, - .slaves = omap3xxx_uart4_slaves, - .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves), -- .class = &uart_class, -+ .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), - }; - -@@ -1328,24 +1310,6 @@ static struct omap_hwmod_class i2c_class = { - .sysc = &i2c_sysc, - }; - --/* -- * 'dss' class -- * display sub-system -- */ -- --static struct omap_hwmod_class_sysconfig omap3xxx_dss_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { -- .name = "dss", -- .sysc = &omap3xxx_dss_sysc, --}; -- - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, - { .name = "dsi1", .dma_req = 74 }, -@@ -1406,7 +1370,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { - - static struct omap_hwmod omap3430es1_dss_core_hwmod = { - .name = "dss_core", -- .class = &omap3xxx_dss_hwmod_class, -+ .class = &omap2_dss_hwmod_class, - .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ - .sdma_reqs = omap3xxx_dss_sdma_chs, - .prcm = { -@@ -1430,7 +1394,7 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { - - static struct omap_hwmod omap3xxx_dss_core_hwmod = { - .name = "dss_core", -- .class = &omap3xxx_dss_hwmod_class, -+ .class = &omap2_dss_hwmod_class, - .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ - .sdma_reqs = omap3xxx_dss_sdma_chs, - .prcm = { -@@ -1453,28 +1417,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { - CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1), - }; - --/* -- * 'dispc' class -- * display controller -- */ -- --static struct omap_hwmod_class_sysconfig omap3xxx_dispc_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | -- SYSC_HAS_MIDLEMODE | SYSC_HAS_ENAWAKEUP | -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | -- MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { -- .name = "dispc", -- .sysc = &omap3xxx_dispc_sysc, --}; -- - /* l4_core -> dss_dispc */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { - .master = &omap3xxx_l4_core_hwmod, -@@ -1498,7 +1440,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { - - static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { - .name = "dss_dispc", -- .class = &omap3xxx_dispc_hwmod_class, -+ .class = &omap2_dispc_hwmod_class, - .mpu_irqs = omap2_dispc_irqs, - .main_clk = "dss1_alwon_fck", - .prcm = { -@@ -1580,26 +1522,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'rfbi' class -- * remote frame buffer interface -- */ -- --static struct omap_hwmod_class_sysconfig omap3xxx_rfbi_sysc = { -- .rev_offs = 0x0000, -- .sysc_offs = 0x0010, -- .syss_offs = 0x0014, -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | -- SYSC_HAS_AUTOIDLE), -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), -- .sysc_fields = &omap_hwmod_sysc_type1, --}; -- --static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { -- .name = "rfbi", -- .sysc = &omap3xxx_rfbi_sysc, --}; -- - /* l4_core -> dss_rfbi */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { - .master = &omap3xxx_l4_core_hwmod, -@@ -1623,7 +1545,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = { - - static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { - .name = "dss_rfbi", -- .class = &omap3xxx_rfbi_hwmod_class, -+ .class = &omap2_rfbi_hwmod_class, - .main_clk = "dss1_alwon_fck", - .prcm = { - .omap2 = { -@@ -1640,15 +1562,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { - .flags = HWMOD_NO_IDLEST, - }; - --/* -- * 'venc' class -- * video encoder -- */ -- --static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { -- .name = "venc", --}; -- - /* l4_core -> dss_venc */ - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { - .master = &omap3xxx_l4_core_hwmod, -@@ -1673,7 +1586,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = { - - static struct omap_hwmod omap3xxx_dss_venc_hwmod = { - .name = "dss_venc", -- .class = &omap3xxx_venc_hwmod_class, -+ .class = &omap2_venc_hwmod_class, - .main_clk = "dss1_alwon_fck", - .prcm = { - .omap2 = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h -index b636cf6..39a7c37 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.h -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h -@@ -98,6 +98,17 @@ extern struct omap_hwmod_class l3_hwmod_class; - extern struct omap_hwmod_class l4_hwmod_class; - extern struct omap_hwmod_class mpu_hwmod_class; - extern struct omap_hwmod_class iva_hwmod_class; -+extern struct omap_hwmod_class omap2_uart_class; -+extern struct omap_hwmod_class omap2_dss_hwmod_class; -+extern struct omap_hwmod_class omap2_dispc_hwmod_class; -+extern struct omap_hwmod_class omap2_rfbi_hwmod_class; -+extern struct omap_hwmod_class omap2_venc_hwmod_class; - -+extern struct omap_hwmod_class omap2xxx_timer_hwmod_class; -+extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class; -+extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class; -+extern struct omap_hwmod_class omap2xxx_dma_hwmod_class; -+extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class; -+extern struct omap_hwmod_class omap2xxx_mcspi_class; - - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect-data-order-and-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect-data-order-and-.patch deleted file mode 100644 index 0609f08..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect-data-order-and-.patch +++ /dev/null @@ -1,116 +0,0 @@ -From 9723d81494f83fd1f9beb8af0f440b0ed30435fb Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:14:27 -0600 -Subject: [PATCH 044/149] OMAP4: hwmod data: Fix L3 interconnect data order and alignement - -Change the position of the ocp_if structure to match the template. - -Remove unneeded comma at the end of address space flag field. - -Remove USER_SDMA since this ocp link is only from the l3_main_1 -path that is accessible only from the MPU in that case and not -the SDMA. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 27 +++++++++++++-------------- - 1 files changed, 13 insertions(+), 14 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 316e922..94c0b60 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -216,6 +216,12 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { - }; - - /* l3_main_1 interface data */ -+static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { -+ { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, -+ { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } -+}; -+ - /* dsp -> l3_main_1 */ - static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = { - .master = &omap44xx_dsp_hwmod, -@@ -264,18 +270,11 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { - .user = OCP_USER_MPU | OCP_USER_SDMA, - }; - --/* L3 target configuration and error log registers */ --static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { -- { .irq = 9 + OMAP44XX_IRQ_GIC_START }, -- { .irq = 10 + OMAP44XX_IRQ_GIC_START }, -- { .irq = -1 } --}; -- - static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { - { - .pa_start = 0x44000000, - .pa_end = 0x44000fff, -- .flags = ADDR_TYPE_RT, -+ .flags = ADDR_TYPE_RT - }, - { } - }; -@@ -286,7 +285,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { - .slave = &omap44xx_l3_main_1_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_1_addrs, -- .user = OCP_USER_MPU | OCP_USER_SDMA, -+ .user = OCP_USER_MPU, - }; - - /* l3_main_1 slave ports */ -@@ -303,9 +302,9 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { - static struct omap_hwmod omap44xx_l3_main_1_hwmod = { - .name = "l3_main_1", - .class = &omap44xx_l3_hwmod_class, -- .mpu_irqs = omap44xx_l3_targ_irqs, - .slaves = omap44xx_l3_main_1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), -+ .mpu_irqs = omap44xx_l3_main_1_irqs, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -@@ -354,7 +353,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { - { - .pa_start = 0x44800000, - .pa_end = 0x44801fff, -- .flags = ADDR_TYPE_RT, -+ .flags = ADDR_TYPE_RT - }, - { } - }; -@@ -365,7 +364,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_2_addrs, -- .user = OCP_USER_MPU | OCP_USER_SDMA, -+ .user = OCP_USER_MPU, - }; - - /* l4_cfg -> l3_main_2 */ -@@ -409,7 +408,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { - { - .pa_start = 0x45000000, - .pa_end = 0x45000fff, -- .flags = ADDR_TYPE_RT, -+ .flags = ADDR_TYPE_RT - }, - { } - }; -@@ -420,7 +419,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { - .slave = &omap44xx_l3_main_3_hwmod, - .clk = "l3_div_ck", - .addr = omap44xx_l3_main_3_addrs, -- .user = OCP_USER_MPU | OCP_USER_SDMA, -+ .user = OCP_USER_MPU, - }; - - /* l3_main_2 -> l3_main_3 */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed-parens.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed-parens.patch deleted file mode 100644 index eaf456e..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed-parens.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 27107815284e473d39b81df2ee65c1141f60a6cc Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:14:28 -0600 -Subject: [PATCH 045/149] OMAP4: hwmod data: Remove un-needed parens - -A couple of parens were added around some flags. - -Remove them, since they are not needed and not used -for any other hwmods. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 94c0b60..7eed6a2 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -3736,7 +3736,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = { - static struct omap_hwmod omap44xx_mpu_hwmod = { - .name = "mpu", - .class = &omap44xx_mpu_hwmod_class, -- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), -+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_mpu_irqs, - .main_clk = "dpll_mpu_m2_ck", - .prcm = { -@@ -4750,7 +4750,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { - static struct omap_hwmod omap44xx_uart3_hwmod = { - .name = "uart3", - .class = &omap44xx_uart_hwmod_class, -- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), -+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_uart3_irqs, - .sdma_reqs = omap44xx_uart3_sdma_reqs, - .main_clk = "uart3_fck", --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch deleted file mode 100644 index b60f299..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch +++ /dev/null @@ -1,218 +0,0 @@ -From b3ef885514cc4b31d763b09dd78f26e2134c47c5 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:14:28 -0600 -Subject: [PATCH 046/149] OMAP4: hwmod data: Fix bad alignement - -Fix .prcm alignement and usb_otg_hs class and hwmod structures. - -Add a couple of more potential hwmods in the comment. -Remove hsi, since it is already included in the data. - -Remove one blank line. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 45 ++++++++++++++------------- - 1 files changed, 23 insertions(+), 22 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 7eed6a2..1975b05 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -632,7 +632,9 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = { - * gpmc - * gpu - * hdq1w -- * hsi -+ * mcasp -+ * mpu_c0 -+ * mpu_c1 - * ocmc_ram - * ocp2scp_usb_phy - * ocp_wp_noc -@@ -740,7 +742,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { - .mpu_irqs = omap44xx_aess_irqs, - .sdma_reqs = omap44xx_aess_sdma_reqs, - .main_clk = "aess_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, - }, -@@ -769,7 +771,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = { - static struct omap_hwmod omap44xx_bandgap_hwmod = { - .name = "bandgap", - .class = &omap44xx_bandgap_hwmod_class, -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, - }, -@@ -828,7 +830,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { - .class = &omap44xx_counter_hwmod_class, - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "sys_32k_ck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, - }, -@@ -1004,7 +1006,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { - .mpu_irqs = omap44xx_dmic_irqs, - .sdma_reqs = omap44xx_dmic_sdma_reqs, - .main_clk = "dmic_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, - }, -@@ -2094,7 +2096,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { - .class = &omap44xx_hsi_hwmod_class, - .mpu_irqs = omap44xx_hsi_irqs, - .main_clk = "hsi_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, - }, -@@ -2391,7 +2393,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_ipu_c0_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), -- .prcm = { -+ .prcm = { - .omap4 = { - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, - }, -@@ -2406,7 +2408,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_ipu_c1_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), -- .prcm = { -+ .prcm = { - .omap4 = { - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, - }, -@@ -2421,7 +2423,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { - .rst_lines = omap44xx_ipu_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), - .main_clk = "ipu_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, -@@ -2507,7 +2509,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { - .mpu_irqs = omap44xx_iss_irqs, - .sdma_reqs = omap44xx_iss_sdma_reqs, - .main_clk = "iss_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, - }, -@@ -2687,7 +2689,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { - .class = &omap44xx_kbd_hwmod_class, - .mpu_irqs = omap44xx_kbd_irqs, - .main_clk = "kbd_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, - }, -@@ -2751,7 +2753,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { - .name = "mailbox", - .class = &omap44xx_mailbox_hwmod_class, - .mpu_irqs = omap44xx_mailbox_irqs, -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, - }, -@@ -3133,7 +3135,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { - .mpu_irqs = omap44xx_mcpdm_irqs, - .sdma_reqs = omap44xx_mcpdm_sdma_reqs, - .main_clk = "mcpdm_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, - }, -@@ -3430,7 +3432,6 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { - }; - - /* mmc1 */ -- - static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { - { .irq = 83 + OMAP44XX_IRQ_GIC_START }, - { .irq = -1 } -@@ -3481,7 +3482,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { - .mpu_irqs = omap44xx_mmc1_irqs, - .sdma_reqs = omap44xx_mmc1_sdma_reqs, - .main_clk = "mmc1_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, - }, -@@ -3540,7 +3541,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { - .mpu_irqs = omap44xx_mmc2_irqs, - .sdma_reqs = omap44xx_mmc2_sdma_reqs, - .main_clk = "mmc2_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, - }, -@@ -3594,7 +3595,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { - .mpu_irqs = omap44xx_mmc3_irqs, - .sdma_reqs = omap44xx_mmc3_sdma_reqs, - .main_clk = "mmc3_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, - }, -@@ -3647,7 +3648,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { - - .sdma_reqs = omap44xx_mmc4_sdma_reqs, - .main_clk = "mmc4_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, - }, -@@ -3699,7 +3700,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { - .mpu_irqs = omap44xx_mmc5_irqs, - .sdma_reqs = omap44xx_mmc5_sdma_reqs, - .main_clk = "mmc5_fck", -- .prcm = { -+ .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, - }, -@@ -4835,8 +4836,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_otg_hs_sysc = { - }; - - static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { -- .name = "usb_otg_hs", -- .sysc = &omap44xx_usb_otg_hs_sysc, -+ .name = "usb_otg_hs", -+ .sysc = &omap44xx_usb_otg_hs_sysc, - }; - - /* usb_otg_hs */ -@@ -4890,7 +4891,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { - }, - }, - .opt_clks = usb_otg_hs_opt_clks, -- .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), -+ .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), - .slaves = omap44xx_usb_otg_hs_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), - .masters = omap44xx_usb_otg_hs_masters, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect-format-with-regu.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect-format-with-regu.patch deleted file mode 100644 index f4b4857..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect-format-with-regu.patch +++ /dev/null @@ -1,154 +0,0 @@ -From b47c49426b8f986331816c48996d9a64f0ebc0aa Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:14:28 -0600 -Subject: [PATCH 047/149] OMAP4: hwmod data: Align interconnect format with regular modules - -The interconnect modules were using a slightly different layout than -the regular modules. -Align the layout for better consitency. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 36 ++++++++++++++-------------- - 1 files changed, 18 insertions(+), 18 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 1975b05..e011437 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -80,7 +80,12 @@ static struct omap_hwmod_class omap44xx_dmm_hwmod_class = { - .name = "dmm", - }; - --/* dmm interface data */ -+/* dmm */ -+static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { -+ { .irq = 113 + OMAP44XX_IRQ_GIC_START }, -+ { .irq = -1 } -+}; -+ - /* l3_main_1 -> dmm */ - static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = { - .master = &omap44xx_l3_main_1_hwmod, -@@ -113,17 +118,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { - &omap44xx_mpu__dmm, - }; - --static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { -- { .irq = 113 + OMAP44XX_IRQ_GIC_START }, -- { .irq = -1 } --}; -- - static struct omap_hwmod omap44xx_dmm_hwmod = { - .name = "dmm", - .class = &omap44xx_dmm_hwmod_class, -+ .mpu_irqs = omap44xx_dmm_irqs, - .slaves = omap44xx_dmm_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), -- .mpu_irqs = omap44xx_dmm_irqs, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -@@ -135,7 +135,7 @@ static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = { - .name = "emif_fw", - }; - --/* emif_fw interface data */ -+/* emif_fw */ - /* dmm -> emif_fw */ - static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = { - .master = &omap44xx_dmm_hwmod, -@@ -184,7 +184,7 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = { - .name = "l3", - }; - --/* l3_instr interface data */ -+/* l3_instr */ - /* iva -> l3_instr */ - static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = { - .master = &omap44xx_iva_hwmod, -@@ -215,7 +215,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --/* l3_main_1 interface data */ -+/* l3_main_1 */ - static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { - { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, - { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, -@@ -302,13 +302,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { - static struct omap_hwmod omap44xx_l3_main_1_hwmod = { - .name = "l3_main_1", - .class = &omap44xx_l3_hwmod_class, -+ .mpu_irqs = omap44xx_l3_main_1_irqs, - .slaves = omap44xx_l3_main_1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), -- .mpu_irqs = omap44xx_l3_main_1_irqs, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --/* l3_main_2 interface data */ -+/* l3_main_2 */ - /* dma_system -> l3_main_2 */ - static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = { - .master = &omap44xx_dma_system_hwmod, -@@ -403,7 +403,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --/* l3_main_3 interface data */ -+/* l3_main_3 */ - static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { - { - .pa_start = 0x45000000, -@@ -461,7 +461,7 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = { - .name = "l4", - }; - --/* l4_abe interface data */ -+/* l4_abe */ - /* aess -> l4_abe */ - static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { - .master = &omap44xx_aess_hwmod, -@@ -510,7 +510,7 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --/* l4_cfg interface data */ -+/* l4_cfg */ - /* l3_main_1 -> l4_cfg */ - static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { - .master = &omap44xx_l3_main_1_hwmod, -@@ -532,7 +532,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --/* l4_per interface data */ -+/* l4_per */ - /* l3_main_2 -> l4_per */ - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = { - .master = &omap44xx_l3_main_2_hwmod, -@@ -554,7 +554,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --/* l4_wkup interface data */ -+/* l4_wkup */ - /* l4_cfg -> l4_wkup */ - static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = { - .master = &omap44xx_l4_cfg_hwmod, -@@ -584,7 +584,7 @@ static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = { - .name = "mpu_bus", - }; - --/* mpu_private interface data */ -+/* mpu_private */ - /* mpu -> mpu_private */ - static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = { - .master = &omap44xx_mpu_hwmod, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch deleted file mode 100644 index e3a50ac..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 4f6739c756baab556e7ad8ddb33c0d3fb822179a Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:14:45 -0600 -Subject: [PATCH 048/149] OMAP4: clock data: Add sddiv to USB DPLL - -The USB DPLL is a J-Type DPLL with the sddiv extra parameter. Add it -in USB DPLL. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -[paul@pwsan.com: dropped UNIPRO change since it is removed in a later patch] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 8c96567..f28a9c9 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -1015,6 +1015,7 @@ static struct dpll_data dpll_usb_dd = { - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, -+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, - .min_divider = 1, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev-with-NULL.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev-with-NULL.patch deleted file mode 100644 index 8cb1123..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev-with-NULL.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 776007fbd8db1764179c9cf9f93d3b5ef2fef782 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:14:45 -0600 -Subject: [PATCH 049/149] OMAP4: clock data: Remove usb_host_fs clkdev with NULL dev - -usb_host_fs_fck does have a clkdev mapping with "usbhs-omap.0" -and "fs_fck" alias used by the driver. -The entry with NULL dev is thus not needed anymore. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Felipe Balbi <balbi@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 3 --- - 1 files changed, 0 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index f28a9c9..0fa1cb8 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -3205,7 +3205,6 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), - CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), - CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), -- CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X), - CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), - CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), - CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), -@@ -3217,7 +3216,6 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), - CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), - CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), -- CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X), - CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), - CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), - CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), -@@ -3227,7 +3225,6 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), - CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), - CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), -- CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X), - CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), - CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), - CLK(NULL, "usim_ck", &usim_ck, CK_443X), --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and-struc.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and-struc.patch deleted file mode 100644 index 24a888c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and-struc.patch +++ /dev/null @@ -1,229 +0,0 @@ -From e19d3b7293245b4aad98b5ace320caad14e27c11 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:14:45 -0600 -Subject: [PATCH 050/149] OMAP4: clock data: Re-order some clock nodes and structure fields - -A couple of fieds were edited manually and thus do not stick -to the template used by the generator and by other structures. - -Move them to the correct location. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -[paul@pwsan.com: dropped the UNIPRO changes since those will be removed - in a later patch] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 66 +++++++++++++++++---------------- - 1 files changed, 34 insertions(+), 32 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 0fa1cb8..4b57d55 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -53,9 +53,9 @@ static struct clk extalt_clkin_ck = { - static struct clk pad_clks_ck = { - .name = "pad_clks_ck", - .rate = 12000000, -- .ops = &clkops_omap2_dflt, -- .enable_reg = OMAP4430_CM_CLKSEL_ABE, -- .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, -+ .ops = &clkops_omap2_dflt, -+ .enable_reg = OMAP4430_CM_CLKSEL_ABE, -+ .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, - }; - - static struct clk pad_slimbus_core_clks_ck = { -@@ -73,9 +73,9 @@ static struct clk secure_32k_clk_src_ck = { - static struct clk slimbus_clk = { - .name = "slimbus_clk", - .rate = 12000000, -- .ops = &clkops_omap2_dflt, -- .enable_reg = OMAP4430_CM_CLKSEL_ABE, -- .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, -+ .ops = &clkops_omap2_dflt, -+ .enable_reg = OMAP4430_CM_CLKSEL_ABE, -+ .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, - }; - - static struct clk sys_32k_ck = { -@@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = { - static struct clk dpll_abe_x2_ck = { - .name = "dpll_abe_x2_ck", - .parent = &dpll_abe_ck, -+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, - .flags = CLOCK_CLKOUTX2, - .ops = &clkops_omap4_dpllmx_ops, - .recalc = &omap3_clkoutx2_recalc, -- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, - }; - - static const struct clksel_rate div31_1to31_rates[] = { -@@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = { - .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, - .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, - .ops = &clkops_omap2_dflt, -- .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, -- .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, -+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, - }; - - static struct clk dpll_core_m7x2_ck = { -@@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = { - static struct clk dpll_per_x2_ck = { - .name = "dpll_per_x2_ck", - .parent = &dpll_per_ck, -+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, - .flags = CLOCK_CLKOUTX2, - .ops = &clkops_omap4_dpllmx_ops, - .recalc = &omap3_clkoutx2_recalc, -- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, - }; - - static const struct clksel dpll_per_m2x2_div[] = { -@@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = { - .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER, - .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, - .ops = &clkops_omap2_dflt, -- .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, -- .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, -+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, - }; - - static struct clk dpll_per_m4x2_ck = { -@@ -970,8 +970,9 @@ static struct clk dpll_unipro_ck = { - static struct clk dpll_unipro_x2_ck = { - .name = "dpll_unipro_x2_ck", - .parent = &dpll_unipro_ck, -+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, - .flags = CLOCK_CLKOUTX2, -- .ops = &clkops_null, -+ .ops = &clkops_omap4_dpllmx_ops, - .recalc = &omap3_clkoutx2_recalc, - }; - -@@ -1036,8 +1037,8 @@ static struct clk dpll_usb_ck = { - static struct clk dpll_usb_clkdcoldo_ck = { - .name = "dpll_usb_clkdcoldo_ck", - .parent = &dpll_usb_ck, -- .ops = &clkops_omap4_dpllmx_ops, - .clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB, -+ .ops = &clkops_omap4_dpllmx_ops, - .recalc = &followparent_recalc, - }; - -@@ -1847,8 +1848,8 @@ static struct clk l3_instr_ick = { - .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, - .enable_bit = OMAP4430_MODULEMODE_HWCTRL, -- .clkdm_name = "l3_instr_clkdm", - .flags = ENABLE_ON_INIT, -+ .clkdm_name = "l3_instr_clkdm", - .parent = &l3_div_ck, - .recalc = &followparent_recalc, - }; -@@ -1858,8 +1859,8 @@ static struct clk l3_main_3_ick = { - .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, - .enable_bit = OMAP4430_MODULEMODE_HWCTRL, -- .clkdm_name = "l3_instr_clkdm", - .flags = ENABLE_ON_INIT, -+ .clkdm_name = "l3_instr_clkdm", - .parent = &l3_div_ck, - .recalc = &followparent_recalc, - }; -@@ -2163,8 +2164,8 @@ static struct clk ocp_wp_noc_ick = { - .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, - .enable_bit = OMAP4430_MODULEMODE_HWCTRL, -- .clkdm_name = "l3_instr_clkdm", - .flags = ENABLE_ON_INIT, -+ .clkdm_name = "l3_instr_clkdm", - .parent = &l3_div_ck, - .recalc = &followparent_recalc, - }; -@@ -2896,6 +2897,7 @@ static struct clk auxclk2_ck = { - .enable_reg = OMAP4_SCRM_AUXCLK2, - .enable_bit = OMAP4_ENABLE_SHIFT, - }; -+ - static struct clk auxclk3_ck = { - .name = "auxclk3_ck", - .parent = &sys_clkin_ck, -@@ -3217,7 +3219,6 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), - CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), - CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), -- CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), - CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), - CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), - CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), -@@ -3226,15 +3227,25 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), - CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), - CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), -- CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), - CLK(NULL, "usim_ck", &usim_ck, CK_443X), - CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), - CLK(NULL, "usim_fck", &usim_fck, CK_443X), - CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X), -- CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), - CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), - CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), - CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), -+ CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), -+ CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), -+ CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), -+ CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), -+ CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), -+ CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), -+ CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), -+ CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), -+ CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), -+ CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), -+ CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), -+ CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), - CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), - CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X), - CLK(NULL, "gpt2_ick", &dummy_ck, CK_443X), -@@ -3251,6 +3262,7 @@ static struct omap_clk omap44xx_clks[] = { - CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), - CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), - CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X), -+ CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), - CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X), - CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X), - CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X), -@@ -3268,19 +3280,9 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), - CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), - CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), -+ CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), -+ CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), - CLK("omap_wdt", "ick", &dummy_ck, CK_443X), -- CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), -- CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), -- CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), -- CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), -- CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), -- CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), -- CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), -- CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), -- CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), -- CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), -- CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), -- CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), - }; - - int __init omap4xxx_clk_init(void) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB-DPLL.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB-DPLL.patch deleted file mode 100644 index c04c192..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB-DPLL.patch +++ /dev/null @@ -1,143 +0,0 @@ -From 6fdbb61306456ada90c0b0e3ee2c8245077b7b02 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:14:46 -0600 -Subject: [PATCH 051/149] OMAP4: clock data: Fix max mult and div for USB DPLL - -The DPLL USB can generate higher speed (x2) than the regular ones. -The max multiplication value is then twice the previous value. - -Fix both max_mult and max_div with that correct values. - -Change the max_div variable type to u16 to allow storing up to 256. - -Replace as well the define with the value to avoid -unneeded indirection and provide a better readability. - -Remove the defines that become useless. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx.h | 7 ------- - arch/arm/mach-omap2/clock44xx_data.c | 29 ++++++++++++++--------------- - arch/arm/plat-omap/include/plat/clock.h | 2 +- - 3 files changed, 15 insertions(+), 23 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h -index 6be1095..7ceb870 100644 ---- a/arch/arm/mach-omap2/clock44xx.h -+++ b/arch/arm/mach-omap2/clock44xx.h -@@ -8,13 +8,6 @@ - #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H - #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H - --/* -- * XXX Missing values for the OMAP4 DPLL_USB -- * XXX Missing min_multiplier values for all OMAP4 DPLLs -- */ --#define OMAP4430_MAX_DPLL_MULT 2047 --#define OMAP4430_MAX_DPLL_DIV 128 -- - int omap4xxx_clk_init(void); - - #endif -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 4b57d55..8307c9e 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = { - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, -- .max_divider = OMAP4430_MAX_DPLL_DIV, -+ .max_multiplier = 2047, -+ .max_divider = 128, - .min_divider = 1, - }; - -@@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = { - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, -- .max_divider = OMAP4430_MAX_DPLL_DIV, -+ .max_multiplier = 2047, -+ .max_divider = 128, - .min_divider = 1, - }; - -@@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = { - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, -- .max_divider = OMAP4430_MAX_DPLL_DIV, -+ .max_multiplier = 2047, -+ .max_divider = 128, - .min_divider = 1, - }; - -@@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = { - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, -- .max_divider = OMAP4430_MAX_DPLL_DIV, -+ .max_multiplier = 2047, -+ .max_divider = 128, - .min_divider = 1, - }; - -@@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = { - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, -- .max_divider = OMAP4430_MAX_DPLL_DIV, -+ .max_multiplier = 2047, -+ .max_divider = 128, - .min_divider = 1, - }; - -@@ -949,9 +949,8 @@ static struct dpll_data dpll_unipro_dd = { - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, -- .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, -- .max_divider = OMAP4430_MAX_DPLL_DIV, -+ .max_multiplier = 2047, -+ .max_divider = 128, - .min_divider = 1, - }; - -@@ -1017,8 +1016,8 @@ static struct dpll_data dpll_usb_dd = { - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, -- .max_divider = OMAP4430_MAX_DPLL_DIV, -+ .max_multiplier = 4095, -+ .max_divider = 256, - .min_divider = 1, - }; - -diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h -index 006e599..f57e064 100644 ---- a/arch/arm/plat-omap/include/plat/clock.h -+++ b/arch/arm/plat-omap/include/plat/clock.h -@@ -152,7 +152,7 @@ struct dpll_data { - u16 max_multiplier; - u8 last_rounded_n; - u8 min_divider; -- u8 max_divider; -+ u16 max_divider; - u8 modes; - #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) - void __iomem *autoidle_reg; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch deleted file mode 100644 index e370992..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch +++ /dev/null @@ -1,256 +0,0 @@ -From e96136d547a0de958c051e0ec6a0873f27a94537 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:15:04 -0600 -Subject: [PATCH 052/149] OMAP4: prcm: Fix errors in few defines name - -A couple of macros were wrongly changed during the _MOD to _INST -rename done in the following commit: - - OMAP4: PRCM: rename _MOD macros to _INST - cdb54c4457d68994da7c2e16907adfbfc130060d - -Fix them to their original name. - -Some CM and PRM instances were not well aligned. Align them. - -Remove one blank line in cm2_44xx.h to align the output with -the other (cm1_44xx.h, prm44xx.h) files. - -Update header copyright date. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/cm1_44xx.h | 28 ++++++++++++++-------------- - arch/arm/mach-omap2/cm2_44xx.h | 23 +++++++++++------------ - arch/arm/mach-omap2/prm44xx.h | 22 +++++++++++----------- - 3 files changed, 36 insertions(+), 37 deletions(-) - -diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h -index e2d7a56..fc649f5 100644 ---- a/arch/arm/mach-omap2/cm1_44xx.h -+++ b/arch/arm/mach-omap2/cm1_44xx.h -@@ -1,7 +1,7 @@ - /* - * OMAP44xx CM1 instance offset macros - * -- * Copyright (C) 2009-2010 Texas Instruments, Inc. -+ * Copyright (C) 2009-2011 Texas Instruments, Inc. - * Copyright (C) 2009-2010 Nokia Corporation - * - * Paul Walmsley (paul@pwsan.com) -@@ -41,9 +41,9 @@ - #define OMAP4430_CM1_INSTR_INST 0x0f00 - - /* CM1 clockdomain register offsets (from instance start) */ --#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 --#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 --#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 -+#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 -+#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 -+#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 - - /* CM1 */ - -@@ -82,8 +82,8 @@ - #define OMAP4430_CM_DIV_M7_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044) - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048 - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET 0x004c --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x004c -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) - #define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET 0x0050 - #define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050) - #define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060 -@@ -98,8 +98,8 @@ - #define OMAP4430_CM_DIV_M2_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070) - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0088 - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET 0x008c --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET 0x008c -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) - #define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET 0x009c - #define OMAP4430_CM_BYPCLK_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c) - #define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0 -@@ -116,8 +116,8 @@ - #define OMAP4430_CM_DIV_M5_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc) - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET 0x00c8 - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET 0x00cc --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET 0x00cc -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) - #define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET 0x00dc - #define OMAP4430_CM_BYPCLK_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc) - #define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0 -@@ -134,8 +134,8 @@ - #define OMAP4430_CM_DIV_M3_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4) - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET 0x0108 - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET 0x010c --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET 0x010c -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) - #define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET 0x0120 - #define OMAP4430_CM_CLKMODE_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120) - #define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124 -@@ -154,8 +154,8 @@ - #define OMAP4430_CM_DIV_M6_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140) - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET 0x0148 - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET 0x014c --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET 0x014c -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) - #define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET 0x0160 - #define OMAP4430_CM_SHADOW_FREQ_CONFIG1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160) - #define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET 0x0164 -diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h -index aa47450..8036a16 100644 ---- a/arch/arm/mach-omap2/cm2_44xx.h -+++ b/arch/arm/mach-omap2/cm2_44xx.h -@@ -1,7 +1,7 @@ - /* - * OMAP44xx CM2 instance offset macros - * -- * Copyright (C) 2009-2010 Texas Instruments, Inc. -+ * Copyright (C) 2009-2011 Texas Instruments, Inc. - * Copyright (C) 2009-2010 Nokia Corporation - * - * Paul Walmsley (paul@pwsan.com) -@@ -40,9 +40,9 @@ - #define OMAP4430_CM2_CAM_INST 0x1000 - #define OMAP4430_CM2_DSS_INST 0x1100 - #define OMAP4430_CM2_GFX_INST 0x1200 --#define OMAP4430_CM2_L3INIT_INST 0x1300 -+#define OMAP4430_CM2_L3INIT_INST 0x1300 - #define OMAP4430_CM2_L4PER_INST 0x1400 --#define OMAP4430_CM2_CEFUSE_INST 0x1600 -+#define OMAP4430_CM2_CEFUSE_INST 0x1600 - #define OMAP4430_CM2_RESTORE_INST 0x1e00 - #define OMAP4430_CM2_INSTR_INST 0x1f00 - -@@ -65,7 +65,6 @@ - #define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180 - #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000 - -- - /* CM2 */ - - /* CM2.OCP_SOCKET_CM2 register offsets */ -@@ -121,8 +120,8 @@ - #define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064) - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068 - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET 0x006c --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) - #define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080 - #define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080) - #define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084 -@@ -135,8 +134,8 @@ - #define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090) - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8 - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET 0x00ac --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) - #define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4 - #define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4) - #define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0 -@@ -151,8 +150,8 @@ - #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0) - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8 - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) - - /* CM2.ALWAYS_ON_CM2 register offsets */ - #define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000 -@@ -227,8 +226,8 @@ - #define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508) - #define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520 - #define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520) --#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET 0x0528 --#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) -+#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528 -+#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) - #define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530 - #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530) - #define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600 -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index 67a0d3f..2aec8c8 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -31,7 +31,7 @@ - #define OMAP4430_PRM_BASE 0x4a306000 - - #define OMAP44XX_PRM_REGADDR(inst, reg) \ -- OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) -+ OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) - - - /* PRM instances */ -@@ -46,14 +46,14 @@ - #define OMAP4430_PRM_CAM_INST 0x1000 - #define OMAP4430_PRM_DSS_INST 0x1100 - #define OMAP4430_PRM_GFX_INST 0x1200 --#define OMAP4430_PRM_L3INIT_INST 0x1300 -+#define OMAP4430_PRM_L3INIT_INST 0x1300 - #define OMAP4430_PRM_L4PER_INST 0x1400 --#define OMAP4430_PRM_CEFUSE_INST 0x1600 -+#define OMAP4430_PRM_CEFUSE_INST 0x1600 - #define OMAP4430_PRM_WKUP_INST 0x1700 - #define OMAP4430_PRM_WKUP_CM_INST 0x1800 - #define OMAP4430_PRM_EMU_INST 0x1900 --#define OMAP4430_PRM_EMU_CM_INST 0x1a00 --#define OMAP4430_PRM_DEVICE_INST 0x1b00 -+#define OMAP4430_PRM_EMU_CM_INST 0x1a00 -+#define OMAP4430_PRM_DEVICE_INST 0x1b00 - #define OMAP4430_PRM_INSTR_INST 0x1f00 - - /* PRM clockdomain register offsets (from instance start) */ -@@ -247,8 +247,8 @@ - #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464) - #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 - #define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524) --#define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET 0x052c --#define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) -+#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c -+#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) - #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 - #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534) - #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 -@@ -713,8 +713,8 @@ - #define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0) - #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 - #define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4) --#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET 0x00a8 --#define OMAP4430_PRM_VC_CFG_I2C_INSTE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) -+#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 -+#define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) - #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac - #define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac) - #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 -@@ -751,8 +751,8 @@ - #define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec) - #define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 - #define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0) --#define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET 0x00f4 --#define OMAP4430_PRM_INSTEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) -+#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 -+#define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) - #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 - #define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8) - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch deleted file mode 100644 index ea6138e..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 6066c8802de9f6a1006a8e31aa833615060a2a5b Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:15:04 -0600 -Subject: [PATCH 053/149] OMAP4: prm: Remove wrong clockdomain offsets - -The following commit introduced new macros to define an offset -per clock domain in an instance. - -commit e4156ee52fe617c2c2d80b5db993ff4bf07d7c3c - - OMAP4: CM instances: add clockdomain register offsets - -The PRM contains only two clock controls management entities: -EMU and WKUP. -Remove the other ones. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/prm44xx.h | 12 ------------ - 1 files changed, 0 insertions(+), 12 deletions(-) - -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index 2aec8c8..6e53120 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -57,19 +57,7 @@ - #define OMAP4430_PRM_INSTR_INST 0x1f00 - - /* PRM clockdomain register offsets (from instance start) */ --#define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000 --#define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000 --#define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000 --#define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000 --#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000 --#define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000 --#define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000 --#define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000 --#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000 --#define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000 --#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000 - #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000 --#define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000 - #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000 - - /* OMAP4 specific register offsets */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch deleted file mode 100644 index 93f10b1..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch +++ /dev/null @@ -1,109 +0,0 @@ -From 7845ad0aca7c2976dc4021ed0c080f6605aacf09 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:15:05 -0600 -Subject: [PATCH 054/149] OMAP4: powerdomain data: Fix indentation -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Indent flags to be aligned with other fields. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> -[paul@pwsan.com: split this patch from an earlier patch by Benoît; - edited commit message] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/powerdomains44xx_data.c | 18 +++++++++--------- - 1 files changed, 9 insertions(+), 9 deletions(-) - -diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c -index c4222c7..3a7e678 100644 ---- a/arch/arm/mach-omap2/powerdomains44xx_data.c -+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c -@@ -53,7 +53,7 @@ static struct powerdomain core_44xx_pwrdm = { - [3] = PWRSTS_ON, /* ducati_l2ram */ - [4] = PWRSTS_ON, /* ducati_unicache */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* gfx_44xx_pwrdm: 3D accelerator power domain */ -@@ -70,7 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* gfx_mem */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* abe_44xx_pwrdm: Audio back end power domain */ -@@ -90,7 +90,7 @@ static struct powerdomain abe_44xx_pwrdm = { - [0] = PWRSTS_ON, /* aessmem */ - [1] = PWRSTS_ON, /* periphmem */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* dss_44xx_pwrdm: Display subsystem power domain */ -@@ -108,7 +108,7 @@ static struct powerdomain dss_44xx_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* dss_mem */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* tesla_44xx_pwrdm: Tesla processor power domain */ -@@ -130,7 +130,7 @@ static struct powerdomain tesla_44xx_pwrdm = { - [1] = PWRSTS_ON, /* tesla_l1 */ - [2] = PWRSTS_ON, /* tesla_l2 */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* wkup_44xx_pwrdm: Wake-up power domain */ -@@ -241,7 +241,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { - [2] = PWRSTS_ON, /* tcm1_mem */ - [3] = PWRSTS_ON, /* tcm2_mem */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* cam_44xx_pwrdm: Camera subsystem power domain */ -@@ -258,7 +258,7 @@ static struct powerdomain cam_44xx_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* cam_mem */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ -@@ -276,7 +276,7 @@ static struct powerdomain l3init_44xx_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* l3init_bank1 */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* l4per_44xx_pwrdm: Target peripherals power domain */ -@@ -296,7 +296,7 @@ static struct powerdomain l4per_44xx_pwrdm = { - [0] = PWRSTS_ON, /* nonretained_bank */ - [1] = PWRSTS_ON, /* retained_bank */ - }, -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to-avoid-access-from-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to-avoid-access-from-.patch deleted file mode 100644 index a30bfc3..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to-avoid-access-from-.patch +++ /dev/null @@ -1,1523 +0,0 @@ -From 8471ffc0eead8b884b6a00462fc57a2018fd9289 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:15:05 -0600 -Subject: [PATCH 055/149] OMAP4: cm: Remove RESTORE macros to avoid access from SW - -The restore part of the CM is an alias of some regular registers -used only during the SAR restore to facilate the dma to write -a contiguous set of registers. -The registers should never be used by the SW, only the original -register have to be used. - -Remove them from cmX_44xx.h files to avoid anybody to use them by -mistake. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/cm-regbits-44xx.h | 623 ++++++++++++++------------------- - arch/arm/mach-omap2/cm1_44xx.h | 36 -- - arch/arm/mach-omap2/cm2_44xx.h | 50 --- - 3 files changed, 254 insertions(+), 455 deletions(-) - -diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h -index 9d47a05..0e77945 100644 ---- a/arch/arm/mach-omap2/cm-regbits-44xx.h -+++ b/arch/arm/mach-omap2/cm-regbits-44xx.h -@@ -22,22 +22,18 @@ - #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H - #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H - --/* -- * Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, -- * CM_TESLA_DYNAMICDEP -- */ -+/* Used by CM_L3_1_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ - #define OMAP4430_ABE_DYNDEP_SHIFT 3 - #define OMAP4430_ABE_DYNDEP_MASK (1 << 3) - - /* -- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, -- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, -- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, -+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_ABE_STATDEP_SHIFT 3 - #define OMAP4430_ABE_STATDEP_MASK (1 << 3) - --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ -+/* Used by CM_L4CFG_DYNAMICDEP */ - #define OMAP4430_ALWONCORE_DYNDEP_SHIFT 16 - #define OMAP4430_ALWONCORE_DYNDEP_MASK (1 << 16) - -@@ -47,14 +43,13 @@ - - /* - * Used by CM_AUTOIDLE_DPLL_ABE, CM_AUTOIDLE_DPLL_CORE, -- * CM_AUTOIDLE_DPLL_CORE_RESTORE, CM_AUTOIDLE_DPLL_DDRPHY, -- * CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, CM_AUTOIDLE_DPLL_PER, -- * CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB -+ * CM_AUTOIDLE_DPLL_DDRPHY, CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, -+ * CM_AUTOIDLE_DPLL_PER, CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB - */ - #define OMAP4430_AUTO_DPLL_MODE_SHIFT 0 - #define OMAP4430_AUTO_DPLL_MODE_MASK (0x7 << 0) - --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ -+/* Used by CM_L4CFG_DYNAMICDEP */ - #define OMAP4430_CEFUSE_DYNDEP_SHIFT 17 - #define OMAP4430_CEFUSE_DYNDEP_MASK (1 << 17) - -@@ -82,15 +77,15 @@ - #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_MASK (1 << 8) - --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ -+/* Used by CM_MEMIF_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_SHIFT 11 - #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_MASK (1 << 11) - --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ -+/* Used by CM_MEMIF_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_SHIFT 12 - #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_MASK (1 << 12) - --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ -+/* Used by CM_MEMIF_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_SHIFT 13 - #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_MASK (1 << 13) - -@@ -110,31 +105,31 @@ - #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT 9 - #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK (1 << 9) - --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ -+/* Used by CM_MEMIF_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_DLL_CLK_SHIFT 9 - #define OMAP4430_CLKACTIVITY_DLL_CLK_MASK (1 << 9) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_SHIFT 9 - #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_MASK (1 << 9) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_SHIFT 10 - #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_MASK (1 << 10) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_SHIFT 11 - #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_MASK (1 << 11) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_SHIFT 12 - #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_MASK (1 << 12) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_SHIFT 13 - #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_MASK (1 << 13) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_SHIFT 14 - #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_MASK (1 << 14) - -@@ -158,7 +153,7 @@ - #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_SHIFT 10 - #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_MASK (1 << 10) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_SHIFT 15 - #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_MASK (1 << 15) - -@@ -170,55 +165,55 @@ - #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_SHIFT 11 - #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_MASK (1 << 11) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_SHIFT 20 - #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_MASK (1 << 20) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_SHIFT 26 - #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_MASK (1 << 26) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_SHIFT 21 - #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_MASK (1 << 21) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_SHIFT 27 - #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_MASK (1 << 27) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_SHIFT 13 - #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_MASK (1 << 13) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_SHIFT 12 - #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_MASK (1 << 12) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_SHIFT 28 - #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_MASK (1 << 28) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_SHIFT 29 - #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_MASK (1 << 29) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_SHIFT 11 - #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_MASK (1 << 11) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_SHIFT 16 - #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_MASK (1 << 16) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_SHIFT 17 - #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_MASK (1 << 17) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_SHIFT 18 - #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_MASK (1 << 18) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_SHIFT 19 - #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_MASK (1 << 19) - -@@ -234,11 +229,11 @@ - #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_SHIFT 10 - #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_MASK (1 << 10) - --/* Used by CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3_1_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_L3_1_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L3_1_GICLK_MASK (1 << 8) - --/* Used by CM_L3_2_CLKSTCTRL, CM_L3_2_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3_2_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_L3_2_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L3_2_GICLK_MASK (1 << 8) - -@@ -254,7 +249,7 @@ - #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_MASK (1 << 8) - --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ -+/* Used by CM_MEMIF_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_MASK (1 << 8) - -@@ -262,7 +257,7 @@ - #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_MASK (1 << 8) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_MASK (1 << 8) - -@@ -282,7 +277,7 @@ - #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_MASK (1 << 8) - --/* Used by CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4CFG_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_MASK (1 << 8) - -@@ -290,11 +285,11 @@ - #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_SHIFT 9 - #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_MASK (1 << 9) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_SHIFT 9 - #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_MASK (1 << 9) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_MASK (1 << 8) - -@@ -306,7 +301,7 @@ - #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_SHIFT 12 - #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_MASK (1 << 12) - --/* Used by CM_MPU_CLKSTCTRL, CM_MPU_CLKSTCTRL_RESTORE */ -+/* Used by CM_MPU_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_MASK (1 << 8) - -@@ -314,43 +309,43 @@ - #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_SHIFT 9 - #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_MASK (1 << 9) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_SHIFT 16 - #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_MASK (1 << 16) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_SHIFT 17 - #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_MASK (1 << 17) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_SHIFT 18 - #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_MASK (1 << 18) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_SHIFT 19 - #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_MASK (1 << 19) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_SHIFT 25 - #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_MASK (1 << 25) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_SHIFT 20 - #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_MASK (1 << 20) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_SHIFT 21 - #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_MASK (1 << 21) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_SHIFT 22 - #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_MASK (1 << 22) - --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ -+/* Used by CM_L4PER_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_SHIFT 24 - #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_MASK (1 << 24) - --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ -+/* Used by CM_MEMIF_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_SHIFT 10 - #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_MASK (1 << 10) - -@@ -378,27 +373,27 @@ - #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_SHIFT 8 - #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_MASK (1 << 8) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_SHIFT 22 - #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_MASK (1 << 22) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_SHIFT 23 - #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_MASK (1 << 23) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_SHIFT 24 - #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_MASK (1 << 24) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_SHIFT 10 - #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_MASK (1 << 10) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_SHIFT 14 - #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_MASK (1 << 14) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_SHIFT 15 - #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_MASK (1 << 15) - -@@ -406,11 +401,11 @@ - #define OMAP4430_CLKACTIVITY_USIM_GFCLK_SHIFT 10 - #define OMAP4430_CLKACTIVITY_USIM_GFCLK_MASK (1 << 10) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_SHIFT 30 - #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_MASK (1 << 30) - --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ -+/* Used by CM_L3INIT_CLKSTCTRL */ - #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_SHIFT 25 - #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_MASK (1 << 25) - -@@ -432,7 +427,7 @@ - - /* - * Renamed from CLKSEL Used by CM_ABE_DSS_SYS_CLKSEL, CM_ABE_PLL_REF_CLKSEL, -- * CM_L4_WKUP_CLKSEL, CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ -+ * CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ, CM_L4_WKUP_CLKSEL - */ - #define OMAP4430_CLKSEL_0_0_SHIFT 0 - #define OMAP4430_CLKSEL_0_0_MASK (1 << 0) -@@ -453,14 +448,11 @@ - #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24 - #define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24) - --/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ -+/* Used by CM_CLKSEL_CORE */ - #define OMAP4430_CLKSEL_CORE_SHIFT 0 - #define OMAP4430_CLKSEL_CORE_MASK (1 << 0) - --/* -- * Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2_RESTORE, -- * CM_SHADOW_FREQ_CONFIG2 -- */ -+/* Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2 */ - #define OMAP4430_CLKSEL_CORE_1_1_SHIFT 1 - #define OMAP4430_CLKSEL_CORE_1_1_MASK (1 << 1) - -@@ -484,18 +476,15 @@ - #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_SHIFT 26 - #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_MASK (0x3 << 26) - --/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ -+/* Used by CM_CLKSEL_CORE */ - #define OMAP4430_CLKSEL_L3_SHIFT 4 - #define OMAP4430_CLKSEL_L3_MASK (1 << 4) - --/* -- * Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2_RESTORE, -- * CM_SHADOW_FREQ_CONFIG2 -- */ -+/* Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2 */ - #define OMAP4430_CLKSEL_L3_SHADOW_SHIFT 2 - #define OMAP4430_CLKSEL_L3_SHADOW_MASK (1 << 2) - --/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ -+/* Used by CM_CLKSEL_CORE */ - #define OMAP4430_CLKSEL_L4_SHIFT 8 - #define OMAP4430_CLKSEL_L4_MASK (1 << 8) - -@@ -526,11 +515,11 @@ - #define OMAP4430_CLKSEL_SOURCE_24_24_SHIFT 24 - #define OMAP4430_CLKSEL_SOURCE_24_24_MASK (1 << 24) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_CLKSEL_UTMI_P1_SHIFT 24 - #define OMAP4430_CLKSEL_UTMI_P1_MASK (1 << 24) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_CLKSEL_UTMI_P2_SHIFT 25 - #define OMAP4430_CLKSEL_UTMI_P2_MASK (1 << 25) - -@@ -538,13 +527,10 @@ - * Used by CM1_ABE_CLKSTCTRL, CM_ALWON_CLKSTCTRL, CM_CAM_CLKSTCTRL, - * CM_CEFUSE_CLKSTCTRL, CM_D2D_CLKSTCTRL, CM_DSS_CLKSTCTRL, - * CM_DUCATI_CLKSTCTRL, CM_EMU_CLKSTCTRL, CM_GFX_CLKSTCTRL, CM_IVAHD_CLKSTCTRL, -- * CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE, CM_L3INSTR_CLKSTCTRL, -- * CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE, CM_L3_2_CLKSTCTRL, -- * CM_L3_2_CLKSTCTRL_RESTORE, CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE, -- * CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE, CM_L4SEC_CLKSTCTRL, -- * CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE, CM_MPU_CLKSTCTRL, -- * CM_MPU_CLKSTCTRL_RESTORE, CM_SDMA_CLKSTCTRL, CM_TESLA_CLKSTCTRL, -- * CM_WKUP_CLKSTCTRL -+ * CM_L3INIT_CLKSTCTRL, CM_L3INSTR_CLKSTCTRL, CM_L3_1_CLKSTCTRL, -+ * CM_L3_2_CLKSTCTRL, CM_L4CFG_CLKSTCTRL, CM_L4PER_CLKSTCTRL, -+ * CM_L4SEC_CLKSTCTRL, CM_MEMIF_CLKSTCTRL, CM_MPU_CLKSTCTRL, CM_SDMA_CLKSTCTRL, -+ * CM_TESLA_CLKSTCTRL, CM_WKUP_CLKSTCTRL - */ - #define OMAP4430_CLKTRCTRL_SHIFT 0 - #define OMAP4430_CLKTRCTRL_MASK (0x3 << 0) -@@ -561,10 +547,7 @@ - #define OMAP4430_CUSTOM_SHIFT 6 - #define OMAP4430_CUSTOM_MASK (0x3 << 6) - --/* -- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, -- * CM_L4CFG_DYNAMICDEP_RESTORE -- */ -+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ - #define OMAP4430_D2D_DYNDEP_SHIFT 18 - #define OMAP4430_D2D_DYNDEP_MASK (1 << 18) - -@@ -574,31 +557,29 @@ - - /* - * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE, -- * CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, CM_SSC_DELTAMSTEP_DPLL_DDRPHY, -- * CM_SSC_DELTAMSTEP_DPLL_IVA, CM_SSC_DELTAMSTEP_DPLL_MPU, -- * CM_SSC_DELTAMSTEP_DPLL_PER, CM_SSC_DELTAMSTEP_DPLL_UNIPRO, -- * CM_SSC_DELTAMSTEP_DPLL_USB -+ * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA, -+ * CM_SSC_DELTAMSTEP_DPLL_MPU, CM_SSC_DELTAMSTEP_DPLL_PER, -+ * CM_SSC_DELTAMSTEP_DPLL_UNIPRO, CM_SSC_DELTAMSTEP_DPLL_USB - */ - #define OMAP4430_DELTAMSTEP_SHIFT 0 - #define OMAP4430_DELTAMSTEP_MASK (0xfffff << 0) - --/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ --#define OMAP4430_DLL_OVERRIDE_SHIFT 2 --#define OMAP4430_DLL_OVERRIDE_MASK (1 << 2) -+/* Used by CM_DLL_CTRL */ -+#define OMAP4430_DLL_OVERRIDE_SHIFT 0 -+#define OMAP4430_DLL_OVERRIDE_MASK (1 << 0) - --/* Renamed from DLL_OVERRIDE Used by CM_DLL_CTRL */ --#define OMAP4430_DLL_OVERRIDE_0_0_SHIFT 0 --#define OMAP4430_DLL_OVERRIDE_0_0_MASK (1 << 0) -+/* Renamed from DLL_OVERRIDE Used by CM_SHADOW_FREQ_CONFIG1 */ -+#define OMAP4430_DLL_OVERRIDE_2_2_SHIFT 2 -+#define OMAP4430_DLL_OVERRIDE_2_2_MASK (1 << 2) - --/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ -+/* Used by CM_SHADOW_FREQ_CONFIG1 */ - #define OMAP4430_DLL_RESET_SHIFT 3 - #define OMAP4430_DLL_RESET_MASK (1 << 3) - - /* -- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, -- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, -- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO, -- * CM_CLKSEL_DPLL_USB -+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, -+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, -+ * CM_CLKSEL_DPLL_UNIPRO, CM_CLKSEL_DPLL_USB - */ - #define OMAP4430_DPLL_BYP_CLKSEL_SHIFT 23 - #define OMAP4430_DPLL_BYP_CLKSEL_MASK (1 << 23) -@@ -607,28 +588,19 @@ - #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_SHIFT 8 - #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_MASK (1 << 8) - --/* Used by CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_CORE_RESTORE */ -+/* Used by CM_CLKSEL_DPLL_CORE */ - #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_SHIFT 20 - #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_MASK (1 << 20) - --/* -- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, -- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER -- */ -+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ - #define OMAP4430_DPLL_CLKOUTHIF_DIV_SHIFT 0 - #define OMAP4430_DPLL_CLKOUTHIF_DIV_MASK (0x1f << 0) - --/* -- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, -- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER -- */ -+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ - #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_SHIFT 5 - #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_MASK (1 << 5) - --/* -- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, -- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER -- */ -+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ - #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT 8 - #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_MASK (1 << 8) - -@@ -637,9 +609,8 @@ - #define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK (1 << 10) - - /* -- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, -- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, -- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO -+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, -+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO - */ - #define OMAP4430_DPLL_CLKOUT_DIV_SHIFT 0 - #define OMAP4430_DPLL_CLKOUT_DIV_MASK (0x1f << 0) -@@ -649,9 +620,8 @@ - #define OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK (0x7f << 0) - - /* -- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, -- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, -- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO -+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, -+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO - */ - #define OMAP4430_DPLL_CLKOUT_DIVCHACK_SHIFT 5 - #define OMAP4430_DPLL_CLKOUT_DIVCHACK_MASK (1 << 5) -@@ -661,29 +631,28 @@ - #define OMAP4430_DPLL_CLKOUT_DIVCHACK_M2_USB_MASK (1 << 7) - - /* -- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, -- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, -- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB -+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, -+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB - */ - #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_SHIFT 8 - #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK (1 << 8) - --/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ -+/* Used by CM_SHADOW_FREQ_CONFIG1 */ - #define OMAP4430_DPLL_CORE_DPLL_EN_SHIFT 8 - #define OMAP4430_DPLL_CORE_DPLL_EN_MASK (0x7 << 8) - --/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ -+/* Used by CM_SHADOW_FREQ_CONFIG1 */ - #define OMAP4430_DPLL_CORE_M2_DIV_SHIFT 11 - #define OMAP4430_DPLL_CORE_M2_DIV_MASK (0x1f << 11) - --/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */ -+/* Used by CM_SHADOW_FREQ_CONFIG2 */ - #define OMAP4430_DPLL_CORE_M5_DIV_SHIFT 3 - #define OMAP4430_DPLL_CORE_M5_DIV_MASK (0x1f << 3) - - /* -- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, -- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, -- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO -+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, -+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, -+ * CM_CLKSEL_DPLL_UNIPRO - */ - #define OMAP4430_DPLL_DIV_SHIFT 0 - #define OMAP4430_DPLL_DIV_MASK (0x7f << 0) -@@ -693,9 +662,8 @@ - #define OMAP4430_DPLL_DIV_0_7_MASK (0xff << 0) - - /* -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER - */ - #define OMAP4430_DPLL_DRIFTGUARD_EN_SHIFT 8 - #define OMAP4430_DPLL_DRIFTGUARD_EN_MASK (1 << 8) -@@ -705,26 +673,25 @@ - #define OMAP4430_DPLL_DRIFTGUARD_EN_3_3_MASK (1 << 3) - - /* -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, -- * CM_CLKMODE_DPLL_USB -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, -+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB - */ - #define OMAP4430_DPLL_EN_SHIFT 0 - #define OMAP4430_DPLL_EN_MASK (0x7 << 0) - - /* -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, -+ * CM_CLKMODE_DPLL_UNIPRO - */ - #define OMAP4430_DPLL_LPMODE_EN_SHIFT 10 - #define OMAP4430_DPLL_LPMODE_EN_MASK (1 << 10) - - /* -- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, -- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, -- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO -+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, -+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, -+ * CM_CLKSEL_DPLL_UNIPRO - */ - #define OMAP4430_DPLL_MULT_SHIFT 8 - #define OMAP4430_DPLL_MULT_MASK (0x7ff << 8) -@@ -734,9 +701,9 @@ - #define OMAP4430_DPLL_MULT_USB_MASK (0xfff << 8) - - /* -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, -+ * CM_CLKMODE_DPLL_UNIPRO - */ - #define OMAP4430_DPLL_REGM4XEN_SHIFT 11 - #define OMAP4430_DPLL_REGM4XEN_MASK (1 << 11) -@@ -746,55 +713,46 @@ - #define OMAP4430_DPLL_SD_DIV_MASK (0xff << 24) - - /* -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, -- * CM_CLKMODE_DPLL_USB -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, -+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB - */ - #define OMAP4430_DPLL_SSC_ACK_SHIFT 13 - #define OMAP4430_DPLL_SSC_ACK_MASK (1 << 13) - - /* -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, -- * CM_CLKMODE_DPLL_USB -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, -+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB - */ - #define OMAP4430_DPLL_SSC_DOWNSPREAD_SHIFT 14 - #define OMAP4430_DPLL_SSC_DOWNSPREAD_MASK (1 << 14) - - /* -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, -- * CM_CLKMODE_DPLL_USB -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, -+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB - */ - #define OMAP4430_DPLL_SSC_EN_SHIFT 12 - #define OMAP4430_DPLL_SSC_EN_MASK (1 << 12) - --/* -- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE -- */ -+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ - #define OMAP4430_DSS_DYNDEP_SHIFT 8 - #define OMAP4430_DSS_DYNDEP_MASK (1 << 8) - --/* -- * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, -- * CM_SDMA_STATICDEP_RESTORE -- */ -+/* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ - #define OMAP4430_DSS_STATDEP_SHIFT 8 - #define OMAP4430_DSS_STATDEP_MASK (1 << 8) - --/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ -+/* Used by CM_L3_2_DYNAMICDEP */ - #define OMAP4430_DUCATI_DYNDEP_SHIFT 0 - #define OMAP4430_DUCATI_DYNDEP_MASK (1 << 0) - --/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE */ -+/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ - #define OMAP4430_DUCATI_STATDEP_SHIFT 0 - #define OMAP4430_DUCATI_STATDEP_MASK (1 << 0) - --/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ -+/* Used by CM_SHADOW_FREQ_CONFIG1 */ - #define OMAP4430_FREQ_UPDATE_SHIFT 0 - #define OMAP4430_FREQ_UPDATE_MASK (1 << 0) - -@@ -802,7 +760,7 @@ - #define OMAP4430_FUNC_SHIFT 16 - #define OMAP4430_FUNC_MASK (0xfff << 16) - --/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ -+/* Used by CM_L3_2_DYNAMICDEP */ - #define OMAP4430_GFX_DYNDEP_SHIFT 10 - #define OMAP4430_GFX_DYNDEP_MASK (1 << 10) - -@@ -810,119 +768,95 @@ - #define OMAP4430_GFX_STATDEP_SHIFT 10 - #define OMAP4430_GFX_STATDEP_MASK (1 << 10) - --/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */ -+/* Used by CM_SHADOW_FREQ_CONFIG2 */ - #define OMAP4430_GPMC_FREQ_UPDATE_SHIFT 0 - #define OMAP4430_GPMC_FREQ_UPDATE_MASK (1 << 0) - - /* -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, -+ * CM_DIV_M4_DPLL_PER - */ - #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_SHIFT 0 - #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK (0x1f << 0) - - /* -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, -+ * CM_DIV_M4_DPLL_PER - */ - #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_SHIFT 5 - #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_MASK (1 << 5) - - /* -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, -+ * CM_DIV_M4_DPLL_PER - */ - #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_SHIFT 8 - #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_MASK (1 << 8) - - /* -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, -+ * CM_DIV_M4_DPLL_PER - */ - #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_SHIFT 12 - #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_MASK (1 << 12) - - /* -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, -+ * CM_DIV_M5_DPLL_PER - */ - #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_SHIFT 0 - #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK (0x1f << 0) - - /* -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, -+ * CM_DIV_M5_DPLL_PER - */ - #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_SHIFT 5 - #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_MASK (1 << 5) - - /* -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, -+ * CM_DIV_M5_DPLL_PER - */ - #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_SHIFT 8 - #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_MASK (1 << 8) - - /* -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, -+ * CM_DIV_M5_DPLL_PER - */ - #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_SHIFT 12 - #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_MASK (1 << 12) - --/* -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER -- */ -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ - #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_SHIFT 0 - #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK (0x1f << 0) - --/* -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER -- */ -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ - #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_SHIFT 5 - #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_MASK (1 << 5) - --/* -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER -- */ -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ - #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_SHIFT 8 - #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_MASK (1 << 8) - --/* -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER -- */ -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ - #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_SHIFT 12 - #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_MASK (1 << 12) - --/* -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, -- * CM_DIV_M7_DPLL_PER -- */ -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ - #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_SHIFT 0 - #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK (0x1f << 0) - --/* -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, -- * CM_DIV_M7_DPLL_PER -- */ -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ - #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_SHIFT 5 - #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_MASK (1 << 5) - --/* -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, -- * CM_DIV_M7_DPLL_PER -- */ -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ - #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_SHIFT 8 - #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_MASK (1 << 8) - --/* -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, -- * CM_DIV_M7_DPLL_PER -- */ -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ - #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_SHIFT 12 - #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_MASK (1 << 12) - -@@ -934,8 +868,7 @@ - * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL, - * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL, - * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, -- * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, -- * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, -+ * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, - * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, - * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, - * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, -@@ -944,30 +877,24 @@ - * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, - * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, - * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, -- * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL, -- * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, -- * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, -- * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, -- * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, -- * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, -+ * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, -+ * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL, -+ * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, - * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL, - * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL, - * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL, - * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, - * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, - * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, -- * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, -- * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, -- * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, -- * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, -- * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, -- * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, -- * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, -- * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, -+ * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, -+ * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, -+ * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, -+ * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, -+ * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, -+ * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, -+ * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, -+ * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, -+ * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, - * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL, - * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL, - * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL, -@@ -983,166 +910,148 @@ - #define OMAP4430_IDLEST_SHIFT 16 - #define OMAP4430_IDLEST_MASK (0x3 << 16) - --/* -- * Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, -- * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE -- */ -+/* Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ - #define OMAP4430_ISS_DYNDEP_SHIFT 9 - #define OMAP4430_ISS_DYNDEP_MASK (1 << 9) - - /* - * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, -- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * CM_TESLA_STATICDEP - */ - #define OMAP4430_ISS_STATDEP_SHIFT 9 - #define OMAP4430_ISS_STATDEP_MASK (1 << 9) - --/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_TESLA_DYNAMICDEP */ -+/* Used by CM_L3_2_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ - #define OMAP4430_IVAHD_DYNDEP_SHIFT 2 - #define OMAP4430_IVAHD_DYNDEP_MASK (1 << 2) - - /* -- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, -- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, -- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, -- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, -+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_L3INIT_STATICDEP, -+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_IVAHD_STATDEP_SHIFT 2 - #define OMAP4430_IVAHD_STATDEP_MASK (1 << 2) - --/* -- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE -- */ -+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ - #define OMAP4430_L3INIT_DYNDEP_SHIFT 7 - #define OMAP4430_L3INIT_DYNDEP_MASK (1 << 7) - - /* -- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, -- * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, -- * CM_TESLA_STATICDEP -+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_L3INIT_STATDEP_SHIFT 7 - #define OMAP4430_L3INIT_STATDEP_MASK (1 << 7) - - /* - * Used by CM_DSS_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_2_DYNAMICDEP, -- * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP -+ * CM_L4CFG_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP - */ - #define OMAP4430_L3_1_DYNDEP_SHIFT 5 - #define OMAP4430_L3_1_DYNDEP_MASK (1 << 5) - - /* -- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, -- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, -+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, -+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_L3_1_STATDEP_SHIFT 5 - #define OMAP4430_L3_1_STATDEP_MASK (1 << 5) - - /* -- * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, -- * CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, -- * CM_IVAHD_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, -- * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP -+ * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, -+ * CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, CM_IVAHD_DYNAMICDEP, -+ * CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, -+ * CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP - */ - #define OMAP4430_L3_2_DYNDEP_SHIFT 6 - #define OMAP4430_L3_2_DYNDEP_MASK (1 << 6) - - /* -- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, -- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, -+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, -+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_L3_2_STATDEP_SHIFT 6 - #define OMAP4430_L3_2_STATDEP_MASK (1 << 6) - --/* Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE */ -+/* Used by CM_L3_1_DYNAMICDEP */ - #define OMAP4430_L4CFG_DYNDEP_SHIFT 12 - #define OMAP4430_L4CFG_DYNDEP_MASK (1 << 12) - - /* -- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, -- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, -- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, -+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_L4CFG_STATDEP_SHIFT 12 - #define OMAP4430_L4CFG_STATDEP_MASK (1 << 12) - --/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ -+/* Used by CM_L3_2_DYNAMICDEP */ - #define OMAP4430_L4PER_DYNDEP_SHIFT 13 - #define OMAP4430_L4PER_DYNDEP_MASK (1 << 13) - - /* -- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, -- * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, -+ * CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_L4PER_STATDEP_SHIFT 13 - #define OMAP4430_L4PER_STATDEP_MASK (1 << 13) - --/* -- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, -- * CM_L4PER_DYNAMICDEP_RESTORE -- */ -+/* Used by CM_L3_2_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ - #define OMAP4430_L4SEC_DYNDEP_SHIFT 14 - #define OMAP4430_L4SEC_DYNDEP_MASK (1 << 14) - - /* - * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE -+ * CM_SDMA_STATICDEP - */ - #define OMAP4430_L4SEC_STATDEP_SHIFT 14 - #define OMAP4430_L4SEC_STATDEP_MASK (1 << 14) - --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ -+/* Used by CM_L4CFG_DYNAMICDEP */ - #define OMAP4430_L4WKUP_DYNDEP_SHIFT 15 - #define OMAP4430_L4WKUP_DYNDEP_MASK (1 << 15) - - /* - * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_L4WKUP_STATDEP_SHIFT 15 - #define OMAP4430_L4WKUP_STATDEP_MASK (1 << 15) - - /* -- * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_L3_1_DYNAMICDEP, -- * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP -+ * Used by CM_D2D_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, -+ * CM_MPU_DYNAMICDEP - */ - #define OMAP4430_MEMIF_DYNDEP_SHIFT 4 - #define OMAP4430_MEMIF_DYNDEP_MASK (1 << 4) - - /* -- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, -- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, -+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, -+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP - */ - #define OMAP4430_MEMIF_STATDEP_SHIFT 4 - #define OMAP4430_MEMIF_STATDEP_MASK (1 << 4) - - /* - * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, -- * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY, -- * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, -- * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, -- * CM_SSC_MODFREQDIV_DPLL_USB -+ * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, -+ * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, -+ * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB - */ - #define OMAP4430_MODFREQDIV_EXPONENT_SHIFT 8 - #define OMAP4430_MODFREQDIV_EXPONENT_MASK (0x7 << 8) - - /* - * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, -- * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY, -- * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, -- * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, -- * CM_SSC_MODFREQDIV_DPLL_USB -+ * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, -+ * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, -+ * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB - */ - #define OMAP4430_MODFREQDIV_MANTISSA_SHIFT 0 - #define OMAP4430_MODFREQDIV_MANTISSA_MASK (0x7f << 0) -@@ -1155,8 +1064,7 @@ - * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL, - * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL, - * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, -- * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, -- * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, -+ * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, - * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, - * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, - * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, -@@ -1165,30 +1073,24 @@ - * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, - * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, - * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, -- * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL, -- * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, -- * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, -- * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, -- * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, -- * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, -+ * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, -+ * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL, -+ * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, - * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL, - * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL, - * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL, - * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, - * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, - * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, -- * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, -- * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, -- * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, -- * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, -- * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, -- * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, -- * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, -- * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, -+ * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, -+ * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, -+ * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, -+ * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, -+ * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, -+ * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, -+ * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, -+ * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, -+ * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, - * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL, - * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL, - * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL, -@@ -1221,11 +1123,9 @@ - #define OMAP4430_OPTFCLKEN_CTRLCLK_MASK (1 << 8) - - /* -- * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, -- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, CM_WKUP_GPIO1_CLKCTRL -+ * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, -+ * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, -+ * CM_WKUP_GPIO1_CLKCTRL - */ - #define OMAP4430_OPTFCLKEN_DBCLK_SHIFT 8 - #define OMAP4430_OPTFCLKEN_DBCLK_MASK (1 << 8) -@@ -1254,23 +1154,23 @@ - #define OMAP4430_OPTFCLKEN_FCLK2_SHIFT 10 - #define OMAP4430_OPTFCLKEN_FCLK2_MASK (1 << 10) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT 15 - #define OMAP4430_OPTFCLKEN_FUNC48MCLK_MASK (1 << 15) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT 13 - #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_MASK (1 << 13) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT 14 - #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_MASK (1 << 14) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT 11 - #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_MASK (1 << 11) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT 12 - #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_MASK (1 << 12) - -@@ -1306,27 +1206,27 @@ - #define OMAP4430_OPTFCLKEN_TXPHYCLK_SHIFT 8 - #define OMAP4430_OPTFCLKEN_TXPHYCLK_MASK (1 << 8) - --/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT 8 - #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_MASK (1 << 8) - --/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT 9 - #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_MASK (1 << 9) - --/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT 10 - #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_MASK (1 << 10) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT 8 - #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_MASK (1 << 8) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT 9 - #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_MASK (1 << 9) - --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ - #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT 10 - #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_MASK (1 << 10) - -@@ -1374,7 +1274,7 @@ - #define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT 22 - #define OMAP4430_PMD_TRACE_MUX_CTRL_MASK (0x3 << 22) - --/* Used by CM_DYN_DEP_PRESCAL, CM_DYN_DEP_PRESCAL_RESTORE */ -+/* Used by CM_DYN_DEP_PRESCAL */ - #define OMAP4430_PRESCAL_SHIFT 0 - #define OMAP4430_PRESCAL_MASK (0x3f << 0) - -@@ -1382,10 +1282,7 @@ - #define OMAP4430_R_RTL_SHIFT 11 - #define OMAP4430_R_RTL_MASK (0x1f << 11) - --/* -- * Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, -- * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE -- */ -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL */ - #define OMAP4430_SAR_MODE_SHIFT 4 - #define OMAP4430_SAR_MODE_MASK (1 << 4) - -@@ -1397,7 +1294,7 @@ - #define OMAP4430_SCHEME_SHIFT 30 - #define OMAP4430_SCHEME_MASK (0x3 << 30) - --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ -+/* Used by CM_L4CFG_DYNAMICDEP */ - #define OMAP4430_SDMA_DYNDEP_SHIFT 11 - #define OMAP4430_SDMA_DYNDEP_MASK (1 << 11) - -@@ -1417,10 +1314,10 @@ - * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL, - * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, - * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, -- * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, -- * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, -- * CM_L3INIT_XHPI_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, -- * CM_SDMA_SDMA_CLKCTRL, CM_TESLA_TESLA_CLKCTRL -+ * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_FS_CLKCTRL, -+ * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, -+ * CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, CM_SDMA_SDMA_CLKCTRL, -+ * CM_TESLA_TESLA_CLKCTRL - */ - #define OMAP4430_STBYST_SHIFT 18 - #define OMAP4430_STBYST_MASK (1 << 18) -@@ -1438,17 +1335,13 @@ - #define OMAP4430_ST_DPLL_CLKDCOLDO_MASK (1 << 9) - - /* -- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, -- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, -- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB -+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, -+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB - */ - #define OMAP4430_ST_DPLL_CLKOUT_SHIFT 9 - #define OMAP4430_ST_DPLL_CLKOUT_MASK (1 << 9) - --/* -- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, -- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER -- */ -+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ - #define OMAP4430_ST_DPLL_CLKOUTHIF_SHIFT 9 - #define OMAP4430_ST_DPLL_CLKOUTHIF_MASK (1 << 9) - -@@ -1457,30 +1350,24 @@ - #define OMAP4430_ST_DPLL_CLKOUTX2_MASK (1 << 11) - - /* -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, -+ * CM_DIV_M4_DPLL_PER - */ - #define OMAP4430_ST_HSDIVIDER_CLKOUT1_SHIFT 9 - #define OMAP4430_ST_HSDIVIDER_CLKOUT1_MASK (1 << 9) - - /* -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, -+ * CM_DIV_M5_DPLL_PER - */ - #define OMAP4430_ST_HSDIVIDER_CLKOUT2_SHIFT 9 - #define OMAP4430_ST_HSDIVIDER_CLKOUT2_MASK (1 << 9) - --/* -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER -- */ -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ - #define OMAP4430_ST_HSDIVIDER_CLKOUT3_SHIFT 9 - #define OMAP4430_ST_HSDIVIDER_CLKOUT3_MASK (1 << 9) - --/* -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, -- * CM_DIV_M7_DPLL_PER -- */ -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ - #define OMAP4430_ST_HSDIVIDER_CLKOUT4_SHIFT 9 - #define OMAP4430_ST_HSDIVIDER_CLKOUT4_MASK (1 << 9) - -@@ -1496,7 +1383,7 @@ - #define OMAP4430_SYS_CLKSEL_SHIFT 0 - #define OMAP4430_SYS_CLKSEL_MASK (0x7 << 0) - --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ -+/* Used by CM_L4CFG_DYNAMICDEP */ - #define OMAP4430_TESLA_DYNDEP_SHIFT 1 - #define OMAP4430_TESLA_DYNDEP_MASK (1 << 1) - -@@ -1505,11 +1392,9 @@ - #define OMAP4430_TESLA_STATDEP_MASK (1 << 1) - - /* -- * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_DUCATI_DYNAMICDEP, -- * CM_EMU_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, -- * CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, -- * CM_L4PER_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP -+ * Used by CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, -+ * CM_L3_1_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, -+ * CM_L4PER_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP - */ - #define OMAP4430_WINDOWSIZE_SHIFT 24 - #define OMAP4430_WINDOWSIZE_MASK (0xf << 24) -diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h -index fc649f5..1bc00dc 100644 ---- a/arch/arm/mach-omap2/cm1_44xx.h -+++ b/arch/arm/mach-omap2/cm1_44xx.h -@@ -217,42 +217,6 @@ - #define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET 0x0088 - #define OMAP4430_CM1_ABE_WDT3_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088) - --/* CM1.RESTORE_CM1 register offsets */ --#define OMAP4_CM_CLKSEL_CORE_RESTORE_OFFSET 0x0000 --#define OMAP4430_CM_CLKSEL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0000) --#define OMAP4_CM_DIV_M2_DPLL_CORE_RESTORE_OFFSET 0x0004 --#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0004) --#define OMAP4_CM_DIV_M3_DPLL_CORE_RESTORE_OFFSET 0x0008 --#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0008) --#define OMAP4_CM_DIV_M4_DPLL_CORE_RESTORE_OFFSET 0x000c --#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x000c) --#define OMAP4_CM_DIV_M5_DPLL_CORE_RESTORE_OFFSET 0x0010 --#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0010) --#define OMAP4_CM_DIV_M6_DPLL_CORE_RESTORE_OFFSET 0x0014 --#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0014) --#define OMAP4_CM_DIV_M7_DPLL_CORE_RESTORE_OFFSET 0x0018 --#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0018) --#define OMAP4_CM_CLKSEL_DPLL_CORE_RESTORE_OFFSET 0x001c --#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x001c) --#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE_OFFSET 0x0020 --#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0020) --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE_OFFSET 0x0024 --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0024) --#define OMAP4_CM_CLKMODE_DPLL_CORE_RESTORE_OFFSET 0x0028 --#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0028) --#define OMAP4_CM_SHADOW_FREQ_CONFIG2_RESTORE_OFFSET 0x002c --#define OMAP4430_CM_SHADOW_FREQ_CONFIG2_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x002c) --#define OMAP4_CM_SHADOW_FREQ_CONFIG1_RESTORE_OFFSET 0x0030 --#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0030) --#define OMAP4_CM_AUTOIDLE_DPLL_CORE_RESTORE_OFFSET 0x0034 --#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0034) --#define OMAP4_CM_MPU_CLKSTCTRL_RESTORE_OFFSET 0x0038 --#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0038) --#define OMAP4_CM_CM1_PROFILING_CLKCTRL_RESTORE_OFFSET 0x003c --#define OMAP4430_CM_CM1_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x003c) --#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040 --#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040) -- - /* Function prototypes */ - extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx); - extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx); -diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h -index 8036a16..b9de72d 100644 ---- a/arch/arm/mach-omap2/cm2_44xx.h -+++ b/arch/arm/mach-omap2/cm2_44xx.h -@@ -449,56 +449,6 @@ - #define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020 - #define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020) - --/* CM2.RESTORE_CM2 register offsets */ --#define OMAP4_CM_L3_1_CLKSTCTRL_RESTORE_OFFSET 0x0000 --#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0000) --#define OMAP4_CM_L3_2_CLKSTCTRL_RESTORE_OFFSET 0x0004 --#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0004) --#define OMAP4_CM_L4CFG_CLKSTCTRL_RESTORE_OFFSET 0x0008 --#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0008) --#define OMAP4_CM_MEMIF_CLKSTCTRL_RESTORE_OFFSET 0x000c --#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x000c) --#define OMAP4_CM_L4PER_CLKSTCTRL_RESTORE_OFFSET 0x0010 --#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0010) --#define OMAP4_CM_L3INIT_CLKSTCTRL_RESTORE_OFFSET 0x0014 --#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0014) --#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_RESTORE_OFFSET 0x0018 --#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0018) --#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE_OFFSET 0x001c --#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x001c) --#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE_OFFSET 0x0020 --#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0020) --#define OMAP4_CM_CM2_PROFILING_CLKCTRL_RESTORE_OFFSET 0x0024 --#define OMAP4430_CM_CM2_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0024) --#define OMAP4_CM_D2D_STATICDEP_RESTORE_OFFSET 0x0028 --#define OMAP4430_CM_D2D_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0028) --#define OMAP4_CM_L3_1_DYNAMICDEP_RESTORE_OFFSET 0x002c --#define OMAP4430_CM_L3_1_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x002c) --#define OMAP4_CM_L3_2_DYNAMICDEP_RESTORE_OFFSET 0x0030 --#define OMAP4430_CM_L3_2_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0030) --#define OMAP4_CM_D2D_DYNAMICDEP_RESTORE_OFFSET 0x0034 --#define OMAP4430_CM_D2D_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0034) --#define OMAP4_CM_L4CFG_DYNAMICDEP_RESTORE_OFFSET 0x0038 --#define OMAP4430_CM_L4CFG_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0038) --#define OMAP4_CM_L4PER_DYNAMICDEP_RESTORE_OFFSET 0x003c --#define OMAP4430_CM_L4PER_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x003c) --#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_RESTORE_OFFSET 0x0040 --#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0040) --#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_RESTORE_OFFSET 0x0044 --#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0044) --#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_RESTORE_OFFSET 0x0048 --#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0048) --#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_RESTORE_OFFSET 0x004c --#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x004c) --#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_RESTORE_OFFSET 0x0050 --#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0050) --#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE_OFFSET 0x0054 --#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0054) --#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE_OFFSET 0x0058 --#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058) --#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c --#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c) -- - /* Function prototypes */ - extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx); - extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch deleted file mode 100644 index 6d9cb33..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch +++ /dev/null @@ -1,111 +0,0 @@ -From e6adacab9f633eddd83c90205bbf5a21c85c9444 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:15:06 -0600 -Subject: [PATCH 056/149] OMAP4: prcm_mpu: Fix indent in few macros - -Some maros were not well aligned. Re-align them. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/prcm_mpu44xx.h | 69 +++++++++++++++++------------------ - 1 files changed, 34 insertions(+), 35 deletions(-) - -diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h -index d22d1b4..8a6e250 100644 ---- a/arch/arm/mach-omap2/prcm_mpu44xx.h -+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h -@@ -31,7 +31,6 @@ - OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + (reg)) - - /* PRCM_MPU instances */ -- - #define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST 0x0000 - #define OMAP4430_PRCM_MPU_DEVICE_PRM_INST 0x0200 - #define OMAP4430_PRCM_MPU_CPU0_INST 0x0400 -@@ -52,46 +51,46 @@ - */ - - /* PRCM_MPU.OCP_SOCKET_PRCM register offsets */ --#define OMAP4_REVISION_PRCM_OFFSET 0x0000 --#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) -+#define OMAP4_REVISION_PRCM_OFFSET 0x0000 -+#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) - - /* PRCM_MPU.DEVICE_PRM register offsets */ --#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 --#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) --#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 --#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) -+#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 -+#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) -+#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 -+#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) - - /* PRCM_MPU.CPU0 register offsets */ --#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 --#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) --#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 --#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) --#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 --#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) --#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c --#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) --#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 --#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) --#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 --#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) --#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 --#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) -+#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 -+#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) -+#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 -+#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) -+#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 -+#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) -+#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c -+#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) -+#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 -+#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) -+#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 -+#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) -+#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 -+#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) - - /* PRCM_MPU.CPU1 register offsets */ --#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 --#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) --#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 --#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) --#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 --#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) --#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c --#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) --#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 --#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) --#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 --#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) --#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 --#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018) -+#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 -+#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) -+#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 -+#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) -+#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 -+#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) -+#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c -+#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) -+#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 -+#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) -+#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 -+#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) -+#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 -+#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018) - - /* Function prototypes */ - # ifndef __ASSEMBLER__ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order-and-wrong-name.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order-and-wrong-name.patch deleted file mode 100644 index c222d7c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order-and-wrong-name.patch +++ /dev/null @@ -1,294 +0,0 @@ -From bbf7af412d82e488052f801f294687aaf1bf260e Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 19:15:06 -0600 -Subject: [PATCH 057/149] OMAP4: clockdomain data: Fix data order and wrong name - -MPUSS was renamed MPU and L3_D2D D2D. -The rename will slightly change the order of the structure -and thus generate some structures moves. - -Add a comment and remove a comma. - -Update Copyright for TI and Nokia and add back Paul -in the author list. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clockdomains44xx_data.c | 124 ++++++++++++++------------- - 1 files changed, 63 insertions(+), 61 deletions(-) - -diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c -index a607ec1..66090f2 100644 ---- a/arch/arm/mach-omap2/clockdomains44xx_data.c -+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c -@@ -1,11 +1,12 @@ - /* - * OMAP4 Clock domains framework - * -- * Copyright (C) 2009 Texas Instruments, Inc. -- * Copyright (C) 2009 Nokia Corporation -+ * Copyright (C) 2009-2011 Texas Instruments, Inc. -+ * Copyright (C) 2009-2011 Nokia Corporation - * - * Abhijit Pagare (abhijitpagare@ti.com) - * Benoit Cousson (b-cousson@ti.com) -+ * Paul Walmsley (paul@pwsan.com) - * - * This file is automatically generated from the OMAP hardware databases. - * We respectfully ask that any modifications to this file be coordinated -@@ -32,7 +33,7 @@ - - /* Static Dependencies for OMAP4 Clock Domains */ - --static struct clkdm_dep ducati_wkup_sleep_deps[] = { -+static struct clkdm_dep d2d_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) -@@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_dss_clkdm", -+ .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_emif_clkdm", -+ .clkdm_name = "l3_init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_gfx_clkdm", -+ .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_init_clkdm", -+ .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, -+ { NULL }, -+}; -+ -+static struct clkdm_dep ducati_wkup_sleep_deps[] = { - { -- .clkdm_name = "l4_cfg_clkdm", -+ .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l4_per_clkdm", -+ .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l4_secure_clkdm", -+ .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l4_wkup_clkdm", -+ .clkdm_name = "l3_2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "tesla_clkdm", -+ .clkdm_name = "l3_dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, -- { NULL }, --}; -- --static struct clkdm_dep iss_wkup_sleep_deps[] = { - { -- .clkdm_name = "ivahd_clkdm", -+ .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_1_clkdm", -+ .clkdm_name = "l3_gfx_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_emif_clkdm", -+ .clkdm_name = "l3_init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, -- { NULL }, --}; -- --static struct clkdm_dep ivahd_wkup_sleep_deps[] = { - { -- .clkdm_name = "l3_1_clkdm", -+ .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_emif_clkdm", -+ .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, -- { NULL }, --}; -- --static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = { - { -- .clkdm_name = "abe_clkdm", -+ .clkdm_name = "l4_secure_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "ivahd_clkdm", -+ .clkdm_name = "l4_wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_1_clkdm", -+ .clkdm_name = "tesla_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, -+ { NULL }, -+}; -+ -+static struct clkdm_dep iss_wkup_sleep_deps[] = { - { -- .clkdm_name = "l3_2_clkdm", -+ .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_emif_clkdm", -+ .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l3_init_clkdm", -+ .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, -+ { NULL }, -+}; -+ -+static struct clkdm_dep ivahd_wkup_sleep_deps[] = { - { -- .clkdm_name = "l4_cfg_clkdm", -+ .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { -- .clkdm_name = "l4_per_clkdm", -+ .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { NULL }, -@@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { - { NULL }, - }; - --static struct clkdm_dep mpuss_wkup_sleep_deps[] = { -+static struct clkdm_dep mpu_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) -@@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --static struct clockdomain mpuss_44xx_clkdm = { -- .name = "mpuss_clkdm", -- .pwrdm = { .name = "mpu_pwrdm" }, -- .prcm_partition = OMAP4430_CM1_PARTITION, -- .cm_inst = OMAP4430_CM1_MPU_INST, -- .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, -- .wkdep_srcs = mpuss_wkup_sleep_deps, -- .sleepdep_srcs = mpuss_wkup_sleep_deps, -+static struct clockdomain d2d_44xx_clkdm = { -+ .name = "d2d_clkdm", -+ .pwrdm = { .name = "core_pwrdm" }, -+ .prcm_partition = OMAP4430_CM2_PARTITION, -+ .cm_inst = OMAP4430_CM2_CORE_INST, -+ .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, -+ .wkdep_srcs = d2d_wkup_sleep_deps, -+ .sleepdep_srcs = d2d_wkup_sleep_deps, - .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; -@@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -+static struct clockdomain mpu_44xx_clkdm = { -+ .name = "mpu_clkdm", -+ .pwrdm = { .name = "mpu_pwrdm" }, -+ .prcm_partition = OMAP4430_CM1_PARTITION, -+ .cm_inst = OMAP4430_CM1_MPU_INST, -+ .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, -+ .wkdep_srcs = mpu_wkup_sleep_deps, -+ .sleepdep_srcs = mpu_wkup_sleep_deps, -+ .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -+}; -+ - static struct clockdomain l3_2_44xx_clkdm = { - .name = "l3_2_clkdm", - .pwrdm = { .name = "core_pwrdm" }, -@@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --static struct clockdomain l3_d2d_44xx_clkdm = { -- .name = "l3_d2d_clkdm", -- .pwrdm = { .name = "core_pwrdm" }, -- .prcm_partition = OMAP4430_CM2_PARTITION, -- .cm_inst = OMAP4430_CM2_CORE_INST, -- .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, -- .wkdep_srcs = l3_d2d_wkup_sleep_deps, -- .sleepdep_srcs = l3_d2d_wkup_sleep_deps, -- .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, -- .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), --}; -- - static struct clockdomain iss_44xx_clkdm = { - .name = "iss_clkdm", - .pwrdm = { .name = "cam_pwrdm" }, -@@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -+/* As clockdomains are added or removed above, this list must also be changed */ - static struct clockdomain *clockdomains_omap44xx[] __initdata = { - &l4_cefuse_44xx_clkdm, - &l4_cfg_44xx_clkdm, -@@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { - &abe_44xx_clkdm, - &l3_instr_44xx_clkdm, - &l3_init_44xx_clkdm, -- &mpuss_44xx_clkdm, -+ &d2d_44xx_clkdm, - &mpu0_44xx_clkdm, - &mpu1_44xx_clkdm, - &l3_emif_44xx_clkdm, - &l4_ao_44xx_clkdm, - &ducati_44xx_clkdm, -+ &mpu_44xx_clkdm, - &l3_2_44xx_clkdm, - &l3_1_44xx_clkdm, -- &l3_d2d_44xx_clkdm, - &iss_44xx_clkdm, - &l3_dss_44xx_clkdm, - &l4_wkup_44xx_clkdm, - &emu_sys_44xx_clkdm, - &l3_dma_44xx_clkdm, -- NULL, -+ NULL - }; - - void __init omap44xx_clockdomains_init(void) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP-omap_device-replace-_find_by_pdev-with-to_omap_.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP-omap_device-replace-_find_by_pdev-with-to_omap_.patch deleted file mode 100644 index 2ed265d..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP-omap_device-replace-_find_by_pdev-with-to_omap_.patch +++ /dev/null @@ -1,84 +0,0 @@ -From b7fd7c4814b75005d2bf89d27e2160e863cdd5c3 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Sat, 9 Jul 2011 19:15:20 -0600 -Subject: [PATCH 058/149] OMAP: omap_device: replace _find_by_pdev() with to_omap_device() - -The omap_device layer currently has two ways of getting an omap_device -pointer from a platform_device pointer. - -Replace current usage of _find_by_pdev() with to_omap_device() since -to_omap_device() is more familiar to the existing to_platform_device() -used when getting a platform_device pointer from a struct device pointer. - -Cc: Felipe Balbi <balbi@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Reviewed-by: Felipe Balbi <balbi@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/plat-omap/omap_device.c | 15 +++++---------- - 1 files changed, 5 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c -index 49fc0df..c8b9cd1 100644 ---- a/arch/arm/plat-omap/omap_device.c -+++ b/arch/arm/plat-omap/omap_device.c -@@ -236,11 +236,6 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) - return 0; - } - --static inline struct omap_device *_find_by_pdev(struct platform_device *pdev) --{ -- return container_of(pdev, struct omap_device, pdev); --} -- - /** - * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks - * @od: struct omap_device *od -@@ -316,7 +311,7 @@ u32 omap_device_get_context_loss_count(struct platform_device *pdev) - struct omap_device *od; - u32 ret = 0; - -- od = _find_by_pdev(pdev); -+ od = to_omap_device(pdev); - - if (od->hwmods_cnt) - ret = omap_hwmod_get_context_loss_count(od->hwmods[0]); -@@ -611,7 +606,7 @@ int omap_device_enable(struct platform_device *pdev) - int ret; - struct omap_device *od; - -- od = _find_by_pdev(pdev); -+ od = to_omap_device(pdev); - - if (od->_state == OMAP_DEVICE_STATE_ENABLED) { - WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", -@@ -650,7 +645,7 @@ int omap_device_idle(struct platform_device *pdev) - int ret; - struct omap_device *od; - -- od = _find_by_pdev(pdev); -+ od = to_omap_device(pdev); - - if (od->_state != OMAP_DEVICE_STATE_ENABLED) { - WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", -@@ -681,7 +676,7 @@ int omap_device_shutdown(struct platform_device *pdev) - int ret, i; - struct omap_device *od; - -- od = _find_by_pdev(pdev); -+ od = to_omap_device(pdev); - - if (od->_state != OMAP_DEVICE_STATE_ENABLED && - od->_state != OMAP_DEVICE_STATE_IDLE) { -@@ -722,7 +717,7 @@ int omap_device_align_pm_lat(struct platform_device *pdev, - int ret = -EINVAL; - struct omap_device *od; - -- od = _find_by_pdev(pdev); -+ od = to_omap_device(pdev); - - if (new_wakeup_lat_limit == od->dev_wakeup_lat) - return 0; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config-option.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config-option.patch deleted file mode 100644 index d9c78e3..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config-option.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 32f213e65477010bd1ac349b4bbe438958044e9f Mon Sep 17 00:00:00 2001 -From: Jean Pihet <jean.pihet@newoldbits.com> -Date: Sat, 9 Jul 2011 19:15:41 -0600 -Subject: [PATCH 059/149] OMAP PM: remove OMAP_PM_NONE config option - -The current code base is not linking with the OMAP_PM_NONE -option set. -Since the option OMAP_PM_NOOP provides a no-op/debug layer, -OMAP_PM_NONE can be removed. -OMAP_PM_NOOP is enabled by default by Kconfig. - -Signed-off-by: Jean Pihet <j-pihet@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/plat-omap/Kconfig | 3 --- - arch/arm/plat-omap/include/plat/omap-pm.h | 8 -------- - 2 files changed, 0 insertions(+), 11 deletions(-) - -diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig -index 49a4c75..6e6735f 100644 ---- a/arch/arm/plat-omap/Kconfig -+++ b/arch/arm/plat-omap/Kconfig -@@ -211,9 +211,6 @@ choice - depends on ARCH_OMAP - default OMAP_PM_NOOP - --config OMAP_PM_NONE -- bool "No PM layer" -- - config OMAP_PM_NOOP - bool "No-op/debug PM layer" - -diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h -index c0a7520..0840df8 100644 ---- a/arch/arm/plat-omap/include/plat/omap-pm.h -+++ b/arch/arm/plat-omap/include/plat/omap-pm.h -@@ -40,11 +40,7 @@ - * framework starts. The "_if_" is to avoid name collisions with the - * PM idle-loop code. - */ --#ifdef CONFIG_OMAP_PM_NONE --#define omap_pm_if_early_init() 0 --#else - int __init omap_pm_if_early_init(void); --#endif - - /** - * omap_pm_if_init - OMAP PM init code called after clock fw init -@@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void); - * The main initialization code. OPP tables are passed in here. The - * "_if_" is to avoid name collisions with the PM idle-loop code. - */ --#ifdef CONFIG_OMAP_PM_NONE --#define omap_pm_if_init() 0 --#else - int __init omap_pm_if_init(void); --#endif - - /** - * omap_pm_if_exit - OMAP PM exit code --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2-McASP3-and-MMC6-clock.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2-McASP3-and-MMC6-clock.patch deleted file mode 100644 index a7e85f8..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2-McASP3-and-MMC6-clock.patch +++ /dev/null @@ -1,178 +0,0 @@ -From e2c80dceb999bf93d079d0a5a040951aad3d2359 Mon Sep 17 00:00:00 2001 -From: Jon Hunter <jon-hunter@ti.com> -Date: Sat, 9 Jul 2011 19:14:47 -0600 -Subject: [PATCH 060/149] OMAP4: clock data: Remove McASP2, McASP3 and MMC6 clocks - -McASP2, 3 and MMC6 modules are not present in the OMAP4 family. -Remove the fclk and the clksel related to these nodes. -Rename the references that were potentially re-used in order nodes. - -Remove related macros in prcm header files. - -Update TI copyright date. - -Signed-off-by: Jon Hunter <jon-hunter@ti.com> -[b-cousson@ti.com: Update the patch according to autogen output] -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -[paul@pwsan.com: split PRCM data changes into a separate patch] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 86 ++++++++++++--------------------- - 1 files changed, 31 insertions(+), 55 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 8307c9e..96bc668 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -1170,19 +1170,6 @@ static struct clk func_96m_fclk = { - .set_rate = &omap2_clksel_set_rate, - }; - --static const struct clksel hsmmc6_fclk_sel[] = { -- { .parent = &func_64m_fclk, .rates = div_1_0_rates }, -- { .parent = &func_96m_fclk, .rates = div_1_1_rates }, -- { .parent = NULL }, --}; -- --static struct clk hsmmc6_fclk = { -- .name = "hsmmc6_fclk", -- .parent = &func_64m_fclk, -- .ops = &clkops_null, -- .recalc = &followparent_recalc, --}; -- - static const struct clksel_rate div2_1to8_rates[] = { - { .div = 1, .val = 0, .flags = RATE_IN_4430 }, - { .div = 8, .val = 1, .flags = RATE_IN_4430 }, -@@ -1265,6 +1252,21 @@ static struct clk l4_wkup_clk_mux_ck = { - .recalc = &omap2_clksel_recalc, - }; - -+static struct clk ocp_abe_iclk = { -+ .name = "ocp_abe_iclk", -+ .parent = &aess_fclk, -+ .ops = &clkops_null, -+ .recalc = &followparent_recalc, -+}; -+ -+static struct clk per_abe_24m_fclk = { -+ .name = "per_abe_24m_fclk", -+ .parent = &dpll_abe_m2_ck, -+ .ops = &clkops_null, -+ .fixed_div = 4, -+ .recalc = &omap_fixed_divisor_recalc, -+}; -+ - static const struct clksel per_abe_nc_fclk_div[] = { - { .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates }, - { .parent = NULL }, -@@ -1282,41 +1284,6 @@ static struct clk per_abe_nc_fclk = { - .set_rate = &omap2_clksel_set_rate, - }; - --static const struct clksel mcasp2_fclk_sel[] = { -- { .parent = &func_96m_fclk, .rates = div_1_0_rates }, -- { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, -- { .parent = NULL }, --}; -- --static struct clk mcasp2_fclk = { -- .name = "mcasp2_fclk", -- .parent = &func_96m_fclk, -- .ops = &clkops_null, -- .recalc = &followparent_recalc, --}; -- --static struct clk mcasp3_fclk = { -- .name = "mcasp3_fclk", -- .parent = &func_96m_fclk, -- .ops = &clkops_null, -- .recalc = &followparent_recalc, --}; -- --static struct clk ocp_abe_iclk = { -- .name = "ocp_abe_iclk", -- .parent = &aess_fclk, -- .ops = &clkops_null, -- .recalc = &followparent_recalc, --}; -- --static struct clk per_abe_24m_fclk = { -- .name = "per_abe_24m_fclk", -- .parent = &dpll_abe_m2_ck, -- .ops = &clkops_null, -- .fixed_div = 4, -- .recalc = &omap_fixed_divisor_recalc, --}; -- - static const struct clksel pmd_stm_clock_mux_sel[] = { - { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, - { .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates }, -@@ -1996,10 +1963,16 @@ static struct clk mcbsp3_fck = { - .clkdm_name = "abe_clkdm", - }; - -+static const struct clksel mcbsp4_sync_mux_sel[] = { -+ { .parent = &func_96m_fclk, .rates = div_1_0_rates }, -+ { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, -+ { .parent = NULL }, -+}; -+ - static struct clk mcbsp4_sync_mux_ck = { - .name = "mcbsp4_sync_mux_ck", - .parent = &func_96m_fclk, -- .clksel = mcasp2_fclk_sel, -+ .clksel = mcbsp4_sync_mux_sel, - .init = &omap2_init_clksel_parent, - .clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, - .clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK, -@@ -2078,11 +2051,17 @@ static struct clk mcspi4_fck = { - .recalc = &followparent_recalc, - }; - -+static const struct clksel hsmmc1_fclk_sel[] = { -+ { .parent = &func_64m_fclk, .rates = div_1_0_rates }, -+ { .parent = &func_96m_fclk, .rates = div_1_1_rates }, -+ { .parent = NULL }, -+}; -+ - /* Merged hsmmc1_fclk into mmc1 */ - static struct clk mmc1_fck = { - .name = "mmc1_fck", - .parent = &func_64m_fclk, -- .clksel = hsmmc6_fclk_sel, -+ .clksel = hsmmc1_fclk_sel, - .init = &omap2_init_clksel_parent, - .clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, - .clksel_mask = OMAP4430_CLKSEL_MASK, -@@ -2097,7 +2076,7 @@ static struct clk mmc1_fck = { - static struct clk mmc2_fck = { - .name = "mmc2_fck", - .parent = &func_64m_fclk, -- .clksel = hsmmc6_fclk_sel, -+ .clksel = hsmmc1_fclk_sel, - .init = &omap2_init_clksel_parent, - .clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, - .clksel_mask = OMAP4430_CLKSEL_MASK, -@@ -3094,17 +3073,14 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X), - CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X), - CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X), -- CLK(NULL, "hsmmc6_fclk", &hsmmc6_fclk, CK_443X), - CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X), - CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X), - CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), - CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), - CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), -- CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), -- CLK(NULL, "mcasp2_fclk", &mcasp2_fclk, CK_443X), -- CLK(NULL, "mcasp3_fclk", &mcasp3_fclk, CK_443X), - CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), - CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), -+ CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), - CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X), - CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X), - CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X), --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch deleted file mode 100644 index fb4d44f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 73203093397f6939cea566cbedc2affc51d4b597 Mon Sep 17 00:00:00 2001 -From: Jon Hunter <jon-hunter@ti.com> -Date: Sat, 9 Jul 2011 19:14:47 -0600 -Subject: [PATCH 061/149] OMAP4: clock data: Remove UNIPRO clock nodes - -UNIPRO was removed from OMAP4 devices from ES2.0 onwards. -Since this IP was anyway non-functional and not supported, -it is best to remove it completely. - -Signed-off-by: Jon Hunter <jon-hunter@ti.com> -[b-cousson@ti.com: Update the changelog] -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -[paul@pwsan.com: split PRCM header file changes into a separate patch] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 60 ---------------------------------- - 1 files changed, 0 insertions(+), 60 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 96bc668..044df38 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = { - .set_rate = &omap2_clksel_set_rate, - }; - --/* DPLL_UNIPRO */ --static struct dpll_data dpll_unipro_dd = { -- .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO, -- .clk_bypass = &sys_clkin_ck, -- .clk_ref = &sys_clkin_ck, -- .control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO, -- .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), -- .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO, -- .idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO, -- .mult_mask = OMAP4430_DPLL_MULT_MASK, -- .div1_mask = OMAP4430_DPLL_DIV_MASK, -- .enable_mask = OMAP4430_DPLL_EN_MASK, -- .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, -- .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, -- .max_multiplier = 2047, -- .max_divider = 128, -- .min_divider = 1, --}; -- -- --static struct clk dpll_unipro_ck = { -- .name = "dpll_unipro_ck", -- .parent = &sys_clkin_ck, -- .dpll_data = &dpll_unipro_dd, -- .init = &omap2_init_dpll_parent, -- .ops = &clkops_omap3_noncore_dpll_ops, -- .recalc = &omap3_dpll_recalc, -- .round_rate = &omap2_dpll_round_rate, -- .set_rate = &omap3_noncore_dpll_set_rate, --}; -- --static struct clk dpll_unipro_x2_ck = { -- .name = "dpll_unipro_x2_ck", -- .parent = &dpll_unipro_ck, -- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, -- .flags = CLOCK_CLKOUTX2, -- .ops = &clkops_omap4_dpllmx_ops, -- .recalc = &omap3_clkoutx2_recalc, --}; -- --static const struct clksel dpll_unipro_m2x2_div[] = { -- { .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates }, -- { .parent = NULL }, --}; -- --static struct clk dpll_unipro_m2x2_ck = { -- .name = "dpll_unipro_m2x2_ck", -- .parent = &dpll_unipro_x2_ck, -- .clksel = dpll_unipro_m2x2_div, -- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, -- .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, -- .ops = &clkops_omap4_dpllmx_ops, -- .recalc = &omap2_clksel_recalc, -- .round_rate = &omap2_clksel_round_rate, -- .set_rate = &omap2_clksel_set_rate, --}; -- - static struct clk usb_hs_clk_div_ck = { - .name = "usb_hs_clk_div_ck", - .parent = &dpll_abe_m3x2_ck, -@@ -3058,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X), - CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X), - CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X), -- CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, CK_443X), -- CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, CK_443X), -- CLK(NULL, "dpll_unipro_m2x2_ck", &dpll_unipro_m2x2_ck, CK_443X), - CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X), - CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X), - CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X), --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch deleted file mode 100644 index 69c3b2a..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch +++ /dev/null @@ -1,153 +0,0 @@ -From 52d08db173e39f2af6923dc803593d62fa05e43b Mon Sep 17 00:00:00 2001 -From: Tomi Valkeinen <tomi.valkeinen@ti.com> -Date: Sat, 9 Jul 2011 20:39:44 -0600 -Subject: [PATCH 062/149] OMAP4: hwmod data: Modify DSS opt clocks - -Add missing DSS optional clocks to HWMOD data for OMAP4xxx. - -Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset. - -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> -[b-cousson@ti.com: Remove a comment and update the subject] -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> -[paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's - request] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 8 +++--- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 33 ++++++++++++++++++++++++++++ - 2 files changed, 37 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 044df38..7a0b112 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -3032,10 +3032,10 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), - CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), - CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), -- CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), -- CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), -- CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), -- CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X), -+ CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), -+ CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), -+ CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), -+ CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), - CLK("omapdss_dss", "ick", &dss_fck, CK_443X), - CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), - CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index e011437..a7fbe5c 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -1267,9 +1267,16 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = { - &omap44xx_l4_per__dss_dispc, - }; - -+static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { -+ { .role = "sys_clk", .clk = "dss_sys_clk" }, -+ { .role = "tv_clk", .clk = "dss_tv_clk" }, -+ { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, -+}; -+ - static struct omap_hwmod omap44xx_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap44xx_dispc_hwmod_class, -+ .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_dss_dispc_irqs, - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, - .main_clk = "dss_fck", -@@ -1278,6 +1285,8 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, - }, - }, -+ .opt_clks = dss_dispc_opt_clks, -+ .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), - .slaves = omap44xx_dss_dispc_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -1358,6 +1367,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = { - &omap44xx_l4_per__dss_dsi1, - }; - -+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { -+ { .role = "sys_clk", .clk = "dss_sys_clk" }, -+}; -+ - static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - .name = "dss_dsi1", - .class = &omap44xx_dsi_hwmod_class, -@@ -1369,6 +1382,8 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, - }, - }, -+ .opt_clks = dss_dsi1_opt_clks, -+ .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), - .slaves = omap44xx_dss_dsi1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -1428,6 +1443,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = { - &omap44xx_l4_per__dss_dsi2, - }; - -+static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { -+ { .role = "sys_clk", .clk = "dss_sys_clk" }, -+}; -+ - static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { - .name = "dss_dsi2", - .class = &omap44xx_dsi_hwmod_class, -@@ -1439,6 +1458,8 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, - }, - }, -+ .opt_clks = dss_dsi2_opt_clks, -+ .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), - .slaves = omap44xx_dss_dsi2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -1518,6 +1539,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = { - &omap44xx_l4_per__dss_hdmi, - }; - -+static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { -+ { .role = "sys_clk", .clk = "dss_sys_clk" }, -+}; -+ - static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { - .name = "dss_hdmi", - .class = &omap44xx_hdmi_hwmod_class, -@@ -1529,6 +1554,8 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, - }, - }, -+ .opt_clks = dss_hdmi_opt_clks, -+ .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), - .slaves = omap44xx_dss_hdmi_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -1603,6 +1630,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = { - &omap44xx_l4_per__dss_rfbi, - }; - -+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { -+ { .role = "ick", .clk = "dss_fck" }, -+}; -+ - static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { - .name = "dss_rfbi", - .class = &omap44xx_rfbi_hwmod_class, -@@ -1613,6 +1644,8 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, - }, - }, -+ .opt_clks = dss_rfbi_opt_clks, -+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), - .slaves = omap44xx_dss_rfbi_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch deleted file mode 100644 index b8ea798..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 1588fef412d710916847c3f383489af1559aa4b0 Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Sat, 9 Jul 2011 20:42:11 -0600 -Subject: [PATCH 063/149] OMAP2+: PM: Initialise sleep_switch to a non-valid value - -sleep_switch which is initialised to 0 in omap_set_pwrdm_state -happens to be a valid sleep_switch type (FORCEWAKEUP_SWITCH) -which are defined as: - - #define FORCEWAKEUP_SWITCH 0 - #define LOWPOWERSTATE_SWITCH 1 - -This causes the function to wrongly program some clock domains -even when the Powerdomain is in ON state. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Acked-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/pm.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c -index 49486f5..d48813f 100644 ---- a/arch/arm/mach-omap2/pm.c -+++ b/arch/arm/mach-omap2/pm.c -@@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void) - int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) - { - u32 cur_state; -- int sleep_switch = 0; -+ int sleep_switch = -1; - int ret = 0; - - if (pwrdm == NULL || IS_ERR(pwrdm)) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem-states-and-missi.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem-states-and-missi.patch deleted file mode 100644 index 2222a2b..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem-states-and-missi.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 2e67179b61fd7b58ecbafd72fe07943620863ae7 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sat, 9 Jul 2011 20:42:11 -0600 -Subject: [PATCH 064/149] OMAP4: powerdomain data: Fix core mem states and missing cefuse flag - -Since ES2.0, the core ocmram does not support a different state -than the main power domain anymore during both ON and RET power -domain state. -Since PM is not supported at all in ES1.0, update the common -structure. - -LOWPOWERSTATECHANGE is supported by the cefuse power domain but -the flag was missing. -Add the PWRDM_HAS_LOWPOWERSTATECHANGE in flags field. - -Update the TI copyright date to 2011. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> -[paul@pwsan.com: moved the indentation changes to a different patch set] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/powerdomains44xx_data.c | 7 ++++--- - 1 files changed, 4 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c -index 3a7e678..8f46e7d 100644 ---- a/arch/arm/mach-omap2/powerdomains44xx_data.c -+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c -@@ -1,7 +1,7 @@ - /* - * OMAP4 Power domains framework - * -- * Copyright (C) 2009-2010 Texas Instruments, Inc. -+ * Copyright (C) 2009-2011 Texas Instruments, Inc. - * Copyright (C) 2009-2011 Nokia Corporation - * - * Abhijit Pagare (abhijitpagare@ti.com) -@@ -41,14 +41,14 @@ static struct powerdomain core_44xx_pwrdm = { - .banks = 5, - .pwrsts_mem_ret = { - [0] = PWRSTS_OFF, /* core_nret_bank */ -- [1] = PWRSTS_OFF_RET, /* core_ocmram */ -+ [1] = PWRSTS_RET, /* core_ocmram */ - [2] = PWRSTS_RET, /* core_other_bank */ - [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ - [4] = PWRSTS_OFF_RET, /* ducati_unicache */ - }, - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* core_nret_bank */ -- [1] = PWRSTS_OFF_RET, /* core_ocmram */ -+ [1] = PWRSTS_ON, /* core_ocmram */ - [2] = PWRSTS_ON, /* core_other_bank */ - [3] = PWRSTS_ON, /* ducati_l2ram */ - [4] = PWRSTS_ON, /* ducati_unicache */ -@@ -318,6 +318,7 @@ static struct powerdomain cefuse_44xx_pwrdm = { - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - .pwrsts = PWRSTS_OFF_ON, -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - }; - - /* --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks-always-enabled-and.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks-always-enabled-and.patch deleted file mode 100644 index 8eee066..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks-always-enabled-and.patch +++ /dev/null @@ -1,45 +0,0 @@ -From f54325009439b13e234374856057227edc00373c Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar <santosh.shilimkar@ti.com> -Date: Sat, 9 Jul 2011 20:42:59 -0600 -Subject: [PATCH 065/149] OMAP4: clock data: Keep GPMC clocks always enabled and hardware managed - -On OMAP4, CPU accesses on unmapped addresses are redirected to GPMC by -L3 interconnect. Because of CPU speculative nature, such accesses are -possible which can lead to indirect access to GPMC and if it's clock is -not running, it can result in hang/abort on the platform. - -Above makes access to GPMC unpredictable during the execution, so it's -module mode needs to be kept under hardware control instead of software -control. -Since the auto gating is supported for GPMC, there isn't any power impact -because of this change. - -The issue was un-covered with security middleware running along with HLOS. -In this case GPMC had a valid MMU descriptor on secure side where as HLOS -didn't map the GMPC because it isn't being used. - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -[b-cousson@ti.com: Update subject and fix typos in the changelog] -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Kevin Hilman <khilman@ti.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 7a0b112..2578820 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -1605,6 +1605,7 @@ static struct clk gpmc_ick = { - .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL, - .enable_bit = OMAP4430_MODULEMODE_HWCTRL, -+ .flags = ENABLE_ON_INIT, - .clkdm_name = "l3_2_clkdm", - .parent = &l3_div_ck, - .recalc = &followparent_recalc, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove-unsupported-MPU-powerd.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove-unsupported-MPU-powerd.patch deleted file mode 100644 index 7c7671f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove-unsupported-MPU-powerd.patch +++ /dev/null @@ -1,44 +0,0 @@ -From ef733ded20f0466c32d61872f19903653f31f977 Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar <santosh.shilimkar@ti.com> -Date: Sat, 9 Jul 2011 20:42:59 -0600 -Subject: [PATCH 066/149] OMAP4: powerdomain data: Remove unsupported MPU powerdomain state - -On OMAP4430 devices, because of boot ROM code bug, MPU OFF state can't -be attempted independently. When coming out of MPU OFF state, ROM code -disables the clocks of IVAHD, TESLA which is not desirable. Hence the -MPU OFF state is not usable on OMAP4430 devices. - -OMAP4460 onwards, MPU OFF state will be descoped completely because -the DDR firewall falls in MPU power domain. When the MPU hit OFF state, -DDR won't be accessible for other initiators. The deepest state supported -is open switch retention (OSWR) just like CORE and PER PD on OMAP4430. - -So in summary MPU power domain OFF state is not supported on OMAP4 -and onwards designs. Thanks to new PRCM design, device off mode can -still be achieved with power domains hitting OSWR state. - -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -[b-cousson@ti.com: Fix changelog typos] -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/powerdomains44xx_data.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c -index 8f46e7d..247e794 100644 ---- a/arch/arm/mach-omap2/powerdomains44xx_data.c -+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c -@@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = { - .prcm_offs = OMAP4430_PRM_MPU_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -- .pwrsts = PWRSTS_OFF_RET_ON, -+ .pwrsts = PWRSTS_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, - .banks = 3, - .pwrsts_mem_ret = { --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk-scheme.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk-scheme.patch deleted file mode 100644 index 50baf2a..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk-scheme.patch +++ /dev/null @@ -1,163 +0,0 @@ -From 497db49799f6c84f5073c6b78e58094ba0b0d52e Mon Sep 17 00:00:00 2001 -From: Tomi Valkeinen <tomi.valkeinen@ti.com> -Date: Sat, 9 Jul 2011 20:39:45 -0600 -Subject: [PATCH 067/149] OMAP4: hwmod data: Change DSS main_clk scheme - -Currently using pm_runtime with DSS requires the DSS driver to enable -the DSS functional clock before calling pm_runtime_get(). That makes it -impossible to use pm_runtime in DSS as it is meant to be used, with -pm_runtime callbacks. - -This patch changes the hwmod database for OMAP4 so that enabling the -hwmod via pm_runtime will also enable the DSS functional clock, allowing -us to use pm_runtime properly in DSS driver. - -The DSS HWMOD side is not really correct, not before nor after this -patch, and getting DSS to retention will probably not work currently. -However, it is not supported in the mainline kernel anyway, so this -won't break anything. - -So this patch allows us to write the pm_runtime adaptation for the DSS -driver the way it should be done, and the HWMOD/PM side can be fixed -later. - -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 28 ++++++++++++++-------------- - 1 files changed, 14 insertions(+), 14 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index a7fbe5c..b25ab83 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -1136,7 +1136,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_hwmod, -- .clk = "l3_div_ck", -+ .clk = "dss_fck", - .addr = omap44xx_dss_dma_addrs, - .user = OCP_USER_SDMA, - }; -@@ -1175,7 +1175,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { - static struct omap_hwmod omap44xx_dss_hwmod = { - .name = "dss_core", - .class = &omap44xx_dss_hwmod_class, -- .main_clk = "dss_fck", -+ .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -@@ -1238,7 +1238,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_dispc_hwmod, -- .clk = "l3_div_ck", -+ .clk = "dss_fck", - .addr = omap44xx_dss_dispc_dma_addrs, - .user = OCP_USER_SDMA, - }; -@@ -1279,7 +1279,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_dss_dispc_irqs, - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, -- .main_clk = "dss_fck", -+ .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -@@ -1338,7 +1338,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_dsi1_hwmod, -- .clk = "l3_div_ck", -+ .clk = "dss_fck", - .addr = omap44xx_dss_dsi1_dma_addrs, - .user = OCP_USER_SDMA, - }; -@@ -1376,7 +1376,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - .class = &omap44xx_dsi_hwmod_class, - .mpu_irqs = omap44xx_dss_dsi1_irqs, - .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, -- .main_clk = "dss_fck", -+ .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -@@ -1414,7 +1414,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_dsi2_hwmod, -- .clk = "l3_div_ck", -+ .clk = "dss_fck", - .addr = omap44xx_dss_dsi2_dma_addrs, - .user = OCP_USER_SDMA, - }; -@@ -1452,7 +1452,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { - .class = &omap44xx_dsi_hwmod_class, - .mpu_irqs = omap44xx_dss_dsi2_irqs, - .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, -- .main_clk = "dss_fck", -+ .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -@@ -1510,7 +1510,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_hdmi_hwmod, -- .clk = "l3_div_ck", -+ .clk = "dss_fck", - .addr = omap44xx_dss_hdmi_dma_addrs, - .user = OCP_USER_SDMA, - }; -@@ -1548,7 +1548,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { - .class = &omap44xx_hdmi_hwmod_class, - .mpu_irqs = omap44xx_dss_hdmi_irqs, - .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, -- .main_clk = "dss_fck", -+ .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -@@ -1601,7 +1601,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_rfbi_hwmod, -- .clk = "l3_div_ck", -+ .clk = "dss_fck", - .addr = omap44xx_dss_rfbi_dma_addrs, - .user = OCP_USER_SDMA, - }; -@@ -1638,7 +1638,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { - .name = "dss_rfbi", - .class = &omap44xx_rfbi_hwmod_class, - .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, -- .main_clk = "dss_fck", -+ .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -@@ -1675,7 +1675,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_dss_venc_hwmod, -- .clk = "l3_div_ck", -+ .clk = "dss_fck", - .addr = omap44xx_dss_venc_dma_addrs, - .user = OCP_USER_SDMA, - }; -@@ -1707,7 +1707,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = { - static struct omap_hwmod omap44xx_dss_venc_hwmod = { - .name = "dss_venc", - .class = &omap44xx_venc_hwmod_class, -- .main_clk = "dss_fck", -+ .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit-acces.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit-acces.patch deleted file mode 100644 index 6a0dea5..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit-acces.patch +++ /dev/null @@ -1,133 +0,0 @@ -From 3bc9e748aeea5c152564186ad65ae7f7848420d3 Mon Sep 17 00:00:00 2001 -From: Andy Green <andy@warmcat.com> -Date: Sun, 10 Jul 2011 05:27:14 -0600 -Subject: [PATCH 068/149] I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c - -Peter Maydell noticed when running under QEMU he was getting -errors reporting 32-bit access to I2C peripheral unit registers -that are documented to be 8 or 16-bit only[1][2] - -The I2C driver is blameless as it wraps its accesses in a -function using __raw_writew and __raw_readw, it turned out it -is the hwmod stuff. - -However the hwmod code already has a flag to force a -perhipheral unit to only be accessed using 16-bit operations. - -This patch applies the 16-bit only flag to the 2430, -OMAP3xxx and OMAP44xx hwmod structs. 2420 was already -correctly marked up as 16-bit. - -The 2430 change will need testing by TI as arranged -in the comments to the previous patch version. - -When the 16-bit flag is or-ed with other flags, it is placed -first as requested in comments. - -[1] OMAP4430 Technical reference manual section 23.1.6.2 -[2] OMAP3530 Techincal reference manual section 18.6 - -Cc: patches@linaro.org -Cc: Ben Dooks <ben-linux@fluff.org> -Reported-by: Peter Maydell <peter.maydell@linaro.org> -Signed-off-by: Andy Green <andy.green@linaro.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 ++ - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 3 +++ - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 8 ++++---- - 3 files changed, 9 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index 2a52f02..19ddf08 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -1092,6 +1092,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { - - static struct omap_hwmod omap2430_i2c1_hwmod = { - .name = "i2c1", -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = omap2_i2c1_sdma_reqs, - .main_clk = "i2chs1_fck", -@@ -1127,6 +1128,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { - - static struct omap_hwmod omap2430_i2c2_hwmod = { - .name = "i2c2", -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = omap2_i2c2_sdma_reqs, - .main_clk = "i2chs2_fck", -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 1a52716..542a11b 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -1615,6 +1615,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { - - static struct omap_hwmod omap3xxx_i2c1_hwmod = { - .name = "i2c1", -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = omap2_i2c1_sdma_reqs, - .main_clk = "i2c1_fck", -@@ -1646,6 +1647,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { - - static struct omap_hwmod omap3xxx_i2c2_hwmod = { - .name = "i2c2", -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = omap2_i2c2_sdma_reqs, - .main_clk = "i2c2_fck", -@@ -1688,6 +1690,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { - - static struct omap_hwmod omap3xxx_i2c3_hwmod = { - .name = "i2c3", -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = i2c3_mpu_irqs, - .sdma_reqs = i2c3_sdma_reqs, - .main_clk = "i2c3_fck", -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index b25ab83..2ebccb8 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -2201,7 +2201,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { - static struct omap_hwmod omap44xx_i2c1_hwmod = { - .name = "i2c1", - .class = &omap44xx_i2c_hwmod_class, -- .flags = HWMOD_INIT_NO_RESET, -+ .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c1_irqs, - .sdma_reqs = omap44xx_i2c1_sdma_reqs, - .main_clk = "i2c1_fck", -@@ -2254,7 +2254,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { - static struct omap_hwmod omap44xx_i2c2_hwmod = { - .name = "i2c2", - .class = &omap44xx_i2c_hwmod_class, -- .flags = HWMOD_INIT_NO_RESET, -+ .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c2_irqs, - .sdma_reqs = omap44xx_i2c2_sdma_reqs, - .main_clk = "i2c2_fck", -@@ -2307,7 +2307,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { - static struct omap_hwmod omap44xx_i2c3_hwmod = { - .name = "i2c3", - .class = &omap44xx_i2c_hwmod_class, -- .flags = HWMOD_INIT_NO_RESET, -+ .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c3_irqs, - .sdma_reqs = omap44xx_i2c3_sdma_reqs, - .main_clk = "i2c3_fck", -@@ -2360,7 +2360,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { - static struct omap_hwmod omap44xx_i2c4_hwmod = { - .name = "i2c4", - .class = &omap44xx_i2c_hwmod_class, -- .flags = HWMOD_INIT_NO_RESET, -+ .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_i2c4_irqs, - .sdma_reqs = omap44xx_i2c4_sdma_reqs, - .main_clk = "i2c4_fck", --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr-flags-from-u8-t.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr-flags-from-u8-t.patch deleted file mode 100644 index cb36f97..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr-flags-from-u8-t.patch +++ /dev/null @@ -1,46 +0,0 @@ -From c32768648dfe7f6bbe90ee0b18d1edb60fc141fe Mon Sep 17 00:00:00 2001 -From: Andy Green <andy@warmcat.com> -Date: Sun, 10 Jul 2011 05:27:14 -0600 -Subject: [PATCH 069/149] I2C: OMAP2+: increase omap_i2c_dev_attr flags from u8 to u32 - -As part of removing cpu_...() from the OMAP I2C driver, we need to -convert the CPU tests into functionality flags that are set by -hwmod class in the same way the IP revision is. - -More flags are needed than will fit in the existing u8 flags -member of omap_i2c_dev_attr. - -These flags can refer to options inside the IP block but they are -most needed for information about cpu implementation specific -options that are not part of the IP block itself. For example, -how the CPU data bus is wired to the IP block databus differs -between OMAP cpus and affects how you must shift the address in -the IP block, but is not a feature of the IP block itself. - -Cc: patches@linaro.org -Cc: Ben Dooks <ben-linux@fluff.org> -Reported-by: Peter Maydell <peter.maydell@linaro.org> -Signed-off-by: Andy Green <andy.green@linaro.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/plat-omap/include/plat/i2c.h | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h -index 878d632..4c108f5 100644 ---- a/arch/arm/plat-omap/include/plat/i2c.h -+++ b/arch/arm/plat-omap/include/plat/i2c.h -@@ -46,7 +46,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, - */ - struct omap_i2c_dev_attr { - u8 fifo_depth; -- u8 flags; -+ u32 flags; - }; - - void __init omap1_i2c_mux_pins(int bus_id); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning-constants.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning-constants.patch deleted file mode 100644 index 9c4b51c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning-constants.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 109f56f616221cb632ce98b5da05420f2099eff1 Mon Sep 17 00:00:00 2001 -From: Andy Green <andy@warmcat.com> -Date: Sun, 10 Jul 2011 05:27:14 -0600 -Subject: [PATCH 070/149] I2C: OMAP2+: Introduce I2C IP versioning constants - -These represent the two kinds of (incompatible) OMAP I2C -peripheral unit in use so far. - -The constants are in linux/i2c-omap.h so the omap i2c driver can have -them too. - -Cc: patches@linaro.org -Cc: Ben Dooks <ben-linux@fluff.org> -Reported-by: Peter Maydell <peter.maydell@linaro.org> -Signed-off-by: Andy Green <andy.green@linaro.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/plat-omap/include/plat/i2c.h | 1 + - include/linux/i2c-omap.h | 12 ++++++++++++ - 2 files changed, 13 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h -index 4c108f5..fd75dad 100644 ---- a/arch/arm/plat-omap/include/plat/i2c.h -+++ b/arch/arm/plat-omap/include/plat/i2c.h -@@ -22,6 +22,7 @@ - #define __ASM__ARCH_OMAP_I2C_H - - #include <linux/i2c.h> -+#include <linux/i2c-omap.h> - - #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) - extern int omap_register_i2c_bus(int bus_id, u32 clkrate, -diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h -index 7472449..701886d 100644 ---- a/include/linux/i2c-omap.h -+++ b/include/linux/i2c-omap.h -@@ -3,6 +3,18 @@ - - #include <linux/platform_device.h> - -+/* -+ * Version 2 of the I2C peripheral unit has a different register -+ * layout and extra registers. The ID register in the V2 peripheral -+ * unit on the OMAP4430 reports the same ID as the V1 peripheral -+ * unit on the OMAP3530, so we must inform the driver which IP -+ * version we know it is running on from platform / cpu-specific -+ * code using these constants in the hwmod class definition. -+ */ -+ -+#define OMAP_I2C_IP_VERSION_1 1 -+#define OMAP_I2C_IP_VERSION_2 2 -+ - struct omap_i2c_bus_platform_data { - u32 clkrate; - void (*set_mpu_wkup_lat)(struct device *dev, long set); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C-functionality-flags-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C-functionality-flags-.patch deleted file mode 100644 index c211654..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C-functionality-flags-.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 46e0d0dce7d030781e2c67cce0438384ee8dd707 Mon Sep 17 00:00:00 2001 -From: Andy Green <andy@warmcat.com> -Date: Sun, 10 Jul 2011 05:27:15 -0600 -Subject: [PATCH 071/149] I2C: OMAP1/OMAP2+: create omap I2C functionality flags for each cpu_... test - -These represent the 8 kinds of implementation functionality -that up until now were inferred by the 16 remaining cpu_...() -tests in the omap i2c driver. - -Changed to use BIT() as suggested by Balaji T Krishnamoorthy. - -Cc: patches@linaro.org -Cc: Ben Dooks <ben-linux@fluff.org> -Reported-by: Peter Maydell <peter.maydell@linaro.org> -Signed-off-by: Andy Green <andy.green@linaro.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - include/linux/i2c-omap.h | 15 +++++++++++++++ - 1 files changed, 15 insertions(+), 0 deletions(-) - -diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h -index 701886d..0aa0cbd 100644 ---- a/include/linux/i2c-omap.h -+++ b/include/linux/i2c-omap.h -@@ -15,6 +15,21 @@ - #define OMAP_I2C_IP_VERSION_1 1 - #define OMAP_I2C_IP_VERSION_2 2 - -+/* struct omap_i2c_bus_platform_data .flags meanings */ -+ -+#define OMAP_I2C_FLAG_NO_FIFO BIT(0) -+#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) -+#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) -+#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) -+#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4) -+#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) -+#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) -+/* how the CPU address bus must be translated for I2C unit access */ -+#define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 -+#define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) -+#define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) -+#define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 -+ - struct omap_i2c_bus_platform_data { - u32 clkrate; - void (*set_mpu_wkup_lat)(struct device *dev, long set); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch deleted file mode 100644 index 1f19e72..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 19d2caadfe6d0faad12b209bc1d096e1297fea68 Mon Sep 17 00:00:00 2001 -From: Andy Green <andy@warmcat.com> -Date: Sun, 10 Jul 2011 05:27:15 -0600 -Subject: [PATCH 072/149] I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision - -Since we cannot trust (or even reliably find) the OMAP I2C -peripheral unit's own revision register, we must inform the -OMAP i2c driver of which IP version it is running on. We -do this by tagging the omap_hwmod_class for i2c on all the -OMAP2+ platform / cpu specific hwmod init and passing it up -to the driver (next patches). - -Cc: patches@linaro.org -Cc: Ben Dooks <ben-linux@fluff.org> -Reported-by: Peter Maydell <peter.maydell@linaro.org> -Signed-off-by: Andy Green <andy.green@linaro.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 1 + - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1 + - 4 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index f3901ab..95f547c 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -1029,6 +1029,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { - static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &i2c_sysc, -+ .rev = OMAP_I2C_IP_VERSION_1, - }; - - static struct omap_i2c_dev_attr i2c_dev_attr; -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index 19ddf08..d7ed51b 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -1078,6 +1078,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { - static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &i2c_sysc, -+ .rev = OMAP_I2C_IP_VERSION_1, - }; - - static struct omap_i2c_dev_attr i2c_dev_attr = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 542a11b..58ec1e2 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -1308,6 +1308,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { - static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &i2c_sysc, -+ .rev = OMAP_I2C_IP_VERSION_1, - }; - - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 2ebccb8..1bed3b8 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -2160,6 +2160,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = { - static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { - .name = "i2c", - .sysc = &omap44xx_i2c_sysc, -+ .rev = OMAP_I2C_IP_VERSION_2, - }; - - /* i2c1 */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all-oma.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all-oma.patch deleted file mode 100644 index aad082c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all-oma.patch +++ /dev/null @@ -1,146 +0,0 @@ -From 61ee913ca983d9ff9bc3d98564417d9054db3e45 Mon Sep 17 00:00:00 2001 -From: Andy Green <andy@warmcat.com> -Date: Sun, 10 Jul 2011 05:27:16 -0600 -Subject: [PATCH 073/149] I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr - -This adds the new functionality flags for omap i2c unit to all OMAP2 -hwmod definitions - -Cc: patches@linaro.org -Cc: Ben Dooks <ben-linux@fluff.org> -Reported-by: Peter Maydell <peter.maydell@linaro.org> -Signed-off-by: Andy Green <andy.green@linaro.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 7 ++++++- - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +++ - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 9 +++++++++ - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++++++ - 4 files changed, 27 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index 95f547c..7af2514 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -1032,7 +1032,12 @@ static struct omap_hwmod_class i2c_class = { - .rev = OMAP_I2C_IP_VERSION_1, - }; - --static struct omap_i2c_dev_attr i2c_dev_attr; -+static struct omap_i2c_dev_attr i2c_dev_attr = { -+ .flags = OMAP_I2C_FLAG_NO_FIFO | -+ OMAP_I2C_FLAG_SIMPLE_CLOCK | -+ OMAP_I2C_FLAG_16BIT_DATA_REG | -+ OMAP_I2C_FLAG_BUS_SHIFT_2, -+}; - - /* I2C1 */ - -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index d7ed51b..405688a 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -1083,6 +1083,9 @@ static struct omap_hwmod_class i2c_class = { - - static struct omap_i2c_dev_attr i2c_dev_attr = { - .fifo_depth = 8, /* bytes */ -+ .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -+ OMAP_I2C_FLAG_BUS_SHIFT_2 | -+ OMAP_I2C_FLAG_FORCE_19200_INT_CLK, - }; - - /* I2C1 */ -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 58ec1e2..c704ac8 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -1608,6 +1608,9 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = { - - static struct omap_i2c_dev_attr i2c1_dev_attr = { - .fifo_depth = 8, /* bytes */ -+ .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -+ OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | -+ OMAP_I2C_FLAG_BUS_SHIFT_2, - }; - - static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { -@@ -1640,6 +1643,9 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { - - static struct omap_i2c_dev_attr i2c2_dev_attr = { - .fifo_depth = 8, /* bytes */ -+ .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -+ OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | -+ OMAP_I2C_FLAG_BUS_SHIFT_2, - }; - - static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { -@@ -1672,6 +1678,9 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { - - static struct omap_i2c_dev_attr i2c3_dev_attr = { - .fifo_depth = 64, /* bytes */ -+ .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -+ OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | -+ OMAP_I2C_FLAG_BUS_SHIFT_2, - }; - - static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 1bed3b8..55331df 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -27,6 +27,7 @@ - #include <plat/mcspi.h> - #include <plat/mcbsp.h> - #include <plat/mmc.h> -+#include <plat/i2c.h> - - #include "omap_hwmod_common_data.h" - -@@ -2163,6 +2164,10 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { - .rev = OMAP_I2C_IP_VERSION_2, - }; - -+static struct omap_i2c_dev_attr i2c_dev_attr = { -+ .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE, -+}; -+ - /* i2c1 */ - static struct omap_hwmod omap44xx_i2c1_hwmod; - static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { -@@ -2213,6 +2218,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { - }, - .slaves = omap44xx_i2c1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves), -+ .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -@@ -2266,6 +2272,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { - }, - .slaves = omap44xx_i2c2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves), -+ .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -@@ -2319,6 +2326,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { - }, - .slaves = omap44xx_i2c3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves), -+ .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -@@ -2372,6 +2380,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { - }, - .slaves = omap44xx_i2c4_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves), -+ .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during-bootup.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during-bootup.patch deleted file mode 100644 index 4d16451..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during-bootup.patch +++ /dev/null @@ -1,286 +0,0 @@ -From 6cc398a1452cef66c2c10eaadb3efe18f4ab8874 Mon Sep 17 00:00:00 2001 -From: Avinash.H.M <avinashhm@ti.com> -Date: Sun, 10 Jul 2011 05:27:16 -0600 -Subject: [PATCH 074/149] OMAP: hwmod: fix the i2c-reset timeout during bootup - -The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a -special sequence to reset the module. The sequence is - - Disable the I2C. - - Write to SOFTRESET bit. - - Enable the I2C. - - Poll on the RESETDONE bit. -The sequence is implemented as a function and the i2c_class is updated with -the correct 'reset' pointer. omap_hwmod_softreset function is implemented -which triggers the softreset by writing into sysconfig register. On following -this sequence, i2c module resets properly and timeouts are not seen. - -Cc: Rajendra Nayak <rnayak@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Benoit Cousson <b-cousson@ti.com> -Cc: Kevin Hilman <khilman@ti.com> -Signed-off-by: Avinash.H.M <avinashhm@ti.com> -[paul@pwsan.com: combined this patch with a patch to remove - HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register - offset conditional code to use the IP block revision; minor code - cleanup] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/i2c.c | 68 ++++++++++++++++++++++++++ - arch/arm/mach-omap2/omap_hwmod.c | 27 ++++++++++ - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 7 ++- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 10 ++-- - arch/arm/plat-omap/include/plat/i2c.h | 3 + - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + - 8 files changed, 111 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c -index 79c478c..ace9994 100644 ---- a/arch/arm/mach-omap2/i2c.c -+++ b/arch/arm/mach-omap2/i2c.c -@@ -21,9 +21,19 @@ - - #include <plat/cpu.h> - #include <plat/i2c.h> -+#include <plat/common.h> -+#include <plat/omap_hwmod.h> - - #include "mux.h" - -+/* In register I2C_CON, Bit 15 is the I2C enable bit */ -+#define I2C_EN BIT(15) -+#define OMAP2_I2C_CON_OFFSET 0x24 -+#define OMAP4_I2C_CON_OFFSET 0xA4 -+ -+/* Maximum microseconds to wait for OMAP module to softreset */ -+#define MAX_MODULE_SOFTRESET_WAIT 10000 -+ - void __init omap2_i2c_mux_pins(int bus_id) - { - char mux_name[sizeof("i2c2_scl.i2c2_scl")]; -@@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id) - sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); - omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); - } -+ -+/** -+ * omap_i2c_reset - reset the omap i2c module. -+ * @oh: struct omap_hwmod * -+ * -+ * The i2c moudle in omap2, omap3 had a special sequence to reset. The -+ * sequence is: -+ * - Disable the I2C. -+ * - Write to SOFTRESET bit. -+ * - Enable the I2C. -+ * - Poll on the RESETDONE bit. -+ * The sequence is implemented in below function. This is called for 2420, -+ * 2430 and omap3. -+ */ -+int omap_i2c_reset(struct omap_hwmod *oh) -+{ -+ u32 v; -+ u16 i2c_con; -+ int c = 0; -+ -+ if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { -+ i2c_con = OMAP4_I2C_CON_OFFSET; -+ } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { -+ i2c_con = OMAP2_I2C_CON_OFFSET; -+ } else { -+ WARN(1, "Cannot reset I2C block %s: unsupported revision\n", -+ oh->name); -+ return -EINVAL; -+ } -+ -+ /* Disable I2C */ -+ v = omap_hwmod_read(oh, i2c_con); -+ v &= ~I2C_EN; -+ omap_hwmod_write(v, oh, i2c_con); -+ -+ /* Write to the SOFTRESET bit */ -+ omap_hwmod_softreset(oh); -+ -+ /* Enable I2C */ -+ v = omap_hwmod_read(oh, i2c_con); -+ v |= I2C_EN; -+ omap_hwmod_write(v, oh, i2c_con); -+ -+ /* Poll on RESETDONE bit */ -+ omap_test_timeout((omap_hwmod_read(oh, -+ oh->class->sysc->syss_offs) -+ & SYSS_RESETDONE_MASK), -+ MAX_MODULE_SOFTRESET_WAIT, c); -+ -+ if (c == MAX_MODULE_SOFTRESET_WAIT) -+ pr_warning("%s: %s: softreset failed (waited %d usec)\n", -+ __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); -+ else -+ pr_debug("%s: %s: softreset in %d usec\n", __func__, -+ oh->name, c); -+ -+ return 0; -+} -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 7d242c9..02b6016 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -1656,6 +1656,33 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) - } - - /** -+ * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit -+ * @oh: struct omap_hwmod * -+ * -+ * This is a public function exposed to drivers. Some drivers may need to do -+ * some settings before and after resetting the device. Those drivers after -+ * doing the necessary settings could use this function to start a reset by -+ * setting the SYSCONFIG.SOFTRESET bit. -+ */ -+int omap_hwmod_softreset(struct omap_hwmod *oh) -+{ -+ u32 v; -+ int ret; -+ -+ if (!oh || !(oh->_sysc_cache)) -+ return -EINVAL; -+ -+ v = oh->_sysc_cache; -+ ret = _set_softreset(oh, &v); -+ if (ret) -+ goto error; -+ _write_sysconfig(v, oh); -+ -+error: -+ return ret; -+} -+ -+/** - * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode - * @oh: struct omap_hwmod * - * @idlemode: SIDLEMODE field bits (shifted to bit 0) -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -index 7af2514..a015c69 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c -@@ -1030,6 +1030,7 @@ static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_1, -+ .reset = &omap_i2c_reset, - }; - - static struct omap_i2c_dev_attr i2c_dev_attr = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -index 405688a..16743c7 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c -@@ -1079,6 +1079,7 @@ static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_1, -+ .reset = &omap_i2c_reset, - }; - - static struct omap_i2c_dev_attr i2c_dev_attr = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index c704ac8..25bf43b 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -1306,9 +1306,10 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { - }; - - static struct omap_hwmod_class i2c_class = { -- .name = "i2c", -- .sysc = &i2c_sysc, -- .rev = OMAP_I2C_IP_VERSION_1, -+ .name = "i2c", -+ .sysc = &i2c_sysc, -+ .rev = OMAP_I2C_IP_VERSION_1, -+ .reset = &omap_i2c_reset, - }; - - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 55331df..5d5df49 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -22,6 +22,7 @@ - - #include <plat/omap_hwmod.h> - #include <plat/cpu.h> -+#include <plat/i2c.h> - #include <plat/gpio.h> - #include <plat/dma.h> - #include <plat/mcspi.h> -@@ -2162,6 +2163,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { - .name = "i2c", - .sysc = &omap44xx_i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_2, -+ .reset = &omap_i2c_reset, - }; - - static struct omap_i2c_dev_attr i2c_dev_attr = { -@@ -2207,7 +2209,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { - static struct omap_hwmod omap44xx_i2c1_hwmod = { - .name = "i2c1", - .class = &omap44xx_i2c_hwmod_class, -- .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap44xx_i2c1_irqs, - .sdma_reqs = omap44xx_i2c1_sdma_reqs, - .main_clk = "i2c1_fck", -@@ -2261,7 +2263,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { - static struct omap_hwmod omap44xx_i2c2_hwmod = { - .name = "i2c2", - .class = &omap44xx_i2c_hwmod_class, -- .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap44xx_i2c2_irqs, - .sdma_reqs = omap44xx_i2c2_sdma_reqs, - .main_clk = "i2c2_fck", -@@ -2315,7 +2317,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { - static struct omap_hwmod omap44xx_i2c3_hwmod = { - .name = "i2c3", - .class = &omap44xx_i2c_hwmod_class, -- .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap44xx_i2c3_irqs, - .sdma_reqs = omap44xx_i2c3_sdma_reqs, - .main_clk = "i2c3_fck", -@@ -2369,7 +2371,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { - static struct omap_hwmod omap44xx_i2c4_hwmod = { - .name = "i2c4", - .class = &omap44xx_i2c_hwmod_class, -- .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, -+ .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap44xx_i2c4_irqs, - .sdma_reqs = omap44xx_i2c4_sdma_reqs, - .main_clk = "i2c4_fck", -diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h -index fd75dad..7c22b9e 100644 ---- a/arch/arm/plat-omap/include/plat/i2c.h -+++ b/arch/arm/plat-omap/include/plat/i2c.h -@@ -53,4 +53,7 @@ struct omap_i2c_dev_attr { - void __init omap1_i2c_mux_pins(int bus_id); - void __init omap2_i2c_mux_pins(int bus_id); - -+struct omap_hwmod; -+int omap_i2c_reset(struct omap_hwmod *oh); -+ - #endif /* __ASM__ARCH_OMAP_I2C_H */ -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index ce06ac6..fafdfe3 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -566,6 +566,7 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); - - void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); - u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); -+int omap_hwmod_softreset(struct omap_hwmod *oh); - - int omap_hwmod_count_resources(struct omap_hwmod *oh); - int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry-for-hwmod-main_.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry-for-hwmod-main_.patch deleted file mode 100644 index 43a50a0..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry-for-hwmod-main_.patch +++ /dev/null @@ -1,437 +0,0 @@ -From e56d203975458c6e21c5e63711e2c34b36dc9678 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:54:12 -0600 -Subject: [PATCH 075/149] OMAP: omap_device: Create clkdev entry for hwmod main_clk - -Extend the existing function to create clkdev for every optional -clocks to add a well one "fck" alias for the main_clk of the -omap_hwmod. -It will allow to remove these static clkdev entries from the -clockXXX_data.c file. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Kevin Hilman <khilman@ti.com> -Cc: Todd Poynor <toddpoynor@google.com> -[paul@pwsan.com: remove all of the "fck" role clkdev aliases from the - clock data files; fixed error message] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock2420_data.c | 22 ++++---- - arch/arm/mach-omap2/clock2430_data.c | 32 ++++++------ - arch/arm/mach-omap2/clock3xxx_data.c | 44 +++++++++--------- - arch/arm/mach-omap2/clock44xx_data.c | 38 ++++++++-------- - arch/arm/plat-omap/omap_device.c | 85 ++++++++++++++++++++-------------- - 5 files changed, 118 insertions(+), 103 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c -index 2926d02..debc040 100644 ---- a/arch/arm/mach-omap2/clock2420_data.c -+++ b/arch/arm/mach-omap2/clock2420_data.c -@@ -1805,9 +1805,9 @@ static struct omap_clk omap2420_clks[] = { - CLK(NULL, "gfx_ick", &gfx_ick, CK_242X), - /* DSS domain clocks */ - CLK("omapdss_dss", "ick", &dss_ick, CK_242X), -- CLK("omapdss_dss", "fck", &dss1_fck, CK_242X), -- CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_242X), -- CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_242X), -+ CLK(NULL, "dss1_fck", &dss1_fck, CK_242X), -+ CLK(NULL, "dss2_fck", &dss2_fck, CK_242X), -+ CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_242X), - /* L3 domain clocks */ - CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X), - CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X), -@@ -1844,13 +1844,13 @@ static struct omap_clk omap2420_clks[] = { - CLK(NULL, "gpt12_ick", &gpt12_ick, CK_242X), - CLK(NULL, "gpt12_fck", &gpt12_fck, CK_242X), - CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_242X), -- CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_242X), -+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_242X), - CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_242X), -- CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_242X), -+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_242X), - CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_242X), -- CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_242X), -+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_242X), - CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_242X), -- CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_242X), -+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_242X), - CLK(NULL, "uart1_ick", &uart1_ick, CK_242X), - CLK(NULL, "uart1_fck", &uart1_fck, CK_242X), - CLK(NULL, "uart2_ick", &uart2_ick, CK_242X), -@@ -1860,7 +1860,7 @@ static struct omap_clk omap2420_clks[] = { - CLK(NULL, "gpios_ick", &gpios_ick, CK_242X), - CLK(NULL, "gpios_fck", &gpios_fck, CK_242X), - CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_242X), -- CLK("omap_wdt", "fck", &mpu_wdt_fck, CK_242X), -+ CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_242X), - CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_242X), - CLK(NULL, "wdt1_ick", &wdt1_ick, CK_242X), - CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_242X), -@@ -1880,11 +1880,11 @@ static struct omap_clk omap2420_clks[] = { - CLK(NULL, "eac_ick", &eac_ick, CK_242X), - CLK(NULL, "eac_fck", &eac_fck, CK_242X), - CLK("omap_hdq.0", "ick", &hdq_ick, CK_242X), -- CLK("omap_hdq.1", "fck", &hdq_fck, CK_242X), -+ CLK("omap_hdq.0", "fck", &hdq_fck, CK_242X), - CLK("omap_i2c.1", "ick", &i2c1_ick, CK_242X), -- CLK("omap_i2c.1", "fck", &i2c1_fck, CK_242X), -+ CLK(NULL, "i2c1_fck", &i2c1_fck, CK_242X), - CLK("omap_i2c.2", "ick", &i2c2_ick, CK_242X), -- CLK("omap_i2c.2", "fck", &i2c2_fck, CK_242X), -+ CLK(NULL, "i2c2_fck", &i2c2_fck, CK_242X), - CLK(NULL, "gpmc_fck", &gpmc_fck, CK_242X), - CLK(NULL, "sdma_fck", &sdma_fck, CK_242X), - CLK(NULL, "sdma_ick", &sdma_ick, CK_242X), -diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c -index 0c79d39..96a942e 100644 ---- a/arch/arm/mach-omap2/clock2430_data.c -+++ b/arch/arm/mach-omap2/clock2430_data.c -@@ -1895,9 +1895,9 @@ static struct omap_clk omap2430_clks[] = { - CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), - /* DSS domain clocks */ - CLK("omapdss_dss", "ick", &dss_ick, CK_243X), -- CLK("omapdss_dss", "fck", &dss1_fck, CK_243X), -- CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_243X), -- CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_243X), -+ CLK(NULL, "dss1_fck", &dss1_fck, CK_243X), -+ CLK(NULL, "dss2_fck", &dss2_fck, CK_243X), -+ CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X), - /* L3 domain clocks */ - CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X), - CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X), -@@ -1934,21 +1934,21 @@ static struct omap_clk omap2430_clks[] = { - CLK(NULL, "gpt12_ick", &gpt12_ick, CK_243X), - CLK(NULL, "gpt12_fck", &gpt12_fck, CK_243X), - CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_243X), -- CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_243X), -+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_243X), - CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_243X), -- CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_243X), -+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_243X), - CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_243X), -- CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_243X), -+ CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_243X), - CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_243X), -- CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_243X), -+ CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_243X), - CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_243X), -- CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_243X), -+ CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_243X), - CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_243X), -- CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_243X), -+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_243X), - CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_243X), -- CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_243X), -+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_243X), - CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_243X), -- CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_243X), -+ CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_243X), - CLK(NULL, "uart1_ick", &uart1_ick, CK_243X), - CLK(NULL, "uart1_fck", &uart1_fck, CK_243X), - CLK(NULL, "uart2_ick", &uart2_ick, CK_243X), -@@ -1958,7 +1958,7 @@ static struct omap_clk omap2430_clks[] = { - CLK(NULL, "gpios_ick", &gpios_ick, CK_243X), - CLK(NULL, "gpios_fck", &gpios_fck, CK_243X), - CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_243X), -- CLK("omap_wdt", "fck", &mpu_wdt_fck, CK_243X), -+ CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_243X), - CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_243X), - CLK(NULL, "wdt1_ick", &wdt1_ick, CK_243X), - CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_243X), -@@ -1975,9 +1975,9 @@ static struct omap_clk omap2430_clks[] = { - CLK("omap_hdq.0", "ick", &hdq_ick, CK_243X), - CLK("omap_hdq.1", "fck", &hdq_fck, CK_243X), - CLK("omap_i2c.1", "ick", &i2c1_ick, CK_243X), -- CLK("omap_i2c.1", "fck", &i2chs1_fck, CK_243X), -+ CLK(NULL, "i2chs1_fck", &i2chs1_fck, CK_243X), - CLK("omap_i2c.2", "ick", &i2c2_ick, CK_243X), -- CLK("omap_i2c.2", "fck", &i2chs2_fck, CK_243X), -+ CLK(NULL, "i2chs2_fck", &i2chs2_fck, CK_243X), - CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X), - CLK(NULL, "sdma_fck", &sdma_fck, CK_243X), - CLK(NULL, "sdma_ick", &sdma_ick, CK_243X), -@@ -1990,9 +1990,9 @@ static struct omap_clk omap2430_clks[] = { - CLK(NULL, "usb_fck", &usb_fck, CK_243X), - CLK("musb-omap2430", "ick", &usbhs_ick, CK_243X), - CLK("omap_hsmmc.0", "ick", &mmchs1_ick, CK_243X), -- CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_243X), -+ CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_243X), - CLK("omap_hsmmc.1", "ick", &mmchs2_ick, CK_243X), -- CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_243X), -+ CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_243X), - CLK(NULL, "gpio5_ick", &gpio5_ick, CK_243X), - CLK(NULL, "gpio5_fck", &gpio5_fck, CK_243X), - CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), -diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c -index 75b119b..ffd55b1 100644 ---- a/arch/arm/mach-omap2/clock3xxx_data.c -+++ b/arch/arm/mach-omap2/clock3xxx_data.c -@@ -3289,25 +3289,25 @@ static struct omap_clk omap3xxx_clks[] = { - CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), - CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), - CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), -- CLK("omap_hsmmc.2", "fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -- CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_3XXX), -+ CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -+ CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), - CLK(NULL, "mspro_fck", &mspro_fck, CK_34XX | CK_36XX), -- CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_3XXX), -- CLK("omap_i2c.3", "fck", &i2c3_fck, CK_3XXX), -- CLK("omap_i2c.2", "fck", &i2c2_fck, CK_3XXX), -- CLK("omap_i2c.1", "fck", &i2c1_fck, CK_3XXX), -- CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_3XXX), -- CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_3XXX), -+ CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_3XXX), -+ CLK(NULL, "i2c3_fck", &i2c3_fck, CK_3XXX), -+ CLK(NULL, "i2c2_fck", &i2c2_fck, CK_3XXX), -+ CLK(NULL, "i2c1_fck", &i2c1_fck, CK_3XXX), -+ CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_3XXX), -+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_3XXX), - CLK(NULL, "core_48m_fck", &core_48m_fck, CK_3XXX), -- CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_3XXX), -- CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_3XXX), -- CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_3XXX), -- CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_3XXX), -+ CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_3XXX), -+ CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_3XXX), -+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_3XXX), -+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_3XXX), - CLK(NULL, "uart2_fck", &uart2_fck, CK_3XXX), - CLK(NULL, "uart1_fck", &uart1_fck, CK_3XXX), - CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), - CLK(NULL, "core_12m_fck", &core_12m_fck, CK_3XXX), -- CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), -+ CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), - CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, CK_3430ES1), - CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, CK_3430ES2PLUS | CK_36XX), - CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, CK_3430ES1), -@@ -3356,11 +3356,11 @@ static struct omap_clk omap3xxx_clks[] = { - CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX), - CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX), - CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX), -- CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es1, CK_3430ES1), -- CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -- CLK("omapdss_dss", "tv_clk", &dss_tv_fck, CK_3XXX), -- CLK("omapdss_dss", "video_clk", &dss_96m_fck, CK_3XXX), -- CLK("omapdss_dss", "sys_clk", &dss2_alwon_fck, CK_3XXX), -+ CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), -+ CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), -+ CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_3XXX), -+ CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_3XXX), -+ CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_3XXX), - CLK("omapdss_dss", "ick", &dss_ick_3430es1, CK_3430ES1), - CLK("omapdss_dss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX), -@@ -3385,7 +3385,7 @@ static struct omap_clk omap3xxx_clks[] = { - CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), - CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), - CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_3XXX), -- CLK("omap_wdt", "fck", &wdt2_fck, CK_3XXX), -+ CLK(NULL, "wdt2_fck", &wdt2_fck, CK_3XXX), - CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_34XX | CK_36XX), - CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2PLUS | CK_36XX), - CLK("omap_wdt", "ick", &wdt2_ick, CK_3XXX), -@@ -3436,9 +3436,9 @@ static struct omap_clk omap3xxx_clks[] = { - CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_3XXX), - CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_3XXX), - CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_3XXX), -- CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_3XXX), -- CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_3XXX), -- CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_3XXX), -+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_3XXX), -+ CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_3XXX), -+ CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_3XXX), - CLK("etb", "emu_src_ck", &emu_src_ck, CK_3XXX), - CLK(NULL, "pclk_fck", &pclk_fck, CK_3XXX), - CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_3XXX), -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 2578820..763507f 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -3057,12 +3057,12 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "gpio6_ick", &gpio6_ick, CK_443X), - CLK(NULL, "gpmc_ick", &gpmc_ick, CK_443X), - CLK(NULL, "gpu_fck", &gpu_fck, CK_443X), -- CLK("omap2_hdq.0", "fck", &hdq1w_fck, CK_443X), -+ CLK(NULL, "hdq1w_fck", &hdq1w_fck, CK_443X), - CLK(NULL, "hsi_fck", &hsi_fck, CK_443X), -- CLK("omap_i2c.1", "fck", &i2c1_fck, CK_443X), -- CLK("omap_i2c.2", "fck", &i2c2_fck, CK_443X), -- CLK("omap_i2c.3", "fck", &i2c3_fck, CK_443X), -- CLK("omap_i2c.4", "fck", &i2c4_fck, CK_443X), -+ CLK(NULL, "i2c1_fck", &i2c1_fck, CK_443X), -+ CLK(NULL, "i2c2_fck", &i2c2_fck, CK_443X), -+ CLK(NULL, "i2c3_fck", &i2c3_fck, CK_443X), -+ CLK(NULL, "i2c4_fck", &i2c4_fck, CK_443X), - CLK(NULL, "ipu_fck", &ipu_fck, CK_443X), - CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X), - CLK(NULL, "iss_fck", &iss_fck, CK_443X), -@@ -3073,23 +3073,23 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck, CK_443X), - CLK(NULL, "mcasp_fck", &mcasp_fck, CK_443X), - CLK(NULL, "mcbsp1_sync_mux_ck", &mcbsp1_sync_mux_ck, CK_443X), -- CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_443X), -+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_443X), - CLK(NULL, "mcbsp2_sync_mux_ck", &mcbsp2_sync_mux_ck, CK_443X), -- CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_443X), -+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_443X), - CLK(NULL, "mcbsp3_sync_mux_ck", &mcbsp3_sync_mux_ck, CK_443X), -- CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_443X), -+ CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_443X), - CLK(NULL, "mcbsp4_sync_mux_ck", &mcbsp4_sync_mux_ck, CK_443X), -- CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_443X), -+ CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_443X), - CLK(NULL, "mcpdm_fck", &mcpdm_fck, CK_443X), -- CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_443X), -- CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_443X), -- CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_443X), -- CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_443X), -- CLK("omap_hsmmc.0", "fck", &mmc1_fck, CK_443X), -- CLK("omap_hsmmc.1", "fck", &mmc2_fck, CK_443X), -- CLK("omap_hsmmc.2", "fck", &mmc3_fck, CK_443X), -- CLK("omap_hsmmc.3", "fck", &mmc4_fck, CK_443X), -- CLK("omap_hsmmc.4", "fck", &mmc5_fck, CK_443X), -+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_443X), -+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_443X), -+ CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_443X), -+ CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_443X), -+ CLK(NULL, "mmc1_fck", &mmc1_fck, CK_443X), -+ CLK(NULL, "mmc2_fck", &mmc2_fck, CK_443X), -+ CLK(NULL, "mmc3_fck", &mmc3_fck, CK_443X), -+ CLK(NULL, "mmc4_fck", &mmc4_fck, CK_443X), -+ CLK(NULL, "mmc5_fck", &mmc5_fck, CK_443X), - CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X), - CLK(NULL, "ocp2scp_usb_phy_ick", &ocp2scp_usb_phy_ick, CK_443X), - CLK(NULL, "ocp_wp_noc_ick", &ocp_wp_noc_ick, CK_443X), -@@ -3146,7 +3146,7 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "usim_ck", &usim_ck, CK_443X), - CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), - CLK(NULL, "usim_fck", &usim_fck, CK_443X), -- CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X), -+ CLK(NULL, "wd_timer2_fck", &wd_timer2_fck, CK_443X), - CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), - CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), - CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), -diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c -index c8b9cd1..be45147 100644 ---- a/arch/arm/plat-omap/omap_device.c -+++ b/arch/arm/plat-omap/omap_device.c -@@ -236,56 +236,71 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) - return 0; - } - -+static void _add_clkdev(struct omap_device *od, const char *clk_alias, -+ const char *clk_name) -+{ -+ struct clk *r; -+ struct clk_lookup *l; -+ -+ if (!clk_alias || !clk_name) -+ return; -+ -+ pr_debug("omap_device: %s: Creating %s -> %s\n", -+ dev_name(&od->pdev.dev), clk_alias, clk_name); -+ -+ r = clk_get_sys(dev_name(&od->pdev.dev), clk_alias); -+ if (!IS_ERR(r)) { -+ pr_warning("omap_device: %s: alias %s already exists\n", -+ dev_name(&od->pdev.dev), clk_alias); -+ clk_put(r); -+ return; -+ } -+ -+ r = omap_clk_get_by_name(clk_name); -+ if (IS_ERR(r)) { -+ pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n", -+ dev_name(&od->pdev.dev), clk_name); -+ return; -+ } -+ -+ l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev.dev)); -+ if (!l) { -+ pr_err("omap_device: %s: clkdev_alloc for %s failed\n", -+ dev_name(&od->pdev.dev), clk_alias); -+ return; -+ } -+ -+ clkdev_add(l); -+} -+ - /** -- * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks -+ * _add_hwmod_clocks_clkdev - Add clkdev entry for hwmod optional clocks -+ * and main clock - * @od: struct omap_device *od -+ * @oh: struct omap_hwmod *oh - * -- * For every optional clock present per hwmod per omap_device, this function -- * adds an entry in the clkdev table of the form <dev-id=dev_name, con-id=role> -- * if it does not exist already. -+ * For the main clock and every optional clock present per hwmod per -+ * omap_device, this function adds an entry in the clkdev table of the -+ * form <dev-id=dev_name, con-id=role> if it does not exist already. - * - * The function is called from inside omap_device_build_ss(), after - * omap_device_register. - * - * This allows drivers to get a pointer to its optional clocks based on its role - * by calling clk_get(<dev*>, <role>). -+ * In the case of the main clock, a "fck" alias is used. - * - * No return value. - */ --static void _add_optional_clock_clkdev(struct omap_device *od, -- struct omap_hwmod *oh) -+static void _add_hwmod_clocks_clkdev(struct omap_device *od, -+ struct omap_hwmod *oh) - { - int i; - -- for (i = 0; i < oh->opt_clks_cnt; i++) { -- struct omap_hwmod_opt_clk *oc; -- struct clk *r; -- struct clk_lookup *l; -- -- oc = &oh->opt_clks[i]; -- -- if (!oc->_clk) -- continue; -- -- r = clk_get_sys(dev_name(&od->pdev.dev), oc->role); -- if (!IS_ERR(r)) -- continue; /* clkdev entry exists */ -+ _add_clkdev(od, "fck", oh->main_clk); - -- r = omap_clk_get_by_name((char *)oc->clk); -- if (IS_ERR(r)) { -- pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n", -- dev_name(&od->pdev.dev), oc->clk); -- continue; -- } -- -- l = clkdev_alloc(r, oc->role, dev_name(&od->pdev.dev)); -- if (!l) { -- pr_err("omap_device: %s: clkdev_alloc for %s failed\n", -- dev_name(&od->pdev.dev), oc->role); -- return; -- } -- clkdev_add(l); -- } -+ for (i = 0; i < oh->opt_clks_cnt; i++) -+ _add_clkdev(od, oh->opt_clks[i].role, oh->opt_clks[i].clk); - } - - -@@ -492,7 +507,7 @@ struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, - - for (i = 0; i < oh_cnt; i++) { - hwmods[i]->od = od; -- _add_optional_clock_clkdev(od, hwmods[i]); -+ _add_hwmod_clocks_clkdev(od, hwmods[i]); - } - - if (ret) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection-for-a.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection-for-a.patch deleted file mode 100644 index 066cc55..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection-for-a.patch +++ /dev/null @@ -1,292 +0,0 @@ -From 3e03bae4fc1f9b6e413af3c3e65766913049ffa0 Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Sun, 10 Jul 2011 05:56:14 -0600 -Subject: [PATCH 076/149] OMAP4: clock data: Add missing divider selection for auxclks - -On OMAP4 the auxclk nodes (part of SCRM) support both -divider as well as parent selection. -Supporting this requires splitting the existing nodes -(which support only parent selection) into two nodes, -one for parent and another for divider selection. -The nodes for parent selection are named auxclk*_src_ck -and the ones for divider selection as auxclk*_ck. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -[b-cousson@ti.com: Rebase on top of clock cleanup -and autogen alignement] -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 176 +++++++++++++++++++++++++++++----- - 1 files changed, 152 insertions(+), 24 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 763507f..07bf0de 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -2774,19 +2774,39 @@ static struct clk trace_clk_div_ck = { - - /* SCRM aux clk nodes */ - --static const struct clksel auxclk_sel[] = { -+static const struct clksel auxclk_src_sel[] = { - { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, - { .parent = &dpll_core_m3x2_ck, .rates = div_1_1_rates }, - { .parent = &dpll_per_m3x2_ck, .rates = div_1_2_rates }, - { .parent = NULL }, - }; - --static struct clk auxclk0_ck = { -- .name = "auxclk0_ck", -+static const struct clksel_rate div16_1to16_rates[] = { -+ { .div = 1, .val = 0, .flags = RATE_IN_4430 }, -+ { .div = 2, .val = 1, .flags = RATE_IN_4430 }, -+ { .div = 3, .val = 2, .flags = RATE_IN_4430 }, -+ { .div = 4, .val = 3, .flags = RATE_IN_4430 }, -+ { .div = 5, .val = 4, .flags = RATE_IN_4430 }, -+ { .div = 6, .val = 5, .flags = RATE_IN_4430 }, -+ { .div = 7, .val = 6, .flags = RATE_IN_4430 }, -+ { .div = 8, .val = 7, .flags = RATE_IN_4430 }, -+ { .div = 9, .val = 8, .flags = RATE_IN_4430 }, -+ { .div = 10, .val = 9, .flags = RATE_IN_4430 }, -+ { .div = 11, .val = 10, .flags = RATE_IN_4430 }, -+ { .div = 12, .val = 11, .flags = RATE_IN_4430 }, -+ { .div = 13, .val = 12, .flags = RATE_IN_4430 }, -+ { .div = 14, .val = 13, .flags = RATE_IN_4430 }, -+ { .div = 15, .val = 14, .flags = RATE_IN_4430 }, -+ { .div = 16, .val = 15, .flags = RATE_IN_4430 }, -+ { .div = 0 }, -+}; -+ -+static struct clk auxclk0_src_ck = { -+ .name = "auxclk0_src_ck", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .ops = &clkops_omap2_dflt, -- .clksel = auxclk_sel, -+ .clksel = auxclk_src_sel, - .clksel_reg = OMAP4_SCRM_AUXCLK0, - .clksel_mask = OMAP4_SRCSELECT_MASK, - .recalc = &omap2_clksel_recalc, -@@ -2794,12 +2814,29 @@ static struct clk auxclk0_ck = { - .enable_bit = OMAP4_ENABLE_SHIFT, - }; - --static struct clk auxclk1_ck = { -- .name = "auxclk1_ck", -+static const struct clksel auxclk0_sel[] = { -+ { .parent = &auxclk0_src_ck, .rates = div16_1to16_rates }, -+ { .parent = NULL }, -+}; -+ -+static struct clk auxclk0_ck = { -+ .name = "auxclk0_ck", -+ .parent = &auxclk0_src_ck, -+ .clksel = auxclk0_sel, -+ .clksel_reg = OMAP4_SCRM_AUXCLK0, -+ .clksel_mask = OMAP4_CLKDIV_MASK, -+ .ops = &clkops_null, -+ .recalc = &omap2_clksel_recalc, -+ .round_rate = &omap2_clksel_round_rate, -+ .set_rate = &omap2_clksel_set_rate, -+}; -+ -+static struct clk auxclk1_src_ck = { -+ .name = "auxclk1_src_ck", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .ops = &clkops_omap2_dflt, -- .clksel = auxclk_sel, -+ .clksel = auxclk_src_sel, - .clksel_reg = OMAP4_SCRM_AUXCLK1, - .clksel_mask = OMAP4_SRCSELECT_MASK, - .recalc = &omap2_clksel_recalc, -@@ -2807,12 +2844,29 @@ static struct clk auxclk1_ck = { - .enable_bit = OMAP4_ENABLE_SHIFT, - }; - --static struct clk auxclk2_ck = { -- .name = "auxclk2_ck", -+static const struct clksel auxclk1_sel[] = { -+ { .parent = &auxclk1_src_ck, .rates = div16_1to16_rates }, -+ { .parent = NULL }, -+}; -+ -+static struct clk auxclk1_ck = { -+ .name = "auxclk1_ck", -+ .parent = &auxclk1_src_ck, -+ .clksel = auxclk1_sel, -+ .clksel_reg = OMAP4_SCRM_AUXCLK1, -+ .clksel_mask = OMAP4_CLKDIV_MASK, -+ .ops = &clkops_null, -+ .recalc = &omap2_clksel_recalc, -+ .round_rate = &omap2_clksel_round_rate, -+ .set_rate = &omap2_clksel_set_rate, -+}; -+ -+static struct clk auxclk2_src_ck = { -+ .name = "auxclk2_src_ck", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .ops = &clkops_omap2_dflt, -- .clksel = auxclk_sel, -+ .clksel = auxclk_src_sel, - .clksel_reg = OMAP4_SCRM_AUXCLK2, - .clksel_mask = OMAP4_SRCSELECT_MASK, - .recalc = &omap2_clksel_recalc, -@@ -2820,12 +2874,29 @@ static struct clk auxclk2_ck = { - .enable_bit = OMAP4_ENABLE_SHIFT, - }; - --static struct clk auxclk3_ck = { -- .name = "auxclk3_ck", -+static const struct clksel auxclk2_sel[] = { -+ { .parent = &auxclk2_src_ck, .rates = div16_1to16_rates }, -+ { .parent = NULL }, -+}; -+ -+static struct clk auxclk2_ck = { -+ .name = "auxclk2_ck", -+ .parent = &auxclk2_src_ck, -+ .clksel = auxclk2_sel, -+ .clksel_reg = OMAP4_SCRM_AUXCLK2, -+ .clksel_mask = OMAP4_CLKDIV_MASK, -+ .ops = &clkops_null, -+ .recalc = &omap2_clksel_recalc, -+ .round_rate = &omap2_clksel_round_rate, -+ .set_rate = &omap2_clksel_set_rate, -+}; -+ -+static struct clk auxclk3_src_ck = { -+ .name = "auxclk3_src_ck", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .ops = &clkops_omap2_dflt, -- .clksel = auxclk_sel, -+ .clksel = auxclk_src_sel, - .clksel_reg = OMAP4_SCRM_AUXCLK3, - .clksel_mask = OMAP4_SRCSELECT_MASK, - .recalc = &omap2_clksel_recalc, -@@ -2833,12 +2904,29 @@ static struct clk auxclk3_ck = { - .enable_bit = OMAP4_ENABLE_SHIFT, - }; - --static struct clk auxclk4_ck = { -- .name = "auxclk4_ck", -+static const struct clksel auxclk3_sel[] = { -+ { .parent = &auxclk3_src_ck, .rates = div16_1to16_rates }, -+ { .parent = NULL }, -+}; -+ -+static struct clk auxclk3_ck = { -+ .name = "auxclk3_ck", -+ .parent = &auxclk3_src_ck, -+ .clksel = auxclk3_sel, -+ .clksel_reg = OMAP4_SCRM_AUXCLK3, -+ .clksel_mask = OMAP4_CLKDIV_MASK, -+ .ops = &clkops_null, -+ .recalc = &omap2_clksel_recalc, -+ .round_rate = &omap2_clksel_round_rate, -+ .set_rate = &omap2_clksel_set_rate, -+}; -+ -+static struct clk auxclk4_src_ck = { -+ .name = "auxclk4_src_ck", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .ops = &clkops_omap2_dflt, -- .clksel = auxclk_sel, -+ .clksel = auxclk_src_sel, - .clksel_reg = OMAP4_SCRM_AUXCLK4, - .clksel_mask = OMAP4_SRCSELECT_MASK, - .recalc = &omap2_clksel_recalc, -@@ -2846,12 +2934,29 @@ static struct clk auxclk4_ck = { - .enable_bit = OMAP4_ENABLE_SHIFT, - }; - --static struct clk auxclk5_ck = { -- .name = "auxclk5_ck", -+static const struct clksel auxclk4_sel[] = { -+ { .parent = &auxclk4_src_ck, .rates = div16_1to16_rates }, -+ { .parent = NULL }, -+}; -+ -+static struct clk auxclk4_ck = { -+ .name = "auxclk4_ck", -+ .parent = &auxclk4_src_ck, -+ .clksel = auxclk4_sel, -+ .clksel_reg = OMAP4_SCRM_AUXCLK4, -+ .clksel_mask = OMAP4_CLKDIV_MASK, -+ .ops = &clkops_null, -+ .recalc = &omap2_clksel_recalc, -+ .round_rate = &omap2_clksel_round_rate, -+ .set_rate = &omap2_clksel_set_rate, -+}; -+ -+static struct clk auxclk5_src_ck = { -+ .name = "auxclk5_src_ck", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .ops = &clkops_omap2_dflt, -- .clksel = auxclk_sel, -+ .clksel = auxclk_src_sel, - .clksel_reg = OMAP4_SCRM_AUXCLK5, - .clksel_mask = OMAP4_SRCSELECT_MASK, - .recalc = &omap2_clksel_recalc, -@@ -2859,6 +2964,23 @@ static struct clk auxclk5_ck = { - .enable_bit = OMAP4_ENABLE_SHIFT, - }; - -+static const struct clksel auxclk5_sel[] = { -+ { .parent = &auxclk5_src_ck, .rates = div16_1to16_rates }, -+ { .parent = NULL }, -+}; -+ -+static struct clk auxclk5_ck = { -+ .name = "auxclk5_ck", -+ .parent = &auxclk5_src_ck, -+ .clksel = auxclk5_sel, -+ .clksel_reg = OMAP4_SCRM_AUXCLK5, -+ .clksel_mask = OMAP4_CLKDIV_MASK, -+ .ops = &clkops_null, -+ .recalc = &omap2_clksel_recalc, -+ .round_rate = &omap2_clksel_round_rate, -+ .set_rate = &omap2_clksel_set_rate, -+}; -+ - static const struct clksel auxclkreq_sel[] = { - { .parent = &auxclk0_ck, .rates = div_1_0_rates }, - { .parent = &auxclk1_ck, .rates = div_1_1_rates }, -@@ -3150,17 +3272,23 @@ static struct omap_clk omap44xx_clks[] = { - CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), - CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), - CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), -+ CLK(NULL, "auxclk0_src_ck", &auxclk0_src_ck, CK_443X), - CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), -- CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), -- CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), -- CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), -- CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), -- CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), - CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), -+ CLK(NULL, "auxclk1_src_ck", &auxclk1_src_ck, CK_443X), -+ CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), - CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), -+ CLK(NULL, "auxclk2_src_ck", &auxclk2_src_ck, CK_443X), -+ CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), - CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), -+ CLK(NULL, "auxclk3_src_ck", &auxclk3_src_ck, CK_443X), -+ CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), - CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), -+ CLK(NULL, "auxclk4_src_ck", &auxclk4_src_ck, CK_443X), -+ CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), - CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), -+ CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X), -+ CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), - CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), - CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), - CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X), --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain-attribute.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain-attribute.patch deleted file mode 100644 index f13d839..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain-attribute.patch +++ /dev/null @@ -1,724 +0,0 @@ -From 67101af593a16acf5d5d924f2746cc221d0360d1 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:29 -0600 -Subject: [PATCH 077/149] OMAP4: hwmod data: Add clock domain attribute - -In OMAP PRCM terminology, the clock domain is defined as a group of IPs -that share some clocks and most of the time an interface clock. -Every IP does belong to a clockdomain. -For the moment the clock domain attribute is affected to a clock node. -The issue with that approach, is that a clock might or not belong to a -clock domain. Moreover during module transition, it is up to a module -to handle properly the clock domain state and not to a clock node. - -Create a clkdm_name attribute to provide this information per hwmod. - -Populate this attribute for every OMAP4 hwmod entries. - -Future cleanup series with remove that information from the OMAP4 clock -when it is relevant. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -[paul@pwsan.com: fix the mpuss_clkdm name] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 85 +++++++++++++++++++++++++- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + - 3 files changed, 85 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c -index 66090f2..dccc651 100644 ---- a/arch/arm/mach-omap2/clockdomains44xx_data.c -+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c -@@ -565,7 +565,7 @@ static struct clockdomain ducati_44xx_clkdm = { - }; - - static struct clockdomain mpu_44xx_clkdm = { -- .name = "mpu_clkdm", -+ .name = "mpuss_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, - .prcm_partition = OMAP4430_CM1_PARTITION, - .cm_inst = OMAP4430_CM1_MPU_INST, -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 5d5df49..becae45 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -123,9 +123,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { - static struct omap_hwmod omap44xx_dmm_hwmod = { - .name = "dmm", - .class = &omap44xx_dmm_hwmod_class, -- .mpu_irqs = omap44xx_dmm_irqs, -+ .clkdm_name = "l3_emif_clkdm", - .slaves = omap44xx_dmm_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), -+ .mpu_irqs = omap44xx_dmm_irqs, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - }; - -@@ -173,6 +174,7 @@ static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = { - static struct omap_hwmod omap44xx_emif_fw_hwmod = { - .name = "emif_fw", - .class = &omap44xx_emif_fw_hwmod_class, -+ .clkdm_name = "l3_emif_clkdm", - .slaves = omap44xx_emif_fw_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -212,6 +214,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = { - static struct omap_hwmod omap44xx_l3_instr_hwmod = { - .name = "l3_instr", - .class = &omap44xx_l3_hwmod_class, -+ .clkdm_name = "l3_instr_clkdm", - .slaves = omap44xx_l3_instr_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -304,6 +307,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { - static struct omap_hwmod omap44xx_l3_main_1_hwmod = { - .name = "l3_main_1", - .class = &omap44xx_l3_hwmod_class, -+ .clkdm_name = "l3_1_clkdm", - .mpu_irqs = omap44xx_l3_main_1_irqs, - .slaves = omap44xx_l3_main_1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), -@@ -400,6 +404,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = { - static struct omap_hwmod omap44xx_l3_main_2_hwmod = { - .name = "l3_main_2", - .class = &omap44xx_l3_hwmod_class, -+ .clkdm_name = "l3_2_clkdm", - .slaves = omap44xx_l3_main_2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -450,6 +455,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = { - static struct omap_hwmod omap44xx_l3_main_3_hwmod = { - .name = "l3_main_3", - .class = &omap44xx_l3_hwmod_class, -+ .clkdm_name = "l3_instr_clkdm", - .slaves = omap44xx_l3_main_3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -507,6 +513,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = { - static struct omap_hwmod omap44xx_l4_abe_hwmod = { - .name = "l4_abe", - .class = &omap44xx_l4_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .slaves = omap44xx_l4_abe_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -529,6 +536,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = { - static struct omap_hwmod omap44xx_l4_cfg_hwmod = { - .name = "l4_cfg", - .class = &omap44xx_l4_hwmod_class, -+ .clkdm_name = "l4_cfg_clkdm", - .slaves = omap44xx_l4_cfg_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -551,6 +559,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = { - static struct omap_hwmod omap44xx_l4_per_hwmod = { - .name = "l4_per", - .class = &omap44xx_l4_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .slaves = omap44xx_l4_per_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -573,6 +582,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = { - static struct omap_hwmod omap44xx_l4_wkup_hwmod = { - .name = "l4_wkup", - .class = &omap44xx_l4_hwmod_class, -+ .clkdm_name = "l4_wkup_clkdm", - .slaves = omap44xx_l4_wkup_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -603,6 +613,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = { - static struct omap_hwmod omap44xx_mpu_private_hwmod = { - .name = "mpu_private", - .class = &omap44xx_mpu_bus_hwmod_class, -+ .clkdm_name = "mpuss_clkdm", - .slaves = omap44xx_mpu_private_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -741,6 +752,7 @@ static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = { - static struct omap_hwmod omap44xx_aess_hwmod = { - .name = "aess", - .class = &omap44xx_aess_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_aess_irqs, - .sdma_reqs = omap44xx_aess_sdma_reqs, - .main_clk = "aess_fck", -@@ -773,6 +785,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = { - static struct omap_hwmod omap44xx_bandgap_hwmod = { - .name = "bandgap", - .class = &omap44xx_bandgap_hwmod_class, -+ .clkdm_name = "l4_wkup_clkdm", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, -@@ -830,6 +843,7 @@ static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = { - static struct omap_hwmod omap44xx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &omap44xx_counter_hwmod_class, -+ .clkdm_name = "l4_wkup_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "sys_32k_ck", - .prcm = { -@@ -913,6 +927,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = { - static struct omap_hwmod omap44xx_dma_system_hwmod = { - .name = "dma_system", - .class = &omap44xx_dma_hwmod_class, -+ .clkdm_name = "l3_dma_clkdm", - .mpu_irqs = omap44xx_dma_system_irqs, - .main_clk = "l3_div_ck", - .prcm = { -@@ -1005,6 +1020,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = { - static struct omap_hwmod omap44xx_dmic_hwmod = { - .name = "dmic", - .class = &omap44xx_dmic_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_dmic_irqs, - .sdma_reqs = omap44xx_dmic_sdma_reqs, - .main_clk = "dmic_fck", -@@ -1072,6 +1088,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = { - static struct omap_hwmod omap44xx_dsp_c0_hwmod = { - .name = "dsp_c0", - .class = &omap44xx_dsp_hwmod_class, -+ .clkdm_name = "tesla_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_dsp_c0_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), -@@ -1086,6 +1103,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = { - static struct omap_hwmod omap44xx_dsp_hwmod = { - .name = "dsp", - .class = &omap44xx_dsp_hwmod_class, -+ .clkdm_name = "tesla_clkdm", - .mpu_irqs = omap44xx_dsp_irqs, - .rst_lines = omap44xx_dsp_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), -@@ -1177,6 +1195,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { - static struct omap_hwmod omap44xx_dss_hwmod = { - .name = "dss_core", - .class = &omap44xx_dss_hwmod_class, -+ .clkdm_name = "l3_dss_clkdm", - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -@@ -1278,7 +1297,7 @@ static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { - static struct omap_hwmod omap44xx_dss_dispc_hwmod = { - .name = "dss_dispc", - .class = &omap44xx_dispc_hwmod_class, -- .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, -+ .clkdm_name = "l3_dss_clkdm", - .mpu_irqs = omap44xx_dss_dispc_irqs, - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, - .main_clk = "dss_dss_clk", -@@ -1376,6 +1395,7 @@ static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { - static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - .name = "dss_dsi1", - .class = &omap44xx_dsi_hwmod_class, -+ .clkdm_name = "l3_dss_clkdm", - .mpu_irqs = omap44xx_dss_dsi1_irqs, - .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, - .main_clk = "dss_dss_clk", -@@ -1452,6 +1472,7 @@ static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { - static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { - .name = "dss_dsi2", - .class = &omap44xx_dsi_hwmod_class, -+ .clkdm_name = "l3_dss_clkdm", - .mpu_irqs = omap44xx_dss_dsi2_irqs, - .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, - .main_clk = "dss_dss_clk", -@@ -1548,6 +1569,7 @@ static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { - static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { - .name = "dss_hdmi", - .class = &omap44xx_hdmi_hwmod_class, -+ .clkdm_name = "l3_dss_clkdm", - .mpu_irqs = omap44xx_dss_hdmi_irqs, - .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, - .main_clk = "dss_dss_clk", -@@ -1639,6 +1661,7 @@ static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { - static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { - .name = "dss_rfbi", - .class = &omap44xx_rfbi_hwmod_class, -+ .clkdm_name = "l3_dss_clkdm", - .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, - .main_clk = "dss_dss_clk", - .prcm = { -@@ -1709,6 +1732,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = { - static struct omap_hwmod omap44xx_dss_venc_hwmod = { - .name = "dss_venc", - .class = &omap44xx_venc_hwmod_class, -+ .clkdm_name = "l3_dss_clkdm", - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -@@ -1786,6 +1810,7 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { - static struct omap_hwmod omap44xx_gpio1_hwmod = { - .name = "gpio1", - .class = &omap44xx_gpio_hwmod_class, -+ .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = omap44xx_gpio1_irqs, - .main_clk = "gpio1_ick", - .prcm = { -@@ -1838,6 +1863,7 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { - static struct omap_hwmod omap44xx_gpio2_hwmod = { - .name = "gpio2", - .class = &omap44xx_gpio_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio2_irqs, - .main_clk = "gpio2_ick", -@@ -1891,6 +1917,7 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { - static struct omap_hwmod omap44xx_gpio3_hwmod = { - .name = "gpio3", - .class = &omap44xx_gpio_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio3_irqs, - .main_clk = "gpio3_ick", -@@ -1944,6 +1971,7 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { - static struct omap_hwmod omap44xx_gpio4_hwmod = { - .name = "gpio4", - .class = &omap44xx_gpio_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio4_irqs, - .main_clk = "gpio4_ick", -@@ -1997,6 +2025,7 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { - static struct omap_hwmod omap44xx_gpio5_hwmod = { - .name = "gpio5", - .class = &omap44xx_gpio_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio5_irqs, - .main_clk = "gpio5_ick", -@@ -2050,6 +2079,7 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { - static struct omap_hwmod omap44xx_gpio6_hwmod = { - .name = "gpio6", - .class = &omap44xx_gpio_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap44xx_gpio6_irqs, - .main_clk = "gpio6_ick", -@@ -2129,6 +2159,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = { - static struct omap_hwmod omap44xx_hsi_hwmod = { - .name = "hsi", - .class = &omap44xx_hsi_hwmod_class, -+ .clkdm_name = "l3_init_clkdm", - .mpu_irqs = omap44xx_hsi_irqs, - .main_clk = "hsi_fck", - .prcm = { -@@ -2209,6 +2240,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { - static struct omap_hwmod omap44xx_i2c1_hwmod = { - .name = "i2c1", - .class = &omap44xx_i2c_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap44xx_i2c1_irqs, - .sdma_reqs = omap44xx_i2c1_sdma_reqs, -@@ -2263,6 +2295,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { - static struct omap_hwmod omap44xx_i2c2_hwmod = { - .name = "i2c2", - .class = &omap44xx_i2c_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap44xx_i2c2_irqs, - .sdma_reqs = omap44xx_i2c2_sdma_reqs, -@@ -2317,6 +2350,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { - static struct omap_hwmod omap44xx_i2c3_hwmod = { - .name = "i2c3", - .class = &omap44xx_i2c_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap44xx_i2c3_irqs, - .sdma_reqs = omap44xx_i2c3_sdma_reqs, -@@ -2371,6 +2405,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { - static struct omap_hwmod omap44xx_i2c4_hwmod = { - .name = "i2c4", - .class = &omap44xx_i2c_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_16BIT_REG, - .mpu_irqs = omap44xx_i2c4_irqs, - .sdma_reqs = omap44xx_i2c4_sdma_reqs, -@@ -2435,6 +2470,7 @@ static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = { - static struct omap_hwmod omap44xx_ipu_c0_hwmod = { - .name = "ipu_c0", - .class = &omap44xx_ipu_hwmod_class, -+ .clkdm_name = "ducati_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_ipu_c0_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), -@@ -2450,6 +2486,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { - static struct omap_hwmod omap44xx_ipu_c1_hwmod = { - .name = "ipu_c1", - .class = &omap44xx_ipu_hwmod_class, -+ .clkdm_name = "ducati_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_ipu_c1_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), -@@ -2464,6 +2501,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { - static struct omap_hwmod omap44xx_ipu_hwmod = { - .name = "ipu", - .class = &omap44xx_ipu_hwmod_class, -+ .clkdm_name = "ducati_clkdm", - .mpu_irqs = omap44xx_ipu_irqs, - .rst_lines = omap44xx_ipu_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), -@@ -2551,6 +2589,7 @@ static struct omap_hwmod_opt_clk iss_opt_clks[] = { - static struct omap_hwmod omap44xx_iss_hwmod = { - .name = "iss", - .class = &omap44xx_iss_hwmod_class, -+ .clkdm_name = "iss_clkdm", - .mpu_irqs = omap44xx_iss_irqs, - .sdma_reqs = omap44xx_iss_sdma_reqs, - .main_clk = "iss_fck", -@@ -2631,6 +2670,7 @@ static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = { - static struct omap_hwmod omap44xx_iva_seq0_hwmod = { - .name = "iva_seq0", - .class = &omap44xx_iva_hwmod_class, -+ .clkdm_name = "ivahd_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_iva_seq0_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), -@@ -2646,6 +2686,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = { - static struct omap_hwmod omap44xx_iva_seq1_hwmod = { - .name = "iva_seq1", - .class = &omap44xx_iva_hwmod_class, -+ .clkdm_name = "ivahd_clkdm", - .flags = HWMOD_INIT_NO_RESET, - .rst_lines = omap44xx_iva_seq1_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), -@@ -2660,6 +2701,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = { - static struct omap_hwmod omap44xx_iva_hwmod = { - .name = "iva", - .class = &omap44xx_iva_hwmod_class, -+ .clkdm_name = "ivahd_clkdm", - .mpu_irqs = omap44xx_iva_irqs, - .rst_lines = omap44xx_iva_resets, - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), -@@ -2732,6 +2774,7 @@ static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = { - static struct omap_hwmod omap44xx_kbd_hwmod = { - .name = "kbd", - .class = &omap44xx_kbd_hwmod_class, -+ .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = omap44xx_kbd_irqs, - .main_clk = "kbd_fck", - .prcm = { -@@ -2797,6 +2840,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = { - static struct omap_hwmod omap44xx_mailbox_hwmod = { - .name = "mailbox", - .class = &omap44xx_mailbox_hwmod_class, -+ .clkdm_name = "l4_cfg_clkdm", - .mpu_irqs = omap44xx_mailbox_irqs, - .prcm = { - .omap4 = { -@@ -2887,6 +2931,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = { - static struct omap_hwmod omap44xx_mcbsp1_hwmod = { - .name = "mcbsp1", - .class = &omap44xx_mcbsp_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_mcbsp1_irqs, - .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, - .main_clk = "mcbsp1_fck", -@@ -2960,6 +3005,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = { - static struct omap_hwmod omap44xx_mcbsp2_hwmod = { - .name = "mcbsp2", - .class = &omap44xx_mcbsp_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_mcbsp2_irqs, - .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, - .main_clk = "mcbsp2_fck", -@@ -3033,6 +3079,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = { - static struct omap_hwmod omap44xx_mcbsp3_hwmod = { - .name = "mcbsp3", - .class = &omap44xx_mcbsp_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_mcbsp3_irqs, - .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, - .main_clk = "mcbsp3_fck", -@@ -3085,6 +3132,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = { - static struct omap_hwmod omap44xx_mcbsp4_hwmod = { - .name = "mcbsp4", - .class = &omap44xx_mcbsp_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_mcbsp4_irqs, - .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, - .main_clk = "mcbsp4_fck", -@@ -3177,6 +3225,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = { - static struct omap_hwmod omap44xx_mcpdm_hwmod = { - .name = "mcpdm", - .class = &omap44xx_mcpdm_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_mcpdm_irqs, - .sdma_reqs = omap44xx_mcpdm_sdma_reqs, - .main_clk = "mcpdm_fck", -@@ -3262,6 +3311,7 @@ static struct omap2_mcspi_dev_attr mcspi1_dev_attr = { - static struct omap_hwmod omap44xx_mcspi1_hwmod = { - .name = "mcspi1", - .class = &omap44xx_mcspi_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_mcspi1_irqs, - .sdma_reqs = omap44xx_mcspi1_sdma_reqs, - .main_clk = "mcspi1_fck", -@@ -3322,6 +3372,7 @@ static struct omap2_mcspi_dev_attr mcspi2_dev_attr = { - static struct omap_hwmod omap44xx_mcspi2_hwmod = { - .name = "mcspi2", - .class = &omap44xx_mcspi_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_mcspi2_irqs, - .sdma_reqs = omap44xx_mcspi2_sdma_reqs, - .main_clk = "mcspi2_fck", -@@ -3382,6 +3433,7 @@ static struct omap2_mcspi_dev_attr mcspi3_dev_attr = { - static struct omap_hwmod omap44xx_mcspi3_hwmod = { - .name = "mcspi3", - .class = &omap44xx_mcspi_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_mcspi3_irqs, - .sdma_reqs = omap44xx_mcspi3_sdma_reqs, - .main_clk = "mcspi3_fck", -@@ -3440,6 +3492,7 @@ static struct omap2_mcspi_dev_attr mcspi4_dev_attr = { - static struct omap_hwmod omap44xx_mcspi4_hwmod = { - .name = "mcspi4", - .class = &omap44xx_mcspi_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_mcspi4_irqs, - .sdma_reqs = omap44xx_mcspi4_sdma_reqs, - .main_clk = "mcspi4_fck", -@@ -3524,6 +3577,7 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = { - static struct omap_hwmod omap44xx_mmc1_hwmod = { - .name = "mmc1", - .class = &omap44xx_mmc_hwmod_class, -+ .clkdm_name = "l3_init_clkdm", - .mpu_irqs = omap44xx_mmc1_irqs, - .sdma_reqs = omap44xx_mmc1_sdma_reqs, - .main_clk = "mmc1_fck", -@@ -3583,6 +3637,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = { - static struct omap_hwmod omap44xx_mmc2_hwmod = { - .name = "mmc2", - .class = &omap44xx_mmc_hwmod_class, -+ .clkdm_name = "l3_init_clkdm", - .mpu_irqs = omap44xx_mmc2_irqs, - .sdma_reqs = omap44xx_mmc2_sdma_reqs, - .main_clk = "mmc2_fck", -@@ -3637,6 +3692,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = { - static struct omap_hwmod omap44xx_mmc3_hwmod = { - .name = "mmc3", - .class = &omap44xx_mmc_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_mmc3_irqs, - .sdma_reqs = omap44xx_mmc3_sdma_reqs, - .main_clk = "mmc3_fck", -@@ -3689,6 +3745,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = { - static struct omap_hwmod omap44xx_mmc4_hwmod = { - .name = "mmc4", - .class = &omap44xx_mmc_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_mmc4_irqs, - - .sdma_reqs = omap44xx_mmc4_sdma_reqs, -@@ -3742,6 +3799,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = { - static struct omap_hwmod omap44xx_mmc5_hwmod = { - .name = "mmc5", - .class = &omap44xx_mmc_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_mmc5_irqs, - .sdma_reqs = omap44xx_mmc5_sdma_reqs, - .main_clk = "mmc5_fck", -@@ -3782,6 +3840,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = { - static struct omap_hwmod omap44xx_mpu_hwmod = { - .name = "mpu", - .class = &omap44xx_mpu_hwmod_class, -+ .clkdm_name = "mpuss_clkdm", - .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_mpu_irqs, - .main_clk = "dpll_mpu_m2_ck", -@@ -3854,6 +3913,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = { - static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { - .name = "smartreflex_core", - .class = &omap44xx_smartreflex_hwmod_class, -+ .clkdm_name = "l4_ao_clkdm", - .mpu_irqs = omap44xx_smartreflex_core_irqs, - - .main_clk = "smartreflex_core_fck", -@@ -3901,6 +3961,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = { - static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { - .name = "smartreflex_iva", - .class = &omap44xx_smartreflex_hwmod_class, -+ .clkdm_name = "l4_ao_clkdm", - .mpu_irqs = omap44xx_smartreflex_iva_irqs, - .main_clk = "smartreflex_iva_fck", - .vdd_name = "iva", -@@ -3947,6 +4008,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = { - static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { - .name = "smartreflex_mpu", - .class = &omap44xx_smartreflex_hwmod_class, -+ .clkdm_name = "l4_ao_clkdm", - .mpu_irqs = omap44xx_smartreflex_mpu_irqs, - .main_clk = "smartreflex_mpu_fck", - .vdd_name = "mpu", -@@ -4011,6 +4073,7 @@ static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = { - static struct omap_hwmod omap44xx_spinlock_hwmod = { - .name = "spinlock", - .class = &omap44xx_spinlock_hwmod_class, -+ .clkdm_name = "l4_cfg_clkdm", - .prcm = { - .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, -@@ -4092,6 +4155,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = { - static struct omap_hwmod omap44xx_timer1_hwmod = { - .name = "timer1", - .class = &omap44xx_timer_1ms_hwmod_class, -+ .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = omap44xx_timer1_irqs, - .main_clk = "timer1_fck", - .prcm = { -@@ -4137,6 +4201,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = { - static struct omap_hwmod omap44xx_timer2_hwmod = { - .name = "timer2", - .class = &omap44xx_timer_1ms_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_timer2_irqs, - .main_clk = "timer2_fck", - .prcm = { -@@ -4182,6 +4247,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = { - static struct omap_hwmod omap44xx_timer3_hwmod = { - .name = "timer3", - .class = &omap44xx_timer_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_timer3_irqs, - .main_clk = "timer3_fck", - .prcm = { -@@ -4227,6 +4293,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = { - static struct omap_hwmod omap44xx_timer4_hwmod = { - .name = "timer4", - .class = &omap44xx_timer_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_timer4_irqs, - .main_clk = "timer4_fck", - .prcm = { -@@ -4291,6 +4358,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = { - static struct omap_hwmod omap44xx_timer5_hwmod = { - .name = "timer5", - .class = &omap44xx_timer_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_timer5_irqs, - .main_clk = "timer5_fck", - .prcm = { -@@ -4355,6 +4423,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = { - static struct omap_hwmod omap44xx_timer6_hwmod = { - .name = "timer6", - .class = &omap44xx_timer_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_timer6_irqs, - - .main_clk = "timer6_fck", -@@ -4420,6 +4489,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = { - static struct omap_hwmod omap44xx_timer7_hwmod = { - .name = "timer7", - .class = &omap44xx_timer_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_timer7_irqs, - .main_clk = "timer7_fck", - .prcm = { -@@ -4484,6 +4554,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = { - static struct omap_hwmod omap44xx_timer8_hwmod = { - .name = "timer8", - .class = &omap44xx_timer_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_timer8_irqs, - .main_clk = "timer8_fck", - .prcm = { -@@ -4529,6 +4600,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = { - static struct omap_hwmod omap44xx_timer9_hwmod = { - .name = "timer9", - .class = &omap44xx_timer_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_timer9_irqs, - .main_clk = "timer9_fck", - .prcm = { -@@ -4574,6 +4646,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = { - static struct omap_hwmod omap44xx_timer10_hwmod = { - .name = "timer10", - .class = &omap44xx_timer_1ms_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_timer10_irqs, - .main_clk = "timer10_fck", - .prcm = { -@@ -4619,6 +4692,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = { - static struct omap_hwmod omap44xx_timer11_hwmod = { - .name = "timer11", - .class = &omap44xx_timer_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_timer11_irqs, - .main_clk = "timer11_fck", - .prcm = { -@@ -4692,6 +4766,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = { - static struct omap_hwmod omap44xx_uart1_hwmod = { - .name = "uart1", - .class = &omap44xx_uart_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_uart1_irqs, - .sdma_reqs = omap44xx_uart1_sdma_reqs, - .main_clk = "uart1_fck", -@@ -4744,6 +4819,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = { - static struct omap_hwmod omap44xx_uart2_hwmod = { - .name = "uart2", - .class = &omap44xx_uart_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_uart2_irqs, - .sdma_reqs = omap44xx_uart2_sdma_reqs, - .main_clk = "uart2_fck", -@@ -4796,6 +4872,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { - static struct omap_hwmod omap44xx_uart3_hwmod = { - .name = "uart3", - .class = &omap44xx_uart_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, - .mpu_irqs = omap44xx_uart3_irqs, - .sdma_reqs = omap44xx_uart3_sdma_reqs, -@@ -4849,6 +4926,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = { - static struct omap_hwmod omap44xx_uart4_hwmod = { - .name = "uart4", - .class = &omap44xx_uart_hwmod_class, -+ .clkdm_name = "l4_per_clkdm", - .mpu_irqs = omap44xx_uart4_irqs, - .sdma_reqs = omap44xx_uart4_sdma_reqs, - .main_clk = "uart4_fck", -@@ -4927,6 +5005,7 @@ static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = { - static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { - .name = "usb_otg_hs", - .class = &omap44xx_usb_otg_hs_hwmod_class, -+ .clkdm_name = "l3_init_clkdm", - .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, - .mpu_irqs = omap44xx_usb_otg_hs_irqs, - .main_clk = "usb_otg_hs_ick", -@@ -5000,6 +5079,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = { - static struct omap_hwmod omap44xx_wd_timer2_hwmod = { - .name = "wd_timer2", - .class = &omap44xx_wd_timer_hwmod_class, -+ .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = omap44xx_wd_timer2_irqs, - .main_clk = "wd_timer2_fck", - .prcm = { -@@ -5064,6 +5144,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = { - static struct omap_hwmod omap44xx_wd_timer3_hwmod = { - .name = "wd_timer3", - .class = &omap44xx_wd_timer_hwmod_class, -+ .clkdm_name = "abe_clkdm", - .mpu_irqs = omap44xx_wd_timer3_irqs, - .main_clk = "wd_timer3_fck", - .prcm = { -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index fafdfe3..21d3922 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -515,6 +515,7 @@ struct omap_hwmod { - const char *main_clk; - struct clk *_clk; - struct omap_hwmod_opt_clk *opt_clks; -+ char *clkdm_name; - char *vdd_name; - struct voltagedomain *voltdm; - struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch deleted file mode 100644 index db4e932..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 57d2323014444c5d7f8c8d7e2da0a9737c3d8c28 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:30 -0600 -Subject: [PATCH 078/149] OMAP2+: hwmod: Init clkdm field at boot time - -At boot time, lookup the clkdm_name to get the clkdm -structure pointer for further usage. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 34 +++++++++++++++++++++++++- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + - 2 files changed, 34 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 02b6016..1f6f47f 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -990,9 +990,40 @@ static struct omap_hwmod *_lookup(const char *name) - - return oh; - } -+/** -+ * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod -+ * @oh: struct omap_hwmod * -+ * -+ * Convert a clockdomain name stored in a struct omap_hwmod into a -+ * clockdomain pointer, and save it into the struct omap_hwmod. -+ * return -EINVAL if clkdm_name does not exist or if the lookup failed. -+ */ -+static int _init_clkdm(struct omap_hwmod *oh) -+{ -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) -+ return 0; -+ -+ if (!oh->clkdm_name) { -+ pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name); -+ return -EINVAL; -+ } -+ -+ oh->clkdm = clkdm_lookup(oh->clkdm_name); -+ if (!oh->clkdm) { -+ pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", -+ oh->name, oh->clkdm_name); -+ return -EINVAL; -+ } -+ -+ pr_debug("omap_hwmod: %s: associated to clkdm %s\n", -+ oh->name, oh->clkdm_name); -+ -+ return 0; -+} - - /** -- * _init_clocks - clk_get() all clocks associated with this hwmod -+ * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as -+ * well the clockdomain. - * @oh: struct omap_hwmod * - * @data: not used; pass NULL - * -@@ -1012,6 +1043,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) - ret |= _init_main_clk(oh); - ret |= _init_interface_clks(oh); - ret |= _init_opt_clks(oh); -+ ret |= _init_clkdm(oh); - - if (!ret) - oh->_state = _HWMOD_STATE_CLKS_INITED; -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index 21d3922..3306bdf 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -516,6 +516,7 @@ struct omap_hwmod { - struct clk *_clk; - struct omap_hwmod_opt_clk *opt_clks; - char *clkdm_name; -+ struct clockdomain *clkdm; - char *vdd_name; - struct voltagedomain *voltdm; - struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch deleted file mode 100644 index ba3120f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch +++ /dev/null @@ -1,976 +0,0 @@ -From d112244b9ada88d33ac8e856587a4645c8f11e80 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:30 -0600 -Subject: [PATCH 079/149] OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros - -The CLKCTRL register was accessed using an absolute address. -The usage of hardcoded macros to calculate virtual address from physical -one should be avoided as much as possible. -The usage of a offset will allow future improvement like migration from -the current architecture code toward a module driver. - -Update cm_xxx accessor, move definition to the proper header file and -update copyrights. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Cc: Todd Poynor <toddpoynor@google.com> -[paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty - fn prototype section from cm44xx.h; incorporated comments from Todd; - documented some functions] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/cm44xx.h | 8 +- - arch/arm/mach-omap2/cminst44xx.c | 87 ++++++++++--- - arch/arm/mach-omap2/cminst44xx.h | 4 +- - arch/arm/mach-omap2/omap_hwmod.c | 12 ++- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 182 ++++++++++++++++--------- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +- - 6 files changed, 198 insertions(+), 97 deletions(-) - -diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h -index 0b87ec8..3380bee 100644 ---- a/arch/arm/mach-omap2/cm44xx.h -+++ b/arch/arm/mach-omap2/cm44xx.h -@@ -1,7 +1,7 @@ - /* - * OMAP4 Clock Management (CM) definitions - * -- * Copyright (C) 2007-2009 Texas Instruments, Inc. -+ * Copyright (C) 2007-2011 Texas Instruments, Inc. - * Copyright (C) 2007-2009 Nokia Corporation - * - * Written by Paul Walmsley -@@ -23,10 +23,4 @@ - #define OMAP4_CM_CLKSTCTRL 0x0000 - #define OMAP4_CM_STATICDEP 0x0004 - --/* Function prototypes */ --# ifndef __ASSEMBLER__ -- --extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); -- --# endif - #endif -diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c -index a482bfa..9033dd4 100644 ---- a/arch/arm/mach-omap2/cminst44xx.c -+++ b/arch/arm/mach-omap2/cminst44xx.c -@@ -2,6 +2,7 @@ - * OMAP4 CM instance functions - * - * Copyright (C) 2009 Nokia Corporation -+ * Copyright (C) 2011 Texas Instruments, Inc. - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify -@@ -32,6 +33,22 @@ - #include "prm44xx.h" - #include "prcm_mpu44xx.h" - -+/* -+ * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: -+ * -+ * 0x0 func: Module is fully functional, including OCP -+ * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep -+ * abortion -+ * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if -+ * using separate functional clock -+ * 0x3 disabled: Module is disabled and cannot be accessed -+ * -+ */ -+#define CLKCTRL_IDLEST_FUNCTIONAL 0x0 -+#define CLKCTRL_IDLEST_INTRANSITION 0x1 -+#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 -+#define CLKCTRL_IDLEST_DISABLED 0x3 -+ - static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { - [OMAP4430_INVALID_PRCM_PARTITION] = 0, - [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, -@@ -41,6 +58,48 @@ static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { - [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, - }; - -+/* Private functions */ -+ -+/** -+ * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in -+ * @inst: CM instance register offset (*_INST macro) -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) -+ * -+ * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to -+ * bit 0. -+ */ -+static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) -+{ -+ u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); -+ v &= OMAP4430_IDLEST_MASK; -+ v >>= OMAP4430_IDLEST_SHIFT; -+ return v; -+} -+ -+/** -+ * _is_module_ready - can module registers be accessed without causing an abort? -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in -+ * @inst: CM instance register offset (*_INST macro) -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) -+ * -+ * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either -+ * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise. -+ */ -+static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) -+{ -+ u32 v; -+ -+ v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs); -+ -+ return (v == CLKCTRL_IDLEST_FUNCTIONAL || -+ v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; -+} -+ -+/* Public functions */ -+ - /* Read a register in a CM instance */ - u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) - { -@@ -200,35 +259,27 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs) - */ - - /** -- * omap4_cm_wait_module_ready - wait for a module to be in 'func' state -- * @clkctrl_reg: CLKCTRL module address -+ * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in -+ * @inst: CM instance register offset (*_INST macro) -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) - * - * Wait for the module IDLEST to be functional. If the idle state is in any - * the non functional state (trans, idle or disabled), module and thus the - * sysconfig cannot be accessed and will probably lead to an "imprecise - * external abort" -- * -- * Module idle state: -- * 0x0 func: Module is fully functional, including OCP -- * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep -- * abortion -- * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if -- * using separate functional clock -- * 0x3 disabled: Module is disabled and cannot be accessed -- * - */ --int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg) -+int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, -+ u16 clkctrl_offs) - { - int i = 0; - -- if (!clkctrl_reg) -+ if (!clkctrl_offs) - return 0; - -- omap_test_timeout(( -- ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) || -- (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >> -- OMAP4430_IDLEST_SHIFT) == 0x2)), -- MAX_MODULE_READY_TIME, i); -+ omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs), -+ MAX_MODULE_READY_TIME, i); - - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; - } -diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h -index 2b32c18..8eba2ae 100644 ---- a/arch/arm/mach-omap2/cminst44xx.h -+++ b/arch/arm/mach-omap2/cminst44xx.h -@@ -17,6 +17,8 @@ extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs); - extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); - extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); - -+extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); -+ - /* - * In an ideal world, we would not export these low-level functions, - * but this will probably take some time to fix properly -@@ -32,6 +34,4 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, - extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, - u32 mask); - --extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); -- - #endif -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 1f6f47f..00241ea 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -146,7 +146,7 @@ - #include <plat/prcm.h> - - #include "cm2xxx_3xxx.h" --#include "cm44xx.h" -+#include "cminst44xx.h" - #include "prm2xxx_3xxx.h" - #include "prm44xx.h" - #include "mux.h" -@@ -1060,7 +1060,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) - * Wait for a module @oh to leave slave idle. Returns 0 if the module - * does not have an IDLEST bit or if the module successfully leaves - * slave idle; otherwise, pass along the return value of the -- * appropriate *_cm_wait_module_ready() function. -+ * appropriate *_cm*_wait_module_ready() function. - */ - static int _wait_target_ready(struct omap_hwmod *oh) - { -@@ -1087,7 +1087,13 @@ static int _wait_target_ready(struct omap_hwmod *oh) - oh->prcm.omap2.idlest_reg_id, - oh->prcm.omap2.idlest_idle_bit); - } else if (cpu_is_omap44xx()) { -- ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg); -+ if (!oh->clkdm) -+ return -EINVAL; -+ -+ ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, -+ oh->clkdm->cm_inst, -+ oh->clkdm->clkdm_offs, -+ oh->prcm.omap4.clkctrl_offs); - } else { - BUG(); - }; -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index becae45..00d7130 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -124,6 +124,11 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { - .name = "dmm", - .class = &omap44xx_dmm_hwmod_class, - .clkdm_name = "l3_emif_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_dmm_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), - .mpu_irqs = omap44xx_dmm_irqs, -@@ -175,6 +180,11 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { - .name = "emif_fw", - .class = &omap44xx_emif_fw_hwmod_class, - .clkdm_name = "l3_emif_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_emif_fw_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -215,6 +225,11 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { - .name = "l3_instr", - .class = &omap44xx_l3_hwmod_class, - .clkdm_name = "l3_instr_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_l3_instr_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -309,6 +324,11 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { - .class = &omap44xx_l3_hwmod_class, - .clkdm_name = "l3_1_clkdm", - .mpu_irqs = omap44xx_l3_main_1_irqs, -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_l3_main_1_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -405,6 +425,11 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { - .name = "l3_main_2", - .class = &omap44xx_l3_hwmod_class, - .clkdm_name = "l3_2_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_l3_main_2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -456,6 +481,11 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { - .name = "l3_main_3", - .class = &omap44xx_l3_hwmod_class, - .clkdm_name = "l3_instr_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_l3_main_3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -514,6 +544,11 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { - .name = "l4_abe", - .class = &omap44xx_l4_hwmod_class, - .clkdm_name = "abe_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_l4_abe_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -537,6 +572,11 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { - .name = "l4_cfg", - .class = &omap44xx_l4_hwmod_class, - .clkdm_name = "l4_cfg_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_l4_cfg_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -560,6 +600,11 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { - .name = "l4_per", - .class = &omap44xx_l4_hwmod_class, - .clkdm_name = "l4_per_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_l4_per_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -583,6 +628,11 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { - .name = "l4_wkup", - .class = &omap44xx_l4_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", -+ .prcm = { -+ .omap4 = { -+ .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, -+ }, -+ }, - .slaves = omap44xx_l4_wkup_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -758,7 +808,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { - .main_clk = "aess_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_aess_slaves, -@@ -788,7 +838,7 @@ static struct omap_hwmod omap44xx_bandgap_hwmod = { - .clkdm_name = "l4_wkup_clkdm", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET, - }, - }, - .opt_clks = bandgap_opt_clks, -@@ -848,7 +898,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { - .main_clk = "sys_32k_ck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_counter_32k_slaves, -@@ -932,7 +982,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { - .main_clk = "l3_div_ck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, - }, - }, - .dev_attr = &dma_dev_attr, -@@ -1026,7 +1076,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { - .main_clk = "dmic_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_dmic_slaves, -@@ -1110,7 +1160,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { - .main_clk = "dsp_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, - }, - }, -@@ -1199,7 +1249,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = { - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, - }, - }, - .opt_clks = dss_opt_clks, -@@ -1303,7 +1353,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, - }, - }, - .opt_clks = dss_dispc_opt_clks, -@@ -1401,7 +1451,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, - }, - }, - .opt_clks = dss_dsi1_opt_clks, -@@ -1478,7 +1528,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, - }, - }, - .opt_clks = dss_dsi2_opt_clks, -@@ -1575,7 +1625,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, - }, - }, - .opt_clks = dss_hdmi_opt_clks, -@@ -1666,7 +1716,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, - }, - }, - .opt_clks = dss_rfbi_opt_clks, -@@ -1736,7 +1786,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { - .main_clk = "dss_dss_clk", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_dss_venc_slaves, -@@ -1815,7 +1865,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { - .main_clk = "gpio1_ick", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_WKUP_GPIO1_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, - }, - }, - .opt_clks = gpio1_opt_clks, -@@ -1869,7 +1919,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { - .main_clk = "gpio2_ick", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_GPIO2_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, - }, - }, - .opt_clks = gpio2_opt_clks, -@@ -1923,7 +1973,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { - .main_clk = "gpio3_ick", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_GPIO3_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, - }, - }, - .opt_clks = gpio3_opt_clks, -@@ -1977,7 +2027,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { - .main_clk = "gpio4_ick", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_GPIO4_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, - }, - }, - .opt_clks = gpio4_opt_clks, -@@ -2031,7 +2081,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { - .main_clk = "gpio5_ick", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_GPIO5_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, - }, - }, - .opt_clks = gpio5_opt_clks, -@@ -2085,7 +2135,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { - .main_clk = "gpio6_ick", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_GPIO6_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, - }, - }, - .opt_clks = gpio6_opt_clks, -@@ -2164,7 +2214,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { - .main_clk = "hsi_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_hsi_slaves, -@@ -2247,7 +2297,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { - .main_clk = "i2c1_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_i2c1_slaves, -@@ -2302,7 +2352,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { - .main_clk = "i2c2_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_i2c2_slaves, -@@ -2357,7 +2407,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { - .main_clk = "i2c3_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_i2c3_slaves, -@@ -2412,7 +2462,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { - .main_clk = "i2c4_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_i2c4_slaves, -@@ -2508,7 +2558,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { - .main_clk = "ipu_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, - }, - }, -@@ -2595,7 +2645,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { - .main_clk = "iss_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, - }, - }, - .opt_clks = iss_opt_clks, -@@ -2708,7 +2758,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { - .main_clk = "iva_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, - }, - }, -@@ -2779,7 +2829,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { - .main_clk = "kbd_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_kbd_slaves, -@@ -2844,7 +2894,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { - .mpu_irqs = omap44xx_mailbox_irqs, - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mailbox_slaves, -@@ -2937,7 +2987,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { - .main_clk = "mcbsp1_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mcbsp1_slaves, -@@ -3011,7 +3061,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { - .main_clk = "mcbsp2_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mcbsp2_slaves, -@@ -3085,7 +3135,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { - .main_clk = "mcbsp3_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mcbsp3_slaves, -@@ -3138,7 +3188,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { - .main_clk = "mcbsp4_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mcbsp4_slaves, -@@ -3231,7 +3281,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { - .main_clk = "mcpdm_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mcpdm_slaves, -@@ -3317,7 +3367,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { - .main_clk = "mcspi1_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, - }, - }, - .dev_attr = &mcspi1_dev_attr, -@@ -3378,7 +3428,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { - .main_clk = "mcspi2_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, - }, - }, - .dev_attr = &mcspi2_dev_attr, -@@ -3439,7 +3489,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { - .main_clk = "mcspi3_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, - }, - }, - .dev_attr = &mcspi3_dev_attr, -@@ -3498,7 +3548,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { - .main_clk = "mcspi4_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, - }, - }, - .dev_attr = &mcspi4_dev_attr, -@@ -3583,7 +3633,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { - .main_clk = "mmc1_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, - }, - }, - .dev_attr = &mmc1_dev_attr, -@@ -3643,7 +3693,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { - .main_clk = "mmc2_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mmc2_slaves, -@@ -3698,7 +3748,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { - .main_clk = "mmc3_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mmc3_slaves, -@@ -3752,7 +3802,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { - .main_clk = "mmc4_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mmc4_slaves, -@@ -3805,7 +3855,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { - .main_clk = "mmc5_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_mmc5_slaves, -@@ -3846,7 +3896,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { - .main_clk = "dpll_mpu_m2_ck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_MPU_MPU_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, - }, - }, - .masters = omap44xx_mpu_masters, -@@ -3920,7 +3970,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { - .vdd_name = "core", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_smartreflex_core_slaves, -@@ -3967,7 +4017,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { - .vdd_name = "iva", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_smartreflex_iva_slaves, -@@ -4014,7 +4064,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { - .vdd_name = "mpu", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_smartreflex_mpu_slaves, -@@ -4076,7 +4126,7 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { - .clkdm_name = "l4_cfg_clkdm", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_spinlock_slaves, -@@ -4160,7 +4210,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { - .main_clk = "timer1_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer1_slaves, -@@ -4206,7 +4256,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { - .main_clk = "timer2_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer2_slaves, -@@ -4252,7 +4302,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { - .main_clk = "timer3_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer3_slaves, -@@ -4298,7 +4348,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { - .main_clk = "timer4_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer4_slaves, -@@ -4363,7 +4413,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { - .main_clk = "timer5_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_TIMER5_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer5_slaves, -@@ -4429,7 +4479,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { - .main_clk = "timer6_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_TIMER6_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer6_slaves, -@@ -4494,7 +4544,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { - .main_clk = "timer7_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_TIMER7_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer7_slaves, -@@ -4559,7 +4609,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { - .main_clk = "timer8_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_TIMER8_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer8_slaves, -@@ -4605,7 +4655,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { - .main_clk = "timer9_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer9_slaves, -@@ -4651,7 +4701,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { - .main_clk = "timer10_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer10_slaves, -@@ -4697,7 +4747,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { - .main_clk = "timer11_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_timer11_slaves, -@@ -4772,7 +4822,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { - .main_clk = "uart1_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_uart1_slaves, -@@ -4825,7 +4875,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { - .main_clk = "uart2_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_uart2_slaves, -@@ -4879,7 +4929,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { - .main_clk = "uart3_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_uart3_slaves, -@@ -4932,7 +4982,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { - .main_clk = "uart4_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_uart4_slaves, -@@ -5011,7 +5061,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { - .main_clk = "usb_otg_hs_ick", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, - }, - }, - .opt_clks = usb_otg_hs_opt_clks, -@@ -5084,7 +5134,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { - .main_clk = "wd_timer2_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_wd_timer2_slaves, -@@ -5149,7 +5199,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { - .main_clk = "wd_timer3_fck", - .prcm = { - .omap4 = { -- .clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL, -+ .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, - }, - }, - .slaves = omap44xx_wd_timer3_slaves, -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index 3306bdf..fc54355 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -360,7 +360,7 @@ struct omap_hwmod_omap2_prcm { - * @submodule_wkdep_bit: bit shift of the WKDEP range - */ - struct omap_hwmod_omap4_prcm { -- void __iomem *clkctrl_reg; -+ u16 clkctrl_offs; - void __iomem *rstctrl_reg; - u8 submodule_wkdep_bit; - }; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch deleted file mode 100644 index c3668a6..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch +++ /dev/null @@ -1,153 +0,0 @@ -From e800b4bd2d100fea86fbfa46a20a374c691e2fcd Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:30 -0600 -Subject: [PATCH 080/149] OMAP: hwmod: Wait the idle status to be disabled - -It is mandatory to wait for a module to be in disabled state before -potentially disabling source clock or re-asserting a reset. - -omap_hwmod_idle and omap_hwmod_shutdown does not wait for -the module to be fully idle. - -Add a cm_xxx accessor to wait the clkctrl idle status to be disabled. -Fix hwmod_[idle|shutdown] to use this API. - -Based on Rajendra's initial patch. - -Please note that most interconnects hwmod will return one timeout because -it is impossible for them to be in idle since the processor is accessing -the registers though the interconnect. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Todd Poynor <toddpoynor@google.com> -[paul@pwsan.com: move cpu_is_*() tests to the top of _wait_target_disable(); - incorporate some feedback from Todd] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/cminst44xx.c | 25 +++++++++++++++++++++++ - arch/arm/mach-omap2/cminst44xx.h | 1 + - arch/arm/mach-omap2/omap_hwmod.c | 40 ++++++++++++++++++++++++++++++++++++++ - 3 files changed, 66 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c -index 9033dd4..0fe3f14 100644 ---- a/arch/arm/mach-omap2/cminst44xx.c -+++ b/arch/arm/mach-omap2/cminst44xx.c -@@ -284,3 +284,28 @@ int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; - } - -+/** -+ * omap4_cminst_wait_module_idle - wait for a module to be in 'disabled' -+ * state -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in -+ * @inst: CM instance register offset (*_INST macro) -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) -+ * -+ * Wait for the module IDLEST to be disabled. Some PRCM transition, -+ * like reset assertion or parent clock de-activation must wait the -+ * module to be fully disabled. -+ */ -+int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) -+{ -+ int i = 0; -+ -+ if (!clkctrl_offs) -+ return 0; -+ -+ omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == -+ CLKCTRL_IDLEST_DISABLED), -+ MAX_MODULE_READY_TIME, i); -+ -+ return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; -+} -diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h -index 8eba2ae..a985400 100644 ---- a/arch/arm/mach-omap2/cminst44xx.h -+++ b/arch/arm/mach-omap2/cminst44xx.h -@@ -18,6 +18,7 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); - extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); - - extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); -+extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); - - /* - * In an ideal world, we would not export these low-level functions, -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 00241ea..d21f49b 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -1102,6 +1102,36 @@ static int _wait_target_ready(struct omap_hwmod *oh) - } - - /** -+ * _wait_target_disable - wait for a module to be disabled -+ * @oh: struct omap_hwmod * -+ * -+ * Wait for a module @oh to enter slave idle. Returns 0 if the module -+ * does not have an IDLEST bit or if the module successfully enters -+ * slave idle; otherwise, pass along the return value of the -+ * appropriate *_cm*_wait_module_idle() function. -+ */ -+static int _wait_target_disable(struct omap_hwmod *oh) -+{ -+ /* TODO: For now just handle OMAP4+ */ -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) -+ return 0; -+ -+ if (!oh) -+ return -EINVAL; -+ -+ if (oh->_int_flags & _HWMOD_NO_MPU_PORT) -+ return 0; -+ -+ if (oh->flags & HWMOD_NO_IDLEST) -+ return 0; -+ -+ return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, -+ oh->clkdm->cm_inst, -+ oh->clkdm->clkdm_offs, -+ oh->prcm.omap4.clkctrl_offs); -+} -+ -+/** - * _lookup_hardreset - fill register bit info for this hwmod/reset line - * @oh: struct omap_hwmod * - * @name: name of the reset line in the context of this hwmod -@@ -1410,6 +1440,8 @@ static int _enable(struct omap_hwmod *oh) - */ - static int _idle(struct omap_hwmod *oh) - { -+ int ret; -+ - pr_debug("omap_hwmod: %s: idling\n", oh->name); - - if (oh->_state != _HWMOD_STATE_ENABLED) { -@@ -1422,6 +1454,10 @@ static int _idle(struct omap_hwmod *oh) - _idle_sysc(oh); - _del_initiator_dep(oh, mpu_oh); - _disable_clocks(oh); -+ ret = _wait_target_disable(oh); -+ if (ret) -+ pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", -+ oh->name); - - /* Mux pins for device idle if populated */ - if (oh->mux && oh->mux->pads_dynamic) -@@ -1514,6 +1550,10 @@ static int _shutdown(struct omap_hwmod *oh) - _del_initiator_dep(oh, mpu_oh); - /* XXX what about the other system initiators here? dma, dsp */ - _disable_clocks(oh); -+ ret = _wait_target_disable(oh); -+ if (ret) -+ pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", -+ oh->name); - } - /* XXX Should this code also force-disable the optional clocks? */ - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute-address-with-of.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute-address-with-of.patch deleted file mode 100644 index d354899..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute-address-with-of.patch +++ /dev/null @@ -1,459 +0,0 @@ -From ab34edbd04746da7916e720ae1f07a981ab5a298 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:31 -0600 -Subject: [PATCH 081/149] OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros - -The RSTCTRL register was accessed using an absolute address. -The usage of hardcoded macros to calculate virtual address from physical -one should be avoided as much as possible. -The usage of an offset will allow future improvement like migration from -the current architecture code toward a module driver. - -Update prm_xxx accessors, move definition to the proper header file and -update copyrights. -Change the s16 register offset parameter to u16. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -[paul@pwsan.com: use '_prminst_' in function names that are part of the - prminst44xx.c file] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 19 ++++-- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 16 ++-- - arch/arm/mach-omap2/prm44xx.c | 93 +------------------------- - arch/arm/mach-omap2/prm44xx.h | 4 - - arch/arm/mach-omap2/prminst44xx.c | 93 +++++++++++++++++++++++++- - arch/arm/mach-omap2/prminst44xx.h | 10 +++- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 3 +- - 7 files changed, 125 insertions(+), 113 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index d21f49b..a0f7d31 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -149,6 +149,7 @@ - #include "cminst44xx.h" - #include "prm2xxx_3xxx.h" - #include "prm44xx.h" -+#include "prminst44xx.h" - #include "mux.h" - - /* Maximum microseconds to wait for OMAP module to softreset */ -@@ -1187,8 +1188,10 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) - return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, - ohri.rst_shift); - else if (cpu_is_omap44xx()) -- return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg, -- ohri.rst_shift); -+ return omap4_prminst_assert_hardreset(ohri.rst_shift, -+ oh->clkdm->pwrdm.ptr->prcm_partition, -+ oh->clkdm->pwrdm.ptr->prcm_offs, -+ oh->prcm.omap4.rstctrl_offs); - else - return -EINVAL; - } -@@ -1223,8 +1226,10 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) - if (ohri.st_shift) - pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", - oh->name, name); -- ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg, -- ohri.rst_shift); -+ ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, -+ oh->clkdm->pwrdm.ptr->prcm_partition, -+ oh->clkdm->pwrdm.ptr->prcm_offs, -+ oh->prcm.omap4.rstctrl_offs); - } else { - return -EINVAL; - } -@@ -1259,8 +1264,10 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name) - return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, - ohri.st_shift); - } else if (cpu_is_omap44xx()) { -- return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg, -- ohri.rst_shift); -+ return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, -+ oh->clkdm->pwrdm.ptr->prcm_partition, -+ oh->clkdm->pwrdm.ptr->prcm_offs, -+ oh->prcm.omap4.rstctrl_offs); - } else { - return -EINVAL; - } -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 00d7130..6a190f5 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -1144,7 +1144,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = { - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), - .prcm = { - .omap4 = { -- .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, -+ .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, - }, - }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -1161,7 +1161,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, -- .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, -+ .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, - }, - }, - .slaves = omap44xx_dsp_slaves, -@@ -2526,7 +2526,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), - .prcm = { - .omap4 = { -- .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, -+ .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, - }, - }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -2542,7 +2542,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), - .prcm = { - .omap4 = { -- .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, -+ .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, - }, - }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -2559,7 +2559,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, -- .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, -+ .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, - }, - }, - .slaves = omap44xx_ipu_slaves, -@@ -2726,7 +2726,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = { - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), - .prcm = { - .omap4 = { -- .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, -+ .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, - }, - }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -2742,7 +2742,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = { - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), - .prcm = { - .omap4 = { -- .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, -+ .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, - }, - }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -2759,7 +2759,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, -- .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, -+ .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, - }, - }, - .slaves = omap44xx_iva_slaves, -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c -index a2a04bf..faec860 100644 ---- a/arch/arm/mach-omap2/prm44xx.c -+++ b/arch/arm/mach-omap2/prm44xx.c -@@ -1,7 +1,7 @@ - /* - * OMAP4 PRM module functions - * -- * Copyright (C) 2010 Texas Instruments, Inc. -+ * Copyright (C) 2011 Texas Instruments, Inc. - * Copyright (C) 2010 Nokia Corporation - * Benoît Cousson - * Paul Walmsley -@@ -24,12 +24,6 @@ - #include "prm44xx.h" - #include "prm-regbits-44xx.h" - --/* -- * Address offset (in bytes) between the reset control and the reset -- * status registers: 4 bytes on OMAP4 -- */ --#define OMAP4_RST_CTRL_ST_OFFSET 4 -- - /* PRM low-level functions */ - - /* Read a register in a CM/PRM instance in the PRM module */ -@@ -94,91 +88,6 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) - return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); - } - --/** -- * omap4_prm_is_hardreset_asserted - read the HW reset line state of -- * submodules contained in the hwmod module -- * @rstctrl_reg: RM_RSTCTRL register address for this module -- * @shift: register bit shift corresponding to the reset line to check -- * -- * Returns 1 if the (sub)module hardreset line is currently asserted, -- * 0 if the (sub)module hardreset line is not currently asserted, or -- * -EINVAL upon parameter error. -- */ --int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift) --{ -- if (!cpu_is_omap44xx() || !rstctrl_reg) -- return -EINVAL; -- -- return omap4_prm_read_bits_shift(rstctrl_reg, (1 << shift)); --} -- --/** -- * omap4_prm_assert_hardreset - assert the HW reset line of a submodule -- * @rstctrl_reg: RM_RSTCTRL register address for this module -- * @shift: register bit shift corresponding to the reset line to assert -- * -- * Some IPs like dsp, ipu or iva contain processors that require an HW -- * reset line to be asserted / deasserted in order to fully enable the -- * IP. These modules may have multiple hard-reset lines that reset -- * different 'submodules' inside the IP block. This function will -- * place the submodule into reset. Returns 0 upon success or -EINVAL -- * upon an argument error. -- */ --int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift) --{ -- u32 mask; -- -- if (!cpu_is_omap44xx() || !rstctrl_reg) -- return -EINVAL; -- -- mask = 1 << shift; -- omap4_prm_rmw_reg_bits(mask, mask, rstctrl_reg); -- -- return 0; --} -- --/** -- * omap4_prm_deassert_hardreset - deassert a submodule hardreset line and wait -- * @rstctrl_reg: RM_RSTCTRL register address for this module -- * @shift: register bit shift corresponding to the reset line to deassert -- * -- * Some IPs like dsp, ipu or iva contain processors that require an HW -- * reset line to be asserted / deasserted in order to fully enable the -- * IP. These modules may have multiple hard-reset lines that reset -- * different 'submodules' inside the IP block. This function will -- * take the submodule out of reset and wait until the PRCM indicates -- * that the reset has completed before returning. Returns 0 upon success or -- * -EINVAL upon an argument error, -EEXIST if the submodule was already out -- * of reset, or -EBUSY if the submodule did not exit reset promptly. -- */ --int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift) --{ -- u32 mask; -- void __iomem *rstst_reg; -- int c; -- -- if (!cpu_is_omap44xx() || !rstctrl_reg) -- return -EINVAL; -- -- rstst_reg = rstctrl_reg + OMAP4_RST_CTRL_ST_OFFSET; -- -- mask = 1 << shift; -- -- /* Check the current status to avoid de-asserting the line twice */ -- if (omap4_prm_read_bits_shift(rstctrl_reg, mask) == 0) -- return -EEXIST; -- -- /* Clear the reset status by writing 1 to the status bit */ -- omap4_prm_rmw_reg_bits(0xffffffff, mask, rstst_reg); -- /* de-assert the reset control line */ -- omap4_prm_rmw_reg_bits(mask, 0, rstctrl_reg); -- /* wait the status to be set */ -- omap_test_timeout(omap4_prm_read_bits_shift(rstst_reg, mask), -- MAX_MODULE_HARDRESET_WAIT, c); -- -- return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; --} -- - void omap4_prm_global_warm_sw_reset(void) - { - u32 v; -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index 6e53120..3732e02 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -755,10 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); - extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); - extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); - --extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift); --extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift); --extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift); -- - extern void omap4_prm_global_warm_sw_reset(void); - - # endif -diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c -index a303242..35e02aa 100644 ---- a/arch/arm/mach-omap2/prminst44xx.c -+++ b/arch/arm/mach-omap2/prminst44xx.c -@@ -2,6 +2,7 @@ - * OMAP4 PRM instance functions - * - * Copyright (C) 2009 Nokia Corporation -+ * Copyright (C) 2011 Texas Instruments, Inc. - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify -@@ -53,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) - - /* Read-modify-write a register in PRM. Caller must lock */ - u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, -- s16 idx) -+ u16 idx) - { - u32 v; - -@@ -64,3 +65,93 @@ u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, - - return v; - } -+ -+/* -+ * Address offset (in bytes) between the reset control and the reset -+ * status registers: 4 bytes on OMAP4 -+ */ -+#define OMAP4_RST_CTRL_ST_OFFSET 4 -+ -+/** -+ * omap4_prminst_is_hardreset_asserted - read the HW reset line state of -+ * submodules contained in the hwmod module -+ * @rstctrl_reg: RM_RSTCTRL register address for this module -+ * @shift: register bit shift corresponding to the reset line to check -+ * -+ * Returns 1 if the (sub)module hardreset line is currently asserted, -+ * 0 if the (sub)module hardreset line is not currently asserted, or -+ * -EINVAL upon parameter error. -+ */ -+int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, -+ u16 rstctrl_offs) -+{ -+ u32 v; -+ -+ v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); -+ v &= 1 << shift; -+ v >>= shift; -+ -+ return v; -+} -+ -+/** -+ * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule -+ * @rstctrl_reg: RM_RSTCTRL register address for this module -+ * @shift: register bit shift corresponding to the reset line to assert -+ * -+ * Some IPs like dsp, ipu or iva contain processors that require an HW -+ * reset line to be asserted / deasserted in order to fully enable the -+ * IP. These modules may have multiple hard-reset lines that reset -+ * different 'submodules' inside the IP block. This function will -+ * place the submodule into reset. Returns 0 upon success or -EINVAL -+ * upon an argument error. -+ */ -+int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, -+ u16 rstctrl_offs) -+{ -+ u32 mask = 1 << shift; -+ -+ omap4_prminst_rmw_inst_reg_bits(mask, mask, part, inst, rstctrl_offs); -+ -+ return 0; -+} -+ -+/** -+ * omap4_prminst_deassert_hardreset - deassert a submodule hardreset line and -+ * wait -+ * @rstctrl_reg: RM_RSTCTRL register address for this module -+ * @shift: register bit shift corresponding to the reset line to deassert -+ * -+ * Some IPs like dsp, ipu or iva contain processors that require an HW -+ * reset line to be asserted / deasserted in order to fully enable the -+ * IP. These modules may have multiple hard-reset lines that reset -+ * different 'submodules' inside the IP block. This function will -+ * take the submodule out of reset and wait until the PRCM indicates -+ * that the reset has completed before returning. Returns 0 upon success or -+ * -EINVAL upon an argument error, -EEXIST if the submodule was already out -+ * of reset, or -EBUSY if the submodule did not exit reset promptly. -+ */ -+int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, -+ u16 rstctrl_offs) -+{ -+ int c; -+ u32 mask = 1 << shift; -+ u16 rstst_offs = rstctrl_offs + OMAP4_RST_CTRL_ST_OFFSET; -+ -+ /* Check the current status to avoid de-asserting the line twice */ -+ if (omap4_prminst_is_hardreset_asserted(shift, part, inst, -+ rstctrl_offs) == 0) -+ return -EEXIST; -+ -+ /* Clear the reset status by writing 1 to the status bit */ -+ omap4_prminst_rmw_inst_reg_bits(0xffffffff, mask, part, inst, -+ rstst_offs); -+ /* de-assert the reset control line */ -+ omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs); -+ /* wait the status to be set */ -+ omap_test_timeout(omap4_prminst_is_hardreset_asserted(shift, part, inst, -+ rstst_offs), -+ MAX_MODULE_HARDRESET_WAIT, c); -+ -+ return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; -+} -diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h -index 02dd66d..c14ae29 100644 ---- a/arch/arm/mach-omap2/prminst44xx.h -+++ b/arch/arm/mach-omap2/prminst44xx.h -@@ -2,6 +2,7 @@ - * OMAP4 Power/Reset Management (PRM) function prototypes - * - * Copyright (C) 2010 Nokia Corporation -+ * Copyright (C) 2011 Texas Instruments, Inc. - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify -@@ -18,8 +19,15 @@ - extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx); - extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); - extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, -- s16 inst, s16 idx); -+ s16 inst, u16 idx); - - extern void omap4_prm_global_warm_sw_reset(void); - -+extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, -+ u16 rstctrl_offs); -+extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, -+ u16 rstctrl_offs); -+extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, -+ u16 rstctrl_offs); -+ - #endif -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index fc54355..9ef4424 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -2,6 +2,7 @@ - * omap_hwmod macros, structures - * - * Copyright (C) 2009-2011 Nokia Corporation -+ * Copyright (C) 2011 Texas Instruments, Inc. - * Paul Walmsley - * - * Created in collaboration with (alphabetical order): Benoît Cousson, -@@ -361,7 +362,7 @@ struct omap_hwmod_omap2_prcm { - */ - struct omap_hwmod_omap4_prcm { - u16 clkctrl_offs; -- void __iomem *rstctrl_reg; -+ u16 rstctrl_offs; - u8 submodule_wkdep_bit; - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the-offset-bas.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the-offset-bas.patch deleted file mode 100644 index 74c8414..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the-offset-bas.patch +++ /dev/null @@ -1,125 +0,0 @@ -From 21fe73d93ffbba01a14a70664d4f79cb680d12c0 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:31 -0600 -Subject: [PATCH 082/149] OMAP4: prm: Replace warm reset API with the offset based version - -The warm reset function was still using the obsolete API. -Replace it by the new one and move the file to the proper c file. - -Change the function names to stick to the file convention as -suggested by Paul Walmsley <paul@pwsan.com>: -prm_xxx -> prminst_xxx - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/prcm.c | 2 +- - arch/arm/mach-omap2/prm44xx.c | 15 --------------- - arch/arm/mach-omap2/prm44xx.h | 2 -- - arch/arm/mach-omap2/prminst44xx.c | 19 +++++++++++++++++++ - arch/arm/mach-omap2/prminst44xx.h | 8 ++++---- - 5 files changed, 24 insertions(+), 22 deletions(-) - -diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c -index 6be1438..2e40a5c 100644 ---- a/arch/arm/mach-omap2/prcm.c -+++ b/arch/arm/mach-omap2/prcm.c -@@ -70,7 +70,7 @@ static void omap_prcm_arch_reset(char mode, const char *cmd) - prcm_offs = OMAP3430_GR_MOD; - omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); - } else if (cpu_is_omap44xx()) { -- omap4_prm_global_warm_sw_reset(); /* never returns */ -+ omap4_prminst_global_warm_sw_reset(); /* never returns */ - } else { - WARN_ON(1); - } -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c -index faec860..f815329 100644 ---- a/arch/arm/mach-omap2/prm44xx.c -+++ b/arch/arm/mach-omap2/prm44xx.c -@@ -87,18 +87,3 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) - { - return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); - } -- --void omap4_prm_global_warm_sw_reset(void) --{ -- u32 v; -- -- v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, -- OMAP4_RM_RSTCTRL); -- v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; -- omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST, -- OMAP4_RM_RSTCTRL); -- -- /* OCP barrier */ -- v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, -- OMAP4_RM_RSTCTRL); --} -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index 3732e02..725a6a8 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -755,8 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); - extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); - extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); - --extern void omap4_prm_global_warm_sw_reset(void); -- - # endif - - #endif -diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c -index 35e02aa..3a7bab1 100644 ---- a/arch/arm/mach-omap2/prminst44xx.c -+++ b/arch/arm/mach-omap2/prminst44xx.c -@@ -155,3 +155,22 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, - - return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; - } -+ -+ -+void omap4_prminst_global_warm_sw_reset(void) -+{ -+ u32 v; -+ -+ v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_DEVICE_INST, -+ OMAP4_PRM_RSTCTRL_OFFSET); -+ v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; -+ omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_DEVICE_INST, -+ OMAP4_PRM_RSTCTRL_OFFSET); -+ -+ /* OCP barrier */ -+ v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_DEVICE_INST, -+ OMAP4_PRM_RSTCTRL_OFFSET); -+} -diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h -index c14ae29..46f2efb 100644 ---- a/arch/arm/mach-omap2/prminst44xx.h -+++ b/arch/arm/mach-omap2/prminst44xx.h -@@ -21,13 +21,13 @@ extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); - extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, - s16 inst, u16 idx); - --extern void omap4_prm_global_warm_sw_reset(void); -+extern void omap4_prminst_global_warm_sw_reset(void); - - extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, -- u16 rstctrl_offs); -+ u16 rstctrl_offs); - extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, -- u16 rstctrl_offs); -+ u16 rstctrl_offs); - extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, -- u16 rstctrl_offs); -+ u16 rstctrl_offs); - - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch deleted file mode 100644 index 403764f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch +++ /dev/null @@ -1,81 +0,0 @@ -From fd94741b5ca1552a0c6e8c000f9f7530853862ea Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:31 -0600 -Subject: [PATCH 083/149] OMAP4: prm: Remove deprecated functions - -The new prminst_xxx accessors based on partition and offset -is now used, so removed all the previous prcm_xxx accessors. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -[paul@pwsan.com: remove fn prototypes also] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/prm44xx.c | 37 ------------------------------------- - arch/arm/mach-omap2/prm44xx.h | 4 ---- - 2 files changed, 0 insertions(+), 41 deletions(-) - -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c -index f815329..0016555 100644 ---- a/arch/arm/mach-omap2/prm44xx.c -+++ b/arch/arm/mach-omap2/prm44xx.c -@@ -50,40 +50,3 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) - - return v; - } -- --/* Read a PRM register, AND it, and shift the result down to bit 0 */ --/* XXX deprecated */ --u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) --{ -- u32 v; -- -- v = __raw_readl(reg); -- v &= mask; -- v >>= __ffs(mask); -- -- return v; --} -- --/* Read-modify-write a register in a PRM module. Caller must lock */ --/* XXX deprecated */ --u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) --{ -- u32 v; -- -- v = __raw_readl(reg); -- v &= ~mask; -- v |= bits; -- __raw_writel(v, reg); -- -- return v; --} -- --u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg) --{ -- return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg); --} -- --u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) --{ -- return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); --} -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index 725a6a8..7dfa379 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -750,10 +750,6 @@ - extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); - extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); - extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); --extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg); --extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); --extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); --extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); - - # endif - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context-register-offset.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context-register-offset.patch deleted file mode 100644 index f4e1889..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context-register-offset.patch +++ /dev/null @@ -1,630 +0,0 @@ -From 77eafa703d62b15f2e1021beb2f5437b6b2764ed Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:32 -0600 -Subject: [PATCH 084/149] OMAP4: hwmod data: Add PRM context register offset - -Add a 'context_offs' entry in the prcm.omap4 structure to all -IPs when applicable. -The offset will be used to retrieve the per module context lost -information now available on OMAP4. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 74 ++++++++++++++++++++++++++ - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + - 2 files changed, 75 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 6a190f5..d68ef2c 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -127,6 +127,7 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_dmm_slaves, -@@ -183,6 +184,7 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_emif_fw_slaves, -@@ -228,6 +230,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_l3_instr_slaves, -@@ -327,6 +330,7 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_l3_main_1_slaves, -@@ -428,6 +432,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_l3_main_2_slaves, -@@ -484,6 +489,7 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_l3_main_3_slaves, -@@ -575,6 +581,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_l4_cfg_slaves, -@@ -603,6 +610,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_l4_per_slaves, -@@ -631,6 +639,7 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_l4_wkup_slaves, -@@ -809,6 +818,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_aess_slaves, -@@ -899,6 +909,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_counter_32k_slaves, -@@ -983,6 +994,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET, - }, - }, - .dev_attr = &dma_dev_attr, -@@ -1077,6 +1089,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_dmic_slaves, -@@ -1162,6 +1175,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, - .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, -+ .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_dsp_slaves, -@@ -1250,6 +1264,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, - }, - }, - .opt_clks = dss_opt_clks, -@@ -1354,6 +1369,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, - }, - }, - .opt_clks = dss_dispc_opt_clks, -@@ -1452,6 +1468,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, - }, - }, - .opt_clks = dss_dsi1_opt_clks, -@@ -1529,6 +1546,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, - }, - }, - .opt_clks = dss_dsi2_opt_clks, -@@ -1626,6 +1644,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, - }, - }, - .opt_clks = dss_hdmi_opt_clks, -@@ -1717,6 +1736,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, - }, - }, - .opt_clks = dss_rfbi_opt_clks, -@@ -1787,6 +1807,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_dss_venc_slaves, -@@ -1866,6 +1887,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET, - }, - }, - .opt_clks = gpio1_opt_clks, -@@ -1920,6 +1942,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET, - }, - }, - .opt_clks = gpio2_opt_clks, -@@ -1974,6 +1997,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET, - }, - }, - .opt_clks = gpio3_opt_clks, -@@ -2028,6 +2052,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET, - }, - }, - .opt_clks = gpio4_opt_clks, -@@ -2082,6 +2107,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET, - }, - }, - .opt_clks = gpio5_opt_clks, -@@ -2136,6 +2162,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET, - }, - }, - .opt_clks = gpio6_opt_clks, -@@ -2215,6 +2242,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_hsi_slaves, -@@ -2298,6 +2326,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_i2c1_slaves, -@@ -2353,6 +2382,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_i2c2_slaves, -@@ -2408,6 +2438,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_i2c3_slaves, -@@ -2463,6 +2494,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_i2c4_slaves, -@@ -2560,6 +2592,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, - .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, -+ .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_ipu_slaves, -@@ -2646,6 +2679,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_CAM_ISS_CONTEXT_OFFSET, - }, - }, - .opt_clks = iss_opt_clks, -@@ -2760,6 +2794,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, - .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, -+ .context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_iva_slaves, -@@ -2830,6 +2865,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_kbd_slaves, -@@ -2895,6 +2931,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mailbox_slaves, -@@ -2988,6 +3025,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mcbsp1_slaves, -@@ -3062,6 +3100,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mcbsp2_slaves, -@@ -3136,6 +3175,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mcbsp3_slaves, -@@ -3189,6 +3229,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mcbsp4_slaves, -@@ -3282,6 +3323,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_PDM_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mcpdm_slaves, -@@ -3368,6 +3410,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET, - }, - }, - .dev_attr = &mcspi1_dev_attr, -@@ -3429,6 +3472,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET, - }, - }, - .dev_attr = &mcspi2_dev_attr, -@@ -3490,6 +3534,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET, - }, - }, - .dev_attr = &mcspi3_dev_attr, -@@ -3549,6 +3594,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET, - }, - }, - .dev_attr = &mcspi4_dev_attr, -@@ -3634,6 +3680,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET, - }, - }, - .dev_attr = &mmc1_dev_attr, -@@ -3694,6 +3741,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mmc2_slaves, -@@ -3749,6 +3797,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mmc3_slaves, -@@ -3803,6 +3852,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mmc4_slaves, -@@ -3856,6 +3906,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_mmc5_slaves, -@@ -3897,6 +3948,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET, - }, - }, - .masters = omap44xx_mpu_masters, -@@ -3971,6 +4023,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_smartreflex_core_slaves, -@@ -4018,6 +4071,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_smartreflex_iva_slaves, -@@ -4065,6 +4119,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_smartreflex_mpu_slaves, -@@ -4127,6 +4182,7 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_spinlock_slaves, -@@ -4211,6 +4267,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer1_slaves, -@@ -4257,6 +4314,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer2_slaves, -@@ -4303,6 +4361,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer3_slaves, -@@ -4349,6 +4408,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer4_slaves, -@@ -4414,6 +4474,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer5_slaves, -@@ -4480,6 +4541,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer6_slaves, -@@ -4545,6 +4607,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer7_slaves, -@@ -4610,6 +4673,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer8_slaves, -@@ -4656,6 +4720,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer9_slaves, -@@ -4702,6 +4767,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer10_slaves, -@@ -4748,6 +4814,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_timer11_slaves, -@@ -4823,6 +4890,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_uart1_slaves, -@@ -4876,6 +4944,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_uart2_slaves, -@@ -4930,6 +4999,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_uart3_slaves, -@@ -4983,6 +5053,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_uart4_slaves, -@@ -5062,6 +5133,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET, - }, - }, - .opt_clks = usb_otg_hs_opt_clks, -@@ -5135,6 +5207,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_wd_timer2_slaves, -@@ -5200,6 +5273,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, -+ .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, - }, - }, - .slaves = omap44xx_wd_timer3_slaves, -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index 9ef4424..16439fa 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -363,6 +363,7 @@ struct omap_hwmod_omap2_prcm { - struct omap_hwmod_omap4_prcm { - u16 clkctrl_offs; - u16 rstctrl_offs; -+ u16 context_offs; - u8 submodule_wkdep_bit; - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch deleted file mode 100644 index c752359..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch +++ /dev/null @@ -1,503 +0,0 @@ -From be3f7a2833bf720dcb60b40675a790024995ac27 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:32 -0600 -Subject: [PATCH 085/149] OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure - -Add a new field to provide the mode supported by the module. -The mode will control the way mandatory clocks are managed by the PRCM. - - 0 : Module is temporarily disabled by SW. OCP access to module are stalled. - Can be used to change timing parameter of GPMC module. - 1 : Module is managed automatically by HW according to clock domain - transition. A clock domain sleep transition put module into idle. - A wakeup domain transition put it back into function. - If CLKTRCTRL=3, any OCP access to module is always granted. - Module clocks may be gated according to the clock domain state. - 2 : Module is explicitly enabled. Interface clock (if not used for - functions) may be gated according to the clock domain state. - Functional clocks are guarantied to stay present. As long as - in this configuration, power domain sleep transition cannot happen. - -Some modules will have a modulemode initialized at 1 (HWCTRL) by default. -This is the case for interconnect and simple module like GPIO, WDT, MAILBOX. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 55 ++++++++++++++++++++++++++ - arch/arm/plat-omap/include/plat/omap_hwmod.h | 6 +++ - 2 files changed, 61 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index d68ef2c..6201422 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -231,6 +231,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .slaves = omap44xx_l3_instr_slaves, -@@ -490,6 +491,7 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .slaves = omap44xx_l3_main_3_slaves, -@@ -819,6 +821,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_aess_slaves, -@@ -1090,6 +1093,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_dmic_slaves, -@@ -1176,6 +1180,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { - .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, - .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, - .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .slaves = omap44xx_dsp_slaves, -@@ -1888,6 +1893,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .opt_clks = gpio1_opt_clks, -@@ -1943,6 +1949,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .opt_clks = gpio2_opt_clks, -@@ -1998,6 +2005,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .opt_clks = gpio3_opt_clks, -@@ -2053,6 +2061,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .opt_clks = gpio4_opt_clks, -@@ -2108,6 +2117,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .opt_clks = gpio5_opt_clks, -@@ -2163,6 +2173,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .opt_clks = gpio6_opt_clks, -@@ -2243,6 +2254,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .slaves = omap44xx_hsi_slaves, -@@ -2327,6 +2339,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_i2c1_slaves, -@@ -2383,6 +2396,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_i2c2_slaves, -@@ -2439,6 +2453,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_i2c3_slaves, -@@ -2495,6 +2510,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_i2c4_slaves, -@@ -2593,6 +2609,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { - .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, - .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, - .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .slaves = omap44xx_ipu_slaves, -@@ -2680,6 +2697,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_CAM_ISS_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .opt_clks = iss_opt_clks, -@@ -2795,6 +2813,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { - .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, - .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, - .context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .slaves = omap44xx_iva_slaves, -@@ -2866,6 +2885,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_kbd_slaves, -@@ -3026,6 +3046,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mcbsp1_slaves, -@@ -3101,6 +3122,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mcbsp2_slaves, -@@ -3176,6 +3198,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mcbsp3_slaves, -@@ -3230,6 +3253,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mcbsp4_slaves, -@@ -3324,6 +3348,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_PDM_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mcpdm_slaves, -@@ -3411,6 +3436,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &mcspi1_dev_attr, -@@ -3473,6 +3499,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &mcspi2_dev_attr, -@@ -3535,6 +3562,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &mcspi3_dev_attr, -@@ -3595,6 +3623,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &mcspi4_dev_attr, -@@ -3681,6 +3710,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &mmc1_dev_attr, -@@ -3742,6 +3772,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mmc2_slaves, -@@ -3798,6 +3829,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mmc3_slaves, -@@ -3853,6 +3885,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mmc4_slaves, -@@ -3907,6 +3940,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_mmc5_slaves, -@@ -4024,6 +4058,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_smartreflex_core_slaves, -@@ -4072,6 +4107,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_smartreflex_iva_slaves, -@@ -4120,6 +4156,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_smartreflex_mpu_slaves, -@@ -4268,6 +4305,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer1_slaves, -@@ -4315,6 +4353,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer2_slaves, -@@ -4362,6 +4401,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer3_slaves, -@@ -4409,6 +4449,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer4_slaves, -@@ -4475,6 +4516,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer5_slaves, -@@ -4542,6 +4584,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer6_slaves, -@@ -4608,6 +4651,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer7_slaves, -@@ -4674,6 +4718,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer8_slaves, -@@ -4721,6 +4766,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer9_slaves, -@@ -4768,6 +4814,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer10_slaves, -@@ -4815,6 +4862,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_timer11_slaves, -@@ -4891,6 +4939,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_uart1_slaves, -@@ -4945,6 +4994,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_uart2_slaves, -@@ -5000,6 +5050,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_uart3_slaves, -@@ -5054,6 +5105,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_uart4_slaves, -@@ -5134,6 +5186,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_HWCTRL, - }, - }, - .opt_clks = usb_otg_hs_opt_clks, -@@ -5208,6 +5261,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_wd_timer2_slaves, -@@ -5274,6 +5328,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, -+ .modulemode = MODULEMODE_SWCTRL, - }, - }, - .slaves = omap44xx_wd_timer3_slaves, -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index 16439fa..0e329ca 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -80,6 +80,11 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; - #define HWMOD_IDLEMODE_SMART (1 << 2) - #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) - -+/* modulemode control type (SW or HW) */ -+#define MODULEMODE_HWCTRL 1 -+#define MODULEMODE_SWCTRL 2 -+ -+ - /** - * struct omap_hwmod_mux_info - hwmod specific mux configuration - * @pads: array of omap_device_pad entries -@@ -365,6 +370,7 @@ struct omap_hwmod_omap4_prcm { - u16 rstctrl_offs; - u16 context_offs; - u8 submodule_wkdep_bit; -+ u8 modulemode; - }; - - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode-control.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode-control.patch deleted file mode 100644 index 86e8165..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode-control.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 3ef45618e396f3d9abb12fb4ef1c4462ccca6fd3 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:32 -0600 -Subject: [PATCH 086/149] OMAP4: cm: Add two new APIs for modulemode control - -In OMAP4, a new programming model based on module control instead -of clock control was introduced. -Expose two APIs to allow the upper layer (omap_hwmod) to control -the module mode independently of the parent clocks management. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -[paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; cleaned up - kerneldoc] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/cminst44xx.c | 40 ++++++++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/cminst44xx.h | 5 ++++ - 2 files changed, 45 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c -index 0fe3f14..eb2a472 100644 ---- a/arch/arm/mach-omap2/cminst44xx.c -+++ b/arch/arm/mach-omap2/cminst44xx.c -@@ -309,3 +309,43 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off - - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; - } -+ -+/** -+ * omap4_cminst_module_enable - Enable the modulemode inside CLKCTRL -+ * @mode: Module mode (SW or HW) -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in -+ * @inst: CM instance register offset (*_INST macro) -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) -+ * -+ * No return value. -+ */ -+void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, -+ u16 clkctrl_offs) -+{ -+ u32 v; -+ -+ v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); -+ v &= ~OMAP4430_MODULEMODE_MASK; -+ v |= mode << OMAP4430_MODULEMODE_SHIFT; -+ omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); -+} -+ -+/** -+ * omap4_cminst_module_disable - Disable the module inside CLKCTRL -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in -+ * @inst: CM instance register offset (*_INST macro) -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) -+ * -+ * No return value. -+ */ -+void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, -+ u16 clkctrl_offs) -+{ -+ u32 v; -+ -+ v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); -+ v &= ~OMAP4430_MODULEMODE_MASK; -+ omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); -+} -diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h -index a985400..f2ea645 100644 ---- a/arch/arm/mach-omap2/cminst44xx.h -+++ b/arch/arm/mach-omap2/cminst44xx.h -@@ -20,6 +20,11 @@ extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); - extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); - extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); - -+extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, -+ u16 clkctrl_offs); -+extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, -+ u16 clkctrl_offs); -+ - /* - * In an ideal world, we would not export these low-level functions, - * but this will probably take some time to fix properly --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module-control-in-hwmod-co.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module-control-in-hwmod-co.patch deleted file mode 100644 index 30b978e..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module-control-in-hwmod-co.patch +++ /dev/null @@ -1,129 +0,0 @@ -From a6647b2c4e9c1786df8dcb59595c3029f5a9f493 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:33 -0600 -Subject: [PATCH 087/149] OMAP4: hwmod: Introduce the module control in hwmod control - -Take advantage of the explicit modulemode control to fix -the way parents clocks are managed. -A module must be disabled before any parents are disabled. -That programming model was not possible with the previous -implementation that was considering a modulemode as a leaf -clock node managed by the clock fmwk. -This was leading to bad crash upon disable when the parent -clock was gated before the module completed its transition -to idle. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/omap_hwmod.c | 63 ++++++++++++++++++++++++++++++++++++- - 1 files changed, 61 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index a0f7d31..4424fee 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -680,6 +680,56 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) - } - - /** -+ * _enable_module - enable CLKCTRL modulemode on OMAP4 -+ * @oh: struct omap_hwmod * -+ * -+ * Enables the PRCM module mode related to the hwmod @oh. -+ * No return value. -+ */ -+static void _enable_module(struct omap_hwmod *oh) -+{ -+ /* The module mode does not exist prior OMAP4 */ -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) -+ return; -+ -+ if (!oh->clkdm || !oh->prcm.omap4.modulemode) -+ return; -+ -+ pr_debug("omap_hwmod: %s: _enable_module: %d\n", -+ oh->name, oh->prcm.omap4.modulemode); -+ -+ omap4_cminst_module_enable(oh->prcm.omap4.modulemode, -+ oh->clkdm->prcm_partition, -+ oh->clkdm->cm_inst, -+ oh->clkdm->clkdm_offs, -+ oh->prcm.omap4.clkctrl_offs); -+} -+ -+/** -+ * _disable_module - enable CLKCTRL modulemode on OMAP4 -+ * @oh: struct omap_hwmod * -+ * -+ * Disable the PRCM module mode related to the hwmod @oh. -+ * No return value. -+ */ -+static void _disable_module(struct omap_hwmod *oh) -+{ -+ /* The module mode does not exist prior OMAP4 */ -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) -+ return; -+ -+ if (!oh->clkdm || !oh->prcm.omap4.modulemode) -+ return; -+ -+ pr_debug("omap_hwmod: %s: _disable_module\n", oh->name); -+ -+ omap4_cminst_module_disable(oh->clkdm->prcm_partition, -+ oh->clkdm->cm_inst, -+ oh->clkdm->clkdm_offs, -+ oh->prcm.omap4.clkctrl_offs); -+} -+ -+/** - * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh - * @oh: struct omap_hwmod *oh - * -@@ -1424,6 +1474,7 @@ static int _enable(struct omap_hwmod *oh) - - return r; - } -+ _enable_module(oh); - - oh->_state = _HWMOD_STATE_ENABLED; - -@@ -1460,11 +1511,18 @@ static int _idle(struct omap_hwmod *oh) - if (oh->class->sysc) - _idle_sysc(oh); - _del_initiator_dep(oh, mpu_oh); -- _disable_clocks(oh); -+ _disable_module(oh); - ret = _wait_target_disable(oh); - if (ret) - pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", - oh->name); -+ /* -+ * The module must be in idle mode before disabling any parents -+ * clocks. Otherwise, the parent clock might be disabled before -+ * the module transition is done, and thus will prevent the -+ * transition to complete properly. -+ */ -+ _disable_clocks(oh); - - /* Mux pins for device idle if populated */ - if (oh->mux && oh->mux->pads_dynamic) -@@ -1556,11 +1614,12 @@ static int _shutdown(struct omap_hwmod *oh) - if (oh->_state == _HWMOD_STATE_ENABLED) { - _del_initiator_dep(oh, mpu_oh); - /* XXX what about the other system initiators here? dma, dsp */ -- _disable_clocks(oh); -+ _disable_module(oh); - ret = _wait_target_disable(oh); - if (ret) - pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", - oh->name); -+ _disable_clocks(oh); - } - /* XXX Should this code also force-disable the optional clocks? */ - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant-call-to-pwrdm_wait.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant-call-to-pwrdm_wait.patch deleted file mode 100644 index 9958651..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant-call-to-pwrdm_wait.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 376dd007bae9fdcad06c5231c05ab2ca92639579 Mon Sep 17 00:00:00 2001 -From: Vaibhav Bedia <vaibhav.bedia@ti.com> -Date: Sun, 10 Jul 2011 05:56:53 -0600 -Subject: [PATCH 088/149] OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition() - -The call to pwrdm_wait_transition() in clkdm_clk_enable() -is redundant since the function pwrdm_clkdm_state_switch() -which is called next also does the same thing. - -Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clockdomain.c | 1 - - 1 files changed, 0 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c -index 6cb6c03..4fbbbfc 100644 ---- a/arch/arm/mach-omap2/clockdomain.c -+++ b/arch/arm/mach-omap2/clockdomain.c -@@ -834,7 +834,6 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) - clk->name); - - arch_clkdm->clkdm_clk_enable(clkdm); -- pwrdm_wait_transition(clkdm->pwrdm.ptr); - pwrdm_clkdm_state_switch(clkdm); - - return 0; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to-control-clockdomain-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to-control-clockdomain-.patch deleted file mode 100644 index 3d47851..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to-control-clockdomain-.patch +++ /dev/null @@ -1,231 +0,0 @@ -From 4cf6b3a535c5e63c4808733c170a68990e45afa2 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Sun, 10 Jul 2011 05:56:54 -0600 -Subject: [PATCH 089/149] OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework - -Duplicate the existing API for clockdomain enable from clock to enable -a clock domain from hwmod framework. -This will be needed when the hwmod framework will move from the current -clock centric approach to the module based approach. - -These APIs are returning 0 for the moment for OMAP2 and OMAP3 until -their hwmods are updated with the clksm attribute. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Kevin Hilman <khilman@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clockdomain.c | 142 +++++++++++++++++++++++++++--------- - arch/arm/mach-omap2/clockdomain.h | 3 + - 2 files changed, 109 insertions(+), 36 deletions(-) - -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c -index 4fbbbfc..5a57de5 100644 ---- a/arch/arm/mach-omap2/clockdomain.c -+++ b/arch/arm/mach-omap2/clockdomain.c -@@ -796,7 +796,50 @@ void clkdm_deny_idle(struct clockdomain *clkdm) - } - - --/* Clockdomain-to-clock framework interface code */ -+/* Clockdomain-to-clock/hwmod framework interface code */ -+ -+static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) -+{ -+ if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) -+ return -EINVAL; -+ -+ /* -+ * For arch's with no autodeps, clkcm_clk_enable -+ * should be called for every clock instance or hwmod that is -+ * enabled, so the clkdm can be force woken up. -+ */ -+ if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) -+ return 0; -+ -+ arch_clkdm->clkdm_clk_enable(clkdm); -+ pwrdm_wait_transition(clkdm->pwrdm.ptr); -+ pwrdm_clkdm_state_switch(clkdm); -+ -+ pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); -+ -+ return 0; -+} -+ -+static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) -+{ -+ if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) -+ return -EINVAL; -+ -+ if (atomic_read(&clkdm->usecount) == 0) { -+ WARN_ON(1); /* underflow */ -+ return -ERANGE; -+ } -+ -+ if (atomic_dec_return(&clkdm->usecount) > 0) -+ return 0; -+ -+ arch_clkdm->clkdm_clk_disable(clkdm); -+ pwrdm_clkdm_state_switch(clkdm); -+ -+ pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); -+ -+ return 0; -+} - - /** - * clkdm_clk_enable - add an enabled downstream clock to this clkdm -@@ -819,24 +862,10 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) - * downstream clocks for debugging purposes? - */ - -- if (!clkdm || !clk) -+ if (!clk) - return -EINVAL; - -- if (!arch_clkdm || !arch_clkdm->clkdm_clk_enable) -- return -EINVAL; -- -- if (atomic_inc_return(&clkdm->usecount) > 1) -- return 0; -- -- /* Clockdomain now has one enabled downstream clock */ -- -- pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name, -- clk->name); -- -- arch_clkdm->clkdm_clk_enable(clkdm); -- pwrdm_clkdm_state_switch(clkdm); -- -- return 0; -+ return _clkdm_clk_hwmod_enable(clkdm); - } - - /** -@@ -849,9 +878,8 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) - * clockdomain usecount goes to 0, put the clockdomain to sleep - * (software-supervised mode) or remove the clkdm autodependencies - * (hardware-supervised mode). Returns -EINVAL if passed null -- * pointers; -ERANGE if the @clkdm usecount underflows and debugging -- * is enabled; or returns 0 upon success or if the clockdomain is in -- * hwsup idle mode. -+ * pointers; -ERANGE if the @clkdm usecount underflows; or returns 0 -+ * upon success or if the clockdomain is in hwsup idle mode. - */ - int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) - { -@@ -860,30 +888,72 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) - * downstream clocks for debugging purposes? - */ - -- if (!clkdm || !clk) -+ if (!clk) - return -EINVAL; - -- if (!arch_clkdm || !arch_clkdm->clkdm_clk_disable) -+ return _clkdm_clk_hwmod_disable(clkdm); -+} -+ -+/** -+ * clkdm_hwmod_enable - add an enabled downstream hwmod to this clkdm -+ * @clkdm: struct clockdomain * -+ * @oh: struct omap_hwmod * of the enabled downstream hwmod -+ * -+ * Increment the usecount of the clockdomain @clkdm and ensure that it -+ * is awake before @oh is enabled. Intended to be called by -+ * module_enable() code. -+ * If the clockdomain is in software-supervised idle mode, force the -+ * clockdomain to wake. If the clockdomain is in hardware-supervised idle -+ * mode, add clkdm-pwrdm autodependencies, to ensure that devices in the -+ * clockdomain can be read from/written to by on-chip processors. -+ * Returns -EINVAL if passed null pointers; -+ * returns 0 upon success or if the clockdomain is in hwsup idle mode. -+ */ -+int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh) -+{ -+ /* The clkdm attribute does not exist yet prior OMAP4 */ -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) -+ return 0; -+ -+ /* -+ * XXX Rewrite this code to maintain a list of enabled -+ * downstream hwmods for debugging purposes? -+ */ -+ -+ if (!oh) - return -EINVAL; - --#ifdef DEBUG -- if (atomic_read(&clkdm->usecount) == 0) { -- WARN_ON(1); /* underflow */ -- return -ERANGE; -- } --#endif -+ return _clkdm_clk_hwmod_enable(clkdm); -+} - -- if (atomic_dec_return(&clkdm->usecount) > 0) -+/** -+ * clkdm_hwmod_disable - remove an enabled downstream hwmod from this clkdm -+ * @clkdm: struct clockdomain * -+ * @oh: struct omap_hwmod * of the disabled downstream hwmod -+ * -+ * Decrement the usecount of this clockdomain @clkdm when @oh is -+ * disabled. Intended to be called by module_disable() code. -+ * If the clockdomain usecount goes to 0, put the clockdomain to sleep -+ * (software-supervised mode) or remove the clkdm autodependencies -+ * (hardware-supervised mode). -+ * Returns -EINVAL if passed null pointers; -ERANGE if the @clkdm usecount -+ * underflows; or returns 0 upon success or if the clockdomain is in hwsup -+ * idle mode. -+ */ -+int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh) -+{ -+ /* The clkdm attribute does not exist yet prior OMAP4 */ -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) - return 0; - -- /* All downstream clocks of this clockdomain are now disabled */ -- -- pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name, -- clk->name); -+ /* -+ * XXX Rewrite this code to maintain a list of enabled -+ * downstream hwmods for debugging purposes? -+ */ - -- arch_clkdm->clkdm_clk_disable(clkdm); -- pwrdm_clkdm_state_switch(clkdm); -+ if (!oh) -+ return -EINVAL; - -- return 0; -+ return _clkdm_clk_hwmod_disable(clkdm); - } - -diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h -index 5823584..8e0da64 100644 ---- a/arch/arm/mach-omap2/clockdomain.h -+++ b/arch/arm/mach-omap2/clockdomain.h -@@ -20,6 +20,7 @@ - - #include "powerdomain.h" - #include <plat/clock.h> -+#include <plat/omap_hwmod.h> - #include <plat/cpu.h> - - /* -@@ -183,6 +184,8 @@ int clkdm_sleep(struct clockdomain *clkdm); - - int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); - int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); -+int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh); -+int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh); - - extern void __init omap2xxx_clockdomains_init(void); - extern void __init omap3xxx_clockdomains_init(void); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch deleted file mode 100644 index edbaf6d..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch +++ /dev/null @@ -1,141 +0,0 @@ -From b1090dd5eb9e242f8426169718fd7241c025c1a2 Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sun, 10 Jul 2011 05:56:54 -0600 -Subject: [PATCH 090/149] OMAP2+: clockdomain: add clkdm_in_hwsup() -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add a new function, clkdm_in_hwsup(), that returns true if a clockdomain -is configured for hardware-supervised idle. It does not actually read the -hardware; rather, it checks an internal flag in the struct clockdomain, which -is changed when the clockdomain is switched in and out of hardware-supervised -idle. This should be safe, since all changes to the idle mode should -pass through the clockdomain code. - -Based on a set of patches by Rajendra Nayak <rnayak@ti.com> which do -the same thing by checking the hardware bits. This approach should be -faster and more compact. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> -Cc: Rajendra Nayak <rnayak@ti.com> -Cc: Todd Poynor <toddpoynor@google.com> -Cc: Benoît Cousson <b-cousson@ti.com> ---- - arch/arm/mach-omap2/clockdomain.c | 30 ++++++++++++++++++++++++++++-- - arch/arm/mach-omap2/clockdomain.h | 6 ++++++ - 2 files changed, 34 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c -index 5a57de5..239b558 100644 ---- a/arch/arm/mach-omap2/clockdomain.c -+++ b/arch/arm/mach-omap2/clockdomain.c -@@ -1,8 +1,8 @@ - /* - * OMAP2/3/4 clockdomain framework functions - * -- * Copyright (C) 2008-2010 Texas Instruments, Inc. -- * Copyright (C) 2008-2010 Nokia Corporation -+ * Copyright (C) 2008-2011 Texas Instruments, Inc. -+ * Copyright (C) 2008-2011 Nokia Corporation - * - * Written by Paul Walmsley and Jouni Högander - * Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com> -@@ -704,6 +704,8 @@ int clkdm_sleep(struct clockdomain *clkdm) - - pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); - -+ clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; -+ - return arch_clkdm->clkdm_sleep(clkdm); - } - -@@ -732,6 +734,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) - - pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); - -+ clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; -+ - return arch_clkdm->clkdm_wakeup(clkdm); - } - -@@ -762,6 +766,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) - pr_debug("clockdomain: enabling automatic idle transitions for %s\n", - clkdm->name); - -+ clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; -+ - arch_clkdm->clkdm_allow_idle(clkdm); - pwrdm_clkdm_state_switch(clkdm); - } -@@ -792,9 +798,29 @@ void clkdm_deny_idle(struct clockdomain *clkdm) - pr_debug("clockdomain: disabling automatic idle transitions for %s\n", - clkdm->name); - -+ clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; -+ - arch_clkdm->clkdm_deny_idle(clkdm); - } - -+/** -+ * clkdm_in_hwsup - is clockdomain @clkdm have hardware-supervised idle enabled? -+ * @clkdm: struct clockdomain * -+ * -+ * Returns true if clockdomain @clkdm currently has -+ * hardware-supervised idle enabled, or false if it does not or if -+ * @clkdm is NULL. It is only valid to call this function after -+ * clkdm_init() has been called. This function does not actually read -+ * bits from the hardware; it instead tests an in-memory flag that is -+ * changed whenever the clockdomain code changes the auto-idle mode. -+ */ -+bool clkdm_in_hwsup(struct clockdomain *clkdm) -+{ -+ if (!clkdm) -+ return false; -+ -+ return (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; -+} - - /* Clockdomain-to-clock/hwmod framework interface code */ - -diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h -index 8e0da64..8782a5c 100644 ---- a/arch/arm/mach-omap2/clockdomain.h -+++ b/arch/arm/mach-omap2/clockdomain.h -@@ -83,6 +83,9 @@ struct clkdm_dep { - const struct omap_chip_id omap_chip; - }; - -+/* Possible flags for struct clockdomain._flags */ -+#define _CLKDM_FLAG_HWSUP_ENABLED BIT(0) -+ - /** - * struct clockdomain - OMAP clockdomain - * @name: clockdomain name -@@ -90,6 +93,7 @@ struct clkdm_dep { - * @clktrctrl_reg: CLKSTCTRL reg for the given clock domain - * @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg - * @flags: Clockdomain capability flags -+ * @_flags: Flags for use only by internal clockdomain code - * @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit - * @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers - * @cm_inst: (OMAP4 only) CM instance register offset -@@ -114,6 +118,7 @@ struct clockdomain { - } pwrdm; - const u16 clktrctrl_mask; - const u8 flags; -+ u8 _flags; - const u8 dep_bit; - const u8 prcm_partition; - const s16 cm_inst; -@@ -178,6 +183,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm); - - void clkdm_allow_idle(struct clockdomain *clkdm); - void clkdm_deny_idle(struct clockdomain *clkdm); -+bool clkdm_in_hwsup(struct clockdomain *clkdm); - - int clkdm_wakeup(struct clockdomain *clkdm); - int clkdm_sleep(struct clockdomain *clkdm); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch deleted file mode 100644 index 91d4e67..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch +++ /dev/null @@ -1,53 +0,0 @@ -From bc09c0fe93e874df8fcfd68f31302330646cbf24 Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Sun, 10 Jul 2011 05:56:54 -0600 -Subject: [PATCH 091/149] OMAP2+: PM: idle clkdms only if already in idle - -The omap_set_pwrdm_state function forces clockdomains -to idle, without checking the existing idle state -programmed, instead based solely on the HW capability -of the clockdomain to support idle. -This is wrong and the clockdomains should be idled -post a state_switch *only* if idle transitions on the -clockdomain were already enabled. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Acked-by: Kevin Hilman <khilman@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/pm.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c -index d48813f..3feb359 100644 ---- a/arch/arm/mach-omap2/pm.c -+++ b/arch/arm/mach-omap2/pm.c -@@ -108,6 +108,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) - u32 cur_state; - int sleep_switch = -1; - int ret = 0; -+ int hwsup = 0; - - if (pwrdm == NULL || IS_ERR(pwrdm)) - return -EINVAL; -@@ -127,6 +128,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) - (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { - sleep_switch = LOWPOWERSTATE_SWITCH; - } else { -+ hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); - clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); - pwrdm_wait_transition(pwrdm); - sleep_switch = FORCEWAKEUP_SWITCH; -@@ -142,7 +144,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) - - switch (sleep_switch) { - case FORCEWAKEUP_SWITCH: -- if (pwrdm->pwrdm_clkdms[0]->flags & CLKDM_CAN_ENABLE_AUTO) -+ if (hwsup) - clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); - else - clkdm_sleep(pwrdm->pwrdm_clkdms[0]); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch deleted file mode 100644 index d5c7deb..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch +++ /dev/null @@ -1,264 +0,0 @@ -From 9dbc6c631f27b1e6ed6b058b8d3e57b2398b2d3b Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Sun, 10 Jul 2011 05:56:55 -0600 -Subject: [PATCH 092/149] OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming - -Since the clkdm state programming is now done from within the hwmod -framework (which uses a per-hwmod lock) instead of the being done -from the clock framework (which used a global lock), there is now a -need to have per-clkdm locking to prevent races between different -hwmods/modules belonging to the same clock domain concurrently -programming the clkdm state. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clockdomain.c | 47 +++++++++++++++++++++++---- - arch/arm/mach-omap2/clockdomain.h | 2 + - arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 6 ++- - arch/arm/mach-omap2/clockdomain44xx.c | 13 ++----- - 4 files changed, 50 insertions(+), 18 deletions(-) - -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c -index 239b558..ab7db08 100644 ---- a/arch/arm/mach-omap2/clockdomain.c -+++ b/arch/arm/mach-omap2/clockdomain.c -@@ -92,6 +92,8 @@ static int _clkdm_register(struct clockdomain *clkdm) - - pwrdm_add_clkdm(pwrdm, clkdm); - -+ spin_lock_init(&clkdm->lock); -+ - pr_debug("clockdomain: registered %s\n", clkdm->name); - - return 0; -@@ -690,6 +692,9 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) - */ - int clkdm_sleep(struct clockdomain *clkdm) - { -+ int ret; -+ unsigned long flags; -+ - if (!clkdm) - return -EINVAL; - -@@ -704,9 +709,11 @@ int clkdm_sleep(struct clockdomain *clkdm) - - pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); - -+ spin_lock_irqsave(&clkdm->lock, flags); - clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; -- -- return arch_clkdm->clkdm_sleep(clkdm); -+ ret = arch_clkdm->clkdm_sleep(clkdm); -+ spin_unlock_irqrestore(&clkdm->lock, flags); -+ return ret; - } - - /** -@@ -720,6 +727,9 @@ int clkdm_sleep(struct clockdomain *clkdm) - */ - int clkdm_wakeup(struct clockdomain *clkdm) - { -+ int ret; -+ unsigned long flags; -+ - if (!clkdm) - return -EINVAL; - -@@ -734,9 +744,11 @@ int clkdm_wakeup(struct clockdomain *clkdm) - - pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); - -+ spin_lock_irqsave(&clkdm->lock, flags); - clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; -- -- return arch_clkdm->clkdm_wakeup(clkdm); -+ ret = arch_clkdm->clkdm_wakeup(clkdm); -+ spin_unlock_irqrestore(&clkdm->lock, flags); -+ return ret; - } - - /** -@@ -751,6 +763,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) - */ - void clkdm_allow_idle(struct clockdomain *clkdm) - { -+ unsigned long flags; -+ - if (!clkdm) - return; - -@@ -766,10 +780,11 @@ void clkdm_allow_idle(struct clockdomain *clkdm) - pr_debug("clockdomain: enabling automatic idle transitions for %s\n", - clkdm->name); - -+ spin_lock_irqsave(&clkdm->lock, flags); - clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; -- - arch_clkdm->clkdm_allow_idle(clkdm); - pwrdm_clkdm_state_switch(clkdm); -+ spin_unlock_irqrestore(&clkdm->lock, flags); - } - - /** -@@ -783,6 +798,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) - */ - void clkdm_deny_idle(struct clockdomain *clkdm) - { -+ unsigned long flags; -+ - if (!clkdm) - return; - -@@ -798,9 +815,10 @@ void clkdm_deny_idle(struct clockdomain *clkdm) - pr_debug("clockdomain: disabling automatic idle transitions for %s\n", - clkdm->name); - -+ spin_lock_irqsave(&clkdm->lock, flags); - clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; -- - arch_clkdm->clkdm_deny_idle(clkdm); -+ spin_unlock_irqrestore(&clkdm->lock, flags); - } - - /** -@@ -816,16 +834,25 @@ void clkdm_deny_idle(struct clockdomain *clkdm) - */ - bool clkdm_in_hwsup(struct clockdomain *clkdm) - { -+ bool ret; -+ unsigned long flags; -+ - if (!clkdm) - return false; - -- return (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; -+ spin_lock_irqsave(&clkdm->lock, flags); -+ ret = (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; -+ spin_unlock_irqrestore(&clkdm->lock, flags); -+ -+ return ret; - } - - /* Clockdomain-to-clock/hwmod framework interface code */ - - static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) - { -+ unsigned long flags; -+ - if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) - return -EINVAL; - -@@ -837,9 +864,11 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) - if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) - return 0; - -+ spin_lock_irqsave(&clkdm->lock, flags); - arch_clkdm->clkdm_clk_enable(clkdm); - pwrdm_wait_transition(clkdm->pwrdm.ptr); - pwrdm_clkdm_state_switch(clkdm); -+ spin_unlock_irqrestore(&clkdm->lock, flags); - - pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); - -@@ -848,6 +877,8 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) - - static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) - { -+ unsigned long flags; -+ - if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) - return -EINVAL; - -@@ -859,8 +890,10 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) - if (atomic_dec_return(&clkdm->usecount) > 0) - return 0; - -+ spin_lock_irqsave(&clkdm->lock, flags); - arch_clkdm->clkdm_clk_disable(clkdm); - pwrdm_clkdm_state_switch(clkdm); -+ spin_unlock_irqrestore(&clkdm->lock, flags); - - pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); - -diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h -index 8782a5c..1e50c88 100644 ---- a/arch/arm/mach-omap2/clockdomain.h -+++ b/arch/arm/mach-omap2/clockdomain.h -@@ -17,6 +17,7 @@ - #define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H - - #include <linux/init.h> -+#include <linux/spinlock.h> - - #include "powerdomain.h" - #include <plat/clock.h> -@@ -128,6 +129,7 @@ struct clockdomain { - const struct omap_chip_id omap_chip; - atomic_t usecount; - struct list_head node; -+ spinlock_t lock; - }; - - /** -diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c -index 48d0db7..f740edb 100644 ---- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c -+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c -@@ -183,7 +183,8 @@ static int omap2_clkdm_clk_enable(struct clockdomain *clkdm) - _clkdm_add_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { -- clkdm_wakeup(clkdm); -+ if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) -+ omap2_clkdm_wakeup(clkdm); - } - - return 0; -@@ -205,7 +206,8 @@ static int omap2_clkdm_clk_disable(struct clockdomain *clkdm) - _clkdm_del_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { -- clkdm_sleep(clkdm); -+ if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) -+ omap2_clkdm_sleep(clkdm); - } - - return 0; -diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c -index a1a4ecd..b43706a 100644 ---- a/arch/arm/mach-omap2/clockdomain44xx.c -+++ b/arch/arm/mach-omap2/clockdomain44xx.c -@@ -95,13 +95,8 @@ static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) - - static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) - { -- bool hwsup = false; -- -- hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, -- clkdm->cm_inst, clkdm->clkdm_offs); -- -- if (!hwsup) -- clkdm_wakeup(clkdm); -+ if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) -+ return omap4_clkdm_wakeup(clkdm); - - return 0; - } -@@ -113,8 +108,8 @@ static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) - hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - -- if (!hwsup) -- clkdm_sleep(clkdm); -+ if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) -+ omap4_clkdm_sleep(clkdm); - - return 0; - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to-prevent.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to-prevent.patch deleted file mode 100644 index 3870fd3..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to-prevent.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 7d9356a5f4f67150d793d6be8592ea23b0692d81 Mon Sep 17 00:00:00 2001 -From: Paul Walmsley <paul@pwsan.com> -Date: Sun, 10 Jul 2011 05:57:06 -0600 -Subject: [PATCH 093/149] OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The OMAP2/3 clock code was written to notify the clockdomain code when -the first clock in a clockdomain is enabled and when the last enabled -clock in a clockdomain is disabled. OMAP4 requires a different -approach: the hwmod code needs to signal the clockdomain code when to -force-enable and auto-idle a clockdomain during the IP block enable -process. The current conjecture is that once that hwmod sequence is -implemented, it will no longer be necessary for the clock code to call -into the clockdomain code for "optional clocks" on OMAP4. - -Add a static flag to the OMAP2+ clock code, clkdm_control, that by -default preserves the OMAP2/3 behavior. Also add a function, -omap2_clk_disable_clkdm_control(), intended to be called from OMAP4 -and beyond clock initcalls, that disables the old behavior. - -Part of this patch was originally based on a patch by Rajendra Nayak -<rnayak@ti.com>. - -Signed-off-by: Paul Walmsley <paul@pwsan.com> -Cc: Benoît Cousson <b-cousson@ti.com> -Cc: Rajendra Nayak <rnayak@ti.com> ---- - arch/arm/mach-omap2/clock.c | 27 ++++++++++++++++++++++++--- - arch/arm/mach-omap2/clock.h | 3 +++ - 2 files changed, 27 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c -index 180299e..fc84576 100644 ---- a/arch/arm/mach-omap2/clock.c -+++ b/arch/arm/mach-omap2/clock.c -@@ -38,6 +38,14 @@ - u8 cpu_mask; - - /* -+ * clkdm_control: if true, then when a clock is enabled in the -+ * hardware, its clockdomain will first be enabled; and when a clock -+ * is disabled in the hardware, its clockdomain will be disabled -+ * afterwards. -+ */ -+static bool clkdm_control = true; -+ -+/* - * OMAP2+ specific clock functions - */ - -@@ -100,6 +108,19 @@ void omap2_init_clk_clkdm(struct clk *clk) - } - - /** -+ * omap2_clk_disable_clkdm_control - disable clkdm control on clk enable/disable -+ * -+ * Prevent the OMAP clock code from calling into the clockdomain code -+ * when a hardware clock in that clockdomain is enabled or disabled. -+ * Intended to be called at init time from omap*_clk_init(). No -+ * return value. -+ */ -+void __init omap2_clk_disable_clkdm_control(void) -+{ -+ clkdm_control = false; -+} -+ -+/** - * omap2_clk_dflt_find_companion - find companion clock to @clk - * @clk: struct clk * to find the companion clock of - * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in -@@ -268,7 +289,7 @@ void omap2_clk_disable(struct clk *clk) - clk->ops->disable(clk); - } - -- if (clk->clkdm) -+ if (clkdm_control && clk->clkdm) - clkdm_clk_disable(clk->clkdm, clk); - - if (clk->parent) -@@ -308,7 +329,7 @@ int omap2_clk_enable(struct clk *clk) - } - } - -- if (clk->clkdm) { -+ if (clkdm_control && clk->clkdm) { - ret = clkdm_clk_enable(clk->clkdm, clk); - if (ret) { - WARN(1, "clock: %s: could not enable clockdomain %s: " -@@ -330,7 +351,7 @@ int omap2_clk_enable(struct clk *clk) - return 0; - - oce_err3: -- if (clk->clkdm) -+ if (clkdm_control && clk->clkdm) - clkdm_clk_disable(clk->clkdm, clk); - oce_err2: - if (clk->parent) -diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h -index e10ff2b..48ac568 100644 ---- a/arch/arm/mach-omap2/clock.h -+++ b/arch/arm/mach-omap2/clock.h -@@ -16,6 +16,8 @@ - #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H - #define __ARCH_ARM_MACH_OMAP2_CLOCK_H - -+#include <linux/kernel.h> -+ - #include <plat/clock.h> - - /* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */ -@@ -72,6 +74,7 @@ void omap2_clk_disable_unused(struct clk *clk); - #endif - - void omap2_init_clk_clkdm(struct clk *clk); -+void __init omap2_clk_disable_clkdm_control(void); - - /* clkt_clksel.c public functions */ - u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended-PRCM-module-enabl.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended-PRCM-module-enabl.patch deleted file mode 100644 index 4de90a8..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended-PRCM-module-enabl.patch +++ /dev/null @@ -1,173 +0,0 @@ -From 2a443d7ec48bdaa17f80fbffd82cd11d858d3655 Mon Sep 17 00:00:00 2001 -From: Rajendra Nayak <rnayak@ti.com> -Date: Sun, 10 Jul 2011 05:57:07 -0600 -Subject: [PATCH 094/149] OMAP2+: hwmod: Follow the recommended PRCM module enable sequence - -On OMAP4, the PRCM recommended sequence for enabling -a module after power-on-reset is: --1- Force clkdm to SW_WKUP --2- Enabling the clocks --3- Configure desired module mode to "enable" or "auto" --4- Wait for the desired module idle status to be FUNC --5- Program clkdm in HW_AUTO(if supported) - -This sequence applies to all older OMAPs' as well, -however since they use autodeps, it makes sure that -no clkdm is in IDLE, and hence not requiring a force -SW_WKUP when a module is being enabled. - -OMAP4 does not need to support autodeps, because -of the dyanamic dependency feature, wherein -the HW takes care of waking up a clockdomain from -idle and hence the module, whenever an interconnect -access happens to the given module. - -Implementing the sequence for OMAP4 requires -the clockdomain handling that is currently done in -clock framework to be done as part of hwmod framework -since the step -4- above to "Wait for the desired -module idle status to be FUNC" is done as part of -hwmod framework. - -Signed-off-by: Rajendra Nayak <rnayak@ti.com> -[b-cousson@ti.com: Adapt it to the new clkdm hwmod attribute and API] -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -[paul@pwsan.com: dropped mach-omap2/clock.c changes; modified to only - call the clockdomain code if oh->clkdm is set; disable clock->clockdomain - interaction on OMAP4] -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/mach-omap2/clock44xx_data.c | 1 + - arch/arm/mach-omap2/omap_hwmod.c | 70 ++++++++++++++++++++++++---------- - 2 files changed, 51 insertions(+), 20 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c -index 07bf0de..0d13def 100644 ---- a/arch/arm/mach-omap2/clock44xx_data.c -+++ b/arch/arm/mach-omap2/clock44xx_data.c -@@ -3340,6 +3340,7 @@ int __init omap4xxx_clk_init(void) - } - - clk_init(&omap2_clk_functions); -+ omap2_clk_disable_clkdm_control(); - - for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks); - c++) -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c -index 4424fee..84cc0bd 100644 ---- a/arch/arm/mach-omap2/omap_hwmod.c -+++ b/arch/arm/mach-omap2/omap_hwmod.c -@@ -1437,6 +1437,7 @@ static int _reset(struct omap_hwmod *oh) - static int _enable(struct omap_hwmod *oh) - { - int r; -+ int hwsup = 0; - - pr_debug("omap_hwmod: %s: enabling\n", oh->name); - -@@ -1448,14 +1449,6 @@ static int _enable(struct omap_hwmod *oh) - return -EINVAL; - } - -- /* Mux pins for device runtime if populated */ -- if (oh->mux && (!oh->mux->enabled || -- ((oh->_state == _HWMOD_STATE_IDLE) && -- oh->mux->pads_dynamic))) -- omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); -- -- _add_initiator_dep(oh, mpu_oh); -- _enable_clocks(oh); - - /* - * If an IP contains only one HW reset line, then de-assert it in order -@@ -1466,23 +1459,56 @@ static int _enable(struct omap_hwmod *oh) - oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) - _deassert_hardreset(oh, oh->rst_lines[0].name); - -- r = _wait_target_ready(oh); -- if (r) { -- pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", -- oh->name, r); -- _disable_clocks(oh); -+ /* Mux pins for device runtime if populated */ -+ if (oh->mux && (!oh->mux->enabled || -+ ((oh->_state == _HWMOD_STATE_IDLE) && -+ oh->mux->pads_dynamic))) -+ omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); -+ -+ _add_initiator_dep(oh, mpu_oh); - -- return r; -+ if (oh->clkdm) { -+ /* -+ * A clockdomain must be in SW_SUP before enabling -+ * completely the module. The clockdomain can be set -+ * in HW_AUTO only when the module become ready. -+ */ -+ hwsup = clkdm_in_hwsup(oh->clkdm); -+ r = clkdm_hwmod_enable(oh->clkdm, oh); -+ if (r) { -+ WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", -+ oh->name, oh->clkdm->name, r); -+ return r; -+ } - } -+ -+ _enable_clocks(oh); - _enable_module(oh); - -- oh->_state = _HWMOD_STATE_ENABLED; -+ r = _wait_target_ready(oh); -+ if (!r) { -+ /* -+ * Set the clockdomain to HW_AUTO only if the target is ready, -+ * assuming that the previous state was HW_AUTO -+ */ -+ if (oh->clkdm && hwsup) -+ clkdm_allow_idle(oh->clkdm); - -- /* Access the sysconfig only if the target is ready */ -- if (oh->class->sysc) { -- if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) -- _update_sysc_cache(oh); -- _enable_sysc(oh); -+ oh->_state = _HWMOD_STATE_ENABLED; -+ -+ /* Access the sysconfig only if the target is ready */ -+ if (oh->class->sysc) { -+ if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) -+ _update_sysc_cache(oh); -+ _enable_sysc(oh); -+ } -+ } else { -+ _disable_clocks(oh); -+ pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", -+ oh->name, r); -+ -+ if (oh->clkdm) -+ clkdm_hwmod_disable(oh->clkdm, oh); - } - - return r; -@@ -1523,6 +1549,8 @@ static int _idle(struct omap_hwmod *oh) - * transition to complete properly. - */ - _disable_clocks(oh); -+ if (oh->clkdm) -+ clkdm_hwmod_disable(oh->clkdm, oh); - - /* Mux pins for device idle if populated */ - if (oh->mux && oh->mux->pads_dynamic) -@@ -1620,6 +1648,8 @@ static int _shutdown(struct omap_hwmod *oh) - pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", - oh->name); - _disable_clocks(oh); -+ if (oh->clkdm) -+ clkdm_hwmod_disable(oh->clkdm, oh); - } - /* XXX Should this code also force-disable the optional clocks? */ - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the-summary-of-all-clo.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the-summary-of-all-clo.patch deleted file mode 100644 index db025c7..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the-summary-of-all-clo.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 01eed55ec7b57fb5109e7eb70cbdebdc030135a5 Mon Sep 17 00:00:00 2001 -From: Jon Hunter <jon-hunter@ti.com> -Date: Sun, 10 Jul 2011 05:57:33 -0600 -Subject: [PATCH 095/149] OMAP: Add debugfs node to show the summary of all clocks - -Add a debugfs node called "summary" to /sys/kernel/debug/clock/ -that displays a quick summary of all clocks registered in the -"clocks" structure. The format of the output from this node is: - -<clock-name> <parent-name> <rate> <usecount> - -This debugfs node was very helpful for taking a quick snapshot of -the linux clock tree for OMAP and ensuring clock frequencies -calculated by the kernel were indeed correct. This patch helped -uncover some bugs in the linux clock tree for OMAP4. - -Signed-off-by: Jon Hunter <jon-hunter@ti.com> -Signed-off-by: Paul Walmsley <paul@pwsan.com> ---- - arch/arm/plat-omap/clock.c | 39 +++++++++++++++++++++++++++++++++++++++ - 1 files changed, 39 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c -index c9122dd..156b27d 100644 ---- a/arch/arm/plat-omap/clock.c -+++ b/arch/arm/plat-omap/clock.c -@@ -475,8 +475,41 @@ int __init clk_init(struct clk_functions * custom_clocks) - /* - * debugfs support to trace clock tree hierarchy and attributes - */ -+ -+#include <linux/debugfs.h> -+#include <linux/seq_file.h> -+ - static struct dentry *clk_debugfs_root; - -+static int clk_dbg_show_summary(struct seq_file *s, void *unused) -+{ -+ struct clk *c; -+ struct clk *pa; -+ -+ seq_printf(s, "%-30s %-30s %-10s %s\n", -+ "clock-name", "parent-name", "rate", "use-count"); -+ -+ list_for_each_entry(c, &clocks, node) { -+ pa = c->parent; -+ seq_printf(s, "%-30s %-30s %-10lu %d\n", -+ c->name, pa ? pa->name : "none", c->rate, c->usecount); -+ } -+ -+ return 0; -+} -+ -+static int clk_dbg_open(struct inode *inode, struct file *file) -+{ -+ return single_open(file, clk_dbg_show_summary, inode->i_private); -+} -+ -+static const struct file_operations debug_clock_fops = { -+ .open = clk_dbg_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+}; -+ - static int clk_debugfs_register_one(struct clk *c) - { - int err; -@@ -551,6 +584,12 @@ static int __init clk_debugfs_init(void) - if (err) - goto err_out; - } -+ -+ d = debugfs_create_file("summary", S_IRUGO, -+ d, NULL, &debug_clock_fops); -+ if (!d) -+ return -ENOMEM; -+ - return 0; - err_out: - debugfs_remove_recursive(clk_debugfs_root); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused-voltagedomain-pointer.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused-voltagedomain-pointer.patch deleted file mode 100644 index 3815245..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused-voltagedomain-pointer.patch +++ /dev/null @@ -1,30 +0,0 @@ -From c9d2e22cc8ed08fb232d99c161f8d0be18c8569e Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 16 Mar 2011 11:02:59 -0700 -Subject: [PATCH 096/149] OMAP2+: hwmod: remove unused voltagedomain pointer - -The voltage domain pointer currently in struct omap_hwmod is not used -and does not belong here. Instead, voltage domains will be associated -with powerdomains in forthcoming patches. - -Acked-by: Paul Walmsley <paul@pwsan.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 - - 1 files changed, 0 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h -index 0e329ca..38ac4af 100644 ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h -@@ -526,7 +526,6 @@ struct omap_hwmod { - char *clkdm_name; - struct clockdomain *clkdm; - char *vdd_name; -- struct voltagedomain *voltdm; - struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ - struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ - void *dev_attr; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch deleted file mode 100644 index c4c56d0..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch +++ /dev/null @@ -1,577 +0,0 @@ -From 9d2ed2fa5cc20d7c0233d1c5c8070c7c3f0914c8 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 16 Mar 2011 13:35:22 -0700 -Subject: [PATCH 097/149] OMAP2+: voltage: move PRCM mod offets into VC/VP structures - -Eliminate need for global variables for the various PRM module offsets by -making them part of the VP/VC common structures - -Eventually, these will likely be moved again, or more likely removed -when VP/VC code is isolated, but for now just getting rid of them as -global variabes so that the voltage domain initialization can be -cleaned up. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.h | 2 + - arch/arm/mach-omap2/vc3xxx_data.c | 1 + - arch/arm/mach-omap2/vc44xx_data.c | 1 + - arch/arm/mach-omap2/voltage.c | 109 ++++++++++++------------- - arch/arm/mach-omap2/voltage.h | 6 +- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 +- - arch/arm/mach-omap2/voltagedomains44xx_data.c | 9 +- - arch/arm/mach-omap2/vp.h | 2 + - arch/arm/mach-omap2/vp3xxx_data.c | 1 + - arch/arm/mach-omap2/vp44xx_data.c | 1 + - 10 files changed, 70 insertions(+), 70 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index e776777..f7338af 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -23,6 +23,7 @@ - * struct omap_vc_common_data - per-VC register/bitfield data - * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register - * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register -+ * @prm_mod: PRM module id used for PRM register access - * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start - * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start - * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start -@@ -40,6 +41,7 @@ - struct omap_vc_common_data { - u32 cmd_on_mask; - u32 valid; -+ s16 prm_mod; - u8 smps_sa_reg; - u8 smps_volra_reg; - u8 bypass_val_reg; -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c -index f37dc4b..55caccb 100644 ---- a/arch/arm/mach-omap2/vc3xxx_data.c -+++ b/arch/arm/mach-omap2/vc3xxx_data.c -@@ -30,6 +30,7 @@ - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. - */ - static struct omap_vc_common_data omap3_vc_common = { -+ .prm_mod = OMAP3430_GR_MOD, - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, - .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c -index a98da8d..b62678e 100644 ---- a/arch/arm/mach-omap2/vc44xx_data.c -+++ b/arch/arm/mach-omap2/vc44xx_data.c -@@ -31,6 +31,7 @@ - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. - */ - static const struct omap_vc_common_data omap4_vc_common = { -+ .prm_mod = OMAP4430_PRM_DEVICE_INST, - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, - .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 9ef3789..3151d75 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -50,10 +50,6 @@ static struct omap_vdd_info **vdd_info; - */ - static int nr_scalable_vdd; - --/* XXX document */ --static s16 prm_mod_offs; --static s16 prm_irqst_ocp_mod_offs; -- - static struct dentry *voltage_dir; - - /* Init function pointers */ -@@ -147,7 +143,7 @@ static int vp_volt_debug_get(void *data, u64 *val) - return -EINVAL; - } - -- vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); -+ vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); - - if (!vdd->pmic_info->vsel_to_uv) { - pr_warning("PMIC function to convert vsel to voltage" -@@ -197,19 +193,19 @@ static void vp_latch_vsel(struct omap_vdd_info *vdd) - - vsel = vdd->pmic_info->uv_to_vsel(uvdc); - -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvoltage_mask | - vdd->vp_data->vp_common->vpconfig_initvdd); - vpconfig |= vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift; - -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ - vdd->write_reg((vpconfig | vdd->vp_data->vp_common->vpconfig_initvdd), -- prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* Clear initVDD copy trigger bit */ -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - } - - /* Generic voltage init functions */ -@@ -227,19 +223,19 @@ static void __init vp_init(struct omap_vdd_info *vdd) - (vdd->vp_rt_data.vpconfig_errorgain << - vdd->vp_data->vp_common->vpconfig_errorgain_shift) | - vdd->vp_data->vp_common->vpconfig_timeouten; -- vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << - vdd->vp_data->vp_common->vstepmin_smpswaittimemin_shift) | - (vdd->vp_rt_data.vstepmin_stepmin << - vdd->vp_data->vp_common->vstepmin_stepmin_shift)); -- vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmin); -+ vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmin); - - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << - vdd->vp_data->vp_common->vstepmax_smpswaittimemax_shift) | - (vdd->vp_rt_data.vstepmax_stepmax << - vdd->vp_data->vp_common->vstepmax_stepmax_shift)); -- vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmax); -+ vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmax); - - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << - vdd->vp_data->vp_common->vlimitto_vddmax_shift) | -@@ -247,7 +243,7 @@ static void __init vp_init(struct omap_vdd_info *vdd) - vdd->vp_data->vp_common->vlimitto_vddmin_shift) | - (vdd->vp_rt_data.vlimitto_timeout << - vdd->vp_data->vp_common->vlimitto_timeout_shift)); -- vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vlimitto); -+ vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); - } - - static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) -@@ -336,23 +332,23 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, - volt_data = NULL; - - *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); -- *current_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); -+ *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); - - /* Setting the ON voltage to the new target voltage */ -- vc_cmdval = vdd->read_reg(prm_mod_offs, vdd->vc_data->cmdval_reg); -+ vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); - vc_cmdval &= ~vc_common->cmd_on_mask; - vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); -- vdd->write_reg(vc_cmdval, prm_mod_offs, vdd->vc_data->cmdval_reg); -+ vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); - - /* Setting vp errorgain based on the voltage */ - if (volt_data) { -- vp_errgain_val = vdd->read_reg(prm_mod_offs, -+ vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, - vdd->vp_data->vpconfig); - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; - vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << - vp_common->vpconfig_errorgain_shift; -- vdd->write_reg(vp_errgain_val, prm_mod_offs, -+ vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, - vdd->vp_data->vpconfig); - } - -@@ -394,11 +390,11 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, - (vdd->pmic_info->i2c_slave_addr << - vdd->vc_data->vc_common->slaveaddr_shift); - -- vdd->write_reg(vc_bypass_value, prm_mod_offs, vc_bypass_val_reg); -- vdd->write_reg(vc_bypass_value | vc_valid, prm_mod_offs, -+ vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); -+ vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data->vc_common->prm_mod, - vc_bypass_val_reg); - -- vc_bypass_value = vdd->read_reg(prm_mod_offs, vc_bypass_val_reg); -+ vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); - /* - * Loop till the bypass command is acknowledged from the SMPS. - * NOTE: This is legacy code. The loop count and retry count needs -@@ -417,7 +413,7 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, - loop_cnt = 0; - udelay(10); - } -- vc_bypass_value = vdd->read_reg(prm_mod_offs, -+ vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, - vc_bypass_val_reg); - } - -@@ -445,8 +441,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - */ - while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, -- prm_irqst_ocp_mod_offs, prm_irqst_reg); -- if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & -+ vdd->prm_irqst_mod, prm_irqst_reg); -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status)) - break; - udelay(1); -@@ -458,28 +454,28 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - } - - /* Configure for VP-Force Update */ -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | - vdd->vp_data->vp_common->vpconfig_forceupdate | - vdd->vp_data->vp_common->vpconfig_initvoltage_mask); - vpconfig |= ((target_vsel << - vdd->vp_data->vp_common->vpconfig_initvoltage_shift)); -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ - vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* Force update of voltage */ - vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* - * Wait for TransactionDone. Typical latency is <200us. - * Depends on SMPSWAITTIMEMIN/MAX and voltage change - */ - timeout = 0; -- omap_test_timeout((vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & -+ omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status), - VP_TRANXDONE_TIMEOUT, timeout); - if (timeout >= VP_TRANXDONE_TIMEOUT) -@@ -496,8 +492,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - timeout = 0; - while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, -- prm_irqst_ocp_mod_offs, prm_irqst_reg); -- if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & -+ vdd->prm_irqst_mod, prm_irqst_reg); -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status)) - break; - udelay(1); -@@ -508,13 +504,13 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - "to clear the TRANXDONE status\n", - __func__, vdd->voltdm.name); - -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - /* Clear initVDD copy trigger bit */ - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - /* Clear force bit */ - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - return 0; - } -@@ -525,10 +521,10 @@ static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) - * Voltage Manager FSM parameters init - * XXX This data should be passed in from the board file - */ -- vdd->write_reg(OMAP3_CLKSETUP, prm_mod_offs, OMAP3_PRM_CLKSETUP_OFFSET); -- vdd->write_reg(OMAP3_VOLTOFFSET, prm_mod_offs, -+ vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); -+ vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VOLTOFFSET_OFFSET); -- vdd->write_reg(OMAP3_VOLTSETUP2, prm_mod_offs, -+ vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VOLTSETUP2_OFFSET); - } - -@@ -550,15 +546,15 @@ static void __init omap3_vc_init(struct omap_vdd_info *vdd) - (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | - (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | - (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); -- vdd->write_reg(vc_val, prm_mod_offs, vdd->vc_data->cmdval_reg); -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); - - /* - * Generic VC parameters init - * XXX This data should be abstracted out - */ -- vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, prm_mod_offs, -+ vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VC_CH_CONF_OFFSET); -- vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, prm_mod_offs, -+ vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VC_I2C_CFG_OFFSET); - - omap3_vfsm_init(vdd); -@@ -585,11 +581,11 @@ static void __init omap4_vc_init(struct omap_vdd_info *vdd) - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | - OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | - OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); -- vdd->write_reg(vc_val, prm_mod_offs, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); - - /* XXX These are magic numbers and do not belong! */ - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); -- vdd->write_reg(vc_val, prm_mod_offs, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); - - is_initialized = true; - } -@@ -612,27 +608,27 @@ static void __init omap_vc_init(struct omap_vdd_info *vdd) - } - - /* Set up the SMPS_SA(i2c slave address in VC */ -- vc_val = vdd->read_reg(prm_mod_offs, -+ vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, - vdd->vc_data->vc_common->smps_sa_reg); - vc_val &= ~vdd->vc_data->smps_sa_mask; - vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data->smps_sa_shift; -- vdd->write_reg(vc_val, prm_mod_offs, -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, - vdd->vc_data->vc_common->smps_sa_reg); - - /* Setup the VOLRA(pmic reg addr) in VC */ -- vc_val = vdd->read_reg(prm_mod_offs, -+ vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, - vdd->vc_data->vc_common->smps_volra_reg); - vc_val &= ~vdd->vc_data->smps_volra_mask; - vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data->smps_volra_shift; -- vdd->write_reg(vc_val, prm_mod_offs, -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, - vdd->vc_data->vc_common->smps_volra_reg); - - /* Configure the setup times */ -- vc_val = vdd->read_reg(prm_mod_offs, vdd->vfsm->voltsetup_reg); -+ vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); - vc_val &= ~vdd->vfsm->voltsetup_mask; - vc_val |= vdd->pmic_info->volt_setup_time << - vdd->vfsm->voltsetup_shift; -- vdd->write_reg(vc_val, prm_mod_offs, vdd->vfsm->voltsetup_reg); -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); - - if (cpu_is_omap34xx()) - omap3_vc_init(vdd); -@@ -713,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) - return 0; - } - -- curr_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); -+ curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); - - if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { - pr_warning("%s: PMIC function to convert vsel to voltage" -@@ -755,9 +751,9 @@ void omap_vp_enable(struct voltagedomain *voltdm) - vp_latch_vsel(vdd); - - /* Enable VP */ -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vdd->vp_enabled = true; - } - -@@ -794,14 +790,14 @@ void omap_vp_disable(struct voltagedomain *voltdm) - } - - /* Disable VP */ -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* - * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us - */ -- omap_test_timeout((vdd->read_reg(prm_mod_offs, vdd->vp_data->vstatus)), -+ omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstatus)), - VP_IDLE_TIMEOUT, timeout); - - if (timeout >= VP_IDLE_TIMEOUT) -@@ -1094,12 +1090,9 @@ int __init omap_voltage_late_init(void) - } - - /* XXX document */ --int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_ocp_mod, -- struct omap_vdd_info *omap_vdd_array[], -+int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], - u8 omap_vdd_count) - { -- prm_mod_offs = prm_mod; -- prm_irqst_ocp_mod_offs = prm_irqst_ocp_mod; - vdd_info = omap_vdd_array; - nr_scalable_vdd = omap_vdd_count; - return 0; -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index e9f5408..ffdc55e 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -119,6 +119,7 @@ struct omap_volt_pmic_info { - * @voltdm : pointer to the voltage domain structure - * @debug_dir : debug directory for this voltage domain. - * @curr_volt : current voltage for this vdd. -+ * @prm_irqst_mod : PRM module id used for PRM IRQ status register access - * @vp_enabled : flag to keep track of whether vp is enabled or not - * @volt_scale : API to scale the voltage of the vdd. - */ -@@ -133,6 +134,8 @@ struct omap_vdd_info { - struct dentry *debug_dir; - u32 curr_volt; - bool vp_enabled; -+ -+ s16 prm_irqst_mod; - u32 (*read_reg) (u16 mod, u8 offset); - void (*write_reg) (u32 val, u16 mod, u8 offset); - int (*volt_scale) (struct omap_vdd_info *vdd, -@@ -151,8 +154,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, - unsigned long volt); - unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); - struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); --int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_mod, -- struct omap_vdd_info *omap_vdd_array[], -+int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], - u8 omap_vdd_count); - #ifdef CONFIG_PM - int omap_voltage_register_pmic(struct voltagedomain *voltdm, -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index def230f..0d30b7f 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { - }; - - static struct omap_vdd_info omap3_vdd1_info = { -+ .prm_irqst_mod = OCP_MOD, - .vp_data = &omap3_vp1_data, - .vc_data = &omap3_vc1_data, - .vfsm = &omap3_vdd1_vfsm_data, -@@ -53,6 +54,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { - }; - - static struct omap_vdd_info omap3_vdd2_info = { -+ .prm_irqst_mod = OCP_MOD, - .vp_data = &omap3_vp2_data, - .vc_data = &omap3_vc2_data, - .vfsm = &omap3_vdd2_vfsm_data, -@@ -70,9 +72,6 @@ static struct omap_vdd_info *omap3_vdd_info[] = { - /* OMAP3 specific voltage init functions */ - static int __init omap3xxx_voltage_early_init(void) - { -- s16 prm_mod = OMAP3430_GR_MOD; -- s16 prm_irqst_ocp_mod = OCP_MOD; -- - if (!cpu_is_omap34xx()) - return 0; - -@@ -88,8 +87,7 @@ static int __init omap3xxx_voltage_early_init(void) - omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; - } - -- return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, -- omap3_vdd_info, -+ return omap_voltage_early_init(omap3_vdd_info, - ARRAY_SIZE(omap3_vdd_info)); - }; - core_initcall(omap3xxx_voltage_early_init); -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index cb64996..1c2d7d7 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -37,6 +37,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { - }; - - static struct omap_vdd_info omap4_vdd_mpu_info = { -+ .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .vp_data = &omap4_vp_mpu_data, - .vc_data = &omap4_vc_mpu_data, - .vfsm = &omap4_vdd_mpu_vfsm_data, -@@ -50,6 +51,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { - }; - - static struct omap_vdd_info omap4_vdd_iva_info = { -+ .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .vp_data = &omap4_vp_iva_data, - .vc_data = &omap4_vc_iva_data, - .vfsm = &omap4_vdd_iva_vfsm_data, -@@ -63,6 +65,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { - }; - - static struct omap_vdd_info omap4_vdd_core_info = { -+ .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .vp_data = &omap4_vp_core_data, - .vc_data = &omap4_vc_core_data, - .vfsm = &omap4_vdd_core_vfsm_data, -@@ -81,9 +84,6 @@ static struct omap_vdd_info *omap4_vdd_info[] = { - /* OMAP4 specific voltage init functions */ - static int __init omap44xx_voltage_early_init(void) - { -- s16 prm_mod = OMAP4430_PRM_DEVICE_INST; -- s16 prm_irqst_ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST; -- - if (!cpu_is_omap44xx()) - return 0; - -@@ -95,8 +95,7 @@ static int __init omap44xx_voltage_early_init(void) - omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; - omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; - -- return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, -- omap4_vdd_info, -+ return omap_voltage_early_init(omap4_vdd_info, - ARRAY_SIZE(omap4_vdd_info)); - }; - core_initcall(omap44xx_voltage_early_init); -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 7ce134f..d277da6 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -42,6 +42,7 @@ - * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg - * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg - * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg -+ * @prm_mod: PRM module id used for PRM register access - * - * XXX It it not necessary to have both a mask and a shift for the same - * bitfield - remove one -@@ -54,6 +55,7 @@ struct omap_vp_common_data { - u32 vpconfig_initvdd; - u32 vpconfig_forceupdate; - u32 vpconfig_vpenable; -+ s16 prm_mod; - u8 vpconfig_erroroffset_shift; - u8 vpconfig_errorgain_shift; - u8 vpconfig_initvoltage_shift; -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c -index 6452170..c9b3e64 100644 ---- a/arch/arm/mach-omap2/vp3xxx_data.c -+++ b/arch/arm/mach-omap2/vp3xxx_data.c -@@ -31,6 +31,7 @@ - * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. - */ - static const struct omap_vp_common_data omap3_vp_common = { -+ .prm_mod = OMAP3430_GR_MOD, - .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, - .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, - .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c -index 65d1ad6..1a0842e 100644 ---- a/arch/arm/mach-omap2/vp44xx_data.c -+++ b/arch/arm/mach-omap2/vp44xx_data.c -@@ -32,6 +32,7 @@ - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. - */ - static const struct omap_vp_common_data omap4_vp_common = { -+ .prm_mod = OMAP4430_PRM_DEVICE_INST, - .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, - .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, - .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from-VP-into-voltag.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from-VP-into-voltag.patch deleted file mode 100644 index 2b2727c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from-VP-into-voltag.patch +++ /dev/null @@ -1,203 +0,0 @@ -From 6e8557b224128200bac5f99b41bc6213de05ad69 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 16 Mar 2011 17:20:35 -0700 -Subject: [PATCH 098/149] OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain - -The prm_irqst_reg is not part of the VP. Move it up into the common -voltage domain struct. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.c | 15 +++++++-------- - arch/arm/mach-omap2/voltage.h | 1 + - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 ++ - arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ - arch/arm/mach-omap2/vp.h | 3 --- - arch/arm/mach-omap2/vp3xxx_data.c | 2 -- - arch/arm/mach-omap2/vp44xx_data.c | 3 --- - 7 files changed, 13 insertions(+), 16 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 3151d75..a366a6b 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - unsigned long target_volt) - { - u32 vpconfig; -- u8 target_vsel, current_vsel, prm_irqst_reg; -+ u8 target_vsel, current_vsel; - int ret, timeout = 0; - - ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); - if (ret) - return ret; - -- prm_irqst_reg = vdd->vp_data->prm_irqst_data->prm_irqst_reg; -- - /* - * Clear all pending TransactionDone interrupt/status. Typical latency - * is <3us - */ - while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, -- vdd->prm_irqst_mod, prm_irqst_reg); -- if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & -+ vdd->prm_irqst_mod, vdd->prm_irqst_reg); -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status)) - break; - udelay(1); -@@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - * Depends on SMPSWAITTIMEMIN/MAX and voltage change - */ - timeout = 0; -- omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & -+ omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, -+ vdd->prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status), - VP_TRANXDONE_TIMEOUT, timeout); - if (timeout >= VP_TRANXDONE_TIMEOUT) -@@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - timeout = 0; - while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, -- vdd->prm_irqst_mod, prm_irqst_reg); -- if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & -+ vdd->prm_irqst_mod, vdd->prm_irqst_reg); -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status)) - break; - udelay(1); -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index ffdc55e..db23d49 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -136,6 +136,7 @@ struct omap_vdd_info { - bool vp_enabled; - - s16 prm_irqst_mod; -+ u8 prm_irqst_reg; - u32 (*read_reg) (u16 mod, u8 offset); - void (*write_reg) (u32 val, u16 mod, u8 offset); - int (*volt_scale) (struct omap_vdd_info *vdd, -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index 0d30b7f..f831f9a 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { - - static struct omap_vdd_info omap3_vdd1_info = { - .prm_irqst_mod = OCP_MOD, -+ .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap3_vp1_data, - .vc_data = &omap3_vc1_data, - .vfsm = &omap3_vdd1_vfsm_data, -@@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { - - static struct omap_vdd_info omap3_vdd2_info = { - .prm_irqst_mod = OCP_MOD, -+ .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap3_vp2_data, - .vc_data = &omap3_vc2_data, - .vfsm = &omap3_vdd2_vfsm_data, -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index 1c2d7d7..64dc265 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { - - static struct omap_vdd_info omap4_vdd_mpu_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, -+ .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, - .vp_data = &omap4_vp_mpu_data, - .vc_data = &omap4_vc_mpu_data, - .vfsm = &omap4_vdd_mpu_vfsm_data, -@@ -52,6 +53,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { - - static struct omap_vdd_info omap4_vdd_iva_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, -+ .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap4_vp_iva_data, - .vc_data = &omap4_vc_iva_data, - .vfsm = &omap4_vdd_iva_vfsm_data, -@@ -66,6 +68,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { - - static struct omap_vdd_info omap4_vdd_core_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, -+ .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap4_vp_core_data, - .vc_data = &omap4_vc_core_data, - .vfsm = &omap4_vdd_core_vfsm_data, -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index d277da6..5406b08 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -70,16 +70,13 @@ struct omap_vp_common_data { - - /** - * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data -- * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg - * -- * XXX prm_irqst_reg does not belong here - * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a - * hardware bug - * XXX This structure is probably not needed - */ - struct omap_vp_prm_irqst_data { -- u8 prm_irqst_reg; - u32 tranxdone_status; - }; - -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c -index c9b3e64..a8ea045 100644 ---- a/arch/arm/mach-omap2/vp3xxx_data.c -+++ b/arch/arm/mach-omap2/vp3xxx_data.c -@@ -51,7 +51,6 @@ static const struct omap_vp_common_data omap3_vp_common = { - }; - - static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { -- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, - }; - -@@ -67,7 +66,6 @@ struct omap_vp_instance_data omap3_vp1_data = { - }; - - static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { -- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, - }; - -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c -index 1a0842e..0957c24 100644 ---- a/arch/arm/mach-omap2/vp44xx_data.c -+++ b/arch/arm/mach-omap2/vp44xx_data.c -@@ -52,7 +52,6 @@ static const struct omap_vp_common_data omap4_vp_common = { - }; - - static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, - .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, - }; - -@@ -68,7 +67,6 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { - }; - - static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, - }; - -@@ -84,7 +82,6 @@ struct omap_vp_instance_data omap4_vp_iva_data = { - }; - - static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = { -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new-voltagedomain-laye.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new-voltagedomain-laye.patch deleted file mode 100644 index 930f985..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new-voltagedomain-laye.patch +++ /dev/null @@ -1,986 +0,0 @@ -From 1e7eea5a5f4557d90e5b25e4473b7cb77540b7cd Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 16 Mar 2011 14:25:45 -0700 -Subject: [PATCH 099/149] OMAP2+: voltage: start towards a new voltagedomain layer - -Start cleaning up the voltage layer to have a voltage domain layer -that resembles the structure of the existing clock and power domain -layers. To that end: - -- move the 'struct voltagedomain' out of 'struct omap_vdd_info' to - become the primary data structure. - -- convert any functions taking a pointer to struct omap_vdd_info into - functions taking a struct voltagedomain pointer. - -- convert the register & initialize of voltage domains to look like - that of powerdomains - -- convert omap_voltage_domain_lookup() to voltdm_lookup(), modeled - after the current powerdomain and clockdomain lookup functions. - -- omap_voltage_late_init(): only configure VDD info when - the vdd_info struct is non-NULL - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/io.c | 3 + - arch/arm/mach-omap2/omap_twl.c | 10 +- - arch/arm/mach-omap2/pm.c | 2 +- - arch/arm/mach-omap2/sr_device.c | 2 +- - arch/arm/mach-omap2/voltage.c | 257 ++++++++++++++----------- - arch/arm/mach-omap2/voltage.h | 27 ++-- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 34 ++-- - arch/arm/mach-omap2/voltagedomains44xx_data.c | 44 ++-- - 8 files changed, 207 insertions(+), 172 deletions(-) - -diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c -index 2ce1ce6..9f5a846 100644 ---- a/arch/arm/mach-omap2/io.c -+++ b/arch/arm/mach-omap2/io.c -@@ -38,6 +38,7 @@ - #include "io.h" - - #include <plat/omap-pm.h> -+#include "voltage.h" - #include "powerdomain.h" - - #include "clockdomain.h" -@@ -349,10 +350,12 @@ void __init omap2_init_common_infrastructure(void) - omap2xxx_clockdomains_init(); - omap2430_hwmod_init(); - } else if (cpu_is_omap34xx()) { -+ omap3xxx_voltagedomains_init(); - omap3xxx_powerdomains_init(); - omap3xxx_clockdomains_init(); - omap3xxx_hwmod_init(); - } else if (cpu_is_omap44xx()) { -+ omap44xx_voltagedomains_init(); - omap44xx_powerdomains_init(); - omap44xx_clockdomains_init(); - omap44xx_hwmod_init(); -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index 07d6140..fcd2f62 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -250,13 +250,13 @@ int __init omap4_twl_init(void) - if (!cpu_is_omap44xx()) - return -ENODEV; - -- voltdm = omap_voltage_domain_lookup("mpu"); -+ voltdm = voltdm_lookup("mpu"); - omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); - -- voltdm = omap_voltage_domain_lookup("iva"); -+ voltdm = voltdm_lookup("iva"); - omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); - -- voltdm = omap_voltage_domain_lookup("core"); -+ voltdm = voltdm_lookup("core"); - omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); - - return 0; -@@ -288,10 +288,10 @@ int __init omap3_twl_init(void) - if (!twl_sr_enable_autoinit) - omap3_twl_set_sr_bit(true); - -- voltdm = omap_voltage_domain_lookup("mpu"); -+ voltdm = voltdm_lookup("mpu"); - omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); - -- voltdm = omap_voltage_domain_lookup("core"); -+ voltdm = voltdm_lookup("core"); - omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); - - return 0; -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c -index 3feb359..3bce29b 100644 ---- a/arch/arm/mach-omap2/pm.c -+++ b/arch/arm/mach-omap2/pm.c -@@ -183,7 +183,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, - goto exit; - } - -- voltdm = omap_voltage_domain_lookup(vdd_name); -+ voltdm = voltdm_lookup(vdd_name); - if (IS_ERR(voltdm)) { - printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", - __func__, vdd_name); -diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c -index 10d3c5e..2782d3f 100644 ---- a/arch/arm/mach-omap2/sr_device.c -+++ b/arch/arm/mach-omap2/sr_device.c -@@ -102,7 +102,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) - sr_data->senn_mod = 0x1; - sr_data->senp_mod = 0x1; - -- sr_data->voltdm = omap_voltage_domain_lookup(oh->vdd_name); -+ sr_data->voltdm = voltdm_lookup(oh->vdd_name); - if (IS_ERR(sr_data->voltdm)) { - pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", - __func__, oh->vdd_name); -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index a366a6b..4f0361a 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -40,20 +40,13 @@ - #include "vc.h" - #include "vp.h" - --#define VOLTAGE_DIR_SIZE 16 -- -- --static struct omap_vdd_info **vdd_info; -- --/* -- * Number of scalable voltage domains. -- */ --static int nr_scalable_vdd; -+static LIST_HEAD(voltdm_list); - -+#define VOLTAGE_DIR_SIZE 16 - static struct dentry *voltage_dir; - - /* Init function pointers */ --static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, -+static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt); - - static u32 omap3_voltage_read_reg(u16 mod, u8 offset) -@@ -77,11 +70,12 @@ static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset) - omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset); - } - --static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) -+static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - { - char *sys_ck_name; - struct clk *sys_ck; - u32 sys_clk_speed, timeout_val, waittime; -+ struct omap_vdd_info *vdd = voltdm->vdd; - - /* - * XXX Clockfw should handle this, or this should be in a -@@ -101,7 +95,7 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) - sys_ck = clk_get(NULL, sys_ck_name); - if (IS_ERR(sys_ck)) { - pr_warning("%s: Could not get the sys clk to calculate" -- "various vdd_%s params\n", __func__, vdd->voltdm.name); -+ "various vdd_%s params\n", __func__, voltdm->name); - return -EINVAL; - } - sys_clk_speed = clk_get_rate(sys_ck); -@@ -135,7 +129,8 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) - /* Voltage debugfs support */ - static int vp_volt_debug_get(void *data, u64 *val) - { -- struct omap_vdd_info *vdd = (struct omap_vdd_info *) data; -+ struct voltagedomain *voltdm = (struct voltagedomain *)data; -+ struct omap_vdd_info *vdd = voltdm->vdd; - u8 vsel; - - if (!vdd) { -@@ -157,14 +152,14 @@ static int vp_volt_debug_get(void *data, u64 *val) - - static int nom_volt_debug_get(void *data, u64 *val) - { -- struct omap_vdd_info *vdd = (struct omap_vdd_info *) data; -+ struct voltagedomain *voltdm = (struct voltagedomain *)data; - -- if (!vdd) { -+ if (!voltdm) { - pr_warning("Wrong paramater passed\n"); - return -EINVAL; - } - -- *val = omap_voltage_get_nom_volt(&vdd->voltdm); -+ *val = omap_voltage_get_nom_volt(voltdm); - - return 0; - } -@@ -172,16 +167,17 @@ static int nom_volt_debug_get(void *data, u64 *val) - DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); - DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, - "%llu\n"); --static void vp_latch_vsel(struct omap_vdd_info *vdd) -+static void vp_latch_vsel(struct voltagedomain *voltdm) - { - u32 vpconfig; - unsigned long uvdc; - char vsel; -+ struct omap_vdd_info *vdd = voltdm->vdd; - -- uvdc = omap_voltage_get_nom_volt(&vdd->voltdm); -+ uvdc = omap_voltage_get_nom_volt(voltdm); - if (!uvdc) { - pr_warning("%s: unable to find current voltage for vdd_%s\n", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - return; - } - -@@ -209,13 +205,14 @@ static void vp_latch_vsel(struct omap_vdd_info *vdd) - } - - /* Generic voltage init functions */ --static void __init vp_init(struct omap_vdd_info *vdd) -+static void __init vp_init(struct voltagedomain *voltdm) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - u32 vp_val; - - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - return; - } - -@@ -246,25 +243,26 @@ static void __init vp_init(struct omap_vdd_info *vdd) - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); - } - --static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) -+static void __init vdd_debugfs_init(struct voltagedomain *voltdm) - { - char *name; -+ struct omap_vdd_info *vdd = voltdm->vdd; - - name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL); - if (!name) { - pr_warning("%s: Unable to allocate memory for debugfs" - " directory name for vdd_%s", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - return; - } - strcpy(name, "vdd_"); -- strcat(name, vdd->voltdm.name); -+ strcat(name, voltdm->name); - - vdd->debug_dir = debugfs_create_dir(name, voltage_dir); - kfree(name); - if (IS_ERR(vdd->debug_dir)) { - pr_warning("%s: Unable to create debugfs directory for" -- " vdd_%s\n", __func__, vdd->voltdm.name); -+ " vdd_%s\n", __func__, voltdm->name); - vdd->debug_dir = NULL; - return; - } -@@ -288,16 +286,17 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) - (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir, - &(vdd->vp_rt_data.vlimitto_timeout)); - (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir, -- (void *) vdd, &vp_volt_debug_fops); -+ (void *) voltdm, &vp_volt_debug_fops); - (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, -- vdd->debug_dir, (void *) vdd, -+ vdd->debug_dir, (void *) voltdm, - &nom_volt_debug_fops); - } - - /* Voltage scale and accessory APIs */ --static int _pre_volt_scale(struct omap_vdd_info *vdd, -+static int _pre_volt_scale(struct voltagedomain *voltdm, - unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - struct omap_volt_data *volt_data; - const struct omap_vc_common_data *vc_common; - const struct omap_vp_common_data *vp_common; -@@ -309,25 +308,25 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, - /* Check if suffiecient pmic info is available for this vdd */ - if (!vdd->pmic_info) { - pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - return -EINVAL; - } - - if (!vdd->pmic_info->uv_to_vsel) { - pr_err("%s: PMIC function to convert voltage in uV to" - "vsel not registered. Hence unable to scale voltage" -- "for vdd_%s\n", __func__, vdd->voltdm.name); -+ "for vdd_%s\n", __func__, voltdm->name); - return -ENODATA; - } - - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - return -EINVAL; - } - - /* Get volt_data corresponding to target_volt */ -- volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt); -+ volt_data = omap_voltage_get_voltdata(voltdm, target_volt); - if (IS_ERR(volt_data)) - volt_data = NULL; - -@@ -355,9 +354,10 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, - return 0; - } - --static void _post_volt_scale(struct omap_vdd_info *vdd, -+static void _post_volt_scale(struct voltagedomain *voltdm, - unsigned long target_volt, u8 target_vsel, u8 current_vsel) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - u32 smps_steps = 0, smps_delay = 0; - - smps_steps = abs(target_vsel - current_vsel); -@@ -370,15 +370,16 @@ static void _post_volt_scale(struct omap_vdd_info *vdd, - } - - /* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ --static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, -+static int vc_bypass_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - u32 loop_cnt = 0, retries_cnt = 0; - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; - u8 target_vsel, current_vsel; - int ret; - -- ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); -+ ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); - if (ret) - return ret; - -@@ -417,19 +418,20 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, - vc_bypass_val_reg); - } - -- _post_volt_scale(vdd, target_volt, target_vsel, current_vsel); -+ _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); - return 0; - } - - /* VP force update method of voltage scaling */ --static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, -+static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - u32 vpconfig; - u8 target_vsel, current_vsel; - int ret, timeout = 0; - -- ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); -+ ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); - if (ret) - return ret; - -@@ -447,7 +449,7 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - } - if (timeout >= VP_TRANXDONE_TIMEOUT) { - pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." -- "Voltage change aborted", __func__, vdd->voltdm.name); -+ "Voltage change aborted", __func__, voltdm->name); - return -ETIMEDOUT; - } - -@@ -480,9 +482,9 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - if (timeout >= VP_TRANXDONE_TIMEOUT) - pr_err("%s: vdd_%s TRANXDONE timeout exceeded." - "TRANXDONE never got set after the voltage update\n", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - -- _post_volt_scale(vdd, target_volt, target_vsel, current_vsel); -+ _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); - - /* - * Disable TransactionDone interrupt , clear all status, clear -@@ -501,7 +503,7 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - if (timeout >= VP_TRANXDONE_TIMEOUT) - pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" - "to clear the TRANXDONE status\n", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - /* Clear initVDD copy trigger bit */ -@@ -514,8 +516,10 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, - return 0; - } - --static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) -+static void __init omap3_vfsm_init(struct voltagedomain *voltdm) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ - /* - * Voltage Manager FSM parameters init - * XXX This data should be passed in from the board file -@@ -527,8 +531,9 @@ static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) - OMAP3_PRM_VOLTSETUP2_OFFSET); - } - --static void __init omap3_vc_init(struct omap_vdd_info *vdd) -+static void __init omap3_vc_init(struct voltagedomain *voltdm) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - static bool is_initialized; - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; - u32 vc_val; -@@ -556,15 +561,16 @@ static void __init omap3_vc_init(struct omap_vdd_info *vdd) - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VC_I2C_CFG_OFFSET); - -- omap3_vfsm_init(vdd); -+ omap3_vfsm_init(voltdm); - - is_initialized = true; - } - - - /* OMAP4 specific voltage init functions */ --static void __init omap4_vc_init(struct omap_vdd_info *vdd) -+static void __init omap4_vc_init(struct voltagedomain *voltdm) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - static bool is_initialized; - u32 vc_val; - -@@ -589,20 +595,21 @@ static void __init omap4_vc_init(struct omap_vdd_info *vdd) - is_initialized = true; - } - --static void __init omap_vc_init(struct omap_vdd_info *vdd) -+static void __init omap_vc_init(struct voltagedomain *voltdm) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - u32 vc_val; - - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { - pr_err("%s: PMIC info requried to configure vc for" - "vdd_%s not populated.Hence cannot initialize vc\n", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - return; - } - - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", -- __func__, vdd->voltdm.name); -+ __func__, voltdm->name); - return; - } - -@@ -630,23 +637,24 @@ static void __init omap_vc_init(struct omap_vdd_info *vdd) - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); - - if (cpu_is_omap34xx()) -- omap3_vc_init(vdd); -+ omap3_vc_init(voltdm); - else if (cpu_is_omap44xx()) -- omap4_vc_init(vdd); -+ omap4_vc_init(voltdm); - } - --static int __init omap_vdd_data_configure(struct omap_vdd_info *vdd) -+static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) - { -+ struct omap_vdd_info *vdd = voltdm->vdd; - int ret = -EINVAL; - - if (!vdd->pmic_info) { - pr_err("%s: PMIC info requried to configure vdd_%s not" - "populated.Hence cannot initialize vdd_%s\n", -- __func__, vdd->voltdm.name, vdd->voltdm.name); -+ __func__, voltdm->name, voltdm->name); - goto ovdc_out; - } - -- if (IS_ERR_VALUE(_config_common_vdd_data(vdd))) -+ if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) - goto ovdc_out; - - if (cpu_is_omap34xx()) { -@@ -680,7 +688,7 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) - return 0; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - - return vdd->curr_volt; - } -@@ -701,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) - return 0; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - if (!vdd->read_reg) { - pr_err("%s: No read API for reading vdd_%s regs\n", - __func__, voltdm->name); -@@ -736,7 +744,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) - return; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); -@@ -747,7 +755,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) - if (vdd->vp_enabled) - return; - -- vp_latch_vsel(vdd); -+ vp_latch_vsel(voltdm); - - /* Enable VP */ - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -@@ -774,7 +782,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) - return; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); -@@ -827,7 +835,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, - return -EINVAL; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - - if (!vdd->volt_scale) { - pr_err("%s: No voltage scale API registered for vdd_%s\n", -@@ -835,7 +843,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, - return -ENODATA; - } - -- return vdd->volt_scale(vdd, target_volt); -+ return vdd->volt_scale(voltdm, target_volt); - } - - /** -@@ -888,7 +896,7 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, - return; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - - *volt_data = vdd->volt_data; - } -@@ -919,7 +927,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, - return ERR_PTR(-EINVAL); - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - - if (!vdd->volt_data) { - pr_warning("%s: voltage table does not exist for vdd_%s\n", -@@ -957,7 +965,7 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, - return -EINVAL; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - - vdd->pmic_info = pmic_info; - -@@ -984,7 +992,7 @@ struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm) - return NULL; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - - return vdd->debug_dir; - } -@@ -1009,7 +1017,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, - return; - } - -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); -+ vdd = voltdm->vdd; - - switch (voltscale_method) { - case VOLTSCALE_VPFORCEUPDATE: -@@ -1025,38 +1033,6 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, - } - - /** -- * omap_voltage_domain_lookup() - API to get the voltage domain pointer -- * @name: Name of the voltage domain -- * -- * This API looks up in the global vdd_info struct for the -- * existence of voltage domain <name>. If it exists, the API returns -- * a pointer to the voltage domain structure corresponding to the -- * VDD<name>. Else retuns error pointer. -- */ --struct voltagedomain *omap_voltage_domain_lookup(char *name) --{ -- int i; -- -- if (!vdd_info) { -- pr_err("%s: Voltage driver init not yet happened.Faulting!\n", -- __func__); -- return ERR_PTR(-EINVAL); -- } -- -- if (!name) { -- pr_err("%s: No name to get the votage domain!\n", __func__); -- return ERR_PTR(-EINVAL); -- } -- -- for (i = 0; i < nr_scalable_vdd; i++) { -- if (!(strcmp(name, vdd_info[i]->voltdm.name))) -- return &vdd_info[i]->voltdm; -- } -- -- return ERR_PTR(-EINVAL); --} -- --/** - * omap_voltage_late_init() - Init the various voltage parameters - * - * This API is to be called in the later stages of the -@@ -1065,9 +1041,9 @@ struct voltagedomain *omap_voltage_domain_lookup(char *name) - */ - int __init omap_voltage_late_init(void) - { -- int i; -+ struct voltagedomain *voltdm; - -- if (!vdd_info) { -+ if (list_empty(&voltdm_list)) { - pr_err("%s: Voltage driver support not added\n", - __func__); - return -EINVAL; -@@ -1077,22 +1053,81 @@ int __init omap_voltage_late_init(void) - if (IS_ERR(voltage_dir)) - pr_err("%s: Unable to create voltage debugfs main dir\n", - __func__); -- for (i = 0; i < nr_scalable_vdd; i++) { -- if (omap_vdd_data_configure(vdd_info[i])) -- continue; -- omap_vc_init(vdd_info[i]); -- vp_init(vdd_info[i]); -- vdd_debugfs_init(vdd_info[i]); -+ list_for_each_entry(voltdm, &voltdm_list, node) { -+ if (voltdm->vdd) { -+ if (omap_vdd_data_configure(voltdm)) -+ continue; -+ omap_vc_init(voltdm); -+ vp_init(voltdm); -+ vdd_debugfs_init(voltdm); -+ } - } - - return 0; - } - --/* XXX document */ --int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], -- u8 omap_vdd_count) -+static struct voltagedomain *_voltdm_lookup(const char *name) - { -- vdd_info = omap_vdd_array; -- nr_scalable_vdd = omap_vdd_count; -+ struct voltagedomain *voltdm, *temp_voltdm; -+ -+ voltdm = NULL; -+ -+ list_for_each_entry(temp_voltdm, &voltdm_list, node) { -+ if (!strcmp(name, temp_voltdm->name)) { -+ voltdm = temp_voltdm; -+ break; -+ } -+ } -+ -+ return voltdm; -+} -+ -+static int _voltdm_register(struct voltagedomain *voltdm) -+{ -+ if (!voltdm || !voltdm->name) -+ return -EINVAL; -+ -+ list_add(&voltdm->node, &voltdm_list); -+ -+ pr_debug("voltagedomain: registered %s\n", voltdm->name); -+ - return 0; - } -+ -+/** -+ * voltdm_lookup - look up a voltagedomain by name, return a pointer -+ * @name: name of voltagedomain -+ * -+ * Find a registered voltagedomain by its name @name. Returns a pointer -+ * to the struct voltagedomain if found, or NULL otherwise. -+ */ -+struct voltagedomain *voltdm_lookup(const char *name) -+{ -+ struct voltagedomain *voltdm ; -+ -+ if (!name) -+ return NULL; -+ -+ voltdm = _voltdm_lookup(name); -+ -+ return voltdm; -+} -+ -+/** -+ * voltdm_init - set up the voltagedomain layer -+ * @voltdm_list: array of struct voltagedomain pointers to register -+ * -+ * Loop through the array of voltagedomains @voltdm_list, registering all -+ * that are available on the current CPU. If voltdm_list is supplied -+ * and not null, all of the referenced voltagedomains will be -+ * registered. No return value. -+ */ -+void voltdm_init(struct voltagedomain **voltdms) -+{ -+ struct voltagedomain **v; -+ -+ if (voltdms) { -+ for (v = voltdms; *v; v++) -+ _voltdm_register(*v); -+ } -+} -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index db23d49..5440298 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -31,6 +31,8 @@ - #define OMAP3_VOLTOFFSET 0xff - #define OMAP3_VOLTSETUP2 0xff - -+struct omap_vdd_info; -+ - /** - * struct omap_vfsm_instance_data - per-voltage manager FSM register/bitfield - * data -@@ -50,11 +52,14 @@ struct omap_vfsm_instance_data { - - /** - * struct voltagedomain - omap voltage domain global structure. -- * @name: Name of the voltage domain which can be used as a unique -- * identifier. -+ * @name: Name of the voltage domain which can be used as a unique identifier. -+ * @node: list_head linking all voltage domains -+ * @vdd: to be removed - */ - struct voltagedomain { - char *name; -+ struct list_head node; -+ struct omap_vdd_info *vdd; - }; - - /** -@@ -116,7 +121,6 @@ struct omap_volt_pmic_info { - * @vc_data : structure containing various various vc registers, - * shifts, masks etc. - * @vfsm : voltage manager FSM data -- * @voltdm : pointer to the voltage domain structure - * @debug_dir : debug directory for this voltage domain. - * @curr_volt : current voltage for this vdd. - * @prm_irqst_mod : PRM module id used for PRM IRQ status register access -@@ -130,7 +134,6 @@ struct omap_vdd_info { - struct omap_vp_runtime_data vp_rt_data; - struct omap_vc_instance_data *vc_data; - const struct omap_vfsm_instance_data *vfsm; -- struct voltagedomain voltdm; - struct dentry *debug_dir; - u32 curr_volt; - bool vp_enabled; -@@ -139,7 +142,7 @@ struct omap_vdd_info { - u8 prm_irqst_reg; - u32 (*read_reg) (u16 mod, u8 offset); - void (*write_reg) (u32 val, u16 mod, u8 offset); -- int (*volt_scale) (struct omap_vdd_info *vdd, -+ int (*volt_scale) (struct voltagedomain *voltdm, - unsigned long target_volt); - }; - -@@ -155,16 +158,11 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, - unsigned long volt); - unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); - struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); --int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], -- u8 omap_vdd_count); - #ifdef CONFIG_PM - int omap_voltage_register_pmic(struct voltagedomain *voltdm, - struct omap_volt_pmic_info *pmic_info); - void omap_change_voltscale_method(struct voltagedomain *voltdm, - int voltscale_method); --/* API to get the voltagedomain pointer */ --struct voltagedomain *omap_voltage_domain_lookup(char *name); -- - int omap_voltage_late_init(void); - #else - static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, -@@ -178,10 +176,11 @@ static inline int omap_voltage_late_init(void) - { - return -EINVAL; - } --static inline struct voltagedomain *omap_voltage_domain_lookup(char *name) --{ -- return ERR_PTR(-EINVAL); --} - #endif - -+extern void omap3xxx_voltagedomains_init(void); -+extern void omap44xx_voltagedomains_init(void); -+ -+struct voltagedomain *voltdm_lookup(const char *name); -+void voltdm_init(struct voltagedomain **voltdm_list); - #endif -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index f831f9a..4bee412 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -43,9 +43,6 @@ static struct omap_vdd_info omap3_vdd1_info = { - .vp_data = &omap3_vp1_data, - .vc_data = &omap3_vc1_data, - .vfsm = &omap3_vdd1_vfsm_data, -- .voltdm = { -- .name = "mpu", -- }, - }; - - static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { -@@ -60,23 +57,26 @@ static struct omap_vdd_info omap3_vdd2_info = { - .vp_data = &omap3_vp2_data, - .vc_data = &omap3_vc2_data, - .vfsm = &omap3_vdd2_vfsm_data, -- .voltdm = { -- .name = "core", -- }, - }; - --/* OMAP3 VDD structures */ --static struct omap_vdd_info *omap3_vdd_info[] = { -- &omap3_vdd1_info, -- &omap3_vdd2_info, -+static struct voltagedomain omap3_voltdm_mpu = { -+ .name = "mpu", -+ .vdd = &omap3_vdd1_info, - }; - --/* OMAP3 specific voltage init functions */ --static int __init omap3xxx_voltage_early_init(void) --{ -- if (!cpu_is_omap34xx()) -- return 0; -+static struct voltagedomain omap3_voltdm_core = { -+ .name = "core", -+ .vdd = &omap3_vdd2_info, -+}; - -+static struct voltagedomain *voltagedomains_omap3[] __initdata = { -+ &omap3_voltdm_mpu, -+ &omap3_voltdm_core, -+ NULL, -+}; -+ -+void __init omap3xxx_voltagedomains_init(void) -+{ - /* - * XXX Will depend on the process, validation, and binning - * for the currently-running IC -@@ -89,7 +89,5 @@ static int __init omap3xxx_voltage_early_init(void) - omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; - } - -- return omap_voltage_early_init(omap3_vdd_info, -- ARRAY_SIZE(omap3_vdd_info)); -+ voltdm_init(voltagedomains_omap3); - }; --core_initcall(omap3xxx_voltage_early_init); -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index 64dc265..245fdf9 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -42,9 +42,6 @@ static struct omap_vdd_info omap4_vdd_mpu_info = { - .vp_data = &omap4_vp_mpu_data, - .vc_data = &omap4_vc_mpu_data, - .vfsm = &omap4_vdd_mpu_vfsm_data, -- .voltdm = { -- .name = "mpu", -- }, - }; - - static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { -@@ -57,9 +54,6 @@ static struct omap_vdd_info omap4_vdd_iva_info = { - .vp_data = &omap4_vp_iva_data, - .vc_data = &omap4_vc_iva_data, - .vfsm = &omap4_vdd_iva_vfsm_data, -- .voltdm = { -- .name = "iva", -- }, - }; - - static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { -@@ -72,24 +66,32 @@ static struct omap_vdd_info omap4_vdd_core_info = { - .vp_data = &omap4_vp_core_data, - .vc_data = &omap4_vc_core_data, - .vfsm = &omap4_vdd_core_vfsm_data, -- .voltdm = { -- .name = "core", -- }, - }; - --/* OMAP4 VDD structures */ --static struct omap_vdd_info *omap4_vdd_info[] = { -- &omap4_vdd_mpu_info, -- &omap4_vdd_iva_info, -- &omap4_vdd_core_info, -+static struct voltagedomain omap4_voltdm_mpu = { -+ .name = "mpu", -+ .vdd = &omap4_vdd_mpu_info, - }; - --/* OMAP4 specific voltage init functions */ --static int __init omap44xx_voltage_early_init(void) --{ -- if (!cpu_is_omap44xx()) -- return 0; -+static struct voltagedomain omap4_voltdm_iva = { -+ .name = "iva", -+ .vdd = &omap4_vdd_iva_info, -+}; -+ -+static struct voltagedomain omap4_voltdm_core = { -+ .name = "core", -+ .vdd = &omap4_vdd_core_info, -+}; - -+static struct voltagedomain *voltagedomains_omap4[] __initdata = { -+ &omap4_voltdm_mpu, -+ &omap4_voltdm_iva, -+ &omap4_voltdm_core, -+ NULL, -+}; -+ -+void __init omap44xx_voltagedomains_init(void) -+{ - /* - * XXX Will depend on the process, validation, and binning - * for the currently-running IC -@@ -98,7 +100,5 @@ static int __init omap44xx_voltage_early_init(void) - omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; - omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; - -- return omap_voltage_early_init(omap4_vdd_info, -- ARRAY_SIZE(omap4_vdd_info)); -+ voltdm_init(voltagedomains_omap4); - }; --core_initcall(omap44xx_voltage_early_init); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu-voltagedomain-to-mpu_iva.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu-voltagedomain-to-mpu_iva.patch deleted file mode 100644 index 195235d..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu-voltagedomain-to-mpu_iva.patch +++ /dev/null @@ -1,82 +0,0 @@ -From b98b320e9e4eeb93356a80b597e578c5547cdff9 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 23 Mar 2011 11:18:08 -0700 -Subject: [PATCH 100/149] OMAP3: voltage: rename "mpu" voltagedomain to "mpu_iva" - -This voltage domain (a.k.a. VDD1) contains both the MPU and the IVA, so -rename appropriately. - -Also fixup any users of the "mpu" name to use "mpu_iva" - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ++-- - arch/arm/mach-omap2/omap_twl.c | 2 +- - arch/arm/mach-omap2/pm.c | 2 +- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 +- - 4 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -index 25bf43b..59fdb9f 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c -@@ -2597,7 +2597,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { - .name = "sr1_hwmod", - .class = &omap34xx_smartreflex_hwmod_class, - .main_clk = "sr1_fck", -- .vdd_name = "mpu", -+ .vdd_name = "mpu_iva", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, -@@ -2619,7 +2619,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { - .name = "sr1_hwmod", - .class = &omap36xx_smartreflex_hwmod_class, - .main_clk = "sr1_fck", -- .vdd_name = "mpu", -+ .vdd_name = "mpu_iva", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index fcd2f62..760487b 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -288,7 +288,7 @@ int __init omap3_twl_init(void) - if (!twl_sr_enable_autoinit) - omap3_twl_set_sr_bit(true); - -- voltdm = voltdm_lookup("mpu"); -+ voltdm = voltdm_lookup("mpu_iva"); - omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); - - voltdm = voltdm_lookup("core"); -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c -index 3bce29b..f81340e 100644 ---- a/arch/arm/mach-omap2/pm.c -+++ b/arch/arm/mach-omap2/pm.c -@@ -228,7 +228,7 @@ static void __init omap3_init_voltages(void) - if (!cpu_is_omap34xx()) - return; - -- omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev); -+ omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev); - omap2_set_init_voltage("core", "l3_ick", l3_dev); - } - -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index 4bee412..2167ef4 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -60,7 +60,7 @@ static struct omap_vdd_info omap3_vdd2_info = { - }; - - static struct voltagedomain omap3_voltdm_mpu = { -- .name = "mpu", -+ .name = "mpu_iva", - .vdd = &omap3_vdd1_info, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup-domain.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup-domain.patch deleted file mode 100644 index 09c1ef4..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup-domain.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 17cd354184d7ffe9fcef97a0e1beeb6e8b2a2c38 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 23 Mar 2011 13:30:33 -0700 -Subject: [PATCH 101/149] OMAP3: voltagedomain data: add wakeup domain - -Add wakeup voltage domain so that the wakeup powerdomain can have an -associated powerdomain. Note that the scalable flat is not set for -the this voltagedomain, so it will not be fully initialized like -scalable voltage domains. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index 2167ef4..42d0b11 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -69,9 +69,14 @@ static struct voltagedomain omap3_voltdm_core = { - .vdd = &omap3_vdd2_info, - }; - -+static struct voltagedomain omap3_voltdm_wkup = { -+ .name = "wakeup", -+}; -+ - static struct voltagedomain *voltagedomains_omap3[] __initdata = { - &omap3_voltdm_mpu, - &omap3_voltdm_core, -+ &omap3_voltdm_wkup, - NULL, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to-voltagedomain.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to-voltagedomain.patch deleted file mode 100644 index c12fdb5..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to-voltagedomain.patch +++ /dev/null @@ -1,93 +0,0 @@ -From b9230219fb50ac16be3f24fe872bd9537b665871 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 23 Mar 2011 17:00:21 -0700 -Subject: [PATCH 102/149] OMAP3+: voltage: add scalable flag to voltagedomain - -Add a 'bool scalable' flag to the struct powerdomain and set it for -the scalable domains on OMAP3 and OMAP4. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.c | 3 +++ - arch/arm/mach-omap2/voltage.h | 2 ++ - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 ++ - arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ - 4 files changed, 10 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 4f0361a..48a2593 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -1054,6 +1054,9 @@ int __init omap_voltage_late_init(void) - pr_err("%s: Unable to create voltage debugfs main dir\n", - __func__); - list_for_each_entry(voltdm, &voltdm_list, node) { -+ if (!voltdm->scalable) -+ continue; -+ - if (voltdm->vdd) { - if (omap_vdd_data_configure(voltdm)) - continue; -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 5440298..25cfb5c 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -53,11 +53,13 @@ struct omap_vfsm_instance_data { - /** - * struct voltagedomain - omap voltage domain global structure. - * @name: Name of the voltage domain which can be used as a unique identifier. -+ * @scalable: Whether or not this voltage domain is scalable - * @node: list_head linking all voltage domains - * @vdd: to be removed - */ - struct voltagedomain { - char *name; -+ bool scalable; - struct list_head node; - struct omap_vdd_info *vdd; - }; -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index 42d0b11..d7e1052 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -61,11 +61,13 @@ static struct omap_vdd_info omap3_vdd2_info = { - - static struct voltagedomain omap3_voltdm_mpu = { - .name = "mpu_iva", -+ .scalable = true, - .vdd = &omap3_vdd1_info, - }; - - static struct voltagedomain omap3_voltdm_core = { - .name = "core", -+ .scalable = true, - .vdd = &omap3_vdd2_info, - }; - -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index 245fdf9..95e1ce5 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -70,16 +70,19 @@ static struct omap_vdd_info omap4_vdd_core_info = { - - static struct voltagedomain omap4_voltdm_mpu = { - .name = "mpu", -+ .scalable = true, - .vdd = &omap4_vdd_mpu_info, - }; - - static struct voltagedomain omap4_voltdm_iva = { - .name = "iva", -+ .scalable = true, - .vdd = &omap4_vdd_iva_info, - }; - - static struct voltagedomain omap4_voltdm_core = { - .name = "core", -+ .scalable = true, - .vdd = &omap4_vdd_core_info, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain-to-struct-powerd.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain-to-struct-powerd.patch deleted file mode 100644 index 06ec89b..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain-to-struct-powerd.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 4380f30498f0096856479011df85f956081ce26c Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 23 Mar 2011 07:22:23 -0700 -Subject: [PATCH 103/149] OMAP2+: powerdomain: add voltagedomain to struct powerdomain - -Each powerdomain is associated with a voltage domain. Add an entry to -struct powerdomain where the enclosing voltagedomain can be -referenced. - -Modeled after similar relationship between clockdomains and powerdomains. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/powerdomain.h | 7 +++++++ - 1 files changed, 7 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h -index d23d979..9ce920d 100644 ---- a/arch/arm/mach-omap2/powerdomain.h -+++ b/arch/arm/mach-omap2/powerdomain.h -@@ -24,6 +24,8 @@ - - #include <plat/cpu.h> - -+#include "voltage.h" -+ - /* Powerdomain basic power states */ - #define PWRDM_POWER_OFF 0x0 - #define PWRDM_POWER_RET 0x1 -@@ -78,6 +80,7 @@ struct powerdomain; - /** - * struct powerdomain - OMAP powerdomain - * @name: Powerdomain name -+ * @voltdm: voltagedomain containing this powerdomain - * @omap_chip: represents the OMAP chip types containing this pwrdm - * @prcm_offs: the address offset from CM_BASE/PRM_BASE - * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs -@@ -98,6 +101,10 @@ struct powerdomain; - */ - struct powerdomain { - const char *name; -+ union { -+ const char *name; -+ struct voltagedomain *ptr; -+ } voltdm; - const struct omap_chip_id omap_chip; - const s16 prcm_offs; - const u8 pwrsts; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect-to-powerdomain.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect-to-powerdomain.patch deleted file mode 100644 index 2e7b9b8..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect-to-powerdomain.patch +++ /dev/null @@ -1,138 +0,0 @@ -From 090b5bcad1bf67d208685461c30b68cd1ab535c5 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 23 Mar 2011 16:09:41 -0700 -Subject: [PATCH 104/149] OMAP2: add voltage domains and connect to powerdomains - -Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains -with the newly created voltage domains. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/Makefile | 3 +- - arch/arm/mach-omap2/io.c | 2 + - arch/arm/mach-omap2/powerdomains2xxx_data.c | 4 +++ - arch/arm/mach-omap2/voltage.h | 1 + - arch/arm/mach-omap2/voltagedomains2xxx_data.c | 32 +++++++++++++++++++++++++ - 5 files changed, 41 insertions(+), 1 deletions(-) - create mode 100644 arch/arm/mach-omap2/voltagedomains2xxx_data.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index f343365..1b6cecd 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -91,7 +91,8 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ - # OMAP voltage domains - ifeq ($(CONFIG_PM),y) - voltagedomain-common := voltage.o --obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) -+obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ -+ voltagedomains2xxx_data.o - obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ - voltagedomains3xxx_data.o - obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ -diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c -index 9f5a846..4c8a5de 100644 ---- a/arch/arm/mach-omap2/io.c -+++ b/arch/arm/mach-omap2/io.c -@@ -342,10 +342,12 @@ void __init omap2_init_common_infrastructure(void) - u8 postsetup_state; - - if (cpu_is_omap242x()) { -+ omap2xxx_voltagedomains_init(); - omap2xxx_powerdomains_init(); - omap2xxx_clockdomains_init(); - omap2420_hwmod_init(); - } else if (cpu_is_omap243x()) { -+ omap2xxx_voltagedomains_init(); - omap2xxx_powerdomains_init(); - omap2xxx_clockdomains_init(); - omap2430_hwmod_init(); -diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c -index cc389fb..274f64c 100644 ---- a/arch/arm/mach-omap2/powerdomains2xxx_data.c -+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c -@@ -38,6 +38,7 @@ static struct powerdomain dsp_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, - }, -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain mpu_24xx_pwrdm = { -@@ -53,6 +54,7 @@ static struct powerdomain mpu_24xx_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, - }, -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain core_24xx_pwrdm = { -@@ -71,6 +73,7 @@ static struct powerdomain core_24xx_pwrdm = { - [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ - [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - -@@ -95,6 +98,7 @@ static struct powerdomain mdm_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* MEMONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - #endif /* CONFIG_SOC_OMAP2430 */ -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 25cfb5c..cacd76e 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -180,6 +180,7 @@ static inline int omap_voltage_late_init(void) - } - #endif - -+extern void omap2xxx_voltagedomains_init(void); - extern void omap3xxx_voltagedomains_init(void); - extern void omap44xx_voltagedomains_init(void); - -diff --git a/arch/arm/mach-omap2/voltagedomains2xxx_data.c b/arch/arm/mach-omap2/voltagedomains2xxx_data.c -new file mode 100644 -index 0000000..69ff261 ---- /dev/null -+++ b/arch/arm/mach-omap2/voltagedomains2xxx_data.c -@@ -0,0 +1,32 @@ -+/* -+ * OMAP3 voltage domain data -+ * -+ * Copyright (C) 2007, 2010 Texas Instruments, Inc. -+ -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/kernel.h> -+#include <linux/init.h> -+ -+#include "voltage.h" -+ -+static struct voltagedomain omap2_voltdm_core = { -+ .name = "core", -+}; -+ -+static struct voltagedomain omap2_voltdm_wkup = { -+ .name = "wakeup", -+}; -+ -+static struct voltagedomain *voltagedomains_omap2[] __initdata = { -+ &omap2_voltdm_core, -+ &omap2_voltdm_wkup, -+ NULL, -+}; -+ -+void __init omap2xxx_voltagedomains_init(void) -+{ -+ voltdm_init(voltagedomains_omap2); -+} --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage-domains.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage-domains.patch deleted file mode 100644 index 7481b06..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage-domains.patch +++ /dev/null @@ -1,161 +0,0 @@ -From a44878fc9328d0ee6101d328f16a1f08bd123ba0 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Fri, 18 Mar 2011 14:12:18 -0700 -Subject: [PATCH 105/149] OMAP3: powerdomain data: add voltage domains - -Add voltage domain name to indicate which voltagedomain each -powerdomain is in. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | 2 ++ - arch/arm/mach-omap2/powerdomains3xxx_data.c | 16 ++++++++++++++++ - 2 files changed, 18 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c -index 4210c33..2242c8e 100644 ---- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c -+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c -@@ -70,6 +70,7 @@ struct powerdomain gfx_omap2_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* MEMONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - struct powerdomain wkup_omap2_pwrdm = { -@@ -77,4 +78,5 @@ struct powerdomain wkup_omap2_pwrdm = { - .prcm_offs = WKUP_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), - .pwrsts = PWRSTS_ON, -+ .voltdm = { .name = "wakeup" }, - }; -diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c -index 469a920..1f37c0c 100644 ---- a/arch/arm/mach-omap2/powerdomains3xxx_data.c -+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c -@@ -52,6 +52,7 @@ static struct powerdomain iva2_pwrdm = { - [2] = PWRSTS_OFF_ON, - [3] = PWRSTS_ON, - }, -+ .voltdm = { .name = "mpu_iva" }, - }; - - static struct powerdomain mpu_3xxx_pwrdm = { -@@ -68,6 +69,7 @@ static struct powerdomain mpu_3xxx_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_OFF_ON, - }, -+ .voltdm = { .name = "mpu_iva" }, - }; - - /* -@@ -98,6 +100,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { - [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ - [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain core_3xxx_es3_1_pwrdm = { -@@ -121,6 +124,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = { - [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ - [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain dss_pwrdm = { -@@ -136,6 +140,7 @@ static struct powerdomain dss_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* MEMONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - /* -@@ -157,6 +162,7 @@ static struct powerdomain sgx_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* MEMONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain cam_pwrdm = { -@@ -172,6 +178,7 @@ static struct powerdomain cam_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* MEMONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain per_pwrdm = { -@@ -187,12 +194,14 @@ static struct powerdomain per_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* MEMONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain emu_pwrdm = { - .name = "emu_pwrdm", - .prcm_offs = OMAP3430_EMU_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain neon_pwrdm = { -@@ -201,6 +210,7 @@ static struct powerdomain neon_pwrdm = { - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), - .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRSTS_RET, -+ .voltdm = { .name = "mpu_iva" }, - }; - - static struct powerdomain usbhost_pwrdm = { -@@ -223,36 +233,42 @@ static struct powerdomain usbhost_pwrdm = { - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* MEMONSTATE */ - }, -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain dpll1_pwrdm = { - .name = "dpll1_pwrdm", - .prcm_offs = MPU_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -+ .voltdm = { .name = "mpu_iva" }, - }; - - static struct powerdomain dpll2_pwrdm = { - .name = "dpll2_pwrdm", - .prcm_offs = OMAP3430_IVA2_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -+ .voltdm = { .name = "mpu_iva" }, - }; - - static struct powerdomain dpll3_pwrdm = { - .name = "dpll3_pwrdm", - .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain dpll4_pwrdm = { - .name = "dpll4_pwrdm", - .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -+ .voltdm = { .name = "core" }, - }; - - static struct powerdomain dpll5_pwrdm = { - .name = "dpll5_pwrdm", - .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), -+ .voltdm = { .name = "core" }, - }; - - /* As powerdomains are added or removed above, this list must also be changed */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage-domains.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage-domains.patch deleted file mode 100644 index 14b904f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage-domains.patch +++ /dev/null @@ -1,177 +0,0 @@ -From a5fc50f2405625fef21c78c46e0e9427eb202f15 Mon Sep 17 00:00:00 2001 -From: Benoit Cousson <b-cousson@ti.com> -Date: Mon, 21 Mar 2011 12:11:54 +0100 -Subject: [PATCH 106/149] OMAP4: powerdomain data: add voltage domains - -Add voltage domain name to indicate which voltagedomain each -powerdomain is in. - -The fixed voltage domain like ldo_wakeup for emu and wkup power -domain is added too. - -Update the TI copyright date to 2011. - -Signed-off-by: Benoit Cousson <b-cousson@ti.com> -Cc: Paul Walmsley <paul@pwsan.com> -[khilman@ti.com]: renamed wakeup domain: s/ldo_wakeup/wakeup/ -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/powerdomains44xx_data.c | 16 ++++++++++++++++ - arch/arm/mach-omap2/voltagedomains44xx_data.c | 5 +++++ - 2 files changed, 21 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c -index 247e794..45c7f29 100644 ---- a/arch/arm/mach-omap2/powerdomains44xx_data.c -+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c -@@ -33,6 +33,7 @@ - /* core_44xx_pwrdm: CORE power domain */ - static struct powerdomain core_44xx_pwrdm = { - .name = "core_pwrdm", -+ .voltdm = { .name = "core" }, - .prcm_offs = OMAP4430_PRM_CORE_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -59,6 +60,7 @@ static struct powerdomain core_44xx_pwrdm = { - /* gfx_44xx_pwrdm: 3D accelerator power domain */ - static struct powerdomain gfx_44xx_pwrdm = { - .name = "gfx_pwrdm", -+ .voltdm = { .name = "core" }, - .prcm_offs = OMAP4430_PRM_GFX_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -76,6 +78,7 @@ static struct powerdomain gfx_44xx_pwrdm = { - /* abe_44xx_pwrdm: Audio back end power domain */ - static struct powerdomain abe_44xx_pwrdm = { - .name = "abe_pwrdm", -+ .voltdm = { .name = "iva" }, - .prcm_offs = OMAP4430_PRM_ABE_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -96,6 +99,7 @@ static struct powerdomain abe_44xx_pwrdm = { - /* dss_44xx_pwrdm: Display subsystem power domain */ - static struct powerdomain dss_44xx_pwrdm = { - .name = "dss_pwrdm", -+ .voltdm = { .name = "core" }, - .prcm_offs = OMAP4430_PRM_DSS_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -114,6 +118,7 @@ static struct powerdomain dss_44xx_pwrdm = { - /* tesla_44xx_pwrdm: Tesla processor power domain */ - static struct powerdomain tesla_44xx_pwrdm = { - .name = "tesla_pwrdm", -+ .voltdm = { .name = "iva" }, - .prcm_offs = OMAP4430_PRM_TESLA_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -136,6 +141,7 @@ static struct powerdomain tesla_44xx_pwrdm = { - /* wkup_44xx_pwrdm: Wake-up power domain */ - static struct powerdomain wkup_44xx_pwrdm = { - .name = "wkup_pwrdm", -+ .voltdm = { .name = "wakeup" }, - .prcm_offs = OMAP4430_PRM_WKUP_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -152,6 +158,7 @@ static struct powerdomain wkup_44xx_pwrdm = { - /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */ - static struct powerdomain cpu0_44xx_pwrdm = { - .name = "cpu0_pwrdm", -+ .voltdm = { .name = "mpu" }, - .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, - .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -169,6 +176,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { - /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */ - static struct powerdomain cpu1_44xx_pwrdm = { - .name = "cpu1_pwrdm", -+ .voltdm = { .name = "mpu" }, - .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, - .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -186,6 +194,7 @@ static struct powerdomain cpu1_44xx_pwrdm = { - /* emu_44xx_pwrdm: Emulation power domain */ - static struct powerdomain emu_44xx_pwrdm = { - .name = "emu_pwrdm", -+ .voltdm = { .name = "wakeup" }, - .prcm_offs = OMAP4430_PRM_EMU_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -202,6 +211,7 @@ static struct powerdomain emu_44xx_pwrdm = { - /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */ - static struct powerdomain mpu_44xx_pwrdm = { - .name = "mpu_pwrdm", -+ .voltdm = { .name = "mpu" }, - .prcm_offs = OMAP4430_PRM_MPU_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -223,6 +233,7 @@ static struct powerdomain mpu_44xx_pwrdm = { - /* ivahd_44xx_pwrdm: IVA-HD power domain */ - static struct powerdomain ivahd_44xx_pwrdm = { - .name = "ivahd_pwrdm", -+ .voltdm = { .name = "iva" }, - .prcm_offs = OMAP4430_PRM_IVAHD_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -247,6 +258,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { - /* cam_44xx_pwrdm: Camera subsystem power domain */ - static struct powerdomain cam_44xx_pwrdm = { - .name = "cam_pwrdm", -+ .voltdm = { .name = "core" }, - .prcm_offs = OMAP4430_PRM_CAM_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -264,6 +276,7 @@ static struct powerdomain cam_44xx_pwrdm = { - /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ - static struct powerdomain l3init_44xx_pwrdm = { - .name = "l3init_pwrdm", -+ .voltdm = { .name = "core" }, - .prcm_offs = OMAP4430_PRM_L3INIT_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -282,6 +295,7 @@ static struct powerdomain l3init_44xx_pwrdm = { - /* l4per_44xx_pwrdm: Target peripherals power domain */ - static struct powerdomain l4per_44xx_pwrdm = { - .name = "l4per_pwrdm", -+ .voltdm = { .name = "core" }, - .prcm_offs = OMAP4430_PRM_L4PER_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -305,6 +319,7 @@ static struct powerdomain l4per_44xx_pwrdm = { - */ - static struct powerdomain always_on_core_44xx_pwrdm = { - .name = "always_on_core_pwrdm", -+ .voltdm = { .name = "core" }, - .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -@@ -314,6 +329,7 @@ static struct powerdomain always_on_core_44xx_pwrdm = { - /* cefuse_44xx_pwrdm: Customer efuse controller power domain */ - static struct powerdomain cefuse_44xx_pwrdm = { - .name = "cefuse_pwrdm", -+ .voltdm = { .name = "core" }, - .prcm_offs = OMAP4430_PRM_CEFUSE_INST, - .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index 95e1ce5..9a17b5e 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -86,10 +86,15 @@ static struct voltagedomain omap4_voltdm_core = { - .vdd = &omap4_vdd_core_info, - }; - -+static struct voltagedomain omap4_voltdm_wkup = { -+ .name = "wakeup", -+}; -+ - static struct voltagedomain *voltagedomains_omap4[] __initdata = { - &omap4_voltdm_mpu, - &omap4_voltdm_iva, - &omap4_voltdm_core, -+ &omap4_voltdm_wkup, - NULL, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain-lookup-during-r.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain-lookup-during-r.patch deleted file mode 100644 index 39c6fc1..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain-lookup-during-r.patch +++ /dev/null @@ -1,89 +0,0 @@ -From a57d61507ab997c347ee584b86eb54391d79bf41 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 16 Mar 2011 15:52:47 -0700 -Subject: [PATCH 107/149] OMAP2+: powerdomain: add voltage domain lookup during register - -When a powerdomain is registered, lookup the voltage domain by name -and keep a pointer to the containing voltagedomain in the powerdomain -structure. - -Modeled after similar method between powerdomain and clockdomain layers. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/powerdomain.c | 21 +++++++++++++++++++++ - arch/arm/mach-omap2/powerdomain.h | 1 + - arch/arm/mach-omap2/voltage.h | 1 + - 3 files changed, 23 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c -index 9af0847..1d3013d 100644 ---- a/arch/arm/mach-omap2/powerdomain.c -+++ b/arch/arm/mach-omap2/powerdomain.c -@@ -77,6 +77,7 @@ static struct powerdomain *_pwrdm_lookup(const char *name) - static int _pwrdm_register(struct powerdomain *pwrdm) - { - int i; -+ struct voltagedomain *voltdm; - - if (!pwrdm || !pwrdm->name) - return -EINVAL; -@@ -94,6 +95,14 @@ static int _pwrdm_register(struct powerdomain *pwrdm) - if (_pwrdm_lookup(pwrdm->name)) - return -EEXIST; - -+ voltdm = voltdm_lookup(pwrdm->voltdm.name); -+ if (!voltdm) { -+ pr_err("powerdomain: %s: voltagedomain %s does not exist\n", -+ pwrdm->name, pwrdm->voltdm.name); -+ return -EINVAL; -+ } -+ pwrdm->voltdm.ptr = voltdm; -+ - list_add(&pwrdm->node, &pwrdm_list); - - /* Initialize the powerdomain's state counter */ -@@ -383,6 +392,18 @@ int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, - } - - /** -+ * pwrdm_get_voltdm - return a ptr to the voltdm that this pwrdm resides in -+ * @pwrdm: struct powerdomain * -+ * -+ * Return a pointer to the struct voltageomain that the specified powerdomain -+ * @pwrdm exists in. -+ */ -+struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm) -+{ -+ return pwrdm->voltdm.ptr; -+} -+ -+/** - * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain - * @pwrdm: struct powerdomain * - * -diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h -index 9ce920d..25bef48 100644 ---- a/arch/arm/mach-omap2/powerdomain.h -+++ b/arch/arm/mach-omap2/powerdomain.h -@@ -183,6 +183,7 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); - int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, - int (*fn)(struct powerdomain *pwrdm, - struct clockdomain *clkdm)); -+struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm); - - int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index cacd76e..966aa88 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -186,4 +186,5 @@ extern void omap44xx_voltagedomains_init(void); - - struct voltagedomain *voltdm_lookup(const char *name); - void voltdm_init(struct voltagedomain **voltdm_list); -+int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of-powerdomains-in-each-vol.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of-powerdomains-in-each-vol.patch deleted file mode 100644 index 84ecc50..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of-powerdomains-in-each-vol.patch +++ /dev/null @@ -1,200 +0,0 @@ -From 31e518c4d9758553f36e3dcd1138ac31f68bf571 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 16 Mar 2011 16:13:15 -0700 -Subject: [PATCH 108/149] OMAP2+: voltage: keep track of powerdomains in each voltagedomain - -When a powerdomain is registered and it has an associated voltage domain, -add the powerdomain to the voltagedomain using voltdm_add_pwrdm(). - -Also add voltagedomain iterator helper functions to iterate over all -registered voltagedomains and all powerdomains associated with a -voltagedomain. - -Modeled after a similar relationship between clockdomains and powerdomains. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/powerdomain.c | 2 + - arch/arm/mach-omap2/powerdomain.h | 2 + - arch/arm/mach-omap2/voltage.c | 80 +++++++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/voltage.h | 10 +++++ - 4 files changed, 94 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c -index 1d3013d..12135e2 100644 ---- a/arch/arm/mach-omap2/powerdomain.c -+++ b/arch/arm/mach-omap2/powerdomain.c -@@ -102,6 +102,8 @@ static int _pwrdm_register(struct powerdomain *pwrdm) - return -EINVAL; - } - pwrdm->voltdm.ptr = voltdm; -+ INIT_LIST_HEAD(&pwrdm->voltdm_node); -+ voltdm_add_pwrdm(voltdm, pwrdm); - - list_add(&pwrdm->node, &pwrdm_list); - -diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h -index 25bef48..2c685a5 100644 ---- a/arch/arm/mach-omap2/powerdomain.h -+++ b/arch/arm/mach-omap2/powerdomain.h -@@ -92,6 +92,7 @@ struct powerdomain; - * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON - * @pwrdm_clkdms: Clockdomains in this powerdomain - * @node: list_head linking all powerdomains -+ * @voltdm_node: list_head linking all powerdomains in a voltagedomain - * @state: - * @state_counter: - * @timer: -@@ -116,6 +117,7 @@ struct powerdomain { - const u8 prcm_partition; - struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; - struct list_head node; -+ struct list_head voltdm_node; - int state; - unsigned state_counter[PWRDM_MAX_PWRSTS]; - unsigned ret_logic_off_counter; -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 48a2593..1e5c122 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -36,6 +36,7 @@ - #include "control.h" - - #include "voltage.h" -+#include "powerdomain.h" - - #include "vc.h" - #include "vp.h" -@@ -1085,11 +1086,90 @@ static struct voltagedomain *_voltdm_lookup(const char *name) - return voltdm; - } - -+/** -+ * voltdm_add_pwrdm - add a powerdomain to a voltagedomain -+ * @voltdm: struct voltagedomain * to add the powerdomain to -+ * @pwrdm: struct powerdomain * to associate with a voltagedomain -+ * -+ * Associate the powerdomain @pwrdm with a voltagedomain @voltdm. This -+ * enables the use of voltdm_for_each_pwrdm(). Returns -EINVAL if -+ * presented with invalid pointers; -ENOMEM if memory could not be allocated; -+ * or 0 upon success. -+ */ -+int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm) -+{ -+ if (!voltdm || !pwrdm) -+ return -EINVAL; -+ -+ pr_debug("voltagedomain: associating powerdomain %s with voltagedomain " -+ "%s\n", pwrdm->name, voltdm->name); -+ -+ list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list); -+ -+ return 0; -+} -+ -+/** -+ * voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm -+ * @voltdm: struct voltagedomain * to iterate over -+ * @fn: callback function * -+ * -+ * Call the supplied function @fn for each powerdomain in the -+ * voltagedomain @voltdm. Returns -EINVAL if presented with invalid -+ * pointers; or passes along the last return value of the callback -+ * function, which should be 0 for success or anything else to -+ * indicate failure. -+ */ -+int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, -+ int (*fn)(struct voltagedomain *voltdm, -+ struct powerdomain *pwrdm)) -+{ -+ struct powerdomain *pwrdm; -+ int ret = 0; -+ -+ if (!fn) -+ return -EINVAL; -+ -+ list_for_each_entry(pwrdm, &voltdm->pwrdm_list, voltdm_node) -+ ret = (*fn)(voltdm, pwrdm); -+ -+ return ret; -+} -+ -+/** -+ * voltdm_for_each - call function on each registered voltagedomain -+ * @fn: callback function * -+ * -+ * Call the supplied function @fn for each registered voltagedomain. -+ * The callback function @fn can return anything but 0 to bail out -+ * early from the iterator. Returns the last return value of the -+ * callback function, which should be 0 for success or anything else -+ * to indicate failure; or -EINVAL if the function pointer is null. -+ */ -+int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), -+ void *user) -+{ -+ struct voltagedomain *temp_voltdm; -+ int ret = 0; -+ -+ if (!fn) -+ return -EINVAL; -+ -+ list_for_each_entry(temp_voltdm, &voltdm_list, node) { -+ ret = (*fn)(temp_voltdm, user); -+ if (ret) -+ break; -+ } -+ -+ return ret; -+} -+ - static int _voltdm_register(struct voltagedomain *voltdm) - { - if (!voltdm || !voltdm->name) - return -EINVAL; - -+ INIT_LIST_HEAD(&voltdm->pwrdm_list); - list_add(&voltdm->node, &voltdm_list); - - pr_debug("voltagedomain: registered %s\n", voltdm->name); -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 966aa88..b41d9f1 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -19,6 +19,8 @@ - #include "vc.h" - #include "vp.h" - -+struct powerdomain; -+ - /* XXX document */ - #define VOLTSCALE_VPFORCEUPDATE 1 - #define VOLTSCALE_VCBYPASS 2 -@@ -55,12 +57,15 @@ struct omap_vfsm_instance_data { - * @name: Name of the voltage domain which can be used as a unique identifier. - * @scalable: Whether or not this voltage domain is scalable - * @node: list_head linking all voltage domains -+ * @pwrdm_node: list_head linking all powerdomains in this voltagedomain - * @vdd: to be removed -+ * @pwrdms: powerdomains in this voltagedomain - */ - struct voltagedomain { - char *name; - bool scalable; - struct list_head node; -+ struct list_head pwrdm_list; - struct omap_vdd_info *vdd; - }; - -@@ -187,4 +192,9 @@ extern void omap44xx_voltagedomains_init(void); - struct voltagedomain *voltdm_lookup(const char *name); - void voltdm_init(struct voltagedomain **voltdm_list); - int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); -+int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), -+ void *user); -+int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, -+ int (*fn)(struct voltagedomain *voltdm, -+ struct powerdomain *pwrdm)); - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC-code-into-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC-code-into-.patch deleted file mode 100644 index f14a21b..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC-code-into-.patch +++ /dev/null @@ -1,666 +0,0 @@ -From 981e5f23fe781d26d69d8cc212674eab0353dea4 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 21 Mar 2011 14:08:55 -0700 -Subject: [PATCH 109/149] OMAP2+: voltage: split voltage controller (VC) code into dedicated layer - -As part of the voltage layer cleanup, split out VC specific code into -a dedicated VC layer. This patch primarily just moves VC code from -voltage.c into vc.c, and adds prototypes to vc.h. - -No functional changes. - -For readability, each function was given a local 'vc' pointer: - - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; - -and a global replace of s/vdd->vc_data/vc/ was done. - -Also vc_init was renamed to vc_init_channel to reflect that this is -per-VC channel initializtion. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/Makefile | 2 +- - arch/arm/mach-omap2/vc.c | 276 +++++++++++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/vc.h | 12 ++ - arch/arm/mach-omap2/voltage.c | 264 +-------------------------------------- - 4 files changed, 293 insertions(+), 261 deletions(-) - create mode 100644 arch/arm/mach-omap2/vc.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index 1b6cecd..ecbf361 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ - - # OMAP voltage domains - ifeq ($(CONFIG_PM),y) --voltagedomain-common := voltage.o -+voltagedomain-common := voltage.o vc.o - obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ - voltagedomains2xxx_data.o - obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -new file mode 100644 -index 0000000..98f5a4b ---- /dev/null -+++ b/arch/arm/mach-omap2/vc.c -@@ -0,0 +1,276 @@ -+#include <linux/kernel.h> -+#include <linux/delay.h> -+#include <linux/init.h> -+ -+#include <plat/cpu.h> -+ -+#include "voltage.h" -+#include "vc.h" -+#include "prm-regbits-34xx.h" -+#include "prm-regbits-44xx.h" -+#include "prm44xx.h" -+ -+/* Voltage scale and accessory APIs */ -+int omap_vc_pre_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt, -+ u8 *target_vsel, u8 *current_vsel) -+{ -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ struct omap_volt_data *volt_data; -+ const struct omap_vc_common_data *vc_common; -+ const struct omap_vp_common_data *vp_common; -+ u32 vc_cmdval, vp_errgain_val; -+ -+ vc_common = vc->vc_common; -+ vp_common = vdd->vp_data->vp_common; -+ -+ /* Check if sufficient pmic info is available for this vdd */ -+ if (!vdd->pmic_info) { -+ pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", -+ __func__, voltdm->name); -+ return -EINVAL; -+ } -+ -+ if (!vdd->pmic_info->uv_to_vsel) { -+ pr_err("%s: PMIC function to convert voltage in uV to" -+ "vsel not registered. Hence unable to scale voltage" -+ "for vdd_%s\n", __func__, voltdm->name); -+ return -ENODATA; -+ } -+ -+ if (!vdd->read_reg || !vdd->write_reg) { -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", -+ __func__, voltdm->name); -+ return -EINVAL; -+ } -+ -+ /* Get volt_data corresponding to target_volt */ -+ volt_data = omap_voltage_get_voltdata(voltdm, target_volt); -+ if (IS_ERR(volt_data)) -+ volt_data = NULL; -+ -+ *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); -+ *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); -+ -+ /* Setting the ON voltage to the new target voltage */ -+ vc_cmdval = vdd->read_reg(vc->vc_common->prm_mod, vc->cmdval_reg); -+ vc_cmdval &= ~vc_common->cmd_on_mask; -+ vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); -+ vdd->write_reg(vc_cmdval, vc->vc_common->prm_mod, vc->cmdval_reg); -+ -+ /* Setting vp errorgain based on the voltage */ -+ if (volt_data) { -+ vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, -+ vdd->vp_data->vpconfig); -+ vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; -+ vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; -+ vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << -+ vp_common->vpconfig_errorgain_shift; -+ vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, -+ vdd->vp_data->vpconfig); -+ } -+ -+ return 0; -+} -+ -+void omap_vc_post_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt, -+ u8 target_vsel, u8 current_vsel) -+{ -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ u32 smps_steps = 0, smps_delay = 0; -+ -+ smps_steps = abs(target_vsel - current_vsel); -+ /* SMPS slew rate / step size. 2us added as buffer. */ -+ smps_delay = ((smps_steps * vdd->pmic_info->step_size) / -+ vdd->pmic_info->slew_rate) + 2; -+ udelay(smps_delay); -+ -+ vdd->curr_volt = target_volt; -+} -+ -+/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ -+int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, -+ unsigned long target_volt) -+{ -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ u32 loop_cnt = 0, retries_cnt = 0; -+ u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; -+ u8 target_vsel, current_vsel; -+ int ret; -+ -+ ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); -+ if (ret) -+ return ret; -+ -+ vc_valid = vc->vc_common->valid; -+ vc_bypass_val_reg = vc->vc_common->bypass_val_reg; -+ vc_bypass_value = (target_vsel << vc->vc_common->data_shift) | -+ (vdd->pmic_info->pmic_reg << -+ vc->vc_common->regaddr_shift) | -+ (vdd->pmic_info->i2c_slave_addr << -+ vc->vc_common->slaveaddr_shift); -+ -+ vdd->write_reg(vc_bypass_value, vc->vc_common->prm_mod, vc_bypass_val_reg); -+ vdd->write_reg(vc_bypass_value | vc_valid, vc->vc_common->prm_mod, -+ vc_bypass_val_reg); -+ -+ vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, vc_bypass_val_reg); -+ /* -+ * Loop till the bypass command is acknowledged from the SMPS. -+ * NOTE: This is legacy code. The loop count and retry count needs -+ * to be revisited. -+ */ -+ while (!(vc_bypass_value & vc_valid)) { -+ loop_cnt++; -+ -+ if (retries_cnt > 10) { -+ pr_warning("%s: Retry count exceeded\n", __func__); -+ return -ETIMEDOUT; -+ } -+ -+ if (loop_cnt > 50) { -+ retries_cnt++; -+ loop_cnt = 0; -+ udelay(10); -+ } -+ vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, -+ vc_bypass_val_reg); -+ } -+ -+ omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); -+ return 0; -+} -+ -+static void __init omap3_vfsm_init(struct voltagedomain *voltdm) -+{ -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ -+ /* -+ * Voltage Manager FSM parameters init -+ * XXX This data should be passed in from the board file -+ */ -+ vdd->write_reg(OMAP3_CLKSETUP, vc->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); -+ vdd->write_reg(OMAP3_VOLTOFFSET, vc->vc_common->prm_mod, -+ OMAP3_PRM_VOLTOFFSET_OFFSET); -+ vdd->write_reg(OMAP3_VOLTSETUP2, vc->vc_common->prm_mod, -+ OMAP3_PRM_VOLTSETUP2_OFFSET); -+} -+ -+static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) -+{ -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ static bool is_initialized; -+ u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; -+ u32 vc_val; -+ -+ if (is_initialized) -+ return; -+ -+ /* Set up the on, inactive, retention and off voltage */ -+ on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); -+ onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); -+ ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); -+ off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); -+ vc_val = ((on_vsel << vc->vc_common->cmd_on_shift) | -+ (onlp_vsel << vc->vc_common->cmd_onlp_shift) | -+ (ret_vsel << vc->vc_common->cmd_ret_shift) | -+ (off_vsel << vc->vc_common->cmd_off_shift)); -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, vc->cmdval_reg); -+ -+ /* -+ * Generic VC parameters init -+ * XXX This data should be abstracted out -+ */ -+ vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->vc_common->prm_mod, -+ OMAP3_PRM_VC_CH_CONF_OFFSET); -+ vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->vc_common->prm_mod, -+ OMAP3_PRM_VC_I2C_CFG_OFFSET); -+ -+ omap3_vfsm_init(voltdm); -+ -+ is_initialized = true; -+} -+ -+ -+/* OMAP4 specific voltage init functions */ -+static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) -+{ -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ static bool is_initialized; -+ u32 vc_val; -+ -+ if (is_initialized) -+ return; -+ -+ /* TODO: Configure setup times and CMD_VAL values*/ -+ -+ /* -+ * Generic VC parameters init -+ * XXX This data should be abstracted out -+ */ -+ vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | -+ OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | -+ OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); -+ -+ /* XXX These are magic numbers and do not belong! */ -+ vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); -+ -+ is_initialized = true; -+} -+ -+void __init omap_vc_init_channel(struct voltagedomain *voltdm) -+{ -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ u32 vc_val; -+ -+ if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { -+ pr_err("%s: PMIC info requried to configure vc for" -+ "vdd_%s not populated.Hence cannot initialize vc\n", -+ __func__, voltdm->name); -+ return; -+ } -+ -+ if (!vdd->read_reg || !vdd->write_reg) { -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", -+ __func__, voltdm->name); -+ return; -+ } -+ -+ /* Set up the SMPS_SA(i2c slave address in VC */ -+ vc_val = vdd->read_reg(vc->vc_common->prm_mod, -+ vc->vc_common->smps_sa_reg); -+ vc_val &= ~vc->smps_sa_mask; -+ vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, -+ vc->vc_common->smps_sa_reg); -+ -+ /* Setup the VOLRA(pmic reg addr) in VC */ -+ vc_val = vdd->read_reg(vc->vc_common->prm_mod, -+ vc->vc_common->smps_volra_reg); -+ vc_val &= ~vc->smps_volra_mask; -+ vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, -+ vc->vc_common->smps_volra_reg); -+ -+ /* Configure the setup times */ -+ vc_val = vdd->read_reg(vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); -+ vc_val &= ~vdd->vfsm->voltsetup_mask; -+ vc_val |= vdd->pmic_info->volt_setup_time << -+ vdd->vfsm->voltsetup_shift; -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); -+ -+ if (cpu_is_omap34xx()) -+ omap3_vc_init_channel(voltdm); -+ else if (cpu_is_omap44xx()) -+ omap4_vc_init_channel(voltdm); -+} -+ -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index f7338af..d0bf348 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -19,6 +19,8 @@ - - #include <linux/kernel.h> - -+struct voltagedomain; -+ - /** - * struct omap_vc_common_data - per-VC register/bitfield data - * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register -@@ -81,5 +83,15 @@ extern struct omap_vc_instance_data omap4_vc_mpu_data; - extern struct omap_vc_instance_data omap4_vc_iva_data; - extern struct omap_vc_instance_data omap4_vc_core_data; - -+void omap_vc_init_channel(struct voltagedomain *voltdm); -+int omap_vc_pre_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt, -+ u8 *target_vsel, u8 *current_vsel); -+void omap_vc_post_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt, -+ u8 target_vsel, u8 current_vsel); -+int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, -+ unsigned long target_volt); -+ - #endif - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 1e5c122..6ba6e49 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -293,136 +293,6 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) - &nom_volt_debug_fops); - } - --/* Voltage scale and accessory APIs */ --static int _pre_volt_scale(struct voltagedomain *voltdm, -- unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- struct omap_volt_data *volt_data; -- const struct omap_vc_common_data *vc_common; -- const struct omap_vp_common_data *vp_common; -- u32 vc_cmdval, vp_errgain_val; -- -- vc_common = vdd->vc_data->vc_common; -- vp_common = vdd->vp_data->vp_common; -- -- /* Check if suffiecient pmic info is available for this vdd */ -- if (!vdd->pmic_info) { -- pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", -- __func__, voltdm->name); -- return -EINVAL; -- } -- -- if (!vdd->pmic_info->uv_to_vsel) { -- pr_err("%s: PMIC function to convert voltage in uV to" -- "vsel not registered. Hence unable to scale voltage" -- "for vdd_%s\n", __func__, voltdm->name); -- return -ENODATA; -- } -- -- if (!vdd->read_reg || !vdd->write_reg) { -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", -- __func__, voltdm->name); -- return -EINVAL; -- } -- -- /* Get volt_data corresponding to target_volt */ -- volt_data = omap_voltage_get_voltdata(voltdm, target_volt); -- if (IS_ERR(volt_data)) -- volt_data = NULL; -- -- *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); -- *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); -- -- /* Setting the ON voltage to the new target voltage */ -- vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); -- vc_cmdval &= ~vc_common->cmd_on_mask; -- vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); -- vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); -- -- /* Setting vp errorgain based on the voltage */ -- if (volt_data) { -- vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, -- vdd->vp_data->vpconfig); -- vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; -- vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; -- vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << -- vp_common->vpconfig_errorgain_shift; -- vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, -- vdd->vp_data->vpconfig); -- } -- -- return 0; --} -- --static void _post_volt_scale(struct voltagedomain *voltdm, -- unsigned long target_volt, u8 target_vsel, u8 current_vsel) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- u32 smps_steps = 0, smps_delay = 0; -- -- smps_steps = abs(target_vsel - current_vsel); -- /* SMPS slew rate / step size. 2us added as buffer. */ -- smps_delay = ((smps_steps * vdd->pmic_info->step_size) / -- vdd->pmic_info->slew_rate) + 2; -- udelay(smps_delay); -- -- vdd->curr_volt = target_volt; --} -- --/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ --static int vc_bypass_scale_voltage(struct voltagedomain *voltdm, -- unsigned long target_volt) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- u32 loop_cnt = 0, retries_cnt = 0; -- u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; -- u8 target_vsel, current_vsel; -- int ret; -- -- ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); -- if (ret) -- return ret; -- -- vc_valid = vdd->vc_data->vc_common->valid; -- vc_bypass_val_reg = vdd->vc_data->vc_common->bypass_val_reg; -- vc_bypass_value = (target_vsel << vdd->vc_data->vc_common->data_shift) | -- (vdd->pmic_info->pmic_reg << -- vdd->vc_data->vc_common->regaddr_shift) | -- (vdd->pmic_info->i2c_slave_addr << -- vdd->vc_data->vc_common->slaveaddr_shift); -- -- vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); -- vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data->vc_common->prm_mod, -- vc_bypass_val_reg); -- -- vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); -- /* -- * Loop till the bypass command is acknowledged from the SMPS. -- * NOTE: This is legacy code. The loop count and retry count needs -- * to be revisited. -- */ -- while (!(vc_bypass_value & vc_valid)) { -- loop_cnt++; -- -- if (retries_cnt > 10) { -- pr_warning("%s: Retry count exceeded\n", __func__); -- return -ETIMEDOUT; -- } -- -- if (loop_cnt > 50) { -- retries_cnt++; -- loop_cnt = 0; -- udelay(10); -- } -- vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, -- vc_bypass_val_reg); -- } -- -- _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); -- return 0; --} -- - /* VP force update method of voltage scaling */ - static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt) -@@ -432,7 +302,7 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, - u8 target_vsel, current_vsel; - int ret, timeout = 0; - -- ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); -+ ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); - if (ret) - return ret; - -@@ -485,7 +355,7 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, - "TRANXDONE never got set after the voltage update\n", - __func__, voltdm->name); - -- _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); -+ omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); - - /* - * Disable TransactionDone interrupt , clear all status, clear -@@ -517,132 +387,6 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, - return 0; - } - --static void __init omap3_vfsm_init(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- -- /* -- * Voltage Manager FSM parameters init -- * XXX This data should be passed in from the board file -- */ -- vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); -- vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common->prm_mod, -- OMAP3_PRM_VOLTOFFSET_OFFSET); -- vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common->prm_mod, -- OMAP3_PRM_VOLTSETUP2_OFFSET); --} -- --static void __init omap3_vc_init(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- static bool is_initialized; -- u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; -- u32 vc_val; -- -- if (is_initialized) -- return; -- -- /* Set up the on, inactive, retention and off voltage */ -- on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); -- onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); -- ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); -- off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); -- vc_val = ((on_vsel << vdd->vc_data->vc_common->cmd_on_shift) | -- (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | -- (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | -- (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); -- -- /* -- * Generic VC parameters init -- * XXX This data should be abstracted out -- */ -- vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod, -- OMAP3_PRM_VC_CH_CONF_OFFSET); -- vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, -- OMAP3_PRM_VC_I2C_CFG_OFFSET); -- -- omap3_vfsm_init(voltdm); -- -- is_initialized = true; --} -- -- --/* OMAP4 specific voltage init functions */ --static void __init omap4_vc_init(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- static bool is_initialized; -- u32 vc_val; -- -- if (is_initialized) -- return; -- -- /* TODO: Configure setup times and CMD_VAL values*/ -- -- /* -- * Generic VC parameters init -- * XXX This data should be abstracted out -- */ -- vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | -- OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | -- OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); -- -- /* XXX These are magic numbers and do not belong! */ -- vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); -- -- is_initialized = true; --} -- --static void __init omap_vc_init(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- u32 vc_val; -- -- if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { -- pr_err("%s: PMIC info requried to configure vc for" -- "vdd_%s not populated.Hence cannot initialize vc\n", -- __func__, voltdm->name); -- return; -- } -- -- if (!vdd->read_reg || !vdd->write_reg) { -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", -- __func__, voltdm->name); -- return; -- } -- -- /* Set up the SMPS_SA(i2c slave address in VC */ -- vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, -- vdd->vc_data->vc_common->smps_sa_reg); -- vc_val &= ~vdd->vc_data->smps_sa_mask; -- vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data->smps_sa_shift; -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, -- vdd->vc_data->vc_common->smps_sa_reg); -- -- /* Setup the VOLRA(pmic reg addr) in VC */ -- vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, -- vdd->vc_data->vc_common->smps_volra_reg); -- vc_val &= ~vdd->vc_data->smps_volra_mask; -- vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data->smps_volra_shift; -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, -- vdd->vc_data->vc_common->smps_volra_reg); -- -- /* Configure the setup times */ -- vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); -- vc_val &= ~vdd->vfsm->voltsetup_mask; -- vc_val |= vdd->pmic_info->volt_setup_time << -- vdd->vfsm->voltsetup_shift; -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); -- -- if (cpu_is_omap34xx()) -- omap3_vc_init(voltdm); -- else if (cpu_is_omap44xx()) -- omap4_vc_init(voltdm); --} -- - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) - { - struct omap_vdd_info *vdd = voltdm->vdd; -@@ -1025,7 +769,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, - vdd->volt_scale = vp_forceupdate_scale_voltage; - return; - case VOLTSCALE_VCBYPASS: -- vdd->volt_scale = vc_bypass_scale_voltage; -+ vdd->volt_scale = omap_vc_bypass_scale_voltage; - return; - default: - pr_warning("%s: Trying to change the method of voltage scaling" -@@ -1061,7 +805,7 @@ int __init omap_voltage_late_init(void) - if (voltdm->vdd) { - if (omap_vdd_data_configure(voltdm)) - continue; -- omap_vc_init(voltdm); -+ omap_vc_init_channel(voltdm); - vp_init(voltdm); - vdd_debugfs_init(voltdm); - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct-voltagedomain-misc.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct-voltagedomain-misc.patch deleted file mode 100644 index feb72d1..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct-voltagedomain-misc.patch +++ /dev/null @@ -1,544 +0,0 @@ -From 4b4aeca96cd144542cd21035d13885d9ef0b6980 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 22 Mar 2011 16:14:57 -0700 -Subject: [PATCH 110/149] OMAP2+: voltage: move VC into struct voltagedomain, misc. renames - -Move the VC instance struct from omap_vdd_info into struct voltagedomain. -While moving, perform some misc. renames for readability. - -No functional changes. - -Summary of renames: -- rename omap_vc_instance to omap_vc_channel, since there is only - one instance of the VC IP and this actually represents channels - using TRM terminology. -- rename 'vc_common' field of VC channel which led to: - s/vc->vc_common/vc->common/ -- remove redundant '_data' suffix -- OMAP3: vc1 --> vc_mpu, vc2 --> vc_core -- omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale() - -Signed-off-by: Kevin Hilman <khilman@ti.com> - -merge ---- - arch/arm/mach-omap2/vc.c | 90 ++++++++++++------------- - arch/arm/mach-omap2/vc.h | 26 ++++---- - arch/arm/mach-omap2/vc3xxx_data.c | 10 ++-- - arch/arm/mach-omap2/vc44xx_data.c | 14 ++-- - arch/arm/mach-omap2/voltage.c | 6 +- - arch/arm/mach-omap2/voltage.h | 5 +- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 4 +- - arch/arm/mach-omap2/voltagedomains44xx_data.c | 6 +- - 8 files changed, 80 insertions(+), 81 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 98f5a4b..7643940 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -15,14 +15,12 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - unsigned long target_volt, - u8 *target_vsel, u8 *current_vsel) - { -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - struct omap_volt_data *volt_data; -- const struct omap_vc_common_data *vc_common; - const struct omap_vp_common_data *vp_common; - u32 vc_cmdval, vp_errgain_val; - -- vc_common = vc->vc_common; - vp_common = vdd->vp_data->vp_common; - - /* Check if sufficient pmic info is available for this vdd */ -@@ -54,10 +52,10 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); - - /* Setting the ON voltage to the new target voltage */ -- vc_cmdval = vdd->read_reg(vc->vc_common->prm_mod, vc->cmdval_reg); -- vc_cmdval &= ~vc_common->cmd_on_mask; -- vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); -- vdd->write_reg(vc_cmdval, vc->vc_common->prm_mod, vc->cmdval_reg); -+ vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc->cmdval_reg); -+ vc_cmdval &= ~vc->common->cmd_on_mask; -+ vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); -+ vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc->cmdval_reg); - - /* Setting vp errorgain based on the voltage */ - if (volt_data) { -@@ -90,11 +88,11 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, - vdd->curr_volt = target_volt; - } - --/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ --int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, -- unsigned long target_volt) -+/* vc_bypass_scale - VC bypass method of voltage scaling */ -+int omap_vc_bypass_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt) - { -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - u32 loop_cnt = 0, retries_cnt = 0; - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; -@@ -105,19 +103,19 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, - if (ret) - return ret; - -- vc_valid = vc->vc_common->valid; -- vc_bypass_val_reg = vc->vc_common->bypass_val_reg; -- vc_bypass_value = (target_vsel << vc->vc_common->data_shift) | -+ vc_valid = vc->common->valid; -+ vc_bypass_val_reg = vc->common->bypass_val_reg; -+ vc_bypass_value = (target_vsel << vc->common->data_shift) | - (vdd->pmic_info->pmic_reg << -- vc->vc_common->regaddr_shift) | -+ vc->common->regaddr_shift) | - (vdd->pmic_info->i2c_slave_addr << -- vc->vc_common->slaveaddr_shift); -+ vc->common->slaveaddr_shift); - -- vdd->write_reg(vc_bypass_value, vc->vc_common->prm_mod, vc_bypass_val_reg); -- vdd->write_reg(vc_bypass_value | vc_valid, vc->vc_common->prm_mod, -+ vdd->write_reg(vc_bypass_value, vc->common->prm_mod, vc_bypass_val_reg); -+ vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod, - vc_bypass_val_reg); - -- vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, vc_bypass_val_reg); -+ vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg); - /* - * Loop till the bypass command is acknowledged from the SMPS. - * NOTE: This is legacy code. The loop count and retry count needs -@@ -136,7 +134,7 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, - loop_cnt = 0; - udelay(10); - } -- vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, -+ vc_bypass_value = vdd->read_reg(vc->common->prm_mod, - vc_bypass_val_reg); - } - -@@ -146,23 +144,23 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, - - static void __init omap3_vfsm_init(struct voltagedomain *voltdm) - { -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - - /* - * Voltage Manager FSM parameters init - * XXX This data should be passed in from the board file - */ -- vdd->write_reg(OMAP3_CLKSETUP, vc->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); -- vdd->write_reg(OMAP3_VOLTOFFSET, vc->vc_common->prm_mod, -+ vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); -+ vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod, - OMAP3_PRM_VOLTOFFSET_OFFSET); -- vdd->write_reg(OMAP3_VOLTSETUP2, vc->vc_common->prm_mod, -+ vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod, - OMAP3_PRM_VOLTSETUP2_OFFSET); - } - - static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) - { -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - static bool is_initialized; - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; -@@ -176,19 +174,19 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) - onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); - ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); - off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); -- vc_val = ((on_vsel << vc->vc_common->cmd_on_shift) | -- (onlp_vsel << vc->vc_common->cmd_onlp_shift) | -- (ret_vsel << vc->vc_common->cmd_ret_shift) | -- (off_vsel << vc->vc_common->cmd_off_shift)); -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, vc->cmdval_reg); -+ vc_val = ((on_vsel << vc->common->cmd_on_shift) | -+ (onlp_vsel << vc->common->cmd_onlp_shift) | -+ (ret_vsel << vc->common->cmd_ret_shift) | -+ (off_vsel << vc->common->cmd_off_shift)); -+ vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg); - - /* - * Generic VC parameters init - * XXX This data should be abstracted out - */ -- vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->vc_common->prm_mod, -+ vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->common->prm_mod, - OMAP3_PRM_VC_CH_CONF_OFFSET); -- vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->vc_common->prm_mod, -+ vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->common->prm_mod, - OMAP3_PRM_VC_I2C_CFG_OFFSET); - - omap3_vfsm_init(voltdm); -@@ -200,7 +198,7 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) - /* OMAP4 specific voltage init functions */ - static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) - { -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - static bool is_initialized; - u32 vc_val; -@@ -217,18 +215,18 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | - OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | - OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); -+ vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); - - /* XXX These are magic numbers and do not belong! */ - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); -+ vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); - - is_initialized = true; - } - - void __init omap_vc_init_channel(struct voltagedomain *voltdm) - { -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; -+ struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - u32 vc_val; - -@@ -246,27 +244,27 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - } - - /* Set up the SMPS_SA(i2c slave address in VC */ -- vc_val = vdd->read_reg(vc->vc_common->prm_mod, -- vc->vc_common->smps_sa_reg); -+ vc_val = vdd->read_reg(vc->common->prm_mod, -+ vc->common->smps_sa_reg); - vc_val &= ~vc->smps_sa_mask; - vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, -- vc->vc_common->smps_sa_reg); -+ vdd->write_reg(vc_val, vc->common->prm_mod, -+ vc->common->smps_sa_reg); - - /* Setup the VOLRA(pmic reg addr) in VC */ -- vc_val = vdd->read_reg(vc->vc_common->prm_mod, -- vc->vc_common->smps_volra_reg); -+ vc_val = vdd->read_reg(vc->common->prm_mod, -+ vc->common->smps_volra_reg); - vc_val &= ~vc->smps_volra_mask; - vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, -- vc->vc_common->smps_volra_reg); -+ vdd->write_reg(vc_val, vc->common->prm_mod, -+ vc->common->smps_volra_reg); - - /* Configure the setup times */ -- vc_val = vdd->read_reg(vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); -+ vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm->voltsetup_reg); - vc_val &= ~vdd->vfsm->voltsetup_mask; - vc_val |= vdd->pmic_info->volt_setup_time << - vdd->vfsm->voltsetup_shift; -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); -+ vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm->voltsetup_reg); - - if (cpu_is_omap34xx()) - omap3_vc_init_channel(voltdm); -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index d0bf348..51d36a8 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -22,7 +22,7 @@ - struct voltagedomain; - - /** -- * struct omap_vc_common_data - per-VC register/bitfield data -+ * struct omap_vc_common - per-VC register/bitfield data - * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register - * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register - * @prm_mod: PRM module id used for PRM register access -@@ -40,7 +40,7 @@ struct voltagedomain; - * XXX One of cmd_on_mask and cmd_on_shift are not needed - * XXX VALID should probably be a shift, not a mask - */ --struct omap_vc_common_data { -+struct omap_vc_common { - u32 cmd_on_mask; - u32 valid; - s16 prm_mod; -@@ -57,8 +57,8 @@ struct omap_vc_common_data { - }; - - /** -- * struct omap_vc_instance_data - VC per-instance data -- * @vc_common: pointer to VC common data for this platform -+ * struct omap_vc_channel - VC per-instance data -+ * @common: pointer to VC common data for this platform - * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register - * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register - * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register -@@ -67,8 +67,8 @@ struct omap_vc_common_data { - * XXX It is not necessary to have both a *_mask and a *_shift - - * remove one - */ --struct omap_vc_instance_data { -- const struct omap_vc_common_data *vc_common; -+struct omap_vc_channel { -+ const struct omap_vc_common *common; - u32 smps_sa_mask; - u32 smps_volra_mask; - u8 cmdval_reg; -@@ -76,12 +76,12 @@ struct omap_vc_instance_data { - u8 smps_volra_shift; - }; - --extern struct omap_vc_instance_data omap3_vc1_data; --extern struct omap_vc_instance_data omap3_vc2_data; -+extern struct omap_vc_channel omap3_vc_mpu; -+extern struct omap_vc_channel omap3_vc_core; - --extern struct omap_vc_instance_data omap4_vc_mpu_data; --extern struct omap_vc_instance_data omap4_vc_iva_data; --extern struct omap_vc_instance_data omap4_vc_core_data; -+extern struct omap_vc_channel omap4_vc_mpu; -+extern struct omap_vc_channel omap4_vc_iva; -+extern struct omap_vc_channel omap4_vc_core; - - void omap_vc_init_channel(struct voltagedomain *voltdm); - int omap_vc_pre_scale(struct voltagedomain *voltdm, -@@ -90,8 +90,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - void omap_vc_post_scale(struct voltagedomain *voltdm, - unsigned long target_volt, - u8 target_vsel, u8 current_vsel); --int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, -- unsigned long target_volt); -+int omap_vc_bypass_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt); - - #endif - -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c -index 55caccb..1a17ed4 100644 ---- a/arch/arm/mach-omap2/vc3xxx_data.c -+++ b/arch/arm/mach-omap2/vc3xxx_data.c -@@ -29,7 +29,7 @@ - * VC data common to 34xx/36xx chips - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. - */ --static struct omap_vc_common_data omap3_vc_common = { -+static struct omap_vc_common omap3_vc_common = { - .prm_mod = OMAP3430_GR_MOD, - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, -@@ -45,8 +45,8 @@ static struct omap_vc_common_data omap3_vc_common = { - .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, - }; - --struct omap_vc_instance_data omap3_vc1_data = { -- .vc_common = &omap3_vc_common, -+struct omap_vc_channel omap3_vc_mpu = { -+ .common = &omap3_vc_common, - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, - .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, -@@ -54,8 +54,8 @@ struct omap_vc_instance_data omap3_vc1_data = { - .smps_volra_mask = OMAP3430_VOLRA0_MASK, - }; - --struct omap_vc_instance_data omap3_vc2_data = { -- .vc_common = &omap3_vc_common, -+struct omap_vc_channel omap3_vc_core = { -+ .common = &omap3_vc_common, - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, - .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c -index b62678e..56f3f4a 100644 ---- a/arch/arm/mach-omap2/vc44xx_data.c -+++ b/arch/arm/mach-omap2/vc44xx_data.c -@@ -30,7 +30,7 @@ - * VC data common to 44xx chips - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. - */ --static const struct omap_vc_common_data omap4_vc_common = { -+static const struct omap_vc_common omap4_vc_common = { - .prm_mod = OMAP4430_PRM_DEVICE_INST, - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, -@@ -47,8 +47,8 @@ static const struct omap_vc_common_data omap4_vc_common = { - }; - - /* VC instance data for each controllable voltage line */ --struct omap_vc_instance_data omap4_vc_mpu_data = { -- .vc_common = &omap4_vc_common, -+struct omap_vc_channel omap4_vc_mpu = { -+ .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, - .smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT, - .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, -@@ -56,8 +56,8 @@ struct omap_vc_instance_data omap4_vc_mpu_data = { - .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, - }; - --struct omap_vc_instance_data omap4_vc_iva_data = { -- .vc_common = &omap4_vc_common, -+struct omap_vc_channel omap4_vc_iva = { -+ .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, - .smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT, - .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, -@@ -65,8 +65,8 @@ struct omap_vc_instance_data omap4_vc_iva_data = { - .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, - }; - --struct omap_vc_instance_data omap4_vc_core_data = { -- .vc_common = &omap4_vc_common, -+struct omap_vc_channel omap4_vc_core = { -+ .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, - .smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT, - .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 6ba6e49..c6352e3 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -769,7 +769,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, - vdd->volt_scale = vp_forceupdate_scale_voltage; - return; - case VOLTSCALE_VCBYPASS: -- vdd->volt_scale = omap_vc_bypass_scale_voltage; -+ vdd->volt_scale = omap_vc_bypass_scale; - return; - default: - pr_warning("%s: Trying to change the method of voltage scaling" -@@ -802,10 +802,12 @@ int __init omap_voltage_late_init(void) - if (!voltdm->scalable) - continue; - -+ if (voltdm->vc) -+ omap_vc_init_channel(voltdm); -+ - if (voltdm->vdd) { - if (omap_vdd_data_configure(voltdm)) - continue; -- omap_vc_init_channel(voltdm); - vp_init(voltdm); - vdd_debugfs_init(voltdm); - } -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index b41d9f1..b06e03f 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -66,6 +66,8 @@ struct voltagedomain { - bool scalable; - struct list_head node; - struct list_head pwrdm_list; -+ struct omap_vc_channel *vc; -+ - struct omap_vdd_info *vdd; - }; - -@@ -125,8 +127,6 @@ struct omap_volt_pmic_info { - * @vp_data : the register values, shifts, masks for various - * vp registers - * @vp_rt_data : VP data derived at runtime, not predefined -- * @vc_data : structure containing various various vc registers, -- * shifts, masks etc. - * @vfsm : voltage manager FSM data - * @debug_dir : debug directory for this voltage domain. - * @curr_volt : current voltage for this vdd. -@@ -139,7 +139,6 @@ struct omap_vdd_info { - struct omap_volt_pmic_info *pmic_info; - struct omap_vp_instance_data *vp_data; - struct omap_vp_runtime_data vp_rt_data; -- struct omap_vc_instance_data *vc_data; - const struct omap_vfsm_instance_data *vfsm; - struct dentry *debug_dir; - u32 curr_volt; -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index d7e1052..7cb27ec 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -41,7 +41,6 @@ static struct omap_vdd_info omap3_vdd1_info = { - .prm_irqst_mod = OCP_MOD, - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap3_vp1_data, -- .vc_data = &omap3_vc1_data, - .vfsm = &omap3_vdd1_vfsm_data, - }; - -@@ -55,19 +54,20 @@ static struct omap_vdd_info omap3_vdd2_info = { - .prm_irqst_mod = OCP_MOD, - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap3_vp2_data, -- .vc_data = &omap3_vc2_data, - .vfsm = &omap3_vdd2_vfsm_data, - }; - - static struct voltagedomain omap3_voltdm_mpu = { - .name = "mpu_iva", - .scalable = true, -+ .vc = &omap3_vc_mpu, - .vdd = &omap3_vdd1_info, - }; - - static struct voltagedomain omap3_voltdm_core = { - .name = "core", - .scalable = true, -+ .vc = &omap3_vc_core, - .vdd = &omap3_vdd2_info, - }; - -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index 9a17b5e..a05d90a 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -40,7 +40,6 @@ static struct omap_vdd_info omap4_vdd_mpu_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, - .vp_data = &omap4_vp_mpu_data, -- .vc_data = &omap4_vc_mpu_data, - .vfsm = &omap4_vdd_mpu_vfsm_data, - }; - -@@ -52,7 +51,6 @@ static struct omap_vdd_info omap4_vdd_iva_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap4_vp_iva_data, -- .vc_data = &omap4_vc_iva_data, - .vfsm = &omap4_vdd_iva_vfsm_data, - }; - -@@ -64,25 +62,27 @@ static struct omap_vdd_info omap4_vdd_core_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap4_vp_core_data, -- .vc_data = &omap4_vc_core_data, - .vfsm = &omap4_vdd_core_vfsm_data, - }; - - static struct voltagedomain omap4_voltdm_mpu = { - .name = "mpu", - .scalable = true, -+ .vc = &omap4_vc_mpu, - .vdd = &omap4_vdd_mpu_info, - }; - - static struct voltagedomain omap4_voltdm_iva = { - .name = "iva", - .scalable = true, -+ .vc = &omap4_vc_iva, - .vdd = &omap4_vdd_iva_info, - }; - - static struct voltagedomain omap4_voltdm_core = { - .name = "core", - .scalable = true, -+ .vc = &omap4_vc_core, - .vdd = &omap4_vdd_core_info, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale-method-when-VC-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale-method-when-VC-.patch deleted file mode 100644 index a5ad5b8..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale-method-when-VC-.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 23a2e1563c2e0bf2c8162c8c91b2cf1f6007c669 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 18 Jul 2011 15:48:22 -0700 -Subject: [PATCH 111/149] OMAP2+: voltage: enable VC bypass scale method when VC is initialized - -VC is initialized first, set default scaling method to VC bypass. -If/when VP is initialized, default scaling method will be changed to -VP force-update. - -Enabling VC bypass as default as soon as VC is initialized allows for -VC bypass scaling to work when no VP is configured/initialized for a -given voltage domain. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index c6352e3..e1a22a3 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -802,8 +802,10 @@ int __init omap_voltage_late_init(void) - if (!voltdm->scalable) - continue; - -- if (voltdm->vc) -+ if (voltdm->vc) { -+ voltdm->vdd->volt_scale = omap_vc_bypass_scale; - omap_vc_init_channel(voltdm); -+ } - - if (voltdm->vdd) { - if (omap_vdd_data_configure(voltdm)) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor-VP-code-in.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor-VP-code-in.patch deleted file mode 100644 index 095b5bf..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor-VP-code-in.patch +++ /dev/null @@ -1,874 +0,0 @@ -From 0d45741059eb1c21dd4c1f34083d1ecaed7fca96 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 21 Mar 2011 14:29:13 -0700 -Subject: [PATCH 112/149] OMAP2+: voltage: split out voltage processor (VP) code into new layer - -This patch is primarily a move of VP specific code from voltage.c into -its own code in vp.c and adds prototypes to vp.h - -No functional changes, except debugfs... - -VP debugfs moved to 'vp' subdir of <debugfs>/voltage/ and 'vp_' -prefixes removed from all debugfs filenames. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/Makefile | 2 +- - arch/arm/mach-omap2/voltage.c | 348 +------------------------------------- - arch/arm/mach-omap2/voltage.h | 3 - - arch/arm/mach-omap2/vp.c | 374 +++++++++++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/vp.h | 9 + - 5 files changed, 387 insertions(+), 349 deletions(-) - create mode 100644 arch/arm/mach-omap2/vp.c - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index ecbf361..8e79ca5 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ - - # OMAP voltage domains - ifeq ($(CONFIG_PM),y) --voltagedomain-common := voltage.o vc.o -+voltagedomain-common := voltage.o vc.o vp.o - obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ - voltagedomains2xxx_data.o - obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index e1a22a3..9b9f019 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -46,10 +46,6 @@ static LIST_HEAD(voltdm_list); - #define VOLTAGE_DIR_SIZE 16 - static struct dentry *voltage_dir; - --/* Init function pointers */ --static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, -- unsigned long target_volt); -- - static u32 omap3_voltage_read_reg(u16 mod, u8 offset) - { - return omap2_prm_read_mod_reg(mod, offset); -@@ -105,7 +101,7 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - sys_clk_speed /= 1000; - - /* Generic voltage parameters */ -- vdd->volt_scale = vp_forceupdate_scale_voltage; -+ vdd->volt_scale = omap_vp_forceupdate_scale; - vdd->vp_enabled = false; - - vdd->vp_rt_data.vpconfig_erroroffset = -@@ -127,30 +123,6 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - return 0; - } - --/* Voltage debugfs support */ --static int vp_volt_debug_get(void *data, u64 *val) --{ -- struct voltagedomain *voltdm = (struct voltagedomain *)data; -- struct omap_vdd_info *vdd = voltdm->vdd; -- u8 vsel; -- -- if (!vdd) { -- pr_warning("Wrong paramater passed\n"); -- return -EINVAL; -- } -- -- vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); -- -- if (!vdd->pmic_info->vsel_to_uv) { -- pr_warning("PMIC function to convert vsel to voltage" -- "in uV not registerd\n"); -- return -EINVAL; -- } -- -- *val = vdd->pmic_info->vsel_to_uv(vsel); -- return 0; --} -- - static int nom_volt_debug_get(void *data, u64 *val) - { - struct voltagedomain *voltdm = (struct voltagedomain *)data; -@@ -165,85 +137,8 @@ static int nom_volt_debug_get(void *data, u64 *val) - return 0; - } - --DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); - DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, - "%llu\n"); --static void vp_latch_vsel(struct voltagedomain *voltdm) --{ -- u32 vpconfig; -- unsigned long uvdc; -- char vsel; -- struct omap_vdd_info *vdd = voltdm->vdd; -- -- uvdc = omap_voltage_get_nom_volt(voltdm); -- if (!uvdc) { -- pr_warning("%s: unable to find current voltage for vdd_%s\n", -- __func__, voltdm->name); -- return; -- } -- -- if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { -- pr_warning("%s: PMIC function to convert voltage in uV to" -- " vsel not registered\n", __func__); -- return; -- } -- -- vsel = vdd->pmic_info->uv_to_vsel(uvdc); -- -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvoltage_mask | -- vdd->vp_data->vp_common->vpconfig_initvdd); -- vpconfig |= vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift; -- -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- -- /* Trigger initVDD value copy to voltage processor */ -- vdd->write_reg((vpconfig | vdd->vp_data->vp_common->vpconfig_initvdd), -- vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- -- /* Clear initVDD copy trigger bit */ -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); --} -- --/* Generic voltage init functions */ --static void __init vp_init(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- u32 vp_val; -- -- if (!vdd->read_reg || !vdd->write_reg) { -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", -- __func__, voltdm->name); -- return; -- } -- -- vp_val = vdd->vp_rt_data.vpconfig_erroroffset | -- (vdd->vp_rt_data.vpconfig_errorgain << -- vdd->vp_data->vp_common->vpconfig_errorgain_shift) | -- vdd->vp_data->vp_common->vpconfig_timeouten; -- vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- -- vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << -- vdd->vp_data->vp_common->vstepmin_smpswaittimemin_shift) | -- (vdd->vp_rt_data.vstepmin_stepmin << -- vdd->vp_data->vp_common->vstepmin_stepmin_shift)); -- vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmin); -- -- vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << -- vdd->vp_data->vp_common->vstepmax_smpswaittimemax_shift) | -- (vdd->vp_rt_data.vstepmax_stepmax << -- vdd->vp_data->vp_common->vstepmax_stepmax_shift)); -- vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmax); -- -- vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << -- vdd->vp_data->vp_common->vlimitto_vddmax_shift) | -- (vdd->vp_rt_data.vlimitto_vddmin << -- vdd->vp_data->vp_common->vlimitto_vddmin_shift) | -- (vdd->vp_rt_data.vlimitto_timeout << -- vdd->vp_data->vp_common->vlimitto_timeout_shift)); -- vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); --} -- - static void __init vdd_debugfs_init(struct voltagedomain *voltdm) - { - char *name; -@@ -268,125 +163,11 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) - return; - } - -- (void) debugfs_create_x16("vp_errorgain", S_IRUGO, vdd->debug_dir, -- &(vdd->vp_rt_data.vpconfig_errorgain)); -- (void) debugfs_create_x16("vp_smpswaittimemin", S_IRUGO, -- vdd->debug_dir, -- &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); -- (void) debugfs_create_x8("vp_stepmin", S_IRUGO, vdd->debug_dir, -- &(vdd->vp_rt_data.vstepmin_stepmin)); -- (void) debugfs_create_x16("vp_smpswaittimemax", S_IRUGO, -- vdd->debug_dir, -- &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); -- (void) debugfs_create_x8("vp_stepmax", S_IRUGO, vdd->debug_dir, -- &(vdd->vp_rt_data.vstepmax_stepmax)); -- (void) debugfs_create_x8("vp_vddmax", S_IRUGO, vdd->debug_dir, -- &(vdd->vp_rt_data.vlimitto_vddmax)); -- (void) debugfs_create_x8("vp_vddmin", S_IRUGO, vdd->debug_dir, -- &(vdd->vp_rt_data.vlimitto_vddmin)); -- (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir, -- &(vdd->vp_rt_data.vlimitto_timeout)); -- (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir, -- (void *) voltdm, &vp_volt_debug_fops); - (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, - vdd->debug_dir, (void *) voltdm, - &nom_volt_debug_fops); - } - --/* VP force update method of voltage scaling */ --static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, -- unsigned long target_volt) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- u32 vpconfig; -- u8 target_vsel, current_vsel; -- int ret, timeout = 0; -- -- ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); -- if (ret) -- return ret; -- -- /* -- * Clear all pending TransactionDone interrupt/status. Typical latency -- * is <3us -- */ -- while (timeout++ < VP_TRANXDONE_TIMEOUT) { -- vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, -- vdd->prm_irqst_mod, vdd->prm_irqst_reg); -- if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & -- vdd->vp_data->prm_irqst_data->tranxdone_status)) -- break; -- udelay(1); -- } -- if (timeout >= VP_TRANXDONE_TIMEOUT) { -- pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." -- "Voltage change aborted", __func__, voltdm->name); -- return -ETIMEDOUT; -- } -- -- /* Configure for VP-Force Update */ -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | -- vdd->vp_data->vp_common->vpconfig_forceupdate | -- vdd->vp_data->vp_common->vpconfig_initvoltage_mask); -- vpconfig |= ((target_vsel << -- vdd->vp_data->vp_common->vpconfig_initvoltage_shift)); -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- -- /* Trigger initVDD value copy to voltage processor */ -- vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- -- /* Force update of voltage */ -- vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- -- /* -- * Wait for TransactionDone. Typical latency is <200us. -- * Depends on SMPSWAITTIMEMIN/MAX and voltage change -- */ -- timeout = 0; -- omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, -- vdd->prm_irqst_reg) & -- vdd->vp_data->prm_irqst_data->tranxdone_status), -- VP_TRANXDONE_TIMEOUT, timeout); -- if (timeout >= VP_TRANXDONE_TIMEOUT) -- pr_err("%s: vdd_%s TRANXDONE timeout exceeded." -- "TRANXDONE never got set after the voltage update\n", -- __func__, voltdm->name); -- -- omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); -- -- /* -- * Disable TransactionDone interrupt , clear all status, clear -- * control registers -- */ -- timeout = 0; -- while (timeout++ < VP_TRANXDONE_TIMEOUT) { -- vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, -- vdd->prm_irqst_mod, vdd->prm_irqst_reg); -- if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & -- vdd->vp_data->prm_irqst_data->tranxdone_status)) -- break; -- udelay(1); -- } -- -- if (timeout >= VP_TRANXDONE_TIMEOUT) -- pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" -- "to clear the TRANXDONE status\n", -- __func__, voltdm->name); -- -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- /* Clear initVDD copy trigger bit */ -- vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- /* Clear force bit */ -- vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- -- return 0; --} -- - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) - { - struct omap_vdd_info *vdd = voltdm->vdd; -@@ -439,129 +220,6 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) - } - - /** -- * omap_vp_get_curr_volt() - API to get the current vp voltage. -- * @voltdm: pointer to the VDD. -- * -- * This API returns the current voltage for the specified voltage processor -- */ --unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd; -- u8 curr_vsel; -- -- if (!voltdm || IS_ERR(voltdm)) { -- pr_warning("%s: VDD specified does not exist!\n", __func__); -- return 0; -- } -- -- vdd = voltdm->vdd; -- if (!vdd->read_reg) { -- pr_err("%s: No read API for reading vdd_%s regs\n", -- __func__, voltdm->name); -- return 0; -- } -- -- curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); -- -- if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { -- pr_warning("%s: PMIC function to convert vsel to voltage" -- "in uV not registerd\n", __func__); -- return 0; -- } -- -- return vdd->pmic_info->vsel_to_uv(curr_vsel); --} -- --/** -- * omap_vp_enable() - API to enable a particular VP -- * @voltdm: pointer to the VDD whose VP is to be enabled. -- * -- * This API enables a particular voltage processor. Needed by the smartreflex -- * class drivers. -- */ --void omap_vp_enable(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd; -- u32 vpconfig; -- -- if (!voltdm || IS_ERR(voltdm)) { -- pr_warning("%s: VDD specified does not exist!\n", __func__); -- return; -- } -- -- vdd = voltdm->vdd; -- if (!vdd->read_reg || !vdd->write_reg) { -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", -- __func__, voltdm->name); -- return; -- } -- -- /* If VP is already enabled, do nothing. Return */ -- if (vdd->vp_enabled) -- return; -- -- vp_latch_vsel(voltdm); -- -- /* Enable VP */ -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- vdd->vp_enabled = true; --} -- --/** -- * omap_vp_disable() - API to disable a particular VP -- * @voltdm: pointer to the VDD whose VP is to be disabled. -- * -- * This API disables a particular voltage processor. Needed by the smartreflex -- * class drivers. -- */ --void omap_vp_disable(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd; -- u32 vpconfig; -- int timeout; -- -- if (!voltdm || IS_ERR(voltdm)) { -- pr_warning("%s: VDD specified does not exist!\n", __func__); -- return; -- } -- -- vdd = voltdm->vdd; -- if (!vdd->read_reg || !vdd->write_reg) { -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", -- __func__, voltdm->name); -- return; -- } -- -- /* If VP is already disabled, do nothing. Return */ -- if (!vdd->vp_enabled) { -- pr_warning("%s: Trying to disable VP for vdd_%s when" -- "it is already disabled\n", __func__, voltdm->name); -- return; -- } -- -- /* Disable VP */ -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -- -- /* -- * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us -- */ -- omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstatus)), -- VP_IDLE_TIMEOUT, timeout); -- -- if (timeout >= VP_IDLE_TIMEOUT) -- pr_warning("%s: vdd_%s idle timedout\n", -- __func__, voltdm->name); -- -- vdd->vp_enabled = false; -- -- return; --} -- --/** - * omap_voltage_scale_vdd() - API to scale voltage of a particular - * voltage domain. - * @voltdm: pointer to the VDD which is to be scaled. -@@ -766,7 +424,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, - - switch (voltscale_method) { - case VOLTSCALE_VPFORCEUPDATE: -- vdd->volt_scale = vp_forceupdate_scale_voltage; -+ vdd->volt_scale = omap_vp_forceupdate_scale; - return; - case VOLTSCALE_VCBYPASS: - vdd->volt_scale = omap_vc_bypass_scale; -@@ -810,8 +468,8 @@ int __init omap_voltage_late_init(void) - if (voltdm->vdd) { - if (omap_vdd_data_configure(voltdm)) - continue; -- vp_init(voltdm); - vdd_debugfs_init(voltdm); -+ omap_vp_init(voltdm); - } - } - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index b06e03f..83fa239 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -152,9 +152,6 @@ struct omap_vdd_info { - unsigned long target_volt); - }; - --unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); --void omap_vp_enable(struct voltagedomain *voltdm); --void omap_vp_disable(struct voltagedomain *voltdm); - int omap_voltage_scale_vdd(struct voltagedomain *voltdm, - unsigned long target_volt); - void omap_voltage_reset(struct voltagedomain *voltdm); -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -new file mode 100644 -index 0000000..f3503de ---- /dev/null -+++ b/arch/arm/mach-omap2/vp.c -@@ -0,0 +1,374 @@ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/debugfs.h> -+ -+#include <plat/common.h> -+ -+#include "voltage.h" -+#include "vp.h" -+#include "prm-regbits-34xx.h" -+#include "prm-regbits-44xx.h" -+#include "prm44xx.h" -+ -+static void __init vp_debugfs_init(struct voltagedomain *voltdm); -+ -+static void vp_latch_vsel(struct voltagedomain *voltdm) -+{ -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ u32 vpconfig; -+ unsigned long uvdc; -+ char vsel; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ -+ uvdc = omap_voltage_get_nom_volt(voltdm); -+ if (!uvdc) { -+ pr_warning("%s: unable to find current voltage for vdd_%s\n", -+ __func__, voltdm->name); -+ return; -+ } -+ -+ if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { -+ pr_warning("%s: PMIC function to convert voltage in uV to" -+ " vsel not registered\n", __func__); -+ return; -+ } -+ -+ vsel = vdd->pmic_info->uv_to_vsel(uvdc); -+ -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | -+ vp->vp_common->vpconfig_initvdd); -+ vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; -+ -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ -+ /* Trigger initVDD value copy to voltage processor */ -+ vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd), -+ vp->vp_common->prm_mod, vp->vpconfig); -+ -+ /* Clear initVDD copy trigger bit */ -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+} -+ -+/* Generic voltage init functions */ -+void __init omap_vp_init(struct voltagedomain *voltdm) -+{ -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ u32 vp_val; -+ -+ if (!vdd->read_reg || !vdd->write_reg) { -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", -+ __func__, voltdm->name); -+ return; -+ } -+ -+ vp_val = vdd->vp_rt_data.vpconfig_erroroffset | -+ (vdd->vp_rt_data.vpconfig_errorgain << -+ vp->vp_common->vpconfig_errorgain_shift) | -+ vp->vp_common->vpconfig_timeouten; -+ vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig); -+ -+ vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << -+ vp->vp_common->vstepmin_smpswaittimemin_shift) | -+ (vdd->vp_rt_data.vstepmin_stepmin << -+ vp->vp_common->vstepmin_stepmin_shift)); -+ vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin); -+ -+ vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << -+ vp->vp_common->vstepmax_smpswaittimemax_shift) | -+ (vdd->vp_rt_data.vstepmax_stepmax << -+ vp->vp_common->vstepmax_stepmax_shift)); -+ vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax); -+ -+ vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << -+ vp->vp_common->vlimitto_vddmax_shift) | -+ (vdd->vp_rt_data.vlimitto_vddmin << -+ vp->vp_common->vlimitto_vddmin_shift) | -+ (vdd->vp_rt_data.vlimitto_timeout << -+ vp->vp_common->vlimitto_timeout_shift)); -+ vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto); -+ -+ vp_debugfs_init(voltdm); -+} -+ -+/* VP force update method of voltage scaling */ -+int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt) -+{ -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ u32 vpconfig; -+ u8 target_vsel, current_vsel; -+ int ret, timeout = 0; -+ -+ ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); -+ if (ret) -+ return ret; -+ -+ /* -+ * Clear all pending TransactionDone interrupt/status. Typical latency -+ * is <3us -+ */ -+ while (timeout++ < VP_TRANXDONE_TIMEOUT) { -+ vdd->write_reg(vp->prm_irqst_data->tranxdone_status, -+ vdd->prm_irqst_mod, vdd->prm_irqst_reg); -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & -+ vp->prm_irqst_data->tranxdone_status)) -+ break; -+ udelay(1); -+ } -+ if (timeout >= VP_TRANXDONE_TIMEOUT) { -+ pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." -+ "Voltage change aborted", __func__, voltdm->name); -+ return -ETIMEDOUT; -+ } -+ -+ /* Configure for VP-Force Update */ -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig &= ~(vp->vp_common->vpconfig_initvdd | -+ vp->vp_common->vpconfig_forceupdate | -+ vp->vp_common->vpconfig_initvoltage_mask); -+ vpconfig |= ((target_vsel << -+ vp->vp_common->vpconfig_initvoltage_shift)); -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ -+ /* Trigger initVDD value copy to voltage processor */ -+ vpconfig |= vp->vp_common->vpconfig_initvdd; -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ -+ /* Force update of voltage */ -+ vpconfig |= vp->vp_common->vpconfig_forceupdate; -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ -+ /* -+ * Wait for TransactionDone. Typical latency is <200us. -+ * Depends on SMPSWAITTIMEMIN/MAX and voltage change -+ */ -+ timeout = 0; -+ omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, -+ vdd->prm_irqst_reg) & -+ vp->prm_irqst_data->tranxdone_status), -+ VP_TRANXDONE_TIMEOUT, timeout); -+ if (timeout >= VP_TRANXDONE_TIMEOUT) -+ pr_err("%s: vdd_%s TRANXDONE timeout exceeded." -+ "TRANXDONE never got set after the voltage update\n", -+ __func__, voltdm->name); -+ -+ omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); -+ -+ /* -+ * Disable TransactionDone interrupt , clear all status, clear -+ * control registers -+ */ -+ timeout = 0; -+ while (timeout++ < VP_TRANXDONE_TIMEOUT) { -+ vdd->write_reg(vp->prm_irqst_data->tranxdone_status, -+ vdd->prm_irqst_mod, vdd->prm_irqst_reg); -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & -+ vp->prm_irqst_data->tranxdone_status)) -+ break; -+ udelay(1); -+ } -+ -+ if (timeout >= VP_TRANXDONE_TIMEOUT) -+ pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" -+ "to clear the TRANXDONE status\n", -+ __func__, voltdm->name); -+ -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ /* Clear initVDD copy trigger bit */ -+ vpconfig &= ~vp->vp_common->vpconfig_initvdd; -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ /* Clear force bit */ -+ vpconfig &= ~vp->vp_common->vpconfig_forceupdate; -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ -+ return 0; -+} -+ -+/** -+ * omap_vp_get_curr_volt() - API to get the current vp voltage. -+ * @voltdm: pointer to the VDD. -+ * -+ * This API returns the current voltage for the specified voltage processor -+ */ -+unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) -+{ -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ struct omap_vdd_info *vdd; -+ u8 curr_vsel; -+ -+ if (!voltdm || IS_ERR(voltdm)) { -+ pr_warning("%s: VDD specified does not exist!\n", __func__); -+ return 0; -+ } -+ -+ vdd = voltdm->vdd; -+ if (!vdd->read_reg) { -+ pr_err("%s: No read API for reading vdd_%s regs\n", -+ __func__, voltdm->name); -+ return 0; -+ } -+ -+ curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); -+ -+ if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { -+ pr_warning("%s: PMIC function to convert vsel to voltage" -+ "in uV not registerd\n", __func__); -+ return 0; -+ } -+ -+ return vdd->pmic_info->vsel_to_uv(curr_vsel); -+} -+ -+/** -+ * omap_vp_enable() - API to enable a particular VP -+ * @voltdm: pointer to the VDD whose VP is to be enabled. -+ * -+ * This API enables a particular voltage processor. Needed by the smartreflex -+ * class drivers. -+ */ -+void omap_vp_enable(struct voltagedomain *voltdm) -+{ -+ struct omap_vp_instance_data *vp; -+ struct omap_vdd_info *vdd; -+ u32 vpconfig; -+ -+ if (!voltdm || IS_ERR(voltdm)) { -+ pr_warning("%s: VDD specified does not exist!\n", __func__); -+ return; -+ } -+ -+ vdd = voltdm->vdd; -+ vp = voltdm->vdd->vp_data; -+ if (!vdd->read_reg || !vdd->write_reg) { -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", -+ __func__, voltdm->name); -+ return; -+ } -+ -+ /* If VP is already enabled, do nothing. Return */ -+ if (vdd->vp_enabled) -+ return; -+ -+ vp_latch_vsel(voltdm); -+ -+ /* Enable VP */ -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig |= vp->vp_common->vpconfig_vpenable; -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ vdd->vp_enabled = true; -+} -+ -+/** -+ * omap_vp_disable() - API to disable a particular VP -+ * @voltdm: pointer to the VDD whose VP is to be disabled. -+ * -+ * This API disables a particular voltage processor. Needed by the smartreflex -+ * class drivers. -+ */ -+void omap_vp_disable(struct voltagedomain *voltdm) -+{ -+ struct omap_vp_instance_data *vp; -+ struct omap_vdd_info *vdd; -+ u32 vpconfig; -+ int timeout; -+ -+ if (!voltdm || IS_ERR(voltdm)) { -+ pr_warning("%s: VDD specified does not exist!\n", __func__); -+ return; -+ } -+ -+ vdd = voltdm->vdd; -+ vp = voltdm->vdd->vp_data; -+ if (!vdd->read_reg || !vdd->write_reg) { -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", -+ __func__, voltdm->name); -+ return; -+ } -+ -+ /* If VP is already disabled, do nothing. Return */ -+ if (!vdd->vp_enabled) { -+ pr_warning("%s: Trying to disable VP for vdd_%s when" -+ "it is already disabled\n", __func__, voltdm->name); -+ return; -+ } -+ -+ /* Disable VP */ -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig &= ~vp->vp_common->vpconfig_vpenable; -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ -+ /* -+ * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us -+ */ -+ omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp->vstatus)), -+ VP_IDLE_TIMEOUT, timeout); -+ -+ if (timeout >= VP_IDLE_TIMEOUT) -+ pr_warning("%s: vdd_%s idle timedout\n", -+ __func__, voltdm->name); -+ -+ vdd->vp_enabled = false; -+ -+ return; -+} -+ -+/* Voltage debugfs support */ -+static int vp_volt_debug_get(void *data, u64 *val) -+{ -+ struct voltagedomain *voltdm = (struct voltagedomain *)data; -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ u8 vsel; -+ -+ if (!vdd) { -+ pr_warning("Wrong paramater passed\n"); -+ return -EINVAL; -+ } -+ -+ vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); -+ -+ if (!vdd->pmic_info->vsel_to_uv) { -+ pr_warning("PMIC function to convert vsel to voltage" -+ "in uV not registerd\n"); -+ return -EINVAL; -+ } -+ -+ *val = vdd->pmic_info->vsel_to_uv(vsel); -+ return 0; -+} -+ -+DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); -+ -+static void __init vp_debugfs_init(struct voltagedomain *voltdm) -+{ -+ struct omap_vdd_info *vdd = voltdm->vdd; -+ struct dentry *debug_dir; -+ -+ debug_dir = debugfs_create_dir("vp", vdd->debug_dir); -+ if (IS_ERR(debug_dir)) -+ pr_err("%s: Unable to create VP debugfs dir dir\n", __func__); -+ -+ (void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir, -+ &(vdd->vp_rt_data.vpconfig_errorgain)); -+ (void) debugfs_create_x16("smpswaittimemin", S_IRUGO, -+ debug_dir, -+ &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); -+ (void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir, -+ &(vdd->vp_rt_data.vstepmin_stepmin)); -+ (void) debugfs_create_x16("smpswaittimemax", S_IRUGO, -+ debug_dir, -+ &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); -+ (void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir, -+ &(vdd->vp_rt_data.vstepmax_stepmax)); -+ (void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir, -+ &(vdd->vp_rt_data.vlimitto_vddmax)); -+ (void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir, -+ &(vdd->vp_rt_data.vlimitto_vddmin)); -+ (void) debugfs_create_x16("timeout", S_IRUGO, debug_dir, -+ &(vdd->vp_rt_data.vlimitto_timeout)); -+ (void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir, -+ (void *) voltdm, &vp_volt_debug_fops); -+} -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 5406b08..025cf16 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -19,6 +19,8 @@ - - #include <linux/kernel.h> - -+struct voltagedomain; -+ - /* XXX document */ - #define VP_IDLE_TIMEOUT 200 - #define VP_TRANXDONE_TIMEOUT 300 -@@ -139,4 +141,11 @@ extern struct omap_vp_instance_data omap4_vp_mpu_data; - extern struct omap_vp_instance_data omap4_vp_iva_data; - extern struct omap_vp_instance_data omap4_vp_core_data; - -+void omap_vp_init(struct voltagedomain *voltdm); -+void omap_vp_enable(struct voltagedomain *voltdm); -+void omap_vp_disable(struct voltagedomain *voltdm); -+unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); -+int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt); -+ - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate-voltage-and-com.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate-voltage-and-com.patch deleted file mode 100644 index 4f993c2..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate-voltage-and-com.patch +++ /dev/null @@ -1,109 +0,0 @@ -From 01afb0a843a221a9a32db601de7ebd529c49aa66 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 22 Mar 2011 14:12:37 -0700 -Subject: [PATCH 113/149] OMAP2+: VC: support PMICs with separate voltage and command registers - -The VC layer can support PMICs with separate voltage and command -registers by putting the different registers in the PRM_VC_SMPS_VOL_RA -and PRCM_VC_SMPS_CMD_RA registers respectively. - -The PMIC data must supply at least a voltage register address -(volt_reg_addr). The command register address (cmd_reg_addr) is -optional. If the PMIC data does not supply a separate command -register address, the VC will use the voltage register address for both. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/omap_twl.c | 10 +++++----- - arch/arm/mach-omap2/vc.c | 4 ++-- - arch/arm/mach-omap2/voltage.h | 3 ++- - 3 files changed, 9 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index 760487b..3249fe3 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -158,7 +158,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { - .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, - .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, -- .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG, -+ .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, - .vsel_to_uv = twl4030_vsel_to_uv, - .uv_to_vsel = twl4030_uv_to_vsel, - }; -@@ -178,7 +178,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { - .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, - .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, -- .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG, -+ .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, - .vsel_to_uv = twl4030_vsel_to_uv, - .uv_to_vsel = twl4030_uv_to_vsel, - }; -@@ -198,7 +198,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { - .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, -- .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG, -+ .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, - .vsel_to_uv = twl6030_vsel_to_uv, - .uv_to_vsel = twl6030_uv_to_vsel, - }; -@@ -218,7 +218,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { - .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, -- .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG, -+ .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, - .vsel_to_uv = twl6030_vsel_to_uv, - .uv_to_vsel = twl6030_uv_to_vsel, - }; -@@ -238,7 +238,7 @@ static struct omap_volt_pmic_info omap4_core_volt_info = { - .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, -- .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG, -+ .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, - .vsel_to_uv = twl6030_vsel_to_uv, - .uv_to_vsel = twl6030_uv_to_vsel, - }; -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 7643940..720c0cd 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -106,7 +106,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, - vc_valid = vc->common->valid; - vc_bypass_val_reg = vc->common->bypass_val_reg; - vc_bypass_value = (target_vsel << vc->common->data_shift) | -- (vdd->pmic_info->pmic_reg << -+ (vdd->pmic_info->volt_reg_addr << - vc->common->regaddr_shift) | - (vdd->pmic_info->i2c_slave_addr << - vc->common->slaveaddr_shift); -@@ -255,7 +255,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - vc_val = vdd->read_reg(vc->common->prm_mod, - vc->common->smps_volra_reg); - vc_val &= ~vc->smps_volra_mask; -- vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; -+ vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; - vdd->write_reg(vc_val, vc->common->prm_mod, - vc->common->smps_volra_reg); - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 83fa239..641597c 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -112,7 +112,8 @@ struct omap_volt_pmic_info { - u8 vp_vddmax; - u8 vp_timeout_us; - u8 i2c_slave_addr; -- u8 pmic_reg; -+ u8 volt_reg_addr; -+ u8 cmd_reg_addr; - unsigned long (*vsel_to_uv) (const u8 vsel); - u8 (*uv_to_vsel) (unsigned long uV); - }; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking-clearing-VP-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking-clearing-VP-.patch deleted file mode 100644 index c61dec1..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking-clearing-VP-.patch +++ /dev/null @@ -1,375 +0,0 @@ -From b2521ca2e2c0633cc9e50848aae9a0a761f687b6 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 28 Mar 2011 10:52:04 -0700 -Subject: [PATCH 114/149] OMAP2+: add PRM VP functions for checking/clearing VP TX done status - -Add SoC specific PRM VP helper functions for checking and clearing -the VP transaction done status. - -Longer term, these events should be handled by the forthcoming PRCM -interrupt handler. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/prm2xxx_3xxx.c | 41 ++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/prm2xxx_3xxx.h | 4 +++ - arch/arm/mach-omap2/prm44xx.c | 49 ++++++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/prm44xx.h | 4 +++ - arch/arm/mach-omap2/vp.h | 33 ++++++++++++++--------- - arch/arm/mach-omap2/vp3xxx_data.c | 19 ++++++------- - arch/arm/mach-omap2/vp44xx_data.c | 25 ++++++----------- - 7 files changed, 136 insertions(+), 39 deletions(-) - -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c -index 051213f..58c5c87 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.c -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c -@@ -20,6 +20,8 @@ - #include <plat/cpu.h> - #include <plat/prcm.h> - -+#include "vp.h" -+ - #include "prm2xxx_3xxx.h" - #include "cm2xxx_3xxx.h" - #include "prm-regbits-24xx.h" -@@ -156,3 +158,42 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) - - return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; - } -+ -+/* PRM VP */ -+ -+/* -+ * struct omap3_vp - OMAP3 VP register access description. -+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg -+ */ -+struct omap3_vp { -+ u32 tranxdone_status; -+}; -+ -+struct omap3_vp omap3_vp[] = { -+ [OMAP3_VP_VDD_MPU_ID] = { -+ .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, -+ }, -+ [OMAP3_VP_VDD_CORE_ID] = { -+ .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, -+ }, -+}; -+ -+#define MAX_VP_ID ARRAY_SIZE(omap3_vp); -+ -+u32 omap3_prm_vp_check_txdone(u8 vp_id) -+{ -+ struct omap3_vp *vp = &omap3_vp[vp_id]; -+ u32 irqstatus; -+ -+ irqstatus = omap2_prm_read_mod_reg(OCP_MOD, -+ OMAP3_PRM_IRQSTATUS_MPU_OFFSET); -+ return irqstatus & vp->tranxdone_status; -+} -+ -+void omap3_prm_vp_clear_txdone(u8 vp_id) -+{ -+ struct omap3_vp *vp = &omap3_vp[vp_id]; -+ -+ omap2_prm_write_mod_reg(vp->tranxdone_status, -+ OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); -+} -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h -index a1fc62a..5112526 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h -@@ -303,6 +303,10 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); - extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); - extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); - -+/* OMAP3-specific VP functions */ -+u32 omap3_prm_vp_check_txdone(u8 vp_id); -+void omap3_prm_vp_clear_txdone(u8 vp_id); -+ - #endif /* CONFIG_ARCH_OMAP4 */ - #endif - -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c -index 0016555..390e32c 100644 ---- a/arch/arm/mach-omap2/prm44xx.c -+++ b/arch/arm/mach-omap2/prm44xx.c -@@ -21,6 +21,7 @@ - #include <plat/cpu.h> - #include <plat/prcm.h> - -+#include "vp.h" - #include "prm44xx.h" - #include "prm-regbits-44xx.h" - -@@ -50,3 +51,51 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) - - return v; - } -+ -+/* PRM VP */ -+ -+/* -+ * struct omap4_vp - OMAP4 VP register access description. -+ * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP -+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg -+ */ -+struct omap4_vp { -+ u32 irqstatus_mpu; -+ u32 tranxdone_status; -+}; -+ -+static struct omap4_vp omap4_vp[] = { -+ [OMAP4_VP_VDD_MPU_ID] = { -+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, -+ .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, -+ }, -+ [OMAP4_VP_VDD_IVA_ID] = { -+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, -+ .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, -+ }, -+ [OMAP4_VP_VDD_CORE_ID] = { -+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, -+ .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, -+ }, -+}; -+ -+u32 omap4_prm_vp_check_txdone(u8 vp_id) -+{ -+ struct omap4_vp *vp = &omap4_vp[vp_id]; -+ u32 irqstatus; -+ -+ irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_OCP_SOCKET_INST, -+ vp->irqstatus_mpu); -+ return irqstatus & vp->tranxdone_status; -+} -+ -+void omap4_prm_vp_clear_txdone(u8 vp_id) -+{ -+ struct omap4_vp *vp = &omap4_vp[vp_id]; -+ -+ omap4_prminst_write_inst_reg(vp->tranxdone_status, -+ OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_OCP_SOCKET_INST, -+ vp->irqstatus_mpu); -+}; -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index 7dfa379..b28c87d 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -751,6 +751,10 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); - extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); - extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); - -+/* OMAP4-specific VP functions */ -+u32 omap4_prm_vp_check_txdone(u8 vp_id); -+void omap4_prm_vp_clear_txdone(u8 vp_id); -+ - # endif - - #endif -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 025cf16..2c9cd76 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -21,10 +21,28 @@ - - struct voltagedomain; - -+/* -+ * Voltage Processor (VP) identifiers -+ */ -+#define OMAP3_VP_VDD_MPU_ID 0 -+#define OMAP3_VP_VDD_CORE_ID 1 -+#define OMAP4_VP_VDD_CORE_ID 0 -+#define OMAP4_VP_VDD_IVA_ID 1 -+#define OMAP4_VP_VDD_MPU_ID 2 -+ - /* XXX document */ - #define VP_IDLE_TIMEOUT 200 - #define VP_TRANXDONE_TIMEOUT 300 - -+/** -+ * struct omap_vp_ops - per-VP operations -+ * @check_txdone: check for VP transaction done -+ * @clear_txdone: clear VP transaction done status -+ */ -+struct omap_vp_ops { -+ u32 (*check_txdone)(u8 vp_id); -+ void (*clear_txdone)(u8 vp_id); -+}; - - /** - * struct omap_vp_common_data - register data common to all VDDs -@@ -68,24 +86,13 @@ struct omap_vp_common_data { - u8 vlimitto_vddmin_shift; - u8 vlimitto_vddmax_shift; - u8 vlimitto_timeout_shift; --}; - --/** -- * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data -- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg -- * -- * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a -- * hardware bug -- * XXX This structure is probably not needed -- */ --struct omap_vp_prm_irqst_data { -- u32 tranxdone_status; -+ const struct omap_vp_ops *ops; - }; - - /** - * struct omap_vp_instance_data - VP register offsets (per-VDD) - * @vp_common: pointer to struct omap_vp_common_data * for this SoC -- * @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD - * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start - * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start - * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start -@@ -96,13 +103,13 @@ struct omap_vp_prm_irqst_data { - */ - struct omap_vp_instance_data { - const struct omap_vp_common_data *vp_common; -- const struct omap_vp_prm_irqst_data *prm_irqst_data; - u8 vpconfig; - u8 vstepmin; - u8 vstepmax; - u8 vlimitto; - u8 vstatus; - u8 voltage; -+ u8 id; - }; - - /** -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c -index a8ea045..0372c1a 100644 ---- a/arch/arm/mach-omap2/vp3xxx_data.c -+++ b/arch/arm/mach-omap2/vp3xxx_data.c -@@ -25,6 +25,12 @@ - #include "voltage.h" - - #include "vp.h" -+#include "prm2xxx_3xxx.h" -+ -+static const struct omap_vp_ops omap3_vp_ops = { -+ .check_txdone = omap3_prm_vp_check_txdone, -+ .clear_txdone = omap3_prm_vp_clear_txdone, -+}; - - /* - * VP data common to 34xx/36xx chips -@@ -48,13 +54,11 @@ static const struct omap_vp_common_data omap3_vp_common = { - .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, - .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, - .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, --}; -- --static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { -- .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, -+ .ops = &omap3_vp_ops, - }; - - struct omap_vp_instance_data omap3_vp1_data = { -+ .id = OMAP3_VP_VDD_MPU_ID, - .vp_common = &omap3_vp_common, - .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, - .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, -@@ -62,14 +66,10 @@ struct omap_vp_instance_data omap3_vp1_data = { - .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET, - .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET, - .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, -- .prm_irqst_data = &omap3_vp1_prm_irqst_data, --}; -- --static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { -- .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, - }; - - struct omap_vp_instance_data omap3_vp2_data = { -+ .id = OMAP3_VP_VDD_CORE_ID, - .vp_common = &omap3_vp_common, - .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, - .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, -@@ -77,5 +77,4 @@ struct omap_vp_instance_data omap3_vp2_data = { - .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET, - .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET, - .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET, -- .prm_irqst_data = &omap3_vp2_prm_irqst_data, - }; -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c -index 0957c24..738ba04 100644 ---- a/arch/arm/mach-omap2/vp44xx_data.c -+++ b/arch/arm/mach-omap2/vp44xx_data.c -@@ -27,6 +27,11 @@ - - #include "vp.h" - -+static const struct omap_vp_ops omap4_vp_ops = { -+ .check_txdone = omap4_prm_vp_check_txdone, -+ .clear_txdone = omap4_prm_vp_clear_txdone, -+}; -+ - /* - * VP data common to 44xx chips - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. -@@ -49,13 +54,11 @@ static const struct omap_vp_common_data omap4_vp_common = { - .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, - .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, - .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, --}; -- --static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { -- .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, -+ .ops = &omap4_vp_ops, - }; - - struct omap_vp_instance_data omap4_vp_mpu_data = { -+ .id = OMAP4_VP_VDD_MPU_ID, - .vp_common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, -@@ -63,14 +66,10 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { - .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET, - .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET, - .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, -- .prm_irqst_data = &omap4_vp_mpu_prm_irqst_data, --}; -- --static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { -- .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, - }; - - struct omap_vp_instance_data omap4_vp_iva_data = { -+ .id = OMAP4_VP_VDD_IVA_ID, - .vp_common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, -@@ -78,14 +77,10 @@ struct omap_vp_instance_data omap4_vp_iva_data = { - .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET, - .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET, - .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, -- .prm_irqst_data = &omap4_vp_iva_prm_irqst_data, --}; -- --static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = { -- .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, - }; - - struct omap_vp_instance_data omap4_vp_core_data = { -+ .id = OMAP4_VP_VDD_CORE_ID, - .vp_common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, -@@ -93,6 +88,4 @@ struct omap_vp_instance_data omap4_vp_core_data = { - .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET, - .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET, - .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET, -- .prm_irqst_data = &omap4_vp_core_prm_irqst_data, - }; -- --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear-with-V.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear-with-V.patch deleted file mode 100644 index 64851b3..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear-with-V.patch +++ /dev/null @@ -1,142 +0,0 @@ -From 754129bd8c94999c27162faf84abb5df24b79c9b Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 28 Mar 2011 11:57:18 -0700 -Subject: [PATCH 115/149] OMAP3+ VP: replace transaction done check/clear with VP ops - -Replace the VP tranxdone check/clear with helper functions from the -PRM layer. - -In the process, remove prm_irqst_* voltage structure fields for IRQ -status checking which are no longer needed. - -Since these reads/writes of the IRQ status bits were the only PRM -accesses that were not to VC/VP registers, this allows the rest of the -register accesses in the VC/VP code to use VC/VP specific register -access functions (done in the following patch.) - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.h | 3 --- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 4 ---- - arch/arm/mach-omap2/voltagedomains44xx_data.c | 6 ------ - arch/arm/mach-omap2/vp.c | 16 +++++----------- - 4 files changed, 5 insertions(+), 24 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 641597c..363eee4 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -131,7 +131,6 @@ struct omap_volt_pmic_info { - * @vfsm : voltage manager FSM data - * @debug_dir : debug directory for this voltage domain. - * @curr_volt : current voltage for this vdd. -- * @prm_irqst_mod : PRM module id used for PRM IRQ status register access - * @vp_enabled : flag to keep track of whether vp is enabled or not - * @volt_scale : API to scale the voltage of the vdd. - */ -@@ -145,8 +144,6 @@ struct omap_vdd_info { - u32 curr_volt; - bool vp_enabled; - -- s16 prm_irqst_mod; -- u8 prm_irqst_reg; - u32 (*read_reg) (u16 mod, u8 offset); - void (*write_reg) (u32 val, u16 mod, u8 offset); - int (*volt_scale) (struct voltagedomain *voltdm, -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index 7cb27ec..ad8f05b 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -38,8 +38,6 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { - }; - - static struct omap_vdd_info omap3_vdd1_info = { -- .prm_irqst_mod = OCP_MOD, -- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap3_vp1_data, - .vfsm = &omap3_vdd1_vfsm_data, - }; -@@ -51,8 +49,6 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { - }; - - static struct omap_vdd_info omap3_vdd2_info = { -- .prm_irqst_mod = OCP_MOD, -- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap3_vp2_data, - .vfsm = &omap3_vdd2_vfsm_data, - }; -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index a05d90a..43e1d38 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -37,8 +37,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { - }; - - static struct omap_vdd_info omap4_vdd_mpu_info = { -- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, - .vp_data = &omap4_vp_mpu_data, - .vfsm = &omap4_vdd_mpu_vfsm_data, - }; -@@ -48,8 +46,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { - }; - - static struct omap_vdd_info omap4_vdd_iva_info = { -- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap4_vp_iva_data, - .vfsm = &omap4_vdd_iva_vfsm_data, - }; -@@ -59,8 +55,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { - }; - - static struct omap_vdd_info omap4_vdd_core_info = { -- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, - .vp_data = &omap4_vp_core_data, - .vfsm = &omap4_vdd_core_vfsm_data, - }; -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index f3503de..113c839 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -111,10 +111,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - * is <3us - */ - while (timeout++ < VP_TRANXDONE_TIMEOUT) { -- vdd->write_reg(vp->prm_irqst_data->tranxdone_status, -- vdd->prm_irqst_mod, vdd->prm_irqst_reg); -- if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & -- vp->prm_irqst_data->tranxdone_status)) -+ vp->vp_common->ops->clear_txdone(vp->id); -+ if (!vp->vp_common->ops->check_txdone(vp->id)) - break; - udelay(1); - } -@@ -146,9 +144,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - * Depends on SMPSWAITTIMEMIN/MAX and voltage change - */ - timeout = 0; -- omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, -- vdd->prm_irqst_reg) & -- vp->prm_irqst_data->tranxdone_status), -+ omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id), - VP_TRANXDONE_TIMEOUT, timeout); - if (timeout >= VP_TRANXDONE_TIMEOUT) - pr_err("%s: vdd_%s TRANXDONE timeout exceeded." -@@ -163,10 +159,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - */ - timeout = 0; - while (timeout++ < VP_TRANXDONE_TIMEOUT) { -- vdd->write_reg(vp->prm_irqst_data->tranxdone_status, -- vdd->prm_irqst_mod, vdd->prm_irqst_reg); -- if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & -- vp->prm_irqst_data->tranxdone_status)) -+ vp->vp_common->ops->clear_txdone(vp->id); -+ if (!vp->vp_common->ops->check_txdone(vp->id)) - break; - udelay(1); - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC-VP.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC-VP.patch deleted file mode 100644 index fbb27a2..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC-VP.patch +++ /dev/null @@ -1,119 +0,0 @@ -From 3326bc8057e4dd85f135faa00a3d079fab05ac1e Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 28 Mar 2011 10:25:12 -0700 -Subject: [PATCH 116/149] OMAP2+: PRM: add register access functions for VC/VP - -On OMAP3+, the voltage controller (VC) and voltage processor (VP) are -inside the PRM. Add some PRM helper functions for register access to -these module registers. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/prm2xxx_3xxx.c | 15 +++++++++++++++ - arch/arm/mach-omap2/prm2xxx_3xxx.h | 8 ++++++++ - arch/arm/mach-omap2/prm44xx.c | 22 ++++++++++++++++++++++ - arch/arm/mach-omap2/prm44xx.h | 8 ++++++++ - 4 files changed, 53 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c -index 58c5c87..3b83763 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.c -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c -@@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id) - omap2_prm_write_mod_reg(vp->tranxdone_status, - OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - } -+ -+u32 omap3_prm_vcvp_read(u8 offset) -+{ -+ return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); -+} -+ -+void omap3_prm_vcvp_write(u32 val, u8 offset) -+{ -+ omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); -+} -+ -+u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) -+{ -+ return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); -+} -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h -index 5112526..cef533d 100644 ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h -@@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); - u32 omap3_prm_vp_check_txdone(u8 vp_id); - void omap3_prm_vp_clear_txdone(u8 vp_id); - -+/* -+ * OMAP3 access functions for voltage controller (VC) and -+ * voltage proccessor (VP) in the PRM. -+ */ -+extern u32 omap3_prm_vcvp_read(u8 offset); -+extern void omap3_prm_vcvp_write(u32 val, u8 offset); -+extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); - #endif /* CONFIG_ARCH_OMAP4 */ -+ - #endif - - /* -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c -index 390e32c..495a31a 100644 ---- a/arch/arm/mach-omap2/prm44xx.c -+++ b/arch/arm/mach-omap2/prm44xx.c -@@ -24,6 +24,8 @@ - #include "vp.h" - #include "prm44xx.h" - #include "prm-regbits-44xx.h" -+#include "prcm44xx.h" -+#include "prminst44xx.h" - - /* PRM low-level functions */ - -@@ -99,3 +101,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id) - OMAP4430_PRM_OCP_SOCKET_INST, - vp->irqstatus_mpu); - }; -+ -+u32 omap4_prm_vcvp_read(u8 offset) -+{ -+ return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_DEVICE_INST, offset); -+} -+ -+void omap4_prm_vcvp_write(u32 val, u8 offset) -+{ -+ omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_DEVICE_INST, offset); -+} -+ -+u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) -+{ -+ return omap4_prminst_rmw_inst_reg_bits(mask, bits, -+ OMAP4430_PRM_PARTITION, -+ OMAP4430_PRM_DEVICE_INST, -+ offset); -+} -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h -index b28c87d..3d66ccd 100644 ---- a/arch/arm/mach-omap2/prm44xx.h -+++ b/arch/arm/mach-omap2/prm44xx.h -@@ -755,6 +755,14 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); - u32 omap4_prm_vp_check_txdone(u8 vp_id); - void omap4_prm_vp_clear_txdone(u8 vp_id); - -+/* -+ * OMAP4 access functions for voltage controller (VC) and -+ * voltage proccessor (VP) in the PRM. -+ */ -+extern u32 omap4_prm_vcvp_read(u8 offset); -+extern void omap4_prm_vcvp_write(u32 val, u8 offset); -+extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -+ - # endif - - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register-access-functio.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register-access-functio.patch deleted file mode 100644 index 3f7823e..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register-access-functio.patch +++ /dev/null @@ -1,627 +0,0 @@ -From 794143b8e468ddd8715ae76a6a0f7f0c9bc6778d Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 28 Mar 2011 10:40:15 -0700 -Subject: [PATCH 117/149] OMAP3+: voltage: convert to PRM register access functions - -Convert VC/VP register access to use PRM VC/VP accessor functions. In -the process, move the read/write function pointers from vdd_info into -struct voltagedomain. - -No functional changes. - -Additional cleanup: -- remove prm_mod field from VC/VP data structures, the PRM register - access functions know which PRM module to use. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 69 ++++++++++--------------- - arch/arm/mach-omap2/vc.h | 2 - - arch/arm/mach-omap2/vc3xxx_data.c | 1 - - arch/arm/mach-omap2/vc44xx_data.c | 1 - - arch/arm/mach-omap2/voltage.c | 31 +----------- - arch/arm/mach-omap2/voltage.h | 7 ++- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 6 ++ - arch/arm/mach-omap2/voltagedomains44xx_data.c | 9 +++ - arch/arm/mach-omap2/vp.c | 57 ++++++++++---------- - arch/arm/mach-omap2/vp.h | 2 - - arch/arm/mach-omap2/vp3xxx_data.c | 1 - - arch/arm/mach-omap2/vp44xx_data.c | 1 - - 12 files changed, 76 insertions(+), 111 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 720c0cd..9c2706c 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -37,7 +37,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - return -ENODATA; - } - -- if (!vdd->read_reg || !vdd->write_reg) { -+ if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return -EINVAL; -@@ -49,24 +49,22 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - volt_data = NULL; - - *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); -- *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); -+ *current_vsel = voltdm->read(vdd->vp_data->voltage); - - /* Setting the ON voltage to the new target voltage */ -- vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc->cmdval_reg); -+ vc_cmdval = voltdm->read(vc->cmdval_reg); - vc_cmdval &= ~vc->common->cmd_on_mask; - vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); -- vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc->cmdval_reg); -+ voltdm->write(vc_cmdval, vc->cmdval_reg); - - /* Setting vp errorgain based on the voltage */ - if (volt_data) { -- vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, -- vdd->vp_data->vpconfig); -+ vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; - vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << - vp_common->vpconfig_errorgain_shift; -- vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, -- vdd->vp_data->vpconfig); -+ voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); - } - - return 0; -@@ -111,11 +109,10 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, - (vdd->pmic_info->i2c_slave_addr << - vc->common->slaveaddr_shift); - -- vdd->write_reg(vc_bypass_value, vc->common->prm_mod, vc_bypass_val_reg); -- vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod, -- vc_bypass_val_reg); -+ voltdm->write(vc_bypass_value, vc_bypass_val_reg); -+ voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); - -- vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg); -+ vc_bypass_value = voltdm->read(vc_bypass_val_reg); - /* - * Loop till the bypass command is acknowledged from the SMPS. - * NOTE: This is legacy code. The loop count and retry count needs -@@ -134,8 +131,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, - loop_cnt = 0; - udelay(10); - } -- vc_bypass_value = vdd->read_reg(vc->common->prm_mod, -- vc_bypass_val_reg); -+ vc_bypass_value = voltdm->read(vc_bypass_val_reg); - } - - omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); -@@ -144,18 +140,13 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, - - static void __init omap3_vfsm_init(struct voltagedomain *voltdm) - { -- struct omap_vc_channel *vc = voltdm->vc; -- struct omap_vdd_info *vdd = voltdm->vdd; -- - /* - * Voltage Manager FSM parameters init - * XXX This data should be passed in from the board file - */ -- vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); -- vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod, -- OMAP3_PRM_VOLTOFFSET_OFFSET); -- vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod, -- OMAP3_PRM_VOLTSETUP2_OFFSET); -+ voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET); -+ voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET); -+ voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET); - } - - static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) -@@ -178,16 +169,16 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) - (onlp_vsel << vc->common->cmd_onlp_shift) | - (ret_vsel << vc->common->cmd_ret_shift) | - (off_vsel << vc->common->cmd_off_shift)); -- vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg); -+ voltdm->write(vc_val, vc->cmdval_reg); - - /* - * Generic VC parameters init - * XXX This data should be abstracted out - */ -- vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->common->prm_mod, -- OMAP3_PRM_VC_CH_CONF_OFFSET); -- vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->common->prm_mod, -- OMAP3_PRM_VC_I2C_CFG_OFFSET); -+ voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, -+ OMAP3_PRM_VC_CH_CONF_OFFSET); -+ voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, -+ OMAP3_PRM_VC_I2C_CFG_OFFSET); - - omap3_vfsm_init(voltdm); - -@@ -198,8 +189,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) - /* OMAP4 specific voltage init functions */ - static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) - { -- struct omap_vc_channel *vc = voltdm->vc; -- struct omap_vdd_info *vdd = voltdm->vdd; - static bool is_initialized; - u32 vc_val; - -@@ -215,11 +204,11 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | - OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | - OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); -- vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); -+ voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); - - /* XXX These are magic numbers and do not belong! */ - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); -- vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); -+ voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); - - is_initialized = true; - } -@@ -237,34 +226,30 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - return; - } - -- if (!vdd->read_reg || !vdd->write_reg) { -+ if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return; - } - - /* Set up the SMPS_SA(i2c slave address in VC */ -- vc_val = vdd->read_reg(vc->common->prm_mod, -- vc->common->smps_sa_reg); -+ vc_val = voltdm->read(vc->common->smps_sa_reg); - vc_val &= ~vc->smps_sa_mask; - vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; -- vdd->write_reg(vc_val, vc->common->prm_mod, -- vc->common->smps_sa_reg); -+ voltdm->write(vc_val, vc->common->smps_sa_reg); - - /* Setup the VOLRA(pmic reg addr) in VC */ -- vc_val = vdd->read_reg(vc->common->prm_mod, -- vc->common->smps_volra_reg); -+ vc_val = voltdm->read(vc->common->smps_volra_reg); - vc_val &= ~vc->smps_volra_mask; - vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; -- vdd->write_reg(vc_val, vc->common->prm_mod, -- vc->common->smps_volra_reg); -+ voltdm->write(vc_val, vc->common->smps_volra_reg); - - /* Configure the setup times */ -- vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm->voltsetup_reg); -+ vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); - vc_val &= ~vdd->vfsm->voltsetup_mask; - vc_val |= vdd->pmic_info->volt_setup_time << - vdd->vfsm->voltsetup_shift; -- vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm->voltsetup_reg); -+ voltdm->write(vc_val, vdd->vfsm->voltsetup_reg); - - if (cpu_is_omap34xx()) - omap3_vc_init_channel(voltdm); -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index 51d36a8..d0050f0 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -25,7 +25,6 @@ struct voltagedomain; - * struct omap_vc_common - per-VC register/bitfield data - * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register - * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register -- * @prm_mod: PRM module id used for PRM register access - * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start - * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start - * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start -@@ -43,7 +42,6 @@ struct voltagedomain; - struct omap_vc_common { - u32 cmd_on_mask; - u32 valid; -- s16 prm_mod; - u8 smps_sa_reg; - u8 smps_volra_reg; - u8 bypass_val_reg; -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c -index 1a17ed4..6b67203 100644 ---- a/arch/arm/mach-omap2/vc3xxx_data.c -+++ b/arch/arm/mach-omap2/vc3xxx_data.c -@@ -30,7 +30,6 @@ - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. - */ - static struct omap_vc_common omap3_vc_common = { -- .prm_mod = OMAP3430_GR_MOD, - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, - .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c -index 56f3f4a..e3125a3 100644 ---- a/arch/arm/mach-omap2/vc44xx_data.c -+++ b/arch/arm/mach-omap2/vc44xx_data.c -@@ -31,7 +31,6 @@ - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. - */ - static const struct omap_vc_common omap4_vc_common = { -- .prm_mod = OMAP4430_PRM_DEVICE_INST, - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, - .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 9b9f019..9f9f014 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -46,27 +46,6 @@ static LIST_HEAD(voltdm_list); - #define VOLTAGE_DIR_SIZE 16 - static struct dentry *voltage_dir; - --static u32 omap3_voltage_read_reg(u16 mod, u8 offset) --{ -- return omap2_prm_read_mod_reg(mod, offset); --} -- --static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset) --{ -- omap2_prm_write_mod_reg(val, mod, offset); --} -- --static u32 omap4_voltage_read_reg(u16 mod, u8 offset) --{ -- return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, -- mod, offset); --} -- --static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset) --{ -- omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset); --} -- - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - { - char *sys_ck_name; -@@ -183,15 +162,7 @@ static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) - if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) - goto ovdc_out; - -- if (cpu_is_omap34xx()) { -- vdd->read_reg = omap3_voltage_read_reg; -- vdd->write_reg = omap3_voltage_write_reg; -- ret = 0; -- } else if (cpu_is_omap44xx()) { -- vdd->read_reg = omap4_voltage_read_reg; -- vdd->write_reg = omap4_voltage_write_reg; -- ret = 0; -- } -+ ret = 0; - - ovdc_out: - return ret; -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 363eee4..f4198aa 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -68,6 +68,11 @@ struct voltagedomain { - struct list_head pwrdm_list; - struct omap_vc_channel *vc; - -+ /* VC/VP register access functions: SoC specific */ -+ u32 (*read) (u8 offset); -+ void (*write) (u32 val, u8 offset); -+ u32 (*rmw)(u32 mask, u32 bits, u8 offset); -+ - struct omap_vdd_info *vdd; - }; - -@@ -144,8 +149,6 @@ struct omap_vdd_info { - u32 curr_volt; - bool vp_enabled; - -- u32 (*read_reg) (u16 mod, u8 offset); -- void (*write_reg) (u32 val, u16 mod, u8 offset); - int (*volt_scale) (struct voltagedomain *voltdm, - unsigned long target_volt); - }; -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index ad8f05b..1d66749 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -56,6 +56,9 @@ static struct omap_vdd_info omap3_vdd2_info = { - static struct voltagedomain omap3_voltdm_mpu = { - .name = "mpu_iva", - .scalable = true, -+ .read = omap3_prm_vcvp_read, -+ .write = omap3_prm_vcvp_write, -+ .rmw = omap3_prm_vcvp_rmw, - .vc = &omap3_vc_mpu, - .vdd = &omap3_vdd1_info, - }; -@@ -63,6 +66,9 @@ static struct voltagedomain omap3_voltdm_mpu = { - static struct voltagedomain omap3_voltdm_core = { - .name = "core", - .scalable = true, -+ .read = omap3_prm_vcvp_read, -+ .write = omap3_prm_vcvp_write, -+ .rmw = omap3_prm_vcvp_rmw, - .vc = &omap3_vc_core, - .vdd = &omap3_vdd2_info, - }; -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index 43e1d38..e435795 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -62,6 +62,9 @@ static struct omap_vdd_info omap4_vdd_core_info = { - static struct voltagedomain omap4_voltdm_mpu = { - .name = "mpu", - .scalable = true, -+ .read = omap4_prm_vcvp_read, -+ .write = omap4_prm_vcvp_write, -+ .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_mpu, - .vdd = &omap4_vdd_mpu_info, - }; -@@ -69,6 +72,9 @@ static struct voltagedomain omap4_voltdm_mpu = { - static struct voltagedomain omap4_voltdm_iva = { - .name = "iva", - .scalable = true, -+ .read = omap4_prm_vcvp_read, -+ .write = omap4_prm_vcvp_write, -+ .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_iva, - .vdd = &omap4_vdd_iva_info, - }; -@@ -76,6 +82,9 @@ static struct voltagedomain omap4_voltdm_iva = { - static struct voltagedomain omap4_voltdm_core = { - .name = "core", - .scalable = true, -+ .read = omap4_prm_vcvp_read, -+ .write = omap4_prm_vcvp_write, -+ .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_core, - .vdd = &omap4_vdd_core_info, - }; -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index 113c839..88ac742 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -35,19 +35,19 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) - - vsel = vdd->pmic_info->uv_to_vsel(uvdc); - -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | - vp->vp_common->vpconfig_initvdd); - vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; - -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ -- vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd), -- vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd), -+ vp->vpconfig); - - /* Clear initVDD copy trigger bit */ -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - } - - /* Generic voltage init functions */ -@@ -57,7 +57,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - struct omap_vdd_info *vdd = voltdm->vdd; - u32 vp_val; - -- if (!vdd->read_reg || !vdd->write_reg) { -+ if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return; -@@ -67,19 +67,19 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - (vdd->vp_rt_data.vpconfig_errorgain << - vp->vp_common->vpconfig_errorgain_shift) | - vp->vp_common->vpconfig_timeouten; -- vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vp_val, vp->vpconfig); - - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << - vp->vp_common->vstepmin_smpswaittimemin_shift) | - (vdd->vp_rt_data.vstepmin_stepmin << - vp->vp_common->vstepmin_stepmin_shift)); -- vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin); -+ voltdm->write(vp_val, vp->vstepmin); - - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << - vp->vp_common->vstepmax_smpswaittimemax_shift) | - (vdd->vp_rt_data.vstepmax_stepmax << - vp->vp_common->vstepmax_stepmax_shift)); -- vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax); -+ voltdm->write(vp_val, vp->vstepmax); - - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << - vp->vp_common->vlimitto_vddmax_shift) | -@@ -87,7 +87,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - vp->vp_common->vlimitto_vddmin_shift) | - (vdd->vp_rt_data.vlimitto_timeout << - vp->vp_common->vlimitto_timeout_shift)); -- vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto); -+ voltdm->write(vp_val, vp->vlimitto); - - vp_debugfs_init(voltdm); - } -@@ -97,7 +97,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - unsigned long target_volt) - { - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -- struct omap_vdd_info *vdd = voltdm->vdd; - u32 vpconfig; - u8 target_vsel, current_vsel; - int ret, timeout = 0; -@@ -123,21 +122,21 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - } - - /* Configure for VP-Force Update */ -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~(vp->vp_common->vpconfig_initvdd | - vp->vp_common->vpconfig_forceupdate | - vp->vp_common->vpconfig_initvoltage_mask); - vpconfig |= ((target_vsel << - vp->vp_common->vpconfig_initvoltage_shift)); -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ - vpconfig |= vp->vp_common->vpconfig_initvdd; -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - - /* Force update of voltage */ - vpconfig |= vp->vp_common->vpconfig_forceupdate; -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - - /* - * Wait for TransactionDone. Typical latency is <200us. -@@ -170,13 +169,13 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - "to clear the TRANXDONE status\n", - __func__, voltdm->name); - -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig = voltdm->read(vp->vpconfig); - /* Clear initVDD copy trigger bit */ - vpconfig &= ~vp->vp_common->vpconfig_initvdd; -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - /* Clear force bit */ - vpconfig &= ~vp->vp_common->vpconfig_forceupdate; -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - - return 0; - } -@@ -199,13 +198,13 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) - } - - vdd = voltdm->vdd; -- if (!vdd->read_reg) { -+ if (!voltdm->read) { - pr_err("%s: No read API for reading vdd_%s regs\n", - __func__, voltdm->name); - return 0; - } - -- curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); -+ curr_vsel = voltdm->read(vp->voltage); - - if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { - pr_warning("%s: PMIC function to convert vsel to voltage" -@@ -236,7 +235,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) - - vdd = voltdm->vdd; - vp = voltdm->vdd->vp_data; -- if (!vdd->read_reg || !vdd->write_reg) { -+ if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return; -@@ -249,9 +248,9 @@ void omap_vp_enable(struct voltagedomain *voltdm) - vp_latch_vsel(voltdm); - - /* Enable VP */ -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig = voltdm->read(vp->vpconfig); - vpconfig |= vp->vp_common->vpconfig_vpenable; -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - vdd->vp_enabled = true; - } - -@@ -276,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) - - vdd = voltdm->vdd; - vp = voltdm->vdd->vp_data; -- if (!vdd->read_reg || !vdd->write_reg) { -+ if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return; -@@ -290,15 +289,15 @@ void omap_vp_disable(struct voltagedomain *voltdm) - } - - /* Disable VP */ -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); -+ vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~vp->vp_common->vpconfig_vpenable; -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); -+ voltdm->write(vpconfig, vp->vpconfig); - - /* - * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us - */ -- omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp->vstatus)), -- VP_IDLE_TIMEOUT, timeout); -+ omap_test_timeout((voltdm->read(vp->vstatus)), -+ VP_IDLE_TIMEOUT, timeout); - - if (timeout >= VP_IDLE_TIMEOUT) - pr_warning("%s: vdd_%s idle timedout\n", -@@ -322,7 +321,7 @@ static int vp_volt_debug_get(void *data, u64 *val) - return -EINVAL; - } - -- vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); -+ vsel = voltdm->read(vp->voltage); - - if (!vdd->pmic_info->vsel_to_uv) { - pr_warning("PMIC function to convert vsel to voltage" -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 2c9cd76..79aa8d3 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -62,7 +62,6 @@ struct omap_vp_ops { - * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg - * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg - * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg -- * @prm_mod: PRM module id used for PRM register access - * - * XXX It it not necessary to have both a mask and a shift for the same - * bitfield - remove one -@@ -75,7 +74,6 @@ struct omap_vp_common_data { - u32 vpconfig_initvdd; - u32 vpconfig_forceupdate; - u32 vpconfig_vpenable; -- s16 prm_mod; - u8 vpconfig_erroroffset_shift; - u8 vpconfig_errorgain_shift; - u8 vpconfig_initvoltage_shift; -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c -index 0372c1a..b01d333 100644 ---- a/arch/arm/mach-omap2/vp3xxx_data.c -+++ b/arch/arm/mach-omap2/vp3xxx_data.c -@@ -37,7 +37,6 @@ static const struct omap_vp_ops omap3_vp_ops = { - * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. - */ - static const struct omap_vp_common_data omap3_vp_common = { -- .prm_mod = OMAP3430_GR_MOD, - .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, - .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, - .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c -index 738ba04..9704c7b 100644 ---- a/arch/arm/mach-omap2/vp44xx_data.c -+++ b/arch/arm/mach-omap2/vp44xx_data.c -@@ -37,7 +37,6 @@ static const struct omap_vp_ops omap4_vp_ops = { - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. - */ - static const struct omap_vp_common_data omap4_vp_common = { -- .prm_mod = OMAP4430_PRM_DEVICE_INST, - .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, - .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, - .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address-configuration.patch deleted file mode 100644 index a538b7b..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address-configuration.patch +++ /dev/null @@ -1,145 +0,0 @@ -From 8a87503677e21700900e300a8e319a8239d6591f Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 29 Mar 2011 14:02:36 -0700 -Subject: [PATCH 118/149] OMAP3+: VC: cleanup i2c slave address configuration - -- Add an i2c_slave_address field to the omap_vc_channel -- use VC/VP read/modify/write helper instead of open-coding -- remove smps_sa_shift, use __ffs(mask) for shift value -- I2C addresses 10-bit, change size to u16 - -Special thanks to Shweta Gulati <shweta.gulati@ti.com> for suggesting -the use of __ffs(x) instead of ffs(x) - 1. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 12 +++++++----- - arch/arm/mach-omap2/vc.h | 8 +++++--- - arch/arm/mach-omap2/vc3xxx_data.c | 2 -- - arch/arm/mach-omap2/vc44xx_data.c | 3 --- - arch/arm/mach-omap2/voltage.h | 2 +- - 5 files changed, 13 insertions(+), 14 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 9c2706c..ca6165d 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -232,11 +232,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - return; - } - -- /* Set up the SMPS_SA(i2c slave address in VC */ -- vc_val = voltdm->read(vc->common->smps_sa_reg); -- vc_val &= ~vc->smps_sa_mask; -- vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; -- voltdm->write(vc_val, vc->common->smps_sa_reg); -+ /* get PMIC/board specific settings */ -+ vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; -+ -+ /* Configure the i2c slave address for this VC */ -+ voltdm->rmw(vc->smps_sa_mask, -+ vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), -+ vc->common->smps_sa_reg); - - /* Setup the VOLRA(pmic reg addr) in VC */ - vc_val = voltdm->read(vc->common->smps_volra_reg); -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index d0050f0..165fc74 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -57,20 +57,22 @@ struct omap_vc_common { - /** - * struct omap_vc_channel - VC per-instance data - * @common: pointer to VC common data for this platform -- * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register -+ * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register - * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register -- * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register - * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register - * - * XXX It is not necessary to have both a *_mask and a *_shift - - * remove one - */ - struct omap_vc_channel { -+ /* channel state */ -+ u16 i2c_slave_addr; -+ -+ /* register access data */ - const struct omap_vc_common *common; - u32 smps_sa_mask; - u32 smps_volra_mask; - u8 cmdval_reg; -- u8 smps_sa_shift; - u8 smps_volra_shift; - }; - -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c -index 6b67203..86be50c 100644 ---- a/arch/arm/mach-omap2/vc3xxx_data.c -+++ b/arch/arm/mach-omap2/vc3xxx_data.c -@@ -47,7 +47,6 @@ static struct omap_vc_common omap3_vc_common = { - struct omap_vc_channel omap3_vc_mpu = { - .common = &omap3_vc_common, - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, -- .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, - .smps_volra_shift = OMAP3430_VOLRA0_SHIFT, - .smps_volra_mask = OMAP3430_VOLRA0_MASK, -@@ -56,7 +55,6 @@ struct omap_vc_channel omap3_vc_mpu = { - struct omap_vc_channel omap3_vc_core = { - .common = &omap3_vc_common, - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, -- .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, - .smps_volra_shift = OMAP3430_VOLRA1_SHIFT, - .smps_volra_mask = OMAP3430_VOLRA1_MASK, -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c -index e3125a3..af922b4 100644 ---- a/arch/arm/mach-omap2/vc44xx_data.c -+++ b/arch/arm/mach-omap2/vc44xx_data.c -@@ -49,7 +49,6 @@ static const struct omap_vc_common omap4_vc_common = { - struct omap_vc_channel omap4_vc_mpu = { - .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, -- .smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT, - .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, - .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, -@@ -58,7 +57,6 @@ struct omap_vc_channel omap4_vc_mpu = { - struct omap_vc_channel omap4_vc_iva = { - .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, -- .smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT, - .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, - .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, -@@ -67,7 +65,6 @@ struct omap_vc_channel omap4_vc_iva = { - struct omap_vc_channel omap4_vc_core = { - .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, -- .smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT, - .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, - .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index f4198aa..639e85c 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -110,13 +110,13 @@ struct omap_volt_pmic_info { - u32 ret_volt; - u32 off_volt; - u16 volt_setup_time; -+ u16 i2c_slave_addr; - u8 vp_erroroffset; - u8 vp_vstepmin; - u8 vp_vstepmax; - u8 vp_vddmin; - u8 vp_vddmax; - u8 vp_timeout_us; -- u8 i2c_slave_addr; - u8 volt_reg_addr; - u8 cmd_reg_addr; - unsigned long (*vsel_to_uv) (const u8 vsel); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address-configuration.patch deleted file mode 100644 index 0862023..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address-configuration.patch +++ /dev/null @@ -1,185 +0,0 @@ -From 3296114685831f06d5a73057464afbbed489dea4 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Thu, 9 Jun 2011 11:01:55 -0700 -Subject: [PATCH 119/149] OMAP3+: VC: cleanup PMIC register address configuration - -- support both voltage register address and command register address - for each VC channel -- add fields for voltage register address (volra) and command register - address (cmdra) to struct omap_vc_channel -- use VC/VP register access read/modify/write helper -- remove volra_shift field (use __ffs(mask) for shift value) -- I2C addresses 10-bit, change size to u16 - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 17 ++++++++++++----- - arch/arm/mach-omap2/vc.h | 9 ++++----- - arch/arm/mach-omap2/vc3xxx_data.c | 5 +++-- - arch/arm/mach-omap2/vc44xx_data.c | 7 ++++--- - arch/arm/mach-omap2/voltage.h | 4 ++-- - 5 files changed, 25 insertions(+), 17 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index ca6165d..50b1f7c 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -234,17 +234,24 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - - /* get PMIC/board specific settings */ - vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; -+ vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; -+ vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; - - /* Configure the i2c slave address for this VC */ - voltdm->rmw(vc->smps_sa_mask, - vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), - vc->common->smps_sa_reg); - -- /* Setup the VOLRA(pmic reg addr) in VC */ -- vc_val = voltdm->read(vc->common->smps_volra_reg); -- vc_val &= ~vc->smps_volra_mask; -- vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; -- voltdm->write(vc_val, vc->common->smps_volra_reg); -+ /* -+ * Configure the PMIC register addresses. -+ */ -+ voltdm->rmw(vc->smps_volra_mask, -+ vc->volt_reg_addr << __ffs(vc->smps_volra_mask), -+ vc->common->smps_volra_reg); -+ if (vc->cmd_reg_addr) -+ voltdm->rmw(vc->smps_cmdra_mask, -+ vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), -+ vc->common->smps_cmdra_reg); - - /* Configure the setup times */ - vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index 165fc74..f3b0551 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -44,6 +44,7 @@ struct omap_vc_common { - u32 valid; - u8 smps_sa_reg; - u8 smps_volra_reg; -+ u8 smps_cmdra_reg; - u8 bypass_val_reg; - u8 data_shift; - u8 slaveaddr_shift; -@@ -59,21 +60,19 @@ struct omap_vc_common { - * @common: pointer to VC common data for this platform - * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register - * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register -- * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register -- * -- * XXX It is not necessary to have both a *_mask and a *_shift - -- * remove one - */ - struct omap_vc_channel { - /* channel state */ - u16 i2c_slave_addr; -+ u16 volt_reg_addr; -+ u16 cmd_reg_addr; - - /* register access data */ - const struct omap_vc_common *common; - u32 smps_sa_mask; - u32 smps_volra_mask; -+ u32 smps_cmdra_mask; - u8 cmdval_reg; -- u8 smps_volra_shift; - }; - - extern struct omap_vc_channel omap3_vc_mpu; -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c -index 86be50c..df8bd5e 100644 ---- a/arch/arm/mach-omap2/vc3xxx_data.c -+++ b/arch/arm/mach-omap2/vc3xxx_data.c -@@ -32,6 +32,7 @@ - static struct omap_vc_common omap3_vc_common = { - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, -+ .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, - .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, - .data_shift = OMAP3430_DATA_SHIFT, - .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, -@@ -48,14 +49,14 @@ struct omap_vc_channel omap3_vc_mpu = { - .common = &omap3_vc_common, - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, -- .smps_volra_shift = OMAP3430_VOLRA0_SHIFT, - .smps_volra_mask = OMAP3430_VOLRA0_MASK, -+ .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, - }; - - struct omap_vc_channel omap3_vc_core = { - .common = &omap3_vc_common, - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, -- .smps_volra_shift = OMAP3430_VOLRA1_SHIFT, - .smps_volra_mask = OMAP3430_VOLRA1_MASK, -+ .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, - }; -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c -index af922b4..5d104ff 100644 ---- a/arch/arm/mach-omap2/vc44xx_data.c -+++ b/arch/arm/mach-omap2/vc44xx_data.c -@@ -33,6 +33,7 @@ - static const struct omap_vc_common omap4_vc_common = { - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, -+ .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, - .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, - .data_shift = OMAP4430_DATA_SHIFT, - .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT, -@@ -50,23 +51,23 @@ struct omap_vc_channel omap4_vc_mpu = { - .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, - .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, -- .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, - .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, -+ .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, - }; - - struct omap_vc_channel omap4_vc_iva = { - .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, - .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, -- .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, - .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, -+ .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, - }; - - struct omap_vc_channel omap4_vc_core = { - .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, - .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, -- .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, - .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, -+ .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, - }; - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 639e85c..3129d64 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -111,14 +111,14 @@ struct omap_volt_pmic_info { - u32 off_volt; - u16 volt_setup_time; - u16 i2c_slave_addr; -+ u16 volt_reg_addr; -+ u16 cmd_reg_addr; - u8 vp_erroroffset; - u8 vp_vstepmin; - u8 vp_vstepmax; - u8 vp_vddmin; - u8 vp_vddmax; - u8 vp_timeout_us; -- u8 volt_reg_addr; -- u8 cmd_reg_addr; - unsigned long (*vsel_to_uv) (const u8 vsel); - u8 (*uv_to_vsel) (unsigned long uV); - }; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct-instead-of.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct-instead-of.patch deleted file mode 100644 index 37b7af0..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct-instead-of.patch +++ /dev/null @@ -1,42 +0,0 @@ -From ebe24c52d0431437103277f4e378c3dad0bde3e9 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 29 Mar 2011 14:24:47 -0700 -Subject: [PATCH 120/149] OMAP3+: VC bypass: use fields from VC struct instead of PMIC info - -The PMIC configurable variables should be isolated to VC initialization. -The rest of the VC functions (like VC bypass) should use the i2c slave address -and voltage register address fields from struct omap_vc_channel. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 7 ++----- - 1 files changed, 2 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 50b1f7c..9e0dc8d 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -91,7 +91,6 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, - unsigned long target_volt) - { - struct omap_vc_channel *vc = voltdm->vc; -- struct omap_vdd_info *vdd = voltdm->vdd; - u32 loop_cnt = 0, retries_cnt = 0; - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; - u8 target_vsel, current_vsel; -@@ -104,10 +103,8 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, - vc_valid = vc->common->valid; - vc_bypass_val_reg = vc->common->bypass_val_reg; - vc_bypass_value = (target_vsel << vc->common->data_shift) | -- (vdd->pmic_info->volt_reg_addr << -- vc->common->regaddr_shift) | -- (vdd->pmic_info->i2c_slave_addr << -- vc->common->slaveaddr_shift); -+ (vc->volt_reg_addr << vc->common->regaddr_shift) | -+ (vc->i2c_slave_addr << vc->common->slaveaddr_shift); - - voltdm->write(vc_bypass_value, vc_bypass_val_reg); - voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time-configuration.patch deleted file mode 100644 index 1e103a4..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time-configuration.patch +++ /dev/null @@ -1,227 +0,0 @@ -From 50a49ce5dfe92764b167510f4edb9dcde880f9d5 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 29 Mar 2011 14:36:04 -0700 -Subject: [PATCH 121/149] OMAP3+: VC: cleanup voltage setup time configuration - -- add setup_time field to struct omap_vc_channel (init'd from PMIC data) -- use VC/VP register access helper for read/modify/write -- move VFSM structure from omap_vdd_info into struct voltagedomain -- remove redunant _data suffix from VFSM structures and variables - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 10 ++++------ - arch/arm/mach-omap2/vc.h | 1 + - arch/arm/mach-omap2/voltage.h | 7 +++---- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 ++++---- - arch/arm/mach-omap2/voltagedomains44xx_data.c | 12 ++++++------ - 5 files changed, 18 insertions(+), 20 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 9e0dc8d..d7415ea 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -214,7 +214,6 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - { - struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; -- u32 vc_val; - - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { - pr_err("%s: PMIC info requried to configure vc for" -@@ -233,6 +232,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; - vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; - vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; -+ vc->setup_time = vdd->pmic_info->volt_setup_time; - - /* Configure the i2c slave address for this VC */ - voltdm->rmw(vc->smps_sa_mask, -@@ -251,11 +251,9 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - vc->common->smps_cmdra_reg); - - /* Configure the setup times */ -- vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); -- vc_val &= ~vdd->vfsm->voltsetup_mask; -- vc_val |= vdd->pmic_info->volt_setup_time << -- vdd->vfsm->voltsetup_shift; -- voltdm->write(vc_val, vdd->vfsm->voltsetup_reg); -+ voltdm->rmw(voltdm->vfsm->voltsetup_mask, -+ vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), -+ voltdm->vfsm->voltsetup_reg); - - if (cpu_is_omap34xx()) - omap3_vc_init_channel(voltdm); -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index f3b0551..45e63cf 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -66,6 +66,7 @@ struct omap_vc_channel { - u16 i2c_slave_addr; - u16 volt_reg_addr; - u16 cmd_reg_addr; -+ u16 setup_time; - - /* register access data */ - const struct omap_vc_common *common; -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 3129d64..2b2ab56 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -36,7 +36,7 @@ struct powerdomain; - struct omap_vdd_info; - - /** -- * struct omap_vfsm_instance_data - per-voltage manager FSM register/bitfield -+ * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield - * data - * @voltsetup_mask: SETUP_TIME* bitmask in the PRM_VOLTSETUP* register - * @voltsetup_reg: register offset of PRM_VOLTSETUP from PRM base -@@ -46,7 +46,7 @@ struct omap_vdd_info; - * XXX It is not necessary to have both a _mask and a _shift for the same - * bitfield - remove one! - */ --struct omap_vfsm_instance_data { -+struct omap_vfsm_instance { - u32 voltsetup_mask; - u8 voltsetup_reg; - u8 voltsetup_shift; -@@ -67,6 +67,7 @@ struct voltagedomain { - struct list_head node; - struct list_head pwrdm_list; - struct omap_vc_channel *vc; -+ const struct omap_vfsm_instance *vfsm; - - /* VC/VP register access functions: SoC specific */ - u32 (*read) (u8 offset); -@@ -133,7 +134,6 @@ struct omap_volt_pmic_info { - * @vp_data : the register values, shifts, masks for various - * vp registers - * @vp_rt_data : VP data derived at runtime, not predefined -- * @vfsm : voltage manager FSM data - * @debug_dir : debug directory for this voltage domain. - * @curr_volt : current voltage for this vdd. - * @vp_enabled : flag to keep track of whether vp is enabled or not -@@ -144,7 +144,6 @@ struct omap_vdd_info { - struct omap_volt_pmic_info *pmic_info; - struct omap_vp_instance_data *vp_data; - struct omap_vp_runtime_data vp_rt_data; -- const struct omap_vfsm_instance_data *vfsm; - struct dentry *debug_dir; - u32 curr_volt; - bool vp_enabled; -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index 1d66749..4ea9a7b 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -31,7 +31,7 @@ - * VDD data - */ - --static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { -+static const struct omap_vfsm_instance omap3_vdd1_vfsm = { - .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, - .voltsetup_shift = OMAP3430_SETUP_TIME1_SHIFT, - .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, -@@ -39,10 +39,9 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { - - static struct omap_vdd_info omap3_vdd1_info = { - .vp_data = &omap3_vp1_data, -- .vfsm = &omap3_vdd1_vfsm_data, - }; - --static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { -+static const struct omap_vfsm_instance omap3_vdd2_vfsm = { - .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, - .voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT, - .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, -@@ -50,7 +49,6 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { - - static struct omap_vdd_info omap3_vdd2_info = { - .vp_data = &omap3_vp2_data, -- .vfsm = &omap3_vdd2_vfsm_data, - }; - - static struct voltagedomain omap3_voltdm_mpu = { -@@ -60,6 +58,7 @@ static struct voltagedomain omap3_voltdm_mpu = { - .write = omap3_prm_vcvp_write, - .rmw = omap3_prm_vcvp_rmw, - .vc = &omap3_vc_mpu, -+ .vfsm = &omap3_vdd1_vfsm, - .vdd = &omap3_vdd1_info, - }; - -@@ -70,6 +69,7 @@ static struct voltagedomain omap3_voltdm_core = { - .write = omap3_prm_vcvp_write, - .rmw = omap3_prm_vcvp_rmw, - .vc = &omap3_vc_core, -+ .vfsm = &omap3_vdd2_vfsm, - .vdd = &omap3_vdd2_info, - }; - -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index e435795..dd4bd22 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -32,31 +32,28 @@ - #include "vc.h" - #include "vp.h" - --static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { -+static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, - }; - - static struct omap_vdd_info omap4_vdd_mpu_info = { - .vp_data = &omap4_vp_mpu_data, -- .vfsm = &omap4_vdd_mpu_vfsm_data, - }; - --static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { -+static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, - }; - - static struct omap_vdd_info omap4_vdd_iva_info = { - .vp_data = &omap4_vp_iva_data, -- .vfsm = &omap4_vdd_iva_vfsm_data, - }; - --static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { -+static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, - }; - - static struct omap_vdd_info omap4_vdd_core_info = { - .vp_data = &omap4_vp_core_data, -- .vfsm = &omap4_vdd_core_vfsm_data, - }; - - static struct voltagedomain omap4_voltdm_mpu = { -@@ -66,6 +63,7 @@ static struct voltagedomain omap4_voltdm_mpu = { - .write = omap4_prm_vcvp_write, - .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_mpu, -+ .vfsm = &omap4_vdd_mpu_vfsm, - .vdd = &omap4_vdd_mpu_info, - }; - -@@ -76,6 +74,7 @@ static struct voltagedomain omap4_voltdm_iva = { - .write = omap4_prm_vcvp_write, - .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_iva, -+ .vfsm = &omap4_vdd_iva_vfsm, - .vdd = &omap4_vdd_iva_info, - }; - -@@ -86,6 +85,7 @@ static struct voltagedomain omap4_voltdm_core = { - .write = omap4_prm_vcvp_write, - .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_core, -+ .vfsm = &omap4_vdd_core_vfsm, - .vdd = &omap4_vdd_core_info, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off-command-configuration-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off-command-configuration-.patch deleted file mode 100644 index 00085fd..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off-command-configuration-.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 998b0b0ef5013478d128a2b1a4f435b94394a1a5 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 29 Mar 2011 15:14:38 -0700 -Subject: [PATCH 122/149] OMAP3+: VC: move on/onlp/ret/off command configuration into common init - -Configuring the on/onlp/ret/off command values is common to OMAP3 & 4. -Move from OMAP3-only init into common VC init. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 30 +++++++++++++----------------- - 1 files changed, 13 insertions(+), 17 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index d7415ea..7df4438 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -148,26 +148,11 @@ static void __init omap3_vfsm_init(struct voltagedomain *voltdm) - - static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) - { -- struct omap_vc_channel *vc = voltdm->vc; -- struct omap_vdd_info *vdd = voltdm->vdd; - static bool is_initialized; -- u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; -- u32 vc_val; - - if (is_initialized) - return; - -- /* Set up the on, inactive, retention and off voltage */ -- on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); -- onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); -- ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); -- off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); -- vc_val = ((on_vsel << vc->common->cmd_on_shift) | -- (onlp_vsel << vc->common->cmd_onlp_shift) | -- (ret_vsel << vc->common->cmd_ret_shift) | -- (off_vsel << vc->common->cmd_off_shift)); -- voltdm->write(vc_val, vc->cmdval_reg); -- - /* - * Generic VC parameters init - * XXX This data should be abstracted out -@@ -192,8 +177,6 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) - if (is_initialized) - return; - -- /* TODO: Configure setup times and CMD_VAL values*/ -- - /* - * Generic VC parameters init - * XXX This data should be abstracted out -@@ -214,6 +197,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - { - struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; -+ u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; -+ u32 val; - - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { - pr_err("%s: PMIC info requried to configure vc for" -@@ -250,6 +235,17 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), - vc->common->smps_cmdra_reg); - -+ /* Set up the on, inactive, retention and off voltage */ -+ on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); -+ onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); -+ ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); -+ off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); -+ val = ((on_vsel << vc->common->cmd_on_shift) | -+ (onlp_vsel << vc->common->cmd_onlp_shift) | -+ (ret_vsel << vc->common->cmd_ret_shift) | -+ (off_vsel << vc->common->cmd_off_shift)); -+ voltdm->write(val, vc->cmdval_reg); -+ - /* Configure the setup times */ - voltdm->rmw(voltdm->vfsm->voltsetup_mask, - vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch deleted file mode 100644 index ce09144..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch +++ /dev/null @@ -1,267 +0,0 @@ -From 7f3361ef34caa14bf669907555a0bc7dbe92f8c9 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 29 Mar 2011 15:57:16 -0700 -Subject: [PATCH 123/149] OMAP3+: VC: abstract out channel configuration - -VC channel configuration is programmed based on settings coming from -the PMIC configuration. - -Currently, the VC channel to PMIC mapping is a simple one-to-one -mapping. Whenever a VC channel parameter is configured (i2c slave -addres, PMIC register address, on/ret/off command), the corresponding -bits are enabled in the VC channel configuration register. - -If necessary, the programmability of channel configuration settings -could be extended to board/PMIC files, however, because this patch -changes the channel configuration to be programmed based on existing -values from the PMIC settings, it may not be required. - -Also note that starting with OMAP4, where there are more than 2 -channels, one channel is identified as the "default" channel. When -any of the bits in the channel config for the other channels are zero, -it means to use the default channel. The OMAP4 TRM (at least through -NDA version Q) is wrong in describing which is the default channel. -The default channel on OMAP4 is MPU, not CORE as decribed in the TRM. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 70 ++++++++++++++++++++++++++++++------ - arch/arm/mach-omap2/vc.h | 9 +++++ - arch/arm/mach-omap2/vc3xxx_data.c | 3 ++ - arch/arm/mach-omap2/vc44xx_data.c | 5 +++ - 4 files changed, 75 insertions(+), 12 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 7df4438..e413b97 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -10,6 +10,52 @@ - #include "prm-regbits-44xx.h" - #include "prm44xx.h" - -+/* -+ * Channel configuration bits, common for OMAP3 & 4 -+ * OMAP3 register: PRM_VC_CH_CONF -+ * OMAP4 register: PRM_VC_CFG_CHANNEL -+ */ -+#define CFG_CHANNEL_SA BIT(0) -+#define CFG_CHANNEL_RAV BIT(1) -+#define CFG_CHANNEL_RAC BIT(2) -+#define CFG_CHANNEL_RACEN BIT(3) -+#define CFG_CHANNEL_CMD BIT(4) -+#define CFG_CHANNEL_MASK 0x3f -+ -+/** -+ * omap_vc_config_channel - configure VC channel to PMIC mappings -+ * @voltdm: pointer to voltagdomain defining the desired VC channel -+ * -+ * Configures the VC channel to PMIC mappings for the following -+ * PMIC settings -+ * - i2c slave address (SA) -+ * - voltage configuration address (RAV) -+ * - command configuration address (RAC) and enable bit (RACEN) -+ * - command values for ON, ONLP, RET and OFF (CMD) -+ * -+ * This function currently only allows flexible configuration of the -+ * non-default channel. Starting with OMAP4, there are more than 2 -+ * channels, with one defined as the default (on OMAP4, it's MPU.) -+ * Only the non-default channel can be configured. -+ */ -+static int omap_vc_config_channel(struct voltagedomain *voltdm) -+{ -+ struct omap_vc_channel *vc = voltdm->vc; -+ -+ /* -+ * For default channel, the only configurable bit is RACEN. -+ * All others must stay at zero (see function comment above.) -+ */ -+ if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) -+ vc->cfg_channel &= CFG_CHANNEL_RACEN; -+ -+ voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, -+ vc->cfg_channel << vc->cfg_channel_sa_shift, -+ vc->common->cfg_channel_reg); -+ -+ return 0; -+} -+ - /* Voltage scale and accessory APIs */ - int omap_vc_pre_scale(struct voltagedomain *voltdm, - unsigned long target_volt, -@@ -157,8 +203,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) - * Generic VC parameters init - * XXX This data should be abstracted out - */ -- voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, -- OMAP3_PRM_VC_CH_CONF_OFFSET); - voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, - OMAP3_PRM_VC_I2C_CFG_OFFSET); - -@@ -177,15 +221,6 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) - if (is_initialized) - return; - -- /* -- * Generic VC parameters init -- * XXX This data should be abstracted out -- */ -- vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | -- OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | -- OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); -- voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); -- - /* XXX These are magic numbers and do not belong! */ - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); - voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); -@@ -213,6 +248,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - return; - } - -+ vc->cfg_channel = 0; -+ - /* get PMIC/board specific settings */ - vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; - vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; -@@ -223,6 +260,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - voltdm->rmw(vc->smps_sa_mask, - vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), - vc->common->smps_sa_reg); -+ vc->cfg_channel |= CFG_CHANNEL_SA; - - /* - * Configure the PMIC register addresses. -@@ -230,10 +268,14 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - voltdm->rmw(vc->smps_volra_mask, - vc->volt_reg_addr << __ffs(vc->smps_volra_mask), - vc->common->smps_volra_reg); -- if (vc->cmd_reg_addr) -+ vc->cfg_channel |= CFG_CHANNEL_RAV; -+ -+ if (vc->cmd_reg_addr) { - voltdm->rmw(vc->smps_cmdra_mask, - vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), - vc->common->smps_cmdra_reg); -+ vc->cfg_channel |= CFG_CHANNEL_RAC | CFG_CHANNEL_RACEN; -+ } - - /* Set up the on, inactive, retention and off voltage */ - on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); -@@ -245,6 +287,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - (ret_vsel << vc->common->cmd_ret_shift) | - (off_vsel << vc->common->cmd_off_shift)); - voltdm->write(val, vc->cmdval_reg); -+ vc->cfg_channel |= CFG_CHANNEL_CMD; -+ -+ /* Channel configuration */ -+ omap_vc_config_channel(voltdm); - - /* Configure the setup times */ - voltdm->rmw(voltdm->vfsm->voltsetup_mask, -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index 45e63cf..604f5b6 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -53,20 +53,28 @@ struct omap_vc_common { - u8 cmd_onlp_shift; - u8 cmd_ret_shift; - u8 cmd_off_shift; -+ u8 cfg_channel_reg; - }; - -+/* omap_vc_channel.flags values */ -+#define OMAP_VC_CHANNEL_DEFAULT BIT(0) -+ - /** - * struct omap_vc_channel - VC per-instance data -+ * @flags: VC channel-specific flags (optional) - * @common: pointer to VC common data for this platform - * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register - * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register - */ - struct omap_vc_channel { -+ u8 flags; -+ - /* channel state */ - u16 i2c_slave_addr; - u16 volt_reg_addr; - u16 cmd_reg_addr; - u16 setup_time; -+ u8 cfg_channel; - - /* register access data */ - const struct omap_vc_common *common; -@@ -74,6 +82,7 @@ struct omap_vc_channel { - u32 smps_volra_mask; - u32 smps_cmdra_mask; - u8 cmdval_reg; -+ u8 cfg_channel_sa_shift; - }; - - extern struct omap_vc_channel omap3_vc_mpu; -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c -index df8bd5e..f4449eb 100644 ---- a/arch/arm/mach-omap2/vc3xxx_data.c -+++ b/arch/arm/mach-omap2/vc3xxx_data.c -@@ -43,6 +43,7 @@ static struct omap_vc_common omap3_vc_common = { - .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, - .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, - .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, -+ .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, - }; - - struct omap_vc_channel omap3_vc_mpu = { -@@ -51,6 +52,7 @@ struct omap_vc_channel omap3_vc_mpu = { - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, - .smps_volra_mask = OMAP3430_VOLRA0_MASK, - .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, -+ .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, - }; - - struct omap_vc_channel omap3_vc_core = { -@@ -59,4 +61,5 @@ struct omap_vc_channel omap3_vc_core = { - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, - .smps_volra_mask = OMAP3430_VOLRA1_MASK, - .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, -+ .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, - }; -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c -index 5d104ff..1610bde 100644 ---- a/arch/arm/mach-omap2/vc44xx_data.c -+++ b/arch/arm/mach-omap2/vc44xx_data.c -@@ -44,15 +44,18 @@ static const struct omap_vc_common omap4_vc_common = { - .cmd_onlp_shift = OMAP4430_ONLP_SHIFT, - .cmd_ret_shift = OMAP4430_RET_SHIFT, - .cmd_off_shift = OMAP4430_OFF_SHIFT, -+ .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, - }; - - /* VC instance data for each controllable voltage line */ - struct omap_vc_channel omap4_vc_mpu = { -+ .flags = OMAP_VC_CHANNEL_DEFAULT, - .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, - .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, - .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, - .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, -+ .cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT, - }; - - struct omap_vc_channel omap4_vc_iva = { -@@ -61,6 +64,7 @@ struct omap_vc_channel omap4_vc_iva = { - .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, - .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, - .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, -+ .cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT, - }; - - struct omap_vc_channel omap4_vc_core = { -@@ -69,5 +73,6 @@ struct omap_vc_channel omap4_vc_core = { - .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, - .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, - .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, -+ .cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct-from-vdd_info-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct-from-vdd_info-.patch deleted file mode 100644 index 9c5fbe3..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct-from-vdd_info-.patch +++ /dev/null @@ -1,394 +0,0 @@ -From 94945494c16d0ffd7b52b12492068abf5310654d Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 30 Mar 2011 11:01:10 -0700 -Subject: [PATCH 124/149] OMAP3+: voltage domain: move PMIC struct from vdd_info into struct voltagedomain - -Move structure containing PMIC configurable settings into struct -voltagedomain. In the process, rename from omap_volt_pmic_info to -omap_voltdm_pmic (_info suffix is not helpful.) - -No functional changes. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/omap_twl.c | 28 ++++++++++++++-------------- - arch/arm/mach-omap2/vc.c | 29 ++++++++++++++--------------- - arch/arm/mach-omap2/voltage.c | 29 ++++++++++++----------------- - arch/arm/mach-omap2/voltage.h | 12 +++++------- - arch/arm/mach-omap2/vp.c | 13 ++++++------- - 5 files changed, 51 insertions(+), 60 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index 3249fe3..e467d45 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -143,7 +143,7 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) - return DIV_ROUND_UP(uv - 600000, 12500) + 1; - } - --static struct omap_volt_pmic_info omap3_mpu_volt_info = { -+static struct omap_voltdm_pmic omap3_mpu_pmic = { - .slew_rate = 4000, - .step_size = 12500, - .on_volt = 1200000, -@@ -163,7 +163,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { - .uv_to_vsel = twl4030_uv_to_vsel, - }; - --static struct omap_volt_pmic_info omap3_core_volt_info = { -+static struct omap_voltdm_pmic omap3_core_pmic = { - .slew_rate = 4000, - .step_size = 12500, - .on_volt = 1200000, -@@ -183,7 +183,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { - .uv_to_vsel = twl4030_uv_to_vsel, - }; - --static struct omap_volt_pmic_info omap4_mpu_volt_info = { -+static struct omap_voltdm_pmic omap4_mpu_pmic = { - .slew_rate = 4000, - .step_size = 12500, - .on_volt = 1350000, -@@ -203,7 +203,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { - .uv_to_vsel = twl6030_uv_to_vsel, - }; - --static struct omap_volt_pmic_info omap4_iva_volt_info = { -+static struct omap_voltdm_pmic omap4_iva_pmic = { - .slew_rate = 4000, - .step_size = 12500, - .on_volt = 1100000, -@@ -223,7 +223,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { - .uv_to_vsel = twl6030_uv_to_vsel, - }; - --static struct omap_volt_pmic_info omap4_core_volt_info = { -+static struct omap_voltdm_pmic omap4_core_pmic = { - .slew_rate = 4000, - .step_size = 12500, - .on_volt = 1100000, -@@ -251,13 +251,13 @@ int __init omap4_twl_init(void) - return -ENODEV; - - voltdm = voltdm_lookup("mpu"); -- omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); -+ omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic); - - voltdm = voltdm_lookup("iva"); -- omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); -+ omap_voltage_register_pmic(voltdm, &omap4_iva_pmic); - - voltdm = voltdm_lookup("core"); -- omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); -+ omap_voltage_register_pmic(voltdm, &omap4_core_pmic); - - return 0; - } -@@ -270,10 +270,10 @@ int __init omap3_twl_init(void) - return -ENODEV; - - if (cpu_is_omap3630()) { -- omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; -- omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; -- omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; -- omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; -+ omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; -+ omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; -+ omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; -+ omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; - } - - /* -@@ -289,10 +289,10 @@ int __init omap3_twl_init(void) - omap3_twl_set_sr_bit(true); - - voltdm = voltdm_lookup("mpu_iva"); -- omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); -+ omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); - - voltdm = voltdm_lookup("core"); -- omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); -+ omap_voltage_register_pmic(voltdm, &omap3_core_pmic); - - return 0; - } -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index e413b97..c431ca2 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -70,13 +70,13 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - vp_common = vdd->vp_data->vp_common; - - /* Check if sufficient pmic info is available for this vdd */ -- if (!vdd->pmic_info) { -+ if (!voltdm->pmic) { - pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", - __func__, voltdm->name); - return -EINVAL; - } - -- if (!vdd->pmic_info->uv_to_vsel) { -+ if (!voltdm->pmic->uv_to_vsel) { - pr_err("%s: PMIC function to convert voltage in uV to" - "vsel not registered. Hence unable to scale voltage" - "for vdd_%s\n", __func__, voltdm->name); -@@ -94,7 +94,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - if (IS_ERR(volt_data)) - volt_data = NULL; - -- *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); -+ *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); - *current_vsel = voltdm->read(vdd->vp_data->voltage); - - /* Setting the ON voltage to the new target voltage */ -@@ -125,8 +125,8 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, - - smps_steps = abs(target_vsel - current_vsel); - /* SMPS slew rate / step size. 2us added as buffer. */ -- smps_delay = ((smps_steps * vdd->pmic_info->step_size) / -- vdd->pmic_info->slew_rate) + 2; -+ smps_delay = ((smps_steps * voltdm->pmic->step_size) / -+ voltdm->pmic->slew_rate) + 2; - udelay(smps_delay); - - vdd->curr_volt = target_volt; -@@ -231,11 +231,10 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) - void __init omap_vc_init_channel(struct voltagedomain *voltdm) - { - struct omap_vc_channel *vc = voltdm->vc; -- struct omap_vdd_info *vdd = voltdm->vdd; - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; - u32 val; - -- if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { -+ if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { - pr_err("%s: PMIC info requried to configure vc for" - "vdd_%s not populated.Hence cannot initialize vc\n", - __func__, voltdm->name); -@@ -251,10 +250,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - vc->cfg_channel = 0; - - /* get PMIC/board specific settings */ -- vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; -- vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; -- vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; -- vc->setup_time = vdd->pmic_info->volt_setup_time; -+ vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; -+ vc->volt_reg_addr = voltdm->pmic->volt_reg_addr; -+ vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr; -+ vc->setup_time = voltdm->pmic->volt_setup_time; - - /* Configure the i2c slave address for this VC */ - voltdm->rmw(vc->smps_sa_mask, -@@ -278,10 +277,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - } - - /* Set up the on, inactive, retention and off voltage */ -- on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); -- onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); -- ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); -- off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); -+ on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt); -+ onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt); -+ ret_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->ret_volt); -+ off_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->off_volt); - val = ((on_vsel << vc->common->cmd_on_shift) | - (onlp_vsel << vc->common->cmd_onlp_shift) | - (ret_vsel << vc->common->cmd_ret_shift) | -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 9f9f014..94f7fc4 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -84,20 +84,20 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - vdd->vp_enabled = false; - - vdd->vp_rt_data.vpconfig_erroroffset = -- (vdd->pmic_info->vp_erroroffset << -+ (voltdm->pmic->vp_erroroffset << - vdd->vp_data->vp_common->vpconfig_erroroffset_shift); - -- timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000; -+ timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; - vdd->vp_rt_data.vlimitto_timeout = timeout_val; -- vdd->vp_rt_data.vlimitto_vddmin = vdd->pmic_info->vp_vddmin; -- vdd->vp_rt_data.vlimitto_vddmax = vdd->pmic_info->vp_vddmax; -+ vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; -+ vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; - -- waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) * -+ waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * - sys_clk_speed) / 1000; - vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; - vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; -- vdd->vp_rt_data.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin; -- vdd->vp_rt_data.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax; -+ vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; -+ vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; - - return 0; - } -@@ -149,10 +149,9 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) - - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) - { -- struct omap_vdd_info *vdd = voltdm->vdd; - int ret = -EINVAL; - -- if (!vdd->pmic_info) { -+ if (!voltdm->pmic) { - pr_err("%s: PMIC info requried to configure vdd_%s not" - "populated.Hence cannot initialize vdd_%s\n", - __func__, voltdm->name, voltdm->name); -@@ -324,24 +323,20 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, - * omap_voltage_register_pmic() - API to register PMIC specific data - * @voltdm: pointer to the VDD for which the PMIC specific data is - * to be registered -- * @pmic_info: the structure containing pmic info -+ * @pmic: the structure containing pmic info - * - * This API is to be called by the SOC/PMIC file to specify the -- * pmic specific info as present in omap_volt_pmic_info structure. -+ * pmic specific info as present in omap_voltdm_pmic structure. - */ - int omap_voltage_register_pmic(struct voltagedomain *voltdm, -- struct omap_volt_pmic_info *pmic_info) -+ struct omap_voltdm_pmic *pmic) - { -- struct omap_vdd_info *vdd; -- - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return -EINVAL; - } - -- vdd = voltdm->vdd; -- -- vdd->pmic_info = pmic_info; -+ voltdm->pmic = pmic; - - return 0; - } -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 2b2ab56..72a0255 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -68,6 +68,7 @@ struct voltagedomain { - struct list_head pwrdm_list; - struct omap_vc_channel *vc; - const struct omap_vfsm_instance *vfsm; -+ struct omap_voltdm_pmic *pmic; - - /* VC/VP register access functions: SoC specific */ - u32 (*read) (u8 offset); -@@ -97,13 +98,13 @@ struct omap_volt_data { - }; - - /** -- * struct omap_volt_pmic_info - PMIC specific data required by voltage driver. -+ * struct omap_voltdm_pmic - PMIC specific data required by voltage driver. - * @slew_rate: PMIC slew rate (in uv/us) - * @step_size: PMIC voltage step size (in uv) - * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. - * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. - */ --struct omap_volt_pmic_info { -+struct omap_voltdm_pmic { - int slew_rate; - int step_size; - u32 on_volt; -@@ -129,8 +130,6 @@ struct omap_volt_pmic_info { - * - * @volt_data : voltage table having the distinct voltages supported - * by the domain and other associated per voltage data. -- * @pmic_info : pmic specific parameters which should be populted by -- * the pmic drivers. - * @vp_data : the register values, shifts, masks for various - * vp registers - * @vp_rt_data : VP data derived at runtime, not predefined -@@ -141,7 +140,6 @@ struct omap_volt_pmic_info { - */ - struct omap_vdd_info { - struct omap_volt_data *volt_data; -- struct omap_volt_pmic_info *pmic_info; - struct omap_vp_instance_data *vp_data; - struct omap_vp_runtime_data vp_rt_data; - struct dentry *debug_dir; -@@ -163,13 +161,13 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); - struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); - #ifdef CONFIG_PM - int omap_voltage_register_pmic(struct voltagedomain *voltdm, -- struct omap_volt_pmic_info *pmic_info); -+ struct omap_voltdm_pmic *pmic); - void omap_change_voltscale_method(struct voltagedomain *voltdm, - int voltscale_method); - int omap_voltage_late_init(void); - #else - static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, -- struct omap_volt_pmic_info *pmic_info) -+ struct omap_voltdm_pmic *pmic) - { - return -EINVAL; - } -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index 88ac742..a3afcbe 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -18,7 +18,6 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) - u32 vpconfig; - unsigned long uvdc; - char vsel; -- struct omap_vdd_info *vdd = voltdm->vdd; - - uvdc = omap_voltage_get_nom_volt(voltdm); - if (!uvdc) { -@@ -27,13 +26,13 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) - return; - } - -- if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { -+ if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { - pr_warning("%s: PMIC function to convert voltage in uV to" - " vsel not registered\n", __func__); - return; - } - -- vsel = vdd->pmic_info->uv_to_vsel(uvdc); -+ vsel = voltdm->pmic->uv_to_vsel(uvdc); - - vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | -@@ -206,13 +205,13 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) - - curr_vsel = voltdm->read(vp->voltage); - -- if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { -+ if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { - pr_warning("%s: PMIC function to convert vsel to voltage" - "in uV not registerd\n", __func__); - return 0; - } - -- return vdd->pmic_info->vsel_to_uv(curr_vsel); -+ return voltdm->pmic->vsel_to_uv(curr_vsel); - } - - /** -@@ -323,13 +322,13 @@ static int vp_volt_debug_get(void *data, u64 *val) - - vsel = voltdm->read(vp->voltage); - -- if (!vdd->pmic_info->vsel_to_uv) { -+ if (!voltdm->pmic->vsel_to_uv) { - pr_warning("PMIC function to convert vsel to voltage" - "in uV not registerd\n"); - return -EINVAL; - } - -- *val = vdd->pmic_info->vsel_to_uv(vsel); -+ *val = voltdm->pmic->vsel_to_uv(vsel); - return 0; - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config-programmable-with-PMIC-spec.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config-programmable-with-PMIC-spec.patch deleted file mode 100644 index ee62874..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config-programmable-with-PMIC-spec.patch +++ /dev/null @@ -1,221 +0,0 @@ -From ecf26111e3d83dd4face7fa8f4327489775d1dc8 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Wed, 30 Mar 2011 16:36:30 -0700 -Subject: [PATCH 125/149] OMAP3+: VC: make I2C config programmable with PMIC-specific settings - -Remove hard-coded I2C configuration in favor of settings that can be -configured from PMIC-specific values. Currently only high-speed mode -and the master-code value are supported, since they were the only -fields currently used, but extending this is now trivial. - -Thanks to Nishanth Menon <nm@ti.com> for reporting/fixing a sparse -problem and making omap_vc_i2c_init() static, as well as finding and -fixing a problem with the shift/mask of mcode. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/omap_twl.c | 4 +++ - arch/arm/mach-omap2/vc.c | 51 +++++++++++++++++++++++++++++++----- - arch/arm/mach-omap2/vc.h | 7 +++++ - arch/arm/mach-omap2/vc3xxx_data.c | 3 ++ - arch/arm/mach-omap2/vc44xx_data.c | 3 ++ - arch/arm/mach-omap2/voltage.h | 4 +++ - 6 files changed, 65 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index e467d45..6b247d1 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -159,6 +159,7 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = { - .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, - .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, -+ .i2c_high_speed = true, - .vsel_to_uv = twl4030_vsel_to_uv, - .uv_to_vsel = twl4030_uv_to_vsel, - }; -@@ -179,6 +180,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = { - .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, - .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, -+ .i2c_high_speed = true, - .vsel_to_uv = twl4030_vsel_to_uv, - .uv_to_vsel = twl4030_uv_to_vsel, - }; -@@ -199,6 +201,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, - .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, -+ .i2c_high_speed = true, - .vsel_to_uv = twl6030_vsel_to_uv, - .uv_to_vsel = twl6030_uv_to_vsel, - }; -@@ -219,6 +222,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, - .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, -+ .i2c_high_speed = true, - .vsel_to_uv = twl6030_vsel_to_uv, - .uv_to_vsel = twl6030_uv_to_vsel, - }; -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index c431ca2..97a4c6c 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -199,13 +199,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) - if (is_initialized) - return; - -- /* -- * Generic VC parameters init -- * XXX This data should be abstracted out -- */ -- voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, -- OMAP3_PRM_VC_I2C_CFG_OFFSET); -- - omap3_vfsm_init(voltdm); - - is_initialized = true; -@@ -228,6 +221,48 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) - is_initialized = true; - } - -+/** -+ * omap_vc_i2c_init - initialize I2C interface to PMIC -+ * @voltdm: voltage domain containing VC data -+ * -+ * Use PMIC supplied seetings for I2C high-speed mode and -+ * master code (if set) and program the VC I2C configuration -+ * register. -+ * -+ * The VC I2C configuration is common to all VC channels, -+ * so this function only configures I2C for the first VC -+ * channel registers. All other VC channels will use the -+ * same configuration. -+ */ -+static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) -+{ -+ struct omap_vc_channel *vc = voltdm->vc; -+ static bool initialized; -+ static bool i2c_high_speed; -+ u8 mcode; -+ -+ if (initialized) { -+ if (voltdm->pmic->i2c_high_speed != i2c_high_speed) -+ pr_warn("%s: I2C config for all channels must match.", -+ __func__); -+ return; -+ } -+ -+ i2c_high_speed = voltdm->pmic->i2c_high_speed; -+ if (i2c_high_speed) -+ voltdm->rmw(vc->common->i2c_cfg_hsen_mask, -+ vc->common->i2c_cfg_hsen_mask, -+ vc->common->i2c_cfg_reg); -+ -+ mcode = voltdm->pmic->i2c_mcode; -+ if (mcode) -+ voltdm->rmw(vc->common->i2c_mcode_mask, -+ mcode << __ffs(vc->common->i2c_mcode_mask), -+ vc->common->i2c_cfg_reg); -+ -+ initialized = true; -+} -+ - void __init omap_vc_init_channel(struct voltagedomain *voltdm) - { - struct omap_vc_channel *vc = voltdm->vc; -@@ -296,6 +331,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), - voltdm->vfsm->voltsetup_reg); - -+ omap_vc_i2c_init(voltdm); -+ - if (cpu_is_omap34xx()) - omap3_vc_init_channel(voltdm); - else if (cpu_is_omap44xx()) -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index 604f5b6..c577f28 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -35,6 +35,9 @@ struct voltagedomain; - * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register - * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register - * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register -+ * @i2c_cfg_reg: I2C configuration register offset -+ * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register -+ * @i2c_mcode_mask: MCODE field mask for I2C config register - * - * XXX One of cmd_on_mask and cmd_on_shift are not needed - * XXX VALID should probably be a shift, not a mask -@@ -54,6 +57,9 @@ struct omap_vc_common { - u8 cmd_ret_shift; - u8 cmd_off_shift; - u8 cfg_channel_reg; -+ u8 i2c_cfg_reg; -+ u8 i2c_cfg_hsen_mask; -+ u8 i2c_mcode_mask; - }; - - /* omap_vc_channel.flags values */ -@@ -75,6 +81,7 @@ struct omap_vc_channel { - u16 cmd_reg_addr; - u16 setup_time; - u8 cfg_channel; -+ bool i2c_high_speed; - - /* register access data */ - const struct omap_vc_common *common; -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c -index f4449eb..95d7701 100644 ---- a/arch/arm/mach-omap2/vc3xxx_data.c -+++ b/arch/arm/mach-omap2/vc3xxx_data.c -@@ -44,6 +44,9 @@ static struct omap_vc_common omap3_vc_common = { - .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, - .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, - .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, -+ .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK, -+ .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET, -+ .i2c_mcode_mask = OMAP3430_MCODE_MASK, - }; - - struct omap_vc_channel omap3_vc_mpu = { -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c -index 1610bde..148be18 100644 ---- a/arch/arm/mach-omap2/vc44xx_data.c -+++ b/arch/arm/mach-omap2/vc44xx_data.c -@@ -45,6 +45,9 @@ static const struct omap_vc_common omap4_vc_common = { - .cmd_ret_shift = OMAP4430_RET_SHIFT, - .cmd_off_shift = OMAP4430_OFF_SHIFT, - .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, -+ .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET, -+ .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK, -+ .i2c_mcode_mask = OMAP4430_HSMCODE_MASK, - }; - - /* VC instance data for each controllable voltage line */ -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 72a0255..a0ae5c6 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -101,6 +101,8 @@ struct omap_volt_data { - * struct omap_voltdm_pmic - PMIC specific data required by voltage driver. - * @slew_rate: PMIC slew rate (in uv/us) - * @step_size: PMIC voltage step size (in uv) -+ * @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC -+ * @i2c_mcode: master code value for I2C high-speed preamble transmission - * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. - * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. - */ -@@ -121,6 +123,8 @@ struct omap_voltdm_pmic { - u8 vp_vddmin; - u8 vp_vddmax; - u8 vp_timeout_us; -+ bool i2c_high_speed; -+ u8 i2c_mcode; - unsigned long (*vsel_to_uv) (const u8 vsel); - u8 (*uv_to_vsel) (unsigned long uV); - }; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel-config-for-OMAP4-M.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel-config-for-OMAP4-M.patch deleted file mode 100644 index f8b0fcb..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel-config-for-OMAP4-M.patch +++ /dev/null @@ -1,168 +0,0 @@ -From dd6773950301f38c61e0039922c685f6e0542c47 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Thu, 2 Jun 2011 17:28:13 -0700 -Subject: [PATCH 126/149] OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channel - -On OMAP3+, all VC channels have the the same bitfield ordering for all -VC channels, except the OMAP4 MPU channel. This appears to be a freak -accident as all other VC channel (including OMAP5) have the standard -configuration. Handle the mutant case by adding a per-channel flag -to signal the deformity and handle it during VC init. - -Special thanks to Nishanth Menon <nm@ti.com> for finding this problem -and for proposing the initial solution. - -Cc: Nishanth Menon <nm@ti.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 64 +++++++++++++++++++++++++++++------- - arch/arm/mach-omap2/vc.h | 1 + - arch/arm/mach-omap2/vc44xx_data.c | 2 +- - 3 files changed, 53 insertions(+), 14 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 97a4c6c..9e51782 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -10,17 +10,51 @@ - #include "prm-regbits-44xx.h" - #include "prm44xx.h" - --/* -- * Channel configuration bits, common for OMAP3 & 4 -+/** -+ * struct omap_vc_channel_cfg - describe the cfg_channel bitfield -+ * @sa: bit for slave address -+ * @rav: bit for voltage configuration register -+ * @rac: bit for command configuration register -+ * @racen: enable bit for RAC -+ * @cmd: bit for command value set selection -+ * -+ * Channel configuration bits, common for OMAP3+ - * OMAP3 register: PRM_VC_CH_CONF - * OMAP4 register: PRM_VC_CFG_CHANNEL -+ * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG - */ --#define CFG_CHANNEL_SA BIT(0) --#define CFG_CHANNEL_RAV BIT(1) --#define CFG_CHANNEL_RAC BIT(2) --#define CFG_CHANNEL_RACEN BIT(3) --#define CFG_CHANNEL_CMD BIT(4) --#define CFG_CHANNEL_MASK 0x3f -+struct omap_vc_channel_cfg { -+ u8 sa; -+ u8 rav; -+ u8 rac; -+ u8 racen; -+ u8 cmd; -+}; -+ -+static struct omap_vc_channel_cfg vc_default_channel_cfg = { -+ .sa = BIT(0), -+ .rav = BIT(1), -+ .rac = BIT(2), -+ .racen = BIT(3), -+ .cmd = BIT(4), -+}; -+ -+/* -+ * On OMAP3+, all VC channels have the above default bitfield -+ * configuration, except the OMAP4 MPU channel. This appears -+ * to be a freak accident as every other VC channel has the -+ * default configuration, thus creating a mutant channel config. -+ */ -+static struct omap_vc_channel_cfg vc_mutant_channel_cfg = { -+ .sa = BIT(0), -+ .rav = BIT(2), -+ .rac = BIT(3), -+ .racen = BIT(4), -+ .cmd = BIT(1), -+}; -+ -+static struct omap_vc_channel_cfg *vc_cfg_bits; -+#define CFG_CHANNEL_MASK 0x1f - - /** - * omap_vc_config_channel - configure VC channel to PMIC mappings -@@ -47,7 +81,7 @@ static int omap_vc_config_channel(struct voltagedomain *voltdm) - * All others must stay at zero (see function comment above.) - */ - if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) -- vc->cfg_channel &= CFG_CHANNEL_RACEN; -+ vc->cfg_channel &= vc_cfg_bits->racen; - - voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, - vc->cfg_channel << vc->cfg_channel_sa_shift, -@@ -283,6 +317,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - } - - vc->cfg_channel = 0; -+ if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT) -+ vc_cfg_bits = &vc_mutant_channel_cfg; -+ else -+ vc_cfg_bits = &vc_default_channel_cfg; - - /* get PMIC/board specific settings */ - vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; -@@ -294,7 +332,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - voltdm->rmw(vc->smps_sa_mask, - vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), - vc->common->smps_sa_reg); -- vc->cfg_channel |= CFG_CHANNEL_SA; -+ vc->cfg_channel |= vc_cfg_bits->sa; - - /* - * Configure the PMIC register addresses. -@@ -302,13 +340,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - voltdm->rmw(vc->smps_volra_mask, - vc->volt_reg_addr << __ffs(vc->smps_volra_mask), - vc->common->smps_volra_reg); -- vc->cfg_channel |= CFG_CHANNEL_RAV; -+ vc->cfg_channel |= vc_cfg_bits->rav; - - if (vc->cmd_reg_addr) { - voltdm->rmw(vc->smps_cmdra_mask, - vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), - vc->common->smps_cmdra_reg); -- vc->cfg_channel |= CFG_CHANNEL_RAC | CFG_CHANNEL_RACEN; -+ vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen; - } - - /* Set up the on, inactive, retention and off voltage */ -@@ -321,7 +359,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) - (ret_vsel << vc->common->cmd_ret_shift) | - (off_vsel << vc->common->cmd_off_shift)); - voltdm->write(val, vc->cmdval_reg); -- vc->cfg_channel |= CFG_CHANNEL_CMD; -+ vc->cfg_channel |= vc_cfg_bits->cmd; - - /* Channel configuration */ - omap_vc_config_channel(voltdm); -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h -index c577f28..ec50643 100644 ---- a/arch/arm/mach-omap2/vc.h -+++ b/arch/arm/mach-omap2/vc.h -@@ -64,6 +64,7 @@ struct omap_vc_common { - - /* omap_vc_channel.flags values */ - #define OMAP_VC_CHANNEL_DEFAULT BIT(0) -+#define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1) - - /** - * struct omap_vc_channel - VC per-instance data -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c -index 148be18..0a4fc37 100644 ---- a/arch/arm/mach-omap2/vc44xx_data.c -+++ b/arch/arm/mach-omap2/vc44xx_data.c -@@ -52,7 +52,7 @@ static const struct omap_vc_common omap4_vc_common = { - - /* VC instance data for each controllable voltage line */ - struct omap_vc_channel omap4_vc_mpu = { -- .flags = OMAP_VC_CHANNEL_DEFAULT, -+ .flags = OMAP_VC_CHANNEL_DEFAULT | OMAP_VC_CHANNEL_CFG_MUTANT, - .common = &omap4_vc_common, - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, - .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch deleted file mode 100644 index 6992056..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch +++ /dev/null @@ -1,31 +0,0 @@ -From a8ee49ce71fcdf4e85720adabe9aeed2850678cc Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 18 Jul 2011 15:31:00 -0700 -Subject: [PATCH 127/149] OMAP3+: VC: use last nominal voltage setting to get current_vsel - -Instead of reading current vsel value from the VP's voltage register, -just use current nominal voltage translated into vsel via the PMIC. - -Doing this allows VC bypass scaling to work even without a VP configured. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 9e51782..cee8fba 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -129,7 +129,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - volt_data = NULL; - - *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); -- *current_vsel = voltdm->read(vdd->vp_data->voltage); -+ *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); - - /* Setting the ON voltage to the new target voltage */ - vc_cmdval = voltdm->read(vc->cmdval_reg); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch deleted file mode 100644 index 1b153ca..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch +++ /dev/null @@ -1,643 +0,0 @@ -From 00a526b77cb5b54dbf2086c63936629845b7f980 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 4 Apr 2011 15:25:07 -0700 -Subject: [PATCH 128/149] OMAP3+: VP: cleanup: move VP instance into voltdm, misc. renames - -- move VP instance struct from vdd_info into struct voltage domain -- remove _data suffix from structure name -- rename vp_ prefix from vp_common field: accesses are now vp->common -- move vp_enabled bool from vdd_info into VP instance -- remove remaining references to omap_vdd_info - -No functional changes. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 11 +-- - arch/arm/mach-omap2/voltage.c | 4 +- - arch/arm/mach-omap2/voltage.h | 6 +-- - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 10 +-- - arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 ++--- - arch/arm/mach-omap2/vp.c | 88 ++++++++++++------------- - arch/arm/mach-omap2/vp.h | 24 ++++--- - arch/arm/mach-omap2/vp3xxx_data.c | 10 ++-- - arch/arm/mach-omap2/vp44xx_data.c | 14 ++-- - 9 files changed, 83 insertions(+), 99 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index cee8fba..7058585 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -98,11 +98,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - struct omap_volt_data *volt_data; -- const struct omap_vp_common_data *vp_common; - u32 vc_cmdval, vp_errgain_val; - -- vp_common = vdd->vp_data->vp_common; -- - /* Check if sufficient pmic info is available for this vdd */ - if (!voltdm->pmic) { - pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", -@@ -139,12 +136,12 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - - /* Setting vp errorgain based on the voltage */ - if (volt_data) { -- vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); -+ vp_errgain_val = voltdm->read(voltdm->vp->vpconfig); - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; -- vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; -+ vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << -- vp_common->vpconfig_errorgain_shift; -- voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); -+ voltdm->vp->common->vpconfig_errorgain_shift; -+ voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); - } - - return 0; -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 94f7fc4..c22b53c 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -81,11 +81,11 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - - /* Generic voltage parameters */ - vdd->volt_scale = omap_vp_forceupdate_scale; -- vdd->vp_enabled = false; -+ voltdm->vp->enabled = false; - - vdd->vp_rt_data.vpconfig_erroroffset = - (voltdm->pmic->vp_erroroffset << -- vdd->vp_data->vp_common->vpconfig_erroroffset_shift); -+ voltdm->vp->common->vpconfig_erroroffset_shift); - - timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; - vdd->vp_rt_data.vlimitto_timeout = timeout_val; -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index a0ae5c6..65f94c7 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -68,6 +68,7 @@ struct voltagedomain { - struct list_head pwrdm_list; - struct omap_vc_channel *vc; - const struct omap_vfsm_instance *vfsm; -+ struct omap_vp_instance *vp; - struct omap_voltdm_pmic *pmic; - - /* VC/VP register access functions: SoC specific */ -@@ -134,21 +135,16 @@ struct omap_voltdm_pmic { - * - * @volt_data : voltage table having the distinct voltages supported - * by the domain and other associated per voltage data. -- * @vp_data : the register values, shifts, masks for various -- * vp registers - * @vp_rt_data : VP data derived at runtime, not predefined - * @debug_dir : debug directory for this voltage domain. - * @curr_volt : current voltage for this vdd. -- * @vp_enabled : flag to keep track of whether vp is enabled or not - * @volt_scale : API to scale the voltage of the vdd. - */ - struct omap_vdd_info { - struct omap_volt_data *volt_data; -- struct omap_vp_instance_data *vp_data; - struct omap_vp_runtime_data vp_rt_data; - struct dentry *debug_dir; - u32 curr_volt; -- bool vp_enabled; - - int (*volt_scale) (struct voltagedomain *voltdm, - unsigned long target_volt); -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index 4ea9a7b..4db2c6c 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -37,9 +37,7 @@ static const struct omap_vfsm_instance omap3_vdd1_vfsm = { - .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, - }; - --static struct omap_vdd_info omap3_vdd1_info = { -- .vp_data = &omap3_vp1_data, --}; -+static struct omap_vdd_info omap3_vdd1_info; - - static const struct omap_vfsm_instance omap3_vdd2_vfsm = { - .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, -@@ -47,9 +45,7 @@ static const struct omap_vfsm_instance omap3_vdd2_vfsm = { - .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, - }; - --static struct omap_vdd_info omap3_vdd2_info = { -- .vp_data = &omap3_vp2_data, --}; -+static struct omap_vdd_info omap3_vdd2_info; - - static struct voltagedomain omap3_voltdm_mpu = { - .name = "mpu_iva", -@@ -59,6 +55,7 @@ static struct voltagedomain omap3_voltdm_mpu = { - .rmw = omap3_prm_vcvp_rmw, - .vc = &omap3_vc_mpu, - .vfsm = &omap3_vdd1_vfsm, -+ .vp = &omap3_vp_mpu, - .vdd = &omap3_vdd1_info, - }; - -@@ -70,6 +67,7 @@ static struct voltagedomain omap3_voltdm_core = { - .rmw = omap3_prm_vcvp_rmw, - .vc = &omap3_vc_core, - .vfsm = &omap3_vdd2_vfsm, -+ .vp = &omap3_vp_core, - .vdd = &omap3_vdd2_info, - }; - -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index dd4bd22..3e7cb4e 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -36,25 +36,19 @@ static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, - }; - --static struct omap_vdd_info omap4_vdd_mpu_info = { -- .vp_data = &omap4_vp_mpu_data, --}; -+static struct omap_vdd_info omap4_vdd_mpu_info; - - static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, - }; - --static struct omap_vdd_info omap4_vdd_iva_info = { -- .vp_data = &omap4_vp_iva_data, --}; -+static struct omap_vdd_info omap4_vdd_iva_info; - - static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, - }; - --static struct omap_vdd_info omap4_vdd_core_info = { -- .vp_data = &omap4_vp_core_data, --}; -+static struct omap_vdd_info omap4_vdd_core_info; - - static struct voltagedomain omap4_voltdm_mpu = { - .name = "mpu", -@@ -64,6 +58,7 @@ static struct voltagedomain omap4_voltdm_mpu = { - .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_mpu, - .vfsm = &omap4_vdd_mpu_vfsm, -+ .vp = &omap4_vp_mpu, - .vdd = &omap4_vdd_mpu_info, - }; - -@@ -75,6 +70,7 @@ static struct voltagedomain omap4_voltdm_iva = { - .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_iva, - .vfsm = &omap4_vdd_iva_vfsm, -+ .vp = &omap4_vp_iva, - .vdd = &omap4_vdd_iva_info, - }; - -@@ -86,6 +82,7 @@ static struct voltagedomain omap4_voltdm_core = { - .rmw = omap4_prm_vcvp_rmw, - .vc = &omap4_vc_core, - .vfsm = &omap4_vdd_core_vfsm, -+ .vp = &omap4_vp_core, - .vdd = &omap4_vdd_core_info, - }; - -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index a3afcbe..53d6018 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -14,7 +14,7 @@ static void __init vp_debugfs_init(struct voltagedomain *voltdm); - - static void vp_latch_vsel(struct voltagedomain *voltdm) - { -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ struct omap_vp_instance *vp = voltdm->vp; - u32 vpconfig; - unsigned long uvdc; - char vsel; -@@ -35,14 +35,14 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) - vsel = voltdm->pmic->uv_to_vsel(uvdc); - - vpconfig = voltdm->read(vp->vpconfig); -- vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | -- vp->vp_common->vpconfig_initvdd); -- vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; -+ vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | -+ vp->common->vpconfig_initvdd); -+ vpconfig |= vsel << vp->common->vpconfig_initvoltage_shift; - - voltdm->write(vpconfig, vp->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ -- voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd), -+ voltdm->write((vpconfig | vp->common->vpconfig_initvdd), - vp->vpconfig); - - /* Clear initVDD copy trigger bit */ -@@ -52,7 +52,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) - /* Generic voltage init functions */ - void __init omap_vp_init(struct voltagedomain *voltdm) - { -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ struct omap_vp_instance *vp = voltdm->vp; - struct omap_vdd_info *vdd = voltdm->vdd; - u32 vp_val; - -@@ -64,28 +64,28 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | - (vdd->vp_rt_data.vpconfig_errorgain << -- vp->vp_common->vpconfig_errorgain_shift) | -- vp->vp_common->vpconfig_timeouten; -+ vp->common->vpconfig_errorgain_shift) | -+ vp->common->vpconfig_timeouten; - voltdm->write(vp_val, vp->vpconfig); - - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << -- vp->vp_common->vstepmin_smpswaittimemin_shift) | -+ vp->common->vstepmin_smpswaittimemin_shift) | - (vdd->vp_rt_data.vstepmin_stepmin << -- vp->vp_common->vstepmin_stepmin_shift)); -+ vp->common->vstepmin_stepmin_shift)); - voltdm->write(vp_val, vp->vstepmin); - - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << -- vp->vp_common->vstepmax_smpswaittimemax_shift) | -+ vp->common->vstepmax_smpswaittimemax_shift) | - (vdd->vp_rt_data.vstepmax_stepmax << -- vp->vp_common->vstepmax_stepmax_shift)); -+ vp->common->vstepmax_stepmax_shift)); - voltdm->write(vp_val, vp->vstepmax); - - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << -- vp->vp_common->vlimitto_vddmax_shift) | -+ vp->common->vlimitto_vddmax_shift) | - (vdd->vp_rt_data.vlimitto_vddmin << -- vp->vp_common->vlimitto_vddmin_shift) | -+ vp->common->vlimitto_vddmin_shift) | - (vdd->vp_rt_data.vlimitto_timeout << -- vp->vp_common->vlimitto_timeout_shift)); -+ vp->common->vlimitto_timeout_shift)); - voltdm->write(vp_val, vp->vlimitto); - - vp_debugfs_init(voltdm); -@@ -95,7 +95,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - unsigned long target_volt) - { -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ struct omap_vp_instance *vp = voltdm->vp; - u32 vpconfig; - u8 target_vsel, current_vsel; - int ret, timeout = 0; -@@ -109,8 +109,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - * is <3us - */ - while (timeout++ < VP_TRANXDONE_TIMEOUT) { -- vp->vp_common->ops->clear_txdone(vp->id); -- if (!vp->vp_common->ops->check_txdone(vp->id)) -+ vp->common->ops->clear_txdone(vp->id); -+ if (!vp->common->ops->check_txdone(vp->id)) - break; - udelay(1); - } -@@ -122,19 +122,19 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - - /* Configure for VP-Force Update */ - vpconfig = voltdm->read(vp->vpconfig); -- vpconfig &= ~(vp->vp_common->vpconfig_initvdd | -- vp->vp_common->vpconfig_forceupdate | -- vp->vp_common->vpconfig_initvoltage_mask); -+ vpconfig &= ~(vp->common->vpconfig_initvdd | -+ vp->common->vpconfig_forceupdate | -+ vp->common->vpconfig_initvoltage_mask); - vpconfig |= ((target_vsel << -- vp->vp_common->vpconfig_initvoltage_shift)); -+ vp->common->vpconfig_initvoltage_shift)); - voltdm->write(vpconfig, vp->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ -- vpconfig |= vp->vp_common->vpconfig_initvdd; -+ vpconfig |= vp->common->vpconfig_initvdd; - voltdm->write(vpconfig, vp->vpconfig); - - /* Force update of voltage */ -- vpconfig |= vp->vp_common->vpconfig_forceupdate; -+ vpconfig |= vp->common->vpconfig_forceupdate; - voltdm->write(vpconfig, vp->vpconfig); - - /* -@@ -142,7 +142,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - * Depends on SMPSWAITTIMEMIN/MAX and voltage change - */ - timeout = 0; -- omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id), -+ omap_test_timeout(vp->common->ops->check_txdone(vp->id), - VP_TRANXDONE_TIMEOUT, timeout); - if (timeout >= VP_TRANXDONE_TIMEOUT) - pr_err("%s: vdd_%s TRANXDONE timeout exceeded." -@@ -157,8 +157,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - */ - timeout = 0; - while (timeout++ < VP_TRANXDONE_TIMEOUT) { -- vp->vp_common->ops->clear_txdone(vp->id); -- if (!vp->vp_common->ops->check_txdone(vp->id)) -+ vp->common->ops->clear_txdone(vp->id); -+ if (!vp->common->ops->check_txdone(vp->id)) - break; - udelay(1); - } -@@ -170,10 +170,10 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - - vpconfig = voltdm->read(vp->vpconfig); - /* Clear initVDD copy trigger bit */ -- vpconfig &= ~vp->vp_common->vpconfig_initvdd; -+ vpconfig &= ~vp->common->vpconfig_initvdd; - voltdm->write(vpconfig, vp->vpconfig); - /* Clear force bit */ -- vpconfig &= ~vp->vp_common->vpconfig_forceupdate; -+ vpconfig &= ~vp->common->vpconfig_forceupdate; - voltdm->write(vpconfig, vp->vpconfig); - - return 0; -@@ -187,8 +187,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - */ - unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) - { -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -- struct omap_vdd_info *vdd; -+ struct omap_vp_instance *vp = voltdm->vp; - u8 curr_vsel; - - if (!voltdm || IS_ERR(voltdm)) { -@@ -196,7 +195,6 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) - return 0; - } - -- vdd = voltdm->vdd; - if (!voltdm->read) { - pr_err("%s: No read API for reading vdd_%s regs\n", - __func__, voltdm->name); -@@ -223,8 +221,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) - */ - void omap_vp_enable(struct voltagedomain *voltdm) - { -- struct omap_vp_instance_data *vp; -- struct omap_vdd_info *vdd; -+ struct omap_vp_instance *vp; - u32 vpconfig; - - if (!voltdm || IS_ERR(voltdm)) { -@@ -232,8 +229,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) - return; - } - -- vdd = voltdm->vdd; -- vp = voltdm->vdd->vp_data; -+ vp = voltdm->vp; - if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); -@@ -241,16 +237,16 @@ void omap_vp_enable(struct voltagedomain *voltdm) - } - - /* If VP is already enabled, do nothing. Return */ -- if (vdd->vp_enabled) -+ if (vp->enabled) - return; - - vp_latch_vsel(voltdm); - - /* Enable VP */ - vpconfig = voltdm->read(vp->vpconfig); -- vpconfig |= vp->vp_common->vpconfig_vpenable; -+ vpconfig |= vp->common->vpconfig_vpenable; - voltdm->write(vpconfig, vp->vpconfig); -- vdd->vp_enabled = true; -+ vp->enabled = true; - } - - /** -@@ -262,8 +258,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) - */ - void omap_vp_disable(struct voltagedomain *voltdm) - { -- struct omap_vp_instance_data *vp; -- struct omap_vdd_info *vdd; -+ struct omap_vp_instance *vp; - u32 vpconfig; - int timeout; - -@@ -272,8 +267,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) - return; - } - -- vdd = voltdm->vdd; -- vp = voltdm->vdd->vp_data; -+ vp = voltdm->vp; - if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); -@@ -281,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) - } - - /* If VP is already disabled, do nothing. Return */ -- if (!vdd->vp_enabled) { -+ if (!vp->enabled) { - pr_warning("%s: Trying to disable VP for vdd_%s when" - "it is already disabled\n", __func__, voltdm->name); - return; -@@ -289,7 +283,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) - - /* Disable VP */ - vpconfig = voltdm->read(vp->vpconfig); -- vpconfig &= ~vp->vp_common->vpconfig_vpenable; -+ vpconfig &= ~vp->common->vpconfig_vpenable; - voltdm->write(vpconfig, vp->vpconfig); - - /* -@@ -302,7 +296,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) - pr_warning("%s: vdd_%s idle timedout\n", - __func__, voltdm->name); - -- vdd->vp_enabled = false; -+ vp->enabled = false; - - return; - } -@@ -311,7 +305,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) - static int vp_volt_debug_get(void *data, u64 *val) - { - struct voltagedomain *voltdm = (struct voltagedomain *)data; -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; -+ struct omap_vp_instance *vp = voltdm->vp; - struct omap_vdd_info *vdd = voltdm->vdd; - u8 vsel; - -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 79aa8d3..1d63960 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -45,7 +45,7 @@ struct omap_vp_ops { - }; - - /** -- * struct omap_vp_common_data - register data common to all VDDs -+ * struct omap_vp_common - register data common to all VDDs - * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg -@@ -67,7 +67,7 @@ struct omap_vp_ops { - * bitfield - remove one - * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix! - */ --struct omap_vp_common_data { -+struct omap_vp_common { - u32 vpconfig_errorgain_mask; - u32 vpconfig_initvoltage_mask; - u32 vpconfig_timeouten; -@@ -89,18 +89,19 @@ struct omap_vp_common_data { - }; - - /** -- * struct omap_vp_instance_data - VP register offsets (per-VDD) -- * @vp_common: pointer to struct omap_vp_common_data * for this SoC -+ * struct omap_vp_instance - VP register offsets (per-VDD) -+ * @common: pointer to struct omap_vp_common * for this SoC - * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start - * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start - * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start - * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start - * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start -+ * @enabled: flag to keep track of whether vp is enabled or not - * - * XXX vp_common is probably not needed since it is per-SoC - */ --struct omap_vp_instance_data { -- const struct omap_vp_common_data *vp_common; -+struct omap_vp_instance { -+ const struct omap_vp_common *common; - u8 vpconfig; - u8 vstepmin; - u8 vstepmax; -@@ -108,6 +109,7 @@ struct omap_vp_instance_data { - u8 vstatus; - u8 voltage; - u8 id; -+ bool enabled; - }; - - /** -@@ -139,12 +141,12 @@ struct omap_vp_runtime_data { - u8 vlimitto_vddmax; - }; - --extern struct omap_vp_instance_data omap3_vp1_data; --extern struct omap_vp_instance_data omap3_vp2_data; -+extern struct omap_vp_instance omap3_vp_mpu; -+extern struct omap_vp_instance omap3_vp_core; - --extern struct omap_vp_instance_data omap4_vp_mpu_data; --extern struct omap_vp_instance_data omap4_vp_iva_data; --extern struct omap_vp_instance_data omap4_vp_core_data; -+extern struct omap_vp_instance omap4_vp_mpu; -+extern struct omap_vp_instance omap4_vp_iva; -+extern struct omap_vp_instance omap4_vp_core; - - void omap_vp_init(struct voltagedomain *voltdm); - void omap_vp_enable(struct voltagedomain *voltdm); -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c -index b01d333..79c3df9 100644 ---- a/arch/arm/mach-omap2/vp3xxx_data.c -+++ b/arch/arm/mach-omap2/vp3xxx_data.c -@@ -36,7 +36,7 @@ static const struct omap_vp_ops omap3_vp_ops = { - * VP data common to 34xx/36xx chips - * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. - */ --static const struct omap_vp_common_data omap3_vp_common = { -+static const struct omap_vp_common omap3_vp_common = { - .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, - .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, - .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, -@@ -56,9 +56,9 @@ static const struct omap_vp_common_data omap3_vp_common = { - .ops = &omap3_vp_ops, - }; - --struct omap_vp_instance_data omap3_vp1_data = { -+struct omap_vp_instance omap3_vp_mpu = { - .id = OMAP3_VP_VDD_MPU_ID, -- .vp_common = &omap3_vp_common, -+ .common = &omap3_vp_common, - .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, - .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, - .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET, -@@ -67,9 +67,9 @@ struct omap_vp_instance_data omap3_vp1_data = { - .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, - }; - --struct omap_vp_instance_data omap3_vp2_data = { -+struct omap_vp_instance omap3_vp_core = { - .id = OMAP3_VP_VDD_CORE_ID, -- .vp_common = &omap3_vp_common, -+ .common = &omap3_vp_common, - .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, - .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, - .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET, -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c -index 9704c7b..8f75cd9 100644 ---- a/arch/arm/mach-omap2/vp44xx_data.c -+++ b/arch/arm/mach-omap2/vp44xx_data.c -@@ -36,7 +36,7 @@ static const struct omap_vp_ops omap4_vp_ops = { - * VP data common to 44xx chips - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. - */ --static const struct omap_vp_common_data omap4_vp_common = { -+static const struct omap_vp_common omap4_vp_common = { - .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, - .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, - .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, -@@ -56,9 +56,9 @@ static const struct omap_vp_common_data omap4_vp_common = { - .ops = &omap4_vp_ops, - }; - --struct omap_vp_instance_data omap4_vp_mpu_data = { -+struct omap_vp_instance omap4_vp_mpu = { - .id = OMAP4_VP_VDD_MPU_ID, -- .vp_common = &omap4_vp_common, -+ .common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, - .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET, -@@ -67,9 +67,9 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { - .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, - }; - --struct omap_vp_instance_data omap4_vp_iva_data = { -+struct omap_vp_instance omap4_vp_iva = { - .id = OMAP4_VP_VDD_IVA_ID, -- .vp_common = &omap4_vp_common, -+ .common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, - .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET, -@@ -78,9 +78,9 @@ struct omap_vp_instance_data omap4_vp_iva_data = { - .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, - }; - --struct omap_vp_instance_data omap4_vp_core_data = { -+struct omap_vp_instance omap4_vp_core = { - .id = OMAP4_VP_VDD_CORE_ID, -- .vp_common = &omap4_vp_common, -+ .common = &omap4_vp_common, - .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, - .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, - .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs-interface.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs-interface.patch deleted file mode 100644 index fe5139f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs-interface.patch +++ /dev/null @@ -1,317 +0,0 @@ -From fc1db2a579514eb36f5091b656133a6a9c2cbc0d Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 5 Apr 2011 14:39:11 -0700 -Subject: [PATCH 129/149] OMAP3+: voltage: remove unneeded debugfs interface - -Remove read-only debugfs interface to VP values. Most of the values -are init-time only and never change. Current voltage value should be -retreived from the (eventual) regulator framework interface to the -voltage domain. - -Fixes to original version provided by Nishanth Menon <nm@ti.com> - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/smartreflex.c | 29 +++++++++----- - arch/arm/mach-omap2/voltage.c | 78 ------------------------------------- - arch/arm/mach-omap2/voltage.h | 3 - - arch/arm/mach-omap2/vp.c | 63 ----------------------------- - 4 files changed, 19 insertions(+), 154 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c -index be6add0..edb94f2 100644 ---- a/arch/arm/mach-omap2/smartreflex.c -+++ b/arch/arm/mach-omap2/smartreflex.c -@@ -62,6 +62,7 @@ static LIST_HEAD(sr_list); - - static struct omap_sr_class_data *sr_class; - static struct omap_sr_pmic_data *sr_pmic_data; -+static struct dentry *sr_dbg_dir; - - static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) - { -@@ -826,9 +827,10 @@ static int __init omap_sr_probe(struct platform_device *pdev) - struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); - struct omap_sr_data *pdata = pdev->dev.platform_data; - struct resource *mem, *irq; -- struct dentry *vdd_dbg_dir, *nvalue_dir; -+ struct dentry *nvalue_dir; - struct omap_volt_data *volt_data; - int i, ret = 0; -+ char *name; - - if (!sr_info) { - dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", -@@ -898,18 +900,25 @@ static int __init omap_sr_probe(struct platform_device *pdev) - } - - dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); -+ if (!sr_dbg_dir) { -+ sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); -+ if (!sr_dbg_dir) { -+ ret = PTR_ERR(sr_dbg_dir); -+ pr_err("%s:sr debugfs dir creation failed(%d)\n", -+ __func__, ret); -+ goto err_iounmap; -+ } -+ } - -- /* -- * If the voltage domain debugfs directory is not created, do -- * not try to create rest of the debugfs entries. -- */ -- vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); -- if (!vdd_dbg_dir) { -- ret = -EINVAL; -+ name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); -+ if (!name) { -+ dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n", -+ __func__); -+ ret = -ENOMEM; - goto err_iounmap; - } -- -- sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); -+ sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir); -+ kfree(name); - if (IS_ERR(sr_info->dbg_dir)) { - dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", - __func__); -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index c22b53c..eaa5f93 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -43,9 +43,6 @@ - - static LIST_HEAD(voltdm_list); - --#define VOLTAGE_DIR_SIZE 16 --static struct dentry *voltage_dir; -- - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - { - char *sys_ck_name; -@@ -102,51 +99,6 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - return 0; - } - --static int nom_volt_debug_get(void *data, u64 *val) --{ -- struct voltagedomain *voltdm = (struct voltagedomain *)data; -- -- if (!voltdm) { -- pr_warning("Wrong paramater passed\n"); -- return -EINVAL; -- } -- -- *val = omap_voltage_get_nom_volt(voltdm); -- -- return 0; --} -- --DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, -- "%llu\n"); --static void __init vdd_debugfs_init(struct voltagedomain *voltdm) --{ -- char *name; -- struct omap_vdd_info *vdd = voltdm->vdd; -- -- name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL); -- if (!name) { -- pr_warning("%s: Unable to allocate memory for debugfs" -- " directory name for vdd_%s", -- __func__, voltdm->name); -- return; -- } -- strcpy(name, "vdd_"); -- strcat(name, voltdm->name); -- -- vdd->debug_dir = debugfs_create_dir(name, voltage_dir); -- kfree(name); -- if (IS_ERR(vdd->debug_dir)) { -- pr_warning("%s: Unable to create debugfs directory for" -- " vdd_%s\n", __func__, voltdm->name); -- vdd->debug_dir = NULL; -- return; -- } -- -- (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, -- vdd->debug_dir, (void *) voltdm, -- &nom_volt_debug_fops); --} -- - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) - { - int ret = -EINVAL; -@@ -342,31 +294,6 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, - } - - /** -- * omap_voltage_get_dbgdir() - API to get pointer to the debugfs directory -- * corresponding to a voltage domain. -- * -- * @voltdm: pointer to the VDD whose debug directory is required. -- * -- * This API returns pointer to the debugfs directory corresponding -- * to the voltage domain. Should be used by drivers requiring to -- * add any debug entry for a particular voltage domain. Returns NULL -- * in case of error. -- */ --struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd; -- -- if (!voltdm || IS_ERR(voltdm)) { -- pr_warning("%s: VDD specified does not exist!\n", __func__); -- return NULL; -- } -- -- vdd = voltdm->vdd; -- -- return vdd->debug_dir; --} -- --/** - * omap_change_voltscale_method() - API to change the voltage scaling method. - * @voltdm: pointer to the VDD whose voltage scaling method - * has to be changed. -@@ -418,10 +345,6 @@ int __init omap_voltage_late_init(void) - return -EINVAL; - } - -- voltage_dir = debugfs_create_dir("voltage", NULL); -- if (IS_ERR(voltage_dir)) -- pr_err("%s: Unable to create voltage debugfs main dir\n", -- __func__); - list_for_each_entry(voltdm, &voltdm_list, node) { - if (!voltdm->scalable) - continue; -@@ -434,7 +357,6 @@ int __init omap_voltage_late_init(void) - if (voltdm->vdd) { - if (omap_vdd_data_configure(voltdm)) - continue; -- vdd_debugfs_init(voltdm); - omap_vp_init(voltdm); - } - } -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 65f94c7..5261703 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -136,14 +136,12 @@ struct omap_voltdm_pmic { - * @volt_data : voltage table having the distinct voltages supported - * by the domain and other associated per voltage data. - * @vp_rt_data : VP data derived at runtime, not predefined -- * @debug_dir : debug directory for this voltage domain. - * @curr_volt : current voltage for this vdd. - * @volt_scale : API to scale the voltage of the vdd. - */ - struct omap_vdd_info { - struct omap_volt_data *volt_data; - struct omap_vp_runtime_data vp_rt_data; -- struct dentry *debug_dir; - u32 curr_volt; - - int (*volt_scale) (struct voltagedomain *voltdm, -@@ -158,7 +156,6 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, - unsigned long volt); - unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); --struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); - #ifdef CONFIG_PM - int omap_voltage_register_pmic(struct voltagedomain *voltdm, - struct omap_voltdm_pmic *pmic); -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index 53d6018..c9a315f 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -1,6 +1,5 @@ - #include <linux/kernel.h> - #include <linux/init.h> --#include <linux/debugfs.h> - - #include <plat/common.h> - -@@ -10,8 +9,6 @@ - #include "prm-regbits-44xx.h" - #include "prm44xx.h" - --static void __init vp_debugfs_init(struct voltagedomain *voltdm); -- - static void vp_latch_vsel(struct voltagedomain *voltdm) - { - struct omap_vp_instance *vp = voltdm->vp; -@@ -87,8 +84,6 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - (vdd->vp_rt_data.vlimitto_timeout << - vp->common->vlimitto_timeout_shift)); - voltdm->write(vp_val, vp->vlimitto); -- -- vp_debugfs_init(voltdm); - } - - /* VP force update method of voltage scaling */ -@@ -300,61 +295,3 @@ void omap_vp_disable(struct voltagedomain *voltdm) - - return; - } -- --/* Voltage debugfs support */ --static int vp_volt_debug_get(void *data, u64 *val) --{ -- struct voltagedomain *voltdm = (struct voltagedomain *)data; -- struct omap_vp_instance *vp = voltdm->vp; -- struct omap_vdd_info *vdd = voltdm->vdd; -- u8 vsel; -- -- if (!vdd) { -- pr_warning("Wrong paramater passed\n"); -- return -EINVAL; -- } -- -- vsel = voltdm->read(vp->voltage); -- -- if (!voltdm->pmic->vsel_to_uv) { -- pr_warning("PMIC function to convert vsel to voltage" -- "in uV not registerd\n"); -- return -EINVAL; -- } -- -- *val = voltdm->pmic->vsel_to_uv(vsel); -- return 0; --} -- --DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); -- --static void __init vp_debugfs_init(struct voltagedomain *voltdm) --{ -- struct omap_vdd_info *vdd = voltdm->vdd; -- struct dentry *debug_dir; -- -- debug_dir = debugfs_create_dir("vp", vdd->debug_dir); -- if (IS_ERR(debug_dir)) -- pr_err("%s: Unable to create VP debugfs dir dir\n", __func__); -- -- (void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir, -- &(vdd->vp_rt_data.vpconfig_errorgain)); -- (void) debugfs_create_x16("smpswaittimemin", S_IRUGO, -- debug_dir, -- &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); -- (void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir, -- &(vdd->vp_rt_data.vstepmin_stepmin)); -- (void) debugfs_create_x16("smpswaittimemax", S_IRUGO, -- debug_dir, -- &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); -- (void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir, -- &(vdd->vp_rt_data.vstepmax_stepmax)); -- (void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir, -- &(vdd->vp_rt_data.vlimitto_vddmax)); -- (void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir, -- &(vdd->vp_rt_data.vlimitto_vddmin)); -- (void) debugfs_create_x16("timeout", S_IRUGO, debug_dir, -- &(vdd->vp_rt_data.vlimitto_timeout)); -- (void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir, -- (void *) voltdm, &vp_volt_debug_fops); --} --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch deleted file mode 100644 index 22dff61..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch +++ /dev/null @@ -1,214 +0,0 @@ -From 19b2a24927050ee82e6f587ac47f484f1b114a57 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 4 Apr 2011 16:02:28 -0700 -Subject: [PATCH 130/149] OMAP3+: VP: struct omap_vp_common: replace shift with __ffs(mask) - -In struct omap_vp_common, the shift value can be derived from the mask -value by using __ffs(), so remove the shift value for the various -VPCONFIG bitfields, and use __ffs() in the code for the shift value. - -While here, rename field names in kerneldoc comment to match actual -field names in structure. Also, cleanup indendentaion for other VP -register accesses in omap_vp_init(). - -No functional changes. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 2 +- - arch/arm/mach-omap2/voltage.c | 2 +- - arch/arm/mach-omap2/vp.c | 29 ++++++++++++++--------------- - arch/arm/mach-omap2/vp.h | 34 ++++++++++++++-------------------- - arch/arm/mach-omap2/vp3xxx_data.c | 4 +--- - arch/arm/mach-omap2/vp44xx_data.c | 4 +--- - 6 files changed, 32 insertions(+), 43 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 7058585..f64c826 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -140,7 +140,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; - vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << -- voltdm->vp->common->vpconfig_errorgain_shift; -+ __ffs(voltdm->vp->common->vpconfig_errorgain_mask); - voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); - } - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index eaa5f93..5b16fd1 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -82,7 +82,7 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - - vdd->vp_rt_data.vpconfig_erroroffset = - (voltdm->pmic->vp_erroroffset << -- voltdm->vp->common->vpconfig_erroroffset_shift); -+ __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); - - timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; - vdd->vp_rt_data.vlimitto_timeout = timeout_val; -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index c9a315f..297d094 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -34,8 +34,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) - vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | - vp->common->vpconfig_initvdd); -- vpconfig |= vsel << vp->common->vpconfig_initvoltage_shift; -- -+ vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); - voltdm->write(vpconfig, vp->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ -@@ -61,28 +60,28 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | - (vdd->vp_rt_data.vpconfig_errorgain << -- vp->common->vpconfig_errorgain_shift) | -+ __ffs(vp->common->vpconfig_errorgain_mask)) | - vp->common->vpconfig_timeouten; - voltdm->write(vp_val, vp->vpconfig); - - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << -- vp->common->vstepmin_smpswaittimemin_shift) | -- (vdd->vp_rt_data.vstepmin_stepmin << -- vp->common->vstepmin_stepmin_shift)); -+ vp->common->vstepmin_smpswaittimemin_shift) | -+ (vdd->vp_rt_data.vstepmin_stepmin << -+ vp->common->vstepmin_stepmin_shift)); - voltdm->write(vp_val, vp->vstepmin); - - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << -- vp->common->vstepmax_smpswaittimemax_shift) | -- (vdd->vp_rt_data.vstepmax_stepmax << -- vp->common->vstepmax_stepmax_shift)); -+ vp->common->vstepmax_smpswaittimemax_shift) | -+ (vdd->vp_rt_data.vstepmax_stepmax << -+ vp->common->vstepmax_stepmax_shift)); - voltdm->write(vp_val, vp->vstepmax); - - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << -- vp->common->vlimitto_vddmax_shift) | -- (vdd->vp_rt_data.vlimitto_vddmin << -- vp->common->vlimitto_vddmin_shift) | -- (vdd->vp_rt_data.vlimitto_timeout << -- vp->common->vlimitto_timeout_shift)); -+ vp->common->vlimitto_vddmax_shift) | -+ (vdd->vp_rt_data.vlimitto_vddmin << -+ vp->common->vlimitto_vddmin_shift) | -+ (vdd->vp_rt_data.vlimitto_timeout << -+ vp->common->vlimitto_timeout_shift)); - voltdm->write(vp_val, vp->vlimitto); - } - -@@ -121,7 +120,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - vp->common->vpconfig_forceupdate | - vp->common->vpconfig_initvoltage_mask); - vpconfig |= ((target_vsel << -- vp->common->vpconfig_initvoltage_shift)); -+ __ffs(vp->common->vpconfig_initvoltage_mask))); - voltdm->write(vpconfig, vp->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 1d63960..2afe11d 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -46,37 +46,32 @@ struct omap_vp_ops { - - /** - * struct omap_vp_common - register data common to all VDDs -+ * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg -- * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg -+ * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg - * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg - * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg -- * @vpconfig_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg -- * @vpconfig_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg -- * @vpconfig_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg -- * @vpconfig_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg -- * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg -- * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg -- * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg -- * -- * XXX It it not necessary to have both a mask and a shift for the same -- * bitfield - remove one -- * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix! -+ * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg -+ * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg -+ * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg -+ * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg -+ * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg -+ * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg -+ * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg - */ - struct omap_vp_common { -+ u32 vpconfig_erroroffset_mask; - u32 vpconfig_errorgain_mask; - u32 vpconfig_initvoltage_mask; -- u32 vpconfig_timeouten; -- u32 vpconfig_initvdd; -- u32 vpconfig_forceupdate; -- u32 vpconfig_vpenable; -- u8 vpconfig_erroroffset_shift; -- u8 vpconfig_errorgain_shift; -- u8 vpconfig_initvoltage_shift; -+ u8 vpconfig_timeouten; -+ u8 vpconfig_initvdd; -+ u8 vpconfig_forceupdate; -+ u8 vpconfig_vpenable; - u8 vstepmin_stepmin_shift; - u8 vstepmin_smpswaittimemin_shift; - u8 vstepmax_stepmax_shift; -@@ -127,7 +122,6 @@ struct omap_vp_instance { - * XXX Is this structure really needed? Why not just program the - * device directly? They are in PRM space, therefore in the WKUP - * powerdomain, so register contents should not be lost in off-mode. -- * XXX Some of these fields are incorrectly named, e.g., vstep* - */ - struct omap_vp_runtime_data { - u32 vpconfig_erroroffset; -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c -index 79c3df9..d429c44 100644 ---- a/arch/arm/mach-omap2/vp3xxx_data.c -+++ b/arch/arm/mach-omap2/vp3xxx_data.c -@@ -37,10 +37,8 @@ static const struct omap_vp_ops omap3_vp_ops = { - * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. - */ - static const struct omap_vp_common omap3_vp_common = { -- .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, -+ .vpconfig_erroroffset_mask = OMAP3430_ERROROFFSET_MASK, - .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, -- .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, -- .vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT, - .vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK, - .vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK, - .vpconfig_initvdd = OMAP3430_INITVDD_MASK, -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c -index 8f75cd9..0daf2a4 100644 ---- a/arch/arm/mach-omap2/vp44xx_data.c -+++ b/arch/arm/mach-omap2/vp44xx_data.c -@@ -37,10 +37,8 @@ static const struct omap_vp_ops omap4_vp_ops = { - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. - */ - static const struct omap_vp_common omap4_vp_common = { -- .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, -+ .vpconfig_erroroffset_mask = OMAP4430_ERROROFFSET_MASK, - .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, -- .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, -- .vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT, - .vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK, - .vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK, - .vpconfig_initvdd = OMAP4430_INITVDD_MASK, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch deleted file mode 100644 index 2643c6b..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch +++ /dev/null @@ -1,184 +0,0 @@ -From d0c5c4d43250d9e7aad920ce3e7f5e7d5061be47 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 4 Apr 2011 17:22:28 -0700 -Subject: [PATCH 131/149] OMAP3+: VP: move SoC-specific sys clock rate retreival late init - -Add sys clock name and rate to struct voltage domain. SoC specific -voltagedomain init code initializes sys clock name. After clock -framework is initialized, voltage late init will then use use the -sys_clk rate to calculate the various timing that depend on that rate. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.c | 47 +++++++++---------------- - arch/arm/mach-omap2/voltage.h | 5 +++ - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 ++++ - arch/arm/mach-omap2/voltagedomains44xx_data.c | 8 ++++ - 4 files changed, 38 insertions(+), 30 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 5b16fd1..533ea38 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -21,10 +21,10 @@ - - #include <linux/delay.h> - #include <linux/io.h> --#include <linux/clk.h> - #include <linux/err.h> - #include <linux/debugfs.h> - #include <linux/slab.h> -+#include <linux/clk.h> - - #include <plat/common.h> - -@@ -45,36 +45,12 @@ static LIST_HEAD(voltdm_list); - - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - { -- char *sys_ck_name; -- struct clk *sys_ck; -- u32 sys_clk_speed, timeout_val, waittime; - struct omap_vdd_info *vdd = voltdm->vdd; -+ u32 sys_clk_rate, timeout_val, waittime; - -- /* -- * XXX Clockfw should handle this, or this should be in a -- * struct record -- */ -- if (cpu_is_omap24xx() || cpu_is_omap34xx()) -- sys_ck_name = "sys_ck"; -- else if (cpu_is_omap44xx()) -- sys_ck_name = "sys_clkin_ck"; -- else -- return -EINVAL; -- -- /* -- * Sys clk rate is require to calculate vp timeout value and -- * smpswaittimemin and smpswaittimemax. -- */ -- sys_ck = clk_get(NULL, sys_ck_name); -- if (IS_ERR(sys_ck)) { -- pr_warning("%s: Could not get the sys clk to calculate" -- "various vdd_%s params\n", __func__, voltdm->name); -- return -EINVAL; -- } -- sys_clk_speed = clk_get_rate(sys_ck); -- clk_put(sys_ck); - /* Divide to avoid overflow */ -- sys_clk_speed /= 1000; -+ sys_clk_rate = voltdm->sys_clk.rate / 1000; -+ WARN_ON(!sys_clk_rate); - - /* Generic voltage parameters */ - vdd->volt_scale = omap_vp_forceupdate_scale; -@@ -84,13 +60,13 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - (voltdm->pmic->vp_erroroffset << - __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); - -- timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; -+ timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; - vdd->vp_rt_data.vlimitto_timeout = timeout_val; - vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; - vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; - - waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * -- sys_clk_speed) / 1000; -+ sys_clk_rate) / 1000; - vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; - vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; - vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; -@@ -346,9 +322,20 @@ int __init omap_voltage_late_init(void) - } - - list_for_each_entry(voltdm, &voltdm_list, node) { -+ struct clk *sys_ck; -+ - if (!voltdm->scalable) - continue; - -+ sys_ck = clk_get(NULL, voltdm->sys_clk.name); -+ if (IS_ERR(sys_ck)) { -+ pr_warning("%s: Could not get sys clk.\n", __func__); -+ return -EINVAL; -+ } -+ voltdm->sys_clk.rate = clk_get_rate(sys_ck); -+ WARN_ON(!voltdm->sys_clk.rate); -+ clk_put(sys_ck); -+ - if (voltdm->vc) { - voltdm->vdd->volt_scale = omap_vc_bypass_scale; - omap_vc_init_channel(voltdm); -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 5261703..d73c956 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -76,6 +76,11 @@ struct voltagedomain { - void (*write) (u32 val, u8 offset); - u32 (*rmw)(u32 mask, u32 bits, u8 offset); - -+ union { -+ const char *name; -+ u32 rate; -+ } sys_clk; -+ - struct omap_vdd_info *vdd; - }; - -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index 4db2c6c..e7a0be1 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -82,8 +82,13 @@ static struct voltagedomain *voltagedomains_omap3[] __initdata = { - NULL, - }; - -+static const char *sys_clk_name __initdata = "sys_ck"; -+ - void __init omap3xxx_voltagedomains_init(void) - { -+ struct voltagedomain *voltdm; -+ int i; -+ - /* - * XXX Will depend on the process, validation, and binning - * for the currently-running IC -@@ -96,5 +101,8 @@ void __init omap3xxx_voltagedomains_init(void) - omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; - } - -+ for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) -+ voltdm->sys_clk.name = sys_clk_name; -+ - voltdm_init(voltagedomains_omap3); - }; -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index 3e7cb4e..9c20fbb 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -98,8 +98,13 @@ static struct voltagedomain *voltagedomains_omap4[] __initdata = { - NULL, - }; - -+static const char *sys_clk_name __initdata = "sys_clkin_ck"; -+ - void __init omap44xx_voltagedomains_init(void) - { -+ struct voltagedomain *voltdm; -+ int i; -+ - /* - * XXX Will depend on the process, validation, and binning - * for the currently-running IC -@@ -108,5 +113,8 @@ void __init omap44xx_voltagedomains_init(void) - omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; - omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; - -+ for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) -+ voltdm->sys_clk.name = sys_clk_name; -+ - voltdm_init(voltagedomains_omap4); - }; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP-init.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP-init.patch deleted file mode 100644 index 23b4a31..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP-init.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 505468e0ec50f01f1bf37003096d7ae73deb491d Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Thu, 14 Jul 2011 11:10:27 -0700 -Subject: [PATCH 132/149] OMAP3+: VP: move timing calculation/config into VP init - -Move VP timing calcluation (based on sys clock) and register programming -into VP init. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.c | 22 ---------------------- - arch/arm/mach-omap2/vp.c | 23 ++++++++++++++++++++++- - 2 files changed, 22 insertions(+), 23 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 533ea38..4a15668 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -46,31 +46,9 @@ static LIST_HEAD(voltdm_list); - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - { - struct omap_vdd_info *vdd = voltdm->vdd; -- u32 sys_clk_rate, timeout_val, waittime; -- -- /* Divide to avoid overflow */ -- sys_clk_rate = voltdm->sys_clk.rate / 1000; -- WARN_ON(!sys_clk_rate); - - /* Generic voltage parameters */ - vdd->volt_scale = omap_vp_forceupdate_scale; -- voltdm->vp->enabled = false; -- -- vdd->vp_rt_data.vpconfig_erroroffset = -- (voltdm->pmic->vp_erroroffset << -- __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); -- -- timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; -- vdd->vp_rt_data.vlimitto_timeout = timeout_val; -- vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; -- vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; -- -- waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * -- sys_clk_rate) / 1000; -- vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; -- vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; -- vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; -- vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; - - return 0; - } -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index 297d094..ea61a47 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -50,7 +50,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - { - struct omap_vp_instance *vp = voltdm->vp; - struct omap_vdd_info *vdd = voltdm->vdd; -- u32 vp_val; -+ u32 vp_val, sys_clk_rate, timeout_val, waittime; - - if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", -@@ -58,6 +58,27 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - return; - } - -+ vp->enabled = false; -+ -+ /* Divide to avoid overflow */ -+ sys_clk_rate = voltdm->sys_clk.rate / 1000; -+ -+ vdd->vp_rt_data.vpconfig_erroroffset = -+ (voltdm->pmic->vp_erroroffset << -+ __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); -+ -+ timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; -+ vdd->vp_rt_data.vlimitto_timeout = timeout_val; -+ vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; -+ vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; -+ -+ waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * -+ sys_clk_rate) / 1000; -+ vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; -+ vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; -+ vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; -+ vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; -+ - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | - (vdd->vp_rt_data.vpconfig_errorgain << - __ffs(vp->common->vpconfig_errorgain_mask)) | --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating-erro.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating-erro.patch deleted file mode 100644 index 2c1ce2c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating-erro.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 0a3d1d2ea5a37d1afe583dd0aee310a979d0445f Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 5 Apr 2011 15:15:31 -0700 -Subject: [PATCH 133/149] OMAP3+: VP: create VP helper function for updating error gain - -Create new helper function in VP layer for updating VP error gain. -Currently used during pre-scale for VP force update and VC bypass. - -TODO: determine if this can be removed from the pre-scale path and -moved to VP enable path. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 19 ++----------------- - arch/arm/mach-omap2/vp.c | 19 +++++++++++++++++++ - arch/arm/mach-omap2/vp.h | 2 ++ - 3 files changed, 23 insertions(+), 17 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index f64c826..e855559 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -96,9 +96,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - u8 *target_vsel, u8 *current_vsel) - { - struct omap_vc_channel *vc = voltdm->vc; -- struct omap_vdd_info *vdd = voltdm->vdd; -- struct omap_volt_data *volt_data; -- u32 vc_cmdval, vp_errgain_val; -+ u32 vc_cmdval; - - /* Check if sufficient pmic info is available for this vdd */ - if (!voltdm->pmic) { -@@ -120,11 +118,6 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - return -EINVAL; - } - -- /* Get volt_data corresponding to target_volt */ -- volt_data = omap_voltage_get_voltdata(voltdm, target_volt); -- if (IS_ERR(volt_data)) -- volt_data = NULL; -- - *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); - *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); - -@@ -134,15 +127,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); - voltdm->write(vc_cmdval, vc->cmdval_reg); - -- /* Setting vp errorgain based on the voltage */ -- if (volt_data) { -- vp_errgain_val = voltdm->read(voltdm->vp->vpconfig); -- vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; -- vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; -- vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << -- __ffs(voltdm->vp->common->vpconfig_errorgain_mask); -- voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); -- } -+ omap_vp_update_errorgain(voltdm, target_volt); - - return 0; - } -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index ea61a47..f68a6db 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -106,6 +106,25 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - voltdm->write(vp_val, vp->vlimitto); - } - -+int omap_vp_update_errorgain(struct voltagedomain *voltdm, -+ unsigned long target_volt) -+{ -+ struct omap_volt_data *volt_data; -+ -+ /* Get volt_data corresponding to target_volt */ -+ volt_data = omap_voltage_get_voltdata(voltdm, target_volt); -+ if (IS_ERR(volt_data)) -+ return -EINVAL; -+ -+ /* Setting vp errorgain based on the voltage */ -+ voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask, -+ volt_data->vp_errgain << -+ __ffs(voltdm->vp->common->vpconfig_errorgain_mask), -+ voltdm->vp->vpconfig); -+ -+ return 0; -+} -+ - /* VP force update method of voltage scaling */ - int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - unsigned long target_volt) -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 2afe11d..71ac738 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -148,5 +148,7 @@ void omap_vp_disable(struct voltagedomain *voltdm); - unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); - int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - unsigned long target_volt); -+int omap_vp_update_errorgain(struct voltagedomain *voltdm, -+ unsigned long target_volt); - - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch deleted file mode 100644 index 2308995..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch +++ /dev/null @@ -1,170 +0,0 @@ -From 7b7d6f216a49287479af9526b888df5e6325458b Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 4 Apr 2011 17:58:21 -0700 -Subject: [PATCH 134/149] OMAP3+: VP: remove omap_vp_runtime_data - -Remove the "runtime" VP data in favor of direct programming of VP registers. -The VP is in the PRM, which is in the wakeup powerdomain, so there is no -need to keep the state dynamically. - -Fixes to original version from Nishanth Menon <nm@ti.com> - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.h | 2 - - arch/arm/mach-omap2/vp.c | 70 ++++++++++++++++++----------------------- - arch/arm/mach-omap2/vp.h | 28 ---------------- - 3 files changed, 31 insertions(+), 69 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index d73c956..5235eec 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -140,13 +140,11 @@ struct omap_voltdm_pmic { - * - * @volt_data : voltage table having the distinct voltages supported - * by the domain and other associated per voltage data. -- * @vp_rt_data : VP data derived at runtime, not predefined - * @curr_volt : current voltage for this vdd. - * @volt_scale : API to scale the voltage of the vdd. - */ - struct omap_vdd_info { - struct omap_volt_data *volt_data; -- struct omap_vp_runtime_data vp_rt_data; - u32 curr_volt; - - int (*volt_scale) (struct voltagedomain *voltdm, -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index f68a6db..e7d38f6 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -49,8 +49,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) - void __init omap_vp_init(struct voltagedomain *voltdm) - { - struct omap_vp_instance *vp = voltdm->vp; -- struct omap_vdd_info *vdd = voltdm->vdd; -- u32 vp_val, sys_clk_rate, timeout_val, waittime; -+ u32 val, sys_clk_rate, timeout, waittime; -+ u32 vddmin, vddmax, vstepmin, vstepmax; - - if (!voltdm->read || !voltdm->write) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", -@@ -63,47 +63,39 @@ void __init omap_vp_init(struct voltagedomain *voltdm) - /* Divide to avoid overflow */ - sys_clk_rate = voltdm->sys_clk.rate / 1000; - -- vdd->vp_rt_data.vpconfig_erroroffset = -- (voltdm->pmic->vp_erroroffset << -- __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); -- -- timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; -- vdd->vp_rt_data.vlimitto_timeout = timeout_val; -- vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; -- vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; -+ timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; -+ vddmin = voltdm->pmic->vp_vddmin; -+ vddmax = voltdm->pmic->vp_vddmax; - - waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * - sys_clk_rate) / 1000; -- vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; -- vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; -- vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; -- vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; -- -- vp_val = vdd->vp_rt_data.vpconfig_erroroffset | -- (vdd->vp_rt_data.vpconfig_errorgain << -- __ffs(vp->common->vpconfig_errorgain_mask)) | -+ vstepmin = voltdm->pmic->vp_vstepmin; -+ vstepmax = voltdm->pmic->vp_vstepmax; -+ -+ /* -+ * VP_CONFIG: error gain is not set here, it will be updated -+ * on each scale, based on OPP. -+ */ -+ val = (voltdm->pmic->vp_erroroffset << -+ __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) | - vp->common->vpconfig_timeouten; -- voltdm->write(vp_val, vp->vpconfig); -- -- vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << -- vp->common->vstepmin_smpswaittimemin_shift) | -- (vdd->vp_rt_data.vstepmin_stepmin << -- vp->common->vstepmin_stepmin_shift)); -- voltdm->write(vp_val, vp->vstepmin); -- -- vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << -- vp->common->vstepmax_smpswaittimemax_shift) | -- (vdd->vp_rt_data.vstepmax_stepmax << -- vp->common->vstepmax_stepmax_shift)); -- voltdm->write(vp_val, vp->vstepmax); -- -- vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << -- vp->common->vlimitto_vddmax_shift) | -- (vdd->vp_rt_data.vlimitto_vddmin << -- vp->common->vlimitto_vddmin_shift) | -- (vdd->vp_rt_data.vlimitto_timeout << -- vp->common->vlimitto_timeout_shift)); -- voltdm->write(vp_val, vp->vlimitto); -+ voltdm->write(val, vp->vpconfig); -+ -+ /* VSTEPMIN */ -+ val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) | -+ (vstepmin << vp->common->vstepmin_stepmin_shift); -+ voltdm->write(val, vp->vstepmin); -+ -+ /* VSTEPMAX */ -+ val = (vstepmax << vp->common->vstepmax_stepmax_shift) | -+ (waittime << vp->common->vstepmax_smpswaittimemax_shift); -+ voltdm->write(val, vp->vstepmax); -+ -+ /* VLIMITTO */ -+ val = (vddmax << vp->common->vlimitto_vddmax_shift) | -+ (vddmin << vp->common->vlimitto_vddmin_shift) | -+ (timeout << vp->common->vlimitto_timeout_shift); -+ voltdm->write(val, vp->vlimitto); - } - - int omap_vp_update_errorgain(struct voltagedomain *voltdm, -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 71ac738..0d63267 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -107,34 +107,6 @@ struct omap_vp_instance { - bool enabled; - }; - --/** -- * struct omap_vp_runtime_data - VP data populated at runtime by code -- * @vpconfig_erroroffset: value of ERROROFFSET bitfield in PRM_VP*_CONFIG -- * @vpconfig_errorgain: value of ERRORGAIN bitfield in PRM_VP*_CONFIG -- * @vstepmin_smpswaittimemin: value of SMPSWAITTIMEMIN bitfield in PRM_VP*_VSTEPMIN -- * @vstepmax_smpswaittimemax: value of SMPSWAITTIMEMAX bitfield in PRM_VP*_VSTEPMAX -- * @vlimitto_timeout: value of TIMEOUT bitfield in PRM_VP*_VLIMITTO -- * @vstepmin_stepmin: value of VSTEPMIN bitfield in PRM_VP*_VSTEPMIN -- * @vstepmax_stepmax: value of VSTEPMAX bitfield in PRM_VP*_VSTEPMAX -- * @vlimitto_vddmin: value of VDDMIN bitfield in PRM_VP*_VLIMITTO -- * @vlimitto_vddmax: value of VDDMAX bitfield in PRM_VP*_VLIMITTO -- * -- * XXX Is this structure really needed? Why not just program the -- * device directly? They are in PRM space, therefore in the WKUP -- * powerdomain, so register contents should not be lost in off-mode. -- */ --struct omap_vp_runtime_data { -- u32 vpconfig_erroroffset; -- u16 vpconfig_errorgain; -- u16 vstepmin_smpswaittimemin; -- u16 vstepmax_smpswaittimemax; -- u16 vlimitto_timeout; -- u8 vstepmin_stepmin; -- u8 vstepmax_stepmax; -- u8 vlimitto_vddmin; -- u8 vlimitto_vddmax; --}; -- - extern struct omap_vp_instance omap3_vp_mpu; - extern struct omap_vp_instance omap3_vp_core; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch deleted file mode 100644 index efcc75a..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 31b07224df028a7913f82c38f13c2bd621613756 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Thu, 14 Jul 2011 11:12:32 -0700 -Subject: [PATCH 135/149] OMAP3+: VP: move voltage scale function pointer into struct voltagedomain - -Function pointer used for actual voltage scaling (e.g. VP force update -or VC bypass) is moved from omap_vdd_info into struct voltagedomain, -resulting in renames s/vdd->volt_scale/voltdm->scale/ - -No functional changes. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.c | 24 +++++++----------------- - arch/arm/mach-omap2/voltage.h | 8 ++++---- - 2 files changed, 11 insertions(+), 21 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 4a15668..32f0873 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -45,10 +45,8 @@ static LIST_HEAD(voltdm_list); - - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) - { -- struct omap_vdd_info *vdd = voltdm->vdd; -- - /* Generic voltage parameters */ -- vdd->volt_scale = omap_vp_forceupdate_scale; -+ voltdm->scale = omap_vp_forceupdate_scale; - - return 0; - } -@@ -107,22 +105,18 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) - int omap_voltage_scale_vdd(struct voltagedomain *voltdm, - unsigned long target_volt) - { -- struct omap_vdd_info *vdd; -- - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return -EINVAL; - } - -- vdd = voltdm->vdd; -- -- if (!vdd->volt_scale) { -+ if (!voltdm->scale) { - pr_err("%s: No voltage scale API registered for vdd_%s\n", - __func__, voltdm->name); - return -ENODATA; - } - -- return vdd->volt_scale(voltdm, target_volt); -+ return voltdm->scale(voltdm, target_volt); - } - - /** -@@ -258,23 +252,19 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, - * defined in voltage.h - */ - void omap_change_voltscale_method(struct voltagedomain *voltdm, -- int voltscale_method) -+ int voltscale_method) - { -- struct omap_vdd_info *vdd; -- - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return; - } - -- vdd = voltdm->vdd; -- - switch (voltscale_method) { - case VOLTSCALE_VPFORCEUPDATE: -- vdd->volt_scale = omap_vp_forceupdate_scale; -+ voltdm->scale = omap_vp_forceupdate_scale; - return; - case VOLTSCALE_VCBYPASS: -- vdd->volt_scale = omap_vc_bypass_scale; -+ voltdm->scale = omap_vc_bypass_scale; - return; - default: - pr_warning("%s: Trying to change the method of voltage scaling" -@@ -315,7 +305,7 @@ int __init omap_voltage_late_init(void) - clk_put(sys_ck); - - if (voltdm->vc) { -- voltdm->vdd->volt_scale = omap_vc_bypass_scale; -+ voltdm->scale = omap_vc_bypass_scale; - omap_vc_init_channel(voltdm); - } - -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 5235eec..d2a0c24 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -60,6 +60,7 @@ struct omap_vfsm_instance { - * @pwrdm_node: list_head linking all powerdomains in this voltagedomain - * @vdd: to be removed - * @pwrdms: powerdomains in this voltagedomain -+ * @scale: function used to scale the voltage of the voltagedomain - */ - struct voltagedomain { - char *name; -@@ -81,6 +82,9 @@ struct voltagedomain { - u32 rate; - } sys_clk; - -+ int (*scale) (struct voltagedomain *voltdm, -+ unsigned long target_volt); -+ - struct omap_vdd_info *vdd; - }; - -@@ -141,14 +145,10 @@ struct omap_voltdm_pmic { - * @volt_data : voltage table having the distinct voltages supported - * by the domain and other associated per voltage data. - * @curr_volt : current voltage for this vdd. -- * @volt_scale : API to scale the voltage of the vdd. - */ - struct omap_vdd_info { - struct omap_volt_data *volt_data; - u32 curr_volt; -- -- int (*volt_scale) (struct voltagedomain *voltdm, -- unsigned long target_volt); - }; - - int omap_voltage_scale_vdd(struct voltagedomain *voltdm, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch deleted file mode 100644 index 0bb557d..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 6bf9eba8b75c6e8c895f7be294794846c51cc3f1 Mon Sep 17 00:00:00 2001 -From: Todd Poynor <toddpoynor@google.com> -Date: Fri, 27 May 2011 19:15:59 -0700 -Subject: [PATCH 136/149] OMAP: VP: Explicitly mask VPVOLTAGE field - -Reading the VPVOLTAGE field of PRM_VP_*_VOLTAGE registers currently -relies on a u32 -> u8 conversion to mask off the FORCEUPDATEWAIT field -in the upper bits. Make this explicit using the mask symbol -already defined, added as a new field in struct omap_vp_common. - -Signed-off-by: Todd Poynor <toddpoynor@google.com> -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vp.c | 3 ++- - arch/arm/mach-omap2/vp.h | 2 ++ - arch/arm/mach-omap2/vp3xxx_data.c | 2 ++ - arch/arm/mach-omap2/vp44xx_data.c | 1 + - 4 files changed, 7 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index e7d38f6..3807620 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -227,7 +227,8 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) - return 0; - } - -- curr_vsel = voltdm->read(vp->voltage); -+ curr_vsel = (voltdm->read(vp->voltage) & vp->common->vpvoltage_mask) -+ >> __ffs(vp->common->vpvoltage_mask); - - if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { - pr_warning("%s: PMIC function to convert vsel to voltage" -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index 0d63267..f78752b 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -63,6 +63,7 @@ struct omap_vp_ops { - * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg - * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg - * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg -+ * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg - */ - struct omap_vp_common { - u32 vpconfig_erroroffset_mask; -@@ -79,6 +80,7 @@ struct omap_vp_common { - u8 vlimitto_vddmin_shift; - u8 vlimitto_vddmax_shift; - u8 vlimitto_timeout_shift; -+ u8 vpvoltage_mask; - - const struct omap_vp_ops *ops; - }; -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c -index d429c44..260c554 100644 ---- a/arch/arm/mach-omap2/vp3xxx_data.c -+++ b/arch/arm/mach-omap2/vp3xxx_data.c -@@ -51,6 +51,8 @@ static const struct omap_vp_common omap3_vp_common = { - .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, - .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, - .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, -+ .vpvoltage_mask = OMAP3430_VPVOLTAGE_MASK, -+ - .ops = &omap3_vp_ops, - }; - -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c -index 0daf2a4..b4e7704 100644 ---- a/arch/arm/mach-omap2/vp44xx_data.c -+++ b/arch/arm/mach-omap2/vp44xx_data.c -@@ -51,6 +51,7 @@ static const struct omap_vp_common omap4_vp_common = { - .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, - .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, - .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, -+ .vpvoltage_mask = OMAP4430_VPVOLTAGE_MASK, - .ops = &omap4_vp_ops, - }; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch deleted file mode 100644 index b0ca14a..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch +++ /dev/null @@ -1,29 +0,0 @@ -From abe6084b3aea9f55bb9b9127a0a4c58f915e635e Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 18 Jul 2011 15:31:43 -0700 -Subject: [PATCH 137/149] OMAP3+: VP: update_errorgain(): return error if VP - -Add check for valid VP in omap_vp_update_errorgain() - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vp.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index 3807620..29698ac 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -103,6 +103,9 @@ int omap_vp_update_errorgain(struct voltagedomain *voltdm, - { - struct omap_volt_data *volt_data; - -+ if (!voltdm->vp) -+ return -EINVAL; -+ - /* Get volt_data corresponding to target_volt */ - volt_data = omap_voltage_get_voltdata(voltdm, target_volt); - if (IS_ERR(volt_data)) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138-OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138-OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch deleted file mode 100644 index 57ba0a2..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138-OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 479369a9e78273521a5998af043bcad58ee832f8 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Fri, 15 Jul 2011 16:38:10 -0700 -Subject: [PATCH 138/149] OMAP3+: VP: remove unused omap_vp_get_curr_volt() - ---- - arch/arm/mach-omap2/vp.c | 34 ---------------------------------- - arch/arm/mach-omap2/vp.h | 1 - - 2 files changed, 0 insertions(+), 35 deletions(-) - -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index 29698ac..24020ea 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -209,40 +209,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - } - - /** -- * omap_vp_get_curr_volt() - API to get the current vp voltage. -- * @voltdm: pointer to the VDD. -- * -- * This API returns the current voltage for the specified voltage processor -- */ --unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) --{ -- struct omap_vp_instance *vp = voltdm->vp; -- u8 curr_vsel; -- -- if (!voltdm || IS_ERR(voltdm)) { -- pr_warning("%s: VDD specified does not exist!\n", __func__); -- return 0; -- } -- -- if (!voltdm->read) { -- pr_err("%s: No read API for reading vdd_%s regs\n", -- __func__, voltdm->name); -- return 0; -- } -- -- curr_vsel = (voltdm->read(vp->voltage) & vp->common->vpvoltage_mask) -- >> __ffs(vp->common->vpvoltage_mask); -- -- if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { -- pr_warning("%s: PMIC function to convert vsel to voltage" -- "in uV not registerd\n", __func__); -- return 0; -- } -- -- return voltdm->pmic->vsel_to_uv(curr_vsel); --} -- --/** - * omap_vp_enable() - API to enable a particular VP - * @voltdm: pointer to the VDD whose VP is to be enabled. - * -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h -index f78752b..d9bc4f1 100644 ---- a/arch/arm/mach-omap2/vp.h -+++ b/arch/arm/mach-omap2/vp.h -@@ -119,7 +119,6 @@ extern struct omap_vp_instance omap4_vp_core; - void omap_vp_init(struct voltagedomain *voltdm); - void omap_vp_enable(struct voltagedomain *voltdm); - void omap_vp_disable(struct voltagedomain *voltdm); --unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); - int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - unsigned long target_volt); - int omap_vp_update_errorgain(struct voltagedomain *voltdm, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch deleted file mode 100644 index 484ae55..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch +++ /dev/null @@ -1,141 +0,0 @@ -From 562b12a6336f94d9e5957c68b7181a9f36931e7a Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Fri, 15 Jul 2011 17:05:48 -0700 -Subject: [PATCH 139/149] OMAP3+: VP: combine setting init voltage into common function - -combine VPCONFIG init voltage setup into common function and use from -both vp_enable and from vp_forceupdate_scale(). - -NOTE: this patch changes the sequence of when the initVDD bit is -cleared. The bit is now cleared immediately after it was written. -Since only the rising edge of this bit has any affect according to the -TRM, the exact timing of clearing of this bit should not have any -effect. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vp.c | 58 +++++++++++++++------------------------------- - 1 files changed, 19 insertions(+), 39 deletions(-) - -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c -index 24020ea..66bd700 100644 ---- a/arch/arm/mach-omap2/vp.c -+++ b/arch/arm/mach-omap2/vp.c -@@ -9,31 +9,18 @@ - #include "prm-regbits-44xx.h" - #include "prm44xx.h" - --static void vp_latch_vsel(struct voltagedomain *voltdm) -+static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt) - { - struct omap_vp_instance *vp = voltdm->vp; - u32 vpconfig; -- unsigned long uvdc; - char vsel; - -- uvdc = omap_voltage_get_nom_volt(voltdm); -- if (!uvdc) { -- pr_warning("%s: unable to find current voltage for vdd_%s\n", -- __func__, voltdm->name); -- return; -- } -- -- if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { -- pr_warning("%s: PMIC function to convert voltage in uV to" -- " vsel not registered\n", __func__); -- return; -- } -- -- vsel = voltdm->pmic->uv_to_vsel(uvdc); -+ vsel = voltdm->pmic->uv_to_vsel(volt); - - vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | -- vp->common->vpconfig_initvdd); -+ vp->common->vpconfig_forceupdate | -+ vp->common->vpconfig_initvdd); - vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); - voltdm->write(vpconfig, vp->vpconfig); - -@@ -43,6 +30,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) - - /* Clear initVDD copy trigger bit */ - voltdm->write(vpconfig, vp->vpconfig); -+ -+ return vpconfig; - } - - /* Generic voltage init functions */ -@@ -149,22 +138,11 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - return -ETIMEDOUT; - } - -- /* Configure for VP-Force Update */ -- vpconfig = voltdm->read(vp->vpconfig); -- vpconfig &= ~(vp->common->vpconfig_initvdd | -- vp->common->vpconfig_forceupdate | -- vp->common->vpconfig_initvoltage_mask); -- vpconfig |= ((target_vsel << -- __ffs(vp->common->vpconfig_initvoltage_mask))); -- voltdm->write(vpconfig, vp->vpconfig); -- -- /* Trigger initVDD value copy to voltage processor */ -- vpconfig |= vp->common->vpconfig_initvdd; -- voltdm->write(vpconfig, vp->vpconfig); -+ vpconfig = _vp_set_init_voltage(voltdm, target_volt); - - /* Force update of voltage */ -- vpconfig |= vp->common->vpconfig_forceupdate; -- voltdm->write(vpconfig, vp->vpconfig); -+ voltdm->write(vpconfig | vp->common->vpconfig_forceupdate, -+ voltdm->vp->vpconfig); - - /* - * Wait for TransactionDone. Typical latency is <200us. -@@ -197,12 +175,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - "to clear the TRANXDONE status\n", - __func__, voltdm->name); - -- vpconfig = voltdm->read(vp->vpconfig); -- /* Clear initVDD copy trigger bit */ -- vpconfig &= ~vp->common->vpconfig_initvdd; -- voltdm->write(vpconfig, vp->vpconfig); - /* Clear force bit */ -- vpconfig &= ~vp->common->vpconfig_forceupdate; - voltdm->write(vpconfig, vp->vpconfig); - - return 0; -@@ -218,7 +191,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, - void omap_vp_enable(struct voltagedomain *voltdm) - { - struct omap_vp_instance *vp; -- u32 vpconfig; -+ u32 vpconfig, volt; - - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); -@@ -236,12 +209,19 @@ void omap_vp_enable(struct voltagedomain *voltdm) - if (vp->enabled) - return; - -- vp_latch_vsel(voltdm); -+ volt = voltdm_get_voltage(voltdm); -+ if (!volt) { -+ pr_warning("%s: unable to find current voltage for %s\n", -+ __func__, voltdm->name); -+ return; -+ } -+ -+ vpconfig = _vp_set_init_voltage(voltdm, volt); - - /* Enable VP */ -- vpconfig = voltdm->read(vp->vpconfig); - vpconfig |= vp->common->vpconfig_vpenable; - voltdm->write(vpconfig, vp->vpconfig); -+ - vp->enabled = true; - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset-functions-using.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset-functions-using.patch deleted file mode 100644 index 00a2b86..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset-functions-using.patch +++ /dev/null @@ -1,141 +0,0 @@ -From dfebda78f9517dcf20fae5f5cbbdb3c1bebe4e17 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 5 Apr 2011 16:27:21 -0700 -Subject: [PATCH 140/149] OMAP3+: voltage: rename scale and reset functions using voltdm_ prefix - -Rename voltage scaling related functions to use voltdm_ prefix intead -of omap_voltage_, and cleanup kerneldoc comments in the process. - -s/omap_voltage_scale_vdd/voltdm_scale/ -s/omap_voltage_reset/voltdm_reset/ - -Also, in voltdm_reset() s/target_uvdc/target_volt/ to be consistent with -naming throughout the file. - -No functional changes. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/pm.c | 2 +- - arch/arm/mach-omap2/smartreflex-class3.c | 2 +- - arch/arm/mach-omap2/voltage.c | 29 ++++++++++++++--------------- - arch/arm/mach-omap2/voltage.h | 5 ++--- - 4 files changed, 18 insertions(+), 20 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c -index f81340e..659e400 100644 ---- a/arch/arm/mach-omap2/pm.c -+++ b/arch/arm/mach-omap2/pm.c -@@ -214,7 +214,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, - goto exit; - } - -- omap_voltage_scale_vdd(voltdm, bootup_volt); -+ voltdm_scale(voltdm, bootup_volt); - return 0; - - exit: -diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c -index f438cf4..4eac1bc 100644 ---- a/arch/arm/mach-omap2/smartreflex-class3.c -+++ b/arch/arm/mach-omap2/smartreflex-class3.c -@@ -32,7 +32,7 @@ static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset) - omap_vp_disable(voltdm); - sr_disable(voltdm); - if (is_volt_reset) -- omap_voltage_reset(voltdm); -+ voltdm_reset(voltdm); - - return 0; - } -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 32f0873..7588480 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -94,16 +94,15 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) - } - - /** -- * omap_voltage_scale_vdd() - API to scale voltage of a particular -- * voltage domain. -- * @voltdm: pointer to the VDD which is to be scaled. -- * @target_volt: The target voltage of the voltage domain -+ * voltdm_scale() - API to scale voltage of a particular voltage domain. -+ * @voltdm: pointer to the voltage domain which is to be scaled. -+ * @target_volt: The target voltage of the voltage domain - * - * This API should be called by the kernel to do the voltage scaling -- * for a particular voltage domain during dvfs or any other situation. -+ * for a particular voltage domain during DVFS. - */ --int omap_voltage_scale_vdd(struct voltagedomain *voltdm, -- unsigned long target_volt) -+int voltdm_scale(struct voltagedomain *voltdm, -+ unsigned long target_volt) - { - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); -@@ -120,31 +119,31 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, - } - - /** -- * omap_voltage_reset() - Resets the voltage of a particular voltage domain -- * to that of the current OPP. -- * @voltdm: pointer to the VDD whose voltage is to be reset. -+ * voltdm_reset() - Resets the voltage of a particular voltage domain -+ * to that of the current OPP. -+ * @voltdm: pointer to the voltage domain whose voltage is to be reset. - * - * This API finds out the correct voltage the voltage domain is supposed - * to be at and resets the voltage to that level. Should be used especially - * while disabling any voltage compensation modules. - */ --void omap_voltage_reset(struct voltagedomain *voltdm) -+void voltdm_reset(struct voltagedomain *voltdm) - { -- unsigned long target_uvdc; -+ unsigned long target_volt; - - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return; - } - -- target_uvdc = omap_voltage_get_nom_volt(voltdm); -- if (!target_uvdc) { -+ target_volt = omap_voltage_get_nom_volt(voltdm); -+ if (!target_volt) { - pr_err("%s: unable to find current voltage for vdd_%s\n", - __func__, voltdm->name); - return; - } - -- omap_voltage_scale_vdd(voltdm, target_uvdc); -+ voltdm_scale(voltdm, target_volt); - } - - /** -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index d2a0c24..e3efbf9 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -151,9 +151,6 @@ struct omap_vdd_info { - u32 curr_volt; - }; - --int omap_voltage_scale_vdd(struct voltagedomain *voltdm, -- unsigned long target_volt); --void omap_voltage_reset(struct voltagedomain *voltdm); - void omap_voltage_get_volttable(struct voltagedomain *voltdm, - struct omap_volt_data **volt_data); - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, -@@ -191,4 +188,6 @@ int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), - int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, - int (*fn)(struct voltagedomain *voltdm, - struct powerdomain *pwrdm)); -+int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); -+void voltdm_reset(struct voltagedomain *voltdm); - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch deleted file mode 100644 index c9c483c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch +++ /dev/null @@ -1,106 +0,0 @@ -From 20a2c2c2dcf15d7e66d70b5e6724597dd697b4a7 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Tue, 5 Apr 2011 16:55:22 -0700 -Subject: [PATCH 141/149] OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomain - -Track current nominal voltage as part of struct voltagedomain instead -of omap_vdd_info, which will soon be removed. - -Also renames field from curr_volt to nominal_volt. - -No functional changes. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 5 ++--- - arch/arm/mach-omap2/voltage.c | 6 +----- - arch/arm/mach-omap2/voltage.h | 4 ++-- - 3 files changed, 5 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index e855559..3233c69 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -119,7 +119,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, - } - - *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); -- *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); -+ *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt); - - /* Setting the ON voltage to the new target voltage */ - vc_cmdval = voltdm->read(vc->cmdval_reg); -@@ -136,7 +136,6 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, - unsigned long target_volt, - u8 target_vsel, u8 current_vsel) - { -- struct omap_vdd_info *vdd = voltdm->vdd; - u32 smps_steps = 0, smps_delay = 0; - - smps_steps = abs(target_vsel - current_vsel); -@@ -145,7 +144,7 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, - voltdm->pmic->slew_rate) + 2; - udelay(smps_delay); - -- vdd->curr_volt = target_volt; -+ voltdm->nominal_volt = target_volt; - } - - /* vc_bypass_scale - VC bypass method of voltage scaling */ -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 7588480..29ab389 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -81,16 +81,12 @@ ovdc_out: - */ - unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) - { -- struct omap_vdd_info *vdd; -- - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return 0; - } - -- vdd = voltdm->vdd; -- -- return vdd->curr_volt; -+ return voltdm->nominal_volt; - } - - /** -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index e3efbf9..3e32eda 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -61,6 +61,7 @@ struct omap_vfsm_instance { - * @vdd: to be removed - * @pwrdms: powerdomains in this voltagedomain - * @scale: function used to scale the voltage of the voltagedomain -+ * @nominal_volt: current nominal voltage for this voltage domain - */ - struct voltagedomain { - char *name; -@@ -84,6 +85,7 @@ struct voltagedomain { - - int (*scale) (struct voltagedomain *voltdm, - unsigned long target_volt); -+ u32 nominal_volt; - - struct omap_vdd_info *vdd; - }; -@@ -144,11 +146,9 @@ struct omap_voltdm_pmic { - * - * @volt_data : voltage table having the distinct voltages supported - * by the domain and other associated per voltage data. -- * @curr_volt : current voltage for this vdd. - */ - struct omap_vdd_info { - struct omap_volt_data *volt_data; -- u32 curr_volt; - }; - - void omap_voltage_get_volttable(struct voltagedomain *voltdm, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch deleted file mode 100644 index e191c6f..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch +++ /dev/null @@ -1,282 +0,0 @@ -From e4cf1f9419b8613017296ee163acedb79dc2967b Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Thu, 14 Jul 2011 11:29:06 -0700 -Subject: [PATCH 142/149] OMAP3+: voltdm: final removal of omap_vdd_info - -Remove last remaining member (volt_data) from omap_vdd_info into -struct voltagedomain and removal remaining usage and reference to -omap_vdd_info. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/voltage.c | 54 ++++-------------------- - arch/arm/mach-omap2/voltage.h | 16 +------ - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 14 ++----- - arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 +----- - 4 files changed, 18 insertions(+), 81 deletions(-) - -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 29ab389..2e5528f 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -43,34 +43,6 @@ - - static LIST_HEAD(voltdm_list); - --static int __init _config_common_vdd_data(struct voltagedomain *voltdm) --{ -- /* Generic voltage parameters */ -- voltdm->scale = omap_vp_forceupdate_scale; -- -- return 0; --} -- --static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) --{ -- int ret = -EINVAL; -- -- if (!voltdm->pmic) { -- pr_err("%s: PMIC info requried to configure vdd_%s not" -- "populated.Hence cannot initialize vdd_%s\n", -- __func__, voltdm->name, voltdm->name); -- goto ovdc_out; -- } -- -- if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) -- goto ovdc_out; -- -- ret = 0; -- --ovdc_out: -- return ret; --} -- - /* Public functions */ - /** - * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage -@@ -155,18 +127,14 @@ void voltdm_reset(struct voltagedomain *voltdm) - * - */ - void omap_voltage_get_volttable(struct voltagedomain *voltdm, -- struct omap_volt_data **volt_data) -+ struct omap_volt_data **volt_data) - { -- struct omap_vdd_info *vdd; -- - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return; - } - -- vdd = voltdm->vdd; -- -- *volt_data = vdd->volt_data; -+ *volt_data = voltdm->volt_data; - } - - /** -@@ -185,9 +153,8 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, - * domain or if there is no matching entry. - */ - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, -- unsigned long volt) -+ unsigned long volt) - { -- struct omap_vdd_info *vdd; - int i; - - if (!voltdm || IS_ERR(voltdm)) { -@@ -195,17 +162,15 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, - return ERR_PTR(-EINVAL); - } - -- vdd = voltdm->vdd; -- -- if (!vdd->volt_data) { -+ if (!voltdm->volt_data) { - pr_warning("%s: voltage table does not exist for vdd_%s\n", - __func__, voltdm->name); - return ERR_PTR(-ENODATA); - } - -- for (i = 0; vdd->volt_data[i].volt_nominal != 0; i++) { -- if (vdd->volt_data[i].volt_nominal == volt) -- return &vdd->volt_data[i]; -+ for (i = 0; voltdm->volt_data[i].volt_nominal != 0; i++) { -+ if (voltdm->volt_data[i].volt_nominal == volt) -+ return &voltdm->volt_data[i]; - } - - pr_notice("%s: Unable to match the current voltage with the voltage" -@@ -304,9 +269,8 @@ int __init omap_voltage_late_init(void) - omap_vc_init_channel(voltdm); - } - -- if (voltdm->vdd) { -- if (omap_vdd_data_configure(voltdm)) -- continue; -+ if (voltdm->vp) { -+ voltdm->scale = omap_vp_forceupdate_scale; - omap_vp_init(voltdm); - } - } -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 3e32eda..68b1ed5 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -33,8 +33,6 @@ struct powerdomain; - #define OMAP3_VOLTOFFSET 0xff - #define OMAP3_VOLTSETUP2 0xff - --struct omap_vdd_info; -- - /** - * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield - * data -@@ -85,9 +83,9 @@ struct voltagedomain { - - int (*scale) (struct voltagedomain *voltdm, - unsigned long target_volt); -- u32 nominal_volt; - -- struct omap_vdd_info *vdd; -+ u32 nominal_volt; -+ struct omap_volt_data *volt_data; - }; - - /** -@@ -141,16 +139,6 @@ struct omap_voltdm_pmic { - u8 (*uv_to_vsel) (unsigned long uV); - }; - --/** -- * omap_vdd_info - Per Voltage Domain info -- * -- * @volt_data : voltage table having the distinct voltages supported -- * by the domain and other associated per voltage data. -- */ --struct omap_vdd_info { -- struct omap_volt_data *volt_data; --}; -- - void omap_voltage_get_volttable(struct voltagedomain *voltdm, - struct omap_volt_data **volt_data); - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -index e7a0be1..b0d0ae1 100644 ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c -@@ -37,16 +37,12 @@ static const struct omap_vfsm_instance omap3_vdd1_vfsm = { - .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, - }; - --static struct omap_vdd_info omap3_vdd1_info; -- - static const struct omap_vfsm_instance omap3_vdd2_vfsm = { - .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, - .voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT, - .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, - }; - --static struct omap_vdd_info omap3_vdd2_info; -- - static struct voltagedomain omap3_voltdm_mpu = { - .name = "mpu_iva", - .scalable = true, -@@ -56,7 +52,6 @@ static struct voltagedomain omap3_voltdm_mpu = { - .vc = &omap3_vc_mpu, - .vfsm = &omap3_vdd1_vfsm, - .vp = &omap3_vp_mpu, -- .vdd = &omap3_vdd1_info, - }; - - static struct voltagedomain omap3_voltdm_core = { -@@ -68,7 +63,6 @@ static struct voltagedomain omap3_voltdm_core = { - .vc = &omap3_vc_core, - .vfsm = &omap3_vdd2_vfsm, - .vp = &omap3_vp_core, -- .vdd = &omap3_vdd2_info, - }; - - static struct voltagedomain omap3_voltdm_wkup = { -@@ -94,11 +88,11 @@ void __init omap3xxx_voltagedomains_init(void) - * for the currently-running IC - */ - if (cpu_is_omap3630()) { -- omap3_vdd1_info.volt_data = omap36xx_vddmpu_volt_data; -- omap3_vdd2_info.volt_data = omap36xx_vddcore_volt_data; -+ omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; -+ omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; - } else { -- omap3_vdd1_info.volt_data = omap34xx_vddmpu_volt_data; -- omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; -+ omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; -+ omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; - } - - for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c -index 9c20fbb..c4584e9 100644 ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c -@@ -36,20 +36,14 @@ static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, - }; - --static struct omap_vdd_info omap4_vdd_mpu_info; -- - static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, - }; - --static struct omap_vdd_info omap4_vdd_iva_info; -- - static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, - }; - --static struct omap_vdd_info omap4_vdd_core_info; -- - static struct voltagedomain omap4_voltdm_mpu = { - .name = "mpu", - .scalable = true, -@@ -59,7 +53,6 @@ static struct voltagedomain omap4_voltdm_mpu = { - .vc = &omap4_vc_mpu, - .vfsm = &omap4_vdd_mpu_vfsm, - .vp = &omap4_vp_mpu, -- .vdd = &omap4_vdd_mpu_info, - }; - - static struct voltagedomain omap4_voltdm_iva = { -@@ -71,7 +64,6 @@ static struct voltagedomain omap4_voltdm_iva = { - .vc = &omap4_vc_iva, - .vfsm = &omap4_vdd_iva_vfsm, - .vp = &omap4_vp_iva, -- .vdd = &omap4_vdd_iva_info, - }; - - static struct voltagedomain omap4_voltdm_core = { -@@ -83,7 +75,6 @@ static struct voltagedomain omap4_voltdm_core = { - .vc = &omap4_vc_core, - .vfsm = &omap4_vdd_core_vfsm, - .vp = &omap4_vp_core, -- .vdd = &omap4_vdd_core_info, - }; - - static struct voltagedomain omap4_voltdm_wkup = { -@@ -109,9 +100,9 @@ void __init omap44xx_voltagedomains_init(void) - * XXX Will depend on the process, validation, and binning - * for the currently-running IC - */ -- omap4_vdd_mpu_info.volt_data = omap44xx_vdd_mpu_volt_data; -- omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; -- omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; -+ omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; -+ omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; -+ omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; - - for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) - voltdm->sys_clk.name = sys_clk_name; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch deleted file mode 100644 index c65ead9..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch +++ /dev/null @@ -1,91 +0,0 @@ -From da00ff6be37578f4c1adbe5c7dd28844073f7873 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Fri, 15 Jul 2011 16:05:12 -0700 -Subject: [PATCH 143/149] OMAP3+: voltage: rename omap_voltage_get_nom_volt -> voltdm_get_voltage - -Use preferred voltdm_ naming for getting current nominal voltage. - -No functional changes. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/smartreflex-class3.c | 2 +- - arch/arm/mach-omap2/voltage.c | 14 ++++++++------ - arch/arm/mach-omap2/voltage.h | 2 +- - 3 files changed, 10 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c -index 4eac1bc..53d9d0a 100644 ---- a/arch/arm/mach-omap2/smartreflex-class3.c -+++ b/arch/arm/mach-omap2/smartreflex-class3.c -@@ -15,7 +15,7 @@ - - static int sr_class3_enable(struct voltagedomain *voltdm) - { -- unsigned long volt = omap_voltage_get_nom_volt(voltdm); -+ unsigned long volt = voltdm_get_voltage(voltdm); - - if (!volt) { - pr_warning("%s: Curr voltage unknown. Cannot enable sr_%s\n", -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 2e5528f..031f6bf 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -45,13 +45,13 @@ static LIST_HEAD(voltdm_list); - - /* Public functions */ - /** -- * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage -- * @voltdm: pointer to the VDD for which current voltage info is needed -+ * voltdm_get_voltage() - Gets the current non-auto-compensated voltage -+ * @voltdm: pointer to the voltdm for which current voltage info is needed - * -- * API to get the current non-auto-compensated voltage for a VDD. -- * Returns 0 in case of error else returns the current voltage for the VDD. -+ * API to get the current non-auto-compensated voltage for a voltage domain. -+ * Returns 0 in case of error else returns the current voltage. - */ --unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) -+unsigned long voltdm_get_voltage(struct voltagedomain *voltdm) - { - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); -@@ -72,6 +72,8 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) - int voltdm_scale(struct voltagedomain *voltdm, - unsigned long target_volt) - { -+ int ret; -+ - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return -EINVAL; -@@ -104,7 +106,7 @@ void voltdm_reset(struct voltagedomain *voltdm) - return; - } - -- target_volt = omap_voltage_get_nom_volt(voltdm); -+ target_volt = voltdm_get_voltage(voltdm); - if (!target_volt) { - pr_err("%s: unable to find current voltage for vdd_%s\n", - __func__, voltdm->name); -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h -index 68b1ed5..b4c6259 100644 ---- a/arch/arm/mach-omap2/voltage.h -+++ b/arch/arm/mach-omap2/voltage.h -@@ -143,7 +143,6 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, - struct omap_volt_data **volt_data); - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, - unsigned long volt); --unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); - #ifdef CONFIG_PM - int omap_voltage_register_pmic(struct voltagedomain *voltdm, - struct omap_voltdm_pmic *pmic); -@@ -178,4 +177,5 @@ int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, - struct powerdomain *pwrdm)); - int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); - void voltdm_reset(struct voltagedomain *voltdm); -+unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); - #endif --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch deleted file mode 100644 index 63ecb27..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 5bd4a2cb8354937390805ed248235670cf229935 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Mon, 18 Jul 2011 16:24:17 -0700 -Subject: [PATCH 144/149] OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scale - -Currently, the nominal voltage is updated in the VC post-scale function -which is common to both scaling methods. However, this has readabiliy -problems as this update is not where it might be expected. Instead, move -the updated into voltdm_scale() upon a successful return of voltdm->scale() - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/mach-omap2/vc.c | 2 -- - arch/arm/mach-omap2/voltage.c | 6 +++++- - 2 files changed, 5 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c -index 3233c69..16fa912 100644 ---- a/arch/arm/mach-omap2/vc.c -+++ b/arch/arm/mach-omap2/vc.c -@@ -143,8 +143,6 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, - smps_delay = ((smps_steps * voltdm->pmic->step_size) / - voltdm->pmic->slew_rate) + 2; - udelay(smps_delay); -- -- voltdm->nominal_volt = target_volt; - } - - /* vc_bypass_scale - VC bypass method of voltage scaling */ -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c -index 031f6bf..cebc8b1 100644 ---- a/arch/arm/mach-omap2/voltage.c -+++ b/arch/arm/mach-omap2/voltage.c -@@ -85,7 +85,11 @@ int voltdm_scale(struct voltagedomain *voltdm, - return -ENODATA; - } - -- return voltdm->scale(voltdm, target_volt); -+ ret = voltdm->scale(voltdm, target_volt); -+ if (!ret) -+ voltdm->nominal_volt = target_volt; -+ -+ return ret; - } - - /** --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch deleted file mode 100644 index e114b6c..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 8ec7a1410e7ad5a4027deabc8025b5c7291c7579 Mon Sep 17 00:00:00 2001 -From: Patrick Titiano <p-titiano@ti.com> -Date: Wed, 18 May 2011 00:17:30 -0500 -Subject: [PATCH 145/149] OMAP4: PM: TWL6030: fix voltage conversion formula - -omap_twl_vsel_to_uv() and omap_twl_uv_to_vsel() functions used to convert -voltages to TWL6030 SMPS commands (a.k.a "vsel") implement incorrect conversion -formula. -It uses legacy OMAP3 formula, but OMAP4 Power IC has different offset and -voltage step: - - Voltage Step is now 12.66mV (instead of 12.5mV) - - Offset is either 607.7mV or 709mV depending on TWL6030 chip revision - (instead of 600mV) -This leads to setting voltages potentially higher than expected, and so -potentially some (limited) power overconsumption. - -For reference, see formula and tables in section 8.5.2.3 -"Output Voltage Selection (Standard Mode / Extended Mode with or without offset)" - in TWL6030 functional specifications document. - -[nm@ti.com: ported to voltdm_c] -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Patrick Titiano <p-titiano@ti.com> ---- - arch/arm/mach-omap2/omap_twl.c | 14 +++++++------- - 1 files changed, 7 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index 6b247d1..a66bf6b 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -106,9 +106,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) - return 1350000; - - if (smps_offset & 0x8) -- return ((((vsel - 1) * 125) + 7000)) * 100; -+ return ((((vsel - 1) * 1266) + 70900)) * 10; - else -- return ((((vsel - 1) * 125) + 6000)) * 100; -+ return ((((vsel - 1) * 1266) + 60770)) * 10; - } - - static u8 twl6030_uv_to_vsel(unsigned long uv) -@@ -138,9 +138,9 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) - return 0x3A; - - if (smps_offset & 0x8) -- return DIV_ROUND_UP(uv - 700000, 12500) + 1; -+ return DIV_ROUND_UP(uv - 709000, 12660) + 1; - else -- return DIV_ROUND_UP(uv - 600000, 12500) + 1; -+ return DIV_ROUND_UP(uv - 607700, 12660) + 1; - } - - static struct omap_voltdm_pmic omap3_mpu_pmic = { -@@ -187,7 +187,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = { - - static struct omap_voltdm_pmic omap4_mpu_pmic = { - .slew_rate = 4000, -- .step_size = 12500, -+ .step_size = 12660, - .on_volt = 1350000, - .onlp_volt = 1350000, - .ret_volt = 837500, -@@ -208,7 +208,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { - - static struct omap_voltdm_pmic omap4_iva_pmic = { - .slew_rate = 4000, -- .step_size = 12500, -+ .step_size = 12660, - .on_volt = 1100000, - .onlp_volt = 1100000, - .ret_volt = 837500, -@@ -229,7 +229,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { - - static struct omap_voltdm_pmic omap4_core_pmic = { - .slew_rate = 4000, -- .step_size = 12500, -+ .step_size = 12660, - .on_volt = 1100000, - .onlp_volt = 1100000, - .ret_volt = 837500, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch deleted file mode 100644 index 4f3851e..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch +++ /dev/null @@ -1,37 +0,0 @@ -From bfc31f950af6d9e8eb59ffeb80b3ba39ef98a943 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 18 May 2011 00:17:31 -0500 -Subject: [PATCH 146/149] OMAP4: PM: TWL6030: fix uv to voltage for >0x39 - -using 1.35V as a check is not correct, we know that beyond 0x39, -voltages are non linear - hence use the conversion iff uV greater -than that for 0x39. For example, with 709mV as the smps offset, -the max linear is actually 1.41V(0x39vsel)! - -Signed-off-by: Nishanth Menon <nm@ti.com> ---- - arch/arm/mach-omap2/omap_twl.c | 7 ++++++- - 1 files changed, 6 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index a66bf6b..5def7c2 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -134,8 +134,13 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) - * hardcoding only for 1.35 V which is used for 1GH OPP for - * OMAP4430. - */ -- if (uv == 1350000) -+ if (uv > twl6030_vsel_to_uv(0x39)) { -+ if (uv == 1350000) -+ return 0x3A; -+ pr_err("%s:OUT OF RANGE! non mapped vsel for %ld Vs max %ld\n", -+ __func__, uv, twl6030_vsel_to_uv(0x39)); - return 0x3A; -+ } - - if (smps_offset & 0x8) - return DIV_ROUND_UP(uv - 709000, 12660) + 1; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch deleted file mode 100644 index 5456fee..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch +++ /dev/null @@ -1,38 +0,0 @@ -From ccac5e6430353118ac7b9c46493e8cdf12114bf1 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 18 May 2011 00:17:32 -0500 -Subject: [PATCH 147/149] OMAP4: PM: TWL6030: address 0V conversions - -0V conversions should be mapped to 0 as it is meant to denote -off voltages. - -Signed-off-by: Nishanth Menon <nm@ti.com> ---- - arch/arm/mach-omap2/omap_twl.c | 4 ++++ - 1 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index 5def7c2..b30adf3 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -95,6 +95,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) - is_offset_valid = true; - } - -+ if (!vsel) -+ return 0; - /* - * There is no specific formula for voltage to vsel - * conversion above 1.3V. There are special hardcoded -@@ -127,6 +129,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) - is_offset_valid = true; - } - -+ if (!uv) -+ return 0x00; - /* - * There is no specific formula for voltage to vsel - * conversion above 1.3V. There are special hardcoded --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch deleted file mode 100644 index 64dd7cb..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch +++ /dev/null @@ -1,71 +0,0 @@ -From 884d61bd127d9e46f6b31c24c5109ba9bc7a3730 Mon Sep 17 00:00:00 2001 -From: Patrick Titiano <p-titiano@ti.com> -Date: Wed, 18 May 2011 00:17:33 -0500 -Subject: [PATCH 148/149] OMAP4: PM: TWL6030: fix ON/RET/OFF voltages - -According to latest OMAP4430 Data Manual v0.4 dated March 2011: - - Retention voltage shall be set to 0.83V. See tables 2.2, 2.4 and 2.6 in DM. - This allows saving a little more power in retention states. - - OPP100 IVA nominal voltage is 1.188V. See table 2.4 in DM. - This allows saving a little power when CPU wakes up until Smart-Reflex is - not yet resumed. - -[nm@ti.com: ported to voltdm_c] -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Patrick Titiano <p-titiano@ti.com> ---- - arch/arm/mach-omap2/omap_twl.c | 24 ++++++++++++------------ - 1 files changed, 12 insertions(+), 12 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index b30adf3..4bc99fb 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -197,10 +197,10 @@ static struct omap_voltdm_pmic omap3_core_pmic = { - static struct omap_voltdm_pmic omap4_mpu_pmic = { - .slew_rate = 4000, - .step_size = 12660, -- .on_volt = 1350000, -- .onlp_volt = 1350000, -- .ret_volt = 837500, -- .off_volt = 600000, -+ .on_volt = 1375000, -+ .onlp_volt = 1375000, -+ .ret_volt = 830000, -+ .off_volt = 0, - .volt_setup_time = 0, - .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, - .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, -@@ -218,10 +218,10 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { - static struct omap_voltdm_pmic omap4_iva_pmic = { - .slew_rate = 4000, - .step_size = 12660, -- .on_volt = 1100000, -- .onlp_volt = 1100000, -- .ret_volt = 837500, -- .off_volt = 600000, -+ .on_volt = 1188000, -+ .onlp_volt = 1188000, -+ .ret_volt = 830000, -+ .off_volt = 0, - .volt_setup_time = 0, - .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, - .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, -@@ -239,10 +239,10 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { - static struct omap_voltdm_pmic omap4_core_pmic = { - .slew_rate = 4000, - .step_size = 12660, -- .on_volt = 1100000, -- .onlp_volt = 1100000, -- .ret_volt = 837500, -- .off_volt = 600000, -+ .on_volt = 1200000, -+ .onlp_volt = 1200000, -+ .ret_volt = 830000, -+ .off_volt = 0, - .volt_setup_time = 0, - .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, - .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch deleted file mode 100644 index 78829a6..0000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 478e5300d4eb33cdebd393d634304a83833bc4d4 Mon Sep 17 00:00:00 2001 -From: Nishanth Menon <nm@ti.com> -Date: Wed, 18 May 2011 00:17:34 -0500 -Subject: [PATCH 149/149] OMAP4: PM: TWL6030: add cmd register - -Without the command register, ON/ONLP/RET/OFF voltages are -useless. and TWL will be unable to use these - -Signed-off-by: Nishanth Menon <nm@ti.com> ---- - arch/arm/mach-omap2/omap_twl.c | 6 ++++++ - 1 files changed, 6 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c -index 4bc99fb..f515a1a 100644 ---- a/arch/arm/mach-omap2/omap_twl.c -+++ b/arch/arm/mach-omap2/omap_twl.c -@@ -42,8 +42,11 @@ - - #define OMAP4_SRI2C_SLAVE_ADDR 0x12 - #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 -+#define OMAP4_VDD_MPU_SR_CMD_REG 0x56 - #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B -+#define OMAP4_VDD_IVA_SR_CMD_REG 0x5C - #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 -+#define OMAP4_VDD_CORE_SR_CMD_REG 0x62 - - #define OMAP4_VP_CONFIG_ERROROFFSET 0x00 - #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 -@@ -210,6 +213,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, - .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, -+ .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, - .i2c_high_speed = true, - .vsel_to_uv = twl6030_vsel_to_uv, - .uv_to_vsel = twl6030_uv_to_vsel, -@@ -231,6 +235,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, - .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, -+ .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, - .i2c_high_speed = true, - .vsel_to_uv = twl6030_vsel_to_uv, - .uv_to_vsel = twl6030_uv_to_vsel, -@@ -252,6 +257,7 @@ static struct omap_voltdm_pmic omap4_core_pmic = { - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, - .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, -+ .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, - .vsel_to_uv = twl6030_vsel_to_uv, - .uv_to_vsel = twl6030_uv_to_vsel, - }; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch b/recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch deleted file mode 100644 index 8c1faba..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch +++ /dev/null @@ -1,28 +0,0 @@ -From cc8c276d530520ce822a1d0e8d748f7b9e54a2d5 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Mon, 4 Jan 2010 19:20:25 -0800 -Subject: [PATCH 01/14] mmc: don't display single block read console messages - -mmc: don't display single block read console messages ---- - drivers/mmc/card/block.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c -index f85e422..0025735 100644 ---- a/drivers/mmc/card/block.c -+++ b/drivers/mmc/card/block.c -@@ -812,8 +812,8 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *req) - brq.data.error || brq.stop.error) { - if (brq.data.blocks > 1 && rq_data_dir(req) == READ) { - /* Redo read one sector at a time */ -- printk(KERN_WARNING "%s: retrying using single " -- "block read\n", req->rq_disk->disk_name); -+ /* printk(KERN_WARNING "%s: retrying using single " -+ "block read\n", req->rq_disk->disk_name); */ - disable_multi = 1; - continue; - } --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0002-omap-Change-omap_device-activate-dectivate-latency-m.patch b/recipes-kernel/linux/linux-3.0/sakoman/0002-omap-Change-omap_device-activate-dectivate-latency-m.patch deleted file mode 100644 index 54305bd..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0002-omap-Change-omap_device-activate-dectivate-latency-m.patch +++ /dev/null @@ -1,49 +0,0 @@ -From a2e59d4041e8c42e21d90c0696ea8437a0cfc866 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Mon, 23 May 2011 12:16:50 -0700 -Subject: [PATCH 02/14] omap: Change omap_device activate/dectivate latency messages from pr_warning to pr_debug - -Messages can be safely ignored, so reduce console noise - -Signed-off-by: Steve Sakoman <steve@sakoman.com> ---- - arch/arm/plat-omap/omap_device.c | 8 ++++---- - 1 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c -index be45147..e3d9520 100644 ---- a/arch/arm/plat-omap/omap_device.c -+++ b/arch/arm/plat-omap/omap_device.c -@@ -146,12 +146,12 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) - odpl->activate_lat_worst = act_lat; - if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { - odpl->activate_lat = act_lat; -- pr_warning("omap_device: %s.%d: new worst case " -+ pr_debug("omap_device: %s.%d: new worst case " - "activate latency %d: %llu\n", - od->pdev.name, od->pdev.id, - od->pm_lat_level, act_lat); - } else -- pr_warning("omap_device: %s.%d: activate " -+ pr_debug("omap_device: %s.%d: activate " - "latency %d higher than exptected. " - "(%llu > %d)\n", - od->pdev.name, od->pdev.id, -@@ -214,12 +214,12 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) - odpl->deactivate_lat_worst = deact_lat; - if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { - odpl->deactivate_lat = deact_lat; -- pr_warning("omap_device: %s.%d: new worst case " -+ pr_debug("omap_device: %s.%d: new worst case " - "deactivate latency %d: %llu\n", - od->pdev.name, od->pdev.id, - od->pm_lat_level, deact_lat); - } else -- pr_warning("omap_device: %s.%d: deactivate " -+ pr_debug("omap_device: %s.%d: deactivate " - "latency %d higher than exptected. " - "(%llu > %d)\n", - od->pdev.name, od->pdev.id, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch b/recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch deleted file mode 100644 index 4356287..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 630557c2785955cc0abbe4bf29b22f703a404e02 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Tue, 19 Jan 2010 21:19:15 -0800 -Subject: [PATCH 03/14] OMAP: DSS2: add bootarg for selecting svideo or composite for tv output - -also add pal-16 and ntsc-16 omapfb.mode settings for 16bpp ---- - drivers/video/omap2/dss/venc.c | 22 ++++++++++++++++++++++ - drivers/video/omap2/omapfb/omapfb-main.c | 10 +++++++++- - 2 files changed, 31 insertions(+), 1 deletions(-) - -diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c -index 980f919..4fb594d 100644 ---- a/drivers/video/omap2/dss/venc.c -+++ b/drivers/video/omap2/dss/venc.c -@@ -85,6 +85,11 @@ - #define VENC_OUTPUT_TEST 0xC8 - #define VENC_DAC_B__DAC_C 0xC8 - -+static char *tv_connection; -+ -+module_param_named(tvcable, tv_connection, charp, 0); -+MODULE_PARM_DESC(tvcable, "TV connection type (svideo, composite)"); -+ - struct venc_config { - u32 f_control; - u32 vidout_ctrl; -@@ -461,6 +466,23 @@ static int venc_panel_probe(struct omap_dss_device *dssdev) - { - dssdev->panel.timings = omap_dss_pal_timings; - -+ /* Allow the TV output to be overriden */ -+ if (tv_connection) { -+ if (strcmp(tv_connection, "svideo") == 0) { -+ printk(KERN_INFO -+ "omapdss: tv output is svideo.\n"); -+ dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO; -+ } else if (strcmp(tv_connection, "composite") == 0) { -+ printk(KERN_INFO -+ "omapdss: tv output is composite.\n"); -+ dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE; -+ } else { -+ printk(KERN_INFO -+ "omapdss: unsupported output type'%s'.\n", -+ tv_connection); -+ } -+ } -+ - return 0; - } - -diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c -index 505bc12..c35c1f8 100644 ---- a/drivers/video/omap2/omapfb/omapfb-main.c -+++ b/drivers/video/omap2/omapfb/omapfb-main.c -@@ -2002,7 +2002,15 @@ static int omapfb_mode_to_timings(const char *mode_str, - int r; - - #ifdef CONFIG_OMAP2_DSS_VENC -- if (strcmp(mode_str, "pal") == 0) { -+ if (strcmp(mode_str, "pal-16") == 0) { -+ *timings = omap_dss_pal_timings; -+ *bpp = 16; -+ return 0; -+ } else if (strcmp(mode_str, "ntsc-16") == 0) { -+ *timings = omap_dss_ntsc_timings; -+ *bpp = 16; -+ return 0; -+ } else if (strcmp(mode_str, "pal") == 0) { - *timings = omap_dss_pal_timings; - *bpp = 24; - return 0; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error-messag.patch b/recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error-messag.patch deleted file mode 100644 index 94d629b..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error-messag.patch +++ /dev/null @@ -1,28 +0,0 @@ -From bf974dd3f24e623f04422b8013d047d78d430f0e Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Fri, 1 Jul 2011 10:00:03 -0700 -Subject: [PATCH 04/14] mtd: nand: Eliminate noisey "uncorrectable error" messages - -Other layers of the stack give more informative messages when __nand_correct_data() fails - -Signed-off-by: Steve Sakoman <steve@sakoman.com> ---- - drivers/mtd/nand/nand_ecc.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c -index 271b8e7..ad55e55 100644 ---- a/drivers/mtd/nand/nand_ecc.c -+++ b/drivers/mtd/nand/nand_ecc.c -@@ -507,7 +507,7 @@ int __nand_correct_data(unsigned char *buf, - if ((bitsperbyte[b0] + bitsperbyte[b1] + bitsperbyte[b2]) == 1) - return 1; /* error in ecc data; no action needed */ - -- printk(KERN_ERR "uncorrectable error : "); -+ // printk(KERN_ERR "uncorrectable error : "); - return -1; - } - EXPORT_SYMBOL(__nand_correct_data); --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add-timings-for-hd720.patch b/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add-timings-for-hd720.patch deleted file mode 100644 index 2b474d6..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add-timings-for-hd720.patch +++ /dev/null @@ -1,27 +0,0 @@ -From fbc33b30b663ec8c0d4374ba08f0608a7cc4b977 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Sat, 19 Dec 2009 06:52:43 -0800 -Subject: [PATCH 05/14] video: add timings for hd720 - ---- - drivers/video/modedb.c | 4 ++++ - 1 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c -index cb175fe..9baead4 100644 ---- a/drivers/video/modedb.c -+++ b/drivers/video/modedb.c -@@ -103,6 +103,10 @@ static const struct fb_videomode modedb[] = { - { NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, 0, - FB_VMODE_NONINTERLACED }, - -+ /* 1280x720 @ 60 Hz, 45 kHz hsync, CEA 681-E Format 4 */ -+ { "hd720", 60, 1280, 720, 13468, 220, 110, 20, 5, 40, 5, 0, -+ FB_VMODE_NONINTERLACED }, -+ - /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ - { NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, 0, - FB_VMODE_INTERLACED }, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch b/recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch deleted file mode 100644 index b8fdba2..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 948bbae38457af6a11232375f9d95fc69641e9f4 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <sakoman@gmail.com> -Date: Tue, 15 Dec 2009 15:17:44 -0800 -Subject: [PATCH 06/14] drivers: net: smsc911x: return ENODEV if device is not found - -Signed-off-by: Steve Sakoman <sakoman@gmail.com> ---- - drivers/net/smsc911x.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c -index c6d47d1..0c7c4a2 100644 ---- a/drivers/net/smsc911x.c -+++ b/drivers/net/smsc911x.c -@@ -2169,8 +2169,10 @@ static int __devinit smsc911x_drv_probe(struct platform_device *pdev) - pdata->ops = &shifted_smsc911x_ops; - - retval = smsc911x_init(dev); -- if (retval < 0) -+ if (retval < 0) { -+ retval = -ENODEV; - goto out_unmap_io_3; -+ } - - /* configure irq polarity and type before connecting isr */ - if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch b/recipes-kernel/linux/linux-3.0/sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch deleted file mode 100644 index 158c0ad..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 34f40fe736113c2066bf86ca163a4aff8b6d061f Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <sakoman@gmail.com> -Date: Tue, 15 Dec 2009 15:24:10 -0800 -Subject: [PATCH 07/14] drivers: input: touchscreen: ads7846: return ENODEV if device is not found - -Signed-off-by: Steve Sakoman <sakoman@gmail.com> ---- - drivers/input/touchscreen/ads7846.c | 13 ++++++++++--- - 1 files changed, 10 insertions(+), 3 deletions(-) - -diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c -index 5196861..b0bd1ba 100644 ---- a/drivers/input/touchscreen/ads7846.c -+++ b/drivers/input/touchscreen/ads7846.c -@@ -1349,9 +1349,16 @@ static int __devinit ads7846_probe(struct spi_device *spi) - * the touchscreen, in case it's not connected. - */ - if (ts->model == 7845) -- ads7845_read12_ser(&spi->dev, PWRDOWN); -+ err = ads7845_read12_ser(&spi->dev, PWRDOWN); - else -- (void) ads7846_read12_ser(&spi->dev, READ_12BIT_SER(vaux)); -+ err = ads7846_read12_ser(&spi->dev, READ_12BIT_SER(vaux)); -+ -+ /* if sample is all 0's or all 1's then there is no device on spi */ -+ if ( (err == 0x000) || (err == 0xfff)) { -+ dev_info(&spi->dev, "no device detected, test read result was 0x%08X\n", err); -+ err = -ENODEV; -+ goto err_free_irq; -+ } - - err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group); - if (err) -@@ -1376,7 +1383,7 @@ static int __devinit ads7846_probe(struct spi_device *spi) - err_put_regulator: - regulator_put(ts->reg); - err_free_gpio: -- if (!ts->get_pendown_state) -+ if (!ts->get_pendown_state && ts->gpio_pendown != -1) - gpio_free(ts->gpio_pendown); - err_cleanup_filter: - if (ts->filter_cleanup) --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch b/recipes-kernel/linux/linux-3.0/sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch deleted file mode 100644 index 8058b5c..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch +++ /dev/null @@ -1,27 +0,0 @@ -From baf40f002836b7c0fe9aeeba92ba483f6e9d2384 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 3 Mar 2011 13:29:30 -0800 -Subject: [PATCH 08/14] Revert "omap2_mcspi: Flush posted writes" - -This reverts commit a330ce2001b290c59fe98c37e981683ef0a75fdf. - -The above commit breaks the ads7846 driver ---- - drivers/spi/omap2_mcspi.c | 1 - - 1 files changed, 0 insertions(+), 1 deletions(-) - -diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c -index 969cdd2..da981ee 100644 ---- a/drivers/spi/omap2_mcspi.c -+++ b/drivers/spi/omap2_mcspi.c -@@ -195,7 +195,6 @@ static inline void mcspi_write_chconf0(const struct spi_device *spi, u32 val) - - cs->chconf0 = val; - mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, val); -- mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0); - } - - static void omap2_mcspi_set_dma_req(const struct spi_device *spi, --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in-interr.patch b/recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in-interr.patch deleted file mode 100644 index 220f974..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in-interr.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 3532a9ceb9eb81147eab751b8c124b59acc87374 Mon Sep 17 00:00:00 2001 -From: Todd Poynor <toddpoynor@google.com> -Date: Wed, 27 Jul 2011 07:07:20 +0000 -Subject: [PATCH 09/14] rtc: twl: Use threaded IRQ, remove IRQ enable in interrupt handler - -IRQs disabled on entry to twl_rtc_interrupt is not a consequence -of LOCKDEP; both twl6030 and twl4030 explicitly disable IRQs -before calling the module IRQ handlers. - -The ISR should not be enabling IRQs; use a threaded IRQ handler -instead. - -Also fixes warnings: - - WARNING: at kernel/irq/handle.c:130 handle_irq_event_percpu+nnn - irq nnn handler twl_rtc_interrupt+nnn enabled interrupts - -Signed-off-by: Todd Poynor <toddpoynor@google.com> ---- - drivers/rtc/rtc-twl.c | 14 +++----------- - 1 files changed, 3 insertions(+), 11 deletions(-) - -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c -index f9a2799..3fee95e 100644 ---- a/drivers/rtc/rtc-twl.c -+++ b/drivers/rtc/rtc-twl.c -@@ -362,14 +362,6 @@ static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) - int res; - u8 rd_reg; - --#ifdef CONFIG_LOCKDEP -- /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which -- * we don't want and can't tolerate. Although it might be -- * friendlier not to borrow this thread context... -- */ -- local_irq_enable(); --#endif -- - res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); - if (res) - goto out; -@@ -462,9 +454,9 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) - if (ret < 0) - goto out1; - -- ret = request_irq(irq, twl_rtc_interrupt, -- IRQF_TRIGGER_RISING, -- dev_name(&rtc->dev), rtc); -+ ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, -+ IRQF_TRIGGER_RISING, -+ dev_name(&rtc->dev), rtc); - if (ret < 0) { - dev_err(&pdev->dev, "IRQ is not free.\n"); - goto out1; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch b/recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch deleted file mode 100644 index d710643..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 2cc62887b37d504df009d7241e6cebc3c65c32a5 Mon Sep 17 00:00:00 2001 -From: Todd Poynor <toddpoynor@google.com> -Date: Wed, 27 Jul 2011 07:07:21 +0000 -Subject: [PATCH 10/14] rtc: twl: Fix registration vs. init order - -Only register as an RTC device after the hardware has been -successfully initialized. The RTC class driver will call -back to this driver to read a pending alarm, and other -drivers watching for new devices on the RTC class may -read the RTC time upon registration. Such access might -occur while the RTC is stopped, prior to clearing -pending alarms, etc. - -The new ordering also avoids leaving the platform -device drvdata set to an unregistered struct rtc_device * -on probe errors. - -Signed-off-by: Todd Poynor <toddpoynor@google.com> ---- - drivers/rtc/rtc-twl.c | 52 ++++++++++++++++++++++-------------------------- - 1 files changed, 24 insertions(+), 28 deletions(-) - -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c -index 3fee95e..a64494e 100644 ---- a/drivers/rtc/rtc-twl.c -+++ b/drivers/rtc/rtc-twl.c -@@ -420,24 +420,12 @@ static struct rtc_class_ops twl_rtc_ops = { - static int __devinit twl_rtc_probe(struct platform_device *pdev) - { - struct rtc_device *rtc; -- int ret = 0; -+ int ret = -EINVAL; - int irq = platform_get_irq(pdev, 0); - u8 rd_reg; - - if (irq <= 0) -- return -EINVAL; -- -- rtc = rtc_device_register(pdev->name, -- &pdev->dev, &twl_rtc_ops, THIS_MODULE); -- if (IS_ERR(rtc)) { -- ret = PTR_ERR(rtc); -- dev_err(&pdev->dev, "can't register RTC device, err %ld\n", -- PTR_ERR(rtc)); -- goto out0; -- -- } -- -- platform_set_drvdata(pdev, rtc); -+ goto out1; - - ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); - if (ret < 0) -@@ -454,14 +442,6 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) - if (ret < 0) - goto out1; - -- ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, -- IRQF_TRIGGER_RISING, -- dev_name(&rtc->dev), rtc); -- if (ret < 0) { -- dev_err(&pdev->dev, "IRQ is not free.\n"); -- goto out1; -- } -- - if (twl_class_is_6030()) { - twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, - REG_INT_MSK_LINE_A); -@@ -472,28 +452,44 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) - /* Check RTC module status, Enable if it is off */ - ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); - if (ret < 0) -- goto out2; -+ goto out1; - - if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { - dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); - rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; - ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); - if (ret < 0) -- goto out2; -+ goto out1; - } - - /* init cached IRQ enable bits */ - ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); - if (ret < 0) -+ goto out1; -+ -+ rtc = rtc_device_register(pdev->name, -+ &pdev->dev, &twl_rtc_ops, THIS_MODULE); -+ if (IS_ERR(rtc)) { -+ ret = PTR_ERR(rtc); -+ dev_err(&pdev->dev, "can't register RTC device, err %ld\n", -+ PTR_ERR(rtc)); -+ goto out1; -+ } -+ -+ ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, -+ IRQF_TRIGGER_RISING, -+ dev_name(&rtc->dev), rtc); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "IRQ is not free.\n"); - goto out2; -+ } - -- return ret; -+ platform_set_drvdata(pdev, rtc); -+ return 0; - - out2: -- free_irq(irq, rtc); --out1: - rtc_device_unregister(rtc); --out0: -+out1: - return ret; - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch b/recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch deleted file mode 100644 index 4a903b2..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 76ab79b5491dd823477cd181b57795aa6b55f53c Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 12:45:20 -0800 -Subject: [PATCH 11/14] soc: codecs: Enable audio capture by default for twl4030 - ---- - sound/soc/codecs/twl4030.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c -index bec788b..158ea04 100644 ---- a/sound/soc/codecs/twl4030.c -+++ b/sound/soc/codecs/twl4030.c -@@ -55,8 +55,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { - 0x00, /* REG_OPTION (0x2) */ - 0x00, /* REG_UNKNOWN (0x3) */ - 0x00, /* REG_MICBIAS_CTL (0x4) */ -- 0x00, /* REG_ANAMICL (0x5) */ -- 0x00, /* REG_ANAMICR (0x6) */ -+ 0x34, /* REG_ANAMICL (0x5) */ -+ 0x14, /* REG_ANAMICR (0x6) */ - 0x00, /* REG_AVADC_CTL (0x7) */ - 0x00, /* REG_ADCMICSEL (0x8) */ - 0x00, /* REG_DIGMIXING (0x9) */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch b/recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch deleted file mode 100644 index 199a0f0..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 31ec83c7092588f41b69e024f0ddd585c1981094 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Wed, 29 Dec 2010 11:39:16 -0800 -Subject: [PATCH 12/14] soc: codecs: twl4030: Turn on mic bias by default - ---- - sound/soc/codecs/twl4030.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c -index 158ea04..9bbf301 100644 ---- a/sound/soc/codecs/twl4030.c -+++ b/sound/soc/codecs/twl4030.c -@@ -54,7 +54,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { - 0x00, /* REG_CODEC_MODE (0x1) */ - 0x00, /* REG_OPTION (0x2) */ - 0x00, /* REG_UNKNOWN (0x3) */ -- 0x00, /* REG_MICBIAS_CTL (0x4) */ -+ 0x03, /* REG_MICBIAS_CTL (0x4) */ - 0x34, /* REG_ANAMICL (0x5) */ - 0x14, /* REG_ANAMICR (0x6) */ - 0x00, /* REG_AVADC_CTL (0x7) */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior-to.patch b/recipes-kernel/linux/linux-3.0/sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior-to.patch deleted file mode 100644 index 016323d..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior-to.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 23d7e04b5d71feafdd920f4bf4b735cc452fef59 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Sun, 24 Jan 2010 09:33:56 -0800 -Subject: [PATCH 13/14] omap: mmc-twl4030: move clock input selection prior to vcc test - -otherwise it is not executed on systems that use non-twl regulators ---- - arch/arm/mach-omap2/hsmmc.c | 14 ++++++-------- - 1 files changed, 6 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c -index 66868c5..48a6cfb 100644 ---- a/arch/arm/mach-omap2/hsmmc.c -+++ b/arch/arm/mach-omap2/hsmmc.c -@@ -192,15 +192,13 @@ static void hsmmc23_before_set_reg(struct device *dev, int slot, - if (mmc->slots[0].remux) - mmc->slots[0].remux(dev, slot, power_on); - -- if (power_on) { -- /* Only MMC2 supports a CLKIN */ -- if (mmc->slots[0].internal_clock) { -- u32 reg; -+ /* Only MMC2 supports a CLKIN */ -+ if (mmc->slots[0].internal_clock) { -+ u32 reg; - -- reg = omap_ctrl_readl(control_devconf1_offset); -- reg |= OMAP2_MMCSDIO2ADPCLKISEL; -- omap_ctrl_writel(reg, control_devconf1_offset); -- } -+ reg = omap_ctrl_readl(control_devconf1_offset); -+ reg |= OMAP2_MMCSDIO2ADPCLKISEL; -+ omap_ctrl_writel(reg, control_devconf1_offset); - } - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch b/recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch deleted file mode 100644 index f44b3d0..0000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 55f8fd15557b03c2b336c8214d44de9753d0ba5f Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 4 Feb 2010 12:26:22 -0800 -Subject: [PATCH 14/14] rtc-twl: add support for backup battery recharge - ---- - drivers/rtc/rtc-twl.c | 27 ++++++++++++++++++++++++++- - 1 files changed, 26 insertions(+), 1 deletions(-) - -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c -index a64494e..552446b 100644 ---- a/drivers/rtc/rtc-twl.c -+++ b/drivers/rtc/rtc-twl.c -@@ -30,7 +30,24 @@ - - #include <linux/i2c/twl.h> - -- -+/* -+ * PM_RECEIVER block register offsets (use TWL4030_MODULE_PM_RECEIVER) -+ */ -+#define REG_BB_CFG 0x12 -+ -+/* PM_RECEIVER BB_CFG bitfields */ -+#define BIT_PM_RECEIVER_BB_CFG_BBCHEN 0x10 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL 0x0C -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_2V5 0x00 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V0 0x04 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 0x08 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3v2 0x0c -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL 0x03 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA 0x00 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_150UA 0x01 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_500UA 0x02 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_1MA 0x03 -+ - /* - * RTC block register offsets (use TWL_MODULE_RTC) - */ -@@ -484,6 +501,14 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) - goto out2; - } - -+ /* enable backup battery charging */ -+ /* use a conservative 25uA @ 3.1V */ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ BIT_PM_RECEIVER_BB_CFG_BBCHEN | -+ BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 | -+ BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA, -+ REG_BB_CFG); -+ - platform_set_drvdata(pdev, rtc); - return 0; - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch b/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch deleted file mode 100644 index 62217d2..0000000 --- a/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 867025d0468dedea5303d1088b292ace4d01c047 Mon Sep 17 00:00:00 2001 -From: Vikram Pandita <vikram.pandita@ti.com> -Date: Tue, 31 May 2011 09:24:58 +0100 -Subject: [PATCH] ARM: L2: Add and export outer_clean_all - -The Errata 588369 and 539766 demands that clean all operation be done -as clean each way at a time - -This patch also raps the implementation under the CONFIG errata -macro so that for non-errata version silicon it can be disabled - -Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> -Cc: Woodruff, Richard <r-woodruff2@ti.com> ---- - arch/arm/include/asm/outercache.h | 8 ++++++++ - arch/arm/mm/cache-l2x0.c | 1 + - 2 files changed, 9 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h -index d838743..fa8cbd8 100644 ---- a/arch/arm/include/asm/outercache.h -+++ b/arch/arm/include/asm/outercache.h -@@ -28,6 +28,7 @@ struct outer_cache_fns { - void (*clean_range)(unsigned long, unsigned long); - void (*flush_range)(unsigned long, unsigned long); - void (*flush_all)(void); -+ void (*clean_all)(void); - void (*inv_all)(void); - void (*disable)(void); - #ifdef CONFIG_OUTER_CACHE_SYNC -@@ -61,6 +62,11 @@ static inline void outer_flush_all(void) - if (outer_cache.flush_all) - outer_cache.flush_all(); - } -+static inline void outer_clean_all(void) -+{ -+ if (outer_cache.clean_all) -+ outer_cache.clean_all(); -+} - - static inline void outer_inv_all(void) - { -@@ -97,6 +103,8 @@ static inline void outer_sync(void) - #else - static inline void outer_sync(void) - { } -+static inline void outer_clean_all(void) -+{ } - #endif - - #endif /* __ASM_OUTERCACHE_H */ -diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c -index 44c0867..10b79d6 100644 ---- a/arch/arm/mm/cache-l2x0.c -+++ b/arch/arm/mm/cache-l2x0.c -@@ -346,6 +346,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) - outer_cache.inv_all = l2x0_inv_all; - outer_cache.disable = l2x0_disable; - outer_cache.set_debug = l2x0_set_debug; -+ outer_cache.clean_all = l2x0_clean_all; - - printk(KERN_INFO "%s cache controller enabled\n", type); - printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode-remo.patch b/recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode-remo.patch deleted file mode 100644 index 44bb6b8..0000000 --- a/recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode-remo.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 9e3cacdf6fb8c5d704c9fb98f744eddbb25e3cda Mon Sep 17 00:00:00 2001 -From: archit taneja <archit@ti.com> -Date: Fri, 5 Aug 2011 07:19:21 +0000 -Subject: [PATCH 1/4] OMAP_VOUT: Fix build break caused by update_mode removal in DSS2 - -The DSS2 driver does not support the configuration of the update_mode of a -panel anymore. Remove the setting of update_mode done in omap_vout_probe(). -Ignore configuration of TE since omap_vout driver doesn't support manual update -displays anyway. - -Signed-off-by: Archit Taneja <archit@ti.com> -Tested-by: Koen Kooi <koen@dominion.thruhere.net> -Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> ---- - drivers/media/video/omap/omap_vout.c | 13 ------------- - 1 files changed, 0 insertions(+), 13 deletions(-) - -diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c -index 4d07c58..d17d6b6 100644 ---- a/drivers/media/video/omap/omap_vout.c -+++ b/drivers/media/video/omap/omap_vout.c -@@ -2557,19 +2557,6 @@ static int __init omap_vout_probe(struct platform_device *pdev) - "'%s' Display already enabled\n", - def_display->name); - } -- /* set the update mode */ -- if (def_display->caps & -- OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { -- if (dssdrv->enable_te) -- dssdrv->enable_te(def_display, 0); -- if (dssdrv->set_update_mode) -- dssdrv->set_update_mode(def_display, -- OMAP_DSS_UPDATE_MANUAL); -- } else { -- if (dssdrv->set_update_mode) -- dssdrv->set_update_mode(def_display, -- OMAP_DSS_UPDATE_AUTO); -- } - } - } - --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch b/recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch deleted file mode 100644 index 1b3d1ff..0000000 --- a/recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch +++ /dev/null @@ -1,235 +0,0 @@ -From ba0b157d461f6b8fe61e232e92ea7ee656ad5ecb Mon Sep 17 00:00:00 2001 -From: Jason Kridner <jdk@ti.com> -Date: Mon, 12 Sep 2011 10:28:14 -0400 -Subject: [PATCH 2/4] WIP: omap: beagleboard: add bbtoys ulcd-lite support - -Added support for the BeagleBoardToys ULCD-Lite. -* Added ThreeFiveCorp s9700rtwv35tr-01b panel to - panel-generic-dpi driver. -* Added TSC2007 and LCD panel to board file. - -Relied heavily on the TSC2007 integration work done by -John Weber and panel timings from Roger Monk. - -Signed-off-by: Jason Kridner <jdk@ti.com> -Cc: John Weber <rjohnweber@gmail.com> -Cc: Roger Monk <r-monk@ti.com> -Cc: Joel A Fernandes <agnel.joel@gmail.com> -Cc: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 112 ++++++++++++++++++++++ - drivers/video/omap2/displays/panel-generic-dpi.c | 25 +++++ - 2 files changed, 137 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 0124060..8b30b4c 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -35,6 +35,7 @@ - #include <linux/i2c/twl.h> - #include <linux/netdevice.h> - #include <linux/if_ether.h> -+#include <linux/i2c/tsc2007.h> - - #include <mach/hardware.h> - #include <asm/mach-types.h> -@@ -87,11 +88,15 @@ static struct { - int usb_pwr_level; - int reset_gpio; - int usr_button_gpio; -+ char *lcd_driver_name; -+ int lcd_pwren; - } beagle_config = { - .mmc1_gpio_wp = -EINVAL, - .usb_pwr_level = GPIOF_OUT_INIT_LOW, - .reset_gpio = 129, - .usr_button_gpio = 4, -+ .lcd_driver_name = "", -+ .lcd_pwren = 156 - }; - - /* -@@ -471,9 +476,53 @@ static struct omap_dss_device beagle_tv_device = { - .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, - }; - -+static int beagle_enable_lcd(struct omap_dss_device *dssdev) -+{ -+ if (gpio_is_valid(beagle_config.lcd_pwren)) { -+ printk(KERN_INFO "%s: Enabling LCD\n", __FUNCTION__); -+ gpio_set_value(beagle_config.lcd_pwren, 0); -+ } else { -+ printk(KERN_INFO "%s: Invalid LCD enable GPIO: %d\n", -+ __FUNCTION__, beagle_config.lcd_pwren); -+ } -+ -+ return 0; -+} -+ -+static void beagle_disable_lcd(struct omap_dss_device *dssdev) -+{ -+ if (gpio_is_valid(beagle_config.lcd_pwren)) { -+ printk(KERN_INFO "%s: Disabling LCD\n", __FUNCTION__); -+ gpio_set_value(beagle_config.lcd_pwren, 1); -+ } else { -+ printk(KERN_INFO "%s: Invalid LCD enable GPIO: %d\n", -+ __FUNCTION__, beagle_config.lcd_pwren); -+ } -+ -+ return; -+} -+ -+static struct panel_generic_dpi_data lcd_panel = { -+ .name = "tfc_s9700rtwv35tr-01b", -+ .platform_enable = beagle_enable_lcd, -+ .platform_disable = beagle_disable_lcd, -+}; -+ -+static struct omap_dss_device beagle_lcd_device = { -+ .type = OMAP_DISPLAY_TYPE_DPI, -+ .name = "lcd", -+ .driver_name = "generic_dpi_panel", -+ .phy.dpi.data_lines = 24, -+ .platform_enable = beagle_enable_lcd, -+ .platform_disable = beagle_disable_lcd, -+ .reset_gpio = -EINVAL, -+ .data = &lcd_panel, -+}; -+ - static struct omap_dss_device *beagle_dss_devices[] = { - &beagle_dvi_device, - &beagle_tv_device, -+ &beagle_lcd_device, - }; - - static struct omap_dss_board_info beagle_dss_data = { -@@ -490,6 +539,11 @@ static void __init beagle_display_init(void) - "DVI reset"); - if (r < 0) - printk(KERN_ERR "Unable to get DVI reset GPIO\n"); -+ -+ r = gpio_request_one(beagle_config.lcd_pwren, GPIOF_OUT_INIT_LOW, -+ "LCD power"); -+ if (r < 0) -+ printk(KERN_ERR "Unable to get LCD power enable GPIO\n"); - } - - #include "sdram-micron-mt46h32m32lf-6.h" -@@ -648,6 +702,53 @@ static struct i2c_board_info __initdata beagle_i2c2_zippy[] = { - static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; - #endif - -+#if defined(CONFIG_INPUT_TOUCHSCREEN) && \ -+ defined(CONFIG_TOUCHSCREEN_TSC2007) -+/* Touchscreen */ -+#define OMAP3BEAGLE_TSC2007_GPIO 157 -+static int omap3beagle_tsc2007_get_pendown_state(void) -+{ -+ return !gpio_get_value(OMAP3BEAGLE_TSC2007_GPIO); -+} -+ -+static int omap3beagle_tsc2007_init(void) -+{ -+ int gpio = OMAP3BEAGLE_TSC2007_GPIO; -+ int ret = 0; -+ printk(KERN_WARNING "TSC2007_init started"); -+ ret = gpio_request(gpio, "tsc2007_pen_down"); -+ if (ret < 0) { -+ printk(KERN_ERR "Failed to request GPIO %d for " -+ "tsc2007 pen down IRQ\n", gpio); -+ return ret; -+ } -+ -+ omap_mux_init_gpio(OMAP3BEAGLE_TSC2007_GPIO, OMAP_PIN_INPUT_PULLUP); -+ gpio_direction_input(gpio); -+ -+ irq_set_irq_type(OMAP_GPIO_IRQ(OMAP3BEAGLE_TSC2007_GPIO), IRQ_TYPE_EDGE_FALLING); -+ -+ return ret; -+} -+ -+static struct tsc2007_platform_data tsc2007_info = { -+ .model = 2007, -+ .x_plate_ohms = 180, -+ .get_pendown_state = omap3beagle_tsc2007_get_pendown_state, -+ .init_platform_hw = omap3beagle_tsc2007_init, -+}; -+ -+static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = { -+ { -+ I2C_BOARD_INFO("tsc2007", 0x48), -+ .irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_TSC2007_GPIO), -+ .platform_data = &tsc2007_info, -+ }, -+}; -+#else -+static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = {}; -+#endif -+ - static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, -@@ -817,6 +918,10 @@ static void __init omap3_beagle_init(void) - - gpio_buttons[0].gpio = beagle_config.usr_button_gpio; - -+ /* TODO: set lcd_driver_name by command line or device tree */ -+ beagle_config.lcd_driver_name = "tfc_s9700rtwv35tr-01b", -+ lcd_panel.name = beagle_config.lcd_driver_name; -+ - platform_add_devices(omap3_beagle_devices, - ARRAY_SIZE(omap3_beagle_devices)); - omap_display_init(&beagle_dss_data); -@@ -892,6 +997,13 @@ static void __init omap3_beagle_init(void) - platform_device_register(&omap_vwlan_device); - } - -+ if(!strcmp(expansionboard_name, "bbtoys-ulcd")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: registering bbtoys-ulcd\n"); -+ omap_register_i2c_bus(2, 400, beagle_i2c2_bbtoys_ulcd, -+ ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); -+ } -+ - usb_musb_init(NULL); - usbhs_init(&usbhs_bdata); - omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, -diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c b/drivers/video/omap2/displays/panel-generic-dpi.c -index 9c90f75..82c1ac3 100644 ---- a/drivers/video/omap2/displays/panel-generic-dpi.c -+++ b/drivers/video/omap2/displays/panel-generic-dpi.c -@@ -232,6 +232,31 @@ static struct panel_config generic_dpi_panels[] = { - .power_off_delay = 0, - .name = "powertip_ph480272t", - }, -+ -+ /* ThreeFiveCorp S9700RTWV35TR-01B */ -+ { -+ { -+ .x_res = 800, -+ .y_res = 480, -+ -+ .pixel_clock = 30000, -+ -+ .hsw = 49, -+ .hfp = 41, -+ .hbp = 40, -+ -+ .vsw = 4, -+ .vfp = 14, -+ .vbp = 29, -+ }, -+ .acbi = 0x0, -+ .acb = 0x0, -+ .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | -+ OMAP_DSS_LCD_IHS, // | OMAP_DSS_LCD_IEO; - TODO check this - doesn't work with this enabled -+ .power_on_delay = 50, -+ .power_off_delay = 100, -+ .name = "tfc_s9700rtwv35tr-01b", -+ }, - }; - - struct panel_drv_data { --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough-ex.patch b/recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough-ex.patch deleted file mode 100644 index 46cb432..0000000 --- a/recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough-ex.patch +++ /dev/null @@ -1,61 +0,0 @@ -From eea23f28cacdb525471ecf4dc8a2366ccef5a28b Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Tue, 11 Oct 2011 13:13:35 +0200 -Subject: [PATCH 3/4] ARM: OMAP2: beagleboard: add support for loopthrough expansionboard, make uLCD use it - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 15 +++++++++++++-- - 1 files changed, 13 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 8b30b4c..47bc79b 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -253,6 +253,7 @@ static void __init omap3_beagle_init_rev(void) - } - - char expansionboard_name[16]; -+char expansionboard2_name[16]; - - #if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) - #include <linux/regulator/fixed.h> -@@ -862,6 +863,15 @@ static int __init expansionboard_setup(char *str) - return 0; - } - -+static int __init expansionboard2_setup(char *str) -+{ -+ if (!str) -+ return -EINVAL; -+ strncpy(expansionboard2_name, str, 16); -+ printk(KERN_INFO "Beagle second expansionboard: %s\n", expansionboard2_name); -+ return 0; -+} -+ - static void __init beagle_opp_init(void) - { - int r = 0; -@@ -997,9 +1007,9 @@ static void __init omap3_beagle_init(void) - platform_device_register(&omap_vwlan_device); - } - -- if(!strcmp(expansionboard_name, "bbtoys-ulcd")) -+ if(!strcmp(expansionboard2_name, "bbtoys-ulcd")) - { -- printk(KERN_INFO "Beagle expansionboard: registering bbtoys-ulcd\n"); -+ printk(KERN_INFO "Beagle second expansionboard: registering bbtoys-ulcd\n"); - omap_register_i2c_bus(2, 400, beagle_i2c2_bbtoys_ulcd, - ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); - } -@@ -1021,6 +1031,7 @@ static void __init omap3_beagle_init(void) - } - - early_param("buddy", expansionboard_setup); -+early_param("buddy2", expansionboard2_setup); - - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch b/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch deleted file mode 100644 index b81d125..0000000 --- a/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch +++ /dev/null @@ -1,242 +0,0 @@ -From e707458df28487c2fb0bf620cb3eff22466e2c6c Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Thu, 20 Oct 2011 16:13:16 +0200 -Subject: [PATCH 4/4] LEDS: add initial support for WS2801 controller - -This adds initial support for the WS2801 RGB LED controller. - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 11 ++ - drivers/leds/Kconfig | 6 + - drivers/leds/Makefile | 1 + - drivers/leds/leds-ws2801.c | 159 +++++++++++++++++++++++++++++++ - 4 files changed, 177 insertions(+), 0 deletions(-) - create mode 100644 drivers/leds/leds-ws2801.c - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 47bc79b..016d0985 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -796,6 +796,11 @@ static struct platform_device leds_gpio = { - }, - }; - -+static struct platform_device ws2801_leds = { -+ .name = "ws2801-leds", -+ .id = -1, -+}; -+ - static struct gpio_keys_button gpio_buttons[] = { - { - .code = BTN_EXTRA, -@@ -1014,6 +1019,12 @@ static void __init omap3_beagle_init(void) - ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); - } - -+ if(!strcmp(expansionboard_name, "beacon")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: registering TinCanTools Beacon LED driver\n"); -+ platform_device_register(&ws2801_leds); -+ } -+ - usb_musb_init(NULL); - usbhs_init(&usbhs_bdata); - omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, -diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig -index 713d43b..fd2c4b3 100644 ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -323,6 +323,12 @@ config LEDS_BD2802 - This option enables support for BD2802GU RGB LED driver chips - accessed via the I2C bus. - -+config LEDS_WS2801 -+ tristate "LED driver for WS2801 RGB LED" -+ depends on LEDS_CLASS -+ help -+ This option enables support for WS2801 RGB LED driver chips. -+ - config LEDS_INTEL_SS4200 - tristate "LED driver for Intel NAS SS4200 series" - depends on LEDS_CLASS -diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile -index bbfd2e3..14f849e 100644 ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -43,6 +43,7 @@ obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o - obj-$(CONFIG_LEDS_NS2) += leds-ns2.o - obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o - obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o -+obj-$(CONFIG_LEDS_WS2801) += leds-ws2801.o - - # LED SPI Drivers - obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o -diff --git a/drivers/leds/leds-ws2801.c b/drivers/leds/leds-ws2801.c -new file mode 100644 -index 0000000..9526a84 ---- /dev/null -+++ b/drivers/leds/leds-ws2801.c -@@ -0,0 +1,159 @@ -+/* -+ * LEDs driver for WS2801 RGB Controller -+ * -+ * Copyright (C) 2006 Kristian Kielhofner <kris@krisk.org> -+ * -+ * Based on leds-net48xx.c -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/leds.h> -+#include <linux/err.h> -+#include <linux/gpio.h> -+#include <linux/io.h> -+ -+#define DRVNAME "ws2801-leds" -+#define WS2801_LED_CLOCK_GPIO 159 -+#define WS2801_LED_DATA_GPIO 158 -+ -+static unsigned long rgb_color; -+ -+static struct platform_device *pdev; -+ -+static void ws2801_set_rgb(void) -+{ -+ int count; -+ int color_bit; -+ -+ for (count = 23; count >= 0 ; count--) { -+ color_bit = (rgb_color>>count) & (1<<0); -+ gpio_set_value(WS2801_LED_DATA_GPIO, color_bit); -+ gpio_set_value(WS2801_LED_CLOCK_GPIO, 1); -+ gpio_set_value(WS2801_LED_CLOCK_GPIO, 0); -+ } -+ -+} -+ -+static void ws2801_red_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ rgb_color &= ((0x00<<16)|(0xff<<8)|(0xff<<0)); -+ rgb_color |= (value<<16); -+ ws2801_set_rgb(); -+} -+ -+static void ws2801_green_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ rgb_color &= ((0xff<<16)|(0x00<<8)|(0xff<<0)); -+ rgb_color |= (value<<8); -+ ws2801_set_rgb(); -+} -+ -+static void ws2801_blue_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ rgb_color &= ((0xff<<16)|(0xff<<8)|(0x00<<0)); -+ rgb_color |= (value<<0); -+ ws2801_set_rgb(); -+} -+ -+static struct led_classdev ws2801_red_led = { -+ .name = "ws2801-red", -+ .brightness_set = ws2801_red_led_set, -+ .flags = LED_CORE_SUSPENDRESUME, -+}; -+ -+static struct led_classdev ws2801_green_led = { -+ .name = "ws2801-green", -+ .brightness_set = ws2801_green_led_set, -+ .flags = LED_CORE_SUSPENDRESUME, -+}; -+ -+static struct led_classdev ws2801_blue_led = { -+ .name = "ws2801-blue", -+ .brightness_set = ws2801_blue_led_set, -+ .flags = LED_CORE_SUSPENDRESUME, -+}; -+ -+static int ws2801_led_probe(struct platform_device *pdev) -+{ -+ int ret; -+ -+ ret = led_classdev_register(&pdev->dev, &ws2801_red_led); -+ if (ret < 0) -+ return ret; -+ -+ ret = led_classdev_register(&pdev->dev, &ws2801_green_led); -+ if (ret < 0) -+ goto err1; -+ -+ ret = led_classdev_register(&pdev->dev, &ws2801_blue_led); -+ if (ret < 0) -+ goto err2; -+ -+ gpio_request_one(WS2801_LED_DATA_GPIO, -+ GPIOF_OUT_INIT_LOW, "ws2801_data"); -+ -+ gpio_request_one(WS2801_LED_CLOCK_GPIO, -+ GPIOF_OUT_INIT_LOW, "ws2801_clock"); -+ -+ ws2801_set_rgb(); -+ return ret; -+ -+err2: -+ led_classdev_unregister(&ws2801_green_led); -+err1: -+ led_classdev_unregister(&ws2801_red_led); -+ -+ return ret; -+} -+ -+static int ws2801_led_remove(struct platform_device *pdev) -+{ -+ led_classdev_unregister(&ws2801_red_led); -+ led_classdev_unregister(&ws2801_green_led); -+ led_classdev_unregister(&ws2801_blue_led); -+ return 0; -+} -+ -+static struct platform_driver ws2801_led_driver = { -+ .probe = ws2801_led_probe, -+ .remove = ws2801_led_remove, -+ .driver = { -+ .name = DRVNAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init ws2801_led_init(void) -+{ -+ int ret; -+ -+ ret = platform_driver_register(&ws2801_led_driver); -+ if (ret < 0) -+ goto out; -+ -+out: -+ return ret; -+} -+ -+static void __exit ws2801_led_exit(void) -+{ -+ platform_device_unregister(pdev); -+ platform_driver_unregister(&ws2801_led_driver); -+} -+ -+module_init(ws2801_led_init); -+module_exit(ws2801_led_exit); -+ -+MODULE_AUTHOR("David Anders <danders@tincantools.com>"); -+MODULE_DESCRIPTION("WS2801 RGB LED driver"); -+MODULE_LICENSE("GPL"); -+ --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum-2.1.patch b/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum-2.1.patch deleted file mode 100644 index 8d65b5f..0000000 --- a/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum-2.1.patch +++ /dev/null @@ -1,210 +0,0 @@ -From cf5db5477d8d43f02f4511f3835ab4bec0dcc27c Mon Sep 17 00:00:00 2001 -From: Richard Watts <rrw@kynesim.co.uk> -Date: Mon, 20 Feb 2012 17:58:26 +0000 -Subject: [PATCH] Fix sprz319 erratum 2.1 - -There is an erratum in DM3730 which results in the -EHCI USB PLL (DPLL5) not updating sufficiently frequently; this -leads to USB PHY clock drift and once the clock has drifted far -enough, the PHY's ULPI interface stops responding and USB -drops out. This is manifested on a Beagle xM by having the attached -SMSC9514 report 'Cannot enable port 2. Maybe the USB cable is bad?' -or similar. - -The fix is to carefully adjust your DPLL5 settings so as to -keep the PHY clock as close as possible to 120MHz over the long -term; TI SPRZ319e gives a table of such settings and this patch -applies that table to systems with a 13MHz or a 26MHz clock, -thus fixing the issue (inasfar as it can be fixed) on Beagle xM -and Overo Firestorm. - -Signed-off-by: Richard Watts <rrw@kynesim.co.uk> ---- - arch/arm/mach-omap2/clkt_clksel.c | 15 ++++++++ - arch/arm/mach-omap2/clock.h | 7 ++++ - arch/arm/mach-omap2/clock3xxx.c | 65 +++++++++++++++++++++++++++++---- - arch/arm/mach-omap2/clock3xxx.h | 1 + - arch/arm/mach-omap2/clock3xxx_data.c | 2 +- - arch/arm/mach-omap2/dpll3xxx.c | 2 +- - 6 files changed, 82 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c -index e25364d..e378fe7 100644 ---- a/arch/arm/mach-omap2/clkt_clksel.c -+++ b/arch/arm/mach-omap2/clkt_clksel.c -@@ -460,6 +460,21 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) - return 0; - } - -+int omap2_clksel_force_divisor(struct clk *clk, int new_div) -+{ -+ u32 field_val; -+ -+ field_val = _divisor_to_clksel(clk, new_div); -+ if (field_val == ~0) -+ return -EINVAL; -+ -+ _write_clksel_reg(clk, field_val); -+ -+ clk->rate = clk->parent->rate / new_div; -+ -+ return 0; -+} -+ - /* - * Clksel parent setting function - not passed in struct clk function - * pointer - instead, the OMAP clock code currently assumes that any -diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h -index 8bad1c6..ac3d367 100644 ---- a/arch/arm/mach-omap2/clock.h -+++ b/arch/arm/mach-omap2/clock.h -@@ -61,6 +61,12 @@ void omap3_dpll_allow_idle(struct clk *clk); - void omap3_dpll_deny_idle(struct clk *clk); - u32 omap3_dpll_autoidle_read(struct clk *clk); - int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate); -+#if CONFIG_ARCH_OMAP3 -+int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel); -+/* If you are using this function and not on OMAP3, you are -+ * Doing It Wrong(tm), so there is no stub. -+ */ -+#endif - int omap3_noncore_dpll_enable(struct clk *clk); - void omap3_noncore_dpll_disable(struct clk *clk); - int omap4_dpllmx_gatectrl_read(struct clk *clk); -@@ -84,6 +90,7 @@ unsigned long omap2_clksel_recalc(struct clk *clk); - long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate); - int omap2_clksel_set_rate(struct clk *clk, unsigned long rate); - int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent); -+int omap2_clksel_force_divisor(struct clk *clk, int new_div); - - /* clkt_iclk.c public functions */ - extern void omap2_clkt_iclk_allow_idle(struct clk *clk); -diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c -index 952c3e0..d5be086 100644 ---- a/arch/arm/mach-omap2/clock3xxx.c -+++ b/arch/arm/mach-omap2/clock3xxx.c -@@ -40,6 +40,60 @@ - /* needed by omap3_core_dpll_m2_set_rate() */ - struct clk *sdrc_ick_p, *arm_fck_p; - -+struct dpll_settings { -+ int rate, m, n, f; -+}; -+ -+ -+static int omap3_dpll5_apply_erratum21(struct clk *clk, struct clk *dpll5_m2) -+{ -+ struct clk *sys_clk; -+ int i, rv; -+ static const struct dpll_settings precomputed[] = { -+ /* From DM3730 errata (sprz319e), table 36 -+ * +1 is because the values in the table are register values; -+ * dpll_program() will subtract one from what we give it, -+ * so ... -+ */ -+ { 13000000, 443+1, 5+1, 8 }, -+ { 26000000, 443+1, 11+1, 8 } -+ }; -+ -+ sys_clk = clk_get(NULL, "sys_ck"); -+ -+ for (i = 0 ; i < (sizeof(precomputed)/sizeof(struct dpll_settings)) ; -+ ++i) { -+ const struct dpll_settings *d = &precomputed[i]; -+ if (sys_clk->rate == d->rate) { -+ rv = omap3_noncore_dpll_program(clk, d->m , d->n, 0); -+ if (rv) -+ return 1; -+ rv = omap2_clksel_force_divisor(dpll5_m2 , d->f); -+ return 1; -+ } -+ } -+ return 0; -+} -+ -+int omap3_dpll5_set_rate(struct clk *clk, unsigned long rate) -+{ -+ struct clk *dpll5_m2; -+ int rv; -+ dpll5_m2 = clk_get(NULL, "dpll5_m2_ck"); -+ -+ if (cpu_is_omap3630() && rate == DPLL5_FREQ_FOR_USBHOST && -+ omap3_dpll5_apply_erratum21(clk, dpll5_m2)) { -+ return 1; -+ } -+ rv = omap3_noncore_dpll_set_rate(clk, rate); -+ if (rv) -+ goto out; -+ rv = clk_set_rate(dpll5_m2, rate); -+ -+out: -+ return rv; -+} -+ - int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) - { - /* -@@ -59,19 +113,14 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) - void __init omap3_clk_lock_dpll5(void) - { - struct clk *dpll5_clk; -- struct clk *dpll5_m2_clk; - - dpll5_clk = clk_get(NULL, "dpll5_ck"); - clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST); -- clk_enable(dpll5_clk); - -- /* Program dpll5_m2_clk divider for no division */ -- dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck"); -- clk_enable(dpll5_m2_clk); -- clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST); -+ /* dpll5_m2_ck is now (grottily!) handled by dpll5_clk's set routine, -+ * to cope with an erratum on DM3730 -+ */ - -- clk_disable(dpll5_m2_clk); -- clk_disable(dpll5_clk); - return; - } - -diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h -index 8bbeeaf..0ede513 100644 ---- a/arch/arm/mach-omap2/clock3xxx.h -+++ b/arch/arm/mach-omap2/clock3xxx.h -@@ -10,6 +10,7 @@ - - int omap3xxx_clk_init(void); - int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate); -+int omap3_dpll5_set_rate(struct clk *clk, unsigned long rate); - int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate); - void omap3_clk_lock_dpll5(void); - -diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c -index ffd55b1..dcd7bdc 100644 ---- a/arch/arm/mach-omap2/clock3xxx_data.c -+++ b/arch/arm/mach-omap2/clock3xxx_data.c -@@ -942,7 +942,7 @@ static struct clk dpll5_ck = { - .parent = &sys_ck, - .dpll_data = &dpll5_dd, - .round_rate = &omap2_dpll_round_rate, -- .set_rate = &omap3_noncore_dpll_set_rate, -+ .set_rate = &omap3_dpll5_set_rate, - .clkdm_name = "dpll5_clkdm", - .recalc = &omap3_dpll_recalc, - }; -diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c -index f77022b..1909cd0 100644 ---- a/arch/arm/mach-omap2/dpll3xxx.c -+++ b/arch/arm/mach-omap2/dpll3xxx.c -@@ -291,7 +291,7 @@ static void _lookup_sddiv(struct clk *clk, u8 *sd_div, u16 m, u8 n) - * Program the DPLL with the supplied M, N values, and wait for the DPLL to - * lock.. Returns -EINVAL upon error, or 0 upon success. - */ --static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) -+int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) - { - struct dpll_data *dd = clk->dpll_data; - u8 dco, sd_div; --- -1.7.2.5 - diff --git a/recipes-kernel/linux/linux_3.0.bb b/recipes-kernel/linux/linux_3.0.bb deleted file mode 100644 index 3aae2ca..0000000 --- a/recipes-kernel/linux/linux_3.0.bb +++ /dev/null @@ -1,234 +0,0 @@ -require linux.inc - -DESCRIPTION = "Linux kernel for TI processors" - -COMPATIBLE_MACHINE = "(beagleboard)" - -PV = "3.0.28" -# v3.0.28 tag -SRCREV_pn-${PN} = "0527fde0639955203ad48a9fd83bd6fc35e82e07" - -# The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc -MACHINE_KERNEL_PR_append = "a" - -FILESPATH =. "${FILE_DIRNAME}/linux-3.0:${FILE_DIRNAME}/linux-3.0/${MACHINE}:" - -SRC_URI += "git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git;branch=linux-3.0.y;protocol=git \ - file://pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach-omap2.patch \ - file://pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common-in-hs.patch \ - file://pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid-cpu_is.patch \ - file://pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid-cpu_.patch \ - file://pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch \ - file://pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into-inline-.patch \ - file://pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch \ - file://pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch \ - file://pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch \ - file://pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch \ - file://pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch \ - file://pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch \ - file://pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and-initial.patch \ - file://pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch \ - file://pm-wip/voltdm/0015-omap2-Remove-omap2_gp_clockevent_set_gptimer.patch \ - file://pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to-combine-time.patch \ - file://pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch \ - file://pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch \ - file://pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch \ - file://pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch \ - file://pm-wip/voltdm/0021-omap2-fix-build-regression.patch \ - file://pm-wip/voltdm/0022-OMAP-New-twl-common-for-common-TWL-configuration.patch \ - file://pm-wip/voltdm/0023-OMAP4-Move-common-twl6030-configuration-to-twl-commo.patch \ - file://pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl-common.patch \ - file://pm-wip/voltdm/0025-OMAP3-Move-common-regulator-configuration-to-twl-com.patch \ - file://pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length-variables.patch \ - file://pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch \ - file://pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch \ - file://pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup-support.patch \ - file://pm-wip/voltdm/0030-OMAP4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch \ - file://pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in-shutdown-to-access-sysc.patch \ - file://pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch \ - file://pm-wip/voltdm/0033-OMAP2-hwmod-Remove-_populate_mpu_rt_base-warning.patch \ - file://pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset-management.patch \ - file://pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch \ - file://pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the-readability.patch \ - file://pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to-terminate-.patch \ - file://pm-wip/voltdm/0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch \ - file://pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch \ - file://pm-wip/voltdm/0040-omap_hwmod-share-identical-omap_hwmod_mpu_irqs-array.patch \ - file://pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record-with-omap_hwmod_d.patch \ - file://pm-wip/voltdm/0042-omap_hwmod-share-identical-omap_hwmod_dma_info-array.patch \ - file://pm-wip/voltdm/0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch \ - file://pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect-data-order-and-.patch \ - file://pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed-parens.patch \ - file://pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch \ - file://pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect-format-with-regu.patch \ - file://pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch \ - file://pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev-with-NULL.patch \ - file://pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and-struc.patch \ - file://pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB-DPLL.patch \ - file://pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch \ - file://pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch \ - file://pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch \ - file://pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to-avoid-access-from-.patch \ - file://pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch \ - file://pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order-and-wrong-name.patch \ - file://pm-wip/voltdm/0058-OMAP-omap_device-replace-_find_by_pdev-with-to_omap_.patch \ - file://pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config-option.patch \ - file://pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2-McASP3-and-MMC6-clock.patch \ - file://pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch \ - file://pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch \ - file://pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch \ - file://pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem-states-and-missi.patch \ - file://pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks-always-enabled-and.patch \ - file://pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove-unsupported-MPU-powerd.patch \ - file://pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk-scheme.patch \ - file://pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit-acces.patch \ - file://pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr-flags-from-u8-t.patch \ - file://pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning-constants.patch \ - file://pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C-functionality-flags-.patch \ - file://pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch \ - file://pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all-oma.patch \ - file://pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during-bootup.patch \ - file://pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry-for-hwmod-main_.patch \ - file://pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection-for-a.patch \ - file://pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain-attribute.patch \ - file://pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch \ - file://pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch \ - file://pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch \ - file://pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute-address-with-of.patch \ - file://pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the-offset-bas.patch \ - file://pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch \ - file://pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context-register-offset.patch \ - file://pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch \ - file://pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode-control.patch \ - file://pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module-control-in-hwmod-co.patch \ - file://pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant-call-to-pwrdm_wait.patch \ - file://pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to-control-clockdomain-.patch \ - file://pm-wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch \ - file://pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch \ - file://pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch \ - file://pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to-prevent.patch \ - file://pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended-PRCM-module-enabl.patch \ - file://pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the-summary-of-all-clo.patch \ - file://pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused-voltagedomain-pointer.patch \ - file://pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch \ - file://pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from-VP-into-voltag.patch \ - file://pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new-voltagedomain-laye.patch \ - file://pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu-voltagedomain-to-mpu_iva.patch \ - file://pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup-domain.patch \ - file://pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to-voltagedomain.patch \ - file://pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain-to-struct-powerd.patch \ - file://pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect-to-powerdomain.patch \ - file://pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage-domains.patch \ - file://pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage-domains.patch \ - file://pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain-lookup-during-r.patch \ - file://pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of-powerdomains-in-each-vol.patch \ - file://pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC-code-into-.patch \ - file://pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct-voltagedomain-misc.patch \ - file://pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale-method-when-VC-.patch \ - file://pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor-VP-code-in.patch \ - file://pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate-voltage-and-com.patch \ - file://pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking-clearing-VP-.patch \ - file://pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear-with-V.patch \ - file://pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC-VP.patch \ - file://pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register-access-functio.patch \ - file://pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address-configuration.patch \ - file://pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address-configuration.patch \ - file://pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct-instead-of.patch \ - file://pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time-configuration.patch \ - file://pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off-command-configuration-.patch \ - file://pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch \ - file://pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct-from-vdd_info-.patch \ - file://pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config-programmable-with-PMIC-spec.patch \ - file://pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel-config-for-OMAP4-M.patch \ - file://pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch \ - file://pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch \ - file://pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs-interface.patch \ - file://pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch \ - file://pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch \ - file://pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP-init.patch \ - file://pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating-erro.patch \ - file://pm-wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch \ - file://pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch \ - file://pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch \ - file://pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch \ - file://pm-wip/voltdm/0138-OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch \ - file://pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch \ - file://pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset-functions-using.patch \ - file://pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch \ - file://pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch \ - file://pm-wip/voltdm/0143-OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch \ - file://pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch \ - file://pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch \ - file://pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch \ - file://pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch \ - file://pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch \ - file://pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch \ - file://pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq-table.patch \ - file://pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch \ - file://pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch \ - file://pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch \ - file://pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch \ - file://pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch \ - file://pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch \ - file://pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch \ - file://pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch \ - file://pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to-init.patch \ - file://pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no-mpudev.patch \ - file://pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch \ - file://pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch \ - file://pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch \ - file://pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch \ - file://pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous-check-in-target-for.patch \ - file://pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad-boot-frequency.patch \ - file://pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch \ - file://pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with-reference-value-to-avo.patch \ - \ - file://beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch \ - file://beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch \ - file://beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch \ - file://beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch \ - file://beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch \ - file://beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more-lik.patch \ - file://beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch \ - file://beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch \ - file://beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or-missing-MAC-.patch \ - file://beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect-pin-when.patch \ - file://beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch \ - file://madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch \ - file://madc/0002-mfd-twl-core-enable-madc-clock.patch \ - \ - file://sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch \ - file://sakoman/0002-omap-Change-omap_device-activate-dectivate-latency-m.patch \ - file://sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch \ - file://sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error-messag.patch \ - file://sakoman/0005-video-add-timings-for-hd720.patch \ - file://sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch \ - file://sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch \ - file://sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch \ - file://sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in-interr.patch \ - file://sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch \ - file://sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch \ - file://sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch \ - file://sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior-to.patch \ - file://sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch \ - \ - file://sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch \ - \ - file://ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode-remo.patch \ - file://ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch \ - file://ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough-ex.patch \ - file://ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch \ - \ - file://omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3-4.patch \ - \ - file://misc/0001-compiler.h-Undef-before-redefining-__attribute_const.patch \ - \ - file://usb/0001-Fix-sprz319-erratum-2.1.patch \ - \ - file://defconfig" - -SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ -" - -S = "${WORKDIR}/git" - diff --git a/recipes-kernel/linux/linux_3.1.bb b/recipes-kernel/linux/linux_3.1.bb deleted file mode 100644 index 110d26c..0000000 --- a/recipes-kernel/linux/linux_3.1.bb +++ /dev/null @@ -1,33 +0,0 @@ -require linux.inc - -COMPATIBLE_MACHINE = "beagleboard" - -DESCRIPTION = "Linux kernel for TI processors" - -DEFAULT_PREFERENCE = "-99" - -PV = "3.0+3.1rc" -SRCREV_pn-${PN} = "9e79e3e9dd9672b37ac9412e9a926714306551fe" - -# The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc -MACHINE_KERNEL_PR_append = "e" - -SRC_URI += "git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git;protocol=git \ - file://beagle/0001-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch \ - file://beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch \ - file://madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch \ - file://madc/0002-mfd-twl-core-enable-madc-clock.patch \ - file://sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch \ - file://fixes/vout.patch \ - file://defconfig" - -# Needs refresh: -# file://beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch \ -# - - -SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ -" - -S = "${WORKDIR}/git" - -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 2/8] linux-3.0: remove old beagleboard-specific 3.0 and 3.1rc kernel recipes 2013-09-28 22:53 ` [PATCH 2/8] linux-3.0: remove old beagleboard-specific 3.0 and 3.1rc kernel recipes Denys Dmytriyenko @ 2013-09-30 14:32 ` Cooper Jr., Franklin 0 siblings, 0 replies; 13+ messages in thread From: Cooper Jr., Franklin @ 2013-09-30 14:32 UTC (permalink / raw) To: Denys Dmytriyenko, meta-ti@yoctoproject.org Acked-by: Franklin Cooper Jr. <fcooper@ti.com> > -----Original Message----- > From: meta-ti-bounces@yoctoproject.org [mailto:meta-ti- > bounces@yoctoproject.org] On Behalf Of Denys Dmytriyenko > Sent: Saturday, September 28, 2013 5:54 PM > To: meta-ti@yoctoproject.org > Subject: [meta-ti] [PATCH 2/8] linux-3.0: remove old beagleboard-specific 3.0 > and 3.1rc kernel recipes > > From: Denys Dmytriyenko <denys@ti.com> > > Beagleboard is supported by newer 3.2 and 3.3.7 kernel recipes. > > Signed-off-by: Denys Dmytriyenko <denys@ti.com> > --- > ...OMAP3-beagle-add-support-for-expansionboa.patch | 340 -- > ...0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch | 26 - > .../0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 - > .../linux/linux-3.0+3.1rc/beagleboard/defconfig | 3517 ------------------- > .../linux/linux-3.0+3.1rc/fixes/vout.patch | 79 - > ...01-Enabling-Hwmon-driver-for-twl4030-madc.patch | 46 - > .../madc/0002-mfd-twl-core-enable-madc-clock.patch | 54 - > recipes-kernel/linux/linux-3.0+3.1rc/patch.sh | 27 - > ...001-ARM-L2-Add-and-export-outer_clean_all.patch | 67 - > ...e-add-support-for-beagleboard-xM-revision.patch | 196 -- > ...OMAP3-beagle-add-support-for-expansionboa.patch | 340 -- > ...0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch | 26 - > .../0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch | 31 - > ...5-omap3-Add-basic-support-for-720MHz-part.patch | 202 -- > ...eagleboard-make-wilink-init-look-more-lik.patch | 32 - > ...Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch | 33 - > ...add-cpu-id-register-to-MAC-address-helper.patch | 89 - > ...BeagleBoard-Fix-up-random-or-missing-MAC-.patch | 156 - > ...eagleboard-fix-mmc-write-protect-pin-when.patch | 26 - > ...d-reinstate-usage-of-hi-speed-PLL-divider.patch | 29 - > .../linux/linux-3.0/beagleboard/defconfig | 3604 -------------------- > ...3630-PRM-add-ABB-PRM-register-definitions.patch | 93 - > ...P3-PM-VP-generalize-PRM-interrupt-helpers.patch | 263 -- > ...P3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch | 202 -- > ...P3-ABB-Adaptive-Body-Bias-structures-data.patch | 240 -- > ...-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch | 194 -- > ...3-Voltage-add-ABB-data-to-voltage-domains.patch | 83 - > ...3-ABB-initialization-transition-functions.patch | 274 -- > ...-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch | 114 - > ...01-Enabling-Hwmon-driver-for-twl4030-madc.patch | 46 - > .../madc/0002-mfd-twl-core-enable-madc-clock.patch | 54 - > ...Undef-before-redefining-__attribute_const.patch | 31 - > ...llow-OPP-enumeration-to-continue-if-devic.patch | 43 - > ...nking-error-in-twl-common.c-for-OMAP2-3-4.patch | 129 - > recipes-kernel/linux/linux-3.0/patch.sh | 29 - > ...-introduce-function-to-free-cpufreq-table.patch | 84 - > ...q-ensure-driver-initializes-after-cpufreq.patch | 28 - > ...PUfreq-ensure-policy-is-fully-initialized.patch | 32 - > .../0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch | 264 -- > ...AP-PM-CPUFREQ-Fix-conditional-compilation.patch | 33 - > ...-cpufreq-fixup-after-new-OPP-layer-merged.patch | 34 - > ...q-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch | 673 ---- > ...cpufreq-Add-SMP-support-to-cater-OMAP4430.patch | 171 - > ...pufreq-Fix-typo-when-attempting-to-set-mp.patch | 30 - > ...P2-cpufreq-move-clk-name-decision-to-init.patch | 64 - > ...-cpufreq-deny-initialization-if-no-mpudev.patch | 64 - > ...012-OMAP2-cpufreq-dont-support-freq_table.patch | 129 - > ...3-OMAP2-cpufreq-only-supports-OPP-library.patch | 46 - > ...-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch | 61 - > .../0015-OMAP2-cpufreq-fix-freq_table-leak.patch | 90 - > ...eq-Remove-superfluous-check-in-target-for.patch | 58 - > ...ufreq-notify-even-with-bad-boot-frequency.patch | 48 - > ...req-Enable-all-CPUs-in-shared-policy-mask.patch | 42 - > ...eq-update-lpj-with-reference-value-to-avo.patch | 121 - > ...egulator-supply-definitions-in-mach-omap2.patch | 1083 ------ > ...style-supply.dev-assignments-common-in-hs.patch | 160 - > ...parate-init_irq-functions-to-avoid-cpu_is.patch | 802 ----- > ...parate-timer-init-functions-to-avoid-cpu_.patch | 689 ---- > ...05-omap-Move-dmtimer-defines-to-dmtimer.h.patch | 287 -- > ...-subset-of-dmtimer-functions-into-inline-.patch | 323 -- > ...7-omap2-Use-dmtimer-macros-for-clockevent.patch | 279 -- > .../0008-omap2-Remove-gptimer_wakeup-for-now.patch | 177 - > ...OMAP3-SR-make-notify-independent-of-class.patch | 47 - > ...010-OMAP3-SR-disable-interrupt-by-default.patch | 36 - > ...1-OMAP3-SR-enable-disable-SR-only-on-need.patch | 40 - > .../0012-OMAP3-SR-fix-cosmetic-indentation.patch | 48 - > ...ve-clocksource-and-timesource-and-initial.patch | 125 - > ...-omap2-Use-dmtimer-macros-for-clocksource.patch | 163 - > ...p2-Remove-omap2_gp_clockevent_set_gptimer.patch | 240 -- > ...e-timer-gp.c-into-timer.c-to-combine-time.patch | 737 ---- > .../0017-omap-cleanup-NAND-platform-data.patch | 165 - > ...omap-board-omap3evm-Fix-compilation-error.patch | 40 - > .../0019-omap-mcbsp-Drop-SPI-mode-support.patch | 311 -- > ...map-mcbsp-Drop-in-driver-transfer-support.patch | 548 --- > .../voltdm/0021-omap2-fix-build-regression.patch | 29 - > ...w-twl-common-for-common-TWL-configuration.patch | 200 -- > ...common-twl6030-configuration-to-twl-commo.patch | 601 ---- > ...ve-common-twl-configuration-to-twl-common.patch | 827 ----- > ...common-regulator-configuration-to-twl-com.patch | 924 ----- > ...mcbsp-Remove-rx_-tx_word_length-variables.patch | 45 - > .../0027-omap-mcbsp-Remove-port-number-enums.patch | 68 - > .../0028-OMAP-dmtimer-add-missing-include.patch | 31 - > ...P2-hwmod-Fix-smart-standby-wakeup-support.patch | 130 - > ...4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch | 61 - > ...-Enable-module-in-shutdown-to-access-sysc.patch | 37 - > ...-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch | 65 - > ...wmod-Remove-_populate_mpu_rt_base-warning.patch | 33 - > ...4-OMAP2-hwmod-Fix-the-HW-reset-management.patch | 87 - > ...-OMAP-hwmod-Add-warnings-if-enable-failed.patch | 30 - > ...-Move-pr_debug-to-improve-the-readability.patch | 95 - > ...use-a-null-structure-record-to-terminate-.patch | 3529 ------------------- > ...share-identical-omap_hwmod_addr_space-arr.patch | 1958 ----------- > ...use-a-terminator-record-with-omap_hwmod_m.patch | 2904 ---------------- > ...share-identical-omap_hwmod_mpu_irqs-array.patch | 1815 ---------- > ...use-a-terminator-record-with-omap_hwmod_d.patch | 1382 -------- > ...share-identical-omap_hwmod_dma_info-array.patch | 935 ----- > ...share-identical-omap_hwmod_class-omap_hwm.patch | 1730 ---------- > ...-data-Fix-L3-interconnect-data-order-and-.patch | 116 - > ...-OMAP4-hwmod-data-Remove-un-needed-parens.patch | 42 - > .../0046-OMAP4-hwmod-data-Fix-bad-alignement.patch | 218 -- > ...-data-Align-interconnect-format-with-regu.patch | 154 - > ...48-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch | 31 - > ...-data-Remove-usb_host_fs-clkdev-with-NULL.patch | 48 - > ...-data-Re-order-some-clock-nodes-and-struc.patch | 229 -- > ...ck-data-Fix-max-mult-and-div-for-USB-DPLL.patch | 143 - > ...OMAP4-prcm-Fix-errors-in-few-defines-name.patch | 256 -- > ...MAP4-prm-Remove-wrong-clockdomain-offsets.patch | 50 - > ...54-OMAP4-powerdomain-data-Fix-indentation.patch | 109 - > ...move-RESTORE-macros-to-avoid-access-from-.patch | 1523 --------- > ...6-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch | 111 - > ...domain-data-Fix-data-order-and-wrong-name.patch | 294 -- > ...evice-replace-_find_by_pdev-with-to_omap_.patch | 84 - > ...OMAP-PM-remove-OMAP_PM_NONE-config-option.patch | 63 - > ...-data-Remove-McASP2-McASP3-and-MMC6-clock.patch | 178 - > ...MAP4-clock-data-Remove-UNIPRO-clock-nodes.patch | 99 - > ...62-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch | 153 - > ...itialise-sleep_switch-to-a-non-valid-valu.patch | 39 - > ...domain-data-Fix-core-mem-states-and-missi.patch | 68 - > ...-data-Keep-GPMC-clocks-always-enabled-and.patch | 45 - > ...domain-data-Remove-unsupported-MPU-powerd.patch | 44 - > ...AP4-hwmod-data-Change-DSS-main_clk-scheme.patch | 163 - > ...et-hwmod-flags-to-only-allow-16-bit-acces.patch | 133 - > ...ncrease-omap_i2c_dev_attr-flags-from-u8-t.patch | 46 - > ...AP2-Introduce-I2C-IP-versioning-constants.patch | 61 - > ...MAP2-create-omap-I2C-functionality-flags-.patch | 51 - > ...ag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch | 77 - > ...dd-correct-functionality-flags-to-all-oma.patch | 146 - > ...d-fix-the-i2c-reset-timeout-during-bootup.patch | 286 -- > ...evice-Create-clkdev-entry-for-hwmod-main_.patch | 437 --- > ...-data-Add-missing-divider-selection-for-a.patch | 292 -- > ...AP4-hwmod-data-Add-clock-domain-attribute.patch | 724 ---- > ...OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch | 86 - > ...-Replace-CLKCTRL-absolute-address-with-of.patch | 976 ------ > ...hwmod-Wait-the-idle-status-to-be-disabled.patch | 153 - > ...-Replace-RSTCTRL-absolute-address-with-of.patch | 459 --- > ...eplace-warm-reset-API-with-the-offset-bas.patch | 125 - > ...083-OMAP4-prm-Remove-deprecated-functions.patch | 81 - > ...wmod-data-Add-PRM-context-register-offset.patch | 630 ---- > ...-data-Add-modulemode-entry-in-omap_hwmod-.patch | 503 --- > ...m-Add-two-new-APIs-for-modulemode-control.patch | 88 - > ...-Introduce-the-module-control-in-hwmod-co.patch | 129 - > ...omain-Remove-redundant-call-to-pwrdm_wait.patch | 30 - > ...domain-Add-2-APIs-to-control-clockdomain-.patch | 231 -- > ...0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch | 141 - > ...P2-PM-idle-clkdms-only-if-already-in-idle.patch | 53 - > ...domain-Add-per-clkdm-lock-to-prevent-conc.patch | 264 -- > ...-allow-per-SoC-clock-init-code-to-prevent.patch | 123 - > ...-Follow-the-recommended-PRCM-module-enabl.patch | 173 - > ...bugfs-node-to-show-the-summary-of-all-clo.patch | 84 - > ...hwmod-remove-unused-voltagedomain-pointer.patch | 30 - > ...ge-move-PRCM-mod-offets-into-VC-VP-struct.patch | 577 ---- > ...ge-move-prm_irqst_reg-from-VP-into-voltag.patch | 203 -- > ...ge-start-towards-a-new-voltagedomain-laye.patch | 986 ------ > ...ltage-rename-mpu-voltagedomain-to-mpu_iva.patch | 82 - > ...MAP3-voltagedomain-data-add-wakeup-domain.patch | 37 - > ...oltage-add-scalable-flag-to-voltagedomain.patch | 93 - > ...domain-add-voltagedomain-to-struct-powerd.patch | 51 - > ...oltage-domains-and-connect-to-powerdomain.patch | 138 - > ...MAP3-powerdomain-data-add-voltage-domains.patch | 161 - > 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...P3-VP-remove-unused-omap_vp_get_curr_volt.patch | 70 - > ...mbine-setting-init-voltage-into-common-fu.patch | 141 - > ...ge-rename-scale-and-reset-functions-using.patch | 141 - > ...ge-move-rename-curr_volt-from-vdd_info-in.patch | 106 - > ...AP3-voltdm-final-removal-of-omap_vdd_info.patch | 282 -- > ...ge-rename-omap_voltage_get_nom_volt-voltd.patch | 91 - > ...ge-update-nominal-voltage-in-voltdm_scale.patch | 49 - > ...PM-TWL6030-fix-voltage-conversion-formula.patch | 85 - > ...AP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch | 37 - > ...7-OMAP4-PM-TWL6030-address-0V-conversions.patch | 38 - > ...-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch | 71 - > .../0149-OMAP4-PM-TWL6030-add-cmd-register.patch | 56 - > ...isplay-single-block-read-console-messages.patch | 28 - > ...-omap_device-activate-dectivate-latency-m.patch | 49 - > ...dd-bootarg-for-selecting-svideo-or-compos.patch | 75 - > ...iminate-noisey-uncorrectable-error-messag.patch | 28 - > .../sakoman/0005-video-add-timings-for-hd720.patch | 27 - > ...-smsc911x-return-ENODEV-if-device-is-not-.patch | 29 - > ...ut-touchscreen-ads7846-return-ENODEV-if-d.patch | 45 - > ...08-Revert-omap2_mcspi-Flush-posted-writes.patch | 27 - > ...-threaded-IRQ-remove-IRQ-enable-in-interr.patch | 57 - > ...0-rtc-twl-Fix-registration-vs.-init-order.patch | 122 - > ...Enable-audio-capture-by-default-for-twl40.patch | 27 - > ...odecs-twl4030-Turn-on-mic-bias-by-default.patch | 25 - > ...l4030-move-clock-input-selection-prior-to.patch | 39 - > ...l-add-support-for-backup-battery-recharge.patch | 57 - > ...001-ARM-L2-Add-and-export-outer_clean_all.patch | 67 - > ...ix-build-break-caused-by-update_mode-remo.patch | 44 - > ...-beagleboard-add-bbtoys-ulcd-lite-support.patch | 235 -- > ...eagleboard-add-support-for-loopthrough-ex.patch | 61 - > ...add-initial-support-for-WS2801-controller.patch | 242 -- > .../usb/0001-Fix-sprz319-erratum-2.1.patch | 210 -- > recipes-kernel/linux/linux_3.0.bb | 234 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OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128- > OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129- > OMAP3-voltage-remove-unneeded-debugfs-interface.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130- > OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131- > OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132- > OMAP3-VP-move-timing-calculation-config-into-VP-init.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133- > OMAP3-VP-create-VP-helper-function-for-updating-erro.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134- > OMAP3-VP-remove-omap_vp_runtime_data.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135- > OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136- > OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137- > OMAP3-VP-update_errorgain-return-error-if-VP.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138- > OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139- > OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140- > OMAP3-voltage-rename-scale-and-reset-functions-using.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141- > OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142- > OMAP3-voltdm-final-removal-of-omap_vdd_info.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143- > OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144- > OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145- > OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146- > OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147- > OMAP4-PM-TWL6030-address-0V-conversions.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148- > OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149- > OMAP4-PM-TWL6030-add-cmd-register.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don- > t-display-single-block-read-console-messages.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0002-omap- > Change-omap_device-activate-dectivate-latency-m.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP- > DSS2-add-bootarg-for-selecting-svideo-or-compos.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand- > Eliminate-noisey-uncorrectable-error-messag.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0005-video-add- > timings-for-hd720.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net- > smsc911x-return-ENODEV-if-device-is-not-.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0007-drivers- > input-touchscreen-ads7846-return-ENODEV-if-d.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0008-Revert- > omap2_mcspi-Flush-posted-writes.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use- > threaded-IRQ-remove-IRQ-enable-in-interr.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix- > registration-vs.-init-order.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs- > Enable-audio-capture-by-default-for-twl40.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs- > twl4030-Turn-on-mic-bias-by-default.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0013-omap- > mmc-twl4030-move-clock-input-selection-prior-to.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl- > add-support-for-backup-battery-recharge.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add- > and-export-outer_clean_all.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT- > Fix-build-break-caused-by-update_mode-remo.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap- > beagleboard-add-bbtoys-ulcd-lite-support.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2- > beagleboard-add-support-for-loopthrough-ex.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial- > support-for-WS2801-controller.patch > delete mode 100644 recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319- > erratum-2.1.patch > delete mode 100644 recipes-kernel/linux/linux_3.0.bb > delete mode 100644 recipes-kernel/linux/linux_3.1.bb > > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0001-UNFINISHED- > OMAP3-beagle-add-support-for-expansionboa.patch b/recipes- > kernel/linux/linux-3.0+3.1rc/beagle/0001-UNFINISHED-OMAP3-beagle-add- > support-for-expansionboa.patch > deleted file mode 100644 > index 5d25cf0..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0001-UNFINISHED-OMAP3- > beagle-add-support-for-expansionboa.patch > +++ /dev/null > @@ -1,340 +0,0 @@ > -From 3721255965a94417996df6f2402a288aa09cb5b2 Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Thu, 21 Jul 2011 14:29:42 +0200 > -Subject: [PATCH 1/3] UNFINISHED: OMAP3: beagle: add support for > expansionboards > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 266 > +++++++++++++++++++++++++++++++ > - 1 files changed, 266 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 32f5f89..f26a9a8 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -21,6 +21,7 @@ > - #include <linux/io.h> > - #include <linux/leds.h> > - #include <linux/gpio.h> > -+#include <linux/irq.h> > - #include <linux/input.h> > - #include <linux/gpio_keys.h> > - #include <linux/opp.h> > -@@ -156,6 +157,167 @@ static void __init omap3_beagle_init_rev(void) > - } > - } > - > -+char expansionboard_name[16]; > -+ > -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) > -+#include <linux/regulator/fixed.h> > -+#include <linux/wl12xx.h> > -+ > -+#define OMAP_BEAGLE_WLAN_EN_GPIO (139) > -+#define OMAP_BEAGLE_BT_EN_GPIO (138) > -+#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) > -+#define OMAP_BEAGLE_FM_EN_BT_WU (136) > -+ > -+struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { > -+ .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO), > -+ .board_ref_clock = 2, /* 38.4 MHz */ > -+}; > -+ > -+static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, > OMAP_BEAGLE_FM_EN_BT_WU, -1}; > -+static struct platform_device wl12xx_device = { > -+ .name = "kim", > -+ .id = -1, > -+ .dev.platform_data = &gpios, > -+}; > -+ > -+static struct omap2_hsmmc_info mmcbbt[] = { > -+ { > -+ .mmc = 1, > -+ .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_8_BIT_DATA, > -+ .gpio_wp = 29, > -+ }, > -+ { > -+ .name = "wl1271", > -+ .mmc = 2, > -+ .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_POWER_OFF_CARD, > -+ .gpio_wp = -EINVAL, > -+ .gpio_cd = -EINVAL, > -+ .ocr_mask = MMC_VDD_165_195, > -+ .nonremovable = true, > -+ }, > -+ {} /* Terminator */ > -+ }; > -+ > -+static struct regulator_consumer_supply beagle_vmmc2_supply = > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); > -+ > -+static struct regulator_init_data beagle_vmmc2 = { > -+ .constraints = { > -+ .min_uV = 1850000, > -+ .max_uV = 1850000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+ .num_consumer_supplies = 1, > -+ .consumer_supplies = &beagle_vmmc2_supply, > -+}; > -+ > -+static struct fixed_voltage_config beagle_vwlan = { > -+ .supply_name = "vwl1271", > -+ .microvolts = 1800000, /* 1.8V */ > -+ .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, > -+ .startup_delay = 70000, /* 70ms */ > -+ .enable_high = 1, > -+ .enabled_at_boot = 0, > -+ .init_data = &beagle_vmmc2, > -+}; > -+ > -+static struct platform_device omap_vwlan_device = { > -+ .name = "reg-fixed-voltage", > -+ .id = 1, > -+ .dev = { > -+ .platform_data = &beagle_vwlan, > -+ }, > -+}; > -+#endif > -+ > -+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) > -+ > -+#include <plat/mcspi.h> > -+#include <linux/spi/spi.h> > -+ > -+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 > -+ > -+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { > -+ .turbo_mode = 0, > -+ .single_channel = 1, /* 0: slave, 1: master */ > -+}; > -+ > -+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata > = { > -+ { > -+ .modalias = "enc28j60", > -+ .bus_num = 4, > -+ .chip_select = 0, > -+ .max_speed_hz = 20000000, > -+ .controller_data = &enc28j60_spi_chip_info, > -+ }, > -+}; > -+ > -+static void __init omap3beagle_enc28j60_init(void) > -+{ > -+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, > "ENC28J60_IRQ") == 0) && > -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { > -+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); > -+ omap3beagle_zippy_spi_board_info[0].irq = > OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); > -+ irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, > IRQ_TYPE_EDGE_FALLING); > -+ } else { > -+ printk(KERN_ERR "could not obtain gpio for > ENC28J60_IRQ\n"); > -+ return; > -+ } > -+ > -+ spi_register_board_info(omap3beagle_zippy_spi_board_info, > -+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); > -+} > -+ > -+#else > -+static inline void __init omap3beagle_enc28j60_init(void) { return; } > -+#endif > -+ > -+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) > -+ > -+#include <plat/mcspi.h> > -+#include <linux/spi/spi.h> > -+ > -+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 > -+ > -+static struct omap2_mcspi_device_config ks8851_spi_chip_info = { > -+ .turbo_mode = 0, > -+ .single_channel = 1, /* 0: slave, 1: master */ > -+}; > -+ > -+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] > __initdata = { > -+ { > -+ .modalias = "ks8851", > -+ .bus_num = 4, > -+ .chip_select = 0, > -+ .max_speed_hz = 36000000, > -+ .controller_data = &ks8851_spi_chip_info, > -+ }, > -+}; > -+ > -+static void __init omap3beagle_ks8851_init(void) > -+{ > -+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") > == 0) && > -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { > -+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); > -+ omap3beagle_zippy2_spi_board_info[0].irq = > OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); > -+ irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, > IRQ_TYPE_EDGE_FALLING); > -+ } else { > -+ printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); > -+ return; > -+ } > -+ > -+ spi_register_board_info(omap3beagle_zippy2_spi_board_info, > -+ > ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); > -+} > -+ > -+#else > -+static inline void __init omap3beagle_ks8851_init(void) { return; } > -+#endif > -+ > - static struct mtd_partition omap3beagle_nand_partitions[] = { > - /* All the partition sizes are listed in terms of NAND block size */ > - { > -@@ -254,6 +416,12 @@ static struct omap2_hsmmc_info mmc[] = { > - .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_8_BIT_DATA, > - .gpio_wp = -EINVAL, > - }, > -+ { > -+ .mmc = 2, > -+ .caps = MMC_CAP_4_BIT_DATA, > -+ .transceiver = true, > -+ .ocr_mask = 0x00100000, /* 3.3V */ > -+ }, > - {} /* Terminator */ > - }; > - > -@@ -277,7 +445,15 @@ static int beagle_twl_gpio_setup(struct device *dev, > - mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; > - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ > - mmc[0].gpio_cd = gpio + 0; > -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) > -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) { > -+ omap2_hsmmc_init(mmcbbt); > -+ } else { > -+ omap2_hsmmc_init(mmc); > -+ } > -+#else > - omap2_hsmmc_init(mmc); > -+#endif > - > - /* > - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM > active > -@@ -375,6 +551,19 @@ static struct i2c_board_info __initdata > beagle_i2c_eeprom[] = { > - }, > - }; > - > -+#if defined(CONFIG_RTC_DRV_DS1307) || \ > -+ defined(CONFIG_RTC_DRV_DS1307_MODULE) > -+ > -+static struct i2c_board_info __initdata beagle_i2c2_zippy[] = { > -+ { > -+ I2C_BOARD_INFO("eeprom", 0x50), > -+ I2C_BOARD_INFO("ds1307", 0x68), > -+ }, > -+}; > -+#else > -+static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; > -+#endif > -+ > - static int __init omap3_beagle_i2c_init(void) > - { > - omap3_pmic_get_config(&beagle_twldata, > -@@ -479,6 +668,15 @@ static struct omap_board_mux board_mux[] > __initdata = { > - }; > - #endif > - > -+static int __init expansionboard_setup(char *str) > -+{ > -+ if (!str) > -+ return -EINVAL; > -+ strncpy(expansionboard_name, str, 16); > -+ printk(KERN_INFO "Beagle expansionboard: %s\n", > expansionboard_name); > -+ return 0; > -+} > -+ > - static void __init beagle_opp_init(void) > - { > - int r = 0; > -@@ -542,6 +740,72 @@ static void __init omap3_beagle_init(void) > - /* REVISIT leave DVI powered down until it's needed ... */ > - gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); > - > -+ if(!strcmp(expansionboard_name, "zippy")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: initializing > enc28j60\n"); > -+ omap3beagle_enc28j60_init(); > -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO > 141 and 162 to MMC1\n"); > -+ mmc[1].gpio_wp = 141; > -+ mmc[1].gpio_cd = 162; > -+ printk(KERN_INFO "Beagle expansionboard: registering I2C2 > for zippy board\n"); > -+ omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, > -+ > ARRAY_SIZE(beagle_i2c2_zippy)); > -+ > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "zippy2")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: initializing > ks_8851\n"); > -+ omap3beagle_ks8851_init(); > -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO > 141 and 162 to MMC1\n"); > -+ mmc[1].gpio_wp = 141; > -+ mmc[1].gpio_cd = 162; > -+ printk(KERN_INFO "Beagle expansionboard: registering I2C2 > for zippy2 board\n"); > -+ omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, > -+ > ARRAY_SIZE(beagle_i2c2_zippy)); > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "trainer")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs > 130-141,162 to userspace\n"); > -+ gpio_request(130, "sysfs"); > -+ gpio_export(130, 1); > -+ gpio_request(131, "sysfs"); > -+ gpio_export(131, 1); > -+ gpio_request(132, "sysfs"); > -+ gpio_export(132, 1); > -+ gpio_request(133, "sysfs"); > -+ gpio_export(133, 1); > -+ gpio_request(134, "sysfs"); > -+ gpio_export(134, 1); > -+ gpio_request(135, "sysfs"); > -+ gpio_export(135, 1); > -+ gpio_request(136, "sysfs"); > -+ gpio_export(136, 1); > -+ gpio_request(137, "sysfs"); > -+ gpio_export(137, 1); > -+ gpio_request(138, "sysfs"); > -+ gpio_export(138, 1); > -+ gpio_request(139, "sysfs"); > -+ gpio_export(139, 1); > -+ gpio_request(140, "sysfs"); > -+ gpio_export(140, 1); > -+ gpio_request(141, "sysfs"); > -+ gpio_export(141, 1); > -+ gpio_request(162, "sysfs"); > -+ gpio_export(162, 1); > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) > -+ { > -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) > -+ pr_err("error setting wl12xx data\n"); > -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx > bt platform device\n"); > -+ platform_device_register(&wl12xx_device); > -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx > wifi platform device\n"); > -+ platform_device_register(&omap_vwlan_device); > -+ } > -+ > - usb_musb_init(NULL); > - usbhs_init(&usbhs_bdata); > - omap_nand_flash_init(NAND_BUSWIDTH_16, > omap3beagle_nand_partitions, > -@@ -558,6 +822,8 @@ static void __init omap3_beagle_init(void) > - beagle_opp_init(); > - } > - > -+early_param("buddy", expansionboard_setup); > -+ > - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") > - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ > - .boot_params = 0x80000100, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3- > beagle-switch-to-GPTIMER1.patch b/recipes-kernel/linux/linux- > 3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch > deleted file mode 100644 > index ebc1456..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle- > switch-to-GPTIMER1.patch > +++ /dev/null > @@ -1,26 +0,0 @@ > -From 6bdb8e890f8e5d11be3c4953d7d10f4a5f160cd4 Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Thu, 21 Jul 2011 12:59:20 +0200 > -Subject: [PATCH 2/3] HACK: OMAP3: beagle: switch to GPTIMER1 > - > -Breaks with B3 and older due to clock noise > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index f26a9a8..a04f5a0 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -832,5 +832,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle > Board") > - .init_early = omap3_beagle_init_early, > - .init_irq = omap3_beagle_init_irq, > - .init_machine = omap3_beagle_init, > -- .timer = &omap3_secure_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0003-OMAP3-beagle- > HACK-add-in-1GHz-OPP.patch b/recipes-kernel/linux/linux- > 3.0+3.1rc/beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch > deleted file mode 100644 > index defd517..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0003-OMAP3-beagle-HACK- > add-in-1GHz-OPP.patch > +++ /dev/null > @@ -1,31 +0,0 @@ > -From 6667757c5f8a473b9cbbe5f6d64eee65a52aad54 Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Wed, 25 May 2011 08:57:40 +0200 > -Subject: [PATCH 3/3] OMAP3: beagle: HACK! add in 1GHz OPP > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 2 ++ > - 1 files changed, 2 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index a04f5a0..5e1d9f9 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -701,11 +701,13 @@ static void __init beagle_opp_init(void) > - /* Enable MPU 1GHz and lower opps */ > - dev = &mh->od->pdev.dev; > - r = opp_enable(dev, 800000000); > -+ r |= opp_enable(dev, 1000000000); > - /* TODO: MPU 1GHz needs SR and ABB */ > - > - /* Enable IVA 800MHz and lower opps */ > - dev = &dh->od->pdev.dev; > - r |= opp_enable(dev, 660000000); > -+ r |= opp_enable(dev, 800000000); > - /* TODO: DSP 800MHz needs SR and ABB */ > - if (r) { > - pr_err("%s: failed to enable higher opp %d\n", > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig > b/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig > deleted file mode 100644 > index 1942725..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig > +++ /dev/null > @@ -1,3517 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux/arm 2.6.39 Kernel Configuration > -# Sun Jun 5 11:03:19 2011 > -# > -CONFIG_ARM=y > -CONFIG_HAVE_PWM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_HAVE_SCHED_CLOCK=y > -CONFIG_GENERIC_GPIO=y > -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_KTIME_SCALAR=y > -CONFIG_HAVE_PROC_CPU=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_NEED_DMA_MAP_STATE=y > -CONFIG_VECTORS_BASE=0xffff0000 > -# CONFIG_ARM_PATCH_PHYS_VIRT is not set > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > -CONFIG_HAVE_IRQ_WORK=y > -CONFIG_IRQ_WORK=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_CROSS_COMPILE="" > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZMA=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -CONFIG_BSD_PROCESS_ACCT=y > -# CONFIG_BSD_PROCESS_ACCT_V3 is not set > -CONFIG_FHANDLE=y > -CONFIG_TASKSTATS=y > -CONFIG_TASK_DELAY_ACCT=y > -CONFIG_TASK_XACCT=y > -CONFIG_TASK_IO_ACCOUNTING=y > -# CONFIG_AUDIT is not set > -CONFIG_HAVE_GENERIC_HARDIRQS=y > - > -# > -# IRQ subsystem > -# > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_HAVE_SPARSE_IRQ=y > -CONFIG_GENERIC_IRQ_SHOW=y > -# CONFIG_SPARSE_IRQ is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TINY_RCU=y > -# CONFIG_PREEMPT_RCU is not set > -# CONFIG_RCU_TRACE is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=16 > -CONFIG_CGROUPS=y > -# CONFIG_CGROUP_DEBUG is not set > -CONFIG_CGROUP_NS=y > -CONFIG_CGROUP_FREEZER=y > -CONFIG_CGROUP_DEVICE=y > -CONFIG_CPUSETS=y > -CONFIG_PROC_PID_CPUSET=y > -CONFIG_CGROUP_CPUACCT=y > -CONFIG_RESOURCE_COUNTERS=y > -CONFIG_CGROUP_MEM_RES_CTLR=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y > -CONFIG_CGROUP_PERF=y > -CONFIG_CGROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -CONFIG_RT_GROUP_SCHED=y > -CONFIG_BLK_CGROUP=y > -# CONFIG_DEBUG_BLK_CGROUP is not set > -CONFIG_NAMESPACES=y > -CONFIG_UTS_NS=y > -CONFIG_IPC_NS=y > -CONFIG_USER_NS=y > -CONFIG_PID_NS=y > -CONFIG_NET_NS=y > -CONFIG_SCHED_AUTOGROUP=y > -CONFIG_MM_OWNER=y > -# CONFIG_SYSFS_DEPRECATED is not set > -# CONFIG_RELAY is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -CONFIG_RD_BZIP2=y > -CONFIG_RD_LZMA=y > -CONFIG_RD_XZ=y > -CONFIG_RD_LZO=y > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EXPERT=y > -CONFIG_UID16=y > -# CONFIG_SYSCTL_SYSCALL is not set > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_ALL is not set > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > -CONFIG_EMBEDDED=y > -CONFIG_HAVE_PERF_EVENTS=y > -CONFIG_PERF_USE_VMALLOC=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_PERF_EVENTS=y > -# CONFIG_PERF_COUNTERS is not set > -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set > -CONFIG_VM_EVENT_COUNTERS=y > -# CONFIG_COMPAT_BRK is not set > -CONFIG_SLAB=y > -# CONFIG_SLUB is not set > -# CONFIG_SLOB is not set > -CONFIG_PROFILING=y > -CONFIG_OPROFILE=y > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y > -CONFIG_HAVE_CLK=y > -CONFIG_HAVE_DMA_API_DEBUG=y > -CONFIG_HAVE_HW_BREAKPOINT=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -CONFIG_MODULE_FORCE_LOAD=y > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -CONFIG_MODULE_SRCVERSION_ALL=y > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -CONFIG_BLK_DEV_BSG=y > -CONFIG_BLK_DEV_INTEGRITY=y > -CONFIG_BLK_DEV_THROTTLING=y > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -CONFIG_IOSCHED_DEADLINE=y > -CONFIG_IOSCHED_CFQ=y > -CONFIG_CFQ_GROUP_IOSCHED=y > -# CONFIG_DEFAULT_DEADLINE is not set > -CONFIG_DEFAULT_CFQ=y > -# CONFIG_DEFAULT_NOOP is not set > -CONFIG_DEFAULT_IOSCHED="cfq" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -CONFIG_INLINE_SPIN_UNLOCK=y > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -CONFIG_INLINE_READ_UNLOCK=y > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -CONFIG_INLINE_READ_UNLOCK_IRQ=y > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -CONFIG_INLINE_WRITE_UNLOCK=y > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_VEXPRESS is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_CNS3XXX is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_MXS is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_LPC32XX is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_NUC93X is not set > -# CONFIG_ARCH_TEGRA is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_SHMOBILE is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5P64X0 is not set > -# CONFIG_ARCH_S5P6442 is not set > -# CONFIG_ARCH_S5PC100 is not set > -# CONFIG_ARCH_S5PV210 is not set > -# CONFIG_ARCH_EXYNOS4 is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_TCC_926 is not set > -# CONFIG_ARCH_U300 is not set > -# CONFIG_ARCH_U8500 is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_DAVINCI is not set > -CONFIG_ARCH_OMAP=y > -# CONFIG_PLAT_SPEAR is not set > -# CONFIG_ARCH_VT8500 is not set > -# CONFIG_GPIO_PCA953X is not set > -# CONFIG_KEYBOARD_GPIO_POLLED is not set > - > -# > -# TI OMAP Common Features > -# > -CONFIG_ARCH_OMAP_OTG=y > -# CONFIG_ARCH_OMAP1 is not set > -CONFIG_ARCH_OMAP2PLUS=y > - > -# > -# OMAP Feature Selections > -# > -CONFIG_OMAP_SMARTREFLEX=y > -CONFIG_OMAP_SMARTREFLEX_CLASS3=y > -CONFIG_OMAP_RESET_CLOCKS=y > -# CONFIG_OMAP_MUX is not set > -CONFIG_OMAP_MCBSP=y > -CONFIG_OMAP_MBOX_FWK=m > -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 > -CONFIG_OMAP_IOMMU=y > -CONFIG_OMAP_IOMMU_DEBUG=m > -CONFIG_OMAP_32K_TIMER=y > -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set > -CONFIG_OMAP_32K_TIMER_HZ=128 > -CONFIG_OMAP_DM_TIMER=y > -# CONFIG_OMAP_PM_NONE is not set > -CONFIG_OMAP_PM_NOOP=y > - > -# > -# TI OMAP2/3/4 Specific Features > -# > -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y > -# CONFIG_ARCH_OMAP2 is not set > -CONFIG_ARCH_OMAP3=y > -CONFIG_ARCH_OMAP4=y > -CONFIG_SOC_OMAP3430=y > -# CONFIG_SOC_OMAPTI816X is not set > -CONFIG_OMAP_PACKAGE_CBB=y > - > -# > -# OMAP Board Type > -# > -CONFIG_MACH_OMAP3_BEAGLE=y > -# CONFIG_MACH_DEVKIT8000 is not set > -# CONFIG_MACH_OMAP_LDP is not set > -# CONFIG_MACH_OMAP3530_LV_SOM is not set > -# CONFIG_MACH_OMAP3_TORPEDO is not set > -CONFIG_MACH_OVERO=y > -CONFIG_MACH_OMAP3EVM=y > -# CONFIG_MACH_OMAP3517EVM is not set > -# CONFIG_MACH_CRANEBOARD is not set > -# CONFIG_MACH_OMAP3_PANDORA is not set > -CONFIG_MACH_OMAP3_TOUCHBOOK=y > -# CONFIG_MACH_OMAP_3430SDP is not set > -# CONFIG_MACH_NOKIA_RM680 is not set > -# CONFIG_MACH_NOKIA_RX51 is not set > -CONFIG_MACH_OMAP_ZOOM2=y > -# CONFIG_MACH_OMAP_ZOOM3 is not set > -# CONFIG_MACH_CM_T35 is not set > -# CONFIG_MACH_CM_T3517 is not set > -# CONFIG_MACH_IGEP0020 is not set > -# CONFIG_MACH_IGEP0030 is not set > -# CONFIG_MACH_SBC3530 is not set > -# CONFIG_MACH_OMAP_3630SDP is not set > -# CONFIG_OMAP3_EMU is not set > -# CONFIG_OMAP3_SDRC_AC_TIMING is not set > - > -# > -# System MMU > -# > - > -# > -# Processor Type > -# > -CONFIG_CPU_V7=y > -CONFIG_CPU_32v6K=y > -CONFIG_CPU_32v7=y > -CONFIG_CPU_ABRT_EV7=y > -CONFIG_CPU_PABRT_V7=y > -CONFIG_CPU_CACHE_V7=y > -CONFIG_CPU_CACHE_VIPT=y > -CONFIG_CPU_COPY_V6=y > -CONFIG_CPU_TLB_V7=y > -CONFIG_CPU_HAS_ASID=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -CONFIG_ARM_THUMBEE=y > -# CONFIG_SWP_EMULATE is not set > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_BPREDICT_DISABLE is not set > -CONFIG_ARM_L1_CACHE_SHIFT_6=y > -CONFIG_ARM_L1_CACHE_SHIFT=6 > -CONFIG_ARM_DMA_MEM_BUFFERABLE=y > -CONFIG_ARM_ERRATA_430973=y > -# CONFIG_ARM_ERRATA_458693 is not set > -# CONFIG_ARM_ERRATA_460075 is not set > -# CONFIG_ARM_ERRATA_743622 is not set > -# CONFIG_ARM_ERRATA_754322 is not set > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -CONFIG_PREEMPT_VOLUNTARY=y > -# CONFIG_PREEMPT is not set > -CONFIG_HZ=128 > -# CONFIG_THUMB2_KERNEL is not set > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_HAVE_MEMBLOCK=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=4 > -CONFIG_COMPACTION=y > -CONFIG_MIGRATION=y > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=0 > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_NEED_PER_CPU_KM=y > -CONFIG_FORCE_MAX_ZONEORDER=11 > -CONFIG_LEDS=y > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > -# CONFIG_SECCOMP is not set > -# CONFIG_CC_STACKPROTECTOR is not set > -# CONFIG_DEPRECATED_PARAM_STRUCT is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE=" debug " > -# CONFIG_CMDLINE_FORCE is not set > -# CONFIG_XIP_KERNEL is not set > -CONFIG_KEXEC=y > -CONFIG_ATAGS_PROC=y > -# CONFIG_CRASH_DUMP is not set > -CONFIG_AUTO_ZRELADDR=y > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -CONFIG_CPU_FREQ_STAT_DETAILS=y > -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -CONFIG_VFP=y > -CONFIG_VFPv3=y > -CONFIG_NEON=y > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -CONFIG_BINFMT_AOUT=m > -CONFIG_BINFMT_MISC=y > - > -# > -# Power management options > -# > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -CONFIG_PM_SLEEP=y > -CONFIG_PM_RUNTIME=y > -CONFIG_PM=y > -CONFIG_PM_DEBUG=y > -# CONFIG_PM_VERBOSE is not set > -# CONFIG_PM_ADVANCED_DEBUG is not set > -# CONFIG_PM_TEST_SUSPEND is not set > -CONFIG_CAN_PM_TRACE=y > -# CONFIG_APM_EMULATION is not set > -CONFIG_ARCH_HAS_OPP=y > -CONFIG_PM_OPP=y > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -CONFIG_XFRM_IPCOMP=m > -CONFIG_NET_KEY=y > -# CONFIG_NET_KEY_MIGRATE is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_ROUTE_CLASSID=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -CONFIG_IP_PNP_BOOTP=y > -CONFIG_IP_PNP_RARP=y > -CONFIG_NET_IPIP=m > -CONFIG_NET_IPGRE_DEMUX=m > -CONFIG_NET_IPGRE=m > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -CONFIG_INET_AH=m > -CONFIG_INET_ESP=m > -CONFIG_INET_IPCOMP=m > -CONFIG_INET_XFRM_TUNNEL=m > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -CONFIG_INET_LRO=y > -CONFIG_INET_DIAG=m > -CONFIG_INET_TCP_DIAG=m > -CONFIG_TCP_CONG_ADVANCED=y > -CONFIG_TCP_CONG_BIC=m > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_TCP_CONG_WESTWOOD=m > -CONFIG_TCP_CONG_HTCP=m > -CONFIG_TCP_CONG_HSTCP=m > -CONFIG_TCP_CONG_HYBLA=m > -CONFIG_TCP_CONG_VEGAS=m > -CONFIG_TCP_CONG_SCALABLE=m > -CONFIG_TCP_CONG_LP=m > -CONFIG_TCP_CONG_VENO=m > -CONFIG_TCP_CONG_YEAH=m > -CONFIG_TCP_CONG_ILLINOIS=m > -CONFIG_DEFAULT_CUBIC=y > -# CONFIG_DEFAULT_RENO is not set > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -CONFIG_INET6_AH=m > -CONFIG_INET6_ESP=m > -CONFIG_INET6_IPCOMP=m > -CONFIG_IPV6_MIP6=m > -CONFIG_INET6_XFRM_TUNNEL=m > -CONFIG_INET6_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -CONFIG_IPV6_TUNNEL=m > -CONFIG_IPV6_MULTIPLE_TABLES=y > -CONFIG_IPV6_SUBTREES=y > -CONFIG_IPV6_MROUTE=y > -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y > -# CONFIG_IPV6_PIMSM_V2 is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETWORK_PHY_TIMESTAMPING=y > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > -CONFIG_BRIDGE_NETFILTER=y > - > -# > -# Core Netfilter Configuration > -# > -CONFIG_NETFILTER_NETLINK=m > -CONFIG_NETFILTER_NETLINK_QUEUE=m > -CONFIG_NETFILTER_NETLINK_LOG=m > -CONFIG_NF_CONNTRACK=m > -CONFIG_NF_CONNTRACK_MARK=y > -CONFIG_NF_CONNTRACK_ZONES=y > -CONFIG_NF_CONNTRACK_EVENTS=y > -CONFIG_NF_CONNTRACK_TIMESTAMP=y > -CONFIG_NF_CT_PROTO_DCCP=m > -CONFIG_NF_CT_PROTO_GRE=m > -CONFIG_NF_CT_PROTO_SCTP=m > -CONFIG_NF_CT_PROTO_UDPLITE=m > -CONFIG_NF_CONNTRACK_AMANDA=m > -CONFIG_NF_CONNTRACK_FTP=m > -CONFIG_NF_CONNTRACK_H323=m > -CONFIG_NF_CONNTRACK_IRC=m > -CONFIG_NF_CONNTRACK_BROADCAST=m > -CONFIG_NF_CONNTRACK_NETBIOS_NS=m > -CONFIG_NF_CONNTRACK_SNMP=m > -CONFIG_NF_CONNTRACK_PPTP=m > -CONFIG_NF_CONNTRACK_SANE=m > -CONFIG_NF_CONNTRACK_SIP=m > -CONFIG_NF_CONNTRACK_TFTP=m > -CONFIG_NF_CT_NETLINK=m > -# CONFIG_NETFILTER_TPROXY is not set > -CONFIG_NETFILTER_XTABLES=m > - > -# > -# Xtables combined modules > -# > -CONFIG_NETFILTER_XT_MARK=m > -CONFIG_NETFILTER_XT_CONNMARK=m > -CONFIG_NETFILTER_XT_SET=m > - > -# > -# Xtables targets > -# > -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m > -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m > -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m > -CONFIG_NETFILTER_XT_TARGET_CT=m > -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set > -CONFIG_NETFILTER_XT_TARGET_HL=m > -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m > -# CONFIG_NETFILTER_XT_TARGET_LED is not set > -CONFIG_NETFILTER_XT_TARGET_MARK=m > -CONFIG_NETFILTER_XT_TARGET_NFLOG=m > -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m > -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set > -CONFIG_NETFILTER_XT_TARGET_RATEEST=m > -CONFIG_NETFILTER_XT_TARGET_TEE=m > -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set > -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m > -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set > - > -# > -# Xtables matches > -# > -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m > -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set > -CONFIG_NETFILTER_XT_MATCH_COMMENT=m > -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m > -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m > -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m > -CONFIG_NETFILTER_XT_MATCH_CPU=m > -CONFIG_NETFILTER_XT_MATCH_DCCP=m > -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m > -CONFIG_NETFILTER_XT_MATCH_DSCP=m > -CONFIG_NETFILTER_XT_MATCH_ESP=m > -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_HELPER=m > -CONFIG_NETFILTER_XT_MATCH_HL=m > -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m > -CONFIG_NETFILTER_XT_MATCH_IPVS=m > -CONFIG_NETFILTER_XT_MATCH_LENGTH=m > -CONFIG_NETFILTER_XT_MATCH_LIMIT=m > -CONFIG_NETFILTER_XT_MATCH_MAC=m > -CONFIG_NETFILTER_XT_MATCH_MARK=m > -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m > -# CONFIG_NETFILTER_XT_MATCH_OSF is not set > -CONFIG_NETFILTER_XT_MATCH_OWNER=m > -CONFIG_NETFILTER_XT_MATCH_POLICY=m > -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set > -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m > -CONFIG_NETFILTER_XT_MATCH_QUOTA=m > -CONFIG_NETFILTER_XT_MATCH_RATEEST=m > -CONFIG_NETFILTER_XT_MATCH_REALM=m > -CONFIG_NETFILTER_XT_MATCH_RECENT=m > -CONFIG_NETFILTER_XT_MATCH_SCTP=m > -CONFIG_NETFILTER_XT_MATCH_STATE=m > -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m > -CONFIG_NETFILTER_XT_MATCH_STRING=m > -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m > -CONFIG_NETFILTER_XT_MATCH_TIME=m > -CONFIG_NETFILTER_XT_MATCH_U32=m > -CONFIG_IP_SET=m > -CONFIG_IP_SET_MAX=256 > -# CONFIG_IP_SET_BITMAP_IP is not set > -# CONFIG_IP_SET_BITMAP_IPMAC is not set > -# CONFIG_IP_SET_BITMAP_PORT is not set > -# CONFIG_IP_SET_HASH_IP is not set > -# CONFIG_IP_SET_HASH_IPPORT is not set > -# CONFIG_IP_SET_HASH_IPPORTIP is not set > -# CONFIG_IP_SET_HASH_IPPORTNET is not set > -# CONFIG_IP_SET_HASH_NET is not set > -# CONFIG_IP_SET_HASH_NETPORT is not set > -# CONFIG_IP_SET_LIST_SET is not set > -CONFIG_IP_VS=m > -CONFIG_IP_VS_IPV6=y > -CONFIG_IP_VS_DEBUG=y > -CONFIG_IP_VS_TAB_BITS=12 > - > -# > -# IPVS transport protocol load balancing support > -# > -CONFIG_IP_VS_PROTO_TCP=y > -CONFIG_IP_VS_PROTO_UDP=y > -CONFIG_IP_VS_PROTO_AH_ESP=y > -CONFIG_IP_VS_PROTO_ESP=y > -CONFIG_IP_VS_PROTO_AH=y > -# CONFIG_IP_VS_PROTO_SCTP is not set > - > -# > -# IPVS scheduler > -# > -CONFIG_IP_VS_RR=m > -CONFIG_IP_VS_WRR=m > -CONFIG_IP_VS_LC=m > -CONFIG_IP_VS_WLC=m > -CONFIG_IP_VS_LBLC=m > -CONFIG_IP_VS_LBLCR=m > -CONFIG_IP_VS_DH=m > -CONFIG_IP_VS_SH=m > -CONFIG_IP_VS_SED=m > -CONFIG_IP_VS_NQ=m > - > -# > -# IPVS application helper > -# > -CONFIG_IP_VS_FTP=m > -CONFIG_IP_VS_NFCT=y > -CONFIG_IP_VS_PE_SIP=m > - > -# > -# IP: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV4=m > -CONFIG_NF_CONNTRACK_IPV4=m > -CONFIG_NF_CONNTRACK_PROC_COMPAT=y > -CONFIG_IP_NF_QUEUE=m > -CONFIG_IP_NF_IPTABLES=m > -CONFIG_IP_NF_MATCH_AH=m > -CONFIG_IP_NF_MATCH_ECN=m > -CONFIG_IP_NF_MATCH_TTL=m > -CONFIG_IP_NF_FILTER=m > -CONFIG_IP_NF_TARGET_REJECT=m > -CONFIG_IP_NF_TARGET_LOG=m > -CONFIG_IP_NF_TARGET_ULOG=m > -CONFIG_NF_NAT=m > -CONFIG_NF_NAT_NEEDED=y > -CONFIG_IP_NF_TARGET_MASQUERADE=m > -CONFIG_IP_NF_TARGET_NETMAP=m > -CONFIG_IP_NF_TARGET_REDIRECT=m > -CONFIG_NF_NAT_SNMP_BASIC=m > -CONFIG_NF_NAT_PROTO_DCCP=m > -CONFIG_NF_NAT_PROTO_GRE=m > -CONFIG_NF_NAT_PROTO_UDPLITE=m > -CONFIG_NF_NAT_PROTO_SCTP=m > -CONFIG_NF_NAT_FTP=m > -CONFIG_NF_NAT_IRC=m > -CONFIG_NF_NAT_TFTP=m > -CONFIG_NF_NAT_AMANDA=m > -CONFIG_NF_NAT_PPTP=m > -CONFIG_NF_NAT_H323=m > -CONFIG_NF_NAT_SIP=m > -CONFIG_IP_NF_MANGLE=m > -CONFIG_IP_NF_TARGET_CLUSTERIP=m > -CONFIG_IP_NF_TARGET_ECN=m > -CONFIG_IP_NF_TARGET_TTL=m > -CONFIG_IP_NF_RAW=m > -CONFIG_IP_NF_ARPTABLES=m > -CONFIG_IP_NF_ARPFILTER=m > -CONFIG_IP_NF_ARP_MANGLE=m > - > -# > -# IPv6: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV6=m > -CONFIG_NF_CONNTRACK_IPV6=m > -CONFIG_IP6_NF_QUEUE=m > -CONFIG_IP6_NF_IPTABLES=m > -CONFIG_IP6_NF_MATCH_AH=m > -CONFIG_IP6_NF_MATCH_EUI64=m > -CONFIG_IP6_NF_MATCH_FRAG=m > -CONFIG_IP6_NF_MATCH_OPTS=m > -CONFIG_IP6_NF_MATCH_HL=m > -CONFIG_IP6_NF_MATCH_IPV6HEADER=m > -CONFIG_IP6_NF_MATCH_MH=m > -CONFIG_IP6_NF_MATCH_RT=m > -CONFIG_IP6_NF_TARGET_HL=m > -CONFIG_IP6_NF_TARGET_LOG=m > -CONFIG_IP6_NF_FILTER=m > -CONFIG_IP6_NF_TARGET_REJECT=m > -CONFIG_IP6_NF_MANGLE=m > -CONFIG_IP6_NF_RAW=m > -# CONFIG_BRIDGE_NF_EBTABLES is not set > -CONFIG_IP_DCCP=m > -CONFIG_INET_DCCP_DIAG=m > - > -# > -# DCCP CCIDs Configuration (EXPERIMENTAL) > -# > -# CONFIG_IP_DCCP_CCID2_DEBUG is not set > -CONFIG_IP_DCCP_CCID3=y > -# CONFIG_IP_DCCP_CCID3_DEBUG is not set > -CONFIG_IP_DCCP_TFRC_LIB=y > - > -# > -# DCCP Kernel Hacking > -# > -# CONFIG_IP_DCCP_DEBUG is not set > -CONFIG_IP_SCTP=m > -# CONFIG_SCTP_DBG_MSG is not set > -# CONFIG_SCTP_DBG_OBJCNT is not set > -# CONFIG_SCTP_HMAC_NONE is not set > -# CONFIG_SCTP_HMAC_SHA1 is not set > -CONFIG_SCTP_HMAC_MD5=y > -# CONFIG_RDS is not set > -CONFIG_TIPC=m > -# CONFIG_TIPC_ADVANCED is not set > -# CONFIG_TIPC_DEBUG is not set > -CONFIG_ATM=m > -CONFIG_ATM_CLIP=m > -# CONFIG_ATM_CLIP_NO_ICMP is not set > -CONFIG_ATM_LANE=m > -CONFIG_ATM_MPOA=m > -CONFIG_ATM_BR2684=m > -# CONFIG_ATM_BR2684_IPFILTER is not set > -CONFIG_L2TP=m > -CONFIG_L2TP_DEBUGFS=m > -CONFIG_L2TP_V3=y > -CONFIG_L2TP_IP=m > -CONFIG_L2TP_ETH=m > -CONFIG_STP=m > -CONFIG_GARP=m > -CONFIG_BRIDGE=m > -CONFIG_BRIDGE_IGMP_SNOOPING=y > -# CONFIG_NET_DSA is not set > -CONFIG_VLAN_8021Q=m > -CONFIG_VLAN_8021Q_GVRP=y > -# CONFIG_DECNET is not set > -CONFIG_LLC=m > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -CONFIG_WAN_ROUTER=m > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -CONFIG_NET_SCHED=y > - > -# > -# Queueing/Scheduling > -# > -CONFIG_NET_SCH_CBQ=m > -CONFIG_NET_SCH_HTB=m > -CONFIG_NET_SCH_HFSC=m > -CONFIG_NET_SCH_ATM=m > -CONFIG_NET_SCH_PRIO=m > -CONFIG_NET_SCH_MULTIQ=m > -CONFIG_NET_SCH_RED=m > -# CONFIG_NET_SCH_SFB is not set > -CONFIG_NET_SCH_SFQ=m > -CONFIG_NET_SCH_TEQL=m > -CONFIG_NET_SCH_TBF=m > -CONFIG_NET_SCH_GRED=m > -CONFIG_NET_SCH_DSMARK=m > -CONFIG_NET_SCH_NETEM=m > -CONFIG_NET_SCH_DRR=m > -CONFIG_NET_SCH_MQPRIO=m > -CONFIG_NET_SCH_CHOKE=m > - > -# > -# Classification > -# > -CONFIG_NET_CLS=y > -CONFIG_NET_CLS_BASIC=m > -CONFIG_NET_CLS_TCINDEX=m > -CONFIG_NET_CLS_ROUTE4=m > -CONFIG_NET_CLS_FW=m > -CONFIG_NET_CLS_U32=m > -CONFIG_CLS_U32_PERF=y > -CONFIG_CLS_U32_MARK=y > -CONFIG_NET_CLS_RSVP=m > -CONFIG_NET_CLS_RSVP6=m > -CONFIG_NET_CLS_FLOW=m > -CONFIG_NET_CLS_CGROUP=m > -# CONFIG_NET_EMATCH is not set > -# CONFIG_NET_CLS_ACT is not set > -CONFIG_NET_CLS_IND=y > -CONFIG_NET_SCH_FIFO=y > -# CONFIG_DCB is not set > -CONFIG_DNS_RESOLVER=y > -# CONFIG_BATMAN_ADV is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -CONFIG_CAN=m > -CONFIG_CAN_RAW=m > -CONFIG_CAN_BCM=m > - > -# > -# CAN Device Drivers > -# > -CONFIG_CAN_VCAN=m > -CONFIG_CAN_SLCAN=m > -# CONFIG_CAN_DEV is not set > -# CONFIG_CAN_DEBUG_DEVICES is not set > -CONFIG_IRDA=m > - > -# > -# IrDA protocols > -# > -CONFIG_IRLAN=m > -CONFIG_IRNET=m > -CONFIG_IRCOMM=m > -CONFIG_IRDA_ULTRA=y > - > -# > -# IrDA options > -# > -CONFIG_IRDA_CACHE_LAST_LSAP=y > -CONFIG_IRDA_FAST_RR=y > -CONFIG_IRDA_DEBUG=y > - > -# > -# Infrared-port device drivers > -# > - > -# > -# SIR device drivers > -# > -CONFIG_IRTTY_SIR=m > - > -# > -# Dongle support > -# > -CONFIG_DONGLE=y > -CONFIG_ESI_DONGLE=m > -CONFIG_ACTISYS_DONGLE=m > -CONFIG_TEKRAM_DONGLE=m > -CONFIG_TOIM3232_DONGLE=m > -CONFIG_LITELINK_DONGLE=m > -CONFIG_MA600_DONGLE=m > -CONFIG_GIRBIL_DONGLE=m > -CONFIG_MCP2120_DONGLE=m > -CONFIG_OLD_BELKIN_DONGLE=m > -# CONFIG_ACT200L_DONGLE is not set > -CONFIG_KINGSUN_DONGLE=m > -CONFIG_KSDAZZLE_DONGLE=m > -CONFIG_KS959_DONGLE=m > - > -# > -# FIR device drivers > -# > -CONFIG_USB_IRDA=m > -CONFIG_SIGMATEL_FIR=m > -CONFIG_MCS_FIR=m > -CONFIG_BT=y > -CONFIG_BT_L2CAP=y > -CONFIG_BT_SCO=y > -CONFIG_BT_RFCOMM=m > -CONFIG_BT_RFCOMM_TTY=y > -CONFIG_BT_BNEP=m > -CONFIG_BT_BNEP_MC_FILTER=y > -CONFIG_BT_BNEP_PROTO_FILTER=y > -CONFIG_BT_HIDP=m > - > -# > -# Bluetooth device drivers > -# > -CONFIG_BT_HCIBTUSB=y > -CONFIG_BT_HCIBTSDIO=m > -CONFIG_BT_HCIUART=y > -CONFIG_BT_HCIUART_H4=y > -CONFIG_BT_HCIUART_BCSP=y > -CONFIG_BT_HCIUART_ATH3K=y > -CONFIG_BT_HCIUART_LL=y > -CONFIG_BT_HCIBCM203X=m > -CONFIG_BT_HCIBPA10X=m > -CONFIG_BT_HCIBFUSB=m > -# CONFIG_BT_HCIVHCI is not set > -CONFIG_BT_MRVL=m > -# CONFIG_BT_MRVL_SDIO is not set > -CONFIG_BT_ATH3K=m > -CONFIG_BT_WILINK=m > -CONFIG_AF_RXRPC=m > -# CONFIG_AF_RXRPC_DEBUG is not set > -# CONFIG_RXKAD is not set > -CONFIG_FIB_RULES=y > -CONFIG_WIRELESS=y > -CONFIG_WIRELESS_EXT=y > -CONFIG_WEXT_CORE=y > -CONFIG_WEXT_PROC=y > -CONFIG_WEXT_SPY=y > -CONFIG_WEXT_PRIV=y > -CONFIG_CFG80211=m > -CONFIG_NL80211_TESTMODE=y > -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set > -# CONFIG_CFG80211_REG_DEBUG is not set > -CONFIG_CFG80211_DEFAULT_PS=y > -# CONFIG_CFG80211_DEBUGFS is not set > -# CONFIG_CFG80211_INTERNAL_REGDB is not set > -CONFIG_CFG80211_WEXT=y > -CONFIG_WIRELESS_EXT_SYSFS=y > -CONFIG_LIB80211=y > -CONFIG_LIB80211_CRYPT_WEP=m > -CONFIG_LIB80211_CRYPT_CCMP=m > -CONFIG_LIB80211_CRYPT_TKIP=m > -# CONFIG_LIB80211_DEBUG is not set > -CONFIG_MAC80211=m > -CONFIG_MAC80211_HAS_RC=y > -CONFIG_MAC80211_RC_PID=y > -# CONFIG_MAC80211_RC_MINSTREL is not set > -CONFIG_MAC80211_RC_DEFAULT_PID=y > -CONFIG_MAC80211_RC_DEFAULT="pid" > -# CONFIG_MAC80211_MESH is not set > -CONFIG_MAC80211_LEDS=y > -# CONFIG_MAC80211_DEBUGFS is not set > -# CONFIG_MAC80211_DEBUG_MENU is not set > -CONFIG_WIMAX=m > -CONFIG_WIMAX_DEBUG_LEVEL=8 > -CONFIG_RFKILL=y > -CONFIG_RFKILL_LEDS=y > -CONFIG_RFKILL_INPUT=y > -CONFIG_NET_9P=m > -# CONFIG_NET_9P_DEBUG is not set > -# CONFIG_CAIF is not set > -CONFIG_CEPH_LIB=m > -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="" > -CONFIG_DEVTMPFS=y > -CONFIG_DEVTMPFS_MOUNT=y > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -CONFIG_FW_LOADER=y > -CONFIG_FIRMWARE_IN_KERNEL=y > -CONFIG_EXTRA_FIRMWARE="" > -# CONFIG_DEBUG_DRIVER is not set > -# CONFIG_DEBUG_DEVRES is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -CONFIG_SM_FTL=m > -# CONFIG_MTD_OOPS is not set > -CONFIG_MTD_SWAP=m > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -# CONFIG_MTD_M25P80 is not set > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -CONFIG_MTD_NAND_ECC=y > -# CONFIG_MTD_NAND_ECC_SMC is not set > -CONFIG_MTD_NAND=y > -# CONFIG_MTD_NAND_VERIFY_WRITE is not set > -# CONFIG_MTD_NAND_ECC_BCH is not set > -# CONFIG_MTD_SM_COMMON is not set > -# CONFIG_MTD_NAND_MUSEUM_IDS is not set > -# CONFIG_MTD_NAND_GPIO is not set > -CONFIG_MTD_NAND_OMAP2=y > -CONFIG_MTD_NAND_IDS=y > -# CONFIG_MTD_NAND_DISKONCHIP is not set > -# CONFIG_MTD_NAND_NANDSIM is not set > -CONFIG_MTD_NAND_PLATFORM=y > -# CONFIG_MTD_ALAUDA is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > -CONFIG_MTD_UBI=y > -CONFIG_MTD_UBI_WL_THRESHOLD=4096 > -CONFIG_MTD_UBI_BEB_RESERVE=1 > -# CONFIG_MTD_UBI_GLUEBI is not set > -# CONFIG_MTD_UBI_DEBUG is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=y > -CONFIG_BLK_DEV_CRYPTOLOOP=m > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=16 > -CONFIG_BLK_DEV_RAM_SIZE=16384 > -# CONFIG_BLK_DEV_XIP is not set > -CONFIG_CDROM_PKTCDVD=m > -CONFIG_CDROM_PKTCDVD_BUFFERS=8 > -# CONFIG_CDROM_PKTCDVD_WCACHE is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -# CONFIG_BLK_DEV_RBD is not set > -# CONFIG_SENSORS_LIS3LV02D is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_APDS9802ALS is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_ISL29020 is not set > -# CONFIG_SENSORS_TSL2550 is not set > -CONFIG_SENSORS_BH1780=m > -# CONFIG_SENSORS_BH1770 is not set > -# CONFIG_SENSORS_APDS990X is not set > -CONFIG_HMC6352=m > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -CONFIG_BMP085=m > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=m > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -CONFIG_EEPROM_93CX6=y > -CONFIG_IWMC3200TOP=m > -# CONFIG_IWMC3200TOP_DEBUG is not set > -# CONFIG_IWMC3200TOP_DEBUGFS is not set > - > -# > -# Texas Instruments shared transport line discipline > -# > -CONFIG_TI_ST=m > -# CONFIG_SENSORS_LIS3_SPI is not set > -# CONFIG_SENSORS_LIS3_I2C is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -CONFIG_SCSI_MOD=y > -CONFIG_RAID_ATTRS=m > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -CONFIG_BLK_DEV_SR=y > -CONFIG_BLK_DEV_SR_VENDOR=y > -CONFIG_CHR_DEV_SG=y > -CONFIG_CHR_DEV_SCH=m > -CONFIG_SCSI_MULTI_LUN=y > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -CONFIG_SCSI_ISCSI_ATTRS=m > -# CONFIG_SCSI_SAS_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -CONFIG_ISCSI_TCP=m > -CONFIG_ISCSI_BOOT_SYSFS=m > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -# CONFIG_ATA is not set > -CONFIG_MD=y > -CONFIG_BLK_DEV_MD=m > -CONFIG_MD_LINEAR=m > -CONFIG_MD_RAID0=m > -CONFIG_MD_RAID1=m > -CONFIG_MD_RAID10=m > -CONFIG_MD_RAID456=m > -CONFIG_MD_MULTIPATH=m > -CONFIG_MD_FAULTY=m > -CONFIG_BLK_DEV_DM=m > -# CONFIG_DM_DEBUG is not set > -CONFIG_DM_CRYPT=m > -CONFIG_DM_SNAPSHOT=m > -CONFIG_DM_MIRROR=m > -CONFIG_DM_RAID=m > -# CONFIG_DM_LOG_USERSPACE is not set > -CONFIG_DM_ZERO=m > -CONFIG_DM_MULTIPATH=m > -# CONFIG_DM_MULTIPATH_QL is not set > -# CONFIG_DM_MULTIPATH_ST is not set > -CONFIG_DM_DELAY=m > -# CONFIG_DM_UEVENT is not set > -CONFIG_DM_FLAKEY=m > -CONFIG_TARGET_CORE=m > -CONFIG_TCM_IBLOCK=m > -CONFIG_TCM_FILEIO=m > -CONFIG_TCM_PSCSI=m > -CONFIG_LOOPBACK_TARGET=m > -# CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set > -CONFIG_NETDEVICES=y > -CONFIG_DUMMY=m > -CONFIG_BONDING=m > -CONFIG_MACVLAN=m > -CONFIG_MACVTAP=m > -CONFIG_EQUALIZER=m > -CONFIG_TUN=m > -CONFIG_VETH=m > -CONFIG_MII=y > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -# CONFIG_LXT_PHY is not set > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -# CONFIG_SMSC_PHY is not set > -# CONFIG_BROADCOM_PHY is not set > -CONFIG_BCM63XX_PHY=m > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -# CONFIG_LSI_ET1011C_PHY is not set > -CONFIG_MICREL_PHY=m > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -# CONFIG_AX88796 is not set > -CONFIG_SMC91X=y > -# CONFIG_TI_DAVINCI_EMAC is not set > -CONFIG_TI_DAVINCI_MDIO=m > -CONFIG_TI_DAVINCI_CPDMA=m > -# CONFIG_DM9000 is not set > -CONFIG_ENC28J60=y > -# CONFIG_ENC28J60_WRITEVERIFY is not set > -# CONFIG_ETHOC is not set > -CONFIG_SMC911X=y > -CONFIG_SMSC911X=y > -# CONFIG_SMSC911X_ARCH_HOOKS is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -CONFIG_KS8842=m > -CONFIG_KS8851=y > -# CONFIG_KS8851_MLL is not set > -# CONFIG_FTMAC100 is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_LIBERTAS_THINFIRM is not set > -CONFIG_AT76C50X_USB=m > -CONFIG_USB_ZD1201=m > -CONFIG_USB_NET_RNDIS_WLAN=m > -CONFIG_RTL8187=m > -CONFIG_RTL8187_LEDS=y > -# CONFIG_MAC80211_HWSIM is not set > -# CONFIG_ATH_COMMON is not set > -CONFIG_B43=m > -# CONFIG_B43_SDIO is not set > -CONFIG_B43_PIO=y > -CONFIG_B43_PHY_N=y > -CONFIG_B43_PHY_LP=y > -CONFIG_B43_LEDS=y > -CONFIG_B43_HWRNG=y > -# CONFIG_B43_DEBUG is not set > -# CONFIG_B43LEGACY is not set > -CONFIG_HOSTAP=m > -CONFIG_HOSTAP_FIRMWARE=y > -CONFIG_HOSTAP_FIRMWARE_NVRAM=y > -# CONFIG_IWM is not set > -CONFIG_LIBERTAS=m > -CONFIG_LIBERTAS_USB=m > -# CONFIG_LIBERTAS_SDIO is not set > -# CONFIG_LIBERTAS_SPI is not set > -# CONFIG_LIBERTAS_DEBUG is not set > -# CONFIG_LIBERTAS_MESH is not set > -CONFIG_P54_COMMON=m > -CONFIG_P54_USB=m > -# CONFIG_P54_SPI is not set > -CONFIG_P54_LEDS=y > -CONFIG_RT2X00=m > -CONFIG_RT2500USB=m > -CONFIG_RT73USB=m > -# CONFIG_RT2800USB is not set > -CONFIG_RT2X00_LIB_USB=m > -CONFIG_RT2X00_LIB=m > -CONFIG_RT2X00_LIB_FIRMWARE=y > -CONFIG_RT2X00_LIB_CRYPTO=y > -CONFIG_RT2X00_LIB_LEDS=y > -# CONFIG_RT2X00_DEBUG is not set > -CONFIG_RTL8192CU=m > -CONFIG_RTLWIFI=m > -CONFIG_RTL8192C_COMMON=m > -CONFIG_WL1251=m > -CONFIG_WL1251_SPI=m > -CONFIG_WL1251_SDIO=m > -CONFIG_WL12XX_MENU=m > -CONFIG_WL12XX=m > -CONFIG_WL12XX_HT=y > -CONFIG_WL12XX_SPI=m > -CONFIG_WL12XX_SDIO=m > -# CONFIG_WL12XX_SDIO_TEST is not set > -CONFIG_WL12XX_PLATFORM_DATA=y > -CONFIG_ZD1211RW=m > -# CONFIG_ZD1211RW_DEBUG is not set > - > -# > -# WiMAX Wireless Broadband devices > -# > -CONFIG_WIMAX_I2400M=m > -CONFIG_WIMAX_I2400M_USB=m > -CONFIG_WIMAX_I2400M_SDIO=m > -CONFIG_WIMAX_IWMC3200_SDIO=y > -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 > - > -# > -# USB Network Adapters > -# > -CONFIG_USB_CATC=y > -CONFIG_USB_KAWETH=y > -CONFIG_USB_PEGASUS=y > -CONFIG_USB_RTL8150=y > -CONFIG_USB_USBNET=y > -CONFIG_USB_NET_AX8817X=y > -CONFIG_USB_NET_CDCETHER=y > -# CONFIG_USB_NET_CDC_EEM is not set > -CONFIG_USB_NET_CDC_NCM=m > -CONFIG_USB_NET_DM9601=y > -CONFIG_USB_NET_SMSC75XX=m > -CONFIG_USB_NET_SMSC95XX=y > -CONFIG_USB_NET_GL620A=y > -CONFIG_USB_NET_NET1080=y > -CONFIG_USB_NET_PLUSB=y > -CONFIG_USB_NET_MCS7830=y > -CONFIG_USB_NET_RNDIS_HOST=y > -CONFIG_USB_NET_CDC_SUBSET=y > -CONFIG_USB_ALI_M5632=y > -CONFIG_USB_AN2720=y > -CONFIG_USB_BELKIN=y > -CONFIG_USB_ARMLINUX=y > -CONFIG_USB_EPSON2888=y > -CONFIG_USB_KC2190=y > -CONFIG_USB_NET_ZAURUS=y > -CONFIG_USB_NET_CX82310_ETH=m > -CONFIG_USB_HSO=m > -CONFIG_USB_NET_INT51X1=m > -CONFIG_USB_IPHETH=m > -CONFIG_USB_SIERRA_NET=m > -CONFIG_USB_VL600=m > -# CONFIG_WAN is not set > -CONFIG_ATM_DRIVERS=y > -# CONFIG_ATM_DUMMY is not set > -# CONFIG_ATM_TCP is not set > - > -# > -# CAIF transport drivers > -# > -CONFIG_PPP=m > -CONFIG_PPP_MULTILINK=y > -CONFIG_PPP_FILTER=y > -CONFIG_PPP_ASYNC=m > -CONFIG_PPP_SYNC_TTY=m > -CONFIG_PPP_DEFLATE=m > -CONFIG_PPP_BSDCOMP=m > -CONFIG_PPP_MPPE=m > -CONFIG_PPPOE=m > -CONFIG_PPTP=m > -# CONFIG_PPPOATM is not set > -CONFIG_PPPOL2TP=m > -# CONFIG_SLIP is not set > -CONFIG_SLHC=m > -CONFIG_NETCONSOLE=m > -CONFIG_NETCONSOLE_DYNAMIC=y > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -CONFIG_INPUT_FF_MEMLESS=y > -CONFIG_INPUT_POLLDEV=y > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -CONFIG_INPUT_MOUSEDEV=y > -CONFIG_INPUT_MOUSEDEV_PSAUX=y > -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 > -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -# CONFIG_KEYBOARD_ATKBD is not set > -CONFIG_KEYBOARD_QT1070=m > -CONFIG_KEYBOARD_QT2160=m > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_TCA6416 is not set > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_LM8323 is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -CONFIG_KEYBOARD_MCS=m > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -# CONFIG_KEYBOARD_TWL4030 is not set > -# CONFIG_KEYBOARD_XTKBD is not set > -CONFIG_INPUT_MOUSE=y > -CONFIG_MOUSE_PS2=y > -CONFIG_MOUSE_PS2_ALPS=y > -CONFIG_MOUSE_PS2_LOGIPS2PP=y > -CONFIG_MOUSE_PS2_SYNAPTICS=y > -CONFIG_MOUSE_PS2_TRACKPOINT=y > -# CONFIG_MOUSE_PS2_ELANTECH is not set > -# CONFIG_MOUSE_PS2_SENTELIC is not set > -# CONFIG_MOUSE_PS2_TOUCHKIT is not set > -# CONFIG_MOUSE_SERIAL is not set > -# CONFIG_MOUSE_APPLETOUCH is not set > -# CONFIG_MOUSE_BCM5974 is not set > -# CONFIG_MOUSE_VSXXXAA is not set > -# CONFIG_MOUSE_GPIO is not set > -# CONFIG_MOUSE_SYNAPTICS_I2C is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -# CONFIG_INPUT_TOUCHSCREEN is not set > -CONFIG_INPUT_MISC=y > -CONFIG_INPUT_AD714X=m > -CONFIG_INPUT_AD714X_I2C=m > -CONFIG_INPUT_AD714X_SPI=m > -# CONFIG_INPUT_ATI_REMOTE is not set > -# CONFIG_INPUT_ATI_REMOTE2 is not set > -# CONFIG_INPUT_KEYSPAN_REMOTE is not set > -# CONFIG_INPUT_POWERMATE is not set > -# CONFIG_INPUT_YEALINK is not set > -# CONFIG_INPUT_CM109 is not set > -CONFIG_INPUT_TWL4030_PWRBUTTON=y > -CONFIG_INPUT_TWL4030_VIBRA=m > -CONFIG_INPUT_UINPUT=y > -CONFIG_INPUT_PCF8574=m > -CONFIG_INPUT_PWM_BEEPER=m > -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set > -CONFIG_INPUT_ADXL34X=m > -CONFIG_INPUT_ADXL34X_I2C=m > -CONFIG_INPUT_ADXL34X_SPI=m > -CONFIG_INPUT_CMA3000=m > -CONFIG_INPUT_CMA3000_I2C=m > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_SERIO_PS2MULT is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -CONFIG_VT_CONSOLE=y > -CONFIG_HW_CONSOLE=y > -CONFIG_VT_HW_CONSOLE_BINDING=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -# CONFIG_LEGACY_PTYS is not set > -# CONFIG_SERIAL_NONSTANDARD is not set > -CONFIG_N_GSM=m > -CONFIG_DEVKMEM=y > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=32 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 > -CONFIG_SERIAL_8250_EXTENDED=y > -CONFIG_SERIAL_8250_MANY_PORTS=y > -CONFIG_SERIAL_8250_SHARE_IRQ=y > -CONFIG_SERIAL_8250_DETECT_IRQ=y > -CONFIG_SERIAL_8250_RSA=y > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -# CONFIG_SERIAL_MAX3107 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_SERIAL_OMAP=y > -CONFIG_SERIAL_OMAP_CONSOLE=y > -# CONFIG_SERIAL_TIMBERDALE is not set > -# CONFIG_SERIAL_ALTERA_JTAGUART is not set > -# CONFIG_SERIAL_ALTERA_UART is not set > -CONFIG_SERIAL_IFX6X60=m > -CONFIG_TTY_PRINTK=y > -# CONFIG_HVC_DCC is not set > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=y > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -# CONFIG_RAMOOPS is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_MUX=m > - > -# > -# Multiplexer I2C Chip support > -# > -CONFIG_I2C_MUX_GPIO=m > -# CONFIG_I2C_MUX_PCA9541 is not set > -# CONFIG_I2C_MUX_PCA954x is not set > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=m > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -# CONFIG_I2C_DESIGNWARE is not set > -# CONFIG_I2C_GPIO is not set > -# CONFIG_I2C_OCORES is not set > -CONFIG_I2C_OMAP=y > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_PXA_PCI is not set > -# CONFIG_I2C_SIMTEC is not set > -# CONFIG_I2C_XILINX is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -CONFIG_I2C_DIOLAN_U2C=m > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_STUB is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -CONFIG_SPI=y > -# CONFIG_SPI_DEBUG is not set > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -# CONFIG_SPI_ALTERA is not set > -# CONFIG_SPI_BITBANG is not set > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_OC_TINY is not set > -CONFIG_SPI_OMAP24XX=y > -# CONFIG_SPI_PXA2XX_PCI is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -CONFIG_SPI_SPIDEV=y > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > - > -# > -# PPS generators support > -# > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_DEBUG_GPIO is not set > -CONFIG_GPIO_SYSFS=y > -CONFIG_GPIO_MAX730X=m > - > -# > -# Memory mapped GPIO expanders: > -# > -# CONFIG_GPIO_BASIC_MMIO is not set > -# CONFIG_GPIO_IT8761E is not set > - > -# > -# I2C GPIO expanders: > -# > -CONFIG_GPIO_MAX7300=m > -# CONFIG_GPIO_MAX732X is not set > -# CONFIG_GPIO_PCF857X is not set > -# CONFIG_GPIO_SX150X is not set > -CONFIG_GPIO_TWL4030=y > -CONFIG_GPIO_ADP5588=m > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > -# CONFIG_GPIO_74X164 is not set > - > -# > -# AC97 GPIO expanders: > -# > - > -# > -# MODULbus GPIO expanders: > -# > -# CONFIG_W1 is not set > -CONFIG_POWER_SUPPLY=m > -# CONFIG_POWER_SUPPLY_DEBUG is not set > -# CONFIG_PDA_POWER is not set > -CONFIG_TEST_POWER=m > -# CONFIG_BATTERY_DS2782 is not set > -# CONFIG_BATTERY_BQ20Z75 is not set > -# CONFIG_BATTERY_BQ27x00 is not set > -# CONFIG_BATTERY_MAX17040 is not set > -CONFIG_BATTERY_MAX17042=m > -CONFIG_CHARGER_ISP1704=m > -CONFIG_CHARGER_TWL4030=m > -CONFIG_CHARGER_GPIO=m > -CONFIG_HWMON=y > -# CONFIG_HWMON_VID is not set > -# CONFIG_HWMON_DEBUG_CHIP is not set > - > -# > -# Native drivers > -# > -# CONFIG_SENSORS_AD7414 is not set > -# CONFIG_SENSORS_AD7418 is not set > -# CONFIG_SENSORS_ADCXX is not set > -# CONFIG_SENSORS_ADM1021 is not set > -# CONFIG_SENSORS_ADM1025 is not set > -# CONFIG_SENSORS_ADM1026 is not set > -# CONFIG_SENSORS_ADM1029 is not set > -# CONFIG_SENSORS_ADM1031 is not set > -# CONFIG_SENSORS_ADM9240 is not set > -CONFIG_SENSORS_ADT7411=m > -# CONFIG_SENSORS_ADT7462 is not set > -# CONFIG_SENSORS_ADT7470 is not set > -# CONFIG_SENSORS_ADT7475 is not set > -CONFIG_SENSORS_ASC7621=m > -# CONFIG_SENSORS_ATXP1 is not set > -CONFIG_SENSORS_DS620=m > -# CONFIG_SENSORS_DS1621 is not set > -# CONFIG_SENSORS_F71805F is not set > -# CONFIG_SENSORS_F71882FG is not set > -# CONFIG_SENSORS_F75375S is not set > -# CONFIG_SENSORS_G760A is not set > -# CONFIG_SENSORS_GL518SM is not set > -# CONFIG_SENSORS_GL520SM is not set > -CONFIG_SENSORS_GPIO_FAN=m > -# CONFIG_SENSORS_IT87 is not set > -CONFIG_SENSORS_JC42=m > -# CONFIG_SENSORS_LINEAGE is not set > -# CONFIG_SENSORS_LM63 is not set > -# CONFIG_SENSORS_LM70 is not set > -# CONFIG_SENSORS_LM73 is not set > -# CONFIG_SENSORS_LM75 is not set > -# CONFIG_SENSORS_LM77 is not set > -# CONFIG_SENSORS_LM78 is not set > -# CONFIG_SENSORS_LM80 is not set > -# CONFIG_SENSORS_LM83 is not set > -# CONFIG_SENSORS_LM85 is not set > -# CONFIG_SENSORS_LM87 is not set > -# CONFIG_SENSORS_LM90 is not set > -# CONFIG_SENSORS_LM92 is not set > -# CONFIG_SENSORS_LM93 is not set > -# CONFIG_SENSORS_LTC4151 is not set > -# CONFIG_SENSORS_LTC4215 is not set > -# CONFIG_SENSORS_LTC4245 is not set > -# CONFIG_SENSORS_LTC4261 is not set > -# CONFIG_SENSORS_LM95241 is not set > -# CONFIG_SENSORS_MAX1111 is not set > -# CONFIG_SENSORS_MAX1619 is not set > -# CONFIG_SENSORS_MAX6639 is not set > -# CONFIG_SENSORS_MAX6650 is not set > -# CONFIG_SENSORS_PC87360 is not set > -# CONFIG_SENSORS_PC87427 is not set > -# CONFIG_SENSORS_PCF8591 is not set > -# CONFIG_PMBUS is not set > -# CONFIG_SENSORS_SHT15 is not set > -# CONFIG_SENSORS_SHT21 is not set > -CONFIG_SENSORS_SMM665=m > -# CONFIG_SENSORS_DME1737 is not set > -CONFIG_SENSORS_EMC1403=m > -CONFIG_SENSORS_EMC2103=m > -# CONFIG_SENSORS_SMSC47M1 is not set > -# CONFIG_SENSORS_SMSC47M192 is not set > -# CONFIG_SENSORS_SMSC47B397 is not set > -# CONFIG_SENSORS_SCH5627 is not set > -# CONFIG_SENSORS_ADS1015 is not set > -# CONFIG_SENSORS_ADS7828 is not set > -CONFIG_SENSORS_ADS7871=m > -CONFIG_SENSORS_AMC6821=m > -# CONFIG_SENSORS_THMC50 is not set > -CONFIG_SENSORS_TMP102=m > -# CONFIG_SENSORS_TMP401 is not set > -# CONFIG_SENSORS_TMP421 is not set > -CONFIG_SENSORS_TWL4030_MADC=m > -# CONFIG_SENSORS_VT1211 is not set > -# CONFIG_SENSORS_W83781D is not set > -# CONFIG_SENSORS_W83791D is not set > -# CONFIG_SENSORS_W83792D is not set > -# CONFIG_SENSORS_W83793 is not set > -# CONFIG_SENSORS_W83795 is not set > -# CONFIG_SENSORS_W83L785TS is not set > -# CONFIG_SENSORS_W83L786NG is not set > -# CONFIG_SENSORS_W83627HF is not set > -# CONFIG_SENSORS_W83627EHF is not set > -CONFIG_THERMAL=y > -CONFIG_THERMAL_HWMON=y > -CONFIG_WATCHDOG=y > -CONFIG_WATCHDOG_NOWAYOUT=y > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_OMAP_WATCHDOG=y > -# CONFIG_TWL4030_WATCHDOG is not set > -# CONFIG_MAX63XX_WATCHDOG is not set > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -CONFIG_SSB=y > -CONFIG_SSB_BLOCKIO=y > -CONFIG_SSB_SDIOHOST_POSSIBLE=y > -# CONFIG_SSB_SDIOHOST is not set > -# CONFIG_SSB_SILENT is not set > -# CONFIG_SSB_DEBUG is not set > -CONFIG_MFD_SUPPORT=y > -CONFIG_MFD_CORE=y > -# CONFIG_MFD_88PM860X is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_HTC_I2CPLD is not set > -CONFIG_TPS6105X=m > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507X=m > -CONFIG_TWL4030_CORE=y > -CONFIG_TWL4030_MADC=m > -CONFIG_TWL4030_POWER=y > -CONFIG_TWL4030_SCRIPT=y > -CONFIG_TWL4030_CODEC=y > -CONFIG_TWL4030_POWEROFF=y > -CONFIG_TWL6030_PWM=m > -# CONFIG_MFD_STMPE is not set > -# CONFIG_MFD_TC3589X is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_MAX8925 is not set > -# CONFIG_MFD_MAX8997 is not set > -# CONFIG_MFD_MAX8998 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X_I2C is not set > -# CONFIG_MFD_WM831X_SPI is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_WM8994 is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13XXX is not set > -# CONFIG_ABX500_CORE is not set > -# CONFIG_EZX_PCAP is not set > -CONFIG_MFD_TPS6586X=y > -CONFIG_MFD_WL1273_CORE=m > -CONFIG_MFD_OMAP_USB_HOST=y > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -CONFIG_REGULATOR_DUMMY=y > -CONFIG_REGULATOR_FIXED_VOLTAGE=y > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8649 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_MAX8952 is not set > -CONFIG_REGULATOR_TWL4030=y > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_LP3972 is not set > -CONFIG_REGULATOR_TPS6105X=m > -# CONFIG_REGULATOR_TPS65023 is not set > -# CONFIG_REGULATOR_TPS6507X is not set > -# CONFIG_REGULATOR_ISL6271A is not set > -# CONFIG_REGULATOR_AD5398 is not set > -CONFIG_REGULATOR_TPS6586X=m > -CONFIG_REGULATOR_TPS6524X=m > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_MEDIA_CONTROLLER=y > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_V4L2_SUBDEV_API=y > -CONFIG_DVB_CORE=m > -CONFIG_VIDEO_MEDIA=m > - > -# > -# Multimedia drivers > -# > -CONFIG_RC_CORE=m > -CONFIG_LIRC=m > -CONFIG_RC_MAP=m > -CONFIG_IR_NEC_DECODER=m > -CONFIG_IR_RC5_DECODER=m > -CONFIG_IR_RC6_DECODER=m > -CONFIG_IR_JVC_DECODER=m > -CONFIG_IR_SONY_DECODER=m > -CONFIG_IR_RC5_SZ_DECODER=m > -CONFIG_IR_LIRC_CODEC=m > -# CONFIG_IR_IMON is not set > -# CONFIG_IR_MCEUSB is not set > -# CONFIG_IR_STREAMZAP is not set > -CONFIG_RC_LOOPBACK=m > -CONFIG_MEDIA_ATTACH=y > -CONFIG_MEDIA_TUNER=m > -CONFIG_MEDIA_TUNER_CUSTOMISE=y > - > -# > -# Customize TV tuners > -# > -CONFIG_MEDIA_TUNER_SIMPLE=m > -CONFIG_MEDIA_TUNER_TDA8290=m > -CONFIG_MEDIA_TUNER_TDA827X=m > -CONFIG_MEDIA_TUNER_TDA18271=m > -CONFIG_MEDIA_TUNER_TDA9887=m > -CONFIG_MEDIA_TUNER_TEA5761=m > -CONFIG_MEDIA_TUNER_TEA5767=m > -CONFIG_MEDIA_TUNER_MT20XX=m > -CONFIG_MEDIA_TUNER_MT2060=m > -CONFIG_MEDIA_TUNER_MT2266=m > -CONFIG_MEDIA_TUNER_MT2131=m > -CONFIG_MEDIA_TUNER_QT1010=m > -CONFIG_MEDIA_TUNER_XC2028=m > -CONFIG_MEDIA_TUNER_XC5000=m > -CONFIG_MEDIA_TUNER_MXL5005S=m > -CONFIG_MEDIA_TUNER_MXL5007T=m > -CONFIG_MEDIA_TUNER_MC44S803=m > -CONFIG_MEDIA_TUNER_MAX2165=m > -CONFIG_MEDIA_TUNER_TDA18218=m > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_VMALLOC=m > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEOBUF_DVB=m > -CONFIG_VIDEO_TVEEPROM=m > -CONFIG_VIDEO_TUNER=m > -CONFIG_V4L2_MEM2MEM_DEV=m > -CONFIG_VIDEOBUF2_CORE=m > -CONFIG_VIDEOBUF2_MEMOPS=m > -CONFIG_VIDEOBUF2_VMALLOC=m > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -CONFIG_VIDEO_IR_I2C=m > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -CONFIG_VIDEO_MSP3400=m > -# CONFIG_VIDEO_CS5345 is not set > -CONFIG_VIDEO_CS53L32A=m > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -CONFIG_VIDEO_WM8775=m > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -CONFIG_VIDEO_ADV7180=m > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -CONFIG_VIDEO_OV7670=m > -CONFIG_VIDEO_MT9P031=y > -CONFIG_VIDEO_MT9V011=m > -CONFIG_VIDEO_MT9V032=y > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -CONFIG_VIDEO_SAA711X=m > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -CONFIG_VIDEO_TVP514X=m > -CONFIG_VIDEO_TVP5150=m > -CONFIG_VIDEO_TVP7002=m > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -CONFIG_VIDEO_CX25840=m > - > -# > -# MPEG video encoders > -# > -CONFIG_VIDEO_CX2341X=m > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > -# CONFIG_VIDEO_AK881X is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -CONFIG_VIDEO_VIVI=m > -CONFIG_VIDEO_VPSS_SYSTEM=m > -CONFIG_VIDEO_VPFE_CAPTURE=y > -CONFIG_VIDEO_DM6446_CCDC=m > -CONFIG_VIDEO_OMAP2_VOUT=y > -# CONFIG_VIDEO_CPIA2 is not set > -CONFIG_VIDEO_TIMBERDALE=m > -# CONFIG_VIDEO_AU0828 is not set > -CONFIG_VIDEO_SR030PC30=m > -CONFIG_VIDEO_NOON010PC30=m > -CONFIG_VIDEO_OMAP3=y > -CONFIG_VIDEO_OMAP3_DEBUG=y > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=m > -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y > -CONFIG_USB_GSPCA=m > -CONFIG_USB_M5602=m > -CONFIG_USB_STV06XX=m > -# CONFIG_USB_GL860 is not set > -CONFIG_USB_GSPCA_BENQ=m > -CONFIG_USB_GSPCA_CONEX=m > -CONFIG_USB_GSPCA_CPIA1=m > -CONFIG_USB_GSPCA_ETOMS=m > -CONFIG_USB_GSPCA_FINEPIX=m > -# CONFIG_USB_GSPCA_JEILINJ is not set > -CONFIG_USB_GSPCA_KONICA=m > -CONFIG_USB_GSPCA_MARS=m > -# CONFIG_USB_GSPCA_MR97310A is not set > -CONFIG_USB_GSPCA_NW80X=m > -CONFIG_USB_GSPCA_OV519=m > -CONFIG_USB_GSPCA_OV534=m > -CONFIG_USB_GSPCA_OV534_9=m > -CONFIG_USB_GSPCA_PAC207=m > -# CONFIG_USB_GSPCA_PAC7302 is not set > -CONFIG_USB_GSPCA_PAC7311=m > -CONFIG_USB_GSPCA_SN9C2028=m > -# CONFIG_USB_GSPCA_SN9C20X is not set > -CONFIG_USB_GSPCA_SONIXB=m > -CONFIG_USB_GSPCA_SONIXJ=m > -CONFIG_USB_GSPCA_SPCA500=m > -CONFIG_USB_GSPCA_SPCA501=m > -CONFIG_USB_GSPCA_SPCA505=m > -CONFIG_USB_GSPCA_SPCA506=m > -CONFIG_USB_GSPCA_SPCA508=m > -CONFIG_USB_GSPCA_SPCA561=m > -CONFIG_USB_GSPCA_SPCA1528=m > -# CONFIG_USB_GSPCA_SQ905 is not set > -# CONFIG_USB_GSPCA_SQ905C is not set > -CONFIG_USB_GSPCA_SQ930X=m > -CONFIG_USB_GSPCA_STK014=m > -# CONFIG_USB_GSPCA_STV0680 is not set > -CONFIG_USB_GSPCA_SUNPLUS=m > -CONFIG_USB_GSPCA_T613=m > -CONFIG_USB_GSPCA_TV8532=m > -CONFIG_USB_GSPCA_VC032X=m > -CONFIG_USB_GSPCA_VICAM=m > -CONFIG_USB_GSPCA_XIRLINK_CIT=m > -CONFIG_USB_GSPCA_ZC3XX=m > -CONFIG_VIDEO_PVRUSB2=m > -CONFIG_VIDEO_PVRUSB2_SYSFS=y > -CONFIG_VIDEO_PVRUSB2_DVB=y > -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set > -CONFIG_VIDEO_HDPVR=m > -CONFIG_VIDEO_EM28XX=m > -CONFIG_VIDEO_EM28XX_ALSA=m > -CONFIG_VIDEO_EM28XX_DVB=m > -CONFIG_VIDEO_TLG2300=m > -CONFIG_VIDEO_CX231XX=m > -CONFIG_VIDEO_CX231XX_RC=y > -# CONFIG_VIDEO_CX231XX_ALSA is not set > -CONFIG_VIDEO_CX231XX_DVB=m > -CONFIG_VIDEO_USBVISION=m > -CONFIG_USB_ET61X251=m > -CONFIG_USB_SN9C102=m > -CONFIG_USB_PWC=m > -# CONFIG_USB_PWC_DEBUG is not set > -CONFIG_USB_PWC_INPUT_EVDEV=y > -CONFIG_USB_ZR364XX=m > -CONFIG_USB_STKWEBCAM=m > -CONFIG_USB_S2255=m > -CONFIG_V4L_MEM2MEM_DRIVERS=y > -CONFIG_VIDEO_MEM2MEM_TESTDEV=m > -CONFIG_RADIO_ADAPTERS=y > -# CONFIG_I2C_SI4713 is not set > -# CONFIG_RADIO_SI4713 is not set > -# CONFIG_USB_DSBR is not set > -# CONFIG_RADIO_SI470X is not set > -# CONFIG_USB_MR800 is not set > -# CONFIG_RADIO_TEA5764 is not set > -CONFIG_RADIO_SAA7706H=m > -# CONFIG_RADIO_TEF6862 is not set > -CONFIG_RADIO_WL1273=m > - > -# > -# Texas Instruments WL128x FM driver (ST based) > -# > -CONFIG_RADIO_WL128X=m > -CONFIG_DVB_MAX_ADAPTERS=8 > -CONFIG_DVB_DYNAMIC_MINORS=y > -CONFIG_DVB_CAPTURE_DRIVERS=y > -# CONFIG_TTPCI_EEPROM is not set > - > -# > -# Supported USB Adapters > -# > -CONFIG_DVB_USB=m > -# CONFIG_DVB_USB_DEBUG is not set > -CONFIG_DVB_USB_A800=m > -CONFIG_DVB_USB_DIBUSB_MB=m > -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set > -CONFIG_DVB_USB_DIBUSB_MC=m > -CONFIG_DVB_USB_DIB0700=m > -CONFIG_DVB_USB_UMT_010=m > -CONFIG_DVB_USB_CXUSB=m > -CONFIG_DVB_USB_M920X=m > -CONFIG_DVB_USB_GL861=m > -CONFIG_DVB_USB_AU6610=m > -CONFIG_DVB_USB_DIGITV=m > -CONFIG_DVB_USB_VP7045=m > -CONFIG_DVB_USB_VP702X=m > -CONFIG_DVB_USB_GP8PSK=m > -CONFIG_DVB_USB_NOVA_T_USB2=m > -CONFIG_DVB_USB_TTUSB2=m > -CONFIG_DVB_USB_DTT200U=m > -CONFIG_DVB_USB_OPERA1=m > -CONFIG_DVB_USB_AF9005=m > -CONFIG_DVB_USB_AF9005_REMOTE=m > -CONFIG_DVB_USB_DW2102=m > -CONFIG_DVB_USB_CINERGY_T2=m > -CONFIG_DVB_USB_ANYSEE=m > -CONFIG_DVB_USB_DTV5100=m > -CONFIG_DVB_USB_AF9015=m > -# CONFIG_DVB_USB_CE6230 is not set > -# CONFIG_DVB_USB_FRIIO is not set > -# CONFIG_DVB_USB_EC168 is not set > -CONFIG_DVB_USB_AZ6027=m > -CONFIG_DVB_USB_LME2510=m > -CONFIG_DVB_USB_TECHNISAT_USB2=m > -# CONFIG_SMS_SIANO_MDTV is not set > - > -# > -# Supported FlexCopII (B2C2) Adapters > -# > -CONFIG_DVB_B2C2_FLEXCOP=m > -CONFIG_DVB_B2C2_FLEXCOP_USB=m > -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set > - > -# > -# Supported DVB Frontends > -# > -# CONFIG_DVB_FE_CUSTOMISE is not set > - > -# > -# Multistandard (satellite) frontends > -# > -CONFIG_DVB_STB0899=m > -CONFIG_DVB_STB6100=m > -CONFIG_DVB_STV090x=m > -CONFIG_DVB_STV6110x=m > - > -# > -# DVB-S (satellite) frontends > -# > -CONFIG_DVB_CX24123=m > -CONFIG_DVB_MT312=m > -CONFIG_DVB_ZL10039=m > -CONFIG_DVB_S5H1420=m > -CONFIG_DVB_STV0288=m > -CONFIG_DVB_STB6000=m > -CONFIG_DVB_STV0299=m > -CONFIG_DVB_STV6110=m > -CONFIG_DVB_STV0900=m > -CONFIG_DVB_TDA10086=m > -CONFIG_DVB_TUNER_ITD1000=m > -CONFIG_DVB_TUNER_CX24113=m > -CONFIG_DVB_TDA826X=m > -CONFIG_DVB_CX24116=m > -CONFIG_DVB_SI21XX=m > -CONFIG_DVB_DS3000=m > - > -# > -# DVB-T (terrestrial) frontends > -# > -CONFIG_DVB_CX22702=m > -CONFIG_DVB_TDA1004X=m > -CONFIG_DVB_NXT6000=m > -CONFIG_DVB_MT352=m > -CONFIG_DVB_ZL10353=m > -CONFIG_DVB_DIB3000MB=m > -CONFIG_DVB_DIB3000MC=m > -CONFIG_DVB_DIB7000M=m > -CONFIG_DVB_DIB7000P=m > -CONFIG_DVB_TDA10048=m > -CONFIG_DVB_AF9013=m > - > -# > -# DVB-C (cable) frontends > -# > -CONFIG_DVB_TDA10023=m > -CONFIG_DVB_STV0297=m > - > -# > -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends > -# > -CONFIG_DVB_NXT200X=m > -CONFIG_DVB_BCM3510=m > -CONFIG_DVB_LGDT330X=m > -CONFIG_DVB_LGDT3305=m > -CONFIG_DVB_S5H1409=m > -CONFIG_DVB_S5H1411=m > - > -# > -# ISDB-T (terrestrial) frontends > -# > -CONFIG_DVB_S921=m > -CONFIG_DVB_DIB8000=m > -CONFIG_DVB_MB86A20S=m > - > -# > -# Digital terrestrial only tuners/PLL > -# > -CONFIG_DVB_PLL=m > -CONFIG_DVB_TUNER_DIB0070=m > -CONFIG_DVB_TUNER_DIB0090=m > - > -# > -# SEC control devices for DVB-S > -# > -CONFIG_DVB_LNBP21=m > -CONFIG_DVB_ISL6421=m > -CONFIG_DVB_LGS8GXX=m > -CONFIG_DVB_ATBM8830=m > -CONFIG_DVB_IX2505V=m > - > -# > -# Tools to develop new frontends > -# > -# CONFIG_DVB_DUMMY_FE is not set > - > -# > -# Graphics support > -# > -CONFIG_DRM=m > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -CONFIG_FB_SYS_FILLRECT=m > -CONFIG_FB_SYS_COPYAREA=m > -CONFIG_FB_SYS_IMAGEBLIT=m > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -CONFIG_FB_SYS_FOPS=m > -# CONFIG_FB_WMT_GE_ROPS is not set > -CONFIG_FB_DEFERRED_IO=y > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -CONFIG_FB_MODE_HELPERS=y > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_TMIO is not set > -CONFIG_FB_UDL=m > -# CONFIG_FB_VIRTUAL is not set > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set > -CONFIG_OMAP2_VRAM=y > -CONFIG_OMAP2_VRFB=y > -CONFIG_OMAP2_DSS=y > -CONFIG_OMAP2_VRAM_SIZE=14 > -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y > -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set > -CONFIG_OMAP2_DSS_DPI=y > -# CONFIG_OMAP2_DSS_RFBI is not set > -CONFIG_OMAP2_DSS_VENC=y > -# CONFIG_OMAP2_DSS_SDI is not set > -CONFIG_OMAP2_DSS_DSI=y > -CONFIG_OMAP2_DSS_USE_DSI_PLL=y > -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set > -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 > -CONFIG_FB_OMAP2=y > -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y > -CONFIG_FB_OMAP2_NUM_FBS=2 > - > -# > -# OMAP2/3 Display Device Drivers > -# > -CONFIG_PANEL_GENERIC_DPI=y > -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set > -CONFIG_PANEL_SHARP_LS037V7DW01=y > -CONFIG_PANEL_NEC_NL8048HL11_01B=y > -# CONFIG_PANEL_TAAL is not set > -CONFIG_PANEL_TPO_TD043MTEA1=m > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > -CONFIG_BACKLIGHT_CLASS_DEVICE=y > - > -# > -# Display device support > -# > -CONFIG_DISPLAY_SUPPORT=y > - > -# > -# Display hardware drivers > -# > - > -# > -# Console display driver support > -# > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -# CONFIG_LOGO_LINUX_MONO is not set > -# CONFIG_LOGO_LINUX_VGA16 is not set > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -CONFIG_SOUND_OSS_CORE=y > -CONFIG_SOUND_OSS_CORE_PRECLAIM=y > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -CONFIG_SND_SEQUENCER=m > -# CONFIG_SND_SEQ_DUMMY is not set > -CONFIG_SND_OSSEMUL=y > -CONFIG_SND_MIXER_OSS=y > -CONFIG_SND_PCM_OSS=y > -CONFIG_SND_PCM_OSS_PLUGINS=y > -CONFIG_SND_SEQUENCER_OSS=y > -CONFIG_SND_HRTIMER=m > -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y > -CONFIG_SND_DYNAMIC_MINORS=y > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -CONFIG_SND_RAWMIDI_SEQ=m > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -CONFIG_SND_ALOOP=m > -# CONFIG_SND_VIRMIDI is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -# CONFIG_SND_ARM is not set > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -CONFIG_SND_USB_UA101=m > -CONFIG_SND_USB_CAIAQ=m > -CONFIG_SND_USB_CAIAQ_INPUT=y > -CONFIG_SND_USB_6FIRE=m > -CONFIG_SND_SOC=y > -CONFIG_SND_SOC_CACHE_LZO=y > -CONFIG_SND_OMAP_SOC=y > -CONFIG_SND_OMAP_SOC_MCBSP=y > -CONFIG_SND_OMAP_SOC_OVERO=y > -CONFIG_SND_OMAP_SOC_OMAP3EVM=y > -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y > -CONFIG_SND_OMAP_SOC_ZOOM2=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TWL4030=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_3M_PCT is not set > -CONFIG_HID_A4TECH=y > -CONFIG_HID_ACRUX=m > -# CONFIG_HID_ACRUX_FF is not set > -CONFIG_HID_APPLE=y > -CONFIG_HID_BELKIN=y > -# CONFIG_HID_CANDO is not set > -CONFIG_HID_CHERRY=y > -CONFIG_HID_CHICONY=y > -# CONFIG_HID_PRODIKEYS is not set > -CONFIG_HID_CYPRESS=y > -# CONFIG_HID_DRAGONRISE is not set > -CONFIG_HID_EMS_FF=m > -# CONFIG_HID_ELECOM is not set > -CONFIG_HID_EZKEY=y > -CONFIG_HID_KEYTOUCH=m > -# CONFIG_HID_KYE is not set > -CONFIG_HID_UCLOGIC=m > -CONFIG_HID_WALTOP=m > -CONFIG_HID_GYRATION=y > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -CONFIG_HID_LCPOWER=m > -CONFIG_HID_LOGITECH=y > -# CONFIG_LOGITECH_FF is not set > -# CONFIG_LOGIRUMBLEPAD2_FF is not set > -# CONFIG_LOGIG940_FF is not set > -# CONFIG_LOGIWII_FF is not set > -CONFIG_HID_MAGICMOUSE=m > -CONFIG_HID_MICROSOFT=y > -# CONFIG_HID_MOSART is not set > -CONFIG_HID_MONTEREY=y > -CONFIG_HID_MULTITOUCH=m > -CONFIG_HID_NTRIG=y > -# CONFIG_HID_ORTEK is not set > -CONFIG_HID_PANTHERLORD=y > -# CONFIG_PANTHERLORD_FF is not set > -CONFIG_HID_PETALYNX=y > -CONFIG_HID_PICOLCD=m > -CONFIG_HID_PICOLCD_FB=y > -CONFIG_HID_PICOLCD_BACKLIGHT=y > -CONFIG_HID_PICOLCD_LEDS=y > -CONFIG_HID_QUANTA=m > -CONFIG_HID_ROCCAT=m > -CONFIG_HID_ROCCAT_COMMON=m > -CONFIG_HID_ROCCAT_ARVO=m > -CONFIG_HID_ROCCAT_KONE=m > -CONFIG_HID_ROCCAT_KONEPLUS=m > -CONFIG_HID_ROCCAT_KOVAPLUS=m > -# CONFIG_HID_ROCCAT_PYRA is not set > -CONFIG_HID_SAMSUNG=y > -CONFIG_HID_SONY=y > -CONFIG_HID_STANTUM=m > -CONFIG_HID_SUNPLUS=y > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -CONFIG_HID_TOPSEED=y > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_WACOM is not set > -# CONFIG_HID_ZEROPLUS is not set > -# CONFIG_HID_ZYDACRON is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -CONFIG_USB_ARCH_HAS_EHCI=y > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y > - > -# > -# Miscellaneous USB options > -# > -CONFIG_USB_DEVICEFS=y > -CONFIG_USB_DEVICE_CLASS=y > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -CONFIG_USB_OTG=y > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -CONFIG_USB_MON=y > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -CONFIG_USB_EHCI_HCD=y > -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set > -CONFIG_USB_EHCI_TT_NEWSCHED=y > -CONFIG_USB_EHCI_HCD_OMAP=y > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -# CONFIG_USB_OHCI_HCD is not set > -# CONFIG_USB_U132_HCD is not set > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -# CONFIG_USB_MUSB_TUSB6010 is not set > -CONFIG_USB_MUSB_OMAP2PLUS=y > -# CONFIG_USB_MUSB_AM35X is not set > -# CONFIG_USB_MUSB_HOST is not set > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -CONFIG_USB_MUSB_OTG=y > -CONFIG_USB_GADGET_MUSB_HDRC=y > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -CONFIG_USB_INVENTRA_DMA=y > -# CONFIG_USB_TI_CPPI_DMA is not set > -# CONFIG_USB_MUSB_DEBUG is not set > - > -# > -# USB Device Class drivers > -# > -CONFIG_USB_ACM=m > -CONFIG_USB_PRINTER=m > -CONFIG_USB_WDM=m > -CONFIG_USB_TMC=m > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -CONFIG_USB_STORAGE_REALTEK=m > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -CONFIG_USB_STORAGE_ENE_UB6250=m > -CONFIG_USB_UAS=m > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -CONFIG_USB_SERIAL=m > -CONFIG_USB_EZUSB=y > -CONFIG_USB_SERIAL_GENERIC=y > -CONFIG_USB_SERIAL_AIRCABLE=m > -CONFIG_USB_SERIAL_ARK3116=m > -CONFIG_USB_SERIAL_BELKIN=m > -CONFIG_USB_SERIAL_CH341=m > -# CONFIG_USB_SERIAL_WHITEHEAT is not set > -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m > -# CONFIG_USB_SERIAL_CP210X is not set > -CONFIG_USB_SERIAL_CYPRESS_M8=m > -CONFIG_USB_SERIAL_EMPEG=m > -CONFIG_USB_SERIAL_FTDI_SIO=m > -CONFIG_USB_SERIAL_FUNSOFT=m > -CONFIG_USB_SERIAL_VISOR=m > -CONFIG_USB_SERIAL_IPAQ=m > -CONFIG_USB_SERIAL_IR=m > -CONFIG_USB_SERIAL_EDGEPORT=m > -CONFIG_USB_SERIAL_EDGEPORT_TI=m > -CONFIG_USB_SERIAL_GARMIN=m > -CONFIG_USB_SERIAL_IPW=m > -CONFIG_USB_SERIAL_IUU=m > -CONFIG_USB_SERIAL_KEYSPAN_PDA=m > -CONFIG_USB_SERIAL_KEYSPAN=m > -CONFIG_USB_SERIAL_KEYSPAN_MPR=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19=y > -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y > -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y > -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y > -CONFIG_USB_SERIAL_KLSI=m > -CONFIG_USB_SERIAL_KOBIL_SCT=m > -CONFIG_USB_SERIAL_MCT_U232=m > -CONFIG_USB_SERIAL_MOS7720=m > -CONFIG_USB_SERIAL_MOS7840=m > -CONFIG_USB_SERIAL_MOTOROLA=m > -CONFIG_USB_SERIAL_NAVMAN=m > -CONFIG_USB_SERIAL_PL2303=m > -CONFIG_USB_SERIAL_OTI6858=m > -CONFIG_USB_SERIAL_QCAUX=m > -# CONFIG_USB_SERIAL_QUALCOMM is not set > -CONFIG_USB_SERIAL_SPCP8X5=m > -CONFIG_USB_SERIAL_HP4X=m > -CONFIG_USB_SERIAL_SAFE=m > -# CONFIG_USB_SERIAL_SAFE_PADDED is not set > -CONFIG_USB_SERIAL_SAMBA=m > -CONFIG_USB_SERIAL_SIEMENS_MPI=m > -CONFIG_USB_SERIAL_SIERRAWIRELESS=m > -# CONFIG_USB_SERIAL_SYMBOL is not set > -# CONFIG_USB_SERIAL_TI is not set > -CONFIG_USB_SERIAL_CYBERJACK=m > -# CONFIG_USB_SERIAL_XIRCOM is not set > -# CONFIG_USB_SERIAL_OPTION is not set > -CONFIG_USB_SERIAL_OMNINET=m > -CONFIG_USB_SERIAL_OPTICON=m > -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m > -CONFIG_USB_SERIAL_ZIO=m > -CONFIG_USB_SERIAL_SSU100=m > -CONFIG_USB_SERIAL_DEBUG=m > - > -# > -# USB Miscellaneous drivers > -# > -CONFIG_USB_EMI62=m > -CONFIG_USB_EMI26=m > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -CONFIG_USB_LEGOTOWER=m > -CONFIG_USB_LCD=m > -CONFIG_USB_LED=m > -CONFIG_USB_CYPRESS_CY7C63=m > -CONFIG_USB_CYTHERM=m > -CONFIG_USB_IDMOUSE=m > -CONFIG_USB_FTDI_ELAN=m > -# CONFIG_USB_APPLEDISPLAY is not set > -CONFIG_USB_SISUSBVGA=m > -CONFIG_USB_SISUSBVGA_CON=y > -CONFIG_USB_LD=m > -CONFIG_USB_TRANCEVIBRATOR=m > -# CONFIG_USB_IOWARRIOR is not set > -CONFIG_USB_TEST=m > -# CONFIG_USB_ISIGHTFW is not set > -CONFIG_USB_YUREX=m > -CONFIG_USB_ATM=m > -CONFIG_USB_SPEEDTOUCH=m > -CONFIG_USB_CXACRU=m > -CONFIG_USB_UEAGLEATM=m > -CONFIG_USB_XUSBATM=m > -CONFIG_USB_GADGET=y > -# CONFIG_USB_GADGET_DEBUG is not set > -# CONFIG_USB_GADGET_DEBUG_FILES is not set > -CONFIG_USB_GADGET_DEBUG_FS=y > -CONFIG_USB_GADGET_VBUS_DRAW=480 > -CONFIG_USB_GADGET_SELECTED=y > -# CONFIG_USB_GADGET_FUSB300 is not set > -# CONFIG_USB_GADGET_OMAP is not set > -# CONFIG_USB_GADGET_R8A66597 is not set > -# CONFIG_USB_GADGET_PXA_U2O is not set > -# CONFIG_USB_GADGET_M66592 is not set > -# CONFIG_USB_GADGET_DUMMY_HCD is not set > -CONFIG_USB_GADGET_DUALSPEED=y > -# CONFIG_USB_ZERO is not set > -# CONFIG_USB_AUDIO is not set > -CONFIG_USB_ETH=m > -CONFIG_USB_ETH_RNDIS=y > -# CONFIG_USB_ETH_EEM is not set > -CONFIG_USB_G_NCM=m > -# CONFIG_USB_GADGETFS is not set > -CONFIG_USB_FUNCTIONFS=m > -# CONFIG_USB_FUNCTIONFS_ETH is not set > -CONFIG_USB_FUNCTIONFS_RNDIS=y > -# CONFIG_USB_FUNCTIONFS_GENERIC is not set > -# CONFIG_USB_FILE_STORAGE is not set > -# CONFIG_USB_MASS_STORAGE is not set > -# CONFIG_USB_G_SERIAL is not set > -# CONFIG_USB_MIDI_GADGET is not set > -# CONFIG_USB_G_PRINTER is not set > -# CONFIG_USB_CDC_COMPOSITE is not set > -# CONFIG_USB_G_MULTI is not set > -CONFIG_USB_G_HID=m > -CONFIG_USB_G_DBGP=m > -# CONFIG_USB_G_DBGP_PRINTK is not set > -CONFIG_USB_G_DBGP_SERIAL=y > -CONFIG_USB_G_WEBCAM=m > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -CONFIG_USB_GPIO_VBUS=y > -# CONFIG_ISP1301_OMAP is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_TWL4030_USB=y > -CONFIG_TWL6030_USB=m > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -CONFIG_MMC_UNSAFE_RESUME=y > -# CONFIG_MMC_CLKGATE is not set > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_MINORS=8 > -CONFIG_MMC_BLOCK_BOUNCE=y > -CONFIG_SDIO_UART=y > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_OMAP is not set > -CONFIG_MMC_OMAP_HS=y > -CONFIG_MMC_SPI=m > -# CONFIG_MMC_DW is not set > -CONFIG_MMC_USHC=m > -# CONFIG_MEMSTICK is not set > -CONFIG_NEW_LEDS=y > -CONFIG_LEDS_CLASS=y > - > -# > -# LED drivers > -# > -# CONFIG_LEDS_LM3530 is not set > -# CONFIG_LEDS_PCA9532 is not set > -CONFIG_LEDS_GPIO=y > -CONFIG_LEDS_GPIO_PLATFORM=y > -# CONFIG_LEDS_LP3944 is not set > -CONFIG_LEDS_LP5521=m > -CONFIG_LEDS_LP5523=m > -# CONFIG_LEDS_PCA955X is not set > -# CONFIG_LEDS_DAC124S085 is not set > -CONFIG_LEDS_PWM=m > -CONFIG_LEDS_REGULATOR=m > -# CONFIG_LEDS_BD2802 is not set > -# CONFIG_LEDS_LT3593 is not set > -CONFIG_LEDS_TRIGGERS=y > - > -# > -# LED Triggers > -# > -CONFIG_LEDS_TRIGGER_TIMER=m > -CONFIG_LEDS_TRIGGER_HEARTBEAT=y > -CONFIG_LEDS_TRIGGER_BACKLIGHT=m > -CONFIG_LEDS_TRIGGER_GPIO=m > -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m > - > -# > -# iptables trigger is under Netfilter config (LED target) > -# > -CONFIG_NFC_DEVICES=y > -CONFIG_PN544_NFC=m > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -CONFIG_RTC_DRV_DS1307=y > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_DS3232 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_ISL12022 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -CONFIG_RTC_DRV_BQ32K=m > -CONFIG_RTC_DRV_TWL4030=m > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -# CONFIG_DMADEVICES is not set > -CONFIG_TIMB_DMA=m > -CONFIG_DMA_ENGINE=y > -# CONFIG_AUXDISPLAY is not set > -CONFIG_UIO=m > -CONFIG_UIO_PDRV=m > -CONFIG_UIO_PDRV_GENIRQ=m > -CONFIG_STAGING=y > -# CONFIG_STAGING_EXCLUDE_BUILD is not set > -# CONFIG_VIDEO_TM6000 is not set > -# CONFIG_USB_IP_COMMON is not set > -CONFIG_W35UND=m > -CONFIG_PRISM2_USB=m > -CONFIG_ECHO=m > -CONFIG_BRCM80211=m > -CONFIG_BRCMFMAC=y > -# CONFIG_BRCMDBG is not set > -CONFIG_RT2870=m > -# CONFIG_COMEDI is not set > -# CONFIG_ASUS_OLED is not set > -CONFIG_R8712U=m > -CONFIG_R8712_AP=y > -# CONFIG_TRANZPORT is not set > -# CONFIG_POHMELFS is not set > -# CONFIG_LINE6_USB is not set > -# CONFIG_USB_SERIAL_QUATECH2 is not set > -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set > -# CONFIG_VT6656 is not set > -# CONFIG_IIO is not set > -CONFIG_XVMALLOC=y > -CONFIG_ZRAM=m > -# CONFIG_ZRAM_DEBUG is not set > -# CONFIG_FB_SM7XX is not set > -# CONFIG_LIRC_STAGING is not set > -# CONFIG_EASYCAP is not set > -# CONFIG_TIDSPBRIDGE is not set > -# CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set > -CONFIG_MACH_NO_WESTBRIDGE=y > -# CONFIG_ATH6K_LEGACY is not set > -CONFIG_USB_ENESTORAGE=m > -CONFIG_BCM_WIMAX=m > -CONFIG_FT1000=m > -CONFIG_FT1000_USB=m > - > -# > -# Speakup console speech > -# > -# CONFIG_SPEAKUP is not set > -CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m > -CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m > - > -# > -# Altera FPGA firmware download module > -# > -# CONFIG_ALTERA_STAPL is not set > -CONFIG_CLKDEV_LOOKUP=y > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -CONFIG_EXT2_FS_XATTR=y > -CONFIG_EXT2_FS_POSIX_ACL=y > -CONFIG_EXT2_FS_SECURITY=y > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -CONFIG_EXT3_FS_POSIX_ACL=y > -# CONFIG_EXT3_FS_SECURITY is not set > -CONFIG_EXT4_FS=y > -CONFIG_EXT4_FS_XATTR=y > -CONFIG_EXT4_FS_POSIX_ACL=y > -CONFIG_EXT4_FS_SECURITY=y > -# CONFIG_EXT4_DEBUG is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_JBD2=y > -# CONFIG_JBD2_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -CONFIG_REISERFS_FS=m > -# CONFIG_REISERFS_CHECK is not set > -CONFIG_REISERFS_PROC_INFO=y > -CONFIG_REISERFS_FS_XATTR=y > -# CONFIG_REISERFS_FS_POSIX_ACL is not set > -# CONFIG_REISERFS_FS_SECURITY is not set > -CONFIG_JFS_FS=m > -CONFIG_JFS_POSIX_ACL=y > -# CONFIG_JFS_SECURITY is not set > -# CONFIG_JFS_DEBUG is not set > -CONFIG_JFS_STATISTICS=y > -CONFIG_XFS_FS=m > -CONFIG_XFS_QUOTA=y > -CONFIG_XFS_POSIX_ACL=y > -CONFIG_XFS_RT=y > -# CONFIG_XFS_DEBUG is not set > -CONFIG_GFS2_FS=m > -CONFIG_GFS2_FS_LOCKING_DLM=y > -CONFIG_OCFS2_FS=m > -CONFIG_OCFS2_FS_O2CB=m > -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m > -CONFIG_OCFS2_FS_STATS=y > -CONFIG_OCFS2_DEBUG_MASKLOG=y > -# CONFIG_OCFS2_DEBUG_FS is not set > -CONFIG_BTRFS_FS=m > -CONFIG_BTRFS_FS_POSIX_ACL=y > -CONFIG_NILFS2_FS=m > -CONFIG_FS_POSIX_ACL=y > -CONFIG_EXPORTFS=y > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY_USER=y > -CONFIG_FANOTIFY=y > -CONFIG_QUOTA=y > -# CONFIG_QUOTA_NETLINK_INTERFACE is not set > -CONFIG_PRINT_QUOTA_WARNING=y > -# CONFIG_QUOTA_DEBUG is not set > -CONFIG_QUOTA_TREE=y > -# CONFIG_QFMT_V1 is not set > -CONFIG_QFMT_V2=y > -CONFIG_QUOTACTL=y > -CONFIG_AUTOFS4_FS=y > -CONFIG_FUSE_FS=m > -CONFIG_CUSE=m > -CONFIG_GENERIC_ACL=y > - > -# > -# Caches > -# > -CONFIG_FSCACHE=m > -CONFIG_FSCACHE_STATS=y > -CONFIG_FSCACHE_HISTOGRAM=y > -# CONFIG_FSCACHE_DEBUG is not set > -# CONFIG_FSCACHE_OBJECT_LIST is not set > -CONFIG_CACHEFILES=m > -# CONFIG_CACHEFILES_DEBUG is not set > -CONFIG_CACHEFILES_HISTOGRAM=y > - > -# > -# CD-ROM/DVD Filesystems > -# > -CONFIG_ISO9660_FS=m > -CONFIG_JOLIET=y > -CONFIG_ZISOFS=y > -CONFIG_UDF_FS=m > -CONFIG_UDF_NLS=y > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -CONFIG_NTFS_FS=m > -# CONFIG_NTFS_DEBUG is not set > -# CONFIG_NTFS_RW is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -CONFIG_TMPFS_POSIX_ACL=y > -# CONFIG_HUGETLB_PAGE is not set > -CONFIG_CONFIGFS_FS=m > -CONFIG_MISC_FILESYSTEMS=y > -CONFIG_ADFS_FS=m > -# CONFIG_ADFS_FS_RW is not set > -CONFIG_AFFS_FS=m > -# CONFIG_ECRYPT_FS is not set > -CONFIG_UNION_FS=m > -CONFIG_UNION_FS_XATTR=y > -# CONFIG_UNION_FS_DEBUG is not set > -CONFIG_HFS_FS=m > -CONFIG_HFSPLUS_FS=m > -CONFIG_BEFS_FS=m > -# CONFIG_BEFS_DEBUG is not set > -CONFIG_BFS_FS=m > -CONFIG_EFS_FS=m > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -CONFIG_JFFS2_SUMMARY=y > -CONFIG_JFFS2_FS_XATTR=y > -CONFIG_JFFS2_FS_POSIX_ACL=y > -CONFIG_JFFS2_FS_SECURITY=y > -CONFIG_JFFS2_COMPRESSION_OPTIONS=y > -CONFIG_JFFS2_ZLIB=y > -CONFIG_JFFS2_LZO=y > -CONFIG_JFFS2_RTIME=y > -CONFIG_JFFS2_RUBIN=y > -# CONFIG_JFFS2_CMODE_NONE is not set > -# CONFIG_JFFS2_CMODE_PRIORITY is not set > -# CONFIG_JFFS2_CMODE_SIZE is not set > -CONFIG_JFFS2_CMODE_FAVOURLZO=y > -CONFIG_UBIFS_FS=y > -CONFIG_UBIFS_FS_XATTR=y > -CONFIG_UBIFS_FS_ADVANCED_COMPR=y > -CONFIG_UBIFS_FS_LZO=y > -CONFIG_UBIFS_FS_ZLIB=y > -# CONFIG_UBIFS_FS_DEBUG is not set > -CONFIG_LOGFS=m > -CONFIG_CRAMFS=m > -CONFIG_SQUASHFS=y > -# CONFIG_SQUASHFS_XATTR is not set > -CONFIG_SQUASHFS_LZO=y > -CONFIG_SQUASHFS_XZ=y > -# CONFIG_SQUASHFS_EMBEDDED is not set > -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 > -CONFIG_VXFS_FS=m > -CONFIG_MINIX_FS=m > -CONFIG_OMFS_FS=m > -CONFIG_HPFS_FS=m > -CONFIG_QNX4FS_FS=m > -CONFIG_ROMFS_FS=m > -CONFIG_ROMFS_BACKED_BY_BLOCK=y > -# CONFIG_ROMFS_BACKED_BY_MTD is not set > -# CONFIG_ROMFS_BACKED_BY_BOTH is not set > -CONFIG_ROMFS_ON_BLOCK=y > -CONFIG_PSTORE=y > -CONFIG_SYSV_FS=m > -CONFIG_UFS_FS=m > -# CONFIG_UFS_FS_WRITE is not set > -# CONFIG_UFS_DEBUG is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -CONFIG_NFS_V3_ACL=y > -CONFIG_NFS_V4=y > -CONFIG_NFS_V4_1=y > -CONFIG_PNFS_FILE_LAYOUT=y > -CONFIG_ROOT_NFS=y > -# CONFIG_NFS_USE_LEGACY_DNS is not set > -CONFIG_NFS_USE_KERNEL_DNS=y > -# CONFIG_NFS_USE_NEW_IDMAPPER is not set > -CONFIG_NFSD=m > -CONFIG_NFSD_DEPRECATED=y > -CONFIG_NFSD_V2_ACL=y > -CONFIG_NFSD_V3=y > -CONFIG_NFSD_V3_ACL=y > -CONFIG_NFSD_V4=y > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_NFS_ACL_SUPPORT=y > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -CONFIG_SUNRPC_GSS=y > -CONFIG_RPCSEC_GSS_KRB5=m > -CONFIG_CEPH_FS=m > -CONFIG_CIFS=m > -CONFIG_CIFS_STATS=y > -CONFIG_CIFS_STATS2=y > -# CONFIG_CIFS_WEAK_PW_HASH is not set > -# CONFIG_CIFS_UPCALL is not set > -CONFIG_CIFS_XATTR=y > -CONFIG_CIFS_POSIX=y > -# CONFIG_CIFS_DEBUG2 is not set > -CONFIG_CIFS_DFS_UPCALL=y > -CONFIG_CIFS_FSCACHE=y > -CONFIG_CIFS_ACL=y > -CONFIG_CIFS_EXPERIMENTAL=y > -CONFIG_NCP_FS=m > -# CONFIG_NCPFS_PACKET_SIGNING is not set > -# CONFIG_NCPFS_IOCTL_LOCKING is not set > -# CONFIG_NCPFS_STRONG is not set > -# CONFIG_NCPFS_NFS_NS is not set > -# CONFIG_NCPFS_OS2_NS is not set > -# CONFIG_NCPFS_SMALLDOS is not set > -# CONFIG_NCPFS_NLS is not set > -# CONFIG_NCPFS_EXTRAS is not set > -CONFIG_CODA_FS=m > -CONFIG_AFS_FS=m > -# CONFIG_AFS_DEBUG is not set > -# CONFIG_AFS_FSCACHE is not set > -CONFIG_9P_FS=m > -CONFIG_9P_FSCACHE=y > -CONFIG_9P_FS_POSIX_ACL=y > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -CONFIG_MAC_PARTITION=y > -CONFIG_MSDOS_PARTITION=y > -CONFIG_BSD_DISKLABEL=y > -CONFIG_MINIX_SUBPARTITION=y > -CONFIG_SOLARIS_X86_PARTITION=y > -# CONFIG_UNIXWARE_DISKLABEL is not set > -CONFIG_LDM_PARTITION=y > -CONFIG_LDM_DEBUG=y > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -CONFIG_EFI_PARTITION=y > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -CONFIG_NLS_CODEPAGE_737=m > -CONFIG_NLS_CODEPAGE_775=m > -CONFIG_NLS_CODEPAGE_850=m > -CONFIG_NLS_CODEPAGE_852=m > -CONFIG_NLS_CODEPAGE_855=m > -CONFIG_NLS_CODEPAGE_857=m > -CONFIG_NLS_CODEPAGE_860=m > -CONFIG_NLS_CODEPAGE_861=m > -CONFIG_NLS_CODEPAGE_862=m > -CONFIG_NLS_CODEPAGE_863=m > -CONFIG_NLS_CODEPAGE_864=m > -CONFIG_NLS_CODEPAGE_865=m > -CONFIG_NLS_CODEPAGE_866=m > -CONFIG_NLS_CODEPAGE_869=m > -CONFIG_NLS_CODEPAGE_936=m > -CONFIG_NLS_CODEPAGE_950=m > -CONFIG_NLS_CODEPAGE_932=m > -CONFIG_NLS_CODEPAGE_949=m > -CONFIG_NLS_CODEPAGE_874=m > -CONFIG_NLS_ISO8859_8=m > -CONFIG_NLS_CODEPAGE_1250=m > -CONFIG_NLS_CODEPAGE_1251=m > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -CONFIG_NLS_ISO8859_2=m > -CONFIG_NLS_ISO8859_3=m > -CONFIG_NLS_ISO8859_4=m > -CONFIG_NLS_ISO8859_5=m > -CONFIG_NLS_ISO8859_6=m > -CONFIG_NLS_ISO8859_7=m > -CONFIG_NLS_ISO8859_9=m > -CONFIG_NLS_ISO8859_13=m > -CONFIG_NLS_ISO8859_14=m > -CONFIG_NLS_ISO8859_15=m > -CONFIG_NLS_KOI8_R=m > -CONFIG_NLS_KOI8_U=m > -CONFIG_NLS_UTF8=y > -CONFIG_DLM=m > -# CONFIG_DLM_DEBUG is not set > - > -# > -# Kernel hacking > -# > -CONFIG_PRINTK_TIME=y > -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 > -CONFIG_ENABLE_WARN_DEPRECATED=y > -CONFIG_ENABLE_MUST_CHECK=y > -CONFIG_FRAME_WARN=1024 > -CONFIG_MAGIC_SYSRQ=y > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -# CONFIG_DEBUG_SECTION_MISMATCH is not set > -CONFIG_DEBUG_KERNEL=y > -# CONFIG_DEBUG_SHIRQ is not set > -# CONFIG_LOCKUP_DETECTOR is not set > -# CONFIG_HARDLOCKUP_DETECTOR is not set > -CONFIG_DETECT_HUNG_TASK=y > -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set > -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 > -CONFIG_SCHED_DEBUG=y > -CONFIG_SCHEDSTATS=y > -CONFIG_TIMER_STATS=y > -# CONFIG_DEBUG_OBJECTS is not set > -# CONFIG_DEBUG_SLAB is not set > -# CONFIG_DEBUG_KMEMLEAK is not set > -# CONFIG_DEBUG_RT_MUTEXES is not set > -# CONFIG_RT_MUTEX_TESTER is not set > -# CONFIG_DEBUG_SPINLOCK is not set > -CONFIG_DEBUG_MUTEXES=y > -# CONFIG_DEBUG_LOCK_ALLOC is not set > -# CONFIG_PROVE_LOCKING is not set > -# CONFIG_SPARSE_RCU_POINTER is not set > -# CONFIG_LOCK_STAT is not set > -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set > -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set > -# CONFIG_DEBUG_KOBJECT is not set > -# CONFIG_DEBUG_BUGVERBOSE is not set > -# CONFIG_DEBUG_INFO is not set > -# CONFIG_DEBUG_VM is not set > -# CONFIG_DEBUG_WRITECOUNT is not set > -# CONFIG_DEBUG_MEMORY_INIT is not set > -# CONFIG_DEBUG_LIST is not set > -# CONFIG_TEST_LIST_SORT is not set > -# CONFIG_DEBUG_SG is not set > -# CONFIG_DEBUG_NOTIFIERS is not set > -# CONFIG_DEBUG_CREDENTIALS is not set > -# CONFIG_BOOT_PRINTK_DELAY is not set > -# CONFIG_RCU_TORTURE_TEST is not set > -# CONFIG_BACKTRACE_SELF_TEST is not set > -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set > -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set > -# CONFIG_LKDTM is not set > -# CONFIG_FAULT_INJECTION is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -# CONFIG_DEBUG_PAGEALLOC is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y > -CONFIG_HAVE_DYNAMIC_FTRACE=y > -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y > -CONFIG_HAVE_C_RECORDMCOUNT=y > -CONFIG_RING_BUFFER=y > -CONFIG_RING_BUFFER_ALLOW_SWAP=y > -CONFIG_TRACING_SUPPORT=y > -CONFIG_FTRACE=y > -# CONFIG_FUNCTION_TRACER is not set > -# CONFIG_IRQSOFF_TRACER is not set > -# CONFIG_SCHED_TRACER is not set > -# CONFIG_ENABLE_DEFAULT_TRACERS is not set > -CONFIG_BRANCH_PROFILE_NONE=y > -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set > -# CONFIG_PROFILE_ALL_BRANCHES is not set > -# CONFIG_STACK_TRACER is not set > -# CONFIG_BLK_DEV_IO_TRACE is not set > -# CONFIG_RING_BUFFER_BENCHMARK is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_DMA_API_DEBUG is not set > -# CONFIG_ATOMIC64_SELFTEST is not set > -# CONFIG_ASYNC_RAID6_TEST is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_KGDB is not set > -# CONFIG_TEST_KSTRTOX is not set > -# CONFIG_STRICT_DEVMEM is not set > -CONFIG_ARM_UNWIND=y > -# CONFIG_DEBUG_USER is not set > -# CONFIG_DEBUG_STACK_USAGE is not set > -# CONFIG_DEBUG_LL is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -CONFIG_KEYS=y > -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set > -# CONFIG_SECURITY_DMESG_RESTRICT is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_XOR_BLOCKS=m > -CONFIG_ASYNC_CORE=m > -CONFIG_ASYNC_MEMCPY=m > -CONFIG_ASYNC_XOR=m > -CONFIG_ASYNC_PQ=m > -CONFIG_ASYNC_RAID6_RECOV=m > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -CONFIG_CRYPTO_ALGAPI=y > -CONFIG_CRYPTO_ALGAPI2=y > -CONFIG_CRYPTO_AEAD=m > -CONFIG_CRYPTO_AEAD2=y > -CONFIG_CRYPTO_BLKCIPHER=y > -CONFIG_CRYPTO_BLKCIPHER2=y > -CONFIG_CRYPTO_HASH=y > -CONFIG_CRYPTO_HASH2=y > -CONFIG_CRYPTO_RNG=m > -CONFIG_CRYPTO_RNG2=y > -CONFIG_CRYPTO_PCOMP2=y > -CONFIG_CRYPTO_MANAGER=y > -CONFIG_CRYPTO_MANAGER2=y > -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y > -CONFIG_CRYPTO_GF128MUL=m > -CONFIG_CRYPTO_NULL=m > -CONFIG_CRYPTO_WORKQUEUE=y > -CONFIG_CRYPTO_CRYPTD=m > -CONFIG_CRYPTO_AUTHENC=m > -CONFIG_CRYPTO_TEST=m > - > -# > -# Authenticated Encryption with Associated Data > -# > -CONFIG_CRYPTO_CCM=m > -CONFIG_CRYPTO_GCM=m > -CONFIG_CRYPTO_SEQIV=m > - > -# > -# Block modes > -# > -CONFIG_CRYPTO_CBC=y > -CONFIG_CRYPTO_CTR=m > -CONFIG_CRYPTO_CTS=m > -CONFIG_CRYPTO_ECB=y > -CONFIG_CRYPTO_LRW=m > -CONFIG_CRYPTO_PCBC=m > -CONFIG_CRYPTO_XTS=m > - > -# > -# Hash modes > -# > -CONFIG_CRYPTO_HMAC=m > -CONFIG_CRYPTO_XCBC=m > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -CONFIG_CRYPTO_CRC32C=y > -CONFIG_CRYPTO_GHASH=m > -CONFIG_CRYPTO_MD4=m > -CONFIG_CRYPTO_MD5=y > -CONFIG_CRYPTO_MICHAEL_MIC=y > -CONFIG_CRYPTO_RMD128=m > -CONFIG_CRYPTO_RMD160=m > -CONFIG_CRYPTO_RMD256=m > -CONFIG_CRYPTO_RMD320=m > -CONFIG_CRYPTO_SHA1=m > -CONFIG_CRYPTO_SHA256=m > -CONFIG_CRYPTO_SHA512=m > -CONFIG_CRYPTO_TGR192=m > -CONFIG_CRYPTO_WP512=m > - > -# > -# Ciphers > -# > -CONFIG_CRYPTO_AES=y > -CONFIG_CRYPTO_ANUBIS=m > -CONFIG_CRYPTO_ARC4=y > -CONFIG_CRYPTO_BLOWFISH=m > -CONFIG_CRYPTO_CAMELLIA=m > -CONFIG_CRYPTO_CAST5=m > -CONFIG_CRYPTO_CAST6=m > -CONFIG_CRYPTO_DES=y > -CONFIG_CRYPTO_FCRYPT=m > -CONFIG_CRYPTO_KHAZAD=m > -CONFIG_CRYPTO_SALSA20=m > -CONFIG_CRYPTO_SEED=m > -CONFIG_CRYPTO_SERPENT=m > -CONFIG_CRYPTO_TEA=m > -CONFIG_CRYPTO_TWOFISH=m > -CONFIG_CRYPTO_TWOFISH_COMMON=m > - > -# > -# Compression > -# > -CONFIG_CRYPTO_DEFLATE=y > -# CONFIG_CRYPTO_ZLIB is not set > -CONFIG_CRYPTO_LZO=y > - > -# > -# Random Number Generation > -# > -CONFIG_CRYPTO_ANSI_CPRNG=m > -CONFIG_CRYPTO_USER_API=m > -CONFIG_CRYPTO_USER_API_HASH=m > -CONFIG_CRYPTO_USER_API_SKCIPHER=m > -CONFIG_CRYPTO_HW=y > -CONFIG_CRYPTO_DEV_OMAP_SHAM=m > -CONFIG_CRYPTO_DEV_OMAP_AES=m > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_RAID6_PQ=m > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=y > -CONFIG_CRC16=y > -CONFIG_CRC_T10DIF=y > -CONFIG_CRC_ITU_T=y > -CONFIG_CRC32=y > -CONFIG_CRC7=y > -CONFIG_LIBCRC32C=y > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_LZO_COMPRESS=y > -CONFIG_LZO_DECOMPRESS=y > -CONFIG_XZ_DEC=y > -CONFIG_XZ_DEC_X86=y > -CONFIG_XZ_DEC_POWERPC=y > -CONFIG_XZ_DEC_IA64=y > -CONFIG_XZ_DEC_ARM=y > -CONFIG_XZ_DEC_ARMTHUMB=y > -CONFIG_XZ_DEC_SPARC=y > -CONFIG_XZ_DEC_BCJ=y > -CONFIG_XZ_DEC_TEST=m > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_DECOMPRESS_BZIP2=y > -CONFIG_DECOMPRESS_LZMA=y > -CONFIG_DECOMPRESS_XZ=y > -CONFIG_DECOMPRESS_LZO=y > -CONFIG_TEXTSEARCH=y > -CONFIG_TEXTSEARCH_KMP=m > -CONFIG_TEXTSEARCH_BM=m > -CONFIG_TEXTSEARCH_FSM=m > -CONFIG_BTREE=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > -CONFIG_AVERAGE=y > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/fixes/vout.patch b/recipes- > kernel/linux/linux-3.0+3.1rc/fixes/vout.patch > deleted file mode 100644 > index 5a14540..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/fixes/vout.patch > +++ /dev/null > @@ -1,79 +0,0 @@ > -Delivered-To: koen@dominion.thruhere.net > -Received: by 10.236.157.72 with SMTP id n48cs4581yhk; > - Fri, 5 Aug 2011 00:10:45 -0700 (PDT) > -Received: by 10.147.146.12 with SMTP id > y12mr1585882yan.12.1312528245335; > - Fri, 05 Aug 2011 00:10:45 -0700 (PDT) > -Return-Path: <archit@ti.com> > -Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) > - by mx.google.com with ESMTPS id > x20si3422127ani.205.2011.08.05.00.10.45 > - (version=TLSv1/SSLv3 cipher=OTHER); > - Fri, 05 Aug 2011 00:10:45 -0700 (PDT) > -Received-SPF: pass (google.com: domain of archit@ti.com designates > 192.94.94.41 as permitted sender) client-ip=192.94.94.41; > -Authentication-Results: mx.google.com; spf=pass (google.com: domain of > archit@ti.com designates 192.94.94.41 as permitted sender) > smtp.mail=archit@ti.com > -Received: from dlep33.itg.ti.com ([157.170.170.112]) > - by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id p757AiHb023389 > - (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 > verify=NO); > - Fri, 5 Aug 2011 02:10:44 -0500 > -Received: from dlep26.itg.ti.com (smtp-le.itg.ti.com [157.170.170.27]) > - by dlep33.itg.ti.com (8.13.7/8.13.8) with ESMTP id p757AiWp004418; > - Fri, 5 Aug 2011 02:10:44 -0500 (CDT) > -Received: from dlee73.ent.ti.com (localhost [127.0.0.1]) > - by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id p757AiBJ012377; > - Fri, 5 Aug 2011 02:10:44 -0500 (CDT) > -Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE73.ent.ti.com > - (157.170.170.88) with Microsoft SMTP Server id 8.3.106.1; Fri, 5 Aug 2011 > - 02:10:44 -0500 > -Received: from legion.dal.design.ti.com (legion.dal.design.ti.com > - [128.247.22.53]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id > - p757Ai9V018852; Fri, 5 Aug 2011 02:10:44 -0500 > -Received: from localhost (a0393947pc.apr.dhcp.ti.com [172.24.137.144]) > by > - legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id p757Aef10060; > - Fri, 5 Aug 2011 02:10:41 -0500 (CDT) > -From: Archit Taneja <archit@ti.com> > -To: <hvaibhav@ti.com>, <linux-media@vger.kernel.org> > -CC: <koen@dominion.thruhere.net>, <tomi.valkeinen@ti.com>, > - <linux-omap@vger.kernel.org>, Archit Taneja <archit@ti.com> > -Subject: [PATCH] [media] OMAP_VOUT: Fix build break caused by > update_mode removal in DSS2 > -Date: Fri, 5 Aug 2011 12:49:21 +0530 > -Message-ID: <1312528761-18241-1-git-send-email-archit@ti.com> > -X-Mailer: git-send-email 1.7.1 > -MIME-Version: 1.0 > -Content-Type: text/plain > - > -The DSS2 driver does not support the configuration of the update_mode of a > -panel anymore. Remove the setting of update_mode done in > omap_vout_probe(). > -Ignore configuration of TE since omap_vout driver doesn't support manual > update > -displays anyway. > - > -Signed-off-by: Archit Taneja <archit@ti.com> > ---- > - drivers/media/video/omap/omap_vout.c | 13 ------------- > - 1 files changed, 0 insertions(+), 13 deletions(-) > - > -diff --git a/drivers/media/video/omap/omap_vout.c > b/drivers/media/video/omap/omap_vout.c > -index b5ef362..b3a5ecd 100644 > ---- a/drivers/media/video/omap/omap_vout.c > -+++ b/drivers/media/video/omap/omap_vout.c > -@@ -2194,19 +2194,6 @@ static int __init omap_vout_probe(struct > platform_device *pdev) > - "'%s' Display already enabled\n", > - def_display->name); > - } > -- /* set the update mode */ > -- if (def_display->caps & > -- > OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { > -- if (dssdrv->enable_te) > -- dssdrv->enable_te(def_display, 0); > -- if (dssdrv->set_update_mode) > -- dssdrv- > >set_update_mode(def_display, > -- > OMAP_DSS_UPDATE_MANUAL); > -- } else { > -- if (dssdrv->set_update_mode) > -- dssdrv- > >set_update_mode(def_display, > -- > OMAP_DSS_UPDATE_AUTO); > -- } > - } > - } > - > --- > -1.7.1 > - > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0001-Enabling-Hwmon- > driver-for-twl4030-madc.patch b/recipes-kernel/linux/linux- > 3.0+3.1rc/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch > deleted file mode 100644 > index 38e96e3..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0001-Enabling-Hwmon-driver- > for-twl4030-madc.patch > +++ /dev/null > @@ -1,46 +0,0 @@ > -From 428afa6e7a96419f6f17158a9ac38ab24d664997 Mon Sep 17 00:00:00 > 2001 > -From: Keerthy <j-keerthy@ti.com> > -Date: Wed, 4 May 2011 01:14:50 +0530 > -Subject: [PATCH 1/2] Enabling Hwmon driver for twl4030-madc > - > -Signed-off-by: Keerthy <j-keerthy@ti.com> > ---- > - drivers/mfd/twl-core.c | 15 +++++++++++++++ > - 1 files changed, 15 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c > -index a2eddc7..81fcf18 100644 > ---- a/drivers/mfd/twl-core.c > -+++ b/drivers/mfd/twl-core.c > -@@ -83,6 +83,13 @@ > - #define twl_has_madc() false > - #endif > - > -+#if defined(CONFIG_SENSORS_TWL4030_MADC) ||\ > -+ defined(CONFIG_SENSORS_TWL4030_MADC_MODULE) > -+#define twl_has_madc_hwmon() true > -+#else > -+#define twl_has_madc_hwmon() false > -+#endif > -+ > - #ifdef CONFIG_TWL4030_POWER > - #define twl_has_power() true > - #else > -@@ -669,6 +676,14 @@ add_children(struct twl4030_platform_data *pdata, > unsigned long features) > - return PTR_ERR(child); > - } > - > -+if (twl_has_madc_hwmon()) { > -+ child = add_child(2, "twl4030_madc_hwmon", > -+ NULL, 0, > -+ true, pdata->irq_base + MADC_INTR_OFFSET, > 0); > -+ if (IS_ERR(child)) > -+ return PTR_ERR(child); > -+ } > -+ > - if (twl_has_rtc()) { > - /* > - * REVISIT platform_data here currently might expose the > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002-mfd-twl-core- > enable-madc-clock.patch b/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002- > mfd-twl-core-enable-madc-clock.patch > deleted file mode 100644 > index 7dc8e54..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002-mfd-twl-core-enable- > madc-clock.patch > +++ /dev/null > @@ -1,54 +0,0 @@ > -From fbfdf09f148219d48ee35e830923ca75bbd0b91b Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Sat, 23 Jan 2010 06:26:54 -0800 > -Subject: [PATCH 2/2] mfd: twl-core: enable madc clock > - > -Now that the madc driver has been merged it is also necessary to enable the > clock to the madc block > - > -Signed-off-by: Steve Sakoman <steve@sakoman.com> > ---- > - drivers/mfd/twl-core.c | 8 ++++++++ > - include/linux/i2c/twl.h | 1 + > - 2 files changed, 9 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c > -index 81fcf18..08aa64f 100644 > ---- a/drivers/mfd/twl-core.c > -+++ b/drivers/mfd/twl-core.c > -@@ -217,6 +217,11 @@ > - > - /* Few power values */ > - #define R_CFG_BOOT 0x05 > -+#define R_GPBR1 0x0C > -+ > -+/* MADC clock values for R_GPBR1 */ > -+#define MADC_HFCLK_EN 0x80 > -+#define DEFAULT_MADC_CLK_EN 0x10 > - > - /* some fields in R_CFG_BOOT */ > - #define HFCLK_FREQ_19p2_MHZ (1 << 0) > -@@ -1151,6 +1156,9 @@ static void clocks_init(struct device *dev, > - > - e |= unprotect_pm_master(); > - /* effect->MADC+USB ck en */ > -+ if (twl_has_madc()) > -+ e |= twl_i2c_write_u8(TWL_MODULE_INTBR, > -+ MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, > R_GPBR1); > - e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, > R_CFG_BOOT); > - e |= protect_pm_master(); > - > -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h > -index 114c0f6..f060751 100644 > ---- a/include/linux/i2c/twl.h > -+++ b/include/linux/i2c/twl.h > -@@ -74,6 +74,7 @@ > - > - #define TWL_MODULE_USB TWL4030_MODULE_USB > - #define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE > -+#define TWL_MODULE_INTBR TWL4030_MODULE_INTBR > - #define TWL_MODULE_PIH TWL4030_MODULE_PIH > - #define TWL_MODULE_MADC TWL4030_MODULE_MADC > - #define TWL_MODULE_MAIN_CHARGE > TWL4030_MODULE_MAIN_CHARGE > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/patch.sh b/recipes- > kernel/linux/linux-3.0+3.1rc/patch.sh > deleted file mode 100644 > index 50f146e..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/patch.sh > +++ /dev/null > @@ -1,27 +0,0 @@ > -#!/bin/bash > -# (c) 2009 - 2011 Koen Kooi <koen@dominion.thruhere.net> > -# This script will take a set of directories with patches and make a git tree out of > it > -# After all the patches are applied it will output a SRC_URI fragment you can > copy/paste into a recipe > - > -TAG="mainline/master" > -EXTRATAG="-3.1" > - > -git fetch mainline > -git am --abort > -git reset --hard ${TAG} > -rm export -rf > - > -previous=${TAG} > -PATCHSET="beagle madc sgx" > - > -# apply patches > -for patchset in ${PATCHSET} ; do > - git am $patchset/* && git tag "${patchset}${EXTRATAG}" -f > -done > - > -# export patches and output SRC_URI for them > -for patchset in ${PATCHSET} ; do > - mkdir export/$patchset -p > - ( cd export/$patchset && git format-patch > ${previous}..${patchset}${EXTRATAG} >& /dev/null && for i in *.patch ; do echo > " file://${patchset}/$i \\" ; done ) > - previous=${patchset}${EXTRATAG} > -done > diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001-ARM-L2-Add-and- > export-outer_clean_all.patch b/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001- > ARM-L2-Add-and-export-outer_clean_all.patch > deleted file mode 100644 > index 5d45229..0000000 > --- a/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001-ARM-L2-Add-and-export- > outer_clean_all.patch > +++ /dev/null > @@ -1,67 +0,0 @@ > -From 927d1d96b5c4d3439a301b73804ade67b8cdd81a Mon Sep 17 > 00:00:00 2001 > -From: Vikram Pandita <vikram.pandita@ti.com> > -Date: Tue, 31 May 2011 09:24:58 +0100 > -Subject: [PATCH] ARM: L2: Add and export outer_clean_all > - > -The Errata 588369 and 539766 demands that clean all operation be done > -as clean each way at a time > - > -This patch also raps the implementation under the CONFIG errata > -macro so that for non-errata version silicon it can be disabled > - > -Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> > -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Cc: Woodruff, Richard <r-woodruff2@ti.com> > ---- > - arch/arm/include/asm/outercache.h | 8 ++++++++ > - arch/arm/mm/cache-l2x0.c | 1 + > - 2 files changed, 9 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/include/asm/outercache.h > b/arch/arm/include/asm/outercache.h > -index d838743..fa8cbd8 100644 > ---- a/arch/arm/include/asm/outercache.h > -+++ b/arch/arm/include/asm/outercache.h > -@@ -28,6 +28,7 @@ struct outer_cache_fns { > - void (*clean_range)(unsigned long, unsigned long); > - void (*flush_range)(unsigned long, unsigned long); > - void (*flush_all)(void); > -+ void (*clean_all)(void); > - void (*inv_all)(void); > - void (*disable)(void); > - #ifdef CONFIG_OUTER_CACHE_SYNC > -@@ -61,6 +62,11 @@ static inline void outer_flush_all(void) > - if (outer_cache.flush_all) > - outer_cache.flush_all(); > - } > -+static inline void outer_clean_all(void) > -+{ > -+ if (outer_cache.clean_all) > -+ outer_cache.clean_all(); > -+} > - > - static inline void outer_inv_all(void) > - { > -@@ -97,6 +103,8 @@ static inline void outer_sync(void) > - #else > - static inline void outer_sync(void) > - { } > -+static inline void outer_clean_all(void) > -+{ } > - #endif > - > - #endif /* __ASM_OUTERCACHE_H */ > -diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c > -index 44c0867..10b79d6 100644 > ---- a/arch/arm/mm/cache-l2x0.c > -+++ b/arch/arm/mm/cache-l2x0.c > -@@ -346,6 +346,7 @@ void __init l2x0_init(void __iomem *base, __u32 > aux_val, __u32 aux_mask) > - outer_cache.inv_all = l2x0_inv_all; > - outer_cache.disable = l2x0_disable; > - outer_cache.set_debug = l2x0_set_debug; > -+ outer_cache.clean_all = l2x0_clean_all; > - > - printk(KERN_INFO "%s cache controller enabled\n", type); > - printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL > 0x%08x, Cache size: %d B\n", > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0001-OMAP3-beagle-add- > support-for-beagleboard-xM-revision.patch b/recipes-kernel/linux/linux- > 3.0/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM- > revision.patch > deleted file mode 100644 > index d87aee1..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0001-OMAP3-beagle-add-support- > for-beagleboard-xM-revision.patch > +++ /dev/null > @@ -1,196 +0,0 @@ > -From ba3e97075ad35eeaf35191c4e5c2b90de5d96209 Mon Sep 17 00:00:00 > 2001 > -From: Fernandes, Joel A <joelagnel@ti.com> > -Date: Tue, 7 Jun 2011 15:54:45 -0500 > -Subject: [PATCH 01/10] OMAP3: beagle: add support for beagleboard xM > revision C > - > -OMAP3: beagle: add support for beagleboard xM revision C > - > -The USB enable GPIO has been in beagleboard xM revision C. > -The USER button has been moved since beagleboard xM. > -Also, board specific initialization has been moved to beagle_config struct > -and initialized in omap3_beagle_init_rev. Default values in struct are for xMC. > - > -Signed-off-by: Joel A Fernandes <joelagnel@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 78 > ++++++++++++++++++++----------- > - 1 files changed, 51 insertions(+), 27 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 34f8411..32f5f89 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -60,7 +60,8 @@ > - * AXBX = GPIO173, GPIO172, GPIO171: 1 1 1 > - * C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0 > - * C4 = GPIO173, GPIO172, GPIO171: 1 0 1 > -- * XM = GPIO173, GPIO172, GPIO171: 0 0 0 > -+ * XMA/XMB = GPIO173, GPIO172, GPIO171: 0 0 0 > -+ * XMC = GPIO173, GPIO172, GPIO171: 0 1 0 > - */ > - enum { > - OMAP3BEAGLE_BOARD_UNKN = 0, > -@@ -68,14 +69,26 @@ enum { > - OMAP3BEAGLE_BOARD_C1_3, > - OMAP3BEAGLE_BOARD_C4, > - OMAP3BEAGLE_BOARD_XM, > -+ OMAP3BEAGLE_BOARD_XMC, > - }; > - > - static u8 omap3_beagle_version; > - > --static u8 omap3_beagle_get_rev(void) > --{ > -- return omap3_beagle_version; > --} > -+/* > -+ * Board-specific configuration > -+ * Defaults to BeagleBoard-xMC > -+ */ > -+static struct { > -+ int mmc1_gpio_wp; > -+ int usb_pwr_level; > -+ int reset_gpio; > -+ int usr_button_gpio; > -+} beagle_config = { > -+ .mmc1_gpio_wp = -EINVAL, > -+ .usb_pwr_level = GPIOF_OUT_INIT_LOW, > -+ .reset_gpio = 129, > -+ .usr_button_gpio = 4, > -+}; > - > - static struct gpio omap3_beagle_rev_gpios[] __initdata = { > - { 171, GPIOF_IN, "rev_id_0" }, > -@@ -110,18 +123,32 @@ static void __init omap3_beagle_init_rev(void) > - case 7: > - printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); > - omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; > -+ beagle_config.mmc1_gpio_wp = 29; > -+ beagle_config.reset_gpio = 170; > -+ beagle_config.usr_button_gpio = 7; > - break; > - case 6: > - printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); > - omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; > -+ beagle_config.mmc1_gpio_wp = 23; > -+ beagle_config.reset_gpio = 170; > -+ beagle_config.usr_button_gpio = 7; > - break; > - case 5: > - printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); > - omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; > -+ beagle_config.mmc1_gpio_wp = 23; > -+ beagle_config.reset_gpio = 170; > -+ beagle_config.usr_button_gpio = 7; > - break; > - case 0: > -- printk(KERN_INFO "OMAP3 Beagle Rev: xM\n"); > -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n"); > - omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; > -+ beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH; > -+ break; > -+ case 2: > -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); > -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; > - break; > - default: > - printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", > beagle_rev); > -@@ -225,7 +252,7 @@ static struct omap2_hsmmc_info mmc[] = { > - { > - .mmc = 1, > - .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_8_BIT_DATA, > -- .gpio_wp = 29, > -+ .gpio_wp = -EINVAL, > - }, > - {} /* Terminator */ > - }; > -@@ -243,17 +270,11 @@ static struct gpio_led gpio_leds[]; > - static int beagle_twl_gpio_setup(struct device *dev, > - unsigned gpio, unsigned ngpio) > - { > -- int r, usb_pwr_level; > -- > -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { > -- mmc[0].gpio_wp = -EINVAL; > -- } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) > || > -- (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { > -- omap_mux_init_gpio(23, OMAP_PIN_INPUT); > -- mmc[0].gpio_wp = 23; > -- } else { > -- omap_mux_init_gpio(29, OMAP_PIN_INPUT); > -- } > -+ int r; > -+ > -+ if (beagle_config.mmc1_gpio_wp != -EINVAL) > -+ omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, > OMAP_PIN_INPUT); > -+ mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; > - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ > - mmc[0].gpio_cd = gpio + 0; > - omap2_hsmmc_init(mmc); > -@@ -263,9 +284,8 @@ static int beagle_twl_gpio_setup(struct device *dev, > - * high / others active low) > - * DVI reset GPIO is different between beagle revisions > - */ > -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { > -- usb_pwr_level = GPIOF_OUT_INIT_HIGH; > -- beagle_dvi_device.reset_gpio = 129; > -+ /* Valid for all -xM revisions */ > -+ if (cpu_is_omap3630()) { > - /* > - * gpio + 1 on Xm controls the TFP410's enable line (active low) > - * gpio + 2 control varies depending on the board rev as below: > -@@ -283,8 +303,6 @@ static int beagle_twl_gpio_setup(struct device *dev, > - pr_err("%s: unable to configure DVI_LDO_EN\n", > - __func__); > - } else { > -- usb_pwr_level = GPIOF_OUT_INIT_LOW; > -- beagle_dvi_device.reset_gpio = 170; > - /* > - * REVISIT: need ehci-omap hooks for external VBUS > - * power switch and overcurrent detect > -@@ -292,8 +310,10 @@ static int beagle_twl_gpio_setup(struct device *dev, > - if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) > - pr_err("%s: unable to configure EHCI_nOC\n", > __func__); > - } > -+ beagle_dvi_device.reset_gpio = beagle_config.reset_gpio; > - > -- gpio_request_one(gpio + TWL4030_GPIO_MAX, usb_pwr_level, > "nEN_USB_PWR"); > -+ gpio_request_one(gpio + TWL4030_GPIO_MAX, > beagle_config.usb_pwr_level, > -+ "nEN_USB_PWR"); > - > - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) > */ > - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; > -@@ -404,7 +424,8 @@ static struct platform_device leds_gpio = { > - static struct gpio_keys_button gpio_buttons[] = { > - { > - .code = BTN_EXTRA, > -- .gpio = 7, > -+ /* Dynamically assigned depending on board */ > -+ .gpio = -EINVAL, > - .desc = "user", > - .wakeup = 1, > - }, > -@@ -468,8 +489,8 @@ static void __init beagle_opp_init(void) > - return; > - } > - > -- /* Custom OPP enabled for XM */ > -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { > -+ /* Custom OPP enabled for all xM versions */ > -+ if (cpu_is_omap3630()) { > - struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); > - struct omap_hwmod *dh = omap_hwmod_lookup("iva"); > - struct device *dev; > -@@ -509,6 +530,9 @@ static void __init omap3_beagle_init(void) > - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); > - omap3_beagle_init_rev(); > - omap3_beagle_i2c_init(); > -+ > -+ gpio_buttons[0].gpio = beagle_config.usr_button_gpio; > -+ > - platform_add_devices(omap3_beagle_devices, > - ARRAY_SIZE(omap3_beagle_devices)); > - omap_display_init(&beagle_dss_data); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0002-UNFINISHED-OMAP3- > beagle-add-support-for-expansionboa.patch b/recipes-kernel/linux/linux- > 3.0/beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for- > expansionboa.patch > deleted file mode 100644 > index 321aeae..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0002-UNFINISHED-OMAP3-beagle- > add-support-for-expansionboa.patch > +++ /dev/null > @@ -1,340 +0,0 @@ > -From 73366785ad8400aa22ffc0822ecc701349477de9 Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Thu, 21 Jul 2011 14:29:42 +0200 > -Subject: [PATCH 02/10] UNFINISHED: OMAP3: beagle: add support for > expansionboards > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 266 > +++++++++++++++++++++++++++++++ > - 1 files changed, 266 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 32f5f89..f26a9a8 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -21,6 +21,7 @@ > - #include <linux/io.h> > - #include <linux/leds.h> > - #include <linux/gpio.h> > -+#include <linux/irq.h> > - #include <linux/input.h> > - #include <linux/gpio_keys.h> > - #include <linux/opp.h> > -@@ -156,6 +157,167 @@ static void __init omap3_beagle_init_rev(void) > - } > - } > - > -+char expansionboard_name[16]; > -+ > -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) > -+#include <linux/regulator/fixed.h> > -+#include <linux/wl12xx.h> > -+ > -+#define OMAP_BEAGLE_WLAN_EN_GPIO (139) > -+#define OMAP_BEAGLE_BT_EN_GPIO (138) > -+#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) > -+#define OMAP_BEAGLE_FM_EN_BT_WU (136) > -+ > -+struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { > -+ .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO), > -+ .board_ref_clock = 2, /* 38.4 MHz */ > -+}; > -+ > -+static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, > OMAP_BEAGLE_FM_EN_BT_WU, -1}; > -+static struct platform_device wl12xx_device = { > -+ .name = "kim", > -+ .id = -1, > -+ .dev.platform_data = &gpios, > -+}; > -+ > -+static struct omap2_hsmmc_info mmcbbt[] = { > -+ { > -+ .mmc = 1, > -+ .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_8_BIT_DATA, > -+ .gpio_wp = 29, > -+ }, > -+ { > -+ .name = "wl1271", > -+ .mmc = 2, > -+ .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_POWER_OFF_CARD, > -+ .gpio_wp = -EINVAL, > -+ .gpio_cd = -EINVAL, > -+ .ocr_mask = MMC_VDD_165_195, > -+ .nonremovable = true, > -+ }, > -+ {} /* Terminator */ > -+ }; > -+ > -+static struct regulator_consumer_supply beagle_vmmc2_supply = > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); > -+ > -+static struct regulator_init_data beagle_vmmc2 = { > -+ .constraints = { > -+ .min_uV = 1850000, > -+ .max_uV = 1850000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+ .num_consumer_supplies = 1, > -+ .consumer_supplies = &beagle_vmmc2_supply, > -+}; > -+ > -+static struct fixed_voltage_config beagle_vwlan = { > -+ .supply_name = "vwl1271", > -+ .microvolts = 1800000, /* 1.8V */ > -+ .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, > -+ .startup_delay = 70000, /* 70ms */ > -+ .enable_high = 1, > -+ .enabled_at_boot = 0, > -+ .init_data = &beagle_vmmc2, > -+}; > -+ > -+static struct platform_device omap_vwlan_device = { > -+ .name = "reg-fixed-voltage", > -+ .id = 1, > -+ .dev = { > -+ .platform_data = &beagle_vwlan, > -+ }, > -+}; > -+#endif > -+ > -+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) > -+ > -+#include <plat/mcspi.h> > -+#include <linux/spi/spi.h> > -+ > -+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 > -+ > -+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { > -+ .turbo_mode = 0, > -+ .single_channel = 1, /* 0: slave, 1: master */ > -+}; > -+ > -+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata > = { > -+ { > -+ .modalias = "enc28j60", > -+ .bus_num = 4, > -+ .chip_select = 0, > -+ .max_speed_hz = 20000000, > -+ .controller_data = &enc28j60_spi_chip_info, > -+ }, > -+}; > -+ > -+static void __init omap3beagle_enc28j60_init(void) > -+{ > -+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, > "ENC28J60_IRQ") == 0) && > -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { > -+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); > -+ omap3beagle_zippy_spi_board_info[0].irq = > OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); > -+ irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, > IRQ_TYPE_EDGE_FALLING); > -+ } else { > -+ printk(KERN_ERR "could not obtain gpio for > ENC28J60_IRQ\n"); > -+ return; > -+ } > -+ > -+ spi_register_board_info(omap3beagle_zippy_spi_board_info, > -+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); > -+} > -+ > -+#else > -+static inline void __init omap3beagle_enc28j60_init(void) { return; } > -+#endif > -+ > -+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) > -+ > -+#include <plat/mcspi.h> > -+#include <linux/spi/spi.h> > -+ > -+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 > -+ > -+static struct omap2_mcspi_device_config ks8851_spi_chip_info = { > -+ .turbo_mode = 0, > -+ .single_channel = 1, /* 0: slave, 1: master */ > -+}; > -+ > -+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] > __initdata = { > -+ { > -+ .modalias = "ks8851", > -+ .bus_num = 4, > -+ .chip_select = 0, > -+ .max_speed_hz = 36000000, > -+ .controller_data = &ks8851_spi_chip_info, > -+ }, > -+}; > -+ > -+static void __init omap3beagle_ks8851_init(void) > -+{ > -+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") > == 0) && > -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { > -+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); > -+ omap3beagle_zippy2_spi_board_info[0].irq = > OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); > -+ irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, > IRQ_TYPE_EDGE_FALLING); > -+ } else { > -+ printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); > -+ return; > -+ } > -+ > -+ spi_register_board_info(omap3beagle_zippy2_spi_board_info, > -+ > ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); > -+} > -+ > -+#else > -+static inline void __init omap3beagle_ks8851_init(void) { return; } > -+#endif > -+ > - static struct mtd_partition omap3beagle_nand_partitions[] = { > - /* All the partition sizes are listed in terms of NAND block size */ > - { > -@@ -254,6 +416,12 @@ static struct omap2_hsmmc_info mmc[] = { > - .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_8_BIT_DATA, > - .gpio_wp = -EINVAL, > - }, > -+ { > -+ .mmc = 2, > -+ .caps = MMC_CAP_4_BIT_DATA, > -+ .transceiver = true, > -+ .ocr_mask = 0x00100000, /* 3.3V */ > -+ }, > - {} /* Terminator */ > - }; > - > -@@ -277,7 +445,15 @@ static int beagle_twl_gpio_setup(struct device *dev, > - mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; > - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ > - mmc[0].gpio_cd = gpio + 0; > -+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) > -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) { > -+ omap2_hsmmc_init(mmcbbt); > -+ } else { > -+ omap2_hsmmc_init(mmc); > -+ } > -+#else > - omap2_hsmmc_init(mmc); > -+#endif > - > - /* > - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM > active > -@@ -375,6 +551,19 @@ static struct i2c_board_info __initdata > beagle_i2c_eeprom[] = { > - }, > - }; > - > -+#if defined(CONFIG_RTC_DRV_DS1307) || \ > -+ defined(CONFIG_RTC_DRV_DS1307_MODULE) > -+ > -+static struct i2c_board_info __initdata beagle_i2c2_zippy[] = { > -+ { > -+ I2C_BOARD_INFO("eeprom", 0x50), > -+ I2C_BOARD_INFO("ds1307", 0x68), > -+ }, > -+}; > -+#else > -+static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; > -+#endif > -+ > - static int __init omap3_beagle_i2c_init(void) > - { > - omap3_pmic_get_config(&beagle_twldata, > -@@ -479,6 +668,15 @@ static struct omap_board_mux board_mux[] > __initdata = { > - }; > - #endif > - > -+static int __init expansionboard_setup(char *str) > -+{ > -+ if (!str) > -+ return -EINVAL; > -+ strncpy(expansionboard_name, str, 16); > -+ printk(KERN_INFO "Beagle expansionboard: %s\n", > expansionboard_name); > -+ return 0; > -+} > -+ > - static void __init beagle_opp_init(void) > - { > - int r = 0; > -@@ -542,6 +740,72 @@ static void __init omap3_beagle_init(void) > - /* REVISIT leave DVI powered down until it's needed ... */ > - gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); > - > -+ if(!strcmp(expansionboard_name, "zippy")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: initializing > enc28j60\n"); > -+ omap3beagle_enc28j60_init(); > -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO > 141 and 162 to MMC1\n"); > -+ mmc[1].gpio_wp = 141; > -+ mmc[1].gpio_cd = 162; > -+ printk(KERN_INFO "Beagle expansionboard: registering I2C2 > for zippy board\n"); > -+ omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, > -+ > ARRAY_SIZE(beagle_i2c2_zippy)); > -+ > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "zippy2")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: initializing > ks_8851\n"); > -+ omap3beagle_ks8851_init(); > -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO > 141 and 162 to MMC1\n"); > -+ mmc[1].gpio_wp = 141; > -+ mmc[1].gpio_cd = 162; > -+ printk(KERN_INFO "Beagle expansionboard: registering I2C2 > for zippy2 board\n"); > -+ omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, > -+ > ARRAY_SIZE(beagle_i2c2_zippy)); > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "trainer")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs > 130-141,162 to userspace\n"); > -+ gpio_request(130, "sysfs"); > -+ gpio_export(130, 1); > -+ gpio_request(131, "sysfs"); > -+ gpio_export(131, 1); > -+ gpio_request(132, "sysfs"); > -+ gpio_export(132, 1); > -+ gpio_request(133, "sysfs"); > -+ gpio_export(133, 1); > -+ gpio_request(134, "sysfs"); > -+ gpio_export(134, 1); > -+ gpio_request(135, "sysfs"); > -+ gpio_export(135, 1); > -+ gpio_request(136, "sysfs"); > -+ gpio_export(136, 1); > -+ gpio_request(137, "sysfs"); > -+ gpio_export(137, 1); > -+ gpio_request(138, "sysfs"); > -+ gpio_export(138, 1); > -+ gpio_request(139, "sysfs"); > -+ gpio_export(139, 1); > -+ gpio_request(140, "sysfs"); > -+ gpio_export(140, 1); > -+ gpio_request(141, "sysfs"); > -+ gpio_export(141, 1); > -+ gpio_request(162, "sysfs"); > -+ gpio_export(162, 1); > -+ } > -+ > -+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) > -+ { > -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) > -+ pr_err("error setting wl12xx data\n"); > -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx > bt platform device\n"); > -+ platform_device_register(&wl12xx_device); > -+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx > wifi platform device\n"); > -+ platform_device_register(&omap_vwlan_device); > -+ } > -+ > - usb_musb_init(NULL); > - usbhs_init(&usbhs_bdata); > - omap_nand_flash_init(NAND_BUSWIDTH_16, > omap3beagle_nand_partitions, > -@@ -558,6 +822,8 @@ static void __init omap3_beagle_init(void) > - beagle_opp_init(); > - } > - > -+early_param("buddy", expansionboard_setup); > -+ > - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") > - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ > - .boot_params = 0x80000100, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0003-HACK-OMAP3-beagle- > switch-to-GPTIMER1.patch b/recipes-kernel/linux/linux-3.0/beagle/0003-HACK- > OMAP3-beagle-switch-to-GPTIMER1.patch > deleted file mode 100644 > index 8a758ef..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0003-HACK-OMAP3-beagle-switch- > to-GPTIMER1.patch > +++ /dev/null > @@ -1,26 +0,0 @@ > -From a7e1724833070f01b82381f40b084fd33e46836d Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Thu, 21 Jul 2011 12:59:20 +0200 > -Subject: [PATCH 03/10] HACK: OMAP3: beagle: switch to GPTIMER1 > - > -Breaks with B3 and older due to clock noise > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index f26a9a8..a04f5a0 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -832,5 +832,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle > Board") > - .init_early = omap3_beagle_init_early, > - .init_irq = omap3_beagle_init_irq, > - .init_machine = omap3_beagle_init, > -- .timer = &omap3_secure_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3-beagle-HACK- > add-in-1GHz-OPP.patch b/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3- > beagle-HACK-add-in-1GHz-OPP.patch > deleted file mode 100644 > index aaa3dce..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3-beagle-HACK-add-in- > 1GHz-OPP.patch > +++ /dev/null > @@ -1,31 +0,0 @@ > -From 6ebc5081aba3428762e4e055a154fdda9ebe442e Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Wed, 25 May 2011 08:57:40 +0200 > -Subject: [PATCH 04/10] OMAP3: beagle: HACK! add in 1GHz OPP > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 2 ++ > - 1 files changed, 2 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index a04f5a0..5e1d9f9 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -701,11 +701,13 @@ static void __init beagle_opp_init(void) > - /* Enable MPU 1GHz and lower opps */ > - dev = &mh->od->pdev.dev; > - r = opp_enable(dev, 800000000); > -+ r |= opp_enable(dev, 1000000000); > - /* TODO: MPU 1GHz needs SR and ABB */ > - > - /* Enable IVA 800MHz and lower opps */ > - dev = &dh->od->pdev.dev; > - r |= opp_enable(dev, 660000000); > -+ r |= opp_enable(dev, 800000000); > - /* TODO: DSP 800MHz needs SR and ABB */ > - if (r) { > - pr_err("%s: failed to enable higher opp %d\n", > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0005-omap3-Add-basic- > support-for-720MHz-part.patch b/recipes-kernel/linux/linux-3.0/beagle/0005- > omap3-Add-basic-support-for-720MHz-part.patch > deleted file mode 100644 > index 6930b6d..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0005-omap3-Add-basic-support-for- > 720MHz-part.patch > +++ /dev/null > @@ -1,202 +0,0 @@ > -From f0a23fe6d3c8fc9bbb60a962114b64b923ca4515 Mon Sep 17 00:00:00 > 2001 > -From: Sanjeev Premi <premi@ti.com> > -Date: Tue, 18 Jan 2011 13:19:55 +0530 > -Subject: [PATCH 05/10] omap3: Add basic support for 720MHz part > - > -This patch adds support for new speed enhanced parts with ARM > -and IVA running at 720MHz and 520MHz respectively. These parts > -can be probed at run-time by reading PRODID.SKUID[3:0] at > -0x4830A20C [1]. > - > -This patch specifically does following: > - * Detect devices capable of 720MHz. > - * Add new OPP > - * Ensure that OPP is conditionally enabled. > - * Check for presence of IVA before attempting to enable > - the corresponding OPP. > - > - [1] http://focus.ti.com/lit/ug/spruff1d/spruff1d.pdf > - > -Signed-off-by: Sanjeev Premi <premi@ti.com> > ---- > - arch/arm/mach-omap2/control.h | 7 ++++ > - arch/arm/mach-omap2/id.c | 10 +++++ > - arch/arm/mach-omap2/opp3xxx_data.c | 63 > ++++++++++++++++++++++++++++++++- > - arch/arm/plat-omap/include/plat/cpu.h | 2 + > - 4 files changed, 81 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach- > omap2/control.h > -index a016c8b..69d0b9c 100644 > ---- a/arch/arm/mach-omap2/control.h > -+++ b/arch/arm/mach-omap2/control.h > -@@ -371,6 +371,13 @@ > - #define FEAT_NEON 0 > - #define FEAT_NEON_NONE 1 > - > -+/* > -+ * Product ID register > -+ */ > -+#define OMAP3_PRODID 0x020C > -+ > -+#define OMAP3_SKUID_MASK 0x0f > -+#define OMAP3_SKUID_720MHZ 0x08 > - > - #ifndef __ASSEMBLY__ > - #ifdef CONFIG_ARCH_OMAP2PLUS > -diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > -index 2537090..b6ed78a 100644 > ---- a/arch/arm/mach-omap2/id.c > -+++ b/arch/arm/mach-omap2/id.c > -@@ -210,6 +210,15 @@ static void __init omap3_check_features(void) > - * TODO: Get additional info (where applicable) > - * e.g. Size of L2 cache. > - */ > -+ > -+ /* > -+ * Does it support 720MHz? > -+ */ > -+ status = (OMAP3_SKUID_MASK & read_tap_reg(OMAP3_PRODID)); > -+ > -+ if (status & OMAP3_SKUID_720MHZ) { > -+ omap3_features |= OMAP3_HAS_720MHZ; > -+ } > - } > - > - static void __init ti816x_check_features(void) > -@@ -490,6 +499,7 @@ static void __init omap3_cpuinfo(void) > - OMAP3_SHOW_FEATURE(neon); > - OMAP3_SHOW_FEATURE(isp); > - OMAP3_SHOW_FEATURE(192mhz_clk); > -+ OMAP3_SHOW_FEATURE(720mhz); > - > - printk(")\n"); > - } > -diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach- > omap2/opp3xxx_data.c > -index d95f3f9..44fbc84 100644 > ---- a/arch/arm/mach-omap2/opp3xxx_data.c > -+++ b/arch/arm/mach-omap2/opp3xxx_data.c > -@@ -18,8 +18,10 @@ > - * GNU General Public License for more details. > - */ > - #include <linux/module.h> > -+#include <linux/opp.h> > - > - #include <plat/cpu.h> > -+#include <plat/omap_device.h> > - > - #include "control.h" > - #include "omap_opp_data.h" > -@@ -98,6 +100,8 @@ static struct omap_opp_def __initdata > omap34xx_opp_def_list[] = { > - OPP_INITIALIZER("mpu", true, 550000000, > OMAP3430_VDD_MPU_OPP4_UV), > - /* MPU OPP5 */ > - OPP_INITIALIZER("mpu", true, 600000000, > OMAP3430_VDD_MPU_OPP5_UV), > -+ /* MPU OPP6 */ > -+ OPP_INITIALIZER("mpu", false, 720000000, 1350000), > - > - /* > - * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is > -@@ -123,6 +127,8 @@ static struct omap_opp_def __initdata > omap34xx_opp_def_list[] = { > - OPP_INITIALIZER("iva", true, 400000000, > OMAP3430_VDD_MPU_OPP4_UV), > - /* DSP OPP5 */ > - OPP_INITIALIZER("iva", true, 430000000, > OMAP3430_VDD_MPU_OPP5_UV), > -+ /* DSP OPP6 */ > -+ OPP_INITIALIZER("iva", false, 520000000, 1350000), > - }; > - > - static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { > -@@ -150,6 +156,57 @@ static struct omap_opp_def __initdata > omap36xx_opp_def_list[] = { > - OPP_INITIALIZER("iva", false, 800000000, > OMAP3630_VDD_MPU_OPP1G_UV), > - }; > - > -+ > -+/** > -+ * omap3_opp_enable_720Mhz() - Enable the OPP corresponding to 720MHz > -+ * > -+ * This function would be executed only if the silicon is capable of > -+ * running at the 720MHz. > -+ */ > -+static int __init omap3_opp_enable_720Mhz(void) > -+{ > -+ int r = -ENODEV; > -+ struct omap_hwmod *oh_mpu = omap_hwmod_lookup("mpu"); > -+ struct omap_hwmod *oh_iva; > -+ struct platform_device *pdev; > -+ > -+ if (!oh_mpu || !oh_mpu->od) { > -+ goto err; > -+ } else { > -+ pdev = &oh_mpu->od->pdev; > -+ > -+ r = opp_enable(&pdev->dev, 720000000); > -+ if (r < 0) { > -+ dev_err(&pdev->dev, > -+ "opp_enable() failed for mpu@720MHz"); > -+ goto err; > -+ } > -+ } > -+ > -+ if (omap3_has_iva()) { > -+ oh_iva = omap_hwmod_lookup("iva"); > -+ > -+ if (!oh_iva || !oh_iva->od) { > -+ r = -ENODEV; > -+ goto err; > -+ } else { > -+ pdev = &oh_iva->od->pdev; > -+ > -+ r = opp_enable(&pdev->dev, 520000000); > -+ if (r < 0) { > -+ dev_err(&pdev->dev, > -+ "opp_enable() failed for > iva@520MHz"); > -+ goto err; > -+ } > -+ } > -+ } > -+ > -+ dev_info(&pdev->dev, "Enabled OPP corresponding to 720MHz\n"); > -+ > -+err: > -+ return r; > -+} > -+ > - /** > - * omap3_opp_init() - initialize omap3 opp table > - */ > -@@ -163,10 +220,14 @@ int __init omap3_opp_init(void) > - if (cpu_is_omap3630()) > - r = omap_init_opp_table(omap36xx_opp_def_list, > - ARRAY_SIZE(omap36xx_opp_def_list)); > -- else > -+ else { > - r = omap_init_opp_table(omap34xx_opp_def_list, > - ARRAY_SIZE(omap34xx_opp_def_list)); > - > -+ if (omap3_has_720mhz()) > -+ r = omap3_opp_enable_720Mhz(); > -+ } > -+ > - return r; > - } > - device_initcall(omap3_opp_init); > -diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat- > omap/include/plat/cpu.h > -index 8198bb6..5204c1e 100644 > ---- a/arch/arm/plat-omap/include/plat/cpu.h > -+++ b/arch/arm/plat-omap/include/plat/cpu.h > -@@ -478,6 +478,7 @@ extern u32 omap3_features; > - #define OMAP3_HAS_192MHZ_CLK BIT(5) > - #define OMAP3_HAS_IO_WAKEUP BIT(6) > - #define OMAP3_HAS_SDRC BIT(7) > -+#define OMAP3_HAS_720MHZ BIT(8) > - > - #define OMAP3_HAS_FEATURE(feat,flag) \ > - static inline unsigned int omap3_has_ ##feat(void) \ > -@@ -493,5 +494,6 @@ OMAP3_HAS_FEATURE(isp, ISP) > - OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) > - OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) > - OMAP3_HAS_FEATURE(sdrc, SDRC) > -+OMAP3_HAS_FEATURE(720mhz, 720MHZ) > - > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0006-ARM-OMAP2- > beagleboard-make-wilink-init-look-more-lik.patch b/recipes-kernel/linux/linux- > 3.0/beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more- > lik.patch > deleted file mode 100644 > index b63f9f7..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0006-ARM-OMAP2-beagleboard- > make-wilink-init-look-more-lik.patch > +++ /dev/null > @@ -1,32 +0,0 @@ > -From d9242a243b61059cacde8ce1241b84fc787c57d1 Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Thu, 20 Oct 2011 11:14:08 +0200 > -Subject: [PATCH 06/10] ARM: OMAP2+: beagleboard: make wilink init look > more like pandaboard > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 8 +------- > - 1 files changed, 1 insertions(+), 7 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 5e1d9f9..13fffb0 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -203,13 +203,7 @@ static struct regulator_consumer_supply > beagle_vmmc2_supply = > - > - static struct regulator_init_data beagle_vmmc2 = { > - .constraints = { > -- .min_uV = 1850000, > -- .max_uV = 1850000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, > - }, > - .num_consumer_supplies = 1, > - .consumer_supplies = &beagle_vmmc2_supply, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0007-omap_hsmmc-Set-dto- > to-max-value-of-14-to-avoid-SD-Ca.patch b/recipes-kernel/linux/linux- > 3.0/beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD- > Ca.patch > deleted file mode 100644 > index e79f513..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0007-omap_hsmmc-Set-dto-to-max- > value-of-14-to-avoid-SD-Ca.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From 47be8c9046c22715ce646091dd9e98fa87fc86e1 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Mon, 18 Jul 2011 23:13:41 -0500 > -Subject: [PATCH 07/10] omap_hsmmc: Set dto to max value of 14 to avoid SD > Card timeouts > - > -This fixes MMC errors due to timeouts on certain SD Cards following > suggestions > -to set dto to 14 by Jason Kridner and Steven Kipisz > - > -Details of the issue: > -http://talk.maemo.org/showthread.php?p=1000707#post1000707 > - > -This fix was originally proposed by Sukumar Ghoral of TI. > ---- > - drivers/mmc/host/omap_hsmmc.c | 3 +++ > - 1 files changed, 3 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mmc/host/omap_hsmmc.c > b/drivers/mmc/host/omap_hsmmc.c > -index dedf3da..a8a60d4 100644 > ---- a/drivers/mmc/host/omap_hsmmc.c > -+++ b/drivers/mmc/host/omap_hsmmc.c > -@@ -1441,6 +1441,9 @@ static void set_data_timeout(struct > omap_hsmmc_host *host, > - dto = 14; > - } > - > -+ /* Set dto to max value of 14 to avoid SD Card timeouts */ > -+ dto = 14; > -+ > - reg &= ~DTO_MASK; > - reg |= dto << DTO_SHIFT; > - OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0008-OMAP2-add-cpu-id- > register-to-MAC-address-helper.patch b/recipes-kernel/linux/linux- > 3.0/beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch > deleted file mode 100644 > index b864c19..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0008-OMAP2-add-cpu-id-register- > to-MAC-address-helper.patch > +++ /dev/null > @@ -1,89 +0,0 @@ > -From 2a9282daf94e8b9a1c8dc6fdf5b97461eb15348d Mon Sep 17 00:00:00 > 2001 > -From: Andy Green <andy@warmcat.com> > -Date: Thu, 24 Mar 2011 21:27:29 +0000 > -Subject: [PATCH 08/10] OMAP2+: add cpu id register to MAC address helper > - > -Introduce a generic helper function that can set a MAC address using > -data from the OMAP unique CPU ID register. > - > -For comparison purposes this produces a MAC address of > - > - 2e:40:70:f0:12:06 > - > -for the ethernet device on my Panda. > - > -Note that this patch requires the fix patch for CPU ID register > -indexes previously posted to linux-omap, otherwise the CPU ID is > -misread on Panda by the existing function to do it. This patch > -is already on linux-omap. > - > -"OMAP2+:Common CPU DIE ID reading code reads wrong registers for > OMAP4430" > -http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap- > 2.6.git;a=commit;h=b235e007831dbf57710e59cd4a120e2f374eecb9 > - > -Signed-off-by: Andy Green <andy.green@linaro.org> > ---- > - arch/arm/mach-omap2/id.c | 39 > +++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/include/mach/id.h | 1 + > - 2 files changed, 40 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > -index b6ed78a..de993f1 100644 > ---- a/arch/arm/mach-omap2/id.c > -+++ b/arch/arm/mach-omap2/id.c > -@@ -567,3 +567,42 @@ void __init omap2_set_globals_tap(struct > omap_globals *omap2_globals) > - else > - tap_prod_id = 0x0208; > - } > -+ > -+/* > -+ * this uses the unique per-cpu info from the cpu fuses set at factory to > -+ * generate a 6-byte MAC address. Two bits in the generated code are used > -+ * to elaborate the generated address into four, so it can be used on multiple > -+ * network interfaces. > -+ */ > -+ > -+void omap2_die_id_to_ethernet_mac(u8 *mac, int subtype) > -+{ > -+ struct omap_die_id odi; > -+ u32 tap = read_tap_reg(OMAP_TAP_IDCODE); > -+ > -+ omap_get_die_id(&odi); > -+ > -+ mac[0] = odi.id_2; > -+ mac[1] = odi.id_2 >> 8; > -+ mac[2] = odi.id_1; > -+ mac[3] = odi.id_1 >> 8; > -+ mac[4] = odi.id_1 >> 16; > -+ mac[5] = odi.id_1 >> 24; > -+ > -+ /* XOR other chip-specific data with ID */ > -+ > -+ tap ^= odi.id_3; > -+ > -+ mac[0] ^= tap; > -+ mac[1] ^= tap >> 8; > -+ mac[2] ^= tap >> 16; > -+ mac[3] ^= tap >> 24; > -+ > -+ /* allow four MACs from this same basic data */ > -+ > -+ mac[1] = (mac[1] & ~0xc0) | ((subtype & 3) << 6); > -+ > -+ /* mark it as not multicast and outside official 80211 MAC namespace > */ > -+ > -+ mac[0] = (mac[0] & ~1) | 2; > -+} > -diff --git a/arch/arm/mach-omap2/include/mach/id.h b/arch/arm/mach- > omap2/include/mach/id.h > -index 02ed3aa..373313a 100644 > ---- a/arch/arm/mach-omap2/include/mach/id.h > -+++ b/arch/arm/mach-omap2/include/mach/id.h > -@@ -18,5 +18,6 @@ struct omap_die_id { > - }; > - > - void omap_get_die_id(struct omap_die_id *odi); > -+void omap2_die_id_to_ethernet_mac(u8 *mac, int subtype); > - > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2- > BeagleBoard-Fix-up-random-or-missing-MAC-.patch b/recipes- > kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random- > or-missing-MAC-.patch > deleted file mode 100644 > index 3da12c7..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2-BeagleBoard- > Fix-up-random-or-missing-MAC-.patch > +++ /dev/null > @@ -1,156 +0,0 @@ > -From d0212d089b62cd7ebcd53104717180482e35ec1a Mon Sep 17 00:00:00 > 2001 > -From: Jason Kridner <jdk@ti.com> > -Date: Thu, 15 Sep 2011 18:23:02 -0400 > -Subject: [PATCH 09/10] HACK: OMAP2+: BeagleBoard: Fix up random or > missing MAC addresses for eth0 and wlan0 > - > -This was borrowed from the Panda implementation at > http://patches.linaro.org/777/ > - > -This patch registers a network device notifier callback to set the mac > -addresses for the onboard network assets of the BeagleBoard correctly, despite > the > -drivers involved have used a random or all-zeros MAC address. > - > -The technique was suggested by Alan Cox on lkml. > - > -It works by device path so it corrects the MAC addresses even if the > -drivers are in modules loaded in an order that changes their interface > -name from usual (eg, the onboard module might be "wlan1" if there is a > -USB wireless stick plugged in and its module is inserted first.) > - > -Cc: Andy Green <andy@warmcat.com> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 90 > +++++++++++++++++++++++++++++++ > - 1 files changed, 90 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 13fffb0..5ffe185 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -33,6 +33,8 @@ > - > - #include <linux/regulator/machine.h> > - #include <linux/i2c/twl.h> > -+#include <linux/netdevice.h> > -+#include <linux/if_ether.h> > - > - #include <mach/hardware.h> > - #include <asm/mach-types.h> > -@@ -42,6 +44,7 @@ > - > - #include <plat/board.h> > - #include <plat/common.h> > -+#include <mach/id.h> > - #include <video/omapdss.h> > - #include <video/omap-panel-generic-dpi.h> > - #include <plat/gpmc.h> > -@@ -91,6 +94,90 @@ static struct { > - .usr_button_gpio = 4, > - }; > - > -+/* > -+ * This device path represents the onboard USB <-> Ethernet bridge > -+ * on the BeagleBoard-xM which needs a random or all-zeros > -+ * mac address replaced with a per-cpu stable generated one > -+ */ > -+ > -+static const char * const xm_fixup_mac_device_paths[] = { > -+ "usb1/1-2/1-2.1/1-2.1:1.0", > -+}; > -+ > -+static int beagle_device_path_need_mac(struct device *dev) > -+{ > -+ const char **try = (const char **) xm_fixup_mac_device_paths; > -+ const char *path; > -+ int count = ARRAY_SIZE(xm_fixup_mac_device_paths); > -+ const char *p; > -+ int len; > -+ struct device *devn; > -+ > -+ while (count--) { > -+ > -+ p = *try + strlen(*try); > -+ devn = dev; > -+ > -+ while (devn) { > -+ > -+ path = dev_name(devn); > -+ len = strlen(path); > -+ > -+ if ((p - *try) < len) { > -+ devn = NULL; > -+ continue; > -+ } > -+ > -+ p -= len; > -+ > -+ if (strncmp(path, p, len)) { > -+ devn = NULL; > -+ continue; > -+ } > -+ > -+ devn = devn->parent; > -+ if (p == *try) > -+ return count; > -+ > -+ if (devn != NULL && (p - *try) < 2) > -+ devn = NULL; > -+ > -+ p--; > -+ if (devn != NULL && *p != '/') > -+ devn = NULL; > -+ } > -+ > -+ try++; > -+ } > -+ > -+ return -ENOENT; > -+} > -+ > -+static int omap_beagle_netdev_event(struct notifier_block *this, > -+ unsigned long event, void > *ptr) > -+{ > -+ struct net_device *dev = ptr; > -+ struct sockaddr sa; > -+ int n; > -+ > -+ if (event != NETDEV_REGISTER) > -+ return NOTIFY_DONE; > -+ > -+ n = beagle_device_path_need_mac(dev->dev.parent); > -+ if (n >= 0) { > -+ sa.sa_family = dev->type; > -+ omap2_die_id_to_ethernet_mac(sa.sa_data, n); > -+ dev->netdev_ops->ndo_set_mac_address(dev, &sa); > -+ } > -+ > -+ return NOTIFY_DONE; > -+} > -+ > -+static struct notifier_block omap_beagle_netdev_notifier = { > -+ .notifier_call = omap_beagle_netdev_event, > -+ .priority = 1, > -+}; > -+ > - static struct gpio omap3_beagle_rev_gpios[] __initdata = { > - { 171, GPIOF_IN, "rev_id_0" }, > - { 172, GPIOF_IN, "rev_id_1" }, > -@@ -146,14 +233,17 @@ static void __init omap3_beagle_init_rev(void) > - printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n"); > - omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; > - beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH; > -+ register_netdevice_notifier(&omap_beagle_netdev_notifier); > - break; > - case 2: > - printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); > - omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; > -+ register_netdevice_notifier(&omap_beagle_netdev_notifier); > - break; > - default: > - printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", > beagle_rev); > - omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; > -+ register_netdevice_notifier(&omap_beagle_netdev_notifier); > - } > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2- > beagleboard-fix-mmc-write-protect-pin-when.patch b/recipes- > kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write- > protect-pin-when.patch > deleted file mode 100644 > index bcb7e4f..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2-beagleboard-fix- > mmc-write-protect-pin-when.patch > +++ /dev/null > @@ -1,26 +0,0 @@ > -From 713c5b4ce910dacdd75e9616b0f989d643008536 Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Wed, 19 Oct 2011 12:44:14 +0200 > -Subject: [PATCH 10/10] ARM: OMAP2+: beagleboard: fix mmc write protect > pin when using the wilink expansion board > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 5ffe185..0124060 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -274,7 +274,7 @@ static struct omap2_hsmmc_info mmcbbt[] = { > - { > - .mmc = 1, > - .caps = MMC_CAP_4_BIT_DATA | > MMC_CAP_8_BIT_DATA, > -- .gpio_wp = 29, > -+ .gpio_wp = -EINVAL, > - }, > - { > - .name = "wl1271", > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagle/0011-beagleboard-reinstate- > usage-of-hi-speed-PLL-divider.patch b/recipes-kernel/linux/linux- > 3.0/beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch > deleted file mode 100644 > index 4d2a978..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagle/0011-beagleboard-reinstate-usage- > of-hi-speed-PLL-divider.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From a2139a0efb9472a649465a1080799c73470fd201 Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Wed, 25 Jan 2012 15:48:36 +0100 > -Subject: [PATCH] beagleboard: reinstate usage of hi-speed PLL divider > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 5 +++++ > - 1 files changed, 5 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 016d0985..c4c7a99 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -467,6 +467,11 @@ static struct omap_dss_device beagle_dvi_device = { > - .driver_name = "generic_dpi_panel", > - .data = &dvi_panel, > - .phy.dpi.data_lines = 24, > -+ .clocks = { > -+ .dispc = { > -+ .dispc_fclk_src = > OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, > -+ }, > -+ }, > - .reset_gpio = -EINVAL, > - }; > - > --- > -1.7.7.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/beagleboard/defconfig b/recipes- > kernel/linux/linux-3.0/beagleboard/defconfig > deleted file mode 100644 > index 5be7772..0000000 > --- a/recipes-kernel/linux/linux-3.0/beagleboard/defconfig > +++ /dev/null > @@ -1,3604 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux/arm 3.0.22 Kernel Configuration > -# > -CONFIG_ARM=y > -CONFIG_HAVE_PWM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_HAVE_SCHED_CLOCK=y > -CONFIG_GENERIC_GPIO=y > -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_KTIME_SCALAR=y > -CONFIG_HAVE_PROC_CPU=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_NEED_DMA_MAP_STATE=y > -CONFIG_VECTORS_BASE=0xffff0000 > -# CONFIG_ARM_PATCH_PHYS_VIRT is not set > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_HAVE_IRQ_WORK=y > -CONFIG_IRQ_WORK=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_CROSS_COMPILE="" > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZMA=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_DEFAULT_HOSTNAME="beagleboard" > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -CONFIG_BSD_PROCESS_ACCT=y > -# CONFIG_BSD_PROCESS_ACCT_V3 is not set > -CONFIG_FHANDLE=y > -CONFIG_TASKSTATS=y > -CONFIG_TASK_DELAY_ACCT=y > -CONFIG_TASK_XACCT=y > -CONFIG_TASK_IO_ACCOUNTING=y > -# CONFIG_AUDIT is not set > -CONFIG_HAVE_GENERIC_HARDIRQS=y > - > -# > -# IRQ subsystem > -# > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_HAVE_SPARSE_IRQ=y > -CONFIG_GENERIC_IRQ_SHOW=y > -CONFIG_GENERIC_IRQ_CHIP=y > -# CONFIG_SPARSE_IRQ is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TINY_RCU=y > -# CONFIG_PREEMPT_RCU is not set > -# CONFIG_RCU_TRACE is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=16 > -CONFIG_CGROUPS=y > -# CONFIG_CGROUP_DEBUG is not set > -CONFIG_CGROUP_FREEZER=y > -CONFIG_CGROUP_DEVICE=y > -CONFIG_CPUSETS=y > -CONFIG_PROC_PID_CPUSET=y > -CONFIG_CGROUP_CPUACCT=y > -CONFIG_RESOURCE_COUNTERS=y > -CONFIG_CGROUP_MEM_RES_CTLR=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y > -CONFIG_CGROUP_PERF=y > -CONFIG_CGROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -CONFIG_RT_GROUP_SCHED=y > -CONFIG_BLK_CGROUP=y > -# CONFIG_DEBUG_BLK_CGROUP is not set > -CONFIG_NAMESPACES=y > -CONFIG_UTS_NS=y > -CONFIG_IPC_NS=y > -CONFIG_USER_NS=y > -CONFIG_PID_NS=y > -CONFIG_NET_NS=y > -CONFIG_SCHED_AUTOGROUP=y > -CONFIG_MM_OWNER=y > -# CONFIG_SYSFS_DEPRECATED is not set > -# CONFIG_RELAY is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -CONFIG_RD_BZIP2=y > -CONFIG_RD_LZMA=y > -CONFIG_RD_XZ=y > -CONFIG_RD_LZO=y > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EXPERT=y > -CONFIG_UID16=y > -# CONFIG_SYSCTL_SYSCALL is not set > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_ALL is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > -CONFIG_EMBEDDED=y > -CONFIG_HAVE_PERF_EVENTS=y > -CONFIG_PERF_USE_VMALLOC=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_PERF_EVENTS=y > -# CONFIG_PERF_COUNTERS is not set > -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set > -CONFIG_VM_EVENT_COUNTERS=y > -# CONFIG_COMPAT_BRK is not set > -CONFIG_SLAB=y > -# CONFIG_SLUB is not set > -# CONFIG_SLOB is not set > -CONFIG_PROFILING=y > -CONFIG_OPROFILE=m > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y > -CONFIG_HAVE_CLK=y > -CONFIG_HAVE_DMA_API_DEBUG=y > -CONFIG_HAVE_HW_BREAKPOINT=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -CONFIG_MODULE_FORCE_LOAD=y > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -CONFIG_MODULE_SRCVERSION_ALL=y > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -CONFIG_BLK_DEV_BSG=y > -CONFIG_BLK_DEV_INTEGRITY=y > -CONFIG_BLK_DEV_THROTTLING=y > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -CONFIG_IOSCHED_DEADLINE=y > -CONFIG_IOSCHED_CFQ=y > -CONFIG_CFQ_GROUP_IOSCHED=y > -# CONFIG_DEFAULT_DEADLINE is not set > -CONFIG_DEFAULT_CFQ=y > -# CONFIG_DEFAULT_NOOP is not set > -CONFIG_DEFAULT_IOSCHED="cfq" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -CONFIG_INLINE_SPIN_UNLOCK=y > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -CONFIG_INLINE_READ_UNLOCK=y > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -CONFIG_INLINE_READ_UNLOCK_IRQ=y > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -CONFIG_INLINE_WRITE_UNLOCK=y > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_VEXPRESS is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_CNS3XXX is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_MXS is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_LPC32XX is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_NUC93X is not set > -# CONFIG_ARCH_TEGRA is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_SHMOBILE is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5P64X0 is not set > -# CONFIG_ARCH_S5PC100 is not set > -# CONFIG_ARCH_S5PV210 is not set > -# CONFIG_ARCH_EXYNOS4 is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_TCC_926 is not set > -# CONFIG_ARCH_U300 is not set > -# CONFIG_ARCH_U8500 is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_DAVINCI is not set > -CONFIG_ARCH_OMAP=y > -# CONFIG_PLAT_SPEAR is not set > -# CONFIG_ARCH_VT8500 is not set > -# CONFIG_GPIO_PCA953X is not set > -# CONFIG_KEYBOARD_GPIO_POLLED is not set > - > -# > -# TI OMAP Common Features > -# > -CONFIG_ARCH_OMAP_OTG=y > -# CONFIG_ARCH_OMAP1 is not set > -CONFIG_ARCH_OMAP2PLUS=y > - > -# > -# OMAP Feature Selections > -# > -CONFIG_OMAP_SMARTREFLEX=y > -CONFIG_OMAP_SMARTREFLEX_CLASS3=y > -CONFIG_OMAP_RESET_CLOCKS=y > -CONFIG_OMAP_MUX=y > -CONFIG_OMAP_MUX_DEBUG=y > -CONFIG_OMAP_MUX_WARNINGS=y > -CONFIG_OMAP_MCBSP=y > -CONFIG_OMAP_MBOX_FWK=m > -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 > -CONFIG_OMAP_IOMMU=y > -CONFIG_OMAP_IOMMU_DEBUG=m > -CONFIG_OMAP_32K_TIMER=y > -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set > -CONFIG_OMAP_32K_TIMER_HZ=128 > -CONFIG_OMAP_DM_TIMER=y > -CONFIG_OMAP_PM_NOOP=y > - > -# > -# TI OMAP2/3/4 Specific Features > -# > -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y > -# CONFIG_ARCH_OMAP2 is not set > -CONFIG_ARCH_OMAP3=y > -# CONFIG_ARCH_OMAP4 is not set > -CONFIG_SOC_OMAP3430=y > -# CONFIG_SOC_OMAPTI816X is not set > -CONFIG_OMAP_PACKAGE_CBB=y > - > -# > -# OMAP Board Type > -# > -CONFIG_MACH_OMAP3_BEAGLE=y > -# CONFIG_MACH_DEVKIT8000 is not set > -# CONFIG_MACH_OMAP_LDP is not set > -# CONFIG_MACH_OMAP3530_LV_SOM is not set > -# CONFIG_MACH_OMAP3_TORPEDO is not set > -CONFIG_MACH_OVERO=y > -CONFIG_MACH_OMAP3EVM=y > -# CONFIG_MACH_OMAP3517EVM is not set > -# CONFIG_MACH_CRANEBOARD is not set > -# CONFIG_MACH_OMAP3_PANDORA is not set > -CONFIG_MACH_OMAP3_TOUCHBOOK=y > -# CONFIG_MACH_OMAP_3430SDP is not set > -# CONFIG_MACH_NOKIA_RM680 is not set > -# CONFIG_MACH_NOKIA_RX51 is not set > -CONFIG_MACH_OMAP_ZOOM2=y > -# CONFIG_MACH_OMAP_ZOOM3 is not set > -# CONFIG_MACH_CM_T35 is not set > -# CONFIG_MACH_CM_T3517 is not set > -# CONFIG_MACH_IGEP0020 is not set > -# CONFIG_MACH_IGEP0030 is not set > -# CONFIG_MACH_SBC3530 is not set > -# CONFIG_MACH_OMAP_3630SDP is not set > -# CONFIG_OMAP3_EMU is not set > -# CONFIG_OMAP3_SDRC_AC_TIMING is not set > - > -# > -# System MMU > -# > - > -# > -# Processor Type > -# > -CONFIG_CPU_V7=y > -CONFIG_CPU_32v6K=y > -CONFIG_CPU_32v7=y > -CONFIG_CPU_ABRT_EV7=y > -CONFIG_CPU_PABRT_V7=y > -CONFIG_CPU_CACHE_V7=y > -CONFIG_CPU_CACHE_VIPT=y > -CONFIG_CPU_COPY_V6=y > -CONFIG_CPU_TLB_V7=y > -CONFIG_CPU_HAS_ASID=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -CONFIG_ARM_THUMBEE=y > -# CONFIG_SWP_EMULATE is not set > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_BPREDICT_DISABLE is not set > -CONFIG_ARM_L1_CACHE_SHIFT_6=y > -CONFIG_ARM_L1_CACHE_SHIFT=6 > -CONFIG_ARM_DMA_MEM_BUFFERABLE=y > -CONFIG_ARM_ERRATA_430973=y > -# CONFIG_ARM_ERRATA_458693 is not set > -# CONFIG_ARM_ERRATA_460075 is not set > -# CONFIG_ARM_ERRATA_743622 is not set > -# CONFIG_ARM_ERRATA_754322 is not set > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -CONFIG_PREEMPT_NONE=y > -# CONFIG_PREEMPT_VOLUNTARY is not set > -# CONFIG_PREEMPT is not set > -CONFIG_HZ=128 > -# CONFIG_THUMB2_KERNEL is not set > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -CONFIG_HAVE_ARCH_PFN_VALID=y > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_HAVE_MEMBLOCK=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=4 > -CONFIG_COMPACTION=y > -CONFIG_MIGRATION=y > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=0 > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_NEED_PER_CPU_KM=y > -# CONFIG_CLEANCACHE is not set > -CONFIG_FORCE_MAX_ZONEORDER=11 > -CONFIG_LEDS=y > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > -# CONFIG_SECCOMP is not set > -# CONFIG_CC_STACKPROTECTOR is not set > -# CONFIG_DEPRECATED_PARAM_STRUCT is not set > - > -# > -# Boot options > -# > -# CONFIG_USE_OF is not set > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE=" debug " > -CONFIG_CMDLINE_FROM_BOOTLOADER=y > -# CONFIG_CMDLINE_EXTEND is not set > -# CONFIG_CMDLINE_FORCE is not set > -# CONFIG_XIP_KERNEL is not set > -CONFIG_KEXEC=y > -CONFIG_ATAGS_PROC=y > -# CONFIG_CRASH_DUMP is not set > -CONFIG_AUTO_ZRELADDR=y > - > -# > -# CPU Power Management > -# > - > -# > -# CPU Frequency scaling > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -CONFIG_CPU_FREQ_STAT=y > -CONFIG_CPU_FREQ_STAT_DETAILS=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -CONFIG_VFP=y > -CONFIG_VFPv3=y > -CONFIG_NEON=y > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -CONFIG_BINFMT_AOUT=m > -CONFIG_BINFMT_MISC=y > - > -# > -# Power management options > -# > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -CONFIG_PM_SLEEP=y > -CONFIG_PM_RUNTIME=y > -CONFIG_PM=y > -CONFIG_PM_DEBUG=y > -# CONFIG_PM_ADVANCED_DEBUG is not set > -# CONFIG_PM_TEST_SUSPEND is not set > -CONFIG_CAN_PM_TRACE=y > -# CONFIG_APM_EMULATION is not set > -CONFIG_ARCH_HAS_OPP=y > -CONFIG_PM_OPP=y > -CONFIG_PM_RUNTIME_CLK=y > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -CONFIG_XFRM_IPCOMP=m > -CONFIG_NET_KEY=y > -# CONFIG_NET_KEY_MIGRATE is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_ROUTE_CLASSID=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -CONFIG_IP_PNP_BOOTP=y > -CONFIG_IP_PNP_RARP=y > -CONFIG_NET_IPIP=m > -CONFIG_NET_IPGRE_DEMUX=m > -CONFIG_NET_IPGRE=m > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -CONFIG_INET_AH=m > -CONFIG_INET_ESP=m > -CONFIG_INET_IPCOMP=m > -CONFIG_INET_XFRM_TUNNEL=m > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -CONFIG_INET_LRO=y > -CONFIG_INET_DIAG=m > -CONFIG_INET_TCP_DIAG=m > -CONFIG_TCP_CONG_ADVANCED=y > -CONFIG_TCP_CONG_BIC=m > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_TCP_CONG_WESTWOOD=m > -CONFIG_TCP_CONG_HTCP=m > -CONFIG_TCP_CONG_HSTCP=m > -CONFIG_TCP_CONG_HYBLA=m > -CONFIG_TCP_CONG_VEGAS=m > -CONFIG_TCP_CONG_SCALABLE=m > -CONFIG_TCP_CONG_LP=m > -CONFIG_TCP_CONG_VENO=m > -CONFIG_TCP_CONG_YEAH=m > -CONFIG_TCP_CONG_ILLINOIS=m > -CONFIG_DEFAULT_CUBIC=y > -# CONFIG_DEFAULT_RENO is not set > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -CONFIG_INET6_AH=m > -CONFIG_INET6_ESP=m > -CONFIG_INET6_IPCOMP=m > -CONFIG_IPV6_MIP6=m > -CONFIG_INET6_XFRM_TUNNEL=m > -CONFIG_INET6_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -CONFIG_IPV6_TUNNEL=m > -CONFIG_IPV6_MULTIPLE_TABLES=y > -CONFIG_IPV6_SUBTREES=y > -CONFIG_IPV6_MROUTE=y > -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y > -# CONFIG_IPV6_PIMSM_V2 is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETWORK_PHY_TIMESTAMPING=y > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > -CONFIG_BRIDGE_NETFILTER=y > - > -# > -# Core Netfilter Configuration > -# > -CONFIG_NETFILTER_NETLINK=m > -CONFIG_NETFILTER_NETLINK_QUEUE=m > -CONFIG_NETFILTER_NETLINK_LOG=m > -CONFIG_NF_CONNTRACK=m > -CONFIG_NF_CONNTRACK_MARK=y > -CONFIG_NF_CONNTRACK_ZONES=y > -CONFIG_NF_CONNTRACK_EVENTS=y > -CONFIG_NF_CONNTRACK_TIMESTAMP=y > -CONFIG_NF_CT_PROTO_DCCP=m > -CONFIG_NF_CT_PROTO_GRE=m > -CONFIG_NF_CT_PROTO_SCTP=m > -CONFIG_NF_CT_PROTO_UDPLITE=m > -CONFIG_NF_CONNTRACK_AMANDA=m > -CONFIG_NF_CONNTRACK_FTP=m > -CONFIG_NF_CONNTRACK_H323=m > -CONFIG_NF_CONNTRACK_IRC=m > -CONFIG_NF_CONNTRACK_BROADCAST=m > -CONFIG_NF_CONNTRACK_NETBIOS_NS=m > -CONFIG_NF_CONNTRACK_SNMP=m > -CONFIG_NF_CONNTRACK_PPTP=m > -CONFIG_NF_CONNTRACK_SANE=m > -CONFIG_NF_CONNTRACK_SIP=m > -CONFIG_NF_CONNTRACK_TFTP=m > -CONFIG_NF_CT_NETLINK=m > -# CONFIG_NETFILTER_TPROXY is not set > -CONFIG_NETFILTER_XTABLES=m > - > -# > -# Xtables combined modules > -# > -CONFIG_NETFILTER_XT_MARK=m > -CONFIG_NETFILTER_XT_CONNMARK=m > -CONFIG_NETFILTER_XT_SET=m > - > -# > -# Xtables targets > -# > -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m > -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m > -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m > -CONFIG_NETFILTER_XT_TARGET_CT=m > -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set > -CONFIG_NETFILTER_XT_TARGET_HL=m > -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m > -# CONFIG_NETFILTER_XT_TARGET_LED is not set > -CONFIG_NETFILTER_XT_TARGET_MARK=m > -CONFIG_NETFILTER_XT_TARGET_NFLOG=m > -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m > -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set > -CONFIG_NETFILTER_XT_TARGET_RATEEST=m > -CONFIG_NETFILTER_XT_TARGET_TEE=m > -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set > -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m > -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set > - > -# > -# Xtables matches > -# > -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m > -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set > -CONFIG_NETFILTER_XT_MATCH_COMMENT=m > -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m > -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m > -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m > -CONFIG_NETFILTER_XT_MATCH_CPU=m > -CONFIG_NETFILTER_XT_MATCH_DCCP=m > -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m > -CONFIG_NETFILTER_XT_MATCH_DSCP=m > -CONFIG_NETFILTER_XT_MATCH_ESP=m > -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_HELPER=m > -CONFIG_NETFILTER_XT_MATCH_HL=m > -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m > -CONFIG_NETFILTER_XT_MATCH_IPVS=m > -CONFIG_NETFILTER_XT_MATCH_LENGTH=m > -CONFIG_NETFILTER_XT_MATCH_LIMIT=m > -CONFIG_NETFILTER_XT_MATCH_MAC=m > -CONFIG_NETFILTER_XT_MATCH_MARK=m > -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m > -# CONFIG_NETFILTER_XT_MATCH_OSF is not set > -CONFIG_NETFILTER_XT_MATCH_OWNER=m > -CONFIG_NETFILTER_XT_MATCH_POLICY=m > -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set > -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m > -CONFIG_NETFILTER_XT_MATCH_QUOTA=m > -CONFIG_NETFILTER_XT_MATCH_RATEEST=m > -CONFIG_NETFILTER_XT_MATCH_REALM=m > -CONFIG_NETFILTER_XT_MATCH_RECENT=m > -CONFIG_NETFILTER_XT_MATCH_SCTP=m > -CONFIG_NETFILTER_XT_MATCH_STATE=m > -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m > -CONFIG_NETFILTER_XT_MATCH_STRING=m > -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m > -CONFIG_NETFILTER_XT_MATCH_TIME=m > -CONFIG_NETFILTER_XT_MATCH_U32=m > -CONFIG_IP_SET=m > -CONFIG_IP_SET_MAX=256 > -# CONFIG_IP_SET_BITMAP_IP is not set > -# CONFIG_IP_SET_BITMAP_IPMAC is not set > -# CONFIG_IP_SET_BITMAP_PORT is not set > -# CONFIG_IP_SET_HASH_IP is not set > -# CONFIG_IP_SET_HASH_IPPORT is not set > -# CONFIG_IP_SET_HASH_IPPORTIP is not set > -# CONFIG_IP_SET_HASH_IPPORTNET is not set > -# CONFIG_IP_SET_HASH_NET is not set > -# CONFIG_IP_SET_HASH_NETPORT is not set > -# CONFIG_IP_SET_LIST_SET is not set > -CONFIG_IP_VS=m > -CONFIG_IP_VS_IPV6=y > -CONFIG_IP_VS_DEBUG=y > -CONFIG_IP_VS_TAB_BITS=12 > - > -# > -# IPVS transport protocol load balancing support > -# > -CONFIG_IP_VS_PROTO_TCP=y > -CONFIG_IP_VS_PROTO_UDP=y > -CONFIG_IP_VS_PROTO_AH_ESP=y > -CONFIG_IP_VS_PROTO_ESP=y > -CONFIG_IP_VS_PROTO_AH=y > -# CONFIG_IP_VS_PROTO_SCTP is not set > - > -# > -# IPVS scheduler > -# > -CONFIG_IP_VS_RR=m > -CONFIG_IP_VS_WRR=m > -CONFIG_IP_VS_LC=m > -CONFIG_IP_VS_WLC=m > -CONFIG_IP_VS_LBLC=m > -CONFIG_IP_VS_LBLCR=m > -CONFIG_IP_VS_DH=m > -CONFIG_IP_VS_SH=m > -CONFIG_IP_VS_SED=m > -CONFIG_IP_VS_NQ=m > - > -# > -# IPVS application helper > -# > -CONFIG_IP_VS_FTP=m > -CONFIG_IP_VS_NFCT=y > -CONFIG_IP_VS_PE_SIP=m > - > -# > -# IP: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV4=m > -CONFIG_NF_CONNTRACK_IPV4=m > -CONFIG_NF_CONNTRACK_PROC_COMPAT=y > -CONFIG_IP_NF_QUEUE=m > -CONFIG_IP_NF_IPTABLES=m > -CONFIG_IP_NF_MATCH_AH=m > -CONFIG_IP_NF_MATCH_ECN=m > -CONFIG_IP_NF_MATCH_TTL=m > -CONFIG_IP_NF_FILTER=m > -CONFIG_IP_NF_TARGET_REJECT=m > -CONFIG_IP_NF_TARGET_LOG=m > -CONFIG_IP_NF_TARGET_ULOG=m > -CONFIG_NF_NAT=m > -CONFIG_NF_NAT_NEEDED=y > -CONFIG_IP_NF_TARGET_MASQUERADE=m > -CONFIG_IP_NF_TARGET_NETMAP=m > -CONFIG_IP_NF_TARGET_REDIRECT=m > -CONFIG_NF_NAT_SNMP_BASIC=m > -CONFIG_NF_NAT_PROTO_DCCP=m > -CONFIG_NF_NAT_PROTO_GRE=m > -CONFIG_NF_NAT_PROTO_UDPLITE=m > -CONFIG_NF_NAT_PROTO_SCTP=m > -CONFIG_NF_NAT_FTP=m > -CONFIG_NF_NAT_IRC=m > -CONFIG_NF_NAT_TFTP=m > -CONFIG_NF_NAT_AMANDA=m > -CONFIG_NF_NAT_PPTP=m > -CONFIG_NF_NAT_H323=m > -CONFIG_NF_NAT_SIP=m > -CONFIG_IP_NF_MANGLE=m > -CONFIG_IP_NF_TARGET_CLUSTERIP=m > -CONFIG_IP_NF_TARGET_ECN=m > -CONFIG_IP_NF_TARGET_TTL=m > -CONFIG_IP_NF_RAW=m > -CONFIG_IP_NF_ARPTABLES=m > -CONFIG_IP_NF_ARPFILTER=m > -CONFIG_IP_NF_ARP_MANGLE=m > - > -# > -# IPv6: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV6=m > -CONFIG_NF_CONNTRACK_IPV6=m > -CONFIG_IP6_NF_QUEUE=m > -CONFIG_IP6_NF_IPTABLES=m > -CONFIG_IP6_NF_MATCH_AH=m > -CONFIG_IP6_NF_MATCH_EUI64=m > -CONFIG_IP6_NF_MATCH_FRAG=m > -CONFIG_IP6_NF_MATCH_OPTS=m > -CONFIG_IP6_NF_MATCH_HL=m > -CONFIG_IP6_NF_MATCH_IPV6HEADER=m > -CONFIG_IP6_NF_MATCH_MH=m > -CONFIG_IP6_NF_MATCH_RT=m > -CONFIG_IP6_NF_TARGET_HL=m > -CONFIG_IP6_NF_TARGET_LOG=m > -CONFIG_IP6_NF_FILTER=m > -CONFIG_IP6_NF_TARGET_REJECT=m > -CONFIG_IP6_NF_MANGLE=m > -CONFIG_IP6_NF_RAW=m > -# CONFIG_BRIDGE_NF_EBTABLES is not set > -CONFIG_IP_DCCP=m > -CONFIG_INET_DCCP_DIAG=m > - > -# > -# DCCP CCIDs Configuration (EXPERIMENTAL) > -# > -# CONFIG_IP_DCCP_CCID2_DEBUG is not set > -CONFIG_IP_DCCP_CCID3=y > -# CONFIG_IP_DCCP_CCID3_DEBUG is not set > -CONFIG_IP_DCCP_TFRC_LIB=y > - > -# > -# DCCP Kernel Hacking > -# > -# CONFIG_IP_DCCP_DEBUG is not set > -CONFIG_IP_SCTP=m > -# CONFIG_SCTP_DBG_MSG is not set > -# CONFIG_SCTP_DBG_OBJCNT is not set > -# CONFIG_SCTP_HMAC_NONE is not set > -# CONFIG_SCTP_HMAC_SHA1 is not set > -CONFIG_SCTP_HMAC_MD5=y > -# CONFIG_RDS is not set > -CONFIG_TIPC=m > -# CONFIG_TIPC_ADVANCED is not set > -# CONFIG_TIPC_DEBUG is not set > -CONFIG_ATM=m > -CONFIG_ATM_CLIP=m > -# CONFIG_ATM_CLIP_NO_ICMP is not set > -CONFIG_ATM_LANE=m > -CONFIG_ATM_MPOA=m > -CONFIG_ATM_BR2684=m > -# CONFIG_ATM_BR2684_IPFILTER is not set > -CONFIG_L2TP=m > -CONFIG_L2TP_DEBUGFS=m > -CONFIG_L2TP_V3=y > -CONFIG_L2TP_IP=m > -CONFIG_L2TP_ETH=m > -CONFIG_STP=m > -CONFIG_GARP=m > -CONFIG_BRIDGE=m > -CONFIG_BRIDGE_IGMP_SNOOPING=y > -# CONFIG_NET_DSA is not set > -CONFIG_VLAN_8021Q=m > -CONFIG_VLAN_8021Q_GVRP=y > -# CONFIG_DECNET is not set > -CONFIG_LLC=m > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -CONFIG_WAN_ROUTER=m > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -CONFIG_NET_SCHED=y > - > -# > -# Queueing/Scheduling > -# > -CONFIG_NET_SCH_CBQ=m > -CONFIG_NET_SCH_HTB=m > -CONFIG_NET_SCH_HFSC=m > -CONFIG_NET_SCH_ATM=m > -CONFIG_NET_SCH_PRIO=m > -CONFIG_NET_SCH_MULTIQ=m > -CONFIG_NET_SCH_RED=m > -# CONFIG_NET_SCH_SFB is not set > -CONFIG_NET_SCH_SFQ=m > -CONFIG_NET_SCH_TEQL=m > -CONFIG_NET_SCH_TBF=m > -CONFIG_NET_SCH_GRED=m > -CONFIG_NET_SCH_DSMARK=m > -CONFIG_NET_SCH_NETEM=m > -CONFIG_NET_SCH_DRR=m > -CONFIG_NET_SCH_MQPRIO=m > -CONFIG_NET_SCH_CHOKE=m > -# CONFIG_NET_SCH_QFQ is not set > - > -# > -# Classification > -# > -CONFIG_NET_CLS=y > -CONFIG_NET_CLS_BASIC=m > -CONFIG_NET_CLS_TCINDEX=m > -CONFIG_NET_CLS_ROUTE4=m > -CONFIG_NET_CLS_FW=m > -CONFIG_NET_CLS_U32=m > -CONFIG_CLS_U32_PERF=y > -CONFIG_CLS_U32_MARK=y > -CONFIG_NET_CLS_RSVP=m > -CONFIG_NET_CLS_RSVP6=m > -CONFIG_NET_CLS_FLOW=m > -CONFIG_NET_CLS_CGROUP=m > -# CONFIG_NET_EMATCH is not set > -# CONFIG_NET_CLS_ACT is not set > -CONFIG_NET_CLS_IND=y > -CONFIG_NET_SCH_FIFO=y > -# CONFIG_DCB is not set > -CONFIG_DNS_RESOLVER=y > -# CONFIG_BATMAN_ADV is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -CONFIG_CAN=m > -CONFIG_CAN_RAW=m > -CONFIG_CAN_BCM=m > - > -# > -# CAN Device Drivers > -# > -CONFIG_CAN_VCAN=m > -CONFIG_CAN_SLCAN=m > -# CONFIG_CAN_DEV is not set > -# CONFIG_CAN_DEBUG_DEVICES is not set > -CONFIG_IRDA=m > - > -# > -# IrDA protocols > -# > -CONFIG_IRLAN=m > -CONFIG_IRNET=m > -CONFIG_IRCOMM=m > -CONFIG_IRDA_ULTRA=y > - > -# > -# IrDA options > -# > -CONFIG_IRDA_CACHE_LAST_LSAP=y > -CONFIG_IRDA_FAST_RR=y > -CONFIG_IRDA_DEBUG=y > - > -# > -# Infrared-port device drivers > -# > - > -# > -# SIR device drivers > -# > -CONFIG_IRTTY_SIR=m > - > -# > -# Dongle support > -# > -CONFIG_DONGLE=y > -CONFIG_ESI_DONGLE=m > -CONFIG_ACTISYS_DONGLE=m > -CONFIG_TEKRAM_DONGLE=m > -CONFIG_TOIM3232_DONGLE=m > -CONFIG_LITELINK_DONGLE=m > -CONFIG_MA600_DONGLE=m > -CONFIG_GIRBIL_DONGLE=m > -CONFIG_MCP2120_DONGLE=m > -CONFIG_OLD_BELKIN_DONGLE=m > -# CONFIG_ACT200L_DONGLE is not set > -CONFIG_KINGSUN_DONGLE=m > -CONFIG_KSDAZZLE_DONGLE=m > -CONFIG_KS959_DONGLE=m > - > -# > -# FIR device drivers > -# > -CONFIG_USB_IRDA=m > -CONFIG_SIGMATEL_FIR=m > -CONFIG_MCS_FIR=m > -CONFIG_BT=y > -CONFIG_BT_L2CAP=y > -CONFIG_BT_SCO=y > -CONFIG_BT_RFCOMM=m > -CONFIG_BT_RFCOMM_TTY=y > -CONFIG_BT_BNEP=m > -CONFIG_BT_BNEP_MC_FILTER=y > -CONFIG_BT_BNEP_PROTO_FILTER=y > -CONFIG_BT_HIDP=m > - > -# > -# Bluetooth device drivers > -# > -CONFIG_BT_HCIBTUSB=y > -CONFIG_BT_HCIBTSDIO=m > -CONFIG_BT_HCIUART=y > -CONFIG_BT_HCIUART_H4=y > -CONFIG_BT_HCIUART_BCSP=y > -CONFIG_BT_HCIUART_ATH3K=y > -CONFIG_BT_HCIUART_LL=y > -CONFIG_BT_HCIBCM203X=m > -CONFIG_BT_HCIBPA10X=m > -CONFIG_BT_HCIBFUSB=m > -# CONFIG_BT_HCIVHCI is not set > -CONFIG_BT_MRVL=m > -# CONFIG_BT_MRVL_SDIO is not set > -CONFIG_BT_ATH3K=m > -CONFIG_BT_WILINK=m > -CONFIG_AF_RXRPC=m > -# CONFIG_AF_RXRPC_DEBUG is not set > -# CONFIG_RXKAD is not set > -CONFIG_FIB_RULES=y > -CONFIG_WIRELESS=y > -CONFIG_WIRELESS_EXT=y > -CONFIG_WEXT_CORE=y > -CONFIG_WEXT_PROC=y > -CONFIG_WEXT_SPY=y > -CONFIG_WEXT_PRIV=y > -CONFIG_CFG80211=m > -CONFIG_NL80211_TESTMODE=y > -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set > -# CONFIG_CFG80211_REG_DEBUG is not set > -CONFIG_CFG80211_DEFAULT_PS=y > -# CONFIG_CFG80211_DEBUGFS is not set > -# CONFIG_CFG80211_INTERNAL_REGDB is not set > -CONFIG_CFG80211_WEXT=y > -CONFIG_WIRELESS_EXT_SYSFS=y > -CONFIG_LIB80211=y > -CONFIG_LIB80211_CRYPT_WEP=m > -CONFIG_LIB80211_CRYPT_CCMP=m > -CONFIG_LIB80211_CRYPT_TKIP=m > -# CONFIG_LIB80211_DEBUG is not set > -CONFIG_MAC80211=m > -CONFIG_MAC80211_HAS_RC=y > -CONFIG_MAC80211_RC_PID=y > -# CONFIG_MAC80211_RC_MINSTREL is not set > -CONFIG_MAC80211_RC_DEFAULT_PID=y > -CONFIG_MAC80211_RC_DEFAULT="pid" > -# CONFIG_MAC80211_MESH is not set > -CONFIG_MAC80211_LEDS=y > -# CONFIG_MAC80211_DEBUGFS is not set > -# CONFIG_MAC80211_DEBUG_MENU is not set > -CONFIG_WIMAX=m > -CONFIG_WIMAX_DEBUG_LEVEL=8 > -CONFIG_RFKILL=y > -CONFIG_RFKILL_LEDS=y > -CONFIG_RFKILL_INPUT=y > -# CONFIG_RFKILL_REGULATOR is not set > -# CONFIG_RFKILL_GPIO is not set > -CONFIG_NET_9P=m > -# CONFIG_NET_9P_DEBUG is not set > -# CONFIG_CAIF is not set > -CONFIG_CEPH_LIB=m > -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="" > -CONFIG_DEVTMPFS=y > -CONFIG_DEVTMPFS_MOUNT=y > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -CONFIG_FW_LOADER=y > -CONFIG_FIRMWARE_IN_KERNEL=y > -CONFIG_EXTRA_FIRMWARE="" > -# CONFIG_DEBUG_DRIVER is not set > -# CONFIG_DEBUG_DEVRES is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -CONFIG_SM_FTL=m > -# CONFIG_MTD_OOPS is not set > -CONFIG_MTD_SWAP=m > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -# CONFIG_MTD_M25P80 is not set > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -CONFIG_MTD_NAND_ECC=y > -# CONFIG_MTD_NAND_ECC_SMC is not set > -CONFIG_MTD_NAND=y > -# CONFIG_MTD_NAND_VERIFY_WRITE is not set > -# CONFIG_MTD_NAND_ECC_BCH is not set > -# CONFIG_MTD_SM_COMMON is not set > -# CONFIG_MTD_NAND_MUSEUM_IDS is not set > -# CONFIG_MTD_NAND_GPIO is not set > -CONFIG_MTD_NAND_OMAP2=y > -CONFIG_MTD_NAND_IDS=y > -# CONFIG_MTD_NAND_DISKONCHIP is not set > -# CONFIG_MTD_NAND_NANDSIM is not set > -CONFIG_MTD_NAND_PLATFORM=y > -# CONFIG_MTD_ALAUDA is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > -CONFIG_MTD_UBI=y > -CONFIG_MTD_UBI_WL_THRESHOLD=4096 > -CONFIG_MTD_UBI_BEB_RESERVE=1 > -# CONFIG_MTD_UBI_GLUEBI is not set > -# CONFIG_MTD_UBI_DEBUG is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=y > -CONFIG_BLK_DEV_CRYPTOLOOP=m > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=16 > -CONFIG_BLK_DEV_RAM_SIZE=16384 > -# CONFIG_BLK_DEV_XIP is not set > -CONFIG_CDROM_PKTCDVD=m > -CONFIG_CDROM_PKTCDVD_BUFFERS=8 > -# CONFIG_CDROM_PKTCDVD_WCACHE is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -# CONFIG_BLK_DEV_RBD is not set > -# CONFIG_SENSORS_LIS3LV02D is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_INTEL_MID_PTI is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_APDS9802ALS is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_ISL29020 is not set > -# CONFIG_SENSORS_TSL2550 is not set > -CONFIG_SENSORS_BH1780=m > -# CONFIG_SENSORS_BH1770 is not set > -# CONFIG_SENSORS_APDS990X is not set > -CONFIG_HMC6352=m > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -CONFIG_BMP085=m > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=m > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -CONFIG_EEPROM_93CX6=y > -CONFIG_IWMC3200TOP=m > -# CONFIG_IWMC3200TOP_DEBUG is not set > -# CONFIG_IWMC3200TOP_DEBUGFS is not set > - > -# > -# Texas Instruments shared transport line discipline > -# > -CONFIG_TI_ST=m > -# CONFIG_SENSORS_LIS3_SPI is not set > -# CONFIG_SENSORS_LIS3_I2C is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -CONFIG_SCSI_MOD=y > -CONFIG_RAID_ATTRS=m > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -CONFIG_BLK_DEV_SR=y > -CONFIG_BLK_DEV_SR_VENDOR=y > -CONFIG_CHR_DEV_SG=y > -CONFIG_CHR_DEV_SCH=m > -CONFIG_SCSI_MULTI_LUN=y > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -CONFIG_SCSI_ISCSI_ATTRS=m > -# CONFIG_SCSI_SAS_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -CONFIG_ISCSI_TCP=m > -CONFIG_ISCSI_BOOT_SYSFS=m > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -# CONFIG_ATA is not set > -CONFIG_MD=y > -CONFIG_BLK_DEV_MD=m > -CONFIG_MD_LINEAR=m > -CONFIG_MD_RAID0=m > -CONFIG_MD_RAID1=m > -CONFIG_MD_RAID10=m > -CONFIG_MD_RAID456=m > -CONFIG_MD_MULTIPATH=m > -CONFIG_MD_FAULTY=m > -CONFIG_BLK_DEV_DM=m > -# CONFIG_DM_DEBUG is not set > -CONFIG_DM_CRYPT=m > -CONFIG_DM_SNAPSHOT=m > -CONFIG_DM_MIRROR=m > -CONFIG_DM_RAID=m > -# CONFIG_DM_LOG_USERSPACE is not set > -CONFIG_DM_ZERO=m > -CONFIG_DM_MULTIPATH=m > -# CONFIG_DM_MULTIPATH_QL is not set > -# CONFIG_DM_MULTIPATH_ST is not set > -CONFIG_DM_DELAY=m > -# CONFIG_DM_UEVENT is not set > -CONFIG_DM_FLAKEY=m > -CONFIG_TARGET_CORE=m > -CONFIG_TCM_IBLOCK=m > -CONFIG_TCM_FILEIO=m > -CONFIG_TCM_PSCSI=m > -CONFIG_LOOPBACK_TARGET=m > -# CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set > -CONFIG_NETDEVICES=y > -CONFIG_DUMMY=m > -CONFIG_BONDING=m > -CONFIG_MACVLAN=m > -CONFIG_MACVTAP=m > -CONFIG_EQUALIZER=m > -CONFIG_TUN=m > -CONFIG_VETH=m > -CONFIG_MII=y > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -# CONFIG_LXT_PHY is not set > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -# CONFIG_SMSC_PHY is not set > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -# CONFIG_LSI_ET1011C_PHY is not set > -CONFIG_MICREL_PHY=m > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -# CONFIG_AX88796 is not set > -CONFIG_SMC91X=y > -# CONFIG_TI_DAVINCI_EMAC is not set > -CONFIG_TI_DAVINCI_MDIO=m > -CONFIG_TI_DAVINCI_CPDMA=m > -# CONFIG_DM9000 is not set > -CONFIG_ENC28J60=y > -# CONFIG_ENC28J60_WRITEVERIFY is not set > -# CONFIG_ETHOC is not set > -CONFIG_SMC911X=y > -CONFIG_SMSC911X=y > -# CONFIG_SMSC911X_ARCH_HOOKS is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -CONFIG_KS8851=y > -# CONFIG_KS8851_MLL is not set > -# CONFIG_FTMAC100 is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_LIBERTAS_THINFIRM is not set > -CONFIG_AT76C50X_USB=m > -CONFIG_USB_ZD1201=m > -CONFIG_USB_NET_RNDIS_WLAN=m > -CONFIG_RTL8187=m > -CONFIG_RTL8187_LEDS=y > -# CONFIG_MAC80211_HWSIM is not set > -CONFIG_ATH_COMMON=m > -# CONFIG_ATH_DEBUG is not set > -# CONFIG_ATH9K is not set > -# CONFIG_ATH9K_HTC is not set > -CONFIG_CARL9170=m > -CONFIG_CARL9170_LEDS=y > -CONFIG_CARL9170_WPC=y > -CONFIG_B43=m > -CONFIG_B43_SDIO=y > -CONFIG_B43_PIO=y > -CONFIG_B43_PHY_N=y > -CONFIG_B43_PHY_LP=y > -CONFIG_B43_LEDS=y > -CONFIG_B43_HWRNG=y > -# CONFIG_B43_DEBUG is not set > -# CONFIG_B43LEGACY is not set > -CONFIG_HOSTAP=m > -CONFIG_HOSTAP_FIRMWARE=y > -CONFIG_HOSTAP_FIRMWARE_NVRAM=y > -# CONFIG_IWM is not set > -CONFIG_LIBERTAS=m > -CONFIG_LIBERTAS_USB=m > -CONFIG_LIBERTAS_SDIO=m > -# CONFIG_LIBERTAS_SPI is not set > -# CONFIG_LIBERTAS_DEBUG is not set > -# CONFIG_LIBERTAS_MESH is not set > -CONFIG_P54_COMMON=m > -CONFIG_P54_USB=m > -# CONFIG_P54_SPI is not set > -CONFIG_P54_LEDS=y > -CONFIG_RT2X00=m > -CONFIG_RT2500USB=m > -CONFIG_RT73USB=m > -CONFIG_RT2800USB=m > -CONFIG_RT2800USB_RT33XX=y > -CONFIG_RT2800USB_RT35XX=y > -CONFIG_RT2800USB_RT53XX=y > -CONFIG_RT2800USB_UNKNOWN=y > -CONFIG_RT2800_LIB=m > -CONFIG_RT2X00_LIB_USB=m > -CONFIG_RT2X00_LIB=m > -CONFIG_RT2X00_LIB_FIRMWARE=y > -CONFIG_RT2X00_LIB_CRYPTO=y > -CONFIG_RT2X00_LIB_LEDS=y > -# CONFIG_RT2X00_DEBUG is not set > -CONFIG_RTL8192SE=m > -CONFIG_RTL8192CU=m > -CONFIG_RTLWIFI=m > -CONFIG_RTL8192C_COMMON=m > -CONFIG_WL1251=m > -CONFIG_WL1251_SPI=m > -CONFIG_WL1251_SDIO=m > -CONFIG_WL12XX_MENU=m > -CONFIG_WL12XX=m > -CONFIG_WL12XX_HT=y > -CONFIG_WL12XX_SPI=m > -CONFIG_WL12XX_SDIO=m > -# CONFIG_WL12XX_SDIO_TEST is not set > -CONFIG_WL12XX_PLATFORM_DATA=y > -CONFIG_ZD1211RW=m > -# CONFIG_ZD1211RW_DEBUG is not set > -# CONFIG_MWIFIEX is not set > - > -# > -# WiMAX Wireless Broadband devices > -# > -CONFIG_WIMAX_I2400M=m > -CONFIG_WIMAX_I2400M_USB=m > -CONFIG_WIMAX_I2400M_SDIO=m > -CONFIG_WIMAX_IWMC3200_SDIO=y > -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 > - > -# > -# USB Network Adapters > -# > -CONFIG_USB_CATC=y > -CONFIG_USB_KAWETH=y > -CONFIG_USB_PEGASUS=y > -CONFIG_USB_RTL8150=y > -CONFIG_USB_USBNET=y > -CONFIG_USB_NET_AX8817X=y > -CONFIG_USB_NET_CDCETHER=y > -# CONFIG_USB_NET_CDC_EEM is not set > -CONFIG_USB_NET_CDC_NCM=m > -CONFIG_USB_NET_DM9601=y > -CONFIG_USB_NET_SMSC75XX=m > -CONFIG_USB_NET_SMSC95XX=y > -CONFIG_USB_NET_GL620A=y > -CONFIG_USB_NET_NET1080=y > -CONFIG_USB_NET_PLUSB=y > -CONFIG_USB_NET_MCS7830=y > -CONFIG_USB_NET_RNDIS_HOST=y > -CONFIG_USB_NET_CDC_SUBSET=y > -CONFIG_USB_ALI_M5632=y > -CONFIG_USB_AN2720=y > -CONFIG_USB_BELKIN=y > -CONFIG_USB_ARMLINUX=y > -CONFIG_USB_EPSON2888=y > -CONFIG_USB_KC2190=y > -CONFIG_USB_NET_ZAURUS=y > -CONFIG_USB_NET_CX82310_ETH=m > -# CONFIG_USB_NET_KALMIA is not set > -CONFIG_USB_HSO=m > -CONFIG_USB_NET_INT51X1=m > -CONFIG_USB_IPHETH=m > -CONFIG_USB_SIERRA_NET=m > -CONFIG_USB_VL600=m > -# CONFIG_WAN is not set > -CONFIG_ATM_DRIVERS=y > -# CONFIG_ATM_DUMMY is not set > -# CONFIG_ATM_TCP is not set > - > -# > -# CAIF transport drivers > -# > -CONFIG_PPP=m > -CONFIG_PPP_MULTILINK=y > -CONFIG_PPP_FILTER=y > -CONFIG_PPP_ASYNC=m > -CONFIG_PPP_SYNC_TTY=m > -CONFIG_PPP_DEFLATE=m > -CONFIG_PPP_BSDCOMP=m > -CONFIG_PPP_MPPE=m > -CONFIG_PPPOE=m > -CONFIG_PPTP=m > -# CONFIG_PPPOATM is not set > -CONFIG_PPPOL2TP=m > -# CONFIG_SLIP is not set > -CONFIG_SLHC=m > -CONFIG_NETCONSOLE=m > -CONFIG_NETCONSOLE_DYNAMIC=y > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -CONFIG_INPUT_FF_MEMLESS=y > -CONFIG_INPUT_POLLDEV=y > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -CONFIG_INPUT_MOUSEDEV=y > -CONFIG_INPUT_MOUSEDEV_PSAUX=y > -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 > -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -# CONFIG_KEYBOARD_ADP5589 is not set > -# CONFIG_KEYBOARD_ATKBD is not set > -CONFIG_KEYBOARD_QT1070=m > -CONFIG_KEYBOARD_QT2160=m > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_TCA6416 is not set > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_LM8323 is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -CONFIG_KEYBOARD_MCS=m > -# CONFIG_KEYBOARD_MPR121 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -# CONFIG_KEYBOARD_TWL4030 is not set > -# CONFIG_KEYBOARD_XTKBD is not set > -CONFIG_INPUT_MOUSE=y > -CONFIG_MOUSE_PS2=y > -CONFIG_MOUSE_PS2_ALPS=y > -CONFIG_MOUSE_PS2_LOGIPS2PP=y > -CONFIG_MOUSE_PS2_SYNAPTICS=y > -CONFIG_MOUSE_PS2_TRACKPOINT=y > -# CONFIG_MOUSE_PS2_ELANTECH is not set > -# CONFIG_MOUSE_PS2_SENTELIC is not set > -# CONFIG_MOUSE_PS2_TOUCHKIT is not set > -# CONFIG_MOUSE_SERIAL is not set > -# CONFIG_MOUSE_APPLETOUCH is not set > -# CONFIG_MOUSE_BCM5974 is not set > -# CONFIG_MOUSE_VSXXXAA is not set > -# CONFIG_MOUSE_GPIO is not set > -# CONFIG_MOUSE_SYNAPTICS_I2C is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set > -# CONFIG_TOUCHSCREEN_BU21013 is not set > -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MAX11801 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2005 is not set > -CONFIG_TOUCHSCREEN_TSC2007=y > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -# CONFIG_TOUCHSCREEN_ST1232 is not set > -# CONFIG_TOUCHSCREEN_TPS6507X is not set > -CONFIG_INPUT_MISC=y > -CONFIG_INPUT_AD714X=m > -CONFIG_INPUT_AD714X_I2C=m > -CONFIG_INPUT_AD714X_SPI=m > -# CONFIG_INPUT_ATI_REMOTE is not set > -# CONFIG_INPUT_ATI_REMOTE2 is not set > -# CONFIG_INPUT_KEYSPAN_REMOTE is not set > -# CONFIG_INPUT_POWERMATE is not set > -# CONFIG_INPUT_YEALINK is not set > -# CONFIG_INPUT_CM109 is not set > -CONFIG_INPUT_TWL4030_PWRBUTTON=y > -CONFIG_INPUT_TWL4030_VIBRA=m > -CONFIG_INPUT_UINPUT=y > -CONFIG_INPUT_PCF8574=m > -CONFIG_INPUT_PWM_BEEPER=m > -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set > -CONFIG_INPUT_ADXL34X=m > -CONFIG_INPUT_ADXL34X_I2C=m > -CONFIG_INPUT_ADXL34X_SPI=m > -CONFIG_INPUT_CMA3000=m > -CONFIG_INPUT_CMA3000_I2C=m > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_SERIO_PS2MULT is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -CONFIG_VT_CONSOLE=y > -CONFIG_HW_CONSOLE=y > -CONFIG_VT_HW_CONSOLE_BINDING=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -# CONFIG_LEGACY_PTYS is not set > -# CONFIG_SERIAL_NONSTANDARD is not set > -CONFIG_N_GSM=m > -# CONFIG_TRACE_SINK is not set > -CONFIG_DEVKMEM=y > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=32 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 > -CONFIG_SERIAL_8250_EXTENDED=y > -CONFIG_SERIAL_8250_MANY_PORTS=y > -CONFIG_SERIAL_8250_SHARE_IRQ=y > -CONFIG_SERIAL_8250_DETECT_IRQ=y > -CONFIG_SERIAL_8250_RSA=y > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -# CONFIG_SERIAL_MAX3107 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_SERIAL_OMAP=y > -CONFIG_SERIAL_OMAP_CONSOLE=y > -# CONFIG_SERIAL_TIMBERDALE is not set > -# CONFIG_SERIAL_ALTERA_JTAGUART is not set > -# CONFIG_SERIAL_ALTERA_UART is not set > -CONFIG_SERIAL_IFX6X60=m > -# CONFIG_SERIAL_XILINX_PS_UART is not set > -CONFIG_TTY_PRINTK=y > -# CONFIG_HVC_DCC is not set > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=y > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -# CONFIG_RAMOOPS is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_MUX=m > - > -# > -# Multiplexer I2C Chip support > -# > -CONFIG_I2C_MUX_GPIO=m > -# CONFIG_I2C_MUX_PCA9541 is not set > -# CONFIG_I2C_MUX_PCA954x is not set > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=m > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -# CONFIG_I2C_DESIGNWARE is not set > -# CONFIG_I2C_GPIO is not set > -# CONFIG_I2C_OCORES is not set > -CONFIG_I2C_OMAP=y > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_PXA_PCI is not set > -# CONFIG_I2C_SIMTEC is not set > -# CONFIG_I2C_XILINX is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -CONFIG_I2C_DIOLAN_U2C=m > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_STUB is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -CONFIG_SPI=y > -# CONFIG_SPI_DEBUG is not set > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -# CONFIG_SPI_ALTERA is not set > -# CONFIG_SPI_BITBANG is not set > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_OC_TINY is not set > -CONFIG_SPI_OMAP24XX=y > -# CONFIG_SPI_PXA2XX_PCI is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -CONFIG_SPI_SPIDEV=y > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > - > -# > -# PPS generators support > -# > - > -# > -# PTP clock support > -# > - > -# > -# Enable Device Drivers -> PPS to see the PTP clock options. > -# > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_DEBUG_GPIO is not set > -CONFIG_GPIO_SYSFS=y > -CONFIG_GPIO_MAX730X=m > - > -# > -# Memory mapped GPIO drivers: > -# > -# CONFIG_GPIO_BASIC_MMIO is not set > -# CONFIG_GPIO_IT8761E is not set > - > -# > -# I2C GPIO expanders: > -# > -CONFIG_GPIO_MAX7300=m > -# CONFIG_GPIO_MAX732X is not set > -# CONFIG_GPIO_PCF857X is not set > -# CONFIG_GPIO_SX150X is not set > -CONFIG_GPIO_TWL4030=y > -CONFIG_GPIO_ADP5588=m > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > -# CONFIG_GPIO_74X164 is not set > - > -# > -# AC97 GPIO expanders: > -# > - > -# > -# MODULbus GPIO expanders: > -# > -# CONFIG_W1 is not set > -CONFIG_POWER_SUPPLY=m > -# CONFIG_POWER_SUPPLY_DEBUG is not set > -# CONFIG_PDA_POWER is not set > -CONFIG_TEST_POWER=m > -# CONFIG_BATTERY_DS2780 is not set > -# CONFIG_BATTERY_DS2782 is not set > -# CONFIG_BATTERY_BQ20Z75 is not set > -# CONFIG_BATTERY_BQ27x00 is not set > -# CONFIG_BATTERY_MAX17040 is not set > -CONFIG_BATTERY_MAX17042=m > -CONFIG_CHARGER_ISP1704=m > -# CONFIG_CHARGER_MAX8903 is not set > -CONFIG_CHARGER_TWL4030=m > -CONFIG_CHARGER_GPIO=m > -CONFIG_HWMON=y > -# CONFIG_HWMON_VID is not set > -# CONFIG_HWMON_DEBUG_CHIP is not set > - > -# > -# Native drivers > -# > -# CONFIG_SENSORS_AD7414 is not set > -# CONFIG_SENSORS_AD7418 is not set > -# CONFIG_SENSORS_ADCXX is not set > -# CONFIG_SENSORS_ADM1021 is not set > -# CONFIG_SENSORS_ADM1025 is not set > -# CONFIG_SENSORS_ADM1026 is not set > -# CONFIG_SENSORS_ADM1029 is not set > -# CONFIG_SENSORS_ADM1031 is not set > -# CONFIG_SENSORS_ADM9240 is not set > -CONFIG_SENSORS_ADT7411=m > -# CONFIG_SENSORS_ADT7462 is not set > -# CONFIG_SENSORS_ADT7470 is not set > -# CONFIG_SENSORS_ADT7475 is not set > -CONFIG_SENSORS_ASC7621=m > -# CONFIG_SENSORS_ATXP1 is not set > -CONFIG_SENSORS_DS620=m > -# CONFIG_SENSORS_DS1621 is not set > -# CONFIG_SENSORS_F71805F is not set > -# CONFIG_SENSORS_F71882FG is not set > -# CONFIG_SENSORS_F75375S is not set > -# CONFIG_SENSORS_G760A is not set > -# CONFIG_SENSORS_GL518SM is not set > -# CONFIG_SENSORS_GL520SM is not set > -CONFIG_SENSORS_GPIO_FAN=m > -# CONFIG_SENSORS_IT87 is not set > -CONFIG_SENSORS_JC42=m > -# CONFIG_SENSORS_LINEAGE is not set > -# CONFIG_SENSORS_LM63 is not set > -# CONFIG_SENSORS_LM70 is not set > -# CONFIG_SENSORS_LM73 is not set > -# CONFIG_SENSORS_LM75 is not set > -# CONFIG_SENSORS_LM77 is not set > -# CONFIG_SENSORS_LM78 is not set > -# CONFIG_SENSORS_LM80 is not set > -# CONFIG_SENSORS_LM83 is not set > -# CONFIG_SENSORS_LM85 is not set > -# CONFIG_SENSORS_LM87 is not set > -# CONFIG_SENSORS_LM90 is not set > -# CONFIG_SENSORS_LM92 is not set > -# CONFIG_SENSORS_LM93 is not set > -# CONFIG_SENSORS_LTC4151 is not set > -# CONFIG_SENSORS_LTC4215 is not set > -# CONFIG_SENSORS_LTC4245 is not set > -# CONFIG_SENSORS_LTC4261 is not set > -# CONFIG_SENSORS_LM95241 is not set > -# CONFIG_SENSORS_MAX1111 is not set > -# CONFIG_SENSORS_MAX16065 is not set > -# CONFIG_SENSORS_MAX1619 is not set > -# CONFIG_SENSORS_MAX6639 is not set > -# CONFIG_SENSORS_MAX6642 is not set > -# CONFIG_SENSORS_MAX6650 is not set > -# CONFIG_SENSORS_PC87360 is not set > -# CONFIG_SENSORS_PC87427 is not set > -# CONFIG_SENSORS_PCF8591 is not set > -# CONFIG_PMBUS is not set > -# CONFIG_SENSORS_SHT15 is not set > -# CONFIG_SENSORS_SHT21 is not set > -CONFIG_SENSORS_SMM665=m > -# CONFIG_SENSORS_DME1737 is not set > -CONFIG_SENSORS_EMC1403=m > -CONFIG_SENSORS_EMC2103=m > -# CONFIG_SENSORS_EMC6W201 is not set > -# CONFIG_SENSORS_SMSC47M1 is not set > -# CONFIG_SENSORS_SMSC47M192 is not set > -# CONFIG_SENSORS_SMSC47B397 is not set > -# CONFIG_SENSORS_SCH5627 is not set > -# CONFIG_SENSORS_ADS1015 is not set > -# CONFIG_SENSORS_ADS7828 is not set > -CONFIG_SENSORS_ADS7871=m > -CONFIG_SENSORS_AMC6821=m > -# CONFIG_SENSORS_THMC50 is not set > -CONFIG_SENSORS_TMP102=m > -# CONFIG_SENSORS_TMP401 is not set > -# CONFIG_SENSORS_TMP421 is not set > -CONFIG_SENSORS_TWL4030_MADC=m > -# CONFIG_SENSORS_VT1211 is not set > -# CONFIG_SENSORS_W83781D is not set > -# CONFIG_SENSORS_W83791D is not set > -# CONFIG_SENSORS_W83792D is not set > -# CONFIG_SENSORS_W83793 is not set > -# CONFIG_SENSORS_W83795 is not set > -# CONFIG_SENSORS_W83L785TS is not set > -# CONFIG_SENSORS_W83L786NG is not set > -# CONFIG_SENSORS_W83627HF is not set > -# CONFIG_SENSORS_W83627EHF is not set > -CONFIG_THERMAL=y > -CONFIG_THERMAL_HWMON=y > -CONFIG_WATCHDOG=y > -CONFIG_WATCHDOG_NOWAYOUT=y > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_OMAP_WATCHDOG=y > -# CONFIG_TWL4030_WATCHDOG is not set > -# CONFIG_MAX63XX_WATCHDOG is not set > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -CONFIG_SSB=y > -CONFIG_SSB_BLOCKIO=y > -CONFIG_SSB_SDIOHOST_POSSIBLE=y > -CONFIG_SSB_SDIOHOST=y > -# CONFIG_SSB_SILENT is not set > -# CONFIG_SSB_DEBUG is not set > -CONFIG_BCMA_POSSIBLE=y > - > -# > -# Broadcom specific AMBA > -# > -# CONFIG_BCMA is not set > -CONFIG_MFD_SUPPORT=y > -CONFIG_MFD_CORE=y > -# CONFIG_MFD_88PM860X is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_HTC_I2CPLD is not set > -CONFIG_TPS6105X=m > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507X=m > -CONFIG_MFD_TPS6586X=y > -CONFIG_TWL4030_CORE=y > -CONFIG_TWL4030_MADC=m > -CONFIG_TWL4030_POWER=y > -CONFIG_TWL4030_CODEC=y > -CONFIG_TWL6030_PWM=m > -# CONFIG_MFD_STMPE is not set > -# CONFIG_MFD_TC3589X is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_MAX8925 is not set > -# CONFIG_MFD_MAX8997 is not set > -# CONFIG_MFD_MAX8998 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X_I2C is not set > -# CONFIG_MFD_WM831X_SPI is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_WM8994 is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13XXX is not set > -# CONFIG_ABX500_CORE is not set > -# CONFIG_EZX_PCAP is not set > -CONFIG_MFD_WL1273_CORE=m > -CONFIG_MFD_OMAP_USB_HOST=y > -# CONFIG_MFD_TPS65910 is not set > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -CONFIG_REGULATOR_DUMMY=y > -CONFIG_REGULATOR_FIXED_VOLTAGE=y > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8649 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_MAX8952 is not set > -CONFIG_REGULATOR_TWL4030=y > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_LP3972 is not set > -CONFIG_REGULATOR_TPS6105X=m > -# CONFIG_REGULATOR_TPS65023 is not set > -# CONFIG_REGULATOR_TPS6507X is not set > -# CONFIG_REGULATOR_ISL6271A is not set > -# CONFIG_REGULATOR_AD5398 is not set > -CONFIG_REGULATOR_TPS6586X=m > -CONFIG_REGULATOR_TPS6524X=m > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_MEDIA_CONTROLLER=y > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_V4L2_SUBDEV_API=y > -CONFIG_DVB_CORE=m > -CONFIG_VIDEO_MEDIA=m > - > -# > -# Multimedia drivers > -# > -CONFIG_RC_CORE=m > -CONFIG_LIRC=m > -CONFIG_RC_MAP=m > -CONFIG_IR_NEC_DECODER=m > -CONFIG_IR_RC5_DECODER=m > -CONFIG_IR_RC6_DECODER=m > -CONFIG_IR_JVC_DECODER=m > -CONFIG_IR_SONY_DECODER=m > -CONFIG_IR_RC5_SZ_DECODER=m > -CONFIG_IR_LIRC_CODEC=m > -# CONFIG_IR_IMON is not set > -# CONFIG_IR_MCEUSB is not set > -# CONFIG_IR_REDRAT3 is not set > -# CONFIG_IR_STREAMZAP is not set > -CONFIG_RC_LOOPBACK=m > -CONFIG_MEDIA_ATTACH=y > -CONFIG_MEDIA_TUNER=m > -CONFIG_MEDIA_TUNER_CUSTOMISE=y > - > -# > -# Customize TV tuners > -# > -CONFIG_MEDIA_TUNER_SIMPLE=m > -CONFIG_MEDIA_TUNER_TDA8290=m > -CONFIG_MEDIA_TUNER_TDA827X=m > -CONFIG_MEDIA_TUNER_TDA18271=m > -CONFIG_MEDIA_TUNER_TDA9887=m > -CONFIG_MEDIA_TUNER_TEA5761=m > -CONFIG_MEDIA_TUNER_TEA5767=m > -CONFIG_MEDIA_TUNER_MT20XX=m > -CONFIG_MEDIA_TUNER_MT2060=m > -CONFIG_MEDIA_TUNER_MT2266=m > -CONFIG_MEDIA_TUNER_MT2131=m > -CONFIG_MEDIA_TUNER_QT1010=m > -CONFIG_MEDIA_TUNER_XC2028=m > -CONFIG_MEDIA_TUNER_XC5000=m > -CONFIG_MEDIA_TUNER_MXL5005S=m > -CONFIG_MEDIA_TUNER_MXL5007T=m > -CONFIG_MEDIA_TUNER_MC44S803=m > -CONFIG_MEDIA_TUNER_MAX2165=m > -CONFIG_MEDIA_TUNER_TDA18218=m > -CONFIG_MEDIA_TUNER_TDA18212=m > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_VMALLOC=m > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEOBUF_DVB=m > -CONFIG_VIDEO_TVEEPROM=m > -CONFIG_VIDEO_TUNER=m > -CONFIG_V4L2_MEM2MEM_DEV=m > -CONFIG_VIDEOBUF2_CORE=m > -CONFIG_VIDEOBUF2_MEMOPS=m > -CONFIG_VIDEOBUF2_VMALLOC=m > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -CONFIG_VIDEO_IR_I2C=m > - > -# > -# Encoders, decoders, sensors and other helper chips > -# > - > -# > -# Audio decoders, processors and mixers > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -CONFIG_VIDEO_MSP3400=m > -# CONFIG_VIDEO_CS5345 is not set > -CONFIG_VIDEO_CS53L32A=m > -# CONFIG_VIDEO_TLV320AIC23B is not set > -CONFIG_VIDEO_WM8775=m > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -CONFIG_VIDEO_ADV7180=m > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_SAA7110 is not set > -CONFIG_VIDEO_SAA711X=m > -# CONFIG_VIDEO_SAA7191 is not set > -CONFIG_VIDEO_TVP514X=m > -CONFIG_VIDEO_TVP5150=m > -CONFIG_VIDEO_TVP7002=m > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -# CONFIG_VIDEO_SAA717X is not set > -CONFIG_VIDEO_CX25840=m > - > -# > -# MPEG video encoders > -# > -CONFIG_VIDEO_CX2341X=m > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_ADV7343 is not set > -# CONFIG_VIDEO_AK881X is not set > - > -# > -# Camera sensor devices > -# > -CONFIG_VIDEO_OV7670=m > -CONFIG_VIDEO_MT9V011=m > -CONFIG_VIDEO_MT9V032=y > -# CONFIG_VIDEO_TCM825X is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > - > -# > -# Miscelaneous helper chips > -# > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_M52790 is not set > -CONFIG_VIDEO_VIVI=m > -CONFIG_VIDEO_VPSS_SYSTEM=m > -CONFIG_VIDEO_VPFE_CAPTURE=y > -CONFIG_VIDEO_DM6446_CCDC=m > -CONFIG_VIDEO_OMAP2_VOUT=y > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_AU0828 is not set > -CONFIG_VIDEO_SR030PC30=m > -CONFIG_VIDEO_NOON010PC30=m > -# CONFIG_VIDEO_M5MOLS is not set > -CONFIG_VIDEO_OMAP3=y > -CONFIG_VIDEO_OMAP3_DEBUG=y > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=m > -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y > -CONFIG_USB_GSPCA=m > -CONFIG_USB_M5602=m > -CONFIG_USB_STV06XX=m > -# CONFIG_USB_GL860 is not set > -CONFIG_USB_GSPCA_BENQ=m > -CONFIG_USB_GSPCA_CONEX=m > -CONFIG_USB_GSPCA_CPIA1=m > -CONFIG_USB_GSPCA_ETOMS=m > -CONFIG_USB_GSPCA_FINEPIX=m > -# CONFIG_USB_GSPCA_JEILINJ is not set > -# CONFIG_USB_GSPCA_KINECT is not set > -CONFIG_USB_GSPCA_KONICA=m > -CONFIG_USB_GSPCA_MARS=m > -# CONFIG_USB_GSPCA_MR97310A is not set > -CONFIG_USB_GSPCA_NW80X=m > -CONFIG_USB_GSPCA_OV519=m > -CONFIG_USB_GSPCA_OV534=m > -CONFIG_USB_GSPCA_OV534_9=m > -CONFIG_USB_GSPCA_PAC207=m > -# CONFIG_USB_GSPCA_PAC7302 is not set > -CONFIG_USB_GSPCA_PAC7311=m > -CONFIG_USB_GSPCA_SN9C2028=m > -# CONFIG_USB_GSPCA_SN9C20X is not set > -CONFIG_USB_GSPCA_SONIXB=m > -CONFIG_USB_GSPCA_SONIXJ=m > -CONFIG_USB_GSPCA_SPCA500=m > -CONFIG_USB_GSPCA_SPCA501=m > -CONFIG_USB_GSPCA_SPCA505=m > -CONFIG_USB_GSPCA_SPCA506=m > -CONFIG_USB_GSPCA_SPCA508=m > -CONFIG_USB_GSPCA_SPCA561=m > -CONFIG_USB_GSPCA_SPCA1528=m > -# CONFIG_USB_GSPCA_SQ905 is not set > -# CONFIG_USB_GSPCA_SQ905C is not set > -CONFIG_USB_GSPCA_SQ930X=m > -CONFIG_USB_GSPCA_STK014=m > -# CONFIG_USB_GSPCA_STV0680 is not set > -CONFIG_USB_GSPCA_SUNPLUS=m > -CONFIG_USB_GSPCA_T613=m > -CONFIG_USB_GSPCA_TV8532=m > -CONFIG_USB_GSPCA_VC032X=m > -CONFIG_USB_GSPCA_VICAM=m > -CONFIG_USB_GSPCA_XIRLINK_CIT=m > -CONFIG_USB_GSPCA_ZC3XX=m > -CONFIG_VIDEO_PVRUSB2=m > -CONFIG_VIDEO_PVRUSB2_SYSFS=y > -CONFIG_VIDEO_PVRUSB2_DVB=y > -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set > -CONFIG_VIDEO_HDPVR=m > -CONFIG_VIDEO_EM28XX=m > -CONFIG_VIDEO_EM28XX_ALSA=m > -CONFIG_VIDEO_EM28XX_DVB=m > -CONFIG_VIDEO_TLG2300=m > -CONFIG_VIDEO_CX231XX=m > -CONFIG_VIDEO_CX231XX_RC=y > -# CONFIG_VIDEO_CX231XX_ALSA is not set > -CONFIG_VIDEO_CX231XX_DVB=m > -CONFIG_VIDEO_USBVISION=m > -CONFIG_USB_ET61X251=m > -CONFIG_USB_SN9C102=m > -CONFIG_USB_PWC=m > -# CONFIG_USB_PWC_DEBUG is not set > -CONFIG_USB_PWC_INPUT_EVDEV=y > -CONFIG_USB_ZR364XX=m > -CONFIG_USB_STKWEBCAM=m > -CONFIG_USB_S2255=m > -CONFIG_V4L_MEM2MEM_DRIVERS=y > -CONFIG_VIDEO_MEM2MEM_TESTDEV=m > -CONFIG_RADIO_ADAPTERS=y > -# CONFIG_I2C_SI4713 is not set > -# CONFIG_RADIO_SI4713 is not set > -# CONFIG_USB_DSBR is not set > -# CONFIG_RADIO_SI470X is not set > -# CONFIG_USB_MR800 is not set > -# CONFIG_RADIO_TEA5764 is not set > -CONFIG_RADIO_SAA7706H=m > -# CONFIG_RADIO_TEF6862 is not set > -CONFIG_RADIO_WL1273=m > - > -# > -# Texas Instruments WL128x FM driver (ST based) > -# > -CONFIG_RADIO_WL128X=m > -CONFIG_DVB_MAX_ADAPTERS=8 > -CONFIG_DVB_DYNAMIC_MINORS=y > -CONFIG_DVB_CAPTURE_DRIVERS=y > -# CONFIG_TTPCI_EEPROM is not set > - > -# > -# Supported USB Adapters > -# > -CONFIG_DVB_USB=m > -# CONFIG_DVB_USB_DEBUG is not set > -CONFIG_DVB_USB_A800=m > -CONFIG_DVB_USB_DIBUSB_MB=m > -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set > -CONFIG_DVB_USB_DIBUSB_MC=m > -CONFIG_DVB_USB_DIB0700=m > -CONFIG_DVB_USB_UMT_010=m > -CONFIG_DVB_USB_CXUSB=m > -CONFIG_DVB_USB_M920X=m > -CONFIG_DVB_USB_GL861=m > -CONFIG_DVB_USB_AU6610=m > -CONFIG_DVB_USB_DIGITV=m > -CONFIG_DVB_USB_VP7045=m > -CONFIG_DVB_USB_VP702X=m > -CONFIG_DVB_USB_GP8PSK=m > -CONFIG_DVB_USB_NOVA_T_USB2=m > -CONFIG_DVB_USB_TTUSB2=m > -CONFIG_DVB_USB_DTT200U=m > -CONFIG_DVB_USB_OPERA1=m > -CONFIG_DVB_USB_AF9005=m > -CONFIG_DVB_USB_AF9005_REMOTE=m > -CONFIG_DVB_USB_DW2102=m > -CONFIG_DVB_USB_CINERGY_T2=m > -CONFIG_DVB_USB_ANYSEE=m > -CONFIG_DVB_USB_DTV5100=m > -CONFIG_DVB_USB_AF9015=m > -# CONFIG_DVB_USB_CE6230 is not set > -# CONFIG_DVB_USB_FRIIO is not set > -# CONFIG_DVB_USB_EC168 is not set > -CONFIG_DVB_USB_AZ6027=m > -CONFIG_DVB_USB_LME2510=m > -CONFIG_DVB_USB_TECHNISAT_USB2=m > -# CONFIG_SMS_SIANO_MDTV is not set > - > -# > -# Supported FlexCopII (B2C2) Adapters > -# > -CONFIG_DVB_B2C2_FLEXCOP=m > -CONFIG_DVB_B2C2_FLEXCOP_USB=m > -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set > - > -# > -# Supported DVB Frontends > -# > -# CONFIG_DVB_FE_CUSTOMISE is not set > - > -# > -# Multistandard (satellite) frontends > -# > -CONFIG_DVB_STB0899=m > -CONFIG_DVB_STB6100=m > -CONFIG_DVB_STV090x=m > -CONFIG_DVB_STV6110x=m > - > -# > -# DVB-S (satellite) frontends > -# > -CONFIG_DVB_CX24123=m > -CONFIG_DVB_MT312=m > -CONFIG_DVB_ZL10039=m > -CONFIG_DVB_S5H1420=m > -CONFIG_DVB_STV0288=m > -CONFIG_DVB_STB6000=m > -CONFIG_DVB_STV0299=m > -CONFIG_DVB_STV6110=m > -CONFIG_DVB_STV0900=m > -CONFIG_DVB_TDA10086=m > -CONFIG_DVB_TUNER_ITD1000=m > -CONFIG_DVB_TUNER_CX24113=m > -CONFIG_DVB_TDA826X=m > -CONFIG_DVB_CX24116=m > -CONFIG_DVB_SI21XX=m > -CONFIG_DVB_DS3000=m > - > -# > -# DVB-T (terrestrial) frontends > -# > -CONFIG_DVB_CX22702=m > -CONFIG_DVB_DRXD=m > -CONFIG_DVB_TDA1004X=m > -CONFIG_DVB_NXT6000=m > -CONFIG_DVB_MT352=m > -CONFIG_DVB_ZL10353=m > -CONFIG_DVB_DIB3000MB=m > -CONFIG_DVB_DIB3000MC=m > -CONFIG_DVB_DIB7000M=m > -CONFIG_DVB_DIB7000P=m > -CONFIG_DVB_TDA10048=m > -CONFIG_DVB_AF9013=m > -CONFIG_DVB_CXD2820R=m > - > -# > -# DVB-C (cable) frontends > -# > -CONFIG_DVB_TDA10023=m > -CONFIG_DVB_STV0297=m > - > -# > -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends > -# > -CONFIG_DVB_NXT200X=m > -CONFIG_DVB_BCM3510=m > -CONFIG_DVB_LGDT330X=m > -CONFIG_DVB_LGDT3305=m > -CONFIG_DVB_S5H1409=m > -CONFIG_DVB_S5H1411=m > - > -# > -# ISDB-T (terrestrial) frontends > -# > -CONFIG_DVB_S921=m > -CONFIG_DVB_DIB8000=m > -CONFIG_DVB_MB86A20S=m > - > -# > -# Digital terrestrial only tuners/PLL > -# > -CONFIG_DVB_PLL=m > -CONFIG_DVB_TUNER_DIB0070=m > -CONFIG_DVB_TUNER_DIB0090=m > - > -# > -# SEC control devices for DVB-S > -# > -CONFIG_DVB_LNBP21=m > -CONFIG_DVB_ISL6421=m > -CONFIG_DVB_ISL6423=m > -CONFIG_DVB_LGS8GXX=m > -CONFIG_DVB_ATBM8830=m > -CONFIG_DVB_IX2505V=m > - > -# > -# Tools to develop new frontends > -# > -# CONFIG_DVB_DUMMY_FE is not set > - > -# > -# Graphics support > -# > -CONFIG_DRM=m > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -CONFIG_FB_SYS_FILLRECT=m > -CONFIG_FB_SYS_COPYAREA=m > -CONFIG_FB_SYS_IMAGEBLIT=m > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -CONFIG_FB_SYS_FOPS=m > -# CONFIG_FB_WMT_GE_ROPS is not set > -CONFIG_FB_DEFERRED_IO=y > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -CONFIG_FB_MODE_HELPERS=y > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_TMIO is not set > -CONFIG_FB_UDL=m > -# CONFIG_FB_VIRTUAL is not set > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set > -CONFIG_OMAP2_VRAM=y > -CONFIG_OMAP2_VRFB=y > -CONFIG_OMAP2_DSS=y > -CONFIG_OMAP2_VRAM_SIZE=14 > -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y > -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set > -CONFIG_OMAP2_DSS_DPI=y > -# CONFIG_OMAP2_DSS_RFBI is not set > -CONFIG_OMAP2_DSS_VENC=y > -# CONFIG_OMAP2_DSS_SDI is not set > -CONFIG_OMAP2_DSS_DSI=y > -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set > -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 > -CONFIG_OMAP2_DSS_SLEEP_BEFORE_RESET=y > -CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y > -CONFIG_FB_OMAP2=y > -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y > -CONFIG_FB_OMAP2_NUM_FBS=2 > - > -# > -# OMAP2/3 Display Device Drivers > -# > -CONFIG_PANEL_GENERIC_DPI=y > -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set > -CONFIG_PANEL_SHARP_LS037V7DW01=y > -CONFIG_PANEL_NEC_NL8048HL11_01B=y > -# CONFIG_PANEL_TAAL is not set > -CONFIG_PANEL_TPO_TD043MTEA1=m > -CONFIG_BACKLIGHT_LCD_SUPPORT=y > -CONFIG_LCD_CLASS_DEVICE=y > -# CONFIG_LCD_L4F00242T03 is not set > -# CONFIG_LCD_LMS283GF05 is not set > -# CONFIG_LCD_LTV350QV is not set > -# CONFIG_LCD_TDO24M is not set > -# CONFIG_LCD_VGG2432A4 is not set > -# CONFIG_LCD_PLATFORM is not set > -# CONFIG_LCD_S6E63M0 is not set > -# CONFIG_LCD_LD9040 is not set > -CONFIG_BACKLIGHT_CLASS_DEVICE=y > -CONFIG_BACKLIGHT_GENERIC=y > -# CONFIG_BACKLIGHT_PWM is not set > -# CONFIG_BACKLIGHT_ADP8860 is not set > -# CONFIG_BACKLIGHT_ADP8870 is not set > - > -# > -# Display device support > -# > -CONFIG_DISPLAY_SUPPORT=y > - > -# > -# Display hardware drivers > -# > - > -# > -# Console display driver support > -# > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -# CONFIG_LOGO_LINUX_MONO is not set > -# CONFIG_LOGO_LINUX_VGA16 is not set > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -CONFIG_SOUND_OSS_CORE=y > -CONFIG_SOUND_OSS_CORE_PRECLAIM=y > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -CONFIG_SND_SEQUENCER=m > -# CONFIG_SND_SEQ_DUMMY is not set > -CONFIG_SND_OSSEMUL=y > -CONFIG_SND_MIXER_OSS=y > -CONFIG_SND_PCM_OSS=y > -CONFIG_SND_PCM_OSS_PLUGINS=y > -CONFIG_SND_SEQUENCER_OSS=y > -CONFIG_SND_HRTIMER=m > -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y > -CONFIG_SND_DYNAMIC_MINORS=y > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -CONFIG_SND_RAWMIDI_SEQ=m > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -CONFIG_SND_ALOOP=m > -# CONFIG_SND_VIRMIDI is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -# CONFIG_SND_ARM is not set > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -CONFIG_SND_USB_UA101=m > -CONFIG_SND_USB_CAIAQ=m > -CONFIG_SND_USB_CAIAQ_INPUT=y > -CONFIG_SND_USB_6FIRE=m > -CONFIG_SND_SOC=y > -CONFIG_SND_SOC_CACHE_LZO=y > -CONFIG_SND_OMAP_SOC=y > -CONFIG_SND_OMAP_SOC_MCBSP=y > -CONFIG_SND_OMAP_SOC_OVERO=y > -CONFIG_SND_OMAP_SOC_OMAP3EVM=y > -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y > -CONFIG_SND_OMAP_SOC_ZOOM2=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TWL4030=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -CONFIG_HID_A4TECH=y > -CONFIG_HID_ACRUX=m > -# CONFIG_HID_ACRUX_FF is not set > -CONFIG_HID_APPLE=y > -CONFIG_HID_BELKIN=y > -CONFIG_HID_CHERRY=y > -CONFIG_HID_CHICONY=y > -# CONFIG_HID_PRODIKEYS is not set > -CONFIG_HID_CYPRESS=y > -# CONFIG_HID_DRAGONRISE is not set > -CONFIG_HID_EMS_FF=m > -# CONFIG_HID_ELECOM is not set > -CONFIG_HID_EZKEY=y > -CONFIG_HID_KEYTOUCH=m > -# CONFIG_HID_KYE is not set > -CONFIG_HID_UCLOGIC=m > -CONFIG_HID_WALTOP=m > -CONFIG_HID_GYRATION=y > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -CONFIG_HID_LCPOWER=m > -CONFIG_HID_LOGITECH=y > -# CONFIG_LOGITECH_FF is not set > -# CONFIG_LOGIRUMBLEPAD2_FF is not set > -# CONFIG_LOGIG940_FF is not set > -# CONFIG_LOGIWII_FF is not set > -CONFIG_HID_MAGICMOUSE=m > -CONFIG_HID_MICROSOFT=y > -CONFIG_HID_MONTEREY=y > -CONFIG_HID_MULTITOUCH=m > -CONFIG_HID_NTRIG=y > -# CONFIG_HID_ORTEK is not set > -CONFIG_HID_PANTHERLORD=y > -# CONFIG_PANTHERLORD_FF is not set > -CONFIG_HID_PETALYNX=y > -CONFIG_HID_PICOLCD=m > -CONFIG_HID_PICOLCD_FB=y > -CONFIG_HID_PICOLCD_BACKLIGHT=y > -# CONFIG_HID_PICOLCD_LCD is not set > -CONFIG_HID_PICOLCD_LEDS=y > -CONFIG_HID_QUANTA=m > -CONFIG_HID_ROCCAT=m > -CONFIG_HID_ROCCAT_COMMON=m > -CONFIG_HID_ROCCAT_ARVO=m > -CONFIG_HID_ROCCAT_KONE=m > -CONFIG_HID_ROCCAT_KONEPLUS=m > -CONFIG_HID_ROCCAT_KOVAPLUS=m > -# CONFIG_HID_ROCCAT_PYRA is not set > -CONFIG_HID_SAMSUNG=y > -CONFIG_HID_SONY=y > -CONFIG_HID_SUNPLUS=y > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -CONFIG_HID_TOPSEED=y > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_WACOM is not set > -# CONFIG_HID_ZEROPLUS is not set > -# CONFIG_HID_ZYDACRON is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -CONFIG_USB_ARCH_HAS_EHCI=y > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y > - > -# > -# Miscellaneous USB options > -# > -CONFIG_USB_DEVICEFS=y > -CONFIG_USB_DEVICE_CLASS=y > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -CONFIG_USB_OTG=y > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -CONFIG_USB_MON=y > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -CONFIG_USB_EHCI_HCD=y > -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set > -CONFIG_USB_EHCI_TT_NEWSCHED=y > -CONFIG_USB_EHCI_HCD_OMAP=y > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -# CONFIG_USB_OHCI_HCD is not set > -# CONFIG_USB_U132_HCD is not set > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -# CONFIG_USB_MUSB_TUSB6010 is not set > -CONFIG_USB_MUSB_OMAP2PLUS=y > -# CONFIG_USB_MUSB_AM35X is not set > -# CONFIG_USB_MUSB_HOST is not set > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -CONFIG_USB_MUSB_OTG=y > -CONFIG_USB_GADGET_MUSB_HDRC=y > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_UX500_DMA is not set > -CONFIG_USB_INVENTRA_DMA=y > -# CONFIG_USB_TI_CPPI_DMA is not set > - > -# > -# USB Device Class drivers > -# > -CONFIG_USB_ACM=m > -CONFIG_USB_PRINTER=m > -CONFIG_USB_WDM=m > -CONFIG_USB_TMC=m > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -CONFIG_USB_STORAGE_REALTEK=m > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -CONFIG_USB_STORAGE_ENE_UB6250=m > -CONFIG_USB_UAS=m > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -CONFIG_USB_SERIAL=m > -CONFIG_USB_EZUSB=y > -CONFIG_USB_SERIAL_GENERIC=y > -CONFIG_USB_SERIAL_AIRCABLE=m > -CONFIG_USB_SERIAL_ARK3116=m > -CONFIG_USB_SERIAL_BELKIN=m > -CONFIG_USB_SERIAL_CH341=m > -# CONFIG_USB_SERIAL_WHITEHEAT is not set > -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m > -# CONFIG_USB_SERIAL_CP210X is not set > -CONFIG_USB_SERIAL_CYPRESS_M8=m > -CONFIG_USB_SERIAL_EMPEG=m > -CONFIG_USB_SERIAL_FTDI_SIO=m > -CONFIG_USB_SERIAL_FUNSOFT=m > -CONFIG_USB_SERIAL_VISOR=m > -CONFIG_USB_SERIAL_IPAQ=m > -CONFIG_USB_SERIAL_IR=m > -CONFIG_USB_SERIAL_EDGEPORT=m > -CONFIG_USB_SERIAL_EDGEPORT_TI=m > -CONFIG_USB_SERIAL_GARMIN=m > -CONFIG_USB_SERIAL_IPW=m > -CONFIG_USB_SERIAL_IUU=m > -CONFIG_USB_SERIAL_KEYSPAN_PDA=m > -CONFIG_USB_SERIAL_KEYSPAN=m > -CONFIG_USB_SERIAL_KEYSPAN_MPR=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y > -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19=y > -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y > -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y > -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y > -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y > -CONFIG_USB_SERIAL_KLSI=m > -CONFIG_USB_SERIAL_KOBIL_SCT=m > -CONFIG_USB_SERIAL_MCT_U232=m > -CONFIG_USB_SERIAL_MOS7720=m > -CONFIG_USB_SERIAL_MOS7840=m > -CONFIG_USB_SERIAL_MOTOROLA=m > -CONFIG_USB_SERIAL_NAVMAN=m > -CONFIG_USB_SERIAL_PL2303=m > -CONFIG_USB_SERIAL_OTI6858=m > -CONFIG_USB_SERIAL_QCAUX=m > -# CONFIG_USB_SERIAL_QUALCOMM is not set > -CONFIG_USB_SERIAL_SPCP8X5=m > -CONFIG_USB_SERIAL_HP4X=m > -CONFIG_USB_SERIAL_SAFE=m > -# CONFIG_USB_SERIAL_SAFE_PADDED is not set > -CONFIG_USB_SERIAL_SIEMENS_MPI=m > -CONFIG_USB_SERIAL_SIERRAWIRELESS=m > -# CONFIG_USB_SERIAL_SYMBOL is not set > -# CONFIG_USB_SERIAL_TI is not set > -CONFIG_USB_SERIAL_CYBERJACK=m > -# CONFIG_USB_SERIAL_XIRCOM is not set > -CONFIG_USB_SERIAL_WWAN=m > -CONFIG_USB_SERIAL_OPTION=m > -CONFIG_USB_SERIAL_OMNINET=m > -CONFIG_USB_SERIAL_OPTICON=m > -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m > -CONFIG_USB_SERIAL_ZIO=m > -CONFIG_USB_SERIAL_SSU100=m > -CONFIG_USB_SERIAL_DEBUG=m > - > -# > -# USB Miscellaneous drivers > -# > -CONFIG_USB_EMI62=m > -CONFIG_USB_EMI26=m > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -CONFIG_USB_LEGOTOWER=m > -CONFIG_USB_LCD=m > -CONFIG_USB_LED=m > -CONFIG_USB_CYPRESS_CY7C63=m > -CONFIG_USB_CYTHERM=m > -CONFIG_USB_IDMOUSE=m > -CONFIG_USB_FTDI_ELAN=m > -# CONFIG_USB_APPLEDISPLAY is not set > -CONFIG_USB_SISUSBVGA=m > -CONFIG_USB_SISUSBVGA_CON=y > -CONFIG_USB_LD=m > -CONFIG_USB_TRANCEVIBRATOR=m > -# CONFIG_USB_IOWARRIOR is not set > -CONFIG_USB_TEST=m > -# CONFIG_USB_ISIGHTFW is not set > -CONFIG_USB_YUREX=m > -CONFIG_USB_ATM=m > -CONFIG_USB_SPEEDTOUCH=m > -CONFIG_USB_CXACRU=m > -CONFIG_USB_UEAGLEATM=m > -CONFIG_USB_XUSBATM=m > -CONFIG_USB_GADGET=y > -# CONFIG_USB_GADGET_DEBUG is not set > -# CONFIG_USB_GADGET_DEBUG_FILES is not set > -CONFIG_USB_GADGET_DEBUG_FS=y > -CONFIG_USB_GADGET_VBUS_DRAW=480 > -CONFIG_USB_GADGET_SELECTED=y > -# CONFIG_USB_GADGET_FUSB300 is not set > -# CONFIG_USB_GADGET_OMAP is not set > -# CONFIG_USB_GADGET_R8A66597 is not set > -# CONFIG_USB_GADGET_PXA_U2O is not set > -# CONFIG_USB_GADGET_M66592 is not set > -# CONFIG_USB_GADGET_DUMMY_HCD is not set > -CONFIG_USB_GADGET_DUALSPEED=y > -# CONFIG_USB_ZERO is not set > -# CONFIG_USB_AUDIO is not set > -CONFIG_USB_ETH=m > -CONFIG_USB_ETH_RNDIS=y > -# CONFIG_USB_ETH_EEM is not set > -CONFIG_USB_G_NCM=m > -# CONFIG_USB_GADGETFS is not set > -CONFIG_USB_FUNCTIONFS=m > -# CONFIG_USB_FUNCTIONFS_ETH is not set > -CONFIG_USB_FUNCTIONFS_RNDIS=y > -# CONFIG_USB_FUNCTIONFS_GENERIC is not set > -CONFIG_USB_FILE_STORAGE=m > -# CONFIG_USB_FILE_STORAGE_TEST is not set > -CONFIG_USB_MASS_STORAGE=m > -# CONFIG_USB_G_SERIAL is not set > -# CONFIG_USB_MIDI_GADGET is not set > -# CONFIG_USB_G_PRINTER is not set > -CONFIG_USB_CDC_COMPOSITE=m > -# CONFIG_USB_G_MULTI is not set > -CONFIG_USB_G_HID=m > -CONFIG_USB_G_DBGP=m > -# CONFIG_USB_G_DBGP_PRINTK is not set > -CONFIG_USB_G_DBGP_SERIAL=y > -CONFIG_USB_G_WEBCAM=m > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -CONFIG_USB_GPIO_VBUS=y > -# CONFIG_ISP1301_OMAP is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_TWL4030_USB=y > -CONFIG_TWL6030_USB=y > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -CONFIG_MMC_UNSAFE_RESUME=y > -# CONFIG_MMC_CLKGATE is not set > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_MINORS=8 > -CONFIG_MMC_BLOCK_BOUNCE=y > -CONFIG_SDIO_UART=y > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_OMAP is not set > -CONFIG_MMC_OMAP_HS=y > -CONFIG_MMC_SPI=m > -# CONFIG_MMC_DW is not set > -# CONFIG_MMC_VUB300 is not set > -CONFIG_MMC_USHC=m > -# CONFIG_MEMSTICK is not set > -CONFIG_NEW_LEDS=y > -CONFIG_LEDS_CLASS=y > - > -# > -# LED drivers > -# > -# CONFIG_LEDS_LM3530 is not set > -# CONFIG_LEDS_PCA9532 is not set > -CONFIG_LEDS_GPIO=y > -CONFIG_LEDS_GPIO_PLATFORM=y > -# CONFIG_LEDS_LP3944 is not set > -CONFIG_LEDS_LP5521=m > -CONFIG_LEDS_LP5523=m > -# CONFIG_LEDS_PCA955X is not set > -# CONFIG_LEDS_DAC124S085 is not set > -CONFIG_LEDS_PWM=m > -CONFIG_LEDS_REGULATOR=m > -# CONFIG_LEDS_BD2802 is not set > -CONFIG_LEDS_WS2801=y > -# CONFIG_LEDS_LT3593 is not set > -CONFIG_LEDS_TRIGGERS=y > - > -# > -# LED Triggers > -# > -CONFIG_LEDS_TRIGGER_TIMER=m > -CONFIG_LEDS_TRIGGER_HEARTBEAT=y > -CONFIG_LEDS_TRIGGER_BACKLIGHT=m > -CONFIG_LEDS_TRIGGER_GPIO=m > -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m > - > -# > -# iptables trigger is under Netfilter config (LED target) > -# > -CONFIG_NFC_DEVICES=y > -CONFIG_PN544_NFC=m > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -CONFIG_RTC_DRV_DS1307=y > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_DS3232 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_ISL12022 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -CONFIG_RTC_DRV_BQ32K=m > -CONFIG_RTC_DRV_TWL4030=m > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > -# CONFIG_RTC_DRV_EM3027 is not set > -# CONFIG_RTC_DRV_RV3029C2 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T93 is not set > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -CONFIG_UIO=m > -CONFIG_UIO_PDRV=m > -CONFIG_UIO_PDRV_GENIRQ=m > -CONFIG_STAGING=y > -# CONFIG_VIDEO_TM6000 is not set > -# CONFIG_USBIP_CORE is not set > -CONFIG_W35UND=m > -CONFIG_PRISM2_USB=m > -CONFIG_ECHO=m > -# CONFIG_BRCMUTIL is not set > -# CONFIG_ASUS_OLED is not set > -CONFIG_R8712U=m > -CONFIG_R8712_AP=y > -# CONFIG_TRANZPORT is not set > -# CONFIG_POHMELFS is not set > -# CONFIG_LINE6_USB is not set > -# CONFIG_USB_SERIAL_QUATECH2 is not set > -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set > -# CONFIG_VT6656 is not set > -# CONFIG_IIO is not set > -CONFIG_XVMALLOC=y > -CONFIG_ZRAM=m > -# CONFIG_ZRAM_DEBUG is not set > -# CONFIG_FB_SM7XX is not set > -# CONFIG_LIRC_STAGING is not set > -# CONFIG_EASYCAP is not set > -# CONFIG_TIDSPBRIDGE is not set > -# CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set > -CONFIG_MACH_NO_WESTBRIDGE=y > -# CONFIG_ATH6K_LEGACY is not set > -CONFIG_USB_ENESTORAGE=m > -CONFIG_BCM_WIMAX=m > -CONFIG_FT1000=m > -CONFIG_FT1000_USB=m > - > -# > -# Speakup console speech > -# > -# CONFIG_SPEAKUP is not set > -CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m > -CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m > - > -# > -# Altera FPGA firmware download module > -# > -# CONFIG_ALTERA_STAPL is not set > -CONFIG_CLKDEV_LOOKUP=y > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -CONFIG_EXT2_FS_XATTR=y > -CONFIG_EXT2_FS_POSIX_ACL=y > -CONFIG_EXT2_FS_SECURITY=y > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -CONFIG_EXT3_FS_POSIX_ACL=y > -# CONFIG_EXT3_FS_SECURITY is not set > -CONFIG_EXT4_FS=y > -CONFIG_EXT4_FS_XATTR=y > -CONFIG_EXT4_FS_POSIX_ACL=y > -CONFIG_EXT4_FS_SECURITY=y > -# CONFIG_EXT4_DEBUG is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_JBD2=y > -# CONFIG_JBD2_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -CONFIG_REISERFS_FS=m > -# CONFIG_REISERFS_CHECK is not set > -CONFIG_REISERFS_PROC_INFO=y > -CONFIG_REISERFS_FS_XATTR=y > -# CONFIG_REISERFS_FS_POSIX_ACL is not set > -# CONFIG_REISERFS_FS_SECURITY is not set > -CONFIG_JFS_FS=m > -CONFIG_JFS_POSIX_ACL=y > -# CONFIG_JFS_SECURITY is not set > -# CONFIG_JFS_DEBUG is not set > -CONFIG_JFS_STATISTICS=y > -CONFIG_XFS_FS=m > -CONFIG_XFS_QUOTA=y > -CONFIG_XFS_POSIX_ACL=y > -CONFIG_XFS_RT=y > -# CONFIG_XFS_DEBUG is not set > -CONFIG_GFS2_FS=m > -CONFIG_GFS2_FS_LOCKING_DLM=y > -CONFIG_OCFS2_FS=m > -CONFIG_OCFS2_FS_O2CB=m > -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m > -CONFIG_OCFS2_FS_STATS=y > -CONFIG_OCFS2_DEBUG_MASKLOG=y > -# CONFIG_OCFS2_DEBUG_FS is not set > -CONFIG_BTRFS_FS=m > -CONFIG_BTRFS_FS_POSIX_ACL=y > -CONFIG_NILFS2_FS=m > -CONFIG_FS_POSIX_ACL=y > -CONFIG_EXPORTFS=y > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY_USER=y > -CONFIG_FANOTIFY=y > -CONFIG_QUOTA=y > -# CONFIG_QUOTA_NETLINK_INTERFACE is not set > -CONFIG_PRINT_QUOTA_WARNING=y > -# CONFIG_QUOTA_DEBUG is not set > -CONFIG_QUOTA_TREE=y > -# CONFIG_QFMT_V1 is not set > -CONFIG_QFMT_V2=y > -CONFIG_QUOTACTL=y > -CONFIG_AUTOFS4_FS=y > -CONFIG_FUSE_FS=m > -CONFIG_CUSE=m > -CONFIG_GENERIC_ACL=y > - > -# > -# Caches > -# > -CONFIG_FSCACHE=m > -CONFIG_FSCACHE_STATS=y > -CONFIG_FSCACHE_HISTOGRAM=y > -# CONFIG_FSCACHE_DEBUG is not set > -# CONFIG_FSCACHE_OBJECT_LIST is not set > -CONFIG_CACHEFILES=m > -# CONFIG_CACHEFILES_DEBUG is not set > -CONFIG_CACHEFILES_HISTOGRAM=y > - > -# > -# CD-ROM/DVD Filesystems > -# > -CONFIG_ISO9660_FS=m > -CONFIG_JOLIET=y > -CONFIG_ZISOFS=y > -CONFIG_UDF_FS=m > -CONFIG_UDF_NLS=y > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -CONFIG_NTFS_FS=m > -# CONFIG_NTFS_DEBUG is not set > -# CONFIG_NTFS_RW is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -CONFIG_TMPFS_POSIX_ACL=y > -CONFIG_TMPFS_XATTR=y > -# CONFIG_HUGETLB_PAGE is not set > -CONFIG_CONFIGFS_FS=m > -CONFIG_MISC_FILESYSTEMS=y > -CONFIG_ADFS_FS=m > -# CONFIG_ADFS_FS_RW is not set > -CONFIG_AFFS_FS=m > -# CONFIG_ECRYPT_FS is not set > -CONFIG_HFS_FS=m > -CONFIG_HFSPLUS_FS=m > -CONFIG_BEFS_FS=m > -# CONFIG_BEFS_DEBUG is not set > -CONFIG_BFS_FS=m > -CONFIG_EFS_FS=m > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -CONFIG_JFFS2_SUMMARY=y > -CONFIG_JFFS2_FS_XATTR=y > -CONFIG_JFFS2_FS_POSIX_ACL=y > -CONFIG_JFFS2_FS_SECURITY=y > -CONFIG_JFFS2_COMPRESSION_OPTIONS=y > -CONFIG_JFFS2_ZLIB=y > -CONFIG_JFFS2_LZO=y > -CONFIG_JFFS2_RTIME=y > -CONFIG_JFFS2_RUBIN=y > -# CONFIG_JFFS2_CMODE_NONE is not set > -# CONFIG_JFFS2_CMODE_PRIORITY is not set > -# CONFIG_JFFS2_CMODE_SIZE is not set > -CONFIG_JFFS2_CMODE_FAVOURLZO=y > -CONFIG_UBIFS_FS=y > -CONFIG_UBIFS_FS_XATTR=y > -CONFIG_UBIFS_FS_ADVANCED_COMPR=y > -CONFIG_UBIFS_FS_LZO=y > -CONFIG_UBIFS_FS_ZLIB=y > -# CONFIG_UBIFS_FS_DEBUG is not set > -CONFIG_LOGFS=m > -CONFIG_CRAMFS=m > -CONFIG_SQUASHFS=y > -# CONFIG_SQUASHFS_XATTR is not set > -CONFIG_SQUASHFS_LZO=y > -CONFIG_SQUASHFS_XZ=y > -# CONFIG_SQUASHFS_EMBEDDED is not set > -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 > -CONFIG_VXFS_FS=m > -CONFIG_MINIX_FS=m > -CONFIG_OMFS_FS=m > -CONFIG_HPFS_FS=m > -CONFIG_QNX4FS_FS=m > -CONFIG_ROMFS_FS=m > -CONFIG_ROMFS_BACKED_BY_BLOCK=y > -# CONFIG_ROMFS_BACKED_BY_MTD is not set > -# CONFIG_ROMFS_BACKED_BY_BOTH is not set > -CONFIG_ROMFS_ON_BLOCK=y > -CONFIG_PSTORE=y > -CONFIG_SYSV_FS=m > -CONFIG_UFS_FS=m > -# CONFIG_UFS_FS_WRITE is not set > -# CONFIG_UFS_DEBUG is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -CONFIG_NFS_V3_ACL=y > -CONFIG_NFS_V4=y > -CONFIG_NFS_V4_1=y > -CONFIG_PNFS_FILE_LAYOUT=y > -CONFIG_ROOT_NFS=y > -# CONFIG_NFS_USE_LEGACY_DNS is not set > -CONFIG_NFS_USE_KERNEL_DNS=y > -# CONFIG_NFS_USE_NEW_IDMAPPER is not set > -CONFIG_NFSD=m > -CONFIG_NFSD_DEPRECATED=y > -CONFIG_NFSD_V2_ACL=y > -CONFIG_NFSD_V3=y > -CONFIG_NFSD_V3_ACL=y > -CONFIG_NFSD_V4=y > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_NFS_ACL_SUPPORT=y > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -CONFIG_SUNRPC_GSS=y > -CONFIG_RPCSEC_GSS_KRB5=m > -CONFIG_CEPH_FS=m > -CONFIG_CIFS=m > -CONFIG_CIFS_STATS=y > -CONFIG_CIFS_STATS2=y > -# CONFIG_CIFS_WEAK_PW_HASH is not set > -# CONFIG_CIFS_UPCALL is not set > -CONFIG_CIFS_XATTR=y > -CONFIG_CIFS_POSIX=y > -# CONFIG_CIFS_DEBUG2 is not set > -CONFIG_CIFS_DFS_UPCALL=y > -CONFIG_CIFS_FSCACHE=y > -CONFIG_CIFS_ACL=y > -CONFIG_NCP_FS=m > -# CONFIG_NCPFS_PACKET_SIGNING is not set > -# CONFIG_NCPFS_IOCTL_LOCKING is not set > -# CONFIG_NCPFS_STRONG is not set > -# CONFIG_NCPFS_NFS_NS is not set > -# CONFIG_NCPFS_OS2_NS is not set > -# CONFIG_NCPFS_SMALLDOS is not set > -# CONFIG_NCPFS_NLS is not set > -# CONFIG_NCPFS_EXTRAS is not set > -CONFIG_CODA_FS=m > -CONFIG_AFS_FS=m > -# CONFIG_AFS_DEBUG is not set > -# CONFIG_AFS_FSCACHE is not set > -CONFIG_9P_FS=m > -CONFIG_9P_FSCACHE=y > -CONFIG_9P_FS_POSIX_ACL=y > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -CONFIG_MAC_PARTITION=y > -CONFIG_MSDOS_PARTITION=y > -CONFIG_BSD_DISKLABEL=y > -CONFIG_MINIX_SUBPARTITION=y > -CONFIG_SOLARIS_X86_PARTITION=y > -# CONFIG_UNIXWARE_DISKLABEL is not set > -CONFIG_LDM_PARTITION=y > -CONFIG_LDM_DEBUG=y > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -CONFIG_EFI_PARTITION=y > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -CONFIG_NLS_CODEPAGE_737=m > -CONFIG_NLS_CODEPAGE_775=m > -CONFIG_NLS_CODEPAGE_850=m > -CONFIG_NLS_CODEPAGE_852=m > -CONFIG_NLS_CODEPAGE_855=m > -CONFIG_NLS_CODEPAGE_857=m > -CONFIG_NLS_CODEPAGE_860=m > -CONFIG_NLS_CODEPAGE_861=m > -CONFIG_NLS_CODEPAGE_862=m > -CONFIG_NLS_CODEPAGE_863=m > -CONFIG_NLS_CODEPAGE_864=m > -CONFIG_NLS_CODEPAGE_865=m > -CONFIG_NLS_CODEPAGE_866=m > -CONFIG_NLS_CODEPAGE_869=m > -CONFIG_NLS_CODEPAGE_936=m > -CONFIG_NLS_CODEPAGE_950=m > -CONFIG_NLS_CODEPAGE_932=m > -CONFIG_NLS_CODEPAGE_949=m > -CONFIG_NLS_CODEPAGE_874=m > -CONFIG_NLS_ISO8859_8=m > -CONFIG_NLS_CODEPAGE_1250=m > -CONFIG_NLS_CODEPAGE_1251=m > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -CONFIG_NLS_ISO8859_2=m > -CONFIG_NLS_ISO8859_3=m > -CONFIG_NLS_ISO8859_4=m > -CONFIG_NLS_ISO8859_5=m > -CONFIG_NLS_ISO8859_6=m > -CONFIG_NLS_ISO8859_7=m > -CONFIG_NLS_ISO8859_9=m > -CONFIG_NLS_ISO8859_13=m > -CONFIG_NLS_ISO8859_14=m > -CONFIG_NLS_ISO8859_15=m > -CONFIG_NLS_KOI8_R=m > -CONFIG_NLS_KOI8_U=m > -CONFIG_NLS_UTF8=y > -CONFIG_DLM=m > -# CONFIG_DLM_DEBUG is not set > - > -# > -# Kernel hacking > -# > -CONFIG_PRINTK_TIME=y > -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 > -CONFIG_ENABLE_WARN_DEPRECATED=y > -CONFIG_ENABLE_MUST_CHECK=y > -CONFIG_FRAME_WARN=1024 > -CONFIG_MAGIC_SYSRQ=y > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -# CONFIG_DEBUG_SECTION_MISMATCH is not set > -CONFIG_DEBUG_KERNEL=y > -# CONFIG_DEBUG_SHIRQ is not set > -# CONFIG_LOCKUP_DETECTOR is not set > -# CONFIG_HARDLOCKUP_DETECTOR is not set > -CONFIG_DETECT_HUNG_TASK=y > -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 > -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set > -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 > -CONFIG_SCHED_DEBUG=y > -CONFIG_SCHEDSTATS=y > -CONFIG_TIMER_STATS=y > -# CONFIG_DEBUG_OBJECTS is not set > -# CONFIG_DEBUG_SLAB is not set > -# CONFIG_DEBUG_KMEMLEAK is not set > -# CONFIG_DEBUG_RT_MUTEXES is not set > -# CONFIG_RT_MUTEX_TESTER is not set > -# CONFIG_DEBUG_SPINLOCK is not set > -CONFIG_DEBUG_MUTEXES=y > -# CONFIG_DEBUG_LOCK_ALLOC is not set > -# CONFIG_PROVE_LOCKING is not set > -# CONFIG_SPARSE_RCU_POINTER is not set > -# CONFIG_LOCK_STAT is not set > -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set > -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set > -# CONFIG_DEBUG_STACK_USAGE is not set > -# CONFIG_DEBUG_KOBJECT is not set > -# CONFIG_DEBUG_BUGVERBOSE is not set > -# CONFIG_DEBUG_INFO is not set > -# CONFIG_DEBUG_VM is not set > -# CONFIG_DEBUG_WRITECOUNT is not set > -# CONFIG_DEBUG_MEMORY_INIT is not set > -# CONFIG_DEBUG_LIST is not set > -# CONFIG_TEST_LIST_SORT is not set > -# CONFIG_DEBUG_SG is not set > -# CONFIG_DEBUG_NOTIFIERS is not set > -# CONFIG_DEBUG_CREDENTIALS is not set > -# CONFIG_BOOT_PRINTK_DELAY is not set > -# CONFIG_RCU_TORTURE_TEST is not set > -# CONFIG_BACKTRACE_SELF_TEST is not set > -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set > -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set > -# CONFIG_LKDTM is not set > -# CONFIG_FAULT_INJECTION is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -# CONFIG_DEBUG_PAGEALLOC is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y > -CONFIG_HAVE_DYNAMIC_FTRACE=y > -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y > -CONFIG_HAVE_C_RECORDMCOUNT=y > -CONFIG_RING_BUFFER=y > -CONFIG_RING_BUFFER_ALLOW_SWAP=y > -CONFIG_TRACING_SUPPORT=y > -CONFIG_FTRACE=y > -# CONFIG_FUNCTION_TRACER is not set > -# CONFIG_IRQSOFF_TRACER is not set > -# CONFIG_SCHED_TRACER is not set > -# CONFIG_ENABLE_DEFAULT_TRACERS is not set > -CONFIG_BRANCH_PROFILE_NONE=y > -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set > -# CONFIG_PROFILE_ALL_BRANCHES is not set > -# CONFIG_STACK_TRACER is not set > -# CONFIG_BLK_DEV_IO_TRACE is not set > -# CONFIG_RING_BUFFER_BENCHMARK is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_DMA_API_DEBUG is not set > -# CONFIG_ATOMIC64_SELFTEST is not set > -# CONFIG_ASYNC_RAID6_TEST is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_KGDB is not set > -# CONFIG_TEST_KSTRTOX is not set > -# CONFIG_STRICT_DEVMEM is not set > -CONFIG_ARM_UNWIND=y > -# CONFIG_DEBUG_USER is not set > -# CONFIG_DEBUG_LL is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -CONFIG_KEYS=y > -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set > -# CONFIG_SECURITY_DMESG_RESTRICT is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_XOR_BLOCKS=m > -CONFIG_ASYNC_CORE=m > -CONFIG_ASYNC_MEMCPY=m > -CONFIG_ASYNC_XOR=m > -CONFIG_ASYNC_PQ=m > -CONFIG_ASYNC_RAID6_RECOV=m > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -CONFIG_CRYPTO_ALGAPI=y > -CONFIG_CRYPTO_ALGAPI2=y > -CONFIG_CRYPTO_AEAD=m > -CONFIG_CRYPTO_AEAD2=y > -CONFIG_CRYPTO_BLKCIPHER=y > -CONFIG_CRYPTO_BLKCIPHER2=y > -CONFIG_CRYPTO_HASH=y > -CONFIG_CRYPTO_HASH2=y > -CONFIG_CRYPTO_RNG=m > -CONFIG_CRYPTO_RNG2=y > -CONFIG_CRYPTO_PCOMP2=y > -CONFIG_CRYPTO_MANAGER=y > -CONFIG_CRYPTO_MANAGER2=y > -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y > -CONFIG_CRYPTO_GF128MUL=m > -CONFIG_CRYPTO_NULL=m > -CONFIG_CRYPTO_WORKQUEUE=y > -CONFIG_CRYPTO_CRYPTD=m > -CONFIG_CRYPTO_AUTHENC=m > -CONFIG_CRYPTO_TEST=m > - > -# > -# Authenticated Encryption with Associated Data > -# > -CONFIG_CRYPTO_CCM=m > -CONFIG_CRYPTO_GCM=m > -CONFIG_CRYPTO_SEQIV=m > - > -# > -# Block modes > -# > -CONFIG_CRYPTO_CBC=y > -CONFIG_CRYPTO_CTR=m > -CONFIG_CRYPTO_CTS=m > -CONFIG_CRYPTO_ECB=y > -CONFIG_CRYPTO_LRW=m > -CONFIG_CRYPTO_PCBC=m > -CONFIG_CRYPTO_XTS=m > - > -# > -# Hash modes > -# > -CONFIG_CRYPTO_HMAC=m > -CONFIG_CRYPTO_XCBC=m > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -CONFIG_CRYPTO_CRC32C=y > -CONFIG_CRYPTO_GHASH=m > -CONFIG_CRYPTO_MD4=m > -CONFIG_CRYPTO_MD5=y > -CONFIG_CRYPTO_MICHAEL_MIC=y > -CONFIG_CRYPTO_RMD128=m > -CONFIG_CRYPTO_RMD160=m > -CONFIG_CRYPTO_RMD256=m > -CONFIG_CRYPTO_RMD320=m > -CONFIG_CRYPTO_SHA1=m > -CONFIG_CRYPTO_SHA256=m > -CONFIG_CRYPTO_SHA512=m > -CONFIG_CRYPTO_TGR192=m > -CONFIG_CRYPTO_WP512=m > - > -# > -# Ciphers > -# > -CONFIG_CRYPTO_AES=y > -CONFIG_CRYPTO_ANUBIS=m > -CONFIG_CRYPTO_ARC4=y > -CONFIG_CRYPTO_BLOWFISH=m > -CONFIG_CRYPTO_CAMELLIA=m > -CONFIG_CRYPTO_CAST5=m > -CONFIG_CRYPTO_CAST6=m > -CONFIG_CRYPTO_DES=y > -CONFIG_CRYPTO_FCRYPT=m > -CONFIG_CRYPTO_KHAZAD=m > -CONFIG_CRYPTO_SALSA20=m > -CONFIG_CRYPTO_SEED=m > -CONFIG_CRYPTO_SERPENT=m > -CONFIG_CRYPTO_TEA=m > -CONFIG_CRYPTO_TWOFISH=m > -CONFIG_CRYPTO_TWOFISH_COMMON=m > - > -# > -# Compression > -# > -CONFIG_CRYPTO_DEFLATE=y > -# CONFIG_CRYPTO_ZLIB is not set > -CONFIG_CRYPTO_LZO=y > - > -# > -# Random Number Generation > -# > -CONFIG_CRYPTO_ANSI_CPRNG=m > -CONFIG_CRYPTO_USER_API=m > -CONFIG_CRYPTO_USER_API_HASH=m > -CONFIG_CRYPTO_USER_API_SKCIPHER=m > -CONFIG_CRYPTO_HW=y > -CONFIG_CRYPTO_DEV_OMAP_SHAM=m > -CONFIG_CRYPTO_DEV_OMAP_AES=m > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_RAID6_PQ=m > -CONFIG_BITREVERSE=y > -CONFIG_CRC_CCITT=y > -CONFIG_CRC16=y > -CONFIG_CRC_T10DIF=y > -CONFIG_CRC_ITU_T=y > -CONFIG_CRC32=y > -CONFIG_CRC7=y > -CONFIG_LIBCRC32C=y > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_LZO_COMPRESS=y > -CONFIG_LZO_DECOMPRESS=y > -CONFIG_XZ_DEC=y > -CONFIG_XZ_DEC_X86=y > -CONFIG_XZ_DEC_POWERPC=y > -CONFIG_XZ_DEC_IA64=y > -CONFIG_XZ_DEC_ARM=y > -CONFIG_XZ_DEC_ARMTHUMB=y > -CONFIG_XZ_DEC_SPARC=y > -CONFIG_XZ_DEC_BCJ=y > -CONFIG_XZ_DEC_TEST=m > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_DECOMPRESS_BZIP2=y > -CONFIG_DECOMPRESS_LZMA=y > -CONFIG_DECOMPRESS_XZ=y > -CONFIG_DECOMPRESS_LZO=y > -CONFIG_TEXTSEARCH=y > -CONFIG_TEXTSEARCH_KMP=m > -CONFIG_TEXTSEARCH_BM=m > -CONFIG_TEXTSEARCH_FSM=m > -CONFIG_BTREE=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > -CONFIG_AVERAGE=y > diff --git a/recipes-kernel/linux/linux-3.0/bias/0001-OMAP3630-PRM-add-ABB- > PRM-register-definitions.patch b/recipes-kernel/linux/linux-3.0/bias/0001- > OMAP3630-PRM-add-ABB-PRM-register-definitions.patch > deleted file mode 100644 > index 8dd595a..0000000 > --- a/recipes-kernel/linux/linux-3.0/bias/0001-OMAP3630-PRM-add-ABB-PRM- > register-definitions.patch > +++ /dev/null > @@ -1,93 +0,0 @@ > -From 2deaccf427c0fa1e87ed764877c03c2b1ba9b913 Mon Sep 17 00:00:00 > 2001 > -From: Mike Turquette <mturquette@ti.com> > -Date: Wed, 29 Jun 2011 17:25:53 -0700 > -Subject: [PATCH 1/8] OMAP3630: PRM: add ABB PRM register definitions > - > -OMAP3630 supports an Adaptive Body-Bias ldo as well as some MPU interrupts > -related to voltage control that are not present on OMAP34XX. This patch > -adds the offsets, register addresses, bitfield shifts and masks to support > -this feature. > - > -Signed-off-by: Mike Turquette <mturquette@ti.com> > ---- > - arch/arm/mach-omap2/prm-regbits-34xx.h | 34 > ++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/prm2xxx_3xxx.h | 4 +++ > - 2 files changed, 38 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach- > omap2/prm-regbits-34xx.h > -index 64c087a..0309ff6 100644 > ---- a/arch/arm/mach-omap2/prm-regbits-34xx.h > -+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h > -@@ -216,6 +216,12 @@ > - /* PRM_SYSCONFIG specific bits */ > - > - /* PRM_IRQSTATUS_MPU specific bits */ > -+#define OMAP3630_VC_BYPASS_ACK_ST_SHIFT 28 > -+#define OMAP3630_VC_BYPASS_ACK_ST_MASK (1 << > 28) > -+#define OMAP3630_VC_VP1_ACK_ST_SHIFT 27 > -+#define OMAP3630_VC_VP1_ACK_ST_MASK (1 << 27) > -+#define OMAP3630_ABB_LDO_TRANXDONE_ST_SHIFT 26 > -+#define OMAP3630_ABB_LDO_TRANXDONE_ST_MASK (1 << > 26) > - #define OMAP3430ES2_SND_PERIPH_DPLL_ST_SHIFT 25 > - #define OMAP3430ES2_SND_PERIPH_DPLL_ST_MASK (1 << 25) > - #define OMAP3430_VC_TIMEOUTERR_ST_MASK (1 << > 24) > -@@ -248,6 +254,12 @@ > - #define OMAP3430_FS_USB_WKUP_ST_MASK (1 << 1) > - > - /* PRM_IRQENABLE_MPU specific bits */ > -+#define OMAP3630_VC_BYPASS_ACK_EN_SHIFT > 28 > -+#define OMAP3630_VC_BYPASS_ACK_EN_MASK > (1 << 28) > -+#define OMAP3630_VC_VP1_ACK_EN_SHIFT 27 > -+#define OMAP3630_VC_VP1_ACK_EN_MASK (1 << > 27) > -+#define OMAP3630_ABB_LDO_TRANXDONE_EN_SHIFT > 26 > -+#define OMAP3630_ABB_LDO_TRANXDONE_EN_MASK > (1 << 26) > - #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_SHIFT 25 > - #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_MASK (1 << > 25) > - #define OMAP3430_VC_TIMEOUTERR_EN_MASK > (1 << 24) > -@@ -587,6 +599,28 @@ > - > - /* PRM_VP2_STATUS specific bits */ > - > -+/* PRM_LDO_ABB_SETUP specific bits */ > -+#define OMAP3630_SR2_IN_TRANSITION_SHIFT 6 > -+#define OMAP3630_SR2_IN_TRANSITION_MASK (1 << > 6) > -+#define OMAP3630_SR2_STATUS_SHIFT 3 > -+#define OMAP3630_SR2_STATUS_MASK (3 << 3) > -+#define OMAP3630_OPP_CHANGE_SHIFT 2 > -+#define OMAP3630_OPP_CHANGE_MASK (1 << 2) > -+#define OMAP3630_OPP_SEL_SHIFT 0 > -+#define OMAP3630_OPP_SEL_MASK (3 << 0) > -+ > -+/* PRM_LDO_ABB_CTRL specific bits */ > -+#define OMAP3630_SR2_WTCNT_VALUE_SHIFT 8 > -+#define OMAP3630_SR2_WTCNT_VALUE_MASK (0xff > << 8) > -+#define OMAP3630_SLEEP_RBB_SEL_SHIFT 3 > -+#define OMAP3630_SLEEP_RBB_SEL_MASK (1 << 3) > -+#define OMAP3630_ACTIVE_FBB_SEL_SHIFT 2 > -+#define OMAP3630_ACTIVE_FBB_SEL_MASK (1 << 2) > -+#define OMAP3630_ACTIVE_RBB_SEL_SHIFT 1 > -+#define OMAP3630_ACTIVE_RBB_SEL_MASK (1 << 1) > -+#define OMAP3630_SR2EN_SHIFT 0 > -+#define OMAP3630_SR2EN_MASK (1 << 0) > -+ > - /* RM_RSTST_NEON specific bits */ > - > - /* PM_WKDEP_NEON specific bits */ > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach- > omap2/prm2xxx_3xxx.h > -index cef533d..408d1c7 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h > -@@ -167,6 +167,10 @@ > - #define OMAP3430_PRM_VP2_VOLTAGE > OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) > - #define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 > - #define OMAP3430_PRM_VP2_STATUS > OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) > -+#define OMAP3_PRM_LDO_ABB_SETUP_OFFSET 0x00f0 > -+#define OMAP3630_PRM_LDO_ABB_SETUP > OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f0) > -+#define OMAP3_PRM_LDO_ABB_CTRL_OFFSET 0x00f4 > -+#define OMAP3630_PRM_LDO_ABB_CTRL > OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f4) > - > - #define OMAP3_PRM_CLKSEL_OFFSET 0x0040 > - #define OMAP3430_PRM_CLKSEL > OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/bias/0002-OMAP3-PM-VP-generalize- > PRM-interrupt-helpers.patch b/recipes-kernel/linux/linux-3.0/bias/0002- > OMAP3-PM-VP-generalize-PRM-interrupt-helpers.patch > deleted file mode 100644 > index 8ac6433..0000000 > --- a/recipes-kernel/linux/linux-3.0/bias/0002-OMAP3-PM-VP-generalize-PRM- > interrupt-helpers.patch > +++ /dev/null > @@ -1,263 +0,0 @@ > -From 11401a7b96f5cd53362cd54238a58a5a54a00246 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 29 Jun 2011 17:25:54 -0700 > -Subject: [PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers > - > -We have multiple interrupt status hidden in the PRM interrupt status > -reg. Make this handling generic to allow us to pull out LDO status such > -as those for ABB from it using the same data structure and indexing. We > -hence rename accordingly. > - > -We also fix a trivial warning as the variable does not need exporting: > -arch/arm/mach-omap2/prm2xxx_3xxx.c:172:22: warning: symbol > -'omap3_prm_irqs' was not declared. Should it be static? > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Mike Turquette <mturquette@ti.com> > ---- > - arch/arm/mach-omap2/prm2xxx_3xxx.c | 22 +++++++++++----------- > - arch/arm/mach-omap2/prm2xxx_3xxx.h | 7 +++++-- > - arch/arm/mach-omap2/prm44xx.c | 28 ++++++++++++++-------------- > - arch/arm/mach-omap2/prm44xx.h | 7 +++++-- > - arch/arm/mach-omap2/vp.h | 9 --------- > - arch/arm/mach-omap2/vp3xxx_data.c | 4 ++-- > - arch/arm/mach-omap2/vp44xx_data.c | 6 +++--- > - 7 files changed, 40 insertions(+), 43 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach- > omap2/prm2xxx_3xxx.c > -index 3b83763..8a20242 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.c > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c > -@@ -162,39 +162,39 @@ int omap2_prm_deassert_hardreset(s16 > prm_mod, u8 rst_shift, u8 st_shift) > - /* PRM VP */ > - > - /* > -- * struct omap3_vp - OMAP3 VP register access description. > -+ * struct omap3_prm_irq - OMAP3 PRM IRQ register access description. > - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU > reg > - */ > --struct omap3_vp { > -+struct omap3_prm_irq { > - u32 tranxdone_status; > - }; > - > --struct omap3_vp omap3_vp[] = { > -- [OMAP3_VP_VDD_MPU_ID] = { > -+static struct omap3_prm_irq omap3_prm_irqs[] = { > -+ [OMAP3_PRM_IRQ_VDD_MPU_ID] = { > - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, > - }, > -- [OMAP3_VP_VDD_CORE_ID] = { > -+ [OMAP3_PRM_IRQ_VDD_CORE_ID] = { > - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, > - }, > - }; > - > - #define MAX_VP_ID ARRAY_SIZE(omap3_vp); > - > --u32 omap3_prm_vp_check_txdone(u8 vp_id) > -+u32 omap3_prm_vp_check_txdone(u8 irq_id) > - { > -- struct omap3_vp *vp = &omap3_vp[vp_id]; > -+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; > - u32 irqstatus; > - > - irqstatus = omap2_prm_read_mod_reg(OCP_MOD, > - > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > -- return irqstatus & vp->tranxdone_status; > -+ return irqstatus & irq->tranxdone_status; > - } > - > --void omap3_prm_vp_clear_txdone(u8 vp_id) > -+void omap3_prm_vp_clear_txdone(u8 irq_id) > - { > -- struct omap3_vp *vp = &omap3_vp[vp_id]; > -+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; > - > -- omap2_prm_write_mod_reg(vp->tranxdone_status, > -+ omap2_prm_write_mod_reg(irq->tranxdone_status, > - OCP_MOD, > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > - } > - > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach- > omap2/prm2xxx_3xxx.h > -index 408d1c7..d90b23f 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h > -@@ -307,9 +307,12 @@ extern int omap2_prm_is_hardreset_asserted(s16 > prm_mod, u8 shift); > - extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); > - extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 > st_shift); > - > -+#define OMAP3_PRM_IRQ_VDD_MPU_ID 0 > -+#define OMAP3_PRM_IRQ_VDD_CORE_ID 1 > - /* OMAP3-specific VP functions */ > --u32 omap3_prm_vp_check_txdone(u8 vp_id); > --void omap3_prm_vp_clear_txdone(u8 vp_id); > -+u32 omap3_prm_vp_check_txdone(u8 irq_id); > -+void omap3_prm_vp_clear_txdone(u8 irq_id); > -+ > - > - /* > - * OMAP3 access functions for voltage controller (VC) and > -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach- > omap2/prm44xx.c > -index 495a31a..b77d331 100644 > ---- a/arch/arm/mach-omap2/prm44xx.c > -+++ b/arch/arm/mach-omap2/prm44xx.c > -@@ -57,49 +57,49 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 > bits, s16 inst, s16 reg) > - /* PRM VP */ > - > - /* > -- * struct omap4_vp - OMAP4 VP register access description. > -+ * struct omap4_prm_irq - OMAP4 VP register access description. > - * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP > - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU > reg > - */ > --struct omap4_vp { > -+struct omap4_prm_irq { > - u32 irqstatus_mpu; > - u32 tranxdone_status; > - }; > - > --static struct omap4_vp omap4_vp[] = { > -- [OMAP4_VP_VDD_MPU_ID] = { > -+static struct omap4_prm_irq omap4_prm_irqs[] = { > -+ [OMAP4_PRM_IRQ_VDD_MPU_ID] = { > - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, > - .tranxdone_status = > OMAP4430_VP_MPU_TRANXDONE_ST_MASK, > - }, > -- [OMAP4_VP_VDD_IVA_ID] = { > -+ [OMAP4_PRM_IRQ_VDD_IVA_ID] = { > - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .tranxdone_status = > OMAP4430_VP_IVA_TRANXDONE_ST_MASK, > - }, > -- [OMAP4_VP_VDD_CORE_ID] = { > -+ [OMAP4_PRM_IRQ_VDD_CORE_ID] = { > - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .tranxdone_status = > OMAP4430_VP_CORE_TRANXDONE_ST_MASK, > - }, > - }; > - > --u32 omap4_prm_vp_check_txdone(u8 vp_id) > -+u32 omap4_prm_vp_check_txdone(u8 irq_id) > - { > -- struct omap4_vp *vp = &omap4_vp[vp_id]; > -+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; > - u32 irqstatus; > - > - irqstatus = > omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > - > OMAP4430_PRM_OCP_SOCKET_INST, > -- vp->irqstatus_mpu); > -- return irqstatus & vp->tranxdone_status; > -+ irq->irqstatus_mpu); > -+ return irqstatus & irq->tranxdone_status; > - } > - > --void omap4_prm_vp_clear_txdone(u8 vp_id) > -+void omap4_prm_vp_clear_txdone(u8 irq_id) > - { > -- struct omap4_vp *vp = &omap4_vp[vp_id]; > -+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; > - > -- omap4_prminst_write_inst_reg(vp->tranxdone_status, > -+ omap4_prminst_write_inst_reg(irq->tranxdone_status, > - OMAP4430_PRM_PARTITION, > - OMAP4430_PRM_OCP_SOCKET_INST, > -- vp->irqstatus_mpu); > -+ irq->irqstatus_mpu); > - }; > - > - u32 omap4_prm_vcvp_read(u8 offset) > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index 3d66ccd..858ee53 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -751,9 +751,12 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 > idx); > - extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); > - extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 > idx); > - > -+#define OMAP4_PRM_IRQ_VDD_CORE_ID 0 > -+#define OMAP4_PRM_IRQ_VDD_IVA_ID 1 > -+#define OMAP4_PRM_IRQ_VDD_MPU_ID 2 > - /* OMAP4-specific VP functions */ > --u32 omap4_prm_vp_check_txdone(u8 vp_id); > --void omap4_prm_vp_clear_txdone(u8 vp_id); > -+u32 omap4_prm_vp_check_txdone(u8 irq_id); > -+void omap4_prm_vp_clear_txdone(u8 irq_id); > - > - /* > - * OMAP4 access functions for voltage controller (VC) and > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index d9bc4f1..ee31e2f 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -21,15 +21,6 @@ > - > - struct voltagedomain; > - > --/* > -- * Voltage Processor (VP) identifiers > -- */ > --#define OMAP3_VP_VDD_MPU_ID 0 > --#define OMAP3_VP_VDD_CORE_ID 1 > --#define OMAP4_VP_VDD_CORE_ID 0 > --#define OMAP4_VP_VDD_IVA_ID 1 > --#define OMAP4_VP_VDD_MPU_ID 2 > -- > - /* XXX document */ > - #define VP_IDLE_TIMEOUT 200 > - #define VP_TRANXDONE_TIMEOUT 300 > -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach- > omap2/vp3xxx_data.c > -index 260c554..7bd8181 100644 > ---- a/arch/arm/mach-omap2/vp3xxx_data.c > -+++ b/arch/arm/mach-omap2/vp3xxx_data.c > -@@ -57,7 +57,7 @@ static const struct omap_vp_common > omap3_vp_common = { > - }; > - > - struct omap_vp_instance omap3_vp_mpu = { > -- .id = OMAP3_VP_VDD_MPU_ID, > -+ .id = OMAP3_PRM_IRQ_VDD_MPU_ID, > - .common = &omap3_vp_common, > - .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, > - .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, > -@@ -68,7 +68,7 @@ struct omap_vp_instance omap3_vp_mpu = { > - }; > - > - struct omap_vp_instance omap3_vp_core = { > -- .id = OMAP3_VP_VDD_CORE_ID, > -+ .id = OMAP3_PRM_IRQ_VDD_CORE_ID, > - .common = &omap3_vp_common, > - .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, > - .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, > -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach- > omap2/vp44xx_data.c > -index b4e7704..6de8ed6 100644 > ---- a/arch/arm/mach-omap2/vp44xx_data.c > -+++ b/arch/arm/mach-omap2/vp44xx_data.c > -@@ -56,7 +56,7 @@ static const struct omap_vp_common > omap4_vp_common = { > - }; > - > - struct omap_vp_instance omap4_vp_mpu = { > -- .id = OMAP4_VP_VDD_MPU_ID, > -+ .id = OMAP4_PRM_IRQ_VDD_MPU_ID, > - .common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, > -@@ -67,7 +67,7 @@ struct omap_vp_instance omap4_vp_mpu = { > - }; > - > - struct omap_vp_instance omap4_vp_iva = { > -- .id = OMAP4_VP_VDD_IVA_ID, > -+ .id = OMAP4_PRM_IRQ_VDD_IVA_ID, > - .common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, > -@@ -78,7 +78,7 @@ struct omap_vp_instance omap4_vp_iva = { > - }; > - > - struct omap_vp_instance omap4_vp_core = { > -- .id = OMAP4_VP_VDD_CORE_ID, > -+ .id = OMAP4_PRM_IRQ_VDD_CORE_ID, > - .common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/bias/0003-OMAP3-PRM-add- > tranxdone-IRQ-handlers-for-ABB.patch b/recipes-kernel/linux/linux- > 3.0/bias/0003-OMAP3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch > deleted file mode 100644 > index 3213861..0000000 > --- a/recipes-kernel/linux/linux-3.0/bias/0003-OMAP3-PRM-add-tranxdone- > IRQ-handlers-for-ABB.patch > +++ /dev/null > @@ -1,202 +0,0 @@ > -From da35165116eabf6149d558b426549784c93af164 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 29 Jun 2011 17:25:55 -0700 > -Subject: [PATCH 3/8] OMAP3+: PRM: add tranxdone IRQ handlers for ABB > - > -OMAP3 and more recent platforms support a PRM interrupt to the MPU for > -Adapative Body-Bias ldo transitions. > - > -Add helpers to the OMAP3 & OMAP4 PRM code to check the status of the > -interrupt and also to clear it. These will be called from the ABB code > -as part of the greater voltage scaling sequence. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Mike Turquette <mturquette@ti.com> > ---- > - arch/arm/mach-omap2/prm2xxx_3xxx.c | 35 > ++++++++++++++++++++++++++----- > - arch/arm/mach-omap2/prm2xxx_3xxx.h | 3 ++ > - arch/arm/mach-omap2/prm44xx.c | 40 > +++++++++++++++++++++++++++++------ > - arch/arm/mach-omap2/prm44xx.h | 3 ++ > - 4 files changed, 68 insertions(+), 13 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach- > omap2/prm2xxx_3xxx.c > -index 8a20242..49e9719 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.c > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c > -@@ -163,18 +163,23 @@ int omap2_prm_deassert_hardreset(s16 > prm_mod, u8 rst_shift, u8 st_shift) > - > - /* > - * struct omap3_prm_irq - OMAP3 PRM IRQ register access description. > -- * @tranxdone_status: VP_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > -+ * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > -+ * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > -+ * (ONLY for OMAP3630) > - */ > - struct omap3_prm_irq { > -- u32 tranxdone_status; > -+ u32 vp_tranxdone_status; > -+ u32 abb_tranxdone_status; > - }; > - > - static struct omap3_prm_irq omap3_prm_irqs[] = { > - [OMAP3_PRM_IRQ_VDD_MPU_ID] = { > -- .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, > -+ .vp_tranxdone_status = > OMAP3430_VP1_TRANXDONE_ST_MASK, > -+ .abb_tranxdone_status = > OMAP3630_ABB_LDO_TRANXDONE_ST_MASK, > - }, > - [OMAP3_PRM_IRQ_VDD_CORE_ID] = { > -- .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, > -+ .vp_tranxdone_status = > OMAP3430_VP2_TRANXDONE_ST_MASK, > -+ /* no abb for core */ > - }, > - }; > - > -@@ -187,14 +192,32 @@ u32 omap3_prm_vp_check_txdone(u8 irq_id) > - > - irqstatus = omap2_prm_read_mod_reg(OCP_MOD, > - > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > -- return irqstatus & irq->tranxdone_status; > -+ return irqstatus & irq->vp_tranxdone_status; > - } > - > - void omap3_prm_vp_clear_txdone(u8 irq_id) > - { > - struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; > - > -- omap2_prm_write_mod_reg(irq->tranxdone_status, > -+ omap2_prm_write_mod_reg(irq->vp_tranxdone_status, > -+ OCP_MOD, > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > -+} > -+ > -+u32 omap36xx_prm_abb_check_txdone(u8 irq_id) > -+{ > -+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; > -+ u32 irqstatus; > -+ > -+ irqstatus = omap2_prm_read_mod_reg(OCP_MOD, > -+ > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > -+ return irqstatus & irq->abb_tranxdone_status; > -+} > -+ > -+void omap36xx_prm_abb_clear_txdone(u8 irq_id) > -+{ > -+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; > -+ > -+ omap2_prm_write_mod_reg(irq->abb_tranxdone_status, > - OCP_MOD, > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > - } > - > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach- > omap2/prm2xxx_3xxx.h > -index d90b23f..08d5f1e 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h > -@@ -313,6 +313,9 @@ extern int omap2_prm_deassert_hardreset(s16 > prm_mod, u8 rst_shift, u8 st_shift); > - u32 omap3_prm_vp_check_txdone(u8 irq_id); > - void omap3_prm_vp_clear_txdone(u8 irq_id); > - > -+/* OMAP36xx-specific ABB functions */ > -+u32 omap36xx_prm_abb_check_txdone(u8 irq_id); > -+void omap36xx_prm_abb_clear_txdone(u8 irq_id); > - > - /* > - * OMAP3 access functions for voltage controller (VC) and > -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach- > omap2/prm44xx.c > -index b77d331..dd3776c 100644 > ---- a/arch/arm/mach-omap2/prm44xx.c > -+++ b/arch/arm/mach-omap2/prm44xx.c > -@@ -59,25 +59,30 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 > bits, s16 inst, s16 reg) > - /* > - * struct omap4_prm_irq - OMAP4 VP register access description. > - * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP > -- * @tranxdone_status: VP_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > -+ * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > -+ * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > - */ > - struct omap4_prm_irq { > - u32 irqstatus_mpu; > -- u32 tranxdone_status; > -+ u32 vp_tranxdone_status; > -+ u32 abb_tranxdone_status; > - }; > - > - static struct omap4_prm_irq omap4_prm_irqs[] = { > - [OMAP4_PRM_IRQ_VDD_MPU_ID] = { > - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, > -- .tranxdone_status = > OMAP4430_VP_MPU_TRANXDONE_ST_MASK, > -+ .vp_tranxdone_status = > OMAP4430_VP_MPU_TRANXDONE_ST_MASK, > -+ .abb_tranxdone_status = > OMAP4430_ABB_MPU_DONE_ST_MASK > - }, > - [OMAP4_PRM_IRQ_VDD_IVA_ID] = { > - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > -- .tranxdone_status = > OMAP4430_VP_IVA_TRANXDONE_ST_MASK, > -+ .vp_tranxdone_status = > OMAP4430_VP_IVA_TRANXDONE_ST_MASK, > -+ .abb_tranxdone_status = > OMAP4430_ABB_IVA_DONE_ST_MASK, > - }, > - [OMAP4_PRM_IRQ_VDD_CORE_ID] = { > - .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > -- .tranxdone_status = > OMAP4430_VP_CORE_TRANXDONE_ST_MASK, > -+ .vp_tranxdone_status = > OMAP4430_VP_CORE_TRANXDONE_ST_MASK, > -+ /* Core has no ABB */ > - }, > - }; > - > -@@ -89,19 +94,40 @@ u32 omap4_prm_vp_check_txdone(u8 irq_id) > - irqstatus = > omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > - > OMAP4430_PRM_OCP_SOCKET_INST, > - irq->irqstatus_mpu); > -- return irqstatus & irq->tranxdone_status; > -+ return irqstatus & irq->vp_tranxdone_status; > - } > - > - void omap4_prm_vp_clear_txdone(u8 irq_id) > - { > - struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; > - > -- omap4_prminst_write_inst_reg(irq->tranxdone_status, > -+ omap4_prminst_write_inst_reg(irq->vp_tranxdone_status, > - OMAP4430_PRM_PARTITION, > - OMAP4430_PRM_OCP_SOCKET_INST, > - irq->irqstatus_mpu); > - }; > - > -+u32 omap4_prm_abb_check_txdone(u8 irq_id) > -+{ > -+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; > -+ u32 irqstatus; > -+ > -+ irqstatus = > omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > -+ > OMAP4430_PRM_OCP_SOCKET_INST, > -+ irq->irqstatus_mpu); > -+ return irqstatus & irq->abb_tranxdone_status; > -+} > -+ > -+void omap4_prm_abb_clear_txdone(u8 irq_id) > -+{ > -+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; > -+ > -+ omap4_prminst_write_inst_reg(irq->abb_tranxdone_status, > -+ OMAP4430_PRM_PARTITION, > -+ OMAP4430_PRM_OCP_SOCKET_INST, > -+ irq->irqstatus_mpu); > -+} > -+ > - u32 omap4_prm_vcvp_read(u8 offset) > - { > - return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index 858ee53..8ce3207 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -757,6 +757,9 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 > mask, u32 bits, s16 inst, s16 idx); > - /* OMAP4-specific VP functions */ > - u32 omap4_prm_vp_check_txdone(u8 irq_id); > - void omap4_prm_vp_clear_txdone(u8 irq_id); > -+/* OMAP4-specific ABB functions */ > -+u32 omap4_prm_abb_check_txdone(u8 irq_id); > -+void omap4_prm_abb_clear_txdone(u8 irq_id); > - > - /* > - * OMAP4 access functions for voltage controller (VC) and > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/bias/0004-OMAP3-ABB-Adaptive- > Body-Bias-structures-data.patch b/recipes-kernel/linux/linux-3.0/bias/0004- > OMAP3-ABB-Adaptive-Body-Bias-structures-data.patch > deleted file mode 100644 > index 8d86ccf..0000000 > --- a/recipes-kernel/linux/linux-3.0/bias/0004-OMAP3-ABB-Adaptive-Body-Bias- > structures-data.patch > +++ /dev/null > @@ -1,240 +0,0 @@ > -From a0a304bd0a2255bc661933ef23b3a0860fbee69d Mon Sep 17 00:00:00 > 2001 > -From: Mike Turquette <mturquette@ti.com> > -Date: Wed, 29 Jun 2011 17:25:56 -0700 > -Subject: [PATCH 4/8] OMAP3+: ABB: Adaptive Body-Bias structures & data > - > -Due to voltage domain trimming and silicon characterstics some silicon > -may experience instability when operating at a high voltage. To > -compensate for this an Adaptive Body-Bias ldo exists. First featured in > -OMAP3630, the purpose of this ldo is to provide a voltage boost to PMOS > -backgates when a voltage domain is operating at a high OPP. In this > -mode the ldo is said to be in Forward Body-Bias. At OPPs within a > -nominal voltage range the ABB ldo is bypassed. > - > -This patch introduces the data structures needed to represent the ABB > -ldo's in the voltage layer, and populates the appropriate data for 3630 > -and OMAP4. Not all voltage domains have an ABB ldo, and OMAP34xx does > -not have it at all; in such cases the voltage data will be marked with > -OMAP_ABB_NO_LDO. > - > -Signed-off-by: Mike Turquette <mturquette@ti.com> > ---- > - arch/arm/mach-omap2/Makefile | 5 +- > - arch/arm/mach-omap2/abb.h | 85 > ++++++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/abb36xx_data.c | 38 ++++++++++++++++ > - arch/arm/mach-omap2/abb44xx_data.c | 44 ++++++++++++++++++ > - 4 files changed, 170 insertions(+), 2 deletions(-) > - create mode 100644 arch/arm/mach-omap2/abb.h > - create mode 100644 arch/arm/mach-omap2/abb36xx_data.c > - create mode 100644 arch/arm/mach-omap2/abb44xx_data.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index 7927dd6..5bc306c 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -82,14 +82,15 @@ endif > - # PRCM > - obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o > prm2xxx_3xxx.o > - obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o > prm2xxx_3xxx.o \ > -- vc3xxx_data.o vp3xxx_data.o > -+ vc3xxx_data.o vp3xxx_data.o \ > -+ abb36xx_data.o > - # XXX The presence of cm2xxx_3xxx.o on the line below is temporary and > - # will be removed once the OMAP4 part of the codebase is converted to > - # use OMAP4-specific PRCM functions. > - obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o > cminst44xx.o \ > - cm44xx.o prcm_mpu44xx.o \ > - prminst44xx.o vc44xx_data.o \ > -- vp44xx_data.o > -+ vp44xx_data.o abb44xx_data.o > - > - # OMAP voltage domains > - ifeq ($(CONFIG_PM),y) > -diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h > -new file mode 100644 > -index 0000000..74f2044 > ---- /dev/null > -+++ b/arch/arm/mach-omap2/abb.h > -@@ -0,0 +1,85 @@ > -+/* > -+ * OMAP Adaptive Body-Bias structure and macro definitions > -+ * > -+ * Copyright (C) 2011 Texas Instruments, Inc. > -+ * Mike Turquette <mturquette@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#ifndef __ARCH_ARM_MACH_OMAP2_ABB_H > -+#define __ARCH_ARM_MACH_OMAP2_ABB_H > -+ > -+#include <linux/kernel.h> > -+ > -+#include "voltage.h" > -+ > -+/* NOMINAL_OPP bypasses the ABB ldo, FAST_OPP sets it to Forward Body- > Bias */ > -+#define OMAP_ABB_NOMINAL_OPP 0 > -+#define OMAP_ABB_FAST_OPP 1 > -+#define OMAP_ABB_NO_LDO ~0 > -+ > -+/* Time for the ABB ldo to settle after transition (in micro-seconds) */ > -+#define ABB_TRANXDONE_TIMEOUT 50 > -+ > -+/* > -+ * struct omap_abb_ops - per-OMAP operations needed for ABB transition > -+ * > -+ * @check_tranxdone: return status of ldo transition from PRM_IRQSTATUS > -+ * @clear_tranxdone: clear ABB transition status bit from PRM_IRQSTATUS > -+ */ > -+struct omap_abb_ops { > -+ u32 (*check_tranxdone)(u8 irq_id); > -+ void (*clear_tranxdone)(u8 irq_id); > -+}; > -+ > -+/* > -+ * struct omap_abb_common - ABB data common to an OMAP family > -+ * > -+ * @opp_sel_mask: CTRL reg uses this to program next state of ldo > -+ * @opp_change_mask: CTRL reg uses this to initiate ldo state change > -+ * @sr2_wtcnt_value_mask: SETUP reg uses this to program ldo settling time > -+ * @sr2en_mask: SETUP reg uses this to enable/disable ldo > -+ * @active_fbb_sel_mask: SETUP reg uses this to enable/disable FBB > operation > -+ * @settling_time: number of micro-seconds it takes for ldo to transition > -+ * @clock_cycles: settling_time is counted in multiples of clock cycles > -+ * @ops: pointer to common ops for manipulating PRM_IRQSTATUS bits > -+ */ > -+struct omap_abb_common { > -+ u32 opp_sel_mask; > -+ u32 opp_change_mask; > -+ u32 sr2_wtcnt_value_mask; > -+ u32 sr2en_mask; > -+ u32 active_fbb_sel_mask; > -+ unsigned long settling_time; > -+ unsigned long clock_cycles; > -+ const struct omap_abb_ops *ops; > -+}; > -+ > -+/* > -+ * struct omap_abb_instance - data for each instance of ABB ldo > -+ * > -+ * @setup_offs: PRM register offset for initial configuration of ABB ldo > -+ * @ctrl_offs: PRM register offset for active programming of ABB ldo > -+ * @prm_irq_id: IRQ handle used to resolve IRQSTATUS offset & masks > -+ * @enabled: track whether ABB ldo is enabled or disabled > -+ * @common: pointer to common data for all ABB ldo's > -+ * @_opp_sel: internally track last programmed state of ABB ldo. DO NOT > USE > -+ */ > -+struct omap_abb_instance { > -+ u8 setup_offs; > -+ u8 ctrl_offs; > -+ u8 prm_irq_id; > -+ bool enabled; > -+ const struct omap_abb_common *common; > -+ u8 _opp_sel; > -+}; > -+ > -+extern struct omap_abb_instance omap36xx_abb_mpu; > -+ > -+extern struct omap_abb_instance omap4_abb_mpu; > -+extern struct omap_abb_instance omap4_abb_iva; > -+ > -+#endif > -diff --git a/arch/arm/mach-omap2/abb36xx_data.c b/arch/arm/mach- > omap2/abb36xx_data.c > -new file mode 100644 > -index 0000000..0bcfd66 > ---- /dev/null > -+++ b/arch/arm/mach-omap2/abb36xx_data.c > -@@ -0,0 +1,38 @@ > -+/* > -+ * OMAP36xx Adaptive Body-Bias (ABB) data > -+ * > -+ * Copyright (C) 2011 Texas Instruments, Inc. > -+ * Mike Turquette <mturquette@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "abb.h" > -+#include "prm2xxx_3xxx.h" > -+#include "prm-regbits-34xx.h" > -+ > -+static const struct omap_abb_ops omap36xx_abb_ops = { > -+ .check_tranxdone = &omap36xx_prm_abb_check_txdone, > -+ .clear_tranxdone = &omap36xx_prm_abb_clear_txdone, > -+}; > -+ > -+static const struct omap_abb_common omap36xx_abb_common = { > -+ .opp_sel_mask = OMAP3630_OPP_SEL_MASK, > -+ .opp_change_mask = OMAP3630_OPP_CHANGE_MASK, > -+ .sr2en_mask = OMAP3630_SR2EN_MASK, > -+ .active_fbb_sel_mask = OMAP3630_ACTIVE_FBB_SEL_MASK, > -+ .sr2_wtcnt_value_mask = OMAP3630_SR2_WTCNT_VALUE_MASK, > -+ .settling_time = 30, > -+ .clock_cycles = 8, > -+ .ops = &omap36xx_abb_ops, > -+}; > -+ > -+/* SETUP & CTRL registers swapped names in OMAP4; thus 36xx looks strange > */ > -+struct omap_abb_instance omap36xx_abb_mpu = { > -+ .setup_offs = OMAP3_PRM_LDO_ABB_CTRL_OFFSET, > -+ .ctrl_offs = OMAP3_PRM_LDO_ABB_SETUP_OFFSET, > -+ .prm_irq_id = OMAP3_PRM_IRQ_VDD_MPU_ID, > -+ .common = &omap36xx_abb_common, > -+}; > -diff --git a/arch/arm/mach-omap2/abb44xx_data.c b/arch/arm/mach- > omap2/abb44xx_data.c > -new file mode 100644 > -index 0000000..a7cf855 > ---- /dev/null > -+++ b/arch/arm/mach-omap2/abb44xx_data.c > -@@ -0,0 +1,44 @@ > -+/* > -+ * OMAP44xx Adaptive Body-Bias (ABB) data > -+ * > -+ * Copyright (C) 2011 Texas Instruments, Inc. > -+ * Mike Turquette <mturquette@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include "abb.h" > -+#include "prm44xx.h" > -+#include "prm-regbits-44xx.h" > -+ > -+static const struct omap_abb_ops omap4_abb_ops = { > -+ .check_tranxdone = &omap4_prm_abb_check_txdone, > -+ .clear_tranxdone = &omap4_prm_abb_clear_txdone, > -+}; > -+ > -+static const struct omap_abb_common omap4_abb_common = { > -+ .opp_sel_mask = OMAP4430_OPP_SEL_MASK, > -+ .opp_change_mask = OMAP4430_OPP_CHANGE_MASK, > -+ .sr2en_mask = OMAP4430_SR2EN_MASK, > -+ .active_fbb_sel_mask = OMAP4430_ACTIVE_FBB_SEL_MASK, > -+ .sr2_wtcnt_value_mask = OMAP4430_SR2_WTCNT_VALUE_MASK, > -+ .settling_time = 50, > -+ .clock_cycles = 16, > -+ .ops = &omap4_abb_ops, > -+}; > -+ > -+struct omap_abb_instance omap4_abb_mpu = { > -+ .setup_offs = > OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET, > -+ .ctrl_offs = > OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET, > -+ .prm_irq_id = OMAP4_PRM_IRQ_VDD_MPU_ID, > -+ .common = &omap4_abb_common, > -+}; > -+ > -+struct omap_abb_instance omap4_abb_iva = { > -+ .setup_offs = > OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET, > -+ .ctrl_offs = > OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET, > -+ .prm_irq_id = OMAP4_PRM_IRQ_VDD_IVA_ID, > -+ .common = &omap4_abb_common, > -+}; > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/bias/0005-OMAP3-OPP-add-ABB- > data-to-voltage-tables.patch b/recipes-kernel/linux/linux-3.0/bias/0005- > OMAP3-OPP-add-ABB-data-to-voltage-tables.patch > deleted file mode 100644 > index eb959ff..0000000 > --- a/recipes-kernel/linux/linux-3.0/bias/0005-OMAP3-OPP-add-ABB-data-to- > voltage-tables.patch > +++ /dev/null > @@ -1,194 +0,0 @@ > -From 8d85fedcb9866f5041e2c63b54d3eff7fd88cf18 Mon Sep 17 00:00:00 > 2001 > -From: Mike Turquette <mturquette@ti.com> > -Date: Wed, 29 Jun 2011 17:25:57 -0700 > -Subject: [PATCH 5/8] OMAP3+: OPP: add ABB data to voltage tables > - > -The operating mode of the Adaptive Body-Bias ldo maps directly to the > -voltage of its voltage domain. The two modes supported are bypass and > -Forward Body-Bias (FBB). > - > -This patch models this relationship by adding an opp_sel paramter to > -struct omap_volt_data and populates this type in the 3630 and 4430 > -voltage tables. > - > -NOMINAL_OPP causes the ABB ldo to be in bypass at that specific voltage. > -FAST_OPP causes the ldo to operate in Forward Body-Bias mode. > - > -Not all voltage domains have an ABB ldo and 3430 doesn't have one at > -all. In such cases voltages are marked with OMAP_ABB_NO_LDO. > - > -Signed-off-by: Mike Turquette <mturquette@ti.com> > ---- > - arch/arm/mach-omap2/omap_opp_data.h | 5 ++- > - arch/arm/mach-omap2/opp3xxx_data.c | 37 ++++++++++++++++++---------- > ------- > - arch/arm/mach-omap2/opp4xxx_data.c | 25 ++++++++++++----------- > - arch/arm/mach-omap2/voltage.h | 1 + > - 4 files changed, 36 insertions(+), 32 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach- > omap2/omap_opp_data.h > -index c784c12..5dd4dea 100644 > ---- a/arch/arm/mach-omap2/omap_opp_data.h > -+++ b/arch/arm/mach-omap2/omap_opp_data.h > -@@ -71,12 +71,13 @@ struct omap_opp_def { > - * Initialization wrapper used to define SmartReflex process data > - * XXX Is this needed? Just use C99 initializers in data files? > - */ > --#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \ > -+#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain, > _opp_sel) \ > - { \ > - .volt_nominal = _v_nom, \ > - .sr_efuse_offs = _efuse_offs, \ > - .sr_errminlimit = _errminlimit, \ > -- .vp_errgain = _errgain \ > -+ .vp_errgain = _errgain, \ > -+ .opp_sel = _opp_sel \ > - } > - > - /* Use this to initialize the default table */ > -diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach- > omap2/opp3xxx_data.c > -index d95f3f9..12fc2da 100644 > ---- a/arch/arm/mach-omap2/opp3xxx_data.c > -+++ b/arch/arm/mach-omap2/opp3xxx_data.c > -@@ -24,6 +24,7 @@ > - #include "control.h" > - #include "omap_opp_data.h" > - #include "pm.h" > -+#include "abb.h" > - > - /* 34xx */ > - > -@@ -36,12 +37,12 @@ > - #define OMAP3430_VDD_MPU_OPP5_UV 1350000 > - > - struct omap_volt_data omap34xx_vddmpu_volt_data[] = { > -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, > OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, > OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, > OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18), > -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, > OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18), > -- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, > OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18), > -- VOLT_DATA_DEFINE(0, 0, 0, 0), > -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, > OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, > OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, > OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, > OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, > OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), > - }; > - > - /* VDD2 */ > -@@ -51,10 +52,10 @@ struct omap_volt_data > omap34xx_vddmpu_volt_data[] = { > - #define OMAP3430_VDD_CORE_OPP3_UV 1150000 > - > - struct omap_volt_data omap34xx_vddcore_volt_data[] = { > -- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, > OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, > OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, > OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18), > -- VOLT_DATA_DEFINE(0, 0, 0, 0), > -+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, > OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, > OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, > OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18, OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), > - }; > - > - /* 36xx */ > -@@ -67,11 +68,11 @@ struct omap_volt_data > omap34xx_vddcore_volt_data[] = { > - #define OMAP3630_VDD_MPU_OPP1G_UV 1375000 > - > - struct omap_volt_data omap36xx_vddmpu_volt_data[] = { > -- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, > OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, > OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16), > -- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, > OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23), > -- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, > OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27), > -- VOLT_DATA_DEFINE(0, 0, 0, 0), > -+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, > OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, > OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, > OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, > OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27, > OMAP_ABB_FAST_OPP), > -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), > - }; > - > - /* VDD2 */ > -@@ -80,9 +81,9 @@ struct omap_volt_data omap36xx_vddmpu_volt_data[] > = { > - #define OMAP3630_VDD_CORE_OPP100_UV 1200000 > - > - struct omap_volt_data omap36xx_vddcore_volt_data[] = { > -- VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, > OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, > OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16), > -- VOLT_DATA_DEFINE(0, 0, 0, 0), > -+ VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, > OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c, > OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, > OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16, > OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), > - }; > - > - /* OPP data */ > -diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach- > omap2/opp4xxx_data.c > -index 2293ba2..efdbf91 100644 > ---- a/arch/arm/mach-omap2/opp4xxx_data.c > -+++ b/arch/arm/mach-omap2/opp4xxx_data.c > -@@ -25,6 +25,7 @@ > - #include "control.h" > - #include "omap_opp_data.h" > - #include "pm.h" > -+#include "abb.h" > - > - /* > - * Structures containing OMAP4430 voltage supported and various > -@@ -37,11 +38,11 @@ > - #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000 > - > - struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { > -- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, > OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, > OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), > -- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, > OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), > -- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, > OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), > -- VOLT_DATA_DEFINE(0, 0, 0, 0), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, > OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, > OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, > OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, > OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27, > OMAP_ABB_FAST_OPP), > -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), > - }; > - > - #define OMAP4430_VDD_IVA_OPP50_UV 1013000 > -@@ -49,19 +50,19 @@ struct omap_volt_data > omap44xx_vdd_mpu_volt_data[] = { > - #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000 > - > - struct omap_volt_data omap44xx_vdd_iva_volt_data[] = { > -- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, > OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, > OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), > -- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, > OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), > -- VOLT_DATA_DEFINE(0, 0, 0, 0), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, > OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, > OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, > OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23, > OMAP_ABB_NOMINAL_OPP), > -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), > - }; > - > - #define OMAP4430_VDD_CORE_OPP50_UV 1025000 > - #define OMAP4430_VDD_CORE_OPP100_UV 1200000 > - > - struct omap_volt_data omap44xx_vdd_core_volt_data[] = { > -- VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, > OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), > -- VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, > OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), > -- VOLT_DATA_DEFINE(0, 0, 0, 0), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, > OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c, > OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, > OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16, > OMAP_ABB_NO_LDO), > -+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0), > - }; > - > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index b4c6259..2aa6c43 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -105,6 +105,7 @@ struct omap_volt_data { > - u32 sr_efuse_offs; > - u8 sr_errminlimit; > - u8 vp_errgain; > -+ u32 opp_sel; > - }; > - > - /** > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/bias/0006-OMAP3-Voltage-add-ABB- > data-to-voltage-domains.patch b/recipes-kernel/linux/linux-3.0/bias/0006- > OMAP3-Voltage-add-ABB-data-to-voltage-domains.patch > deleted file mode 100644 > index 3850fea..0000000 > --- a/recipes-kernel/linux/linux-3.0/bias/0006-OMAP3-Voltage-add-ABB-data- > to-voltage-domains.patch > +++ /dev/null > @@ -1,83 +0,0 @@ > -From 4a0f2caa6d49e185eac84e361ee4b40783ffeb16 Mon Sep 17 00:00:00 > 2001 > -From: Mike Turquette <mturquette@ti.com> > -Date: Thu, 21 Jul 2011 12:31:50 +0200 > -Subject: [PATCH 6/8] OMAP3+: Voltage: add ABB data to voltage domains > - > -Starting with OMAP36xx, some voltage domains have an ABB ldo meant to > -insure stability when that voltage domain is operating at a high OPP. > - > -This patch adds struct omap_abb_instance to struct voltagedomain and > -populates the data for those voltage domains that have an ABB ldo on > -both 36xx and 44xx silicon. > - > -Signed-off-by: Mike Turquette <mturquette@ti.com> > ---- > - arch/arm/mach-omap2/voltage.h | 1 + > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 3 +++ > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ > - 3 files changed, 7 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 2aa6c43..4fe35d7 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -69,6 +69,7 @@ struct voltagedomain { > - struct omap_vc_channel *vc; > - const struct omap_vfsm_instance *vfsm; > - struct omap_vp_instance *vp; > -+ struct omap_abb_instance *abb; > - struct omap_voltdm_pmic *pmic; > - > - /* VC/VP register access functions: SoC specific */ > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index b0d0ae1..cdcfbdf 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -26,6 +26,7 @@ > - #include "voltage.h" > - #include "vc.h" > - #include "vp.h" > -+#include "abb.h" > - > - /* > - * VDD data > -@@ -90,6 +91,8 @@ void __init omap3xxx_voltagedomains_init(void) > - if (cpu_is_omap3630()) { > - omap3_voltdm_mpu.volt_data = > omap36xx_vddmpu_volt_data; > - omap3_voltdm_core.volt_data = > omap36xx_vddcore_volt_data; > -+ > -+ omap3_voltdm_mpu.abb = &omap36xx_abb_mpu; > - } else { > - omap3_voltdm_mpu.volt_data = > omap34xx_vddmpu_volt_data; > - omap3_voltdm_core.volt_data = > omap34xx_vddcore_volt_data; > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index c4584e9..11e2458 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -31,6 +31,7 @@ > - #include "omap_opp_data.h" > - #include "vc.h" > - #include "vp.h" > -+#include "abb.h" > - > - static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { > - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, > -@@ -53,6 +54,7 @@ static struct voltagedomain omap4_voltdm_mpu = { > - .vc = &omap4_vc_mpu, > - .vfsm = &omap4_vdd_mpu_vfsm, > - .vp = &omap4_vp_mpu, > -+ .abb = &omap4_abb_mpu, > - }; > - > - static struct voltagedomain omap4_voltdm_iva = { > -@@ -64,6 +66,7 @@ static struct voltagedomain omap4_voltdm_iva = { > - .vc = &omap4_vc_iva, > - .vfsm = &omap4_vdd_iva_vfsm, > - .vp = &omap4_vp_iva, > -+ .abb = &omap4_abb_iva, > - }; > - > - static struct voltagedomain omap4_voltdm_core = { > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3-ABB-initialization- > transition-functions.patch b/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3- > ABB-initialization-transition-functions.patch > deleted file mode 100644 > index 88858cf..0000000 > --- a/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3-ABB-initialization- > transition-functions.patch > +++ /dev/null > @@ -1,274 +0,0 @@ > -From 35fc68e090a4f4241c7b3488fd24e82b3f839994 Mon Sep 17 00:00:00 > 2001 > -From: Mike Turquette <mturquette@ti.com> > -Date: Wed, 29 Jun 2011 17:25:59 -0700 > -Subject: [PATCH 7/8] OMAP3+: ABB: initialization & transition functions > - > -The Adaptive Body-Bias ldo can be set to bypass or Forward Body-Bias > -after voltage scaling is performed. > - > -This patch implements the Adaptive Body-Bias ldo initialization routine > -and the transition sequence which is needed after a vc_bypass or > -vp_forceupdate sequence completes. > - > -Signed-off-by: Mike Turquette <mturquette@ti.com> > ---- > - arch/arm/mach-omap2/Makefile | 2 +- > - arch/arm/mach-omap2/abb.c | 218 > ++++++++++++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/abb.h | 5 + > - 3 files changed, 224 insertions(+), 1 deletions(-) > - create mode 100644 arch/arm/mach-omap2/abb.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index 5bc306c..d0dd488 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -94,7 +94,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o > cm2xxx_3xxx.o cminst44xx.o \ > - > - # OMAP voltage domains > - ifeq ($(CONFIG_PM),y) > --voltagedomain-common := voltage.o vc.o vp.o > -+voltagedomain-common := voltage.o vc.o vp.o abb.o > - obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ > - voltagedomains2xxx_data.o > - obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ > -diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c > -new file mode 100644 > -index 0000000..4d42b67 > ---- /dev/null > -+++ b/arch/arm/mach-omap2/abb.c > -@@ -0,0 +1,218 @@ > -+/* > -+ * OMAP Adaptive Body-Bias core > -+ * > -+ * Copyright (C) 2011 Texas Instruments, Inc. > -+ * Mike Turquette <mturquette@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include <linux/init.h> > -+#include <linux/delay.h> > -+ > -+#include "abb.h" > -+#include "voltage.h" > -+ > -+/* > -+ * omap_abb_set_opp - program ABB ldo based on new voltage > -+ * > -+ * @voltdm - pointer to voltage domain that just finished scaling voltage > -+ * > -+ * Look up the ABB ldo state for the new voltage that voltdm just finished > -+ * transitioning to and compare it to current ldo state. If a change is needed > -+ * then clear appropriate PRM_IRQSTATUS bit, transition ldo and then clear > -+ * PRM_IRQSTATUS bit again. Returns 0 on success, -EERROR otherwise. > -+ */ > -+int omap_abb_set_opp(struct voltagedomain *voltdm) > -+{ > -+ struct omap_abb_instance *abb = voltdm->abb; > -+ struct omap_volt_data *volt_data; > -+ int ret, timeout; > -+ u8 opp_sel; > -+ > -+ /* fetch the ABB ldo OPP_SEL value for the new voltage */ > -+ volt_data = omap_voltage_get_voltdata(voltdm, voltdm- > >nominal_volt); > -+ > -+ if (IS_ERR_OR_NULL(volt_data)) > -+ return -EINVAL; > -+ > -+ opp_sel = volt_data->opp_sel; > -+ > -+ /* bail early if no transition is necessary */ > -+ if (opp_sel == abb->_opp_sel) > -+ return 0; > -+ > -+ /* clear interrupt status */ > -+ timeout = 0; > -+ while (timeout++ < ABB_TRANXDONE_TIMEOUT) { > -+ abb->common->ops->clear_tranxdone(abb->prm_irq_id); > -+ > -+ ret = abb->common->ops->check_tranxdone(abb- > >prm_irq_id); > -+ if (!ret) > -+ break; > -+ > -+ udelay(1); > -+ } > -+ > -+ if (timeout>= ABB_TRANXDONE_TIMEOUT) { > -+ pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n", > -+ __func__, voltdm->name); > -+ return -ETIMEDOUT; > -+ } > -+ > -+ /* program next state of ABB ldo */ > -+ voltdm->rmw(abb->common->opp_sel_mask, > -+ opp_sel << __ffs(abb->common->opp_sel_mask), > -+ abb->ctrl_offs); > -+ > -+ /* initiate ABB ldo change */ > -+ voltdm->rmw(abb->common->opp_change_mask, > -+ abb->common->opp_change_mask, > -+ abb->ctrl_offs); > -+ > -+ /* clear interrupt status */ > -+ timeout = 0; > -+ while (timeout++ < ABB_TRANXDONE_TIMEOUT) { > -+ abb->common->ops->clear_tranxdone(abb->prm_irq_id); > -+ > -+ ret = abb->common->ops->check_tranxdone(abb- > >prm_irq_id); > -+ if (!ret) > -+ break; > -+ > -+ udelay(1); > -+ } > -+ > -+ if (timeout>= ABB_TRANXDONE_TIMEOUT) { > -+ pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n", > -+ __func__, voltdm->name); > -+ return -ETIMEDOUT; > -+ } > -+ > -+ /* track internal state */ > -+ abb->_opp_sel = opp_sel; > -+ > -+ return 0; > -+} > -+ > -+/* > -+ * omap_abb_enable - enable ABB ldo on a particular voltage domain > -+ * > -+ * @voltdm - pointer to particular voltage domain > -+ */ > -+void omap_abb_enable(struct voltagedomain *voltdm) > -+{ > -+ struct omap_abb_instance *abb = voltdm->abb; > -+ > -+ if (abb->enabled) > -+ return; > -+ > -+ abb->enabled = true; > -+ > -+ voltdm->rmw(abb->common->sr2en_mask, abb->common- > >sr2en_mask, > -+ abb->setup_offs); > -+} > -+ > -+/* > -+ * omap_abb_disable - disable ABB ldo on a particular voltage domain > -+ * > -+ * @voltdm - pointer to particular voltage domain > -+ * > -+ * Included for completeness. Not currently used but will be needed in the > -+ * future if ABB is converted to a loadable module. > -+ */ > -+void omap_abb_disable(struct voltagedomain *voltdm) > -+{ > -+ struct omap_abb_instance *abb = voltdm->abb; > -+ > -+ if (!abb->enabled) > -+ return; > -+ > -+ abb->enabled = false; > -+ > -+ voltdm->rmw(abb->common->sr2en_mask, > -+ (0 << __ffs(abb->common->sr2en_mask)), > -+ abb->setup_offs); > -+} > -+ > -+/* > -+ * omap_abb_init - Initialize an ABB ldo instance > -+ * > -+ * @voltdm: voltage domain upon which ABB ldo resides > -+ * > -+ * Initializes an individual ABB ldo for Forward Body-Bias. FBB is used to > -+ * insure stability at higher voltages. Note that some older OMAP chips have a > -+ * Reverse Body-Bias mode meant to save power at low voltage, but that > mode is > -+ * unsupported and phased out on newer chips. > -+ */ > -+void __init omap_abb_init(struct voltagedomain *voltdm) > -+{ > -+ struct omap_abb_instance *abb = voltdm->abb; > -+ u32 sys_clk_rate; > -+ u32 sr2_wt_cnt_val; > -+ u32 clock_cycles; > -+ u32 settling_time; > -+ u32 val; > -+ > -+ if(IS_ERR_OR_NULL(abb)) > -+ return; > -+ > -+ /* > -+ * SR2_WTCNT_VALUE is the settling time for the ABB ldo after a > -+ * transition and must be programmed with the correct time at boot. > -+ * The value programmed into the register is the number of SYS_CLK > -+ * clock cycles that match a given wall time profiled for the ldo. > -+ * This value depends on: > -+ * settling time of ldo in micro-seconds (varies per OMAP family) > -+ * # of clock cycles per SYS_CLK period (varies per OMAP family) > -+ * the SYS_CLK frequency in MHz (varies per board) > -+ * The formula is: > -+ * > -+ * ldo settling time (in micro-seconds) > -+ * SR2_WTCNT_VALUE = ------------------------------------------ > -+ * (# system clock cycles) * (sys_clk period) > -+ * > -+ * Put another way: > -+ * > -+ * SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK > rate)) > -+ * > -+ * To avoid dividing by zero multiply both "# clock cycles" and > -+ * "settling time" by 10 such that the final result is the one we want. > -+ */ > -+ > -+ /* convert SYS_CLK rate to MHz & prevent divide by zero */ > -+ sys_clk_rate = DIV_ROUND_CLOSEST(voltdm->sys_clk.rate, 1000000); > -+ clock_cycles = abb->common->clock_cycles * 10; > -+ settling_time = abb->common->settling_time * 10; > -+ > -+ /* calculate cycle rate */ > -+ clock_cycles = DIV_ROUND_CLOSEST(clock_cycles, sys_clk_rate); > -+ > -+ /* calulate SR2_WTCNT_VALUE */ > -+ sr2_wt_cnt_val = DIV_ROUND_CLOSEST(settling_time, clock_cycles); > -+ > -+ voltdm->rmw(abb->common->sr2_wtcnt_value_mask, > -+ (sr2_wt_cnt_val << __ffs(abb->common- > >sr2_wtcnt_value_mask)), > -+ abb->setup_offs); > -+ > -+ /* allow Forward Body-Bias */ > -+ voltdm->rmw(abb->common->active_fbb_sel_mask, > -+ abb->common->active_fbb_sel_mask, > -+ abb->setup_offs); > -+ > -+ /* did bootloader set OPP_SEL? */ > -+ val = voltdm->read(abb->ctrl_offs); > -+ val &= abb->common->opp_sel_mask; > -+ abb->_opp_sel = val >> __ffs(abb->common->opp_sel_mask); > -+ > -+ /* enable the ldo if not done by bootloader */ > -+ val = voltdm->read(abb->setup_offs); > -+ val &= abb->common->sr2en_mask; > -+ if (val) > -+ abb->enabled = true; > -+ else > -+ omap_abb_enable(voltdm); > -+ > -+ return; > -+} > -diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h > -index 74f2044..c06c7d6 100644 > ---- a/arch/arm/mach-omap2/abb.h > -+++ b/arch/arm/mach-omap2/abb.h > -@@ -82,4 +82,9 @@ extern struct omap_abb_instance omap36xx_abb_mpu; > - extern struct omap_abb_instance omap4_abb_mpu; > - extern struct omap_abb_instance omap4_abb_iva; > - > -+void omap_abb_init(struct voltagedomain *voltdm); > -+void omap_abb_enable(struct voltagedomain *voltdm); > -+void omap_abb_disble(struct voltagedomain *voltdm); > -+int omap_abb_set_opp(struct voltagedomain *voltdm); > -+ > - #endif > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3-Voltage-add-ABB- > to-voltage-scaling.patch b/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3- > Voltage-add-ABB-to-voltage-scaling.patch > deleted file mode 100644 > index bba8410..0000000 > --- a/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3-Voltage-add-ABB-to- > voltage-scaling.patch > +++ /dev/null > @@ -1,114 +0,0 @@ > -From ee2b116a1ee82ec94108035ed1ae047d69aee215 Mon Sep 17 00:00:00 > 2001 > -From: Mike Turquette <mturquette@ti.com> > -Date: Thu, 21 Jul 2011 12:36:37 +0200 > -Subject: [PATCH 8/8] OMAP3+: Voltage: add ABB to voltage scaling > - > -Adaptive Body-Bias ldo state should be transitioned (if necessary) after > -a voltage scaling sequence completes via vc_bypass or vp_forceupdate > -methods. > - > -This patch initializes the ABB ldo's as a part of the greater voltage > -initialization function and adds the ABB transition routine to both the > -vc_bypass and vp_forceupdate sequences. > - > -Signed-off-by: Mike Turquette <mturquette@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 10 ++++++++-- > - arch/arm/mach-omap2/voltage.c | 4 ++++ > - arch/arm/mach-omap2/vp.c | 9 +++++++-- > - 3 files changed, 19 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 16fa912..c5d8550 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -6,6 +6,7 @@ > - > - #include "voltage.h" > - #include "vc.h" > -+#include "abb.h" > - #include "prm-regbits-34xx.h" > - #include "prm-regbits-44xx.h" > - #include "prm44xx.h" > -@@ -153,7 +154,7 @@ int omap_vc_bypass_scale(struct voltagedomain > *voltdm, > - u32 loop_cnt = 0, retries_cnt = 0; > - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; > - u8 target_vsel, current_vsel; > -- int ret; > -+ int ret = 0; > - > - ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > - if (ret) > -@@ -191,7 +192,12 @@ int omap_vc_bypass_scale(struct voltagedomain > *voltdm, > - } > - > - omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); > -- return 0; > -+ > -+ /* transition Adaptive Body-Bias ldo */ > -+ if (voltdm->abb) > -+ ret = omap_abb_set_opp(voltdm); > -+ > -+ return ret; > - } > - > - static void __init omap3_vfsm_init(struct voltagedomain *voltdm) > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index cebc8b1..25f8604 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -40,6 +40,7 @@ > - > - #include "vc.h" > - #include "vp.h" > -+#include "abb.h" > - > - static LIST_HEAD(voltdm_list); > - > -@@ -279,6 +280,9 @@ int __init omap_voltage_late_init(void) > - voltdm->scale = omap_vp_forceupdate_scale; > - omap_vp_init(voltdm); > - } > -+ > -+ if (voltdm->abb) > -+ omap_abb_init(voltdm); > - } > - > - return 0; > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index 66bd700..886be89 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -5,6 +5,7 @@ > - > - #include "voltage.h" > - #include "vp.h" > -+#include "abb.h" > - #include "prm-regbits-34xx.h" > - #include "prm-regbits-44xx.h" > - #include "prm44xx.h" > -@@ -116,7 +117,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - struct omap_vp_instance *vp = voltdm->vp; > - u32 vpconfig; > - u8 target_vsel, current_vsel; > -- int ret, timeout = 0; > -+ int ret = 0, timeout = 0; > - > - ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > - if (ret) > -@@ -178,7 +179,11 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - /* Clear force bit */ > - voltdm->write(vpconfig, vp->vpconfig); > - > -- return 0; > -+ /* transition Adaptive Body-Bias LDO */ > -+ if (voltdm->abb) > -+ ret = omap_abb_set_opp(voltdm); > -+ > -+ return ret; > - } > - > - /** > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-3.0/madc/0001-Enabling-Hwmon-driver- > for-twl4030-madc.patch b/recipes-kernel/linux/linux-3.0/madc/0001-Enabling- > Hwmon-driver-for-twl4030-madc.patch > deleted file mode 100644 > index 35b9abb..0000000 > --- a/recipes-kernel/linux/linux-3.0/madc/0001-Enabling-Hwmon-driver-for- > twl4030-madc.patch > +++ /dev/null > @@ -1,46 +0,0 @@ > -From 174f636d95d1f6aa6fc6ba3e81282fb49b0feecd Mon Sep 17 00:00:00 > 2001 > -From: Keerthy <j-keerthy@ti.com> > -Date: Wed, 4 May 2011 01:14:50 +0530 > -Subject: [PATCH 1/2] Enabling Hwmon driver for twl4030-madc > - > -Signed-off-by: Keerthy <j-keerthy@ti.com> > ---- > - drivers/mfd/twl-core.c | 15 +++++++++++++++ > - 1 files changed, 15 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c > -index f82413a..e39dbed 100644 > ---- a/drivers/mfd/twl-core.c > -+++ b/drivers/mfd/twl-core.c > -@@ -83,6 +83,13 @@ > - #define twl_has_madc() false > - #endif > - > -+#if defined(CONFIG_SENSORS_TWL4030_MADC) ||\ > -+ defined(CONFIG_SENSORS_TWL4030_MADC_MODULE) > -+#define twl_has_madc_hwmon() true > -+#else > -+#define twl_has_madc_hwmon() false > -+#endif > -+ > - #ifdef CONFIG_TWL4030_POWER > - #define twl_has_power() true > - #else > -@@ -669,6 +676,14 @@ add_children(struct twl4030_platform_data *pdata, > unsigned long features) > - return PTR_ERR(child); > - } > - > -+if (twl_has_madc_hwmon()) { > -+ child = add_child(2, "twl4030_madc_hwmon", > -+ NULL, 0, > -+ true, pdata->irq_base + MADC_INTR_OFFSET, > 0); > -+ if (IS_ERR(child)) > -+ return PTR_ERR(child); > -+ } > -+ > - if (twl_has_rtc()) { > - /* > - * REVISIT platform_data here currently might expose the > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core-enable- > madc-clock.patch b/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core- > enable-madc-clock.patch > deleted file mode 100644 > index 015ab6d..0000000 > --- a/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core-enable-madc- > clock.patch > +++ /dev/null > @@ -1,54 +0,0 @@ > -From f4aed769e9e59998f44447e7309e192573e6fac6 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Sat, 23 Jan 2010 06:26:54 -0800 > -Subject: [PATCH 2/2] mfd: twl-core: enable madc clock > - > -Now that the madc driver has been merged it is also necessary to enable the > clock to the madc block > - > -Signed-off-by: Steve Sakoman <steve@sakoman.com> > ---- > - drivers/mfd/twl-core.c | 8 ++++++++ > - include/linux/i2c/twl.h | 1 + > - 2 files changed, 9 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c > -index e39dbed..018ee53 100644 > ---- a/drivers/mfd/twl-core.c > -+++ b/drivers/mfd/twl-core.c > -@@ -217,6 +217,11 @@ > - > - /* Few power values */ > - #define R_CFG_BOOT 0x05 > -+#define R_GPBR1 0x0C > -+ > -+/* MADC clock values for R_GPBR1 */ > -+#define MADC_HFCLK_EN 0x80 > -+#define DEFAULT_MADC_CLK_EN 0x10 > - > - /* some fields in R_CFG_BOOT */ > - #define HFCLK_FREQ_19p2_MHZ (1 << 0) > -@@ -1152,6 +1157,9 @@ static void clocks_init(struct device *dev, > - > - e |= unprotect_pm_master(); > - /* effect->MADC+USB ck en */ > -+ if (twl_has_madc()) > -+ e |= twl_i2c_write_u8(TWL_MODULE_INTBR, > -+ MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, > R_GPBR1); > - e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, > R_CFG_BOOT); > - e |= protect_pm_master(); > - > -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h > -index ba4f886..6802efc 100644 > ---- a/include/linux/i2c/twl.h > -+++ b/include/linux/i2c/twl.h > -@@ -74,6 +74,7 @@ > - > - #define TWL_MODULE_USB TWL4030_MODULE_USB > - #define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE > -+#define TWL_MODULE_INTBR TWL4030_MODULE_INTBR > - #define TWL_MODULE_PIH TWL4030_MODULE_PIH > - #define TWL_MODULE_MADC TWL4030_MODULE_MADC > - #define TWL_MODULE_MAIN_CHARGE > TWL4030_MODULE_MAIN_CHARGE > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/misc/0001-compiler.h-Undef-before- > redefining-__attribute_const.patch b/recipes-kernel/linux/linux-3.0/misc/0001- > compiler.h-Undef-before-redefining-__attribute_const.patch > deleted file mode 100644 > index bf2f6e7..0000000 > --- a/recipes-kernel/linux/linux-3.0/misc/0001-compiler.h-Undef-before- > redefining-__attribute_const.patch > +++ /dev/null > @@ -1,31 +0,0 @@ > -From 6f92ab6de9d8daeb575949bbbcbc7bcdcebc60af Mon Sep 17 00:00:00 > 2001 > -From: Khem Raj <raj.khem@gmail.com> > -Date: Thu, 5 Jan 2012 11:42:35 -0800 > -Subject: [PATCH] compiler.h: Undef before redefining __attribute_const__ > - > -This is required to avoid warnings like > -util/include/linux/compiler.h:8:0: error: "__attribute_const__" redefined [- > Werror] > - > -Signed-off-by: Khem Raj <raj.khem@gmail.com> > - > -Upstream-Status: Pending > - > ---- > - tools/perf/util/include/linux/compiler.h | 4 +++- > - 1 files changed, 3 insertions(+), 1 deletions(-) > - > ---- a/tools/perf/util/include/linux/compiler.h > -+++ b/tools/perf/util/include/linux/compiler.h > -@@ -4,9 +4,11 @@ > - #ifndef __always_inline > - #define __always_inline inline > - #endif > -+#undef __user > - #define __user > -+#undef __attribute_const__ > - #define __attribute_const__ > -- > -+#undef __used > - #define __used __attribute__((__unused__)) > - > - #endif > diff --git a/recipes-kernel/linux/linux-3.0/misc/0002-OMAP2-OPP-allow-OPP- > enumeration-to-continue-if-devic.patch b/recipes-kernel/linux/linux- > 3.0/misc/0002-OMAP2-OPP-allow-OPP-enumeration-to-continue-if- > devic.patch > deleted file mode 100644 > index 7019381..0000000 > --- a/recipes-kernel/linux/linux-3.0/misc/0002-OMAP2-OPP-allow-OPP- > enumeration-to-continue-if-devic.patch > +++ /dev/null > @@ -1,43 +0,0 @@ > -From c15f217f7d07c460763a092f31f61b1975a18563 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Fri, 16 Mar 2012 11:19:09 -0500 > -Subject: [PATCH 2/2] OMAP2+: OPP: allow OPP enumeration to continue if > device is not present > - > -On platforms such as OMAP3, certain variants may not have IVA, SGX > -or some specific component. We currently have a check to aid fixing > -wrong population of OPP entries for issues such as typos. This however > -causes a conflict with valid requirement where the SoC variant does > -not actually have the module present. > - > -So, reduce the severity of the print to a debug statement and skip > -registering that specific OPP, but continue down the list. > - > -Reported-by: Steve Sakoman <steve@sakoman.com> > -Reported-by: Maximilian Schwerin <mvs@tigris.de> > -Acked-by: Steve Sakoman <steve@sakoman.com> > -Tested-by: Maximilian Schwerin <mvs@tigris.de> > -Signed-off-by: Nishanth Menon <nm@ti.com> > ---- > - arch/arm/mach-omap2/opp.c | 4 ++-- > - 1 files changed, 2 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c > -index ab8b35b..f111b82 100644 > ---- a/arch/arm/mach-omap2/opp.c > -+++ b/arch/arm/mach-omap2/opp.c > -@@ -64,10 +64,10 @@ int __init omap_init_opp_table(struct omap_opp_def > *opp_def, > - } > - oh = omap_hwmod_lookup(opp_def->hwmod_name); > - if (!oh || !oh->od) { > -- pr_warn("%s: no hwmod or odev for %s, [%d] " > -+ pr_debug("%s: no hwmod or odev for %s, [%d] " > - "cannot add OPPs.\n", __func__, > - opp_def->hwmod_name, i); > -- return -EINVAL; > -+ continue; > - } > - dev = &oh->od->pdev.dev; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/omap4/0001-OMAP-Fix-linking-error- > in-twl-common.c-for-OMAP2-3-4.patch b/recipes-kernel/linux/linux- > 3.0/omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3- > 4.patch > deleted file mode 100644 > index 695301b..0000000 > --- a/recipes-kernel/linux/linux-3.0/omap4/0001-OMAP-Fix-linking-error-in-twl- > common.c-for-OMAP2-3-4.patch > +++ /dev/null > @@ -1,129 +0,0 @@ > -From 44ab86140417f173835e19bed62d6832023f2914 Mon Sep 17 00:00:00 > 2001 > -From: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Date: Wed, 17 Aug 2011 16:02:55 +0200 > -Subject: [PATCH] OMAP: Fix linking error in twl-common.c for OMAP2/3/4 > only builds > - > -Commit b22f954 (OMAP4: Move common twl6030 configuration to twl- > common) > -caused compile failures for code for OMAP arch which is not selected by > -the config. > - > -Fixes issues like: > -With CONFIG_ARCH_OMAP3=y and CONFIG_ARCH_OMAP4=n, I'm getting > this: > - > -arch/arm/mach-omap2/built-in.o:(.data+0xf99c): undefined reference to > `omap4430_phy_init' > -arch/arm/mach-omap2/built-in.o:(.data+0xf9a0): undefined reference to > `omap4430_phy_exit' > -arch/arm/mach-omap2/built-in.o:(.data+0xf9a4): undefined reference to > `omap4430_phy_power' > -arch/arm/mach-omap2/built-in.o:(.data+0xf9a8): undefined reference to > `omap4430_phy_set_clk' > -arch/arm/mach-omap2/built-in.o:(.data+0xf9ac): undefined reference to > `omap4430_phy_suspend' > - > -Fix the problem by moving the code to ifdef sections for omap3 and omap4. > - > -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > -[tony@atomide.com: updated comments] > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/twl-common.c | 77 ++++++++++++++++++++--------- > --------- > - 1 files changed, 41 insertions(+), 36 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach- > omap2/twl-common.c > -index 3aaa46f..58409c0 100644 > ---- a/arch/arm/mach-omap2/twl-common.c > -+++ b/arch/arm/mach-omap2/twl-common.c > -@@ -48,14 +48,7 @@ void __init omap_pmic_init(int bus, u32 clkrate, > - omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); > - } > - > --static struct twl4030_usb_data omap4_usb_pdata = { > -- .phy_init = omap4430_phy_init, > -- .phy_exit = omap4430_phy_exit, > -- .phy_power = omap4430_phy_power, > -- .phy_set_clock = omap4430_phy_set_clk, > -- .phy_suspend = omap4430_phy_suspend, > --}; > -- > -+#if defined(CONFIG_ARCH_OMAP3) > - static struct twl4030_usb_data omap3_usb_pdata = { > - .usb_mode = T2_USB_MODE_ULPI, > - }; > -@@ -122,6 +115,45 @@ static struct regulator_init_data omap3_vpll2_idata > = { > - .consumer_supplies = omap3_vpll2_supplies, > - }; > - > -+void __init omap3_pmic_get_config(struct twl4030_platform_data > *pmic_data, > -+ u32 pdata_flags, u32 regulators_flags) > -+{ > -+ if (!pmic_data->irq_base) > -+ pmic_data->irq_base = TWL4030_IRQ_BASE; > -+ if (!pmic_data->irq_end) > -+ pmic_data->irq_end = TWL4030_IRQ_END; > -+ > -+ /* Common platform data configurations */ > -+ if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) > -+ pmic_data->usb = &omap3_usb_pdata; > -+ > -+ if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) > -+ pmic_data->bci = &omap3_bci_pdata; > -+ > -+ if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data- > >madc) > -+ pmic_data->madc = &omap3_madc_pdata; > -+ > -+ if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data- > >codec) > -+ pmic_data->codec = &omap3_codec_pdata; > -+ > -+ /* Common regulator configurations */ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && > !pmic_data->vdac) > -+ pmic_data->vdac = &omap3_vdac_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && > !pmic_data->vpll2) > -+ pmic_data->vpll2 = &omap3_vpll2_idata; > -+} > -+#endif /* CONFIG_ARCH_OMAP3 */ > -+ > -+#if defined(CONFIG_ARCH_OMAP4) > -+static struct twl4030_usb_data omap4_usb_pdata = { > -+ .phy_init = omap4430_phy_init, > -+ .phy_exit = omap4430_phy_exit, > -+ .phy_power = omap4430_phy_power, > -+ .phy_set_clock = omap4430_phy_set_clk, > -+ .phy_suspend = omap4430_phy_suspend, > -+}; > -+ > - static struct regulator_init_data omap4_vdac_idata = { > - .constraints = { > - .min_uV = 1800000, > -@@ -274,31 +306,4 @@ void __init omap4_pmic_get_config(struct > twl4030_platform_data *pmic_data, > - pmic_data->clk32kg = &omap4_clk32kg_idata; > - } > - > --void __init omap3_pmic_get_config(struct twl4030_platform_data > *pmic_data, > -- u32 pdata_flags, u32 regulators_flags) > --{ > -- if (!pmic_data->irq_base) > -- pmic_data->irq_base = TWL4030_IRQ_BASE; > -- if (!pmic_data->irq_end) > -- pmic_data->irq_end = TWL4030_IRQ_END; > -- > -- /* Common platform data configurations */ > -- if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) > -- pmic_data->usb = &omap3_usb_pdata; > -- > -- if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) > -- pmic_data->bci = &omap3_bci_pdata; > -- > -- if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data- > >madc) > -- pmic_data->madc = &omap3_madc_pdata; > -- > -- if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data- > >codec) > -- pmic_data->codec = &omap3_codec_pdata; > -- > -- /* Common regulator configurations */ > -- if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && > !pmic_data->vdac) > -- pmic_data->vdac = &omap3_vdac_idata; > -- > -- if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && > !pmic_data->vpll2) > -- pmic_data->vpll2 = &omap3_vpll2_idata; > --} > -+#endif /* CONFIG_ARCH_OMAP4 */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/patch.sh b/recipes-kernel/linux/linux- > 3.0/patch.sh > deleted file mode 100755 > index 31bdfe1..0000000 > --- a/recipes-kernel/linux/linux-3.0/patch.sh > +++ /dev/null > @@ -1,29 +0,0 @@ > -#!/bin/bash > -# (c) 2009 - 2012 Koen Kooi <koen@dominion.thruhere.net> > -# This script will take a set of directories with patches and make a git tree out of > it > -# After all the patches are applied it will output a SRC_URI fragment you can > copy/paste into a recipe > -set -e > - > -TAG="v3.0.17" > -EXTRATAG="" > -PATCHPATH=$(dirname $0) > - > -git am --abort || echo "Do you need to make sure the patches apply cleanly > first?" > -git reset --hard ${TAG} > -rm export -rf > - > -previous=${TAG} > -PATCHSET="pm-wip/voltdm pm-wip/cpufreq beagle madc sakoman sgx ulcd > omap4 misc usb" > - > -# apply patches > -for patchset in ${PATCHSET} ; do > - git am $PATCHPATH/$patchset/* > - git tag "${TAG}-${patchset}${EXTRATAG}" -f > -done > - > -# export patches and output SRC_URI for them > -for patchset in ${PATCHSET} ; do > - mkdir export/$patchset -p > - ( cd export/$patchset && git format-patch ${previous}..${TAG}- > ${patchset}${EXTRATAG} >& /dev/null && for i in *.patch ; do echo " > file://${patchset}/$i \\" ; done ) > - previous=${TAG}-${patchset}${EXTRATAG} > -done > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0001-PM-OPP- > introduce-function-to-free-cpufreq-table.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq- > table.patch > deleted file mode 100644 > index 5b28c5f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0001-PM-OPP-introduce- > function-to-free-cpufreq-table.patch > +++ /dev/null > @@ -1,84 +0,0 @@ > -From 3dfeff8f9ad8fa7e6e434eb4b450a11ab79131da Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 25 May 2011 00:43:26 -0700 > -Subject: [PATCH 01/19] PM: OPP: introduce function to free cpufreq table > - > -cpufreq table allocated by opp_init_cpufreq_table is better > -freed by OPP layer itself. This allows future modifications to > -the table handling to be transparent to the users. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Acked-by: Kevin Hilman <khilman@ti.com> > ---- > - Documentation/power/opp.txt | 2 ++ > - drivers/base/power/opp.c | 17 +++++++++++++++++ > - include/linux/opp.h | 8 ++++++++ > - 3 files changed, 27 insertions(+), 0 deletions(-) > - > -diff --git a/Documentation/power/opp.txt b/Documentation/power/opp.txt > -index 5ae70a12..3035d00 100644 > ---- a/Documentation/power/opp.txt > -+++ b/Documentation/power/opp.txt > -@@ -321,6 +321,8 @@ opp_init_cpufreq_table - cpufreq framework typically > is initialized with > - addition to CONFIG_PM as power management feature is required to > - dynamically scale voltage and frequency in a system. > - > -+opp_free_cpufreq_table - Free up the table allocated by > opp_init_cpufreq_table > -+ > - 7. Data Structures > - ================== > - Typically an SoC contains multiple voltage domains which are variable. Each > -diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c > -index 56a6899..5cc1232 100644 > ---- a/drivers/base/power/opp.c > -+++ b/drivers/base/power/opp.c > -@@ -625,4 +625,21 @@ int opp_init_cpufreq_table(struct device *dev, > - > - return 0; > - } > -+ > -+/** > -+ * opp_free_cpufreq_table() - free the cpufreq table > -+ * @dev: device for which we do this operation > -+ * @table: table to free > -+ * > -+ * Free up the table allocated by opp_init_cpufreq_table > -+ */ > -+void opp_free_cpufreq_table(struct device *dev, > -+ struct cpufreq_frequency_table **table) > -+{ > -+ if (!table) > -+ return; > -+ > -+ kfree(*table); > -+ *table = NULL; > -+} > - #endif /* CONFIG_CPU_FREQ */ > -diff --git a/include/linux/opp.h b/include/linux/opp.h > -index 5449945..7020e97 100644 > ---- a/include/linux/opp.h > -+++ b/include/linux/opp.h > -@@ -94,12 +94,20 @@ static inline int opp_disable(struct device *dev, > unsigned long freq) > - #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_PM_OPP) > - int opp_init_cpufreq_table(struct device *dev, > - struct cpufreq_frequency_table **table); > -+void opp_free_cpufreq_table(struct device *dev, > -+ struct cpufreq_frequency_table **table); > - #else > - static inline int opp_init_cpufreq_table(struct device *dev, > - struct cpufreq_frequency_table **table) > - { > - return -EINVAL; > - } > -+ > -+static inline > -+void opp_free_cpufreq_table(struct device *dev, > -+ struct cpufreq_frequency_table **table) > -+{ > -+} > - #endif /* CONFIG_CPU_FREQ */ > - > - #endif /* __LINUX_OPP_H__ */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP- > CPUfreq-ensure-driver-initializes-after-cpufreq.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver- > initializes-after-cpufreq.patch > deleted file mode 100644 > index f5fd155..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP-CPUfreq- > ensure-driver-initializes-after-cpufreq.patch > +++ /dev/null > @@ -1,28 +0,0 @@ > -From bc2810462308f15ff90841453961200bf90a814d Mon Sep 17 00:00:00 > 2001 > -From: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> > -Date: Wed, 11 Aug 2010 17:02:43 -0700 > -Subject: [PATCH 02/19] OMAP: CPUfreq: ensure driver initializes after cpufreq > framework and governors > - > -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/plat-omap/cpu-omap.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index da4f68d..cd09d4b 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -160,7 +160,7 @@ static int __init omap_cpufreq_init(void) > - return cpufreq_register_driver(&omap_driver); > - } > - > --arch_initcall(omap_cpufreq_init); > -+late_initcall(omap_cpufreq_init); > - > - /* > - * if ever we want to remove this, upon cleanup call: > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0003-OMAP- > CPUfreq-ensure-policy-is-fully-initialized.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully- > initialized.patch > deleted file mode 100644 > index 4805b2a..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0003-OMAP-CPUfreq- > ensure-policy-is-fully-initialized.patch > +++ /dev/null > @@ -1,32 +0,0 @@ > -From be4be1a11360222f0b0add1dadfeaf76af199990 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@deeprootsystems.com> > -Date: Wed, 11 Aug 2010 17:05:38 -0700 > -Subject: [PATCH 03/19] OMAP: CPUfreq: ensure policy is fully initialized > - > -Ensure policy min/max/cur values are initialized when OMAP > -CPUfreq driver starts. > - > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/plat-omap/cpu-omap.c | 4 ++++ > - 1 files changed, 4 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index cd09d4b..1b36664 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -126,6 +126,10 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - VERY_HI_RATE) / > 1000; > - } > - > -+ policy->min = policy->cpuinfo.min_freq; > -+ policy->max = policy->cpuinfo.max_freq; > -+ policy->cur = omap_getspeed(0); > -+ > - /* FIXME: what's the actual transition time? */ > - policy->cpuinfo.transition_latency = 300 * 1000; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0004-OMAP3-PM- > CPUFreq-driver-for-OMAP3.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch > deleted file mode 100644 > index 1ec4593..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0004-OMAP3-PM- > CPUFreq-driver-for-OMAP3.patch > +++ /dev/null > @@ -1,264 +0,0 @@ > -From fcd436dfb1c2d8e4866001700a5bba2a1d4079aa Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Mon, 10 Nov 2008 17:00:25 +0530 > -Subject: [PATCH 04/19] OMAP3 PM: CPUFreq driver for OMAP3 > - > -CPUFreq driver for OMAP3 > - > -With additional fixes and cleanups from Tero Kristo: > -- Fix rate calculation bug in omap3_select_table_rate > -- Refreshed DVFS VDD1 control against latest clock fw > - > -Signed-off-by: Tero Kristo <tero.kristo@nokia.com> > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > - > -OMAP3: PM: CPUFreq: Fix omap_getspeed. > - > -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> > - > -Make sure omap cpufreq driver initializes after cpufreq framework and > governors > - > -Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> > - > -merge: CPUFreq: remove obsolete funcs > - > -OMAP3 clock: Update cpufreq driver > - > -This patch removes all refrences to virtual clock > -nodes in CPUFreq driver. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Tero Kristo <tero.kristo@nokia.com> > -Signed-off-by: Jean Pihet <jpihet@mvista.com> > - > -PM: Prevent direct cpufreq scaling during initialization > - > -It is seen that the OMAP specific cpufreq initialization code tries to > -scale the MPU frequency to the highest possible without taking care of > -the voltage level. On power on reset the power IC does not provide the > -necessary voltage for the highest available MPU frequency (that would > -satisfy all Si families). This potentially is an window of opportunity > -for things to go wrong. > - > -Signed-off-by: Romit Dasgupta <romit@ti.com> > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > - > -OMAP3: PM: enable 600MHz (overdrive) OPP > - > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > - > -omap3: introduce cpufreq > - > -OMAP OPP layer functions now have dependencies of CONFIG_CPU_FREQ > only. > - > -With this patch, omap opp layer now has its compilation flags > -bound to CONFIG_CPU_FREQ. Also its code has been removed from pm34xx.c. > - > -A new file has been created to contain cpu freq code related to > -OMAP3: cpufreq34xx.c > - > -OMAP34xx and OMAP36xx family OPPs are made available > - > -Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > -Signed-off-by: Romit Dasgupta <romit@ti.com> > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > - > -omap3: cpufreq: allow default opp table init > - > -For board files which choose to override the defaults, the existing > -mechanism will work, for boards that would like to work with defaults, > -allow init_common_hw to call init_opp_table to initialize if not > -already initialized. this will allow all omap boards which have opp > -tables predefined for a silicon to use the same. > - > -Originally reported for overo: > -http://marc.info/?t=127265269400004&r=1&w=2 > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Reported-by: Peter Tseng <tsenpet09@gmail.com> > -Cc: Cliff Brake <cliff.brake@gmail.com> > -Cc: Kevin Hilman <khilman@deeprootsystems.com> > - > -OMAP2: update OPP data to be device based > - > -Cc: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > - > -OMAP3: CPUfreq: update to device-based OPP API > - > -Update usage of OPP API to use new device-based API. This requires > -getting the 'struct device' for the MPU and using that with the OPP > -API. > - > -Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> > - > -omap3: opp: make independent of cpufreq > - > -Make opp3xx data which is registered with the opp layer > -dependent purely on CONFIG_PM as opp layer and pm.c users > -are CONFIG_PM dependent not cpufreq dependent. > -so we rename the data definition to opp3xxx_data.c (inline with what > -we have for omap2), also move the build definition to be under > -the existing CONFIG_PM build instead of CPUFREQ. > - > -Cc: Eduardo Valentin <eduardo.valentin@nokia.com> > -Cc: Kevin Hilman <khilman@deeprootsystems.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Cc: Sanjeev Premi <premi@ti.com> > -Cc: Thara Gopinath <thara@ti.com> > -Cc: Tony Lindgren <tony@atomide.com> > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/clock.h | 14 +++++++++++++- > - arch/arm/mach-omap2/clock34xx.c | 2 ++ > - arch/arm/plat-omap/cpu-omap.c | 34 > +++++++++++++++++++++++++++++++--- > - 3 files changed, 46 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h > -index 48ac568..8bad1c6 100644 > ---- a/arch/arm/mach-omap2/clock.h > -+++ b/arch/arm/mach-omap2/clock.h > -@@ -144,7 +144,9 @@ extern const struct clksel_rate gpt_sys_rates[]; > - extern const struct clksel_rate gfx_l3_rates[]; > - extern const struct clksel_rate dsp_ick_rates[]; > - > --#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) > -+#ifdef CONFIG_CPU_FREQ > -+ > -+#ifdef CONFIG_ARCH_OMAP2 > - extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table > **table); > - extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table > **table); > - #else > -@@ -152,6 +154,16 @@ extern void omap2_clk_exit_cpufreq_table(struct > cpufreq_frequency_table **table) > - #define omap2_clk_exit_cpufreq_table 0 > - #endif > - > -+#ifdef CONFIG_ARCH_OMAP3 > -+extern void omap3_clk_init_cpufreq_table(struct cpufreq_frequency_table > **table); > -+extern void omap3_clk_exit_cpufreq_table(struct cpufreq_frequency_table > **table); > -+#else > -+#define omap3_clk_init_cpufreq_table 0 > -+#define omap3_clk_exit_cpufreq_table 0 > -+#endif > -+ > -+#endif /* CONFIG_CPU_FREQ */ > -+ > - extern const struct clkops clkops_omap2_iclk_dflt_wait; > - extern const struct clkops clkops_omap2_iclk_dflt; > - extern const struct clkops clkops_omap2_iclk_idle_only; > -diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach- > omap2/clock34xx.c > -index 1fc96b9..119e135 100644 > ---- a/arch/arm/mach-omap2/clock34xx.c > -+++ b/arch/arm/mach-omap2/clock34xx.c > -@@ -20,6 +20,8 @@ > - #include <linux/kernel.h> > - #include <linux/clk.h> > - #include <linux/io.h> > -+#include <linux/err.h> > -+#include <linux/cpufreq.h> > - > - #include <plat/clock.h> > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index 1b36664..f0f9430 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -8,6 +8,10 @@ > - * > - * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King > - * > -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. > -+ * Updated to support OMAP3 > -+ * Rajendra Nayak <rnayak@ti.com> > -+ * > - * This program is free software; you can redistribute it and/or modify > - * it under the terms of the GNU General Public License version 2 as > - * published by the Free Software Foundation. > -@@ -26,12 +30,19 @@ > - #include <plat/clock.h> > - #include <asm/system.h> > - > -+#if defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -+#include <plat/omap-pm.h> > -+#include <plat/opp.h> > -+#endif > -+ > - #define VERY_HI_RATE 900000000 > - > - static struct cpufreq_frequency_table *freq_table; > - > - #ifdef CONFIG_ARCH_OMAP1 > - #define MPU_CLK "mpu" > -+#elif CONFIG_ARCH_OMAP3 > -+#define MPU_CLK "arm_fck" > - #else > - #define MPU_CLK "virt_prcm_set" > - #endif > -@@ -73,7 +84,13 @@ static int omap_target(struct cpufreq_policy *policy, > - unsigned int target_freq, > - unsigned int relation) > - { > -+#ifdef CONFIG_ARCH_OMAP1 > - struct cpufreq_freqs freqs; > -+#endif > -+#if defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -+ unsigned long freq; > -+ struct device *mpu_dev = omap2_get_mpuss_device(); > -+#endif > - int ret = 0; > - > - /* Ensure desired rate is within allowed range. Some govenors > -@@ -83,13 +100,13 @@ static int omap_target(struct cpufreq_policy *policy, > - if (target_freq > policy->max) > - target_freq = policy->max; > - > -+#ifdef CONFIG_ARCH_OMAP1 > - freqs.old = omap_getspeed(0); > - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > - freqs.cpu = 0; > - > - if (freqs.old == freqs.new) > - return ret; > -- > - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > - #ifdef CONFIG_CPU_FREQ_DEBUG > - printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", > -@@ -97,7 +114,11 @@ static int omap_target(struct cpufreq_policy *policy, > - #endif > - ret = clk_set_rate(mpu_clk, freqs.new * 1000); > - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -- > -+#elif defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -+ freq = target_freq * 1000; > -+ if (opp_find_freq_ceil(mpu_dev, &freq)) > -+ omap_pm_cpu_set_freq(freq); > -+#endif > - return ret; > - } > - > -@@ -114,7 +135,14 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - > - policy->cur = policy->min = policy->max = omap_getspeed(0); > - > -- clk_init_cpufreq_table(&freq_table); > -+ if (!cpu_is_omap34xx()) { > -+ clk_init_cpufreq_table(&freq_table); > -+ } else { > -+ struct device *mpu_dev = omap2_get_mpuss_device(); > -+ > -+ opp_init_cpufreq_table(mpu_dev, &freq_table); > -+ } > -+ > - if (freq_table) { > - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > - if (!result) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0005-OMAP-PM- > CPUFREQ-Fix-conditional-compilation.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional- > compilation.patch > deleted file mode 100644 > index 5527356..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0005-OMAP-PM- > CPUFREQ-Fix-conditional-compilation.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From 62275cbaac608a17fe5ff0437e0950667927e5e8 Mon Sep 17 00:00:00 > 2001 > -From: Silesh C V <silesh@ti.com> > -Date: Wed, 29 Sep 2010 14:52:54 +0530 > -Subject: [PATCH 05/19] OMAP: PM: CPUFREQ: Fix conditional compilation > - > -Fix conditional compilation. A conditional expresiion > -should follow "#elif", in this case #elif clause should > -check whether CONFIG_ARCH_OMAP3 is defined or not > -(ie. defined(CONFIG_ARCH_OMAP3)) rather than checking for > -the value of the macro. > - > -Signed-off-by: Silesh C V <silesh@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/plat-omap/cpu-omap.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index f0f9430..c3ac065 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -41,7 +41,7 @@ static struct cpufreq_frequency_table *freq_table; > - > - #ifdef CONFIG_ARCH_OMAP1 > - #define MPU_CLK "mpu" > --#elif CONFIG_ARCH_OMAP3 > -+#elif defined(CONFIG_ARCH_OMAP3) > - #define MPU_CLK "arm_fck" > - #else > - #define MPU_CLK "virt_prcm_set" > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0006-cpufreq-fixup- > after-new-OPP-layer-merged.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch > deleted file mode 100644 > index 3d8d572..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0006-cpufreq-fixup-after- > new-OPP-layer-merged.patch > +++ /dev/null > @@ -1,34 +0,0 @@ > -From ca2d4d46267668daccc156084f8ad6e74a52f392 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@deeprootsystems.com> > -Date: Tue, 16 Nov 2010 11:48:41 -0800 > -Subject: [PATCH 06/19] cpufreq: fixup after new OPP layer merged > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/plat-omap/cpu-omap.c | 3 ++- > - 1 files changed, 2 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -index c3ac065..9cd2709 100644 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ b/arch/arm/plat-omap/cpu-omap.c > -@@ -25,6 +25,7 @@ > - #include <linux/err.h> > - #include <linux/clk.h> > - #include <linux/io.h> > -+#include <linux/opp.h> > - > - #include <mach/hardware.h> > - #include <plat/clock.h> > -@@ -32,7 +33,7 @@ > - > - #if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) > - #include <plat/omap-pm.h> > --#include <plat/opp.h> > -+#include <plat/common.h> > - #endif > - > - #define VERY_HI_RATE 900000000 > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP- > cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1- > and-OMAP2PLUS-CPUfreq-drive.patch > deleted file mode 100644 > index 25a9de9..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP-cpufreq-Split- > OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch > +++ /dev/null > @@ -1,673 +0,0 @@ > -From 972aa97a8a36946ebe2274e27c317e524de2cd5c Mon Sep 17 00:00:00 > 2001 > -From: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Date: Mon, 14 Mar 2011 17:08:48 +0530 > -Subject: [PATCH 07/19] OMAP: cpufreq: Split OMAP1 and OMAP2PLUS > CPUfreq drivers. > - > -This patch is an attempt to cleanup the #ifdeferry in the > -omap CPUfreq drivers. > - > -The split betwenn OMAP1 and OMAP2PLUS is logical because > - - OMAP1 doesn't support opp layer. > - - OMAP1 build is seperate from omap2plus. > - > -Includes minor header/copyright updates reported by Todd Poynor. > - > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Cc: Kevin Hilman <khilman@ti.com> > -Cc: Vishwanath BS <vishwanath.bs@ti.com> > -Cc: Todd Poynor <toddpoynor@google.com> > -Cc: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap1/Makefile | 3 + > - arch/arm/mach-omap1/omap1-cpufreq.c | 175 > ++++++++++++++++++++++++++ > - arch/arm/mach-omap2/Makefile | 3 + > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 201 > ++++++++++++++++++++++++++++++ > - arch/arm/plat-omap/Makefile | 1 - > - arch/arm/plat-omap/cpu-omap.c | 204 ------------------------------- > - 6 files changed, 382 insertions(+), 205 deletions(-) > - create mode 100644 arch/arm/mach-omap1/omap1-cpufreq.c > - create mode 100644 arch/arm/mach-omap2/omap2plus-cpufreq.c > - delete mode 100644 arch/arm/plat-omap/cpu-omap.c > - > -diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach- > omap1/Makefile > -index 5b114d1..9600410 100644 > ---- a/arch/arm/mach-omap1/Makefile > -+++ b/arch/arm/mach-omap1/Makefile > -@@ -10,6 +10,9 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o > - > - obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o > - > -+# CPUFREQ driver > -+obj-$(CONFIG_CPU_FREQ) += omap1-cpufreq.o > -+ > - # Power Management > - obj-$(CONFIG_PM) += pm.o sleep.o > - > -diff --git a/arch/arm/mach-omap1/omap1-cpufreq.c b/arch/arm/mach- > omap1/omap1-cpufreq.c > -new file mode 100644 > -index 0000000..7c5216e > ---- /dev/null > -+++ b/arch/arm/mach-omap1/omap1-cpufreq.c > -@@ -0,0 +1,175 @@ > -+/* > -+ * OMAP1 cpufreq driver > -+ * > -+ * CPU frequency scaling for OMAP > -+ * > -+ * Copyright (C) 2005 Nokia Corporation > -+ * Written by Tony Lindgren <tony@atomide.com> > -+ * > -+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King > -+ * > -+ * Copyright (C) 2007-2008 Texas Instruments, Inc. > -+ * Rajendra Nayak <rnayak@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+#include <linux/types.h> > -+#include <linux/kernel.h> > -+#include <linux/sched.h> > -+#include <linux/cpufreq.h> > -+#include <linux/delay.h> > -+#include <linux/init.h> > -+#include <linux/err.h> > -+#include <linux/clk.h> > -+#include <linux/io.h> > -+#include <linux/opp.h> > -+ > -+#include <asm/system.h> > -+ > -+#include <plat/clock.h> > -+#include <plat/omap-pm.h> > -+ > -+#include <mach/hardware.h> > -+ > -+#define VERY_HI_RATE 900000000 > -+ > -+static struct cpufreq_frequency_table *freq_table; > -+static struct clk *mpu_clk; > -+ > -+static int omap_verify_speed(struct cpufreq_policy *policy) > -+{ > -+ if (freq_table) > -+ return cpufreq_frequency_table_verify(policy, freq_table); > -+ > -+ if (policy->cpu) > -+ return -EINVAL; > -+ > -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -+ policy->cpuinfo.max_freq); > -+ > -+ policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; > -+ policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; > -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -+ policy->cpuinfo.max_freq); > -+ return 0; > -+} > -+ > -+static unsigned int omap_getspeed(unsigned int cpu) > -+{ > -+ unsigned long rate; > -+ > -+ if (cpu) > -+ return 0; > -+ > -+ rate = clk_get_rate(mpu_clk) / 1000; > -+ return rate; > -+} > -+ > -+static int omap_target(struct cpufreq_policy *policy, > -+ unsigned int target_freq, > -+ unsigned int relation) > -+{ > -+ struct cpufreq_freqs freqs; > -+ int ret = 0; > -+ > -+ /* Ensure desired rate is within allowed range. Some govenors > -+ * (ondemand) will just pass target_freq=0 to get the minimum. */ > -+ if (target_freq < policy->min) > -+ target_freq = policy->min; > -+ if (target_freq > policy->max) > -+ target_freq = policy->max; > -+ > -+ freqs.old = omap_getspeed(0); > -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > -+ freqs.cpu = 0; > -+ > -+ if (freqs.old == freqs.new) > -+ return ret; > -+ > -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ > -+#ifdef CONFIG_CPU_FREQ_DEBUG > -+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); > -+#endif > -+ ret = clk_set_rate(mpu_clk, freqs.new * 1000); > -+ > -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+ > -+ return ret; > -+} > -+ > -+static int __init omap_cpu_init(struct cpufreq_policy *policy) > -+{ > -+ int result = 0; > -+ > -+ mpu_clk = clk_get(NULL, "mpu"); > -+ if (IS_ERR(mpu_clk)) > -+ return PTR_ERR(mpu_clk); > -+ > -+ if (policy->cpu != 0) > -+ return -EINVAL; > -+ > -+ policy->cur = policy->min = policy->max = omap_getspeed(0); > -+ > -+ clk_init_cpufreq_table(&freq_table); > -+ > -+ if (freq_table) { > -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -+ if (!result) > -+ cpufreq_frequency_table_get_attr(freq_table, > -+ policy->cpu); > -+ } else { > -+ policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > -+ policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, > -+ VERY_HI_RATE) / > 1000; > -+ } > -+ > -+ policy->min = policy->cpuinfo.min_freq; > -+ policy->max = policy->cpuinfo.max_freq; > -+ policy->cur = omap_getspeed(0); > -+ > -+ /* FIXME: what's the actual transition time? */ > -+ policy->cpuinfo.transition_latency = 300 * 1000; > -+ > -+ return 0; > -+} > -+ > -+static int omap_cpu_exit(struct cpufreq_policy *policy) > -+{ > -+ clk_exit_cpufreq_table(&freq_table); > -+ clk_put(mpu_clk); > -+ return 0; > -+} > -+ > -+static struct freq_attr *omap_cpufreq_attr[] = { > -+ &cpufreq_freq_attr_scaling_available_freqs, > -+ NULL, > -+}; > -+ > -+static struct cpufreq_driver omap_driver = { > -+ .flags = CPUFREQ_STICKY, > -+ .verify = omap_verify_speed, > -+ .target = omap_target, > -+ .get = omap_getspeed, > -+ .init = omap_cpu_init, > -+ .exit = omap_cpu_exit, > -+ .name = "omap1", > -+ .attr = omap_cpufreq_attr, > -+}; > -+ > -+static int __init omap_cpufreq_init(void) > -+{ > -+ return cpufreq_register_driver(&omap_driver); > -+} > -+ > -+static void __exit omap_cpufreq_exit(void) > -+{ > -+ cpufreq_unregister_driver(&omap_driver); > -+} > -+ > -+MODULE_DESCRIPTION("cpufreq driver for OMAP1 SOCs"); > -+MODULE_LICENSE("GPL"); > -+module_init(omap_cpufreq_init); > -+module_exit(omap_cpufreq_exit); > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index 8e79ca5..7927dd6 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -56,6 +56,9 @@ obj-$(CONFIG_ARCH_OMAP3) += > opp3xxx_data.o > - obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o > - endif > - > -+# CPUFREQ driver > -+obj-$(CONFIG_CPU_FREQ) += omap2plus-cpufreq.o > -+ > - # Power Management > - ifeq ($(CONFIG_PM),y) > - obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -new file mode 100644 > -index 0000000..27f641b > ---- /dev/null > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -0,0 +1,201 @@ > -+/* > -+ * OMAP2PLUS cpufreq driver > -+ * > -+ * CPU frequency scaling for OMAP > -+ * > -+ * Copyright (C) 2005 Nokia Corporation > -+ * Written by Tony Lindgren <tony@atomide.com> > -+ * > -+ * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King > -+ * > -+ * Copyright (C) 2007-2011 Texas Instruments, Inc. > -+ * Updated to support OMAP3 > -+ * Rajendra Nayak <rnayak@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+#include <linux/types.h> > -+#include <linux/kernel.h> > -+#include <linux/sched.h> > -+#include <linux/cpufreq.h> > -+#include <linux/delay.h> > -+#include <linux/init.h> > -+#include <linux/err.h> > -+#include <linux/clk.h> > -+#include <linux/io.h> > -+#include <linux/opp.h> > -+ > -+#include <asm/system.h> > -+#include <asm/smp_plat.h> > -+ > -+#include <plat/clock.h> > -+#include <plat/omap-pm.h> > -+#include <plat/common.h> > -+ > -+#include <mach/hardware.h> > -+ > -+#define VERY_HI_RATE 900000000 > -+ > -+static struct cpufreq_frequency_table *freq_table; > -+static struct clk *mpu_clk; > -+ > -+static int omap_verify_speed(struct cpufreq_policy *policy) > -+{ > -+ if (freq_table) > -+ return cpufreq_frequency_table_verify(policy, freq_table); > -+ > -+ if (policy->cpu) > -+ return -EINVAL; > -+ > -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -+ policy->cpuinfo.max_freq); > -+ > -+ policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; > -+ policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; > -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -+ policy->cpuinfo.max_freq); > -+ return 0; > -+} > -+ > -+static unsigned int omap_getspeed(unsigned int cpu) > -+{ > -+ unsigned long rate; > -+ > -+ if (cpu) > -+ return 0; > -+ > -+ rate = clk_get_rate(mpu_clk) / 1000; > -+ return rate; > -+} > -+ > -+static int omap_target(struct cpufreq_policy *policy, > -+ unsigned int target_freq, > -+ unsigned int relation) > -+{ > -+ int ret = 0; > -+ struct cpufreq_freqs freqs; > -+ > -+ /* Ensure desired rate is within allowed range. Some govenors > -+ * (ondemand) will just pass target_freq=0 to get the minimum. */ > -+ if (target_freq < policy->min) > -+ target_freq = policy->min; > -+ if (target_freq > policy->max) > -+ target_freq = policy->max; > -+ > -+ freqs.old = omap_getspeed(0); > -+ freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > -+ freqs.cpu = 0; > -+ > -+ if (freqs.old == freqs.new) > -+ return ret; > -+ > -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ > -+#ifdef CONFIG_CPU_FREQ_DEBUG > -+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); > -+#endif > -+ > -+ ret = clk_set_rate(mpu_clk, freqs.new * 1000); > -+ > -+ /* > -+ * Generic CPUFREQ driver jiffy update is under !SMP. So jiffies > -+ * won't get updated when UP machine cpufreq build with > -+ * CONFIG_SMP enabled. Below code is added only to manage that > -+ * scenario > -+ */ > -+ if (!is_smp()) > -+ loops_per_jiffy = > -+ cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); > -+ > -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+ > -+ return ret; > -+} > -+ > -+static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) > -+{ > -+ int result = 0; > -+ struct device *mpu_dev; > -+ > -+ if (cpu_is_omap24xx()) > -+ mpu_clk = clk_get(NULL, "virt_prcm_set"); > -+ else if (cpu_is_omap34xx()) > -+ mpu_clk = clk_get(NULL, "dpll1_ck"); > -+ else if (cpu_is_omap34xx()) > -+ mpu_clk = clk_get(NULL, "dpll_mpu_ck"); > -+ > -+ if (IS_ERR(mpu_clk)) > -+ return PTR_ERR(mpu_clk); > -+ > -+ if (policy->cpu != 0) > -+ return -EINVAL; > -+ > -+ policy->cur = policy->min = policy->max = omap_getspeed(0); > -+ > -+ mpu_dev = omap2_get_mpuss_device(); > -+ if (!mpu_dev) { > -+ pr_warning("%s: unable to get the mpu device\n", __func__); > -+ return -EINVAL; > -+ } > -+ opp_init_cpufreq_table(mpu_dev, &freq_table); > -+ > -+ if (freq_table) { > -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -+ if (!result) > -+ cpufreq_frequency_table_get_attr(freq_table, > -+ policy->cpu); > -+ } else { > -+ policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > -+ policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, > -+ VERY_HI_RATE) / > 1000; > -+ } > -+ > -+ policy->min = policy->cpuinfo.min_freq; > -+ policy->max = policy->cpuinfo.max_freq; > -+ policy->cur = omap_getspeed(0); > -+ > -+ /* FIXME: what's the actual transition time? */ > -+ policy->cpuinfo.transition_latency = 300 * 1000; > -+ > -+ return 0; > -+} > -+ > -+static int omap_cpu_exit(struct cpufreq_policy *policy) > -+{ > -+ clk_exit_cpufreq_table(&freq_table); > -+ clk_put(mpu_clk); > -+ return 0; > -+} > -+ > -+static struct freq_attr *omap_cpufreq_attr[] = { > -+ &cpufreq_freq_attr_scaling_available_freqs, > -+ NULL, > -+}; > -+ > -+static struct cpufreq_driver omap_driver = { > -+ .flags = CPUFREQ_STICKY, > -+ .verify = omap_verify_speed, > -+ .target = omap_target, > -+ .get = omap_getspeed, > -+ .init = omap_cpu_init, > -+ .exit = omap_cpu_exit, > -+ .name = "omap2plus", > -+ .attr = omap_cpufreq_attr, > -+}; > -+ > -+static int __init omap_cpufreq_init(void) > -+{ > -+ return cpufreq_register_driver(&omap_driver); > -+} > -+ > -+static void __exit omap_cpufreq_exit(void) > -+{ > -+ cpufreq_unregister_driver(&omap_driver); > -+} > -+ > -+MODULE_DESCRIPTION("cpufreq driver for OMAP2PLUS SOCs"); > -+MODULE_LICENSE("GPL"); > -+module_init(omap_cpufreq_init); > -+module_exit(omap_cpufreq_exit); > -diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile > -index f0233e6..4ef7493 100644 > ---- a/arch/arm/plat-omap/Makefile > -+++ b/arch/arm/plat-omap/Makefile > -@@ -21,7 +21,6 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o > - obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o > - obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o > - > --obj-$(CONFIG_CPU_FREQ) += cpu-omap.o > - obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o > - obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o > - obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o > -diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu- > omap.c > -deleted file mode 100644 > -index 9cd2709..0000000 > ---- a/arch/arm/plat-omap/cpu-omap.c > -+++ /dev/null > -@@ -1,204 +0,0 @@ > --/* > -- * linux/arch/arm/plat-omap/cpu-omap.c > -- * > -- * CPU frequency scaling for OMAP > -- * > -- * Copyright (C) 2005 Nokia Corporation > -- * Written by Tony Lindgren <tony@atomide.com> > -- * > -- * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King > -- * > -- * Copyright (C) 2007-2008 Texas Instruments, Inc. > -- * Updated to support OMAP3 > -- * Rajendra Nayak <rnayak@ti.com> > -- * > -- * This program is free software; you can redistribute it and/or modify > -- * it under the terms of the GNU General Public License version 2 as > -- * published by the Free Software Foundation. > -- */ > --#include <linux/types.h> > --#include <linux/kernel.h> > --#include <linux/sched.h> > --#include <linux/cpufreq.h> > --#include <linux/delay.h> > --#include <linux/init.h> > --#include <linux/err.h> > --#include <linux/clk.h> > --#include <linux/io.h> > --#include <linux/opp.h> > -- > --#include <mach/hardware.h> > --#include <plat/clock.h> > --#include <asm/system.h> > -- > --#if defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > --#include <plat/omap-pm.h> > --#include <plat/common.h> > --#endif > -- > --#define VERY_HI_RATE 900000000 > -- > --static struct cpufreq_frequency_table *freq_table; > -- > --#ifdef CONFIG_ARCH_OMAP1 > --#define MPU_CLK "mpu" > --#elif defined(CONFIG_ARCH_OMAP3) > --#define MPU_CLK "arm_fck" > --#else > --#define MPU_CLK "virt_prcm_set" > --#endif > -- > --static struct clk *mpu_clk; > -- > --/* TODO: Add support for SDRAM timing changes */ > -- > --static int omap_verify_speed(struct cpufreq_policy *policy) > --{ > -- if (freq_table) > -- return cpufreq_frequency_table_verify(policy, freq_table); > -- > -- if (policy->cpu) > -- return -EINVAL; > -- > -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -- policy->cpuinfo.max_freq); > -- > -- policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; > -- policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; > -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -- policy->cpuinfo.max_freq); > -- return 0; > --} > -- > --static unsigned int omap_getspeed(unsigned int cpu) > --{ > -- unsigned long rate; > -- > -- if (cpu) > -- return 0; > -- > -- rate = clk_get_rate(mpu_clk) / 1000; > -- return rate; > --} > -- > --static int omap_target(struct cpufreq_policy *policy, > -- unsigned int target_freq, > -- unsigned int relation) > --{ > --#ifdef CONFIG_ARCH_OMAP1 > -- struct cpufreq_freqs freqs; > --#endif > --#if defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -- unsigned long freq; > -- struct device *mpu_dev = omap2_get_mpuss_device(); > --#endif > -- int ret = 0; > -- > -- /* Ensure desired rate is within allowed range. Some govenors > -- * (ondemand) will just pass target_freq=0 to get the minimum. */ > -- if (target_freq < policy->min) > -- target_freq = policy->min; > -- if (target_freq > policy->max) > -- target_freq = policy->max; > -- > --#ifdef CONFIG_ARCH_OMAP1 > -- freqs.old = omap_getspeed(0); > -- freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > -- freqs.cpu = 0; > -- > -- if (freqs.old == freqs.new) > -- return ret; > -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > --#ifdef CONFIG_CPU_FREQ_DEBUG > -- printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", > -- freqs.old, freqs.new); > --#endif > -- ret = clk_set_rate(mpu_clk, freqs.new * 1000); > -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > --#elif defined(CONFIG_ARCH_OMAP3) && > !defined(CONFIG_OMAP_PM_NONE) > -- freq = target_freq * 1000; > -- if (opp_find_freq_ceil(mpu_dev, &freq)) > -- omap_pm_cpu_set_freq(freq); > --#endif > -- return ret; > --} > -- > --static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) > --{ > -- int result = 0; > -- > -- mpu_clk = clk_get(NULL, MPU_CLK); > -- if (IS_ERR(mpu_clk)) > -- return PTR_ERR(mpu_clk); > -- > -- if (policy->cpu != 0) > -- return -EINVAL; > -- > -- policy->cur = policy->min = policy->max = omap_getspeed(0); > -- > -- if (!cpu_is_omap34xx()) { > -- clk_init_cpufreq_table(&freq_table); > -- } else { > -- struct device *mpu_dev = omap2_get_mpuss_device(); > -- > -- opp_init_cpufreq_table(mpu_dev, &freq_table); > -- } > -- > -- if (freq_table) { > -- result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -- if (!result) > -- cpufreq_frequency_table_get_attr(freq_table, > -- policy->cpu); > -- } else { > -- policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > -- policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, > -- VERY_HI_RATE) / > 1000; > -- } > -- > -- policy->min = policy->cpuinfo.min_freq; > -- policy->max = policy->cpuinfo.max_freq; > -- policy->cur = omap_getspeed(0); > -- > -- /* FIXME: what's the actual transition time? */ > -- policy->cpuinfo.transition_latency = 300 * 1000; > -- > -- return 0; > --} > -- > --static int omap_cpu_exit(struct cpufreq_policy *policy) > --{ > -- clk_exit_cpufreq_table(&freq_table); > -- clk_put(mpu_clk); > -- return 0; > --} > -- > --static struct freq_attr *omap_cpufreq_attr[] = { > -- &cpufreq_freq_attr_scaling_available_freqs, > -- NULL, > --}; > -- > --static struct cpufreq_driver omap_driver = { > -- .flags = CPUFREQ_STICKY, > -- .verify = omap_verify_speed, > -- .target = omap_target, > -- .get = omap_getspeed, > -- .init = omap_cpu_init, > -- .exit = omap_cpu_exit, > -- .name = "omap", > -- .attr = omap_cpufreq_attr, > --}; > -- > --static int __init omap_cpufreq_init(void) > --{ > -- return cpufreq_register_driver(&omap_driver); > --} > -- > --late_initcall(omap_cpufreq_init); > -- > --/* > -- * if ever we want to remove this, upon cleanup call: > -- * > -- * cpufreq_unregister_driver() > -- * cpufreq_frequency_table_put_attr() > -- */ > -- > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS- > cpufreq-Add-SMP-support-to-cater-OMAP4430.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP- > support-to-cater-OMAP4430.patch > deleted file mode 100644 > index a152c7f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS- > cpufreq-Add-SMP-support-to-cater-OMAP4430.patch > +++ /dev/null > @@ -1,171 +0,0 @@ > -From fed2c5a3d929204d4fc18c6f4a3edbf920e7ee36 Mon Sep 17 00:00:00 > 2001 > -From: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Date: Mon, 14 Mar 2011 17:08:49 +0530 > -Subject: [PATCH 08/19] OMAP2PLUS: cpufreq: Add SMP support to cater > OMAP4430 > - > -On OMAP SMP configuartion, both processors share the voltage > -and clock. So both CPUs needs to be scaled together and hence > -needs software co-ordination. > - > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Cc: Kevin Hilman <khilman@ti.com> > -cc: Vishwanath BS <vishwanath.bs@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 73 > ++++++++++++++++++++++++++----- > - 1 files changed, 62 insertions(+), 11 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 27f641b..3730f96 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -26,9 +26,11 @@ > - #include <linux/clk.h> > - #include <linux/io.h> > - #include <linux/opp.h> > -+#include <linux/cpu.h> > - > - #include <asm/system.h> > - #include <asm/smp_plat.h> > -+#include <asm/cpu.h> > - > - #include <plat/clock.h> > - #include <plat/omap-pm.h> > -@@ -63,7 +65,7 @@ static unsigned int omap_getspeed(unsigned int cpu) > - { > - unsigned long rate; > - > -- if (cpu) > -+ if (cpu >= NR_CPUS) > - return 0; > - > - rate = clk_get_rate(mpu_clk) / 1000; > -@@ -74,9 +76,13 @@ static int omap_target(struct cpufreq_policy *policy, > - unsigned int target_freq, > - unsigned int relation) > - { > -- int ret = 0; > -+ int i, ret = 0; > - struct cpufreq_freqs freqs; > - > -+ /* Changes not allowed until all CPUs are online */ > -+ if (is_smp() && (num_online_cpus() < NR_CPUS)) > -+ return ret; > -+ > - /* Ensure desired rate is within allowed range. Some govenors > - * (ondemand) will just pass target_freq=0 to get the minimum. */ > - if (target_freq < policy->min) > -@@ -84,15 +90,25 @@ static int omap_target(struct cpufreq_policy *policy, > - if (target_freq > policy->max) > - target_freq = policy->max; > - > -- freqs.old = omap_getspeed(0); > -+ freqs.old = omap_getspeed(policy->cpu); > - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > -- freqs.cpu = 0; > -+ freqs.cpu = policy->cpu; > - > - if (freqs.old == freqs.new) > - return ret; > - > -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ if (!is_smp()) { > -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ goto set_freq; > -+ } > -+ > -+ /* notifiers */ > -+ for_each_cpu(i, policy->cpus) { > -+ freqs.cpu = i; > -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -+ } > - > -+set_freq: > - #ifdef CONFIG_CPU_FREQ_DEBUG > - pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); > - #endif > -@@ -105,12 +121,33 @@ static int omap_target(struct cpufreq_policy > *policy, > - * CONFIG_SMP enabled. Below code is added only to manage that > - * scenario > - */ > -- if (!is_smp()) > -+ freqs.new = omap_getspeed(policy->cpu); > -+ if (!is_smp()) { > - loops_per_jiffy = > - cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); > -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+ goto skip_lpj; > -+ } > - > -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+#ifdef CONFIG_SMP > -+ /* > -+ * Note that loops_per_jiffy is not updated on SMP systems in > -+ * cpufreq driver. So, update the per-CPU loops_per_jiffy value > -+ * on frequency transition. We need to update all dependent CPUs. > -+ */ > -+ for_each_cpu(i, policy->cpus) > -+ per_cpu(cpu_data, i).loops_per_jiffy = > -+ cpufreq_scale(per_cpu(cpu_data, i).loops_per_jiffy, > -+ freqs.old, freqs.new); > -+#endif > - > -+ /* notifiers */ > -+ for_each_cpu(i, policy->cpus) { > -+ freqs.cpu = i; > -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -+ } > -+ > -+skip_lpj: > - return ret; > - } > - > -@@ -118,6 +155,7 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - { > - int result = 0; > - struct device *mpu_dev; > -+ static cpumask_var_t cpumask; > - > - if (cpu_is_omap24xx()) > - mpu_clk = clk_get(NULL, "virt_prcm_set"); > -@@ -129,12 +167,12 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - if (IS_ERR(mpu_clk)) > - return PTR_ERR(mpu_clk); > - > -- if (policy->cpu != 0) > -+ if (policy->cpu >= NR_CPUS) > - return -EINVAL; > - > -- policy->cur = policy->min = policy->max = omap_getspeed(0); > -- > -+ policy->cur = policy->min = policy->max = omap_getspeed(policy- > >cpu); > - mpu_dev = omap2_get_mpuss_device(); > -+ > - if (!mpu_dev) { > - pr_warning("%s: unable to get the mpu device\n", __func__); > - return -EINVAL; > -@@ -154,7 +192,20 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - > - policy->min = policy->cpuinfo.min_freq; > - policy->max = policy->cpuinfo.max_freq; > -- policy->cur = omap_getspeed(0); > -+ policy->cur = omap_getspeed(policy->cpu); > -+ > -+ /* > -+ * On OMAP SMP configuartion, both processors share the voltage > -+ * and clock. So both CPUs needs to be scaled together and hence > -+ * needs software co-ordination. Use cpufreq affected_cpus > -+ * interface to handle this scenario. Additional is_smp() check > -+ * is to keep SMP_ON_UP build working. > -+ */ > -+ if (is_smp()) { > -+ policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; > -+ cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask); > -+ cpumask_copy(policy->cpus, cpumask); > -+ } > - > - /* FIXME: what's the actual transition time? */ > - policy->cpuinfo.transition_latency = 300 * 1000; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS- > cpufreq-Fix-typo-when-attempting-to-set-mp.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo- > when-attempting-to-set-mp.patch > deleted file mode 100644 > index c8328b2..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS- > cpufreq-Fix-typo-when-attempting-to-set-mp.patch > +++ /dev/null > @@ -1,30 +0,0 @@ > -From d046bd12930aa5daf951d9af8614c60677c8ff15 Mon Sep 17 00:00:00 > 2001 > -From: Jarkko Nikula <jhnikula@gmail.com> > -Date: Thu, 14 Apr 2011 16:21:58 +0300 > -Subject: [PATCH 09/19] OMAP2PLUS: cpufreq: Fix typo when attempting to set > mpu_clk for OMAP4 > - > -Fix this typo as there is no dpll_mpu_ck for OMAP3 and code flow is clearly > -trying to set mpu_clk for OMAP4 for which this dpll_mpu_ck is available. > - > -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 3730f96..a725d90 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -161,7 +161,7 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - mpu_clk = clk_get(NULL, "virt_prcm_set"); > - else if (cpu_is_omap34xx()) > - mpu_clk = clk_get(NULL, "dpll1_ck"); > -- else if (cpu_is_omap34xx()) > -+ else if (cpu_is_omap44xx()) > - mpu_clk = clk_get(NULL, "dpll_mpu_ck"); > - > - if (IS_ERR(mpu_clk)) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0010-OMAP2- > cpufreq-move-clk-name-decision-to-init.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to- > init.patch > deleted file mode 100644 > index d1c1ea5..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0010-OMAP2-cpufreq- > move-clk-name-decision-to-init.patch > +++ /dev/null > @@ -1,64 +0,0 @@ > -From 0ec2aee24f701ecd6135dce0b3f1a71249583689 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 25 May 2011 16:38:46 -0700 > -Subject: [PATCH 10/19] OMAP2+: cpufreq: move clk name decision to init > - > -Clk name does'nt need to dynamically detected during clk init. > -move them off to driver initialization, if we dont have a clk name, > -there is no point in registering the driver anyways. The actual clk > -get and put is left at cpu_init and exit functions. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 20 +++++++++++++------- > - 1 files changed, 13 insertions(+), 7 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index a725d90..c46d0cd 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -42,6 +42,7 @@ > - > - static struct cpufreq_frequency_table *freq_table; > - static struct clk *mpu_clk; > -+static char *mpu_clk_name; > - > - static int omap_verify_speed(struct cpufreq_policy *policy) > - { > -@@ -157,13 +158,7 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - struct device *mpu_dev; > - static cpumask_var_t cpumask; > - > -- if (cpu_is_omap24xx()) > -- mpu_clk = clk_get(NULL, "virt_prcm_set"); > -- else if (cpu_is_omap34xx()) > -- mpu_clk = clk_get(NULL, "dpll1_ck"); > -- else if (cpu_is_omap44xx()) > -- mpu_clk = clk_get(NULL, "dpll_mpu_ck"); > -- > -+ mpu_clk = clk_get(NULL, mpu_clk_name); > - if (IS_ERR(mpu_clk)) > - return PTR_ERR(mpu_clk); > - > -@@ -238,6 +233,17 @@ static struct cpufreq_driver omap_driver = { > - > - static int __init omap_cpufreq_init(void) > - { > -+ if (cpu_is_omap24xx()) > -+ mpu_clk_name = "virt_prcm_set"; > -+ else if (cpu_is_omap34xx()) > -+ mpu_clk_name = "dpll1_ck"; > -+ else if (cpu_is_omap44xx()) > -+ mpu_clk_name = "dpll_mpu_ck"; > -+ > -+ if (!mpu_clk_name) { > -+ pr_err("%s: unsupported Silicon?\n", __func__); > -+ return -EINVAL; > -+ } > - return cpufreq_register_driver(&omap_driver); > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0011-OMAP2- > cpufreq-deny-initialization-if-no-mpudev.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no- > mpudev.patch > deleted file mode 100644 > index b37c004..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0011-OMAP2-cpufreq- > deny-initialization-if-no-mpudev.patch > +++ /dev/null > @@ -1,64 +0,0 @@ > -From 7c76e002041cd5b084c9a8b6729ab33acf53643e Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 25 May 2011 16:38:47 -0700 > -Subject: [PATCH 11/19] OMAP2+: cpufreq: deny initialization if no mpudev > - > -if we do not have mpu_dev we normally fail in cpu_init. It is better > -to fail driver registration if the devices are not available. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 15 ++++++++------- > - 1 files changed, 8 insertions(+), 7 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index c46d0cd..33a91ec 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -43,6 +43,7 @@ > - static struct cpufreq_frequency_table *freq_table; > - static struct clk *mpu_clk; > - static char *mpu_clk_name; > -+static struct device *mpu_dev; > - > - static int omap_verify_speed(struct cpufreq_policy *policy) > - { > -@@ -155,7 +156,6 @@ skip_lpj: > - static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) > - { > - int result = 0; > -- struct device *mpu_dev; > - static cpumask_var_t cpumask; > - > - mpu_clk = clk_get(NULL, mpu_clk_name); > -@@ -166,12 +166,6 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - return -EINVAL; > - > - policy->cur = policy->min = policy->max = omap_getspeed(policy- > >cpu); > -- mpu_dev = omap2_get_mpuss_device(); > -- > -- if (!mpu_dev) { > -- pr_warning("%s: unable to get the mpu device\n", __func__); > -- return -EINVAL; > -- } > - opp_init_cpufreq_table(mpu_dev, &freq_table); > - > - if (freq_table) { > -@@ -244,6 +238,13 @@ static int __init omap_cpufreq_init(void) > - pr_err("%s: unsupported Silicon?\n", __func__); > - return -EINVAL; > - } > -+ > -+ mpu_dev = omap2_get_mpuss_device(); > -+ if (!mpu_dev) { > -+ pr_warning("%s: unable to get the mpu device\n", __func__); > -+ return -EINVAL; > -+ } > -+ > - return cpufreq_register_driver(&omap_driver); > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0012-OMAP2- > cpufreq-dont-support-freq_table.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch > deleted file mode 100644 > index 33ffe54..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0012-OMAP2-cpufreq- > dont-support-freq_table.patch > +++ /dev/null > @@ -1,129 +0,0 @@ > -From 407f4d9ed824d458406f139a7698c74a1eb3b8f7 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Thu, 26 May 2011 19:39:17 -0700 > -Subject: [PATCH 12/19] OMAP2+: cpufreq: dont support !freq_table > - > -OMAP2+ all have frequency tables, hence the hacks we had for older > -silicon do not need to be carried forward. As part of this change, > -use cpufreq_frequency_table_target to find the best match for > -frequency requested. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 67 +++++++++++++++-------- > -------- > - 1 files changed, 33 insertions(+), 34 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 33a91ec..acf18e8 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -38,8 +38,6 @@ > - > - #include <mach/hardware.h> > - > --#define VERY_HI_RATE 900000000 > -- > - static struct cpufreq_frequency_table *freq_table; > - static struct clk *mpu_clk; > - static char *mpu_clk_name; > -@@ -47,20 +45,9 @@ static struct device *mpu_dev; > - > - static int omap_verify_speed(struct cpufreq_policy *policy) > - { > -- if (freq_table) > -- return cpufreq_frequency_table_verify(policy, freq_table); > -- > -- if (policy->cpu) > -+ if (!freq_table) > - return -EINVAL; > -- > -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -- policy->cpuinfo.max_freq); > -- > -- policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; > -- policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; > -- cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, > -- policy->cpuinfo.max_freq); > -- return 0; > -+ return cpufreq_frequency_table_verify(policy, freq_table); > - } > - > - static unsigned int omap_getspeed(unsigned int cpu) > -@@ -78,22 +65,35 @@ static int omap_target(struct cpufreq_policy *policy, > - unsigned int target_freq, > - unsigned int relation) > - { > -- int i, ret = 0; > -+ unsigned int i; > -+ int ret = 0; > - struct cpufreq_freqs freqs; > - > - /* Changes not allowed until all CPUs are online */ > - if (is_smp() && (num_online_cpus() < NR_CPUS)) > - return ret; > - > -- /* Ensure desired rate is within allowed range. Some govenors > -- * (ondemand) will just pass target_freq=0 to get the minimum. */ > -- if (target_freq < policy->min) > -- target_freq = policy->min; > -- if (target_freq > policy->max) > -- target_freq = policy->max; > -+ if (!freq_table) { > -+ dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, > -+ policy->cpu); > -+ return -EINVAL; > -+ } > -+ > -+ ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, > -+ relation, &i); > -+ if (ret) { > -+ dev_dbg(mpu_dev, "%s: cpu%d: no freq match for > %d(ret=%d)\n", > -+ __func__, policy->cpu, target_freq, ret); > -+ return ret; > -+ } > -+ freqs.new = freq_table[i].frequency; > -+ if (!freqs.new) { > -+ dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", > __func__, > -+ policy->cpu, target_freq); > -+ return -EINVAL; > -+ } > - > - freqs.old = omap_getspeed(policy->cpu); > -- freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; > - freqs.cpu = policy->cpu; > - > - if (freqs.old == freqs.new) > -@@ -166,19 +166,18 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - return -EINVAL; > - > - policy->cur = policy->min = policy->max = omap_getspeed(policy- > >cpu); > -- opp_init_cpufreq_table(mpu_dev, &freq_table); > -- > -- if (freq_table) { > -- result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -- if (!result) > -- cpufreq_frequency_table_get_attr(freq_table, > -- policy->cpu); > -- } else { > -- policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / > 1000; > -- policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, > -- VERY_HI_RATE) / > 1000; > -+ result = opp_init_cpufreq_table(mpu_dev, &freq_table); > -+ > -+ if (result) { > -+ dev_err(mpu_dev, "%s: cpu%d: failed creating freq > table[%d]\n", > -+ __func__, policy->cpu, result); > -+ return result; > - } > - > -+ result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -+ if (!result) > -+ cpufreq_frequency_table_get_attr(freq_table, policy->cpu); > -+ > - policy->min = policy->cpuinfo.min_freq; > - policy->max = policy->cpuinfo.max_freq; > - policy->cur = omap_getspeed(policy->cpu); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0013-OMAP2- > cpufreq-only-supports-OPP-library.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch > deleted file mode 100644 > index d5db432..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0013-OMAP2-cpufreq- > only-supports-OPP-library.patch > +++ /dev/null > @@ -1,46 +0,0 @@ > -From 525df87add27c07a76e06c45f0756b204a5a3880 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Thu, 26 May 2011 19:39:18 -0700 > -Subject: [PATCH 13/19] OMAP2+: cpufreq: only supports OPP library > - > -OMAP2 is the only family using clk_[init|exit]_cpufreq_table, however, > -the cpufreq code does not currently use clk_init_cpufreq_table. As a > -result, it is unusuable for OMAP2 and only usable only on platforms > -using OPP library. > - > -Remove the unbalanced clk_exit_cpufreq_table(). Any platforms where > -OPPs are not availble will fail on init because a freq table will not > -be properly initialized. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -[khilman@ti.com: changelog edits, and graceful failure mode changes] > -Acked-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 3 +-- > - 1 files changed, 1 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index acf18e8..3af7cda 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -1,7 +1,7 @@ > - /* > - * OMAP2PLUS cpufreq driver > - * > -- * CPU frequency scaling for OMAP > -+ * CPU frequency scaling for OMAP using OPP information > - * > - * Copyright (C) 2005 Nokia Corporation > - * Written by Tony Lindgren <tony@atomide.com> > -@@ -203,7 +203,6 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - > - static int omap_cpu_exit(struct cpufreq_policy *policy) > - { > -- clk_exit_cpufreq_table(&freq_table); > - clk_put(mpu_clk); > - return 0; > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0014-OMAP2- > cpufreq-put-clk-if-cpu_init-failed.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch > deleted file mode 100644 > index 709a555..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0014-OMAP2-cpufreq- > put-clk-if-cpu_init-failed.patch > +++ /dev/null > @@ -1,61 +0,0 @@ > -From b0f40f6545e9ae32b6cbd2cb03561de805297bf5 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Thu, 26 May 2011 19:39:19 -0700 > -Subject: [PATCH 14/19] OMAP2+: cpufreq: put clk if cpu_init failed > - > -Release the mpu_clk in fail paths. > - > -Reported-by: Todd Poynor <toddpoynor@google.com> > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 14 +++++++++++--- > - 1 files changed, 11 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 3af7cda..e019297 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -162,8 +162,10 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - if (IS_ERR(mpu_clk)) > - return PTR_ERR(mpu_clk); > - > -- if (policy->cpu >= NR_CPUS) > -- return -EINVAL; > -+ if (policy->cpu >= NR_CPUS) { > -+ result = -EINVAL; > -+ goto fail_ck; > -+ } > - > - policy->cur = policy->min = policy->max = omap_getspeed(policy- > >cpu); > - result = opp_init_cpufreq_table(mpu_dev, &freq_table); > -@@ -171,12 +173,14 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - if (result) { > - dev_err(mpu_dev, "%s: cpu%d: failed creating freq > table[%d]\n", > - __func__, policy->cpu, result); > -- return result; > -+ goto fail_ck; > - } > - > - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > - if (!result) > - cpufreq_frequency_table_get_attr(freq_table, policy->cpu); > -+ else > -+ goto fail_ck; > - > - policy->min = policy->cpuinfo.min_freq; > - policy->max = policy->cpuinfo.max_freq; > -@@ -199,6 +203,10 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - policy->cpuinfo.transition_latency = 300 * 1000; > - > - return 0; > -+ > -+fail_ck: > -+ clk_put(mpu_clk); > -+ return result; > - } > - > - static int omap_cpu_exit(struct cpufreq_policy *policy) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0015-OMAP2- > cpufreq-fix-freq_table-leak.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch > deleted file mode 100644 > index a1080e6..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0015-OMAP2-cpufreq-fix- > freq_table-leak.patch > +++ /dev/null > @@ -1,90 +0,0 @@ > -From 67324a92ca4778fb6be86058c91ac7c9442ede16 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Thu, 26 May 2011 19:39:20 -0700 > -Subject: [PATCH 15/19] OMAP2+: cpufreq: fix freq_table leak > - > -We use a single frequency table for multiple CPUs. But, with > -OMAP4, since we have multiple CPUs, the cpu_init call for CPU1 > -causes freq_table previously allocated for CPU0 to be overwritten. > -In addition, we dont free the table on exit path. > - > -We solve this by maintaining an atomic type counter to ensure > -just a single table exists at a given time. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 22 +++++++++++++++++----- > - 1 files changed, 17 insertions(+), 5 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index e019297..a962a31 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -39,6 +39,7 @@ > - #include <mach/hardware.h> > - > - static struct cpufreq_frequency_table *freq_table; > -+static atomic_t freq_table_users = ATOMIC_INIT(0); > - static struct clk *mpu_clk; > - static char *mpu_clk_name; > - static struct device *mpu_dev; > -@@ -153,6 +154,12 @@ skip_lpj: > - return ret; > - } > - > -+static inline void freq_table_free(void) > -+{ > -+ if (atomic_dec_and_test(&freq_table_users)) > -+ opp_free_cpufreq_table(mpu_dev, &freq_table); > -+} > -+ > - static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) > - { > - int result = 0; > -@@ -168,7 +175,9 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - } > - > - policy->cur = policy->min = policy->max = omap_getspeed(policy- > >cpu); > -- result = opp_init_cpufreq_table(mpu_dev, &freq_table); > -+ > -+ if (atomic_inc_return(&freq_table_users) == 1) > -+ result = opp_init_cpufreq_table(mpu_dev, &freq_table); > - > - if (result) { > - dev_err(mpu_dev, "%s: cpu%d: failed creating freq > table[%d]\n", > -@@ -177,10 +186,10 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - } > - > - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); > -- if (!result) > -- cpufreq_frequency_table_get_attr(freq_table, policy->cpu); > -- else > -- goto fail_ck; > -+ if (result) > -+ goto fail_table; > -+ > -+ cpufreq_frequency_table_get_attr(freq_table, policy->cpu); > - > - policy->min = policy->cpuinfo.min_freq; > - policy->max = policy->cpuinfo.max_freq; > -@@ -204,6 +213,8 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - > - return 0; > - > -+fail_table: > -+ freq_table_free(); > - fail_ck: > - clk_put(mpu_clk); > - return result; > -@@ -211,6 +222,7 @@ fail_ck: > - > - static int omap_cpu_exit(struct cpufreq_policy *policy) > - { > -+ freq_table_free(); > - clk_put(mpu_clk); > - return 0; > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2- > CPUfreq-Remove-superfluous-check-in-target-for.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove- > superfluous-check-in-target-for.patch > deleted file mode 100644 > index 2451a21..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2-CPUfreq- > Remove-superfluous-check-in-target-for.patch > +++ /dev/null > @@ -1,58 +0,0 @@ > -From f0e647da78b80946ab301787aba4330bd7d1429d Mon Sep 17 00:00:00 > 2001 > -From: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Date: Fri, 3 Jun 2011 17:46:57 +0530 > -Subject: [PATCH 16/19] OMAP2+: CPUfreq: Remove superfluous check in > target() for online CPU's. > - > -Current OMAP2PLUS CPUfreq tagret() functions returns when all > -the CPU's are not online. This breaks CPUfreq when secondary CPUs > -are offlined on SMP system. > - > -The intention of that check was just avoid CPU frequency change > -during the window when CPU becomes online but it's cpufreq_init is > -not done yet. Otherwise it can lead to notifiers being sent on > -a CPU which is not yet registered to the governor. > - > -But this race conditions is already managed by the CPUfreq > -core driver by updating the available cpumask accordingly. > - > -OMAP CPUFReq driver make use same cpumask for the notifiers > -so the above problem doesn't exist. In my initial implementation > -of the OMAP4 CPUFreq driver, I was using 'for_each_online_cpu()' > -for notifiers which lead me to add that check. Later I fixed > -the notifies but didn't realise that the check has become > -redundant then. > - > -Fix it by removing the superfluous check in target(). > - > -Thanks for Nishant Menon <nm@ti.com> for reporting issue > -with hot-plug and Kevin Hilman <khilman@ti.com> for his > -comment on excessive check in target(). > - > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Reported-by: Nishanth Menon <nm@ti.com> > -Tested-by: Vishwanath BS <vishwanath.bs@ti.com> > -Cc: Kevin Hilman <khilman@ti.com> > -Tested-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 4 ---- > - 1 files changed, 0 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index a962a31..eaefa49 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -70,10 +70,6 @@ static int omap_target(struct cpufreq_policy *policy, > - int ret = 0; > - struct cpufreq_freqs freqs; > - > -- /* Changes not allowed until all CPUs are online */ > -- if (is_smp() && (num_online_cpus() < NR_CPUS)) > -- return ret; > -- > - if (!freq_table) { > - dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, > - policy->cpu); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2- > cpufreq-notify-even-with-bad-boot-frequency.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even- > with-bad-boot-frequency.patch > deleted file mode 100644 > index b5e9734..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2-cpufreq- > notify-even-with-bad-boot-frequency.patch > +++ /dev/null > @@ -1,48 +0,0 @@ > -From 669ad0bf5d48d8675365a212f561f57bec4d9158 Mon Sep 17 00:00:00 > 2001 > -From: Colin Cross <ccross@google.com> > -Date: Mon, 6 Jun 2011 21:05:29 -0500 > -Subject: [PATCH 17/19] OMAP2+: cpufreq: notify even with bad boot > frequency > - > -Sometimes, bootloaders starts up with a frequency which is not > -in the OPP table. At cpu_init, policy->cur contains the frequency > -we pick at boot. It is possible that system might have fixed > -it's boot frequency later on as part of power initialization. > -After this condition, the first call to omap_target results in the > -following: > - > -omap_getspeed(actual device frequency) != policy->cur(frequency that > -cpufreq thinks that the system is at), and it is possible that > -freqs.old == freqs.new (because the governor requested a scale down). > - > -We exit without triggering the notifiers in the current code, which > -does'nt let code which depends on cpufreq_notify_transition to have > -accurate information as to what the system frequency is. > - > -Instead, we do a normal transition if policy->cur is wrong, then, > -freqs.old will be the actual cpu frequency, freqs.new will be the > -actual new cpu frequency and all required notifiers have the accurate > -information. > - > -Acked-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Colin Cross <ccross@google.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index eaefa49..8598928 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -93,7 +93,7 @@ static int omap_target(struct cpufreq_policy *policy, > - freqs.old = omap_getspeed(policy->cpu); > - freqs.cpu = policy->cpu; > - > -- if (freqs.old == freqs.new) > -+ if (freqs.old == freqs.new && policy->cur == freqs.new) > - return ret; > - > - if (!is_smp()) { > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2- > cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs- > in-shared-policy-mask.patch > deleted file mode 100644 > index 923e22f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2-cpufreq- > Enable-all-CPUs-in-shared-policy-mask.patch > +++ /dev/null > @@ -1,42 +0,0 @@ > -From 0d8c6a265f29587ab9c6df1c6bebe359a8d71d09 Mon Sep 17 00:00:00 > 2001 > -From: Todd Poynor <toddpoynor@google.com> > -Date: Tue, 7 Jun 2011 13:57:52 -0700 > -Subject: [PATCH 18/19] OMAP2+: cpufreq: Enable all CPUs in shared policy > mask > - > -Enable all CPUs in the shared policy in the CPU init callback. > -Otherwise, the governor CPUFREQ_GOV_START event is invoked with > -a policy that only includes the first CPU, leaving other CPUs > -uninitialized by the governor. > - > -Signed-off-by: Todd Poynor <toddpoynor@google.com> > -Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 4 +--- > - 1 files changed, 1 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 8598928..1f3b2e1 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -159,7 +159,6 @@ static inline void freq_table_free(void) > - static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) > - { > - int result = 0; > -- static cpumask_var_t cpumask; > - > - mpu_clk = clk_get(NULL, mpu_clk_name); > - if (IS_ERR(mpu_clk)) > -@@ -200,8 +199,7 @@ static int __cpuinit omap_cpu_init(struct > cpufreq_policy *policy) > - */ > - if (is_smp()) { > - policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; > -- cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask); > -- cpumask_copy(policy->cpus, cpumask); > -+ cpumask_setall(policy->cpus); > - } > - > - /* FIXME: what's the actual transition time? */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2- > CPUfreq-update-lpj-with-reference-value-to-avo.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with- > reference-value-to-avo.patch > deleted file mode 100644 > index 85666bc..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2-CPUfreq- > update-lpj-with-reference-value-to-avo.patch > +++ /dev/null > @@ -1,121 +0,0 @@ > -From 550f74e2915393426e15c8d12695707253c8a91d Mon Sep 17 00:00:00 > 2001 > -From: Russell King <rmk+kernel@arm.linux.org.uk> > -Date: Mon, 11 Jul 2011 23:10:04 +0530 > -Subject: [PATCH 19/19] OMAP2+: CPUfreq: update lpj with reference value to > avoid progressive error. > - > -Adjust _both_ the per-cpu loops_per_jiffy and global lpj. Calibrate them > -with with reference to the initial values to avoid a progressively > -bigger and bigger error in the value over time. > - > -While at this, re-use the notifiers for UP/SMP since on > -UP machine or UP_ON_SMP policy->cpus mask would contain only > -the boot CPU. > - > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -[santosh.shilimkar@ti.com: re-based against omap cpufreq > -upstream branch and fixed notifiers] > -Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> > -Cc: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/omap2plus-cpufreq.c | 50 ++++++++++++++++------ > -------- > - 1 files changed, 27 insertions(+), 23 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach- > omap2/omap2plus-cpufreq.c > -index 1f3b2e1..de82e87 100644 > ---- a/arch/arm/mach-omap2/omap2plus-cpufreq.c > -+++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c > -@@ -38,6 +38,16 @@ > - > - #include <mach/hardware.h> > - > -+#ifdef CONFIG_SMP > -+struct lpj_info { > -+ unsigned long ref; > -+ unsigned int freq; > -+}; > -+ > -+static DEFINE_PER_CPU(struct lpj_info, lpj_ref); > -+static struct lpj_info global_lpj_ref; > -+#endif > -+ > - static struct cpufreq_frequency_table *freq_table; > - static atomic_t freq_table_users = ATOMIC_INIT(0); > - static struct clk *mpu_clk; > -@@ -96,37 +106,18 @@ static int omap_target(struct cpufreq_policy *policy, > - if (freqs.old == freqs.new && policy->cur == freqs.new) > - return ret; > - > -- if (!is_smp()) { > -- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > -- goto set_freq; > -- } > -- > - /* notifiers */ > - for_each_cpu(i, policy->cpus) { > - freqs.cpu = i; > - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); > - } > - > --set_freq: > - #ifdef CONFIG_CPU_FREQ_DEBUG > - pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); > - #endif > - > - ret = clk_set_rate(mpu_clk, freqs.new * 1000); > -- > -- /* > -- * Generic CPUFREQ driver jiffy update is under !SMP. So jiffies > -- * won't get updated when UP machine cpufreq build with > -- * CONFIG_SMP enabled. Below code is added only to manage that > -- * scenario > -- */ > - freqs.new = omap_getspeed(policy->cpu); > -- if (!is_smp()) { > -- loops_per_jiffy = > -- cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); > -- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > -- goto skip_lpj; > -- } > - > - #ifdef CONFIG_SMP > - /* > -@@ -134,10 +125,24 @@ set_freq: > - * cpufreq driver. So, update the per-CPU loops_per_jiffy value > - * on frequency transition. We need to update all dependent CPUs. > - */ > -- for_each_cpu(i, policy->cpus) > -+ for_each_cpu(i, policy->cpus) { > -+ struct lpj_info *lpj = &per_cpu(lpj_ref, i); > -+ if (!lpj->freq) { > -+ lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; > -+ lpj->freq = freqs.old; > -+ } > -+ > - per_cpu(cpu_data, i).loops_per_jiffy = > -- cpufreq_scale(per_cpu(cpu_data, i).loops_per_jiffy, > -- freqs.old, freqs.new); > -+ cpufreq_scale(lpj->ref, lpj->freq, freqs.new); > -+ } > -+ > -+ /* And don't forget to adjust the global one */ > -+ if (!global_lpj_ref.freq) { > -+ global_lpj_ref.ref = loops_per_jiffy; > -+ global_lpj_ref.freq = freqs.old; > -+ } > -+ loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, > -+ freqs.new); > - #endif > - > - /* notifiers */ > -@@ -146,7 +151,6 @@ set_freq: > - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); > - } > - > --skip_lpj: > - return ret; > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0001-cleanup- > regulator-supply-definitions-in-mach-omap2.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach- > omap2.patch > deleted file mode 100644 > index e86ca6f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0001-cleanup-regulator- > supply-definitions-in-mach-omap2.patch > +++ /dev/null > @@ -1,1083 +0,0 @@ > -From d95bccb7d0ad132153543bcc018e8da8aba1832d Mon Sep 17 00:00:00 > 2001 > -From: Oleg Drokin <green@linuxhacker.ru> > -Date: Mon, 6 Jun 2011 18:57:07 +0000 > -Subject: [PATCH 001/149] cleanup regulator supply definitions in mach-omap2 > - > -to use REGULATOR_SUPPLY arrays. > - > -CC: Mark Brown <broonie@opensource.wolfsonmicro.com> > -CC: Mike Rapoport <mike@compulab.co.il> > -CC: Nishant Kamat <nskamat@ti.com> > -CC: Steve Sakoman <steve@sakoman.com> > -CC: Felipe Balbi <balbi@ti.com> > -CC: Santosh Shilimkar <santosh.shilimkar@ti.com> > -CC: peter.barada@logicpd.com > -Signed-off-by: Oleg Drokin <green@linuxhacker.ru> > -Acked-by: Felipe Balbi <balbi@ti.com> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/board-4430sdp.c | 13 ++---- > - arch/arm/mach-omap2/board-cm-t35.c | 34 +++++++------- > - arch/arm/mach-omap2/board-devkit8000.c | 28 ++++++----- > - arch/arm/mach-omap2/board-igep0020.c | 27 ++++++----- > - arch/arm/mach-omap2/board-ldp.c | 8 ++-- > - arch/arm/mach-omap2/board-omap3beagle.c | 25 +++++----- > - arch/arm/mach-omap2/board-omap3evm.c | 41 +++++++++-------- > - arch/arm/mach-omap2/board-omap3logic.c | 8 ++-- > - arch/arm/mach-omap2/board-omap3pandora.c | 63 ++++++++++++++---- > ------- > - arch/arm/mach-omap2/board-omap3stalker.c | 25 +++++----- > - arch/arm/mach-omap2/board-omap3touchbook.c | 32 +++++++------ > - arch/arm/mach-omap2/board-omap4panda.c | 16 +++---- > - arch/arm/mach-omap2/board-overo.c | 26 ++++++----- > - arch/arm/mach-omap2/board-rx51-peripherals.c | 29 +++++++----- > - arch/arm/mach-omap2/board-zoom-peripherals.c | 42 +++++++++--------- > - 15 files changed, 218 insertions(+), 199 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach- > omap2/board-4430sdp.c > -index 63de2d3..39a8062 100644 > ---- a/arch/arm/mach-omap2/board-4430sdp.c > -+++ b/arch/arm/mach-omap2/board-4430sdp.c > -@@ -333,16 +333,11 @@ static struct omap2_hsmmc_info mmc[] = { > - }; > - > - static struct regulator_consumer_supply sdp4430_vaux_supply[] = { > -- { > -- .supply = "vmmc", > -- .dev_name = "omap_hsmmc.1", > -- }, > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), > - }; > -+ > - static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { > -- { > -- .supply = "vmmc", > -- .dev_name = "omap_hsmmc.0", > -- }, > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > - static int omap4_twl6030_hsmmc_late_init(struct device *dev) > -@@ -399,7 +394,7 @@ static struct regulator_init_data sdp4430_vaux1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -+ .num_consumer_supplies = ARRAY_SIZE(sdp4430_vaux_supply), > - .consumer_supplies = sdp4430_vaux_supply, > - }; > - > -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach- > omap2/board-cm-t35.c > -index 77456de..e7bf32d 100644 > ---- a/arch/arm/mach-omap2/board-cm-t35.c > -+++ b/arch/arm/mach-omap2/board-cm-t35.c > -@@ -337,19 +337,21 @@ static void __init cm_t35_init_display(void) > - } > - } > - > --static struct regulator_consumer_supply cm_t35_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply cm_t35_vsim_supply = { > -- .supply = "vmmc_aux", > -+static struct regulator_consumer_supply cm_t35_vsim_supply[] = { > -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply cm_t35_vdac_supply = > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); > -+static struct regulator_consumer_supply cm_t35_vdac_supply[] = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > - > --static struct regulator_consumer_supply cm_t35_vdvi_supply = > -- REGULATOR_SUPPLY("vdvi", "omapdss"); > -+static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { > -+ REGULATOR_SUPPLY("vdvi", "omapdss"), > -+}; > - > - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max > 220 mA) */ > - static struct regulator_init_data cm_t35_vmmc1 = { > -@@ -362,8 +364,8 @@ static struct regulator_init_data cm_t35_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &cm_t35_vmmc1_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(cm_t35_vmmc1_supply), > -+ .consumer_supplies = cm_t35_vmmc1_supply, > - }; > - > - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ > -@@ -377,8 +379,8 @@ static struct regulator_init_data cm_t35_vsim = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &cm_t35_vsim_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply), > -+ .consumer_supplies = cm_t35_vsim_supply, > - }; > - > - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > -@@ -391,8 +393,8 @@ static struct regulator_init_data cm_t35_vdac = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &cm_t35_vdac_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply), > -+ .consumer_supplies = cm_t35_vdac_supply, > - }; > - > - /* VPLL2 for digital video outputs */ > -@@ -406,8 +408,8 @@ static struct regulator_init_data cm_t35_vpll2 = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &cm_t35_vdvi_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply), > -+ .consumer_supplies = cm_t35_vdvi_supply, > - }; > - > - static struct twl4030_usb_data cm_t35_usb_data = { > -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach- > omap2/board-devkit8000.c > -index 34956ec..ead9c1d 100644 > ---- a/arch/arm/mach-omap2/board-devkit8000.c > -+++ b/arch/arm/mach-omap2/board-devkit8000.c > -@@ -130,13 +130,14 @@ static void devkit8000_panel_disable_dvi(struct > omap_dss_device *dssdev) > - gpio_set_value_cansleep(dssdev->reset_gpio, 0); > - } > - > --static struct regulator_consumer_supply devkit8000_vmmc1_supply = > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); > -- > -+static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > -+}; > - > - /* ads7846 on SPI */ > --static struct regulator_consumer_supply devkit8000_vio_supply = > -- REGULATOR_SUPPLY("vcc", "spi2.0"); > -+static struct regulator_consumer_supply devkit8000_vio_supply[] = { > -+ REGULATOR_SUPPLY("vcc", "spi2.0"), > -+}; > - > - static struct panel_generic_dpi_data lcd_panel = { > - .name = "generic", > -@@ -186,8 +187,9 @@ static struct omap_dss_board_info > devkit8000_dss_data = { > - .default_device = &devkit8000_lcd_device, > - }; > - > --static struct regulator_consumer_supply devkit8000_vdda_dac_supply = > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); > -+static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > - > - static uint32_t board_keymap[] = { > - KEY(0, 0, KEY_1), > -@@ -284,8 +286,8 @@ static struct regulator_init_data devkit8000_vmmc1 = > { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &devkit8000_vmmc1_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(devkit8000_vmmc1_supply), > -+ .consumer_supplies = devkit8000_vmmc1_supply, > - }; > - > - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > -@@ -298,8 +300,8 @@ static struct regulator_init_data devkit8000_vdac = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &devkit8000_vdda_dac_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(devkit8000_vdda_dac_supply), > -+ .consumer_supplies = devkit8000_vdda_dac_supply, > - }; > - > - /* VPLL1 for digital video outputs */ > -@@ -327,8 +329,8 @@ static struct regulator_init_data devkit8000_vio = { > - .valid_ops_mask = REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &devkit8000_vio_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply), > -+ .consumer_supplies = devkit8000_vio_supply, > - }; > - > - static struct twl4030_usb_data devkit8000_usb_data = { > -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach- > omap2/board-igep0020.c > -index 0c1bfca..84d2846 100644 > ---- a/arch/arm/mach-omap2/board-igep0020.c > -+++ b/arch/arm/mach-omap2/board-igep0020.c > -@@ -222,8 +222,9 @@ static inline void __init igep2_init_smsc911x(void) > - static inline void __init igep2_init_smsc911x(void) { } > - #endif > - > --static struct regulator_consumer_supply igep_vmmc1_supply = > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); > -+static struct regulator_consumer_supply igep_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > -+}; > - > - /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ > - static struct regulator_init_data igep_vmmc1 = { > -@@ -236,12 +237,13 @@ static struct regulator_init_data igep_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &igep_vmmc1_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply), > -+ .consumer_supplies = igep_vmmc1_supply, > - }; > - > --static struct regulator_consumer_supply igep_vio_supply = > -- REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); > -+static struct regulator_consumer_supply igep_vio_supply[] = { > -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), > -+}; > - > - static struct regulator_init_data igep_vio = { > - .constraints = { > -@@ -254,20 +256,21 @@ static struct regulator_init_data igep_vio = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &igep_vio_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(igep_vio_supply), > -+ .consumer_supplies = igep_vio_supply, > - }; > - > --static struct regulator_consumer_supply igep_vmmc2_supply = > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); > -+static struct regulator_consumer_supply igep_vmmc2_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), > -+}; > - > - static struct regulator_init_data igep_vmmc2 = { > - .constraints = { > - .valid_modes_mask = REGULATOR_MODE_NORMAL, > - .always_on = 1, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &igep_vmmc2_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply), > -+ .consumer_supplies = igep_vmmc2_supply, > - }; > - > - static struct fixed_voltage_config igep_vwlan = { > -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach- > omap2/board-ldp.c > -index f7d6038..069bc9f 100644 > ---- a/arch/arm/mach-omap2/board-ldp.c > -+++ b/arch/arm/mach-omap2/board-ldp.c > -@@ -213,8 +213,8 @@ static struct twl4030_madc_platform_data > ldp_madc_data = { > - .irq_line = 1, > - }; > - > --static struct regulator_consumer_supply ldp_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply ldp_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max > 220 mA) */ > -@@ -228,8 +228,8 @@ static struct regulator_init_data ldp_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &ldp_vmmc1_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(ldp_vmmc1_supply), > -+ .consumer_supplies = ldp_vmmc1_supply, > - }; > - > - /* ads7846 on SPI */ > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 7f21d24..4cf7c19 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -210,8 +210,9 @@ static struct omap_dss_board_info beagle_dss_data = > { > - .default_device = &beagle_dvi_device, > - }; > - > --static struct regulator_consumer_supply beagle_vdac_supply = > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); > -+static struct regulator_consumer_supply beagle_vdac_supply[] = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > - > - static struct regulator_consumer_supply beagle_vdvi_supplies[] = { > - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -@@ -239,12 +240,12 @@ static struct omap2_hsmmc_info mmc[] = { > - {} /* Terminator */ > - }; > - > --static struct regulator_consumer_supply beagle_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply beagle_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply beagle_vsim_supply = { > -- .supply = "vmmc_aux", > -+static struct regulator_consumer_supply beagle_vsim_supply[] = { > -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), > - }; > - > - static struct gpio_led gpio_leds[]; > -@@ -336,8 +337,8 @@ static struct regulator_init_data beagle_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &beagle_vmmc1_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(beagle_vmmc1_supply), > -+ .consumer_supplies = beagle_vmmc1_supply, > - }; > - > - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ > -@@ -351,8 +352,8 @@ static struct regulator_init_data beagle_vsim = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &beagle_vsim_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(beagle_vsim_supply), > -+ .consumer_supplies = beagle_vsim_supply, > - }; > - > - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > -@@ -365,8 +366,8 @@ static struct regulator_init_data beagle_vdac = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &beagle_vdac_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), > -+ .consumer_supplies = beagle_vdac_supply, > - }; > - > - /* VPLL2 for digital video outputs */ > -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > -index b4d43464..fc7a23a 100644 > ---- a/arch/arm/mach-omap2/board-omap3evm.c > -+++ b/arch/arm/mach-omap2/board-omap3evm.c > -@@ -273,12 +273,12 @@ static struct omap_dss_board_info > omap3_evm_dss_data = { > - .default_device = &omap3_evm_lcd_device, > - }; > - > --static struct regulator_consumer_supply omap3evm_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply omap3evm_vsim_supply = { > -- .supply = "vmmc_aux", > -+static struct regulator_consumer_supply omap3evm_vsim_supply[] = { > -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), > - }; > - > - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max > 220 mA) */ > -@@ -292,8 +292,8 @@ static struct regulator_init_data omap3evm_vmmc1 = > { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3evm_vmmc1_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3evm_vmmc1_supply), > -+ .consumer_supplies = omap3evm_vmmc1_supply, > - }; > - > - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ > -@@ -307,8 +307,8 @@ static struct regulator_init_data omap3evm_vsim = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3evm_vsim_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3evm_vsim_supply), > -+ .consumer_supplies = omap3evm_vsim_supply, > - }; > - > - static struct omap2_hsmmc_info mmc[] = { > -@@ -449,8 +449,9 @@ static struct twl4030_codec_data > omap3evm_codec_data = { > - .audio = &omap3evm_audio_data, > - }; > - > --static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); > -+static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > - > - /* VDAC for DSS driving S-Video */ > - static struct regulator_init_data omap3_evm_vdac = { > -@@ -463,8 +464,8 @@ static struct regulator_init_data omap3_evm_vdac = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3_evm_vdda_dac_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3_evm_vdda_dac_supply), > -+ .consumer_supplies = omap3_evm_vdda_dac_supply, > - }; > - > - /* VPLL2 for digital video outputs */ > -@@ -488,8 +489,9 @@ static struct regulator_init_data omap3_evm_vpll2 = { > - }; > - > - /* ads7846 on SPI */ > --static struct regulator_consumer_supply omap3evm_vio_supply = > -- REGULATOR_SUPPLY("vcc", "spi1.0"); > -+static struct regulator_consumer_supply omap3evm_vio_supply[] = { > -+ REGULATOR_SUPPLY("vcc", "spi1.0"), > -+}; > - > - /* VIO for ads7846 */ > - static struct regulator_init_data omap3evm_vio = { > -@@ -502,8 +504,8 @@ static struct regulator_init_data omap3evm_vio = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3evm_vio_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3evm_vio_supply), > -+ .consumer_supplies = omap3evm_vio_supply, > - }; > - > - #ifdef CONFIG_WL12XX_PLATFORM_DATA > -@@ -511,16 +513,17 @@ static struct regulator_init_data omap3evm_vio = { > - #define OMAP3EVM_WLAN_PMENA_GPIO (150) > - #define OMAP3EVM_WLAN_IRQ_GPIO (149) > - > --static struct regulator_consumer_supply omap3evm_vmmc2_supply = > -+static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { > - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); > -+}; > - > - /* VMMC2 for driving the WL12xx module */ > - static struct regulator_init_data omap3evm_vmmc2 = { > - .constraints = { > - .valid_ops_mask = REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3evm_vmmc2_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3evm_vmmc2_supply);, > -+ .consumer_supplies = omap3evm_vmmc2_supply, > - }; > - > - static struct fixed_voltage_config omap3evm_vwlan = { > -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach- > omap2/board-omap3logic.c > -index 60d9be4..ec18435 100644 > ---- a/arch/arm/mach-omap2/board-omap3logic.c > -+++ b/arch/arm/mach-omap2/board-omap3logic.c > -@@ -55,8 +55,8 @@ > - #define OMAP3_TORPEDO_MMC_GPIO_CD 127 > - #define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ 129 > - > --static struct regulator_consumer_supply omap3logic_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max > 220 mA) */ > -@@ -71,8 +71,8 @@ static struct regulator_init_data omap3logic_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3logic_vmmc1_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(omap3logic_vmmc1_supply), > -+ .consumer_supplies = omap3logic_vmmc1_supply, > - }; > - > - static struct twl4030_gpio_platform_data omap3logic_gpio_data = { > -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach- > omap2/board-omap3pandora.c > -index 23f71d4..130a278 100644 > ---- a/arch/arm/mach-omap2/board-omap3pandora.c > -+++ b/arch/arm/mach-omap2/board-omap3pandora.c > -@@ -320,17 +320,21 @@ static struct twl4030_gpio_platform_data > omap3pandora_gpio_data = { > - .setup = omap3pandora_twl_gpio_setup, > - }; > - > --static struct regulator_consumer_supply pandora_vmmc1_supply = > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); > -+static struct regulator_consumer_supply pandora_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > -+}; > - > --static struct regulator_consumer_supply pandora_vmmc2_supply = > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); > -+static struct regulator_consumer_supply pandora_vmmc2_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1") > -+}; > - > --static struct regulator_consumer_supply pandora_vmmc3_supply = > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"); > -+static struct regulator_consumer_supply pandora_vmmc3_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), > -+}; > - > --static struct regulator_consumer_supply pandora_vdda_dac_supply = > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); > -+static struct regulator_consumer_supply pandora_vdda_dac_supply[] = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > - > - static struct regulator_consumer_supply pandora_vdds_supplies[] = { > - REGULATOR_SUPPLY("vdds_sdi", "omapdss"), > -@@ -338,11 +342,13 @@ static struct regulator_consumer_supply > pandora_vdds_supplies[] = { > - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > - }; > - > --static struct regulator_consumer_supply pandora_vcc_lcd_supply = > -- REGULATOR_SUPPLY("vcc", "display0"); > -+static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = { > -+ REGULATOR_SUPPLY("vcc", "display0"), > -+}; > - > --static struct regulator_consumer_supply pandora_usb_phy_supply = > -- REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"); > -+static struct regulator_consumer_supply pandora_usb_phy_supply[] = { > -+ REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"), > -+}; > - > - /* ads7846 on SPI and 2 nub controllers on I2C */ > - static struct regulator_consumer_supply pandora_vaux4_supplies[] = { > -@@ -351,8 +357,9 @@ static struct regulator_consumer_supply > pandora_vaux4_supplies[] = { > - REGULATOR_SUPPLY("vcc", "3-0067"), > - }; > - > --static struct regulator_consumer_supply pandora_adac_supply = > -- REGULATOR_SUPPLY("vcc", "soc-audio"); > -+static struct regulator_consumer_supply pandora_adac_supply[] = { > -+ REGULATOR_SUPPLY("vcc", "soc-audio"), > -+}; > - > - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max > 220 mA) */ > - static struct regulator_init_data pandora_vmmc1 = { > -@@ -365,8 +372,8 @@ static struct regulator_init_data pandora_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &pandora_vmmc1_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(pandora_vmmc1_supply), > -+ .consumer_supplies = pandora_vmmc1_supply, > - }; > - > - /* VMMC2 for MMC2 pins CMD, CLK, DAT0..DAT3 (max 100 mA) */ > -@@ -380,8 +387,8 @@ static struct regulator_init_data pandora_vmmc2 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &pandora_vmmc2_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(pandora_vmmc2_supply), > -+ .consumer_supplies = pandora_vmmc2_supply, > - }; > - > - /* VDAC for DSS driving S-Video */ > -@@ -395,8 +402,8 @@ static struct regulator_init_data pandora_vdac = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &pandora_vdda_dac_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(pandora_vdda_dac_supply), > -+ .consumer_supplies = pandora_vdda_dac_supply, > - }; > - > - /* VPLL2 for digital video outputs */ > -@@ -425,8 +432,8 @@ static struct regulator_init_data pandora_vaux1 = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &pandora_vcc_lcd_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(pandora_vcc_lcd_supply), > -+ .consumer_supplies = pandora_vcc_lcd_supply, > - }; > - > - /* VAUX2 for USB host PHY */ > -@@ -440,8 +447,8 @@ static struct regulator_init_data pandora_vaux2 = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &pandora_usb_phy_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(pandora_usb_phy_supply), > -+ .consumer_supplies = pandora_usb_phy_supply, > - }; > - > - /* VAUX4 for ads7846 and nubs */ > -@@ -470,8 +477,8 @@ static struct regulator_init_data pandora_vsim = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &pandora_adac_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(pandora_adac_supply), > -+ .consumer_supplies = pandora_adac_supply, > - }; > - > - /* Fixed regulator internal to Wifi module */ > -@@ -479,8 +486,8 @@ static struct regulator_init_data pandora_vmmc3 = { > - .constraints = { > - .valid_ops_mask = > REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &pandora_vmmc3_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(pandora_vmmc3_supply), > -+ .consumer_supplies = pandora_vmmc3_supply, > - }; > - > - static struct fixed_voltage_config pandora_vwlan = { > -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach- > omap2/board-omap3stalker.c > -index 0c108a2..99be540 100644 > ---- a/arch/arm/mach-omap2/board-omap3stalker.c > -+++ b/arch/arm/mach-omap2/board-omap3stalker.c > -@@ -206,12 +206,12 @@ static struct omap_dss_board_info > omap3_stalker_dss_data = { > - .default_device = &omap3_stalker_dvi_device, > - }; > - > --static struct regulator_consumer_supply omap3stalker_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply omap3stalker_vsim_supply = { > -- .supply = "vmmc_aux", > -+static struct regulator_consumer_supply omap3stalker_vsim_supply[] = { > -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), > - }; > - > - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max > 220 mA) */ > -@@ -224,8 +224,8 @@ static struct regulator_init_data > omap3stalker_vmmc1 = { > - .valid_ops_mask = > REGULATOR_CHANGE_VOLTAGE > - | REGULATOR_CHANGE_MODE | > REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3stalker_vmmc1_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3stalker_vmmc1_supply), > -+ .consumer_supplies = omap3stalker_vmmc1_supply, > - }; > - > - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ > -@@ -238,8 +238,8 @@ static struct regulator_init_data omap3stalker_vsim = > { > - .valid_ops_mask = > REGULATOR_CHANGE_VOLTAGE > - | REGULATOR_CHANGE_MODE | > REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3stalker_vsim_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3stalker_vsim_supply), > -+ .consumer_supplies = omap3stalker_vsim_supply, > - }; > - > - static struct omap2_hsmmc_info mmc[] = { > -@@ -403,8 +403,9 @@ static struct twl4030_codec_data > omap3stalker_codec_data = { > - .audio = &omap3stalker_audio_data, > - }; > - > --static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply = > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); > -+static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] > = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > - > - /* VDAC for DSS driving S-Video */ > - static struct regulator_init_data omap3_stalker_vdac = { > -@@ -417,8 +418,8 @@ static struct regulator_init_data omap3_stalker_vdac > = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap3_stalker_vdda_dac_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3_stalker_vdda_dac_supply), > -+ .consumer_supplies = omap3_stalker_vdda_dac_supply, > - }; > - > - /* VPLL2 for digital video outputs */ > -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c > b/arch/arm/mach-omap2/board-omap3touchbook.c > -index 5f649fa..ab5c37d 100644 > ---- a/arch/arm/mach-omap2/board-omap3touchbook.c > -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c > -@@ -114,12 +114,12 @@ static struct omap_lcd_config > omap3_touchbook_lcd_config __initdata = { > - .ctrl_name = "internal", > - }; > - > --static struct regulator_consumer_supply touchbook_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply touchbook_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply touchbook_vsim_supply = { > -- .supply = "vmmc_aux", > -+static struct regulator_consumer_supply touchbook_vsim_supply[] = { > -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), > - }; > - > - static struct gpio_led gpio_leds[]; > -@@ -167,14 +167,18 @@ static struct twl4030_gpio_platform_data > touchbook_gpio_data = { > - .setup = touchbook_twl_gpio_setup, > - }; > - > --static struct regulator_consumer_supply touchbook_vdac_supply = { > -+static struct regulator_consumer_supply touchbook_vdac_supply[] = { > -+{ > - .supply = "vdac", > - .dev = &omap3_touchbook_lcd_device.dev, > -+}, > - }; > - > --static struct regulator_consumer_supply touchbook_vdvi_supply = { > -+static struct regulator_consumer_supply touchbook_vdvi_supply[] = { > -+{ > - .supply = "vdvi", > - .dev = &omap3_touchbook_lcd_device.dev, > -+}, > - }; > - > - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max > 220 mA) */ > -@@ -188,8 +192,8 @@ static struct regulator_init_data touchbook_vmmc1 = > { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &touchbook_vmmc1_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(touchbook_vmmc1_supply), > -+ .consumer_supplies = touchbook_vmmc1_supply, > - }; > - > - /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ > -@@ -203,8 +207,8 @@ static struct regulator_init_data touchbook_vsim = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &touchbook_vsim_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(touchbook_vsim_supply), > -+ .consumer_supplies = touchbook_vsim_supply, > - }; > - > - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > -@@ -217,8 +221,8 @@ static struct regulator_init_data touchbook_vdac = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &touchbook_vdac_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(touchbook_vdac_supply), > -+ .consumer_supplies = touchbook_vdac_supply, > - }; > - > - /* VPLL2 for digital video outputs */ > -@@ -232,8 +236,8 @@ static struct regulator_init_data touchbook_vpll2 = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &touchbook_vdvi_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(touchbook_vdvi_supply), > -+ .consumer_supplies = touchbook_vdvi_supply, > - }; > - > - static struct twl4030_usb_data touchbook_usb_data = { > -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach- > omap2/board-omap4panda.c > -index 0cfe200..6d2372b 100644 > ---- a/arch/arm/mach-omap2/board-omap4panda.c > -+++ b/arch/arm/mach-omap2/board-omap4panda.c > -@@ -183,23 +183,19 @@ static struct omap2_hsmmc_info mmc[] = { > - }; > - > - static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { > -- { > -- .supply = "vmmc", > -- .dev_name = "omap_hsmmc.0", > -- }, > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply omap4_panda_vmmc5_supply = { > -- .supply = "vmmc", > -- .dev_name = "omap_hsmmc.4", > -+static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"), > - }; > - > - static struct regulator_init_data panda_vmmc5 = { > - .constraints = { > - .valid_ops_mask = REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &omap4_panda_vmmc5_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap4_panda_vmmc5_supply), > -+ .consumer_supplies = omap4_panda_vmmc5_supply, > - }; > - > - static struct fixed_voltage_config panda_vwlan = { > -@@ -312,7 +308,7 @@ static struct regulator_init_data omap4_panda_vmmc > = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap4_panda_vmmc_supply), > - .consumer_supplies = omap4_panda_vmmc_supply, > - }; > - > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 175e1ab..30c7556 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -74,15 +74,16 @@ > - defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) > - > - /* fixed regulator for ads7846 */ > --static struct regulator_consumer_supply ads7846_supply = > -- REGULATOR_SUPPLY("vcc", "spi1.0"); > -+static struct regulator_consumer_supply ads7846_supply[] = { > -+ REGULATOR_SUPPLY("vcc", "spi1.0"), > -+}; > - > - static struct regulator_init_data vads7846_regulator = { > - .constraints = { > - .valid_ops_mask = > REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &ads7846_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(ads7846_supply), > -+ .consumer_supplies = ads7846_supply, > - }; > - > - static struct fixed_voltage_config vads7846 = { > -@@ -264,8 +265,9 @@ static struct omap_dss_board_info overo_dss_data = > { > - .default_device = &overo_dvi_device, > - }; > - > --static struct regulator_consumer_supply overo_vdda_dac_supply = > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); > -+static struct regulator_consumer_supply overo_vdda_dac_supply[] = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > - > - static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { > - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -@@ -319,8 +321,8 @@ static struct omap2_hsmmc_info mmc[] = { > - {} /* Terminator */ > - }; > - > --static struct regulator_consumer_supply overo_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply overo_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > - #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) > -@@ -447,8 +449,8 @@ static struct regulator_init_data overo_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &overo_vmmc1_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(overo_vmmc1_supply), > -+ .consumer_supplies = overo_vmmc1_supply, > - }; > - > - /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > -@@ -461,8 +463,8 @@ static struct regulator_init_data overo_vdac = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &overo_vdda_dac_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(overo_vdda_dac_supply), > -+ .consumer_supplies = overo_vdda_dac_supply, > - }; > - > - /* VPLL2 for digital video outputs */ > -diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c > b/arch/arm/mach-omap2/board-rx51-peripherals.c > -index c565971..b633ba8 100644 > ---- a/arch/arm/mach-omap2/board-rx51-peripherals.c > -+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c > -@@ -358,14 +358,17 @@ static struct omap2_hsmmc_info mmc[] __initdata > = { > - {} /* Terminator */ > - }; > - > --static struct regulator_consumer_supply rx51_vmmc1_supply = > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); > -+static struct regulator_consumer_supply rx51_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > -+}; > - > --static struct regulator_consumer_supply rx51_vaux3_supply = > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); > -+static struct regulator_consumer_supply rx51_vaux3_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), > -+}; > - > --static struct regulator_consumer_supply rx51_vsim_supply = > -- REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); > -+static struct regulator_consumer_supply rx51_vsim_supply[] = { > -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), > -+}; > - > - static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { > - /* tlv320aic3x analog supplies */ > -@@ -452,8 +455,8 @@ static struct regulator_init_data rx51_vaux3_mmc = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &rx51_vaux3_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply), > -+ .consumer_supplies = rx51_vaux3_supply, > - }; > - > - static struct regulator_init_data rx51_vaux4 = { > -@@ -479,8 +482,8 @@ static struct regulator_init_data rx51_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &rx51_vmmc1_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply), > -+ .consumer_supplies = rx51_vmmc1_supply, > - }; > - > - static struct regulator_init_data rx51_vmmc2 = { > -@@ -511,8 +514,8 @@ static struct regulator_init_data rx51_vsim = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &rx51_vsim_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply), > -+ .consumer_supplies = rx51_vsim_supply, > - }; > - > - static struct regulator_init_data rx51_vdac = { > -@@ -526,7 +529,7 @@ static struct regulator_init_data rx51_vdac = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -+ .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply), > - .consumer_supplies = rx51_vdac_supply, > - }; > - > -diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c > b/arch/arm/mach-omap2/board-zoom-peripherals.c > -index 118c6f5..cb012e1 100644 > ---- a/arch/arm/mach-omap2/board-zoom-peripherals.c > -+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c > -@@ -105,21 +105,20 @@ static struct twl4030_keypad_data > zoom_kp_twl4030_data = { > - .rep = 1, > - }; > - > --static struct regulator_consumer_supply zoom_vmmc1_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply zoom_vmmc1_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply zoom_vsim_supply = { > -- .supply = "vmmc_aux", > -+static struct regulator_consumer_supply zoom_vsim_supply[] = { > -+ REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply zoom_vmmc2_supply = { > -- .supply = "vmmc", > -+static struct regulator_consumer_supply zoom_vmmc2_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), > - }; > - > --static struct regulator_consumer_supply zoom_vmmc3_supply = { > -- .supply = "vmmc", > -- .dev_name = "omap_hsmmc.2", > -+static struct regulator_consumer_supply zoom_vmmc3_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), > - }; > - > - /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ > -@@ -133,8 +132,8 @@ static struct regulator_init_data zoom_vmmc1 = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &zoom_vmmc1_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc1_supply), > -+ .consumer_supplies = zoom_vmmc1_supply, > - }; > - > - /* VMMC2 for MMC2 card */ > -@@ -148,8 +147,8 @@ static struct regulator_init_data zoom_vmmc2 = { > - .valid_ops_mask = > REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &zoom_vmmc2_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc2_supply), > -+ .consumer_supplies = zoom_vmmc2_supply, > - }; > - > - /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ > -@@ -163,16 +162,16 @@ static struct regulator_init_data zoom_vsim = { > - | REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &zoom_vsim_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vsim_supply), > -+ .consumer_supplies = zoom_vsim_supply, > - }; > - > - static struct regulator_init_data zoom_vmmc3 = { > - .constraints = { > - .valid_ops_mask = REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &zoom_vmmc3_supply, > -+ .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc3_supply), > -+ .consumer_supplies = zoom_vmmc3_supply, > - }; > - > - static struct fixed_voltage_config zoom_vwlan = { > -@@ -232,8 +231,9 @@ static struct regulator_consumer_supply > zoom_vpll2_supplies[] = { > - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > - }; > - > --static struct regulator_consumer_supply zoom_vdda_dac_supply = > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); > -+static struct regulator_consumer_supply zoom_vdda_dac_supply[] = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > - > - static struct regulator_init_data zoom_vpll2 = { > - .constraints = { > -@@ -257,8 +257,8 @@ static struct regulator_init_data zoom_vdac = { > - .valid_ops_mask = REGULATOR_CHANGE_MODE > - | REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = &zoom_vdda_dac_supply, > -+ .num_consumer_supplies = > ARRAY_SIZE(zoom_vdda_dac_supply), > -+ .consumer_supplies = zoom_vdda_dac_supply, > - }; > - > - static int zoom_twl_gpio_setup(struct device *dev, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0002-Remove-old- > style-supply.dev-assignments-common-in-hs.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common- > in-hs.patch > deleted file mode 100644 > index 52e6786..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0002-Remove-old-style- > supply.dev-assignments-common-in-hs.patch > +++ /dev/null > @@ -1,160 +0,0 @@ > -From a3d13ae14bca7c412e5b0575c244ce7370fa3747 Mon Sep 17 00:00:00 > 2001 > -From: Oleg Drokin <green@linuxhacker.ru> > -Date: Mon, 6 Jun 2011 18:57:08 +0000 > -Subject: [PATCH 002/149] Remove old-style supply.dev assignments common > in hsmmc init > - > -CC: Mark Brown <broonie@opensource.wolfsonmicro.com> > -CC: Mike Rapoport <mike@compulab.co.il> > -CC: Nishant Kamat <nskamat@ti.com> > -CC: Steve Sakoman <steve@sakoman.com> > -CC: Felipe Balbi <balbi@ti.com> > -Signed-off-by: Oleg Drokin <green@linuxhacker.ru> > -Acked-by: Felipe Balbi <balbi@ti.com> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/board-cm-t35.c | 4 ---- > - arch/arm/mach-omap2/board-ldp.c | 2 -- > - arch/arm/mach-omap2/board-omap3beagle.c | 4 ---- > - arch/arm/mach-omap2/board-omap3evm.c | 4 ---- > - arch/arm/mach-omap2/board-omap3logic.c | 2 -- > - arch/arm/mach-omap2/board-omap3stalker.c | 4 ---- > - arch/arm/mach-omap2/board-omap3touchbook.c | 4 ---- > - arch/arm/mach-omap2/board-overo.c | 2 -- > - arch/arm/mach-omap2/board-zoom-peripherals.c | 7 ------- > - 9 files changed, 0 insertions(+), 33 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach- > omap2/board-cm-t35.c > -index e7bf32d..ceb581e 100644 > ---- a/arch/arm/mach-omap2/board-cm-t35.c > -+++ b/arch/arm/mach-omap2/board-cm-t35.c > -@@ -483,10 +483,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, > unsigned gpio, > - mmc[0].gpio_cd = gpio + 0; > - omap2_hsmmc_init(mmc); > - > -- /* link regulators to MMC adapters */ > -- cm_t35_vmmc1_supply.dev = mmc[0].dev; > -- cm_t35_vsim_supply.dev = mmc[0].dev; > -- > - return 0; > - } > - > -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach- > omap2/board-ldp.c > -index 069bc9f..2d7e0ae 100644 > ---- a/arch/arm/mach-omap2/board-ldp.c > -+++ b/arch/arm/mach-omap2/board-ldp.c > -@@ -341,8 +341,6 @@ static void __init omap_ldp_init(void) > - ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); > - > - omap2_hsmmc_init(mmc); > -- /* link regulators to MMC adapters */ > -- ldp_vmmc1_supply.dev = mmc[0].dev; > - } > - > - MACHINE_START(OMAP_LDP, "OMAP LDP board") > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 4cf7c19..8ef0e19 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -268,10 +268,6 @@ static int beagle_twl_gpio_setup(struct device *dev, > - mmc[0].gpio_cd = gpio + 0; > - omap2_hsmmc_init(mmc); > - > -- /* link regulators to MMC adapters */ > -- beagle_vmmc1_supply.dev = mmc[0].dev; > -- beagle_vsim_supply.dev = mmc[0].dev; > -- > - /* > - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM > active > - * high / others active low) > -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > -index fc7a23a..e2202dd 100644 > ---- a/arch/arm/mach-omap2/board-omap3evm.c > -+++ b/arch/arm/mach-omap2/board-omap3evm.c > -@@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device > *dev, > - mmc[0].gpio_cd = gpio + 0; > - omap2_hsmmc_init(mmc); > - > -- /* link regulators to MMC adapters */ > -- omap3evm_vmmc1_supply.dev = mmc[0].dev; > -- omap3evm_vsim_supply.dev = mmc[0].dev; > -- > - /* > - * Most GPIOs are for USB OTG. Some are mostly sent to > - * the P2 connector; notably LEDA for the LCD backlight. > -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach- > omap2/board-omap3logic.c > -index ec18435..eaefb59 100644 > ---- a/arch/arm/mach-omap2/board-omap3logic.c > -+++ b/arch/arm/mach-omap2/board-omap3logic.c > -@@ -130,8 +130,6 @@ static void __init board_mmc_init(void) > - } > - > - omap2_hsmmc_init(board_mmc_info); > -- /* link regulators to MMC adapters */ > -- omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev; > - } > - > - static struct omap_smsc911x_platform_data __initdata > board_smsc911x_data = { > -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach- > omap2/board-omap3stalker.c > -index 99be540..63d12a3 100644 > ---- a/arch/arm/mach-omap2/board-omap3stalker.c > -+++ b/arch/arm/mach-omap2/board-omap3stalker.c > -@@ -321,10 +321,6 @@ omap3stalker_twl_gpio_setup(struct device *dev, > - mmc[0].gpio_cd = gpio + 0; > - omap2_hsmmc_init(mmc); > - > -- /* link regulators to MMC adapters */ > -- omap3stalker_vmmc1_supply.dev = mmc[0].dev; > -- omap3stalker_vsim_supply.dev = mmc[0].dev; > -- > - /* > - * Most GPIOs are for USB OTG. Some are mostly sent to > - * the P2 connector; notably LEDA for the LCD backlight. > -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c > b/arch/arm/mach-omap2/board-omap3touchbook.c > -index ab5c37d..c80e2c3 100644 > ---- a/arch/arm/mach-omap2/board-omap3touchbook.c > -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c > -@@ -137,10 +137,6 @@ static int touchbook_twl_gpio_setup(struct device > *dev, > - mmc[0].gpio_cd = gpio + 0; > - omap2_hsmmc_init(mmc); > - > -- /* link regulators to MMC adapters */ > -- touchbook_vmmc1_supply.dev = mmc[0].dev; > -- touchbook_vsim_supply.dev = mmc[0].dev; > -- > - /* REVISIT: need ehci-omap hooks for external VBUS > - * power switch and overcurrent detect > - */ > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 30c7556..031a9a6 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -417,8 +417,6 @@ static int overo_twl_gpio_setup(struct device *dev, > - { > - omap2_hsmmc_init(mmc); > - > -- overo_vmmc1_supply.dev = mmc[0].dev; > -- > - #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) > - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) > */ > - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; > -diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c > b/arch/arm/mach-omap2/board-zoom-peripherals.c > -index cb012e1..8495f82 100644 > ---- a/arch/arm/mach-omap2/board-zoom-peripherals.c > -+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c > -@@ -270,13 +270,6 @@ static int zoom_twl_gpio_setup(struct device *dev, > - mmc[0].gpio_cd = gpio + 0; > - omap2_hsmmc_init(mmc); > - > -- /* link regulators to MMC adapters ... we "know" the > -- * regulators will be set up only *after* we return. > -- */ > -- zoom_vmmc1_supply.dev = mmc[0].dev; > -- zoom_vsim_supply.dev = mmc[0].dev; > -- zoom_vmmc2_supply.dev = mmc[1].dev; > -- > - ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, > GPIOF_OUT_INIT_LOW, > - "lcd enable"); > - if (ret) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0003-omap-Use- > separate-init_irq-functions-to-avoid-cpu_is.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid- > cpu_is.patch > deleted file mode 100644 > index dbb6972..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0003-omap-Use-separate- > init_irq-functions-to-avoid-cpu_is.patch > +++ /dev/null > @@ -1,802 +0,0 @@ > -From 5edd966fdcf04f3166c1b7028215e502ba7d5275 Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 17 May 2011 03:51:26 -0700 > -Subject: [PATCH 003/149] omap: Use separate init_irq functions to avoid > cpu_is_omap tests early > - > -This allows us to remove cpu_is_omap calls from init_irq functions. > -There should not be any need for cpu_is_omap calls as at this point. > -During the timer init we only care about SoC generation, and not about > -subrevisions. > - > -The main reason for the patch is that we want to initialize only > -minimal omap specific code from the init_early call. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap1/board-ams-delta.c | 2 +- > - arch/arm/mach-omap1/board-fsample.c | 2 +- > - arch/arm/mach-omap1/board-generic.c | 2 +- > - arch/arm/mach-omap1/board-h2.c | 2 +- > - arch/arm/mach-omap1/board-h3.c | 2 +- > - arch/arm/mach-omap1/board-htcherald.c | 2 +- > - arch/arm/mach-omap1/board-innovator.c | 2 +- > - arch/arm/mach-omap1/board-nokia770.c | 2 +- > - arch/arm/mach-omap1/board-osk.c | 2 +- > - arch/arm/mach-omap1/board-palmte.c | 2 +- > - arch/arm/mach-omap1/board-palmtt.c | 2 +- > - arch/arm/mach-omap1/board-palmz71.c | 2 +- > - arch/arm/mach-omap1/board-perseus2.c | 2 +- > - arch/arm/mach-omap1/board-sx1.c | 2 +- > - arch/arm/mach-omap1/board-voiceblue.c | 2 +- > - arch/arm/mach-omap1/irq.c | 2 +- > - arch/arm/mach-omap2/board-2430sdp.c | 2 +- > - arch/arm/mach-omap2/board-3430sdp.c | 2 +- > - arch/arm/mach-omap2/board-3630sdp.c | 2 +- > - arch/arm/mach-omap2/board-am3517crane.c | 2 +- > - arch/arm/mach-omap2/board-am3517evm.c | 2 +- > - arch/arm/mach-omap2/board-apollon.c | 2 +- > - arch/arm/mach-omap2/board-cm-t35.c | 2 +- > - arch/arm/mach-omap2/board-cm-t3517.c | 2 +- > - arch/arm/mach-omap2/board-devkit8000.c | 2 +- > - arch/arm/mach-omap2/board-generic.c | 2 +- > - arch/arm/mach-omap2/board-h4.c | 2 +- > - arch/arm/mach-omap2/board-igep0020.c | 4 +- > - arch/arm/mach-omap2/board-ldp.c | 2 +- > - arch/arm/mach-omap2/board-n8x0.c | 6 ++-- > - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- > - arch/arm/mach-omap2/board-omap3evm.c | 2 +- > - arch/arm/mach-omap2/board-omap3logic.c | 4 +- > - arch/arm/mach-omap2/board-omap3pandora.c | 2 +- > - arch/arm/mach-omap2/board-omap3stalker.c | 2 +- > - arch/arm/mach-omap2/board-omap3touchbook.c | 2 +- > - arch/arm/mach-omap2/board-overo.c | 2 +- > - arch/arm/mach-omap2/board-rm680.c | 2 +- > - arch/arm/mach-omap2/board-rx51.c | 2 +- > - arch/arm/mach-omap2/board-ti8168evm.c | 7 +----- > - arch/arm/mach-omap2/board-zoom.c | 4 +- > - arch/arm/mach-omap2/io.c | 17 +-------------- > - arch/arm/mach-omap2/irq.c | 32 ++++++++++++++++++--------- > - arch/arm/mach-omap2/omap4-common.c | 10 ++++---- > - arch/arm/plat-omap/include/plat/irqs.h | 6 ++++- > - 45 files changed, 78 insertions(+), 84 deletions(-) > - > -diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach- > omap1/board-ams-delta.c > -index f49ce85..e3caef8 100644 > ---- a/arch/arm/mach-omap1/board-ams-delta.c > -+++ b/arch/arm/mach-omap1/board-ams-delta.c > -@@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value) > - static void __init ams_delta_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static struct map_desc ams_delta_io_desc[] __initdata = { > -diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach- > omap1/board-fsample.c > -index 87f173d..eaff305 100644 > ---- a/arch/arm/mach-omap1/board-fsample.c > -+++ b/arch/arm/mach-omap1/board-fsample.c > -@@ -329,7 +329,7 @@ static void __init omap_fsample_init(void) > - static void __init omap_fsample_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - /* Only FPGA needs to be mapped here. All others are done with ioremap */ > -diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach- > omap1/board-generic.c > -index 23f4ab9..3fd6b40 100644 > ---- a/arch/arm/mach-omap1/board-generic.c > -+++ b/arch/arm/mach-omap1/board-generic.c > -@@ -31,7 +31,7 @@ > - static void __init omap_generic_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - /* assume no Mini-AB port */ > -diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach- > omap1/board-h2.c > -index ba3bd09..8147b04 100644 > ---- a/arch/arm/mach-omap1/board-h2.c > -+++ b/arch/arm/mach-omap1/board-h2.c > -@@ -376,7 +376,7 @@ static struct i2c_board_info __initdata > h2_i2c_board_info[] = { > - static void __init h2_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static struct omap_usb_config h2_usb_config __initdata = { > -diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach- > omap1/board-h3.c > -index ac48677..1b448f6 100644 > ---- a/arch/arm/mach-omap1/board-h3.c > -+++ b/arch/arm/mach-omap1/board-h3.c > -@@ -439,7 +439,7 @@ static void __init h3_init(void) > - static void __init h3_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static void __init h3_map_io(void) > -diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach- > omap1/board-htcherald.c > -index ba05a51..1bd4d8e 100644 > ---- a/arch/arm/mach-omap1/board-htcherald.c > -+++ b/arch/arm/mach-omap1/board-htcherald.c > -@@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void) > - { > - printk(KERN_INFO "htcherald_init_irq.\n"); > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - MACHINE_START(HERALD, "HTC Herald") > -diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach- > omap1/board-innovator.c > -index 2d9b8cb..5926b0c 100644 > ---- a/arch/arm/mach-omap1/board-innovator.c > -+++ b/arch/arm/mach-omap1/board-innovator.c > -@@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void) > - static void __init innovator_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - #ifdef CONFIG_ARCH_OMAP15XX > -diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach- > omap1/board-nokia770.c > -index cfd0849..e3cf21d 100644 > ---- a/arch/arm/mach-omap1/board-nokia770.c > -+++ b/arch/arm/mach-omap1/board-nokia770.c > -@@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void) > - omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); > - > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static const unsigned int nokia770_keymap[] = { > -diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach- > omap1/board-osk.c > -index e68dfde..1e7823d 100644 > ---- a/arch/arm/mach-omap1/board-osk.c > -+++ b/arch/arm/mach-omap1/board-osk.c > -@@ -282,7 +282,7 @@ static void __init osk_init_cf(void) > - static void __init osk_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static struct omap_usb_config osk_usb_config __initdata = { > -diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach- > omap1/board-palmte.c > -index c9d38f4..8b6a881 100644 > ---- a/arch/arm/mach-omap1/board-palmte.c > -+++ b/arch/arm/mach-omap1/board-palmte.c > -@@ -62,7 +62,7 @@ > - static void __init omap_palmte_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static const unsigned int palmte_keymap[] = { > -diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach- > omap1/board-palmtt.c > -index f04f2d3..f2de43d 100644 > ---- a/arch/arm/mach-omap1/board-palmtt.c > -+++ b/arch/arm/mach-omap1/board-palmtt.c > -@@ -266,7 +266,7 @@ static struct spi_board_info __initdata > palmtt_boardinfo[] = { > - static void __init omap_palmtt_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static struct omap_usb_config palmtt_usb_config __initdata = { > -diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach- > omap1/board-palmz71.c > -index 45f01d2..6665d2d 100644 > ---- a/arch/arm/mach-omap1/board-palmz71.c > -+++ b/arch/arm/mach-omap1/board-palmz71.c > -@@ -61,7 +61,7 @@ static void __init > - omap_palmz71_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static const unsigned int palmz71_keymap[] = { > -diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach- > omap1/board-perseus2.c > -index 3c8ee84..7f019e5 100644 > ---- a/arch/arm/mach-omap1/board-perseus2.c > -+++ b/arch/arm/mach-omap1/board-perseus2.c > -@@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void) > - static void __init omap_perseus2_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - /* Only FPGA needs to be mapped here. All others are done with ioremap */ > - static struct map_desc omap_perseus2_io_desc[] __initdata = { > -diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach- > omap1/board-sx1.c > -index 0ad781d..24f0f7b 100644 > ---- a/arch/arm/mach-omap1/board-sx1.c > -+++ b/arch/arm/mach-omap1/board-sx1.c > -@@ -411,7 +411,7 @@ static void __init omap_sx1_init(void) > - static void __init omap_sx1_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - /*----------------------------------------*/ > - > -diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach- > omap1/board-voiceblue.c > -index 65d2420..98826e2 100644 > ---- a/arch/arm/mach-omap1/board-voiceblue.c > -+++ b/arch/arm/mach-omap1/board-voiceblue.c > -@@ -162,7 +162,7 @@ static struct omap_board_config_kernel > voiceblue_config[] = { > - static void __init voiceblue_init_irq(void) > - { > - omap1_init_common_hw(); > -- omap_init_irq(); > -+ omap1_init_irq(); > - } > - > - static void __init voiceblue_map_io(void) > -diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c > -index 5d3da7a..e2b9c90 100644 > ---- a/arch/arm/mach-omap1/irq.c > -+++ b/arch/arm/mach-omap1/irq.c > -@@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = { > - .irq_set_wake = omap_wake_irq, > - }; > - > --void __init omap_init_irq(void) > -+void __init omap1_init_irq(void) > - { > - int i, j; > - > -diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach- > omap2/board-2430sdp.c > -index 5de6eac..45cabc5 100644 > ---- a/arch/arm/mach-omap2/board-2430sdp.c > -+++ b/arch/arm/mach-omap2/board-2430sdp.c > -@@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 > sdp2430 board") > - .reserve = omap_reserve, > - .map_io = omap_2430sdp_map_io, > - .init_early = omap_2430sdp_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap2_init_irq, > - .init_machine = omap_2430sdp_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach- > omap2/board-3430sdp.c > -index 5dac974..85b207f 100644 > ---- a/arch/arm/mach-omap2/board-3430sdp.c > -+++ b/arch/arm/mach-omap2/board-3430sdp.c > -@@ -804,7 +804,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 > 3430SDP board") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = omap_3430sdp_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap_3430sdp_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach- > omap2/board-3630sdp.c > -index a5933cc..2ec2d76 100644 > ---- a/arch/arm/mach-omap2/board-3630sdp.c > -+++ b/arch/arm/mach-omap2/board-3630sdp.c > -@@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP > board") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = omap_sdp_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap_sdp_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach- > omap2/board-am3517crane.c > -index 5e438a7..0bed0a4 100644 > ---- a/arch/arm/mach-omap2/board-am3517crane.c > -+++ b/arch/arm/mach-omap2/board-am3517crane.c > -@@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 > CRANEBOARD") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = am3517_crane_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = am3517_crane_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach- > omap2/board-am3517evm.c > -index 63af417..0db0fb8 100644 > ---- a/arch/arm/mach-omap2/board-am3517evm.c > -+++ b/arch/arm/mach-omap2/board-am3517evm.c > -@@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, > "OMAP3517/AM3517 EVM") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = am3517_evm_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = am3517_evm_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach- > omap2/board-apollon.c > -index b124bdf..93576c8 100644 > ---- a/arch/arm/mach-omap2/board-apollon.c > -+++ b/arch/arm/mach-omap2/board-apollon.c > -@@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx > Apollon") > - .reserve = omap_reserve, > - .map_io = omap_apollon_map_io, > - .init_early = omap_apollon_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap2_init_irq, > - .init_machine = omap_apollon_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach- > omap2/board-cm-t35.c > -index ceb581e..43b1de5 100644 > ---- a/arch/arm/mach-omap2/board-cm-t35.c > -+++ b/arch/arm/mach-omap2/board-cm-t35.c > -@@ -644,7 +644,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = cm_t35_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = cm_t35_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach- > omap2/board-cm-t3517.c > -index c3a9fd3..8f15222 100644 > ---- a/arch/arm/mach-omap2/board-cm-t3517.c > -+++ b/arch/arm/mach-omap2/board-cm-t3517.c > -@@ -304,7 +304,7 @@ MACHINE_START(CM_T3517, "Compulab CM- > T3517") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = cm_t3517_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = cm_t3517_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach- > omap2/board-devkit8000.c > -index ead9c1d..73f3a22 100644 > ---- a/arch/arm/mach-omap2/board-devkit8000.c > -+++ b/arch/arm/mach-omap2/board-devkit8000.c > -@@ -440,7 +440,7 @@ static void __init devkit8000_init_early(void) > - > - static void __init devkit8000_init_irq(void) > - { > -- omap_init_irq(); > -+ omap3_init_irq(); > - #ifdef CONFIG_OMAP_32K_TIMER > - omap2_gp_clockevent_set_gptimer(12); > - #endif > -diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach- > omap2/board-generic.c > -index 73e3c31..ccd503a 100644 > ---- a/arch/arm/mach-omap2/board-generic.c > -+++ b/arch/arm/mach-omap2/board-generic.c > -@@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic > OMAP24xx") > - .reserve = omap_reserve, > - .map_io = omap_generic_map_io, > - .init_early = omap_generic_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap2_init_irq, > - .init_machine = omap_generic_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach- > omap2/board-h4.c > -index bac7933..2e16d6c 100644 > ---- a/arch/arm/mach-omap2/board-h4.c > -+++ b/arch/arm/mach-omap2/board-h4.c > -@@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void) > - > - static void __init omap_h4_init_irq(void) > - { > -- omap_init_irq(); > -+ omap2_init_irq(); > - } > - > - static struct at24_platform_data m24c01 = { > -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach- > omap2/board-igep0020.c > -index 84d2846..f22a76a 100644 > ---- a/arch/arm/mach-omap2/board-igep0020.c > -+++ b/arch/arm/mach-omap2/board-igep0020.c > -@@ -706,7 +706,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = igep_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = igep_init, > - .timer = &omap_timer, > - MACHINE_END > -@@ -716,7 +716,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = igep_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = igep_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach- > omap2/board-ldp.c > -index 2d7e0ae..9671843 100644 > ---- a/arch/arm/mach-omap2/board-ldp.c > -+++ b/arch/arm/mach-omap2/board-ldp.c > -@@ -348,7 +348,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = omap_ldp_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap_ldp_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach- > omap2/board-n8x0.c > -index 8d74318..9c791a2 100644 > ---- a/arch/arm/mach-omap2/board-n8x0.c > -+++ b/arch/arm/mach-omap2/board-n8x0.c > -@@ -699,7 +699,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") > - .reserve = omap_reserve, > - .map_io = n8x0_map_io, > - .init_early = n8x0_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap2_init_irq, > - .init_machine = n8x0_init_machine, > - .timer = &omap_timer, > - MACHINE_END > -@@ -709,7 +709,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") > - .reserve = omap_reserve, > - .map_io = n8x0_map_io, > - .init_early = n8x0_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap2_init_irq, > - .init_machine = n8x0_init_machine, > - .timer = &omap_timer, > - MACHINE_END > -@@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia > N810 WiMAX") > - .reserve = omap_reserve, > - .map_io = n8x0_map_io, > - .init_early = n8x0_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap2_init_irq, > - .init_machine = n8x0_init_machine, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 8ef0e19..eaead5e 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -483,7 +483,7 @@ static void __init omap3_beagle_init_early(void) > - > - static void __init omap3_beagle_init_irq(void) > - { > -- omap_init_irq(); > -+ omap3_init_irq(); > - #ifdef CONFIG_OMAP_32K_TIMER > - omap2_gp_clockevent_set_gptimer(12); > - #endif > -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > -index e2202dd..d39f53f 100644 > ---- a/arch/arm/mach-omap2/board-omap3evm.c > -+++ b/arch/arm/mach-omap2/board-omap3evm.c > -@@ -739,7 +739,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = omap3_evm_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap3_evm_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach- > omap2/board-omap3logic.c > -index eaefb59..b63f1c2 100644 > ---- a/arch/arm/mach-omap2/board-omap3logic.c > -+++ b/arch/arm/mach-omap2/board-omap3logic.c > -@@ -213,7 +213,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 > Torpedo board") > - .boot_params = 0x80000100, > - .map_io = omap3_map_io, > - .init_early = omap3logic_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap3logic_init, > - .timer = &omap_timer, > - MACHINE_END > -@@ -222,7 +222,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic > 3530 LV SOM board") > - .boot_params = 0x80000100, > - .map_io = omap3_map_io, > - .init_early = omap3logic_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap3logic_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach- > omap2/board-omap3pandora.c > -index 130a278..1d90b90 100644 > ---- a/arch/arm/mach-omap2/board-omap3pandora.c > -+++ b/arch/arm/mach-omap2/board-omap3pandora.c > -@@ -650,7 +650,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora > Handheld Console") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = omap3pandora_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap3pandora_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach- > omap2/board-omap3stalker.c > -index 63d12a3..dfa1401 100644 > ---- a/arch/arm/mach-omap2/board-omap3stalker.c > -+++ b/arch/arm/mach-omap2/board-omap3stalker.c > -@@ -491,7 +491,7 @@ static void __init omap3_stalker_init_early(void) > - > - static void __init omap3_stalker_init_irq(void) > - { > -- omap_init_irq(); > -+ omap3_init_irq(); > - #ifdef CONFIG_OMAP_32K_TIMER > - omap2_gp_clockevent_set_gptimer(12); > - #endif > -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c > b/arch/arm/mach-omap2/board-omap3touchbook.c > -index c80e2c3..ae97910 100644 > ---- a/arch/arm/mach-omap2/board-omap3touchbook.c > -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c > -@@ -371,7 +371,7 @@ static void __init omap3_touchbook_init_early(void) > - > - static void __init omap3_touchbook_init_irq(void) > - { > -- omap_init_irq(); > -+ omap3_init_irq(); > - #ifdef CONFIG_OMAP_32K_TIMER > - omap2_gp_clockevent_set_gptimer(12); > - #endif > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 031a9a6..e3928f23 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -615,7 +615,7 @@ MACHINE_START(OVERO, "Gumstix Overo") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = overo_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = overo_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach- > omap2/board-rm680.c > -index 42d10b1..9c3d115 100644 > ---- a/arch/arm/mach-omap2/board-rm680.c > -+++ b/arch/arm/mach-omap2/board-rm680.c > -@@ -163,7 +163,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 > board") > - .reserve = omap_reserve, > - .map_io = rm680_map_io, > - .init_early = rm680_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = rm680_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach- > omap2/board-rx51.c > -index fec4cac..ee35e4e 100644 > ---- a/arch/arm/mach-omap2/board-rx51.c > -+++ b/arch/arm/mach-omap2/board-rx51.c > -@@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") > - .reserve = rx51_reserve, > - .map_io = rx51_map_io, > - .init_early = rx51_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = rx51_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach- > omap2/board-ti8168evm.c > -index 09fa7bf..713c20f 100644 > ---- a/arch/arm/mach-omap2/board-ti8168evm.c > -+++ b/arch/arm/mach-omap2/board-ti8168evm.c > -@@ -33,11 +33,6 @@ static void __init ti8168_init_early(void) > - omap2_init_common_devices(NULL, NULL); > - } > - > --static void __init ti8168_evm_init_irq(void) > --{ > -- omap_init_irq(); > --} > -- > - static void __init ti8168_evm_init(void) > - { > - omap_serial_init(); > -@@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") > - .boot_params = 0x80000100, > - .map_io = ti8168_evm_map_io, > - .init_early = ti8168_init_early, > -- .init_irq = ti8168_evm_init_irq, > -+ .init_irq = ti816x_init_irq, > - .timer = &omap_timer, > - .init_machine = ti8168_evm_init, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach- > omap2/board-zoom.c > -index 4b133d7..97a3f0b 100644 > ---- a/arch/arm/mach-omap2/board-zoom.c > -+++ b/arch/arm/mach-omap2/board-zoom.c > -@@ -137,7 +137,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 > board") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = omap_zoom_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap_zoom_init, > - .timer = &omap_timer, > - MACHINE_END > -@@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 > board") > - .reserve = omap_reserve, > - .map_io = omap3_map_io, > - .init_early = omap_zoom_init_early, > -- .init_irq = omap_init_irq, > -+ .init_irq = omap3_init_irq, > - .init_machine = omap_zoom_init, > - .timer = &omap_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c > -index 441e79d..2ce1ce6 100644 > ---- a/arch/arm/mach-omap2/io.c > -+++ b/arch/arm/mach-omap2/io.c > -@@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct > omap_hwmod *oh, void *data) > - return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); > - } > - > -+/* See irq.c, omap4-common.c and entry-macro.S */ > - void __iomem *omap_irq_base; > - > --/* > -- * Initialize asm_irq_base for entry-macro.S > -- */ > --static inline void omap_irq_base_init(void) > --{ > -- if (cpu_is_omap24xx()) > -- omap_irq_base = > OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); > -- else if (cpu_is_omap34xx()) > -- omap_irq_base = > OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE); > -- else if (cpu_is_omap44xx()) > -- omap_irq_base = > OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); > -- else > -- pr_err("Could not initialize omap_irq_base\n"); > --} > -- > - void __init omap2_init_common_infrastructure(void) > - { > - u8 postsetup_state; > -@@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct > omap_sdrc_params *sdrc_cs0, > - _omap2_init_reprogram_sdrc(); > - } > - > -- omap_irq_base_init(); > - } > - > - /* > -diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c > -index 3af2b7a..3a12f75 100644 > ---- a/arch/arm/mach-omap2/irq.c > -+++ b/arch/arm/mach-omap2/irq.c > -@@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int > irq_start, unsigned int num) > - IRQ_NOREQUEST | IRQ_NOPROBE, 0); > - } > - > --void __init omap_init_irq(void) > -+static void __init omap_init_irq(u32 base, int nr_irqs) > - { > - unsigned long nr_of_irqs = 0; > - unsigned int nr_banks = 0; > - int i, j; > - > -+ omap_irq_base = ioremap(base, SZ_4K); > -+ if (WARN_ON(!omap_irq_base)) > -+ return; > -+ > - for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { > -- unsigned long base = 0; > - struct omap_irq_bank *bank = irq_banks + i; > - > -- if (cpu_is_omap24xx()) > -- base = OMAP24XX_IC_BASE; > -- else if (cpu_is_omap34xx()) > -- base = OMAP34XX_IC_BASE; > -- > -- BUG_ON(!base); > -- > -- if (cpu_is_ti816x()) > -- bank->nr_irqs = 128; > -+ bank->nr_irqs = nr_irqs; > - > - /* Static mapping, never released */ > - bank->base_reg = ioremap(base, SZ_4K); > -@@ -181,6 +176,21 @@ void __init omap_init_irq(void) > - nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); > - } > - > -+void __init omap2_init_irq(void) > -+{ > -+ omap_init_irq(OMAP24XX_IC_BASE, 96); > -+} > -+ > -+void __init omap3_init_irq(void) > -+{ > -+ omap_init_irq(OMAP34XX_IC_BASE, 96); > -+} > -+ > -+void __init ti816x_init_irq(void) > -+{ > -+ omap_init_irq(OMAP34XX_IC_BASE, 128); > -+} > -+ > - #ifdef CONFIG_ARCH_OMAP3 > - static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; > - > -diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach- > omap2/omap4-common.c > -index 9ef8c29..35ac3e5 100644 > ---- a/arch/arm/mach-omap2/omap4-common.c > -+++ b/arch/arm/mach-omap2/omap4-common.c > -@@ -19,6 +19,8 @@ > - #include <asm/hardware/gic.h> > - #include <asm/hardware/cache-l2x0.h> > - > -+#include <plat/irqs.h> > -+ > - #include <mach/hardware.h> > - #include <mach/omap4-common.h> > - > -@@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr; > - > - void __init gic_init_irq(void) > - { > -- void __iomem *gic_cpu_base; > -- > - /* Static mapping, never released */ > - gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); > - BUG_ON(!gic_dist_base_addr); > - > - /* Static mapping, never released */ > -- gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); > -- BUG_ON(!gic_cpu_base); > -+ omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); > -+ BUG_ON(!omap_irq_base); > - > -- gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); > -+ gic_init(0, 29, gic_dist_base_addr, omap_irq_base); > - } > - > - #ifdef CONFIG_CACHE_L2X0 > -diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat- > omap/include/plat/irqs.h > -index 5a25098..c884320 100644 > ---- a/arch/arm/plat-omap/include/plat/irqs.h > -+++ b/arch/arm/plat-omap/include/plat/irqs.h > -@@ -428,7 +428,11 @@ > - #define INTCPS_NR_IRQS 96 > - > - #ifndef __ASSEMBLY__ > --extern void omap_init_irq(void); > -+extern void __iomem *omap_irq_base; > -+void omap1_init_irq(void); > -+void omap2_init_irq(void); > -+void omap3_init_irq(void); > -+void ti816x_init_irq(void); > - extern int omap_irq_pending(void); > - void omap_intc_save_context(void); > - void omap_intc_restore_context(void); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0004-omap-Set- > separate-timer-init-functions-to-avoid-cpu_.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid- > cpu_.patch > deleted file mode 100644 > index 8fbbc47..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0004-omap-Set-separate- > timer-init-functions-to-avoid-cpu_.patch > +++ /dev/null > @@ -1,689 +0,0 @@ > -From b623b767d19edcc2d08909b044e1ab57956d9d49 Mon Sep 17 > 00:00:00 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:48 -0700 > -Subject: [PATCH 004/149] omap: Set separate timer init functions to avoid > cpu_is_omap tests > - > -This is needed for the following patches so we can initialize the > -rest of the hardware timers later on. > - > -As with the init_irq calls, there's no need to do cpu_is_omap calls > -during the timer init as we only care about the major omap generation. > -This means that we can initialize the sys_timer with the .timer > -entries alone. > - > -Note that for now we just set stubs for the various sys_timer entries > -that will get populated in a later patch. The following patches will > -also remove the omap_dm_timer_init calls and change the init for the > -rest of the hardware timers to happen with an arch_initcall. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap1/board-ams-delta.c | 2 +- > - arch/arm/mach-omap1/board-fsample.c | 2 +- > - arch/arm/mach-omap1/board-generic.c | 2 +- > - arch/arm/mach-omap1/board-h2.c | 2 +- > - arch/arm/mach-omap1/board-h3.c | 2 +- > - arch/arm/mach-omap1/board-htcherald.c | 2 +- > - arch/arm/mach-omap1/board-innovator.c | 2 +- > - arch/arm/mach-omap1/board-nokia770.c | 2 +- > - arch/arm/mach-omap1/board-osk.c | 2 +- > - arch/arm/mach-omap1/board-palmte.c | 2 +- > - arch/arm/mach-omap1/board-palmtt.c | 2 +- > - arch/arm/mach-omap1/board-palmz71.c | 2 +- > - arch/arm/mach-omap1/board-perseus2.c | 2 +- > - arch/arm/mach-omap1/board-sx1.c | 2 +- > - arch/arm/mach-omap1/board-voiceblue.c | 2 +- > - arch/arm/mach-omap1/time.c | 6 ++-- > - arch/arm/mach-omap2/board-2430sdp.c | 2 +- > - arch/arm/mach-omap2/board-3430sdp.c | 2 +- > - arch/arm/mach-omap2/board-3630sdp.c | 2 +- > - arch/arm/mach-omap2/board-4430sdp.c | 2 +- > - arch/arm/mach-omap2/board-am3517crane.c | 2 +- > - arch/arm/mach-omap2/board-am3517evm.c | 2 +- > - arch/arm/mach-omap2/board-apollon.c | 2 +- > - arch/arm/mach-omap2/board-cm-t35.c | 2 +- > - arch/arm/mach-omap2/board-cm-t3517.c | 2 +- > - arch/arm/mach-omap2/board-devkit8000.c | 2 +- > - arch/arm/mach-omap2/board-generic.c | 2 +- > - arch/arm/mach-omap2/board-h4.c | 2 +- > - arch/arm/mach-omap2/board-igep0020.c | 4 +- > - arch/arm/mach-omap2/board-ldp.c | 2 +- > - arch/arm/mach-omap2/board-n8x0.c | 6 ++-- > - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- > - arch/arm/mach-omap2/board-omap3evm.c | 2 +- > - arch/arm/mach-omap2/board-omap3logic.c | 4 +- > - arch/arm/mach-omap2/board-omap3pandora.c | 2 +- > - arch/arm/mach-omap2/board-omap3stalker.c | 2 +- > - arch/arm/mach-omap2/board-omap3touchbook.c | 2 +- > - arch/arm/mach-omap2/board-omap4panda.c | 2 +- > - arch/arm/mach-omap2/board-overo.c | 2 +- > - arch/arm/mach-omap2/board-rm680.c | 2 +- > - arch/arm/mach-omap2/board-rx51.c | 2 +- > - arch/arm/mach-omap2/board-ti8168evm.c | 2 +- > - arch/arm/mach-omap2/board-zoom.c | 4 +- > - arch/arm/mach-omap2/timer-gp.c | 41 +++++++++++++++++++++---- > --- > - arch/arm/plat-omap/include/plat/common.h | 6 +++- > - arch/arm/plat-omap/include/plat/dmtimer.h | 1 - > - 46 files changed, 86 insertions(+), 62 deletions(-) > - > -diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach- > omap1/board-ams-delta.c > -index e3caef8..312ea6b 100644 > ---- a/arch/arm/mach-omap1/board-ams-delta.c > -+++ b/arch/arm/mach-omap1/board-ams-delta.c > -@@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") > - .reserve = omap_reserve, > - .init_irq = ams_delta_init_irq, > - .init_machine = ams_delta_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > - > - EXPORT_SYMBOL(ams_delta_latch1_write); > -diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach- > omap1/board-fsample.c > -index eaff305..a6b1bea 100644 > ---- a/arch/arm/mach-omap1/board-fsample.c > -+++ b/arch/arm/mach-omap1/board-fsample.c > -@@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F- > Sample") > - .reserve = omap_reserve, > - .init_irq = omap_fsample_init_irq, > - .init_machine = omap_fsample_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach- > omap1/board-generic.c > -index 3fd6b40..04fc356 100644 > ---- a/arch/arm/mach-omap1/board-generic.c > -+++ b/arch/arm/mach-omap1/board-generic.c > -@@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic > OMAP1510/1610/1710") > - .reserve = omap_reserve, > - .init_irq = omap_generic_init_irq, > - .init_machine = omap_generic_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach- > omap1/board-h2.c > -index 8147b04..cb7fb1a 100644 > ---- a/arch/arm/mach-omap1/board-h2.c > -+++ b/arch/arm/mach-omap1/board-h2.c > -@@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2") > - .reserve = omap_reserve, > - .init_irq = h2_init_irq, > - .init_machine = h2_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach- > omap1/board-h3.c > -index 1b448f6..31f3487 100644 > ---- a/arch/arm/mach-omap1/board-h3.c > -+++ b/arch/arm/mach-omap1/board-h3.c > -@@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 > board") > - .reserve = omap_reserve, > - .init_irq = h3_init_irq, > - .init_machine = h3_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach- > omap1/board-htcherald.c > -index 1bd4d8e..36e06ea 100644 > ---- a/arch/arm/mach-omap1/board-htcherald.c > -+++ b/arch/arm/mach-omap1/board-htcherald.c > -@@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald") > - .reserve = omap_reserve, > - .init_irq = htcherald_init_irq, > - .init_machine = htcherald_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach- > omap1/board-innovator.c > -index 5926b0c..0b1ba46 100644 > ---- a/arch/arm/mach-omap1/board-innovator.c > -+++ b/arch/arm/mach-omap1/board-innovator.c > -@@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI- > Innovator") > - .reserve = omap_reserve, > - .init_irq = innovator_init_irq, > - .init_machine = innovator_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach- > omap1/board-nokia770.c > -index e3cf21d..5469ce2 100644 > ---- a/arch/arm/mach-omap1/board-nokia770.c > -+++ b/arch/arm/mach-omap1/board-nokia770.c > -@@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770") > - .reserve = omap_reserve, > - .init_irq = omap_nokia770_init_irq, > - .init_machine = omap_nokia770_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach- > omap1/board-osk.c > -index 1e7823d..b08a213 100644 > ---- a/arch/arm/mach-omap1/board-osk.c > -+++ b/arch/arm/mach-omap1/board-osk.c > -@@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK") > - .reserve = omap_reserve, > - .init_irq = osk_init_irq, > - .init_machine = osk_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach- > omap1/board-palmte.c > -index 8b6a881..459cb6b 100644 > ---- a/arch/arm/mach-omap1/board-palmte.c > -+++ b/arch/arm/mach-omap1/board-palmte.c > -@@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based > Palm Tungsten E") > - .reserve = omap_reserve, > - .init_irq = omap_palmte_init_irq, > - .init_machine = omap_palmte_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach- > omap1/board-palmtt.c > -index f2de43d..b214f45 100644 > ---- a/arch/arm/mach-omap1/board-palmtt.c > -+++ b/arch/arm/mach-omap1/board-palmtt.c > -@@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 > based Palm Tungsten|T") > - .reserve = omap_reserve, > - .init_irq = omap_palmtt_init_irq, > - .init_machine = omap_palmtt_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach- > omap1/board-palmz71.c > -index 6665d2d..9b0ea48 100644 > ---- a/arch/arm/mach-omap1/board-palmz71.c > -+++ b/arch/arm/mach-omap1/board-palmz71.c > -@@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 > based Palm Zire71") > - .reserve = omap_reserve, > - .init_irq = omap_palmz71_init_irq, > - .init_machine = omap_palmz71_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach- > omap1/board-perseus2.c > -index 7f019e5..67acd41 100644 > ---- a/arch/arm/mach-omap1/board-perseus2.c > -+++ b/arch/arm/mach-omap1/board-perseus2.c > -@@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 > Perseus2") > - .reserve = omap_reserve, > - .init_irq = omap_perseus2_init_irq, > - .init_machine = omap_perseus2_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach- > omap1/board-sx1.c > -index 24f0f7b..9c3b7c5 100644 > ---- a/arch/arm/mach-omap1/board-sx1.c > -+++ b/arch/arm/mach-omap1/board-sx1.c > -@@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens > SX1") > - .reserve = omap_reserve, > - .init_irq = omap_sx1_init_irq, > - .init_machine = omap_sx1_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach- > omap1/board-voiceblue.c > -index 98826e2..036edc0e 100644 > ---- a/arch/arm/mach-omap1/board-voiceblue.c > -+++ b/arch/arm/mach-omap1/board-voiceblue.c > -@@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue > OMAP5910") > - .reserve = omap_reserve, > - .init_irq = voiceblue_init_irq, > - .init_machine = voiceblue_init, > -- .timer = &omap_timer, > -+ .timer = &omap1_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c > -index 03e1e10..a183777 100644 > ---- a/arch/arm/mach-omap1/time.c > -+++ b/arch/arm/mach-omap1/time.c > -@@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void) > - * Timer initialization > - * --------------------------------------------------------------------------- > - */ > --static void __init omap_timer_init(void) > -+static void __init omap1_timer_init(void) > - { > - if (omap_32k_timer_usable()) { > - preferred_sched_clock_init(1); > -@@ -307,6 +307,6 @@ static void __init omap_timer_init(void) > - } > - } > - > --struct sys_timer omap_timer = { > -- .init = omap_timer_init, > -+struct sys_timer omap1_timer = { > -+ .init = omap1_timer_init, > - }; > -diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach- > omap2/board-2430sdp.c > -index 45cabc5..2028464 100644 > ---- a/arch/arm/mach-omap2/board-2430sdp.c > -+++ b/arch/arm/mach-omap2/board-2430sdp.c > -@@ -262,5 +262,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 > sdp2430 board") > - .init_early = omap_2430sdp_init_early, > - .init_irq = omap2_init_irq, > - .init_machine = omap_2430sdp_init, > -- .timer = &omap_timer, > -+ .timer = &omap2_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach- > omap2/board-3430sdp.c > -index 85b207f..12fae21 100644 > ---- a/arch/arm/mach-omap2/board-3430sdp.c > -+++ b/arch/arm/mach-omap2/board-3430sdp.c > -@@ -806,5 +806,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 > 3430SDP board") > - .init_early = omap_3430sdp_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap_3430sdp_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach- > omap2/board-3630sdp.c > -index 2ec2d76..e4f37b5 100644 > ---- a/arch/arm/mach-omap2/board-3630sdp.c > -+++ b/arch/arm/mach-omap2/board-3630sdp.c > -@@ -221,5 +221,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP > board") > - .init_early = omap_sdp_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap_sdp_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach- > omap2/board-4430sdp.c > -index 39a8062..e8caced 100644 > ---- a/arch/arm/mach-omap2/board-4430sdp.c > -+++ b/arch/arm/mach-omap2/board-4430sdp.c > -@@ -768,5 +768,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 > 4430SDP board") > - .init_early = omap_4430sdp_init_early, > - .init_irq = gic_init_irq, > - .init_machine = omap_4430sdp_init, > -- .timer = &omap_timer, > -+ .timer = &omap4_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach- > omap2/board-am3517crane.c > -index 0bed0a4..5f2b55f 100644 > ---- a/arch/arm/mach-omap2/board-am3517crane.c > -+++ b/arch/arm/mach-omap2/board-am3517crane.c > -@@ -106,5 +106,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 > CRANEBOARD") > - .init_early = am3517_crane_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = am3517_crane_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach- > omap2/board-am3517evm.c > -index 0db0fb8..f3006c3 100644 > ---- a/arch/arm/mach-omap2/board-am3517evm.c > -+++ b/arch/arm/mach-omap2/board-am3517evm.c > -@@ -496,5 +496,5 @@ MACHINE_START(OMAP3517EVM, > "OMAP3517/AM3517 EVM") > - .init_early = am3517_evm_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = am3517_evm_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach- > omap2/board-apollon.c > -index 93576c8..7021170 100644 > ---- a/arch/arm/mach-omap2/board-apollon.c > -+++ b/arch/arm/mach-omap2/board-apollon.c > -@@ -356,5 +356,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx > Apollon") > - .init_early = omap_apollon_init_early, > - .init_irq = omap2_init_irq, > - .init_machine = omap_apollon_init, > -- .timer = &omap_timer, > -+ .timer = &omap2_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach- > omap2/board-cm-t35.c > -index 43b1de5..1a18d3b 100644 > ---- a/arch/arm/mach-omap2/board-cm-t35.c > -+++ b/arch/arm/mach-omap2/board-cm-t35.c > -@@ -646,5 +646,5 @@ MACHINE_START(CM_T35, "Compulab CM-T35") > - .init_early = cm_t35_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = cm_t35_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach- > omap2/board-cm-t3517.c > -index 8f15222..aa67240 100644 > ---- a/arch/arm/mach-omap2/board-cm-t3517.c > -+++ b/arch/arm/mach-omap2/board-cm-t3517.c > -@@ -306,5 +306,5 @@ MACHINE_START(CM_T3517, "Compulab CM- > T3517") > - .init_early = cm_t3517_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = cm_t3517_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach- > omap2/board-devkit8000.c > -index 73f3a22..46d144d 100644 > ---- a/arch/arm/mach-omap2/board-devkit8000.c > -+++ b/arch/arm/mach-omap2/board-devkit8000.c > -@@ -709,5 +709,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 > Devkit8000") > - .init_early = devkit8000_init_early, > - .init_irq = devkit8000_init_irq, > - .init_machine = devkit8000_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_secure_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach- > omap2/board-generic.c > -index ccd503a..c6ecf60 100644 > ---- a/arch/arm/mach-omap2/board-generic.c > -+++ b/arch/arm/mach-omap2/board-generic.c > -@@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic > OMAP24xx") > - .init_early = omap_generic_init_early, > - .init_irq = omap2_init_irq, > - .init_machine = omap_generic_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach- > omap2/board-h4.c > -index 2e16d6c..45de2b3 100644 > ---- a/arch/arm/mach-omap2/board-h4.c > -+++ b/arch/arm/mach-omap2/board-h4.c > -@@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 > board") > - .init_early = omap_h4_init_early, > - .init_irq = omap_h4_init_irq, > - .init_machine = omap_h4_init, > -- .timer = &omap_timer, > -+ .timer = &omap2_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach- > omap2/board-igep0020.c > -index f22a76a..f683835 100644 > ---- a/arch/arm/mach-omap2/board-igep0020.c > -+++ b/arch/arm/mach-omap2/board-igep0020.c > -@@ -708,7 +708,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") > - .init_early = igep_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = igep_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > - > - MACHINE_START(IGEP0030, "IGEP OMAP3 module") > -@@ -718,5 +718,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") > - .init_early = igep_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = igep_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach- > omap2/board-ldp.c > -index 9671843..5d4328f 100644 > ---- a/arch/arm/mach-omap2/board-ldp.c > -+++ b/arch/arm/mach-omap2/board-ldp.c > -@@ -350,5 +350,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") > - .init_early = omap_ldp_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap_ldp_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach- > omap2/board-n8x0.c > -index 9c791a2..e11f0c5 100644 > ---- a/arch/arm/mach-omap2/board-n8x0.c > -+++ b/arch/arm/mach-omap2/board-n8x0.c > -@@ -701,7 +701,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") > - .init_early = n8x0_init_early, > - .init_irq = omap2_init_irq, > - .init_machine = n8x0_init_machine, > -- .timer = &omap_timer, > -+ .timer = &omap2_timer, > - MACHINE_END > - > - MACHINE_START(NOKIA_N810, "Nokia N810") > -@@ -711,7 +711,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") > - .init_early = n8x0_init_early, > - .init_irq = omap2_init_irq, > - .init_machine = n8x0_init_machine, > -- .timer = &omap_timer, > -+ .timer = &omap2_timer, > - MACHINE_END > - > - MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") > -@@ -721,5 +721,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia > N810 WiMAX") > - .init_early = n8x0_init_early, > - .init_irq = omap2_init_irq, > - .init_machine = n8x0_init_machine, > -- .timer = &omap_timer, > -+ .timer = &omap2_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index eaead5e..9ee16f6 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -596,5 +596,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle > Board") > - .init_early = omap3_beagle_init_early, > - .init_irq = omap3_beagle_init_irq, > - .init_machine = omap3_beagle_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_secure_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > -index d39f53f..6f957ed 100644 > ---- a/arch/arm/mach-omap2/board-omap3evm.c > -+++ b/arch/arm/mach-omap2/board-omap3evm.c > -@@ -741,5 +741,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") > - .init_early = omap3_evm_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap3_evm_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach- > omap2/board-omap3logic.c > -index b63f1c2..469259a 100644 > ---- a/arch/arm/mach-omap2/board-omap3logic.c > -+++ b/arch/arm/mach-omap2/board-omap3logic.c > -@@ -215,7 +215,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 > Torpedo board") > - .init_early = omap3logic_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap3logic_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > - > - MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") > -@@ -224,5 +224,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic > 3530 LV SOM board") > - .init_early = omap3logic_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap3logic_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach- > omap2/board-omap3pandora.c > -index 1d90b90..d4ea940 100644 > ---- a/arch/arm/mach-omap2/board-omap3pandora.c > -+++ b/arch/arm/mach-omap2/board-omap3pandora.c > -@@ -652,5 +652,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora > Handheld Console") > - .init_early = omap3pandora_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap3pandora_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach- > omap2/board-omap3stalker.c > -index dfa1401..2fa8fae 100644 > ---- a/arch/arm/mach-omap2/board-omap3stalker.c > -+++ b/arch/arm/mach-omap2/board-omap3stalker.c > -@@ -557,5 +557,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") > - .init_early = omap3_stalker_init_early, > - .init_irq = omap3_stalker_init_irq, > - .init_machine = omap3_stalker_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_secure_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c > b/arch/arm/mach-omap2/board-omap3touchbook.c > -index ae97910..8c71fd2 100644 > ---- a/arch/arm/mach-omap2/board-omap3touchbook.c > -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c > -@@ -449,5 +449,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook > Board") > - .init_early = omap3_touchbook_init_early, > - .init_irq = omap3_touchbook_init_irq, > - .init_machine = omap3_touchbook_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_secure_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach- > omap2/board-omap4panda.c > -index 6d2372b..dc1d6dc 100644 > ---- a/arch/arm/mach-omap2/board-omap4panda.c > -+++ b/arch/arm/mach-omap2/board-omap4panda.c > -@@ -712,5 +712,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda > board") > - .init_early = omap4_panda_init_early, > - .init_irq = gic_init_irq, > - .init_machine = omap4_panda_init, > -- .timer = &omap_timer, > -+ .timer = &omap4_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index e3928f23..1bf2f39 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -617,5 +617,5 @@ MACHINE_START(OVERO, "Gumstix Overo") > - .init_early = overo_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = overo_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach- > omap2/board-rm680.c > -index 9c3d115..54dceb1 100644 > ---- a/arch/arm/mach-omap2/board-rm680.c > -+++ b/arch/arm/mach-omap2/board-rm680.c > -@@ -165,5 +165,5 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 > board") > - .init_early = rm680_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = rm680_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach- > omap2/board-rx51.c > -index ee35e4e..5ea142f 100644 > ---- a/arch/arm/mach-omap2/board-rx51.c > -+++ b/arch/arm/mach-omap2/board-rx51.c > -@@ -162,5 +162,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") > - .init_early = rx51_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = rx51_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach- > omap2/board-ti8168evm.c > -index 713c20f..a85d5b0 100644 > ---- a/arch/arm/mach-omap2/board-ti8168evm.c > -+++ b/arch/arm/mach-omap2/board-ti8168evm.c > -@@ -52,6 +52,6 @@ MACHINE_START(TI8168EVM, "ti8168evm") > - .map_io = ti8168_evm_map_io, > - .init_early = ti8168_init_early, > - .init_irq = ti816x_init_irq, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - .init_machine = ti8168_evm_init, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach- > omap2/board-zoom.c > -index 97a3f0b..8a98c3c 100644 > ---- a/arch/arm/mach-omap2/board-zoom.c > -+++ b/arch/arm/mach-omap2/board-zoom.c > -@@ -139,7 +139,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 > board") > - .init_early = omap_zoom_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap_zoom_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > - > - MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") > -@@ -149,5 +149,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 > board") > - .init_early = omap_zoom_init_early, > - .init_irq = omap3_init_irq, > - .init_machine = omap_zoom_init, > -- .timer = &omap_timer, > -+ .timer = &omap3_timer, > - MACHINE_END > -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer- > gp.c > -index 3b9cf85..a0d8e83 100644 > ---- a/arch/arm/mach-omap2/timer-gp.c > -+++ b/arch/arm/mach-omap2/timer-gp.c > -@@ -247,20 +247,41 @@ static void __init omap2_gp_clocksource_init(void) > - } > - #endif > - > --static void __init omap2_gp_timer_init(void) > -+#define OMAP_SYS_TIMER_INIT(name) > \ > -+static void __init omap##name##_timer_init(void) \ > -+{ \ > -+ omap_dm_timer_init(); \ > -+ omap2_gp_clockevent_init(); \ > -+ omap2_gp_clocksource_init(); \ > -+} > -+ > -+#define OMAP_SYS_TIMER(name) > \ > -+struct sys_timer omap##name##_timer = { > \ > -+ .init = omap##name##_timer_init, \ > -+}; > -+ > -+#ifdef CONFIG_ARCH_OMAP2 > -+OMAP_SYS_TIMER_INIT(2) > -+OMAP_SYS_TIMER(2) > -+#endif > -+ > -+#ifdef CONFIG_ARCH_OMAP3 > -+OMAP_SYS_TIMER_INIT(3) > -+OMAP_SYS_TIMER(3) > -+OMAP_SYS_TIMER_INIT(3_secure) > -+OMAP_SYS_TIMER(3_secure) > -+#endif > -+ > -+#ifdef CONFIG_ARCH_OMAP4 > -+static void __init omap4_timer_init(void) > - { > - #ifdef CONFIG_LOCAL_TIMERS > -- if (cpu_is_omap44xx()) { > -- twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, > SZ_256); > -- BUG_ON(!twd_base); > -- } > -+ twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); > -+ BUG_ON(!twd_base); > - #endif > - omap_dm_timer_init(); > -- > - omap2_gp_clockevent_init(); > - omap2_gp_clocksource_init(); > - } > -- > --struct sys_timer omap_timer = { > -- .init = omap2_gp_timer_init, > --}; > -+OMAP_SYS_TIMER(4) > -+#endif > -diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat- > omap/include/plat/common.h > -index 5288130..4564cc6 100644 > ---- a/arch/arm/plat-omap/include/plat/common.h > -+++ b/arch/arm/plat-omap/include/plat/common.h > -@@ -34,7 +34,11 @@ > - struct sys_timer; > - > - extern void omap_map_common_io(void); > --extern struct sys_timer omap_timer; > -+extern struct sys_timer omap1_timer; > -+extern struct sys_timer omap2_timer; > -+extern struct sys_timer omap3_timer; > -+extern struct sys_timer omap3_secure_timer; > -+extern struct sys_timer omap4_timer; > - extern bool omap_32k_timer_init(void); > - extern int __init omap_init_clocksource_32k(void); > - extern unsigned long long notrace omap_32k_sched_clock(void); > -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat- > omap/include/plat/dmtimer.h > -index d6c70d2..330bd17 100644 > ---- a/arch/arm/plat-omap/include/plat/dmtimer.h > -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h > -@@ -57,7 +57,6 @@ > - #define OMAP_TIMER_IP_VERSION_1 0x1 > - struct omap_dm_timer; > - extern struct omap_dm_timer *gptimer_wakeup; > --extern struct sys_timer omap_timer; > - struct clk; > - > - int omap_dm_timer_init(void); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0005-omap-Move- > dmtimer-defines-to-dmtimer.h.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch > deleted file mode 100644 > index ba3bc42..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0005-omap-Move- > dmtimer-defines-to-dmtimer.h.patch > +++ /dev/null > @@ -1,287 +0,0 @@ > -From 99573b33f37eede2d3d36ae71c34f5d72ccdc672 Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:48 -0700 > -Subject: [PATCH 005/149] omap: Move dmtimer defines to dmtimer.h > - > -These will be needed when dmtimer platform init code gets split > -for omap1 and omap2+. These will also be needed for separate > -sys_timer init and driver init for the rest of the hardware timers > -in the following patches. No functional changes. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/plat-omap/dmtimer.c | 121 ---------------------------- > - arch/arm/plat-omap/include/plat/dmtimer.h | 125 > +++++++++++++++++++++++++++++ > - 2 files changed, 125 insertions(+), 121 deletions(-) > - > -diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c > -index ee9f6eb..dfdc3b2 100644 > ---- a/arch/arm/plat-omap/dmtimer.c > -+++ b/arch/arm/plat-omap/dmtimer.c > -@@ -41,127 +41,6 @@ > - #include <plat/dmtimer.h> > - #include <mach/irqs.h> > - > --/* register offsets */ > --#define _OMAP_TIMER_ID_OFFSET 0x00 > --#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 > --#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 > --#define _OMAP_TIMER_STAT_OFFSET 0x18 > --#define _OMAP_TIMER_INT_EN_OFFSET 0x1c > --#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 > --#define _OMAP_TIMER_CTRL_OFFSET 0x24 > --#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) > --#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) > --#define OMAP_TIMER_CTRL_PT (1 << 12) > --#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) > --#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) > --#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) > --#define OMAP_TIMER_CTRL_SCPWM (1 << 7) > --#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare > enable */ > --#define OMAP_TIMER_CTRL_PRE (1 << 5) /* > prescaler enable */ > --#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value > shift */ > --#define OMAP_TIMER_CTRL_POSTED (1 << 2) > --#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto- > reload enable */ > --#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer > */ > --#define _OMAP_TIMER_COUNTER_OFFSET 0x28 > --#define _OMAP_TIMER_LOAD_OFFSET 0x2c > --#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 > --#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 > --#define WP_NONE 0 /* no write > pending bit */ > --#define WP_TCLR (1 << 0) > --#define WP_TCRR (1 << 1) > --#define WP_TLDR (1 << 2) > --#define WP_TTGR (1 << 3) > --#define WP_TMAR (1 << 4) > --#define WP_TPIR (1 << 5) > --#define WP_TNIR (1 << 6) > --#define WP_TCVR (1 << 7) > --#define WP_TOCR (1 << 8) > --#define WP_TOWR (1 << 9) > --#define _OMAP_TIMER_MATCH_OFFSET 0x38 > --#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c > --#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 > --#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, > 34xx only */ > --#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx > only */ > --#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx > only */ > --#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx > only */ > --#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx > only */ > --#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* > TOWR, 34xx only */ > -- > --/* register offsets with the write pending bit encoded */ > --#define WPSHIFT 16 > -- > --#define OMAP_TIMER_ID_REG > (_OMAP_TIMER_ID_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_OCP_CFG_REG > (_OMAP_TIMER_OCP_CFG_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_SYS_STAT_REG > (_OMAP_TIMER_SYS_STAT_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_STAT_REG > (_OMAP_TIMER_STAT_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_INT_EN_REG > (_OMAP_TIMER_INT_EN_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_WAKEUP_EN_REG > (_OMAP_TIMER_WAKEUP_EN_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_CTRL_REG > (_OMAP_TIMER_CTRL_OFFSET \ > -- | (WP_TCLR << > WPSHIFT)) > -- > --#define OMAP_TIMER_COUNTER_REG > (_OMAP_TIMER_COUNTER_OFFSET \ > -- | (WP_TCRR << > WPSHIFT)) > -- > --#define OMAP_TIMER_LOAD_REG > (_OMAP_TIMER_LOAD_OFFSET \ > -- | (WP_TLDR << > WPSHIFT)) > -- > --#define OMAP_TIMER_TRIGGER_REG > (_OMAP_TIMER_TRIGGER_OFFSET \ > -- | (WP_TTGR << > WPSHIFT)) > -- > --#define OMAP_TIMER_WRITE_PEND_REG > (_OMAP_TIMER_WRITE_PEND_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_MATCH_REG > (_OMAP_TIMER_MATCH_OFFSET \ > -- | (WP_TMAR << > WPSHIFT)) > -- > --#define OMAP_TIMER_CAPTURE_REG > (_OMAP_TIMER_CAPTURE_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_IF_CTRL_REG > (_OMAP_TIMER_IF_CTRL_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_CAPTURE2_REG > (_OMAP_TIMER_CAPTURE2_OFFSET \ > -- | (WP_NONE << > WPSHIFT)) > -- > --#define OMAP_TIMER_TICK_POS_REG > (_OMAP_TIMER_TICK_POS_OFFSET \ > -- | (WP_TPIR << > WPSHIFT)) > -- > --#define OMAP_TIMER_TICK_NEG_REG > (_OMAP_TIMER_TICK_NEG_OFFSET \ > -- | (WP_TNIR << > WPSHIFT)) > -- > --#define OMAP_TIMER_TICK_COUNT_REG > (_OMAP_TIMER_TICK_COUNT_OFFSET \ > -- | (WP_TCVR << > WPSHIFT)) > -- > --#define OMAP_TIMER_TICK_INT_MASK_SET_REG > \ > -- (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR > << WPSHIFT)) > -- > --#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG > \ > -- (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | > (WP_TOWR << WPSHIFT)) > -- > --struct omap_dm_timer { > -- unsigned long phys_base; > -- int irq; > --#ifdef CONFIG_ARCH_OMAP2PLUS > -- struct clk *iclk, *fclk; > --#endif > -- void __iomem *io_base; > -- unsigned reserved:1; > -- unsigned enabled:1; > -- unsigned posted:1; > --}; > -- > - static int dm_timer_count; > - > - #ifdef CONFIG_ARCH_OMAP1 > -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat- > omap/include/plat/dmtimer.h > -index 330bd17..3203105 100644 > ---- a/arch/arm/plat-omap/include/plat/dmtimer.h > -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h > -@@ -92,5 +92,130 @@ void omap_dm_timer_write_counter(struct > omap_dm_timer *timer, unsigned int value > - > - int omap_dm_timers_active(void); > - > -+/* > -+ * Do not use the defines below, they are not needed. They should be only > -+ * used by dmtimer.c and sys_timer related code. > -+ */ > -+ > -+/* register offsets */ > -+#define _OMAP_TIMER_ID_OFFSET 0x00 > -+#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 > -+#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 > -+#define _OMAP_TIMER_STAT_OFFSET 0x18 > -+#define _OMAP_TIMER_INT_EN_OFFSET 0x1c > -+#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 > -+#define _OMAP_TIMER_CTRL_OFFSET 0x24 > -+#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) > -+#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) > -+#define OMAP_TIMER_CTRL_PT (1 << 12) > -+#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) > -+#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) > -+#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) > -+#define OMAP_TIMER_CTRL_SCPWM (1 << 7) > -+#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare > enable */ > -+#define OMAP_TIMER_CTRL_PRE (1 << 5) /* > prescaler enable */ > -+#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value > shift */ > -+#define OMAP_TIMER_CTRL_POSTED (1 << 2) > -+#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto- > reload enable */ > -+#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer > */ > -+#define _OMAP_TIMER_COUNTER_OFFSET 0x28 > -+#define _OMAP_TIMER_LOAD_OFFSET 0x2c > -+#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 > -+#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 > -+#define WP_NONE 0 /* no write > pending bit */ > -+#define WP_TCLR (1 << 0) > -+#define WP_TCRR (1 << 1) > -+#define WP_TLDR (1 << 2) > -+#define WP_TTGR (1 << 3) > -+#define WP_TMAR (1 << 4) > -+#define WP_TPIR (1 << 5) > -+#define WP_TNIR (1 << 6) > -+#define WP_TCVR (1 << 7) > -+#define WP_TOCR (1 << 8) > -+#define WP_TOWR (1 << 9) > -+#define _OMAP_TIMER_MATCH_OFFSET 0x38 > -+#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c > -+#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 > -+#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, > 34xx only */ > -+#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx > only */ > -+#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx > only */ > -+#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx > only */ > -+#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx > only */ > -+#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* > TOWR, 34xx only */ > -+ > -+/* register offsets with the write pending bit encoded */ > -+#define WPSHIFT 16 > -+ > -+#define OMAP_TIMER_ID_REG > (_OMAP_TIMER_ID_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_OCP_CFG_REG > (_OMAP_TIMER_OCP_CFG_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_SYS_STAT_REG > (_OMAP_TIMER_SYS_STAT_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_STAT_REG > (_OMAP_TIMER_STAT_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_INT_EN_REG > (_OMAP_TIMER_INT_EN_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_WAKEUP_EN_REG > (_OMAP_TIMER_WAKEUP_EN_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_CTRL_REG > (_OMAP_TIMER_CTRL_OFFSET \ > -+ | (WP_TCLR << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_COUNTER_REG > (_OMAP_TIMER_COUNTER_OFFSET \ > -+ | (WP_TCRR << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_LOAD_REG > (_OMAP_TIMER_LOAD_OFFSET \ > -+ | (WP_TLDR << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_TRIGGER_REG > (_OMAP_TIMER_TRIGGER_OFFSET \ > -+ | (WP_TTGR << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_WRITE_PEND_REG > (_OMAP_TIMER_WRITE_PEND_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_MATCH_REG > (_OMAP_TIMER_MATCH_OFFSET \ > -+ | (WP_TMAR << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_CAPTURE_REG > (_OMAP_TIMER_CAPTURE_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_IF_CTRL_REG > (_OMAP_TIMER_IF_CTRL_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_CAPTURE2_REG > (_OMAP_TIMER_CAPTURE2_OFFSET \ > -+ | (WP_NONE << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_TICK_POS_REG > (_OMAP_TIMER_TICK_POS_OFFSET \ > -+ | (WP_TPIR << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_TICK_NEG_REG > (_OMAP_TIMER_TICK_NEG_OFFSET \ > -+ | (WP_TNIR << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_TICK_COUNT_REG > (_OMAP_TIMER_TICK_COUNT_OFFSET \ > -+ | (WP_TCVR << > WPSHIFT)) > -+ > -+#define OMAP_TIMER_TICK_INT_MASK_SET_REG > \ > -+ (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR > << WPSHIFT)) > -+ > -+#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG > \ > -+ (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | > (WP_TOWR << WPSHIFT)) > -+ > -+struct omap_dm_timer { > -+ unsigned long phys_base; > -+ int irq; > -+#ifdef CONFIG_ARCH_OMAP2PLUS > -+ struct clk *iclk, *fclk; > -+#endif > -+ void __iomem *io_base; > -+ unsigned reserved:1; > -+ unsigned enabled:1; > -+ unsigned posted:1; > -+}; > - > - #endif /* __ASM_ARCH_DMTIMER_H */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0006-omap-Make-a- > subset-of-dmtimer-functions-into-inline-.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into- > inline-.patch > deleted file mode 100644 > index 36a9142..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0006-omap-Make-a-subset- > of-dmtimer-functions-into-inline-.patch > +++ /dev/null > @@ -1,323 +0,0 @@ > -From 902f3165afa284d4bd6ff22db7654318c98a5ce0 Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:48 -0700 > -Subject: [PATCH 006/149] omap: Make a subset of dmtimer functions into > inline functions > - > -This will allow us to share the code between system timer and > -dmtimer device driver code without having to initialize all the > -dmtimers early. This change will also make the timer_set_next_event > -more efficient as the inline functions will optimize the code > -better for the timer reprogramming. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/plat-omap/dmtimer.c | 78 ++++--------------- > - arch/arm/plat-omap/include/plat/dmtimer.h | 119 > +++++++++++++++++++++++++++++ > - 2 files changed, 136 insertions(+), 61 deletions(-) > - > -diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c > -index dfdc3b2..7c5cb4e 100644 > ---- a/arch/arm/plat-omap/dmtimer.c > -+++ b/arch/arm/plat-omap/dmtimer.c > -@@ -170,11 +170,7 @@ static spinlock_t dm_timer_lock; > - */ > - static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, > u32 reg) > - { > -- if (timer->posted) > -- while (readl(timer->io_base + > (OMAP_TIMER_WRITE_PEND_REG & 0xff)) > -- & (reg >> WPSHIFT)) > -- cpu_relax(); > -- return readl(timer->io_base + (reg & 0xff)); > -+ return __omap_dm_timer_read(timer->io_base, reg, timer->posted); > - } > - > - /* > -@@ -186,11 +182,7 @@ static inline u32 omap_dm_timer_read_reg(struct > omap_dm_timer *timer, u32 reg) > - static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 > reg, > - u32 value) > - { > -- if (timer->posted) > -- while (readl(timer->io_base + > (OMAP_TIMER_WRITE_PEND_REG & 0xff)) > -- & (reg >> WPSHIFT)) > -- cpu_relax(); > -- writel(value, timer->io_base + (reg & 0xff)); > -+ __omap_dm_timer_write(timer->io_base, reg, value, timer->posted); > - } > - > - static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) > -@@ -209,7 +201,7 @@ static void omap_dm_timer_wait_for_reset(struct > omap_dm_timer *timer) > - > - static void omap_dm_timer_reset(struct omap_dm_timer *timer) > - { > -- u32 l; > -+ int autoidle = 0, wakeup = 0; > - > - if (!cpu_class_is_omap2() || timer != &dm_timers[0]) { > - omap_dm_timer_write_reg(timer, > OMAP_TIMER_IF_CTRL_REG, 0x06); > -@@ -217,28 +209,21 @@ static void omap_dm_timer_reset(struct > omap_dm_timer *timer) > - } > - omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); > - > -- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG); > -- l |= 0x02 << 3; /* Set to smart-idle mode */ > -- l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ > -- > - /* Enable autoidle on OMAP2 / OMAP3 */ > - if (cpu_is_omap24xx() || cpu_is_omap34xx()) > -- l |= 0x1 << 0; > -+ autoidle = 1; > - > - /* > - * Enable wake-up on OMAP2 CPUs. > - */ > - if (cpu_class_is_omap2()) > -- l |= 1 << 2; > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l); > -+ wakeup = 1; > - > -- /* Match hardware reset default of posted mode */ > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, > -- OMAP_TIMER_CTRL_POSTED); > -+ __omap_dm_timer_reset(timer->io_base, autoidle, wakeup); > - timer->posted = 1; > - } > - > --static void omap_dm_timer_prepare(struct omap_dm_timer *timer) > -+void omap_dm_timer_prepare(struct omap_dm_timer *timer) > - { > - omap_dm_timer_enable(timer); > - omap_dm_timer_reset(timer); > -@@ -410,25 +395,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start); > - > - void omap_dm_timer_stop(struct omap_dm_timer *timer) > - { > -- u32 l; > -+ unsigned long rate = 0; > - > -- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); > -- if (l & OMAP_TIMER_CTRL_ST) { > -- l &= ~0x1; > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, > l); > - #ifdef CONFIG_ARCH_OMAP2PLUS > -- /* Readback to make sure write has completed */ > -- omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); > -- /* > -- * Wait for functional clock period x 3.5 to make sure that > -- * timer is stopped > -- */ > -- udelay(3500000 / clk_get_rate(timer->fclk) + 1); > -+ rate = clk_get_rate(timer->fclk); > - #endif > -- } > -- /* Ack possibly pending interrupt */ > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, > -- OMAP_TIMER_INT_OVERFLOW); > -+ > -+ __omap_dm_timer_stop(timer->io_base, timer->posted, rate); > - } > - EXPORT_SYMBOL_GPL(omap_dm_timer_stop); > - > -@@ -451,22 +424,11 @@ > EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); > - > - int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) > - { > -- int ret = -EINVAL; > -- > - if (source < 0 || source >= 3) > - return -EINVAL; > - > -- clk_disable(timer->fclk); > -- ret = clk_set_parent(timer->fclk, dm_source_clocks[source]); > -- clk_enable(timer->fclk); > -- > -- /* > -- * When the functional clock disappears, too quick writes seem > -- * to cause an abort. XXX Is this still necessary? > -- */ > -- __delay(300000); > -- > -- return ret; > -+ return __omap_dm_timer_set_source(timer->fclk, > -+ dm_source_clocks[source]); > - } > - EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); > - > -@@ -504,8 +466,7 @@ void omap_dm_timer_set_load_start(struct > omap_dm_timer *timer, int autoreload, > - } > - l |= OMAP_TIMER_CTRL_ST; > - > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, > load); > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); > -+ __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted); > - } > - EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); > - > -@@ -558,8 +519,7 @@ > EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler); > - void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, > - unsigned int value) > - { > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value); > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, > value); > -+ __omap_dm_timer_int_enable(timer->io_base, value); > - } > - EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); > - > -@@ -575,17 +535,13 @@ > EXPORT_SYMBOL_GPL(omap_dm_timer_read_status); > - > - void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned > int value) > - { > -- omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); > -+ __omap_dm_timer_write_status(timer->io_base, value); > - } > - EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); > - > - unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) > - { > -- unsigned int l; > -- > -- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG); > -- > -- return l; > -+ return __omap_dm_timer_read_counter(timer->io_base, timer- > >posted); > - } > - EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); > - > -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat- > omap/include/plat/dmtimer.h > -index 3203105..54664a7 100644 > ---- a/arch/arm/plat-omap/include/plat/dmtimer.h > -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h > -@@ -32,6 +32,9 @@ > - * 675 Mass Ave, Cambridge, MA 02139, USA. > - */ > - > -+#include <linux/clk.h> > -+#include <linux/delay.h> > -+ > - #ifndef __ASM_ARCH_DMTIMER_H > - #define __ASM_ARCH_DMTIMER_H > - > -@@ -218,4 +221,120 @@ struct omap_dm_timer { > - unsigned posted:1; > - }; > - > -+void omap_dm_timer_prepare(struct omap_dm_timer *timer); > -+ > -+static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg, > -+ int posted) > -+{ > -+ if (posted) > -+ while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG > & 0xff)) > -+ & (reg >> WPSHIFT)) > -+ cpu_relax(); > -+ > -+ return __raw_readl(base + (reg & 0xff)); > -+} > -+ > -+static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, > u32 val, > -+ int posted) > -+{ > -+ if (posted) > -+ while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG > & 0xff)) > -+ & (reg >> WPSHIFT)) > -+ cpu_relax(); > -+ > -+ __raw_writel(val, base + (reg & 0xff)); > -+} > -+ > -+/* Assumes the source clock has been set by caller */ > -+static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle, > -+ int wakeup) > -+{ > -+ u32 l; > -+ > -+ l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0); > -+ l |= 0x02 << 3; /* Set to smart-idle mode */ > -+ l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ > -+ > -+ if (autoidle) > -+ l |= 0x1 << 0; > -+ > -+ if (wakeup) > -+ l |= 1 << 2; > -+ > -+ __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0); > -+ > -+ /* Match hardware reset default of posted mode */ > -+ __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG, > -+ OMAP_TIMER_CTRL_POSTED, 0); > -+} > -+ > -+static inline int __omap_dm_timer_set_source(struct clk *timer_fck, > -+ struct clk *parent) > -+{ > -+ int ret; > -+ > -+ clk_disable(timer_fck); > -+ ret = clk_set_parent(timer_fck, parent); > -+ clk_enable(timer_fck); > -+ > -+ /* > -+ * When the functional clock disappears, too quick writes seem > -+ * to cause an abort. XXX Is this still necessary? > -+ */ > -+ __delay(300000); > -+ > -+ return ret; > -+} > -+ > -+static inline void __omap_dm_timer_stop(void __iomem *base, int posted, > -+ unsigned long rate) > -+{ > -+ u32 l; > -+ > -+ l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); > -+ if (l & OMAP_TIMER_CTRL_ST) { > -+ l &= ~0x1; > -+ __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, > posted); > -+#ifdef CONFIG_ARCH_OMAP2PLUS > -+ /* Readback to make sure write has completed */ > -+ __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, > posted); > -+ /* > -+ * Wait for functional clock period x 3.5 to make sure that > -+ * timer is stopped > -+ */ > -+ udelay(3500000 / rate + 1); > -+#endif > -+ } > -+ > -+ /* Ack possibly pending interrupt */ > -+ __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, > -+ OMAP_TIMER_INT_OVERFLOW, 0); > -+} > -+ > -+static inline void __omap_dm_timer_load_start(void __iomem *base, u32 > ctrl, > -+ unsigned int load, int posted) > -+{ > -+ __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, > posted); > -+ __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, > posted); > -+} > -+ > -+static inline void __omap_dm_timer_int_enable(void __iomem *base, > -+ unsigned int value) > -+{ > -+ __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0); > -+ __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, > value, 0); > -+} > -+ > -+static inline unsigned int __omap_dm_timer_read_counter(void __iomem > *base, > -+ int posted) > -+{ > -+ return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, > posted); > -+} > -+ > -+static inline void __omap_dm_timer_write_status(void __iomem *base, > -+ unsigned int value) > -+{ > -+ __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0); > -+} > -+ > - #endif /* __ASM_ARCH_DMTIMER_H */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0007-omap2-Use- > dmtimer-macros-for-clockevent.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch > deleted file mode 100644 > index c7747ed..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0007-omap2-Use-dmtimer- > macros-for-clockevent.patch > +++ /dev/null > @@ -1,279 +0,0 @@ > -From 8f322fa141e55da412c5d73f07f93c1e02965522 Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:48 -0700 > -Subject: [PATCH 007/149] omap2+: Use dmtimer macros for clockevent > - > -This patch makes timer-gp.c to use only a subset of dmtimer > -functions without the need to initialize dmtimer code early. > - > -Also note that now with the inline functions, timer_set_next_event > -becomes more efficient in the lines of assembly code. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/timer-gp.c | 147 ++++++++++++++++++++++-- > ----- > - arch/arm/plat-omap/include/plat/dmtimer.h | 1 + > - 2 files changed, 113 insertions(+), 35 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer- > gp.c > -index a0d8e83..62c0d5c 100644 > ---- a/arch/arm/mach-omap2/timer-gp.c > -+++ b/arch/arm/mach-omap2/timer-gp.c > -@@ -45,10 +45,33 @@ > - > - #include "timer-gp.h" > - > -+/* Parent clocks, eventually these will come from the clock framework */ > -+ > -+#define OMAP2_MPU_SOURCE "sys_ck" > -+#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE > -+#define OMAP4_MPU_SOURCE "sys_clkin_ck" > -+#define OMAP2_32K_SOURCE "func_32k_ck" > -+#define OMAP3_32K_SOURCE "omap_32k_fck" > -+#define OMAP4_32K_SOURCE "sys_32k_ck" > -+ > -+#ifdef CONFIG_OMAP_32K_TIMER > -+#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE > -+#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE > -+#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE > -+#define OMAP3_SECURE_TIMER 12 > -+#else > -+#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE > -+#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE > -+#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE > -+#define OMAP3_SECURE_TIMER 1 > -+#endif > - > - /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ > - #define MAX_GPTIMER_ID 12 > - > -+/* Clockevent code */ > -+ > -+static struct omap_dm_timer clkev; > - static struct omap_dm_timer *gptimer; > - static struct clock_event_device clockevent_gpt; > - static u8 __initdata gptimer_id = 1; > -@@ -57,10 +80,9 @@ struct omap_dm_timer *gptimer_wakeup; > - > - static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) > - { > -- struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id; > - struct clock_event_device *evt = &clockevent_gpt; > - > -- omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW); > -+ __omap_dm_timer_write_status(clkev.io_base, > OMAP_TIMER_INT_OVERFLOW); > - > - evt->event_handler(evt); > - return IRQ_HANDLED; > -@@ -75,7 +97,8 @@ static struct irqaction omap2_gp_timer_irq = { > - static int omap2_gp_timer_set_next_event(unsigned long cycles, > - struct clock_event_device *evt) > - { > -- omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles); > -+ __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, > -+ 0xffffffff - cycles, 1); > - > - return 0; > - } > -@@ -85,13 +108,18 @@ static void omap2_gp_timer_set_mode(enum > clock_event_mode mode, > - { > - u32 period; > - > -- omap_dm_timer_stop(gptimer); > -+ __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); > - > - switch (mode) { > - case CLOCK_EVT_MODE_PERIODIC: > -- period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / > HZ; > -+ period = clkev.rate / HZ; > - period -= 1; > -- omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); > -+ /* Looks like we need to first set the load value separately */ > -+ __omap_dm_timer_write(clkev.io_base, > OMAP_TIMER_LOAD_REG, > -+ 0xffffffff - period, 1); > -+ __omap_dm_timer_load_start(clkev.io_base, > -+ OMAP_TIMER_CTRL_AR | > OMAP_TIMER_CTRL_ST, > -+ 0xffffffff - period, 1); > - break; > - case CLOCK_EVT_MODE_ONESHOT: > - break; > -@@ -130,43 +158,89 @@ int __init omap2_gp_clockevent_set_gptimer(u8 > id) > - return 0; > - } > - > --static void __init omap2_gp_clockevent_init(void) > -+static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, > -+ int gptimer_id, > -+ const char *fck_source) > - { > -- u32 tick_rate; > -- int src; > -- char clockevent_hwmod_name[8]; /* 8 = sizeof("timerXX0") */ > -+ char name[10]; /* 10 = sizeof("gptXX_Xck0") */ > -+ struct omap_hwmod *oh; > -+ size_t size; > -+ int res = 0; > -+ > -+ sprintf(name, "timer%d", gptimer_id); > -+ omap_hwmod_setup_one(name); > -+ oh = omap_hwmod_lookup(name); > -+ if (!oh) > -+ return -ENODEV; > -+ > -+ timer->irq = oh->mpu_irqs[0].irq; > -+ timer->phys_base = oh->slaves[0]->addr->pa_start; > -+ size = oh->slaves[0]->addr->pa_end - timer->phys_base; > -+ > -+ /* Static mapping, never released */ > -+ timer->io_base = ioremap(timer->phys_base, size); > -+ if (!timer->io_base) > -+ return -ENXIO; > -+ > -+ /* After the dmtimer is using hwmod these clocks won't be needed */ > -+ sprintf(name, "gpt%d_fck", gptimer_id); > -+ timer->fclk = clk_get(NULL, name); > -+ if (IS_ERR(timer->fclk)) > -+ return -ENODEV; > -+ > -+ sprintf(name, "gpt%d_ick", gptimer_id); > -+ timer->iclk = clk_get(NULL, name); > -+ if (IS_ERR(timer->iclk)) { > -+ clk_put(timer->fclk); > -+ return -ENODEV; > -+ } > - > -- inited = 1; > -+ omap_hwmod_enable(oh); > -+ > -+ if (gptimer_id != 12) { > -+ struct clk *src; > -+ > -+ src = clk_get(NULL, fck_source); > -+ if (IS_ERR(src)) { > -+ res = -EINVAL; > -+ } else { > -+ res = __omap_dm_timer_set_source(timer->fclk, src); > -+ if (IS_ERR_VALUE(res)) > -+ pr_warning("%s: timer%i cannot set > source\n", > -+ __func__, gptimer_id); > -+ clk_put(src); > -+ } > -+ } > -+ __omap_dm_timer_reset(timer->io_base, 1, 1); > -+ timer->posted = 1; > -+ > -+ timer->rate = clk_get_rate(timer->fclk); > - > -- sprintf(clockevent_hwmod_name, "timer%d", gptimer_id); > -- omap_hwmod_setup_one(clockevent_hwmod_name); > -+ timer->reserved = 1; > - > - gptimer = omap_dm_timer_request_specific(gptimer_id); > - BUG_ON(gptimer == NULL); > - gptimer_wakeup = gptimer; > - > --#if defined(CONFIG_OMAP_32K_TIMER) > -- src = OMAP_TIMER_SRC_32_KHZ; > --#else > -- src = OMAP_TIMER_SRC_SYS_CLK; > -- WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the " > -- "secure 32KiHz clock source\n"); > --#endif > -+ return res; > -+} > - > -- if (gptimer_id != 12) > -- WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, > src)), > -- "timer-gp: omap_dm_timer_set_source() failed\n"); > -+static void __init omap2_gp_clockevent_init(int gptimer_id, > -+ const char *fck_source) > -+{ > -+ int res; > - > -- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); > -+ inited = 1; > - > -- pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", > -- gptimer_id, tick_rate); > -+ res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); > -+ BUG_ON(res); > - > - omap2_gp_timer_irq.dev_id = (void *)gptimer; > -- setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); > -- omap_dm_timer_set_int_enable(gptimer, > OMAP_TIMER_INT_OVERFLOW); > -+ setup_irq(clkev.irq, &omap2_gp_timer_irq); > - > -- clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC, > -+ __omap_dm_timer_int_enable(clkev.io_base, > OMAP_TIMER_INT_OVERFLOW); > -+ > -+ clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, > - clockevent_gpt.shift); > - clockevent_gpt.max_delta_ns = > - clockevent_delta2ns(0xffffffff, &clockevent_gpt); > -@@ -176,6 +250,9 @@ static void __init omap2_gp_clockevent_init(void) > - > - clockevent_gpt.cpumask = cpumask_of(0); > - clockevents_register_device(&clockevent_gpt); > -+ > -+ pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", > -+ gptimer_id, clkev.rate); > - } > - > - /* Clocksource code */ > -@@ -247,11 +324,11 @@ static void __init omap2_gp_clocksource_init(void) > - } > - #endif > - > --#define OMAP_SYS_TIMER_INIT(name) > \ > -+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) > \ > - static void __init omap##name##_timer_init(void) \ > - { \ > - omap_dm_timer_init(); \ > -- omap2_gp_clockevent_init(); \ > -+ omap2_gp_clockevent_init((clkev_nr), clkev_src); \ > - omap2_gp_clocksource_init(); \ > - } > - > -@@ -261,14 +338,14 @@ struct sys_timer omap##name##_timer = { > \ > - }; > - > - #ifdef CONFIG_ARCH_OMAP2 > --OMAP_SYS_TIMER_INIT(2) > -+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE) > - OMAP_SYS_TIMER(2) > - #endif > - > - #ifdef CONFIG_ARCH_OMAP3 > --OMAP_SYS_TIMER_INIT(3) > -+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE) > - OMAP_SYS_TIMER(3) > --OMAP_SYS_TIMER_INIT(3_secure) > -+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, > OMAP3_CLKEV_SOURCE) > - OMAP_SYS_TIMER(3_secure) > - #endif > - > -@@ -280,7 +357,7 @@ static void __init omap4_timer_init(void) > - BUG_ON(!twd_base); > - #endif > - omap_dm_timer_init(); > -- omap2_gp_clockevent_init(); > -+ omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); > - omap2_gp_clocksource_init(); > - } > - OMAP_SYS_TIMER(4) > -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat- > omap/include/plat/dmtimer.h > -index 54664a7..dd8b3ff 100644 > ---- a/arch/arm/plat-omap/include/plat/dmtimer.h > -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h > -@@ -216,6 +216,7 @@ struct omap_dm_timer { > - struct clk *iclk, *fclk; > - #endif > - void __iomem *io_base; > -+ unsigned long rate; > - unsigned reserved:1; > - unsigned enabled:1; > - unsigned posted:1; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0008-omap2- > Remove-gptimer_wakeup-for-now.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch > deleted file mode 100644 > index 98e356c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0008-omap2-Remove- > gptimer_wakeup-for-now.patch > +++ /dev/null > @@ -1,177 +0,0 @@ > -From 6e1cacccf1349d97c83c7bc93e4d3c15e731c3ad Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:49 -0700 > -Subject: [PATCH 008/149] omap2+: Remove gptimer_wakeup for now > - > -This removes the support for setting the wake-up timer for debugging. > - > -Later on we can reserve gptimer1 for PM code only and have similar > -functionality. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/pm-debug.c | 28 ---------------------------- > - arch/arm/mach-omap2/pm.h | 6 ------ > - arch/arm/mach-omap2/pm34xx.c | 4 ---- > - arch/arm/mach-omap2/timer-gp.c | 8 +------- > - arch/arm/plat-omap/include/plat/dmtimer.h | 1 - > - 5 files changed, 1 insertions(+), 46 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm- > debug.c > -index e01da45..2c35bd3 100644 > ---- a/arch/arm/mach-omap2/pm-debug.c > -+++ b/arch/arm/mach-omap2/pm-debug.c > -@@ -31,7 +31,6 @@ > - #include <plat/board.h> > - #include "powerdomain.h" > - #include "clockdomain.h" > --#include <plat/dmtimer.h> > - #include <plat/omap-pm.h> > - > - #include "cm2xxx_3xxx.h" > -@@ -41,8 +40,6 @@ > - int omap2_pm_debug; > - u32 enable_off_mode; > - u32 sleep_while_idle; > --u32 wakeup_timer_seconds; > --u32 wakeup_timer_milliseconds; > - > - #define DUMP_PRM_MOD_REG(mod, reg) \ > - regs[reg_count].name = #mod "." #reg; \ > -@@ -162,23 +159,6 @@ void omap2_pm_dump(int mode, int resume, > unsigned int us) > - printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, > regs[i].val); > - } > - > --void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds) > --{ > -- u32 tick_rate, cycles; > -- > -- if (!seconds && !milliseconds) > -- return; > -- > -- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup)); > -- cycles = tick_rate * seconds + tick_rate * milliseconds / 1000; > -- omap_dm_timer_stop(gptimer_wakeup); > -- omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - > cycles); > -- > -- pr_info("PM: Resume timer in %u.%03u secs" > -- " (%d ticks at %d ticks/sec.)\n", > -- seconds, milliseconds, cycles, tick_rate); > --} > -- > - #ifdef CONFIG_DEBUG_FS > - #include <linux/debugfs.h> > - #include <linux/seq_file.h> > -@@ -576,9 +556,6 @@ static int option_set(void *data, u64 val) > - { > - u32 *option = data; > - > -- if (option == &wakeup_timer_milliseconds && val >= 1000) > -- return -EINVAL; > -- > - *option = val; > - > - if (option == &enable_off_mode) { > -@@ -641,11 +618,6 @@ static int pm_dbg_init(void) > - &enable_off_mode, > &pm_dbg_option_fops); > - (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, > - &sleep_while_idle, &pm_dbg_option_fops); > -- (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | > S_IWUSR, d, > -- &wakeup_timer_seconds, > &pm_dbg_option_fops); > -- (void) debugfs_create_file("wakeup_timer_milliseconds", > -- S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds, > -- &pm_dbg_option_fops); > - pm_dbg_init_done = 1; > - > - return 0; > -diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h > -index 45bcfce..c3a367e 100644 > ---- a/arch/arm/mach-omap2/pm.h > -+++ b/arch/arm/mach-omap2/pm.h > -@@ -60,19 +60,13 @@ inline void omap3_pm_init_cpuidle(struct > cpuidle_params *cpuidle_board_params) > - extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); > - extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int > state); > - > --extern u32 wakeup_timer_seconds; > --extern u32 wakeup_timer_milliseconds; > --extern struct omap_dm_timer *gptimer_wakeup; > -- > - #ifdef CONFIG_PM_DEBUG > - extern void omap2_pm_dump(int mode, int resume, unsigned int us); > --extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds); > - extern int omap2_pm_debug; > - extern u32 enable_off_mode; > - extern u32 sleep_while_idle; > - #else > - #define omap2_pm_dump(mode, resume, us) do {} while (0); > --#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while > (0); > - #define omap2_pm_debug 0 > - #define enable_off_mode 0 > - #define sleep_while_idle 0 > -diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach- > omap2/pm34xx.c > -index c155c9d..4cb636a 100644 > ---- a/arch/arm/mach-omap2/pm34xx.c > -+++ b/arch/arm/mach-omap2/pm34xx.c > -@@ -534,10 +534,6 @@ static int omap3_pm_suspend(void) > - struct power_state *pwrst; > - int state, ret = 0; > - > -- if (wakeup_timer_seconds || wakeup_timer_milliseconds) > -- omap2_pm_wakeup_on_timer(wakeup_timer_seconds, > -- wakeup_timer_milliseconds); > -- > - /* Read current next_pwrsts */ > - list_for_each_entry(pwrst, &pwrst_list, node) > - pwrst->saved_state = pwrdm_read_next_pwrst(pwrst- > >pwrdm); > -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer- > gp.c > -index 62c0d5c..578e9df 100644 > ---- a/arch/arm/mach-omap2/timer-gp.c > -+++ b/arch/arm/mach-omap2/timer-gp.c > -@@ -72,11 +72,9 @@ > - /* Clockevent code */ > - > - static struct omap_dm_timer clkev; > --static struct omap_dm_timer *gptimer; > - static struct clock_event_device clockevent_gpt; > - static u8 __initdata gptimer_id = 1; > - static u8 __initdata inited; > --struct omap_dm_timer *gptimer_wakeup; > - > - static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) > - { > -@@ -218,10 +216,6 @@ static int __init omap_dm_timer_init_one(struct > omap_dm_timer *timer, > - > - timer->reserved = 1; > - > -- gptimer = omap_dm_timer_request_specific(gptimer_id); > -- BUG_ON(gptimer == NULL); > -- gptimer_wakeup = gptimer; > -- > - return res; > - } > - > -@@ -235,7 +229,7 @@ static void __init omap2_gp_clockevent_init(int > gptimer_id, > - res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); > - BUG_ON(res); > - > -- omap2_gp_timer_irq.dev_id = (void *)gptimer; > -+ omap2_gp_timer_irq.dev_id = (void *)&clkev; > - setup_irq(clkev.irq, &omap2_gp_timer_irq); > - > - __omap_dm_timer_int_enable(clkev.io_base, > OMAP_TIMER_INT_OVERFLOW); > -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat- > omap/include/plat/dmtimer.h > -index dd8b3ff..8adcb18 100644 > ---- a/arch/arm/plat-omap/include/plat/dmtimer.h > -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h > -@@ -59,7 +59,6 @@ > - */ > - #define OMAP_TIMER_IP_VERSION_1 0x1 > - struct omap_dm_timer; > --extern struct omap_dm_timer *gptimer_wakeup; > - struct clk; > - > - int omap_dm_timer_init(void); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0009-OMAP3-SR- > make-notify-independent-of-class.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch > deleted file mode 100644 > index 17b3eda..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0009-OMAP3-SR-make- > notify-independent-of-class.patch > +++ /dev/null > @@ -1,47 +0,0 @@ > -From b3d437835cf2885fe7a8c6470ca7639e5c11850a Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Mon, 14 Feb 2011 12:16:36 +0530 > -Subject: [PATCH 009/149] OMAP3+: SR: make notify independent of class > - > -Interrupt notification mechanism of SmartReflex can be used by the > -choice of implementation of the class driver. For example, Class 2 and > -Class 1.5 of SmartReflex can both use the interrupt notification to > -identify the transition of voltage or other events. > - > -Hence, the actual class does not matter for notifier. Let the class > -driver's handling decide how it should be used. SmartReflex driver > -should provide just the primitives. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/smartreflex.c | 6 ++---- > - 1 files changed, 2 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index f5a6bc1..785ed4c 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data) > - sr_write_reg(sr_info, IRQSTATUS, status); > - } > - > -- if (sr_class->class_type == SR_CLASS2 && sr_class->notify) > -+ if (sr_class->notify) > - sr_class->notify(sr_info->voltdm, status); > - > - return IRQ_HANDLED; > -@@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info) > - struct resource *mem; > - int ret = 0; > - > -- if (sr_class->class_type == SR_CLASS2 && > -- sr_class->notify_flags && sr_info->irq) { > -- > -+ if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { > - name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm- > >name); > - if (name == NULL) { > - ret = -ENOMEM; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0010-OMAP3-SR- > disable-interrupt-by-default.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch > deleted file mode 100644 > index 7d8ef30..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0010-OMAP3-SR-disable- > interrupt-by-default.patch > +++ /dev/null > @@ -1,36 +0,0 @@ > -From 252ef25d54768a725289253c494e1f37a5eec526 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Mon, 14 Feb 2011 12:41:10 +0530 > -Subject: [PATCH 010/149] OMAP3+: SR: disable interrupt by default > - > -We will enable and disable interrupt on a need basis in the class > -driver. We need to keep the IRQ disabled by default else the > -forceupdate or vcbypass events could trigger events that we don't > -need/expect to handle. > - > -This is a preparation for SmartReflex AVS class drivers such as > -class 2 and class 1.5 which would need to use interrupts. Existing > -SmartReflex AVS class 3 driver does not require to use interrupts > -and is not impacted by this change. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/smartreflex.c | 1 + > - 1 files changed, 1 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 785ed4c..6b69ada 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -268,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info) > - 0, name, (void *)sr_info); > - if (ret) > - goto error; > -+ disable_irq(sr_info->irq); > - } > - > - if (pdata && pdata->enable_on_init) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0011-OMAP3-SR- > enable-disable-SR-only-on-need.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch > deleted file mode 100644 > index ffc8c8c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0011-OMAP3-SR-enable- > disable-SR-only-on-need.patch > +++ /dev/null > @@ -1,40 +0,0 @@ > -From e060d73eef027063f687feae1c3d0ad2418a88aa Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Mon, 14 Feb 2011 21:14:17 +0530 > -Subject: [PATCH 011/149] OMAP3+: SR: enable/disable SR only on need > - > -Since we already know the state of the autocomp enablement, we can > -see if the requested state is different from the current state and > -enable/disable SR only on the need basis. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/smartreflex.c | 11 +++++++---- > - 1 files changed, 7 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 6b69ada..1a370b9 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -807,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, > u64 val) > - return -EINVAL; > - } > - > -- if (!val) > -- sr_stop_vddautocomp(sr_info); > -- else > -- sr_start_vddautocomp(sr_info); > -+ /* control enable/disable only if there is a delta in value */ > -+ if (sr_info->autocomp_active != val) { > -+ if (!val) > -+ sr_stop_vddautocomp(sr_info); > -+ else > -+ sr_start_vddautocomp(sr_info); > -+ } > - > - return 0; > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0012-OMAP3-SR-fix- > cosmetic-indentation.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch > deleted file mode 100644 > index 63c8230..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0012-OMAP3-SR-fix- > cosmetic-indentation.patch > +++ /dev/null > @@ -1,48 +0,0 @@ > -From d9d17d6ea5a56b81a7d6d134aeeeff6a3b9fbf88 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Mon, 14 Feb 2011 12:33:13 +0530 > -Subject: [PATCH 012/149] OMAP3+: SR: fix cosmetic indentation > - > -Error label case seems to have a 2 tab indentation when just 1 is > -necessary. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/smartreflex.c | 20 ++++++++++---------- > - 1 files changed, 10 insertions(+), 10 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index 1a370b9..be6add0 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -277,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info) > - return ret; > - > - error: > -- iounmap(sr_info->base); > -- mem = platform_get_resource(sr_info->pdev, > IORESOURCE_MEM, 0); > -- release_mem_region(mem->start, resource_size(mem)); > -- list_del(&sr_info->node); > -- dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" > -- "interrupt handler. Smartreflex will" > -- "not function as desired\n", __func__); > -- kfree(name); > -- kfree(sr_info); > -- return ret; > -+ iounmap(sr_info->base); > -+ mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); > -+ release_mem_region(mem->start, resource_size(mem)); > -+ list_del(&sr_info->node); > -+ dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" > -+ "interrupt handler. Smartreflex will" > -+ "not function as desired\n", __func__); > -+ kfree(name); > -+ kfree(sr_info); > -+ return ret; > - } > - > - static void sr_v1_disable(struct omap_sr *sr) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0013-omap2-Reserve- > clocksource-and-timesource-and-initial.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and- > initial.patch > deleted file mode 100644 > index db4f8e5..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0013-omap2-Reserve- > clocksource-and-timesource-and-initial.patch > +++ /dev/null > @@ -1,125 +0,0 @@ > -From 8009544b2ea8ceba920455bb7e5e267cc78d3827 Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:49 -0700 > -Subject: [PATCH 013/149] omap2+: Reserve clocksource and timesource and > initialize dmtimer later > - > -There's no need to initialize the dmtimer framework early. > -Just mark the clocksource and timesource as reserved, and > -initialize dmtimer with an arch_initcall. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap1/timer32k.c | 4 ---- > - arch/arm/mach-omap2/timer-gp.c | 6 ++++-- > - arch/arm/plat-omap/dmtimer.c | 10 +++++++++- > - arch/arm/plat-omap/include/plat/dmtimer.h | 3 +-- > - 4 files changed, 14 insertions(+), 9 deletions(-) > - > -diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach- > omap1/timer32k.c > -index 13d7b8f..96604a5 100644 > ---- a/arch/arm/mach-omap1/timer32k.c > -+++ b/arch/arm/mach-omap1/timer32k.c > -@@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void) > - bool __init omap_32k_timer_init(void) > - { > - omap_init_clocksource_32k(); > -- > --#ifdef CONFIG_OMAP_DM_TIMER > -- omap_dm_timer_init(); > --#endif > - omap_init_32k_timer(); > - > - return true; > -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer- > gp.c > -index 578e9df..cf2ec85 100644 > ---- a/arch/arm/mach-omap2/timer-gp.c > -+++ b/arch/arm/mach-omap2/timer-gp.c > -@@ -69,6 +69,8 @@ > - /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ > - #define MAX_GPTIMER_ID 12 > - > -+u32 sys_timer_reserved; > -+ > - /* Clockevent code */ > - > - static struct omap_dm_timer clkev; > -@@ -195,6 +197,8 @@ static int __init omap_dm_timer_init_one(struct > omap_dm_timer *timer, > - > - omap_hwmod_enable(oh); > - > -+ sys_timer_reserved |= (1 << (gptimer_id - 1)); > -+ > - if (gptimer_id != 12) { > - struct clk *src; > - > -@@ -321,7 +325,6 @@ static void __init omap2_gp_clocksource_init(void) > - #define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) > \ > - static void __init omap##name##_timer_init(void) \ > - { \ > -- omap_dm_timer_init(); \ > - omap2_gp_clockevent_init((clkev_nr), clkev_src); \ > - omap2_gp_clocksource_init(); \ > - } > -@@ -350,7 +353,6 @@ static void __init omap4_timer_init(void) > - twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); > - BUG_ON(!twd_base); > - #endif > -- omap_dm_timer_init(); > - omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); > - omap2_gp_clocksource_init(); > - } > -diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c > -index 7c5cb4e..8dfb818 100644 > ---- a/arch/arm/plat-omap/dmtimer.c > -+++ b/arch/arm/plat-omap/dmtimer.c > -@@ -572,7 +572,7 @@ int omap_dm_timers_active(void) > - } > - EXPORT_SYMBOL_GPL(omap_dm_timers_active); > - > --int __init omap_dm_timer_init(void) > -+static int __init omap_dm_timer_init(void) > - { > - struct omap_dm_timer *timer; > - int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */ > -@@ -625,8 +625,16 @@ int __init omap_dm_timer_init(void) > - sprintf(clk_name, "gpt%d_fck", i + 1); > - timer->fclk = clk_get(NULL, clk_name); > - } > -+ > -+ /* One or two timers may be set up early for sys_timer */ > -+ if (sys_timer_reserved & (1 << i)) { > -+ timer->reserved = 1; > -+ timer->posted = 1; > -+ } > - #endif > - } > - > - return 0; > - } > -+ > -+arch_initcall(omap_dm_timer_init); > -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat- > omap/include/plat/dmtimer.h > -index 8adcb18..d0f3a2d 100644 > ---- a/arch/arm/plat-omap/include/plat/dmtimer.h > -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h > -@@ -61,8 +61,6 @@ > - struct omap_dm_timer; > - struct clk; > - > --int omap_dm_timer_init(void); > -- > - struct omap_dm_timer *omap_dm_timer_request(void); > - struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); > - void omap_dm_timer_free(struct omap_dm_timer *timer); > -@@ -221,6 +219,7 @@ struct omap_dm_timer { > - unsigned posted:1; > - }; > - > -+extern u32 sys_timer_reserved; > - void omap_dm_timer_prepare(struct omap_dm_timer *timer); > - > - static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0014-omap2-Use- > dmtimer-macros-for-clocksource.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch > deleted file mode 100644 > index 2e72dad..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0014-omap2-Use-dmtimer- > macros-for-clocksource.patch > +++ /dev/null > @@ -1,163 +0,0 @@ > -From 595da70cb0e039cbe04d9c7ce179883e6f8878c1 Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:49 -0700 > -Subject: [PATCH 014/149] omap2+: Use dmtimer macros for clocksource > - > -Use dmtimer macros for clocksource. As with the clockevent, > -this allows us to initialize the rest of dmtimer code later on. > - > -Note that eventually we will be initializing the timesource > -from init_early so sched_clock will work properly for > -CONFIG_PRINTK_TIME. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/timer-gp.c | 64 +++++++++++++++++++++----------- > ----- > - arch/arm/plat-omap/counter_32k.c | 2 +- > - 2 files changed, 37 insertions(+), 29 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer- > gp.c > -index cf2ec85..2b8cb70 100644 > ---- a/arch/arm/mach-omap2/timer-gp.c > -+++ b/arch/arm/mach-omap2/timer-gp.c > -@@ -262,20 +262,22 @@ static void __init omap2_gp_clockevent_init(int > gptimer_id, > - * sync counter. See clocksource setup in plat-omap/counter_32k.c > - */ > - > --static void __init omap2_gp_clocksource_init(void) > -+static void __init omap2_gp_clocksource_init(int unused, const char > *dummy) > - { > - omap_init_clocksource_32k(); > - } > - > - #else > -+ > -+static struct omap_dm_timer clksrc; > -+ > - /* > - * clocksource > - */ > - static DEFINE_CLOCK_DATA(cd); > --static struct omap_dm_timer *gpt_clocksource; > - static cycle_t clocksource_read_cycles(struct clocksource *cs) > - { > -- return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource); > -+ return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); > - } > - > - static struct clocksource clocksource_gpt = { > -@@ -290,43 +292,48 @@ static void notrace > dmtimer_update_sched_clock(void) > - { > - u32 cyc; > - > -- cyc = omap_dm_timer_read_counter(gpt_clocksource); > -+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); > - > - update_sched_clock(&cd, cyc, (u32)~0); > - } > - > --/* Setup free-running counter for clocksource */ > --static void __init omap2_gp_clocksource_init(void) > -+unsigned long long notrace sched_clock(void) > - { > -- static struct omap_dm_timer *gpt; > -- u32 tick_rate; > -- static char err1[] __initdata = KERN_ERR > -- "%s: failed to request dm-timer\n"; > -- static char err2[] __initdata = KERN_ERR > -- "%s: can't register clocksource!\n"; > -+ u32 cyc = 0; > - > -- gpt = omap_dm_timer_request(); > -- if (!gpt) > -- printk(err1, clocksource_gpt.name); > -- gpt_clocksource = gpt; > -+ if (clksrc.reserved) > -+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); > - > -- omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK); > -- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt)); > -+ return cyc_to_sched_clock(&cd, cyc, (u32)~0); > -+} > -+ > -+/* Setup free-running counter for clocksource */ > -+static void __init omap2_gp_clocksource_init(int gptimer_id, > -+ const char *fck_source) > -+{ > -+ int res; > -+ > -+ res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); > -+ BUG_ON(res); > - > -- omap_dm_timer_set_load_start(gpt, 1, 0); > -+ pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", > -+ gptimer_id, clksrc.rate); > - > -- init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); > -+ __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, > 0, 1); > -+ init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); > - > -- if (clocksource_register_hz(&clocksource_gpt, tick_rate)) > -- printk(err2, clocksource_gpt.name); > -+ if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) > -+ pr_err("Could not register clocksource %s\n", > -+ clocksource_gpt.name); > - } > - #endif > - > --#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) > \ > -+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, > \ > -+ clksrc_nr, clksrc_src) \ > - static void __init omap##name##_timer_init(void) \ > - { \ > - omap2_gp_clockevent_init((clkev_nr), clkev_src); \ > -- omap2_gp_clocksource_init(); \ > -+ omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ > - } > - > - #define OMAP_SYS_TIMER(name) > \ > -@@ -335,14 +342,15 @@ struct sys_timer omap##name##_timer = { > \ > - }; > - > - #ifdef CONFIG_ARCH_OMAP2 > --OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE) > -+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, > OMAP2_MPU_SOURCE) > - OMAP_SYS_TIMER(2) > - #endif > - > - #ifdef CONFIG_ARCH_OMAP3 > --OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE) > -+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, > OMAP3_MPU_SOURCE) > - OMAP_SYS_TIMER(3) > --OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, > OMAP3_CLKEV_SOURCE) > -+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, > OMAP3_CLKEV_SOURCE, > -+ 2, OMAP3_MPU_SOURCE) > - OMAP_SYS_TIMER(3_secure) > - #endif > - > -@@ -354,7 +362,7 @@ static void __init omap4_timer_init(void) > - BUG_ON(!twd_base); > - #endif > - omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); > -- omap2_gp_clocksource_init(); > -+ omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); > - } > - OMAP_SYS_TIMER(4) > - #endif > -diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat- > omap/counter_32k.c > -index f7fed60..c13bc3d 100644 > ---- a/arch/arm/plat-omap/counter_32k.c > -+++ b/arch/arm/plat-omap/counter_32k.c > -@@ -126,7 +126,7 @@ static inline unsigned long long notrace > _omap_32k_sched_clock(void) > - return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, > SC_SHIFT); > - } > - > --#ifndef CONFIG_OMAP_MPU_TIMER > -+#if defined(CONFIG_OMAP_32K_TIMER) && > !defined(CONFIG_OMAP_MPU_TIMER) > - unsigned long long notrace sched_clock(void) > - { > - return _omap_32k_sched_clock(); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2- > Remove-omap2_gp_clockevent_set_gptimer.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2-Remove- > omap2_gp_clockevent_set_gptimer.patch > deleted file mode 100644 > index 298f82d..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2-Remove- > omap2_gp_clockevent_set_gptimer.patch > +++ /dev/null > @@ -1,240 +0,0 @@ > -From e50befd53e52f2c72a26e33812ad896d5f8524fa Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:49 -0700 > -Subject: [PATCH 015/149] omap2+: Remove > omap2_gp_clockevent_set_gptimer > - > -This is no longer needed as we now just set the desired > -.timer in MACHINE_START. We can now also remove timer-gp.h. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Reviewed-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/board-4430sdp.c | 4 ---- > - arch/arm/mach-omap2/board-devkit8000.c | 4 ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 4 ---- > - arch/arm/mach-omap2/board-omap3logic.c | 1 - > - arch/arm/mach-omap2/board-omap3stalker.c | 4 ---- > - arch/arm/mach-omap2/board-omap3touchbook.c | 4 ---- > - arch/arm/mach-omap2/board-omap4panda.c | 1 - > - arch/arm/mach-omap2/timer-gp.c | 26 -------------------------- > - arch/arm/mach-omap2/timer-gp.h | 16 ---------------- > - 9 files changed, 0 insertions(+), 64 deletions(-) > - delete mode 100644 arch/arm/mach-omap2/timer-gp.h > - > -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach- > omap2/board-4430sdp.c > -index e8caced..d7df07e 100644 > ---- a/arch/arm/mach-omap2/board-4430sdp.c > -+++ b/arch/arm/mach-omap2/board-4430sdp.c > -@@ -40,7 +40,6 @@ > - > - #include "mux.h" > - #include "hsmmc.h" > --#include "timer-gp.h" > - #include "control.h" > - #include "common-board-devices.h" > - > -@@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void) > - { > - omap2_init_common_infrastructure(); > - omap2_init_common_devices(NULL, NULL); > --#ifdef CONFIG_OMAP_32K_TIMER > -- omap2_gp_clockevent_set_gptimer(1); > --#endif > - } > - > - static struct omap_musb_board_data musb_board_data = { > -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach- > omap2/board-devkit8000.c > -index 46d144d..949dbea 100644 > ---- a/arch/arm/mach-omap2/board-devkit8000.c > -+++ b/arch/arm/mach-omap2/board-devkit8000.c > -@@ -58,7 +58,6 @@ > - > - #include "mux.h" > - #include "hsmmc.h" > --#include "timer-gp.h" > - #include "common-board-devices.h" > - > - #define OMAP_DM9000_GPIO_IRQ 25 > -@@ -441,9 +440,6 @@ static void __init devkit8000_init_early(void) > - static void __init devkit8000_init_irq(void) > - { > - omap3_init_irq(); > --#ifdef CONFIG_OMAP_32K_TIMER > -- omap2_gp_clockevent_set_gptimer(12); > --#endif > - } > - > - #define OMAP_DM9000_BASE 0x2c000000 > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 9ee16f6..2d8dfb3 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -50,7 +50,6 @@ > - > - #include "mux.h" > - #include "hsmmc.h" > --#include "timer-gp.h" > - #include "pm.h" > - #include "common-board-devices.h" > - > -@@ -484,9 +483,6 @@ static void __init omap3_beagle_init_early(void) > - static void __init omap3_beagle_init_irq(void) > - { > - omap3_init_irq(); > --#ifdef CONFIG_OMAP_32K_TIMER > -- omap2_gp_clockevent_set_gptimer(12); > --#endif > - } > - > - static struct platform_device *omap3_beagle_devices[] __initdata = { > -diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach- > omap2/board-omap3logic.c > -index 469259a..703aeb5 100644 > ---- a/arch/arm/mach-omap2/board-omap3logic.c > -+++ b/arch/arm/mach-omap2/board-omap3logic.c > -@@ -35,7 +35,6 @@ > - > - #include "mux.h" > - #include "hsmmc.h" > --#include "timer-gp.h" > - #include "control.h" > - #include "common-board-devices.h" > - > -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach- > omap2/board-omap3stalker.c > -index 2fa8fae..b8ad4dd 100644 > ---- a/arch/arm/mach-omap2/board-omap3stalker.c > -+++ b/arch/arm/mach-omap2/board-omap3stalker.c > -@@ -52,7 +52,6 @@ > - #include "sdram-micron-mt46h32m32lf-6.h" > - #include "mux.h" > - #include "hsmmc.h" > --#include "timer-gp.h" > - #include "common-board-devices.h" > - > - #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) > -@@ -492,9 +491,6 @@ static void __init omap3_stalker_init_early(void) > - static void __init omap3_stalker_init_irq(void) > - { > - omap3_init_irq(); > --#ifdef CONFIG_OMAP_32K_TIMER > -- omap2_gp_clockevent_set_gptimer(12); > --#endif > - } > - > - static struct platform_device *omap3_stalker_devices[] __initdata = { > -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c > b/arch/arm/mach-omap2/board-omap3touchbook.c > -index 8c71fd2..57e6ed3 100644 > ---- a/arch/arm/mach-omap2/board-omap3touchbook.c > -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c > -@@ -51,7 +51,6 @@ > - > - #include "mux.h" > - #include "hsmmc.h" > --#include "timer-gp.h" > - #include "common-board-devices.h" > - > - #include <asm/setup.h> > -@@ -372,9 +371,6 @@ static void __init omap3_touchbook_init_early(void) > - static void __init omap3_touchbook_init_irq(void) > - { > - omap3_init_irq(); > --#ifdef CONFIG_OMAP_32K_TIMER > -- omap2_gp_clockevent_set_gptimer(12); > --#endif > - } > - > - static struct platform_device *omap3_touchbook_devices[] __initdata = { > -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach- > omap2/board-omap4panda.c > -index dc1d6dc..ee2034e 100644 > ---- a/arch/arm/mach-omap2/board-omap4panda.c > -+++ b/arch/arm/mach-omap2/board-omap4panda.c > -@@ -41,7 +41,6 @@ > - #include <plat/usb.h> > - #include <plat/mmc.h> > - #include <video/omap-panel-generic-dpi.h> > --#include "timer-gp.h" > - > - #include "hsmmc.h" > - #include "control.h" > -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer- > gp.c > -index 2b8cb70..ab1931c 100644 > ---- a/arch/arm/mach-omap2/timer-gp.c > -+++ b/arch/arm/mach-omap2/timer-gp.c > -@@ -43,8 +43,6 @@ > - #include <plat/common.h> > - #include <plat/omap_hwmod.h> > - > --#include "timer-gp.h" > -- > - /* Parent clocks, eventually these will come from the clock framework */ > - > - #define OMAP2_MPU_SOURCE "sys_ck" > -@@ -75,8 +73,6 @@ u32 sys_timer_reserved; > - > - static struct omap_dm_timer clkev; > - static struct clock_event_device clockevent_gpt; > --static u8 __initdata gptimer_id = 1; > --static u8 __initdata inited; > - > - static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) > - { > -@@ -138,26 +134,6 @@ static struct clock_event_device clockevent_gpt = { > - .set_mode = omap2_gp_timer_set_mode, > - }; > - > --/** > -- * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for > clockevents > -- * @id: GPTIMER to use (1..MAX_GPTIMER_ID) > -- * > -- * Define the GPTIMER that the system should use for the tick timer. > -- * Meant to be called from board-*.c files in the event that GPTIMER1, the > -- * default, is unsuitable. Returns -EINVAL on error or 0 on success. > -- */ > --int __init omap2_gp_clockevent_set_gptimer(u8 id) > --{ > -- if (id < 1 || id > MAX_GPTIMER_ID) > -- return -EINVAL; > -- > -- BUG_ON(inited); > -- > -- gptimer_id = id; > -- > -- return 0; > --} > -- > - static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, > - int gptimer_id, > - const char *fck_source) > -@@ -228,8 +204,6 @@ static void __init omap2_gp_clockevent_init(int > gptimer_id, > - { > - int res; > - > -- inited = 1; > -- > - res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); > - BUG_ON(res); > - > -diff --git a/arch/arm/mach-omap2/timer-gp.h b/arch/arm/mach-omap2/timer- > gp.h > -deleted file mode 100644 > -index 5c1072c..0000000 > ---- a/arch/arm/mach-omap2/timer-gp.h > -+++ /dev/null > -@@ -1,16 +0,0 @@ > --/* > -- * OMAP2/3 GPTIMER support.headers > -- * > -- * Copyright (C) 2009 Nokia Corporation > -- * > -- * This file is subject to the terms and conditions of the GNU General Public > -- * License. See the file "COPYING" in the main directory of this archive > -- * for more details. > -- */ > -- > --#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H > --#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H > -- > --extern int __init omap2_gp_clockevent_set_gptimer(u8 id); > -- > --#endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2- > Rename-timer-gp.c-into-timer.c-to-combine-time.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into- > timer.c-to-combine-time.patch > deleted file mode 100644 > index c511aa9..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2-Rename- > timer-gp.c-into-timer.c-to-combine-time.patch > +++ /dev/null > @@ -1,737 +0,0 @@ > -From 5cdb1497ccc5b9dae8795e1e5e9c74f11e4e7401 Mon Sep 17 00:00:00 > 2001 > -From: Tony Lindgren <tony@atomide.com> > -Date: Tue, 29 Mar 2011 15:54:50 -0700 > -Subject: [PATCH 016/149] omap2+: Rename timer-gp.c into timer.c to combine > timer init functions > - > -We can keep everything sys_timer and gptimer.c related code in > -timer.c as the code will be very minimal. > - > -Later on we can also remove timer-mpu.c, as it can be called from > -omap4_timer_init function. > - > -This allows us to get rid of confusing existing files. We currently > -have timer-gp.c, timer-mpu.c, and patches have been posted to add > -dmtimer.c. There's no need to have these multiple files, we can > -put everything into timer.c. > - > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/Makefile | 2 +- > - arch/arm/mach-omap2/timer-gp.c | 342 ---------------------------------------- > - arch/arm/mach-omap2/timer.c | 342 > ++++++++++++++++++++++++++++++++++++++++ > - 3 files changed, 343 insertions(+), 343 deletions(-) > - delete mode 100644 arch/arm/mach-omap2/timer-gp.c > - create mode 100644 arch/arm/mach-omap2/timer.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index b148077..adbe82d 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -3,7 +3,7 @@ > - # > - > - # Common support > --obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \ > -+obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ > - common.o gpio.o dma.o wd_timer.o > - > - omap-2-3-common = irq.o sdrc.o > -diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer- > gp.c > -deleted file mode 100644 > -index ab1931c..0000000 > ---- a/arch/arm/mach-omap2/timer-gp.c > -+++ /dev/null > -@@ -1,342 +0,0 @@ > --/* > -- * linux/arch/arm/mach-omap2/timer-gp.c > -- * > -- * OMAP2 GP timer support. > -- * > -- * Copyright (C) 2009 Nokia Corporation > -- * > -- * Update to use new clocksource/clockevent layers > -- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> > -- * Copyright (C) 2007 MontaVista Software, Inc. > -- * > -- * Original driver: > -- * Copyright (C) 2005 Nokia Corporation > -- * Author: Paul Mundt <paul.mundt@nokia.com> > -- * Juha Yrjölä <juha.yrjola@nokia.com> > -- * OMAP Dual-mode timer framework support by Timo Teras > -- * > -- * Some parts based off of TI's 24xx code: > -- * > -- * Copyright (C) 2004-2009 Texas Instruments, Inc. > -- * > -- * Roughly modelled after the OMAP1 MPU timer code. > -- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> > -- * > -- * This file is subject to the terms and conditions of the GNU General Public > -- * License. See the file "COPYING" in the main directory of this archive > -- * for more details. > -- */ > --#include <linux/init.h> > --#include <linux/time.h> > --#include <linux/interrupt.h> > --#include <linux/err.h> > --#include <linux/clk.h> > --#include <linux/delay.h> > --#include <linux/irq.h> > --#include <linux/clocksource.h> > --#include <linux/clockchips.h> > -- > --#include <asm/mach/time.h> > --#include <plat/dmtimer.h> > --#include <asm/localtimer.h> > --#include <asm/sched_clock.h> > --#include <plat/common.h> > --#include <plat/omap_hwmod.h> > -- > --/* Parent clocks, eventually these will come from the clock framework */ > -- > --#define OMAP2_MPU_SOURCE "sys_ck" > --#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE > --#define OMAP4_MPU_SOURCE "sys_clkin_ck" > --#define OMAP2_32K_SOURCE "func_32k_ck" > --#define OMAP3_32K_SOURCE "omap_32k_fck" > --#define OMAP4_32K_SOURCE "sys_32k_ck" > -- > --#ifdef CONFIG_OMAP_32K_TIMER > --#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE > --#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE > --#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE > --#define OMAP3_SECURE_TIMER 12 > --#else > --#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE > --#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE > --#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE > --#define OMAP3_SECURE_TIMER 1 > --#endif > -- > --/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ > --#define MAX_GPTIMER_ID 12 > -- > --u32 sys_timer_reserved; > -- > --/* Clockevent code */ > -- > --static struct omap_dm_timer clkev; > --static struct clock_event_device clockevent_gpt; > -- > --static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) > --{ > -- struct clock_event_device *evt = &clockevent_gpt; > -- > -- __omap_dm_timer_write_status(clkev.io_base, > OMAP_TIMER_INT_OVERFLOW); > -- > -- evt->event_handler(evt); > -- return IRQ_HANDLED; > --} > -- > --static struct irqaction omap2_gp_timer_irq = { > -- .name = "gp timer", > -- .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, > -- .handler = omap2_gp_timer_interrupt, > --}; > -- > --static int omap2_gp_timer_set_next_event(unsigned long cycles, > -- struct clock_event_device *evt) > --{ > -- __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, > -- 0xffffffff - cycles, 1); > -- > -- return 0; > --} > -- > --static void omap2_gp_timer_set_mode(enum clock_event_mode mode, > -- struct clock_event_device *evt) > --{ > -- u32 period; > -- > -- __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); > -- > -- switch (mode) { > -- case CLOCK_EVT_MODE_PERIODIC: > -- period = clkev.rate / HZ; > -- period -= 1; > -- /* Looks like we need to first set the load value separately */ > -- __omap_dm_timer_write(clkev.io_base, > OMAP_TIMER_LOAD_REG, > -- 0xffffffff - period, 1); > -- __omap_dm_timer_load_start(clkev.io_base, > -- OMAP_TIMER_CTRL_AR | > OMAP_TIMER_CTRL_ST, > -- 0xffffffff - period, 1); > -- break; > -- case CLOCK_EVT_MODE_ONESHOT: > -- break; > -- case CLOCK_EVT_MODE_UNUSED: > -- case CLOCK_EVT_MODE_SHUTDOWN: > -- case CLOCK_EVT_MODE_RESUME: > -- break; > -- } > --} > -- > --static struct clock_event_device clockevent_gpt = { > -- .name = "gp timer", > -- .features = CLOCK_EVT_FEAT_PERIODIC | > CLOCK_EVT_FEAT_ONESHOT, > -- .shift = 32, > -- .set_next_event = omap2_gp_timer_set_next_event, > -- .set_mode = omap2_gp_timer_set_mode, > --}; > -- > --static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, > -- int gptimer_id, > -- const char *fck_source) > --{ > -- char name[10]; /* 10 = sizeof("gptXX_Xck0") */ > -- struct omap_hwmod *oh; > -- size_t size; > -- int res = 0; > -- > -- sprintf(name, "timer%d", gptimer_id); > -- omap_hwmod_setup_one(name); > -- oh = omap_hwmod_lookup(name); > -- if (!oh) > -- return -ENODEV; > -- > -- timer->irq = oh->mpu_irqs[0].irq; > -- timer->phys_base = oh->slaves[0]->addr->pa_start; > -- size = oh->slaves[0]->addr->pa_end - timer->phys_base; > -- > -- /* Static mapping, never released */ > -- timer->io_base = ioremap(timer->phys_base, size); > -- if (!timer->io_base) > -- return -ENXIO; > -- > -- /* After the dmtimer is using hwmod these clocks won't be needed */ > -- sprintf(name, "gpt%d_fck", gptimer_id); > -- timer->fclk = clk_get(NULL, name); > -- if (IS_ERR(timer->fclk)) > -- return -ENODEV; > -- > -- sprintf(name, "gpt%d_ick", gptimer_id); > -- timer->iclk = clk_get(NULL, name); > -- if (IS_ERR(timer->iclk)) { > -- clk_put(timer->fclk); > -- return -ENODEV; > -- } > -- > -- omap_hwmod_enable(oh); > -- > -- sys_timer_reserved |= (1 << (gptimer_id - 1)); > -- > -- if (gptimer_id != 12) { > -- struct clk *src; > -- > -- src = clk_get(NULL, fck_source); > -- if (IS_ERR(src)) { > -- res = -EINVAL; > -- } else { > -- res = __omap_dm_timer_set_source(timer->fclk, src); > -- if (IS_ERR_VALUE(res)) > -- pr_warning("%s: timer%i cannot set > source\n", > -- __func__, gptimer_id); > -- clk_put(src); > -- } > -- } > -- __omap_dm_timer_reset(timer->io_base, 1, 1); > -- timer->posted = 1; > -- > -- timer->rate = clk_get_rate(timer->fclk); > -- > -- timer->reserved = 1; > -- > -- return res; > --} > -- > --static void __init omap2_gp_clockevent_init(int gptimer_id, > -- const char *fck_source) > --{ > -- int res; > -- > -- res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); > -- BUG_ON(res); > -- > -- omap2_gp_timer_irq.dev_id = (void *)&clkev; > -- setup_irq(clkev.irq, &omap2_gp_timer_irq); > -- > -- __omap_dm_timer_int_enable(clkev.io_base, > OMAP_TIMER_INT_OVERFLOW); > -- > -- clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, > -- clockevent_gpt.shift); > -- clockevent_gpt.max_delta_ns = > -- clockevent_delta2ns(0xffffffff, &clockevent_gpt); > -- clockevent_gpt.min_delta_ns = > -- clockevent_delta2ns(3, &clockevent_gpt); > -- /* Timer internal resynch latency. */ > -- > -- clockevent_gpt.cpumask = cpumask_of(0); > -- clockevents_register_device(&clockevent_gpt); > -- > -- pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", > -- gptimer_id, clkev.rate); > --} > -- > --/* Clocksource code */ > -- > --#ifdef CONFIG_OMAP_32K_TIMER > --/* > -- * When 32k-timer is enabled, don't use GPTimer for clocksource > -- * instead, just leave default clocksource which uses the 32k > -- * sync counter. See clocksource setup in plat-omap/counter_32k.c > -- */ > -- > --static void __init omap2_gp_clocksource_init(int unused, const char *dummy) > --{ > -- omap_init_clocksource_32k(); > --} > -- > --#else > -- > --static struct omap_dm_timer clksrc; > -- > --/* > -- * clocksource > -- */ > --static DEFINE_CLOCK_DATA(cd); > --static cycle_t clocksource_read_cycles(struct clocksource *cs) > --{ > -- return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); > --} > -- > --static struct clocksource clocksource_gpt = { > -- .name = "gp timer", > -- .rating = 300, > -- .read = clocksource_read_cycles, > -- .mask = CLOCKSOURCE_MASK(32), > -- .flags = CLOCK_SOURCE_IS_CONTINUOUS, > --}; > -- > --static void notrace dmtimer_update_sched_clock(void) > --{ > -- u32 cyc; > -- > -- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); > -- > -- update_sched_clock(&cd, cyc, (u32)~0); > --} > -- > --unsigned long long notrace sched_clock(void) > --{ > -- u32 cyc = 0; > -- > -- if (clksrc.reserved) > -- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); > -- > -- return cyc_to_sched_clock(&cd, cyc, (u32)~0); > --} > -- > --/* Setup free-running counter for clocksource */ > --static void __init omap2_gp_clocksource_init(int gptimer_id, > -- const char *fck_source) > --{ > -- int res; > -- > -- res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); > -- BUG_ON(res); > -- > -- pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", > -- gptimer_id, clksrc.rate); > -- > -- __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, > 0, 1); > -- init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); > -- > -- if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) > -- pr_err("Could not register clocksource %s\n", > -- clocksource_gpt.name); > --} > --#endif > -- > --#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, > \ > -- clksrc_nr, clksrc_src) \ > --static void __init omap##name##_timer_init(void) \ > --{ \ > -- omap2_gp_clockevent_init((clkev_nr), clkev_src); \ > -- omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ > --} > -- > --#define OMAP_SYS_TIMER(name) > \ > --struct sys_timer omap##name##_timer = { > \ > -- .init = omap##name##_timer_init, \ > --}; > -- > --#ifdef CONFIG_ARCH_OMAP2 > --OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, > OMAP2_MPU_SOURCE) > --OMAP_SYS_TIMER(2) > --#endif > -- > --#ifdef CONFIG_ARCH_OMAP3 > --OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, > OMAP3_MPU_SOURCE) > --OMAP_SYS_TIMER(3) > --OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, > OMAP3_CLKEV_SOURCE, > -- 2, OMAP3_MPU_SOURCE) > --OMAP_SYS_TIMER(3_secure) > --#endif > -- > --#ifdef CONFIG_ARCH_OMAP4 > --static void __init omap4_timer_init(void) > --{ > --#ifdef CONFIG_LOCAL_TIMERS > -- twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); > -- BUG_ON(!twd_base); > --#endif > -- omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); > -- omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); > --} > --OMAP_SYS_TIMER(4) > --#endif > -diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c > -new file mode 100644 > -index 0000000..e964072 > ---- /dev/null > -+++ b/arch/arm/mach-omap2/timer.c > -@@ -0,0 +1,342 @@ > -+/* > -+ * linux/arch/arm/mach-omap2/timer.c > -+ * > -+ * OMAP2 GP timer support. > -+ * > -+ * Copyright (C) 2009 Nokia Corporation > -+ * > -+ * Update to use new clocksource/clockevent layers > -+ * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> > -+ * Copyright (C) 2007 MontaVista Software, Inc. > -+ * > -+ * Original driver: > -+ * Copyright (C) 2005 Nokia Corporation > -+ * Author: Paul Mundt <paul.mundt@nokia.com> > -+ * Juha Yrjölä <juha.yrjola@nokia.com> > -+ * OMAP Dual-mode timer framework support by Timo Teras > -+ * > -+ * Some parts based off of TI's 24xx code: > -+ * > -+ * Copyright (C) 2004-2009 Texas Instruments, Inc. > -+ * > -+ * Roughly modelled after the OMAP1 MPU timer code. > -+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> > -+ * > -+ * This file is subject to the terms and conditions of the GNU General Public > -+ * License. See the file "COPYING" in the main directory of this archive > -+ * for more details. > -+ */ > -+#include <linux/init.h> > -+#include <linux/time.h> > -+#include <linux/interrupt.h> > -+#include <linux/err.h> > -+#include <linux/clk.h> > -+#include <linux/delay.h> > -+#include <linux/irq.h> > -+#include <linux/clocksource.h> > -+#include <linux/clockchips.h> > -+ > -+#include <asm/mach/time.h> > -+#include <plat/dmtimer.h> > -+#include <asm/localtimer.h> > -+#include <asm/sched_clock.h> > -+#include <plat/common.h> > -+#include <plat/omap_hwmod.h> > -+ > -+/* Parent clocks, eventually these will come from the clock framework */ > -+ > -+#define OMAP2_MPU_SOURCE "sys_ck" > -+#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE > -+#define OMAP4_MPU_SOURCE "sys_clkin_ck" > -+#define OMAP2_32K_SOURCE "func_32k_ck" > -+#define OMAP3_32K_SOURCE "omap_32k_fck" > -+#define OMAP4_32K_SOURCE "sys_32k_ck" > -+ > -+#ifdef CONFIG_OMAP_32K_TIMER > -+#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE > -+#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE > -+#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE > -+#define OMAP3_SECURE_TIMER 12 > -+#else > -+#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE > -+#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE > -+#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE > -+#define OMAP3_SECURE_TIMER 1 > -+#endif > -+ > -+/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ > -+#define MAX_GPTIMER_ID 12 > -+ > -+u32 sys_timer_reserved; > -+ > -+/* Clockevent code */ > -+ > -+static struct omap_dm_timer clkev; > -+static struct clock_event_device clockevent_gpt; > -+ > -+static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) > -+{ > -+ struct clock_event_device *evt = &clockevent_gpt; > -+ > -+ __omap_dm_timer_write_status(clkev.io_base, > OMAP_TIMER_INT_OVERFLOW); > -+ > -+ evt->event_handler(evt); > -+ return IRQ_HANDLED; > -+} > -+ > -+static struct irqaction omap2_gp_timer_irq = { > -+ .name = "gp timer", > -+ .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, > -+ .handler = omap2_gp_timer_interrupt, > -+}; > -+ > -+static int omap2_gp_timer_set_next_event(unsigned long cycles, > -+ struct clock_event_device *evt) > -+{ > -+ __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, > -+ 0xffffffff - cycles, 1); > -+ > -+ return 0; > -+} > -+ > -+static void omap2_gp_timer_set_mode(enum clock_event_mode mode, > -+ struct clock_event_device *evt) > -+{ > -+ u32 period; > -+ > -+ __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); > -+ > -+ switch (mode) { > -+ case CLOCK_EVT_MODE_PERIODIC: > -+ period = clkev.rate / HZ; > -+ period -= 1; > -+ /* Looks like we need to first set the load value separately */ > -+ __omap_dm_timer_write(clkev.io_base, > OMAP_TIMER_LOAD_REG, > -+ 0xffffffff - period, 1); > -+ __omap_dm_timer_load_start(clkev.io_base, > -+ OMAP_TIMER_CTRL_AR | > OMAP_TIMER_CTRL_ST, > -+ 0xffffffff - period, 1); > -+ break; > -+ case CLOCK_EVT_MODE_ONESHOT: > -+ break; > -+ case CLOCK_EVT_MODE_UNUSED: > -+ case CLOCK_EVT_MODE_SHUTDOWN: > -+ case CLOCK_EVT_MODE_RESUME: > -+ break; > -+ } > -+} > -+ > -+static struct clock_event_device clockevent_gpt = { > -+ .name = "gp timer", > -+ .features = CLOCK_EVT_FEAT_PERIODIC | > CLOCK_EVT_FEAT_ONESHOT, > -+ .shift = 32, > -+ .set_next_event = omap2_gp_timer_set_next_event, > -+ .set_mode = omap2_gp_timer_set_mode, > -+}; > -+ > -+static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, > -+ int gptimer_id, > -+ const char *fck_source) > -+{ > -+ char name[10]; /* 10 = sizeof("gptXX_Xck0") */ > -+ struct omap_hwmod *oh; > -+ size_t size; > -+ int res = 0; > -+ > -+ sprintf(name, "timer%d", gptimer_id); > -+ omap_hwmod_setup_one(name); > -+ oh = omap_hwmod_lookup(name); > -+ if (!oh) > -+ return -ENODEV; > -+ > -+ timer->irq = oh->mpu_irqs[0].irq; > -+ timer->phys_base = oh->slaves[0]->addr->pa_start; > -+ size = oh->slaves[0]->addr->pa_end - timer->phys_base; > -+ > -+ /* Static mapping, never released */ > -+ timer->io_base = ioremap(timer->phys_base, size); > -+ if (!timer->io_base) > -+ return -ENXIO; > -+ > -+ /* After the dmtimer is using hwmod these clocks won't be needed */ > -+ sprintf(name, "gpt%d_fck", gptimer_id); > -+ timer->fclk = clk_get(NULL, name); > -+ if (IS_ERR(timer->fclk)) > -+ return -ENODEV; > -+ > -+ sprintf(name, "gpt%d_ick", gptimer_id); > -+ timer->iclk = clk_get(NULL, name); > -+ if (IS_ERR(timer->iclk)) { > -+ clk_put(timer->fclk); > -+ return -ENODEV; > -+ } > -+ > -+ omap_hwmod_enable(oh); > -+ > -+ sys_timer_reserved |= (1 << (gptimer_id - 1)); > -+ > -+ if (gptimer_id != 12) { > -+ struct clk *src; > -+ > -+ src = clk_get(NULL, fck_source); > -+ if (IS_ERR(src)) { > -+ res = -EINVAL; > -+ } else { > -+ res = __omap_dm_timer_set_source(timer->fclk, src); > -+ if (IS_ERR_VALUE(res)) > -+ pr_warning("%s: timer%i cannot set > source\n", > -+ __func__, gptimer_id); > -+ clk_put(src); > -+ } > -+ } > -+ __omap_dm_timer_reset(timer->io_base, 1, 1); > -+ timer->posted = 1; > -+ > -+ timer->rate = clk_get_rate(timer->fclk); > -+ > -+ timer->reserved = 1; > -+ > -+ return res; > -+} > -+ > -+static void __init omap2_gp_clockevent_init(int gptimer_id, > -+ const char *fck_source) > -+{ > -+ int res; > -+ > -+ res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); > -+ BUG_ON(res); > -+ > -+ omap2_gp_timer_irq.dev_id = (void *)&clkev; > -+ setup_irq(clkev.irq, &omap2_gp_timer_irq); > -+ > -+ __omap_dm_timer_int_enable(clkev.io_base, > OMAP_TIMER_INT_OVERFLOW); > -+ > -+ clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, > -+ clockevent_gpt.shift); > -+ clockevent_gpt.max_delta_ns = > -+ clockevent_delta2ns(0xffffffff, &clockevent_gpt); > -+ clockevent_gpt.min_delta_ns = > -+ clockevent_delta2ns(3, &clockevent_gpt); > -+ /* Timer internal resynch latency. */ > -+ > -+ clockevent_gpt.cpumask = cpumask_of(0); > -+ clockevents_register_device(&clockevent_gpt); > -+ > -+ pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", > -+ gptimer_id, clkev.rate); > -+} > -+ > -+/* Clocksource code */ > -+ > -+#ifdef CONFIG_OMAP_32K_TIMER > -+/* > -+ * When 32k-timer is enabled, don't use GPTimer for clocksource > -+ * instead, just leave default clocksource which uses the 32k > -+ * sync counter. See clocksource setup in plat-omap/counter_32k.c > -+ */ > -+ > -+static void __init omap2_gp_clocksource_init(int unused, const char > *dummy) > -+{ > -+ omap_init_clocksource_32k(); > -+} > -+ > -+#else > -+ > -+static struct omap_dm_timer clksrc; > -+ > -+/* > -+ * clocksource > -+ */ > -+static DEFINE_CLOCK_DATA(cd); > -+static cycle_t clocksource_read_cycles(struct clocksource *cs) > -+{ > -+ return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); > -+} > -+ > -+static struct clocksource clocksource_gpt = { > -+ .name = "gp timer", > -+ .rating = 300, > -+ .read = clocksource_read_cycles, > -+ .mask = CLOCKSOURCE_MASK(32), > -+ .flags = CLOCK_SOURCE_IS_CONTINUOUS, > -+}; > -+ > -+static void notrace dmtimer_update_sched_clock(void) > -+{ > -+ u32 cyc; > -+ > -+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); > -+ > -+ update_sched_clock(&cd, cyc, (u32)~0); > -+} > -+ > -+unsigned long long notrace sched_clock(void) > -+{ > -+ u32 cyc = 0; > -+ > -+ if (clksrc.reserved) > -+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); > -+ > -+ return cyc_to_sched_clock(&cd, cyc, (u32)~0); > -+} > -+ > -+/* Setup free-running counter for clocksource */ > -+static void __init omap2_gp_clocksource_init(int gptimer_id, > -+ const char *fck_source) > -+{ > -+ int res; > -+ > -+ res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); > -+ BUG_ON(res); > -+ > -+ pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", > -+ gptimer_id, clksrc.rate); > -+ > -+ __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, > 0, 1); > -+ init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); > -+ > -+ if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) > -+ pr_err("Could not register clocksource %s\n", > -+ clocksource_gpt.name); > -+} > -+#endif > -+ > -+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, > \ > -+ clksrc_nr, clksrc_src) \ > -+static void __init omap##name##_timer_init(void) \ > -+{ \ > -+ omap2_gp_clockevent_init((clkev_nr), clkev_src); \ > -+ omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ > -+} > -+ > -+#define OMAP_SYS_TIMER(name) > \ > -+struct sys_timer omap##name##_timer = { > \ > -+ .init = omap##name##_timer_init, \ > -+}; > -+ > -+#ifdef CONFIG_ARCH_OMAP2 > -+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, > OMAP2_MPU_SOURCE) > -+OMAP_SYS_TIMER(2) > -+#endif > -+ > -+#ifdef CONFIG_ARCH_OMAP3 > -+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, > OMAP3_MPU_SOURCE) > -+OMAP_SYS_TIMER(3) > -+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, > OMAP3_CLKEV_SOURCE, > -+ 2, OMAP3_MPU_SOURCE) > -+OMAP_SYS_TIMER(3_secure) > -+#endif > -+ > -+#ifdef CONFIG_ARCH_OMAP4 > -+static void __init omap4_timer_init(void) > -+{ > -+#ifdef CONFIG_LOCAL_TIMERS > -+ twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); > -+ BUG_ON(!twd_base); > -+#endif > -+ omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); > -+ omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); > -+} > -+OMAP_SYS_TIMER(4) > -+#endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0017-omap-cleanup- > NAND-platform-data.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch > deleted file mode 100644 > index 792d76a..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0017-omap-cleanup-NAND- > platform-data.patch > +++ /dev/null > @@ -1,165 +0,0 @@ > -From a72eaf768c2f553f72e7afc0b1c52661b2913022 Mon Sep 17 00:00:00 > 2001 > -From: Grazvydas Ignotas <notasas@gmail.com> > -Date: Fri, 3 Jun 2011 19:56:33 +0000 > -Subject: [PATCH 017/149] omap: cleanup NAND platform data > - > -omap_nand_platform_data fields 'options', 'gpio_irq', 'nand_setup' and > -'dma_channel' are never referenced by the NAND driver, yet various > -board files are initializing those fields. This is both incorrect and > -confusing, so remove them. This allows to get rid of a global > -variable in gpmc-nand.c. > - > -This also corrects an issue where some boards are trying to pass NAND > -16bit flag through .options, but the driver is using .devsize instead > -and ignoring .options. > - > -Finally, .dev_ready is treated as a flag by the driver, so make it bool > -instead of a function pointer. > - > -Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/board-cm-t35.c | 2 -- > - arch/arm/mach-omap2/board-cm-t3517.c | 1 - > - arch/arm/mach-omap2/board-flash.c | 4 ---- > - arch/arm/mach-omap2/common-board-devices.c | 6 ++---- > - arch/arm/mach-omap2/gpmc-nand.c | 10 +++------- > - arch/arm/plat-omap/include/plat/nand.h | 6 +----- > - 6 files changed, 6 insertions(+), 23 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach- > omap2/board-cm-t35.c > -index 1a18d3b..d76dca7 100644 > ---- a/arch/arm/mach-omap2/board-cm-t35.c > -+++ b/arch/arm/mach-omap2/board-cm-t35.c > -@@ -162,9 +162,7 @@ static struct mtd_partition cm_t35_nand_partitions[] > = { > - static struct omap_nand_platform_data cm_t35_nand_data = { > - .parts = cm_t35_nand_partitions, > - .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions), > -- .dma_channel = -1, /* disable DMA in OMAP NAND driver > */ > - .cs = 0, > -- > - }; > - > - static void __init cm_t35_init_nand(void) > -diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach- > omap2/board-cm-t3517.c > -index aa67240..05c72f4 100644 > ---- a/arch/arm/mach-omap2/board-cm-t3517.c > -+++ b/arch/arm/mach-omap2/board-cm-t3517.c > -@@ -236,7 +236,6 @@ static struct mtd_partition > cm_t3517_nand_partitions[] = { > - static struct omap_nand_platform_data cm_t3517_nand_data = { > - .parts = cm_t3517_nand_partitions, > - .nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions), > -- .dma_channel = -1, /* disable DMA in OMAP NAND driver > */ > - .cs = 0, > - }; > - > -diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach- > omap2/board-flash.c > -index 729892f..aa1b0cb 100644 > ---- a/arch/arm/mach-omap2/board-flash.c > -+++ b/arch/arm/mach-omap2/board-flash.c > -@@ -132,11 +132,7 @@ static struct gpmc_timings nand_timings = { > - }; > - > - static struct omap_nand_platform_data board_nand_data = { > -- .nand_setup = NULL, > - .gpmc_t = &nand_timings, > -- .dma_channel = -1, /* disable DMA in OMAP NAND driver > */ > -- .dev_ready = NULL, > -- .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */ > - }; > - > - void > -diff --git a/arch/arm/mach-omap2/common-board-devices.c > b/arch/arm/mach-omap2/common-board-devices.c > -index 94ccf46..0043fa8 100644 > ---- a/arch/arm/mach-omap2/common-board-devices.c > -+++ b/arch/arm/mach-omap2/common-board-devices.c > -@@ -115,9 +115,7 @@ void __init omap_ads7846_init(int bus_num, int > gpio_pendown, int gpio_debounce, > - #endif > - > - #if defined(CONFIG_MTD_NAND_OMAP2) || > defined(CONFIG_MTD_NAND_OMAP2_MODULE) > --static struct omap_nand_platform_data nand_data = { > -- .dma_channel = -1, /* disable DMA in OMAP NAND driver > */ > --}; > -+static struct omap_nand_platform_data nand_data; > - > - void __init omap_nand_flash_init(int options, struct mtd_partition *parts, > - int nr_parts) > -@@ -148,7 +146,7 @@ void __init omap_nand_flash_init(int options, struct > mtd_partition *parts, > - nand_data.cs = nandcs; > - nand_data.parts = parts; > - nand_data.nr_parts = nr_parts; > -- nand_data.options = options; > -+ nand_data.devsize = options; > - > - printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); > - if (gpmc_nand_init(&nand_data) < 0) > -diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach- > omap2/gpmc-nand.c > -index c1791d0..8ad210b 100644 > ---- a/arch/arm/mach-omap2/gpmc-nand.c > -+++ b/arch/arm/mach-omap2/gpmc-nand.c > -@@ -20,8 +20,6 @@ > - #include <plat/board.h> > - #include <plat/gpmc.h> > - > --static struct omap_nand_platform_data *gpmc_nand_data; > -- > - static struct resource gpmc_nand_resource = { > - .flags = IORESOURCE_MEM, > - }; > -@@ -33,7 +31,7 @@ static struct platform_device gpmc_nand_device = { > - .resource = &gpmc_nand_resource, > - }; > - > --static int omap2_nand_gpmc_retime(void) > -+static int omap2_nand_gpmc_retime(struct omap_nand_platform_data > *gpmc_nand_data) > - { > - struct gpmc_timings t; > - int err; > -@@ -83,13 +81,11 @@ static int omap2_nand_gpmc_retime(void) > - return 0; > - } > - > --int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) > -+int __init gpmc_nand_init(struct omap_nand_platform_data > *gpmc_nand_data) > - { > - int err = 0; > - struct device *dev = &gpmc_nand_device.dev; > - > -- gpmc_nand_data = _nand_data; > -- gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime; > - gpmc_nand_device.dev.platform_data = gpmc_nand_data; > - > - err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, > -@@ -100,7 +96,7 @@ int __init gpmc_nand_init(struct > omap_nand_platform_data *_nand_data) > - } > - > - /* Set timings in GPMC */ > -- err = omap2_nand_gpmc_retime(); > -+ err = omap2_nand_gpmc_retime(gpmc_nand_data); > - if (err < 0) { > - dev_err(dev, "Unable to set gpmc timings: %d\n", err); > - return err; > -diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat- > omap/include/plat/nand.h > -index d86d1ec..67fc506 100644 > ---- a/arch/arm/plat-omap/include/plat/nand.h > -+++ b/arch/arm/plat-omap/include/plat/nand.h > -@@ -19,15 +19,11 @@ enum nand_io { > - }; > - > - struct omap_nand_platform_data { > -- unsigned int options; > - int cs; > -- int gpio_irq; > - struct mtd_partition *parts; > - struct gpmc_timings *gpmc_t; > - int nr_parts; > -- int (*nand_setup)(void); > -- int (*dev_ready)(struct > omap_nand_platform_data *); > -- int dma_channel; > -+ bool dev_ready; > - int gpmc_irq; > - enum nand_io xfer_type; > - unsigned long phys_base; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0018-omap-board- > omap3evm-Fix-compilation-error.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch > deleted file mode 100644 > index aa9cc6e..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0018-omap-board- > omap3evm-Fix-compilation-error.patch > +++ /dev/null > @@ -1,40 +0,0 @@ > -From 3e0e5636effabe150374f2a212974f1e954be5b2 Mon Sep 17 00:00:00 > 2001 > -From: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Date: Tue, 28 Jun 2011 10:16:55 +0000 > -Subject: [PATCH 018/149] omap: board-omap3evm: Fix compilation error > - > -Fix compilation error introduced with > 786b01a8c1db0c0decca55d660a2a3ebd7cfb26b > -(cleanup regulator supply definitions in mach-omap2). > - > -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > -[tony@atomide.com: updated comments] > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/board-omap3evm.c | 4 ++-- > - 1 files changed, 2 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > -index 6f957ed..57bce0f 100644 > ---- a/arch/arm/mach-omap2/board-omap3evm.c > -+++ b/arch/arm/mach-omap2/board-omap3evm.c > -@@ -510,7 +510,7 @@ static struct regulator_init_data omap3evm_vio = { > - #define OMAP3EVM_WLAN_IRQ_GPIO (149) > - > - static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), > - }; > - > - /* VMMC2 for driving the WL12xx module */ > -@@ -518,7 +518,7 @@ static struct regulator_init_data omap3evm_vmmc2 = > { > - .constraints = { > - .valid_ops_mask = REGULATOR_CHANGE_STATUS, > - }, > -- .num_consumer_supplies = > ARRAY_SIZE(omap3evm_vmmc2_supply);, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3evm_vmmc2_supply), > - .consumer_supplies = omap3evm_vmmc2_supply, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0019-omap-mcbsp- > Drop-SPI-mode-support.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch > deleted file mode 100644 > index b233473..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0019-omap-mcbsp-Drop- > SPI-mode-support.patch > +++ /dev/null > @@ -1,311 +0,0 @@ > -From 20f244f6b795ee54f053eee5a5e0f9313a13e403 Mon Sep 17 00:00:00 > 2001 > -From: Jarkko Nikula <jhnikula@gmail.com> > -Date: Tue, 14 Jun 2011 11:23:51 +0000 > -Subject: [PATCH 019/149] omap: mcbsp: Drop SPI mode support > - > -We haven't seen any use for the SPI API in McBSP driver over the years. More > -over, Peter Ujfalusi <peter.ujfalusi@ti.com> noticed that SPI mode is not > -even supported since OMAP2430 so it's very unlikely that we'll see any use > -for it in the future either. > - > -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> > -Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/plat-omap/include/plat/mcbsp.h | 37 ------ > - arch/arm/plat-omap/mcbsp.c | 214 ------------------------------- > - 2 files changed, 0 insertions(+), 251 deletions(-) > - > -diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat- > omap/include/plat/mcbsp.h > -index f8f690a..3fc75a8 100644 > ---- a/arch/arm/plat-omap/include/plat/mcbsp.h > -+++ b/arch/arm/plat-omap/include/plat/mcbsp.h > -@@ -353,38 +353,6 @@ typedef enum { > - OMAP_MCBSP_WORD_32, > - } omap_mcbsp_word_length; > - > --typedef enum { > -- OMAP_MCBSP_CLK_RISING = 0, > -- OMAP_MCBSP_CLK_FALLING, > --} omap_mcbsp_clk_polarity; > -- > --typedef enum { > -- OMAP_MCBSP_FS_ACTIVE_HIGH = 0, > -- OMAP_MCBSP_FS_ACTIVE_LOW, > --} omap_mcbsp_fs_polarity; > -- > --typedef enum { > -- OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0, > -- OMAP_MCBSP_CLK_STP_MODE_DELAY, > --} omap_mcbsp_clk_stp_mode; > -- > -- > --/******* SPI specific mode **********/ > --typedef enum { > -- OMAP_MCBSP_SPI_MASTER = 0, > -- OMAP_MCBSP_SPI_SLAVE, > --} omap_mcbsp_spi_mode; > -- > --struct omap_mcbsp_spi_cfg { > -- omap_mcbsp_spi_mode spi_mode; > -- omap_mcbsp_clk_polarity rx_clock_polarity; > -- omap_mcbsp_clk_polarity tx_clock_polarity; > -- omap_mcbsp_fs_polarity fsx_polarity; > -- u8 clk_div; > -- omap_mcbsp_clk_stp_mode clk_stp_mode; > -- omap_mcbsp_word_length word_length; > --}; > -- > - /* Platform specific configuration */ > - struct omap_mcbsp_ops { > - void (*request)(unsigned int); > -@@ -504,14 +472,9 @@ u32 omap_mcbsp_recv_word(unsigned int id); > - > - int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned > int length); > - int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned > int length); > --int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word); > --int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word); > -- > - > - /* McBSP functional clock source changing function */ > - extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); > --/* SPI specific API */ > --void omap_mcbsp_set_spi_mode(unsigned int id, const struct > omap_mcbsp_spi_cfg * spi_cfg); > - > - /* Polled read/write functions */ > - int omap_mcbsp_pollread(unsigned int id, u16 * buf); > -diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c > -index 5587acf..1de2724 100644 > ---- a/arch/arm/plat-omap/mcbsp.c > -+++ b/arch/arm/plat-omap/mcbsp.c > -@@ -1175,147 +1175,6 @@ u32 omap_mcbsp_recv_word(unsigned int id) > - } > - EXPORT_SYMBOL(omap_mcbsp_recv_word); > - > --int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) > --{ > -- struct omap_mcbsp *mcbsp; > -- omap_mcbsp_word_length tx_word_length; > -- omap_mcbsp_word_length rx_word_length; > -- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return -ENODEV; > -- } > -- mcbsp = id_to_mcbsp_ptr(id); > -- tx_word_length = mcbsp->tx_word_length; > -- rx_word_length = mcbsp->rx_word_length; > -- > -- if (tx_word_length != rx_word_length) > -- return -EINVAL; > -- > -- /* First we wait for the transmitter to be ready */ > -- spcr2 = MCBSP_READ(mcbsp, SPCR2); > -- while (!(spcr2 & XRDY)) { > -- spcr2 = MCBSP_READ(mcbsp, SPCR2); > -- if (attempts++ > 1000) { > -- /* We must reset the transmitter */ > -- MCBSP_WRITE(mcbsp, SPCR2, > -- MCBSP_READ_CACHE(mcbsp, SPCR2) & > (~XRST)); > -- udelay(10); > -- MCBSP_WRITE(mcbsp, SPCR2, > -- MCBSP_READ_CACHE(mcbsp, SPCR2) | > XRST); > -- udelay(10); > -- dev_err(mcbsp->dev, "McBSP%d transmitter not " > -- "ready\n", mcbsp->id); > -- return -EAGAIN; > -- } > -- } > -- > -- /* Now we can push the data */ > -- if (tx_word_length > OMAP_MCBSP_WORD_16) > -- MCBSP_WRITE(mcbsp, DXR2, word >> 16); > -- MCBSP_WRITE(mcbsp, DXR1, word & 0xffff); > -- > -- /* We wait for the receiver to be ready */ > -- spcr1 = MCBSP_READ(mcbsp, SPCR1); > -- while (!(spcr1 & RRDY)) { > -- spcr1 = MCBSP_READ(mcbsp, SPCR1); > -- if (attempts++ > 1000) { > -- /* We must reset the receiver */ > -- MCBSP_WRITE(mcbsp, SPCR1, > -- MCBSP_READ_CACHE(mcbsp, SPCR1) & > (~RRST)); > -- udelay(10); > -- MCBSP_WRITE(mcbsp, SPCR1, > -- MCBSP_READ_CACHE(mcbsp, SPCR1) | > RRST); > -- udelay(10); > -- dev_err(mcbsp->dev, "McBSP%d receiver not " > -- "ready\n", mcbsp->id); > -- return -EAGAIN; > -- } > -- } > -- > -- /* Receiver is ready, let's read the dummy data */ > -- if (rx_word_length > OMAP_MCBSP_WORD_16) > -- word_msb = MCBSP_READ(mcbsp, DRR2); > -- word_lsb = MCBSP_READ(mcbsp, DRR1); > -- > -- return 0; > --} > --EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll); > -- > --int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) > --{ > -- struct omap_mcbsp *mcbsp; > -- u32 clock_word = 0; > -- omap_mcbsp_word_length tx_word_length; > -- omap_mcbsp_word_length rx_word_length; > -- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return -ENODEV; > -- } > -- > -- mcbsp = id_to_mcbsp_ptr(id); > -- > -- tx_word_length = mcbsp->tx_word_length; > -- rx_word_length = mcbsp->rx_word_length; > -- > -- if (tx_word_length != rx_word_length) > -- return -EINVAL; > -- > -- /* First we wait for the transmitter to be ready */ > -- spcr2 = MCBSP_READ(mcbsp, SPCR2); > -- while (!(spcr2 & XRDY)) { > -- spcr2 = MCBSP_READ(mcbsp, SPCR2); > -- if (attempts++ > 1000) { > -- /* We must reset the transmitter */ > -- MCBSP_WRITE(mcbsp, SPCR2, > -- MCBSP_READ_CACHE(mcbsp, SPCR2) & > (~XRST)); > -- udelay(10); > -- MCBSP_WRITE(mcbsp, SPCR2, > -- MCBSP_READ_CACHE(mcbsp, SPCR2) | > XRST); > -- udelay(10); > -- dev_err(mcbsp->dev, "McBSP%d transmitter not " > -- "ready\n", mcbsp->id); > -- return -EAGAIN; > -- } > -- } > -- > -- /* We first need to enable the bus clock */ > -- if (tx_word_length > OMAP_MCBSP_WORD_16) > -- MCBSP_WRITE(mcbsp, DXR2, clock_word >> 16); > -- MCBSP_WRITE(mcbsp, DXR1, clock_word & 0xffff); > -- > -- /* We wait for the receiver to be ready */ > -- spcr1 = MCBSP_READ(mcbsp, SPCR1); > -- while (!(spcr1 & RRDY)) { > -- spcr1 = MCBSP_READ(mcbsp, SPCR1); > -- if (attempts++ > 1000) { > -- /* We must reset the receiver */ > -- MCBSP_WRITE(mcbsp, SPCR1, > -- MCBSP_READ_CACHE(mcbsp, SPCR1) & > (~RRST)); > -- udelay(10); > -- MCBSP_WRITE(mcbsp, SPCR1, > -- MCBSP_READ_CACHE(mcbsp, SPCR1) | > RRST); > -- udelay(10); > -- dev_err(mcbsp->dev, "McBSP%d receiver not " > -- "ready\n", mcbsp->id); > -- return -EAGAIN; > -- } > -- } > -- > -- /* Receiver is ready, there is something for us */ > -- if (rx_word_length > OMAP_MCBSP_WORD_16) > -- word_msb = MCBSP_READ(mcbsp, DRR2); > -- word_lsb = MCBSP_READ(mcbsp, DRR1); > -- > -- word[0] = (word_lsb | (word_msb << 16)); > -- > -- return 0; > --} > --EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll); > -- > - /* > - * Simple DMA based buffer rx/tx routines. > - * Nothing fancy, just a single buffer tx/rx through DMA. > -@@ -1449,79 +1308,6 @@ int omap_mcbsp_recv_buffer(unsigned int id, > dma_addr_t buffer, > - } > - EXPORT_SYMBOL(omap_mcbsp_recv_buffer); > - > --/* > -- * SPI wrapper. > -- * Since SPI setup is much simpler than the generic McBSP one, > -- * this wrapper just need an omap_mcbsp_spi_cfg structure as an input. > -- * Once this is done, you can call omap_mcbsp_start(). > -- */ > --void omap_mcbsp_set_spi_mode(unsigned int id, > -- const struct omap_mcbsp_spi_cfg *spi_cfg) > --{ > -- struct omap_mcbsp *mcbsp; > -- struct omap_mcbsp_reg_cfg mcbsp_cfg; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return; > -- } > -- mcbsp = id_to_mcbsp_ptr(id); > -- > -- memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg)); > -- > -- /* SPI has only one frame */ > -- mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0)); > -- mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0)); > -- > -- /* Clock stop mode */ > -- if (spi_cfg->clk_stp_mode == > OMAP_MCBSP_CLK_STP_MODE_NO_DELAY) > -- mcbsp_cfg.spcr1 |= (1 << 12); > -- else > -- mcbsp_cfg.spcr1 |= (3 << 11); > -- > -- /* Set clock parities */ > -- if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING) > -- mcbsp_cfg.pcr0 |= CLKRP; > -- else > -- mcbsp_cfg.pcr0 &= ~CLKRP; > -- > -- if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING) > -- mcbsp_cfg.pcr0 &= ~CLKXP; > -- else > -- mcbsp_cfg.pcr0 |= CLKXP; > -- > -- /* Set SCLKME to 0 and CLKSM to 1 */ > -- mcbsp_cfg.pcr0 &= ~SCLKME; > -- mcbsp_cfg.srgr2 |= CLKSM; > -- > -- /* Set FSXP */ > -- if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH) > -- mcbsp_cfg.pcr0 &= ~FSXP; > -- else > -- mcbsp_cfg.pcr0 |= FSXP; > -- > -- if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) { > -- mcbsp_cfg.pcr0 |= CLKXM; > -- mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1); > -- mcbsp_cfg.pcr0 |= FSXM; > -- mcbsp_cfg.srgr2 &= ~FSGM; > -- mcbsp_cfg.xcr2 |= XDATDLY(1); > -- mcbsp_cfg.rcr2 |= RDATDLY(1); > -- } else { > -- mcbsp_cfg.pcr0 &= ~CLKXM; > -- mcbsp_cfg.srgr1 |= CLKGDV(1); > -- mcbsp_cfg.pcr0 &= ~FSXM; > -- mcbsp_cfg.xcr2 &= ~XDATDLY(3); > -- mcbsp_cfg.rcr2 &= ~RDATDLY(3); > -- } > -- > -- mcbsp_cfg.xcr2 &= ~XPHASE; > -- mcbsp_cfg.rcr2 &= ~RPHASE; > -- > -- omap_mcbsp_config(id, &mcbsp_cfg); > --} > --EXPORT_SYMBOL(omap_mcbsp_set_spi_mode); > -- > - #ifdef CONFIG_ARCH_OMAP3 > - #define max_thres(m) (mcbsp->pdata->buffer_size) > - #define valid_threshold(m, val) ((val) <= max_thres(m)) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0020-omap-mcbsp- > Drop-in-driver-transfer-support.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch > deleted file mode 100644 > index 510a22d..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0020-omap-mcbsp-Drop- > in-driver-transfer-support.patch > +++ /dev/null > @@ -1,548 +0,0 @@ > -From 8eea6f162c7a82d44c8e7c444cadfa43c4d586e5 Mon Sep 17 00:00:00 > 2001 > -From: Jarkko Nikula <jhnikula@gmail.com> > -Date: Tue, 14 Jun 2011 11:23:52 +0000 > -Subject: [PATCH 020/149] omap: mcbsp: Drop in-driver transfer support > - > -We haven't seen either use for in-driver transfer API in McBSP driver > -over the years so it looks they can be removed too. > - > -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/plat-omap/include/plat/mcbsp.h | 25 -- > - arch/arm/plat-omap/mcbsp.c | 382 ++----------------------------- > - 2 files changed, 19 insertions(+), 388 deletions(-) > - > -diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat- > omap/include/plat/mcbsp.h > -index 3fc75a8..6c53508 100644 > ---- a/arch/arm/plat-omap/include/plat/mcbsp.h > -+++ b/arch/arm/plat-omap/include/plat/mcbsp.h > -@@ -24,7 +24,6 @@ > - #ifndef __ASM_ARCH_OMAP_MCBSP_H > - #define __ASM_ARCH_OMAP_MCBSP_H > - > --#include <linux/completion.h> > - #include <linux/spinlock.h> > - > - #include <mach/hardware.h> > -@@ -340,10 +339,6 @@ typedef enum { > - OMAP_MCBSP5 > - } omap_mcbsp_id; > - > --typedef int __bitwise omap_mcbsp_io_type_t; > --#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1) > --#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2) > -- > - typedef enum { > - OMAP_MCBSP_WORD_8 = 0, > - OMAP_MCBSP_WORD_12, > -@@ -393,22 +388,12 @@ struct omap_mcbsp { > - omap_mcbsp_word_length rx_word_length; > - omap_mcbsp_word_length tx_word_length; > - > -- omap_mcbsp_io_type_t io_type; /* IRQ or poll */ > -- /* IRQ based TX/RX */ > - int rx_irq; > - int tx_irq; > - > - /* DMA stuff */ > - u8 dma_rx_sync; > -- short dma_rx_lch; > - u8 dma_tx_sync; > -- short dma_tx_lch; > -- > -- /* Completion queues */ > -- struct completion tx_irq_completion; > -- struct completion rx_irq_completion; > -- struct completion tx_dma_completion; > -- struct completion rx_dma_completion; > - > - /* Protect the field .free, while checking if the mcbsp is in use */ > - spinlock_t lock; > -@@ -467,20 +452,10 @@ int omap_mcbsp_request(unsigned int id); > - void omap_mcbsp_free(unsigned int id); > - void omap_mcbsp_start(unsigned int id, int tx, int rx); > - void omap_mcbsp_stop(unsigned int id, int tx, int rx); > --void omap_mcbsp_xmit_word(unsigned int id, u32 word); > --u32 omap_mcbsp_recv_word(unsigned int id); > -- > --int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned > int length); > --int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned > int length); > - > - /* McBSP functional clock source changing function */ > - extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); > - > --/* Polled read/write functions */ > --int omap_mcbsp_pollread(unsigned int id, u16 * buf); > --int omap_mcbsp_pollwrite(unsigned int id, u16 buf); > --int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t > io_type); > -- > - /* McBSP signal muxing API */ > - void omap2_mcbsp1_mux_clkr_src(u8 mux); > - void omap2_mcbsp1_mux_fsr_src(u8 mux); > -diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c > -index 1de2724..455eadc 100644 > ---- a/arch/arm/plat-omap/mcbsp.c > -+++ b/arch/arm/plat-omap/mcbsp.c > -@@ -16,8 +16,6 @@ > - #include <linux/init.h> > - #include <linux/device.h> > - #include <linux/platform_device.h> > --#include <linux/wait.h> > --#include <linux/completion.h> > - #include <linux/interrupt.h> > - #include <linux/err.h> > - #include <linux/clk.h> > -@@ -25,7 +23,6 @@ > - #include <linux/io.h> > - #include <linux/slab.h> > - > --#include <plat/dma.h> > - #include <plat/mcbsp.h> > - #include <plat/omap_device.h> > - #include <linux/pm_runtime.h> > -@@ -136,8 +133,6 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int > irq, void *dev_id) > - irqst_spcr2); > - /* Writing zero to XSYNC_ERR clears the IRQ */ > - MCBSP_WRITE(mcbsp_tx, SPCR2, > MCBSP_READ_CACHE(mcbsp_tx, SPCR2)); > -- } else { > -- complete(&mcbsp_tx->tx_irq_completion); > - } > - > - return IRQ_HANDLED; > -@@ -156,41 +151,11 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int > irq, void *dev_id) > - irqst_spcr1); > - /* Writing zero to RSYNC_ERR clears the IRQ */ > - MCBSP_WRITE(mcbsp_rx, SPCR1, > MCBSP_READ_CACHE(mcbsp_rx, SPCR1)); > -- } else { > -- complete(&mcbsp_rx->rx_irq_completion); > - } > - > - return IRQ_HANDLED; > - } > - > --static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) > --{ > -- struct omap_mcbsp *mcbsp_dma_tx = data; > -- > -- dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n", > -- MCBSP_READ(mcbsp_dma_tx, SPCR2)); > -- > -- /* We can free the channels */ > -- omap_free_dma(mcbsp_dma_tx->dma_tx_lch); > -- mcbsp_dma_tx->dma_tx_lch = -1; > -- > -- complete(&mcbsp_dma_tx->tx_dma_completion); > --} > -- > --static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data) > --{ > -- struct omap_mcbsp *mcbsp_dma_rx = data; > -- > -- dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n", > -- MCBSP_READ(mcbsp_dma_rx, SPCR2)); > -- > -- /* We can free the channels */ > -- omap_free_dma(mcbsp_dma_rx->dma_rx_lch); > -- mcbsp_dma_rx->dma_rx_lch = -1; > -- > -- complete(&mcbsp_dma_rx->rx_dma_completion); > --} > -- > - /* > - * omap_mcbsp_config simply write a config to the > - * appropriate McBSP. > -@@ -758,37 +723,6 @@ static inline void omap_st_start(struct omap_mcbsp > *mcbsp) {} > - static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {} > - #endif > - > --/* > -- * We can choose between IRQ based or polled IO. > -- * This needs to be called before omap_mcbsp_request(). > -- */ > --int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t > io_type) > --{ > -- struct omap_mcbsp *mcbsp; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return -ENODEV; > -- } > -- mcbsp = id_to_mcbsp_ptr(id); > -- > -- spin_lock(&mcbsp->lock); > -- > -- if (!mcbsp->free) { > -- dev_err(mcbsp->dev, "McBSP%d is currently in use\n", > -- mcbsp->id); > -- spin_unlock(&mcbsp->lock); > -- return -EINVAL; > -- } > -- > -- mcbsp->io_type = io_type; > -- > -- spin_unlock(&mcbsp->lock); > -- > -- return 0; > --} > --EXPORT_SYMBOL(omap_mcbsp_set_io_type); > -- > - int omap_mcbsp_request(unsigned int id) > - { > - struct omap_mcbsp *mcbsp; > -@@ -833,29 +767,24 @@ int omap_mcbsp_request(unsigned int id) > - MCBSP_WRITE(mcbsp, SPCR1, 0); > - MCBSP_WRITE(mcbsp, SPCR2, 0); > - > -- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { > -- /* We need to get IRQs here */ > -- init_completion(&mcbsp->tx_irq_completion); > -- err = request_irq(mcbsp->tx_irq, > omap_mcbsp_tx_irq_handler, > -- 0, "McBSP", (void *)mcbsp); > -+ err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, > -+ 0, "McBSP", (void *)mcbsp); > -+ if (err != 0) { > -+ dev_err(mcbsp->dev, "Unable to request TX IRQ %d " > -+ "for McBSP%d\n", mcbsp->tx_irq, > -+ mcbsp->id); > -+ goto err_clk_disable; > -+ } > -+ > -+ if (mcbsp->rx_irq) { > -+ err = request_irq(mcbsp->rx_irq, > -+ omap_mcbsp_rx_irq_handler, > -+ 0, "McBSP", (void *)mcbsp); > - if (err != 0) { > -- dev_err(mcbsp->dev, "Unable to request TX IRQ %d " > -- "for McBSP%d\n", mcbsp->tx_irq, > -+ dev_err(mcbsp->dev, "Unable to request RX IRQ %d " > -+ "for McBSP%d\n", mcbsp->rx_irq, > - mcbsp->id); > -- goto err_clk_disable; > -- } > -- > -- if (mcbsp->rx_irq) { > -- init_completion(&mcbsp->rx_irq_completion); > -- err = request_irq(mcbsp->rx_irq, > -- omap_mcbsp_rx_irq_handler, > -- 0, "McBSP", (void *)mcbsp); > -- if (err != 0) { > -- dev_err(mcbsp->dev, "Unable to request RX > IRQ %d " > -- "for McBSP%d\n", mcbsp- > >rx_irq, > -- mcbsp->id); > -- goto err_free_irq; > -- } > -+ goto err_free_irq; > - } > - } > - > -@@ -901,12 +830,9 @@ void omap_mcbsp_free(unsigned int id) > - > - pm_runtime_put_sync(mcbsp->dev); > - > -- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { > -- /* Free IRQs */ > -- if (mcbsp->rx_irq) > -- free_irq(mcbsp->rx_irq, (void *)mcbsp); > -- free_irq(mcbsp->tx_irq, (void *)mcbsp); > -- } > -+ if (mcbsp->rx_irq) > -+ free_irq(mcbsp->rx_irq, (void *)mcbsp); > -+ free_irq(mcbsp->tx_irq, (void *)mcbsp); > - > - reg_cache = mcbsp->reg_cache; > - > -@@ -1043,271 +969,6 @@ void omap_mcbsp_stop(unsigned int id, int tx, int > rx) > - } > - EXPORT_SYMBOL(omap_mcbsp_stop); > - > --/* polled mcbsp i/o operations */ > --int omap_mcbsp_pollwrite(unsigned int id, u16 buf) > --{ > -- struct omap_mcbsp *mcbsp; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return -ENODEV; > -- } > -- > -- mcbsp = id_to_mcbsp_ptr(id); > -- > -- MCBSP_WRITE(mcbsp, DXR1, buf); > -- /* if frame sync error - clear the error */ > -- if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) { > -- /* clear error */ > -- MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, > SPCR2)); > -- /* resend */ > -- return -1; > -- } else { > -- /* wait for transmit confirmation */ > -- int attemps = 0; > -- while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) { > -- if (attemps++ > 1000) { > -- MCBSP_WRITE(mcbsp, SPCR2, > -- MCBSP_READ_CACHE(mcbsp, > SPCR2) & > -- (~XRST)); > -- udelay(10); > -- MCBSP_WRITE(mcbsp, SPCR2, > -- MCBSP_READ_CACHE(mcbsp, > SPCR2) | > -- (XRST)); > -- udelay(10); > -- dev_err(mcbsp->dev, "Could not write to" > -- " McBSP%d Register\n", mcbsp->id); > -- return -2; > -- } > -- } > -- } > -- > -- return 0; > --} > --EXPORT_SYMBOL(omap_mcbsp_pollwrite); > -- > --int omap_mcbsp_pollread(unsigned int id, u16 *buf) > --{ > -- struct omap_mcbsp *mcbsp; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return -ENODEV; > -- } > -- mcbsp = id_to_mcbsp_ptr(id); > -- > -- /* if frame sync error - clear the error */ > -- if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) { > -- /* clear error */ > -- MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, > SPCR1)); > -- /* resend */ > -- return -1; > -- } else { > -- /* wait for receive confirmation */ > -- int attemps = 0; > -- while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) { > -- if (attemps++ > 1000) { > -- MCBSP_WRITE(mcbsp, SPCR1, > -- MCBSP_READ_CACHE(mcbsp, > SPCR1) & > -- (~RRST)); > -- udelay(10); > -- MCBSP_WRITE(mcbsp, SPCR1, > -- MCBSP_READ_CACHE(mcbsp, > SPCR1) | > -- (RRST)); > -- udelay(10); > -- dev_err(mcbsp->dev, "Could not read from" > -- " McBSP%d Register\n", mcbsp->id); > -- return -2; > -- } > -- } > -- } > -- *buf = MCBSP_READ(mcbsp, DRR1); > -- > -- return 0; > --} > --EXPORT_SYMBOL(omap_mcbsp_pollread); > -- > --/* > -- * IRQ based word transmission. > -- */ > --void omap_mcbsp_xmit_word(unsigned int id, u32 word) > --{ > -- struct omap_mcbsp *mcbsp; > -- omap_mcbsp_word_length word_length; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return; > -- } > -- > -- mcbsp = id_to_mcbsp_ptr(id); > -- word_length = mcbsp->tx_word_length; > -- > -- wait_for_completion(&mcbsp->tx_irq_completion); > -- > -- if (word_length > OMAP_MCBSP_WORD_16) > -- MCBSP_WRITE(mcbsp, DXR2, word >> 16); > -- MCBSP_WRITE(mcbsp, DXR1, word & 0xffff); > --} > --EXPORT_SYMBOL(omap_mcbsp_xmit_word); > -- > --u32 omap_mcbsp_recv_word(unsigned int id) > --{ > -- struct omap_mcbsp *mcbsp; > -- u16 word_lsb, word_msb = 0; > -- omap_mcbsp_word_length word_length; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return -ENODEV; > -- } > -- mcbsp = id_to_mcbsp_ptr(id); > -- > -- word_length = mcbsp->rx_word_length; > -- > -- wait_for_completion(&mcbsp->rx_irq_completion); > -- > -- if (word_length > OMAP_MCBSP_WORD_16) > -- word_msb = MCBSP_READ(mcbsp, DRR2); > -- word_lsb = MCBSP_READ(mcbsp, DRR1); > -- > -- return (word_lsb | (word_msb << 16)); > --} > --EXPORT_SYMBOL(omap_mcbsp_recv_word); > -- > --/* > -- * Simple DMA based buffer rx/tx routines. > -- * Nothing fancy, just a single buffer tx/rx through DMA. > -- * The DMA resources are released once the transfer is done. > -- * For anything fancier, you should use your own customized DMA > -- * routines and callbacks. > -- */ > --int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, > -- unsigned int length) > --{ > -- struct omap_mcbsp *mcbsp; > -- int dma_tx_ch; > -- int src_port = 0; > -- int dest_port = 0; > -- int sync_dev = 0; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return -ENODEV; > -- } > -- mcbsp = id_to_mcbsp_ptr(id); > -- > -- if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX", > -- omap_mcbsp_tx_dma_callback, > -- mcbsp, > -- &dma_tx_ch)) { > -- dev_err(mcbsp->dev, " Unable to request DMA channel for " > -- "McBSP%d TX. Trying IRQ based TX\n", > -- mcbsp->id); > -- return -EAGAIN; > -- } > -- mcbsp->dma_tx_lch = dma_tx_ch; > -- > -- dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp- > >id, > -- dma_tx_ch); > -- > -- init_completion(&mcbsp->tx_dma_completion); > -- > -- if (cpu_class_is_omap1()) { > -- src_port = OMAP_DMA_PORT_TIPB; > -- dest_port = OMAP_DMA_PORT_EMIFF; > -- } > -- if (cpu_class_is_omap2()) > -- sync_dev = mcbsp->dma_tx_sync; > -- > -- omap_set_dma_transfer_params(mcbsp->dma_tx_lch, > -- OMAP_DMA_DATA_TYPE_S16, > -- length >> 1, 1, > -- OMAP_DMA_SYNC_ELEMENT, > -- sync_dev, 0); > -- > -- omap_set_dma_dest_params(mcbsp->dma_tx_lch, > -- src_port, > -- OMAP_DMA_AMODE_CONSTANT, > -- mcbsp->phys_base + > OMAP_MCBSP_REG_DXR1, > -- 0, 0); > -- > -- omap_set_dma_src_params(mcbsp->dma_tx_lch, > -- dest_port, > -- OMAP_DMA_AMODE_POST_INC, > -- buffer, > -- 0, 0); > -- > -- omap_start_dma(mcbsp->dma_tx_lch); > -- wait_for_completion(&mcbsp->tx_dma_completion); > -- > -- return 0; > --} > --EXPORT_SYMBOL(omap_mcbsp_xmit_buffer); > -- > --int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, > -- unsigned int length) > --{ > -- struct omap_mcbsp *mcbsp; > -- int dma_rx_ch; > -- int src_port = 0; > -- int dest_port = 0; > -- int sync_dev = 0; > -- > -- if (!omap_mcbsp_check_valid_id(id)) { > -- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); > -- return -ENODEV; > -- } > -- mcbsp = id_to_mcbsp_ptr(id); > -- > -- if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX", > -- omap_mcbsp_rx_dma_callback, > -- mcbsp, > -- &dma_rx_ch)) { > -- dev_err(mcbsp->dev, "Unable to request DMA channel for " > -- "McBSP%d RX. Trying IRQ based RX\n", > -- mcbsp->id); > -- return -EAGAIN; > -- } > -- mcbsp->dma_rx_lch = dma_rx_ch; > -- > -- dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp- > >id, > -- dma_rx_ch); > -- > -- init_completion(&mcbsp->rx_dma_completion); > -- > -- if (cpu_class_is_omap1()) { > -- src_port = OMAP_DMA_PORT_TIPB; > -- dest_port = OMAP_DMA_PORT_EMIFF; > -- } > -- if (cpu_class_is_omap2()) > -- sync_dev = mcbsp->dma_rx_sync; > -- > -- omap_set_dma_transfer_params(mcbsp->dma_rx_lch, > -- OMAP_DMA_DATA_TYPE_S16, > -- length >> 1, 1, > -- OMAP_DMA_SYNC_ELEMENT, > -- sync_dev, 0); > -- > -- omap_set_dma_src_params(mcbsp->dma_rx_lch, > -- src_port, > -- OMAP_DMA_AMODE_CONSTANT, > -- mcbsp->phys_base + > OMAP_MCBSP_REG_DRR1, > -- 0, 0); > -- > -- omap_set_dma_dest_params(mcbsp->dma_rx_lch, > -- dest_port, > -- OMAP_DMA_AMODE_POST_INC, > -- buffer, > -- 0, 0); > -- > -- omap_start_dma(mcbsp->dma_rx_lch); > -- wait_for_completion(&mcbsp->rx_dma_completion); > -- > -- return 0; > --} > --EXPORT_SYMBOL(omap_mcbsp_recv_buffer); > -- > - #ifdef CONFIG_ARCH_OMAP3 > - #define max_thres(m) (mcbsp->pdata->buffer_size) > - #define valid_threshold(m, val) ((val) <= max_thres(m)) > -@@ -1619,8 +1280,6 @@ static int __devinit omap_mcbsp_probe(struct > platform_device *pdev) > - spin_lock_init(&mcbsp->lock); > - mcbsp->id = id + 1; > - mcbsp->free = true; > -- mcbsp->dma_tx_lch = -1; > -- mcbsp->dma_rx_lch = -1; > - > - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, > "mpu"); > - if (!res) { > -@@ -1646,9 +1305,6 @@ static int __devinit omap_mcbsp_probe(struct > platform_device *pdev) > - else > - mcbsp->phys_dma_base = res->start; > - > -- /* Default I/O is IRQ based */ > -- mcbsp->io_type = OMAP_MCBSP_IRQ_IO; > -- > - mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); > - mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021-omap2-fix- > build-regression.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021- > omap2-fix-build-regression.patch > deleted file mode 100644 > index 0b63867..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021-omap2-fix-build- > regression.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From 742b21718c968c17ac951b73b4ba79f4a489d35b Mon Sep 17 00:00:00 > 2001 > -From: Arnd Bergmann <arnd@arndb.de> > -Date: Thu, 30 Jun 2011 12:58:01 +0000 > -Subject: [PATCH 021/149] omap2+: fix build regression > - > -board-generic.c now contains a reference to omap3_timer, but depends > -only on ARCH_OMAP2, not on ARCH_OMAP3, which controls that symbol. > -omap2_timer seems to be more appropriate anyway, so use that instead. > - > -Signed-off-by: Arnd Bergmann <arnd@arndb.de> > -Acked-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/board-generic.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach- > omap2/board-generic.c > -index c6ecf60..54db41a 100644 > ---- a/arch/arm/mach-omap2/board-generic.c > -+++ b/arch/arm/mach-omap2/board-generic.c > -@@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic > OMAP24xx") > - .init_early = omap_generic_init_early, > - .init_irq = omap2_init_irq, > - .init_machine = omap_generic_init, > -- .timer = &omap3_timer, > -+ .timer = &omap2_timer, > - MACHINE_END > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New- > twl-common-for-common-TWL-configuration.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New-twl-common-for- > common-TWL-configuration.patch > deleted file mode 100644 > index a0ccdd3..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New-twl- > common-for-common-TWL-configuration.patch > +++ /dev/null > @@ -1,200 +0,0 @@ > -From 552daa4d00a2c1835e5114af852efc65175e1cc0 Mon Sep 17 00:00:00 > 2001 > -From: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Date: Sat, 4 Jun 2011 08:16:41 +0300 > -Subject: [PATCH 022/149] OMAP: New twl-common for common TWL > configuration > - > -Introduce a new file, which will be used to configure > -common pmic (TWL) devices, regulators, and TWL audio. > - > -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Acked-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/Makefile | 2 +- > - arch/arm/mach-omap2/common-board-devices.c | 21 ------------- > - arch/arm/mach-omap2/common-board-devices.h | 26 +-------------- > - arch/arm/mach-omap2/twl-common.c | 46 > ++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/twl-common.h | 28 +++++++++++++++++ > - 5 files changed, 77 insertions(+), 46 deletions(-) > - create mode 100644 arch/arm/mach-omap2/twl-common.c > - create mode 100644 arch/arm/mach-omap2/twl-common.h > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index adbe82d..ff1466f 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -269,4 +269,4 @@ obj-$(CONFIG_ARCH_OMAP4) += > hwspinlock.o > - disp-$(CONFIG_OMAP2_DSS) := display.o > - obj-y += $(disp-m) $(disp-y) > - > --obj-y += common-board-devices.o > -+obj-y += common-board-devices.o twl- > common.o > -diff --git a/arch/arm/mach-omap2/common-board-devices.c > b/arch/arm/mach-omap2/common-board-devices.c > -index 0043fa8..bcb0c58 100644 > ---- a/arch/arm/mach-omap2/common-board-devices.c > -+++ b/arch/arm/mach-omap2/common-board-devices.c > -@@ -20,36 +20,15 @@ > - * > - */ > - > --#include <linux/i2c.h> > --#include <linux/i2c/twl.h> > -- > - #include <linux/gpio.h> > - #include <linux/spi/spi.h> > - #include <linux/spi/ads7846.h> > - > --#include <plat/i2c.h> > - #include <plat/mcspi.h> > - #include <plat/nand.h> > - > - #include "common-board-devices.h" > - > --static struct i2c_board_info __initdata pmic_i2c_board_info = { > -- .addr = 0x48, > -- .flags = I2C_CLIENT_WAKE, > --}; > -- > --void __init omap_pmic_init(int bus, u32 clkrate, > -- const char *pmic_type, int pmic_irq, > -- struct twl4030_platform_data *pmic_data) > --{ > -- strncpy(pmic_i2c_board_info.type, pmic_type, > -- sizeof(pmic_i2c_board_info.type)); > -- pmic_i2c_board_info.irq = pmic_irq; > -- pmic_i2c_board_info.platform_data = pmic_data; > -- > -- omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); > --} > -- > - #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ > - defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) > - static struct omap2_mcspi_device_config ads7846_mcspi_config = { > -diff --git a/arch/arm/mach-omap2/common-board-devices.h > b/arch/arm/mach-omap2/common-board-devices.h > -index 6797190..a0b4a428 100644 > ---- a/arch/arm/mach-omap2/common-board-devices.h > -+++ b/arch/arm/mach-omap2/common-board-devices.h > -@@ -1,33 +1,11 @@ > - #ifndef __OMAP_COMMON_BOARD_DEVICES__ > - #define __OMAP_COMMON_BOARD_DEVICES__ > - > -+#include "twl-common.h" > -+ > - #define NAND_BLOCK_SIZE SZ_128K > - > --struct twl4030_platform_data; > - struct mtd_partition; > -- > --void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int > pmic_irq, > -- struct twl4030_platform_data *pmic_data); > -- > --static inline void omap2_pmic_init(const char *pmic_type, > -- struct twl4030_platform_data *pmic_data) > --{ > -- omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, > pmic_data); > --} > -- > --static inline void omap3_pmic_init(const char *pmic_type, > -- struct twl4030_platform_data *pmic_data) > --{ > -- omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, > pmic_data); > --} > -- > --static inline void omap4_pmic_init(const char *pmic_type, > -- struct twl4030_platform_data *pmic_data) > --{ > -- /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ > -- omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, > pmic_data); > --} > -- > - struct ads7846_platform_data; > - > - void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, > -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach- > omap2/twl-common.c > -new file mode 100644 > -index 0000000..4f7b24c > ---- /dev/null > -+++ b/arch/arm/mach-omap2/twl-common.c > -@@ -0,0 +1,46 @@ > -+/* > -+ * twl-common.c > -+ * > -+ * Copyright (C) 2011 Texas Instruments, Inc.. > -+ * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> > -+ * > -+ * This program is free software; you can redistribute it and/or > -+ * modify it under the terms of the GNU General Public License > -+ * version 2 as published by the Free Software Foundation. > -+ * > -+ * This program is distributed in the hope that it will be useful, but > -+ * WITHOUT ANY WARRANTY; without even the implied warranty of > -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > -+ * General Public License for more details. > -+ * > -+ * You should have received a copy of the GNU General Public License > -+ * along with this program; if not, write to the Free Software > -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA > -+ * 02110-1301 USA > -+ * > -+ */ > -+ > -+#include <linux/i2c.h> > -+#include <linux/i2c/twl.h> > -+#include <linux/gpio.h> > -+ > -+#include <plat/i2c.h> > -+ > -+#include "twl-common.h" > -+ > -+static struct i2c_board_info __initdata pmic_i2c_board_info = { > -+ .addr = 0x48, > -+ .flags = I2C_CLIENT_WAKE, > -+}; > -+ > -+void __init omap_pmic_init(int bus, u32 clkrate, > -+ const char *pmic_type, int pmic_irq, > -+ struct twl4030_platform_data *pmic_data) > -+{ > -+ strncpy(pmic_i2c_board_info.type, pmic_type, > -+ sizeof(pmic_i2c_board_info.type)); > -+ pmic_i2c_board_info.irq = pmic_irq; > -+ pmic_i2c_board_info.platform_data = pmic_data; > -+ > -+ omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); > -+} > -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach- > omap2/twl-common.h > -new file mode 100644 > -index 0000000..e9fe2ab > ---- /dev/null > -+++ b/arch/arm/mach-omap2/twl-common.h > -@@ -0,0 +1,28 @@ > -+#ifndef __OMAP_PMIC_COMMON__ > -+#define __OMAP_PMIC_COMMON__ > -+ > -+struct twl4030_platform_data; > -+ > -+void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int > pmic_irq, > -+ struct twl4030_platform_data *pmic_data); > -+ > -+static inline void omap2_pmic_init(const char *pmic_type, > -+ struct twl4030_platform_data *pmic_data) > -+{ > -+ omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, > pmic_data); > -+} > -+ > -+static inline void omap3_pmic_init(const char *pmic_type, > -+ struct twl4030_platform_data *pmic_data) > -+{ > -+ omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, > pmic_data); > -+} > -+ > -+static inline void omap4_pmic_init(const char *pmic_type, > -+ struct twl4030_platform_data *pmic_data) > -+{ > -+ /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ > -+ omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, > pmic_data); > -+} > -+ > -+#endif /* __OMAP_PMIC_COMMON__ */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move- > common-twl6030-configuration-to-twl-commo.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move-common-twl6030- > configuration-to-twl-commo.patch > deleted file mode 100644 > index b04d1f8..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move- > common-twl6030-configuration-to-twl-commo.patch > +++ /dev/null > @@ -1,601 +0,0 @@ > -From db3a6400c5bc9c99a39fe9b34b7b3c59ae4be245 Mon Sep 17 00:00:00 > 2001 > -From: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Date: Tue, 7 Jun 2011 10:26:46 +0300 > -Subject: [PATCH 023/149] OMAP4: Move common twl6030 configuration to > twl-common > - > -Reduce the amount of duplicated code by moving the common > -configuration for TWL6030 (on OMAP4 platform) to the > -twl-common file. > -Use the omap4_pmic_get_config function from board files to > -properly configure the PMIC with the common fields. > - > -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Acked-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/board-4430sdp.c | 141 ++------------------------- > - arch/arm/mach-omap2/board-omap4panda.c | 146 +++-------------------------- > - arch/arm/mach-omap2/twl-common.c | 163 > ++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/twl-common.h | 20 ++++ > - 4 files changed, 205 insertions(+), 265 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach- > omap2/board-4430sdp.c > -index d7df07e..933b25b 100644 > ---- a/arch/arm/mach-omap2/board-4430sdp.c > -+++ b/arch/arm/mach-omap2/board-4430sdp.c > -@@ -302,14 +302,6 @@ static struct omap_musb_board_data > musb_board_data = { > - .power = 100, > - }; > - > --static struct twl4030_usb_data omap4_usbphy_data = { > -- .phy_init = omap4430_phy_init, > -- .phy_exit = omap4430_phy_exit, > -- .phy_power = omap4430_phy_power, > -- .phy_set_clock = omap4430_phy_set_clk, > -- .phy_suspend = omap4430_phy_suspend, > --}; > -- > - static struct omap2_hsmmc_info mmc[] = { > - { > - .mmc = 2, > -@@ -332,10 +324,6 @@ static struct regulator_consumer_supply > sdp4430_vaux_supply[] = { > - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), > - }; > - > --static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > --}; > -- > - static int omap4_twl6030_hsmmc_late_init(struct device *dev) > - { > - int ret = 0; > -@@ -394,61 +382,6 @@ static struct regulator_init_data sdp4430_vaux1 = { > - .consumer_supplies = sdp4430_vaux_supply, > - }; > - > --static struct regulator_init_data sdp4430_vaux2 = { > -- .constraints = { > -- .min_uV = 1200000, > -- .max_uV = 2800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE > -- | REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data sdp4430_vaux3 = { > -- .constraints = { > -- .min_uV = 1000000, > -- .max_uV = 3000000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE > -- | REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --/* VMMC1 for MMC1 card */ > --static struct regulator_init_data sdp4430_vmmc = { > -- .constraints = { > -- .min_uV = 1200000, > -- .max_uV = 3000000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE > -- | REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = 1, > -- .consumer_supplies = sdp4430_vmmc_supply, > --}; > -- > --static struct regulator_init_data sdp4430_vpp = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 2500000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE > -- | REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > - static struct regulator_init_data sdp4430_vusim = { > - .constraints = { > - .min_uV = 1200000, > -@@ -462,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = { > - }, > - }; > - > --static struct regulator_init_data sdp4430_vana = { > -- .constraints = { > -- .min_uV = 2100000, > -- .max_uV = 2100000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data sdp4430_vcxio = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data sdp4430_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data sdp4430_vusb = { > -- .constraints = { > -- .min_uV = 3300000, > -- .max_uV = 3300000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data sdp4430_clk32kg = { > -- .constraints = { > -- .valid_ops_mask = > REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > - static struct twl4030_platform_data sdp4430_twldata = { > -- .irq_base = TWL6030_IRQ_BASE, > -- .irq_end = TWL6030_IRQ_END, > -- > - /* Regulators */ > -- .vmmc = &sdp4430_vmmc, > -- .vpp = &sdp4430_vpp, > - .vusim = &sdp4430_vusim, > -- .vana = &sdp4430_vana, > -- .vcxio = &sdp4430_vcxio, > -- .vdac = &sdp4430_vdac, > -- .vusb = &sdp4430_vusb, > - .vaux1 = &sdp4430_vaux1, > -- .vaux2 = &sdp4430_vaux2, > -- .vaux3 = &sdp4430_vaux3, > -- .clk32kg = &sdp4430_clk32kg, > -- .usb = &omap4_usbphy_data > - }; > - > - static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = { > -@@ -547,6 +416,16 @@ static struct i2c_board_info __initdata > sdp4430_i2c_4_boardinfo[] = { > - }; > - static int __init omap4_i2c_init(void) > - { > -+ omap4_pmic_get_config(&sdp4430_twldata, > TWL_COMMON_PDATA_USB, > -+ TWL_COMMON_REGULATOR_VDAC | > -+ TWL_COMMON_REGULATOR_VAUX2 | > -+ TWL_COMMON_REGULATOR_VAUX3 | > -+ TWL_COMMON_REGULATOR_VMMC | > -+ TWL_COMMON_REGULATOR_VPP | > -+ TWL_COMMON_REGULATOR_VANA | > -+ TWL_COMMON_REGULATOR_VCXIO | > -+ TWL_COMMON_REGULATOR_VUSB | > -+ TWL_COMMON_REGULATOR_CLK32KG); > - omap4_pmic_init("twl6030", &sdp4430_twldata); > - omap_register_i2c_bus(2, 400, NULL, 0); > - omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, > -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach- > omap2/board-omap4panda.c > -index ee2034e..9aaa960 100644 > ---- a/arch/arm/mach-omap2/board-omap4panda.c > -+++ b/arch/arm/mach-omap2/board-omap4panda.c > -@@ -154,14 +154,6 @@ static struct omap_musb_board_data > musb_board_data = { > - .power = 100, > - }; > - > --static struct twl4030_usb_data omap4_usbphy_data = { > -- .phy_init = omap4430_phy_init, > -- .phy_exit = omap4430_phy_exit, > -- .phy_power = omap4430_phy_power, > -- .phy_set_clock = omap4430_phy_set_clk, > -- .phy_suspend = omap4430_phy_suspend, > --}; > -- > - static struct omap2_hsmmc_info mmc[] = { > - { > - .mmc = 1, > -@@ -181,10 +173,6 @@ static struct omap2_hsmmc_info mmc[] = { > - {} /* Terminator */ > - }; > - > --static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { > -- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > --}; > -- > - static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = { > - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"), > - }; > -@@ -269,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct > omap2_hsmmc_info *controllers) > - return 0; > - } > - > --static struct regulator_init_data omap4_panda_vaux2 = { > -- .constraints = { > -- .min_uV = 1200000, > -- .max_uV = 2800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE > -- | REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data omap4_panda_vaux3 = { > -- .constraints = { > -- .min_uV = 1000000, > -- .max_uV = 3000000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE > -- | REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --/* VMMC1 for MMC1 card */ > --static struct regulator_init_data omap4_panda_vmmc = { > -- .constraints = { > -- .min_uV = 1200000, > -- .max_uV = 3000000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE > -- | REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(omap4_panda_vmmc_supply), > -- .consumer_supplies = omap4_panda_vmmc_supply, > --}; > -- > --static struct regulator_init_data omap4_panda_vpp = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 2500000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE > -- | REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data omap4_panda_vana = { > -- .constraints = { > -- .min_uV = 2100000, > -- .max_uV = 2100000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data omap4_panda_vcxio = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data omap4_panda_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data omap4_panda_vusb = { > -- .constraints = { > -- .min_uV = 3300000, > -- .max_uV = 3300000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct regulator_init_data omap4_panda_clk32kg = { > -- .constraints = { > -- .valid_ops_mask = > REGULATOR_CHANGE_STATUS, > -- }, > --}; > -- > --static struct twl4030_platform_data omap4_panda_twldata = { > -- .irq_base = TWL6030_IRQ_BASE, > -- .irq_end = TWL6030_IRQ_END, > -- > -- /* Regulators */ > -- .vmmc = &omap4_panda_vmmc, > -- .vpp = &omap4_panda_vpp, > -- .vana = &omap4_panda_vana, > -- .vcxio = &omap4_panda_vcxio, > -- .vdac = &omap4_panda_vdac, > -- .vusb = &omap4_panda_vusb, > -- .vaux2 = &omap4_panda_vaux2, > -- .vaux3 = &omap4_panda_vaux3, > -- .clk32kg = &omap4_panda_clk32kg, > -- .usb = &omap4_usbphy_data, > --}; > -+/* Panda board uses the common PMIC configuration */ > -+static struct twl4030_platform_data omap4_panda_twldata; > - > - /* > - * Display monitor features are burnt in their EEPROM as EDID data. The > EEPROM > -@@ -404,6 +272,16 @@ static struct i2c_board_info __initdata > panda_i2c_eeprom[] = { > - > - static int __init omap4_panda_i2c_init(void) > - { > -+ omap4_pmic_get_config(&omap4_panda_twldata, > TWL_COMMON_PDATA_USB, > -+ TWL_COMMON_REGULATOR_VDAC | > -+ TWL_COMMON_REGULATOR_VAUX2 | > -+ TWL_COMMON_REGULATOR_VAUX3 | > -+ TWL_COMMON_REGULATOR_VMMC | > -+ TWL_COMMON_REGULATOR_VPP | > -+ TWL_COMMON_REGULATOR_VANA | > -+ TWL_COMMON_REGULATOR_VCXIO | > -+ TWL_COMMON_REGULATOR_VUSB | > -+ TWL_COMMON_REGULATOR_CLK32KG); > - omap4_pmic_init("twl6030", &omap4_panda_twldata); > - omap_register_i2c_bus(2, 400, NULL, 0); > - /* > -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach- > omap2/twl-common.c > -index 4f7b24c..cf80f4c 100644 > ---- a/arch/arm/mach-omap2/twl-common.c > -+++ b/arch/arm/mach-omap2/twl-common.c > -@@ -23,8 +23,11 @@ > - #include <linux/i2c.h> > - #include <linux/i2c/twl.h> > - #include <linux/gpio.h> > -+#include <linux/regulator/machine.h> > -+#include <linux/regulator/fixed.h> > - > - #include <plat/i2c.h> > -+#include <plat/usb.h> > - > - #include "twl-common.h" > - > -@@ -44,3 +47,163 @@ void __init omap_pmic_init(int bus, u32 clkrate, > - > - omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); > - } > -+ > -+static struct twl4030_usb_data omap4_usb_pdata = { > -+ .phy_init = omap4430_phy_init, > -+ .phy_exit = omap4430_phy_exit, > -+ .phy_power = omap4430_phy_power, > -+ .phy_set_clock = omap4430_phy_set_clk, > -+ .phy_suspend = omap4430_phy_suspend, > -+}; > -+ > -+static struct regulator_init_data omap4_vdac_idata = { > -+ .constraints = { > -+ .min_uV = 1800000, > -+ .max_uV = 1800000, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+}; > -+ > -+static struct regulator_init_data omap4_vaux2_idata = { > -+ .constraints = { > -+ .min_uV = 1200000, > -+ .max_uV = 2800000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_VOLTAGE > -+ | REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+}; > -+ > -+static struct regulator_init_data omap4_vaux3_idata = { > -+ .constraints = { > -+ .min_uV = 1000000, > -+ .max_uV = 3000000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_VOLTAGE > -+ | REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+}; > -+ > -+static struct regulator_consumer_supply omap4_vmmc_supply[] = { > -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > -+}; > -+ > -+/* VMMC1 for MMC1 card */ > -+static struct regulator_init_data omap4_vmmc_idata = { > -+ .constraints = { > -+ .min_uV = 1200000, > -+ .max_uV = 3000000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_VOLTAGE > -+ | REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+ .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply), > -+ .consumer_supplies = omap4_vmmc_supply, > -+}; > -+ > -+static struct regulator_init_data omap4_vpp_idata = { > -+ .constraints = { > -+ .min_uV = 1800000, > -+ .max_uV = 2500000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_VOLTAGE > -+ | REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+}; > -+ > -+static struct regulator_init_data omap4_vana_idata = { > -+ .constraints = { > -+ .min_uV = 2100000, > -+ .max_uV = 2100000, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+}; > -+ > -+static struct regulator_init_data omap4_vcxio_idata = { > -+ .constraints = { > -+ .min_uV = 1800000, > -+ .max_uV = 1800000, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+}; > -+ > -+static struct regulator_init_data omap4_vusb_idata = { > -+ .constraints = { > -+ .min_uV = 3300000, > -+ .max_uV = 3300000, > -+ .apply_uV = true, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+}; > -+ > -+static struct regulator_init_data omap4_clk32kg_idata = { > -+ .constraints = { > -+ .valid_ops_mask = > REGULATOR_CHANGE_STATUS, > -+ }, > -+}; > -+ > -+void __init omap4_pmic_get_config(struct twl4030_platform_data > *pmic_data, > -+ u32 pdata_flags, u32 regulators_flags) > -+{ > -+ if (!pmic_data->irq_base) > -+ pmic_data->irq_base = TWL6030_IRQ_BASE; > -+ if (!pmic_data->irq_end) > -+ pmic_data->irq_end = TWL6030_IRQ_END; > -+ > -+ /* Common platform data configurations */ > -+ if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) > -+ pmic_data->usb = &omap4_usb_pdata; > -+ > -+ /* Common regulator configurations */ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && > !pmic_data->vdac) > -+ pmic_data->vdac = &omap4_vdac_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && > !pmic_data->vaux2) > -+ pmic_data->vaux2 = &omap4_vaux2_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && > !pmic_data->vaux3) > -+ pmic_data->vaux3 = &omap4_vaux3_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && > !pmic_data->vmmc) > -+ pmic_data->vmmc = &omap4_vmmc_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VPP && > !pmic_data->vpp) > -+ pmic_data->vpp = &omap4_vpp_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VANA && > !pmic_data->vana) > -+ pmic_data->vana = &omap4_vana_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && > !pmic_data->vcxio) > -+ pmic_data->vcxio = &omap4_vcxio_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && > !pmic_data->vusb) > -+ pmic_data->vusb = &omap4_vusb_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG && > -+ !pmic_data->clk32kg) > -+ pmic_data->clk32kg = &omap4_clk32kg_idata; > -+} > -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach- > omap2/twl-common.h > -index e9fe2ab..d96c289 100644 > ---- a/arch/arm/mach-omap2/twl-common.h > -+++ b/arch/arm/mach-omap2/twl-common.h > -@@ -1,6 +1,23 @@ > - #ifndef __OMAP_PMIC_COMMON__ > - #define __OMAP_PMIC_COMMON__ > - > -+#define TWL_COMMON_PDATA_USB (1 << 0) > -+ > -+/* Common LDO regulators for TWL4030/TWL6030 */ > -+#define TWL_COMMON_REGULATOR_VDAC (1 << 0) > -+#define TWL_COMMON_REGULATOR_VAUX1 (1 << 1) > -+#define TWL_COMMON_REGULATOR_VAUX2 (1 << 2) > -+#define TWL_COMMON_REGULATOR_VAUX3 (1 << 3) > -+ > -+/* TWL6030 LDO regulators */ > -+#define TWL_COMMON_REGULATOR_VMMC (1 << 4) > -+#define TWL_COMMON_REGULATOR_VPP (1 << 5) > -+#define TWL_COMMON_REGULATOR_VUSIM (1 << 6) > -+#define TWL_COMMON_REGULATOR_VANA (1 << 7) > -+#define TWL_COMMON_REGULATOR_VCXIO (1 << 8) > -+#define TWL_COMMON_REGULATOR_VUSB (1 << 9) > -+#define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) > -+ > - struct twl4030_platform_data; > - > - void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int > pmic_irq, > -@@ -25,4 +42,7 @@ static inline void omap4_pmic_init(const char > *pmic_type, > - omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, > pmic_data); > - } > - > -+void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, > -+ u32 pdata_flags, u32 regulators_flags); > -+ > - #endif /* __OMAP_PMIC_COMMON__ */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0024-OMAP3-Move- > common-twl-configuration-to-twl-common.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl- > common.patch > deleted file mode 100644 > index 6dfcc2c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0024-OMAP3-Move- > common-twl-configuration-to-twl-common.patch > +++ /dev/null > @@ -1,827 +0,0 @@ > -From 4a1b31f8aed87737ba84e1e5724ecfbe45732bc8 Mon Sep 17 00:00:00 > 2001 > -From: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Date: Tue, 7 Jun 2011 10:28:54 +0300 > -Subject: [PATCH 024/149] OMAP3: Move common twl configuration to twl- > common > - > -Reduce the amount of duplicated code by moving the common > -configuration for twl4030/5030/tpsxx to the twl-common file. > -Use the omap3_pmic_get_config function from board files to > -properly configure the PMIC with the common fields. > - > -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Acked-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/board-3430sdp.c | 42 ++------------------ > - arch/arm/mach-omap2/board-cm-t35.c | 9 +---- > - arch/arm/mach-omap2/board-devkit8000.c | 18 +-------- > - arch/arm/mach-omap2/board-igep0020.c | 20 ++-------- > - arch/arm/mach-omap2/board-ldp.c | 15 +------ > - arch/arm/mach-omap2/board-omap3beagle.c | 18 +-------- > - arch/arm/mach-omap2/board-omap3evm.c | 24 +---------- > - arch/arm/mach-omap2/board-omap3pandora.c | 17 +------- > - arch/arm/mach-omap2/board-omap3stalker.c | 24 +---------- > - arch/arm/mach-omap2/board-omap3touchbook.c | 19 +-------- > - arch/arm/mach-omap2/board-overo.c | 17 +------- > - arch/arm/mach-omap2/board-rm680.c | 8 +--- > - arch/arm/mach-omap2/board-rx51-peripherals.c | 15 +------ > - arch/arm/mach-omap2/board-zoom-peripherals.c | 51 +++++------------------- > - > - arch/arm/mach-omap2/twl-common.c | 53 > ++++++++++++++++++++++++++ > - arch/arm/mach-omap2/twl-common.h | 6 +++ > - 16 files changed, 99 insertions(+), 257 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach- > omap2/board-3430sdp.c > -index 12fae21..8bbd4e0 100644 > ---- a/arch/arm/mach-omap2/board-3430sdp.c > -+++ b/arch/arm/mach-omap2/board-3430sdp.c > -@@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void) > - omap2_init_common_devices(hyb18m512160af6_sdrc_params, > NULL); > - } > - > --static int sdp3430_batt_table[] = { > --/* 0 C*/ > --30800, 29500, 28300, 27100, > --26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, > --17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, > --11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, > --8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, > --5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, > --4040, 3910, 3790, 3670, 3550 > --}; > -- > --static struct twl4030_bci_platform_data sdp3430_bci_data = { > -- .battery_tmp_tbl = sdp3430_batt_table, > -- .tblsize = ARRAY_SIZE(sdp3430_batt_table), > --}; > -- > - static struct omap2_hsmmc_info mmc[] = { > - { > - .mmc = 1, > -@@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data > sdp3430_gpio_data = { > - .setup = sdp3430_twl_gpio_setup, > - }; > - > --static struct twl4030_usb_data sdp3430_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > --static struct twl4030_madc_platform_data sdp3430_madc_data = { > -- .irq_line = 1, > --}; > -- > - /* regulator consumer mappings */ > - > - /* ads7846 on SPI */ > -@@ -463,24 +439,10 @@ static struct regulator_init_data sdp3430_vpll2 = { > - .consumer_supplies = sdp3430_vpll2_supplies, > - }; > - > --static struct twl4030_codec_audio_data sdp3430_audio; > -- > --static struct twl4030_codec_data sdp3430_codec = { > -- .audio_mclk = 26000000, > -- .audio = &sdp3430_audio, > --}; > -- > - static struct twl4030_platform_data sdp3430_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > -- .bci = &sdp3430_bci_data, > - .gpio = &sdp3430_gpio_data, > -- .madc = &sdp3430_madc_data, > - .keypad = &sdp3430_kp_data, > -- .usb = &sdp3430_usb_data, > -- .codec = &sdp3430_codec, > - > - .vaux1 = &sdp3430_vaux1, > - .vaux2 = &sdp3430_vaux2, > -@@ -496,7 +458,11 @@ static struct twl4030_platform_data > sdp3430_twldata = { > - static int __init omap3430_i2c_init(void) > - { > - /* i2c1 for PMIC only */ > -+ omap3_pmic_get_config(&sdp3430_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_BCI | > -+ TWL_COMMON_PDATA_MADC | > TWL_COMMON_PDATA_AUDIO, 0); > - omap3_pmic_init("twl4030", &sdp3430_twldata); > -+ > - /* i2c2 on camera connector (for sensor control) and optional isp1301 > */ > - omap_register_i2c_bus(2, 400, NULL, 0); > - /* i2c3 on display connector (for DVI, tfp410) */ > -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach- > omap2/board-cm-t35.c > -index d76dca7..cb00abc 100644 > ---- a/arch/arm/mach-omap2/board-cm-t35.c > -+++ b/arch/arm/mach-omap2/board-cm-t35.c > -@@ -410,10 +410,6 @@ static struct regulator_init_data cm_t35_vpll2 = { > - .consumer_supplies = cm_t35_vdvi_supply, > - }; > - > --static struct twl4030_usb_data cm_t35_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static uint32_t cm_t35_keymap[] = { > - KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), > - KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, > KEY_DOWN), > -@@ -492,12 +488,8 @@ static struct twl4030_gpio_platform_data > cm_t35_gpio_data = { > - }; > - > - static struct twl4030_platform_data cm_t35_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > - .keypad = &cm_t35_kp_data, > -- .usb = &cm_t35_usb_data, > - .gpio = &cm_t35_gpio_data, > - .vmmc1 = &cm_t35_vmmc1, > - .vsim = &cm_t35_vsim, > -@@ -507,6 +499,7 @@ static struct twl4030_platform_data cm_t35_twldata > = { > - > - static void __init cm_t35_init_i2c(void) > - { > -+ omap3_pmic_get_config(&cm_t35_twldata, > TWL_COMMON_PDATA_USB, 0); > - omap3_pmic_init("tps65930", &cm_t35_twldata); > - } > - > -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach- > omap2/board-devkit8000.c > -index 949dbea..364942e 100644 > ---- a/arch/arm/mach-omap2/board-devkit8000.c > -+++ b/arch/arm/mach-omap2/board-devkit8000.c > -@@ -332,25 +332,9 @@ static struct regulator_init_data devkit8000_vio = { > - .consumer_supplies = devkit8000_vio_supply, > - }; > - > --static struct twl4030_usb_data devkit8000_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > --static struct twl4030_codec_audio_data devkit8000_audio_data; > -- > --static struct twl4030_codec_data devkit8000_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &devkit8000_audio_data, > --}; > -- > - static struct twl4030_platform_data devkit8000_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > -- .usb = &devkit8000_usb_data, > - .gpio = &devkit8000_gpio_data, > -- .codec = &devkit8000_codec_data, > - .vmmc1 = &devkit8000_vmmc1, > - .vdac = &devkit8000_vdac, > - .vpll1 = &devkit8000_vpll1, > -@@ -360,6 +344,8 @@ static struct twl4030_platform_data > devkit8000_twldata = { > - > - static int __init devkit8000_i2c_init(void) > - { > -+ omap3_pmic_get_config(&devkit8000_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > - omap3_pmic_init("tps65930", &devkit8000_twldata); > - /* Bus 3 is attached to the DVI port where devices like the pico DLP > - * projector don't work reliably with 400kHz */ > -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach- > omap2/board-igep0020.c > -index f683835..e0a6687 100644 > ---- a/arch/arm/mach-omap2/board-igep0020.c > -+++ b/arch/arm/mach-omap2/board-igep0020.c > -@@ -443,10 +443,6 @@ static struct twl4030_gpio_platform_data > igep_twl4030_gpio_pdata = { > - .setup = igep_twl_gpio_setup, > - }; > - > --static struct twl4030_usb_data igep_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static int igep2_enable_dvi(struct omap_dss_device *dssdev) > - { > - gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1); > -@@ -522,13 +518,6 @@ static void __init igep_init_early(void) > - m65kxxxxam_sdrc_params); > - } > - > --static struct twl4030_codec_audio_data igep2_audio_data; > -- > --static struct twl4030_codec_data igep2_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &igep2_audio_data, > --}; > -- > - static int igep2_keymap[] = { > - KEY(0, 0, KEY_LEFT), > - KEY(0, 1, KEY_RIGHT), > -@@ -561,11 +550,7 @@ static struct twl4030_keypad_data > igep2_keypad_pdata = { > - }; > - > - static struct twl4030_platform_data igep_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > -- .usb = &igep_usb_data, > - .gpio = &igep_twl4030_gpio_pdata, > - .vmmc1 = &igep_vmmc1, > - .vio = &igep_vio, > -@@ -581,6 +566,8 @@ static void __init igep_i2c_init(void) > - { > - int ret; > - > -+ omap3_pmic_get_config(&igep_twldata, > TWL_COMMON_PDATA_USB, 0); > -+ > - if (machine_is_igep0020()) { > - /* > - * Bus 3 is attached to the DVI port where devices like the > -@@ -591,9 +578,10 @@ static void __init igep_i2c_init(void) > - if (ret) > - pr_warning("IGEP2: Could not register I2C3 bus > (%d)\n", ret); > - > -- igep_twldata.codec = &igep2_codec_data; > - igep_twldata.keypad = &igep2_keypad_pdata; > - igep_twldata.vpll2 = &igep2_vpll2; > -+ /* Use common codec data */ > -+ omap3_pmic_get_config(&igep_twldata, > TWL_COMMON_PDATA_AUDIO, 0); > - } > - > - omap3_pmic_init("twl4030", &igep_twldata); > -diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach- > omap2/board-ldp.c > -index 5d4328f..218764c 100644 > ---- a/arch/arm/mach-omap2/board-ldp.c > -+++ b/arch/arm/mach-omap2/board-ldp.c > -@@ -199,20 +199,12 @@ static void __init omap_ldp_init_early(void) > - omap2_init_common_devices(NULL, NULL); > - } > - > --static struct twl4030_usb_data ldp_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static struct twl4030_gpio_platform_data ldp_gpio_data = { > - .gpio_base = OMAP_MAX_GPIO_LINES, > - .irq_base = TWL4030_GPIO_IRQ_BASE, > - .irq_end = TWL4030_GPIO_IRQ_END, > - }; > - > --static struct twl4030_madc_platform_data ldp_madc_data = { > -- .irq_line = 1, > --}; > -- > - static struct regulator_consumer_supply ldp_vmmc1_supply[] = { > - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > -@@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = { > - }; > - > - static struct twl4030_platform_data ldp_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > -- .madc = &ldp_madc_data, > -- .usb = &ldp_usb_data, > - .vmmc1 = &ldp_vmmc1, > - .vaux1 = &ldp_vaux1, > - .gpio = &ldp_gpio_data, > -@@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = { > - > - static int __init omap_i2c_init(void) > - { > -+ omap3_pmic_get_config(&ldp_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC, 0); > - omap3_pmic_init("twl4030", &ldp_twldata); > - omap_register_i2c_bus(2, 400, NULL, 0); > - omap_register_i2c_bus(3, 400, NULL, 0); > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 2d8dfb3..ec61e9c 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -380,25 +380,9 @@ static struct regulator_init_data beagle_vpll2 = { > - .consumer_supplies = beagle_vdvi_supplies, > - }; > - > --static struct twl4030_usb_data beagle_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > --static struct twl4030_codec_audio_data beagle_audio_data; > -- > --static struct twl4030_codec_data beagle_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &beagle_audio_data, > --}; > -- > - static struct twl4030_platform_data beagle_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > -- .usb = &beagle_usb_data, > - .gpio = &beagle_gpio_data, > -- .codec = &beagle_codec_data, > - .vmmc1 = &beagle_vmmc1, > - .vsim = &beagle_vsim, > - .vdac = &beagle_vdac, > -@@ -413,6 +397,8 @@ static struct i2c_board_info __initdata > beagle_i2c_eeprom[] = { > - > - static int __init omap3_beagle_i2c_init(void) > - { > -+ omap3_pmic_get_config(&beagle_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > - omap3_pmic_init("twl4030", &beagle_twldata); > - /* Bus 3 is attached to the DVI port where devices like the pico DLP > - * projector don't work reliably with 400kHz */ > -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > -index 57bce0f..1ca298a 100644 > ---- a/arch/arm/mach-omap2/board-omap3evm.c > -+++ b/arch/arm/mach-omap2/board-omap3evm.c > -@@ -396,10 +396,6 @@ static struct twl4030_gpio_platform_data > omap3evm_gpio_data = { > - .setup = omap3evm_twl_gpio_setup, > - }; > - > --static struct twl4030_usb_data omap3evm_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static uint32_t board_keymap[] = { > - KEY(0, 0, KEY_LEFT), > - KEY(0, 1, KEY_DOWN), > -@@ -434,17 +430,6 @@ static struct twl4030_keypad_data > omap3evm_kp_data = { > - .rep = 1, > - }; > - > --static struct twl4030_madc_platform_data omap3evm_madc_data = { > -- .irq_line = 1, > --}; > -- > --static struct twl4030_codec_audio_data omap3evm_audio_data; > -- > --static struct twl4030_codec_data omap3evm_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &omap3evm_audio_data, > --}; > -- > - static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { > - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > - }; > -@@ -547,15 +532,9 @@ struct wl12xx_platform_data omap3evm_wlan_data > __initdata = { > - #endif > - > - static struct twl4030_platform_data omap3evm_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > - .keypad = &omap3evm_kp_data, > -- .madc = &omap3evm_madc_data, > -- .usb = &omap3evm_usb_data, > - .gpio = &omap3evm_gpio_data, > -- .codec = &omap3evm_codec_data, > - .vdac = &omap3_evm_vdac, > - .vpll2 = &omap3_evm_vpll2, > - .vio = &omap3evm_vio, > -@@ -565,6 +544,9 @@ static struct twl4030_platform_data > omap3evm_twldata = { > - > - static int __init omap3_evm_i2c_init(void) > - { > -+ omap3_pmic_get_config(&omap3evm_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC | > -+ TWL_COMMON_PDATA_AUDIO, 0); > - omap3_pmic_init("twl4030", &omap3evm_twldata); > - omap_register_i2c_bus(2, 400, NULL, 0); > - omap_register_i2c_bus(3, 400, NULL, 0); > -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach- > omap2/board-omap3pandora.c > -index d4ea940..f5abf76 100644 > ---- a/arch/arm/mach-omap2/board-omap3pandora.c > -+++ b/arch/arm/mach-omap2/board-omap3pandora.c > -@@ -508,25 +508,10 @@ static struct platform_device > pandora_vwlan_device = { > - }, > - }; > - > --static struct twl4030_usb_data omap3pandora_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > --static struct twl4030_codec_audio_data omap3pandora_audio_data; > -- > --static struct twl4030_codec_data omap3pandora_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &omap3pandora_audio_data, > --}; > -- > - static struct twl4030_bci_platform_data pandora_bci_data; > - > - static struct twl4030_platform_data omap3pandora_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > - .gpio = &omap3pandora_gpio_data, > -- .usb = &omap3pandora_usb_data, > -- .codec = &omap3pandora_codec_data, > - .vmmc1 = &pandora_vmmc1, > - .vmmc2 = &pandora_vmmc2, > - .vdac = &pandora_vdac, > -@@ -548,6 +533,8 @@ static struct i2c_board_info __initdata > omap3pandora_i2c3_boardinfo[] = { > - > - static int __init omap3pandora_i2c_init(void) > - { > -+ omap3_pmic_get_config(&omap3pandora_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > - omap3_pmic_init("tps65950", &omap3pandora_twldata); > - /* i2c2 pins are not connected */ > - omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, > -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach- > omap2/board-omap3stalker.c > -index b8ad4dd..6e59e59 100644 > ---- a/arch/arm/mach-omap2/board-omap3stalker.c > -+++ b/arch/arm/mach-omap2/board-omap3stalker.c > -@@ -349,10 +349,6 @@ static struct twl4030_gpio_platform_data > omap3stalker_gpio_data = { > - .setup = omap3stalker_twl_gpio_setup, > - }; > - > --static struct twl4030_usb_data omap3stalker_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static uint32_t board_keymap[] = { > - KEY(0, 0, KEY_LEFT), > - KEY(0, 1, KEY_DOWN), > -@@ -387,17 +383,6 @@ static struct twl4030_keypad_data > omap3stalker_kp_data = { > - .rep = 1, > - }; > - > --static struct twl4030_madc_platform_data omap3stalker_madc_data = { > -- .irq_line = 1, > --}; > -- > --static struct twl4030_codec_audio_data omap3stalker_audio_data; > -- > --static struct twl4030_codec_data omap3stalker_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &omap3stalker_audio_data, > --}; > -- > - static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = > { > - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > - }; > -@@ -439,15 +424,9 @@ static struct regulator_init_data > omap3_stalker_vpll2 = { > - }; > - > - static struct twl4030_platform_data omap3stalker_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > - .keypad = &omap3stalker_kp_data, > -- .madc = &omap3stalker_madc_data, > -- .usb = &omap3stalker_usb_data, > - .gpio = &omap3stalker_gpio_data, > -- .codec = &omap3stalker_codec_data, > - .vdac = &omap3_stalker_vdac, > - .vpll2 = &omap3_stalker_vpll2, > - .vmmc1 = &omap3stalker_vmmc1, > -@@ -470,6 +449,9 @@ static struct i2c_board_info __initdata > omap3stalker_i2c_boardinfo3[] = { > - > - static int __init omap3_stalker_i2c_init(void) > - { > -+ omap3_pmic_get_config(&omap3stalker_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC | > -+ TWL_COMMON_PDATA_AUDIO, 0); > - omap3_pmic_init("twl4030", &omap3stalker_twldata); > - omap_register_i2c_bus(2, 400, NULL, 0); > - omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, > -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c > b/arch/arm/mach-omap2/board-omap3touchbook.c > -index 57e6ed3..717972c 100644 > ---- a/arch/arm/mach-omap2/board-omap3touchbook.c > -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c > -@@ -235,25 +235,9 @@ static struct regulator_init_data touchbook_vpll2 = { > - .consumer_supplies = touchbook_vdvi_supply, > - }; > - > --static struct twl4030_usb_data touchbook_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > --static struct twl4030_codec_audio_data touchbook_audio_data; > -- > --static struct twl4030_codec_data touchbook_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &touchbook_audio_data, > --}; > -- > - static struct twl4030_platform_data touchbook_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > -- .usb = &touchbook_usb_data, > - .gpio = &touchbook_gpio_data, > -- .codec = &touchbook_codec_data, > - .vmmc1 = &touchbook_vmmc1, > - .vsim = &touchbook_vsim, > - .vdac = &touchbook_vdac, > -@@ -269,8 +253,9 @@ static struct i2c_board_info __initdata > touchBook_i2c_boardinfo[] = { > - static int __init omap3_touchbook_i2c_init(void) > - { > - /* Standard TouchBook bus */ > -+ omap3_pmic_get_config(&touchbook_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > - omap3_pmic_init("twl4030", &touchbook_twldata); > -- > - /* Additional TouchBook bus */ > - omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, > - ARRAY_SIZE(touchBook_i2c_boardinfo)); > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 1bf2f39..776b444 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -433,10 +433,6 @@ static struct twl4030_gpio_platform_data > overo_gpio_data = { > - .setup = overo_twl_gpio_setup, > - }; > - > --static struct twl4030_usb_data overo_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static struct regulator_init_data overo_vmmc1 = { > - .constraints = { > - .min_uV = 1850000, > -@@ -480,19 +476,8 @@ static struct regulator_init_data overo_vpll2 = { > - .consumer_supplies = overo_vdds_dsi_supply, > - }; > - > --static struct twl4030_codec_audio_data overo_audio_data; > -- > --static struct twl4030_codec_data overo_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &overo_audio_data, > --}; > -- > - static struct twl4030_platform_data overo_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > - .gpio = &overo_gpio_data, > -- .usb = &overo_usb_data, > -- .codec = &overo_codec_data, > - .vmmc1 = &overo_vmmc1, > - .vdac = &overo_vdac, > - .vpll2 = &overo_vpll2, > -@@ -500,6 +485,8 @@ static struct twl4030_platform_data overo_twldata = > { > - > - static int __init overo_i2c_init(void) > - { > -+ omap3_pmic_get_config(&overo_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > - omap3_pmic_init("tps65950", &overo_twldata); > - /* i2c2 pins are used for gpio */ > - omap_register_i2c_bus(3, 400, NULL, 0); > -diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach- > omap2/board-rm680.c > -index 54dceb1..7dfed24 100644 > ---- a/arch/arm/mach-omap2/board-rm680.c > -+++ b/arch/arm/mach-omap2/board-rm680.c > -@@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data > rm680_gpio_data = { > - .pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15), > - }; > - > --static struct twl4030_usb_data rm680_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static struct twl4030_platform_data rm680_twl_data = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > - .gpio = &rm680_gpio_data, > -- .usb = &rm680_usb_data, > - /* add rest of the children here */ > - }; > - > - static void __init rm680_i2c_init(void) > - { > -+ omap3_pmic_get_config(&rm680_twl_data, > TWL_COMMON_PDATA_USB, 0); > - omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, > &rm680_twl_data); > - omap_register_i2c_bus(2, 400, NULL, 0); > - omap_register_i2c_bus(3, 400, NULL, 0); > -diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c > b/arch/arm/mach-omap2/board-rx51-peripherals.c > -index b633ba8..3cdea39 100644 > ---- a/arch/arm/mach-omap2/board-rx51-peripherals.c > -+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c > -@@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = { > - .rep = 1, > - }; > - > --static struct twl4030_madc_platform_data rx51_madc_data = { > -- .irq_line = 1, > --}; > -- > - /* Enable input logic and pull all lines up when eMMC is on. */ > - static struct omap_board_mux rx51_mmc2_on_mux[] = { > - OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | > OMAP_MUX_MODE0), > -@@ -603,10 +599,6 @@ static struct twl4030_gpio_platform_data > rx51_gpio_data = { > - .setup = rx51_twlgpio_setup, > - }; > - > --static struct twl4030_usb_data rx51_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static struct twl4030_ins sleep_on_seq[] __initdata = { > - /* > - * Turn off everything > -@@ -778,14 +770,9 @@ struct twl4030_codec_data rx51_codec_data > __initdata = { > - }; > - > - static struct twl4030_platform_data rx51_twldata __initdata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > - .gpio = &rx51_gpio_data, > - .keypad = &rx51_kp_data, > -- .madc = &rx51_madc_data, > -- .usb = &rx51_usb_data, > - .power = &rx51_t2scripts_data, > - .codec = &rx51_codec_data, > - > -@@ -850,6 +837,8 @@ static int __init rx51_i2c_init(void) > - rx51_twldata.vaux3 = &rx51_vaux3_cam; > - } > - rx51_twldata.vmmc2 = &rx51_vmmc2; > -+ omap3_pmic_get_config(&rx51_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC, 0); > - omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, > &rx51_twldata); > - omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, > - ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); > -diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c > b/arch/arm/mach-omap2/board-zoom-peripherals.c > -index 8495f82..6d8df1b 100644 > ---- a/arch/arm/mach-omap2/board-zoom-peripherals.c > -+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c > -@@ -285,26 +285,6 @@ static void zoom2_set_hs_extmute(int mute) > - gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute); > - } > - > --static int zoom_batt_table[] = { > --/* 0 C*/ > --30800, 29500, 28300, 27100, > --26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, > --17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, > --11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, > --8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, > --5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, > --4040, 3910, 3790, 3670, 3550 > --}; > -- > --static struct twl4030_bci_platform_data zoom_bci_data = { > -- .battery_tmp_tbl = zoom_batt_table, > -- .tblsize = ARRAY_SIZE(zoom_batt_table), > --}; > -- > --static struct twl4030_usb_data zoom_usb_data = { > -- .usb_mode = T2_USB_MODE_ULPI, > --}; > -- > - static struct twl4030_gpio_platform_data zoom_gpio_data = { > - .gpio_base = OMAP_MAX_GPIO_LINES, > - .irq_base = TWL4030_GPIO_IRQ_BASE, > -@@ -312,28 +292,10 @@ static struct twl4030_gpio_platform_data > zoom_gpio_data = { > - .setup = zoom_twl_gpio_setup, > - }; > - > --static struct twl4030_madc_platform_data zoom_madc_data = { > -- .irq_line = 1, > --}; > -- > --static struct twl4030_codec_audio_data zoom_audio_data; > -- > --static struct twl4030_codec_data zoom_codec_data = { > -- .audio_mclk = 26000000, > -- .audio = &zoom_audio_data, > --}; > -- > - static struct twl4030_platform_data zoom_twldata = { > -- .irq_base = TWL4030_IRQ_BASE, > -- .irq_end = TWL4030_IRQ_END, > -- > - /* platform_data for children goes here */ > -- .bci = &zoom_bci_data, > -- .madc = &zoom_madc_data, > -- .usb = &zoom_usb_data, > - .gpio = &zoom_gpio_data, > - .keypad = &zoom_kp_twl4030_data, > -- .codec = &zoom_codec_data, > - .vmmc1 = &zoom_vmmc1, > - .vmmc2 = &zoom_vmmc2, > - .vsim = &zoom_vsim, > -@@ -343,10 +305,17 @@ static struct twl4030_platform_data zoom_twldata > = { > - > - static int __init omap_i2c_init(void) > - { > -+ omap3_pmic_get_config(&zoom_twldata, > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_BCI | > -+ TWL_COMMON_PDATA_MADC | > TWL_COMMON_PDATA_AUDIO, 0); > -+ > - if (machine_is_omap_zoom2()) { > -- zoom_audio_data.ramp_delay_value = 3; /* 161 ms */ > -- zoom_audio_data.hs_extmute = 1; > -- zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute; > -+ struct twl4030_codec_audio_data *audio_data; > -+ audio_data = zoom_twldata.codec->audio; > -+ > -+ audio_data->ramp_delay_value = 3; /* 161 ms */ > -+ audio_data->hs_extmute = 1; > -+ audio_data->set_hs_extmute = zoom2_set_hs_extmute; > - } > - omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, > &zoom_twldata); > - omap_register_i2c_bus(2, 400, NULL, 0); > -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach- > omap2/twl-common.c > -index cf80f4c..9e8decf 100644 > ---- a/arch/arm/mach-omap2/twl-common.c > -+++ b/arch/arm/mach-omap2/twl-common.c > -@@ -56,6 +56,37 @@ static struct twl4030_usb_data omap4_usb_pdata = { > - .phy_suspend = omap4430_phy_suspend, > - }; > - > -+static struct twl4030_usb_data omap3_usb_pdata = { > -+ .usb_mode = T2_USB_MODE_ULPI, > -+}; > -+ > -+static int omap3_batt_table[] = { > -+/* 0 C */ > -+30800, 29500, 28300, 27100, > -+26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, > -+17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, > -+11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, > -+8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, > -+5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, > -+4040, 3910, 3790, 3670, 3550 > -+}; > -+ > -+static struct twl4030_bci_platform_data omap3_bci_pdata = { > -+ .battery_tmp_tbl = omap3_batt_table, > -+ .tblsize = ARRAY_SIZE(omap3_batt_table), > -+}; > -+ > -+static struct twl4030_madc_platform_data omap3_madc_pdata = { > -+ .irq_line = 1, > -+}; > -+ > -+static struct twl4030_codec_audio_data omap3_audio; > -+ > -+static struct twl4030_codec_data omap3_codec_pdata = { > -+ .audio_mclk = 26000000, > -+ .audio = &omap3_audio, > -+}; > -+ > - static struct regulator_init_data omap4_vdac_idata = { > - .constraints = { > - .min_uV = 1800000, > -@@ -207,3 +238,25 @@ void __init omap4_pmic_get_config(struct > twl4030_platform_data *pmic_data, > - !pmic_data->clk32kg) > - pmic_data->clk32kg = &omap4_clk32kg_idata; > - } > -+ > -+void __init omap3_pmic_get_config(struct twl4030_platform_data > *pmic_data, > -+ u32 pdata_flags, u32 regulators_flags) > -+{ > -+ if (!pmic_data->irq_base) > -+ pmic_data->irq_base = TWL4030_IRQ_BASE; > -+ if (!pmic_data->irq_end) > -+ pmic_data->irq_end = TWL4030_IRQ_END; > -+ > -+ /* Common platform data configurations */ > -+ if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) > -+ pmic_data->usb = &omap3_usb_pdata; > -+ > -+ if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) > -+ pmic_data->bci = &omap3_bci_pdata; > -+ > -+ if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data- > >madc) > -+ pmic_data->madc = &omap3_madc_pdata; > -+ > -+ if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data- > >codec) > -+ pmic_data->codec = &omap3_codec_pdata; > -+} > -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach- > omap2/twl-common.h > -index d96c289..3b4b05d 100644 > ---- a/arch/arm/mach-omap2/twl-common.h > -+++ b/arch/arm/mach-omap2/twl-common.h > -@@ -2,6 +2,9 @@ > - #define __OMAP_PMIC_COMMON__ > - > - #define TWL_COMMON_PDATA_USB (1 << 0) > -+#define TWL_COMMON_PDATA_BCI (1 << 1) > -+#define TWL_COMMON_PDATA_MADC (1 << 2) > -+#define TWL_COMMON_PDATA_AUDIO (1 << 3) > - > - /* Common LDO regulators for TWL4030/TWL6030 */ > - #define TWL_COMMON_REGULATOR_VDAC (1 << 0) > -@@ -42,6 +45,9 @@ static inline void omap4_pmic_init(const char > *pmic_type, > - omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, > pmic_data); > - } > - > -+void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, > -+ u32 pdata_flags, u32 regulators_flags); > -+ > - void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, > - u32 pdata_flags, u32 regulators_flags); > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move- > common-regulator-configuration-to-twl-com.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move-common-regulator- > configuration-to-twl-com.patch > deleted file mode 100644 > index 4ea0aca..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move- > common-regulator-configuration-to-twl-com.patch > +++ /dev/null > @@ -1,924 +0,0 @@ > -From df02a0c8e1d42d1f861d138d1283172872c602ed Mon Sep 17 00:00:00 > 2001 > -From: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Date: Tue, 7 Jun 2011 11:38:24 +0300 > -Subject: [PATCH 025/149] OMAP3: Move common regulator configuration to > twl-common > - > -Some regulator config can be moved out from board files, > -since they are close to identical. > - > -Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > -Acked-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap2/board-3430sdp.c | 51 ++++---------------------- > - arch/arm/mach-omap2/board-cm-t35.c | 44 ++++------------------ > - arch/arm/mach-omap2/board-devkit8000.c | 22 +---------- > - arch/arm/mach-omap2/board-igep0020.c | 28 +++------------ > - arch/arm/mach-omap2/board-omap3beagle.c | 46 +++--------------------- > - arch/arm/mach-omap2/board-omap3evm.c | 50 ++++---------------------- > - arch/arm/mach-omap2/board-omap3pandora.c | 47 +++++------------------- > - arch/arm/mach-omap2/board-omap3stalker.c | 50 ++++---------------------- > - arch/arm/mach-omap2/board-omap3touchbook.c | 44 ++++++--------------- > - > - arch/arm/mach-omap2/board-overo.c | 46 +++--------------------- > - arch/arm/mach-omap2/board-rx51-peripherals.c | 27 +++----------- > - arch/arm/mach-omap2/board-zoom-peripherals.c | 42 ++-------------------- > - arch/arm/mach-omap2/twl-common.c | 42 > +++++++++++++++++++++ > - arch/arm/mach-omap2/twl-common.h | 5 +++ > - 14 files changed, 124 insertions(+), 420 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach- > omap2/board-3430sdp.c > -index 8bbd4e0..bd600cf 100644 > ---- a/arch/arm/mach-omap2/board-3430sdp.c > -+++ b/arch/arm/mach-omap2/board-3430sdp.c > -@@ -283,16 +283,6 @@ static struct regulator_consumer_supply > sdp3430_vaux3_supplies[] = { > - REGULATOR_SUPPLY("vcc", "spi1.0"), > - }; > - > --static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > --/* VPLL2 for digital video outputs */ > --static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > --}; > -- > - static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { > - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), > - }; > -@@ -409,36 +399,6 @@ static struct regulator_init_data sdp3430_vsim = { > - .consumer_supplies = sdp3430_vsim_supplies, > - }; > - > --/* VDAC for DSS driving S-Video */ > --static struct regulator_init_data sdp3430_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(sdp3430_vdda_dac_supplies), > -- .consumer_supplies = sdp3430_vdda_dac_supplies, > --}; > -- > --static struct regulator_init_data sdp3430_vpll2 = { > -- .constraints = { > -- .name = "VDVI", > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(sdp3430_vpll2_supplies), > -- .consumer_supplies = sdp3430_vpll2_supplies, > --}; > -- > - static struct twl4030_platform_data sdp3430_twldata = { > - /* platform_data for children goes here */ > - .gpio = &sdp3430_gpio_data, > -@@ -451,16 +411,19 @@ static struct twl4030_platform_data > sdp3430_twldata = { > - .vmmc1 = &sdp3430_vmmc1, > - .vmmc2 = &sdp3430_vmmc2, > - .vsim = &sdp3430_vsim, > -- .vdac = &sdp3430_vdac, > -- .vpll2 = &sdp3430_vpll2, > - }; > - > - static int __init omap3430_i2c_init(void) > - { > - /* i2c1 for PMIC only */ > - omap3_pmic_get_config(&sdp3430_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_BCI | > -- TWL_COMMON_PDATA_MADC | > TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_BCI | > -+ TWL_COMMON_PDATA_MADC | > TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > -+ sdp3430_twldata.vdac->constraints.apply_uV = true; > -+ sdp3430_twldata.vpll2->constraints.apply_uV = true; > -+ sdp3430_twldata.vpll2->constraints.name = "VDVI"; > -+ > - omap3_pmic_init("twl4030", &sdp3430_twldata); > - > - /* i2c2 on camera connector (for sensor control) and optional isp1301 > */ > -diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach- > omap2/board-cm-t35.c > -index cb00abc..35891d4 100644 > ---- a/arch/arm/mach-omap2/board-cm-t35.c > -+++ b/arch/arm/mach-omap2/board-cm-t35.c > -@@ -343,10 +343,6 @@ static struct regulator_consumer_supply > cm_t35_vsim_supply[] = { > - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), > - }; > - > --static struct regulator_consumer_supply cm_t35_vdac_supply[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > - static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { > - REGULATOR_SUPPLY("vdvi", "omapdss"), > - }; > -@@ -381,35 +377,6 @@ static struct regulator_init_data cm_t35_vsim = { > - .consumer_supplies = cm_t35_vsim_supply, > - }; > - > --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > --static struct regulator_init_data cm_t35_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply), > -- .consumer_supplies = cm_t35_vdac_supply, > --}; > -- > --/* VPLL2 for digital video outputs */ > --static struct regulator_init_data cm_t35_vpll2 = { > -- .constraints = { > -- .name = "VDVI", > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply), > -- .consumer_supplies = cm_t35_vdvi_supply, > --}; > -- > - static uint32_t cm_t35_keymap[] = { > - KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), > - KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, > KEY_DOWN), > -@@ -493,13 +460,18 @@ static struct twl4030_platform_data > cm_t35_twldata = { > - .gpio = &cm_t35_gpio_data, > - .vmmc1 = &cm_t35_vmmc1, > - .vsim = &cm_t35_vsim, > -- .vdac = &cm_t35_vdac, > -- .vpll2 = &cm_t35_vpll2, > - }; > - > - static void __init cm_t35_init_i2c(void) > - { > -- omap3_pmic_get_config(&cm_t35_twldata, > TWL_COMMON_PDATA_USB, 0); > -+ omap3_pmic_get_config(&cm_t35_twldata, > TWL_COMMON_PDATA_USB, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > -+ > -+ cm_t35_twldata.vpll2->constraints.name = "VDVI"; > -+ cm_t35_twldata.vpll2->num_consumer_supplies = > -+ > ARRAY_SIZE(cm_t35_vdvi_supply); > -+ cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply; > -+ > - omap3_pmic_init("tps65930", &cm_t35_twldata); > - } > - > -diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach- > omap2/board-devkit8000.c > -index 364942e..b6002ec 100644 > ---- a/arch/arm/mach-omap2/board-devkit8000.c > -+++ b/arch/arm/mach-omap2/board-devkit8000.c > -@@ -186,10 +186,6 @@ static struct omap_dss_board_info > devkit8000_dss_data = { > - .default_device = &devkit8000_lcd_device, > - }; > - > --static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > - static uint32_t board_keymap[] = { > - KEY(0, 0, KEY_1), > - KEY(1, 0, KEY_2), > -@@ -289,20 +285,6 @@ static struct regulator_init_data devkit8000_vmmc1 > = { > - .consumer_supplies = devkit8000_vmmc1_supply, > - }; > - > --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > --static struct regulator_init_data devkit8000_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(devkit8000_vdda_dac_supply), > -- .consumer_supplies = devkit8000_vdda_dac_supply, > --}; > -- > - /* VPLL1 for digital video outputs */ > - static struct regulator_init_data devkit8000_vpll1 = { > - .constraints = { > -@@ -336,7 +318,6 @@ static struct twl4030_platform_data > devkit8000_twldata = { > - /* platform_data for children goes here */ > - .gpio = &devkit8000_gpio_data, > - .vmmc1 = &devkit8000_vmmc1, > -- .vdac = &devkit8000_vdac, > - .vpll1 = &devkit8000_vpll1, > - .vio = &devkit8000_vio, > - .keypad = &devkit8000_kp_data, > -@@ -345,7 +326,8 @@ static struct twl4030_platform_data > devkit8000_twldata = { > - static int __init devkit8000_i2c_init(void) > - { > - omap3_pmic_get_config(&devkit8000_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC); > - omap3_pmic_init("tps65930", &devkit8000_twldata); > - /* Bus 3 is attached to the DVI port where devices like the pico DLP > - * projector don't work reliably with 400kHz */ > -diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach- > omap2/board-igep0020.c > -index e0a6687..35be778 100644 > ---- a/arch/arm/mach-omap2/board-igep0020.c > -+++ b/arch/arm/mach-omap2/board-igep0020.c > -@@ -479,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = > { > - .default_device = &igep2_dvi_device, > - }; > - > --static struct regulator_consumer_supply igep2_vpll2_supplies[] = { > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > --}; > -- > --static struct regulator_init_data igep2_vpll2 = { > -- .constraints = { > -- .name = "VDVI", > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies), > -- .consumer_supplies = igep2_vpll2_supplies, > --}; > -- > - static void __init igep2_display_init(void) > - { > - int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, > GPIOF_OUT_INIT_HIGH, > -@@ -579,9 +559,11 @@ static void __init igep_i2c_init(void) > - pr_warning("IGEP2: Could not register I2C3 bus > (%d)\n", ret); > - > - igep_twldata.keypad = &igep2_keypad_pdata; > -- igep_twldata.vpll2 = &igep2_vpll2; > -- /* Use common codec data */ > -- omap3_pmic_get_config(&igep_twldata, > TWL_COMMON_PDATA_AUDIO, 0); > -+ /* Get common pmic data */ > -+ omap3_pmic_get_config(&igep_twldata, > TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VPLL2); > -+ igep_twldata.vpll2->constraints.apply_uV = true; > -+ igep_twldata.vpll2->constraints.name = "VDVI"; > - } > - > - omap3_pmic_init("twl4030", &igep_twldata); > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index ec61e9c..34f8411 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -209,15 +209,6 @@ static struct omap_dss_board_info beagle_dss_data > = { > - .default_device = &beagle_dvi_device, > - }; > - > --static struct regulator_consumer_supply beagle_vdac_supply[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > --static struct regulator_consumer_supply beagle_vdvi_supplies[] = { > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > --}; > -- > - static void __init beagle_display_init(void) > - { > - int r; > -@@ -351,42 +342,11 @@ static struct regulator_init_data beagle_vsim = { > - .consumer_supplies = beagle_vsim_supply, > - }; > - > --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > --static struct regulator_init_data beagle_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), > -- .consumer_supplies = beagle_vdac_supply, > --}; > -- > --/* VPLL2 for digital video outputs */ > --static struct regulator_init_data beagle_vpll2 = { > -- .constraints = { > -- .name = "VDVI", > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies), > -- .consumer_supplies = beagle_vdvi_supplies, > --}; > -- > - static struct twl4030_platform_data beagle_twldata = { > - /* platform_data for children goes here */ > - .gpio = &beagle_gpio_data, > - .vmmc1 = &beagle_vmmc1, > - .vsim = &beagle_vsim, > -- .vdac = &beagle_vdac, > -- .vpll2 = &beagle_vpll2, > - }; > - > - static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { > -@@ -398,7 +358,11 @@ static struct i2c_board_info __initdata > beagle_i2c_eeprom[] = { > - static int __init omap3_beagle_i2c_init(void) > - { > - omap3_pmic_get_config(&beagle_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > -+ > -+ beagle_twldata.vpll2->constraints.name = "VDVI"; > -+ > - omap3_pmic_init("twl4030", &beagle_twldata); > - /* Bus 3 is attached to the DVI port where devices like the pico DLP > - * projector don't work reliably with 400kHz */ > -diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- > omap2/board-omap3evm.c > -index 1ca298a..c452b3f 100644 > ---- a/arch/arm/mach-omap2/board-omap3evm.c > -+++ b/arch/arm/mach-omap2/board-omap3evm.c > -@@ -430,45 +430,6 @@ static struct twl4030_keypad_data > omap3evm_kp_data = { > - .rep = 1, > - }; > - > --static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > --/* VDAC for DSS driving S-Video */ > --static struct regulator_init_data omap3_evm_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(omap3_evm_vdda_dac_supply), > -- .consumer_supplies = omap3_evm_vdda_dac_supply, > --}; > -- > --/* VPLL2 for digital video outputs */ > --static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = { > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > --}; > -- > --static struct regulator_init_data omap3_evm_vpll2 = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(omap3_evm_vpll2_supplies), > -- .consumer_supplies = omap3_evm_vpll2_supplies, > --}; > -- > - /* ads7846 on SPI */ > - static struct regulator_consumer_supply omap3evm_vio_supply[] = { > - REGULATOR_SUPPLY("vcc", "spi1.0"), > -@@ -535,8 +496,6 @@ static struct twl4030_platform_data > omap3evm_twldata = { > - /* platform_data for children goes here */ > - .keypad = &omap3evm_kp_data, > - .gpio = &omap3evm_gpio_data, > -- .vdac = &omap3_evm_vdac, > -- .vpll2 = &omap3_evm_vpll2, > - .vio = &omap3evm_vio, > - .vmmc1 = &omap3evm_vmmc1, > - .vsim = &omap3evm_vsim, > -@@ -545,8 +504,13 @@ static struct twl4030_platform_data > omap3evm_twldata = { > - static int __init omap3_evm_i2c_init(void) > - { > - omap3_pmic_get_config(&omap3evm_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC | > -- TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC | > -+ TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > -+ > -+ omap3evm_twldata.vdac->constraints.apply_uV = true; > -+ omap3evm_twldata.vpll2->constraints.apply_uV = true; > -+ > - omap3_pmic_init("twl4030", &omap3evm_twldata); > - omap_register_i2c_bus(2, 400, NULL, 0); > - omap_register_i2c_bus(3, 400, NULL, 0); > -diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach- > omap2/board-omap3pandora.c > -index f5abf76..080d7bd 100644 > ---- a/arch/arm/mach-omap2/board-omap3pandora.c > -+++ b/arch/arm/mach-omap2/board-omap3pandora.c > -@@ -332,10 +332,6 @@ static struct regulator_consumer_supply > pandora_vmmc3_supply[] = { > - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), > - }; > - > --static struct regulator_consumer_supply pandora_vdda_dac_supply[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > - static struct regulator_consumer_supply pandora_vdds_supplies[] = { > - REGULATOR_SUPPLY("vdds_sdi", "omapdss"), > - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -@@ -391,36 +387,6 @@ static struct regulator_init_data pandora_vmmc2 = { > - .consumer_supplies = pandora_vmmc2_supply, > - }; > - > --/* VDAC for DSS driving S-Video */ > --static struct regulator_init_data pandora_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(pandora_vdda_dac_supply), > -- .consumer_supplies = pandora_vdda_dac_supply, > --}; > -- > --/* VPLL2 for digital video outputs */ > --static struct regulator_init_data pandora_vpll2 = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(pandora_vdds_supplies), > -- .consumer_supplies = pandora_vdds_supplies, > --}; > -- > - /* VAUX1 for LCD */ > - static struct regulator_init_data pandora_vaux1 = { > - .constraints = { > -@@ -514,8 +480,6 @@ static struct twl4030_platform_data > omap3pandora_twldata = { > - .gpio = &omap3pandora_gpio_data, > - .vmmc1 = &pandora_vmmc1, > - .vmmc2 = &pandora_vmmc2, > -- .vdac = &pandora_vdac, > -- .vpll2 = &pandora_vpll2, > - .vaux1 = &pandora_vaux1, > - .vaux2 = &pandora_vaux2, > - .vaux4 = &pandora_vaux4, > -@@ -534,7 +498,16 @@ static struct i2c_board_info __initdata > omap3pandora_i2c3_boardinfo[] = { > - static int __init omap3pandora_i2c_init(void) > - { > - omap3_pmic_get_config(&omap3pandora_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > -+ > -+ omap3pandora_twldata.vdac->constraints.apply_uV = true; > -+ > -+ omap3pandora_twldata.vpll2->constraints.apply_uV = true; > -+ omap3pandora_twldata.vpll2->num_consumer_supplies = > -+ ARRAY_SIZE(pandora_vdds_supplies); > -+ omap3pandora_twldata.vpll2->consumer_supplies = > pandora_vdds_supplies; > -+ > - omap3_pmic_init("tps65950", &omap3pandora_twldata); > - /* i2c2 pins are not connected */ > - omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, > -diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach- > omap2/board-omap3stalker.c > -index 6e59e59..8e10498 100644 > ---- a/arch/arm/mach-omap2/board-omap3stalker.c > -+++ b/arch/arm/mach-omap2/board-omap3stalker.c > -@@ -383,52 +383,10 @@ static struct twl4030_keypad_data > omap3stalker_kp_data = { > - .rep = 1, > - }; > - > --static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = > { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > --/* VDAC for DSS driving S-Video */ > --static struct regulator_init_data omap3_stalker_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(omap3_stalker_vdda_dac_supply), > -- .consumer_supplies = omap3_stalker_vdda_dac_supply, > --}; > -- > --/* VPLL2 for digital video outputs */ > --static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = { > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > --}; > -- > --static struct regulator_init_data omap3_stalker_vpll2 = { > -- .constraints = { > -- .name = "VDVI", > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(omap3_stalker_vpll2_supplies), > -- .consumer_supplies = omap3_stalker_vpll2_supplies, > --}; > -- > - static struct twl4030_platform_data omap3stalker_twldata = { > - /* platform_data for children goes here */ > - .keypad = &omap3stalker_kp_data, > - .gpio = &omap3stalker_gpio_data, > -- .vdac = &omap3_stalker_vdac, > -- .vpll2 = &omap3_stalker_vpll2, > - .vmmc1 = &omap3stalker_vmmc1, > - .vsim = &omap3stalker_vsim, > - }; > -@@ -451,7 +409,13 @@ static int __init omap3_stalker_i2c_init(void) > - { > - omap3_pmic_get_config(&omap3stalker_twldata, > - TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC | > -- TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > -+ > -+ omap3stalker_twldata.vdac->constraints.apply_uV = true; > -+ omap3stalker_twldata.vpll2->constraints.apply_uV = true; > -+ omap3stalker_twldata.vpll2->constraints.name = "VDVI"; > -+ > - omap3_pmic_init("twl4030", &omap3stalker_twldata); > - omap_register_i2c_bus(2, 400, NULL, 0); > - omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, > -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c > b/arch/arm/mach-omap2/board-omap3touchbook.c > -index 717972c..852ea04 100644 > ---- a/arch/arm/mach-omap2/board-omap3touchbook.c > -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c > -@@ -206,42 +206,11 @@ static struct regulator_init_data touchbook_vsim = > { > - .consumer_supplies = touchbook_vsim_supply, > - }; > - > --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > --static struct regulator_init_data touchbook_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(touchbook_vdac_supply), > -- .consumer_supplies = touchbook_vdac_supply, > --}; > -- > --/* VPLL2 for digital video outputs */ > --static struct regulator_init_data touchbook_vpll2 = { > -- .constraints = { > -- .name = "VDVI", > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(touchbook_vdvi_supply), > -- .consumer_supplies = touchbook_vdvi_supply, > --}; > -- > - static struct twl4030_platform_data touchbook_twldata = { > - /* platform_data for children goes here */ > - .gpio = &touchbook_gpio_data, > - .vmmc1 = &touchbook_vmmc1, > - .vsim = &touchbook_vsim, > -- .vdac = &touchbook_vdac, > -- .vpll2 = &touchbook_vpll2, > - }; > - > - static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { > -@@ -254,7 +223,18 @@ static int __init omap3_touchbook_i2c_init(void) > - { > - /* Standard TouchBook bus */ > - omap3_pmic_get_config(&touchbook_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > -+ > -+ touchbook_twldata.vdac->num_consumer_supplies = > -+ > ARRAY_SIZE(touchbook_vdac_supply); > -+ touchbook_twldata.vdac->consumer_supplies = > touchbook_vdac_supply; > -+ > -+ touchbook_twldata.vpll2->constraints.name = "VDVI"; > -+ touchbook_twldata.vpll2->num_consumer_supplies = > -+ ARRAY_SIZE(touchbook_vdvi_supply); > -+ touchbook_twldata.vpll2->consumer_supplies = > touchbook_vdvi_supply; > -+ > - omap3_pmic_init("twl4030", &touchbook_twldata); > - /* Additional TouchBook bus */ > - omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, > -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach- > omap2/board-overo.c > -index 776b444..f1f18d0 100644 > ---- a/arch/arm/mach-omap2/board-overo.c > -+++ b/arch/arm/mach-omap2/board-overo.c > -@@ -265,15 +265,6 @@ static struct omap_dss_board_info overo_dss_data > = { > - .default_device = &overo_dvi_device, > - }; > - > --static struct regulator_consumer_supply overo_vdda_dac_supply[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > --static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > --}; > -- > - static struct mtd_partition overo_nand_partitions[] = { > - { > - .name = "xloader", > -@@ -447,46 +438,19 @@ static struct regulator_init_data overo_vmmc1 = { > - .consumer_supplies = overo_vmmc1_supply, > - }; > - > --/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ > --static struct regulator_init_data overo_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(overo_vdda_dac_supply), > -- .consumer_supplies = overo_vdda_dac_supply, > --}; > -- > --/* VPLL2 for digital video outputs */ > --static struct regulator_init_data overo_vpll2 = { > -- .constraints = { > -- .name = "VDVI", > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(overo_vdds_dsi_supply), > -- .consumer_supplies = overo_vdds_dsi_supply, > --}; > -- > - static struct twl4030_platform_data overo_twldata = { > - .gpio = &overo_gpio_data, > - .vmmc1 = &overo_vmmc1, > -- .vdac = &overo_vdac, > -- .vpll2 = &overo_vpll2, > - }; > - > - static int __init overo_i2c_init(void) > - { > - omap3_pmic_get_config(&overo_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > -+ > -+ overo_twldata.vpll2->constraints.name = "VDVI"; > -+ > - omap3_pmic_init("tps65950", &overo_twldata); > - /* i2c2 pins are used for gpio */ > - omap_register_i2c_bus(3, 400, NULL, 0); > -diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c > b/arch/arm/mach-omap2/board-rx51-peripherals.c > -index 3cdea39..d99e462 100644 > ---- a/arch/arm/mach-omap2/board-rx51-peripherals.c > -+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c > -@@ -394,10 +394,6 @@ static struct regulator_consumer_supply > rx51_vaux1_consumers[] = { > - REGULATOR_SUPPLY("vdd", "2-0063"), > - }; > - > --static struct regulator_consumer_supply rx51_vdac_supply[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > - static struct regulator_init_data rx51_vaux1 = { > - .constraints = { > - .name = "V28", > -@@ -514,21 +510,6 @@ static struct regulator_init_data rx51_vsim = { > - .consumer_supplies = rx51_vsim_supply, > - }; > - > --static struct regulator_init_data rx51_vdac = { > -- .constraints = { > -- .name = "VDAC", > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .apply_uV = true, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = > REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply), > -- .consumer_supplies = rx51_vdac_supply, > --}; > -- > - static struct regulator_init_data rx51_vio = { > - .constraints = { > - .min_uV = 1800000, > -@@ -781,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata > __initdata = { > - .vaux4 = &rx51_vaux4, > - .vmmc1 = &rx51_vmmc1, > - .vsim = &rx51_vsim, > -- .vdac = &rx51_vdac, > - .vio = &rx51_vio, > - }; > - > -@@ -838,7 +818,12 @@ static int __init rx51_i2c_init(void) > - } > - rx51_twldata.vmmc2 = &rx51_vmmc2; > - omap3_pmic_get_config(&rx51_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_MADC, > -+ TWL_COMMON_REGULATOR_VDAC); > -+ > -+ rx51_twldata.vdac->constraints.apply_uV = true; > -+ rx51_twldata.vdac->constraints.name = "VDAC"; > -+ > - omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, > &rx51_twldata); > - omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, > - ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); > -diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c > b/arch/arm/mach-omap2/board-zoom-peripherals.c > -index 6d8df1b..13a6442 100644 > ---- a/arch/arm/mach-omap2/board-zoom-peripherals.c > -+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c > -@@ -226,41 +226,6 @@ static struct omap2_hsmmc_info mmc[] = { > - {} /* Terminator */ > - }; > - > --static struct regulator_consumer_supply zoom_vpll2_supplies[] = { > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > --}; > -- > --static struct regulator_consumer_supply zoom_vdda_dac_supply[] = { > -- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > --}; > -- > --static struct regulator_init_data zoom_vpll2 = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(zoom_vpll2_supplies), > -- .consumer_supplies = zoom_vpll2_supplies, > --}; > -- > --static struct regulator_init_data zoom_vdac = { > -- .constraints = { > -- .min_uV = 1800000, > -- .max_uV = 1800000, > -- .valid_modes_mask = REGULATOR_MODE_NORMAL > -- | REGULATOR_MODE_STANDBY, > -- .valid_ops_mask = REGULATOR_CHANGE_MODE > -- | REGULATOR_CHANGE_STATUS, > -- }, > -- .num_consumer_supplies = > ARRAY_SIZE(zoom_vdda_dac_supply), > -- .consumer_supplies = zoom_vdda_dac_supply, > --}; > -- > - static int zoom_twl_gpio_setup(struct device *dev, > - unsigned gpio, unsigned ngpio) > - { > -@@ -299,15 +264,14 @@ static struct twl4030_platform_data zoom_twldata > = { > - .vmmc1 = &zoom_vmmc1, > - .vmmc2 = &zoom_vmmc2, > - .vsim = &zoom_vsim, > -- .vpll2 = &zoom_vpll2, > -- .vdac = &zoom_vdac, > - }; > - > - static int __init omap_i2c_init(void) > - { > - omap3_pmic_get_config(&zoom_twldata, > -- TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_BCI | > -- TWL_COMMON_PDATA_MADC | > TWL_COMMON_PDATA_AUDIO, 0); > -+ TWL_COMMON_PDATA_USB | > TWL_COMMON_PDATA_BCI | > -+ TWL_COMMON_PDATA_MADC | > TWL_COMMON_PDATA_AUDIO, > -+ TWL_COMMON_REGULATOR_VDAC | > TWL_COMMON_REGULATOR_VPLL2); > - > - if (machine_is_omap_zoom2()) { > - struct twl4030_codec_audio_data *audio_data; > -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach- > omap2/twl-common.c > -index 9e8decf..3aaa46f 100644 > ---- a/arch/arm/mach-omap2/twl-common.c > -+++ b/arch/arm/mach-omap2/twl-common.c > -@@ -87,6 +87,41 @@ static struct twl4030_codec_data omap3_codec_pdata > = { > - .audio = &omap3_audio, > - }; > - > -+static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = { > -+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), > -+}; > -+ > -+static struct regulator_init_data omap3_vdac_idata = { > -+ .constraints = { > -+ .min_uV = 1800000, > -+ .max_uV = 1800000, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = > REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3_vdda_dac_supplies), > -+ .consumer_supplies = omap3_vdda_dac_supplies, > -+}; > -+ > -+static struct regulator_consumer_supply omap3_vpll2_supplies[] = { > -+ REGULATOR_SUPPLY("vdds_dsi", "omapdss"), > -+ REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), > -+}; > -+ > -+static struct regulator_init_data omap3_vpll2_idata = { > -+ .constraints = { > -+ .min_uV = 1800000, > -+ .max_uV = 1800000, > -+ .valid_modes_mask = REGULATOR_MODE_NORMAL > -+ | REGULATOR_MODE_STANDBY, > -+ .valid_ops_mask = REGULATOR_CHANGE_MODE > -+ | REGULATOR_CHANGE_STATUS, > -+ }, > -+ .num_consumer_supplies = > ARRAY_SIZE(omap3_vpll2_supplies), > -+ .consumer_supplies = omap3_vpll2_supplies, > -+}; > -+ > - static struct regulator_init_data omap4_vdac_idata = { > - .constraints = { > - .min_uV = 1800000, > -@@ -259,4 +294,11 @@ void __init omap3_pmic_get_config(struct > twl4030_platform_data *pmic_data, > - > - if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data- > >codec) > - pmic_data->codec = &omap3_codec_pdata; > -+ > -+ /* Common regulator configurations */ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && > !pmic_data->vdac) > -+ pmic_data->vdac = &omap3_vdac_idata; > -+ > -+ if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && > !pmic_data->vpll2) > -+ pmic_data->vpll2 = &omap3_vpll2_idata; > - } > -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach- > omap2/twl-common.h > -index 3b4b05d..5e83a5b 100644 > ---- a/arch/arm/mach-omap2/twl-common.h > -+++ b/arch/arm/mach-omap2/twl-common.h > -@@ -21,6 +21,11 @@ > - #define TWL_COMMON_REGULATOR_VUSB (1 << 9) > - #define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) > - > -+/* TWL4030 LDO regulators */ > -+#define TWL_COMMON_REGULATOR_VPLL1 (1 << 4) > -+#define TWL_COMMON_REGULATOR_VPLL2 (1 << 5) > -+ > -+ > - struct twl4030_platform_data; > - > - void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int > pmic_irq, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0026-omap-mcbsp- > Remove-rx_-tx_word_length-variables.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length- > variables.patch > deleted file mode 100644 > index f1a4682..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0026-omap-mcbsp- > Remove-rx_-tx_word_length-variables.patch > +++ /dev/null > @@ -1,45 +0,0 @@ > -From 7a7bf2e165760ed106b0f4c8beb7191e3abe944f Mon Sep 17 00:00:00 > 2001 > -From: Jarkko Nikula <jhnikula@gmail.com> > -Date: Fri, 1 Jul 2011 08:52:26 +0000 > -Subject: [PATCH 026/149] omap: mcbsp: Remove rx_/tx_word_length > variables > - > -These variables got unused after ("omap: mcbsp: Drop in-driver transfer > -support") but was noticed only afterwards. > - > -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/plat-omap/include/plat/mcbsp.h | 2 -- > - arch/arm/plat-omap/mcbsp.c | 3 --- > - 2 files changed, 0 insertions(+), 5 deletions(-) > - > -diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat- > omap/include/plat/mcbsp.h > -index 6c53508..63464ad 100644 > ---- a/arch/arm/plat-omap/include/plat/mcbsp.h > -+++ b/arch/arm/plat-omap/include/plat/mcbsp.h > -@@ -385,8 +385,6 @@ struct omap_mcbsp { > - void __iomem *io_base; > - u8 id; > - u8 free; > -- omap_mcbsp_word_length rx_word_length; > -- omap_mcbsp_word_length tx_word_length; > - > - int rx_irq; > - int tx_irq; > -diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c > -index 455eadc..3c1fbdc 100644 > ---- a/arch/arm/plat-omap/mcbsp.c > -+++ b/arch/arm/plat-omap/mcbsp.c > -@@ -869,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx) > - if (cpu_is_omap34xx()) > - omap_st_start(mcbsp); > - > -- mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) > & 0x7; > -- mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) > & 0x7; > -- > - /* Only enable SRG, if McBSP is master */ > - w = MCBSP_READ_CACHE(mcbsp, PCR0); > - if (w & (FSXM | FSRM | CLKXM | CLKRM)) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0027-omap-mcbsp- > Remove-port-number-enums.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch > deleted file mode 100644 > index b8389db..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0027-omap-mcbsp- > Remove-port-number-enums.patch > +++ /dev/null > @@ -1,68 +0,0 @@ > -From a16f9faa682c8cdd3bbd14618600ec67e4a56963 Mon Sep 17 00:00:00 > 2001 > -From: Jarkko Nikula <jhnikula@gmail.com> > -Date: Fri, 1 Jul 2011 08:52:27 +0000 > -Subject: [PATCH 027/149] omap: mcbsp: Remove port number enums > - > -These McBSP port number enums are used only in two places in the McBSP > code > -so we may remove then and just use numeric values like rest of the code does. > - > -Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/mach-omap1/mcbsp.c | 4 ++-- > - arch/arm/plat-omap/include/plat/mcbsp.h | 10 +--------- > - 2 files changed, 3 insertions(+), 11 deletions(-) > - > -diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c > -index d9af981..ab7395d 100644 > ---- a/arch/arm/mach-omap1/mcbsp.c > -+++ b/arch/arm/mach-omap1/mcbsp.c > -@@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id) > - * On 1510, 1610 and 1710, McBSP1 and McBSP3 > - * are DSP public peripherals. > - */ > -- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { > -+ if (id == 0 || id == 2) { > - if (dsp_use++ == 0) { > - api_clk = clk_get(NULL, "api_ck"); > - dsp_clk = clk_get(NULL, "dsp_ck"); > -@@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id) > - > - static void omap1_mcbsp_free(unsigned int id) > - { > -- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { > -+ if (id == 0 || id == 2) { > - if (--dsp_use == 0) { > - if (!IS_ERR(api_clk)) { > - clk_disable(api_clk); > -diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat- > omap/include/plat/mcbsp.h > -index 63464ad..9882c657 100644 > ---- a/arch/arm/plat-omap/include/plat/mcbsp.h > -+++ b/arch/arm/plat-omap/include/plat/mcbsp.h > -@@ -33,7 +33,7 @@ > - #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \ > - static struct platform_device omap_mcbsp##port_nr = { \ > - .name = "omap-mcbsp-dai", \ > -- .id = OMAP_MCBSP##port_nr, \ > -+ .id = port_nr - 1, \ > - } > - > - #define MCBSP_CONFIG_TYPE2 0x2 > -@@ -332,14 +332,6 @@ struct omap_mcbsp_reg_cfg { > - }; > - > - typedef enum { > -- OMAP_MCBSP1 = 0, > -- OMAP_MCBSP2, > -- OMAP_MCBSP3, > -- OMAP_MCBSP4, > -- OMAP_MCBSP5 > --} omap_mcbsp_id; > -- > --typedef enum { > - OMAP_MCBSP_WORD_8 = 0, > - OMAP_MCBSP_WORD_12, > - OMAP_MCBSP_WORD_16, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0028-OMAP- > dmtimer-add-missing-include.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch > deleted file mode 100644 > index 04a711e..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0028-OMAP-dmtimer-add- > missing-include.patch > +++ /dev/null > @@ -1,31 +0,0 @@ > -From 4e6a7403182e1e30f8b403e7931ce7c832cb5db3 Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sat, 9 Jul 2011 18:00:25 -0600 > -Subject: [PATCH 028/149] OMAP: dmtimer: add missing include > - > -After commit caf64f2fdc48472995d40656eb1a75524c464447 ("omap: Make > a subset > -of dmtimer functions into inline functions"), > -arch/arm/plat-omap/include/plat/dmtimer.h is missing an include of linux/io.h > -- add it. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > -Cc: Tony Lindgren <tony@atomide.com> > ---- > - arch/arm/plat-omap/include/plat/dmtimer.h | 1 + > - 1 files changed, 1 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat- > omap/include/plat/dmtimer.h > -index d0f3a2d..eb5d16c 100644 > ---- a/arch/arm/plat-omap/include/plat/dmtimer.h > -+++ b/arch/arm/plat-omap/include/plat/dmtimer.h > -@@ -34,6 +34,7 @@ > - > - #include <linux/clk.h> > - #include <linux/delay.h> > -+#include <linux/io.h> > - > - #ifndef __ASM_ARCH_DMTIMER_H > - #define __ASM_ARCH_DMTIMER_H > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0029-OMAP2- > hwmod-Fix-smart-standby-wakeup-support.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup- > support.patch > deleted file mode 100644 > index 95384bb..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0029-OMAP2-hwmod-Fix- > smart-standby-wakeup-support.patch > +++ /dev/null > @@ -1,130 +0,0 @@ > -From 8a9259c5eedfeb7e2dd3e001aa68e4e1a9149b41 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Fri, 1 Jul 2011 22:54:00 +0200 > -Subject: [PATCH 029/149] OMAP2+: hwmod: Fix smart-standby + wakeup > support > - > -The commit 86009eb326afde34ffdc5648cd344aa86b8d58d4 was adding > -the wakeup support for new OMAP4 IPs. This support is incomplete for > -busmaster IPs that need as well to use smart-standby with wakeup. > - > -This new standbymode is suported on HSI and USB_HOST_FS for the moment. > - > -Add the new MSTANDBY_SMART_WKUP flag to mark the IPs that support this > -capability. > - > -Enable this new mode when applicable in _enable_wakeup, _disable_wakeup, > -_enable_sysc and _idle_sysc. > - > -The omap_hwmod_44xx_data.c will have to be updated to add this new flag. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Djamil Elaidi <d-elaidi@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 34 > +++++++++++++++++++++---- > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +- > - 2 files changed, 29 insertions(+), 7 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 293fa6c..384d3c3 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -391,7 +391,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, > u32 *v) > - > - if (!oh->class->sysc || > - !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || > -- (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) > -+ (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || > -+ (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) > - return -EINVAL; > - > - if (!oh->class->sysc->sysc_fields) { > -@@ -405,6 +406,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, > u32 *v) > - > - if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) > - _set_slave_idlemode(oh, > HWMOD_IDLEMODE_SMART_WKUP, v); > -+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) > -+ _set_master_standbymode(oh, > HWMOD_IDLEMODE_SMART_WKUP, v); > - > - /* XXX test pwrdm_get_wken for this hwmod's subsystem */ > - > -@@ -426,7 +429,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, > u32 *v) > - > - if (!oh->class->sysc || > - !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || > -- (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) > -+ (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || > -+ (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) > - return -EINVAL; > - > - if (!oh->class->sysc->sysc_fields) { > -@@ -440,6 +444,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, > u32 *v) > - > - if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) > - _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); > -+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) > -+ _set_master_standbymode(oh, > HWMOD_IDLEMODE_SMART_WKUP, v); > - > - /* XXX test pwrdm_get_wken for this hwmod's subsystem */ > - > -@@ -781,8 +787,16 @@ static void _enable_sysc(struct omap_hwmod *oh) > - } > - > - if (sf & SYSC_HAS_MIDLEMODE) { > -- idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? > -- HWMOD_IDLEMODE_NO : > HWMOD_IDLEMODE_SMART; > -+ if (oh->flags & HWMOD_SWSUP_MSTANDBY) { > -+ idlemode = HWMOD_IDLEMODE_NO; > -+ } else { > -+ if (sf & SYSC_HAS_ENAWAKEUP) > -+ _enable_wakeup(oh, &v); > -+ if (oh->class->sysc->idlemodes & > MSTANDBY_SMART_WKUP) > -+ idlemode = > HWMOD_IDLEMODE_SMART_WKUP; > -+ else > -+ idlemode = HWMOD_IDLEMODE_SMART; > -+ } > - _set_master_standbymode(oh, idlemode, &v); > - } > - > -@@ -840,8 +854,16 @@ static void _idle_sysc(struct omap_hwmod *oh) > - } > - > - if (sf & SYSC_HAS_MIDLEMODE) { > -- idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? > -- HWMOD_IDLEMODE_FORCE : > HWMOD_IDLEMODE_SMART; > -+ if (oh->flags & HWMOD_SWSUP_MSTANDBY) { > -+ idlemode = HWMOD_IDLEMODE_FORCE; > -+ } else { > -+ if (sf & SYSC_HAS_ENAWAKEUP) > -+ _enable_wakeup(oh, &v); > -+ if (oh->class->sysc->idlemodes & > MSTANDBY_SMART_WKUP) > -+ idlemode = > HWMOD_IDLEMODE_SMART_WKUP; > -+ else > -+ idlemode = HWMOD_IDLEMODE_SMART; > -+ } > - _set_master_standbymode(oh, idlemode, &v); > - } > - > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index 1adea9c..e93438c 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -77,7 +77,6 @@ extern struct omap_hwmod_sysc_fields > omap_hwmod_sysc_type2; > - #define HWMOD_IDLEMODE_FORCE (1 << 0) > - #define HWMOD_IDLEMODE_NO (1 << 1) > - #define HWMOD_IDLEMODE_SMART (1 << 2) > --/* Slave idle mode flag only */ > - #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) > - > - /** > -@@ -258,6 +257,7 @@ struct omap_hwmod_ocp_if { > - #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << > MASTER_STANDBY_SHIFT) > - #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << > MASTER_STANDBY_SHIFT) > - #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << > MASTER_STANDBY_SHIFT) > -+#define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP > << MASTER_STANDBY_SHIFT) > - > - /* omap_hwmod_sysconfig.sysc_flags capability flags */ > - #define SYSC_HAS_AUTOIDLE (1 << 0) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4- > hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4-hwmod-data-Add- > MSTANDBY_SMART_WKUP-flag.patch > deleted file mode 100644 > index a5a664e..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4-hwmod- > data-Add-MSTANDBY_SMART_WKUP-flag.patch > +++ /dev/null > @@ -1,61 +0,0 @@ > -From 8823fd9b9f1d6e6406c0b98438ad6282491b0ae5 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Fri, 1 Jul 2011 22:54:01 +0200 > -Subject: [PATCH 030/149] OMAP4: hwmod data: Add > MSTANDBY_SMART_WKUP flag > - > -Add the flag to every IPs that support it to allow the > -framework to enable it instead of the SMART_STANDBY default > -mode. > -Without that, an IP with busmaster capability will not > -be able to wakeup the interconnect at all. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++---- > - 1 files changed, 5 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index e1c69ff..8cbbfbf 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -660,7 +660,8 @@ static struct omap_hwmod_class_sysconfig > omap44xx_aess_sysc = { > - .sysc_offs = 0x0010, > - .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), > - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > -- MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -+ MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART | > -+ MSTANDBY_SMART_WKUP), > - .sysc_fields = &omap_hwmod_sysc_type2, > - }; > - > -@@ -2044,7 +2045,7 @@ static struct omap_hwmod_class_sysconfig > omap44xx_hsi_sysc = { > - SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), > - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > - SIDLE_SMART_WKUP | MSTANDBY_FORCE | > MSTANDBY_NO | > -- MSTANDBY_SMART), > -+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP), > - .sysc_fields = &omap_hwmod_sysc_type1, > - }; > - > -@@ -2446,7 +2447,7 @@ static struct omap_hwmod_class_sysconfig > omap44xx_iss_sysc = { > - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), > - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > - SIDLE_SMART_WKUP | MSTANDBY_FORCE | > MSTANDBY_NO | > -- MSTANDBY_SMART), > -+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP), > - .sysc_fields = &omap_hwmod_sysc_type2, > - }; > - > -@@ -3420,7 +3421,7 @@ static struct omap_hwmod_class_sysconfig > omap44xx_mmc_sysc = { > - SYSC_HAS_SOFTRESET), > - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > - SIDLE_SMART_WKUP | MSTANDBY_FORCE | > MSTANDBY_NO | > -- MSTANDBY_SMART), > -+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP), > - .sysc_fields = &omap_hwmod_sysc_type2, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2- > hwmod-Enable-module-in-shutdown-to-access-sysc.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module- > in-shutdown-to-access-sysc.patch > deleted file mode 100644 > index ec066b4..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2-hwmod- > Enable-module-in-shutdown-to-access-sysc.patch > +++ /dev/null > @@ -1,37 +0,0 @@ > -From 3097e6265e79329635b528dd97b7fa3ed7dbb805 Mon Sep 17 > 00:00:00 2001 > -From: Miguel Vadillo <vadillo@ti.com> > -Date: Fri, 1 Jul 2011 22:54:02 +0200 > -Subject: [PATCH 031/149] OMAP2+: hwmod: Enable module in shutdown to > access sysconfig > - > -When calling the shutdown, the module may be already in idle. > -Accessing the sysconfig register will then lead to a crash. > -In that case, re-enable the module in order to allow the access > -to the sysconfig register. > - > -Signed-off-by: Miguel Vadillo <vadillo@ti.com> > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 5 ++++- > - 1 files changed, 4 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 384d3c3..cbc2a8a 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -1396,8 +1396,11 @@ static int _shutdown(struct omap_hwmod *oh) > - } > - } > - > -- if (oh->class->sysc) > -+ if (oh->class->sysc) { > -+ if (oh->_state == _HWMOD_STATE_IDLE) > -+ _enable(oh); > - _shutdown_sysc(oh); > -+ } > - > - /* > - * If an IP contains only one HW reset line, then assert it > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2- > hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write- > the-enawakeup-bit-if-SYSC_H.patch > deleted file mode 100644 > index 6f92108..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2-hwmod-Do- > not-write-the-enawakeup-bit-if-SYSC_H.patch > +++ /dev/null > @@ -1,65 +0,0 @@ > -From 0b7a00a668b460c5a541d2d9d77a96cd0de3f57d Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Fri, 1 Jul 2011 22:54:03 +0200 > -Subject: [PATCH 032/149] OMAP2+: hwmod: Do not write the enawakeup bit > if SYSC_HAS_ENAWAKEUP is not set > - > -The Type 2 type of IPs will not have any enawakeup bit in their sysconfig. > -Writing to that bit will instead trigger a softreset. > -Check the flag to write this bit only if the module supports it. > - > -Reported-by: Miguel Vadillo <vadillo@ti.com> > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 14 ++++---------- > - 1 files changed, 4 insertions(+), 10 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index cbc2a8a..3800084 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -387,8 +387,6 @@ static int _set_module_autoidle(struct omap_hwmod > *oh, u8 autoidle, > - */ > - static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) > - { > -- u32 wakeup_mask; > -- > - if (!oh->class->sysc || > - !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || > - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || > -@@ -400,9 +398,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, > u32 *v) > - return -EINVAL; > - } > - > -- wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); > -- > -- *v |= wakeup_mask; > -+ if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) > -+ *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; > - > - if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) > - _set_slave_idlemode(oh, > HWMOD_IDLEMODE_SMART_WKUP, v); > -@@ -425,8 +422,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, > u32 *v) > - */ > - static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) > - { > -- u32 wakeup_mask; > -- > - if (!oh->class->sysc || > - !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || > - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || > -@@ -438,9 +433,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, > u32 *v) > - return -EINVAL; > - } > - > -- wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); > -- > -- *v &= ~wakeup_mask; > -+ if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) > -+ *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); > - > - if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) > - _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2- > hwmod-Remove-_populate_mpu_rt_base-warning.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2-hwmod-Remove- > _populate_mpu_rt_base-warning.patch > deleted file mode 100644 > index 8963785..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2-hwmod- > Remove-_populate_mpu_rt_base-warning.patch > +++ /dev/null > @@ -1,33 +0,0 @@ > -From 9c5dd6c8e5a9dd6fc98e30a45a3d929034de664b Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Fri, 1 Jul 2011 22:54:04 +0200 > -Subject: [PATCH 033/149] OMAP2+: hwmod: Remove > _populate_mpu_rt_base warning > - > -It is perfectly valid for some hwmod to not have any > -register target address for sysconfig. This is especially > -true for interconnect hwmods. > -Remove the warning. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 3 --- > - 1 files changed, 0 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 3800084..f401417 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -1704,9 +1704,6 @@ static int __init _populate_mpu_rt_base(struct > omap_hwmod *oh, void *data) > - return 0; > - > - oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); > -- if (!oh->_mpu_rt_va) > -- pr_warning("omap_hwmod: %s found no _mpu_rt_va for > %s\n", > -- __func__, oh->name); > - > - return 0; > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0034-OMAP2- > hwmod-Fix-the-HW-reset-management.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset- > management.patch > deleted file mode 100644 > index 7e390ed..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0034-OMAP2-hwmod-Fix- > the-HW-reset-management.patch > +++ /dev/null > @@ -1,87 +0,0 @@ > -From 0fdacba393a3d2b2c87b4a9c4b2bb811bd896c09 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Fri, 1 Jul 2011 22:54:05 +0200 > -Subject: [PATCH 034/149] OMAP2+: hwmod: Fix the HW reset management > - > -The HW reset must be de-assert after the clocks are enabled > -but before waiting for the target to be ready. Otherwise the > -reset might not work properly since the clock is not running > -to proceed the reset. > - > -De-assert the reset after _enable_clocks and before > -_wait_target_ready. > -Re-assert it only when the clocks are disabled. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 32 ++++++++++++++++------------- > --- > - 1 files changed, 16 insertions(+), 16 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index f401417..df91bb1 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh) > - > - pr_debug("omap_hwmod: %s: enabling\n", oh->name); > - > -- /* > -- * If an IP contains only one HW reset line, then de-assert it in order > -- * to allow to enable the clocks. Otherwise the PRCM will return > -- * Intransition status, and the init will failed. > -- */ > -- if ((oh->_state == _HWMOD_STATE_INITIALIZED || > -- oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt > == 1) > -- _deassert_hardreset(oh, oh->rst_lines[0].name); > -- > - /* Mux pins for device runtime if populated */ > - if (oh->mux && (!oh->mux->enabled || > - ((oh->_state == _HWMOD_STATE_IDLE) && > -@@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh) > - _add_initiator_dep(oh, mpu_oh); > - _enable_clocks(oh); > - > -+ /* > -+ * If an IP contains only one HW reset line, then de-assert it in order > -+ * to allow the module state transition. Otherwise the PRCM will return > -+ * Intransition status, and the init will failed. > -+ */ > -+ if ((oh->_state == _HWMOD_STATE_INITIALIZED || > -+ oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt > == 1) > -+ _deassert_hardreset(oh, oh->rst_lines[0].name); > -+ > - r = _wait_target_ready(oh); > - if (!r) { > - oh->_state = _HWMOD_STATE_ENABLED; > -@@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh) > - _shutdown_sysc(oh); > - } > - > -- /* > -- * If an IP contains only one HW reset line, then assert it > -- * before disabling the clocks and shutting down the IP. > -- */ > -- if (oh->rst_lines_cnt == 1) > -- _assert_hardreset(oh, oh->rst_lines[0].name); > -- > - /* clocks and deps are already disabled in idle */ > - if (oh->_state == _HWMOD_STATE_ENABLED) { > - _del_initiator_dep(oh, mpu_oh); > -@@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh) > - } > - /* XXX Should this code also force-disable the optional clocks? */ > - > -+ /* > -+ * If an IP contains only one HW reset line, then assert it > -+ * after disabling the clocks and before shutting down the IP. > -+ */ > -+ if (oh->rst_lines_cnt == 1) > -+ _assert_hardreset(oh, oh->rst_lines[0].name); > -+ > - /* Mux pins to safe mode or use populated off mode values */ > - if (oh->mux) > - omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0035-OMAP-hwmod- > Add-warnings-if-enable-failed.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch > deleted file mode 100644 > index fbedcef..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0035-OMAP-hwmod-Add- > warnings-if-enable-failed.patch > +++ /dev/null > @@ -1,30 +0,0 @@ > -From ea1e84fd91f4bfa506f7d44c4183ab649308b940 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Fri, 1 Jul 2011 22:54:06 +0200 > -Subject: [PATCH 035/149] OMAP: hwmod: Add warnings if enable failed > - > -Change the debug into warning to check what IPs are failing. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 2 ++ > - 1 files changed, 2 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index df91bb1..64e9830 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -944,6 +944,8 @@ static int _init_clocks(struct omap_hwmod *oh, void > *data) > - > - if (!ret) > - oh->_state = _HWMOD_STATE_CLKS_INITED; > -+ else > -+ pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh- > >name); > - > - return ret; > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0036-OMAP-hwmod- > Move-pr_debug-to-improve-the-readability.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the- > readability.patch > deleted file mode 100644 > index e484c43..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0036-OMAP-hwmod- > Move-pr_debug-to-improve-the-readability.patch > +++ /dev/null > @@ -1,95 +0,0 @@ > -From 1a090fd9d66008314ef1963ff7335462b4231d8b Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Fri, 1 Jul 2011 22:54:07 +0200 > -Subject: [PATCH 036/149] OMAP: hwmod: Move pr_debug to improve the > readability > - > -Move the pr_debug at the top of the function > -to trace the entry even if the first test is failing. > -That help understanding that we entered the function > -but failed in it. > - > -Move the _enable last part out of the test to reduce > -indentation and improve readability. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 32 +++++++++++++++++----------- > ---- > - 1 files changed, 17 insertions(+), 15 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 64e9830..e530bcb 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -1242,6 +1242,8 @@ static int _enable(struct omap_hwmod *oh) > - { > - int r; > - > -+ pr_debug("omap_hwmod: %s: enabling\n", oh->name); > -+ > - if (oh->_state != _HWMOD_STATE_INITIALIZED && > - oh->_state != _HWMOD_STATE_IDLE && > - oh->_state != _HWMOD_STATE_DISABLED) { > -@@ -1250,8 +1252,6 @@ static int _enable(struct omap_hwmod *oh) > - return -EINVAL; > - } > - > -- pr_debug("omap_hwmod: %s: enabling\n", oh->name); > -- > - /* Mux pins for device runtime if populated */ > - if (oh->mux && (!oh->mux->enabled || > - ((oh->_state == _HWMOD_STATE_IDLE) && > -@@ -1271,19 +1271,21 @@ static int _enable(struct omap_hwmod *oh) > - _deassert_hardreset(oh, oh->rst_lines[0].name); > - > - r = _wait_target_ready(oh); > -- if (!r) { > -- oh->_state = _HWMOD_STATE_ENABLED; > -- > -- /* Access the sysconfig only if the target is ready */ > -- if (oh->class->sysc) { > -- if (!(oh->_int_flags & > _HWMOD_SYSCONFIG_LOADED)) > -- _update_sysc_cache(oh); > -- _enable_sysc(oh); > -- } > -- } else { > -- _disable_clocks(oh); > -+ if (r) { > - pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", > - oh->name, r); > -+ _disable_clocks(oh); > -+ > -+ return r; > -+ } > -+ > -+ oh->_state = _HWMOD_STATE_ENABLED; > -+ > -+ /* Access the sysconfig only if the target is ready */ > -+ if (oh->class->sysc) { > -+ if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) > -+ _update_sysc_cache(oh); > -+ _enable_sysc(oh); > - } > - > - return r; > -@@ -1299,14 +1301,14 @@ static int _enable(struct omap_hwmod *oh) > - */ > - static int _idle(struct omap_hwmod *oh) > - { > -+ pr_debug("omap_hwmod: %s: idling\n", oh->name); > -+ > - if (oh->_state != _HWMOD_STATE_ENABLED) { > - WARN(1, "omap_hwmod: %s: idle state can only be entered > from " > - "enabled state\n", oh->name); > - return -EINVAL; > - } > - > -- pr_debug("omap_hwmod: %s: idling\n", oh->name); > -- > - if (oh->class->sysc) > - _idle_sysc(oh); > - _del_initiator_dep(oh, mpu_oh); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0037-omap_hwmod- > use-a-null-structure-record-to-terminate-.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to- > terminate-.patch > deleted file mode 100644 > index 8618e74..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0037-omap_hwmod-use-a- > null-structure-record-to-terminate-.patch > +++ /dev/null > @@ -1,3529 +0,0 @@ > -From 2c900775f726b160e5ce702e75554282c2869d60 Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sat, 9 Jul 2011 19:14:05 -0600 > -Subject: [PATCH 037/149] omap_hwmod: use a null structure record to > terminate omap_hwmod_addr_space arrays > - > -Previously, struct omap_hwmod_addr_space arrays were unterminated; and > -users of these arrays used the ARRAY_SIZE() macro to determine the > -length of the array. However, ARRAY_SIZE() only works when the array > -is in the same scope as the macro user. > - > -So far this hasn't been a problem. However, to reduce duplicated > -data, a subsequent patch will move common data to a separate, shared > -file. When this is done, ARRAY_SIZE() will no longer be usable. > - > -This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space > -arrays and uses a null structure member as the array terminator > -instead. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 45 ++++++-- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 66 +++++----- > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 83 ++++++------- > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 108 ++++++++-------- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 170 > +++++++++++++------------- > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 - > - 6 files changed, 249 insertions(+), 225 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index e530bcb..73599f0 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -2,6 +2,7 @@ > - * omap_hwmod implementation for OMAP2/3/4 > - * > - * Copyright (C) 2009-2011 Nokia Corporation > -+ * Copyright (C) 2011 Texas Instruments, Inc. > - * > - * Paul Walmsley, Benoît Cousson, Kevin Hilman > - * > -@@ -678,6 +679,29 @@ static void _disable_optional_clocks(struct > omap_hwmod *oh) > - } > - > - /** > -+ * _count_ocp_if_addr_spaces - count the number of address space entries > for @oh > -+ * @oh: struct omap_hwmod *oh > -+ * > -+ * Count and return the number of address space ranges associated with > -+ * the hwmod @oh. Used to allocate struct resource data. Returns 0 > -+ * if @oh is NULL. > -+ */ > -+static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) > -+{ > -+ struct omap_hwmod_addr_space *mem; > -+ int i = 0; > -+ > -+ if (!os || !os->addr) > -+ return 0; > -+ > -+ do { > -+ mem = &os->addr[i++]; > -+ } while (mem->pa_start != mem->pa_end); > -+ > -+ return i; > -+} > -+ > -+/** > - * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU > use > - * @oh: struct omap_hwmod * > - * > -@@ -722,8 +746,7 @@ static void __iomem * __init > _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) > - { > - struct omap_hwmod_ocp_if *os; > - struct omap_hwmod_addr_space *mem; > -- int i; > -- int found = 0; > -+ int i = 0, found = 0; > - void __iomem *va_start; > - > - if (!oh || oh->slaves_cnt == 0) > -@@ -731,12 +754,14 @@ static void __iomem * __init > _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) > - > - os = oh->slaves[index]; > - > -- for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { > -- if (mem->flags & ADDR_TYPE_RT) { > -+ if (!os->addr) > -+ return NULL; > -+ > -+ do { > -+ mem = &os->addr[i++]; > -+ if (mem->flags & ADDR_TYPE_RT) > - found = 1; > -- break; > -- } > -- } > -+ } while (!found && mem->pa_start != mem->pa_end); > - > - if (found) { > - va_start = ioremap(mem->pa_start, mem->pa_end - mem- > >pa_start); > -@@ -1962,7 +1987,7 @@ int omap_hwmod_count_resources(struct > omap_hwmod *oh) > - ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; > - > - for (i = 0; i < oh->slaves_cnt; i++) > -- ret += oh->slaves[i]->addr_cnt; > -+ ret += _count_ocp_if_addr_spaces(oh->slaves[i]); > - > - return ret; > - } > -@@ -2002,10 +2027,12 @@ int omap_hwmod_fill_resources(struct > omap_hwmod *oh, struct resource *res) > - > - for (i = 0; i < oh->slaves_cnt; i++) { > - struct omap_hwmod_ocp_if *os; > -+ int addr_cnt; > - > - os = oh->slaves[i]; > -+ addr_cnt = _count_ocp_if_addr_spaces(os); > - > -- for (j = 0; j < os->addr_cnt; j++) { > -+ for (j = 0; j < addr_cnt; j++) { > - (res + r)->name = (os->addr + j)->name; > - (res + r)->start = (os->addr + j)->pa_start; > - (res + r)->end = (os->addr + j)->pa_end; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index c4d0ae8..1a7ce3e 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -1,7 +1,7 @@ > - /* > - * omap_hwmod_2420_data.c - hardware modules present on the > OMAP2420 chips > - * > -- * Copyright (C) 2009-2010 Nokia Corporation > -+ * Copyright (C) 2009-2011 Nokia Corporation > - * Paul Walmsley > - * > - * This program is free software; you can redistribute it and/or modify > -@@ -120,6 +120,7 @@ static struct omap_hwmod_addr_space > omap2420_mcspi1_addr_space[] = { > - .pa_end = 0x480980ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { > -@@ -127,7 +128,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__mcspi1 = { > - .slave = &omap2420_mcspi1_hwmod, > - .clk = "mcspi1_ick", > - .addr = omap2420_mcspi1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -138,6 +138,7 @@ static struct omap_hwmod_addr_space > omap2420_mcspi2_addr_space[] = { > - .pa_end = 0x4809a0ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { > -@@ -145,7 +146,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__mcspi2 = { > - .slave = &omap2420_mcspi2_hwmod, > - .clk = "mcspi2_ick", > - .addr = omap2420_mcspi2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -163,6 +163,7 @@ static struct omap_hwmod_addr_space > omap2420_uart1_addr_space[] = { > - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { > -@@ -170,7 +171,6 @@ static struct omap_hwmod_ocp_if > omap2_l4_core__uart1 = { > - .slave = &omap2420_uart1_hwmod, > - .clk = "uart1_ick", > - .addr = omap2420_uart1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -181,6 +181,7 @@ static struct omap_hwmod_addr_space > omap2420_uart2_addr_space[] = { > - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { > -@@ -188,7 +189,6 @@ static struct omap_hwmod_ocp_if > omap2_l4_core__uart2 = { > - .slave = &omap2420_uart2_hwmod, > - .clk = "uart2_ick", > - .addr = omap2420_uart2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -199,6 +199,7 @@ static struct omap_hwmod_addr_space > omap2420_uart3_addr_space[] = { > - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { > -@@ -206,7 +207,6 @@ static struct omap_hwmod_ocp_if > omap2_l4_core__uart3 = { > - .slave = &omap2420_uart3_hwmod, > - .clk = "uart3_ick", > - .addr = omap2420_uart3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space > omap2420_i2c1_addr_space[] = { > - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN > - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { > -@@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__i2c1 = { > - .slave = &omap2420_i2c1_hwmod, > - .clk = "i2c1_ick", > - .addr = omap2420_i2c1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -238,6 +238,7 @@ static struct omap_hwmod_addr_space > omap2420_i2c2_addr_space[] = { > - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN > - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { > -@@ -245,7 +246,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__i2c2 = { > - .slave = &omap2420_i2c2_hwmod, > - .clk = "i2c2_ick", > - .addr = omap2420_i2c2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -370,6 +370,7 @@ static struct omap_hwmod_addr_space > omap2420_timer1_addrs[] = { > - .pa_end = 0x48028000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_wkup -> timer1 */ > -@@ -378,7 +379,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_wkup__timer1 = { > - .slave = &omap2420_timer1_hwmod, > - .clk = "gpt1_ick", > - .addr = omap2420_timer1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -420,6 +420,7 @@ static struct omap_hwmod_addr_space > omap2420_timer2_addrs[] = { > - .pa_end = 0x4802a000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer2 */ > -@@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer2 = { > - .slave = &omap2420_timer2_hwmod, > - .clk = "gpt2_ick", > - .addr = omap2420_timer2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -470,6 +470,7 @@ static struct omap_hwmod_addr_space > omap2420_timer3_addrs[] = { > - .pa_end = 0x48078000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer3 */ > -@@ -478,7 +479,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer3 = { > - .slave = &omap2420_timer3_hwmod, > - .clk = "gpt3_ick", > - .addr = omap2420_timer3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -520,6 +520,7 @@ static struct omap_hwmod_addr_space > omap2420_timer4_addrs[] = { > - .pa_end = 0x4807a000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer4 */ > -@@ -528,7 +529,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer4 = { > - .slave = &omap2420_timer4_hwmod, > - .clk = "gpt4_ick", > - .addr = omap2420_timer4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -570,6 +570,7 @@ static struct omap_hwmod_addr_space > omap2420_timer5_addrs[] = { > - .pa_end = 0x4807c000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer5 */ > -@@ -578,7 +579,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer5 = { > - .slave = &omap2420_timer5_hwmod, > - .clk = "gpt5_ick", > - .addr = omap2420_timer5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer5_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space > omap2420_timer6_addrs[] = { > - .pa_end = 0x4807e000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer6 */ > -@@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer6 = { > - .slave = &omap2420_timer6_hwmod, > - .clk = "gpt6_ick", > - .addr = omap2420_timer6_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer6_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space > omap2420_timer7_addrs[] = { > - .pa_end = 0x48080000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer7 */ > -@@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer7 = { > - .slave = &omap2420_timer7_hwmod, > - .clk = "gpt7_ick", > - .addr = omap2420_timer7_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer7_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space > omap2420_timer8_addrs[] = { > - .pa_end = 0x48082000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer8 */ > -@@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer8 = { > - .slave = &omap2420_timer8_hwmod, > - .clk = "gpt8_ick", > - .addr = omap2420_timer8_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer8_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space > omap2420_timer9_addrs[] = { > - .pa_end = 0x48084000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer9 */ > -@@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer9 = { > - .slave = &omap2420_timer9_hwmod, > - .clk = "gpt9_ick", > - .addr = omap2420_timer9_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer9_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space > omap2420_timer10_addrs[] = { > - .pa_end = 0x48086000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer10 */ > -@@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer10 = { > - .slave = &omap2420_timer10_hwmod, > - .clk = "gpt10_ick", > - .addr = omap2420_timer10_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer10_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space > omap2420_timer11_addrs[] = { > - .pa_end = 0x48088000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer11 */ > -@@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer11 = { > - .slave = &omap2420_timer11_hwmod, > - .clk = "gpt11_ick", > - .addr = omap2420_timer11_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer11_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space > omap2420_timer12_addrs[] = { > - .pa_end = 0x4808a000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer12 */ > -@@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__timer12 = { > - .slave = &omap2420_timer12_hwmod, > - .clk = "gpt12_ick", > - .addr = omap2420_timer12_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_timer12_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -966,6 +966,7 @@ static struct omap_hwmod_addr_space > omap2420_wd_timer2_addrs[] = { > - .pa_end = 0x4802207f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { > -@@ -973,7 +974,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_wkup__wd_timer2 = { > - .slave = &omap2420_wd_timer2_hwmod, > - .clk = "mpu_wdt_ick", > - .addr = omap2420_wd_timer2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1184,6 +1184,7 @@ static struct omap_hwmod_addr_space > omap2420_dss_addrs[] = { > - .pa_end = 0x480503FF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss */ > -@@ -1192,7 +1193,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__dss = { > - .slave = &omap2420_dss_core_hwmod, > - .clk = "dss_ick", > - .addr = omap2420_dss_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_dss_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP2420_L4_CORE_FW_DSS_CORE_REGION, > -@@ -1268,6 +1268,7 @@ static struct omap_hwmod_addr_space > omap2420_dss_dispc_addrs[] = { > - .pa_end = 0x480507FF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_dispc */ > -@@ -1276,7 +1277,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__dss_dispc = { > - .slave = &omap2420_dss_dispc_hwmod, > - .clk = "dss_ick", > - .addr = omap2420_dss_dispc_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_dss_dispc_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, > -@@ -1338,6 +1338,7 @@ static struct omap_hwmod_addr_space > omap2420_dss_rfbi_addrs[] = { > - .pa_end = 0x48050BFF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_rfbi */ > -@@ -1346,7 +1347,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__dss_rfbi = { > - .slave = &omap2420_dss_rfbi_hwmod, > - .clk = "dss_ick", > - .addr = omap2420_dss_rfbi_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_dss_rfbi_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP2420_L4_CORE_FW_DSS_CORE_REGION, > -@@ -1394,6 +1394,7 @@ static struct omap_hwmod_addr_space > omap2420_dss_venc_addrs[] = { > - .pa_end = 0x48050FFF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_venc */ > -@@ -1402,7 +1403,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__dss_venc = { > - .slave = &omap2420_dss_venc_hwmod, > - .clk = "dss_54m_fck", > - .addr = omap2420_dss_venc_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_dss_venc_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP2420_L4_CORE_FW_DSS_VENC_REGION, > -@@ -1536,6 +1536,7 @@ static struct omap_hwmod_addr_space > omap2420_gpio1_addr_space[] = { > - .pa_end = 0x480181ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { > -@@ -1543,7 +1544,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_wkup__gpio1 = { > - .slave = &omap2420_gpio1_hwmod, > - .clk = "gpios_ick", > - .addr = omap2420_gpio1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_gpio1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1554,6 +1554,7 @@ static struct omap_hwmod_addr_space > omap2420_gpio2_addr_space[] = { > - .pa_end = 0x4801a1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { > -@@ -1561,7 +1562,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_wkup__gpio2 = { > - .slave = &omap2420_gpio2_hwmod, > - .clk = "gpios_ick", > - .addr = omap2420_gpio2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_gpio2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1572,6 +1572,7 @@ static struct omap_hwmod_addr_space > omap2420_gpio3_addr_space[] = { > - .pa_end = 0x4801c1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { > -@@ -1579,7 +1580,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_wkup__gpio3 = { > - .slave = &omap2420_gpio3_hwmod, > - .clk = "gpios_ick", > - .addr = omap2420_gpio3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_gpio3_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1590,6 +1590,7 @@ static struct omap_hwmod_addr_space > omap2420_gpio4_addr_space[] = { > - .pa_end = 0x4801e1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { > -@@ -1597,7 +1598,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_wkup__gpio4 = { > - .slave = &omap2420_gpio4_hwmod, > - .clk = "gpios_ick", > - .addr = omap2420_gpio4_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2420_gpio4_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1789,6 +1789,7 @@ static struct omap_hwmod_addr_space > omap2420_dma_system_addrs[] = { > - .pa_end = 0x48056fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* dma_system -> L3 */ > -@@ -1810,7 +1811,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__dma_system = { > - .slave = &omap2420_dma_system_hwmod, > - .clk = "sdma_ick", > - .addr = omap2420_dma_system_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1868,6 +1868,7 @@ static struct omap_hwmod_addr_space > omap2420_mailbox_addrs[] = { > - .pa_end = 0x480941ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - /* l4_core -> mailbox */ > -@@ -1875,7 +1876,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__mailbox = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_mailbox_hwmod, > - .addr = omap2420_mailbox_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_mailbox_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2044,6 +2044,7 @@ static struct omap_hwmod_addr_space > omap2420_mcbsp1_addrs[] = { > - .pa_end = 0x480740ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp1 */ > -@@ -2052,7 +2053,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__mcbsp1 = { > - .slave = &omap2420_mcbsp1_hwmod, > - .clk = "mcbsp1_ick", > - .addr = omap2420_mcbsp1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2101,6 +2101,7 @@ static struct omap_hwmod_addr_space > omap2420_mcbsp2_addrs[] = { > - .pa_end = 0x480760ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp2 */ > -@@ -2109,7 +2110,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__mcbsp2 = { > - .slave = &omap2420_mcbsp2_hwmod, > - .clk = "mcbsp2_ick", > - .addr = omap2420_mcbsp2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index 9682dd5..da28794 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -1,7 +1,7 @@ > - /* > - * omap_hwmod_2430_data.c - hardware modules present on the > OMAP2430 chips > - * > -- * Copyright (C) 2009-2010 Nokia Corporation > -+ * Copyright (C) 2009-2011 Nokia Corporation > - * Paul Walmsley > - * > - * This program is free software; you can redistribute it and/or modify > -@@ -141,6 +141,7 @@ static struct omap_hwmod_addr_space > omap2430_i2c1_addr_space[] = { > - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN > - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { > -@@ -148,7 +149,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__i2c1 = { > - .slave = &omap2430_i2c1_hwmod, > - .clk = "i2c1_ick", > - .addr = omap2430_i2c1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -159,6 +159,7 @@ static struct omap_hwmod_addr_space > omap2430_i2c2_addr_space[] = { > - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN > - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { > -@@ -166,7 +167,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__i2c2 = { > - .slave = &omap2430_i2c2_hwmod, > - .clk = "i2c2_ick", > - .addr = omap2430_i2c2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -184,6 +184,7 @@ static struct omap_hwmod_addr_space > omap2430_uart1_addr_space[] = { > - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { > -@@ -191,7 +192,6 @@ static struct omap_hwmod_ocp_if > omap2_l4_core__uart1 = { > - .slave = &omap2430_uart1_hwmod, > - .clk = "uart1_ick", > - .addr = omap2430_uart1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -202,6 +202,7 @@ static struct omap_hwmod_addr_space > omap2430_uart2_addr_space[] = { > - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { > -@@ -209,7 +210,6 @@ static struct omap_hwmod_ocp_if > omap2_l4_core__uart2 = { > - .slave = &omap2430_uart2_hwmod, > - .clk = "uart2_ick", > - .addr = omap2430_uart2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space > omap2430_uart3_addr_space[] = { > - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { > -@@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if > omap2_l4_core__uart3 = { > - .slave = &omap2430_uart3_hwmod, > - .clk = "uart3_ick", > - .addr = omap2430_uart3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -248,7 +248,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__usbhsotg = { > - .slave = &omap2430_usbhsotg_hwmod, > - .clk = "usb_l4_ick", > - .addr = omap2430_usbhsotg_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_usbhsotg_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -267,6 +266,7 @@ static struct omap_hwmod_addr_space > omap2430_mmc1_addr_space[] = { > - .pa_end = 0x4809c1ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { > -@@ -274,7 +274,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mmc1 = { > - .slave = &omap2430_mmc1_hwmod, > - .clk = "mmchs1_ick", > - .addr = omap2430_mmc1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_mmc1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -285,14 +284,14 @@ static struct omap_hwmod_addr_space > omap2430_mmc2_addr_space[] = { > - .pa_end = 0x480b41ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mmc2_hwmod, > -- .addr = omap2430_mmc2_addr_space, > - .clk = "mmchs2_ick", > -- .addr_cnt = ARRAY_SIZE(omap2430_mmc2_addr_space), > -+ .addr = omap2430_mmc2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -339,6 +338,7 @@ static struct omap_hwmod_addr_space > omap2430_mcspi1_addr_space[] = { > - .pa_end = 0x480980ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { > -@@ -346,7 +346,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mcspi1 = { > - .slave = &omap2430_mcspi1_hwmod, > - .clk = "mcspi1_ick", > - .addr = omap2430_mcspi1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -357,6 +356,7 @@ static struct omap_hwmod_addr_space > omap2430_mcspi2_addr_space[] = { > - .pa_end = 0x4809a0ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { > -@@ -364,7 +364,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mcspi2 = { > - .slave = &omap2430_mcspi2_hwmod, > - .clk = "mcspi2_ick", > - .addr = omap2430_mcspi2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -375,6 +374,7 @@ static struct omap_hwmod_addr_space > omap2430_mcspi3_addr_space[] = { > - .pa_end = 0x480b80ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { > -@@ -382,7 +382,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mcspi3 = { > - .slave = &omap2430_mcspi3_hwmod, > - .clk = "mcspi3_ick", > - .addr = omap2430_mcspi3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -471,6 +470,7 @@ static struct omap_hwmod_addr_space > omap2430_timer1_addrs[] = { > - .pa_end = 0x49018000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_wkup -> timer1 */ > -@@ -479,7 +479,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_wkup__timer1 = { > - .slave = &omap2430_timer1_hwmod, > - .clk = "gpt1_ick", > - .addr = omap2430_timer1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -521,6 +520,7 @@ static struct omap_hwmod_addr_space > omap2430_timer2_addrs[] = { > - .pa_end = 0x4802a000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer2 */ > -@@ -529,7 +529,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer2 = { > - .slave = &omap2430_timer2_hwmod, > - .clk = "gpt2_ick", > - .addr = omap2430_timer2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -571,6 +570,7 @@ static struct omap_hwmod_addr_space > omap2430_timer3_addrs[] = { > - .pa_end = 0x48078000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer3 */ > -@@ -579,7 +579,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer3 = { > - .slave = &omap2430_timer3_hwmod, > - .clk = "gpt3_ick", > - .addr = omap2430_timer3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -621,6 +620,7 @@ static struct omap_hwmod_addr_space > omap2430_timer4_addrs[] = { > - .pa_end = 0x4807a000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer4 */ > -@@ -629,7 +629,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer4 = { > - .slave = &omap2430_timer4_hwmod, > - .clk = "gpt4_ick", > - .addr = omap2430_timer4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -671,6 +670,7 @@ static struct omap_hwmod_addr_space > omap2430_timer5_addrs[] = { > - .pa_end = 0x4807c000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer5 */ > -@@ -679,7 +679,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer5 = { > - .slave = &omap2430_timer5_hwmod, > - .clk = "gpt5_ick", > - .addr = omap2430_timer5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer5_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -721,6 +720,7 @@ static struct omap_hwmod_addr_space > omap2430_timer6_addrs[] = { > - .pa_end = 0x4807e000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer6 */ > -@@ -729,7 +729,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer6 = { > - .slave = &omap2430_timer6_hwmod, > - .clk = "gpt6_ick", > - .addr = omap2430_timer6_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer6_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -771,6 +770,7 @@ static struct omap_hwmod_addr_space > omap2430_timer7_addrs[] = { > - .pa_end = 0x48080000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer7 */ > -@@ -779,7 +779,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer7 = { > - .slave = &omap2430_timer7_hwmod, > - .clk = "gpt7_ick", > - .addr = omap2430_timer7_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer7_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -821,6 +820,7 @@ static struct omap_hwmod_addr_space > omap2430_timer8_addrs[] = { > - .pa_end = 0x48082000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer8 */ > -@@ -829,7 +829,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer8 = { > - .slave = &omap2430_timer8_hwmod, > - .clk = "gpt8_ick", > - .addr = omap2430_timer8_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer8_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -871,6 +870,7 @@ static struct omap_hwmod_addr_space > omap2430_timer9_addrs[] = { > - .pa_end = 0x48084000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer9 */ > -@@ -879,7 +879,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer9 = { > - .slave = &omap2430_timer9_hwmod, > - .clk = "gpt9_ick", > - .addr = omap2430_timer9_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer9_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -921,6 +920,7 @@ static struct omap_hwmod_addr_space > omap2430_timer10_addrs[] = { > - .pa_end = 0x48086000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer10 */ > -@@ -929,7 +929,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer10 = { > - .slave = &omap2430_timer10_hwmod, > - .clk = "gpt10_ick", > - .addr = omap2430_timer10_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer10_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -971,6 +970,7 @@ static struct omap_hwmod_addr_space > omap2430_timer11_addrs[] = { > - .pa_end = 0x48088000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer11 */ > -@@ -979,7 +979,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer11 = { > - .slave = &omap2430_timer11_hwmod, > - .clk = "gpt11_ick", > - .addr = omap2430_timer11_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer11_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1021,6 +1020,7 @@ static struct omap_hwmod_addr_space > omap2430_timer12_addrs[] = { > - .pa_end = 0x4808a000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer12 */ > -@@ -1029,7 +1029,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__timer12 = { > - .slave = &omap2430_timer12_hwmod, > - .clk = "gpt12_ick", > - .addr = omap2430_timer12_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_timer12_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1066,6 +1065,7 @@ static struct omap_hwmod_addr_space > omap2430_wd_timer2_addrs[] = { > - .pa_end = 0x4901607f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { > -@@ -1073,7 +1073,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_wkup__wd_timer2 = { > - .slave = &omap2430_wd_timer2_hwmod, > - .clk = "mpu_wdt_ick", > - .addr = omap2430_wd_timer2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1284,6 +1283,7 @@ static struct omap_hwmod_addr_space > omap2430_dss_addrs[] = { > - .pa_end = 0x480503FF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss */ > -@@ -1292,7 +1292,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__dss = { > - .slave = &omap2430_dss_core_hwmod, > - .clk = "dss_ick", > - .addr = omap2430_dss_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_dss_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1362,6 +1361,7 @@ static struct omap_hwmod_addr_space > omap2430_dss_dispc_addrs[] = { > - .pa_end = 0x480507FF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_dispc */ > -@@ -1370,7 +1370,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__dss_dispc = { > - .slave = &omap2430_dss_dispc_hwmod, > - .clk = "dss_ick", > - .addr = omap2430_dss_dispc_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_dss_dispc_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1426,6 +1425,7 @@ static struct omap_hwmod_addr_space > omap2430_dss_rfbi_addrs[] = { > - .pa_end = 0x48050BFF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_rfbi */ > -@@ -1434,7 +1434,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__dss_rfbi = { > - .slave = &omap2430_dss_rfbi_hwmod, > - .clk = "dss_ick", > - .addr = omap2430_dss_rfbi_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_dss_rfbi_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1476,6 +1475,7 @@ static struct omap_hwmod_addr_space > omap2430_dss_venc_addrs[] = { > - .pa_end = 0x48050FFF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_venc */ > -@@ -1484,7 +1484,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__dss_venc = { > - .slave = &omap2430_dss_venc_hwmod, > - .clk = "dss_54m_fck", > - .addr = omap2430_dss_venc_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_dss_venc_addrs), > - .flags = OCPIF_SWSUP_IDLE, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > -@@ -1621,6 +1620,7 @@ static struct omap_hwmod_addr_space > omap2430_gpio1_addr_space[] = { > - .pa_end = 0x4900C1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { > -@@ -1628,7 +1628,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_wkup__gpio1 = { > - .slave = &omap2430_gpio1_hwmod, > - .clk = "gpios_ick", > - .addr = omap2430_gpio1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_gpio1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1639,6 +1638,7 @@ static struct omap_hwmod_addr_space > omap2430_gpio2_addr_space[] = { > - .pa_end = 0x4900E1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { > -@@ -1646,7 +1646,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_wkup__gpio2 = { > - .slave = &omap2430_gpio2_hwmod, > - .clk = "gpios_ick", > - .addr = omap2430_gpio2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_gpio2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1657,6 +1656,7 @@ static struct omap_hwmod_addr_space > omap2430_gpio3_addr_space[] = { > - .pa_end = 0x490101ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { > -@@ -1664,7 +1664,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_wkup__gpio3 = { > - .slave = &omap2430_gpio3_hwmod, > - .clk = "gpios_ick", > - .addr = omap2430_gpio3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_gpio3_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1675,6 +1674,7 @@ static struct omap_hwmod_addr_space > omap2430_gpio4_addr_space[] = { > - .pa_end = 0x490121ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { > -@@ -1682,7 +1682,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_wkup__gpio4 = { > - .slave = &omap2430_gpio4_hwmod, > - .clk = "gpios_ick", > - .addr = omap2430_gpio4_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_gpio4_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1693,6 +1692,7 @@ static struct omap_hwmod_addr_space > omap2430_gpio5_addr_space[] = { > - .pa_end = 0x480B61ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { > -@@ -1700,7 +1700,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__gpio5 = { > - .slave = &omap2430_gpio5_hwmod, > - .clk = "gpio5_ick", > - .addr = omap2430_gpio5_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap2430_gpio5_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1923,6 +1922,7 @@ static struct omap_hwmod_addr_space > omap2430_dma_system_addrs[] = { > - .pa_end = 0x48056fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* dma_system -> L3 */ > -@@ -1944,7 +1944,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__dma_system = { > - .slave = &omap2430_dma_system_hwmod, > - .clk = "sdma_ick", > - .addr = omap2430_dma_system_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2001,6 +2000,7 @@ static struct omap_hwmod_addr_space > omap2430_mailbox_addrs[] = { > - .pa_end = 0x480941ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - /* l4_core -> mailbox */ > -@@ -2008,7 +2008,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mailbox = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mailbox_hwmod, > - .addr = omap2430_mailbox_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_mailbox_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2287,6 +2286,7 @@ static struct omap_hwmod_addr_space > omap2430_mcbsp1_addrs[] = { > - .pa_end = 0x480740ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp1 */ > -@@ -2295,7 +2295,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mcbsp1 = { > - .slave = &omap2430_mcbsp1_hwmod, > - .clk = "mcbsp1_ick", > - .addr = omap2430_mcbsp1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2345,6 +2344,7 @@ static struct omap_hwmod_addr_space > omap2430_mcbsp2_addrs[] = { > - .pa_end = 0x480760ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp2 */ > -@@ -2353,7 +2353,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mcbsp2 = { > - .slave = &omap2430_mcbsp2_hwmod, > - .clk = "mcbsp2_ick", > - .addr = omap2430_mcbsp2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2403,6 +2402,7 @@ static struct omap_hwmod_addr_space > omap2430_mcbsp3_addrs[] = { > - .pa_end = 0x4808C0ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp3 */ > -@@ -2411,7 +2411,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mcbsp3 = { > - .slave = &omap2430_mcbsp3_hwmod, > - .clk = "mcbsp3_ick", > - .addr = omap2430_mcbsp3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2461,6 +2460,7 @@ static struct omap_hwmod_addr_space > omap2430_mcbsp4_addrs[] = { > - .pa_end = 0x4808E0ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp4 */ > -@@ -2469,7 +2469,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mcbsp4 = { > - .slave = &omap2430_mcbsp4_hwmod, > - .clk = "mcbsp4_ick", > - .addr = omap2430_mcbsp4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2519,6 +2518,7 @@ static struct omap_hwmod_addr_space > omap2430_mcbsp5_addrs[] = { > - .pa_end = 0x480960ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp5 */ > -@@ -2527,7 +2527,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mcbsp5 = { > - .slave = &omap2430_mcbsp5_hwmod, > - .clk = "mcbsp5_ick", > - .addr = omap2430_mcbsp5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 909a84d..6410779 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -1,7 +1,7 @@ > - /* > - * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx > chips > - * > -- * Copyright (C) 2009-2010 Nokia Corporation > -+ * Copyright (C) 2009-2011 Nokia Corporation > - * Paul Walmsley > - * > - * This program is free software; you can redistribute it and/or modify > -@@ -111,6 +111,7 @@ static struct omap_hwmod_addr_space > omap3xxx_l3_main_addrs[] = { > - .pa_end = 0x6800ffff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - /* MPU -> L3 interface */ > -@@ -118,7 +119,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_mpu__l3_main = { > - .master = &omap3xxx_mpu_hwmod, > - .slave = &omap3xxx_l3_main_hwmod, > - .addr = omap3xxx_l3_main_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_l3_main_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -196,6 +196,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mmc1_addr_space[] = { > - .pa_end = 0x4809c1ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { > -@@ -203,7 +204,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__mmc1 = { > - .slave = &omap3xxx_mmc1_hwmod, > - .clk = "mmchs1_ick", > - .addr = omap3xxx_mmc1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mmc1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - .flags = OMAP_FIREWALL_L4 > - }; > -@@ -215,6 +215,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mmc2_addr_space[] = { > - .pa_end = 0x480b41ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { > -@@ -222,7 +223,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__mmc2 = { > - .slave = &omap3xxx_mmc2_hwmod, > - .clk = "mmchs2_ick", > - .addr = omap3xxx_mmc2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mmc2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - .flags = OMAP_FIREWALL_L4 > - }; > -@@ -234,6 +234,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mmc3_addr_space[] = { > - .pa_end = 0x480ad1ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { > -@@ -241,7 +242,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__mmc3 = { > - .slave = &omap3xxx_mmc3_hwmod, > - .clk = "mmchs3_ick", > - .addr = omap3xxx_mmc3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mmc3_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - .flags = OMAP_FIREWALL_L4 > - }; > -@@ -253,6 +253,7 @@ static struct omap_hwmod_addr_space > omap3xxx_uart1_addr_space[] = { > - .pa_end = OMAP3_UART1_BASE + SZ_8K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { > -@@ -260,7 +261,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__uart1 = { > - .slave = &omap3xxx_uart1_hwmod, > - .clk = "uart1_ick", > - .addr = omap3xxx_uart1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_uart1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -271,6 +271,7 @@ static struct omap_hwmod_addr_space > omap3xxx_uart2_addr_space[] = { > - .pa_end = OMAP3_UART2_BASE + SZ_1K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { > -@@ -278,7 +279,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__uart2 = { > - .slave = &omap3xxx_uart2_hwmod, > - .clk = "uart2_ick", > - .addr = omap3xxx_uart2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_uart2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -289,6 +289,7 @@ static struct omap_hwmod_addr_space > omap3xxx_uart3_addr_space[] = { > - .pa_end = OMAP3_UART3_BASE + SZ_1K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { > -@@ -296,7 +297,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_per__uart3 = { > - .slave = &omap3xxx_uart3_hwmod, > - .clk = "uart3_ick", > - .addr = omap3xxx_uart3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_uart3_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -307,6 +307,7 @@ static struct omap_hwmod_addr_space > omap3xxx_uart4_addr_space[] = { > - .pa_end = OMAP3_UART4_BASE + SZ_1K - 1, > - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { > -@@ -314,7 +315,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_per__uart4 = { > - .slave = &omap3xxx_uart4_hwmod, > - .clk = "uart4_ick", > - .addr = omap3xxx_uart4_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_uart4_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -328,6 +328,7 @@ static struct omap_hwmod_addr_space > omap3xxx_i2c1_addr_space[] = { > - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN > - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { > -@@ -335,7 +336,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__i2c1 = { > - .slave = &omap3xxx_i2c1_hwmod, > - .clk = "i2c1_ick", > - .addr = omap3xxx_i2c1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_i2c1_addr_space), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_I2C1_REGION, > -@@ -353,6 +353,7 @@ static struct omap_hwmod_addr_space > omap3xxx_i2c2_addr_space[] = { > - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN > - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { > -@@ -360,7 +361,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__i2c2 = { > - .slave = &omap3xxx_i2c2_hwmod, > - .clk = "i2c2_ick", > - .addr = omap3xxx_i2c2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_i2c2_addr_space), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_I2C2_REGION, > -@@ -378,6 +378,7 @@ static struct omap_hwmod_addr_space > omap3xxx_i2c3_addr_space[] = { > - .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN > - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { > -@@ -385,7 +386,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__i2c3 = { > - .slave = &omap3xxx_i2c3_hwmod, > - .clk = "i2c3_ick", > - .addr = omap3xxx_i2c3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_i2c3_addr_space), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_I2C3_REGION, > -@@ -403,6 +403,7 @@ static struct omap_hwmod_addr_space > omap3_sr1_addr_space[] = { > - .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { > -@@ -410,7 +411,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__sr1 = { > - .slave = &omap34xx_sr1_hwmod, > - .clk = "sr_l4_ick", > - .addr = omap3_sr1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), > - .user = OCP_USER_MPU, > - }; > - > -@@ -421,6 +421,7 @@ static struct omap_hwmod_addr_space > omap3_sr2_addr_space[] = { > - .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { > -@@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__sr2 = { > - .slave = &omap34xx_sr2_hwmod, > - .clk = "sr_l4_ick", > - .addr = omap3_sr2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space), > - .user = OCP_USER_MPU, > - }; > - > -@@ -442,6 +442,7 @@ static struct omap_hwmod_addr_space > omap3xxx_usbhsotg_addrs[] = { > - .pa_end = OMAP34XX_HSUSB_OTG_BASE + > SZ_4K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> usbhsotg */ > -@@ -450,7 +451,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__usbhsotg = { > - .slave = &omap3xxx_usbhsotg_hwmod, > - .clk = "l4_ick", > - .addr = omap3xxx_usbhsotg_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -468,6 +468,7 @@ static struct omap_hwmod_addr_space > am35xx_usbhsotg_addrs[] = { > - .pa_end = AM35XX_IPSS_USBOTGSS_BASE + > SZ_4K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> usbhsotg */ > -@@ -476,7 +477,6 @@ static struct omap_hwmod_ocp_if > am35xx_l4_core__usbhsotg = { > - .slave = &am35xx_usbhsotg_hwmod, > - .clk = "l4_ick", > - .addr = am35xx_usbhsotg_addrs, > -- .addr_cnt = ARRAY_SIZE(am35xx_usbhsotg_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer1_addrs[] = { > - .pa_end = 0x48318000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_wkup -> timer1 */ > -@@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_wkup__timer1 = { > - .slave = &omap3xxx_timer1_hwmod, > - .clk = "gpt1_ick", > - .addr = omap3xxx_timer1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer2_addrs[] = { > - .pa_end = 0x49032000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer2 */ > -@@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__timer2 = { > - .slave = &omap3xxx_timer2_hwmod, > - .clk = "gpt2_ick", > - .addr = omap3xxx_timer2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer3_addrs[] = { > - .pa_end = 0x49034000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer3 */ > -@@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__timer3 = { > - .slave = &omap3xxx_timer3_hwmod, > - .clk = "gpt3_ick", > - .addr = omap3xxx_timer3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer4_addrs[] = { > - .pa_end = 0x49036000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer4 */ > -@@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__timer4 = { > - .slave = &omap3xxx_timer4_hwmod, > - .clk = "gpt4_ick", > - .addr = omap3xxx_timer4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer5_addrs[] = { > - .pa_end = 0x49038000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer5 */ > -@@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__timer5 = { > - .slave = &omap3xxx_timer5_hwmod, > - .clk = "gpt5_ick", > - .addr = omap3xxx_timer5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer5_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer6_addrs[] = { > - .pa_end = 0x4903A000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer6 */ > -@@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__timer6 = { > - .slave = &omap3xxx_timer6_hwmod, > - .clk = "gpt6_ick", > - .addr = omap3xxx_timer6_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer6_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer7_addrs[] = { > - .pa_end = 0x4903C000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer7 */ > -@@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__timer7 = { > - .slave = &omap3xxx_timer7_hwmod, > - .clk = "gpt7_ick", > - .addr = omap3xxx_timer7_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer7_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -971,6 +971,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer8_addrs[] = { > - .pa_end = 0x4903E000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer8 */ > -@@ -979,7 +980,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__timer8 = { > - .slave = &omap3xxx_timer8_hwmod, > - .clk = "gpt8_ick", > - .addr = omap3xxx_timer8_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer8_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1021,6 +1021,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer9_addrs[] = { > - .pa_end = 0x49040000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer9 */ > -@@ -1029,7 +1030,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__timer9 = { > - .slave = &omap3xxx_timer9_hwmod, > - .clk = "gpt9_ick", > - .addr = omap3xxx_timer9_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer9_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1071,6 +1071,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer10_addrs[] = { > - .pa_end = 0x48086000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer10 */ > -@@ -1079,7 +1080,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__timer10 = { > - .slave = &omap3xxx_timer10_hwmod, > - .clk = "gpt10_ick", > - .addr = omap3xxx_timer10_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer10_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1121,6 +1121,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer11_addrs[] = { > - .pa_end = 0x48088000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer11 */ > -@@ -1129,7 +1130,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__timer11 = { > - .slave = &omap3xxx_timer11_hwmod, > - .clk = "gpt11_ick", > - .addr = omap3xxx_timer11_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer11_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1171,6 +1171,7 @@ static struct omap_hwmod_addr_space > omap3xxx_timer12_addrs[] = { > - .pa_end = 0x48304000 + SZ_1K - 1, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> timer12 */ > -@@ -1179,7 +1180,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__timer12 = { > - .slave = &omap3xxx_timer12_hwmod, > - .clk = "gpt12_ick", > - .addr = omap3xxx_timer12_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_timer12_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1216,6 +1216,7 @@ static struct omap_hwmod_addr_space > omap3xxx_wd_timer2_addrs[] = { > - .pa_end = 0x4831407f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { > -@@ -1223,7 +1224,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_wkup__wd_timer2 = { > - .slave = &omap3xxx_wd_timer2_hwmod, > - .clk = "wdt2_ick", > - .addr = omap3xxx_wd_timer2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space > omap3xxx_dss_addrs[] = { > - .pa_end = 0x480503FF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss */ > -@@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if > omap3430es1_l4_core__dss = { > - .slave = &omap3430es1_dss_core_hwmod, > - .clk = "dss_ick", > - .addr = omap3xxx_dss_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, > -@@ -1521,7 +1521,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__dss = { > - .slave = &omap3xxx_dss_core_hwmod, > - .clk = "dss_ick", > - .addr = omap3xxx_dss_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_CORE_REGION, > -@@ -1632,6 +1631,7 @@ static struct omap_hwmod_addr_space > omap3xxx_dss_dispc_addrs[] = { > - .pa_end = 0x480507FF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_dispc */ > -@@ -1640,7 +1640,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__dss_dispc = { > - .slave = &omap3xxx_dss_dispc_hwmod, > - .clk = "dss_ick", > - .addr = omap3xxx_dss_dispc_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_DISPC_REGION, > -@@ -1697,6 +1696,7 @@ static struct omap_hwmod_addr_space > omap3xxx_dss_dsi1_addrs[] = { > - .pa_end = 0x4804FFFF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_dsi1 */ > -@@ -1704,7 +1704,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__dss_dsi1 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_dss_dsi1_hwmod, > - .addr = omap3xxx_dss_dsi1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_DSI_REGION, > -@@ -1767,6 +1766,7 @@ static struct omap_hwmod_addr_space > omap3xxx_dss_rfbi_addrs[] = { > - .pa_end = 0x48050BFF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_rfbi */ > -@@ -1775,7 +1775,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__dss_rfbi = { > - .slave = &omap3xxx_dss_rfbi_hwmod, > - .clk = "dss_ick", > - .addr = omap3xxx_dss_rfbi_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_RFBI_REGION, > -@@ -1826,6 +1825,7 @@ static struct omap_hwmod_addr_space > omap3xxx_dss_venc_addrs[] = { > - .pa_end = 0x48050FFF, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> dss_venc */ > -@@ -1834,7 +1834,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__dss_venc = { > - .slave = &omap3xxx_dss_venc_hwmod, > - .clk = "dss_tv_fck", > - .addr = omap3xxx_dss_venc_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_dss_venc_addrs), > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_VENC_REGION, > -@@ -2003,13 +2002,13 @@ static struct omap_hwmod_addr_space > omap3xxx_gpio1_addrs[] = { > - .pa_end = 0x483101ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = { > - .master = &omap3xxx_l4_wkup_hwmod, > - .slave = &omap3xxx_gpio1_hwmod, > - .addr = omap3xxx_gpio1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2020,13 +2019,13 @@ static struct omap_hwmod_addr_space > omap3xxx_gpio2_addrs[] = { > - .pa_end = 0x490501ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = { > - .master = &omap3xxx_l4_per_hwmod, > - .slave = &omap3xxx_gpio2_hwmod, > - .addr = omap3xxx_gpio2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2037,13 +2036,13 @@ static struct omap_hwmod_addr_space > omap3xxx_gpio3_addrs[] = { > - .pa_end = 0x490521ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = { > - .master = &omap3xxx_l4_per_hwmod, > - .slave = &omap3xxx_gpio3_hwmod, > - .addr = omap3xxx_gpio3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2054,13 +2053,13 @@ static struct omap_hwmod_addr_space > omap3xxx_gpio4_addrs[] = { > - .pa_end = 0x490541ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = { > - .master = &omap3xxx_l4_per_hwmod, > - .slave = &omap3xxx_gpio4_hwmod, > - .addr = omap3xxx_gpio4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2071,13 +2070,13 @@ static struct omap_hwmod_addr_space > omap3xxx_gpio5_addrs[] = { > - .pa_end = 0x490561ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = { > - .master = &omap3xxx_l4_per_hwmod, > - .slave = &omap3xxx_gpio5_hwmod, > - .addr = omap3xxx_gpio5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio5_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2088,13 +2087,13 @@ static struct omap_hwmod_addr_space > omap3xxx_gpio6_addrs[] = { > - .pa_end = 0x490581ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = { > - .master = &omap3xxx_l4_per_hwmod, > - .slave = &omap3xxx_gpio6_hwmod, > - .addr = omap3xxx_gpio6_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_gpio6_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2395,6 +2394,7 @@ static struct omap_hwmod_addr_space > omap3xxx_dma_system_addrs[] = { > - .pa_end = 0x48056fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* dma_system master ports */ > -@@ -2408,7 +2408,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__dma_system = { > - .slave = &omap3xxx_dma_system_hwmod, > - .clk = "core_l4_ick", > - .addr = omap3xxx_dma_system_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2480,6 +2479,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mcbsp1_addrs[] = { > - .pa_end = 0x480740ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp1 */ > -@@ -2488,7 +2488,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__mcbsp1 = { > - .slave = &omap3xxx_mcbsp1_hwmod, > - .clk = "mcbsp1_ick", > - .addr = omap3xxx_mcbsp1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2538,6 +2537,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mcbsp2_addrs[] = { > - .pa_end = 0x490220ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcbsp2 */ > -@@ -2546,7 +2546,7 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__mcbsp2 = { > - .slave = &omap3xxx_mcbsp2_hwmod, > - .clk = "mcbsp2_ick", > - .addr = omap3xxx_mcbsp2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_addrs), > -+ > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2601,6 +2601,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mcbsp3_addrs[] = { > - .pa_end = 0x490240ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcbsp3 */ > -@@ -2609,7 +2610,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__mcbsp3 = { > - .slave = &omap3xxx_mcbsp3_hwmod, > - .clk = "mcbsp3_ick", > - .addr = omap3xxx_mcbsp3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mcbsp4_addrs[] = { > - .pa_end = 0x490260ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcbsp4 */ > -@@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__mcbsp4 = { > - .slave = &omap3xxx_mcbsp4_hwmod, > - .clk = "mcbsp4_ick", > - .addr = omap3xxx_mcbsp4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2722,6 +2722,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mcbsp5_addrs[] = { > - .pa_end = 0x480960ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_core -> mcbsp5 */ > -@@ -2730,7 +2731,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__mcbsp5 = { > - .slave = &omap3xxx_mcbsp5_hwmod, > - .clk = "mcbsp5_ick", > - .addr = omap3xxx_mcbsp5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2785,6 +2785,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mcbsp2_sidetone_addrs[] = { > - .pa_end = 0x490280ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcbsp2_sidetone */ > -@@ -2793,7 +2794,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__mcbsp2_sidetone = { > - .slave = &omap3xxx_mcbsp2_sidetone_hwmod, > - .clk = "mcbsp2_ick", > - .addr = omap3xxx_mcbsp2_sidetone_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -2834,6 +2834,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mcbsp3_sidetone_addrs[] = { > - .pa_end = 0x4902A0ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcbsp3_sidetone */ > -@@ -2842,7 +2843,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__mcbsp3_sidetone = { > - .slave = &omap3xxx_mcbsp3_sidetone_hwmod, > - .clk = "mcbsp3_ick", > - .addr = omap3xxx_mcbsp3_sidetone_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -3033,6 +3033,7 @@ static struct omap_hwmod_addr_space > omap3xxx_mailbox_addrs[] = { > - .pa_end = 0x480941ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - /* l4_core -> mailbox */ > -@@ -3040,7 +3041,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__mailbox = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_mailbox_hwmod, > - .addr = omap3xxx_mailbox_addrs, > -- .addr_cnt = ARRAY_SIZE(omap3xxx_mailbox_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3076,6 +3076,7 @@ static struct omap_hwmod_addr_space > omap34xx_mcspi1_addr_space[] = { > - .pa_end = 0x480980ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { > -@@ -3083,7 +3084,6 @@ static struct omap_hwmod_ocp_if > omap34xx_l4_core__mcspi1 = { > - .slave = &omap34xx_mcspi1, > - .clk = "mcspi1_ick", > - .addr = omap34xx_mcspi1_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap34xx_mcspi1_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3094,6 +3094,7 @@ static struct omap_hwmod_addr_space > omap34xx_mcspi2_addr_space[] = { > - .pa_end = 0x4809a0ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { > -@@ -3101,7 +3102,6 @@ static struct omap_hwmod_ocp_if > omap34xx_l4_core__mcspi2 = { > - .slave = &omap34xx_mcspi2, > - .clk = "mcspi2_ick", > - .addr = omap34xx_mcspi2_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap34xx_mcspi2_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3112,6 +3112,7 @@ static struct omap_hwmod_addr_space > omap34xx_mcspi3_addr_space[] = { > - .pa_end = 0x480b80ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { > -@@ -3119,7 +3120,6 @@ static struct omap_hwmod_ocp_if > omap34xx_l4_core__mcspi3 = { > - .slave = &omap34xx_mcspi3, > - .clk = "mcspi3_ick", > - .addr = omap34xx_mcspi3_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap34xx_mcspi3_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3130,6 +3130,7 @@ static struct omap_hwmod_addr_space > omap34xx_mcspi4_addr_space[] = { > - .pa_end = 0x480ba0ff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { > -@@ -3137,7 +3138,6 @@ static struct omap_hwmod_ocp_if > omap34xx_l4_core__mcspi4 = { > - .slave = &omap34xx_mcspi4, > - .clk = "mcspi4_ick", > - .addr = omap34xx_mcspi4_addr_space, > -- .addr_cnt = ARRAY_SIZE(omap34xx_mcspi4_addr_space), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 8cbbfbf..f8ccc4a 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -95,6 +95,7 @@ static struct omap_hwmod_addr_space > omap44xx_dmm_addrs[] = { > - .pa_end = 0x4e0007ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* mpu -> dmm */ > -@@ -103,7 +104,6 @@ static struct omap_hwmod_ocp_if > omap44xx_mpu__dmm = { > - .slave = &omap44xx_dmm_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_dmm_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dmm_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -150,6 +150,7 @@ static struct omap_hwmod_addr_space > omap44xx_emif_fw_addrs[] = { > - .pa_end = 0x4a20c0ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> emif_fw */ > -@@ -158,7 +159,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__emif_fw = { > - .slave = &omap44xx_emif_fw_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_emif_fw_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_emif_fw_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -276,6 +276,7 @@ static struct omap_hwmod_addr_space > omap44xx_l3_main_1_addrs[] = { > - .pa_end = 0x44000fff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - /* mpu -> l3_main_1 */ > -@@ -284,7 +285,6 @@ static struct omap_hwmod_ocp_if > omap44xx_mpu__l3_main_1 = { > - .slave = &omap44xx_l3_main_1_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_l3_main_1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -356,6 +356,7 @@ static struct omap_hwmod_addr_space > omap44xx_l3_main_2_addrs[] = { > - .pa_end = 0x44801fff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - /* l3_main_1 -> l3_main_2 */ > -@@ -364,7 +365,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_1__l3_main_2 = { > - .slave = &omap44xx_l3_main_2_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_l3_main_2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -411,6 +411,7 @@ static struct omap_hwmod_addr_space > omap44xx_l3_main_3_addrs[] = { > - .pa_end = 0x45000fff, > - .flags = ADDR_TYPE_RT, > - }, > -+ { } > - }; > - > - /* l3_main_1 -> l3_main_3 */ > -@@ -419,7 +420,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_1__l3_main_3 = { > - .slave = &omap44xx_l3_main_3_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_l3_main_3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -697,6 +697,7 @@ static struct omap_hwmod_addr_space > omap44xx_aess_addrs[] = { > - .pa_end = 0x401f13ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> aess */ > -@@ -705,7 +706,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__aess = { > - .slave = &omap44xx_aess_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_aess_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_aess_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -715,6 +715,7 @@ static struct omap_hwmod_addr_space > omap44xx_aess_dma_addrs[] = { > - .pa_end = 0x490f13ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> aess (dma) */ > -@@ -723,7 +724,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__aess_dma = { > - .slave = &omap44xx_aess_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_aess_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_aess_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -807,6 +807,7 @@ static struct omap_hwmod_addr_space > omap44xx_counter_32k_addrs[] = { > - .pa_end = 0x4a30401f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_wkup -> counter_32k */ > -@@ -815,7 +816,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_wkup__counter_32k = { > - .slave = &omap44xx_counter_32k_hwmod, > - .clk = "l4_wkup_clk_mux_ck", > - .addr = omap44xx_counter_32k_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_counter_32k_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -889,6 +889,7 @@ static struct omap_hwmod_addr_space > omap44xx_dma_system_addrs[] = { > - .pa_end = 0x4a056fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> dma_system */ > -@@ -897,7 +898,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__dma_system = { > - .slave = &omap44xx_dma_system_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_dma_system_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dma_system_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -961,6 +961,7 @@ static struct omap_hwmod_addr_space > omap44xx_dmic_addrs[] = { > - .pa_end = 0x4012e07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> dmic */ > -@@ -969,7 +970,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__dmic = { > - .slave = &omap44xx_dmic_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_dmic_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dmic_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -979,6 +979,7 @@ static struct omap_hwmod_addr_space > omap44xx_dmic_dma_addrs[] = { > - .pa_end = 0x4902e07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> dmic (dma) */ > -@@ -987,7 +988,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__dmic_dma = { > - .slave = &omap44xx_dmic_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_dmic_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dmic_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -1128,6 +1128,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dma_addrs[] = { > - .pa_end = 0x5800007f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> dss */ > -@@ -1136,7 +1137,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__dss = { > - .slave = &omap44xx_dss_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_dss_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -1146,6 +1146,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_addrs[] = { > - .pa_end = 0x4804007f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> dss */ > -@@ -1154,7 +1155,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__dss = { > - .slave = &omap44xx_dss_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_dss_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -1228,6 +1228,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dispc_dma_addrs[] = { > - .pa_end = 0x58001fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> dss_dispc */ > -@@ -1236,7 +1237,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__dss_dispc = { > - .slave = &omap44xx_dss_dispc_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_dss_dispc_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -1246,6 +1246,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dispc_addrs[] = { > - .pa_end = 0x48041fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> dss_dispc */ > -@@ -1254,7 +1255,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__dss_dispc = { > - .slave = &omap44xx_dss_dispc_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_dss_dispc_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -1319,6 +1319,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dsi1_dma_addrs[] = { > - .pa_end = 0x580041ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> dss_dsi1 */ > -@@ -1327,7 +1328,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__dss_dsi1 = { > - .slave = &omap44xx_dss_dsi1_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_dss_dsi1_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -1337,6 +1337,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dsi1_addrs[] = { > - .pa_end = 0x480441ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> dss_dsi1 */ > -@@ -1345,7 +1346,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__dss_dsi1 = { > - .slave = &omap44xx_dss_dsi1_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_dss_dsi1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -1389,6 +1389,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dsi2_dma_addrs[] = { > - .pa_end = 0x580051ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> dss_dsi2 */ > -@@ -1397,7 +1398,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__dss_dsi2 = { > - .slave = &omap44xx_dss_dsi2_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_dss_dsi2_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -1407,6 +1407,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dsi2_addrs[] = { > - .pa_end = 0x480451ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> dss_dsi2 */ > -@@ -1415,7 +1416,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__dss_dsi2 = { > - .slave = &omap44xx_dss_dsi2_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_dss_dsi2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -1479,6 +1479,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_hdmi_dma_addrs[] = { > - .pa_end = 0x58006fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> dss_hdmi */ > -@@ -1487,7 +1488,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__dss_hdmi = { > - .slave = &omap44xx_dss_hdmi_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_dss_hdmi_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_hdmi_addrs[] = { > - .pa_end = 0x48046fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> dss_hdmi */ > -@@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__dss_hdmi = { > - .slave = &omap44xx_dss_hdmi_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_dss_hdmi_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -1565,6 +1565,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_rfbi_dma_addrs[] = { > - .pa_end = 0x580020ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> dss_rfbi */ > -@@ -1573,7 +1574,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__dss_rfbi = { > - .slave = &omap44xx_dss_rfbi_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_dss_rfbi_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -1583,6 +1583,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_rfbi_addrs[] = { > - .pa_end = 0x480420ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> dss_rfbi */ > -@@ -1591,7 +1592,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__dss_rfbi = { > - .slave = &omap44xx_dss_rfbi_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_dss_rfbi_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -1634,6 +1634,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_venc_dma_addrs[] = { > - .pa_end = 0x580030ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> dss_venc */ > -@@ -1642,7 +1643,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__dss_venc = { > - .slave = &omap44xx_dss_venc_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_dss_venc_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -1652,6 +1652,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_venc_addrs[] = { > - .pa_end = 0x480430ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> dss_venc */ > -@@ -1660,7 +1661,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__dss_venc = { > - .slave = &omap44xx_dss_venc_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_dss_venc_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -1725,6 +1725,7 @@ static struct omap_hwmod_addr_space > omap44xx_gpio1_addrs[] = { > - .pa_end = 0x4a3101ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_wkup -> gpio1 */ > -@@ -1733,7 +1734,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_wkup__gpio1 = { > - .slave = &omap44xx_gpio1_hwmod, > - .clk = "l4_wkup_clk_mux_ck", > - .addr = omap44xx_gpio1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1777,6 +1777,7 @@ static struct omap_hwmod_addr_space > omap44xx_gpio2_addrs[] = { > - .pa_end = 0x480551ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> gpio2 */ > -@@ -1785,7 +1786,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__gpio2 = { > - .slave = &omap44xx_gpio2_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_gpio2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1830,6 +1830,7 @@ static struct omap_hwmod_addr_space > omap44xx_gpio3_addrs[] = { > - .pa_end = 0x480571ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> gpio3 */ > -@@ -1838,7 +1839,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__gpio3 = { > - .slave = &omap44xx_gpio3_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_gpio3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1883,6 +1883,7 @@ static struct omap_hwmod_addr_space > omap44xx_gpio4_addrs[] = { > - .pa_end = 0x480591ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> gpio4 */ > -@@ -1891,7 +1892,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__gpio4 = { > - .slave = &omap44xx_gpio4_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_gpio4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1936,6 +1936,7 @@ static struct omap_hwmod_addr_space > omap44xx_gpio5_addrs[] = { > - .pa_end = 0x4805b1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> gpio5 */ > -@@ -1944,7 +1945,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__gpio5 = { > - .slave = &omap44xx_gpio5_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_gpio5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio5_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1989,6 +1989,7 @@ static struct omap_hwmod_addr_space > omap44xx_gpio6_addrs[] = { > - .pa_end = 0x4805d1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> gpio6 */ > -@@ -1997,7 +1998,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__gpio6 = { > - .slave = &omap44xx_gpio6_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_gpio6_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_gpio6_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2072,6 +2072,7 @@ static struct omap_hwmod_addr_space > omap44xx_hsi_addrs[] = { > - .pa_end = 0x4a05bfff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> hsi */ > -@@ -2080,7 +2081,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__hsi = { > - .slave = &omap44xx_hsi_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_hsi_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_hsi_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2145,6 +2145,7 @@ static struct omap_hwmod_addr_space > omap44xx_i2c1_addrs[] = { > - .pa_end = 0x480700ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> i2c1 */ > -@@ -2153,7 +2154,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__i2c1 = { > - .slave = &omap44xx_i2c1_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_i2c1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_i2c1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2198,6 +2198,7 @@ static struct omap_hwmod_addr_space > omap44xx_i2c2_addrs[] = { > - .pa_end = 0x480720ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> i2c2 */ > -@@ -2206,7 +2207,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__i2c2 = { > - .slave = &omap44xx_i2c2_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_i2c2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_i2c2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2251,6 +2251,7 @@ static struct omap_hwmod_addr_space > omap44xx_i2c3_addrs[] = { > - .pa_end = 0x480600ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> i2c3 */ > -@@ -2259,7 +2260,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__i2c3 = { > - .slave = &omap44xx_i2c3_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_i2c3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_i2c3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2304,6 +2304,7 @@ static struct omap_hwmod_addr_space > omap44xx_i2c4_addrs[] = { > - .pa_end = 0x483500ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> i2c4 */ > -@@ -2312,7 +2313,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__i2c4 = { > - .slave = &omap44xx_i2c4_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_i2c4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_i2c4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2479,6 +2479,7 @@ static struct omap_hwmod_addr_space > omap44xx_iss_addrs[] = { > - .pa_end = 0x520000ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> iss */ > -@@ -2487,7 +2488,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__iss = { > - .slave = &omap44xx_iss_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_iss_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_iss_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2562,6 +2562,7 @@ static struct omap_hwmod_addr_space > omap44xx_iva_addrs[] = { > - .pa_end = 0x5a07ffff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l3_main_2 -> iva */ > -@@ -2570,7 +2571,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_2__iva = { > - .slave = &omap44xx_iva_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_iva_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_iva_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -2665,6 +2665,7 @@ static struct omap_hwmod_addr_space > omap44xx_kbd_addrs[] = { > - .pa_end = 0x4a31c07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_wkup -> kbd */ > -@@ -2673,7 +2674,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_wkup__kbd = { > - .slave = &omap44xx_kbd_hwmod, > - .clk = "l4_wkup_clk_mux_ck", > - .addr = omap44xx_kbd_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_kbd_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2730,6 +2730,7 @@ static struct omap_hwmod_addr_space > omap44xx_mailbox_addrs[] = { > - .pa_end = 0x4a0f41ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> mailbox */ > -@@ -2738,7 +2739,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__mailbox = { > - .slave = &omap44xx_mailbox_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mailbox_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mailbox_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2799,6 +2799,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcbsp1_addrs[] = { > - .pa_end = 0x401220ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> mcbsp1 */ > -@@ -2807,7 +2808,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__mcbsp1 = { > - .slave = &omap44xx_mcbsp1_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_mcbsp1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -2818,6 +2818,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcbsp1_dma_addrs[] = { > - .pa_end = 0x490220ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> mcbsp1 (dma) */ > -@@ -2826,7 +2827,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__mcbsp1_dma = { > - .slave = &omap44xx_mcbsp1_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_mcbsp1_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -2872,6 +2872,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcbsp2_addrs[] = { > - .pa_end = 0x401240ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> mcbsp2 */ > -@@ -2880,7 +2881,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__mcbsp2 = { > - .slave = &omap44xx_mcbsp2_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_mcbsp2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -2891,6 +2891,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcbsp2_dma_addrs[] = { > - .pa_end = 0x490240ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> mcbsp2 (dma) */ > -@@ -2899,7 +2900,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__mcbsp2_dma = { > - .slave = &omap44xx_mcbsp2_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_mcbsp2_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -2945,6 +2945,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcbsp3_addrs[] = { > - .pa_end = 0x401260ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> mcbsp3 */ > -@@ -2953,7 +2954,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__mcbsp3 = { > - .slave = &omap44xx_mcbsp3_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_mcbsp3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -2964,6 +2964,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcbsp3_dma_addrs[] = { > - .pa_end = 0x490260ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> mcbsp3 (dma) */ > -@@ -2972,7 +2973,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__mcbsp3_dma = { > - .slave = &omap44xx_mcbsp3_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_mcbsp3_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -3017,6 +3017,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcbsp4_addrs[] = { > - .pa_end = 0x480960ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcbsp4 */ > -@@ -3025,7 +3026,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mcbsp4 = { > - .slave = &omap44xx_mcbsp4_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mcbsp4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3090,6 +3090,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcpdm_addrs[] = { > - .pa_end = 0x4013207f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> mcpdm */ > -@@ -3098,7 +3099,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__mcpdm = { > - .slave = &omap44xx_mcpdm_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_mcpdm_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -3108,6 +3108,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcpdm_dma_addrs[] = { > - .pa_end = 0x4903207f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> mcpdm (dma) */ > -@@ -3116,7 +3117,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__mcpdm_dma = { > - .slave = &omap44xx_mcpdm_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_mcpdm_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -3189,6 +3189,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcspi1_addrs[] = { > - .pa_end = 0x480981ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcspi1 */ > -@@ -3197,7 +3198,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mcspi1 = { > - .slave = &omap44xx_mcspi1_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mcspi1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcspi1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3249,6 +3249,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcspi2_addrs[] = { > - .pa_end = 0x4809a1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcspi2 */ > -@@ -3257,7 +3258,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mcspi2 = { > - .slave = &omap44xx_mcspi2_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mcspi2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcspi2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3309,6 +3309,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcspi3_addrs[] = { > - .pa_end = 0x480b81ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcspi3 */ > -@@ -3317,7 +3318,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mcspi3 = { > - .slave = &omap44xx_mcspi3_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mcspi3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcspi3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3367,6 +3367,7 @@ static struct omap_hwmod_addr_space > omap44xx_mcspi4_addrs[] = { > - .pa_end = 0x480ba1ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mcspi4 */ > -@@ -3375,7 +3376,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mcspi4 = { > - .slave = &omap44xx_mcspi4_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mcspi4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mcspi4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3452,6 +3452,7 @@ static struct omap_hwmod_addr_space > omap44xx_mmc1_addrs[] = { > - .pa_end = 0x4809c3ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mmc1 */ > -@@ -3460,7 +3461,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mmc1 = { > - .slave = &omap44xx_mmc1_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mmc1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3516,6 +3516,7 @@ static struct omap_hwmod_addr_space > omap44xx_mmc2_addrs[] = { > - .pa_end = 0x480b43ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mmc2 */ > -@@ -3524,7 +3525,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mmc2 = { > - .slave = &omap44xx_mmc2_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mmc2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3570,6 +3570,7 @@ static struct omap_hwmod_addr_space > omap44xx_mmc3_addrs[] = { > - .pa_end = 0x480ad3ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mmc3 */ > -@@ -3578,7 +3579,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mmc3 = { > - .slave = &omap44xx_mmc3_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mmc3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3622,6 +3622,7 @@ static struct omap_hwmod_addr_space > omap44xx_mmc4_addrs[] = { > - .pa_end = 0x480d13ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mmc4 */ > -@@ -3630,7 +3631,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mmc4 = { > - .slave = &omap44xx_mmc4_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mmc4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3674,6 +3674,7 @@ static struct omap_hwmod_addr_space > omap44xx_mmc5_addrs[] = { > - .pa_end = 0x480d53ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> mmc5 */ > -@@ -3682,7 +3683,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__mmc5 = { > - .slave = &omap44xx_mmc5_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_mmc5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_mmc5_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3787,6 +3787,7 @@ static struct omap_hwmod_addr_space > omap44xx_smartreflex_core_addrs[] = { > - .pa_end = 0x4a0dd03f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> smartreflex_core */ > -@@ -3795,7 +3796,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__smartreflex_core = { > - .slave = &omap44xx_smartreflex_core_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_smartreflex_core_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3833,6 +3833,7 @@ static struct omap_hwmod_addr_space > omap44xx_smartreflex_iva_addrs[] = { > - .pa_end = 0x4a0db03f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> smartreflex_iva */ > -@@ -3841,7 +3842,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__smartreflex_iva = { > - .slave = &omap44xx_smartreflex_iva_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_smartreflex_iva_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3879,6 +3879,7 @@ static struct omap_hwmod_addr_space > omap44xx_smartreflex_mpu_addrs[] = { > - .pa_end = 0x4a0d903f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> smartreflex_mpu */ > -@@ -3887,7 +3888,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__smartreflex_mpu = { > - .slave = &omap44xx_smartreflex_mpu_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_smartreflex_mpu_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -3944,6 +3944,7 @@ static struct omap_hwmod_addr_space > omap44xx_spinlock_addrs[] = { > - .pa_end = 0x4a0f6fff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> spinlock */ > -@@ -3952,7 +3953,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__spinlock = { > - .slave = &omap44xx_spinlock_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_spinlock_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_spinlock_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4024,6 +4024,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer1_addrs[] = { > - .pa_end = 0x4a31807f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_wkup -> timer1 */ > -@@ -4032,7 +4033,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_wkup__timer1 = { > - .slave = &omap44xx_timer1_hwmod, > - .clk = "l4_wkup_clk_mux_ck", > - .addr = omap44xx_timer1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4069,6 +4069,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer2_addrs[] = { > - .pa_end = 0x4803207f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer2 */ > -@@ -4077,7 +4078,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__timer2 = { > - .slave = &omap44xx_timer2_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_timer2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4114,6 +4114,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer3_addrs[] = { > - .pa_end = 0x4803407f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer3 */ > -@@ -4122,7 +4123,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__timer3 = { > - .slave = &omap44xx_timer3_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_timer3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4159,6 +4159,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer4_addrs[] = { > - .pa_end = 0x4803607f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer4 */ > -@@ -4167,7 +4168,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__timer4 = { > - .slave = &omap44xx_timer4_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_timer4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4204,6 +4204,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer5_addrs[] = { > - .pa_end = 0x4013807f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> timer5 */ > -@@ -4212,7 +4213,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__timer5 = { > - .slave = &omap44xx_timer5_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_timer5_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer5_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -4222,6 +4222,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer5_dma_addrs[] = { > - .pa_end = 0x4903807f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> timer5 (dma) */ > -@@ -4230,7 +4231,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__timer5_dma = { > - .slave = &omap44xx_timer5_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_timer5_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer5_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -4268,6 +4268,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer6_addrs[] = { > - .pa_end = 0x4013a07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> timer6 */ > -@@ -4276,7 +4277,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__timer6 = { > - .slave = &omap44xx_timer6_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_timer6_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer6_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -4286,6 +4286,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer6_dma_addrs[] = { > - .pa_end = 0x4903a07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> timer6 (dma) */ > -@@ -4294,7 +4295,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__timer6_dma = { > - .slave = &omap44xx_timer6_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_timer6_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer6_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -4332,6 +4332,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer7_addrs[] = { > - .pa_end = 0x4013c07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> timer7 */ > -@@ -4340,7 +4341,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__timer7 = { > - .slave = &omap44xx_timer7_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_timer7_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer7_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -4350,6 +4350,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer7_dma_addrs[] = { > - .pa_end = 0x4903c07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> timer7 (dma) */ > -@@ -4358,7 +4359,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__timer7_dma = { > - .slave = &omap44xx_timer7_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_timer7_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer7_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -4396,6 +4396,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer8_addrs[] = { > - .pa_end = 0x4013e07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> timer8 */ > -@@ -4404,7 +4405,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__timer8 = { > - .slave = &omap44xx_timer8_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_timer8_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer8_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -4414,6 +4414,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer8_dma_addrs[] = { > - .pa_end = 0x4903e07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> timer8 (dma) */ > -@@ -4422,7 +4423,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__timer8_dma = { > - .slave = &omap44xx_timer8_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_timer8_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer8_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -@@ -4460,6 +4460,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer9_addrs[] = { > - .pa_end = 0x4803e07f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer9 */ > -@@ -4468,7 +4469,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__timer9 = { > - .slave = &omap44xx_timer9_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_timer9_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer9_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4505,6 +4505,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer10_addrs[] = { > - .pa_end = 0x4808607f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer10 */ > -@@ -4513,7 +4514,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__timer10 = { > - .slave = &omap44xx_timer10_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_timer10_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer10_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4550,6 +4550,7 @@ static struct omap_hwmod_addr_space > omap44xx_timer11_addrs[] = { > - .pa_end = 0x4808807f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> timer11 */ > -@@ -4558,7 +4559,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__timer11 = { > - .slave = &omap44xx_timer11_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_timer11_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_timer11_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4622,6 +4622,7 @@ static struct omap_hwmod_addr_space > omap44xx_uart1_addrs[] = { > - .pa_end = 0x4806a0ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> uart1 */ > -@@ -4630,7 +4631,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__uart1 = { > - .slave = &omap44xx_uart1_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_uart1_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_uart1_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4674,6 +4674,7 @@ static struct omap_hwmod_addr_space > omap44xx_uart2_addrs[] = { > - .pa_end = 0x4806c0ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> uart2 */ > -@@ -4682,7 +4683,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__uart2 = { > - .slave = &omap44xx_uart2_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_uart2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_uart2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4726,6 +4726,7 @@ static struct omap_hwmod_addr_space > omap44xx_uart3_addrs[] = { > - .pa_end = 0x480200ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> uart3 */ > -@@ -4734,7 +4735,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__uart3 = { > - .slave = &omap44xx_uart3_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_uart3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_uart3_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4779,6 +4779,7 @@ static struct omap_hwmod_addr_space > omap44xx_uart4_addrs[] = { > - .pa_end = 0x4806e0ff, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_per -> uart4 */ > -@@ -4787,7 +4788,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_per__uart4 = { > - .slave = &omap44xx_uart4_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_uart4_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_uart4_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4854,6 +4854,7 @@ static struct omap_hwmod_addr_space > omap44xx_usb_otg_hs_addrs[] = { > - .pa_end = 0x4a0ab003, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_cfg -> usb_otg_hs */ > -@@ -4862,7 +4863,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_cfg__usb_otg_hs = { > - .slave = &omap44xx_usb_otg_hs_hwmod, > - .clk = "l4_div_ck", > - .addr = omap44xx_usb_otg_hs_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4931,6 +4931,7 @@ static struct omap_hwmod_addr_space > omap44xx_wd_timer2_addrs[] = { > - .pa_end = 0x4a31407f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_wkup -> wd_timer2 */ > -@@ -4939,7 +4940,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_wkup__wd_timer2 = { > - .slave = &omap44xx_wd_timer2_hwmod, > - .clk = "l4_wkup_clk_mux_ck", > - .addr = omap44xx_wd_timer2_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs), > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -4976,6 +4976,7 @@ static struct omap_hwmod_addr_space > omap44xx_wd_timer3_addrs[] = { > - .pa_end = 0x4013007f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> wd_timer3 */ > -@@ -4984,7 +4985,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__wd_timer3 = { > - .slave = &omap44xx_wd_timer3_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_wd_timer3_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs), > - .user = OCP_USER_MPU, > - }; > - > -@@ -4994,6 +4994,7 @@ static struct omap_hwmod_addr_space > omap44xx_wd_timer3_dma_addrs[] = { > - .pa_end = 0x4903007f, > - .flags = ADDR_TYPE_RT > - }, > -+ { } > - }; > - > - /* l4_abe -> wd_timer3 (dma) */ > -@@ -5002,7 +5003,6 @@ static struct omap_hwmod_ocp_if > omap44xx_l4_abe__wd_timer3_dma = { > - .slave = &omap44xx_wd_timer3_hwmod, > - .clk = "ocp_abe_iclk", > - .addr = omap44xx_wd_timer3_dma_addrs, > -- .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs), > - .user = OCP_USER_SDMA, > - }; > - > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index e93438c..f3a3bff 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -219,7 +219,6 @@ struct omap_hwmod_addr_space { > - * @clk: interface clock: OMAP clock name > - * @_clk: pointer to the interface struct clk (filled in at runtime) > - * @fw: interface firewall data > -- * @addr_cnt: ARRAY_SIZE(@addr) > - * @width: OCP data width > - * @user: initiators using this interface (see OCP_USER_* macros above) > - * @flags: OCP interface flags (see OCPIF_* macros above) > -@@ -238,7 +237,6 @@ struct omap_hwmod_ocp_if { > - union { > - struct omap_hwmod_omap2_firewall omap2; > - } fw; > -- u8 addr_cnt; > - u8 width; > - u8 user; > - u8 flags; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod- > share-identical-omap_hwmod_addr_space-arr.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod-share-identical- > omap_hwmod_addr_space-arr.patch > deleted file mode 100644 > index 991fe9a..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod-share- > identical-omap_hwmod_addr_space-arr.patch > +++ /dev/null > @@ -1,1958 +0,0 @@ > -From 6d88f17e46fda46214da43af303c4f4aa442bd39 Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sat, 9 Jul 2011 19:14:06 -0600 > -Subject: [PATCH 038/149] omap_hwmod: share identical > omap_hwmod_addr_space arrays > - > -To reduce kernel source file data duplication, share struct > -omap_hwmod_addr_space arrays across OMAP2xxx and 3xxx hwmod data > -files. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/Makefile | 11 +- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 291 ++-------------- > -- > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 319 ++-------------- > ---- > - .../omap_hwmod_2xxx_3xxx_interconnect_data.c | 173 +++++++++++ > - .../mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 130 ++++++++ > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 151 +--------- > - arch/arm/mach-omap2/omap_hwmod_common_data.h | 38 +++- > - 7 files changed, 414 insertions(+), 699 deletions(-) > - create mode 100644 arch/arm/mach- > omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c > - create mode 100644 arch/arm/mach- > omap2/omap_hwmod_2xxx_interconnect_data.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index ff1466f..8a75d17 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -145,9 +145,14 @@ obj-$(CONFIG_SOC_OMAP2420) += > opp2420_data.o > - obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o > - > - # hwmod data > --obj-$(CONFIG_SOC_OMAP2420) += > omap_hwmod_2420_data.o > --obj-$(CONFIG_SOC_OMAP2430) += > omap_hwmod_2430_data.o > --obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o > -+obj-$(CONFIG_SOC_OMAP2420) += > omap_hwmod_2xxx_interconnect_data.o \ > -+ > omap_hwmod_2xxx_3xxx_interconnect_data.o \ > -+ omap_hwmod_2420_data.o > -+obj-$(CONFIG_SOC_OMAP2430) += > omap_hwmod_2xxx_interconnect_data.o \ > -+ > omap_hwmod_2xxx_3xxx_interconnect_data.o \ > -+ omap_hwmod_2430_data.o > -+obj-$(CONFIG_ARCH_OMAP3) += > omap_hwmod_2xxx_3xxx_interconnect_data.o \ > -+ omap_hwmod_3xxx_data.o > - obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o > - > - # EMU peripherals > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index 1a7ce3e..3ec625c 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -114,38 +114,20 @@ static struct omap_hwmod > omap2420_mcbsp1_hwmod; > - static struct omap_hwmod omap2420_mcbsp2_hwmod; > - > - /* l4 core -> mcspi1 interface */ > --static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { > -- { > -- .pa_start = 0x48098000, > -- .pa_end = 0x480980ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_mcspi1_hwmod, > - .clk = "mcspi1_ick", > -- .addr = omap2420_mcspi1_addr_space, > -+ .addr = omap2_mcspi1_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* l4 core -> mcspi2 interface */ > --static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { > -- { > -- .pa_start = 0x4809a000, > -- .pa_end = 0x4809a0ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_mcspi2_hwmod, > - .clk = "mcspi2_ick", > -- .addr = omap2420_mcspi2_addr_space, > -+ .addr = omap2_mcspi2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__l4_wkup = { > - }; > - > - /* L4 CORE -> UART1 interface */ > --static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { > -- { > -- .pa_start = OMAP2_UART1_BASE, > -- .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, > -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_uart1_hwmod, > - .clk = "uart1_ick", > -- .addr = omap2420_uart1_addr_space, > -+ .addr = omap2xxx_uart1_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* L4 CORE -> UART2 interface */ > --static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { > -- { > -- .pa_start = OMAP2_UART2_BASE, > -- .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, > -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_uart2_hwmod, > - .clk = "uart2_ick", > -- .addr = omap2420_uart2_addr_space, > -+ .addr = omap2xxx_uart2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* L4 PER -> UART3 interface */ > --static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { > -- { > -- .pa_start = OMAP2_UART3_BASE, > -- .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, > -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_uart3_hwmod, > - .clk = "uart3_ick", > -- .addr = omap2420_uart3_addr_space, > -+ .addr = omap2xxx_uart3_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > --/* I2C IP block address space length (in bytes) */ > --#define OMAP2_I2C_AS_LEN 128 > -- > - /* L4 CORE -> I2C1 interface */ > --static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { > -- { > -- .pa_start = 0x48070000, > -- .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN > - 1, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_i2c1_hwmod, > - .clk = "i2c1_ick", > -- .addr = omap2420_i2c1_addr_space, > -+ .addr = omap2_i2c1_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* L4 CORE -> I2C2 interface */ > --static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { > -- { > -- .pa_start = 0x48072000, > -- .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN > - 1, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_i2c2_hwmod, > - .clk = "i2c2_ick", > -- .addr = omap2420_i2c2_addr_space, > -+ .addr = omap2_i2c2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info > omap2420_timer2_mpu_irqs[] = { > - { .irq = 38, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { > -- { > -- .pa_start = 0x4802a000, > -- .pa_end = 0x4802a000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > - > - /* l4_core -> timer2 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer2_hwmod, > - .clk = "gpt2_ick", > -- .addr = omap2420_timer2_addrs, > -+ .addr = omap2xxx_timer2_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info > omap2420_timer3_mpu_irqs[] = { > - { .irq = 39, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { > -- { > -- .pa_start = 0x48078000, > -- .pa_end = 0x48078000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer3 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer3_hwmod, > - .clk = "gpt3_ick", > -- .addr = omap2420_timer3_addrs, > -+ .addr = omap2xxx_timer3_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info > omap2420_timer4_mpu_irqs[] = { > - { .irq = 40, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { > -- { > -- .pa_start = 0x4807a000, > -- .pa_end = 0x4807a000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer4 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer4_hwmod, > - .clk = "gpt4_ick", > -- .addr = omap2420_timer4_addrs, > -+ .addr = omap2xxx_timer4_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info > omap2420_timer5_mpu_irqs[] = { > - { .irq = 41, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { > -- { > -- .pa_start = 0x4807c000, > -- .pa_end = 0x4807c000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer5 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer5_hwmod, > - .clk = "gpt5_ick", > -- .addr = omap2420_timer5_addrs, > -+ .addr = omap2xxx_timer5_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info > omap2420_timer6_mpu_irqs[] = { > - { .irq = 42, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { > -- { > -- .pa_start = 0x4807e000, > -- .pa_end = 0x4807e000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer6 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer6_hwmod, > - .clk = "gpt6_ick", > -- .addr = omap2420_timer6_addrs, > -+ .addr = omap2xxx_timer6_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info > omap2420_timer7_mpu_irqs[] = { > - { .irq = 43, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { > -- { > -- .pa_start = 0x48080000, > -- .pa_end = 0x48080000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer7 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer7_hwmod, > - .clk = "gpt7_ick", > -- .addr = omap2420_timer7_addrs, > -+ .addr = omap2xxx_timer7_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info > omap2420_timer8_mpu_irqs[] = { > - { .irq = 44, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { > -- { > -- .pa_start = 0x48082000, > -- .pa_end = 0x48082000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer8 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer8_hwmod, > - .clk = "gpt8_ick", > -- .addr = omap2420_timer8_addrs, > -+ .addr = omap2xxx_timer8_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info > omap2420_timer9_mpu_irqs[] = { > - { .irq = 45, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { > -- { > -- .pa_start = 0x48084000, > -- .pa_end = 0x48084000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer9 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer9_hwmod, > - .clk = "gpt9_ick", > -- .addr = omap2420_timer9_addrs, > -+ .addr = omap2xxx_timer9_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info > omap2420_timer10_mpu_irqs[] = { > - { .irq = 46, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { > -- { > -- .pa_start = 0x48086000, > -- .pa_end = 0x48086000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer10 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer10_hwmod, > - .clk = "gpt10_ick", > -- .addr = omap2420_timer10_addrs, > -+ .addr = omap2_timer10_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info > omap2420_timer11_mpu_irqs[] = { > - { .irq = 47, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { > -- { > -- .pa_start = 0x48088000, > -- .pa_end = 0x48088000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer11 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer11_hwmod, > - .clk = "gpt11_ick", > -- .addr = omap2420_timer11_addrs, > -+ .addr = omap2_timer11_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info > omap2420_timer12_mpu_irqs[] = { > - { .irq = 48, }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { > -- { > -- .pa_start = 0x4808a000, > -- .pa_end = 0x4808a000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer12 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_timer12_hwmod, > - .clk = "gpt12_ick", > -- .addr = omap2420_timer12_addrs, > -+ .addr = omap2xxx_timer12_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if > *omap2420_dss_masters[] = { > - &omap2420_dss__l3, > - }; > - > --static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { > -- { > -- .pa_start = 0x48050000, > -- .pa_end = 0x480503FF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_dss_core_hwmod, > - .clk = "dss_ick", > -- .addr = omap2420_dss_addrs, > -+ .addr = omap2_dss_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP2420_L4_CORE_FW_DSS_CORE_REGION, > -@@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info > omap2420_dispc_irqs[] = { > - { .irq = 25 }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { > -- { > -- .pa_start = 0x48050400, > -- .pa_end = 0x480507FF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_dss_dispc_hwmod, > - .clk = "dss_ick", > -- .addr = omap2420_dss_dispc_addrs, > -+ .addr = omap2_dss_dispc_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, > -@@ -1332,21 +1150,12 @@ static struct omap_hwmod_class > omap2420_rfbi_hwmod_class = { > - .sysc = &omap2420_rfbi_sysc, > - }; > - > --static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { > -- { > -- .pa_start = 0x48050800, > -- .pa_end = 0x48050BFF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_rfbi */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_dss_rfbi_hwmod, > - .clk = "dss_ick", > -- .addr = omap2420_dss_rfbi_addrs, > -+ .addr = omap2_dss_rfbi_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP2420_L4_CORE_FW_DSS_CORE_REGION, > -@@ -1387,22 +1196,12 @@ static struct omap_hwmod_class > omap2420_venc_hwmod_class = { > - .name = "venc", > - }; > - > --/* dss_venc */ > --static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { > -- { > -- .pa_start = 0x48050C00, > -- .pa_end = 0x48050FFF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_venc */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_dss_venc_hwmod, > - .clk = "dss_54m_fck", > -- .addr = omap2420_dss_venc_addrs, > -+ .addr = omap2_dss_venc_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP2420_L4_CORE_FW_DSS_VENC_REGION, > -@@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info > omap2420_dma_system_irqs[] = { > - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > - }; > - > --static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { > -- { > -- .pa_start = 0x48056000, > -- .pa_end = 0x48056fff, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* dma_system -> L3 */ > - static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { > - .master = &omap2420_dma_system_hwmod, > -@@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if > omap2420_l4_core__dma_system = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_dma_system_hwmod, > - .clk = "sdma_ick", > -- .addr = omap2420_dma_system_addrs, > -+ .addr = omap2_dma_system_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info > omap2420_mailbox_irqs[] = { > - { .name = "iva", .irq = 34 }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { > -- { > -- .pa_start = 0x48094000, > -- .pa_end = 0x480941ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - /* l4_core -> mailbox */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_mailbox_hwmod, > -- .addr = omap2420_mailbox_addrs, > -+ .addr = omap2_mailbox_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info > omap2420_mcbsp1_sdma_chs[] = { > - { .name = "tx", .dma_req = 31 }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { > -- { > -- .name = "mpu", > -- .pa_start = 0x48074000, > -- .pa_end = 0x480740ff, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> mcbsp1 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_mcbsp1_hwmod, > - .clk = "mcbsp1_ick", > -- .addr = omap2420_mcbsp1_addrs, > -+ .addr = omap2_mcbsp1_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info > omap2420_mcbsp2_sdma_chs[] = { > - { .name = "tx", .dma_req = 33 }, > - }; > - > --static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { > -- { > -- .name = "mpu", > -- .pa_start = 0x48076000, > -- .pa_end = 0x480760ff, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> mcbsp2 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { > - .master = &omap2420_l4_core_hwmod, > - .slave = &omap2420_mcbsp2_hwmod, > - .clk = "mcbsp2_ick", > -- .addr = omap2420_mcbsp2_addrs, > -+ .addr = omap2xxx_mcbsp2_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index da28794..9531ef2 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -131,42 +131,21 @@ static struct omap_hwmod_ocp_if > omap2430_usbhsotg__l3 = { > - .user = OCP_USER_MPU, > - }; > - > --/* I2C IP block address space length (in bytes) */ > --#define OMAP2_I2C_AS_LEN 128 > -- > - /* L4 CORE -> I2C1 interface */ > --static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { > -- { > -- .pa_start = 0x48070000, > -- .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN > - 1, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_i2c1_hwmod, > - .clk = "i2c1_ick", > -- .addr = omap2430_i2c1_addr_space, > -+ .addr = omap2_i2c1_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* L4 CORE -> I2C2 interface */ > --static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { > -- { > -- .pa_start = 0x48072000, > -- .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN > - 1, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_i2c2_hwmod, > - .clk = "i2c2_ick", > -- .addr = omap2430_i2c2_addr_space, > -+ .addr = omap2_i2c2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -178,56 +157,29 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__l4_wkup = { > - }; > - > - /* L4 CORE -> UART1 interface */ > --static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { > -- { > -- .pa_start = OMAP2_UART1_BASE, > -- .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, > -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_uart1_hwmod, > - .clk = "uart1_ick", > -- .addr = omap2430_uart1_addr_space, > -+ .addr = omap2xxx_uart1_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* L4 CORE -> UART2 interface */ > --static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { > -- { > -- .pa_start = OMAP2_UART2_BASE, > -- .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, > -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_uart2_hwmod, > - .clk = "uart2_ick", > -- .addr = omap2430_uart2_addr_space, > -+ .addr = omap2xxx_uart2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* L4 PER -> UART3 interface */ > --static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { > -- { > -- .pa_start = OMAP2_UART3_BASE, > -- .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, > -- .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_uart3_hwmod, > - .clk = "uart3_ick", > -- .addr = omap2430_uart3_addr_space, > -+ .addr = omap2xxx_uart3_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -260,15 +212,6 @@ static struct omap_hwmod_ocp_if > *omap2430_usbhsotg_slaves[] = { > - }; > - > - /* L4 CORE -> MMC1 interface */ > --static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { > -- { > -- .pa_start = 0x4809c000, > -- .pa_end = 0x4809c1ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mmc1_hwmod, > -@@ -278,15 +221,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__mmc1 = { > - }; > - > - /* L4 CORE -> MMC2 interface */ > --static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { > -- { > -- .pa_start = 0x480b4000, > -- .pa_end = 0x480b41ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mmc2_hwmod, > -@@ -332,51 +266,24 @@ static struct omap_hwmod_ocp_if > *omap2430_l4_wkup_masters[] = { > - }; > - > - /* l4 core -> mcspi1 interface */ > --static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { > -- { > -- .pa_start = 0x48098000, > -- .pa_end = 0x480980ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mcspi1_hwmod, > - .clk = "mcspi1_ick", > -- .addr = omap2430_mcspi1_addr_space, > -+ .addr = omap2_mcspi1_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* l4 core -> mcspi2 interface */ > --static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { > -- { > -- .pa_start = 0x4809a000, > -- .pa_end = 0x4809a0ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mcspi2_hwmod, > - .clk = "mcspi2_ick", > -- .addr = omap2430_mcspi2_addr_space, > -+ .addr = omap2_mcspi2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* l4 core -> mcspi3 interface */ > --static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { > -- { > -- .pa_start = 0x480b8000, > -- .pa_end = 0x480b80ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mcspi3_hwmod, > -@@ -514,21 +421,12 @@ static struct omap_hwmod_irq_info > omap2430_timer2_mpu_irqs[] = { > - { .irq = 38, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { > -- { > -- .pa_start = 0x4802a000, > -- .pa_end = 0x4802a000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer2 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer2_hwmod, > - .clk = "gpt2_ick", > -- .addr = omap2430_timer2_addrs, > -+ .addr = omap2xxx_timer2_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -564,21 +462,12 @@ static struct omap_hwmod_irq_info > omap2430_timer3_mpu_irqs[] = { > - { .irq = 39, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { > -- { > -- .pa_start = 0x48078000, > -- .pa_end = 0x48078000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer3 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer3_hwmod, > - .clk = "gpt3_ick", > -- .addr = omap2430_timer3_addrs, > -+ .addr = omap2xxx_timer3_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -614,21 +503,12 @@ static struct omap_hwmod_irq_info > omap2430_timer4_mpu_irqs[] = { > - { .irq = 40, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { > -- { > -- .pa_start = 0x4807a000, > -- .pa_end = 0x4807a000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer4 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer4_hwmod, > - .clk = "gpt4_ick", > -- .addr = omap2430_timer4_addrs, > -+ .addr = omap2xxx_timer4_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -664,21 +544,12 @@ static struct omap_hwmod_irq_info > omap2430_timer5_mpu_irqs[] = { > - { .irq = 41, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { > -- { > -- .pa_start = 0x4807c000, > -- .pa_end = 0x4807c000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer5 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer5_hwmod, > - .clk = "gpt5_ick", > -- .addr = omap2430_timer5_addrs, > -+ .addr = omap2xxx_timer5_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -714,21 +585,12 @@ static struct omap_hwmod_irq_info > omap2430_timer6_mpu_irqs[] = { > - { .irq = 42, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { > -- { > -- .pa_start = 0x4807e000, > -- .pa_end = 0x4807e000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer6 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer6_hwmod, > - .clk = "gpt6_ick", > -- .addr = omap2430_timer6_addrs, > -+ .addr = omap2xxx_timer6_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -764,21 +626,12 @@ static struct omap_hwmod_irq_info > omap2430_timer7_mpu_irqs[] = { > - { .irq = 43, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { > -- { > -- .pa_start = 0x48080000, > -- .pa_end = 0x48080000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer7 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer7_hwmod, > - .clk = "gpt7_ick", > -- .addr = omap2430_timer7_addrs, > -+ .addr = omap2xxx_timer7_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -814,21 +667,12 @@ static struct omap_hwmod_irq_info > omap2430_timer8_mpu_irqs[] = { > - { .irq = 44, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { > -- { > -- .pa_start = 0x48082000, > -- .pa_end = 0x48082000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer8 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer8_hwmod, > - .clk = "gpt8_ick", > -- .addr = omap2430_timer8_addrs, > -+ .addr = omap2xxx_timer8_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -864,21 +708,12 @@ static struct omap_hwmod_irq_info > omap2430_timer9_mpu_irqs[] = { > - { .irq = 45, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { > -- { > -- .pa_start = 0x48084000, > -- .pa_end = 0x48084000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer9 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer9_hwmod, > - .clk = "gpt9_ick", > -- .addr = omap2430_timer9_addrs, > -+ .addr = omap2xxx_timer9_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -914,21 +749,12 @@ static struct omap_hwmod_irq_info > omap2430_timer10_mpu_irqs[] = { > - { .irq = 46, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { > -- { > -- .pa_start = 0x48086000, > -- .pa_end = 0x48086000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer10 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer10_hwmod, > - .clk = "gpt10_ick", > -- .addr = omap2430_timer10_addrs, > -+ .addr = omap2_timer10_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -964,21 +790,12 @@ static struct omap_hwmod_irq_info > omap2430_timer11_mpu_irqs[] = { > - { .irq = 47, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { > -- { > -- .pa_start = 0x48088000, > -- .pa_end = 0x48088000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer11 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer11_hwmod, > - .clk = "gpt11_ick", > -- .addr = omap2430_timer11_addrs, > -+ .addr = omap2_timer11_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1014,21 +831,12 @@ static struct omap_hwmod_irq_info > omap2430_timer12_mpu_irqs[] = { > - { .irq = 48, }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { > -- { > -- .pa_start = 0x4808a000, > -- .pa_end = 0x4808a000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer12 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_timer12_hwmod, > - .clk = "gpt12_ick", > -- .addr = omap2430_timer12_addrs, > -+ .addr = omap2xxx_timer12_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1277,21 +1085,12 @@ static struct omap_hwmod_ocp_if > *omap2430_dss_masters[] = { > - &omap2430_dss__l3, > - }; > - > --static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { > -- { > -- .pa_start = 0x48050000, > -- .pa_end = 0x480503FF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_dss_core_hwmod, > - .clk = "dss_ick", > -- .addr = omap2430_dss_addrs, > -+ .addr = omap2_dss_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1355,21 +1154,12 @@ static struct omap_hwmod_irq_info > omap2430_dispc_irqs[] = { > - { .irq = 25 }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { > -- { > -- .pa_start = 0x48050400, > -- .pa_end = 0x480507FF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_dss_dispc_hwmod, > - .clk = "dss_ick", > -- .addr = omap2430_dss_dispc_addrs, > -+ .addr = omap2_dss_dispc_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1419,21 +1209,12 @@ static struct omap_hwmod_class > omap2430_rfbi_hwmod_class = { > - .sysc = &omap2430_rfbi_sysc, > - }; > - > --static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { > -- { > -- .pa_start = 0x48050800, > -- .pa_end = 0x48050BFF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_rfbi */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_dss_rfbi_hwmod, > - .clk = "dss_ick", > -- .addr = omap2430_dss_rfbi_addrs, > -+ .addr = omap2_dss_rfbi_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1468,22 +1249,12 @@ static struct omap_hwmod_class > omap2430_venc_hwmod_class = { > - .name = "venc", > - }; > - > --/* dss_venc */ > --static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { > -- { > -- .pa_start = 0x48050C00, > -- .pa_end = 0x48050FFF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_venc */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_dss_venc_hwmod, > - .clk = "dss_54m_fck", > -- .addr = omap2430_dss_venc_addrs, > -+ .addr = omap2_dss_venc_addrs, > - .flags = OCPIF_SWSUP_IDLE, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > -@@ -1916,15 +1687,6 @@ static struct omap_hwmod_irq_info > omap2430_dma_system_irqs[] = { > - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > - }; > - > --static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { > -- { > -- .pa_start = 0x48056000, > -- .pa_end = 0x48056fff, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* dma_system -> L3 */ > - static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { > - .master = &omap2430_dma_system_hwmod, > -@@ -1943,7 +1705,7 @@ static struct omap_hwmod_ocp_if > omap2430_l4_core__dma_system = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_dma_system_hwmod, > - .clk = "sdma_ick", > -- .addr = omap2430_dma_system_addrs, > -+ .addr = omap2_dma_system_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1994,20 +1756,11 @@ static struct omap_hwmod_irq_info > omap2430_mailbox_irqs[] = { > - { .irq = 26 }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { > -- { > -- .pa_start = 0x48094000, > -- .pa_end = 0x480941ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - /* l4_core -> mailbox */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mailbox_hwmod, > -- .addr = omap2430_mailbox_addrs, > -+ .addr = omap2_mailbox_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2279,22 +2032,12 @@ static struct omap_hwmod_dma_info > omap2430_mcbsp1_sdma_chs[] = { > - { .name = "tx", .dma_req = 31 }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { > -- { > -- .name = "mpu", > -- .pa_start = 0x48074000, > -- .pa_end = 0x480740ff, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> mcbsp1 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mcbsp1_hwmod, > - .clk = "mcbsp1_ick", > -- .addr = omap2430_mcbsp1_addrs, > -+ .addr = omap2_mcbsp1_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2337,22 +2080,12 @@ static struct omap_hwmod_dma_info > omap2430_mcbsp2_sdma_chs[] = { > - { .name = "tx", .dma_req = 33 }, > - }; > - > --static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { > -- { > -- .name = "mpu", > -- .pa_start = 0x48076000, > -- .pa_end = 0x480760ff, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> mcbsp2 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { > - .master = &omap2430_l4_core_hwmod, > - .slave = &omap2430_mcbsp2_hwmod, > - .clk = "mcbsp2_ick", > -- .addr = omap2430_mcbsp2_addrs, > -+ .addr = omap2xxx_mcbsp2_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -diff --git a/arch/arm/mach- > omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach- > omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c > -new file mode 100644 > -index 0000000..04637fa > ---- /dev/null > -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c > -@@ -0,0 +1,173 @@ > -+/* > -+ * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect > data, OMAP2/3 > -+ * > -+ * Copyright (C) 2009-2011 Nokia Corporation > -+ * Paul Walmsley > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ * > -+ * XXX handle crossbar/shared link difference for L3? > -+ * XXX these should be marked initdata for multi-OMAP kernels > -+ */ > -+#include <asm/sizes.h> > -+ > -+#include <plat/omap_hwmod.h> > -+#include <plat/serial.h> > -+ > -+#include "omap_hwmod_common_data.h" > -+ > -+struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { > -+ { > -+ .pa_start = 0x4809c000, > -+ .pa_end = 0x4809c1ff, > -+ .flags = ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { > -+ { > -+ .pa_start = 0x480b4000, > -+ .pa_end = 0x480b41ff, > -+ .flags = ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = { > -+ { > -+ .pa_start = 0x48070000, > -+ .pa_end = 0x48070000 + SZ_128 - 1, > -+ .flags = ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = { > -+ { > -+ .pa_start = 0x48072000, > -+ .pa_end = 0x48072000 + SZ_128 - 1, > -+ .flags = ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_dss_addrs[] = { > -+ { > -+ .pa_start = 0x48050000, > -+ .pa_end = 0x48050000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = { > -+ { > -+ .pa_start = 0x48050400, > -+ .pa_end = 0x48050400 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = { > -+ { > -+ .pa_start = 0x48050800, > -+ .pa_end = 0x48050800 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = { > -+ { > -+ .pa_start = 0x48050C00, > -+ .pa_end = 0x48050C00 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_timer10_addrs[] = { > -+ { > -+ .pa_start = 0x48086000, > -+ .pa_end = 0x48086000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_timer11_addrs[] = { > -+ { > -+ .pa_start = 0x48088000, > -+ .pa_end = 0x48088000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = { > -+ { > -+ .pa_start = 0x4808a000, > -+ .pa_end = 0x4808a000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = { > -+ { > -+ .pa_start = 0x48098000, > -+ .pa_end = 0x48098000 + SZ_256 - 1, > -+ .flags = ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = { > -+ { > -+ .pa_start = 0x4809a000, > -+ .pa_end = 0x4809a000 + SZ_256 - 1, > -+ .flags = ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { > -+ { > -+ .pa_start = 0x480b8000, > -+ .pa_end = 0x480b8000 + SZ_256 - 1, > -+ .flags = ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_dma_system_addrs[] = { > -+ { > -+ .pa_start = 0x48056000, > -+ .pa_end = 0x48056000 + SZ_4K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_mailbox_addrs[] = { > -+ { > -+ .pa_start = 0x48094000, > -+ .pa_end = 0x48094000 + SZ_512 - 1, > -+ .flags = ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = { > -+ { > -+ .name = "mpu", > -+ .pa_start = 0x48074000, > -+ .pa_end = 0x480740ff, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c > b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c > -new file mode 100644 > -index 0000000..4f3547c > ---- /dev/null > -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c > -@@ -0,0 +1,130 @@ > -+/* > -+ * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for > OMAP2xxx > -+ * > -+ * Copyright (C) 2009-2011 Nokia Corporation > -+ * Paul Walmsley > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ * > -+ * XXX handle crossbar/shared link difference for L3? > -+ * XXX these should be marked initdata for multi-OMAP kernels > -+ */ > -+#include <asm/sizes.h> > -+ > -+#include <plat/omap_hwmod.h> > -+#include <plat/serial.h> > -+ > -+#include "omap_hwmod_common_data.h" > -+ > -+struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = { > -+ { > -+ .pa_start = OMAP2_UART1_BASE, > -+ .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, > -+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = { > -+ { > -+ .pa_start = OMAP2_UART2_BASE, > -+ .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, > -+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = { > -+ { > -+ .pa_start = OMAP2_UART3_BASE, > -+ .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, > -+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = { > -+ { > -+ .pa_start = 0x4802a000, > -+ .pa_end = 0x4802a000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = { > -+ { > -+ .pa_start = 0x48078000, > -+ .pa_end = 0x48078000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = { > -+ { > -+ .pa_start = 0x4807a000, > -+ .pa_end = 0x4807a000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = { > -+ { > -+ .pa_start = 0x4807c000, > -+ .pa_end = 0x4807c000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = { > -+ { > -+ .pa_start = 0x4807e000, > -+ .pa_end = 0x4807e000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = { > -+ { > -+ .pa_start = 0x48080000, > -+ .pa_end = 0x48080000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = { > -+ { > -+ .pa_start = 0x48082000, > -+ .pa_end = 0x48082000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = { > -+ { > -+ .pa_start = 0x48084000, > -+ .pa_end = 0x48084000 + SZ_1K - 1, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = { > -+ { > -+ .name = "mpu", > -+ .pa_start = 0x48076000, > -+ .pa_end = 0x480760ff, > -+ .flags = ADDR_TYPE_RT > -+ }, > -+ { } > -+}; > -+ > -+ > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 6410779..791f9b2 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -190,39 +190,21 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__l4_wkup = { > - }; > - > - /* L4 CORE -> MMC1 interface */ > --static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { > -- { > -- .pa_start = 0x4809c000, > -- .pa_end = 0x4809c1ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_mmc1_hwmod, > - .clk = "mmchs1_ick", > -- .addr = omap3xxx_mmc1_addr_space, > -+ .addr = omap2430_mmc1_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - .flags = OMAP_FIREWALL_L4 > - }; > - > - /* L4 CORE -> MMC2 interface */ > --static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { > -- { > -- .pa_start = 0x480b4000, > -- .pa_end = 0x480b41ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_mmc2_hwmod, > - .clk = "mmchs2_ick", > -- .addr = omap3xxx_mmc2_addr_space, > -+ .addr = omap2430_mmc2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - .flags = OMAP_FIREWALL_L4 > - }; > -@@ -318,24 +300,12 @@ static struct omap_hwmod_ocp_if > omap3_l4_per__uart4 = { > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > --/* I2C IP block address space length (in bytes) */ > --#define OMAP2_I2C_AS_LEN 128 > -- > - /* L4 CORE -> I2C1 interface */ > --static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { > -- { > -- .pa_start = 0x48070000, > -- .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN > - 1, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_i2c1_hwmod, > - .clk = "i2c1_ick", > -- .addr = omap3xxx_i2c1_addr_space, > -+ .addr = omap2_i2c1_addr_space, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_I2C1_REGION, > -@@ -347,20 +317,11 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__i2c1 = { > - }; > - > - /* L4 CORE -> I2C2 interface */ > --static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { > -- { > -- .pa_start = 0x48072000, > -- .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN > - 1, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_i2c2_hwmod, > - .clk = "i2c2_ick", > -- .addr = omap3xxx_i2c2_addr_space, > -+ .addr = omap2_i2c2_addr_space, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_I2C2_REGION, > -@@ -375,7 +336,7 @@ static struct omap_hwmod_ocp_if > omap3_l4_core__i2c2 = { > - static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { > - { > - .pa_start = 0x48060000, > -- .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN > - 1, > -+ .pa_end = 0x48060000 + SZ_128 - 1, > - .flags = ADDR_TYPE_RT, > - }, > - { } > -@@ -1065,21 +1026,12 @@ static struct omap_hwmod_irq_info > omap3xxx_timer10_mpu_irqs[] = { > - { .irq = 46, }, > - }; > - > --static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { > -- { > -- .pa_start = 0x48086000, > -- .pa_end = 0x48086000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer10 */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_timer10_hwmod, > - .clk = "gpt10_ick", > -- .addr = omap3xxx_timer10_addrs, > -+ .addr = omap2_timer10_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1115,21 +1067,12 @@ static struct omap_hwmod_irq_info > omap3xxx_timer11_mpu_irqs[] = { > - { .irq = 47, }, > - }; > - > --static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { > -- { > -- .pa_start = 0x48088000, > -- .pa_end = 0x48088000 + SZ_1K - 1, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> timer11 */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_timer11_hwmod, > - .clk = "gpt11_ick", > -- .addr = omap3xxx_timer11_addrs, > -+ .addr = omap2_timer11_addrs, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -1491,21 +1434,12 @@ static struct omap_hwmod_ocp_if > *omap3xxx_dss_masters[] = { > - &omap3xxx_dss__l3, > - }; > - > --static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { > -- { > -- .pa_start = 0x48050000, > -- .pa_end = 0x480503FF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss */ > - static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3430es1_dss_core_hwmod, > - .clk = "dss_ick", > -- .addr = omap3xxx_dss_addrs, > -+ .addr = omap2_dss_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, > -@@ -1520,7 +1454,7 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_core__dss = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_dss_core_hwmod, > - .clk = "dss_ick", > -- .addr = omap3xxx_dss_addrs, > -+ .addr = omap2_dss_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_CORE_REGION, > -@@ -1625,21 +1559,12 @@ static struct omap_hwmod_irq_info > omap3xxx_dispc_irqs[] = { > - { .irq = 25 }, > - }; > - > --static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { > -- { > -- .pa_start = 0x48050400, > -- .pa_end = 0x480507FF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_dss_dispc_hwmod, > - .clk = "dss_ick", > -- .addr = omap3xxx_dss_dispc_addrs, > -+ .addr = omap2_dss_dispc_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_DISPC_REGION, > -@@ -1760,21 +1685,12 @@ static struct omap_hwmod_class > omap3xxx_rfbi_hwmod_class = { > - .sysc = &omap3xxx_rfbi_sysc, > - }; > - > --static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { > -- { > -- .pa_start = 0x48050800, > -- .pa_end = 0x48050BFF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_rfbi */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_dss_rfbi_hwmod, > - .clk = "dss_ick", > -- .addr = omap3xxx_dss_rfbi_addrs, > -+ .addr = omap2_dss_rfbi_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_RFBI_REGION, > -@@ -1818,22 +1734,12 @@ static struct omap_hwmod_class > omap3xxx_venc_hwmod_class = { > - .name = "venc", > - }; > - > --/* dss_venc */ > --static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { > -- { > -- .pa_start = 0x48050C00, > -- .pa_end = 0x48050FFF, > -- .flags = ADDR_TYPE_RT > -- }, > -- { } > --}; > -- > - /* l4_core -> dss_venc */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap3xxx_dss_venc_hwmod, > - .clk = "dss_tv_fck", > -- .addr = omap3xxx_dss_venc_addrs, > -+ .addr = omap2_dss_venc_addrs, > - .fw = { > - .omap2 = { > - .l4_fw_region = > OMAP3_L4_CORE_FW_DSS_VENC_REGION, > -@@ -3070,56 +2976,29 @@ static struct omap_hwmod > omap3xxx_mailbox_hwmod = { > - }; > - > - /* l4 core -> mcspi1 interface */ > --static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { > -- { > -- .pa_start = 0x48098000, > -- .pa_end = 0x480980ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap34xx_mcspi1, > - .clk = "mcspi1_ick", > -- .addr = omap34xx_mcspi1_addr_space, > -+ .addr = omap2_mcspi1_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* l4 core -> mcspi2 interface */ > --static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { > -- { > -- .pa_start = 0x4809a000, > -- .pa_end = 0x4809a0ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap34xx_mcspi2, > - .clk = "mcspi2_ick", > -- .addr = omap34xx_mcspi2_addr_space, > -+ .addr = omap2_mcspi2_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > - /* l4 core -> mcspi3 interface */ > --static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { > -- { > -- .pa_start = 0x480b8000, > -- .pa_end = 0x480b80ff, > -- .flags = ADDR_TYPE_RT, > -- }, > -- { } > --}; > -- > - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { > - .master = &omap3xxx_l4_core_hwmod, > - .slave = &omap34xx_mcspi3, > - .clk = "mcspi3_ick", > -- .addr = omap34xx_mcspi3_addr_space, > -+ .addr = omap2430_mcspi3_addr_space, > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h > b/arch/arm/mach-omap2/omap_hwmod_common_data.h > -index c34e98b..76a2f11 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.h > -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h > -@@ -1,10 +1,10 @@ > - /* > - * omap_hwmod_common_data.h - OMAP hwmod common macros and > declarations > - * > -- * Copyright (C) 2010 Nokia Corporation > -+ * Copyright (C) 2010-2011 Nokia Corporation > - * Paul Walmsley > - * > -- * Copyright (C) 2010 Texas Instruments, Inc. > -+ * Copyright (C) 2010-2011 Texas Instruments, Inc. > - * Benoît Cousson > - * > - * This program is free software; you can redistribute it and/or modify > -@@ -16,10 +16,44 @@ > - > - #include <plat/omap_hwmod.h> > - > -+/* Common address space across OMAP2xxx */ > -+extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[]; > -+extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[]; > -+ > -+/* Common address space across OMAP2xxx/3xxx */ > -+extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2_dss_addrs[]; > -+extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[]; > -+extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[]; > -+extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[]; > -+extern struct omap_hwmod_addr_space omap2_timer10_addrs[]; > -+extern struct omap_hwmod_addr_space omap2_timer11_addrs[]; > -+extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[]; > -+extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; > -+extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; > -+extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; > -+ > - /* OMAP hwmod classes - forward declarations */ > - extern struct omap_hwmod_class l3_hwmod_class; > - extern struct omap_hwmod_class l4_hwmod_class; > - extern struct omap_hwmod_class mpu_hwmod_class; > - extern struct omap_hwmod_class iva_hwmod_class; > - > -+ > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod- > use-a-terminator-record-with-omap_hwmod_m.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod-use-a-terminator- > record-with-omap_hwmod_m.patch > deleted file mode 100644 > index b83e6df..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod-use-a- > terminator-record-with-omap_hwmod_m.patch > +++ /dev/null > @@ -1,2904 +0,0 @@ > -From 75a125341387435415e8390130066d56178291ef Mon Sep 17 > 00:00:00 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sat, 9 Jul 2011 19:14:06 -0600 > -Subject: [PATCH 039/149] omap_hwmod: use a terminator record with > omap_hwmod_mpu_irqs arrays > - > -Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and > -users of these arrays used the ARRAY_SIZE() macro to determine the > -length of the array. However, ARRAY_SIZE() only works when the array > -is in the same scope as the macro user. > - > -So far this hasn't been a problem. However, to reduce duplicated > -data, a subsequent patch will move common data to a separate, shared > -file. When this is done, ARRAY_SIZE() will no longer be usable. > - > -This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs > -arrays and uses a sentinel value (irq == -1) as the array terminator > -instead. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 56 ++++++------ > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 72 +++++++------- > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 92 +++++++++-------- > - > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 127 > +++++++++++++------------- > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +- > - 6 files changed, 205 insertions(+), 180 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 73599f0..b761968 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -679,6 +679,29 @@ static void _disable_optional_clocks(struct > omap_hwmod *oh) > - } > - > - /** > -+ * _count_mpu_irqs - count the number of MPU IRQ lines associated with > @oh > -+ * @oh: struct omap_hwmod *oh > -+ * > -+ * Count and return the number of MPU IRQs associated with the hwmod > -+ * @oh. Used to allocate struct resource data. Returns 0 if @oh is > -+ * NULL. > -+ */ > -+static int _count_mpu_irqs(struct omap_hwmod *oh) > -+{ > -+ struct omap_hwmod_irq_info *ohii; > -+ int i = 0; > -+ > -+ if (!oh || !oh->mpu_irqs) > -+ return 0; > -+ > -+ do { > -+ ohii = &oh->mpu_irqs[i++]; > -+ } while (ohii->irq != -1); > -+ > -+ return i; > -+} > -+ > -+/** > - * _count_ocp_if_addr_spaces - count the number of address space entries for > @oh > - * @oh: struct omap_hwmod *oh > - * > -@@ -1984,7 +2007,7 @@ int omap_hwmod_count_resources(struct > omap_hwmod *oh) > - { > - int ret, i; > - > -- ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; > -+ ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; > - > - for (i = 0; i < oh->slaves_cnt; i++) > - ret += _count_ocp_if_addr_spaces(oh->slaves[i]); > -@@ -2004,12 +2027,13 @@ int omap_hwmod_count_resources(struct > omap_hwmod *oh) > - */ > - int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource > *res) > - { > -- int i, j; > -+ int i, j, mpu_irqs_cnt; > - int r = 0; > - > - /* For each IRQ, DMA, memory area, fill in array.*/ > - > -- for (i = 0; i < oh->mpu_irqs_cnt; i++) { > -+ mpu_irqs_cnt = _count_mpu_irqs(oh); > -+ for (i = 0; i < mpu_irqs_cnt; i++) { > - (res + r)->name = (oh->mpu_irqs + i)->name; > - (res + r)->start = (oh->mpu_irqs + i)->irq; > - (res + r)->end = (oh->mpu_irqs + i)->irq; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index 3ec625c..04730d3 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -296,6 +296,7 @@ static struct omap_hwmod_class > omap2420_timer_hwmod_class = { > - static struct omap_hwmod omap2420_timer1_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { > - { .irq = 37, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { > -@@ -325,7 +326,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer1_slaves[] = { > - static struct omap_hwmod omap2420_timer1_hwmod = { > - .name = "timer1", > - .mpu_irqs = omap2420_timer1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs), > - .main_clk = "gpt1_fck", > - .prcm = { > - .omap2 = { > -@@ -346,6 +346,7 @@ static struct omap_hwmod > omap2420_timer1_hwmod = { > - static struct omap_hwmod omap2420_timer2_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { > - { .irq = 38, }, > -+ { .irq = -1 } > - }; > - > - > -@@ -367,7 +368,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer2_slaves[] = { > - static struct omap_hwmod omap2420_timer2_hwmod = { > - .name = "timer2", > - .mpu_irqs = omap2420_timer2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs), > - .main_clk = "gpt2_fck", > - .prcm = { > - .omap2 = { > -@@ -388,6 +388,7 @@ static struct omap_hwmod > omap2420_timer2_hwmod = { > - static struct omap_hwmod omap2420_timer3_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { > - { .irq = 39, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer3 */ > -@@ -408,7 +409,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer3_slaves[] = { > - static struct omap_hwmod omap2420_timer3_hwmod = { > - .name = "timer3", > - .mpu_irqs = omap2420_timer3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs), > - .main_clk = "gpt3_fck", > - .prcm = { > - .omap2 = { > -@@ -429,6 +429,7 @@ static struct omap_hwmod > omap2420_timer3_hwmod = { > - static struct omap_hwmod omap2420_timer4_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { > - { .irq = 40, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer4 */ > -@@ -449,7 +450,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer4_slaves[] = { > - static struct omap_hwmod omap2420_timer4_hwmod = { > - .name = "timer4", > - .mpu_irqs = omap2420_timer4_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs), > - .main_clk = "gpt4_fck", > - .prcm = { > - .omap2 = { > -@@ -470,6 +470,7 @@ static struct omap_hwmod > omap2420_timer4_hwmod = { > - static struct omap_hwmod omap2420_timer5_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { > - { .irq = 41, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer5 */ > -@@ -490,7 +491,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer5_slaves[] = { > - static struct omap_hwmod omap2420_timer5_hwmod = { > - .name = "timer5", > - .mpu_irqs = omap2420_timer5_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs), > - .main_clk = "gpt5_fck", > - .prcm = { > - .omap2 = { > -@@ -512,6 +512,7 @@ static struct omap_hwmod > omap2420_timer5_hwmod = { > - static struct omap_hwmod omap2420_timer6_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { > - { .irq = 42, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer6 */ > -@@ -532,7 +533,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer6_slaves[] = { > - static struct omap_hwmod omap2420_timer6_hwmod = { > - .name = "timer6", > - .mpu_irqs = omap2420_timer6_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs), > - .main_clk = "gpt6_fck", > - .prcm = { > - .omap2 = { > -@@ -553,6 +553,7 @@ static struct omap_hwmod > omap2420_timer6_hwmod = { > - static struct omap_hwmod omap2420_timer7_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { > - { .irq = 43, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer7 */ > -@@ -573,7 +574,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer7_slaves[] = { > - static struct omap_hwmod omap2420_timer7_hwmod = { > - .name = "timer7", > - .mpu_irqs = omap2420_timer7_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs), > - .main_clk = "gpt7_fck", > - .prcm = { > - .omap2 = { > -@@ -594,6 +594,7 @@ static struct omap_hwmod > omap2420_timer7_hwmod = { > - static struct omap_hwmod omap2420_timer8_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { > - { .irq = 44, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer8 */ > -@@ -614,7 +615,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer8_slaves[] = { > - static struct omap_hwmod omap2420_timer8_hwmod = { > - .name = "timer8", > - .mpu_irqs = omap2420_timer8_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs), > - .main_clk = "gpt8_fck", > - .prcm = { > - .omap2 = { > -@@ -635,6 +635,7 @@ static struct omap_hwmod > omap2420_timer8_hwmod = { > - static struct omap_hwmod omap2420_timer9_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { > - { .irq = 45, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer9 */ > -@@ -655,7 +656,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer9_slaves[] = { > - static struct omap_hwmod omap2420_timer9_hwmod = { > - .name = "timer9", > - .mpu_irqs = omap2420_timer9_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs), > - .main_clk = "gpt9_fck", > - .prcm = { > - .omap2 = { > -@@ -676,6 +676,7 @@ static struct omap_hwmod > omap2420_timer9_hwmod = { > - static struct omap_hwmod omap2420_timer10_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { > - { .irq = 46, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer10 */ > -@@ -696,7 +697,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer10_slaves[] = { > - static struct omap_hwmod omap2420_timer10_hwmod = { > - .name = "timer10", > - .mpu_irqs = omap2420_timer10_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs), > - .main_clk = "gpt10_fck", > - .prcm = { > - .omap2 = { > -@@ -717,6 +717,7 @@ static struct omap_hwmod > omap2420_timer10_hwmod = { > - static struct omap_hwmod omap2420_timer11_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { > - { .irq = 47, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer11 */ > -@@ -737,7 +738,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer11_slaves[] = { > - static struct omap_hwmod omap2420_timer11_hwmod = { > - .name = "timer11", > - .mpu_irqs = omap2420_timer11_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs), > - .main_clk = "gpt11_fck", > - .prcm = { > - .omap2 = { > -@@ -758,6 +758,7 @@ static struct omap_hwmod > omap2420_timer11_hwmod = { > - static struct omap_hwmod omap2420_timer12_hwmod; > - static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { > - { .irq = 48, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer12 */ > -@@ -778,7 +779,6 @@ static struct omap_hwmod_ocp_if > *omap2420_timer12_slaves[] = { > - static struct omap_hwmod omap2420_timer12_hwmod = { > - .name = "timer12", > - .mpu_irqs = omap2420_timer12_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs), > - .main_clk = "gpt12_fck", > - .prcm = { > - .omap2 = { > -@@ -879,6 +879,7 @@ static struct omap_hwmod_class uart_class = { > - > - static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { > - { .irq = INT_24XX_UART1_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > -@@ -893,7 +894,6 @@ static struct omap_hwmod_ocp_if > *omap2420_uart1_slaves[] = { > - static struct omap_hwmod omap2420_uart1_hwmod = { > - .name = "uart1", > - .mpu_irqs = uart1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), > - .sdma_reqs = uart1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > -@@ -916,6 +916,7 @@ static struct omap_hwmod omap2420_uart1_hwmod > = { > - > - static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { > - { .irq = INT_24XX_UART2_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > -@@ -930,7 +931,6 @@ static struct omap_hwmod_ocp_if > *omap2420_uart2_slaves[] = { > - static struct omap_hwmod omap2420_uart2_hwmod = { > - .name = "uart2", > - .mpu_irqs = uart2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), > - .sdma_reqs = uart2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > -@@ -953,6 +953,7 @@ static struct omap_hwmod omap2420_uart2_hwmod > = { > - > - static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { > - { .irq = INT_24XX_UART3_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > -@@ -967,7 +968,6 @@ static struct omap_hwmod_ocp_if > *omap2420_uart3_slaves[] = { > - static struct omap_hwmod omap2420_uart3_hwmod = { > - .name = "uart3", > - .mpu_irqs = uart3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), > - .sdma_reqs = uart3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > -@@ -1087,6 +1087,7 @@ static struct omap_hwmod_class > omap2420_dispc_hwmod_class = { > - > - static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { > - { .irq = 25 }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> dss_dispc */ > -@@ -1113,7 +1114,6 @@ static struct omap_hwmod > omap2420_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap2420_dispc_hwmod_class, > - .mpu_irqs = omap2420_dispc_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), > - .main_clk = "dss1_fck", > - .prcm = { > - .omap2 = { > -@@ -1254,6 +1254,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; > - > - static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { > - { .irq = INT_24XX_I2C1_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > -@@ -1268,7 +1269,6 @@ static struct omap_hwmod_ocp_if > *omap2420_i2c1_slaves[] = { > - static struct omap_hwmod omap2420_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = i2c1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), > - .sdma_reqs = i2c1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2c1_fck", > -@@ -1293,6 +1293,7 @@ static struct omap_hwmod > omap2420_i2c1_hwmod = { > - > - static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { > - { .irq = INT_24XX_I2C2_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > -@@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if > *omap2420_i2c2_slaves[] = { > - static struct omap_hwmod omap2420_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = i2c2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), > - .sdma_reqs = i2c2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2c2_fck", > -@@ -1430,6 +1430,7 @@ static struct omap_hwmod_class > omap242x_gpio_hwmod_class = { > - /* gpio1 */ > - static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { > - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { > -@@ -1440,7 +1441,6 @@ static struct omap_hwmod > omap2420_gpio1_hwmod = { > - .name = "gpio1", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap242x_gpio1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1461,6 +1461,7 @@ static struct omap_hwmod > omap2420_gpio1_hwmod = { > - /* gpio2 */ > - static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { > - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { > -@@ -1471,7 +1472,6 @@ static struct omap_hwmod > omap2420_gpio2_hwmod = { > - .name = "gpio2", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap242x_gpio2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1492,6 +1492,7 @@ static struct omap_hwmod > omap2420_gpio2_hwmod = { > - /* gpio3 */ > - static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { > - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { > -@@ -1502,7 +1503,6 @@ static struct omap_hwmod > omap2420_gpio3_hwmod = { > - .name = "gpio3", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap242x_gpio3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1523,6 +1523,7 @@ static struct omap_hwmod > omap2420_gpio3_hwmod = { > - /* gpio4 */ > - static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { > - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { > -@@ -1533,7 +1534,6 @@ static struct omap_hwmod > omap2420_gpio4_hwmod = { > - .name = "gpio4", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap242x_gpio4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1580,6 +1580,7 @@ static struct omap_hwmod_irq_info > omap2420_dma_system_irqs[] = { > - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ > - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ > - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > -+ { .irq = -1 } > - }; > - > - /* dma_system -> L3 */ > -@@ -1613,7 +1614,6 @@ static struct omap_hwmod > omap2420_dma_system_hwmod = { > - .name = "dma", > - .class = &omap2420_dma_hwmod_class, > - .mpu_irqs = omap2420_dma_system_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs), > - .main_clk = "core_l3_ck", > - .slaves = omap2420_dma_system_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), > -@@ -1650,6 +1650,7 @@ static struct omap_hwmod > omap2420_mailbox_hwmod; > - static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { > - { .name = "dsp", .irq = 26 }, > - { .name = "iva", .irq = 34 }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> mailbox */ > -@@ -1669,7 +1670,6 @@ static struct omap_hwmod > omap2420_mailbox_hwmod = { > - .name = "mailbox", > - .class = &omap2420_mailbox_hwmod_class, > - .mpu_irqs = omap2420_mailbox_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs), > - .main_clk = "mailboxes_ick", > - .prcm = { > - .omap2 = { > -@@ -1711,6 +1711,7 @@ static struct omap_hwmod_class > omap2420_mcspi_class = { > - /* mcspi1 */ > - static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { > - { .irq = 65 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { > -@@ -1735,7 +1736,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - static struct omap_hwmod omap2420_mcspi1_hwmod = { > - .name = "mcspi1_hwmod", > - .mpu_irqs = omap2420_mcspi1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), > - .sdma_reqs = omap2420_mcspi1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > -@@ -1758,6 +1758,7 @@ static struct omap_hwmod > omap2420_mcspi1_hwmod = { > - /* mcspi2 */ > - static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { > - { .irq = 66 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { > -@@ -1778,7 +1779,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - static struct omap_hwmod omap2420_mcspi2_hwmod = { > - .name = "mcspi2_hwmod", > - .mpu_irqs = omap2420_mcspi2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), > - .sdma_reqs = omap2420_mcspi2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > -@@ -1811,6 +1811,7 @@ static struct omap_hwmod_class > omap2420_mcbsp_hwmod_class = { > - static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { > - { .name = "tx", .irq = 59 }, > - { .name = "rx", .irq = 60 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { > -@@ -1836,7 +1837,6 @@ static struct omap_hwmod > omap2420_mcbsp1_hwmod = { > - .name = "mcbsp1", > - .class = &omap2420_mcbsp_hwmod_class, > - .mpu_irqs = omap2420_mcbsp1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs), > - .sdma_reqs = omap2420_mcbsp1_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), > - .main_clk = "mcbsp1_fck", > -@@ -1858,6 +1858,7 @@ static struct omap_hwmod > omap2420_mcbsp1_hwmod = { > - static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { > - { .name = "tx", .irq = 62 }, > - { .name = "rx", .irq = 63 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { > -@@ -1883,7 +1884,6 @@ static struct omap_hwmod > omap2420_mcbsp2_hwmod = { > - .name = "mcbsp2", > - .class = &omap2420_mcbsp_hwmod_class, > - .mpu_irqs = omap2420_mcbsp2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs), > - .sdma_reqs = omap2420_mcbsp2_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), > - .main_clk = "mcbsp2_fck", > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index 9531ef2..2c28468 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -369,6 +369,7 @@ static struct omap_hwmod_class > omap2430_timer_hwmod_class = { > - static struct omap_hwmod omap2430_timer1_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { > - { .irq = 37, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { > -@@ -398,7 +399,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer1_slaves[] = { > - static struct omap_hwmod omap2430_timer1_hwmod = { > - .name = "timer1", > - .mpu_irqs = omap2430_timer1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs), > - .main_clk = "gpt1_fck", > - .prcm = { > - .omap2 = { > -@@ -419,6 +419,7 @@ static struct omap_hwmod > omap2430_timer1_hwmod = { > - static struct omap_hwmod omap2430_timer2_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { > - { .irq = 38, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer2 */ > -@@ -439,7 +440,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer2_slaves[] = { > - static struct omap_hwmod omap2430_timer2_hwmod = { > - .name = "timer2", > - .mpu_irqs = omap2430_timer2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs), > - .main_clk = "gpt2_fck", > - .prcm = { > - .omap2 = { > -@@ -460,6 +460,7 @@ static struct omap_hwmod > omap2430_timer2_hwmod = { > - static struct omap_hwmod omap2430_timer3_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { > - { .irq = 39, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer3 */ > -@@ -480,7 +481,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer3_slaves[] = { > - static struct omap_hwmod omap2430_timer3_hwmod = { > - .name = "timer3", > - .mpu_irqs = omap2430_timer3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs), > - .main_clk = "gpt3_fck", > - .prcm = { > - .omap2 = { > -@@ -501,6 +501,7 @@ static struct omap_hwmod > omap2430_timer3_hwmod = { > - static struct omap_hwmod omap2430_timer4_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { > - { .irq = 40, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer4 */ > -@@ -521,7 +522,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer4_slaves[] = { > - static struct omap_hwmod omap2430_timer4_hwmod = { > - .name = "timer4", > - .mpu_irqs = omap2430_timer4_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs), > - .main_clk = "gpt4_fck", > - .prcm = { > - .omap2 = { > -@@ -542,6 +542,7 @@ static struct omap_hwmod > omap2430_timer4_hwmod = { > - static struct omap_hwmod omap2430_timer5_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { > - { .irq = 41, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer5 */ > -@@ -562,7 +563,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer5_slaves[] = { > - static struct omap_hwmod omap2430_timer5_hwmod = { > - .name = "timer5", > - .mpu_irqs = omap2430_timer5_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs), > - .main_clk = "gpt5_fck", > - .prcm = { > - .omap2 = { > -@@ -583,6 +583,7 @@ static struct omap_hwmod > omap2430_timer5_hwmod = { > - static struct omap_hwmod omap2430_timer6_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { > - { .irq = 42, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer6 */ > -@@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer6_slaves[] = { > - static struct omap_hwmod omap2430_timer6_hwmod = { > - .name = "timer6", > - .mpu_irqs = omap2430_timer6_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs), > - .main_clk = "gpt6_fck", > - .prcm = { > - .omap2 = { > -@@ -624,6 +624,7 @@ static struct omap_hwmod > omap2430_timer6_hwmod = { > - static struct omap_hwmod omap2430_timer7_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { > - { .irq = 43, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer7 */ > -@@ -644,7 +645,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer7_slaves[] = { > - static struct omap_hwmod omap2430_timer7_hwmod = { > - .name = "timer7", > - .mpu_irqs = omap2430_timer7_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs), > - .main_clk = "gpt7_fck", > - .prcm = { > - .omap2 = { > -@@ -665,6 +665,7 @@ static struct omap_hwmod > omap2430_timer7_hwmod = { > - static struct omap_hwmod omap2430_timer8_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { > - { .irq = 44, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer8 */ > -@@ -685,7 +686,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer8_slaves[] = { > - static struct omap_hwmod omap2430_timer8_hwmod = { > - .name = "timer8", > - .mpu_irqs = omap2430_timer8_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs), > - .main_clk = "gpt8_fck", > - .prcm = { > - .omap2 = { > -@@ -706,6 +706,7 @@ static struct omap_hwmod > omap2430_timer8_hwmod = { > - static struct omap_hwmod omap2430_timer9_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { > - { .irq = 45, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer9 */ > -@@ -726,7 +727,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer9_slaves[] = { > - static struct omap_hwmod omap2430_timer9_hwmod = { > - .name = "timer9", > - .mpu_irqs = omap2430_timer9_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs), > - .main_clk = "gpt9_fck", > - .prcm = { > - .omap2 = { > -@@ -747,6 +747,7 @@ static struct omap_hwmod > omap2430_timer9_hwmod = { > - static struct omap_hwmod omap2430_timer10_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { > - { .irq = 46, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer10 */ > -@@ -767,7 +768,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer10_slaves[] = { > - static struct omap_hwmod omap2430_timer10_hwmod = { > - .name = "timer10", > - .mpu_irqs = omap2430_timer10_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs), > - .main_clk = "gpt10_fck", > - .prcm = { > - .omap2 = { > -@@ -788,6 +788,7 @@ static struct omap_hwmod > omap2430_timer10_hwmod = { > - static struct omap_hwmod omap2430_timer11_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { > - { .irq = 47, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer11 */ > -@@ -808,7 +809,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer11_slaves[] = { > - static struct omap_hwmod omap2430_timer11_hwmod = { > - .name = "timer11", > - .mpu_irqs = omap2430_timer11_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs), > - .main_clk = "gpt11_fck", > - .prcm = { > - .omap2 = { > -@@ -829,6 +829,7 @@ static struct omap_hwmod > omap2430_timer11_hwmod = { > - static struct omap_hwmod omap2430_timer12_hwmod; > - static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { > - { .irq = 48, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer12 */ > -@@ -849,7 +850,6 @@ static struct omap_hwmod_ocp_if > *omap2430_timer12_slaves[] = { > - static struct omap_hwmod omap2430_timer12_hwmod = { > - .name = "timer12", > - .mpu_irqs = omap2430_timer12_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs), > - .main_clk = "gpt12_fck", > - .prcm = { > - .omap2 = { > -@@ -950,6 +950,7 @@ static struct omap_hwmod_class uart_class = { > - > - static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { > - { .irq = INT_24XX_UART1_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > -@@ -964,7 +965,6 @@ static struct omap_hwmod_ocp_if > *omap2430_uart1_slaves[] = { > - static struct omap_hwmod omap2430_uart1_hwmod = { > - .name = "uart1", > - .mpu_irqs = uart1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), > - .sdma_reqs = uart1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > -@@ -987,6 +987,7 @@ static struct omap_hwmod omap2430_uart1_hwmod > = { > - > - static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { > - { .irq = INT_24XX_UART2_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > -@@ -1001,7 +1002,6 @@ static struct omap_hwmod_ocp_if > *omap2430_uart2_slaves[] = { > - static struct omap_hwmod omap2430_uart2_hwmod = { > - .name = "uart2", > - .mpu_irqs = uart2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), > - .sdma_reqs = uart2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > -@@ -1024,6 +1024,7 @@ static struct omap_hwmod > omap2430_uart2_hwmod = { > - > - static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { > - { .irq = INT_24XX_UART3_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > -@@ -1038,7 +1039,6 @@ static struct omap_hwmod_ocp_if > *omap2430_uart3_slaves[] = { > - static struct omap_hwmod omap2430_uart3_hwmod = { > - .name = "uart3", > - .mpu_irqs = uart3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), > - .sdma_reqs = uart3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > -@@ -1152,6 +1152,7 @@ static struct omap_hwmod_class > omap2430_dispc_hwmod_class = { > - > - static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { > - { .irq = 25 }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> dss_dispc */ > -@@ -1172,7 +1173,6 @@ static struct omap_hwmod > omap2430_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap2430_dispc_hwmod_class, > - .mpu_irqs = omap2430_dispc_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), > - .main_clk = "dss1_fck", > - .prcm = { > - .omap2 = { > -@@ -1304,6 +1304,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { > - > - static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { > - { .irq = INT_24XX_I2C1_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > -@@ -1318,7 +1319,6 @@ static struct omap_hwmod_ocp_if > *omap2430_i2c1_slaves[] = { > - static struct omap_hwmod omap2430_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = i2c1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), > - .sdma_reqs = i2c1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2chs1_fck", > -@@ -1350,6 +1350,7 @@ static struct omap_hwmod > omap2430_i2c1_hwmod = { > - > - static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { > - { .irq = INT_24XX_I2C2_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > -@@ -1364,7 +1365,6 @@ static struct omap_hwmod_ocp_if > *omap2430_i2c2_slaves[] = { > - static struct omap_hwmod omap2430_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = i2c2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), > - .sdma_reqs = i2c2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2chs2_fck", > -@@ -1504,6 +1504,7 @@ static struct omap_hwmod_class > omap243x_gpio_hwmod_class = { > - /* gpio1 */ > - static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { > - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { > -@@ -1514,7 +1515,6 @@ static struct omap_hwmod > omap2430_gpio1_hwmod = { > - .name = "gpio1", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap243x_gpio1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1535,6 +1535,7 @@ static struct omap_hwmod > omap2430_gpio1_hwmod = { > - /* gpio2 */ > - static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { > - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { > -@@ -1545,7 +1546,6 @@ static struct omap_hwmod > omap2430_gpio2_hwmod = { > - .name = "gpio2", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap243x_gpio2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1566,6 +1566,7 @@ static struct omap_hwmod > omap2430_gpio2_hwmod = { > - /* gpio3 */ > - static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { > - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { > -@@ -1576,7 +1577,6 @@ static struct omap_hwmod > omap2430_gpio3_hwmod = { > - .name = "gpio3", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap243x_gpio3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1597,6 +1597,7 @@ static struct omap_hwmod > omap2430_gpio3_hwmod = { > - /* gpio4 */ > - static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { > - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { > -@@ -1607,7 +1608,6 @@ static struct omap_hwmod > omap2430_gpio4_hwmod = { > - .name = "gpio4", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap243x_gpio4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1628,6 +1628,7 @@ static struct omap_hwmod > omap2430_gpio4_hwmod = { > - /* gpio5 */ > - static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { > - { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { > -@@ -1638,7 +1639,6 @@ static struct omap_hwmod > omap2430_gpio5_hwmod = { > - .name = "gpio5", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap243x_gpio5_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), > - .main_clk = "gpio5_fck", > - .prcm = { > - .omap2 = { > -@@ -1685,6 +1685,7 @@ static struct omap_hwmod_irq_info > omap2430_dma_system_irqs[] = { > - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ > - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ > - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > -+ { .irq = -1 } > - }; > - > - /* dma_system -> L3 */ > -@@ -1718,7 +1719,6 @@ static struct omap_hwmod > omap2430_dma_system_hwmod = { > - .name = "dma", > - .class = &omap2430_dma_hwmod_class, > - .mpu_irqs = omap2430_dma_system_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), > - .main_clk = "core_l3_ck", > - .slaves = omap2430_dma_system_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), > -@@ -1754,6 +1754,7 @@ static struct omap_hwmod_class > omap2430_mailbox_hwmod_class = { > - static struct omap_hwmod omap2430_mailbox_hwmod; > - static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { > - { .irq = 26 }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> mailbox */ > -@@ -1773,7 +1774,6 @@ static struct omap_hwmod > omap2430_mailbox_hwmod = { > - .name = "mailbox", > - .class = &omap2430_mailbox_hwmod_class, > - .mpu_irqs = omap2430_mailbox_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs), > - .main_clk = "mailboxes_ick", > - .prcm = { > - .omap2 = { > -@@ -1815,6 +1815,7 @@ static struct omap_hwmod_class > omap2430_mcspi_class = { > - /* mcspi1 */ > - static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { > - { .irq = 65 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { > -@@ -1839,7 +1840,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - static struct omap_hwmod omap2430_mcspi1_hwmod = { > - .name = "mcspi1_hwmod", > - .mpu_irqs = omap2430_mcspi1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), > - .sdma_reqs = omap2430_mcspi1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > -@@ -1862,6 +1862,7 @@ static struct omap_hwmod > omap2430_mcspi1_hwmod = { > - /* mcspi2 */ > - static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { > - { .irq = 66 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { > -@@ -1882,7 +1883,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - static struct omap_hwmod omap2430_mcspi2_hwmod = { > - .name = "mcspi2_hwmod", > - .mpu_irqs = omap2430_mcspi2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), > - .sdma_reqs = omap2430_mcspi2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > -@@ -1905,6 +1905,7 @@ static struct omap_hwmod > omap2430_mcspi2_hwmod = { > - /* mcspi3 */ > - static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { > - { .irq = 91 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { > -@@ -1925,7 +1926,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi3_dev_attr = { > - static struct omap_hwmod omap2430_mcspi3_hwmod = { > - .name = "mcspi3_hwmod", > - .mpu_irqs = omap2430_mcspi3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), > - .sdma_reqs = omap2430_mcspi3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), > - .main_clk = "mcspi3_fck", > -@@ -1970,12 +1970,12 @@ static struct omap_hwmod_irq_info > omap2430_usbhsotg_mpu_irqs[] = { > - > - { .name = "mc", .irq = 92 }, > - { .name = "dma", .irq = 93 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod omap2430_usbhsotg_hwmod = { > - .name = "usb_otg_hs", > - .mpu_irqs = omap2430_usbhsotg_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs), > - .main_clk = "usbhs_ick", > - .prcm = { > - .omap2 = { > -@@ -2025,6 +2025,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp1_irqs[] = { > - { .name = "rx", .irq = 60 }, > - { .name = "ovr", .irq = 61 }, > - { .name = "common", .irq = 64 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { > -@@ -2050,7 +2051,6 @@ static struct omap_hwmod > omap2430_mcbsp1_hwmod = { > - .name = "mcbsp1", > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs), > - .sdma_reqs = omap2430_mcbsp1_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), > - .main_clk = "mcbsp1_fck", > -@@ -2073,6 +2073,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp2_irqs[] = { > - { .name = "tx", .irq = 62 }, > - { .name = "rx", .irq = 63 }, > - { .name = "common", .irq = 16 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { > -@@ -2098,7 +2099,6 @@ static struct omap_hwmod > omap2430_mcbsp2_hwmod = { > - .name = "mcbsp2", > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs), > - .sdma_reqs = omap2430_mcbsp2_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), > - .main_clk = "mcbsp2_fck", > -@@ -2121,6 +2121,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp3_irqs[] = { > - { .name = "tx", .irq = 89 }, > - { .name = "rx", .irq = 90 }, > - { .name = "common", .irq = 17 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { > -@@ -2156,7 +2157,6 @@ static struct omap_hwmod > omap2430_mcbsp3_hwmod = { > - .name = "mcbsp3", > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs), > - .sdma_reqs = omap2430_mcbsp3_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), > - .main_clk = "mcbsp3_fck", > -@@ -2179,6 +2179,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp4_irqs[] = { > - { .name = "tx", .irq = 54 }, > - { .name = "rx", .irq = 55 }, > - { .name = "common", .irq = 18 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { > -@@ -2214,7 +2215,6 @@ static struct omap_hwmod > omap2430_mcbsp4_hwmod = { > - .name = "mcbsp4", > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs), > - .sdma_reqs = omap2430_mcbsp4_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), > - .main_clk = "mcbsp4_fck", > -@@ -2237,6 +2237,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp5_irqs[] = { > - { .name = "tx", .irq = 81 }, > - { .name = "rx", .irq = 82 }, > - { .name = "common", .irq = 19 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { > -@@ -2272,7 +2273,6 @@ static struct omap_hwmod > omap2430_mcbsp5_hwmod = { > - .name = "mcbsp5", > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp5_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs), > - .sdma_reqs = omap2430_mcbsp5_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), > - .main_clk = "mcbsp5_fck", > -@@ -2312,6 +2312,7 @@ static struct omap_hwmod_class > omap2430_mmc_class = { > - > - static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { > - { .irq = 83 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { > -@@ -2335,7 +2336,6 @@ static struct omap_hwmod > omap2430_mmc1_hwmod = { > - .name = "mmc1", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap2430_mmc1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs), > - .sdma_reqs = omap2430_mmc1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), > - .opt_clks = omap2430_mmc1_opt_clks, > -@@ -2361,6 +2361,7 @@ static struct omap_hwmod > omap2430_mmc1_hwmod = { > - > - static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { > - { .irq = 86 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { > -@@ -2380,7 +2381,6 @@ static struct omap_hwmod > omap2430_mmc2_hwmod = { > - .name = "mmc2", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap2430_mmc2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs), > - .sdma_reqs = omap2430_mmc2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), > - .opt_clks = omap2430_mmc2_opt_clks, > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 791f9b2..cc178b5 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if > omap3xxx_l3_main__l4_per = { > - static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = { > - { .irq = INT_34XX_L3_DBG_IRQ }, > - { .irq = INT_34XX_L3_APP_IRQ }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { > -@@ -151,7 +152,6 @@ static struct omap_hwmod > omap3xxx_l3_main_hwmod = { > - .name = "l3_main", > - .class = &l3_hwmod_class, > - .mpu_irqs = omap3xxx_l3_main_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_l3_main_irqs), > - .masters = omap3xxx_l3_main_masters, > - .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), > - .slaves = omap3xxx_l3_main_slaves, > -@@ -574,6 +574,7 @@ static struct omap_hwmod_class > omap3xxx_timer_hwmod_class = { > - static struct omap_hwmod omap3xxx_timer1_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { > - { .irq = 37, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { > -@@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer1_slaves[] = { > - static struct omap_hwmod omap3xxx_timer1_hwmod = { > - .name = "timer1", > - .mpu_irqs = omap3xxx_timer1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs), > - .main_clk = "gpt1_fck", > - .prcm = { > - .omap2 = { > -@@ -624,6 +624,7 @@ static struct omap_hwmod > omap3xxx_timer1_hwmod = { > - static struct omap_hwmod omap3xxx_timer2_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { > - { .irq = 38, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { > -@@ -653,7 +654,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer2_slaves[] = { > - static struct omap_hwmod omap3xxx_timer2_hwmod = { > - .name = "timer2", > - .mpu_irqs = omap3xxx_timer2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs), > - .main_clk = "gpt2_fck", > - .prcm = { > - .omap2 = { > -@@ -674,6 +674,7 @@ static struct omap_hwmod > omap3xxx_timer2_hwmod = { > - static struct omap_hwmod omap3xxx_timer3_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { > - { .irq = 39, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { > -@@ -703,7 +704,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer3_slaves[] = { > - static struct omap_hwmod omap3xxx_timer3_hwmod = { > - .name = "timer3", > - .mpu_irqs = omap3xxx_timer3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs), > - .main_clk = "gpt3_fck", > - .prcm = { > - .omap2 = { > -@@ -724,6 +724,7 @@ static struct omap_hwmod > omap3xxx_timer3_hwmod = { > - static struct omap_hwmod omap3xxx_timer4_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { > - { .irq = 40, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { > -@@ -753,7 +754,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer4_slaves[] = { > - static struct omap_hwmod omap3xxx_timer4_hwmod = { > - .name = "timer4", > - .mpu_irqs = omap3xxx_timer4_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs), > - .main_clk = "gpt4_fck", > - .prcm = { > - .omap2 = { > -@@ -774,6 +774,7 @@ static struct omap_hwmod > omap3xxx_timer4_hwmod = { > - static struct omap_hwmod omap3xxx_timer5_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { > - { .irq = 41, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { > -@@ -803,7 +804,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer5_slaves[] = { > - static struct omap_hwmod omap3xxx_timer5_hwmod = { > - .name = "timer5", > - .mpu_irqs = omap3xxx_timer5_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs), > - .main_clk = "gpt5_fck", > - .prcm = { > - .omap2 = { > -@@ -824,6 +824,7 @@ static struct omap_hwmod > omap3xxx_timer5_hwmod = { > - static struct omap_hwmod omap3xxx_timer6_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { > - { .irq = 42, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { > -@@ -853,7 +854,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer6_slaves[] = { > - static struct omap_hwmod omap3xxx_timer6_hwmod = { > - .name = "timer6", > - .mpu_irqs = omap3xxx_timer6_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs), > - .main_clk = "gpt6_fck", > - .prcm = { > - .omap2 = { > -@@ -874,6 +874,7 @@ static struct omap_hwmod > omap3xxx_timer6_hwmod = { > - static struct omap_hwmod omap3xxx_timer7_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { > - { .irq = 43, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { > -@@ -903,7 +904,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer7_slaves[] = { > - static struct omap_hwmod omap3xxx_timer7_hwmod = { > - .name = "timer7", > - .mpu_irqs = omap3xxx_timer7_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs), > - .main_clk = "gpt7_fck", > - .prcm = { > - .omap2 = { > -@@ -924,6 +924,7 @@ static struct omap_hwmod > omap3xxx_timer7_hwmod = { > - static struct omap_hwmod omap3xxx_timer8_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { > - { .irq = 44, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { > -@@ -953,7 +954,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer8_slaves[] = { > - static struct omap_hwmod omap3xxx_timer8_hwmod = { > - .name = "timer8", > - .mpu_irqs = omap3xxx_timer8_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs), > - .main_clk = "gpt8_fck", > - .prcm = { > - .omap2 = { > -@@ -974,6 +974,7 @@ static struct omap_hwmod > omap3xxx_timer8_hwmod = { > - static struct omap_hwmod omap3xxx_timer9_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { > - { .irq = 45, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { > -@@ -1003,7 +1004,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer9_slaves[] = { > - static struct omap_hwmod omap3xxx_timer9_hwmod = { > - .name = "timer9", > - .mpu_irqs = omap3xxx_timer9_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs), > - .main_clk = "gpt9_fck", > - .prcm = { > - .omap2 = { > -@@ -1024,6 +1024,7 @@ static struct omap_hwmod > omap3xxx_timer9_hwmod = { > - static struct omap_hwmod omap3xxx_timer10_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { > - { .irq = 46, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer10 */ > -@@ -1044,7 +1045,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer10_slaves[] = { > - static struct omap_hwmod omap3xxx_timer10_hwmod = { > - .name = "timer10", > - .mpu_irqs = omap3xxx_timer10_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs), > - .main_clk = "gpt10_fck", > - .prcm = { > - .omap2 = { > -@@ -1065,6 +1065,7 @@ static struct omap_hwmod > omap3xxx_timer10_hwmod = { > - static struct omap_hwmod omap3xxx_timer11_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { > - { .irq = 47, }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> timer11 */ > -@@ -1085,7 +1086,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer11_slaves[] = { > - static struct omap_hwmod omap3xxx_timer11_hwmod = { > - .name = "timer11", > - .mpu_irqs = omap3xxx_timer11_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs), > - .main_clk = "gpt11_fck", > - .prcm = { > - .omap2 = { > -@@ -1106,6 +1106,7 @@ static struct omap_hwmod > omap3xxx_timer11_hwmod = { > - static struct omap_hwmod omap3xxx_timer12_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = { > - { .irq = 95, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { > -@@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer12_slaves[] = { > - static struct omap_hwmod omap3xxx_timer12_hwmod = { > - .name = "timer12", > - .mpu_irqs = omap3xxx_timer12_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs), > - .main_clk = "gpt12_fck", > - .prcm = { > - .omap2 = { > -@@ -1256,6 +1256,7 @@ static struct omap_hwmod_class uart_class = { > - > - static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { > - { .irq = INT_24XX_UART1_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > -@@ -1270,7 +1271,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart1_slaves[] = { > - static struct omap_hwmod omap3xxx_uart1_hwmod = { > - .name = "uart1", > - .mpu_irqs = uart1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), > - .sdma_reqs = uart1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > -@@ -1293,6 +1293,7 @@ static struct omap_hwmod > omap3xxx_uart1_hwmod = { > - > - static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { > - { .irq = INT_24XX_UART2_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > -@@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart2_slaves[] = { > - static struct omap_hwmod omap3xxx_uart2_hwmod = { > - .name = "uart2", > - .mpu_irqs = uart2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), > - .sdma_reqs = uart2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > -@@ -1330,6 +1330,7 @@ static struct omap_hwmod > omap3xxx_uart2_hwmod = { > - > - static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { > - { .irq = INT_24XX_UART3_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > -@@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart3_slaves[] = { > - static struct omap_hwmod omap3xxx_uart3_hwmod = { > - .name = "uart3", > - .mpu_irqs = uart3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), > - .sdma_reqs = uart3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > -@@ -1367,6 +1367,7 @@ static struct omap_hwmod > omap3xxx_uart3_hwmod = { > - > - static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { > - { .irq = INT_36XX_UART4_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { > -@@ -1381,7 +1382,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart4_slaves[] = { > - static struct omap_hwmod omap3xxx_uart4_hwmod = { > - .name = "uart4", > - .mpu_irqs = uart4_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs), > - .sdma_reqs = uart4_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), > - .main_clk = "uart4_fck", > -@@ -1557,6 +1557,7 @@ static struct omap_hwmod_class > omap3xxx_dispc_hwmod_class = { > - > - static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { > - { .irq = 25 }, > -+ { .irq = -1 } > - }; > - > - /* l4_core -> dss_dispc */ > -@@ -1584,7 +1585,6 @@ static struct omap_hwmod > omap3xxx_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap3xxx_dispc_hwmod_class, > - .mpu_irqs = omap3xxx_dispc_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs), > - .main_clk = "dss1_alwon_fck", > - .prcm = { > - .omap2 = { > -@@ -1612,6 +1612,7 @@ static struct omap_hwmod_class > omap3xxx_dsi_hwmod_class = { > - > - static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { > - { .irq = 25 }, > -+ { .irq = -1 } > - }; > - > - /* dss_dsi1 */ > -@@ -1648,7 +1649,6 @@ static struct omap_hwmod > omap3xxx_dss_dsi1_hwmod = { > - .name = "dss_dsi1", > - .class = &omap3xxx_dsi_hwmod_class, > - .mpu_irqs = omap3xxx_dsi1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs), > - .main_clk = "dss1_alwon_fck", > - .prcm = { > - .omap2 = { > -@@ -1783,6 +1783,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { > - > - static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { > - { .irq = INT_24XX_I2C1_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > -@@ -1797,7 +1798,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c1_slaves[] = { > - static struct omap_hwmod omap3xxx_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = i2c1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), > - .sdma_reqs = i2c1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2c1_fck", > -@@ -1825,6 +1825,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { > - > - static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { > - { .irq = INT_24XX_I2C2_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > -@@ -1839,7 +1840,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c2_slaves[] = { > - static struct omap_hwmod omap3xxx_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = i2c2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), > - .sdma_reqs = i2c2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2c2_fck", > -@@ -1867,6 +1867,7 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = { > - > - static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { > - { .irq = INT_34XX_I2C3_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { > -@@ -1881,7 +1882,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c3_slaves[] = { > - static struct omap_hwmod omap3xxx_i2c3_hwmod = { > - .name = "i2c3", > - .mpu_irqs = i2c3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs), > - .sdma_reqs = i2c3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), > - .main_clk = "i2c3_fck", > -@@ -2034,6 +2034,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { > - /* gpio1 */ > - static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { > - { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { > -@@ -2048,7 +2049,6 @@ static struct omap_hwmod > omap3xxx_gpio1_hwmod = { > - .name = "gpio1", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap3xxx_gpio1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), > - .main_clk = "gpio1_ick", > - .opt_clks = gpio1_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), > -@@ -2071,6 +2071,7 @@ static struct omap_hwmod > omap3xxx_gpio1_hwmod = { > - /* gpio2 */ > - static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { > - { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { > -@@ -2085,7 +2086,6 @@ static struct omap_hwmod > omap3xxx_gpio2_hwmod = { > - .name = "gpio2", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap3xxx_gpio2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), > - .main_clk = "gpio2_ick", > - .opt_clks = gpio2_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), > -@@ -2108,6 +2108,7 @@ static struct omap_hwmod > omap3xxx_gpio2_hwmod = { > - /* gpio3 */ > - static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { > - { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { > -@@ -2122,7 +2123,6 @@ static struct omap_hwmod > omap3xxx_gpio3_hwmod = { > - .name = "gpio3", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap3xxx_gpio3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), > - .main_clk = "gpio3_ick", > - .opt_clks = gpio3_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), > -@@ -2145,6 +2145,7 @@ static struct omap_hwmod > omap3xxx_gpio3_hwmod = { > - /* gpio4 */ > - static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { > - { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { > -@@ -2159,7 +2160,6 @@ static struct omap_hwmod > omap3xxx_gpio4_hwmod = { > - .name = "gpio4", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap3xxx_gpio4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), > - .main_clk = "gpio4_ick", > - .opt_clks = gpio4_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), > -@@ -2182,6 +2182,7 @@ static struct omap_hwmod > omap3xxx_gpio4_hwmod = { > - /* gpio5 */ > - static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = { > - { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { > -@@ -2196,7 +2197,6 @@ static struct omap_hwmod > omap3xxx_gpio5_hwmod = { > - .name = "gpio5", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap3xxx_gpio5_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), > - .main_clk = "gpio5_ick", > - .opt_clks = gpio5_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), > -@@ -2219,6 +2219,7 @@ static struct omap_hwmod > omap3xxx_gpio5_hwmod = { > - /* gpio6 */ > - static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = { > - { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { > -@@ -2233,7 +2234,6 @@ static struct omap_hwmod > omap3xxx_gpio6_hwmod = { > - .name = "gpio6", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap3xxx_gpio6_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), > - .main_clk = "gpio6_ick", > - .opt_clks = gpio6_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), > -@@ -2292,6 +2292,7 @@ static struct omap_hwmod_irq_info > omap3xxx_dma_system_irqs[] = { > - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ > - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ > - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { > -@@ -2326,7 +2327,6 @@ static struct omap_hwmod > omap3xxx_dma_system_hwmod = { > - .name = "dma", > - .class = &omap3xxx_dma_hwmod_class, > - .mpu_irqs = omap3xxx_dma_system_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs), > - .main_clk = "core_l3_ick", > - .prcm = { > - .omap2 = { > -@@ -2371,6 +2371,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp1_irqs[] = { > - { .name = "irq", .irq = 16 }, > - { .name = "tx", .irq = 59 }, > - { .name = "rx", .irq = 60 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { > -@@ -2406,7 +2407,6 @@ static struct omap_hwmod > omap3xxx_mcbsp1_hwmod = { > - .name = "mcbsp1", > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs), > - .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), > - .main_clk = "mcbsp1_fck", > -@@ -2429,6 +2429,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp2_irqs[] = { > - { .name = "irq", .irq = 17 }, > - { .name = "tx", .irq = 62 }, > - { .name = "rx", .irq = 63 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { > -@@ -2469,7 +2470,6 @@ static struct omap_hwmod > omap3xxx_mcbsp2_hwmod = { > - .name = "mcbsp2", > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs), > - .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), > - .main_clk = "mcbsp2_fck", > -@@ -2493,6 +2493,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp3_irqs[] = { > - { .name = "irq", .irq = 22 }, > - { .name = "tx", .irq = 89 }, > - { .name = "rx", .irq = 90 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { > -@@ -2532,7 +2533,6 @@ static struct omap_hwmod > omap3xxx_mcbsp3_hwmod = { > - .name = "mcbsp3", > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs), > - .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), > - .main_clk = "mcbsp3_fck", > -@@ -2556,6 +2556,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp4_irqs[] = { > - { .name = "irq", .irq = 23 }, > - { .name = "tx", .irq = 54 }, > - { .name = "rx", .irq = 55 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { > -@@ -2591,7 +2592,6 @@ static struct omap_hwmod > omap3xxx_mcbsp4_hwmod = { > - .name = "mcbsp4", > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs), > - .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), > - .main_clk = "mcbsp4_fck", > -@@ -2614,6 +2614,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp5_irqs[] = { > - { .name = "irq", .irq = 27 }, > - { .name = "tx", .irq = 81 }, > - { .name = "rx", .irq = 82 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { > -@@ -2649,7 +2650,6 @@ static struct omap_hwmod > omap3xxx_mcbsp5_hwmod = { > - .name = "mcbsp5", > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp5_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs), > - .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), > - .main_clk = "mcbsp5_fck", > -@@ -2682,6 +2682,7 @@ static struct omap_hwmod_class > omap3xxx_mcbsp_sidetone_hwmod_class = { > - /* mcbsp2_sidetone */ > - static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { > - { .name = "irq", .irq = 4 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] > = { > -@@ -2712,7 +2713,6 @@ static struct omap_hwmod > omap3xxx_mcbsp2_sidetone_hwmod = { > - .name = "mcbsp2_sidetone", > - .class = &omap3xxx_mcbsp_sidetone_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs), > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap2 = { > -@@ -2731,6 +2731,7 @@ static struct omap_hwmod > omap3xxx_mcbsp2_sidetone_hwmod = { > - /* mcbsp3_sidetone */ > - static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { > - { .name = "irq", .irq = 5 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] > = { > -@@ -2761,7 +2762,6 @@ static struct omap_hwmod > omap3xxx_mcbsp3_sidetone_hwmod = { > - .name = "mcbsp3_sidetone", > - .class = &omap3xxx_mcbsp_sidetone_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs), > - .main_clk = "mcbsp3_fck", > - .prcm = { > - .omap2 = { > -@@ -2931,6 +2931,7 @@ static struct omap_hwmod_class > omap3xxx_mailbox_hwmod_class = { > - static struct omap_hwmod omap3xxx_mailbox_hwmod; > - static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { > - { .irq = 26 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { > -@@ -2959,7 +2960,6 @@ static struct omap_hwmod > omap3xxx_mailbox_hwmod = { > - .name = "mailbox", > - .class = &omap3xxx_mailbox_hwmod_class, > - .mpu_irqs = omap3xxx_mailbox_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mailbox_irqs), > - .main_clk = "mailboxes_ick", > - .prcm = { > - .omap2 = { > -@@ -3046,6 +3046,7 @@ static struct omap_hwmod_class > omap34xx_mcspi_class = { > - /* mcspi1 */ > - static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { > - { .name = "irq", .irq = 65 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { > -@@ -3070,7 +3071,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - static struct omap_hwmod omap34xx_mcspi1 = { > - .name = "mcspi1", > - .mpu_irqs = omap34xx_mcspi1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs), > - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > -@@ -3093,6 +3093,7 @@ static struct omap_hwmod omap34xx_mcspi1 = { > - /* mcspi2 */ > - static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { > - { .name = "irq", .irq = 66 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { > -@@ -3113,7 +3114,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - static struct omap_hwmod omap34xx_mcspi2 = { > - .name = "mcspi2", > - .mpu_irqs = omap34xx_mcspi2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs), > - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > -@@ -3136,6 +3136,7 @@ static struct omap_hwmod omap34xx_mcspi2 = { > - /* mcspi3 */ > - static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = { > - { .name = "irq", .irq = 91 }, /* 91 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { > -@@ -3156,7 +3157,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi3_dev_attr = { > - static struct omap_hwmod omap34xx_mcspi3 = { > - .name = "mcspi3", > - .mpu_irqs = omap34xx_mcspi3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs), > - .sdma_reqs = omap34xx_mcspi3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), > - .main_clk = "mcspi3_fck", > -@@ -3179,6 +3179,7 @@ static struct omap_hwmod omap34xx_mcspi3 = { > - /* SPI4 */ > - static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { > - { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */ > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { > -@@ -3197,7 +3198,6 @@ static struct omap2_mcspi_dev_attr > omap_mcspi4_dev_attr = { > - static struct omap_hwmod omap34xx_mcspi4 = { > - .name = "mcspi4", > - .mpu_irqs = omap34xx_mcspi4_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs), > - .sdma_reqs = omap34xx_mcspi4_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), > - .main_clk = "mcspi4_fck", > -@@ -3241,12 +3241,12 @@ static struct omap_hwmod_irq_info > omap3xxx_usbhsotg_mpu_irqs[] = { > - > - { .name = "mc", .irq = 92 }, > - { .name = "dma", .irq = 93 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { > - .name = "usb_otg_hs", > - .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs), > - .main_clk = "hsotgusb_ick", > - .prcm = { > - .omap2 = { > -@@ -3278,6 +3278,7 @@ static struct omap_hwmod > omap3xxx_usbhsotg_hwmod = { > - static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { > - > - { .name = "mc", .irq = 71 }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_class am35xx_usbotg_class = { > -@@ -3288,7 +3289,6 @@ static struct omap_hwmod_class > am35xx_usbotg_class = { > - static struct omap_hwmod am35xx_usbhsotg_hwmod = { > - .name = "am35x_otg_hs", > - .mpu_irqs = am35xx_usbhsotg_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs), > - .main_clk = NULL, > - .prcm = { > - .omap2 = { > -@@ -3324,6 +3324,7 @@ static struct omap_hwmod_class > omap34xx_mmc_class = { > - > - static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { > - { .irq = 83, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { > -@@ -3346,7 +3347,6 @@ static struct omap_mmc_dev_attr mmc1_dev_attr > = { > - static struct omap_hwmod omap3xxx_mmc1_hwmod = { > - .name = "mmc1", > - .mpu_irqs = omap34xx_mmc1_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs), > - .sdma_reqs = omap34xx_mmc1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), > - .opt_clks = omap34xx_mmc1_opt_clks, > -@@ -3372,6 +3372,7 @@ static struct omap_hwmod > omap3xxx_mmc1_hwmod = { > - > - static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { > - { .irq = INT_24XX_MMC2_IRQ, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { > -@@ -3390,7 +3391,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_mmc2_slaves[] = { > - static struct omap_hwmod omap3xxx_mmc2_hwmod = { > - .name = "mmc2", > - .mpu_irqs = omap34xx_mmc2_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs), > - .sdma_reqs = omap34xx_mmc2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), > - .opt_clks = omap34xx_mmc2_opt_clks, > -@@ -3415,6 +3415,7 @@ static struct omap_hwmod > omap3xxx_mmc2_hwmod = { > - > - static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { > - { .irq = 94, }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { > -@@ -3433,7 +3434,6 @@ static struct omap_hwmod_ocp_if > *omap3xxx_mmc3_slaves[] = { > - static struct omap_hwmod omap3xxx_mmc3_hwmod = { > - .name = "mmc3", > - .mpu_irqs = omap34xx_mmc3_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs), > - .sdma_reqs = omap34xx_mmc3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), > - .opt_clks = omap34xx_mmc3_opt_clks, > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index f8ccc4a..f7ff937 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -115,6 +115,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_dmm_slaves[] = { > - > - static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { > - { .irq = 113 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod omap44xx_dmm_hwmod = { > -@@ -123,7 +124,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod > = { > - .slaves = omap44xx_dmm_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), > - .mpu_irqs = omap44xx_dmm_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmm_irqs), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -@@ -268,6 +268,7 @@ static struct omap_hwmod_ocp_if > omap44xx_mmc2__l3_main_1 = { > - static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { > - { .irq = 9 + OMAP44XX_IRQ_GIC_START }, > - { .irq = 10 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { > -@@ -303,7 +304,6 @@ static struct omap_hwmod > omap44xx_l3_main_1_hwmod = { > - .name = "l3_main_1", > - .class = &omap44xx_l3_hwmod_class, > - .mpu_irqs = omap44xx_l3_targ_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs), > - .slaves = omap44xx_l3_main_1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -673,6 +673,7 @@ static struct omap_hwmod_class > omap44xx_aess_hwmod_class = { > - /* aess */ > - static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = { > - { .irq = 99 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { > -@@ -737,7 +738,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = > { > - .name = "aess", > - .class = &omap44xx_aess_hwmod_class, > - .mpu_irqs = omap44xx_aess_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs), > - .sdma_reqs = omap44xx_aess_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), > - .main_clk = "aess_fck", > -@@ -876,6 +876,7 @@ static struct omap_hwmod_irq_info > omap44xx_dma_system_irqs[] = { > - { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START }, > - { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START }, > - { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - /* dma_system master ports */ > -@@ -910,7 +911,6 @@ static struct omap_hwmod > omap44xx_dma_system_hwmod = { > - .name = "dma_system", > - .class = &omap44xx_dma_hwmod_class, > - .mpu_irqs = omap44xx_dma_system_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs), > - .main_clk = "l3_div_ck", > - .prcm = { > - .omap4 = { > -@@ -949,6 +949,7 @@ static struct omap_hwmod_class > omap44xx_dmic_hwmod_class = { > - static struct omap_hwmod omap44xx_dmic_hwmod; > - static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { > - { .irq = 114 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { > -@@ -1001,7 +1002,6 @@ static struct omap_hwmod > omap44xx_dmic_hwmod = { > - .name = "dmic", > - .class = &omap44xx_dmic_hwmod_class, > - .mpu_irqs = omap44xx_dmic_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs), > - .sdma_reqs = omap44xx_dmic_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), > - .main_clk = "dmic_fck", > -@@ -1027,6 +1027,7 @@ static struct omap_hwmod_class > omap44xx_dsp_hwmod_class = { > - /* dsp */ > - static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = { > - { .irq = 28 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = { > -@@ -1083,7 +1084,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod > = { > - .name = "dsp", > - .class = &omap44xx_dsp_hwmod_class, > - .mpu_irqs = omap44xx_dsp_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs), > - .rst_lines = omap44xx_dsp_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), > - .main_clk = "dsp_fck", > -@@ -1216,6 +1216,7 @@ static struct omap_hwmod_class > omap44xx_dispc_hwmod_class = { > - static struct omap_hwmod omap44xx_dss_dispc_hwmod; > - static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { > - { .irq = 25 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { > -@@ -1268,7 +1269,6 @@ static struct omap_hwmod > omap44xx_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap44xx_dispc_hwmod_class, > - .mpu_irqs = omap44xx_dss_dispc_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs), > - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), > - .main_clk = "dss_fck", > -@@ -1307,6 +1307,7 @@ static struct omap_hwmod_class > omap44xx_dsi_hwmod_class = { > - static struct omap_hwmod omap44xx_dss_dsi1_hwmod; > - static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { > - { .irq = 53 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { > -@@ -1359,7 +1360,6 @@ static struct omap_hwmod > omap44xx_dss_dsi1_hwmod = { > - .name = "dss_dsi1", > - .class = &omap44xx_dsi_hwmod_class, > - .mpu_irqs = omap44xx_dss_dsi1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs), > - .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), > - .main_clk = "dss_fck", > -@@ -1377,6 +1377,7 @@ static struct omap_hwmod > omap44xx_dss_dsi1_hwmod = { > - static struct omap_hwmod omap44xx_dss_dsi2_hwmod; > - static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { > - { .irq = 84 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { > -@@ -1429,7 +1430,6 @@ static struct omap_hwmod > omap44xx_dss_dsi2_hwmod = { > - .name = "dss_dsi2", > - .class = &omap44xx_dsi_hwmod_class, > - .mpu_irqs = omap44xx_dss_dsi2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs), > - .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), > - .main_clk = "dss_fck", > -@@ -1467,6 +1467,7 @@ static struct omap_hwmod_class > omap44xx_hdmi_hwmod_class = { > - static struct omap_hwmod omap44xx_dss_hdmi_hwmod; > - static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { > - { .irq = 101 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { > -@@ -1519,7 +1520,6 @@ static struct omap_hwmod > omap44xx_dss_hdmi_hwmod = { > - .name = "dss_hdmi", > - .class = &omap44xx_hdmi_hwmod_class, > - .mpu_irqs = omap44xx_dss_hdmi_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs), > - .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), > - .main_clk = "dss_fck", > -@@ -1717,6 +1717,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { > - static struct omap_hwmod omap44xx_gpio1_hwmod; > - static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = { > - { .irq = 29 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { > -@@ -1750,7 +1751,6 @@ static struct omap_hwmod > omap44xx_gpio1_hwmod = { > - .name = "gpio1", > - .class = &omap44xx_gpio_hwmod_class, > - .mpu_irqs = omap44xx_gpio1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs), > - .main_clk = "gpio1_ick", > - .prcm = { > - .omap4 = { > -@@ -1769,6 +1769,7 @@ static struct omap_hwmod > omap44xx_gpio1_hwmod = { > - static struct omap_hwmod omap44xx_gpio2_hwmod; > - static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = { > - { .irq = 30 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { > -@@ -1803,7 +1804,6 @@ static struct omap_hwmod > omap44xx_gpio2_hwmod = { > - .class = &omap44xx_gpio_hwmod_class, > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs), > - .main_clk = "gpio2_ick", > - .prcm = { > - .omap4 = { > -@@ -1822,6 +1822,7 @@ static struct omap_hwmod > omap44xx_gpio2_hwmod = { > - static struct omap_hwmod omap44xx_gpio3_hwmod; > - static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = { > - { .irq = 31 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { > -@@ -1856,7 +1857,6 @@ static struct omap_hwmod > omap44xx_gpio3_hwmod = { > - .class = &omap44xx_gpio_hwmod_class, > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs), > - .main_clk = "gpio3_ick", > - .prcm = { > - .omap4 = { > -@@ -1875,6 +1875,7 @@ static struct omap_hwmod > omap44xx_gpio3_hwmod = { > - static struct omap_hwmod omap44xx_gpio4_hwmod; > - static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = { > - { .irq = 32 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { > -@@ -1909,7 +1910,6 @@ static struct omap_hwmod > omap44xx_gpio4_hwmod = { > - .class = &omap44xx_gpio_hwmod_class, > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs), > - .main_clk = "gpio4_ick", > - .prcm = { > - .omap4 = { > -@@ -1928,6 +1928,7 @@ static struct omap_hwmod > omap44xx_gpio4_hwmod = { > - static struct omap_hwmod omap44xx_gpio5_hwmod; > - static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = { > - { .irq = 33 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { > -@@ -1962,7 +1963,6 @@ static struct omap_hwmod > omap44xx_gpio5_hwmod = { > - .class = &omap44xx_gpio_hwmod_class, > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio5_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs), > - .main_clk = "gpio5_ick", > - .prcm = { > - .omap4 = { > -@@ -1981,6 +1981,7 @@ static struct omap_hwmod > omap44xx_gpio5_hwmod = { > - static struct omap_hwmod omap44xx_gpio6_hwmod; > - static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = { > - { .irq = 34 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { > -@@ -2015,7 +2016,6 @@ static struct omap_hwmod > omap44xx_gpio6_hwmod = { > - .class = &omap44xx_gpio_hwmod_class, > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio6_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs), > - .main_clk = "gpio6_ick", > - .prcm = { > - .omap4 = { > -@@ -2059,6 +2059,7 @@ static struct omap_hwmod_irq_info > omap44xx_hsi_irqs[] = { > - { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START }, > - { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START }, > - { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - /* hsi master ports */ > -@@ -2093,7 +2094,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod > = { > - .name = "hsi", > - .class = &omap44xx_hsi_hwmod_class, > - .mpu_irqs = omap44xx_hsi_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs), > - .main_clk = "hsi_fck", > - .prcm = { > - .omap4 = { > -@@ -2132,6 +2132,7 @@ static struct omap_hwmod_class > omap44xx_i2c_hwmod_class = { > - static struct omap_hwmod omap44xx_i2c1_hwmod; > - static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { > - { .irq = 56 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { > -@@ -2167,7 +2168,6 @@ static struct omap_hwmod > omap44xx_i2c1_hwmod = { > - .class = &omap44xx_i2c_hwmod_class, > - .flags = HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs), > - .sdma_reqs = omap44xx_i2c1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), > - .main_clk = "i2c1_fck", > -@@ -2185,6 +2185,7 @@ static struct omap_hwmod > omap44xx_i2c1_hwmod = { > - static struct omap_hwmod omap44xx_i2c2_hwmod; > - static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { > - { .irq = 57 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { > -@@ -2220,7 +2221,6 @@ static struct omap_hwmod > omap44xx_i2c2_hwmod = { > - .class = &omap44xx_i2c_hwmod_class, > - .flags = HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs), > - .sdma_reqs = omap44xx_i2c2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), > - .main_clk = "i2c2_fck", > -@@ -2238,6 +2238,7 @@ static struct omap_hwmod > omap44xx_i2c2_hwmod = { > - static struct omap_hwmod omap44xx_i2c3_hwmod; > - static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { > - { .irq = 61 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { > -@@ -2273,7 +2274,6 @@ static struct omap_hwmod > omap44xx_i2c3_hwmod = { > - .class = &omap44xx_i2c_hwmod_class, > - .flags = HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs), > - .sdma_reqs = omap44xx_i2c3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), > - .main_clk = "i2c3_fck", > -@@ -2291,6 +2291,7 @@ static struct omap_hwmod > omap44xx_i2c3_hwmod = { > - static struct omap_hwmod omap44xx_i2c4_hwmod; > - static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { > - { .irq = 62 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { > -@@ -2326,7 +2327,6 @@ static struct omap_hwmod > omap44xx_i2c4_hwmod = { > - .class = &omap44xx_i2c_hwmod_class, > - .flags = HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs), > - .sdma_reqs = omap44xx_i2c4_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), > - .main_clk = "i2c4_fck", > -@@ -2352,6 +2352,7 @@ static struct omap_hwmod_class > omap44xx_ipu_hwmod_class = { > - /* ipu */ > - static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = { > - { .irq = 100 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = { > -@@ -2418,7 +2419,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod > = { > - .name = "ipu", > - .class = &omap44xx_ipu_hwmod_class, > - .mpu_irqs = omap44xx_ipu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs), > - .rst_lines = omap44xx_ipu_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), > - .main_clk = "ipu_fck", > -@@ -2459,6 +2459,7 @@ static struct omap_hwmod_class > omap44xx_iss_hwmod_class = { > - /* iss */ > - static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = { > - { .irq = 24 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { > -@@ -2504,7 +2505,6 @@ static struct omap_hwmod omap44xx_iss_hwmod > = { > - .name = "iss", > - .class = &omap44xx_iss_hwmod_class, > - .mpu_irqs = omap44xx_iss_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs), > - .sdma_reqs = omap44xx_iss_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), > - .main_clk = "iss_fck", > -@@ -2536,6 +2536,7 @@ static struct omap_hwmod_irq_info > omap44xx_iva_irqs[] = { > - { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START }, > - { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START }, > - { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_rst_info omap44xx_iva_resets[] = { > -@@ -2614,7 +2615,6 @@ static struct omap_hwmod omap44xx_iva_hwmod > = { > - .name = "iva", > - .class = &omap44xx_iva_hwmod_class, > - .mpu_irqs = omap44xx_iva_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs), > - .rst_lines = omap44xx_iva_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), > - .main_clk = "iva_fck", > -@@ -2657,6 +2657,7 @@ static struct omap_hwmod_class > omap44xx_kbd_hwmod_class = { > - static struct omap_hwmod omap44xx_kbd_hwmod; > - static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = { > - { .irq = 120 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { > -@@ -2686,7 +2687,6 @@ static struct omap_hwmod > omap44xx_kbd_hwmod = { > - .name = "kbd", > - .class = &omap44xx_kbd_hwmod_class, > - .mpu_irqs = omap44xx_kbd_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs), > - .main_clk = "kbd_fck", > - .prcm = { > - .omap4 = { > -@@ -2722,6 +2722,7 @@ static struct omap_hwmod_class > omap44xx_mailbox_hwmod_class = { > - static struct omap_hwmod omap44xx_mailbox_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { > - { .irq = 26 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { > -@@ -2751,7 +2752,6 @@ static struct omap_hwmod > omap44xx_mailbox_hwmod = { > - .name = "mailbox", > - .class = &omap44xx_mailbox_hwmod_class, > - .mpu_irqs = omap44xx_mailbox_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs), > - .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, > -@@ -2785,6 +2785,7 @@ static struct omap_hwmod_class > omap44xx_mcbsp_hwmod_class = { > - static struct omap_hwmod omap44xx_mcbsp1_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { > - { .irq = 17 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { > -@@ -2840,7 +2841,6 @@ static struct omap_hwmod > omap44xx_mcbsp1_hwmod = { > - .name = "mcbsp1", > - .class = &omap44xx_mcbsp_hwmod_class, > - .mpu_irqs = omap44xx_mcbsp1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs), > - .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), > - .main_clk = "mcbsp1_fck", > -@@ -2858,6 +2858,7 @@ static struct omap_hwmod > omap44xx_mcbsp1_hwmod = { > - static struct omap_hwmod omap44xx_mcbsp2_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { > - { .irq = 22 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { > -@@ -2913,7 +2914,6 @@ static struct omap_hwmod > omap44xx_mcbsp2_hwmod = { > - .name = "mcbsp2", > - .class = &omap44xx_mcbsp_hwmod_class, > - .mpu_irqs = omap44xx_mcbsp2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs), > - .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), > - .main_clk = "mcbsp2_fck", > -@@ -2931,6 +2931,7 @@ static struct omap_hwmod > omap44xx_mcbsp2_hwmod = { > - static struct omap_hwmod omap44xx_mcbsp3_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { > - { .irq = 23 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { > -@@ -2986,7 +2987,6 @@ static struct omap_hwmod > omap44xx_mcbsp3_hwmod = { > - .name = "mcbsp3", > - .class = &omap44xx_mcbsp_hwmod_class, > - .mpu_irqs = omap44xx_mcbsp3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs), > - .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), > - .main_clk = "mcbsp3_fck", > -@@ -3004,6 +3004,7 @@ static struct omap_hwmod > omap44xx_mcbsp3_hwmod = { > - static struct omap_hwmod omap44xx_mcbsp4_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { > - { .irq = 16 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { > -@@ -3038,7 +3039,6 @@ static struct omap_hwmod > omap44xx_mcbsp4_hwmod = { > - .name = "mcbsp4", > - .class = &omap44xx_mcbsp_hwmod_class, > - .mpu_irqs = omap44xx_mcbsp4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs), > - .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), > - .main_clk = "mcbsp4_fck", > -@@ -3077,6 +3077,7 @@ static struct omap_hwmod_class > omap44xx_mcpdm_hwmod_class = { > - static struct omap_hwmod omap44xx_mcpdm_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { > - { .irq = 112 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { > -@@ -3130,7 +3131,6 @@ static struct omap_hwmod > omap44xx_mcpdm_hwmod = { > - .name = "mcpdm", > - .class = &omap44xx_mcpdm_hwmod_class, > - .mpu_irqs = omap44xx_mcpdm_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs), > - .sdma_reqs = omap44xx_mcpdm_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), > - .main_clk = "mcpdm_fck", > -@@ -3170,6 +3170,7 @@ static struct omap_hwmod_class > omap44xx_mcspi_hwmod_class = { > - static struct omap_hwmod omap44xx_mcspi1_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = { > - { .irq = 65 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { > -@@ -3215,7 +3216,6 @@ static struct omap_hwmod > omap44xx_mcspi1_hwmod = { > - .name = "mcspi1", > - .class = &omap44xx_mcspi_hwmod_class, > - .mpu_irqs = omap44xx_mcspi1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs), > - .sdma_reqs = omap44xx_mcspi1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > -@@ -3234,6 +3234,7 @@ static struct omap_hwmod > omap44xx_mcspi1_hwmod = { > - static struct omap_hwmod omap44xx_mcspi2_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = { > - { .irq = 66 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { > -@@ -3275,7 +3276,6 @@ static struct omap_hwmod > omap44xx_mcspi2_hwmod = { > - .name = "mcspi2", > - .class = &omap44xx_mcspi_hwmod_class, > - .mpu_irqs = omap44xx_mcspi2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs), > - .sdma_reqs = omap44xx_mcspi2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > -@@ -3294,6 +3294,7 @@ static struct omap_hwmod > omap44xx_mcspi2_hwmod = { > - static struct omap_hwmod omap44xx_mcspi3_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = { > - { .irq = 91 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { > -@@ -3335,7 +3336,6 @@ static struct omap_hwmod > omap44xx_mcspi3_hwmod = { > - .name = "mcspi3", > - .class = &omap44xx_mcspi_hwmod_class, > - .mpu_irqs = omap44xx_mcspi3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs), > - .sdma_reqs = omap44xx_mcspi3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), > - .main_clk = "mcspi3_fck", > -@@ -3354,6 +3354,7 @@ static struct omap_hwmod > omap44xx_mcspi3_hwmod = { > - static struct omap_hwmod omap44xx_mcspi4_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { > - { .irq = 48 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { > -@@ -3393,7 +3394,6 @@ static struct omap_hwmod > omap44xx_mcspi4_hwmod = { > - .name = "mcspi4", > - .class = &omap44xx_mcspi_hwmod_class, > - .mpu_irqs = omap44xx_mcspi4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs), > - .sdma_reqs = omap44xx_mcspi4_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), > - .main_clk = "mcspi4_fck", > -@@ -3434,6 +3434,7 @@ static struct omap_hwmod_class > omap44xx_mmc_hwmod_class = { > - > - static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { > - { .irq = 83 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { > -@@ -3478,7 +3479,6 @@ static struct omap_hwmod > omap44xx_mmc1_hwmod = { > - .name = "mmc1", > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs), > - .sdma_reqs = omap44xx_mmc1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), > - .main_clk = "mmc1_fck", > -@@ -3498,6 +3498,7 @@ static struct omap_hwmod > omap44xx_mmc1_hwmod = { > - /* mmc2 */ > - static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { > - { .irq = 86 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { > -@@ -3537,7 +3538,6 @@ static struct omap_hwmod > omap44xx_mmc2_hwmod = { > - .name = "mmc2", > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs), > - .sdma_reqs = omap44xx_mmc2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), > - .main_clk = "mmc2_fck", > -@@ -3557,6 +3557,7 @@ static struct omap_hwmod > omap44xx_mmc2_hwmod = { > - static struct omap_hwmod omap44xx_mmc3_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { > - { .irq = 94 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { > -@@ -3591,7 +3592,6 @@ static struct omap_hwmod > omap44xx_mmc3_hwmod = { > - .name = "mmc3", > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs), > - .sdma_reqs = omap44xx_mmc3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), > - .main_clk = "mmc3_fck", > -@@ -3609,6 +3609,7 @@ static struct omap_hwmod > omap44xx_mmc3_hwmod = { > - static struct omap_hwmod omap44xx_mmc4_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { > - { .irq = 96 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { > -@@ -3643,7 +3644,7 @@ static struct omap_hwmod > omap44xx_mmc4_hwmod = { > - .name = "mmc4", > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs), > -+ > - .sdma_reqs = omap44xx_mmc4_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), > - .main_clk = "mmc4_fck", > -@@ -3661,6 +3662,7 @@ static struct omap_hwmod > omap44xx_mmc4_hwmod = { > - static struct omap_hwmod omap44xx_mmc5_hwmod; > - static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { > - { .irq = 59 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { > -@@ -3695,7 +3697,6 @@ static struct omap_hwmod > omap44xx_mmc5_hwmod = { > - .name = "mmc5", > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc5_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs), > - .sdma_reqs = omap44xx_mmc5_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), > - .main_clk = "mmc5_fck", > -@@ -3723,6 +3724,7 @@ static struct omap_hwmod_irq_info > omap44xx_mpu_irqs[] = { > - { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START }, > - { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START }, > - { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - /* mpu master ports */ > -@@ -3737,7 +3739,6 @@ static struct omap_hwmod > omap44xx_mpu_hwmod = { > - .class = &omap44xx_mpu_hwmod_class, > - .flags = (HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET), > - .mpu_irqs = omap44xx_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs), > - .main_clk = "dpll_mpu_m2_ck", > - .prcm = { > - .omap4 = { > -@@ -3779,6 +3780,7 @@ static struct omap_hwmod_class > omap44xx_smartreflex_hwmod_class = { > - static struct omap_hwmod omap44xx_smartreflex_core_hwmod; > - static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { > - { .irq = 19 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] > = { > -@@ -3808,7 +3810,7 @@ static struct omap_hwmod > omap44xx_smartreflex_core_hwmod = { > - .name = "smartreflex_core", > - .class = &omap44xx_smartreflex_hwmod_class, > - .mpu_irqs = omap44xx_smartreflex_core_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs), > -+ > - .main_clk = "smartreflex_core_fck", > - .vdd_name = "core", > - .prcm = { > -@@ -3825,6 +3827,7 @@ static struct omap_hwmod > omap44xx_smartreflex_core_hwmod = { > - static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; > - static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { > - { .irq = 102 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = > { > -@@ -3854,7 +3857,6 @@ static struct omap_hwmod > omap44xx_smartreflex_iva_hwmod = { > - .name = "smartreflex_iva", > - .class = &omap44xx_smartreflex_hwmod_class, > - .mpu_irqs = omap44xx_smartreflex_iva_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs), > - .main_clk = "smartreflex_iva_fck", > - .vdd_name = "iva", > - .prcm = { > -@@ -3871,6 +3873,7 @@ static struct omap_hwmod > omap44xx_smartreflex_iva_hwmod = { > - static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; > - static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { > - { .irq = 18 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] > = { > -@@ -3900,7 +3903,6 @@ static struct omap_hwmod > omap44xx_smartreflex_mpu_hwmod = { > - .name = "smartreflex_mpu", > - .class = &omap44xx_smartreflex_hwmod_class, > - .mpu_irqs = omap44xx_smartreflex_mpu_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs), > - .main_clk = "smartreflex_mpu_fck", > - .vdd_name = "mpu", > - .prcm = { > -@@ -4016,6 +4018,7 @@ static struct omap_hwmod_class > omap44xx_timer_hwmod_class = { > - static struct omap_hwmod omap44xx_timer1_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { > - { .irq = 37 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { > -@@ -4045,7 +4048,6 @@ static struct omap_hwmod > omap44xx_timer1_hwmod = { > - .name = "timer1", > - .class = &omap44xx_timer_1ms_hwmod_class, > - .mpu_irqs = omap44xx_timer1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs), > - .main_clk = "timer1_fck", > - .prcm = { > - .omap4 = { > -@@ -4061,6 +4063,7 @@ static struct omap_hwmod > omap44xx_timer1_hwmod = { > - static struct omap_hwmod omap44xx_timer2_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = { > - { .irq = 38 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { > -@@ -4090,7 +4093,6 @@ static struct omap_hwmod > omap44xx_timer2_hwmod = { > - .name = "timer2", > - .class = &omap44xx_timer_1ms_hwmod_class, > - .mpu_irqs = omap44xx_timer2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs), > - .main_clk = "timer2_fck", > - .prcm = { > - .omap4 = { > -@@ -4106,6 +4108,7 @@ static struct omap_hwmod > omap44xx_timer2_hwmod = { > - static struct omap_hwmod omap44xx_timer3_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = { > - { .irq = 39 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { > -@@ -4135,7 +4138,6 @@ static struct omap_hwmod > omap44xx_timer3_hwmod = { > - .name = "timer3", > - .class = &omap44xx_timer_hwmod_class, > - .mpu_irqs = omap44xx_timer3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs), > - .main_clk = "timer3_fck", > - .prcm = { > - .omap4 = { > -@@ -4151,6 +4153,7 @@ static struct omap_hwmod > omap44xx_timer3_hwmod = { > - static struct omap_hwmod omap44xx_timer4_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = { > - { .irq = 40 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { > -@@ -4180,7 +4183,6 @@ static struct omap_hwmod > omap44xx_timer4_hwmod = { > - .name = "timer4", > - .class = &omap44xx_timer_hwmod_class, > - .mpu_irqs = omap44xx_timer4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs), > - .main_clk = "timer4_fck", > - .prcm = { > - .omap4 = { > -@@ -4196,6 +4198,7 @@ static struct omap_hwmod > omap44xx_timer4_hwmod = { > - static struct omap_hwmod omap44xx_timer5_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = { > - { .irq = 41 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { > -@@ -4244,7 +4247,6 @@ static struct omap_hwmod > omap44xx_timer5_hwmod = { > - .name = "timer5", > - .class = &omap44xx_timer_hwmod_class, > - .mpu_irqs = omap44xx_timer5_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs), > - .main_clk = "timer5_fck", > - .prcm = { > - .omap4 = { > -@@ -4260,6 +4262,7 @@ static struct omap_hwmod > omap44xx_timer5_hwmod = { > - static struct omap_hwmod omap44xx_timer6_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = { > - { .irq = 42 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { > -@@ -4308,7 +4311,7 @@ static struct omap_hwmod > omap44xx_timer6_hwmod = { > - .name = "timer6", > - .class = &omap44xx_timer_hwmod_class, > - .mpu_irqs = omap44xx_timer6_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs), > -+ > - .main_clk = "timer6_fck", > - .prcm = { > - .omap4 = { > -@@ -4324,6 +4327,7 @@ static struct omap_hwmod > omap44xx_timer6_hwmod = { > - static struct omap_hwmod omap44xx_timer7_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = { > - { .irq = 43 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { > -@@ -4372,7 +4376,6 @@ static struct omap_hwmod > omap44xx_timer7_hwmod = { > - .name = "timer7", > - .class = &omap44xx_timer_hwmod_class, > - .mpu_irqs = omap44xx_timer7_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs), > - .main_clk = "timer7_fck", > - .prcm = { > - .omap4 = { > -@@ -4388,6 +4391,7 @@ static struct omap_hwmod > omap44xx_timer7_hwmod = { > - static struct omap_hwmod omap44xx_timer8_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = { > - { .irq = 44 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { > -@@ -4436,7 +4440,6 @@ static struct omap_hwmod > omap44xx_timer8_hwmod = { > - .name = "timer8", > - .class = &omap44xx_timer_hwmod_class, > - .mpu_irqs = omap44xx_timer8_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs), > - .main_clk = "timer8_fck", > - .prcm = { > - .omap4 = { > -@@ -4452,6 +4455,7 @@ static struct omap_hwmod > omap44xx_timer8_hwmod = { > - static struct omap_hwmod omap44xx_timer9_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = { > - { .irq = 45 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { > -@@ -4481,7 +4485,6 @@ static struct omap_hwmod > omap44xx_timer9_hwmod = { > - .name = "timer9", > - .class = &omap44xx_timer_hwmod_class, > - .mpu_irqs = omap44xx_timer9_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs), > - .main_clk = "timer9_fck", > - .prcm = { > - .omap4 = { > -@@ -4497,6 +4500,7 @@ static struct omap_hwmod > omap44xx_timer9_hwmod = { > - static struct omap_hwmod omap44xx_timer10_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = { > - { .irq = 46 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { > -@@ -4526,7 +4530,6 @@ static struct omap_hwmod > omap44xx_timer10_hwmod = { > - .name = "timer10", > - .class = &omap44xx_timer_1ms_hwmod_class, > - .mpu_irqs = omap44xx_timer10_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs), > - .main_clk = "timer10_fck", > - .prcm = { > - .omap4 = { > -@@ -4542,6 +4545,7 @@ static struct omap_hwmod > omap44xx_timer10_hwmod = { > - static struct omap_hwmod omap44xx_timer11_hwmod; > - static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = { > - { .irq = 47 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { > -@@ -4571,7 +4575,6 @@ static struct omap_hwmod > omap44xx_timer11_hwmod = { > - .name = "timer11", > - .class = &omap44xx_timer_hwmod_class, > - .mpu_irqs = omap44xx_timer11_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs), > - .main_clk = "timer11_fck", > - .prcm = { > - .omap4 = { > -@@ -4609,6 +4612,7 @@ static struct omap_hwmod_class > omap44xx_uart_hwmod_class = { > - static struct omap_hwmod omap44xx_uart1_hwmod; > - static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { > - { .irq = 72 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { > -@@ -4643,7 +4647,6 @@ static struct omap_hwmod > omap44xx_uart1_hwmod = { > - .name = "uart1", > - .class = &omap44xx_uart_hwmod_class, > - .mpu_irqs = omap44xx_uart1_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs), > - .sdma_reqs = omap44xx_uart1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), > - .main_clk = "uart1_fck", > -@@ -4661,6 +4664,7 @@ static struct omap_hwmod > omap44xx_uart1_hwmod = { > - static struct omap_hwmod omap44xx_uart2_hwmod; > - static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { > - { .irq = 73 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { > -@@ -4695,7 +4699,6 @@ static struct omap_hwmod > omap44xx_uart2_hwmod = { > - .name = "uart2", > - .class = &omap44xx_uart_hwmod_class, > - .mpu_irqs = omap44xx_uart2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs), > - .sdma_reqs = omap44xx_uart2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), > - .main_clk = "uart2_fck", > -@@ -4713,6 +4716,7 @@ static struct omap_hwmod > omap44xx_uart2_hwmod = { > - static struct omap_hwmod omap44xx_uart3_hwmod; > - static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { > - { .irq = 74 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { > -@@ -4748,7 +4752,6 @@ static struct omap_hwmod > omap44xx_uart3_hwmod = { > - .class = &omap44xx_uart_hwmod_class, > - .flags = (HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET), > - .mpu_irqs = omap44xx_uart3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs), > - .sdma_reqs = omap44xx_uart3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), > - .main_clk = "uart3_fck", > -@@ -4766,6 +4769,7 @@ static struct omap_hwmod > omap44xx_uart3_hwmod = { > - static struct omap_hwmod omap44xx_uart4_hwmod; > - static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { > - { .irq = 70 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { > -@@ -4800,7 +4804,6 @@ static struct omap_hwmod > omap44xx_uart4_hwmod = { > - .name = "uart4", > - .class = &omap44xx_uart_hwmod_class, > - .mpu_irqs = omap44xx_uart4_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs), > - .sdma_reqs = omap44xx_uart4_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), > - .main_clk = "uart4_fck", > -@@ -4841,6 +4844,7 @@ static struct omap_hwmod_class > omap44xx_usb_otg_hs_hwmod_class = { > - static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { > - { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START }, > - { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - /* usb_otg_hs master ports */ > -@@ -4880,7 +4884,6 @@ static struct omap_hwmod > omap44xx_usb_otg_hs_hwmod = { > - .class = &omap44xx_usb_otg_hs_hwmod_class, > - .flags = HWMOD_SWSUP_SIDLE | > HWMOD_SWSUP_MSTANDBY, > - .mpu_irqs = omap44xx_usb_otg_hs_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs), > - .main_clk = "usb_otg_hs_ick", > - .prcm = { > - .omap4 = { > -@@ -4923,6 +4926,7 @@ static struct omap_hwmod_class > omap44xx_wd_timer_hwmod_class = { > - static struct omap_hwmod omap44xx_wd_timer2_hwmod; > - static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { > - { .irq = 80 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { > -@@ -4952,7 +4956,6 @@ static struct omap_hwmod > omap44xx_wd_timer2_hwmod = { > - .name = "wd_timer2", > - .class = &omap44xx_wd_timer_hwmod_class, > - .mpu_irqs = omap44xx_wd_timer2_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs), > - .main_clk = "wd_timer2_fck", > - .prcm = { > - .omap4 = { > -@@ -4968,6 +4971,7 @@ static struct omap_hwmod > omap44xx_wd_timer2_hwmod = { > - static struct omap_hwmod omap44xx_wd_timer3_hwmod; > - static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { > - { .irq = 36 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { > -@@ -5016,7 +5020,6 @@ static struct omap_hwmod > omap44xx_wd_timer3_hwmod = { > - .name = "wd_timer3", > - .class = &omap44xx_wd_timer_hwmod_class, > - .mpu_irqs = omap44xx_wd_timer3_irqs, > -- .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs), > - .main_clk = "wd_timer3_fck", > - .prcm = { > - .omap4 = { > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index f3a3bff..b8385e2 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -97,7 +97,7 @@ struct omap_hwmod_mux_info { > - /** > - * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod > - * @name: name of the IRQ channel (module local name) > -- * @irq_ch: IRQ channel ID > -+ * @irq: IRQ channel ID (should be non-negative except -1 = terminator) > - * > - * @name should be something short, e.g., "tx" or "rx". It is for use > - * by platform_get_resource_byname(). It is defined locally to the > -@@ -105,7 +105,7 @@ struct omap_hwmod_mux_info { > - */ > - struct omap_hwmod_irq_info { > - const char *name; > -- u16 irq; > -+ s16 irq; > - }; > - > - /** > -@@ -466,7 +466,7 @@ struct omap_hwmod_class { > - * @name: name of the hwmod > - * @class: struct omap_hwmod_class * to the class of this hwmod > - * @od: struct omap_device currently associated with this hwmod (internal > use) > -- * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) > -+ * @mpu_irqs: ptr to an array of MPU IRQs > - * @sdma_reqs: ptr to an array of System DMA request IDs (see > sdma_reqs_cnt) > - * @prcm: PRCM data pertaining to this hwmod > - * @main_clk: main clock: OMAP clock name > -@@ -480,7 +480,6 @@ struct omap_hwmod_class { > - * @_sysc_cache: internal-use hwmod flags > - * @_mpu_rt_va: cached register target start address (internal use) > - * @_mpu_port_index: cached MPU register target slave ID (internal use) > -- * @mpu_irqs_cnt: number of @mpu_irqs > - * @sdma_reqs_cnt: number of @sdma_reqs > - * @opt_clks_cnt: number of @opt_clks > - * @master_cnt: number of @master entries > -@@ -529,7 +528,6 @@ struct omap_hwmod { > - u16 flags; > - u8 _mpu_port_index; > - u8 response_lat; > -- u8 mpu_irqs_cnt; > - u8 sdma_reqs_cnt; > - u8 rst_lines_cnt; > - u8 opt_clks_cnt; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod- > share-identical-omap_hwmod_mpu_irqs-array.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod-share-identical- > omap_hwmod_mpu_irqs-array.patch > deleted file mode 100644 > index fabe223..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod-share- > identical-omap_hwmod_mpu_irqs-array.patch > +++ /dev/null > @@ -1,1815 +0,0 @@ > -From 5cd00a6a7afe6757255da2256157ce5504cf4b1a Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sat, 9 Jul 2011 19:14:07 -0600 > -Subject: [PATCH 040/149] omap_hwmod: share identical > omap_hwmod_mpu_irqs arrays > - > -To reduce kernel source file data duplication, share struct > -omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/Makefile | 11 +- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 +++------------ > ----- > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 166 +++------------ > ----- > - .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 142 > +++++++++++++++++ > - arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 21 +++ > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 162 +++------------- > --- > - arch/arm/mach-omap2/omap_hwmod_common_data.h | 29 ++++ > - 7 files changed, 275 insertions(+), 423 deletions(-) > - create mode 100644 arch/arm/mach- > omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > - create mode 100644 arch/arm/mach- > omap2/omap_hwmod_2xxx_ipblock_data.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index 8a75d17..f343365 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -145,13 +145,18 @@ obj-$(CONFIG_SOC_OMAP2420) += > opp2420_data.o > - obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o > - > - # hwmod data > --obj-$(CONFIG_SOC_OMAP2420) += > omap_hwmod_2xxx_interconnect_data.o \ > -+obj-$(CONFIG_SOC_OMAP2420) += > omap_hwmod_2xxx_ipblock_data.o \ > -+ > omap_hwmod_2xxx_3xxx_ipblock_data.o \ > -+ > omap_hwmod_2xxx_interconnect_data.o \ > - > omap_hwmod_2xxx_3xxx_interconnect_data.o \ > - omap_hwmod_2420_data.o > --obj-$(CONFIG_SOC_OMAP2430) += > omap_hwmod_2xxx_interconnect_data.o \ > -+obj-$(CONFIG_SOC_OMAP2430) += > omap_hwmod_2xxx_ipblock_data.o \ > -+ > omap_hwmod_2xxx_3xxx_ipblock_data.o \ > -+ > omap_hwmod_2xxx_interconnect_data.o \ > - > omap_hwmod_2xxx_3xxx_interconnect_data.o \ > - omap_hwmod_2430_data.o > --obj-$(CONFIG_ARCH_OMAP3) += > omap_hwmod_2xxx_3xxx_interconnect_data.o \ > -+obj-$(CONFIG_ARCH_OMAP3) += > omap_hwmod_2xxx_3xxx_ipblock_data.o \ > -+ > omap_hwmod_2xxx_3xxx_interconnect_data.o \ > - omap_hwmod_3xxx_data.o > - obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index 04730d3..73157ee 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -294,10 +294,6 @@ static struct omap_hwmod_class > omap2420_timer_hwmod_class = { > - > - /* timer1 */ > - static struct omap_hwmod omap2420_timer1_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { > -- { .irq = 37, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { > - { > -@@ -325,7 +321,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer1_slaves[] = { > - /* timer1 hwmod */ > - static struct omap_hwmod omap2420_timer1_hwmod = { > - .name = "timer1", > -- .mpu_irqs = omap2420_timer1_mpu_irqs, > -+ .mpu_irqs = omap2_timer1_mpu_irqs, > - .main_clk = "gpt1_fck", > - .prcm = { > - .omap2 = { > -@@ -344,11 +340,6 @@ static struct omap_hwmod > omap2420_timer1_hwmod = { > - > - /* timer2 */ > - static struct omap_hwmod omap2420_timer2_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { > -- { .irq = 38, }, > -- { .irq = -1 } > --}; > -- > - > - /* l4_core -> timer2 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { > -@@ -367,7 +358,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer2_slaves[] = { > - /* timer2 hwmod */ > - static struct omap_hwmod omap2420_timer2_hwmod = { > - .name = "timer2", > -- .mpu_irqs = omap2420_timer2_mpu_irqs, > -+ .mpu_irqs = omap2_timer2_mpu_irqs, > - .main_clk = "gpt2_fck", > - .prcm = { > - .omap2 = { > -@@ -386,10 +377,6 @@ static struct omap_hwmod > omap2420_timer2_hwmod = { > - > - /* timer3 */ > - static struct omap_hwmod omap2420_timer3_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { > -- { .irq = 39, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer3 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { > -@@ -408,7 +395,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer3_slaves[] = { > - /* timer3 hwmod */ > - static struct omap_hwmod omap2420_timer3_hwmod = { > - .name = "timer3", > -- .mpu_irqs = omap2420_timer3_mpu_irqs, > -+ .mpu_irqs = omap2_timer3_mpu_irqs, > - .main_clk = "gpt3_fck", > - .prcm = { > - .omap2 = { > -@@ -427,10 +414,6 @@ static struct omap_hwmod > omap2420_timer3_hwmod = { > - > - /* timer4 */ > - static struct omap_hwmod omap2420_timer4_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { > -- { .irq = 40, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer4 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { > -@@ -449,7 +432,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer4_slaves[] = { > - /* timer4 hwmod */ > - static struct omap_hwmod omap2420_timer4_hwmod = { > - .name = "timer4", > -- .mpu_irqs = omap2420_timer4_mpu_irqs, > -+ .mpu_irqs = omap2_timer4_mpu_irqs, > - .main_clk = "gpt4_fck", > - .prcm = { > - .omap2 = { > -@@ -468,10 +451,6 @@ static struct omap_hwmod > omap2420_timer4_hwmod = { > - > - /* timer5 */ > - static struct omap_hwmod omap2420_timer5_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { > -- { .irq = 41, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer5 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { > -@@ -490,7 +469,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer5_slaves[] = { > - /* timer5 hwmod */ > - static struct omap_hwmod omap2420_timer5_hwmod = { > - .name = "timer5", > -- .mpu_irqs = omap2420_timer5_mpu_irqs, > -+ .mpu_irqs = omap2_timer5_mpu_irqs, > - .main_clk = "gpt5_fck", > - .prcm = { > - .omap2 = { > -@@ -510,10 +489,6 @@ static struct omap_hwmod > omap2420_timer5_hwmod = { > - > - /* timer6 */ > - static struct omap_hwmod omap2420_timer6_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { > -- { .irq = 42, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer6 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { > -@@ -532,7 +507,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer6_slaves[] = { > - /* timer6 hwmod */ > - static struct omap_hwmod omap2420_timer6_hwmod = { > - .name = "timer6", > -- .mpu_irqs = omap2420_timer6_mpu_irqs, > -+ .mpu_irqs = omap2_timer6_mpu_irqs, > - .main_clk = "gpt6_fck", > - .prcm = { > - .omap2 = { > -@@ -551,10 +526,6 @@ static struct omap_hwmod > omap2420_timer6_hwmod = { > - > - /* timer7 */ > - static struct omap_hwmod omap2420_timer7_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { > -- { .irq = 43, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer7 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { > -@@ -573,7 +544,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer7_slaves[] = { > - /* timer7 hwmod */ > - static struct omap_hwmod omap2420_timer7_hwmod = { > - .name = "timer7", > -- .mpu_irqs = omap2420_timer7_mpu_irqs, > -+ .mpu_irqs = omap2_timer7_mpu_irqs, > - .main_clk = "gpt7_fck", > - .prcm = { > - .omap2 = { > -@@ -592,10 +563,6 @@ static struct omap_hwmod > omap2420_timer7_hwmod = { > - > - /* timer8 */ > - static struct omap_hwmod omap2420_timer8_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { > -- { .irq = 44, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer8 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { > -@@ -614,7 +581,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer8_slaves[] = { > - /* timer8 hwmod */ > - static struct omap_hwmod omap2420_timer8_hwmod = { > - .name = "timer8", > -- .mpu_irqs = omap2420_timer8_mpu_irqs, > -+ .mpu_irqs = omap2_timer8_mpu_irqs, > - .main_clk = "gpt8_fck", > - .prcm = { > - .omap2 = { > -@@ -633,10 +600,6 @@ static struct omap_hwmod > omap2420_timer8_hwmod = { > - > - /* timer9 */ > - static struct omap_hwmod omap2420_timer9_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { > -- { .irq = 45, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer9 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { > -@@ -655,7 +618,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer9_slaves[] = { > - /* timer9 hwmod */ > - static struct omap_hwmod omap2420_timer9_hwmod = { > - .name = "timer9", > -- .mpu_irqs = omap2420_timer9_mpu_irqs, > -+ .mpu_irqs = omap2_timer9_mpu_irqs, > - .main_clk = "gpt9_fck", > - .prcm = { > - .omap2 = { > -@@ -674,10 +637,6 @@ static struct omap_hwmod > omap2420_timer9_hwmod = { > - > - /* timer10 */ > - static struct omap_hwmod omap2420_timer10_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { > -- { .irq = 46, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer10 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { > -@@ -696,7 +655,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer10_slaves[] = { > - /* timer10 hwmod */ > - static struct omap_hwmod omap2420_timer10_hwmod = { > - .name = "timer10", > -- .mpu_irqs = omap2420_timer10_mpu_irqs, > -+ .mpu_irqs = omap2_timer10_mpu_irqs, > - .main_clk = "gpt10_fck", > - .prcm = { > - .omap2 = { > -@@ -715,10 +674,6 @@ static struct omap_hwmod > omap2420_timer10_hwmod = { > - > - /* timer11 */ > - static struct omap_hwmod omap2420_timer11_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { > -- { .irq = 47, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer11 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { > -@@ -737,7 +692,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer11_slaves[] = { > - /* timer11 hwmod */ > - static struct omap_hwmod omap2420_timer11_hwmod = { > - .name = "timer11", > -- .mpu_irqs = omap2420_timer11_mpu_irqs, > -+ .mpu_irqs = omap2_timer11_mpu_irqs, > - .main_clk = "gpt11_fck", > - .prcm = { > - .omap2 = { > -@@ -756,10 +711,6 @@ static struct omap_hwmod > omap2420_timer11_hwmod = { > - > - /* timer12 */ > - static struct omap_hwmod omap2420_timer12_hwmod; > --static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { > -- { .irq = 48, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer12 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { > -@@ -778,7 +729,7 @@ static struct omap_hwmod_ocp_if > *omap2420_timer12_slaves[] = { > - /* timer12 hwmod */ > - static struct omap_hwmod omap2420_timer12_hwmod = { > - .name = "timer12", > -- .mpu_irqs = omap2420_timer12_mpu_irqs, > -+ .mpu_irqs = omap2xxx_timer12_mpu_irqs, > - .main_clk = "gpt12_fck", > - .prcm = { > - .omap2 = { > -@@ -877,11 +828,6 @@ static struct omap_hwmod_class uart_class = { > - > - /* UART1 */ > - > --static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { > -- { .irq = INT_24XX_UART1_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -@@ -893,7 +839,7 @@ static struct omap_hwmod_ocp_if > *omap2420_uart1_slaves[] = { > - > - static struct omap_hwmod omap2420_uart1_hwmod = { > - .name = "uart1", > -- .mpu_irqs = uart1_mpu_irqs, > -+ .mpu_irqs = omap2_uart1_mpu_irqs, > - .sdma_reqs = uart1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > -@@ -914,11 +860,6 @@ static struct omap_hwmod > omap2420_uart1_hwmod = { > - > - /* UART2 */ > - > --static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { > -- { .irq = INT_24XX_UART2_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -@@ -930,7 +871,7 @@ static struct omap_hwmod_ocp_if > *omap2420_uart2_slaves[] = { > - > - static struct omap_hwmod omap2420_uart2_hwmod = { > - .name = "uart2", > -- .mpu_irqs = uart2_mpu_irqs, > -+ .mpu_irqs = omap2_uart2_mpu_irqs, > - .sdma_reqs = uart2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > -@@ -951,11 +892,6 @@ static struct omap_hwmod > omap2420_uart2_hwmod = { > - > - /* UART3 */ > - > --static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { > -- { .irq = INT_24XX_UART3_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -@@ -967,7 +903,7 @@ static struct omap_hwmod_ocp_if > *omap2420_uart3_slaves[] = { > - > - static struct omap_hwmod omap2420_uart3_hwmod = { > - .name = "uart3", > -- .mpu_irqs = uart3_mpu_irqs, > -+ .mpu_irqs = omap2_uart3_mpu_irqs, > - .sdma_reqs = uart3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > -@@ -1085,11 +1021,6 @@ static struct omap_hwmod_class > omap2420_dispc_hwmod_class = { > - .sysc = &omap2420_dispc_sysc, > - }; > - > --static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { > -- { .irq = 25 }, > -- { .irq = -1 } > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { > - .master = &omap2420_l4_core_hwmod, > -@@ -1113,7 +1044,7 @@ static struct omap_hwmod_ocp_if > *omap2420_dss_dispc_slaves[] = { > - static struct omap_hwmod omap2420_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap2420_dispc_hwmod_class, > -- .mpu_irqs = omap2420_dispc_irqs, > -+ .mpu_irqs = omap2_dispc_irqs, > - .main_clk = "dss1_fck", > - .prcm = { > - .omap2 = { > -@@ -1252,11 +1183,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; > - > - /* I2C1 */ > - > --static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { > -- { .irq = INT_24XX_I2C1_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -@@ -1268,7 +1194,7 @@ static struct omap_hwmod_ocp_if > *omap2420_i2c1_slaves[] = { > - > - static struct omap_hwmod omap2420_i2c1_hwmod = { > - .name = "i2c1", > -- .mpu_irqs = i2c1_mpu_irqs, > -+ .mpu_irqs = omap2_i2c1_mpu_irqs, > - .sdma_reqs = i2c1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2c1_fck", > -@@ -1291,11 +1217,6 @@ static struct omap_hwmod > omap2420_i2c1_hwmod = { > - > - /* I2C2 */ > - > --static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { > -- { .irq = INT_24XX_I2C2_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -@@ -1307,7 +1228,7 @@ static struct omap_hwmod_ocp_if > *omap2420_i2c2_slaves[] = { > - > - static struct omap_hwmod omap2420_i2c2_hwmod = { > - .name = "i2c2", > -- .mpu_irqs = i2c2_mpu_irqs, > -+ .mpu_irqs = omap2_i2c2_mpu_irqs, > - .sdma_reqs = i2c2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2c2_fck", > -@@ -1428,11 +1349,6 @@ static struct omap_hwmod_class > omap242x_gpio_hwmod_class = { > - }; > - > - /* gpio1 */ > --static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { > -- { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { > - &omap2420_l4_wkup__gpio1, > - }; > -@@ -1440,7 +1356,7 @@ static struct omap_hwmod_ocp_if > *omap2420_gpio1_slaves[] = { > - static struct omap_hwmod omap2420_gpio1_hwmod = { > - .name = "gpio1", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap242x_gpio1_irqs, > -+ .mpu_irqs = omap2_gpio1_irqs, > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1459,11 +1375,6 @@ static struct omap_hwmod > omap2420_gpio1_hwmod = { > - }; > - > - /* gpio2 */ > --static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { > -- { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { > - &omap2420_l4_wkup__gpio2, > - }; > -@@ -1471,7 +1382,7 @@ static struct omap_hwmod_ocp_if > *omap2420_gpio2_slaves[] = { > - static struct omap_hwmod omap2420_gpio2_hwmod = { > - .name = "gpio2", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap242x_gpio2_irqs, > -+ .mpu_irqs = omap2_gpio2_irqs, > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1490,11 +1401,6 @@ static struct omap_hwmod > omap2420_gpio2_hwmod = { > - }; > - > - /* gpio3 */ > --static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { > -- { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { > - &omap2420_l4_wkup__gpio3, > - }; > -@@ -1502,7 +1408,7 @@ static struct omap_hwmod_ocp_if > *omap2420_gpio3_slaves[] = { > - static struct omap_hwmod omap2420_gpio3_hwmod = { > - .name = "gpio3", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap242x_gpio3_irqs, > -+ .mpu_irqs = omap2_gpio3_irqs, > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1521,11 +1427,6 @@ static struct omap_hwmod > omap2420_gpio3_hwmod = { > - }; > - > - /* gpio4 */ > --static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { > -- { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { > - &omap2420_l4_wkup__gpio4, > - }; > -@@ -1533,7 +1434,7 @@ static struct omap_hwmod_ocp_if > *omap2420_gpio4_slaves[] = { > - static struct omap_hwmod omap2420_gpio4_hwmod = { > - .name = "gpio4", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap242x_gpio4_irqs, > -+ .mpu_irqs = omap2_gpio4_irqs, > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1575,14 +1476,6 @@ static struct omap_dma_dev_attr dma_dev_attr = > { > - .lch_count = 32, > - }; > - > --static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { > -- { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ > -- { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ > -- { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ > -- { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > -- { .irq = -1 } > --}; > -- > - /* dma_system -> L3 */ > - static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { > - .master = &omap2420_dma_system_hwmod, > -@@ -1613,7 +1506,7 @@ static struct omap_hwmod_ocp_if > *omap2420_dma_system_slaves[] = { > - static struct omap_hwmod omap2420_dma_system_hwmod = { > - .name = "dma", > - .class = &omap2420_dma_hwmod_class, > -- .mpu_irqs = omap2420_dma_system_irqs, > -+ .mpu_irqs = omap2_dma_system_irqs, > - .main_clk = "core_l3_ck", > - .slaves = omap2420_dma_system_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), > -@@ -1709,11 +1602,6 @@ static struct omap_hwmod_class > omap2420_mcspi_class = { > - }; > - > - /* mcspi1 */ > --static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { > -- { .irq = 65 }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { > - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ > - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ > -@@ -1735,7 +1623,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - > - static struct omap_hwmod omap2420_mcspi1_hwmod = { > - .name = "mcspi1_hwmod", > -- .mpu_irqs = omap2420_mcspi1_mpu_irqs, > -+ .mpu_irqs = omap2_mcspi1_mpu_irqs, > - .sdma_reqs = omap2420_mcspi1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > -@@ -1756,11 +1644,6 @@ static struct omap_hwmod > omap2420_mcspi1_hwmod = { > - }; > - > - /* mcspi2 */ > --static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { > -- { .irq = 66 }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { > - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ > - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > -@@ -1778,7 +1661,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - > - static struct omap_hwmod omap2420_mcspi2_hwmod = { > - .name = "mcspi2_hwmod", > -- .mpu_irqs = omap2420_mcspi2_mpu_irqs, > -+ .mpu_irqs = omap2_mcspi2_mpu_irqs, > - .sdma_reqs = omap2420_mcspi2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index 2c28468..62ecc68 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -367,10 +367,6 @@ static struct omap_hwmod_class > omap2430_timer_hwmod_class = { > - > - /* timer1 */ > - static struct omap_hwmod omap2430_timer1_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { > -- { .irq = 37, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { > - { > -@@ -398,7 +394,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer1_slaves[] = { > - /* timer1 hwmod */ > - static struct omap_hwmod omap2430_timer1_hwmod = { > - .name = "timer1", > -- .mpu_irqs = omap2430_timer1_mpu_irqs, > -+ .mpu_irqs = omap2_timer1_mpu_irqs, > - .main_clk = "gpt1_fck", > - .prcm = { > - .omap2 = { > -@@ -417,10 +413,6 @@ static struct omap_hwmod > omap2430_timer1_hwmod = { > - > - /* timer2 */ > - static struct omap_hwmod omap2430_timer2_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { > -- { .irq = 38, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer2 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { > -@@ -439,7 +431,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer2_slaves[] = { > - /* timer2 hwmod */ > - static struct omap_hwmod omap2430_timer2_hwmod = { > - .name = "timer2", > -- .mpu_irqs = omap2430_timer2_mpu_irqs, > -+ .mpu_irqs = omap2_timer2_mpu_irqs, > - .main_clk = "gpt2_fck", > - .prcm = { > - .omap2 = { > -@@ -458,10 +450,6 @@ static struct omap_hwmod > omap2430_timer2_hwmod = { > - > - /* timer3 */ > - static struct omap_hwmod omap2430_timer3_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { > -- { .irq = 39, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer3 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { > -@@ -480,7 +468,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer3_slaves[] = { > - /* timer3 hwmod */ > - static struct omap_hwmod omap2430_timer3_hwmod = { > - .name = "timer3", > -- .mpu_irqs = omap2430_timer3_mpu_irqs, > -+ .mpu_irqs = omap2_timer3_mpu_irqs, > - .main_clk = "gpt3_fck", > - .prcm = { > - .omap2 = { > -@@ -499,10 +487,6 @@ static struct omap_hwmod > omap2430_timer3_hwmod = { > - > - /* timer4 */ > - static struct omap_hwmod omap2430_timer4_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { > -- { .irq = 40, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer4 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { > -@@ -521,7 +505,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer4_slaves[] = { > - /* timer4 hwmod */ > - static struct omap_hwmod omap2430_timer4_hwmod = { > - .name = "timer4", > -- .mpu_irqs = omap2430_timer4_mpu_irqs, > -+ .mpu_irqs = omap2_timer4_mpu_irqs, > - .main_clk = "gpt4_fck", > - .prcm = { > - .omap2 = { > -@@ -540,10 +524,6 @@ static struct omap_hwmod > omap2430_timer4_hwmod = { > - > - /* timer5 */ > - static struct omap_hwmod omap2430_timer5_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { > -- { .irq = 41, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer5 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { > -@@ -562,7 +542,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer5_slaves[] = { > - /* timer5 hwmod */ > - static struct omap_hwmod omap2430_timer5_hwmod = { > - .name = "timer5", > -- .mpu_irqs = omap2430_timer5_mpu_irqs, > -+ .mpu_irqs = omap2_timer5_mpu_irqs, > - .main_clk = "gpt5_fck", > - .prcm = { > - .omap2 = { > -@@ -581,10 +561,6 @@ static struct omap_hwmod > omap2430_timer5_hwmod = { > - > - /* timer6 */ > - static struct omap_hwmod omap2430_timer6_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { > -- { .irq = 42, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer6 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { > -@@ -603,7 +579,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer6_slaves[] = { > - /* timer6 hwmod */ > - static struct omap_hwmod omap2430_timer6_hwmod = { > - .name = "timer6", > -- .mpu_irqs = omap2430_timer6_mpu_irqs, > -+ .mpu_irqs = omap2_timer6_mpu_irqs, > - .main_clk = "gpt6_fck", > - .prcm = { > - .omap2 = { > -@@ -622,10 +598,6 @@ static struct omap_hwmod > omap2430_timer6_hwmod = { > - > - /* timer7 */ > - static struct omap_hwmod omap2430_timer7_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { > -- { .irq = 43, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer7 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { > -@@ -644,7 +616,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer7_slaves[] = { > - /* timer7 hwmod */ > - static struct omap_hwmod omap2430_timer7_hwmod = { > - .name = "timer7", > -- .mpu_irqs = omap2430_timer7_mpu_irqs, > -+ .mpu_irqs = omap2_timer7_mpu_irqs, > - .main_clk = "gpt7_fck", > - .prcm = { > - .omap2 = { > -@@ -663,10 +635,6 @@ static struct omap_hwmod > omap2430_timer7_hwmod = { > - > - /* timer8 */ > - static struct omap_hwmod omap2430_timer8_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { > -- { .irq = 44, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer8 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { > -@@ -685,7 +653,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer8_slaves[] = { > - /* timer8 hwmod */ > - static struct omap_hwmod omap2430_timer8_hwmod = { > - .name = "timer8", > -- .mpu_irqs = omap2430_timer8_mpu_irqs, > -+ .mpu_irqs = omap2_timer8_mpu_irqs, > - .main_clk = "gpt8_fck", > - .prcm = { > - .omap2 = { > -@@ -704,10 +672,6 @@ static struct omap_hwmod > omap2430_timer8_hwmod = { > - > - /* timer9 */ > - static struct omap_hwmod omap2430_timer9_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { > -- { .irq = 45, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer9 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { > -@@ -726,7 +690,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer9_slaves[] = { > - /* timer9 hwmod */ > - static struct omap_hwmod omap2430_timer9_hwmod = { > - .name = "timer9", > -- .mpu_irqs = omap2430_timer9_mpu_irqs, > -+ .mpu_irqs = omap2_timer9_mpu_irqs, > - .main_clk = "gpt9_fck", > - .prcm = { > - .omap2 = { > -@@ -745,10 +709,6 @@ static struct omap_hwmod > omap2430_timer9_hwmod = { > - > - /* timer10 */ > - static struct omap_hwmod omap2430_timer10_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { > -- { .irq = 46, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer10 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { > -@@ -767,7 +727,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer10_slaves[] = { > - /* timer10 hwmod */ > - static struct omap_hwmod omap2430_timer10_hwmod = { > - .name = "timer10", > -- .mpu_irqs = omap2430_timer10_mpu_irqs, > -+ .mpu_irqs = omap2_timer10_mpu_irqs, > - .main_clk = "gpt10_fck", > - .prcm = { > - .omap2 = { > -@@ -786,10 +746,6 @@ static struct omap_hwmod > omap2430_timer10_hwmod = { > - > - /* timer11 */ > - static struct omap_hwmod omap2430_timer11_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { > -- { .irq = 47, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer11 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { > -@@ -808,7 +764,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer11_slaves[] = { > - /* timer11 hwmod */ > - static struct omap_hwmod omap2430_timer11_hwmod = { > - .name = "timer11", > -- .mpu_irqs = omap2430_timer11_mpu_irqs, > -+ .mpu_irqs = omap2_timer11_mpu_irqs, > - .main_clk = "gpt11_fck", > - .prcm = { > - .omap2 = { > -@@ -827,10 +783,6 @@ static struct omap_hwmod > omap2430_timer11_hwmod = { > - > - /* timer12 */ > - static struct omap_hwmod omap2430_timer12_hwmod; > --static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { > -- { .irq = 48, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer12 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { > -@@ -849,7 +801,7 @@ static struct omap_hwmod_ocp_if > *omap2430_timer12_slaves[] = { > - /* timer12 hwmod */ > - static struct omap_hwmod omap2430_timer12_hwmod = { > - .name = "timer12", > -- .mpu_irqs = omap2430_timer12_mpu_irqs, > -+ .mpu_irqs = omap2xxx_timer12_mpu_irqs, > - .main_clk = "gpt12_fck", > - .prcm = { > - .omap2 = { > -@@ -948,11 +900,6 @@ static struct omap_hwmod_class uart_class = { > - > - /* UART1 */ > - > --static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { > -- { .irq = INT_24XX_UART1_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -@@ -964,7 +911,7 @@ static struct omap_hwmod_ocp_if > *omap2430_uart1_slaves[] = { > - > - static struct omap_hwmod omap2430_uart1_hwmod = { > - .name = "uart1", > -- .mpu_irqs = uart1_mpu_irqs, > -+ .mpu_irqs = omap2_uart1_mpu_irqs, > - .sdma_reqs = uart1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > -@@ -985,11 +932,6 @@ static struct omap_hwmod > omap2430_uart1_hwmod = { > - > - /* UART2 */ > - > --static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { > -- { .irq = INT_24XX_UART2_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -@@ -1001,7 +943,7 @@ static struct omap_hwmod_ocp_if > *omap2430_uart2_slaves[] = { > - > - static struct omap_hwmod omap2430_uart2_hwmod = { > - .name = "uart2", > -- .mpu_irqs = uart2_mpu_irqs, > -+ .mpu_irqs = omap2_uart2_mpu_irqs, > - .sdma_reqs = uart2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > -@@ -1022,11 +964,6 @@ static struct omap_hwmod > omap2430_uart2_hwmod = { > - > - /* UART3 */ > - > --static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { > -- { .irq = INT_24XX_UART3_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -@@ -1038,7 +975,7 @@ static struct omap_hwmod_ocp_if > *omap2430_uart3_slaves[] = { > - > - static struct omap_hwmod omap2430_uart3_hwmod = { > - .name = "uart3", > -- .mpu_irqs = uart3_mpu_irqs, > -+ .mpu_irqs = omap2_uart3_mpu_irqs, > - .sdma_reqs = uart3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > -@@ -1150,11 +1087,6 @@ static struct omap_hwmod_class > omap2430_dispc_hwmod_class = { > - .sysc = &omap2430_dispc_sysc, > - }; > - > --static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { > -- { .irq = 25 }, > -- { .irq = -1 } > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { > - .master = &omap2430_l4_core_hwmod, > -@@ -1172,7 +1104,7 @@ static struct omap_hwmod_ocp_if > *omap2430_dss_dispc_slaves[] = { > - static struct omap_hwmod omap2430_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap2430_dispc_hwmod_class, > -- .mpu_irqs = omap2430_dispc_irqs, > -+ .mpu_irqs = omap2_dispc_irqs, > - .main_clk = "dss1_fck", > - .prcm = { > - .omap2 = { > -@@ -1302,11 +1234,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { > - > - /* I2C1 */ > - > --static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { > -- { .irq = INT_24XX_I2C1_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -@@ -1318,7 +1245,7 @@ static struct omap_hwmod_ocp_if > *omap2430_i2c1_slaves[] = { > - > - static struct omap_hwmod omap2430_i2c1_hwmod = { > - .name = "i2c1", > -- .mpu_irqs = i2c1_mpu_irqs, > -+ .mpu_irqs = omap2_i2c1_mpu_irqs, > - .sdma_reqs = i2c1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2chs1_fck", > -@@ -1348,11 +1275,6 @@ static struct omap_hwmod > omap2430_i2c1_hwmod = { > - > - /* I2C2 */ > - > --static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { > -- { .irq = INT_24XX_I2C2_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -@@ -1364,7 +1286,7 @@ static struct omap_hwmod_ocp_if > *omap2430_i2c2_slaves[] = { > - > - static struct omap_hwmod omap2430_i2c2_hwmod = { > - .name = "i2c2", > -- .mpu_irqs = i2c2_mpu_irqs, > -+ .mpu_irqs = omap2_i2c2_mpu_irqs, > - .sdma_reqs = i2c2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2chs2_fck", > -@@ -1502,11 +1424,6 @@ static struct omap_hwmod_class > omap243x_gpio_hwmod_class = { > - }; > - > - /* gpio1 */ > --static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { > -- { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { > - &omap2430_l4_wkup__gpio1, > - }; > -@@ -1514,7 +1431,7 @@ static struct omap_hwmod_ocp_if > *omap2430_gpio1_slaves[] = { > - static struct omap_hwmod omap2430_gpio1_hwmod = { > - .name = "gpio1", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap243x_gpio1_irqs, > -+ .mpu_irqs = omap2_gpio1_irqs, > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1533,11 +1450,6 @@ static struct omap_hwmod > omap2430_gpio1_hwmod = { > - }; > - > - /* gpio2 */ > --static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { > -- { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { > - &omap2430_l4_wkup__gpio2, > - }; > -@@ -1545,7 +1457,7 @@ static struct omap_hwmod_ocp_if > *omap2430_gpio2_slaves[] = { > - static struct omap_hwmod omap2430_gpio2_hwmod = { > - .name = "gpio2", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap243x_gpio2_irqs, > -+ .mpu_irqs = omap2_gpio2_irqs, > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1564,11 +1476,6 @@ static struct omap_hwmod > omap2430_gpio2_hwmod = { > - }; > - > - /* gpio3 */ > --static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { > -- { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { > - &omap2430_l4_wkup__gpio3, > - }; > -@@ -1576,7 +1483,7 @@ static struct omap_hwmod_ocp_if > *omap2430_gpio3_slaves[] = { > - static struct omap_hwmod omap2430_gpio3_hwmod = { > - .name = "gpio3", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap243x_gpio3_irqs, > -+ .mpu_irqs = omap2_gpio3_irqs, > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1595,11 +1502,6 @@ static struct omap_hwmod > omap2430_gpio3_hwmod = { > - }; > - > - /* gpio4 */ > --static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { > -- { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { > - &omap2430_l4_wkup__gpio4, > - }; > -@@ -1607,7 +1509,7 @@ static struct omap_hwmod_ocp_if > *omap2430_gpio4_slaves[] = { > - static struct omap_hwmod omap2430_gpio4_hwmod = { > - .name = "gpio4", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap243x_gpio4_irqs, > -+ .mpu_irqs = omap2_gpio4_irqs, > - .main_clk = "gpios_fck", > - .prcm = { > - .omap2 = { > -@@ -1680,14 +1582,6 @@ static struct omap_dma_dev_attr dma_dev_attr = > { > - .lch_count = 32, > - }; > - > --static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { > -- { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ > -- { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ > -- { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ > -- { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > -- { .irq = -1 } > --}; > -- > - /* dma_system -> L3 */ > - static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { > - .master = &omap2430_dma_system_hwmod, > -@@ -1718,7 +1612,7 @@ static struct omap_hwmod_ocp_if > *omap2430_dma_system_slaves[] = { > - static struct omap_hwmod omap2430_dma_system_hwmod = { > - .name = "dma", > - .class = &omap2430_dma_hwmod_class, > -- .mpu_irqs = omap2430_dma_system_irqs, > -+ .mpu_irqs = omap2_dma_system_irqs, > - .main_clk = "core_l3_ck", > - .slaves = omap2430_dma_system_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), > -@@ -1813,11 +1707,6 @@ static struct omap_hwmod_class > omap2430_mcspi_class = { > - }; > - > - /* mcspi1 */ > --static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { > -- { .irq = 65 }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { > - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ > - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ > -@@ -1839,7 +1728,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - > - static struct omap_hwmod omap2430_mcspi1_hwmod = { > - .name = "mcspi1_hwmod", > -- .mpu_irqs = omap2430_mcspi1_mpu_irqs, > -+ .mpu_irqs = omap2_mcspi1_mpu_irqs, > - .sdma_reqs = omap2430_mcspi1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > -@@ -1860,11 +1749,6 @@ static struct omap_hwmod > omap2430_mcspi1_hwmod = { > - }; > - > - /* mcspi2 */ > --static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { > -- { .irq = 66 }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { > - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ > - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > -@@ -1882,7 +1766,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - > - static struct omap_hwmod omap2430_mcspi2_hwmod = { > - .name = "mcspi2_hwmod", > -- .mpu_irqs = omap2430_mcspi2_mpu_irqs, > -+ .mpu_irqs = omap2_mcspi2_mpu_irqs, > - .sdma_reqs = omap2430_mcspi2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > -new file mode 100644 > -index 0000000..245294b > ---- /dev/null > -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > -@@ -0,0 +1,142 @@ > -+/* > -+ * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for > OMAP2/3 > -+ * > -+ * Copyright (C) 2011 Nokia Corporation > -+ * Paul Walmsley > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+#include <plat/omap_hwmod.h> > -+#include <plat/serial.h> > -+ > -+#include <mach/irqs.h> > -+ > -+#include "omap_hwmod_common_data.h" > -+ > -+struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { > -+ { .irq = 37, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = { > -+ { .irq = 38, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = { > -+ { .irq = 39, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = { > -+ { .irq = 40, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = { > -+ { .irq = 41, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = { > -+ { .irq = 42, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = { > -+ { .irq = 43, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = { > -+ { .irq = 44, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = { > -+ { .irq = 45, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = { > -+ { .irq = 46, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = { > -+ { .irq = 47, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = { > -+ { .irq = INT_24XX_UART1_IRQ, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = { > -+ { .irq = INT_24XX_UART2_IRQ, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = { > -+ { .irq = INT_24XX_UART3_IRQ, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_dispc_irqs[] = { > -+ { .irq = 25 }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = { > -+ { .irq = INT_24XX_I2C1_IRQ, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = { > -+ { .irq = INT_24XX_I2C2_IRQ, }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_gpio1_irqs[] = { > -+ { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_gpio2_irqs[] = { > -+ { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_gpio3_irqs[] = { > -+ { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_gpio4_irqs[] = { > -+ { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_dma_system_irqs[] = { > -+ { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ > -+ { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ > -+ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ > -+ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = { > -+ { .irq = 65 }, > -+ { .irq = -1 } > -+}; > -+ > -+struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { > -+ { .irq = 66 }, > -+ { .irq = -1 } > -+}; > -+ > -+ > -+ > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > -new file mode 100644 > -index 0000000..5a078a6 > ---- /dev/null > -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > -@@ -0,0 +1,21 @@ > -+/* > -+ * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx > -+ * > -+ * Copyright (C) 2011 Nokia Corporation > -+ * Paul Walmsley > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+#include <plat/omap_hwmod.h> > -+#include <plat/serial.h> > -+ > -+#include <mach/irqs.h> > -+ > -+#include "omap_hwmod_common_data.h" > -+ > -+struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { > -+ { .irq = 48, }, > -+ { .irq = -1 } > -+}; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index cc178b5..6bac4bb 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -151,7 +151,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_l3_main_masters[] = { > - static struct omap_hwmod omap3xxx_l3_main_hwmod = { > - .name = "l3_main", > - .class = &l3_hwmod_class, > -- .mpu_irqs = omap3xxx_l3_main_irqs, > -+ .mpu_irqs = omap3xxx_l3_main_irqs, > - .masters = omap3xxx_l3_main_masters, > - .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), > - .slaves = omap3xxx_l3_main_slaves, > -@@ -572,10 +572,6 @@ static struct omap_hwmod_class > omap3xxx_timer_hwmod_class = { > - > - /* timer1 */ > - static struct omap_hwmod omap3xxx_timer1_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { > -- { .irq = 37, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { > - { > -@@ -603,7 +599,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer1_slaves[] = { > - /* timer1 hwmod */ > - static struct omap_hwmod omap3xxx_timer1_hwmod = { > - .name = "timer1", > -- .mpu_irqs = omap3xxx_timer1_mpu_irqs, > -+ .mpu_irqs = omap2_timer1_mpu_irqs, > - .main_clk = "gpt1_fck", > - .prcm = { > - .omap2 = { > -@@ -622,10 +618,6 @@ static struct omap_hwmod > omap3xxx_timer1_hwmod = { > - > - /* timer2 */ > - static struct omap_hwmod omap3xxx_timer2_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { > -- { .irq = 38, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { > - { > -@@ -653,7 +645,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer2_slaves[] = { > - /* timer2 hwmod */ > - static struct omap_hwmod omap3xxx_timer2_hwmod = { > - .name = "timer2", > -- .mpu_irqs = omap3xxx_timer2_mpu_irqs, > -+ .mpu_irqs = omap2_timer2_mpu_irqs, > - .main_clk = "gpt2_fck", > - .prcm = { > - .omap2 = { > -@@ -672,10 +664,6 @@ static struct omap_hwmod > omap3xxx_timer2_hwmod = { > - > - /* timer3 */ > - static struct omap_hwmod omap3xxx_timer3_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { > -- { .irq = 39, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { > - { > -@@ -703,7 +691,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer3_slaves[] = { > - /* timer3 hwmod */ > - static struct omap_hwmod omap3xxx_timer3_hwmod = { > - .name = "timer3", > -- .mpu_irqs = omap3xxx_timer3_mpu_irqs, > -+ .mpu_irqs = omap2_timer3_mpu_irqs, > - .main_clk = "gpt3_fck", > - .prcm = { > - .omap2 = { > -@@ -722,10 +710,6 @@ static struct omap_hwmod > omap3xxx_timer3_hwmod = { > - > - /* timer4 */ > - static struct omap_hwmod omap3xxx_timer4_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { > -- { .irq = 40, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { > - { > -@@ -753,7 +737,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer4_slaves[] = { > - /* timer4 hwmod */ > - static struct omap_hwmod omap3xxx_timer4_hwmod = { > - .name = "timer4", > -- .mpu_irqs = omap3xxx_timer4_mpu_irqs, > -+ .mpu_irqs = omap2_timer4_mpu_irqs, > - .main_clk = "gpt4_fck", > - .prcm = { > - .omap2 = { > -@@ -772,10 +756,6 @@ static struct omap_hwmod > omap3xxx_timer4_hwmod = { > - > - /* timer5 */ > - static struct omap_hwmod omap3xxx_timer5_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { > -- { .irq = 41, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { > - { > -@@ -803,7 +783,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer5_slaves[] = { > - /* timer5 hwmod */ > - static struct omap_hwmod omap3xxx_timer5_hwmod = { > - .name = "timer5", > -- .mpu_irqs = omap3xxx_timer5_mpu_irqs, > -+ .mpu_irqs = omap2_timer5_mpu_irqs, > - .main_clk = "gpt5_fck", > - .prcm = { > - .omap2 = { > -@@ -822,10 +802,6 @@ static struct omap_hwmod > omap3xxx_timer5_hwmod = { > - > - /* timer6 */ > - static struct omap_hwmod omap3xxx_timer6_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { > -- { .irq = 42, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { > - { > -@@ -853,7 +829,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer6_slaves[] = { > - /* timer6 hwmod */ > - static struct omap_hwmod omap3xxx_timer6_hwmod = { > - .name = "timer6", > -- .mpu_irqs = omap3xxx_timer6_mpu_irqs, > -+ .mpu_irqs = omap2_timer6_mpu_irqs, > - .main_clk = "gpt6_fck", > - .prcm = { > - .omap2 = { > -@@ -872,10 +848,6 @@ static struct omap_hwmod > omap3xxx_timer6_hwmod = { > - > - /* timer7 */ > - static struct omap_hwmod omap3xxx_timer7_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { > -- { .irq = 43, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { > - { > -@@ -903,7 +875,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer7_slaves[] = { > - /* timer7 hwmod */ > - static struct omap_hwmod omap3xxx_timer7_hwmod = { > - .name = "timer7", > -- .mpu_irqs = omap3xxx_timer7_mpu_irqs, > -+ .mpu_irqs = omap2_timer7_mpu_irqs, > - .main_clk = "gpt7_fck", > - .prcm = { > - .omap2 = { > -@@ -922,10 +894,6 @@ static struct omap_hwmod > omap3xxx_timer7_hwmod = { > - > - /* timer8 */ > - static struct omap_hwmod omap3xxx_timer8_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { > -- { .irq = 44, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { > - { > -@@ -953,7 +921,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer8_slaves[] = { > - /* timer8 hwmod */ > - static struct omap_hwmod omap3xxx_timer8_hwmod = { > - .name = "timer8", > -- .mpu_irqs = omap3xxx_timer8_mpu_irqs, > -+ .mpu_irqs = omap2_timer8_mpu_irqs, > - .main_clk = "gpt8_fck", > - .prcm = { > - .omap2 = { > -@@ -972,10 +940,6 @@ static struct omap_hwmod > omap3xxx_timer8_hwmod = { > - > - /* timer9 */ > - static struct omap_hwmod omap3xxx_timer9_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { > -- { .irq = 45, }, > -- { .irq = -1 } > --}; > - > - static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { > - { > -@@ -1003,7 +967,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer9_slaves[] = { > - /* timer9 hwmod */ > - static struct omap_hwmod omap3xxx_timer9_hwmod = { > - .name = "timer9", > -- .mpu_irqs = omap3xxx_timer9_mpu_irqs, > -+ .mpu_irqs = omap2_timer9_mpu_irqs, > - .main_clk = "gpt9_fck", > - .prcm = { > - .omap2 = { > -@@ -1022,10 +986,6 @@ static struct omap_hwmod > omap3xxx_timer9_hwmod = { > - > - /* timer10 */ > - static struct omap_hwmod omap3xxx_timer10_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { > -- { .irq = 46, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer10 */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { > -@@ -1044,7 +1004,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer10_slaves[] = { > - /* timer10 hwmod */ > - static struct omap_hwmod omap3xxx_timer10_hwmod = { > - .name = "timer10", > -- .mpu_irqs = omap3xxx_timer10_mpu_irqs, > -+ .mpu_irqs = omap2_timer10_mpu_irqs, > - .main_clk = "gpt10_fck", > - .prcm = { > - .omap2 = { > -@@ -1063,10 +1023,6 @@ static struct omap_hwmod > omap3xxx_timer10_hwmod = { > - > - /* timer11 */ > - static struct omap_hwmod omap3xxx_timer11_hwmod; > --static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { > -- { .irq = 47, }, > -- { .irq = -1 } > --}; > - > - /* l4_core -> timer11 */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { > -@@ -1085,7 +1041,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_timer11_slaves[] = { > - /* timer11 hwmod */ > - static struct omap_hwmod omap3xxx_timer11_hwmod = { > - .name = "timer11", > -- .mpu_irqs = omap3xxx_timer11_mpu_irqs, > -+ .mpu_irqs = omap2_timer11_mpu_irqs, > - .main_clk = "gpt11_fck", > - .prcm = { > - .omap2 = { > -@@ -1254,11 +1210,6 @@ static struct omap_hwmod_class uart_class = { > - > - /* UART1 */ > - > --static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { > -- { .irq = INT_24XX_UART1_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > -@@ -1270,7 +1221,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart1_slaves[] = { > - > - static struct omap_hwmod omap3xxx_uart1_hwmod = { > - .name = "uart1", > -- .mpu_irqs = uart1_mpu_irqs, > -+ .mpu_irqs = omap2_uart1_mpu_irqs, > - .sdma_reqs = uart1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > -@@ -1291,11 +1242,6 @@ static struct omap_hwmod > omap3xxx_uart1_hwmod = { > - > - /* UART2 */ > - > --static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { > -- { .irq = INT_24XX_UART2_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > -@@ -1307,7 +1253,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart2_slaves[] = { > - > - static struct omap_hwmod omap3xxx_uart2_hwmod = { > - .name = "uart2", > -- .mpu_irqs = uart2_mpu_irqs, > -+ .mpu_irqs = omap2_uart2_mpu_irqs, > - .sdma_reqs = uart2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > -@@ -1328,11 +1274,6 @@ static struct omap_hwmod > omap3xxx_uart2_hwmod = { > - > - /* UART3 */ > - > --static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { > -- { .irq = INT_24XX_UART3_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > -@@ -1344,7 +1285,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart3_slaves[] = { > - > - static struct omap_hwmod omap3xxx_uart3_hwmod = { > - .name = "uart3", > -- .mpu_irqs = uart3_mpu_irqs, > -+ .mpu_irqs = omap2_uart3_mpu_irqs, > - .sdma_reqs = uart3_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > -@@ -1555,11 +1496,6 @@ static struct omap_hwmod_class > omap3xxx_dispc_hwmod_class = { > - .sysc = &omap3xxx_dispc_sysc, > - }; > - > --static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { > -- { .irq = 25 }, > -- { .irq = -1 } > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { > - .master = &omap3xxx_l4_core_hwmod, > -@@ -1584,7 +1520,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_dss_dispc_slaves[] = { > - static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap3xxx_dispc_hwmod_class, > -- .mpu_irqs = omap3xxx_dispc_irqs, > -+ .mpu_irqs = omap2_dispc_irqs, > - .main_clk = "dss1_alwon_fck", > - .prcm = { > - .omap2 = { > -@@ -1781,11 +1717,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { > - .fifo_depth = 8, /* bytes */ > - }; > - > --static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { > -- { .irq = INT_24XX_I2C1_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -@@ -1797,7 +1728,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c1_slaves[] = { > - > - static struct omap_hwmod omap3xxx_i2c1_hwmod = { > - .name = "i2c1", > -- .mpu_irqs = i2c1_mpu_irqs, > -+ .mpu_irqs = omap2_i2c1_mpu_irqs, > - .sdma_reqs = i2c1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2c1_fck", > -@@ -1823,11 +1754,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { > - .fifo_depth = 8, /* bytes */ > - }; > - > --static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { > -- { .irq = INT_24XX_I2C2_IRQ, }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -@@ -1839,7 +1765,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c2_slaves[] = { > - > - static struct omap_hwmod omap3xxx_i2c2_hwmod = { > - .name = "i2c2", > -- .mpu_irqs = i2c2_mpu_irqs, > -+ .mpu_irqs = omap2_i2c2_mpu_irqs, > - .sdma_reqs = i2c2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2c2_fck", > -@@ -2032,11 +1958,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = > { > - }; > - > - /* gpio1 */ > --static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { > -- { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { > - { .role = "dbclk", .clk = "gpio1_dbck", }, > - }; > -@@ -2048,7 +1969,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_gpio1_slaves[] = { > - static struct omap_hwmod omap3xxx_gpio1_hwmod = { > - .name = "gpio1", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap3xxx_gpio1_irqs, > -+ .mpu_irqs = omap2_gpio1_irqs, > - .main_clk = "gpio1_ick", > - .opt_clks = gpio1_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), > -@@ -2069,11 +1990,6 @@ static struct omap_hwmod > omap3xxx_gpio1_hwmod = { > - }; > - > - /* gpio2 */ > --static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { > -- { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { > - { .role = "dbclk", .clk = "gpio2_dbck", }, > - }; > -@@ -2085,7 +2001,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_gpio2_slaves[] = { > - static struct omap_hwmod omap3xxx_gpio2_hwmod = { > - .name = "gpio2", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap3xxx_gpio2_irqs, > -+ .mpu_irqs = omap2_gpio2_irqs, > - .main_clk = "gpio2_ick", > - .opt_clks = gpio2_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), > -@@ -2106,11 +2022,6 @@ static struct omap_hwmod > omap3xxx_gpio2_hwmod = { > - }; > - > - /* gpio3 */ > --static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { > -- { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { > - { .role = "dbclk", .clk = "gpio3_dbck", }, > - }; > -@@ -2122,7 +2033,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_gpio3_slaves[] = { > - static struct omap_hwmod omap3xxx_gpio3_hwmod = { > - .name = "gpio3", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap3xxx_gpio3_irqs, > -+ .mpu_irqs = omap2_gpio3_irqs, > - .main_clk = "gpio3_ick", > - .opt_clks = gpio3_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), > -@@ -2143,11 +2054,6 @@ static struct omap_hwmod > omap3xxx_gpio3_hwmod = { > - }; > - > - /* gpio4 */ > --static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { > -- { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { > - { .role = "dbclk", .clk = "gpio4_dbck", }, > - }; > -@@ -2159,7 +2065,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_gpio4_slaves[] = { > - static struct omap_hwmod omap3xxx_gpio4_hwmod = { > - .name = "gpio4", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -- .mpu_irqs = omap3xxx_gpio4_irqs, > -+ .mpu_irqs = omap2_gpio4_irqs, > - .main_clk = "gpio4_ick", > - .opt_clks = gpio4_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), > -@@ -2287,14 +2193,6 @@ static struct omap_hwmod_class > omap3xxx_dma_hwmod_class = { > - }; > - > - /* dma_system */ > --static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { > -- { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ > -- { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ > -- { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ > -- { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { > - { > - .pa_start = 0x48056000, > -@@ -2326,7 +2224,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_dma_system_slaves[] = { > - static struct omap_hwmod omap3xxx_dma_system_hwmod = { > - .name = "dma", > - .class = &omap3xxx_dma_hwmod_class, > -- .mpu_irqs = omap3xxx_dma_system_irqs, > -+ .mpu_irqs = omap2_dma_system_irqs, > - .main_clk = "core_l3_ick", > - .prcm = { > - .omap2 = { > -@@ -3044,11 +2942,6 @@ static struct omap_hwmod_class > omap34xx_mcspi_class = { > - }; > - > - /* mcspi1 */ > --static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { > -- { .name = "irq", .irq = 65 }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { > - { .name = "tx0", .dma_req = 35 }, > - { .name = "rx0", .dma_req = 36 }, > -@@ -3070,7 +2963,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - > - static struct omap_hwmod omap34xx_mcspi1 = { > - .name = "mcspi1", > -- .mpu_irqs = omap34xx_mcspi1_mpu_irqs, > -+ .mpu_irqs = omap2_mcspi1_mpu_irqs, > - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > -@@ -3091,11 +2984,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { > - }; > - > - /* mcspi2 */ > --static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { > -- { .name = "irq", .irq = 66 }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { > - { .name = "tx0", .dma_req = 43 }, > - { .name = "rx0", .dma_req = 44 }, > -@@ -3113,7 +3001,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - > - static struct omap_hwmod omap34xx_mcspi2 = { > - .name = "mcspi2", > -- .mpu_irqs = omap34xx_mcspi2_mpu_irqs, > -+ .mpu_irqs = omap2_mcspi2_mpu_irqs, > - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, > - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h > b/arch/arm/mach-omap2/omap_hwmod_common_data.h > -index 76a2f11..1ac878c 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.h > -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h > -@@ -49,6 +49,35 @@ extern struct omap_hwmod_addr_space > omap2_dma_system_addrs[]; > - extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; > - extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; > - > -+/* Common IP block data across OMAP2xxx */ > -+extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; > -+ > -+/* Common IP block data across OMAP2/3 */ > -+extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_dispc_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_gpio1_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_gpio2_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_gpio3_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_gpio4_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_dma_system_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[]; > -+extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[]; > -+ > - /* OMAP hwmod classes - forward declarations */ > - extern struct omap_hwmod_class l3_hwmod_class; > - extern struct omap_hwmod_class l4_hwmod_class; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod- > use-a-terminator-record-with-omap_hwmod_d.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod-use-a-terminator- > record-with-omap_hwmod_d.patch > deleted file mode 100644 > index b1722a2..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod-use-a- > terminator-record-with-omap_hwmod_d.patch > +++ /dev/null > @@ -1,1382 +0,0 @@ > -From e890f701dbd58ecb9377097e1a565e34cbf73e4b Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sat, 9 Jul 2011 19:14:07 -0600 > -Subject: [PATCH 041/149] omap_hwmod: use a terminator record with > omap_hwmod_dma_info arrays > - > -Previously, struct omap_hwmod_dma_info arrays were unterminated; and > -users of these arrays used the ARRAY_SIZE() macro to determine the > -length of the array. However, ARRAY_SIZE() only works when the array > -is in the same scope as the macro user. > - > -So far this hasn't been a problem. However, to reduce duplicated > -data, a subsequent patch will move common data to a separate, shared > -file. When this is done, ARRAY_SIZE() will no longer be usable. > - > -This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info > -arrays and uses a sentinel value (irq == -1) as the array terminator > -instead. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++++++++- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 ++++---- > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 32 +++++++------- > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 43 +++++++++-------- > -- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 60 +++++++++++++- > ------------ > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +-- > - 6 files changed, 106 insertions(+), 87 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index b761968..7d242c9 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -702,6 +702,29 @@ static int _count_mpu_irqs(struct omap_hwmod > *oh) > - } > - > - /** > -+ * _count_sdma_reqs - count the number of SDMA request lines associated > with @oh > -+ * @oh: struct omap_hwmod *oh > -+ * > -+ * Count and return the number of SDMA request lines associated with > -+ * the hwmod @oh. Used to allocate struct resource data. Returns 0 > -+ * if @oh is NULL. > -+ */ > -+static int _count_sdma_reqs(struct omap_hwmod *oh) > -+{ > -+ struct omap_hwmod_dma_info *ohdi; > -+ int i = 0; > -+ > -+ if (!oh || !oh->sdma_reqs) > -+ return 0; > -+ > -+ do { > -+ ohdi = &oh->sdma_reqs[i++]; > -+ } while (ohdi->dma_req != -1); > -+ > -+ return i; > -+} > -+ > -+/** > - * _count_ocp_if_addr_spaces - count the number of address space entries for > @oh > - * @oh: struct omap_hwmod *oh > - * > -@@ -2007,7 +2030,7 @@ int omap_hwmod_count_resources(struct > omap_hwmod *oh) > - { > - int ret, i; > - > -- ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; > -+ ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh); > - > - for (i = 0; i < oh->slaves_cnt; i++) > - ret += _count_ocp_if_addr_spaces(oh->slaves[i]); > -@@ -2027,7 +2050,7 @@ int omap_hwmod_count_resources(struct > omap_hwmod *oh) > - */ > - int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource > *res) > - { > -- int i, j, mpu_irqs_cnt; > -+ int i, j, mpu_irqs_cnt, sdma_reqs_cnt; > - int r = 0; > - > - /* For each IRQ, DMA, memory area, fill in array.*/ > -@@ -2041,7 +2064,8 @@ int omap_hwmod_fill_resources(struct > omap_hwmod *oh, struct resource *res) > - r++; > - } > - > -- for (i = 0; i < oh->sdma_reqs_cnt; i++) { > -+ sdma_reqs_cnt = _count_sdma_reqs(oh); > -+ for (i = 0; i < sdma_reqs_cnt; i++) { > - (res + r)->name = (oh->sdma_reqs + i)->name; > - (res + r)->start = (oh->sdma_reqs + i)->dma_req; > - (res + r)->end = (oh->sdma_reqs + i)->dma_req; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index 73157ee..60c817e 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -831,6 +831,7 @@ static struct omap_hwmod_class uart_class = { > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { > -@@ -841,7 +842,6 @@ static struct omap_hwmod omap2420_uart1_hwmod > = { > - .name = "uart1", > - .mpu_irqs = omap2_uart1_mpu_irqs, > - .sdma_reqs = uart1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > - .prcm = { > - .omap2 = { > -@@ -863,6 +863,7 @@ static struct omap_hwmod omap2420_uart1_hwmod > = { > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { > -@@ -873,7 +874,6 @@ static struct omap_hwmod omap2420_uart2_hwmod > = { > - .name = "uart2", > - .mpu_irqs = omap2_uart2_mpu_irqs, > - .sdma_reqs = uart2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > - .prcm = { > - .omap2 = { > -@@ -895,6 +895,7 @@ static struct omap_hwmod omap2420_uart2_hwmod > = { > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { > -@@ -905,7 +906,6 @@ static struct omap_hwmod omap2420_uart3_hwmod > = { > - .name = "uart3", > - .mpu_irqs = omap2_uart3_mpu_irqs, > - .sdma_reqs = uart3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > - .prcm = { > - .omap2 = { > -@@ -942,6 +942,7 @@ static struct omap_hwmod_class > omap2420_dss_hwmod_class = { > - > - static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { > - { .name = "dispc", .dma_req = 5 }, > -+ { .dma_req = -1 } > - }; > - > - /* dss */ > -@@ -980,7 +981,6 @@ static struct omap_hwmod > omap2420_dss_core_hwmod = { > - .class = &omap2420_dss_hwmod_class, > - .main_clk = "dss1_fck", /* instead of dss_fck */ > - .sdma_reqs = omap2420_dss_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), > - .prcm = { > - .omap2 = { > - .prcm_reg_id = 1, > -@@ -1186,6 +1186,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { > -@@ -1196,7 +1197,6 @@ static struct omap_hwmod > omap2420_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = omap2_i2c1_mpu_irqs, > - .sdma_reqs = i2c1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2c1_fck", > - .prcm = { > - .omap2 = { > -@@ -1220,6 +1220,7 @@ static struct omap_hwmod > omap2420_i2c1_hwmod = { > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { > -@@ -1230,7 +1231,6 @@ static struct omap_hwmod > omap2420_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = omap2_i2c2_mpu_irqs, > - .sdma_reqs = i2c2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2c2_fck", > - .prcm = { > - .omap2 = { > -@@ -1611,6 +1611,7 @@ static struct omap_hwmod_dma_info > omap2420_mcspi1_sdma_reqs[] = { > - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ > - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ > - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { > -@@ -1625,7 +1626,6 @@ static struct omap_hwmod > omap2420_mcspi1_hwmod = { > - .name = "mcspi1_hwmod", > - .mpu_irqs = omap2_mcspi1_mpu_irqs, > - .sdma_reqs = omap2420_mcspi1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > - .prcm = { > - .omap2 = { > -@@ -1649,6 +1649,7 @@ static struct omap_hwmod_dma_info > omap2420_mcspi2_sdma_reqs[] = { > - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ > - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { > -@@ -1663,7 +1664,6 @@ static struct omap_hwmod > omap2420_mcspi2_hwmod = { > - .name = "mcspi2_hwmod", > - .mpu_irqs = omap2_mcspi2_mpu_irqs, > - .sdma_reqs = omap2420_mcspi2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > - .prcm = { > - .omap2 = { > -@@ -1700,6 +1700,7 @@ static struct omap_hwmod_irq_info > omap2420_mcbsp1_irqs[] = { > - static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { > - { .name = "rx", .dma_req = 32 }, > - { .name = "tx", .dma_req = 31 }, > -+ { .dma_req = -1 } > - }; > - > - /* l4_core -> mcbsp1 */ > -@@ -1721,7 +1722,6 @@ static struct omap_hwmod > omap2420_mcbsp1_hwmod = { > - .class = &omap2420_mcbsp_hwmod_class, > - .mpu_irqs = omap2420_mcbsp1_irqs, > - .sdma_reqs = omap2420_mcbsp1_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), > - .main_clk = "mcbsp1_fck", > - .prcm = { > - .omap2 = { > -@@ -1747,6 +1747,7 @@ static struct omap_hwmod_irq_info > omap2420_mcbsp2_irqs[] = { > - static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { > - { .name = "rx", .dma_req = 34 }, > - { .name = "tx", .dma_req = 33 }, > -+ { .dma_req = -1 } > - }; > - > - /* l4_core -> mcbsp2 */ > -@@ -1768,7 +1769,6 @@ static struct omap_hwmod > omap2420_mcbsp2_hwmod = { > - .class = &omap2420_mcbsp_hwmod_class, > - .mpu_irqs = omap2420_mcbsp2_irqs, > - .sdma_reqs = omap2420_mcbsp2_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap2 = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index 62ecc68..af758b3 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -903,6 +903,7 @@ static struct omap_hwmod_class uart_class = { > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { > -@@ -913,7 +914,6 @@ static struct omap_hwmod omap2430_uart1_hwmod > = { > - .name = "uart1", > - .mpu_irqs = omap2_uart1_mpu_irqs, > - .sdma_reqs = uart1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > - .prcm = { > - .omap2 = { > -@@ -935,6 +935,7 @@ static struct omap_hwmod omap2430_uart1_hwmod > = { > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { > -@@ -945,7 +946,6 @@ static struct omap_hwmod omap2430_uart2_hwmod > = { > - .name = "uart2", > - .mpu_irqs = omap2_uart2_mpu_irqs, > - .sdma_reqs = uart2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > - .prcm = { > - .omap2 = { > -@@ -967,6 +967,7 @@ static struct omap_hwmod omap2430_uart2_hwmod > = { > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { > -@@ -977,7 +978,6 @@ static struct omap_hwmod omap2430_uart3_hwmod > = { > - .name = "uart3", > - .mpu_irqs = omap2_uart3_mpu_irqs, > - .sdma_reqs = uart3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > - .prcm = { > - .omap2 = { > -@@ -1014,6 +1014,7 @@ static struct omap_hwmod_class > omap2430_dss_hwmod_class = { > - > - static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { > - { .name = "dispc", .dma_req = 5 }, > -+ { .dma_req = -1 } > - }; > - > - /* dss */ > -@@ -1046,7 +1047,6 @@ static struct omap_hwmod > omap2430_dss_core_hwmod = { > - .class = &omap2430_dss_hwmod_class, > - .main_clk = "dss1_fck", /* instead of dss_fck */ > - .sdma_reqs = omap2430_dss_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), > - .prcm = { > - .omap2 = { > - .prcm_reg_id = 1, > -@@ -1237,6 +1237,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { > -@@ -1247,7 +1248,6 @@ static struct omap_hwmod > omap2430_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = omap2_i2c1_mpu_irqs, > - .sdma_reqs = i2c1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2chs1_fck", > - .prcm = { > - .omap2 = { > -@@ -1278,6 +1278,7 @@ static struct omap_hwmod > omap2430_i2c1_hwmod = { > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { > -@@ -1288,7 +1289,6 @@ static struct omap_hwmod > omap2430_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = omap2_i2c2_mpu_irqs, > - .sdma_reqs = i2c2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2chs2_fck", > - .prcm = { > - .omap2 = { > -@@ -1716,6 +1716,7 @@ static struct omap_hwmod_dma_info > omap2430_mcspi1_sdma_reqs[] = { > - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ > - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ > - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { > -@@ -1730,7 +1731,6 @@ static struct omap_hwmod > omap2430_mcspi1_hwmod = { > - .name = "mcspi1_hwmod", > - .mpu_irqs = omap2_mcspi1_mpu_irqs, > - .sdma_reqs = omap2430_mcspi1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > - .prcm = { > - .omap2 = { > -@@ -1754,6 +1754,7 @@ static struct omap_hwmod_dma_info > omap2430_mcspi2_sdma_reqs[] = { > - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ > - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { > -@@ -1768,7 +1769,6 @@ static struct omap_hwmod > omap2430_mcspi2_hwmod = { > - .name = "mcspi2_hwmod", > - .mpu_irqs = omap2_mcspi2_mpu_irqs, > - .sdma_reqs = omap2430_mcspi2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > - .prcm = { > - .omap2 = { > -@@ -1797,6 +1797,7 @@ static struct omap_hwmod_dma_info > omap2430_mcspi3_sdma_reqs[] = { > - { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ > - { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ > - { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { > -@@ -1811,7 +1812,6 @@ static struct omap_hwmod > omap2430_mcspi3_hwmod = { > - .name = "mcspi3_hwmod", > - .mpu_irqs = omap2430_mcspi3_mpu_irqs, > - .sdma_reqs = omap2430_mcspi3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), > - .main_clk = "mcspi3_fck", > - .prcm = { > - .omap2 = { > -@@ -1915,6 +1915,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp1_irqs[] = { > - static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { > - { .name = "rx", .dma_req = 32 }, > - { .name = "tx", .dma_req = 31 }, > -+ { .dma_req = -1 } > - }; > - > - /* l4_core -> mcbsp1 */ > -@@ -1936,7 +1937,6 @@ static struct omap_hwmod > omap2430_mcbsp1_hwmod = { > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp1_irqs, > - .sdma_reqs = omap2430_mcbsp1_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), > - .main_clk = "mcbsp1_fck", > - .prcm = { > - .omap2 = { > -@@ -1963,6 +1963,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp2_irqs[] = { > - static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { > - { .name = "rx", .dma_req = 34 }, > - { .name = "tx", .dma_req = 33 }, > -+ { .dma_req = -1 } > - }; > - > - /* l4_core -> mcbsp2 */ > -@@ -1984,7 +1985,6 @@ static struct omap_hwmod > omap2430_mcbsp2_hwmod = { > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp2_irqs, > - .sdma_reqs = omap2430_mcbsp2_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap2 = { > -@@ -2011,6 +2011,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp3_irqs[] = { > - static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { > - { .name = "rx", .dma_req = 18 }, > - { .name = "tx", .dma_req = 17 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { > -@@ -2042,7 +2043,6 @@ static struct omap_hwmod > omap2430_mcbsp3_hwmod = { > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp3_irqs, > - .sdma_reqs = omap2430_mcbsp3_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), > - .main_clk = "mcbsp3_fck", > - .prcm = { > - .omap2 = { > -@@ -2069,6 +2069,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp4_irqs[] = { > - static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { > - { .name = "rx", .dma_req = 20 }, > - { .name = "tx", .dma_req = 19 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { > -@@ -2100,7 +2101,6 @@ static struct omap_hwmod > omap2430_mcbsp4_hwmod = { > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp4_irqs, > - .sdma_reqs = omap2430_mcbsp4_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), > - .main_clk = "mcbsp4_fck", > - .prcm = { > - .omap2 = { > -@@ -2127,6 +2127,7 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp5_irqs[] = { > - static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { > - { .name = "rx", .dma_req = 22 }, > - { .name = "tx", .dma_req = 21 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { > -@@ -2158,7 +2159,6 @@ static struct omap_hwmod > omap2430_mcbsp5_hwmod = { > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp5_irqs, > - .sdma_reqs = omap2430_mcbsp5_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), > - .main_clk = "mcbsp5_fck", > - .prcm = { > - .omap2 = { > -@@ -2202,6 +2202,7 @@ static struct omap_hwmod_irq_info > omap2430_mmc1_mpu_irqs[] = { > - static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { > - { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ > - { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { > -@@ -2221,7 +2222,6 @@ static struct omap_hwmod > omap2430_mmc1_hwmod = { > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap2430_mmc1_mpu_irqs, > - .sdma_reqs = omap2430_mmc1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), > - .opt_clks = omap2430_mmc1_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), > - .main_clk = "mmchs1_fck", > -@@ -2251,6 +2251,7 @@ static struct omap_hwmod_irq_info > omap2430_mmc2_mpu_irqs[] = { > - static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { > - { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ > - { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { > -@@ -2266,7 +2267,6 @@ static struct omap_hwmod > omap2430_mmc2_hwmod = { > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap2430_mmc2_mpu_irqs, > - .sdma_reqs = omap2430_mmc2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), > - .opt_clks = omap2430_mmc2_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), > - .main_clk = "mmchs2_fck", > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 6bac4bb..265f0b1 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -1213,6 +1213,7 @@ static struct omap_hwmod_class uart_class = { > - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { > -@@ -1223,7 +1224,6 @@ static struct omap_hwmod > omap3xxx_uart1_hwmod = { > - .name = "uart1", > - .mpu_irqs = omap2_uart1_mpu_irqs, > - .sdma_reqs = uart1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), > - .main_clk = "uart1_fck", > - .prcm = { > - .omap2 = { > -@@ -1245,6 +1245,7 @@ static struct omap_hwmod > omap3xxx_uart1_hwmod = { > - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { > -@@ -1255,7 +1256,6 @@ static struct omap_hwmod > omap3xxx_uart2_hwmod = { > - .name = "uart2", > - .mpu_irqs = omap2_uart2_mpu_irqs, > - .sdma_reqs = uart2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), > - .main_clk = "uart2_fck", > - .prcm = { > - .omap2 = { > -@@ -1277,6 +1277,7 @@ static struct omap_hwmod > omap3xxx_uart2_hwmod = { > - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { > -@@ -1287,7 +1288,6 @@ static struct omap_hwmod > omap3xxx_uart3_hwmod = { > - .name = "uart3", > - .mpu_irqs = omap2_uart3_mpu_irqs, > - .sdma_reqs = uart3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), > - .main_clk = "uart3_fck", > - .prcm = { > - .omap2 = { > -@@ -1314,6 +1314,7 @@ static struct omap_hwmod_irq_info > uart4_mpu_irqs[] = { > - static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { > - { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, }, > - { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { > -@@ -1324,7 +1325,6 @@ static struct omap_hwmod > omap3xxx_uart4_hwmod = { > - .name = "uart4", > - .mpu_irqs = uart4_mpu_irqs, > - .sdma_reqs = uart4_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), > - .main_clk = "uart4_fck", > - .prcm = { > - .omap2 = { > -@@ -1367,6 +1367,7 @@ static struct omap_hwmod_class > omap3xxx_dss_hwmod_class = { > - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { > - { .name = "dispc", .dma_req = 5 }, > - { .name = "dsi1", .dma_req = 74 }, > -+ { .dma_req = -1 } > - }; > - > - /* dss */ > -@@ -1426,8 +1427,6 @@ static struct omap_hwmod > omap3430es1_dss_core_hwmod = { > - .class = &omap3xxx_dss_hwmod_class, > - .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ > - .sdma_reqs = omap3xxx_dss_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), > -- > - .prcm = { > - .omap2 = { > - .prcm_reg_id = 1, > -@@ -1452,8 +1451,6 @@ static struct omap_hwmod > omap3xxx_dss_core_hwmod = { > - .class = &omap3xxx_dss_hwmod_class, > - .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ > - .sdma_reqs = omap3xxx_dss_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), > -- > - .prcm = { > - .omap2 = { > - .prcm_reg_id = 1, > -@@ -1720,6 +1717,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { > - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { > -@@ -1730,7 +1728,6 @@ static struct omap_hwmod > omap3xxx_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = omap2_i2c1_mpu_irqs, > - .sdma_reqs = i2c1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), > - .main_clk = "i2c1_fck", > - .prcm = { > - .omap2 = { > -@@ -1757,6 +1754,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { > - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { > -@@ -1767,7 +1765,6 @@ static struct omap_hwmod > omap3xxx_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = omap2_i2c2_mpu_irqs, > - .sdma_reqs = i2c2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), > - .main_clk = "i2c2_fck", > - .prcm = { > - .omap2 = { > -@@ -1799,6 +1796,7 @@ static struct omap_hwmod_irq_info > i2c3_mpu_irqs[] = { > - static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { > - { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX }, > - { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { > -@@ -1809,7 +1807,6 @@ static struct omap_hwmod > omap3xxx_i2c3_hwmod = { > - .name = "i2c3", > - .mpu_irqs = i2c3_mpu_irqs, > - .sdma_reqs = i2c3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), > - .main_clk = "i2c3_fck", > - .prcm = { > - .omap2 = { > -@@ -2275,6 +2272,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp1_irqs[] = { > - static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { > - { .name = "rx", .dma_req = 32 }, > - { .name = "tx", .dma_req = 31 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { > -@@ -2306,7 +2304,6 @@ static struct omap_hwmod > omap3xxx_mcbsp1_hwmod = { > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp1_irqs, > - .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), > - .main_clk = "mcbsp1_fck", > - .prcm = { > - .omap2 = { > -@@ -2333,6 +2330,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp2_irqs[] = { > - static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { > - { .name = "rx", .dma_req = 34 }, > - { .name = "tx", .dma_req = 33 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { > -@@ -2369,7 +2367,6 @@ static struct omap_hwmod > omap3xxx_mcbsp2_hwmod = { > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp2_irqs, > - .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap2 = { > -@@ -2397,6 +2394,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp3_irqs[] = { > - static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { > - { .name = "rx", .dma_req = 18 }, > - { .name = "tx", .dma_req = 17 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { > -@@ -2432,7 +2430,6 @@ static struct omap_hwmod > omap3xxx_mcbsp3_hwmod = { > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp3_irqs, > - .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), > - .main_clk = "mcbsp3_fck", > - .prcm = { > - .omap2 = { > -@@ -2460,6 +2457,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp4_irqs[] = { > - static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { > - { .name = "rx", .dma_req = 20 }, > - { .name = "tx", .dma_req = 19 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { > -@@ -2491,7 +2489,6 @@ static struct omap_hwmod > omap3xxx_mcbsp4_hwmod = { > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp4_irqs, > - .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), > - .main_clk = "mcbsp4_fck", > - .prcm = { > - .omap2 = { > -@@ -2518,6 +2515,7 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp5_irqs[] = { > - static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { > - { .name = "rx", .dma_req = 22 }, > - { .name = "tx", .dma_req = 21 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { > -@@ -2549,7 +2547,6 @@ static struct omap_hwmod > omap3xxx_mcbsp5_hwmod = { > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp5_irqs, > - .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), > - .main_clk = "mcbsp5_fck", > - .prcm = { > - .omap2 = { > -@@ -2951,6 +2948,7 @@ static struct omap_hwmod_dma_info > omap34xx_mcspi1_sdma_reqs[] = { > - { .name = "rx2", .dma_req = 40 }, > - { .name = "tx3", .dma_req = 41 }, > - { .name = "rx3", .dma_req = 42 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { > -@@ -2965,7 +2963,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { > - .name = "mcspi1", > - .mpu_irqs = omap2_mcspi1_mpu_irqs, > - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > - .prcm = { > - .omap2 = { > -@@ -2989,6 +2986,7 @@ static struct omap_hwmod_dma_info > omap34xx_mcspi2_sdma_reqs[] = { > - { .name = "rx0", .dma_req = 44 }, > - { .name = "tx1", .dma_req = 45 }, > - { .name = "rx1", .dma_req = 46 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { > -@@ -3003,7 +3001,6 @@ static struct omap_hwmod omap34xx_mcspi2 = { > - .name = "mcspi2", > - .mpu_irqs = omap2_mcspi2_mpu_irqs, > - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > - .prcm = { > - .omap2 = { > -@@ -3032,6 +3029,7 @@ static struct omap_hwmod_dma_info > omap34xx_mcspi3_sdma_reqs[] = { > - { .name = "rx0", .dma_req = 16 }, > - { .name = "tx1", .dma_req = 23 }, > - { .name = "rx1", .dma_req = 24 }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = { > -@@ -3046,7 +3044,6 @@ static struct omap_hwmod omap34xx_mcspi3 = { > - .name = "mcspi3", > - .mpu_irqs = omap34xx_mcspi3_mpu_irqs, > - .sdma_reqs = omap34xx_mcspi3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), > - .main_clk = "mcspi3_fck", > - .prcm = { > - .omap2 = { > -@@ -3073,6 +3070,7 @@ static struct omap_hwmod_irq_info > omap34xx_mcspi4_mpu_irqs[] = { > - static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { > - { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */ > - { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */ > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = { > -@@ -3087,7 +3085,6 @@ static struct omap_hwmod omap34xx_mcspi4 = { > - .name = "mcspi4", > - .mpu_irqs = omap34xx_mcspi4_mpu_irqs, > - .sdma_reqs = omap34xx_mcspi4_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), > - .main_clk = "mcspi4_fck", > - .prcm = { > - .omap2 = { > -@@ -3218,6 +3215,7 @@ static struct omap_hwmod_irq_info > omap34xx_mmc1_mpu_irqs[] = { > - static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { > - { .name = "tx", .dma_req = 61, }, > - { .name = "rx", .dma_req = 62, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = { > -@@ -3236,7 +3234,6 @@ static struct omap_hwmod > omap3xxx_mmc1_hwmod = { > - .name = "mmc1", > - .mpu_irqs = omap34xx_mmc1_mpu_irqs, > - .sdma_reqs = omap34xx_mmc1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), > - .opt_clks = omap34xx_mmc1_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), > - .main_clk = "mmchs1_fck", > -@@ -3266,6 +3263,7 @@ static struct omap_hwmod_irq_info > omap34xx_mmc2_mpu_irqs[] = { > - static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { > - { .name = "tx", .dma_req = 47, }, > - { .name = "rx", .dma_req = 48, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = { > -@@ -3280,7 +3278,6 @@ static struct omap_hwmod > omap3xxx_mmc2_hwmod = { > - .name = "mmc2", > - .mpu_irqs = omap34xx_mmc2_mpu_irqs, > - .sdma_reqs = omap34xx_mmc2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), > - .opt_clks = omap34xx_mmc2_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), > - .main_clk = "mmchs2_fck", > -@@ -3309,6 +3306,7 @@ static struct omap_hwmod_irq_info > omap34xx_mmc3_mpu_irqs[] = { > - static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { > - { .name = "tx", .dma_req = 77, }, > - { .name = "rx", .dma_req = 78, }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { > -@@ -3323,7 +3321,6 @@ static struct omap_hwmod > omap3xxx_mmc3_hwmod = { > - .name = "mmc3", > - .mpu_irqs = omap34xx_mmc3_mpu_irqs, > - .sdma_reqs = omap34xx_mmc3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), > - .opt_clks = omap34xx_mmc3_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks), > - .main_clk = "mmchs3_fck", > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index f7ff937..316e922 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -685,6 +685,7 @@ static struct omap_hwmod_dma_info > omap44xx_aess_sdma_reqs[] = { > - { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START }, > - { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START }, > - { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - /* aess master ports */ > -@@ -739,7 +740,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = > { > - .class = &omap44xx_aess_hwmod_class, > - .mpu_irqs = omap44xx_aess_irqs, > - .sdma_reqs = omap44xx_aess_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), > - .main_clk = "aess_fck", > - .prcm = { > - .omap4 = { > -@@ -954,6 +954,7 @@ static struct omap_hwmod_irq_info > omap44xx_dmic_irqs[] = { > - > - static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { > - { .dma_req = 66 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { > -@@ -1003,7 +1004,6 @@ static struct omap_hwmod > omap44xx_dmic_hwmod = { > - .class = &omap44xx_dmic_hwmod_class, > - .mpu_irqs = omap44xx_dmic_irqs, > - .sdma_reqs = omap44xx_dmic_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), > - .main_clk = "dmic_fck", > - .prcm = { > - .omap4 = { > -@@ -1221,6 +1221,7 @@ static struct omap_hwmod_irq_info > omap44xx_dss_dispc_irqs[] = { > - > - static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { > - { .dma_req = 5 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = > { > -@@ -1270,7 +1271,6 @@ static struct omap_hwmod > omap44xx_dss_dispc_hwmod = { > - .class = &omap44xx_dispc_hwmod_class, > - .mpu_irqs = omap44xx_dss_dispc_irqs, > - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), > - .main_clk = "dss_fck", > - .prcm = { > - .omap4 = { > -@@ -1312,6 +1312,7 @@ static struct omap_hwmod_irq_info > omap44xx_dss_dsi1_irqs[] = { > - > - static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { > - { .dma_req = 74 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { > -@@ -1361,7 +1362,6 @@ static struct omap_hwmod > omap44xx_dss_dsi1_hwmod = { > - .class = &omap44xx_dsi_hwmod_class, > - .mpu_irqs = omap44xx_dss_dsi1_irqs, > - .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), > - .main_clk = "dss_fck", > - .prcm = { > - .omap4 = { > -@@ -1382,6 +1382,7 @@ static struct omap_hwmod_irq_info > omap44xx_dss_dsi2_irqs[] = { > - > - static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { > - { .dma_req = 83 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { > -@@ -1431,7 +1432,6 @@ static struct omap_hwmod > omap44xx_dss_dsi2_hwmod = { > - .class = &omap44xx_dsi_hwmod_class, > - .mpu_irqs = omap44xx_dss_dsi2_irqs, > - .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), > - .main_clk = "dss_fck", > - .prcm = { > - .omap4 = { > -@@ -1472,6 +1472,7 @@ static struct omap_hwmod_irq_info > omap44xx_dss_hdmi_irqs[] = { > - > - static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { > - { .dma_req = 75 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = > { > -@@ -1521,7 +1522,6 @@ static struct omap_hwmod > omap44xx_dss_hdmi_hwmod = { > - .class = &omap44xx_hdmi_hwmod_class, > - .mpu_irqs = omap44xx_dss_hdmi_irqs, > - .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), > - .main_clk = "dss_fck", > - .prcm = { > - .omap4 = { > -@@ -1557,6 +1557,7 @@ static struct omap_hwmod_class > omap44xx_rfbi_hwmod_class = { > - static struct omap_hwmod omap44xx_dss_rfbi_hwmod; > - static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { > - { .dma_req = 13 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { > -@@ -1605,7 +1606,6 @@ static struct omap_hwmod > omap44xx_dss_rfbi_hwmod = { > - .name = "dss_rfbi", > - .class = &omap44xx_rfbi_hwmod_class, > - .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs), > - .main_clk = "dss_fck", > - .prcm = { > - .omap4 = { > -@@ -2138,6 +2138,7 @@ static struct omap_hwmod_irq_info > omap44xx_i2c1_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { > - { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { > -@@ -2169,7 +2170,6 @@ static struct omap_hwmod > omap44xx_i2c1_hwmod = { > - .flags = HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c1_irqs, > - .sdma_reqs = omap44xx_i2c1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), > - .main_clk = "i2c1_fck", > - .prcm = { > - .omap4 = { > -@@ -2191,6 +2191,7 @@ static struct omap_hwmod_irq_info > omap44xx_i2c2_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { > - { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { > -@@ -2222,7 +2223,6 @@ static struct omap_hwmod > omap44xx_i2c2_hwmod = { > - .flags = HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c2_irqs, > - .sdma_reqs = omap44xx_i2c2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), > - .main_clk = "i2c2_fck", > - .prcm = { > - .omap4 = { > -@@ -2244,6 +2244,7 @@ static struct omap_hwmod_irq_info > omap44xx_i2c3_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { > - { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { > -@@ -2275,7 +2276,6 @@ static struct omap_hwmod > omap44xx_i2c3_hwmod = { > - .flags = HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c3_irqs, > - .sdma_reqs = omap44xx_i2c3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), > - .main_clk = "i2c3_fck", > - .prcm = { > - .omap4 = { > -@@ -2297,6 +2297,7 @@ static struct omap_hwmod_irq_info > omap44xx_i2c4_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { > - { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { > -@@ -2328,7 +2329,6 @@ static struct omap_hwmod > omap44xx_i2c4_hwmod = { > - .flags = HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c4_irqs, > - .sdma_reqs = omap44xx_i2c4_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), > - .main_clk = "i2c4_fck", > - .prcm = { > - .omap4 = { > -@@ -2467,6 +2467,7 @@ static struct omap_hwmod_dma_info > omap44xx_iss_sdma_reqs[] = { > - { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START }, > - { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START }, > - { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - /* iss master ports */ > -@@ -2506,7 +2507,6 @@ static struct omap_hwmod omap44xx_iss_hwmod > = { > - .class = &omap44xx_iss_hwmod_class, > - .mpu_irqs = omap44xx_iss_irqs, > - .sdma_reqs = omap44xx_iss_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), > - .main_clk = "iss_fck", > - .prcm = { > - .omap4 = { > -@@ -2791,6 +2791,7 @@ static struct omap_hwmod_irq_info > omap44xx_mcbsp1_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { > - { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { > -@@ -2842,7 +2843,6 @@ static struct omap_hwmod > omap44xx_mcbsp1_hwmod = { > - .class = &omap44xx_mcbsp_hwmod_class, > - .mpu_irqs = omap44xx_mcbsp1_irqs, > - .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), > - .main_clk = "mcbsp1_fck", > - .prcm = { > - .omap4 = { > -@@ -2864,6 +2864,7 @@ static struct omap_hwmod_irq_info > omap44xx_mcbsp2_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { > - { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { > -@@ -2915,7 +2916,6 @@ static struct omap_hwmod > omap44xx_mcbsp2_hwmod = { > - .class = &omap44xx_mcbsp_hwmod_class, > - .mpu_irqs = omap44xx_mcbsp2_irqs, > - .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap4 = { > -@@ -2937,6 +2937,7 @@ static struct omap_hwmod_irq_info > omap44xx_mcbsp3_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { > - { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { > -@@ -2988,7 +2989,6 @@ static struct omap_hwmod > omap44xx_mcbsp3_hwmod = { > - .class = &omap44xx_mcbsp_hwmod_class, > - .mpu_irqs = omap44xx_mcbsp3_irqs, > - .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), > - .main_clk = "mcbsp3_fck", > - .prcm = { > - .omap4 = { > -@@ -3010,6 +3010,7 @@ static struct omap_hwmod_irq_info > omap44xx_mcbsp4_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { > - { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { > -@@ -3040,7 +3041,6 @@ static struct omap_hwmod > omap44xx_mcbsp4_hwmod = { > - .class = &omap44xx_mcbsp_hwmod_class, > - .mpu_irqs = omap44xx_mcbsp4_irqs, > - .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), > - .main_clk = "mcbsp4_fck", > - .prcm = { > - .omap4 = { > -@@ -3083,6 +3083,7 @@ static struct omap_hwmod_irq_info > omap44xx_mcpdm_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { > - { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START }, > - { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { > -@@ -3132,7 +3133,6 @@ static struct omap_hwmod > omap44xx_mcpdm_hwmod = { > - .class = &omap44xx_mcpdm_hwmod_class, > - .mpu_irqs = omap44xx_mcpdm_irqs, > - .sdma_reqs = omap44xx_mcpdm_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), > - .main_clk = "mcpdm_fck", > - .prcm = { > - .omap4 = { > -@@ -3182,6 +3182,7 @@ static struct omap_hwmod_dma_info > omap44xx_mcspi1_sdma_reqs[] = { > - { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START }, > - { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { > -@@ -3217,7 +3218,6 @@ static struct omap_hwmod > omap44xx_mcspi1_hwmod = { > - .class = &omap44xx_mcspi_hwmod_class, > - .mpu_irqs = omap44xx_mcspi1_irqs, > - .sdma_reqs = omap44xx_mcspi1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), > - .main_clk = "mcspi1_fck", > - .prcm = { > - .omap4 = { > -@@ -3242,6 +3242,7 @@ static struct omap_hwmod_dma_info > omap44xx_mcspi2_sdma_reqs[] = { > - { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START }, > - { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { > -@@ -3277,7 +3278,6 @@ static struct omap_hwmod > omap44xx_mcspi2_hwmod = { > - .class = &omap44xx_mcspi_hwmod_class, > - .mpu_irqs = omap44xx_mcspi2_irqs, > - .sdma_reqs = omap44xx_mcspi2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), > - .main_clk = "mcspi2_fck", > - .prcm = { > - .omap4 = { > -@@ -3302,6 +3302,7 @@ static struct omap_hwmod_dma_info > omap44xx_mcspi3_sdma_reqs[] = { > - { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START }, > - { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { > -@@ -3337,7 +3338,6 @@ static struct omap_hwmod > omap44xx_mcspi3_hwmod = { > - .class = &omap44xx_mcspi_hwmod_class, > - .mpu_irqs = omap44xx_mcspi3_irqs, > - .sdma_reqs = omap44xx_mcspi3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), > - .main_clk = "mcspi3_fck", > - .prcm = { > - .omap4 = { > -@@ -3360,6 +3360,7 @@ static struct omap_hwmod_irq_info > omap44xx_mcspi4_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { > - { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { > -@@ -3395,7 +3396,6 @@ static struct omap_hwmod > omap44xx_mcspi4_hwmod = { > - .class = &omap44xx_mcspi_hwmod_class, > - .mpu_irqs = omap44xx_mcspi4_irqs, > - .sdma_reqs = omap44xx_mcspi4_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), > - .main_clk = "mcspi4_fck", > - .prcm = { > - .omap4 = { > -@@ -3440,6 +3440,7 @@ static struct omap_hwmod_irq_info > omap44xx_mmc1_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { > - { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - /* mmc1 master ports */ > -@@ -3480,7 +3481,6 @@ static struct omap_hwmod > omap44xx_mmc1_hwmod = { > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc1_irqs, > - .sdma_reqs = omap44xx_mmc1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), > - .main_clk = "mmc1_fck", > - .prcm = { > - .omap4 = { > -@@ -3504,6 +3504,7 @@ static struct omap_hwmod_irq_info > omap44xx_mmc2_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { > - { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - /* mmc2 master ports */ > -@@ -3539,7 +3540,6 @@ static struct omap_hwmod > omap44xx_mmc2_hwmod = { > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc2_irqs, > - .sdma_reqs = omap44xx_mmc2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), > - .main_clk = "mmc2_fck", > - .prcm = { > - .omap4 = { > -@@ -3563,6 +3563,7 @@ static struct omap_hwmod_irq_info > omap44xx_mmc3_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { > - { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { > -@@ -3593,7 +3594,6 @@ static struct omap_hwmod > omap44xx_mmc3_hwmod = { > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc3_irqs, > - .sdma_reqs = omap44xx_mmc3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), > - .main_clk = "mmc3_fck", > - .prcm = { > - .omap4 = { > -@@ -3615,6 +3615,7 @@ static struct omap_hwmod_irq_info > omap44xx_mmc4_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { > - { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { > -@@ -3646,7 +3647,6 @@ static struct omap_hwmod > omap44xx_mmc4_hwmod = { > - .mpu_irqs = omap44xx_mmc4_irqs, > - > - .sdma_reqs = omap44xx_mmc4_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), > - .main_clk = "mmc4_fck", > - .prcm = { > - .omap4 = { > -@@ -3668,6 +3668,7 @@ static struct omap_hwmod_irq_info > omap44xx_mmc5_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { > - { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { > -@@ -3698,7 +3699,6 @@ static struct omap_hwmod > omap44xx_mmc5_hwmod = { > - .class = &omap44xx_mmc_hwmod_class, > - .mpu_irqs = omap44xx_mmc5_irqs, > - .sdma_reqs = omap44xx_mmc5_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), > - .main_clk = "mmc5_fck", > - .prcm = { > - .omap4 = { > -@@ -4618,6 +4618,7 @@ static struct omap_hwmod_irq_info > omap44xx_uart1_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { > - { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { > -@@ -4648,7 +4649,6 @@ static struct omap_hwmod > omap44xx_uart1_hwmod = { > - .class = &omap44xx_uart_hwmod_class, > - .mpu_irqs = omap44xx_uart1_irqs, > - .sdma_reqs = omap44xx_uart1_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), > - .main_clk = "uart1_fck", > - .prcm = { > - .omap4 = { > -@@ -4670,6 +4670,7 @@ static struct omap_hwmod_irq_info > omap44xx_uart2_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { > - { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { > -@@ -4700,7 +4701,6 @@ static struct omap_hwmod > omap44xx_uart2_hwmod = { > - .class = &omap44xx_uart_hwmod_class, > - .mpu_irqs = omap44xx_uart2_irqs, > - .sdma_reqs = omap44xx_uart2_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), > - .main_clk = "uart2_fck", > - .prcm = { > - .omap4 = { > -@@ -4722,6 +4722,7 @@ static struct omap_hwmod_irq_info > omap44xx_uart3_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { > - { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { > -@@ -4753,7 +4754,6 @@ static struct omap_hwmod > omap44xx_uart3_hwmod = { > - .flags = (HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET), > - .mpu_irqs = omap44xx_uart3_irqs, > - .sdma_reqs = omap44xx_uart3_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), > - .main_clk = "uart3_fck", > - .prcm = { > - .omap4 = { > -@@ -4775,6 +4775,7 @@ static struct omap_hwmod_irq_info > omap44xx_uart4_irqs[] = { > - static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { > - { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START }, > - { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START }, > -+ { .dma_req = -1 } > - }; > - > - static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { > -@@ -4805,7 +4806,6 @@ static struct omap_hwmod > omap44xx_uart4_hwmod = { > - .class = &omap44xx_uart_hwmod_class, > - .mpu_irqs = omap44xx_uart4_irqs, > - .sdma_reqs = omap44xx_uart4_sdma_reqs, > -- .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), > - .main_clk = "uart4_fck", > - .prcm = { > - .omap4 = { > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index b8385e2..ce06ac6 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -111,7 +111,7 @@ struct omap_hwmod_irq_info { > - /** > - * struct omap_hwmod_dma_info - DMA channels used by the hwmod > - * @name: name of the DMA channel (module local name) > -- * @dma_req: DMA request ID > -+ * @dma_req: DMA request ID (should be non-negative except -1 = > terminator) > - * > - * @name should be something short, e.g., "tx" or "rx". It is for use > - * by platform_get_resource_byname(). It is defined locally to the > -@@ -119,7 +119,7 @@ struct omap_hwmod_irq_info { > - */ > - struct omap_hwmod_dma_info { > - const char *name; > -- u16 dma_req; > -+ s16 dma_req; > - }; > - > - /** > -@@ -467,7 +467,7 @@ struct omap_hwmod_class { > - * @class: struct omap_hwmod_class * to the class of this hwmod > - * @od: struct omap_device currently associated with this hwmod (internal > use) > - * @mpu_irqs: ptr to an array of MPU IRQs > -- * @sdma_reqs: ptr to an array of System DMA request IDs (see > sdma_reqs_cnt) > -+ * @sdma_reqs: ptr to an array of System DMA request IDs > - * @prcm: PRCM data pertaining to this hwmod > - * @main_clk: main clock: OMAP clock name > - * @_clk: pointer to the main struct clk (filled in at runtime) > -@@ -480,7 +480,6 @@ struct omap_hwmod_class { > - * @_sysc_cache: internal-use hwmod flags > - * @_mpu_rt_va: cached register target start address (internal use) > - * @_mpu_port_index: cached MPU register target slave ID (internal use) > -- * @sdma_reqs_cnt: number of @sdma_reqs > - * @opt_clks_cnt: number of @opt_clks > - * @master_cnt: number of @master entries > - * @slaves_cnt: number of @slave entries > -@@ -528,7 +527,6 @@ struct omap_hwmod { > - u16 flags; > - u8 _mpu_port_index; > - u8 response_lat; > -- u8 sdma_reqs_cnt; > - u8 rst_lines_cnt; > - u8 opt_clks_cnt; > - u8 masters_cnt; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod- > share-identical-omap_hwmod_dma_info-array.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod-share-identical- > omap_hwmod_dma_info-array.patch > deleted file mode 100644 > index 56bc227..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod-share- > identical-omap_hwmod_dma_info-array.patch > +++ /dev/null > @@ -1,935 +0,0 @@ > -From 79a8b76e605e0930ef1c52c2a757eb523340cda1 Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sat, 9 Jul 2011 19:14:07 -0600 > -Subject: [PATCH 042/149] omap_hwmod: share identical > omap_hwmod_dma_info arrays > - > -To reduce kernel source file data duplication, share struct > -omap_hwmod_dma_info arrays across OMAP2xxx and 3xxx hwmod data files. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 87 ++--------------- > - > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 95 +++------------- > ---- > - .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 92 > +++++++++++++++++++ > - arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 6 ++ > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 89 ++---------------- > - arch/arm/mach-omap2/omap_hwmod_common_data.c | 20 ---- > - arch/arm/mach-omap2/omap_hwmod_common_data.h | 15 +++ > - 7 files changed, 144 insertions(+), 260 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index 60c817e..6acc01f 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -828,12 +828,6 @@ static struct omap_hwmod_class uart_class = { > - > - /* UART1 */ > - > --static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { > - &omap2_l4_core__uart1, > - }; > -@@ -841,7 +835,7 @@ static struct omap_hwmod_ocp_if > *omap2420_uart1_slaves[] = { > - static struct omap_hwmod omap2420_uart1_hwmod = { > - .name = "uart1", > - .mpu_irqs = omap2_uart1_mpu_irqs, > -- .sdma_reqs = uart1_sdma_reqs, > -+ .sdma_reqs = omap2_uart1_sdma_reqs, > - .main_clk = "uart1_fck", > - .prcm = { > - .omap2 = { > -@@ -860,12 +854,6 @@ static struct omap_hwmod > omap2420_uart1_hwmod = { > - > - /* UART2 */ > - > --static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { > - &omap2_l4_core__uart2, > - }; > -@@ -873,7 +861,7 @@ static struct omap_hwmod_ocp_if > *omap2420_uart2_slaves[] = { > - static struct omap_hwmod omap2420_uart2_hwmod = { > - .name = "uart2", > - .mpu_irqs = omap2_uart2_mpu_irqs, > -- .sdma_reqs = uart2_sdma_reqs, > -+ .sdma_reqs = omap2_uart2_sdma_reqs, > - .main_clk = "uart2_fck", > - .prcm = { > - .omap2 = { > -@@ -892,12 +880,6 @@ static struct omap_hwmod > omap2420_uart2_hwmod = { > - > - /* UART3 */ > - > --static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { > - &omap2_l4_core__uart3, > - }; > -@@ -905,7 +887,7 @@ static struct omap_hwmod_ocp_if > *omap2420_uart3_slaves[] = { > - static struct omap_hwmod omap2420_uart3_hwmod = { > - .name = "uart3", > - .mpu_irqs = omap2_uart3_mpu_irqs, > -- .sdma_reqs = uart3_sdma_reqs, > -+ .sdma_reqs = omap2_uart3_sdma_reqs, > - .main_clk = "uart3_fck", > - .prcm = { > - .omap2 = { > -@@ -940,11 +922,6 @@ static struct omap_hwmod_class > omap2420_dss_hwmod_class = { > - .sysc = &omap2420_dss_sysc, > - }; > - > --static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { > -- { .name = "dispc", .dma_req = 5 }, > -- { .dma_req = -1 } > --}; > -- > - /* dss */ > - /* dss master ports */ > - static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { > -@@ -980,7 +957,7 @@ static struct omap_hwmod > omap2420_dss_core_hwmod = { > - .name = "dss_core", > - .class = &omap2420_dss_hwmod_class, > - .main_clk = "dss1_fck", /* instead of dss_fck */ > -- .sdma_reqs = omap2420_dss_sdma_chs, > -+ .sdma_reqs = omap2xxx_dss_sdma_chs, > - .prcm = { > - .omap2 = { > - .prcm_reg_id = 1, > -@@ -1183,12 +1160,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; > - > - /* I2C1 */ > - > --static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { > - &omap2420_l4_core__i2c1, > - }; > -@@ -1196,7 +1167,7 @@ static struct omap_hwmod_ocp_if > *omap2420_i2c1_slaves[] = { > - static struct omap_hwmod omap2420_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = omap2_i2c1_mpu_irqs, > -- .sdma_reqs = i2c1_sdma_reqs, > -+ .sdma_reqs = omap2_i2c1_sdma_reqs, > - .main_clk = "i2c1_fck", > - .prcm = { > - .omap2 = { > -@@ -1217,12 +1188,6 @@ static struct omap_hwmod > omap2420_i2c1_hwmod = { > - > - /* I2C2 */ > - > --static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { > - &omap2420_l4_core__i2c2, > - }; > -@@ -1230,7 +1195,7 @@ static struct omap_hwmod_ocp_if > *omap2420_i2c2_slaves[] = { > - static struct omap_hwmod omap2420_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = omap2_i2c2_mpu_irqs, > -- .sdma_reqs = i2c2_sdma_reqs, > -+ .sdma_reqs = omap2_i2c2_sdma_reqs, > - .main_clk = "i2c2_fck", > - .prcm = { > - .omap2 = { > -@@ -1602,18 +1567,6 @@ static struct omap_hwmod_class > omap2420_mcspi_class = { > - }; > - > - /* mcspi1 */ > --static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { > -- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ > -- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ > -- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ > -- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ > -- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ > -- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ > -- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ > -- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { > - &omap2420_l4_core__mcspi1, > - }; > -@@ -1625,7 +1578,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - static struct omap_hwmod omap2420_mcspi1_hwmod = { > - .name = "mcspi1_hwmod", > - .mpu_irqs = omap2_mcspi1_mpu_irqs, > -- .sdma_reqs = omap2420_mcspi1_sdma_reqs, > -+ .sdma_reqs = omap2_mcspi1_sdma_reqs, > - .main_clk = "mcspi1_fck", > - .prcm = { > - .omap2 = { > -@@ -1644,14 +1597,6 @@ static struct omap_hwmod > omap2420_mcspi1_hwmod = { > - }; > - > - /* mcspi2 */ > --static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { > -- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ > -- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > -- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ > -- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { > - &omap2420_l4_core__mcspi2, > - }; > -@@ -1663,7 +1608,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - static struct omap_hwmod omap2420_mcspi2_hwmod = { > - .name = "mcspi2_hwmod", > - .mpu_irqs = omap2_mcspi2_mpu_irqs, > -- .sdma_reqs = omap2420_mcspi2_sdma_reqs, > -+ .sdma_reqs = omap2_mcspi2_sdma_reqs, > - .main_clk = "mcspi2_fck", > - .prcm = { > - .omap2 = { > -@@ -1697,12 +1642,6 @@ static struct omap_hwmod_irq_info > omap2420_mcbsp1_irqs[] = { > - { .irq = -1 } > - }; > - > --static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { > -- { .name = "rx", .dma_req = 32 }, > -- { .name = "tx", .dma_req = 31 }, > -- { .dma_req = -1 } > --}; > -- > - /* l4_core -> mcbsp1 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { > - .master = &omap2420_l4_core_hwmod, > -@@ -1721,7 +1660,7 @@ static struct omap_hwmod > omap2420_mcbsp1_hwmod = { > - .name = "mcbsp1", > - .class = &omap2420_mcbsp_hwmod_class, > - .mpu_irqs = omap2420_mcbsp1_irqs, > -- .sdma_reqs = omap2420_mcbsp1_sdma_chs, > -+ .sdma_reqs = omap2_mcbsp1_sdma_reqs, > - .main_clk = "mcbsp1_fck", > - .prcm = { > - .omap2 = { > -@@ -1744,12 +1683,6 @@ static struct omap_hwmod_irq_info > omap2420_mcbsp2_irqs[] = { > - { .irq = -1 } > - }; > - > --static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { > -- { .name = "rx", .dma_req = 34 }, > -- { .name = "tx", .dma_req = 33 }, > -- { .dma_req = -1 } > --}; > -- > - /* l4_core -> mcbsp2 */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { > - .master = &omap2420_l4_core_hwmod, > -@@ -1768,7 +1701,7 @@ static struct omap_hwmod > omap2420_mcbsp2_hwmod = { > - .name = "mcbsp2", > - .class = &omap2420_mcbsp_hwmod_class, > - .mpu_irqs = omap2420_mcbsp2_irqs, > -- .sdma_reqs = omap2420_mcbsp2_sdma_chs, > -+ .sdma_reqs = omap2_mcbsp2_sdma_reqs, > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap2 = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index af758b3..639acd5 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -900,12 +900,6 @@ static struct omap_hwmod_class uart_class = { > - > - /* UART1 */ > - > --static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { > - &omap2_l4_core__uart1, > - }; > -@@ -913,7 +907,7 @@ static struct omap_hwmod_ocp_if > *omap2430_uart1_slaves[] = { > - static struct omap_hwmod omap2430_uart1_hwmod = { > - .name = "uart1", > - .mpu_irqs = omap2_uart1_mpu_irqs, > -- .sdma_reqs = uart1_sdma_reqs, > -+ .sdma_reqs = omap2_uart1_sdma_reqs, > - .main_clk = "uart1_fck", > - .prcm = { > - .omap2 = { > -@@ -932,12 +926,6 @@ static struct omap_hwmod > omap2430_uart1_hwmod = { > - > - /* UART2 */ > - > --static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { > - &omap2_l4_core__uart2, > - }; > -@@ -945,7 +933,7 @@ static struct omap_hwmod_ocp_if > *omap2430_uart2_slaves[] = { > - static struct omap_hwmod omap2430_uart2_hwmod = { > - .name = "uart2", > - .mpu_irqs = omap2_uart2_mpu_irqs, > -- .sdma_reqs = uart2_sdma_reqs, > -+ .sdma_reqs = omap2_uart2_sdma_reqs, > - .main_clk = "uart2_fck", > - .prcm = { > - .omap2 = { > -@@ -964,12 +952,6 @@ static struct omap_hwmod > omap2430_uart2_hwmod = { > - > - /* UART3 */ > - > --static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { > - &omap2_l4_core__uart3, > - }; > -@@ -977,7 +959,7 @@ static struct omap_hwmod_ocp_if > *omap2430_uart3_slaves[] = { > - static struct omap_hwmod omap2430_uart3_hwmod = { > - .name = "uart3", > - .mpu_irqs = omap2_uart3_mpu_irqs, > -- .sdma_reqs = uart3_sdma_reqs, > -+ .sdma_reqs = omap2_uart3_sdma_reqs, > - .main_clk = "uart3_fck", > - .prcm = { > - .omap2 = { > -@@ -1012,11 +994,6 @@ static struct omap_hwmod_class > omap2430_dss_hwmod_class = { > - .sysc = &omap2430_dss_sysc, > - }; > - > --static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { > -- { .name = "dispc", .dma_req = 5 }, > -- { .dma_req = -1 } > --}; > -- > - /* dss */ > - /* dss master ports */ > - static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { > -@@ -1046,7 +1023,7 @@ static struct omap_hwmod > omap2430_dss_core_hwmod = { > - .name = "dss_core", > - .class = &omap2430_dss_hwmod_class, > - .main_clk = "dss1_fck", /* instead of dss_fck */ > -- .sdma_reqs = omap2430_dss_sdma_chs, > -+ .sdma_reqs = omap2xxx_dss_sdma_chs, > - .prcm = { > - .omap2 = { > - .prcm_reg_id = 1, > -@@ -1234,12 +1211,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { > - > - /* I2C1 */ > - > --static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { > - &omap2430_l4_core__i2c1, > - }; > -@@ -1247,7 +1218,7 @@ static struct omap_hwmod_ocp_if > *omap2430_i2c1_slaves[] = { > - static struct omap_hwmod omap2430_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = omap2_i2c1_mpu_irqs, > -- .sdma_reqs = i2c1_sdma_reqs, > -+ .sdma_reqs = omap2_i2c1_sdma_reqs, > - .main_clk = "i2chs1_fck", > - .prcm = { > - .omap2 = { > -@@ -1275,12 +1246,6 @@ static struct omap_hwmod > omap2430_i2c1_hwmod = { > - > - /* I2C2 */ > - > --static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { > - &omap2430_l4_core__i2c2, > - }; > -@@ -1288,7 +1253,7 @@ static struct omap_hwmod_ocp_if > *omap2430_i2c2_slaves[] = { > - static struct omap_hwmod omap2430_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = omap2_i2c2_mpu_irqs, > -- .sdma_reqs = i2c2_sdma_reqs, > -+ .sdma_reqs = omap2_i2c2_sdma_reqs, > - .main_clk = "i2chs2_fck", > - .prcm = { > - .omap2 = { > -@@ -1707,18 +1672,6 @@ static struct omap_hwmod_class > omap2430_mcspi_class = { > - }; > - > - /* mcspi1 */ > --static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { > -- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ > -- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ > -- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ > -- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ > -- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ > -- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ > -- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ > -- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { > - &omap2430_l4_core__mcspi1, > - }; > -@@ -1730,7 +1683,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - static struct omap_hwmod omap2430_mcspi1_hwmod = { > - .name = "mcspi1_hwmod", > - .mpu_irqs = omap2_mcspi1_mpu_irqs, > -- .sdma_reqs = omap2430_mcspi1_sdma_reqs, > -+ .sdma_reqs = omap2_mcspi1_sdma_reqs, > - .main_clk = "mcspi1_fck", > - .prcm = { > - .omap2 = { > -@@ -1749,14 +1702,6 @@ static struct omap_hwmod > omap2430_mcspi1_hwmod = { > - }; > - > - /* mcspi2 */ > --static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { > -- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ > -- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > -- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ > -- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { > - &omap2430_l4_core__mcspi2, > - }; > -@@ -1768,7 +1713,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - static struct omap_hwmod omap2430_mcspi2_hwmod = { > - .name = "mcspi2_hwmod", > - .mpu_irqs = omap2_mcspi2_mpu_irqs, > -- .sdma_reqs = omap2430_mcspi2_sdma_reqs, > -+ .sdma_reqs = omap2_mcspi2_sdma_reqs, > - .main_clk = "mcspi2_fck", > - .prcm = { > - .omap2 = { > -@@ -1912,12 +1857,6 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp1_irqs[] = { > - { .irq = -1 } > - }; > - > --static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { > -- { .name = "rx", .dma_req = 32 }, > -- { .name = "tx", .dma_req = 31 }, > -- { .dma_req = -1 } > --}; > -- > - /* l4_core -> mcbsp1 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { > - .master = &omap2430_l4_core_hwmod, > -@@ -1936,7 +1875,7 @@ static struct omap_hwmod > omap2430_mcbsp1_hwmod = { > - .name = "mcbsp1", > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp1_irqs, > -- .sdma_reqs = omap2430_mcbsp1_sdma_chs, > -+ .sdma_reqs = omap2_mcbsp1_sdma_reqs, > - .main_clk = "mcbsp1_fck", > - .prcm = { > - .omap2 = { > -@@ -1960,12 +1899,6 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp2_irqs[] = { > - { .irq = -1 } > - }; > - > --static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { > -- { .name = "rx", .dma_req = 34 }, > -- { .name = "tx", .dma_req = 33 }, > -- { .dma_req = -1 } > --}; > -- > - /* l4_core -> mcbsp2 */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { > - .master = &omap2430_l4_core_hwmod, > -@@ -1984,7 +1917,7 @@ static struct omap_hwmod > omap2430_mcbsp2_hwmod = { > - .name = "mcbsp2", > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp2_irqs, > -- .sdma_reqs = omap2430_mcbsp2_sdma_chs, > -+ .sdma_reqs = omap2_mcbsp2_sdma_reqs, > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap2 = { > -@@ -2008,12 +1941,6 @@ static struct omap_hwmod_irq_info > omap2430_mcbsp3_irqs[] = { > - { .irq = -1 } > - }; > - > --static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { > -- { .name = "rx", .dma_req = 18 }, > -- { .name = "tx", .dma_req = 17 }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { > - { > - .name = "mpu", > -@@ -2042,7 +1969,7 @@ static struct omap_hwmod > omap2430_mcbsp3_hwmod = { > - .name = "mcbsp3", > - .class = &omap2430_mcbsp_hwmod_class, > - .mpu_irqs = omap2430_mcbsp3_irqs, > -- .sdma_reqs = omap2430_mcbsp3_sdma_chs, > -+ .sdma_reqs = omap2_mcbsp3_sdma_reqs, > - .main_clk = "mcbsp3_fck", > - .prcm = { > - .omap2 = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > -index 245294b..7c4f5ab 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > -@@ -10,11 +10,35 @@ > - */ > - #include <plat/omap_hwmod.h> > - #include <plat/serial.h> > -+#include <plat/dma.h> > - > - #include <mach/irqs.h> > - > - #include "omap_hwmod_common_data.h" > - > -+ > -+/* > -+ * omap_hwmod class data > -+ */ > -+ > -+struct omap_hwmod_class l3_hwmod_class = { > -+ .name = "l3" > -+}; > -+ > -+struct omap_hwmod_class l4_hwmod_class = { > -+ .name = "l4" > -+}; > -+ > -+struct omap_hwmod_class mpu_hwmod_class = { > -+ .name = "mpu" > -+}; > -+ > -+struct omap_hwmod_class iva_hwmod_class = { > -+ .name = "iva" > -+}; > -+ > -+/* Common MPU IRQ line data */ > -+ > - struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { > - { .irq = 37, }, > - { .irq = -1 } > -@@ -138,5 +162,73 @@ struct omap_hwmod_irq_info > omap2_mcspi2_mpu_irqs[] = { > - { .irq = -1 } > - }; > - > -+/* Common DMA request line data */ > -+struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { > -+ { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ > -+ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ > -+ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ > -+ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ > -+ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ > -+ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ > -+ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ > -+ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { > -+ { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ > -+ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > -+ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ > -+ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = 32 }, > -+ { .name = "tx", .dma_req = 31 }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = 34 }, > -+ { .name = "tx", .dma_req = 33 }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = 18 }, > -+ { .name = "tx", .dma_req = 17 }, > -+ { .dma_req = -1 } > -+}; > - > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > -index 5a078a6..f5b63ef 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > -@@ -10,6 +10,7 @@ > - */ > - #include <plat/omap_hwmod.h> > - #include <plat/serial.h> > -+#include <plat/dma.h> > - > - #include <mach/irqs.h> > - > -@@ -19,3 +20,8 @@ struct omap_hwmod_irq_info > omap2xxx_timer12_mpu_irqs[] = { > - { .irq = 48, }, > - { .irq = -1 } > - }; > -+ > -+struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { > -+ { .name = "dispc", .dma_req = 5 }, > -+ { .dma_req = -1 } > -+}; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 265f0b1..001f67b 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -1210,12 +1210,6 @@ static struct omap_hwmod_class uart_class = { > - > - /* UART1 */ > - > --static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { > - &omap3_l4_core__uart1, > - }; > -@@ -1223,7 +1217,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart1_slaves[] = { > - static struct omap_hwmod omap3xxx_uart1_hwmod = { > - .name = "uart1", > - .mpu_irqs = omap2_uart1_mpu_irqs, > -- .sdma_reqs = uart1_sdma_reqs, > -+ .sdma_reqs = omap2_uart1_sdma_reqs, > - .main_clk = "uart1_fck", > - .prcm = { > - .omap2 = { > -@@ -1242,12 +1236,6 @@ static struct omap_hwmod > omap3xxx_uart1_hwmod = { > - > - /* UART2 */ > - > --static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { > - &omap3_l4_core__uart2, > - }; > -@@ -1255,7 +1243,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart2_slaves[] = { > - static struct omap_hwmod omap3xxx_uart2_hwmod = { > - .name = "uart2", > - .mpu_irqs = omap2_uart2_mpu_irqs, > -- .sdma_reqs = uart2_sdma_reqs, > -+ .sdma_reqs = omap2_uart2_sdma_reqs, > - .main_clk = "uart2_fck", > - .prcm = { > - .omap2 = { > -@@ -1274,12 +1262,6 @@ static struct omap_hwmod > omap3xxx_uart2_hwmod = { > - > - /* UART3 */ > - > --static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { > - &omap3_l4_per__uart3, > - }; > -@@ -1287,7 +1269,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_uart3_slaves[] = { > - static struct omap_hwmod omap3xxx_uart3_hwmod = { > - .name = "uart3", > - .mpu_irqs = omap2_uart3_mpu_irqs, > -- .sdma_reqs = uart3_sdma_reqs, > -+ .sdma_reqs = omap2_uart3_sdma_reqs, > - .main_clk = "uart3_fck", > - .prcm = { > - .omap2 = { > -@@ -1714,12 +1696,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { > - .fifo_depth = 8, /* bytes */ > - }; > - > --static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { > - &omap3_l4_core__i2c1, > - }; > -@@ -1727,7 +1703,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c1_slaves[] = { > - static struct omap_hwmod omap3xxx_i2c1_hwmod = { > - .name = "i2c1", > - .mpu_irqs = omap2_i2c1_mpu_irqs, > -- .sdma_reqs = i2c1_sdma_reqs, > -+ .sdma_reqs = omap2_i2c1_sdma_reqs, > - .main_clk = "i2c1_fck", > - .prcm = { > - .omap2 = { > -@@ -1751,12 +1727,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { > - .fifo_depth = 8, /* bytes */ > - }; > - > --static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { > - &omap3_l4_core__i2c2, > - }; > -@@ -1764,7 +1734,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c2_slaves[] = { > - static struct omap_hwmod omap3xxx_i2c2_hwmod = { > - .name = "i2c2", > - .mpu_irqs = omap2_i2c2_mpu_irqs, > -- .sdma_reqs = i2c2_sdma_reqs, > -+ .sdma_reqs = omap2_i2c2_sdma_reqs, > - .main_clk = "i2c2_fck", > - .prcm = { > - .omap2 = { > -@@ -2269,12 +2239,6 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp1_irqs[] = { > - { .irq = -1 } > - }; > - > --static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { > -- { .name = "rx", .dma_req = 32 }, > -- { .name = "tx", .dma_req = 31 }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { > - { > - .name = "mpu", > -@@ -2303,7 +2267,7 @@ static struct omap_hwmod > omap3xxx_mcbsp1_hwmod = { > - .name = "mcbsp1", > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp1_irqs, > -- .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, > -+ .sdma_reqs = omap2_mcbsp1_sdma_reqs, > - .main_clk = "mcbsp1_fck", > - .prcm = { > - .omap2 = { > -@@ -2327,12 +2291,6 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp2_irqs[] = { > - { .irq = -1 } > - }; > - > --static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { > -- { .name = "rx", .dma_req = 34 }, > -- { .name = "tx", .dma_req = 33 }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { > - { > - .name = "mpu", > -@@ -2349,7 +2307,6 @@ static struct omap_hwmod_ocp_if > omap3xxx_l4_per__mcbsp2 = { > - .slave = &omap3xxx_mcbsp2_hwmod, > - .clk = "mcbsp2_ick", > - .addr = omap3xxx_mcbsp2_addrs, > -- > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > -@@ -2366,7 +2323,7 @@ static struct omap_hwmod > omap3xxx_mcbsp2_hwmod = { > - .name = "mcbsp2", > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp2_irqs, > -- .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, > -+ .sdma_reqs = omap2_mcbsp2_sdma_reqs, > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap2 = { > -@@ -2391,12 +2348,6 @@ static struct omap_hwmod_irq_info > omap3xxx_mcbsp3_irqs[] = { > - { .irq = -1 } > - }; > - > --static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { > -- { .name = "rx", .dma_req = 18 }, > -- { .name = "tx", .dma_req = 17 }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { > - { > - .name = "mpu", > -@@ -2429,7 +2380,7 @@ static struct omap_hwmod > omap3xxx_mcbsp3_hwmod = { > - .name = "mcbsp3", > - .class = &omap3xxx_mcbsp_hwmod_class, > - .mpu_irqs = omap3xxx_mcbsp3_irqs, > -- .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, > -+ .sdma_reqs = omap2_mcbsp3_sdma_reqs, > - .main_clk = "mcbsp3_fck", > - .prcm = { > - .omap2 = { > -@@ -2939,18 +2890,6 @@ static struct omap_hwmod_class > omap34xx_mcspi_class = { > - }; > - > - /* mcspi1 */ > --static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { > -- { .name = "tx0", .dma_req = 35 }, > -- { .name = "rx0", .dma_req = 36 }, > -- { .name = "tx1", .dma_req = 37 }, > -- { .name = "rx1", .dma_req = 38 }, > -- { .name = "tx2", .dma_req = 39 }, > -- { .name = "rx2", .dma_req = 40 }, > -- { .name = "tx3", .dma_req = 41 }, > -- { .name = "rx3", .dma_req = 42 }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { > - &omap34xx_l4_core__mcspi1, > - }; > -@@ -2962,7 +2901,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi1_dev_attr = { > - static struct omap_hwmod omap34xx_mcspi1 = { > - .name = "mcspi1", > - .mpu_irqs = omap2_mcspi1_mpu_irqs, > -- .sdma_reqs = omap34xx_mcspi1_sdma_reqs, > -+ .sdma_reqs = omap2_mcspi1_sdma_reqs, > - .main_clk = "mcspi1_fck", > - .prcm = { > - .omap2 = { > -@@ -2981,14 +2920,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { > - }; > - > - /* mcspi2 */ > --static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { > -- { .name = "tx0", .dma_req = 43 }, > -- { .name = "rx0", .dma_req = 44 }, > -- { .name = "tx1", .dma_req = 45 }, > -- { .name = "rx1", .dma_req = 46 }, > -- { .dma_req = -1 } > --}; > -- > - static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { > - &omap34xx_l4_core__mcspi2, > - }; > -@@ -3000,7 +2931,7 @@ static struct omap2_mcspi_dev_attr > omap_mcspi2_dev_attr = { > - static struct omap_hwmod omap34xx_mcspi2 = { > - .name = "mcspi2", > - .mpu_irqs = omap2_mcspi2_mpu_irqs, > -- .sdma_reqs = omap34xx_mcspi2_sdma_reqs, > -+ .sdma_reqs = omap2_mcspi2_sdma_reqs, > - .main_clk = "mcspi2_fck", > - .prcm = { > - .omap2 = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c > b/arch/arm/mach-omap2/omap_hwmod_common_data.c > -index 08a1342..de832eb 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c > -@@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields > omap_hwmod_sysc_type2 = { > - .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, > - }; > - > -- > --/* > -- * omap_hwmod class data > -- */ > -- > --struct omap_hwmod_class l3_hwmod_class = { > -- .name = "l3" > --}; > -- > --struct omap_hwmod_class l4_hwmod_class = { > -- .name = "l4" > --}; > -- > --struct omap_hwmod_class mpu_hwmod_class = { > -- .name = "mpu" > --}; > -- > --struct omap_hwmod_class iva_hwmod_class = { > -- .name = "iva" > --}; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h > b/arch/arm/mach-omap2/omap_hwmod_common_data.h > -index 1ac878c..b636cf6 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.h > -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h > -@@ -51,6 +51,21 @@ extern struct omap_hwmod_addr_space > omap2_mcbsp1_addrs[]; > - > - /* Common IP block data across OMAP2xxx */ > - extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; > -+extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[]; > -+ > -+/* Common IP block data */ > -+extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[]; > -+extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[]; > -+extern struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[]; > -+extern struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[]; > -+extern struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[]; > -+extern struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[]; > -+extern struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[]; > -+extern struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[]; > -+extern struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[]; > -+ > -+/* Common IP block data on OMAP2430/OMAP3 */ > -+extern struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[]; > - > - /* Common IP block data across OMAP2/3 */ > - extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod- > share-identical-omap_hwmod_class-omap_hwm.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod-share-identical- > omap_hwmod_class-omap_hwm.patch > deleted file mode 100644 > index f4e644b..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod-share- > identical-omap_hwmod_class-omap_hwm.patch > +++ /dev/null > @@ -1,1730 +0,0 @@ > -From 7fb59da1fff606542858e006b001e1cb63e1d708 Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sat, 9 Jul 2011 19:14:08 -0600 > -Subject: [PATCH 043/149] omap_hwmod: share identical omap_hwmod_class, > omap_hwmod_class_sysconfig arrays > - > -To reduce kernel source file data duplication, share struct > -omap_hwmod_class and omap_hwmod_class_sysconfig arrays across > OMAP2xxx > -and 3xxx hwmod data files. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 267 +++------------ > ----- > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 273 +++------------ > ----- > - .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 228 > +++++++++++----- > - arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 123 > +++++++++ > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 105 +------- > - arch/arm/mach-omap2/omap_hwmod_common_data.h | 11 + > - 6 files changed, 364 insertions(+), 643 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index 6acc01f..f3901ab 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -274,24 +274,6 @@ static struct omap_hwmod omap2420_iva_hwmod > = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > --/* Timer Common */ > --static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | > SYSC_HAS_CLOCKACTIVITY | > -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2420_timer_hwmod_class = { > -- .name = "timer", > -- .sysc = &omap2420_timer_sysc, > -- .rev = OMAP_TIMER_IP_VERSION_1, > --}; > -- > - /* timer1 */ > - static struct omap_hwmod omap2420_timer1_hwmod; > - > -@@ -334,7 +316,7 @@ static struct omap_hwmod > omap2420_timer1_hwmod = { > - }, > - .slaves = omap2420_timer1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -371,7 +353,7 @@ static struct omap_hwmod > omap2420_timer2_hwmod = { > - }, > - .slaves = omap2420_timer2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -408,7 +390,7 @@ static struct omap_hwmod > omap2420_timer3_hwmod = { > - }, > - .slaves = omap2420_timer3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -445,7 +427,7 @@ static struct omap_hwmod > omap2420_timer4_hwmod = { > - }, > - .slaves = omap2420_timer4_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -482,7 +464,7 @@ static struct omap_hwmod > omap2420_timer5_hwmod = { > - }, > - .slaves = omap2420_timer5_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -520,7 +502,7 @@ static struct omap_hwmod > omap2420_timer6_hwmod = { > - }, > - .slaves = omap2420_timer6_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -557,7 +539,7 @@ static struct omap_hwmod > omap2420_timer7_hwmod = { > - }, > - .slaves = omap2420_timer7_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -594,7 +576,7 @@ static struct omap_hwmod > omap2420_timer8_hwmod = { > - }, > - .slaves = omap2420_timer8_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -631,7 +613,7 @@ static struct omap_hwmod > omap2420_timer9_hwmod = { > - }, > - .slaves = omap2420_timer9_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -668,7 +650,7 @@ static struct omap_hwmod > omap2420_timer10_hwmod = { > - }, > - .slaves = omap2420_timer10_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -705,7 +687,7 @@ static struct omap_hwmod > omap2420_timer11_hwmod = { > - }, > - .slaves = omap2420_timer11_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -742,7 +724,7 @@ static struct omap_hwmod > omap2420_timer12_hwmod = { > - }, > - .slaves = omap2420_timer12_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), > -- .class = &omap2420_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) > - }; > - > -@@ -764,27 +746,6 @@ static struct omap_hwmod_ocp_if > omap2420_l4_wkup__wd_timer2 = { > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > --/* > -- * 'wd_timer' class > -- * 32-bit watchdog upward counter that generates a pulse on the reset pin on > -- * overflow condition > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { > -- .name = "wd_timer", > -- .sysc = &omap2420_wd_timer_sysc, > -- .pre_shutdown = &omap2_wd_timer_disable > --}; > -- > - /* wd_timer2 */ > - static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { > - &omap2420_l4_wkup__wd_timer2, > -@@ -792,7 +753,7 @@ static struct omap_hwmod_ocp_if > *omap2420_wd_timer2_slaves[] = { > - > - static struct omap_hwmod omap2420_wd_timer2_hwmod = { > - .name = "wd_timer2", > -- .class = &omap2420_wd_timer_hwmod_class, > -+ .class = &omap2xxx_wd_timer_hwmod_class, > - .main_clk = "mpu_wdt_fck", > - .prcm = { > - .omap2 = { > -@@ -808,24 +769,6 @@ static struct omap_hwmod > omap2420_wd_timer2_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > - > --/* UART */ > -- > --static struct omap_hwmod_class_sysconfig uart_sysc = { > -- .rev_offs = 0x50, > -- .sysc_offs = 0x54, > -- .syss_offs = 0x58, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class uart_class = { > -- .name = "uart", > -- .sysc = &uart_sysc, > --}; > -- > - /* UART1 */ > - > - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { > -@@ -848,7 +791,7 @@ static struct omap_hwmod omap2420_uart1_hwmod > = { > - }, > - .slaves = omap2420_uart1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > - > -@@ -874,7 +817,7 @@ static struct omap_hwmod omap2420_uart2_hwmod > = { > - }, > - .slaves = omap2420_uart2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > - > -@@ -900,28 +843,10 @@ static struct omap_hwmod > omap2420_uart3_hwmod = { > - }, > - .slaves = omap2420_uart3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > - > --/* > -- * 'dss' class > -- * display sub-system > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2420_dss_hwmod_class = { > -- .name = "dss", > -- .sysc = &omap2420_dss_sysc, > --}; > -- > - /* dss */ > - /* dss master ports */ > - static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { > -@@ -955,7 +880,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { > - > - static struct omap_hwmod omap2420_dss_core_hwmod = { > - .name = "dss_core", > -- .class = &omap2420_dss_hwmod_class, > -+ .class = &omap2_dss_hwmod_class, > - .main_clk = "dss1_fck", /* instead of dss_fck */ > - .sdma_reqs = omap2xxx_dss_sdma_chs, > - .prcm = { > -@@ -977,27 +902,6 @@ static struct omap_hwmod > omap2420_dss_core_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'dispc' class > -- * display controller > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | > -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > -- MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2420_dispc_hwmod_class = { > -- .name = "dispc", > -- .sysc = &omap2420_dispc_sysc, > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { > - .master = &omap2420_l4_core_hwmod, > -@@ -1020,7 +924,7 @@ static struct omap_hwmod_ocp_if > *omap2420_dss_dispc_slaves[] = { > - > - static struct omap_hwmod omap2420_dss_dispc_hwmod = { > - .name = "dss_dispc", > -- .class = &omap2420_dispc_hwmod_class, > -+ .class = &omap2_dispc_hwmod_class, > - .mpu_irqs = omap2_dispc_irqs, > - .main_clk = "dss1_fck", > - .prcm = { > -@@ -1038,26 +942,6 @@ static struct omap_hwmod > omap2420_dss_dispc_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'rfbi' class > -- * remote frame buffer interface > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { > -- .name = "rfbi", > -- .sysc = &omap2420_rfbi_sysc, > --}; > -- > - /* l4_core -> dss_rfbi */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { > - .master = &omap2420_l4_core_hwmod, > -@@ -1080,7 +964,7 @@ static struct omap_hwmod_ocp_if > *omap2420_dss_rfbi_slaves[] = { > - > - static struct omap_hwmod omap2420_dss_rfbi_hwmod = { > - .name = "dss_rfbi", > -- .class = &omap2420_rfbi_hwmod_class, > -+ .class = &omap2_rfbi_hwmod_class, > - .main_clk = "dss1_fck", > - .prcm = { > - .omap2 = { > -@@ -1095,15 +979,6 @@ static struct omap_hwmod > omap2420_dss_rfbi_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'venc' class > -- * video encoder > -- */ > -- > --static struct omap_hwmod_class omap2420_venc_hwmod_class = { > -- .name = "venc", > --}; > -- > - /* l4_core -> dss_venc */ > - static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { > - .master = &omap2420_l4_core_hwmod, > -@@ -1127,7 +1002,7 @@ static struct omap_hwmod_ocp_if > *omap2420_dss_venc_slaves[] = { > - > - static struct omap_hwmod omap2420_dss_venc_hwmod = { > - .name = "dss_venc", > -- .class = &omap2420_venc_hwmod_class, > -+ .class = &omap2_venc_hwmod_class, > - .main_clk = "dss1_fck", > - .prcm = { > - .omap2 = { > -@@ -1292,27 +1167,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = > { > - .dbck_flag = false, > - }; > - > --static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | > -- SYSS_HAS_RESET_STATUS), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --/* > -- * 'gpio' class > -- * general purpose io module > -- */ > --static struct omap_hwmod_class omap242x_gpio_hwmod_class = { > -- .name = "gpio", > -- .sysc = &omap242x_gpio_sysc, > -- .rev = 0, > --}; > -- > - /* gpio1 */ > - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { > - &omap2420_l4_wkup__gpio1, > -@@ -1334,7 +1188,7 @@ static struct omap_hwmod > omap2420_gpio1_hwmod = { > - }, > - .slaves = omap2420_gpio1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), > -- .class = &omap242x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > -@@ -1360,7 +1214,7 @@ static struct omap_hwmod > omap2420_gpio2_hwmod = { > - }, > - .slaves = omap2420_gpio2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), > -- .class = &omap242x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > -@@ -1386,7 +1240,7 @@ static struct omap_hwmod > omap2420_gpio3_hwmod = { > - }, > - .slaves = omap2420_gpio3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), > -- .class = &omap242x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > -@@ -1412,28 +1266,11 @@ static struct omap_hwmod > omap2420_gpio4_hwmod = { > - }, > - .slaves = omap2420_gpio4_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), > -- .class = &omap242x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > - > --/* system dma */ > --static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x002c, > -- .syss_offs = 0x0028, > -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | > -- SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | > -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -- .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2420_dma_hwmod_class = { > -- .name = "dma", > -- .sysc = &omap2420_dma_sysc, > --}; > -- > - /* dma attributes */ > - static struct omap_dma_dev_attr dma_dev_attr = { > - .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | > GLOBAL_PRIORITY | > -@@ -1470,7 +1307,7 @@ static struct omap_hwmod_ocp_if > *omap2420_dma_system_slaves[] = { > - > - static struct omap_hwmod omap2420_dma_system_hwmod = { > - .name = "dma", > -- .class = &omap2420_dma_hwmod_class, > -+ .class = &omap2xxx_dma_hwmod_class, > - .mpu_irqs = omap2_dma_system_irqs, > - .main_clk = "core_l3_ck", > - .slaves = omap2420_dma_system_slaves, > -@@ -1482,27 +1319,6 @@ static struct omap_hwmod > omap2420_dma_system_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'mailbox' class > -- * mailbox module allowing communication between the on-chip processors > -- * using a queued mailbox-interrupt mechanism. > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = { > -- .rev_offs = 0x000, > -- .sysc_offs = 0x010, > -- .syss_offs = 0x014, > -- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | > SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2420_mailbox_hwmod_class = { > -- .name = "mailbox", > -- .sysc = &omap2420_mailbox_sysc, > --}; > -- > - /* mailbox */ > - static struct omap_hwmod omap2420_mailbox_hwmod; > - static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { > -@@ -1526,7 +1342,7 @@ static struct omap_hwmod_ocp_if > *omap2420_mailbox_slaves[] = { > - > - static struct omap_hwmod omap2420_mailbox_hwmod = { > - .name = "mailbox", > -- .class = &omap2420_mailbox_hwmod_class, > -+ .class = &omap2xxx_mailbox_hwmod_class, > - .mpu_irqs = omap2420_mailbox_irqs, > - .main_clk = "mailboxes_ick", > - .prcm = { > -@@ -1543,29 +1359,6 @@ static struct omap_hwmod > omap2420_mailbox_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > - > --/* > -- * 'mcspi' class > -- * multichannel serial port interface (mcspi) / master/slave synchronous serial > -- * bus > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | > SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_ENAWAKEUP | > SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE | > SYSS_HAS_RESET_STATUS), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2420_mcspi_class = { > -- .name = "mcspi", > -- .sysc = &omap2420_mcspi_sysc, > -- .rev = OMAP2_MCSPI_REV, > --}; > -- > - /* mcspi1 */ > - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { > - &omap2420_l4_core__mcspi1, > -@@ -1591,8 +1384,8 @@ static struct omap_hwmod > omap2420_mcspi1_hwmod = { > - }, > - .slaves = omap2420_mcspi1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), > -- .class = &omap2420_mcspi_class, > -- .dev_attr = &omap_mcspi1_dev_attr, > -+ .class = &omap2xxx_mcspi_class, > -+ .dev_attr = &omap_mcspi1_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > - > -@@ -1621,8 +1414,8 @@ static struct omap_hwmod > omap2420_mcspi2_hwmod = { > - }, > - .slaves = omap2420_mcspi2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), > -- .class = &omap2420_mcspi_class, > -- .dev_attr = &omap_mcspi2_dev_attr, > -+ .class = &omap2xxx_mcspi_class, > -+ .dev_attr = &omap_mcspi2_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), > - }; > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index 639acd5..2a52f02 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -347,24 +347,6 @@ static struct omap_hwmod omap2430_iva_hwmod > = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > --/* Timer Common */ > --static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | > SYSC_HAS_CLOCKACTIVITY | > -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2430_timer_hwmod_class = { > -- .name = "timer", > -- .sysc = &omap2430_timer_sysc, > -- .rev = OMAP_TIMER_IP_VERSION_1, > --}; > -- > - /* timer1 */ > - static struct omap_hwmod omap2430_timer1_hwmod; > - > -@@ -407,7 +389,7 @@ static struct omap_hwmod > omap2430_timer1_hwmod = { > - }, > - .slaves = omap2430_timer1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -444,7 +426,7 @@ static struct omap_hwmod > omap2430_timer2_hwmod = { > - }, > - .slaves = omap2430_timer2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -481,7 +463,7 @@ static struct omap_hwmod > omap2430_timer3_hwmod = { > - }, > - .slaves = omap2430_timer3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -518,7 +500,7 @@ static struct omap_hwmod > omap2430_timer4_hwmod = { > - }, > - .slaves = omap2430_timer4_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -555,7 +537,7 @@ static struct omap_hwmod > omap2430_timer5_hwmod = { > - }, > - .slaves = omap2430_timer5_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -592,7 +574,7 @@ static struct omap_hwmod > omap2430_timer6_hwmod = { > - }, > - .slaves = omap2430_timer6_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -629,7 +611,7 @@ static struct omap_hwmod > omap2430_timer7_hwmod = { > - }, > - .slaves = omap2430_timer7_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -666,7 +648,7 @@ static struct omap_hwmod > omap2430_timer8_hwmod = { > - }, > - .slaves = omap2430_timer8_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -703,7 +685,7 @@ static struct omap_hwmod > omap2430_timer9_hwmod = { > - }, > - .slaves = omap2430_timer9_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -740,7 +722,7 @@ static struct omap_hwmod > omap2430_timer10_hwmod = { > - }, > - .slaves = omap2430_timer10_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -777,7 +759,7 @@ static struct omap_hwmod > omap2430_timer11_hwmod = { > - }, > - .slaves = omap2430_timer11_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -814,7 +796,7 @@ static struct omap_hwmod > omap2430_timer12_hwmod = { > - }, > - .slaves = omap2430_timer12_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), > -- .class = &omap2430_timer_hwmod_class, > -+ .class = &omap2xxx_timer_hwmod_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) > - }; > - > -@@ -836,27 +818,6 @@ static struct omap_hwmod_ocp_if > omap2430_l4_wkup__wd_timer2 = { > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > --/* > -- * 'wd_timer' class > -- * 32-bit watchdog upward counter that generates a pulse on the reset pin on > -- * overflow condition > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { > -- .rev_offs = 0x0, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { > -- .name = "wd_timer", > -- .sysc = &omap2430_wd_timer_sysc, > -- .pre_shutdown = &omap2_wd_timer_disable > --}; > -- > - /* wd_timer2 */ > - static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { > - &omap2430_l4_wkup__wd_timer2, > -@@ -864,7 +825,7 @@ static struct omap_hwmod_ocp_if > *omap2430_wd_timer2_slaves[] = { > - > - static struct omap_hwmod omap2430_wd_timer2_hwmod = { > - .name = "wd_timer2", > -- .class = &omap2430_wd_timer_hwmod_class, > -+ .class = &omap2xxx_wd_timer_hwmod_class, > - .main_clk = "mpu_wdt_fck", > - .prcm = { > - .omap2 = { > -@@ -880,24 +841,6 @@ static struct omap_hwmod > omap2430_wd_timer2_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > --/* UART */ > -- > --static struct omap_hwmod_class_sysconfig uart_sysc = { > -- .rev_offs = 0x50, > -- .sysc_offs = 0x54, > -- .syss_offs = 0x58, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class uart_class = { > -- .name = "uart", > -- .sysc = &uart_sysc, > --}; > -- > - /* UART1 */ > - > - static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { > -@@ -920,7 +863,7 @@ static struct omap_hwmod omap2430_uart1_hwmod > = { > - }, > - .slaves = omap2430_uart1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > -@@ -946,7 +889,7 @@ static struct omap_hwmod omap2430_uart2_hwmod > = { > - }, > - .slaves = omap2430_uart2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > -@@ -972,28 +915,10 @@ static struct omap_hwmod > omap2430_uart3_hwmod = { > - }, > - .slaves = omap2430_uart3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > --/* > -- * 'dss' class > -- * display sub-system > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2430_dss_hwmod_class = { > -- .name = "dss", > -- .sysc = &omap2430_dss_sysc, > --}; > -- > - /* dss */ > - /* dss master ports */ > - static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { > -@@ -1021,7 +946,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = > { > - > - static struct omap_hwmod omap2430_dss_core_hwmod = { > - .name = "dss_core", > -- .class = &omap2430_dss_hwmod_class, > -+ .class = &omap2_dss_hwmod_class, > - .main_clk = "dss1_fck", /* instead of dss_fck */ > - .sdma_reqs = omap2xxx_dss_sdma_chs, > - .prcm = { > -@@ -1043,27 +968,6 @@ static struct omap_hwmod > omap2430_dss_core_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'dispc' class > -- * display controller > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | > -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > -- MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2430_dispc_hwmod_class = { > -- .name = "dispc", > -- .sysc = &omap2430_dispc_sysc, > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { > - .master = &omap2430_l4_core_hwmod, > -@@ -1080,7 +984,7 @@ static struct omap_hwmod_ocp_if > *omap2430_dss_dispc_slaves[] = { > - > - static struct omap_hwmod omap2430_dss_dispc_hwmod = { > - .name = "dss_dispc", > -- .class = &omap2430_dispc_hwmod_class, > -+ .class = &omap2_dispc_hwmod_class, > - .mpu_irqs = omap2_dispc_irqs, > - .main_clk = "dss1_fck", > - .prcm = { > -@@ -1098,26 +1002,6 @@ static struct omap_hwmod > omap2430_dss_dispc_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'rfbi' class > -- * remote frame buffer interface > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { > -- .name = "rfbi", > -- .sysc = &omap2430_rfbi_sysc, > --}; > -- > - /* l4_core -> dss_rfbi */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { > - .master = &omap2430_l4_core_hwmod, > -@@ -1134,7 +1018,7 @@ static struct omap_hwmod_ocp_if > *omap2430_dss_rfbi_slaves[] = { > - > - static struct omap_hwmod omap2430_dss_rfbi_hwmod = { > - .name = "dss_rfbi", > -- .class = &omap2430_rfbi_hwmod_class, > -+ .class = &omap2_rfbi_hwmod_class, > - .main_clk = "dss1_fck", > - .prcm = { > - .omap2 = { > -@@ -1149,15 +1033,6 @@ static struct omap_hwmod > omap2430_dss_rfbi_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'venc' class > -- * video encoder > -- */ > -- > --static struct omap_hwmod_class omap2430_venc_hwmod_class = { > -- .name = "venc", > --}; > -- > - /* l4_core -> dss_venc */ > - static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { > - .master = &omap2430_l4_core_hwmod, > -@@ -1175,7 +1050,7 @@ static struct omap_hwmod_ocp_if > *omap2430_dss_venc_slaves[] = { > - > - static struct omap_hwmod omap2430_dss_venc_hwmod = { > - .name = "dss_venc", > -- .class = &omap2430_venc_hwmod_class, > -+ .class = &omap2_venc_hwmod_class, > - .main_clk = "dss1_fck", > - .prcm = { > - .omap2 = { > -@@ -1367,27 +1242,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = > { > - .dbck_flag = false, > - }; > - > --static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | > -- SYSS_HAS_RESET_STATUS), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --/* > -- * 'gpio' class > -- * general purpose io module > -- */ > --static struct omap_hwmod_class omap243x_gpio_hwmod_class = { > -- .name = "gpio", > -- .sysc = &omap243x_gpio_sysc, > -- .rev = 0, > --}; > -- > - /* gpio1 */ > - static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { > - &omap2430_l4_wkup__gpio1, > -@@ -1409,7 +1263,7 @@ static struct omap_hwmod > omap2430_gpio1_hwmod = { > - }, > - .slaves = omap2430_gpio1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), > -- .class = &omap243x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > -@@ -1435,7 +1289,7 @@ static struct omap_hwmod > omap2430_gpio2_hwmod = { > - }, > - .slaves = omap2430_gpio2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), > -- .class = &omap243x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > -@@ -1461,7 +1315,7 @@ static struct omap_hwmod > omap2430_gpio3_hwmod = { > - }, > - .slaves = omap2430_gpio3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), > -- .class = &omap243x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > -@@ -1487,7 +1341,7 @@ static struct omap_hwmod > omap2430_gpio4_hwmod = { > - }, > - .slaves = omap2430_gpio4_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), > -- .class = &omap243x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > -@@ -1518,28 +1372,11 @@ static struct omap_hwmod > omap2430_gpio5_hwmod = { > - }, > - .slaves = omap2430_gpio5_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), > -- .class = &omap243x_gpio_hwmod_class, > -+ .class = &omap2xxx_gpio_hwmod_class, > - .dev_attr = &gpio_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > --/* dma_system */ > --static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x002c, > -- .syss_offs = 0x0028, > -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | > -- SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | > -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -- .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2430_dma_hwmod_class = { > -- .name = "dma", > -- .sysc = &omap2430_dma_sysc, > --}; > -- > - /* dma attributes */ > - static struct omap_dma_dev_attr dma_dev_attr = { > - .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | > GLOBAL_PRIORITY | > -@@ -1576,7 +1413,7 @@ static struct omap_hwmod_ocp_if > *omap2430_dma_system_slaves[] = { > - > - static struct omap_hwmod omap2430_dma_system_hwmod = { > - .name = "dma", > -- .class = &omap2430_dma_hwmod_class, > -+ .class = &omap2xxx_dma_hwmod_class, > - .mpu_irqs = omap2_dma_system_irqs, > - .main_clk = "core_l3_ck", > - .slaves = omap2430_dma_system_slaves, > -@@ -1588,27 +1425,6 @@ static struct omap_hwmod > omap2430_dma_system_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'mailbox' class > -- * mailbox module allowing communication between the on-chip processors > -- * using a queued mailbox-interrupt mechanism. > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = { > -- .rev_offs = 0x000, > -- .sysc_offs = 0x010, > -- .syss_offs = 0x014, > -- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | > SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_SOFTRESET | > SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { > -- .name = "mailbox", > -- .sysc = &omap2430_mailbox_sysc, > --}; > -- > - /* mailbox */ > - static struct omap_hwmod omap2430_mailbox_hwmod; > - static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { > -@@ -1631,7 +1447,7 @@ static struct omap_hwmod_ocp_if > *omap2430_mailbox_slaves[] = { > - > - static struct omap_hwmod omap2430_mailbox_hwmod = { > - .name = "mailbox", > -- .class = &omap2430_mailbox_hwmod_class, > -+ .class = &omap2xxx_mailbox_hwmod_class, > - .mpu_irqs = omap2430_mailbox_irqs, > - .main_clk = "mailboxes_ick", > - .prcm = { > -@@ -1648,29 +1464,6 @@ static struct omap_hwmod > omap2430_mailbox_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > --/* > -- * 'mcspi' class > -- * multichannel serial port interface (mcspi) / master/slave synchronous serial > -- * bus > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | > SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_ENAWAKEUP | > SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE | > SYSS_HAS_RESET_STATUS), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap2430_mcspi_class = { > -- .name = "mcspi", > -- .sysc = &omap2430_mcspi_sysc, > -- .rev = OMAP2_MCSPI_REV, > --}; > -- > - /* mcspi1 */ > - static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { > - &omap2430_l4_core__mcspi1, > -@@ -1696,8 +1489,8 @@ static struct omap_hwmod > omap2430_mcspi1_hwmod = { > - }, > - .slaves = omap2430_mcspi1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), > -- .class = &omap2430_mcspi_class, > -- .dev_attr = &omap_mcspi1_dev_attr, > -+ .class = &omap2xxx_mcspi_class, > -+ .dev_attr = &omap_mcspi1_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > -@@ -1726,8 +1519,8 @@ static struct omap_hwmod > omap2430_mcspi2_hwmod = { > - }, > - .slaves = omap2430_mcspi2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), > -- .class = &omap2430_mcspi_class, > -- .dev_attr = &omap_mcspi2_dev_attr, > -+ .class = &omap2xxx_mcspi_class, > -+ .dev_attr = &omap_mcspi2_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > -@@ -1769,8 +1562,8 @@ static struct omap_hwmod > omap2430_mcspi3_hwmod = { > - }, > - .slaves = omap2430_mcspi3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), > -- .class = &omap2430_mcspi_class, > -- .dev_attr = &omap_mcspi3_dev_attr, > -+ .class = &omap2xxx_mcspi_class, > -+ .dev_attr = &omap_mcspi3_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), > - }; > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > -index 7c4f5ab..c451729 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c > -@@ -16,6 +16,164 @@ > - > - #include "omap_hwmod_common_data.h" > - > -+/* UART */ > -+ > -+static struct omap_hwmod_class_sysconfig omap2_uart_sysc = { > -+ .rev_offs = 0x50, > -+ .sysc_offs = 0x54, > -+ .syss_offs = 0x58, > -+ .sysc_flags = (SYSC_HAS_SIDLEMODE | > -+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | > -+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2_uart_class = { > -+ .name = "uart", > -+ .sysc = &omap2_uart_sysc, > -+}; > -+ > -+/* > -+ * 'dss' class > -+ * display sub-system > -+ */ > -+ > -+static struct omap_hwmod_class_sysconfig omap2_dss_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2_dss_hwmod_class = { > -+ .name = "dss", > -+ .sysc = &omap2_dss_sysc, > -+}; > -+ > -+/* > -+ * 'dispc' class > -+ * display controller > -+ */ > -+ > -+static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | > -+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > -+ MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2_dispc_hwmod_class = { > -+ .name = "dispc", > -+ .sysc = &omap2_dispc_sysc, > -+}; > -+ > -+/* > -+ * 'rfbi' class > -+ * remote frame buffer interface > -+ */ > -+ > -+static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | > -+ SYSC_HAS_AUTOIDLE), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2_rfbi_hwmod_class = { > -+ .name = "rfbi", > -+ .sysc = &omap2_rfbi_sysc, > -+}; > -+ > -+/* > -+ * 'venc' class > -+ * video encoder > -+ */ > -+ > -+struct omap_hwmod_class omap2_venc_hwmod_class = { > -+ .name = "venc", > -+}; > -+ > -+ > -+/* Common DMA request line data */ > -+struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { > -+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > -+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { > -+ { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ > -+ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ > -+ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ > -+ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ > -+ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ > -+ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ > -+ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ > -+ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { > -+ { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ > -+ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > -+ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ > -+ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = 32 }, > -+ { .name = "tx", .dma_req = 31 }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = 34 }, > -+ { .name = "tx", .dma_req = 33 }, > -+ { .dma_req = -1 } > -+}; > -+ > -+struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { > -+ { .name = "rx", .dma_req = 18 }, > -+ { .name = "tx", .dma_req = 17 }, > -+ { .dma_req = -1 } > -+}; > -+ > -+/* Other IP block data */ > -+ > - > - /* > - * omap_hwmod class data > -@@ -162,73 +320,3 @@ struct omap_hwmod_irq_info > omap2_mcspi2_mpu_irqs[] = { > - { .irq = -1 } > - }; > - > --/* Common DMA request line data */ > --struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { > -- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, > -- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { > -- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, > -- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { > -- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ > -- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ > -- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ > -- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ > -- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ > -- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ > -- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ > -- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { > -- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ > -- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ > -- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ > -- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { > -- { .name = "rx", .dma_req = 32 }, > -- { .name = "tx", .dma_req = 31 }, > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { > -- { .name = "rx", .dma_req = 34 }, > -- { .name = "tx", .dma_req = 33 }, > -- { .dma_req = -1 } > --}; > -- > --struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { > -- { .name = "rx", .dma_req = 18 }, > -- { .name = "tx", .dma_req = 17 }, > -- { .dma_req = -1 } > --}; > -- > -- > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > -index f5b63ef..177dee2 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c > -@@ -11,10 +11,13 @@ > - #include <plat/omap_hwmod.h> > - #include <plat/serial.h> > - #include <plat/dma.h> > -+#include <plat/dmtimer.h> > -+#include <plat/mcspi.h> > - > - #include <mach/irqs.h> > - > - #include "omap_hwmod_common_data.h" > -+#include "wd_timer.h" > - > - struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { > - { .irq = 48, }, > -@@ -25,3 +28,123 @@ struct omap_hwmod_dma_info > omap2xxx_dss_sdma_chs[] = { > - { .name = "dispc", .dma_req = 5 }, > - { .dma_req = -1 } > - }; > -+/* OMAP2xxx Timer Common */ > -+static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_SIDLEMODE | > SYSC_HAS_CLOCKACTIVITY | > -+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | > -+ SYSC_HAS_AUTOIDLE), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2xxx_timer_hwmod_class = { > -+ .name = "timer", > -+ .sysc = &omap2xxx_timer_sysc, > -+ .rev = OMAP_TIMER_IP_VERSION_1, > -+}; > -+ > -+/* > -+ * 'wd_timer' class > -+ * 32-bit watchdog upward counter that generates a pulse on the reset pin on > -+ * overflow condition > -+ */ > -+ > -+static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | > -+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = { > -+ .name = "wd_timer", > -+ .sysc = &omap2xxx_wd_timer_sysc, > -+ .pre_shutdown = &omap2_wd_timer_disable > -+}; > -+ > -+/* > -+ * 'gpio' class > -+ * general purpose io module > -+ */ > -+static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | > -+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | > -+ SYSS_HAS_RESET_STATUS), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2xxx_gpio_hwmod_class = { > -+ .name = "gpio", > -+ .sysc = &omap2xxx_gpio_sysc, > -+ .rev = 0, > -+}; > -+ > -+/* system dma */ > -+static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x002c, > -+ .syss_offs = 0x0028, > -+ .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | > -+ SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | > -+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -+ .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2xxx_dma_hwmod_class = { > -+ .name = "dma", > -+ .sysc = &omap2xxx_dma_sysc, > -+}; > -+ > -+/* > -+ * 'mailbox' class > -+ * mailbox module allowing communication between the on-chip processors > -+ * using a queued mailbox-interrupt mechanism. > -+ */ > -+ > -+static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = { > -+ .rev_offs = 0x000, > -+ .sysc_offs = 0x010, > -+ .syss_offs = 0x014, > -+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | > SYSC_HAS_SIDLEMODE | > -+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = { > -+ .name = "mailbox", > -+ .sysc = &omap2xxx_mailbox_sysc, > -+}; > -+ > -+/* > -+ * 'mcspi' class > -+ * multichannel serial port interface (mcspi) / master/slave synchronous serial > -+ * bus > -+ */ > -+ > -+static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = { > -+ .rev_offs = 0x0000, > -+ .sysc_offs = 0x0010, > -+ .syss_offs = 0x0014, > -+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | > SYSC_HAS_SIDLEMODE | > -+ SYSC_HAS_ENAWAKEUP | > SYSC_HAS_SOFTRESET | > -+ SYSC_HAS_AUTOIDLE | > SYSS_HAS_RESET_STATUS), > -+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -+ .sysc_fields = &omap_hwmod_sysc_type1, > -+}; > -+ > -+struct omap_hwmod_class omap2xxx_mcspi_class = { > -+ .name = "mcspi", > -+ .sysc = &omap2xxx_mcspi_sysc, > -+ .rev = OMAP2_MCSPI_REV, > -+}; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 001f67b..1a52716 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -1190,24 +1190,6 @@ static struct omap_hwmod > omap3xxx_wd_timer2_hwmod = { > - .flags = HWMOD_SWSUP_SIDLE, > - }; > - > --/* UART common */ > -- > --static struct omap_hwmod_class_sysconfig uart_sysc = { > -- .rev_offs = 0x50, > -- .sysc_offs = 0x54, > -- .syss_offs = 0x58, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | > -- SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class uart_class = { > -- .name = "uart", > -- .sysc = &uart_sysc, > --}; > -- > - /* UART1 */ > - > - static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { > -@@ -1230,7 +1212,7 @@ static struct omap_hwmod > omap3xxx_uart1_hwmod = { > - }, > - .slaves = omap3xxx_uart1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > - }; > - > -@@ -1256,7 +1238,7 @@ static struct omap_hwmod > omap3xxx_uart2_hwmod = { > - }, > - .slaves = omap3xxx_uart2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > - }; > - > -@@ -1282,7 +1264,7 @@ static struct omap_hwmod > omap3xxx_uart3_hwmod = { > - }, > - .slaves = omap3xxx_uart3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > - }; > - > -@@ -1319,7 +1301,7 @@ static struct omap_hwmod > omap3xxx_uart4_hwmod = { > - }, > - .slaves = omap3xxx_uart4_slaves, > - .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves), > -- .class = &uart_class, > -+ .class = &omap2_uart_class, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), > - }; > - > -@@ -1328,24 +1310,6 @@ static struct omap_hwmod_class i2c_class = { > - .sysc = &i2c_sysc, > - }; > - > --/* > -- * 'dss' class > -- * display sub-system > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap3xxx_dss_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { > -- .name = "dss", > -- .sysc = &omap3xxx_dss_sysc, > --}; > -- > - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { > - { .name = "dispc", .dma_req = 5 }, > - { .name = "dsi1", .dma_req = 74 }, > -@@ -1406,7 +1370,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] > = { > - > - static struct omap_hwmod omap3430es1_dss_core_hwmod = { > - .name = "dss_core", > -- .class = &omap3xxx_dss_hwmod_class, > -+ .class = &omap2_dss_hwmod_class, > - .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ > - .sdma_reqs = omap3xxx_dss_sdma_chs, > - .prcm = { > -@@ -1430,7 +1394,7 @@ static struct omap_hwmod > omap3430es1_dss_core_hwmod = { > - > - static struct omap_hwmod omap3xxx_dss_core_hwmod = { > - .name = "dss_core", > -- .class = &omap3xxx_dss_hwmod_class, > -+ .class = &omap2_dss_hwmod_class, > - .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ > - .sdma_reqs = omap3xxx_dss_sdma_chs, > - .prcm = { > -@@ -1453,28 +1417,6 @@ static struct omap_hwmod > omap3xxx_dss_core_hwmod = { > - CHIP_IS_OMAP3630ES1 | > CHIP_GE_OMAP3630ES1_1), > - }; > - > --/* > -- * 'dispc' class > -- * display controller > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap3xxx_dispc_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | > SYSC_HAS_CLOCKACTIVITY | > -- SYSC_HAS_MIDLEMODE | SYSC_HAS_ENAWAKEUP | > -- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | > -- MSTANDBY_FORCE | MSTANDBY_NO | > MSTANDBY_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { > -- .name = "dispc", > -- .sysc = &omap3xxx_dispc_sysc, > --}; > -- > - /* l4_core -> dss_dispc */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { > - .master = &omap3xxx_l4_core_hwmod, > -@@ -1498,7 +1440,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_dss_dispc_slaves[] = { > - > - static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { > - .name = "dss_dispc", > -- .class = &omap3xxx_dispc_hwmod_class, > -+ .class = &omap2_dispc_hwmod_class, > - .mpu_irqs = omap2_dispc_irqs, > - .main_clk = "dss1_alwon_fck", > - .prcm = { > -@@ -1580,26 +1522,6 @@ static struct omap_hwmod > omap3xxx_dss_dsi1_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'rfbi' class > -- * remote frame buffer interface > -- */ > -- > --static struct omap_hwmod_class_sysconfig omap3xxx_rfbi_sysc = { > -- .rev_offs = 0x0000, > -- .sysc_offs = 0x0010, > -- .syss_offs = 0x0014, > -- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | > -- SYSC_HAS_AUTOIDLE), > -- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), > -- .sysc_fields = &omap_hwmod_sysc_type1, > --}; > -- > --static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { > -- .name = "rfbi", > -- .sysc = &omap3xxx_rfbi_sysc, > --}; > -- > - /* l4_core -> dss_rfbi */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { > - .master = &omap3xxx_l4_core_hwmod, > -@@ -1623,7 +1545,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_dss_rfbi_slaves[] = { > - > - static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { > - .name = "dss_rfbi", > -- .class = &omap3xxx_rfbi_hwmod_class, > -+ .class = &omap2_rfbi_hwmod_class, > - .main_clk = "dss1_alwon_fck", > - .prcm = { > - .omap2 = { > -@@ -1640,15 +1562,6 @@ static struct omap_hwmod > omap3xxx_dss_rfbi_hwmod = { > - .flags = HWMOD_NO_IDLEST, > - }; > - > --/* > -- * 'venc' class > -- * video encoder > -- */ > -- > --static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { > -- .name = "venc", > --}; > -- > - /* l4_core -> dss_venc */ > - static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { > - .master = &omap3xxx_l4_core_hwmod, > -@@ -1673,7 +1586,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_dss_venc_slaves[] = { > - > - static struct omap_hwmod omap3xxx_dss_venc_hwmod = { > - .name = "dss_venc", > -- .class = &omap3xxx_venc_hwmod_class, > -+ .class = &omap2_venc_hwmod_class, > - .main_clk = "dss1_alwon_fck", > - .prcm = { > - .omap2 = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h > b/arch/arm/mach-omap2/omap_hwmod_common_data.h > -index b636cf6..39a7c37 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_common_data.h > -+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h > -@@ -98,6 +98,17 @@ extern struct omap_hwmod_class l3_hwmod_class; > - extern struct omap_hwmod_class l4_hwmod_class; > - extern struct omap_hwmod_class mpu_hwmod_class; > - extern struct omap_hwmod_class iva_hwmod_class; > -+extern struct omap_hwmod_class omap2_uart_class; > -+extern struct omap_hwmod_class omap2_dss_hwmod_class; > -+extern struct omap_hwmod_class omap2_dispc_hwmod_class; > -+extern struct omap_hwmod_class omap2_rfbi_hwmod_class; > -+extern struct omap_hwmod_class omap2_venc_hwmod_class; > - > -+extern struct omap_hwmod_class omap2xxx_timer_hwmod_class; > -+extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class; > -+extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class; > -+extern struct omap_hwmod_class omap2xxx_dma_hwmod_class; > -+extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class; > -+extern struct omap_hwmod_class omap2xxx_mcspi_class; > - > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4- > hwmod-data-Fix-L3-interconnect-data-order-and-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3- > interconnect-data-order-and-.patch > deleted file mode 100644 > index 0609f08..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4-hwmod- > data-Fix-L3-interconnect-data-order-and-.patch > +++ /dev/null > @@ -1,116 +0,0 @@ > -From 9723d81494f83fd1f9beb8af0f440b0ed30435fb Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:14:27 -0600 > -Subject: [PATCH 044/149] OMAP4: hwmod data: Fix L3 interconnect data > order and alignement > - > -Change the position of the ocp_if structure to match the template. > - > -Remove unneeded comma at the end of address space flag field. > - > -Remove USER_SDMA since this ocp link is only from the l3_main_1 > -path that is accessible only from the MPU in that case and not > -the SDMA. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 27 +++++++++++++--- > ----------- > - 1 files changed, 13 insertions(+), 14 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 316e922..94c0b60 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -216,6 +216,12 @@ static struct omap_hwmod > omap44xx_l3_instr_hwmod = { > - }; > - > - /* l3_main_1 interface data */ > -+static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { > -+ { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, > -+ { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > -+}; > -+ > - /* dsp -> l3_main_1 */ > - static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = { > - .master = &omap44xx_dsp_hwmod, > -@@ -264,18 +270,11 @@ static struct omap_hwmod_ocp_if > omap44xx_mmc2__l3_main_1 = { > - .user = OCP_USER_MPU | OCP_USER_SDMA, > - }; > - > --/* L3 target configuration and error log registers */ > --static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { > -- { .irq = 9 + OMAP44XX_IRQ_GIC_START }, > -- { .irq = 10 + OMAP44XX_IRQ_GIC_START }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { > - { > - .pa_start = 0x44000000, > - .pa_end = 0x44000fff, > -- .flags = ADDR_TYPE_RT, > -+ .flags = ADDR_TYPE_RT > - }, > - { } > - }; > -@@ -286,7 +285,7 @@ static struct omap_hwmod_ocp_if > omap44xx_mpu__l3_main_1 = { > - .slave = &omap44xx_l3_main_1_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_l3_main_1_addrs, > -- .user = OCP_USER_MPU | OCP_USER_SDMA, > -+ .user = OCP_USER_MPU, > - }; > - > - /* l3_main_1 slave ports */ > -@@ -303,9 +302,9 @@ static struct omap_hwmod_ocp_if > *omap44xx_l3_main_1_slaves[] = { > - static struct omap_hwmod omap44xx_l3_main_1_hwmod = { > - .name = "l3_main_1", > - .class = &omap44xx_l3_hwmod_class, > -- .mpu_irqs = omap44xx_l3_targ_irqs, > - .slaves = omap44xx_l3_main_1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), > -+ .mpu_irqs = omap44xx_l3_main_1_irqs, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -@@ -354,7 +353,7 @@ static struct omap_hwmod_addr_space > omap44xx_l3_main_2_addrs[] = { > - { > - .pa_start = 0x44800000, > - .pa_end = 0x44801fff, > -- .flags = ADDR_TYPE_RT, > -+ .flags = ADDR_TYPE_RT > - }, > - { } > - }; > -@@ -365,7 +364,7 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_1__l3_main_2 = { > - .slave = &omap44xx_l3_main_2_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_l3_main_2_addrs, > -- .user = OCP_USER_MPU | OCP_USER_SDMA, > -+ .user = OCP_USER_MPU, > - }; > - > - /* l4_cfg -> l3_main_2 */ > -@@ -409,7 +408,7 @@ static struct omap_hwmod_addr_space > omap44xx_l3_main_3_addrs[] = { > - { > - .pa_start = 0x45000000, > - .pa_end = 0x45000fff, > -- .flags = ADDR_TYPE_RT, > -+ .flags = ADDR_TYPE_RT > - }, > - { } > - }; > -@@ -420,7 +419,7 @@ static struct omap_hwmod_ocp_if > omap44xx_l3_main_1__l3_main_3 = { > - .slave = &omap44xx_l3_main_3_hwmod, > - .clk = "l3_div_ck", > - .addr = omap44xx_l3_main_3_addrs, > -- .user = OCP_USER_MPU | OCP_USER_SDMA, > -+ .user = OCP_USER_MPU, > - }; > - > - /* l3_main_2 -> l3_main_3 */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0045-OMAP4- > hwmod-data-Remove-un-needed-parens.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed- > parens.patch > deleted file mode 100644 > index eaf456e..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0045-OMAP4-hwmod- > data-Remove-un-needed-parens.patch > +++ /dev/null > @@ -1,42 +0,0 @@ > -From 27107815284e473d39b81df2ee65c1141f60a6cc Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:14:28 -0600 > -Subject: [PATCH 045/149] OMAP4: hwmod data: Remove un-needed parens > - > -A couple of parens were added around some flags. > - > -Remove them, since they are not needed and not used > -for any other hwmods. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 ++-- > - 1 files changed, 2 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 94c0b60..7eed6a2 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -3736,7 +3736,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mpu_masters[] = { > - static struct omap_hwmod omap44xx_mpu_hwmod = { > - .name = "mpu", > - .class = &omap44xx_mpu_hwmod_class, > -- .flags = (HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET), > -+ .flags = HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_mpu_irqs, > - .main_clk = "dpll_mpu_m2_ck", > - .prcm = { > -@@ -4750,7 +4750,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_uart3_slaves[] = { > - static struct omap_hwmod omap44xx_uart3_hwmod = { > - .name = "uart3", > - .class = &omap44xx_uart_hwmod_class, > -- .flags = (HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET), > -+ .flags = HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_uart3_irqs, > - .sdma_reqs = omap44xx_uart3_sdma_reqs, > - .main_clk = "uart3_fck", > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0046-OMAP4- > hwmod-data-Fix-bad-alignement.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch > deleted file mode 100644 > index b60f299..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0046-OMAP4-hwmod- > data-Fix-bad-alignement.patch > +++ /dev/null > @@ -1,218 +0,0 @@ > -From b3ef885514cc4b31d763b09dd78f26e2134c47c5 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:14:28 -0600 > -Subject: [PATCH 046/149] OMAP4: hwmod data: Fix bad alignement > - > -Fix .prcm alignement and usb_otg_hs class and hwmod structures. > - > -Add a couple of more potential hwmods in the comment. > -Remove hsi, since it is already included in the data. > - > -Remove one blank line. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 45 ++++++++++++++- > ------------ > - 1 files changed, 23 insertions(+), 22 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 7eed6a2..1975b05 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -632,7 +632,9 @@ static struct omap_hwmod > omap44xx_mpu_private_hwmod = { > - * gpmc > - * gpu > - * hdq1w > -- * hsi > -+ * mcasp > -+ * mpu_c0 > -+ * mpu_c1 > - * ocmc_ram > - * ocp2scp_usb_phy > - * ocp_wp_noc > -@@ -740,7 +742,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = > { > - .mpu_irqs = omap44xx_aess_irqs, > - .sdma_reqs = omap44xx_aess_sdma_reqs, > - .main_clk = "aess_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, > - }, > -@@ -769,7 +771,7 @@ static struct omap_hwmod_opt_clk > bandgap_opt_clks[] = { > - static struct omap_hwmod omap44xx_bandgap_hwmod = { > - .name = "bandgap", > - .class = &omap44xx_bandgap_hwmod_class, > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, > - }, > -@@ -828,7 +830,7 @@ static struct omap_hwmod > omap44xx_counter_32k_hwmod = { > - .class = &omap44xx_counter_hwmod_class, > - .flags = HWMOD_SWSUP_SIDLE, > - .main_clk = "sys_32k_ck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, > - }, > -@@ -1004,7 +1006,7 @@ static struct omap_hwmod > omap44xx_dmic_hwmod = { > - .mpu_irqs = omap44xx_dmic_irqs, > - .sdma_reqs = omap44xx_dmic_sdma_reqs, > - .main_clk = "dmic_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, > - }, > -@@ -2094,7 +2096,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod > = { > - .class = &omap44xx_hsi_hwmod_class, > - .mpu_irqs = omap44xx_hsi_irqs, > - .main_clk = "hsi_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, > - }, > -@@ -2391,7 +2393,7 @@ static struct omap_hwmod > omap44xx_ipu_c0_hwmod = { > - .flags = HWMOD_INIT_NO_RESET, > - .rst_lines = omap44xx_ipu_c0_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, > - }, > -@@ -2406,7 +2408,7 @@ static struct omap_hwmod > omap44xx_ipu_c1_hwmod = { > - .flags = HWMOD_INIT_NO_RESET, > - .rst_lines = omap44xx_ipu_c1_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, > - }, > -@@ -2421,7 +2423,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod > = { > - .rst_lines = omap44xx_ipu_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), > - .main_clk = "ipu_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, > - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, > -@@ -2507,7 +2509,7 @@ static struct omap_hwmod omap44xx_iss_hwmod > = { > - .mpu_irqs = omap44xx_iss_irqs, > - .sdma_reqs = omap44xx_iss_sdma_reqs, > - .main_clk = "iss_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, > - }, > -@@ -2687,7 +2689,7 @@ static struct omap_hwmod > omap44xx_kbd_hwmod = { > - .class = &omap44xx_kbd_hwmod_class, > - .mpu_irqs = omap44xx_kbd_irqs, > - .main_clk = "kbd_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, > - }, > -@@ -2751,7 +2753,7 @@ static struct omap_hwmod > omap44xx_mailbox_hwmod = { > - .name = "mailbox", > - .class = &omap44xx_mailbox_hwmod_class, > - .mpu_irqs = omap44xx_mailbox_irqs, > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, > - }, > -@@ -3133,7 +3135,7 @@ static struct omap_hwmod > omap44xx_mcpdm_hwmod = { > - .mpu_irqs = omap44xx_mcpdm_irqs, > - .sdma_reqs = omap44xx_mcpdm_sdma_reqs, > - .main_clk = "mcpdm_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, > - }, > -@@ -3430,7 +3432,6 @@ static struct omap_hwmod_class > omap44xx_mmc_hwmod_class = { > - }; > - > - /* mmc1 */ > -- > - static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { > - { .irq = 83 + OMAP44XX_IRQ_GIC_START }, > - { .irq = -1 } > -@@ -3481,7 +3482,7 @@ static struct omap_hwmod > omap44xx_mmc1_hwmod = { > - .mpu_irqs = omap44xx_mmc1_irqs, > - .sdma_reqs = omap44xx_mmc1_sdma_reqs, > - .main_clk = "mmc1_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_L3INIT_MMC1_CLKCTRL, > - }, > -@@ -3540,7 +3541,7 @@ static struct omap_hwmod > omap44xx_mmc2_hwmod = { > - .mpu_irqs = omap44xx_mmc2_irqs, > - .sdma_reqs = omap44xx_mmc2_sdma_reqs, > - .main_clk = "mmc2_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_L3INIT_MMC2_CLKCTRL, > - }, > -@@ -3594,7 +3595,7 @@ static struct omap_hwmod > omap44xx_mmc3_hwmod = { > - .mpu_irqs = omap44xx_mmc3_irqs, > - .sdma_reqs = omap44xx_mmc3_sdma_reqs, > - .main_clk = "mmc3_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, > - }, > -@@ -3647,7 +3648,7 @@ static struct omap_hwmod > omap44xx_mmc4_hwmod = { > - > - .sdma_reqs = omap44xx_mmc4_sdma_reqs, > - .main_clk = "mmc4_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, > - }, > -@@ -3699,7 +3700,7 @@ static struct omap_hwmod > omap44xx_mmc5_hwmod = { > - .mpu_irqs = omap44xx_mmc5_irqs, > - .sdma_reqs = omap44xx_mmc5_sdma_reqs, > - .main_clk = "mmc5_fck", > -- .prcm = { > -+ .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, > - }, > -@@ -4835,8 +4836,8 @@ static struct omap_hwmod_class_sysconfig > omap44xx_usb_otg_hs_sysc = { > - }; > - > - static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { > -- .name = "usb_otg_hs", > -- .sysc = &omap44xx_usb_otg_hs_sysc, > -+ .name = "usb_otg_hs", > -+ .sysc = &omap44xx_usb_otg_hs_sysc, > - }; > - > - /* usb_otg_hs */ > -@@ -4890,7 +4891,7 @@ static struct omap_hwmod > omap44xx_usb_otg_hs_hwmod = { > - }, > - }, > - .opt_clks = usb_otg_hs_opt_clks, > -- .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), > -+ .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), > - .slaves = omap44xx_usb_otg_hs_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), > - .masters = omap44xx_usb_otg_hs_masters, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4- > hwmod-data-Align-interconnect-format-with-regu.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4-hwmod-data-Align- > interconnect-format-with-regu.patch > deleted file mode 100644 > index f4b4857..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4-hwmod- > data-Align-interconnect-format-with-regu.patch > +++ /dev/null > @@ -1,154 +0,0 @@ > -From b47c49426b8f986331816c48996d9a64f0ebc0aa Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:14:28 -0600 > -Subject: [PATCH 047/149] OMAP4: hwmod data: Align interconnect format > with regular modules > - > -The interconnect modules were using a slightly different layout than > -the regular modules. > -Align the layout for better consitency. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 36 ++++++++++++++- > ------------- > - 1 files changed, 18 insertions(+), 18 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 1975b05..e011437 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -80,7 +80,12 @@ static struct omap_hwmod_class > omap44xx_dmm_hwmod_class = { > - .name = "dmm", > - }; > - > --/* dmm interface data */ > -+/* dmm */ > -+static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { > -+ { .irq = 113 + OMAP44XX_IRQ_GIC_START }, > -+ { .irq = -1 } > -+}; > -+ > - /* l3_main_1 -> dmm */ > - static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = { > - .master = &omap44xx_l3_main_1_hwmod, > -@@ -113,17 +118,12 @@ static struct omap_hwmod_ocp_if > *omap44xx_dmm_slaves[] = { > - &omap44xx_mpu__dmm, > - }; > - > --static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { > -- { .irq = 113 + OMAP44XX_IRQ_GIC_START }, > -- { .irq = -1 } > --}; > -- > - static struct omap_hwmod omap44xx_dmm_hwmod = { > - .name = "dmm", > - .class = &omap44xx_dmm_hwmod_class, > -+ .mpu_irqs = omap44xx_dmm_irqs, > - .slaves = omap44xx_dmm_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), > -- .mpu_irqs = omap44xx_dmm_irqs, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -@@ -135,7 +135,7 @@ static struct omap_hwmod_class > omap44xx_emif_fw_hwmod_class = { > - .name = "emif_fw", > - }; > - > --/* emif_fw interface data */ > -+/* emif_fw */ > - /* dmm -> emif_fw */ > - static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = { > - .master = &omap44xx_dmm_hwmod, > -@@ -184,7 +184,7 @@ static struct omap_hwmod_class > omap44xx_l3_hwmod_class = { > - .name = "l3", > - }; > - > --/* l3_instr interface data */ > -+/* l3_instr */ > - /* iva -> l3_instr */ > - static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = { > - .master = &omap44xx_iva_hwmod, > -@@ -215,7 +215,7 @@ static struct omap_hwmod > omap44xx_l3_instr_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --/* l3_main_1 interface data */ > -+/* l3_main_1 */ > - static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { > - { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, > - { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, > -@@ -302,13 +302,13 @@ static struct omap_hwmod_ocp_if > *omap44xx_l3_main_1_slaves[] = { > - static struct omap_hwmod omap44xx_l3_main_1_hwmod = { > - .name = "l3_main_1", > - .class = &omap44xx_l3_hwmod_class, > -+ .mpu_irqs = omap44xx_l3_main_1_irqs, > - .slaves = omap44xx_l3_main_1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), > -- .mpu_irqs = omap44xx_l3_main_1_irqs, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --/* l3_main_2 interface data */ > -+/* l3_main_2 */ > - /* dma_system -> l3_main_2 */ > - static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = { > - .master = &omap44xx_dma_system_hwmod, > -@@ -403,7 +403,7 @@ static struct omap_hwmod > omap44xx_l3_main_2_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --/* l3_main_3 interface data */ > -+/* l3_main_3 */ > - static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { > - { > - .pa_start = 0x45000000, > -@@ -461,7 +461,7 @@ static struct omap_hwmod_class > omap44xx_l4_hwmod_class = { > - .name = "l4", > - }; > - > --/* l4_abe interface data */ > -+/* l4_abe */ > - /* aess -> l4_abe */ > - static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { > - .master = &omap44xx_aess_hwmod, > -@@ -510,7 +510,7 @@ static struct omap_hwmod > omap44xx_l4_abe_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --/* l4_cfg interface data */ > -+/* l4_cfg */ > - /* l3_main_1 -> l4_cfg */ > - static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { > - .master = &omap44xx_l3_main_1_hwmod, > -@@ -532,7 +532,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod > = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --/* l4_per interface data */ > -+/* l4_per */ > - /* l3_main_2 -> l4_per */ > - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = { > - .master = &omap44xx_l3_main_2_hwmod, > -@@ -554,7 +554,7 @@ static struct omap_hwmod > omap44xx_l4_per_hwmod = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --/* l4_wkup interface data */ > -+/* l4_wkup */ > - /* l4_cfg -> l4_wkup */ > - static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = { > - .master = &omap44xx_l4_cfg_hwmod, > -@@ -584,7 +584,7 @@ static struct omap_hwmod_class > omap44xx_mpu_bus_hwmod_class = { > - .name = "mpu_bus", > - }; > - > --/* mpu_private interface data */ > -+/* mpu_private */ > - /* mpu -> mpu_private */ > - static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = { > - .master = &omap44xx_mpu_hwmod, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0048-OMAP4-clock- > data-Add-sddiv-to-USB-DPLL.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch > deleted file mode 100644 > index e3a50ac..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0048-OMAP4-clock-data- > Add-sddiv-to-USB-DPLL.patch > +++ /dev/null > @@ -1,31 +0,0 @@ > -From 4f6739c756baab556e7ad8ddb33c0d3fb822179a Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:14:45 -0600 > -Subject: [PATCH 048/149] OMAP4: clock data: Add sddiv to USB DPLL > - > -The USB DPLL is a J-Type DPLL with the sddiv extra parameter. Add it > -in USB DPLL. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -[paul@pwsan.com: dropped UNIPRO change since it is removed in a later > patch] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 1 + > - 1 files changed, 1 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 8c96567..f28a9c9 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -1015,6 +1015,7 @@ static struct dpll_data dpll_usb_dd = { > - .enable_mask = OMAP4430_DPLL_EN_MASK, > - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > -+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, > - .max_multiplier = OMAP4430_MAX_DPLL_MULT, > - .max_divider = OMAP4430_MAX_DPLL_DIV, > - .min_divider = 1, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0049-OMAP4-clock- > data-Remove-usb_host_fs-clkdev-with-NULL.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev- > with-NULL.patch > deleted file mode 100644 > index 8cb1123..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0049-OMAP4-clock-data- > Remove-usb_host_fs-clkdev-with-NULL.patch > +++ /dev/null > @@ -1,48 +0,0 @@ > -From 776007fbd8db1764179c9cf9f93d3b5ef2fef782 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:14:45 -0600 > -Subject: [PATCH 049/149] OMAP4: clock data: Remove usb_host_fs clkdev > with NULL dev > - > -usb_host_fs_fck does have a clkdev mapping with "usbhs-omap.0" > -and "fs_fck" alias used by the driver. > -The entry with NULL dev is thus not needed anymore. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Felipe Balbi <balbi@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 3 --- > - 1 files changed, 0 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index f28a9c9..0fa1cb8 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -3205,7 +3205,6 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "uart2_fck", &uart2_fck, > CK_443X), > - CLK(NULL, "uart3_fck", &uart3_fck, > CK_443X), > - CLK(NULL, "uart4_fck", &uart4_fck, > CK_443X), > -- CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, > CK_443X), > - CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, > CK_443X), > - CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, > CK_443X), > - CLK(NULL, "usb_host_hs_utmi_p1_clk", > &usb_host_hs_utmi_p1_clk, CK_443X), > -@@ -3217,7 +3216,6 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "usb_host_hs_hsic60m_p2_clk", > &usb_host_hs_hsic60m_p2_clk, CK_443X), > - CLK(NULL, "usb_host_hs_hsic480m_p2_clk", > &usb_host_hs_hsic480m_p2_clk, CK_443X), > - CLK(NULL, "usb_host_hs_func48mclk", > &usb_host_hs_func48mclk, CK_443X), > -- CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, > CK_443X), > - CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, > CK_443X), > - CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, > CK_443X), > - CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, > CK_443X), > -@@ -3227,7 +3225,6 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "usb_tll_hs_usb_ch2_clk", > &usb_tll_hs_usb_ch2_clk, CK_443X), > - CLK(NULL, "usb_tll_hs_usb_ch0_clk", > &usb_tll_hs_usb_ch0_clk, CK_443X), > - CLK(NULL, "usb_tll_hs_usb_ch1_clk", > &usb_tll_hs_usb_ch1_clk, CK_443X), > -- CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, > CK_443X), > - CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, > CK_443X), > - CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, > CK_443X), > - CLK(NULL, "usim_ck", &usim_ck, > CK_443X), > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0050-OMAP4-clock- > data-Re-order-some-clock-nodes-and-struc.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and- > struc.patch > deleted file mode 100644 > index 24a888c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0050-OMAP4-clock-data- > Re-order-some-clock-nodes-and-struc.patch > +++ /dev/null > @@ -1,229 +0,0 @@ > -From e19d3b7293245b4aad98b5ace320caad14e27c11 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:14:45 -0600 > -Subject: [PATCH 050/149] OMAP4: clock data: Re-order some clock nodes and > structure fields > - > -A couple of fieds were edited manually and thus do not stick > -to the template used by the generator and by other structures. > - > -Move them to the correct location. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -[paul@pwsan.com: dropped the UNIPRO changes since those will be removed > - in a later patch] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 66 +++++++++++++++++---------- > ------ > - 1 files changed, 34 insertions(+), 32 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 0fa1cb8..4b57d55 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -53,9 +53,9 @@ static struct clk extalt_clkin_ck = { > - static struct clk pad_clks_ck = { > - .name = "pad_clks_ck", > - .rate = 12000000, > -- .ops = &clkops_omap2_dflt, > -- .enable_reg = OMAP4430_CM_CLKSEL_ABE, > -- .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, > -+ .ops = &clkops_omap2_dflt, > -+ .enable_reg = OMAP4430_CM_CLKSEL_ABE, > -+ .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, > - }; > - > - static struct clk pad_slimbus_core_clks_ck = { > -@@ -73,9 +73,9 @@ static struct clk secure_32k_clk_src_ck = { > - static struct clk slimbus_clk = { > - .name = "slimbus_clk", > - .rate = 12000000, > -- .ops = &clkops_omap2_dflt, > -- .enable_reg = OMAP4430_CM_CLKSEL_ABE, > -- .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, > -+ .ops = &clkops_omap2_dflt, > -+ .enable_reg = OMAP4430_CM_CLKSEL_ABE, > -+ .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, > - }; > - > - static struct clk sys_32k_ck = { > -@@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = { > - static struct clk dpll_abe_x2_ck = { > - .name = "dpll_abe_x2_ck", > - .parent = &dpll_abe_ck, > -+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, > - .flags = CLOCK_CLKOUTX2, > - .ops = &clkops_omap4_dpllmx_ops, > - .recalc = &omap3_clkoutx2_recalc, > -- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, > - }; > - > - static const struct clksel_rate div31_1to31_rates[] = { > -@@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = { > - .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, > - .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, > - .ops = &clkops_omap2_dflt, > -- .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, > -- .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, > - .recalc = &omap2_clksel_recalc, > - .round_rate = &omap2_clksel_round_rate, > - .set_rate = &omap2_clksel_set_rate, > -+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, > -+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, > - }; > - > - static struct clk dpll_core_m7x2_ck = { > -@@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = { > - static struct clk dpll_per_x2_ck = { > - .name = "dpll_per_x2_ck", > - .parent = &dpll_per_ck, > -+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, > - .flags = CLOCK_CLKOUTX2, > - .ops = &clkops_omap4_dpllmx_ops, > - .recalc = &omap3_clkoutx2_recalc, > -- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, > - }; > - > - static const struct clksel dpll_per_m2x2_div[] = { > -@@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = { > - .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER, > - .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, > - .ops = &clkops_omap2_dflt, > -- .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, > -- .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, > - .recalc = &omap2_clksel_recalc, > - .round_rate = &omap2_clksel_round_rate, > - .set_rate = &omap2_clksel_set_rate, > -+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, > -+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, > - }; > - > - static struct clk dpll_per_m4x2_ck = { > -@@ -970,8 +970,9 @@ static struct clk dpll_unipro_ck = { > - static struct clk dpll_unipro_x2_ck = { > - .name = "dpll_unipro_x2_ck", > - .parent = &dpll_unipro_ck, > -+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, > - .flags = CLOCK_CLKOUTX2, > -- .ops = &clkops_null, > -+ .ops = &clkops_omap4_dpllmx_ops, > - .recalc = &omap3_clkoutx2_recalc, > - }; > - > -@@ -1036,8 +1037,8 @@ static struct clk dpll_usb_ck = { > - static struct clk dpll_usb_clkdcoldo_ck = { > - .name = "dpll_usb_clkdcoldo_ck", > - .parent = &dpll_usb_ck, > -- .ops = &clkops_omap4_dpllmx_ops, > - .clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB, > -+ .ops = &clkops_omap4_dpllmx_ops, > - .recalc = &followparent_recalc, > - }; > - > -@@ -1847,8 +1848,8 @@ static struct clk l3_instr_ick = { > - .ops = &clkops_omap2_dflt, > - .enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, > - .enable_bit = OMAP4430_MODULEMODE_HWCTRL, > -- .clkdm_name = "l3_instr_clkdm", > - .flags = ENABLE_ON_INIT, > -+ .clkdm_name = "l3_instr_clkdm", > - .parent = &l3_div_ck, > - .recalc = &followparent_recalc, > - }; > -@@ -1858,8 +1859,8 @@ static struct clk l3_main_3_ick = { > - .ops = &clkops_omap2_dflt, > - .enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, > - .enable_bit = OMAP4430_MODULEMODE_HWCTRL, > -- .clkdm_name = "l3_instr_clkdm", > - .flags = ENABLE_ON_INIT, > -+ .clkdm_name = "l3_instr_clkdm", > - .parent = &l3_div_ck, > - .recalc = &followparent_recalc, > - }; > -@@ -2163,8 +2164,8 @@ static struct clk ocp_wp_noc_ick = { > - .ops = &clkops_omap2_dflt, > - .enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, > - .enable_bit = OMAP4430_MODULEMODE_HWCTRL, > -- .clkdm_name = "l3_instr_clkdm", > - .flags = ENABLE_ON_INIT, > -+ .clkdm_name = "l3_instr_clkdm", > - .parent = &l3_div_ck, > - .recalc = &followparent_recalc, > - }; > -@@ -2896,6 +2897,7 @@ static struct clk auxclk2_ck = { > - .enable_reg = OMAP4_SCRM_AUXCLK2, > - .enable_bit = OMAP4_ENABLE_SHIFT, > - }; > -+ > - static struct clk auxclk3_ck = { > - .name = "auxclk3_ck", > - .parent = &sys_clkin_ck, > -@@ -3217,7 +3219,6 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "usb_host_hs_hsic480m_p2_clk", > &usb_host_hs_hsic480m_p2_clk, CK_443X), > - CLK(NULL, "usb_host_hs_func48mclk", > &usb_host_hs_func48mclk, CK_443X), > - CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, > CK_443X), > -- CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, > CK_443X), > - CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, > CK_443X), > - CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, > CK_443X), > - CLK("musb-omap2430", "ick", > &usb_otg_hs_ick, CK_443X), > -@@ -3226,15 +3227,25 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "usb_tll_hs_usb_ch0_clk", > &usb_tll_hs_usb_ch0_clk, CK_443X), > - CLK(NULL, "usb_tll_hs_usb_ch1_clk", > &usb_tll_hs_usb_ch1_clk, CK_443X), > - CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, > CK_443X), > -- CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, > CK_443X), > - CLK(NULL, "usim_ck", &usim_ck, > CK_443X), > - CLK(NULL, "usim_fclk", &usim_fclk, > CK_443X), > - CLK(NULL, "usim_fck", &usim_fck, > CK_443X), > - CLK("omap_wdt", "fck", > &wd_timer2_fck, CK_443X), > -- CLK(NULL, "mailboxes_ick", &dummy_ck, > CK_443X), > - CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, > CK_443X), > - CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, > CK_443X), > - CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, > CK_443X), > -+ CLK(NULL, "auxclk0_ck", &auxclk0_ck, > CK_443X), > -+ CLK(NULL, "auxclk1_ck", &auxclk1_ck, > CK_443X), > -+ CLK(NULL, "auxclk2_ck", &auxclk2_ck, > CK_443X), > -+ CLK(NULL, "auxclk3_ck", &auxclk3_ck, > CK_443X), > -+ CLK(NULL, "auxclk4_ck", &auxclk4_ck, > CK_443X), > -+ CLK(NULL, "auxclk5_ck", &auxclk5_ck, > CK_443X), > -+ CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, > CK_443X), > -+ CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, > CK_443X), > -+ CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, > CK_443X), > -+ CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, > CK_443X), > -+ CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, > CK_443X), > -+ CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, > CK_443X), > - CLK(NULL, "gpmc_ck", &dummy_ck, > CK_443X), > - CLK(NULL, "gpt1_ick", &dummy_ck, > CK_443X), > - CLK(NULL, "gpt2_ick", &dummy_ck, > CK_443X), > -@@ -3251,6 +3262,7 @@ static struct omap_clk omap44xx_clks[] = { > - CLK("omap_i2c.2", "ick", &dummy_ck, > CK_443X), > - CLK("omap_i2c.3", "ick", &dummy_ck, > CK_443X), > - CLK("omap_i2c.4", "ick", &dummy_ck, > CK_443X), > -+ CLK(NULL, "mailboxes_ick", &dummy_ck, > CK_443X), > - CLK("omap_hsmmc.0", "ick", &dummy_ck, > CK_443X), > - CLK("omap_hsmmc.1", "ick", &dummy_ck, > CK_443X), > - CLK("omap_hsmmc.2", "ick", &dummy_ck, > CK_443X), > -@@ -3268,19 +3280,9 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "uart2_ick", &dummy_ck, > CK_443X), > - CLK(NULL, "uart3_ick", &dummy_ck, > CK_443X), > - CLK(NULL, "uart4_ick", &dummy_ck, > CK_443X), > -+ CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, > CK_443X), > -+ CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, > CK_443X), > - CLK("omap_wdt", "ick", &dummy_ck, > CK_443X), > -- CLK(NULL, "auxclk0_ck", &auxclk0_ck, > CK_443X), > -- CLK(NULL, "auxclk1_ck", &auxclk1_ck, > CK_443X), > -- CLK(NULL, "auxclk2_ck", &auxclk2_ck, > CK_443X), > -- CLK(NULL, "auxclk3_ck", &auxclk3_ck, > CK_443X), > -- CLK(NULL, "auxclk4_ck", &auxclk4_ck, > CK_443X), > -- CLK(NULL, "auxclk5_ck", &auxclk5_ck, > CK_443X), > -- CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, > CK_443X), > -- CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, > CK_443X), > -- CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, > CK_443X), > -- CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, > CK_443X), > -- CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, > CK_443X), > -- CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, > CK_443X), > - }; > - > - int __init omap4xxx_clk_init(void) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0051-OMAP4-clock- > data-Fix-max-mult-and-div-for-USB-DPLL.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB- > DPLL.patch > deleted file mode 100644 > index c04c192..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0051-OMAP4-clock-data- > Fix-max-mult-and-div-for-USB-DPLL.patch > +++ /dev/null > @@ -1,143 +0,0 @@ > -From 6fdbb61306456ada90c0b0e3ee2c8245077b7b02 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:14:46 -0600 > -Subject: [PATCH 051/149] OMAP4: clock data: Fix max mult and div for USB > DPLL > - > -The DPLL USB can generate higher speed (x2) than the regular ones. > -The max multiplication value is then twice the previous value. > - > -Fix both max_mult and max_div with that correct values. > - > -Change the max_div variable type to u16 to allow storing up to 256. > - > -Replace as well the define with the value to avoid > -unneeded indirection and provide a better readability. > - > -Remove the defines that become useless. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx.h | 7 ------- > - arch/arm/mach-omap2/clock44xx_data.c | 29 ++++++++++++++------------- > -- > - arch/arm/plat-omap/include/plat/clock.h | 2 +- > - 3 files changed, 15 insertions(+), 23 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach- > omap2/clock44xx.h > -index 6be1095..7ceb870 100644 > ---- a/arch/arm/mach-omap2/clock44xx.h > -+++ b/arch/arm/mach-omap2/clock44xx.h > -@@ -8,13 +8,6 @@ > - #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H > - #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H > - > --/* > -- * XXX Missing values for the OMAP4 DPLL_USB > -- * XXX Missing min_multiplier values for all OMAP4 DPLLs > -- */ > --#define OMAP4430_MAX_DPLL_MULT 2047 > --#define OMAP4430_MAX_DPLL_DIV 128 > -- > - int omap4xxx_clk_init(void); > - > - #endif > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 4b57d55..8307c9e 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = { > - .enable_mask = OMAP4430_DPLL_EN_MASK, > - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, > -- .max_divider = OMAP4430_MAX_DPLL_DIV, > -+ .max_multiplier = 2047, > -+ .max_divider = 128, > - .min_divider = 1, > - }; > - > -@@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = { > - .enable_mask = OMAP4430_DPLL_EN_MASK, > - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, > -- .max_divider = OMAP4430_MAX_DPLL_DIV, > -+ .max_multiplier = 2047, > -+ .max_divider = 128, > - .min_divider = 1, > - }; > - > -@@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = { > - .enable_mask = OMAP4430_DPLL_EN_MASK, > - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, > -- .max_divider = OMAP4430_MAX_DPLL_DIV, > -+ .max_multiplier = 2047, > -+ .max_divider = 128, > - .min_divider = 1, > - }; > - > -@@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = { > - .enable_mask = OMAP4430_DPLL_EN_MASK, > - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, > -- .max_divider = OMAP4430_MAX_DPLL_DIV, > -+ .max_multiplier = 2047, > -+ .max_divider = 128, > - .min_divider = 1, > - }; > - > -@@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = { > - .enable_mask = OMAP4430_DPLL_EN_MASK, > - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, > -- .max_divider = OMAP4430_MAX_DPLL_DIV, > -+ .max_multiplier = 2047, > -+ .max_divider = 128, > - .min_divider = 1, > - }; > - > -@@ -949,9 +949,8 @@ static struct dpll_data dpll_unipro_dd = { > - .enable_mask = OMAP4430_DPLL_EN_MASK, > - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > -- .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, > -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, > -- .max_divider = OMAP4430_MAX_DPLL_DIV, > -+ .max_multiplier = 2047, > -+ .max_divider = 128, > - .min_divider = 1, > - }; > - > -@@ -1017,8 +1016,8 @@ static struct dpll_data dpll_usb_dd = { > - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > - .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, > -- .max_multiplier = OMAP4430_MAX_DPLL_MULT, > -- .max_divider = OMAP4430_MAX_DPLL_DIV, > -+ .max_multiplier = 4095, > -+ .max_divider = 256, > - .min_divider = 1, > - }; > - > -diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat- > omap/include/plat/clock.h > -index 006e599..f57e064 100644 > ---- a/arch/arm/plat-omap/include/plat/clock.h > -+++ b/arch/arm/plat-omap/include/plat/clock.h > -@@ -152,7 +152,7 @@ struct dpll_data { > - u16 max_multiplier; > - u8 last_rounded_n; > - u8 min_divider; > -- u8 max_divider; > -+ u16 max_divider; > - u8 modes; > - #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) > - void __iomem *autoidle_reg; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0052-OMAP4-prcm- > Fix-errors-in-few-defines-name.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch > deleted file mode 100644 > index e370992..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0052-OMAP4-prcm-Fix- > errors-in-few-defines-name.patch > +++ /dev/null > @@ -1,256 +0,0 @@ > -From e96136d547a0de958c051e0ec6a0873f27a94537 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:15:04 -0600 > -Subject: [PATCH 052/149] OMAP4: prcm: Fix errors in few defines name > - > -A couple of macros were wrongly changed during the _MOD to _INST > -rename done in the following commit: > - > - OMAP4: PRCM: rename _MOD macros to _INST > - cdb54c4457d68994da7c2e16907adfbfc130060d > - > -Fix them to their original name. > - > -Some CM and PRM instances were not well aligned. Align them. > - > -Remove one blank line in cm2_44xx.h to align the output with > -the other (cm1_44xx.h, prm44xx.h) files. > - > -Update header copyright date. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/cm1_44xx.h | 28 ++++++++++++++-------------- > - arch/arm/mach-omap2/cm2_44xx.h | 23 +++++++++++------------ > - arch/arm/mach-omap2/prm44xx.h | 22 +++++++++++----------- > - 3 files changed, 36 insertions(+), 37 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach- > omap2/cm1_44xx.h > -index e2d7a56..fc649f5 100644 > ---- a/arch/arm/mach-omap2/cm1_44xx.h > -+++ b/arch/arm/mach-omap2/cm1_44xx.h > -@@ -1,7 +1,7 @@ > - /* > - * OMAP44xx CM1 instance offset macros > - * > -- * Copyright (C) 2009-2010 Texas Instruments, Inc. > -+ * Copyright (C) 2009-2011 Texas Instruments, Inc. > - * Copyright (C) 2009-2010 Nokia Corporation > - * > - * Paul Walmsley (paul@pwsan.com) > -@@ -41,9 +41,9 @@ > - #define OMAP4430_CM1_INSTR_INST 0x0f00 > - > - /* CM1 clockdomain register offsets (from instance start) */ > --#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 > --#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 > --#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 > -+#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 > -+#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 > -+#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 > - > - /* CM1 */ > - > -@@ -82,8 +82,8 @@ > - #define OMAP4430_CM_DIV_M7_DPLL_CORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044) > - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048 > - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET 0x004c > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) > -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x004c > -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) > - #define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET > 0x0050 > - #define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050) > - #define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060 > -@@ -98,8 +98,8 @@ > - #define OMAP4430_CM_DIV_M2_DPLL_MPU > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070) > - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET > 0x0088 > - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET > 0x008c > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) > -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET > 0x008c > -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) > - #define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET > 0x009c > - #define OMAP4430_CM_BYPCLK_DPLL_MPU > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c) > - #define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0 > -@@ -116,8 +116,8 @@ > - #define OMAP4430_CM_DIV_M5_DPLL_IVA > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc) > - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET > 0x00c8 > - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET > 0x00cc > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) > -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET > 0x00cc > -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) > - #define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET > 0x00dc > - #define OMAP4430_CM_BYPCLK_DPLL_IVA > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc) > - #define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0 > -@@ -134,8 +134,8 @@ > - #define OMAP4430_CM_DIV_M3_DPLL_ABE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4) > - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET > 0x0108 > - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET > 0x010c > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) > -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET > 0x010c > -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) > - #define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET > 0x0120 > - #define OMAP4430_CM_CLKMODE_DPLL_DDRPHY > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120) > - #define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124 > -@@ -154,8 +154,8 @@ > - #define OMAP4430_CM_DIV_M6_DPLL_DDRPHY > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140) > - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET > 0x0148 > - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET > 0x014c > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) > -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET > 0x014c > -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) > - #define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET > 0x0160 > - #define OMAP4430_CM_SHADOW_FREQ_CONFIG1 > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160) > - #define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET > 0x0164 > -diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach- > omap2/cm2_44xx.h > -index aa47450..8036a16 100644 > ---- a/arch/arm/mach-omap2/cm2_44xx.h > -+++ b/arch/arm/mach-omap2/cm2_44xx.h > -@@ -1,7 +1,7 @@ > - /* > - * OMAP44xx CM2 instance offset macros > - * > -- * Copyright (C) 2009-2010 Texas Instruments, Inc. > -+ * Copyright (C) 2009-2011 Texas Instruments, Inc. > - * Copyright (C) 2009-2010 Nokia Corporation > - * > - * Paul Walmsley (paul@pwsan.com) > -@@ -40,9 +40,9 @@ > - #define OMAP4430_CM2_CAM_INST 0x1000 > - #define OMAP4430_CM2_DSS_INST 0x1100 > - #define OMAP4430_CM2_GFX_INST 0x1200 > --#define OMAP4430_CM2_L3INIT_INST 0x1300 > -+#define OMAP4430_CM2_L3INIT_INST 0x1300 > - #define OMAP4430_CM2_L4PER_INST 0x1400 > --#define OMAP4430_CM2_CEFUSE_INST 0x1600 > -+#define OMAP4430_CM2_CEFUSE_INST 0x1600 > - #define OMAP4430_CM2_RESTORE_INST 0x1e00 > - #define OMAP4430_CM2_INSTR_INST 0x1f00 > - > -@@ -65,7 +65,6 @@ > - #define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180 > - #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000 > - > -- > - /* CM2 */ > - > - /* CM2.OCP_SOCKET_CM2 register offsets */ > -@@ -121,8 +120,8 @@ > - #define OMAP4430_CM_DIV_M7_DPLL_PER > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064) > - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET > 0x0068 > - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET > 0x006c > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) > -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET > 0x006c > -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) > - #define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080 > - #define OMAP4430_CM_CLKMODE_DPLL_USB > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080) > - #define OMAP4_CM_IDLEST_DPLL_USB_OFFSET > 0x0084 > -@@ -135,8 +134,8 @@ > - #define OMAP4430_CM_DIV_M2_DPLL_USB > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090) > - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET > 0x00a8 > - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET > 0x00ac > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) > -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET > 0x00ac > -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) > - #define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4 > - #define OMAP4430_CM_CLKDCOLDO_DPLL_USB > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4) > - #define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET > 0x00c0 > -@@ -151,8 +150,8 @@ > - #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0) > - #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET > 0x00e8 > - #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET > 0x00ec > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) > -+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET > 0x00ec > -+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) > - > - /* CM2.ALWAYS_ON_CM2 register offsets */ > - #define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET > 0x0000 > -@@ -227,8 +226,8 @@ > - #define OMAP4430_CM_D2D_DYNAMICDEP > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508) > - #define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520 > - #define OMAP4430_CM_D2D_SAD2D_CLKCTRL > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520) > --#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET > 0x0528 > --#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) > -+#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET > 0x0528 > -+#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) > - #define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET > 0x0530 > - #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530) > - #define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET > 0x0600 > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index 67a0d3f..2aec8c8 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -31,7 +31,7 @@ > - #define OMAP4430_PRM_BASE 0x4a306000 > - > - #define OMAP44XX_PRM_REGADDR(inst, reg) \ > -- OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) > -+ OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) > - > - > - /* PRM instances */ > -@@ -46,14 +46,14 @@ > - #define OMAP4430_PRM_CAM_INST 0x1000 > - #define OMAP4430_PRM_DSS_INST 0x1100 > - #define OMAP4430_PRM_GFX_INST 0x1200 > --#define OMAP4430_PRM_L3INIT_INST 0x1300 > -+#define OMAP4430_PRM_L3INIT_INST 0x1300 > - #define OMAP4430_PRM_L4PER_INST 0x1400 > --#define OMAP4430_PRM_CEFUSE_INST 0x1600 > -+#define OMAP4430_PRM_CEFUSE_INST 0x1600 > - #define OMAP4430_PRM_WKUP_INST 0x1700 > - #define OMAP4430_PRM_WKUP_CM_INST 0x1800 > - #define OMAP4430_PRM_EMU_INST 0x1900 > --#define OMAP4430_PRM_EMU_CM_INST 0x1a00 > --#define OMAP4430_PRM_DEVICE_INST 0x1b00 > -+#define OMAP4430_PRM_EMU_CM_INST 0x1a00 > -+#define OMAP4430_PRM_DEVICE_INST 0x1b00 > - #define OMAP4430_PRM_INSTR_INST 0x1f00 > - > - /* PRM clockdomain register offsets (from instance start) */ > -@@ -247,8 +247,8 @@ > - #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464) > - #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 > - #define OMAP4430_RM_D2D_SAD2D_CONTEXT > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524) > --#define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET > 0x052c > --#define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) > -+#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET > 0x052c > -+#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) > - #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET > 0x0534 > - #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534) > - #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET > 0x0624 > -@@ -713,8 +713,8 @@ > - #define OMAP4430_PRM_VC_VAL_BYPASS > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0) > - #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET > 0x00a4 > - #define OMAP4430_PRM_VC_CFG_CHANNEL > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4) > --#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET 0x00a8 > --#define OMAP4430_PRM_VC_CFG_I2C_INSTE > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) > -+#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 > -+#define OMAP4430_PRM_VC_CFG_I2C_MODE > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) > - #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET > 0x00ac > - #define OMAP4430_PRM_VC_CFG_I2C_CLK > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac) > - #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 > -@@ -751,8 +751,8 @@ > - #define OMAP4430_PRM_PHASE2A_CNDP > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec) > - #define OMAP4_PRM_PHASE2B_CNDP_OFFSET > 0x00f0 > - #define OMAP4430_PRM_PHASE2B_CNDP > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0) > --#define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET > 0x00f4 > --#define OMAP4430_PRM_INSTEM_IF_CTRL > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) > -+#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET > 0x00f4 > -+#define OMAP4430_PRM_MODEM_IF_CTRL > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) > - #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 > - #define OMAP4430_PRM_VC_ERRST > OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8) > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0053-OMAP4-prm- > Remove-wrong-clockdomain-offsets.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch > deleted file mode 100644 > index ea6138e..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0053-OMAP4-prm- > Remove-wrong-clockdomain-offsets.patch > +++ /dev/null > @@ -1,50 +0,0 @@ > -From 6066c8802de9f6a1006a8e31aa833615060a2a5b Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:15:04 -0600 > -Subject: [PATCH 053/149] OMAP4: prm: Remove wrong clockdomain offsets > - > -The following commit introduced new macros to define an offset > -per clock domain in an instance. > - > -commit e4156ee52fe617c2c2d80b5db993ff4bf07d7c3c > - > - OMAP4: CM instances: add clockdomain register offsets > - > -The PRM contains only two clock controls management entities: > -EMU and WKUP. > -Remove the other ones. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/prm44xx.h | 12 ------------ > - 1 files changed, 0 insertions(+), 12 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index 2aec8c8..6e53120 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -57,19 +57,7 @@ > - #define OMAP4430_PRM_INSTR_INST 0x1f00 > - > - /* PRM clockdomain register offsets (from instance start) */ > --#define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000 > --#define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000 > --#define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000 > --#define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000 > --#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000 > --#define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000 > --#define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000 > --#define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000 > --#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000 > --#define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000 > --#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000 > - #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000 > --#define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000 > - #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000 > - > - /* OMAP4 specific register offsets */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0054-OMAP4- > powerdomain-data-Fix-indentation.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch > deleted file mode 100644 > index 93f10b1..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0054-OMAP4- > powerdomain-data-Fix-indentation.patch > +++ /dev/null > @@ -1,109 +0,0 @@ > -From 7845ad0aca7c2976dc4021ed0c080f6605aacf09 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:15:05 -0600 > -Subject: [PATCH 054/149] OMAP4: powerdomain data: Fix indentation > -MIME-Version: 1.0 > -Content-Type: text/plain; charset=UTF-8 > -Content-Transfer-Encoding: 8bit > - > -Indent flags to be aligned with other fields. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > -[paul@pwsan.com: split this patch from an earlier patch by Benoît; > - edited commit message] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/powerdomains44xx_data.c | 18 +++++++++--------- > - 1 files changed, 9 insertions(+), 9 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c > b/arch/arm/mach-omap2/powerdomains44xx_data.c > -index c4222c7..3a7e678 100644 > ---- a/arch/arm/mach-omap2/powerdomains44xx_data.c > -+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c > -@@ -53,7 +53,7 @@ static struct powerdomain core_44xx_pwrdm = { > - [3] = PWRSTS_ON, /* ducati_l2ram */ > - [4] = PWRSTS_ON, /* ducati_unicache */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* gfx_44xx_pwrdm: 3D accelerator power domain */ > -@@ -70,7 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* gfx_mem */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* abe_44xx_pwrdm: Audio back end power domain */ > -@@ -90,7 +90,7 @@ static struct powerdomain abe_44xx_pwrdm = { > - [0] = PWRSTS_ON, /* aessmem */ > - [1] = PWRSTS_ON, /* periphmem */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* dss_44xx_pwrdm: Display subsystem power domain */ > -@@ -108,7 +108,7 @@ static struct powerdomain dss_44xx_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* dss_mem */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* tesla_44xx_pwrdm: Tesla processor power domain */ > -@@ -130,7 +130,7 @@ static struct powerdomain tesla_44xx_pwrdm = { > - [1] = PWRSTS_ON, /* tesla_l1 */ > - [2] = PWRSTS_ON, /* tesla_l2 */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* wkup_44xx_pwrdm: Wake-up power domain */ > -@@ -241,7 +241,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { > - [2] = PWRSTS_ON, /* tcm1_mem */ > - [3] = PWRSTS_ON, /* tcm2_mem */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* cam_44xx_pwrdm: Camera subsystem power domain */ > -@@ -258,7 +258,7 @@ static struct powerdomain cam_44xx_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* cam_mem */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ > -@@ -276,7 +276,7 @@ static struct powerdomain l3init_44xx_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* l3init_bank1 */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* l4per_44xx_pwrdm: Target peripherals power domain */ > -@@ -296,7 +296,7 @@ static struct powerdomain l4per_44xx_pwrdm = { > - [0] = PWRSTS_ON, /* nonretained_bank */ > - [1] = PWRSTS_ON, /* retained_bank */ > - }, > -- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm- > Remove-RESTORE-macros-to-avoid-access-from-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE- > macros-to-avoid-access-from-.patch > deleted file mode 100644 > index a30bfc3..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm-Remove- > RESTORE-macros-to-avoid-access-from-.patch > +++ /dev/null > @@ -1,1523 +0,0 @@ > -From 8471ffc0eead8b884b6a00462fc57a2018fd9289 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:15:05 -0600 > -Subject: [PATCH 055/149] OMAP4: cm: Remove RESTORE macros to avoid > access from SW > - > -The restore part of the CM is an alias of some regular registers > -used only during the SAR restore to facilate the dma to write > -a contiguous set of registers. > -The registers should never be used by the SW, only the original > -register have to be used. > - > -Remove them from cmX_44xx.h files to avoid anybody to use them by > -mistake. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/cm-regbits-44xx.h | 623 ++++++++++++++------------- > ------ > - arch/arm/mach-omap2/cm1_44xx.h | 36 -- > - arch/arm/mach-omap2/cm2_44xx.h | 50 --- > - 3 files changed, 254 insertions(+), 455 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach- > omap2/cm-regbits-44xx.h > -index 9d47a05..0e77945 100644 > ---- a/arch/arm/mach-omap2/cm-regbits-44xx.h > -+++ b/arch/arm/mach-omap2/cm-regbits-44xx.h > -@@ -22,22 +22,18 @@ > - #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H > - #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H > - > --/* > -- * Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, > CM_MPU_DYNAMICDEP, > -- * CM_TESLA_DYNAMICDEP > -- */ > -+/* Used by CM_L3_1_DYNAMICDEP, CM_MPU_DYNAMICDEP, > CM_TESLA_DYNAMICDEP */ > - #define OMAP4430_ABE_DYNDEP_SHIFT 3 > - #define OMAP4430_ABE_DYNDEP_MASK (1 << > 3) > - > - /* > -- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, > CM_DUCATI_STATICDEP, > -- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, > -- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP > -+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, > CM_L3INIT_STATICDEP, > -+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP > - */ > - #define OMAP4430_ABE_STATDEP_SHIFT 3 > - #define OMAP4430_ABE_STATDEP_MASK (1 << > 3) > - > --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L4CFG_DYNAMICDEP */ > - #define OMAP4430_ALWONCORE_DYNDEP_SHIFT > 16 > - #define OMAP4430_ALWONCORE_DYNDEP_MASK > (1 << 16) > - > -@@ -47,14 +43,13 @@ > - > - /* > - * Used by CM_AUTOIDLE_DPLL_ABE, CM_AUTOIDLE_DPLL_CORE, > -- * CM_AUTOIDLE_DPLL_CORE_RESTORE, CM_AUTOIDLE_DPLL_DDRPHY, > -- * CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, > CM_AUTOIDLE_DPLL_PER, > -- * CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB > -+ * CM_AUTOIDLE_DPLL_DDRPHY, CM_AUTOIDLE_DPLL_IVA, > CM_AUTOIDLE_DPLL_MPU, > -+ * CM_AUTOIDLE_DPLL_PER, CM_AUTOIDLE_DPLL_UNIPRO, > CM_AUTOIDLE_DPLL_USB > - */ > - #define OMAP4430_AUTO_DPLL_MODE_SHIFT > 0 > - #define OMAP4430_AUTO_DPLL_MODE_MASK > (0x7 << 0) > - > --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L4CFG_DYNAMICDEP */ > - #define OMAP4430_CEFUSE_DYNDEP_SHIFT 17 > - #define OMAP4430_CEFUSE_DYNDEP_MASK (1 << > 17) > - > -@@ -82,15 +77,15 @@ > - #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_SHIFT 8 > - #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_MASK (1 << > 8) > - > --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ > -+/* Used by CM_MEMIF_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_SHIFT 11 > - #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_MASK > (1 << 11) > - > --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ > -+/* Used by CM_MEMIF_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_SHIFT 12 > - #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_MASK (1 << > 12) > - > --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ > -+/* Used by CM_MEMIF_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_SHIFT 13 > - #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_MASK (1 << > 13) > - > -@@ -110,31 +105,31 @@ > - #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT > 9 > - #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK > (1 << 9) > - > --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ > -+/* Used by CM_MEMIF_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_DLL_CLK_SHIFT 9 > - #define OMAP4430_CLKACTIVITY_DLL_CLK_MASK (1 << > 9) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_SHIFT > 9 > - #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_MASK > (1 << 9) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_SHIFT > 10 > - #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_MASK > (1 << 10) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_SHIFT 11 > - #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_MASK > (1 << 11) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_SHIFT 12 > - #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_MASK > (1 << 12) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_SHIFT 13 > - #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_MASK > (1 << 13) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_SHIFT 14 > - #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_MASK > (1 << 14) > - > -@@ -158,7 +153,7 @@ > - #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_SHIFT 10 > - #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_MASK (1 << > 10) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_SHIFT 15 > - #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_MASK (1 << > 15) > - > -@@ -170,55 +165,55 @@ > - #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_SHIFT > 11 > - #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_MASK > (1 << 11) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_SHIFT > 20 > - #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_MASK > (1 << 20) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_SHIFT 26 > - #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_MASK > (1 << 26) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_SHIFT > 21 > - #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_MASK > (1 << 21) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_SHIFT 27 > - #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_MASK > (1 << 27) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_SHIFT 13 > - #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_MASK (1 << > 13) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_SHIFT 12 > - #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_MASK (1 << > 12) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_SHIFT 28 > - #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_MASK (1 << > 28) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_SHIFT 29 > - #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_MASK (1 << > 29) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_SHIFT 11 > - #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_MASK (1 << > 11) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_SHIFT 16 > - #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_MASK (1 << > 16) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_SHIFT > 17 > - #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_MASK > (1 << 17) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_SHIFT > 18 > - #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_MASK > (1 << 18) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_SHIFT > 19 > - #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_MASK > (1 << 19) > - > -@@ -234,11 +229,11 @@ > - #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_SHIFT 10 > - #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_MASK (1 << > 10) > - > --/* Used by CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3_1_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_L3_1_GICLK_SHIFT 8 > - #define OMAP4430_CLKACTIVITY_L3_1_GICLK_MASK (1 << > 8) > - > --/* Used by CM_L3_2_CLKSTCTRL, CM_L3_2_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3_2_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_L3_2_GICLK_SHIFT 8 > - #define OMAP4430_CLKACTIVITY_L3_2_GICLK_MASK (1 << > 8) > - > -@@ -254,7 +249,7 @@ > - #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_SHIFT > 8 > - #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_MASK > (1 << 8) > - > --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ > -+/* Used by CM_MEMIF_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_SHIFT 8 > - #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_MASK > (1 << 8) > - > -@@ -262,7 +257,7 @@ > - #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_SHIFT > 8 > - #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_MASK > (1 << 8) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_SHIFT 8 > - #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_MASK > (1 << 8) > - > -@@ -282,7 +277,7 @@ > - #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_SHIFT 8 > - #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_MASK (1 << > 8) > - > --/* Used by CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4CFG_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_SHIFT > 8 > - #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_MASK > (1 << 8) > - > -@@ -290,11 +285,11 @@ > - #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_SHIFT > 9 > - #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_MASK > (1 << 9) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_SHIFT 9 > - #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_MASK > (1 << 9) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_SHIFT > 8 > - #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_MASK > (1 << 8) > - > -@@ -306,7 +301,7 @@ > - #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_SHIFT 12 > - #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_MASK > (1 << 12) > - > --/* Used by CM_MPU_CLKSTCTRL, CM_MPU_CLKSTCTRL_RESTORE */ > -+/* Used by CM_MPU_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_SHIFT > 8 > - #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_MASK > (1 << 8) > - > -@@ -314,43 +309,43 @@ > - #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_SHIFT 9 > - #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_MASK > (1 << 9) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_SHIFT 16 > - #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_MASK (1 << > 16) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_SHIFT 17 > - #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_MASK > (1 << 17) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_SHIFT 18 > - #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_MASK > (1 << 18) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_SHIFT 19 > - #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_MASK > (1 << 19) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_SHIFT > 25 > - #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_MASK > (1 << 25) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_SHIFT 20 > - #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_MASK (1 << > 20) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_SHIFT 21 > - #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_MASK (1 << > 21) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_SHIFT 22 > - #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_MASK (1 << > 22) > - > --/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L4PER_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_SHIFT 24 > - #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_MASK > (1 << 24) > - > --/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ > -+/* Used by CM_MEMIF_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_SHIFT > 10 > - #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_MASK > (1 << 10) > - > -@@ -378,27 +373,27 @@ > - #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_SHIFT 8 > - #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_MASK (1 << > 8) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_SHIFT 22 > - #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_MASK > (1 << 22) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_SHIFT 23 > - #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_MASK > (1 << 23) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_SHIFT 24 > - #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_MASK > (1 << 24) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_SHIFT 10 > - #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_MASK (1 << > 10) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_SHIFT > 14 > - #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_MASK > (1 << 14) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_SHIFT 15 > - #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_MASK (1 << > 15) > - > -@@ -406,11 +401,11 @@ > - #define OMAP4430_CLKACTIVITY_USIM_GFCLK_SHIFT 10 > - #define OMAP4430_CLKACTIVITY_USIM_GFCLK_MASK (1 << > 10) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_SHIFT 30 > - #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_MASK > (1 << 30) > - > --/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ > -+/* Used by CM_L3INIT_CLKSTCTRL */ > - #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_SHIFT 25 > - #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_MASK (1 << > 25) > - > -@@ -432,7 +427,7 @@ > - > - /* > - * Renamed from CLKSEL Used by CM_ABE_DSS_SYS_CLKSEL, > CM_ABE_PLL_REF_CLKSEL, > -- * CM_L4_WKUP_CLKSEL, CM_CLKSEL_DUCATI_ISS_ROOT, > CM_CLKSEL_USB_60MHZ > -+ * CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ, > CM_L4_WKUP_CLKSEL > - */ > - #define OMAP4430_CLKSEL_0_0_SHIFT 0 > - #define OMAP4430_CLKSEL_0_0_MASK (1 << > 0) > -@@ -453,14 +448,11 @@ > - #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24 > - #define OMAP4430_CLKSEL_AESS_FCLK_MASK > (1 << 24) > - > --/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ > -+/* Used by CM_CLKSEL_CORE */ > - #define OMAP4430_CLKSEL_CORE_SHIFT 0 > - #define OMAP4430_CLKSEL_CORE_MASK (1 << > 0) > - > --/* > -- * Renamed from CLKSEL_CORE Used by > CM_SHADOW_FREQ_CONFIG2_RESTORE, > -- * CM_SHADOW_FREQ_CONFIG2 > -- */ > -+/* Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2 */ > - #define OMAP4430_CLKSEL_CORE_1_1_SHIFT 1 > - #define OMAP4430_CLKSEL_CORE_1_1_MASK (1 << > 1) > - > -@@ -484,18 +476,15 @@ > - #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_SHIFT > 26 > - #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_MASK > (0x3 << 26) > - > --/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ > -+/* Used by CM_CLKSEL_CORE */ > - #define OMAP4430_CLKSEL_L3_SHIFT 4 > - #define OMAP4430_CLKSEL_L3_MASK (1 << > 4) > - > --/* > -- * Renamed from CLKSEL_L3 Used by > CM_SHADOW_FREQ_CONFIG2_RESTORE, > -- * CM_SHADOW_FREQ_CONFIG2 > -- */ > -+/* Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2 */ > - #define OMAP4430_CLKSEL_L3_SHADOW_SHIFT > 2 > - #define OMAP4430_CLKSEL_L3_SHADOW_MASK > (1 << 2) > - > --/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ > -+/* Used by CM_CLKSEL_CORE */ > - #define OMAP4430_CLKSEL_L4_SHIFT 8 > - #define OMAP4430_CLKSEL_L4_MASK (1 << > 8) > - > -@@ -526,11 +515,11 @@ > - #define OMAP4430_CLKSEL_SOURCE_24_24_SHIFT 24 > - #define OMAP4430_CLKSEL_SOURCE_24_24_MASK (1 << > 24) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_CLKSEL_UTMI_P1_SHIFT 24 > - #define OMAP4430_CLKSEL_UTMI_P1_MASK (1 << > 24) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_CLKSEL_UTMI_P2_SHIFT 25 > - #define OMAP4430_CLKSEL_UTMI_P2_MASK (1 << > 25) > - > -@@ -538,13 +527,10 @@ > - * Used by CM1_ABE_CLKSTCTRL, CM_ALWON_CLKSTCTRL, > CM_CAM_CLKSTCTRL, > - * CM_CEFUSE_CLKSTCTRL, CM_D2D_CLKSTCTRL, CM_DSS_CLKSTCTRL, > - * CM_DUCATI_CLKSTCTRL, CM_EMU_CLKSTCTRL, CM_GFX_CLKSTCTRL, > CM_IVAHD_CLKSTCTRL, > -- * CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE, > CM_L3INSTR_CLKSTCTRL, > -- * CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE, > CM_L3_2_CLKSTCTRL, > -- * CM_L3_2_CLKSTCTRL_RESTORE, CM_L4CFG_CLKSTCTRL, > CM_L4CFG_CLKSTCTRL_RESTORE, > -- * CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE, > CM_L4SEC_CLKSTCTRL, > -- * CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE, > CM_MPU_CLKSTCTRL, > -- * CM_MPU_CLKSTCTRL_RESTORE, CM_SDMA_CLKSTCTRL, > CM_TESLA_CLKSTCTRL, > -- * CM_WKUP_CLKSTCTRL > -+ * CM_L3INIT_CLKSTCTRL, CM_L3INSTR_CLKSTCTRL, CM_L3_1_CLKSTCTRL, > -+ * CM_L3_2_CLKSTCTRL, CM_L4CFG_CLKSTCTRL, CM_L4PER_CLKSTCTRL, > -+ * CM_L4SEC_CLKSTCTRL, CM_MEMIF_CLKSTCTRL, CM_MPU_CLKSTCTRL, > CM_SDMA_CLKSTCTRL, > -+ * CM_TESLA_CLKSTCTRL, CM_WKUP_CLKSTCTRL > - */ > - #define OMAP4430_CLKTRCTRL_SHIFT 0 > - #define OMAP4430_CLKTRCTRL_MASK (0x3 > << 0) > -@@ -561,10 +547,7 @@ > - #define OMAP4430_CUSTOM_SHIFT 6 > - #define OMAP4430_CUSTOM_MASK (0x3 > << 6) > - > --/* > -- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, > CM_L4CFG_DYNAMICDEP, > -- * CM_L4CFG_DYNAMICDEP_RESTORE > -- */ > -+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ > - #define OMAP4430_D2D_DYNDEP_SHIFT 18 > - #define OMAP4430_D2D_DYNDEP_MASK (1 << > 18) > - > -@@ -574,31 +557,29 @@ > - > - /* > - * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, > CM_SSC_DELTAMSTEP_DPLL_CORE, > -- * CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, > CM_SSC_DELTAMSTEP_DPLL_DDRPHY, > -- * CM_SSC_DELTAMSTEP_DPLL_IVA, CM_SSC_DELTAMSTEP_DPLL_MPU, > -- * CM_SSC_DELTAMSTEP_DPLL_PER, CM_SSC_DELTAMSTEP_DPLL_UNIPRO, > -- * CM_SSC_DELTAMSTEP_DPLL_USB > -+ * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA, > -+ * CM_SSC_DELTAMSTEP_DPLL_MPU, CM_SSC_DELTAMSTEP_DPLL_PER, > -+ * CM_SSC_DELTAMSTEP_DPLL_UNIPRO, CM_SSC_DELTAMSTEP_DPLL_USB > - */ > - #define OMAP4430_DELTAMSTEP_SHIFT 0 > - #define OMAP4430_DELTAMSTEP_MASK > (0xfffff << 0) > - > --/* Used by CM_SHADOW_FREQ_CONFIG1, > CM_SHADOW_FREQ_CONFIG1_RESTORE */ > --#define OMAP4430_DLL_OVERRIDE_SHIFT 2 > --#define OMAP4430_DLL_OVERRIDE_MASK (1 << > 2) > -+/* Used by CM_DLL_CTRL */ > -+#define OMAP4430_DLL_OVERRIDE_SHIFT 0 > -+#define OMAP4430_DLL_OVERRIDE_MASK (1 << > 0) > - > --/* Renamed from DLL_OVERRIDE Used by CM_DLL_CTRL */ > --#define OMAP4430_DLL_OVERRIDE_0_0_SHIFT > 0 > --#define OMAP4430_DLL_OVERRIDE_0_0_MASK > (1 << 0) > -+/* Renamed from DLL_OVERRIDE Used by CM_SHADOW_FREQ_CONFIG1 */ > -+#define OMAP4430_DLL_OVERRIDE_2_2_SHIFT > 2 > -+#define OMAP4430_DLL_OVERRIDE_2_2_MASK > (1 << 2) > - > --/* Used by CM_SHADOW_FREQ_CONFIG1, > CM_SHADOW_FREQ_CONFIG1_RESTORE */ > -+/* Used by CM_SHADOW_FREQ_CONFIG1 */ > - #define OMAP4430_DLL_RESET_SHIFT 3 > - #define OMAP4430_DLL_RESET_MASK (1 << > 3) > - > - /* > -- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, > -- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, > CM_CLKSEL_DPLL_IVA, > -- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, > CM_CLKSEL_DPLL_UNIPRO, > -- * CM_CLKSEL_DPLL_USB > -+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, > CM_CLKSEL_DPLL_DDRPHY, > -+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, > -+ * CM_CLKSEL_DPLL_UNIPRO, CM_CLKSEL_DPLL_USB > - */ > - #define OMAP4430_DPLL_BYP_CLKSEL_SHIFT 23 > - #define OMAP4430_DPLL_BYP_CLKSEL_MASK (1 << > 23) > -@@ -607,28 +588,19 @@ > - #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_SHIFT > 8 > - #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_MASK > (1 << 8) > - > --/* Used by CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_CORE_RESTORE */ > -+/* Used by CM_CLKSEL_DPLL_CORE */ > - #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_SHIFT 20 > - #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_MASK (1 << > 20) > - > --/* > -- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, > -- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER > -- */ > -+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, > CM_DIV_M3_DPLL_PER */ > - #define OMAP4430_DPLL_CLKOUTHIF_DIV_SHIFT 0 > - #define OMAP4430_DPLL_CLKOUTHIF_DIV_MASK (0x1f > << 0) > - > --/* > -- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, > -- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER > -- */ > -+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, > CM_DIV_M3_DPLL_PER */ > - #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_SHIFT > 5 > - #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_MASK > (1 << 5) > - > --/* > -- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, > -- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER > -- */ > -+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, > CM_DIV_M3_DPLL_PER */ > - #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT > 8 > - #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_MASK > (1 << 8) > - > -@@ -637,9 +609,8 @@ > - #define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK > (1 << 10) > - > - /* > -- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, > -- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, > CM_DIV_M2_DPLL_MPU, > -- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO > -+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, > CM_DIV_M2_DPLL_DDRPHY, > -+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, > CM_DIV_M2_DPLL_UNIPRO > - */ > - #define OMAP4430_DPLL_CLKOUT_DIV_SHIFT 0 > - #define OMAP4430_DPLL_CLKOUT_DIV_MASK (0x1f > << 0) > -@@ -649,9 +620,8 @@ > - #define OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK (0x7f > << 0) > - > - /* > -- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, > -- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, > CM_DIV_M2_DPLL_MPU, > -- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO > -+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, > CM_DIV_M2_DPLL_DDRPHY, > -+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, > CM_DIV_M2_DPLL_UNIPRO > - */ > - #define OMAP4430_DPLL_CLKOUT_DIVCHACK_SHIFT 5 > - #define OMAP4430_DPLL_CLKOUT_DIVCHACK_MASK (1 << > 5) > -@@ -661,29 +631,28 @@ > - #define OMAP4430_DPLL_CLKOUT_DIVCHACK_M2_USB_MASK > (1 << 7) > - > - /* > -- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, > -- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, > CM_DIV_M2_DPLL_MPU, > -- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB > -+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, > CM_DIV_M2_DPLL_DDRPHY, > -+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, > CM_DIV_M2_DPLL_USB > - */ > - #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_SHIFT 8 > - #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK (1 << > 8) > - > --/* Used by CM_SHADOW_FREQ_CONFIG1, > CM_SHADOW_FREQ_CONFIG1_RESTORE */ > -+/* Used by CM_SHADOW_FREQ_CONFIG1 */ > - #define OMAP4430_DPLL_CORE_DPLL_EN_SHIFT 8 > - #define OMAP4430_DPLL_CORE_DPLL_EN_MASK > (0x7 << 8) > - > --/* Used by CM_SHADOW_FREQ_CONFIG1, > CM_SHADOW_FREQ_CONFIG1_RESTORE */ > -+/* Used by CM_SHADOW_FREQ_CONFIG1 */ > - #define OMAP4430_DPLL_CORE_M2_DIV_SHIFT > 11 > - #define OMAP4430_DPLL_CORE_M2_DIV_MASK > (0x1f << 11) > - > --/* Used by CM_SHADOW_FREQ_CONFIG2, > CM_SHADOW_FREQ_CONFIG2_RESTORE */ > -+/* Used by CM_SHADOW_FREQ_CONFIG2 */ > - #define OMAP4430_DPLL_CORE_M5_DIV_SHIFT > 3 > - #define OMAP4430_DPLL_CORE_M5_DIV_MASK > (0x1f << 3) > - > - /* > -- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, > -- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, > CM_CLKSEL_DPLL_IVA, > -- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, > CM_CLKSEL_DPLL_UNIPRO > -+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, > CM_CLKSEL_DPLL_DDRPHY, > -+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, > -+ * CM_CLKSEL_DPLL_UNIPRO > - */ > - #define OMAP4430_DPLL_DIV_SHIFT 0 > - #define OMAP4430_DPLL_DIV_MASK (0x7f > << 0) > -@@ -693,9 +662,8 @@ > - #define OMAP4430_DPLL_DIV_0_7_MASK (0xff > << 0) > - > - /* > -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, > CM_CLKMODE_DPLL_IVA, > -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER > -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > CM_CLKMODE_DPLL_DDRPHY, > -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, > CM_CLKMODE_DPLL_PER > - */ > - #define OMAP4430_DPLL_DRIFTGUARD_EN_SHIFT 8 > - #define OMAP4430_DPLL_DRIFTGUARD_EN_MASK (1 << > 8) > -@@ -705,26 +673,25 @@ > - #define OMAP4430_DPLL_DRIFTGUARD_EN_3_3_MASK > (1 << 3) > - > - /* > -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, > CM_CLKMODE_DPLL_IVA, > -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, > CM_CLKMODE_DPLL_UNIPRO, > -- * CM_CLKMODE_DPLL_USB > -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > CM_CLKMODE_DPLL_DDRPHY, > -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, > CM_CLKMODE_DPLL_PER, > -+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB > - */ > - #define OMAP4430_DPLL_EN_SHIFT 0 > - #define OMAP4430_DPLL_EN_MASK (0x7 > << 0) > - > - /* > -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, > CM_CLKMODE_DPLL_IVA, > -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, > CM_CLKMODE_DPLL_UNIPRO > -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > CM_CLKMODE_DPLL_DDRPHY, > -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, > CM_CLKMODE_DPLL_PER, > -+ * CM_CLKMODE_DPLL_UNIPRO > - */ > - #define OMAP4430_DPLL_LPMODE_EN_SHIFT 10 > - #define OMAP4430_DPLL_LPMODE_EN_MASK (1 << > 10) > - > - /* > -- * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, > -- * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, > CM_CLKSEL_DPLL_IVA, > -- * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, > CM_CLKSEL_DPLL_UNIPRO > -+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, > CM_CLKSEL_DPLL_DDRPHY, > -+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, > -+ * CM_CLKSEL_DPLL_UNIPRO > - */ > - #define OMAP4430_DPLL_MULT_SHIFT 8 > - #define OMAP4430_DPLL_MULT_MASK > (0x7ff << 8) > -@@ -734,9 +701,9 @@ > - #define OMAP4430_DPLL_MULT_USB_MASK (0xfff > << 8) > - > - /* > -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, > CM_CLKMODE_DPLL_IVA, > -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, > CM_CLKMODE_DPLL_UNIPRO > -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > CM_CLKMODE_DPLL_DDRPHY, > -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, > CM_CLKMODE_DPLL_PER, > -+ * CM_CLKMODE_DPLL_UNIPRO > - */ > - #define OMAP4430_DPLL_REGM4XEN_SHIFT 11 > - #define OMAP4430_DPLL_REGM4XEN_MASK (1 << > 11) > -@@ -746,55 +713,46 @@ > - #define OMAP4430_DPLL_SD_DIV_MASK (0xff > << 24) > - > - /* > -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, > CM_CLKMODE_DPLL_IVA, > -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, > CM_CLKMODE_DPLL_UNIPRO, > -- * CM_CLKMODE_DPLL_USB > -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > CM_CLKMODE_DPLL_DDRPHY, > -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, > CM_CLKMODE_DPLL_PER, > -+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB > - */ > - #define OMAP4430_DPLL_SSC_ACK_SHIFT 13 > - #define OMAP4430_DPLL_SSC_ACK_MASK (1 << > 13) > - > - /* > -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, > CM_CLKMODE_DPLL_IVA, > -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, > CM_CLKMODE_DPLL_UNIPRO, > -- * CM_CLKMODE_DPLL_USB > -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > CM_CLKMODE_DPLL_DDRPHY, > -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, > CM_CLKMODE_DPLL_PER, > -+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB > - */ > - #define OMAP4430_DPLL_SSC_DOWNSPREAD_SHIFT 14 > - #define OMAP4430_DPLL_SSC_DOWNSPREAD_MASK (1 << > 14) > - > - /* > -- * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > -- * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, > CM_CLKMODE_DPLL_IVA, > -- * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, > CM_CLKMODE_DPLL_UNIPRO, > -- * CM_CLKMODE_DPLL_USB > -+ * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, > CM_CLKMODE_DPLL_DDRPHY, > -+ * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, > CM_CLKMODE_DPLL_PER, > -+ * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB > - */ > - #define OMAP4430_DPLL_SSC_EN_SHIFT 12 > - #define OMAP4430_DPLL_SSC_EN_MASK (1 << > 12) > - > --/* > -- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, > CM_L4CFG_DYNAMICDEP, > -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, > CM_L4PER_DYNAMICDEP_RESTORE > -- */ > -+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, > CM_L4PER_DYNAMICDEP */ > - #define OMAP4430_DSS_DYNDEP_SHIFT 8 > - #define OMAP4430_DSS_DYNDEP_MASK (1 << > 8) > - > --/* > -- * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, > CM_SDMA_STATICDEP, > -- * CM_SDMA_STATICDEP_RESTORE > -- */ > -+/* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, > CM_SDMA_STATICDEP */ > - #define OMAP4430_DSS_STATDEP_SHIFT 8 > - #define OMAP4430_DSS_STATDEP_MASK (1 << > 8) > - > --/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L3_2_DYNAMICDEP */ > - #define OMAP4430_DUCATI_DYNDEP_SHIFT 0 > - #define OMAP4430_DUCATI_DYNDEP_MASK (1 << > 0) > - > --/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP, > CM_SDMA_STATICDEP_RESTORE */ > -+/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ > - #define OMAP4430_DUCATI_STATDEP_SHIFT 0 > - #define OMAP4430_DUCATI_STATDEP_MASK (1 << > 0) > - > --/* Used by CM_SHADOW_FREQ_CONFIG1, > CM_SHADOW_FREQ_CONFIG1_RESTORE */ > -+/* Used by CM_SHADOW_FREQ_CONFIG1 */ > - #define OMAP4430_FREQ_UPDATE_SHIFT 0 > - #define OMAP4430_FREQ_UPDATE_MASK (1 << > 0) > - > -@@ -802,7 +760,7 @@ > - #define OMAP4430_FUNC_SHIFT 16 > - #define OMAP4430_FUNC_MASK (0xfff > << 16) > - > --/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L3_2_DYNAMICDEP */ > - #define OMAP4430_GFX_DYNDEP_SHIFT 10 > - #define OMAP4430_GFX_DYNDEP_MASK (1 << > 10) > - > -@@ -810,119 +768,95 @@ > - #define OMAP4430_GFX_STATDEP_SHIFT 10 > - #define OMAP4430_GFX_STATDEP_MASK (1 << > 10) > - > --/* Used by CM_SHADOW_FREQ_CONFIG2, > CM_SHADOW_FREQ_CONFIG2_RESTORE */ > -+/* Used by CM_SHADOW_FREQ_CONFIG2 */ > - #define OMAP4430_GPMC_FREQ_UPDATE_SHIFT > 0 > - #define OMAP4430_GPMC_FREQ_UPDATE_MASK > (1 << 0) > - > - /* > -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, > -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, > CM_DIV_M4_DPLL_PER > -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, > CM_DIV_M4_DPLL_IVA, > -+ * CM_DIV_M4_DPLL_PER > - */ > - #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_SHIFT 0 > - #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK (0x1f > << 0) > - > - /* > -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, > -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, > CM_DIV_M4_DPLL_PER > -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, > CM_DIV_M4_DPLL_IVA, > -+ * CM_DIV_M4_DPLL_PER > - */ > - #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_SHIFT 5 > - #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_MASK (1 << > 5) > - > - /* > -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, > -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, > CM_DIV_M4_DPLL_PER > -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, > CM_DIV_M4_DPLL_IVA, > -+ * CM_DIV_M4_DPLL_PER > - */ > - #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_SHIFT 8 > - #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_MASK (1 << > 8) > - > - /* > -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, > -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, > CM_DIV_M4_DPLL_PER > -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, > CM_DIV_M4_DPLL_IVA, > -+ * CM_DIV_M4_DPLL_PER > - */ > - #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_SHIFT > 12 > - #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_MASK > (1 << 12) > - > - /* > -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, > -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, > CM_DIV_M5_DPLL_PER > -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, > CM_DIV_M5_DPLL_IVA, > -+ * CM_DIV_M5_DPLL_PER > - */ > - #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_SHIFT 0 > - #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK (0x1f > << 0) > - > - /* > -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, > -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, > CM_DIV_M5_DPLL_PER > -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, > CM_DIV_M5_DPLL_IVA, > -+ * CM_DIV_M5_DPLL_PER > - */ > - #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_SHIFT 5 > - #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_MASK (1 << > 5) > - > - /* > -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, > -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, > CM_DIV_M5_DPLL_PER > -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, > CM_DIV_M5_DPLL_IVA, > -+ * CM_DIV_M5_DPLL_PER > - */ > - #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_SHIFT 8 > - #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_MASK (1 << > 8) > - > - /* > -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, > -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, > CM_DIV_M5_DPLL_PER > -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, > CM_DIV_M5_DPLL_IVA, > -+ * CM_DIV_M5_DPLL_PER > - */ > - #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_SHIFT > 12 > - #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_MASK > (1 << 12) > - > --/* > -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, > -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER > -- */ > -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, > CM_DIV_M6_DPLL_PER */ > - #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_SHIFT 0 > - #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK (0x1f > << 0) > - > --/* > -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, > -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER > -- */ > -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, > CM_DIV_M6_DPLL_PER */ > - #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_SHIFT 5 > - #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_MASK (1 << > 5) > - > --/* > -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, > -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER > -- */ > -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, > CM_DIV_M6_DPLL_PER */ > - #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_SHIFT 8 > - #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_MASK (1 << > 8) > - > --/* > -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, > -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER > -- */ > -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, > CM_DIV_M6_DPLL_PER */ > - #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_SHIFT > 12 > - #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_MASK > (1 << 12) > - > --/* > -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, > -- * CM_DIV_M7_DPLL_PER > -- */ > -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ > - #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_SHIFT 0 > - #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK (0x1f > << 0) > - > --/* > -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, > -- * CM_DIV_M7_DPLL_PER > -- */ > -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ > - #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_SHIFT 5 > - #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_MASK (1 << > 5) > - > --/* > -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, > -- * CM_DIV_M7_DPLL_PER > -- */ > -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ > - #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_SHIFT 8 > - #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_MASK (1 << > 8) > - > --/* > -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, > -- * CM_DIV_M7_DPLL_PER > -- */ > -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ > - #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_SHIFT > 12 > - #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_MASK > (1 << 12) > - > -@@ -934,8 +868,7 @@ > - * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, > CM_ALWON_MDMINTC_CLKCTRL, > - * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, > CM_ALWON_SR_MPU_CLKCTRL, > - * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, > CM_CEFUSE_CEFUSE_CLKCTRL, > -- * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, > -- * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, > -+ * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, > - * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, > CM_D2D_SAD2D_FW_CLKCTRL, > - * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, > CM_DUCATI_DUCATI_CLKCTRL, > - * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, > CM_IVAHD_IVAHD_CLKCTRL, > -@@ -944,30 +877,24 @@ > - * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, > CM_L3INIT_PCIESS_CLKCTRL, > - * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, > CM_L3INIT_UNIPRO1_CLKCTRL, > - * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, > -- * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, > CM_L3INIT_USB_HOST_FS_CLKCTRL, > -- * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, > -- * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, > -- * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, > -- * CM_L3INSTR_L3_INSTR_CLKCTRL, > CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, > -- * CM_L3INSTR_OCP_WP1_CLKCTRL, > CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, > -+ * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, > -+ * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, > CM_L3INSTR_L3_3_CLKCTRL, > -+ * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, > - * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, > CM_L3_2_L3_2_CLKCTRL, > - * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, > CM_L4CFG_L4_CFG_CLKCTRL, > - * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, > CM_L4PER_ADC_CLKCTRL, > - * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, > - * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, > - * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, > CM_L4PER_ELM_CLKCTRL, > -- * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, > -- * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, > CM_L4PER_HECC2_CLKCTRL, > -- * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, > CM_L4PER_I2C3_CLKCTRL, > -- * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, > CM_L4PER_L4PER_CLKCTRL, > -- * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, > CM_L4PER_MCBSP4_CLKCTRL, > -- * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, > CM_L4PER_MCSPI3_CLKCTRL, > -- * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, > CM_L4PER_MMCSD3_CLKCTRL, > -- * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, > CM_L4PER_MSPROHG_CLKCTRL, > -+ * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, > CM_L4PER_GPIO4_CLKCTRL, > -+ * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, > CM_L4PER_HDQ1W_CLKCTRL, > -+ * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, > CM_L4PER_I2C1_CLKCTRL, > -+ * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, > CM_L4PER_I2C4_CLKCTRL, > -+ * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, > CM_L4PER_MCASP2_CLKCTRL, > -+ * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, > CM_L4PER_MCSPI1_CLKCTRL, > -+ * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, > CM_L4PER_MCSPI4_CLKCTRL, > -+ * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, > CM_L4PER_MMCSD4_CLKCTRL, > -+ * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, > - * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, > CM_L4PER_UART2_CLKCTRL, > - * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, > CM_L4SEC_AES1_CLKCTRL, > - * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, > CM_L4SEC_DES3DES_CLKCTRL, > -@@ -983,166 +910,148 @@ > - #define OMAP4430_IDLEST_SHIFT 16 > - #define OMAP4430_IDLEST_MASK (0x3 > << 16) > - > --/* > -- * Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, > -- * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, > CM_L4CFG_DYNAMICDEP_RESTORE > -- */ > -+/* Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, > CM_L4CFG_DYNAMICDEP */ > - #define OMAP4430_ISS_DYNDEP_SHIFT 9 > - #define OMAP4430_ISS_DYNDEP_MASK (1 << > 9) > - > - /* > - * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, > CM_SDMA_STATICDEP, > -- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP > -+ * CM_TESLA_STATICDEP > - */ > - #define OMAP4430_ISS_STATDEP_SHIFT 9 > - #define OMAP4430_ISS_STATDEP_MASK (1 << > 9) > - > --/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, > CM_TESLA_DYNAMICDEP */ > -+/* Used by CM_L3_2_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ > - #define OMAP4430_IVAHD_DYNDEP_SHIFT 2 > - #define OMAP4430_IVAHD_DYNDEP_MASK (1 << > 2) > - > - /* > -- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, > CM_D2D_STATICDEP_RESTORE, > -- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, > -- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, > -- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP > -+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, > CM_DSS_STATICDEP, > -+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_L3INIT_STATICDEP, > -+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP > - */ > - #define OMAP4430_IVAHD_STATDEP_SHIFT 2 > - #define OMAP4430_IVAHD_STATDEP_MASK (1 << > 2) > - > --/* > -- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, > CM_L4CFG_DYNAMICDEP, > -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, > CM_L4PER_DYNAMICDEP_RESTORE > -- */ > -+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, > CM_L4PER_DYNAMICDEP */ > - #define OMAP4430_L3INIT_DYNDEP_SHIFT 7 > - #define OMAP4430_L3INIT_DYNDEP_MASK (1 << > 7) > - > - /* > -- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, > CM_DUCATI_STATICDEP, > -- * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, > CM_SDMA_STATICDEP_RESTORE, > -- * CM_TESLA_STATICDEP > -+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, > CM_MPU_STATICDEP, > -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP > - */ > - #define OMAP4430_L3INIT_STATDEP_SHIFT 7 > - #define OMAP4430_L3INIT_STATDEP_MASK (1 << > 7) > - > - /* > - * Used by CM_DSS_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, > CM_L3_2_DYNAMICDEP, > -- * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, > -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, > CM_TESLA_DYNAMICDEP > -+ * CM_L4CFG_DYNAMICDEP, CM_MPU_DYNAMICDEP, > CM_TESLA_DYNAMICDEP > - */ > - #define OMAP4430_L3_1_DYNDEP_SHIFT 5 > - #define OMAP4430_L3_1_DYNDEP_MASK (1 << > 5) > - > - /* > -- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, > CM_D2D_STATICDEP_RESTORE, > -- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, > CM_IVAHD_STATICDEP, > -+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, > CM_DSS_STATICDEP, > -+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, > - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, > -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, > CM_TESLA_STATICDEP > -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP > - */ > - #define OMAP4430_L3_1_STATDEP_SHIFT 5 > - #define OMAP4430_L3_1_STATDEP_MASK (1 << > 5) > - > - /* > -- * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, > CM_D2D_DYNAMICDEP_RESTORE, > -- * CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, > CM_GFX_DYNAMICDEP, > -- * CM_IVAHD_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, > CM_L3_1_DYNAMICDEP, > -- * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, > -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4SEC_DYNAMICDEP, > CM_SDMA_DYNAMICDEP > -+ * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, > CM_DUCATI_DYNAMICDEP, > -+ * CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, > CM_IVAHD_DYNAMICDEP, > -+ * CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, > CM_L4CFG_DYNAMICDEP, > -+ * CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP > - */ > - #define OMAP4430_L3_2_DYNDEP_SHIFT 6 > - #define OMAP4430_L3_2_DYNDEP_MASK (1 << > 6) > - > - /* > -- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, > CM_D2D_STATICDEP_RESTORE, > -- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, > CM_IVAHD_STATICDEP, > -+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, > CM_DSS_STATICDEP, > -+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, > - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, > -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, > CM_TESLA_STATICDEP > -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP > - */ > - #define OMAP4430_L3_2_STATDEP_SHIFT 6 > - #define OMAP4430_L3_2_STATDEP_MASK (1 << > 6) > - > --/* Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L3_1_DYNAMICDEP */ > - #define OMAP4430_L4CFG_DYNDEP_SHIFT 12 > - #define OMAP4430_L4CFG_DYNDEP_MASK (1 << > 12) > - > - /* > -- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, > CM_DUCATI_STATICDEP, > -- * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, > -- * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP > -+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, > CM_L3INIT_STATICDEP, > -+ * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP > - */ > - #define OMAP4430_L4CFG_STATDEP_SHIFT 12 > - #define OMAP4430_L4CFG_STATDEP_MASK (1 << > 12) > - > --/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L3_2_DYNAMICDEP */ > - #define OMAP4430_L4PER_DYNDEP_SHIFT 13 > - #define OMAP4430_L4PER_DYNDEP_MASK (1 << > 13) > - > - /* > -- * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, > CM_DUCATI_STATICDEP, > -- * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, > -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, > CM_TESLA_STATICDEP > -+ * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, > CM_L3INIT_STATICDEP, > -+ * CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, > CM_TESLA_STATICDEP > - */ > - #define OMAP4430_L4PER_STATDEP_SHIFT 13 > - #define OMAP4430_L4PER_STATDEP_MASK (1 << > 13) > - > --/* > -- * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, > CM_L4PER_DYNAMICDEP, > -- * CM_L4PER_DYNAMICDEP_RESTORE > -- */ > -+/* Used by CM_L3_2_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ > - #define OMAP4430_L4SEC_DYNDEP_SHIFT 14 > - #define OMAP4430_L4SEC_DYNDEP_MASK (1 << > 14) > - > - /* > - * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, > CM_MPU_STATICDEP, > -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE > -+ * CM_SDMA_STATICDEP > - */ > - #define OMAP4430_L4SEC_STATDEP_SHIFT 14 > - #define OMAP4430_L4SEC_STATDEP_MASK (1 << > 14) > - > --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L4CFG_DYNAMICDEP */ > - #define OMAP4430_L4WKUP_DYNDEP_SHIFT 15 > - #define OMAP4430_L4WKUP_DYNDEP_MASK (1 << > 15) > - > - /* > - * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, > CM_MPU_STATICDEP, > -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, > CM_TESLA_STATICDEP > -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP > - */ > - #define OMAP4430_L4WKUP_STATDEP_SHIFT 15 > - #define OMAP4430_L4WKUP_STATDEP_MASK (1 << > 15) > - > - /* > -- * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, > CM_L3_1_DYNAMICDEP, > -- * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, > -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP > -+ * Used by CM_D2D_DYNAMICDEP, CM_L3_1_DYNAMICDEP, > CM_L4CFG_DYNAMICDEP, > -+ * CM_MPU_DYNAMICDEP > - */ > - #define OMAP4430_MEMIF_DYNDEP_SHIFT 4 > - #define OMAP4430_MEMIF_DYNDEP_MASK (1 << > 4) > - > - /* > -- * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, > CM_D2D_STATICDEP_RESTORE, > -- * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, > CM_IVAHD_STATICDEP, > -+ * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, > CM_DSS_STATICDEP, > -+ * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, > - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, > -- * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, > CM_TESLA_STATICDEP > -+ * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP > - */ > - #define OMAP4430_MEMIF_STATDEP_SHIFT 4 > - #define OMAP4430_MEMIF_STATDEP_MASK (1 << > 4) > - > - /* > - * Used by CM_SSC_MODFREQDIV_DPLL_ABE, > CM_SSC_MODFREQDIV_DPLL_CORE, > -- * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, > CM_SSC_MODFREQDIV_DPLL_DDRPHY, > -- * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, > -- * CM_SSC_MODFREQDIV_DPLL_PER, > CM_SSC_MODFREQDIV_DPLL_UNIPRO, > -- * CM_SSC_MODFREQDIV_DPLL_USB > -+ * CM_SSC_MODFREQDIV_DPLL_DDRPHY, > CM_SSC_MODFREQDIV_DPLL_IVA, > -+ * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, > -+ * CM_SSC_MODFREQDIV_DPLL_UNIPRO, > CM_SSC_MODFREQDIV_DPLL_USB > - */ > - #define OMAP4430_MODFREQDIV_EXPONENT_SHIFT 8 > - #define OMAP4430_MODFREQDIV_EXPONENT_MASK (0x7 > << 8) > - > - /* > - * Used by CM_SSC_MODFREQDIV_DPLL_ABE, > CM_SSC_MODFREQDIV_DPLL_CORE, > -- * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, > CM_SSC_MODFREQDIV_DPLL_DDRPHY, > -- * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, > -- * CM_SSC_MODFREQDIV_DPLL_PER, > CM_SSC_MODFREQDIV_DPLL_UNIPRO, > -- * CM_SSC_MODFREQDIV_DPLL_USB > -+ * CM_SSC_MODFREQDIV_DPLL_DDRPHY, > CM_SSC_MODFREQDIV_DPLL_IVA, > -+ * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, > -+ * CM_SSC_MODFREQDIV_DPLL_UNIPRO, > CM_SSC_MODFREQDIV_DPLL_USB > - */ > - #define OMAP4430_MODFREQDIV_MANTISSA_SHIFT 0 > - #define OMAP4430_MODFREQDIV_MANTISSA_MASK (0x7f > << 0) > -@@ -1155,8 +1064,7 @@ > - * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, > CM_ALWON_MDMINTC_CLKCTRL, > - * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, > CM_ALWON_SR_MPU_CLKCTRL, > - * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, > CM_CEFUSE_CEFUSE_CLKCTRL, > -- * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, > -- * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, > -+ * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, > - * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, > CM_D2D_SAD2D_FW_CLKCTRL, > - * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, > CM_DUCATI_DUCATI_CLKCTRL, > - * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, > CM_IVAHD_IVAHD_CLKCTRL, > -@@ -1165,30 +1073,24 @@ > - * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, > CM_L3INIT_PCIESS_CLKCTRL, > - * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, > CM_L3INIT_UNIPRO1_CLKCTRL, > - * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, > -- * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, > CM_L3INIT_USB_HOST_FS_CLKCTRL, > -- * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, > -- * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, > -- * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, > -- * CM_L3INSTR_L3_INSTR_CLKCTRL, > CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, > -- * CM_L3INSTR_OCP_WP1_CLKCTRL, > CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, > -+ * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, > -+ * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, > CM_L3INSTR_L3_3_CLKCTRL, > -+ * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, > - * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, > CM_L3_2_L3_2_CLKCTRL, > - * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, > CM_L4CFG_L4_CFG_CLKCTRL, > - * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, > CM_L4PER_ADC_CLKCTRL, > - * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, > - * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, > - * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, > CM_L4PER_ELM_CLKCTRL, > -- * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, > -- * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, > CM_L4PER_HECC2_CLKCTRL, > -- * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, > CM_L4PER_I2C3_CLKCTRL, > -- * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, > CM_L4PER_L4PER_CLKCTRL, > -- * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, > CM_L4PER_MCBSP4_CLKCTRL, > -- * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, > CM_L4PER_MCSPI3_CLKCTRL, > -- * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, > CM_L4PER_MMCSD3_CLKCTRL, > -- * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, > CM_L4PER_MSPROHG_CLKCTRL, > -+ * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, > CM_L4PER_GPIO4_CLKCTRL, > -+ * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, > CM_L4PER_HDQ1W_CLKCTRL, > -+ * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, > CM_L4PER_I2C1_CLKCTRL, > -+ * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, > CM_L4PER_I2C4_CLKCTRL, > -+ * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, > CM_L4PER_MCASP2_CLKCTRL, > -+ * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, > CM_L4PER_MCSPI1_CLKCTRL, > -+ * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, > CM_L4PER_MCSPI4_CLKCTRL, > -+ * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, > CM_L4PER_MMCSD4_CLKCTRL, > -+ * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, > - * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, > CM_L4PER_UART2_CLKCTRL, > - * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, > CM_L4SEC_AES1_CLKCTRL, > - * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, > CM_L4SEC_DES3DES_CLKCTRL, > -@@ -1221,11 +1123,9 @@ > - #define OMAP4430_OPTFCLKEN_CTRLCLK_MASK > (1 << 8) > - > - /* > -- * Used by CM_L4PER_GPIO2_CLKCTRL, > CM_L4PER_GPIO2_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, > -- * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, > CM_WKUP_GPIO1_CLKCTRL > -+ * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, > -+ * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, > CM_L4PER_GPIO6_CLKCTRL, > -+ * CM_WKUP_GPIO1_CLKCTRL > - */ > - #define OMAP4430_OPTFCLKEN_DBCLK_SHIFT 8 > - #define OMAP4430_OPTFCLKEN_DBCLK_MASK > (1 << 8) > -@@ -1254,23 +1154,23 @@ > - #define OMAP4430_OPTFCLKEN_FCLK2_SHIFT 10 > - #define OMAP4430_OPTFCLKEN_FCLK2_MASK (1 << > 10) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT 15 > - #define OMAP4430_OPTFCLKEN_FUNC48MCLK_MASK (1 << > 15) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT 13 > - #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_MASK > (1 << 13) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT 14 > - #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_MASK > (1 << 14) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT > 11 > - #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_MASK > (1 << 11) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT > 12 > - #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_MASK > (1 << 12) > - > -@@ -1306,27 +1206,27 @@ > - #define OMAP4430_OPTFCLKEN_TXPHYCLK_SHIFT 8 > - #define OMAP4430_OPTFCLKEN_TXPHYCLK_MASK (1 << > 8) > - > --/* Used by CM_L3INIT_USB_TLL_CLKCTRL, > CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT 8 > - #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_MASK (1 << > 8) > - > --/* Used by CM_L3INIT_USB_TLL_CLKCTRL, > CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT 9 > - #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_MASK (1 << > 9) > - > --/* Used by CM_L3INIT_USB_TLL_CLKCTRL, > CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT 10 > - #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_MASK (1 << > 10) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT 8 > - #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_MASK (1 << > 8) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT 9 > - #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_MASK (1 << > 9) > - > --/* Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ > - #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT 10 > - #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_MASK (1 << > 10) > - > -@@ -1374,7 +1274,7 @@ > - #define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT 22 > - #define OMAP4430_PMD_TRACE_MUX_CTRL_MASK (0x3 > << 22) > - > --/* Used by CM_DYN_DEP_PRESCAL, CM_DYN_DEP_PRESCAL_RESTORE */ > -+/* Used by CM_DYN_DEP_PRESCAL */ > - #define OMAP4430_PRESCAL_SHIFT 0 > - #define OMAP4430_PRESCAL_MASK (0x3f > << 0) > - > -@@ -1382,10 +1282,7 @@ > - #define OMAP4430_R_RTL_SHIFT 11 > - #define OMAP4430_R_RTL_MASK (0x1f > << 11) > - > --/* > -- * Used by CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, > -- * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE > -- */ > -+/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL > */ > - #define OMAP4430_SAR_MODE_SHIFT > 4 > - #define OMAP4430_SAR_MODE_MASK > (1 << 4) > - > -@@ -1397,7 +1294,7 @@ > - #define OMAP4430_SCHEME_SHIFT 30 > - #define OMAP4430_SCHEME_MASK (0x3 > << 30) > - > --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L4CFG_DYNAMICDEP */ > - #define OMAP4430_SDMA_DYNDEP_SHIFT 11 > - #define OMAP4430_SDMA_DYNDEP_MASK (1 << > 11) > - > -@@ -1417,10 +1314,10 @@ > - * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, > CM_L3INIT_MMC2_CLKCTRL, > - * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, > CM_L3INIT_PCIESS_CLKCTRL, > - * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, > CM_L3INIT_UNIPRO1_CLKCTRL, > -- * CM_L3INIT_USB_HOST_CLKCTRL, > CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, > -- * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, > -- * CM_L3INIT_XHPI_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, > CM_MPU_MPU_CLKCTRL, > -- * CM_SDMA_SDMA_CLKCTRL, CM_TESLA_TESLA_CLKCTRL > -+ * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_FS_CLKCTRL, > -+ * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, > -+ * CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, > CM_SDMA_SDMA_CLKCTRL, > -+ * CM_TESLA_TESLA_CLKCTRL > - */ > - #define OMAP4430_STBYST_SHIFT 18 > - #define OMAP4430_STBYST_MASK (1 << > 18) > -@@ -1438,17 +1335,13 @@ > - #define OMAP4430_ST_DPLL_CLKDCOLDO_MASK > (1 << 9) > - > - /* > -- * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, > -- * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, > CM_DIV_M2_DPLL_MPU, > -- * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB > -+ * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, > CM_DIV_M2_DPLL_DDRPHY, > -+ * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, > CM_DIV_M2_DPLL_USB > - */ > - #define OMAP4430_ST_DPLL_CLKOUT_SHIFT 9 > - #define OMAP4430_ST_DPLL_CLKOUT_MASK (1 << > 9) > - > --/* > -- * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, > -- * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER > -- */ > -+/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, > CM_DIV_M3_DPLL_PER */ > - #define OMAP4430_ST_DPLL_CLKOUTHIF_SHIFT 9 > - #define OMAP4430_ST_DPLL_CLKOUTHIF_MASK > (1 << 9) > - > -@@ -1457,30 +1350,24 @@ > - #define OMAP4430_ST_DPLL_CLKOUTX2_MASK > (1 << 11) > - > - /* > -- * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, > -- * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, > CM_DIV_M4_DPLL_PER > -+ * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, > CM_DIV_M4_DPLL_IVA, > -+ * CM_DIV_M4_DPLL_PER > - */ > - #define OMAP4430_ST_HSDIVIDER_CLKOUT1_SHIFT 9 > - #define OMAP4430_ST_HSDIVIDER_CLKOUT1_MASK (1 << > 9) > - > - /* > -- * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, > -- * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, > CM_DIV_M5_DPLL_PER > -+ * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, > CM_DIV_M5_DPLL_IVA, > -+ * CM_DIV_M5_DPLL_PER > - */ > - #define OMAP4430_ST_HSDIVIDER_CLKOUT2_SHIFT 9 > - #define OMAP4430_ST_HSDIVIDER_CLKOUT2_MASK (1 << > 9) > - > --/* > -- * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, > -- * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER > -- */ > -+/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, > CM_DIV_M6_DPLL_PER */ > - #define OMAP4430_ST_HSDIVIDER_CLKOUT3_SHIFT 9 > - #define OMAP4430_ST_HSDIVIDER_CLKOUT3_MASK (1 << > 9) > - > --/* > -- * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, > -- * CM_DIV_M7_DPLL_PER > -- */ > -+/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ > - #define OMAP4430_ST_HSDIVIDER_CLKOUT4_SHIFT 9 > - #define OMAP4430_ST_HSDIVIDER_CLKOUT4_MASK (1 << > 9) > - > -@@ -1496,7 +1383,7 @@ > - #define OMAP4430_SYS_CLKSEL_SHIFT 0 > - #define OMAP4430_SYS_CLKSEL_MASK (0x7 > << 0) > - > --/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ > -+/* Used by CM_L4CFG_DYNAMICDEP */ > - #define OMAP4430_TESLA_DYNDEP_SHIFT 1 > - #define OMAP4430_TESLA_DYNDEP_MASK (1 << > 1) > - > -@@ -1505,11 +1392,9 @@ > - #define OMAP4430_TESLA_STATDEP_MASK (1 << > 1) > - > - /* > -- * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, > CM_DUCATI_DYNAMICDEP, > -- * CM_EMU_DYNAMICDEP, CM_L3_1_DYNAMICDEP, > CM_L3_1_DYNAMICDEP_RESTORE, > -- * CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, > CM_L4CFG_DYNAMICDEP, > -- * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, > -- * CM_L4PER_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, > CM_TESLA_DYNAMICDEP > -+ * Used by CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, > CM_EMU_DYNAMICDEP, > -+ * CM_L3_1_DYNAMICDEP, CM_L3_2_DYNAMICDEP, > CM_L4CFG_DYNAMICDEP, > -+ * CM_L4PER_DYNAMICDEP, CM_MPU_DYNAMICDEP, > CM_TESLA_DYNAMICDEP > - */ > - #define OMAP4430_WINDOWSIZE_SHIFT 24 > - #define OMAP4430_WINDOWSIZE_MASK (0xf > << 24) > -diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach- > omap2/cm1_44xx.h > -index fc649f5..1bc00dc 100644 > ---- a/arch/arm/mach-omap2/cm1_44xx.h > -+++ b/arch/arm/mach-omap2/cm1_44xx.h > -@@ -217,42 +217,6 @@ > - #define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET 0x0088 > - #define OMAP4430_CM1_ABE_WDT3_CLKCTRL > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088) > - > --/* CM1.RESTORE_CM1 register offsets */ > --#define OMAP4_CM_CLKSEL_CORE_RESTORE_OFFSET 0x0000 > --#define OMAP4430_CM_CLKSEL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0000) > --#define OMAP4_CM_DIV_M2_DPLL_CORE_RESTORE_OFFSET 0x0004 > --#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0004) > --#define OMAP4_CM_DIV_M3_DPLL_CORE_RESTORE_OFFSET 0x0008 > --#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0008) > --#define OMAP4_CM_DIV_M4_DPLL_CORE_RESTORE_OFFSET 0x000c > --#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x000c) > --#define OMAP4_CM_DIV_M5_DPLL_CORE_RESTORE_OFFSET 0x0010 > --#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0010) > --#define OMAP4_CM_DIV_M6_DPLL_CORE_RESTORE_OFFSET 0x0014 > --#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0014) > --#define OMAP4_CM_DIV_M7_DPLL_CORE_RESTORE_OFFSET 0x0018 > --#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0018) > --#define OMAP4_CM_CLKSEL_DPLL_CORE_RESTORE_OFFSET 0x001c > --#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x001c) > --#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE_OFFSET > 0x0020 > --#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0020) > --#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE_OFFSET > 0x0024 > --#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0024) > --#define OMAP4_CM_CLKMODE_DPLL_CORE_RESTORE_OFFSET > 0x0028 > --#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0028) > --#define OMAP4_CM_SHADOW_FREQ_CONFIG2_RESTORE_OFFSET > 0x002c > --#define OMAP4430_CM_SHADOW_FREQ_CONFIG2_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x002c) > --#define OMAP4_CM_SHADOW_FREQ_CONFIG1_RESTORE_OFFSET > 0x0030 > --#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0030) > --#define OMAP4_CM_AUTOIDLE_DPLL_CORE_RESTORE_OFFSET > 0x0034 > --#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0034) > --#define OMAP4_CM_MPU_CLKSTCTRL_RESTORE_OFFSET > 0x0038 > --#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0038) > --#define OMAP4_CM_CM1_PROFILING_CLKCTRL_RESTORE_OFFSET > 0x003c > --#define OMAP4430_CM_CM1_PROFILING_CLKCTRL_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x003c) > --#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET > 0x0040 > --#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE > OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, > 0x0040) > -- > - /* Function prototypes */ > - extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx); > - extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx); > -diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach- > omap2/cm2_44xx.h > -index 8036a16..b9de72d 100644 > ---- a/arch/arm/mach-omap2/cm2_44xx.h > -+++ b/arch/arm/mach-omap2/cm2_44xx.h > -@@ -449,56 +449,6 @@ > - #define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET > 0x0020 > - #define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, > 0x0020) > - > --/* CM2.RESTORE_CM2 register offsets */ > --#define OMAP4_CM_L3_1_CLKSTCTRL_RESTORE_OFFSET > 0x0000 > --#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0000) > --#define OMAP4_CM_L3_2_CLKSTCTRL_RESTORE_OFFSET > 0x0004 > --#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0004) > --#define OMAP4_CM_L4CFG_CLKSTCTRL_RESTORE_OFFSET > 0x0008 > --#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0008) > --#define OMAP4_CM_MEMIF_CLKSTCTRL_RESTORE_OFFSET > 0x000c > --#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x000c) > --#define OMAP4_CM_L4PER_CLKSTCTRL_RESTORE_OFFSET > 0x0010 > --#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0010) > --#define OMAP4_CM_L3INIT_CLKSTCTRL_RESTORE_OFFSET 0x0014 > --#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0014) > --#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_RESTORE_OFFSET > 0x0018 > --#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0018) > --#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE_OFFSET > 0x001c > --#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x001c) > --#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE_OFFSET > 0x0020 > --#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0020) > --#define OMAP4_CM_CM2_PROFILING_CLKCTRL_RESTORE_OFFSET > 0x0024 > --#define OMAP4430_CM_CM2_PROFILING_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0024) > --#define OMAP4_CM_D2D_STATICDEP_RESTORE_OFFSET > 0x0028 > --#define OMAP4430_CM_D2D_STATICDEP_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0028) > --#define OMAP4_CM_L3_1_DYNAMICDEP_RESTORE_OFFSET > 0x002c > --#define OMAP4430_CM_L3_1_DYNAMICDEP_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x002c) > --#define OMAP4_CM_L3_2_DYNAMICDEP_RESTORE_OFFSET > 0x0030 > --#define OMAP4430_CM_L3_2_DYNAMICDEP_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0030) > --#define OMAP4_CM_D2D_DYNAMICDEP_RESTORE_OFFSET > 0x0034 > --#define OMAP4430_CM_D2D_DYNAMICDEP_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0034) > --#define OMAP4_CM_L4CFG_DYNAMICDEP_RESTORE_OFFSET 0x0038 > --#define OMAP4430_CM_L4CFG_DYNAMICDEP_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0038) > --#define OMAP4_CM_L4PER_DYNAMICDEP_RESTORE_OFFSET 0x003c > --#define OMAP4430_CM_L4PER_DYNAMICDEP_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x003c) > --#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_RESTORE_OFFSET > 0x0040 > --#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0040) > --#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_RESTORE_OFFSET > 0x0044 > --#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0044) > --#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_RESTORE_OFFSET > 0x0048 > --#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0048) > --#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_RESTORE_OFFSET > 0x004c > --#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x004c) > --#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_RESTORE_OFFSET > 0x0050 > --#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0050) > --#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE_OFFSET > 0x0054 > --#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0054) > --#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE_OFFSET > 0x0058 > --#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x0058) > --#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET > 0x005c > --#define OMAP4430_CM_SDMA_STATICDEP_RESTORE > OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, > 0x005c) > -- > - /* Function prototypes */ > - extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx); > - extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0056-OMAP4- > prcm_mpu-Fix-indent-in-few-macros.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch > deleted file mode 100644 > index 6d9cb33..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0056-OMAP4-prcm_mpu- > Fix-indent-in-few-macros.patch > +++ /dev/null > @@ -1,111 +0,0 @@ > -From e6adacab9f633eddd83c90205bbf5a21c85c9444 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:15:06 -0600 > -Subject: [PATCH 056/149] OMAP4: prcm_mpu: Fix indent in few macros > - > -Some maros were not well aligned. Re-align them. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/prcm_mpu44xx.h | 69 +++++++++++++++++--------- > --------- > - 1 files changed, 34 insertions(+), 35 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach- > omap2/prcm_mpu44xx.h > -index d22d1b4..8a6e250 100644 > ---- a/arch/arm/mach-omap2/prcm_mpu44xx.h > -+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h > -@@ -31,7 +31,6 @@ > - OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + > (reg)) > - > - /* PRCM_MPU instances */ > -- > - #define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST 0x0000 > - #define OMAP4430_PRCM_MPU_DEVICE_PRM_INST 0x0200 > - #define OMAP4430_PRCM_MPU_CPU0_INST 0x0400 > -@@ -52,46 +51,46 @@ > - */ > - > - /* PRCM_MPU.OCP_SOCKET_PRCM register offsets */ > --#define OMAP4_REVISION_PRCM_OFFSET 0x0000 > --#define OMAP4430_REVISION_PRCM > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_S > OCKET_PRCM_INST, 0x0000) > -+#define OMAP4_REVISION_PRCM_OFFSET 0x0000 > -+#define OMAP4430_REVISION_PRCM > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_S > OCKET_PRCM_INST, 0x0000) > - > - /* PRCM_MPU.DEVICE_PRM register offsets */ > --#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET > 0x0000 > --#define OMAP4430_PRCM_MPU_PRM_RSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE > _PRM_INST, 0x0000) > --#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET > 0x0004 > --#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE > _PRM_INST, 0x0004) > -+#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 > -+#define OMAP4430_PRCM_MPU_PRM_RSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE > _PRM_INST, 0x0000) > -+#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 > -+#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE > _PRM_INST, 0x0004) > - > - /* PRCM_MPU.CPU0 register offsets */ > --#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET > 0x0000 > --#define OMAP4430_PM_CPU0_PWRSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0000) > --#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 > --#define OMAP4430_PM_CPU0_PWRSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0004) > --#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 > --#define OMAP4430_RM_CPU0_CPU0_CONTEXT > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0008) > --#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c > --#define OMAP4430_RM_CPU0_CPU0_RSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x000c) > --#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET > 0x0010 > --#define OMAP4430_RM_CPU0_CPU0_RSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0010) > --#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 > --#define OMAP4430_CM_CPU0_CPU0_CLKCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0014) > --#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET > 0x0018 > --#define OMAP4430_CM_CPU0_CLKSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0018) > -+#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 > -+#define OMAP4430_PM_CPU0_PWRSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0000) > -+#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 > -+#define OMAP4430_PM_CPU0_PWRSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0004) > -+#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 > -+#define OMAP4430_RM_CPU0_CPU0_CONTEXT > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0008) > -+#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c > -+#define OMAP4430_RM_CPU0_CPU0_RSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x000c) > -+#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 > -+#define OMAP4430_RM_CPU0_CPU0_RSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0010) > -+#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 > -+#define OMAP4430_CM_CPU0_CPU0_CLKCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0014) > -+#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 > -+#define OMAP4430_CM_CPU0_CLKSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_I > NST, 0x0018) > - > - /* PRCM_MPU.CPU1 register offsets */ > --#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET > 0x0000 > --#define OMAP4430_PM_CPU1_PWRSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0000) > --#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 > --#define OMAP4430_PM_CPU1_PWRSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0004) > --#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 > --#define OMAP4430_RM_CPU1_CPU1_CONTEXT > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0008) > --#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c > --#define OMAP4430_RM_CPU1_CPU1_RSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x000c) > --#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET > 0x0010 > --#define OMAP4430_RM_CPU1_CPU1_RSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0010) > --#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 > --#define OMAP4430_CM_CPU1_CPU1_CLKCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0014) > --#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET > 0x0018 > --#define OMAP4430_CM_CPU1_CLKSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0018) > -+#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 > -+#define OMAP4430_PM_CPU1_PWRSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0000) > -+#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 > -+#define OMAP4430_PM_CPU1_PWRSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0004) > -+#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 > -+#define OMAP4430_RM_CPU1_CPU1_CONTEXT > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0008) > -+#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c > -+#define OMAP4430_RM_CPU1_CPU1_RSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x000c) > -+#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 > -+#define OMAP4430_RM_CPU1_CPU1_RSTST > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0010) > -+#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 > -+#define OMAP4430_CM_CPU1_CPU1_CLKCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0014) > -+#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 > -+#define OMAP4430_CM_CPU1_CLKSTCTRL > OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_I > NST, 0x0018) > - > - /* Function prototypes */ > - # ifndef __ASSEMBLER__ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4- > clockdomain-data-Fix-data-order-and-wrong-name.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix- > data-order-and-wrong-name.patch > deleted file mode 100644 > index c222d7c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4-clockdomain- > data-Fix-data-order-and-wrong-name.patch > +++ /dev/null > @@ -1,294 +0,0 @@ > -From bbf7af412d82e488052f801f294687aaf1bf260e Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 19:15:06 -0600 > -Subject: [PATCH 057/149] OMAP4: clockdomain data: Fix data order and > wrong name > - > -MPUSS was renamed MPU and L3_D2D D2D. > -The rename will slightly change the order of the structure > -and thus generate some structures moves. > - > -Add a comment and remove a comma. > - > -Update Copyright for TI and Nokia and add back Paul > -in the author list. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clockdomains44xx_data.c | 124 ++++++++++++++--- > ---------- > - 1 files changed, 63 insertions(+), 61 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c > b/arch/arm/mach-omap2/clockdomains44xx_data.c > -index a607ec1..66090f2 100644 > ---- a/arch/arm/mach-omap2/clockdomains44xx_data.c > -+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c > -@@ -1,11 +1,12 @@ > - /* > - * OMAP4 Clock domains framework > - * > -- * Copyright (C) 2009 Texas Instruments, Inc. > -- * Copyright (C) 2009 Nokia Corporation > -+ * Copyright (C) 2009-2011 Texas Instruments, Inc. > -+ * Copyright (C) 2009-2011 Nokia Corporation > - * > - * Abhijit Pagare (abhijitpagare@ti.com) > - * Benoit Cousson (b-cousson@ti.com) > -+ * Paul Walmsley (paul@pwsan.com) > - * > - * This file is automatically generated from the OMAP hardware databases. > - * We respectfully ask that any modifications to this file be coordinated > -@@ -32,7 +33,7 @@ > - > - /* Static Dependencies for OMAP4 Clock Domains */ > - > --static struct clkdm_dep ducati_wkup_sleep_deps[] = { > -+static struct clkdm_dep d2d_wkup_sleep_deps[] = { > - { > - .clkdm_name = "abe_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > -@@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] > = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_dss_clkdm", > -+ .clkdm_name = "l3_emif_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_emif_clkdm", > -+ .clkdm_name = "l3_init_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_gfx_clkdm", > -+ .clkdm_name = "l4_cfg_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_init_clkdm", > -+ .clkdm_name = "l4_per_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > -+ { NULL }, > -+}; > -+ > -+static struct clkdm_dep ducati_wkup_sleep_deps[] = { > - { > -- .clkdm_name = "l4_cfg_clkdm", > -+ .clkdm_name = "abe_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l4_per_clkdm", > -+ .clkdm_name = "ivahd_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l4_secure_clkdm", > -+ .clkdm_name = "l3_1_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l4_wkup_clkdm", > -+ .clkdm_name = "l3_2_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "tesla_clkdm", > -+ .clkdm_name = "l3_dss_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > -- { NULL }, > --}; > -- > --static struct clkdm_dep iss_wkup_sleep_deps[] = { > - { > -- .clkdm_name = "ivahd_clkdm", > -+ .clkdm_name = "l3_emif_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_1_clkdm", > -+ .clkdm_name = "l3_gfx_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_emif_clkdm", > -+ .clkdm_name = "l3_init_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > -- { NULL }, > --}; > -- > --static struct clkdm_dep ivahd_wkup_sleep_deps[] = { > - { > -- .clkdm_name = "l3_1_clkdm", > -+ .clkdm_name = "l4_cfg_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_emif_clkdm", > -+ .clkdm_name = "l4_per_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > -- { NULL }, > --}; > -- > --static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = { > - { > -- .clkdm_name = "abe_clkdm", > -+ .clkdm_name = "l4_secure_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "ivahd_clkdm", > -+ .clkdm_name = "l4_wkup_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_1_clkdm", > -+ .clkdm_name = "tesla_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > -+ { NULL }, > -+}; > -+ > -+static struct clkdm_dep iss_wkup_sleep_deps[] = { > - { > -- .clkdm_name = "l3_2_clkdm", > -+ .clkdm_name = "ivahd_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_emif_clkdm", > -+ .clkdm_name = "l3_1_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l3_init_clkdm", > -+ .clkdm_name = "l3_emif_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > -+ { NULL }, > -+}; > -+ > -+static struct clkdm_dep ivahd_wkup_sleep_deps[] = { > - { > -- .clkdm_name = "l4_cfg_clkdm", > -+ .clkdm_name = "l3_1_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { > -- .clkdm_name = "l4_per_clkdm", > -+ .clkdm_name = "l3_emif_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > - }, > - { NULL }, > -@@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] > = { > - { NULL }, > - }; > - > --static struct clkdm_dep mpuss_wkup_sleep_deps[] = { > -+static struct clkdm_dep mpu_wkup_sleep_deps[] = { > - { > - .clkdm_name = "abe_clkdm", > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) > -@@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --static struct clockdomain mpuss_44xx_clkdm = { > -- .name = "mpuss_clkdm", > -- .pwrdm = { .name = "mpu_pwrdm" }, > -- .prcm_partition = OMAP4430_CM1_PARTITION, > -- .cm_inst = OMAP4430_CM1_MPU_INST, > -- .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, > -- .wkdep_srcs = mpuss_wkup_sleep_deps, > -- .sleepdep_srcs = mpuss_wkup_sleep_deps, > -+static struct clockdomain d2d_44xx_clkdm = { > -+ .name = "d2d_clkdm", > -+ .pwrdm = { .name = "core_pwrdm" }, > -+ .prcm_partition = OMAP4430_CM2_PARTITION, > -+ .cm_inst = OMAP4430_CM2_CORE_INST, > -+ .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, > -+ .wkdep_srcs = d2d_wkup_sleep_deps, > -+ .sleepdep_srcs = d2d_wkup_sleep_deps, > - .flags = CLKDM_CAN_FORCE_WAKEUP | > CLKDM_CAN_HWSUP, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > -@@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -+static struct clockdomain mpu_44xx_clkdm = { > -+ .name = "mpu_clkdm", > -+ .pwrdm = { .name = "mpu_pwrdm" }, > -+ .prcm_partition = OMAP4430_CM1_PARTITION, > -+ .cm_inst = OMAP4430_CM1_MPU_INST, > -+ .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, > -+ .wkdep_srcs = mpu_wkup_sleep_deps, > -+ .sleepdep_srcs = mpu_wkup_sleep_deps, > -+ .flags = CLKDM_CAN_FORCE_WAKEUP | > CLKDM_CAN_HWSUP, > -+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -+}; > -+ > - static struct clockdomain l3_2_44xx_clkdm = { > - .name = "l3_2_clkdm", > - .pwrdm = { .name = "core_pwrdm" }, > -@@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --static struct clockdomain l3_d2d_44xx_clkdm = { > -- .name = "l3_d2d_clkdm", > -- .pwrdm = { .name = "core_pwrdm" }, > -- .prcm_partition = OMAP4430_CM2_PARTITION, > -- .cm_inst = OMAP4430_CM2_CORE_INST, > -- .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, > -- .wkdep_srcs = l3_d2d_wkup_sleep_deps, > -- .sleepdep_srcs = l3_d2d_wkup_sleep_deps, > -- .flags = CLKDM_CAN_FORCE_WAKEUP | > CLKDM_CAN_HWSUP, > -- .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > --}; > -- > - static struct clockdomain iss_44xx_clkdm = { > - .name = "iss_clkdm", > - .pwrdm = { .name = "cam_pwrdm" }, > -@@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -+/* As clockdomains are added or removed above, this list must also be > changed */ > - static struct clockdomain *clockdomains_omap44xx[] __initdata = { > - &l4_cefuse_44xx_clkdm, > - &l4_cfg_44xx_clkdm, > -@@ -666,21 +668,21 @@ static struct clockdomain > *clockdomains_omap44xx[] __initdata = { > - &abe_44xx_clkdm, > - &l3_instr_44xx_clkdm, > - &l3_init_44xx_clkdm, > -- &mpuss_44xx_clkdm, > -+ &d2d_44xx_clkdm, > - &mpu0_44xx_clkdm, > - &mpu1_44xx_clkdm, > - &l3_emif_44xx_clkdm, > - &l4_ao_44xx_clkdm, > - &ducati_44xx_clkdm, > -+ &mpu_44xx_clkdm, > - &l3_2_44xx_clkdm, > - &l3_1_44xx_clkdm, > -- &l3_d2d_44xx_clkdm, > - &iss_44xx_clkdm, > - &l3_dss_44xx_clkdm, > - &l4_wkup_44xx_clkdm, > - &emu_sys_44xx_clkdm, > - &l3_dma_44xx_clkdm, > -- NULL, > -+ NULL > - }; > - > - void __init omap44xx_clockdomains_init(void) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP- > omap_device-replace-_find_by_pdev-with-to_omap_.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP-omap_device-replace- > _find_by_pdev-with-to_omap_.patch > deleted file mode 100644 > index 2ed265d..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP-omap_device- > replace-_find_by_pdev-with-to_omap_.patch > +++ /dev/null > @@ -1,84 +0,0 @@ > -From b7fd7c4814b75005d2bf89d27e2160e863cdd5c3 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Sat, 9 Jul 2011 19:15:20 -0600 > -Subject: [PATCH 058/149] OMAP: omap_device: replace _find_by_pdev() with > to_omap_device() > - > -The omap_device layer currently has two ways of getting an omap_device > -pointer from a platform_device pointer. > - > -Replace current usage of _find_by_pdev() with to_omap_device() since > -to_omap_device() is more familiar to the existing to_platform_device() > -used when getting a platform_device pointer from a struct device pointer. > - > -Cc: Felipe Balbi <balbi@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Reviewed-by: Felipe Balbi <balbi@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/plat-omap/omap_device.c | 15 +++++---------- > - 1 files changed, 5 insertions(+), 10 deletions(-) > - > -diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat- > omap/omap_device.c > -index 49fc0df..c8b9cd1 100644 > ---- a/arch/arm/plat-omap/omap_device.c > -+++ b/arch/arm/plat-omap/omap_device.c > -@@ -236,11 +236,6 @@ static int _omap_device_deactivate(struct > omap_device *od, u8 ignore_lat) > - return 0; > - } > - > --static inline struct omap_device *_find_by_pdev(struct platform_device > *pdev) > --{ > -- return container_of(pdev, struct omap_device, pdev); > --} > -- > - /** > - * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks > - * @od: struct omap_device *od > -@@ -316,7 +311,7 @@ u32 omap_device_get_context_loss_count(struct > platform_device *pdev) > - struct omap_device *od; > - u32 ret = 0; > - > -- od = _find_by_pdev(pdev); > -+ od = to_omap_device(pdev); > - > - if (od->hwmods_cnt) > - ret = omap_hwmod_get_context_loss_count(od- > >hwmods[0]); > -@@ -611,7 +606,7 @@ int omap_device_enable(struct platform_device > *pdev) > - int ret; > - struct omap_device *od; > - > -- od = _find_by_pdev(pdev); > -+ od = to_omap_device(pdev); > - > - if (od->_state == OMAP_DEVICE_STATE_ENABLED) { > - WARN(1, "omap_device: %s.%d: %s() called from invalid state > %d\n", > -@@ -650,7 +645,7 @@ int omap_device_idle(struct platform_device *pdev) > - int ret; > - struct omap_device *od; > - > -- od = _find_by_pdev(pdev); > -+ od = to_omap_device(pdev); > - > - if (od->_state != OMAP_DEVICE_STATE_ENABLED) { > - WARN(1, "omap_device: %s.%d: %s() called from invalid state > %d\n", > -@@ -681,7 +676,7 @@ int omap_device_shutdown(struct platform_device > *pdev) > - int ret, i; > - struct omap_device *od; > - > -- od = _find_by_pdev(pdev); > -+ od = to_omap_device(pdev); > - > - if (od->_state != OMAP_DEVICE_STATE_ENABLED && > - od->_state != OMAP_DEVICE_STATE_IDLE) { > -@@ -722,7 +717,7 @@ int omap_device_align_pm_lat(struct > platform_device *pdev, > - int ret = -EINVAL; > - struct omap_device *od; > - > -- od = _find_by_pdev(pdev); > -+ od = to_omap_device(pdev); > - > - if (new_wakeup_lat_limit == od->dev_wakeup_lat) > - return 0; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0059-OMAP-PM- > remove-OMAP_PM_NONE-config-option.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config- > option.patch > deleted file mode 100644 > index d9c78e3..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0059-OMAP-PM-remove- > OMAP_PM_NONE-config-option.patch > +++ /dev/null > @@ -1,63 +0,0 @@ > -From 32f213e65477010bd1ac349b4bbe438958044e9f Mon Sep 17 00:00:00 > 2001 > -From: Jean Pihet <jean.pihet@newoldbits.com> > -Date: Sat, 9 Jul 2011 19:15:41 -0600 > -Subject: [PATCH 059/149] OMAP PM: remove OMAP_PM_NONE config option > - > -The current code base is not linking with the OMAP_PM_NONE > -option set. > -Since the option OMAP_PM_NOOP provides a no-op/debug layer, > -OMAP_PM_NONE can be removed. > -OMAP_PM_NOOP is enabled by default by Kconfig. > - > -Signed-off-by: Jean Pihet <j-pihet@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/plat-omap/Kconfig | 3 --- > - arch/arm/plat-omap/include/plat/omap-pm.h | 8 -------- > - 2 files changed, 0 insertions(+), 11 deletions(-) > - > -diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig > -index 49a4c75..6e6735f 100644 > ---- a/arch/arm/plat-omap/Kconfig > -+++ b/arch/arm/plat-omap/Kconfig > -@@ -211,9 +211,6 @@ choice > - depends on ARCH_OMAP > - default OMAP_PM_NOOP > - > --config OMAP_PM_NONE > -- bool "No PM layer" > -- > - config OMAP_PM_NOOP > - bool "No-op/debug PM layer" > - > -diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat- > omap/include/plat/omap-pm.h > -index c0a7520..0840df8 100644 > ---- a/arch/arm/plat-omap/include/plat/omap-pm.h > -+++ b/arch/arm/plat-omap/include/plat/omap-pm.h > -@@ -40,11 +40,7 @@ > - * framework starts. The "_if_" is to avoid name collisions with the > - * PM idle-loop code. > - */ > --#ifdef CONFIG_OMAP_PM_NONE > --#define omap_pm_if_early_init() 0 > --#else > - int __init omap_pm_if_early_init(void); > --#endif > - > - /** > - * omap_pm_if_init - OMAP PM init code called after clock fw init > -@@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void); > - * The main initialization code. OPP tables are passed in here. The > - * "_if_" is to avoid name collisions with the PM idle-loop code. > - */ > --#ifdef CONFIG_OMAP_PM_NONE > --#define omap_pm_if_init() 0 > --#else > - int __init omap_pm_if_init(void); > --#endif > - > - /** > - * omap_pm_if_exit - OMAP PM exit code > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock- > data-Remove-McASP2-McASP3-and-MMC6-clock.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock-data-Remove- > McASP2-McASP3-and-MMC6-clock.patch > deleted file mode 100644 > index a7e85f8..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock-data- > Remove-McASP2-McASP3-and-MMC6-clock.patch > +++ /dev/null > @@ -1,178 +0,0 @@ > -From e2c80dceb999bf93d079d0a5a040951aad3d2359 Mon Sep 17 00:00:00 > 2001 > -From: Jon Hunter <jon-hunter@ti.com> > -Date: Sat, 9 Jul 2011 19:14:47 -0600 > -Subject: [PATCH 060/149] OMAP4: clock data: Remove McASP2, McASP3 and > MMC6 clocks > - > -McASP2, 3 and MMC6 modules are not present in the OMAP4 family. > -Remove the fclk and the clksel related to these nodes. > -Rename the references that were potentially re-used in order nodes. > - > -Remove related macros in prcm header files. > - > -Update TI copyright date. > - > -Signed-off-by: Jon Hunter <jon-hunter@ti.com> > -[b-cousson@ti.com: Update the patch according to autogen output] > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -[paul@pwsan.com: split PRCM data changes into a separate patch] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 86 ++++++++++++------------------ > --- > - 1 files changed, 31 insertions(+), 55 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 8307c9e..96bc668 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -1170,19 +1170,6 @@ static struct clk func_96m_fclk = { > - .set_rate = &omap2_clksel_set_rate, > - }; > - > --static const struct clksel hsmmc6_fclk_sel[] = { > -- { .parent = &func_64m_fclk, .rates = div_1_0_rates }, > -- { .parent = &func_96m_fclk, .rates = div_1_1_rates }, > -- { .parent = NULL }, > --}; > -- > --static struct clk hsmmc6_fclk = { > -- .name = "hsmmc6_fclk", > -- .parent = &func_64m_fclk, > -- .ops = &clkops_null, > -- .recalc = &followparent_recalc, > --}; > -- > - static const struct clksel_rate div2_1to8_rates[] = { > - { .div = 1, .val = 0, .flags = RATE_IN_4430 }, > - { .div = 8, .val = 1, .flags = RATE_IN_4430 }, > -@@ -1265,6 +1252,21 @@ static struct clk l4_wkup_clk_mux_ck = { > - .recalc = &omap2_clksel_recalc, > - }; > - > -+static struct clk ocp_abe_iclk = { > -+ .name = "ocp_abe_iclk", > -+ .parent = &aess_fclk, > -+ .ops = &clkops_null, > -+ .recalc = &followparent_recalc, > -+}; > -+ > -+static struct clk per_abe_24m_fclk = { > -+ .name = "per_abe_24m_fclk", > -+ .parent = &dpll_abe_m2_ck, > -+ .ops = &clkops_null, > -+ .fixed_div = 4, > -+ .recalc = &omap_fixed_divisor_recalc, > -+}; > -+ > - static const struct clksel per_abe_nc_fclk_div[] = { > - { .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates }, > - { .parent = NULL }, > -@@ -1282,41 +1284,6 @@ static struct clk per_abe_nc_fclk = { > - .set_rate = &omap2_clksel_set_rate, > - }; > - > --static const struct clksel mcasp2_fclk_sel[] = { > -- { .parent = &func_96m_fclk, .rates = div_1_0_rates }, > -- { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, > -- { .parent = NULL }, > --}; > -- > --static struct clk mcasp2_fclk = { > -- .name = "mcasp2_fclk", > -- .parent = &func_96m_fclk, > -- .ops = &clkops_null, > -- .recalc = &followparent_recalc, > --}; > -- > --static struct clk mcasp3_fclk = { > -- .name = "mcasp3_fclk", > -- .parent = &func_96m_fclk, > -- .ops = &clkops_null, > -- .recalc = &followparent_recalc, > --}; > -- > --static struct clk ocp_abe_iclk = { > -- .name = "ocp_abe_iclk", > -- .parent = &aess_fclk, > -- .ops = &clkops_null, > -- .recalc = &followparent_recalc, > --}; > -- > --static struct clk per_abe_24m_fclk = { > -- .name = "per_abe_24m_fclk", > -- .parent = &dpll_abe_m2_ck, > -- .ops = &clkops_null, > -- .fixed_div = 4, > -- .recalc = &omap_fixed_divisor_recalc, > --}; > -- > - static const struct clksel pmd_stm_clock_mux_sel[] = { > - { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, > - { .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates }, > -@@ -1996,10 +1963,16 @@ static struct clk mcbsp3_fck = { > - .clkdm_name = "abe_clkdm", > - }; > - > -+static const struct clksel mcbsp4_sync_mux_sel[] = { > -+ { .parent = &func_96m_fclk, .rates = div_1_0_rates }, > -+ { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, > -+ { .parent = NULL }, > -+}; > -+ > - static struct clk mcbsp4_sync_mux_ck = { > - .name = "mcbsp4_sync_mux_ck", > - .parent = &func_96m_fclk, > -- .clksel = mcasp2_fclk_sel, > -+ .clksel = mcbsp4_sync_mux_sel, > - .init = &omap2_init_clksel_parent, > - .clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, > - .clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK, > -@@ -2078,11 +2051,17 @@ static struct clk mcspi4_fck = { > - .recalc = &followparent_recalc, > - }; > - > -+static const struct clksel hsmmc1_fclk_sel[] = { > -+ { .parent = &func_64m_fclk, .rates = div_1_0_rates }, > -+ { .parent = &func_96m_fclk, .rates = div_1_1_rates }, > -+ { .parent = NULL }, > -+}; > -+ > - /* Merged hsmmc1_fclk into mmc1 */ > - static struct clk mmc1_fck = { > - .name = "mmc1_fck", > - .parent = &func_64m_fclk, > -- .clksel = hsmmc6_fclk_sel, > -+ .clksel = hsmmc1_fclk_sel, > - .init = &omap2_init_clksel_parent, > - .clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, > - .clksel_mask = OMAP4430_CLKSEL_MASK, > -@@ -2097,7 +2076,7 @@ static struct clk mmc1_fck = { > - static struct clk mmc2_fck = { > - .name = "mmc2_fck", > - .parent = &func_64m_fclk, > -- .clksel = hsmmc6_fclk_sel, > -+ .clksel = hsmmc1_fclk_sel, > - .init = &omap2_init_clksel_parent, > - .clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, > - .clksel_mask = OMAP4430_CLKSEL_MASK, > -@@ -3094,17 +3073,14 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, > CK_443X), > - CLK(NULL, "func_64m_fclk", &func_64m_fclk, > CK_443X), > - CLK(NULL, "func_96m_fclk", &func_96m_fclk, > CK_443X), > -- CLK(NULL, "hsmmc6_fclk", &hsmmc6_fclk, > CK_443X), > - CLK(NULL, "init_60m_fclk", &init_60m_fclk, > CK_443X), > - CLK(NULL, "l3_div_ck", &l3_div_ck, > CK_443X), > - CLK(NULL, "l4_div_ck", &l4_div_ck, > CK_443X), > - CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, > CK_443X), > - CLK(NULL, "l4_wkup_clk_mux_ck", > &l4_wkup_clk_mux_ck, CK_443X), > -- CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, > CK_443X), > -- CLK(NULL, "mcasp2_fclk", &mcasp2_fclk, > CK_443X), > -- CLK(NULL, "mcasp3_fclk", &mcasp3_fclk, > CK_443X), > - CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, > CK_443X), > - CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, > CK_443X), > -+ CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, > CK_443X), > - CLK(NULL, "pmd_stm_clock_mux_ck", > &pmd_stm_clock_mux_ck, CK_443X), > - CLK(NULL, "pmd_trace_clk_mux_ck", > &pmd_trace_clk_mux_ck, CK_443X), > - CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, > CK_443X), > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock- > data-Remove-UNIPRO-clock-nodes.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch > deleted file mode 100644 > index fb4d44f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data- > Remove-UNIPRO-clock-nodes.patch > +++ /dev/null > @@ -1,99 +0,0 @@ > -From 73203093397f6939cea566cbedc2affc51d4b597 Mon Sep 17 00:00:00 > 2001 > -From: Jon Hunter <jon-hunter@ti.com> > -Date: Sat, 9 Jul 2011 19:14:47 -0600 > -Subject: [PATCH 061/149] OMAP4: clock data: Remove UNIPRO clock nodes > - > -UNIPRO was removed from OMAP4 devices from ES2.0 onwards. > -Since this IP was anyway non-functional and not supported, > -it is best to remove it completely. > - > -Signed-off-by: Jon Hunter <jon-hunter@ti.com> > -[b-cousson@ti.com: Update the changelog] > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -[paul@pwsan.com: split PRCM header file changes into a separate patch] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 60 ---------------------------------- > - 1 files changed, 0 insertions(+), 60 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 96bc668..044df38 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = { > - .set_rate = &omap2_clksel_set_rate, > - }; > - > --/* DPLL_UNIPRO */ > --static struct dpll_data dpll_unipro_dd = { > -- .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO, > -- .clk_bypass = &sys_clkin_ck, > -- .clk_ref = &sys_clkin_ck, > -- .control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO, > -- .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << > DPLL_LOCKED), > -- .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO, > -- .idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO, > -- .mult_mask = OMAP4430_DPLL_MULT_MASK, > -- .div1_mask = OMAP4430_DPLL_DIV_MASK, > -- .enable_mask = OMAP4430_DPLL_EN_MASK, > -- .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, > -- .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, > -- .max_multiplier = 2047, > -- .max_divider = 128, > -- .min_divider = 1, > --}; > -- > -- > --static struct clk dpll_unipro_ck = { > -- .name = "dpll_unipro_ck", > -- .parent = &sys_clkin_ck, > -- .dpll_data = &dpll_unipro_dd, > -- .init = &omap2_init_dpll_parent, > -- .ops = &clkops_omap3_noncore_dpll_ops, > -- .recalc = &omap3_dpll_recalc, > -- .round_rate = &omap2_dpll_round_rate, > -- .set_rate = &omap3_noncore_dpll_set_rate, > --}; > -- > --static struct clk dpll_unipro_x2_ck = { > -- .name = "dpll_unipro_x2_ck", > -- .parent = &dpll_unipro_ck, > -- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, > -- .flags = CLOCK_CLKOUTX2, > -- .ops = &clkops_omap4_dpllmx_ops, > -- .recalc = &omap3_clkoutx2_recalc, > --}; > -- > --static const struct clksel dpll_unipro_m2x2_div[] = { > -- { .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates }, > -- { .parent = NULL }, > --}; > -- > --static struct clk dpll_unipro_m2x2_ck = { > -- .name = "dpll_unipro_m2x2_ck", > -- .parent = &dpll_unipro_x2_ck, > -- .clksel = dpll_unipro_m2x2_div, > -- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, > -- .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, > -- .ops = &clkops_omap4_dpllmx_ops, > -- .recalc = &omap2_clksel_recalc, > -- .round_rate = &omap2_clksel_round_rate, > -- .set_rate = &omap2_clksel_set_rate, > --}; > -- > - static struct clk usb_hs_clk_div_ck = { > - .name = "usb_hs_clk_div_ck", > - .parent = &dpll_abe_m3x2_ck, > -@@ -3058,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, > CK_443X), > - CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, > CK_443X), > - CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, > CK_443X), > -- CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, > CK_443X), > -- CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, > CK_443X), > -- CLK(NULL, "dpll_unipro_m2x2_ck", > &dpll_unipro_m2x2_ck, CK_443X), > - CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, > CK_443X), > - CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, > CK_443X), > - CLK(NULL, "dpll_usb_clkdcoldo_ck", > &dpll_usb_clkdcoldo_ck, CK_443X), > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0062-OMAP4- > hwmod-data-Modify-DSS-opt-clocks.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch > deleted file mode 100644 > index 69c3b2a..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0062-OMAP4-hwmod- > data-Modify-DSS-opt-clocks.patch > +++ /dev/null > @@ -1,153 +0,0 @@ > -From 52d08db173e39f2af6923dc803593d62fa05e43b Mon Sep 17 00:00:00 > 2001 > -From: Tomi Valkeinen <tomi.valkeinen@ti.com> > -Date: Sat, 9 Jul 2011 20:39:44 -0600 > -Subject: [PATCH 062/149] OMAP4: hwmod data: Modify DSS opt clocks > - > -Add missing DSS optional clocks to HWMOD data for OMAP4xxx. > - > -Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset. > - > -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > -[b-cousson@ti.com: Remove a comment and update the subject] > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> > -[paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's > - request] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 8 +++--- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 33 > ++++++++++++++++++++++++++++ > - 2 files changed, 37 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 044df38..7a0b112 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -3032,10 +3032,10 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, > CK_443X), > - CLK(NULL, "dmic_fck", &dmic_fck, > CK_443X), > - CLK(NULL, "dsp_fck", &dsp_fck, > CK_443X), > -- CLK("omapdss_dss", "sys_clk", &dss_sys_clk, > CK_443X), > -- CLK("omapdss_dss", "tv_clk", &dss_tv_clk, > CK_443X), > -- CLK("omapdss_dss", "video_clk", > &dss_48mhz_clk, CK_443X), > -- CLK("omapdss_dss", "fck", &dss_dss_clk, > CK_443X), > -+ CLK(NULL, "dss_sys_clk", &dss_sys_clk, > CK_443X), > -+ CLK(NULL, "dss_tv_clk", &dss_tv_clk, > CK_443X), > -+ CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, > CK_443X), > -+ CLK(NULL, "dss_dss_clk", &dss_dss_clk, > CK_443X), > - CLK("omapdss_dss", "ick", &dss_fck, > CK_443X), > - CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, > CK_443X), > - CLK(NULL, "emif1_fck", &emif1_fck, > CK_443X), > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index e011437..a7fbe5c 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -1267,9 +1267,16 @@ static struct omap_hwmod_ocp_if > *omap44xx_dss_dispc_slaves[] = { > - &omap44xx_l4_per__dss_dispc, > - }; > - > -+static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { > -+ { .role = "sys_clk", .clk = "dss_sys_clk" }, > -+ { .role = "tv_clk", .clk = "dss_tv_clk" }, > -+ { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, > -+}; > -+ > - static struct omap_hwmod omap44xx_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap44xx_dispc_hwmod_class, > -+ .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_dss_dispc_irqs, > - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, > - .main_clk = "dss_fck", > -@@ -1278,6 +1285,8 @@ static struct omap_hwmod > omap44xx_dss_dispc_hwmod = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > - }, > - }, > -+ .opt_clks = dss_dispc_opt_clks, > -+ .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), > - .slaves = omap44xx_dss_dispc_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -1358,6 +1367,10 @@ static struct omap_hwmod_ocp_if > *omap44xx_dss_dsi1_slaves[] = { > - &omap44xx_l4_per__dss_dsi1, > - }; > - > -+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { > -+ { .role = "sys_clk", .clk = "dss_sys_clk" }, > -+}; > -+ > - static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { > - .name = "dss_dsi1", > - .class = &omap44xx_dsi_hwmod_class, > -@@ -1369,6 +1382,8 @@ static struct omap_hwmod > omap44xx_dss_dsi1_hwmod = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > - }, > - }, > -+ .opt_clks = dss_dsi1_opt_clks, > -+ .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), > - .slaves = omap44xx_dss_dsi1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -1428,6 +1443,10 @@ static struct omap_hwmod_ocp_if > *omap44xx_dss_dsi2_slaves[] = { > - &omap44xx_l4_per__dss_dsi2, > - }; > - > -+static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { > -+ { .role = "sys_clk", .clk = "dss_sys_clk" }, > -+}; > -+ > - static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { > - .name = "dss_dsi2", > - .class = &omap44xx_dsi_hwmod_class, > -@@ -1439,6 +1458,8 @@ static struct omap_hwmod > omap44xx_dss_dsi2_hwmod = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > - }, > - }, > -+ .opt_clks = dss_dsi2_opt_clks, > -+ .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), > - .slaves = omap44xx_dss_dsi2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -1518,6 +1539,10 @@ static struct omap_hwmod_ocp_if > *omap44xx_dss_hdmi_slaves[] = { > - &omap44xx_l4_per__dss_hdmi, > - }; > - > -+static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { > -+ { .role = "sys_clk", .clk = "dss_sys_clk" }, > -+}; > -+ > - static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { > - .name = "dss_hdmi", > - .class = &omap44xx_hdmi_hwmod_class, > -@@ -1529,6 +1554,8 @@ static struct omap_hwmod > omap44xx_dss_hdmi_hwmod = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > - }, > - }, > -+ .opt_clks = dss_hdmi_opt_clks, > -+ .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), > - .slaves = omap44xx_dss_hdmi_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -1603,6 +1630,10 @@ static struct omap_hwmod_ocp_if > *omap44xx_dss_rfbi_slaves[] = { > - &omap44xx_l4_per__dss_rfbi, > - }; > - > -+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { > -+ { .role = "ick", .clk = "dss_fck" }, > -+}; > -+ > - static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { > - .name = "dss_rfbi", > - .class = &omap44xx_rfbi_hwmod_class, > -@@ -1613,6 +1644,8 @@ static struct omap_hwmod > omap44xx_dss_rfbi_hwmod = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > - }, > - }, > -+ .opt_clks = dss_rfbi_opt_clks, > -+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), > - .slaves = omap44xx_dss_rfbi_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0063-OMAP2-PM- > Initialise-sleep_switch-to-a-non-valid-valu.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid- > valu.patch > deleted file mode 100644 > index b8ea798..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0063-OMAP2-PM-Initialise- > sleep_switch-to-a-non-valid-valu.patch > +++ /dev/null > @@ -1,39 +0,0 @@ > -From 1588fef412d710916847c3f383489af1559aa4b0 Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Sat, 9 Jul 2011 20:42:11 -0600 > -Subject: [PATCH 063/149] OMAP2+: PM: Initialise sleep_switch to a non-valid > value > - > -sleep_switch which is initialised to 0 in omap_set_pwrdm_state > -happens to be a valid sleep_switch type (FORCEWAKEUP_SWITCH) > -which are defined as: > - > - #define FORCEWAKEUP_SWITCH 0 > - #define LOWPOWERSTATE_SWITCH 1 > - > -This causes the function to wrongly program some clock domains > -even when the Powerdomain is in ON state. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Acked-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/pm.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c > -index 49486f5..d48813f 100644 > ---- a/arch/arm/mach-omap2/pm.c > -+++ b/arch/arm/mach-omap2/pm.c > -@@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void) > - int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) > - { > - u32 cur_state; > -- int sleep_switch = 0; > -+ int sleep_switch = -1; > - int ret = 0; > - > - if (pwrdm == NULL || IS_ERR(pwrdm)) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4- > powerdomain-data-Fix-core-mem-states-and-missi.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix- > core-mem-states-and-missi.patch > deleted file mode 100644 > index 2222a2b..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4- > powerdomain-data-Fix-core-mem-states-and-missi.patch > +++ /dev/null > @@ -1,68 +0,0 @@ > -From 2e67179b61fd7b58ecbafd72fe07943620863ae7 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sat, 9 Jul 2011 20:42:11 -0600 > -Subject: [PATCH 064/149] OMAP4: powerdomain data: Fix core mem states > and missing cefuse flag > - > -Since ES2.0, the core ocmram does not support a different state > -than the main power domain anymore during both ON and RET power > -domain state. > -Since PM is not supported at all in ES1.0, update the common > -structure. > - > -LOWPOWERSTATECHANGE is supported by the cefuse power domain but > -the flag was missing. > -Add the PWRDM_HAS_LOWPOWERSTATECHANGE in flags field. > - > -Update the TI copyright date to 2011. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > -[paul@pwsan.com: moved the indentation changes to a different patch set] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/powerdomains44xx_data.c | 7 ++++--- > - 1 files changed, 4 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c > b/arch/arm/mach-omap2/powerdomains44xx_data.c > -index 3a7e678..8f46e7d 100644 > ---- a/arch/arm/mach-omap2/powerdomains44xx_data.c > -+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c > -@@ -1,7 +1,7 @@ > - /* > - * OMAP4 Power domains framework > - * > -- * Copyright (C) 2009-2010 Texas Instruments, Inc. > -+ * Copyright (C) 2009-2011 Texas Instruments, Inc. > - * Copyright (C) 2009-2011 Nokia Corporation > - * > - * Abhijit Pagare (abhijitpagare@ti.com) > -@@ -41,14 +41,14 @@ static struct powerdomain core_44xx_pwrdm = { > - .banks = 5, > - .pwrsts_mem_ret = { > - [0] = PWRSTS_OFF, /* core_nret_bank */ > -- [1] = PWRSTS_OFF_RET, /* core_ocmram */ > -+ [1] = PWRSTS_RET, /* core_ocmram */ > - [2] = PWRSTS_RET, /* core_other_bank */ > - [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ > - [4] = PWRSTS_OFF_RET, /* ducati_unicache */ > - }, > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* core_nret_bank */ > -- [1] = PWRSTS_OFF_RET, /* core_ocmram */ > -+ [1] = PWRSTS_ON, /* core_ocmram */ > - [2] = PWRSTS_ON, /* core_other_bank */ > - [3] = PWRSTS_ON, /* ducati_l2ram */ > - [4] = PWRSTS_ON, /* ducati_unicache */ > -@@ -318,6 +318,7 @@ static struct powerdomain cefuse_44xx_pwrdm = { > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - .pwrsts = PWRSTS_OFF_ON, > -+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, > - }; > - > - /* > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock- > data-Keep-GPMC-clocks-always-enabled-and.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC- > clocks-always-enabled-and.patch > deleted file mode 100644 > index 8eee066..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock-data- > Keep-GPMC-clocks-always-enabled-and.patch > +++ /dev/null > @@ -1,45 +0,0 @@ > -From f54325009439b13e234374856057227edc00373c Mon Sep 17 00:00:00 > 2001 > -From: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Date: Sat, 9 Jul 2011 20:42:59 -0600 > -Subject: [PATCH 065/149] OMAP4: clock data: Keep GPMC clocks always > enabled and hardware managed > - > -On OMAP4, CPU accesses on unmapped addresses are redirected to GPMC by > -L3 interconnect. Because of CPU speculative nature, such accesses are > -possible which can lead to indirect access to GPMC and if it's clock is > -not running, it can result in hang/abort on the platform. > - > -Above makes access to GPMC unpredictable during the execution, so it's > -module mode needs to be kept under hardware control instead of software > -control. > -Since the auto gating is supported for GPMC, there isn't any power impact > -because of this change. > - > -The issue was un-covered with security middleware running along with HLOS. > -In this case GPMC had a valid MMU descriptor on secure side where as HLOS > -didn't map the GMPC because it isn't being used. > - > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -[b-cousson@ti.com: Update subject and fix typos in the changelog] > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Kevin Hilman <khilman@ti.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 1 + > - 1 files changed, 1 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 7a0b112..2578820 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -1605,6 +1605,7 @@ static struct clk gpmc_ick = { > - .ops = &clkops_omap2_dflt, > - .enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL, > - .enable_bit = OMAP4430_MODULEMODE_HWCTRL, > -+ .flags = ENABLE_ON_INIT, > - .clkdm_name = "l3_2_clkdm", > - .parent = &l3_div_ck, > - .recalc = &followparent_recalc, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4- > powerdomain-data-Remove-unsupported-MPU-powerd.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4-powerdomain-data- > Remove-unsupported-MPU-powerd.patch > deleted file mode 100644 > index 7c7671f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4- > powerdomain-data-Remove-unsupported-MPU-powerd.patch > +++ /dev/null > @@ -1,44 +0,0 @@ > -From ef733ded20f0466c32d61872f19903653f31f977 Mon Sep 17 00:00:00 > 2001 > -From: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Date: Sat, 9 Jul 2011 20:42:59 -0600 > -Subject: [PATCH 066/149] OMAP4: powerdomain data: Remove unsupported > MPU powerdomain state > - > -On OMAP4430 devices, because of boot ROM code bug, MPU OFF state can't > -be attempted independently. When coming out of MPU OFF state, ROM code > -disables the clocks of IVAHD, TESLA which is not desirable. Hence the > -MPU OFF state is not usable on OMAP4430 devices. > - > -OMAP4460 onwards, MPU OFF state will be descoped completely because > -the DDR firewall falls in MPU power domain. When the MPU hit OFF state, > -DDR won't be accessible for other initiators. The deepest state supported > -is open switch retention (OSWR) just like CORE and PER PD on OMAP4430. > - > -So in summary MPU power domain OFF state is not supported on OMAP4 > -and onwards designs. Thanks to new PRCM design, device off mode can > -still be achieved with power domains hitting OSWR state. > - > -Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -[b-cousson@ti.com: Fix changelog typos] > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/powerdomains44xx_data.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c > b/arch/arm/mach-omap2/powerdomains44xx_data.c > -index 8f46e7d..247e794 100644 > ---- a/arch/arm/mach-omap2/powerdomains44xx_data.c > -+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c > -@@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = { > - .prcm_offs = OMAP4430_PRM_MPU_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -- .pwrsts = PWRSTS_OFF_RET_ON, > -+ .pwrsts = PWRSTS_RET_ON, > - .pwrsts_logic_ret = PWRSTS_OFF_RET, > - .banks = 3, > - .pwrsts_mem_ret = { > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0067-OMAP4- > hwmod-data-Change-DSS-main_clk-scheme.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk- > scheme.patch > deleted file mode 100644 > index 50baf2a..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0067-OMAP4-hwmod- > data-Change-DSS-main_clk-scheme.patch > +++ /dev/null > @@ -1,163 +0,0 @@ > -From 497db49799f6c84f5073c6b78e58094ba0b0d52e Mon Sep 17 00:00:00 > 2001 > -From: Tomi Valkeinen <tomi.valkeinen@ti.com> > -Date: Sat, 9 Jul 2011 20:39:45 -0600 > -Subject: [PATCH 067/149] OMAP4: hwmod data: Change DSS main_clk scheme > - > -Currently using pm_runtime with DSS requires the DSS driver to enable > -the DSS functional clock before calling pm_runtime_get(). That makes it > -impossible to use pm_runtime in DSS as it is meant to be used, with > -pm_runtime callbacks. > - > -This patch changes the hwmod database for OMAP4 so that enabling the > -hwmod via pm_runtime will also enable the DSS functional clock, allowing > -us to use pm_runtime properly in DSS driver. > - > -The DSS HWMOD side is not really correct, not before nor after this > -patch, and getting DSS to retention will probably not work currently. > -However, it is not supported in the mainline kernel anyway, so this > -won't break anything. > - > -So this patch allows us to write the pm_runtime adaptation for the DSS > -driver the way it should be done, and the HWMOD/PM side can be fixed > -later. > - > -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 28 ++++++++++++++- > ------------- > - 1 files changed, 14 insertions(+), 14 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index a7fbe5c..b25ab83 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -1136,7 +1136,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dma_addrs[] = { > - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { > - .master = &omap44xx_l3_main_2_hwmod, > - .slave = &omap44xx_dss_hwmod, > -- .clk = "l3_div_ck", > -+ .clk = "dss_fck", > - .addr = omap44xx_dss_dma_addrs, > - .user = OCP_USER_SDMA, > - }; > -@@ -1175,7 +1175,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] > = { > - static struct omap_hwmod omap44xx_dss_hwmod = { > - .name = "dss_core", > - .class = &omap44xx_dss_hwmod_class, > -- .main_clk = "dss_fck", > -+ .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -@@ -1238,7 +1238,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dispc_dma_addrs[] = { > - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { > - .master = &omap44xx_l3_main_2_hwmod, > - .slave = &omap44xx_dss_dispc_hwmod, > -- .clk = "l3_div_ck", > -+ .clk = "dss_fck", > - .addr = omap44xx_dss_dispc_dma_addrs, > - .user = OCP_USER_SDMA, > - }; > -@@ -1279,7 +1279,7 @@ static struct omap_hwmod > omap44xx_dss_dispc_hwmod = { > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_dss_dispc_irqs, > - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, > -- .main_clk = "dss_fck", > -+ .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -@@ -1338,7 +1338,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dsi1_dma_addrs[] = { > - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { > - .master = &omap44xx_l3_main_2_hwmod, > - .slave = &omap44xx_dss_dsi1_hwmod, > -- .clk = "l3_div_ck", > -+ .clk = "dss_fck", > - .addr = omap44xx_dss_dsi1_dma_addrs, > - .user = OCP_USER_SDMA, > - }; > -@@ -1376,7 +1376,7 @@ static struct omap_hwmod > omap44xx_dss_dsi1_hwmod = { > - .class = &omap44xx_dsi_hwmod_class, > - .mpu_irqs = omap44xx_dss_dsi1_irqs, > - .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, > -- .main_clk = "dss_fck", > -+ .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -@@ -1414,7 +1414,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_dsi2_dma_addrs[] = { > - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { > - .master = &omap44xx_l3_main_2_hwmod, > - .slave = &omap44xx_dss_dsi2_hwmod, > -- .clk = "l3_div_ck", > -+ .clk = "dss_fck", > - .addr = omap44xx_dss_dsi2_dma_addrs, > - .user = OCP_USER_SDMA, > - }; > -@@ -1452,7 +1452,7 @@ static struct omap_hwmod > omap44xx_dss_dsi2_hwmod = { > - .class = &omap44xx_dsi_hwmod_class, > - .mpu_irqs = omap44xx_dss_dsi2_irqs, > - .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, > -- .main_clk = "dss_fck", > -+ .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -@@ -1510,7 +1510,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_hdmi_dma_addrs[] = { > - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { > - .master = &omap44xx_l3_main_2_hwmod, > - .slave = &omap44xx_dss_hdmi_hwmod, > -- .clk = "l3_div_ck", > -+ .clk = "dss_fck", > - .addr = omap44xx_dss_hdmi_dma_addrs, > - .user = OCP_USER_SDMA, > - }; > -@@ -1548,7 +1548,7 @@ static struct omap_hwmod > omap44xx_dss_hdmi_hwmod = { > - .class = &omap44xx_hdmi_hwmod_class, > - .mpu_irqs = omap44xx_dss_hdmi_irqs, > - .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, > -- .main_clk = "dss_fck", > -+ .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -@@ -1601,7 +1601,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_rfbi_dma_addrs[] = { > - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { > - .master = &omap44xx_l3_main_2_hwmod, > - .slave = &omap44xx_dss_rfbi_hwmod, > -- .clk = "l3_div_ck", > -+ .clk = "dss_fck", > - .addr = omap44xx_dss_rfbi_dma_addrs, > - .user = OCP_USER_SDMA, > - }; > -@@ -1638,7 +1638,7 @@ static struct omap_hwmod > omap44xx_dss_rfbi_hwmod = { > - .name = "dss_rfbi", > - .class = &omap44xx_rfbi_hwmod_class, > - .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, > -- .main_clk = "dss_fck", > -+ .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -@@ -1675,7 +1675,7 @@ static struct omap_hwmod_addr_space > omap44xx_dss_venc_dma_addrs[] = { > - static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { > - .master = &omap44xx_l3_main_2_hwmod, > - .slave = &omap44xx_dss_venc_hwmod, > -- .clk = "l3_div_ck", > -+ .clk = "dss_fck", > - .addr = omap44xx_dss_venc_dma_addrs, > - .user = OCP_USER_SDMA, > - }; > -@@ -1707,7 +1707,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_dss_venc_slaves[] = { > - static struct omap_hwmod omap44xx_dss_venc_hwmod = { > - .name = "dss_venc", > - .class = &omap44xx_venc_hwmod_class, > -- .main_clk = "dss_fck", > -+ .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0068-I2C-OMAP2- > Set-hwmod-flags-to-only-allow-16-bit-acces.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit- > acces.patch > deleted file mode 100644 > index 6a0dea5..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0068-I2C-OMAP2-Set- > hwmod-flags-to-only-allow-16-bit-acces.patch > +++ /dev/null > @@ -1,133 +0,0 @@ > -From 3bc9e748aeea5c152564186ad65ae7f7848420d3 Mon Sep 17 00:00:00 > 2001 > -From: Andy Green <andy@warmcat.com> > -Date: Sun, 10 Jul 2011 05:27:14 -0600 > -Subject: [PATCH 068/149] I2C: OMAP2+: Set hwmod flags to only allow 16-bit > accesses to i2c > - > -Peter Maydell noticed when running under QEMU he was getting > -errors reporting 32-bit access to I2C peripheral unit registers > -that are documented to be 8 or 16-bit only[1][2] > - > -The I2C driver is blameless as it wraps its accesses in a > -function using __raw_writew and __raw_readw, it turned out it > -is the hwmod stuff. > - > -However the hwmod code already has a flag to force a > -perhipheral unit to only be accessed using 16-bit operations. > - > -This patch applies the 16-bit only flag to the 2430, > -OMAP3xxx and OMAP44xx hwmod structs. 2420 was already > -correctly marked up as 16-bit. > - > -The 2430 change will need testing by TI as arranged > -in the comments to the previous patch version. > - > -When the 16-bit flag is or-ed with other flags, it is placed > -first as requested in comments. > - > -[1] OMAP4430 Technical reference manual section 23.1.6.2 > -[2] OMAP3530 Techincal reference manual section 18.6 > - > -Cc: patches@linaro.org > -Cc: Ben Dooks <ben-linux@fluff.org> > -Reported-by: Peter Maydell <peter.maydell@linaro.org> > -Signed-off-by: Andy Green <andy.green@linaro.org> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 ++ > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 3 +++ > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 8 ++++---- > - 3 files changed, 9 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index 2a52f02..19ddf08 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -1092,6 +1092,7 @@ static struct omap_hwmod_ocp_if > *omap2430_i2c1_slaves[] = { > - > - static struct omap_hwmod omap2430_i2c1_hwmod = { > - .name = "i2c1", > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap2_i2c1_mpu_irqs, > - .sdma_reqs = omap2_i2c1_sdma_reqs, > - .main_clk = "i2chs1_fck", > -@@ -1127,6 +1128,7 @@ static struct omap_hwmod_ocp_if > *omap2430_i2c2_slaves[] = { > - > - static struct omap_hwmod omap2430_i2c2_hwmod = { > - .name = "i2c2", > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap2_i2c2_mpu_irqs, > - .sdma_reqs = omap2_i2c2_sdma_reqs, > - .main_clk = "i2chs2_fck", > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 1a52716..542a11b 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -1615,6 +1615,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c1_slaves[] = { > - > - static struct omap_hwmod omap3xxx_i2c1_hwmod = { > - .name = "i2c1", > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap2_i2c1_mpu_irqs, > - .sdma_reqs = omap2_i2c1_sdma_reqs, > - .main_clk = "i2c1_fck", > -@@ -1646,6 +1647,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c2_slaves[] = { > - > - static struct omap_hwmod omap3xxx_i2c2_hwmod = { > - .name = "i2c2", > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap2_i2c2_mpu_irqs, > - .sdma_reqs = omap2_i2c2_sdma_reqs, > - .main_clk = "i2c2_fck", > -@@ -1688,6 +1690,7 @@ static struct omap_hwmod_ocp_if > *omap3xxx_i2c3_slaves[] = { > - > - static struct omap_hwmod omap3xxx_i2c3_hwmod = { > - .name = "i2c3", > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = i2c3_mpu_irqs, > - .sdma_reqs = i2c3_sdma_reqs, > - .main_clk = "i2c3_fck", > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index b25ab83..2ebccb8 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -2201,7 +2201,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c1_slaves[] = { > - static struct omap_hwmod omap44xx_i2c1_hwmod = { > - .name = "i2c1", > - .class = &omap44xx_i2c_hwmod_class, > -- .flags = HWMOD_INIT_NO_RESET, > -+ .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c1_irqs, > - .sdma_reqs = omap44xx_i2c1_sdma_reqs, > - .main_clk = "i2c1_fck", > -@@ -2254,7 +2254,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c2_slaves[] = { > - static struct omap_hwmod omap44xx_i2c2_hwmod = { > - .name = "i2c2", > - .class = &omap44xx_i2c_hwmod_class, > -- .flags = HWMOD_INIT_NO_RESET, > -+ .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c2_irqs, > - .sdma_reqs = omap44xx_i2c2_sdma_reqs, > - .main_clk = "i2c2_fck", > -@@ -2307,7 +2307,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c3_slaves[] = { > - static struct omap_hwmod omap44xx_i2c3_hwmod = { > - .name = "i2c3", > - .class = &omap44xx_i2c_hwmod_class, > -- .flags = HWMOD_INIT_NO_RESET, > -+ .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c3_irqs, > - .sdma_reqs = omap44xx_i2c3_sdma_reqs, > - .main_clk = "i2c3_fck", > -@@ -2360,7 +2360,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c4_slaves[] = { > - static struct omap_hwmod omap44xx_i2c4_hwmod = { > - .name = "i2c4", > - .class = &omap44xx_i2c_hwmod_class, > -- .flags = HWMOD_INIT_NO_RESET, > -+ .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_i2c4_irqs, > - .sdma_reqs = omap44xx_i2c4_sdma_reqs, > - .main_clk = "i2c4_fck", > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2- > increase-omap_i2c_dev_attr-flags-from-u8-t.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2-increase- > omap_i2c_dev_attr-flags-from-u8-t.patch > deleted file mode 100644 > index cb36f97..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2-increase- > omap_i2c_dev_attr-flags-from-u8-t.patch > +++ /dev/null > @@ -1,46 +0,0 @@ > -From c32768648dfe7f6bbe90ee0b18d1edb60fc141fe Mon Sep 17 00:00:00 > 2001 > -From: Andy Green <andy@warmcat.com> > -Date: Sun, 10 Jul 2011 05:27:14 -0600 > -Subject: [PATCH 069/149] I2C: OMAP2+: increase omap_i2c_dev_attr flags > from u8 to u32 > - > -As part of removing cpu_...() from the OMAP I2C driver, we need to > -convert the CPU tests into functionality flags that are set by > -hwmod class in the same way the IP revision is. > - > -More flags are needed than will fit in the existing u8 flags > -member of omap_i2c_dev_attr. > - > -These flags can refer to options inside the IP block but they are > -most needed for information about cpu implementation specific > -options that are not part of the IP block itself. For example, > -how the CPU data bus is wired to the IP block databus differs > -between OMAP cpus and affects how you must shift the address in > -the IP block, but is not a feature of the IP block itself. > - > -Cc: patches@linaro.org > -Cc: Ben Dooks <ben-linux@fluff.org> > -Reported-by: Peter Maydell <peter.maydell@linaro.org> > -Signed-off-by: Andy Green <andy.green@linaro.org> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/plat-omap/include/plat/i2c.h | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat- > omap/include/plat/i2c.h > -index 878d632..4c108f5 100644 > ---- a/arch/arm/plat-omap/include/plat/i2c.h > -+++ b/arch/arm/plat-omap/include/plat/i2c.h > -@@ -46,7 +46,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 > clkrate, > - */ > - struct omap_i2c_dev_attr { > - u8 fifo_depth; > -- u8 flags; > -+ u32 flags; > - }; > - > - void __init omap1_i2c_mux_pins(int bus_id); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0070-I2C-OMAP2- > Introduce-I2C-IP-versioning-constants.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning- > constants.patch > deleted file mode 100644 > index 9c4b51c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0070-I2C-OMAP2- > Introduce-I2C-IP-versioning-constants.patch > +++ /dev/null > @@ -1,61 +0,0 @@ > -From 109f56f616221cb632ce98b5da05420f2099eff1 Mon Sep 17 00:00:00 > 2001 > -From: Andy Green <andy@warmcat.com> > -Date: Sun, 10 Jul 2011 05:27:14 -0600 > -Subject: [PATCH 070/149] I2C: OMAP2+: Introduce I2C IP versioning constants > - > -These represent the two kinds of (incompatible) OMAP I2C > -peripheral unit in use so far. > - > -The constants are in linux/i2c-omap.h so the omap i2c driver can have > -them too. > - > -Cc: patches@linaro.org > -Cc: Ben Dooks <ben-linux@fluff.org> > -Reported-by: Peter Maydell <peter.maydell@linaro.org> > -Signed-off-by: Andy Green <andy.green@linaro.org> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/plat-omap/include/plat/i2c.h | 1 + > - include/linux/i2c-omap.h | 12 ++++++++++++ > - 2 files changed, 13 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat- > omap/include/plat/i2c.h > -index 4c108f5..fd75dad 100644 > ---- a/arch/arm/plat-omap/include/plat/i2c.h > -+++ b/arch/arm/plat-omap/include/plat/i2c.h > -@@ -22,6 +22,7 @@ > - #define __ASM__ARCH_OMAP_I2C_H > - > - #include <linux/i2c.h> > -+#include <linux/i2c-omap.h> > - > - #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) > - extern int omap_register_i2c_bus(int bus_id, u32 clkrate, > -diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h > -index 7472449..701886d 100644 > ---- a/include/linux/i2c-omap.h > -+++ b/include/linux/i2c-omap.h > -@@ -3,6 +3,18 @@ > - > - #include <linux/platform_device.h> > - > -+/* > -+ * Version 2 of the I2C peripheral unit has a different register > -+ * layout and extra registers. The ID register in the V2 peripheral > -+ * unit on the OMAP4430 reports the same ID as the V1 peripheral > -+ * unit on the OMAP3530, so we must inform the driver which IP > -+ * version we know it is running on from platform / cpu-specific > -+ * code using these constants in the hwmod class definition. > -+ */ > -+ > -+#define OMAP_I2C_IP_VERSION_1 1 > -+#define OMAP_I2C_IP_VERSION_2 2 > -+ > - struct omap_i2c_bus_platform_data { > - u32 clkrate; > - void (*set_mpu_wkup_lat)(struct device *dev, long set); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1- > OMAP2-create-omap-I2C-functionality-flags-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap- > I2C-functionality-flags-.patch > deleted file mode 100644 > index c211654..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1-OMAP2- > create-omap-I2C-functionality-flags-.patch > +++ /dev/null > @@ -1,51 +0,0 @@ > -From 46e0d0dce7d030781e2c67cce0438384ee8dd707 Mon Sep 17 00:00:00 > 2001 > -From: Andy Green <andy@warmcat.com> > -Date: Sun, 10 Jul 2011 05:27:15 -0600 > -Subject: [PATCH 071/149] I2C: OMAP1/OMAP2+: create omap I2C > functionality flags for each cpu_... test > - > -These represent the 8 kinds of implementation functionality > -that up until now were inferred by the 16 remaining cpu_...() > -tests in the omap i2c driver. > - > -Changed to use BIT() as suggested by Balaji T Krishnamoorthy. > - > -Cc: patches@linaro.org > -Cc: Ben Dooks <ben-linux@fluff.org> > -Reported-by: Peter Maydell <peter.maydell@linaro.org> > -Signed-off-by: Andy Green <andy.green@linaro.org> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - include/linux/i2c-omap.h | 15 +++++++++++++++ > - 1 files changed, 15 insertions(+), 0 deletions(-) > - > -diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h > -index 701886d..0aa0cbd 100644 > ---- a/include/linux/i2c-omap.h > -+++ b/include/linux/i2c-omap.h > -@@ -15,6 +15,21 @@ > - #define OMAP_I2C_IP_VERSION_1 1 > - #define OMAP_I2C_IP_VERSION_2 2 > - > -+/* struct omap_i2c_bus_platform_data .flags meanings */ > -+ > -+#define OMAP_I2C_FLAG_NO_FIFO BIT(0) > -+#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) > -+#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) > -+#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) > -+#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4) > -+#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) > -+#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) > -+/* how the CPU address bus must be translated for I2C unit access */ > -+#define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 > -+#define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) > -+#define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) > -+#define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 > -+ > - struct omap_i2c_bus_platform_data { > - u32 clkrate; > - void (*set_mpu_wkup_lat)(struct device *dev, long set); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2- > Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2- > hwmod-defintions-with-I2C-IP.patch > deleted file mode 100644 > index 1f19e72..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2-Tag-all- > OMAP2-hwmod-defintions-with-I2C-IP.patch > +++ /dev/null > @@ -1,77 +0,0 @@ > -From 19d2caadfe6d0faad12b209bc1d096e1297fea68 Mon Sep 17 00:00:00 > 2001 > -From: Andy Green <andy@warmcat.com> > -Date: Sun, 10 Jul 2011 05:27:15 -0600 > -Subject: [PATCH 072/149] I2C: OMAP2+: Tag all OMAP2+ hwmod defintions > with I2C IP revision > - > -Since we cannot trust (or even reliably find) the OMAP I2C > -peripheral unit's own revision register, we must inform the > -OMAP i2c driver of which IP version it is running on. We > -do this by tagging the omap_hwmod_class for i2c on all the > -OMAP2+ platform / cpu specific hwmod init and passing it up > -to the driver (next patches). > - > -Cc: patches@linaro.org > -Cc: Ben Dooks <ben-linux@fluff.org> > -Reported-by: Peter Maydell <peter.maydell@linaro.org> > -Signed-off-by: Andy Green <andy.green@linaro.org> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 1 + > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1 + > - 4 files changed, 4 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index f3901ab..95f547c 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -1029,6 +1029,7 @@ static struct omap_hwmod_class_sysconfig > i2c_sysc = { > - static struct omap_hwmod_class i2c_class = { > - .name = "i2c", > - .sysc = &i2c_sysc, > -+ .rev = OMAP_I2C_IP_VERSION_1, > - }; > - > - static struct omap_i2c_dev_attr i2c_dev_attr; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index 19ddf08..d7ed51b 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -1078,6 +1078,7 @@ static struct omap_hwmod_class_sysconfig > i2c_sysc = { > - static struct omap_hwmod_class i2c_class = { > - .name = "i2c", > - .sysc = &i2c_sysc, > -+ .rev = OMAP_I2C_IP_VERSION_1, > - }; > - > - static struct omap_i2c_dev_attr i2c_dev_attr = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 542a11b..58ec1e2 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -1308,6 +1308,7 @@ static struct omap_hwmod > omap3xxx_uart4_hwmod = { > - static struct omap_hwmod_class i2c_class = { > - .name = "i2c", > - .sysc = &i2c_sysc, > -+ .rev = OMAP_I2C_IP_VERSION_1, > - }; > - > - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 2ebccb8..1bed3b8 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -2160,6 +2160,7 @@ static struct omap_hwmod_class_sysconfig > omap44xx_i2c_sysc = { > - static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { > - .name = "i2c", > - .sysc = &omap44xx_i2c_sysc, > -+ .rev = OMAP_I2C_IP_VERSION_2, > - }; > - > - /* i2c1 */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0073-I2C-OMAP2- > add-correct-functionality-flags-to-all-oma.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all- > oma.patch > deleted file mode 100644 > index aad082c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0073-I2C-OMAP2-add- > correct-functionality-flags-to-all-oma.patch > +++ /dev/null > @@ -1,146 +0,0 @@ > -From 61ee913ca983d9ff9bc3d98564417d9054db3e45 Mon Sep 17 00:00:00 > 2001 > -From: Andy Green <andy@warmcat.com> > -Date: Sun, 10 Jul 2011 05:27:16 -0600 > -Subject: [PATCH 073/149] I2C: OMAP2+: add correct functionality flags to all > omap2plus i2c dev_attr > - > -This adds the new functionality flags for omap i2c unit to all OMAP2 > -hwmod definitions > - > -Cc: patches@linaro.org > -Cc: Ben Dooks <ben-linux@fluff.org> > -Reported-by: Peter Maydell <peter.maydell@linaro.org> > -Signed-off-by: Andy Green <andy.green@linaro.org> > -Signed-off-by: Tony Lindgren <tony@atomide.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 7 ++++++- > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +++ > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 9 +++++++++ > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++++++ > - 4 files changed, 27 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index 95f547c..7af2514 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -1032,7 +1032,12 @@ static struct omap_hwmod_class i2c_class = { > - .rev = OMAP_I2C_IP_VERSION_1, > - }; > - > --static struct omap_i2c_dev_attr i2c_dev_attr; > -+static struct omap_i2c_dev_attr i2c_dev_attr = { > -+ .flags = OMAP_I2C_FLAG_NO_FIFO | > -+ OMAP_I2C_FLAG_SIMPLE_CLOCK | > -+ OMAP_I2C_FLAG_16BIT_DATA_REG | > -+ OMAP_I2C_FLAG_BUS_SHIFT_2, > -+}; > - > - /* I2C1 */ > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index d7ed51b..405688a 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -1083,6 +1083,9 @@ static struct omap_hwmod_class i2c_class = { > - > - static struct omap_i2c_dev_attr i2c_dev_attr = { > - .fifo_depth = 8, /* bytes */ > -+ .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | > -+ OMAP_I2C_FLAG_BUS_SHIFT_2 | > -+ OMAP_I2C_FLAG_FORCE_19200_INT_CLK, > - }; > - > - /* I2C1 */ > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 58ec1e2..c704ac8 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -1608,6 +1608,9 @@ static struct omap_hwmod > omap3xxx_dss_venc_hwmod = { > - > - static struct omap_i2c_dev_attr i2c1_dev_attr = { > - .fifo_depth = 8, /* bytes */ > -+ .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | > -+ OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | > -+ OMAP_I2C_FLAG_BUS_SHIFT_2, > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { > -@@ -1640,6 +1643,9 @@ static struct omap_hwmod > omap3xxx_i2c1_hwmod = { > - > - static struct omap_i2c_dev_attr i2c2_dev_attr = { > - .fifo_depth = 8, /* bytes */ > -+ .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | > -+ OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | > -+ OMAP_I2C_FLAG_BUS_SHIFT_2, > - }; > - > - static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { > -@@ -1672,6 +1678,9 @@ static struct omap_hwmod > omap3xxx_i2c2_hwmod = { > - > - static struct omap_i2c_dev_attr i2c3_dev_attr = { > - .fifo_depth = 64, /* bytes */ > -+ .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | > -+ OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | > -+ OMAP_I2C_FLAG_BUS_SHIFT_2, > - }; > - > - static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 1bed3b8..55331df 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -27,6 +27,7 @@ > - #include <plat/mcspi.h> > - #include <plat/mcbsp.h> > - #include <plat/mmc.h> > -+#include <plat/i2c.h> > - > - #include "omap_hwmod_common_data.h" > - > -@@ -2163,6 +2164,10 @@ static struct omap_hwmod_class > omap44xx_i2c_hwmod_class = { > - .rev = OMAP_I2C_IP_VERSION_2, > - }; > - > -+static struct omap_i2c_dev_attr i2c_dev_attr = { > -+ .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE, > -+}; > -+ > - /* i2c1 */ > - static struct omap_hwmod omap44xx_i2c1_hwmod; > - static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { > -@@ -2213,6 +2218,7 @@ static struct omap_hwmod > omap44xx_i2c1_hwmod = { > - }, > - .slaves = omap44xx_i2c1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves), > -+ .dev_attr = &i2c_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -@@ -2266,6 +2272,7 @@ static struct omap_hwmod > omap44xx_i2c2_hwmod = { > - }, > - .slaves = omap44xx_i2c2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves), > -+ .dev_attr = &i2c_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -@@ -2319,6 +2326,7 @@ static struct omap_hwmod > omap44xx_i2c3_hwmod = { > - }, > - .slaves = omap44xx_i2c3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves), > -+ .dev_attr = &i2c_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -@@ -2372,6 +2380,7 @@ static struct omap_hwmod > omap44xx_i2c4_hwmod = { > - }, > - .slaves = omap44xx_i2c4_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves), > -+ .dev_attr = &i2c_dev_attr, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0074-OMAP-hwmod- > fix-the-i2c-reset-timeout-during-bootup.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during- > bootup.patch > deleted file mode 100644 > index 4d16451..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0074-OMAP-hwmod-fix- > the-i2c-reset-timeout-during-bootup.patch > +++ /dev/null > @@ -1,286 +0,0 @@ > -From 6cc398a1452cef66c2c10eaadb3efe18f4ab8874 Mon Sep 17 00:00:00 > 2001 > -From: Avinash.H.M <avinashhm@ti.com> > -Date: Sun, 10 Jul 2011 05:27:16 -0600 > -Subject: [PATCH 074/149] OMAP: hwmod: fix the i2c-reset timeout during > bootup > - > -The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a > -special sequence to reset the module. The sequence is > - - Disable the I2C. > - - Write to SOFTRESET bit. > - - Enable the I2C. > - - Poll on the RESETDONE bit. > -The sequence is implemented as a function and the i2c_class is updated with > -the correct 'reset' pointer. omap_hwmod_softreset function is implemented > -which triggers the softreset by writing into sysconfig register. On following > -this sequence, i2c module resets properly and timeouts are not seen. > - > -Cc: Rajendra Nayak <rnayak@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Benoit Cousson <b-cousson@ti.com> > -Cc: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Avinash.H.M <avinashhm@ti.com> > -[paul@pwsan.com: combined this patch with a patch to remove > - HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register > - offset conditional code to use the IP block revision; minor code > - cleanup] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/i2c.c | 68 > ++++++++++++++++++++++++++ > - arch/arm/mach-omap2/omap_hwmod.c | 27 ++++++++++ > - arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + > - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 7 ++- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 10 ++-- > - arch/arm/plat-omap/include/plat/i2c.h | 3 + > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + > - 8 files changed, 111 insertions(+), 7 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c > -index 79c478c..ace9994 100644 > ---- a/arch/arm/mach-omap2/i2c.c > -+++ b/arch/arm/mach-omap2/i2c.c > -@@ -21,9 +21,19 @@ > - > - #include <plat/cpu.h> > - #include <plat/i2c.h> > -+#include <plat/common.h> > -+#include <plat/omap_hwmod.h> > - > - #include "mux.h" > - > -+/* In register I2C_CON, Bit 15 is the I2C enable bit */ > -+#define I2C_EN BIT(15) > -+#define OMAP2_I2C_CON_OFFSET 0x24 > -+#define OMAP4_I2C_CON_OFFSET 0xA4 > -+ > -+/* Maximum microseconds to wait for OMAP module to softreset */ > -+#define MAX_MODULE_SOFTRESET_WAIT 10000 > -+ > - void __init omap2_i2c_mux_pins(int bus_id) > - { > - char mux_name[sizeof("i2c2_scl.i2c2_scl")]; > -@@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id) > - sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); > - omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); > - } > -+ > -+/** > -+ * omap_i2c_reset - reset the omap i2c module. > -+ * @oh: struct omap_hwmod * > -+ * > -+ * The i2c moudle in omap2, omap3 had a special sequence to reset. The > -+ * sequence is: > -+ * - Disable the I2C. > -+ * - Write to SOFTRESET bit. > -+ * - Enable the I2C. > -+ * - Poll on the RESETDONE bit. > -+ * The sequence is implemented in below function. This is called for 2420, > -+ * 2430 and omap3. > -+ */ > -+int omap_i2c_reset(struct omap_hwmod *oh) > -+{ > -+ u32 v; > -+ u16 i2c_con; > -+ int c = 0; > -+ > -+ if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { > -+ i2c_con = OMAP4_I2C_CON_OFFSET; > -+ } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { > -+ i2c_con = OMAP2_I2C_CON_OFFSET; > -+ } else { > -+ WARN(1, "Cannot reset I2C block %s: unsupported revision\n", > -+ oh->name); > -+ return -EINVAL; > -+ } > -+ > -+ /* Disable I2C */ > -+ v = omap_hwmod_read(oh, i2c_con); > -+ v &= ~I2C_EN; > -+ omap_hwmod_write(v, oh, i2c_con); > -+ > -+ /* Write to the SOFTRESET bit */ > -+ omap_hwmod_softreset(oh); > -+ > -+ /* Enable I2C */ > -+ v = omap_hwmod_read(oh, i2c_con); > -+ v |= I2C_EN; > -+ omap_hwmod_write(v, oh, i2c_con); > -+ > -+ /* Poll on RESETDONE bit */ > -+ omap_test_timeout((omap_hwmod_read(oh, > -+ oh->class->sysc->syss_offs) > -+ & SYSS_RESETDONE_MASK), > -+ MAX_MODULE_SOFTRESET_WAIT, c); > -+ > -+ if (c == MAX_MODULE_SOFTRESET_WAIT) > -+ pr_warning("%s: %s: softreset failed (waited %d usec)\n", > -+ __func__, oh->name, > MAX_MODULE_SOFTRESET_WAIT); > -+ else > -+ pr_debug("%s: %s: softreset in %d usec\n", __func__, > -+ oh->name, c); > -+ > -+ return 0; > -+} > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 7d242c9..02b6016 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -1656,6 +1656,33 @@ void omap_hwmod_write(u32 v, struct > omap_hwmod *oh, u16 reg_offs) > - } > - > - /** > -+ * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit > -+ * @oh: struct omap_hwmod * > -+ * > -+ * This is a public function exposed to drivers. Some drivers may need to do > -+ * some settings before and after resetting the device. Those drivers after > -+ * doing the necessary settings could use this function to start a reset by > -+ * setting the SYSCONFIG.SOFTRESET bit. > -+ */ > -+int omap_hwmod_softreset(struct omap_hwmod *oh) > -+{ > -+ u32 v; > -+ int ret; > -+ > -+ if (!oh || !(oh->_sysc_cache)) > -+ return -EINVAL; > -+ > -+ v = oh->_sysc_cache; > -+ ret = _set_softreset(oh, &v); > -+ if (ret) > -+ goto error; > -+ _write_sysconfig(v, oh); > -+ > -+error: > -+ return ret; > -+} > -+ > -+/** > - * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode > - * @oh: struct omap_hwmod * > - * @idlemode: SIDLEMODE field bits (shifted to bit 0) > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -index 7af2514..a015c69 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c > -@@ -1030,6 +1030,7 @@ static struct omap_hwmod_class i2c_class = { > - .name = "i2c", > - .sysc = &i2c_sysc, > - .rev = OMAP_I2C_IP_VERSION_1, > -+ .reset = &omap_i2c_reset, > - }; > - > - static struct omap_i2c_dev_attr i2c_dev_attr = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -index 405688a..16743c7 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c > -@@ -1079,6 +1079,7 @@ static struct omap_hwmod_class i2c_class = { > - .name = "i2c", > - .sysc = &i2c_sysc, > - .rev = OMAP_I2C_IP_VERSION_1, > -+ .reset = &omap_i2c_reset, > - }; > - > - static struct omap_i2c_dev_attr i2c_dev_attr = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index c704ac8..25bf43b 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -1306,9 +1306,10 @@ static struct omap_hwmod > omap3xxx_uart4_hwmod = { > - }; > - > - static struct omap_hwmod_class i2c_class = { > -- .name = "i2c", > -- .sysc = &i2c_sysc, > -- .rev = OMAP_I2C_IP_VERSION_1, > -+ .name = "i2c", > -+ .sysc = &i2c_sysc, > -+ .rev = OMAP_I2C_IP_VERSION_1, > -+ .reset = &omap_i2c_reset, > - }; > - > - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 55331df..5d5df49 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -22,6 +22,7 @@ > - > - #include <plat/omap_hwmod.h> > - #include <plat/cpu.h> > -+#include <plat/i2c.h> > - #include <plat/gpio.h> > - #include <plat/dma.h> > - #include <plat/mcspi.h> > -@@ -2162,6 +2163,7 @@ static struct omap_hwmod_class > omap44xx_i2c_hwmod_class = { > - .name = "i2c", > - .sysc = &omap44xx_i2c_sysc, > - .rev = OMAP_I2C_IP_VERSION_2, > -+ .reset = &omap_i2c_reset, > - }; > - > - static struct omap_i2c_dev_attr i2c_dev_attr = { > -@@ -2207,7 +2209,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c1_slaves[] = { > - static struct omap_hwmod omap44xx_i2c1_hwmod = { > - .name = "i2c1", > - .class = &omap44xx_i2c_hwmod_class, > -- .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap44xx_i2c1_irqs, > - .sdma_reqs = omap44xx_i2c1_sdma_reqs, > - .main_clk = "i2c1_fck", > -@@ -2261,7 +2263,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c2_slaves[] = { > - static struct omap_hwmod omap44xx_i2c2_hwmod = { > - .name = "i2c2", > - .class = &omap44xx_i2c_hwmod_class, > -- .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap44xx_i2c2_irqs, > - .sdma_reqs = omap44xx_i2c2_sdma_reqs, > - .main_clk = "i2c2_fck", > -@@ -2315,7 +2317,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c3_slaves[] = { > - static struct omap_hwmod omap44xx_i2c3_hwmod = { > - .name = "i2c3", > - .class = &omap44xx_i2c_hwmod_class, > -- .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap44xx_i2c3_irqs, > - .sdma_reqs = omap44xx_i2c3_sdma_reqs, > - .main_clk = "i2c3_fck", > -@@ -2369,7 +2371,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c4_slaves[] = { > - static struct omap_hwmod omap44xx_i2c4_hwmod = { > - .name = "i2c4", > - .class = &omap44xx_i2c_hwmod_class, > -- .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, > -+ .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap44xx_i2c4_irqs, > - .sdma_reqs = omap44xx_i2c4_sdma_reqs, > - .main_clk = "i2c4_fck", > -diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat- > omap/include/plat/i2c.h > -index fd75dad..7c22b9e 100644 > ---- a/arch/arm/plat-omap/include/plat/i2c.h > -+++ b/arch/arm/plat-omap/include/plat/i2c.h > -@@ -53,4 +53,7 @@ struct omap_i2c_dev_attr { > - void __init omap1_i2c_mux_pins(int bus_id); > - void __init omap2_i2c_mux_pins(int bus_id); > - > -+struct omap_hwmod; > -+int omap_i2c_reset(struct omap_hwmod *oh); > -+ > - #endif /* __ASM__ARCH_OMAP_I2C_H */ > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index ce06ac6..fafdfe3 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -566,6 +566,7 @@ void omap_hwmod_ocp_barrier(struct > omap_hwmod *oh); > - > - void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); > - u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); > -+int omap_hwmod_softreset(struct omap_hwmod *oh); > - > - int omap_hwmod_count_resources(struct omap_hwmod *oh); > - int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource > *res); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP- > omap_device-Create-clkdev-entry-for-hwmod-main_.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP-omap_device-Create- > clkdev-entry-for-hwmod-main_.patch > deleted file mode 100644 > index 43a50a0..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP-omap_device- > Create-clkdev-entry-for-hwmod-main_.patch > +++ /dev/null > @@ -1,437 +0,0 @@ > -From e56d203975458c6e21c5e63711e2c34b36dc9678 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:54:12 -0600 > -Subject: [PATCH 075/149] OMAP: omap_device: Create clkdev entry for > hwmod main_clk > - > -Extend the existing function to create clkdev for every optional > -clocks to add a well one "fck" alias for the main_clk of the > -omap_hwmod. > -It will allow to remove these static clkdev entries from the > -clockXXX_data.c file. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Kevin Hilman <khilman@ti.com> > -Cc: Todd Poynor <toddpoynor@google.com> > -[paul@pwsan.com: remove all of the "fck" role clkdev aliases from the > - clock data files; fixed error message] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock2420_data.c | 22 ++++---- > - arch/arm/mach-omap2/clock2430_data.c | 32 ++++++------ > - arch/arm/mach-omap2/clock3xxx_data.c | 44 +++++++++--------- > - arch/arm/mach-omap2/clock44xx_data.c | 38 ++++++++-------- > - arch/arm/plat-omap/omap_device.c | 85 ++++++++++++++++++++--------- > ----- > - 5 files changed, 118 insertions(+), 103 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach- > omap2/clock2420_data.c > -index 2926d02..debc040 100644 > ---- a/arch/arm/mach-omap2/clock2420_data.c > -+++ b/arch/arm/mach-omap2/clock2420_data.c > -@@ -1805,9 +1805,9 @@ static struct omap_clk omap2420_clks[] = { > - CLK(NULL, "gfx_ick", &gfx_ick, CK_242X), > - /* DSS domain clocks */ > - CLK("omapdss_dss", "ick", &dss_ick, CK_242X), > -- CLK("omapdss_dss", "fck", &dss1_fck, CK_242X), > -- CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_242X), > -- CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_242X), > -+ CLK(NULL, "dss1_fck", &dss1_fck, CK_242X), > -+ CLK(NULL, "dss2_fck", &dss2_fck, CK_242X), > -+ CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_242X), > - /* L3 domain clocks */ > - CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X), > - CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X), > -@@ -1844,13 +1844,13 @@ static struct omap_clk omap2420_clks[] = { > - CLK(NULL, "gpt12_ick", &gpt12_ick, CK_242X), > - CLK(NULL, "gpt12_fck", &gpt12_fck, CK_242X), > - CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_242X), > -- CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_242X), > -+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_242X), > - CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_242X), > -- CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_242X), > -+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_242X), > - CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_242X), > -- CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_242X), > -+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_242X), > - CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_242X), > -- CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_242X), > -+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_242X), > - CLK(NULL, "uart1_ick", &uart1_ick, CK_242X), > - CLK(NULL, "uart1_fck", &uart1_fck, CK_242X), > - CLK(NULL, "uart2_ick", &uart2_ick, CK_242X), > -@@ -1860,7 +1860,7 @@ static struct omap_clk omap2420_clks[] = { > - CLK(NULL, "gpios_ick", &gpios_ick, CK_242X), > - CLK(NULL, "gpios_fck", &gpios_fck, CK_242X), > - CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_242X), > -- CLK("omap_wdt", "fck", &mpu_wdt_fck, > CK_242X), > -+ CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, > CK_242X), > - CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_242X), > - CLK(NULL, "wdt1_ick", &wdt1_ick, CK_242X), > - CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_242X), > -@@ -1880,11 +1880,11 @@ static struct omap_clk omap2420_clks[] = { > - CLK(NULL, "eac_ick", &eac_ick, CK_242X), > - CLK(NULL, "eac_fck", &eac_fck, CK_242X), > - CLK("omap_hdq.0", "ick", &hdq_ick, CK_242X), > -- CLK("omap_hdq.1", "fck", &hdq_fck, CK_242X), > -+ CLK("omap_hdq.0", "fck", &hdq_fck, CK_242X), > - CLK("omap_i2c.1", "ick", &i2c1_ick, CK_242X), > -- CLK("omap_i2c.1", "fck", &i2c1_fck, CK_242X), > -+ CLK(NULL, "i2c1_fck", &i2c1_fck, CK_242X), > - CLK("omap_i2c.2", "ick", &i2c2_ick, CK_242X), > -- CLK("omap_i2c.2", "fck", &i2c2_fck, CK_242X), > -+ CLK(NULL, "i2c2_fck", &i2c2_fck, CK_242X), > - CLK(NULL, "gpmc_fck", &gpmc_fck, CK_242X), > - CLK(NULL, "sdma_fck", &sdma_fck, CK_242X), > - CLK(NULL, "sdma_ick", &sdma_ick, CK_242X), > -diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach- > omap2/clock2430_data.c > -index 0c79d39..96a942e 100644 > ---- a/arch/arm/mach-omap2/clock2430_data.c > -+++ b/arch/arm/mach-omap2/clock2430_data.c > -@@ -1895,9 +1895,9 @@ static struct omap_clk omap2430_clks[] = { > - CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), > - /* DSS domain clocks */ > - CLK("omapdss_dss", "ick", &dss_ick, CK_243X), > -- CLK("omapdss_dss", "fck", &dss1_fck, CK_243X), > -- CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_243X), > -- CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_243X), > -+ CLK(NULL, "dss1_fck", &dss1_fck, CK_243X), > -+ CLK(NULL, "dss2_fck", &dss2_fck, CK_243X), > -+ CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X), > - /* L3 domain clocks */ > - CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X), > - CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X), > -@@ -1934,21 +1934,21 @@ static struct omap_clk omap2430_clks[] = { > - CLK(NULL, "gpt12_ick", &gpt12_ick, CK_243X), > - CLK(NULL, "gpt12_fck", &gpt12_fck, CK_243X), > - CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_243X), > -- CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_243X), > -+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_243X), > - CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_243X), > -- CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_243X), > -+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_243X), > - CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_243X), > -- CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_243X), > -+ CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_243X), > - CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_243X), > -- CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_243X), > -+ CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_243X), > - CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_243X), > -- CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_243X), > -+ CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_243X), > - CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_243X), > -- CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_243X), > -+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_243X), > - CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_243X), > -- CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_243X), > -+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_243X), > - CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_243X), > -- CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_243X), > -+ CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_243X), > - CLK(NULL, "uart1_ick", &uart1_ick, CK_243X), > - CLK(NULL, "uart1_fck", &uart1_fck, CK_243X), > - CLK(NULL, "uart2_ick", &uart2_ick, CK_243X), > -@@ -1958,7 +1958,7 @@ static struct omap_clk omap2430_clks[] = { > - CLK(NULL, "gpios_ick", &gpios_ick, CK_243X), > - CLK(NULL, "gpios_fck", &gpios_fck, CK_243X), > - CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_243X), > -- CLK("omap_wdt", "fck", &mpu_wdt_fck, > CK_243X), > -+ CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, > CK_243X), > - CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_243X), > - CLK(NULL, "wdt1_ick", &wdt1_ick, CK_243X), > - CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_243X), > -@@ -1975,9 +1975,9 @@ static struct omap_clk omap2430_clks[] = { > - CLK("omap_hdq.0", "ick", &hdq_ick, CK_243X), > - CLK("omap_hdq.1", "fck", &hdq_fck, CK_243X), > - CLK("omap_i2c.1", "ick", &i2c1_ick, CK_243X), > -- CLK("omap_i2c.1", "fck", &i2chs1_fck, CK_243X), > -+ CLK(NULL, "i2chs1_fck", &i2chs1_fck, CK_243X), > - CLK("omap_i2c.2", "ick", &i2c2_ick, CK_243X), > -- CLK("omap_i2c.2", "fck", &i2chs2_fck, CK_243X), > -+ CLK(NULL, "i2chs2_fck", &i2chs2_fck, CK_243X), > - CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X), > - CLK(NULL, "sdma_fck", &sdma_fck, CK_243X), > - CLK(NULL, "sdma_ick", &sdma_ick, CK_243X), > -@@ -1990,9 +1990,9 @@ static struct omap_clk omap2430_clks[] = { > - CLK(NULL, "usb_fck", &usb_fck, CK_243X), > - CLK("musb-omap2430", "ick", &usbhs_ick, CK_243X), > - CLK("omap_hsmmc.0", "ick", &mmchs1_ick, CK_243X), > -- CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_243X), > -+ CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_243X), > - CLK("omap_hsmmc.1", "ick", &mmchs2_ick, CK_243X), > -- CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_243X), > -+ CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_243X), > - CLK(NULL, "gpio5_ick", &gpio5_ick, CK_243X), > - CLK(NULL, "gpio5_fck", &gpio5_fck, CK_243X), > - CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, > CK_243X), > -diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach- > omap2/clock3xxx_data.c > -index 75b119b..ffd55b1 100644 > ---- a/arch/arm/mach-omap2/clock3xxx_data.c > -+++ b/arch/arm/mach-omap2/clock3xxx_data.c > -@@ -3289,25 +3289,25 @@ static struct omap_clk omap3xxx_clks[] = { > - CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, > CK_3XXX), > - CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, > CK_3XXX), > - CLK(NULL, "core_96m_fck", &core_96m_fck, > CK_3XXX), > -- CLK("omap_hsmmc.2", "fck", &mmchs3_fck, CK_3430ES2PLUS | > CK_AM35XX | CK_36XX), > -- CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_3XXX), > -+ CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | > CK_AM35XX | CK_36XX), > -+ CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), > - CLK(NULL, "mspro_fck", &mspro_fck, CK_34XX | CK_36XX), > -- CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_3XXX), > -- CLK("omap_i2c.3", "fck", &i2c3_fck, CK_3XXX), > -- CLK("omap_i2c.2", "fck", &i2c2_fck, CK_3XXX), > -- CLK("omap_i2c.1", "fck", &i2c1_fck, CK_3XXX), > -- CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_3XXX), > -- CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_3XXX), > -+ CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_3XXX), > -+ CLK(NULL, "i2c3_fck", &i2c3_fck, CK_3XXX), > -+ CLK(NULL, "i2c2_fck", &i2c2_fck, CK_3XXX), > -+ CLK(NULL, "i2c1_fck", &i2c1_fck, CK_3XXX), > -+ CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_3XXX), > -+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_3XXX), > - CLK(NULL, "core_48m_fck", &core_48m_fck, > CK_3XXX), > -- CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_3XXX), > -- CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_3XXX), > -- CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_3XXX), > -- CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_3XXX), > -+ CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_3XXX), > -+ CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_3XXX), > -+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_3XXX), > -+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_3XXX), > - CLK(NULL, "uart2_fck", &uart2_fck, CK_3XXX), > - CLK(NULL, "uart1_fck", &uart1_fck, CK_3XXX), > - CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), > - CLK(NULL, "core_12m_fck", &core_12m_fck, > CK_3XXX), > -- CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), > -+ CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), > - CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, > CK_3430ES1), > - CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, > CK_3430ES2PLUS | CK_36XX), > - CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, > CK_3430ES1), > -@@ -3356,11 +3356,11 @@ static struct omap_clk omap3xxx_clks[] = { > - CLK("omap_rng", "ick", &rng_ick, CK_34XX | > CK_36XX), > - CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX), > - CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX), > -- CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es1, > CK_3430ES1), > -- CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es2, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > -- CLK("omapdss_dss", "tv_clk", &dss_tv_fck, CK_3XXX), > -- CLK("omapdss_dss", "video_clk", &dss_96m_fck, CK_3XXX), > -- CLK("omapdss_dss", "sys_clk", &dss2_alwon_fck, CK_3XXX), > -+ CLK(NULL, "dss1_alwon_fck", > &dss1_alwon_fck_3430es1, CK_3430ES1), > -+ CLK(NULL, "dss1_alwon_fck", > &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | > CK_36XX), > -+ CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_3XXX), > -+ CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_3XXX), > -+ CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_3XXX), > - CLK("omapdss_dss", "ick", &dss_ick_3430es1, > CK_3430ES1), > - CLK("omapdss_dss", "ick", &dss_ick_3430es2, > CK_3430ES2PLUS | CK_AM35XX | CK_36XX), > - CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX), > -@@ -3385,7 +3385,7 @@ static struct omap_clk omap3xxx_clks[] = { > - CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), > - CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, > CK_3XXX), > - CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_3XXX), > -- CLK("omap_wdt", "fck", &wdt2_fck, CK_3XXX), > -+ CLK(NULL, "wdt2_fck", &wdt2_fck, CK_3XXX), > - CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_34XX | CK_36XX), > - CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2PLUS | > CK_36XX), > - CLK("omap_wdt", "ick", &wdt2_ick, CK_3XXX), > -@@ -3436,9 +3436,9 @@ static struct omap_clk omap3xxx_clks[] = { > - CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_3XXX), > - CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_3XXX), > - CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_3XXX), > -- CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_3XXX), > -- CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_3XXX), > -- CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_3XXX), > -+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_3XXX), > -+ CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_3XXX), > -+ CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_3XXX), > - CLK("etb", "emu_src_ck", &emu_src_ck, CK_3XXX), > - CLK(NULL, "pclk_fck", &pclk_fck, CK_3XXX), > - CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_3XXX), > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 2578820..763507f 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -3057,12 +3057,12 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "gpio6_ick", &gpio6_ick, > CK_443X), > - CLK(NULL, "gpmc_ick", &gpmc_ick, > CK_443X), > - CLK(NULL, "gpu_fck", &gpu_fck, > CK_443X), > -- CLK("omap2_hdq.0", "fck", &hdq1w_fck, > CK_443X), > -+ CLK(NULL, "hdq1w_fck", &hdq1w_fck, > CK_443X), > - CLK(NULL, "hsi_fck", &hsi_fck, > CK_443X), > -- CLK("omap_i2c.1", "fck", &i2c1_fck, > CK_443X), > -- CLK("omap_i2c.2", "fck", &i2c2_fck, > CK_443X), > -- CLK("omap_i2c.3", "fck", &i2c3_fck, > CK_443X), > -- CLK("omap_i2c.4", "fck", &i2c4_fck, > CK_443X), > -+ CLK(NULL, "i2c1_fck", &i2c1_fck, > CK_443X), > -+ CLK(NULL, "i2c2_fck", &i2c2_fck, > CK_443X), > -+ CLK(NULL, "i2c3_fck", &i2c3_fck, > CK_443X), > -+ CLK(NULL, "i2c4_fck", &i2c4_fck, > CK_443X), > - CLK(NULL, "ipu_fck", &ipu_fck, > CK_443X), > - CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, > CK_443X), > - CLK(NULL, "iss_fck", &iss_fck, > CK_443X), > -@@ -3073,23 +3073,23 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "mcasp_sync_mux_ck", > &mcasp_sync_mux_ck, CK_443X), > - CLK(NULL, "mcasp_fck", &mcasp_fck, > CK_443X), > - CLK(NULL, "mcbsp1_sync_mux_ck", > &mcbsp1_sync_mux_ck, CK_443X), > -- CLK("omap-mcbsp.1", "fck", > &mcbsp1_fck, CK_443X), > -+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, > CK_443X), > - CLK(NULL, "mcbsp2_sync_mux_ck", > &mcbsp2_sync_mux_ck, CK_443X), > -- CLK("omap-mcbsp.2", "fck", > &mcbsp2_fck, CK_443X), > -+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, > CK_443X), > - CLK(NULL, "mcbsp3_sync_mux_ck", > &mcbsp3_sync_mux_ck, CK_443X), > -- CLK("omap-mcbsp.3", "fck", > &mcbsp3_fck, CK_443X), > -+ CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, > CK_443X), > - CLK(NULL, "mcbsp4_sync_mux_ck", > &mcbsp4_sync_mux_ck, CK_443X), > -- CLK("omap-mcbsp.4", "fck", > &mcbsp4_fck, CK_443X), > -+ CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, > CK_443X), > - CLK(NULL, "mcpdm_fck", &mcpdm_fck, > CK_443X), > -- CLK("omap2_mcspi.1", "fck", &mcspi1_fck, > CK_443X), > -- CLK("omap2_mcspi.2", "fck", &mcspi2_fck, > CK_443X), > -- CLK("omap2_mcspi.3", "fck", &mcspi3_fck, > CK_443X), > -- CLK("omap2_mcspi.4", "fck", &mcspi4_fck, > CK_443X), > -- CLK("omap_hsmmc.0", "fck", &mmc1_fck, > CK_443X), > -- CLK("omap_hsmmc.1", "fck", &mmc2_fck, > CK_443X), > -- CLK("omap_hsmmc.2", "fck", &mmc3_fck, > CK_443X), > -- CLK("omap_hsmmc.3", "fck", &mmc4_fck, > CK_443X), > -- CLK("omap_hsmmc.4", "fck", &mmc5_fck, > CK_443X), > -+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, > CK_443X), > -+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, > CK_443X), > -+ CLK(NULL, "mcspi3_fck", &mcspi3_fck, > CK_443X), > -+ CLK(NULL, "mcspi4_fck", &mcspi4_fck, > CK_443X), > -+ CLK(NULL, "mmc1_fck", &mmc1_fck, > CK_443X), > -+ CLK(NULL, "mmc2_fck", &mmc2_fck, > CK_443X), > -+ CLK(NULL, "mmc3_fck", &mmc3_fck, > CK_443X), > -+ CLK(NULL, "mmc4_fck", &mmc4_fck, > CK_443X), > -+ CLK(NULL, "mmc5_fck", &mmc5_fck, > CK_443X), > - CLK(NULL, "ocp2scp_usb_phy_phy_48m", > &ocp2scp_usb_phy_phy_48m, CK_443X), > - CLK(NULL, "ocp2scp_usb_phy_ick", > &ocp2scp_usb_phy_ick, CK_443X), > - CLK(NULL, "ocp_wp_noc_ick", &ocp_wp_noc_ick, > CK_443X), > -@@ -3146,7 +3146,7 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "usim_ck", &usim_ck, > CK_443X), > - CLK(NULL, "usim_fclk", &usim_fclk, > CK_443X), > - CLK(NULL, "usim_fck", &usim_fck, > CK_443X), > -- CLK("omap_wdt", "fck", > &wd_timer2_fck, CK_443X), > -+ CLK(NULL, "wd_timer2_fck", &wd_timer2_fck, > CK_443X), > - CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, > CK_443X), > - CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, > CK_443X), > - CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, > CK_443X), > -diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat- > omap/omap_device.c > -index c8b9cd1..be45147 100644 > ---- a/arch/arm/plat-omap/omap_device.c > -+++ b/arch/arm/plat-omap/omap_device.c > -@@ -236,56 +236,71 @@ static int _omap_device_deactivate(struct > omap_device *od, u8 ignore_lat) > - return 0; > - } > - > -+static void _add_clkdev(struct omap_device *od, const char *clk_alias, > -+ const char *clk_name) > -+{ > -+ struct clk *r; > -+ struct clk_lookup *l; > -+ > -+ if (!clk_alias || !clk_name) > -+ return; > -+ > -+ pr_debug("omap_device: %s: Creating %s -> %s\n", > -+ dev_name(&od->pdev.dev), clk_alias, clk_name); > -+ > -+ r = clk_get_sys(dev_name(&od->pdev.dev), clk_alias); > -+ if (!IS_ERR(r)) { > -+ pr_warning("omap_device: %s: alias %s already exists\n", > -+ dev_name(&od->pdev.dev), clk_alias); > -+ clk_put(r); > -+ return; > -+ } > -+ > -+ r = omap_clk_get_by_name(clk_name); > -+ if (IS_ERR(r)) { > -+ pr_err("omap_device: %s: omap_clk_get_by_name for %s > failed\n", > -+ dev_name(&od->pdev.dev), clk_name); > -+ return; > -+ } > -+ > -+ l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev.dev)); > -+ if (!l) { > -+ pr_err("omap_device: %s: clkdev_alloc for %s failed\n", > -+ dev_name(&od->pdev.dev), clk_alias); > -+ return; > -+ } > -+ > -+ clkdev_add(l); > -+} > -+ > - /** > -- * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks > -+ * _add_hwmod_clocks_clkdev - Add clkdev entry for hwmod optional clocks > -+ * and main clock > - * @od: struct omap_device *od > -+ * @oh: struct omap_hwmod *oh > - * > -- * For every optional clock present per hwmod per omap_device, this function > -- * adds an entry in the clkdev table of the form <dev-id=dev_name, con- > id=role> > -- * if it does not exist already. > -+ * For the main clock and every optional clock present per hwmod per > -+ * omap_device, this function adds an entry in the clkdev table of the > -+ * form <dev-id=dev_name, con-id=role> if it does not exist already. > - * > - * The function is called from inside omap_device_build_ss(), after > - * omap_device_register. > - * > - * This allows drivers to get a pointer to its optional clocks based on its role > - * by calling clk_get(<dev*>, <role>). > -+ * In the case of the main clock, a "fck" alias is used. > - * > - * No return value. > - */ > --static void _add_optional_clock_clkdev(struct omap_device *od, > -- struct omap_hwmod *oh) > -+static void _add_hwmod_clocks_clkdev(struct omap_device *od, > -+ struct omap_hwmod *oh) > - { > - int i; > - > -- for (i = 0; i < oh->opt_clks_cnt; i++) { > -- struct omap_hwmod_opt_clk *oc; > -- struct clk *r; > -- struct clk_lookup *l; > -- > -- oc = &oh->opt_clks[i]; > -- > -- if (!oc->_clk) > -- continue; > -- > -- r = clk_get_sys(dev_name(&od->pdev.dev), oc->role); > -- if (!IS_ERR(r)) > -- continue; /* clkdev entry exists */ > -+ _add_clkdev(od, "fck", oh->main_clk); > - > -- r = omap_clk_get_by_name((char *)oc->clk); > -- if (IS_ERR(r)) { > -- pr_err("omap_device: %s: omap_clk_get_by_name > for %s failed\n", > -- dev_name(&od->pdev.dev), oc->clk); > -- continue; > -- } > -- > -- l = clkdev_alloc(r, oc->role, dev_name(&od->pdev.dev)); > -- if (!l) { > -- pr_err("omap_device: %s: clkdev_alloc for %s > failed\n", > -- dev_name(&od->pdev.dev), oc->role); > -- return; > -- } > -- clkdev_add(l); > -- } > -+ for (i = 0; i < oh->opt_clks_cnt; i++) > -+ _add_clkdev(od, oh->opt_clks[i].role, oh->opt_clks[i].clk); > - } > - > - > -@@ -492,7 +507,7 @@ struct omap_device *omap_device_build_ss(const > char *pdev_name, int pdev_id, > - > - for (i = 0; i < oh_cnt; i++) { > - hwmods[i]->od = od; > -- _add_optional_clock_clkdev(od, hwmods[i]); > -+ _add_hwmod_clocks_clkdev(od, hwmods[i]); > - } > - > - if (ret) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0076-OMAP4-clock- > data-Add-missing-divider-selection-for-a.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection- > for-a.patch > deleted file mode 100644 > index 066cc55..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0076-OMAP4-clock-data- > Add-missing-divider-selection-for-a.patch > +++ /dev/null > @@ -1,292 +0,0 @@ > -From 3e03bae4fc1f9b6e413af3c3e65766913049ffa0 Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Sun, 10 Jul 2011 05:56:14 -0600 > -Subject: [PATCH 076/149] OMAP4: clock data: Add missing divider selection for > auxclks > - > -On OMAP4 the auxclk nodes (part of SCRM) support both > -divider as well as parent selection. > -Supporting this requires splitting the existing nodes > -(which support only parent selection) into two nodes, > -one for parent and another for divider selection. > -The nodes for parent selection are named auxclk*_src_ck > -and the ones for divider selection as auxclk*_ck. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -[b-cousson@ti.com: Rebase on top of clock cleanup > -and autogen alignement] > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 176 > +++++++++++++++++++++++++++++----- > - 1 files changed, 152 insertions(+), 24 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 763507f..07bf0de 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -2774,19 +2774,39 @@ static struct clk trace_clk_div_ck = { > - > - /* SCRM aux clk nodes */ > - > --static const struct clksel auxclk_sel[] = { > -+static const struct clksel auxclk_src_sel[] = { > - { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, > - { .parent = &dpll_core_m3x2_ck, .rates = div_1_1_rates }, > - { .parent = &dpll_per_m3x2_ck, .rates = div_1_2_rates }, > - { .parent = NULL }, > - }; > - > --static struct clk auxclk0_ck = { > -- .name = "auxclk0_ck", > -+static const struct clksel_rate div16_1to16_rates[] = { > -+ { .div = 1, .val = 0, .flags = RATE_IN_4430 }, > -+ { .div = 2, .val = 1, .flags = RATE_IN_4430 }, > -+ { .div = 3, .val = 2, .flags = RATE_IN_4430 }, > -+ { .div = 4, .val = 3, .flags = RATE_IN_4430 }, > -+ { .div = 5, .val = 4, .flags = RATE_IN_4430 }, > -+ { .div = 6, .val = 5, .flags = RATE_IN_4430 }, > -+ { .div = 7, .val = 6, .flags = RATE_IN_4430 }, > -+ { .div = 8, .val = 7, .flags = RATE_IN_4430 }, > -+ { .div = 9, .val = 8, .flags = RATE_IN_4430 }, > -+ { .div = 10, .val = 9, .flags = RATE_IN_4430 }, > -+ { .div = 11, .val = 10, .flags = RATE_IN_4430 }, > -+ { .div = 12, .val = 11, .flags = RATE_IN_4430 }, > -+ { .div = 13, .val = 12, .flags = RATE_IN_4430 }, > -+ { .div = 14, .val = 13, .flags = RATE_IN_4430 }, > -+ { .div = 15, .val = 14, .flags = RATE_IN_4430 }, > -+ { .div = 16, .val = 15, .flags = RATE_IN_4430 }, > -+ { .div = 0 }, > -+}; > -+ > -+static struct clk auxclk0_src_ck = { > -+ .name = "auxclk0_src_ck", > - .parent = &sys_clkin_ck, > - .init = &omap2_init_clksel_parent, > - .ops = &clkops_omap2_dflt, > -- .clksel = auxclk_sel, > -+ .clksel = auxclk_src_sel, > - .clksel_reg = OMAP4_SCRM_AUXCLK0, > - .clksel_mask = OMAP4_SRCSELECT_MASK, > - .recalc = &omap2_clksel_recalc, > -@@ -2794,12 +2814,29 @@ static struct clk auxclk0_ck = { > - .enable_bit = OMAP4_ENABLE_SHIFT, > - }; > - > --static struct clk auxclk1_ck = { > -- .name = "auxclk1_ck", > -+static const struct clksel auxclk0_sel[] = { > -+ { .parent = &auxclk0_src_ck, .rates = div16_1to16_rates }, > -+ { .parent = NULL }, > -+}; > -+ > -+static struct clk auxclk0_ck = { > -+ .name = "auxclk0_ck", > -+ .parent = &auxclk0_src_ck, > -+ .clksel = auxclk0_sel, > -+ .clksel_reg = OMAP4_SCRM_AUXCLK0, > -+ .clksel_mask = OMAP4_CLKDIV_MASK, > -+ .ops = &clkops_null, > -+ .recalc = &omap2_clksel_recalc, > -+ .round_rate = &omap2_clksel_round_rate, > -+ .set_rate = &omap2_clksel_set_rate, > -+}; > -+ > -+static struct clk auxclk1_src_ck = { > -+ .name = "auxclk1_src_ck", > - .parent = &sys_clkin_ck, > - .init = &omap2_init_clksel_parent, > - .ops = &clkops_omap2_dflt, > -- .clksel = auxclk_sel, > -+ .clksel = auxclk_src_sel, > - .clksel_reg = OMAP4_SCRM_AUXCLK1, > - .clksel_mask = OMAP4_SRCSELECT_MASK, > - .recalc = &omap2_clksel_recalc, > -@@ -2807,12 +2844,29 @@ static struct clk auxclk1_ck = { > - .enable_bit = OMAP4_ENABLE_SHIFT, > - }; > - > --static struct clk auxclk2_ck = { > -- .name = "auxclk2_ck", > -+static const struct clksel auxclk1_sel[] = { > -+ { .parent = &auxclk1_src_ck, .rates = div16_1to16_rates }, > -+ { .parent = NULL }, > -+}; > -+ > -+static struct clk auxclk1_ck = { > -+ .name = "auxclk1_ck", > -+ .parent = &auxclk1_src_ck, > -+ .clksel = auxclk1_sel, > -+ .clksel_reg = OMAP4_SCRM_AUXCLK1, > -+ .clksel_mask = OMAP4_CLKDIV_MASK, > -+ .ops = &clkops_null, > -+ .recalc = &omap2_clksel_recalc, > -+ .round_rate = &omap2_clksel_round_rate, > -+ .set_rate = &omap2_clksel_set_rate, > -+}; > -+ > -+static struct clk auxclk2_src_ck = { > -+ .name = "auxclk2_src_ck", > - .parent = &sys_clkin_ck, > - .init = &omap2_init_clksel_parent, > - .ops = &clkops_omap2_dflt, > -- .clksel = auxclk_sel, > -+ .clksel = auxclk_src_sel, > - .clksel_reg = OMAP4_SCRM_AUXCLK2, > - .clksel_mask = OMAP4_SRCSELECT_MASK, > - .recalc = &omap2_clksel_recalc, > -@@ -2820,12 +2874,29 @@ static struct clk auxclk2_ck = { > - .enable_bit = OMAP4_ENABLE_SHIFT, > - }; > - > --static struct clk auxclk3_ck = { > -- .name = "auxclk3_ck", > -+static const struct clksel auxclk2_sel[] = { > -+ { .parent = &auxclk2_src_ck, .rates = div16_1to16_rates }, > -+ { .parent = NULL }, > -+}; > -+ > -+static struct clk auxclk2_ck = { > -+ .name = "auxclk2_ck", > -+ .parent = &auxclk2_src_ck, > -+ .clksel = auxclk2_sel, > -+ .clksel_reg = OMAP4_SCRM_AUXCLK2, > -+ .clksel_mask = OMAP4_CLKDIV_MASK, > -+ .ops = &clkops_null, > -+ .recalc = &omap2_clksel_recalc, > -+ .round_rate = &omap2_clksel_round_rate, > -+ .set_rate = &omap2_clksel_set_rate, > -+}; > -+ > -+static struct clk auxclk3_src_ck = { > -+ .name = "auxclk3_src_ck", > - .parent = &sys_clkin_ck, > - .init = &omap2_init_clksel_parent, > - .ops = &clkops_omap2_dflt, > -- .clksel = auxclk_sel, > -+ .clksel = auxclk_src_sel, > - .clksel_reg = OMAP4_SCRM_AUXCLK3, > - .clksel_mask = OMAP4_SRCSELECT_MASK, > - .recalc = &omap2_clksel_recalc, > -@@ -2833,12 +2904,29 @@ static struct clk auxclk3_ck = { > - .enable_bit = OMAP4_ENABLE_SHIFT, > - }; > - > --static struct clk auxclk4_ck = { > -- .name = "auxclk4_ck", > -+static const struct clksel auxclk3_sel[] = { > -+ { .parent = &auxclk3_src_ck, .rates = div16_1to16_rates }, > -+ { .parent = NULL }, > -+}; > -+ > -+static struct clk auxclk3_ck = { > -+ .name = "auxclk3_ck", > -+ .parent = &auxclk3_src_ck, > -+ .clksel = auxclk3_sel, > -+ .clksel_reg = OMAP4_SCRM_AUXCLK3, > -+ .clksel_mask = OMAP4_CLKDIV_MASK, > -+ .ops = &clkops_null, > -+ .recalc = &omap2_clksel_recalc, > -+ .round_rate = &omap2_clksel_round_rate, > -+ .set_rate = &omap2_clksel_set_rate, > -+}; > -+ > -+static struct clk auxclk4_src_ck = { > -+ .name = "auxclk4_src_ck", > - .parent = &sys_clkin_ck, > - .init = &omap2_init_clksel_parent, > - .ops = &clkops_omap2_dflt, > -- .clksel = auxclk_sel, > -+ .clksel = auxclk_src_sel, > - .clksel_reg = OMAP4_SCRM_AUXCLK4, > - .clksel_mask = OMAP4_SRCSELECT_MASK, > - .recalc = &omap2_clksel_recalc, > -@@ -2846,12 +2934,29 @@ static struct clk auxclk4_ck = { > - .enable_bit = OMAP4_ENABLE_SHIFT, > - }; > - > --static struct clk auxclk5_ck = { > -- .name = "auxclk5_ck", > -+static const struct clksel auxclk4_sel[] = { > -+ { .parent = &auxclk4_src_ck, .rates = div16_1to16_rates }, > -+ { .parent = NULL }, > -+}; > -+ > -+static struct clk auxclk4_ck = { > -+ .name = "auxclk4_ck", > -+ .parent = &auxclk4_src_ck, > -+ .clksel = auxclk4_sel, > -+ .clksel_reg = OMAP4_SCRM_AUXCLK4, > -+ .clksel_mask = OMAP4_CLKDIV_MASK, > -+ .ops = &clkops_null, > -+ .recalc = &omap2_clksel_recalc, > -+ .round_rate = &omap2_clksel_round_rate, > -+ .set_rate = &omap2_clksel_set_rate, > -+}; > -+ > -+static struct clk auxclk5_src_ck = { > -+ .name = "auxclk5_src_ck", > - .parent = &sys_clkin_ck, > - .init = &omap2_init_clksel_parent, > - .ops = &clkops_omap2_dflt, > -- .clksel = auxclk_sel, > -+ .clksel = auxclk_src_sel, > - .clksel_reg = OMAP4_SCRM_AUXCLK5, > - .clksel_mask = OMAP4_SRCSELECT_MASK, > - .recalc = &omap2_clksel_recalc, > -@@ -2859,6 +2964,23 @@ static struct clk auxclk5_ck = { > - .enable_bit = OMAP4_ENABLE_SHIFT, > - }; > - > -+static const struct clksel auxclk5_sel[] = { > -+ { .parent = &auxclk5_src_ck, .rates = div16_1to16_rates }, > -+ { .parent = NULL }, > -+}; > -+ > -+static struct clk auxclk5_ck = { > -+ .name = "auxclk5_ck", > -+ .parent = &auxclk5_src_ck, > -+ .clksel = auxclk5_sel, > -+ .clksel_reg = OMAP4_SCRM_AUXCLK5, > -+ .clksel_mask = OMAP4_CLKDIV_MASK, > -+ .ops = &clkops_null, > -+ .recalc = &omap2_clksel_recalc, > -+ .round_rate = &omap2_clksel_round_rate, > -+ .set_rate = &omap2_clksel_set_rate, > -+}; > -+ > - static const struct clksel auxclkreq_sel[] = { > - { .parent = &auxclk0_ck, .rates = div_1_0_rates }, > - { .parent = &auxclk1_ck, .rates = div_1_1_rates }, > -@@ -3150,17 +3272,23 @@ static struct omap_clk omap44xx_clks[] = { > - CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, > CK_443X), > - CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, > CK_443X), > - CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, > CK_443X), > -+ CLK(NULL, "auxclk0_src_ck", &auxclk0_src_ck, > CK_443X), > - CLK(NULL, "auxclk0_ck", &auxclk0_ck, > CK_443X), > -- CLK(NULL, "auxclk1_ck", &auxclk1_ck, > CK_443X), > -- CLK(NULL, "auxclk2_ck", &auxclk2_ck, > CK_443X), > -- CLK(NULL, "auxclk3_ck", &auxclk3_ck, > CK_443X), > -- CLK(NULL, "auxclk4_ck", &auxclk4_ck, > CK_443X), > -- CLK(NULL, "auxclk5_ck", &auxclk5_ck, > CK_443X), > - CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, > CK_443X), > -+ CLK(NULL, "auxclk1_src_ck", &auxclk1_src_ck, > CK_443X), > -+ CLK(NULL, "auxclk1_ck", &auxclk1_ck, > CK_443X), > - CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, > CK_443X), > -+ CLK(NULL, "auxclk2_src_ck", &auxclk2_src_ck, > CK_443X), > -+ CLK(NULL, "auxclk2_ck", &auxclk2_ck, > CK_443X), > - CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, > CK_443X), > -+ CLK(NULL, "auxclk3_src_ck", &auxclk3_src_ck, > CK_443X), > -+ CLK(NULL, "auxclk3_ck", &auxclk3_ck, > CK_443X), > - CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, > CK_443X), > -+ CLK(NULL, "auxclk4_src_ck", &auxclk4_src_ck, > CK_443X), > -+ CLK(NULL, "auxclk4_ck", &auxclk4_ck, > CK_443X), > - CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, > CK_443X), > -+ CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, > CK_443X), > -+ CLK(NULL, "auxclk5_ck", &auxclk5_ck, > CK_443X), > - CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, > CK_443X), > - CLK(NULL, "gpmc_ck", &dummy_ck, > CK_443X), > - CLK(NULL, "gpt1_ick", &dummy_ck, > CK_443X), > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0077-OMAP4- > hwmod-data-Add-clock-domain-attribute.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain- > attribute.patch > deleted file mode 100644 > index f13d839..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0077-OMAP4-hwmod- > data-Add-clock-domain-attribute.patch > +++ /dev/null > @@ -1,724 +0,0 @@ > -From 67101af593a16acf5d5d924f2746cc221d0360d1 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:29 -0600 > -Subject: [PATCH 077/149] OMAP4: hwmod data: Add clock domain attribute > - > -In OMAP PRCM terminology, the clock domain is defined as a group of IPs > -that share some clocks and most of the time an interface clock. > -Every IP does belong to a clockdomain. > -For the moment the clock domain attribute is affected to a clock node. > -The issue with that approach, is that a clock might or not belong to a > -clock domain. Moreover during module transition, it is up to a module > -to handle properly the clock domain state and not to a clock node. > - > -Create a clkdm_name attribute to provide this information per hwmod. > - > -Populate this attribute for every OMAP4 hwmod entries. > - > -Future cleanup series with remove that information from the OMAP4 clock > -when it is relevant. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -[paul@pwsan.com: fix the mpuss_clkdm name] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 85 > +++++++++++++++++++++++++- > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + > - 3 files changed, 85 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c > b/arch/arm/mach-omap2/clockdomains44xx_data.c > -index 66090f2..dccc651 100644 > ---- a/arch/arm/mach-omap2/clockdomains44xx_data.c > -+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c > -@@ -565,7 +565,7 @@ static struct clockdomain ducati_44xx_clkdm = { > - }; > - > - static struct clockdomain mpu_44xx_clkdm = { > -- .name = "mpu_clkdm", > -+ .name = "mpuss_clkdm", > - .pwrdm = { .name = "mpu_pwrdm" }, > - .prcm_partition = OMAP4430_CM1_PARTITION, > - .cm_inst = OMAP4430_CM1_MPU_INST, > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 5d5df49..becae45 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -123,9 +123,10 @@ static struct omap_hwmod_ocp_if > *omap44xx_dmm_slaves[] = { > - static struct omap_hwmod omap44xx_dmm_hwmod = { > - .name = "dmm", > - .class = &omap44xx_dmm_hwmod_class, > -- .mpu_irqs = omap44xx_dmm_irqs, > -+ .clkdm_name = "l3_emif_clkdm", > - .slaves = omap44xx_dmm_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), > -+ .mpu_irqs = omap44xx_dmm_irqs, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > - }; > - > -@@ -173,6 +174,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_emif_fw_slaves[] = { > - static struct omap_hwmod omap44xx_emif_fw_hwmod = { > - .name = "emif_fw", > - .class = &omap44xx_emif_fw_hwmod_class, > -+ .clkdm_name = "l3_emif_clkdm", > - .slaves = omap44xx_emif_fw_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -212,6 +214,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_l3_instr_slaves[] = { > - static struct omap_hwmod omap44xx_l3_instr_hwmod = { > - .name = "l3_instr", > - .class = &omap44xx_l3_hwmod_class, > -+ .clkdm_name = "l3_instr_clkdm", > - .slaves = omap44xx_l3_instr_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -304,6 +307,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_l3_main_1_slaves[] = { > - static struct omap_hwmod omap44xx_l3_main_1_hwmod = { > - .name = "l3_main_1", > - .class = &omap44xx_l3_hwmod_class, > -+ .clkdm_name = "l3_1_clkdm", > - .mpu_irqs = omap44xx_l3_main_1_irqs, > - .slaves = omap44xx_l3_main_1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), > -@@ -400,6 +404,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_l3_main_2_slaves[] = { > - static struct omap_hwmod omap44xx_l3_main_2_hwmod = { > - .name = "l3_main_2", > - .class = &omap44xx_l3_hwmod_class, > -+ .clkdm_name = "l3_2_clkdm", > - .slaves = omap44xx_l3_main_2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -450,6 +455,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_l3_main_3_slaves[] = { > - static struct omap_hwmod omap44xx_l3_main_3_hwmod = { > - .name = "l3_main_3", > - .class = &omap44xx_l3_hwmod_class, > -+ .clkdm_name = "l3_instr_clkdm", > - .slaves = omap44xx_l3_main_3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -507,6 +513,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_l4_abe_slaves[] = { > - static struct omap_hwmod omap44xx_l4_abe_hwmod = { > - .name = "l4_abe", > - .class = &omap44xx_l4_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .slaves = omap44xx_l4_abe_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -529,6 +536,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_l4_cfg_slaves[] = { > - static struct omap_hwmod omap44xx_l4_cfg_hwmod = { > - .name = "l4_cfg", > - .class = &omap44xx_l4_hwmod_class, > -+ .clkdm_name = "l4_cfg_clkdm", > - .slaves = omap44xx_l4_cfg_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -551,6 +559,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_l4_per_slaves[] = { > - static struct omap_hwmod omap44xx_l4_per_hwmod = { > - .name = "l4_per", > - .class = &omap44xx_l4_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .slaves = omap44xx_l4_per_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -573,6 +582,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_l4_wkup_slaves[] = { > - static struct omap_hwmod omap44xx_l4_wkup_hwmod = { > - .name = "l4_wkup", > - .class = &omap44xx_l4_hwmod_class, > -+ .clkdm_name = "l4_wkup_clkdm", > - .slaves = omap44xx_l4_wkup_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -603,6 +613,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mpu_private_slaves[] = { > - static struct omap_hwmod omap44xx_mpu_private_hwmod = { > - .name = "mpu_private", > - .class = &omap44xx_mpu_bus_hwmod_class, > -+ .clkdm_name = "mpuss_clkdm", > - .slaves = omap44xx_mpu_private_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -741,6 +752,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_aess_slaves[] = { > - static struct omap_hwmod omap44xx_aess_hwmod = { > - .name = "aess", > - .class = &omap44xx_aess_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_aess_irqs, > - .sdma_reqs = omap44xx_aess_sdma_reqs, > - .main_clk = "aess_fck", > -@@ -773,6 +785,7 @@ static struct omap_hwmod_opt_clk > bandgap_opt_clks[] = { > - static struct omap_hwmod omap44xx_bandgap_hwmod = { > - .name = "bandgap", > - .class = &omap44xx_bandgap_hwmod_class, > -+ .clkdm_name = "l4_wkup_clkdm", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, > -@@ -830,6 +843,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_counter_32k_slaves[] = { > - static struct omap_hwmod omap44xx_counter_32k_hwmod = { > - .name = "counter_32k", > - .class = &omap44xx_counter_hwmod_class, > -+ .clkdm_name = "l4_wkup_clkdm", > - .flags = HWMOD_SWSUP_SIDLE, > - .main_clk = "sys_32k_ck", > - .prcm = { > -@@ -913,6 +927,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_dma_system_slaves[] = { > - static struct omap_hwmod omap44xx_dma_system_hwmod = { > - .name = "dma_system", > - .class = &omap44xx_dma_hwmod_class, > -+ .clkdm_name = "l3_dma_clkdm", > - .mpu_irqs = omap44xx_dma_system_irqs, > - .main_clk = "l3_div_ck", > - .prcm = { > -@@ -1005,6 +1020,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_dmic_slaves[] = { > - static struct omap_hwmod omap44xx_dmic_hwmod = { > - .name = "dmic", > - .class = &omap44xx_dmic_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_dmic_irqs, > - .sdma_reqs = omap44xx_dmic_sdma_reqs, > - .main_clk = "dmic_fck", > -@@ -1072,6 +1088,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_dsp_slaves[] = { > - static struct omap_hwmod omap44xx_dsp_c0_hwmod = { > - .name = "dsp_c0", > - .class = &omap44xx_dsp_hwmod_class, > -+ .clkdm_name = "tesla_clkdm", > - .flags = HWMOD_INIT_NO_RESET, > - .rst_lines = omap44xx_dsp_c0_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), > -@@ -1086,6 +1103,7 @@ static struct omap_hwmod > omap44xx_dsp_c0_hwmod = { > - static struct omap_hwmod omap44xx_dsp_hwmod = { > - .name = "dsp", > - .class = &omap44xx_dsp_hwmod_class, > -+ .clkdm_name = "tesla_clkdm", > - .mpu_irqs = omap44xx_dsp_irqs, > - .rst_lines = omap44xx_dsp_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), > -@@ -1177,6 +1195,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] > = { > - static struct omap_hwmod omap44xx_dss_hwmod = { > - .name = "dss_core", > - .class = &omap44xx_dss_hwmod_class, > -+ .clkdm_name = "l3_dss_clkdm", > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -@@ -1278,7 +1297,7 @@ static struct omap_hwmod_opt_clk > dss_dispc_opt_clks[] = { > - static struct omap_hwmod omap44xx_dss_dispc_hwmod = { > - .name = "dss_dispc", > - .class = &omap44xx_dispc_hwmod_class, > -- .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > -+ .clkdm_name = "l3_dss_clkdm", > - .mpu_irqs = omap44xx_dss_dispc_irqs, > - .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, > - .main_clk = "dss_dss_clk", > -@@ -1376,6 +1395,7 @@ static struct omap_hwmod_opt_clk > dss_dsi1_opt_clks[] = { > - static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { > - .name = "dss_dsi1", > - .class = &omap44xx_dsi_hwmod_class, > -+ .clkdm_name = "l3_dss_clkdm", > - .mpu_irqs = omap44xx_dss_dsi1_irqs, > - .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, > - .main_clk = "dss_dss_clk", > -@@ -1452,6 +1472,7 @@ static struct omap_hwmod_opt_clk > dss_dsi2_opt_clks[] = { > - static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { > - .name = "dss_dsi2", > - .class = &omap44xx_dsi_hwmod_class, > -+ .clkdm_name = "l3_dss_clkdm", > - .mpu_irqs = omap44xx_dss_dsi2_irqs, > - .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, > - .main_clk = "dss_dss_clk", > -@@ -1548,6 +1569,7 @@ static struct omap_hwmod_opt_clk > dss_hdmi_opt_clks[] = { > - static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { > - .name = "dss_hdmi", > - .class = &omap44xx_hdmi_hwmod_class, > -+ .clkdm_name = "l3_dss_clkdm", > - .mpu_irqs = omap44xx_dss_hdmi_irqs, > - .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, > - .main_clk = "dss_dss_clk", > -@@ -1639,6 +1661,7 @@ static struct omap_hwmod_opt_clk > dss_rfbi_opt_clks[] = { > - static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { > - .name = "dss_rfbi", > - .class = &omap44xx_rfbi_hwmod_class, > -+ .clkdm_name = "l3_dss_clkdm", > - .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, > - .main_clk = "dss_dss_clk", > - .prcm = { > -@@ -1709,6 +1732,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_dss_venc_slaves[] = { > - static struct omap_hwmod omap44xx_dss_venc_hwmod = { > - .name = "dss_venc", > - .class = &omap44xx_venc_hwmod_class, > -+ .clkdm_name = "l3_dss_clkdm", > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -@@ -1786,6 +1810,7 @@ static struct omap_hwmod_opt_clk > gpio1_opt_clks[] = { > - static struct omap_hwmod omap44xx_gpio1_hwmod = { > - .name = "gpio1", > - .class = &omap44xx_gpio_hwmod_class, > -+ .clkdm_name = "l4_wkup_clkdm", > - .mpu_irqs = omap44xx_gpio1_irqs, > - .main_clk = "gpio1_ick", > - .prcm = { > -@@ -1838,6 +1863,7 @@ static struct omap_hwmod_opt_clk > gpio2_opt_clks[] = { > - static struct omap_hwmod omap44xx_gpio2_hwmod = { > - .name = "gpio2", > - .class = &omap44xx_gpio_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio2_irqs, > - .main_clk = "gpio2_ick", > -@@ -1891,6 +1917,7 @@ static struct omap_hwmod_opt_clk > gpio3_opt_clks[] = { > - static struct omap_hwmod omap44xx_gpio3_hwmod = { > - .name = "gpio3", > - .class = &omap44xx_gpio_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio3_irqs, > - .main_clk = "gpio3_ick", > -@@ -1944,6 +1971,7 @@ static struct omap_hwmod_opt_clk > gpio4_opt_clks[] = { > - static struct omap_hwmod omap44xx_gpio4_hwmod = { > - .name = "gpio4", > - .class = &omap44xx_gpio_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio4_irqs, > - .main_clk = "gpio4_ick", > -@@ -1997,6 +2025,7 @@ static struct omap_hwmod_opt_clk > gpio5_opt_clks[] = { > - static struct omap_hwmod omap44xx_gpio5_hwmod = { > - .name = "gpio5", > - .class = &omap44xx_gpio_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio5_irqs, > - .main_clk = "gpio5_ick", > -@@ -2050,6 +2079,7 @@ static struct omap_hwmod_opt_clk > gpio6_opt_clks[] = { > - static struct omap_hwmod omap44xx_gpio6_hwmod = { > - .name = "gpio6", > - .class = &omap44xx_gpio_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, > - .mpu_irqs = omap44xx_gpio6_irqs, > - .main_clk = "gpio6_ick", > -@@ -2129,6 +2159,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_hsi_slaves[] = { > - static struct omap_hwmod omap44xx_hsi_hwmod = { > - .name = "hsi", > - .class = &omap44xx_hsi_hwmod_class, > -+ .clkdm_name = "l3_init_clkdm", > - .mpu_irqs = omap44xx_hsi_irqs, > - .main_clk = "hsi_fck", > - .prcm = { > -@@ -2209,6 +2240,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c1_slaves[] = { > - static struct omap_hwmod omap44xx_i2c1_hwmod = { > - .name = "i2c1", > - .class = &omap44xx_i2c_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap44xx_i2c1_irqs, > - .sdma_reqs = omap44xx_i2c1_sdma_reqs, > -@@ -2263,6 +2295,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c2_slaves[] = { > - static struct omap_hwmod omap44xx_i2c2_hwmod = { > - .name = "i2c2", > - .class = &omap44xx_i2c_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap44xx_i2c2_irqs, > - .sdma_reqs = omap44xx_i2c2_sdma_reqs, > -@@ -2317,6 +2350,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c3_slaves[] = { > - static struct omap_hwmod omap44xx_i2c3_hwmod = { > - .name = "i2c3", > - .class = &omap44xx_i2c_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap44xx_i2c3_irqs, > - .sdma_reqs = omap44xx_i2c3_sdma_reqs, > -@@ -2371,6 +2405,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_i2c4_slaves[] = { > - static struct omap_hwmod omap44xx_i2c4_hwmod = { > - .name = "i2c4", > - .class = &omap44xx_i2c_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_16BIT_REG, > - .mpu_irqs = omap44xx_i2c4_irqs, > - .sdma_reqs = omap44xx_i2c4_sdma_reqs, > -@@ -2435,6 +2470,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_ipu_slaves[] = { > - static struct omap_hwmod omap44xx_ipu_c0_hwmod = { > - .name = "ipu_c0", > - .class = &omap44xx_ipu_hwmod_class, > -+ .clkdm_name = "ducati_clkdm", > - .flags = HWMOD_INIT_NO_RESET, > - .rst_lines = omap44xx_ipu_c0_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), > -@@ -2450,6 +2486,7 @@ static struct omap_hwmod > omap44xx_ipu_c0_hwmod = { > - static struct omap_hwmod omap44xx_ipu_c1_hwmod = { > - .name = "ipu_c1", > - .class = &omap44xx_ipu_hwmod_class, > -+ .clkdm_name = "ducati_clkdm", > - .flags = HWMOD_INIT_NO_RESET, > - .rst_lines = omap44xx_ipu_c1_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), > -@@ -2464,6 +2501,7 @@ static struct omap_hwmod > omap44xx_ipu_c1_hwmod = { > - static struct omap_hwmod omap44xx_ipu_hwmod = { > - .name = "ipu", > - .class = &omap44xx_ipu_hwmod_class, > -+ .clkdm_name = "ducati_clkdm", > - .mpu_irqs = omap44xx_ipu_irqs, > - .rst_lines = omap44xx_ipu_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), > -@@ -2551,6 +2589,7 @@ static struct omap_hwmod_opt_clk iss_opt_clks[] = > { > - static struct omap_hwmod omap44xx_iss_hwmod = { > - .name = "iss", > - .class = &omap44xx_iss_hwmod_class, > -+ .clkdm_name = "iss_clkdm", > - .mpu_irqs = omap44xx_iss_irqs, > - .sdma_reqs = omap44xx_iss_sdma_reqs, > - .main_clk = "iss_fck", > -@@ -2631,6 +2670,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_iva_slaves[] = { > - static struct omap_hwmod omap44xx_iva_seq0_hwmod = { > - .name = "iva_seq0", > - .class = &omap44xx_iva_hwmod_class, > -+ .clkdm_name = "ivahd_clkdm", > - .flags = HWMOD_INIT_NO_RESET, > - .rst_lines = omap44xx_iva_seq0_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), > -@@ -2646,6 +2686,7 @@ static struct omap_hwmod > omap44xx_iva_seq0_hwmod = { > - static struct omap_hwmod omap44xx_iva_seq1_hwmod = { > - .name = "iva_seq1", > - .class = &omap44xx_iva_hwmod_class, > -+ .clkdm_name = "ivahd_clkdm", > - .flags = HWMOD_INIT_NO_RESET, > - .rst_lines = omap44xx_iva_seq1_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), > -@@ -2660,6 +2701,7 @@ static struct omap_hwmod > omap44xx_iva_seq1_hwmod = { > - static struct omap_hwmod omap44xx_iva_hwmod = { > - .name = "iva", > - .class = &omap44xx_iva_hwmod_class, > -+ .clkdm_name = "ivahd_clkdm", > - .mpu_irqs = omap44xx_iva_irqs, > - .rst_lines = omap44xx_iva_resets, > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), > -@@ -2732,6 +2774,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_kbd_slaves[] = { > - static struct omap_hwmod omap44xx_kbd_hwmod = { > - .name = "kbd", > - .class = &omap44xx_kbd_hwmod_class, > -+ .clkdm_name = "l4_wkup_clkdm", > - .mpu_irqs = omap44xx_kbd_irqs, > - .main_clk = "kbd_fck", > - .prcm = { > -@@ -2797,6 +2840,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mailbox_slaves[] = { > - static struct omap_hwmod omap44xx_mailbox_hwmod = { > - .name = "mailbox", > - .class = &omap44xx_mailbox_hwmod_class, > -+ .clkdm_name = "l4_cfg_clkdm", > - .mpu_irqs = omap44xx_mailbox_irqs, > - .prcm = { > - .omap4 = { > -@@ -2887,6 +2931,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mcbsp1_slaves[] = { > - static struct omap_hwmod omap44xx_mcbsp1_hwmod = { > - .name = "mcbsp1", > - .class = &omap44xx_mcbsp_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_mcbsp1_irqs, > - .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, > - .main_clk = "mcbsp1_fck", > -@@ -2960,6 +3005,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mcbsp2_slaves[] = { > - static struct omap_hwmod omap44xx_mcbsp2_hwmod = { > - .name = "mcbsp2", > - .class = &omap44xx_mcbsp_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_mcbsp2_irqs, > - .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, > - .main_clk = "mcbsp2_fck", > -@@ -3033,6 +3079,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mcbsp3_slaves[] = { > - static struct omap_hwmod omap44xx_mcbsp3_hwmod = { > - .name = "mcbsp3", > - .class = &omap44xx_mcbsp_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_mcbsp3_irqs, > - .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, > - .main_clk = "mcbsp3_fck", > -@@ -3085,6 +3132,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mcbsp4_slaves[] = { > - static struct omap_hwmod omap44xx_mcbsp4_hwmod = { > - .name = "mcbsp4", > - .class = &omap44xx_mcbsp_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_mcbsp4_irqs, > - .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, > - .main_clk = "mcbsp4_fck", > -@@ -3177,6 +3225,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mcpdm_slaves[] = { > - static struct omap_hwmod omap44xx_mcpdm_hwmod = { > - .name = "mcpdm", > - .class = &omap44xx_mcpdm_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_mcpdm_irqs, > - .sdma_reqs = omap44xx_mcpdm_sdma_reqs, > - .main_clk = "mcpdm_fck", > -@@ -3262,6 +3311,7 @@ static struct omap2_mcspi_dev_attr > mcspi1_dev_attr = { > - static struct omap_hwmod omap44xx_mcspi1_hwmod = { > - .name = "mcspi1", > - .class = &omap44xx_mcspi_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_mcspi1_irqs, > - .sdma_reqs = omap44xx_mcspi1_sdma_reqs, > - .main_clk = "mcspi1_fck", > -@@ -3322,6 +3372,7 @@ static struct omap2_mcspi_dev_attr > mcspi2_dev_attr = { > - static struct omap_hwmod omap44xx_mcspi2_hwmod = { > - .name = "mcspi2", > - .class = &omap44xx_mcspi_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_mcspi2_irqs, > - .sdma_reqs = omap44xx_mcspi2_sdma_reqs, > - .main_clk = "mcspi2_fck", > -@@ -3382,6 +3433,7 @@ static struct omap2_mcspi_dev_attr > mcspi3_dev_attr = { > - static struct omap_hwmod omap44xx_mcspi3_hwmod = { > - .name = "mcspi3", > - .class = &omap44xx_mcspi_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_mcspi3_irqs, > - .sdma_reqs = omap44xx_mcspi3_sdma_reqs, > - .main_clk = "mcspi3_fck", > -@@ -3440,6 +3492,7 @@ static struct omap2_mcspi_dev_attr > mcspi4_dev_attr = { > - static struct omap_hwmod omap44xx_mcspi4_hwmod = { > - .name = "mcspi4", > - .class = &omap44xx_mcspi_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_mcspi4_irqs, > - .sdma_reqs = omap44xx_mcspi4_sdma_reqs, > - .main_clk = "mcspi4_fck", > -@@ -3524,6 +3577,7 @@ static struct omap_mmc_dev_attr mmc1_dev_attr > = { > - static struct omap_hwmod omap44xx_mmc1_hwmod = { > - .name = "mmc1", > - .class = &omap44xx_mmc_hwmod_class, > -+ .clkdm_name = "l3_init_clkdm", > - .mpu_irqs = omap44xx_mmc1_irqs, > - .sdma_reqs = omap44xx_mmc1_sdma_reqs, > - .main_clk = "mmc1_fck", > -@@ -3583,6 +3637,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mmc2_slaves[] = { > - static struct omap_hwmod omap44xx_mmc2_hwmod = { > - .name = "mmc2", > - .class = &omap44xx_mmc_hwmod_class, > -+ .clkdm_name = "l3_init_clkdm", > - .mpu_irqs = omap44xx_mmc2_irqs, > - .sdma_reqs = omap44xx_mmc2_sdma_reqs, > - .main_clk = "mmc2_fck", > -@@ -3637,6 +3692,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mmc3_slaves[] = { > - static struct omap_hwmod omap44xx_mmc3_hwmod = { > - .name = "mmc3", > - .class = &omap44xx_mmc_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_mmc3_irqs, > - .sdma_reqs = omap44xx_mmc3_sdma_reqs, > - .main_clk = "mmc3_fck", > -@@ -3689,6 +3745,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mmc4_slaves[] = { > - static struct omap_hwmod omap44xx_mmc4_hwmod = { > - .name = "mmc4", > - .class = &omap44xx_mmc_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_mmc4_irqs, > - > - .sdma_reqs = omap44xx_mmc4_sdma_reqs, > -@@ -3742,6 +3799,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mmc5_slaves[] = { > - static struct omap_hwmod omap44xx_mmc5_hwmod = { > - .name = "mmc5", > - .class = &omap44xx_mmc_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_mmc5_irqs, > - .sdma_reqs = omap44xx_mmc5_sdma_reqs, > - .main_clk = "mmc5_fck", > -@@ -3782,6 +3840,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_mpu_masters[] = { > - static struct omap_hwmod omap44xx_mpu_hwmod = { > - .name = "mpu", > - .class = &omap44xx_mpu_hwmod_class, > -+ .clkdm_name = "mpuss_clkdm", > - .flags = HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_mpu_irqs, > - .main_clk = "dpll_mpu_m2_ck", > -@@ -3854,6 +3913,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_smartreflex_core_slaves[] = { > - static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { > - .name = "smartreflex_core", > - .class = &omap44xx_smartreflex_hwmod_class, > -+ .clkdm_name = "l4_ao_clkdm", > - .mpu_irqs = omap44xx_smartreflex_core_irqs, > - > - .main_clk = "smartreflex_core_fck", > -@@ -3901,6 +3961,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_smartreflex_iva_slaves[] = { > - static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { > - .name = "smartreflex_iva", > - .class = &omap44xx_smartreflex_hwmod_class, > -+ .clkdm_name = "l4_ao_clkdm", > - .mpu_irqs = omap44xx_smartreflex_iva_irqs, > - .main_clk = "smartreflex_iva_fck", > - .vdd_name = "iva", > -@@ -3947,6 +4008,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_smartreflex_mpu_slaves[] = { > - static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { > - .name = "smartreflex_mpu", > - .class = &omap44xx_smartreflex_hwmod_class, > -+ .clkdm_name = "l4_ao_clkdm", > - .mpu_irqs = omap44xx_smartreflex_mpu_irqs, > - .main_clk = "smartreflex_mpu_fck", > - .vdd_name = "mpu", > -@@ -4011,6 +4073,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_spinlock_slaves[] = { > - static struct omap_hwmod omap44xx_spinlock_hwmod = { > - .name = "spinlock", > - .class = &omap44xx_spinlock_hwmod_class, > -+ .clkdm_name = "l4_cfg_clkdm", > - .prcm = { > - .omap4 = { > - .clkctrl_reg = > OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, > -@@ -4092,6 +4155,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer1_slaves[] = { > - static struct omap_hwmod omap44xx_timer1_hwmod = { > - .name = "timer1", > - .class = &omap44xx_timer_1ms_hwmod_class, > -+ .clkdm_name = "l4_wkup_clkdm", > - .mpu_irqs = omap44xx_timer1_irqs, > - .main_clk = "timer1_fck", > - .prcm = { > -@@ -4137,6 +4201,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer2_slaves[] = { > - static struct omap_hwmod omap44xx_timer2_hwmod = { > - .name = "timer2", > - .class = &omap44xx_timer_1ms_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_timer2_irqs, > - .main_clk = "timer2_fck", > - .prcm = { > -@@ -4182,6 +4247,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer3_slaves[] = { > - static struct omap_hwmod omap44xx_timer3_hwmod = { > - .name = "timer3", > - .class = &omap44xx_timer_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_timer3_irqs, > - .main_clk = "timer3_fck", > - .prcm = { > -@@ -4227,6 +4293,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer4_slaves[] = { > - static struct omap_hwmod omap44xx_timer4_hwmod = { > - .name = "timer4", > - .class = &omap44xx_timer_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_timer4_irqs, > - .main_clk = "timer4_fck", > - .prcm = { > -@@ -4291,6 +4358,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer5_slaves[] = { > - static struct omap_hwmod omap44xx_timer5_hwmod = { > - .name = "timer5", > - .class = &omap44xx_timer_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_timer5_irqs, > - .main_clk = "timer5_fck", > - .prcm = { > -@@ -4355,6 +4423,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer6_slaves[] = { > - static struct omap_hwmod omap44xx_timer6_hwmod = { > - .name = "timer6", > - .class = &omap44xx_timer_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_timer6_irqs, > - > - .main_clk = "timer6_fck", > -@@ -4420,6 +4489,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer7_slaves[] = { > - static struct omap_hwmod omap44xx_timer7_hwmod = { > - .name = "timer7", > - .class = &omap44xx_timer_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_timer7_irqs, > - .main_clk = "timer7_fck", > - .prcm = { > -@@ -4484,6 +4554,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer8_slaves[] = { > - static struct omap_hwmod omap44xx_timer8_hwmod = { > - .name = "timer8", > - .class = &omap44xx_timer_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_timer8_irqs, > - .main_clk = "timer8_fck", > - .prcm = { > -@@ -4529,6 +4600,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer9_slaves[] = { > - static struct omap_hwmod omap44xx_timer9_hwmod = { > - .name = "timer9", > - .class = &omap44xx_timer_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_timer9_irqs, > - .main_clk = "timer9_fck", > - .prcm = { > -@@ -4574,6 +4646,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer10_slaves[] = { > - static struct omap_hwmod omap44xx_timer10_hwmod = { > - .name = "timer10", > - .class = &omap44xx_timer_1ms_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_timer10_irqs, > - .main_clk = "timer10_fck", > - .prcm = { > -@@ -4619,6 +4692,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_timer11_slaves[] = { > - static struct omap_hwmod omap44xx_timer11_hwmod = { > - .name = "timer11", > - .class = &omap44xx_timer_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_timer11_irqs, > - .main_clk = "timer11_fck", > - .prcm = { > -@@ -4692,6 +4766,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_uart1_slaves[] = { > - static struct omap_hwmod omap44xx_uart1_hwmod = { > - .name = "uart1", > - .class = &omap44xx_uart_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_uart1_irqs, > - .sdma_reqs = omap44xx_uart1_sdma_reqs, > - .main_clk = "uart1_fck", > -@@ -4744,6 +4819,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_uart2_slaves[] = { > - static struct omap_hwmod omap44xx_uart2_hwmod = { > - .name = "uart2", > - .class = &omap44xx_uart_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_uart2_irqs, > - .sdma_reqs = omap44xx_uart2_sdma_reqs, > - .main_clk = "uart2_fck", > -@@ -4796,6 +4872,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_uart3_slaves[] = { > - static struct omap_hwmod omap44xx_uart3_hwmod = { > - .name = "uart3", > - .class = &omap44xx_uart_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .flags = HWMOD_INIT_NO_IDLE | > HWMOD_INIT_NO_RESET, > - .mpu_irqs = omap44xx_uart3_irqs, > - .sdma_reqs = omap44xx_uart3_sdma_reqs, > -@@ -4849,6 +4926,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_uart4_slaves[] = { > - static struct omap_hwmod omap44xx_uart4_hwmod = { > - .name = "uart4", > - .class = &omap44xx_uart_hwmod_class, > -+ .clkdm_name = "l4_per_clkdm", > - .mpu_irqs = omap44xx_uart4_irqs, > - .sdma_reqs = omap44xx_uart4_sdma_reqs, > - .main_clk = "uart4_fck", > -@@ -4927,6 +5005,7 @@ static struct omap_hwmod_opt_clk > usb_otg_hs_opt_clks[] = { > - static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { > - .name = "usb_otg_hs", > - .class = &omap44xx_usb_otg_hs_hwmod_class, > -+ .clkdm_name = "l3_init_clkdm", > - .flags = HWMOD_SWSUP_SIDLE | > HWMOD_SWSUP_MSTANDBY, > - .mpu_irqs = omap44xx_usb_otg_hs_irqs, > - .main_clk = "usb_otg_hs_ick", > -@@ -5000,6 +5079,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_wd_timer2_slaves[] = { > - static struct omap_hwmod omap44xx_wd_timer2_hwmod = { > - .name = "wd_timer2", > - .class = &omap44xx_wd_timer_hwmod_class, > -+ .clkdm_name = "l4_wkup_clkdm", > - .mpu_irqs = omap44xx_wd_timer2_irqs, > - .main_clk = "wd_timer2_fck", > - .prcm = { > -@@ -5064,6 +5144,7 @@ static struct omap_hwmod_ocp_if > *omap44xx_wd_timer3_slaves[] = { > - static struct omap_hwmod omap44xx_wd_timer3_hwmod = { > - .name = "wd_timer3", > - .class = &omap44xx_wd_timer_hwmod_class, > -+ .clkdm_name = "abe_clkdm", > - .mpu_irqs = omap44xx_wd_timer3_irqs, > - .main_clk = "wd_timer3_fck", > - .prcm = { > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index fafdfe3..21d3922 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -515,6 +515,7 @@ struct omap_hwmod { > - const char *main_clk; > - struct clk *_clk; > - struct omap_hwmod_opt_clk *opt_clks; > -+ char *clkdm_name; > - char *vdd_name; > - struct voltagedomain *voltdm; > - struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0078-OMAP2- > hwmod-Init-clkdm-field-at-boot-time.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch > deleted file mode 100644 > index db4e932..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0078-OMAP2-hwmod-Init- > clkdm-field-at-boot-time.patch > +++ /dev/null > @@ -1,86 +0,0 @@ > -From 57d2323014444c5d7f8c8d7e2da0a9737c3d8c28 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:30 -0600 > -Subject: [PATCH 078/149] OMAP2+: hwmod: Init clkdm field at boot time > - > -At boot time, lookup the clkdm_name to get the clkdm > -structure pointer for further usage. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 34 > +++++++++++++++++++++++++- > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + > - 2 files changed, 34 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 02b6016..1f6f47f 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -990,9 +990,40 @@ static struct omap_hwmod *_lookup(const char > *name) > - > - return oh; > - } > -+/** > -+ * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod > -+ * @oh: struct omap_hwmod * > -+ * > -+ * Convert a clockdomain name stored in a struct omap_hwmod into a > -+ * clockdomain pointer, and save it into the struct omap_hwmod. > -+ * return -EINVAL if clkdm_name does not exist or if the lookup failed. > -+ */ > -+static int _init_clkdm(struct omap_hwmod *oh) > -+{ > -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) > -+ return 0; > -+ > -+ if (!oh->clkdm_name) { > -+ pr_warning("omap_hwmod: %s: no clkdm_name\n", oh- > >name); > -+ return -EINVAL; > -+ } > -+ > -+ oh->clkdm = clkdm_lookup(oh->clkdm_name); > -+ if (!oh->clkdm) { > -+ pr_warning("omap_hwmod: %s: could not associate to clkdm > %s\n", > -+ oh->name, oh->clkdm_name); > -+ return -EINVAL; > -+ } > -+ > -+ pr_debug("omap_hwmod: %s: associated to clkdm %s\n", > -+ oh->name, oh->clkdm_name); > -+ > -+ return 0; > -+} > - > - /** > -- * _init_clocks - clk_get() all clocks associated with this hwmod > -+ * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as > -+ * well the clockdomain. > - * @oh: struct omap_hwmod * > - * @data: not used; pass NULL > - * > -@@ -1012,6 +1043,7 @@ static int _init_clocks(struct omap_hwmod *oh, > void *data) > - ret |= _init_main_clk(oh); > - ret |= _init_interface_clks(oh); > - ret |= _init_opt_clks(oh); > -+ ret |= _init_clkdm(oh); > - > - if (!ret) > - oh->_state = _HWMOD_STATE_CLKS_INITED; > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index 21d3922..3306bdf 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -516,6 +516,7 @@ struct omap_hwmod { > - struct clk *_clk; > - struct omap_hwmod_opt_clk *opt_clks; > - char *clkdm_name; > -+ struct clockdomain *clkdm; > - char *vdd_name; > - struct voltagedomain *voltdm; > - struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4- > hwmod-Replace-CLKCTRL-absolute-address-with-of.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL- > absolute-address-with-of.patch > deleted file mode 100644 > index ba3120f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4-hwmod- > Replace-CLKCTRL-absolute-address-with-of.patch > +++ /dev/null > @@ -1,976 +0,0 @@ > -From d112244b9ada88d33ac8e856587a4645c8f11e80 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:30 -0600 > -Subject: [PATCH 079/149] OMAP4: hwmod: Replace CLKCTRL absolute address > with offset macros > - > -The CLKCTRL register was accessed using an absolute address. > -The usage of hardcoded macros to calculate virtual address from physical > -one should be avoided as much as possible. > -The usage of a offset will allow future improvement like migration from > -the current architecture code toward a module driver. > - > -Update cm_xxx accessor, move definition to the proper header file and > -update copyrights. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Cc: Todd Poynor <toddpoynor@google.com> > -[paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed > empty > - fn prototype section from cm44xx.h; incorporated comments from Todd; > - documented some functions] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/cm44xx.h | 8 +- > - arch/arm/mach-omap2/cminst44xx.c | 87 ++++++++++--- > - arch/arm/mach-omap2/cminst44xx.h | 4 +- > - arch/arm/mach-omap2/omap_hwmod.c | 12 ++- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 182 > ++++++++++++++++--------- > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +- > - 6 files changed, 198 insertions(+), 97 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach- > omap2/cm44xx.h > -index 0b87ec8..3380bee 100644 > ---- a/arch/arm/mach-omap2/cm44xx.h > -+++ b/arch/arm/mach-omap2/cm44xx.h > -@@ -1,7 +1,7 @@ > - /* > - * OMAP4 Clock Management (CM) definitions > - * > -- * Copyright (C) 2007-2009 Texas Instruments, Inc. > -+ * Copyright (C) 2007-2011 Texas Instruments, Inc. > - * Copyright (C) 2007-2009 Nokia Corporation > - * > - * Written by Paul Walmsley > -@@ -23,10 +23,4 @@ > - #define OMAP4_CM_CLKSTCTRL 0x0000 > - #define OMAP4_CM_STATICDEP 0x0004 > - > --/* Function prototypes */ > --# ifndef __ASSEMBLER__ > -- > --extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); > -- > --# endif > - #endif > -diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach- > omap2/cminst44xx.c > -index a482bfa..9033dd4 100644 > ---- a/arch/arm/mach-omap2/cminst44xx.c > -+++ b/arch/arm/mach-omap2/cminst44xx.c > -@@ -2,6 +2,7 @@ > - * OMAP4 CM instance functions > - * > - * Copyright (C) 2009 Nokia Corporation > -+ * Copyright (C) 2011 Texas Instruments, Inc. > - * Paul Walmsley > - * > - * This program is free software; you can redistribute it and/or modify > -@@ -32,6 +33,22 @@ > - #include "prm44xx.h" > - #include "prcm_mpu44xx.h" > - > -+/* > -+ * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: > -+ * > -+ * 0x0 func: Module is fully functional, including OCP > -+ * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep > -+ * abortion > -+ * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if > -+ * using separate functional clock > -+ * 0x3 disabled: Module is disabled and cannot be accessed > -+ * > -+ */ > -+#define CLKCTRL_IDLEST_FUNCTIONAL 0x0 > -+#define CLKCTRL_IDLEST_INTRANSITION 0x1 > -+#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 > -+#define CLKCTRL_IDLEST_DISABLED 0x3 > -+ > - static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { > - [OMAP4430_INVALID_PRCM_PARTITION] = 0, > - [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, > -@@ -41,6 +58,48 @@ static u32 > _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { > - [OMAP4430_PRCM_MPU_PARTITION] = > OMAP4430_PRCM_MPU_BASE, > - }; > - > -+/* Private functions */ > -+ > -+/** > -+ * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield > -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in > -+ * @inst: CM instance register offset (*_INST macro) > -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) > -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) > -+ * > -+ * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to > -+ * bit 0. > -+ */ > -+static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) > -+{ > -+ u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); > -+ v &= OMAP4430_IDLEST_MASK; > -+ v >>= OMAP4430_IDLEST_SHIFT; > -+ return v; > -+} > -+ > -+/** > -+ * _is_module_ready - can module registers be accessed without causing an > abort? > -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in > -+ * @inst: CM instance register offset (*_INST macro) > -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) > -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) > -+ * > -+ * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either > -+ * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise. > -+ */ > -+static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) > -+{ > -+ u32 v; > -+ > -+ v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs); > -+ > -+ return (v == CLKCTRL_IDLEST_FUNCTIONAL || > -+ v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; > -+} > -+ > -+/* Public functions */ > -+ > - /* Read a register in a CM instance */ > - u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) > - { > -@@ -200,35 +259,27 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, > s16 inst, u16 cdoffs) > - */ > - > - /** > -- * omap4_cm_wait_module_ready - wait for a module to be in 'func' state > -- * @clkctrl_reg: CLKCTRL module address > -+ * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state > -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in > -+ * @inst: CM instance register offset (*_INST macro) > -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) > -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) > - * > - * Wait for the module IDLEST to be functional. If the idle state is in any > - * the non functional state (trans, idle or disabled), module and thus the > - * sysconfig cannot be accessed and will probably lead to an "imprecise > - * external abort" > -- * > -- * Module idle state: > -- * 0x0 func: Module is fully functional, including OCP > -- * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep > -- * abortion > -- * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if > -- * using separate functional clock > -- * 0x3 disabled: Module is disabled and cannot be accessed > -- * > - */ > --int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg) > -+int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, > -+ u16 clkctrl_offs) > - { > - int i = 0; > - > -- if (!clkctrl_reg) > -+ if (!clkctrl_offs) > - return 0; > - > -- omap_test_timeout(( > -- ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) > || > -- (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >> > -- OMAP4430_IDLEST_SHIFT) == 0x2)), > -- MAX_MODULE_READY_TIME, i); > -+ omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs), > -+ MAX_MODULE_READY_TIME, i); > - > - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; > - } > -diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach- > omap2/cminst44xx.h > -index 2b32c18..8eba2ae 100644 > ---- a/arch/arm/mach-omap2/cminst44xx.h > -+++ b/arch/arm/mach-omap2/cminst44xx.h > -@@ -17,6 +17,8 @@ extern void omap4_cminst_clkdm_disable_hwsup(u8 > part, s16 inst, u16 cdoffs); > - extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); > - extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 > cdoffs); > - > -+extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, > u16 clkctrl_offs); > -+ > - /* > - * In an ideal world, we would not export these low-level functions, > - * but this will probably take some time to fix properly > -@@ -32,6 +34,4 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, > u8 part, s16 inst, > - extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, > - u32 mask); > - > --extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); > -- > - #endif > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 1f6f47f..00241ea 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -146,7 +146,7 @@ > - #include <plat/prcm.h> > - > - #include "cm2xxx_3xxx.h" > --#include "cm44xx.h" > -+#include "cminst44xx.h" > - #include "prm2xxx_3xxx.h" > - #include "prm44xx.h" > - #include "mux.h" > -@@ -1060,7 +1060,7 @@ static int _init_clocks(struct omap_hwmod *oh, > void *data) > - * Wait for a module @oh to leave slave idle. Returns 0 if the module > - * does not have an IDLEST bit or if the module successfully leaves > - * slave idle; otherwise, pass along the return value of the > -- * appropriate *_cm_wait_module_ready() function. > -+ * appropriate *_cm*_wait_module_ready() function. > - */ > - static int _wait_target_ready(struct omap_hwmod *oh) > - { > -@@ -1087,7 +1087,13 @@ static int _wait_target_ready(struct > omap_hwmod *oh) > - oh- > >prcm.omap2.idlest_reg_id, > - oh- > >prcm.omap2.idlest_idle_bit); > - } else if (cpu_is_omap44xx()) { > -- ret = omap4_cm_wait_module_ready(oh- > >prcm.omap4.clkctrl_reg); > -+ if (!oh->clkdm) > -+ return -EINVAL; > -+ > -+ ret = omap4_cminst_wait_module_ready(oh->clkdm- > >prcm_partition, > -+ oh->clkdm->cm_inst, > -+ oh->clkdm->clkdm_offs, > -+ oh- > >prcm.omap4.clkctrl_offs); > - } else { > - BUG(); > - }; > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index becae45..00d7130 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -124,6 +124,11 @@ static struct omap_hwmod > omap44xx_dmm_hwmod = { > - .name = "dmm", > - .class = &omap44xx_dmm_hwmod_class, > - .clkdm_name = "l3_emif_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_dmm_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), > - .mpu_irqs = omap44xx_dmm_irqs, > -@@ -175,6 +180,11 @@ static struct omap_hwmod > omap44xx_emif_fw_hwmod = { > - .name = "emif_fw", > - .class = &omap44xx_emif_fw_hwmod_class, > - .clkdm_name = "l3_emif_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_emif_fw_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -215,6 +225,11 @@ static struct omap_hwmod > omap44xx_l3_instr_hwmod = { > - .name = "l3_instr", > - .class = &omap44xx_l3_hwmod_class, > - .clkdm_name = "l3_instr_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_l3_instr_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -309,6 +324,11 @@ static struct omap_hwmod > omap44xx_l3_main_1_hwmod = { > - .class = &omap44xx_l3_hwmod_class, > - .clkdm_name = "l3_1_clkdm", > - .mpu_irqs = omap44xx_l3_main_1_irqs, > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_l3_main_1_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -405,6 +425,11 @@ static struct omap_hwmod > omap44xx_l3_main_2_hwmod = { > - .name = "l3_main_2", > - .class = &omap44xx_l3_hwmod_class, > - .clkdm_name = "l3_2_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_l3_main_2_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -456,6 +481,11 @@ static struct omap_hwmod > omap44xx_l3_main_3_hwmod = { > - .name = "l3_main_3", > - .class = &omap44xx_l3_hwmod_class, > - .clkdm_name = "l3_instr_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_l3_main_3_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -514,6 +544,11 @@ static struct omap_hwmod > omap44xx_l4_abe_hwmod = { > - .name = "l4_abe", > - .class = &omap44xx_l4_hwmod_class, > - .clkdm_name = "abe_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_l4_abe_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -537,6 +572,11 @@ static struct omap_hwmod > omap44xx_l4_cfg_hwmod = { > - .name = "l4_cfg", > - .class = &omap44xx_l4_hwmod_class, > - .clkdm_name = "l4_cfg_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_l4_cfg_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -560,6 +600,11 @@ static struct omap_hwmod > omap44xx_l4_per_hwmod = { > - .name = "l4_per", > - .class = &omap44xx_l4_hwmod_class, > - .clkdm_name = "l4_per_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_l4_per_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -583,6 +628,11 @@ static struct omap_hwmod > omap44xx_l4_wkup_hwmod = { > - .name = "l4_wkup", > - .class = &omap44xx_l4_hwmod_class, > - .clkdm_name = "l4_wkup_clkdm", > -+ .prcm = { > -+ .omap4 = { > -+ .clkctrl_offs = > OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, > -+ }, > -+ }, > - .slaves = omap44xx_l4_wkup_slaves, > - .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -758,7 +808,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = > { > - .main_clk = "aess_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_aess_slaves, > -@@ -788,7 +838,7 @@ static struct omap_hwmod > omap44xx_bandgap_hwmod = { > - .clkdm_name = "l4_wkup_clkdm", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = bandgap_opt_clks, > -@@ -848,7 +898,7 @@ static struct omap_hwmod > omap44xx_counter_32k_hwmod = { > - .main_clk = "sys_32k_ck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_counter_32k_slaves, > -@@ -932,7 +982,7 @@ static struct omap_hwmod > omap44xx_dma_system_hwmod = { > - .main_clk = "l3_div_ck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_SDMA_SDMA_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, > - }, > - }, > - .dev_attr = &dma_dev_attr, > -@@ -1026,7 +1076,7 @@ static struct omap_hwmod > omap44xx_dmic_hwmod = { > - .main_clk = "dmic_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_dmic_slaves, > -@@ -1110,7 +1160,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod > = { > - .main_clk = "dsp_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, > - .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, > - }, > - }, > -@@ -1199,7 +1249,7 @@ static struct omap_hwmod omap44xx_dss_hwmod > = { > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = dss_opt_clks, > -@@ -1303,7 +1353,7 @@ static struct omap_hwmod > omap44xx_dss_dispc_hwmod = { > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = dss_dispc_opt_clks, > -@@ -1401,7 +1451,7 @@ static struct omap_hwmod > omap44xx_dss_dsi1_hwmod = { > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = dss_dsi1_opt_clks, > -@@ -1478,7 +1528,7 @@ static struct omap_hwmod > omap44xx_dss_dsi2_hwmod = { > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = dss_dsi2_opt_clks, > -@@ -1575,7 +1625,7 @@ static struct omap_hwmod > omap44xx_dss_hdmi_hwmod = { > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = dss_hdmi_opt_clks, > -@@ -1666,7 +1716,7 @@ static struct omap_hwmod > omap44xx_dss_rfbi_hwmod = { > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = dss_rfbi_opt_clks, > -@@ -1736,7 +1786,7 @@ static struct omap_hwmod > omap44xx_dss_venc_hwmod = { > - .main_clk = "dss_dss_clk", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_dss_venc_slaves, > -@@ -1815,7 +1865,7 @@ static struct omap_hwmod > omap44xx_gpio1_hwmod = { > - .main_clk = "gpio1_ick", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_WKUP_GPIO1_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = gpio1_opt_clks, > -@@ -1869,7 +1919,7 @@ static struct omap_hwmod > omap44xx_gpio2_hwmod = { > - .main_clk = "gpio2_ick", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_GPIO2_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = gpio2_opt_clks, > -@@ -1923,7 +1973,7 @@ static struct omap_hwmod > omap44xx_gpio3_hwmod = { > - .main_clk = "gpio3_ick", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_GPIO3_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = gpio3_opt_clks, > -@@ -1977,7 +2027,7 @@ static struct omap_hwmod > omap44xx_gpio4_hwmod = { > - .main_clk = "gpio4_ick", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_GPIO4_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = gpio4_opt_clks, > -@@ -2031,7 +2081,7 @@ static struct omap_hwmod > omap44xx_gpio5_hwmod = { > - .main_clk = "gpio5_ick", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_GPIO5_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = gpio5_opt_clks, > -@@ -2085,7 +2135,7 @@ static struct omap_hwmod > omap44xx_gpio6_hwmod = { > - .main_clk = "gpio6_ick", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_GPIO6_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = gpio6_opt_clks, > -@@ -2164,7 +2214,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod > = { > - .main_clk = "hsi_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_hsi_slaves, > -@@ -2247,7 +2297,7 @@ static struct omap_hwmod > omap44xx_i2c1_hwmod = { > - .main_clk = "i2c1_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_i2c1_slaves, > -@@ -2302,7 +2352,7 @@ static struct omap_hwmod > omap44xx_i2c2_hwmod = { > - .main_clk = "i2c2_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_i2c2_slaves, > -@@ -2357,7 +2407,7 @@ static struct omap_hwmod > omap44xx_i2c3_hwmod = { > - .main_clk = "i2c3_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_i2c3_slaves, > -@@ -2412,7 +2462,7 @@ static struct omap_hwmod > omap44xx_i2c4_hwmod = { > - .main_clk = "i2c4_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_i2c4_slaves, > -@@ -2508,7 +2558,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod > = { > - .main_clk = "ipu_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, > - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, > - }, > - }, > -@@ -2595,7 +2645,7 @@ static struct omap_hwmod omap44xx_iss_hwmod > = { > - .main_clk = "iss_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = iss_opt_clks, > -@@ -2708,7 +2758,7 @@ static struct omap_hwmod omap44xx_iva_hwmod > = { > - .main_clk = "iva_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, > - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, > - }, > - }, > -@@ -2779,7 +2829,7 @@ static struct omap_hwmod > omap44xx_kbd_hwmod = { > - .main_clk = "kbd_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_kbd_slaves, > -@@ -2844,7 +2894,7 @@ static struct omap_hwmod > omap44xx_mailbox_hwmod = { > - .mpu_irqs = omap44xx_mailbox_irqs, > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mailbox_slaves, > -@@ -2937,7 +2987,7 @@ static struct omap_hwmod > omap44xx_mcbsp1_hwmod = { > - .main_clk = "mcbsp1_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcbsp1_slaves, > -@@ -3011,7 +3061,7 @@ static struct omap_hwmod > omap44xx_mcbsp2_hwmod = { > - .main_clk = "mcbsp2_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcbsp2_slaves, > -@@ -3085,7 +3135,7 @@ static struct omap_hwmod > omap44xx_mcbsp3_hwmod = { > - .main_clk = "mcbsp3_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcbsp3_slaves, > -@@ -3138,7 +3188,7 @@ static struct omap_hwmod > omap44xx_mcbsp4_hwmod = { > - .main_clk = "mcbsp4_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcbsp4_slaves, > -@@ -3231,7 +3281,7 @@ static struct omap_hwmod > omap44xx_mcpdm_hwmod = { > - .main_clk = "mcpdm_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcpdm_slaves, > -@@ -3317,7 +3367,7 @@ static struct omap_hwmod > omap44xx_mcspi1_hwmod = { > - .main_clk = "mcspi1_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, > - }, > - }, > - .dev_attr = &mcspi1_dev_attr, > -@@ -3378,7 +3428,7 @@ static struct omap_hwmod > omap44xx_mcspi2_hwmod = { > - .main_clk = "mcspi2_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, > - }, > - }, > - .dev_attr = &mcspi2_dev_attr, > -@@ -3439,7 +3489,7 @@ static struct omap_hwmod > omap44xx_mcspi3_hwmod = { > - .main_clk = "mcspi3_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, > - }, > - }, > - .dev_attr = &mcspi3_dev_attr, > -@@ -3498,7 +3548,7 @@ static struct omap_hwmod > omap44xx_mcspi4_hwmod = { > - .main_clk = "mcspi4_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, > - }, > - }, > - .dev_attr = &mcspi4_dev_attr, > -@@ -3583,7 +3633,7 @@ static struct omap_hwmod > omap44xx_mmc1_hwmod = { > - .main_clk = "mmc1_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L3INIT_MMC1_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, > - }, > - }, > - .dev_attr = &mmc1_dev_attr, > -@@ -3643,7 +3693,7 @@ static struct omap_hwmod > omap44xx_mmc2_hwmod = { > - .main_clk = "mmc2_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L3INIT_MMC2_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mmc2_slaves, > -@@ -3698,7 +3748,7 @@ static struct omap_hwmod > omap44xx_mmc3_hwmod = { > - .main_clk = "mmc3_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mmc3_slaves, > -@@ -3752,7 +3802,7 @@ static struct omap_hwmod > omap44xx_mmc4_hwmod = { > - .main_clk = "mmc4_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mmc4_slaves, > -@@ -3805,7 +3855,7 @@ static struct omap_hwmod > omap44xx_mmc5_hwmod = { > - .main_clk = "mmc5_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_mmc5_slaves, > -@@ -3846,7 +3896,7 @@ static struct omap_hwmod > omap44xx_mpu_hwmod = { > - .main_clk = "dpll_mpu_m2_ck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM_MPU_MPU_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, > - }, > - }, > - .masters = omap44xx_mpu_masters, > -@@ -3920,7 +3970,7 @@ static struct omap_hwmod > omap44xx_smartreflex_core_hwmod = { > - .vdd_name = "core", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_smartreflex_core_slaves, > -@@ -3967,7 +4017,7 @@ static struct omap_hwmod > omap44xx_smartreflex_iva_hwmod = { > - .vdd_name = "iva", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_smartreflex_iva_slaves, > -@@ -4014,7 +4064,7 @@ static struct omap_hwmod > omap44xx_smartreflex_mpu_hwmod = { > - .vdd_name = "mpu", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_smartreflex_mpu_slaves, > -@@ -4076,7 +4126,7 @@ static struct omap_hwmod > omap44xx_spinlock_hwmod = { > - .clkdm_name = "l4_cfg_clkdm", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_spinlock_slaves, > -@@ -4160,7 +4210,7 @@ static struct omap_hwmod > omap44xx_timer1_hwmod = { > - .main_clk = "timer1_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_WKUP_TIMER1_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer1_slaves, > -@@ -4206,7 +4256,7 @@ static struct omap_hwmod > omap44xx_timer2_hwmod = { > - .main_clk = "timer2_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer2_slaves, > -@@ -4252,7 +4302,7 @@ static struct omap_hwmod > omap44xx_timer3_hwmod = { > - .main_clk = "timer3_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer3_slaves, > -@@ -4298,7 +4348,7 @@ static struct omap_hwmod > omap44xx_timer4_hwmod = { > - .main_clk = "timer4_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer4_slaves, > -@@ -4363,7 +4413,7 @@ static struct omap_hwmod > omap44xx_timer5_hwmod = { > - .main_clk = "timer5_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM1_ABE_TIMER5_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer5_slaves, > -@@ -4429,7 +4479,7 @@ static struct omap_hwmod > omap44xx_timer6_hwmod = { > - .main_clk = "timer6_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM1_ABE_TIMER6_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer6_slaves, > -@@ -4494,7 +4544,7 @@ static struct omap_hwmod > omap44xx_timer7_hwmod = { > - .main_clk = "timer7_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM1_ABE_TIMER7_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer7_slaves, > -@@ -4559,7 +4609,7 @@ static struct omap_hwmod > omap44xx_timer8_hwmod = { > - .main_clk = "timer8_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM1_ABE_TIMER8_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer8_slaves, > -@@ -4605,7 +4655,7 @@ static struct omap_hwmod > omap44xx_timer9_hwmod = { > - .main_clk = "timer9_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer9_slaves, > -@@ -4651,7 +4701,7 @@ static struct omap_hwmod > omap44xx_timer10_hwmod = { > - .main_clk = "timer10_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer10_slaves, > -@@ -4697,7 +4747,7 @@ static struct omap_hwmod > omap44xx_timer11_hwmod = { > - .main_clk = "timer11_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer11_slaves, > -@@ -4772,7 +4822,7 @@ static struct omap_hwmod > omap44xx_uart1_hwmod = { > - .main_clk = "uart1_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_UART1_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_uart1_slaves, > -@@ -4825,7 +4875,7 @@ static struct omap_hwmod > omap44xx_uart2_hwmod = { > - .main_clk = "uart2_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_UART2_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_uart2_slaves, > -@@ -4879,7 +4929,7 @@ static struct omap_hwmod > omap44xx_uart3_hwmod = { > - .main_clk = "uart3_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_UART3_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_uart3_slaves, > -@@ -4932,7 +4982,7 @@ static struct omap_hwmod > omap44xx_uart4_hwmod = { > - .main_clk = "uart4_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L4PER_UART4_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_uart4_slaves, > -@@ -5011,7 +5061,7 @@ static struct omap_hwmod > omap44xx_usb_otg_hs_hwmod = { > - .main_clk = "usb_otg_hs_ick", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, > - }, > - }, > - .opt_clks = usb_otg_hs_opt_clks, > -@@ -5084,7 +5134,7 @@ static struct omap_hwmod > omap44xx_wd_timer2_hwmod = { > - .main_clk = "wd_timer2_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = > OMAP4430_CM_WKUP_WDT2_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_wd_timer2_slaves, > -@@ -5149,7 +5199,7 @@ static struct omap_hwmod > omap44xx_wd_timer3_hwmod = { > - .main_clk = "wd_timer3_fck", > - .prcm = { > - .omap4 = { > -- .clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL, > -+ .clkctrl_offs = > OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_wd_timer3_slaves, > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index 3306bdf..fc54355 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -360,7 +360,7 @@ struct omap_hwmod_omap2_prcm { > - * @submodule_wkdep_bit: bit shift of the WKDEP range > - */ > - struct omap_hwmod_omap4_prcm { > -- void __iomem *clkctrl_reg; > -+ u16 clkctrl_offs; > - void __iomem *rstctrl_reg; > - u8 submodule_wkdep_bit; > - }; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0080-OMAP-hwmod- > Wait-the-idle-status-to-be-disabled.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch > deleted file mode 100644 > index c3668a6..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0080-OMAP-hwmod-Wait- > the-idle-status-to-be-disabled.patch > +++ /dev/null > @@ -1,153 +0,0 @@ > -From e800b4bd2d100fea86fbfa46a20a374c691e2fcd Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:30 -0600 > -Subject: [PATCH 080/149] OMAP: hwmod: Wait the idle status to be disabled > - > -It is mandatory to wait for a module to be in disabled state before > -potentially disabling source clock or re-asserting a reset. > - > -omap_hwmod_idle and omap_hwmod_shutdown does not wait for > -the module to be fully idle. > - > -Add a cm_xxx accessor to wait the clkctrl idle status to be disabled. > -Fix hwmod_[idle|shutdown] to use this API. > - > -Based on Rajendra's initial patch. > - > -Please note that most interconnects hwmod will return one timeout because > -it is impossible for them to be in idle since the processor is accessing > -the registers though the interconnect. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Todd Poynor <toddpoynor@google.com> > -[paul@pwsan.com: move cpu_is_*() tests to the top of _wait_target_disable(); > - incorporate some feedback from Todd] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/cminst44xx.c | 25 +++++++++++++++++++++++ > - arch/arm/mach-omap2/cminst44xx.h | 1 + > - arch/arm/mach-omap2/omap_hwmod.c | 40 > ++++++++++++++++++++++++++++++++++++++ > - 3 files changed, 66 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach- > omap2/cminst44xx.c > -index 9033dd4..0fe3f14 100644 > ---- a/arch/arm/mach-omap2/cminst44xx.c > -+++ b/arch/arm/mach-omap2/cminst44xx.c > -@@ -284,3 +284,28 @@ int omap4_cminst_wait_module_ready(u8 part, u16 > inst, s16 cdoffs, > - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; > - } > - > -+/** > -+ * omap4_cminst_wait_module_idle - wait for a module to be in 'disabled' > -+ * state > -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in > -+ * @inst: CM instance register offset (*_INST macro) > -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) > -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) > -+ * > -+ * Wait for the module IDLEST to be disabled. Some PRCM transition, > -+ * like reset assertion or parent clock de-activation must wait the > -+ * module to be fully disabled. > -+ */ > -+int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 > clkctrl_offs) > -+{ > -+ int i = 0; > -+ > -+ if (!clkctrl_offs) > -+ return 0; > -+ > -+ omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == > -+ CLKCTRL_IDLEST_DISABLED), > -+ MAX_MODULE_READY_TIME, i); > -+ > -+ return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; > -+} > -diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach- > omap2/cminst44xx.h > -index 8eba2ae..a985400 100644 > ---- a/arch/arm/mach-omap2/cminst44xx.h > -+++ b/arch/arm/mach-omap2/cminst44xx.h > -@@ -18,6 +18,7 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, > s16 inst, u16 cdoffs); > - extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 > cdoffs); > - > - extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, > u16 clkctrl_offs); > -+extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, > u16 clkctrl_offs); > - > - /* > - * In an ideal world, we would not export these low-level functions, > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 00241ea..d21f49b 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -1102,6 +1102,36 @@ static int _wait_target_ready(struct > omap_hwmod *oh) > - } > - > - /** > -+ * _wait_target_disable - wait for a module to be disabled > -+ * @oh: struct omap_hwmod * > -+ * > -+ * Wait for a module @oh to enter slave idle. Returns 0 if the module > -+ * does not have an IDLEST bit or if the module successfully enters > -+ * slave idle; otherwise, pass along the return value of the > -+ * appropriate *_cm*_wait_module_idle() function. > -+ */ > -+static int _wait_target_disable(struct omap_hwmod *oh) > -+{ > -+ /* TODO: For now just handle OMAP4+ */ > -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) > -+ return 0; > -+ > -+ if (!oh) > -+ return -EINVAL; > -+ > -+ if (oh->_int_flags & _HWMOD_NO_MPU_PORT) > -+ return 0; > -+ > -+ if (oh->flags & HWMOD_NO_IDLEST) > -+ return 0; > -+ > -+ return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, > -+ oh->clkdm->cm_inst, > -+ oh->clkdm->clkdm_offs, > -+ oh->prcm.omap4.clkctrl_offs); > -+} > -+ > -+/** > - * _lookup_hardreset - fill register bit info for this hwmod/reset line > - * @oh: struct omap_hwmod * > - * @name: name of the reset line in the context of this hwmod > -@@ -1410,6 +1440,8 @@ static int _enable(struct omap_hwmod *oh) > - */ > - static int _idle(struct omap_hwmod *oh) > - { > -+ int ret; > -+ > - pr_debug("omap_hwmod: %s: idling\n", oh->name); > - > - if (oh->_state != _HWMOD_STATE_ENABLED) { > -@@ -1422,6 +1454,10 @@ static int _idle(struct omap_hwmod *oh) > - _idle_sysc(oh); > - _del_initiator_dep(oh, mpu_oh); > - _disable_clocks(oh); > -+ ret = _wait_target_disable(oh); > -+ if (ret) > -+ pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", > -+ oh->name); > - > - /* Mux pins for device idle if populated */ > - if (oh->mux && oh->mux->pads_dynamic) > -@@ -1514,6 +1550,10 @@ static int _shutdown(struct omap_hwmod *oh) > - _del_initiator_dep(oh, mpu_oh); > - /* XXX what about the other system initiators here? dma, dsp > */ > - _disable_clocks(oh); > -+ ret = _wait_target_disable(oh); > -+ if (ret) > -+ pr_warn("omap_hwmod: %s: _wait_target_disable > failed\n", > -+ oh->name); > - } > - /* XXX Should this code also force-disable the optional clocks? */ > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4- > hwmod-Replace-RSTCTRL-absolute-address-with-of.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL- > absolute-address-with-of.patch > deleted file mode 100644 > index d354899..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4-hwmod- > Replace-RSTCTRL-absolute-address-with-of.patch > +++ /dev/null > @@ -1,459 +0,0 @@ > -From ab34edbd04746da7916e720ae1f07a981ab5a298 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:31 -0600 > -Subject: [PATCH 081/149] OMAP4: hwmod: Replace RSTCTRL absolute address > with offset macros > - > -The RSTCTRL register was accessed using an absolute address. > -The usage of hardcoded macros to calculate virtual address from physical > -one should be avoided as much as possible. > -The usage of an offset will allow future improvement like migration from > -the current architecture code toward a module driver. > - > -Update prm_xxx accessors, move definition to the proper header file and > -update copyrights. > -Change the s16 register offset parameter to u16. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -[paul@pwsan.com: use '_prminst_' in function names that are part of the > - prminst44xx.c file] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 19 ++++-- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 16 ++-- > - arch/arm/mach-omap2/prm44xx.c | 93 +------------------------- > - arch/arm/mach-omap2/prm44xx.h | 4 - > - arch/arm/mach-omap2/prminst44xx.c | 93 > +++++++++++++++++++++++++- > - arch/arm/mach-omap2/prminst44xx.h | 10 +++- > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 3 +- > - 7 files changed, 125 insertions(+), 113 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index d21f49b..a0f7d31 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -149,6 +149,7 @@ > - #include "cminst44xx.h" > - #include "prm2xxx_3xxx.h" > - #include "prm44xx.h" > -+#include "prminst44xx.h" > - #include "mux.h" > - > - /* Maximum microseconds to wait for OMAP module to softreset */ > -@@ -1187,8 +1188,10 @@ static int _assert_hardreset(struct omap_hwmod > *oh, const char *name) > - return omap2_prm_assert_hardreset(oh- > >prcm.omap2.module_offs, > - ohri.rst_shift); > - else if (cpu_is_omap44xx()) > -- return omap4_prm_assert_hardreset(oh- > >prcm.omap4.rstctrl_reg, > -- ohri.rst_shift); > -+ return omap4_prminst_assert_hardreset(ohri.rst_shift, > -+ oh->clkdm->pwrdm.ptr->prcm_partition, > -+ oh->clkdm->pwrdm.ptr->prcm_offs, > -+ oh->prcm.omap4.rstctrl_offs); > - else > - return -EINVAL; > - } > -@@ -1223,8 +1226,10 @@ static int _deassert_hardreset(struct > omap_hwmod *oh, const char *name) > - if (ohri.st_shift) > - pr_err("omap_hwmod: %s: %s: hwmod data error: > OMAP4 does not support st_shift\n", > - oh->name, name); > -- ret = omap4_prm_deassert_hardreset(oh- > >prcm.omap4.rstctrl_reg, > -- ohri.rst_shift); > -+ ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, > -+ oh->clkdm->pwrdm.ptr->prcm_partition, > -+ oh->clkdm->pwrdm.ptr->prcm_offs, > -+ oh->prcm.omap4.rstctrl_offs); > - } else { > - return -EINVAL; > - } > -@@ -1259,8 +1264,10 @@ static int _read_hardreset(struct omap_hwmod > *oh, const char *name) > - return omap2_prm_is_hardreset_asserted(oh- > >prcm.omap2.module_offs, > - ohri.st_shift); > - } else if (cpu_is_omap44xx()) { > -- return omap4_prm_is_hardreset_asserted(oh- > >prcm.omap4.rstctrl_reg, > -- ohri.rst_shift); > -+ return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, > -+ oh->clkdm->pwrdm.ptr->prcm_partition, > -+ oh->clkdm->pwrdm.ptr->prcm_offs, > -+ oh->prcm.omap4.rstctrl_offs); > - } else { > - return -EINVAL; > - } > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 00d7130..6a190f5 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -1144,7 +1144,7 @@ static struct omap_hwmod > omap44xx_dsp_c0_hwmod = { > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), > - .prcm = { > - .omap4 = { > -- .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, > -+ .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, > - }, > - }, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -1161,7 +1161,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod > = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, > -- .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, > -+ .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_dsp_slaves, > -@@ -2526,7 +2526,7 @@ static struct omap_hwmod > omap44xx_ipu_c0_hwmod = { > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), > - .prcm = { > - .omap4 = { > -- .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, > -+ .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, > - }, > - }, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -2542,7 +2542,7 @@ static struct omap_hwmod > omap44xx_ipu_c1_hwmod = { > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), > - .prcm = { > - .omap4 = { > -- .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, > -+ .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, > - }, > - }, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -2559,7 +2559,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod > = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, > -- .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, > -+ .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_ipu_slaves, > -@@ -2726,7 +2726,7 @@ static struct omap_hwmod > omap44xx_iva_seq0_hwmod = { > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), > - .prcm = { > - .omap4 = { > -- .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, > -+ .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, > - }, > - }, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -2742,7 +2742,7 @@ static struct omap_hwmod > omap44xx_iva_seq1_hwmod = { > - .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), > - .prcm = { > - .omap4 = { > -- .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, > -+ .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, > - }, > - }, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -2759,7 +2759,7 @@ static struct omap_hwmod omap44xx_iva_hwmod > = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, > -- .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, > -+ .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, > - }, > - }, > - .slaves = omap44xx_iva_slaves, > -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach- > omap2/prm44xx.c > -index a2a04bf..faec860 100644 > ---- a/arch/arm/mach-omap2/prm44xx.c > -+++ b/arch/arm/mach-omap2/prm44xx.c > -@@ -1,7 +1,7 @@ > - /* > - * OMAP4 PRM module functions > - * > -- * Copyright (C) 2010 Texas Instruments, Inc. > -+ * Copyright (C) 2011 Texas Instruments, Inc. > - * Copyright (C) 2010 Nokia Corporation > - * Benoît Cousson > - * Paul Walmsley > -@@ -24,12 +24,6 @@ > - #include "prm44xx.h" > - #include "prm-regbits-44xx.h" > - > --/* > -- * Address offset (in bytes) between the reset control and the reset > -- * status registers: 4 bytes on OMAP4 > -- */ > --#define OMAP4_RST_CTRL_ST_OFFSET 4 > -- > - /* PRM low-level functions */ > - > - /* Read a register in a CM/PRM instance in the PRM module */ > -@@ -94,91 +88,6 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, > s16 reg) > - return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); > - } > - > --/** > -- * omap4_prm_is_hardreset_asserted - read the HW reset line state of > -- * submodules contained in the hwmod module > -- * @rstctrl_reg: RM_RSTCTRL register address for this module > -- * @shift: register bit shift corresponding to the reset line to check > -- * > -- * Returns 1 if the (sub)module hardreset line is currently asserted, > -- * 0 if the (sub)module hardreset line is not currently asserted, or > -- * -EINVAL upon parameter error. > -- */ > --int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift) > --{ > -- if (!cpu_is_omap44xx() || !rstctrl_reg) > -- return -EINVAL; > -- > -- return omap4_prm_read_bits_shift(rstctrl_reg, (1 << shift)); > --} > -- > --/** > -- * omap4_prm_assert_hardreset - assert the HW reset line of a submodule > -- * @rstctrl_reg: RM_RSTCTRL register address for this module > -- * @shift: register bit shift corresponding to the reset line to assert > -- * > -- * Some IPs like dsp, ipu or iva contain processors that require an HW > -- * reset line to be asserted / deasserted in order to fully enable the > -- * IP. These modules may have multiple hard-reset lines that reset > -- * different 'submodules' inside the IP block. This function will > -- * place the submodule into reset. Returns 0 upon success or -EINVAL > -- * upon an argument error. > -- */ > --int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift) > --{ > -- u32 mask; > -- > -- if (!cpu_is_omap44xx() || !rstctrl_reg) > -- return -EINVAL; > -- > -- mask = 1 << shift; > -- omap4_prm_rmw_reg_bits(mask, mask, rstctrl_reg); > -- > -- return 0; > --} > -- > --/** > -- * omap4_prm_deassert_hardreset - deassert a submodule hardreset line and > wait > -- * @rstctrl_reg: RM_RSTCTRL register address for this module > -- * @shift: register bit shift corresponding to the reset line to deassert > -- * > -- * Some IPs like dsp, ipu or iva contain processors that require an HW > -- * reset line to be asserted / deasserted in order to fully enable the > -- * IP. These modules may have multiple hard-reset lines that reset > -- * different 'submodules' inside the IP block. This function will > -- * take the submodule out of reset and wait until the PRCM indicates > -- * that the reset has completed before returning. Returns 0 upon success or > -- * -EINVAL upon an argument error, -EEXIST if the submodule was already out > -- * of reset, or -EBUSY if the submodule did not exit reset promptly. > -- */ > --int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift) > --{ > -- u32 mask; > -- void __iomem *rstst_reg; > -- int c; > -- > -- if (!cpu_is_omap44xx() || !rstctrl_reg) > -- return -EINVAL; > -- > -- rstst_reg = rstctrl_reg + OMAP4_RST_CTRL_ST_OFFSET; > -- > -- mask = 1 << shift; > -- > -- /* Check the current status to avoid de-asserting the line twice */ > -- if (omap4_prm_read_bits_shift(rstctrl_reg, mask) == 0) > -- return -EEXIST; > -- > -- /* Clear the reset status by writing 1 to the status bit */ > -- omap4_prm_rmw_reg_bits(0xffffffff, mask, rstst_reg); > -- /* de-assert the reset control line */ > -- omap4_prm_rmw_reg_bits(mask, 0, rstctrl_reg); > -- /* wait the status to be set */ > -- omap_test_timeout(omap4_prm_read_bits_shift(rstst_reg, mask), > -- MAX_MODULE_HARDRESET_WAIT, c); > -- > -- return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; > --} > -- > - void omap4_prm_global_warm_sw_reset(void) > - { > - u32 v; > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index 6e53120..3732e02 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -755,10 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, > s16 inst, s16 idx); > - extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); > - extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); > - > --extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 > shift); > --extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift); > --extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 > shift); > -- > - extern void omap4_prm_global_warm_sw_reset(void); > - > - # endif > -diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach- > omap2/prminst44xx.c > -index a303242..35e02aa 100644 > ---- a/arch/arm/mach-omap2/prminst44xx.c > -+++ b/arch/arm/mach-omap2/prminst44xx.c > -@@ -2,6 +2,7 @@ > - * OMAP4 PRM instance functions > - * > - * Copyright (C) 2009 Nokia Corporation > -+ * Copyright (C) 2011 Texas Instruments, Inc. > - * Paul Walmsley > - * > - * This program is free software; you can redistribute it and/or modify > -@@ -53,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, > s16 inst, u16 idx) > - > - /* Read-modify-write a register in PRM. Caller must lock */ > - u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, > -- s16 idx) > -+ u16 idx) > - { > - u32 v; > - > -@@ -64,3 +65,93 @@ u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, > u32 bits, u8 part, s16 inst, > - > - return v; > - } > -+ > -+/* > -+ * Address offset (in bytes) between the reset control and the reset > -+ * status registers: 4 bytes on OMAP4 > -+ */ > -+#define OMAP4_RST_CTRL_ST_OFFSET 4 > -+ > -+/** > -+ * omap4_prminst_is_hardreset_asserted - read the HW reset line state of > -+ * submodules contained in the hwmod module > -+ * @rstctrl_reg: RM_RSTCTRL register address for this module > -+ * @shift: register bit shift corresponding to the reset line to check > -+ * > -+ * Returns 1 if the (sub)module hardreset line is currently asserted, > -+ * 0 if the (sub)module hardreset line is not currently asserted, or > -+ * -EINVAL upon parameter error. > -+ */ > -+int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, > -+ u16 rstctrl_offs) > -+{ > -+ u32 v; > -+ > -+ v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); > -+ v &= 1 << shift; > -+ v >>= shift; > -+ > -+ return v; > -+} > -+ > -+/** > -+ * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule > -+ * @rstctrl_reg: RM_RSTCTRL register address for this module > -+ * @shift: register bit shift corresponding to the reset line to assert > -+ * > -+ * Some IPs like dsp, ipu or iva contain processors that require an HW > -+ * reset line to be asserted / deasserted in order to fully enable the > -+ * IP. These modules may have multiple hard-reset lines that reset > -+ * different 'submodules' inside the IP block. This function will > -+ * place the submodule into reset. Returns 0 upon success or -EINVAL > -+ * upon an argument error. > -+ */ > -+int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, > -+ u16 rstctrl_offs) > -+{ > -+ u32 mask = 1 << shift; > -+ > -+ omap4_prminst_rmw_inst_reg_bits(mask, mask, part, inst, > rstctrl_offs); > -+ > -+ return 0; > -+} > -+ > -+/** > -+ * omap4_prminst_deassert_hardreset - deassert a submodule hardreset line > and > -+ * wait > -+ * @rstctrl_reg: RM_RSTCTRL register address for this module > -+ * @shift: register bit shift corresponding to the reset line to deassert > -+ * > -+ * Some IPs like dsp, ipu or iva contain processors that require an HW > -+ * reset line to be asserted / deasserted in order to fully enable the > -+ * IP. These modules may have multiple hard-reset lines that reset > -+ * different 'submodules' inside the IP block. This function will > -+ * take the submodule out of reset and wait until the PRCM indicates > -+ * that the reset has completed before returning. Returns 0 upon success or > -+ * -EINVAL upon an argument error, -EEXIST if the submodule was already out > -+ * of reset, or -EBUSY if the submodule did not exit reset promptly. > -+ */ > -+int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, > -+ u16 rstctrl_offs) > -+{ > -+ int c; > -+ u32 mask = 1 << shift; > -+ u16 rstst_offs = rstctrl_offs + OMAP4_RST_CTRL_ST_OFFSET; > -+ > -+ /* Check the current status to avoid de-asserting the line twice */ > -+ if (omap4_prminst_is_hardreset_asserted(shift, part, inst, > -+ rstctrl_offs) == 0) > -+ return -EEXIST; > -+ > -+ /* Clear the reset status by writing 1 to the status bit */ > -+ omap4_prminst_rmw_inst_reg_bits(0xffffffff, mask, part, inst, > -+ rstst_offs); > -+ /* de-assert the reset control line */ > -+ omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs); > -+ /* wait the status to be set */ > -+ omap_test_timeout(omap4_prminst_is_hardreset_asserted(shift, part, > inst, > -+ rstst_offs), > -+ MAX_MODULE_HARDRESET_WAIT, c); > -+ > -+ return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; > -+} > -diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach- > omap2/prminst44xx.h > -index 02dd66d..c14ae29 100644 > ---- a/arch/arm/mach-omap2/prminst44xx.h > -+++ b/arch/arm/mach-omap2/prminst44xx.h > -@@ -2,6 +2,7 @@ > - * OMAP4 Power/Reset Management (PRM) function prototypes > - * > - * Copyright (C) 2010 Nokia Corporation > -+ * Copyright (C) 2011 Texas Instruments, Inc. > - * Paul Walmsley > - * > - * This program is free software; you can redistribute it and/or modify > -@@ -18,8 +19,15 @@ > - extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx); > - extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 > idx); > - extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, > -- s16 inst, s16 idx); > -+ s16 inst, u16 idx); > - > - extern void omap4_prm_global_warm_sw_reset(void); > - > -+extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, > -+ u16 rstctrl_offs); > -+extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, > -+ u16 rstctrl_offs); > -+extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, > -+ u16 rstctrl_offs); > -+ > - #endif > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index fc54355..9ef4424 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -2,6 +2,7 @@ > - * omap_hwmod macros, structures > - * > - * Copyright (C) 2009-2011 Nokia Corporation > -+ * Copyright (C) 2011 Texas Instruments, Inc. > - * Paul Walmsley > - * > - * Created in collaboration with (alphabetical order): Benoît Cousson, > -@@ -361,7 +362,7 @@ struct omap_hwmod_omap2_prcm { > - */ > - struct omap_hwmod_omap4_prcm { > - u16 clkctrl_offs; > -- void __iomem *rstctrl_reg; > -+ u16 rstctrl_offs; > - u8 submodule_wkdep_bit; > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0082-OMAP4-prm- > Replace-warm-reset-API-with-the-offset-bas.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the- > offset-bas.patch > deleted file mode 100644 > index 74c8414..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0082-OMAP4-prm-Replace- > warm-reset-API-with-the-offset-bas.patch > +++ /dev/null > @@ -1,125 +0,0 @@ > -From 21fe73d93ffbba01a14a70664d4f79cb680d12c0 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:31 -0600 > -Subject: [PATCH 082/149] OMAP4: prm: Replace warm reset API with the > offset based version > - > -The warm reset function was still using the obsolete API. > -Replace it by the new one and move the file to the proper c file. > - > -Change the function names to stick to the file convention as > -suggested by Paul Walmsley <paul@pwsan.com>: > -prm_xxx -> prminst_xxx > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/prcm.c | 2 +- > - arch/arm/mach-omap2/prm44xx.c | 15 --------------- > - arch/arm/mach-omap2/prm44xx.h | 2 -- > - arch/arm/mach-omap2/prminst44xx.c | 19 +++++++++++++++++++ > - arch/arm/mach-omap2/prminst44xx.h | 8 ++++---- > - 5 files changed, 24 insertions(+), 22 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c > -index 6be1438..2e40a5c 100644 > ---- a/arch/arm/mach-omap2/prcm.c > -+++ b/arch/arm/mach-omap2/prcm.c > -@@ -70,7 +70,7 @@ static void omap_prcm_arch_reset(char mode, const > char *cmd) > - prcm_offs = OMAP3430_GR_MOD; > - omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); > - } else if (cpu_is_omap44xx()) { > -- omap4_prm_global_warm_sw_reset(); /* never returns */ > -+ omap4_prminst_global_warm_sw_reset(); /* never returns */ > - } else { > - WARN_ON(1); > - } > -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach- > omap2/prm44xx.c > -index faec860..f815329 100644 > ---- a/arch/arm/mach-omap2/prm44xx.c > -+++ b/arch/arm/mach-omap2/prm44xx.c > -@@ -87,18 +87,3 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, > s16 reg) > - { > - return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); > - } > -- > --void omap4_prm_global_warm_sw_reset(void) > --{ > -- u32 v; > -- > -- v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, > -- OMAP4_RM_RSTCTRL); > -- v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; > -- omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST, > -- OMAP4_RM_RSTCTRL); > -- > -- /* OCP barrier */ > -- v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, > -- OMAP4_RM_RSTCTRL); > --} > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index 3732e02..725a6a8 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -755,8 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, > s16 inst, s16 idx); > - extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); > - extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); > - > --extern void omap4_prm_global_warm_sw_reset(void); > -- > - # endif > - > - #endif > -diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach- > omap2/prminst44xx.c > -index 35e02aa..3a7bab1 100644 > ---- a/arch/arm/mach-omap2/prminst44xx.c > -+++ b/arch/arm/mach-omap2/prminst44xx.c > -@@ -155,3 +155,22 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 > part, s16 inst, > - > - return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; > - } > -+ > -+ > -+void omap4_prminst_global_warm_sw_reset(void) > -+{ > -+ u32 v; > -+ > -+ v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > -+ OMAP4430_PRM_DEVICE_INST, > -+ OMAP4_PRM_RSTCTRL_OFFSET); > -+ v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; > -+ omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION, > -+ OMAP4430_PRM_DEVICE_INST, > -+ OMAP4_PRM_RSTCTRL_OFFSET); > -+ > -+ /* OCP barrier */ > -+ v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > -+ OMAP4430_PRM_DEVICE_INST, > -+ OMAP4_PRM_RSTCTRL_OFFSET); > -+} > -diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach- > omap2/prminst44xx.h > -index c14ae29..46f2efb 100644 > ---- a/arch/arm/mach-omap2/prminst44xx.h > -+++ b/arch/arm/mach-omap2/prminst44xx.h > -@@ -21,13 +21,13 @@ extern void omap4_prminst_write_inst_reg(u32 val, > u8 part, s16 inst, u16 idx); > - extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, > - s16 inst, u16 idx); > - > --extern void omap4_prm_global_warm_sw_reset(void); > -+extern void omap4_prminst_global_warm_sw_reset(void); > - > - extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, > -- u16 rstctrl_offs); > -+ u16 rstctrl_offs); > - extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, > -- u16 rstctrl_offs); > -+ u16 rstctrl_offs); > - extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, > -- u16 rstctrl_offs); > -+ u16 rstctrl_offs); > - > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0083-OMAP4-prm- > Remove-deprecated-functions.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch > deleted file mode 100644 > index 403764f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0083-OMAP4-prm- > Remove-deprecated-functions.patch > +++ /dev/null > @@ -1,81 +0,0 @@ > -From fd94741b5ca1552a0c6e8c000f9f7530853862ea Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:31 -0600 > -Subject: [PATCH 083/149] OMAP4: prm: Remove deprecated functions > - > -The new prminst_xxx accessors based on partition and offset > -is now used, so removed all the previous prcm_xxx accessors. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -[paul@pwsan.com: remove fn prototypes also] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/prm44xx.c | 37 ------------------------------------- > - arch/arm/mach-omap2/prm44xx.h | 4 ---- > - 2 files changed, 0 insertions(+), 41 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach- > omap2/prm44xx.c > -index f815329..0016555 100644 > ---- a/arch/arm/mach-omap2/prm44xx.c > -+++ b/arch/arm/mach-omap2/prm44xx.c > -@@ -50,40 +50,3 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 > bits, s16 inst, s16 reg) > - > - return v; > - } > -- > --/* Read a PRM register, AND it, and shift the result down to bit 0 */ > --/* XXX deprecated */ > --u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) > --{ > -- u32 v; > -- > -- v = __raw_readl(reg); > -- v &= mask; > -- v >>= __ffs(mask); > -- > -- return v; > --} > -- > --/* Read-modify-write a register in a PRM module. Caller must lock */ > --/* XXX deprecated */ > --u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) > --{ > -- u32 v; > -- > -- v = __raw_readl(reg); > -- v &= ~mask; > -- v |= bits; > -- __raw_writel(v, reg); > -- > -- return v; > --} > -- > --u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg) > --{ > -- return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg); > --} > -- > --u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) > --{ > -- return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); > --} > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index 725a6a8..7dfa379 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -750,10 +750,6 @@ > - extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); > - extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); > - extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 > idx); > --extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem > *reg); > --extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); > --extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); > --extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); > - > - # endif > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4- > hwmod-data-Add-PRM-context-register-offset.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM- > context-register-offset.patch > deleted file mode 100644 > index f4e1889..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4-hwmod- > data-Add-PRM-context-register-offset.patch > +++ /dev/null > @@ -1,630 +0,0 @@ > -From 77eafa703d62b15f2e1021beb2f5437b6b2764ed Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:32 -0600 > -Subject: [PATCH 084/149] OMAP4: hwmod data: Add PRM context register > offset > - > -Add a 'context_offs' entry in the prcm.omap4 structure to all > -IPs when applicable. > -The offset will be used to retrieve the per module context lost > -information now available on OMAP4. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 74 > ++++++++++++++++++++++++++ > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + > - 2 files changed, 75 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index 6a190f5..d68ef2c 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -127,6 +127,7 @@ static struct omap_hwmod omap44xx_dmm_hwmod > = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_dmm_slaves, > -@@ -183,6 +184,7 @@ static struct omap_hwmod > omap44xx_emif_fw_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_emif_fw_slaves, > -@@ -228,6 +230,7 @@ static struct omap_hwmod > omap44xx_l3_instr_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_l3_instr_slaves, > -@@ -327,6 +330,7 @@ static struct omap_hwmod > omap44xx_l3_main_1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_l3_main_1_slaves, > -@@ -428,6 +432,7 @@ static struct omap_hwmod > omap44xx_l3_main_2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_l3_main_2_slaves, > -@@ -484,6 +489,7 @@ static struct omap_hwmod > omap44xx_l3_main_3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_l3_main_3_slaves, > -@@ -575,6 +581,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod > = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_l4_cfg_slaves, > -@@ -603,6 +610,7 @@ static struct omap_hwmod > omap44xx_l4_per_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_l4_per_slaves, > -@@ -631,6 +639,7 @@ static struct omap_hwmod > omap44xx_l4_wkup_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_l4_wkup_slaves, > -@@ -809,6 +818,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = > { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_aess_slaves, > -@@ -899,6 +909,7 @@ static struct omap_hwmod > omap44xx_counter_32k_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_counter_32k_slaves, > -@@ -983,6 +994,7 @@ static struct omap_hwmod > omap44xx_dma_system_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET, > - }, > - }, > - .dev_attr = &dma_dev_attr, > -@@ -1077,6 +1089,7 @@ static struct omap_hwmod > omap44xx_dmic_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_dmic_slaves, > -@@ -1162,6 +1175,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod > = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, > - .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_dsp_slaves, > -@@ -1250,6 +1264,7 @@ static struct omap_hwmod omap44xx_dss_hwmod > = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = dss_opt_clks, > -@@ -1354,6 +1369,7 @@ static struct omap_hwmod > omap44xx_dss_dispc_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = dss_dispc_opt_clks, > -@@ -1452,6 +1468,7 @@ static struct omap_hwmod > omap44xx_dss_dsi1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = dss_dsi1_opt_clks, > -@@ -1529,6 +1546,7 @@ static struct omap_hwmod > omap44xx_dss_dsi2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = dss_dsi2_opt_clks, > -@@ -1626,6 +1644,7 @@ static struct omap_hwmod > omap44xx_dss_hdmi_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = dss_hdmi_opt_clks, > -@@ -1717,6 +1736,7 @@ static struct omap_hwmod > omap44xx_dss_rfbi_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = dss_rfbi_opt_clks, > -@@ -1787,6 +1807,7 @@ static struct omap_hwmod > omap44xx_dss_venc_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_dss_venc_slaves, > -@@ -1866,6 +1887,7 @@ static struct omap_hwmod > omap44xx_gpio1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = gpio1_opt_clks, > -@@ -1920,6 +1942,7 @@ static struct omap_hwmod > omap44xx_gpio2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = gpio2_opt_clks, > -@@ -1974,6 +1997,7 @@ static struct omap_hwmod > omap44xx_gpio3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = gpio3_opt_clks, > -@@ -2028,6 +2052,7 @@ static struct omap_hwmod > omap44xx_gpio4_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = gpio4_opt_clks, > -@@ -2082,6 +2107,7 @@ static struct omap_hwmod > omap44xx_gpio5_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = gpio5_opt_clks, > -@@ -2136,6 +2162,7 @@ static struct omap_hwmod > omap44xx_gpio6_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = gpio6_opt_clks, > -@@ -2215,6 +2242,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod > = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_hsi_slaves, > -@@ -2298,6 +2326,7 @@ static struct omap_hwmod > omap44xx_i2c1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_i2c1_slaves, > -@@ -2353,6 +2382,7 @@ static struct omap_hwmod > omap44xx_i2c2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_i2c2_slaves, > -@@ -2408,6 +2438,7 @@ static struct omap_hwmod > omap44xx_i2c3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_i2c3_slaves, > -@@ -2463,6 +2494,7 @@ static struct omap_hwmod > omap44xx_i2c4_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_i2c4_slaves, > -@@ -2560,6 +2592,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod > = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, > - .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_ipu_slaves, > -@@ -2646,6 +2679,7 @@ static struct omap_hwmod omap44xx_iss_hwmod > = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_CAM_ISS_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = iss_opt_clks, > -@@ -2760,6 +2794,7 @@ static struct omap_hwmod omap44xx_iva_hwmod > = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, > - .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_iva_slaves, > -@@ -2830,6 +2865,7 @@ static struct omap_hwmod > omap44xx_kbd_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_kbd_slaves, > -@@ -2895,6 +2931,7 @@ static struct omap_hwmod > omap44xx_mailbox_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mailbox_slaves, > -@@ -2988,6 +3025,7 @@ static struct omap_hwmod > omap44xx_mcbsp1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcbsp1_slaves, > -@@ -3062,6 +3100,7 @@ static struct omap_hwmod > omap44xx_mcbsp2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcbsp2_slaves, > -@@ -3136,6 +3175,7 @@ static struct omap_hwmod > omap44xx_mcbsp3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcbsp3_slaves, > -@@ -3189,6 +3229,7 @@ static struct omap_hwmod > omap44xx_mcbsp4_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcbsp4_slaves, > -@@ -3282,6 +3323,7 @@ static struct omap_hwmod > omap44xx_mcpdm_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_PDM_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mcpdm_slaves, > -@@ -3368,6 +3410,7 @@ static struct omap_hwmod > omap44xx_mcspi1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET, > - }, > - }, > - .dev_attr = &mcspi1_dev_attr, > -@@ -3429,6 +3472,7 @@ static struct omap_hwmod > omap44xx_mcspi2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET, > - }, > - }, > - .dev_attr = &mcspi2_dev_attr, > -@@ -3490,6 +3534,7 @@ static struct omap_hwmod > omap44xx_mcspi3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET, > - }, > - }, > - .dev_attr = &mcspi3_dev_attr, > -@@ -3549,6 +3594,7 @@ static struct omap_hwmod > omap44xx_mcspi4_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET, > - }, > - }, > - .dev_attr = &mcspi4_dev_attr, > -@@ -3634,6 +3680,7 @@ static struct omap_hwmod > omap44xx_mmc1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET, > - }, > - }, > - .dev_attr = &mmc1_dev_attr, > -@@ -3694,6 +3741,7 @@ static struct omap_hwmod > omap44xx_mmc2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mmc2_slaves, > -@@ -3749,6 +3797,7 @@ static struct omap_hwmod > omap44xx_mmc3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mmc3_slaves, > -@@ -3803,6 +3852,7 @@ static struct omap_hwmod > omap44xx_mmc4_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mmc4_slaves, > -@@ -3856,6 +3906,7 @@ static struct omap_hwmod > omap44xx_mmc5_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_mmc5_slaves, > -@@ -3897,6 +3948,7 @@ static struct omap_hwmod > omap44xx_mpu_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_MPU_MPU_CONTEXT_OFFSET, > - }, > - }, > - .masters = omap44xx_mpu_masters, > -@@ -3971,6 +4023,7 @@ static struct omap_hwmod > omap44xx_smartreflex_core_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_smartreflex_core_slaves, > -@@ -4018,6 +4071,7 @@ static struct omap_hwmod > omap44xx_smartreflex_iva_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_smartreflex_iva_slaves, > -@@ -4065,6 +4119,7 @@ static struct omap_hwmod > omap44xx_smartreflex_mpu_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_smartreflex_mpu_slaves, > -@@ -4127,6 +4182,7 @@ static struct omap_hwmod > omap44xx_spinlock_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_spinlock_slaves, > -@@ -4211,6 +4267,7 @@ static struct omap_hwmod > omap44xx_timer1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer1_slaves, > -@@ -4257,6 +4314,7 @@ static struct omap_hwmod > omap44xx_timer2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer2_slaves, > -@@ -4303,6 +4361,7 @@ static struct omap_hwmod > omap44xx_timer3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer3_slaves, > -@@ -4349,6 +4408,7 @@ static struct omap_hwmod > omap44xx_timer4_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer4_slaves, > -@@ -4414,6 +4474,7 @@ static struct omap_hwmod > omap44xx_timer5_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer5_slaves, > -@@ -4480,6 +4541,7 @@ static struct omap_hwmod > omap44xx_timer6_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer6_slaves, > -@@ -4545,6 +4607,7 @@ static struct omap_hwmod > omap44xx_timer7_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer7_slaves, > -@@ -4610,6 +4673,7 @@ static struct omap_hwmod > omap44xx_timer8_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer8_slaves, > -@@ -4656,6 +4720,7 @@ static struct omap_hwmod > omap44xx_timer9_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer9_slaves, > -@@ -4702,6 +4767,7 @@ static struct omap_hwmod > omap44xx_timer10_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer10_slaves, > -@@ -4748,6 +4814,7 @@ static struct omap_hwmod > omap44xx_timer11_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_timer11_slaves, > -@@ -4823,6 +4890,7 @@ static struct omap_hwmod > omap44xx_uart1_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_uart1_slaves, > -@@ -4876,6 +4944,7 @@ static struct omap_hwmod > omap44xx_uart2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_uart2_slaves, > -@@ -4930,6 +4999,7 @@ static struct omap_hwmod > omap44xx_uart3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_uart3_slaves, > -@@ -4983,6 +5053,7 @@ static struct omap_hwmod > omap44xx_uart4_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_uart4_slaves, > -@@ -5062,6 +5133,7 @@ static struct omap_hwmod > omap44xx_usb_otg_hs_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET, > - }, > - }, > - .opt_clks = usb_otg_hs_opt_clks, > -@@ -5135,6 +5207,7 @@ static struct omap_hwmod > omap44xx_wd_timer2_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_wd_timer2_slaves, > -@@ -5200,6 +5273,7 @@ static struct omap_hwmod > omap44xx_wd_timer3_hwmod = { > - .prcm = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, > -+ .context_offs = > OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, > - }, > - }, > - .slaves = omap44xx_wd_timer3_slaves, > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index 9ef4424..16439fa 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -363,6 +363,7 @@ struct omap_hwmod_omap2_prcm { > - struct omap_hwmod_omap4_prcm { > - u16 clkctrl_offs; > - u16 rstctrl_offs; > -+ u16 context_offs; > - u8 submodule_wkdep_bit; > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4- > hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4-hwmod-data-Add- > modulemode-entry-in-omap_hwmod-.patch > deleted file mode 100644 > index c752359..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4-hwmod- > data-Add-modulemode-entry-in-omap_hwmod-.patch > +++ /dev/null > @@ -1,503 +0,0 @@ > -From be3f7a2833bf720dcb60b40675a790024995ac27 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:32 -0600 > -Subject: [PATCH 085/149] OMAP4: hwmod data: Add modulemode entry in > omap_hwmod structure > - > -Add a new field to provide the mode supported by the module. > -The mode will control the way mandatory clocks are managed by the PRCM. > - > - 0 : Module is temporarily disabled by SW. OCP access to module are stalled. > - Can be used to change timing parameter of GPMC module. > - 1 : Module is managed automatically by HW according to clock domain > - transition. A clock domain sleep transition put module into idle. > - A wakeup domain transition put it back into function. > - If CLKTRCTRL=3, any OCP access to module is always granted. > - Module clocks may be gated according to the clock domain state. > - 2 : Module is explicitly enabled. Interface clock (if not used for > - functions) may be gated according to the clock domain state. > - Functional clocks are guarantied to stay present. As long as > - in this configuration, power domain sleep transition cannot happen. > - > -Some modules will have a modulemode initialized at 1 (HWCTRL) by default. > -This is the case for interconnect and simple module like GPIO, WDT, MAILBOX. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 55 > ++++++++++++++++++++++++++ > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 6 +++ > - 2 files changed, 61 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -index d68ef2c..6201422 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c > -@@ -231,6 +231,7 @@ static struct omap_hwmod > omap44xx_l3_instr_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .slaves = omap44xx_l3_instr_slaves, > -@@ -490,6 +491,7 @@ static struct omap_hwmod > omap44xx_l3_main_3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .slaves = omap44xx_l3_main_3_slaves, > -@@ -819,6 +821,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = > { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_aess_slaves, > -@@ -1090,6 +1093,7 @@ static struct omap_hwmod > omap44xx_dmic_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_dmic_slaves, > -@@ -1176,6 +1180,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod > = { > - .clkctrl_offs = > OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, > - .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, > - .context_offs = > OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .slaves = omap44xx_dsp_slaves, > -@@ -1888,6 +1893,7 @@ static struct omap_hwmod > omap44xx_gpio1_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .opt_clks = gpio1_opt_clks, > -@@ -1943,6 +1949,7 @@ static struct omap_hwmod > omap44xx_gpio2_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .opt_clks = gpio2_opt_clks, > -@@ -1998,6 +2005,7 @@ static struct omap_hwmod > omap44xx_gpio3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .opt_clks = gpio3_opt_clks, > -@@ -2053,6 +2061,7 @@ static struct omap_hwmod > omap44xx_gpio4_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .opt_clks = gpio4_opt_clks, > -@@ -2108,6 +2117,7 @@ static struct omap_hwmod > omap44xx_gpio5_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .opt_clks = gpio5_opt_clks, > -@@ -2163,6 +2173,7 @@ static struct omap_hwmod > omap44xx_gpio6_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .opt_clks = gpio6_opt_clks, > -@@ -2243,6 +2254,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod > = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .slaves = omap44xx_hsi_slaves, > -@@ -2327,6 +2339,7 @@ static struct omap_hwmod > omap44xx_i2c1_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_i2c1_slaves, > -@@ -2383,6 +2396,7 @@ static struct omap_hwmod > omap44xx_i2c2_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_i2c2_slaves, > -@@ -2439,6 +2453,7 @@ static struct omap_hwmod > omap44xx_i2c3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_i2c3_slaves, > -@@ -2495,6 +2510,7 @@ static struct omap_hwmod > omap44xx_i2c4_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_i2c4_slaves, > -@@ -2593,6 +2609,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod > = { > - .clkctrl_offs = > OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, > - .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, > - .context_offs = > OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .slaves = omap44xx_ipu_slaves, > -@@ -2680,6 +2697,7 @@ static struct omap_hwmod omap44xx_iss_hwmod > = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_CAM_ISS_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .opt_clks = iss_opt_clks, > -@@ -2795,6 +2813,7 @@ static struct omap_hwmod omap44xx_iva_hwmod > = { > - .clkctrl_offs = > OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, > - .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, > - .context_offs = > OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .slaves = omap44xx_iva_slaves, > -@@ -2866,6 +2885,7 @@ static struct omap_hwmod > omap44xx_kbd_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_kbd_slaves, > -@@ -3026,6 +3046,7 @@ static struct omap_hwmod > omap44xx_mcbsp1_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mcbsp1_slaves, > -@@ -3101,6 +3122,7 @@ static struct omap_hwmod > omap44xx_mcbsp2_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mcbsp2_slaves, > -@@ -3176,6 +3198,7 @@ static struct omap_hwmod > omap44xx_mcbsp3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mcbsp3_slaves, > -@@ -3230,6 +3253,7 @@ static struct omap_hwmod > omap44xx_mcbsp4_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mcbsp4_slaves, > -@@ -3324,6 +3348,7 @@ static struct omap_hwmod > omap44xx_mcpdm_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_PDM_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mcpdm_slaves, > -@@ -3411,6 +3436,7 @@ static struct omap_hwmod > omap44xx_mcspi1_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .dev_attr = &mcspi1_dev_attr, > -@@ -3473,6 +3499,7 @@ static struct omap_hwmod > omap44xx_mcspi2_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .dev_attr = &mcspi2_dev_attr, > -@@ -3535,6 +3562,7 @@ static struct omap_hwmod > omap44xx_mcspi3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .dev_attr = &mcspi3_dev_attr, > -@@ -3595,6 +3623,7 @@ static struct omap_hwmod > omap44xx_mcspi4_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .dev_attr = &mcspi4_dev_attr, > -@@ -3681,6 +3710,7 @@ static struct omap_hwmod > omap44xx_mmc1_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .dev_attr = &mmc1_dev_attr, > -@@ -3742,6 +3772,7 @@ static struct omap_hwmod > omap44xx_mmc2_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mmc2_slaves, > -@@ -3798,6 +3829,7 @@ static struct omap_hwmod > omap44xx_mmc3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mmc3_slaves, > -@@ -3853,6 +3885,7 @@ static struct omap_hwmod > omap44xx_mmc4_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mmc4_slaves, > -@@ -3907,6 +3940,7 @@ static struct omap_hwmod > omap44xx_mmc5_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_mmc5_slaves, > -@@ -4024,6 +4058,7 @@ static struct omap_hwmod > omap44xx_smartreflex_core_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_smartreflex_core_slaves, > -@@ -4072,6 +4107,7 @@ static struct omap_hwmod > omap44xx_smartreflex_iva_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_smartreflex_iva_slaves, > -@@ -4120,6 +4156,7 @@ static struct omap_hwmod > omap44xx_smartreflex_mpu_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_smartreflex_mpu_slaves, > -@@ -4268,6 +4305,7 @@ static struct omap_hwmod > omap44xx_timer1_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer1_slaves, > -@@ -4315,6 +4353,7 @@ static struct omap_hwmod > omap44xx_timer2_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer2_slaves, > -@@ -4362,6 +4401,7 @@ static struct omap_hwmod > omap44xx_timer3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer3_slaves, > -@@ -4409,6 +4449,7 @@ static struct omap_hwmod > omap44xx_timer4_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer4_slaves, > -@@ -4475,6 +4516,7 @@ static struct omap_hwmod > omap44xx_timer5_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer5_slaves, > -@@ -4542,6 +4584,7 @@ static struct omap_hwmod > omap44xx_timer6_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer6_slaves, > -@@ -4608,6 +4651,7 @@ static struct omap_hwmod > omap44xx_timer7_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer7_slaves, > -@@ -4674,6 +4718,7 @@ static struct omap_hwmod > omap44xx_timer8_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer8_slaves, > -@@ -4721,6 +4766,7 @@ static struct omap_hwmod > omap44xx_timer9_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer9_slaves, > -@@ -4768,6 +4814,7 @@ static struct omap_hwmod > omap44xx_timer10_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer10_slaves, > -@@ -4815,6 +4862,7 @@ static struct omap_hwmod > omap44xx_timer11_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_timer11_slaves, > -@@ -4891,6 +4939,7 @@ static struct omap_hwmod > omap44xx_uart1_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_uart1_slaves, > -@@ -4945,6 +4994,7 @@ static struct omap_hwmod > omap44xx_uart2_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_uart2_slaves, > -@@ -5000,6 +5050,7 @@ static struct omap_hwmod > omap44xx_uart3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_uart3_slaves, > -@@ -5054,6 +5105,7 @@ static struct omap_hwmod > omap44xx_uart4_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_uart4_slaves, > -@@ -5134,6 +5186,7 @@ static struct omap_hwmod > omap44xx_usb_otg_hs_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_HWCTRL, > - }, > - }, > - .opt_clks = usb_otg_hs_opt_clks, > -@@ -5208,6 +5261,7 @@ static struct omap_hwmod > omap44xx_wd_timer2_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_wd_timer2_slaves, > -@@ -5274,6 +5328,7 @@ static struct omap_hwmod > omap44xx_wd_timer3_hwmod = { > - .omap4 = { > - .clkctrl_offs = > OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, > - .context_offs = > OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, > -+ .modulemode = MODULEMODE_SWCTRL, > - }, > - }, > - .slaves = omap44xx_wd_timer3_slaves, > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index 16439fa..0e329ca 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -80,6 +80,11 @@ extern struct omap_hwmod_sysc_fields > omap_hwmod_sysc_type2; > - #define HWMOD_IDLEMODE_SMART (1 << 2) > - #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) > - > -+/* modulemode control type (SW or HW) */ > -+#define MODULEMODE_HWCTRL 1 > -+#define MODULEMODE_SWCTRL 2 > -+ > -+ > - /** > - * struct omap_hwmod_mux_info - hwmod specific mux configuration > - * @pads: array of omap_device_pad entries > -@@ -365,6 +370,7 @@ struct omap_hwmod_omap4_prcm { > - u16 rstctrl_offs; > - u16 context_offs; > - u8 submodule_wkdep_bit; > -+ u8 modulemode; > - }; > - > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0086-OMAP4-cm- > Add-two-new-APIs-for-modulemode-control.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode- > control.patch > deleted file mode 100644 > index 86e8165..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0086-OMAP4-cm-Add-two- > new-APIs-for-modulemode-control.patch > +++ /dev/null > @@ -1,88 +0,0 @@ > -From 3ef45618e396f3d9abb12fb4ef1c4462ccca6fd3 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:32 -0600 > -Subject: [PATCH 086/149] OMAP4: cm: Add two new APIs for modulemode > control > - > -In OMAP4, a new programming model based on module control instead > -of clock control was introduced. > -Expose two APIs to allow the upper layer (omap_hwmod) to control > -the module mode independently of the parent clocks management. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -[paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; cleaned up > - kerneldoc] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/cminst44xx.c | 40 > ++++++++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/cminst44xx.h | 5 ++++ > - 2 files changed, 45 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach- > omap2/cminst44xx.c > -index 0fe3f14..eb2a472 100644 > ---- a/arch/arm/mach-omap2/cminst44xx.c > -+++ b/arch/arm/mach-omap2/cminst44xx.c > -@@ -309,3 +309,43 @@ int omap4_cminst_wait_module_idle(u8 part, u16 > inst, s16 cdoffs, u16 clkctrl_off > - > - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; > - } > -+ > -+/** > -+ * omap4_cminst_module_enable - Enable the modulemode inside CLKCTRL > -+ * @mode: Module mode (SW or HW) > -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in > -+ * @inst: CM instance register offset (*_INST macro) > -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) > -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) > -+ * > -+ * No return value. > -+ */ > -+void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, > -+ u16 clkctrl_offs) > -+{ > -+ u32 v; > -+ > -+ v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); > -+ v &= ~OMAP4430_MODULEMODE_MASK; > -+ v |= mode << OMAP4430_MODULEMODE_SHIFT; > -+ omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); > -+} > -+ > -+/** > -+ * omap4_cminst_module_disable - Disable the module inside CLKCTRL > -+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in > -+ * @inst: CM instance register offset (*_INST macro) > -+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) > -+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) > -+ * > -+ * No return value. > -+ */ > -+void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, > -+ u16 clkctrl_offs) > -+{ > -+ u32 v; > -+ > -+ v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); > -+ v &= ~OMAP4430_MODULEMODE_MASK; > -+ omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); > -+} > -diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach- > omap2/cminst44xx.h > -index a985400..f2ea645 100644 > ---- a/arch/arm/mach-omap2/cminst44xx.h > -+++ b/arch/arm/mach-omap2/cminst44xx.h > -@@ -20,6 +20,11 @@ extern void omap4_cminst_clkdm_force_wakeup(u8 > part, s16 inst, u16 cdoffs); > - extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, > u16 clkctrl_offs); > - extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 > clkctrl_offs); > - > -+extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 > cdoffs, > -+ u16 clkctrl_offs); > -+extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, > -+ u16 clkctrl_offs); > -+ > - /* > - * In an ideal world, we would not export these low-level functions, > - * but this will probably take some time to fix properly > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4- > hwmod-Introduce-the-module-control-in-hwmod-co.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the- > module-control-in-hwmod-co.patch > deleted file mode 100644 > index 30b978e..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4-hwmod- > Introduce-the-module-control-in-hwmod-co.patch > +++ /dev/null > @@ -1,129 +0,0 @@ > -From a6647b2c4e9c1786df8dcb59595c3029f5a9f493 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:33 -0600 > -Subject: [PATCH 087/149] OMAP4: hwmod: Introduce the module control in > hwmod control > - > -Take advantage of the explicit modulemode control to fix > -the way parents clocks are managed. > -A module must be disabled before any parents are disabled. > -That programming model was not possible with the previous > -implementation that was considering a modulemode as a leaf > -clock node managed by the clock fmwk. > -This was leading to bad crash upon disable when the parent > -clock was gated before the module completed its transition > -to idle. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/omap_hwmod.c | 63 > ++++++++++++++++++++++++++++++++++++- > - 1 files changed, 61 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index a0f7d31..4424fee 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -680,6 +680,56 @@ static void _disable_optional_clocks(struct > omap_hwmod *oh) > - } > - > - /** > -+ * _enable_module - enable CLKCTRL modulemode on OMAP4 > -+ * @oh: struct omap_hwmod * > -+ * > -+ * Enables the PRCM module mode related to the hwmod @oh. > -+ * No return value. > -+ */ > -+static void _enable_module(struct omap_hwmod *oh) > -+{ > -+ /* The module mode does not exist prior OMAP4 */ > -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) > -+ return; > -+ > -+ if (!oh->clkdm || !oh->prcm.omap4.modulemode) > -+ return; > -+ > -+ pr_debug("omap_hwmod: %s: _enable_module: %d\n", > -+ oh->name, oh->prcm.omap4.modulemode); > -+ > -+ omap4_cminst_module_enable(oh->prcm.omap4.modulemode, > -+ oh->clkdm->prcm_partition, > -+ oh->clkdm->cm_inst, > -+ oh->clkdm->clkdm_offs, > -+ oh->prcm.omap4.clkctrl_offs); > -+} > -+ > -+/** > -+ * _disable_module - enable CLKCTRL modulemode on OMAP4 > -+ * @oh: struct omap_hwmod * > -+ * > -+ * Disable the PRCM module mode related to the hwmod @oh. > -+ * No return value. > -+ */ > -+static void _disable_module(struct omap_hwmod *oh) > -+{ > -+ /* The module mode does not exist prior OMAP4 */ > -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) > -+ return; > -+ > -+ if (!oh->clkdm || !oh->prcm.omap4.modulemode) > -+ return; > -+ > -+ pr_debug("omap_hwmod: %s: _disable_module\n", oh->name); > -+ > -+ omap4_cminst_module_disable(oh->clkdm->prcm_partition, > -+ oh->clkdm->cm_inst, > -+ oh->clkdm->clkdm_offs, > -+ oh->prcm.omap4.clkctrl_offs); > -+} > -+ > -+/** > - * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh > - * @oh: struct omap_hwmod *oh > - * > -@@ -1424,6 +1474,7 @@ static int _enable(struct omap_hwmod *oh) > - > - return r; > - } > -+ _enable_module(oh); > - > - oh->_state = _HWMOD_STATE_ENABLED; > - > -@@ -1460,11 +1511,18 @@ static int _idle(struct omap_hwmod *oh) > - if (oh->class->sysc) > - _idle_sysc(oh); > - _del_initiator_dep(oh, mpu_oh); > -- _disable_clocks(oh); > -+ _disable_module(oh); > - ret = _wait_target_disable(oh); > - if (ret) > - pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", > - oh->name); > -+ /* > -+ * The module must be in idle mode before disabling any parents > -+ * clocks. Otherwise, the parent clock might be disabled before > -+ * the module transition is done, and thus will prevent the > -+ * transition to complete properly. > -+ */ > -+ _disable_clocks(oh); > - > - /* Mux pins for device idle if populated */ > - if (oh->mux && oh->mux->pads_dynamic) > -@@ -1556,11 +1614,12 @@ static int _shutdown(struct omap_hwmod *oh) > - if (oh->_state == _HWMOD_STATE_ENABLED) { > - _del_initiator_dep(oh, mpu_oh); > - /* XXX what about the other system initiators here? dma, dsp > */ > -- _disable_clocks(oh); > -+ _disable_module(oh); > - ret = _wait_target_disable(oh); > - if (ret) > - pr_warn("omap_hwmod: %s: _wait_target_disable > failed\n", > - oh->name); > -+ _disable_clocks(oh); > - } > - /* XXX Should this code also force-disable the optional clocks? */ > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP- > clockdomain-Remove-redundant-call-to-pwrdm_wait.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP-clockdomain-Remove- > redundant-call-to-pwrdm_wait.patch > deleted file mode 100644 > index 9958651..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP-clockdomain- > Remove-redundant-call-to-pwrdm_wait.patch > +++ /dev/null > @@ -1,30 +0,0 @@ > -From 376dd007bae9fdcad06c5231c05ab2ca92639579 Mon Sep 17 00:00:00 > 2001 > -From: Vaibhav Bedia <vaibhav.bedia@ti.com> > -Date: Sun, 10 Jul 2011 05:56:53 -0600 > -Subject: [PATCH 088/149] OMAP: clockdomain: Remove redundant call to > pwrdm_wait_transition() > - > -The call to pwrdm_wait_transition() in clkdm_clk_enable() > -is redundant since the function pwrdm_clkdm_state_switch() > -which is called next also does the same thing. > - > -Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clockdomain.c | 1 - > - 1 files changed, 0 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach- > omap2/clockdomain.c > -index 6cb6c03..4fbbbfc 100644 > ---- a/arch/arm/mach-omap2/clockdomain.c > -+++ b/arch/arm/mach-omap2/clockdomain.c > -@@ -834,7 +834,6 @@ int clkdm_clk_enable(struct clockdomain *clkdm, > struct clk *clk) > - clk->name); > - > - arch_clkdm->clkdm_clk_enable(clkdm); > -- pwrdm_wait_transition(clkdm->pwrdm.ptr); > - pwrdm_clkdm_state_switch(clkdm); > - > - return 0; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2- > clockdomain-Add-2-APIs-to-control-clockdomain-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs- > to-control-clockdomain-.patch > deleted file mode 100644 > index 3d47851..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2-clockdomain- > Add-2-APIs-to-control-clockdomain-.patch > +++ /dev/null > @@ -1,231 +0,0 @@ > -From 4cf6b3a535c5e63c4808733c170a68990e45afa2 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Sun, 10 Jul 2011 05:56:54 -0600 > -Subject: [PATCH 089/149] OMAP2+: clockdomain: Add 2 APIs to control > clockdomain from hwmod framework > - > -Duplicate the existing API for clockdomain enable from clock to enable > -a clock domain from hwmod framework. > -This will be needed when the hwmod framework will move from the current > -clock centric approach to the module based approach. > - > -These APIs are returning 0 for the moment for OMAP2 and OMAP3 until > -their hwmods are updated with the clksm attribute. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Kevin Hilman <khilman@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clockdomain.c | 142 > +++++++++++++++++++++++++++--------- > - arch/arm/mach-omap2/clockdomain.h | 3 + > - 2 files changed, 109 insertions(+), 36 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach- > omap2/clockdomain.c > -index 4fbbbfc..5a57de5 100644 > ---- a/arch/arm/mach-omap2/clockdomain.c > -+++ b/arch/arm/mach-omap2/clockdomain.c > -@@ -796,7 +796,50 @@ void clkdm_deny_idle(struct clockdomain *clkdm) > - } > - > - > --/* Clockdomain-to-clock framework interface code */ > -+/* Clockdomain-to-clock/hwmod framework interface code */ > -+ > -+static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) > -+{ > -+ if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) > -+ return -EINVAL; > -+ > -+ /* > -+ * For arch's with no autodeps, clkcm_clk_enable > -+ * should be called for every clock instance or hwmod that is > -+ * enabled, so the clkdm can be force woken up. > -+ */ > -+ if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) > -+ return 0; > -+ > -+ arch_clkdm->clkdm_clk_enable(clkdm); > -+ pwrdm_wait_transition(clkdm->pwrdm.ptr); > -+ pwrdm_clkdm_state_switch(clkdm); > -+ > -+ pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); > -+ > -+ return 0; > -+} > -+ > -+static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) > -+{ > -+ if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) > -+ return -EINVAL; > -+ > -+ if (atomic_read(&clkdm->usecount) == 0) { > -+ WARN_ON(1); /* underflow */ > -+ return -ERANGE; > -+ } > -+ > -+ if (atomic_dec_return(&clkdm->usecount) > 0) > -+ return 0; > -+ > -+ arch_clkdm->clkdm_clk_disable(clkdm); > -+ pwrdm_clkdm_state_switch(clkdm); > -+ > -+ pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); > -+ > -+ return 0; > -+} > - > - /** > - * clkdm_clk_enable - add an enabled downstream clock to this clkdm > -@@ -819,24 +862,10 @@ int clkdm_clk_enable(struct clockdomain *clkdm, > struct clk *clk) > - * downstream clocks for debugging purposes? > - */ > - > -- if (!clkdm || !clk) > -+ if (!clk) > - return -EINVAL; > - > -- if (!arch_clkdm || !arch_clkdm->clkdm_clk_enable) > -- return -EINVAL; > -- > -- if (atomic_inc_return(&clkdm->usecount) > 1) > -- return 0; > -- > -- /* Clockdomain now has one enabled downstream clock */ > -- > -- pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm- > >name, > -- clk->name); > -- > -- arch_clkdm->clkdm_clk_enable(clkdm); > -- pwrdm_clkdm_state_switch(clkdm); > -- > -- return 0; > -+ return _clkdm_clk_hwmod_enable(clkdm); > - } > - > - /** > -@@ -849,9 +878,8 @@ int clkdm_clk_enable(struct clockdomain *clkdm, > struct clk *clk) > - * clockdomain usecount goes to 0, put the clockdomain to sleep > - * (software-supervised mode) or remove the clkdm autodependencies > - * (hardware-supervised mode). Returns -EINVAL if passed null > -- * pointers; -ERANGE if the @clkdm usecount underflows and debugging > -- * is enabled; or returns 0 upon success or if the clockdomain is in > -- * hwsup idle mode. > -+ * pointers; -ERANGE if the @clkdm usecount underflows; or returns 0 > -+ * upon success or if the clockdomain is in hwsup idle mode. > - */ > - int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) > - { > -@@ -860,30 +888,72 @@ int clkdm_clk_disable(struct clockdomain *clkdm, > struct clk *clk) > - * downstream clocks for debugging purposes? > - */ > - > -- if (!clkdm || !clk) > -+ if (!clk) > - return -EINVAL; > - > -- if (!arch_clkdm || !arch_clkdm->clkdm_clk_disable) > -+ return _clkdm_clk_hwmod_disable(clkdm); > -+} > -+ > -+/** > -+ * clkdm_hwmod_enable - add an enabled downstream hwmod to this clkdm > -+ * @clkdm: struct clockdomain * > -+ * @oh: struct omap_hwmod * of the enabled downstream hwmod > -+ * > -+ * Increment the usecount of the clockdomain @clkdm and ensure that it > -+ * is awake before @oh is enabled. Intended to be called by > -+ * module_enable() code. > -+ * If the clockdomain is in software-supervised idle mode, force the > -+ * clockdomain to wake. If the clockdomain is in hardware-supervised idle > -+ * mode, add clkdm-pwrdm autodependencies, to ensure that devices in the > -+ * clockdomain can be read from/written to by on-chip processors. > -+ * Returns -EINVAL if passed null pointers; > -+ * returns 0 upon success or if the clockdomain is in hwsup idle mode. > -+ */ > -+int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod > *oh) > -+{ > -+ /* The clkdm attribute does not exist yet prior OMAP4 */ > -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) > -+ return 0; > -+ > -+ /* > -+ * XXX Rewrite this code to maintain a list of enabled > -+ * downstream hwmods for debugging purposes? > -+ */ > -+ > -+ if (!oh) > - return -EINVAL; > - > --#ifdef DEBUG > -- if (atomic_read(&clkdm->usecount) == 0) { > -- WARN_ON(1); /* underflow */ > -- return -ERANGE; > -- } > --#endif > -+ return _clkdm_clk_hwmod_enable(clkdm); > -+} > - > -- if (atomic_dec_return(&clkdm->usecount) > 0) > -+/** > -+ * clkdm_hwmod_disable - remove an enabled downstream hwmod from this > clkdm > -+ * @clkdm: struct clockdomain * > -+ * @oh: struct omap_hwmod * of the disabled downstream hwmod > -+ * > -+ * Decrement the usecount of this clockdomain @clkdm when @oh is > -+ * disabled. Intended to be called by module_disable() code. > -+ * If the clockdomain usecount goes to 0, put the clockdomain to sleep > -+ * (software-supervised mode) or remove the clkdm autodependencies > -+ * (hardware-supervised mode). > -+ * Returns -EINVAL if passed null pointers; -ERANGE if the @clkdm usecount > -+ * underflows; or returns 0 upon success or if the clockdomain is in hwsup > -+ * idle mode. > -+ */ > -+int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod > *oh) > -+{ > -+ /* The clkdm attribute does not exist yet prior OMAP4 */ > -+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) > - return 0; > - > -- /* All downstream clocks of this clockdomain are now disabled */ > -- > -- pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm- > >name, > -- clk->name); > -+ /* > -+ * XXX Rewrite this code to maintain a list of enabled > -+ * downstream hwmods for debugging purposes? > -+ */ > - > -- arch_clkdm->clkdm_clk_disable(clkdm); > -- pwrdm_clkdm_state_switch(clkdm); > -+ if (!oh) > -+ return -EINVAL; > - > -- return 0; > -+ return _clkdm_clk_hwmod_disable(clkdm); > - } > - > -diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach- > omap2/clockdomain.h > -index 5823584..8e0da64 100644 > ---- a/arch/arm/mach-omap2/clockdomain.h > -+++ b/arch/arm/mach-omap2/clockdomain.h > -@@ -20,6 +20,7 @@ > - > - #include "powerdomain.h" > - #include <plat/clock.h> > -+#include <plat/omap_hwmod.h> > - #include <plat/cpu.h> > - > - /* > -@@ -183,6 +184,8 @@ int clkdm_sleep(struct clockdomain *clkdm); > - > - int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); > - int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); > -+int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod > *oh); > -+int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod > *oh); > - > - extern void __init omap2xxx_clockdomains_init(void); > - extern void __init omap3xxx_clockdomains_init(void); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0090-OMAP2- > clockdomain-add-clkdm_in_hwsup.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch > deleted file mode 100644 > index edbaf6d..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0090-OMAP2-clockdomain- > add-clkdm_in_hwsup.patch > +++ /dev/null > @@ -1,141 +0,0 @@ > -From b1090dd5eb9e242f8426169718fd7241c025c1a2 Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sun, 10 Jul 2011 05:56:54 -0600 > -Subject: [PATCH 090/149] OMAP2+: clockdomain: add clkdm_in_hwsup() > -MIME-Version: 1.0 > -Content-Type: text/plain; charset=UTF-8 > -Content-Transfer-Encoding: 8bit > - > -Add a new function, clkdm_in_hwsup(), that returns true if a clockdomain > -is configured for hardware-supervised idle. It does not actually read the > -hardware; rather, it checks an internal flag in the struct clockdomain, which > -is changed when the clockdomain is switched in and out of hardware- > supervised > -idle. This should be safe, since all changes to the idle mode should > -pass through the clockdomain code. > - > -Based on a set of patches by Rajendra Nayak <rnayak@ti.com> which do > -the same thing by checking the hardware bits. This approach should be > -faster and more compact. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > -Cc: Todd Poynor <toddpoynor@google.com> > -Cc: Benoît Cousson <b-cousson@ti.com> > ---- > - arch/arm/mach-omap2/clockdomain.c | 30 > ++++++++++++++++++++++++++++-- > - arch/arm/mach-omap2/clockdomain.h | 6 ++++++ > - 2 files changed, 34 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach- > omap2/clockdomain.c > -index 5a57de5..239b558 100644 > ---- a/arch/arm/mach-omap2/clockdomain.c > -+++ b/arch/arm/mach-omap2/clockdomain.c > -@@ -1,8 +1,8 @@ > - /* > - * OMAP2/3/4 clockdomain framework functions > - * > -- * Copyright (C) 2008-2010 Texas Instruments, Inc. > -- * Copyright (C) 2008-2010 Nokia Corporation > -+ * Copyright (C) 2008-2011 Texas Instruments, Inc. > -+ * Copyright (C) 2008-2011 Nokia Corporation > - * > - * Written by Paul Walmsley and Jouni Högander > - * Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com> > -@@ -704,6 +704,8 @@ int clkdm_sleep(struct clockdomain *clkdm) > - > - pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); > - > -+ clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; > -+ > - return arch_clkdm->clkdm_sleep(clkdm); > - } > - > -@@ -732,6 +734,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) > - > - pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); > - > -+ clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; > -+ > - return arch_clkdm->clkdm_wakeup(clkdm); > - } > - > -@@ -762,6 +766,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) > - pr_debug("clockdomain: enabling automatic idle transitions for %s\n", > - clkdm->name); > - > -+ clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; > -+ > - arch_clkdm->clkdm_allow_idle(clkdm); > - pwrdm_clkdm_state_switch(clkdm); > - } > -@@ -792,9 +798,29 @@ void clkdm_deny_idle(struct clockdomain *clkdm) > - pr_debug("clockdomain: disabling automatic idle transitions for %s\n", > - clkdm->name); > - > -+ clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; > -+ > - arch_clkdm->clkdm_deny_idle(clkdm); > - } > - > -+/** > -+ * clkdm_in_hwsup - is clockdomain @clkdm have hardware-supervised idle > enabled? > -+ * @clkdm: struct clockdomain * > -+ * > -+ * Returns true if clockdomain @clkdm currently has > -+ * hardware-supervised idle enabled, or false if it does not or if > -+ * @clkdm is NULL. It is only valid to call this function after > -+ * clkdm_init() has been called. This function does not actually read > -+ * bits from the hardware; it instead tests an in-memory flag that is > -+ * changed whenever the clockdomain code changes the auto-idle mode. > -+ */ > -+bool clkdm_in_hwsup(struct clockdomain *clkdm) > -+{ > -+ if (!clkdm) > -+ return false; > -+ > -+ return (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : > false; > -+} > - > - /* Clockdomain-to-clock/hwmod framework interface code */ > - > -diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach- > omap2/clockdomain.h > -index 8e0da64..8782a5c 100644 > ---- a/arch/arm/mach-omap2/clockdomain.h > -+++ b/arch/arm/mach-omap2/clockdomain.h > -@@ -83,6 +83,9 @@ struct clkdm_dep { > - const struct omap_chip_id omap_chip; > - }; > - > -+/* Possible flags for struct clockdomain._flags */ > -+#define _CLKDM_FLAG_HWSUP_ENABLED BIT(0) > -+ > - /** > - * struct clockdomain - OMAP clockdomain > - * @name: clockdomain name > -@@ -90,6 +93,7 @@ struct clkdm_dep { > - * @clktrctrl_reg: CLKSTCTRL reg for the given clock domain > - * @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg > - * @flags: Clockdomain capability flags > -+ * @_flags: Flags for use only by internal clockdomain code > - * @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit > - * @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers > - * @cm_inst: (OMAP4 only) CM instance register offset > -@@ -114,6 +118,7 @@ struct clockdomain { > - } pwrdm; > - const u16 clktrctrl_mask; > - const u8 flags; > -+ u8 _flags; > - const u8 dep_bit; > - const u8 prcm_partition; > - const s16 cm_inst; > -@@ -178,6 +183,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain > *clkdm); > - > - void clkdm_allow_idle(struct clockdomain *clkdm); > - void clkdm_deny_idle(struct clockdomain *clkdm); > -+bool clkdm_in_hwsup(struct clockdomain *clkdm); > - > - int clkdm_wakeup(struct clockdomain *clkdm); > - int clkdm_sleep(struct clockdomain *clkdm); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0091-OMAP2-PM- > idle-clkdms-only-if-already-in-idle.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch > deleted file mode 100644 > index 91d4e67..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0091-OMAP2-PM-idle- > clkdms-only-if-already-in-idle.patch > +++ /dev/null > @@ -1,53 +0,0 @@ > -From bc09c0fe93e874df8fcfd68f31302330646cbf24 Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Sun, 10 Jul 2011 05:56:54 -0600 > -Subject: [PATCH 091/149] OMAP2+: PM: idle clkdms only if already in idle > - > -The omap_set_pwrdm_state function forces clockdomains > -to idle, without checking the existing idle state > -programmed, instead based solely on the HW capability > -of the clockdomain to support idle. > -This is wrong and the clockdomains should be idled > -post a state_switch *only* if idle transitions on the > -clockdomain were already enabled. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Acked-by: Kevin Hilman <khilman@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/pm.c | 4 +++- > - 1 files changed, 3 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c > -index d48813f..3feb359 100644 > ---- a/arch/arm/mach-omap2/pm.c > -+++ b/arch/arm/mach-omap2/pm.c > -@@ -108,6 +108,7 @@ int omap_set_pwrdm_state(struct powerdomain > *pwrdm, u32 state) > - u32 cur_state; > - int sleep_switch = -1; > - int ret = 0; > -+ int hwsup = 0; > - > - if (pwrdm == NULL || IS_ERR(pwrdm)) > - return -EINVAL; > -@@ -127,6 +128,7 @@ int omap_set_pwrdm_state(struct powerdomain > *pwrdm, u32 state) > - (pwrdm->flags & > PWRDM_HAS_LOWPOWERSTATECHANGE)) { > - sleep_switch = LOWPOWERSTATE_SWITCH; > - } else { > -+ hwsup = clkdm_in_hwsup(pwrdm- > >pwrdm_clkdms[0]); > - clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); > - pwrdm_wait_transition(pwrdm); > - sleep_switch = FORCEWAKEUP_SWITCH; > -@@ -142,7 +144,7 @@ int omap_set_pwrdm_state(struct powerdomain > *pwrdm, u32 state) > - > - switch (sleep_switch) { > - case FORCEWAKEUP_SWITCH: > -- if (pwrdm->pwrdm_clkdms[0]->flags & > CLKDM_CAN_ENABLE_AUTO) > -+ if (hwsup) > - clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); > - else > - clkdm_sleep(pwrdm->pwrdm_clkdms[0]); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2- > clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per- > clkdm-lock-to-prevent-conc.patch > deleted file mode 100644 > index d5c7deb..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2-clockdomain- > Add-per-clkdm-lock-to-prevent-conc.patch > +++ /dev/null > @@ -1,264 +0,0 @@ > -From 9dbc6c631f27b1e6ed6b058b8d3e57b2398b2d3b Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Sun, 10 Jul 2011 05:56:55 -0600 > -Subject: [PATCH 092/149] OMAP2+: clockdomain: Add per clkdm lock to > prevent concurrent state programming > - > -Since the clkdm state programming is now done from within the hwmod > -framework (which uses a per-hwmod lock) instead of the being done > -from the clock framework (which used a global lock), there is now a > -need to have per-clkdm locking to prevent races between different > -hwmods/modules belonging to the same clock domain concurrently > -programming the clkdm state. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clockdomain.c | 47 > +++++++++++++++++++++++---- > - arch/arm/mach-omap2/clockdomain.h | 2 + > - arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 6 ++- > - arch/arm/mach-omap2/clockdomain44xx.c | 13 ++----- > - 4 files changed, 50 insertions(+), 18 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach- > omap2/clockdomain.c > -index 239b558..ab7db08 100644 > ---- a/arch/arm/mach-omap2/clockdomain.c > -+++ b/arch/arm/mach-omap2/clockdomain.c > -@@ -92,6 +92,8 @@ static int _clkdm_register(struct clockdomain *clkdm) > - > - pwrdm_add_clkdm(pwrdm, clkdm); > - > -+ spin_lock_init(&clkdm->lock); > -+ > - pr_debug("clockdomain: registered %s\n", clkdm->name); > - > - return 0; > -@@ -690,6 +692,9 @@ int clkdm_clear_all_sleepdeps(struct clockdomain > *clkdm) > - */ > - int clkdm_sleep(struct clockdomain *clkdm) > - { > -+ int ret; > -+ unsigned long flags; > -+ > - if (!clkdm) > - return -EINVAL; > - > -@@ -704,9 +709,11 @@ int clkdm_sleep(struct clockdomain *clkdm) > - > - pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); > - > -+ spin_lock_irqsave(&clkdm->lock, flags); > - clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; > -- > -- return arch_clkdm->clkdm_sleep(clkdm); > -+ ret = arch_clkdm->clkdm_sleep(clkdm); > -+ spin_unlock_irqrestore(&clkdm->lock, flags); > -+ return ret; > - } > - > - /** > -@@ -720,6 +727,9 @@ int clkdm_sleep(struct clockdomain *clkdm) > - */ > - int clkdm_wakeup(struct clockdomain *clkdm) > - { > -+ int ret; > -+ unsigned long flags; > -+ > - if (!clkdm) > - return -EINVAL; > - > -@@ -734,9 +744,11 @@ int clkdm_wakeup(struct clockdomain *clkdm) > - > - pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); > - > -+ spin_lock_irqsave(&clkdm->lock, flags); > - clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; > -- > -- return arch_clkdm->clkdm_wakeup(clkdm); > -+ ret = arch_clkdm->clkdm_wakeup(clkdm); > -+ spin_unlock_irqrestore(&clkdm->lock, flags); > -+ return ret; > - } > - > - /** > -@@ -751,6 +763,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) > - */ > - void clkdm_allow_idle(struct clockdomain *clkdm) > - { > -+ unsigned long flags; > -+ > - if (!clkdm) > - return; > - > -@@ -766,10 +780,11 @@ void clkdm_allow_idle(struct clockdomain *clkdm) > - pr_debug("clockdomain: enabling automatic idle transitions for %s\n", > - clkdm->name); > - > -+ spin_lock_irqsave(&clkdm->lock, flags); > - clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; > -- > - arch_clkdm->clkdm_allow_idle(clkdm); > - pwrdm_clkdm_state_switch(clkdm); > -+ spin_unlock_irqrestore(&clkdm->lock, flags); > - } > - > - /** > -@@ -783,6 +798,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) > - */ > - void clkdm_deny_idle(struct clockdomain *clkdm) > - { > -+ unsigned long flags; > -+ > - if (!clkdm) > - return; > - > -@@ -798,9 +815,10 @@ void clkdm_deny_idle(struct clockdomain *clkdm) > - pr_debug("clockdomain: disabling automatic idle transitions for %s\n", > - clkdm->name); > - > -+ spin_lock_irqsave(&clkdm->lock, flags); > - clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; > -- > - arch_clkdm->clkdm_deny_idle(clkdm); > -+ spin_unlock_irqrestore(&clkdm->lock, flags); > - } > - > - /** > -@@ -816,16 +834,25 @@ void clkdm_deny_idle(struct clockdomain *clkdm) > - */ > - bool clkdm_in_hwsup(struct clockdomain *clkdm) > - { > -+ bool ret; > -+ unsigned long flags; > -+ > - if (!clkdm) > - return false; > - > -- return (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : > false; > -+ spin_lock_irqsave(&clkdm->lock, flags); > -+ ret = (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; > -+ spin_unlock_irqrestore(&clkdm->lock, flags); > -+ > -+ return ret; > - } > - > - /* Clockdomain-to-clock/hwmod framework interface code */ > - > - static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) > - { > -+ unsigned long flags; > -+ > - if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) > - return -EINVAL; > - > -@@ -837,9 +864,11 @@ static int _clkdm_clk_hwmod_enable(struct > clockdomain *clkdm) > - if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) > - return 0; > - > -+ spin_lock_irqsave(&clkdm->lock, flags); > - arch_clkdm->clkdm_clk_enable(clkdm); > - pwrdm_wait_transition(clkdm->pwrdm.ptr); > - pwrdm_clkdm_state_switch(clkdm); > -+ spin_unlock_irqrestore(&clkdm->lock, flags); > - > - pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); > - > -@@ -848,6 +877,8 @@ static int _clkdm_clk_hwmod_enable(struct > clockdomain *clkdm) > - > - static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) > - { > -+ unsigned long flags; > -+ > - if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) > - return -EINVAL; > - > -@@ -859,8 +890,10 @@ static int _clkdm_clk_hwmod_disable(struct > clockdomain *clkdm) > - if (atomic_dec_return(&clkdm->usecount) > 0) > - return 0; > - > -+ spin_lock_irqsave(&clkdm->lock, flags); > - arch_clkdm->clkdm_clk_disable(clkdm); > - pwrdm_clkdm_state_switch(clkdm); > -+ spin_unlock_irqrestore(&clkdm->lock, flags); > - > - pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); > - > -diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach- > omap2/clockdomain.h > -index 8782a5c..1e50c88 100644 > ---- a/arch/arm/mach-omap2/clockdomain.h > -+++ b/arch/arm/mach-omap2/clockdomain.h > -@@ -17,6 +17,7 @@ > - #define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H > - > - #include <linux/init.h> > -+#include <linux/spinlock.h> > - > - #include "powerdomain.h" > - #include <plat/clock.h> > -@@ -128,6 +129,7 @@ struct clockdomain { > - const struct omap_chip_id omap_chip; > - atomic_t usecount; > - struct list_head node; > -+ spinlock_t lock; > - }; > - > - /** > -diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach- > omap2/clockdomain2xxx_3xxx.c > -index 48d0db7..f740edb 100644 > ---- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c > -+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c > -@@ -183,7 +183,8 @@ static int omap2_clkdm_clk_enable(struct > clockdomain *clkdm) > - _clkdm_add_autodeps(clkdm); > - _enable_hwsup(clkdm); > - } else { > -- clkdm_wakeup(clkdm); > -+ if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) > -+ omap2_clkdm_wakeup(clkdm); > - } > - > - return 0; > -@@ -205,7 +206,8 @@ static int omap2_clkdm_clk_disable(struct > clockdomain *clkdm) > - _clkdm_del_autodeps(clkdm); > - _enable_hwsup(clkdm); > - } else { > -- clkdm_sleep(clkdm); > -+ if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) > -+ omap2_clkdm_sleep(clkdm); > - } > - > - return 0; > -diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach- > omap2/clockdomain44xx.c > -index a1a4ecd..b43706a 100644 > ---- a/arch/arm/mach-omap2/clockdomain44xx.c > -+++ b/arch/arm/mach-omap2/clockdomain44xx.c > -@@ -95,13 +95,8 @@ static void omap4_clkdm_deny_idle(struct > clockdomain *clkdm) > - > - static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) > - { > -- bool hwsup = false; > -- > -- hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, > -- clkdm->cm_inst, clkdm->clkdm_offs); > -- > -- if (!hwsup) > -- clkdm_wakeup(clkdm); > -+ if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) > -+ return omap4_clkdm_wakeup(clkdm); > - > - return 0; > - } > -@@ -113,8 +108,8 @@ static int omap4_clkdm_clk_disable(struct > clockdomain *clkdm) > - hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, > - clkdm->cm_inst, clkdm->clkdm_offs); > - > -- if (!hwsup) > -- clkdm_sleep(clkdm); > -+ if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) > -+ omap4_clkdm_sleep(clkdm); > - > - return 0; > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0093-OMAP2-clock- > allow-per-SoC-clock-init-code-to-prevent.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to- > prevent.patch > deleted file mode 100644 > index 3870fd3..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0093-OMAP2-clock-allow- > per-SoC-clock-init-code-to-prevent.patch > +++ /dev/null > @@ -1,123 +0,0 @@ > -From 7d9356a5f4f67150d793d6be8592ea23b0692d81 Mon Sep 17 00:00:00 > 2001 > -From: Paul Walmsley <paul@pwsan.com> > -Date: Sun, 10 Jul 2011 05:57:06 -0600 > -Subject: [PATCH 093/149] OMAP2+: clock: allow per-SoC clock init code to > prevent clockdomain calls from clock code > -MIME-Version: 1.0 > -Content-Type: text/plain; charset=UTF-8 > -Content-Transfer-Encoding: 8bit > - > -The OMAP2/3 clock code was written to notify the clockdomain code when > -the first clock in a clockdomain is enabled and when the last enabled > -clock in a clockdomain is disabled. OMAP4 requires a different > -approach: the hwmod code needs to signal the clockdomain code when to > -force-enable and auto-idle a clockdomain during the IP block enable > -process. The current conjecture is that once that hwmod sequence is > -implemented, it will no longer be necessary for the clock code to call > -into the clockdomain code for "optional clocks" on OMAP4. > - > -Add a static flag to the OMAP2+ clock code, clkdm_control, that by > -default preserves the OMAP2/3 behavior. Also add a function, > -omap2_clk_disable_clkdm_control(), intended to be called from OMAP4 > -and beyond clock initcalls, that disables the old behavior. > - > -Part of this patch was originally based on a patch by Rajendra Nayak > -<rnayak@ti.com>. > - > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > -Cc: Benoît Cousson <b-cousson@ti.com> > -Cc: Rajendra Nayak <rnayak@ti.com> > ---- > - arch/arm/mach-omap2/clock.c | 27 ++++++++++++++++++++++++--- > - arch/arm/mach-omap2/clock.h | 3 +++ > - 2 files changed, 27 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c > -index 180299e..fc84576 100644 > ---- a/arch/arm/mach-omap2/clock.c > -+++ b/arch/arm/mach-omap2/clock.c > -@@ -38,6 +38,14 @@ > - u8 cpu_mask; > - > - /* > -+ * clkdm_control: if true, then when a clock is enabled in the > -+ * hardware, its clockdomain will first be enabled; and when a clock > -+ * is disabled in the hardware, its clockdomain will be disabled > -+ * afterwards. > -+ */ > -+static bool clkdm_control = true; > -+ > -+/* > - * OMAP2+ specific clock functions > - */ > - > -@@ -100,6 +108,19 @@ void omap2_init_clk_clkdm(struct clk *clk) > - } > - > - /** > -+ * omap2_clk_disable_clkdm_control - disable clkdm control on clk > enable/disable > -+ * > -+ * Prevent the OMAP clock code from calling into the clockdomain code > -+ * when a hardware clock in that clockdomain is enabled or disabled. > -+ * Intended to be called at init time from omap*_clk_init(). No > -+ * return value. > -+ */ > -+void __init omap2_clk_disable_clkdm_control(void) > -+{ > -+ clkdm_control = false; > -+} > -+ > -+/** > - * omap2_clk_dflt_find_companion - find companion clock to @clk > - * @clk: struct clk * to find the companion clock of > - * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN > va in > -@@ -268,7 +289,7 @@ void omap2_clk_disable(struct clk *clk) > - clk->ops->disable(clk); > - } > - > -- if (clk->clkdm) > -+ if (clkdm_control && clk->clkdm) > - clkdm_clk_disable(clk->clkdm, clk); > - > - if (clk->parent) > -@@ -308,7 +329,7 @@ int omap2_clk_enable(struct clk *clk) > - } > - } > - > -- if (clk->clkdm) { > -+ if (clkdm_control && clk->clkdm) { > - ret = clkdm_clk_enable(clk->clkdm, clk); > - if (ret) { > - WARN(1, "clock: %s: could not enable clockdomain %s: > " > -@@ -330,7 +351,7 @@ int omap2_clk_enable(struct clk *clk) > - return 0; > - > - oce_err3: > -- if (clk->clkdm) > -+ if (clkdm_control && clk->clkdm) > - clkdm_clk_disable(clk->clkdm, clk); > - oce_err2: > - if (clk->parent) > -diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h > -index e10ff2b..48ac568 100644 > ---- a/arch/arm/mach-omap2/clock.h > -+++ b/arch/arm/mach-omap2/clock.h > -@@ -16,6 +16,8 @@ > - #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H > - #define __ARCH_ARM_MACH_OMAP2_CLOCK_H > - > -+#include <linux/kernel.h> > -+ > - #include <plat/clock.h> > - > - /* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */ > -@@ -72,6 +74,7 @@ void omap2_clk_disable_unused(struct clk *clk); > - #endif > - > - void omap2_init_clk_clkdm(struct clk *clk); > -+void __init omap2_clk_disable_clkdm_control(void); > - > - /* clkt_clksel.c public functions */ > - u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2- > hwmod-Follow-the-recommended-PRCM-module-enabl.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the- > recommended-PRCM-module-enabl.patch > deleted file mode 100644 > index 4de90a8..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2-hwmod- > Follow-the-recommended-PRCM-module-enabl.patch > +++ /dev/null > @@ -1,173 +0,0 @@ > -From 2a443d7ec48bdaa17f80fbffd82cd11d858d3655 Mon Sep 17 00:00:00 > 2001 > -From: Rajendra Nayak <rnayak@ti.com> > -Date: Sun, 10 Jul 2011 05:57:07 -0600 > -Subject: [PATCH 094/149] OMAP2+: hwmod: Follow the recommended PRCM > module enable sequence > - > -On OMAP4, the PRCM recommended sequence for enabling > -a module after power-on-reset is: > --1- Force clkdm to SW_WKUP > --2- Enabling the clocks > --3- Configure desired module mode to "enable" or "auto" > --4- Wait for the desired module idle status to be FUNC > --5- Program clkdm in HW_AUTO(if supported) > - > -This sequence applies to all older OMAPs' as well, > -however since they use autodeps, it makes sure that > -no clkdm is in IDLE, and hence not requiring a force > -SW_WKUP when a module is being enabled. > - > -OMAP4 does not need to support autodeps, because > -of the dyanamic dependency feature, wherein > -the HW takes care of waking up a clockdomain from > -idle and hence the module, whenever an interconnect > -access happens to the given module. > - > -Implementing the sequence for OMAP4 requires > -the clockdomain handling that is currently done in > -clock framework to be done as part of hwmod framework > -since the step -4- above to "Wait for the desired > -module idle status to be FUNC" is done as part of > -hwmod framework. > - > -Signed-off-by: Rajendra Nayak <rnayak@ti.com> > -[b-cousson@ti.com: Adapt it to the new clkdm hwmod attribute and API] > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -[paul@pwsan.com: dropped mach-omap2/clock.c changes; modified to only > - call the clockdomain code if oh->clkdm is set; disable clock->clockdomain > - interaction on OMAP4] > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/mach-omap2/clock44xx_data.c | 1 + > - arch/arm/mach-omap2/omap_hwmod.c | 70 > ++++++++++++++++++++++++---------- > - 2 files changed, 51 insertions(+), 20 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach- > omap2/clock44xx_data.c > -index 07bf0de..0d13def 100644 > ---- a/arch/arm/mach-omap2/clock44xx_data.c > -+++ b/arch/arm/mach-omap2/clock44xx_data.c > -@@ -3340,6 +3340,7 @@ int __init omap4xxx_clk_init(void) > - } > - > - clk_init(&omap2_clk_functions); > -+ omap2_clk_disable_clkdm_control(); > - > - for (c = omap44xx_clks; c < omap44xx_clks + > ARRAY_SIZE(omap44xx_clks); > - c++) > -diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach- > omap2/omap_hwmod.c > -index 4424fee..84cc0bd 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod.c > -+++ b/arch/arm/mach-omap2/omap_hwmod.c > -@@ -1437,6 +1437,7 @@ static int _reset(struct omap_hwmod *oh) > - static int _enable(struct omap_hwmod *oh) > - { > - int r; > -+ int hwsup = 0; > - > - pr_debug("omap_hwmod: %s: enabling\n", oh->name); > - > -@@ -1448,14 +1449,6 @@ static int _enable(struct omap_hwmod *oh) > - return -EINVAL; > - } > - > -- /* Mux pins for device runtime if populated */ > -- if (oh->mux && (!oh->mux->enabled || > -- ((oh->_state == _HWMOD_STATE_IDLE) && > -- oh->mux->pads_dynamic))) > -- omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); > -- > -- _add_initiator_dep(oh, mpu_oh); > -- _enable_clocks(oh); > - > - /* > - * If an IP contains only one HW reset line, then de-assert it in order > -@@ -1466,23 +1459,56 @@ static int _enable(struct omap_hwmod *oh) > - oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt > == 1) > - _deassert_hardreset(oh, oh->rst_lines[0].name); > - > -- r = _wait_target_ready(oh); > -- if (r) { > -- pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", > -- oh->name, r); > -- _disable_clocks(oh); > -+ /* Mux pins for device runtime if populated */ > -+ if (oh->mux && (!oh->mux->enabled || > -+ ((oh->_state == _HWMOD_STATE_IDLE) && > -+ oh->mux->pads_dynamic))) > -+ omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); > -+ > -+ _add_initiator_dep(oh, mpu_oh); > - > -- return r; > -+ if (oh->clkdm) { > -+ /* > -+ * A clockdomain must be in SW_SUP before enabling > -+ * completely the module. The clockdomain can be set > -+ * in HW_AUTO only when the module become ready. > -+ */ > -+ hwsup = clkdm_in_hwsup(oh->clkdm); > -+ r = clkdm_hwmod_enable(oh->clkdm, oh); > -+ if (r) { > -+ WARN(1, "omap_hwmod: %s: could not enable > clockdomain %s: %d\n", > -+ oh->name, oh->clkdm->name, r); > -+ return r; > -+ } > - } > -+ > -+ _enable_clocks(oh); > - _enable_module(oh); > - > -- oh->_state = _HWMOD_STATE_ENABLED; > -+ r = _wait_target_ready(oh); > -+ if (!r) { > -+ /* > -+ * Set the clockdomain to HW_AUTO only if the target is ready, > -+ * assuming that the previous state was HW_AUTO > -+ */ > -+ if (oh->clkdm && hwsup) > -+ clkdm_allow_idle(oh->clkdm); > - > -- /* Access the sysconfig only if the target is ready */ > -- if (oh->class->sysc) { > -- if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) > -- _update_sysc_cache(oh); > -- _enable_sysc(oh); > -+ oh->_state = _HWMOD_STATE_ENABLED; > -+ > -+ /* Access the sysconfig only if the target is ready */ > -+ if (oh->class->sysc) { > -+ if (!(oh->_int_flags & > _HWMOD_SYSCONFIG_LOADED)) > -+ _update_sysc_cache(oh); > -+ _enable_sysc(oh); > -+ } > -+ } else { > -+ _disable_clocks(oh); > -+ pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", > -+ oh->name, r); > -+ > -+ if (oh->clkdm) > -+ clkdm_hwmod_disable(oh->clkdm, oh); > - } > - > - return r; > -@@ -1523,6 +1549,8 @@ static int _idle(struct omap_hwmod *oh) > - * transition to complete properly. > - */ > - _disable_clocks(oh); > -+ if (oh->clkdm) > -+ clkdm_hwmod_disable(oh->clkdm, oh); > - > - /* Mux pins for device idle if populated */ > - if (oh->mux && oh->mux->pads_dynamic) > -@@ -1620,6 +1648,8 @@ static int _shutdown(struct omap_hwmod *oh) > - pr_warn("omap_hwmod: %s: _wait_target_disable > failed\n", > - oh->name); > - _disable_clocks(oh); > -+ if (oh->clkdm) > -+ clkdm_hwmod_disable(oh->clkdm, oh); > - } > - /* XXX Should this code also force-disable the optional clocks? */ > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add- > debugfs-node-to-show-the-summary-of-all-clo.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to- > show-the-summary-of-all-clo.patch > deleted file mode 100644 > index db025c7..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add-debugfs- > node-to-show-the-summary-of-all-clo.patch > +++ /dev/null > @@ -1,84 +0,0 @@ > -From 01eed55ec7b57fb5109e7eb70cbdebdc030135a5 Mon Sep 17 00:00:00 > 2001 > -From: Jon Hunter <jon-hunter@ti.com> > -Date: Sun, 10 Jul 2011 05:57:33 -0600 > -Subject: [PATCH 095/149] OMAP: Add debugfs node to show the summary of > all clocks > - > -Add a debugfs node called "summary" to /sys/kernel/debug/clock/ > -that displays a quick summary of all clocks registered in the > -"clocks" structure. The format of the output from this node is: > - > -<clock-name> <parent-name> <rate> <usecount> > - > -This debugfs node was very helpful for taking a quick snapshot of > -the linux clock tree for OMAP and ensuring clock frequencies > -calculated by the kernel were indeed correct. This patch helped > -uncover some bugs in the linux clock tree for OMAP4. > - > -Signed-off-by: Jon Hunter <jon-hunter@ti.com> > -Signed-off-by: Paul Walmsley <paul@pwsan.com> > ---- > - arch/arm/plat-omap/clock.c | 39 > +++++++++++++++++++++++++++++++++++++++ > - 1 files changed, 39 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c > -index c9122dd..156b27d 100644 > ---- a/arch/arm/plat-omap/clock.c > -+++ b/arch/arm/plat-omap/clock.c > -@@ -475,8 +475,41 @@ int __init clk_init(struct clk_functions * > custom_clocks) > - /* > - * debugfs support to trace clock tree hierarchy and attributes > - */ > -+ > -+#include <linux/debugfs.h> > -+#include <linux/seq_file.h> > -+ > - static struct dentry *clk_debugfs_root; > - > -+static int clk_dbg_show_summary(struct seq_file *s, void *unused) > -+{ > -+ struct clk *c; > -+ struct clk *pa; > -+ > -+ seq_printf(s, "%-30s %-30s %-10s %s\n", > -+ "clock-name", "parent-name", "rate", "use-count"); > -+ > -+ list_for_each_entry(c, &clocks, node) { > -+ pa = c->parent; > -+ seq_printf(s, "%-30s %-30s %-10lu %d\n", > -+ c->name, pa ? pa->name : "none", c->rate, c- > >usecount); > -+ } > -+ > -+ return 0; > -+} > -+ > -+static int clk_dbg_open(struct inode *inode, struct file *file) > -+{ > -+ return single_open(file, clk_dbg_show_summary, inode->i_private); > -+} > -+ > -+static const struct file_operations debug_clock_fops = { > -+ .open = clk_dbg_open, > -+ .read = seq_read, > -+ .llseek = seq_lseek, > -+ .release = single_release, > -+}; > -+ > - static int clk_debugfs_register_one(struct clk *c) > - { > - int err; > -@@ -551,6 +584,12 @@ static int __init clk_debugfs_init(void) > - if (err) > - goto err_out; > - } > -+ > -+ d = debugfs_create_file("summary", S_IRUGO, > -+ d, NULL, &debug_clock_fops); > -+ if (!d) > -+ return -ENOMEM; > -+ > - return 0; > - err_out: > - debugfs_remove_recursive(clk_debugfs_root); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2- > hwmod-remove-unused-voltagedomain-pointer.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused- > voltagedomain-pointer.patch > deleted file mode 100644 > index 3815245..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2-hwmod- > remove-unused-voltagedomain-pointer.patch > +++ /dev/null > @@ -1,30 +0,0 @@ > -From c9d2e22cc8ed08fb232d99c161f8d0be18c8569e Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 16 Mar 2011 11:02:59 -0700 > -Subject: [PATCH 096/149] OMAP2+: hwmod: remove unused voltagedomain > pointer > - > -The voltage domain pointer currently in struct omap_hwmod is not used > -and does not belong here. Instead, voltage domains will be associated > -with powerdomains in forthcoming patches. > - > -Acked-by: Paul Walmsley <paul@pwsan.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 - > - 1 files changed, 0 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h > b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -index 0e329ca..38ac4af 100644 > ---- a/arch/arm/plat-omap/include/plat/omap_hwmod.h > -+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h > -@@ -526,7 +526,6 @@ struct omap_hwmod { > - char *clkdm_name; > - struct clockdomain *clkdm; > - char *vdd_name; > -- struct voltagedomain *voltdm; > - struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ > - struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ > - void *dev_attr; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2- > voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM- > mod-offets-into-VC-VP-struct.patch > deleted file mode 100644 > index c4c56d0..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2-voltage- > move-PRCM-mod-offets-into-VC-VP-struct.patch > +++ /dev/null > @@ -1,577 +0,0 @@ > -From 9d2ed2fa5cc20d7c0233d1c5c8070c7c3f0914c8 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 16 Mar 2011 13:35:22 -0700 > -Subject: [PATCH 097/149] OMAP2+: voltage: move PRCM mod offets into > VC/VP structures > - > -Eliminate need for global variables for the various PRM module offsets by > -making them part of the VP/VC common structures > - > -Eventually, these will likely be moved again, or more likely removed > -when VP/VC code is isolated, but for now just getting rid of them as > -global variabes so that the voltage domain initialization can be > -cleaned up. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.h | 2 + > - arch/arm/mach-omap2/vc3xxx_data.c | 1 + > - arch/arm/mach-omap2/vc44xx_data.c | 1 + > - arch/arm/mach-omap2/voltage.c | 109 ++++++++++++------------- > - arch/arm/mach-omap2/voltage.h | 6 +- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 +- > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 9 +- > - arch/arm/mach-omap2/vp.h | 2 + > - arch/arm/mach-omap2/vp3xxx_data.c | 1 + > - arch/arm/mach-omap2/vp44xx_data.c | 1 + > - 10 files changed, 70 insertions(+), 70 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index e776777..f7338af 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -23,6 +23,7 @@ > - * struct omap_vc_common_data - per-VC register/bitfield data > - * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register > - * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register > -+ * @prm_mod: PRM module id used for PRM register access > - * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start > - * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start > - * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start > -@@ -40,6 +41,7 @@ > - struct omap_vc_common_data { > - u32 cmd_on_mask; > - u32 valid; > -+ s16 prm_mod; > - u8 smps_sa_reg; > - u8 smps_volra_reg; > - u8 bypass_val_reg; > -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach- > omap2/vc3xxx_data.c > -index f37dc4b..55caccb 100644 > ---- a/arch/arm/mach-omap2/vc3xxx_data.c > -+++ b/arch/arm/mach-omap2/vc3xxx_data.c > -@@ -30,6 +30,7 @@ > - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. > - */ > - static struct omap_vc_common_data omap3_vc_common = { > -+ .prm_mod = OMAP3430_GR_MOD, > - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, > - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, > - .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, > -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach- > omap2/vc44xx_data.c > -index a98da8d..b62678e 100644 > ---- a/arch/arm/mach-omap2/vc44xx_data.c > -+++ b/arch/arm/mach-omap2/vc44xx_data.c > -@@ -31,6 +31,7 @@ > - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. > - */ > - static const struct omap_vc_common_data omap4_vc_common = { > -+ .prm_mod = OMAP4430_PRM_DEVICE_INST, > - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, > - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, > - .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 9ef3789..3151d75 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -50,10 +50,6 @@ static struct omap_vdd_info **vdd_info; > - */ > - static int nr_scalable_vdd; > - > --/* XXX document */ > --static s16 prm_mod_offs; > --static s16 prm_irqst_ocp_mod_offs; > -- > - static struct dentry *voltage_dir; > - > - /* Init function pointers */ > -@@ -147,7 +143,7 @@ static int vp_volt_debug_get(void *data, u64 *val) > - return -EINVAL; > - } > - > -- vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); > -+ vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->voltage); > - > - if (!vdd->pmic_info->vsel_to_uv) { > - pr_warning("PMIC function to convert vsel to voltage" > -@@ -197,19 +193,19 @@ static void vp_latch_vsel(struct omap_vdd_info > *vdd) > - > - vsel = vdd->pmic_info->uv_to_vsel(uvdc); > - > -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); > -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - vpconfig &= ~(vdd->vp_data->vp_common- > >vpconfig_initvoltage_mask | > - vdd->vp_data->vp_common->vpconfig_initvdd); > - vpconfig |= vsel << vdd->vp_data->vp_common- > >vpconfig_initvoltage_shift; > - > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - > - /* Trigger initVDD value copy to voltage processor */ > - vdd->write_reg((vpconfig | vdd->vp_data->vp_common- > >vpconfig_initvdd), > -- prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->vp_data->vp_common->prm_mod, vdd->vp_data- > >vpconfig); > - > - /* Clear initVDD copy trigger bit */ > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - } > - > - /* Generic voltage init functions */ > -@@ -227,19 +223,19 @@ static void __init vp_init(struct omap_vdd_info > *vdd) > - (vdd->vp_rt_data.vpconfig_errorgain << > - vdd->vp_data->vp_common->vpconfig_errorgain_shift) | > - vdd->vp_data->vp_common->vpconfig_timeouten; > -- vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vpconfig); > - > - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << > - vdd->vp_data->vp_common- > >vstepmin_smpswaittimemin_shift) | > - (vdd->vp_rt_data.vstepmin_stepmin << > - vdd->vp_data->vp_common->vstepmin_stepmin_shift)); > -- vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmin); > -+ vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vstepmin); > - > - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << > - vdd->vp_data->vp_common- > >vstepmax_smpswaittimemax_shift) | > - (vdd->vp_rt_data.vstepmax_stepmax << > - vdd->vp_data->vp_common->vstepmax_stepmax_shift)); > -- vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmax); > -+ vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vstepmax); > - > - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << > - vdd->vp_data->vp_common->vlimitto_vddmax_shift) | > -@@ -247,7 +243,7 @@ static void __init vp_init(struct omap_vdd_info *vdd) > - vdd->vp_data->vp_common->vlimitto_vddmin_shift) | > - (vdd->vp_rt_data.vlimitto_timeout << > - vdd->vp_data->vp_common->vlimitto_timeout_shift)); > -- vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vlimitto); > -+ vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vlimitto); > - } > - > - static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) > -@@ -336,23 +332,23 @@ static int _pre_volt_scale(struct omap_vdd_info > *vdd, > - volt_data = NULL; > - > - *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); > -- *current_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data- > >voltage); > -+ *current_vsel = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, vdd->vp_data->voltage); > - > - /* Setting the ON voltage to the new target voltage */ > -- vc_cmdval = vdd->read_reg(prm_mod_offs, vdd->vc_data- > >cmdval_reg); > -+ vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, > vdd->vc_data->cmdval_reg); > - vc_cmdval &= ~vc_common->cmd_on_mask; > - vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); > -- vdd->write_reg(vc_cmdval, prm_mod_offs, vdd->vc_data- > >cmdval_reg); > -+ vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, > vdd->vc_data->cmdval_reg); > - > - /* Setting vp errorgain based on the voltage */ > - if (volt_data) { > -- vp_errgain_val = vdd->read_reg(prm_mod_offs, > -+ vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, > - vdd->vp_data->vpconfig); > - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; > - vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; > - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << > - vp_common->vpconfig_errorgain_shift; > -- vdd->write_reg(vp_errgain_val, prm_mod_offs, > -+ vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common- > >prm_mod, > - vdd->vp_data->vpconfig); > - } > - > -@@ -394,11 +390,11 @@ static int vc_bypass_scale_voltage(struct > omap_vdd_info *vdd, > - (vdd->pmic_info->i2c_slave_addr << > - vdd->vc_data->vc_common->slaveaddr_shift); > - > -- vdd->write_reg(vc_bypass_value, prm_mod_offs, vc_bypass_val_reg); > -- vdd->write_reg(vc_bypass_value | vc_valid, prm_mod_offs, > -+ vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common- > >prm_mod, vc_bypass_val_reg); > -+ vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data- > >vc_common->prm_mod, > - vc_bypass_val_reg); > - > -- vc_bypass_value = vdd->read_reg(prm_mod_offs, > vc_bypass_val_reg); > -+ vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common- > >prm_mod, vc_bypass_val_reg); > - /* > - * Loop till the bypass command is acknowledged from the SMPS. > - * NOTE: This is legacy code. The loop count and retry count needs > -@@ -417,7 +413,7 @@ static int vc_bypass_scale_voltage(struct > omap_vdd_info *vdd, > - loop_cnt = 0; > - udelay(10); > - } > -- vc_bypass_value = vdd->read_reg(prm_mod_offs, > -+ vc_bypass_value = vdd->read_reg(vdd->vc_data- > >vc_common->prm_mod, > - vc_bypass_val_reg); > - } > - > -@@ -445,8 +441,8 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - */ > - while (timeout++ < VP_TRANXDONE_TIMEOUT) { > - vdd->write_reg(vdd->vp_data->prm_irqst_data- > >tranxdone_status, > -- prm_irqst_ocp_mod_offs, prm_irqst_reg); > -- if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) > & > -+ vdd->prm_irqst_mod, prm_irqst_reg); > -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & > - vdd->vp_data->prm_irqst_data->tranxdone_status)) > - break; > - udelay(1); > -@@ -458,28 +454,28 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - } > - > - /* Configure for VP-Force Update */ > -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); > -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | > - vdd->vp_data->vp_common->vpconfig_forceupdate | > - vdd->vp_data->vp_common- > >vpconfig_initvoltage_mask); > - vpconfig |= ((target_vsel << > - vdd->vp_data->vp_common- > >vpconfig_initvoltage_shift)); > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - > - /* Trigger initVDD value copy to voltage processor */ > - vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - > - /* Force update of voltage */ > - vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - > - /* > - * Wait for TransactionDone. Typical latency is <200us. > - * Depends on SMPSWAITTIMEMIN/MAX and voltage change > - */ > - timeout = 0; > -- omap_test_timeout((vdd->read_reg(prm_irqst_ocp_mod_offs, > prm_irqst_reg) & > -+ omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, > prm_irqst_reg) & > - vdd->vp_data->prm_irqst_data->tranxdone_status), > - VP_TRANXDONE_TIMEOUT, timeout); > - if (timeout >= VP_TRANXDONE_TIMEOUT) > -@@ -496,8 +492,8 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - timeout = 0; > - while (timeout++ < VP_TRANXDONE_TIMEOUT) { > - vdd->write_reg(vdd->vp_data->prm_irqst_data- > >tranxdone_status, > -- prm_irqst_ocp_mod_offs, prm_irqst_reg); > -- if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) > & > -+ vdd->prm_irqst_mod, prm_irqst_reg); > -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & > - vdd->vp_data->prm_irqst_data->tranxdone_status)) > - break; > - udelay(1); > -@@ -508,13 +504,13 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - "to clear the TRANXDONE status\n", > - __func__, vdd->voltdm.name); > - > -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); > -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - /* Clear initVDD copy trigger bit */ > - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - /* Clear force bit */ > - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - > - return 0; > - } > -@@ -525,10 +521,10 @@ static void __init omap3_vfsm_init(struct > omap_vdd_info *vdd) > - * Voltage Manager FSM parameters init > - * XXX This data should be passed in from the board file > - */ > -- vdd->write_reg(OMAP3_CLKSETUP, prm_mod_offs, > OMAP3_PRM_CLKSETUP_OFFSET); > -- vdd->write_reg(OMAP3_VOLTOFFSET, prm_mod_offs, > -+ vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common- > >prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); > -+ vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common- > >prm_mod, > - OMAP3_PRM_VOLTOFFSET_OFFSET); > -- vdd->write_reg(OMAP3_VOLTSETUP2, prm_mod_offs, > -+ vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common- > >prm_mod, > - OMAP3_PRM_VOLTSETUP2_OFFSET); > - } > - > -@@ -550,15 +546,15 @@ static void __init omap3_vc_init(struct > omap_vdd_info *vdd) > - (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | > - (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | > - (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); > -- vdd->write_reg(vc_val, prm_mod_offs, vdd->vc_data->cmdval_reg); > -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd- > >vc_data->cmdval_reg); > - > - /* > - * Generic VC parameters init > - * XXX This data should be abstracted out > - */ > -- vdd->write_reg(OMAP3430_CMD1_MASK | > OMAP3430_RAV1_MASK, prm_mod_offs, > -+ vdd->write_reg(OMAP3430_CMD1_MASK | > OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod, > - OMAP3_PRM_VC_CH_CONF_OFFSET); > -- vdd->write_reg(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, prm_mod_offs, > -+ vdd->write_reg(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, > - OMAP3_PRM_VC_I2C_CFG_OFFSET); > - > - omap3_vfsm_init(vdd); > -@@ -585,11 +581,11 @@ static void __init omap4_vc_init(struct > omap_vdd_info *vdd) > - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | > OMAP4430_CMD_VDD_MPU_L_MASK | > - OMAP4430_RAV_VDD_IVA_L_MASK | > OMAP4430_CMD_VDD_IVA_L_MASK | > - OMAP4430_RAV_VDD_CORE_L_MASK | > OMAP4430_CMD_VDD_CORE_L_MASK); > -- vdd->write_reg(vc_val, prm_mod_offs, > OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, > OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > - > - /* XXX These are magic numbers and do not belong! */ > - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << > OMAP4430_SCLH_SHIFT); > -- vdd->write_reg(vc_val, prm_mod_offs, > OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, > OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > - > - is_initialized = true; > - } > -@@ -612,27 +608,27 @@ static void __init omap_vc_init(struct > omap_vdd_info *vdd) > - } > - > - /* Set up the SMPS_SA(i2c slave address in VC */ > -- vc_val = vdd->read_reg(prm_mod_offs, > -+ vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, > - vdd->vc_data->vc_common->smps_sa_reg); > - vc_val &= ~vdd->vc_data->smps_sa_mask; > - vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data- > >smps_sa_shift; > -- vdd->write_reg(vc_val, prm_mod_offs, > -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, > - vdd->vc_data->vc_common->smps_sa_reg); > - > - /* Setup the VOLRA(pmic reg addr) in VC */ > -- vc_val = vdd->read_reg(prm_mod_offs, > -+ vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, > - vdd->vc_data->vc_common->smps_volra_reg); > - vc_val &= ~vdd->vc_data->smps_volra_mask; > - vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data- > >smps_volra_shift; > -- vdd->write_reg(vc_val, prm_mod_offs, > -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, > - vdd->vc_data->vc_common->smps_volra_reg); > - > - /* Configure the setup times */ > -- vc_val = vdd->read_reg(prm_mod_offs, vdd->vfsm->voltsetup_reg); > -+ vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd- > >vfsm->voltsetup_reg); > - vc_val &= ~vdd->vfsm->voltsetup_mask; > - vc_val |= vdd->pmic_info->volt_setup_time << > - vdd->vfsm->voltsetup_shift; > -- vdd->write_reg(vc_val, prm_mod_offs, vdd->vfsm->voltsetup_reg); > -+ vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd- > >vfsm->voltsetup_reg); > - > - if (cpu_is_omap34xx()) > - omap3_vc_init(vdd); > -@@ -713,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct > voltagedomain *voltdm) > - return 0; > - } > - > -- curr_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); > -+ curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->voltage); > - > - if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { > - pr_warning("%s: PMIC function to convert vsel to voltage" > -@@ -755,9 +751,9 @@ void omap_vp_enable(struct voltagedomain *voltdm) > - vp_latch_vsel(vdd); > - > - /* Enable VP */ > -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); > -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - vdd->vp_enabled = true; > - } > - > -@@ -794,14 +790,14 @@ void omap_vp_disable(struct voltagedomain > *voltdm) > - } > - > - /* Disable VP */ > -- vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); > -+ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; > -- vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); > -+ vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - > - /* > - * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us > - */ > -- omap_test_timeout((vdd->read_reg(prm_mod_offs, vdd->vp_data- > >vstatus)), > -+ omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, vdd->vp_data->vstatus)), > - VP_IDLE_TIMEOUT, timeout); > - > - if (timeout >= VP_IDLE_TIMEOUT) > -@@ -1094,12 +1090,9 @@ int __init omap_voltage_late_init(void) > - } > - > - /* XXX document */ > --int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_ocp_mod, > -- struct omap_vdd_info *omap_vdd_array[], > -+int __init omap_voltage_early_init(struct omap_vdd_info > *omap_vdd_array[], > - u8 omap_vdd_count) > - { > -- prm_mod_offs = prm_mod; > -- prm_irqst_ocp_mod_offs = prm_irqst_ocp_mod; > - vdd_info = omap_vdd_array; > - nr_scalable_vdd = omap_vdd_count; > - return 0; > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index e9f5408..ffdc55e 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -119,6 +119,7 @@ struct omap_volt_pmic_info { > - * @voltdm : pointer to the voltage domain structure > - * @debug_dir : debug directory for this voltage domain. > - * @curr_volt : current voltage for this vdd. > -+ * @prm_irqst_mod : PRM module id used for PRM IRQ status register > access > - * @vp_enabled : flag to keep track of whether vp is enabled or > not > - * @volt_scale : API to scale the voltage of the vdd. > - */ > -@@ -133,6 +134,8 @@ struct omap_vdd_info { > - struct dentry *debug_dir; > - u32 curr_volt; > - bool vp_enabled; > -+ > -+ s16 prm_irqst_mod; > - u32 (*read_reg) (u16 mod, u8 offset); > - void (*write_reg) (u32 val, u16 mod, u8 offset); > - int (*volt_scale) (struct omap_vdd_info *vdd, > -@@ -151,8 +154,7 @@ struct omap_volt_data > *omap_voltage_get_voltdata(struct voltagedomain *voltdm, > - unsigned long volt); > - unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); > - struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); > --int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_mod, > -- struct omap_vdd_info *omap_vdd_array[], > -+int __init omap_voltage_early_init(struct omap_vdd_info > *omap_vdd_array[], > - u8 omap_vdd_count); > - #ifdef CONFIG_PM > - int omap_voltage_register_pmic(struct voltagedomain *voltdm, > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index def230f..0d30b7f 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data > omap3_vdd1_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap3_vdd1_info = { > -+ .prm_irqst_mod = OCP_MOD, > - .vp_data = &omap3_vp1_data, > - .vc_data = &omap3_vc1_data, > - .vfsm = &omap3_vdd1_vfsm_data, > -@@ -53,6 +54,7 @@ static const struct omap_vfsm_instance_data > omap3_vdd2_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap3_vdd2_info = { > -+ .prm_irqst_mod = OCP_MOD, > - .vp_data = &omap3_vp2_data, > - .vc_data = &omap3_vc2_data, > - .vfsm = &omap3_vdd2_vfsm_data, > -@@ -70,9 +72,6 @@ static struct omap_vdd_info *omap3_vdd_info[] = { > - /* OMAP3 specific voltage init functions */ > - static int __init omap3xxx_voltage_early_init(void) > - { > -- s16 prm_mod = OMAP3430_GR_MOD; > -- s16 prm_irqst_ocp_mod = OCP_MOD; > -- > - if (!cpu_is_omap34xx()) > - return 0; > - > -@@ -88,8 +87,7 @@ static int __init omap3xxx_voltage_early_init(void) > - omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; > - } > - > -- return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, > -- omap3_vdd_info, > -+ return omap_voltage_early_init(omap3_vdd_info, > - ARRAY_SIZE(omap3_vdd_info)); > - }; > - core_initcall(omap3xxx_voltage_early_init); > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index cb64996..1c2d7d7 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -37,6 +37,7 @@ static const struct omap_vfsm_instance_data > omap4_vdd_mpu_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap4_vdd_mpu_info = { > -+ .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > - .vp_data = &omap4_vp_mpu_data, > - .vc_data = &omap4_vc_mpu_data, > - .vfsm = &omap4_vdd_mpu_vfsm_data, > -@@ -50,6 +51,7 @@ static const struct omap_vfsm_instance_data > omap4_vdd_iva_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap4_vdd_iva_info = { > -+ .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > - .vp_data = &omap4_vp_iva_data, > - .vc_data = &omap4_vc_iva_data, > - .vfsm = &omap4_vdd_iva_vfsm_data, > -@@ -63,6 +65,7 @@ static const struct omap_vfsm_instance_data > omap4_vdd_core_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap4_vdd_core_info = { > -+ .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > - .vp_data = &omap4_vp_core_data, > - .vc_data = &omap4_vc_core_data, > - .vfsm = &omap4_vdd_core_vfsm_data, > -@@ -81,9 +84,6 @@ static struct omap_vdd_info *omap4_vdd_info[] = { > - /* OMAP4 specific voltage init functions */ > - static int __init omap44xx_voltage_early_init(void) > - { > -- s16 prm_mod = OMAP4430_PRM_DEVICE_INST; > -- s16 prm_irqst_ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST; > -- > - if (!cpu_is_omap44xx()) > - return 0; > - > -@@ -95,8 +95,7 @@ static int __init omap44xx_voltage_early_init(void) > - omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; > - omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; > - > -- return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, > -- omap4_vdd_info, > -+ return omap_voltage_early_init(omap4_vdd_info, > - ARRAY_SIZE(omap4_vdd_info)); > - }; > - core_initcall(omap44xx_voltage_early_init); > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 7ce134f..d277da6 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -42,6 +42,7 @@ > - * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in > PRM_VP*_VLIMITTO reg > - * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in > PRM_VP*_VLIMITTO reg > - * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in > PRM_VP*_VLIMITTO reg > -+ * @prm_mod: PRM module id used for PRM register access > - * > - * XXX It it not necessary to have both a mask and a shift for the same > - * bitfield - remove one > -@@ -54,6 +55,7 @@ struct omap_vp_common_data { > - u32 vpconfig_initvdd; > - u32 vpconfig_forceupdate; > - u32 vpconfig_vpenable; > -+ s16 prm_mod; > - u8 vpconfig_erroroffset_shift; > - u8 vpconfig_errorgain_shift; > - u8 vpconfig_initvoltage_shift; > -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach- > omap2/vp3xxx_data.c > -index 6452170..c9b3e64 100644 > ---- a/arch/arm/mach-omap2/vp3xxx_data.c > -+++ b/arch/arm/mach-omap2/vp3xxx_data.c > -@@ -31,6 +31,7 @@ > - * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. > - */ > - static const struct omap_vp_common_data omap3_vp_common = { > -+ .prm_mod = OMAP3430_GR_MOD, > - .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, > - .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, > - .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, > -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach- > omap2/vp44xx_data.c > -index 65d1ad6..1a0842e 100644 > ---- a/arch/arm/mach-omap2/vp44xx_data.c > -+++ b/arch/arm/mach-omap2/vp44xx_data.c > -@@ -32,6 +32,7 @@ > - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. > - */ > - static const struct omap_vp_common_data omap4_vp_common = { > -+ .prm_mod = OMAP4430_PRM_DEVICE_INST, > - .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, > - .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, > - .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2- > voltage-move-prm_irqst_reg-from-VP-into-voltag.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2-voltage-move- > prm_irqst_reg-from-VP-into-voltag.patch > deleted file mode 100644 > index 2b2727c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2-voltage- > move-prm_irqst_reg-from-VP-into-voltag.patch > +++ /dev/null > @@ -1,203 +0,0 @@ > -From 6e8557b224128200bac5f99b41bc6213de05ad69 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 16 Mar 2011 17:20:35 -0700 > -Subject: [PATCH 098/149] OMAP2+: voltage: move prm_irqst_reg from VP > into voltage domain > - > -The prm_irqst_reg is not part of the VP. Move it up into the common > -voltage domain struct. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.c | 15 +++++++-------- > - arch/arm/mach-omap2/voltage.h | 1 + > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 ++ > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ > - arch/arm/mach-omap2/vp.h | 3 --- > - arch/arm/mach-omap2/vp3xxx_data.c | 2 -- > - arch/arm/mach-omap2/vp44xx_data.c | 3 --- > - 7 files changed, 13 insertions(+), 16 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 3151d75..a366a6b 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - unsigned long target_volt) > - { > - u32 vpconfig; > -- u8 target_vsel, current_vsel, prm_irqst_reg; > -+ u8 target_vsel, current_vsel; > - int ret, timeout = 0; > - > - ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); > - if (ret) > - return ret; > - > -- prm_irqst_reg = vdd->vp_data->prm_irqst_data->prm_irqst_reg; > -- > - /* > - * Clear all pending TransactionDone interrupt/status. Typical latency > - * is <3us > - */ > - while (timeout++ < VP_TRANXDONE_TIMEOUT) { > - vdd->write_reg(vdd->vp_data->prm_irqst_data- > >tranxdone_status, > -- vdd->prm_irqst_mod, prm_irqst_reg); > -- if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & > -+ vdd->prm_irqst_mod, vdd->prm_irqst_reg); > -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd- > >prm_irqst_reg) & > - vdd->vp_data->prm_irqst_data->tranxdone_status)) > - break; > - udelay(1); > -@@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - * Depends on SMPSWAITTIMEMIN/MAX and voltage change > - */ > - timeout = 0; > -- omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, > prm_irqst_reg) & > -+ omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, > -+ vdd->prm_irqst_reg) & > - vdd->vp_data->prm_irqst_data->tranxdone_status), > - VP_TRANXDONE_TIMEOUT, timeout); > - if (timeout >= VP_TRANXDONE_TIMEOUT) > -@@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - timeout = 0; > - while (timeout++ < VP_TRANXDONE_TIMEOUT) { > - vdd->write_reg(vdd->vp_data->prm_irqst_data- > >tranxdone_status, > -- vdd->prm_irqst_mod, prm_irqst_reg); > -- if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & > -+ vdd->prm_irqst_mod, vdd->prm_irqst_reg); > -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd- > >prm_irqst_reg) & > - vdd->vp_data->prm_irqst_data->tranxdone_status)) > - break; > - udelay(1); > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index ffdc55e..db23d49 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -136,6 +136,7 @@ struct omap_vdd_info { > - bool vp_enabled; > - > - s16 prm_irqst_mod; > -+ u8 prm_irqst_reg; > - u32 (*read_reg) (u16 mod, u8 offset); > - void (*write_reg) (u32 val, u16 mod, u8 offset); > - int (*volt_scale) (struct omap_vdd_info *vdd, > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index 0d30b7f..f831f9a 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data > omap3_vdd1_vfsm_data = { > - > - static struct omap_vdd_info omap3_vdd1_info = { > - .prm_irqst_mod = OCP_MOD, > -+ .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap3_vp1_data, > - .vc_data = &omap3_vc1_data, > - .vfsm = &omap3_vdd1_vfsm_data, > -@@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data > omap3_vdd2_vfsm_data = { > - > - static struct omap_vdd_info omap3_vdd2_info = { > - .prm_irqst_mod = OCP_MOD, > -+ .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap3_vp2_data, > - .vc_data = &omap3_vc2_data, > - .vfsm = &omap3_vdd2_vfsm_data, > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index 1c2d7d7..64dc265 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data > omap4_vdd_mpu_vfsm_data = { > - > - static struct omap_vdd_info omap4_vdd_mpu_info = { > - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > -+ .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, > - .vp_data = &omap4_vp_mpu_data, > - .vc_data = &omap4_vc_mpu_data, > - .vfsm = &omap4_vdd_mpu_vfsm_data, > -@@ -52,6 +53,7 @@ static const struct omap_vfsm_instance_data > omap4_vdd_iva_vfsm_data = { > - > - static struct omap_vdd_info omap4_vdd_iva_info = { > - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > -+ .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap4_vp_iva_data, > - .vc_data = &omap4_vc_iva_data, > - .vfsm = &omap4_vdd_iva_vfsm_data, > -@@ -66,6 +68,7 @@ static const struct omap_vfsm_instance_data > omap4_vdd_core_vfsm_data = { > - > - static struct omap_vdd_info omap4_vdd_core_info = { > - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > -+ .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap4_vp_core_data, > - .vc_data = &omap4_vc_core_data, > - .vfsm = &omap4_vdd_core_vfsm_data, > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index d277da6..5406b08 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -70,16 +70,13 @@ struct omap_vp_common_data { > - > - /** > - * struct omap_vp_prm_irqst_data - > PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data > -- * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM > - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU > reg > - * > -- * XXX prm_irqst_reg does not belong here > - * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a > - * hardware bug > - * XXX This structure is probably not needed > - */ > - struct omap_vp_prm_irqst_data { > -- u8 prm_irqst_reg; > - u32 tranxdone_status; > - }; > - > -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach- > omap2/vp3xxx_data.c > -index c9b3e64..a8ea045 100644 > ---- a/arch/arm/mach-omap2/vp3xxx_data.c > -+++ b/arch/arm/mach-omap2/vp3xxx_data.c > -@@ -51,7 +51,6 @@ static const struct omap_vp_common_data > omap3_vp_common = { > - }; > - > - static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { > -- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, > - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, > - }; > - > -@@ -67,7 +66,6 @@ struct omap_vp_instance_data omap3_vp1_data = { > - }; > - > - static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { > -- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, > - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, > - }; > - > -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach- > omap2/vp44xx_data.c > -index 1a0842e..0957c24 100644 > ---- a/arch/arm/mach-omap2/vp44xx_data.c > -+++ b/arch/arm/mach-omap2/vp44xx_data.c > -@@ -52,7 +52,6 @@ static const struct omap_vp_common_data > omap4_vp_common = { > - }; > - > - static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data > = { > -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, > - .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, > - }; > - > -@@ -68,7 +67,6 @@ struct omap_vp_instance_data omap4_vp_mpu_data = > { > - }; > - > - static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data > = { > -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, > - }; > - > -@@ -84,7 +82,6 @@ struct omap_vp_instance_data omap4_vp_iva_data = { > - }; > - > - static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data > = { > -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2- > voltage-start-towards-a-new-voltagedomain-laye.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a- > new-voltagedomain-laye.patch > deleted file mode 100644 > index 930f985..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2-voltage-start- > towards-a-new-voltagedomain-laye.patch > +++ /dev/null > @@ -1,986 +0,0 @@ > -From 1e7eea5a5f4557d90e5b25e4473b7cb77540b7cd Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 16 Mar 2011 14:25:45 -0700 > -Subject: [PATCH 099/149] OMAP2+: voltage: start towards a new > voltagedomain layer > - > -Start cleaning up the voltage layer to have a voltage domain layer > -that resembles the structure of the existing clock and power domain > -layers. To that end: > - > -- move the 'struct voltagedomain' out of 'struct omap_vdd_info' to > - become the primary data structure. > - > -- convert any functions taking a pointer to struct omap_vdd_info into > - functions taking a struct voltagedomain pointer. > - > -- convert the register & initialize of voltage domains to look like > - that of powerdomains > - > -- convert omap_voltage_domain_lookup() to voltdm_lookup(), modeled > - after the current powerdomain and clockdomain lookup functions. > - > -- omap_voltage_late_init(): only configure VDD info when > - the vdd_info struct is non-NULL > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/io.c | 3 + > - arch/arm/mach-omap2/omap_twl.c | 10 +- > - arch/arm/mach-omap2/pm.c | 2 +- > - arch/arm/mach-omap2/sr_device.c | 2 +- > - arch/arm/mach-omap2/voltage.c | 257 ++++++++++++++----------- > - arch/arm/mach-omap2/voltage.h | 27 ++-- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 34 ++-- > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 44 ++-- > - 8 files changed, 207 insertions(+), 172 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c > -index 2ce1ce6..9f5a846 100644 > ---- a/arch/arm/mach-omap2/io.c > -+++ b/arch/arm/mach-omap2/io.c > -@@ -38,6 +38,7 @@ > - #include "io.h" > - > - #include <plat/omap-pm.h> > -+#include "voltage.h" > - #include "powerdomain.h" > - > - #include "clockdomain.h" > -@@ -349,10 +350,12 @@ void __init > omap2_init_common_infrastructure(void) > - omap2xxx_clockdomains_init(); > - omap2430_hwmod_init(); > - } else if (cpu_is_omap34xx()) { > -+ omap3xxx_voltagedomains_init(); > - omap3xxx_powerdomains_init(); > - omap3xxx_clockdomains_init(); > - omap3xxx_hwmod_init(); > - } else if (cpu_is_omap44xx()) { > -+ omap44xx_voltagedomains_init(); > - omap44xx_powerdomains_init(); > - omap44xx_clockdomains_init(); > - omap44xx_hwmod_init(); > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index 07d6140..fcd2f62 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -250,13 +250,13 @@ int __init omap4_twl_init(void) > - if (!cpu_is_omap44xx()) > - return -ENODEV; > - > -- voltdm = omap_voltage_domain_lookup("mpu"); > -+ voltdm = voltdm_lookup("mpu"); > - omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); > - > -- voltdm = omap_voltage_domain_lookup("iva"); > -+ voltdm = voltdm_lookup("iva"); > - omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); > - > -- voltdm = omap_voltage_domain_lookup("core"); > -+ voltdm = voltdm_lookup("core"); > - omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); > - > - return 0; > -@@ -288,10 +288,10 @@ int __init omap3_twl_init(void) > - if (!twl_sr_enable_autoinit) > - omap3_twl_set_sr_bit(true); > - > -- voltdm = omap_voltage_domain_lookup("mpu"); > -+ voltdm = voltdm_lookup("mpu"); > - omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); > - > -- voltdm = omap_voltage_domain_lookup("core"); > -+ voltdm = voltdm_lookup("core"); > - omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); > - > - return 0; > -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c > -index 3feb359..3bce29b 100644 > ---- a/arch/arm/mach-omap2/pm.c > -+++ b/arch/arm/mach-omap2/pm.c > -@@ -183,7 +183,7 @@ static int __init omap2_set_init_voltage(char > *vdd_name, char *clk_name, > - goto exit; > - } > - > -- voltdm = omap_voltage_domain_lookup(vdd_name); > -+ voltdm = voltdm_lookup(vdd_name); > - if (IS_ERR(voltdm)) { > - printk(KERN_ERR "%s: Unable to get vdd pointer for > vdd_%s\n", > - __func__, vdd_name); > -diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach- > omap2/sr_device.c > -index 10d3c5e..2782d3f 100644 > ---- a/arch/arm/mach-omap2/sr_device.c > -+++ b/arch/arm/mach-omap2/sr_device.c > -@@ -102,7 +102,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void > *user) > - sr_data->senn_mod = 0x1; > - sr_data->senp_mod = 0x1; > - > -- sr_data->voltdm = omap_voltage_domain_lookup(oh->vdd_name); > -+ sr_data->voltdm = voltdm_lookup(oh->vdd_name); > - if (IS_ERR(sr_data->voltdm)) { > - pr_err("%s: Unable to get voltage domain pointer for VDD > %s\n", > - __func__, oh->vdd_name); > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index a366a6b..4f0361a 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -40,20 +40,13 @@ > - #include "vc.h" > - #include "vp.h" > - > --#define VOLTAGE_DIR_SIZE 16 > -- > -- > --static struct omap_vdd_info **vdd_info; > -- > --/* > -- * Number of scalable voltage domains. > -- */ > --static int nr_scalable_vdd; > -+static LIST_HEAD(voltdm_list); > - > -+#define VOLTAGE_DIR_SIZE 16 > - static struct dentry *voltage_dir; > - > - /* Init function pointers */ > --static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, > -+static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, > - unsigned long target_volt); > - > - static u32 omap3_voltage_read_reg(u16 mod, u8 offset) > -@@ -77,11 +70,12 @@ static void omap4_voltage_write_reg(u32 val, u16 > mod, u8 offset) > - omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, > mod, offset); > - } > - > --static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) > -+static int __init _config_common_vdd_data(struct voltagedomain *voltdm) > - { > - char *sys_ck_name; > - struct clk *sys_ck; > - u32 sys_clk_speed, timeout_val, waittime; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - > - /* > - * XXX Clockfw should handle this, or this should be in a > -@@ -101,7 +95,7 @@ static int __init _config_common_vdd_data(struct > omap_vdd_info *vdd) > - sys_ck = clk_get(NULL, sys_ck_name); > - if (IS_ERR(sys_ck)) { > - pr_warning("%s: Could not get the sys clk to calculate" > -- "various vdd_%s params\n", __func__, vdd- > >voltdm.name); > -+ "various vdd_%s params\n", __func__, voltdm- > >name); > - return -EINVAL; > - } > - sys_clk_speed = clk_get_rate(sys_ck); > -@@ -135,7 +129,8 @@ static int __init _config_common_vdd_data(struct > omap_vdd_info *vdd) > - /* Voltage debugfs support */ > - static int vp_volt_debug_get(void *data, u64 *val) > - { > -- struct omap_vdd_info *vdd = (struct omap_vdd_info *) data; > -+ struct voltagedomain *voltdm = (struct voltagedomain *)data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - u8 vsel; > - > - if (!vdd) { > -@@ -157,14 +152,14 @@ static int vp_volt_debug_get(void *data, u64 *val) > - > - static int nom_volt_debug_get(void *data, u64 *val) > - { > -- struct omap_vdd_info *vdd = (struct omap_vdd_info *) data; > -+ struct voltagedomain *voltdm = (struct voltagedomain *)data; > - > -- if (!vdd) { > -+ if (!voltdm) { > - pr_warning("Wrong paramater passed\n"); > - return -EINVAL; > - } > - > -- *val = omap_voltage_get_nom_volt(&vdd->voltdm); > -+ *val = omap_voltage_get_nom_volt(voltdm); > - > - return 0; > - } > -@@ -172,16 +167,17 @@ static int nom_volt_debug_get(void *data, u64 > *val) > - DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, > "%llu\n"); > - DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, > NULL, > - "%llu\n"); > --static void vp_latch_vsel(struct omap_vdd_info *vdd) > -+static void vp_latch_vsel(struct voltagedomain *voltdm) > - { > - u32 vpconfig; > - unsigned long uvdc; > - char vsel; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - > -- uvdc = omap_voltage_get_nom_volt(&vdd->voltdm); > -+ uvdc = omap_voltage_get_nom_volt(voltdm); > - if (!uvdc) { > - pr_warning("%s: unable to find current voltage for vdd_%s\n", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - return; > - } > - > -@@ -209,13 +205,14 @@ static void vp_latch_vsel(struct omap_vdd_info > *vdd) > - } > - > - /* Generic voltage init functions */ > --static void __init vp_init(struct omap_vdd_info *vdd) > -+static void __init vp_init(struct voltagedomain *voltdm) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - u32 vp_val; > - > - if (!vdd->read_reg || !vdd->write_reg) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - return; > - } > - > -@@ -246,25 +243,26 @@ static void __init vp_init(struct omap_vdd_info > *vdd) > - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vlimitto); > - } > - > --static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) > -+static void __init vdd_debugfs_init(struct voltagedomain *voltdm) > - { > - char *name; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - > - name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL); > - if (!name) { > - pr_warning("%s: Unable to allocate memory for debugfs" > - " directory name for vdd_%s", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - return; > - } > - strcpy(name, "vdd_"); > -- strcat(name, vdd->voltdm.name); > -+ strcat(name, voltdm->name); > - > - vdd->debug_dir = debugfs_create_dir(name, voltage_dir); > - kfree(name); > - if (IS_ERR(vdd->debug_dir)) { > - pr_warning("%s: Unable to create debugfs directory for" > -- " vdd_%s\n", __func__, vdd->voltdm.name); > -+ " vdd_%s\n", __func__, voltdm->name); > - vdd->debug_dir = NULL; > - return; > - } > -@@ -288,16 +286,17 @@ static void __init vdd_debugfs_init(struct > omap_vdd_info *vdd) > - (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir, > - &(vdd->vp_rt_data.vlimitto_timeout)); > - (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir, > -- (void *) vdd, &vp_volt_debug_fops); > -+ (void *) voltdm, &vp_volt_debug_fops); > - (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, > -- vdd->debug_dir, (void *) vdd, > -+ vdd->debug_dir, (void *) voltdm, > - &nom_volt_debug_fops); > - } > - > - /* Voltage scale and accessory APIs */ > --static int _pre_volt_scale(struct omap_vdd_info *vdd, > -+static int _pre_volt_scale(struct voltagedomain *voltdm, > - unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - struct omap_volt_data *volt_data; > - const struct omap_vc_common_data *vc_common; > - const struct omap_vp_common_data *vp_common; > -@@ -309,25 +308,25 @@ static int _pre_volt_scale(struct omap_vdd_info > *vdd, > - /* Check if suffiecient pmic info is available for this vdd */ > - if (!vdd->pmic_info) { > - pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - return -EINVAL; > - } > - > - if (!vdd->pmic_info->uv_to_vsel) { > - pr_err("%s: PMIC function to convert voltage in uV to" > - "vsel not registered. Hence unable to scale voltage" > -- "for vdd_%s\n", __func__, vdd->voltdm.name); > -+ "for vdd_%s\n", __func__, voltdm->name); > - return -ENODATA; > - } > - > - if (!vdd->read_reg || !vdd->write_reg) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - return -EINVAL; > - } > - > - /* Get volt_data corresponding to target_volt */ > -- volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt); > -+ volt_data = omap_voltage_get_voltdata(voltdm, target_volt); > - if (IS_ERR(volt_data)) > - volt_data = NULL; > - > -@@ -355,9 +354,10 @@ static int _pre_volt_scale(struct omap_vdd_info > *vdd, > - return 0; > - } > - > --static void _post_volt_scale(struct omap_vdd_info *vdd, > -+static void _post_volt_scale(struct voltagedomain *voltdm, > - unsigned long target_volt, u8 target_vsel, u8 current_vsel) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - u32 smps_steps = 0, smps_delay = 0; > - > - smps_steps = abs(target_vsel - current_vsel); > -@@ -370,15 +370,16 @@ static void _post_volt_scale(struct omap_vdd_info > *vdd, > - } > - > - /* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ > --static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, > -+static int vc_bypass_scale_voltage(struct voltagedomain *voltdm, > - unsigned long target_volt) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - u32 loop_cnt = 0, retries_cnt = 0; > - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; > - u8 target_vsel, current_vsel; > - int ret; > - > -- ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); > -+ ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > - if (ret) > - return ret; > - > -@@ -417,19 +418,20 @@ static int vc_bypass_scale_voltage(struct > omap_vdd_info *vdd, > - vc_bypass_val_reg); > - } > - > -- _post_volt_scale(vdd, target_volt, target_vsel, current_vsel); > -+ _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); > - return 0; > - } > - > - /* VP force update method of voltage scaling */ > --static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, > -+static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, > - unsigned long target_volt) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - u32 vpconfig; > - u8 target_vsel, current_vsel; > - int ret, timeout = 0; > - > -- ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); > -+ ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > - if (ret) > - return ret; > - > -@@ -447,7 +449,7 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - } > - if (timeout >= VP_TRANXDONE_TIMEOUT) { > - pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." > -- "Voltage change aborted", __func__, vdd- > >voltdm.name); > -+ "Voltage change aborted", __func__, voltdm->name); > - return -ETIMEDOUT; > - } > - > -@@ -480,9 +482,9 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - if (timeout >= VP_TRANXDONE_TIMEOUT) > - pr_err("%s: vdd_%s TRANXDONE timeout exceeded." > - "TRANXDONE never got set after the voltage > update\n", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - > -- _post_volt_scale(vdd, target_volt, target_vsel, current_vsel); > -+ _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); > - > - /* > - * Disable TransactionDone interrupt , clear all status, clear > -@@ -501,7 +503,7 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - if (timeout >= VP_TRANXDONE_TIMEOUT) > - pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while > trying" > - "to clear the TRANXDONE status\n", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - > - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > - /* Clear initVDD copy trigger bit */ > -@@ -514,8 +516,10 @@ static int vp_forceupdate_scale_voltage(struct > omap_vdd_info *vdd, > - return 0; > - } > - > --static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) > -+static void __init omap3_vfsm_init(struct voltagedomain *voltdm) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ > - /* > - * Voltage Manager FSM parameters init > - * XXX This data should be passed in from the board file > -@@ -527,8 +531,9 @@ static void __init omap3_vfsm_init(struct > omap_vdd_info *vdd) > - OMAP3_PRM_VOLTSETUP2_OFFSET); > - } > - > --static void __init omap3_vc_init(struct omap_vdd_info *vdd) > -+static void __init omap3_vc_init(struct voltagedomain *voltdm) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - static bool is_initialized; > - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; > - u32 vc_val; > -@@ -556,15 +561,16 @@ static void __init omap3_vc_init(struct > omap_vdd_info *vdd) > - vdd->write_reg(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, > - OMAP3_PRM_VC_I2C_CFG_OFFSET); > - > -- omap3_vfsm_init(vdd); > -+ omap3_vfsm_init(voltdm); > - > - is_initialized = true; > - } > - > - > - /* OMAP4 specific voltage init functions */ > --static void __init omap4_vc_init(struct omap_vdd_info *vdd) > -+static void __init omap4_vc_init(struct voltagedomain *voltdm) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - static bool is_initialized; > - u32 vc_val; > - > -@@ -589,20 +595,21 @@ static void __init omap4_vc_init(struct > omap_vdd_info *vdd) > - is_initialized = true; > - } > - > --static void __init omap_vc_init(struct omap_vdd_info *vdd) > -+static void __init omap_vc_init(struct voltagedomain *voltdm) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - u32 vc_val; > - > - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > - pr_err("%s: PMIC info requried to configure vc for" > - "vdd_%s not populated.Hence cannot initialize vc\n", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - return; > - } > - > - if (!vdd->read_reg || !vdd->write_reg) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -- __func__, vdd->voltdm.name); > -+ __func__, voltdm->name); > - return; > - } > - > -@@ -630,23 +637,24 @@ static void __init omap_vc_init(struct > omap_vdd_info *vdd) > - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd- > >vfsm->voltsetup_reg); > - > - if (cpu_is_omap34xx()) > -- omap3_vc_init(vdd); > -+ omap3_vc_init(voltdm); > - else if (cpu_is_omap44xx()) > -- omap4_vc_init(vdd); > -+ omap4_vc_init(voltdm); > - } > - > --static int __init omap_vdd_data_configure(struct omap_vdd_info *vdd) > -+static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) > - { > -+ struct omap_vdd_info *vdd = voltdm->vdd; > - int ret = -EINVAL; > - > - if (!vdd->pmic_info) { > - pr_err("%s: PMIC info requried to configure vdd_%s not" > - "populated.Hence cannot initialize vdd_%s\n", > -- __func__, vdd->voltdm.name, vdd->voltdm.name); > -+ __func__, voltdm->name, voltdm->name); > - goto ovdc_out; > - } > - > -- if (IS_ERR_VALUE(_config_common_vdd_data(vdd))) > -+ if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) > - goto ovdc_out; > - > - if (cpu_is_omap34xx()) { > -@@ -680,7 +688,7 @@ unsigned long omap_voltage_get_nom_volt(struct > voltagedomain *voltdm) > - return 0; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - > - return vdd->curr_volt; > - } > -@@ -701,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct > voltagedomain *voltdm) > - return 0; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - if (!vdd->read_reg) { > - pr_err("%s: No read API for reading vdd_%s regs\n", > - __func__, voltdm->name); > -@@ -736,7 +744,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) > - return; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - if (!vdd->read_reg || !vdd->write_reg) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > -@@ -747,7 +755,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) > - if (vdd->vp_enabled) > - return; > - > -- vp_latch_vsel(vdd); > -+ vp_latch_vsel(voltdm); > - > - /* Enable VP */ > - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -@@ -774,7 +782,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) > - return; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - if (!vdd->read_reg || !vdd->write_reg) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > -@@ -827,7 +835,7 @@ int omap_voltage_scale_vdd(struct voltagedomain > *voltdm, > - return -EINVAL; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - > - if (!vdd->volt_scale) { > - pr_err("%s: No voltage scale API registered for vdd_%s\n", > -@@ -835,7 +843,7 @@ int omap_voltage_scale_vdd(struct voltagedomain > *voltdm, > - return -ENODATA; > - } > - > -- return vdd->volt_scale(vdd, target_volt); > -+ return vdd->volt_scale(voltdm, target_volt); > - } > - > - /** > -@@ -888,7 +896,7 @@ void omap_voltage_get_volttable(struct > voltagedomain *voltdm, > - return; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - > - *volt_data = vdd->volt_data; > - } > -@@ -919,7 +927,7 @@ struct omap_volt_data > *omap_voltage_get_voltdata(struct voltagedomain *voltdm, > - return ERR_PTR(-EINVAL); > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - > - if (!vdd->volt_data) { > - pr_warning("%s: voltage table does not exist for vdd_%s\n", > -@@ -957,7 +965,7 @@ int omap_voltage_register_pmic(struct > voltagedomain *voltdm, > - return -EINVAL; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - > - vdd->pmic_info = pmic_info; > - > -@@ -984,7 +992,7 @@ struct dentry *omap_voltage_get_dbgdir(struct > voltagedomain *voltdm) > - return NULL; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - > - return vdd->debug_dir; > - } > -@@ -1009,7 +1017,7 @@ void omap_change_voltscale_method(struct > voltagedomain *voltdm, > - return; > - } > - > -- vdd = container_of(voltdm, struct omap_vdd_info, voltdm); > -+ vdd = voltdm->vdd; > - > - switch (voltscale_method) { > - case VOLTSCALE_VPFORCEUPDATE: > -@@ -1025,38 +1033,6 @@ void omap_change_voltscale_method(struct > voltagedomain *voltdm, > - } > - > - /** > -- * omap_voltage_domain_lookup() - API to get the voltage domain pointer > -- * @name: Name of the voltage domain > -- * > -- * This API looks up in the global vdd_info struct for the > -- * existence of voltage domain <name>. If it exists, the API returns > -- * a pointer to the voltage domain structure corresponding to the > -- * VDD<name>. Else retuns error pointer. > -- */ > --struct voltagedomain *omap_voltage_domain_lookup(char *name) > --{ > -- int i; > -- > -- if (!vdd_info) { > -- pr_err("%s: Voltage driver init not yet happened.Faulting!\n", > -- __func__); > -- return ERR_PTR(-EINVAL); > -- } > -- > -- if (!name) { > -- pr_err("%s: No name to get the votage domain!\n", __func__); > -- return ERR_PTR(-EINVAL); > -- } > -- > -- for (i = 0; i < nr_scalable_vdd; i++) { > -- if (!(strcmp(name, vdd_info[i]->voltdm.name))) > -- return &vdd_info[i]->voltdm; > -- } > -- > -- return ERR_PTR(-EINVAL); > --} > -- > --/** > - * omap_voltage_late_init() - Init the various voltage parameters > - * > - * This API is to be called in the later stages of the > -@@ -1065,9 +1041,9 @@ struct voltagedomain > *omap_voltage_domain_lookup(char *name) > - */ > - int __init omap_voltage_late_init(void) > - { > -- int i; > -+ struct voltagedomain *voltdm; > - > -- if (!vdd_info) { > -+ if (list_empty(&voltdm_list)) { > - pr_err("%s: Voltage driver support not added\n", > - __func__); > - return -EINVAL; > -@@ -1077,22 +1053,81 @@ int __init omap_voltage_late_init(void) > - if (IS_ERR(voltage_dir)) > - pr_err("%s: Unable to create voltage debugfs main dir\n", > - __func__); > -- for (i = 0; i < nr_scalable_vdd; i++) { > -- if (omap_vdd_data_configure(vdd_info[i])) > -- continue; > -- omap_vc_init(vdd_info[i]); > -- vp_init(vdd_info[i]); > -- vdd_debugfs_init(vdd_info[i]); > -+ list_for_each_entry(voltdm, &voltdm_list, node) { > -+ if (voltdm->vdd) { > -+ if (omap_vdd_data_configure(voltdm)) > -+ continue; > -+ omap_vc_init(voltdm); > -+ vp_init(voltdm); > -+ vdd_debugfs_init(voltdm); > -+ } > - } > - > - return 0; > - } > - > --/* XXX document */ > --int __init omap_voltage_early_init(struct omap_vdd_info > *omap_vdd_array[], > -- u8 omap_vdd_count) > -+static struct voltagedomain *_voltdm_lookup(const char *name) > - { > -- vdd_info = omap_vdd_array; > -- nr_scalable_vdd = omap_vdd_count; > -+ struct voltagedomain *voltdm, *temp_voltdm; > -+ > -+ voltdm = NULL; > -+ > -+ list_for_each_entry(temp_voltdm, &voltdm_list, node) { > -+ if (!strcmp(name, temp_voltdm->name)) { > -+ voltdm = temp_voltdm; > -+ break; > -+ } > -+ } > -+ > -+ return voltdm; > -+} > -+ > -+static int _voltdm_register(struct voltagedomain *voltdm) > -+{ > -+ if (!voltdm || !voltdm->name) > -+ return -EINVAL; > -+ > -+ list_add(&voltdm->node, &voltdm_list); > -+ > -+ pr_debug("voltagedomain: registered %s\n", voltdm->name); > -+ > - return 0; > - } > -+ > -+/** > -+ * voltdm_lookup - look up a voltagedomain by name, return a pointer > -+ * @name: name of voltagedomain > -+ * > -+ * Find a registered voltagedomain by its name @name. Returns a pointer > -+ * to the struct voltagedomain if found, or NULL otherwise. > -+ */ > -+struct voltagedomain *voltdm_lookup(const char *name) > -+{ > -+ struct voltagedomain *voltdm ; > -+ > -+ if (!name) > -+ return NULL; > -+ > -+ voltdm = _voltdm_lookup(name); > -+ > -+ return voltdm; > -+} > -+ > -+/** > -+ * voltdm_init - set up the voltagedomain layer > -+ * @voltdm_list: array of struct voltagedomain pointers to register > -+ * > -+ * Loop through the array of voltagedomains @voltdm_list, registering all > -+ * that are available on the current CPU. If voltdm_list is supplied > -+ * and not null, all of the referenced voltagedomains will be > -+ * registered. No return value. > -+ */ > -+void voltdm_init(struct voltagedomain **voltdms) > -+{ > -+ struct voltagedomain **v; > -+ > -+ if (voltdms) { > -+ for (v = voltdms; *v; v++) > -+ _voltdm_register(*v); > -+ } > -+} > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index db23d49..5440298 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -31,6 +31,8 @@ > - #define OMAP3_VOLTOFFSET 0xff > - #define OMAP3_VOLTSETUP2 0xff > - > -+struct omap_vdd_info; > -+ > - /** > - * struct omap_vfsm_instance_data - per-voltage manager FSM > register/bitfield > - * data > -@@ -50,11 +52,14 @@ struct omap_vfsm_instance_data { > - > - /** > - * struct voltagedomain - omap voltage domain global structure. > -- * @name: Name of the voltage domain which can be used as a unique > -- * identifier. > -+ * @name: Name of the voltage domain which can be used as a unique > identifier. > -+ * @node: list_head linking all voltage domains > -+ * @vdd: to be removed > - */ > - struct voltagedomain { > - char *name; > -+ struct list_head node; > -+ struct omap_vdd_info *vdd; > - }; > - > - /** > -@@ -116,7 +121,6 @@ struct omap_volt_pmic_info { > - * @vc_data : structure containing various various vc registers, > - * shifts, masks etc. > - * @vfsm : voltage manager FSM data > -- * @voltdm : pointer to the voltage domain structure > - * @debug_dir : debug directory for this voltage domain. > - * @curr_volt : current voltage for this vdd. > - * @prm_irqst_mod : PRM module id used for PRM IRQ status register > access > -@@ -130,7 +134,6 @@ struct omap_vdd_info { > - struct omap_vp_runtime_data vp_rt_data; > - struct omap_vc_instance_data *vc_data; > - const struct omap_vfsm_instance_data *vfsm; > -- struct voltagedomain voltdm; > - struct dentry *debug_dir; > - u32 curr_volt; > - bool vp_enabled; > -@@ -139,7 +142,7 @@ struct omap_vdd_info { > - u8 prm_irqst_reg; > - u32 (*read_reg) (u16 mod, u8 offset); > - void (*write_reg) (u32 val, u16 mod, u8 offset); > -- int (*volt_scale) (struct omap_vdd_info *vdd, > -+ int (*volt_scale) (struct voltagedomain *voltdm, > - unsigned long target_volt); > - }; > - > -@@ -155,16 +158,11 @@ struct omap_volt_data > *omap_voltage_get_voltdata(struct voltagedomain *voltdm, > - unsigned long volt); > - unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); > - struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); > --int __init omap_voltage_early_init(struct omap_vdd_info > *omap_vdd_array[], > -- u8 omap_vdd_count); > - #ifdef CONFIG_PM > - int omap_voltage_register_pmic(struct voltagedomain *voltdm, > - struct omap_volt_pmic_info *pmic_info); > - void omap_change_voltscale_method(struct voltagedomain *voltdm, > - int voltscale_method); > --/* API to get the voltagedomain pointer */ > --struct voltagedomain *omap_voltage_domain_lookup(char *name); > -- > - int omap_voltage_late_init(void); > - #else > - static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, > -@@ -178,10 +176,11 @@ static inline int omap_voltage_late_init(void) > - { > - return -EINVAL; > - } > --static inline struct voltagedomain *omap_voltage_domain_lookup(char > *name) > --{ > -- return ERR_PTR(-EINVAL); > --} > - #endif > - > -+extern void omap3xxx_voltagedomains_init(void); > -+extern void omap44xx_voltagedomains_init(void); > -+ > -+struct voltagedomain *voltdm_lookup(const char *name); > -+void voltdm_init(struct voltagedomain **voltdm_list); > - #endif > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index f831f9a..4bee412 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -43,9 +43,6 @@ static struct omap_vdd_info omap3_vdd1_info = { > - .vp_data = &omap3_vp1_data, > - .vc_data = &omap3_vc1_data, > - .vfsm = &omap3_vdd1_vfsm_data, > -- .voltdm = { > -- .name = "mpu", > -- }, > - }; > - > - static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { > -@@ -60,23 +57,26 @@ static struct omap_vdd_info omap3_vdd2_info = { > - .vp_data = &omap3_vp2_data, > - .vc_data = &omap3_vc2_data, > - .vfsm = &omap3_vdd2_vfsm_data, > -- .voltdm = { > -- .name = "core", > -- }, > - }; > - > --/* OMAP3 VDD structures */ > --static struct omap_vdd_info *omap3_vdd_info[] = { > -- &omap3_vdd1_info, > -- &omap3_vdd2_info, > -+static struct voltagedomain omap3_voltdm_mpu = { > -+ .name = "mpu", > -+ .vdd = &omap3_vdd1_info, > - }; > - > --/* OMAP3 specific voltage init functions */ > --static int __init omap3xxx_voltage_early_init(void) > --{ > -- if (!cpu_is_omap34xx()) > -- return 0; > -+static struct voltagedomain omap3_voltdm_core = { > -+ .name = "core", > -+ .vdd = &omap3_vdd2_info, > -+}; > - > -+static struct voltagedomain *voltagedomains_omap3[] __initdata = { > -+ &omap3_voltdm_mpu, > -+ &omap3_voltdm_core, > -+ NULL, > -+}; > -+ > -+void __init omap3xxx_voltagedomains_init(void) > -+{ > - /* > - * XXX Will depend on the process, validation, and binning > - * for the currently-running IC > -@@ -89,7 +89,5 @@ static int __init omap3xxx_voltage_early_init(void) > - omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; > - } > - > -- return omap_voltage_early_init(omap3_vdd_info, > -- ARRAY_SIZE(omap3_vdd_info)); > -+ voltdm_init(voltagedomains_omap3); > - }; > --core_initcall(omap3xxx_voltage_early_init); > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index 64dc265..245fdf9 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -42,9 +42,6 @@ static struct omap_vdd_info omap4_vdd_mpu_info = { > - .vp_data = &omap4_vp_mpu_data, > - .vc_data = &omap4_vc_mpu_data, > - .vfsm = &omap4_vdd_mpu_vfsm_data, > -- .voltdm = { > -- .name = "mpu", > -- }, > - }; > - > - static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { > -@@ -57,9 +54,6 @@ static struct omap_vdd_info omap4_vdd_iva_info = { > - .vp_data = &omap4_vp_iva_data, > - .vc_data = &omap4_vc_iva_data, > - .vfsm = &omap4_vdd_iva_vfsm_data, > -- .voltdm = { > -- .name = "iva", > -- }, > - }; > - > - static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { > -@@ -72,24 +66,32 @@ static struct omap_vdd_info omap4_vdd_core_info = > { > - .vp_data = &omap4_vp_core_data, > - .vc_data = &omap4_vc_core_data, > - .vfsm = &omap4_vdd_core_vfsm_data, > -- .voltdm = { > -- .name = "core", > -- }, > - }; > - > --/* OMAP4 VDD structures */ > --static struct omap_vdd_info *omap4_vdd_info[] = { > -- &omap4_vdd_mpu_info, > -- &omap4_vdd_iva_info, > -- &omap4_vdd_core_info, > -+static struct voltagedomain omap4_voltdm_mpu = { > -+ .name = "mpu", > -+ .vdd = &omap4_vdd_mpu_info, > - }; > - > --/* OMAP4 specific voltage init functions */ > --static int __init omap44xx_voltage_early_init(void) > --{ > -- if (!cpu_is_omap44xx()) > -- return 0; > -+static struct voltagedomain omap4_voltdm_iva = { > -+ .name = "iva", > -+ .vdd = &omap4_vdd_iva_info, > -+}; > -+ > -+static struct voltagedomain omap4_voltdm_core = { > -+ .name = "core", > -+ .vdd = &omap4_vdd_core_info, > -+}; > - > -+static struct voltagedomain *voltagedomains_omap4[] __initdata = { > -+ &omap4_voltdm_mpu, > -+ &omap4_voltdm_iva, > -+ &omap4_voltdm_core, > -+ NULL, > -+}; > -+ > -+void __init omap44xx_voltagedomains_init(void) > -+{ > - /* > - * XXX Will depend on the process, validation, and binning > - * for the currently-running IC > -@@ -98,7 +100,5 @@ static int __init omap44xx_voltage_early_init(void) > - omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; > - omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; > - > -- return omap_voltage_early_init(omap4_vdd_info, > -- ARRAY_SIZE(omap4_vdd_info)); > -+ voltdm_init(voltagedomains_omap4); > - }; > --core_initcall(omap44xx_voltage_early_init); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3- > voltage-rename-mpu-voltagedomain-to-mpu_iva.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu- > voltagedomain-to-mpu_iva.patch > deleted file mode 100644 > index 195235d..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3-voltage- > rename-mpu-voltagedomain-to-mpu_iva.patch > +++ /dev/null > @@ -1,82 +0,0 @@ > -From b98b320e9e4eeb93356a80b597e578c5547cdff9 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 23 Mar 2011 11:18:08 -0700 > -Subject: [PATCH 100/149] OMAP3: voltage: rename "mpu" voltagedomain to > "mpu_iva" > - > -This voltage domain (a.k.a. VDD1) contains both the MPU and the IVA, so > -rename appropriately. > - > -Also fixup any users of the "mpu" name to use "mpu_iva" > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ++-- > - arch/arm/mach-omap2/omap_twl.c | 2 +- > - arch/arm/mach-omap2/pm.c | 2 +- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 +- > - 4 files changed, 5 insertions(+), 5 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -index 25bf43b..59fdb9f 100644 > ---- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c > -@@ -2597,7 +2597,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod > = { > - .name = "sr1_hwmod", > - .class = &omap34xx_smartreflex_hwmod_class, > - .main_clk = "sr1_fck", > -- .vdd_name = "mpu", > -+ .vdd_name = "mpu_iva", > - .prcm = { > - .omap2 = { > - .prcm_reg_id = 1, > -@@ -2619,7 +2619,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod > = { > - .name = "sr1_hwmod", > - .class = &omap36xx_smartreflex_hwmod_class, > - .main_clk = "sr1_fck", > -- .vdd_name = "mpu", > -+ .vdd_name = "mpu_iva", > - .prcm = { > - .omap2 = { > - .prcm_reg_id = 1, > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index fcd2f62..760487b 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -288,7 +288,7 @@ int __init omap3_twl_init(void) > - if (!twl_sr_enable_autoinit) > - omap3_twl_set_sr_bit(true); > - > -- voltdm = voltdm_lookup("mpu"); > -+ voltdm = voltdm_lookup("mpu_iva"); > - omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); > - > - voltdm = voltdm_lookup("core"); > -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c > -index 3bce29b..f81340e 100644 > ---- a/arch/arm/mach-omap2/pm.c > -+++ b/arch/arm/mach-omap2/pm.c > -@@ -228,7 +228,7 @@ static void __init omap3_init_voltages(void) > - if (!cpu_is_omap34xx()) > - return; > - > -- omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev); > -+ omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev); > - omap2_set_init_voltage("core", "l3_ick", l3_dev); > - } > - > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index 4bee412..2167ef4 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -60,7 +60,7 @@ static struct omap_vdd_info omap3_vdd2_info = { > - }; > - > - static struct voltagedomain omap3_voltdm_mpu = { > -- .name = "mpu", > -+ .name = "mpu_iva", > - .vdd = &omap3_vdd1_info, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0101-OMAP3- > voltagedomain-data-add-wakeup-domain.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup- > domain.patch > deleted file mode 100644 > index 09c1ef4..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0101-OMAP3- > voltagedomain-data-add-wakeup-domain.patch > +++ /dev/null > @@ -1,37 +0,0 @@ > -From 17cd354184d7ffe9fcef97a0e1beeb6e8b2a2c38 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 23 Mar 2011 13:30:33 -0700 > -Subject: [PATCH 101/149] OMAP3: voltagedomain data: add wakeup domain > - > -Add wakeup voltage domain so that the wakeup powerdomain can have an > -associated powerdomain. Note that the scalable flat is not set for > -the this voltagedomain, so it will not be fully initialized like > -scalable voltage domains. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 5 +++++ > - 1 files changed, 5 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index 2167ef4..42d0b11 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -69,9 +69,14 @@ static struct voltagedomain omap3_voltdm_core = { > - .vdd = &omap3_vdd2_info, > - }; > - > -+static struct voltagedomain omap3_voltdm_wkup = { > -+ .name = "wakeup", > -+}; > -+ > - static struct voltagedomain *voltagedomains_omap3[] __initdata = { > - &omap3_voltdm_mpu, > - &omap3_voltdm_core, > -+ &omap3_voltdm_wkup, > - NULL, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0102-OMAP3- > voltage-add-scalable-flag-to-voltagedomain.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to- > voltagedomain.patch > deleted file mode 100644 > index c12fdb5..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0102-OMAP3-voltage-add- > scalable-flag-to-voltagedomain.patch > +++ /dev/null > @@ -1,93 +0,0 @@ > -From b9230219fb50ac16be3f24fe872bd9537b665871 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 23 Mar 2011 17:00:21 -0700 > -Subject: [PATCH 102/149] OMAP3+: voltage: add scalable flag to > voltagedomain > - > -Add a 'bool scalable' flag to the struct powerdomain and set it for > -the scalable domains on OMAP3 and OMAP4. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.c | 3 +++ > - arch/arm/mach-omap2/voltage.h | 2 ++ > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 ++ > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ > - 4 files changed, 10 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 4f0361a..48a2593 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -1054,6 +1054,9 @@ int __init omap_voltage_late_init(void) > - pr_err("%s: Unable to create voltage debugfs main dir\n", > - __func__); > - list_for_each_entry(voltdm, &voltdm_list, node) { > -+ if (!voltdm->scalable) > -+ continue; > -+ > - if (voltdm->vdd) { > - if (omap_vdd_data_configure(voltdm)) > - continue; > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 5440298..25cfb5c 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -53,11 +53,13 @@ struct omap_vfsm_instance_data { > - /** > - * struct voltagedomain - omap voltage domain global structure. > - * @name: Name of the voltage domain which can be used as a unique > identifier. > -+ * @scalable: Whether or not this voltage domain is scalable > - * @node: list_head linking all voltage domains > - * @vdd: to be removed > - */ > - struct voltagedomain { > - char *name; > -+ bool scalable; > - struct list_head node; > - struct omap_vdd_info *vdd; > - }; > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index 42d0b11..d7e1052 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -61,11 +61,13 @@ static struct omap_vdd_info omap3_vdd2_info = { > - > - static struct voltagedomain omap3_voltdm_mpu = { > - .name = "mpu_iva", > -+ .scalable = true, > - .vdd = &omap3_vdd1_info, > - }; > - > - static struct voltagedomain omap3_voltdm_core = { > - .name = "core", > -+ .scalable = true, > - .vdd = &omap3_vdd2_info, > - }; > - > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index 245fdf9..95e1ce5 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -70,16 +70,19 @@ static struct omap_vdd_info omap4_vdd_core_info = > { > - > - static struct voltagedomain omap4_voltdm_mpu = { > - .name = "mpu", > -+ .scalable = true, > - .vdd = &omap4_vdd_mpu_info, > - }; > - > - static struct voltagedomain omap4_voltdm_iva = { > - .name = "iva", > -+ .scalable = true, > - .vdd = &omap4_vdd_iva_info, > - }; > - > - static struct voltagedomain omap4_voltdm_core = { > - .name = "core", > -+ .scalable = true, > - .vdd = &omap4_vdd_core_info, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2- > powerdomain-add-voltagedomain-to-struct-powerd.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2-powerdomain-add- > voltagedomain-to-struct-powerd.patch > deleted file mode 100644 > index 06ec89b..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2- > powerdomain-add-voltagedomain-to-struct-powerd.patch > +++ /dev/null > @@ -1,51 +0,0 @@ > -From 4380f30498f0096856479011df85f956081ce26c Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 23 Mar 2011 07:22:23 -0700 > -Subject: [PATCH 103/149] OMAP2+: powerdomain: add voltagedomain to > struct powerdomain > - > -Each powerdomain is associated with a voltage domain. Add an entry to > -struct powerdomain where the enclosing voltagedomain can be > -referenced. > - > -Modeled after similar relationship between clockdomains and powerdomains. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/powerdomain.h | 7 +++++++ > - 1 files changed, 7 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach- > omap2/powerdomain.h > -index d23d979..9ce920d 100644 > ---- a/arch/arm/mach-omap2/powerdomain.h > -+++ b/arch/arm/mach-omap2/powerdomain.h > -@@ -24,6 +24,8 @@ > - > - #include <plat/cpu.h> > - > -+#include "voltage.h" > -+ > - /* Powerdomain basic power states */ > - #define PWRDM_POWER_OFF 0x0 > - #define PWRDM_POWER_RET 0x1 > -@@ -78,6 +80,7 @@ struct powerdomain; > - /** > - * struct powerdomain - OMAP powerdomain > - * @name: Powerdomain name > -+ * @voltdm: voltagedomain containing this powerdomain > - * @omap_chip: represents the OMAP chip types containing this pwrdm > - * @prcm_offs: the address offset from CM_BASE/PRM_BASE > - * @prcm_partition: (OMAP4 only) the PRCM partition ID containing > @prcm_offs > -@@ -98,6 +101,10 @@ struct powerdomain; > - */ > - struct powerdomain { > - const char *name; > -+ union { > -+ const char *name; > -+ struct voltagedomain *ptr; > -+ } voltdm; > - const struct omap_chip_id omap_chip; > - const s16 prcm_offs; > - const u8 pwrsts; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add- > voltage-domains-and-connect-to-powerdomain.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add-voltage-domains- > and-connect-to-powerdomain.patch > deleted file mode 100644 > index 2e7b9b8..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add-voltage- > domains-and-connect-to-powerdomain.patch > +++ /dev/null > @@ -1,138 +0,0 @@ > -From 090b5bcad1bf67d208685461c30b68cd1ab535c5 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 23 Mar 2011 16:09:41 -0700 > -Subject: [PATCH 104/149] OMAP2: add voltage domains and connect to > powerdomains > - > -Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains > -with the newly created voltage domains. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/Makefile | 3 +- > - arch/arm/mach-omap2/io.c | 2 + > - arch/arm/mach-omap2/powerdomains2xxx_data.c | 4 +++ > - arch/arm/mach-omap2/voltage.h | 1 + > - arch/arm/mach-omap2/voltagedomains2xxx_data.c | 32 > +++++++++++++++++++++++++ > - 5 files changed, 41 insertions(+), 1 deletions(-) > - create mode 100644 arch/arm/mach-omap2/voltagedomains2xxx_data.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index f343365..1b6cecd 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -91,7 +91,8 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o > cm2xxx_3xxx.o cminst44xx.o \ > - # OMAP voltage domains > - ifeq ($(CONFIG_PM),y) > - voltagedomain-common := voltage.o > --obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) > -+obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) > \ > -+ voltagedomains2xxx_data.o > - obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ > - voltagedomains3xxx_data.o > - obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ > -diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c > -index 9f5a846..4c8a5de 100644 > ---- a/arch/arm/mach-omap2/io.c > -+++ b/arch/arm/mach-omap2/io.c > -@@ -342,10 +342,12 @@ void __init > omap2_init_common_infrastructure(void) > - u8 postsetup_state; > - > - if (cpu_is_omap242x()) { > -+ omap2xxx_voltagedomains_init(); > - omap2xxx_powerdomains_init(); > - omap2xxx_clockdomains_init(); > - omap2420_hwmod_init(); > - } else if (cpu_is_omap243x()) { > -+ omap2xxx_voltagedomains_init(); > - omap2xxx_powerdomains_init(); > - omap2xxx_clockdomains_init(); > - omap2430_hwmod_init(); > -diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c > b/arch/arm/mach-omap2/powerdomains2xxx_data.c > -index cc389fb..274f64c 100644 > ---- a/arch/arm/mach-omap2/powerdomains2xxx_data.c > -+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c > -@@ -38,6 +38,7 @@ static struct powerdomain dsp_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain mpu_24xx_pwrdm = { > -@@ -53,6 +54,7 @@ static struct powerdomain mpu_24xx_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain core_24xx_pwrdm = { > -@@ -71,6 +73,7 @@ static struct powerdomain core_24xx_pwrdm = { > - [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ > - [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - > -@@ -95,6 +98,7 @@ static struct powerdomain mdm_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* MEMONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - #endif /* CONFIG_SOC_OMAP2430 */ > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 25cfb5c..cacd76e 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -180,6 +180,7 @@ static inline int omap_voltage_late_init(void) > - } > - #endif > - > -+extern void omap2xxx_voltagedomains_init(void); > - extern void omap3xxx_voltagedomains_init(void); > - extern void omap44xx_voltagedomains_init(void); > - > -diff --git a/arch/arm/mach-omap2/voltagedomains2xxx_data.c > b/arch/arm/mach-omap2/voltagedomains2xxx_data.c > -new file mode 100644 > -index 0000000..69ff261 > ---- /dev/null > -+++ b/arch/arm/mach-omap2/voltagedomains2xxx_data.c > -@@ -0,0 +1,32 @@ > -+/* > -+ * OMAP3 voltage domain data > -+ * > -+ * Copyright (C) 2007, 2010 Texas Instruments, Inc. > -+ > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+#include <linux/kernel.h> > -+#include <linux/init.h> > -+ > -+#include "voltage.h" > -+ > -+static struct voltagedomain omap2_voltdm_core = { > -+ .name = "core", > -+}; > -+ > -+static struct voltagedomain omap2_voltdm_wkup = { > -+ .name = "wakeup", > -+}; > -+ > -+static struct voltagedomain *voltagedomains_omap2[] __initdata = { > -+ &omap2_voltdm_core, > -+ &omap2_voltdm_wkup, > -+ NULL, > -+}; > -+ > -+void __init omap2xxx_voltagedomains_init(void) > -+{ > -+ voltdm_init(voltagedomains_omap2); > -+} > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0105-OMAP3- > powerdomain-data-add-voltage-domains.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage- > domains.patch > deleted file mode 100644 > index 7481b06..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0105-OMAP3- > powerdomain-data-add-voltage-domains.patch > +++ /dev/null > @@ -1,161 +0,0 @@ > -From a44878fc9328d0ee6101d328f16a1f08bd123ba0 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Fri, 18 Mar 2011 14:12:18 -0700 > -Subject: [PATCH 105/149] OMAP3: powerdomain data: add voltage domains > - > -Add voltage domain name to indicate which voltagedomain each > -powerdomain is in. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | 2 ++ > - arch/arm/mach-omap2/powerdomains3xxx_data.c | 16 > ++++++++++++++++ > - 2 files changed, 18 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c > b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c > -index 4210c33..2242c8e 100644 > ---- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c > -+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c > -@@ -70,6 +70,7 @@ struct powerdomain gfx_omap2_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* MEMONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - struct powerdomain wkup_omap2_pwrdm = { > -@@ -77,4 +78,5 @@ struct powerdomain wkup_omap2_pwrdm = { > - .prcm_offs = WKUP_MOD, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | > CHIP_IS_OMAP3430), > - .pwrsts = PWRSTS_ON, > -+ .voltdm = { .name = "wakeup" }, > - }; > -diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c > b/arch/arm/mach-omap2/powerdomains3xxx_data.c > -index 469a920..1f37c0c 100644 > ---- a/arch/arm/mach-omap2/powerdomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c > -@@ -52,6 +52,7 @@ static struct powerdomain iva2_pwrdm = { > - [2] = PWRSTS_OFF_ON, > - [3] = PWRSTS_ON, > - }, > -+ .voltdm = { .name = "mpu_iva" }, > - }; > - > - static struct powerdomain mpu_3xxx_pwrdm = { > -@@ -68,6 +69,7 @@ static struct powerdomain mpu_3xxx_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_OFF_ON, > - }, > -+ .voltdm = { .name = "mpu_iva" }, > - }; > - > - /* > -@@ -98,6 +100,7 @@ static struct powerdomain > core_3xxx_pre_es3_1_pwrdm = { > - [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ > - [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain core_3xxx_es3_1_pwrdm = { > -@@ -121,6 +124,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm > = { > - [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ > - [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain dss_pwrdm = { > -@@ -136,6 +140,7 @@ static struct powerdomain dss_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* MEMONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - /* > -@@ -157,6 +162,7 @@ static struct powerdomain sgx_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* MEMONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain cam_pwrdm = { > -@@ -172,6 +178,7 @@ static struct powerdomain cam_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* MEMONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain per_pwrdm = { > -@@ -187,12 +194,14 @@ static struct powerdomain per_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* MEMONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain emu_pwrdm = { > - .name = "emu_pwrdm", > - .prcm_offs = OMAP3430_EMU_MOD, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain neon_pwrdm = { > -@@ -201,6 +210,7 @@ static struct powerdomain neon_pwrdm = { > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > - .pwrsts = PWRSTS_OFF_RET_ON, > - .pwrsts_logic_ret = PWRSTS_RET, > -+ .voltdm = { .name = "mpu_iva" }, > - }; > - > - static struct powerdomain usbhost_pwrdm = { > -@@ -223,36 +233,42 @@ static struct powerdomain usbhost_pwrdm = { > - .pwrsts_mem_on = { > - [0] = PWRSTS_ON, /* MEMONSTATE */ > - }, > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain dpll1_pwrdm = { > - .name = "dpll1_pwrdm", > - .prcm_offs = MPU_MOD, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > -+ .voltdm = { .name = "mpu_iva" }, > - }; > - > - static struct powerdomain dpll2_pwrdm = { > - .name = "dpll2_pwrdm", > - .prcm_offs = OMAP3430_IVA2_MOD, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > -+ .voltdm = { .name = "mpu_iva" }, > - }; > - > - static struct powerdomain dpll3_pwrdm = { > - .name = "dpll3_pwrdm", > - .prcm_offs = PLL_MOD, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain dpll4_pwrdm = { > - .name = "dpll4_pwrdm", > - .prcm_offs = PLL_MOD, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), > -+ .voltdm = { .name = "core" }, > - }; > - > - static struct powerdomain dpll5_pwrdm = { > - .name = "dpll5_pwrdm", > - .prcm_offs = PLL_MOD, > - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), > -+ .voltdm = { .name = "core" }, > - }; > - > - /* As powerdomains are added or removed above, this list must also be > changed */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0106-OMAP4- > powerdomain-data-add-voltage-domains.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage- > domains.patch > deleted file mode 100644 > index 14b904f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0106-OMAP4- > powerdomain-data-add-voltage-domains.patch > +++ /dev/null > @@ -1,177 +0,0 @@ > -From a5fc50f2405625fef21c78c46e0e9427eb202f15 Mon Sep 17 00:00:00 > 2001 > -From: Benoit Cousson <b-cousson@ti.com> > -Date: Mon, 21 Mar 2011 12:11:54 +0100 > -Subject: [PATCH 106/149] OMAP4: powerdomain data: add voltage domains > - > -Add voltage domain name to indicate which voltagedomain each > -powerdomain is in. > - > -The fixed voltage domain like ldo_wakeup for emu and wkup power > -domain is added too. > - > -Update the TI copyright date to 2011. > - > -Signed-off-by: Benoit Cousson <b-cousson@ti.com> > -Cc: Paul Walmsley <paul@pwsan.com> > -[khilman@ti.com]: renamed wakeup domain: s/ldo_wakeup/wakeup/ > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/powerdomains44xx_data.c | 16 > ++++++++++++++++ > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 5 +++++ > - 2 files changed, 21 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c > b/arch/arm/mach-omap2/powerdomains44xx_data.c > -index 247e794..45c7f29 100644 > ---- a/arch/arm/mach-omap2/powerdomains44xx_data.c > -+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c > -@@ -33,6 +33,7 @@ > - /* core_44xx_pwrdm: CORE power domain */ > - static struct powerdomain core_44xx_pwrdm = { > - .name = "core_pwrdm", > -+ .voltdm = { .name = "core" }, > - .prcm_offs = OMAP4430_PRM_CORE_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -59,6 +60,7 @@ static struct powerdomain core_44xx_pwrdm = { > - /* gfx_44xx_pwrdm: 3D accelerator power domain */ > - static struct powerdomain gfx_44xx_pwrdm = { > - .name = "gfx_pwrdm", > -+ .voltdm = { .name = "core" }, > - .prcm_offs = OMAP4430_PRM_GFX_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -76,6 +78,7 @@ static struct powerdomain gfx_44xx_pwrdm = { > - /* abe_44xx_pwrdm: Audio back end power domain */ > - static struct powerdomain abe_44xx_pwrdm = { > - .name = "abe_pwrdm", > -+ .voltdm = { .name = "iva" }, > - .prcm_offs = OMAP4430_PRM_ABE_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -96,6 +99,7 @@ static struct powerdomain abe_44xx_pwrdm = { > - /* dss_44xx_pwrdm: Display subsystem power domain */ > - static struct powerdomain dss_44xx_pwrdm = { > - .name = "dss_pwrdm", > -+ .voltdm = { .name = "core" }, > - .prcm_offs = OMAP4430_PRM_DSS_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -114,6 +118,7 @@ static struct powerdomain dss_44xx_pwrdm = { > - /* tesla_44xx_pwrdm: Tesla processor power domain */ > - static struct powerdomain tesla_44xx_pwrdm = { > - .name = "tesla_pwrdm", > -+ .voltdm = { .name = "iva" }, > - .prcm_offs = OMAP4430_PRM_TESLA_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -136,6 +141,7 @@ static struct powerdomain tesla_44xx_pwrdm = { > - /* wkup_44xx_pwrdm: Wake-up power domain */ > - static struct powerdomain wkup_44xx_pwrdm = { > - .name = "wkup_pwrdm", > -+ .voltdm = { .name = "wakeup" }, > - .prcm_offs = OMAP4430_PRM_WKUP_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -152,6 +158,7 @@ static struct powerdomain wkup_44xx_pwrdm = { > - /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain > */ > - static struct powerdomain cpu0_44xx_pwrdm = { > - .name = "cpu0_pwrdm", > -+ .voltdm = { .name = "mpu" }, > - .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, > - .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -169,6 +176,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { > - /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain > */ > - static struct powerdomain cpu1_44xx_pwrdm = { > - .name = "cpu1_pwrdm", > -+ .voltdm = { .name = "mpu" }, > - .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, > - .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -186,6 +194,7 @@ static struct powerdomain cpu1_44xx_pwrdm = { > - /* emu_44xx_pwrdm: Emulation power domain */ > - static struct powerdomain emu_44xx_pwrdm = { > - .name = "emu_pwrdm", > -+ .voltdm = { .name = "wakeup" }, > - .prcm_offs = OMAP4430_PRM_EMU_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -202,6 +211,7 @@ static struct powerdomain emu_44xx_pwrdm = { > - /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power > domain */ > - static struct powerdomain mpu_44xx_pwrdm = { > - .name = "mpu_pwrdm", > -+ .voltdm = { .name = "mpu" }, > - .prcm_offs = OMAP4430_PRM_MPU_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -223,6 +233,7 @@ static struct powerdomain mpu_44xx_pwrdm = { > - /* ivahd_44xx_pwrdm: IVA-HD power domain */ > - static struct powerdomain ivahd_44xx_pwrdm = { > - .name = "ivahd_pwrdm", > -+ .voltdm = { .name = "iva" }, > - .prcm_offs = OMAP4430_PRM_IVAHD_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -247,6 +258,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { > - /* cam_44xx_pwrdm: Camera subsystem power domain */ > - static struct powerdomain cam_44xx_pwrdm = { > - .name = "cam_pwrdm", > -+ .voltdm = { .name = "core" }, > - .prcm_offs = OMAP4430_PRM_CAM_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -264,6 +276,7 @@ static struct powerdomain cam_44xx_pwrdm = { > - /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ > - static struct powerdomain l3init_44xx_pwrdm = { > - .name = "l3init_pwrdm", > -+ .voltdm = { .name = "core" }, > - .prcm_offs = OMAP4430_PRM_L3INIT_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -282,6 +295,7 @@ static struct powerdomain l3init_44xx_pwrdm = { > - /* l4per_44xx_pwrdm: Target peripherals power domain */ > - static struct powerdomain l4per_44xx_pwrdm = { > - .name = "l4per_pwrdm", > -+ .voltdm = { .name = "core" }, > - .prcm_offs = OMAP4430_PRM_L4PER_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -305,6 +319,7 @@ static struct powerdomain l4per_44xx_pwrdm = { > - */ > - static struct powerdomain always_on_core_44xx_pwrdm = { > - .name = "always_on_core_pwrdm", > -+ .voltdm = { .name = "core" }, > - .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -@@ -314,6 +329,7 @@ static struct powerdomain > always_on_core_44xx_pwrdm = { > - /* cefuse_44xx_pwrdm: Customer efuse controller power domain */ > - static struct powerdomain cefuse_44xx_pwrdm = { > - .name = "cefuse_pwrdm", > -+ .voltdm = { .name = "core" }, > - .prcm_offs = OMAP4430_PRM_CEFUSE_INST, > - .prcm_partition = OMAP4430_PRM_PARTITION, > - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index 95e1ce5..9a17b5e 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -86,10 +86,15 @@ static struct voltagedomain omap4_voltdm_core = { > - .vdd = &omap4_vdd_core_info, > - }; > - > -+static struct voltagedomain omap4_voltdm_wkup = { > -+ .name = "wakeup", > -+}; > -+ > - static struct voltagedomain *voltagedomains_omap4[] __initdata = { > - &omap4_voltdm_mpu, > - &omap4_voltdm_iva, > - &omap4_voltdm_core, > -+ &omap4_voltdm_wkup, > - NULL, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2- > powerdomain-add-voltage-domain-lookup-during-r.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2-powerdomain-add- > voltage-domain-lookup-during-r.patch > deleted file mode 100644 > index 39c6fc1..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2- > powerdomain-add-voltage-domain-lookup-during-r.patch > +++ /dev/null > @@ -1,89 +0,0 @@ > -From a57d61507ab997c347ee584b86eb54391d79bf41 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 16 Mar 2011 15:52:47 -0700 > -Subject: [PATCH 107/149] OMAP2+: powerdomain: add voltage domain > lookup during register > - > -When a powerdomain is registered, lookup the voltage domain by name > -and keep a pointer to the containing voltagedomain in the powerdomain > -structure. > - > -Modeled after similar method between powerdomain and clockdomain layers. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/powerdomain.c | 21 +++++++++++++++++++++ > - arch/arm/mach-omap2/powerdomain.h | 1 + > - arch/arm/mach-omap2/voltage.h | 1 + > - 3 files changed, 23 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach- > omap2/powerdomain.c > -index 9af0847..1d3013d 100644 > ---- a/arch/arm/mach-omap2/powerdomain.c > -+++ b/arch/arm/mach-omap2/powerdomain.c > -@@ -77,6 +77,7 @@ static struct powerdomain *_pwrdm_lookup(const char > *name) > - static int _pwrdm_register(struct powerdomain *pwrdm) > - { > - int i; > -+ struct voltagedomain *voltdm; > - > - if (!pwrdm || !pwrdm->name) > - return -EINVAL; > -@@ -94,6 +95,14 @@ static int _pwrdm_register(struct powerdomain > *pwrdm) > - if (_pwrdm_lookup(pwrdm->name)) > - return -EEXIST; > - > -+ voltdm = voltdm_lookup(pwrdm->voltdm.name); > -+ if (!voltdm) { > -+ pr_err("powerdomain: %s: voltagedomain %s does not > exist\n", > -+ pwrdm->name, pwrdm->voltdm.name); > -+ return -EINVAL; > -+ } > -+ pwrdm->voltdm.ptr = voltdm; > -+ > - list_add(&pwrdm->node, &pwrdm_list); > - > - /* Initialize the powerdomain's state counter */ > -@@ -383,6 +392,18 @@ int pwrdm_for_each_clkdm(struct powerdomain > *pwrdm, > - } > - > - /** > -+ * pwrdm_get_voltdm - return a ptr to the voltdm that this pwrdm resides in > -+ * @pwrdm: struct powerdomain * > -+ * > -+ * Return a pointer to the struct voltageomain that the specified powerdomain > -+ * @pwrdm exists in. > -+ */ > -+struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm) > -+{ > -+ return pwrdm->voltdm.ptr; > -+} > -+ > -+/** > - * pwrdm_get_mem_bank_count - get number of memory banks in this > powerdomain > - * @pwrdm: struct powerdomain * > - * > -diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach- > omap2/powerdomain.h > -index 9ce920d..25bef48 100644 > ---- a/arch/arm/mach-omap2/powerdomain.h > -+++ b/arch/arm/mach-omap2/powerdomain.h > -@@ -183,6 +183,7 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, > struct clockdomain *clkdm); > - int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, > - int (*fn)(struct powerdomain *pwrdm, > - struct clockdomain *clkdm)); > -+struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm); > - > - int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index cacd76e..966aa88 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -186,4 +186,5 @@ extern void omap44xx_voltagedomains_init(void); > - > - struct voltagedomain *voltdm_lookup(const char *name); > - void voltdm_init(struct voltagedomain **voltdm_list); > -+int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain > *pwrdm); > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2- > voltage-keep-track-of-powerdomains-in-each-vol.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of- > powerdomains-in-each-vol.patch > deleted file mode 100644 > index 84ecc50..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2-voltage- > keep-track-of-powerdomains-in-each-vol.patch > +++ /dev/null > @@ -1,200 +0,0 @@ > -From 31e518c4d9758553f36e3dcd1138ac31f68bf571 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 16 Mar 2011 16:13:15 -0700 > -Subject: [PATCH 108/149] OMAP2+: voltage: keep track of powerdomains in > each voltagedomain > - > -When a powerdomain is registered and it has an associated voltage domain, > -add the powerdomain to the voltagedomain using voltdm_add_pwrdm(). > - > -Also add voltagedomain iterator helper functions to iterate over all > -registered voltagedomains and all powerdomains associated with a > -voltagedomain. > - > -Modeled after a similar relationship between clockdomains and powerdomains. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/powerdomain.c | 2 + > - arch/arm/mach-omap2/powerdomain.h | 2 + > - arch/arm/mach-omap2/voltage.c | 80 > +++++++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/voltage.h | 10 +++++ > - 4 files changed, 94 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach- > omap2/powerdomain.c > -index 1d3013d..12135e2 100644 > ---- a/arch/arm/mach-omap2/powerdomain.c > -+++ b/arch/arm/mach-omap2/powerdomain.c > -@@ -102,6 +102,8 @@ static int _pwrdm_register(struct powerdomain > *pwrdm) > - return -EINVAL; > - } > - pwrdm->voltdm.ptr = voltdm; > -+ INIT_LIST_HEAD(&pwrdm->voltdm_node); > -+ voltdm_add_pwrdm(voltdm, pwrdm); > - > - list_add(&pwrdm->node, &pwrdm_list); > - > -diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach- > omap2/powerdomain.h > -index 25bef48..2c685a5 100644 > ---- a/arch/arm/mach-omap2/powerdomain.h > -+++ b/arch/arm/mach-omap2/powerdomain.h > -@@ -92,6 +92,7 @@ struct powerdomain; > - * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON > - * @pwrdm_clkdms: Clockdomains in this powerdomain > - * @node: list_head linking all powerdomains > -+ * @voltdm_node: list_head linking all powerdomains in a voltagedomain > - * @state: > - * @state_counter: > - * @timer: > -@@ -116,6 +117,7 @@ struct powerdomain { > - const u8 prcm_partition; > - struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; > - struct list_head node; > -+ struct list_head voltdm_node; > - int state; > - unsigned state_counter[PWRDM_MAX_PWRSTS]; > - unsigned ret_logic_off_counter; > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 48a2593..1e5c122 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -36,6 +36,7 @@ > - #include "control.h" > - > - #include "voltage.h" > -+#include "powerdomain.h" > - > - #include "vc.h" > - #include "vp.h" > -@@ -1085,11 +1086,90 @@ static struct voltagedomain > *_voltdm_lookup(const char *name) > - return voltdm; > - } > - > -+/** > -+ * voltdm_add_pwrdm - add a powerdomain to a voltagedomain > -+ * @voltdm: struct voltagedomain * to add the powerdomain to > -+ * @pwrdm: struct powerdomain * to associate with a voltagedomain > -+ * > -+ * Associate the powerdomain @pwrdm with a voltagedomain @voltdm. This > -+ * enables the use of voltdm_for_each_pwrdm(). Returns -EINVAL if > -+ * presented with invalid pointers; -ENOMEM if memory could not be > allocated; > -+ * or 0 upon success. > -+ */ > -+int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain > *pwrdm) > -+{ > -+ if (!voltdm || !pwrdm) > -+ return -EINVAL; > -+ > -+ pr_debug("voltagedomain: associating powerdomain %s with > voltagedomain " > -+ "%s\n", pwrdm->name, voltdm->name); > -+ > -+ list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list); > -+ > -+ return 0; > -+} > -+ > -+/** > -+ * voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm > -+ * @voltdm: struct voltagedomain * to iterate over > -+ * @fn: callback function * > -+ * > -+ * Call the supplied function @fn for each powerdomain in the > -+ * voltagedomain @voltdm. Returns -EINVAL if presented with invalid > -+ * pointers; or passes along the last return value of the callback > -+ * function, which should be 0 for success or anything else to > -+ * indicate failure. > -+ */ > -+int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, > -+ int (*fn)(struct voltagedomain *voltdm, > -+ struct powerdomain *pwrdm)) > -+{ > -+ struct powerdomain *pwrdm; > -+ int ret = 0; > -+ > -+ if (!fn) > -+ return -EINVAL; > -+ > -+ list_for_each_entry(pwrdm, &voltdm->pwrdm_list, voltdm_node) > -+ ret = (*fn)(voltdm, pwrdm); > -+ > -+ return ret; > -+} > -+ > -+/** > -+ * voltdm_for_each - call function on each registered voltagedomain > -+ * @fn: callback function * > -+ * > -+ * Call the supplied function @fn for each registered voltagedomain. > -+ * The callback function @fn can return anything but 0 to bail out > -+ * early from the iterator. Returns the last return value of the > -+ * callback function, which should be 0 for success or anything else > -+ * to indicate failure; or -EINVAL if the function pointer is null. > -+ */ > -+int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), > -+ void *user) > -+{ > -+ struct voltagedomain *temp_voltdm; > -+ int ret = 0; > -+ > -+ if (!fn) > -+ return -EINVAL; > -+ > -+ list_for_each_entry(temp_voltdm, &voltdm_list, node) { > -+ ret = (*fn)(temp_voltdm, user); > -+ if (ret) > -+ break; > -+ } > -+ > -+ return ret; > -+} > -+ > - static int _voltdm_register(struct voltagedomain *voltdm) > - { > - if (!voltdm || !voltdm->name) > - return -EINVAL; > - > -+ INIT_LIST_HEAD(&voltdm->pwrdm_list); > - list_add(&voltdm->node, &voltdm_list); > - > - pr_debug("voltagedomain: registered %s\n", voltdm->name); > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 966aa88..b41d9f1 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -19,6 +19,8 @@ > - #include "vc.h" > - #include "vp.h" > - > -+struct powerdomain; > -+ > - /* XXX document */ > - #define VOLTSCALE_VPFORCEUPDATE 1 > - #define VOLTSCALE_VCBYPASS 2 > -@@ -55,12 +57,15 @@ struct omap_vfsm_instance_data { > - * @name: Name of the voltage domain which can be used as a unique > identifier. > - * @scalable: Whether or not this voltage domain is scalable > - * @node: list_head linking all voltage domains > -+ * @pwrdm_node: list_head linking all powerdomains in this voltagedomain > - * @vdd: to be removed > -+ * @pwrdms: powerdomains in this voltagedomain > - */ > - struct voltagedomain { > - char *name; > - bool scalable; > - struct list_head node; > -+ struct list_head pwrdm_list; > - struct omap_vdd_info *vdd; > - }; > - > -@@ -187,4 +192,9 @@ extern void omap44xx_voltagedomains_init(void); > - struct voltagedomain *voltdm_lookup(const char *name); > - void voltdm_init(struct voltagedomain **voltdm_list); > - int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain > *pwrdm); > -+int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), > -+ void *user); > -+int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, > -+ int (*fn)(struct voltagedomain *voltdm, > -+ struct powerdomain *pwrdm)); > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2- > voltage-split-voltage-controller-VC-code-into-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2-voltage-split-voltage- > controller-VC-code-into-.patch > deleted file mode 100644 > index f14a21b..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2-voltage-split- > voltage-controller-VC-code-into-.patch > +++ /dev/null > @@ -1,666 +0,0 @@ > -From 981e5f23fe781d26d69d8cc212674eab0353dea4 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 21 Mar 2011 14:08:55 -0700 > -Subject: [PATCH 109/149] OMAP2+: voltage: split voltage controller (VC) code > into dedicated layer > - > -As part of the voltage layer cleanup, split out VC specific code into > -a dedicated VC layer. This patch primarily just moves VC code from > -voltage.c into vc.c, and adds prototypes to vc.h. > - > -No functional changes. > - > -For readability, each function was given a local 'vc' pointer: > - > - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > - > -and a global replace of s/vdd->vc_data/vc/ was done. > - > -Also vc_init was renamed to vc_init_channel to reflect that this is > -per-VC channel initializtion. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/Makefile | 2 +- > - arch/arm/mach-omap2/vc.c | 276 > +++++++++++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/vc.h | 12 ++ > - arch/arm/mach-omap2/voltage.c | 264 +-------------------------------------- > - 4 files changed, 293 insertions(+), 261 deletions(-) > - create mode 100644 arch/arm/mach-omap2/vc.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index 1b6cecd..ecbf361 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o > cm2xxx_3xxx.o cminst44xx.o \ > - > - # OMAP voltage domains > - ifeq ($(CONFIG_PM),y) > --voltagedomain-common := voltage.o > -+voltagedomain-common := voltage.o vc.o > - obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ > - voltagedomains2xxx_data.o > - obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -new file mode 100644 > -index 0000000..98f5a4b > ---- /dev/null > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -0,0 +1,276 @@ > -+#include <linux/kernel.h> > -+#include <linux/delay.h> > -+#include <linux/init.h> > -+ > -+#include <plat/cpu.h> > -+ > -+#include "voltage.h" > -+#include "vc.h" > -+#include "prm-regbits-34xx.h" > -+#include "prm-regbits-44xx.h" > -+#include "prm44xx.h" > -+ > -+/* Voltage scale and accessory APIs */ > -+int omap_vc_pre_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt, > -+ u8 *target_vsel, u8 *current_vsel) > -+{ > -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ struct omap_volt_data *volt_data; > -+ const struct omap_vc_common_data *vc_common; > -+ const struct omap_vp_common_data *vp_common; > -+ u32 vc_cmdval, vp_errgain_val; > -+ > -+ vc_common = vc->vc_common; > -+ vp_common = vdd->vp_data->vp_common; > -+ > -+ /* Check if sufficient pmic info is available for this vdd */ > -+ if (!vdd->pmic_info) { > -+ pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", > -+ __func__, voltdm->name); > -+ return -EINVAL; > -+ } > -+ > -+ if (!vdd->pmic_info->uv_to_vsel) { > -+ pr_err("%s: PMIC function to convert voltage in uV to" > -+ "vsel not registered. Hence unable to scale voltage" > -+ "for vdd_%s\n", __func__, voltdm->name); > -+ return -ENODATA; > -+ } > -+ > -+ if (!vdd->read_reg || !vdd->write_reg) { > -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -+ __func__, voltdm->name); > -+ return -EINVAL; > -+ } > -+ > -+ /* Get volt_data corresponding to target_volt */ > -+ volt_data = omap_voltage_get_voltdata(voltdm, target_volt); > -+ if (IS_ERR(volt_data)) > -+ volt_data = NULL; > -+ > -+ *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); > -+ *current_vsel = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, vdd->vp_data->voltage); > -+ > -+ /* Setting the ON voltage to the new target voltage */ > -+ vc_cmdval = vdd->read_reg(vc->vc_common->prm_mod, vc- > >cmdval_reg); > -+ vc_cmdval &= ~vc_common->cmd_on_mask; > -+ vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); > -+ vdd->write_reg(vc_cmdval, vc->vc_common->prm_mod, vc- > >cmdval_reg); > -+ > -+ /* Setting vp errorgain based on the voltage */ > -+ if (volt_data) { > -+ vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, > -+ vdd->vp_data->vpconfig); > -+ vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; > -+ vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; > -+ vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << > -+ vp_common->vpconfig_errorgain_shift; > -+ vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common- > >prm_mod, > -+ vdd->vp_data->vpconfig); > -+ } > -+ > -+ return 0; > -+} > -+ > -+void omap_vc_post_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt, > -+ u8 target_vsel, u8 current_vsel) > -+{ > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ u32 smps_steps = 0, smps_delay = 0; > -+ > -+ smps_steps = abs(target_vsel - current_vsel); > -+ /* SMPS slew rate / step size. 2us added as buffer. */ > -+ smps_delay = ((smps_steps * vdd->pmic_info->step_size) / > -+ vdd->pmic_info->slew_rate) + 2; > -+ udelay(smps_delay); > -+ > -+ vdd->curr_volt = target_volt; > -+} > -+ > -+/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ > -+int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, > -+ unsigned long target_volt) > -+{ > -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ u32 loop_cnt = 0, retries_cnt = 0; > -+ u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; > -+ u8 target_vsel, current_vsel; > -+ int ret; > -+ > -+ ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > -+ if (ret) > -+ return ret; > -+ > -+ vc_valid = vc->vc_common->valid; > -+ vc_bypass_val_reg = vc->vc_common->bypass_val_reg; > -+ vc_bypass_value = (target_vsel << vc->vc_common->data_shift) | > -+ (vdd->pmic_info->pmic_reg << > -+ vc->vc_common->regaddr_shift) | > -+ (vdd->pmic_info->i2c_slave_addr << > -+ vc->vc_common->slaveaddr_shift); > -+ > -+ vdd->write_reg(vc_bypass_value, vc->vc_common->prm_mod, > vc_bypass_val_reg); > -+ vdd->write_reg(vc_bypass_value | vc_valid, vc->vc_common- > >prm_mod, > -+ vc_bypass_val_reg); > -+ > -+ vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, > vc_bypass_val_reg); > -+ /* > -+ * Loop till the bypass command is acknowledged from the SMPS. > -+ * NOTE: This is legacy code. The loop count and retry count needs > -+ * to be revisited. > -+ */ > -+ while (!(vc_bypass_value & vc_valid)) { > -+ loop_cnt++; > -+ > -+ if (retries_cnt > 10) { > -+ pr_warning("%s: Retry count exceeded\n", __func__); > -+ return -ETIMEDOUT; > -+ } > -+ > -+ if (loop_cnt > 50) { > -+ retries_cnt++; > -+ loop_cnt = 0; > -+ udelay(10); > -+ } > -+ vc_bypass_value = vdd->read_reg(vc->vc_common- > >prm_mod, > -+ vc_bypass_val_reg); > -+ } > -+ > -+ omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); > -+ return 0; > -+} > -+ > -+static void __init omap3_vfsm_init(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ > -+ /* > -+ * Voltage Manager FSM parameters init > -+ * XXX This data should be passed in from the board file > -+ */ > -+ vdd->write_reg(OMAP3_CLKSETUP, vc->vc_common->prm_mod, > OMAP3_PRM_CLKSETUP_OFFSET); > -+ vdd->write_reg(OMAP3_VOLTOFFSET, vc->vc_common->prm_mod, > -+ OMAP3_PRM_VOLTOFFSET_OFFSET); > -+ vdd->write_reg(OMAP3_VOLTSETUP2, vc->vc_common->prm_mod, > -+ OMAP3_PRM_VOLTSETUP2_OFFSET); > -+} > -+ > -+static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ static bool is_initialized; > -+ u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; > -+ u32 vc_val; > -+ > -+ if (is_initialized) > -+ return; > -+ > -+ /* Set up the on, inactive, retention and off voltage */ > -+ on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); > -+ onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); > -+ ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); > -+ off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); > -+ vc_val = ((on_vsel << vc->vc_common->cmd_on_shift) | > -+ (onlp_vsel << vc->vc_common->cmd_onlp_shift) | > -+ (ret_vsel << vc->vc_common->cmd_ret_shift) | > -+ (off_vsel << vc->vc_common->cmd_off_shift)); > -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, vc->cmdval_reg); > -+ > -+ /* > -+ * Generic VC parameters init > -+ * XXX This data should be abstracted out > -+ */ > -+ vdd->write_reg(OMAP3430_CMD1_MASK | > OMAP3430_RAV1_MASK, vc->vc_common->prm_mod, > -+ OMAP3_PRM_VC_CH_CONF_OFFSET); > -+ vdd->write_reg(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, vc->vc_common->prm_mod, > -+ OMAP3_PRM_VC_I2C_CFG_OFFSET); > -+ > -+ omap3_vfsm_init(voltdm); > -+ > -+ is_initialized = true; > -+} > -+ > -+ > -+/* OMAP4 specific voltage init functions */ > -+static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ static bool is_initialized; > -+ u32 vc_val; > -+ > -+ if (is_initialized) > -+ return; > -+ > -+ /* TODO: Configure setup times and CMD_VAL values*/ > -+ > -+ /* > -+ * Generic VC parameters init > -+ * XXX This data should be abstracted out > -+ */ > -+ vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | > OMAP4430_CMD_VDD_MPU_L_MASK | > -+ OMAP4430_RAV_VDD_IVA_L_MASK | > OMAP4430_CMD_VDD_IVA_L_MASK | > -+ OMAP4430_RAV_VDD_CORE_L_MASK | > OMAP4430_CMD_VDD_CORE_L_MASK); > -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, > OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > -+ > -+ /* XXX These are magic numbers and do not belong! */ > -+ vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << > OMAP4430_SCLH_SHIFT); > -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, > OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > -+ > -+ is_initialized = true; > -+} > -+ > -+void __init omap_vc_init_channel(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ u32 vc_val; > -+ > -+ if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > -+ pr_err("%s: PMIC info requried to configure vc for" > -+ "vdd_%s not populated.Hence cannot initialize vc\n", > -+ __func__, voltdm->name); > -+ return; > -+ } > -+ > -+ if (!vdd->read_reg || !vdd->write_reg) { > -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -+ __func__, voltdm->name); > -+ return; > -+ } > -+ > -+ /* Set up the SMPS_SA(i2c slave address in VC */ > -+ vc_val = vdd->read_reg(vc->vc_common->prm_mod, > -+ vc->vc_common->smps_sa_reg); > -+ vc_val &= ~vc->smps_sa_mask; > -+ vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; > -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, > -+ vc->vc_common->smps_sa_reg); > -+ > -+ /* Setup the VOLRA(pmic reg addr) in VC */ > -+ vc_val = vdd->read_reg(vc->vc_common->prm_mod, > -+ vc->vc_common->smps_volra_reg); > -+ vc_val &= ~vc->smps_volra_mask; > -+ vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; > -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, > -+ vc->vc_common->smps_volra_reg); > -+ > -+ /* Configure the setup times */ > -+ vc_val = vdd->read_reg(vc->vc_common->prm_mod, vdd->vfsm- > >voltsetup_reg); > -+ vc_val &= ~vdd->vfsm->voltsetup_mask; > -+ vc_val |= vdd->pmic_info->volt_setup_time << > -+ vdd->vfsm->voltsetup_shift; > -+ vdd->write_reg(vc_val, vc->vc_common->prm_mod, vdd->vfsm- > >voltsetup_reg); > -+ > -+ if (cpu_is_omap34xx()) > -+ omap3_vc_init_channel(voltdm); > -+ else if (cpu_is_omap44xx()) > -+ omap4_vc_init_channel(voltdm); > -+} > -+ > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index f7338af..d0bf348 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -19,6 +19,8 @@ > - > - #include <linux/kernel.h> > - > -+struct voltagedomain; > -+ > - /** > - * struct omap_vc_common_data - per-VC register/bitfield data > - * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register > -@@ -81,5 +83,15 @@ extern struct omap_vc_instance_data > omap4_vc_mpu_data; > - extern struct omap_vc_instance_data omap4_vc_iva_data; > - extern struct omap_vc_instance_data omap4_vc_core_data; > - > -+void omap_vc_init_channel(struct voltagedomain *voltdm); > -+int omap_vc_pre_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt, > -+ u8 *target_vsel, u8 *current_vsel); > -+void omap_vc_post_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt, > -+ u8 target_vsel, u8 current_vsel); > -+int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, > -+ unsigned long target_volt); > -+ > - #endif > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 1e5c122..6ba6e49 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -293,136 +293,6 @@ static void __init vdd_debugfs_init(struct > voltagedomain *voltdm) > - &nom_volt_debug_fops); > - } > - > --/* Voltage scale and accessory APIs */ > --static int _pre_volt_scale(struct voltagedomain *voltdm, > -- unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- struct omap_volt_data *volt_data; > -- const struct omap_vc_common_data *vc_common; > -- const struct omap_vp_common_data *vp_common; > -- u32 vc_cmdval, vp_errgain_val; > -- > -- vc_common = vdd->vc_data->vc_common; > -- vp_common = vdd->vp_data->vp_common; > -- > -- /* Check if suffiecient pmic info is available for this vdd */ > -- if (!vdd->pmic_info) { > -- pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", > -- __func__, voltdm->name); > -- return -EINVAL; > -- } > -- > -- if (!vdd->pmic_info->uv_to_vsel) { > -- pr_err("%s: PMIC function to convert voltage in uV to" > -- "vsel not registered. Hence unable to scale voltage" > -- "for vdd_%s\n", __func__, voltdm->name); > -- return -ENODATA; > -- } > -- > -- if (!vdd->read_reg || !vdd->write_reg) { > -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -- __func__, voltdm->name); > -- return -EINVAL; > -- } > -- > -- /* Get volt_data corresponding to target_volt */ > -- volt_data = omap_voltage_get_voltdata(voltdm, target_volt); > -- if (IS_ERR(volt_data)) > -- volt_data = NULL; > -- > -- *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); > -- *current_vsel = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, vdd->vp_data->voltage); > -- > -- /* Setting the ON voltage to the new target voltage */ > -- vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, > vdd->vc_data->cmdval_reg); > -- vc_cmdval &= ~vc_common->cmd_on_mask; > -- vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); > -- vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, > vdd->vc_data->cmdval_reg); > -- > -- /* Setting vp errorgain based on the voltage */ > -- if (volt_data) { > -- vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, > -- vdd->vp_data->vpconfig); > -- vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; > -- vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; > -- vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << > -- vp_common->vpconfig_errorgain_shift; > -- vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common- > >prm_mod, > -- vdd->vp_data->vpconfig); > -- } > -- > -- return 0; > --} > -- > --static void _post_volt_scale(struct voltagedomain *voltdm, > -- unsigned long target_volt, u8 target_vsel, u8 current_vsel) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 smps_steps = 0, smps_delay = 0; > -- > -- smps_steps = abs(target_vsel - current_vsel); > -- /* SMPS slew rate / step size. 2us added as buffer. */ > -- smps_delay = ((smps_steps * vdd->pmic_info->step_size) / > -- vdd->pmic_info->slew_rate) + 2; > -- udelay(smps_delay); > -- > -- vdd->curr_volt = target_volt; > --} > -- > --/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ > --static int vc_bypass_scale_voltage(struct voltagedomain *voltdm, > -- unsigned long target_volt) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 loop_cnt = 0, retries_cnt = 0; > -- u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; > -- u8 target_vsel, current_vsel; > -- int ret; > -- > -- ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > -- if (ret) > -- return ret; > -- > -- vc_valid = vdd->vc_data->vc_common->valid; > -- vc_bypass_val_reg = vdd->vc_data->vc_common->bypass_val_reg; > -- vc_bypass_value = (target_vsel << vdd->vc_data->vc_common- > >data_shift) | > -- (vdd->pmic_info->pmic_reg << > -- vdd->vc_data->vc_common->regaddr_shift) | > -- (vdd->pmic_info->i2c_slave_addr << > -- vdd->vc_data->vc_common->slaveaddr_shift); > -- > -- vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common- > >prm_mod, vc_bypass_val_reg); > -- vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data- > >vc_common->prm_mod, > -- vc_bypass_val_reg); > -- > -- vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common- > >prm_mod, vc_bypass_val_reg); > -- /* > -- * Loop till the bypass command is acknowledged from the SMPS. > -- * NOTE: This is legacy code. The loop count and retry count needs > -- * to be revisited. > -- */ > -- while (!(vc_bypass_value & vc_valid)) { > -- loop_cnt++; > -- > -- if (retries_cnt > 10) { > -- pr_warning("%s: Retry count exceeded\n", __func__); > -- return -ETIMEDOUT; > -- } > -- > -- if (loop_cnt > 50) { > -- retries_cnt++; > -- loop_cnt = 0; > -- udelay(10); > -- } > -- vc_bypass_value = vdd->read_reg(vdd->vc_data- > >vc_common->prm_mod, > -- vc_bypass_val_reg); > -- } > -- > -- _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); > -- return 0; > --} > -- > - /* VP force update method of voltage scaling */ > - static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, > - unsigned long target_volt) > -@@ -432,7 +302,7 @@ static int vp_forceupdate_scale_voltage(struct > voltagedomain *voltdm, > - u8 target_vsel, current_vsel; > - int ret, timeout = 0; > - > -- ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > -+ ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > - if (ret) > - return ret; > - > -@@ -485,7 +355,7 @@ static int vp_forceupdate_scale_voltage(struct > voltagedomain *voltdm, > - "TRANXDONE never got set after the voltage > update\n", > - __func__, voltdm->name); > - > -- _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); > -+ omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); > - > - /* > - * Disable TransactionDone interrupt , clear all status, clear > -@@ -517,132 +387,6 @@ static int vp_forceupdate_scale_voltage(struct > voltagedomain *voltdm, > - return 0; > - } > - > --static void __init omap3_vfsm_init(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- > -- /* > -- * Voltage Manager FSM parameters init > -- * XXX This data should be passed in from the board file > -- */ > -- vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common- > >prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); > -- vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common- > >prm_mod, > -- OMAP3_PRM_VOLTOFFSET_OFFSET); > -- vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common- > >prm_mod, > -- OMAP3_PRM_VOLTSETUP2_OFFSET); > --} > -- > --static void __init omap3_vc_init(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- static bool is_initialized; > -- u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; > -- u32 vc_val; > -- > -- if (is_initialized) > -- return; > -- > -- /* Set up the on, inactive, retention and off voltage */ > -- on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); > -- onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); > -- ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); > -- off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); > -- vc_val = ((on_vsel << vdd->vc_data->vc_common->cmd_on_shift) | > -- (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | > -- (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | > -- (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); > -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd- > >vc_data->cmdval_reg); > -- > -- /* > -- * Generic VC parameters init > -- * XXX This data should be abstracted out > -- */ > -- vdd->write_reg(OMAP3430_CMD1_MASK | > OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod, > -- OMAP3_PRM_VC_CH_CONF_OFFSET); > -- vdd->write_reg(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, > -- OMAP3_PRM_VC_I2C_CFG_OFFSET); > -- > -- omap3_vfsm_init(voltdm); > -- > -- is_initialized = true; > --} > -- > -- > --/* OMAP4 specific voltage init functions */ > --static void __init omap4_vc_init(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- static bool is_initialized; > -- u32 vc_val; > -- > -- if (is_initialized) > -- return; > -- > -- /* TODO: Configure setup times and CMD_VAL values*/ > -- > -- /* > -- * Generic VC parameters init > -- * XXX This data should be abstracted out > -- */ > -- vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | > OMAP4430_CMD_VDD_MPU_L_MASK | > -- OMAP4430_RAV_VDD_IVA_L_MASK | > OMAP4430_CMD_VDD_IVA_L_MASK | > -- OMAP4430_RAV_VDD_CORE_L_MASK | > OMAP4430_CMD_VDD_CORE_L_MASK); > -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, > OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > -- > -- /* XXX These are magic numbers and do not belong! */ > -- vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << > OMAP4430_SCLH_SHIFT); > -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, > OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > -- > -- is_initialized = true; > --} > -- > --static void __init omap_vc_init(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 vc_val; > -- > -- if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > -- pr_err("%s: PMIC info requried to configure vc for" > -- "vdd_%s not populated.Hence cannot initialize vc\n", > -- __func__, voltdm->name); > -- return; > -- } > -- > -- if (!vdd->read_reg || !vdd->write_reg) { > -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -- __func__, voltdm->name); > -- return; > -- } > -- > -- /* Set up the SMPS_SA(i2c slave address in VC */ > -- vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, > -- vdd->vc_data->vc_common->smps_sa_reg); > -- vc_val &= ~vdd->vc_data->smps_sa_mask; > -- vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data- > >smps_sa_shift; > -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, > -- vdd->vc_data->vc_common->smps_sa_reg); > -- > -- /* Setup the VOLRA(pmic reg addr) in VC */ > -- vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, > -- vdd->vc_data->vc_common->smps_volra_reg); > -- vc_val &= ~vdd->vc_data->smps_volra_mask; > -- vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data- > >smps_volra_shift; > -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, > -- vdd->vc_data->vc_common->smps_volra_reg); > -- > -- /* Configure the setup times */ > -- vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd- > >vfsm->voltsetup_reg); > -- vc_val &= ~vdd->vfsm->voltsetup_mask; > -- vc_val |= vdd->pmic_info->volt_setup_time << > -- vdd->vfsm->voltsetup_shift; > -- vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd- > >vfsm->voltsetup_reg); > -- > -- if (cpu_is_omap34xx()) > -- omap3_vc_init(voltdm); > -- else if (cpu_is_omap44xx()) > -- omap4_vc_init(voltdm); > --} > -- > - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) > - { > - struct omap_vdd_info *vdd = voltdm->vdd; > -@@ -1025,7 +769,7 @@ void omap_change_voltscale_method(struct > voltagedomain *voltdm, > - vdd->volt_scale = vp_forceupdate_scale_voltage; > - return; > - case VOLTSCALE_VCBYPASS: > -- vdd->volt_scale = vc_bypass_scale_voltage; > -+ vdd->volt_scale = omap_vc_bypass_scale_voltage; > - return; > - default: > - pr_warning("%s: Trying to change the method of voltage > scaling" > -@@ -1061,7 +805,7 @@ int __init omap_voltage_late_init(void) > - if (voltdm->vdd) { > - if (omap_vdd_data_configure(voltdm)) > - continue; > -- omap_vc_init(voltdm); > -+ omap_vc_init_channel(voltdm); > - vp_init(voltdm); > - vdd_debugfs_init(voltdm); > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2- > voltage-move-VC-into-struct-voltagedomain-misc.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into- > struct-voltagedomain-misc.patch > deleted file mode 100644 > index feb72d1..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2-voltage- > move-VC-into-struct-voltagedomain-misc.patch > +++ /dev/null > @@ -1,544 +0,0 @@ > -From 4b4aeca96cd144542cd21035d13885d9ef0b6980 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 22 Mar 2011 16:14:57 -0700 > -Subject: [PATCH 110/149] OMAP2+: voltage: move VC into struct > voltagedomain, misc. renames > - > -Move the VC instance struct from omap_vdd_info into struct voltagedomain. > -While moving, perform some misc. renames for readability. > - > -No functional changes. > - > -Summary of renames: > -- rename omap_vc_instance to omap_vc_channel, since there is only > - one instance of the VC IP and this actually represents channels > - using TRM terminology. > -- rename 'vc_common' field of VC channel which led to: > - s/vc->vc_common/vc->common/ > -- remove redundant '_data' suffix > -- OMAP3: vc1 --> vc_mpu, vc2 --> vc_core > -- omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale() > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > - > -merge > ---- > - arch/arm/mach-omap2/vc.c | 90 ++++++++++++------------- > - arch/arm/mach-omap2/vc.h | 26 ++++---- > - arch/arm/mach-omap2/vc3xxx_data.c | 10 ++-- > - arch/arm/mach-omap2/vc44xx_data.c | 14 ++-- > - arch/arm/mach-omap2/voltage.c | 6 +- > - arch/arm/mach-omap2/voltage.h | 5 +- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 4 +- > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 6 +- > - 8 files changed, 80 insertions(+), 81 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 98f5a4b..7643940 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -15,14 +15,12 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - unsigned long target_volt, > - u8 *target_vsel, u8 *current_vsel) > - { > -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > - struct omap_volt_data *volt_data; > -- const struct omap_vc_common_data *vc_common; > - const struct omap_vp_common_data *vp_common; > - u32 vc_cmdval, vp_errgain_val; > - > -- vc_common = vc->vc_common; > - vp_common = vdd->vp_data->vp_common; > - > - /* Check if sufficient pmic info is available for this vdd */ > -@@ -54,10 +52,10 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - *current_vsel = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, vdd->vp_data->voltage); > - > - /* Setting the ON voltage to the new target voltage */ > -- vc_cmdval = vdd->read_reg(vc->vc_common->prm_mod, vc- > >cmdval_reg); > -- vc_cmdval &= ~vc_common->cmd_on_mask; > -- vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); > -- vdd->write_reg(vc_cmdval, vc->vc_common->prm_mod, vc- > >cmdval_reg); > -+ vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc- > >cmdval_reg); > -+ vc_cmdval &= ~vc->common->cmd_on_mask; > -+ vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); > -+ vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc- > >cmdval_reg); > - > - /* Setting vp errorgain based on the voltage */ > - if (volt_data) { > -@@ -90,11 +88,11 @@ void omap_vc_post_scale(struct voltagedomain > *voltdm, > - vdd->curr_volt = target_volt; > - } > - > --/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ > --int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, > -- unsigned long target_volt) > -+/* vc_bypass_scale - VC bypass method of voltage scaling */ > -+int omap_vc_bypass_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt) > - { > -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > - u32 loop_cnt = 0, retries_cnt = 0; > - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; > -@@ -105,19 +103,19 @@ int omap_vc_bypass_scale_voltage(struct > voltagedomain *voltdm, > - if (ret) > - return ret; > - > -- vc_valid = vc->vc_common->valid; > -- vc_bypass_val_reg = vc->vc_common->bypass_val_reg; > -- vc_bypass_value = (target_vsel << vc->vc_common->data_shift) | > -+ vc_valid = vc->common->valid; > -+ vc_bypass_val_reg = vc->common->bypass_val_reg; > -+ vc_bypass_value = (target_vsel << vc->common->data_shift) | > - (vdd->pmic_info->pmic_reg << > -- vc->vc_common->regaddr_shift) | > -+ vc->common->regaddr_shift) | > - (vdd->pmic_info->i2c_slave_addr << > -- vc->vc_common->slaveaddr_shift); > -+ vc->common->slaveaddr_shift); > - > -- vdd->write_reg(vc_bypass_value, vc->vc_common->prm_mod, > vc_bypass_val_reg); > -- vdd->write_reg(vc_bypass_value | vc_valid, vc->vc_common- > >prm_mod, > -+ vdd->write_reg(vc_bypass_value, vc->common->prm_mod, > vc_bypass_val_reg); > -+ vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod, > - vc_bypass_val_reg); > - > -- vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, > vc_bypass_val_reg); > -+ vc_bypass_value = vdd->read_reg(vc->common->prm_mod, > vc_bypass_val_reg); > - /* > - * Loop till the bypass command is acknowledged from the SMPS. > - * NOTE: This is legacy code. The loop count and retry count needs > -@@ -136,7 +134,7 @@ int omap_vc_bypass_scale_voltage(struct > voltagedomain *voltdm, > - loop_cnt = 0; > - udelay(10); > - } > -- vc_bypass_value = vdd->read_reg(vc->vc_common- > >prm_mod, > -+ vc_bypass_value = vdd->read_reg(vc->common->prm_mod, > - vc_bypass_val_reg); > - } > - > -@@ -146,23 +144,23 @@ int omap_vc_bypass_scale_voltage(struct > voltagedomain *voltdm, > - > - static void __init omap3_vfsm_init(struct voltagedomain *voltdm) > - { > -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > - > - /* > - * Voltage Manager FSM parameters init > - * XXX This data should be passed in from the board file > - */ > -- vdd->write_reg(OMAP3_CLKSETUP, vc->vc_common->prm_mod, > OMAP3_PRM_CLKSETUP_OFFSET); > -- vdd->write_reg(OMAP3_VOLTOFFSET, vc->vc_common->prm_mod, > -+ vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, > OMAP3_PRM_CLKSETUP_OFFSET); > -+ vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod, > - OMAP3_PRM_VOLTOFFSET_OFFSET); > -- vdd->write_reg(OMAP3_VOLTSETUP2, vc->vc_common->prm_mod, > -+ vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod, > - OMAP3_PRM_VOLTSETUP2_OFFSET); > - } > - > - static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) > - { > -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > - static bool is_initialized; > - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; > -@@ -176,19 +174,19 @@ static void __init omap3_vc_init_channel(struct > voltagedomain *voltdm) > - onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); > - ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); > - off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); > -- vc_val = ((on_vsel << vc->vc_common->cmd_on_shift) | > -- (onlp_vsel << vc->vc_common->cmd_onlp_shift) | > -- (ret_vsel << vc->vc_common->cmd_ret_shift) | > -- (off_vsel << vc->vc_common->cmd_off_shift)); > -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, vc->cmdval_reg); > -+ vc_val = ((on_vsel << vc->common->cmd_on_shift) | > -+ (onlp_vsel << vc->common->cmd_onlp_shift) | > -+ (ret_vsel << vc->common->cmd_ret_shift) | > -+ (off_vsel << vc->common->cmd_off_shift)); > -+ vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg); > - > - /* > - * Generic VC parameters init > - * XXX This data should be abstracted out > - */ > -- vdd->write_reg(OMAP3430_CMD1_MASK | > OMAP3430_RAV1_MASK, vc->vc_common->prm_mod, > -+ vdd->write_reg(OMAP3430_CMD1_MASK | > OMAP3430_RAV1_MASK, vc->common->prm_mod, > - OMAP3_PRM_VC_CH_CONF_OFFSET); > -- vdd->write_reg(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, vc->vc_common->prm_mod, > -+ vdd->write_reg(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, vc->common->prm_mod, > - OMAP3_PRM_VC_I2C_CFG_OFFSET); > - > - omap3_vfsm_init(voltdm); > -@@ -200,7 +198,7 @@ static void __init omap3_vc_init_channel(struct > voltagedomain *voltdm) > - /* OMAP4 specific voltage init functions */ > - static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) > - { > -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > - static bool is_initialized; > - u32 vc_val; > -@@ -217,18 +215,18 @@ static void __init omap4_vc_init_channel(struct > voltagedomain *voltdm) > - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | > OMAP4430_CMD_VDD_MPU_L_MASK | > - OMAP4430_RAV_VDD_IVA_L_MASK | > OMAP4430_CMD_VDD_IVA_L_MASK | > - OMAP4430_RAV_VDD_CORE_L_MASK | > OMAP4430_CMD_VDD_CORE_L_MASK); > -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, > OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > -+ vdd->write_reg(vc_val, vc->common->prm_mod, > OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > - > - /* XXX These are magic numbers and do not belong! */ > - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << > OMAP4430_SCLH_SHIFT); > -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, > OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > -+ vdd->write_reg(vc_val, vc->common->prm_mod, > OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > - > - is_initialized = true; > - } > - > - void __init omap_vc_init_channel(struct voltagedomain *voltdm) > - { > -- struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; > -+ struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > - u32 vc_val; > - > -@@ -246,27 +244,27 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - } > - > - /* Set up the SMPS_SA(i2c slave address in VC */ > -- vc_val = vdd->read_reg(vc->vc_common->prm_mod, > -- vc->vc_common->smps_sa_reg); > -+ vc_val = vdd->read_reg(vc->common->prm_mod, > -+ vc->common->smps_sa_reg); > - vc_val &= ~vc->smps_sa_mask; > - vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; > -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, > -- vc->vc_common->smps_sa_reg); > -+ vdd->write_reg(vc_val, vc->common->prm_mod, > -+ vc->common->smps_sa_reg); > - > - /* Setup the VOLRA(pmic reg addr) in VC */ > -- vc_val = vdd->read_reg(vc->vc_common->prm_mod, > -- vc->vc_common->smps_volra_reg); > -+ vc_val = vdd->read_reg(vc->common->prm_mod, > -+ vc->common->smps_volra_reg); > - vc_val &= ~vc->smps_volra_mask; > - vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; > -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, > -- vc->vc_common->smps_volra_reg); > -+ vdd->write_reg(vc_val, vc->common->prm_mod, > -+ vc->common->smps_volra_reg); > - > - /* Configure the setup times */ > -- vc_val = vdd->read_reg(vc->vc_common->prm_mod, vdd->vfsm- > >voltsetup_reg); > -+ vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm- > >voltsetup_reg); > - vc_val &= ~vdd->vfsm->voltsetup_mask; > - vc_val |= vdd->pmic_info->volt_setup_time << > - vdd->vfsm->voltsetup_shift; > -- vdd->write_reg(vc_val, vc->vc_common->prm_mod, vdd->vfsm- > >voltsetup_reg); > -+ vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm- > >voltsetup_reg); > - > - if (cpu_is_omap34xx()) > - omap3_vc_init_channel(voltdm); > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index d0bf348..51d36a8 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -22,7 +22,7 @@ > - struct voltagedomain; > - > - /** > -- * struct omap_vc_common_data - per-VC register/bitfield data > -+ * struct omap_vc_common - per-VC register/bitfield data > - * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register > - * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register > - * @prm_mod: PRM module id used for PRM register access > -@@ -40,7 +40,7 @@ struct voltagedomain; > - * XXX One of cmd_on_mask and cmd_on_shift are not needed > - * XXX VALID should probably be a shift, not a mask > - */ > --struct omap_vc_common_data { > -+struct omap_vc_common { > - u32 cmd_on_mask; > - u32 valid; > - s16 prm_mod; > -@@ -57,8 +57,8 @@ struct omap_vc_common_data { > - }; > - > - /** > -- * struct omap_vc_instance_data - VC per-instance data > -- * @vc_common: pointer to VC common data for this platform > -+ * struct omap_vc_channel - VC per-instance data > -+ * @common: pointer to VC common data for this platform > - * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register > - * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register > - * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register > -@@ -67,8 +67,8 @@ struct omap_vc_common_data { > - * XXX It is not necessary to have both a *_mask and a *_shift - > - * remove one > - */ > --struct omap_vc_instance_data { > -- const struct omap_vc_common_data *vc_common; > -+struct omap_vc_channel { > -+ const struct omap_vc_common *common; > - u32 smps_sa_mask; > - u32 smps_volra_mask; > - u8 cmdval_reg; > -@@ -76,12 +76,12 @@ struct omap_vc_instance_data { > - u8 smps_volra_shift; > - }; > - > --extern struct omap_vc_instance_data omap3_vc1_data; > --extern struct omap_vc_instance_data omap3_vc2_data; > -+extern struct omap_vc_channel omap3_vc_mpu; > -+extern struct omap_vc_channel omap3_vc_core; > - > --extern struct omap_vc_instance_data omap4_vc_mpu_data; > --extern struct omap_vc_instance_data omap4_vc_iva_data; > --extern struct omap_vc_instance_data omap4_vc_core_data; > -+extern struct omap_vc_channel omap4_vc_mpu; > -+extern struct omap_vc_channel omap4_vc_iva; > -+extern struct omap_vc_channel omap4_vc_core; > - > - void omap_vc_init_channel(struct voltagedomain *voltdm); > - int omap_vc_pre_scale(struct voltagedomain *voltdm, > -@@ -90,8 +90,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, > - void omap_vc_post_scale(struct voltagedomain *voltdm, > - unsigned long target_volt, > - u8 target_vsel, u8 current_vsel); > --int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, > -- unsigned long target_volt); > -+int omap_vc_bypass_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt); > - > - #endif > - > -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach- > omap2/vc3xxx_data.c > -index 55caccb..1a17ed4 100644 > ---- a/arch/arm/mach-omap2/vc3xxx_data.c > -+++ b/arch/arm/mach-omap2/vc3xxx_data.c > -@@ -29,7 +29,7 @@ > - * VC data common to 34xx/36xx chips > - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. > - */ > --static struct omap_vc_common_data omap3_vc_common = { > -+static struct omap_vc_common omap3_vc_common = { > - .prm_mod = OMAP3430_GR_MOD, > - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, > - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, > -@@ -45,8 +45,8 @@ static struct omap_vc_common_data > omap3_vc_common = { > - .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, > - }; > - > --struct omap_vc_instance_data omap3_vc1_data = { > -- .vc_common = &omap3_vc_common, > -+struct omap_vc_channel omap3_vc_mpu = { > -+ .common = &omap3_vc_common, > - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, > - .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, > - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, > -@@ -54,8 +54,8 @@ struct omap_vc_instance_data omap3_vc1_data = { > - .smps_volra_mask = OMAP3430_VOLRA0_MASK, > - }; > - > --struct omap_vc_instance_data omap3_vc2_data = { > -- .vc_common = &omap3_vc_common, > -+struct omap_vc_channel omap3_vc_core = { > -+ .common = &omap3_vc_common, > - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, > - .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, > - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, > -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach- > omap2/vc44xx_data.c > -index b62678e..56f3f4a 100644 > ---- a/arch/arm/mach-omap2/vc44xx_data.c > -+++ b/arch/arm/mach-omap2/vc44xx_data.c > -@@ -30,7 +30,7 @@ > - * VC data common to 44xx chips > - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. > - */ > --static const struct omap_vc_common_data omap4_vc_common = { > -+static const struct omap_vc_common omap4_vc_common = { > - .prm_mod = OMAP4430_PRM_DEVICE_INST, > - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, > - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, > -@@ -47,8 +47,8 @@ static const struct omap_vc_common_data > omap4_vc_common = { > - }; > - > - /* VC instance data for each controllable voltage line */ > --struct omap_vc_instance_data omap4_vc_mpu_data = { > -- .vc_common = &omap4_vc_common, > -+struct omap_vc_channel omap4_vc_mpu = { > -+ .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, > - .smps_sa_shift = > OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT, > - .smps_sa_mask = > OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, > -@@ -56,8 +56,8 @@ struct omap_vc_instance_data omap4_vc_mpu_data = { > - .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, > - }; > - > --struct omap_vc_instance_data omap4_vc_iva_data = { > -- .vc_common = &omap4_vc_common, > -+struct omap_vc_channel omap4_vc_iva = { > -+ .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, > - .smps_sa_shift = > OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT, > - .smps_sa_mask = > OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, > -@@ -65,8 +65,8 @@ struct omap_vc_instance_data omap4_vc_iva_data = { > - .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, > - }; > - > --struct omap_vc_instance_data omap4_vc_core_data = { > -- .vc_common = &omap4_vc_common, > -+struct omap_vc_channel omap4_vc_core = { > -+ .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, > - .smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT, > - .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 6ba6e49..c6352e3 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -769,7 +769,7 @@ void omap_change_voltscale_method(struct > voltagedomain *voltdm, > - vdd->volt_scale = vp_forceupdate_scale_voltage; > - return; > - case VOLTSCALE_VCBYPASS: > -- vdd->volt_scale = omap_vc_bypass_scale_voltage; > -+ vdd->volt_scale = omap_vc_bypass_scale; > - return; > - default: > - pr_warning("%s: Trying to change the method of voltage > scaling" > -@@ -802,10 +802,12 @@ int __init omap_voltage_late_init(void) > - if (!voltdm->scalable) > - continue; > - > -+ if (voltdm->vc) > -+ omap_vc_init_channel(voltdm); > -+ > - if (voltdm->vdd) { > - if (omap_vdd_data_configure(voltdm)) > - continue; > -- omap_vc_init_channel(voltdm); > - vp_init(voltdm); > - vdd_debugfs_init(voltdm); > - } > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index b41d9f1..b06e03f 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -66,6 +66,8 @@ struct voltagedomain { > - bool scalable; > - struct list_head node; > - struct list_head pwrdm_list; > -+ struct omap_vc_channel *vc; > -+ > - struct omap_vdd_info *vdd; > - }; > - > -@@ -125,8 +127,6 @@ struct omap_volt_pmic_info { > - * @vp_data : the register values, shifts, masks for various > - * vp registers > - * @vp_rt_data : VP data derived at runtime, not predefined > -- * @vc_data : structure containing various various vc registers, > -- * shifts, masks etc. > - * @vfsm : voltage manager FSM data > - * @debug_dir : debug directory for this voltage domain. > - * @curr_volt : current voltage for this vdd. > -@@ -139,7 +139,6 @@ struct omap_vdd_info { > - struct omap_volt_pmic_info *pmic_info; > - struct omap_vp_instance_data *vp_data; > - struct omap_vp_runtime_data vp_rt_data; > -- struct omap_vc_instance_data *vc_data; > - const struct omap_vfsm_instance_data *vfsm; > - struct dentry *debug_dir; > - u32 curr_volt; > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index d7e1052..7cb27ec 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -41,7 +41,6 @@ static struct omap_vdd_info omap3_vdd1_info = { > - .prm_irqst_mod = OCP_MOD, > - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap3_vp1_data, > -- .vc_data = &omap3_vc1_data, > - .vfsm = &omap3_vdd1_vfsm_data, > - }; > - > -@@ -55,19 +54,20 @@ static struct omap_vdd_info omap3_vdd2_info = { > - .prm_irqst_mod = OCP_MOD, > - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap3_vp2_data, > -- .vc_data = &omap3_vc2_data, > - .vfsm = &omap3_vdd2_vfsm_data, > - }; > - > - static struct voltagedomain omap3_voltdm_mpu = { > - .name = "mpu_iva", > - .scalable = true, > -+ .vc = &omap3_vc_mpu, > - .vdd = &omap3_vdd1_info, > - }; > - > - static struct voltagedomain omap3_voltdm_core = { > - .name = "core", > - .scalable = true, > -+ .vc = &omap3_vc_core, > - .vdd = &omap3_vdd2_info, > - }; > - > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index 9a17b5e..a05d90a 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -40,7 +40,6 @@ static struct omap_vdd_info omap4_vdd_mpu_info = { > - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, > - .vp_data = &omap4_vp_mpu_data, > -- .vc_data = &omap4_vc_mpu_data, > - .vfsm = &omap4_vdd_mpu_vfsm_data, > - }; > - > -@@ -52,7 +51,6 @@ static struct omap_vdd_info omap4_vdd_iva_info = { > - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap4_vp_iva_data, > -- .vc_data = &omap4_vc_iva_data, > - .vfsm = &omap4_vdd_iva_vfsm_data, > - }; > - > -@@ -64,25 +62,27 @@ static struct omap_vdd_info omap4_vdd_core_info = > { > - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap4_vp_core_data, > -- .vc_data = &omap4_vc_core_data, > - .vfsm = &omap4_vdd_core_vfsm_data, > - }; > - > - static struct voltagedomain omap4_voltdm_mpu = { > - .name = "mpu", > - .scalable = true, > -+ .vc = &omap4_vc_mpu, > - .vdd = &omap4_vdd_mpu_info, > - }; > - > - static struct voltagedomain omap4_voltdm_iva = { > - .name = "iva", > - .scalable = true, > -+ .vc = &omap4_vc_iva, > - .vdd = &omap4_vdd_iva_info, > - }; > - > - static struct voltagedomain omap4_voltdm_core = { > - .name = "core", > - .scalable = true, > -+ .vc = &omap4_vc_core, > - .vdd = &omap4_vdd_core_info, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2- > voltage-enable-VC-bypass-scale-method-when-VC-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2-voltage-enable-VC- > bypass-scale-method-when-VC-.patch > deleted file mode 100644 > index a5ad5b8..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2-voltage- > enable-VC-bypass-scale-method-when-VC-.patch > +++ /dev/null > @@ -1,37 +0,0 @@ > -From 23a2e1563c2e0bf2c8162c8c91b2cf1f6007c669 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 18 Jul 2011 15:48:22 -0700 > -Subject: [PATCH 111/149] OMAP2+: voltage: enable VC bypass scale method > when VC is initialized > - > -VC is initialized first, set default scaling method to VC bypass. > -If/when VP is initialized, default scaling method will be changed to > -VP force-update. > - > -Enabling VC bypass as default as soon as VC is initialized allows for > -VC bypass scaling to work when no VP is configured/initialized for a > -given voltage domain. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.c | 4 +++- > - 1 files changed, 3 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index c6352e3..e1a22a3 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -802,8 +802,10 @@ int __init omap_voltage_late_init(void) > - if (!voltdm->scalable) > - continue; > - > -- if (voltdm->vc) > -+ if (voltdm->vc) { > -+ voltdm->vdd->volt_scale = omap_vc_bypass_scale; > - omap_vc_init_channel(voltdm); > -+ } > - > - if (voltdm->vdd) { > - if (omap_vdd_data_configure(voltdm)) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2- > voltage-split-out-voltage-processor-VP-code-in.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage- > processor-VP-code-in.patch > deleted file mode 100644 > index 095b5bf..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2-voltage-split- > out-voltage-processor-VP-code-in.patch > +++ /dev/null > @@ -1,874 +0,0 @@ > -From 0d45741059eb1c21dd4c1f34083d1ecaed7fca96 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 21 Mar 2011 14:29:13 -0700 > -Subject: [PATCH 112/149] OMAP2+: voltage: split out voltage processor (VP) > code into new layer > - > -This patch is primarily a move of VP specific code from voltage.c into > -its own code in vp.c and adds prototypes to vp.h > - > -No functional changes, except debugfs... > - > -VP debugfs moved to 'vp' subdir of <debugfs>/voltage/ and 'vp_' > -prefixes removed from all debugfs filenames. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/Makefile | 2 +- > - arch/arm/mach-omap2/voltage.c | 348 +------------------------------------- > - arch/arm/mach-omap2/voltage.h | 3 - > - arch/arm/mach-omap2/vp.c | 374 > +++++++++++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/vp.h | 9 + > - 5 files changed, 387 insertions(+), 349 deletions(-) > - create mode 100644 arch/arm/mach-omap2/vp.c > - > -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach- > omap2/Makefile > -index ecbf361..8e79ca5 100644 > ---- a/arch/arm/mach-omap2/Makefile > -+++ b/arch/arm/mach-omap2/Makefile > -@@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o > cm2xxx_3xxx.o cminst44xx.o \ > - > - # OMAP voltage domains > - ifeq ($(CONFIG_PM),y) > --voltagedomain-common := voltage.o vc.o > -+voltagedomain-common := voltage.o vc.o vp.o > - obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ > - voltagedomains2xxx_data.o > - obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index e1a22a3..9b9f019 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -46,10 +46,6 @@ static LIST_HEAD(voltdm_list); > - #define VOLTAGE_DIR_SIZE 16 > - static struct dentry *voltage_dir; > - > --/* Init function pointers */ > --static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, > -- unsigned long target_volt); > -- > - static u32 omap3_voltage_read_reg(u16 mod, u8 offset) > - { > - return omap2_prm_read_mod_reg(mod, offset); > -@@ -105,7 +101,7 @@ static int __init _config_common_vdd_data(struct > voltagedomain *voltdm) > - sys_clk_speed /= 1000; > - > - /* Generic voltage parameters */ > -- vdd->volt_scale = vp_forceupdate_scale_voltage; > -+ vdd->volt_scale = omap_vp_forceupdate_scale; > - vdd->vp_enabled = false; > - > - vdd->vp_rt_data.vpconfig_erroroffset = > -@@ -127,30 +123,6 @@ static int __init _config_common_vdd_data(struct > voltagedomain *voltdm) > - return 0; > - } > - > --/* Voltage debugfs support */ > --static int vp_volt_debug_get(void *data, u64 *val) > --{ > -- struct voltagedomain *voltdm = (struct voltagedomain *)data; > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- u8 vsel; > -- > -- if (!vdd) { > -- pr_warning("Wrong paramater passed\n"); > -- return -EINVAL; > -- } > -- > -- vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->voltage); > -- > -- if (!vdd->pmic_info->vsel_to_uv) { > -- pr_warning("PMIC function to convert vsel to voltage" > -- "in uV not registerd\n"); > -- return -EINVAL; > -- } > -- > -- *val = vdd->pmic_info->vsel_to_uv(vsel); > -- return 0; > --} > -- > - static int nom_volt_debug_get(void *data, u64 *val) > - { > - struct voltagedomain *voltdm = (struct voltagedomain *)data; > -@@ -165,85 +137,8 @@ static int nom_volt_debug_get(void *data, u64 *val) > - return 0; > - } > - > --DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, > "%llu\n"); > - DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, > NULL, > - "%llu\n"); > --static void vp_latch_vsel(struct voltagedomain *voltdm) > --{ > -- u32 vpconfig; > -- unsigned long uvdc; > -- char vsel; > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- > -- uvdc = omap_voltage_get_nom_volt(voltdm); > -- if (!uvdc) { > -- pr_warning("%s: unable to find current voltage for vdd_%s\n", > -- __func__, voltdm->name); > -- return; > -- } > -- > -- if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > -- pr_warning("%s: PMIC function to convert voltage in uV to" > -- " vsel not registered\n", __func__); > -- return; > -- } > -- > -- vsel = vdd->pmic_info->uv_to_vsel(uvdc); > -- > -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- vpconfig &= ~(vdd->vp_data->vp_common- > >vpconfig_initvoltage_mask | > -- vdd->vp_data->vp_common->vpconfig_initvdd); > -- vpconfig |= vsel << vdd->vp_data->vp_common- > >vpconfig_initvoltage_shift; > -- > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- > -- /* Trigger initVDD value copy to voltage processor */ > -- vdd->write_reg((vpconfig | vdd->vp_data->vp_common- > >vpconfig_initvdd), > -- vdd->vp_data->vp_common->prm_mod, vdd->vp_data- > >vpconfig); > -- > -- /* Clear initVDD copy trigger bit */ > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > --} > -- > --/* Generic voltage init functions */ > --static void __init vp_init(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 vp_val; > -- > -- if (!vdd->read_reg || !vdd->write_reg) { > -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -- __func__, voltdm->name); > -- return; > -- } > -- > -- vp_val = vdd->vp_rt_data.vpconfig_erroroffset | > -- (vdd->vp_rt_data.vpconfig_errorgain << > -- vdd->vp_data->vp_common->vpconfig_errorgain_shift) | > -- vdd->vp_data->vp_common->vpconfig_timeouten; > -- vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vpconfig); > -- > -- vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << > -- vdd->vp_data->vp_common- > >vstepmin_smpswaittimemin_shift) | > -- (vdd->vp_rt_data.vstepmin_stepmin << > -- vdd->vp_data->vp_common->vstepmin_stepmin_shift)); > -- vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vstepmin); > -- > -- vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << > -- vdd->vp_data->vp_common- > >vstepmax_smpswaittimemax_shift) | > -- (vdd->vp_rt_data.vstepmax_stepmax << > -- vdd->vp_data->vp_common->vstepmax_stepmax_shift)); > -- vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vstepmax); > -- > -- vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << > -- vdd->vp_data->vp_common->vlimitto_vddmax_shift) | > -- (vdd->vp_rt_data.vlimitto_vddmin << > -- vdd->vp_data->vp_common->vlimitto_vddmin_shift) | > -- (vdd->vp_rt_data.vlimitto_timeout << > -- vdd->vp_data->vp_common->vlimitto_timeout_shift)); > -- vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd- > >vp_data->vlimitto); > --} > -- > - static void __init vdd_debugfs_init(struct voltagedomain *voltdm) > - { > - char *name; > -@@ -268,125 +163,11 @@ static void __init vdd_debugfs_init(struct > voltagedomain *voltdm) > - return; > - } > - > -- (void) debugfs_create_x16("vp_errorgain", S_IRUGO, vdd->debug_dir, > -- &(vdd->vp_rt_data.vpconfig_errorgain)); > -- (void) debugfs_create_x16("vp_smpswaittimemin", S_IRUGO, > -- vdd->debug_dir, > -- &(vdd- > >vp_rt_data.vstepmin_smpswaittimemin)); > -- (void) debugfs_create_x8("vp_stepmin", S_IRUGO, vdd->debug_dir, > -- &(vdd->vp_rt_data.vstepmin_stepmin)); > -- (void) debugfs_create_x16("vp_smpswaittimemax", S_IRUGO, > -- vdd->debug_dir, > -- &(vdd- > >vp_rt_data.vstepmax_smpswaittimemax)); > -- (void) debugfs_create_x8("vp_stepmax", S_IRUGO, vdd->debug_dir, > -- &(vdd->vp_rt_data.vstepmax_stepmax)); > -- (void) debugfs_create_x8("vp_vddmax", S_IRUGO, vdd->debug_dir, > -- &(vdd->vp_rt_data.vlimitto_vddmax)); > -- (void) debugfs_create_x8("vp_vddmin", S_IRUGO, vdd->debug_dir, > -- &(vdd->vp_rt_data.vlimitto_vddmin)); > -- (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir, > -- &(vdd->vp_rt_data.vlimitto_timeout)); > -- (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir, > -- (void *) voltdm, &vp_volt_debug_fops); > - (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, > - vdd->debug_dir, (void *) voltdm, > - &nom_volt_debug_fops); > - } > - > --/* VP force update method of voltage scaling */ > --static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, > -- unsigned long target_volt) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 vpconfig; > -- u8 target_vsel, current_vsel; > -- int ret, timeout = 0; > -- > -- ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > -- if (ret) > -- return ret; > -- > -- /* > -- * Clear all pending TransactionDone interrupt/status. Typical latency > -- * is <3us > -- */ > -- while (timeout++ < VP_TRANXDONE_TIMEOUT) { > -- vdd->write_reg(vdd->vp_data->prm_irqst_data- > >tranxdone_status, > -- vdd->prm_irqst_mod, vdd->prm_irqst_reg); > -- if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd- > >prm_irqst_reg) & > -- vdd->vp_data->prm_irqst_data->tranxdone_status)) > -- break; > -- udelay(1); > -- } > -- if (timeout >= VP_TRANXDONE_TIMEOUT) { > -- pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." > -- "Voltage change aborted", __func__, voltdm->name); > -- return -ETIMEDOUT; > -- } > -- > -- /* Configure for VP-Force Update */ > -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | > -- vdd->vp_data->vp_common->vpconfig_forceupdate | > -- vdd->vp_data->vp_common- > >vpconfig_initvoltage_mask); > -- vpconfig |= ((target_vsel << > -- vdd->vp_data->vp_common- > >vpconfig_initvoltage_shift)); > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- > -- /* Trigger initVDD value copy to voltage processor */ > -- vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- > -- /* Force update of voltage */ > -- vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- > -- /* > -- * Wait for TransactionDone. Typical latency is <200us. > -- * Depends on SMPSWAITTIMEMIN/MAX and voltage change > -- */ > -- timeout = 0; > -- omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, > -- vdd->prm_irqst_reg) & > -- vdd->vp_data->prm_irqst_data->tranxdone_status), > -- VP_TRANXDONE_TIMEOUT, timeout); > -- if (timeout >= VP_TRANXDONE_TIMEOUT) > -- pr_err("%s: vdd_%s TRANXDONE timeout exceeded." > -- "TRANXDONE never got set after the voltage > update\n", > -- __func__, voltdm->name); > -- > -- omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); > -- > -- /* > -- * Disable TransactionDone interrupt , clear all status, clear > -- * control registers > -- */ > -- timeout = 0; > -- while (timeout++ < VP_TRANXDONE_TIMEOUT) { > -- vdd->write_reg(vdd->vp_data->prm_irqst_data- > >tranxdone_status, > -- vdd->prm_irqst_mod, vdd->prm_irqst_reg); > -- if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd- > >prm_irqst_reg) & > -- vdd->vp_data->prm_irqst_data->tranxdone_status)) > -- break; > -- udelay(1); > -- } > -- > -- if (timeout >= VP_TRANXDONE_TIMEOUT) > -- pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while > trying" > -- "to clear the TRANXDONE status\n", > -- __func__, voltdm->name); > -- > -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- /* Clear initVDD copy trigger bit */ > -- vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- /* Clear force bit */ > -- vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- > -- return 0; > --} > -- > - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) > - { > - struct omap_vdd_info *vdd = voltdm->vdd; > -@@ -439,129 +220,6 @@ unsigned long omap_voltage_get_nom_volt(struct > voltagedomain *voltdm) > - } > - > - /** > -- * omap_vp_get_curr_volt() - API to get the current vp voltage. > -- * @voltdm: pointer to the VDD. > -- * > -- * This API returns the current voltage for the specified voltage processor > -- */ > --unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd; > -- u8 curr_vsel; > -- > -- if (!voltdm || IS_ERR(voltdm)) { > -- pr_warning("%s: VDD specified does not exist!\n", __func__); > -- return 0; > -- } > -- > -- vdd = voltdm->vdd; > -- if (!vdd->read_reg) { > -- pr_err("%s: No read API for reading vdd_%s regs\n", > -- __func__, voltdm->name); > -- return 0; > -- } > -- > -- curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->voltage); > -- > -- if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { > -- pr_warning("%s: PMIC function to convert vsel to voltage" > -- "in uV not registerd\n", __func__); > -- return 0; > -- } > -- > -- return vdd->pmic_info->vsel_to_uv(curr_vsel); > --} > -- > --/** > -- * omap_vp_enable() - API to enable a particular VP > -- * @voltdm: pointer to the VDD whose VP is to be enabled. > -- * > -- * This API enables a particular voltage processor. Needed by the smartreflex > -- * class drivers. > -- */ > --void omap_vp_enable(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd; > -- u32 vpconfig; > -- > -- if (!voltdm || IS_ERR(voltdm)) { > -- pr_warning("%s: VDD specified does not exist!\n", __func__); > -- return; > -- } > -- > -- vdd = voltdm->vdd; > -- if (!vdd->read_reg || !vdd->write_reg) { > -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -- __func__, voltdm->name); > -- return; > -- } > -- > -- /* If VP is already enabled, do nothing. Return */ > -- if (vdd->vp_enabled) > -- return; > -- > -- vp_latch_vsel(voltdm); > -- > -- /* Enable VP */ > -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- vdd->vp_enabled = true; > --} > -- > --/** > -- * omap_vp_disable() - API to disable a particular VP > -- * @voltdm: pointer to the VDD whose VP is to be disabled. > -- * > -- * This API disables a particular voltage processor. Needed by the smartreflex > -- * class drivers. > -- */ > --void omap_vp_disable(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd; > -- u32 vpconfig; > -- int timeout; > -- > -- if (!voltdm || IS_ERR(voltdm)) { > -- pr_warning("%s: VDD specified does not exist!\n", __func__); > -- return; > -- } > -- > -- vdd = voltdm->vdd; > -- if (!vdd->read_reg || !vdd->write_reg) { > -- pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -- __func__, voltdm->name); > -- return; > -- } > -- > -- /* If VP is already disabled, do nothing. Return */ > -- if (!vdd->vp_enabled) { > -- pr_warning("%s: Trying to disable VP for vdd_%s when" > -- "it is already disabled\n", __func__, voltdm->name); > -- return; > -- } > -- > -- /* Disable VP */ > -- vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; > -- vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, > vdd->vp_data->vpconfig); > -- > -- /* > -- * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us > -- */ > -- omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, vdd->vp_data->vstatus)), > -- VP_IDLE_TIMEOUT, timeout); > -- > -- if (timeout >= VP_IDLE_TIMEOUT) > -- pr_warning("%s: vdd_%s idle timedout\n", > -- __func__, voltdm->name); > -- > -- vdd->vp_enabled = false; > -- > -- return; > --} > -- > --/** > - * omap_voltage_scale_vdd() - API to scale voltage of a particular > - * voltage domain. > - * @voltdm: pointer to the VDD which is to be scaled. > -@@ -766,7 +424,7 @@ void omap_change_voltscale_method(struct > voltagedomain *voltdm, > - > - switch (voltscale_method) { > - case VOLTSCALE_VPFORCEUPDATE: > -- vdd->volt_scale = vp_forceupdate_scale_voltage; > -+ vdd->volt_scale = omap_vp_forceupdate_scale; > - return; > - case VOLTSCALE_VCBYPASS: > - vdd->volt_scale = omap_vc_bypass_scale; > -@@ -810,8 +468,8 @@ int __init omap_voltage_late_init(void) > - if (voltdm->vdd) { > - if (omap_vdd_data_configure(voltdm)) > - continue; > -- vp_init(voltdm); > - vdd_debugfs_init(voltdm); > -+ omap_vp_init(voltdm); > - } > - } > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index b06e03f..83fa239 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -152,9 +152,6 @@ struct omap_vdd_info { > - unsigned long target_volt); > - }; > - > --unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); > --void omap_vp_enable(struct voltagedomain *voltdm); > --void omap_vp_disable(struct voltagedomain *voltdm); > - int omap_voltage_scale_vdd(struct voltagedomain *voltdm, > - unsigned long target_volt); > - void omap_voltage_reset(struct voltagedomain *voltdm); > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -new file mode 100644 > -index 0000000..f3503de > ---- /dev/null > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -0,0 +1,374 @@ > -+#include <linux/kernel.h> > -+#include <linux/init.h> > -+#include <linux/debugfs.h> > -+ > -+#include <plat/common.h> > -+ > -+#include "voltage.h" > -+#include "vp.h" > -+#include "prm-regbits-34xx.h" > -+#include "prm-regbits-44xx.h" > -+#include "prm44xx.h" > -+ > -+static void __init vp_debugfs_init(struct voltagedomain *voltdm); > -+ > -+static void vp_latch_vsel(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ u32 vpconfig; > -+ unsigned long uvdc; > -+ char vsel; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ > -+ uvdc = omap_voltage_get_nom_volt(voltdm); > -+ if (!uvdc) { > -+ pr_warning("%s: unable to find current voltage for vdd_%s\n", > -+ __func__, voltdm->name); > -+ return; > -+ } > -+ > -+ if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > -+ pr_warning("%s: PMIC function to convert voltage in uV to" > -+ " vsel not registered\n", __func__); > -+ return; > -+ } > -+ > -+ vsel = vdd->pmic_info->uv_to_vsel(uvdc); > -+ > -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | > -+ vp->vp_common->vpconfig_initvdd); > -+ vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; > -+ > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ > -+ /* Trigger initVDD value copy to voltage processor */ > -+ vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd), > -+ vp->vp_common->prm_mod, vp->vpconfig); > -+ > -+ /* Clear initVDD copy trigger bit */ > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+} > -+ > -+/* Generic voltage init functions */ > -+void __init omap_vp_init(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ u32 vp_val; > -+ > -+ if (!vdd->read_reg || !vdd->write_reg) { > -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -+ __func__, voltdm->name); > -+ return; > -+ } > -+ > -+ vp_val = vdd->vp_rt_data.vpconfig_erroroffset | > -+ (vdd->vp_rt_data.vpconfig_errorgain << > -+ vp->vp_common->vpconfig_errorgain_shift) | > -+ vp->vp_common->vpconfig_timeouten; > -+ vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig); > -+ > -+ vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << > -+ vp->vp_common->vstepmin_smpswaittimemin_shift) | > -+ (vdd->vp_rt_data.vstepmin_stepmin << > -+ vp->vp_common->vstepmin_stepmin_shift)); > -+ vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin); > -+ > -+ vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << > -+ vp->vp_common->vstepmax_smpswaittimemax_shift) | > -+ (vdd->vp_rt_data.vstepmax_stepmax << > -+ vp->vp_common->vstepmax_stepmax_shift)); > -+ vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax); > -+ > -+ vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << > -+ vp->vp_common->vlimitto_vddmax_shift) | > -+ (vdd->vp_rt_data.vlimitto_vddmin << > -+ vp->vp_common->vlimitto_vddmin_shift) | > -+ (vdd->vp_rt_data.vlimitto_timeout << > -+ vp->vp_common->vlimitto_timeout_shift)); > -+ vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto); > -+ > -+ vp_debugfs_init(voltdm); > -+} > -+ > -+/* VP force update method of voltage scaling */ > -+int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt) > -+{ > -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ u32 vpconfig; > -+ u8 target_vsel, current_vsel; > -+ int ret, timeout = 0; > -+ > -+ ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, > ¤t_vsel); > -+ if (ret) > -+ return ret; > -+ > -+ /* > -+ * Clear all pending TransactionDone interrupt/status. Typical latency > -+ * is <3us > -+ */ > -+ while (timeout++ < VP_TRANXDONE_TIMEOUT) { > -+ vdd->write_reg(vp->prm_irqst_data->tranxdone_status, > -+ vdd->prm_irqst_mod, vdd->prm_irqst_reg); > -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd- > >prm_irqst_reg) & > -+ vp->prm_irqst_data->tranxdone_status)) > -+ break; > -+ udelay(1); > -+ } > -+ if (timeout >= VP_TRANXDONE_TIMEOUT) { > -+ pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." > -+ "Voltage change aborted", __func__, voltdm->name); > -+ return -ETIMEDOUT; > -+ } > -+ > -+ /* Configure for VP-Force Update */ > -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig &= ~(vp->vp_common->vpconfig_initvdd | > -+ vp->vp_common->vpconfig_forceupdate | > -+ vp->vp_common->vpconfig_initvoltage_mask); > -+ vpconfig |= ((target_vsel << > -+ vp->vp_common->vpconfig_initvoltage_shift)); > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ > -+ /* Trigger initVDD value copy to voltage processor */ > -+ vpconfig |= vp->vp_common->vpconfig_initvdd; > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ > -+ /* Force update of voltage */ > -+ vpconfig |= vp->vp_common->vpconfig_forceupdate; > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ > -+ /* > -+ * Wait for TransactionDone. Typical latency is <200us. > -+ * Depends on SMPSWAITTIMEMIN/MAX and voltage change > -+ */ > -+ timeout = 0; > -+ omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, > -+ vdd->prm_irqst_reg) & > -+ vp->prm_irqst_data->tranxdone_status), > -+ VP_TRANXDONE_TIMEOUT, timeout); > -+ if (timeout >= VP_TRANXDONE_TIMEOUT) > -+ pr_err("%s: vdd_%s TRANXDONE timeout exceeded." > -+ "TRANXDONE never got set after the voltage > update\n", > -+ __func__, voltdm->name); > -+ > -+ omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); > -+ > -+ /* > -+ * Disable TransactionDone interrupt , clear all status, clear > -+ * control registers > -+ */ > -+ timeout = 0; > -+ while (timeout++ < VP_TRANXDONE_TIMEOUT) { > -+ vdd->write_reg(vp->prm_irqst_data->tranxdone_status, > -+ vdd->prm_irqst_mod, vdd->prm_irqst_reg); > -+ if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd- > >prm_irqst_reg) & > -+ vp->prm_irqst_data->tranxdone_status)) > -+ break; > -+ udelay(1); > -+ } > -+ > -+ if (timeout >= VP_TRANXDONE_TIMEOUT) > -+ pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while > trying" > -+ "to clear the TRANXDONE status\n", > -+ __func__, voltdm->name); > -+ > -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ /* Clear initVDD copy trigger bit */ > -+ vpconfig &= ~vp->vp_common->vpconfig_initvdd; > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ /* Clear force bit */ > -+ vpconfig &= ~vp->vp_common->vpconfig_forceupdate; > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ > -+ return 0; > -+} > -+ > -+/** > -+ * omap_vp_get_curr_volt() - API to get the current vp voltage. > -+ * @voltdm: pointer to the VDD. > -+ * > -+ * This API returns the current voltage for the specified voltage processor > -+ */ > -+unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ struct omap_vdd_info *vdd; > -+ u8 curr_vsel; > -+ > -+ if (!voltdm || IS_ERR(voltdm)) { > -+ pr_warning("%s: VDD specified does not exist!\n", __func__); > -+ return 0; > -+ } > -+ > -+ vdd = voltdm->vdd; > -+ if (!vdd->read_reg) { > -+ pr_err("%s: No read API for reading vdd_%s regs\n", > -+ __func__, voltdm->name); > -+ return 0; > -+ } > -+ > -+ curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); > -+ > -+ if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { > -+ pr_warning("%s: PMIC function to convert vsel to voltage" > -+ "in uV not registerd\n", __func__); > -+ return 0; > -+ } > -+ > -+ return vdd->pmic_info->vsel_to_uv(curr_vsel); > -+} > -+ > -+/** > -+ * omap_vp_enable() - API to enable a particular VP > -+ * @voltdm: pointer to the VDD whose VP is to be enabled. > -+ * > -+ * This API enables a particular voltage processor. Needed by the smartreflex > -+ * class drivers. > -+ */ > -+void omap_vp_enable(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vp_instance_data *vp; > -+ struct omap_vdd_info *vdd; > -+ u32 vpconfig; > -+ > -+ if (!voltdm || IS_ERR(voltdm)) { > -+ pr_warning("%s: VDD specified does not exist!\n", __func__); > -+ return; > -+ } > -+ > -+ vdd = voltdm->vdd; > -+ vp = voltdm->vdd->vp_data; > -+ if (!vdd->read_reg || !vdd->write_reg) { > -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -+ __func__, voltdm->name); > -+ return; > -+ } > -+ > -+ /* If VP is already enabled, do nothing. Return */ > -+ if (vdd->vp_enabled) > -+ return; > -+ > -+ vp_latch_vsel(voltdm); > -+ > -+ /* Enable VP */ > -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig |= vp->vp_common->vpconfig_vpenable; > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ vdd->vp_enabled = true; > -+} > -+ > -+/** > -+ * omap_vp_disable() - API to disable a particular VP > -+ * @voltdm: pointer to the VDD whose VP is to be disabled. > -+ * > -+ * This API disables a particular voltage processor. Needed by the smartreflex > -+ * class drivers. > -+ */ > -+void omap_vp_disable(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vp_instance_data *vp; > -+ struct omap_vdd_info *vdd; > -+ u32 vpconfig; > -+ int timeout; > -+ > -+ if (!voltdm || IS_ERR(voltdm)) { > -+ pr_warning("%s: VDD specified does not exist!\n", __func__); > -+ return; > -+ } > -+ > -+ vdd = voltdm->vdd; > -+ vp = voltdm->vdd->vp_data; > -+ if (!vdd->read_reg || !vdd->write_reg) { > -+ pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -+ __func__, voltdm->name); > -+ return; > -+ } > -+ > -+ /* If VP is already disabled, do nothing. Return */ > -+ if (!vdd->vp_enabled) { > -+ pr_warning("%s: Trying to disable VP for vdd_%s when" > -+ "it is already disabled\n", __func__, voltdm->name); > -+ return; > -+ } > -+ > -+ /* Disable VP */ > -+ vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig &= ~vp->vp_common->vpconfig_vpenable; > -+ vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ > -+ /* > -+ * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us > -+ */ > -+ omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp- > >vstatus)), > -+ VP_IDLE_TIMEOUT, timeout); > -+ > -+ if (timeout >= VP_IDLE_TIMEOUT) > -+ pr_warning("%s: vdd_%s idle timedout\n", > -+ __func__, voltdm->name); > -+ > -+ vdd->vp_enabled = false; > -+ > -+ return; > -+} > -+ > -+/* Voltage debugfs support */ > -+static int vp_volt_debug_get(void *data, u64 *val) > -+{ > -+ struct voltagedomain *voltdm = (struct voltagedomain *)data; > -+ struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ u8 vsel; > -+ > -+ if (!vdd) { > -+ pr_warning("Wrong paramater passed\n"); > -+ return -EINVAL; > -+ } > -+ > -+ vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); > -+ > -+ if (!vdd->pmic_info->vsel_to_uv) { > -+ pr_warning("PMIC function to convert vsel to voltage" > -+ "in uV not registerd\n"); > -+ return -EINVAL; > -+ } > -+ > -+ *val = vdd->pmic_info->vsel_to_uv(vsel); > -+ return 0; > -+} > -+ > -+DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, > "%llu\n"); > -+ > -+static void __init vp_debugfs_init(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vdd_info *vdd = voltdm->vdd; > -+ struct dentry *debug_dir; > -+ > -+ debug_dir = debugfs_create_dir("vp", vdd->debug_dir); > -+ if (IS_ERR(debug_dir)) > -+ pr_err("%s: Unable to create VP debugfs dir dir\n", __func__); > -+ > -+ (void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir, > -+ &(vdd->vp_rt_data.vpconfig_errorgain)); > -+ (void) debugfs_create_x16("smpswaittimemin", S_IRUGO, > -+ debug_dir, > -+ &(vdd- > >vp_rt_data.vstepmin_smpswaittimemin)); > -+ (void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir, > -+ &(vdd->vp_rt_data.vstepmin_stepmin)); > -+ (void) debugfs_create_x16("smpswaittimemax", S_IRUGO, > -+ debug_dir, > -+ &(vdd- > >vp_rt_data.vstepmax_smpswaittimemax)); > -+ (void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir, > -+ &(vdd->vp_rt_data.vstepmax_stepmax)); > -+ (void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir, > -+ &(vdd->vp_rt_data.vlimitto_vddmax)); > -+ (void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir, > -+ &(vdd->vp_rt_data.vlimitto_vddmin)); > -+ (void) debugfs_create_x16("timeout", S_IRUGO, debug_dir, > -+ &(vdd->vp_rt_data.vlimitto_timeout)); > -+ (void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir, > -+ (void *) voltdm, &vp_volt_debug_fops); > -+} > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 5406b08..025cf16 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -19,6 +19,8 @@ > - > - #include <linux/kernel.h> > - > -+struct voltagedomain; > -+ > - /* XXX document */ > - #define VP_IDLE_TIMEOUT 200 > - #define VP_TRANXDONE_TIMEOUT 300 > -@@ -139,4 +141,11 @@ extern struct omap_vp_instance_data > omap4_vp_mpu_data; > - extern struct omap_vp_instance_data omap4_vp_iva_data; > - extern struct omap_vp_instance_data omap4_vp_core_data; > - > -+void omap_vp_init(struct voltagedomain *voltdm); > -+void omap_vp_enable(struct voltagedomain *voltdm); > -+void omap_vp_disable(struct voltagedomain *voltdm); > -+unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); > -+int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt); > -+ > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC- > support-PMICs-with-separate-voltage-and-com.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with- > separate-voltage-and-com.patch > deleted file mode 100644 > index 4f993c2..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC-support- > PMICs-with-separate-voltage-and-com.patch > +++ /dev/null > @@ -1,109 +0,0 @@ > -From 01afb0a843a221a9a32db601de7ebd529c49aa66 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 22 Mar 2011 14:12:37 -0700 > -Subject: [PATCH 113/149] OMAP2+: VC: support PMICs with separate voltage > and command registers > - > -The VC layer can support PMICs with separate voltage and command > -registers by putting the different registers in the PRM_VC_SMPS_VOL_RA > -and PRCM_VC_SMPS_CMD_RA registers respectively. > - > -The PMIC data must supply at least a voltage register address > -(volt_reg_addr). The command register address (cmd_reg_addr) is > -optional. If the PMIC data does not supply a separate command > -register address, the VC will use the voltage register address for both. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/omap_twl.c | 10 +++++----- > - arch/arm/mach-omap2/vc.c | 4 ++-- > - arch/arm/mach-omap2/voltage.h | 3 ++- > - 3 files changed, 9 insertions(+), 8 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index 760487b..3249fe3 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -158,7 +158,7 @@ static struct omap_volt_pmic_info > omap3_mpu_volt_info = { > - .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, > - .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, > -- .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG, > -+ .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, > - .vsel_to_uv = twl4030_vsel_to_uv, > - .uv_to_vsel = twl4030_uv_to_vsel, > - }; > -@@ -178,7 +178,7 @@ static struct omap_volt_pmic_info > omap3_core_volt_info = { > - .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, > - .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, > -- .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG, > -+ .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, > - .vsel_to_uv = twl4030_vsel_to_uv, > - .uv_to_vsel = twl4030_uv_to_vsel, > - }; > -@@ -198,7 +198,7 @@ static struct omap_volt_pmic_info > omap4_mpu_volt_info = { > - .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, > - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, > -- .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG, > -+ .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, > - .vsel_to_uv = twl6030_vsel_to_uv, > - .uv_to_vsel = twl6030_uv_to_vsel, > - }; > -@@ -218,7 +218,7 @@ static struct omap_volt_pmic_info > omap4_iva_volt_info = { > - .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, > - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, > -- .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG, > -+ .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, > - .vsel_to_uv = twl6030_vsel_to_uv, > - .uv_to_vsel = twl6030_uv_to_vsel, > - }; > -@@ -238,7 +238,7 @@ static struct omap_volt_pmic_info > omap4_core_volt_info = { > - .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, > - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, > -- .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG, > -+ .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, > - .vsel_to_uv = twl6030_vsel_to_uv, > - .uv_to_vsel = twl6030_uv_to_vsel, > - }; > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 7643940..720c0cd 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -106,7 +106,7 @@ int omap_vc_bypass_scale(struct voltagedomain > *voltdm, > - vc_valid = vc->common->valid; > - vc_bypass_val_reg = vc->common->bypass_val_reg; > - vc_bypass_value = (target_vsel << vc->common->data_shift) | > -- (vdd->pmic_info->pmic_reg << > -+ (vdd->pmic_info->volt_reg_addr << > - vc->common->regaddr_shift) | > - (vdd->pmic_info->i2c_slave_addr << > - vc->common->slaveaddr_shift); > -@@ -255,7 +255,7 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - vc_val = vdd->read_reg(vc->common->prm_mod, > - vc->common->smps_volra_reg); > - vc_val &= ~vc->smps_volra_mask; > -- vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; > -+ vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; > - vdd->write_reg(vc_val, vc->common->prm_mod, > - vc->common->smps_volra_reg); > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 83fa239..641597c 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -112,7 +112,8 @@ struct omap_volt_pmic_info { > - u8 vp_vddmax; > - u8 vp_timeout_us; > - u8 i2c_slave_addr; > -- u8 pmic_reg; > -+ u8 volt_reg_addr; > -+ u8 cmd_reg_addr; > - unsigned long (*vsel_to_uv) (const u8 vsel); > - u8 (*uv_to_vsel) (unsigned long uV); > - }; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0114-OMAP2-add- > PRM-VP-functions-for-checking-clearing-VP-.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking- > clearing-VP-.patch > deleted file mode 100644 > index c61dec1..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0114-OMAP2-add-PRM- > VP-functions-for-checking-clearing-VP-.patch > +++ /dev/null > @@ -1,375 +0,0 @@ > -From b2521ca2e2c0633cc9e50848aae9a0a761f687b6 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 28 Mar 2011 10:52:04 -0700 > -Subject: [PATCH 114/149] OMAP2+: add PRM VP functions for > checking/clearing VP TX done status > - > -Add SoC specific PRM VP helper functions for checking and clearing > -the VP transaction done status. > - > -Longer term, these events should be handled by the forthcoming PRCM > -interrupt handler. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/prm2xxx_3xxx.c | 41 > ++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/prm2xxx_3xxx.h | 4 +++ > - arch/arm/mach-omap2/prm44xx.c | 49 > ++++++++++++++++++++++++++++++++++++ > - arch/arm/mach-omap2/prm44xx.h | 4 +++ > - arch/arm/mach-omap2/vp.h | 33 ++++++++++++++--------- > - arch/arm/mach-omap2/vp3xxx_data.c | 19 ++++++------- > - arch/arm/mach-omap2/vp44xx_data.c | 25 ++++++----------- > - 7 files changed, 136 insertions(+), 39 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach- > omap2/prm2xxx_3xxx.c > -index 051213f..58c5c87 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.c > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c > -@@ -20,6 +20,8 @@ > - #include <plat/cpu.h> > - #include <plat/prcm.h> > - > -+#include "vp.h" > -+ > - #include "prm2xxx_3xxx.h" > - #include "cm2xxx_3xxx.h" > - #include "prm-regbits-24xx.h" > -@@ -156,3 +158,42 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, > u8 rst_shift, u8 st_shift) > - > - return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; > - } > -+ > -+/* PRM VP */ > -+ > -+/* > -+ * struct omap3_vp - OMAP3 VP register access description. > -+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > -+ */ > -+struct omap3_vp { > -+ u32 tranxdone_status; > -+}; > -+ > -+struct omap3_vp omap3_vp[] = { > -+ [OMAP3_VP_VDD_MPU_ID] = { > -+ .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, > -+ }, > -+ [OMAP3_VP_VDD_CORE_ID] = { > -+ .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, > -+ }, > -+}; > -+ > -+#define MAX_VP_ID ARRAY_SIZE(omap3_vp); > -+ > -+u32 omap3_prm_vp_check_txdone(u8 vp_id) > -+{ > -+ struct omap3_vp *vp = &omap3_vp[vp_id]; > -+ u32 irqstatus; > -+ > -+ irqstatus = omap2_prm_read_mod_reg(OCP_MOD, > -+ > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > -+ return irqstatus & vp->tranxdone_status; > -+} > -+ > -+void omap3_prm_vp_clear_txdone(u8 vp_id) > -+{ > -+ struct omap3_vp *vp = &omap3_vp[vp_id]; > -+ > -+ omap2_prm_write_mod_reg(vp->tranxdone_status, > -+ OCP_MOD, > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > -+} > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach- > omap2/prm2xxx_3xxx.h > -index a1fc62a..5112526 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h > -@@ -303,6 +303,10 @@ extern int omap2_prm_is_hardreset_asserted(s16 > prm_mod, u8 shift); > - extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); > - extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 > st_shift); > - > -+/* OMAP3-specific VP functions */ > -+u32 omap3_prm_vp_check_txdone(u8 vp_id); > -+void omap3_prm_vp_clear_txdone(u8 vp_id); > -+ > - #endif /* CONFIG_ARCH_OMAP4 */ > - #endif > - > -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach- > omap2/prm44xx.c > -index 0016555..390e32c 100644 > ---- a/arch/arm/mach-omap2/prm44xx.c > -+++ b/arch/arm/mach-omap2/prm44xx.c > -@@ -21,6 +21,7 @@ > - #include <plat/cpu.h> > - #include <plat/prcm.h> > - > -+#include "vp.h" > - #include "prm44xx.h" > - #include "prm-regbits-44xx.h" > - > -@@ -50,3 +51,51 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 > bits, s16 inst, s16 reg) > - > - return v; > - } > -+ > -+/* PRM VP */ > -+ > -+/* > -+ * struct omap4_vp - OMAP4 VP register access description. > -+ * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP > -+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > -+ */ > -+struct omap4_vp { > -+ u32 irqstatus_mpu; > -+ u32 tranxdone_status; > -+}; > -+ > -+static struct omap4_vp omap4_vp[] = { > -+ [OMAP4_VP_VDD_MPU_ID] = { > -+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, > -+ .tranxdone_status = > OMAP4430_VP_MPU_TRANXDONE_ST_MASK, > -+ }, > -+ [OMAP4_VP_VDD_IVA_ID] = { > -+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > -+ .tranxdone_status = > OMAP4430_VP_IVA_TRANXDONE_ST_MASK, > -+ }, > -+ [OMAP4_VP_VDD_CORE_ID] = { > -+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > -+ .tranxdone_status = > OMAP4430_VP_CORE_TRANXDONE_ST_MASK, > -+ }, > -+}; > -+ > -+u32 omap4_prm_vp_check_txdone(u8 vp_id) > -+{ > -+ struct omap4_vp *vp = &omap4_vp[vp_id]; > -+ u32 irqstatus; > -+ > -+ irqstatus = > omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > -+ > OMAP4430_PRM_OCP_SOCKET_INST, > -+ vp->irqstatus_mpu); > -+ return irqstatus & vp->tranxdone_status; > -+} > -+ > -+void omap4_prm_vp_clear_txdone(u8 vp_id) > -+{ > -+ struct omap4_vp *vp = &omap4_vp[vp_id]; > -+ > -+ omap4_prminst_write_inst_reg(vp->tranxdone_status, > -+ OMAP4430_PRM_PARTITION, > -+ OMAP4430_PRM_OCP_SOCKET_INST, > -+ vp->irqstatus_mpu); > -+}; > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index 7dfa379..b28c87d 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -751,6 +751,10 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 > idx); > - extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); > - extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 > idx); > - > -+/* OMAP4-specific VP functions */ > -+u32 omap4_prm_vp_check_txdone(u8 vp_id); > -+void omap4_prm_vp_clear_txdone(u8 vp_id); > -+ > - # endif > - > - #endif > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 025cf16..2c9cd76 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -21,10 +21,28 @@ > - > - struct voltagedomain; > - > -+/* > -+ * Voltage Processor (VP) identifiers > -+ */ > -+#define OMAP3_VP_VDD_MPU_ID 0 > -+#define OMAP3_VP_VDD_CORE_ID 1 > -+#define OMAP4_VP_VDD_CORE_ID 0 > -+#define OMAP4_VP_VDD_IVA_ID 1 > -+#define OMAP4_VP_VDD_MPU_ID 2 > -+ > - /* XXX document */ > - #define VP_IDLE_TIMEOUT 200 > - #define VP_TRANXDONE_TIMEOUT 300 > - > -+/** > -+ * struct omap_vp_ops - per-VP operations > -+ * @check_txdone: check for VP transaction done > -+ * @clear_txdone: clear VP transaction done status > -+ */ > -+struct omap_vp_ops { > -+ u32 (*check_txdone)(u8 vp_id); > -+ void (*clear_txdone)(u8 vp_id); > -+}; > - > - /** > - * struct omap_vp_common_data - register data common to all VDDs > -@@ -68,24 +86,13 @@ struct omap_vp_common_data { > - u8 vlimitto_vddmin_shift; > - u8 vlimitto_vddmax_shift; > - u8 vlimitto_timeout_shift; > --}; > - > --/** > -- * struct omap_vp_prm_irqst_data - > PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data > -- * @tranxdone_status: VP_TRANXDONE_ST bitmask in > PRM_IRQSTATUS_MPU reg > -- * > -- * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a > -- * hardware bug > -- * XXX This structure is probably not needed > -- */ > --struct omap_vp_prm_irqst_data { > -- u32 tranxdone_status; > -+ const struct omap_vp_ops *ops; > - }; > - > - /** > - * struct omap_vp_instance_data - VP register offsets (per-VDD) > - * @vp_common: pointer to struct omap_vp_common_data * for this SoC > -- * @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD > - * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start > - * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start > - * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start > -@@ -96,13 +103,13 @@ struct omap_vp_prm_irqst_data { > - */ > - struct omap_vp_instance_data { > - const struct omap_vp_common_data *vp_common; > -- const struct omap_vp_prm_irqst_data *prm_irqst_data; > - u8 vpconfig; > - u8 vstepmin; > - u8 vstepmax; > - u8 vlimitto; > - u8 vstatus; > - u8 voltage; > -+ u8 id; > - }; > - > - /** > -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach- > omap2/vp3xxx_data.c > -index a8ea045..0372c1a 100644 > ---- a/arch/arm/mach-omap2/vp3xxx_data.c > -+++ b/arch/arm/mach-omap2/vp3xxx_data.c > -@@ -25,6 +25,12 @@ > - #include "voltage.h" > - > - #include "vp.h" > -+#include "prm2xxx_3xxx.h" > -+ > -+static const struct omap_vp_ops omap3_vp_ops = { > -+ .check_txdone = omap3_prm_vp_check_txdone, > -+ .clear_txdone = omap3_prm_vp_clear_txdone, > -+}; > - > - /* > - * VP data common to 34xx/36xx chips > -@@ -48,13 +54,11 @@ static const struct omap_vp_common_data > omap3_vp_common = { > - .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, > - .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, > - .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, > --}; > -- > --static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { > -- .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, > -+ .ops = &omap3_vp_ops, > - }; > - > - struct omap_vp_instance_data omap3_vp1_data = { > -+ .id = OMAP3_VP_VDD_MPU_ID, > - .vp_common = &omap3_vp_common, > - .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, > - .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, > -@@ -62,14 +66,10 @@ struct omap_vp_instance_data omap3_vp1_data = { > - .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET, > - .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET, > - .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, > -- .prm_irqst_data = &omap3_vp1_prm_irqst_data, > --}; > -- > --static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { > -- .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, > - }; > - > - struct omap_vp_instance_data omap3_vp2_data = { > -+ .id = OMAP3_VP_VDD_CORE_ID, > - .vp_common = &omap3_vp_common, > - .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, > - .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, > -@@ -77,5 +77,4 @@ struct omap_vp_instance_data omap3_vp2_data = { > - .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET, > - .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET, > - .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET, > -- .prm_irqst_data = &omap3_vp2_prm_irqst_data, > - }; > -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach- > omap2/vp44xx_data.c > -index 0957c24..738ba04 100644 > ---- a/arch/arm/mach-omap2/vp44xx_data.c > -+++ b/arch/arm/mach-omap2/vp44xx_data.c > -@@ -27,6 +27,11 @@ > - > - #include "vp.h" > - > -+static const struct omap_vp_ops omap4_vp_ops = { > -+ .check_txdone = omap4_prm_vp_check_txdone, > -+ .clear_txdone = omap4_prm_vp_clear_txdone, > -+}; > -+ > - /* > - * VP data common to 44xx chips > - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. > -@@ -49,13 +54,11 @@ static const struct omap_vp_common_data > omap4_vp_common = { > - .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, > - .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, > - .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, > --}; > -- > --static const struct omap_vp_prm_irqst_data > omap4_vp_mpu_prm_irqst_data = { > -- .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, > -+ .ops = &omap4_vp_ops, > - }; > - > - struct omap_vp_instance_data omap4_vp_mpu_data = { > -+ .id = OMAP4_VP_VDD_MPU_ID, > - .vp_common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, > -@@ -63,14 +66,10 @@ struct omap_vp_instance_data omap4_vp_mpu_data > = { > - .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET, > - .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET, > - .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, > -- .prm_irqst_data = &omap4_vp_mpu_prm_irqst_data, > --}; > -- > --static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data > = { > -- .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, > - }; > - > - struct omap_vp_instance_data omap4_vp_iva_data = { > -+ .id = OMAP4_VP_VDD_IVA_ID, > - .vp_common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, > -@@ -78,14 +77,10 @@ struct omap_vp_instance_data omap4_vp_iva_data = > { > - .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET, > - .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET, > - .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, > -- .prm_irqst_data = &omap4_vp_iva_prm_irqst_data, > --}; > -- > --static const struct omap_vp_prm_irqst_data > omap4_vp_core_prm_irqst_data = { > -- .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, > - }; > - > - struct omap_vp_instance_data omap4_vp_core_data = { > -+ .id = OMAP4_VP_VDD_CORE_ID, > - .vp_common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, > -@@ -93,6 +88,4 @@ struct omap_vp_instance_data omap4_vp_core_data = > { > - .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET, > - .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET, > - .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET, > -- .prm_irqst_data = &omap4_vp_core_prm_irqst_data, > - }; > -- > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0115-OMAP3-VP- > replace-transaction-done-check-clear-with-V.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear- > with-V.patch > deleted file mode 100644 > index 64851b3..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0115-OMAP3-VP-replace- > transaction-done-check-clear-with-V.patch > +++ /dev/null > @@ -1,142 +0,0 @@ > -From 754129bd8c94999c27162faf84abb5df24b79c9b Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 28 Mar 2011 11:57:18 -0700 > -Subject: [PATCH 115/149] OMAP3+ VP: replace transaction done check/clear > with VP ops > - > -Replace the VP tranxdone check/clear with helper functions from the > -PRM layer. > - > -In the process, remove prm_irqst_* voltage structure fields for IRQ > -status checking which are no longer needed. > - > -Since these reads/writes of the IRQ status bits were the only PRM > -accesses that were not to VC/VP registers, this allows the rest of the > -register accesses in the VC/VP code to use VC/VP specific register > -access functions (done in the following patch.) > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.h | 3 --- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 4 ---- > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 6 ------ > - arch/arm/mach-omap2/vp.c | 16 +++++----------- > - 4 files changed, 5 insertions(+), 24 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 641597c..363eee4 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -131,7 +131,6 @@ struct omap_volt_pmic_info { > - * @vfsm : voltage manager FSM data > - * @debug_dir : debug directory for this voltage domain. > - * @curr_volt : current voltage for this vdd. > -- * @prm_irqst_mod : PRM module id used for PRM IRQ status register > access > - * @vp_enabled : flag to keep track of whether vp is enabled or > not > - * @volt_scale : API to scale the voltage of the vdd. > - */ > -@@ -145,8 +144,6 @@ struct omap_vdd_info { > - u32 curr_volt; > - bool vp_enabled; > - > -- s16 prm_irqst_mod; > -- u8 prm_irqst_reg; > - u32 (*read_reg) (u16 mod, u8 offset); > - void (*write_reg) (u32 val, u16 mod, u8 offset); > - int (*volt_scale) (struct voltagedomain *voltdm, > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index 7cb27ec..ad8f05b 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -38,8 +38,6 @@ static const struct omap_vfsm_instance_data > omap3_vdd1_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap3_vdd1_info = { > -- .prm_irqst_mod = OCP_MOD, > -- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap3_vp1_data, > - .vfsm = &omap3_vdd1_vfsm_data, > - }; > -@@ -51,8 +49,6 @@ static const struct omap_vfsm_instance_data > omap3_vdd2_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap3_vdd2_info = { > -- .prm_irqst_mod = OCP_MOD, > -- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap3_vp2_data, > - .vfsm = &omap3_vdd2_vfsm_data, > - }; > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index a05d90a..43e1d38 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -37,8 +37,6 @@ static const struct omap_vfsm_instance_data > omap4_vdd_mpu_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap4_vdd_mpu_info = { > -- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, > - .vp_data = &omap4_vp_mpu_data, > - .vfsm = &omap4_vdd_mpu_vfsm_data, > - }; > -@@ -48,8 +46,6 @@ static const struct omap_vfsm_instance_data > omap4_vdd_iva_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap4_vdd_iva_info = { > -- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap4_vp_iva_data, > - .vfsm = &omap4_vdd_iva_vfsm_data, > - }; > -@@ -59,8 +55,6 @@ static const struct omap_vfsm_instance_data > omap4_vdd_core_vfsm_data = { > - }; > - > - static struct omap_vdd_info omap4_vdd_core_info = { > -- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, > -- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, > - .vp_data = &omap4_vp_core_data, > - .vfsm = &omap4_vdd_core_vfsm_data, > - }; > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index f3503de..113c839 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -111,10 +111,8 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - * is <3us > - */ > - while (timeout++ < VP_TRANXDONE_TIMEOUT) { > -- vdd->write_reg(vp->prm_irqst_data->tranxdone_status, > -- vdd->prm_irqst_mod, vdd->prm_irqst_reg); > -- if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd- > >prm_irqst_reg) & > -- vp->prm_irqst_data->tranxdone_status)) > -+ vp->vp_common->ops->clear_txdone(vp->id); > -+ if (!vp->vp_common->ops->check_txdone(vp->id)) > - break; > - udelay(1); > - } > -@@ -146,9 +144,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - * Depends on SMPSWAITTIMEMIN/MAX and voltage change > - */ > - timeout = 0; > -- omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, > -- vdd->prm_irqst_reg) & > -- vp->prm_irqst_data->tranxdone_status), > -+ omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id), > - VP_TRANXDONE_TIMEOUT, timeout); > - if (timeout >= VP_TRANXDONE_TIMEOUT) > - pr_err("%s: vdd_%s TRANXDONE timeout exceeded." > -@@ -163,10 +159,8 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - */ > - timeout = 0; > - while (timeout++ < VP_TRANXDONE_TIMEOUT) { > -- vdd->write_reg(vp->prm_irqst_data->tranxdone_status, > -- vdd->prm_irqst_mod, vdd->prm_irqst_reg); > -- if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd- > >prm_irqst_reg) & > -- vp->prm_irqst_data->tranxdone_status)) > -+ vp->vp_common->ops->clear_txdone(vp->id); > -+ if (!vp->vp_common->ops->check_txdone(vp->id)) > - break; > - udelay(1); > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0116-OMAP2-PRM- > add-register-access-functions-for-VC-VP.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC- > VP.patch > deleted file mode 100644 > index fbb27a2..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0116-OMAP2-PRM-add- > register-access-functions-for-VC-VP.patch > +++ /dev/null > @@ -1,119 +0,0 @@ > -From 3326bc8057e4dd85f135faa00a3d079fab05ac1e Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 28 Mar 2011 10:25:12 -0700 > -Subject: [PATCH 116/149] OMAP2+: PRM: add register access functions for > VC/VP > - > -On OMAP3+, the voltage controller (VC) and voltage processor (VP) are > -inside the PRM. Add some PRM helper functions for register access to > -these module registers. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/prm2xxx_3xxx.c | 15 +++++++++++++++ > - arch/arm/mach-omap2/prm2xxx_3xxx.h | 8 ++++++++ > - arch/arm/mach-omap2/prm44xx.c | 22 ++++++++++++++++++++++ > - arch/arm/mach-omap2/prm44xx.h | 8 ++++++++ > - 4 files changed, 53 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach- > omap2/prm2xxx_3xxx.c > -index 58c5c87..3b83763 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.c > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c > -@@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id) > - omap2_prm_write_mod_reg(vp->tranxdone_status, > - OCP_MOD, > OMAP3_PRM_IRQSTATUS_MPU_OFFSET); > - } > -+ > -+u32 omap3_prm_vcvp_read(u8 offset) > -+{ > -+ return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); > -+} > -+ > -+void omap3_prm_vcvp_write(u32 val, u8 offset) > -+{ > -+ omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); > -+} > -+ > -+u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) > -+{ > -+ return omap2_prm_rmw_mod_reg_bits(mask, bits, > OMAP3430_GR_MOD, offset); > -+} > -diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach- > omap2/prm2xxx_3xxx.h > -index 5112526..cef533d 100644 > ---- a/arch/arm/mach-omap2/prm2xxx_3xxx.h > -+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h > -@@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 > prm_mod, u8 rst_shift, u8 st_shift); > - u32 omap3_prm_vp_check_txdone(u8 vp_id); > - void omap3_prm_vp_clear_txdone(u8 vp_id); > - > -+/* > -+ * OMAP3 access functions for voltage controller (VC) and > -+ * voltage proccessor (VP) in the PRM. > -+ */ > -+extern u32 omap3_prm_vcvp_read(u8 offset); > -+extern void omap3_prm_vcvp_write(u32 val, u8 offset); > -+extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); > - #endif /* CONFIG_ARCH_OMAP4 */ > -+ > - #endif > - > - /* > -diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach- > omap2/prm44xx.c > -index 390e32c..495a31a 100644 > ---- a/arch/arm/mach-omap2/prm44xx.c > -+++ b/arch/arm/mach-omap2/prm44xx.c > -@@ -24,6 +24,8 @@ > - #include "vp.h" > - #include "prm44xx.h" > - #include "prm-regbits-44xx.h" > -+#include "prcm44xx.h" > -+#include "prminst44xx.h" > - > - /* PRM low-level functions */ > - > -@@ -99,3 +101,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id) > - OMAP4430_PRM_OCP_SOCKET_INST, > - vp->irqstatus_mpu); > - }; > -+ > -+u32 omap4_prm_vcvp_read(u8 offset) > -+{ > -+ return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > -+ OMAP4430_PRM_DEVICE_INST, > offset); > -+} > -+ > -+void omap4_prm_vcvp_write(u32 val, u8 offset) > -+{ > -+ omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, > -+ OMAP4430_PRM_DEVICE_INST, offset); > -+} > -+ > -+u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) > -+{ > -+ return omap4_prminst_rmw_inst_reg_bits(mask, bits, > -+ OMAP4430_PRM_PARTITION, > -+ OMAP4430_PRM_DEVICE_INST, > -+ offset); > -+} > -diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach- > omap2/prm44xx.h > -index b28c87d..3d66ccd 100644 > ---- a/arch/arm/mach-omap2/prm44xx.h > -+++ b/arch/arm/mach-omap2/prm44xx.h > -@@ -755,6 +755,14 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 > mask, u32 bits, s16 inst, s16 idx); > - u32 omap4_prm_vp_check_txdone(u8 vp_id); > - void omap4_prm_vp_clear_txdone(u8 vp_id); > - > -+/* > -+ * OMAP4 access functions for voltage controller (VC) and > -+ * voltage proccessor (VP) in the PRM. > -+ */ > -+extern u32 omap4_prm_vcvp_read(u8 offset); > -+extern void omap4_prm_vcvp_write(u32 val, u8 offset); > -+extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); > -+ > - # endif > - > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3- > voltage-convert-to-PRM-register-access-functio.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM- > register-access-functio.patch > deleted file mode 100644 > index 3f7823e..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3-voltage- > convert-to-PRM-register-access-functio.patch > +++ /dev/null > @@ -1,627 +0,0 @@ > -From 794143b8e468ddd8715ae76a6a0f7f0c9bc6778d Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 28 Mar 2011 10:40:15 -0700 > -Subject: [PATCH 117/149] OMAP3+: voltage: convert to PRM register access > functions > - > -Convert VC/VP register access to use PRM VC/VP accessor functions. In > -the process, move the read/write function pointers from vdd_info into > -struct voltagedomain. > - > -No functional changes. > - > -Additional cleanup: > -- remove prm_mod field from VC/VP data structures, the PRM register > - access functions know which PRM module to use. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 69 ++++++++++--------------- > - arch/arm/mach-omap2/vc.h | 2 - > - arch/arm/mach-omap2/vc3xxx_data.c | 1 - > - arch/arm/mach-omap2/vc44xx_data.c | 1 - > - arch/arm/mach-omap2/voltage.c | 31 +----------- > - arch/arm/mach-omap2/voltage.h | 7 ++- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 6 ++ > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 9 +++ > - arch/arm/mach-omap2/vp.c | 57 ++++++++++---------- > - arch/arm/mach-omap2/vp.h | 2 - > - arch/arm/mach-omap2/vp3xxx_data.c | 1 - > - arch/arm/mach-omap2/vp44xx_data.c | 1 - > - 12 files changed, 76 insertions(+), 111 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 720c0cd..9c2706c 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -37,7 +37,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, > - return -ENODATA; > - } > - > -- if (!vdd->read_reg || !vdd->write_reg) { > -+ if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > - return -EINVAL; > -@@ -49,24 +49,22 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - volt_data = NULL; > - > - *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); > -- *current_vsel = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, vdd->vp_data->voltage); > -+ *current_vsel = voltdm->read(vdd->vp_data->voltage); > - > - /* Setting the ON voltage to the new target voltage */ > -- vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc- > >cmdval_reg); > -+ vc_cmdval = voltdm->read(vc->cmdval_reg); > - vc_cmdval &= ~vc->common->cmd_on_mask; > - vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); > -- vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc- > >cmdval_reg); > -+ voltdm->write(vc_cmdval, vc->cmdval_reg); > - > - /* Setting vp errorgain based on the voltage */ > - if (volt_data) { > -- vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common- > >prm_mod, > -- vdd->vp_data->vpconfig); > -+ vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); > - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; > - vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; > - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << > - vp_common->vpconfig_errorgain_shift; > -- vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common- > >prm_mod, > -- vdd->vp_data->vpconfig); > -+ voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); > - } > - > - return 0; > -@@ -111,11 +109,10 @@ int omap_vc_bypass_scale(struct voltagedomain > *voltdm, > - (vdd->pmic_info->i2c_slave_addr << > - vc->common->slaveaddr_shift); > - > -- vdd->write_reg(vc_bypass_value, vc->common->prm_mod, > vc_bypass_val_reg); > -- vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod, > -- vc_bypass_val_reg); > -+ voltdm->write(vc_bypass_value, vc_bypass_val_reg); > -+ voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); > - > -- vc_bypass_value = vdd->read_reg(vc->common->prm_mod, > vc_bypass_val_reg); > -+ vc_bypass_value = voltdm->read(vc_bypass_val_reg); > - /* > - * Loop till the bypass command is acknowledged from the SMPS. > - * NOTE: This is legacy code. The loop count and retry count needs > -@@ -134,8 +131,7 @@ int omap_vc_bypass_scale(struct voltagedomain > *voltdm, > - loop_cnt = 0; > - udelay(10); > - } > -- vc_bypass_value = vdd->read_reg(vc->common->prm_mod, > -- vc_bypass_val_reg); > -+ vc_bypass_value = voltdm->read(vc_bypass_val_reg); > - } > - > - omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); > -@@ -144,18 +140,13 @@ int omap_vc_bypass_scale(struct voltagedomain > *voltdm, > - > - static void __init omap3_vfsm_init(struct voltagedomain *voltdm) > - { > -- struct omap_vc_channel *vc = voltdm->vc; > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- > - /* > - * Voltage Manager FSM parameters init > - * XXX This data should be passed in from the board file > - */ > -- vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, > OMAP3_PRM_CLKSETUP_OFFSET); > -- vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod, > -- OMAP3_PRM_VOLTOFFSET_OFFSET); > -- vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod, > -- OMAP3_PRM_VOLTSETUP2_OFFSET); > -+ voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET); > -+ voltdm->write(OMAP3_VOLTOFFSET, > OMAP3_PRM_VOLTOFFSET_OFFSET); > -+ voltdm->write(OMAP3_VOLTSETUP2, > OMAP3_PRM_VOLTSETUP2_OFFSET); > - } > - > - static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) > -@@ -178,16 +169,16 @@ static void __init omap3_vc_init_channel(struct > voltagedomain *voltdm) > - (onlp_vsel << vc->common->cmd_onlp_shift) | > - (ret_vsel << vc->common->cmd_ret_shift) | > - (off_vsel << vc->common->cmd_off_shift)); > -- vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg); > -+ voltdm->write(vc_val, vc->cmdval_reg); > - > - /* > - * Generic VC parameters init > - * XXX This data should be abstracted out > - */ > -- vdd->write_reg(OMAP3430_CMD1_MASK | > OMAP3430_RAV1_MASK, vc->common->prm_mod, > -- OMAP3_PRM_VC_CH_CONF_OFFSET); > -- vdd->write_reg(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, vc->common->prm_mod, > -- OMAP3_PRM_VC_I2C_CFG_OFFSET); > -+ voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, > -+ OMAP3_PRM_VC_CH_CONF_OFFSET); > -+ voltdm->write(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, > -+ OMAP3_PRM_VC_I2C_CFG_OFFSET); > - > - omap3_vfsm_init(voltdm); > - > -@@ -198,8 +189,6 @@ static void __init omap3_vc_init_channel(struct > voltagedomain *voltdm) > - /* OMAP4 specific voltage init functions */ > - static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) > - { > -- struct omap_vc_channel *vc = voltdm->vc; > -- struct omap_vdd_info *vdd = voltdm->vdd; > - static bool is_initialized; > - u32 vc_val; > - > -@@ -215,11 +204,11 @@ static void __init omap4_vc_init_channel(struct > voltagedomain *voltdm) > - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | > OMAP4430_CMD_VDD_MPU_L_MASK | > - OMAP4430_RAV_VDD_IVA_L_MASK | > OMAP4430_CMD_VDD_IVA_L_MASK | > - OMAP4430_RAV_VDD_CORE_L_MASK | > OMAP4430_CMD_VDD_CORE_L_MASK); > -- vdd->write_reg(vc_val, vc->common->prm_mod, > OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > -+ voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > - > - /* XXX These are magic numbers and do not belong! */ > - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << > OMAP4430_SCLH_SHIFT); > -- vdd->write_reg(vc_val, vc->common->prm_mod, > OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > -+ voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > - > - is_initialized = true; > - } > -@@ -237,34 +226,30 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - return; > - } > - > -- if (!vdd->read_reg || !vdd->write_reg) { > -+ if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > - return; > - } > - > - /* Set up the SMPS_SA(i2c slave address in VC */ > -- vc_val = vdd->read_reg(vc->common->prm_mod, > -- vc->common->smps_sa_reg); > -+ vc_val = voltdm->read(vc->common->smps_sa_reg); > - vc_val &= ~vc->smps_sa_mask; > - vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; > -- vdd->write_reg(vc_val, vc->common->prm_mod, > -- vc->common->smps_sa_reg); > -+ voltdm->write(vc_val, vc->common->smps_sa_reg); > - > - /* Setup the VOLRA(pmic reg addr) in VC */ > -- vc_val = vdd->read_reg(vc->common->prm_mod, > -- vc->common->smps_volra_reg); > -+ vc_val = voltdm->read(vc->common->smps_volra_reg); > - vc_val &= ~vc->smps_volra_mask; > - vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; > -- vdd->write_reg(vc_val, vc->common->prm_mod, > -- vc->common->smps_volra_reg); > -+ voltdm->write(vc_val, vc->common->smps_volra_reg); > - > - /* Configure the setup times */ > -- vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm- > >voltsetup_reg); > -+ vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); > - vc_val &= ~vdd->vfsm->voltsetup_mask; > - vc_val |= vdd->pmic_info->volt_setup_time << > - vdd->vfsm->voltsetup_shift; > -- vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm- > >voltsetup_reg); > -+ voltdm->write(vc_val, vdd->vfsm->voltsetup_reg); > - > - if (cpu_is_omap34xx()) > - omap3_vc_init_channel(voltdm); > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index 51d36a8..d0050f0 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -25,7 +25,6 @@ struct voltagedomain; > - * struct omap_vc_common - per-VC register/bitfield data > - * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register > - * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register > -- * @prm_mod: PRM module id used for PRM register access > - * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start > - * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start > - * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start > -@@ -43,7 +42,6 @@ struct voltagedomain; > - struct omap_vc_common { > - u32 cmd_on_mask; > - u32 valid; > -- s16 prm_mod; > - u8 smps_sa_reg; > - u8 smps_volra_reg; > - u8 bypass_val_reg; > -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach- > omap2/vc3xxx_data.c > -index 1a17ed4..6b67203 100644 > ---- a/arch/arm/mach-omap2/vc3xxx_data.c > -+++ b/arch/arm/mach-omap2/vc3xxx_data.c > -@@ -30,7 +30,6 @@ > - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. > - */ > - static struct omap_vc_common omap3_vc_common = { > -- .prm_mod = OMAP3430_GR_MOD, > - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, > - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, > - .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, > -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach- > omap2/vc44xx_data.c > -index 56f3f4a..e3125a3 100644 > ---- a/arch/arm/mach-omap2/vc44xx_data.c > -+++ b/arch/arm/mach-omap2/vc44xx_data.c > -@@ -31,7 +31,6 @@ > - * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. > - */ > - static const struct omap_vc_common omap4_vc_common = { > -- .prm_mod = OMAP4430_PRM_DEVICE_INST, > - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, > - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, > - .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 9b9f019..9f9f014 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -46,27 +46,6 @@ static LIST_HEAD(voltdm_list); > - #define VOLTAGE_DIR_SIZE 16 > - static struct dentry *voltage_dir; > - > --static u32 omap3_voltage_read_reg(u16 mod, u8 offset) > --{ > -- return omap2_prm_read_mod_reg(mod, offset); > --} > -- > --static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset) > --{ > -- omap2_prm_write_mod_reg(val, mod, offset); > --} > -- > --static u32 omap4_voltage_read_reg(u16 mod, u8 offset) > --{ > -- return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, > -- mod, offset); > --} > -- > --static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset) > --{ > -- omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, > mod, offset); > --} > -- > - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) > - { > - char *sys_ck_name; > -@@ -183,15 +162,7 @@ static int __init omap_vdd_data_configure(struct > voltagedomain *voltdm) > - if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) > - goto ovdc_out; > - > -- if (cpu_is_omap34xx()) { > -- vdd->read_reg = omap3_voltage_read_reg; > -- vdd->write_reg = omap3_voltage_write_reg; > -- ret = 0; > -- } else if (cpu_is_omap44xx()) { > -- vdd->read_reg = omap4_voltage_read_reg; > -- vdd->write_reg = omap4_voltage_write_reg; > -- ret = 0; > -- } > -+ ret = 0; > - > - ovdc_out: > - return ret; > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 363eee4..f4198aa 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -68,6 +68,11 @@ struct voltagedomain { > - struct list_head pwrdm_list; > - struct omap_vc_channel *vc; > - > -+ /* VC/VP register access functions: SoC specific */ > -+ u32 (*read) (u8 offset); > -+ void (*write) (u32 val, u8 offset); > -+ u32 (*rmw)(u32 mask, u32 bits, u8 offset); > -+ > - struct omap_vdd_info *vdd; > - }; > - > -@@ -144,8 +149,6 @@ struct omap_vdd_info { > - u32 curr_volt; > - bool vp_enabled; > - > -- u32 (*read_reg) (u16 mod, u8 offset); > -- void (*write_reg) (u32 val, u16 mod, u8 offset); > - int (*volt_scale) (struct voltagedomain *voltdm, > - unsigned long target_volt); > - }; > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index ad8f05b..1d66749 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -56,6 +56,9 @@ static struct omap_vdd_info omap3_vdd2_info = { > - static struct voltagedomain omap3_voltdm_mpu = { > - .name = "mpu_iva", > - .scalable = true, > -+ .read = omap3_prm_vcvp_read, > -+ .write = omap3_prm_vcvp_write, > -+ .rmw = omap3_prm_vcvp_rmw, > - .vc = &omap3_vc_mpu, > - .vdd = &omap3_vdd1_info, > - }; > -@@ -63,6 +66,9 @@ static struct voltagedomain omap3_voltdm_mpu = { > - static struct voltagedomain omap3_voltdm_core = { > - .name = "core", > - .scalable = true, > -+ .read = omap3_prm_vcvp_read, > -+ .write = omap3_prm_vcvp_write, > -+ .rmw = omap3_prm_vcvp_rmw, > - .vc = &omap3_vc_core, > - .vdd = &omap3_vdd2_info, > - }; > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index 43e1d38..e435795 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -62,6 +62,9 @@ static struct omap_vdd_info omap4_vdd_core_info = { > - static struct voltagedomain omap4_voltdm_mpu = { > - .name = "mpu", > - .scalable = true, > -+ .read = omap4_prm_vcvp_read, > -+ .write = omap4_prm_vcvp_write, > -+ .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_mpu, > - .vdd = &omap4_vdd_mpu_info, > - }; > -@@ -69,6 +72,9 @@ static struct voltagedomain omap4_voltdm_mpu = { > - static struct voltagedomain omap4_voltdm_iva = { > - .name = "iva", > - .scalable = true, > -+ .read = omap4_prm_vcvp_read, > -+ .write = omap4_prm_vcvp_write, > -+ .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_iva, > - .vdd = &omap4_vdd_iva_info, > - }; > -@@ -76,6 +82,9 @@ static struct voltagedomain omap4_voltdm_iva = { > - static struct voltagedomain omap4_voltdm_core = { > - .name = "core", > - .scalable = true, > -+ .read = omap4_prm_vcvp_read, > -+ .write = omap4_prm_vcvp_write, > -+ .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_core, > - .vdd = &omap4_vdd_core_info, > - }; > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index 113c839..88ac742 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -35,19 +35,19 @@ static void vp_latch_vsel(struct voltagedomain > *voltdm) > - > - vsel = vdd->pmic_info->uv_to_vsel(uvdc); > - > -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig = voltdm->read(vp->vpconfig); > - vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | > - vp->vp_common->vpconfig_initvdd); > - vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; > - > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - > - /* Trigger initVDD value copy to voltage processor */ > -- vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd), > -- vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd), > -+ vp->vpconfig); > - > - /* Clear initVDD copy trigger bit */ > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - } > - > - /* Generic voltage init functions */ > -@@ -57,7 +57,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) > - struct omap_vdd_info *vdd = voltdm->vdd; > - u32 vp_val; > - > -- if (!vdd->read_reg || !vdd->write_reg) { > -+ if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > - return; > -@@ -67,19 +67,19 @@ void __init omap_vp_init(struct voltagedomain > *voltdm) > - (vdd->vp_rt_data.vpconfig_errorgain << > - vp->vp_common->vpconfig_errorgain_shift) | > - vp->vp_common->vpconfig_timeouten; > -- vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vp_val, vp->vpconfig); > - > - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << > - vp->vp_common->vstepmin_smpswaittimemin_shift) | > - (vdd->vp_rt_data.vstepmin_stepmin << > - vp->vp_common->vstepmin_stepmin_shift)); > -- vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin); > -+ voltdm->write(vp_val, vp->vstepmin); > - > - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << > - vp->vp_common->vstepmax_smpswaittimemax_shift) | > - (vdd->vp_rt_data.vstepmax_stepmax << > - vp->vp_common->vstepmax_stepmax_shift)); > -- vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax); > -+ voltdm->write(vp_val, vp->vstepmax); > - > - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << > - vp->vp_common->vlimitto_vddmax_shift) | > -@@ -87,7 +87,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) > - vp->vp_common->vlimitto_vddmin_shift) | > - (vdd->vp_rt_data.vlimitto_timeout << > - vp->vp_common->vlimitto_timeout_shift)); > -- vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto); > -+ voltdm->write(vp_val, vp->vlimitto); > - > - vp_debugfs_init(voltdm); > - } > -@@ -97,7 +97,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - unsigned long target_volt) > - { > - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -- struct omap_vdd_info *vdd = voltdm->vdd; > - u32 vpconfig; > - u8 target_vsel, current_vsel; > - int ret, timeout = 0; > -@@ -123,21 +122,21 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - } > - > - /* Configure for VP-Force Update */ > -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig = voltdm->read(vp->vpconfig); > - vpconfig &= ~(vp->vp_common->vpconfig_initvdd | > - vp->vp_common->vpconfig_forceupdate | > - vp->vp_common->vpconfig_initvoltage_mask); > - vpconfig |= ((target_vsel << > - vp->vp_common->vpconfig_initvoltage_shift)); > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - > - /* Trigger initVDD value copy to voltage processor */ > - vpconfig |= vp->vp_common->vpconfig_initvdd; > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - > - /* Force update of voltage */ > - vpconfig |= vp->vp_common->vpconfig_forceupdate; > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - > - /* > - * Wait for TransactionDone. Typical latency is <200us. > -@@ -170,13 +169,13 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - "to clear the TRANXDONE status\n", > - __func__, voltdm->name); > - > -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig = voltdm->read(vp->vpconfig); > - /* Clear initVDD copy trigger bit */ > - vpconfig &= ~vp->vp_common->vpconfig_initvdd; > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - /* Clear force bit */ > - vpconfig &= ~vp->vp_common->vpconfig_forceupdate; > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - > - return 0; > - } > -@@ -199,13 +198,13 @@ unsigned long omap_vp_get_curr_volt(struct > voltagedomain *voltdm) > - } > - > - vdd = voltdm->vdd; > -- if (!vdd->read_reg) { > -+ if (!voltdm->read) { > - pr_err("%s: No read API for reading vdd_%s regs\n", > - __func__, voltdm->name); > - return 0; > - } > - > -- curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); > -+ curr_vsel = voltdm->read(vp->voltage); > - > - if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { > - pr_warning("%s: PMIC function to convert vsel to voltage" > -@@ -236,7 +235,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) > - > - vdd = voltdm->vdd; > - vp = voltdm->vdd->vp_data; > -- if (!vdd->read_reg || !vdd->write_reg) { > -+ if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > - return; > -@@ -249,9 +248,9 @@ void omap_vp_enable(struct voltagedomain *voltdm) > - vp_latch_vsel(voltdm); > - > - /* Enable VP */ > -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig = voltdm->read(vp->vpconfig); > - vpconfig |= vp->vp_common->vpconfig_vpenable; > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - vdd->vp_enabled = true; > - } > - > -@@ -276,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) > - > - vdd = voltdm->vdd; > - vp = voltdm->vdd->vp_data; > -- if (!vdd->read_reg || !vdd->write_reg) { > -+ if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > - return; > -@@ -290,15 +289,15 @@ void omap_vp_disable(struct voltagedomain > *voltdm) > - } > - > - /* Disable VP */ > -- vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp- > >vpconfig); > -+ vpconfig = voltdm->read(vp->vpconfig); > - vpconfig &= ~vp->vp_common->vpconfig_vpenable; > -- vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); > -+ voltdm->write(vpconfig, vp->vpconfig); > - > - /* > - * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us > - */ > -- omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp- > >vstatus)), > -- VP_IDLE_TIMEOUT, timeout); > -+ omap_test_timeout((voltdm->read(vp->vstatus)), > -+ VP_IDLE_TIMEOUT, timeout); > - > - if (timeout >= VP_IDLE_TIMEOUT) > - pr_warning("%s: vdd_%s idle timedout\n", > -@@ -322,7 +321,7 @@ static int vp_volt_debug_get(void *data, u64 *val) > - return -EINVAL; > - } > - > -- vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); > -+ vsel = voltdm->read(vp->voltage); > - > - if (!vdd->pmic_info->vsel_to_uv) { > - pr_warning("PMIC function to convert vsel to voltage" > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 2c9cd76..79aa8d3 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -62,7 +62,6 @@ struct omap_vp_ops { > - * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in > PRM_VP*_VLIMITTO reg > - * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in > PRM_VP*_VLIMITTO reg > - * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in > PRM_VP*_VLIMITTO reg > -- * @prm_mod: PRM module id used for PRM register access > - * > - * XXX It it not necessary to have both a mask and a shift for the same > - * bitfield - remove one > -@@ -75,7 +74,6 @@ struct omap_vp_common_data { > - u32 vpconfig_initvdd; > - u32 vpconfig_forceupdate; > - u32 vpconfig_vpenable; > -- s16 prm_mod; > - u8 vpconfig_erroroffset_shift; > - u8 vpconfig_errorgain_shift; > - u8 vpconfig_initvoltage_shift; > -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach- > omap2/vp3xxx_data.c > -index 0372c1a..b01d333 100644 > ---- a/arch/arm/mach-omap2/vp3xxx_data.c > -+++ b/arch/arm/mach-omap2/vp3xxx_data.c > -@@ -37,7 +37,6 @@ static const struct omap_vp_ops omap3_vp_ops = { > - * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. > - */ > - static const struct omap_vp_common_data omap3_vp_common = { > -- .prm_mod = OMAP3430_GR_MOD, > - .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, > - .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, > - .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, > -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach- > omap2/vp44xx_data.c > -index 738ba04..9704c7b 100644 > ---- a/arch/arm/mach-omap2/vp44xx_data.c > -+++ b/arch/arm/mach-omap2/vp44xx_data.c > -@@ -37,7 +37,6 @@ static const struct omap_vp_ops omap4_vp_ops = { > - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. > - */ > - static const struct omap_vp_common_data omap4_vp_common = { > -- .prm_mod = OMAP4430_PRM_DEVICE_INST, > - .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, > - .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, > - .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0118-OMAP3-VC- > cleanup-i2c-slave-address-configuration.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address- > configuration.patch > deleted file mode 100644 > index a538b7b..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0118-OMAP3-VC-cleanup- > i2c-slave-address-configuration.patch > +++ /dev/null > @@ -1,145 +0,0 @@ > -From 8a87503677e21700900e300a8e319a8239d6591f Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 29 Mar 2011 14:02:36 -0700 > -Subject: [PATCH 118/149] OMAP3+: VC: cleanup i2c slave address > configuration > - > -- Add an i2c_slave_address field to the omap_vc_channel > -- use VC/VP read/modify/write helper instead of open-coding > -- remove smps_sa_shift, use __ffs(mask) for shift value > -- I2C addresses 10-bit, change size to u16 > - > -Special thanks to Shweta Gulati <shweta.gulati@ti.com> for suggesting > -the use of __ffs(x) instead of ffs(x) - 1. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 12 +++++++----- > - arch/arm/mach-omap2/vc.h | 8 +++++--- > - arch/arm/mach-omap2/vc3xxx_data.c | 2 -- > - arch/arm/mach-omap2/vc44xx_data.c | 3 --- > - arch/arm/mach-omap2/voltage.h | 2 +- > - 5 files changed, 13 insertions(+), 14 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 9c2706c..ca6165d 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -232,11 +232,13 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - return; > - } > - > -- /* Set up the SMPS_SA(i2c slave address in VC */ > -- vc_val = voltdm->read(vc->common->smps_sa_reg); > -- vc_val &= ~vc->smps_sa_mask; > -- vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; > -- voltdm->write(vc_val, vc->common->smps_sa_reg); > -+ /* get PMIC/board specific settings */ > -+ vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; > -+ > -+ /* Configure the i2c slave address for this VC */ > -+ voltdm->rmw(vc->smps_sa_mask, > -+ vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), > -+ vc->common->smps_sa_reg); > - > - /* Setup the VOLRA(pmic reg addr) in VC */ > - vc_val = voltdm->read(vc->common->smps_volra_reg); > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index d0050f0..165fc74 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -57,20 +57,22 @@ struct omap_vc_common { > - /** > - * struct omap_vc_channel - VC per-instance data > - * @common: pointer to VC common data for this platform > -- * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register > -+ * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA > register > - * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register > -- * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register > - * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register > - * > - * XXX It is not necessary to have both a *_mask and a *_shift - > - * remove one > - */ > - struct omap_vc_channel { > -+ /* channel state */ > -+ u16 i2c_slave_addr; > -+ > -+ /* register access data */ > - const struct omap_vc_common *common; > - u32 smps_sa_mask; > - u32 smps_volra_mask; > - u8 cmdval_reg; > -- u8 smps_sa_shift; > - u8 smps_volra_shift; > - }; > - > -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach- > omap2/vc3xxx_data.c > -index 6b67203..86be50c 100644 > ---- a/arch/arm/mach-omap2/vc3xxx_data.c > -+++ b/arch/arm/mach-omap2/vc3xxx_data.c > -@@ -47,7 +47,6 @@ static struct omap_vc_common omap3_vc_common = { > - struct omap_vc_channel omap3_vc_mpu = { > - .common = &omap3_vc_common, > - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, > -- .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, > - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, > - .smps_volra_shift = OMAP3430_VOLRA0_SHIFT, > - .smps_volra_mask = OMAP3430_VOLRA0_MASK, > -@@ -56,7 +55,6 @@ struct omap_vc_channel omap3_vc_mpu = { > - struct omap_vc_channel omap3_vc_core = { > - .common = &omap3_vc_common, > - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, > -- .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, > - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, > - .smps_volra_shift = OMAP3430_VOLRA1_SHIFT, > - .smps_volra_mask = OMAP3430_VOLRA1_MASK, > -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach- > omap2/vc44xx_data.c > -index e3125a3..af922b4 100644 > ---- a/arch/arm/mach-omap2/vc44xx_data.c > -+++ b/arch/arm/mach-omap2/vc44xx_data.c > -@@ -49,7 +49,6 @@ static const struct omap_vc_common > omap4_vc_common = { > - struct omap_vc_channel omap4_vc_mpu = { > - .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, > -- .smps_sa_shift = > OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT, > - .smps_sa_mask = > OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, > - .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, > -@@ -58,7 +57,6 @@ struct omap_vc_channel omap4_vc_mpu = { > - struct omap_vc_channel omap4_vc_iva = { > - .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, > -- .smps_sa_shift = > OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT, > - .smps_sa_mask = > OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, > - .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, > -@@ -67,7 +65,6 @@ struct omap_vc_channel omap4_vc_iva = { > - struct omap_vc_channel omap4_vc_core = { > - .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, > -- .smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT, > - .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, > - .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index f4198aa..639e85c 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -110,13 +110,13 @@ struct omap_volt_pmic_info { > - u32 ret_volt; > - u32 off_volt; > - u16 volt_setup_time; > -+ u16 i2c_slave_addr; > - u8 vp_erroroffset; > - u8 vp_vstepmin; > - u8 vp_vstepmax; > - u8 vp_vddmin; > - u8 vp_vddmax; > - u8 vp_timeout_us; > -- u8 i2c_slave_addr; > - u8 volt_reg_addr; > - u8 cmd_reg_addr; > - unsigned long (*vsel_to_uv) (const u8 vsel); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC- > cleanup-PMIC-register-address-configuration.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC- > register-address-configuration.patch > deleted file mode 100644 > index 0862023..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC-cleanup- > PMIC-register-address-configuration.patch > +++ /dev/null > @@ -1,185 +0,0 @@ > -From 3296114685831f06d5a73057464afbbed489dea4 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Thu, 9 Jun 2011 11:01:55 -0700 > -Subject: [PATCH 119/149] OMAP3+: VC: cleanup PMIC register address > configuration > - > -- support both voltage register address and command register address > - for each VC channel > -- add fields for voltage register address (volra) and command register > - address (cmdra) to struct omap_vc_channel > -- use VC/VP register access read/modify/write helper > -- remove volra_shift field (use __ffs(mask) for shift value) > -- I2C addresses 10-bit, change size to u16 > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 17 ++++++++++++----- > - arch/arm/mach-omap2/vc.h | 9 ++++----- > - arch/arm/mach-omap2/vc3xxx_data.c | 5 +++-- > - arch/arm/mach-omap2/vc44xx_data.c | 7 ++++--- > - arch/arm/mach-omap2/voltage.h | 4 ++-- > - 5 files changed, 25 insertions(+), 17 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index ca6165d..50b1f7c 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -234,17 +234,24 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - > - /* get PMIC/board specific settings */ > - vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; > -+ vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; > -+ vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; > - > - /* Configure the i2c slave address for this VC */ > - voltdm->rmw(vc->smps_sa_mask, > - vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), > - vc->common->smps_sa_reg); > - > -- /* Setup the VOLRA(pmic reg addr) in VC */ > -- vc_val = voltdm->read(vc->common->smps_volra_reg); > -- vc_val &= ~vc->smps_volra_mask; > -- vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; > -- voltdm->write(vc_val, vc->common->smps_volra_reg); > -+ /* > -+ * Configure the PMIC register addresses. > -+ */ > -+ voltdm->rmw(vc->smps_volra_mask, > -+ vc->volt_reg_addr << __ffs(vc->smps_volra_mask), > -+ vc->common->smps_volra_reg); > -+ if (vc->cmd_reg_addr) > -+ voltdm->rmw(vc->smps_cmdra_mask, > -+ vc->cmd_reg_addr << __ffs(vc- > >smps_cmdra_mask), > -+ vc->common->smps_cmdra_reg); > - > - /* Configure the setup times */ > - vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index 165fc74..f3b0551 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -44,6 +44,7 @@ struct omap_vc_common { > - u32 valid; > - u8 smps_sa_reg; > - u8 smps_volra_reg; > -+ u8 smps_cmdra_reg; > - u8 bypass_val_reg; > - u8 data_shift; > - u8 slaveaddr_shift; > -@@ -59,21 +60,19 @@ struct omap_vc_common { > - * @common: pointer to VC common data for this platform > - * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA > register > - * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register > -- * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register > -- * > -- * XXX It is not necessary to have both a *_mask and a *_shift - > -- * remove one > - */ > - struct omap_vc_channel { > - /* channel state */ > - u16 i2c_slave_addr; > -+ u16 volt_reg_addr; > -+ u16 cmd_reg_addr; > - > - /* register access data */ > - const struct omap_vc_common *common; > - u32 smps_sa_mask; > - u32 smps_volra_mask; > -+ u32 smps_cmdra_mask; > - u8 cmdval_reg; > -- u8 smps_volra_shift; > - }; > - > - extern struct omap_vc_channel omap3_vc_mpu; > -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach- > omap2/vc3xxx_data.c > -index 86be50c..df8bd5e 100644 > ---- a/arch/arm/mach-omap2/vc3xxx_data.c > -+++ b/arch/arm/mach-omap2/vc3xxx_data.c > -@@ -32,6 +32,7 @@ > - static struct omap_vc_common omap3_vc_common = { > - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, > - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, > -+ .smps_cmdra_reg = > OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, > - .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, > - .data_shift = OMAP3430_DATA_SHIFT, > - .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, > -@@ -48,14 +49,14 @@ struct omap_vc_channel omap3_vc_mpu = { > - .common = &omap3_vc_common, > - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, > - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, > -- .smps_volra_shift = OMAP3430_VOLRA0_SHIFT, > - .smps_volra_mask = OMAP3430_VOLRA0_MASK, > -+ .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, > - }; > - > - struct omap_vc_channel omap3_vc_core = { > - .common = &omap3_vc_common, > - .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, > - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, > -- .smps_volra_shift = OMAP3430_VOLRA1_SHIFT, > - .smps_volra_mask = OMAP3430_VOLRA1_MASK, > -+ .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, > - }; > -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach- > omap2/vc44xx_data.c > -index af922b4..5d104ff 100644 > ---- a/arch/arm/mach-omap2/vc44xx_data.c > -+++ b/arch/arm/mach-omap2/vc44xx_data.c > -@@ -33,6 +33,7 @@ > - static const struct omap_vc_common omap4_vc_common = { > - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, > - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, > -+ .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, > - .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, > - .data_shift = OMAP4430_DATA_SHIFT, > - .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT, > -@@ -50,23 +51,23 @@ struct omap_vc_channel omap4_vc_mpu = { > - .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, > - .smps_sa_mask = > OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, > -- .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, > -+ .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, > - }; > - > - struct omap_vc_channel omap4_vc_iva = { > - .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, > - .smps_sa_mask = > OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, > -- .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, > -+ .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, > - }; > - > - struct omap_vc_channel omap4_vc_core = { > - .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, > - .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, > -- .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, > -+ .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, > - }; > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 639e85c..3129d64 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -111,14 +111,14 @@ struct omap_volt_pmic_info { > - u32 off_volt; > - u16 volt_setup_time; > - u16 i2c_slave_addr; > -+ u16 volt_reg_addr; > -+ u16 cmd_reg_addr; > - u8 vp_erroroffset; > - u8 vp_vstepmin; > - u8 vp_vstepmax; > - u8 vp_vddmin; > - u8 vp_vddmax; > - u8 vp_timeout_us; > -- u8 volt_reg_addr; > -- u8 cmd_reg_addr; > - unsigned long (*vsel_to_uv) (const u8 vsel); > - u8 (*uv_to_vsel) (unsigned long uV); > - }; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0120-OMAP3-VC- > bypass-use-fields-from-VC-struct-instead-of.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct- > instead-of.patch > deleted file mode 100644 > index 37b7af0..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0120-OMAP3-VC-bypass- > use-fields-from-VC-struct-instead-of.patch > +++ /dev/null > @@ -1,42 +0,0 @@ > -From ebe24c52d0431437103277f4e378c3dad0bde3e9 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 29 Mar 2011 14:24:47 -0700 > -Subject: [PATCH 120/149] OMAP3+: VC bypass: use fields from VC struct > instead of PMIC info > - > -The PMIC configurable variables should be isolated to VC initialization. > -The rest of the VC functions (like VC bypass) should use the i2c slave address > -and voltage register address fields from struct omap_vc_channel. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 7 ++----- > - 1 files changed, 2 insertions(+), 5 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 50b1f7c..9e0dc8d 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -91,7 +91,6 @@ int omap_vc_bypass_scale(struct voltagedomain > *voltdm, > - unsigned long target_volt) > - { > - struct omap_vc_channel *vc = voltdm->vc; > -- struct omap_vdd_info *vdd = voltdm->vdd; > - u32 loop_cnt = 0, retries_cnt = 0; > - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; > - u8 target_vsel, current_vsel; > -@@ -104,10 +103,8 @@ int omap_vc_bypass_scale(struct voltagedomain > *voltdm, > - vc_valid = vc->common->valid; > - vc_bypass_val_reg = vc->common->bypass_val_reg; > - vc_bypass_value = (target_vsel << vc->common->data_shift) | > -- (vdd->pmic_info->volt_reg_addr << > -- vc->common->regaddr_shift) | > -- (vdd->pmic_info->i2c_slave_addr << > -- vc->common->slaveaddr_shift); > -+ (vc->volt_reg_addr << vc->common->regaddr_shift) | > -+ (vc->i2c_slave_addr << vc->common->slaveaddr_shift); > - > - voltdm->write(vc_bypass_value, vc_bypass_val_reg); > - voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0121-OMAP3-VC- > cleanup-voltage-setup-time-configuration.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time- > configuration.patch > deleted file mode 100644 > index 1e103a4..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0121-OMAP3-VC-cleanup- > voltage-setup-time-configuration.patch > +++ /dev/null > @@ -1,227 +0,0 @@ > -From 50a49ce5dfe92764b167510f4edb9dcde880f9d5 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 29 Mar 2011 14:36:04 -0700 > -Subject: [PATCH 121/149] OMAP3+: VC: cleanup voltage setup time > configuration > - > -- add setup_time field to struct omap_vc_channel (init'd from PMIC data) > -- use VC/VP register access helper for read/modify/write > -- move VFSM structure from omap_vdd_info into struct voltagedomain > -- remove redunant _data suffix from VFSM structures and variables > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 10 ++++------ > - arch/arm/mach-omap2/vc.h | 1 + > - arch/arm/mach-omap2/voltage.h | 7 +++---- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 ++++---- > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 12 ++++++------ > - 5 files changed, 18 insertions(+), 20 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 9e0dc8d..d7415ea 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -214,7 +214,6 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - { > - struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 vc_val; > - > - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > - pr_err("%s: PMIC info requried to configure vc for" > -@@ -233,6 +232,7 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; > - vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; > - vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; > -+ vc->setup_time = vdd->pmic_info->volt_setup_time; > - > - /* Configure the i2c slave address for this VC */ > - voltdm->rmw(vc->smps_sa_mask, > -@@ -251,11 +251,9 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - vc->common->smps_cmdra_reg); > - > - /* Configure the setup times */ > -- vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); > -- vc_val &= ~vdd->vfsm->voltsetup_mask; > -- vc_val |= vdd->pmic_info->volt_setup_time << > -- vdd->vfsm->voltsetup_shift; > -- voltdm->write(vc_val, vdd->vfsm->voltsetup_reg); > -+ voltdm->rmw(voltdm->vfsm->voltsetup_mask, > -+ vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), > -+ voltdm->vfsm->voltsetup_reg); > - > - if (cpu_is_omap34xx()) > - omap3_vc_init_channel(voltdm); > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index f3b0551..45e63cf 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -66,6 +66,7 @@ struct omap_vc_channel { > - u16 i2c_slave_addr; > - u16 volt_reg_addr; > - u16 cmd_reg_addr; > -+ u16 setup_time; > - > - /* register access data */ > - const struct omap_vc_common *common; > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 3129d64..2b2ab56 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -36,7 +36,7 @@ struct powerdomain; > - struct omap_vdd_info; > - > - /** > -- * struct omap_vfsm_instance_data - per-voltage manager FSM > register/bitfield > -+ * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield > - * data > - * @voltsetup_mask: SETUP_TIME* bitmask in the PRM_VOLTSETUP* register > - * @voltsetup_reg: register offset of PRM_VOLTSETUP from PRM base > -@@ -46,7 +46,7 @@ struct omap_vdd_info; > - * XXX It is not necessary to have both a _mask and a _shift for the same > - * bitfield - remove one! > - */ > --struct omap_vfsm_instance_data { > -+struct omap_vfsm_instance { > - u32 voltsetup_mask; > - u8 voltsetup_reg; > - u8 voltsetup_shift; > -@@ -67,6 +67,7 @@ struct voltagedomain { > - struct list_head node; > - struct list_head pwrdm_list; > - struct omap_vc_channel *vc; > -+ const struct omap_vfsm_instance *vfsm; > - > - /* VC/VP register access functions: SoC specific */ > - u32 (*read) (u8 offset); > -@@ -133,7 +134,6 @@ struct omap_volt_pmic_info { > - * @vp_data : the register values, shifts, masks for various > - * vp registers > - * @vp_rt_data : VP data derived at runtime, not predefined > -- * @vfsm : voltage manager FSM data > - * @debug_dir : debug directory for this voltage domain. > - * @curr_volt : current voltage for this vdd. > - * @vp_enabled : flag to keep track of whether vp is enabled or > not > -@@ -144,7 +144,6 @@ struct omap_vdd_info { > - struct omap_volt_pmic_info *pmic_info; > - struct omap_vp_instance_data *vp_data; > - struct omap_vp_runtime_data vp_rt_data; > -- const struct omap_vfsm_instance_data *vfsm; > - struct dentry *debug_dir; > - u32 curr_volt; > - bool vp_enabled; > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index 1d66749..4ea9a7b 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -31,7 +31,7 @@ > - * VDD data > - */ > - > --static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { > -+static const struct omap_vfsm_instance omap3_vdd1_vfsm = { > - .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, > - .voltsetup_shift = OMAP3430_SETUP_TIME1_SHIFT, > - .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, > -@@ -39,10 +39,9 @@ static const struct omap_vfsm_instance_data > omap3_vdd1_vfsm_data = { > - > - static struct omap_vdd_info omap3_vdd1_info = { > - .vp_data = &omap3_vp1_data, > -- .vfsm = &omap3_vdd1_vfsm_data, > - }; > - > --static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { > -+static const struct omap_vfsm_instance omap3_vdd2_vfsm = { > - .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, > - .voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT, > - .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, > -@@ -50,7 +49,6 @@ static const struct omap_vfsm_instance_data > omap3_vdd2_vfsm_data = { > - > - static struct omap_vdd_info omap3_vdd2_info = { > - .vp_data = &omap3_vp2_data, > -- .vfsm = &omap3_vdd2_vfsm_data, > - }; > - > - static struct voltagedomain omap3_voltdm_mpu = { > -@@ -60,6 +58,7 @@ static struct voltagedomain omap3_voltdm_mpu = { > - .write = omap3_prm_vcvp_write, > - .rmw = omap3_prm_vcvp_rmw, > - .vc = &omap3_vc_mpu, > -+ .vfsm = &omap3_vdd1_vfsm, > - .vdd = &omap3_vdd1_info, > - }; > - > -@@ -70,6 +69,7 @@ static struct voltagedomain omap3_voltdm_core = { > - .write = omap3_prm_vcvp_write, > - .rmw = omap3_prm_vcvp_rmw, > - .vc = &omap3_vc_core, > -+ .vfsm = &omap3_vdd2_vfsm, > - .vdd = &omap3_vdd2_info, > - }; > - > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index e435795..dd4bd22 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -32,31 +32,28 @@ > - #include "vc.h" > - #include "vp.h" > - > --static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = > { > -+static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { > - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, > - }; > - > - static struct omap_vdd_info omap4_vdd_mpu_info = { > - .vp_data = &omap4_vp_mpu_data, > -- .vfsm = &omap4_vdd_mpu_vfsm_data, > - }; > - > --static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { > -+static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { > - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, > - }; > - > - static struct omap_vdd_info omap4_vdd_iva_info = { > - .vp_data = &omap4_vp_iva_data, > -- .vfsm = &omap4_vdd_iva_vfsm_data, > - }; > - > --static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = > { > -+static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { > - .voltsetup_reg = > OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, > - }; > - > - static struct omap_vdd_info omap4_vdd_core_info = { > - .vp_data = &omap4_vp_core_data, > -- .vfsm = &omap4_vdd_core_vfsm_data, > - }; > - > - static struct voltagedomain omap4_voltdm_mpu = { > -@@ -66,6 +63,7 @@ static struct voltagedomain omap4_voltdm_mpu = { > - .write = omap4_prm_vcvp_write, > - .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_mpu, > -+ .vfsm = &omap4_vdd_mpu_vfsm, > - .vdd = &omap4_vdd_mpu_info, > - }; > - > -@@ -76,6 +74,7 @@ static struct voltagedomain omap4_voltdm_iva = { > - .write = omap4_prm_vcvp_write, > - .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_iva, > -+ .vfsm = &omap4_vdd_iva_vfsm, > - .vdd = &omap4_vdd_iva_info, > - }; > - > -@@ -86,6 +85,7 @@ static struct voltagedomain omap4_voltdm_core = { > - .write = omap4_prm_vcvp_write, > - .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_core, > -+ .vfsm = &omap4_vdd_core_vfsm, > - .vdd = &omap4_vdd_core_info, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC- > move-on-onlp-ret-off-command-configuration-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off- > command-configuration-.patch > deleted file mode 100644 > index 00085fd..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC-move-on- > onlp-ret-off-command-configuration-.patch > +++ /dev/null > @@ -1,83 +0,0 @@ > -From 998b0b0ef5013478d128a2b1a4f435b94394a1a5 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 29 Mar 2011 15:14:38 -0700 > -Subject: [PATCH 122/149] OMAP3+: VC: move on/onlp/ret/off command > configuration into common init > - > -Configuring the on/onlp/ret/off command values is common to OMAP3 & 4. > -Move from OMAP3-only init into common VC init. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 30 +++++++++++++----------------- > - 1 files changed, 13 insertions(+), 17 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index d7415ea..7df4438 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -148,26 +148,11 @@ static void __init omap3_vfsm_init(struct > voltagedomain *voltdm) > - > - static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) > - { > -- struct omap_vc_channel *vc = voltdm->vc; > -- struct omap_vdd_info *vdd = voltdm->vdd; > - static bool is_initialized; > -- u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; > -- u32 vc_val; > - > - if (is_initialized) > - return; > - > -- /* Set up the on, inactive, retention and off voltage */ > -- on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); > -- onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); > -- ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); > -- off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); > -- vc_val = ((on_vsel << vc->common->cmd_on_shift) | > -- (onlp_vsel << vc->common->cmd_onlp_shift) | > -- (ret_vsel << vc->common->cmd_ret_shift) | > -- (off_vsel << vc->common->cmd_off_shift)); > -- voltdm->write(vc_val, vc->cmdval_reg); > -- > - /* > - * Generic VC parameters init > - * XXX This data should be abstracted out > -@@ -192,8 +177,6 @@ static void __init omap4_vc_init_channel(struct > voltagedomain *voltdm) > - if (is_initialized) > - return; > - > -- /* TODO: Configure setup times and CMD_VAL values*/ > -- > - /* > - * Generic VC parameters init > - * XXX This data should be abstracted out > -@@ -214,6 +197,8 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - { > - struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > -+ u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; > -+ u32 val; > - > - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > - pr_err("%s: PMIC info requried to configure vc for" > -@@ -250,6 +235,17 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - vc->cmd_reg_addr << __ffs(vc- > >smps_cmdra_mask), > - vc->common->smps_cmdra_reg); > - > -+ /* Set up the on, inactive, retention and off voltage */ > -+ on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); > -+ onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); > -+ ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); > -+ off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); > -+ val = ((on_vsel << vc->common->cmd_on_shift) | > -+ (onlp_vsel << vc->common->cmd_onlp_shift) | > -+ (ret_vsel << vc->common->cmd_ret_shift) | > -+ (off_vsel << vc->common->cmd_off_shift)); > -+ voltdm->write(val, vc->cmdval_reg); > -+ > - /* Configure the setup times */ > - voltdm->rmw(voltdm->vfsm->voltsetup_mask, > - vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0123-OMAP3-VC- > abstract-out-channel-configuration.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch > deleted file mode 100644 > index ce09144..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0123-OMAP3-VC-abstract- > out-channel-configuration.patch > +++ /dev/null > @@ -1,267 +0,0 @@ > -From 7f3361ef34caa14bf669907555a0bc7dbe92f8c9 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 29 Mar 2011 15:57:16 -0700 > -Subject: [PATCH 123/149] OMAP3+: VC: abstract out channel configuration > - > -VC channel configuration is programmed based on settings coming from > -the PMIC configuration. > - > -Currently, the VC channel to PMIC mapping is a simple one-to-one > -mapping. Whenever a VC channel parameter is configured (i2c slave > -addres, PMIC register address, on/ret/off command), the corresponding > -bits are enabled in the VC channel configuration register. > - > -If necessary, the programmability of channel configuration settings > -could be extended to board/PMIC files, however, because this patch > -changes the channel configuration to be programmed based on existing > -values from the PMIC settings, it may not be required. > - > -Also note that starting with OMAP4, where there are more than 2 > -channels, one channel is identified as the "default" channel. When > -any of the bits in the channel config for the other channels are zero, > -it means to use the default channel. The OMAP4 TRM (at least through > -NDA version Q) is wrong in describing which is the default channel. > -The default channel on OMAP4 is MPU, not CORE as decribed in the TRM. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 70 > ++++++++++++++++++++++++++++++------ > - arch/arm/mach-omap2/vc.h | 9 +++++ > - arch/arm/mach-omap2/vc3xxx_data.c | 3 ++ > - arch/arm/mach-omap2/vc44xx_data.c | 5 +++ > - 4 files changed, 75 insertions(+), 12 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 7df4438..e413b97 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -10,6 +10,52 @@ > - #include "prm-regbits-44xx.h" > - #include "prm44xx.h" > - > -+/* > -+ * Channel configuration bits, common for OMAP3 & 4 > -+ * OMAP3 register: PRM_VC_CH_CONF > -+ * OMAP4 register: PRM_VC_CFG_CHANNEL > -+ */ > -+#define CFG_CHANNEL_SA BIT(0) > -+#define CFG_CHANNEL_RAV BIT(1) > -+#define CFG_CHANNEL_RAC BIT(2) > -+#define CFG_CHANNEL_RACEN BIT(3) > -+#define CFG_CHANNEL_CMD BIT(4) > -+#define CFG_CHANNEL_MASK 0x3f > -+ > -+/** > -+ * omap_vc_config_channel - configure VC channel to PMIC mappings > -+ * @voltdm: pointer to voltagdomain defining the desired VC channel > -+ * > -+ * Configures the VC channel to PMIC mappings for the following > -+ * PMIC settings > -+ * - i2c slave address (SA) > -+ * - voltage configuration address (RAV) > -+ * - command configuration address (RAC) and enable bit (RACEN) > -+ * - command values for ON, ONLP, RET and OFF (CMD) > -+ * > -+ * This function currently only allows flexible configuration of the > -+ * non-default channel. Starting with OMAP4, there are more than 2 > -+ * channels, with one defined as the default (on OMAP4, it's MPU.) > -+ * Only the non-default channel can be configured. > -+ */ > -+static int omap_vc_config_channel(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vc_channel *vc = voltdm->vc; > -+ > -+ /* > -+ * For default channel, the only configurable bit is RACEN. > -+ * All others must stay at zero (see function comment above.) > -+ */ > -+ if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) > -+ vc->cfg_channel &= CFG_CHANNEL_RACEN; > -+ > -+ voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, > -+ vc->cfg_channel << vc->cfg_channel_sa_shift, > -+ vc->common->cfg_channel_reg); > -+ > -+ return 0; > -+} > -+ > - /* Voltage scale and accessory APIs */ > - int omap_vc_pre_scale(struct voltagedomain *voltdm, > - unsigned long target_volt, > -@@ -157,8 +203,6 @@ static void __init omap3_vc_init_channel(struct > voltagedomain *voltdm) > - * Generic VC parameters init > - * XXX This data should be abstracted out > - */ > -- voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, > -- OMAP3_PRM_VC_CH_CONF_OFFSET); > - voltdm->write(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, > - OMAP3_PRM_VC_I2C_CFG_OFFSET); > - > -@@ -177,15 +221,6 @@ static void __init omap4_vc_init_channel(struct > voltagedomain *voltdm) > - if (is_initialized) > - return; > - > -- /* > -- * Generic VC parameters init > -- * XXX This data should be abstracted out > -- */ > -- vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | > OMAP4430_CMD_VDD_MPU_L_MASK | > -- OMAP4430_RAV_VDD_IVA_L_MASK | > OMAP4430_CMD_VDD_IVA_L_MASK | > -- OMAP4430_RAV_VDD_CORE_L_MASK | > OMAP4430_CMD_VDD_CORE_L_MASK); > -- voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); > -- > - /* XXX These are magic numbers and do not belong! */ > - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << > OMAP4430_SCLH_SHIFT); > - voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); > -@@ -213,6 +248,8 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - return; > - } > - > -+ vc->cfg_channel = 0; > -+ > - /* get PMIC/board specific settings */ > - vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; > - vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; > -@@ -223,6 +260,7 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - voltdm->rmw(vc->smps_sa_mask, > - vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), > - vc->common->smps_sa_reg); > -+ vc->cfg_channel |= CFG_CHANNEL_SA; > - > - /* > - * Configure the PMIC register addresses. > -@@ -230,10 +268,14 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - voltdm->rmw(vc->smps_volra_mask, > - vc->volt_reg_addr << __ffs(vc->smps_volra_mask), > - vc->common->smps_volra_reg); > -- if (vc->cmd_reg_addr) > -+ vc->cfg_channel |= CFG_CHANNEL_RAV; > -+ > -+ if (vc->cmd_reg_addr) { > - voltdm->rmw(vc->smps_cmdra_mask, > - vc->cmd_reg_addr << __ffs(vc- > >smps_cmdra_mask), > - vc->common->smps_cmdra_reg); > -+ vc->cfg_channel |= CFG_CHANNEL_RAC | > CFG_CHANNEL_RACEN; > -+ } > - > - /* Set up the on, inactive, retention and off voltage */ > - on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); > -@@ -245,6 +287,10 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - (ret_vsel << vc->common->cmd_ret_shift) | > - (off_vsel << vc->common->cmd_off_shift)); > - voltdm->write(val, vc->cmdval_reg); > -+ vc->cfg_channel |= CFG_CHANNEL_CMD; > -+ > -+ /* Channel configuration */ > -+ omap_vc_config_channel(voltdm); > - > - /* Configure the setup times */ > - voltdm->rmw(voltdm->vfsm->voltsetup_mask, > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index 45e63cf..604f5b6 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -53,20 +53,28 @@ struct omap_vc_common { > - u8 cmd_onlp_shift; > - u8 cmd_ret_shift; > - u8 cmd_off_shift; > -+ u8 cfg_channel_reg; > - }; > - > -+/* omap_vc_channel.flags values */ > -+#define OMAP_VC_CHANNEL_DEFAULT BIT(0) > -+ > - /** > - * struct omap_vc_channel - VC per-instance data > -+ * @flags: VC channel-specific flags (optional) > - * @common: pointer to VC common data for this platform > - * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA > register > - * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register > - */ > - struct omap_vc_channel { > -+ u8 flags; > -+ > - /* channel state */ > - u16 i2c_slave_addr; > - u16 volt_reg_addr; > - u16 cmd_reg_addr; > - u16 setup_time; > -+ u8 cfg_channel; > - > - /* register access data */ > - const struct omap_vc_common *common; > -@@ -74,6 +82,7 @@ struct omap_vc_channel { > - u32 smps_volra_mask; > - u32 smps_cmdra_mask; > - u8 cmdval_reg; > -+ u8 cfg_channel_sa_shift; > - }; > - > - extern struct omap_vc_channel omap3_vc_mpu; > -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach- > omap2/vc3xxx_data.c > -index df8bd5e..f4449eb 100644 > ---- a/arch/arm/mach-omap2/vc3xxx_data.c > -+++ b/arch/arm/mach-omap2/vc3xxx_data.c > -@@ -43,6 +43,7 @@ static struct omap_vc_common omap3_vc_common = { > - .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, > - .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, > - .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, > -+ .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, > - }; > - > - struct omap_vc_channel omap3_vc_mpu = { > -@@ -51,6 +52,7 @@ struct omap_vc_channel omap3_vc_mpu = { > - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, > - .smps_volra_mask = OMAP3430_VOLRA0_MASK, > - .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, > -+ .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, > - }; > - > - struct omap_vc_channel omap3_vc_core = { > -@@ -59,4 +61,5 @@ struct omap_vc_channel omap3_vc_core = { > - .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, > - .smps_volra_mask = OMAP3430_VOLRA1_MASK, > - .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, > -+ .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, > - }; > -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach- > omap2/vc44xx_data.c > -index 5d104ff..1610bde 100644 > ---- a/arch/arm/mach-omap2/vc44xx_data.c > -+++ b/arch/arm/mach-omap2/vc44xx_data.c > -@@ -44,15 +44,18 @@ static const struct omap_vc_common > omap4_vc_common = { > - .cmd_onlp_shift = OMAP4430_ONLP_SHIFT, > - .cmd_ret_shift = OMAP4430_RET_SHIFT, > - .cmd_off_shift = OMAP4430_OFF_SHIFT, > -+ .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, > - }; > - > - /* VC instance data for each controllable voltage line */ > - struct omap_vc_channel omap4_vc_mpu = { > -+ .flags = OMAP_VC_CHANNEL_DEFAULT, > - .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, > - .smps_sa_mask = > OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, > - .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, > -+ .cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT, > - }; > - > - struct omap_vc_channel omap4_vc_iva = { > -@@ -61,6 +64,7 @@ struct omap_vc_channel omap4_vc_iva = { > - .smps_sa_mask = > OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, > - .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, > -+ .cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT, > - }; > - > - struct omap_vc_channel omap4_vc_core = { > -@@ -69,5 +73,6 @@ struct omap_vc_channel omap4_vc_core = { > - .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, > - .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, > - .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, > -+ .cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3- > voltage-domain-move-PMIC-struct-from-vdd_info-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3-voltage-domain-move- > PMIC-struct-from-vdd_info-.patch > deleted file mode 100644 > index 9c5fbe3..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3-voltage- > domain-move-PMIC-struct-from-vdd_info-.patch > +++ /dev/null > @@ -1,394 +0,0 @@ > -From 94945494c16d0ffd7b52b12492068abf5310654d Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 30 Mar 2011 11:01:10 -0700 > -Subject: [PATCH 124/149] OMAP3+: voltage domain: move PMIC struct from > vdd_info into struct voltagedomain > - > -Move structure containing PMIC configurable settings into struct > -voltagedomain. In the process, rename from omap_volt_pmic_info to > -omap_voltdm_pmic (_info suffix is not helpful.) > - > -No functional changes. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/omap_twl.c | 28 ++++++++++++++-------------- > - arch/arm/mach-omap2/vc.c | 29 ++++++++++++++--------------- > - arch/arm/mach-omap2/voltage.c | 29 ++++++++++++----------------- > - arch/arm/mach-omap2/voltage.h | 12 +++++------- > - arch/arm/mach-omap2/vp.c | 13 ++++++------- > - 5 files changed, 51 insertions(+), 60 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index 3249fe3..e467d45 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -143,7 +143,7 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) > - return DIV_ROUND_UP(uv - 600000, 12500) + 1; > - } > - > --static struct omap_volt_pmic_info omap3_mpu_volt_info = { > -+static struct omap_voltdm_pmic omap3_mpu_pmic = { > - .slew_rate = 4000, > - .step_size = 12500, > - .on_volt = 1200000, > -@@ -163,7 +163,7 @@ static struct omap_volt_pmic_info > omap3_mpu_volt_info = { > - .uv_to_vsel = twl4030_uv_to_vsel, > - }; > - > --static struct omap_volt_pmic_info omap3_core_volt_info = { > -+static struct omap_voltdm_pmic omap3_core_pmic = { > - .slew_rate = 4000, > - .step_size = 12500, > - .on_volt = 1200000, > -@@ -183,7 +183,7 @@ static struct omap_volt_pmic_info > omap3_core_volt_info = { > - .uv_to_vsel = twl4030_uv_to_vsel, > - }; > - > --static struct omap_volt_pmic_info omap4_mpu_volt_info = { > -+static struct omap_voltdm_pmic omap4_mpu_pmic = { > - .slew_rate = 4000, > - .step_size = 12500, > - .on_volt = 1350000, > -@@ -203,7 +203,7 @@ static struct omap_volt_pmic_info > omap4_mpu_volt_info = { > - .uv_to_vsel = twl6030_uv_to_vsel, > - }; > - > --static struct omap_volt_pmic_info omap4_iva_volt_info = { > -+static struct omap_voltdm_pmic omap4_iva_pmic = { > - .slew_rate = 4000, > - .step_size = 12500, > - .on_volt = 1100000, > -@@ -223,7 +223,7 @@ static struct omap_volt_pmic_info > omap4_iva_volt_info = { > - .uv_to_vsel = twl6030_uv_to_vsel, > - }; > - > --static struct omap_volt_pmic_info omap4_core_volt_info = { > -+static struct omap_voltdm_pmic omap4_core_pmic = { > - .slew_rate = 4000, > - .step_size = 12500, > - .on_volt = 1100000, > -@@ -251,13 +251,13 @@ int __init omap4_twl_init(void) > - return -ENODEV; > - > - voltdm = voltdm_lookup("mpu"); > -- omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); > -+ omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic); > - > - voltdm = voltdm_lookup("iva"); > -- omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); > -+ omap_voltage_register_pmic(voltdm, &omap4_iva_pmic); > - > - voltdm = voltdm_lookup("core"); > -- omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); > -+ omap_voltage_register_pmic(voltdm, &omap4_core_pmic); > - > - return 0; > - } > -@@ -270,10 +270,10 @@ int __init omap3_twl_init(void) > - return -ENODEV; > - > - if (cpu_is_omap3630()) { > -- omap3_mpu_volt_info.vp_vddmin = > OMAP3630_VP1_VLIMITTO_VDDMIN; > -- omap3_mpu_volt_info.vp_vddmax = > OMAP3630_VP1_VLIMITTO_VDDMAX; > -- omap3_core_volt_info.vp_vddmin = > OMAP3630_VP2_VLIMITTO_VDDMIN; > -- omap3_core_volt_info.vp_vddmax = > OMAP3630_VP2_VLIMITTO_VDDMAX; > -+ omap3_mpu_pmic.vp_vddmin = > OMAP3630_VP1_VLIMITTO_VDDMIN; > -+ omap3_mpu_pmic.vp_vddmax = > OMAP3630_VP1_VLIMITTO_VDDMAX; > -+ omap3_core_pmic.vp_vddmin = > OMAP3630_VP2_VLIMITTO_VDDMIN; > -+ omap3_core_pmic.vp_vddmax = > OMAP3630_VP2_VLIMITTO_VDDMAX; > - } > - > - /* > -@@ -289,10 +289,10 @@ int __init omap3_twl_init(void) > - omap3_twl_set_sr_bit(true); > - > - voltdm = voltdm_lookup("mpu_iva"); > -- omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); > -+ omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); > - > - voltdm = voltdm_lookup("core"); > -- omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); > -+ omap_voltage_register_pmic(voltdm, &omap3_core_pmic); > - > - return 0; > - } > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index e413b97..c431ca2 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -70,13 +70,13 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - vp_common = vdd->vp_data->vp_common; > - > - /* Check if sufficient pmic info is available for this vdd */ > -- if (!vdd->pmic_info) { > -+ if (!voltdm->pmic) { > - pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", > - __func__, voltdm->name); > - return -EINVAL; > - } > - > -- if (!vdd->pmic_info->uv_to_vsel) { > -+ if (!voltdm->pmic->uv_to_vsel) { > - pr_err("%s: PMIC function to convert voltage in uV to" > - "vsel not registered. Hence unable to scale voltage" > - "for vdd_%s\n", __func__, voltdm->name); > -@@ -94,7 +94,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, > - if (IS_ERR(volt_data)) > - volt_data = NULL; > - > -- *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); > -+ *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); > - *current_vsel = voltdm->read(vdd->vp_data->voltage); > - > - /* Setting the ON voltage to the new target voltage */ > -@@ -125,8 +125,8 @@ void omap_vc_post_scale(struct voltagedomain > *voltdm, > - > - smps_steps = abs(target_vsel - current_vsel); > - /* SMPS slew rate / step size. 2us added as buffer. */ > -- smps_delay = ((smps_steps * vdd->pmic_info->step_size) / > -- vdd->pmic_info->slew_rate) + 2; > -+ smps_delay = ((smps_steps * voltdm->pmic->step_size) / > -+ voltdm->pmic->slew_rate) + 2; > - udelay(smps_delay); > - > - vdd->curr_volt = target_volt; > -@@ -231,11 +231,10 @@ static void __init omap4_vc_init_channel(struct > voltagedomain *voltdm) > - void __init omap_vc_init_channel(struct voltagedomain *voltdm) > - { > - struct omap_vc_channel *vc = voltdm->vc; > -- struct omap_vdd_info *vdd = voltdm->vdd; > - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; > - u32 val; > - > -- if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > -+ if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { > - pr_err("%s: PMIC info requried to configure vc for" > - "vdd_%s not populated.Hence cannot initialize vc\n", > - __func__, voltdm->name); > -@@ -251,10 +250,10 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - vc->cfg_channel = 0; > - > - /* get PMIC/board specific settings */ > -- vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; > -- vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; > -- vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; > -- vc->setup_time = vdd->pmic_info->volt_setup_time; > -+ vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; > -+ vc->volt_reg_addr = voltdm->pmic->volt_reg_addr; > -+ vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr; > -+ vc->setup_time = voltdm->pmic->volt_setup_time; > - > - /* Configure the i2c slave address for this VC */ > - voltdm->rmw(vc->smps_sa_mask, > -@@ -278,10 +277,10 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - } > - > - /* Set up the on, inactive, retention and off voltage */ > -- on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); > -- onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); > -- ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); > -- off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); > -+ on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt); > -+ onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt); > -+ ret_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->ret_volt); > -+ off_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->off_volt); > - val = ((on_vsel << vc->common->cmd_on_shift) | > - (onlp_vsel << vc->common->cmd_onlp_shift) | > - (ret_vsel << vc->common->cmd_ret_shift) | > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 9f9f014..94f7fc4 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -84,20 +84,20 @@ static int __init _config_common_vdd_data(struct > voltagedomain *voltdm) > - vdd->vp_enabled = false; > - > - vdd->vp_rt_data.vpconfig_erroroffset = > -- (vdd->pmic_info->vp_erroroffset << > -+ (voltdm->pmic->vp_erroroffset << > - vdd->vp_data->vp_common->vpconfig_erroroffset_shift); > - > -- timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / > 1000; > -+ timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; > - vdd->vp_rt_data.vlimitto_timeout = timeout_val; > -- vdd->vp_rt_data.vlimitto_vddmin = vdd->pmic_info->vp_vddmin; > -- vdd->vp_rt_data.vlimitto_vddmax = vdd->pmic_info->vp_vddmax; > -+ vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; > -+ vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; > - > -- waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) > * > -+ waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * > - sys_clk_speed) / 1000; > - vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; > - vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; > -- vdd->vp_rt_data.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin; > -- vdd->vp_rt_data.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax; > -+ vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; > -+ vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; > - > - return 0; > - } > -@@ -149,10 +149,9 @@ static void __init vdd_debugfs_init(struct > voltagedomain *voltdm) > - > - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) > - { > -- struct omap_vdd_info *vdd = voltdm->vdd; > - int ret = -EINVAL; > - > -- if (!vdd->pmic_info) { > -+ if (!voltdm->pmic) { > - pr_err("%s: PMIC info requried to configure vdd_%s not" > - "populated.Hence cannot initialize vdd_%s\n", > - __func__, voltdm->name, voltdm->name); > -@@ -324,24 +323,20 @@ struct omap_volt_data > *omap_voltage_get_voltdata(struct voltagedomain *voltdm, > - * omap_voltage_register_pmic() - API to register PMIC specific data > - * @voltdm: pointer to the VDD for which the PMIC specific data is > - * to be registered > -- * @pmic_info: the structure containing pmic info > -+ * @pmic: the structure containing pmic info > - * > - * This API is to be called by the SOC/PMIC file to specify the > -- * pmic specific info as present in omap_volt_pmic_info structure. > -+ * pmic specific info as present in omap_voltdm_pmic structure. > - */ > - int omap_voltage_register_pmic(struct voltagedomain *voltdm, > -- struct omap_volt_pmic_info *pmic_info) > -+ struct omap_voltdm_pmic *pmic) > - { > -- struct omap_vdd_info *vdd; > -- > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > - return -EINVAL; > - } > - > -- vdd = voltdm->vdd; > -- > -- vdd->pmic_info = pmic_info; > -+ voltdm->pmic = pmic; > - > - return 0; > - } > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 2b2ab56..72a0255 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -68,6 +68,7 @@ struct voltagedomain { > - struct list_head pwrdm_list; > - struct omap_vc_channel *vc; > - const struct omap_vfsm_instance *vfsm; > -+ struct omap_voltdm_pmic *pmic; > - > - /* VC/VP register access functions: SoC specific */ > - u32 (*read) (u8 offset); > -@@ -97,13 +98,13 @@ struct omap_volt_data { > - }; > - > - /** > -- * struct omap_volt_pmic_info - PMIC specific data required by voltage driver. > -+ * struct omap_voltdm_pmic - PMIC specific data required by voltage driver. > - * @slew_rate: PMIC slew rate (in uv/us) > - * @step_size: PMIC voltage step size (in uv) > - * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. > - * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. > - */ > --struct omap_volt_pmic_info { > -+struct omap_voltdm_pmic { > - int slew_rate; > - int step_size; > - u32 on_volt; > -@@ -129,8 +130,6 @@ struct omap_volt_pmic_info { > - * > - * @volt_data : voltage table having the distinct voltages supported > - * by the domain and other associated per voltage data. > -- * @pmic_info : pmic specific parameters which should be populted by > -- * the pmic drivers. > - * @vp_data : the register values, shifts, masks for various > - * vp registers > - * @vp_rt_data : VP data derived at runtime, not predefined > -@@ -141,7 +140,6 @@ struct omap_volt_pmic_info { > - */ > - struct omap_vdd_info { > - struct omap_volt_data *volt_data; > -- struct omap_volt_pmic_info *pmic_info; > - struct omap_vp_instance_data *vp_data; > - struct omap_vp_runtime_data vp_rt_data; > - struct dentry *debug_dir; > -@@ -163,13 +161,13 @@ unsigned long omap_voltage_get_nom_volt(struct > voltagedomain *voltdm); > - struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); > - #ifdef CONFIG_PM > - int omap_voltage_register_pmic(struct voltagedomain *voltdm, > -- struct omap_volt_pmic_info *pmic_info); > -+ struct omap_voltdm_pmic *pmic); > - void omap_change_voltscale_method(struct voltagedomain *voltdm, > - int voltscale_method); > - int omap_voltage_late_init(void); > - #else > - static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, > -- struct omap_volt_pmic_info *pmic_info) > -+ struct omap_voltdm_pmic *pmic) > - { > - return -EINVAL; > - } > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index 88ac742..a3afcbe 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -18,7 +18,6 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) > - u32 vpconfig; > - unsigned long uvdc; > - char vsel; > -- struct omap_vdd_info *vdd = voltdm->vdd; > - > - uvdc = omap_voltage_get_nom_volt(voltdm); > - if (!uvdc) { > -@@ -27,13 +26,13 @@ static void vp_latch_vsel(struct voltagedomain > *voltdm) > - return; > - } > - > -- if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { > -+ if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { > - pr_warning("%s: PMIC function to convert voltage in uV to" > - " vsel not registered\n", __func__); > - return; > - } > - > -- vsel = vdd->pmic_info->uv_to_vsel(uvdc); > -+ vsel = voltdm->pmic->uv_to_vsel(uvdc); > - > - vpconfig = voltdm->read(vp->vpconfig); > - vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | > -@@ -206,13 +205,13 @@ unsigned long omap_vp_get_curr_volt(struct > voltagedomain *voltdm) > - > - curr_vsel = voltdm->read(vp->voltage); > - > -- if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { > -+ if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { > - pr_warning("%s: PMIC function to convert vsel to voltage" > - "in uV not registerd\n", __func__); > - return 0; > - } > - > -- return vdd->pmic_info->vsel_to_uv(curr_vsel); > -+ return voltdm->pmic->vsel_to_uv(curr_vsel); > - } > - > - /** > -@@ -323,13 +322,13 @@ static int vp_volt_debug_get(void *data, u64 *val) > - > - vsel = voltdm->read(vp->voltage); > - > -- if (!vdd->pmic_info->vsel_to_uv) { > -+ if (!voltdm->pmic->vsel_to_uv) { > - pr_warning("PMIC function to convert vsel to voltage" > - "in uV not registerd\n"); > - return -EINVAL; > - } > - > -- *val = vdd->pmic_info->vsel_to_uv(vsel); > -+ *val = voltdm->pmic->vsel_to_uv(vsel); > - return 0; > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC- > make-I2C-config-programmable-with-PMIC-spec.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config- > programmable-with-PMIC-spec.patch > deleted file mode 100644 > index ee62874..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC-make- > I2C-config-programmable-with-PMIC-spec.patch > +++ /dev/null > @@ -1,221 +0,0 @@ > -From ecf26111e3d83dd4face7fa8f4327489775d1dc8 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Wed, 30 Mar 2011 16:36:30 -0700 > -Subject: [PATCH 125/149] OMAP3+: VC: make I2C config programmable with > PMIC-specific settings > - > -Remove hard-coded I2C configuration in favor of settings that can be > -configured from PMIC-specific values. Currently only high-speed mode > -and the master-code value are supported, since they were the only > -fields currently used, but extending this is now trivial. > - > -Thanks to Nishanth Menon <nm@ti.com> for reporting/fixing a sparse > -problem and making omap_vc_i2c_init() static, as well as finding and > -fixing a problem with the shift/mask of mcode. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/omap_twl.c | 4 +++ > - arch/arm/mach-omap2/vc.c | 51 > +++++++++++++++++++++++++++++++----- > - arch/arm/mach-omap2/vc.h | 7 +++++ > - arch/arm/mach-omap2/vc3xxx_data.c | 3 ++ > - arch/arm/mach-omap2/vc44xx_data.c | 3 ++ > - arch/arm/mach-omap2/voltage.h | 4 +++ > - 6 files changed, 65 insertions(+), 7 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index e467d45..6b247d1 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -159,6 +159,7 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = > { > - .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, > - .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, > -+ .i2c_high_speed = true, > - .vsel_to_uv = twl4030_vsel_to_uv, > - .uv_to_vsel = twl4030_uv_to_vsel, > - }; > -@@ -179,6 +180,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = > { > - .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, > - .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, > -+ .i2c_high_speed = true, > - .vsel_to_uv = twl4030_vsel_to_uv, > - .uv_to_vsel = twl4030_uv_to_vsel, > - }; > -@@ -199,6 +201,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = > { > - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, > - .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, > -+ .i2c_high_speed = true, > - .vsel_to_uv = twl6030_vsel_to_uv, > - .uv_to_vsel = twl6030_uv_to_vsel, > - }; > -@@ -219,6 +222,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { > - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, > - .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, > -+ .i2c_high_speed = true, > - .vsel_to_uv = twl6030_vsel_to_uv, > - .uv_to_vsel = twl6030_uv_to_vsel, > - }; > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index c431ca2..97a4c6c 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -199,13 +199,6 @@ static void __init omap3_vc_init_channel(struct > voltagedomain *voltdm) > - if (is_initialized) > - return; > - > -- /* > -- * Generic VC parameters init > -- * XXX This data should be abstracted out > -- */ > -- voltdm->write(OMAP3430_MCODE_SHIFT | > OMAP3430_HSEN_MASK, > -- OMAP3_PRM_VC_I2C_CFG_OFFSET); > -- > - omap3_vfsm_init(voltdm); > - > - is_initialized = true; > -@@ -228,6 +221,48 @@ static void __init omap4_vc_init_channel(struct > voltagedomain *voltdm) > - is_initialized = true; > - } > - > -+/** > -+ * omap_vc_i2c_init - initialize I2C interface to PMIC > -+ * @voltdm: voltage domain containing VC data > -+ * > -+ * Use PMIC supplied seetings for I2C high-speed mode and > -+ * master code (if set) and program the VC I2C configuration > -+ * register. > -+ * > -+ * The VC I2C configuration is common to all VC channels, > -+ * so this function only configures I2C for the first VC > -+ * channel registers. All other VC channels will use the > -+ * same configuration. > -+ */ > -+static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) > -+{ > -+ struct omap_vc_channel *vc = voltdm->vc; > -+ static bool initialized; > -+ static bool i2c_high_speed; > -+ u8 mcode; > -+ > -+ if (initialized) { > -+ if (voltdm->pmic->i2c_high_speed != i2c_high_speed) > -+ pr_warn("%s: I2C config for all channels must match.", > -+ __func__); > -+ return; > -+ } > -+ > -+ i2c_high_speed = voltdm->pmic->i2c_high_speed; > -+ if (i2c_high_speed) > -+ voltdm->rmw(vc->common->i2c_cfg_hsen_mask, > -+ vc->common->i2c_cfg_hsen_mask, > -+ vc->common->i2c_cfg_reg); > -+ > -+ mcode = voltdm->pmic->i2c_mcode; > -+ if (mcode) > -+ voltdm->rmw(vc->common->i2c_mcode_mask, > -+ mcode << __ffs(vc->common->i2c_mcode_mask), > -+ vc->common->i2c_cfg_reg); > -+ > -+ initialized = true; > -+} > -+ > - void __init omap_vc_init_channel(struct voltagedomain *voltdm) > - { > - struct omap_vc_channel *vc = voltdm->vc; > -@@ -296,6 +331,8 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), > - voltdm->vfsm->voltsetup_reg); > - > -+ omap_vc_i2c_init(voltdm); > -+ > - if (cpu_is_omap34xx()) > - omap3_vc_init_channel(voltdm); > - else if (cpu_is_omap44xx()) > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index 604f5b6..c577f28 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -35,6 +35,9 @@ struct voltagedomain; > - * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register > - * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register > - * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register > -+ * @i2c_cfg_reg: I2C configuration register offset > -+ * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register > -+ * @i2c_mcode_mask: MCODE field mask for I2C config register > - * > - * XXX One of cmd_on_mask and cmd_on_shift are not needed > - * XXX VALID should probably be a shift, not a mask > -@@ -54,6 +57,9 @@ struct omap_vc_common { > - u8 cmd_ret_shift; > - u8 cmd_off_shift; > - u8 cfg_channel_reg; > -+ u8 i2c_cfg_reg; > -+ u8 i2c_cfg_hsen_mask; > -+ u8 i2c_mcode_mask; > - }; > - > - /* omap_vc_channel.flags values */ > -@@ -75,6 +81,7 @@ struct omap_vc_channel { > - u16 cmd_reg_addr; > - u16 setup_time; > - u8 cfg_channel; > -+ bool i2c_high_speed; > - > - /* register access data */ > - const struct omap_vc_common *common; > -diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach- > omap2/vc3xxx_data.c > -index f4449eb..95d7701 100644 > ---- a/arch/arm/mach-omap2/vc3xxx_data.c > -+++ b/arch/arm/mach-omap2/vc3xxx_data.c > -@@ -44,6 +44,9 @@ static struct omap_vc_common omap3_vc_common = { > - .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, > - .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, > - .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, > -+ .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK, > -+ .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET, > -+ .i2c_mcode_mask = OMAP3430_MCODE_MASK, > - }; > - > - struct omap_vc_channel omap3_vc_mpu = { > -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach- > omap2/vc44xx_data.c > -index 1610bde..148be18 100644 > ---- a/arch/arm/mach-omap2/vc44xx_data.c > -+++ b/arch/arm/mach-omap2/vc44xx_data.c > -@@ -45,6 +45,9 @@ static const struct omap_vc_common > omap4_vc_common = { > - .cmd_ret_shift = OMAP4430_RET_SHIFT, > - .cmd_off_shift = OMAP4430_OFF_SHIFT, > - .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, > -+ .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET, > -+ .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK, > -+ .i2c_mcode_mask = OMAP4430_HSMCODE_MASK, > - }; > - > - /* VC instance data for each controllable voltage line */ > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 72a0255..a0ae5c6 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -101,6 +101,8 @@ struct omap_volt_data { > - * struct omap_voltdm_pmic - PMIC specific data required by voltage driver. > - * @slew_rate: PMIC slew rate (in uv/us) > - * @step_size: PMIC voltage step size (in uv) > -+ * @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC > -+ * @i2c_mcode: master code value for I2C high-speed preamble transmission > - * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. > - * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. > - */ > -@@ -121,6 +123,8 @@ struct omap_voltdm_pmic { > - u8 vp_vddmin; > - u8 vp_vddmax; > - u8 vp_timeout_us; > -+ bool i2c_high_speed; > -+ u8 i2c_mcode; > - unsigned long (*vsel_to_uv) (const u8 vsel); > - u8 (*uv_to_vsel) (unsigned long uV); > - }; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC- > handle-mutant-channel-config-for-OMAP4-M.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant- > channel-config-for-OMAP4-M.patch > deleted file mode 100644 > index f8b0fcb..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC- > handle-mutant-channel-config-for-OMAP4-M.patch > +++ /dev/null > @@ -1,168 +0,0 @@ > -From dd6773950301f38c61e0039922c685f6e0542c47 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Thu, 2 Jun 2011 17:28:13 -0700 > -Subject: [PATCH 126/149] OMAP3+: PM: VC: handle mutant channel config for > OMAP4 MPU channel > - > -On OMAP3+, all VC channels have the the same bitfield ordering for all > -VC channels, except the OMAP4 MPU channel. This appears to be a freak > -accident as all other VC channel (including OMAP5) have the standard > -configuration. Handle the mutant case by adding a per-channel flag > -to signal the deformity and handle it during VC init. > - > -Special thanks to Nishanth Menon <nm@ti.com> for finding this problem > -and for proposing the initial solution. > - > -Cc: Nishanth Menon <nm@ti.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 64 +++++++++++++++++++++++++++++- > ------ > - arch/arm/mach-omap2/vc.h | 1 + > - arch/arm/mach-omap2/vc44xx_data.c | 2 +- > - 3 files changed, 53 insertions(+), 14 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 97a4c6c..9e51782 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -10,17 +10,51 @@ > - #include "prm-regbits-44xx.h" > - #include "prm44xx.h" > - > --/* > -- * Channel configuration bits, common for OMAP3 & 4 > -+/** > -+ * struct omap_vc_channel_cfg - describe the cfg_channel bitfield > -+ * @sa: bit for slave address > -+ * @rav: bit for voltage configuration register > -+ * @rac: bit for command configuration register > -+ * @racen: enable bit for RAC > -+ * @cmd: bit for command value set selection > -+ * > -+ * Channel configuration bits, common for OMAP3+ > - * OMAP3 register: PRM_VC_CH_CONF > - * OMAP4 register: PRM_VC_CFG_CHANNEL > -+ * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG > - */ > --#define CFG_CHANNEL_SA BIT(0) > --#define CFG_CHANNEL_RAV BIT(1) > --#define CFG_CHANNEL_RAC BIT(2) > --#define CFG_CHANNEL_RACEN BIT(3) > --#define CFG_CHANNEL_CMD BIT(4) > --#define CFG_CHANNEL_MASK 0x3f > -+struct omap_vc_channel_cfg { > -+ u8 sa; > -+ u8 rav; > -+ u8 rac; > -+ u8 racen; > -+ u8 cmd; > -+}; > -+ > -+static struct omap_vc_channel_cfg vc_default_channel_cfg = { > -+ .sa = BIT(0), > -+ .rav = BIT(1), > -+ .rac = BIT(2), > -+ .racen = BIT(3), > -+ .cmd = BIT(4), > -+}; > -+ > -+/* > -+ * On OMAP3+, all VC channels have the above default bitfield > -+ * configuration, except the OMAP4 MPU channel. This appears > -+ * to be a freak accident as every other VC channel has the > -+ * default configuration, thus creating a mutant channel config. > -+ */ > -+static struct omap_vc_channel_cfg vc_mutant_channel_cfg = { > -+ .sa = BIT(0), > -+ .rav = BIT(2), > -+ .rac = BIT(3), > -+ .racen = BIT(4), > -+ .cmd = BIT(1), > -+}; > -+ > -+static struct omap_vc_channel_cfg *vc_cfg_bits; > -+#define CFG_CHANNEL_MASK 0x1f > - > - /** > - * omap_vc_config_channel - configure VC channel to PMIC mappings > -@@ -47,7 +81,7 @@ static int omap_vc_config_channel(struct voltagedomain > *voltdm) > - * All others must stay at zero (see function comment above.) > - */ > - if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) > -- vc->cfg_channel &= CFG_CHANNEL_RACEN; > -+ vc->cfg_channel &= vc_cfg_bits->racen; > - > - voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, > - vc->cfg_channel << vc->cfg_channel_sa_shift, > -@@ -283,6 +317,10 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - } > - > - vc->cfg_channel = 0; > -+ if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT) > -+ vc_cfg_bits = &vc_mutant_channel_cfg; > -+ else > -+ vc_cfg_bits = &vc_default_channel_cfg; > - > - /* get PMIC/board specific settings */ > - vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; > -@@ -294,7 +332,7 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - voltdm->rmw(vc->smps_sa_mask, > - vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), > - vc->common->smps_sa_reg); > -- vc->cfg_channel |= CFG_CHANNEL_SA; > -+ vc->cfg_channel |= vc_cfg_bits->sa; > - > - /* > - * Configure the PMIC register addresses. > -@@ -302,13 +340,13 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - voltdm->rmw(vc->smps_volra_mask, > - vc->volt_reg_addr << __ffs(vc->smps_volra_mask), > - vc->common->smps_volra_reg); > -- vc->cfg_channel |= CFG_CHANNEL_RAV; > -+ vc->cfg_channel |= vc_cfg_bits->rav; > - > - if (vc->cmd_reg_addr) { > - voltdm->rmw(vc->smps_cmdra_mask, > - vc->cmd_reg_addr << __ffs(vc- > >smps_cmdra_mask), > - vc->common->smps_cmdra_reg); > -- vc->cfg_channel |= CFG_CHANNEL_RAC | > CFG_CHANNEL_RACEN; > -+ vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen; > - } > - > - /* Set up the on, inactive, retention and off voltage */ > -@@ -321,7 +359,7 @@ void __init omap_vc_init_channel(struct > voltagedomain *voltdm) > - (ret_vsel << vc->common->cmd_ret_shift) | > - (off_vsel << vc->common->cmd_off_shift)); > - voltdm->write(val, vc->cmdval_reg); > -- vc->cfg_channel |= CFG_CHANNEL_CMD; > -+ vc->cfg_channel |= vc_cfg_bits->cmd; > - > - /* Channel configuration */ > - omap_vc_config_channel(voltdm); > -diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h > -index c577f28..ec50643 100644 > ---- a/arch/arm/mach-omap2/vc.h > -+++ b/arch/arm/mach-omap2/vc.h > -@@ -64,6 +64,7 @@ struct omap_vc_common { > - > - /* omap_vc_channel.flags values */ > - #define OMAP_VC_CHANNEL_DEFAULT BIT(0) > -+#define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1) > - > - /** > - * struct omap_vc_channel - VC per-instance data > -diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach- > omap2/vc44xx_data.c > -index 148be18..0a4fc37 100644 > ---- a/arch/arm/mach-omap2/vc44xx_data.c > -+++ b/arch/arm/mach-omap2/vc44xx_data.c > -@@ -52,7 +52,7 @@ static const struct omap_vc_common > omap4_vc_common = { > - > - /* VC instance data for each controllable voltage line */ > - struct omap_vc_channel omap4_vc_mpu = { > -- .flags = OMAP_VC_CHANNEL_DEFAULT, > -+ .flags = OMAP_VC_CHANNEL_DEFAULT | > OMAP_VC_CHANNEL_CFG_MUTANT, > - .common = &omap4_vc_common, > - .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, > - .smps_sa_mask = > OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0127-OMAP3-VC-use- > last-nominal-voltage-setting-to-get-cur.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get- > cur.patch > deleted file mode 100644 > index 6992056..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0127-OMAP3-VC-use-last- > nominal-voltage-setting-to-get-cur.patch > +++ /dev/null > @@ -1,31 +0,0 @@ > -From a8ee49ce71fcdf4e85720adabe9aeed2850678cc Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 18 Jul 2011 15:31:00 -0700 > -Subject: [PATCH 127/149] OMAP3+: VC: use last nominal voltage setting to get > current_vsel > - > -Instead of reading current vsel value from the VP's voltage register, > -just use current nominal voltage translated into vsel via the PMIC. > - > -Doing this allows VC bypass scaling to work even without a VP configured. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 9e51782..cee8fba 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -129,7 +129,7 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - volt_data = NULL; > - > - *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); > -- *current_vsel = voltdm->read(vdd->vp_data->voltage); > -+ *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); > - > - /* Setting the ON voltage to the new target voltage */ > - vc_cmdval = voltdm->read(vc->cmdval_reg); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP- > cleanup-move-VP-instance-into-voltdm-misc.-.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP- > instance-into-voltdm-misc.-.patch > deleted file mode 100644 > index 1b153ca..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP-cleanup- > move-VP-instance-into-voltdm-misc.-.patch > +++ /dev/null > @@ -1,643 +0,0 @@ > -From 00a526b77cb5b54dbf2086c63936629845b7f980 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 4 Apr 2011 15:25:07 -0700 > -Subject: [PATCH 128/149] OMAP3+: VP: cleanup: move VP instance into > voltdm, misc. renames > - > -- move VP instance struct from vdd_info into struct voltage domain > -- remove _data suffix from structure name > -- rename vp_ prefix from vp_common field: accesses are now vp->common > -- move vp_enabled bool from vdd_info into VP instance > -- remove remaining references to omap_vdd_info > - > -No functional changes. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 11 +-- > - arch/arm/mach-omap2/voltage.c | 4 +- > - arch/arm/mach-omap2/voltage.h | 6 +-- > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 10 +-- > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 ++--- > - arch/arm/mach-omap2/vp.c | 88 ++++++++++++------------- > - arch/arm/mach-omap2/vp.h | 24 ++++--- > - arch/arm/mach-omap2/vp3xxx_data.c | 10 ++-- > - arch/arm/mach-omap2/vp44xx_data.c | 14 ++-- > - 9 files changed, 83 insertions(+), 99 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index cee8fba..7058585 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -98,11 +98,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, > - struct omap_vc_channel *vc = voltdm->vc; > - struct omap_vdd_info *vdd = voltdm->vdd; > - struct omap_volt_data *volt_data; > -- const struct omap_vp_common_data *vp_common; > - u32 vc_cmdval, vp_errgain_val; > - > -- vp_common = vdd->vp_data->vp_common; > -- > - /* Check if sufficient pmic info is available for this vdd */ > - if (!voltdm->pmic) { > - pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", > -@@ -139,12 +136,12 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - > - /* Setting vp errorgain based on the voltage */ > - if (volt_data) { > -- vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); > -+ vp_errgain_val = voltdm->read(voltdm->vp->vpconfig); > - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; > -- vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; > -+ vp_errgain_val &= voltdm->vp->common- > >vpconfig_errorgain_mask; > - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << > -- vp_common->vpconfig_errorgain_shift; > -- voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); > -+ voltdm->vp->common->vpconfig_errorgain_shift; > -+ voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); > - } > - > - return 0; > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 94f7fc4..c22b53c 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -81,11 +81,11 @@ static int __init _config_common_vdd_data(struct > voltagedomain *voltdm) > - > - /* Generic voltage parameters */ > - vdd->volt_scale = omap_vp_forceupdate_scale; > -- vdd->vp_enabled = false; > -+ voltdm->vp->enabled = false; > - > - vdd->vp_rt_data.vpconfig_erroroffset = > - (voltdm->pmic->vp_erroroffset << > -- vdd->vp_data->vp_common->vpconfig_erroroffset_shift); > -+ voltdm->vp->common->vpconfig_erroroffset_shift); > - > - timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; > - vdd->vp_rt_data.vlimitto_timeout = timeout_val; > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index a0ae5c6..65f94c7 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -68,6 +68,7 @@ struct voltagedomain { > - struct list_head pwrdm_list; > - struct omap_vc_channel *vc; > - const struct omap_vfsm_instance *vfsm; > -+ struct omap_vp_instance *vp; > - struct omap_voltdm_pmic *pmic; > - > - /* VC/VP register access functions: SoC specific */ > -@@ -134,21 +135,16 @@ struct omap_voltdm_pmic { > - * > - * @volt_data : voltage table having the distinct voltages supported > - * by the domain and other associated per voltage data. > -- * @vp_data : the register values, shifts, masks for various > -- * vp registers > - * @vp_rt_data : VP data derived at runtime, not predefined > - * @debug_dir : debug directory for this voltage domain. > - * @curr_volt : current voltage for this vdd. > -- * @vp_enabled : flag to keep track of whether vp is enabled or > not > - * @volt_scale : API to scale the voltage of the vdd. > - */ > - struct omap_vdd_info { > - struct omap_volt_data *volt_data; > -- struct omap_vp_instance_data *vp_data; > - struct omap_vp_runtime_data vp_rt_data; > - struct dentry *debug_dir; > - u32 curr_volt; > -- bool vp_enabled; > - > - int (*volt_scale) (struct voltagedomain *voltdm, > - unsigned long target_volt); > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index 4ea9a7b..4db2c6c 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -37,9 +37,7 @@ static const struct omap_vfsm_instance > omap3_vdd1_vfsm = { > - .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, > - }; > - > --static struct omap_vdd_info omap3_vdd1_info = { > -- .vp_data = &omap3_vp1_data, > --}; > -+static struct omap_vdd_info omap3_vdd1_info; > - > - static const struct omap_vfsm_instance omap3_vdd2_vfsm = { > - .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, > -@@ -47,9 +45,7 @@ static const struct omap_vfsm_instance > omap3_vdd2_vfsm = { > - .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, > - }; > - > --static struct omap_vdd_info omap3_vdd2_info = { > -- .vp_data = &omap3_vp2_data, > --}; > -+static struct omap_vdd_info omap3_vdd2_info; > - > - static struct voltagedomain omap3_voltdm_mpu = { > - .name = "mpu_iva", > -@@ -59,6 +55,7 @@ static struct voltagedomain omap3_voltdm_mpu = { > - .rmw = omap3_prm_vcvp_rmw, > - .vc = &omap3_vc_mpu, > - .vfsm = &omap3_vdd1_vfsm, > -+ .vp = &omap3_vp_mpu, > - .vdd = &omap3_vdd1_info, > - }; > - > -@@ -70,6 +67,7 @@ static struct voltagedomain omap3_voltdm_core = { > - .rmw = omap3_prm_vcvp_rmw, > - .vc = &omap3_vc_core, > - .vfsm = &omap3_vdd2_vfsm, > -+ .vp = &omap3_vp_core, > - .vdd = &omap3_vdd2_info, > - }; > - > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index dd4bd22..3e7cb4e 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -36,25 +36,19 @@ static const struct omap_vfsm_instance > omap4_vdd_mpu_vfsm = { > - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, > - }; > - > --static struct omap_vdd_info omap4_vdd_mpu_info = { > -- .vp_data = &omap4_vp_mpu_data, > --}; > -+static struct omap_vdd_info omap4_vdd_mpu_info; > - > - static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { > - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, > - }; > - > --static struct omap_vdd_info omap4_vdd_iva_info = { > -- .vp_data = &omap4_vp_iva_data, > --}; > -+static struct omap_vdd_info omap4_vdd_iva_info; > - > - static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { > - .voltsetup_reg = > OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, > - }; > - > --static struct omap_vdd_info omap4_vdd_core_info = { > -- .vp_data = &omap4_vp_core_data, > --}; > -+static struct omap_vdd_info omap4_vdd_core_info; > - > - static struct voltagedomain omap4_voltdm_mpu = { > - .name = "mpu", > -@@ -64,6 +58,7 @@ static struct voltagedomain omap4_voltdm_mpu = { > - .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_mpu, > - .vfsm = &omap4_vdd_mpu_vfsm, > -+ .vp = &omap4_vp_mpu, > - .vdd = &omap4_vdd_mpu_info, > - }; > - > -@@ -75,6 +70,7 @@ static struct voltagedomain omap4_voltdm_iva = { > - .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_iva, > - .vfsm = &omap4_vdd_iva_vfsm, > -+ .vp = &omap4_vp_iva, > - .vdd = &omap4_vdd_iva_info, > - }; > - > -@@ -86,6 +82,7 @@ static struct voltagedomain omap4_voltdm_core = { > - .rmw = omap4_prm_vcvp_rmw, > - .vc = &omap4_vc_core, > - .vfsm = &omap4_vdd_core_vfsm, > -+ .vp = &omap4_vp_core, > - .vdd = &omap4_vdd_core_info, > - }; > - > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index a3afcbe..53d6018 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -14,7 +14,7 @@ static void __init vp_debugfs_init(struct voltagedomain > *voltdm); > - > - static void vp_latch_vsel(struct voltagedomain *voltdm) > - { > -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ struct omap_vp_instance *vp = voltdm->vp; > - u32 vpconfig; > - unsigned long uvdc; > - char vsel; > -@@ -35,14 +35,14 @@ static void vp_latch_vsel(struct voltagedomain > *voltdm) > - vsel = voltdm->pmic->uv_to_vsel(uvdc); > - > - vpconfig = voltdm->read(vp->vpconfig); > -- vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | > -- vp->vp_common->vpconfig_initvdd); > -- vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; > -+ vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | > -+ vp->common->vpconfig_initvdd); > -+ vpconfig |= vsel << vp->common->vpconfig_initvoltage_shift; > - > - voltdm->write(vpconfig, vp->vpconfig); > - > - /* Trigger initVDD value copy to voltage processor */ > -- voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd), > -+ voltdm->write((vpconfig | vp->common->vpconfig_initvdd), > - vp->vpconfig); > - > - /* Clear initVDD copy trigger bit */ > -@@ -52,7 +52,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) > - /* Generic voltage init functions */ > - void __init omap_vp_init(struct voltagedomain *voltdm) > - { > -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ struct omap_vp_instance *vp = voltdm->vp; > - struct omap_vdd_info *vdd = voltdm->vdd; > - u32 vp_val; > - > -@@ -64,28 +64,28 @@ void __init omap_vp_init(struct voltagedomain > *voltdm) > - > - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | > - (vdd->vp_rt_data.vpconfig_errorgain << > -- vp->vp_common->vpconfig_errorgain_shift) | > -- vp->vp_common->vpconfig_timeouten; > -+ vp->common->vpconfig_errorgain_shift) | > -+ vp->common->vpconfig_timeouten; > - voltdm->write(vp_val, vp->vpconfig); > - > - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << > -- vp->vp_common->vstepmin_smpswaittimemin_shift) | > -+ vp->common->vstepmin_smpswaittimemin_shift) | > - (vdd->vp_rt_data.vstepmin_stepmin << > -- vp->vp_common->vstepmin_stepmin_shift)); > -+ vp->common->vstepmin_stepmin_shift)); > - voltdm->write(vp_val, vp->vstepmin); > - > - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << > -- vp->vp_common->vstepmax_smpswaittimemax_shift) | > -+ vp->common->vstepmax_smpswaittimemax_shift) | > - (vdd->vp_rt_data.vstepmax_stepmax << > -- vp->vp_common->vstepmax_stepmax_shift)); > -+ vp->common->vstepmax_stepmax_shift)); > - voltdm->write(vp_val, vp->vstepmax); > - > - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << > -- vp->vp_common->vlimitto_vddmax_shift) | > -+ vp->common->vlimitto_vddmax_shift) | > - (vdd->vp_rt_data.vlimitto_vddmin << > -- vp->vp_common->vlimitto_vddmin_shift) | > -+ vp->common->vlimitto_vddmin_shift) | > - (vdd->vp_rt_data.vlimitto_timeout << > -- vp->vp_common->vlimitto_timeout_shift)); > -+ vp->common->vlimitto_timeout_shift)); > - voltdm->write(vp_val, vp->vlimitto); > - > - vp_debugfs_init(voltdm); > -@@ -95,7 +95,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) > - int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, > - unsigned long target_volt) > - { > -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ struct omap_vp_instance *vp = voltdm->vp; > - u32 vpconfig; > - u8 target_vsel, current_vsel; > - int ret, timeout = 0; > -@@ -109,8 +109,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - * is <3us > - */ > - while (timeout++ < VP_TRANXDONE_TIMEOUT) { > -- vp->vp_common->ops->clear_txdone(vp->id); > -- if (!vp->vp_common->ops->check_txdone(vp->id)) > -+ vp->common->ops->clear_txdone(vp->id); > -+ if (!vp->common->ops->check_txdone(vp->id)) > - break; > - udelay(1); > - } > -@@ -122,19 +122,19 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - > - /* Configure for VP-Force Update */ > - vpconfig = voltdm->read(vp->vpconfig); > -- vpconfig &= ~(vp->vp_common->vpconfig_initvdd | > -- vp->vp_common->vpconfig_forceupdate | > -- vp->vp_common->vpconfig_initvoltage_mask); > -+ vpconfig &= ~(vp->common->vpconfig_initvdd | > -+ vp->common->vpconfig_forceupdate | > -+ vp->common->vpconfig_initvoltage_mask); > - vpconfig |= ((target_vsel << > -- vp->vp_common->vpconfig_initvoltage_shift)); > -+ vp->common->vpconfig_initvoltage_shift)); > - voltdm->write(vpconfig, vp->vpconfig); > - > - /* Trigger initVDD value copy to voltage processor */ > -- vpconfig |= vp->vp_common->vpconfig_initvdd; > -+ vpconfig |= vp->common->vpconfig_initvdd; > - voltdm->write(vpconfig, vp->vpconfig); > - > - /* Force update of voltage */ > -- vpconfig |= vp->vp_common->vpconfig_forceupdate; > -+ vpconfig |= vp->common->vpconfig_forceupdate; > - voltdm->write(vpconfig, vp->vpconfig); > - > - /* > -@@ -142,7 +142,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - * Depends on SMPSWAITTIMEMIN/MAX and voltage change > - */ > - timeout = 0; > -- omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id), > -+ omap_test_timeout(vp->common->ops->check_txdone(vp->id), > - VP_TRANXDONE_TIMEOUT, timeout); > - if (timeout >= VP_TRANXDONE_TIMEOUT) > - pr_err("%s: vdd_%s TRANXDONE timeout exceeded." > -@@ -157,8 +157,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - */ > - timeout = 0; > - while (timeout++ < VP_TRANXDONE_TIMEOUT) { > -- vp->vp_common->ops->clear_txdone(vp->id); > -- if (!vp->vp_common->ops->check_txdone(vp->id)) > -+ vp->common->ops->clear_txdone(vp->id); > -+ if (!vp->common->ops->check_txdone(vp->id)) > - break; > - udelay(1); > - } > -@@ -170,10 +170,10 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - > - vpconfig = voltdm->read(vp->vpconfig); > - /* Clear initVDD copy trigger bit */ > -- vpconfig &= ~vp->vp_common->vpconfig_initvdd; > -+ vpconfig &= ~vp->common->vpconfig_initvdd; > - voltdm->write(vpconfig, vp->vpconfig); > - /* Clear force bit */ > -- vpconfig &= ~vp->vp_common->vpconfig_forceupdate; > -+ vpconfig &= ~vp->common->vpconfig_forceupdate; > - voltdm->write(vpconfig, vp->vpconfig); > - > - return 0; > -@@ -187,8 +187,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - */ > - unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) > - { > -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -- struct omap_vdd_info *vdd; > -+ struct omap_vp_instance *vp = voltdm->vp; > - u8 curr_vsel; > - > - if (!voltdm || IS_ERR(voltdm)) { > -@@ -196,7 +195,6 @@ unsigned long omap_vp_get_curr_volt(struct > voltagedomain *voltdm) > - return 0; > - } > - > -- vdd = voltdm->vdd; > - if (!voltdm->read) { > - pr_err("%s: No read API for reading vdd_%s regs\n", > - __func__, voltdm->name); > -@@ -223,8 +221,7 @@ unsigned long omap_vp_get_curr_volt(struct > voltagedomain *voltdm) > - */ > - void omap_vp_enable(struct voltagedomain *voltdm) > - { > -- struct omap_vp_instance_data *vp; > -- struct omap_vdd_info *vdd; > -+ struct omap_vp_instance *vp; > - u32 vpconfig; > - > - if (!voltdm || IS_ERR(voltdm)) { > -@@ -232,8 +229,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) > - return; > - } > - > -- vdd = voltdm->vdd; > -- vp = voltdm->vdd->vp_data; > -+ vp = voltdm->vp; > - if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > -@@ -241,16 +237,16 @@ void omap_vp_enable(struct voltagedomain > *voltdm) > - } > - > - /* If VP is already enabled, do nothing. Return */ > -- if (vdd->vp_enabled) > -+ if (vp->enabled) > - return; > - > - vp_latch_vsel(voltdm); > - > - /* Enable VP */ > - vpconfig = voltdm->read(vp->vpconfig); > -- vpconfig |= vp->vp_common->vpconfig_vpenable; > -+ vpconfig |= vp->common->vpconfig_vpenable; > - voltdm->write(vpconfig, vp->vpconfig); > -- vdd->vp_enabled = true; > -+ vp->enabled = true; > - } > - > - /** > -@@ -262,8 +258,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) > - */ > - void omap_vp_disable(struct voltagedomain *voltdm) > - { > -- struct omap_vp_instance_data *vp; > -- struct omap_vdd_info *vdd; > -+ struct omap_vp_instance *vp; > - u32 vpconfig; > - int timeout; > - > -@@ -272,8 +267,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) > - return; > - } > - > -- vdd = voltdm->vdd; > -- vp = voltdm->vdd->vp_data; > -+ vp = voltdm->vp; > - if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > - __func__, voltdm->name); > -@@ -281,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) > - } > - > - /* If VP is already disabled, do nothing. Return */ > -- if (!vdd->vp_enabled) { > -+ if (!vp->enabled) { > - pr_warning("%s: Trying to disable VP for vdd_%s when" > - "it is already disabled\n", __func__, voltdm->name); > - return; > -@@ -289,7 +283,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) > - > - /* Disable VP */ > - vpconfig = voltdm->read(vp->vpconfig); > -- vpconfig &= ~vp->vp_common->vpconfig_vpenable; > -+ vpconfig &= ~vp->common->vpconfig_vpenable; > - voltdm->write(vpconfig, vp->vpconfig); > - > - /* > -@@ -302,7 +296,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) > - pr_warning("%s: vdd_%s idle timedout\n", > - __func__, voltdm->name); > - > -- vdd->vp_enabled = false; > -+ vp->enabled = false; > - > - return; > - } > -@@ -311,7 +305,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) > - static int vp_volt_debug_get(void *data, u64 *val) > - { > - struct voltagedomain *voltdm = (struct voltagedomain *)data; > -- struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; > -+ struct omap_vp_instance *vp = voltdm->vp; > - struct omap_vdd_info *vdd = voltdm->vdd; > - u8 vsel; > - > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 79aa8d3..1d63960 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -45,7 +45,7 @@ struct omap_vp_ops { > - }; > - > - /** > -- * struct omap_vp_common_data - register data common to all VDDs > -+ * struct omap_vp_common - register data common to all VDDs > - * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG > reg > - * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the > PRM_VP*_CONFIG reg > - * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG > reg > -@@ -67,7 +67,7 @@ struct omap_vp_ops { > - * bitfield - remove one > - * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix! > - */ > --struct omap_vp_common_data { > -+struct omap_vp_common { > - u32 vpconfig_errorgain_mask; > - u32 vpconfig_initvoltage_mask; > - u32 vpconfig_timeouten; > -@@ -89,18 +89,19 @@ struct omap_vp_common_data { > - }; > - > - /** > -- * struct omap_vp_instance_data - VP register offsets (per-VDD) > -- * @vp_common: pointer to struct omap_vp_common_data * for this SoC > -+ * struct omap_vp_instance - VP register offsets (per-VDD) > -+ * @common: pointer to struct omap_vp_common * for this SoC > - * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start > - * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start > - * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start > - * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start > - * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start > -+ * @enabled: flag to keep track of whether vp is enabled or not > - * > - * XXX vp_common is probably not needed since it is per-SoC > - */ > --struct omap_vp_instance_data { > -- const struct omap_vp_common_data *vp_common; > -+struct omap_vp_instance { > -+ const struct omap_vp_common *common; > - u8 vpconfig; > - u8 vstepmin; > - u8 vstepmax; > -@@ -108,6 +109,7 @@ struct omap_vp_instance_data { > - u8 vstatus; > - u8 voltage; > - u8 id; > -+ bool enabled; > - }; > - > - /** > -@@ -139,12 +141,12 @@ struct omap_vp_runtime_data { > - u8 vlimitto_vddmax; > - }; > - > --extern struct omap_vp_instance_data omap3_vp1_data; > --extern struct omap_vp_instance_data omap3_vp2_data; > -+extern struct omap_vp_instance omap3_vp_mpu; > -+extern struct omap_vp_instance omap3_vp_core; > - > --extern struct omap_vp_instance_data omap4_vp_mpu_data; > --extern struct omap_vp_instance_data omap4_vp_iva_data; > --extern struct omap_vp_instance_data omap4_vp_core_data; > -+extern struct omap_vp_instance omap4_vp_mpu; > -+extern struct omap_vp_instance omap4_vp_iva; > -+extern struct omap_vp_instance omap4_vp_core; > - > - void omap_vp_init(struct voltagedomain *voltdm); > - void omap_vp_enable(struct voltagedomain *voltdm); > -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach- > omap2/vp3xxx_data.c > -index b01d333..79c3df9 100644 > ---- a/arch/arm/mach-omap2/vp3xxx_data.c > -+++ b/arch/arm/mach-omap2/vp3xxx_data.c > -@@ -36,7 +36,7 @@ static const struct omap_vp_ops omap3_vp_ops = { > - * VP data common to 34xx/36xx chips > - * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. > - */ > --static const struct omap_vp_common_data omap3_vp_common = { > -+static const struct omap_vp_common omap3_vp_common = { > - .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, > - .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, > - .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, > -@@ -56,9 +56,9 @@ static const struct omap_vp_common_data > omap3_vp_common = { > - .ops = &omap3_vp_ops, > - }; > - > --struct omap_vp_instance_data omap3_vp1_data = { > -+struct omap_vp_instance omap3_vp_mpu = { > - .id = OMAP3_VP_VDD_MPU_ID, > -- .vp_common = &omap3_vp_common, > -+ .common = &omap3_vp_common, > - .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, > - .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, > - .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET, > -@@ -67,9 +67,9 @@ struct omap_vp_instance_data omap3_vp1_data = { > - .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, > - }; > - > --struct omap_vp_instance_data omap3_vp2_data = { > -+struct omap_vp_instance omap3_vp_core = { > - .id = OMAP3_VP_VDD_CORE_ID, > -- .vp_common = &omap3_vp_common, > -+ .common = &omap3_vp_common, > - .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, > - .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, > - .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET, > -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach- > omap2/vp44xx_data.c > -index 9704c7b..8f75cd9 100644 > ---- a/arch/arm/mach-omap2/vp44xx_data.c > -+++ b/arch/arm/mach-omap2/vp44xx_data.c > -@@ -36,7 +36,7 @@ static const struct omap_vp_ops omap4_vp_ops = { > - * VP data common to 44xx chips > - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. > - */ > --static const struct omap_vp_common_data omap4_vp_common = { > -+static const struct omap_vp_common omap4_vp_common = { > - .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, > - .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, > - .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, > -@@ -56,9 +56,9 @@ static const struct omap_vp_common_data > omap4_vp_common = { > - .ops = &omap4_vp_ops, > - }; > - > --struct omap_vp_instance_data omap4_vp_mpu_data = { > -+struct omap_vp_instance omap4_vp_mpu = { > - .id = OMAP4_VP_VDD_MPU_ID, > -- .vp_common = &omap4_vp_common, > -+ .common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, > - .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET, > -@@ -67,9 +67,9 @@ struct omap_vp_instance_data omap4_vp_mpu_data = > { > - .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, > - }; > - > --struct omap_vp_instance_data omap4_vp_iva_data = { > -+struct omap_vp_instance omap4_vp_iva = { > - .id = OMAP4_VP_VDD_IVA_ID, > -- .vp_common = &omap4_vp_common, > -+ .common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, > - .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET, > -@@ -78,9 +78,9 @@ struct omap_vp_instance_data omap4_vp_iva_data = { > - .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, > - }; > - > --struct omap_vp_instance_data omap4_vp_core_data = { > -+struct omap_vp_instance omap4_vp_core = { > - .id = OMAP4_VP_VDD_CORE_ID, > -- .vp_common = &omap4_vp_common, > -+ .common = &omap4_vp_common, > - .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, > - .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, > - .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3- > voltage-remove-unneeded-debugfs-interface.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3-voltage-remove- > unneeded-debugfs-interface.patch > deleted file mode 100644 > index fe5139f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3-voltage- > remove-unneeded-debugfs-interface.patch > +++ /dev/null > @@ -1,317 +0,0 @@ > -From fc1db2a579514eb36f5091b656133a6a9c2cbc0d Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 5 Apr 2011 14:39:11 -0700 > -Subject: [PATCH 129/149] OMAP3+: voltage: remove unneeded debugfs > interface > - > -Remove read-only debugfs interface to VP values. Most of the values > -are init-time only and never change. Current voltage value should be > -retreived from the (eventual) regulator framework interface to the > -voltage domain. > - > -Fixes to original version provided by Nishanth Menon <nm@ti.com> > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/smartreflex.c | 29 +++++++++----- > - arch/arm/mach-omap2/voltage.c | 78 ------------------------------------- > - arch/arm/mach-omap2/voltage.h | 3 - > - arch/arm/mach-omap2/vp.c | 63 ----------------------------- > - 4 files changed, 19 insertions(+), 154 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach- > omap2/smartreflex.c > -index be6add0..edb94f2 100644 > ---- a/arch/arm/mach-omap2/smartreflex.c > -+++ b/arch/arm/mach-omap2/smartreflex.c > -@@ -62,6 +62,7 @@ static LIST_HEAD(sr_list); > - > - static struct omap_sr_class_data *sr_class; > - static struct omap_sr_pmic_data *sr_pmic_data; > -+static struct dentry *sr_dbg_dir; > - > - static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) > - { > -@@ -826,9 +827,10 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), > GFP_KERNEL); > - struct omap_sr_data *pdata = pdev->dev.platform_data; > - struct resource *mem, *irq; > -- struct dentry *vdd_dbg_dir, *nvalue_dir; > -+ struct dentry *nvalue_dir; > - struct omap_volt_data *volt_data; > - int i, ret = 0; > -+ char *name; > - > - if (!sr_info) { > - dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", > -@@ -898,18 +900,25 @@ static int __init omap_sr_probe(struct > platform_device *pdev) > - } > - > - dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", > __func__); > -+ if (!sr_dbg_dir) { > -+ sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); > -+ if (!sr_dbg_dir) { > -+ ret = PTR_ERR(sr_dbg_dir); > -+ pr_err("%s:sr debugfs dir creation failed(%d)\n", > -+ __func__, ret); > -+ goto err_iounmap; > -+ } > -+ } > - > -- /* > -- * If the voltage domain debugfs directory is not created, do > -- * not try to create rest of the debugfs entries. > -- */ > -- vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); > -- if (!vdd_dbg_dir) { > -- ret = -EINVAL; > -+ name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); > -+ if (!name) { > -+ dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n", > -+ __func__); > -+ ret = -ENOMEM; > - goto err_iounmap; > - } > -- > -- sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); > -+ sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir); > -+ kfree(name); > - if (IS_ERR(sr_info->dbg_dir)) { > - dev_err(&pdev->dev, "%s: Unable to create debugfs > directory\n", > - __func__); > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index c22b53c..eaa5f93 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -43,9 +43,6 @@ > - > - static LIST_HEAD(voltdm_list); > - > --#define VOLTAGE_DIR_SIZE 16 > --static struct dentry *voltage_dir; > -- > - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) > - { > - char *sys_ck_name; > -@@ -102,51 +99,6 @@ static int __init _config_common_vdd_data(struct > voltagedomain *voltdm) > - return 0; > - } > - > --static int nom_volt_debug_get(void *data, u64 *val) > --{ > -- struct voltagedomain *voltdm = (struct voltagedomain *)data; > -- > -- if (!voltdm) { > -- pr_warning("Wrong paramater passed\n"); > -- return -EINVAL; > -- } > -- > -- *val = omap_voltage_get_nom_volt(voltdm); > -- > -- return 0; > --} > -- > --DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, > NULL, > -- "%llu\n"); > --static void __init vdd_debugfs_init(struct voltagedomain *voltdm) > --{ > -- char *name; > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- > -- name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL); > -- if (!name) { > -- pr_warning("%s: Unable to allocate memory for debugfs" > -- " directory name for vdd_%s", > -- __func__, voltdm->name); > -- return; > -- } > -- strcpy(name, "vdd_"); > -- strcat(name, voltdm->name); > -- > -- vdd->debug_dir = debugfs_create_dir(name, voltage_dir); > -- kfree(name); > -- if (IS_ERR(vdd->debug_dir)) { > -- pr_warning("%s: Unable to create debugfs directory for" > -- " vdd_%s\n", __func__, voltdm->name); > -- vdd->debug_dir = NULL; > -- return; > -- } > -- > -- (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, > -- vdd->debug_dir, (void *) voltdm, > -- &nom_volt_debug_fops); > --} > -- > - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) > - { > - int ret = -EINVAL; > -@@ -342,31 +294,6 @@ int omap_voltage_register_pmic(struct > voltagedomain *voltdm, > - } > - > - /** > -- * omap_voltage_get_dbgdir() - API to get pointer to the debugfs directory > -- * corresponding to a voltage domain. > -- * > -- * @voltdm: pointer to the VDD whose debug directory is required. > -- * > -- * This API returns pointer to the debugfs directory corresponding > -- * to the voltage domain. Should be used by drivers requiring to > -- * add any debug entry for a particular voltage domain. Returns NULL > -- * in case of error. > -- */ > --struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd; > -- > -- if (!voltdm || IS_ERR(voltdm)) { > -- pr_warning("%s: VDD specified does not exist!\n", __func__); > -- return NULL; > -- } > -- > -- vdd = voltdm->vdd; > -- > -- return vdd->debug_dir; > --} > -- > --/** > - * omap_change_voltscale_method() - API to change the voltage scaling > method. > - * @voltdm: pointer to the VDD whose voltage scaling method > - * has to be changed. > -@@ -418,10 +345,6 @@ int __init omap_voltage_late_init(void) > - return -EINVAL; > - } > - > -- voltage_dir = debugfs_create_dir("voltage", NULL); > -- if (IS_ERR(voltage_dir)) > -- pr_err("%s: Unable to create voltage debugfs main dir\n", > -- __func__); > - list_for_each_entry(voltdm, &voltdm_list, node) { > - if (!voltdm->scalable) > - continue; > -@@ -434,7 +357,6 @@ int __init omap_voltage_late_init(void) > - if (voltdm->vdd) { > - if (omap_vdd_data_configure(voltdm)) > - continue; > -- vdd_debugfs_init(voltdm); > - omap_vp_init(voltdm); > - } > - } > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 65f94c7..5261703 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -136,14 +136,12 @@ struct omap_voltdm_pmic { > - * @volt_data : voltage table having the distinct voltages supported > - * by the domain and other associated per voltage data. > - * @vp_rt_data : VP data derived at runtime, not predefined > -- * @debug_dir : debug directory for this voltage domain. > - * @curr_volt : current voltage for this vdd. > - * @volt_scale : API to scale the voltage of the vdd. > - */ > - struct omap_vdd_info { > - struct omap_volt_data *volt_data; > - struct omap_vp_runtime_data vp_rt_data; > -- struct dentry *debug_dir; > - u32 curr_volt; > - > - int (*volt_scale) (struct voltagedomain *voltdm, > -@@ -158,7 +156,6 @@ void omap_voltage_get_volttable(struct > voltagedomain *voltdm, > - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain > *voltdm, > - unsigned long volt); > - unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); > --struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); > - #ifdef CONFIG_PM > - int omap_voltage_register_pmic(struct voltagedomain *voltdm, > - struct omap_voltdm_pmic *pmic); > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index 53d6018..c9a315f 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -1,6 +1,5 @@ > - #include <linux/kernel.h> > - #include <linux/init.h> > --#include <linux/debugfs.h> > - > - #include <plat/common.h> > - > -@@ -10,8 +9,6 @@ > - #include "prm-regbits-44xx.h" > - #include "prm44xx.h" > - > --static void __init vp_debugfs_init(struct voltagedomain *voltdm); > -- > - static void vp_latch_vsel(struct voltagedomain *voltdm) > - { > - struct omap_vp_instance *vp = voltdm->vp; > -@@ -87,8 +84,6 @@ void __init omap_vp_init(struct voltagedomain *voltdm) > - (vdd->vp_rt_data.vlimitto_timeout << > - vp->common->vlimitto_timeout_shift)); > - voltdm->write(vp_val, vp->vlimitto); > -- > -- vp_debugfs_init(voltdm); > - } > - > - /* VP force update method of voltage scaling */ > -@@ -300,61 +295,3 @@ void omap_vp_disable(struct voltagedomain > *voltdm) > - > - return; > - } > -- > --/* Voltage debugfs support */ > --static int vp_volt_debug_get(void *data, u64 *val) > --{ > -- struct voltagedomain *voltdm = (struct voltagedomain *)data; > -- struct omap_vp_instance *vp = voltdm->vp; > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- u8 vsel; > -- > -- if (!vdd) { > -- pr_warning("Wrong paramater passed\n"); > -- return -EINVAL; > -- } > -- > -- vsel = voltdm->read(vp->voltage); > -- > -- if (!voltdm->pmic->vsel_to_uv) { > -- pr_warning("PMIC function to convert vsel to voltage" > -- "in uV not registerd\n"); > -- return -EINVAL; > -- } > -- > -- *val = voltdm->pmic->vsel_to_uv(vsel); > -- return 0; > --} > -- > --DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, > "%llu\n"); > -- > --static void __init vp_debugfs_init(struct voltagedomain *voltdm) > --{ > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- struct dentry *debug_dir; > -- > -- debug_dir = debugfs_create_dir("vp", vdd->debug_dir); > -- if (IS_ERR(debug_dir)) > -- pr_err("%s: Unable to create VP debugfs dir dir\n", __func__); > -- > -- (void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir, > -- &(vdd->vp_rt_data.vpconfig_errorgain)); > -- (void) debugfs_create_x16("smpswaittimemin", S_IRUGO, > -- debug_dir, > -- &(vdd- > >vp_rt_data.vstepmin_smpswaittimemin)); > -- (void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir, > -- &(vdd->vp_rt_data.vstepmin_stepmin)); > -- (void) debugfs_create_x16("smpswaittimemax", S_IRUGO, > -- debug_dir, > -- &(vdd- > >vp_rt_data.vstepmax_smpswaittimemax)); > -- (void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir, > -- &(vdd->vp_rt_data.vstepmax_stepmax)); > -- (void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir, > -- &(vdd->vp_rt_data.vlimitto_vddmax)); > -- (void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir, > -- &(vdd->vp_rt_data.vlimitto_vddmin)); > -- (void) debugfs_create_x16("timeout", S_IRUGO, debug_dir, > -- &(vdd->vp_rt_data.vlimitto_timeout)); > -- (void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir, > -- (void *) voltdm, &vp_volt_debug_fops); > --} > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP- > struct-omap_vp_common-replace-shift-with-__.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP-struct- > omap_vp_common-replace-shift-with-__.patch > deleted file mode 100644 > index 22dff61..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP-struct- > omap_vp_common-replace-shift-with-__.patch > +++ /dev/null > @@ -1,214 +0,0 @@ > -From 19b2a24927050ee82e6f587ac47f484f1b114a57 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 4 Apr 2011 16:02:28 -0700 > -Subject: [PATCH 130/149] OMAP3+: VP: struct omap_vp_common: replace > shift with __ffs(mask) > - > -In struct omap_vp_common, the shift value can be derived from the mask > -value by using __ffs(), so remove the shift value for the various > -VPCONFIG bitfields, and use __ffs() in the code for the shift value. > - > -While here, rename field names in kerneldoc comment to match actual > -field names in structure. Also, cleanup indendentaion for other VP > -register accesses in omap_vp_init(). > - > -No functional changes. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 2 +- > - arch/arm/mach-omap2/voltage.c | 2 +- > - arch/arm/mach-omap2/vp.c | 29 ++++++++++++++--------------- > - arch/arm/mach-omap2/vp.h | 34 ++++++++++++++-------------------- > - arch/arm/mach-omap2/vp3xxx_data.c | 4 +--- > - arch/arm/mach-omap2/vp44xx_data.c | 4 +--- > - 6 files changed, 32 insertions(+), 43 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 7058585..f64c826 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -140,7 +140,7 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; > - vp_errgain_val &= voltdm->vp->common- > >vpconfig_errorgain_mask; > - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << > -- voltdm->vp->common->vpconfig_errorgain_shift; > -+ __ffs(voltdm->vp->common- > >vpconfig_errorgain_mask); > - voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); > - } > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index eaa5f93..5b16fd1 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -82,7 +82,7 @@ static int __init _config_common_vdd_data(struct > voltagedomain *voltdm) > - > - vdd->vp_rt_data.vpconfig_erroroffset = > - (voltdm->pmic->vp_erroroffset << > -- voltdm->vp->common->vpconfig_erroroffset_shift); > -+ __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); > - > - timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; > - vdd->vp_rt_data.vlimitto_timeout = timeout_val; > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index c9a315f..297d094 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -34,8 +34,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) > - vpconfig = voltdm->read(vp->vpconfig); > - vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | > - vp->common->vpconfig_initvdd); > -- vpconfig |= vsel << vp->common->vpconfig_initvoltage_shift; > -- > -+ vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); > - voltdm->write(vpconfig, vp->vpconfig); > - > - /* Trigger initVDD value copy to voltage processor */ > -@@ -61,28 +60,28 @@ void __init omap_vp_init(struct voltagedomain > *voltdm) > - > - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | > - (vdd->vp_rt_data.vpconfig_errorgain << > -- vp->common->vpconfig_errorgain_shift) | > -+ __ffs(vp->common->vpconfig_errorgain_mask)) | > - vp->common->vpconfig_timeouten; > - voltdm->write(vp_val, vp->vpconfig); > - > - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << > -- vp->common->vstepmin_smpswaittimemin_shift) | > -- (vdd->vp_rt_data.vstepmin_stepmin << > -- vp->common->vstepmin_stepmin_shift)); > -+ vp->common->vstepmin_smpswaittimemin_shift) | > -+ (vdd->vp_rt_data.vstepmin_stepmin << > -+ vp->common->vstepmin_stepmin_shift)); > - voltdm->write(vp_val, vp->vstepmin); > - > - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << > -- vp->common->vstepmax_smpswaittimemax_shift) | > -- (vdd->vp_rt_data.vstepmax_stepmax << > -- vp->common->vstepmax_stepmax_shift)); > -+ vp->common->vstepmax_smpswaittimemax_shift) | > -+ (vdd->vp_rt_data.vstepmax_stepmax << > -+ vp->common->vstepmax_stepmax_shift)); > - voltdm->write(vp_val, vp->vstepmax); > - > - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << > -- vp->common->vlimitto_vddmax_shift) | > -- (vdd->vp_rt_data.vlimitto_vddmin << > -- vp->common->vlimitto_vddmin_shift) | > -- (vdd->vp_rt_data.vlimitto_timeout << > -- vp->common->vlimitto_timeout_shift)); > -+ vp->common->vlimitto_vddmax_shift) | > -+ (vdd->vp_rt_data.vlimitto_vddmin << > -+ vp->common->vlimitto_vddmin_shift) | > -+ (vdd->vp_rt_data.vlimitto_timeout << > -+ vp->common->vlimitto_timeout_shift)); > - voltdm->write(vp_val, vp->vlimitto); > - } > - > -@@ -121,7 +120,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - vp->common->vpconfig_forceupdate | > - vp->common->vpconfig_initvoltage_mask); > - vpconfig |= ((target_vsel << > -- vp->common->vpconfig_initvoltage_shift)); > -+ __ffs(vp->common->vpconfig_initvoltage_mask))); > - voltdm->write(vpconfig, vp->vpconfig); > - > - /* Trigger initVDD value copy to voltage processor */ > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 1d63960..2afe11d 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -46,37 +46,32 @@ struct omap_vp_ops { > - > - /** > - * struct omap_vp_common - register data common to all VDDs > -+ * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the > PRM_VP*_CONFIG reg > - * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG > reg > - * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the > PRM_VP*_CONFIG reg > -- * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG > reg > -+ * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg > - * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg > - * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG > reg > - * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg > - * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG > reg > - * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg > - * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG > reg > -- * @vpconfig_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN > reg > -- * @vpconfig_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in > PRM_VP*_VSTEPMIN reg > -- * @vpconfig_stepmax_shift: VSTEPMAX field shift in the > PRM_VP*_VSTEPMAX reg > -- * @vpconfig_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in > PRM_VP*_VSTEPMAX reg > -- * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in > PRM_VP*_VLIMITTO reg > -- * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in > PRM_VP*_VLIMITTO reg > -- * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in > PRM_VP*_VLIMITTO reg > -- * > -- * XXX It it not necessary to have both a mask and a shift for the same > -- * bitfield - remove one > -- * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix! > -+ * @vstepmin_stepmin_shift: VSTEPMIN field shift in the > PRM_VP*_VSTEPMIN reg > -+ * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in > PRM_VP*_VSTEPMIN reg > -+ * @vstepmax_stepmax_shift: VSTEPMAX field shift in the > PRM_VP*_VSTEPMAX reg > -+ * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in > PRM_VP*_VSTEPMAX reg > -+ * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg > -+ * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg > -+ * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg > - */ > - struct omap_vp_common { > -+ u32 vpconfig_erroroffset_mask; > - u32 vpconfig_errorgain_mask; > - u32 vpconfig_initvoltage_mask; > -- u32 vpconfig_timeouten; > -- u32 vpconfig_initvdd; > -- u32 vpconfig_forceupdate; > -- u32 vpconfig_vpenable; > -- u8 vpconfig_erroroffset_shift; > -- u8 vpconfig_errorgain_shift; > -- u8 vpconfig_initvoltage_shift; > -+ u8 vpconfig_timeouten; > -+ u8 vpconfig_initvdd; > -+ u8 vpconfig_forceupdate; > -+ u8 vpconfig_vpenable; > - u8 vstepmin_stepmin_shift; > - u8 vstepmin_smpswaittimemin_shift; > - u8 vstepmax_stepmax_shift; > -@@ -127,7 +122,6 @@ struct omap_vp_instance { > - * XXX Is this structure really needed? Why not just program the > - * device directly? They are in PRM space, therefore in the WKUP > - * powerdomain, so register contents should not be lost in off-mode. > -- * XXX Some of these fields are incorrectly named, e.g., vstep* > - */ > - struct omap_vp_runtime_data { > - u32 vpconfig_erroroffset; > -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach- > omap2/vp3xxx_data.c > -index 79c3df9..d429c44 100644 > ---- a/arch/arm/mach-omap2/vp3xxx_data.c > -+++ b/arch/arm/mach-omap2/vp3xxx_data.c > -@@ -37,10 +37,8 @@ static const struct omap_vp_ops omap3_vp_ops = { > - * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. > - */ > - static const struct omap_vp_common omap3_vp_common = { > -- .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, > -+ .vpconfig_erroroffset_mask = OMAP3430_ERROROFFSET_MASK, > - .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, > -- .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, > -- .vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT, > - .vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK, > - .vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK, > - .vpconfig_initvdd = OMAP3430_INITVDD_MASK, > -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach- > omap2/vp44xx_data.c > -index 8f75cd9..0daf2a4 100644 > ---- a/arch/arm/mach-omap2/vp44xx_data.c > -+++ b/arch/arm/mach-omap2/vp44xx_data.c > -@@ -37,10 +37,8 @@ static const struct omap_vp_ops omap4_vp_ops = { > - * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. > - */ > - static const struct omap_vp_common omap4_vp_common = { > -- .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, > -+ .vpconfig_erroroffset_mask = OMAP4430_ERROROFFSET_MASK, > - .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, > -- .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, > -- .vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT, > - .vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK, > - .vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK, > - .vpconfig_initvdd = OMAP4430_INITVDD_MASK, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131-OMAP3-VP- > move-SoC-specific-sys-clock-rate-retreival-.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate- > retreival-.patch > deleted file mode 100644 > index 2643c6b..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131-OMAP3-VP-move- > SoC-specific-sys-clock-rate-retreival-.patch > +++ /dev/null > @@ -1,184 +0,0 @@ > -From d0c5c4d43250d9e7aad920ce3e7f5e7d5061be47 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 4 Apr 2011 17:22:28 -0700 > -Subject: [PATCH 131/149] OMAP3+: VP: move SoC-specific sys clock rate > retreival late init > - > -Add sys clock name and rate to struct voltage domain. SoC specific > -voltagedomain init code initializes sys clock name. After clock > -framework is initialized, voltage late init will then use use the > -sys_clk rate to calculate the various timing that depend on that rate. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.c | 47 +++++++++---------------- > - arch/arm/mach-omap2/voltage.h | 5 +++ > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 ++++ > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 8 ++++ > - 4 files changed, 38 insertions(+), 30 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 5b16fd1..533ea38 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -21,10 +21,10 @@ > - > - #include <linux/delay.h> > - #include <linux/io.h> > --#include <linux/clk.h> > - #include <linux/err.h> > - #include <linux/debugfs.h> > - #include <linux/slab.h> > -+#include <linux/clk.h> > - > - #include <plat/common.h> > - > -@@ -45,36 +45,12 @@ static LIST_HEAD(voltdm_list); > - > - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) > - { > -- char *sys_ck_name; > -- struct clk *sys_ck; > -- u32 sys_clk_speed, timeout_val, waittime; > - struct omap_vdd_info *vdd = voltdm->vdd; > -+ u32 sys_clk_rate, timeout_val, waittime; > - > -- /* > -- * XXX Clockfw should handle this, or this should be in a > -- * struct record > -- */ > -- if (cpu_is_omap24xx() || cpu_is_omap34xx()) > -- sys_ck_name = "sys_ck"; > -- else if (cpu_is_omap44xx()) > -- sys_ck_name = "sys_clkin_ck"; > -- else > -- return -EINVAL; > -- > -- /* > -- * Sys clk rate is require to calculate vp timeout value and > -- * smpswaittimemin and smpswaittimemax. > -- */ > -- sys_ck = clk_get(NULL, sys_ck_name); > -- if (IS_ERR(sys_ck)) { > -- pr_warning("%s: Could not get the sys clk to calculate" > -- "various vdd_%s params\n", __func__, voltdm- > >name); > -- return -EINVAL; > -- } > -- sys_clk_speed = clk_get_rate(sys_ck); > -- clk_put(sys_ck); > - /* Divide to avoid overflow */ > -- sys_clk_speed /= 1000; > -+ sys_clk_rate = voltdm->sys_clk.rate / 1000; > -+ WARN_ON(!sys_clk_rate); > - > - /* Generic voltage parameters */ > - vdd->volt_scale = omap_vp_forceupdate_scale; > -@@ -84,13 +60,13 @@ static int __init _config_common_vdd_data(struct > voltagedomain *voltdm) > - (voltdm->pmic->vp_erroroffset << > - __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); > - > -- timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; > -+ timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; > - vdd->vp_rt_data.vlimitto_timeout = timeout_val; > - vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; > - vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; > - > - waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * > -- sys_clk_speed) / 1000; > -+ sys_clk_rate) / 1000; > - vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; > - vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; > - vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; > -@@ -346,9 +322,20 @@ int __init omap_voltage_late_init(void) > - } > - > - list_for_each_entry(voltdm, &voltdm_list, node) { > -+ struct clk *sys_ck; > -+ > - if (!voltdm->scalable) > - continue; > - > -+ sys_ck = clk_get(NULL, voltdm->sys_clk.name); > -+ if (IS_ERR(sys_ck)) { > -+ pr_warning("%s: Could not get sys clk.\n", __func__); > -+ return -EINVAL; > -+ } > -+ voltdm->sys_clk.rate = clk_get_rate(sys_ck); > -+ WARN_ON(!voltdm->sys_clk.rate); > -+ clk_put(sys_ck); > -+ > - if (voltdm->vc) { > - voltdm->vdd->volt_scale = omap_vc_bypass_scale; > - omap_vc_init_channel(voltdm); > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 5261703..d73c956 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -76,6 +76,11 @@ struct voltagedomain { > - void (*write) (u32 val, u8 offset); > - u32 (*rmw)(u32 mask, u32 bits, u8 offset); > - > -+ union { > -+ const char *name; > -+ u32 rate; > -+ } sys_clk; > -+ > - struct omap_vdd_info *vdd; > - }; > - > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index 4db2c6c..e7a0be1 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -82,8 +82,13 @@ static struct voltagedomain *voltagedomains_omap3[] > __initdata = { > - NULL, > - }; > - > -+static const char *sys_clk_name __initdata = "sys_ck"; > -+ > - void __init omap3xxx_voltagedomains_init(void) > - { > -+ struct voltagedomain *voltdm; > -+ int i; > -+ > - /* > - * XXX Will depend on the process, validation, and binning > - * for the currently-running IC > -@@ -96,5 +101,8 @@ void __init omap3xxx_voltagedomains_init(void) > - omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; > - } > - > -+ for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) > -+ voltdm->sys_clk.name = sys_clk_name; > -+ > - voltdm_init(voltagedomains_omap3); > - }; > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index 3e7cb4e..9c20fbb 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -98,8 +98,13 @@ static struct voltagedomain *voltagedomains_omap4[] > __initdata = { > - NULL, > - }; > - > -+static const char *sys_clk_name __initdata = "sys_clkin_ck"; > -+ > - void __init omap44xx_voltagedomains_init(void) > - { > -+ struct voltagedomain *voltdm; > -+ int i; > -+ > - /* > - * XXX Will depend on the process, validation, and binning > - * for the currently-running IC > -@@ -108,5 +113,8 @@ void __init omap44xx_voltagedomains_init(void) > - omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; > - omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; > - > -+ for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) > -+ voltdm->sys_clk.name = sys_clk_name; > -+ > - voltdm_init(voltagedomains_omap4); > - }; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132-OMAP3-VP- > move-timing-calculation-config-into-VP-init.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP- > init.patch > deleted file mode 100644 > index 23b4a31..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132-OMAP3-VP-move- > timing-calculation-config-into-VP-init.patch > +++ /dev/null > @@ -1,94 +0,0 @@ > -From 505468e0ec50f01f1bf37003096d7ae73deb491d Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Thu, 14 Jul 2011 11:10:27 -0700 > -Subject: [PATCH 132/149] OMAP3+: VP: move timing calculation/config into > VP init > - > -Move VP timing calcluation (based on sys clock) and register programming > -into VP init. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.c | 22 ---------------------- > - arch/arm/mach-omap2/vp.c | 23 ++++++++++++++++++++++- > - 2 files changed, 22 insertions(+), 23 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 533ea38..4a15668 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -46,31 +46,9 @@ static LIST_HEAD(voltdm_list); > - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) > - { > - struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 sys_clk_rate, timeout_val, waittime; > -- > -- /* Divide to avoid overflow */ > -- sys_clk_rate = voltdm->sys_clk.rate / 1000; > -- WARN_ON(!sys_clk_rate); > - > - /* Generic voltage parameters */ > - vdd->volt_scale = omap_vp_forceupdate_scale; > -- voltdm->vp->enabled = false; > -- > -- vdd->vp_rt_data.vpconfig_erroroffset = > -- (voltdm->pmic->vp_erroroffset << > -- __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); > -- > -- timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; > -- vdd->vp_rt_data.vlimitto_timeout = timeout_val; > -- vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; > -- vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; > -- > -- waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * > -- sys_clk_rate) / 1000; > -- vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; > -- vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; > -- vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; > -- vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; > - > - return 0; > - } > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index 297d094..ea61a47 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -50,7 +50,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) > - { > - struct omap_vp_instance *vp = voltdm->vp; > - struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 vp_val; > -+ u32 vp_val, sys_clk_rate, timeout_val, waittime; > - > - if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -@@ -58,6 +58,27 @@ void __init omap_vp_init(struct voltagedomain > *voltdm) > - return; > - } > - > -+ vp->enabled = false; > -+ > -+ /* Divide to avoid overflow */ > -+ sys_clk_rate = voltdm->sys_clk.rate / 1000; > -+ > -+ vdd->vp_rt_data.vpconfig_erroroffset = > -+ (voltdm->pmic->vp_erroroffset << > -+ __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); > -+ > -+ timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; > -+ vdd->vp_rt_data.vlimitto_timeout = timeout_val; > -+ vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; > -+ vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; > -+ > -+ waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * > -+ sys_clk_rate) / 1000; > -+ vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; > -+ vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; > -+ vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; > -+ vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; > -+ > - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | > - (vdd->vp_rt_data.vpconfig_errorgain << > - __ffs(vp->common->vpconfig_errorgain_mask)) | > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133-OMAP3-VP- > create-VP-helper-function-for-updating-erro.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating- > erro.patch > deleted file mode 100644 > index 2c1ce2c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133-OMAP3-VP-create- > VP-helper-function-for-updating-erro.patch > +++ /dev/null > @@ -1,107 +0,0 @@ > -From 0a3d1d2ea5a37d1afe583dd0aee310a979d0445f Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 5 Apr 2011 15:15:31 -0700 > -Subject: [PATCH 133/149] OMAP3+: VP: create VP helper function for > updating error gain > - > -Create new helper function in VP layer for updating VP error gain. > -Currently used during pre-scale for VP force update and VC bypass. > - > -TODO: determine if this can be removed from the pre-scale path and > -moved to VP enable path. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 19 ++----------------- > - arch/arm/mach-omap2/vp.c | 19 +++++++++++++++++++ > - arch/arm/mach-omap2/vp.h | 2 ++ > - 3 files changed, 23 insertions(+), 17 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index f64c826..e855559 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -96,9 +96,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, > - u8 *target_vsel, u8 *current_vsel) > - { > - struct omap_vc_channel *vc = voltdm->vc; > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- struct omap_volt_data *volt_data; > -- u32 vc_cmdval, vp_errgain_val; > -+ u32 vc_cmdval; > - > - /* Check if sufficient pmic info is available for this vdd */ > - if (!voltdm->pmic) { > -@@ -120,11 +118,6 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - return -EINVAL; > - } > - > -- /* Get volt_data corresponding to target_volt */ > -- volt_data = omap_voltage_get_voltdata(voltdm, target_volt); > -- if (IS_ERR(volt_data)) > -- volt_data = NULL; > -- > - *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); > - *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); > - > -@@ -134,15 +127,7 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); > - voltdm->write(vc_cmdval, vc->cmdval_reg); > - > -- /* Setting vp errorgain based on the voltage */ > -- if (volt_data) { > -- vp_errgain_val = voltdm->read(voltdm->vp->vpconfig); > -- vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; > -- vp_errgain_val &= voltdm->vp->common- > >vpconfig_errorgain_mask; > -- vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << > -- __ffs(voltdm->vp->common- > >vpconfig_errorgain_mask); > -- voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); > -- } > -+ omap_vp_update_errorgain(voltdm, target_volt); > - > - return 0; > - } > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index ea61a47..f68a6db 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -106,6 +106,25 @@ void __init omap_vp_init(struct voltagedomain > *voltdm) > - voltdm->write(vp_val, vp->vlimitto); > - } > - > -+int omap_vp_update_errorgain(struct voltagedomain *voltdm, > -+ unsigned long target_volt) > -+{ > -+ struct omap_volt_data *volt_data; > -+ > -+ /* Get volt_data corresponding to target_volt */ > -+ volt_data = omap_voltage_get_voltdata(voltdm, target_volt); > -+ if (IS_ERR(volt_data)) > -+ return -EINVAL; > -+ > -+ /* Setting vp errorgain based on the voltage */ > -+ voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask, > -+ volt_data->vp_errgain << > -+ __ffs(voltdm->vp->common->vpconfig_errorgain_mask), > -+ voltdm->vp->vpconfig); > -+ > -+ return 0; > -+} > -+ > - /* VP force update method of voltage scaling */ > - int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, > - unsigned long target_volt) > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 2afe11d..71ac738 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -148,5 +148,7 @@ void omap_vp_disable(struct voltagedomain > *voltdm); > - unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); > - int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, > - unsigned long target_volt); > -+int omap_vp_update_errorgain(struct voltagedomain *voltdm, > -+ unsigned long target_volt); > - > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134-OMAP3-VP- > remove-omap_vp_runtime_data.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch > deleted file mode 100644 > index 2308995..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134-OMAP3-VP-remove- > omap_vp_runtime_data.patch > +++ /dev/null > @@ -1,170 +0,0 @@ > -From 7b7d6f216a49287479af9526b888df5e6325458b Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 4 Apr 2011 17:58:21 -0700 > -Subject: [PATCH 134/149] OMAP3+: VP: remove omap_vp_runtime_data > - > -Remove the "runtime" VP data in favor of direct programming of VP registers. > -The VP is in the PRM, which is in the wakeup powerdomain, so there is no > -need to keep the state dynamically. > - > -Fixes to original version from Nishanth Menon <nm@ti.com> > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.h | 2 - > - arch/arm/mach-omap2/vp.c | 70 ++++++++++++++++++---------------------- > - > - arch/arm/mach-omap2/vp.h | 28 ---------------- > - 3 files changed, 31 insertions(+), 69 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index d73c956..5235eec 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -140,13 +140,11 @@ struct omap_voltdm_pmic { > - * > - * @volt_data : voltage table having the distinct voltages supported > - * by the domain and other associated per voltage data. > -- * @vp_rt_data : VP data derived at runtime, not predefined > - * @curr_volt : current voltage for this vdd. > - * @volt_scale : API to scale the voltage of the vdd. > - */ > - struct omap_vdd_info { > - struct omap_volt_data *volt_data; > -- struct omap_vp_runtime_data vp_rt_data; > - u32 curr_volt; > - > - int (*volt_scale) (struct voltagedomain *voltdm, > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index f68a6db..e7d38f6 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -49,8 +49,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) > - void __init omap_vp_init(struct voltagedomain *voltdm) > - { > - struct omap_vp_instance *vp = voltdm->vp; > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- u32 vp_val, sys_clk_rate, timeout_val, waittime; > -+ u32 val, sys_clk_rate, timeout, waittime; > -+ u32 vddmin, vddmax, vstepmin, vstepmax; > - > - if (!voltdm->read || !voltdm->write) { > - pr_err("%s: No read/write API for accessing vdd_%s regs\n", > -@@ -63,47 +63,39 @@ void __init omap_vp_init(struct voltagedomain > *voltdm) > - /* Divide to avoid overflow */ > - sys_clk_rate = voltdm->sys_clk.rate / 1000; > - > -- vdd->vp_rt_data.vpconfig_erroroffset = > -- (voltdm->pmic->vp_erroroffset << > -- __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); > -- > -- timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; > -- vdd->vp_rt_data.vlimitto_timeout = timeout_val; > -- vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; > -- vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; > -+ timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; > -+ vddmin = voltdm->pmic->vp_vddmin; > -+ vddmax = voltdm->pmic->vp_vddmax; > - > - waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * > - sys_clk_rate) / 1000; > -- vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; > -- vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; > -- vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; > -- vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; > -- > -- vp_val = vdd->vp_rt_data.vpconfig_erroroffset | > -- (vdd->vp_rt_data.vpconfig_errorgain << > -- __ffs(vp->common->vpconfig_errorgain_mask)) | > -+ vstepmin = voltdm->pmic->vp_vstepmin; > -+ vstepmax = voltdm->pmic->vp_vstepmax; > -+ > -+ /* > -+ * VP_CONFIG: error gain is not set here, it will be updated > -+ * on each scale, based on OPP. > -+ */ > -+ val = (voltdm->pmic->vp_erroroffset << > -+ __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) | > - vp->common->vpconfig_timeouten; > -- voltdm->write(vp_val, vp->vpconfig); > -- > -- vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << > -- vp->common->vstepmin_smpswaittimemin_shift) | > -- (vdd->vp_rt_data.vstepmin_stepmin << > -- vp->common->vstepmin_stepmin_shift)); > -- voltdm->write(vp_val, vp->vstepmin); > -- > -- vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << > -- vp->common->vstepmax_smpswaittimemax_shift) | > -- (vdd->vp_rt_data.vstepmax_stepmax << > -- vp->common->vstepmax_stepmax_shift)); > -- voltdm->write(vp_val, vp->vstepmax); > -- > -- vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << > -- vp->common->vlimitto_vddmax_shift) | > -- (vdd->vp_rt_data.vlimitto_vddmin << > -- vp->common->vlimitto_vddmin_shift) | > -- (vdd->vp_rt_data.vlimitto_timeout << > -- vp->common->vlimitto_timeout_shift)); > -- voltdm->write(vp_val, vp->vlimitto); > -+ voltdm->write(val, vp->vpconfig); > -+ > -+ /* VSTEPMIN */ > -+ val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) | > -+ (vstepmin << vp->common->vstepmin_stepmin_shift); > -+ voltdm->write(val, vp->vstepmin); > -+ > -+ /* VSTEPMAX */ > -+ val = (vstepmax << vp->common->vstepmax_stepmax_shift) | > -+ (waittime << vp->common- > >vstepmax_smpswaittimemax_shift); > -+ voltdm->write(val, vp->vstepmax); > -+ > -+ /* VLIMITTO */ > -+ val = (vddmax << vp->common->vlimitto_vddmax_shift) | > -+ (vddmin << vp->common->vlimitto_vddmin_shift) | > -+ (timeout << vp->common->vlimitto_timeout_shift); > -+ voltdm->write(val, vp->vlimitto); > - } > - > - int omap_vp_update_errorgain(struct voltagedomain *voltdm, > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 71ac738..0d63267 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -107,34 +107,6 @@ struct omap_vp_instance { > - bool enabled; > - }; > - > --/** > -- * struct omap_vp_runtime_data - VP data populated at runtime by code > -- * @vpconfig_erroroffset: value of ERROROFFSET bitfield in > PRM_VP*_CONFIG > -- * @vpconfig_errorgain: value of ERRORGAIN bitfield in PRM_VP*_CONFIG > -- * @vstepmin_smpswaittimemin: value of SMPSWAITTIMEMIN bitfield in > PRM_VP*_VSTEPMIN > -- * @vstepmax_smpswaittimemax: value of SMPSWAITTIMEMAX bitfield in > PRM_VP*_VSTEPMAX > -- * @vlimitto_timeout: value of TIMEOUT bitfield in PRM_VP*_VLIMITTO > -- * @vstepmin_stepmin: value of VSTEPMIN bitfield in PRM_VP*_VSTEPMIN > -- * @vstepmax_stepmax: value of VSTEPMAX bitfield in PRM_VP*_VSTEPMAX > -- * @vlimitto_vddmin: value of VDDMIN bitfield in PRM_VP*_VLIMITTO > -- * @vlimitto_vddmax: value of VDDMAX bitfield in PRM_VP*_VLIMITTO > -- * > -- * XXX Is this structure really needed? Why not just program the > -- * device directly? They are in PRM space, therefore in the WKUP > -- * powerdomain, so register contents should not be lost in off-mode. > -- */ > --struct omap_vp_runtime_data { > -- u32 vpconfig_erroroffset; > -- u16 vpconfig_errorgain; > -- u16 vstepmin_smpswaittimemin; > -- u16 vstepmax_smpswaittimemax; > -- u16 vlimitto_timeout; > -- u8 vstepmin_stepmin; > -- u8 vstepmax_stepmax; > -- u8 vlimitto_vddmin; > -- u8 vlimitto_vddmax; > --}; > -- > - extern struct omap_vp_instance omap3_vp_mpu; > - extern struct omap_vp_instance omap3_vp_core; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135-OMAP3-VP- > move-voltage-scale-function-pointer-into-st.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer- > into-st.patch > deleted file mode 100644 > index efcc75a..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135-OMAP3-VP-move- > voltage-scale-function-pointer-into-st.patch > +++ /dev/null > @@ -1,134 +0,0 @@ > -From 31b07224df028a7913f82c38f13c2bd621613756 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Thu, 14 Jul 2011 11:12:32 -0700 > -Subject: [PATCH 135/149] OMAP3+: VP: move voltage scale function pointer > into struct voltagedomain > - > -Function pointer used for actual voltage scaling (e.g. VP force update > -or VC bypass) is moved from omap_vdd_info into struct voltagedomain, > -resulting in renames s/vdd->volt_scale/voltdm->scale/ > - > -No functional changes. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.c | 24 +++++++----------------- > - arch/arm/mach-omap2/voltage.h | 8 ++++---- > - 2 files changed, 11 insertions(+), 21 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 4a15668..32f0873 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -45,10 +45,8 @@ static LIST_HEAD(voltdm_list); > - > - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) > - { > -- struct omap_vdd_info *vdd = voltdm->vdd; > -- > - /* Generic voltage parameters */ > -- vdd->volt_scale = omap_vp_forceupdate_scale; > -+ voltdm->scale = omap_vp_forceupdate_scale; > - > - return 0; > - } > -@@ -107,22 +105,18 @@ unsigned long omap_voltage_get_nom_volt(struct > voltagedomain *voltdm) > - int omap_voltage_scale_vdd(struct voltagedomain *voltdm, > - unsigned long target_volt) > - { > -- struct omap_vdd_info *vdd; > -- > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > - return -EINVAL; > - } > - > -- vdd = voltdm->vdd; > -- > -- if (!vdd->volt_scale) { > -+ if (!voltdm->scale) { > - pr_err("%s: No voltage scale API registered for vdd_%s\n", > - __func__, voltdm->name); > - return -ENODATA; > - } > - > -- return vdd->volt_scale(voltdm, target_volt); > -+ return voltdm->scale(voltdm, target_volt); > - } > - > - /** > -@@ -258,23 +252,19 @@ int omap_voltage_register_pmic(struct > voltagedomain *voltdm, > - * defined in voltage.h > - */ > - void omap_change_voltscale_method(struct voltagedomain *voltdm, > -- int voltscale_method) > -+ int voltscale_method) > - { > -- struct omap_vdd_info *vdd; > -- > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > - return; > - } > - > -- vdd = voltdm->vdd; > -- > - switch (voltscale_method) { > - case VOLTSCALE_VPFORCEUPDATE: > -- vdd->volt_scale = omap_vp_forceupdate_scale; > -+ voltdm->scale = omap_vp_forceupdate_scale; > - return; > - case VOLTSCALE_VCBYPASS: > -- vdd->volt_scale = omap_vc_bypass_scale; > -+ voltdm->scale = omap_vc_bypass_scale; > - return; > - default: > - pr_warning("%s: Trying to change the method of voltage > scaling" > -@@ -315,7 +305,7 @@ int __init omap_voltage_late_init(void) > - clk_put(sys_ck); > - > - if (voltdm->vc) { > -- voltdm->vdd->volt_scale = omap_vc_bypass_scale; > -+ voltdm->scale = omap_vc_bypass_scale; > - omap_vc_init_channel(voltdm); > - } > - > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 5235eec..d2a0c24 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -60,6 +60,7 @@ struct omap_vfsm_instance { > - * @pwrdm_node: list_head linking all powerdomains in this voltagedomain > - * @vdd: to be removed > - * @pwrdms: powerdomains in this voltagedomain > -+ * @scale: function used to scale the voltage of the voltagedomain > - */ > - struct voltagedomain { > - char *name; > -@@ -81,6 +82,9 @@ struct voltagedomain { > - u32 rate; > - } sys_clk; > - > -+ int (*scale) (struct voltagedomain *voltdm, > -+ unsigned long target_volt); > -+ > - struct omap_vdd_info *vdd; > - }; > - > -@@ -141,14 +145,10 @@ struct omap_voltdm_pmic { > - * @volt_data : voltage table having the distinct voltages supported > - * by the domain and other associated per voltage data. > - * @curr_volt : current voltage for this vdd. > -- * @volt_scale : API to scale the voltage of the vdd. > - */ > - struct omap_vdd_info { > - struct omap_volt_data *volt_data; > - u32 curr_volt; > -- > -- int (*volt_scale) (struct voltagedomain *voltdm, > -- unsigned long target_volt); > - }; > - > - int omap_voltage_scale_vdd(struct voltagedomain *voltdm, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136-OMAP-VP- > Explicitly-mask-VPVOLTAGE-field.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch > deleted file mode 100644 > index 0bb557d..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136-OMAP-VP-Explicitly- > mask-VPVOLTAGE-field.patch > +++ /dev/null > @@ -1,81 +0,0 @@ > -From 6bf9eba8b75c6e8c895f7be294794846c51cc3f1 Mon Sep 17 00:00:00 > 2001 > -From: Todd Poynor <toddpoynor@google.com> > -Date: Fri, 27 May 2011 19:15:59 -0700 > -Subject: [PATCH 136/149] OMAP: VP: Explicitly mask VPVOLTAGE field > - > -Reading the VPVOLTAGE field of PRM_VP_*_VOLTAGE registers currently > -relies on a u32 -> u8 conversion to mask off the FORCEUPDATEWAIT field > -in the upper bits. Make this explicit using the mask symbol > -already defined, added as a new field in struct omap_vp_common. > - > -Signed-off-by: Todd Poynor <toddpoynor@google.com> > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vp.c | 3 ++- > - arch/arm/mach-omap2/vp.h | 2 ++ > - arch/arm/mach-omap2/vp3xxx_data.c | 2 ++ > - arch/arm/mach-omap2/vp44xx_data.c | 1 + > - 4 files changed, 7 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index e7d38f6..3807620 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -227,7 +227,8 @@ unsigned long omap_vp_get_curr_volt(struct > voltagedomain *voltdm) > - return 0; > - } > - > -- curr_vsel = voltdm->read(vp->voltage); > -+ curr_vsel = (voltdm->read(vp->voltage) & vp->common- > >vpvoltage_mask) > -+ >> __ffs(vp->common->vpvoltage_mask); > - > - if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { > - pr_warning("%s: PMIC function to convert vsel to voltage" > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index 0d63267..f78752b 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -63,6 +63,7 @@ struct omap_vp_ops { > - * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg > - * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg > - * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg > -+ * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg > - */ > - struct omap_vp_common { > - u32 vpconfig_erroroffset_mask; > -@@ -79,6 +80,7 @@ struct omap_vp_common { > - u8 vlimitto_vddmin_shift; > - u8 vlimitto_vddmax_shift; > - u8 vlimitto_timeout_shift; > -+ u8 vpvoltage_mask; > - > - const struct omap_vp_ops *ops; > - }; > -diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach- > omap2/vp3xxx_data.c > -index d429c44..260c554 100644 > ---- a/arch/arm/mach-omap2/vp3xxx_data.c > -+++ b/arch/arm/mach-omap2/vp3xxx_data.c > -@@ -51,6 +51,8 @@ static const struct omap_vp_common > omap3_vp_common = { > - .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, > - .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, > - .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, > -+ .vpvoltage_mask = OMAP3430_VPVOLTAGE_MASK, > -+ > - .ops = &omap3_vp_ops, > - }; > - > -diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach- > omap2/vp44xx_data.c > -index 0daf2a4..b4e7704 100644 > ---- a/arch/arm/mach-omap2/vp44xx_data.c > -+++ b/arch/arm/mach-omap2/vp44xx_data.c > -@@ -51,6 +51,7 @@ static const struct omap_vp_common > omap4_vp_common = { > - .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, > - .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, > - .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, > -+ .vpvoltage_mask = OMAP4430_VPVOLTAGE_MASK, > - .ops = &omap4_vp_ops, > - }; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137-OMAP3-VP- > update_errorgain-return-error-if-VP.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch > deleted file mode 100644 > index b0ca14a..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137-OMAP3-VP- > update_errorgain-return-error-if-VP.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From abe6084b3aea9f55bb9b9127a0a4c58f915e635e Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 18 Jul 2011 15:31:43 -0700 > -Subject: [PATCH 137/149] OMAP3+: VP: update_errorgain(): return error if VP > - > -Add check for valid VP in omap_vp_update_errorgain() > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vp.c | 3 +++ > - 1 files changed, 3 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index 3807620..29698ac 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -103,6 +103,9 @@ int omap_vp_update_errorgain(struct voltagedomain > *voltdm, > - { > - struct omap_volt_data *volt_data; > - > -+ if (!voltdm->vp) > -+ return -EINVAL; > -+ > - /* Get volt_data corresponding to target_volt */ > - volt_data = omap_voltage_get_voltdata(voltdm, target_volt); > - if (IS_ERR(volt_data)) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138-OMAP3-VP- > remove-unused-omap_vp_get_curr_volt.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0138-OMAP3-VP-remove-unused- > omap_vp_get_curr_volt.patch > deleted file mode 100644 > index 57ba0a2..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138-OMAP3-VP-remove- > unused-omap_vp_get_curr_volt.patch > +++ /dev/null > @@ -1,70 +0,0 @@ > -From 479369a9e78273521a5998af043bcad58ee832f8 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Fri, 15 Jul 2011 16:38:10 -0700 > -Subject: [PATCH 138/149] OMAP3+: VP: remove unused > omap_vp_get_curr_volt() > - > ---- > - arch/arm/mach-omap2/vp.c | 34 ---------------------------------- > - arch/arm/mach-omap2/vp.h | 1 - > - 2 files changed, 0 insertions(+), 35 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index 29698ac..24020ea 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -209,40 +209,6 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - } > - > - /** > -- * omap_vp_get_curr_volt() - API to get the current vp voltage. > -- * @voltdm: pointer to the VDD. > -- * > -- * This API returns the current voltage for the specified voltage processor > -- */ > --unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) > --{ > -- struct omap_vp_instance *vp = voltdm->vp; > -- u8 curr_vsel; > -- > -- if (!voltdm || IS_ERR(voltdm)) { > -- pr_warning("%s: VDD specified does not exist!\n", __func__); > -- return 0; > -- } > -- > -- if (!voltdm->read) { > -- pr_err("%s: No read API for reading vdd_%s regs\n", > -- __func__, voltdm->name); > -- return 0; > -- } > -- > -- curr_vsel = (voltdm->read(vp->voltage) & vp->common- > >vpvoltage_mask) > -- >> __ffs(vp->common->vpvoltage_mask); > -- > -- if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { > -- pr_warning("%s: PMIC function to convert vsel to voltage" > -- "in uV not registerd\n", __func__); > -- return 0; > -- } > -- > -- return voltdm->pmic->vsel_to_uv(curr_vsel); > --} > -- > --/** > - * omap_vp_enable() - API to enable a particular VP > - * @voltdm: pointer to the VDD whose VP is to be enabled. > - * > -diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h > -index f78752b..d9bc4f1 100644 > ---- a/arch/arm/mach-omap2/vp.h > -+++ b/arch/arm/mach-omap2/vp.h > -@@ -119,7 +119,6 @@ extern struct omap_vp_instance omap4_vp_core; > - void omap_vp_init(struct voltagedomain *voltdm); > - void omap_vp_enable(struct voltagedomain *voltdm); > - void omap_vp_disable(struct voltagedomain *voltdm); > --unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); > - int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, > - unsigned long target_volt); > - int omap_vp_update_errorgain(struct voltagedomain *voltdm, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP- > combine-setting-init-voltage-into-common-fu.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init- > voltage-into-common-fu.patch > deleted file mode 100644 > index 484ae55..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP-combine- > setting-init-voltage-into-common-fu.patch > +++ /dev/null > @@ -1,141 +0,0 @@ > -From 562b12a6336f94d9e5957c68b7181a9f36931e7a Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Fri, 15 Jul 2011 17:05:48 -0700 > -Subject: [PATCH 139/149] OMAP3+: VP: combine setting init voltage into > common function > - > -combine VPCONFIG init voltage setup into common function and use from > -both vp_enable and from vp_forceupdate_scale(). > - > -NOTE: this patch changes the sequence of when the initVDD bit is > -cleared. The bit is now cleared immediately after it was written. > -Since only the rising edge of this bit has any affect according to the > -TRM, the exact timing of clearing of this bit should not have any > -effect. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vp.c | 58 +++++++++++++++------------------------------ > - > - 1 files changed, 19 insertions(+), 39 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c > -index 24020ea..66bd700 100644 > ---- a/arch/arm/mach-omap2/vp.c > -+++ b/arch/arm/mach-omap2/vp.c > -@@ -9,31 +9,18 @@ > - #include "prm-regbits-44xx.h" > - #include "prm44xx.h" > - > --static void vp_latch_vsel(struct voltagedomain *voltdm) > -+static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt) > - { > - struct omap_vp_instance *vp = voltdm->vp; > - u32 vpconfig; > -- unsigned long uvdc; > - char vsel; > - > -- uvdc = omap_voltage_get_nom_volt(voltdm); > -- if (!uvdc) { > -- pr_warning("%s: unable to find current voltage for vdd_%s\n", > -- __func__, voltdm->name); > -- return; > -- } > -- > -- if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { > -- pr_warning("%s: PMIC function to convert voltage in uV to" > -- " vsel not registered\n", __func__); > -- return; > -- } > -- > -- vsel = voltdm->pmic->uv_to_vsel(uvdc); > -+ vsel = voltdm->pmic->uv_to_vsel(volt); > - > - vpconfig = voltdm->read(vp->vpconfig); > - vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | > -- vp->common->vpconfig_initvdd); > -+ vp->common->vpconfig_forceupdate | > -+ vp->common->vpconfig_initvdd); > - vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); > - voltdm->write(vpconfig, vp->vpconfig); > - > -@@ -43,6 +30,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) > - > - /* Clear initVDD copy trigger bit */ > - voltdm->write(vpconfig, vp->vpconfig); > -+ > -+ return vpconfig; > - } > - > - /* Generic voltage init functions */ > -@@ -149,22 +138,11 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - return -ETIMEDOUT; > - } > - > -- /* Configure for VP-Force Update */ > -- vpconfig = voltdm->read(vp->vpconfig); > -- vpconfig &= ~(vp->common->vpconfig_initvdd | > -- vp->common->vpconfig_forceupdate | > -- vp->common->vpconfig_initvoltage_mask); > -- vpconfig |= ((target_vsel << > -- __ffs(vp->common->vpconfig_initvoltage_mask))); > -- voltdm->write(vpconfig, vp->vpconfig); > -- > -- /* Trigger initVDD value copy to voltage processor */ > -- vpconfig |= vp->common->vpconfig_initvdd; > -- voltdm->write(vpconfig, vp->vpconfig); > -+ vpconfig = _vp_set_init_voltage(voltdm, target_volt); > - > - /* Force update of voltage */ > -- vpconfig |= vp->common->vpconfig_forceupdate; > -- voltdm->write(vpconfig, vp->vpconfig); > -+ voltdm->write(vpconfig | vp->common->vpconfig_forceupdate, > -+ voltdm->vp->vpconfig); > - > - /* > - * Wait for TransactionDone. Typical latency is <200us. > -@@ -197,12 +175,7 @@ int omap_vp_forceupdate_scale(struct > voltagedomain *voltdm, > - "to clear the TRANXDONE status\n", > - __func__, voltdm->name); > - > -- vpconfig = voltdm->read(vp->vpconfig); > -- /* Clear initVDD copy trigger bit */ > -- vpconfig &= ~vp->common->vpconfig_initvdd; > -- voltdm->write(vpconfig, vp->vpconfig); > - /* Clear force bit */ > -- vpconfig &= ~vp->common->vpconfig_forceupdate; > - voltdm->write(vpconfig, vp->vpconfig); > - > - return 0; > -@@ -218,7 +191,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain > *voltdm, > - void omap_vp_enable(struct voltagedomain *voltdm) > - { > - struct omap_vp_instance *vp; > -- u32 vpconfig; > -+ u32 vpconfig, volt; > - > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > -@@ -236,12 +209,19 @@ void omap_vp_enable(struct voltagedomain > *voltdm) > - if (vp->enabled) > - return; > - > -- vp_latch_vsel(voltdm); > -+ volt = voltdm_get_voltage(voltdm); > -+ if (!volt) { > -+ pr_warning("%s: unable to find current voltage for %s\n", > -+ __func__, voltdm->name); > -+ return; > -+ } > -+ > -+ vpconfig = _vp_set_init_voltage(voltdm, volt); > - > - /* Enable VP */ > -- vpconfig = voltdm->read(vp->vpconfig); > - vpconfig |= vp->common->vpconfig_vpenable; > - voltdm->write(vpconfig, vp->vpconfig); > -+ > - vp->enabled = true; > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3- > voltage-rename-scale-and-reset-functions-using.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3-voltage-rename-scale- > and-reset-functions-using.patch > deleted file mode 100644 > index 00a2b86..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3-voltage- > rename-scale-and-reset-functions-using.patch > +++ /dev/null > @@ -1,141 +0,0 @@ > -From dfebda78f9517dcf20fae5f5cbbdb3c1bebe4e17 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 5 Apr 2011 16:27:21 -0700 > -Subject: [PATCH 140/149] OMAP3+: voltage: rename scale and reset functions > using voltdm_ prefix > - > -Rename voltage scaling related functions to use voltdm_ prefix intead > -of omap_voltage_, and cleanup kerneldoc comments in the process. > - > -s/omap_voltage_scale_vdd/voltdm_scale/ > -s/omap_voltage_reset/voltdm_reset/ > - > -Also, in voltdm_reset() s/target_uvdc/target_volt/ to be consistent with > -naming throughout the file. > - > -No functional changes. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/pm.c | 2 +- > - arch/arm/mach-omap2/smartreflex-class3.c | 2 +- > - arch/arm/mach-omap2/voltage.c | 29 ++++++++++++++--------------- > - arch/arm/mach-omap2/voltage.h | 5 ++--- > - 4 files changed, 18 insertions(+), 20 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c > -index f81340e..659e400 100644 > ---- a/arch/arm/mach-omap2/pm.c > -+++ b/arch/arm/mach-omap2/pm.c > -@@ -214,7 +214,7 @@ static int __init omap2_set_init_voltage(char > *vdd_name, char *clk_name, > - goto exit; > - } > - > -- omap_voltage_scale_vdd(voltdm, bootup_volt); > -+ voltdm_scale(voltdm, bootup_volt); > - return 0; > - > - exit: > -diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach- > omap2/smartreflex-class3.c > -index f438cf4..4eac1bc 100644 > ---- a/arch/arm/mach-omap2/smartreflex-class3.c > -+++ b/arch/arm/mach-omap2/smartreflex-class3.c > -@@ -32,7 +32,7 @@ static int sr_class3_disable(struct voltagedomain > *voltdm, int is_volt_reset) > - omap_vp_disable(voltdm); > - sr_disable(voltdm); > - if (is_volt_reset) > -- omap_voltage_reset(voltdm); > -+ voltdm_reset(voltdm); > - > - return 0; > - } > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 32f0873..7588480 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -94,16 +94,15 @@ unsigned long omap_voltage_get_nom_volt(struct > voltagedomain *voltdm) > - } > - > - /** > -- * omap_voltage_scale_vdd() - API to scale voltage of a particular > -- * voltage domain. > -- * @voltdm: pointer to the VDD which is to be scaled. > -- * @target_volt: The target voltage of the voltage domain > -+ * voltdm_scale() - API to scale voltage of a particular voltage domain. > -+ * @voltdm: pointer to the voltage domain which is to be scaled. > -+ * @target_volt: The target voltage of the voltage domain > - * > - * This API should be called by the kernel to do the voltage scaling > -- * for a particular voltage domain during dvfs or any other situation. > -+ * for a particular voltage domain during DVFS. > - */ > --int omap_voltage_scale_vdd(struct voltagedomain *voltdm, > -- unsigned long target_volt) > -+int voltdm_scale(struct voltagedomain *voltdm, > -+ unsigned long target_volt) > - { > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > -@@ -120,31 +119,31 @@ int omap_voltage_scale_vdd(struct voltagedomain > *voltdm, > - } > - > - /** > -- * omap_voltage_reset() - Resets the voltage of a particular voltage domain > -- * to that of the current OPP. > -- * @voltdm: pointer to the VDD whose voltage is to be reset. > -+ * voltdm_reset() - Resets the voltage of a particular voltage domain > -+ * to that of the current OPP. > -+ * @voltdm: pointer to the voltage domain whose voltage is to be reset. > - * > - * This API finds out the correct voltage the voltage domain is supposed > - * to be at and resets the voltage to that level. Should be used especially > - * while disabling any voltage compensation modules. > - */ > --void omap_voltage_reset(struct voltagedomain *voltdm) > -+void voltdm_reset(struct voltagedomain *voltdm) > - { > -- unsigned long target_uvdc; > -+ unsigned long target_volt; > - > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > - return; > - } > - > -- target_uvdc = omap_voltage_get_nom_volt(voltdm); > -- if (!target_uvdc) { > -+ target_volt = omap_voltage_get_nom_volt(voltdm); > -+ if (!target_volt) { > - pr_err("%s: unable to find current voltage for vdd_%s\n", > - __func__, voltdm->name); > - return; > - } > - > -- omap_voltage_scale_vdd(voltdm, target_uvdc); > -+ voltdm_scale(voltdm, target_volt); > - } > - > - /** > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index d2a0c24..e3efbf9 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -151,9 +151,6 @@ struct omap_vdd_info { > - u32 curr_volt; > - }; > - > --int omap_voltage_scale_vdd(struct voltagedomain *voltdm, > -- unsigned long target_volt); > --void omap_voltage_reset(struct voltagedomain *voltdm); > - void omap_voltage_get_volttable(struct voltagedomain *voltdm, > - struct omap_volt_data **volt_data); > - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain > *voltdm, > -@@ -191,4 +188,6 @@ int voltdm_for_each(int (*fn)(struct voltagedomain > *voltdm, void *user), > - int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, > - int (*fn)(struct voltagedomain *voltdm, > - struct powerdomain *pwrdm)); > -+int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); > -+void voltdm_reset(struct voltagedomain *voltdm); > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3- > voltage-move-rename-curr_volt-from-vdd_info-in.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3-voltage-move-rename- > curr_volt-from-vdd_info-in.patch > deleted file mode 100644 > index c9c483c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3-voltage- > move-rename-curr_volt-from-vdd_info-in.patch > +++ /dev/null > @@ -1,106 +0,0 @@ > -From 20a2c2c2dcf15d7e66d70b5e6724597dd697b4a7 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Tue, 5 Apr 2011 16:55:22 -0700 > -Subject: [PATCH 141/149] OMAP3+: voltage: move/rename curr_volt from > vdd_info into struct voltagedomain > - > -Track current nominal voltage as part of struct voltagedomain instead > -of omap_vdd_info, which will soon be removed. > - > -Also renames field from curr_volt to nominal_volt. > - > -No functional changes. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 5 ++--- > - arch/arm/mach-omap2/voltage.c | 6 +----- > - arch/arm/mach-omap2/voltage.h | 4 ++-- > - 3 files changed, 5 insertions(+), 10 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index e855559..3233c69 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -119,7 +119,7 @@ int omap_vc_pre_scale(struct voltagedomain > *voltdm, > - } > - > - *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); > -- *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); > -+ *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt); > - > - /* Setting the ON voltage to the new target voltage */ > - vc_cmdval = voltdm->read(vc->cmdval_reg); > -@@ -136,7 +136,6 @@ void omap_vc_post_scale(struct voltagedomain > *voltdm, > - unsigned long target_volt, > - u8 target_vsel, u8 current_vsel) > - { > -- struct omap_vdd_info *vdd = voltdm->vdd; > - u32 smps_steps = 0, smps_delay = 0; > - > - smps_steps = abs(target_vsel - current_vsel); > -@@ -145,7 +144,7 @@ void omap_vc_post_scale(struct voltagedomain > *voltdm, > - voltdm->pmic->slew_rate) + 2; > - udelay(smps_delay); > - > -- vdd->curr_volt = target_volt; > -+ voltdm->nominal_volt = target_volt; > - } > - > - /* vc_bypass_scale - VC bypass method of voltage scaling */ > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 7588480..29ab389 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -81,16 +81,12 @@ ovdc_out: > - */ > - unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) > - { > -- struct omap_vdd_info *vdd; > -- > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > - return 0; > - } > - > -- vdd = voltdm->vdd; > -- > -- return vdd->curr_volt; > -+ return voltdm->nominal_volt; > - } > - > - /** > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index e3efbf9..3e32eda 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -61,6 +61,7 @@ struct omap_vfsm_instance { > - * @vdd: to be removed > - * @pwrdms: powerdomains in this voltagedomain > - * @scale: function used to scale the voltage of the voltagedomain > -+ * @nominal_volt: current nominal voltage for this voltage domain > - */ > - struct voltagedomain { > - char *name; > -@@ -84,6 +85,7 @@ struct voltagedomain { > - > - int (*scale) (struct voltagedomain *voltdm, > - unsigned long target_volt); > -+ u32 nominal_volt; > - > - struct omap_vdd_info *vdd; > - }; > -@@ -144,11 +146,9 @@ struct omap_voltdm_pmic { > - * > - * @volt_data : voltage table having the distinct voltages supported > - * by the domain and other associated per voltage data. > -- * @curr_volt : current voltage for this vdd. > - */ > - struct omap_vdd_info { > - struct omap_volt_data *volt_data; > -- u32 curr_volt; > - }; > - > - void omap_voltage_get_volttable(struct voltagedomain *voltdm, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142-OMAP3-voltdm- > final-removal-of-omap_vdd_info.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch > deleted file mode 100644 > index e191c6f..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142-OMAP3-voltdm-final- > removal-of-omap_vdd_info.patch > +++ /dev/null > @@ -1,282 +0,0 @@ > -From e4cf1f9419b8613017296ee163acedb79dc2967b Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Thu, 14 Jul 2011 11:29:06 -0700 > -Subject: [PATCH 142/149] OMAP3+: voltdm: final removal of omap_vdd_info > - > -Remove last remaining member (volt_data) from omap_vdd_info into > -struct voltagedomain and removal remaining usage and reference to > -omap_vdd_info. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/voltage.c | 54 ++++-------------------- > - arch/arm/mach-omap2/voltage.h | 16 +------ > - arch/arm/mach-omap2/voltagedomains3xxx_data.c | 14 ++----- > - arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 +----- > - 4 files changed, 18 insertions(+), 81 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 29ab389..2e5528f 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -43,34 +43,6 @@ > - > - static LIST_HEAD(voltdm_list); > - > --static int __init _config_common_vdd_data(struct voltagedomain *voltdm) > --{ > -- /* Generic voltage parameters */ > -- voltdm->scale = omap_vp_forceupdate_scale; > -- > -- return 0; > --} > -- > --static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) > --{ > -- int ret = -EINVAL; > -- > -- if (!voltdm->pmic) { > -- pr_err("%s: PMIC info requried to configure vdd_%s not" > -- "populated.Hence cannot initialize vdd_%s\n", > -- __func__, voltdm->name, voltdm->name); > -- goto ovdc_out; > -- } > -- > -- if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) > -- goto ovdc_out; > -- > -- ret = 0; > -- > --ovdc_out: > -- return ret; > --} > -- > - /* Public functions */ > - /** > - * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated > voltage > -@@ -155,18 +127,14 @@ void voltdm_reset(struct voltagedomain *voltdm) > - * > - */ > - void omap_voltage_get_volttable(struct voltagedomain *voltdm, > -- struct omap_volt_data **volt_data) > -+ struct omap_volt_data **volt_data) > - { > -- struct omap_vdd_info *vdd; > -- > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > - return; > - } > - > -- vdd = voltdm->vdd; > -- > -- *volt_data = vdd->volt_data; > -+ *volt_data = voltdm->volt_data; > - } > - > - /** > -@@ -185,9 +153,8 @@ void omap_voltage_get_volttable(struct > voltagedomain *voltdm, > - * domain or if there is no matching entry. > - */ > - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain > *voltdm, > -- unsigned long volt) > -+ unsigned long volt) > - { > -- struct omap_vdd_info *vdd; > - int i; > - > - if (!voltdm || IS_ERR(voltdm)) { > -@@ -195,17 +162,15 @@ struct omap_volt_data > *omap_voltage_get_voltdata(struct voltagedomain *voltdm, > - return ERR_PTR(-EINVAL); > - } > - > -- vdd = voltdm->vdd; > -- > -- if (!vdd->volt_data) { > -+ if (!voltdm->volt_data) { > - pr_warning("%s: voltage table does not exist for vdd_%s\n", > - __func__, voltdm->name); > - return ERR_PTR(-ENODATA); > - } > - > -- for (i = 0; vdd->volt_data[i].volt_nominal != 0; i++) { > -- if (vdd->volt_data[i].volt_nominal == volt) > -- return &vdd->volt_data[i]; > -+ for (i = 0; voltdm->volt_data[i].volt_nominal != 0; i++) { > -+ if (voltdm->volt_data[i].volt_nominal == volt) > -+ return &voltdm->volt_data[i]; > - } > - > - pr_notice("%s: Unable to match the current voltage with the voltage" > -@@ -304,9 +269,8 @@ int __init omap_voltage_late_init(void) > - omap_vc_init_channel(voltdm); > - } > - > -- if (voltdm->vdd) { > -- if (omap_vdd_data_configure(voltdm)) > -- continue; > -+ if (voltdm->vp) { > -+ voltdm->scale = omap_vp_forceupdate_scale; > - omap_vp_init(voltdm); > - } > - } > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 3e32eda..68b1ed5 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -33,8 +33,6 @@ struct powerdomain; > - #define OMAP3_VOLTOFFSET 0xff > - #define OMAP3_VOLTSETUP2 0xff > - > --struct omap_vdd_info; > -- > - /** > - * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield > - * data > -@@ -85,9 +83,9 @@ struct voltagedomain { > - > - int (*scale) (struct voltagedomain *voltdm, > - unsigned long target_volt); > -- u32 nominal_volt; > - > -- struct omap_vdd_info *vdd; > -+ u32 nominal_volt; > -+ struct omap_volt_data *volt_data; > - }; > - > - /** > -@@ -141,16 +139,6 @@ struct omap_voltdm_pmic { > - u8 (*uv_to_vsel) (unsigned long uV); > - }; > - > --/** > -- * omap_vdd_info - Per Voltage Domain info > -- * > -- * @volt_data : voltage table having the distinct voltages supported > -- * by the domain and other associated per voltage data. > -- */ > --struct omap_vdd_info { > -- struct omap_volt_data *volt_data; > --}; > -- > - void omap_voltage_get_volttable(struct voltagedomain *voltdm, > - struct omap_volt_data **volt_data); > - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain > *voltdm, > -diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -index e7a0be1..b0d0ae1 100644 > ---- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c > -@@ -37,16 +37,12 @@ static const struct omap_vfsm_instance > omap3_vdd1_vfsm = { > - .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, > - }; > - > --static struct omap_vdd_info omap3_vdd1_info; > -- > - static const struct omap_vfsm_instance omap3_vdd2_vfsm = { > - .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, > - .voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT, > - .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, > - }; > - > --static struct omap_vdd_info omap3_vdd2_info; > -- > - static struct voltagedomain omap3_voltdm_mpu = { > - .name = "mpu_iva", > - .scalable = true, > -@@ -56,7 +52,6 @@ static struct voltagedomain omap3_voltdm_mpu = { > - .vc = &omap3_vc_mpu, > - .vfsm = &omap3_vdd1_vfsm, > - .vp = &omap3_vp_mpu, > -- .vdd = &omap3_vdd1_info, > - }; > - > - static struct voltagedomain omap3_voltdm_core = { > -@@ -68,7 +63,6 @@ static struct voltagedomain omap3_voltdm_core = { > - .vc = &omap3_vc_core, > - .vfsm = &omap3_vdd2_vfsm, > - .vp = &omap3_vp_core, > -- .vdd = &omap3_vdd2_info, > - }; > - > - static struct voltagedomain omap3_voltdm_wkup = { > -@@ -94,11 +88,11 @@ void __init omap3xxx_voltagedomains_init(void) > - * for the currently-running IC > - */ > - if (cpu_is_omap3630()) { > -- omap3_vdd1_info.volt_data = omap36xx_vddmpu_volt_data; > -- omap3_vdd2_info.volt_data = omap36xx_vddcore_volt_data; > -+ omap3_voltdm_mpu.volt_data = > omap36xx_vddmpu_volt_data; > -+ omap3_voltdm_core.volt_data = > omap36xx_vddcore_volt_data; > - } else { > -- omap3_vdd1_info.volt_data = omap34xx_vddmpu_volt_data; > -- omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; > -+ omap3_voltdm_mpu.volt_data = > omap34xx_vddmpu_volt_data; > -+ omap3_voltdm_core.volt_data = > omap34xx_vddcore_volt_data; > - } > - > - for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) > -diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c > b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -index 9c20fbb..c4584e9 100644 > ---- a/arch/arm/mach-omap2/voltagedomains44xx_data.c > -+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c > -@@ -36,20 +36,14 @@ static const struct omap_vfsm_instance > omap4_vdd_mpu_vfsm = { > - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, > - }; > - > --static struct omap_vdd_info omap4_vdd_mpu_info; > -- > - static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { > - .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, > - }; > - > --static struct omap_vdd_info omap4_vdd_iva_info; > -- > - static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { > - .voltsetup_reg = > OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, > - }; > - > --static struct omap_vdd_info omap4_vdd_core_info; > -- > - static struct voltagedomain omap4_voltdm_mpu = { > - .name = "mpu", > - .scalable = true, > -@@ -59,7 +53,6 @@ static struct voltagedomain omap4_voltdm_mpu = { > - .vc = &omap4_vc_mpu, > - .vfsm = &omap4_vdd_mpu_vfsm, > - .vp = &omap4_vp_mpu, > -- .vdd = &omap4_vdd_mpu_info, > - }; > - > - static struct voltagedomain omap4_voltdm_iva = { > -@@ -71,7 +64,6 @@ static struct voltagedomain omap4_voltdm_iva = { > - .vc = &omap4_vc_iva, > - .vfsm = &omap4_vdd_iva_vfsm, > - .vp = &omap4_vp_iva, > -- .vdd = &omap4_vdd_iva_info, > - }; > - > - static struct voltagedomain omap4_voltdm_core = { > -@@ -83,7 +75,6 @@ static struct voltagedomain omap4_voltdm_core = { > - .vc = &omap4_vc_core, > - .vfsm = &omap4_vdd_core_vfsm, > - .vp = &omap4_vp_core, > -- .vdd = &omap4_vdd_core_info, > - }; > - > - static struct voltagedomain omap4_voltdm_wkup = { > -@@ -109,9 +100,9 @@ void __init omap44xx_voltagedomains_init(void) > - * XXX Will depend on the process, validation, and binning > - * for the currently-running IC > - */ > -- omap4_vdd_mpu_info.volt_data = omap44xx_vdd_mpu_volt_data; > -- omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; > -- omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; > -+ omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; > -+ omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; > -+ omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; > - > - for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) > - voltdm->sys_clk.name = sys_clk_name; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3- > voltage-rename-omap_voltage_get_nom_volt-voltd.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3-voltage-rename- > omap_voltage_get_nom_volt-voltd.patch > deleted file mode 100644 > index c65ead9..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3-voltage- > rename-omap_voltage_get_nom_volt-voltd.patch > +++ /dev/null > @@ -1,91 +0,0 @@ > -From da00ff6be37578f4c1adbe5c7dd28844073f7873 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Fri, 15 Jul 2011 16:05:12 -0700 > -Subject: [PATCH 143/149] OMAP3+: voltage: rename > omap_voltage_get_nom_volt -> voltdm_get_voltage > - > -Use preferred voltdm_ naming for getting current nominal voltage. > - > -No functional changes. > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/smartreflex-class3.c | 2 +- > - arch/arm/mach-omap2/voltage.c | 14 ++++++++------ > - arch/arm/mach-omap2/voltage.h | 2 +- > - 3 files changed, 10 insertions(+), 8 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach- > omap2/smartreflex-class3.c > -index 4eac1bc..53d9d0a 100644 > ---- a/arch/arm/mach-omap2/smartreflex-class3.c > -+++ b/arch/arm/mach-omap2/smartreflex-class3.c > -@@ -15,7 +15,7 @@ > - > - static int sr_class3_enable(struct voltagedomain *voltdm) > - { > -- unsigned long volt = omap_voltage_get_nom_volt(voltdm); > -+ unsigned long volt = voltdm_get_voltage(voltdm); > - > - if (!volt) { > - pr_warning("%s: Curr voltage unknown. Cannot enable > sr_%s\n", > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 2e5528f..031f6bf 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -45,13 +45,13 @@ static LIST_HEAD(voltdm_list); > - > - /* Public functions */ > - /** > -- * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated > voltage > -- * @voltdm: pointer to the VDD for which current voltage info is needed > -+ * voltdm_get_voltage() - Gets the current non-auto-compensated voltage > -+ * @voltdm: pointer to the voltdm for which current voltage info is needed > - * > -- * API to get the current non-auto-compensated voltage for a VDD. > -- * Returns 0 in case of error else returns the current voltage for the VDD. > -+ * API to get the current non-auto-compensated voltage for a voltage domain. > -+ * Returns 0 in case of error else returns the current voltage. > - */ > --unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) > -+unsigned long voltdm_get_voltage(struct voltagedomain *voltdm) > - { > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > -@@ -72,6 +72,8 @@ unsigned long omap_voltage_get_nom_volt(struct > voltagedomain *voltdm) > - int voltdm_scale(struct voltagedomain *voltdm, > - unsigned long target_volt) > - { > -+ int ret; > -+ > - if (!voltdm || IS_ERR(voltdm)) { > - pr_warning("%s: VDD specified does not exist!\n", __func__); > - return -EINVAL; > -@@ -104,7 +106,7 @@ void voltdm_reset(struct voltagedomain *voltdm) > - return; > - } > - > -- target_volt = omap_voltage_get_nom_volt(voltdm); > -+ target_volt = voltdm_get_voltage(voltdm); > - if (!target_volt) { > - pr_err("%s: unable to find current voltage for vdd_%s\n", > - __func__, voltdm->name); > -diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach- > omap2/voltage.h > -index 68b1ed5..b4c6259 100644 > ---- a/arch/arm/mach-omap2/voltage.h > -+++ b/arch/arm/mach-omap2/voltage.h > -@@ -143,7 +143,6 @@ void omap_voltage_get_volttable(struct > voltagedomain *voltdm, > - struct omap_volt_data **volt_data); > - struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain > *voltdm, > - unsigned long volt); > --unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); > - #ifdef CONFIG_PM > - int omap_voltage_register_pmic(struct voltagedomain *voltdm, > - struct omap_voltdm_pmic *pmic); > -@@ -178,4 +177,5 @@ int voltdm_for_each_pwrdm(struct voltagedomain > *voltdm, > - struct powerdomain *pwrdm)); > - int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); > - void voltdm_reset(struct voltagedomain *voltdm); > -+unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); > - #endif > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3- > voltage-update-nominal-voltage-in-voltdm_scale.patch b/recipes- > kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3-voltage-update-nominal- > voltage-in-voltdm_scale.patch > deleted file mode 100644 > index 63ecb27..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3-voltage- > update-nominal-voltage-in-voltdm_scale.patch > +++ /dev/null > @@ -1,49 +0,0 @@ > -From 5bd4a2cb8354937390805ed248235670cf229935 Mon Sep 17 00:00:00 > 2001 > -From: Kevin Hilman <khilman@ti.com> > -Date: Mon, 18 Jul 2011 16:24:17 -0700 > -Subject: [PATCH 144/149] OMAP3+: voltage: update nominal voltage in > voltdm_scale() not VC post-scale > - > -Currently, the nominal voltage is updated in the VC post-scale function > -which is common to both scaling methods. However, this has readabiliy > -problems as this update is not where it might be expected. Instead, move > -the updated into voltdm_scale() upon a successful return of voltdm->scale() > - > -Signed-off-by: Kevin Hilman <khilman@ti.com> > ---- > - arch/arm/mach-omap2/vc.c | 2 -- > - arch/arm/mach-omap2/voltage.c | 6 +++++- > - 2 files changed, 5 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c > -index 3233c69..16fa912 100644 > ---- a/arch/arm/mach-omap2/vc.c > -+++ b/arch/arm/mach-omap2/vc.c > -@@ -143,8 +143,6 @@ void omap_vc_post_scale(struct voltagedomain > *voltdm, > - smps_delay = ((smps_steps * voltdm->pmic->step_size) / > - voltdm->pmic->slew_rate) + 2; > - udelay(smps_delay); > -- > -- voltdm->nominal_volt = target_volt; > - } > - > - /* vc_bypass_scale - VC bypass method of voltage scaling */ > -diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach- > omap2/voltage.c > -index 031f6bf..cebc8b1 100644 > ---- a/arch/arm/mach-omap2/voltage.c > -+++ b/arch/arm/mach-omap2/voltage.c > -@@ -85,7 +85,11 @@ int voltdm_scale(struct voltagedomain *voltdm, > - return -ENODATA; > - } > - > -- return voltdm->scale(voltdm, target_volt); > -+ ret = voltdm->scale(voltdm, target_volt); > -+ if (!ret) > -+ voltdm->nominal_volt = target_volt; > -+ > -+ return ret; > - } > - > - /** > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145-OMAP4-PM- > TWL6030-fix-voltage-conversion-formula.patch b/recipes-kernel/linux/linux- > 3.0/pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion- > formula.patch > deleted file mode 100644 > index e114b6c..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145-OMAP4-PM- > TWL6030-fix-voltage-conversion-formula.patch > +++ /dev/null > @@ -1,85 +0,0 @@ > -From 8ec7a1410e7ad5a4027deabc8025b5c7291c7579 Mon Sep 17 00:00:00 > 2001 > -From: Patrick Titiano <p-titiano@ti.com> > -Date: Wed, 18 May 2011 00:17:30 -0500 > -Subject: [PATCH 145/149] OMAP4: PM: TWL6030: fix voltage conversion > formula > - > -omap_twl_vsel_to_uv() and omap_twl_uv_to_vsel() functions used to convert > -voltages to TWL6030 SMPS commands (a.k.a "vsel") implement incorrect > conversion > -formula. > -It uses legacy OMAP3 formula, but OMAP4 Power IC has different offset and > -voltage step: > - - Voltage Step is now 12.66mV (instead of 12.5mV) > - - Offset is either 607.7mV or 709mV depending on TWL6030 chip revision > - (instead of 600mV) > -This leads to setting voltages potentially higher than expected, and so > -potentially some (limited) power overconsumption. > - > -For reference, see formula and tables in section 8.5.2.3 > -"Output Voltage Selection (Standard Mode / Extended Mode with or without > offset)" > - in TWL6030 functional specifications document. > - > -[nm@ti.com: ported to voltdm_c] > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Patrick Titiano <p-titiano@ti.com> > ---- > - arch/arm/mach-omap2/omap_twl.c | 14 +++++++------- > - 1 files changed, 7 insertions(+), 7 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index 6b247d1..a66bf6b 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -106,9 +106,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 > vsel) > - return 1350000; > - > - if (smps_offset & 0x8) > -- return ((((vsel - 1) * 125) + 7000)) * 100; > -+ return ((((vsel - 1) * 1266) + 70900)) * 10; > - else > -- return ((((vsel - 1) * 125) + 6000)) * 100; > -+ return ((((vsel - 1) * 1266) + 60770)) * 10; > - } > - > - static u8 twl6030_uv_to_vsel(unsigned long uv) > -@@ -138,9 +138,9 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) > - return 0x3A; > - > - if (smps_offset & 0x8) > -- return DIV_ROUND_UP(uv - 700000, 12500) + 1; > -+ return DIV_ROUND_UP(uv - 709000, 12660) + 1; > - else > -- return DIV_ROUND_UP(uv - 600000, 12500) + 1; > -+ return DIV_ROUND_UP(uv - 607700, 12660) + 1; > - } > - > - static struct omap_voltdm_pmic omap3_mpu_pmic = { > -@@ -187,7 +187,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = > { > - > - static struct omap_voltdm_pmic omap4_mpu_pmic = { > - .slew_rate = 4000, > -- .step_size = 12500, > -+ .step_size = 12660, > - .on_volt = 1350000, > - .onlp_volt = 1350000, > - .ret_volt = 837500, > -@@ -208,7 +208,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = > { > - > - static struct omap_voltdm_pmic omap4_iva_pmic = { > - .slew_rate = 4000, > -- .step_size = 12500, > -+ .step_size = 12660, > - .on_volt = 1100000, > - .onlp_volt = 1100000, > - .ret_volt = 837500, > -@@ -229,7 +229,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { > - > - static struct omap_voltdm_pmic omap4_core_pmic = { > - .slew_rate = 4000, > -- .step_size = 12500, > -+ .step_size = 12660, > - .on_volt = 1100000, > - .onlp_volt = 1100000, > - .ret_volt = 837500, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146-OMAP4-PM- > TWL6030-fix-uv-to-voltage-for-0x39.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch > deleted file mode 100644 > index 4f3851e..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146-OMAP4-PM- > TWL6030-fix-uv-to-voltage-for-0x39.patch > +++ /dev/null > @@ -1,37 +0,0 @@ > -From bfc31f950af6d9e8eb59ffeb80b3ba39ef98a943 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 18 May 2011 00:17:31 -0500 > -Subject: [PATCH 146/149] OMAP4: PM: TWL6030: fix uv to voltage for >0x39 > - > -using 1.35V as a check is not correct, we know that beyond 0x39, > -voltages are non linear - hence use the conversion iff uV greater > -than that for 0x39. For example, with 709mV as the smps offset, > -the max linear is actually 1.41V(0x39vsel)! > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > ---- > - arch/arm/mach-omap2/omap_twl.c | 7 ++++++- > - 1 files changed, 6 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index a66bf6b..5def7c2 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -134,8 +134,13 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) > - * hardcoding only for 1.35 V which is used for 1GH OPP for > - * OMAP4430. > - */ > -- if (uv == 1350000) > -+ if (uv > twl6030_vsel_to_uv(0x39)) { > -+ if (uv == 1350000) > -+ return 0x3A; > -+ pr_err("%s:OUT OF RANGE! non mapped vsel for %ld Vs max > %ld\n", > -+ __func__, uv, twl6030_vsel_to_uv(0x39)); > - return 0x3A; > -+ } > - > - if (smps_offset & 0x8) > - return DIV_ROUND_UP(uv - 709000, 12660) + 1; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147-OMAP4-PM- > TWL6030-address-0V-conversions.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch > deleted file mode 100644 > index 5456fee..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147-OMAP4-PM- > TWL6030-address-0V-conversions.patch > +++ /dev/null > @@ -1,38 +0,0 @@ > -From ccac5e6430353118ac7b9c46493e8cdf12114bf1 Mon Sep 17 00:00:00 > 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 18 May 2011 00:17:32 -0500 > -Subject: [PATCH 147/149] OMAP4: PM: TWL6030: address 0V conversions > - > -0V conversions should be mapped to 0 as it is meant to denote > -off voltages. > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > ---- > - arch/arm/mach-omap2/omap_twl.c | 4 ++++ > - 1 files changed, 4 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index 5def7c2..b30adf3 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -95,6 +95,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) > - is_offset_valid = true; > - } > - > -+ if (!vsel) > -+ return 0; > - /* > - * There is no specific formula for voltage to vsel > - * conversion above 1.3V. There are special hardcoded > -@@ -127,6 +129,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) > - is_offset_valid = true; > - } > - > -+ if (!uv) > -+ return 0x00; > - /* > - * There is no specific formula for voltage to vsel > - * conversion above 1.3V. There are special hardcoded > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148-OMAP4-PM- > TWL6030-fix-ON-RET-OFF-voltages.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch > deleted file mode 100644 > index 64dd7cb..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148-OMAP4-PM- > TWL6030-fix-ON-RET-OFF-voltages.patch > +++ /dev/null > @@ -1,71 +0,0 @@ > -From 884d61bd127d9e46f6b31c24c5109ba9bc7a3730 Mon Sep 17 00:00:00 > 2001 > -From: Patrick Titiano <p-titiano@ti.com> > -Date: Wed, 18 May 2011 00:17:33 -0500 > -Subject: [PATCH 148/149] OMAP4: PM: TWL6030: fix ON/RET/OFF voltages > - > -According to latest OMAP4430 Data Manual v0.4 dated March 2011: > - - Retention voltage shall be set to 0.83V. See tables 2.2, 2.4 and 2.6 in DM. > - This allows saving a little more power in retention states. > - - OPP100 IVA nominal voltage is 1.188V. See table 2.4 in DM. > - This allows saving a little power when CPU wakes up until Smart-Reflex is > - not yet resumed. > - > -[nm@ti.com: ported to voltdm_c] > -Signed-off-by: Nishanth Menon <nm@ti.com> > -Signed-off-by: Patrick Titiano <p-titiano@ti.com> > ---- > - arch/arm/mach-omap2/omap_twl.c | 24 ++++++++++++------------ > - 1 files changed, 12 insertions(+), 12 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index b30adf3..4bc99fb 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -197,10 +197,10 @@ static struct omap_voltdm_pmic omap3_core_pmic > = { > - static struct omap_voltdm_pmic omap4_mpu_pmic = { > - .slew_rate = 4000, > - .step_size = 12660, > -- .on_volt = 1350000, > -- .onlp_volt = 1350000, > -- .ret_volt = 837500, > -- .off_volt = 600000, > -+ .on_volt = 1375000, > -+ .onlp_volt = 1375000, > -+ .ret_volt = 830000, > -+ .off_volt = 0, > - .volt_setup_time = 0, > - .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, > - .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, > -@@ -218,10 +218,10 @@ static struct omap_voltdm_pmic > omap4_mpu_pmic = { > - static struct omap_voltdm_pmic omap4_iva_pmic = { > - .slew_rate = 4000, > - .step_size = 12660, > -- .on_volt = 1100000, > -- .onlp_volt = 1100000, > -- .ret_volt = 837500, > -- .off_volt = 600000, > -+ .on_volt = 1188000, > -+ .onlp_volt = 1188000, > -+ .ret_volt = 830000, > -+ .off_volt = 0, > - .volt_setup_time = 0, > - .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, > - .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, > -@@ -239,10 +239,10 @@ static struct omap_voltdm_pmic omap4_iva_pmic > = { > - static struct omap_voltdm_pmic omap4_core_pmic = { > - .slew_rate = 4000, > - .step_size = 12660, > -- .on_volt = 1100000, > -- .onlp_volt = 1100000, > -- .ret_volt = 837500, > -- .off_volt = 600000, > -+ .on_volt = 1200000, > -+ .onlp_volt = 1200000, > -+ .ret_volt = 830000, > -+ .off_volt = 0, > - .volt_setup_time = 0, > - .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, > - .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149-OMAP4-PM- > TWL6030-add-cmd-register.patch b/recipes-kernel/linux/linux-3.0/pm- > wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch > deleted file mode 100644 > index 78829a6..0000000 > --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149-OMAP4-PM- > TWL6030-add-cmd-register.patch > +++ /dev/null > @@ -1,56 +0,0 @@ > -From 478e5300d4eb33cdebd393d634304a83833bc4d4 Mon Sep 17 > 00:00:00 2001 > -From: Nishanth Menon <nm@ti.com> > -Date: Wed, 18 May 2011 00:17:34 -0500 > -Subject: [PATCH 149/149] OMAP4: PM: TWL6030: add cmd register > - > -Without the command register, ON/ONLP/RET/OFF voltages are > -useless. and TWL will be unable to use these > - > -Signed-off-by: Nishanth Menon <nm@ti.com> > ---- > - arch/arm/mach-omap2/omap_twl.c | 6 ++++++ > - 1 files changed, 6 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- > omap2/omap_twl.c > -index 4bc99fb..f515a1a 100644 > ---- a/arch/arm/mach-omap2/omap_twl.c > -+++ b/arch/arm/mach-omap2/omap_twl.c > -@@ -42,8 +42,11 @@ > - > - #define OMAP4_SRI2C_SLAVE_ADDR 0x12 > - #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 > -+#define OMAP4_VDD_MPU_SR_CMD_REG 0x56 > - #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B > -+#define OMAP4_VDD_IVA_SR_CMD_REG 0x5C > - #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 > -+#define OMAP4_VDD_CORE_SR_CMD_REG 0x62 > - > - #define OMAP4_VP_CONFIG_ERROROFFSET 0x00 > - #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 > -@@ -210,6 +213,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = > { > - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, > - .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, > -+ .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, > - .i2c_high_speed = true, > - .vsel_to_uv = twl6030_vsel_to_uv, > - .uv_to_vsel = twl6030_uv_to_vsel, > -@@ -231,6 +235,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { > - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, > - .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, > -+ .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, > - .i2c_high_speed = true, > - .vsel_to_uv = twl6030_vsel_to_uv, > - .uv_to_vsel = twl6030_uv_to_vsel, > -@@ -252,6 +257,7 @@ static struct omap_voltdm_pmic omap4_core_pmic = > { > - .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, > - .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, > - .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, > -+ .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, > - .vsel_to_uv = twl6030_vsel_to_uv, > - .uv_to_vsel = twl6030_uv_to_vsel, > - }; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don-t-display- > single-block-read-console-messages.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0001-mmc-don-t-display-single-block-read-console- > messages.patch > deleted file mode 100644 > index 8c1faba..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don-t-display-single- > block-read-console-messages.patch > +++ /dev/null > @@ -1,28 +0,0 @@ > -From cc8c276d530520ce822a1d0e8d748f7b9e54a2d5 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Mon, 4 Jan 2010 19:20:25 -0800 > -Subject: [PATCH 01/14] mmc: don't display single block read console messages > - > -mmc: don't display single block read console messages > ---- > - drivers/mmc/card/block.c | 4 ++-- > - 1 files changed, 2 insertions(+), 2 deletions(-) > - > -diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c > -index f85e422..0025735 100644 > ---- a/drivers/mmc/card/block.c > -+++ b/drivers/mmc/card/block.c > -@@ -812,8 +812,8 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue > *mq, struct request *req) > - brq.data.error || brq.stop.error) { > - if (brq.data.blocks > 1 && rq_data_dir(req) == READ) { > - /* Redo read one sector at a time */ > -- printk(KERN_WARNING "%s: retrying using > single " > -- "block read\n", req->rq_disk->disk_name); > -+ /* printk(KERN_WARNING "%s: retrying using > single " > -+ "block read\n", req->rq_disk->disk_name); > */ > - disable_multi = 1; > - continue; > - } > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0002-omap-Change- > omap_device-activate-dectivate-latency-m.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0002-omap-Change-omap_device-activate-dectivate-latency- > m.patch > deleted file mode 100644 > index 54305bd..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0002-omap-Change- > omap_device-activate-dectivate-latency-m.patch > +++ /dev/null > @@ -1,49 +0,0 @@ > -From a2e59d4041e8c42e21d90c0696ea8437a0cfc866 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Mon, 23 May 2011 12:16:50 -0700 > -Subject: [PATCH 02/14] omap: Change omap_device activate/dectivate latency > messages from pr_warning to pr_debug > - > -Messages can be safely ignored, so reduce console noise > - > -Signed-off-by: Steve Sakoman <steve@sakoman.com> > ---- > - arch/arm/plat-omap/omap_device.c | 8 ++++---- > - 1 files changed, 4 insertions(+), 4 deletions(-) > - > -diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat- > omap/omap_device.c > -index be45147..e3d9520 100644 > ---- a/arch/arm/plat-omap/omap_device.c > -+++ b/arch/arm/plat-omap/omap_device.c > -@@ -146,12 +146,12 @@ static int _omap_device_activate(struct > omap_device *od, u8 ignore_lat) > - odpl->activate_lat_worst = act_lat; > - if (odpl->flags & > OMAP_DEVICE_LATENCY_AUTO_ADJUST) { > - odpl->activate_lat = act_lat; > -- pr_warning("omap_device: %s.%d: new worst > case " > -+ pr_debug("omap_device: %s.%d: new worst > case " > - "activate latency %d: %llu\n", > - od->pdev.name, od->pdev.id, > - od->pm_lat_level, act_lat); > - } else > -- pr_warning("omap_device: %s.%d: activate " > -+ pr_debug("omap_device: %s.%d: activate " > - "latency %d higher than exptected. " > - "(%llu > %d)\n", > - od->pdev.name, od->pdev.id, > -@@ -214,12 +214,12 @@ static int _omap_device_deactivate(struct > omap_device *od, u8 ignore_lat) > - odpl->deactivate_lat_worst = deact_lat; > - if (odpl->flags & > OMAP_DEVICE_LATENCY_AUTO_ADJUST) { > - odpl->deactivate_lat = deact_lat; > -- pr_warning("omap_device: %s.%d: new worst > case " > -+ pr_debug("omap_device: %s.%d: new worst > case " > - "deactivate latency %d: %llu\n", > - od->pdev.name, od->pdev.id, > - od->pm_lat_level, deact_lat); > - } else > -- pr_warning("omap_device: %s.%d: deactivate > " > -+ pr_debug("omap_device: %s.%d: deactivate " > - "latency %d higher than exptected. " > - "(%llu > %d)\n", > - od->pdev.name, od->pdev.id, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP-DSS2-add- > bootarg-for-selecting-svideo-or-compos.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or- > compos.patch > deleted file mode 100644 > index 4356287..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP-DSS2-add-bootarg- > for-selecting-svideo-or-compos.patch > +++ /dev/null > @@ -1,75 +0,0 @@ > -From 630557c2785955cc0abbe4bf29b22f703a404e02 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Tue, 19 Jan 2010 21:19:15 -0800 > -Subject: [PATCH 03/14] OMAP: DSS2: add bootarg for selecting svideo or > composite for tv output > - > -also add pal-16 and ntsc-16 omapfb.mode settings for 16bpp > ---- > - drivers/video/omap2/dss/venc.c | 22 ++++++++++++++++++++++ > - drivers/video/omap2/omapfb/omapfb-main.c | 10 +++++++++- > - 2 files changed, 31 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c > -index 980f919..4fb594d 100644 > ---- a/drivers/video/omap2/dss/venc.c > -+++ b/drivers/video/omap2/dss/venc.c > -@@ -85,6 +85,11 @@ > - #define VENC_OUTPUT_TEST 0xC8 > - #define VENC_DAC_B__DAC_C 0xC8 > - > -+static char *tv_connection; > -+ > -+module_param_named(tvcable, tv_connection, charp, 0); > -+MODULE_PARM_DESC(tvcable, "TV connection type (svideo, composite)"); > -+ > - struct venc_config { > - u32 f_control; > - u32 vidout_ctrl; > -@@ -461,6 +466,23 @@ static int venc_panel_probe(struct omap_dss_device > *dssdev) > - { > - dssdev->panel.timings = omap_dss_pal_timings; > - > -+ /* Allow the TV output to be overriden */ > -+ if (tv_connection) { > -+ if (strcmp(tv_connection, "svideo") == 0) { > -+ printk(KERN_INFO > -+ "omapdss: tv output is svideo.\n"); > -+ dssdev->phy.venc.type = > OMAP_DSS_VENC_TYPE_SVIDEO; > -+ } else if (strcmp(tv_connection, "composite") == 0) { > -+ printk(KERN_INFO > -+ "omapdss: tv output is composite.\n"); > -+ dssdev->phy.venc.type = > OMAP_DSS_VENC_TYPE_COMPOSITE; > -+ } else { > -+ printk(KERN_INFO > -+ "omapdss: unsupported output type'%s'.\n", > -+ tv_connection); > -+ } > -+ } > -+ > - return 0; > - } > - > -diff --git a/drivers/video/omap2/omapfb/omapfb-main.c > b/drivers/video/omap2/omapfb/omapfb-main.c > -index 505bc12..c35c1f8 100644 > ---- a/drivers/video/omap2/omapfb/omapfb-main.c > -+++ b/drivers/video/omap2/omapfb/omapfb-main.c > -@@ -2002,7 +2002,15 @@ static int omapfb_mode_to_timings(const char > *mode_str, > - int r; > - > - #ifdef CONFIG_OMAP2_DSS_VENC > -- if (strcmp(mode_str, "pal") == 0) { > -+ if (strcmp(mode_str, "pal-16") == 0) { > -+ *timings = omap_dss_pal_timings; > -+ *bpp = 16; > -+ return 0; > -+ } else if (strcmp(mode_str, "ntsc-16") == 0) { > -+ *timings = omap_dss_ntsc_timings; > -+ *bpp = 16; > -+ return 0; > -+ } else if (strcmp(mode_str, "pal") == 0) { > - *timings = omap_dss_pal_timings; > - *bpp = 24; > - return 0; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand-Eliminate- > noisey-uncorrectable-error-messag.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error- > messag.patch > deleted file mode 100644 > index 94d629b..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand-Eliminate-noisey- > uncorrectable-error-messag.patch > +++ /dev/null > @@ -1,28 +0,0 @@ > -From bf974dd3f24e623f04422b8013d047d78d430f0e Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Fri, 1 Jul 2011 10:00:03 -0700 > -Subject: [PATCH 04/14] mtd: nand: Eliminate noisey "uncorrectable error" > messages > - > -Other layers of the stack give more informative messages when > __nand_correct_data() fails > - > -Signed-off-by: Steve Sakoman <steve@sakoman.com> > ---- > - drivers/mtd/nand/nand_ecc.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c > -index 271b8e7..ad55e55 100644 > ---- a/drivers/mtd/nand/nand_ecc.c > -+++ b/drivers/mtd/nand/nand_ecc.c > -@@ -507,7 +507,7 @@ int __nand_correct_data(unsigned char *buf, > - if ((bitsperbyte[b0] + bitsperbyte[b1] + bitsperbyte[b2]) == 1) > - return 1; /* error in ecc data; no action needed */ > - > -- printk(KERN_ERR "uncorrectable error : "); > -+ // printk(KERN_ERR "uncorrectable error : "); > - return -1; > - } > - EXPORT_SYMBOL(__nand_correct_data); > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add-timings-for- > hd720.patch b/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add- > timings-for-hd720.patch > deleted file mode 100644 > index 2b474d6..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add-timings-for- > hd720.patch > +++ /dev/null > @@ -1,27 +0,0 @@ > -From fbc33b30b663ec8c0d4374ba08f0608a7cc4b977 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Sat, 19 Dec 2009 06:52:43 -0800 > -Subject: [PATCH 05/14] video: add timings for hd720 > - > ---- > - drivers/video/modedb.c | 4 ++++ > - 1 files changed, 4 insertions(+), 0 deletions(-) > - > -diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c > -index cb175fe..9baead4 100644 > ---- a/drivers/video/modedb.c > -+++ b/drivers/video/modedb.c > -@@ -103,6 +103,10 @@ static const struct fb_videomode modedb[] = { > - { NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, 0, > - FB_VMODE_NONINTERLACED }, > - > -+ /* 1280x720 @ 60 Hz, 45 kHz hsync, CEA 681-E Format 4 */ > -+ { "hd720", 60, 1280, 720, 13468, 220, 110, 20, 5, 40, 5, 0, > -+ FB_VMODE_NONINTERLACED }, > -+ > - /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ > - { NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, 0, > - FB_VMODE_INTERLACED }, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net-smsc911x- > return-ENODEV-if-device-is-not-.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not- > .patch > deleted file mode 100644 > index b8fdba2..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net-smsc911x- > return-ENODEV-if-device-is-not-.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From 948bbae38457af6a11232375f9d95fc69641e9f4 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <sakoman@gmail.com> > -Date: Tue, 15 Dec 2009 15:17:44 -0800 > -Subject: [PATCH 06/14] drivers: net: smsc911x: return ENODEV if device is not > found > - > -Signed-off-by: Steve Sakoman <sakoman@gmail.com> > ---- > - drivers/net/smsc911x.c | 4 +++- > - 1 files changed, 3 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c > -index c6d47d1..0c7c4a2 100644 > ---- a/drivers/net/smsc911x.c > -+++ b/drivers/net/smsc911x.c > -@@ -2169,8 +2169,10 @@ static int __devinit smsc911x_drv_probe(struct > platform_device *pdev) > - pdata->ops = &shifted_smsc911x_ops; > - > - retval = smsc911x_init(dev); > -- if (retval < 0) > -+ if (retval < 0) { > -+ retval = -ENODEV; > - goto out_unmap_io_3; > -+ } > - > - /* configure irq polarity and type before connecting isr */ > - if (pdata->config.irq_polarity == > SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0007-drivers-input- > touchscreen-ads7846-return-ENODEV-if-d.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if- > d.patch > deleted file mode 100644 > index 158c0ad..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0007-drivers-input-touchscreen- > ads7846-return-ENODEV-if-d.patch > +++ /dev/null > @@ -1,45 +0,0 @@ > -From 34f40fe736113c2066bf86ca163a4aff8b6d061f Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <sakoman@gmail.com> > -Date: Tue, 15 Dec 2009 15:24:10 -0800 > -Subject: [PATCH 07/14] drivers: input: touchscreen: ads7846: return ENODEV > if device is not found > - > -Signed-off-by: Steve Sakoman <sakoman@gmail.com> > ---- > - drivers/input/touchscreen/ads7846.c | 13 ++++++++++--- > - 1 files changed, 10 insertions(+), 3 deletions(-) > - > -diff --git a/drivers/input/touchscreen/ads7846.c > b/drivers/input/touchscreen/ads7846.c > -index 5196861..b0bd1ba 100644 > ---- a/drivers/input/touchscreen/ads7846.c > -+++ b/drivers/input/touchscreen/ads7846.c > -@@ -1349,9 +1349,16 @@ static int __devinit ads7846_probe(struct > spi_device *spi) > - * the touchscreen, in case it's not connected. > - */ > - if (ts->model == 7845) > -- ads7845_read12_ser(&spi->dev, PWRDOWN); > -+ err = ads7845_read12_ser(&spi->dev, PWRDOWN); > - else > -- (void) ads7846_read12_ser(&spi->dev, > READ_12BIT_SER(vaux)); > -+ err = ads7846_read12_ser(&spi->dev, > READ_12BIT_SER(vaux)); > -+ > -+ /* if sample is all 0's or all 1's then there is no device on spi */ > -+ if ( (err == 0x000) || (err == 0xfff)) { > -+ dev_info(&spi->dev, "no device detected, test read result was > 0x%08X\n", err); > -+ err = -ENODEV; > -+ goto err_free_irq; > -+ } > - > - err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group); > - if (err) > -@@ -1376,7 +1383,7 @@ static int __devinit ads7846_probe(struct > spi_device *spi) > - err_put_regulator: > - regulator_put(ts->reg); > - err_free_gpio: > -- if (!ts->get_pendown_state) > -+ if (!ts->get_pendown_state && ts->gpio_pendown != -1) > - gpio_free(ts->gpio_pendown); > - err_cleanup_filter: > - if (ts->filter_cleanup) > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0008-Revert-omap2_mcspi- > Flush-posted-writes.patch b/recipes-kernel/linux/linux-3.0/sakoman/0008- > Revert-omap2_mcspi-Flush-posted-writes.patch > deleted file mode 100644 > index 8058b5c..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0008-Revert-omap2_mcspi-Flush- > posted-writes.patch > +++ /dev/null > @@ -1,27 +0,0 @@ > -From baf40f002836b7c0fe9aeeba92ba483f6e9d2384 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Thu, 3 Mar 2011 13:29:30 -0800 > -Subject: [PATCH 08/14] Revert "omap2_mcspi: Flush posted writes" > - > -This reverts commit a330ce2001b290c59fe98c37e981683ef0a75fdf. > - > -The above commit breaks the ads7846 driver > ---- > - drivers/spi/omap2_mcspi.c | 1 - > - 1 files changed, 0 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c > -index 969cdd2..da981ee 100644 > ---- a/drivers/spi/omap2_mcspi.c > -+++ b/drivers/spi/omap2_mcspi.c > -@@ -195,7 +195,6 @@ static inline void mcspi_write_chconf0(const struct > spi_device *spi, u32 val) > - > - cs->chconf0 = val; > - mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, val); > -- mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0); > - } > - > - static void omap2_mcspi_set_dma_req(const struct spi_device *spi, > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use-threaded- > IRQ-remove-IRQ-enable-in-interr.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in- > interr.patch > deleted file mode 100644 > index 220f974..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use-threaded-IRQ- > remove-IRQ-enable-in-interr.patch > +++ /dev/null > @@ -1,57 +0,0 @@ > -From 3532a9ceb9eb81147eab751b8c124b59acc87374 Mon Sep 17 00:00:00 > 2001 > -From: Todd Poynor <toddpoynor@google.com> > -Date: Wed, 27 Jul 2011 07:07:20 +0000 > -Subject: [PATCH 09/14] rtc: twl: Use threaded IRQ, remove IRQ enable in > interrupt handler > - > -IRQs disabled on entry to twl_rtc_interrupt is not a consequence > -of LOCKDEP; both twl6030 and twl4030 explicitly disable IRQs > -before calling the module IRQ handlers. > - > -The ISR should not be enabling IRQs; use a threaded IRQ handler > -instead. > - > -Also fixes warnings: > - > - WARNING: at kernel/irq/handle.c:130 handle_irq_event_percpu+nnn > - irq nnn handler twl_rtc_interrupt+nnn enabled interrupts > - > -Signed-off-by: Todd Poynor <toddpoynor@google.com> > ---- > - drivers/rtc/rtc-twl.c | 14 +++----------- > - 1 files changed, 3 insertions(+), 11 deletions(-) > - > -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c > -index f9a2799..3fee95e 100644 > ---- a/drivers/rtc/rtc-twl.c > -+++ b/drivers/rtc/rtc-twl.c > -@@ -362,14 +362,6 @@ static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) > - int res; > - u8 rd_reg; > - > --#ifdef CONFIG_LOCKDEP > -- /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which > -- * we don't want and can't tolerate. Although it might be > -- * friendlier not to borrow this thread context... > -- */ > -- local_irq_enable(); > --#endif > -- > - res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); > - if (res) > - goto out; > -@@ -462,9 +454,9 @@ static int __devinit twl_rtc_probe(struct > platform_device *pdev) > - if (ret < 0) > - goto out1; > - > -- ret = request_irq(irq, twl_rtc_interrupt, > -- IRQF_TRIGGER_RISING, > -- dev_name(&rtc->dev), rtc); > -+ ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, > -+ IRQF_TRIGGER_RISING, > -+ dev_name(&rtc->dev), rtc); > - if (ret < 0) { > - dev_err(&pdev->dev, "IRQ is not free.\n"); > - goto out1; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix- > registration-vs.-init-order.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch > deleted file mode 100644 > index d710643..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix-registration-vs.- > init-order.patch > +++ /dev/null > @@ -1,122 +0,0 @@ > -From 2cc62887b37d504df009d7241e6cebc3c65c32a5 Mon Sep 17 00:00:00 > 2001 > -From: Todd Poynor <toddpoynor@google.com> > -Date: Wed, 27 Jul 2011 07:07:21 +0000 > -Subject: [PATCH 10/14] rtc: twl: Fix registration vs. init order > - > -Only register as an RTC device after the hardware has been > -successfully initialized. The RTC class driver will call > -back to this driver to read a pending alarm, and other > -drivers watching for new devices on the RTC class may > -read the RTC time upon registration. Such access might > -occur while the RTC is stopped, prior to clearing > -pending alarms, etc. > - > -The new ordering also avoids leaving the platform > -device drvdata set to an unregistered struct rtc_device * > -on probe errors. > - > -Signed-off-by: Todd Poynor <toddpoynor@google.com> > ---- > - drivers/rtc/rtc-twl.c | 52 ++++++++++++++++++++++-------------------------- > - 1 files changed, 24 insertions(+), 28 deletions(-) > - > -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c > -index 3fee95e..a64494e 100644 > ---- a/drivers/rtc/rtc-twl.c > -+++ b/drivers/rtc/rtc-twl.c > -@@ -420,24 +420,12 @@ static struct rtc_class_ops twl_rtc_ops = { > - static int __devinit twl_rtc_probe(struct platform_device *pdev) > - { > - struct rtc_device *rtc; > -- int ret = 0; > -+ int ret = -EINVAL; > - int irq = platform_get_irq(pdev, 0); > - u8 rd_reg; > - > - if (irq <= 0) > -- return -EINVAL; > -- > -- rtc = rtc_device_register(pdev->name, > -- &pdev->dev, &twl_rtc_ops, THIS_MODULE); > -- if (IS_ERR(rtc)) { > -- ret = PTR_ERR(rtc); > -- dev_err(&pdev->dev, "can't register RTC device, err %ld\n", > -- PTR_ERR(rtc)); > -- goto out0; > -- > -- } > -- > -- platform_set_drvdata(pdev, rtc); > -+ goto out1; > - > - ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); > - if (ret < 0) > -@@ -454,14 +442,6 @@ static int __devinit twl_rtc_probe(struct > platform_device *pdev) > - if (ret < 0) > - goto out1; > - > -- ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, > -- IRQF_TRIGGER_RISING, > -- dev_name(&rtc->dev), rtc); > -- if (ret < 0) { > -- dev_err(&pdev->dev, "IRQ is not free.\n"); > -- goto out1; > -- } > -- > - if (twl_class_is_6030()) { > - twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, > - REG_INT_MSK_LINE_A); > -@@ -472,28 +452,44 @@ static int __devinit twl_rtc_probe(struct > platform_device *pdev) > - /* Check RTC module status, Enable if it is off */ > - ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); > - if (ret < 0) > -- goto out2; > -+ goto out1; > - > - if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { > - dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); > - rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; > - ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); > - if (ret < 0) > -- goto out2; > -+ goto out1; > - } > - > - /* init cached IRQ enable bits */ > - ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); > - if (ret < 0) > -+ goto out1; > -+ > -+ rtc = rtc_device_register(pdev->name, > -+ &pdev->dev, &twl_rtc_ops, THIS_MODULE); > -+ if (IS_ERR(rtc)) { > -+ ret = PTR_ERR(rtc); > -+ dev_err(&pdev->dev, "can't register RTC device, err %ld\n", > -+ PTR_ERR(rtc)); > -+ goto out1; > -+ } > -+ > -+ ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, > -+ IRQF_TRIGGER_RISING, > -+ dev_name(&rtc->dev), rtc); > -+ if (ret < 0) { > -+ dev_err(&pdev->dev, "IRQ is not free.\n"); > - goto out2; > -+ } > - > -- return ret; > -+ platform_set_drvdata(pdev, rtc); > -+ return 0; > - > - out2: > -- free_irq(irq, rtc); > --out1: > - rtc_device_unregister(rtc); > --out0: > -+out1: > - return ret; > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs-Enable- > audio-capture-by-default-for-twl40.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for- > twl40.patch > deleted file mode 100644 > index 4a903b2..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs-Enable-audio- > capture-by-default-for-twl40.patch > +++ /dev/null > @@ -1,27 +0,0 @@ > -From 76ab79b5491dd823477cd181b57795aa6b55f53c Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Thu, 17 Dec 2009 12:45:20 -0800 > -Subject: [PATCH 11/14] soc: codecs: Enable audio capture by default for > twl4030 > - > ---- > - sound/soc/codecs/twl4030.c | 4 ++-- > - 1 files changed, 2 insertions(+), 2 deletions(-) > - > -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c > -index bec788b..158ea04 100644 > ---- a/sound/soc/codecs/twl4030.c > -+++ b/sound/soc/codecs/twl4030.c > -@@ -55,8 +55,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] > = { > - 0x00, /* REG_OPTION (0x2) */ > - 0x00, /* REG_UNKNOWN (0x3) */ > - 0x00, /* REG_MICBIAS_CTL (0x4) */ > -- 0x00, /* REG_ANAMICL (0x5) */ > -- 0x00, /* REG_ANAMICR (0x6) */ > -+ 0x34, /* REG_ANAMICL (0x5) */ > -+ 0x14, /* REG_ANAMICR (0x6) */ > - 0x00, /* REG_AVADC_CTL (0x7) */ > - 0x00, /* REG_ADCMICSEL (0x8) */ > - 0x00, /* REG_DIGMIXING (0x9) */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs-twl4030- > Turn-on-mic-bias-by-default.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch > deleted file mode 100644 > index 199a0f0..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs-twl4030-Turn- > on-mic-bias-by-default.patch > +++ /dev/null > @@ -1,25 +0,0 @@ > -From 31ec83c7092588f41b69e024f0ddd585c1981094 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Wed, 29 Dec 2010 11:39:16 -0800 > -Subject: [PATCH 12/14] soc: codecs: twl4030: Turn on mic bias by default > - > ---- > - sound/soc/codecs/twl4030.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c > -index 158ea04..9bbf301 100644 > ---- a/sound/soc/codecs/twl4030.c > -+++ b/sound/soc/codecs/twl4030.c > -@@ -54,7 +54,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] > = { > - 0x00, /* REG_CODEC_MODE (0x1) */ > - 0x00, /* REG_OPTION (0x2) */ > - 0x00, /* REG_UNKNOWN (0x3) */ > -- 0x00, /* REG_MICBIAS_CTL (0x4) */ > -+ 0x03, /* REG_MICBIAS_CTL (0x4) */ > - 0x34, /* REG_ANAMICL (0x5) */ > - 0x14, /* REG_ANAMICR (0x6) */ > - 0x00, /* REG_AVADC_CTL (0x7) */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0013-omap-mmc-twl4030- > move-clock-input-selection-prior-to.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior- > to.patch > deleted file mode 100644 > index 016323d..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0013-omap-mmc-twl4030-move- > clock-input-selection-prior-to.patch > +++ /dev/null > @@ -1,39 +0,0 @@ > -From 23d7e04b5d71feafdd920f4bf4b735cc452fef59 Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Sun, 24 Jan 2010 09:33:56 -0800 > -Subject: [PATCH 13/14] omap: mmc-twl4030: move clock input selection prior > to vcc test > - > -otherwise it is not executed on systems that use non-twl regulators > ---- > - arch/arm/mach-omap2/hsmmc.c | 14 ++++++-------- > - 1 files changed, 6 insertions(+), 8 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach- > omap2/hsmmc.c > -index 66868c5..48a6cfb 100644 > ---- a/arch/arm/mach-omap2/hsmmc.c > -+++ b/arch/arm/mach-omap2/hsmmc.c > -@@ -192,15 +192,13 @@ static void hsmmc23_before_set_reg(struct device > *dev, int slot, > - if (mmc->slots[0].remux) > - mmc->slots[0].remux(dev, slot, power_on); > - > -- if (power_on) { > -- /* Only MMC2 supports a CLKIN */ > -- if (mmc->slots[0].internal_clock) { > -- u32 reg; > -+ /* Only MMC2 supports a CLKIN */ > -+ if (mmc->slots[0].internal_clock) { > -+ u32 reg; > - > -- reg = omap_ctrl_readl(control_devconf1_offset); > -- reg |= OMAP2_MMCSDIO2ADPCLKISEL; > -- omap_ctrl_writel(reg, control_devconf1_offset); > -- } > -+ reg = omap_ctrl_readl(control_devconf1_offset); > -+ reg |= OMAP2_MMCSDIO2ADPCLKISEL; > -+ omap_ctrl_writel(reg, control_devconf1_offset); > - } > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl-add-support- > for-backup-battery-recharge.patch b/recipes-kernel/linux/linux- > 3.0/sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch > deleted file mode 100644 > index f44b3d0..0000000 > --- a/recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl-add-support-for- > backup-battery-recharge.patch > +++ /dev/null > @@ -1,57 +0,0 @@ > -From 55f8fd15557b03c2b336c8214d44de9753d0ba5f Mon Sep 17 00:00:00 > 2001 > -From: Steve Sakoman <steve@sakoman.com> > -Date: Thu, 4 Feb 2010 12:26:22 -0800 > -Subject: [PATCH 14/14] rtc-twl: add support for backup battery recharge > - > ---- > - drivers/rtc/rtc-twl.c | 27 ++++++++++++++++++++++++++- > - 1 files changed, 26 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c > -index a64494e..552446b 100644 > ---- a/drivers/rtc/rtc-twl.c > -+++ b/drivers/rtc/rtc-twl.c > -@@ -30,7 +30,24 @@ > - > - #include <linux/i2c/twl.h> > - > -- > -+/* > -+ * PM_RECEIVER block register offsets (use > TWL4030_MODULE_PM_RECEIVER) > -+ */ > -+#define REG_BB_CFG 0x12 > -+ > -+/* PM_RECEIVER BB_CFG bitfields */ > -+#define BIT_PM_RECEIVER_BB_CFG_BBCHEN 0x10 > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL 0x0C > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_2V5 0x00 > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V0 0x04 > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 0x08 > -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3v2 0x0c > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL 0x03 > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA 0x00 > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_150UA 0x01 > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_500UA 0x02 > -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_1MA 0x03 > -+ > - /* > - * RTC block register offsets (use TWL_MODULE_RTC) > - */ > -@@ -484,6 +501,14 @@ static int __devinit twl_rtc_probe(struct > platform_device *pdev) > - goto out2; > - } > - > -+ /* enable backup battery charging */ > -+ /* use a conservative 25uA @ 3.1V */ > -+ ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, > -+ BIT_PM_RECEIVER_BB_CFG_BBCHEN | > -+ BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 | > -+ BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA, > -+ REG_BB_CFG); > -+ > - platform_set_drvdata(pdev, rtc); > - return 0; > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export- > outer_clean_all.patch b/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add- > and-export-outer_clean_all.patch > deleted file mode 100644 > index 62217d2..0000000 > --- a/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export- > outer_clean_all.patch > +++ /dev/null > @@ -1,67 +0,0 @@ > -From 867025d0468dedea5303d1088b292ace4d01c047 Mon Sep 17 00:00:00 > 2001 > -From: Vikram Pandita <vikram.pandita@ti.com> > -Date: Tue, 31 May 2011 09:24:58 +0100 > -Subject: [PATCH] ARM: L2: Add and export outer_clean_all > - > -The Errata 588369 and 539766 demands that clean all operation be done > -as clean each way at a time > - > -This patch also raps the implementation under the CONFIG errata > -macro so that for non-errata version silicon it can be disabled > - > -Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> > -Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > -Cc: Woodruff, Richard <r-woodruff2@ti.com> > ---- > - arch/arm/include/asm/outercache.h | 8 ++++++++ > - arch/arm/mm/cache-l2x0.c | 1 + > - 2 files changed, 9 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/include/asm/outercache.h > b/arch/arm/include/asm/outercache.h > -index d838743..fa8cbd8 100644 > ---- a/arch/arm/include/asm/outercache.h > -+++ b/arch/arm/include/asm/outercache.h > -@@ -28,6 +28,7 @@ struct outer_cache_fns { > - void (*clean_range)(unsigned long, unsigned long); > - void (*flush_range)(unsigned long, unsigned long); > - void (*flush_all)(void); > -+ void (*clean_all)(void); > - void (*inv_all)(void); > - void (*disable)(void); > - #ifdef CONFIG_OUTER_CACHE_SYNC > -@@ -61,6 +62,11 @@ static inline void outer_flush_all(void) > - if (outer_cache.flush_all) > - outer_cache.flush_all(); > - } > -+static inline void outer_clean_all(void) > -+{ > -+ if (outer_cache.clean_all) > -+ outer_cache.clean_all(); > -+} > - > - static inline void outer_inv_all(void) > - { > -@@ -97,6 +103,8 @@ static inline void outer_sync(void) > - #else > - static inline void outer_sync(void) > - { } > -+static inline void outer_clean_all(void) > -+{ } > - #endif > - > - #endif /* __ASM_OUTERCACHE_H */ > -diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c > -index 44c0867..10b79d6 100644 > ---- a/arch/arm/mm/cache-l2x0.c > -+++ b/arch/arm/mm/cache-l2x0.c > -@@ -346,6 +346,7 @@ void __init l2x0_init(void __iomem *base, __u32 > aux_val, __u32 aux_mask) > - outer_cache.inv_all = l2x0_inv_all; > - outer_cache.disable = l2x0_disable; > - outer_cache.set_debug = l2x0_set_debug; > -+ outer_cache.clean_all = l2x0_clean_all; > - > - printk(KERN_INFO "%s cache controller enabled\n", type); > - printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL > 0x%08x, Cache size: %d B\n", > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT-Fix-build- > break-caused-by-update_mode-remo.patch b/recipes-kernel/linux/linux- > 3.0/ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode- > remo.patch > deleted file mode 100644 > index 44bb6b8..0000000 > --- a/recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT-Fix-build-break- > caused-by-update_mode-remo.patch > +++ /dev/null > @@ -1,44 +0,0 @@ > -From 9e3cacdf6fb8c5d704c9fb98f744eddbb25e3cda Mon Sep 17 00:00:00 > 2001 > -From: archit taneja <archit@ti.com> > -Date: Fri, 5 Aug 2011 07:19:21 +0000 > -Subject: [PATCH 1/4] OMAP_VOUT: Fix build break caused by update_mode > removal in DSS2 > - > -The DSS2 driver does not support the configuration of the update_mode of a > -panel anymore. Remove the setting of update_mode done in > omap_vout_probe(). > -Ignore configuration of TE since omap_vout driver doesn't support manual > update > -displays anyway. > - > -Signed-off-by: Archit Taneja <archit@ti.com> > -Tested-by: Koen Kooi <koen@dominion.thruhere.net> > -Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> > ---- > - drivers/media/video/omap/omap_vout.c | 13 ------------- > - 1 files changed, 0 insertions(+), 13 deletions(-) > - > -diff --git a/drivers/media/video/omap/omap_vout.c > b/drivers/media/video/omap/omap_vout.c > -index 4d07c58..d17d6b6 100644 > ---- a/drivers/media/video/omap/omap_vout.c > -+++ b/drivers/media/video/omap/omap_vout.c > -@@ -2557,19 +2557,6 @@ static int __init omap_vout_probe(struct > platform_device *pdev) > - "'%s' Display already enabled\n", > - def_display->name); > - } > -- /* set the update mode */ > -- if (def_display->caps & > -- > OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { > -- if (dssdrv->enable_te) > -- dssdrv->enable_te(def_display, 0); > -- if (dssdrv->set_update_mode) > -- dssdrv- > >set_update_mode(def_display, > -- > OMAP_DSS_UPDATE_MANUAL); > -- } else { > -- if (dssdrv->set_update_mode) > -- dssdrv- > >set_update_mode(def_display, > -- > OMAP_DSS_UPDATE_AUTO); > -- } > - } > - } > - > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap-beagleboard- > add-bbtoys-ulcd-lite-support.patch b/recipes-kernel/linux/linux-3.0/ulcd/0002- > WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch > deleted file mode 100644 > index 1b3d1ff..0000000 > --- a/recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap-beagleboard-add- > bbtoys-ulcd-lite-support.patch > +++ /dev/null > @@ -1,235 +0,0 @@ > -From ba0b157d461f6b8fe61e232e92ea7ee656ad5ecb Mon Sep 17 00:00:00 > 2001 > -From: Jason Kridner <jdk@ti.com> > -Date: Mon, 12 Sep 2011 10:28:14 -0400 > -Subject: [PATCH 2/4] WIP: omap: beagleboard: add bbtoys ulcd-lite support > - > -Added support for the BeagleBoardToys ULCD-Lite. > -* Added ThreeFiveCorp s9700rtwv35tr-01b panel to > - panel-generic-dpi driver. > -* Added TSC2007 and LCD panel to board file. > - > -Relied heavily on the TSC2007 integration work done by > -John Weber and panel timings from Roger Monk. > - > -Signed-off-by: Jason Kridner <jdk@ti.com> > -Cc: John Weber <rjohnweber@gmail.com> > -Cc: Roger Monk <r-monk@ti.com> > -Cc: Joel A Fernandes <agnel.joel@gmail.com> > -Cc: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 112 > ++++++++++++++++++++++ > - drivers/video/omap2/displays/panel-generic-dpi.c | 25 +++++ > - 2 files changed, 137 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 0124060..8b30b4c 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -35,6 +35,7 @@ > - #include <linux/i2c/twl.h> > - #include <linux/netdevice.h> > - #include <linux/if_ether.h> > -+#include <linux/i2c/tsc2007.h> > - > - #include <mach/hardware.h> > - #include <asm/mach-types.h> > -@@ -87,11 +88,15 @@ static struct { > - int usb_pwr_level; > - int reset_gpio; > - int usr_button_gpio; > -+ char *lcd_driver_name; > -+ int lcd_pwren; > - } beagle_config = { > - .mmc1_gpio_wp = -EINVAL, > - .usb_pwr_level = GPIOF_OUT_INIT_LOW, > - .reset_gpio = 129, > - .usr_button_gpio = 4, > -+ .lcd_driver_name = "", > -+ .lcd_pwren = 156 > - }; > - > - /* > -@@ -471,9 +476,53 @@ static struct omap_dss_device beagle_tv_device = { > - .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, > - }; > - > -+static int beagle_enable_lcd(struct omap_dss_device *dssdev) > -+{ > -+ if (gpio_is_valid(beagle_config.lcd_pwren)) { > -+ printk(KERN_INFO "%s: Enabling LCD\n", __FUNCTION__); > -+ gpio_set_value(beagle_config.lcd_pwren, 0); > -+ } else { > -+ printk(KERN_INFO "%s: Invalid LCD enable GPIO: %d\n", > -+ __FUNCTION__, beagle_config.lcd_pwren); > -+ } > -+ > -+ return 0; > -+} > -+ > -+static void beagle_disable_lcd(struct omap_dss_device *dssdev) > -+{ > -+ if (gpio_is_valid(beagle_config.lcd_pwren)) { > -+ printk(KERN_INFO "%s: Disabling LCD\n", __FUNCTION__); > -+ gpio_set_value(beagle_config.lcd_pwren, 1); > -+ } else { > -+ printk(KERN_INFO "%s: Invalid LCD enable GPIO: %d\n", > -+ __FUNCTION__, beagle_config.lcd_pwren); > -+ } > -+ > -+ return; > -+} > -+ > -+static struct panel_generic_dpi_data lcd_panel = { > -+ .name = "tfc_s9700rtwv35tr-01b", > -+ .platform_enable = beagle_enable_lcd, > -+ .platform_disable = beagle_disable_lcd, > -+}; > -+ > -+static struct omap_dss_device beagle_lcd_device = { > -+ .type = OMAP_DISPLAY_TYPE_DPI, > -+ .name = "lcd", > -+ .driver_name = "generic_dpi_panel", > -+ .phy.dpi.data_lines = 24, > -+ .platform_enable = beagle_enable_lcd, > -+ .platform_disable = beagle_disable_lcd, > -+ .reset_gpio = -EINVAL, > -+ .data = &lcd_panel, > -+}; > -+ > - static struct omap_dss_device *beagle_dss_devices[] = { > - &beagle_dvi_device, > - &beagle_tv_device, > -+ &beagle_lcd_device, > - }; > - > - static struct omap_dss_board_info beagle_dss_data = { > -@@ -490,6 +539,11 @@ static void __init beagle_display_init(void) > - "DVI reset"); > - if (r < 0) > - printk(KERN_ERR "Unable to get DVI reset GPIO\n"); > -+ > -+ r = gpio_request_one(beagle_config.lcd_pwren, GPIOF_OUT_INIT_LOW, > -+ "LCD power"); > -+ if (r < 0) > -+ printk(KERN_ERR "Unable to get LCD power enable GPIO\n"); > - } > - > - #include "sdram-micron-mt46h32m32lf-6.h" > -@@ -648,6 +702,53 @@ static struct i2c_board_info __initdata > beagle_i2c2_zippy[] = { > - static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; > - #endif > - > -+#if defined(CONFIG_INPUT_TOUCHSCREEN) && \ > -+ defined(CONFIG_TOUCHSCREEN_TSC2007) > -+/* Touchscreen */ > -+#define OMAP3BEAGLE_TSC2007_GPIO 157 > -+static int omap3beagle_tsc2007_get_pendown_state(void) > -+{ > -+ return !gpio_get_value(OMAP3BEAGLE_TSC2007_GPIO); > -+} > -+ > -+static int omap3beagle_tsc2007_init(void) > -+{ > -+ int gpio = OMAP3BEAGLE_TSC2007_GPIO; > -+ int ret = 0; > -+ printk(KERN_WARNING "TSC2007_init started"); > -+ ret = gpio_request(gpio, "tsc2007_pen_down"); > -+ if (ret < 0) { > -+ printk(KERN_ERR "Failed to request GPIO %d for " > -+ "tsc2007 pen down IRQ\n", gpio); > -+ return ret; > -+ } > -+ > -+ omap_mux_init_gpio(OMAP3BEAGLE_TSC2007_GPIO, > OMAP_PIN_INPUT_PULLUP); > -+ gpio_direction_input(gpio); > -+ > -+ irq_set_irq_type(OMAP_GPIO_IRQ(OMAP3BEAGLE_TSC2007_GPIO), > IRQ_TYPE_EDGE_FALLING); > -+ > -+ return ret; > -+} > -+ > -+static struct tsc2007_platform_data tsc2007_info = { > -+ .model = 2007, > -+ .x_plate_ohms = 180, > -+ .get_pendown_state = omap3beagle_tsc2007_get_pendown_state, > -+ .init_platform_hw = omap3beagle_tsc2007_init, > -+}; > -+ > -+static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = { > -+ { > -+ I2C_BOARD_INFO("tsc2007", 0x48), > -+ .irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_TSC2007_GPIO), > -+ .platform_data = &tsc2007_info, > -+ }, > -+}; > -+#else > -+static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = {}; > -+#endif > -+ > - static int __init omap3_beagle_i2c_init(void) > - { > - omap3_pmic_get_config(&beagle_twldata, > -@@ -817,6 +918,10 @@ static void __init omap3_beagle_init(void) > - > - gpio_buttons[0].gpio = beagle_config.usr_button_gpio; > - > -+ /* TODO: set lcd_driver_name by command line or device tree */ > -+ beagle_config.lcd_driver_name = "tfc_s9700rtwv35tr-01b", > -+ lcd_panel.name = beagle_config.lcd_driver_name; > -+ > - platform_add_devices(omap3_beagle_devices, > - ARRAY_SIZE(omap3_beagle_devices)); > - omap_display_init(&beagle_dss_data); > -@@ -892,6 +997,13 @@ static void __init omap3_beagle_init(void) > - platform_device_register(&omap_vwlan_device); > - } > - > -+ if(!strcmp(expansionboard_name, "bbtoys-ulcd")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: registering bbtoys- > ulcd\n"); > -+ omap_register_i2c_bus(2, 400, beagle_i2c2_bbtoys_ulcd, > -+ > ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); > -+ } > -+ > - usb_musb_init(NULL); > - usbhs_init(&usbhs_bdata); > - omap_nand_flash_init(NAND_BUSWIDTH_16, > omap3beagle_nand_partitions, > -diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c > b/drivers/video/omap2/displays/panel-generic-dpi.c > -index 9c90f75..82c1ac3 100644 > ---- a/drivers/video/omap2/displays/panel-generic-dpi.c > -+++ b/drivers/video/omap2/displays/panel-generic-dpi.c > -@@ -232,6 +232,31 @@ static struct panel_config generic_dpi_panels[] = { > - .power_off_delay = 0, > - .name = "powertip_ph480272t", > - }, > -+ > -+ /* ThreeFiveCorp S9700RTWV35TR-01B */ > -+ { > -+ { > -+ .x_res = 800, > -+ .y_res = 480, > -+ > -+ .pixel_clock = 30000, > -+ > -+ .hsw = 49, > -+ .hfp = 41, > -+ .hbp = 40, > -+ > -+ .vsw = 4, > -+ .vfp = 14, > -+ .vbp = 29, > -+ }, > -+ .acbi = 0x0, > -+ .acb = 0x0, > -+ .config = OMAP_DSS_LCD_TFT | > OMAP_DSS_LCD_IVS | > -+ OMAP_DSS_LCD_IHS, // | > OMAP_DSS_LCD_IEO; - TODO check this - doesn't work with this enabled > -+ .power_on_delay = 50, > -+ .power_off_delay = 100, > -+ .name = "tfc_s9700rtwv35tr-01b", > -+ }, > - }; > - > - struct panel_drv_data { > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2-beagleboard- > add-support-for-loopthrough-ex.patch b/recipes-kernel/linux/linux- > 3.0/ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough- > ex.patch > deleted file mode 100644 > index 46cb432..0000000 > --- a/recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2-beagleboard-add- > support-for-loopthrough-ex.patch > +++ /dev/null > @@ -1,61 +0,0 @@ > -From eea23f28cacdb525471ecf4dc8a2366ccef5a28b Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Tue, 11 Oct 2011 13:13:35 +0200 > -Subject: [PATCH 3/4] ARM: OMAP2: beagleboard: add support for loopthrough > expansionboard, make uLCD use it > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 15 +++++++++++++-- > - 1 files changed, 13 insertions(+), 2 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 8b30b4c..47bc79b 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -253,6 +253,7 @@ static void __init omap3_beagle_init_rev(void) > - } > - > - char expansionboard_name[16]; > -+char expansionboard2_name[16]; > - > - #if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) > - #include <linux/regulator/fixed.h> > -@@ -862,6 +863,15 @@ static int __init expansionboard_setup(char *str) > - return 0; > - } > - > -+static int __init expansionboard2_setup(char *str) > -+{ > -+ if (!str) > -+ return -EINVAL; > -+ strncpy(expansionboard2_name, str, 16); > -+ printk(KERN_INFO "Beagle second expansionboard: %s\n", > expansionboard2_name); > -+ return 0; > -+} > -+ > - static void __init beagle_opp_init(void) > - { > - int r = 0; > -@@ -997,9 +1007,9 @@ static void __init omap3_beagle_init(void) > - platform_device_register(&omap_vwlan_device); > - } > - > -- if(!strcmp(expansionboard_name, "bbtoys-ulcd")) > -+ if(!strcmp(expansionboard2_name, "bbtoys-ulcd")) > - { > -- printk(KERN_INFO "Beagle expansionboard: registering bbtoys- > ulcd\n"); > -+ printk(KERN_INFO "Beagle second expansionboard: registering > bbtoys-ulcd\n"); > - omap_register_i2c_bus(2, 400, beagle_i2c2_bbtoys_ulcd, > - > ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); > - } > -@@ -1021,6 +1031,7 @@ static void __init omap3_beagle_init(void) > - } > - > - early_param("buddy", expansionboard_setup); > -+early_param("buddy2", expansionboard2_setup); > - > - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") > - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial-support- > for-WS2801-controller.patch b/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS- > add-initial-support-for-WS2801-controller.patch > deleted file mode 100644 > index b81d125..0000000 > --- a/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial-support-for- > WS2801-controller.patch > +++ /dev/null > @@ -1,242 +0,0 @@ > -From e707458df28487c2fb0bf620cb3eff22466e2c6c Mon Sep 17 00:00:00 > 2001 > -From: Koen Kooi <koen@dominion.thruhere.net> > -Date: Thu, 20 Oct 2011 16:13:16 +0200 > -Subject: [PATCH 4/4] LEDS: add initial support for WS2801 controller > - > -This adds initial support for the WS2801 RGB LED controller. > - > -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> > ---- > - arch/arm/mach-omap2/board-omap3beagle.c | 11 ++ > - drivers/leds/Kconfig | 6 + > - drivers/leds/Makefile | 1 + > - drivers/leds/leds-ws2801.c | 159 > +++++++++++++++++++++++++++++++ > - 4 files changed, 177 insertions(+), 0 deletions(-) > - create mode 100644 drivers/leds/leds-ws2801.c > - > -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach- > omap2/board-omap3beagle.c > -index 47bc79b..016d0985 100644 > ---- a/arch/arm/mach-omap2/board-omap3beagle.c > -+++ b/arch/arm/mach-omap2/board-omap3beagle.c > -@@ -796,6 +796,11 @@ static struct platform_device leds_gpio = { > - }, > - }; > - > -+static struct platform_device ws2801_leds = { > -+ .name = "ws2801-leds", > -+ .id = -1, > -+}; > -+ > - static struct gpio_keys_button gpio_buttons[] = { > - { > - .code = BTN_EXTRA, > -@@ -1014,6 +1019,12 @@ static void __init omap3_beagle_init(void) > - > ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); > - } > - > -+ if(!strcmp(expansionboard_name, "beacon")) > -+ { > -+ printk(KERN_INFO "Beagle expansionboard: registering > TinCanTools Beacon LED driver\n"); > -+ platform_device_register(&ws2801_leds); > -+ } > -+ > - usb_musb_init(NULL); > - usbhs_init(&usbhs_bdata); > - omap_nand_flash_init(NAND_BUSWIDTH_16, > omap3beagle_nand_partitions, > -diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig > -index 713d43b..fd2c4b3 100644 > ---- a/drivers/leds/Kconfig > -+++ b/drivers/leds/Kconfig > -@@ -323,6 +323,12 @@ config LEDS_BD2802 > - This option enables support for BD2802GU RGB LED driver chips > - accessed via the I2C bus. > - > -+config LEDS_WS2801 > -+ tristate "LED driver for WS2801 RGB LED" > -+ depends on LEDS_CLASS > -+ help > -+ This option enables support for WS2801 RGB LED driver chips. > -+ > - config LEDS_INTEL_SS4200 > - tristate "LED driver for Intel NAS SS4200 series" > - depends on LEDS_CLASS > -diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile > -index bbfd2e3..14f849e 100644 > ---- a/drivers/leds/Makefile > -+++ b/drivers/leds/Makefile > -@@ -43,6 +43,7 @@ obj-$(CONFIG_LEDS_MC13783) += leds- > mc13783.o > - obj-$(CONFIG_LEDS_NS2) += leds-ns2.o > - obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o > - obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o > -+obj-$(CONFIG_LEDS_WS2801) += leds-ws2801.o > - > - # LED SPI Drivers > - obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o > -diff --git a/drivers/leds/leds-ws2801.c b/drivers/leds/leds-ws2801.c > -new file mode 100644 > -index 0000000..9526a84 > ---- /dev/null > -+++ b/drivers/leds/leds-ws2801.c > -@@ -0,0 +1,159 @@ > -+/* > -+ * LEDs driver for WS2801 RGB Controller > -+ * > -+ * Copyright (C) 2006 Kristian Kielhofner <kris@krisk.org> > -+ * > -+ * Based on leds-net48xx.c > -+ * > -+ * This program is free software; you can redistribute it and/or modify > -+ * it under the terms of the GNU General Public License version 2 as > -+ * published by the Free Software Foundation. > -+ */ > -+ > -+#include <linux/kernel.h> > -+#include <linux/init.h> > -+#include <linux/platform_device.h> > -+#include <linux/leds.h> > -+#include <linux/err.h> > -+#include <linux/gpio.h> > -+#include <linux/io.h> > -+ > -+#define DRVNAME "ws2801-leds" > -+#define WS2801_LED_CLOCK_GPIO 159 > -+#define WS2801_LED_DATA_GPIO 158 > -+ > -+static unsigned long rgb_color; > -+ > -+static struct platform_device *pdev; > -+ > -+static void ws2801_set_rgb(void) > -+{ > -+ int count; > -+ int color_bit; > -+ > -+ for (count = 23; count >= 0 ; count--) { > -+ color_bit = (rgb_color>>count) & (1<<0); > -+ gpio_set_value(WS2801_LED_DATA_GPIO, color_bit); > -+ gpio_set_value(WS2801_LED_CLOCK_GPIO, 1); > -+ gpio_set_value(WS2801_LED_CLOCK_GPIO, 0); > -+ } > -+ > -+} > -+ > -+static void ws2801_red_led_set(struct led_classdev *led_cdev, > -+ enum led_brightness value) > -+{ > -+ rgb_color &= ((0x00<<16)|(0xff<<8)|(0xff<<0)); > -+ rgb_color |= (value<<16); > -+ ws2801_set_rgb(); > -+} > -+ > -+static void ws2801_green_led_set(struct led_classdev *led_cdev, > -+ enum led_brightness value) > -+{ > -+ rgb_color &= ((0xff<<16)|(0x00<<8)|(0xff<<0)); > -+ rgb_color |= (value<<8); > -+ ws2801_set_rgb(); > -+} > -+ > -+static void ws2801_blue_led_set(struct led_classdev *led_cdev, > -+ enum led_brightness value) > -+{ > -+ rgb_color &= ((0xff<<16)|(0xff<<8)|(0x00<<0)); > -+ rgb_color |= (value<<0); > -+ ws2801_set_rgb(); > -+} > -+ > -+static struct led_classdev ws2801_red_led = { > -+ .name = "ws2801-red", > -+ .brightness_set = ws2801_red_led_set, > -+ .flags = LED_CORE_SUSPENDRESUME, > -+}; > -+ > -+static struct led_classdev ws2801_green_led = { > -+ .name = "ws2801-green", > -+ .brightness_set = ws2801_green_led_set, > -+ .flags = LED_CORE_SUSPENDRESUME, > -+}; > -+ > -+static struct led_classdev ws2801_blue_led = { > -+ .name = "ws2801-blue", > -+ .brightness_set = ws2801_blue_led_set, > -+ .flags = LED_CORE_SUSPENDRESUME, > -+}; > -+ > -+static int ws2801_led_probe(struct platform_device *pdev) > -+{ > -+ int ret; > -+ > -+ ret = led_classdev_register(&pdev->dev, &ws2801_red_led); > -+ if (ret < 0) > -+ return ret; > -+ > -+ ret = led_classdev_register(&pdev->dev, &ws2801_green_led); > -+ if (ret < 0) > -+ goto err1; > -+ > -+ ret = led_classdev_register(&pdev->dev, &ws2801_blue_led); > -+ if (ret < 0) > -+ goto err2; > -+ > -+ gpio_request_one(WS2801_LED_DATA_GPIO, > -+ GPIOF_OUT_INIT_LOW, "ws2801_data"); > -+ > -+ gpio_request_one(WS2801_LED_CLOCK_GPIO, > -+ GPIOF_OUT_INIT_LOW, "ws2801_clock"); > -+ > -+ ws2801_set_rgb(); > -+ return ret; > -+ > -+err2: > -+ led_classdev_unregister(&ws2801_green_led); > -+err1: > -+ led_classdev_unregister(&ws2801_red_led); > -+ > -+ return ret; > -+} > -+ > -+static int ws2801_led_remove(struct platform_device *pdev) > -+{ > -+ led_classdev_unregister(&ws2801_red_led); > -+ led_classdev_unregister(&ws2801_green_led); > -+ led_classdev_unregister(&ws2801_blue_led); > -+ return 0; > -+} > -+ > -+static struct platform_driver ws2801_led_driver = { > -+ .probe = ws2801_led_probe, > -+ .remove = ws2801_led_remove, > -+ .driver = { > -+ .name = DRVNAME, > -+ .owner = THIS_MODULE, > -+ }, > -+}; > -+ > -+static int __init ws2801_led_init(void) > -+{ > -+ int ret; > -+ > -+ ret = platform_driver_register(&ws2801_led_driver); > -+ if (ret < 0) > -+ goto out; > -+ > -+out: > -+ return ret; > -+} > -+ > -+static void __exit ws2801_led_exit(void) > -+{ > -+ platform_device_unregister(pdev); > -+ platform_driver_unregister(&ws2801_led_driver); > -+} > -+ > -+module_init(ws2801_led_init); > -+module_exit(ws2801_led_exit); > -+ > -+MODULE_AUTHOR("David Anders <danders@tincantools.com>"); > -+MODULE_DESCRIPTION("WS2801 RGB LED driver"); > -+MODULE_LICENSE("GPL"); > -+ > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum- > 2.1.patch b/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum- > 2.1.patch > deleted file mode 100644 > index 8d65b5f..0000000 > --- a/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum-2.1.patch > +++ /dev/null > @@ -1,210 +0,0 @@ > -From cf5db5477d8d43f02f4511f3835ab4bec0dcc27c Mon Sep 17 00:00:00 > 2001 > -From: Richard Watts <rrw@kynesim.co.uk> > -Date: Mon, 20 Feb 2012 17:58:26 +0000 > -Subject: [PATCH] Fix sprz319 erratum 2.1 > - > -There is an erratum in DM3730 which results in the > -EHCI USB PLL (DPLL5) not updating sufficiently frequently; this > -leads to USB PHY clock drift and once the clock has drifted far > -enough, the PHY's ULPI interface stops responding and USB > -drops out. This is manifested on a Beagle xM by having the attached > -SMSC9514 report 'Cannot enable port 2. Maybe the USB cable is bad?' > -or similar. > - > -The fix is to carefully adjust your DPLL5 settings so as to > -keep the PHY clock as close as possible to 120MHz over the long > -term; TI SPRZ319e gives a table of such settings and this patch > -applies that table to systems with a 13MHz or a 26MHz clock, > -thus fixing the issue (inasfar as it can be fixed) on Beagle xM > -and Overo Firestorm. > - > -Signed-off-by: Richard Watts <rrw@kynesim.co.uk> > ---- > - arch/arm/mach-omap2/clkt_clksel.c | 15 ++++++++ > - arch/arm/mach-omap2/clock.h | 7 ++++ > - arch/arm/mach-omap2/clock3xxx.c | 65 > +++++++++++++++++++++++++++++---- > - arch/arm/mach-omap2/clock3xxx.h | 1 + > - arch/arm/mach-omap2/clock3xxx_data.c | 2 +- > - arch/arm/mach-omap2/dpll3xxx.c | 2 +- > - 6 files changed, 82 insertions(+), 10 deletions(-) > - > -diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach- > omap2/clkt_clksel.c > -index e25364d..e378fe7 100644 > ---- a/arch/arm/mach-omap2/clkt_clksel.c > -+++ b/arch/arm/mach-omap2/clkt_clksel.c > -@@ -460,6 +460,21 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned > long rate) > - return 0; > - } > - > -+int omap2_clksel_force_divisor(struct clk *clk, int new_div) > -+{ > -+ u32 field_val; > -+ > -+ field_val = _divisor_to_clksel(clk, new_div); > -+ if (field_val == ~0) > -+ return -EINVAL; > -+ > -+ _write_clksel_reg(clk, field_val); > -+ > -+ clk->rate = clk->parent->rate / new_div; > -+ > -+ return 0; > -+} > -+ > - /* > - * Clksel parent setting function - not passed in struct clk function > - * pointer - instead, the OMAP clock code currently assumes that any > -diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h > -index 8bad1c6..ac3d367 100644 > ---- a/arch/arm/mach-omap2/clock.h > -+++ b/arch/arm/mach-omap2/clock.h > -@@ -61,6 +61,12 @@ void omap3_dpll_allow_idle(struct clk *clk); > - void omap3_dpll_deny_idle(struct clk *clk); > - u32 omap3_dpll_autoidle_read(struct clk *clk); > - int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate); > -+#if CONFIG_ARCH_OMAP3 > -+int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel); > -+/* If you are using this function and not on OMAP3, you are > -+ * Doing It Wrong(tm), so there is no stub. > -+ */ > -+#endif > - int omap3_noncore_dpll_enable(struct clk *clk); > - void omap3_noncore_dpll_disable(struct clk *clk); > - int omap4_dpllmx_gatectrl_read(struct clk *clk); > -@@ -84,6 +90,7 @@ unsigned long omap2_clksel_recalc(struct clk *clk); > - long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate); > - int omap2_clksel_set_rate(struct clk *clk, unsigned long rate); > - int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent); > -+int omap2_clksel_force_divisor(struct clk *clk, int new_div); > - > - /* clkt_iclk.c public functions */ > - extern void omap2_clkt_iclk_allow_idle(struct clk *clk); > -diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach- > omap2/clock3xxx.c > -index 952c3e0..d5be086 100644 > ---- a/arch/arm/mach-omap2/clock3xxx.c > -+++ b/arch/arm/mach-omap2/clock3xxx.c > -@@ -40,6 +40,60 @@ > - /* needed by omap3_core_dpll_m2_set_rate() */ > - struct clk *sdrc_ick_p, *arm_fck_p; > - > -+struct dpll_settings { > -+ int rate, m, n, f; > -+}; > -+ > -+ > -+static int omap3_dpll5_apply_erratum21(struct clk *clk, struct clk *dpll5_m2) > -+{ > -+ struct clk *sys_clk; > -+ int i, rv; > -+ static const struct dpll_settings precomputed[] = { > -+ /* From DM3730 errata (sprz319e), table 36 > -+ * +1 is because the values in the table are register values; > -+ * dpll_program() will subtract one from what we give it, > -+ * so ... > -+ */ > -+ { 13000000, 443+1, 5+1, 8 }, > -+ { 26000000, 443+1, 11+1, 8 } > -+ }; > -+ > -+ sys_clk = clk_get(NULL, "sys_ck"); > -+ > -+ for (i = 0 ; i < (sizeof(precomputed)/sizeof(struct dpll_settings)) ; > -+ ++i) { > -+ const struct dpll_settings *d = &precomputed[i]; > -+ if (sys_clk->rate == d->rate) { > -+ rv = omap3_noncore_dpll_program(clk, d->m , d->n, > 0); > -+ if (rv) > -+ return 1; > -+ rv = omap2_clksel_force_divisor(dpll5_m2 , d->f); > -+ return 1; > -+ } > -+ } > -+ return 0; > -+} > -+ > -+int omap3_dpll5_set_rate(struct clk *clk, unsigned long rate) > -+{ > -+ struct clk *dpll5_m2; > -+ int rv; > -+ dpll5_m2 = clk_get(NULL, "dpll5_m2_ck"); > -+ > -+ if (cpu_is_omap3630() && rate == DPLL5_FREQ_FOR_USBHOST && > -+ omap3_dpll5_apply_erratum21(clk, dpll5_m2)) { > -+ return 1; > -+ } > -+ rv = omap3_noncore_dpll_set_rate(clk, rate); > -+ if (rv) > -+ goto out; > -+ rv = clk_set_rate(dpll5_m2, rate); > -+ > -+out: > -+ return rv; > -+} > -+ > - int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) > - { > - /* > -@@ -59,19 +113,14 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned > long rate) > - void __init omap3_clk_lock_dpll5(void) > - { > - struct clk *dpll5_clk; > -- struct clk *dpll5_m2_clk; > - > - dpll5_clk = clk_get(NULL, "dpll5_ck"); > - clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST); > -- clk_enable(dpll5_clk); > - > -- /* Program dpll5_m2_clk divider for no division */ > -- dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck"); > -- clk_enable(dpll5_m2_clk); > -- clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST); > -+ /* dpll5_m2_ck is now (grottily!) handled by dpll5_clk's set routine, > -+ * to cope with an erratum on DM3730 > -+ */ > - > -- clk_disable(dpll5_m2_clk); > -- clk_disable(dpll5_clk); > - return; > - } > - > -diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach- > omap2/clock3xxx.h > -index 8bbeeaf..0ede513 100644 > ---- a/arch/arm/mach-omap2/clock3xxx.h > -+++ b/arch/arm/mach-omap2/clock3xxx.h > -@@ -10,6 +10,7 @@ > - > - int omap3xxx_clk_init(void); > - int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate); > -+int omap3_dpll5_set_rate(struct clk *clk, unsigned long rate); > - int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate); > - void omap3_clk_lock_dpll5(void); > - > -diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach- > omap2/clock3xxx_data.c > -index ffd55b1..dcd7bdc 100644 > ---- a/arch/arm/mach-omap2/clock3xxx_data.c > -+++ b/arch/arm/mach-omap2/clock3xxx_data.c > -@@ -942,7 +942,7 @@ static struct clk dpll5_ck = { > - .parent = &sys_ck, > - .dpll_data = &dpll5_dd, > - .round_rate = &omap2_dpll_round_rate, > -- .set_rate = &omap3_noncore_dpll_set_rate, > -+ .set_rate = &omap3_dpll5_set_rate, > - .clkdm_name = "dpll5_clkdm", > - .recalc = &omap3_dpll_recalc, > - }; > -diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach- > omap2/dpll3xxx.c > -index f77022b..1909cd0 100644 > ---- a/arch/arm/mach-omap2/dpll3xxx.c > -+++ b/arch/arm/mach-omap2/dpll3xxx.c > -@@ -291,7 +291,7 @@ static void _lookup_sddiv(struct clk *clk, u8 *sd_div, > u16 m, u8 n) > - * Program the DPLL with the supplied M, N values, and wait for the DPLL to > - * lock.. Returns -EINVAL upon error, or 0 upon success. > - */ > --static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 > freqsel) > -+int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) > - { > - struct dpll_data *dd = clk->dpll_data; > - u8 dco, sd_div; > --- > -1.7.2.5 > - > diff --git a/recipes-kernel/linux/linux_3.0.bb b/recipes-kernel/linux/linux_3.0.bb > deleted file mode 100644 > index 3aae2ca..0000000 > --- a/recipes-kernel/linux/linux_3.0.bb > +++ /dev/null > @@ -1,234 +0,0 @@ > -require linux.inc > - > -DESCRIPTION = "Linux kernel for TI processors" > - > -COMPATIBLE_MACHINE = "(beagleboard)" > - > -PV = "3.0.28" > -# v3.0.28 tag > -SRCREV_pn-${PN} = "0527fde0639955203ad48a9fd83bd6fc35e82e07" > - > -# The main PR is now using MACHINE_KERNEL_PR, for omap3 see > conf/machine/include/omap3.inc > -MACHINE_KERNEL_PR_append = "a" > - > -FILESPATH =. "${FILE_DIRNAME}/linux-3.0:${FILE_DIRNAME}/linux- > 3.0/${MACHINE}:" > - > -SRC_URI += "git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux- > stable.git;branch=linux-3.0.y;protocol=git \ > - file://pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in- > mach-omap2.patch \ > - file://pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments- > common-in-hs.patch \ > - file://pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to- > avoid-cpu_is.patch \ > - file://pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to- > avoid-cpu_.patch \ > - file://pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to- > dmtimer.h.patch \ > - file://pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions- > into-inline-.patch \ > - file://pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for- > clockevent.patch \ > - file://pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for- > now.patch \ > - file://pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of- > class.patch \ > - file://pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by- > default.patch \ > - file://pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on- > need.patch \ > - file://pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch \ > - file://pm-wip/voltdm/0013-omap2-Reserve-clocksource-and- > timesource-and-initial.patch \ > - file://pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for- > clocksource.patch \ > - file://pm-wip/voltdm/0015-omap2-Remove- > omap2_gp_clockevent_set_gptimer.patch \ > - file://pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to- > combine-time.patch \ > - file://pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch \ > - file://pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation- > error.patch \ > - file://pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch > \ > - file://pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer- > support.patch \ > - file://pm-wip/voltdm/0021-omap2-fix-build-regression.patch \ > - file://pm-wip/voltdm/0022-OMAP-New-twl-common-for-common- > TWL-configuration.patch \ > - file://pm-wip/voltdm/0023-OMAP4-Move-common-twl6030- > configuration-to-twl-commo.patch \ > - file://pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration- > to-twl-common.patch \ > - file://pm-wip/voltdm/0025-OMAP3-Move-common-regulator- > configuration-to-twl-com.patch \ > - file://pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length- > variables.patch \ > - file://pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number- > enums.patch \ > - file://pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch \ > - file://pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup- > support.patch \ > - file://pm-wip/voltdm/0030-OMAP4-hwmod-data-Add- > MSTANDBY_SMART_WKUP-flag.patch \ > - file://pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in- > shutdown-to-access-sysc.patch \ > - file://pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the- > enawakeup-bit-if-SYSC_H.patch \ > - file://pm-wip/voltdm/0033-OMAP2-hwmod-Remove- > _populate_mpu_rt_base-warning.patch \ > - file://pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset- > management.patch \ > - file://pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable- > failed.patch \ > - file://pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to- > improve-the-readability.patch \ > - file://pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record- > to-terminate-.patch \ > - file://pm-wip/voltdm/0038-omap_hwmod-share-identical- > omap_hwmod_addr_space-arr.patch \ > - file://pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record- > with-omap_hwmod_m.patch \ > - file://pm-wip/voltdm/0040-omap_hwmod-share-identical- > omap_hwmod_mpu_irqs-array.patch \ > - file://pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record- > with-omap_hwmod_d.patch \ > - file://pm-wip/voltdm/0042-omap_hwmod-share-identical- > omap_hwmod_dma_info-array.patch \ > - file://pm-wip/voltdm/0043-omap_hwmod-share-identical- > omap_hwmod_class-omap_hwm.patch \ > - file://pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect- > data-order-and-.patch \ > - file://pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed- > parens.patch \ > - file://pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad- > alignement.patch \ > - file://pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect- > format-with-regu.patch \ > - file://pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB- > DPLL.patch \ > - file://pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs- > clkdev-with-NULL.patch \ > - file://pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock- > nodes-and-struc.patch \ > - file://pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div- > for-USB-DPLL.patch \ > - file://pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines- > name.patch \ > - file://pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain- > offsets.patch \ > - file://pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix- > indentation.patch \ > - file://pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to- > avoid-access-from-.patch \ > - file://pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few- > macros.patch \ > - file://pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order- > and-wrong-name.patch \ > - file://pm-wip/voltdm/0058-OMAP-omap_device-replace- > _find_by_pdev-with-to_omap_.patch \ > - file://pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE- > config-option.patch \ > - file://pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2- > McASP3-and-MMC6-clock.patch \ > - file://pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock- > nodes.patch \ > - file://pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt- > clocks.patch \ > - file://pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non- > valid-valu.patch \ > - file://pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem- > states-and-missi.patch \ > - file://pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks- > always-enabled-and.patch \ > - file://pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove- > unsupported-MPU-powerd.patch \ > - file://pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS- > main_clk-scheme.patch \ > - file://pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow- > 16-bit-acces.patch \ > - file://pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr- > flags-from-u8-t.patch \ > - file://pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning- > constants.patch \ > - file://pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C- > functionality-flags-.patch \ > - file://pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod- > defintions-with-I2C-IP.patch \ > - file://pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags- > to-all-oma.patch \ > - file://pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout- > during-bootup.patch \ > - file://pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry- > for-hwmod-main_.patch \ > - file://pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider- > selection-for-a.patch \ > - file://pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain- > attribute.patch \ > - file://pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot- > time.patch \ > - file://pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute- > address-with-of.patch \ > - file://pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be- > disabled.patch \ > - file://pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute- > address-with-of.patch \ > - file://pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with- > the-offset-bas.patch \ > - file://pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated- > functions.patch \ > - file://pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context- > register-offset.patch \ > - file://pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode- > entry-in-omap_hwmod-.patch \ > - file://pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for- > modulemode-control.patch \ > - file://pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module- > control-in-hwmod-co.patch \ > - file://pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant- > call-to-pwrdm_wait.patch \ > - file://pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to- > control-clockdomain-.patch \ > - file://pm-wip/voltdm/0090-OMAP2-clockdomain-add- > clkdm_in_hwsup.patch \ > - file://pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in- > idle.patch \ > - file://pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock- > to-prevent-conc.patch \ > - file://pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code- > to-prevent.patch \ > - file://pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended- > PRCM-module-enabl.patch \ > - file://pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the- > summary-of-all-clo.patch \ > - file://pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused- > voltagedomain-pointer.patch \ > - file://pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets- > into-VC-VP-struct.patch \ > - file://pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from- > VP-into-voltag.patch \ > - file://pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new- > voltagedomain-laye.patch \ > - file://pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu- > voltagedomain-to-mpu_iva.patch \ > - file://pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup- > domain.patch \ > - file://pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to- > voltagedomain.patch \ > - file://pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain- > to-struct-powerd.patch \ > - file://pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect- > to-powerdomain.patch \ > - file://pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage- > domains.patch \ > - file://pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage- > domains.patch \ > - file://pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain- > lookup-during-r.patch \ > - file://pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of- > powerdomains-in-each-vol.patch \ > - file://pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC- > code-into-.patch \ > - file://pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct- > voltagedomain-misc.patch \ > - file://pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale- > method-when-VC-.patch \ > - file://pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor- > VP-code-in.patch \ > - file://pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate- > voltage-and-com.patch \ > - file://pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for- > checking-clearing-VP-.patch \ > - file://pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check- > clear-with-V.patch \ > - file://pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions- > for-VC-VP.patch \ > - file://pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register- > access-functio.patch \ > - file://pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address- > configuration.patch \ > - file://pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address- > configuration.patch \ > - file://pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC- > struct-instead-of.patch \ > - file://pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time- > configuration.patch \ > - file://pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off- > command-configuration-.patch \ > - file://pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel- > configuration.patch \ > - file://pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct- > from-vdd_info-.patch \ > - file://pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config- > programmable-with-PMIC-spec.patch \ > - file://pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel- > config-for-OMAP4-M.patch \ > - file://pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage- > setting-to-get-cur.patch \ > - file://pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into- > voltdm-misc.-.patch \ > - file://pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs- > interface.patch \ > - file://pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common- > replace-shift-with-__.patch \ > - file://pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock- > rate-retreival-.patch \ > - file://pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config- > into-VP-init.patch \ > - file://pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for- > updating-erro.patch \ > - file://pm-wip/voltdm/0134-OMAP3-VP-remove- > omap_vp_runtime_data.patch \ > - file://pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function- > pointer-into-st.patch \ > - file://pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE- > field.patch \ > - file://pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error- > if-VP.patch \ > - file://pm-wip/voltdm/0138-OMAP3-VP-remove-unused- > omap_vp_get_curr_volt.patch \ > - file://pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage- > into-common-fu.patch \ > - file://pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset- > functions-using.patch \ > - file://pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt- > from-vdd_info-in.patch \ > - file://pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of- > omap_vdd_info.patch \ > - file://pm-wip/voltdm/0143-OMAP3-voltage-rename- > omap_voltage_get_nom_volt-voltd.patch \ > - file://pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in- > voltdm_scale.patch \ > - file://pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage- > conversion-formula.patch \ > - file://pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for- > 0x39.patch \ > - file://pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V- > conversions.patch \ > - file://pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF- > voltages.patch \ > - file://pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd- > register.patch \ > - file://pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free- > cpufreq-table.patch \ > - file://pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes- > after-cpufreq.patch \ > - file://pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully- > initialized.patch \ > - file://pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for- > OMAP3.patch \ > - file://pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional- > compilation.patch \ > - file://pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer- > merged.patch \ > - file://pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and- > OMAP2PLUS-CPUfreq-drive.patch \ > - file://pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to- > cater-OMAP4430.patch \ > - file://pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when- > attempting-to-set-mp.patch \ > - file://pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision- > to-init.patch \ > - file://pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no- > mpudev.patch \ > - file://pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support- > freq_table.patch \ > - file://pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP- > library.patch \ > - file://pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init- > failed.patch \ > - file://pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch \ > - file://pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous- > check-in-target-for.patch \ > - file://pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad- > boot-frequency.patch \ > - file://pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared- > policy-mask.patch \ > - file://pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with- > reference-value-to-avo.patch \ > - \ > - file://beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM- > revision.patch \ > - file://beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for- > expansionboa.patch \ > - file://beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch \ > - file://beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch \ > - file://beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch \ > - file://beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look- > more-lik.patch \ > - file://beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid- > SD-Ca.patch \ > - file://beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address- > helper.patch \ > - file://beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or- > missing-MAC-.patch \ > - file://beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect- > pin-when.patch \ > - file://beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL- > divider.patch \ > - file://madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch \ > - file://madc/0002-mfd-twl-core-enable-madc-clock.patch \ > - \ > - file://sakoman/0001-mmc-don-t-display-single-block-read-console- > messages.patch \ > - file://sakoman/0002-omap-Change-omap_device-activate-dectivate- > latency-m.patch \ > - file://sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or- > compos.patch \ > - file://sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error- > messag.patch \ > - file://sakoman/0005-video-add-timings-for-hd720.patch \ > - file://sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is- > not-.patch \ > - file://sakoman/0007-drivers-input-touchscreen-ads7846-return- > ENODEV-if-d.patch \ > - file://sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch \ > - file://sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in- > interr.patch \ > - file://sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch \ > - file://sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for- > twl40.patch \ > - file://sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by- > default.patch \ > - file://sakoman/0013-omap-mmc-twl4030-move-clock-input-selection- > prior-to.patch \ > - file://sakoman/0014-rtc-twl-add-support-for-backup-battery- > recharge.patch \ > - \ > - file://sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch \ > - \ > - file://ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode- > remo.patch \ > - file://ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite- > support.patch \ > - file://ulcd/0003-ARM-OMAP2-beagleboard-add-support-for- > loopthrough-ex.patch \ > - file://ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch \ > - \ > - file://omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for- > OMAP2-3-4.patch \ > - \ > - file://misc/0001-compiler.h-Undef-before-redefining- > __attribute_const.patch \ > - \ > - file://usb/0001-Fix-sprz319-erratum-2.1.patch \ > - \ > - file://defconfig" > - > -SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ > -" > - > -S = "${WORKDIR}/git" > - > diff --git a/recipes-kernel/linux/linux_3.1.bb b/recipes-kernel/linux/linux_3.1.bb > deleted file mode 100644 > index 110d26c..0000000 > --- a/recipes-kernel/linux/linux_3.1.bb > +++ /dev/null > @@ -1,33 +0,0 @@ > -require linux.inc > - > -COMPATIBLE_MACHINE = "beagleboard" > - > -DESCRIPTION = "Linux kernel for TI processors" > - > -DEFAULT_PREFERENCE = "-99" > - > -PV = "3.0+3.1rc" > -SRCREV_pn-${PN} = "9e79e3e9dd9672b37ac9412e9a926714306551fe" > - > -# The main PR is now using MACHINE_KERNEL_PR, for omap3 see > conf/machine/include/omap3.inc > -MACHINE_KERNEL_PR_append = "e" > - > -SRC_URI += > "git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git;protocol=git \ > - file://beagle/0001-UNFINISHED-OMAP3-beagle-add-support-for- > expansionboa.patch \ > - file://beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch \ > - file://madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch \ > - file://madc/0002-mfd-twl-core-enable-madc-clock.patch \ > - file://sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch \ > - file://fixes/vout.patch \ > - file://defconfig" > - > -# Needs refresh: > -# file://beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch \ > -# > - > - > -SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ > -" > - > -S = "${WORKDIR}/git" > - > -- > 1.8.3.2 > > _______________________________________________ > meta-ti mailing list > meta-ti@yoctoproject.org > https://lists.yoctoproject.org/listinfo/meta-ti ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 3/8] linux-omap4-3.1.0: remove old pandaboard-specific kernel 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko 2013-09-28 22:53 ` [PATCH 1/8] linux-omap-2.6.39: remove old beagleboard-specific and not supported kernel Denys Dmytriyenko 2013-09-28 22:53 ` [PATCH 2/8] linux-3.0: remove old beagleboard-specific 3.0 and 3.1rc kernel recipes Denys Dmytriyenko @ 2013-09-28 22:54 ` Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 4/8] linux-davinci 2.6.32: remove old hawkboard-specific kernel Denys Dmytriyenko ` (4 subsequent siblings) 7 siblings, 0 replies; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-28 22:54 UTC (permalink / raw) To: meta-ti From: Denys Dmytriyenko <denys@ti.com> Pandaboard is supported by newer 3.4+ kernel recipes. Signed-off-by: Denys Dmytriyenko <denys@ti.com> --- ...inst-fix-install-breakage-for-FW-images-r.patch | 30 - .../linux-omap4-3.1.0/add_exec_tracepoint.patch | 109 - .../linux/linux-omap4-3.1.0/pandaboard/defconfig | 4402 -------------------- recipes-kernel/linux/linux-omap4_3.1.0.bb | 19 - 4 files changed, 4560 deletions(-) delete mode 100644 recipes-kernel/linux/linux-omap4-3.1.0/0001-Makefile.fwinst-fix-install-breakage-for-FW-images-r.patch delete mode 100644 recipes-kernel/linux/linux-omap4-3.1.0/add_exec_tracepoint.patch delete mode 100644 recipes-kernel/linux/linux-omap4-3.1.0/pandaboard/defconfig delete mode 100644 recipes-kernel/linux/linux-omap4_3.1.0.bb diff --git a/recipes-kernel/linux/linux-omap4-3.1.0/0001-Makefile.fwinst-fix-install-breakage-for-FW-images-r.patch b/recipes-kernel/linux/linux-omap4-3.1.0/0001-Makefile.fwinst-fix-install-breakage-for-FW-images-r.patch deleted file mode 100644 index 7455915..0000000 --- a/recipes-kernel/linux/linux-omap4-3.1.0/0001-Makefile.fwinst-fix-install-breakage-for-FW-images-r.patch +++ /dev/null @@ -1,30 +0,0 @@ -From f6a15304bc2730ba091eb747c413d4ef4124565e Mon Sep 17 00:00:00 2001 -From: Denys Dmytriyenko <denys@ti.com> -Date: Mon, 5 Mar 2012 16:34:53 -0500 -Subject: [PATCH] Makefile.fwinst: fix install breakage for FW images residing - in firmware/ dir - -This fixes below error found on some distros (Gentoo and Fedora): -*** No rule to make target `lib/firmware/./', needed by `lib/firmware/ti_3410.fw'. Stop. - -Signed-off-by: Denys Dmytriyenko <denys@ti.com> ---- - scripts/Makefile.fwinst | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/scripts/Makefile.fwinst b/scripts/Makefile.fwinst -index 6bf8e87..4d908d1 100644 ---- a/scripts/Makefile.fwinst -+++ b/scripts/Makefile.fwinst -@@ -27,7 +27,7 @@ endif - installed-mod-fw := $(addprefix $(INSTALL_FW_PATH)/,$(mod-fw)) - - installed-fw := $(addprefix $(INSTALL_FW_PATH)/,$(fw-shipped-all)) --installed-fw-dirs := $(sort $(dir $(installed-fw))) $(INSTALL_FW_PATH)/. -+installed-fw-dirs := $(sort $(dir $(installed-fw))) $(INSTALL_FW_PATH)/./ - - # Workaround for make < 3.81, where .SECONDEXPANSION doesn't work. - PHONY += $(INSTALL_FW_PATH)/$$(%) install-all-dirs --- -1.7.8.5 - diff --git a/recipes-kernel/linux/linux-omap4-3.1.0/add_exec_tracepoint.patch b/recipes-kernel/linux/linux-omap4-3.1.0/add_exec_tracepoint.patch deleted file mode 100644 index 0d9a63b..0000000 --- a/recipes-kernel/linux/linux-omap4-3.1.0/add_exec_tracepoint.patch +++ /dev/null @@ -1,109 +0,0 @@ -From 4ff16c25e2cc48cbe6956e356c38a25ac063a64d Mon Sep 17 00:00:00 2001 -From: David Smith <dsmith@redhat.com> -Date: Tue, 7 Feb 2012 10:11:05 -0600 -Subject: [PATCH] tracepoint, vfs, sched: Add exec() tracepoint - -Added a minimal exec tracepoint. Exec is an important major event -in the life of a task, like fork(), clone() or exit(), all of -which we already trace. - -[ We also do scheduling re-balancing during exec() - so it's useful - from a scheduler instrumentation POV as well. ] - -If you want to watch a task start up, when it gets exec'ed is a good place -to start. With the addition of this tracepoint, exec's can be monitored -and better picture of general system activity can be obtained. This -tracepoint will also enable better process life tracking, allowing you to -answer questions like "what process keeps starting up binary X?". - -This tracepoint can also be useful in ftrace filtering and trigger -conditions: i.e. starting or stopping filtering when exec is called. - -Signed-off-by: David Smith <dsmith@redhat.com> -Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> -Cc: Steven Rostedt <rostedt@goodmis.org> -Cc: Christoph Hellwig <hch@infradead.org> -Cc: Al Viro <viro@zeniv.linux.org.uk> -Cc: Andrew Morton <akpm@linux-foundation.org> -Cc: Linus Torvalds <torvalds@linux-foundation.org> -Link: http://lkml.kernel.org/r/4F314D19.7030504@redhat.com -Signed-off-by: Ingo Molnar <mingo@elte.hu> ---- - fs/exec.c | 9 ++++++--- - include/trace/events/sched.h | 27 +++++++++++++++++++++++++++ - 2 files changed, 33 insertions(+), 3 deletions(-) - -diff --git a/fs/exec.c b/fs/exec.c -index aeb135c..d0d2080 100644 ---- a/fs/exec.c -+++ b/fs/exec.c -@@ -63,6 +63,8 @@ - #include <trace/events/task.h> - #include "internal.h" - -+#include <trace/events/sched.h> -+ - int core_uses_pid; - char core_pattern[CORENAME_MAX_SIZE] = "core"; - unsigned int core_pipe_limit; -@@ -1401,9 +1403,10 @@ int search_binary_handler(struct linux_binprm *bprm,struct pt_regs *regs) - */ - bprm->recursion_depth = depth; - if (retval >= 0) { -- if (depth == 0) -- ptrace_event(PTRACE_EVENT_EXEC, -- old_pid); -+ if (depth == 0) { -+ trace_sched_process_exec(current, old_pid, bprm); -+ ptrace_event(PTRACE_EVENT_EXEC, old_pid); -+ } - put_binfmt(fmt); - allow_write_access(bprm->file); - if (bprm->file) -diff --git a/include/trace/events/sched.h b/include/trace/events/sched.h -index 6ba596b..e61ddfe 100644 ---- a/include/trace/events/sched.h -+++ b/include/trace/events/sched.h -@@ -6,6 +6,7 @@ - - #include <linux/sched.h> - #include <linux/tracepoint.h> -+#include <linux/binfmts.h> - - /* - * Tracepoint for calling kthread_stop, performed to end a kthread: -@@ -276,6 +277,32 @@ TRACE_EVENT(sched_process_fork, - ); - - /* -+ * Tracepoint for exec: -+ */ -+TRACE_EVENT(sched_process_exec, -+ -+ TP_PROTO(struct task_struct *p, pid_t old_pid, -+ struct linux_binprm *bprm), -+ -+ TP_ARGS(p, old_pid, bprm), -+ -+ TP_STRUCT__entry( -+ __string( filename, bprm->filename ) -+ __field( pid_t, pid ) -+ __field( pid_t, old_pid ) -+ ), -+ -+ TP_fast_assign( -+ __assign_str(filename, bprm->filename); -+ __entry->pid = p->pid; -+ __entry->old_pid = p->pid; -+ ), -+ -+ TP_printk("filename=%s pid=%d old_pid=%d", __get_str(filename), -+ __entry->pid, __entry->old_pid) -+); -+ -+/* - * XXX the below sched_stat tracepoints only apply to SCHED_OTHER/BATCH/IDLE - * adding sched_stat support to SCHED_FIFO/RR would be welcome. - */ --- -1.7.6.5 diff --git a/recipes-kernel/linux/linux-omap4-3.1.0/pandaboard/defconfig b/recipes-kernel/linux/linux-omap4-3.1.0/pandaboard/defconfig deleted file mode 100644 index ea41b35..0000000 --- a/recipes-kernel/linux/linux-omap4-3.1.0/pandaboard/defconfig +++ /dev/null @@ -1,4402 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm 3.1.0 Kernel Configuration -# -CONFIG_ARM=y -CONFIG_HAVE_PWM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_HAVE_SCHED_CLOCK=y -CONFIG_GENERIC_GPIO=y -# CONFIG_ARCH_USES_GETTIMEOFFSET is not set -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_KTIME_SCALAR=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_LOCKBREAK=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_VECTORS_BASE=0xffff0000 -# CONFIG_ARM_PATCH_PHYS_VIRT is not set -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_HAVE_IRQ_WORK=y -CONFIG_IRQ_WORK=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -# CONFIG_FHANDLE is not set -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -CONFIG_AUDIT=y -CONFIG_HAVE_GENERIC_HARDIRQS=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_HARDIRQS=y -CONFIG_HAVE_SPARSE_IRQ=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_CHIP=y -# CONFIG_SPARSE_IRQ is not set - -# -# RCU Subsystem -# -CONFIG_TREE_PREEMPT_RCU=y -CONFIG_PREEMPT_RCU=y -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_RCU_BOOST is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_CGROUPS=y -# CONFIG_CGROUP_DEBUG is not set -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_CGROUP_MEM_RES_CTLR=y -# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_RT_GROUP_SCHED=y -CONFIG_BLK_CGROUP=y -# CONFIG_DEBUG_BLK_CGROUP is not set -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -# CONFIG_SCHED_AUTOGROUP is not set -CONFIG_MM_OWNER=y -# CONFIG_SYSFS_DEPRECATED is not set -CONFIG_RELAY=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -# CONFIG_RD_XZ is not set -CONFIG_RD_LZO=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EXPERT=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_EMBEDDED=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_PERF_COUNTERS is not set -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -CONFIG_KPROBES=y -CONFIG_KRETPROBES=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_USE_GENERIC_SMP_HELPERS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_HW_BREAKPOINT=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_STOP_MACHINE=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_BSGLIB is not set -# CONFIG_BLK_DEV_INTEGRITY is not set -# CONFIG_BLK_DEV_THROTTLING is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_CFQ_GROUP_IOSCHED=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_PADATA=y -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CNS3XXX is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_PRIMA2 is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_MXS is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_NUC93X is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5P64X0 is not set -# CONFIG_ARCH_S5PC100 is not set -# CONFIG_ARCH_S5PV210 is not set -# CONFIG_ARCH_EXYNOS4 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_TCC_926 is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_U8500 is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_PLAT_SPEAR is not set -# CONFIG_ARCH_VT8500 is not set -# CONFIG_ARCH_ZYNQ is not set -CONFIG_GPIO_PCA953X=y -# CONFIG_KEYBOARD_GPIO_POLLED is not set - -# -# TI OMAP Common Features -# -# CONFIG_ARCH_OMAP1 is not set -CONFIG_ARCH_OMAP2PLUS=y - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -CONFIG_OMAP_SMARTREFLEX_CLASS3=y -# CONFIG_OMAP_RESET_CLOCKS is not set -CONFIG_OMAP_MUX=y -# CONFIG_OMAP_MUX_DEBUG is not set -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_SCM_DEV=y -CONFIG_OMAP_MBOX_FWK=y -CONFIG_OMAP_MBOX_KFIFO_SIZE=256 -CONFIG_OMAP_REMOTE_PROC=y -CONFIG_OMAP_IOMMU=y -CONFIG_OMAP_USER_DMM=y -# CONFIG_OMAP_IOMMU_DEBUG is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -CONFIG_OMAP_PM_NOOP=y - -# -# TI OMAP2/3/4 Specific Features -# -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -CONFIG_ARCH_OMAP4=y -# CONFIG_SOC_OMAP3430 is not set -# CONFIG_SOC_OMAPTI816X is not set -CONFIG_OMAP_PACKAGE_CBL=y -CONFIG_OMAP_PACKAGE_CBS=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_DEVKIT8000 is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OMAP3530_LV_SOM is not set -# CONFIG_MACH_OMAP3_TORPEDO is not set -# CONFIG_MACH_OVERO is not set -# CONFIG_MACH_OMAP3EVM is not set -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_CRANEBOARD is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RM680 is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_CM_T3517 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_IGEP0030 is not set -# CONFIG_MACH_SBC3530 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -CONFIG_MACH_OMAP_4430SDP=y -CONFIG_MACH_OMAP_4430SDP_CAMERA_SUPPORT=y -# CONFIG_MACH_OMAP_4430SDP_CAM_OV5640 is not set -CONFIG_MACH_OMAP_4430SDP_CAM_OV5650=y -CONFIG_MACH_OMAP4_PANDA=y -CONFIG_MACH_OMAP4_PANDA_CAMERA_SUPPORT=y -# CONFIG_MACH_OMAP4_PANDA_CAM_OV5640 is not set -CONFIG_MACH_OMAP4_PANDA_CAM_OV5650=y -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set -CONFIG_OMAP_TPS6236X=y - -# -# System MMU -# - -# -# Processor Type -# -CONFIG_CPU_V7=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -CONFIG_SWP_EMULATE=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_CACHE_L2X0=y -CONFIG_CACHE_PL310=y -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_ARM_DMA_MEM_BUFFERABLE=y -CONFIG_ARCH_HAS_BARRIERS=y -# CONFIG_ARM_ERRATA_430973 is not set -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -# CONFIG_ARM_ERRATA_742230 is not set -# CONFIG_ARM_ERRATA_742231 is not set -CONFIG_PL310_ERRATA_588369=y -CONFIG_ARM_ERRATA_720789=y -CONFIG_PL310_ERRATA_727915=y -# CONFIG_ARM_ERRATA_743622 is not set -# CONFIG_ARM_ERRATA_751472 is not set -# CONFIG_ARM_ERRATA_753970 is not set -CONFIG_ARM_ERRATA_754322=y -# CONFIG_ARM_ERRATA_754327 is not set -# CONFIG_ARM_ERRATA_764369 is not set -CONFIG_ARM_GIC=y - -# -# Bus support -# -CONFIG_ARM_AMBA=y -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set -CONFIG_PL310_ERRATA_769419=y - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_ARM_CPU_TOPOLOGY=y -CONFIG_SCHED_MC=y -CONFIG_SCHED_SMT=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_TWD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_NR_CPUS=2 -CONFIG_HOTPLUG_CPU=y -CONFIG_LOCAL_TIMERS=y -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_PREEMPT_COUNT=y -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -CONFIG_OABI_COMPAT=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_COMPACTION is not set -CONFIG_MIGRATION=y -CONFIG_CMA_MIGRATE_TYPE=y -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 -# CONFIG_CLEANCACHE is not set -CONFIG_FORCE_MAX_ZONEORDER=13 -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_SECCOMP=y -CONFIG_CC_STACKPROTECTOR=y -# CONFIG_DEPRECATED_PARAM_STRUCT is not set - -# -# Boot options -# -# CONFIG_USE_OF is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyO2,115200n8 root=/dev/mmcblk0p2 rw rootwait mem=1G" -CONFIG_CMDLINE_FROM_BOOTLOADER=y -# CONFIG_CMDLINE_EXTEND is not set -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y -# CONFIG_CRASH_DUMP is not set -# CONFIG_AUTO_ZRELADDR is not set - -# -# CPU Power Management -# - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y - -# -# ARM CPU frequency scaling drivers -# -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_FPE_NWFPE is not set -# CONFIG_FPE_FASTFPE is not set -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PM_RUNTIME=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_ADVANCED_DEBUG is not set -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_CAN_PM_TRACE=y -# CONFIG_APM_EMULATION is not set -CONFIG_ARCH_HAS_OPP=y -CONFIG_PM_OPP=y -CONFIG_PM_CLK=y -CONFIG_CPU_PM=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM=y -CONFIG_XFRM_USER=m -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=m -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_FIB_TRIE_STATS is not set -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_ROUTE_CLASSID=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_IP_MROUTE=y -# CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_TCP_MD5SIG=y -CONFIG_IPV6=y -CONFIG_IPV6_PRIVACY=y -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_IPV6_ROUTE_INFO=y -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -# CONFIG_IPV6_MROUTE is not set -CONFIG_NETLABEL=y -CONFIG_NETWORK_SECMARK=y -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_SECMARK=y -CONFIG_NF_CONNTRACK_EVENTS=y -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -# CONFIG_NF_CONNTRACK_SNMP is not set -CONFIG_NF_CONNTRACK_PPTP=m -# CONFIG_NF_CONNTRACK_SANE is not set -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_CONNMARK=m - -# -# Xtables targets -# -# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set -# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m -# CONFIG_NETFILTER_XT_TARGET_CT is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_SECMARK=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -CONFIG_NETFILTER_XT_MATCH_DCCP=m -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -# CONFIG_NETFILTER_XT_MATCH_IPVS is not set -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OSF=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -# CONFIG_IP_SET is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -# CONFIG_IP_VS_DEBUG is not set -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y -# CONFIG_IP_VS_PROTO_SCTP is not set - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m -CONFIG_IP_VS_NFCT=y -# CONFIG_IP_VS_PE_SIP is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -# CONFIG_IP_NF_SECURITY is not set -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV6=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_IP6_NF_SECURITY is not set - -# -# DECnet: Netfilter Configuration -# -CONFIG_DECNET_NF_GRABULATOR=m -CONFIG_BRIDGE_NF_EBTABLES=m -CONFIG_BRIDGE_EBT_BROUTE=m -CONFIG_BRIDGE_EBT_T_FILTER=m -CONFIG_BRIDGE_EBT_T_NAT=m -CONFIG_BRIDGE_EBT_802_3=m -CONFIG_BRIDGE_EBT_AMONG=m -CONFIG_BRIDGE_EBT_ARP=m -CONFIG_BRIDGE_EBT_IP=m -CONFIG_BRIDGE_EBT_IP6=m -CONFIG_BRIDGE_EBT_LIMIT=m -CONFIG_BRIDGE_EBT_MARK=m -CONFIG_BRIDGE_EBT_PKTTYPE=m -CONFIG_BRIDGE_EBT_STP=m -CONFIG_BRIDGE_EBT_VLAN=m -CONFIG_BRIDGE_EBT_ARPREPLY=m -CONFIG_BRIDGE_EBT_DNAT=m -CONFIG_BRIDGE_EBT_MARK_T=m -CONFIG_BRIDGE_EBT_REDIRECT=m -CONFIG_BRIDGE_EBT_SNAT=m -CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m -CONFIG_BRIDGE_EBT_NFLOG=m -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -# CONFIG_NET_DCCPPROBE is not set -CONFIG_IP_SCTP=m -# CONFIG_NET_SCTPPROBE is not set -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -CONFIG_ATM_BR2684_IPFILTER=y -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_DSA=y -CONFIG_NET_DSA_TAG_EDSA=y -CONFIG_NET_DSA_TAG_TRAILER=y -CONFIG_NET_DSA_MV88E6XXX=y -CONFIG_NET_DSA_MV88E6060=y -CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y -CONFIG_NET_DSA_MV88E6131=y -CONFIG_NET_DSA_MV88E6123_61_65=y -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -CONFIG_DECNET=m -# CONFIG_DECNET_ROUTER is not set -CONFIG_LLC=m -CONFIG_LLC2=m -CONFIG_IPX=m -# CONFIG_IPX_INTERN is not set -CONFIG_ATALK=m -CONFIG_DEV_APPLETALK=m -CONFIG_IPDDP=m -CONFIG_IPDDP_ENCAP=y -CONFIG_IPDDP_DECAP=y -CONFIG_X25=m -CONFIG_LAPB=m -CONFIG_ECONET=m -CONFIG_ECONET_AUNUDP=y -CONFIG_ECONET_NATIVE=y -CONFIG_WAN_ROUTER=m -CONFIG_PHONET=m -CONFIG_IEEE802154=m -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -# CONFIG_NET_SCH_SFB is not set -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m -# CONFIG_NET_SCH_MQPRIO is not set -# CONFIG_NET_SCH_CHOKE is not set -# CONFIG_NET_SCH_QFQ is not set -# CONFIG_NET_SCH_INGRESS is not set - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_FW=m -# CONFIG_NET_CLS_U32 is not set -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -# CONFIG_NET_CLS_FLOW is not set -# CONFIG_NET_CLS_CGROUP is not set -CONFIG_NET_EMATCH=y -CONFIG_NET_EMATCH_STACK=32 -CONFIG_NET_EMATCH_CMP=m -CONFIG_NET_EMATCH_NBYTE=m -CONFIG_NET_EMATCH_U32=m -CONFIG_NET_EMATCH_META=m -CONFIG_NET_EMATCH_TEXT=m -CONFIG_NET_CLS_ACT=y -CONFIG_NET_ACT_POLICE=m -CONFIG_NET_ACT_GACT=m -CONFIG_GACT_PROB=y -CONFIG_NET_ACT_MIRRED=m -CONFIG_NET_ACT_IPT=m -CONFIG_NET_ACT_NAT=m -CONFIG_NET_ACT_PEDIT=m -CONFIG_NET_ACT_SIMP=m -CONFIG_NET_ACT_SKBEDIT=m -# CONFIG_NET_ACT_CSUM is not set -# CONFIG_NET_CLS_IND is not set -CONFIG_NET_SCH_FIFO=y -CONFIG_DCB=y -CONFIG_DNS_RESOLVER=y -CONFIG_BATMAN_ADV=m -# CONFIG_BATMAN_ADV_DEBUG is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y - -# -# Network testing -# -CONFIG_NET_PKTGEN=m -# CONFIG_NET_TCPPROBE is not set -# CONFIG_NET_DROP_MONITOR is not set -CONFIG_HAMRADIO=y - -# -# Packet Radio protocols -# -CONFIG_AX25=m -CONFIG_AX25_DAMA_SLAVE=y -CONFIG_NETROM=m -CONFIG_ROSE=m - -# -# AX.25 network device drivers -# -CONFIG_MKISS=m -CONFIG_6PACK=m -CONFIG_BPQETHER=m -CONFIG_BAYCOM_SER_FDX=m -CONFIG_BAYCOM_SER_HDX=m -# CONFIG_BAYCOM_PAR is not set -# CONFIG_BAYCOM_EPP is not set -CONFIG_YAM=m -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -# CONFIG_CAN_SLCAN is not set -CONFIG_CAN_DEV=m -# CONFIG_CAN_CALC_BITTIMING is not set -# CONFIG_CAN_TI_HECC is not set -CONFIG_CAN_MCP251X=m -CONFIG_CAN_SJA1000=m -CONFIG_CAN_SJA1000_PLATFORM=m -# CONFIG_CAN_C_CAN is not set - -# -# CAN USB interfaces -# -# CONFIG_CAN_EMS_USB is not set -# CONFIG_CAN_ESD_USB2 is not set -# CONFIG_CAN_SOFTING is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -# CONFIG_IRNET is not set -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -# CONFIG_TOIM3232_DONGLE is not set -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -CONFIG_ACT200L_DONGLE=m -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -# CONFIG_BT_CMTP is not set -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -CONFIG_BT_HCIVHCI=m -# CONFIG_BT_MRVL is not set -CONFIG_BT_ATH3K=m -CONFIG_BT_WILINK=m -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -CONFIG_RXKAD=m -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -CONFIG_NL80211_TESTMODE=y -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -CONFIG_CFG80211_REG_DEBUG=y -CONFIG_CFG80211_DEFAULT_PS=y -CONFIG_CFG80211_DEBUGFS=y -# CONFIG_CFG80211_INTERNAL_REGDB is not set -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -# CONFIG_MAC80211_RC_PID is not set -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_MINSTREL_HT=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -CONFIG_MAC80211_MESH=y -CONFIG_MAC80211_LEDS=y -CONFIG_MAC80211_DEBUGFS=y -CONFIG_MAC80211_DEBUG_MENU=y -# CONFIG_MAC80211_NOINLINE is not set -# CONFIG_MAC80211_VERBOSE_DEBUG is not set -# CONFIG_MAC80211_HT_DEBUG is not set -# CONFIG_MAC80211_TKIP_DEBUG is not set -# CONFIG_MAC80211_IBSS_DEBUG is not set -# CONFIG_MAC80211_VERBOSE_PS_DEBUG is not set -# CONFIG_MAC80211_VERBOSE_MPL_DEBUG is not set -# CONFIG_MAC80211_VERBOSE_MHWMP_DEBUG is not set -# CONFIG_MAC80211_DEBUG_COUNTERS is not set -CONFIG_MAC80211_DRIVER_API_TRACER=y -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -# CONFIG_RFKILL_REGULATOR is not set -# CONFIG_RFKILL_GPIO is not set -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set -# CONFIG_CAIF is not set -CONFIG_CEPH_LIB=m -# CONFIG_CEPH_LIB_PRETTYDEBUG is not set -# CONFIG_NFC is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_SPI=y -CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set - -# -# Default contiguous memory area size: -# -CONFIG_CMA_SIZE_ABSOLUTE=16 -CONFIG_CMA_SIZE_SEL_ABSOLUTE=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CONNECTOR=y -CONFIG_PROC_EVENTS=y -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -CONFIG_MTD_TESTS=m -CONFIG_MTD_REDBOOT_PARTS=m -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 -# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set -# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -CONFIG_FTL=m -CONFIG_NFTL=m -CONFIG_NFTL_RW=y -CONFIG_INFTL=m -CONFIG_RFD_FTL=m -CONFIG_SSFDC=m -# CONFIG_SM_FTL is not set -CONFIG_MTD_OOPS=m -# CONFIG_MTD_SWAP is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=m -CONFIG_MTD_JEDECPROBE=m -CONFIG_MTD_GEN_PROBE=m -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=m -CONFIG_MTD_CFI_AMDSTD=m -CONFIG_MTD_CFI_STAA=m -CONFIG_MTD_CFI_UTIL=m -CONFIG_MTD_RAM=m -CONFIG_MTD_ROM=m -CONFIG_MTD_ABSENT=m - -# -# Mapping drivers for chip access -# -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=m -# CONFIG_MTD_PHYSMAP_COMPAT is not set -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_IMPA7 is not set -# CONFIG_MTD_GPIO_ADDR is not set -CONFIG_MTD_PLATRAM=m -# CONFIG_MTD_LATCH_ADDR is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=m -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -CONFIG_MTD_SLRAM=m -CONFIG_MTD_PHRAM=m -CONFIG_MTD_MTDRAM=m -CONFIG_MTDRAM_TOTAL_SIZE=4096 -CONFIG_MTDRAM_ERASE_SIZE=128 -CONFIG_MTD_BLOCK2MTD=m - -# -# Disk-On-Chip Device Drivers -# -CONFIG_MTD_DOC2000=m -CONFIG_MTD_DOC2001=m -CONFIG_MTD_DOC2001PLUS=m -CONFIG_MTD_DOCPROBE=m -CONFIG_MTD_DOCECC=m -# CONFIG_MTD_DOCPROBE_ADVANCED is not set -CONFIG_MTD_DOCPROBE_ADDRESS=0 -CONFIG_MTD_NAND_ECC=y -# CONFIG_MTD_NAND_ECC_SMC is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_BCH is not set -# CONFIG_MTD_SM_COMMON is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -# CONFIG_MTD_NAND_OMAP2 is not set -CONFIG_MTD_NAND_IDS=y -CONFIG_MTD_NAND_DISKONCHIP=m -# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 -# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set -# CONFIG_MTD_NAND_TMIO is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -CONFIG_MTD_ONENAND=m -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -CONFIG_MTD_ONENAND_GENERIC=m -# CONFIG_MTD_ONENAND_OMAP2 is not set -# CONFIG_MTD_ONENAND_OTP is not set -CONFIG_MTD_ONENAND_2X_PROGRAM=y -CONFIG_MTD_ONENAND_SIM=m - -# -# LPDDR flash memory drivers -# -CONFIG_MTD_LPDDR=m -CONFIG_MTD_QINFO_PROBE=m -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -CONFIG_MTD_UBI_GLUEBI=m -# CONFIG_MTD_UBI_DEBUG is not set -CONFIG_PARPORT=m -# CONFIG_PARPORT_PC is not set -# CONFIG_PARPORT_GSC is not set -CONFIG_PARPORT_AX88796=m -CONFIG_PARPORT_1284=y -CONFIG_PARPORT_NOT_PC=y -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -CONFIG_BLK_DEV_CRYPTOLOOP=m -# CONFIG_BLK_DEV_DRBD is not set -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=65536 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -CONFIG_ATA_OVER_ETH=m -CONFIG_MG_DISK=m -CONFIG_MG_DISK_RES=0 -# CONFIG_BLK_DEV_RBD is not set -CONFIG_SENSORS_LIS3LV02D=m -CONFIG_MISC_DEVICES=y -CONFIG_AD525X_DPOT=m -# CONFIG_AD525X_DPOT_I2C is not set -# CONFIG_AD525X_DPOT_SPI is not set -CONFIG_ICS932S401=m -CONFIG_ENCLOSURE_SERVICES=m -# CONFIG_APDS9802ALS is not set -CONFIG_ISL29003=m -# CONFIG_ISL29020 is not set -CONFIG_SENSORS_TSL2550=m -CONFIG_SENSORS_BH1780=y -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -CONFIG_DS1682=m -CONFIG_TI_DAC7512=m -CONFIG_BMP085=y -# CONFIG_USB_SWITCH_FSA9480 is not set -CONFIG_C2PORT=m - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=m -CONFIG_EEPROM_AT25=m -CONFIG_EEPROM_LEGACY=m -CONFIG_EEPROM_MAX6875=m -CONFIG_EEPROM_93CX6=m -# CONFIG_EEPROM_93XX46 is not set -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set - -# -# Texas Instruments shared transport line discipline -# -CONFIG_TI_ST=m -CONFIG_SENSORS_LIS3_SPI=m -CONFIG_SENSORS_LIS3_I2C=m -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=m -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_CHR_DEV_SG=m -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_ENCLOSURE is not set -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -CONFIG_ISCSI_BOOT_SYSFS=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -CONFIG_ATA=m -# CONFIG_ATA_NONSTANDARD is not set -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_SATA_PMP=y - -# -# Controllers with non-SFF native interface -# -# CONFIG_SATA_AHCI_PLATFORM is not set -CONFIG_ATA_SFF=y - -# -# SFF controllers with custom DMA interface -# -CONFIG_ATA_BMDMA=y - -# -# SATA SFF controllers with BMDMA -# -CONFIG_SATA_MV=m - -# -# PATA SFF controllers with BMDMA -# -# CONFIG_PATA_ARASAN_CF is not set - -# -# PIO-only SFF controllers -# -# CONFIG_PATA_PLATFORM is not set - -# -# Generic fallback / legacy drivers -# -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -# CONFIG_MULTICORE_RAID456 is not set -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -# CONFIG_DM_RAID is not set -CONFIG_DM_LOG_USERSPACE=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_MULTIPATH_QL=m -CONFIG_DM_MULTIPATH_ST=m -CONFIG_DM_DELAY=m -CONFIG_DM_UEVENT=y -# CONFIG_DM_FLAKEY is not set -# CONFIG_TARGET_CORE is not set -CONFIG_NETDEVICES=y -CONFIG_IFB=m -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -# CONFIG_MACVTAP is not set -CONFIG_EQUALIZER=m -CONFIG_TUN=y -CONFIG_VETH=m -CONFIG_MII=y -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -CONFIG_BROADCOM_PHY=m -CONFIG_ICPLUS_PHY=m -CONFIG_REALTEK_PHY=m -CONFIG_NATIONAL_PHY=m -CONFIG_STE10XP=m -CONFIG_LSI_ET1011C_PHY=m -# CONFIG_MICREL_PHY is not set -# CONFIG_FIXED_PHY is not set -CONFIG_MDIO_BITBANG=m -# CONFIG_MDIO_GPIO is not set -CONFIG_NET_ETHERNET=y -CONFIG_AX88796=m -CONFIG_AX88796_93CX6=y -CONFIG_SMC91X=m -# CONFIG_TI_DAVINCI_EMAC is not set -# CONFIG_TI_DAVINCI_MDIO is not set -# CONFIG_TI_DAVINCI_CPDMA is not set -CONFIG_DM9000=m -CONFIG_DM9000_DEBUGLEVEL=4 -# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set -CONFIG_ENC28J60=m -# CONFIG_ENC28J60_WRITEVERIFY is not set -CONFIG_ETHOC=m -CONFIG_SMC911X=m -CONFIG_SMSC911X=m -# CONFIG_SMSC911X_ARCH_HOOKS is not set -CONFIG_DNET=m -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -CONFIG_B44=m -CONFIG_KS8851=y -CONFIG_KS8851_MLL=m -# CONFIG_NET_POCKET is not set -# CONFIG_FTMAC100 is not set -CONFIG_NETDEV_1000=y -# CONFIG_STMMAC_ETH is not set -# CONFIG_FTGMAC100 is not set -CONFIG_NETDEV_10000=y -CONFIG_WLAN=y -CONFIG_LIBERTAS_THINFIRM=m -# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set -CONFIG_LIBERTAS_THINFIRM_USB=m -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -CONFIG_MAC80211_HWSIM=m -CONFIG_ATH_COMMON=m -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_CARL9170 is not set -CONFIG_B43=m -CONFIG_B43_SSB=y -# CONFIG_B43_SDIO is not set -CONFIG_B43_PIO=y -# CONFIG_B43_PHY_N is not set -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -CONFIG_B43LEGACY=m -CONFIG_B43LEGACY_LEDS=y -CONFIG_B43LEGACY_HWRNG=y -# CONFIG_B43LEGACY_DEBUG is not set -CONFIG_B43LEGACY_DMA=y -CONFIG_B43LEGACY_PIO=y -CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y -# CONFIG_B43LEGACY_DMA_MODE is not set -# CONFIG_B43LEGACY_PIO_MODE is not set -CONFIG_HOSTAP=m -# CONFIG_HOSTAP_FIRMWARE is not set -CONFIG_IWM=m -# CONFIG_IWM_DEBUG is not set -# CONFIG_IWM_TRACING is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -CONFIG_LIBERTAS_SDIO=m -CONFIG_LIBERTAS_SPI=m -# CONFIG_LIBERTAS_DEBUG is not set -# CONFIG_LIBERTAS_MESH is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -CONFIG_P54_SPI=m -# CONFIG_P54_SPI_DEFAULT_EEPROM is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -CONFIG_RT2800USB=m -# CONFIG_RT2800USB_RT33XX is not set -# CONFIG_RT2800USB_RT35XX is not set -# CONFIG_RT2800USB_RT53XX is not set -# CONFIG_RT2800USB_UNKNOWN is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -CONFIG_RT2X00_LIB_DEBUGFS=y -# CONFIG_RT2X00_DEBUG is not set -# CONFIG_RTL8192SE is not set -# CONFIG_RTL8192DE is not set -# CONFIG_RTL8192CU is not set -# CONFIG_WL1251 is not set -CONFIG_WL12XX_MENU=m -CONFIG_WL12XX=m -CONFIG_WL12XX_HT=y -# CONFIG_WL12XX_SPI is not set -CONFIG_WL12XX_SDIO=m -# CONFIG_WL12XX_SDIO_TEST is not set -CONFIG_WL12XX_PLATFORM_DATA=y -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set -# CONFIG_MWIFIEX is not set - -# -# WiMAX Wireless Broadband devices -# -# CONFIG_WIMAX_I2400M_USB is not set -# CONFIG_WIMAX_I2400M_SDIO is not set - -# -# USB Network Adapters -# -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_CDCETHER=m -CONFIG_USB_NET_CDC_EEM=m -CONFIG_USB_NET_CDC_NCM=y -CONFIG_USB_NET_DM9601=m -# CONFIG_USB_NET_SMSC75XX is not set -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=m -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET=m -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=m -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_KALMIA is not set -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -CONFIG_USB_CDC_PHONET=m -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_VL600 is not set -CONFIG_WAN=y -# CONFIG_HDLC is not set -# CONFIG_DLCI is not set -# CONFIG_WAN_ROUTER_DRIVERS is not set -# CONFIG_LAPBETHER is not set -# CONFIG_X25_ASY is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -CONFIG_ATM_TCP=m -CONFIG_IEEE802154_DRIVERS=m -# CONFIG_IEEE802154_FAKEHARD is not set - -# -# CAIF transport drivers -# -CONFIG_PLIP=m -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPPOATM=m -CONFIG_SLIP=m -CONFIG_SLIP_COMPRESSED=y -CONFIG_SLHC=m -CONFIG_SLIP_SMART=y -CONFIG_SLIP_MODE_SLIP6=y -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -# CONFIG_NETPOLL_TRAP is not set -CONFIG_NET_POLL_CONTROLLER=y -CONFIG_ISDN=y -CONFIG_ISDN_I4L=m -# CONFIG_ISDN_PPP is not set -# CONFIG_ISDN_AUDIO is not set -# CONFIG_ISDN_X25 is not set - -# -# ISDN feature submodules -# -# CONFIG_ISDN_DIVERSION is not set - -# -# ISDN4Linux hardware drivers -# - -# -# Passive cards -# -# CONFIG_ISDN_DRV_HISAX is not set - -# -# Active cards -# -CONFIG_ISDN_CAPI=m -CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y -CONFIG_CAPI_TRACE=y -# CONFIG_ISDN_CAPI_MIDDLEWARE is not set -# CONFIG_ISDN_CAPI_CAPI20 is not set -# CONFIG_ISDN_CAPI_CAPIDRV is not set - -# -# CAPI hardware drivers -# -# CONFIG_CAPI_AVM is not set -# CONFIG_CAPI_EICON is not set -CONFIG_ISDN_DRV_GIGASET=m -# CONFIG_GIGASET_CAPI is not set -CONFIG_GIGASET_I4L=y -# CONFIG_GIGASET_DUMMYLL is not set -# CONFIG_GIGASET_BASE is not set -# CONFIG_GIGASET_M105 is not set -# CONFIG_GIGASET_M101 is not set -# CONFIG_GIGASET_DEBUG is not set -CONFIG_MISDN=m -# CONFIG_MISDN_DSP is not set -# CONFIG_MISDN_L1OIP is not set - -# -# mISDN hardware drivers -# -# CONFIG_MISDN_HFCUSB is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -CONFIG_INPUT_SPARSEKMAP=m - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_JOYDEV=m -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=m - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ADP5520=m -CONFIG_KEYBOARD_ADP5588=m -# CONFIG_KEYBOARD_ADP5589 is not set -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -CONFIG_KEYBOARD_LKKBD=m -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -CONFIG_KEYBOARD_MATRIX=m -CONFIG_KEYBOARD_LM8323=m -CONFIG_KEYBOARD_MAX7359=m -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -CONFIG_KEYBOARD_NEWTON=m -# CONFIG_KEYBOARD_OPENCORES is not set -CONFIG_KEYBOARD_STOWAWAY=m -CONFIG_KEYBOARD_SUNKBD=m -CONFIG_KEYBOARD_OMAP4=y -CONFIG_KEYBOARD_TWL4030=y -CONFIG_KEYBOARD_XTKBD=m -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=m -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -CONFIG_MOUSE_PS2_ELANTECH=y -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_SERIAL=m -CONFIG_MOUSE_APPLETOUCH=m -CONFIG_MOUSE_BCM5974=m -CONFIG_MOUSE_VSXXXAA=m -# CONFIG_MOUSE_GPIO is not set -CONFIG_MOUSE_SYNAPTICS_I2C=m -CONFIG_INPUT_JOYSTICK=y -CONFIG_JOYSTICK_ANALOG=m -CONFIG_JOYSTICK_A3D=m -CONFIG_JOYSTICK_ADI=m -CONFIG_JOYSTICK_COBRA=m -CONFIG_JOYSTICK_GF2K=m -CONFIG_JOYSTICK_GRIP=m -CONFIG_JOYSTICK_GRIP_MP=m -CONFIG_JOYSTICK_GUILLEMOT=m -CONFIG_JOYSTICK_INTERACT=m -CONFIG_JOYSTICK_SIDEWINDER=m -CONFIG_JOYSTICK_TMDC=m -CONFIG_JOYSTICK_IFORCE=m -CONFIG_JOYSTICK_IFORCE_USB=y -CONFIG_JOYSTICK_IFORCE_232=y -CONFIG_JOYSTICK_WARRIOR=m -CONFIG_JOYSTICK_MAGELLAN=m -CONFIG_JOYSTICK_SPACEORB=m -CONFIG_JOYSTICK_SPACEBALL=m -CONFIG_JOYSTICK_STINGER=m -CONFIG_JOYSTICK_TWIDJOY=m -CONFIG_JOYSTICK_ZHENHUA=m -CONFIG_JOYSTICK_DB9=m -CONFIG_JOYSTICK_GAMECON=m -CONFIG_JOYSTICK_TURBOGRAFX=m -# CONFIG_JOYSTICK_AS5011 is not set -CONFIG_JOYSTICK_JOYDUMP=m -CONFIG_JOYSTICK_XPAD=m -CONFIG_JOYSTICK_XPAD_FF=y -CONFIG_JOYSTICK_XPAD_LEDS=y -# CONFIG_JOYSTICK_WALKERA0701 is not set -CONFIG_INPUT_TABLET=y -CONFIG_TABLET_USB_ACECAD=m -CONFIG_TABLET_USB_AIPTEK=m -CONFIG_TABLET_USB_GTCO=m -# CONFIG_TABLET_USB_HANWANG is not set -CONFIG_TABLET_USB_KBTAB=m -CONFIG_TABLET_USB_WACOM=m -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -CONFIG_TOUCHSCREEN_AD7877=m -CONFIG_TOUCHSCREEN_AD7879=m -CONFIG_TOUCHSCREEN_AD7879_I2C=m -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -CONFIG_TOUCHSCREEN_DA9034=y -CONFIG_TOUCHSCREEN_DYNAPRO=m -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -CONFIG_TOUCHSCREEN_EETI=m -CONFIG_TOUCHSCREEN_FUJITSU=m -CONFIG_TOUCHSCREEN_GUNZE=m -CONFIG_TOUCHSCREEN_ELO=m -CONFIG_TOUCHSCREEN_WACOM_W8001=m -# CONFIG_TOUCHSCREEN_MAX11801 is not set -CONFIG_TOUCHSCREEN_MCS5000=m -CONFIG_TOUCHSCREEN_MTOUCH=m -CONFIG_TOUCHSCREEN_INEXIO=m -CONFIG_TOUCHSCREEN_MK712=m -CONFIG_TOUCHSCREEN_PENMOUNT=m -CONFIG_TOUCHSCREEN_TOUCHRIGHT=m -CONFIG_TOUCHSCREEN_TOUCHWIN=m -CONFIG_TOUCHSCREEN_USB_COMPOSITE=m -CONFIG_TOUCHSCREEN_USB_EGALAX=y -CONFIG_TOUCHSCREEN_USB_PANJIT=y -CONFIG_TOUCHSCREEN_USB_3M=y -CONFIG_TOUCHSCREEN_USB_ITM=y -CONFIG_TOUCHSCREEN_USB_ETURBO=y -CONFIG_TOUCHSCREEN_USB_GUNZE=y -CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y -CONFIG_TOUCHSCREEN_USB_IRTOUCH=y -CONFIG_TOUCHSCREEN_USB_IDEALTEK=y -CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y -CONFIG_TOUCHSCREEN_USB_GOTOP=y -CONFIG_TOUCHSCREEN_USB_JASTEC=y -CONFIG_TOUCHSCREEN_USB_E2I=y -CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y -CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y -# CONFIG_TOUCHSCREEN_USB_NEXIO is not set -CONFIG_TOUCHSCREEN_TOUCHIT213=m -# CONFIG_TOUCHSCREEN_TSC2005 is not set -CONFIG_TOUCHSCREEN_TSC2007=m -CONFIG_TOUCHSCREEN_W90X900=m -# CONFIG_TOUCHSCREEN_PCAP is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -CONFIG_TOUCHSCREEN_SYNTM12XX=y -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_MPU3050 is not set -CONFIG_INPUT_ATI_REMOTE=m -CONFIG_INPUT_ATI_REMOTE2=m -CONFIG_INPUT_KEYSPAN_REMOTE=m -# CONFIG_INPUT_KXTJ9 is not set -CONFIG_INPUT_POWERMATE=m -CONFIG_INPUT_YEALINK=m -CONFIG_INPUT_CM109=m -CONFIG_INPUT_TWL4030_PWRBUTTON=y -# CONFIG_INPUT_TWL4030_VIBRA is not set -CONFIG_INPUT_TWL6040_VIBRA=y -CONFIG_INPUT_UINPUT=y -# CONFIG_INPUT_PCF50633_PMU is not set -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PWM_BEEPER is not set -CONFIG_INPUT_GPIO_ROTARY_ENCODER=m -# CONFIG_INPUT_PCAP is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_CMA3000 is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_PARKBD=m -# CONFIG_SERIO_AMBAKMI is not set -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIO_RAW=m -CONFIG_SERIO_ALTERA_PS2=m -# CONFIG_SERIO_PS2MULT is not set -CONFIG_GAMEPORT=m -CONFIG_GAMEPORT_NS558=m -CONFIG_GAMEPORT_L4=m - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_UNIX98_PTYS=y -CONFIG_DEVPTS_MULTIPLE_INSTANCES=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_DEVKMEM is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_AMBA_PL010 is not set -# CONFIG_SERIAL_AMBA_PL011 is not set -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX3107 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_OMAP=y -CONFIG_SERIAL_OMAP_CONSOLE=y -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_IFX6X60 is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set -# CONFIG_TTY_PRINTK is not set -# CONFIG_PRINTER is not set -# CONFIG_PPDEV is not set -# CONFIG_HVC_DCC is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_NVRAM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_RAMOOPS is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -# CONFIG_I2C_MUX is not set -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PXA_PCI is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_PARPORT is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_BUTTERFLY is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_LM70_LLP is not set -# CONFIG_SPI_OC_TINY is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_PL022 is not set -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set - -# -# PPS generators support -# - -# -# PTP clock support -# - -# -# Enable Device Drivers -> PPS to see the PTP clock options. -# -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO drivers: -# -# CONFIG_GPIO_GENERIC_PLATFORM is not set -# CONFIG_GPIO_IT8761E is not set -# CONFIG_GPIO_PL061 is not set - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X_IRQ is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_SX150X is not set -CONFIG_GPIO_TWL4030=y -CONFIG_GPIO_ADP5520=m -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_74X164 is not set - -# -# AC97 GPIO expanders: -# - -# -# MODULbus GPIO expanders: -# -CONFIG_W1=y -CONFIG_W1_CON=y - -# -# 1-wire Bus Masters -# -CONFIG_W1_MASTER_DS2490=m -CONFIG_W1_MASTER_DS2482=m -CONFIG_W1_MASTER_DS1WM=m -CONFIG_W1_MASTER_GPIO=m -# CONFIG_HDQ_MASTER_OMAP is not set - -# -# 1-wire Slaves -# -CONFIG_W1_SLAVE_THERM=m -CONFIG_W1_SLAVE_SMEM=m -# CONFIG_W1_SLAVE_DS2408 is not set -# CONFIG_W1_SLAVE_DS2423 is not set -CONFIG_W1_SLAVE_DS2431=m -CONFIG_W1_SLAVE_DS2433=m -# CONFIG_W1_SLAVE_DS2433_CRC is not set -CONFIG_W1_SLAVE_DS2760=y -# CONFIG_W1_SLAVE_DS2780 is not set -CONFIG_W1_SLAVE_BQ27000=m -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_PDA_POWER=m -# CONFIG_TEST_POWER is not set -CONFIG_BATTERY_DS2760=m -# CONFIG_BATTERY_DS2780 is not set -CONFIG_BATTERY_DS2782=m -# CONFIG_BATTERY_BQ20Z75 is not set -CONFIG_BATTERY_BQ27x00=m -CONFIG_BATTERY_BQ27X00_I2C=y -CONFIG_BATTERY_BQ27X00_PLATFORM=y -CONFIG_BATTERY_DA9030=m -CONFIG_BATTERY_MAX17040=m -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_PCF50633 is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_TWL4030 is not set -# CONFIG_CHARGER_GPIO is not set -CONFIG_HWMON=y -CONFIG_HWMON_VID=m -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -CONFIG_SENSORS_AD7414=m -CONFIG_SENSORS_AD7418=m -CONFIG_SENSORS_ADCXX=m -CONFIG_SENSORS_ADM1021=m -CONFIG_SENSORS_ADM1025=m -CONFIG_SENSORS_ADM1026=m -CONFIG_SENSORS_ADM1029=m -CONFIG_SENSORS_ADM1031=m -CONFIG_SENSORS_ADM9240=m -# CONFIG_SENSORS_ADT7411 is not set -CONFIG_SENSORS_ADT7462=m -CONFIG_SENSORS_ADT7470=m -CONFIG_SENSORS_ADT7475=m -# CONFIG_SENSORS_ASC7621 is not set -CONFIG_SENSORS_ATXP1=m -# CONFIG_SENSORS_DS620 is not set -CONFIG_SENSORS_DS1621=m -CONFIG_SENSORS_F71805F=m -CONFIG_SENSORS_OMAP_TEMP_SENSOR=y -CONFIG_SENSORS_F71882FG=m -CONFIG_SENSORS_F75375S=m -CONFIG_SENSORS_G760A=m -CONFIG_SENSORS_GL518SM=m -CONFIG_SENSORS_GL520SM=m -# CONFIG_SENSORS_GPIO_FAN is not set -CONFIG_SENSORS_IT87=m -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_LINEAGE is not set -CONFIG_SENSORS_LM63=m -CONFIG_SENSORS_LM70=m -CONFIG_SENSORS_LM73=m -CONFIG_SENSORS_LM75=m -CONFIG_SENSORS_LM77=m -CONFIG_SENSORS_LM78=m -CONFIG_SENSORS_LM80=m -CONFIG_SENSORS_LM83=m -CONFIG_SENSORS_LM85=m -CONFIG_SENSORS_LM87=m -CONFIG_SENSORS_LM90=m -CONFIG_SENSORS_LM92=m -CONFIG_SENSORS_LM93=m -# CONFIG_SENSORS_LTC4151 is not set -CONFIG_SENSORS_LTC4215=m -CONFIG_SENSORS_LTC4245=m -# CONFIG_SENSORS_LTC4261 is not set -CONFIG_SENSORS_LM95241=m -# CONFIG_SENSORS_LM95245 is not set -CONFIG_SENSORS_MAX1111=m -# CONFIG_SENSORS_MAX16065 is not set -CONFIG_SENSORS_MAX1619=m -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -CONFIG_SENSORS_MAX6650=m -# CONFIG_SENSORS_NTC_THERMISTOR is not set -CONFIG_SENSORS_PC87360=m -CONFIG_SENSORS_PC87427=m -CONFIG_SENSORS_PCF8591=m -# CONFIG_PMBUS is not set -CONFIG_SENSORS_SHT15=m -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SMM665 is not set -CONFIG_SENSORS_DME1737=m -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -CONFIG_SENSORS_SMSC47M1=m -CONFIG_SENSORS_SMSC47M192=m -CONFIG_SENSORS_SMSC47B397=m -# CONFIG_SENSORS_SCH56XX_COMMON is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_ADS1015 is not set -CONFIG_SENSORS_ADS7828=m -# CONFIG_SENSORS_ADS7871 is not set -CONFIG_SENSORS_AMC6821=m -CONFIG_SENSORS_THMC50=m -# CONFIG_SENSORS_TMP102 is not set -CONFIG_SENSORS_TMP401=m -CONFIG_SENSORS_TMP421=m -CONFIG_SENSORS_VT1211=m -CONFIG_SENSORS_W83781D=m -CONFIG_SENSORS_W83791D=m -CONFIG_SENSORS_W83792D=m -CONFIG_SENSORS_W83793=m -# CONFIG_SENSORS_W83795 is not set -CONFIG_SENSORS_W83L785TS=m -CONFIG_SENSORS_W83L786NG=m -CONFIG_SENSORS_W83627HF=m -CONFIG_SENSORS_W83627EHF=m -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_CORE is not set -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -CONFIG_SOFT_WATCHDOG=m -# CONFIG_ARM_SP805_WATCHDOG is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_MPCORE_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -CONFIG_TWL4030_WATCHDOG=y -# CONFIG_MAX63XX_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -CONFIG_USBPCWATCHDOG=m -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=m -CONFIG_SSB_BLOCKIO=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set -CONFIG_BCMA_POSSIBLE=y - -# -# Broadcom specific AMBA -# -# CONFIG_BCMA is not set -CONFIG_MFD_SUPPORT=y -CONFIG_MFD_CORE=y -# CONFIG_MFD_88PM860X is not set -CONFIG_MFD_SM501=m -# CONFIG_MFD_SM501_GPIO is not set -CONFIG_MFD_ASIC3=y -CONFIG_HTC_EGPIO=y -CONFIG_HTC_PASIC3=m -# CONFIG_HTC_I2CPLD is not set -# CONFIG_TPS6105X is not set -CONFIG_TPS65010=m -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS6586X is not set -# CONFIG_MFD_TPS65910 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS65912_SPI is not set -CONFIG_OMAP4460PLUS_SCM=y -CONFIG_TWL4030_CORE=y -# CONFIG_TWL4030_MADC is not set -CONFIG_TWL4030_POWER=y -CONFIG_MFD_TWL4030_AUDIO=y -CONFIG_TWL6030_PWM=y -CONFIG_TWL6040_CORE=y -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_TC3589X is not set -CONFIG_MFD_TMIO=y -CONFIG_MFD_T7L66XB=y -CONFIG_MFD_TC6387XB=y -CONFIG_MFD_TC6393XB=y -CONFIG_PMIC_DA903X=y -CONFIG_PMIC_ADP5520=y -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -CONFIG_MFD_WM8400=m -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -CONFIG_MFD_PCF50633=m -CONFIG_PCF50633_ADC=m -CONFIG_PCF50633_GPIO=m -# CONFIG_MFD_MC13XXX is not set -# CONFIG_ABX500_CORE is not set -CONFIG_EZX_PCAP=y -CONFIG_MFD_WL1273_CORE=y -CONFIG_MFD_OMAP_USB_HOST=y -# CONFIG_MFD_AAT2870_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_DUMMY=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_VIRTUAL_CONSUMER=m -CONFIG_REGULATOR_USERSPACE_CONSUMER=m -CONFIG_REGULATOR_BQ24022=m -CONFIG_REGULATOR_MAX1586=m -# CONFIG_REGULATOR_MAX8649 is not set -CONFIG_REGULATOR_MAX8660=m -# CONFIG_REGULATOR_MAX8952 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_WM8400 is not set -# CONFIG_REGULATOR_DA903X is not set -# CONFIG_REGULATOR_PCF50633 is not set -CONFIG_REGULATOR_LP3971=m -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_PCAP is not set -CONFIG_REGULATOR_TPS65023=y -CONFIG_REGULATOR_TPS6507X=y -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_AD5398 is not set -# CONFIG_REGULATOR_TPS6524X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_MEDIA_CONTROLLER=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -CONFIG_DVB_CORE=m -CONFIG_DVB_NET=y -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_RC_CORE=m -CONFIG_LIRC=m -CONFIG_RC_MAP=m -CONFIG_IR_NEC_DECODER=m -CONFIG_IR_RC5_DECODER=m -CONFIG_IR_RC6_DECODER=m -CONFIG_IR_JVC_DECODER=m -CONFIG_IR_SONY_DECODER=m -CONFIG_IR_RC5_SZ_DECODER=m -CONFIG_IR_MCE_KBD_DECODER=m -CONFIG_IR_LIRC_CODEC=m -CONFIG_IR_IMON=m -CONFIG_IR_MCEUSB=m -CONFIG_IR_REDRAT3=m -CONFIG_IR_STREAMZAP=m -CONFIG_RC_LOOPBACK=m -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_XC4000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_MEDIA_TUNER_TDA18218=m -CONFIG_MEDIA_TUNER_TDA18212=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEOBUF2_CORE=y -CONFIG_VIDEOBUF2_MEMOPS=y -CONFIG_VIDEOBUF2_DMA_CONTIG=y -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders, decoders, sensors and other helper chips -# - -# -# Audio decoders, processors and mixers -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA7191 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_TVP7002 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_SAA717X is not set -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_AK881X is not set - -# -# Camera sensor devices -# -# CONFIG_VIDEO_OV7670 is not set -CONFIG_VIDEO_OV5640=y -CONFIG_VIDEO_OV5650=y -# CONFIG_VIDEO_MT9P031 is not set -# CONFIG_VIDEO_MT9T001 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V032 is not set -# CONFIG_VIDEO_TCM825X is not set - -# -# Flash devices -# -# CONFIG_VIDEO_ADP1653 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set - -# -# Miscelaneous helper chips -# -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -CONFIG_VIDEO_OMAP2_VOUT_VRFB=y -CONFIG_VIDEO_OMAP2_VOUT=y -CONFIG_VIDEO_BWQCAM=m -CONFIG_VIDEO_CQCAM=m -CONFIG_VIDEO_W9966=m -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_TIMBERDALE is not set -CONFIG_VIDEO_AU0828=m -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_M5MOLS is not set -# CONFIG_VIDEO_OMAP3 is not set -CONFIG_VIDEO_OMAP4=y -CONFIG_VIDEO_OMAP4_DEBUG=y -CONFIG_SOC_CAMERA=m -# CONFIG_SOC_CAMERA_IMX074 is not set -CONFIG_SOC_CAMERA_MT9M001=m -CONFIG_SOC_CAMERA_MT9M111=m -CONFIG_SOC_CAMERA_MT9T031=m -CONFIG_SOC_CAMERA_MT9T112=m -CONFIG_SOC_CAMERA_MT9V022=m -CONFIG_SOC_CAMERA_RJ54N1=m -CONFIG_SOC_CAMERA_TW9910=m -CONFIG_SOC_CAMERA_PLATFORM=m -# CONFIG_SOC_CAMERA_OV2640 is not set -# CONFIG_SOC_CAMERA_OV5642 is not set -# CONFIG_SOC_CAMERA_OV6650 is not set -CONFIG_SOC_CAMERA_OV772X=m -CONFIG_SOC_CAMERA_OV9640=m -# CONFIG_SOC_CAMERA_OV9740 is not set -# CONFIG_VIDEO_SH_MOBILE_CSI2 is not set -CONFIG_VIDEO_SH_MOBILE_CEU=m -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -CONFIG_USB_GL860=m -CONFIG_USB_GSPCA_BENQ=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_CPIA1=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -CONFIG_USB_GSPCA_JEILINJ=m -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -CONFIG_USB_GSPCA_MARS=m -CONFIG_USB_GSPCA_MR97310A=m -# CONFIG_USB_GSPCA_NW80X is not set -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_OV534_9=m -CONFIG_USB_GSPCA_PAC207=m -CONFIG_USB_GSPCA_PAC7302=m -CONFIG_USB_GSPCA_PAC7311=m -# CONFIG_USB_GSPCA_SE401 is not set -CONFIG_USB_GSPCA_SN9C2028=m -CONFIG_USB_GSPCA_SN9C20X=m -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -# CONFIG_USB_GSPCA_SPCA1528 is not set -CONFIG_USB_GSPCA_SQ905=m -CONFIG_USB_GSPCA_SQ905C=m -# CONFIG_USB_GSPCA_SQ930X is not set -CONFIG_USB_GSPCA_STK014=m -CONFIG_USB_GSPCA_STV0680=m -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_EM28XX_RC=y -CONFIG_VIDEO_TLG2300=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_RC=y -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_USB_ET61X251=m -CONFIG_USB_SN9C102=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -# CONFIG_V4L_MEM2MEM_DRIVERS is not set -CONFIG_RADIO_ADAPTERS=y -CONFIG_I2C_SI4713=m -CONFIG_RADIO_SI4713=m -CONFIG_USB_DSBR=m -CONFIG_RADIO_SI470X=y -CONFIG_USB_SI470X=m -CONFIG_I2C_SI470X=m -CONFIG_USB_MR800=m -CONFIG_RADIO_TEA5764=m -CONFIG_RADIO_SAA7706H=m -CONFIG_RADIO_TEF6862=m -CONFIG_RADIO_WL1273=y - -# -# Texas Instruments WL128x FM driver (ST based) -# -CONFIG_RADIO_WL128X=m -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_EC168=m -CONFIG_DVB_USB_AZ6027=m -# CONFIG_DVB_USB_LME2510 is not set -# CONFIG_DVB_USB_TECHNISAT_USB2 is not set -CONFIG_SMS_SIANO_MDTV=m - -# -# Siano module components -# -CONFIG_SMS_USB_DRV=m -CONFIG_SMS_SDIO_DRV=m - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set - -# -# Multistandard (satellite) frontends -# -CONFIG_DVB_STB0899=m -CONFIG_DVB_STB6100=m - -# -# Multistandard (cable + terrestrial) frontends -# -CONFIG_DVB_DRXK=m -CONFIG_DVB_TDA18271C2DD=m - -# -# DVB-S (satellite) frontends -# -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_DS3000=m - -# -# DVB-T (terrestrial) frontends -# -CONFIG_DVB_CX22702=m -CONFIG_DVB_DRXD=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_CXD2820R=m - -# -# DVB-C (cable) frontends -# -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m - -# -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends -# -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_AU8522=m -CONFIG_DVB_S5H1411=m - -# -# ISDB-T (terrestrial) frontends -# -CONFIG_DVB_S921=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_MB86A20S=m - -# -# Digital terrestrial only tuners/PLL -# -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_TUNER_DIB0090=m - -# -# SEC control devices for DVB-S -# -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_ISL6423=m -CONFIG_DVB_LGS8GXX=m -CONFIG_DVB_ATBM8830=m - -# -# Tools to develop new frontends -# -# CONFIG_DVB_DUMMY_FE is not set -CONFIG_HAVE_TI_TILER=y -CONFIG_TI_TILER=y -CONFIG_TILER_GRANULARITY=128 -CONFIG_TILER_ALIGNMENT=4096 -CONFIG_TILER_CACHE_LIMIT=40 -CONFIG_TILER_SECURITY=1 -CONFIG_TILER_SSPTR_ID=1 -# CONFIG_TILER_SECURE is not set -CONFIG_TILER_EXPOSE_SSPTR=y -CONFIG_TILER_ENABLE_NV12=y -CONFIG_TILER_ENABLE_USERSPACE=y - -# -# Graphics support -# -CONFIG_DRM=y -CONFIG_DRM_KMS_HELPER=y -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=m -CONFIG_FB_CFB_COPYAREA=m -CONFIG_FB_CFB_IMAGEBLIT=m -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_IMAGEBLIT=y -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y -# CONFIG_FB_WMT_GE_ROPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_ARMCLCD is not set -# CONFIG_FB_UVESA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_SM501 is not set -CONFIG_FB_UDL=m -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_BROADSHEET is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=32 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set -CONFIG_OMAP2_DSS_DPI=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP4_DSS_HDMI=y -CONFIG_OMAP2_DSS_SDI=y -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_FAKE_VSYNC=y -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC_DPI=y -# CONFIG_PANEL_DVI is not set -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_PANEL_NEC_NL8048HL11_01B is not set -# CONFIG_PANEL_PICODLP is not set -CONFIG_PANEL_TAAL=y -# CONFIG_PANEL_TPO_TD043MTEA1 is not set -# CONFIG_PANEL_ACX565AKM is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_L4F00242T03 is not set -CONFIG_LCD_LMS283GF05=m -CONFIG_LCD_LTV350QV=m -CONFIG_LCD_ILI9320=m -CONFIG_LCD_TDO24M=m -CONFIG_LCD_VGG2432A4=m -CONFIG_LCD_PLATFORM=m -# CONFIG_LCD_S6E63M0 is not set -# CONFIG_LCD_LD9040 is not set -# CONFIG_LCD_AMS369FG06 is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -# CONFIG_BACKLIGHT_PWM is not set -CONFIG_BACKLIGHT_DA903X=m -CONFIG_BACKLIGHT_ADP5520=m -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_PCF50633 is not set - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -# CONFIG_FONT_6x11 is not set -# CONFIG_FONT_7x14 is not set -# CONFIG_FONT_PEARL_8x8 is not set -# CONFIG_FONT_ACORN_8x8 is not set -# CONFIG_FONT_MINI_4x6 is not set -# CONFIG_FONT_SUN8x16 is not set -# CONFIG_FONT_SUN12x22 is not set -# CONFIG_FONT_10x18 is not set -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_PCM_OSS_PLUGINS=y -# CONFIG_SND_HRTIMER is not set -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_ALOOP is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_MTS64 is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_PORTMAN2X4 is not set -CONFIG_SND_ARM=y -# CONFIG_SND_ARMAACI is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_UA101=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -# CONFIG_SND_USB_6FIRE is not set -CONFIG_SND_SOC=y -# CONFIG_SND_SOC_CACHE_LZO is not set -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_ABE_DSP=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_MCPDM=y -CONFIG_SND_OMAP_SOC_HDMI=y -CONFIG_SND_OMAP_SOC_ABE=y -CONFIG_SND_OMAP_SOC_DMIC=y -CONFIG_SND_OMAP_SOC_SDP4430=y -CONFIG_SND_OMAP_SOC_OMAP4_HDMI=y -CONFIG_SND_SOC_I2C_AND_SPI=y -CONFIG_SND_SOC_ALL_CODECS=m -CONFIG_SND_SOC_WM_HUBS=m -CONFIG_SND_SOC_AD1836=m -CONFIG_SND_SOC_AD193X=m -CONFIG_SND_SOC_AD73311=m -CONFIG_SND_SOC_ADAU1373=m -CONFIG_SND_SOC_ADAV80X=m -CONFIG_SND_SOC_ADS117X=m -CONFIG_SND_SOC_AK4104=m -CONFIG_SND_SOC_AK4535=m -CONFIG_SND_SOC_AK4641=m -CONFIG_SND_SOC_AK4642=m -CONFIG_SND_SOC_AK4671=m -CONFIG_SND_SOC_ALC5623=m -CONFIG_SND_SOC_CS42L51=m -CONFIG_SND_SOC_CS4270=m -CONFIG_SND_SOC_CS4271=m -CONFIG_SND_SOC_CX20442=m -CONFIG_SND_SOC_L3=m -CONFIG_SND_SOC_DA7210=m -CONFIG_SND_SOC_DFBMCS320=m -CONFIG_SND_SOC_DMIC=y -CONFIG_SND_SOC_MAX98088=m -CONFIG_SND_SOC_MAX98095=m -CONFIG_SND_SOC_MAX9850=m -CONFIG_SND_SOC_PCM3008=m -CONFIG_SND_SOC_RT5631=m -CONFIG_SND_SOC_SGTL5000=m -CONFIG_SND_SOC_SPDIF=m -CONFIG_SND_SOC_SSM2602=m -CONFIG_SND_SOC_STA32X=m -CONFIG_SND_SOC_TLV320AIC23=m -CONFIG_SND_SOC_TLV320AIC26=m -CONFIG_SND_SOC_TLV320AIC32X4=m -CONFIG_SND_SOC_TLV320AIC3X=m -CONFIG_SND_SOC_TLV320DAC33=m -CONFIG_SND_SOC_TWL4030=m -CONFIG_SND_SOC_TWL6040=y -CONFIG_SND_SOC_UDA134X=m -CONFIG_SND_SOC_UDA1380=m -CONFIG_SND_SOC_WL1273=m -CONFIG_SND_SOC_WM1250_EV1=m -CONFIG_SND_SOC_WM5100=m -CONFIG_SND_SOC_WM8400=m -CONFIG_SND_SOC_WM8510=m -CONFIG_SND_SOC_WM8523=m -CONFIG_SND_SOC_WM8580=m -CONFIG_SND_SOC_WM8711=m -CONFIG_SND_SOC_WM8727=m -CONFIG_SND_SOC_WM8728=m -CONFIG_SND_SOC_WM8731=m -CONFIG_SND_SOC_WM8737=m -CONFIG_SND_SOC_WM8741=m -CONFIG_SND_SOC_WM8750=m -CONFIG_SND_SOC_WM8753=m -CONFIG_SND_SOC_WM8770=m -CONFIG_SND_SOC_WM8776=m -CONFIG_SND_SOC_WM8782=m -CONFIG_SND_SOC_WM8804=m -CONFIG_SND_SOC_WM8900=m -CONFIG_SND_SOC_WM8903=m -CONFIG_SND_SOC_WM8904=m -CONFIG_SND_SOC_WM8940=m -CONFIG_SND_SOC_WM8955=m -CONFIG_SND_SOC_WM8960=m -CONFIG_SND_SOC_WM8961=m -CONFIG_SND_SOC_WM8962=m -CONFIG_SND_SOC_WM8971=m -CONFIG_SND_SOC_WM8974=m -CONFIG_SND_SOC_WM8978=m -CONFIG_SND_SOC_WM8983=m -CONFIG_SND_SOC_WM8985=m -CONFIG_SND_SOC_WM8988=m -CONFIG_SND_SOC_WM8990=m -CONFIG_SND_SOC_WM8991=m -CONFIG_SND_SOC_WM8993=m -CONFIG_SND_SOC_WM8995=m -CONFIG_SND_SOC_WM8996=m -CONFIG_SND_SOC_WM9081=m -CONFIG_SND_SOC_LM4857=m -CONFIG_SND_SOC_MAX9877=m -CONFIG_SND_SOC_TPA6130A2=m -CONFIG_SND_SOC_WM2000=m -CONFIG_SND_SOC_WM9090=m -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -CONFIG_HIDRAW=y - -# -# USB Input Devices -# -CONFIG_USB_HID=y -CONFIG_HID_PID=y -CONFIG_USB_HIDDEV=y - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=m -# CONFIG_HID_ACRUX is not set -CONFIG_HID_APPLE=m -CONFIG_HID_BELKIN=m -CONFIG_HID_CHERRY=m -CONFIG_HID_CHICONY=m -# CONFIG_HID_PRODIKEYS is not set -CONFIG_HID_CYPRESS=m -CONFIG_HID_DRAGONRISE=m -CONFIG_DRAGONRISE_FF=y -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELECOM is not set -CONFIG_HID_EZKEY=m -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_KEYTOUCH is not set -CONFIG_HID_KYE=m -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -CONFIG_HID_GYRATION=m -CONFIG_HID_TWINHAN=m -CONFIG_HID_KENSINGTON=m -# CONFIG_HID_LCPOWER is not set -CONFIG_HID_LOGITECH=m -CONFIG_LOGITECH_FF=y -CONFIG_LOGIRUMBLEPAD2_FF=y -CONFIG_LOGIG940_FF=y -# CONFIG_LOGIWII_FF is not set -# CONFIG_HID_MAGICMOUSE is not set -CONFIG_HID_MICROSOFT=m -CONFIG_HID_MONTEREY=m -# CONFIG_HID_MULTITOUCH is not set -CONFIG_HID_NTRIG=m -CONFIG_HID_ORTEK=m -CONFIG_HID_PANTHERLORD=m -CONFIG_PANTHERLORD_FF=y -CONFIG_HID_PETALYNX=m -# CONFIG_HID_PICOLCD is not set -CONFIG_HID_QUANTA=m -# CONFIG_HID_ROCCAT is not set -CONFIG_HID_SAMSUNG=m -CONFIG_HID_SONY=m -# CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SUNPLUS=m -CONFIG_HID_GREENASIA=m -CONFIG_GREENASIA_FF=y -CONFIG_HID_SMARTJOYPLUS=m -CONFIG_SMARTJOYPLUS_FF=y -CONFIG_HID_TOPSEED=m -CONFIG_HID_THRUSTMASTER=m -CONFIG_THRUSTMASTER_FF=y -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WIIMOTE is not set -CONFIG_HID_ZEROPLUS=m -CONFIG_ZEROPLUS_FF=y -# CONFIG_HID_ZYDACRON is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=m -CONFIG_USB_WUSB=m -CONFIG_USB_WUSB_CBAF=m -# CONFIG_USB_WUSB_CBAF_DEBUG is not set - -# -# USB Host Controller Drivers -# -CONFIG_USB_C67X00_HCD=m -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -CONFIG_USB_EHCI_HCD_OMAP=y -CONFIG_USB_OXU210HP_HCD=m -CONFIG_USB_ISP116X_HCD=m -CONFIG_USB_ISP1760_HCD=m -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_OMAP3=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_U132_HCD is not set -CONFIG_USB_SL811_HCD=m -# CONFIG_USB_SL811_HCD_ISO is not set -CONFIG_USB_R8A66597_HCD=m -CONFIG_USB_HWA_HCD=m -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_TUSB6010 is not set -CONFIG_USB_MUSB_OMAP2PLUS=y -# CONFIG_USB_MUSB_AM35X is not set -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_UX500_DMA is not set -CONFIG_USB_INVENTRA_DMA=y -# CONFIG_USB_TI_CPPI_DMA is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -CONFIG_USB_STORAGE_DATAFAB=m -CONFIG_USB_STORAGE_FREECOM=m -CONFIG_USB_STORAGE_ISD200=m -CONFIG_USB_STORAGE_USBAT=m -CONFIG_USB_STORAGE_SDDR09=m -CONFIG_USB_STORAGE_SDDR55=m -CONFIG_USB_STORAGE_JUMPSHOT=m -CONFIG_USB_STORAGE_ALAUDA=m -CONFIG_USB_STORAGE_ONETOUCH=m -CONFIG_USB_STORAGE_KARMA=m -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_UAS is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -CONFIG_USB_MDC800=m -CONFIG_USB_MICROTEK=m - -# -# USB port drivers -# -CONFIG_USB_USS720=m -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CP210X=m -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -# CONFIG_USB_SERIAL_MOS7715_PARPORT is not set -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QCAUX=m -CONFIG_USB_SERIAL_QUALCOMM=m -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -CONFIG_USB_SERIAL_SYMBOL=m -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m -# CONFIG_USB_SERIAL_ZIO is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_ADUTUX=m -CONFIG_USB_SEVSEG=m -CONFIG_USB_RIO500=m -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -CONFIG_USB_APPLEDISPLAY=m -CONFIG_USB_SISUSBVGA=m -# CONFIG_USB_SISUSBVGA_CON is not set -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -CONFIG_USB_IOWARRIOR=m -CONFIG_USB_TEST=m -CONFIG_USB_ISIGHTFW=m -# CONFIG_USB_YUREX is not set -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -# CONFIG_USB_FUSB300 is not set -# CONFIG_USB_OMAP is not set -# CONFIG_USB_R8A66597 is not set -CONFIG_USB_GADGET_MUSB_HDRC=y -# CONFIG_USB_M66592 is not set -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -CONFIG_USB_ZERO=m -# CONFIG_USB_ZERO_HNPTEST is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_ETH is not set -CONFIG_USB_G_NCM=m -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FUNCTIONFS is not set -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -CONFIG_USB_MASS_STORAGE=m -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_USB_G_NOKIA=m -CONFIG_USB_G_MULTI=m -CONFIG_USB_G_MULTI_RNDIS=y -CONFIG_USB_G_MULTI_CDC=y -CONFIG_USB_G_HID=m -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_WEBCAM is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=m -CONFIG_USB_ULPI=y -CONFIG_TWL4030_USB=y -CONFIG_TWL6030_USB=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_UWB=m -CONFIG_UWB_HWA=m -CONFIG_UWB_I1480U=m -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y -# CONFIG_MMC_CLKGATE is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=8 -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_ARMMMCI is not set -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_SDHCI_PXAV3 is not set -# CONFIG_MMC_SDHCI_PXAV2 is not set -CONFIG_MMC_OMAP=y -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_TMIO is not set -# CONFIG_MMC_DW is not set -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_LM3530 is not set -CONFIG_LEDS_PCA9532=m -# CONFIG_LEDS_PCA9532_GPIO is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_LP3944=m -# CONFIG_LEDS_LP5521 is not set -# CONFIG_LEDS_LP5523 is not set -CONFIG_LEDS_PCA955X=m -CONFIG_LEDS_DA903X=m -CONFIG_LEDS_DAC124S085=m -CONFIG_LEDS_PWM=y -CONFIG_LEDS_REGULATOR=m -CONFIG_LEDS_BD2802=m -CONFIG_LEDS_LT3593=m -CONFIG_LEDS_ADP5520=m -CONFIG_LEDS_ASIC3=y -CONFIG_LEDS_TRIGGERS=y - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=m -CONFIG_RTC_DRV_DS1374=m -CONFIG_RTC_DRV_DS1672=m -# CONFIG_RTC_DRV_DS3232 is not set -CONFIG_RTC_DRV_MAX6900=m -CONFIG_RTC_DRV_RS5C372=m -CONFIG_RTC_DRV_ISL1208=m -# CONFIG_RTC_DRV_ISL12022 is not set -CONFIG_RTC_DRV_X1205=m -CONFIG_RTC_DRV_PCF8563=m -CONFIG_RTC_DRV_PCF8583=m -CONFIG_RTC_DRV_M41T80=m -CONFIG_RTC_DRV_M41T80_WDT=y -CONFIG_RTC_DRV_BQ32K=m -CONFIG_RTC_DRV_TWL4030=y -CONFIG_RTC_DRV_S35390A=m -CONFIG_RTC_DRV_FM3130=m -CONFIG_RTC_DRV_RX8581=m -CONFIG_RTC_DRV_RX8025=m -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T93 is not set -CONFIG_RTC_DRV_M41T94=m -CONFIG_RTC_DRV_DS1305=m -CONFIG_RTC_DRV_DS1390=m -CONFIG_RTC_DRV_MAX6902=m -CONFIG_RTC_DRV_R9701=m -CONFIG_RTC_DRV_RS5C348=m -CONFIG_RTC_DRV_DS3234=m -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -CONFIG_RTC_DRV_CMOS=m -CONFIG_RTC_DRV_DS1286=m -CONFIG_RTC_DRV_DS1511=m -CONFIG_RTC_DRV_DS1553=m -CONFIG_RTC_DRV_DS1742=m -CONFIG_RTC_DRV_STK17TA8=m -CONFIG_RTC_DRV_M48T86=m -CONFIG_RTC_DRV_M48T35=m -CONFIG_RTC_DRV_M48T59=m -CONFIG_RTC_DRV_MSM6242=m -CONFIG_RTC_DRV_BQ4802=m -CONFIG_RTC_DRV_RP5C01=m -CONFIG_RTC_DRV_V3020=m -CONFIG_RTC_DRV_PCF50633=m - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_PL030 is not set -# CONFIG_RTC_DRV_PL031 is not set -# CONFIG_RTC_DRV_PCAP is not set -CONFIG_DMADEVICES=y -# CONFIG_DMADEVICES_DEBUG is not set - -# -# DMA Devices -# -# CONFIG_AMBA_PL08X is not set -# CONFIG_DW_DMAC is not set -# CONFIG_TIMB_DMA is not set -CONFIG_AUXDISPLAY=y -CONFIG_UIO=y -CONFIG_UIO_PDRV=y -CONFIG_UIO_PDRV_GENIRQ=m - -# -# Virtio drivers -# -# CONFIG_VIRTIO_BALLOON is not set -CONFIG_STAGING=y -# CONFIG_VIDEO_TM6000 is not set -# CONFIG_USBIP_CORE is not set -CONFIG_W35UND=m -# CONFIG_PRISM2_USB is not set -CONFIG_ECHO=m -# CONFIG_BRCMUTIL is not set -CONFIG_ASUS_OLED=m -CONFIG_PANEL=m -CONFIG_PANEL_PARPORT=0 -CONFIG_PANEL_PROFILE=5 -# CONFIG_PANEL_CHANGE_MESSAGE is not set -# CONFIG_R8712U is not set -CONFIG_TRANZPORT=m -CONFIG_POHMELFS=m -# CONFIG_POHMELFS_DEBUG is not set -CONFIG_POHMELFS_CRYPTO=y -# CONFIG_LINE6_USB is not set - -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -CONFIG_IIO=y -# CONFIG_IIO_RING_BUFFER is not set -# CONFIG_IIO_TRIGGER is not set - -# -# Accelerometers -# -# CONFIG_ADIS16201 is not set -# CONFIG_ADIS16203 is not set -# CONFIG_ADIS16204 is not set -# CONFIG_ADIS16209 is not set -# CONFIG_ADIS16220 is not set -# CONFIG_ADIS16240 is not set -# CONFIG_KXSD9 is not set -# CONFIG_LIS3L02DQ is not set - -# -# Analog to digital convertors -# -# CONFIG_AD7150 is not set -# CONFIG_AD7152 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7298 is not set -# CONFIG_AD7314 is not set -# CONFIG_AD7606 is not set -# CONFIG_AD799X is not set -# CONFIG_AD7476 is not set -# CONFIG_AD7887 is not set -# CONFIG_AD7780 is not set -# CONFIG_AD7793 is not set -# CONFIG_AD7745 is not set -# CONFIG_AD7816 is not set -# CONFIG_ADT75 is not set -# CONFIG_ADT7310 is not set -# CONFIG_ADT7410 is not set -# CONFIG_MAX1363 is not set - -# -# Analog digital bi-direction convertors -# -# CONFIG_ADT7316 is not set - -# -# Digital to analog convertors -# -# CONFIG_AD5624R_SPI is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5504 is not set -# CONFIG_AD5791 is not set -# CONFIG_AD5686 is not set -# CONFIG_MAX517 is not set - -# -# Direct Digital Synthesis -# -# CONFIG_AD5930 is not set -# CONFIG_AD9832 is not set -# CONFIG_AD9834 is not set -# CONFIG_AD9850 is not set -# CONFIG_AD9852 is not set -# CONFIG_AD9910 is not set -# CONFIG_AD9951 is not set - -# -# Digital gyroscope sensors -# -# CONFIG_ADIS16060 is not set -# CONFIG_ADIS16080 is not set -# CONFIG_ADIS16130 is not set -# CONFIG_ADIS16260 is not set -# CONFIG_ADXRS450 is not set - -# -# Inertial measurement units -# -# CONFIG_ADIS16400 is not set - -# -# Light sensors -# -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_TSL2583 is not set - -# -# Magnetometer sensors -# -# CONFIG_SENSORS_AK8975 is not set -CONFIG_SENSORS_HMC5843=m - -# -# Active energy metering IC -# -# CONFIG_ADE7753 is not set -# CONFIG_ADE7754 is not set -# CONFIG_ADE7758 is not set -# CONFIG_ADE7759 is not set -# CONFIG_ADE7854 is not set - -# -# Resolver to digital converters -# -# CONFIG_AD2S90 is not set -# CONFIG_AD2S120X is not set -# CONFIG_AD2S1210 is not set - -# -# Triggers - standalone -# -# CONFIG_XVMALLOC is not set -# CONFIG_ZRAM is not set -CONFIG_FB_SM7XX=m -CONFIG_LIRC_STAGING=y -CONFIG_LIRC_IGORPLUGUSB=m -CONFIG_LIRC_IMON=m -CONFIG_LIRC_PARALLEL=m -CONFIG_LIRC_SASEM=m -CONFIG_LIRC_SERIAL=m -CONFIG_LIRC_SERIAL_TRANSMITTER=y -CONFIG_LIRC_SIR=m -CONFIG_LIRC_TTUSBIR=m -CONFIG_LIRC_ZILOG=m -# CONFIG_EASYCAP is not set -# CONFIG_TIDSPBRIDGE is not set -# CONFIG_ATH6K_LEGACY is not set -# CONFIG_USB_ENESTORAGE is not set -# CONFIG_BCM_WIMAX is not set -# CONFIG_FT1000 is not set - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set -# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set -# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set -# CONFIG_ALTERA_STAPL is not set -CONFIG_THERMAL_FRAMEWORK=y -CONFIG_OMAP_THERMAL=y -CONFIG_OMAP_DIE_GOVERNOR=y -CONFIG_DRM_OMAP=y -CONFIG_DRM_OMAP_NUM_CRTCS=3 -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HWSPINLOCK=y -CONFIG_HWSPINLOCK_OMAP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_IOMMU_SUPPORT=y -# CONFIG_VIRT_DRIVERS is not set -CONFIG_Sys_Link=y -CONFIG_SYSLINK_PROC=y -CONFIG_SYSLINK_PROC4430=y -CONFIG_DUCATI_BASEIMAGE_PHYS_ADDR=0x9CF00000 -CONFIG_SYSLINK_DUCATI_PM=y -# CONFIG_SYSLINK_IPU_SELF_HIBERNATION is not set -# CONFIG_SYSLINK_IPU_PM_TRACES is not set -CONFIG_OMAP_DEVICE_HANDLER=y -CONFIG_MPU_SYSLINK_PLATFORM=y -CONFIG_MPU_SYSLINK_IPC=y -CONFIG_SYSLINK_USE_SYSMGR=y -CONFIG_SYSLINK_IOMMU_ENABLE=y -CONFIG_SYSLINK_RECOVERY=y -# CONFIG_DMM_DMA_API is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -CONFIG_REISERFS_FS_SECURITY=y -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -CONFIG_JFS_SECURITY=y -# CONFIG_JFS_DEBUG is not set -CONFIG_JFS_STATISTICS=y -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_POSIX_ACL=y -CONFIG_XFS_RT=y -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -CONFIG_GFS2_FS_LOCKING_DLM=y -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -CONFIG_NILFS2_FS=m -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=m -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_FANOTIFY is not set -CONFIG_QUOTA=y -CONFIG_QUOTA_NETLINK_INTERFACE=y -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -CONFIG_QUOTA_TREE=y -CONFIG_QFMT_V1=m -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m -CONFIG_CUSE=m -CONFIG_GENERIC_ACL=y - -# -# Caches -# -CONFIG_FSCACHE=m -# CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_HISTOGRAM is not set -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_FSCACHE_OBJECT_LIST is not set -CONFIG_CACHEFILES=m -# CONFIG_CACHEFILES_DEBUG is not set -# CONFIG_CACHEFILES_HISTOGRAM is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_RW is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -CONFIG_ECRYPT_FS=y -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=m -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_LOGFS=m -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=m -# CONFIG_SQUASHFS_XATTR is not set -CONFIG_SQUASHFS_ZLIB=y -# CONFIG_SQUASHFS_LZO is not set -# CONFIG_SQUASHFS_XZ is not set -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -# CONFIG_PSTORE is not set -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -# CONFIG_NFS_USE_NEW_IDMAPPER is not set -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_ACL_SUPPORT=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_CEPH_FS=m -CONFIG_CIFS=m -# CONFIG_CIFS_STATS is not set -CONFIG_CIFS_WEAK_PW_HASH=y -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -# CONFIG_CIFS_DEBUG2 is not set -CONFIG_CIFS_DFS_UPCALL=y -# CONFIG_CIFS_FSCACHE is not set -# CONFIG_CIFS_ACL is not set -CONFIG_NCP_FS=m -CONFIG_NCPFS_PACKET_SIGNING=y -CONFIG_NCPFS_IOCTL_LOCKING=y -CONFIG_NCPFS_STRONG=y -CONFIG_NCPFS_NFS_NS=y -CONFIG_NCPFS_OS2_NS=y -# CONFIG_NCPFS_SMALLDOS is not set -CONFIG_NCPFS_NLS=y -CONFIG_NCPFS_EXTRAS=y -# CONFIG_CODA_FS is not set -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -# CONFIG_AFS_FSCACHE is not set -CONFIG_9P_FS=m -# CONFIG_9P_FSCACHE is not set -# CONFIG_9P_FS_POSIX_ACL is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -CONFIG_ACORN_PARTITION=y -# CONFIG_ACORN_PARTITION_CUMANA is not set -# CONFIG_ACORN_PARTITION_EESOX is not set -CONFIG_ACORN_PARTITION_ICS=y -# CONFIG_ACORN_PARTITION_ADFS is not set -# CONFIG_ACORN_PARTITION_POWERTEC is not set -CONFIG_ACORN_PARTITION_RISCIX=y -CONFIG_OSF_PARTITION=y -CONFIG_AMIGA_PARTITION=y -CONFIG_ATARI_PARTITION=y -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_UNIXWARE_DISKLABEL=y -CONFIG_LDM_PARTITION=y -# CONFIG_LDM_DEBUG is not set -CONFIG_SGI_PARTITION=y -CONFIG_ULTRIX_PARTITION=y -CONFIG_SUN_PARTITION=y -CONFIG_KARMA_PARTITION=y -CONFIG_EFI_PARTITION=y -CONFIG_SYSV68_PARTITION=y -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=m -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_UNUSED_SYMBOLS=y -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_HARDLOCKUP_DETECTOR is not set -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_ATOMIC_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_HIGHMEM is not set -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_REDUCED is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_LIST is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=60 -CONFIG_RCU_CPU_STALL_VERBOSE=y -# CONFIG_KPROBES_SANITY_TEST is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_DEBUG_PER_CPU_MAPS is not set -# CONFIG_LKDTM is not set -# CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y -# CONFIG_DEBUG_PAGEALLOC is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_EVENT_POWER_TRACING_DEPRECATED=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_GENERIC_TRACER=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_KPROBE_EVENT=y -# CONFIG_FTRACE_STARTUP_TEST is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_ASYNC_RAID6_TEST is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_TEST_KSTRTOX=m -CONFIG_STRICT_DEVMEM=y -CONFIG_ARM_UNWIND=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -CONFIG_EARLY_PRINTK=y -# CONFIG_DEBUG_ICEDCC is not set -CONFIG_OC_ETM=y - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -CONFIG_SECURITY_NETWORK=y -# CONFIG_SECURITY_NETWORK_XFRM is not set -CONFIG_SECURITY_PATH=y -CONFIG_LSM_MMAP_MIN_ADDR=0 -CONFIG_SECURITY_SELINUX=y -# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set -# CONFIG_SECURITY_SELINUX_DISABLE is not set -CONFIG_SECURITY_SELINUX_DEVELOP=y -CONFIG_SECURITY_SELINUX_AVC_STATS=y -CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 -# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set -CONFIG_SECURITY_SMACK=y -CONFIG_SECURITY_TOMOYO=y -CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048 -CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024 -# CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set -CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init" -CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init" -# CONFIG_SECURITY_APPARMOR is not set -# CONFIG_IMA is not set -CONFIG_DEFAULT_SECURITY_SELINUX=y -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -# CONFIG_DEFAULT_SECURITY_DAC is not set -CONFIG_DEFAULT_SECURITY="selinux" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=m -CONFIG_CRYPTO_PCOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_PCRYPT=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_VMAC=m - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_ZLIB=m -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_USER_API=m -CONFIG_CRYPTO_USER_API_HASH=m -CONFIG_CRYPTO_USER_API_SKCIPHER=m -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_OMAP_SHAM=m -CONFIG_CRYPTO_DEV_OMAP_AES=m -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_BITREVERSE=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=m -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -# CONFIG_CRC8 is not set -CONFIG_AUDIT_GENERIC=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -# CONFIG_XZ_DEC is not set -# CONFIG_XZ_DEC_BCJ is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_REED_SOLOMON=m -CONFIG_REED_SOLOMON_DEC16=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_BTREE=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_CPU_RMAP=y -CONFIG_NLATTR=y -CONFIG_AVERAGE=y -# CONFIG_CORDIC is not set diff --git a/recipes-kernel/linux/linux-omap4_3.1.0.bb b/recipes-kernel/linux/linux-omap4_3.1.0.bb deleted file mode 100644 index 7e67055..0000000 --- a/recipes-kernel/linux/linux-omap4_3.1.0.bb +++ /dev/null @@ -1,19 +0,0 @@ -COMPATIBLE_MACHINE = "pandaboard" - -require linux.inc - -# The main PR is now using MACHINE_KERNEL_PR, for omap4 see conf/machine/include/omap4.inc -MACHINE_KERNEL_PR_append = "b" - -CORTEXA8FIXUP = "no" - -# ti-ubuntu-3.1.0-1282.11 -SRCREV = "a5c60c099296fcfc0c8fa8085c40883971486512" - -SRC_URI = "git://dev.omapzoom.org/pub/scm/integration/kernel-ubuntu.git;protocol=git;branch=ti-ubuntu-3.1-1282 \ - file://0001-Makefile.fwinst-fix-install-breakage-for-FW-images-r.patch \ - file://add_exec_tracepoint.patch \ - file://defconfig \ - " - -S = "${WORKDIR}/git" -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 4/8] linux-davinci 2.6.32: remove old hawkboard-specific kernel 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko ` (2 preceding siblings ...) 2013-09-28 22:54 ` [PATCH 3/8] linux-omap4-3.1.0: remove old pandaboard-specific kernel Denys Dmytriyenko @ 2013-09-28 22:54 ` Denys Dmytriyenko 2013-09-30 14:33 ` Cooper Jr., Franklin 2013-09-28 22:54 ` [PATCH 5/8] linux-omap-psp-2.6.32: remove old linux-omap3 PSP kernel Denys Dmytriyenko ` (3 subsequent siblings) 7 siblings, 1 reply; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-28 22:54 UTC (permalink / raw) To: meta-ti From: Denys Dmytriyenko <denys@ti.com> * Hawkboard platform is not supported in meta-ti. * Since there no new revs of the kernel, the old recipe can be picked up from Danny or Denzil. Signed-off-by: Denys Dmytriyenko <denys@ti.com> --- ...001-ARM-6329-1-wire-up-sys_accept4-on-ARM.patch | 51 - ...i-Fix-currently-harmless-typo-in-SATA-PHY.patch | 26 - ...create-sys-fs-cgroup-to-mount-cgroupfs-on.patch | 58 - ...ci-ti-Update-SATA-PHY-configuration-RXCDR.patch | 29 - ...001-board-da850-hawk-Disable-NAND-SUBPAGE.patch | 27 - .../linux/linux-davinci/hawkboard/configs/stock | 2630 - .../linux/linux-davinci/hawkboard/defconfig | 2659 - .../linux-davinci/hawkboard/logo_linux_clut224.ppm | 51363 ------------------- .../patch-2.6.33rc4-psp-to-hawkboard.patch | 2775 - ...0001-board-da850-evm-Disable-NAND-SUBPAGE.patch | 29 - .../0001-uio_pruss1-Core-driver-addition.patch | 334 - .../0002-uio_pruss2-Platform-changes.patch | 243 - ...uio_pruss3-Workarounds-put-into-core-code.patch | 45 - .../omapl138/configs/da850_omapl138_defconfig | 1876 - .../configs/da850_omapl138_defconfig_mmcpm_stats | 1917 - .../configs/da850_omapl138_defconfig_nandnommc | 1886 - .../configs/da850_omapl138_defconfig_uivideocap | 1874 - .../configs/da850_omapl138_defconfig_uivideocapdis | 1874 - .../linux/linux-davinci/omapl138/defconfig | 1951 - .../linux-davinci/omapl138/logo_linux_clut224.ppm | 21763 -------- .../linux/linux-davinci/update-mach-types.patch | 160 - recipes-kernel/linux/linux-davinci_git.bb | 56 - 22 files changed, 93626 deletions(-) delete mode 100644 recipes-kernel/linux/linux-davinci/0001-ARM-6329-1-wire-up-sys_accept4-on-ARM.patch delete mode 100644 recipes-kernel/linux/linux-davinci/0001-ahci-ti-Fix-currently-harmless-typo-in-SATA-PHY.patch delete mode 100644 recipes-kernel/linux/linux-davinci/0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch delete mode 100644 recipes-kernel/linux/linux-davinci/0002-ahci-ti-Update-SATA-PHY-configuration-RXCDR.patch delete mode 100644 recipes-kernel/linux/linux-davinci/hawkboard/0001-board-da850-hawk-Disable-NAND-SUBPAGE.patch delete mode 100644 recipes-kernel/linux/linux-davinci/hawkboard/configs/stock delete mode 100644 recipes-kernel/linux/linux-davinci/hawkboard/defconfig delete mode 100644 recipes-kernel/linux/linux-davinci/hawkboard/logo_linux_clut224.ppm delete mode 100644 recipes-kernel/linux/linux-davinci/hawkboard/patch-2.6.33rc4-psp-to-hawkboard.patch delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/0001-board-da850-evm-Disable-NAND-SUBPAGE.patch delete mode 100755 recipes-kernel/linux/linux-davinci/omapl138/0001-uio_pruss1-Core-driver-addition.patch delete mode 100755 recipes-kernel/linux/linux-davinci/omapl138/0002-uio_pruss2-Platform-changes.patch delete mode 100755 recipes-kernel/linux/linux-davinci/omapl138/0003-uio_pruss3-Workarounds-put-into-core-code.patch delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_mmcpm_stats delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_nandnommc delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_uivideocap delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_uivideocapdis delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/defconfig delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/logo_linux_clut224.ppm delete mode 100644 recipes-kernel/linux/linux-davinci/update-mach-types.patch delete mode 100644 recipes-kernel/linux/linux-davinci_git.bb diff --git a/recipes-kernel/linux/linux-davinci/0001-ARM-6329-1-wire-up-sys_accept4-on-ARM.patch b/recipes-kernel/linux/linux-davinci/0001-ARM-6329-1-wire-up-sys_accept4-on-ARM.patch deleted file mode 100644 index 0f4592e..0000000 --- a/recipes-kernel/linux/linux-davinci/0001-ARM-6329-1-wire-up-sys_accept4-on-ARM.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 1415ec63689ef39bcb24b5095941ec4cc884035c Mon Sep 17 00:00:00 2001 -From: Mikael Pettersson <mikpe@it.uu.se> -Date: Sun, 15 Aug 2010 10:47:23 +0100 -Subject: [PATCH 1/2] ARM: 6329/1: wire up sys_accept4() on ARM - -sys_accept4() was added in kernel 2.6.28, but ARM was not updated -to include it. The number and types of parameters is such that -no ARM-specific processing is needed, so wiring up sys_accept4() -just requires defining __NR_accept4 and adding a direct call in -the syscall entry table. - -Tested with an EABI 2.6.35 kernel and Ulrich Drepper's original -accept4() test program, modified to define __NR_accept4 for ARM. - -Using the updated unistd.h also eliminates a warning then building -glibc (2.10.2 and newer) about accept4() being unimplemented. - -Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> -Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> ---- - arch/arm/include/asm/unistd.h | 1 + - arch/arm/kernel/calls.S | 1 + - 2 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h -index dd2bf53..d02cfb6 100644 ---- a/arch/arm/include/asm/unistd.h -+++ b/arch/arm/include/asm/unistd.h -@@ -392,6 +392,7 @@ - #define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363) - #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) - #define __NR_recvmmsg (__NR_SYSCALL_BASE+365) -+#define __NR_accept4 (__NR_SYSCALL_BASE+366) - - /* - * The following SWIs are ARM private. -diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S -index 37ae301..afeb71f 100644 ---- a/arch/arm/kernel/calls.S -+++ b/arch/arm/kernel/calls.S -@@ -375,6 +375,7 @@ - CALL(sys_rt_tgsigqueueinfo) - CALL(sys_perf_event_open) - /* 365 */ CALL(sys_recvmmsg) -+ CALL(sys_accept4) - #ifndef syscalls_counted - .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls - #define syscalls_counted --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-davinci/0001-ahci-ti-Fix-currently-harmless-typo-in-SATA-PHY.patch b/recipes-kernel/linux/linux-davinci/0001-ahci-ti-Fix-currently-harmless-typo-in-SATA-PHY.patch deleted file mode 100644 index 5efc00d..0000000 --- a/recipes-kernel/linux/linux-davinci/0001-ahci-ti-Fix-currently-harmless-typo-in-SATA-PHY.patch +++ /dev/null @@ -1,26 +0,0 @@ -From b0a773f958b03ba77317f8b762d90d3c00269292 Mon Sep 17 00:00:00 2001 -From: Roger Monk <r-monk@ti.com> -Date: Wed, 25 Aug 2010 16:45:46 +0100 -Subject: [PATCH] ahci-ti: Fix (currently harmless) typo in SATA PHY configuration - -Signed-off-by: Roger Monk <r-monk@ti.com> ---- - drivers/ata/ahci-ti.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/ata/ahci-ti.c b/drivers/ata/ahci-ti.c -index 9e36c9d..674b216 100644 ---- a/drivers/ata/ahci-ti.c -+++ b/drivers/ata/ahci-ti.c -@@ -80,7 +80,7 @@ void ata_plat_init (void __iomem *base) - phy_val = PHY_MPY << 0 | PHY_LB << 4 | PHY_LOS << 6 | - PHY_RXINVPAIR << 7 | PHY_RXTERM << 8 | - PHY_RXCDR << 10 | PHY_RXEQ << 13 | -- PHY_RXINVPAIR << 17 | PHY_TXCM << 18 | -+ PHY_TXINVPAIR << 17 | PHY_TXCM << 18 | - PHY_TXSWING << 19 | PHY_TXDE << 22 | - PHY_OVERRIDE << 30 | PHY_ENPLL << 31; - --- -1.6.0.4 - diff --git a/recipes-kernel/linux/linux-davinci/0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch b/recipes-kernel/linux/linux-davinci/0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch deleted file mode 100644 index 37d5fb9..0000000 --- a/recipes-kernel/linux/linux-davinci/0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 787c524fc478068d18eef72f43074b47722e50b0 Mon Sep 17 00:00:00 2001 -From: Greg KH <gregkh@suse.de> -Date: Thu, 5 Aug 2010 13:53:35 -0700 -Subject: [PATCH] cgroupfs: create /sys/fs/cgroup to mount cgroupfs on - -We really shouldn't be asking userspace to create new root filesystems. -So follow along with all of the other in-kernel filesystems, and provide -a mount point in sysfs. - -For cgroupfs, this should be in /sys/fs/cgroup/ This change provides -that mount point when the cgroup filesystem is registered in the kernel. - -Acked-by: Paul Menage <menage@google.com> -Acked-by: Dhaval Giani <dhaval.giani@gmail.com> -Cc: Li Zefan <lizf@cn.fujitsu.com> -Cc: Lennart Poettering <lennart@poettering.net> -Cc: Kay Sievers <kay.sievers@vrfy.org> -Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> ---- - kernel/cgroup.c | 13 ++++++++++++- - 1 files changed, 12 insertions(+), 1 deletions(-) - -diff --git a/kernel/cgroup.c b/kernel/cgroup.c -index 0249f4b..db21dd8 100644 ---- a/kernel/cgroup.c -+++ b/kernel/cgroup.c -@@ -1472,6 +1472,8 @@ static struct file_system_type cgroup_fs_type = { - .kill_sb = cgroup_kill_sb, - }; - -+static struct kobject *cgroup_kobj; -+ - static inline struct cgroup *__d_cgrp(struct dentry *dentry) - { - return dentry->d_fsdata; -@@ -3283,9 +3285,18 @@ int __init cgroup_init(void) - hhead = css_set_hash(init_css_set.subsys); - hlist_add_head(&init_css_set.hlist, hhead); - BUG_ON(!init_root_id(&rootnode)); -+ -+ cgroup_kobj = kobject_create_and_add("cgroup", fs_kobj); -+ if (!cgroup_kobj) { -+ err = -ENOMEM; -+ goto out; -+ } -+ - err = register_filesystem(&cgroup_fs_type); -- if (err < 0) -+ if (err < 0) { -+ kobject_put(cgroup_kobj); - goto out; -+ } - - proc_create("cgroups", 0, NULL, &proc_cgroupstats_operations); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-davinci/0002-ahci-ti-Update-SATA-PHY-configuration-RXCDR.patch b/recipes-kernel/linux/linux-davinci/0002-ahci-ti-Update-SATA-PHY-configuration-RXCDR.patch deleted file mode 100644 index d4ea6ad..0000000 --- a/recipes-kernel/linux/linux-davinci/0002-ahci-ti-Update-SATA-PHY-configuration-RXCDR.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 37a7868b15be9415abd3f57477afc8be956666e6 Mon Sep 17 00:00:00 2001 -From: Roger Monk <r-monk@ti.com> -Date: Wed, 25 Aug 2010 16:46:28 +0100 -Subject: [PATCH] ahci-ti: Update SATA PHY configuration - RXCDR --> 4 - - * Update SATA PHY configuration for Receiver Clock/Data Recovery - * Set to 0x4 = 2nd order, low precision - -Signed-off-by: Roger Monk <r-monk@ti.com> ---- - drivers/ata/ahci-ti.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/ata/ahci-ti.c b/drivers/ata/ahci-ti.c -index 674b216..853d251 100644 ---- a/drivers/ata/ahci-ti.c -+++ b/drivers/ata/ahci-ti.c -@@ -55,7 +55,7 @@ void ata_plat_remove(struct ata_host *host); - #define PHY_LOS 1 /* bit6 1 */ - #define PHY_RXINVPAIR 0 /* bit7 1 */ - #define PHY_RXTERM 0 /* bits9:8 2 */ --#define PHY_RXCDR 0 /* bits12:10 3 */ -+#define PHY_RXCDR 4 /* bits12:10 3 */ - #define PHY_RXEQ 1 /* bits16:13 4 */ - #define PHY_TXINVPAIR 0 /* bit17 1 */ - #define PHY_TXCM 0 /* bit18 1 */ --- -1.6.0.4 - diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/0001-board-da850-hawk-Disable-NAND-SUBPAGE.patch b/recipes-kernel/linux/linux-davinci/hawkboard/0001-board-da850-hawk-Disable-NAND-SUBPAGE.patch deleted file mode 100644 index 4ffe0e1..0000000 --- a/recipes-kernel/linux/linux-davinci/hawkboard/0001-board-da850-hawk-Disable-NAND-SUBPAGE.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 69600e5a42512204bc4eb83a3a459496b049107f Mon Sep 17 00:00:00 2001 -From: Roger Monk <r-monk@ti.com> -Date: Wed, 25 Aug 2010 17:47:16 +0100 -Subject: [PATCH] board-da850-hawk: Disable NAND SUBPAGE - - * This was causing issues with UBI - * Solution/Workaround identified by Caglar Akyuz - now applied locally to board file ---- - arch/arm/mach-davinci/board-da850-hawk.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-davinci/board-da850-hawk.c b/arch/arm/mach-davinci/board-da850-hawk.c -index 87ed017..bbfe32a 100644 ---- a/arch/arm/mach-davinci/board-da850-hawk.c -+++ b/arch/arm/mach-davinci/board-da850-hawk.c -@@ -118,7 +118,7 @@ static struct davinci_nand_pdata da850_hawk_nandflash_data = { - .nr_parts = ARRAY_SIZE(da850_hawk_nandflash_partition), - .ecc_mode = NAND_ECC_HW, - .ecc_bits = 4, -- .options = NAND_USE_FLASH_BBT, -+ .options = NAND_USE_FLASH_BBT | NAND_NO_SUBPAGE_WRITE, - .timing = &da850_hawk_nandflash_timing, - }; - --- -1.6.0.4 - diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/configs/stock b/recipes-kernel/linux/linux-davinci/hawkboard/configs/stock deleted file mode 100644 index b79109b..0000000 --- a/recipes-kernel/linux/linux-davinci/hawkboard/configs/stock +++ /dev/null @@ -1,2630 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc4 -# Tue Mar 2 16:20:04 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -# CONFIG_TASK_XACCT is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -# CONFIG_RD_LZO is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_SLOW_WORK=y -# CONFIG_SLOW_WORK_DEBUG is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=m -CONFIG_IOSCHED_CFQ=m -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -CONFIG_ARCH_DAVINCI=y -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set -CONFIG_CP_INTC=y - -# -# TI DaVinci Implementations -# - -# -# DaVinci Core Type -# -# CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM355 is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set -# CONFIG_ARCH_DAVINCI_DA830 is not set -CONFIG_ARCH_DAVINCI_DA850=y -CONFIG_DA8XX_MAX_SPEED_300=y -# CONFIG_DA8XX_MAX_SPEED_372 is not set -# CONFIG_DA8XX_MAX_SPEED_408 is not set -# CONFIG_DA8XX_MAX_SPEED_456 is not set -CONFIG_ARCH_DAVINCI_DA8XX=y -# CONFIG_ARCH_DAVINCI_DM365 is not set - -# -# DaVinci Board Type -# -CONFIG_MACH_DAVINCI_DA850_EVM=y -CONFIG_DA850_UI_NONE=y -# CONFIG_DA850_UI_RMII is not set -# CONFIG_DA850_UI_CLCD is not set -# CONFIG_DA850_UI_VIDEO_PORT is not set -CONFIG_MACH_OMAPL138_HAWKBOARD=y -CONFIG_DAVINCI_MUX=y -# CONFIG_DAVINCI_MUX_DEBUG is not set -# CONFIG_DAVINCI_MUX_WARNINGS is not set -CONFIG_DAVINCI_RESET_CLOCKS=y -CONFIG_DAVINCI_MCBSP=y -# CONFIG_DAVINCI_MCBSP0 is not set -CONFIG_DAVINCI_MCBSP1=y - -# -# Processor Type -# -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=100 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=m - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CT_ACCT=y -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -CONFIG_NETFILTER_TPROXY=m -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_DSCP=m -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_NOTRACK=m -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_TPROXY=m -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_SOCKET=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_NETFILTER_XT_MATCH_OSF=m -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -# CONFIG_IP_NF_QUEUE is not set -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -# CONFIG_NF_CONNTRACK_IPV6 is not set -# CONFIG_IP6_NF_QUEUE is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -CONFIG_NET_CLS_ROUTE=y -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -CONFIG_CAN_DEV=m -# CONFIG_CAN_CALC_BITTIMING is not set -# CONFIG_CAN_MCP251X is not set -# CONFIG_CAN_SJA1000 is not set - -# -# CAN USB interfaces -# -CONFIG_CAN_EMS_USB=m -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -# CONFIG_IRNET is not set -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -# CONFIG_IRDA_DEBUG is not set - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -# CONFIG_GIRBIL_DONGLE is not set -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -CONFIG_ACT200L_DONGLE=m -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -CONFIG_BT_MRVL=m -CONFIG_BT_MRVL_SDIO=m -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_WIRELESS_OLD_REGULATORY is not set -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=m -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -# CONFIG_MAC80211_RC_PID is not set -CONFIG_MAC80211_RC_MINSTREL=y -# CONFIG_MAC80211_RC_DEFAULT_PID is not set -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -CONFIG_CONNECTOR=m -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=y -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -CONFIG_MTD_NAND_DAVINCI=y -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -CONFIG_MTD_UBI_GLUEBI=m - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_DRBD is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=m -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -CONFIG_SCSI_TGT=m -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=m -CONFIG_CHR_DEV_OSST=m -CONFIG_BLK_DEV_SR=m -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=m -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -CONFIG_ATA=y -# CONFIG_ATA_NONSTANDARD is not set -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_SATA_PMP=y -CONFIG_SATA_AHCI=y -# CONFIG_ATA_SFF is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -CONFIG_ASYNC_RAID6_TEST=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_LOG_USERSPACE=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_MULTIPATH_QL=m -CONFIG_DM_MULTIPATH_ST=m -CONFIG_DM_DELAY=m -CONFIG_DM_UEVENT=y -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_LXT_PHY=y -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -CONFIG_LSI_ET1011C_PHY=y -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set -# CONFIG_IWM is not set -# CONFIG_LIBERTAS is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -CONFIG_RT2800USB=m -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_HT=y -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WL12XX=m -CONFIG_WL1251=m -# CONFIG_WL1251_SPI is not set -CONFIG_WL1251_SDIO=m -CONFIG_WL1271=m -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -# CONFIG_WIMAX_IWMC3200_SDIO is not set -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_CDCETHER=m -CONFIG_USB_NET_CDC_EEM=m -CONFIG_USB_NET_DM9601=m -CONFIG_USB_NET_SMSC95XX=m -CONFIG_USB_NET_GL620A=m -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET=m -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_KC2190 is not set -CONFIG_USB_NET_ZAURUS=m -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -# CONFIG_WAN is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_XTKBD=m -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_TOUCHSCREEN_TPS6507X=y -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_DAVINCI=y -# CONFIG_I2C_DESIGNWARE is not set -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_DAVINCI_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TPS6507x=y -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -# CONFIG_REGULATOR is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_IR_CORE=y -CONFIG_VIDEO_IR=y -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y -CONFIG_VIDEO_DAVINCI_VPIF=y -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_TEF6862 is not set -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_EC168=m -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_STB6100=m -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_DS3000=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GL5=m -CONFIG_DAB=y -CONFIG_USB_DABUSB=m - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_TILEBLITTING=y - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_UVESA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_DAVINCI is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_FB_DA8XX=y -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -# CONFIG_LCD_PLATFORM is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=m -CONFIG_BACKLIGHT_GENERIC=m - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_SEQUENCER_OSS is not set -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_DAVINCI_SOC=y -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DA850_SOC_EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC3X=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -CONFIG_HIDRAW=y - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -CONFIG_USB_HIDDEV=y - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_DYNAMIC_MINORS=y -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=m -CONFIG_USB_WUSB=m -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_DUAL_ROLE is not set -# CONFIG_USB_MUSB_OTG is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_INVENTRA_DMA is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=y -CONFIG_USB_SERIAL_CONSOLE=y -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CP210X=m -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QUALCOMM=m -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -CONFIG_USB_SERIAL_SYMBOL=m -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_ADUTUX=m -CONFIG_USB_SEVSEG=m -CONFIG_USB_RIO500=m -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_BERRY_CHARGE=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -CONFIG_USB_APPLEDISPLAY=m -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -CONFIG_USB_IOWARRIOR=m -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_VST=m -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_UWB=m -# CONFIG_UWB_HWA is not set -# CONFIG_UWB_WLP is not set -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=m -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_DAVINCI=y -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=m -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=m -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_OMAP is not set -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_USB_IP_COMMON is not set -# CONFIG_W35UND is not set -CONFIG_PRISM2_USB=m -# CONFIG_ECHO is not set -CONFIG_OTUS=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -# CONFIG_INPUT_MIMIO is not set -# CONFIG_TRANZPORT is not set - -# -# Qualcomm MSM Camera And Video -# - -# -# Camera Sensor Selection -# -# CONFIG_INPUT_GPIO is not set -# CONFIG_POHMELFS is not set -# CONFIG_PLAN9AUTH is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_FB_UDL is not set - -# -# RAR Register Driver -# -# CONFIG_RAR_REGISTER is not set -# CONFIG_IIO is not set -# CONFIG_RAMZSWAP is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_STRIP is not set -# CONFIG_FB_SM7XX is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=m -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_POSIX_ACL=y -CONFIG_XFS_RT=y -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -# CONFIG_GFS2_FS_LOCKING_DLM is not set -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=m -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m -CONFIG_CUSE=m -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -CONFIG_HFSPLUS_FS=m -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_CRAMFS=y -CONFIG_SQUASHFS=m -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=y -# CONFIG_DLM is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -CONFIG_SLUB_STATS=y -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -CONFIG_FRAME_POINTER=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_LATENCYTOP=y -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -# CONFIG_ARM_UNWIND is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -CONFIG_EARLY_PRINTK=y -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=m -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=m -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=m -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=m -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=m -CONFIG_CRYPTO_MICHAEL_MIC=m -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=m -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=m -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=m -CONFIG_CRC32=y -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/defconfig b/recipes-kernel/linux/linux-davinci/hawkboard/defconfig deleted file mode 100644 index 9bd0545..0000000 --- a/recipes-kernel/linux/linux-davinci/hawkboard/defconfig +++ /dev/null @@ -1,2659 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc4 -# Mon Jun 6 12:36:41 2011 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_RT_GROUP_SCHED=y -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -CONFIG_CGROUPS=y -# CONFIG_CGROUP_DEBUG is not set -CONFIG_CGROUP_NS=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CPUSETS=y -# CONFIG_PROC_PID_CPUSET is not set -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_CGROUP_MEM_RES_CTLR=y -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y -CONFIG_MM_OWNER=y -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -# CONFIG_RD_LZO is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=m -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_SLOW_WORK=y -# CONFIG_SLOW_WORK_DEBUG is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y -# CONFIG_BLK_CGROUP is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=m -CONFIG_IOSCHED_CFQ=m -# CONFIG_CFQ_GROUP_IOSCHED is not set -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -CONFIG_ARCH_DAVINCI=y -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set -CONFIG_CP_INTC=y - -# -# TI DaVinci Implementations -# - -# -# DaVinci Core Type -# -# CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM355 is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set -# CONFIG_ARCH_DAVINCI_DA830 is not set -CONFIG_ARCH_DAVINCI_DA850=y -CONFIG_DA8XX_MAX_SPEED_300=y -# CONFIG_DA8XX_MAX_SPEED_372 is not set -# CONFIG_DA8XX_MAX_SPEED_408 is not set -# CONFIG_DA8XX_MAX_SPEED_456 is not set -CONFIG_ARCH_DAVINCI_DA8XX=y -# CONFIG_ARCH_DAVINCI_DM365 is not set - -# -# DaVinci Board Type -# -CONFIG_MACH_DAVINCI_DA850_EVM=y -CONFIG_DA850_UI_NONE=y -# CONFIG_DA850_UI_RMII is not set -# CONFIG_DA850_UI_CLCD is not set -# CONFIG_DA850_UI_VIDEO_PORT is not set -CONFIG_MACH_OMAPL138_HAWKBOARD=y -CONFIG_DAVINCI_MUX=y -# CONFIG_DAVINCI_MUX_DEBUG is not set -# CONFIG_DAVINCI_MUX_WARNINGS is not set -CONFIG_DAVINCI_RESET_CLOCKS=y -CONFIG_DAVINCI_MCBSP=y -# CONFIG_DAVINCI_MCBSP0 is not set -CONFIG_DAVINCI_MCBSP1=y - -# -# Processor Type -# -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=100 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=m - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CT_ACCT=y -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -CONFIG_NETFILTER_TPROXY=m -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_DSCP=m -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_NOTRACK=m -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_TPROXY=m -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_SOCKET=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_NETFILTER_XT_MATCH_OSF=m -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -# CONFIG_IP_NF_QUEUE is not set -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -# CONFIG_NF_CONNTRACK_IPV6 is not set -# CONFIG_IP6_NF_QUEUE is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -CONFIG_NET_CLS_ROUTE=y -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -CONFIG_CAN_DEV=m -# CONFIG_CAN_CALC_BITTIMING is not set -# CONFIG_CAN_MCP251X is not set -# CONFIG_CAN_SJA1000 is not set - -# -# CAN USB interfaces -# -CONFIG_CAN_EMS_USB=m -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -# CONFIG_IRNET is not set -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -# CONFIG_IRDA_DEBUG is not set - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -# CONFIG_GIRBIL_DONGLE is not set -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -CONFIG_ACT200L_DONGLE=m -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -CONFIG_BT_MRVL=m -CONFIG_BT_MRVL_SDIO=m -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_WIRELESS_OLD_REGULATORY is not set -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=m -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -# CONFIG_MAC80211_RC_PID is not set -CONFIG_MAC80211_RC_MINSTREL=y -# CONFIG_MAC80211_RC_DEFAULT_PID is not set -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -CONFIG_CONNECTOR=m -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=y -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -CONFIG_MTD_NAND_DAVINCI=y -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -CONFIG_MTD_UBI_GLUEBI=m - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_DRBD is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=m -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -CONFIG_SCSI_TGT=m -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=m -CONFIG_CHR_DEV_OSST=m -CONFIG_BLK_DEV_SR=m -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=m -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -CONFIG_ATA=y -# CONFIG_ATA_NONSTANDARD is not set -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_SATA_PMP=y -CONFIG_SATA_AHCI=y -# CONFIG_ATA_SFF is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -CONFIG_ASYNC_RAID6_TEST=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_LOG_USERSPACE=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_MULTIPATH_QL=m -CONFIG_DM_MULTIPATH_ST=m -CONFIG_DM_DELAY=m -CONFIG_DM_UEVENT=y -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_LXT_PHY=y -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -CONFIG_LSI_ET1011C_PHY=y -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set -# CONFIG_IWM is not set -# CONFIG_LIBERTAS is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -CONFIG_RT2800USB=m -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_HT=y -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WL12XX=m -CONFIG_WL1251=m -# CONFIG_WL1251_SPI is not set -CONFIG_WL1251_SDIO=m -CONFIG_WL1271=m -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -# CONFIG_WIMAX_IWMC3200_SDIO is not set -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_CDCETHER=m -CONFIG_USB_NET_CDC_EEM=m -CONFIG_USB_NET_DM9601=m -CONFIG_USB_NET_SMSC95XX=m -CONFIG_USB_NET_GL620A=m -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET=m -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_KC2190 is not set -CONFIG_USB_NET_ZAURUS=m -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -# CONFIG_WAN is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_XTKBD=m -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_TOUCHSCREEN_TPS6507X=y -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_DAVINCI=y -# CONFIG_I2C_DESIGNWARE is not set -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_DAVINCI_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TPS6507x=y -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -# CONFIG_REGULATOR is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_IR_CORE=y -CONFIG_VIDEO_IR=y -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y -CONFIG_VIDEO_DAVINCI_VPIF=y -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_TEF6862 is not set -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_EC168=m -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_STB6100=m -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_DS3000=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GL5=m -CONFIG_DAB=y -CONFIG_USB_DABUSB=m - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_TILEBLITTING=y - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_UVESA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_DAVINCI is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_FB_DA8XX=y -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -# CONFIG_LCD_PLATFORM is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=m -CONFIG_BACKLIGHT_GENERIC=m - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_SEQUENCER_OSS is not set -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_DAVINCI_SOC=y -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DA850_SOC_EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC3X=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -CONFIG_HIDRAW=y - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -CONFIG_USB_HIDDEV=y - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_DYNAMIC_MINORS=y -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=m -CONFIG_USB_WUSB=m -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_DUAL_ROLE is not set -# CONFIG_USB_MUSB_OTG is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_INVENTRA_DMA is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=y -CONFIG_USB_SERIAL_CONSOLE=y -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CP210X=m -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QUALCOMM=m -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -CONFIG_USB_SERIAL_SYMBOL=m -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_ADUTUX=m -CONFIG_USB_SEVSEG=m -CONFIG_USB_RIO500=m -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_BERRY_CHARGE=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -CONFIG_USB_APPLEDISPLAY=m -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -CONFIG_USB_IOWARRIOR=m -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_VST=m -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_UWB=m -# CONFIG_UWB_HWA is not set -# CONFIG_UWB_WLP is not set -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=m -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_DAVINCI=y -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=m -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=m -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_OMAP is not set -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_USB_IP_COMMON is not set -# CONFIG_W35UND is not set -CONFIG_PRISM2_USB=m -# CONFIG_ECHO is not set -CONFIG_OTUS=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -# CONFIG_INPUT_MIMIO is not set -# CONFIG_TRANZPORT is not set - -# -# Qualcomm MSM Camera And Video -# - -# -# Camera Sensor Selection -# -# CONFIG_INPUT_GPIO is not set -# CONFIG_POHMELFS is not set -# CONFIG_PLAN9AUTH is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_FB_UDL is not set - -# -# RAR Register Driver -# -# CONFIG_RAR_REGISTER is not set -# CONFIG_IIO is not set -# CONFIG_RAMZSWAP is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_STRIP is not set -# CONFIG_FB_SM7XX is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=m -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_POSIX_ACL=y -CONFIG_XFS_RT=y -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -# CONFIG_GFS2_FS_LOCKING_DLM is not set -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=m -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=m -CONFIG_CUSE=m -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -CONFIG_HFSPLUS_FS=m -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_CRAMFS=y -CONFIG_SQUASHFS=m -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=y -# CONFIG_DLM is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -CONFIG_SLUB_STATS=y -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -CONFIG_FRAME_POINTER=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_LATENCYTOP=y -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -# CONFIG_ARM_UNWIND is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -CONFIG_EARLY_PRINTK=y -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=m -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=m -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=m -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=m -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=m -CONFIG_CRYPTO_MICHAEL_MIC=m -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=m -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=m -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=m -CONFIG_CRC32=y -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/logo_linux_clut224.ppm b/recipes-kernel/linux/linux-davinci/hawkboard/logo_linux_clut224.ppm deleted file mode 100644 index 984a443..0000000 --- a/recipes-kernel/linux/linux-davinci/hawkboard/logo_linux_clut224.ppm +++ /dev/null @@ -1,51363 +0,0 @@ -P3 -640 480 -255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 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255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 -255 255 255 255 255 255 255 255 255 255 255 255 diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/patch-2.6.33rc4-psp-to-hawkboard.patch b/recipes-kernel/linux/linux-davinci/hawkboard/patch-2.6.33rc4-psp-to-hawkboard.patch deleted file mode 100644 index bd986a5..0000000 --- a/recipes-kernel/linux/linux-davinci/hawkboard/patch-2.6.33rc4-psp-to-hawkboard.patch +++ /dev/null @@ -1,2775 +0,0 @@ -From a9847b4b964b65b8a3f041550c4a15342d151b88 Mon Sep 17 00:00:00 2001 -From: Roger Monk <r-monk@ti.com> -Date: Wed, 19 May 2010 13:43:53 +0100 -Subject: [PATCH] Hawkboard Support: Add Hawkboard (DA850/OMAPL138 based) Board Support - - * Hawkboard(.org) (http://www.hawkboard.org) Board Support - * Support based on DA850_OMAPL138 EVM Board Support - * This board contains the following components - * DA850/OMAPL138/(AM1808) - ARM9 + 674x DSP + PRU + Peripherals - * 128MB DDR2 SDRAM (MT47H64M16HR-3:G) - * 128MB NAND Flash (MT29F1G08ABCHC-ET) - * Video Capture (TVP5147M1) - Composite Video - * Video Display (THS8135) - VGA - * Ethernet (LAN8710A) - * Audio (AIC31xx) - Stereo Audio Codec - * Serial ATA - * SD/MMC - * USB 1.1 (OHCI) (Host/Gadget) - * USB 2.0 (MUSB) (Host) - * Serial Console - * CpuFreq/CpuIdle/PM(Suspend-to-Ram) with RTC wakeup - * TODO - * USB MUSB (host) Disconnect Issues - * USB MUSB (gadget) Config + Testing - * VPIF Capture Driver creates 2 device nodes - * VPIF Capture Driver fails with mplayer tv:// test - * Further Board File Cleanup - * Notes - * RTC not tested - * RTC requires battery populated on hawkboard - * CONFIG_DRV_RTC_OMAP should be disabled if no battery - * No Regulator on hawkboard - CONFIG_REGULATOR should be disabled - * Wake-Up source from pm (suspend-to-ram) is RTC - -Signed-off-by: Roger Monk <r-monk@ti.com> ---- - .../arm/configs/da850_omapl138_hawkboard_defconfig | 1867 ++++++++++++++++++++ - arch/arm/mach-davinci/Kconfig | 7 + - arch/arm/mach-davinci/Makefile | 1 + - arch/arm/mach-davinci/board-da850-hawk.c | 657 +++++++ - arch/arm/mach-davinci/da850.c | 2 +- - arch/arm/mach-davinci/devices-da8xx.c | 8 + - arch/arm/mach-davinci/include/mach/da8xx.h | 2 + - arch/arm/mach-davinci/include/mach/debug-macro.S | 3 +- - drivers/media/video/Kconfig | 4 +- - drivers/video/da8xx-fb.c | 14 + - sound/soc/davinci/Kconfig | 6 +- - sound/soc/davinci/davinci-evm.c | 5 +- - 12 files changed, 2567 insertions(+), 9 deletions(-) - create mode 100644 arch/arm/configs/da850_omapl138_hawkboard_defconfig - create mode 100644 arch/arm/mach-davinci/board-da850-hawk.c - -diff --git a/arch/arm/configs/da850_omapl138_hawkboard_defconfig b/arch/arm/configs/da850_omapl138_hawkboard_defconfig -new file mode 100644 -index 0000000..19fcbdf ---- /dev/null -+++ b/arch/arm/configs/da850_omapl138_hawkboard_defconfig -@@ -0,0 +1,1867 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.33-rc4 -+# Tue Mar 2 15:34:51 2010 -+# -+CONFIG_ARM=y -+CONFIG_SYS_SUPPORTS_APM_EMULATION=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_TIME=y -+CONFIG_GENERIC_CLOCKEVENTS=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_HAVE_LATENCYTOP_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_ARCH_HAS_CPUFREQ=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_ZONE_DMA=y -+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -+CONFIG_VECTORS_BASE=0xffff0000 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+CONFIG_CONSTRUCTORS=y -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_LOCK_KERNEL=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_HAVE_KERNEL_GZIP=y -+CONFIG_HAVE_KERNEL_LZO=y -+CONFIG_KERNEL_GZIP=y -+# CONFIG_KERNEL_BZIP2 is not set -+# CONFIG_KERNEL_LZMA is not set -+# CONFIG_KERNEL_LZO is not set -+CONFIG_SWAP=y -+CONFIG_SYSVIPC=y -+CONFIG_SYSVIPC_SYSCTL=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_POSIX_MQUEUE_SYSCTL=y -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_AUDIT is not set -+ -+# -+# RCU Subsystem -+# -+CONFIG_TREE_RCU=y -+# CONFIG_TREE_PREEMPT_RCU is not set -+# CONFIG_TINY_RCU is not set -+# CONFIG_RCU_TRACE is not set -+CONFIG_RCU_FANOUT=32 -+# CONFIG_RCU_FANOUT_EXACT is not set -+# CONFIG_TREE_RCU_TRACE is not set -+CONFIG_IKCONFIG=y -+CONFIG_IKCONFIG_PROC=y -+CONFIG_LOG_BUF_SHIFT=14 -+CONFIG_GROUP_SCHED=y -+CONFIG_FAIR_GROUP_SCHED=y -+# CONFIG_RT_GROUP_SCHED is not set -+CONFIG_USER_SCHED=y -+# CONFIG_CGROUP_SCHED is not set -+# CONFIG_CGROUPS is not set -+# CONFIG_SYSFS_DEPRECATED_V2 is not set -+# CONFIG_RELAY is not set -+# CONFIG_NAMESPACES is not set -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_RD_GZIP=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_LZO is not set -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_ANON_INODES=y -+CONFIG_EMBEDDED=y -+CONFIG_UID16=y -+CONFIG_SYSCTL_SYSCALL=y -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_EPOLL=y -+CONFIG_SIGNALFD=y -+CONFIG_TIMERFD=y -+CONFIG_EVENTFD=y -+CONFIG_SHMEM=y -+CONFIG_AIO=y -+ -+# -+# Kernel Performance Events And Counters -+# -+CONFIG_VM_EVENT_COUNTERS=y -+CONFIG_SLUB_DEBUG=y -+CONFIG_COMPAT_BRK=y -+# CONFIG_SLAB is not set -+CONFIG_SLUB=y -+# CONFIG_SLOB is not set -+# CONFIG_PROFILING is not set -+CONFIG_HAVE_OPROFILE=y -+# CONFIG_KPROBES is not set -+CONFIG_HAVE_KPROBES=y -+CONFIG_HAVE_KRETPROBES=y -+CONFIG_HAVE_CLK=y -+ -+# -+# GCOV-based kernel profiling -+# -+# CONFIG_GCOV_KERNEL is not set -+# CONFIG_SLOW_WORK is not set -+CONFIG_HAVE_GENERIC_DMA_COHERENT=y -+CONFIG_SLABINFO=y -+CONFIG_RT_MUTEXES=y -+CONFIG_BASE_SMALL=0 -+CONFIG_MODULES=y -+# CONFIG_MODULE_FORCE_LOAD is not set -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODULE_FORCE_UNLOAD=y -+CONFIG_MODVERSIONS=y -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+CONFIG_BLOCK=y -+CONFIG_LBDAF=y -+# CONFIG_BLK_DEV_BSG is not set -+# CONFIG_BLK_DEV_INTEGRITY is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+# CONFIG_IOSCHED_DEADLINE is not set -+# CONFIG_IOSCHED_CFQ is not set -+# CONFIG_DEFAULT_DEADLINE is not set -+# CONFIG_DEFAULT_CFQ is not set -+CONFIG_DEFAULT_NOOP=y -+CONFIG_DEFAULT_IOSCHED="noop" -+# CONFIG_INLINE_SPIN_TRYLOCK is not set -+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -+# CONFIG_INLINE_SPIN_LOCK is not set -+# CONFIG_INLINE_SPIN_LOCK_BH is not set -+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_SPIN_UNLOCK is not set -+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -+# CONFIG_INLINE_READ_TRYLOCK is not set -+# CONFIG_INLINE_READ_LOCK is not set -+# CONFIG_INLINE_READ_LOCK_BH is not set -+# CONFIG_INLINE_READ_LOCK_IRQ is not set -+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_READ_UNLOCK is not set -+# CONFIG_INLINE_READ_UNLOCK_BH is not set -+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -+# CONFIG_INLINE_WRITE_TRYLOCK is not set -+# CONFIG_INLINE_WRITE_LOCK is not set -+# CONFIG_INLINE_WRITE_LOCK_BH is not set -+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_WRITE_UNLOCK is not set -+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -+# CONFIG_MUTEX_SPIN_ON_OWNER is not set -+CONFIG_FREEZER=y -+ -+# -+# System Type -+# -+CONFIG_MMU=y -+# CONFIG_ARCH_AAEC2000 is not set -+# CONFIG_ARCH_INTEGRATOR is not set -+# CONFIG_ARCH_REALVIEW is not set -+# CONFIG_ARCH_VERSATILE is not set -+# CONFIG_ARCH_AT91 is not set -+# CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_GEMINI is not set -+# CONFIG_ARCH_EBSA110 is not set -+# CONFIG_ARCH_EP93XX is not set -+# CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_MXC is not set -+# CONFIG_ARCH_STMP3XXX is not set -+# CONFIG_ARCH_NETX is not set -+# CONFIG_ARCH_H720X is not set -+# CONFIG_ARCH_NOMADIK is not set -+# CONFIG_ARCH_IOP13XX is not set -+# CONFIG_ARCH_IOP32X is not set -+# CONFIG_ARCH_IOP33X is not set -+# CONFIG_ARCH_IXP23XX is not set -+# CONFIG_ARCH_IXP2000 is not set -+# CONFIG_ARCH_IXP4XX is not set -+# CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_DOVE is not set -+# CONFIG_ARCH_KIRKWOOD is not set -+# CONFIG_ARCH_LOKI is not set -+# CONFIG_ARCH_MV78XX0 is not set -+# CONFIG_ARCH_ORION5X is not set -+# CONFIG_ARCH_MMP is not set -+# CONFIG_ARCH_KS8695 is not set -+# CONFIG_ARCH_NS9XXX is not set -+# CONFIG_ARCH_W90X900 is not set -+# CONFIG_ARCH_PNX4008 is not set -+# CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_MSM is not set -+# CONFIG_ARCH_RPC is not set -+# CONFIG_ARCH_SA1100 is not set -+# CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_S3C64XX is not set -+# CONFIG_ARCH_S5PC1XX is not set -+# CONFIG_ARCH_SHARK is not set -+# CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_U300 is not set -+CONFIG_ARCH_DAVINCI=y -+# CONFIG_ARCH_OMAP is not set -+# CONFIG_ARCH_BCMRING is not set -+# CONFIG_ARCH_U8500 is not set -+CONFIG_CP_INTC=y -+ -+# -+# TI DaVinci Implementations -+# -+ -+# -+# DaVinci Core Type -+# -+# CONFIG_ARCH_DAVINCI_DM644x is not set -+# CONFIG_ARCH_DAVINCI_DM355 is not set -+# CONFIG_ARCH_DAVINCI_DM646x is not set -+# CONFIG_ARCH_DAVINCI_DA830 is not set -+CONFIG_ARCH_DAVINCI_DA850=y -+# CONFIG_DA8XX_MAX_SPEED_300 is not set -+# CONFIG_DA8XX_MAX_SPEED_372 is not set -+# CONFIG_DA8XX_MAX_SPEED_408 is not set -+CONFIG_DA8XX_MAX_SPEED_456=y -+CONFIG_ARCH_DAVINCI_DA8XX=y -+# CONFIG_ARCH_DAVINCI_DM365 is not set -+ -+# -+# DaVinci Board Type -+# -+# CONFIG_MACH_DAVINCI_DA850_EVM is not set -+CONFIG_MACH_OMAPL138_HAWKBOARD=y -+CONFIG_DAVINCI_MUX=y -+# CONFIG_DAVINCI_MUX_DEBUG is not set -+# CONFIG_DAVINCI_MUX_WARNINGS is not set -+CONFIG_DAVINCI_RESET_CLOCKS=y -+CONFIG_DAVINCI_MCBSP=y -+# CONFIG_DAVINCI_MCBSP0 is not set -+CONFIG_DAVINCI_MCBSP1=y -+ -+# -+# Processor Type -+# -+CONFIG_CPU_ARM926T=y -+CONFIG_CPU_32v5=y -+CONFIG_CPU_ABRT_EV5TJ=y -+CONFIG_CPU_PABRT_LEGACY=y -+CONFIG_CPU_CACHE_VIVT=y -+CONFIG_CPU_COPY_V4WB=y -+CONFIG_CPU_TLB_V4WBI=y -+CONFIG_CPU_CP15=y -+CONFIG_CPU_CP15_MMU=y -+ -+# -+# Processor Features -+# -+CONFIG_ARM_THUMB=y -+# CONFIG_CPU_ICACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -+CONFIG_ARM_L1_CACHE_SHIFT=5 -+CONFIG_COMMON_CLKDEV=y -+ -+# -+# Bus support -+# -+# CONFIG_PCI_SYSCALL is not set -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+# CONFIG_PCCARD is not set -+ -+# -+# Kernel Features -+# -+CONFIG_TICK_ONESHOT=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -+CONFIG_VMSPLIT_3G=y -+# CONFIG_VMSPLIT_2G is not set -+# CONFIG_VMSPLIT_1G is not set -+CONFIG_PAGE_OFFSET=0xC0000000 -+# CONFIG_PREEMPT_NONE is not set -+# CONFIG_PREEMPT_VOLUNTARY is not set -+CONFIG_PREEMPT=y -+CONFIG_HZ=100 -+CONFIG_AEABI=y -+# CONFIG_OABI_COMPAT is not set -+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -+# CONFIG_HIGHMEM is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+CONFIG_PAGEFLAGS_EXTENDED=y -+CONFIG_SPLIT_PTLOCK_CPUS=999999 -+# CONFIG_PHYS_ADDR_T_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=1 -+CONFIG_BOUNCE=y -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_KSM is not set -+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -+CONFIG_LEDS=y -+# CONFIG_LEDS_CPU is not set -+CONFIG_ALIGNMENT_TRAP=y -+# CONFIG_UACCESS_WITH_MEMCPY is not set -+ -+# -+# Boot options -+# -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE="" -+# CONFIG_XIP_KERNEL is not set -+# CONFIG_KEXEC is not set -+ -+# -+# CPU Power Management -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=y -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_CPU_IDLE=y -+CONFIG_CPU_IDLE_GOV_LADDER=y -+CONFIG_CPU_IDLE_GOV_MENU=y -+ -+# -+# Floating point emulation -+# -+ -+# -+# At least one emulation must be selected -+# -+# CONFIG_VFP is not set -+ -+# -+# Userspace binary formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -+CONFIG_HAVE_AOUT=y -+# CONFIG_BINFMT_AOUT is not set -+# CONFIG_BINFMT_MISC is not set -+ -+# -+# Power management options -+# -+CONFIG_PM=y -+# CONFIG_PM_DEBUG is not set -+CONFIG_PM_SLEEP=y -+CONFIG_SUSPEND=y -+CONFIG_SUSPEND_FREEZER=y -+# CONFIG_APM_EMULATION is not set -+# CONFIG_PM_RUNTIME is not set -+CONFIG_ARCH_SUSPEND_POSSIBLE=y -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+# CONFIG_PACKET_MMAP is not set -+CONFIG_UNIX=y -+CONFIG_XFRM=y -+# CONFIG_XFRM_USER is not set -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_XFRM_MIGRATE is not set -+# CONFIG_XFRM_STATISTICS is not set -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+CONFIG_IP_PNP=y -+CONFIG_IP_PNP_DHCP=y -+# CONFIG_IP_PNP_BOOTP is not set -+# CONFIG_IP_PNP_RARP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+CONFIG_INET_TUNNEL=m -+CONFIG_INET_XFRM_MODE_TRANSPORT=y -+CONFIG_INET_XFRM_MODE_TUNNEL=y -+CONFIG_INET_XFRM_MODE_BEET=y -+# CONFIG_INET_LRO is not set -+CONFIG_INET_DIAG=y -+CONFIG_INET_TCP_DIAG=y -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+CONFIG_IPV6=m -+# CONFIG_IPV6_PRIVACY is not set -+# CONFIG_IPV6_ROUTER_PREF is not set -+# CONFIG_IPV6_OPTIMISTIC_DAD is not set -+# CONFIG_INET6_AH is not set -+# CONFIG_INET6_ESP is not set -+# CONFIG_INET6_IPCOMP is not set -+# CONFIG_IPV6_MIP6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+CONFIG_INET6_XFRM_MODE_TRANSPORT=m -+CONFIG_INET6_XFRM_MODE_TUNNEL=m -+CONFIG_INET6_XFRM_MODE_BEET=m -+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -+CONFIG_IPV6_SIT=m -+# CONFIG_IPV6_SIT_6RD is not set -+CONFIG_IPV6_NDISC_NODETYPE=y -+# CONFIG_IPV6_TUNNEL is not set -+# CONFIG_IPV6_MULTIPLE_TABLES is not set -+# CONFIG_IPV6_MROUTE is not set -+# CONFIG_NETWORK_SECMARK is not set -+CONFIG_NETFILTER=y -+# CONFIG_NETFILTER_DEBUG is not set -+CONFIG_NETFILTER_ADVANCED=y -+ -+# -+# Core Netfilter Configuration -+# -+# CONFIG_NETFILTER_NETLINK_QUEUE is not set -+# CONFIG_NETFILTER_NETLINK_LOG is not set -+# CONFIG_NF_CONNTRACK is not set -+# CONFIG_NETFILTER_XTABLES is not set -+# CONFIG_IP_VS is not set -+ -+# -+# IP: Netfilter Configuration -+# -+# CONFIG_NF_DEFRAG_IPV4 is not set -+# CONFIG_IP_NF_QUEUE is not set -+# CONFIG_IP_NF_IPTABLES is not set -+# CONFIG_IP_NF_ARPTABLES is not set -+ -+# -+# IPv6: Netfilter Configuration -+# -+# CONFIG_IP6_NF_QUEUE is not set -+# CONFIG_IP6_NF_IPTABLES is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_RDS is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_NET_DSA is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_PHONET is not set -+# CONFIG_IEEE802154 is not set -+# CONFIG_NET_SCHED is not set -+# CONFIG_DCB is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_CAN is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+CONFIG_WIRELESS=y -+# CONFIG_CFG80211 is not set -+# CONFIG_LIB80211 is not set -+ -+# -+# CFG80211 needs to be enabled for MAC80211 -+# -+# CONFIG_WIMAX is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+# CONFIG_DEVTMPFS is not set -+CONFIG_STANDALONE=y -+CONFIG_PREVENT_FIRMWARE_BUILD=y -+# CONFIG_FW_LOADER is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_TESTS is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+# CONFIG_MTD_CMDLINE_PARTS is not set -+# CONFIG_MTD_AFS_PARTS is not set -+# CONFIG_MTD_AR7_PARTS is not set -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+# CONFIG_MTD_CFI is not set -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_DATAFLASH is not set -+CONFIG_MTD_M25P80=y -+CONFIG_M25PXX_USE_FAST_READ=y -+# CONFIG_MTD_SST25L is not set -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+# CONFIG_MTD_NAND is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# LPDDR flash memory drivers -+# -+# CONFIG_MTD_LPDDR is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+CONFIG_BLK_DEV=y -+# CONFIG_BLK_DEV_COW_COMMON is not set -+CONFIG_BLK_DEV_LOOP=m -+# CONFIG_BLK_DEV_CRYPTOLOOP is not set -+ -+# -+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -+# -+# CONFIG_BLK_DEV_NBD is not set -+# CONFIG_BLK_DEV_UB is not set -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_COUNT=1 -+CONFIG_BLK_DEV_RAM_SIZE=32768 -+# CONFIG_BLK_DEV_XIP is not set -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+# CONFIG_MG_DISK is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_AD525X_DPOT is not set -+# CONFIG_ICS932S401 is not set -+# CONFIG_ENCLOSURE_SERVICES is not set -+# CONFIG_ISL29003 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_TI_DAC7512 is not set -+# CONFIG_C2PORT is not set -+ -+# -+# EEPROM support -+# -+CONFIG_EEPROM_AT24=y -+# CONFIG_EEPROM_AT25 is not set -+# CONFIG_EEPROM_LEGACY is not set -+# CONFIG_EEPROM_MAX6875 is not set -+# CONFIG_EEPROM_93CX6 is not set -+# CONFIG_IWMC3200TOP is not set -+CONFIG_HAVE_IDE=y -+# CONFIG_IDE is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=y -+CONFIG_SCSI_DMA=y -+# CONFIG_SCSI_TGT is not set -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=y -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+CONFIG_CHR_DEV_SG=y -+# CONFIG_CHR_DEV_SCH is not set -+# CONFIG_SCSI_MULTI_LUN is not set -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+# CONFIG_SCSI_SCAN_ASYNC is not set -+CONFIG_SCSI_WAIT_SCAN=m -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+# CONFIG_SCSI_SRP_ATTRS is not set -+CONFIG_SCSI_LOWLEVEL=y -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_LIBFC is not set -+# CONFIG_LIBFCOE is not set -+# CONFIG_SCSI_DEBUG is not set -+# CONFIG_SCSI_DH is not set -+# CONFIG_SCSI_OSD_INITIATOR is not set -+CONFIG_ATA=y -+# CONFIG_ATA_NONSTANDARD is not set -+CONFIG_ATA_VERBOSE_ERROR=y -+CONFIG_SATA_PMP=y -+CONFIG_SATA_AHCI=y -+# CONFIG_ATA_SFF is not set -+# CONFIG_MD is not set -+CONFIG_NETDEVICES=y -+# CONFIG_DUMMY is not set -+# CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set -+# CONFIG_EQUALIZER is not set -+# CONFIG_TUN is not set -+# CONFIG_VETH is not set -+CONFIG_PHYLIB=y -+ -+# -+# MII PHY device drivers -+# -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+CONFIG_LXT_PHY=y -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+CONFIG_SMSC_PHY=y -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_ICPLUS_PHY is not set -+# CONFIG_REALTEK_PHY is not set -+# CONFIG_NATIONAL_PHY is not set -+# CONFIG_STE10XP is not set -+CONFIG_LSI_ET1011C_PHY=y -+# CONFIG_FIXED_PHY is not set -+# CONFIG_MDIO_BITBANG is not set -+CONFIG_NET_ETHERNET=y -+CONFIG_MII=y -+# CONFIG_AX88796 is not set -+# CONFIG_SMC91X is not set -+CONFIG_TI_DAVINCI_EMAC=y -+# CONFIG_DM9000 is not set -+# CONFIG_ENC28J60 is not set -+# CONFIG_ETHOC is not set -+# CONFIG_SMC911X is not set -+# CONFIG_SMSC911X is not set -+# CONFIG_DNET is not set -+# CONFIG_IBM_NEW_EMAC_ZMII is not set -+# CONFIG_IBM_NEW_EMAC_RGMII is not set -+# CONFIG_IBM_NEW_EMAC_TAH is not set -+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -+# CONFIG_B44 is not set -+# CONFIG_KS8842 is not set -+# CONFIG_KS8851 is not set -+# CONFIG_KS8851_MLL is not set -+# CONFIG_NETDEV_1000 is not set -+# CONFIG_NETDEV_10000 is not set -+CONFIG_WLAN=y -+# CONFIG_USB_ZD1201 is not set -+# CONFIG_HOSTAP is not set -+ -+# -+# Enable WiMAX (Networking options) to see the WiMAX drivers -+# -+ -+# -+# USB Network Adapters -+# -+# CONFIG_USB_CATC is not set -+# CONFIG_USB_KAWETH is not set -+# CONFIG_USB_PEGASUS is not set -+# CONFIG_USB_RTL8150 is not set -+# CONFIG_USB_USBNET is not set -+# CONFIG_WAN is not set -+# CONFIG_PPP is not set -+# CONFIG_SLIP is not set -+CONFIG_NETCONSOLE=y -+# CONFIG_NETCONSOLE_DYNAMIC is not set -+CONFIG_NETPOLL=y -+CONFIG_NETPOLL_TRAP=y -+CONFIG_NET_POLL_CONTROLLER=y -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=y -+# CONFIG_INPUT_FF_MEMLESS is not set -+# CONFIG_INPUT_POLLDEV is not set -+# CONFIG_INPUT_SPARSEKMAP is not set -+ -+# -+# Userland interfaces -+# -+# CONFIG_INPUT_MOUSEDEV is not set -+# CONFIG_INPUT_JOYDEV is not set -+CONFIG_INPUT_EVDEV=y -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ADP5588 is not set -+CONFIG_KEYBOARD_ATKBD=m -+# CONFIG_QT2160 is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+# CONFIG_KEYBOARD_MATRIX is not set -+# CONFIG_KEYBOARD_MAX7359 is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_OPENCORES is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+CONFIG_KEYBOARD_XTKBD=m -+# CONFIG_INPUT_MOUSE is not set -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+CONFIG_INPUT_TOUCHSCREEN=y -+# CONFIG_TOUCHSCREEN_ADS7846 is not set -+# CONFIG_TOUCHSCREEN_AD7877 is not set -+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -+# CONFIG_TOUCHSCREEN_AD7879 is not set -+# CONFIG_TOUCHSCREEN_DYNAPRO is not set -+# CONFIG_TOUCHSCREEN_EETI is not set -+# CONFIG_TOUCHSCREEN_FUJITSU is not set -+# CONFIG_TOUCHSCREEN_GUNZE is not set -+# CONFIG_TOUCHSCREEN_ELO is not set -+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -+# CONFIG_TOUCHSCREEN_MCS5000 is not set -+# CONFIG_TOUCHSCREEN_MTOUCH is not set -+# CONFIG_TOUCHSCREEN_INEXIO is not set -+# CONFIG_TOUCHSCREEN_MK712 is not set -+# CONFIG_TOUCHSCREEN_PENMOUNT is not set -+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -+# CONFIG_TOUCHSCREEN_TSC2007 is not set -+# CONFIG_TOUCHSCREEN_TSC2004 is not set -+# CONFIG_TOUCHSCREEN_W90X900 is not set -+CONFIG_TOUCHSCREEN_TPS6507X=y -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+CONFIG_SERIO=y -+CONFIG_SERIO_SERPORT=y -+CONFIG_SERIO_LIBPS2=y -+# CONFIG_SERIO_RAW is not set -+# CONFIG_SERIO_ALTERA_PS2 is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+CONFIG_VT=y -+CONFIG_CONSOLE_TRANSLATIONS=y -+# CONFIG_VT_CONSOLE is not set -+CONFIG_HW_CONSOLE=y -+# CONFIG_VT_HW_CONSOLE_BINDING is not set -+CONFIG_DEVKMEM=y -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+CONFIG_SERIAL_8250=y -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=3 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -+# CONFIG_SERIAL_8250_EXTENDED is not set -+ -+# -+# Non-8250 serial port support -+# -+# CONFIG_SERIAL_MAX3100 is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -+CONFIG_LEGACY_PTYS=y -+CONFIG_LEGACY_PTY_COUNT=8 -+# CONFIG_IPMI_HANDLER is not set -+CONFIG_HW_RANDOM=m -+# CONFIG_HW_RANDOM_TIMERIOMEM is not set -+# CONFIG_R3964 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+CONFIG_I2C=y -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_COMPAT=y -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_HELPER_AUTO=y -+CONFIG_I2C_ALGOBIT=y -+ -+# -+# I2C Hardware Bus support -+# -+ -+# -+# I2C system bus drivers (mostly embedded / system-on-chip) -+# -+CONFIG_I2C_DAVINCI=y -+# CONFIG_I2C_DESIGNWARE is not set -+CONFIG_I2C_GPIO=y -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_SIMTEC is not set -+ -+# -+# External I2C/SMBus adapter drivers -+# -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_TINY_USB is not set -+ -+# -+# Other I2C/SMBus bus drivers -+# -+# CONFIG_I2C_PCA_PLATFORM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set -+CONFIG_SPI=y -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_DAVINCI=y -+CONFIG_SPI_BITBANG=y -+# CONFIG_SPI_GPIO is not set -+# CONFIG_SPI_XILINX is not set -+# CONFIG_SPI_DESIGNWARE is not set -+ -+# -+# SPI Protocol Masters -+# -+# CONFIG_SPI_SPIDEV is not set -+# CONFIG_SPI_TLE62X0 is not set -+ -+# -+# PPS support -+# -+# CONFIG_PPS is not set -+CONFIG_ARCH_REQUIRE_GPIOLIB=y -+CONFIG_GPIOLIB=y -+# CONFIG_GPIO_SYSFS is not set -+ -+# -+# Memory mapped GPIO expanders: -+# -+ -+# -+# I2C GPIO expanders: -+# -+# CONFIG_GPIO_MAX732X is not set -+CONFIG_GPIO_PCA953X=y -+CONFIG_GPIO_PCF857X=y -+# CONFIG_GPIO_ADP5588 is not set -+ -+# -+# PCI GPIO expanders: -+# -+ -+# -+# SPI GPIO expanders: -+# -+# CONFIG_GPIO_MAX7301 is not set -+# CONFIG_GPIO_MCP23S08 is not set -+# CONFIG_GPIO_MC33880 is not set -+ -+# -+# AC97 GPIO expanders: -+# -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+# CONFIG_THERMAL is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_DAVINCI_WATCHDOG=y -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+CONFIG_SSB_POSSIBLE=y -+ -+# -+# Sonics Silicon Backplane -+# -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_CORE is not set -+# CONFIG_MFD_SM501 is not set -+# CONFIG_MFD_ASIC3 is not set -+# CONFIG_HTC_EGPIO is not set -+# CONFIG_HTC_PASIC3 is not set -+# CONFIG_TPS65010 is not set -+CONFIG_TPS6507x=y -+# CONFIG_TWL4030_CORE is not set -+# CONFIG_MFD_TMIO is not set -+# CONFIG_MFD_T7L66XB is not set -+# CONFIG_MFD_TC6387XB is not set -+# CONFIG_MFD_TC6393XB is not set -+# CONFIG_PMIC_DA903X is not set -+# CONFIG_PMIC_ADP5520 is not set -+# CONFIG_MFD_WM8400 is not set -+# CONFIG_MFD_WM831X is not set -+# CONFIG_MFD_WM8350_I2C is not set -+# CONFIG_MFD_PCF50633 is not set -+# CONFIG_MFD_MC13783 is not set -+# CONFIG_AB3100_CORE is not set -+# CONFIG_EZX_PCAP is not set -+# CONFIG_MFD_88PM8607 is not set -+# CONFIG_AB4500_CORE is not set -+# CONFIG_REGULATOR is not set -+CONFIG_MEDIA_SUPPORT=y -+ -+# -+# Multimedia core support -+# -+CONFIG_VIDEO_DEV=y -+CONFIG_VIDEO_V4L2_COMMON=y -+CONFIG_VIDEO_ALLOW_V4L1=y -+CONFIG_VIDEO_V4L1_COMPAT=y -+# CONFIG_DVB_CORE is not set -+CONFIG_VIDEO_MEDIA=y -+ -+# -+# Multimedia drivers -+# -+CONFIG_IR_CORE=y -+CONFIG_VIDEO_IR=y -+# CONFIG_MEDIA_ATTACH is not set -+CONFIG_MEDIA_TUNER=y -+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -+CONFIG_MEDIA_TUNER_SIMPLE=y -+CONFIG_MEDIA_TUNER_TDA8290=y -+CONFIG_MEDIA_TUNER_TDA9887=y -+CONFIG_MEDIA_TUNER_TEA5761=y -+CONFIG_MEDIA_TUNER_TEA5767=y -+CONFIG_MEDIA_TUNER_MT20XX=y -+CONFIG_MEDIA_TUNER_XC2028=y -+CONFIG_MEDIA_TUNER_XC5000=y -+CONFIG_MEDIA_TUNER_MC44S803=y -+CONFIG_VIDEO_V4L2=y -+CONFIG_VIDEO_V4L1=y -+CONFIG_VIDEOBUF_GEN=y -+CONFIG_VIDEOBUF_DMA_CONTIG=y -+CONFIG_VIDEO_CAPTURE_DRIVERS=y -+# CONFIG_VIDEO_ADV_DEBUG is not set -+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -+# CONFIG_VIDEO_IR_I2C is not set -+ -+# -+# Encoders/decoders and other helper chips -+# -+ -+# -+# Audio decoders -+# -+# CONFIG_VIDEO_TVAUDIO is not set -+# CONFIG_VIDEO_TDA7432 is not set -+# CONFIG_VIDEO_TDA9840 is not set -+# CONFIG_VIDEO_TDA9875 is not set -+# CONFIG_VIDEO_TEA6415C is not set -+# CONFIG_VIDEO_TEA6420 is not set -+# CONFIG_VIDEO_MSP3400 is not set -+# CONFIG_VIDEO_CS5345 is not set -+# CONFIG_VIDEO_CS53L32A is not set -+# CONFIG_VIDEO_M52790 is not set -+# CONFIG_VIDEO_TLV320AIC23B is not set -+# CONFIG_VIDEO_WM8775 is not set -+# CONFIG_VIDEO_WM8739 is not set -+# CONFIG_VIDEO_VP27SMPX is not set -+ -+# -+# RDS decoders -+# -+# CONFIG_VIDEO_SAA6588 is not set -+ -+# -+# Video decoders -+# -+# CONFIG_VIDEO_ADV7180 is not set -+# CONFIG_VIDEO_BT819 is not set -+# CONFIG_VIDEO_BT856 is not set -+# CONFIG_VIDEO_BT866 is not set -+# CONFIG_VIDEO_KS0127 is not set -+# CONFIG_VIDEO_OV7670 is not set -+# CONFIG_VIDEO_MT9V011 is not set -+# CONFIG_VIDEO_TCM825X is not set -+# CONFIG_VIDEO_SAA7110 is not set -+# CONFIG_VIDEO_SAA711X is not set -+# CONFIG_VIDEO_SAA717X is not set -+# CONFIG_VIDEO_SAA7191 is not set -+CONFIG_VIDEO_TVP514X=y -+# CONFIG_VIDEO_TVP5150 is not set -+# CONFIG_VIDEO_VPX3220 is not set -+ -+# -+# Video and audio decoders -+# -+# CONFIG_VIDEO_CX25840 is not set -+ -+# -+# MPEG video encoders -+# -+# CONFIG_VIDEO_CX2341X is not set -+ -+# -+# Video encoders -+# -+# CONFIG_VIDEO_SAA7127 is not set -+# CONFIG_VIDEO_SAA7185 is not set -+# CONFIG_VIDEO_ADV7170 is not set -+# CONFIG_VIDEO_ADV7175 is not set -+# CONFIG_VIDEO_THS7303 is not set -+# CONFIG_VIDEO_ADV7343 is not set -+ -+# -+# Video improvement chips -+# -+# CONFIG_VIDEO_UPD64031A is not set -+# CONFIG_VIDEO_UPD64083 is not set -+CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y -+CONFIG_VIDEO_DAVINCI_VPIF=y -+# CONFIG_VIDEO_VIVI is not set -+# CONFIG_VIDEO_VPSS_SYSTEM is not set -+# CONFIG_VIDEO_VPFE_CAPTURE is not set -+# CONFIG_VIDEO_CPIA is not set -+# CONFIG_VIDEO_CPIA2 is not set -+# CONFIG_VIDEO_SAA5246A is not set -+# CONFIG_VIDEO_SAA5249 is not set -+# CONFIG_SOC_CAMERA is not set -+CONFIG_V4L_USB_DRIVERS=y -+CONFIG_USB_VIDEO_CLASS=y -+# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -+# CONFIG_USB_GSPCA is not set -+# CONFIG_VIDEO_PVRUSB2 is not set -+# CONFIG_VIDEO_HDPVR is not set -+# CONFIG_VIDEO_EM28XX is not set -+# CONFIG_VIDEO_CX231XX is not set -+# CONFIG_VIDEO_USBVISION is not set -+# CONFIG_USB_VICAM is not set -+# CONFIG_USB_IBMCAM is not set -+# CONFIG_USB_KONICAWC is not set -+# CONFIG_USB_QUICKCAM_MESSENGER is not set -+# CONFIG_USB_ET61X251 is not set -+# CONFIG_VIDEO_OVCAMCHIP is not set -+# CONFIG_USB_OV511 is not set -+# CONFIG_USB_SE401 is not set -+# CONFIG_USB_SN9C102 is not set -+# CONFIG_USB_STV680 is not set -+# CONFIG_USB_ZC0301 is not set -+# CONFIG_USB_PWC is not set -+# CONFIG_USB_PWC_INPUT_EVDEV is not set -+# CONFIG_USB_ZR364XX is not set -+# CONFIG_USB_STKWEBCAM is not set -+# CONFIG_USB_S2255 is not set -+# CONFIG_RADIO_ADAPTERS is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+# CONFIG_FB_BOOT_VESA_SUPPORT is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_FOREIGN_ENDIAN is not set -+# CONFIG_FB_SYS_FOPS is not set -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+# CONFIG_FB_DAVINCI is not set -+# CONFIG_FB_VIRTUAL is not set -+CONFIG_FB_DA8XX=y -+# CONFIG_FB_METRONOME is not set -+# CONFIG_FB_MB862XX is not set -+# CONFIG_FB_BROADSHEET is not set -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+ -+# -+# Console display driver support -+# -+# CONFIG_VGA_CONSOLE is not set -+CONFIG_DUMMY_CONSOLE=y -+CONFIG_FRAMEBUFFER_CONSOLE=y -+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -+# CONFIG_FONTS is not set -+CONFIG_FONT_8x8=y -+CONFIG_FONT_8x16=y -+CONFIG_LOGO=y -+CONFIG_LOGO_LINUX_MONO=y -+CONFIG_LOGO_LINUX_VGA16=y -+CONFIG_LOGO_LINUX_CLUT224=y -+CONFIG_SOUND=y -+# CONFIG_SOUND_OSS_CORE is not set -+CONFIG_SND=y -+CONFIG_SND_TIMER=y -+CONFIG_SND_PCM=y -+CONFIG_SND_HWDEP=y -+CONFIG_SND_RAWMIDI=y -+CONFIG_SND_JACK=y -+# CONFIG_SND_SEQUENCER is not set -+# CONFIG_SND_MIXER_OSS is not set -+# CONFIG_SND_PCM_OSS is not set -+# CONFIG_SND_HRTIMER is not set -+# CONFIG_SND_DYNAMIC_MINORS is not set -+CONFIG_SND_SUPPORT_OLD_API=y -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+# CONFIG_SND_RAWMIDI_SEQ is not set -+# CONFIG_SND_OPL3_LIB_SEQ is not set -+# CONFIG_SND_OPL4_LIB_SEQ is not set -+# CONFIG_SND_SBAWE_SEQ is not set -+# CONFIG_SND_EMU10K1_SEQ is not set -+CONFIG_SND_DRIVERS=y -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+CONFIG_SND_ARM=y -+CONFIG_SND_SPI=y -+CONFIG_SND_USB=y -+CONFIG_SND_USB_AUDIO=y -+# CONFIG_SND_USB_CAIAQ is not set -+CONFIG_SND_SOC=y -+CONFIG_SND_DAVINCI_SOC=y -+CONFIG_SND_DAVINCI_SOC_MCASP=y -+CONFIG_SND_DA850_SOC_EVM=y -+CONFIG_SND_SOC_I2C_AND_SPI=y -+# CONFIG_SND_SOC_ALL_CODECS is not set -+CONFIG_SND_SOC_TLV320AIC3X=y -+# CONFIG_SOUND_PRIME is not set -+CONFIG_HID_SUPPORT=y -+CONFIG_HID=y -+# CONFIG_HIDRAW is not set -+ -+# -+# USB Input Devices -+# -+CONFIG_USB_HID=y -+# CONFIG_HID_PID is not set -+# CONFIG_USB_HIDDEV is not set -+ -+# -+# Special HID drivers -+# -+# CONFIG_HID_A4TECH is not set -+# CONFIG_HID_APPLE is not set -+# CONFIG_HID_BELKIN is not set -+# CONFIG_HID_CHERRY is not set -+# CONFIG_HID_CHICONY is not set -+# CONFIG_HID_CYPRESS is not set -+# CONFIG_HID_DRAGONRISE is not set -+# CONFIG_HID_EZKEY is not set -+# CONFIG_HID_KYE is not set -+# CONFIG_HID_GYRATION is not set -+# CONFIG_HID_TWINHAN is not set -+# CONFIG_HID_KENSINGTON is not set -+# CONFIG_HID_LOGITECH is not set -+# CONFIG_HID_MICROSOFT is not set -+# CONFIG_HID_MONTEREY is not set -+# CONFIG_HID_NTRIG is not set -+# CONFIG_HID_PANTHERLORD is not set -+# CONFIG_HID_PETALYNX is not set -+# CONFIG_HID_SAMSUNG is not set -+# CONFIG_HID_SONY is not set -+# CONFIG_HID_SUNPLUS is not set -+# CONFIG_HID_GREENASIA is not set -+# CONFIG_HID_SMARTJOYPLUS is not set -+# CONFIG_HID_TOPSEED is not set -+# CONFIG_HID_THRUSTMASTER is not set -+# CONFIG_HID_ZEROPLUS is not set -+CONFIG_USB_SUPPORT=y -+CONFIG_USB_ARCH_HAS_HCD=y -+CONFIG_USB_ARCH_HAS_OHCI=y -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+CONFIG_USB=y -+# CONFIG_USB_DEBUG is not set -+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set -+ -+# -+# Miscellaneous USB options -+# -+# CONFIG_USB_DEVICEFS is not set -+# CONFIG_USB_DEVICE_CLASS is not set -+# CONFIG_USB_DYNAMIC_MINORS is not set -+CONFIG_USB_SUSPEND=y -+# CONFIG_USB_OTG is not set -+# CONFIG_USB_OTG_WHITELIST is not set -+# CONFIG_USB_OTG_BLACKLIST_HUB is not set -+# CONFIG_USB_MON is not set -+# CONFIG_USB_WUSB is not set -+# CONFIG_USB_WUSB_CBAF is not set -+ -+# -+# USB Host Controller Drivers -+# -+# CONFIG_USB_C67X00_HCD is not set -+# CONFIG_USB_OXU210HP_HCD is not set -+# CONFIG_USB_ISP116X_HCD is not set -+# CONFIG_USB_ISP1760_HCD is not set -+# CONFIG_USB_ISP1362_HCD is not set -+CONFIG_USB_OHCI_HCD=y -+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -+CONFIG_USB_OHCI_LITTLE_ENDIAN=y -+# CONFIG_USB_SL811_HCD is not set -+# CONFIG_USB_R8A66597_HCD is not set -+# CONFIG_USB_HWA_HCD is not set -+CONFIG_USB_MUSB_HDRC=y -+CONFIG_USB_MUSB_SOC=y -+CONFIG_USB_MUSB_HOST=y -+# CONFIG_USB_MUSB_PERIPHERAL is not set -+# CONFIG_USB_MUSB_OTG is not set -+CONFIG_USB_MUSB_HDRC_HCD=y -+# CONFIG_MUSB_PIO_ONLY is not set -+# CONFIG_USB_INVENTRA_DMA is not set -+# CONFIG_USB_TI_CPPI_DMA is not set -+CONFIG_USB_TI_CPPI41_DMA=y -+CONFIG_USB_MUSB_DEBUG=y -+ -+# -+# USB Device Class drivers -+# -+# CONFIG_USB_ACM is not set -+# CONFIG_USB_PRINTER is not set -+# CONFIG_USB_WDM is not set -+# CONFIG_USB_TMC is not set -+ -+# -+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -+# -+ -+# -+# also be needed; see USB_STORAGE Help for more info -+# -+CONFIG_USB_STORAGE=y -+# CONFIG_USB_STORAGE_DEBUG is not set -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_ISD200 is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_ONETOUCH is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -+# CONFIG_USB_LIBUSUAL is not set -+ -+# -+# USB Imaging devices -+# -+# CONFIG_USB_MDC800 is not set -+# CONFIG_USB_MICROTEK is not set -+ -+# -+# USB port drivers -+# -+# CONFIG_USB_SERIAL is not set -+ -+# -+# USB Miscellaneous drivers -+# -+# CONFIG_USB_EMI62 is not set -+# CONFIG_USB_EMI26 is not set -+# CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_SEVSEG is not set -+# CONFIG_USB_RIO500 is not set -+# CONFIG_USB_LEGOTOWER is not set -+# CONFIG_USB_LCD is not set -+# CONFIG_USB_BERRY_CHARGE is not set -+# CONFIG_USB_LED is not set -+# CONFIG_USB_CYPRESS_CY7C63 is not set -+# CONFIG_USB_CYTHERM is not set -+# CONFIG_USB_IDMOUSE is not set -+# CONFIG_USB_FTDI_ELAN is not set -+# CONFIG_USB_APPLEDISPLAY is not set -+# CONFIG_USB_SISUSBVGA is not set -+# CONFIG_USB_LD is not set -+# CONFIG_USB_TRANCEVIBRATOR is not set -+# CONFIG_USB_IOWARRIOR is not set -+# CONFIG_USB_TEST is not set -+# CONFIG_USB_ISIGHTFW is not set -+# CONFIG_USB_VST is not set -+# CONFIG_USB_GADGET is not set -+ -+# -+# OTG and related infrastructure -+# -+CONFIG_USB_OTG_UTILS=y -+# CONFIG_USB_GPIO_VBUS is not set -+# CONFIG_USB_ULPI is not set -+CONFIG_NOP_USB_XCEIV=y -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD/SDIO Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+CONFIG_MMC_BLOCK_BOUNCE=y -+# CONFIG_SDIO_UART is not set -+# CONFIG_MMC_TEST is not set -+ -+# -+# MMC/SD/SDIO Host Controller Drivers -+# -+# CONFIG_MMC_SDHCI is not set -+# CONFIG_MMC_AT91 is not set -+# CONFIG_MMC_ATMELMCI is not set -+CONFIG_MMC_DAVINCI=y -+# CONFIG_MMC_SPI is not set -+# CONFIG_MEMSTICK is not set -+# CONFIG_NEW_LEDS is not set -+# CONFIG_ACCESSIBILITY is not set -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set -+# CONFIG_RTC_DRV_BQ32K is not set -+# CONFIG_RTC_DRV_S35390A is not set -+# CONFIG_RTC_DRV_FM3130 is not set -+# CONFIG_RTC_DRV_RX8581 is not set -+# CONFIG_RTC_DRV_RX8025 is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_M41T94 is not set -+# CONFIG_RTC_DRV_DS1305 is not set -+# CONFIG_RTC_DRV_DS1390 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+# CONFIG_RTC_DRV_R9701 is not set -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_DS3234 is not set -+# CONFIG_RTC_DRV_PCF2123 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_CMOS is not set -+# CONFIG_RTC_DRV_DS1286 is not set -+# CONFIG_RTC_DRV_DS1511 is not set -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T35 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_MSM6242 is not set -+# CONFIG_RTC_DRV_BQ4802 is not set -+# CONFIG_RTC_DRV_RP5C01 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+# CONFIG_RTC_DRV_OMAP is not set -+# CONFIG_DMADEVICES is not set -+# CONFIG_AUXDISPLAY is not set -+# CONFIG_UIO is not set -+ -+# -+# TI VLYNQ -+# -+# CONFIG_STAGING is not set -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -+CONFIG_EXT3_FS_XATTR=y -+# CONFIG_EXT3_FS_POSIX_ACL is not set -+# CONFIG_EXT3_FS_SECURITY is not set -+# CONFIG_EXT4_FS is not set -+CONFIG_JBD=y -+# CONFIG_JBD_DEBUG is not set -+CONFIG_FS_MBCACHE=y -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_BTRFS_FS is not set -+# CONFIG_NILFS2_FS is not set -+CONFIG_FILE_LOCKING=y -+CONFIG_FSNOTIFY=y -+CONFIG_DNOTIFY=y -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+# CONFIG_AUTOFS_FS is not set -+CONFIG_AUTOFS4_FS=m -+# CONFIG_FUSE_FS is not set -+ -+# -+# Caches -+# -+# CONFIG_FSCACHE is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+CONFIG_MSDOS_FS=y -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_PROC_PAGE_MONITOR=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+# CONFIG_CONFIGFS_FS is not set -+CONFIG_MISC_FILESYSTEMS=y -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -+# CONFIG_JFFS2_SUMMARY is not set -+# CONFIG_JFFS2_FS_XATTR is not set -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+CONFIG_CRAMFS=y -+# CONFIG_SQUASHFS is not set -+# CONFIG_VXFS_FS is not set -+CONFIG_MINIX_FS=m -+# CONFIG_OMFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_ROMFS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+CONFIG_NETWORK_FILESYSTEMS=y -+CONFIG_NFS_FS=y -+CONFIG_NFS_V3=y -+# CONFIG_NFS_V3_ACL is not set -+# CONFIG_NFS_V4 is not set -+CONFIG_ROOT_NFS=y -+CONFIG_NFSD=m -+CONFIG_NFSD_V3=y -+# CONFIG_NFSD_V3_ACL is not set -+# CONFIG_NFSD_V4 is not set -+CONFIG_LOCKD=y -+CONFIG_LOCKD_V4=y -+CONFIG_EXPORTFS=m -+CONFIG_NFS_COMMON=y -+CONFIG_SUNRPC=y -+# CONFIG_RPCSEC_GSS_KRB5 is not set -+# CONFIG_RPCSEC_GSS_SPKM3 is not set -+CONFIG_SMB_FS=m -+# CONFIG_SMB_NLS_DEFAULT is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+ -+# -+# Partition Types -+# -+CONFIG_PARTITION_ADVANCED=y -+# CONFIG_ACORN_PARTITION is not set -+# CONFIG_OSF_PARTITION is not set -+# CONFIG_AMIGA_PARTITION is not set -+# CONFIG_ATARI_PARTITION is not set -+# CONFIG_MAC_PARTITION is not set -+CONFIG_MSDOS_PARTITION=y -+# CONFIG_BSD_DISKLABEL is not set -+# CONFIG_MINIX_SUBPARTITION is not set -+# CONFIG_SOLARIS_X86_PARTITION is not set -+# CONFIG_UNIXWARE_DISKLABEL is not set -+# CONFIG_LDM_PARTITION is not set -+# CONFIG_SGI_PARTITION is not set -+# CONFIG_ULTRIX_PARTITION is not set -+# CONFIG_SUN_PARTITION is not set -+# CONFIG_KARMA_PARTITION is not set -+# CONFIG_EFI_PARTITION is not set -+# CONFIG_SYSV68_PARTITION is not set -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=y -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+# CONFIG_NLS_CODEPAGE_850 is not set -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+CONFIG_NLS_ASCII=m -+CONFIG_NLS_ISO8859_1=y -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+CONFIG_NLS_UTF8=m -+# CONFIG_DLM is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+# CONFIG_ENABLE_WARN_DEPRECATED is not set -+# CONFIG_ENABLE_MUST_CHECK is not set -+CONFIG_FRAME_WARN=1024 -+# CONFIG_MAGIC_SYSRQ is not set -+# CONFIG_STRIP_ASM_SYMS is not set -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_FS=y -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_DEBUG_KERNEL is not set -+# CONFIG_SLUB_DEBUG_ON is not set -+# CONFIG_SLUB_STATS is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_MEMORY_INIT is not set -+CONFIG_FRAME_POINTER=y -+# CONFIG_RCU_CPU_STALL_DETECTOR is not set -+# CONFIG_LATENCYTOP is not set -+# CONFIG_SYSCTL_SYSCALL_CHECK is not set -+CONFIG_HAVE_FUNCTION_TRACER=y -+CONFIG_TRACING_SUPPORT=y -+# CONFIG_FTRACE is not set -+# CONFIG_DYNAMIC_DEBUG is not set -+# CONFIG_SAMPLES is not set -+CONFIG_HAVE_ARCH_KGDB=y -+# CONFIG_ARM_UNWIND is not set -+# CONFIG_DEBUG_USER is not set -+# CONFIG_OC_ETM is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITYFS is not set -+# CONFIG_DEFAULT_SECURITY_SELINUX is not set -+# CONFIG_DEFAULT_SECURITY_SMACK is not set -+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -+CONFIG_DEFAULT_SECURITY_DAC=y -+CONFIG_DEFAULT_SECURITY="" -+CONFIG_CRYPTO=y -+ -+# -+# Crypto core or helper -+# -+# CONFIG_CRYPTO_MANAGER is not set -+# CONFIG_CRYPTO_MANAGER2 is not set -+# CONFIG_CRYPTO_GF128MUL is not set -+# CONFIG_CRYPTO_NULL is not set -+# CONFIG_CRYPTO_CRYPTD is not set -+# CONFIG_CRYPTO_AUTHENC is not set -+# CONFIG_CRYPTO_TEST is not set -+ -+# -+# Authenticated Encryption with Associated Data -+# -+# CONFIG_CRYPTO_CCM is not set -+# CONFIG_CRYPTO_GCM is not set -+# CONFIG_CRYPTO_SEQIV is not set -+ -+# -+# Block modes -+# -+# CONFIG_CRYPTO_CBC is not set -+# CONFIG_CRYPTO_CTR is not set -+# CONFIG_CRYPTO_CTS is not set -+# CONFIG_CRYPTO_ECB is not set -+# CONFIG_CRYPTO_LRW is not set -+# CONFIG_CRYPTO_PCBC is not set -+# CONFIG_CRYPTO_XTS is not set -+ -+# -+# Hash modes -+# -+# CONFIG_CRYPTO_HMAC is not set -+# CONFIG_CRYPTO_XCBC is not set -+# CONFIG_CRYPTO_VMAC is not set -+ -+# -+# Digest -+# -+# CONFIG_CRYPTO_CRC32C is not set -+# CONFIG_CRYPTO_GHASH is not set -+# CONFIG_CRYPTO_MD4 is not set -+# CONFIG_CRYPTO_MD5 is not set -+# CONFIG_CRYPTO_MICHAEL_MIC is not set -+# CONFIG_CRYPTO_RMD128 is not set -+# CONFIG_CRYPTO_RMD160 is not set -+# CONFIG_CRYPTO_RMD256 is not set -+# CONFIG_CRYPTO_RMD320 is not set -+# CONFIG_CRYPTO_SHA1 is not set -+# CONFIG_CRYPTO_SHA256 is not set -+# CONFIG_CRYPTO_SHA512 is not set -+# CONFIG_CRYPTO_TGR192 is not set -+# CONFIG_CRYPTO_WP512 is not set -+ -+# -+# Ciphers -+# -+# CONFIG_CRYPTO_AES is not set -+# CONFIG_CRYPTO_ANUBIS is not set -+# CONFIG_CRYPTO_ARC4 is not set -+# CONFIG_CRYPTO_BLOWFISH is not set -+# CONFIG_CRYPTO_CAMELLIA is not set -+# CONFIG_CRYPTO_CAST5 is not set -+# CONFIG_CRYPTO_CAST6 is not set -+# CONFIG_CRYPTO_DES is not set -+# CONFIG_CRYPTO_FCRYPT is not set -+# CONFIG_CRYPTO_KHAZAD is not set -+# CONFIG_CRYPTO_SALSA20 is not set -+# CONFIG_CRYPTO_SEED is not set -+# CONFIG_CRYPTO_SERPENT is not set -+# CONFIG_CRYPTO_TEA is not set -+# CONFIG_CRYPTO_TWOFISH is not set -+ -+# -+# Compression -+# -+# CONFIG_CRYPTO_DEFLATE is not set -+# CONFIG_CRYPTO_ZLIB is not set -+# CONFIG_CRYPTO_LZO is not set -+ -+# -+# Random Number Generation -+# -+# CONFIG_CRYPTO_ANSI_CPRNG is not set -+# CONFIG_CRYPTO_HW is not set -+# CONFIG_BINARY_PRINTF is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+CONFIG_GENERIC_FIND_LAST_BIT=y -+CONFIG_CRC_CCITT=m -+# CONFIG_CRC16 is not set -+CONFIG_CRC_T10DIF=m -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC7 is not set -+# CONFIG_LIBCRC32C is not set -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_DECOMPRESS_GZIP=y -+CONFIG_GENERIC_ALLOCATOR=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -+CONFIG_NLATTR=y -diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig -index c6d89c9..40c9a45 100644 ---- a/arch/arm/mach-davinci/Kconfig -+++ b/arch/arm/mach-davinci/Kconfig -@@ -205,6 +205,13 @@ config DA850_UI_VIDEO_PORT - select Video Port Interface. - endchoice - -+config MACH_OMAPL138_HAWKBOARD -+ bool "TI DA850/OMAP-L138/AM18xx Hawkboard(.org) Platform" -+ default ARCH_DAVINCI_DA850 -+ depends on ARCH_DAVINCI_DA850 -+ help -+ Say Y here to select the TI DA850/OMAP-L138/AM18xx Hawkboard. -+ - config DAVINCI_MUX - bool "DAVINCI multiplexing support" - depends on ARCH_DAVINCI -diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile -index f4e55de..ad0e75e 100644 ---- a/arch/arm/mach-davinci/Makefile -+++ b/arch/arm/mach-davinci/Makefile -@@ -30,6 +30,7 @@ obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o cdce949.o - obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o - obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o - obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o -+obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-da850-hawk.o - - # Power Management - obj-$(CONFIG_CPU_FREQ) += cpufreq.o -diff --git a/arch/arm/mach-davinci/board-da850-hawk.c b/arch/arm/mach-davinci/board-da850-hawk.c -new file mode 100644 -index 0000000..87ed017 ---- /dev/null -+++ b/arch/arm/mach-davinci/board-da850-hawk.c -@@ -0,0 +1,657 @@ -+/* -+ * TI DA850/OMAP-L138 Hawkboard board -+ * -+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ -+ * -+ * Derived from: arch/arm/mach-davinci/board-da830-hawk.c -+ * Original Copyrights follow: -+ * -+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under -+ * the terms of the GNU General Public License version 2. This program -+ * is licensed "as is" without any warranty of any kind, whether express -+ * or implied. -+ */ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/console.h> -+#include <linux/i2c.h> -+#include <linux/i2c/at24.h> -+#include <linux/i2c/pca953x.h> -+#include <linux/mfd/tps6507x.h> -+#include <linux/gpio.h> -+#include <linux/delay.h> -+#include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/nand.h> -+#include <linux/mtd/partitions.h> -+#include <linux/regulator/machine.h> -+#include <linux/spi/spi.h> -+#include <linux/spi/flash.h> -+#include <linux/usb/musb.h> -+#include <linux/i2c-gpio.h> -+ -+#include <asm/mach-types.h> -+#include <asm/mach/arch.h> -+ -+#include <mach/cp_intc.h> -+#include <mach/da8xx.h> -+#include <mach/nand.h> -+#include <mach/mux.h> -+#include <mach/flash.h> -+#include <mach/vpif.h> -+ -+#include <media/tvp514x.h> -+ -+// TODO - check - why is this different from EVM? - default modes - check DS -+#define DA850_HAWK_PHY_MASK 0x1 << 7 -+#define DA850_HAWK_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ -+ -+#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) -+#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) -+ -+#define TVP5147_CH0 "tvp514x-0" -+ -+#define VPIF_STATUS (0x002C) -+#define VPIF_STATUS_CLR (0x0030) -+ -+static struct davinci_pm_config da850_pm_pdata = { -+ .sleepcount = 128, -+}; -+ -+static struct platform_device da850_pm_device = { -+ .name = "pm-davinci", -+ .dev = { -+ .platform_data = &da850_pm_pdata, -+ }, -+ .id = -1, -+}; -+ -+/* DA850/OMAP-L138 Hawkboard includes a 128 MByte large-page NAND flash -+ * (128K blocks) /?? TODO? -+ */ -+struct mtd_partition da850_hawk_nandflash_partition[] = { -+ { -+ .name = "u-boot env", -+ .offset = 0, -+ .size = SZ_128K, -+ .mask_flags = MTD_WRITEABLE, -+ }, -+ { -+ .name = "UBL", -+ .offset = MTDPART_OFS_APPEND, -+ .size = SZ_128K, -+ .mask_flags = MTD_WRITEABLE, -+ }, -+ { -+ .name = "u-boot", -+ .offset = MTDPART_OFS_APPEND, -+ .size = 4 * SZ_128K, -+ .mask_flags = MTD_WRITEABLE, -+ }, -+ { -+ .name = "kernel", -+ .offset = 0x200000, -+ .size = SZ_4M, -+ .mask_flags = 0, -+ }, -+ { -+ .name = "filesystem", -+ .offset = MTDPART_OFS_APPEND, -+ .size = MTDPART_SIZ_FULL, -+ .mask_flags = 0, -+ }, -+}; -+ -+// TODO - check timings with Data Sheet -+static struct davinci_aemif_timing da850_hawk_nandflash_timing = { -+ .wsetup = 0, -+ .wstrobe = 30, -+ .whold = 30, -+ .rsetup = 20, -+ .rstrobe = 40, -+ .rhold = 0, -+ .ta = 0, -+}; -+ -+static struct davinci_nand_pdata da850_hawk_nandflash_data = { -+ .parts = da850_hawk_nandflash_partition, -+ .nr_parts = ARRAY_SIZE(da850_hawk_nandflash_partition), -+ .ecc_mode = NAND_ECC_HW, -+ .ecc_bits = 4, -+ .options = NAND_USE_FLASH_BBT, -+ .timing = &da850_hawk_nandflash_timing, -+}; -+ -+static struct resource da850_hawk_nandflash_resource[] = { -+ { -+ .start = DA8XX_AEMIF_CS3_BASE, -+ .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = DA8XX_AEMIF_CTL_BASE, -+ .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct platform_device da850_hawk_nandflash_device = { -+ .name = "davinci_nand", -+ .id = 1, -+ .dev = { -+ .platform_data = &da850_hawk_nandflash_data, -+ }, -+ .num_resources = ARRAY_SIZE(da850_hawk_nandflash_resource), -+ .resource = da850_hawk_nandflash_resource, -+}; -+ -+static struct platform_device *da850_hawk_devices[] __initdata = { -+ &da850_hawk_nandflash_device, -+}; -+ -+#if defined(CONFIG_MMC_DAVINCI) || \ -+ defined(CONFIG_MMC_DAVINCI_MODULE) -+#define HAS_MMC 1 -+#else -+#define HAS_MMC 0 -+#endif -+ -+static struct i2c_board_info __initdata da850_hawk_i2c_devices[] = { -+ { -+ I2C_BOARD_INFO("tlv320aic3x", 0x18), -+ }, -+// TODO - DDC VGA device I2C? -+}; -+ -+static struct davinci_uart_config da850_hawk_uart_config __initdata = { -+ .enabled_uarts = 0x7, -+}; -+ -+/* davinci da850 hawk audio machine driver */ -+static u8 da850_iis_serializer_direction[] = { -+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, -+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, -+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, -+ INACTIVE_MODE, TX_MODE, RX_MODE, INACTIVE_MODE, -+}; -+ -+static struct snd_platform_data da850_hawk_snd_data = { -+ .tx_dma_offset = 0x2000, -+ .rx_dma_offset = 0x2000, -+ .op_mode = DAVINCI_MCASP_IIS_MODE, -+ .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), -+ .tdm_slots = 2, -+ .serial_dir = da850_iis_serializer_direction, -+ .eventq_no = EVENTQ_1, -+ .version = MCASP_VERSION_2, -+ .txnumevt = 1, -+ .rxnumevt = 1, -+}; -+ -+static struct davinci_mcbsp_platform_data da850_mcbsp0_config = { -+ .inst = 0, -+}; -+ -+static struct davinci_mcbsp_platform_data da850_mcbsp1_config = { -+ .inst = 1, -+}; -+ -+static int da850_hawk_mmc_get_ro(int index) -+{ -+ return gpio_get_value(DA850_HAWK_MMCSD_WP_PIN); -+} -+ -+static int da850_hawk_mmc_get_cd(int index) -+{ -+ return !gpio_get_value(DA850_HAWK_MMCSD_CD_PIN); -+} -+ -+static struct davinci_mmc_config da850_mmc_config = { -+ .get_ro = da850_hawk_mmc_get_ro, -+ .get_cd = da850_hawk_mmc_get_cd, -+ .wires = 4, -+ .max_freq = 50000000, -+ .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, -+ .version = MMC_CTLR_VERSION_2, -+}; -+ -+static int da850_lcd_hw_init(void) -+{ -+ void __iomem *cfg_mstpri2_base; -+ u32 val; -+ -+ /* -+ * Reconfigure the LCDC priority to the highest to ensure that -+ * the throughput/latency requirements for the LCDC are met. -+ */ -+ cfg_mstpri2_base = DA8XX_SYSCFG0_VIRT(DA8XX_MSTPRI2_REG); -+ -+ val = __raw_readl(cfg_mstpri2_base); -+ val &= 0x0fffffff; -+ __raw_writel(val, cfg_mstpri2_base); -+ -+ return 0; -+} -+ -+static int __init da850_hawk_config_emac(void) -+{ -+ void __iomem *cfg_chip3_base; -+ int ret; -+ u32 val; -+ struct davinci_soc_info *soc_info = &davinci_soc_info; -+ -+ if (!machine_is_omapl138_hawkboard()) -+ return 0; -+ -+ cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); -+ -+ val = __raw_readl(cfg_chip3_base); -+ -+ val &= ~BIT(8); -+ ret = da8xx_pinmux_setup(da850_cpgmac_pins); -+ if (ret) -+ pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n", -+ ret); -+ -+ /* configure the CFGCHIP3 register for MII */ -+ __raw_writel(val, cfg_chip3_base); -+ -+ soc_info->emac_pdata->phy_mask = DA850_HAWK_PHY_MASK; -+ soc_info->emac_pdata->mdio_max_freq = DA850_HAWK_MDIO_FREQUENCY; -+ -+ ret = da8xx_register_emac(); -+ if (ret) -+ pr_warning("da850_hawk_init: emac registration failed: %d\n", -+ ret); -+ -+ return 0; -+} -+device_initcall(da850_hawk_config_emac); -+ -+static int da850_setup_vpif_input_channel_mode(int mux_mode) -+{ -+ return 0; -+} -+ -+static int da850_vpif_intr_status(void __iomem *vpif_base, int channel) -+{ -+ int status = 0; -+ int mask; -+ -+ // TODO - only one channel active on hawk? -+ if (channel < 0 || channel > 3) -+ return 0; -+ -+ mask = 1 << channel; -+ status = __raw_readl((vpif_base + VPIF_STATUS)) & mask; -+ __raw_writel(status, (vpif_base + VPIF_STATUS_CLR)); -+ -+ return status; -+} -+ -+/* VPIF capture configuration */ -+static struct tvp514x_platform_data tvp5146_pdata = { -+ .clk_polarity = 0, -+ .hs_polarity = 1, -+ .vs_polarity = 1 -+}; -+ -+#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) -+ -+static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = { -+ { -+ .name = TVP5147_CH0, -+ .board_info = { -+ I2C_BOARD_INFO("tvp5146", 0x5d), -+ .platform_data = &tvp5146_pdata, -+ }, -+ .input = INPUT_CVBS_VI2B, -+ .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, -+ .can_route = 1, -+ .vpif_if = { -+ .if_type = VPIF_IF_BT656, -+ .hd_pol = 1, -+ .vd_pol = 1, -+ .fid_pol = 0, -+ }, -+ }, -+}; -+ -+static const struct vpif_input da850_ch0_inputs[] = { -+ { -+ .input = { -+ .index = 0, -+ .name = "Composite", -+ .type = V4L2_INPUT_TYPE_CAMERA, -+ .std = TVP514X_STD_ALL, -+ }, -+ .subdev_name = TVP5147_CH0, -+ }, -+}; -+ -+// TODO - V4L2 device creates 2 device nodes for 2 channels - why? -+// - do we need to set .chan_config[1] to NULL? -+static struct vpif_capture_config da850_vpif_capture_config = { -+ .setup_input_channel_mode = da850_setup_vpif_input_channel_mode, -+ .intr_status = da850_vpif_intr_status, -+ .subdev_info = da850_vpif_capture_sdev_info, -+ .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info), -+ .chan_config[0] = { -+ .inputs = da850_ch0_inputs, -+ .input_count = ARRAY_SIZE(da850_ch0_inputs), -+ }, -+ .card_name = "DA850/OMAP-L138 Video Capture", -+}; -+ -+// TODO - fix all these references to _UI -+ -+#if defined(CONFIG_DAVINCI_MCBSP0) -+#define HAS_MCBSP0 1 -+#else -+#define HAS_MCBSP0 0 -+#endif -+ -+#if defined(CONFIG_DAVINCI_MCBSP1) -+#define HAS_MCBSP1 1 -+#else -+#define HAS_MCBSP1 0 -+#endif -+ -+#if defined(CONFIG_TI_DAVINCI_EMAC) || \ -+ defined(CONFIG_TI_DAVINCI_EMAC_MODULE) -+#define HAS_EMAC 1 -+#else -+#define HAS_EMAC 0 -+#endif -+ -+//TODO - fix dependence on _EVM -+#if defined(CONFIG_SND_DA850_SOC_EVM) || \ -+ defined(CONFIG_SND_DA850_SOC_EVM_MODULE) -+#define HAS_MCASP 1 -+#else -+#define HAS_MCASP 0 -+#endif -+ -+#if defined(CONFIG_DA850_UI_RMII) && (HAS_EMAC) -+#define HAS_RMII 1 -+#else -+#define HAS_RMII 0 -+#endif -+ -+#if defined(CONFIG_DA850_UI_LCD) && defined(CONFIG_FB_DA8XX) ||\ -+ defined(CONFIG_FB_DA8XX_MODULE) -+#define HAS_GLCD 1 -+#else -+#define HAS_GLCD 0 -+#endif -+ -+#if defined(CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY) ||\ -+ defined(CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY_MODULE) -+#define HAS_VPIF_DISPLAY 1 -+#else -+#define HAS_VPIF_DISPLAY 0 -+#endif -+ -+#if defined(CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE) ||\ -+ defined(CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE_MODULE) -+#define HAS_VPIF_CAPTURE 1 -+#else -+#define HAS_VPIF_CAPTURE 0 -+#endif -+ -+static struct da8xx_ohci_root_hub da850_hawk_usb11_pdata = { -+}; -+ -+static struct musb_hdrc_platform_data usb_hawk_data[] = { -+ { -+#ifdef CONFIG_USB_MUSB_OTG -+ .mode = MUSB_OTG, -+#elif defined(CONFIG_USB_MUSB_DUAL_ROLE) -+ .mode = MUSB_DUAL_ROLE, -+#elif defined(CONFIG_USB_MUSB_PERIPHERAL) -+ .mode = MUSB_PERIPHERAL, -+#elif defined(CONFIG_USB_MUSB_HOST) -+ .mode = MUSB_HOST, -+#endif -+ .power = 255, -+ .potpgt = 8, -+ .set_vbus = NULL, /* VBUs is directly controlled by the IP */ -+ } -+}; -+ -+static __init void da850_hawk_usb_init(void) -+{ -+ int ret; -+ u32 cfgchip2; -+ -+ /* -+ * Setup the Ref. clock frequency for the HAWK at 24 MHz. -+ */ -+ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); -+ cfgchip2 &= ~CFGCHIP2_REFFREQ; -+ cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; -+ __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); -+ -+ da8xx_usb20_configure(usb_hawk_data, ARRAY_SIZE(usb_hawk_data)); -+ -+ ret = da8xx_register_usb11(&da850_hawk_usb11_pdata); -+ if (ret) -+ pr_warning("%s: USB 1.1 registration failed: %d\n", -+ __func__, ret); -+} -+ -+static struct i2c_gpio_platform_data da850_gpio_i2c_pdata = { -+ .sda_pin = GPIO_TO_PIN(1, 4), -+ .scl_pin = GPIO_TO_PIN(1, 5), -+ .udelay = 2, /* 250 KHz */ -+}; -+ -+static struct platform_device da850_gpio_i2c = { -+ .name = "i2c-gpio", -+ .id = 1, -+ .dev = { -+ .platform_data = &da850_gpio_i2c_pdata, -+ }, -+}; -+ -+static __init void da850_hawk_init(void) -+{ -+ int ret; -+ -+ ret = da8xx_register_edma(); -+ if (ret) -+ pr_warning("da850_hawk_init: edma registration failed: %d\n", -+ ret); -+ -+ // TODO - check safe to enable alongside MMC -+ ret = da8xx_pinmux_setup(da850_nand_pins); -+ if (ret) -+ pr_warning("da850_hawk_init: nand mux setup failed: " -+ "%d\n", ret); -+ -+ platform_add_devices(da850_hawk_devices, -+ ARRAY_SIZE(da850_hawk_devices)); -+ -+ ret = da8xx_pinmux_setup(da850_i2c0_pins); -+ if (ret) -+ pr_warning("da850_hawk_init: i2c0 mux setup failed: %d\n", -+ ret); -+ -+ platform_device_register(&da850_gpio_i2c); -+ -+ ret = da8xx_register_watchdog(); -+ if (ret) -+ pr_warning("da830_hawk_init: watchdog registration failed: %d\n", -+ ret); -+ -+ if (HAS_MMC) { -+ ret = da8xx_pinmux_setup(da850_mmcsd0_pins); -+ if (ret) -+ pr_warning("da850_hawk_init: mmcsd0 mux setup failed:" -+ " %d\n", ret); -+ -+ ret = gpio_request(DA850_HAWK_MMCSD_CD_PIN, "MMC CD\n"); -+ if (ret) -+ pr_warning("da850_hawk_init: can not open GPIO %d\n", -+ DA850_HAWK_MMCSD_CD_PIN); -+ gpio_direction_input(DA850_HAWK_MMCSD_CD_PIN); -+ -+ ret = gpio_request(DA850_HAWK_MMCSD_WP_PIN, "MMC WP\n"); -+ if (ret) -+ pr_warning("da850_hawk_init: can not open GPIO %d\n", -+ DA850_HAWK_MMCSD_WP_PIN); -+ gpio_direction_input(DA850_HAWK_MMCSD_WP_PIN); -+ -+ ret = da8xx_register_mmcsd0(&da850_mmc_config); -+ if (ret) -+ pr_warning("da850_hawk_init: mmcsd0 registration failed:" -+ " %d\n", ret); -+ } -+ -+ davinci_serial_init(&da850_hawk_uart_config); -+ -+ i2c_register_board_info(1, da850_hawk_i2c_devices, -+ ARRAY_SIZE(da850_hawk_i2c_devices)); -+ -+ /* -+ * shut down uart 0 and 1; they are not used on the board and -+ * accessing them causes endless "too much work in irq53" messages -+ * with arago fs -+ */ -+ __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); -+ __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); -+ -+ if (HAS_MCBSP0) { -+ if (HAS_EMAC) -+ pr_warning("WARNING: both MCBSP0 and EMAC are " -+ "enabled, but they share pins.\n" -+ "\tDisable one of them.\n"); -+ -+ ret = da8xx_pinmux_setup(da850_mcbsp0_pins); -+ if (ret) -+ pr_warning("da850_hawk_init: mcbsp0 mux setup failed:" -+ " %d\n", ret); -+ -+ ret = da850_init_mcbsp(&da850_mcbsp0_config); -+ if (ret) -+ pr_warning("da850_hawk_init: mcbsp0 registration" -+ "failed: %d\n", ret); -+ } -+ -+ if (HAS_MCBSP1) { -+ ret = da8xx_pinmux_setup(da850_mcbsp1_pins); -+ if (ret) -+ pr_warning("da850_hawl_init: mcbsp1 mux setup failed:" -+ " %d\n", ret); -+ -+ ret = da850_init_mcbsp(&da850_mcbsp1_config); -+ if (ret) -+ pr_warning("da850_hawk_init: mcbsp1 registration" -+ " failed: %d\n", ret); -+ } -+ -+ if (HAS_MCASP) { -+ if ((HAS_MCBSP0 || HAS_MCBSP1)) -+ pr_warning("WARNING: both McASP and McBSP are enabled, " -+ "but they share pins.\n" -+ "\tDisable one of them.\n"); -+ -+ ret = da8xx_pinmux_setup(da850_mcasp_pins); -+ if (ret) -+ pr_warning("da850_hawk_init: mcasp mux setup failed:" -+ "%d\n", ret); -+ -+ da8xx_register_mcasp(0, &da850_hawk_snd_data); -+ } -+ -+ ret = da8xx_pinmux_setup(da850_lcdcntl_pins); -+ if (ret) -+ pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", -+ ret); -+ -+ ret = da850_lcd_hw_init(); -+ if (ret) -+ pr_warning("da850_hawk_init: lcd initialization failed: %d\n", -+ ret); -+ -+ ret = da8xx_register_lcdc(&vga_monitor_pdata); -+ if (ret) -+ pr_warning("da850_hawk_init: lcdc registration failed: %d\n", -+ ret); -+ -+ // Default hawkboard doesn't have RTC battery - so CONFIG_RTC_DRV_OMAP -+ // should be disabled by default -+ ret = da8xx_register_rtc(); -+ if (ret) -+ pr_warning("da850_hawk_init: rtc setup failed: %d\n", ret); -+ -+ // Generic da850(.c) CPUFREQ support ok as long as CONFIG_REGULATOR disabled -+ ret = da850_register_cpufreq(); -+ if (ret) -+ pr_warning("da850_hawk_init: cpufreq registration failed: %d\n", -+ ret); -+ -+ ret = da8xx_register_cpuidle(); -+ if (ret) -+ pr_warning("da850_hawk_init: cpuidle registration failed: %d\n", -+ ret); -+ -+ // Wake-Up relies upon RTC (which requires battery fitted -+ ret = da850_register_pm(&da850_pm_device); -+ if (ret) -+ pr_warning("da850_hawk_init: suspend registration failed: %d\n", -+ ret); -+ -+ da850_hawk_usb_init(); -+ -+ ret = da8xx_register_sata(); -+ if (ret) -+ pr_warning("da850_hawk_init: SATA registration failed: %d\n", -+ ret); -+ -+ ret = da850_register_vpif(); -+ if (ret) -+ pr_warning("da850_hawk_init: VPIF registration failed: " -+ "%d\n", ret); -+ -+ ret = da8xx_pinmux_setup(da850_vpif_capture_pins); -+ if (ret) -+ pr_warning("da850_hawk_init: vpif capture mux failed: " -+ "%d\n", ret); -+ -+ ret = da850_register_vpif_capture(&da850_vpif_capture_config); -+ if (ret) -+ pr_warning("da850_hawk_init: VPIF registration failed: " -+ "%d\n", ret); -+} -+ -+#ifdef CONFIG_SERIAL_8250_CONSOLE -+static int __init da850_hawk_console_init(void) -+{ -+ return add_preferred_console("ttyS", 2, "115200"); -+} -+console_initcall(da850_hawk_console_init); -+#endif -+ -+static __init void da850_hawk_irq_init(void) -+{ -+ struct davinci_soc_info *soc_info = &davinci_soc_info; -+ -+ cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ, -+ soc_info->intc_irq_prios); -+} -+ -+static void __init da850_hawk_map_io(void) -+{ -+ da850_init(); -+} -+ -+MACHINE_START(OMAPL138_HAWKBOARD, "DaVinci DA850/OMAP-L138/AM18xx Hawkboard(.org)") -+ .phys_io = IO_PHYS, -+ .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, -+ .boot_params = (DA8XX_DDR_BASE + 0x100), -+ .map_io = da850_hawk_map_io, -+ .init_irq = da850_hawk_irq_init, -+ .timer = &davinci_timer, -+ .init_machine = da850_hawk_init, -+MACHINE_END -diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c -index cfecd3c..a32c636 100755 ---- a/arch/arm/mach-davinci/da850.c -+++ b/arch/arm/mach-davinci/da850.c -@@ -720,7 +720,7 @@ const short da850_rmii_pins[] __initdata = { - const short da850_mcasp_pins[] __initdata = { - DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, - DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, -- DA850_AXR_11, DA850_AXR_12, -+ DA850_AXR_11, DA850_AXR_12, DA850_AXR_13, DA850_AXR_14, - -1 - }; - -diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c -index 0842590..97a4611 100755 ---- a/arch/arm/mach-davinci/devices-da8xx.c -+++ b/arch/arm/mach-davinci/devices-da8xx.c -@@ -560,6 +560,12 @@ struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = { - .type = "Sharp_LK043T1DG01", - }; - -+struct da8xx_lcdc_platform_data vga_monitor_pdata = { -+ .manu_name = "vga_mon", -+ .controller_data = &lcd_cfg, -+ .type = "VGA_Monitor", -+}; -+ - #if !defined(CONFIG_FB_DA8XX) && !defined(CONFIG_FB_DA8XX_MODULE) - static struct da8xx_clcd_platform_data da8xx_evm_clcd_pdata = { - .version = CONFIG_SPACE_1, -@@ -664,9 +670,11 @@ int da8xx_register_rtc(void) - { - int ret; - -+#ifdef CONFIG_RTC_DRV_OMAP - /* Unlock the rtc's registers */ - __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); - __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); -+#endif - - ret = platform_device_register(&da8xx_rtc_device); - if (!ret) -diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h -index f76433f..c39b5b0 100755 ---- a/arch/arm/mach-davinci/include/mach/da8xx.h -+++ b/arch/arm/mach-davinci/include/mach/da8xx.h -@@ -168,6 +168,8 @@ extern struct platform_device da8xx_serial_device; - extern struct emac_platform_data da8xx_emac_pdata; - extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; - extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; -+extern struct da8xx_lcdc_platform_data vga_monitor_pdata; -+ - void da8xx_usb20_configure(struct musb_hdrc_platform_data *pdata, u8 num_inst); - - extern const short da830_emif25_pins[]; -diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S -index 17ab523..f04c481 100644 ---- a/arch/arm/mach-davinci/include/mach/debug-macro.S -+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S -@@ -27,7 +27,8 @@ - #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx) - #error Cannot enable DaVinci and DA8XX platforms concurrently - #elif defined(CONFIG_MACH_DAVINCI_DA830_EVM) || \ -- defined(CONFIG_MACH_DAVINCI_DA850_EVM) -+ defined(CONFIG_MACH_DAVINCI_DA850_EVM) || \ -+ defined(CONFIG_MACH_OMAPL138_HAWKBOARD) - orr \rx, \rx, #0x00d00000 @ physical base address - orr \rx, \rx, #0x0000d000 @ of UART 2 - #else -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index d0db690..ea91489 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -513,11 +513,11 @@ config VIDEO_DAVINCI_VPIF_DISPLAY - - config VIDEO_DAVINCI_VPIF_CAPTURE - tristate "DaVinci Video VPIF Capture" -- depends on VIDEO_DEV && (MACH_DAVINCI_DM6467_EVM || MACH_DAVINCI_DA850_EVM) -+ depends on VIDEO_DEV && (MACH_DAVINCI_DM6467_EVM || MACH_DAVINCI_DA850_EVM || MACH_OMAPL138_HAWKBOARD) - select VIDEOBUF_DMA_CONTIG - select VIDEO_DAVINCI_VPIF - help -- Support for DaVinci VPIF Capture on DM6467 EVM and/or DA850/OMAP-L138/AM18xx EVM. -+ Support for DaVinci VPIF Capture on DM6467 EVM and/or DA850/OMAP-L138/AM18xx EVM/Hawkboard. - - To compile this driver as a module, choose M here: the - module will be called vpif_capture. -diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c -index faa1fd3..d416923 100644 ---- a/drivers/video/da8xx-fb.c -+++ b/drivers/video/da8xx-fb.c -@@ -196,6 +196,20 @@ static struct da8xx_panel known_lcd_panels[] = { - .pxl_clk = 7833600, - .invert_pxl_clk = 0, - }, -+ /* CRT Monitor or LCD Screen */ -+ [2] = { -+ .name = "VGA_Monitor", -+ .width = 640, -+ .height = 480, -+ .hfp = 48, -+ .hbp = 48, -+ .hsw = 63, -+ .vfp = 11, -+ .vbp = 31, -+ .vsw = 1, -+ .pxl_clk = 25000000, -+ .invert_pxl_clk = 1, -+ }, - }; - - /* Enable the Raster Engine of the LCD Controller */ -diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig -index 62dab95..8b34b5b 100644 ---- a/sound/soc/davinci/Kconfig -+++ b/sound/soc/davinci/Kconfig -@@ -53,11 +53,11 @@ config SND_DA830_SOC_EVM - DA830/OMAP-L137/AM17xx EVM - - config SND_DA850_SOC_EVM -- tristate "SoC Audio support for DA850/OMAP-L138/AM18xx EVM" -- depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA850_EVM -+ tristate "SoC Audio support for DA850/OMAP-L138/AM18xx EVM / Hawkboard" -+ depends on SND_DAVINCI_SOC && (MACH_DAVINCI_DA850_EVM || MACH_OMAPL138_HAWKBOARD) - select SND_DAVINCI_SOC_MCASP - select SND_SOC_TLV320AIC3X - help - Say Y if you want to add support for SoC audio on TI -- DA850/OMAP-L138/AM18xx EVM -+ DA850/OMAP-L138/AM18xx EVM/Hawkboard - -diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c -index 7ccbe66..a7594b8 100644 ---- a/sound/soc/davinci/davinci-evm.c -+++ b/sound/soc/davinci/davinci-evm.c -@@ -57,7 +57,8 @@ static int evm_hw_params(struct snd_pcm_substream *substream, - sysclk = 12288000; - - else if (machine_is_davinci_da830_evm() || -- machine_is_davinci_da850_evm()) -+ machine_is_davinci_da850_evm() || -+ machine_is_omapl138_hawkboard() ) - sysclk = 24576000; - - else -@@ -256,7 +257,7 @@ static int __init evm_init(void) - } else if (machine_is_davinci_da830_evm()) { - evm_snd_dev_data = &da830_evm_snd_devdata; - index = 1; -- } else if (machine_is_davinci_da850_evm()) { -+ } else if (machine_is_davinci_da850_evm() || machine_is_omapl138_hawkboard()) { - evm_snd_dev_data = &da850_evm_snd_devdata; - index = 0; - } else --- -1.6.0.6 - diff --git a/recipes-kernel/linux/linux-davinci/omapl138/0001-board-da850-evm-Disable-NAND-SUBPAGE.patch b/recipes-kernel/linux/linux-davinci/omapl138/0001-board-da850-evm-Disable-NAND-SUBPAGE.patch deleted file mode 100644 index 3653bdf..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/0001-board-da850-evm-Disable-NAND-SUBPAGE.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 2ee9f2c655710d9e60a5a9b49871edc316e5363d Mon Sep 17 00:00:00 2001 -From: Roger Monk <r-monk@ti.com> -Date: Wed, 25 Aug 2010 17:29:14 +0100 -Subject: [PATCH] board-da850-evm: Disable NAND SUBPAGE - - * This was causing issues with UBI - * Solution/Workaround identified by Caglar Akyuz - now applied locally to board file - -Signed-off-by: Roger Monk <r-monk@ti.com> ---- - arch/arm/mach-davinci/board-da850-evm.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c -index cfed439..502b914 100755 ---- a/arch/arm/mach-davinci/board-da850-evm.c -+++ b/arch/arm/mach-davinci/board-da850-evm.c -@@ -187,7 +187,7 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = { - .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), - .ecc_mode = NAND_ECC_HW, - .ecc_bits = 4, -- .options = NAND_USE_FLASH_BBT, -+ .options = NAND_USE_FLASH_BBT | NAND_NO_SUBPAGE_WRITE, - .timing = &da850_evm_nandflash_timing, - }; - --- -1.6.0.4 - diff --git a/recipes-kernel/linux/linux-davinci/omapl138/0001-uio_pruss1-Core-driver-addition.patch b/recipes-kernel/linux/linux-davinci/omapl138/0001-uio_pruss1-Core-driver-addition.patch deleted file mode 100755 index 389097f..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/0001-uio_pruss1-Core-driver-addition.patch +++ /dev/null @@ -1,334 +0,0 @@ -From: Melissa Watkins <m-watkins@ti.com> -Date: Wed, 24 Nov 2010 02:59:34 -0600 -Subject: [PATCH 1/3] uio_pruss1: Core driver addition - -This patch adds the uio_pru driver and updates the uio Makefile - and Kconfig files to support this driver. The uio_pru driver provides -a framework for handling the PRU in the user space and is responsible -for the device setup and the primary interrupt handling. - -Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com> -Signed-off-by: Melissa Watkins <m-watkins@ti.com> ---- - drivers/uio/Kconfig | 10 ++ - drivers/uio/Makefile | 1 + - drivers/uio/uio_pru.c | 279 +++++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 290 insertions(+), 0 deletions(-) - create mode 100644 drivers/uio/uio_pru.c - -diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig -index 8aa1955..8ae8280 100644 ---- a/drivers/uio/Kconfig -+++ b/drivers/uio/Kconfig -@@ -94,4 +94,14 @@ config UIO_PCI_GENERIC - primarily, for virtualization scenarios. - If you compile this as a module, it will be called uio_pci_generic. - -+config UIO_PRUSS -+ tristate "Texas Instruments PRUSS driver" -+ depends on ARCH_DAVINCI_DA850 -+ default n -+ help -+ PRUSS driver for OMAPL13X/DA8XX/AM17XX/AM18XX devices -+ PRUSS driver requires user space components -+ To compile this driver as a module, choose M here: the module -+ will be called uio_pruss. -+ - endif -diff --git a/drivers/uio/Makefile b/drivers/uio/Makefile -index 73b2e75..e6d8adb 100644 ---- a/drivers/uio/Makefile -+++ b/drivers/uio/Makefile -@@ -6,3 +6,4 @@ obj-$(CONFIG_UIO_SMX) += uio_smx.o - obj-$(CONFIG_UIO_AEC) += uio_aec.o - obj-$(CONFIG_UIO_SERCOS3) += uio_sercos3.o - obj-$(CONFIG_UIO_PCI_GENERIC) += uio_pci_generic.o -+obj-$(CONFIG_UIO_PRUSS) += uio_pru.o -diff --git a/drivers/uio/uio_pru.c b/drivers/uio/uio_pru.c -new file mode 100644 -index 0000000..82dc35e ---- /dev/null -+++ b/drivers/uio/uio_pru.c -@@ -0,0 +1,279 @@ -+/* -+ * UIO TI Programmable Real-Time Unit (PRU) driver. -+ * -+ * (C) 2010 Amit Chatterjee <amit.chatterjee@ti.com> -+ * -+ * Copyright (C) {YEAR} Texas Instruments Incorporated - http://www.ti.com/ -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation version 2. -+ * -+ * This program is distributed .as is. WITHOUT ANY WARRANTY of any -+ * kind, whether express or implied; without even the implied warranty -+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include <linux/device.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/uio_driver.h> -+#include <linux/io.h> -+#include <linux/clk.h> -+#include <linux/dma-mapping.h> -+ -+#define DRV_NAME "pruss" -+#define DRV_VERSION "0.01" -+ -+/* -+0x01C30000 - 0x01C301FF Data RAM 0 -+0x01C30200 - 0x01C31FFF Reserved -+0x01C32000 - 0x01C321FF Data RAM 1 -+0x01C32200 - 0x01C33FFF Reserved -+0x01C34000 - 0x01C36FFF INTC Registers -+0x01C37000 - 0x01C373FF PRU0 Control Registers -+0x01C37400 - 0x01C377FF PRU0 Debug Registers -+0x01C37800 - 0x01C37BFF PRU1 Control Registers -+0x01C37C00 - 0x01C37FFF PRU1 Debug Registers -+0x01C38000 - 0x01C38FFF PRU0 Instruction RAM -+0x01C39000 - 0x01C3BFFF Reserved -+0x01C3C000 - 0x01C3CFFF PRU1 Instruction RAM -+0x01C3D000 - 0x01C3FFFF Reserved -+*/ -+/* -+ * 3 PRU_EVTOUT0 PRUSS Interrupt -+ * 4 PRU_EVTOUT1 PRUSS Interrupt -+ * 5 PRU_EVTOUT2 PRUSS Interrupt -+ * 6 PRU_EVTOUT3 PRUSS Interrupt -+ * 7 PRU_EVTOUT4 PRUSS Interrupt -+ * 8 PRU_EVTOUT5 PRUSS Interrupt -+ * 9 PRU_EVTOUT6 PRUSS Interrupt -+ * 10 PRU_EVTOUT7 PRUSS Interrupt -+*/ -+ -+#define PRUSS_INSTANCE (8) -+ -+static struct clk *pruss_clk = NULL, *ecap0_clk = NULL; -+static struct uio_info *info[PRUSS_INSTANCE]; -+static void *ddr_virt_addr; -+static dma_addr_t ddr_phy_addr; -+ -+ -+ -+static irqreturn_t pruss_handler(int irq, struct uio_info *dev_info) -+{ -+ return IRQ_HANDLED; -+} -+ -+static int __devinit pruss_probe(struct platform_device *dev) -+{ -+ int ret = -ENODEV; -+ int count = 0; -+ struct resource *regs_pruram, *regs_l3ram, *regs_ddr; -+ char *string; -+ -+ /* Power on PRU in case its not done as part of boot-loader */ -+ pruss_clk = clk_get(&dev->dev, "pruss"); -+ if (IS_ERR(pruss_clk)) { -+ dev_err(&dev->dev, "no pruss clock available\n"); -+ ret = PTR_ERR(pruss_clk); -+ pruss_clk = NULL; -+ return ret; -+ } else { -+ clk_enable (pruss_clk); -+ } -+ -+ ecap0_clk = clk_get(&dev->dev, "ecap0"); -+ if (IS_ERR(ecap0_clk)) { -+ dev_err(&dev->dev, "no ecap0 clock available\n"); -+ ret = PTR_ERR(ecap0_clk); -+ ecap0_clk = NULL; -+ return ret; -+ } else { -+ clk_enable(ecap0_clk); -+ } -+ -+ -+ -+ for (count = 0; count < PRUSS_INSTANCE; count++) { -+ info[count] = (struct uio_info *)kzalloc(sizeof(struct uio_info), GFP_KERNEL); -+ if (!info[count]) -+ return -ENOMEM; -+ -+ } -+ -+ regs_pruram = platform_get_resource(dev, IORESOURCE_MEM, 0); -+ if (!regs_pruram) { -+ dev_err(&dev->dev, "No memory resource specified\n"); -+ goto out_free; -+ } -+ -+ regs_l3ram = platform_get_resource(dev, IORESOURCE_MEM, 1); -+ if (!regs_l3ram) { -+ dev_err(&dev->dev, "No memory resource specified\n"); -+ goto out_free; -+ } -+ -+ regs_ddr = platform_get_resource(dev, IORESOURCE_MEM, 2); -+ if (!regs_ddr) { -+ dev_err(&dev->dev, "No memory resource specified\n"); -+ goto out_free; -+ } -+ ddr_virt_addr = dma_alloc_coherent(&dev->dev, regs_ddr->end-regs_ddr->start+1, &ddr_phy_addr, GFP_KERNEL|GFP_DMA); -+ -+ -+ for (count = 0; count < PRUSS_INSTANCE; count++) { -+ info[count]->mem[0].addr = regs_pruram->start; -+ if (!info[count]->mem[0].addr) { -+ dev_err(&dev->dev, "Invalid memory resource\n"); -+ break; -+ } -+ -+ info[count]->mem[0].size = regs_pruram->end - regs_pruram->start + 1; -+ info[count]->mem[0].internal_addr = ioremap(regs_pruram->start, info[count]->mem[0].size); -+ -+ if (!info[count]->mem[0].internal_addr) { -+ dev_err(&dev->dev, "Can't remap memory address range\n"); -+ break; -+ } -+ info[count]->mem[0].memtype = UIO_MEM_PHYS; -+ -+ -+ info[count]->mem[1].addr = regs_l3ram->start; -+ if (!info[count]->mem[1].addr) { -+ dev_err(&dev->dev, "Invalid memory resource\n"); -+ break; -+ } -+ -+ info[count]->mem[1].size = regs_l3ram->end - regs_l3ram->start + 1; -+ info[count]->mem[1].internal_addr = ioremap(regs_l3ram->start, info[count]->mem[1].size); -+ -+ if (!info[count]->mem[1].internal_addr) { -+ dev_err(&dev->dev, "Can't remap memory address range\n"); -+ break; -+ } -+ info[count]->mem[1].memtype = UIO_MEM_PHYS; -+ -+ -+ info[count]->mem[2].size = regs_ddr->end - regs_ddr->start + 1; -+ if (!(info[count]->mem[2].size-1)) { -+ dev_err(&dev->dev, "Invalid memory resource\n"); -+ break; -+ } -+ -+ -+ info[count]->mem[2].internal_addr = ddr_virt_addr; -+ -+ if (!info[count]->mem[2].internal_addr) { -+ dev_err(&dev->dev, "Can't remap memory address range\n"); -+ break; -+ } -+ info[count]->mem[2].addr = ddr_phy_addr; -+ info[count]->mem[2].memtype = UIO_MEM_PHYS; -+ -+ -+ string = kzalloc(20, GFP_KERNEL); -+ sprintf(string, "pruss_evt%d", count); -+ info[count]->name = string; -+ info[count]->version = "0.01"; -+ -+ /* Register PRUSS IRQ lines */ -+ info[count]->irq = IRQ_DA8XX_EVTOUT0+count; -+ -+ info[count]->irq_flags = IRQF_SHARED; -+ info[count]->handler = pruss_handler; -+ -+ ret = uio_register_device(&dev->dev, info[count]); -+ -+ if (ret < 0) -+ break; -+ } -+ -+ platform_set_drvdata(dev, info); -+ -+ if (ret < 0) { -+ if (ddr_virt_addr) -+ dma_free_coherent(&dev->dev, regs_ddr->end - regs_ddr->start + 1, ddr_virt_addr, ddr_phy_addr); -+ while (count--) { -+ uio_unregister_device(info[count]); -+ if (info[count]->name) -+ kfree(info[count]->name); -+ iounmap(info[count]->mem[0].internal_addr); -+ } -+ } else { -+ return 0; -+ } -+ -+out_free: -+ for (count = 0; count < PRUSS_INSTANCE; count++) { -+ if (info[count]) -+ kfree(info[count]); -+ } -+ -+ if (pruss_clk != NULL) -+ clk_put(pruss_clk); -+ if (ecap0_clk != NULL) -+ clk_put(ecap0_clk); -+ -+ return ret; -+} -+ -+static int __devexit pruss_remove(struct platform_device *dev) -+{ -+ int count = 0; -+ struct uio_info **info; -+ -+ info = (struct uio_info **)platform_get_drvdata(dev); -+ -+ for (count = 0; count < PRUSS_INSTANCE; count++) { -+ uio_unregister_device(info[count]); -+ if (info[count]->name) -+ kfree(info[count]->name); -+ -+ } -+ iounmap(info[0]->mem[0].internal_addr); -+ iounmap(info[0]->mem[1].internal_addr); -+ if (ddr_virt_addr) -+ dma_free_coherent(&dev->dev, info[0]->mem[2].size, info[0]->mem[2].internal_addr, info[0]->mem[2].addr); -+ -+ for (count = 0; count < PRUSS_INSTANCE; count++) { -+ if (info[count]) -+ kfree(info[count]); -+ } -+ -+ platform_set_drvdata(dev, NULL); -+ -+ if (pruss_clk != NULL) -+ clk_put(pruss_clk); -+ if (ecap0_clk != NULL) -+ clk_put(ecap0_clk); -+ -+ -+ return 0; -+} -+ -+static struct platform_driver pruss_driver = { -+ .probe = pruss_probe, -+ .remove = __devexit_p(pruss_remove), -+ .driver = { -+ .name = DRV_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init pruss_init_module(void) -+{ -+ return platform_driver_register(&pruss_driver); -+} -+module_init(pruss_init_module); -+ -+static void __exit pruss_exit_module(void) -+{ -+ platform_driver_unregister(&pruss_driver); -+} -+module_exit(pruss_exit_module); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_VERSION(DRV_VERSION); -+MODULE_AUTHOR("Amit Chatterjee <amit.chatterjee@ti.com>"); --- -1.7.0.4 - diff --git a/recipes-kernel/linux/linux-davinci/omapl138/0002-uio_pruss2-Platform-changes.patch b/recipes-kernel/linux/linux-davinci/omapl138/0002-uio_pruss2-Platform-changes.patch deleted file mode 100755 index d913209..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/0002-uio_pruss2-Platform-changes.patch +++ /dev/null @@ -1,243 +0,0 @@ -From: Melissa Watkins <m-watkins@ti.com> -Date: Wed, 24 Nov 2010 04:18:07 -0600 -Subject: [PATCH 2/3] uio_pruss2: Platform changes - -Adding resources supporting the uio_pru driver within the -da850 (omapl138) device. - -Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com> -Signed-off-by: Melissa Watkins <m-watkins@ti.com> ---- - arch/arm/configs/da850_omapl138_defconfig | 8 +++- - arch/arm/mach-davinci/board-da850-evm.c | 3 + - arch/arm/mach-davinci/da850.c | 38 +++++++++++++- - arch/arm/mach-davinci/devices-da8xx.c | 75 ++++++++++++++++++++++++++++ - arch/arm/mach-davinci/include/mach/da8xx.h | 3 + - 5 files changed, 124 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/configs/da850_omapl138_defconfig b/arch/arm/configs/da850_omapl138_defconfig -index b312050..baebec8 100644 ---- a/arch/arm/configs/da850_omapl138_defconfig -+++ b/arch/arm/configs/da850_omapl138_defconfig -@@ -1361,6 +1361,7 @@ CONFIG_USB_MUSB_HDRC=y - CONFIG_USB_MUSB_SOC=y - CONFIG_USB_MUSB_HOST=y - # CONFIG_USB_MUSB_PERIPHERAL is not set -+# CONFIG_USB_MUSB_DUAL_ROLE is not set - # CONFIG_USB_MUSB_OTG is not set - CONFIG_USB_MUSB_HDRC_HCD=y - # CONFIG_MUSB_PIO_ONLY is not set -@@ -1535,7 +1536,12 @@ CONFIG_RTC_INTF_DEV=y - CONFIG_RTC_DRV_OMAP=y - # CONFIG_DMADEVICES is not set - # CONFIG_AUXDISPLAY is not set --# CONFIG_UIO is not set -+CONFIG_UIO=y -+# CONFIG_UIO_PDRV is not set -+# CONFIG_UIO_PDRV_GENIRQ is not set -+# CONFIG_UIO_SMX is not set -+# CONFIG_UIO_SERCOS3 is not set -+CONFIG_UIO_PRUSS=m - - # - # TI VLYNQ -diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c -index 009e9b5..1687c7c 100755 ---- a/arch/arm/mach-davinci/board-da850-evm.c -+++ b/arch/arm/mach-davinci/board-da850-evm.c -@@ -1070,6 +1070,9 @@ static __init void da850_evm_init(void) - - platform_device_register(&da850_gpio_i2c); - -+ /* Register PRUSS device */ -+ da8xx_register_pruss(); -+ - ret = da8xx_register_watchdog(); - if (ret) - pr_warning("da830_evm_init: watchdog registration failed: %d\n", -diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c -index 513ae85..8bd1919 100755 ---- a/arch/arm/mach-davinci/da850.c -+++ b/arch/arm/mach-davinci/da850.c -@@ -237,6 +237,13 @@ static struct clk tptc2_clk = { - .flags = ALWAYS_ENABLED, - }; - -+static struct clk pruss_clk = { -+ .name = "pruss", -+ .parent = &pll0_sysclk2, -+ .lpsc = DA8XX_LPSC0_DMAX, -+ .flags = ALWAYS_ENABLED, -+}; -+ - static struct clk uart0_clk = { - .name = "uart0", - .parent = &pll0_sysclk2, -@@ -385,13 +392,37 @@ static struct clk usb20_clk = { - .gpsc = 1, - }; - -- - static struct clk sata_clk = { - .name = "ahci", - .parent = &pll0_sysclk2, - .lpsc = DA850_LPSC1_SATA, - .gpsc = 1, - }; -+ -+static struct clk ecap0_clk = { -+ .name = "ecap0", -+ .parent = &pll0_sysclk2, -+ .lpsc = DA8XX_LPSC1_ECAP, -+ .flags = DA850_CLK_ASYNC3, -+ .gpsc = 1, -+}; -+ -+static struct clk ecap1_clk = { -+ .name = "ecap1", -+ .parent = &pll0_sysclk2, -+ .lpsc = DA8XX_LPSC1_ECAP, -+ .flags = DA850_CLK_ASYNC3, -+ .gpsc = 1, -+}; -+ -+static struct clk ecap2_clk = { -+ .name = "ecap2", -+ .parent = &pll0_sysclk2, -+ .lpsc = DA8XX_LPSC1_ECAP, -+ .flags = DA850_CLK_ASYNC3, -+ .gpsc = 1, -+}; -+ - static struct clk_lookup da850_clks[] = { - CLK(NULL, "ref", &ref_clk), - CLK(NULL, "pll0", &pll0_clk), -@@ -419,6 +450,7 @@ static struct clk_lookup da850_clks[] = { - CLK(NULL, "tptc1", &tptc1_clk), - CLK(NULL, "tpcc1", &tpcc1_clk), - CLK(NULL, "tptc2", &tptc2_clk), -+ CLK(NULL, "pruss", &pruss_clk), - CLK(NULL, "uart0", &uart0_clk), - CLK(NULL, "uart1", &uart1_clk), - CLK(NULL, "uart2", &uart2_clk), -@@ -441,7 +473,9 @@ static struct clk_lookup da850_clks[] = { - CLK(NULL, "usb11", &usb11_clk), - CLK(NULL, "usb20", &usb20_clk), - CLK(NULL, "ahci", &sata_clk), -- -+ CLK(NULL, "ecap0", &ecap0_clk), -+ CLK(NULL, "ecap1", &ecap1_clk), -+ CLK(NULL, "ecap2", &ecap2_clk), - CLK(NULL, NULL, NULL), - }; - -diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c -index 0842590..94979b3 100755 ---- a/arch/arm/mach-davinci/devices-da8xx.c -+++ b/arch/arm/mach-davinci/devices-da8xx.c -@@ -972,6 +972,81 @@ int __init da8xx_register_sata(void) - return platform_device_register(&da850_ahci_device); - } - -+static struct resource pruss_resources[] = { -+ [0] = { -+ .start = DA8XX_PRUSS_BASE, -+ .end = DA8XX_PRUSS_BASE + SZ_64K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = DA8XX_L3RAM_BASE, -+ .end = DA8XX_L3RAM_BASE + SZ_128K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [2] = { -+ .start = 0, -+ .end = SZ_256K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ -+ [3] = { -+ .start = IRQ_DA8XX_EVTOUT0, -+ .end = IRQ_DA8XX_EVTOUT0, -+ .flags = IORESOURCE_IRQ, -+ }, -+ [4] = { -+ .start = IRQ_DA8XX_EVTOUT1, -+ .end = IRQ_DA8XX_EVTOUT1, -+ .flags = IORESOURCE_IRQ, -+ }, -+ [5] = { -+ .start = IRQ_DA8XX_EVTOUT2, -+ .end = IRQ_DA8XX_EVTOUT2, -+ .flags = IORESOURCE_IRQ, -+ }, -+ [6] = { -+ .start = IRQ_DA8XX_EVTOUT3, -+ .end = IRQ_DA8XX_EVTOUT3, -+ .flags = IORESOURCE_IRQ, -+ }, -+ [7] = { -+ .start = IRQ_DA8XX_EVTOUT4, -+ .end = IRQ_DA8XX_EVTOUT4, -+ .flags = IORESOURCE_IRQ, -+ }, -+ [8] = { -+ .start = IRQ_DA8XX_EVTOUT5, -+ .end = IRQ_DA8XX_EVTOUT5, -+ .flags = IORESOURCE_IRQ, -+ }, -+ [9] = { -+ .start = IRQ_DA8XX_EVTOUT6, -+ .end = IRQ_DA8XX_EVTOUT6, -+ .flags = IORESOURCE_IRQ, -+ }, -+ [10] = { -+ .start = IRQ_DA8XX_EVTOUT7, -+ .end = IRQ_DA8XX_EVTOUT7, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device pruss_device = { -+ .name = "pruss", -+ .id = 0, -+ .num_resources = ARRAY_SIZE(pruss_resources), -+ .resource = pruss_resources, -+ .dev = { -+ .coherent_dma_mask = 0xffffffff, -+ } -+ -+}; -+ -+int __init da8xx_register_pruss() -+{ -+ return platform_device_register(&pruss_device); -+} -+ - #define CFGCHIP2 DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG) - /* - * Configure the USB PHY for DA8xx platforms. -diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h -index f76433f..632d7e2 100755 ---- a/arch/arm/mach-davinci/include/mach/da8xx.h -+++ b/arch/arm/mach-davinci/include/mach/da8xx.h -@@ -75,6 +75,8 @@ extern void __iomem *da8xx_syscfg1_base; - #define DA8XX_USB0_BASE 0x01e00000 - #define DA850_SATA_BASE 0x01E18000 - #define DA850_SATA_CLK_PWRDN 0x01E2C018 -+#define DA8XX_PRUSS_BASE 0x01C30000 -+#define DA8XX_L3RAM_BASE 0x80000000 - - #define PINMUX0 0x00 - #define PINMUX1 0x04 -@@ -162,6 +164,7 @@ int __init da850_register_vpif_capture(struct vpif_capture_config - - int cppi41_init(void); - int da8xx_register_sata(void); -+int da8xx_register_pruss(void); - - - extern struct platform_device da8xx_serial_device; --- -1.7.0.4 - diff --git a/recipes-kernel/linux/linux-davinci/omapl138/0003-uio_pruss3-Workarounds-put-into-core-code.patch b/recipes-kernel/linux/linux-davinci/omapl138/0003-uio_pruss3-Workarounds-put-into-core-code.patch deleted file mode 100755 index a734510..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/0003-uio_pruss3-Workarounds-put-into-core-code.patch +++ /dev/null @@ -1,45 +0,0 @@ -From: Melissa Watkins <m-watkins@ti.com> -Date: Wed, 24 Nov 2010 04:20:24 -0600 -Subject: [PATCH 3/3] uio_pruss3: Workarounds put into core code to support our devices - -This patch modifies uio.c to support the uio_pruss driver. The UIO user space module relies on IO memory being mapped to user space. The IO map works fine for all mapped virtual addresses less than 0x80000000. However for the uio_pruss driver, the virtual address is on the higher side, so it fails. The fix added in this patch is mainly to check if the page map returned is correct. - -Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com> -Signed-off-by: Melissa Watkins <m-watkins@ti.com> ---- - drivers/uio/uio.c | 9 +++++++-- - 1 files changed, 7 insertions(+), 2 deletions(-) - -diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c -index e941367..3241d26 100644 ---- a/drivers/uio/uio.c -+++ b/drivers/uio/uio.c -@@ -19,7 +19,6 @@ - #include <linux/device.h> - #include <linux/mm.h> - #include <linux/idr.h> --#include <linux/sched.h> - #include <linux/string.h> - #include <linux/kobject.h> - #include <linux/uio_driver.h> -@@ -615,7 +615,7 @@ static int uio_find_mem_index(struct vm_area_struct *vma) - for (mi = 0; mi < MAX_UIO_MAPS; mi++) { - if (idev->info->mem[mi].size == 0) - return -1; -- if (vma->vm_pgoff == mi) -+ if ((idev->info->mem[mi].addr) >> PAGE_SHIFT == vma->vm_pgoff) - return mi; - } - return -1; -@@ -659,7 +664,7 @@ static int uio_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf) - return 0; - } - --static const struct vm_operations_struct uio_vm_ops = { -+static struct vm_operations_struct uio_vm_ops = { - .open = uio_vma_open, - .close = uio_vma_close, - .fault = uio_vma_fault, --- -1.7.0.4 - diff --git a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig b/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig deleted file mode 100644 index b312050..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig +++ /dev/null @@ -1,1876 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc4 -# Thu Feb 18 17:57:55 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_LZO is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -CONFIG_LBDAF=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -CONFIG_ARCH_DAVINCI=y -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set -CONFIG_CP_INTC=y - -# -# TI DaVinci Implementations -# - -# -# DaVinci Core Type -# -# CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM355 is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set -# CONFIG_ARCH_DAVINCI_DA830 is not set -CONFIG_ARCH_DAVINCI_DA850=y -# CONFIG_DA8XX_MAX_SPEED_300 is not set -# CONFIG_DA8XX_MAX_SPEED_372 is not set -# CONFIG_DA8XX_MAX_SPEED_408 is not set -CONFIG_DA8XX_MAX_SPEED_456=y -CONFIG_ARCH_DAVINCI_DA8XX=y -# CONFIG_ARCH_DAVINCI_DM365 is not set - -# -# DaVinci Board Type -# -CONFIG_MACH_DAVINCI_DA850_EVM=y -CONFIG_DA850_UI_NONE=y -# CONFIG_DA850_UI_RMII is not set -# CONFIG_DA850_UI_CLCD is not set -# CONFIG_DA850_UI_VIDEO_PORT is not set -CONFIG_DAVINCI_MUX=y -# CONFIG_DAVINCI_MUX_DEBUG is not set -# CONFIG_DAVINCI_MUX_WARNINGS is not set -CONFIG_DAVINCI_RESET_CLOCKS=y -# CONFIG_DAVINCI_MCBSP is not set - -# -# Processor Type -# -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=100 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -# CONFIG_LEDS_CPU is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y - -# -# Core Netfilter Configuration -# -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NF_CONNTRACK is not set -# CONFIG_NETFILTER_XTABLES is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -# CONFIG_NF_DEFRAG_IPV4 is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# IPv6: Netfilter Configuration -# -# CONFIG_IP6_NF_QUEUE is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_DEVTMPFS is not set -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=y -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -CONFIG_ATA=y -# CONFIG_ATA_NONSTANDARD is not set -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_SATA_PMP=y -CONFIG_SATA_AHCI=y -# CONFIG_ATA_SFF is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_LXT_PHY=y -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -CONFIG_LSI_ET1011C_PHY=y -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_XTKBD=m -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_TOUCHSCREEN_TPS6507X=y -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_DAVINCI=y -# CONFIG_I2C_DESIGNWARE is not set -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_DAVINCI_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TPS6507x=y -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -CONFIG_REGULATOR_TPS6507X=y -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=y - -# -# Multimedia drivers -# -CONFIG_IR_CORE=y -CONFIG_VIDEO_IR=y -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=y -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -# CONFIG_VIDEO_IR_I2C is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set -# CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE is not set -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_IBMCAM is not set -# CONFIG_USB_KONICAWC is not set -# CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set -# CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_USB_OV511 is not set -# CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set -# CONFIG_USB_PWC is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_DAVINCI is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_FB_DA8XX=y -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -# CONFIG_SND_USB_CAIAQ is not set -CONFIG_SND_SOC=y -CONFIG_SND_DAVINCI_SOC=y -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DA850_SOC_EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC3X=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_OTG is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_INVENTRA_DMA is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_DAVINCI=y -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_OMAP=y -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -# CONFIG_FUSE_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_CRAMFS=y -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_MEMORY_INIT is not set -CONFIG_FRAME_POINTER=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_ARM_UNWIND is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -# CONFIG_CRC16 is not set -CONFIG_CRC_T10DIF=m -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_mmcpm_stats b/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_mmcpm_stats deleted file mode 100644 index 4836640..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_mmcpm_stats +++ /dev/null @@ -1,1917 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc4 -# Mon Feb 15 17:04:00 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_LZO is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -CONFIG_LBDAF=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -CONFIG_ARCH_DAVINCI=y -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set -CONFIG_CP_INTC=y - -# -# TI DaVinci Implementations -# - -# -# DaVinci Core Type -# -# CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM355 is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set -# CONFIG_ARCH_DAVINCI_DA830 is not set -CONFIG_ARCH_DAVINCI_DA850=y -CONFIG_DA8XX_MAX_SPEED_300=y -# CONFIG_DA8XX_MAX_SPEED_372 is not set -# CONFIG_DA8XX_MAX_SPEED_408 is not set -# CONFIG_DA8XX_MAX_SPEED_456 is not set -CONFIG_ARCH_DAVINCI_DA8XX=y -# CONFIG_ARCH_DAVINCI_DM365 is not set - -# -# DaVinci Board Type -# -CONFIG_MACH_DAVINCI_DA850_EVM=y -CONFIG_DA850_UI_NONE=y -# CONFIG_DA850_UI_RMII is not set -# CONFIG_DA850_UI_CLCD is not set -# CONFIG_DA850_UI_VIDEO_PORT is not set -CONFIG_DAVINCI_MUX=y -# CONFIG_DAVINCI_MUX_DEBUG is not set -# CONFIG_DAVINCI_MUX_WARNINGS is not set -CONFIG_DAVINCI_RESET_CLOCKS=y -# CONFIG_DAVINCI_MCBSP is not set - -# -# Processor Type -# -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=100 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -# CONFIG_LEDS_CPU is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y - -# -# Core Netfilter Configuration -# -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NF_CONNTRACK is not set -# CONFIG_NETFILTER_XTABLES is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -# CONFIG_NF_DEFRAG_IPV4 is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# IPv6: Netfilter Configuration -# -# CONFIG_IP6_NF_QUEUE is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_DEVTMPFS is not set -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=y -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_LXT_PHY=y -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -CONFIG_LSI_ET1011C_PHY=y -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_XTKBD=m -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_TOUCHSCREEN_TPS6507X=y -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_DAVINCI=y -# CONFIG_I2C_DESIGNWARE is not set -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_DAVINCI_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TPS6507x=y -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -CONFIG_REGULATOR_TPS6507X=y -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=y - -# -# Multimedia drivers -# -CONFIG_IR_CORE=y -CONFIG_VIDEO_IR=y -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=y -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -# CONFIG_VIDEO_IR_I2C is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set -# CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE is not set -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_IBMCAM is not set -# CONFIG_USB_KONICAWC is not set -# CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set -# CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_USB_OV511 is not set -# CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set -# CONFIG_USB_PWC is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_DAVINCI is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_FB_DA8XX=y -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -# CONFIG_SND_USB_CAIAQ is not set -CONFIG_SND_SOC=y -CONFIG_SND_DAVINCI_SOC=y -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DA850_SOC_EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC3X=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_OTG is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_INVENTRA_DMA is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_DAVINCI=y -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_OMAP=y -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -# CONFIG_FUSE_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_CRAMFS=y -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHEDSTATS is not set -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -CONFIG_FRAME_POINTER=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -# CONFIG_ARM_UNWIND is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -# CONFIG_CRC16 is not set -CONFIG_CRC_T10DIF=m -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_nandnommc b/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_nandnommc deleted file mode 100644 index 8b55763..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_nandnommc +++ /dev/null @@ -1,1886 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc4 -# Thu Feb 18 17:57:55 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_LZO is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -CONFIG_LBDAF=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -CONFIG_ARCH_DAVINCI=y -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set -CONFIG_CP_INTC=y - -# -# TI DaVinci Implementations -# - -# -# DaVinci Core Type -# -# CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM355 is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set -# CONFIG_ARCH_DAVINCI_DA830 is not set -CONFIG_ARCH_DAVINCI_DA850=y -# CONFIG_DA8XX_MAX_SPEED_300 is not set -# CONFIG_DA8XX_MAX_SPEED_372 is not set -# CONFIG_DA8XX_MAX_SPEED_408 is not set -CONFIG_DA8XX_MAX_SPEED_456=y -CONFIG_ARCH_DAVINCI_DA8XX=y -# CONFIG_ARCH_DAVINCI_DM365 is not set - -# -# DaVinci Board Type -# -CONFIG_MACH_DAVINCI_DA850_EVM=y -CONFIG_DA850_UI_NONE=y -# CONFIG_DA850_UI_RMII is not set -# CONFIG_DA850_UI_CLCD is not set -# CONFIG_DA850_UI_VIDEO_PORT is not set -CONFIG_DAVINCI_MUX=y -# CONFIG_DAVINCI_MUX_DEBUG is not set -# CONFIG_DAVINCI_MUX_WARNINGS is not set -CONFIG_DAVINCI_RESET_CLOCKS=y -# CONFIG_DAVINCI_MCBSP is not set - -# -# Processor Type -# -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=100 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -# CONFIG_LEDS_CPU is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y - -# -# Core Netfilter Configuration -# -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NF_CONNTRACK is not set -# CONFIG_NETFILTER_XTABLES is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -# CONFIG_NF_DEFRAG_IPV4 is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# IPv6: Netfilter Configuration -# -# CONFIG_IP6_NF_QUEUE is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_DEVTMPFS is not set -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=y -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -CONFIG_MTD_NAND_DAVINCI=y -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -CONFIG_ATA=y -# CONFIG_ATA_NONSTANDARD is not set -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_SATA_PMP=y -CONFIG_SATA_AHCI=y -# CONFIG_ATA_SFF is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_LXT_PHY=y -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -CONFIG_LSI_ET1011C_PHY=y -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_XTKBD=m -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_TOUCHSCREEN_TPS6507X=y -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_DAVINCI=y -# CONFIG_I2C_DESIGNWARE is not set -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_DAVINCI_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TPS6507x=y -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -CONFIG_REGULATOR_TPS6507X=y -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=y - -# -# Multimedia drivers -# -CONFIG_IR_CORE=y -CONFIG_VIDEO_IR=y -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=y -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -# CONFIG_VIDEO_IR_I2C is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set -# CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE is not set -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_IBMCAM is not set -# CONFIG_USB_KONICAWC is not set -# CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set -# CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_USB_OV511 is not set -# CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set -# CONFIG_USB_PWC is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_DAVINCI is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_FB_DA8XX=y -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -# CONFIG_SND_USB_CAIAQ is not set -CONFIG_SND_SOC=y -CONFIG_SND_DAVINCI_SOC=y -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DA850_SOC_EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC3X=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_OTG is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_INVENTRA_DMA is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -# CONFIG_MMC_DAVINCI is not set -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_OMAP=y -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -# CONFIG_FUSE_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_CRAMFS=y -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_MEMORY_INIT is not set -CONFIG_FRAME_POINTER=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_ARM_UNWIND is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -# CONFIG_CRC16 is not set -CONFIG_CRC_T10DIF=m -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_uivideocap b/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_uivideocap deleted file mode 100644 index 0597147..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_uivideocap +++ /dev/null @@ -1,1874 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc4 -# Mon Feb 15 17:09:13 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_LZO is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -CONFIG_LBDAF=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -CONFIG_ARCH_DAVINCI=y -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set -CONFIG_CP_INTC=y - -# -# TI DaVinci Implementations -# - -# -# DaVinci Core Type -# -# CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM355 is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set -# CONFIG_ARCH_DAVINCI_DA830 is not set -CONFIG_ARCH_DAVINCI_DA850=y -CONFIG_DA8XX_MAX_SPEED_300=y -# CONFIG_DA8XX_MAX_SPEED_372 is not set -# CONFIG_DA8XX_MAX_SPEED_408 is not set -# CONFIG_DA8XX_MAX_SPEED_456 is not set -CONFIG_ARCH_DAVINCI_DA8XX=y -# CONFIG_ARCH_DAVINCI_DM365 is not set - -# -# DaVinci Board Type -# -CONFIG_MACH_DAVINCI_DA850_EVM=y -# CONFIG_DA850_UI_NONE is not set -# CONFIG_DA850_UI_RMII is not set -# CONFIG_DA850_UI_CLCD is not set -CONFIG_DA850_UI_VIDEO_PORT=y -CONFIG_DAVINCI_MUX=y -# CONFIG_DAVINCI_MUX_DEBUG is not set -# CONFIG_DAVINCI_MUX_WARNINGS is not set -CONFIG_DAVINCI_RESET_CLOCKS=y -# CONFIG_DAVINCI_MCBSP is not set - -# -# Processor Type -# -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=100 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -# CONFIG_LEDS_CPU is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y - -# -# Core Netfilter Configuration -# -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NF_CONNTRACK is not set -# CONFIG_NETFILTER_XTABLES is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -# CONFIG_NF_DEFRAG_IPV4 is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# IPv6: Netfilter Configuration -# -# CONFIG_IP6_NF_QUEUE is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_DEVTMPFS is not set -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=y -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_LXT_PHY=y -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -CONFIG_LSI_ET1011C_PHY=y -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_XTKBD=m -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_TOUCHSCREEN_TPS6507X=y -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_DAVINCI=y -# CONFIG_I2C_DESIGNWARE is not set -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_DAVINCI_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TPS6507x=y -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -CONFIG_REGULATOR_TPS6507X=y -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=y - -# -# Multimedia drivers -# -CONFIG_IR_CORE=y -CONFIG_VIDEO_IR=y -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=y -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -# CONFIG_VIDEO_IR_I2C is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y -CONFIG_VIDEO_DAVINCI_VPIF=y -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_IBMCAM is not set -# CONFIG_USB_KONICAWC is not set -# CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set -# CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_USB_OV511 is not set -# CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set -# CONFIG_USB_PWC is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_DAVINCI is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_FB_DA8XX=y -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -# CONFIG_SND_USB_CAIAQ is not set -CONFIG_SND_SOC=y -CONFIG_SND_DAVINCI_SOC=y -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DA850_SOC_EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC3X=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_OTG is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_INVENTRA_DMA is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_DAVINCI=y -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_OMAP=y -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -# CONFIG_FUSE_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_CRAMFS=y -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_MEMORY_INIT is not set -CONFIG_FRAME_POINTER=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_ARM_UNWIND is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -# CONFIG_CRC16 is not set -CONFIG_CRC_T10DIF=m -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_uivideocapdis b/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_uivideocapdis deleted file mode 100644 index 5f40d99..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig_uivideocapdis +++ /dev/null @@ -1,1874 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc4 -# Mon Feb 15 17:09:55 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_LZO is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -CONFIG_LBDAF=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -CONFIG_ARCH_DAVINCI=y -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set -CONFIG_CP_INTC=y - -# -# TI DaVinci Implementations -# - -# -# DaVinci Core Type -# -# CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM355 is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set -# CONFIG_ARCH_DAVINCI_DA830 is not set -CONFIG_ARCH_DAVINCI_DA850=y -CONFIG_DA8XX_MAX_SPEED_300=y -# CONFIG_DA8XX_MAX_SPEED_372 is not set -# CONFIG_DA8XX_MAX_SPEED_408 is not set -# CONFIG_DA8XX_MAX_SPEED_456 is not set -CONFIG_ARCH_DAVINCI_DA8XX=y -# CONFIG_ARCH_DAVINCI_DM365 is not set - -# -# DaVinci Board Type -# -CONFIG_MACH_DAVINCI_DA850_EVM=y -# CONFIG_DA850_UI_NONE is not set -# CONFIG_DA850_UI_RMII is not set -# CONFIG_DA850_UI_CLCD is not set -CONFIG_DA850_UI_VIDEO_PORT=y -CONFIG_DAVINCI_MUX=y -# CONFIG_DAVINCI_MUX_DEBUG is not set -# CONFIG_DAVINCI_MUX_WARNINGS is not set -CONFIG_DAVINCI_RESET_CLOCKS=y -# CONFIG_DAVINCI_MCBSP is not set - -# -# Processor Type -# -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=100 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -# CONFIG_LEDS_CPU is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y - -# -# Core Netfilter Configuration -# -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NF_CONNTRACK is not set -# CONFIG_NETFILTER_XTABLES is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -# CONFIG_NF_DEFRAG_IPV4 is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# IPv6: Netfilter Configuration -# -# CONFIG_IP6_NF_QUEUE is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_DEVTMPFS is not set -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=y -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_LXT_PHY=y -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -CONFIG_LSI_ET1011C_PHY=y -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_XTKBD=m -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_TOUCHSCREEN_TPS6507X=y -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_DAVINCI=y -# CONFIG_I2C_DESIGNWARE is not set -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_DAVINCI_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TPS6507x=y -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -CONFIG_REGULATOR_TPS6507X=y -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=y - -# -# Multimedia drivers -# -CONFIG_IR_CORE=y -CONFIG_VIDEO_IR=y -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=y -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -# CONFIG_VIDEO_IR_I2C is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -CONFIG_VIDEO_THS7303=y -CONFIG_VIDEO_ADV7343=y - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY=y -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y -CONFIG_VIDEO_DAVINCI_VPIF=y -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_IBMCAM is not set -# CONFIG_USB_KONICAWC is not set -# CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set -# CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_USB_OV511 is not set -# CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set -# CONFIG_USB_PWC is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_DAVINCI is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_FB_DA8XX=y -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -# CONFIG_SND_USB_CAIAQ is not set -CONFIG_SND_SOC=y -CONFIG_SND_DAVINCI_SOC=y -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DA850_SOC_EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC3X=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_OTG is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_INVENTRA_DMA is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_DAVINCI=y -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_OMAP=y -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -# CONFIG_FUSE_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_CRAMFS=y -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_MEMORY_INIT is not set -CONFIG_FRAME_POINTER=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_ARM_UNWIND is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -# CONFIG_CRC16 is not set -CONFIG_CRC_T10DIF=m -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-davinci/omapl138/defconfig b/recipes-kernel/linux/linux-davinci/omapl138/defconfig deleted file mode 100644 index ad52484..0000000 --- a/recipes-kernel/linux/linux-davinci/omapl138/defconfig +++ /dev/null @@ -1,1951 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc4 -# Mon Feb 15 17:08:11 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_LZO is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -CONFIG_LBDAF=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -CONFIG_ARCH_DAVINCI=y -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set -CONFIG_CP_INTC=y - -# -# TI DaVinci Implementations -# - -# -# DaVinci Core Type -# -# CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM355 is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set -# CONFIG_ARCH_DAVINCI_DA830 is not set -CONFIG_ARCH_DAVINCI_DA850=y -CONFIG_DA8XX_MAX_SPEED_300=y -# CONFIG_DA8XX_MAX_SPEED_372 is not set -# CONFIG_DA8XX_MAX_SPEED_408 is not set -# CONFIG_DA8XX_MAX_SPEED_456 is not set -CONFIG_ARCH_DAVINCI_DA8XX=y -# CONFIG_ARCH_DAVINCI_DM365 is not set - -# -# DaVinci Board Type -# -CONFIG_MACH_DAVINCI_DA850_EVM=y -# CONFIG_DA850_UI_NONE is not set -# CONFIG_DA850_UI_RMII is not set -# CONFIG_DA850_UI_CLCD is not set -CONFIG_DA850_UI_VIDEO_PORT=y -CONFIG_DAVINCI_MUX=y -# CONFIG_DAVINCI_MUX_DEBUG is not set -# CONFIG_DAVINCI_MUX_WARNINGS is not set -CONFIG_DAVINCI_RESET_CLOCKS=y -# CONFIG_DAVINCI_MCBSP is not set - -# -# Processor Type -# -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=100 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -# CONFIG_LEDS_CPU is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y - -# -# Core Netfilter Configuration -# -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NF_CONNTRACK is not set -# CONFIG_NETFILTER_XTABLES is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -# CONFIG_NF_DEFRAG_IPV4 is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# IPv6: Netfilter Configuration -# -# CONFIG_IP6_NF_QUEUE is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_DEVTMPFS is not set -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -CONFIG_MTD_M25P80=y -CONFIG_M25PXX_USE_FAST_READ=y -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=1 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -CONFIG_ATA=y -# CONFIG_ATA_NONSTANDARD is not set -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_SATA_PMP=y -CONFIG_SATA_AHCI=y -CONFIG_ATA_SFF=y -# CONFIG_SATA_MV is not set -# CONFIG_PATA_PLATFORM is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=y -CONFIG_MD_AUTODETECT=y -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -CONFIG_ASYNC_RAID6_TEST=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -# CONFIG_BLK_DEV_DM is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_LXT_PHY=y -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -CONFIG_LSI_ET1011C_PHY=y -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=m -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_XTKBD=m -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_TOUCHSCREEN_TPS6507X=y -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_DAVINCI=y -# CONFIG_I2C_DESIGNWARE is not set -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_DAVINCI_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TPS6507x=y -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -CONFIG_REGULATOR_TPS6507X=y -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=y - -# -# Multimedia drivers -# -CONFIG_IR_CORE=y -CONFIG_VIDEO_IR=y -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=y -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -# CONFIG_VIDEO_IR_I2C is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y -CONFIG_VIDEO_DAVINCI_VPIF=y -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_IBMCAM is not set -# CONFIG_USB_KONICAWC is not set -# CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set -# CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_USB_OV511 is not set -# CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set -# CONFIG_USB_PWC is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_DAVINCI is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_FB_DA8XX=y -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -# CONFIG_SND_USB_CAIAQ is not set -CONFIG_SND_SOC=y -CONFIG_SND_DAVINCI_SOC=y -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DA850_SOC_EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC3X=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_DUAL_ROLE is not set -# CONFIG_USB_MUSB_OTG is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_INVENTRA_DMA is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_DAVINCI=y -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_OMAP=y -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=y -# CONFIG_UIO_PDRV is not set -# CONFIG_UIO_PDRV_GENIRQ is not set -# CONFIG_UIO_SMX is not set -# CONFIG_UIO_SERCOS3 is not set -CONFIG_UIO_PRUSS=m - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -# CONFIG_FUSE_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_CRAMFS=y -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHEDSTATS is not set -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -CONFIG_FRAME_POINTER=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -# CONFIG_ARM_UNWIND is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -# CONFIG_CRC16 is not set -CONFIG_CRC_T10DIF=m -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git 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b/recipes-kernel/linux/linux-davinci/update-mach-types.patch deleted file mode 100644 index f72836b..0000000 --- a/recipes-kernel/linux/linux-davinci/update-mach-types.patch +++ /dev/null @@ -1,160 +0,0 @@ ---- /tmp/mach-types 2009-03-17 16:55:42.000000000 +0100 -+++ git/arch/arm/tools/mach-types 2009-03-17 16:56:28.000000000 +0100 -@@ -12,7 +12,7 @@ - # - # http://www.arm.linux.org.uk/developer/machines/?action=new - # --# Last update: Sun Nov 30 16:39:36 2008 -+# Last update: Tue Mar 17 15:56:28 2009 - # - # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number - # -@@ -1811,7 +1811,7 @@ - jade MACH_JADE JADE 1821 - ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822 - gprisc3 MACH_GPRISC3 GPRISC3 1823 --stamp9260 MACH_STAMP9260 STAMP9260 1824 -+stamp9g20 MACH_STAMP9G20 STAMP9G20 1824 - smdk6430 MACH_SMDK6430 SMDK6430 1825 - smdkc100 MACH_SMDKC100 SMDKC100 1826 - tavorevb MACH_TAVOREVB TAVOREVB 1827 -@@ -1993,4 +1993,138 @@ - benzina MACH_BENZINA BENZINA 2003 - blaze MACH_BLAZE BLAZE 2004 - linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005 --htcvenus MACH_HTCVENUS HTCVENUS 2006 -+htckovsky MACH_HTCVENUS HTCVENUS 2006 -+sony_prs505 MACH_SONY_PRS505 SONY_PRS505 2007 -+hanlin_v3 MACH_HANLIN_V3 HANLIN_V3 2008 -+sapphira MACH_SAPPHIRA SAPPHIRA 2009 -+dack_sda_01 MACH_DACK_SDA_01 DACK_SDA_01 2010 -+armbox MACH_ARMBOX ARMBOX 2011 -+harris_rvp MACH_HARRIS_RVP HARRIS_RVP 2012 -+ribaldo MACH_RIBALDO RIBALDO 2013 -+agora MACH_AGORA AGORA 2014 -+omap3_mini MACH_OMAP3_MINI OMAP3_MINI 2015 -+a9sam6432_b MACH_A9SAM6432_B A9SAM6432_B 2016 -+usg2410 MACH_USG2410 USG2410 2017 -+pc72052_i10_revb MACH_PC72052_I10_REVB PC72052_I10_REVB 2018 -+mx35_exm32 MACH_MX35_EXM32 MX35_EXM32 2019 -+topas910 MACH_TOPAS910 TOPAS910 2020 -+hyena MACH_HYENA HYENA 2021 -+pospax MACH_POSPAX POSPAX 2022 -+hdl_gx MACH_HDL_GX HDL_GX 2023 -+ctera_4bay MACH_CTERA_4BAY CTERA_4BAY 2024 -+ctera_plug_c MACH_CTERA_PLUG_C CTERA_PLUG_C 2025 -+crwea_plug_i MACH_CRWEA_PLUG_I CRWEA_PLUG_I 2026 -+egauge2 MACH_EGAUGE2 EGAUGE2 2027 -+didj MACH_DIDJ DIDJ 2028 -+m_s3c2443 MACH_MEISTER MEISTER 2029 -+htcblackstone MACH_HTCBLACKSTONE HTCBLACKSTONE 2030 -+cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031 -+smdk6440 MACH_SMDK6440 SMDK6440 2032 -+omap_35xx_mvp MACH_OMAP_35XX_MVP OMAP_35XX_MVP 2033 -+ctera_plug_i MACH_CTERA_PLUG_I CTERA_PLUG_I 2034 -+pvg610_100 MACH_PVG610 PVG610 2035 -+hprw6815 MACH_HPRW6815 HPRW6815 2036 -+omap3_oswald MACH_OMAP3_OSWALD OMAP3_OSWALD 2037 -+nas4220b MACH_NAS4220B NAS4220B 2038 -+htcraphael_cdma MACH_HTCRAPHAEL_CDMA HTCRAPHAEL_CDMA 2039 -+htcdiamond_cdma MACH_HTCDIAMOND_CDMA HTCDIAMOND_CDMA 2040 -+scaler MACH_SCALER SCALER 2041 -+zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042 -+aspenite MACH_ASPENITE ASPENITE 2043 -+teton MACH_TETON TETON 2044 -+ttc_dkb MACH_TTC_DKB TTC_DKB 2045 -+bishop2 MACH_BISHOP2 BISHOP2 2046 -+ippv5 MACH_IPPV5 IPPV5 2047 -+farm926 MACH_FARM926 FARM926 2048 -+mmccpu MACH_MMCCPU MMCCPU 2049 -+sgmsfl MACH_SGMSFL SGMSFL 2050 -+tt8000 MACH_TT8000 TT8000 2051 -+zrn4300lp MACH_ZRN4300LP ZRN4300LP 2052 -+mptc MACH_MPTC MPTC 2053 -+h6051 MACH_H6051 H6051 2054 -+pvg610_101 MACH_PVG610_101 PVG610_101 2055 -+stamp9261_pc_evb MACH_STAMP9261_PC_EVB STAMP9261_PC_EVB 2056 -+pelco_odysseus MACH_PELCO_ODYSSEUS PELCO_ODYSSEUS 2057 -+tny_a9260 MACH_TNY_A9260 TNY_A9260 2058 -+tny_a9g20 MACH_TNY_A9G20 TNY_A9G20 2059 -+aesop_mp2530f MACH_AESOP_MP2530F AESOP_MP2530F 2060 -+dx900 MACH_DX900 DX900 2061 -+cpodc2 MACH_CPODC2 CPODC2 2062 -+tilt_8925 MACH_TILT_8925 TILT_8925 2063 -+davinci_dm357_evm MACH_DAVINCI_DM357_EVM DAVINCI_DM357_EVM 2064 -+swordfish MACH_SWORDFISH SWORDFISH 2065 -+corvus MACH_CORVUS CORVUS 2066 -+taurus MACH_TAURUS TAURUS 2067 -+axm MACH_AXM AXM 2068 -+axc MACH_AXC AXC 2069 -+baby MACH_BABY BABY 2070 -+mp200 MACH_MP200 MP200 2071 -+pcm043 MACH_PCM043 PCM043 2072 -+hanlin_v3c MACH_HANLIN_V3C HANLIN_V3C 2073 -+kbk9g20 MACH_KBK9G20 KBK9G20 2074 -+adsturbog5 MACH_ADSTURBOG5 ADSTURBOG5 2075 -+avenger_lite1 MACH_AVENGER_LITE1 AVENGER_LITE1 2076 -+suc82x MACH_SUC SUC 2077 -+at91sam7s256 MACH_AT91SAM7S256 AT91SAM7S256 2078 -+mendoza MACH_MENDOZA MENDOZA 2079 -+kira MACH_KIRA KIRA 2080 -+mx1hbm MACH_MX1HBM MX1HBM 2081 -+quatro43xx MACH_QUATRO43XX QUATRO43XX 2082 -+quatro4230 MACH_QUATRO4230 QUATRO4230 2083 -+nsb400 MACH_NSB400 NSB400 2084 -+drp255 MACH_DRP255 DRP255 2085 -+thoth MACH_THOTH THOTH 2086 -+firestone MACH_FIRESTONE FIRESTONE 2087 -+asusp750 MACH_ASUSP750 ASUSP750 2088 -+ctera_dl MACH_CTERA_DL CTERA_DL 2089 -+socr MACH_SOCR SOCR 2090 -+htcoxygen MACH_HTCOXYGEN HTCOXYGEN 2091 -+heroc MACH_HEROC HEROC 2092 -+zeno6800 MACH_ZENO6800 ZENO6800 2093 -+sc2mcs MACH_SC2MCS SC2MCS 2094 -+gene100 MACH_GENE100 GENE100 2095 -+as353x MACH_AS353X AS353X 2096 -+sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097 -+at91sam9g20 MACH_AT91SAM9G20 AT91SAM9G20 2098 -+mv88f6192gtw_fe MACH_MV88F6192GTW_FE MV88F6192GTW_FE 2099 -+cc9200 MACH_CC9200 CC9200 2100 -+sm9200 MACH_SM9200 SM9200 2101 -+tp9200 MACH_TP9200 TP9200 2102 -+snapperdv MACH_SNAPPERDV SNAPPERDV 2103 -+avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104 -+avengers_lite1 MACH_AVENGERS_LITE1 AVENGERS_LITE1 2105 -+omap3axon MACH_OMAP3AXON OMAP3AXON 2106 -+ma8xx MACH_MA8XX MA8XX 2107 -+mp201ek MACH_MP201EK MP201EK 2108 -+davinci_tux MACH_DAVINCI_TUX DAVINCI_TUX 2109 -+mpa1600 MACH_MPA1600 MPA1600 2110 -+pelco_troy MACH_PELCO_TROY PELCO_TROY 2111 -+nsb667 MACH_NSB667 NSB667 2112 -+rovers5_4mpix MACH_ROVERS5_4MPIX ROVERS5_4MPIX 2113 -+twocom MACH_TWOCOM TWOCOM 2114 -+ubisys_p9_rcu3r2 MACH_UBISYS_P9_RCU3R2 UBISYS_P9_RCU3R2 2115 -+hero_espresso MACH_HERO_ESPRESSO HERO_ESPRESSO 2116 -+afeusb MACH_AFEUSB AFEUSB 2117 -+t830 MACH_T830 T830 2118 -+spd8020_cc MACH_SPD8020_CC SPD8020_CC 2119 -+om_3d7k MACH_OM_3D7K OM_3D7K 2120 -+picocom2 MACH_PICOCOM2 PICOCOM2 2121 -+uwg4mx27 MACH_UWG4MX27 UWG4MX27 2122 -+uwg4mx31 MACH_UWG4MX31 UWG4MX31 2123 -+cherry MACH_CHERRY CHERRY 2124 -+mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125 -+s3c2440turkiye MACH_S3C2440TURKIYE S3C2440TURKIYE 2126 -+tx37 MACH_TX37 TX37 2127 -+sbc2800_9g20 MACH_SBC2800_9G20 SBC2800_9G20 2128 -+benzglb MACH_BENZGLB BENZGLB 2129 -+benztd MACH_BENZTD BENZTD 2130 -+cartesio_plus MACH_CARTESIO_PLUS CARTESIO_PLUS 2131 -+solrad_g20 MACH_SOLRAD_G20 SOLRAD_G20 2132 -+mx27wallace MACH_MX27WALLACE MX27WALLACE 2133 -+fmzwebmodul MACH_FMZWEBMODUL FMZWEBMODUL 2134 -+rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135 -+smallogger MACH_SMALLOGGER SMALLOGGER 2136 -+ccw9p9215 MACH_CCW9P9215 CCW9P9215 2137 -+dm355_leopard MACH_DM355_LEOPARD DM355_LEOPARD 2138 -+ts219 MACH_TS219 TS219 2139 -+tny_a9263 MACH_TNY_A9263 TNY_A9263 2140 diff --git a/recipes-kernel/linux/linux-davinci_git.bb b/recipes-kernel/linux/linux-davinci_git.bb deleted file mode 100644 index 03eeb46..0000000 --- a/recipes-kernel/linux/linux-davinci_git.bb +++ /dev/null @@ -1,56 +0,0 @@ -require multi-kernel.inc - -DESCRIPTION = "Linux kernel for DaVinci processors" - -COMPATIBLE_MACHINE = "hawkboard" - -DEFAULT_PREFERENCE_hawkboard = "1" - -BRANCH = "master" - -SRC_URI_append = " file://defconfig " - -S = "${WORKDIR}/git" - -# The main PR is now using MACHINE_KERNEL_PR, for davinci see conf/machine/include/davinci.inc - -# OMAPL tracking master branch - PSP 3.20.00.12 - -ARAGO_L1_REV = "2acf935c01b9adb50164d421c40cdc5862b9e143" -ARAGO_L1_BR = "master" -ARAGO_L1_PV = "2.6.32+2.6.33-rc4-${PR}+gitr${SRCREV}" -ARAGO_L1_URI = "git://arago-project.org/git/projects/linux-omapl1.git;protocol=git;branch=${BRANCH} " - -SRCREV_hawkboard = "${ARAGO_L1_REV}" - -PV_omapl138 = "${ARAGO_L1_PV}" - -BRANCH_omapl138 = "${ARAGO_L1_BR}" - -SRC_URI_append_omapl138 = "${ARAGO_L1_URI}" - -SRC_URI_append_omapl138 = " file://logo_linux_clut224.ppm \ - file://0001-ahci-ti-Fix-currently-harmless-typo-in-SATA-PHY.patch \ - file://0002-ahci-ti-Update-SATA-PHY-configuration-RXCDR.patch \ - file://0001-board-da850-evm-Disable-NAND-SUBPAGE.patch \ - file://0001-uio_pruss1-Core-driver-addition.patch \ - file://0002-uio_pruss2-Platform-changes.patch \ - file://0003-uio_pruss3-Workarounds-put-into-core-code.patch \ - file://0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch \ - file://0001-ARM-6329-1-wire-up-sys_accept4-on-ARM.patch \ - " - -SRC_URI_append_hawkboard = " \ - file://patch-2.6.33rc4-psp-to-hawkboard.patch \ - file://0001-board-da850-hawk-Disable-NAND-SUBPAGE.patch \ - " - -# Perf in 2.6.33rc has broken perl handling, so disable it -do_compile_perf() { - : -} - -do_install_perf() { - : -} - -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 4/8] linux-davinci 2.6.32: remove old hawkboard-specific kernel 2013-09-28 22:54 ` [PATCH 4/8] linux-davinci 2.6.32: remove old hawkboard-specific kernel Denys Dmytriyenko @ 2013-09-30 14:33 ` Cooper Jr., Franklin 0 siblings, 0 replies; 13+ messages in thread From: Cooper Jr., Franklin @ 2013-09-30 14:33 UTC (permalink / raw) To: Denys Dmytriyenko, meta-ti@yoctoproject.org Acked-by: Franklin Cooper Jr. <fcooper@ti.com> > -----Original Message----- > From: meta-ti-bounces@yoctoproject.org [mailto:meta-ti- > bounces@yoctoproject.org] On Behalf Of Denys Dmytriyenko > Sent: Saturday, September 28, 2013 5:54 PM > To: meta-ti@yoctoproject.org > Subject: [meta-ti] [PATCH 4/8] linux-davinci 2.6.32: remove old hawkboard- > specific kernel > > From: Denys Dmytriyenko <denys@ti.com> > > * Hawkboard platform is not supported in meta-ti. > * Since there no new revs of the kernel, the old recipe can be picked up from > Danny or Denzil. > > Signed-off-by: Denys Dmytriyenko <denys@ti.com> > --- > ...001-ARM-6329-1-wire-up-sys_accept4-on-ARM.patch | 51 - > ...i-Fix-currently-harmless-typo-in-SATA-PHY.patch | 26 - > ...create-sys-fs-cgroup-to-mount-cgroupfs-on.patch | 58 - > ...ci-ti-Update-SATA-PHY-configuration-RXCDR.patch | 29 - > ...001-board-da850-hawk-Disable-NAND-SUBPAGE.patch | 27 - > .../linux/linux-davinci/hawkboard/configs/stock | 2630 - > .../linux/linux-davinci/hawkboard/defconfig | 2659 - > .../linux-davinci/hawkboard/logo_linux_clut224.ppm | 51363 ------------------- > .../patch-2.6.33rc4-psp-to-hawkboard.patch | 2775 - > ...0001-board-da850-evm-Disable-NAND-SUBPAGE.patch | 29 - > .../0001-uio_pruss1-Core-driver-addition.patch | 334 - > .../0002-uio_pruss2-Platform-changes.patch | 243 - > ...uio_pruss3-Workarounds-put-into-core-code.patch | 45 - > .../omapl138/configs/da850_omapl138_defconfig | 1876 - > .../configs/da850_omapl138_defconfig_mmcpm_stats | 1917 - > .../configs/da850_omapl138_defconfig_nandnommc | 1886 - > .../configs/da850_omapl138_defconfig_uivideocap | 1874 - > .../configs/da850_omapl138_defconfig_uivideocapdis | 1874 - > .../linux/linux-davinci/omapl138/defconfig | 1951 - > .../linux-davinci/omapl138/logo_linux_clut224.ppm | 21763 -------- > .../linux/linux-davinci/update-mach-types.patch | 160 - > recipes-kernel/linux/linux-davinci_git.bb | 56 - > 22 files changed, 93626 deletions(-) > delete mode 100644 recipes-kernel/linux/linux-davinci/0001-ARM-6329-1- > wire-up-sys_accept4-on-ARM.patch > delete mode 100644 recipes-kernel/linux/linux-davinci/0001-ahci-ti-Fix- > currently-harmless-typo-in-SATA-PHY.patch > delete mode 100644 recipes-kernel/linux/linux-davinci/0001-cgroupfs-create- > sys-fs-cgroup-to-mount-cgroupfs-on.patch > delete mode 100644 recipes-kernel/linux/linux-davinci/0002-ahci-ti-Update- > SATA-PHY-configuration-RXCDR.patch > delete mode 100644 recipes-kernel/linux/linux-davinci/hawkboard/0001- > board-da850-hawk-Disable-NAND-SUBPAGE.patch > delete mode 100644 recipes-kernel/linux/linux- > davinci/hawkboard/configs/stock > delete mode 100644 recipes-kernel/linux/linux-davinci/hawkboard/defconfig > delete mode 100644 recipes-kernel/linux/linux- > davinci/hawkboard/logo_linux_clut224.ppm > delete mode 100644 recipes-kernel/linux/linux-davinci/hawkboard/patch- > 2.6.33rc4-psp-to-hawkboard.patch > delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/0001-board- > da850-evm-Disable-NAND-SUBPAGE.patch > delete mode 100755 recipes-kernel/linux/linux-davinci/omapl138/0001- > uio_pruss1-Core-driver-addition.patch > delete mode 100755 recipes-kernel/linux/linux-davinci/omapl138/0002- > uio_pruss2-Platform-changes.patch > delete mode 100755 recipes-kernel/linux/linux-davinci/omapl138/0003- > uio_pruss3-Workarounds-put-into-core-code.patch > delete mode 100644 recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig > delete mode 100644 recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_mmcpm_stats > delete mode 100644 recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_nandnommc > delete mode 100644 recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_uivideocap > delete mode 100644 recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_uivideocapdis > delete mode 100644 recipes-kernel/linux/linux-davinci/omapl138/defconfig > delete mode 100644 recipes-kernel/linux/linux- > davinci/omapl138/logo_linux_clut224.ppm > delete mode 100644 recipes-kernel/linux/linux-davinci/update-mach- > types.patch > delete mode 100644 recipes-kernel/linux/linux-davinci_git.bb > > diff --git a/recipes-kernel/linux/linux-davinci/0001-ARM-6329-1-wire-up- > sys_accept4-on-ARM.patch b/recipes-kernel/linux/linux-davinci/0001-ARM- > 6329-1-wire-up-sys_accept4-on-ARM.patch > deleted file mode 100644 > index 0f4592e..0000000 > --- a/recipes-kernel/linux/linux-davinci/0001-ARM-6329-1-wire-up- > sys_accept4-on-ARM.patch > +++ /dev/null > @@ -1,51 +0,0 @@ > -From 1415ec63689ef39bcb24b5095941ec4cc884035c Mon Sep 17 00:00:00 > 2001 > -From: Mikael Pettersson <mikpe@it.uu.se> > -Date: Sun, 15 Aug 2010 10:47:23 +0100 > -Subject: [PATCH 1/2] ARM: 6329/1: wire up sys_accept4() on ARM > - > -sys_accept4() was added in kernel 2.6.28, but ARM was not updated > -to include it. The number and types of parameters is such that > -no ARM-specific processing is needed, so wiring up sys_accept4() > -just requires defining __NR_accept4 and adding a direct call in > -the syscall entry table. > - > -Tested with an EABI 2.6.35 kernel and Ulrich Drepper's original > -accept4() test program, modified to define __NR_accept4 for ARM. > - > -Using the updated unistd.h also eliminates a warning then building > -glibc (2.10.2 and newer) about accept4() being unimplemented. > - > -Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> > -Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> > ---- > - arch/arm/include/asm/unistd.h | 1 + > - arch/arm/kernel/calls.S | 1 + > - 2 files changed, 2 insertions(+), 0 deletions(-) > - > -diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h > -index dd2bf53..d02cfb6 100644 > ---- a/arch/arm/include/asm/unistd.h > -+++ b/arch/arm/include/asm/unistd.h > -@@ -392,6 +392,7 @@ > - #define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363) > - #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) > - #define __NR_recvmmsg (__NR_SYSCALL_BASE+365) > -+#define __NR_accept4 (__NR_SYSCALL_BASE+366) > - > - /* > - * The following SWIs are ARM private. > -diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S > -index 37ae301..afeb71f 100644 > ---- a/arch/arm/kernel/calls.S > -+++ b/arch/arm/kernel/calls.S > -@@ -375,6 +375,7 @@ > - CALL(sys_rt_tgsigqueueinfo) > - CALL(sys_perf_event_open) > - /* 365 */ CALL(sys_recvmmsg) > -+ CALL(sys_accept4) > - #ifndef syscalls_counted > - .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls > - #define syscalls_counted > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-davinci/0001-ahci-ti-Fix-currently- > harmless-typo-in-SATA-PHY.patch b/recipes-kernel/linux/linux-davinci/0001- > ahci-ti-Fix-currently-harmless-typo-in-SATA-PHY.patch > deleted file mode 100644 > index 5efc00d..0000000 > --- a/recipes-kernel/linux/linux-davinci/0001-ahci-ti-Fix-currently-harmless- > typo-in-SATA-PHY.patch > +++ /dev/null > @@ -1,26 +0,0 @@ > -From b0a773f958b03ba77317f8b762d90d3c00269292 Mon Sep 17 00:00:00 > 2001 > -From: Roger Monk <r-monk@ti.com> > -Date: Wed, 25 Aug 2010 16:45:46 +0100 > -Subject: [PATCH] ahci-ti: Fix (currently harmless) typo in SATA PHY > configuration > - > -Signed-off-by: Roger Monk <r-monk@ti.com> > ---- > - drivers/ata/ahci-ti.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/ata/ahci-ti.c b/drivers/ata/ahci-ti.c > -index 9e36c9d..674b216 100644 > ---- a/drivers/ata/ahci-ti.c > -+++ b/drivers/ata/ahci-ti.c > -@@ -80,7 +80,7 @@ void ata_plat_init (void __iomem *base) > - phy_val = PHY_MPY << 0 | PHY_LB << 4 | PHY_LOS << 6 | > - PHY_RXINVPAIR << 7 | PHY_RXTERM << 8 | > - PHY_RXCDR << 10 | PHY_RXEQ << 13 | > -- PHY_RXINVPAIR << 17 | PHY_TXCM << 18 | > -+ PHY_TXINVPAIR << 17 | PHY_TXCM << 18 | > - PHY_TXSWING << 19 | PHY_TXDE << 22 | > - PHY_OVERRIDE << 30 | PHY_ENPLL << 31; > - > --- > -1.6.0.4 > - > diff --git a/recipes-kernel/linux/linux-davinci/0001-cgroupfs-create-sys-fs- > cgroup-to-mount-cgroupfs-on.patch b/recipes-kernel/linux/linux-davinci/0001- > cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch > deleted file mode 100644 > index 37d5fb9..0000000 > --- a/recipes-kernel/linux/linux-davinci/0001-cgroupfs-create-sys-fs-cgroup-to- > mount-cgroupfs-on.patch > +++ /dev/null > @@ -1,58 +0,0 @@ > -From 787c524fc478068d18eef72f43074b47722e50b0 Mon Sep 17 00:00:00 > 2001 > -From: Greg KH <gregkh@suse.de> > -Date: Thu, 5 Aug 2010 13:53:35 -0700 > -Subject: [PATCH] cgroupfs: create /sys/fs/cgroup to mount cgroupfs on > - > -We really shouldn't be asking userspace to create new root filesystems. > -So follow along with all of the other in-kernel filesystems, and provide > -a mount point in sysfs. > - > -For cgroupfs, this should be in /sys/fs/cgroup/ This change provides > -that mount point when the cgroup filesystem is registered in the kernel. > - > -Acked-by: Paul Menage <menage@google.com> > -Acked-by: Dhaval Giani <dhaval.giani@gmail.com> > -Cc: Li Zefan <lizf@cn.fujitsu.com> > -Cc: Lennart Poettering <lennart@poettering.net> > -Cc: Kay Sievers <kay.sievers@vrfy.org> > -Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> > ---- > - kernel/cgroup.c | 13 ++++++++++++- > - 1 files changed, 12 insertions(+), 1 deletions(-) > - > -diff --git a/kernel/cgroup.c b/kernel/cgroup.c > -index 0249f4b..db21dd8 100644 > ---- a/kernel/cgroup.c > -+++ b/kernel/cgroup.c > -@@ -1472,6 +1472,8 @@ static struct file_system_type cgroup_fs_type = { > - .kill_sb = cgroup_kill_sb, > - }; > - > -+static struct kobject *cgroup_kobj; > -+ > - static inline struct cgroup *__d_cgrp(struct dentry *dentry) > - { > - return dentry->d_fsdata; > -@@ -3283,9 +3285,18 @@ int __init cgroup_init(void) > - hhead = css_set_hash(init_css_set.subsys); > - hlist_add_head(&init_css_set.hlist, hhead); > - BUG_ON(!init_root_id(&rootnode)); > -+ > -+ cgroup_kobj = kobject_create_and_add("cgroup", fs_kobj); > -+ if (!cgroup_kobj) { > -+ err = -ENOMEM; > -+ goto out; > -+ } > -+ > - err = register_filesystem(&cgroup_fs_type); > -- if (err < 0) > -+ if (err < 0) { > -+ kobject_put(cgroup_kobj); > - goto out; > -+ } > - > - proc_create("cgroups", 0, NULL, &proc_cgroupstats_operations); > - > --- > -1.6.6.1 > - > diff --git a/recipes-kernel/linux/linux-davinci/0002-ahci-ti-Update-SATA-PHY- > configuration-RXCDR.patch b/recipes-kernel/linux/linux-davinci/0002-ahci-ti- > Update-SATA-PHY-configuration-RXCDR.patch > deleted file mode 100644 > index d4ea6ad..0000000 > --- a/recipes-kernel/linux/linux-davinci/0002-ahci-ti-Update-SATA-PHY- > configuration-RXCDR.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From 37a7868b15be9415abd3f57477afc8be956666e6 Mon Sep 17 00:00:00 > 2001 > -From: Roger Monk <r-monk@ti.com> > -Date: Wed, 25 Aug 2010 16:46:28 +0100 > -Subject: [PATCH] ahci-ti: Update SATA PHY configuration - RXCDR --> 4 > - > - * Update SATA PHY configuration for Receiver Clock/Data Recovery > - * Set to 0x4 = 2nd order, low precision > - > -Signed-off-by: Roger Monk <r-monk@ti.com> > ---- > - drivers/ata/ahci-ti.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/drivers/ata/ahci-ti.c b/drivers/ata/ahci-ti.c > -index 674b216..853d251 100644 > ---- a/drivers/ata/ahci-ti.c > -+++ b/drivers/ata/ahci-ti.c > -@@ -55,7 +55,7 @@ void ata_plat_remove(struct ata_host *host); > - #define PHY_LOS 1 /* bit6 1 */ > - #define PHY_RXINVPAIR 0 /* bit7 1 */ > - #define PHY_RXTERM 0 /* bits9:8 2 */ > --#define PHY_RXCDR 0 /* bits12:10 3 */ > -+#define PHY_RXCDR 4 /* bits12:10 3 */ > - #define PHY_RXEQ 1 /* bits16:13 4 */ > - #define PHY_TXINVPAIR 0 /* bit17 1 */ > - #define PHY_TXCM 0 /* bit18 1 */ > --- > -1.6.0.4 > - > diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/0001-board-da850- > hawk-Disable-NAND-SUBPAGE.patch b/recipes-kernel/linux/linux- > davinci/hawkboard/0001-board-da850-hawk-Disable-NAND-SUBPAGE.patch > deleted file mode 100644 > index 4ffe0e1..0000000 > --- a/recipes-kernel/linux/linux-davinci/hawkboard/0001-board-da850-hawk- > Disable-NAND-SUBPAGE.patch > +++ /dev/null > @@ -1,27 +0,0 @@ > -From 69600e5a42512204bc4eb83a3a459496b049107f Mon Sep 17 00:00:00 > 2001 > -From: Roger Monk <r-monk@ti.com> > -Date: Wed, 25 Aug 2010 17:47:16 +0100 > -Subject: [PATCH] board-da850-hawk: Disable NAND SUBPAGE > - > - * This was causing issues with UBI > - * Solution/Workaround identified by Caglar Akyuz - now applied locally to > board file > ---- > - arch/arm/mach-davinci/board-da850-hawk.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-davinci/board-da850-hawk.c b/arch/arm/mach- > davinci/board-da850-hawk.c > -index 87ed017..bbfe32a 100644 > ---- a/arch/arm/mach-davinci/board-da850-hawk.c > -+++ b/arch/arm/mach-davinci/board-da850-hawk.c > -@@ -118,7 +118,7 @@ static struct davinci_nand_pdata > da850_hawk_nandflash_data = { > - .nr_parts = ARRAY_SIZE(da850_hawk_nandflash_partition), > - .ecc_mode = NAND_ECC_HW, > - .ecc_bits = 4, > -- .options = NAND_USE_FLASH_BBT, > -+ .options = NAND_USE_FLASH_BBT | > NAND_NO_SUBPAGE_WRITE, > - .timing = &da850_hawk_nandflash_timing, > - }; > - > --- > -1.6.0.4 > - > diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/configs/stock > b/recipes-kernel/linux/linux-davinci/hawkboard/configs/stock > deleted file mode 100644 > index b79109b..0000000 > --- a/recipes-kernel/linux/linux-davinci/hawkboard/configs/stock > +++ /dev/null > @@ -1,2630 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux kernel version: 2.6.33-rc4 > -# Tue Mar 2 16:20:04 2010 > -# > -CONFIG_ARM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_GENERIC_GPIO=y > -CONFIG_GENERIC_TIME=y > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_ZONE_DMA=y > -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -CONFIG_VECTORS_BASE=0xffff0000 > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_LOCK_KERNEL=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_BZIP2 is not set > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -# CONFIG_BSD_PROCESS_ACCT is not set > -CONFIG_TASKSTATS=y > -CONFIG_TASK_DELAY_ACCT=y > -# CONFIG_TASK_XACCT is not set > -# CONFIG_AUDIT is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_RCU=y > -# CONFIG_TREE_PREEMPT_RCU is not set > -# CONFIG_TINY_RCU is not set > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=14 > -CONFIG_GROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -# CONFIG_RT_GROUP_SCHED is not set > -CONFIG_USER_SCHED=y > -# CONFIG_CGROUP_SCHED is not set > -# CONFIG_CGROUPS is not set > -# CONFIG_SYSFS_DEPRECATED_V2 is not set > -# CONFIG_RELAY is not set > -# CONFIG_NAMESPACES is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -CONFIG_RD_BZIP2=y > -CONFIG_RD_LZMA=y > -# CONFIG_RD_LZO is not set > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EMBEDDED=y > -CONFIG_UID16=y > -CONFIG_SYSCTL_SYSCALL=y > -CONFIG_KALLSYMS=y > -CONFIG_KALLSYMS_ALL=y > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_VM_EVENT_COUNTERS=y > -CONFIG_SLUB_DEBUG=y > -CONFIG_COMPAT_BRK=y > -# CONFIG_SLAB is not set > -CONFIG_SLUB=y > -# CONFIG_SLOB is not set > -# CONFIG_PROFILING is not set > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_CLK=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -CONFIG_SLOW_WORK=y > -# CONFIG_SLOW_WORK_DEBUG is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -# CONFIG_MODULE_FORCE_LOAD is not set > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -# CONFIG_MODULE_SRCVERSION_ALL is not set > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -CONFIG_BLK_DEV_BSG=y > -CONFIG_BLK_DEV_INTEGRITY=y > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -CONFIG_IOSCHED_DEADLINE=m > -CONFIG_IOSCHED_CFQ=m > -# CONFIG_DEFAULT_DEADLINE is not set > -# CONFIG_DEFAULT_CFQ is not set > -CONFIG_DEFAULT_NOOP=y > -CONFIG_DEFAULT_IOSCHED="noop" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_AAEC2000 is not set > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_L7200 is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5PC1XX is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_LH7A40X is not set > -# CONFIG_ARCH_U300 is not set > -CONFIG_ARCH_DAVINCI=y > -# CONFIG_ARCH_OMAP is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_U8500 is not set > -CONFIG_CP_INTC=y > - > -# > -# TI DaVinci Implementations > -# > - > -# > -# DaVinci Core Type > -# > -# CONFIG_ARCH_DAVINCI_DM644x is not set > -# CONFIG_ARCH_DAVINCI_DM355 is not set > -# CONFIG_ARCH_DAVINCI_DM646x is not set > -# CONFIG_ARCH_DAVINCI_DA830 is not set > -CONFIG_ARCH_DAVINCI_DA850=y > -CONFIG_DA8XX_MAX_SPEED_300=y > -# CONFIG_DA8XX_MAX_SPEED_372 is not set > -# CONFIG_DA8XX_MAX_SPEED_408 is not set > -# CONFIG_DA8XX_MAX_SPEED_456 is not set > -CONFIG_ARCH_DAVINCI_DA8XX=y > -# CONFIG_ARCH_DAVINCI_DM365 is not set > - > -# > -# DaVinci Board Type > -# > -CONFIG_MACH_DAVINCI_DA850_EVM=y > -CONFIG_DA850_UI_NONE=y > -# CONFIG_DA850_UI_RMII is not set > -# CONFIG_DA850_UI_CLCD is not set > -# CONFIG_DA850_UI_VIDEO_PORT is not set > -CONFIG_MACH_OMAPL138_HAWKBOARD=y > -CONFIG_DAVINCI_MUX=y > -# CONFIG_DAVINCI_MUX_DEBUG is not set > -# CONFIG_DAVINCI_MUX_WARNINGS is not set > -CONFIG_DAVINCI_RESET_CLOCKS=y > -CONFIG_DAVINCI_MCBSP=y > -# CONFIG_DAVINCI_MCBSP0 is not set > -CONFIG_DAVINCI_MCBSP1=y > - > -# > -# Processor Type > -# > -CONFIG_CPU_ARM926T=y > -CONFIG_CPU_32v5=y > -CONFIG_CPU_ABRT_EV5TJ=y > -CONFIG_CPU_PABRT_LEGACY=y > -CONFIG_CPU_CACHE_VIVT=y > -CONFIG_CPU_COPY_V4WB=y > -CONFIG_CPU_TLB_V4WBI=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -CONFIG_ARM_L1_CACHE_SHIFT=5 > -CONFIG_COMMON_CLKDEV=y > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=100 > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -# CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=999999 > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=1 > -CONFIG_BOUNCE=y > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -# CONFIG_LEDS is not set > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE=" debug " > -# CONFIG_XIP_KERNEL is not set > -CONFIG_KEXEC=y > -CONFIG_ATAGS_PROC=y > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -CONFIG_CPU_FREQ_STAT_DETAILS=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -# CONFIG_VFP is not set > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -CONFIG_BINFMT_AOUT=m > -CONFIG_BINFMT_MISC=m > - > -# > -# Power management options > -# > -CONFIG_PM=y > -# CONFIG_PM_DEBUG is not set > -CONFIG_PM_SLEEP=y > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -# CONFIG_APM_EMULATION is not set > -# CONFIG_PM_RUNTIME is not set > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -# CONFIG_PACKET_MMAP is not set > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -# CONFIG_NET_KEY is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_FIB_HASH=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -# CONFIG_IP_PNP_BOOTP is not set > -# CONFIG_IP_PNP_RARP is not set > -# CONFIG_NET_IPIP is not set > -# CONFIG_NET_IPGRE is not set > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -# CONFIG_INET_AH is not set > -# CONFIG_INET_ESP is not set > -# CONFIG_INET_IPCOMP is not set > -# CONFIG_INET_XFRM_TUNNEL is not set > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -# CONFIG_INET_LRO is not set > -CONFIG_INET_DIAG=y > -CONFIG_INET_TCP_DIAG=y > -# CONFIG_TCP_CONG_ADVANCED is not set > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -# CONFIG_INET6_AH is not set > -# CONFIG_INET6_ESP is not set > -# CONFIG_INET6_IPCOMP is not set > -# CONFIG_IPV6_MIP6 is not set > -# CONFIG_INET6_XFRM_TUNNEL is not set > -# CONFIG_INET6_TUNNEL is not set > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -# CONFIG_IPV6_TUNNEL is not set > -# CONFIG_IPV6_MULTIPLE_TABLES is not set > -# CONFIG_IPV6_MROUTE is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > - > -# > -# Core Netfilter Configuration > -# > -CONFIG_NETFILTER_NETLINK=m > -CONFIG_NETFILTER_NETLINK_QUEUE=m > -CONFIG_NETFILTER_NETLINK_LOG=m > -CONFIG_NF_CONNTRACK=m > -CONFIG_NF_CT_ACCT=y > -CONFIG_NF_CONNTRACK_MARK=y > -CONFIG_NF_CONNTRACK_EVENTS=y > -CONFIG_NF_CT_PROTO_DCCP=m > -CONFIG_NF_CT_PROTO_GRE=m > -CONFIG_NF_CT_PROTO_SCTP=m > -CONFIG_NF_CT_PROTO_UDPLITE=m > -CONFIG_NF_CONNTRACK_AMANDA=m > -CONFIG_NF_CONNTRACK_FTP=m > -CONFIG_NF_CONNTRACK_H323=m > -CONFIG_NF_CONNTRACK_IRC=m > -CONFIG_NF_CONNTRACK_NETBIOS_NS=m > -CONFIG_NF_CONNTRACK_PPTP=m > -CONFIG_NF_CONNTRACK_SANE=m > -CONFIG_NF_CONNTRACK_SIP=m > -CONFIG_NF_CONNTRACK_TFTP=m > -CONFIG_NF_CT_NETLINK=m > -CONFIG_NETFILTER_TPROXY=m > -CONFIG_NETFILTER_XTABLES=m > -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m > -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m > -CONFIG_NETFILTER_XT_TARGET_DSCP=m > -CONFIG_NETFILTER_XT_TARGET_HL=m > -# CONFIG_NETFILTER_XT_TARGET_LED is not set > -CONFIG_NETFILTER_XT_TARGET_MARK=m > -CONFIG_NETFILTER_XT_TARGET_NFLOG=m > -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m > -CONFIG_NETFILTER_XT_TARGET_NOTRACK=m > -CONFIG_NETFILTER_XT_TARGET_RATEEST=m > -CONFIG_NETFILTER_XT_TARGET_TPROXY=m > -CONFIG_NETFILTER_XT_TARGET_TRACE=m > -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m > -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m > -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m > -CONFIG_NETFILTER_XT_MATCH_COMMENT=m > -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m > -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m > -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m > -CONFIG_NETFILTER_XT_MATCH_DCCP=m > -CONFIG_NETFILTER_XT_MATCH_DSCP=m > -CONFIG_NETFILTER_XT_MATCH_ESP=m > -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_HELPER=m > -CONFIG_NETFILTER_XT_MATCH_HL=m > -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m > -CONFIG_NETFILTER_XT_MATCH_LENGTH=m > -CONFIG_NETFILTER_XT_MATCH_LIMIT=m > -CONFIG_NETFILTER_XT_MATCH_MAC=m > -CONFIG_NETFILTER_XT_MATCH_MARK=m > -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m > -CONFIG_NETFILTER_XT_MATCH_OWNER=m > -CONFIG_NETFILTER_XT_MATCH_POLICY=m > -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m > -CONFIG_NETFILTER_XT_MATCH_QUOTA=m > -CONFIG_NETFILTER_XT_MATCH_RATEEST=m > -CONFIG_NETFILTER_XT_MATCH_REALM=m > -CONFIG_NETFILTER_XT_MATCH_RECENT=m > -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set > -CONFIG_NETFILTER_XT_MATCH_SCTP=m > -CONFIG_NETFILTER_XT_MATCH_SOCKET=m > -CONFIG_NETFILTER_XT_MATCH_STATE=m > -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m > -CONFIG_NETFILTER_XT_MATCH_STRING=m > -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m > -CONFIG_NETFILTER_XT_MATCH_TIME=m > -CONFIG_NETFILTER_XT_MATCH_U32=m > -CONFIG_NETFILTER_XT_MATCH_OSF=m > -# CONFIG_IP_VS is not set > - > -# > -# IP: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV4=m > -CONFIG_NF_CONNTRACK_IPV4=m > -CONFIG_NF_CONNTRACK_PROC_COMPAT=y > -# CONFIG_IP_NF_QUEUE is not set > -CONFIG_IP_NF_IPTABLES=m > -CONFIG_IP_NF_MATCH_ADDRTYPE=m > -CONFIG_IP_NF_MATCH_AH=m > -CONFIG_IP_NF_MATCH_ECN=m > -CONFIG_IP_NF_MATCH_TTL=m > -CONFIG_IP_NF_FILTER=m > -CONFIG_IP_NF_TARGET_REJECT=m > -CONFIG_IP_NF_TARGET_LOG=m > -CONFIG_IP_NF_TARGET_ULOG=m > -CONFIG_NF_NAT=m > -CONFIG_NF_NAT_NEEDED=y > -CONFIG_IP_NF_TARGET_MASQUERADE=m > -CONFIG_IP_NF_TARGET_NETMAP=m > -CONFIG_IP_NF_TARGET_REDIRECT=m > -CONFIG_NF_NAT_SNMP_BASIC=m > -CONFIG_NF_NAT_PROTO_DCCP=m > -CONFIG_NF_NAT_PROTO_GRE=m > -CONFIG_NF_NAT_PROTO_UDPLITE=m > -CONFIG_NF_NAT_PROTO_SCTP=m > -CONFIG_NF_NAT_FTP=m > -CONFIG_NF_NAT_IRC=m > -CONFIG_NF_NAT_TFTP=m > -CONFIG_NF_NAT_AMANDA=m > -CONFIG_NF_NAT_PPTP=m > -CONFIG_NF_NAT_H323=m > -CONFIG_NF_NAT_SIP=m > -CONFIG_IP_NF_MANGLE=m > -CONFIG_IP_NF_TARGET_CLUSTERIP=m > -CONFIG_IP_NF_TARGET_ECN=m > -CONFIG_IP_NF_TARGET_TTL=m > -CONFIG_IP_NF_RAW=m > -CONFIG_IP_NF_ARPTABLES=m > -CONFIG_IP_NF_ARPFILTER=m > -CONFIG_IP_NF_ARP_MANGLE=m > - > -# > -# IPv6: Netfilter Configuration > -# > -# CONFIG_NF_CONNTRACK_IPV6 is not set > -# CONFIG_IP6_NF_QUEUE is not set > -# CONFIG_IP6_NF_IPTABLES is not set > -# CONFIG_IP_DCCP is not set > -# CONFIG_IP_SCTP is not set > -# CONFIG_RDS is not set > -# CONFIG_TIPC is not set > -# CONFIG_ATM is not set > -# CONFIG_BRIDGE is not set > -# CONFIG_NET_DSA is not set > -# CONFIG_VLAN_8021Q is not set > -# CONFIG_DECNET is not set > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -# CONFIG_WAN_ROUTER is not set > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -# CONFIG_NET_SCHED is not set > -CONFIG_NET_CLS_ROUTE=y > -# CONFIG_DCB is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -CONFIG_CAN=m > -CONFIG_CAN_RAW=m > -CONFIG_CAN_BCM=m > - > -# > -# CAN Device Drivers > -# > -CONFIG_CAN_VCAN=m > -CONFIG_CAN_DEV=m > -# CONFIG_CAN_CALC_BITTIMING is not set > -# CONFIG_CAN_MCP251X is not set > -# CONFIG_CAN_SJA1000 is not set > - > -# > -# CAN USB interfaces > -# > -CONFIG_CAN_EMS_USB=m > -# CONFIG_CAN_DEBUG_DEVICES is not set > -CONFIG_IRDA=m > - > -# > -# IrDA protocols > -# > -CONFIG_IRLAN=m > -# CONFIG_IRNET is not set > -CONFIG_IRCOMM=m > -CONFIG_IRDA_ULTRA=y > - > -# > -# IrDA options > -# > -CONFIG_IRDA_CACHE_LAST_LSAP=y > -CONFIG_IRDA_FAST_RR=y > -# CONFIG_IRDA_DEBUG is not set > - > -# > -# Infrared-port device drivers > -# > - > -# > -# SIR device drivers > -# > -CONFIG_IRTTY_SIR=m > - > -# > -# Dongle support > -# > -CONFIG_DONGLE=y > -CONFIG_ESI_DONGLE=m > -CONFIG_ACTISYS_DONGLE=m > -CONFIG_TEKRAM_DONGLE=m > -CONFIG_TOIM3232_DONGLE=m > -CONFIG_LITELINK_DONGLE=m > -CONFIG_MA600_DONGLE=m > -# CONFIG_GIRBIL_DONGLE is not set > -CONFIG_MCP2120_DONGLE=m > -CONFIG_OLD_BELKIN_DONGLE=m > -CONFIG_ACT200L_DONGLE=m > -CONFIG_KINGSUN_DONGLE=m > -CONFIG_KSDAZZLE_DONGLE=m > -CONFIG_KS959_DONGLE=m > - > -# > -# FIR device drivers > -# > -CONFIG_USB_IRDA=m > -CONFIG_SIGMATEL_FIR=m > -CONFIG_MCS_FIR=m > -CONFIG_BT=m > -CONFIG_BT_L2CAP=m > -CONFIG_BT_SCO=m > -CONFIG_BT_RFCOMM=m > -CONFIG_BT_RFCOMM_TTY=y > -CONFIG_BT_BNEP=m > -CONFIG_BT_BNEP_MC_FILTER=y > -CONFIG_BT_BNEP_PROTO_FILTER=y > -CONFIG_BT_HIDP=m > - > -# > -# Bluetooth device drivers > -# > -CONFIG_BT_HCIBTUSB=m > -CONFIG_BT_HCIBTSDIO=m > -CONFIG_BT_HCIUART=m > -CONFIG_BT_HCIUART_H4=y > -CONFIG_BT_HCIUART_BCSP=y > -CONFIG_BT_HCIUART_LL=y > -CONFIG_BT_HCIBCM203X=m > -CONFIG_BT_HCIBPA10X=m > -CONFIG_BT_HCIBFUSB=m > -# CONFIG_BT_HCIVHCI is not set > -CONFIG_BT_MRVL=m > -CONFIG_BT_MRVL_SDIO=m > -# CONFIG_AF_RXRPC is not set > -CONFIG_WIRELESS=y > -CONFIG_WIRELESS_EXT=y > -CONFIG_WEXT_CORE=y > -CONFIG_WEXT_PROC=y > -CONFIG_WEXT_SPY=y > -CONFIG_WEXT_PRIV=y > -CONFIG_CFG80211=m > -# CONFIG_NL80211_TESTMODE is not set > -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set > -# CONFIG_CFG80211_REG_DEBUG is not set > -CONFIG_CFG80211_DEFAULT_PS=y > -# CONFIG_CFG80211_DEBUGFS is not set > -# CONFIG_WIRELESS_OLD_REGULATORY is not set > -CONFIG_CFG80211_WEXT=y > -CONFIG_WIRELESS_EXT_SYSFS=y > -CONFIG_LIB80211=m > -CONFIG_LIB80211_CRYPT_WEP=m > -CONFIG_LIB80211_CRYPT_CCMP=m > -CONFIG_LIB80211_CRYPT_TKIP=m > -# CONFIG_LIB80211_DEBUG is not set > -CONFIG_MAC80211=m > -# CONFIG_MAC80211_RC_PID is not set > -CONFIG_MAC80211_RC_MINSTREL=y > -# CONFIG_MAC80211_RC_DEFAULT_PID is not set > -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y > -CONFIG_MAC80211_RC_DEFAULT="minstrel" > -# CONFIG_MAC80211_MESH is not set > -CONFIG_MAC80211_LEDS=y > -# CONFIG_MAC80211_DEBUGFS is not set > -# CONFIG_MAC80211_DEBUG_MENU is not set > -CONFIG_WIMAX=m > -CONFIG_WIMAX_DEBUG_LEVEL=8 > -CONFIG_RFKILL=m > -CONFIG_RFKILL_LEDS=y > -CONFIG_RFKILL_INPUT=y > -# CONFIG_NET_9P is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="" > -CONFIG_DEVTMPFS=y > -CONFIG_DEVTMPFS_MOUNT=y > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -CONFIG_FW_LOADER=m > -CONFIG_FIRMWARE_IN_KERNEL=y > -CONFIG_EXTRA_FIRMWARE="" > -# CONFIG_DEBUG_DRIVER is not set > -# CONFIG_DEBUG_DEVRES is not set > -# CONFIG_SYS_HYPERVISOR is not set > -CONFIG_CONNECTOR=m > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_CONCAT is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -# CONFIG_MTD_OOPS is not set > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -CONFIG_MTD_M25P80=y > -CONFIG_M25PXX_USE_FAST_READ=y > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -CONFIG_MTD_NAND=y > -# CONFIG_MTD_NAND_VERIFY_WRITE is not set > -# CONFIG_MTD_NAND_ECC_SMC is not set > -# CONFIG_MTD_NAND_MUSEUM_IDS is not set > -# CONFIG_MTD_NAND_GPIO is not set > -CONFIG_MTD_NAND_IDS=y > -# CONFIG_MTD_NAND_DISKONCHIP is not set > -# CONFIG_MTD_NAND_NANDSIM is not set > -# CONFIG_MTD_NAND_PLATFORM is not set > -# CONFIG_MTD_ALAUDA is not set > -CONFIG_MTD_NAND_DAVINCI=y > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > - > -# > -# UBI - Unsorted block images > -# > -CONFIG_MTD_UBI=y > -CONFIG_MTD_UBI_WL_THRESHOLD=4096 > -CONFIG_MTD_UBI_BEB_RESERVE=1 > -CONFIG_MTD_UBI_GLUEBI=m > - > -# > -# UBI debugging options > -# > -# CONFIG_MTD_UBI_DEBUG is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=m > -# CONFIG_BLK_DEV_CRYPTOLOOP is not set > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_DRBD is not set > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=1 > -CONFIG_BLK_DEV_RAM_SIZE=32768 > -# CONFIG_BLK_DEV_XIP is not set > -# CONFIG_CDROM_PKTCDVD is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=y > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -CONFIG_EEPROM_93CX6=m > -# CONFIG_IWMC3200TOP is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -CONFIG_RAID_ATTRS=m > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -CONFIG_SCSI_TGT=m > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -CONFIG_CHR_DEV_ST=m > -CONFIG_CHR_DEV_OSST=m > -CONFIG_BLK_DEV_SR=m > -CONFIG_BLK_DEV_SR_VENDOR=y > -CONFIG_CHR_DEV_SG=m > -CONFIG_CHR_DEV_SCH=m > -CONFIG_SCSI_MULTI_LUN=y > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -CONFIG_SCSI_SCAN_ASYNC=y > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -CONFIG_SCSI_ISCSI_ATTRS=m > -# CONFIG_SCSI_SAS_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -CONFIG_ISCSI_TCP=m > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -CONFIG_ATA=y > -# CONFIG_ATA_NONSTANDARD is not set > -CONFIG_ATA_VERBOSE_ERROR=y > -CONFIG_SATA_PMP=y > -CONFIG_SATA_AHCI=y > -# CONFIG_ATA_SFF is not set > -CONFIG_MD=y > -CONFIG_BLK_DEV_MD=m > -CONFIG_MD_LINEAR=m > -CONFIG_MD_RAID0=m > -CONFIG_MD_RAID1=m > -CONFIG_MD_RAID10=m > -CONFIG_MD_RAID456=m > -CONFIG_MD_RAID6_PQ=m > -CONFIG_ASYNC_RAID6_TEST=m > -CONFIG_MD_MULTIPATH=m > -CONFIG_MD_FAULTY=m > -CONFIG_BLK_DEV_DM=m > -# CONFIG_DM_DEBUG is not set > -CONFIG_DM_CRYPT=m > -CONFIG_DM_SNAPSHOT=m > -CONFIG_DM_MIRROR=m > -CONFIG_DM_LOG_USERSPACE=m > -CONFIG_DM_ZERO=m > -CONFIG_DM_MULTIPATH=m > -CONFIG_DM_MULTIPATH_QL=m > -CONFIG_DM_MULTIPATH_ST=m > -CONFIG_DM_DELAY=m > -CONFIG_DM_UEVENT=y > -CONFIG_NETDEVICES=y > -CONFIG_DUMMY=m > -CONFIG_BONDING=m > -CONFIG_MACVLAN=m > -CONFIG_EQUALIZER=m > -CONFIG_TUN=m > -CONFIG_VETH=m > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -CONFIG_LXT_PHY=y > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -CONFIG_SMSC_PHY=y > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -CONFIG_LSI_ET1011C_PHY=y > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -CONFIG_MII=y > -# CONFIG_AX88796 is not set > -# CONFIG_SMC91X is not set > -CONFIG_TI_DAVINCI_EMAC=y > -# CONFIG_DM9000 is not set > -# CONFIG_ENC28J60 is not set > -# CONFIG_ETHOC is not set > -# CONFIG_SMC911X is not set > -# CONFIG_SMSC911X is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -# CONFIG_KS8842 is not set > -# CONFIG_KS8851 is not set > -# CONFIG_KS8851_MLL is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_LIBERTAS_THINFIRM is not set > -CONFIG_AT76C50X_USB=m > -CONFIG_USB_ZD1201=m > -CONFIG_USB_NET_RNDIS_WLAN=m > -CONFIG_RTL8187=m > -CONFIG_RTL8187_LEDS=y > -# CONFIG_MAC80211_HWSIM is not set > -# CONFIG_ATH_COMMON is not set > -# CONFIG_B43 is not set > -# CONFIG_B43LEGACY is not set > -CONFIG_HOSTAP=m > -CONFIG_HOSTAP_FIRMWARE=y > -# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set > -# CONFIG_IWM is not set > -# CONFIG_LIBERTAS is not set > -CONFIG_P54_COMMON=m > -CONFIG_P54_USB=m > -# CONFIG_P54_SPI is not set > -CONFIG_P54_LEDS=y > -CONFIG_RT2X00=m > -CONFIG_RT2500USB=m > -CONFIG_RT73USB=m > -CONFIG_RT2800USB=m > -CONFIG_RT2800_LIB=m > -CONFIG_RT2X00_LIB_USB=m > -CONFIG_RT2X00_LIB=m > -CONFIG_RT2X00_LIB_HT=y > -CONFIG_RT2X00_LIB_FIRMWARE=y > -CONFIG_RT2X00_LIB_CRYPTO=y > -CONFIG_RT2X00_LIB_LEDS=y > -# CONFIG_RT2X00_DEBUG is not set > -CONFIG_WL12XX=m > -CONFIG_WL1251=m > -# CONFIG_WL1251_SPI is not set > -CONFIG_WL1251_SDIO=m > -CONFIG_WL1271=m > -CONFIG_ZD1211RW=m > -# CONFIG_ZD1211RW_DEBUG is not set > - > -# > -# WiMAX Wireless Broadband devices > -# > -CONFIG_WIMAX_I2400M=m > -CONFIG_WIMAX_I2400M_USB=m > -CONFIG_WIMAX_I2400M_SDIO=m > -# CONFIG_WIMAX_IWMC3200_SDIO is not set > -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 > - > -# > -# USB Network Adapters > -# > -CONFIG_USB_CATC=m > -CONFIG_USB_KAWETH=m > -CONFIG_USB_PEGASUS=m > -CONFIG_USB_RTL8150=m > -CONFIG_USB_USBNET=m > -CONFIG_USB_NET_AX8817X=m > -CONFIG_USB_NET_CDCETHER=m > -CONFIG_USB_NET_CDC_EEM=m > -CONFIG_USB_NET_DM9601=m > -CONFIG_USB_NET_SMSC95XX=m > -CONFIG_USB_NET_GL620A=m > -CONFIG_USB_NET_NET1080=m > -CONFIG_USB_NET_PLUSB=m > -CONFIG_USB_NET_MCS7830=m > -CONFIG_USB_NET_RNDIS_HOST=m > -CONFIG_USB_NET_CDC_SUBSET=m > -# CONFIG_USB_ALI_M5632 is not set > -# CONFIG_USB_AN2720 is not set > -CONFIG_USB_BELKIN=y > -CONFIG_USB_ARMLINUX=y > -# CONFIG_USB_EPSON2888 is not set > -# CONFIG_USB_KC2190 is not set > -CONFIG_USB_NET_ZAURUS=m > -CONFIG_USB_HSO=m > -CONFIG_USB_NET_INT51X1=m > -# CONFIG_WAN is not set > -CONFIG_PPP=m > -CONFIG_PPP_MULTILINK=y > -CONFIG_PPP_FILTER=y > -CONFIG_PPP_ASYNC=m > -CONFIG_PPP_SYNC_TTY=m > -CONFIG_PPP_DEFLATE=m > -CONFIG_PPP_BSDCOMP=m > -CONFIG_PPP_MPPE=m > -CONFIG_PPPOE=m > -CONFIG_PPPOL2TP=m > -# CONFIG_SLIP is not set > -CONFIG_SLHC=m > -CONFIG_NETCONSOLE=y > -# CONFIG_NETCONSOLE_DYNAMIC is not set > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -# CONFIG_INPUT_FF_MEMLESS is not set > -# CONFIG_INPUT_POLLDEV is not set > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -# CONFIG_INPUT_MOUSEDEV is not set > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -CONFIG_KEYBOARD_ATKBD=m > -# CONFIG_QT2160 is not set > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_LM8323 is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -CONFIG_KEYBOARD_XTKBD=m > -# CONFIG_INPUT_MOUSE is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2007 is not set > -# CONFIG_TOUCHSCREEN_TSC2004 is not set > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -CONFIG_TOUCHSCREEN_TPS6507X=y > -# CONFIG_INPUT_MISC is not set > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -# CONFIG_VT_CONSOLE is not set > -CONFIG_HW_CONSOLE=y > -# CONFIG_VT_HW_CONSOLE_BINDING is not set > -CONFIG_DEVKMEM=y > -# CONFIG_SERIAL_NONSTANDARD is not set > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=3 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -# CONFIG_SERIAL_8250_EXTENDED is not set > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -CONFIG_LEGACY_PTYS=y > -CONFIG_LEGACY_PTY_COUNT=8 > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=m > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=y > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -CONFIG_I2C_DAVINCI=y > -# CONFIG_I2C_DESIGNWARE is not set > -CONFIG_I2C_GPIO=y > -# CONFIG_I2C_OCORES is not set > -# CONFIG_I2C_SIMTEC is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_STUB is not set > - > -# > -# Miscellaneous I2C Chip support > -# > -# CONFIG_SENSORS_TSL2550 is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -# CONFIG_I2C_DEBUG_CHIP is not set > -CONFIG_SPI=y > -# CONFIG_SPI_DEBUG is not set > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -CONFIG_SPI_DAVINCI=y > -CONFIG_SPI_BITBANG=y > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -# CONFIG_SPI_SPIDEV is not set > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_DEBUG_GPIO is not set > -# CONFIG_GPIO_SYSFS is not set > - > -# > -# Memory mapped GPIO expanders: > -# > - > -# > -# I2C GPIO expanders: > -# > -# CONFIG_GPIO_MAX732X is not set > -CONFIG_GPIO_PCA953X=y > -CONFIG_GPIO_PCF857X=y > -# CONFIG_GPIO_ADP5588 is not set > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > - > -# > -# AC97 GPIO expanders: > -# > -# CONFIG_W1 is not set > -# CONFIG_POWER_SUPPLY is not set > -# CONFIG_HWMON is not set > -# CONFIG_THERMAL is not set > -CONFIG_WATCHDOG=y > -# CONFIG_WATCHDOG_NOWAYOUT is not set > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_DAVINCI_WATCHDOG=y > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -# CONFIG_SSB is not set > - > -# > -# Multifunction device drivers > -# > -# CONFIG_MFD_CORE is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507x=y > -# CONFIG_TWL4030_CORE is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13783 is not set > -# CONFIG_AB3100_CORE is not set > -# CONFIG_EZX_PCAP is not set > -# CONFIG_MFD_88PM8607 is not set > -# CONFIG_AB4500_CORE is not set > -# CONFIG_REGULATOR is not set > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_ALLOW_V4L1=y > -CONFIG_VIDEO_V4L1_COMPAT=y > -CONFIG_DVB_CORE=m > -CONFIG_VIDEO_MEDIA=m > - > -# > -# Multimedia drivers > -# > -CONFIG_IR_CORE=y > -CONFIG_VIDEO_IR=y > -CONFIG_MEDIA_ATTACH=y > -CONFIG_MEDIA_TUNER=m > -CONFIG_MEDIA_TUNER_CUSTOMISE=y > -CONFIG_MEDIA_TUNER_SIMPLE=m > -CONFIG_MEDIA_TUNER_TDA8290=m > -CONFIG_MEDIA_TUNER_TDA827X=m > -CONFIG_MEDIA_TUNER_TDA18271=m > -CONFIG_MEDIA_TUNER_TDA9887=m > -CONFIG_MEDIA_TUNER_TEA5761=m > -CONFIG_MEDIA_TUNER_TEA5767=m > -CONFIG_MEDIA_TUNER_MT20XX=m > -CONFIG_MEDIA_TUNER_MT2060=m > -CONFIG_MEDIA_TUNER_MT2266=m > -CONFIG_MEDIA_TUNER_MT2131=m > -CONFIG_MEDIA_TUNER_QT1010=m > -CONFIG_MEDIA_TUNER_XC2028=m > -CONFIG_MEDIA_TUNER_XC5000=m > -CONFIG_MEDIA_TUNER_MXL5005S=m > -CONFIG_MEDIA_TUNER_MXL5007T=m > -CONFIG_MEDIA_TUNER_MC44S803=m > -CONFIG_MEDIA_TUNER_MAX2165=m > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEO_V4L1=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_VMALLOC=m > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEOBUF_DVB=m > -CONFIG_VIDEO_TVEEPROM=m > -CONFIG_VIDEO_TUNER=m > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -CONFIG_VIDEO_IR_I2C=m > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TDA9875 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -CONFIG_VIDEO_MSP3400=m > -# CONFIG_VIDEO_CS5345 is not set > -CONFIG_VIDEO_CS53L32A=m > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -CONFIG_VIDEO_WM8775=m > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -# CONFIG_VIDEO_ADV7180 is not set > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -# CONFIG_VIDEO_MT9V011 is not set > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -CONFIG_VIDEO_SAA711X=m > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -CONFIG_VIDEO_TVP514X=y > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -CONFIG_VIDEO_CX25840=m > - > -# > -# MPEG video encoders > -# > -CONFIG_VIDEO_CX2341X=m > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set > -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y > -CONFIG_VIDEO_DAVINCI_VPIF=y > -CONFIG_VIDEO_VIVI=m > -# CONFIG_VIDEO_VPSS_SYSTEM is not set > -# CONFIG_VIDEO_VPFE_CAPTURE is not set > -# CONFIG_VIDEO_CPIA is not set > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_SAA5246A is not set > -# CONFIG_VIDEO_SAA5249 is not set > -# CONFIG_VIDEO_AU0828 is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=y > -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y > -CONFIG_USB_GSPCA=m > -# CONFIG_USB_M5602 is not set > -# CONFIG_USB_STV06XX is not set > -# CONFIG_USB_GL860 is not set > -# CONFIG_USB_GSPCA_CONEX is not set > -# CONFIG_USB_GSPCA_ETOMS is not set > -# CONFIG_USB_GSPCA_FINEPIX is not set > -# CONFIG_USB_GSPCA_JEILINJ is not set > -# CONFIG_USB_GSPCA_MARS is not set > -# CONFIG_USB_GSPCA_MR97310A is not set > -# CONFIG_USB_GSPCA_OV519 is not set > -# CONFIG_USB_GSPCA_OV534 is not set > -# CONFIG_USB_GSPCA_PAC207 is not set > -# CONFIG_USB_GSPCA_PAC7302 is not set > -# CONFIG_USB_GSPCA_PAC7311 is not set > -# CONFIG_USB_GSPCA_SN9C20X is not set > -# CONFIG_USB_GSPCA_SONIXB is not set > -# CONFIG_USB_GSPCA_SONIXJ is not set > -# CONFIG_USB_GSPCA_SPCA500 is not set > -# CONFIG_USB_GSPCA_SPCA501 is not set > -# CONFIG_USB_GSPCA_SPCA505 is not set > -# CONFIG_USB_GSPCA_SPCA506 is not set > -# CONFIG_USB_GSPCA_SPCA508 is not set > -# CONFIG_USB_GSPCA_SPCA561 is not set > -# CONFIG_USB_GSPCA_SQ905 is not set > -# CONFIG_USB_GSPCA_SQ905C is not set > -# CONFIG_USB_GSPCA_STK014 is not set > -# CONFIG_USB_GSPCA_STV0680 is not set > -# CONFIG_USB_GSPCA_SUNPLUS is not set > -# CONFIG_USB_GSPCA_T613 is not set > -# CONFIG_USB_GSPCA_TV8532 is not set > -# CONFIG_USB_GSPCA_VC032X is not set > -# CONFIG_USB_GSPCA_ZC3XX is not set > -CONFIG_VIDEO_PVRUSB2=m > -CONFIG_VIDEO_PVRUSB2_SYSFS=y > -CONFIG_VIDEO_PVRUSB2_DVB=y > -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set > -CONFIG_VIDEO_HDPVR=m > -CONFIG_VIDEO_EM28XX=m > -CONFIG_VIDEO_EM28XX_ALSA=m > -CONFIG_VIDEO_EM28XX_DVB=m > -CONFIG_VIDEO_CX231XX=m > -CONFIG_VIDEO_CX231XX_ALSA=m > -CONFIG_VIDEO_CX231XX_DVB=m > -CONFIG_VIDEO_USBVISION=m > -CONFIG_VIDEO_USBVIDEO=m > -CONFIG_USB_VICAM=m > -CONFIG_USB_IBMCAM=m > -CONFIG_USB_KONICAWC=m > -CONFIG_USB_QUICKCAM_MESSENGER=m > -CONFIG_USB_ET61X251=m > -CONFIG_VIDEO_OVCAMCHIP=m > -CONFIG_USB_W9968CF=m > -CONFIG_USB_OV511=m > -CONFIG_USB_SE401=m > -CONFIG_USB_SN9C102=m > -CONFIG_USB_STV680=m > -CONFIG_USB_ZC0301=m > -CONFIG_USB_PWC=m > -# CONFIG_USB_PWC_DEBUG is not set > -CONFIG_USB_PWC_INPUT_EVDEV=y > -CONFIG_USB_ZR364XX=m > -CONFIG_USB_STKWEBCAM=m > -CONFIG_USB_S2255=m > -CONFIG_RADIO_ADAPTERS=y > -# CONFIG_I2C_SI4713 is not set > -# CONFIG_RADIO_SI4713 is not set > -# CONFIG_USB_DSBR is not set > -# CONFIG_RADIO_SI470X is not set > -# CONFIG_USB_MR800 is not set > -# CONFIG_RADIO_TEA5764 is not set > -# CONFIG_RADIO_TEF6862 is not set > -CONFIG_DVB_MAX_ADAPTERS=8 > -CONFIG_DVB_DYNAMIC_MINORS=y > -CONFIG_DVB_CAPTURE_DRIVERS=y > -# CONFIG_TTPCI_EEPROM is not set > - > -# > -# Supported USB Adapters > -# > -CONFIG_DVB_USB=m > -# CONFIG_DVB_USB_DEBUG is not set > -CONFIG_DVB_USB_A800=m > -CONFIG_DVB_USB_DIBUSB_MB=m > -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y > -CONFIG_DVB_USB_DIBUSB_MC=m > -CONFIG_DVB_USB_DIB0700=m > -CONFIG_DVB_USB_UMT_010=m > -CONFIG_DVB_USB_CXUSB=m > -CONFIG_DVB_USB_M920X=m > -CONFIG_DVB_USB_GL861=m > -CONFIG_DVB_USB_AU6610=m > -CONFIG_DVB_USB_DIGITV=m > -CONFIG_DVB_USB_VP7045=m > -CONFIG_DVB_USB_VP702X=m > -CONFIG_DVB_USB_GP8PSK=m > -CONFIG_DVB_USB_NOVA_T_USB2=m > -CONFIG_DVB_USB_TTUSB2=m > -CONFIG_DVB_USB_DTT200U=m > -CONFIG_DVB_USB_OPERA1=m > -CONFIG_DVB_USB_AF9005=m > -CONFIG_DVB_USB_AF9005_REMOTE=m > -CONFIG_DVB_USB_DW2102=m > -CONFIG_DVB_USB_CINERGY_T2=m > -CONFIG_DVB_USB_ANYSEE=m > -CONFIG_DVB_USB_DTV5100=m > -CONFIG_DVB_USB_AF9015=m > -CONFIG_DVB_USB_CE6230=m > -CONFIG_DVB_USB_FRIIO=m > -CONFIG_DVB_USB_EC168=m > -# CONFIG_SMS_SIANO_MDTV is not set > - > -# > -# Supported FlexCopII (B2C2) Adapters > -# > -CONFIG_DVB_B2C2_FLEXCOP=m > -CONFIG_DVB_B2C2_FLEXCOP_USB=m > -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set > - > -# > -# Supported DVB Frontends > -# > -# CONFIG_DVB_FE_CUSTOMISE is not set > -CONFIG_DVB_STB6100=m > -CONFIG_DVB_CX24123=m > -CONFIG_DVB_MT312=m > -CONFIG_DVB_ZL10039=m > -CONFIG_DVB_S5H1420=m > -CONFIG_DVB_STV0288=m > -CONFIG_DVB_STB6000=m > -CONFIG_DVB_STV0299=m > -CONFIG_DVB_STV6110=m > -CONFIG_DVB_STV0900=m > -CONFIG_DVB_TDA10086=m > -CONFIG_DVB_TUNER_ITD1000=m > -CONFIG_DVB_TUNER_CX24113=m > -CONFIG_DVB_TDA826X=m > -CONFIG_DVB_CX24116=m > -CONFIG_DVB_SI21XX=m > -CONFIG_DVB_DS3000=m > -CONFIG_DVB_CX22702=m > -CONFIG_DVB_TDA1004X=m > -CONFIG_DVB_NXT6000=m > -CONFIG_DVB_MT352=m > -CONFIG_DVB_ZL10353=m > -CONFIG_DVB_DIB3000MB=m > -CONFIG_DVB_DIB3000MC=m > -CONFIG_DVB_DIB7000M=m > -CONFIG_DVB_DIB7000P=m > -CONFIG_DVB_TDA10048=m > -CONFIG_DVB_AF9013=m > -CONFIG_DVB_EC100=m > -CONFIG_DVB_TDA10021=m > -CONFIG_DVB_TDA10023=m > -CONFIG_DVB_STV0297=m > -CONFIG_DVB_NXT200X=m > -CONFIG_DVB_BCM3510=m > -CONFIG_DVB_LGDT330X=m > -CONFIG_DVB_LGDT3305=m > -CONFIG_DVB_S5H1409=m > -CONFIG_DVB_S5H1411=m > -CONFIG_DVB_DIB8000=m > -CONFIG_DVB_PLL=m > -CONFIG_DVB_TUNER_DIB0070=m > -CONFIG_DVB_LNBP21=m > -CONFIG_DVB_ISL6421=m > -CONFIG_DVB_LGS8GL5=m > -CONFIG_DAB=y > -CONFIG_USB_DABUSB=m > - > -# > -# Graphics support > -# > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -CONFIG_FIRMWARE_EDID=y > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -# CONFIG_FB_SYS_FILLRECT is not set > -# CONFIG_FB_SYS_COPYAREA is not set > -# CONFIG_FB_SYS_IMAGEBLIT is not set > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -# CONFIG_FB_SYS_FOPS is not set > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -CONFIG_FB_MODE_HELPERS=y > -CONFIG_FB_TILEBLITTING=y > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_UVESA is not set > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_DAVINCI is not set > -# CONFIG_FB_VIRTUAL is not set > -CONFIG_FB_DA8XX=y > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -CONFIG_BACKLIGHT_LCD_SUPPORT=y > -CONFIG_LCD_CLASS_DEVICE=m > -# CONFIG_LCD_LMS283GF05 is not set > -# CONFIG_LCD_LTV350QV is not set > -# CONFIG_LCD_ILI9320 is not set > -# CONFIG_LCD_TDO24M is not set > -# CONFIG_LCD_VGG2432A4 is not set > -# CONFIG_LCD_PLATFORM is not set > -CONFIG_BACKLIGHT_CLASS_DEVICE=m > -CONFIG_BACKLIGHT_GENERIC=m > - > -# > -# Display device support > -# > -# CONFIG_DISPLAY_SUPPORT is not set > - > -# > -# Console display driver support > -# > -# CONFIG_VGA_CONSOLE is not set > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -CONFIG_LOGO_LINUX_MONO=y > -CONFIG_LOGO_LINUX_VGA16=y > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -# CONFIG_SOUND_OSS_CORE is not set > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -CONFIG_SND_SEQUENCER=m > -# CONFIG_SND_SEQ_DUMMY is not set > -# CONFIG_SND_MIXER_OSS is not set > -# CONFIG_SND_PCM_OSS is not set > -# CONFIG_SND_SEQUENCER_OSS is not set > -CONFIG_SND_HRTIMER=m > -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y > -# CONFIG_SND_DYNAMIC_MINORS is not set > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -CONFIG_SND_RAWMIDI_SEQ=m > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -# CONFIG_SND_VIRMIDI is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -CONFIG_SND_ARM=y > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -CONFIG_SND_USB_CAIAQ=m > -CONFIG_SND_USB_CAIAQ_INPUT=y > -CONFIG_SND_SOC=y > -CONFIG_SND_DAVINCI_SOC=y > -CONFIG_SND_DAVINCI_SOC_MCASP=y > -CONFIG_SND_DA850_SOC_EVM=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TLV320AIC3X=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -CONFIG_HIDRAW=y > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -CONFIG_USB_HIDDEV=y > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_A4TECH is not set > -# CONFIG_HID_APPLE is not set > -# CONFIG_HID_BELKIN is not set > -# CONFIG_HID_CHERRY is not set > -# CONFIG_HID_CHICONY is not set > -# CONFIG_HID_CYPRESS is not set > -# CONFIG_HID_DRAGONRISE is not set > -# CONFIG_HID_EZKEY is not set > -# CONFIG_HID_KYE is not set > -# CONFIG_HID_GYRATION is not set > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -# CONFIG_HID_LOGITECH is not set > -# CONFIG_HID_MICROSOFT is not set > -# CONFIG_HID_MONTEREY is not set > -# CONFIG_HID_NTRIG is not set > -# CONFIG_HID_PANTHERLORD is not set > -# CONFIG_HID_PETALYNX is not set > -# CONFIG_HID_SAMSUNG is not set > -# CONFIG_HID_SONY is not set > -# CONFIG_HID_SUNPLUS is not set > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -# CONFIG_HID_TOPSEED is not set > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_WACOM is not set > -# CONFIG_HID_ZEROPLUS is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -# CONFIG_USB_ARCH_HAS_EHCI is not set > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > - > -# > -# Miscellaneous USB options > -# > -# CONFIG_USB_DEVICEFS is not set > -# CONFIG_USB_DEVICE_CLASS is not set > -CONFIG_USB_DYNAMIC_MINORS=y > -CONFIG_USB_SUSPEND=y > -# CONFIG_USB_OTG is not set > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -CONFIG_USB_MON=m > -CONFIG_USB_WUSB=m > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -CONFIG_USB_OHCI_HCD=y > -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -# CONFIG_USB_U132_HCD is not set > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -CONFIG_USB_MUSB_SOC=y > -CONFIG_USB_MUSB_HOST=y > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -# CONFIG_USB_MUSB_DUAL_ROLE is not set > -# CONFIG_USB_MUSB_OTG is not set > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_INVENTRA_DMA is not set > -# CONFIG_USB_TI_CPPI_DMA is not set > -CONFIG_USB_TI_CPPI41_DMA=y > -CONFIG_USB_MUSB_DEBUG=y > - > -# > -# USB Device Class drivers > -# > -CONFIG_USB_ACM=m > -CONFIG_USB_PRINTER=m > -CONFIG_USB_WDM=m > -CONFIG_USB_TMC=m > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -CONFIG_USB_SERIAL=y > -CONFIG_USB_SERIAL_CONSOLE=y > -CONFIG_USB_EZUSB=y > -CONFIG_USB_SERIAL_GENERIC=y > -CONFIG_USB_SERIAL_AIRCABLE=m > -CONFIG_USB_SERIAL_ARK3116=m > -CONFIG_USB_SERIAL_BELKIN=m > -CONFIG_USB_SERIAL_CH341=m > -CONFIG_USB_SERIAL_WHITEHEAT=m > -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m > -CONFIG_USB_SERIAL_CP210X=m > -CONFIG_USB_SERIAL_CYPRESS_M8=m > -CONFIG_USB_SERIAL_EMPEG=m > -CONFIG_USB_SERIAL_FTDI_SIO=m > -CONFIG_USB_SERIAL_FUNSOFT=m > -CONFIG_USB_SERIAL_VISOR=m > -CONFIG_USB_SERIAL_IPAQ=m > -CONFIG_USB_SERIAL_IR=m > -CONFIG_USB_SERIAL_EDGEPORT=m > -CONFIG_USB_SERIAL_EDGEPORT_TI=m > -CONFIG_USB_SERIAL_GARMIN=m > -CONFIG_USB_SERIAL_IPW=m > -CONFIG_USB_SERIAL_IUU=m > -CONFIG_USB_SERIAL_KEYSPAN_PDA=m > -CONFIG_USB_SERIAL_KEYSPAN=m > -# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set > -CONFIG_USB_SERIAL_KLSI=m > -CONFIG_USB_SERIAL_KOBIL_SCT=m > -CONFIG_USB_SERIAL_MCT_U232=m > -CONFIG_USB_SERIAL_MOS7720=m > -CONFIG_USB_SERIAL_MOS7840=m > -CONFIG_USB_SERIAL_MOTOROLA=m > -CONFIG_USB_SERIAL_NAVMAN=m > -CONFIG_USB_SERIAL_PL2303=m > -CONFIG_USB_SERIAL_OTI6858=m > -CONFIG_USB_SERIAL_QUALCOMM=m > -CONFIG_USB_SERIAL_SPCP8X5=m > -CONFIG_USB_SERIAL_HP4X=m > -CONFIG_USB_SERIAL_SAFE=m > -# CONFIG_USB_SERIAL_SAFE_PADDED is not set > -CONFIG_USB_SERIAL_SIEMENS_MPI=m > -CONFIG_USB_SERIAL_SIERRAWIRELESS=m > -CONFIG_USB_SERIAL_SYMBOL=m > -CONFIG_USB_SERIAL_TI=m > -CONFIG_USB_SERIAL_CYBERJACK=m > -CONFIG_USB_SERIAL_XIRCOM=m > -CONFIG_USB_SERIAL_OPTION=m > -CONFIG_USB_SERIAL_OMNINET=m > -CONFIG_USB_SERIAL_OPTICON=m > -CONFIG_USB_SERIAL_DEBUG=m > - > -# > -# USB Miscellaneous drivers > -# > -CONFIG_USB_EMI62=m > -CONFIG_USB_EMI26=m > -CONFIG_USB_ADUTUX=m > -CONFIG_USB_SEVSEG=m > -CONFIG_USB_RIO500=m > -CONFIG_USB_LEGOTOWER=m > -CONFIG_USB_LCD=m > -CONFIG_USB_BERRY_CHARGE=m > -CONFIG_USB_LED=m > -CONFIG_USB_CYPRESS_CY7C63=m > -CONFIG_USB_CYTHERM=m > -CONFIG_USB_IDMOUSE=m > -CONFIG_USB_FTDI_ELAN=m > -CONFIG_USB_APPLEDISPLAY=m > -CONFIG_USB_SISUSBVGA=m > -CONFIG_USB_SISUSBVGA_CON=y > -CONFIG_USB_LD=m > -CONFIG_USB_TRANCEVIBRATOR=m > -CONFIG_USB_IOWARRIOR=m > -# CONFIG_USB_TEST is not set > -# CONFIG_USB_ISIGHTFW is not set > -CONFIG_USB_VST=m > -# CONFIG_USB_GADGET is not set > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -# CONFIG_USB_GPIO_VBUS is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_UWB=m > -# CONFIG_UWB_HWA is not set > -# CONFIG_UWB_WLP is not set > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -CONFIG_MMC_UNSAFE_RESUME=y > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_BOUNCE=y > -CONFIG_SDIO_UART=m > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_AT91 is not set > -# CONFIG_MMC_ATMELMCI is not set > -CONFIG_MMC_DAVINCI=y > -# CONFIG_MMC_SPI is not set > -# CONFIG_MEMSTICK is not set > -CONFIG_NEW_LEDS=y > -CONFIG_LEDS_CLASS=m > - > -# > -# LED drivers > -# > -# CONFIG_LEDS_PCA9532 is not set > -CONFIG_LEDS_GPIO=m > -CONFIG_LEDS_GPIO_PLATFORM=y > -# CONFIG_LEDS_LP3944 is not set > -# CONFIG_LEDS_PCA955X is not set > -# CONFIG_LEDS_DAC124S085 is not set > -# CONFIG_LEDS_BD2802 is not set > -# CONFIG_LEDS_LT3593 is not set > - > -# > -# LED Triggers > -# > -CONFIG_LEDS_TRIGGERS=y > -CONFIG_LEDS_TRIGGER_TIMER=m > -CONFIG_LEDS_TRIGGER_HEARTBEAT=m > -CONFIG_LEDS_TRIGGER_BACKLIGHT=m > -CONFIG_LEDS_TRIGGER_GPIO=m > -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m > - > -# > -# iptables trigger is under Netfilter config (LED target) > -# > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -# CONFIG_RTC_DRV_DS1307 is not set > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -# CONFIG_RTC_DRV_BQ32K is not set > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -# CONFIG_RTC_DRV_OMAP is not set > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -# CONFIG_UIO is not set > - > -# > -# TI VLYNQ > -# > -CONFIG_STAGING=y > -# CONFIG_STAGING_EXCLUDE_BUILD is not set > -# CONFIG_USB_IP_COMMON is not set > -# CONFIG_W35UND is not set > -CONFIG_PRISM2_USB=m > -# CONFIG_ECHO is not set > -CONFIG_OTUS=m > -# CONFIG_COMEDI is not set > -# CONFIG_ASUS_OLED is not set > -# CONFIG_INPUT_MIMIO is not set > -# CONFIG_TRANZPORT is not set > - > -# > -# Qualcomm MSM Camera And Video > -# > - > -# > -# Camera Sensor Selection > -# > -# CONFIG_INPUT_GPIO is not set > -# CONFIG_POHMELFS is not set > -# CONFIG_PLAN9AUTH is not set > -# CONFIG_LINE6_USB is not set > -# CONFIG_USB_SERIAL_QUATECH2 is not set > -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set > -# CONFIG_VT6656 is not set > -# CONFIG_FB_UDL is not set > - > -# > -# RAR Register Driver > -# > -# CONFIG_RAR_REGISTER is not set > -# CONFIG_IIO is not set > -# CONFIG_RAMZSWAP is not set > -# CONFIG_BATMAN_ADV is not set > -# CONFIG_STRIP is not set > -# CONFIG_FB_SM7XX is not set > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -# CONFIG_EXT3_FS_POSIX_ACL is not set > -# CONFIG_EXT3_FS_SECURITY is not set > -# CONFIG_EXT4_FS is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_JBD2=m > -# CONFIG_JBD2_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -CONFIG_REISERFS_FS=m > -# CONFIG_REISERFS_CHECK is not set > -CONFIG_REISERFS_PROC_INFO=y > -CONFIG_REISERFS_FS_XATTR=y > -# CONFIG_REISERFS_FS_POSIX_ACL is not set > -# CONFIG_REISERFS_FS_SECURITY is not set > -CONFIG_JFS_FS=m > -CONFIG_JFS_POSIX_ACL=y > -# CONFIG_JFS_SECURITY is not set > -# CONFIG_JFS_DEBUG is not set > -# CONFIG_JFS_STATISTICS is not set > -CONFIG_FS_POSIX_ACL=y > -CONFIG_XFS_FS=m > -CONFIG_XFS_QUOTA=y > -CONFIG_XFS_POSIX_ACL=y > -CONFIG_XFS_RT=y > -# CONFIG_XFS_DEBUG is not set > -CONFIG_GFS2_FS=m > -# CONFIG_GFS2_FS_LOCKING_DLM is not set > -CONFIG_OCFS2_FS=m > -CONFIG_OCFS2_FS_O2CB=m > -CONFIG_OCFS2_FS_STATS=y > -CONFIG_OCFS2_DEBUG_MASKLOG=y > -# CONFIG_OCFS2_DEBUG_FS is not set > -CONFIG_BTRFS_FS=m > -CONFIG_BTRFS_FS_POSIX_ACL=y > -# CONFIG_NILFS2_FS is not set > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY=y > -CONFIG_INOTIFY_USER=y > -CONFIG_QUOTA=y > -# CONFIG_QUOTA_NETLINK_INTERFACE is not set > -CONFIG_PRINT_QUOTA_WARNING=y > -CONFIG_QUOTA_TREE=m > -# CONFIG_QFMT_V1 is not set > -# CONFIG_QFMT_V2 is not set > -CONFIG_QUOTACTL=y > -# CONFIG_AUTOFS_FS is not set > -CONFIG_AUTOFS4_FS=m > -CONFIG_FUSE_FS=m > -CONFIG_CUSE=m > -CONFIG_GENERIC_ACL=y > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -CONFIG_ISO9660_FS=m > -CONFIG_JOLIET=y > -CONFIG_ZISOFS=y > -CONFIG_UDF_FS=m > -CONFIG_UDF_NLS=y > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -# CONFIG_NTFS_FS is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -CONFIG_TMPFS_POSIX_ACL=y > -# CONFIG_HUGETLB_PAGE is not set > -CONFIG_CONFIGFS_FS=m > -CONFIG_MISC_FILESYSTEMS=y > -# CONFIG_ADFS_FS is not set > -# CONFIG_AFFS_FS is not set > -# CONFIG_HFS_FS is not set > -CONFIG_HFSPLUS_FS=m > -# CONFIG_BEFS_FS is not set > -# CONFIG_BFS_FS is not set > -# CONFIG_EFS_FS is not set > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -# CONFIG_JFFS2_SUMMARY is not set > -# CONFIG_JFFS2_FS_XATTR is not set > -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -CONFIG_JFFS2_ZLIB=y > -# CONFIG_JFFS2_LZO is not set > -CONFIG_JFFS2_RTIME=y > -# CONFIG_JFFS2_RUBIN is not set > -CONFIG_UBIFS_FS=y > -CONFIG_UBIFS_FS_XATTR=y > -CONFIG_UBIFS_FS_ADVANCED_COMPR=y > -CONFIG_UBIFS_FS_LZO=y > -CONFIG_UBIFS_FS_ZLIB=y > -# CONFIG_UBIFS_FS_DEBUG is not set > -CONFIG_CRAMFS=y > -CONFIG_SQUASHFS=m > -# CONFIG_SQUASHFS_EMBEDDED is not set > -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 > -# CONFIG_VXFS_FS is not set > -CONFIG_MINIX_FS=m > -# CONFIG_OMFS_FS is not set > -# CONFIG_HPFS_FS is not set > -# CONFIG_QNX4FS_FS is not set > -# CONFIG_ROMFS_FS is not set > -# CONFIG_SYSV_FS is not set > -# CONFIG_UFS_FS is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -# CONFIG_NFS_V4 is not set > -CONFIG_ROOT_NFS=y > -CONFIG_NFSD=m > -CONFIG_NFSD_V3=y > -# CONFIG_NFSD_V3_ACL is not set > -# CONFIG_NFSD_V4 is not set > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_EXPORTFS=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -# CONFIG_RPCSEC_GSS_KRB5 is not set > -# CONFIG_RPCSEC_GSS_SPKM3 is not set > -CONFIG_SMB_FS=m > -# CONFIG_SMB_NLS_DEFAULT is not set > -# CONFIG_CIFS is not set > -# CONFIG_NCP_FS is not set > -# CONFIG_CODA_FS is not set > -# CONFIG_AFS_FS is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -# CONFIG_MAC_PARTITION is not set > -CONFIG_MSDOS_PARTITION=y > -CONFIG_BSD_DISKLABEL=y > -# CONFIG_MINIX_SUBPARTITION is not set > -# CONFIG_SOLARIS_X86_PARTITION is not set > -# CONFIG_UNIXWARE_DISKLABEL is not set > -# CONFIG_LDM_PARTITION is not set > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -# CONFIG_EFI_PARTITION is not set > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -# CONFIG_NLS_CODEPAGE_737 is not set > -# CONFIG_NLS_CODEPAGE_775 is not set > -# CONFIG_NLS_CODEPAGE_850 is not set > -# CONFIG_NLS_CODEPAGE_852 is not set > -# CONFIG_NLS_CODEPAGE_855 is not set > -# CONFIG_NLS_CODEPAGE_857 is not set > -# CONFIG_NLS_CODEPAGE_860 is not set > -# CONFIG_NLS_CODEPAGE_861 is not set > -# CONFIG_NLS_CODEPAGE_862 is not set > -# CONFIG_NLS_CODEPAGE_863 is not set > -# CONFIG_NLS_CODEPAGE_864 is not set > -# CONFIG_NLS_CODEPAGE_865 is not set > -# CONFIG_NLS_CODEPAGE_866 is not set > -# CONFIG_NLS_CODEPAGE_869 is not set > -# CONFIG_NLS_CODEPAGE_936 is not set > -# CONFIG_NLS_CODEPAGE_950 is not set > -# CONFIG_NLS_CODEPAGE_932 is not set > -# CONFIG_NLS_CODEPAGE_949 is not set > -# CONFIG_NLS_CODEPAGE_874 is not set > -# CONFIG_NLS_ISO8859_8 is not set > -# CONFIG_NLS_CODEPAGE_1250 is not set > -# CONFIG_NLS_CODEPAGE_1251 is not set > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -# CONFIG_NLS_ISO8859_2 is not set > -# CONFIG_NLS_ISO8859_3 is not set > -# CONFIG_NLS_ISO8859_4 is not set > -# CONFIG_NLS_ISO8859_5 is not set > -# CONFIG_NLS_ISO8859_6 is not set > -# CONFIG_NLS_ISO8859_7 is not set > -# CONFIG_NLS_ISO8859_9 is not set > -# CONFIG_NLS_ISO8859_13 is not set > -# CONFIG_NLS_ISO8859_14 is not set > -# CONFIG_NLS_ISO8859_15 is not set > -# CONFIG_NLS_KOI8_R is not set > -# CONFIG_NLS_KOI8_U is not set > -CONFIG_NLS_UTF8=y > -# CONFIG_DLM is not set > - > -# > -# Kernel hacking > -# > -CONFIG_PRINTK_TIME=y > -# CONFIG_ENABLE_WARN_DEPRECATED is not set > -# CONFIG_ENABLE_MUST_CHECK is not set > -CONFIG_FRAME_WARN=1024 > -CONFIG_MAGIC_SYSRQ=y > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -CONFIG_DEBUG_KERNEL=y > -# CONFIG_DEBUG_SHIRQ is not set > -CONFIG_DETECT_SOFTLOCKUP=y > -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set > -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 > -CONFIG_DETECT_HUNG_TASK=y > -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set > -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 > -CONFIG_SCHED_DEBUG=y > -CONFIG_SCHEDSTATS=y > -CONFIG_TIMER_STATS=y > -# CONFIG_DEBUG_OBJECTS is not set > -# CONFIG_SLUB_DEBUG_ON is not set > -CONFIG_SLUB_STATS=y > -# CONFIG_DEBUG_KMEMLEAK is not set > -CONFIG_DEBUG_PREEMPT=y > -# CONFIG_DEBUG_RT_MUTEXES is not set > -# CONFIG_RT_MUTEX_TESTER is not set > -# CONFIG_DEBUG_SPINLOCK is not set > -# CONFIG_DEBUG_MUTEXES is not set > -# CONFIG_DEBUG_LOCK_ALLOC is not set > -# CONFIG_PROVE_LOCKING is not set > -# CONFIG_LOCK_STAT is not set > -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set > -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set > -CONFIG_STACKTRACE=y > -# CONFIG_DEBUG_KOBJECT is not set > -# CONFIG_DEBUG_BUGVERBOSE is not set > -# CONFIG_DEBUG_INFO is not set > -# CONFIG_DEBUG_VM is not set > -# CONFIG_DEBUG_WRITECOUNT is not set > -# CONFIG_DEBUG_MEMORY_INIT is not set > -# CONFIG_DEBUG_LIST is not set > -# CONFIG_DEBUG_SG is not set > -# CONFIG_DEBUG_NOTIFIERS is not set > -# CONFIG_DEBUG_CREDENTIALS is not set > -CONFIG_FRAME_POINTER=y > -# CONFIG_BOOT_PRINTK_DELAY is not set > -# CONFIG_RCU_TORTURE_TEST is not set > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_BACKTRACE_SELF_TEST is not set > -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set > -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set > -# CONFIG_FAULT_INJECTION is not set > -CONFIG_LATENCYTOP=y > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -# CONFIG_PAGE_POISONING is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_TRACING_SUPPORT=y > -# CONFIG_FTRACE is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_KGDB is not set > -# CONFIG_ARM_UNWIND is not set > -# CONFIG_DEBUG_USER is not set > -# CONFIG_DEBUG_ERRORS is not set > -# CONFIG_DEBUG_STACK_USAGE is not set > -CONFIG_DEBUG_LL=y > -CONFIG_EARLY_PRINTK=y > -# CONFIG_DEBUG_ICEDCC is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -# CONFIG_KEYS is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -# CONFIG_DEFAULT_SECURITY_SMACK is not set > -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_XOR_BLOCKS=m > -CONFIG_ASYNC_CORE=m > -CONFIG_ASYNC_MEMCPY=m > -CONFIG_ASYNC_XOR=m > -CONFIG_ASYNC_PQ=m > -CONFIG_ASYNC_RAID6_RECOV=m > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -CONFIG_CRYPTO_ALGAPI=y > -CONFIG_CRYPTO_ALGAPI2=y > -CONFIG_CRYPTO_AEAD2=y > -CONFIG_CRYPTO_BLKCIPHER=m > -CONFIG_CRYPTO_BLKCIPHER2=y > -CONFIG_CRYPTO_HASH=m > -CONFIG_CRYPTO_HASH2=y > -CONFIG_CRYPTO_RNG2=y > -CONFIG_CRYPTO_PCOMP=y > -CONFIG_CRYPTO_MANAGER=m > -CONFIG_CRYPTO_MANAGER2=y > -# CONFIG_CRYPTO_GF128MUL is not set > -# CONFIG_CRYPTO_NULL is not set > -CONFIG_CRYPTO_WORKQUEUE=y > -# CONFIG_CRYPTO_CRYPTD is not set > -# CONFIG_CRYPTO_AUTHENC is not set > -# CONFIG_CRYPTO_TEST is not set > - > -# > -# Authenticated Encryption with Associated Data > -# > -# CONFIG_CRYPTO_CCM is not set > -# CONFIG_CRYPTO_GCM is not set > -# CONFIG_CRYPTO_SEQIV is not set > - > -# > -# Block modes > -# > -CONFIG_CRYPTO_CBC=m > -# CONFIG_CRYPTO_CTR is not set > -# CONFIG_CRYPTO_CTS is not set > -CONFIG_CRYPTO_ECB=m > -# CONFIG_CRYPTO_LRW is not set > -# CONFIG_CRYPTO_PCBC is not set > -# CONFIG_CRYPTO_XTS is not set > - > -# > -# Hash modes > -# > -# CONFIG_CRYPTO_HMAC is not set > -# CONFIG_CRYPTO_XCBC is not set > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -CONFIG_CRYPTO_CRC32C=m > -# CONFIG_CRYPTO_GHASH is not set > -# CONFIG_CRYPTO_MD4 is not set > -CONFIG_CRYPTO_MD5=m > -CONFIG_CRYPTO_MICHAEL_MIC=m > -# CONFIG_CRYPTO_RMD128 is not set > -# CONFIG_CRYPTO_RMD160 is not set > -# CONFIG_CRYPTO_RMD256 is not set > -# CONFIG_CRYPTO_RMD320 is not set > -CONFIG_CRYPTO_SHA1=m > -# CONFIG_CRYPTO_SHA256 is not set > -# CONFIG_CRYPTO_SHA512 is not set > -# CONFIG_CRYPTO_TGR192 is not set > -# CONFIG_CRYPTO_WP512 is not set > - > -# > -# Ciphers > -# > -CONFIG_CRYPTO_AES=m > -# CONFIG_CRYPTO_ANUBIS is not set > -CONFIG_CRYPTO_ARC4=m > -# CONFIG_CRYPTO_BLOWFISH is not set > -# CONFIG_CRYPTO_CAMELLIA is not set > -# CONFIG_CRYPTO_CAST5 is not set > -# CONFIG_CRYPTO_CAST6 is not set > -# CONFIG_CRYPTO_DES is not set > -# CONFIG_CRYPTO_FCRYPT is not set > -# CONFIG_CRYPTO_KHAZAD is not set > -# CONFIG_CRYPTO_SALSA20 is not set > -# CONFIG_CRYPTO_SEED is not set > -# CONFIG_CRYPTO_SERPENT is not set > -# CONFIG_CRYPTO_TEA is not set > -# CONFIG_CRYPTO_TWOFISH is not set > - > -# > -# Compression > -# > -CONFIG_CRYPTO_DEFLATE=y > -# CONFIG_CRYPTO_ZLIB is not set > -CONFIG_CRYPTO_LZO=y > - > -# > -# Random Number Generation > -# > -# CONFIG_CRYPTO_ANSI_CPRNG is not set > -# CONFIG_CRYPTO_HW is not set > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=m > -CONFIG_CRC16=y > -CONFIG_CRC_T10DIF=y > -CONFIG_CRC_ITU_T=m > -CONFIG_CRC32=y > -CONFIG_CRC7=m > -CONFIG_LIBCRC32C=m > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_LZO_COMPRESS=y > -CONFIG_LZO_DECOMPRESS=y > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_DECOMPRESS_BZIP2=y > -CONFIG_DECOMPRESS_LZMA=y > -CONFIG_GENERIC_ALLOCATOR=y > -CONFIG_TEXTSEARCH=y > -CONFIG_TEXTSEARCH_KMP=m > -CONFIG_TEXTSEARCH_BM=m > -CONFIG_TEXTSEARCH_FSM=m > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/defconfig b/recipes- > kernel/linux/linux-davinci/hawkboard/defconfig > deleted file mode 100644 > index 9bd0545..0000000 > --- a/recipes-kernel/linux/linux-davinci/hawkboard/defconfig > +++ /dev/null > @@ -1,2659 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux kernel version: 2.6.33-rc4 > -# Mon Jun 6 12:36:41 2011 > -# > -CONFIG_ARM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_GENERIC_GPIO=y > -CONFIG_GENERIC_TIME=y > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_ZONE_DMA=y > -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -CONFIG_VECTORS_BASE=0xffff0000 > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_LOCK_KERNEL=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_BZIP2 is not set > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -CONFIG_BSD_PROCESS_ACCT=y > -CONFIG_BSD_PROCESS_ACCT_V3=y > -CONFIG_TASKSTATS=y > -CONFIG_TASK_DELAY_ACCT=y > -CONFIG_TASK_XACCT=y > -CONFIG_TASK_IO_ACCOUNTING=y > -# CONFIG_AUDIT is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_RCU=y > -# CONFIG_TREE_PREEMPT_RCU is not set > -# CONFIG_TINY_RCU is not set > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=14 > -CONFIG_GROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -CONFIG_RT_GROUP_SCHED=y > -CONFIG_USER_SCHED=y > -# CONFIG_CGROUP_SCHED is not set > -CONFIG_CGROUPS=y > -# CONFIG_CGROUP_DEBUG is not set > -CONFIG_CGROUP_NS=y > -CONFIG_CGROUP_FREEZER=y > -CONFIG_CGROUP_DEVICE=y > -CONFIG_CPUSETS=y > -# CONFIG_PROC_PID_CPUSET is not set > -CONFIG_CGROUP_CPUACCT=y > -CONFIG_RESOURCE_COUNTERS=y > -CONFIG_CGROUP_MEM_RES_CTLR=y > -CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y > -CONFIG_MM_OWNER=y > -# CONFIG_SYSFS_DEPRECATED_V2 is not set > -# CONFIG_RELAY is not set > -CONFIG_NAMESPACES=y > -CONFIG_UTS_NS=y > -CONFIG_IPC_NS=y > -CONFIG_USER_NS=y > -CONFIG_PID_NS=y > -CONFIG_NET_NS=y > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -CONFIG_RD_BZIP2=y > -CONFIG_RD_LZMA=y > -# CONFIG_RD_LZO is not set > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EMBEDDED=y > -CONFIG_UID16=y > -CONFIG_SYSCTL_SYSCALL=y > -CONFIG_KALLSYMS=y > -CONFIG_KALLSYMS_ALL=y > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_VM_EVENT_COUNTERS=y > -CONFIG_SLUB_DEBUG=y > -CONFIG_COMPAT_BRK=y > -# CONFIG_SLAB is not set > -CONFIG_SLUB=y > -# CONFIG_SLOB is not set > -CONFIG_PROFILING=y > -CONFIG_TRACEPOINTS=y > -CONFIG_OPROFILE=m > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_CLK=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -CONFIG_SLOW_WORK=y > -# CONFIG_SLOW_WORK_DEBUG is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -# CONFIG_MODULE_FORCE_LOAD is not set > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -# CONFIG_MODULE_SRCVERSION_ALL is not set > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -CONFIG_BLK_DEV_BSG=y > -CONFIG_BLK_DEV_INTEGRITY=y > -# CONFIG_BLK_CGROUP is not set > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -CONFIG_IOSCHED_DEADLINE=m > -CONFIG_IOSCHED_CFQ=m > -# CONFIG_CFQ_GROUP_IOSCHED is not set > -# CONFIG_DEFAULT_DEADLINE is not set > -# CONFIG_DEFAULT_CFQ is not set > -CONFIG_DEFAULT_NOOP=y > -CONFIG_DEFAULT_IOSCHED="noop" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_AAEC2000 is not set > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_L7200 is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5PC1XX is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_LH7A40X is not set > -# CONFIG_ARCH_U300 is not set > -CONFIG_ARCH_DAVINCI=y > -# CONFIG_ARCH_OMAP is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_U8500 is not set > -CONFIG_CP_INTC=y > - > -# > -# TI DaVinci Implementations > -# > - > -# > -# DaVinci Core Type > -# > -# CONFIG_ARCH_DAVINCI_DM644x is not set > -# CONFIG_ARCH_DAVINCI_DM355 is not set > -# CONFIG_ARCH_DAVINCI_DM646x is not set > -# CONFIG_ARCH_DAVINCI_DA830 is not set > -CONFIG_ARCH_DAVINCI_DA850=y > -CONFIG_DA8XX_MAX_SPEED_300=y > -# CONFIG_DA8XX_MAX_SPEED_372 is not set > -# CONFIG_DA8XX_MAX_SPEED_408 is not set > -# CONFIG_DA8XX_MAX_SPEED_456 is not set > -CONFIG_ARCH_DAVINCI_DA8XX=y > -# CONFIG_ARCH_DAVINCI_DM365 is not set > - > -# > -# DaVinci Board Type > -# > -CONFIG_MACH_DAVINCI_DA850_EVM=y > -CONFIG_DA850_UI_NONE=y > -# CONFIG_DA850_UI_RMII is not set > -# CONFIG_DA850_UI_CLCD is not set > -# CONFIG_DA850_UI_VIDEO_PORT is not set > -CONFIG_MACH_OMAPL138_HAWKBOARD=y > -CONFIG_DAVINCI_MUX=y > -# CONFIG_DAVINCI_MUX_DEBUG is not set > -# CONFIG_DAVINCI_MUX_WARNINGS is not set > -CONFIG_DAVINCI_RESET_CLOCKS=y > -CONFIG_DAVINCI_MCBSP=y > -# CONFIG_DAVINCI_MCBSP0 is not set > -CONFIG_DAVINCI_MCBSP1=y > - > -# > -# Processor Type > -# > -CONFIG_CPU_ARM926T=y > -CONFIG_CPU_32v5=y > -CONFIG_CPU_ABRT_EV5TJ=y > -CONFIG_CPU_PABRT_LEGACY=y > -CONFIG_CPU_CACHE_VIVT=y > -CONFIG_CPU_COPY_V4WB=y > -CONFIG_CPU_TLB_V4WBI=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -CONFIG_ARM_L1_CACHE_SHIFT=5 > -CONFIG_COMMON_CLKDEV=y > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=100 > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -# CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=999999 > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=1 > -CONFIG_BOUNCE=y > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -# CONFIG_LEDS is not set > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE=" debug " > -# CONFIG_XIP_KERNEL is not set > -CONFIG_KEXEC=y > -CONFIG_ATAGS_PROC=y > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -CONFIG_CPU_FREQ_STAT_DETAILS=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -# CONFIG_VFP is not set > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -CONFIG_BINFMT_AOUT=m > -CONFIG_BINFMT_MISC=m > - > -# > -# Power management options > -# > -CONFIG_PM=y > -# CONFIG_PM_DEBUG is not set > -CONFIG_PM_SLEEP=y > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -# CONFIG_APM_EMULATION is not set > -# CONFIG_PM_RUNTIME is not set > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -# CONFIG_PACKET_MMAP is not set > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -# CONFIG_NET_KEY is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_FIB_HASH=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -# CONFIG_IP_PNP_BOOTP is not set > -# CONFIG_IP_PNP_RARP is not set > -# CONFIG_NET_IPIP is not set > -# CONFIG_NET_IPGRE is not set > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -# CONFIG_INET_AH is not set > -# CONFIG_INET_ESP is not set > -# CONFIG_INET_IPCOMP is not set > -# CONFIG_INET_XFRM_TUNNEL is not set > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -# CONFIG_INET_LRO is not set > -CONFIG_INET_DIAG=y > -CONFIG_INET_TCP_DIAG=y > -# CONFIG_TCP_CONG_ADVANCED is not set > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -# CONFIG_INET6_AH is not set > -# CONFIG_INET6_ESP is not set > -# CONFIG_INET6_IPCOMP is not set > -# CONFIG_IPV6_MIP6 is not set > -# CONFIG_INET6_XFRM_TUNNEL is not set > -# CONFIG_INET6_TUNNEL is not set > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -# CONFIG_IPV6_TUNNEL is not set > -# CONFIG_IPV6_MULTIPLE_TABLES is not set > -# CONFIG_IPV6_MROUTE is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > - > -# > -# Core Netfilter Configuration > -# > -CONFIG_NETFILTER_NETLINK=m > -CONFIG_NETFILTER_NETLINK_QUEUE=m > -CONFIG_NETFILTER_NETLINK_LOG=m > -CONFIG_NF_CONNTRACK=m > -CONFIG_NF_CT_ACCT=y > -CONFIG_NF_CONNTRACK_MARK=y > -CONFIG_NF_CONNTRACK_EVENTS=y > -CONFIG_NF_CT_PROTO_DCCP=m > -CONFIG_NF_CT_PROTO_GRE=m > -CONFIG_NF_CT_PROTO_SCTP=m > -CONFIG_NF_CT_PROTO_UDPLITE=m > -CONFIG_NF_CONNTRACK_AMANDA=m > -CONFIG_NF_CONNTRACK_FTP=m > -CONFIG_NF_CONNTRACK_H323=m > -CONFIG_NF_CONNTRACK_IRC=m > -CONFIG_NF_CONNTRACK_NETBIOS_NS=m > -CONFIG_NF_CONNTRACK_PPTP=m > -CONFIG_NF_CONNTRACK_SANE=m > -CONFIG_NF_CONNTRACK_SIP=m > -CONFIG_NF_CONNTRACK_TFTP=m > -CONFIG_NF_CT_NETLINK=m > -CONFIG_NETFILTER_TPROXY=m > -CONFIG_NETFILTER_XTABLES=m > -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m > -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m > -CONFIG_NETFILTER_XT_TARGET_DSCP=m > -CONFIG_NETFILTER_XT_TARGET_HL=m > -# CONFIG_NETFILTER_XT_TARGET_LED is not set > -CONFIG_NETFILTER_XT_TARGET_MARK=m > -CONFIG_NETFILTER_XT_TARGET_NFLOG=m > -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m > -CONFIG_NETFILTER_XT_TARGET_NOTRACK=m > -CONFIG_NETFILTER_XT_TARGET_RATEEST=m > -CONFIG_NETFILTER_XT_TARGET_TPROXY=m > -CONFIG_NETFILTER_XT_TARGET_TRACE=m > -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m > -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m > -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m > -CONFIG_NETFILTER_XT_MATCH_COMMENT=m > -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m > -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m > -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m > -CONFIG_NETFILTER_XT_MATCH_DCCP=m > -CONFIG_NETFILTER_XT_MATCH_DSCP=m > -CONFIG_NETFILTER_XT_MATCH_ESP=m > -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m > -CONFIG_NETFILTER_XT_MATCH_HELPER=m > -CONFIG_NETFILTER_XT_MATCH_HL=m > -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m > -CONFIG_NETFILTER_XT_MATCH_LENGTH=m > -CONFIG_NETFILTER_XT_MATCH_LIMIT=m > -CONFIG_NETFILTER_XT_MATCH_MAC=m > -CONFIG_NETFILTER_XT_MATCH_MARK=m > -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m > -CONFIG_NETFILTER_XT_MATCH_OWNER=m > -CONFIG_NETFILTER_XT_MATCH_POLICY=m > -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m > -CONFIG_NETFILTER_XT_MATCH_QUOTA=m > -CONFIG_NETFILTER_XT_MATCH_RATEEST=m > -CONFIG_NETFILTER_XT_MATCH_REALM=m > -CONFIG_NETFILTER_XT_MATCH_RECENT=m > -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set > -CONFIG_NETFILTER_XT_MATCH_SCTP=m > -CONFIG_NETFILTER_XT_MATCH_SOCKET=m > -CONFIG_NETFILTER_XT_MATCH_STATE=m > -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m > -CONFIG_NETFILTER_XT_MATCH_STRING=m > -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m > -CONFIG_NETFILTER_XT_MATCH_TIME=m > -CONFIG_NETFILTER_XT_MATCH_U32=m > -CONFIG_NETFILTER_XT_MATCH_OSF=m > -# CONFIG_IP_VS is not set > - > -# > -# IP: Netfilter Configuration > -# > -CONFIG_NF_DEFRAG_IPV4=m > -CONFIG_NF_CONNTRACK_IPV4=m > -CONFIG_NF_CONNTRACK_PROC_COMPAT=y > -# CONFIG_IP_NF_QUEUE is not set > -CONFIG_IP_NF_IPTABLES=m > -CONFIG_IP_NF_MATCH_ADDRTYPE=m > -CONFIG_IP_NF_MATCH_AH=m > -CONFIG_IP_NF_MATCH_ECN=m > -CONFIG_IP_NF_MATCH_TTL=m > -CONFIG_IP_NF_FILTER=m > -CONFIG_IP_NF_TARGET_REJECT=m > -CONFIG_IP_NF_TARGET_LOG=m > -CONFIG_IP_NF_TARGET_ULOG=m > -CONFIG_NF_NAT=m > -CONFIG_NF_NAT_NEEDED=y > -CONFIG_IP_NF_TARGET_MASQUERADE=m > -CONFIG_IP_NF_TARGET_NETMAP=m > -CONFIG_IP_NF_TARGET_REDIRECT=m > -CONFIG_NF_NAT_SNMP_BASIC=m > -CONFIG_NF_NAT_PROTO_DCCP=m > -CONFIG_NF_NAT_PROTO_GRE=m > -CONFIG_NF_NAT_PROTO_UDPLITE=m > -CONFIG_NF_NAT_PROTO_SCTP=m > -CONFIG_NF_NAT_FTP=m > -CONFIG_NF_NAT_IRC=m > -CONFIG_NF_NAT_TFTP=m > -CONFIG_NF_NAT_AMANDA=m > -CONFIG_NF_NAT_PPTP=m > -CONFIG_NF_NAT_H323=m > -CONFIG_NF_NAT_SIP=m > -CONFIG_IP_NF_MANGLE=m > -CONFIG_IP_NF_TARGET_CLUSTERIP=m > -CONFIG_IP_NF_TARGET_ECN=m > -CONFIG_IP_NF_TARGET_TTL=m > -CONFIG_IP_NF_RAW=m > -CONFIG_IP_NF_ARPTABLES=m > -CONFIG_IP_NF_ARPFILTER=m > -CONFIG_IP_NF_ARP_MANGLE=m > - > -# > -# IPv6: Netfilter Configuration > -# > -# CONFIG_NF_CONNTRACK_IPV6 is not set > -# CONFIG_IP6_NF_QUEUE is not set > -# CONFIG_IP6_NF_IPTABLES is not set > -# CONFIG_IP_DCCP is not set > -# CONFIG_IP_SCTP is not set > -# CONFIG_RDS is not set > -# CONFIG_TIPC is not set > -# CONFIG_ATM is not set > -# CONFIG_BRIDGE is not set > -# CONFIG_NET_DSA is not set > -# CONFIG_VLAN_8021Q is not set > -# CONFIG_DECNET is not set > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -# CONFIG_WAN_ROUTER is not set > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -# CONFIG_NET_SCHED is not set > -CONFIG_NET_CLS_ROUTE=y > -# CONFIG_DCB is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_NET_DROP_MONITOR is not set > -# CONFIG_HAMRADIO is not set > -CONFIG_CAN=m > -CONFIG_CAN_RAW=m > -CONFIG_CAN_BCM=m > - > -# > -# CAN Device Drivers > -# > -CONFIG_CAN_VCAN=m > -CONFIG_CAN_DEV=m > -# CONFIG_CAN_CALC_BITTIMING is not set > -# CONFIG_CAN_MCP251X is not set > -# CONFIG_CAN_SJA1000 is not set > - > -# > -# CAN USB interfaces > -# > -CONFIG_CAN_EMS_USB=m > -# CONFIG_CAN_DEBUG_DEVICES is not set > -CONFIG_IRDA=m > - > -# > -# IrDA protocols > -# > -CONFIG_IRLAN=m > -# CONFIG_IRNET is not set > -CONFIG_IRCOMM=m > -CONFIG_IRDA_ULTRA=y > - > -# > -# IrDA options > -# > -CONFIG_IRDA_CACHE_LAST_LSAP=y > -CONFIG_IRDA_FAST_RR=y > -# CONFIG_IRDA_DEBUG is not set > - > -# > -# Infrared-port device drivers > -# > - > -# > -# SIR device drivers > -# > -CONFIG_IRTTY_SIR=m > - > -# > -# Dongle support > -# > -CONFIG_DONGLE=y > -CONFIG_ESI_DONGLE=m > -CONFIG_ACTISYS_DONGLE=m > -CONFIG_TEKRAM_DONGLE=m > -CONFIG_TOIM3232_DONGLE=m > -CONFIG_LITELINK_DONGLE=m > -CONFIG_MA600_DONGLE=m > -# CONFIG_GIRBIL_DONGLE is not set > -CONFIG_MCP2120_DONGLE=m > -CONFIG_OLD_BELKIN_DONGLE=m > -CONFIG_ACT200L_DONGLE=m > -CONFIG_KINGSUN_DONGLE=m > -CONFIG_KSDAZZLE_DONGLE=m > -CONFIG_KS959_DONGLE=m > - > -# > -# FIR device drivers > -# > -CONFIG_USB_IRDA=m > -CONFIG_SIGMATEL_FIR=m > -CONFIG_MCS_FIR=m > -CONFIG_BT=m > -CONFIG_BT_L2CAP=m > -CONFIG_BT_SCO=m > -CONFIG_BT_RFCOMM=m > -CONFIG_BT_RFCOMM_TTY=y > -CONFIG_BT_BNEP=m > -CONFIG_BT_BNEP_MC_FILTER=y > -CONFIG_BT_BNEP_PROTO_FILTER=y > -CONFIG_BT_HIDP=m > - > -# > -# Bluetooth device drivers > -# > -CONFIG_BT_HCIBTUSB=m > -CONFIG_BT_HCIBTSDIO=m > -CONFIG_BT_HCIUART=m > -CONFIG_BT_HCIUART_H4=y > -CONFIG_BT_HCIUART_BCSP=y > -CONFIG_BT_HCIUART_LL=y > -CONFIG_BT_HCIBCM203X=m > -CONFIG_BT_HCIBPA10X=m > -CONFIG_BT_HCIBFUSB=m > -# CONFIG_BT_HCIVHCI is not set > -CONFIG_BT_MRVL=m > -CONFIG_BT_MRVL_SDIO=m > -# CONFIG_AF_RXRPC is not set > -CONFIG_WIRELESS=y > -CONFIG_WIRELESS_EXT=y > -CONFIG_WEXT_CORE=y > -CONFIG_WEXT_PROC=y > -CONFIG_WEXT_SPY=y > -CONFIG_WEXT_PRIV=y > -CONFIG_CFG80211=m > -# CONFIG_NL80211_TESTMODE is not set > -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set > -# CONFIG_CFG80211_REG_DEBUG is not set > -CONFIG_CFG80211_DEFAULT_PS=y > -# CONFIG_CFG80211_DEBUGFS is not set > -# CONFIG_WIRELESS_OLD_REGULATORY is not set > -CONFIG_CFG80211_WEXT=y > -CONFIG_WIRELESS_EXT_SYSFS=y > -CONFIG_LIB80211=m > -CONFIG_LIB80211_CRYPT_WEP=m > -CONFIG_LIB80211_CRYPT_CCMP=m > -CONFIG_LIB80211_CRYPT_TKIP=m > -# CONFIG_LIB80211_DEBUG is not set > -CONFIG_MAC80211=m > -# CONFIG_MAC80211_RC_PID is not set > -CONFIG_MAC80211_RC_MINSTREL=y > -# CONFIG_MAC80211_RC_DEFAULT_PID is not set > -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y > -CONFIG_MAC80211_RC_DEFAULT="minstrel" > -# CONFIG_MAC80211_MESH is not set > -CONFIG_MAC80211_LEDS=y > -# CONFIG_MAC80211_DEBUGFS is not set > -# CONFIG_MAC80211_DEBUG_MENU is not set > -CONFIG_WIMAX=m > -CONFIG_WIMAX_DEBUG_LEVEL=8 > -CONFIG_RFKILL=m > -CONFIG_RFKILL_LEDS=y > -CONFIG_RFKILL_INPUT=y > -# CONFIG_NET_9P is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="" > -CONFIG_DEVTMPFS=y > -CONFIG_DEVTMPFS_MOUNT=y > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -CONFIG_FW_LOADER=m > -CONFIG_FIRMWARE_IN_KERNEL=y > -CONFIG_EXTRA_FIRMWARE="" > -# CONFIG_DEBUG_DRIVER is not set > -# CONFIG_DEBUG_DEVRES is not set > -# CONFIG_SYS_HYPERVISOR is not set > -CONFIG_CONNECTOR=m > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_CONCAT is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -# CONFIG_MTD_OOPS is not set > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -CONFIG_MTD_M25P80=y > -CONFIG_M25PXX_USE_FAST_READ=y > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -CONFIG_MTD_NAND=y > -# CONFIG_MTD_NAND_VERIFY_WRITE is not set > -# CONFIG_MTD_NAND_ECC_SMC is not set > -# CONFIG_MTD_NAND_MUSEUM_IDS is not set > -# CONFIG_MTD_NAND_GPIO is not set > -CONFIG_MTD_NAND_IDS=y > -# CONFIG_MTD_NAND_DISKONCHIP is not set > -# CONFIG_MTD_NAND_NANDSIM is not set > -# CONFIG_MTD_NAND_PLATFORM is not set > -# CONFIG_MTD_ALAUDA is not set > -CONFIG_MTD_NAND_DAVINCI=y > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > - > -# > -# UBI - Unsorted block images > -# > -CONFIG_MTD_UBI=y > -CONFIG_MTD_UBI_WL_THRESHOLD=4096 > -CONFIG_MTD_UBI_BEB_RESERVE=1 > -CONFIG_MTD_UBI_GLUEBI=m > - > -# > -# UBI debugging options > -# > -# CONFIG_MTD_UBI_DEBUG is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=m > -# CONFIG_BLK_DEV_CRYPTOLOOP is not set > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_DRBD is not set > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=1 > -CONFIG_BLK_DEV_RAM_SIZE=32768 > -# CONFIG_BLK_DEV_XIP is not set > -# CONFIG_CDROM_PKTCDVD is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=y > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -CONFIG_EEPROM_93CX6=m > -# CONFIG_IWMC3200TOP is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -CONFIG_RAID_ATTRS=m > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -CONFIG_SCSI_TGT=m > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -CONFIG_CHR_DEV_ST=m > -CONFIG_CHR_DEV_OSST=m > -CONFIG_BLK_DEV_SR=m > -CONFIG_BLK_DEV_SR_VENDOR=y > -CONFIG_CHR_DEV_SG=m > -CONFIG_CHR_DEV_SCH=m > -CONFIG_SCSI_MULTI_LUN=y > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -CONFIG_SCSI_SCAN_ASYNC=y > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -CONFIG_SCSI_ISCSI_ATTRS=m > -# CONFIG_SCSI_SAS_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -CONFIG_ISCSI_TCP=m > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -CONFIG_ATA=y > -# CONFIG_ATA_NONSTANDARD is not set > -CONFIG_ATA_VERBOSE_ERROR=y > -CONFIG_SATA_PMP=y > -CONFIG_SATA_AHCI=y > -# CONFIG_ATA_SFF is not set > -CONFIG_MD=y > -CONFIG_BLK_DEV_MD=m > -CONFIG_MD_LINEAR=m > -CONFIG_MD_RAID0=m > -CONFIG_MD_RAID1=m > -CONFIG_MD_RAID10=m > -CONFIG_MD_RAID456=m > -CONFIG_MD_RAID6_PQ=m > -CONFIG_ASYNC_RAID6_TEST=m > -CONFIG_MD_MULTIPATH=m > -CONFIG_MD_FAULTY=m > -CONFIG_BLK_DEV_DM=m > -# CONFIG_DM_DEBUG is not set > -CONFIG_DM_CRYPT=m > -CONFIG_DM_SNAPSHOT=m > -CONFIG_DM_MIRROR=m > -CONFIG_DM_LOG_USERSPACE=m > -CONFIG_DM_ZERO=m > -CONFIG_DM_MULTIPATH=m > -CONFIG_DM_MULTIPATH_QL=m > -CONFIG_DM_MULTIPATH_ST=m > -CONFIG_DM_DELAY=m > -CONFIG_DM_UEVENT=y > -CONFIG_NETDEVICES=y > -CONFIG_DUMMY=m > -CONFIG_BONDING=m > -CONFIG_MACVLAN=m > -CONFIG_EQUALIZER=m > -CONFIG_TUN=m > -CONFIG_VETH=m > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -CONFIG_LXT_PHY=y > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -CONFIG_SMSC_PHY=y > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -CONFIG_LSI_ET1011C_PHY=y > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -CONFIG_MII=y > -# CONFIG_AX88796 is not set > -# CONFIG_SMC91X is not set > -CONFIG_TI_DAVINCI_EMAC=y > -# CONFIG_DM9000 is not set > -# CONFIG_ENC28J60 is not set > -# CONFIG_ETHOC is not set > -# CONFIG_SMC911X is not set > -# CONFIG_SMSC911X is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -# CONFIG_KS8842 is not set > -# CONFIG_KS8851 is not set > -# CONFIG_KS8851_MLL is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_LIBERTAS_THINFIRM is not set > -CONFIG_AT76C50X_USB=m > -CONFIG_USB_ZD1201=m > -CONFIG_USB_NET_RNDIS_WLAN=m > -CONFIG_RTL8187=m > -CONFIG_RTL8187_LEDS=y > -# CONFIG_MAC80211_HWSIM is not set > -# CONFIG_ATH_COMMON is not set > -# CONFIG_B43 is not set > -# CONFIG_B43LEGACY is not set > -CONFIG_HOSTAP=m > -CONFIG_HOSTAP_FIRMWARE=y > -# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set > -# CONFIG_IWM is not set > -# CONFIG_LIBERTAS is not set > -CONFIG_P54_COMMON=m > -CONFIG_P54_USB=m > -# CONFIG_P54_SPI is not set > -CONFIG_P54_LEDS=y > -CONFIG_RT2X00=m > -CONFIG_RT2500USB=m > -CONFIG_RT73USB=m > -CONFIG_RT2800USB=m > -CONFIG_RT2800_LIB=m > -CONFIG_RT2X00_LIB_USB=m > -CONFIG_RT2X00_LIB=m > -CONFIG_RT2X00_LIB_HT=y > -CONFIG_RT2X00_LIB_FIRMWARE=y > -CONFIG_RT2X00_LIB_CRYPTO=y > -CONFIG_RT2X00_LIB_LEDS=y > -# CONFIG_RT2X00_DEBUG is not set > -CONFIG_WL12XX=m > -CONFIG_WL1251=m > -# CONFIG_WL1251_SPI is not set > -CONFIG_WL1251_SDIO=m > -CONFIG_WL1271=m > -CONFIG_ZD1211RW=m > -# CONFIG_ZD1211RW_DEBUG is not set > - > -# > -# WiMAX Wireless Broadband devices > -# > -CONFIG_WIMAX_I2400M=m > -CONFIG_WIMAX_I2400M_USB=m > -CONFIG_WIMAX_I2400M_SDIO=m > -# CONFIG_WIMAX_IWMC3200_SDIO is not set > -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 > - > -# > -# USB Network Adapters > -# > -CONFIG_USB_CATC=m > -CONFIG_USB_KAWETH=m > -CONFIG_USB_PEGASUS=m > -CONFIG_USB_RTL8150=m > -CONFIG_USB_USBNET=m > -CONFIG_USB_NET_AX8817X=m > -CONFIG_USB_NET_CDCETHER=m > -CONFIG_USB_NET_CDC_EEM=m > -CONFIG_USB_NET_DM9601=m > -CONFIG_USB_NET_SMSC95XX=m > -CONFIG_USB_NET_GL620A=m > -CONFIG_USB_NET_NET1080=m > -CONFIG_USB_NET_PLUSB=m > -CONFIG_USB_NET_MCS7830=m > -CONFIG_USB_NET_RNDIS_HOST=m > -CONFIG_USB_NET_CDC_SUBSET=m > -# CONFIG_USB_ALI_M5632 is not set > -# CONFIG_USB_AN2720 is not set > -CONFIG_USB_BELKIN=y > -CONFIG_USB_ARMLINUX=y > -# CONFIG_USB_EPSON2888 is not set > -# CONFIG_USB_KC2190 is not set > -CONFIG_USB_NET_ZAURUS=m > -CONFIG_USB_HSO=m > -CONFIG_USB_NET_INT51X1=m > -# CONFIG_WAN is not set > -CONFIG_PPP=m > -CONFIG_PPP_MULTILINK=y > -CONFIG_PPP_FILTER=y > -CONFIG_PPP_ASYNC=m > -CONFIG_PPP_SYNC_TTY=m > -CONFIG_PPP_DEFLATE=m > -CONFIG_PPP_BSDCOMP=m > -CONFIG_PPP_MPPE=m > -CONFIG_PPPOE=m > -CONFIG_PPPOL2TP=m > -# CONFIG_SLIP is not set > -CONFIG_SLHC=m > -CONFIG_NETCONSOLE=y > -# CONFIG_NETCONSOLE_DYNAMIC is not set > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -# CONFIG_INPUT_FF_MEMLESS is not set > -# CONFIG_INPUT_POLLDEV is not set > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -# CONFIG_INPUT_MOUSEDEV is not set > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -CONFIG_KEYBOARD_ATKBD=m > -# CONFIG_QT2160 is not set > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_LM8323 is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -CONFIG_KEYBOARD_XTKBD=m > -# CONFIG_INPUT_MOUSE is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2007 is not set > -# CONFIG_TOUCHSCREEN_TSC2004 is not set > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -CONFIG_TOUCHSCREEN_TPS6507X=y > -# CONFIG_INPUT_MISC is not set > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -# CONFIG_VT_CONSOLE is not set > -CONFIG_HW_CONSOLE=y > -# CONFIG_VT_HW_CONSOLE_BINDING is not set > -CONFIG_DEVKMEM=y > -# CONFIG_SERIAL_NONSTANDARD is not set > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=3 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -# CONFIG_SERIAL_8250_EXTENDED is not set > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -CONFIG_LEGACY_PTYS=y > -CONFIG_LEGACY_PTY_COUNT=8 > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=m > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=y > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -CONFIG_I2C_DAVINCI=y > -# CONFIG_I2C_DESIGNWARE is not set > -CONFIG_I2C_GPIO=y > -# CONFIG_I2C_OCORES is not set > -# CONFIG_I2C_SIMTEC is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_STUB is not set > - > -# > -# Miscellaneous I2C Chip support > -# > -# CONFIG_SENSORS_TSL2550 is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -# CONFIG_I2C_DEBUG_CHIP is not set > -CONFIG_SPI=y > -# CONFIG_SPI_DEBUG is not set > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -CONFIG_SPI_DAVINCI=y > -CONFIG_SPI_BITBANG=y > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -# CONFIG_SPI_SPIDEV is not set > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_DEBUG_GPIO is not set > -# CONFIG_GPIO_SYSFS is not set > - > -# > -# Memory mapped GPIO expanders: > -# > - > -# > -# I2C GPIO expanders: > -# > -# CONFIG_GPIO_MAX732X is not set > -CONFIG_GPIO_PCA953X=y > -CONFIG_GPIO_PCF857X=y > -# CONFIG_GPIO_ADP5588 is not set > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > - > -# > -# AC97 GPIO expanders: > -# > -# CONFIG_W1 is not set > -# CONFIG_POWER_SUPPLY is not set > -# CONFIG_HWMON is not set > -# CONFIG_THERMAL is not set > -CONFIG_WATCHDOG=y > -# CONFIG_WATCHDOG_NOWAYOUT is not set > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_DAVINCI_WATCHDOG=y > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -# CONFIG_SSB is not set > - > -# > -# Multifunction device drivers > -# > -# CONFIG_MFD_CORE is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507x=y > -# CONFIG_TWL4030_CORE is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13783 is not set > -# CONFIG_AB3100_CORE is not set > -# CONFIG_EZX_PCAP is not set > -# CONFIG_MFD_88PM8607 is not set > -# CONFIG_AB4500_CORE is not set > -# CONFIG_REGULATOR is not set > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_ALLOW_V4L1=y > -CONFIG_VIDEO_V4L1_COMPAT=y > -CONFIG_DVB_CORE=m > -CONFIG_VIDEO_MEDIA=m > - > -# > -# Multimedia drivers > -# > -CONFIG_IR_CORE=y > -CONFIG_VIDEO_IR=y > -CONFIG_MEDIA_ATTACH=y > -CONFIG_MEDIA_TUNER=m > -CONFIG_MEDIA_TUNER_CUSTOMISE=y > -CONFIG_MEDIA_TUNER_SIMPLE=m > -CONFIG_MEDIA_TUNER_TDA8290=m > -CONFIG_MEDIA_TUNER_TDA827X=m > -CONFIG_MEDIA_TUNER_TDA18271=m > -CONFIG_MEDIA_TUNER_TDA9887=m > -CONFIG_MEDIA_TUNER_TEA5761=m > -CONFIG_MEDIA_TUNER_TEA5767=m > -CONFIG_MEDIA_TUNER_MT20XX=m > -CONFIG_MEDIA_TUNER_MT2060=m > -CONFIG_MEDIA_TUNER_MT2266=m > -CONFIG_MEDIA_TUNER_MT2131=m > -CONFIG_MEDIA_TUNER_QT1010=m > -CONFIG_MEDIA_TUNER_XC2028=m > -CONFIG_MEDIA_TUNER_XC5000=m > -CONFIG_MEDIA_TUNER_MXL5005S=m > -CONFIG_MEDIA_TUNER_MXL5007T=m > -CONFIG_MEDIA_TUNER_MC44S803=m > -CONFIG_MEDIA_TUNER_MAX2165=m > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEO_V4L1=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_VMALLOC=m > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEOBUF_DVB=m > -CONFIG_VIDEO_TVEEPROM=m > -CONFIG_VIDEO_TUNER=m > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -CONFIG_VIDEO_IR_I2C=m > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TDA9875 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -CONFIG_VIDEO_MSP3400=m > -# CONFIG_VIDEO_CS5345 is not set > -CONFIG_VIDEO_CS53L32A=m > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -CONFIG_VIDEO_WM8775=m > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -# CONFIG_VIDEO_ADV7180 is not set > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -# CONFIG_VIDEO_MT9V011 is not set > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -CONFIG_VIDEO_SAA711X=m > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -CONFIG_VIDEO_TVP514X=y > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -CONFIG_VIDEO_CX25840=m > - > -# > -# MPEG video encoders > -# > -CONFIG_VIDEO_CX2341X=m > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set > -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y > -CONFIG_VIDEO_DAVINCI_VPIF=y > -CONFIG_VIDEO_VIVI=m > -# CONFIG_VIDEO_VPSS_SYSTEM is not set > -# CONFIG_VIDEO_VPFE_CAPTURE is not set > -# CONFIG_VIDEO_CPIA is not set > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_SAA5246A is not set > -# CONFIG_VIDEO_SAA5249 is not set > -# CONFIG_VIDEO_AU0828 is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=y > -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y > -CONFIG_USB_GSPCA=m > -# CONFIG_USB_M5602 is not set > -# CONFIG_USB_STV06XX is not set > -# CONFIG_USB_GL860 is not set > -# CONFIG_USB_GSPCA_CONEX is not set > -# CONFIG_USB_GSPCA_ETOMS is not set > -# CONFIG_USB_GSPCA_FINEPIX is not set > -# CONFIG_USB_GSPCA_JEILINJ is not set > -# CONFIG_USB_GSPCA_MARS is not set > -# CONFIG_USB_GSPCA_MR97310A is not set > -# CONFIG_USB_GSPCA_OV519 is not set > -# CONFIG_USB_GSPCA_OV534 is not set > -# CONFIG_USB_GSPCA_PAC207 is not set > -# CONFIG_USB_GSPCA_PAC7302 is not set > -# CONFIG_USB_GSPCA_PAC7311 is not set > -# CONFIG_USB_GSPCA_SN9C20X is not set > -# CONFIG_USB_GSPCA_SONIXB is not set > -# CONFIG_USB_GSPCA_SONIXJ is not set > -# CONFIG_USB_GSPCA_SPCA500 is not set > -# CONFIG_USB_GSPCA_SPCA501 is not set > -# CONFIG_USB_GSPCA_SPCA505 is not set > -# CONFIG_USB_GSPCA_SPCA506 is not set > -# CONFIG_USB_GSPCA_SPCA508 is not set > -# CONFIG_USB_GSPCA_SPCA561 is not set > -# CONFIG_USB_GSPCA_SQ905 is not set > -# CONFIG_USB_GSPCA_SQ905C is not set > -# CONFIG_USB_GSPCA_STK014 is not set > -# CONFIG_USB_GSPCA_STV0680 is not set > -# CONFIG_USB_GSPCA_SUNPLUS is not set > -# CONFIG_USB_GSPCA_T613 is not set > -# CONFIG_USB_GSPCA_TV8532 is not set > -# CONFIG_USB_GSPCA_VC032X is not set > -# CONFIG_USB_GSPCA_ZC3XX is not set > -CONFIG_VIDEO_PVRUSB2=m > -CONFIG_VIDEO_PVRUSB2_SYSFS=y > -CONFIG_VIDEO_PVRUSB2_DVB=y > -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set > -CONFIG_VIDEO_HDPVR=m > -CONFIG_VIDEO_EM28XX=m > -CONFIG_VIDEO_EM28XX_ALSA=m > -CONFIG_VIDEO_EM28XX_DVB=m > -CONFIG_VIDEO_CX231XX=m > -CONFIG_VIDEO_CX231XX_ALSA=m > -CONFIG_VIDEO_CX231XX_DVB=m > -CONFIG_VIDEO_USBVISION=m > -CONFIG_VIDEO_USBVIDEO=m > -CONFIG_USB_VICAM=m > -CONFIG_USB_IBMCAM=m > -CONFIG_USB_KONICAWC=m > -CONFIG_USB_QUICKCAM_MESSENGER=m > -CONFIG_USB_ET61X251=m > -CONFIG_VIDEO_OVCAMCHIP=m > -CONFIG_USB_W9968CF=m > -CONFIG_USB_OV511=m > -CONFIG_USB_SE401=m > -CONFIG_USB_SN9C102=m > -CONFIG_USB_STV680=m > -CONFIG_USB_ZC0301=m > -CONFIG_USB_PWC=m > -# CONFIG_USB_PWC_DEBUG is not set > -CONFIG_USB_PWC_INPUT_EVDEV=y > -CONFIG_USB_ZR364XX=m > -CONFIG_USB_STKWEBCAM=m > -CONFIG_USB_S2255=m > -CONFIG_RADIO_ADAPTERS=y > -# CONFIG_I2C_SI4713 is not set > -# CONFIG_RADIO_SI4713 is not set > -# CONFIG_USB_DSBR is not set > -# CONFIG_RADIO_SI470X is not set > -# CONFIG_USB_MR800 is not set > -# CONFIG_RADIO_TEA5764 is not set > -# CONFIG_RADIO_TEF6862 is not set > -CONFIG_DVB_MAX_ADAPTERS=8 > -CONFIG_DVB_DYNAMIC_MINORS=y > -CONFIG_DVB_CAPTURE_DRIVERS=y > -# CONFIG_TTPCI_EEPROM is not set > - > -# > -# Supported USB Adapters > -# > -CONFIG_DVB_USB=m > -# CONFIG_DVB_USB_DEBUG is not set > -CONFIG_DVB_USB_A800=m > -CONFIG_DVB_USB_DIBUSB_MB=m > -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y > -CONFIG_DVB_USB_DIBUSB_MC=m > -CONFIG_DVB_USB_DIB0700=m > -CONFIG_DVB_USB_UMT_010=m > -CONFIG_DVB_USB_CXUSB=m > -CONFIG_DVB_USB_M920X=m > -CONFIG_DVB_USB_GL861=m > -CONFIG_DVB_USB_AU6610=m > -CONFIG_DVB_USB_DIGITV=m > -CONFIG_DVB_USB_VP7045=m > -CONFIG_DVB_USB_VP702X=m > -CONFIG_DVB_USB_GP8PSK=m > -CONFIG_DVB_USB_NOVA_T_USB2=m > -CONFIG_DVB_USB_TTUSB2=m > -CONFIG_DVB_USB_DTT200U=m > -CONFIG_DVB_USB_OPERA1=m > -CONFIG_DVB_USB_AF9005=m > -CONFIG_DVB_USB_AF9005_REMOTE=m > -CONFIG_DVB_USB_DW2102=m > -CONFIG_DVB_USB_CINERGY_T2=m > -CONFIG_DVB_USB_ANYSEE=m > -CONFIG_DVB_USB_DTV5100=m > -CONFIG_DVB_USB_AF9015=m > -CONFIG_DVB_USB_CE6230=m > -CONFIG_DVB_USB_FRIIO=m > -CONFIG_DVB_USB_EC168=m > -# CONFIG_SMS_SIANO_MDTV is not set > - > -# > -# Supported FlexCopII (B2C2) Adapters > -# > -CONFIG_DVB_B2C2_FLEXCOP=m > -CONFIG_DVB_B2C2_FLEXCOP_USB=m > -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set > - > -# > -# Supported DVB Frontends > -# > -# CONFIG_DVB_FE_CUSTOMISE is not set > -CONFIG_DVB_STB6100=m > -CONFIG_DVB_CX24123=m > -CONFIG_DVB_MT312=m > -CONFIG_DVB_ZL10039=m > -CONFIG_DVB_S5H1420=m > -CONFIG_DVB_STV0288=m > -CONFIG_DVB_STB6000=m > -CONFIG_DVB_STV0299=m > -CONFIG_DVB_STV6110=m > -CONFIG_DVB_STV0900=m > -CONFIG_DVB_TDA10086=m > -CONFIG_DVB_TUNER_ITD1000=m > -CONFIG_DVB_TUNER_CX24113=m > -CONFIG_DVB_TDA826X=m > -CONFIG_DVB_CX24116=m > -CONFIG_DVB_SI21XX=m > -CONFIG_DVB_DS3000=m > -CONFIG_DVB_CX22702=m > -CONFIG_DVB_TDA1004X=m > -CONFIG_DVB_NXT6000=m > -CONFIG_DVB_MT352=m > -CONFIG_DVB_ZL10353=m > -CONFIG_DVB_DIB3000MB=m > -CONFIG_DVB_DIB3000MC=m > -CONFIG_DVB_DIB7000M=m > -CONFIG_DVB_DIB7000P=m > -CONFIG_DVB_TDA10048=m > -CONFIG_DVB_AF9013=m > -CONFIG_DVB_EC100=m > -CONFIG_DVB_TDA10021=m > -CONFIG_DVB_TDA10023=m > -CONFIG_DVB_STV0297=m > -CONFIG_DVB_NXT200X=m > -CONFIG_DVB_BCM3510=m > -CONFIG_DVB_LGDT330X=m > -CONFIG_DVB_LGDT3305=m > -CONFIG_DVB_S5H1409=m > -CONFIG_DVB_S5H1411=m > -CONFIG_DVB_DIB8000=m > -CONFIG_DVB_PLL=m > -CONFIG_DVB_TUNER_DIB0070=m > -CONFIG_DVB_LNBP21=m > -CONFIG_DVB_ISL6421=m > -CONFIG_DVB_LGS8GL5=m > -CONFIG_DAB=y > -CONFIG_USB_DABUSB=m > - > -# > -# Graphics support > -# > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -CONFIG_FIRMWARE_EDID=y > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -# CONFIG_FB_SYS_FILLRECT is not set > -# CONFIG_FB_SYS_COPYAREA is not set > -# CONFIG_FB_SYS_IMAGEBLIT is not set > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -# CONFIG_FB_SYS_FOPS is not set > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -CONFIG_FB_MODE_HELPERS=y > -CONFIG_FB_TILEBLITTING=y > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_UVESA is not set > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_DAVINCI is not set > -# CONFIG_FB_VIRTUAL is not set > -CONFIG_FB_DA8XX=y > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -CONFIG_BACKLIGHT_LCD_SUPPORT=y > -CONFIG_LCD_CLASS_DEVICE=m > -# CONFIG_LCD_LMS283GF05 is not set > -# CONFIG_LCD_LTV350QV is not set > -# CONFIG_LCD_ILI9320 is not set > -# CONFIG_LCD_TDO24M is not set > -# CONFIG_LCD_VGG2432A4 is not set > -# CONFIG_LCD_PLATFORM is not set > -CONFIG_BACKLIGHT_CLASS_DEVICE=m > -CONFIG_BACKLIGHT_GENERIC=m > - > -# > -# Display device support > -# > -# CONFIG_DISPLAY_SUPPORT is not set > - > -# > -# Console display driver support > -# > -# CONFIG_VGA_CONSOLE is not set > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -CONFIG_LOGO_LINUX_MONO=y > -CONFIG_LOGO_LINUX_VGA16=y > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -# CONFIG_SOUND_OSS_CORE is not set > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -CONFIG_SND_SEQUENCER=m > -# CONFIG_SND_SEQ_DUMMY is not set > -# CONFIG_SND_MIXER_OSS is not set > -# CONFIG_SND_PCM_OSS is not set > -# CONFIG_SND_SEQUENCER_OSS is not set > -CONFIG_SND_HRTIMER=m > -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y > -# CONFIG_SND_DYNAMIC_MINORS is not set > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -CONFIG_SND_RAWMIDI_SEQ=m > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -# CONFIG_SND_VIRMIDI is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -CONFIG_SND_ARM=y > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -CONFIG_SND_USB_CAIAQ=m > -CONFIG_SND_USB_CAIAQ_INPUT=y > -CONFIG_SND_SOC=y > -CONFIG_SND_DAVINCI_SOC=y > -CONFIG_SND_DAVINCI_SOC_MCASP=y > -CONFIG_SND_DA850_SOC_EVM=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TLV320AIC3X=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -CONFIG_HIDRAW=y > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -CONFIG_USB_HIDDEV=y > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_A4TECH is not set > -# CONFIG_HID_APPLE is not set > -# CONFIG_HID_BELKIN is not set > -# CONFIG_HID_CHERRY is not set > -# CONFIG_HID_CHICONY is not set > -# CONFIG_HID_CYPRESS is not set > -# CONFIG_HID_DRAGONRISE is not set > -# CONFIG_HID_EZKEY is not set > -# CONFIG_HID_KYE is not set > -# CONFIG_HID_GYRATION is not set > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -# CONFIG_HID_LOGITECH is not set > -# CONFIG_HID_MICROSOFT is not set > -# CONFIG_HID_MONTEREY is not set > -# CONFIG_HID_NTRIG is not set > -# CONFIG_HID_PANTHERLORD is not set > -# CONFIG_HID_PETALYNX is not set > -# CONFIG_HID_SAMSUNG is not set > -# CONFIG_HID_SONY is not set > -# CONFIG_HID_SUNPLUS is not set > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -# CONFIG_HID_TOPSEED is not set > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_WACOM is not set > -# CONFIG_HID_ZEROPLUS is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -# CONFIG_USB_ARCH_HAS_EHCI is not set > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > - > -# > -# Miscellaneous USB options > -# > -# CONFIG_USB_DEVICEFS is not set > -# CONFIG_USB_DEVICE_CLASS is not set > -CONFIG_USB_DYNAMIC_MINORS=y > -CONFIG_USB_SUSPEND=y > -# CONFIG_USB_OTG is not set > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -CONFIG_USB_MON=m > -CONFIG_USB_WUSB=m > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -CONFIG_USB_OHCI_HCD=y > -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -# CONFIG_USB_U132_HCD is not set > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -CONFIG_USB_MUSB_SOC=y > -CONFIG_USB_MUSB_HOST=y > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -# CONFIG_USB_MUSB_DUAL_ROLE is not set > -# CONFIG_USB_MUSB_OTG is not set > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_INVENTRA_DMA is not set > -# CONFIG_USB_TI_CPPI_DMA is not set > -CONFIG_USB_TI_CPPI41_DMA=y > -CONFIG_USB_MUSB_DEBUG=y > - > -# > -# USB Device Class drivers > -# > -CONFIG_USB_ACM=m > -CONFIG_USB_PRINTER=m > -CONFIG_USB_WDM=m > -CONFIG_USB_TMC=m > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -CONFIG_USB_SERIAL=y > -CONFIG_USB_SERIAL_CONSOLE=y > -CONFIG_USB_EZUSB=y > -CONFIG_USB_SERIAL_GENERIC=y > -CONFIG_USB_SERIAL_AIRCABLE=m > -CONFIG_USB_SERIAL_ARK3116=m > -CONFIG_USB_SERIAL_BELKIN=m > -CONFIG_USB_SERIAL_CH341=m > -# CONFIG_USB_SERIAL_WHITEHEAT is not set > -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m > -CONFIG_USB_SERIAL_CP210X=m > -CONFIG_USB_SERIAL_CYPRESS_M8=m > -CONFIG_USB_SERIAL_EMPEG=m > -CONFIG_USB_SERIAL_FTDI_SIO=m > -CONFIG_USB_SERIAL_FUNSOFT=m > -CONFIG_USB_SERIAL_VISOR=m > -CONFIG_USB_SERIAL_IPAQ=m > -CONFIG_USB_SERIAL_IR=m > -CONFIG_USB_SERIAL_EDGEPORT=m > -CONFIG_USB_SERIAL_EDGEPORT_TI=m > -CONFIG_USB_SERIAL_GARMIN=m > -CONFIG_USB_SERIAL_IPW=m > -CONFIG_USB_SERIAL_IUU=m > -CONFIG_USB_SERIAL_KEYSPAN_PDA=m > -CONFIG_USB_SERIAL_KEYSPAN=m > -# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set > -# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set > -CONFIG_USB_SERIAL_KLSI=m > -CONFIG_USB_SERIAL_KOBIL_SCT=m > -CONFIG_USB_SERIAL_MCT_U232=m > -CONFIG_USB_SERIAL_MOS7720=m > -CONFIG_USB_SERIAL_MOS7840=m > -CONFIG_USB_SERIAL_MOTOROLA=m > -CONFIG_USB_SERIAL_NAVMAN=m > -CONFIG_USB_SERIAL_PL2303=m > -CONFIG_USB_SERIAL_OTI6858=m > -CONFIG_USB_SERIAL_QUALCOMM=m > -CONFIG_USB_SERIAL_SPCP8X5=m > -CONFIG_USB_SERIAL_HP4X=m > -CONFIG_USB_SERIAL_SAFE=m > -# CONFIG_USB_SERIAL_SAFE_PADDED is not set > -CONFIG_USB_SERIAL_SIEMENS_MPI=m > -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set > -CONFIG_USB_SERIAL_SYMBOL=m > -CONFIG_USB_SERIAL_TI=m > -CONFIG_USB_SERIAL_CYBERJACK=m > -CONFIG_USB_SERIAL_XIRCOM=m > -CONFIG_USB_SERIAL_OPTION=m > -CONFIG_USB_SERIAL_OMNINET=m > -CONFIG_USB_SERIAL_OPTICON=m > -CONFIG_USB_SERIAL_DEBUG=m > - > -# > -# USB Miscellaneous drivers > -# > -CONFIG_USB_EMI62=m > -CONFIG_USB_EMI26=m > -CONFIG_USB_ADUTUX=m > -CONFIG_USB_SEVSEG=m > -CONFIG_USB_RIO500=m > -CONFIG_USB_LEGOTOWER=m > -CONFIG_USB_LCD=m > -CONFIG_USB_BERRY_CHARGE=m > -CONFIG_USB_LED=m > -CONFIG_USB_CYPRESS_CY7C63=m > -CONFIG_USB_CYTHERM=m > -CONFIG_USB_IDMOUSE=m > -CONFIG_USB_FTDI_ELAN=m > -CONFIG_USB_APPLEDISPLAY=m > -CONFIG_USB_SISUSBVGA=m > -CONFIG_USB_SISUSBVGA_CON=y > -CONFIG_USB_LD=m > -CONFIG_USB_TRANCEVIBRATOR=m > -CONFIG_USB_IOWARRIOR=m > -# CONFIG_USB_TEST is not set > -# CONFIG_USB_ISIGHTFW is not set > -CONFIG_USB_VST=m > -# CONFIG_USB_GADGET is not set > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -# CONFIG_USB_GPIO_VBUS is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_UWB=m > -# CONFIG_UWB_HWA is not set > -# CONFIG_UWB_WLP is not set > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -CONFIG_MMC_UNSAFE_RESUME=y > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_BOUNCE=y > -CONFIG_SDIO_UART=m > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_AT91 is not set > -# CONFIG_MMC_ATMELMCI is not set > -CONFIG_MMC_DAVINCI=y > -# CONFIG_MMC_SPI is not set > -# CONFIG_MEMSTICK is not set > -CONFIG_NEW_LEDS=y > -CONFIG_LEDS_CLASS=m > - > -# > -# LED drivers > -# > -# CONFIG_LEDS_PCA9532 is not set > -CONFIG_LEDS_GPIO=m > -CONFIG_LEDS_GPIO_PLATFORM=y > -# CONFIG_LEDS_LP3944 is not set > -# CONFIG_LEDS_PCA955X is not set > -# CONFIG_LEDS_DAC124S085 is not set > -# CONFIG_LEDS_BD2802 is not set > -# CONFIG_LEDS_LT3593 is not set > - > -# > -# LED Triggers > -# > -CONFIG_LEDS_TRIGGERS=y > -CONFIG_LEDS_TRIGGER_TIMER=m > -CONFIG_LEDS_TRIGGER_HEARTBEAT=m > -CONFIG_LEDS_TRIGGER_BACKLIGHT=m > -CONFIG_LEDS_TRIGGER_GPIO=m > -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m > - > -# > -# iptables trigger is under Netfilter config (LED target) > -# > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -# CONFIG_RTC_DRV_DS1307 is not set > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -# CONFIG_RTC_DRV_BQ32K is not set > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -# CONFIG_RTC_DRV_OMAP is not set > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -# CONFIG_UIO is not set > - > -# > -# TI VLYNQ > -# > -CONFIG_STAGING=y > -# CONFIG_STAGING_EXCLUDE_BUILD is not set > -# CONFIG_USB_IP_COMMON is not set > -# CONFIG_W35UND is not set > -CONFIG_PRISM2_USB=m > -# CONFIG_ECHO is not set > -CONFIG_OTUS=m > -# CONFIG_COMEDI is not set > -# CONFIG_ASUS_OLED is not set > -# CONFIG_INPUT_MIMIO is not set > -# CONFIG_TRANZPORT is not set > - > -# > -# Qualcomm MSM Camera And Video > -# > - > -# > -# Camera Sensor Selection > -# > -# CONFIG_INPUT_GPIO is not set > -# CONFIG_POHMELFS is not set > -# CONFIG_PLAN9AUTH is not set > -# CONFIG_LINE6_USB is not set > -# CONFIG_USB_SERIAL_QUATECH2 is not set > -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set > -# CONFIG_VT6656 is not set > -# CONFIG_FB_UDL is not set > - > -# > -# RAR Register Driver > -# > -# CONFIG_RAR_REGISTER is not set > -# CONFIG_IIO is not set > -# CONFIG_RAMZSWAP is not set > -# CONFIG_BATMAN_ADV is not set > -# CONFIG_STRIP is not set > -# CONFIG_FB_SM7XX is not set > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -# CONFIG_EXT3_FS_POSIX_ACL is not set > -# CONFIG_EXT3_FS_SECURITY is not set > -# CONFIG_EXT4_FS is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_JBD2=m > -# CONFIG_JBD2_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -CONFIG_REISERFS_FS=m > -# CONFIG_REISERFS_CHECK is not set > -CONFIG_REISERFS_PROC_INFO=y > -CONFIG_REISERFS_FS_XATTR=y > -# CONFIG_REISERFS_FS_POSIX_ACL is not set > -# CONFIG_REISERFS_FS_SECURITY is not set > -CONFIG_JFS_FS=m > -CONFIG_JFS_POSIX_ACL=y > -# CONFIG_JFS_SECURITY is not set > -# CONFIG_JFS_DEBUG is not set > -# CONFIG_JFS_STATISTICS is not set > -CONFIG_FS_POSIX_ACL=y > -CONFIG_XFS_FS=m > -CONFIG_XFS_QUOTA=y > -CONFIG_XFS_POSIX_ACL=y > -CONFIG_XFS_RT=y > -# CONFIG_XFS_DEBUG is not set > -CONFIG_GFS2_FS=m > -# CONFIG_GFS2_FS_LOCKING_DLM is not set > -CONFIG_OCFS2_FS=m > -CONFIG_OCFS2_FS_O2CB=m > -CONFIG_OCFS2_FS_STATS=y > -CONFIG_OCFS2_DEBUG_MASKLOG=y > -# CONFIG_OCFS2_DEBUG_FS is not set > -CONFIG_BTRFS_FS=m > -CONFIG_BTRFS_FS_POSIX_ACL=y > -# CONFIG_NILFS2_FS is not set > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY=y > -CONFIG_INOTIFY_USER=y > -CONFIG_QUOTA=y > -# CONFIG_QUOTA_NETLINK_INTERFACE is not set > -CONFIG_PRINT_QUOTA_WARNING=y > -CONFIG_QUOTA_TREE=m > -# CONFIG_QFMT_V1 is not set > -# CONFIG_QFMT_V2 is not set > -CONFIG_QUOTACTL=y > -# CONFIG_AUTOFS_FS is not set > -CONFIG_AUTOFS4_FS=y > -CONFIG_FUSE_FS=m > -CONFIG_CUSE=m > -CONFIG_GENERIC_ACL=y > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -CONFIG_ISO9660_FS=m > -CONFIG_JOLIET=y > -CONFIG_ZISOFS=y > -CONFIG_UDF_FS=m > -CONFIG_UDF_NLS=y > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -# CONFIG_NTFS_FS is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -CONFIG_TMPFS_POSIX_ACL=y > -# CONFIG_HUGETLB_PAGE is not set > -CONFIG_CONFIGFS_FS=m > -CONFIG_MISC_FILESYSTEMS=y > -# CONFIG_ADFS_FS is not set > -# CONFIG_AFFS_FS is not set > -# CONFIG_HFS_FS is not set > -CONFIG_HFSPLUS_FS=m > -# CONFIG_BEFS_FS is not set > -# CONFIG_BFS_FS is not set > -# CONFIG_EFS_FS is not set > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -# CONFIG_JFFS2_SUMMARY is not set > -# CONFIG_JFFS2_FS_XATTR is not set > -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -CONFIG_JFFS2_ZLIB=y > -# CONFIG_JFFS2_LZO is not set > -CONFIG_JFFS2_RTIME=y > -# CONFIG_JFFS2_RUBIN is not set > -CONFIG_UBIFS_FS=y > -CONFIG_UBIFS_FS_XATTR=y > -CONFIG_UBIFS_FS_ADVANCED_COMPR=y > -CONFIG_UBIFS_FS_LZO=y > -CONFIG_UBIFS_FS_ZLIB=y > -# CONFIG_UBIFS_FS_DEBUG is not set > -CONFIG_CRAMFS=y > -CONFIG_SQUASHFS=m > -# CONFIG_SQUASHFS_EMBEDDED is not set > -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 > -# CONFIG_VXFS_FS is not set > -CONFIG_MINIX_FS=m > -# CONFIG_OMFS_FS is not set > -# CONFIG_HPFS_FS is not set > -# CONFIG_QNX4FS_FS is not set > -# CONFIG_ROMFS_FS is not set > -# CONFIG_SYSV_FS is not set > -# CONFIG_UFS_FS is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -# CONFIG_NFS_V4 is not set > -CONFIG_ROOT_NFS=y > -CONFIG_NFSD=m > -CONFIG_NFSD_V3=y > -# CONFIG_NFSD_V3_ACL is not set > -# CONFIG_NFSD_V4 is not set > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_EXPORTFS=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -# CONFIG_RPCSEC_GSS_KRB5 is not set > -# CONFIG_RPCSEC_GSS_SPKM3 is not set > -CONFIG_SMB_FS=m > -# CONFIG_SMB_NLS_DEFAULT is not set > -# CONFIG_CIFS is not set > -# CONFIG_NCP_FS is not set > -# CONFIG_CODA_FS is not set > -# CONFIG_AFS_FS is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -# CONFIG_MAC_PARTITION is not set > -CONFIG_MSDOS_PARTITION=y > -CONFIG_BSD_DISKLABEL=y > -# CONFIG_MINIX_SUBPARTITION is not set > -# CONFIG_SOLARIS_X86_PARTITION is not set > -# CONFIG_UNIXWARE_DISKLABEL is not set > -# CONFIG_LDM_PARTITION is not set > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -# CONFIG_EFI_PARTITION is not set > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -# CONFIG_NLS_CODEPAGE_737 is not set > -# CONFIG_NLS_CODEPAGE_775 is not set > -# CONFIG_NLS_CODEPAGE_850 is not set > -# CONFIG_NLS_CODEPAGE_852 is not set > -# CONFIG_NLS_CODEPAGE_855 is not set > -# CONFIG_NLS_CODEPAGE_857 is not set > -# CONFIG_NLS_CODEPAGE_860 is not set > -# CONFIG_NLS_CODEPAGE_861 is not set > -# CONFIG_NLS_CODEPAGE_862 is not set > -# CONFIG_NLS_CODEPAGE_863 is not set > -# CONFIG_NLS_CODEPAGE_864 is not set > -# CONFIG_NLS_CODEPAGE_865 is not set > -# CONFIG_NLS_CODEPAGE_866 is not set > -# CONFIG_NLS_CODEPAGE_869 is not set > -# CONFIG_NLS_CODEPAGE_936 is not set > -# CONFIG_NLS_CODEPAGE_950 is not set > -# CONFIG_NLS_CODEPAGE_932 is not set > -# CONFIG_NLS_CODEPAGE_949 is not set > -# CONFIG_NLS_CODEPAGE_874 is not set > -# CONFIG_NLS_ISO8859_8 is not set > -# CONFIG_NLS_CODEPAGE_1250 is not set > -# CONFIG_NLS_CODEPAGE_1251 is not set > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -# CONFIG_NLS_ISO8859_2 is not set > -# CONFIG_NLS_ISO8859_3 is not set > -# CONFIG_NLS_ISO8859_4 is not set > -# CONFIG_NLS_ISO8859_5 is not set > -# CONFIG_NLS_ISO8859_6 is not set > -# CONFIG_NLS_ISO8859_7 is not set > -# CONFIG_NLS_ISO8859_9 is not set > -# CONFIG_NLS_ISO8859_13 is not set > -# CONFIG_NLS_ISO8859_14 is not set > -# CONFIG_NLS_ISO8859_15 is not set > -# CONFIG_NLS_KOI8_R is not set > -# CONFIG_NLS_KOI8_U is not set > -CONFIG_NLS_UTF8=y > -# CONFIG_DLM is not set > - > -# > -# Kernel hacking > -# > -CONFIG_PRINTK_TIME=y > -# CONFIG_ENABLE_WARN_DEPRECATED is not set > -# CONFIG_ENABLE_MUST_CHECK is not set > -CONFIG_FRAME_WARN=1024 > -CONFIG_MAGIC_SYSRQ=y > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -CONFIG_DEBUG_KERNEL=y > -# CONFIG_DEBUG_SHIRQ is not set > -CONFIG_DETECT_SOFTLOCKUP=y > -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set > -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 > -CONFIG_DETECT_HUNG_TASK=y > -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set > -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 > -CONFIG_SCHED_DEBUG=y > -CONFIG_SCHEDSTATS=y > -CONFIG_TIMER_STATS=y > -# CONFIG_DEBUG_OBJECTS is not set > -# CONFIG_SLUB_DEBUG_ON is not set > -CONFIG_SLUB_STATS=y > -# CONFIG_DEBUG_KMEMLEAK is not set > -CONFIG_DEBUG_PREEMPT=y > -# CONFIG_DEBUG_RT_MUTEXES is not set > -# CONFIG_RT_MUTEX_TESTER is not set > -# CONFIG_DEBUG_SPINLOCK is not set > -# CONFIG_DEBUG_MUTEXES is not set > -# CONFIG_DEBUG_LOCK_ALLOC is not set > -# CONFIG_PROVE_LOCKING is not set > -# CONFIG_LOCK_STAT is not set > -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set > -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set > -CONFIG_STACKTRACE=y > -# CONFIG_DEBUG_KOBJECT is not set > -# CONFIG_DEBUG_BUGVERBOSE is not set > -# CONFIG_DEBUG_INFO is not set > -# CONFIG_DEBUG_VM is not set > -# CONFIG_DEBUG_WRITECOUNT is not set > -# CONFIG_DEBUG_MEMORY_INIT is not set > -# CONFIG_DEBUG_LIST is not set > -# CONFIG_DEBUG_SG is not set > -# CONFIG_DEBUG_NOTIFIERS is not set > -# CONFIG_DEBUG_CREDENTIALS is not set > -CONFIG_FRAME_POINTER=y > -# CONFIG_BOOT_PRINTK_DELAY is not set > -# CONFIG_RCU_TORTURE_TEST is not set > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_BACKTRACE_SELF_TEST is not set > -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set > -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set > -# CONFIG_FAULT_INJECTION is not set > -CONFIG_LATENCYTOP=y > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -# CONFIG_PAGE_POISONING is not set > -CONFIG_NOP_TRACER=y > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_RING_BUFFER=y > -CONFIG_EVENT_TRACING=y > -CONFIG_CONTEXT_SWITCH_TRACER=y > -CONFIG_RING_BUFFER_ALLOW_SWAP=y > -CONFIG_TRACING=y > -CONFIG_TRACING_SUPPORT=y > -# CONFIG_FTRACE is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_KGDB is not set > -# CONFIG_ARM_UNWIND is not set > -# CONFIG_DEBUG_USER is not set > -# CONFIG_DEBUG_ERRORS is not set > -# CONFIG_DEBUG_STACK_USAGE is not set > -CONFIG_DEBUG_LL=y > -CONFIG_EARLY_PRINTK=y > -# CONFIG_DEBUG_ICEDCC is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -# CONFIG_KEYS is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -# CONFIG_DEFAULT_SECURITY_SMACK is not set > -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_XOR_BLOCKS=m > -CONFIG_ASYNC_CORE=m > -CONFIG_ASYNC_MEMCPY=m > -CONFIG_ASYNC_XOR=m > -CONFIG_ASYNC_PQ=m > -CONFIG_ASYNC_RAID6_RECOV=m > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -CONFIG_CRYPTO_ALGAPI=y > -CONFIG_CRYPTO_ALGAPI2=y > -CONFIG_CRYPTO_AEAD2=y > -CONFIG_CRYPTO_BLKCIPHER=m > -CONFIG_CRYPTO_BLKCIPHER2=y > -CONFIG_CRYPTO_HASH=m > -CONFIG_CRYPTO_HASH2=y > -CONFIG_CRYPTO_RNG2=y > -CONFIG_CRYPTO_PCOMP=y > -CONFIG_CRYPTO_MANAGER=m > -CONFIG_CRYPTO_MANAGER2=y > -# CONFIG_CRYPTO_GF128MUL is not set > -# CONFIG_CRYPTO_NULL is not set > -CONFIG_CRYPTO_WORKQUEUE=y > -# CONFIG_CRYPTO_CRYPTD is not set > -# CONFIG_CRYPTO_AUTHENC is not set > -# CONFIG_CRYPTO_TEST is not set > - > -# > -# Authenticated Encryption with Associated Data > -# > -# CONFIG_CRYPTO_CCM is not set > -# CONFIG_CRYPTO_GCM is not set > -# CONFIG_CRYPTO_SEQIV is not set > - > -# > -# Block modes > -# > -CONFIG_CRYPTO_CBC=m > -# CONFIG_CRYPTO_CTR is not set > -# CONFIG_CRYPTO_CTS is not set > -CONFIG_CRYPTO_ECB=m > -# CONFIG_CRYPTO_LRW is not set > -# CONFIG_CRYPTO_PCBC is not set > -# CONFIG_CRYPTO_XTS is not set > - > -# > -# Hash modes > -# > -# CONFIG_CRYPTO_HMAC is not set > -# CONFIG_CRYPTO_XCBC is not set > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -CONFIG_CRYPTO_CRC32C=m > -# CONFIG_CRYPTO_GHASH is not set > -# CONFIG_CRYPTO_MD4 is not set > -CONFIG_CRYPTO_MD5=m > -CONFIG_CRYPTO_MICHAEL_MIC=m > -# CONFIG_CRYPTO_RMD128 is not set > -# CONFIG_CRYPTO_RMD160 is not set > -# CONFIG_CRYPTO_RMD256 is not set > -# CONFIG_CRYPTO_RMD320 is not set > -CONFIG_CRYPTO_SHA1=m > -# CONFIG_CRYPTO_SHA256 is not set > -# CONFIG_CRYPTO_SHA512 is not set > -# CONFIG_CRYPTO_TGR192 is not set > -# CONFIG_CRYPTO_WP512 is not set > - > -# > -# Ciphers > -# > -CONFIG_CRYPTO_AES=m > -# CONFIG_CRYPTO_ANUBIS is not set > -CONFIG_CRYPTO_ARC4=m > -# CONFIG_CRYPTO_BLOWFISH is not set > -# CONFIG_CRYPTO_CAMELLIA is not set > -# CONFIG_CRYPTO_CAST5 is not set > -# CONFIG_CRYPTO_CAST6 is not set > -# CONFIG_CRYPTO_DES is not set > -# CONFIG_CRYPTO_FCRYPT is not set > -# CONFIG_CRYPTO_KHAZAD is not set > -# CONFIG_CRYPTO_SALSA20 is not set > -# CONFIG_CRYPTO_SEED is not set > -# CONFIG_CRYPTO_SERPENT is not set > -# CONFIG_CRYPTO_TEA is not set > -# CONFIG_CRYPTO_TWOFISH is not set > - > -# > -# Compression > -# > -CONFIG_CRYPTO_DEFLATE=y > -# CONFIG_CRYPTO_ZLIB is not set > -CONFIG_CRYPTO_LZO=y > - > -# > -# Random Number Generation > -# > -# CONFIG_CRYPTO_ANSI_CPRNG is not set > -# CONFIG_CRYPTO_HW is not set > -CONFIG_BINARY_PRINTF=y > - > -# > -# Library routines > -# > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=m > -CONFIG_CRC16=y > -CONFIG_CRC_T10DIF=y > -CONFIG_CRC_ITU_T=m > -CONFIG_CRC32=y > -CONFIG_CRC7=m > -CONFIG_LIBCRC32C=m > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_LZO_COMPRESS=y > -CONFIG_LZO_DECOMPRESS=y > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_DECOMPRESS_BZIP2=y > -CONFIG_DECOMPRESS_LZMA=y > -CONFIG_GENERIC_ALLOCATOR=y > -CONFIG_TEXTSEARCH=y > -CONFIG_TEXTSEARCH_KMP=m > -CONFIG_TEXTSEARCH_BM=m > -CONFIG_TEXTSEARCH_FSM=m > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > diff --git a/recipes-kernel/linux/linux- > davinci/hawkboard/logo_linux_clut224.ppm b/recipes-kernel/linux/linux- > davinci/hawkboard/logo_linux_clut224.ppm > deleted file mode 100644 > index 984a443..0000000 > --- a/recipes-kernel/linux/linux-davinci/hawkboard/logo_linux_clut224.ppm > +++ /dev/null > @@ -1,51363 +0,0 @@ > -P3 > -640 480 > -255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 254 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 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255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 > diff --git a/recipes-kernel/linux/linux-davinci/hawkboard/patch-2.6.33rc4-psp- > to-hawkboard.patch b/recipes-kernel/linux/linux-davinci/hawkboard/patch- > 2.6.33rc4-psp-to-hawkboard.patch > deleted file mode 100644 > index bd986a5..0000000 > --- a/recipes-kernel/linux/linux-davinci/hawkboard/patch-2.6.33rc4-psp-to- > hawkboard.patch > +++ /dev/null > @@ -1,2775 +0,0 @@ > -From a9847b4b964b65b8a3f041550c4a15342d151b88 Mon Sep 17 00:00:00 > 2001 > -From: Roger Monk <r-monk@ti.com> > -Date: Wed, 19 May 2010 13:43:53 +0100 > -Subject: [PATCH] Hawkboard Support: Add Hawkboard (DA850/OMAPL138 > based) Board Support > - > - * Hawkboard(.org) (http://www.hawkboard.org) Board Support > - * Support based on DA850_OMAPL138 EVM Board Support > - * This board contains the following components > - * DA850/OMAPL138/(AM1808) - ARM9 + 674x DSP + PRU + Peripherals > - * 128MB DDR2 SDRAM (MT47H64M16HR-3:G) > - * 128MB NAND Flash (MT29F1G08ABCHC-ET) > - * Video Capture (TVP5147M1) - Composite Video > - * Video Display (THS8135) - VGA > - * Ethernet (LAN8710A) > - * Audio (AIC31xx) - Stereo Audio Codec > - * Serial ATA > - * SD/MMC > - * USB 1.1 (OHCI) (Host/Gadget) > - * USB 2.0 (MUSB) (Host) > - * Serial Console > - * CpuFreq/CpuIdle/PM(Suspend-to-Ram) with RTC wakeup > - * TODO > - * USB MUSB (host) Disconnect Issues > - * USB MUSB (gadget) Config + Testing > - * VPIF Capture Driver creates 2 device nodes > - * VPIF Capture Driver fails with mplayer tv:// test > - * Further Board File Cleanup > - * Notes > - * RTC not tested > - * RTC requires battery populated on hawkboard > - * CONFIG_DRV_RTC_OMAP should be disabled if no battery > - * No Regulator on hawkboard - CONFIG_REGULATOR should be disabled > - * Wake-Up source from pm (suspend-to-ram) is RTC > - > -Signed-off-by: Roger Monk <r-monk@ti.com> > ---- > - .../arm/configs/da850_omapl138_hawkboard_defconfig | 1867 > ++++++++++++++++++++ > - arch/arm/mach-davinci/Kconfig | 7 + > - arch/arm/mach-davinci/Makefile | 1 + > - arch/arm/mach-davinci/board-da850-hawk.c | 657 +++++++ > - arch/arm/mach-davinci/da850.c | 2 +- > - arch/arm/mach-davinci/devices-da8xx.c | 8 + > - arch/arm/mach-davinci/include/mach/da8xx.h | 2 + > - arch/arm/mach-davinci/include/mach/debug-macro.S | 3 +- > - drivers/media/video/Kconfig | 4 +- > - drivers/video/da8xx-fb.c | 14 + > - sound/soc/davinci/Kconfig | 6 +- > - sound/soc/davinci/davinci-evm.c | 5 +- > - 12 files changed, 2567 insertions(+), 9 deletions(-) > - create mode 100644 > arch/arm/configs/da850_omapl138_hawkboard_defconfig > - create mode 100644 arch/arm/mach-davinci/board-da850-hawk.c > - > -diff --git a/arch/arm/configs/da850_omapl138_hawkboard_defconfig > b/arch/arm/configs/da850_omapl138_hawkboard_defconfig > -new file mode 100644 > -index 0000000..19fcbdf > ---- /dev/null > -+++ b/arch/arm/configs/da850_omapl138_hawkboard_defconfig > -@@ -0,0 +1,1867 @@ > -+# > -+# Automatically generated make config: don't edit > -+# Linux kernel version: 2.6.33-rc4 > -+# Tue Mar 2 15:34:51 2010 > -+# > -+CONFIG_ARM=y > -+CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -+CONFIG_GENERIC_GPIO=y > -+CONFIG_GENERIC_TIME=y > -+CONFIG_GENERIC_CLOCKEVENTS=y > -+CONFIG_GENERIC_HARDIRQS=y > -+CONFIG_STACKTRACE_SUPPORT=y > -+CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -+CONFIG_LOCKDEP_SUPPORT=y > -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -+CONFIG_HARDIRQS_SW_RESEND=y > -+CONFIG_GENERIC_IRQ_PROBE=y > -+CONFIG_RWSEM_GENERIC_SPINLOCK=y > -+CONFIG_ARCH_HAS_CPUFREQ=y > -+CONFIG_GENERIC_HWEIGHT=y > -+CONFIG_GENERIC_CALIBRATE_DELAY=y > -+CONFIG_ZONE_DMA=y > -+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -+CONFIG_VECTORS_BASE=0xffff0000 > -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -+CONFIG_CONSTRUCTORS=y > -+ > -+# > -+# General setup > -+# > -+CONFIG_EXPERIMENTAL=y > -+CONFIG_BROKEN_ON_SMP=y > -+CONFIG_LOCK_KERNEL=y > -+CONFIG_INIT_ENV_ARG_LIMIT=32 > -+CONFIG_LOCALVERSION="" > -+# CONFIG_LOCALVERSION_AUTO is not set > -+CONFIG_HAVE_KERNEL_GZIP=y > -+CONFIG_HAVE_KERNEL_LZO=y > -+CONFIG_KERNEL_GZIP=y > -+# CONFIG_KERNEL_BZIP2 is not set > -+# CONFIG_KERNEL_LZMA is not set > -+# CONFIG_KERNEL_LZO is not set > -+CONFIG_SWAP=y > -+CONFIG_SYSVIPC=y > -+CONFIG_SYSVIPC_SYSCTL=y > -+CONFIG_POSIX_MQUEUE=y > -+CONFIG_POSIX_MQUEUE_SYSCTL=y > -+# CONFIG_BSD_PROCESS_ACCT is not set > -+# CONFIG_TASKSTATS is not set > -+# CONFIG_AUDIT is not set > -+ > -+# > -+# RCU Subsystem > -+# > -+CONFIG_TREE_RCU=y > -+# CONFIG_TREE_PREEMPT_RCU is not set > -+# CONFIG_TINY_RCU is not set > -+# CONFIG_RCU_TRACE is not set > -+CONFIG_RCU_FANOUT=32 > -+# CONFIG_RCU_FANOUT_EXACT is not set > -+# CONFIG_TREE_RCU_TRACE is not set > -+CONFIG_IKCONFIG=y > -+CONFIG_IKCONFIG_PROC=y > -+CONFIG_LOG_BUF_SHIFT=14 > -+CONFIG_GROUP_SCHED=y > -+CONFIG_FAIR_GROUP_SCHED=y > -+# CONFIG_RT_GROUP_SCHED is not set > -+CONFIG_USER_SCHED=y > -+# CONFIG_CGROUP_SCHED is not set > -+# CONFIG_CGROUPS is not set > -+# CONFIG_SYSFS_DEPRECATED_V2 is not set > -+# CONFIG_RELAY is not set > -+# CONFIG_NAMESPACES is not set > -+CONFIG_BLK_DEV_INITRD=y > -+CONFIG_INITRAMFS_SOURCE="" > -+CONFIG_RD_GZIP=y > -+# CONFIG_RD_BZIP2 is not set > -+# CONFIG_RD_LZMA is not set > -+# CONFIG_RD_LZO is not set > -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -+CONFIG_SYSCTL=y > -+CONFIG_ANON_INODES=y > -+CONFIG_EMBEDDED=y > -+CONFIG_UID16=y > -+CONFIG_SYSCTL_SYSCALL=y > -+CONFIG_KALLSYMS=y > -+# CONFIG_KALLSYMS_EXTRA_PASS is not set > -+CONFIG_HOTPLUG=y > -+CONFIG_PRINTK=y > -+CONFIG_BUG=y > -+CONFIG_ELF_CORE=y > -+CONFIG_BASE_FULL=y > -+CONFIG_FUTEX=y > -+CONFIG_EPOLL=y > -+CONFIG_SIGNALFD=y > -+CONFIG_TIMERFD=y > -+CONFIG_EVENTFD=y > -+CONFIG_SHMEM=y > -+CONFIG_AIO=y > -+ > -+# > -+# Kernel Performance Events And Counters > -+# > -+CONFIG_VM_EVENT_COUNTERS=y > -+CONFIG_SLUB_DEBUG=y > -+CONFIG_COMPAT_BRK=y > -+# CONFIG_SLAB is not set > -+CONFIG_SLUB=y > -+# CONFIG_SLOB is not set > -+# CONFIG_PROFILING is not set > -+CONFIG_HAVE_OPROFILE=y > -+# CONFIG_KPROBES is not set > -+CONFIG_HAVE_KPROBES=y > -+CONFIG_HAVE_KRETPROBES=y > -+CONFIG_HAVE_CLK=y > -+ > -+# > -+# GCOV-based kernel profiling > -+# > -+# CONFIG_GCOV_KERNEL is not set > -+# CONFIG_SLOW_WORK is not set > -+CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -+CONFIG_SLABINFO=y > -+CONFIG_RT_MUTEXES=y > -+CONFIG_BASE_SMALL=0 > -+CONFIG_MODULES=y > -+# CONFIG_MODULE_FORCE_LOAD is not set > -+CONFIG_MODULE_UNLOAD=y > -+CONFIG_MODULE_FORCE_UNLOAD=y > -+CONFIG_MODVERSIONS=y > -+# CONFIG_MODULE_SRCVERSION_ALL is not set > -+CONFIG_BLOCK=y > -+CONFIG_LBDAF=y > -+# CONFIG_BLK_DEV_BSG is not set > -+# CONFIG_BLK_DEV_INTEGRITY is not set > -+ > -+# > -+# IO Schedulers > -+# > -+CONFIG_IOSCHED_NOOP=y > -+# CONFIG_IOSCHED_DEADLINE is not set > -+# CONFIG_IOSCHED_CFQ is not set > -+# CONFIG_DEFAULT_DEADLINE is not set > -+# CONFIG_DEFAULT_CFQ is not set > -+CONFIG_DEFAULT_NOOP=y > -+CONFIG_DEFAULT_IOSCHED="noop" > -+# CONFIG_INLINE_SPIN_TRYLOCK is not set > -+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -+# CONFIG_INLINE_SPIN_LOCK is not set > -+# CONFIG_INLINE_SPIN_LOCK_BH is not set > -+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -+# CONFIG_INLINE_SPIN_UNLOCK is not set > -+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -+# CONFIG_INLINE_READ_TRYLOCK is not set > -+# CONFIG_INLINE_READ_LOCK is not set > -+# CONFIG_INLINE_READ_LOCK_BH is not set > -+# CONFIG_INLINE_READ_LOCK_IRQ is not set > -+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -+# CONFIG_INLINE_READ_UNLOCK is not set > -+# CONFIG_INLINE_READ_UNLOCK_BH is not set > -+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -+# CONFIG_INLINE_WRITE_TRYLOCK is not set > -+# CONFIG_INLINE_WRITE_LOCK is not set > -+# CONFIG_INLINE_WRITE_LOCK_BH is not set > -+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -+# CONFIG_INLINE_WRITE_UNLOCK is not set > -+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -+# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -+CONFIG_FREEZER=y > -+ > -+# > -+# System Type > -+# > -+CONFIG_MMU=y > -+# CONFIG_ARCH_AAEC2000 is not set > -+# CONFIG_ARCH_INTEGRATOR is not set > -+# CONFIG_ARCH_REALVIEW is not set > -+# CONFIG_ARCH_VERSATILE is not set > -+# CONFIG_ARCH_AT91 is not set > -+# CONFIG_ARCH_CLPS711X is not set > -+# CONFIG_ARCH_GEMINI is not set > -+# CONFIG_ARCH_EBSA110 is not set > -+# CONFIG_ARCH_EP93XX is not set > -+# CONFIG_ARCH_FOOTBRIDGE is not set > -+# CONFIG_ARCH_MXC is not set > -+# CONFIG_ARCH_STMP3XXX is not set > -+# CONFIG_ARCH_NETX is not set > -+# CONFIG_ARCH_H720X is not set > -+# CONFIG_ARCH_NOMADIK is not set > -+# CONFIG_ARCH_IOP13XX is not set > -+# CONFIG_ARCH_IOP32X is not set > -+# CONFIG_ARCH_IOP33X is not set > -+# CONFIG_ARCH_IXP23XX is not set > -+# CONFIG_ARCH_IXP2000 is not set > -+# CONFIG_ARCH_IXP4XX is not set > -+# CONFIG_ARCH_L7200 is not set > -+# CONFIG_ARCH_DOVE is not set > -+# CONFIG_ARCH_KIRKWOOD is not set > -+# CONFIG_ARCH_LOKI is not set > -+# CONFIG_ARCH_MV78XX0 is not set > -+# CONFIG_ARCH_ORION5X is not set > -+# CONFIG_ARCH_MMP is not set > -+# CONFIG_ARCH_KS8695 is not set > -+# CONFIG_ARCH_NS9XXX is not set > -+# CONFIG_ARCH_W90X900 is not set > -+# CONFIG_ARCH_PNX4008 is not set > -+# CONFIG_ARCH_PXA is not set > -+# CONFIG_ARCH_MSM is not set > -+# CONFIG_ARCH_RPC is not set > -+# CONFIG_ARCH_SA1100 is not set > -+# CONFIG_ARCH_S3C2410 is not set > -+# CONFIG_ARCH_S3C64XX is not set > -+# CONFIG_ARCH_S5PC1XX is not set > -+# CONFIG_ARCH_SHARK is not set > -+# CONFIG_ARCH_LH7A40X is not set > -+# CONFIG_ARCH_U300 is not set > -+CONFIG_ARCH_DAVINCI=y > -+# CONFIG_ARCH_OMAP is not set > -+# CONFIG_ARCH_BCMRING is not set > -+# CONFIG_ARCH_U8500 is not set > -+CONFIG_CP_INTC=y > -+ > -+# > -+# TI DaVinci Implementations > -+# > -+ > -+# > -+# DaVinci Core Type > -+# > -+# CONFIG_ARCH_DAVINCI_DM644x is not set > -+# CONFIG_ARCH_DAVINCI_DM355 is not set > -+# CONFIG_ARCH_DAVINCI_DM646x is not set > -+# CONFIG_ARCH_DAVINCI_DA830 is not set > -+CONFIG_ARCH_DAVINCI_DA850=y > -+# CONFIG_DA8XX_MAX_SPEED_300 is not set > -+# CONFIG_DA8XX_MAX_SPEED_372 is not set > -+# CONFIG_DA8XX_MAX_SPEED_408 is not set > -+CONFIG_DA8XX_MAX_SPEED_456=y > -+CONFIG_ARCH_DAVINCI_DA8XX=y > -+# CONFIG_ARCH_DAVINCI_DM365 is not set > -+ > -+# > -+# DaVinci Board Type > -+# > -+# CONFIG_MACH_DAVINCI_DA850_EVM is not set > -+CONFIG_MACH_OMAPL138_HAWKBOARD=y > -+CONFIG_DAVINCI_MUX=y > -+# CONFIG_DAVINCI_MUX_DEBUG is not set > -+# CONFIG_DAVINCI_MUX_WARNINGS is not set > -+CONFIG_DAVINCI_RESET_CLOCKS=y > -+CONFIG_DAVINCI_MCBSP=y > -+# CONFIG_DAVINCI_MCBSP0 is not set > -+CONFIG_DAVINCI_MCBSP1=y > -+ > -+# > -+# Processor Type > -+# > -+CONFIG_CPU_ARM926T=y > -+CONFIG_CPU_32v5=y > -+CONFIG_CPU_ABRT_EV5TJ=y > -+CONFIG_CPU_PABRT_LEGACY=y > -+CONFIG_CPU_CACHE_VIVT=y > -+CONFIG_CPU_COPY_V4WB=y > -+CONFIG_CPU_TLB_V4WBI=y > -+CONFIG_CPU_CP15=y > -+CONFIG_CPU_CP15_MMU=y > -+ > -+# > -+# Processor Features > -+# > -+CONFIG_ARM_THUMB=y > -+# CONFIG_CPU_ICACHE_DISABLE is not set > -+# CONFIG_CPU_DCACHE_DISABLE is not set > -+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -+CONFIG_ARM_L1_CACHE_SHIFT=5 > -+CONFIG_COMMON_CLKDEV=y > -+ > -+# > -+# Bus support > -+# > -+# CONFIG_PCI_SYSCALL is not set > -+# CONFIG_ARCH_SUPPORTS_MSI is not set > -+# CONFIG_PCCARD is not set > -+ > -+# > -+# Kernel Features > -+# > -+CONFIG_TICK_ONESHOT=y > -+CONFIG_NO_HZ=y > -+CONFIG_HIGH_RES_TIMERS=y > -+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -+CONFIG_VMSPLIT_3G=y > -+# CONFIG_VMSPLIT_2G is not set > -+# CONFIG_VMSPLIT_1G is not set > -+CONFIG_PAGE_OFFSET=0xC0000000 > -+# CONFIG_PREEMPT_NONE is not set > -+# CONFIG_PREEMPT_VOLUNTARY is not set > -+CONFIG_PREEMPT=y > -+CONFIG_HZ=100 > -+CONFIG_AEABI=y > -+# CONFIG_OABI_COMPAT is not set > -+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -+# CONFIG_HIGHMEM is not set > -+CONFIG_SELECT_MEMORY_MODEL=y > -+CONFIG_FLATMEM_MANUAL=y > -+# CONFIG_DISCONTIGMEM_MANUAL is not set > -+# CONFIG_SPARSEMEM_MANUAL is not set > -+CONFIG_FLATMEM=y > -+CONFIG_FLAT_NODE_MEM_MAP=y > -+CONFIG_PAGEFLAGS_EXTENDED=y > -+CONFIG_SPLIT_PTLOCK_CPUS=999999 > -+# CONFIG_PHYS_ADDR_T_64BIT is not set > -+CONFIG_ZONE_DMA_FLAG=1 > -+CONFIG_BOUNCE=y > -+CONFIG_VIRT_TO_BUS=y > -+# CONFIG_KSM is not set > -+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -+CONFIG_LEDS=y > -+# CONFIG_LEDS_CPU is not set > -+CONFIG_ALIGNMENT_TRAP=y > -+# CONFIG_UACCESS_WITH_MEMCPY is not set > -+ > -+# > -+# Boot options > -+# > -+CONFIG_ZBOOT_ROM_TEXT=0x0 > -+CONFIG_ZBOOT_ROM_BSS=0x0 > -+CONFIG_CMDLINE="" > -+# CONFIG_XIP_KERNEL is not set > -+# CONFIG_KEXEC is not set > -+ > -+# > -+# CPU Power Management > -+# > -+CONFIG_CPU_FREQ=y > -+CONFIG_CPU_FREQ_TABLE=y > -+# CONFIG_CPU_FREQ_DEBUG is not set > -+CONFIG_CPU_FREQ_STAT=y > -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set > -+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y > -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -+CONFIG_CPU_FREQ_GOV_USERSPACE=y > -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -+CONFIG_CPU_IDLE=y > -+CONFIG_CPU_IDLE_GOV_LADDER=y > -+CONFIG_CPU_IDLE_GOV_MENU=y > -+ > -+# > -+# Floating point emulation > -+# > -+ > -+# > -+# At least one emulation must be selected > -+# > -+# CONFIG_VFP is not set > -+ > -+# > -+# Userspace binary formats > -+# > -+CONFIG_BINFMT_ELF=y > -+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -+CONFIG_HAVE_AOUT=y > -+# CONFIG_BINFMT_AOUT is not set > -+# CONFIG_BINFMT_MISC is not set > -+ > -+# > -+# Power management options > -+# > -+CONFIG_PM=y > -+# CONFIG_PM_DEBUG is not set > -+CONFIG_PM_SLEEP=y > -+CONFIG_SUSPEND=y > -+CONFIG_SUSPEND_FREEZER=y > -+# CONFIG_APM_EMULATION is not set > -+# CONFIG_PM_RUNTIME is not set > -+CONFIG_ARCH_SUSPEND_POSSIBLE=y > -+CONFIG_NET=y > -+ > -+# > -+# Networking options > -+# > -+CONFIG_PACKET=y > -+# CONFIG_PACKET_MMAP is not set > -+CONFIG_UNIX=y > -+CONFIG_XFRM=y > -+# CONFIG_XFRM_USER is not set > -+# CONFIG_XFRM_SUB_POLICY is not set > -+# CONFIG_XFRM_MIGRATE is not set > -+# CONFIG_XFRM_STATISTICS is not set > -+# CONFIG_NET_KEY is not set > -+CONFIG_INET=y > -+# CONFIG_IP_MULTICAST is not set > -+# CONFIG_IP_ADVANCED_ROUTER is not set > -+CONFIG_IP_FIB_HASH=y > -+CONFIG_IP_PNP=y > -+CONFIG_IP_PNP_DHCP=y > -+# CONFIG_IP_PNP_BOOTP is not set > -+# CONFIG_IP_PNP_RARP is not set > -+# CONFIG_NET_IPIP is not set > -+# CONFIG_NET_IPGRE is not set > -+# CONFIG_ARPD is not set > -+# CONFIG_SYN_COOKIES is not set > -+# CONFIG_INET_AH is not set > -+# CONFIG_INET_ESP is not set > -+# CONFIG_INET_IPCOMP is not set > -+# CONFIG_INET_XFRM_TUNNEL is not set > -+CONFIG_INET_TUNNEL=m > -+CONFIG_INET_XFRM_MODE_TRANSPORT=y > -+CONFIG_INET_XFRM_MODE_TUNNEL=y > -+CONFIG_INET_XFRM_MODE_BEET=y > -+# CONFIG_INET_LRO is not set > -+CONFIG_INET_DIAG=y > -+CONFIG_INET_TCP_DIAG=y > -+# CONFIG_TCP_CONG_ADVANCED is not set > -+CONFIG_TCP_CONG_CUBIC=y > -+CONFIG_DEFAULT_TCP_CONG="cubic" > -+# CONFIG_TCP_MD5SIG is not set > -+CONFIG_IPV6=m > -+# CONFIG_IPV6_PRIVACY is not set > -+# CONFIG_IPV6_ROUTER_PREF is not set > -+# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -+# CONFIG_INET6_AH is not set > -+# CONFIG_INET6_ESP is not set > -+# CONFIG_INET6_IPCOMP is not set > -+# CONFIG_IPV6_MIP6 is not set > -+# CONFIG_INET6_XFRM_TUNNEL is not set > -+# CONFIG_INET6_TUNNEL is not set > -+CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -+CONFIG_INET6_XFRM_MODE_TUNNEL=m > -+CONFIG_INET6_XFRM_MODE_BEET=m > -+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -+CONFIG_IPV6_SIT=m > -+# CONFIG_IPV6_SIT_6RD is not set > -+CONFIG_IPV6_NDISC_NODETYPE=y > -+# CONFIG_IPV6_TUNNEL is not set > -+# CONFIG_IPV6_MULTIPLE_TABLES is not set > -+# CONFIG_IPV6_MROUTE is not set > -+# CONFIG_NETWORK_SECMARK is not set > -+CONFIG_NETFILTER=y > -+# CONFIG_NETFILTER_DEBUG is not set > -+CONFIG_NETFILTER_ADVANCED=y > -+ > -+# > -+# Core Netfilter Configuration > -+# > -+# CONFIG_NETFILTER_NETLINK_QUEUE is not set > -+# CONFIG_NETFILTER_NETLINK_LOG is not set > -+# CONFIG_NF_CONNTRACK is not set > -+# CONFIG_NETFILTER_XTABLES is not set > -+# CONFIG_IP_VS is not set > -+ > -+# > -+# IP: Netfilter Configuration > -+# > -+# CONFIG_NF_DEFRAG_IPV4 is not set > -+# CONFIG_IP_NF_QUEUE is not set > -+# CONFIG_IP_NF_IPTABLES is not set > -+# CONFIG_IP_NF_ARPTABLES is not set > -+ > -+# > -+# IPv6: Netfilter Configuration > -+# > -+# CONFIG_IP6_NF_QUEUE is not set > -+# CONFIG_IP6_NF_IPTABLES is not set > -+# CONFIG_IP_DCCP is not set > -+# CONFIG_IP_SCTP is not set > -+# CONFIG_RDS is not set > -+# CONFIG_TIPC is not set > -+# CONFIG_ATM is not set > -+# CONFIG_BRIDGE is not set > -+# CONFIG_NET_DSA is not set > -+# CONFIG_VLAN_8021Q is not set > -+# CONFIG_DECNET is not set > -+# CONFIG_LLC2 is not set > -+# CONFIG_IPX is not set > -+# CONFIG_ATALK is not set > -+# CONFIG_X25 is not set > -+# CONFIG_LAPB is not set > -+# CONFIG_ECONET is not set > -+# CONFIG_WAN_ROUTER is not set > -+# CONFIG_PHONET is not set > -+# CONFIG_IEEE802154 is not set > -+# CONFIG_NET_SCHED is not set > -+# CONFIG_DCB is not set > -+ > -+# > -+# Network testing > -+# > -+# CONFIG_NET_PKTGEN is not set > -+# CONFIG_HAMRADIO is not set > -+# CONFIG_CAN is not set > -+# CONFIG_IRDA is not set > -+# CONFIG_BT is not set > -+# CONFIG_AF_RXRPC is not set > -+CONFIG_WIRELESS=y > -+# CONFIG_CFG80211 is not set > -+# CONFIG_LIB80211 is not set > -+ > -+# > -+# CFG80211 needs to be enabled for MAC80211 > -+# > -+# CONFIG_WIMAX is not set > -+# CONFIG_RFKILL is not set > -+# CONFIG_NET_9P is not set > -+ > -+# > -+# Device Drivers > -+# > -+ > -+# > -+# Generic Driver Options > -+# > -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > -+# CONFIG_DEVTMPFS is not set > -+CONFIG_STANDALONE=y > -+CONFIG_PREVENT_FIRMWARE_BUILD=y > -+# CONFIG_FW_LOADER is not set > -+# CONFIG_SYS_HYPERVISOR is not set > -+# CONFIG_CONNECTOR is not set > -+CONFIG_MTD=y > -+# CONFIG_MTD_DEBUG is not set > -+# CONFIG_MTD_TESTS is not set > -+# CONFIG_MTD_CONCAT is not set > -+CONFIG_MTD_PARTITIONS=y > -+# CONFIG_MTD_REDBOOT_PARTS is not set > -+# CONFIG_MTD_CMDLINE_PARTS is not set > -+# CONFIG_MTD_AFS_PARTS is not set > -+# CONFIG_MTD_AR7_PARTS is not set > -+ > -+# > -+# User Modules And Translation Layers > -+# > -+CONFIG_MTD_CHAR=y > -+CONFIG_MTD_BLKDEVS=y > -+CONFIG_MTD_BLOCK=y > -+# CONFIG_FTL is not set > -+# CONFIG_NFTL is not set > -+# CONFIG_INFTL is not set > -+# CONFIG_RFD_FTL is not set > -+# CONFIG_SSFDC is not set > -+# CONFIG_MTD_OOPS is not set > -+ > -+# > -+# RAM/ROM/Flash chip drivers > -+# > -+# CONFIG_MTD_CFI is not set > -+# CONFIG_MTD_JEDECPROBE is not set > -+CONFIG_MTD_MAP_BANK_WIDTH_1=y > -+CONFIG_MTD_MAP_BANK_WIDTH_2=y > -+CONFIG_MTD_MAP_BANK_WIDTH_4=y > -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -+CONFIG_MTD_CFI_I1=y > -+CONFIG_MTD_CFI_I2=y > -+# CONFIG_MTD_CFI_I4 is not set > -+# CONFIG_MTD_CFI_I8 is not set > -+# CONFIG_MTD_RAM is not set > -+# CONFIG_MTD_ROM is not set > -+# CONFIG_MTD_ABSENT is not set > -+ > -+# > -+# Mapping drivers for chip access > -+# > -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -+# CONFIG_MTD_PLATRAM is not set > -+ > -+# > -+# Self-contained MTD device drivers > -+# > -+# CONFIG_MTD_DATAFLASH is not set > -+CONFIG_MTD_M25P80=y > -+CONFIG_M25PXX_USE_FAST_READ=y > -+# CONFIG_MTD_SST25L is not set > -+# CONFIG_MTD_SLRAM is not set > -+# CONFIG_MTD_PHRAM is not set > -+# CONFIG_MTD_MTDRAM is not set > -+# CONFIG_MTD_BLOCK2MTD is not set > -+ > -+# > -+# Disk-On-Chip Device Drivers > -+# > -+# CONFIG_MTD_DOC2000 is not set > -+# CONFIG_MTD_DOC2001 is not set > -+# CONFIG_MTD_DOC2001PLUS is not set > -+# CONFIG_MTD_NAND is not set > -+# CONFIG_MTD_ONENAND is not set > -+ > -+# > -+# LPDDR flash memory drivers > -+# > -+# CONFIG_MTD_LPDDR is not set > -+ > -+# > -+# UBI - Unsorted block images > -+# > -+# CONFIG_MTD_UBI is not set > -+# CONFIG_PARPORT is not set > -+CONFIG_BLK_DEV=y > -+# CONFIG_BLK_DEV_COW_COMMON is not set > -+CONFIG_BLK_DEV_LOOP=m > -+# CONFIG_BLK_DEV_CRYPTOLOOP is not set > -+ > -+# > -+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -+# > -+# CONFIG_BLK_DEV_NBD is not set > -+# CONFIG_BLK_DEV_UB is not set > -+CONFIG_BLK_DEV_RAM=y > -+CONFIG_BLK_DEV_RAM_COUNT=1 > -+CONFIG_BLK_DEV_RAM_SIZE=32768 > -+# CONFIG_BLK_DEV_XIP is not set > -+# CONFIG_CDROM_PKTCDVD is not set > -+# CONFIG_ATA_OVER_ETH is not set > -+# CONFIG_MG_DISK is not set > -+CONFIG_MISC_DEVICES=y > -+# CONFIG_AD525X_DPOT is not set > -+# CONFIG_ICS932S401 is not set > -+# CONFIG_ENCLOSURE_SERVICES is not set > -+# CONFIG_ISL29003 is not set > -+# CONFIG_DS1682 is not set > -+# CONFIG_TI_DAC7512 is not set > -+# CONFIG_C2PORT is not set > -+ > -+# > -+# EEPROM support > -+# > -+CONFIG_EEPROM_AT24=y > -+# CONFIG_EEPROM_AT25 is not set > -+# CONFIG_EEPROM_LEGACY is not set > -+# CONFIG_EEPROM_MAX6875 is not set > -+# CONFIG_EEPROM_93CX6 is not set > -+# CONFIG_IWMC3200TOP is not set > -+CONFIG_HAVE_IDE=y > -+# CONFIG_IDE is not set > -+ > -+# > -+# SCSI device support > -+# > -+# CONFIG_RAID_ATTRS is not set > -+CONFIG_SCSI=y > -+CONFIG_SCSI_DMA=y > -+# CONFIG_SCSI_TGT is not set > -+# CONFIG_SCSI_NETLINK is not set > -+CONFIG_SCSI_PROC_FS=y > -+ > -+# > -+# SCSI support type (disk, tape, CD-ROM) > -+# > -+CONFIG_BLK_DEV_SD=y > -+# CONFIG_CHR_DEV_ST is not set > -+# CONFIG_CHR_DEV_OSST is not set > -+# CONFIG_BLK_DEV_SR is not set > -+CONFIG_CHR_DEV_SG=y > -+# CONFIG_CHR_DEV_SCH is not set > -+# CONFIG_SCSI_MULTI_LUN is not set > -+# CONFIG_SCSI_CONSTANTS is not set > -+# CONFIG_SCSI_LOGGING is not set > -+# CONFIG_SCSI_SCAN_ASYNC is not set > -+CONFIG_SCSI_WAIT_SCAN=m > -+ > -+# > -+# SCSI Transports > -+# > -+# CONFIG_SCSI_SPI_ATTRS is not set > -+# CONFIG_SCSI_FC_ATTRS is not set > -+# CONFIG_SCSI_ISCSI_ATTRS is not set > -+# CONFIG_SCSI_SAS_LIBSAS is not set > -+# CONFIG_SCSI_SRP_ATTRS is not set > -+CONFIG_SCSI_LOWLEVEL=y > -+# CONFIG_ISCSI_TCP is not set > -+# CONFIG_LIBFC is not set > -+# CONFIG_LIBFCOE is not set > -+# CONFIG_SCSI_DEBUG is not set > -+# CONFIG_SCSI_DH is not set > -+# CONFIG_SCSI_OSD_INITIATOR is not set > -+CONFIG_ATA=y > -+# CONFIG_ATA_NONSTANDARD is not set > -+CONFIG_ATA_VERBOSE_ERROR=y > -+CONFIG_SATA_PMP=y > -+CONFIG_SATA_AHCI=y > -+# CONFIG_ATA_SFF is not set > -+# CONFIG_MD is not set > -+CONFIG_NETDEVICES=y > -+# CONFIG_DUMMY is not set > -+# CONFIG_BONDING is not set > -+# CONFIG_MACVLAN is not set > -+# CONFIG_EQUALIZER is not set > -+# CONFIG_TUN is not set > -+# CONFIG_VETH is not set > -+CONFIG_PHYLIB=y > -+ > -+# > -+# MII PHY device drivers > -+# > -+# CONFIG_MARVELL_PHY is not set > -+# CONFIG_DAVICOM_PHY is not set > -+# CONFIG_QSEMI_PHY is not set > -+CONFIG_LXT_PHY=y > -+# CONFIG_CICADA_PHY is not set > -+# CONFIG_VITESSE_PHY is not set > -+CONFIG_SMSC_PHY=y > -+# CONFIG_BROADCOM_PHY is not set > -+# CONFIG_ICPLUS_PHY is not set > -+# CONFIG_REALTEK_PHY is not set > -+# CONFIG_NATIONAL_PHY is not set > -+# CONFIG_STE10XP is not set > -+CONFIG_LSI_ET1011C_PHY=y > -+# CONFIG_FIXED_PHY is not set > -+# CONFIG_MDIO_BITBANG is not set > -+CONFIG_NET_ETHERNET=y > -+CONFIG_MII=y > -+# CONFIG_AX88796 is not set > -+# CONFIG_SMC91X is not set > -+CONFIG_TI_DAVINCI_EMAC=y > -+# CONFIG_DM9000 is not set > -+# CONFIG_ENC28J60 is not set > -+# CONFIG_ETHOC is not set > -+# CONFIG_SMC911X is not set > -+# CONFIG_SMSC911X is not set > -+# CONFIG_DNET is not set > -+# CONFIG_IBM_NEW_EMAC_ZMII is not set > -+# CONFIG_IBM_NEW_EMAC_RGMII is not set > -+# CONFIG_IBM_NEW_EMAC_TAH is not set > -+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -+# CONFIG_B44 is not set > -+# CONFIG_KS8842 is not set > -+# CONFIG_KS8851 is not set > -+# CONFIG_KS8851_MLL is not set > -+# CONFIG_NETDEV_1000 is not set > -+# CONFIG_NETDEV_10000 is not set > -+CONFIG_WLAN=y > -+# CONFIG_USB_ZD1201 is not set > -+# CONFIG_HOSTAP is not set > -+ > -+# > -+# Enable WiMAX (Networking options) to see the WiMAX drivers > -+# > -+ > -+# > -+# USB Network Adapters > -+# > -+# CONFIG_USB_CATC is not set > -+# CONFIG_USB_KAWETH is not set > -+# CONFIG_USB_PEGASUS is not set > -+# CONFIG_USB_RTL8150 is not set > -+# CONFIG_USB_USBNET is not set > -+# CONFIG_WAN is not set > -+# CONFIG_PPP is not set > -+# CONFIG_SLIP is not set > -+CONFIG_NETCONSOLE=y > -+# CONFIG_NETCONSOLE_DYNAMIC is not set > -+CONFIG_NETPOLL=y > -+CONFIG_NETPOLL_TRAP=y > -+CONFIG_NET_POLL_CONTROLLER=y > -+# CONFIG_ISDN is not set > -+# CONFIG_PHONE is not set > -+ > -+# > -+# Input device support > -+# > -+CONFIG_INPUT=y > -+# CONFIG_INPUT_FF_MEMLESS is not set > -+# CONFIG_INPUT_POLLDEV is not set > -+# CONFIG_INPUT_SPARSEKMAP is not set > -+ > -+# > -+# Userland interfaces > -+# > -+# CONFIG_INPUT_MOUSEDEV is not set > -+# CONFIG_INPUT_JOYDEV is not set > -+CONFIG_INPUT_EVDEV=y > -+# CONFIG_INPUT_EVBUG is not set > -+ > -+# > -+# Input Device Drivers > -+# > -+CONFIG_INPUT_KEYBOARD=y > -+# CONFIG_KEYBOARD_ADP5588 is not set > -+CONFIG_KEYBOARD_ATKBD=m > -+# CONFIG_QT2160 is not set > -+# CONFIG_KEYBOARD_LKKBD is not set > -+CONFIG_KEYBOARD_GPIO=y > -+# CONFIG_KEYBOARD_MATRIX is not set > -+# CONFIG_KEYBOARD_MAX7359 is not set > -+# CONFIG_KEYBOARD_NEWTON is not set > -+# CONFIG_KEYBOARD_OPENCORES is not set > -+# CONFIG_KEYBOARD_STOWAWAY is not set > -+# CONFIG_KEYBOARD_SUNKBD is not set > -+CONFIG_KEYBOARD_XTKBD=m > -+# CONFIG_INPUT_MOUSE is not set > -+# CONFIG_INPUT_JOYSTICK is not set > -+# CONFIG_INPUT_TABLET is not set > -+CONFIG_INPUT_TOUCHSCREEN=y > -+# CONFIG_TOUCHSCREEN_ADS7846 is not set > -+# CONFIG_TOUCHSCREEN_AD7877 is not set > -+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -+# CONFIG_TOUCHSCREEN_AD7879 is not set > -+# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -+# CONFIG_TOUCHSCREEN_EETI is not set > -+# CONFIG_TOUCHSCREEN_FUJITSU is not set > -+# CONFIG_TOUCHSCREEN_GUNZE is not set > -+# CONFIG_TOUCHSCREEN_ELO is not set > -+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -+# CONFIG_TOUCHSCREEN_MCS5000 is not set > -+# CONFIG_TOUCHSCREEN_MTOUCH is not set > -+# CONFIG_TOUCHSCREEN_INEXIO is not set > -+# CONFIG_TOUCHSCREEN_MK712 is not set > -+# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -+# CONFIG_TOUCHSCREEN_TSC2007 is not set > -+# CONFIG_TOUCHSCREEN_TSC2004 is not set > -+# CONFIG_TOUCHSCREEN_W90X900 is not set > -+CONFIG_TOUCHSCREEN_TPS6507X=y > -+# CONFIG_INPUT_MISC is not set > -+ > -+# > -+# Hardware I/O ports > -+# > -+CONFIG_SERIO=y > -+CONFIG_SERIO_SERPORT=y > -+CONFIG_SERIO_LIBPS2=y > -+# CONFIG_SERIO_RAW is not set > -+# CONFIG_SERIO_ALTERA_PS2 is not set > -+# CONFIG_GAMEPORT is not set > -+ > -+# > -+# Character devices > -+# > -+CONFIG_VT=y > -+CONFIG_CONSOLE_TRANSLATIONS=y > -+# CONFIG_VT_CONSOLE is not set > -+CONFIG_HW_CONSOLE=y > -+# CONFIG_VT_HW_CONSOLE_BINDING is not set > -+CONFIG_DEVKMEM=y > -+# CONFIG_SERIAL_NONSTANDARD is not set > -+ > -+# > -+# Serial drivers > -+# > -+CONFIG_SERIAL_8250=y > -+CONFIG_SERIAL_8250_CONSOLE=y > -+CONFIG_SERIAL_8250_NR_UARTS=3 > -+CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -+# CONFIG_SERIAL_8250_EXTENDED is not set > -+ > -+# > -+# Non-8250 serial port support > -+# > -+# CONFIG_SERIAL_MAX3100 is not set > -+CONFIG_SERIAL_CORE=y > -+CONFIG_SERIAL_CORE_CONSOLE=y > -+CONFIG_UNIX98_PTYS=y > -+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -+CONFIG_LEGACY_PTYS=y > -+CONFIG_LEGACY_PTY_COUNT=8 > -+# CONFIG_IPMI_HANDLER is not set > -+CONFIG_HW_RANDOM=m > -+# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -+# CONFIG_R3964 is not set > -+# CONFIG_RAW_DRIVER is not set > -+# CONFIG_TCG_TPM is not set > -+CONFIG_I2C=y > -+CONFIG_I2C_BOARDINFO=y > -+CONFIG_I2C_COMPAT=y > -+CONFIG_I2C_CHARDEV=y > -+CONFIG_I2C_HELPER_AUTO=y > -+CONFIG_I2C_ALGOBIT=y > -+ > -+# > -+# I2C Hardware Bus support > -+# > -+ > -+# > -+# I2C system bus drivers (mostly embedded / system-on-chip) > -+# > -+CONFIG_I2C_DAVINCI=y > -+# CONFIG_I2C_DESIGNWARE is not set > -+CONFIG_I2C_GPIO=y > -+# CONFIG_I2C_OCORES is not set > -+# CONFIG_I2C_SIMTEC is not set > -+ > -+# > -+# External I2C/SMBus adapter drivers > -+# > -+# CONFIG_I2C_PARPORT_LIGHT is not set > -+# CONFIG_I2C_TAOS_EVM is not set > -+# CONFIG_I2C_TINY_USB is not set > -+ > -+# > -+# Other I2C/SMBus bus drivers > -+# > -+# CONFIG_I2C_PCA_PLATFORM is not set > -+# CONFIG_I2C_STUB is not set > -+ > -+# > -+# Miscellaneous I2C Chip support > -+# > -+# CONFIG_SENSORS_TSL2550 is not set > -+# CONFIG_I2C_DEBUG_CORE is not set > -+# CONFIG_I2C_DEBUG_ALGO is not set > -+# CONFIG_I2C_DEBUG_BUS is not set > -+# CONFIG_I2C_DEBUG_CHIP is not set > -+CONFIG_SPI=y > -+CONFIG_SPI_MASTER=y > -+ > -+# > -+# SPI Master Controller Drivers > -+# > -+CONFIG_SPI_DAVINCI=y > -+CONFIG_SPI_BITBANG=y > -+# CONFIG_SPI_GPIO is not set > -+# CONFIG_SPI_XILINX is not set > -+# CONFIG_SPI_DESIGNWARE is not set > -+ > -+# > -+# SPI Protocol Masters > -+# > -+# CONFIG_SPI_SPIDEV is not set > -+# CONFIG_SPI_TLE62X0 is not set > -+ > -+# > -+# PPS support > -+# > -+# CONFIG_PPS is not set > -+CONFIG_ARCH_REQUIRE_GPIOLIB=y > -+CONFIG_GPIOLIB=y > -+# CONFIG_GPIO_SYSFS is not set > -+ > -+# > -+# Memory mapped GPIO expanders: > -+# > -+ > -+# > -+# I2C GPIO expanders: > -+# > -+# CONFIG_GPIO_MAX732X is not set > -+CONFIG_GPIO_PCA953X=y > -+CONFIG_GPIO_PCF857X=y > -+# CONFIG_GPIO_ADP5588 is not set > -+ > -+# > -+# PCI GPIO expanders: > -+# > -+ > -+# > -+# SPI GPIO expanders: > -+# > -+# CONFIG_GPIO_MAX7301 is not set > -+# CONFIG_GPIO_MCP23S08 is not set > -+# CONFIG_GPIO_MC33880 is not set > -+ > -+# > -+# AC97 GPIO expanders: > -+# > -+# CONFIG_W1 is not set > -+# CONFIG_POWER_SUPPLY is not set > -+# CONFIG_HWMON is not set > -+# CONFIG_THERMAL is not set > -+CONFIG_WATCHDOG=y > -+# CONFIG_WATCHDOG_NOWAYOUT is not set > -+ > -+# > -+# Watchdog Device Drivers > -+# > -+# CONFIG_SOFT_WATCHDOG is not set > -+CONFIG_DAVINCI_WATCHDOG=y > -+ > -+# > -+# USB-based Watchdog Cards > -+# > -+# CONFIG_USBPCWATCHDOG is not set > -+CONFIG_SSB_POSSIBLE=y > -+ > -+# > -+# Sonics Silicon Backplane > -+# > -+# CONFIG_SSB is not set > -+ > -+# > -+# Multifunction device drivers > -+# > -+# CONFIG_MFD_CORE is not set > -+# CONFIG_MFD_SM501 is not set > -+# CONFIG_MFD_ASIC3 is not set > -+# CONFIG_HTC_EGPIO is not set > -+# CONFIG_HTC_PASIC3 is not set > -+# CONFIG_TPS65010 is not set > -+CONFIG_TPS6507x=y > -+# CONFIG_TWL4030_CORE is not set > -+# CONFIG_MFD_TMIO is not set > -+# CONFIG_MFD_T7L66XB is not set > -+# CONFIG_MFD_TC6387XB is not set > -+# CONFIG_MFD_TC6393XB is not set > -+# CONFIG_PMIC_DA903X is not set > -+# CONFIG_PMIC_ADP5520 is not set > -+# CONFIG_MFD_WM8400 is not set > -+# CONFIG_MFD_WM831X is not set > -+# CONFIG_MFD_WM8350_I2C is not set > -+# CONFIG_MFD_PCF50633 is not set > -+# CONFIG_MFD_MC13783 is not set > -+# CONFIG_AB3100_CORE is not set > -+# CONFIG_EZX_PCAP is not set > -+# CONFIG_MFD_88PM8607 is not set > -+# CONFIG_AB4500_CORE is not set > -+# CONFIG_REGULATOR is not set > -+CONFIG_MEDIA_SUPPORT=y > -+ > -+# > -+# Multimedia core support > -+# > -+CONFIG_VIDEO_DEV=y > -+CONFIG_VIDEO_V4L2_COMMON=y > -+CONFIG_VIDEO_ALLOW_V4L1=y > -+CONFIG_VIDEO_V4L1_COMPAT=y > -+# CONFIG_DVB_CORE is not set > -+CONFIG_VIDEO_MEDIA=y > -+ > -+# > -+# Multimedia drivers > -+# > -+CONFIG_IR_CORE=y > -+CONFIG_VIDEO_IR=y > -+# CONFIG_MEDIA_ATTACH is not set > -+CONFIG_MEDIA_TUNER=y > -+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set > -+CONFIG_MEDIA_TUNER_SIMPLE=y > -+CONFIG_MEDIA_TUNER_TDA8290=y > -+CONFIG_MEDIA_TUNER_TDA9887=y > -+CONFIG_MEDIA_TUNER_TEA5761=y > -+CONFIG_MEDIA_TUNER_TEA5767=y > -+CONFIG_MEDIA_TUNER_MT20XX=y > -+CONFIG_MEDIA_TUNER_XC2028=y > -+CONFIG_MEDIA_TUNER_XC5000=y > -+CONFIG_MEDIA_TUNER_MC44S803=y > -+CONFIG_VIDEO_V4L2=y > -+CONFIG_VIDEO_V4L1=y > -+CONFIG_VIDEOBUF_GEN=y > -+CONFIG_VIDEOBUF_DMA_CONTIG=y > -+CONFIG_VIDEO_CAPTURE_DRIVERS=y > -+# CONFIG_VIDEO_ADV_DEBUG is not set > -+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -+# CONFIG_VIDEO_IR_I2C is not set > -+ > -+# > -+# Encoders/decoders and other helper chips > -+# > -+ > -+# > -+# Audio decoders > -+# > -+# CONFIG_VIDEO_TVAUDIO is not set > -+# CONFIG_VIDEO_TDA7432 is not set > -+# CONFIG_VIDEO_TDA9840 is not set > -+# CONFIG_VIDEO_TDA9875 is not set > -+# CONFIG_VIDEO_TEA6415C is not set > -+# CONFIG_VIDEO_TEA6420 is not set > -+# CONFIG_VIDEO_MSP3400 is not set > -+# CONFIG_VIDEO_CS5345 is not set > -+# CONFIG_VIDEO_CS53L32A is not set > -+# CONFIG_VIDEO_M52790 is not set > -+# CONFIG_VIDEO_TLV320AIC23B is not set > -+# CONFIG_VIDEO_WM8775 is not set > -+# CONFIG_VIDEO_WM8739 is not set > -+# CONFIG_VIDEO_VP27SMPX is not set > -+ > -+# > -+# RDS decoders > -+# > -+# CONFIG_VIDEO_SAA6588 is not set > -+ > -+# > -+# Video decoders > -+# > -+# CONFIG_VIDEO_ADV7180 is not set > -+# CONFIG_VIDEO_BT819 is not set > -+# CONFIG_VIDEO_BT856 is not set > -+# CONFIG_VIDEO_BT866 is not set > -+# CONFIG_VIDEO_KS0127 is not set > -+# CONFIG_VIDEO_OV7670 is not set > -+# CONFIG_VIDEO_MT9V011 is not set > -+# CONFIG_VIDEO_TCM825X is not set > -+# CONFIG_VIDEO_SAA7110 is not set > -+# CONFIG_VIDEO_SAA711X is not set > -+# CONFIG_VIDEO_SAA717X is not set > -+# CONFIG_VIDEO_SAA7191 is not set > -+CONFIG_VIDEO_TVP514X=y > -+# CONFIG_VIDEO_TVP5150 is not set > -+# CONFIG_VIDEO_VPX3220 is not set > -+ > -+# > -+# Video and audio decoders > -+# > -+# CONFIG_VIDEO_CX25840 is not set > -+ > -+# > -+# MPEG video encoders > -+# > -+# CONFIG_VIDEO_CX2341X is not set > -+ > -+# > -+# Video encoders > -+# > -+# CONFIG_VIDEO_SAA7127 is not set > -+# CONFIG_VIDEO_SAA7185 is not set > -+# CONFIG_VIDEO_ADV7170 is not set > -+# CONFIG_VIDEO_ADV7175 is not set > -+# CONFIG_VIDEO_THS7303 is not set > -+# CONFIG_VIDEO_ADV7343 is not set > -+ > -+# > -+# Video improvement chips > -+# > -+# CONFIG_VIDEO_UPD64031A is not set > -+# CONFIG_VIDEO_UPD64083 is not set > -+CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y > -+CONFIG_VIDEO_DAVINCI_VPIF=y > -+# CONFIG_VIDEO_VIVI is not set > -+# CONFIG_VIDEO_VPSS_SYSTEM is not set > -+# CONFIG_VIDEO_VPFE_CAPTURE is not set > -+# CONFIG_VIDEO_CPIA is not set > -+# CONFIG_VIDEO_CPIA2 is not set > -+# CONFIG_VIDEO_SAA5246A is not set > -+# CONFIG_VIDEO_SAA5249 is not set > -+# CONFIG_SOC_CAMERA is not set > -+CONFIG_V4L_USB_DRIVERS=y > -+CONFIG_USB_VIDEO_CLASS=y > -+# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set > -+# CONFIG_USB_GSPCA is not set > -+# CONFIG_VIDEO_PVRUSB2 is not set > -+# CONFIG_VIDEO_HDPVR is not set > -+# CONFIG_VIDEO_EM28XX is not set > -+# CONFIG_VIDEO_CX231XX is not set > -+# CONFIG_VIDEO_USBVISION is not set > -+# CONFIG_USB_VICAM is not set > -+# CONFIG_USB_IBMCAM is not set > -+# CONFIG_USB_KONICAWC is not set > -+# CONFIG_USB_QUICKCAM_MESSENGER is not set > -+# CONFIG_USB_ET61X251 is not set > -+# CONFIG_VIDEO_OVCAMCHIP is not set > -+# CONFIG_USB_OV511 is not set > -+# CONFIG_USB_SE401 is not set > -+# CONFIG_USB_SN9C102 is not set > -+# CONFIG_USB_STV680 is not set > -+# CONFIG_USB_ZC0301 is not set > -+# CONFIG_USB_PWC is not set > -+# CONFIG_USB_PWC_INPUT_EVDEV is not set > -+# CONFIG_USB_ZR364XX is not set > -+# CONFIG_USB_STKWEBCAM is not set > -+# CONFIG_USB_S2255 is not set > -+# CONFIG_RADIO_ADAPTERS is not set > -+# CONFIG_DAB is not set > -+ > -+# > -+# Graphics support > -+# > -+# CONFIG_VGASTATE is not set > -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -+CONFIG_FB=y > -+# CONFIG_FIRMWARE_EDID is not set > -+# CONFIG_FB_DDC is not set > -+# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -+CONFIG_FB_CFB_FILLRECT=y > -+CONFIG_FB_CFB_COPYAREA=y > -+CONFIG_FB_CFB_IMAGEBLIT=y > -+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -+# CONFIG_FB_SYS_FILLRECT is not set > -+# CONFIG_FB_SYS_COPYAREA is not set > -+# CONFIG_FB_SYS_IMAGEBLIT is not set > -+# CONFIG_FB_FOREIGN_ENDIAN is not set > -+# CONFIG_FB_SYS_FOPS is not set > -+# CONFIG_FB_SVGALIB is not set > -+# CONFIG_FB_MACMODES is not set > -+# CONFIG_FB_BACKLIGHT is not set > -+# CONFIG_FB_MODE_HELPERS is not set > -+# CONFIG_FB_TILEBLITTING is not set > -+ > -+# > -+# Frame buffer hardware drivers > -+# > -+# CONFIG_FB_S1D13XXX is not set > -+# CONFIG_FB_DAVINCI is not set > -+# CONFIG_FB_VIRTUAL is not set > -+CONFIG_FB_DA8XX=y > -+# CONFIG_FB_METRONOME is not set > -+# CONFIG_FB_MB862XX is not set > -+# CONFIG_FB_BROADSHEET is not set > -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > -+ > -+# > -+# Display device support > -+# > -+# CONFIG_DISPLAY_SUPPORT is not set > -+ > -+# > -+# Console display driver support > -+# > -+# CONFIG_VGA_CONSOLE is not set > -+CONFIG_DUMMY_CONSOLE=y > -+CONFIG_FRAMEBUFFER_CONSOLE=y > -+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set > -+# CONFIG_FONTS is not set > -+CONFIG_FONT_8x8=y > -+CONFIG_FONT_8x16=y > -+CONFIG_LOGO=y > -+CONFIG_LOGO_LINUX_MONO=y > -+CONFIG_LOGO_LINUX_VGA16=y > -+CONFIG_LOGO_LINUX_CLUT224=y > -+CONFIG_SOUND=y > -+# CONFIG_SOUND_OSS_CORE is not set > -+CONFIG_SND=y > -+CONFIG_SND_TIMER=y > -+CONFIG_SND_PCM=y > -+CONFIG_SND_HWDEP=y > -+CONFIG_SND_RAWMIDI=y > -+CONFIG_SND_JACK=y > -+# CONFIG_SND_SEQUENCER is not set > -+# CONFIG_SND_MIXER_OSS is not set > -+# CONFIG_SND_PCM_OSS is not set > -+# CONFIG_SND_HRTIMER is not set > -+# CONFIG_SND_DYNAMIC_MINORS is not set > -+CONFIG_SND_SUPPORT_OLD_API=y > -+CONFIG_SND_VERBOSE_PROCFS=y > -+# CONFIG_SND_VERBOSE_PRINTK is not set > -+# CONFIG_SND_DEBUG is not set > -+# CONFIG_SND_RAWMIDI_SEQ is not set > -+# CONFIG_SND_OPL3_LIB_SEQ is not set > -+# CONFIG_SND_OPL4_LIB_SEQ is not set > -+# CONFIG_SND_SBAWE_SEQ is not set > -+# CONFIG_SND_EMU10K1_SEQ is not set > -+CONFIG_SND_DRIVERS=y > -+# CONFIG_SND_DUMMY is not set > -+# CONFIG_SND_MTPAV is not set > -+# CONFIG_SND_SERIAL_U16550 is not set > -+# CONFIG_SND_MPU401 is not set > -+CONFIG_SND_ARM=y > -+CONFIG_SND_SPI=y > -+CONFIG_SND_USB=y > -+CONFIG_SND_USB_AUDIO=y > -+# CONFIG_SND_USB_CAIAQ is not set > -+CONFIG_SND_SOC=y > -+CONFIG_SND_DAVINCI_SOC=y > -+CONFIG_SND_DAVINCI_SOC_MCASP=y > -+CONFIG_SND_DA850_SOC_EVM=y > -+CONFIG_SND_SOC_I2C_AND_SPI=y > -+# CONFIG_SND_SOC_ALL_CODECS is not set > -+CONFIG_SND_SOC_TLV320AIC3X=y > -+# CONFIG_SOUND_PRIME is not set > -+CONFIG_HID_SUPPORT=y > -+CONFIG_HID=y > -+# CONFIG_HIDRAW is not set > -+ > -+# > -+# USB Input Devices > -+# > -+CONFIG_USB_HID=y > -+# CONFIG_HID_PID is not set > -+# CONFIG_USB_HIDDEV is not set > -+ > -+# > -+# Special HID drivers > -+# > -+# CONFIG_HID_A4TECH is not set > -+# CONFIG_HID_APPLE is not set > -+# CONFIG_HID_BELKIN is not set > -+# CONFIG_HID_CHERRY is not set > -+# CONFIG_HID_CHICONY is not set > -+# CONFIG_HID_CYPRESS is not set > -+# CONFIG_HID_DRAGONRISE is not set > -+# CONFIG_HID_EZKEY is not set > -+# CONFIG_HID_KYE is not set > -+# CONFIG_HID_GYRATION is not set > -+# CONFIG_HID_TWINHAN is not set > -+# CONFIG_HID_KENSINGTON is not set > -+# CONFIG_HID_LOGITECH is not set > -+# CONFIG_HID_MICROSOFT is not set > -+# CONFIG_HID_MONTEREY is not set > -+# CONFIG_HID_NTRIG is not set > -+# CONFIG_HID_PANTHERLORD is not set > -+# CONFIG_HID_PETALYNX is not set > -+# CONFIG_HID_SAMSUNG is not set > -+# CONFIG_HID_SONY is not set > -+# CONFIG_HID_SUNPLUS is not set > -+# CONFIG_HID_GREENASIA is not set > -+# CONFIG_HID_SMARTJOYPLUS is not set > -+# CONFIG_HID_TOPSEED is not set > -+# CONFIG_HID_THRUSTMASTER is not set > -+# CONFIG_HID_ZEROPLUS is not set > -+CONFIG_USB_SUPPORT=y > -+CONFIG_USB_ARCH_HAS_HCD=y > -+CONFIG_USB_ARCH_HAS_OHCI=y > -+# CONFIG_USB_ARCH_HAS_EHCI is not set > -+CONFIG_USB=y > -+# CONFIG_USB_DEBUG is not set > -+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > -+ > -+# > -+# Miscellaneous USB options > -+# > -+# CONFIG_USB_DEVICEFS is not set > -+# CONFIG_USB_DEVICE_CLASS is not set > -+# CONFIG_USB_DYNAMIC_MINORS is not set > -+CONFIG_USB_SUSPEND=y > -+# CONFIG_USB_OTG is not set > -+# CONFIG_USB_OTG_WHITELIST is not set > -+# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -+# CONFIG_USB_MON is not set > -+# CONFIG_USB_WUSB is not set > -+# CONFIG_USB_WUSB_CBAF is not set > -+ > -+# > -+# USB Host Controller Drivers > -+# > -+# CONFIG_USB_C67X00_HCD is not set > -+# CONFIG_USB_OXU210HP_HCD is not set > -+# CONFIG_USB_ISP116X_HCD is not set > -+# CONFIG_USB_ISP1760_HCD is not set > -+# CONFIG_USB_ISP1362_HCD is not set > -+CONFIG_USB_OHCI_HCD=y > -+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -+CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -+# CONFIG_USB_SL811_HCD is not set > -+# CONFIG_USB_R8A66597_HCD is not set > -+# CONFIG_USB_HWA_HCD is not set > -+CONFIG_USB_MUSB_HDRC=y > -+CONFIG_USB_MUSB_SOC=y > -+CONFIG_USB_MUSB_HOST=y > -+# CONFIG_USB_MUSB_PERIPHERAL is not set > -+# CONFIG_USB_MUSB_OTG is not set > -+CONFIG_USB_MUSB_HDRC_HCD=y > -+# CONFIG_MUSB_PIO_ONLY is not set > -+# CONFIG_USB_INVENTRA_DMA is not set > -+# CONFIG_USB_TI_CPPI_DMA is not set > -+CONFIG_USB_TI_CPPI41_DMA=y > -+CONFIG_USB_MUSB_DEBUG=y > -+ > -+# > -+# USB Device Class drivers > -+# > -+# CONFIG_USB_ACM is not set > -+# CONFIG_USB_PRINTER is not set > -+# CONFIG_USB_WDM is not set > -+# CONFIG_USB_TMC is not set > -+ > -+# > -+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -+# > -+ > -+# > -+# also be needed; see USB_STORAGE Help for more info > -+# > -+CONFIG_USB_STORAGE=y > -+# CONFIG_USB_STORAGE_DEBUG is not set > -+# CONFIG_USB_STORAGE_DATAFAB is not set > -+# CONFIG_USB_STORAGE_FREECOM is not set > -+# CONFIG_USB_STORAGE_ISD200 is not set > -+# CONFIG_USB_STORAGE_USBAT is not set > -+# CONFIG_USB_STORAGE_SDDR09 is not set > -+# CONFIG_USB_STORAGE_SDDR55 is not set > -+# CONFIG_USB_STORAGE_JUMPSHOT is not set > -+# CONFIG_USB_STORAGE_ALAUDA is not set > -+# CONFIG_USB_STORAGE_ONETOUCH is not set > -+# CONFIG_USB_STORAGE_KARMA is not set > -+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -+# CONFIG_USB_LIBUSUAL is not set > -+ > -+# > -+# USB Imaging devices > -+# > -+# CONFIG_USB_MDC800 is not set > -+# CONFIG_USB_MICROTEK is not set > -+ > -+# > -+# USB port drivers > -+# > -+# CONFIG_USB_SERIAL is not set > -+ > -+# > -+# USB Miscellaneous drivers > -+# > -+# CONFIG_USB_EMI62 is not set > -+# CONFIG_USB_EMI26 is not set > -+# CONFIG_USB_ADUTUX is not set > -+# CONFIG_USB_SEVSEG is not set > -+# CONFIG_USB_RIO500 is not set > -+# CONFIG_USB_LEGOTOWER is not set > -+# CONFIG_USB_LCD is not set > -+# CONFIG_USB_BERRY_CHARGE is not set > -+# CONFIG_USB_LED is not set > -+# CONFIG_USB_CYPRESS_CY7C63 is not set > -+# CONFIG_USB_CYTHERM is not set > -+# CONFIG_USB_IDMOUSE is not set > -+# CONFIG_USB_FTDI_ELAN is not set > -+# CONFIG_USB_APPLEDISPLAY is not set > -+# CONFIG_USB_SISUSBVGA is not set > -+# CONFIG_USB_LD is not set > -+# CONFIG_USB_TRANCEVIBRATOR is not set > -+# CONFIG_USB_IOWARRIOR is not set > -+# CONFIG_USB_TEST is not set > -+# CONFIG_USB_ISIGHTFW is not set > -+# CONFIG_USB_VST is not set > -+# CONFIG_USB_GADGET is not set > -+ > -+# > -+# OTG and related infrastructure > -+# > -+CONFIG_USB_OTG_UTILS=y > -+# CONFIG_USB_GPIO_VBUS is not set > -+# CONFIG_USB_ULPI is not set > -+CONFIG_NOP_USB_XCEIV=y > -+CONFIG_MMC=y > -+# CONFIG_MMC_DEBUG is not set > -+# CONFIG_MMC_UNSAFE_RESUME is not set > -+ > -+# > -+# MMC/SD/SDIO Card Drivers > -+# > -+CONFIG_MMC_BLOCK=y > -+CONFIG_MMC_BLOCK_BOUNCE=y > -+# CONFIG_SDIO_UART is not set > -+# CONFIG_MMC_TEST is not set > -+ > -+# > -+# MMC/SD/SDIO Host Controller Drivers > -+# > -+# CONFIG_MMC_SDHCI is not set > -+# CONFIG_MMC_AT91 is not set > -+# CONFIG_MMC_ATMELMCI is not set > -+CONFIG_MMC_DAVINCI=y > -+# CONFIG_MMC_SPI is not set > -+# CONFIG_MEMSTICK is not set > -+# CONFIG_NEW_LEDS is not set > -+# CONFIG_ACCESSIBILITY is not set > -+CONFIG_RTC_LIB=y > -+CONFIG_RTC_CLASS=y > -+CONFIG_RTC_HCTOSYS=y > -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -+# CONFIG_RTC_DEBUG is not set > -+ > -+# > -+# RTC interfaces > -+# > -+CONFIG_RTC_INTF_SYSFS=y > -+CONFIG_RTC_INTF_PROC=y > -+CONFIG_RTC_INTF_DEV=y > -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -+# CONFIG_RTC_DRV_TEST is not set > -+ > -+# > -+# I2C RTC drivers > -+# > -+# CONFIG_RTC_DRV_DS1307 is not set > -+# CONFIG_RTC_DRV_DS1374 is not set > -+# CONFIG_RTC_DRV_DS1672 is not set > -+# CONFIG_RTC_DRV_MAX6900 is not set > -+# CONFIG_RTC_DRV_RS5C372 is not set > -+# CONFIG_RTC_DRV_ISL1208 is not set > -+# CONFIG_RTC_DRV_X1205 is not set > -+# CONFIG_RTC_DRV_PCF8563 is not set > -+# CONFIG_RTC_DRV_PCF8583 is not set > -+# CONFIG_RTC_DRV_M41T80 is not set > -+# CONFIG_RTC_DRV_BQ32K is not set > -+# CONFIG_RTC_DRV_S35390A is not set > -+# CONFIG_RTC_DRV_FM3130 is not set > -+# CONFIG_RTC_DRV_RX8581 is not set > -+# CONFIG_RTC_DRV_RX8025 is not set > -+ > -+# > -+# SPI RTC drivers > -+# > -+# CONFIG_RTC_DRV_M41T94 is not set > -+# CONFIG_RTC_DRV_DS1305 is not set > -+# CONFIG_RTC_DRV_DS1390 is not set > -+# CONFIG_RTC_DRV_MAX6902 is not set > -+# CONFIG_RTC_DRV_R9701 is not set > -+# CONFIG_RTC_DRV_RS5C348 is not set > -+# CONFIG_RTC_DRV_DS3234 is not set > -+# CONFIG_RTC_DRV_PCF2123 is not set > -+ > -+# > -+# Platform RTC drivers > -+# > -+# CONFIG_RTC_DRV_CMOS is not set > -+# CONFIG_RTC_DRV_DS1286 is not set > -+# CONFIG_RTC_DRV_DS1511 is not set > -+# CONFIG_RTC_DRV_DS1553 is not set > -+# CONFIG_RTC_DRV_DS1742 is not set > -+# CONFIG_RTC_DRV_STK17TA8 is not set > -+# CONFIG_RTC_DRV_M48T86 is not set > -+# CONFIG_RTC_DRV_M48T35 is not set > -+# CONFIG_RTC_DRV_M48T59 is not set > -+# CONFIG_RTC_DRV_MSM6242 is not set > -+# CONFIG_RTC_DRV_BQ4802 is not set > -+# CONFIG_RTC_DRV_RP5C01 is not set > -+# CONFIG_RTC_DRV_V3020 is not set > -+ > -+# > -+# on-CPU RTC drivers > -+# > -+# CONFIG_RTC_DRV_OMAP is not set > -+# CONFIG_DMADEVICES is not set > -+# CONFIG_AUXDISPLAY is not set > -+# CONFIG_UIO is not set > -+ > -+# > -+# TI VLYNQ > -+# > -+# CONFIG_STAGING is not set > -+ > -+# > -+# File systems > -+# > -+CONFIG_EXT2_FS=y > -+# CONFIG_EXT2_FS_XATTR is not set > -+# CONFIG_EXT2_FS_XIP is not set > -+CONFIG_EXT3_FS=y > -+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -+CONFIG_EXT3_FS_XATTR=y > -+# CONFIG_EXT3_FS_POSIX_ACL is not set > -+# CONFIG_EXT3_FS_SECURITY is not set > -+# CONFIG_EXT4_FS is not set > -+CONFIG_JBD=y > -+# CONFIG_JBD_DEBUG is not set > -+CONFIG_FS_MBCACHE=y > -+# CONFIG_REISERFS_FS is not set > -+# CONFIG_JFS_FS is not set > -+# CONFIG_FS_POSIX_ACL is not set > -+# CONFIG_XFS_FS is not set > -+# CONFIG_GFS2_FS is not set > -+# CONFIG_OCFS2_FS is not set > -+# CONFIG_BTRFS_FS is not set > -+# CONFIG_NILFS2_FS is not set > -+CONFIG_FILE_LOCKING=y > -+CONFIG_FSNOTIFY=y > -+CONFIG_DNOTIFY=y > -+CONFIG_INOTIFY=y > -+CONFIG_INOTIFY_USER=y > -+# CONFIG_QUOTA is not set > -+# CONFIG_AUTOFS_FS is not set > -+CONFIG_AUTOFS4_FS=m > -+# CONFIG_FUSE_FS is not set > -+ > -+# > -+# Caches > -+# > -+# CONFIG_FSCACHE is not set > -+ > -+# > -+# CD-ROM/DVD Filesystems > -+# > -+# CONFIG_ISO9660_FS is not set > -+# CONFIG_UDF_FS is not set > -+ > -+# > -+# DOS/FAT/NT Filesystems > -+# > -+CONFIG_FAT_FS=y > -+CONFIG_MSDOS_FS=y > -+CONFIG_VFAT_FS=y > -+CONFIG_FAT_DEFAULT_CODEPAGE=437 > -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -+# CONFIG_NTFS_FS is not set > -+ > -+# > -+# Pseudo filesystems > -+# > -+CONFIG_PROC_FS=y > -+CONFIG_PROC_SYSCTL=y > -+CONFIG_PROC_PAGE_MONITOR=y > -+CONFIG_SYSFS=y > -+CONFIG_TMPFS=y > -+# CONFIG_TMPFS_POSIX_ACL is not set > -+# CONFIG_HUGETLB_PAGE is not set > -+# CONFIG_CONFIGFS_FS is not set > -+CONFIG_MISC_FILESYSTEMS=y > -+# CONFIG_ADFS_FS is not set > -+# CONFIG_AFFS_FS is not set > -+# CONFIG_HFS_FS is not set > -+# CONFIG_HFSPLUS_FS is not set > -+# CONFIG_BEFS_FS is not set > -+# CONFIG_BFS_FS is not set > -+# CONFIG_EFS_FS is not set > -+CONFIG_JFFS2_FS=y > -+CONFIG_JFFS2_FS_DEBUG=0 > -+CONFIG_JFFS2_FS_WRITEBUFFER=y > -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -+# CONFIG_JFFS2_SUMMARY is not set > -+# CONFIG_JFFS2_FS_XATTR is not set > -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -+CONFIG_JFFS2_ZLIB=y > -+# CONFIG_JFFS2_LZO is not set > -+CONFIG_JFFS2_RTIME=y > -+# CONFIG_JFFS2_RUBIN is not set > -+CONFIG_CRAMFS=y > -+# CONFIG_SQUASHFS is not set > -+# CONFIG_VXFS_FS is not set > -+CONFIG_MINIX_FS=m > -+# CONFIG_OMFS_FS is not set > -+# CONFIG_HPFS_FS is not set > -+# CONFIG_QNX4FS_FS is not set > -+# CONFIG_ROMFS_FS is not set > -+# CONFIG_SYSV_FS is not set > -+# CONFIG_UFS_FS is not set > -+CONFIG_NETWORK_FILESYSTEMS=y > -+CONFIG_NFS_FS=y > -+CONFIG_NFS_V3=y > -+# CONFIG_NFS_V3_ACL is not set > -+# CONFIG_NFS_V4 is not set > -+CONFIG_ROOT_NFS=y > -+CONFIG_NFSD=m > -+CONFIG_NFSD_V3=y > -+# CONFIG_NFSD_V3_ACL is not set > -+# CONFIG_NFSD_V4 is not set > -+CONFIG_LOCKD=y > -+CONFIG_LOCKD_V4=y > -+CONFIG_EXPORTFS=m > -+CONFIG_NFS_COMMON=y > -+CONFIG_SUNRPC=y > -+# CONFIG_RPCSEC_GSS_KRB5 is not set > -+# CONFIG_RPCSEC_GSS_SPKM3 is not set > -+CONFIG_SMB_FS=m > -+# CONFIG_SMB_NLS_DEFAULT is not set > -+# CONFIG_CIFS is not set > -+# CONFIG_NCP_FS is not set > -+# CONFIG_CODA_FS is not set > -+# CONFIG_AFS_FS is not set > -+ > -+# > -+# Partition Types > -+# > -+CONFIG_PARTITION_ADVANCED=y > -+# CONFIG_ACORN_PARTITION is not set > -+# CONFIG_OSF_PARTITION is not set > -+# CONFIG_AMIGA_PARTITION is not set > -+# CONFIG_ATARI_PARTITION is not set > -+# CONFIG_MAC_PARTITION is not set > -+CONFIG_MSDOS_PARTITION=y > -+# CONFIG_BSD_DISKLABEL is not set > -+# CONFIG_MINIX_SUBPARTITION is not set > -+# CONFIG_SOLARIS_X86_PARTITION is not set > -+# CONFIG_UNIXWARE_DISKLABEL is not set > -+# CONFIG_LDM_PARTITION is not set > -+# CONFIG_SGI_PARTITION is not set > -+# CONFIG_ULTRIX_PARTITION is not set > -+# CONFIG_SUN_PARTITION is not set > -+# CONFIG_KARMA_PARTITION is not set > -+# CONFIG_EFI_PARTITION is not set > -+# CONFIG_SYSV68_PARTITION is not set > -+CONFIG_NLS=y > -+CONFIG_NLS_DEFAULT="iso8859-1" > -+CONFIG_NLS_CODEPAGE_437=y > -+# CONFIG_NLS_CODEPAGE_737 is not set > -+# CONFIG_NLS_CODEPAGE_775 is not set > -+# CONFIG_NLS_CODEPAGE_850 is not set > -+# CONFIG_NLS_CODEPAGE_852 is not set > -+# CONFIG_NLS_CODEPAGE_855 is not set > -+# CONFIG_NLS_CODEPAGE_857 is not set > -+# CONFIG_NLS_CODEPAGE_860 is not set > -+# CONFIG_NLS_CODEPAGE_861 is not set > -+# CONFIG_NLS_CODEPAGE_862 is not set > -+# CONFIG_NLS_CODEPAGE_863 is not set > -+# CONFIG_NLS_CODEPAGE_864 is not set > -+# CONFIG_NLS_CODEPAGE_865 is not set > -+# CONFIG_NLS_CODEPAGE_866 is not set > -+# CONFIG_NLS_CODEPAGE_869 is not set > -+# CONFIG_NLS_CODEPAGE_936 is not set > -+# CONFIG_NLS_CODEPAGE_950 is not set > -+# CONFIG_NLS_CODEPAGE_932 is not set > -+# CONFIG_NLS_CODEPAGE_949 is not set > -+# CONFIG_NLS_CODEPAGE_874 is not set > -+# CONFIG_NLS_ISO8859_8 is not set > -+# CONFIG_NLS_CODEPAGE_1250 is not set > -+# CONFIG_NLS_CODEPAGE_1251 is not set > -+CONFIG_NLS_ASCII=m > -+CONFIG_NLS_ISO8859_1=y > -+# CONFIG_NLS_ISO8859_2 is not set > -+# CONFIG_NLS_ISO8859_3 is not set > -+# CONFIG_NLS_ISO8859_4 is not set > -+# CONFIG_NLS_ISO8859_5 is not set > -+# CONFIG_NLS_ISO8859_6 is not set > -+# CONFIG_NLS_ISO8859_7 is not set > -+# CONFIG_NLS_ISO8859_9 is not set > -+# CONFIG_NLS_ISO8859_13 is not set > -+# CONFIG_NLS_ISO8859_14 is not set > -+# CONFIG_NLS_ISO8859_15 is not set > -+# CONFIG_NLS_KOI8_R is not set > -+# CONFIG_NLS_KOI8_U is not set > -+CONFIG_NLS_UTF8=m > -+# CONFIG_DLM is not set > -+ > -+# > -+# Kernel hacking > -+# > -+# CONFIG_PRINTK_TIME is not set > -+# CONFIG_ENABLE_WARN_DEPRECATED is not set > -+# CONFIG_ENABLE_MUST_CHECK is not set > -+CONFIG_FRAME_WARN=1024 > -+# CONFIG_MAGIC_SYSRQ is not set > -+# CONFIG_STRIP_ASM_SYMS is not set > -+# CONFIG_UNUSED_SYMBOLS is not set > -+CONFIG_DEBUG_FS=y > -+# CONFIG_HEADERS_CHECK is not set > -+# CONFIG_DEBUG_KERNEL is not set > -+# CONFIG_SLUB_DEBUG_ON is not set > -+# CONFIG_SLUB_STATS is not set > -+CONFIG_DEBUG_BUGVERBOSE=y > -+# CONFIG_DEBUG_MEMORY_INIT is not set > -+CONFIG_FRAME_POINTER=y > -+# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -+# CONFIG_LATENCYTOP is not set > -+# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -+CONFIG_HAVE_FUNCTION_TRACER=y > -+CONFIG_TRACING_SUPPORT=y > -+# CONFIG_FTRACE is not set > -+# CONFIG_DYNAMIC_DEBUG is not set > -+# CONFIG_SAMPLES is not set > -+CONFIG_HAVE_ARCH_KGDB=y > -+# CONFIG_ARM_UNWIND is not set > -+# CONFIG_DEBUG_USER is not set > -+# CONFIG_OC_ETM is not set > -+ > -+# > -+# Security options > -+# > -+# CONFIG_KEYS is not set > -+# CONFIG_SECURITY is not set > -+# CONFIG_SECURITYFS is not set > -+# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -+# CONFIG_DEFAULT_SECURITY_SMACK is not set > -+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -+CONFIG_DEFAULT_SECURITY_DAC=y > -+CONFIG_DEFAULT_SECURITY="" > -+CONFIG_CRYPTO=y > -+ > -+# > -+# Crypto core or helper > -+# > -+# CONFIG_CRYPTO_MANAGER is not set > -+# CONFIG_CRYPTO_MANAGER2 is not set > -+# CONFIG_CRYPTO_GF128MUL is not set > -+# CONFIG_CRYPTO_NULL is not set > -+# CONFIG_CRYPTO_CRYPTD is not set > -+# CONFIG_CRYPTO_AUTHENC is not set > -+# CONFIG_CRYPTO_TEST is not set > -+ > -+# > -+# Authenticated Encryption with Associated Data > -+# > -+# CONFIG_CRYPTO_CCM is not set > -+# CONFIG_CRYPTO_GCM is not set > -+# CONFIG_CRYPTO_SEQIV is not set > -+ > -+# > -+# Block modes > -+# > -+# CONFIG_CRYPTO_CBC is not set > -+# CONFIG_CRYPTO_CTR is not set > -+# CONFIG_CRYPTO_CTS is not set > -+# CONFIG_CRYPTO_ECB is not set > -+# CONFIG_CRYPTO_LRW is not set > -+# CONFIG_CRYPTO_PCBC is not set > -+# CONFIG_CRYPTO_XTS is not set > -+ > -+# > -+# Hash modes > -+# > -+# CONFIG_CRYPTO_HMAC is not set > -+# CONFIG_CRYPTO_XCBC is not set > -+# CONFIG_CRYPTO_VMAC is not set > -+ > -+# > -+# Digest > -+# > -+# CONFIG_CRYPTO_CRC32C is not set > -+# CONFIG_CRYPTO_GHASH is not set > -+# CONFIG_CRYPTO_MD4 is not set > -+# CONFIG_CRYPTO_MD5 is not set > -+# CONFIG_CRYPTO_MICHAEL_MIC is not set > -+# CONFIG_CRYPTO_RMD128 is not set > -+# CONFIG_CRYPTO_RMD160 is not set > -+# CONFIG_CRYPTO_RMD256 is not set > -+# CONFIG_CRYPTO_RMD320 is not set > -+# CONFIG_CRYPTO_SHA1 is not set > -+# CONFIG_CRYPTO_SHA256 is not set > -+# CONFIG_CRYPTO_SHA512 is not set > -+# CONFIG_CRYPTO_TGR192 is not set > -+# CONFIG_CRYPTO_WP512 is not set > -+ > -+# > -+# Ciphers > -+# > -+# CONFIG_CRYPTO_AES is not set > -+# CONFIG_CRYPTO_ANUBIS is not set > -+# CONFIG_CRYPTO_ARC4 is not set > -+# CONFIG_CRYPTO_BLOWFISH is not set > -+# CONFIG_CRYPTO_CAMELLIA is not set > -+# CONFIG_CRYPTO_CAST5 is not set > -+# CONFIG_CRYPTO_CAST6 is not set > -+# CONFIG_CRYPTO_DES is not set > -+# CONFIG_CRYPTO_FCRYPT is not set > -+# CONFIG_CRYPTO_KHAZAD is not set > -+# CONFIG_CRYPTO_SALSA20 is not set > -+# CONFIG_CRYPTO_SEED is not set > -+# CONFIG_CRYPTO_SERPENT is not set > -+# CONFIG_CRYPTO_TEA is not set > -+# CONFIG_CRYPTO_TWOFISH is not set > -+ > -+# > -+# Compression > -+# > -+# CONFIG_CRYPTO_DEFLATE is not set > -+# CONFIG_CRYPTO_ZLIB is not set > -+# CONFIG_CRYPTO_LZO is not set > -+ > -+# > -+# Random Number Generation > -+# > -+# CONFIG_CRYPTO_ANSI_CPRNG is not set > -+# CONFIG_CRYPTO_HW is not set > -+# CONFIG_BINARY_PRINTF is not set > -+ > -+# > -+# Library routines > -+# > -+CONFIG_BITREVERSE=y > -+CONFIG_GENERIC_FIND_LAST_BIT=y > -+CONFIG_CRC_CCITT=m > -+# CONFIG_CRC16 is not set > -+CONFIG_CRC_T10DIF=m > -+# CONFIG_CRC_ITU_T is not set > -+CONFIG_CRC32=y > -+# CONFIG_CRC7 is not set > -+# CONFIG_LIBCRC32C is not set > -+CONFIG_ZLIB_INFLATE=y > -+CONFIG_ZLIB_DEFLATE=y > -+CONFIG_DECOMPRESS_GZIP=y > -+CONFIG_GENERIC_ALLOCATOR=y > -+CONFIG_HAS_IOMEM=y > -+CONFIG_HAS_IOPORT=y > -+CONFIG_HAS_DMA=y > -+CONFIG_NLATTR=y > -diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig > -index c6d89c9..40c9a45 100644 > ---- a/arch/arm/mach-davinci/Kconfig > -+++ b/arch/arm/mach-davinci/Kconfig > -@@ -205,6 +205,13 @@ config DA850_UI_VIDEO_PORT > - select Video Port Interface. > - endchoice > - > -+config MACH_OMAPL138_HAWKBOARD > -+ bool "TI DA850/OMAP-L138/AM18xx Hawkboard(.org) Platform" > -+ default ARCH_DAVINCI_DA850 > -+ depends on ARCH_DAVINCI_DA850 > -+ help > -+ Say Y here to select the TI DA850/OMAP-L138/AM18xx Hawkboard. > -+ > - config DAVINCI_MUX > - bool "DAVINCI multiplexing support" > - depends on ARCH_DAVINCI > -diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach- > davinci/Makefile > -index f4e55de..ad0e75e 100644 > ---- a/arch/arm/mach-davinci/Makefile > -+++ b/arch/arm/mach-davinci/Makefile > -@@ -30,6 +30,7 @@ obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += > board-dm646x-evm.o cdce949.o > - obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o > - obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o > - obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o > -+obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-da850- > hawk.o > - > - # Power Management > - obj-$(CONFIG_CPU_FREQ) += cpufreq.o > -diff --git a/arch/arm/mach-davinci/board-da850-hawk.c b/arch/arm/mach- > davinci/board-da850-hawk.c > -new file mode 100644 > -index 0000000..87ed017 > ---- /dev/null > -+++ b/arch/arm/mach-davinci/board-da850-hawk.c > -@@ -0,0 +1,657 @@ > -+/* > -+ * TI DA850/OMAP-L138 Hawkboard board > -+ * > -+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ > -+ * > -+ * Derived from: arch/arm/mach-davinci/board-da830-hawk.c > -+ * Original Copyrights follow: > -+ * > -+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under > -+ * the terms of the GNU General Public License version 2. This program > -+ * is licensed "as is" without any warranty of any kind, whether express > -+ * or implied. > -+ */ > -+#include <linux/kernel.h> > -+#include <linux/init.h> > -+#include <linux/console.h> > -+#include <linux/i2c.h> > -+#include <linux/i2c/at24.h> > -+#include <linux/i2c/pca953x.h> > -+#include <linux/mfd/tps6507x.h> > -+#include <linux/gpio.h> > -+#include <linux/delay.h> > -+#include <linux/platform_device.h> > -+#include <linux/mtd/mtd.h> > -+#include <linux/mtd/nand.h> > -+#include <linux/mtd/partitions.h> > -+#include <linux/regulator/machine.h> > -+#include <linux/spi/spi.h> > -+#include <linux/spi/flash.h> > -+#include <linux/usb/musb.h> > -+#include <linux/i2c-gpio.h> > -+ > -+#include <asm/mach-types.h> > -+#include <asm/mach/arch.h> > -+ > -+#include <mach/cp_intc.h> > -+#include <mach/da8xx.h> > -+#include <mach/nand.h> > -+#include <mach/mux.h> > -+#include <mach/flash.h> > -+#include <mach/vpif.h> > -+ > -+#include <media/tvp514x.h> > -+ > -+// TODO - check - why is this different from EVM? - default modes - check DS > -+#define DA850_HAWK_PHY_MASK 0x1 << 7 > -+#define DA850_HAWK_MDIO_FREQUENCY 2200000 /* PHY bus > frequency */ > -+ > -+#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) > -+#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) > -+ > -+#define TVP5147_CH0 "tvp514x-0" > -+ > -+#define VPIF_STATUS (0x002C) > -+#define VPIF_STATUS_CLR (0x0030) > -+ > -+static struct davinci_pm_config da850_pm_pdata = { > -+ .sleepcount = 128, > -+}; > -+ > -+static struct platform_device da850_pm_device = { > -+ .name = "pm-davinci", > -+ .dev = { > -+ .platform_data = &da850_pm_pdata, > -+ }, > -+ .id = -1, > -+}; > -+ > -+/* DA850/OMAP-L138 Hawkboard includes a 128 MByte large-page NAND > flash > -+ * (128K blocks) /?? TODO? > -+ */ > -+struct mtd_partition da850_hawk_nandflash_partition[] = { > -+ { > -+ .name = "u-boot env", > -+ .offset = 0, > -+ .size = SZ_128K, > -+ .mask_flags = MTD_WRITEABLE, > -+ }, > -+ { > -+ .name = "UBL", > -+ .offset = MTDPART_OFS_APPEND, > -+ .size = SZ_128K, > -+ .mask_flags = MTD_WRITEABLE, > -+ }, > -+ { > -+ .name = "u-boot", > -+ .offset = MTDPART_OFS_APPEND, > -+ .size = 4 * SZ_128K, > -+ .mask_flags = MTD_WRITEABLE, > -+ }, > -+ { > -+ .name = "kernel", > -+ .offset = 0x200000, > -+ .size = SZ_4M, > -+ .mask_flags = 0, > -+ }, > -+ { > -+ .name = "filesystem", > -+ .offset = MTDPART_OFS_APPEND, > -+ .size = MTDPART_SIZ_FULL, > -+ .mask_flags = 0, > -+ }, > -+}; > -+ > -+// TODO - check timings with Data Sheet > -+static struct davinci_aemif_timing da850_hawk_nandflash_timing = { > -+ .wsetup = 0, > -+ .wstrobe = 30, > -+ .whold = 30, > -+ .rsetup = 20, > -+ .rstrobe = 40, > -+ .rhold = 0, > -+ .ta = 0, > -+}; > -+ > -+static struct davinci_nand_pdata da850_hawk_nandflash_data = { > -+ .parts = da850_hawk_nandflash_partition, > -+ .nr_parts = ARRAY_SIZE(da850_hawk_nandflash_partition), > -+ .ecc_mode = NAND_ECC_HW, > -+ .ecc_bits = 4, > -+ .options = NAND_USE_FLASH_BBT, > -+ .timing = &da850_hawk_nandflash_timing, > -+}; > -+ > -+static struct resource da850_hawk_nandflash_resource[] = { > -+ { > -+ .start = DA8XX_AEMIF_CS3_BASE, > -+ .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - > 1, > -+ .flags = IORESOURCE_MEM, > -+ }, > -+ { > -+ .start = DA8XX_AEMIF_CTL_BASE, > -+ .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, > -+ .flags = IORESOURCE_MEM, > -+ }, > -+}; > -+ > -+static struct platform_device da850_hawk_nandflash_device = { > -+ .name = "davinci_nand", > -+ .id = 1, > -+ .dev = { > -+ .platform_data = &da850_hawk_nandflash_data, > -+ }, > -+ .num_resources = ARRAY_SIZE(da850_hawk_nandflash_resource), > -+ .resource = da850_hawk_nandflash_resource, > -+}; > -+ > -+static struct platform_device *da850_hawk_devices[] __initdata = { > -+ &da850_hawk_nandflash_device, > -+}; > -+ > -+#if defined(CONFIG_MMC_DAVINCI) || \ > -+ defined(CONFIG_MMC_DAVINCI_MODULE) > -+#define HAS_MMC 1 > -+#else > -+#define HAS_MMC 0 > -+#endif > -+ > -+static struct i2c_board_info __initdata da850_hawk_i2c_devices[] = { > -+ { > -+ I2C_BOARD_INFO("tlv320aic3x", 0x18), > -+ }, > -+// TODO - DDC VGA device I2C? > -+}; > -+ > -+static struct davinci_uart_config da850_hawk_uart_config __initdata = { > -+ .enabled_uarts = 0x7, > -+}; > -+ > -+/* davinci da850 hawk audio machine driver */ > -+static u8 da850_iis_serializer_direction[] = { > -+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, > INACTIVE_MODE, > -+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, > INACTIVE_MODE, > -+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, > INACTIVE_MODE, > -+ INACTIVE_MODE, TX_MODE, RX_MODE, > INACTIVE_MODE, > -+}; > -+ > -+static struct snd_platform_data da850_hawk_snd_data = { > -+ .tx_dma_offset = 0x2000, > -+ .rx_dma_offset = 0x2000, > -+ .op_mode = DAVINCI_MCASP_IIS_MODE, > -+ .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), > -+ .tdm_slots = 2, > -+ .serial_dir = da850_iis_serializer_direction, > -+ .eventq_no = EVENTQ_1, > -+ .version = MCASP_VERSION_2, > -+ .txnumevt = 1, > -+ .rxnumevt = 1, > -+}; > -+ > -+static struct davinci_mcbsp_platform_data da850_mcbsp0_config = { > -+ .inst = 0, > -+}; > -+ > -+static struct davinci_mcbsp_platform_data da850_mcbsp1_config = { > -+ .inst = 1, > -+}; > -+ > -+static int da850_hawk_mmc_get_ro(int index) > -+{ > -+ return gpio_get_value(DA850_HAWK_MMCSD_WP_PIN); > -+} > -+ > -+static int da850_hawk_mmc_get_cd(int index) > -+{ > -+ return !gpio_get_value(DA850_HAWK_MMCSD_CD_PIN); > -+} > -+ > -+static struct davinci_mmc_config da850_mmc_config = { > -+ .get_ro = da850_hawk_mmc_get_ro, > -+ .get_cd = da850_hawk_mmc_get_cd, > -+ .wires = 4, > -+ .max_freq = 50000000, > -+ .caps = MMC_CAP_MMC_HIGHSPEED | > MMC_CAP_SD_HIGHSPEED, > -+ .version = MMC_CTLR_VERSION_2, > -+}; > -+ > -+static int da850_lcd_hw_init(void) > -+{ > -+ void __iomem *cfg_mstpri2_base; > -+ u32 val; > -+ > -+ /* > -+ * Reconfigure the LCDC priority to the highest to ensure that > -+ * the throughput/latency requirements for the LCDC are met. > -+ */ > -+ cfg_mstpri2_base = DA8XX_SYSCFG0_VIRT(DA8XX_MSTPRI2_REG); > -+ > -+ val = __raw_readl(cfg_mstpri2_base); > -+ val &= 0x0fffffff; > -+ __raw_writel(val, cfg_mstpri2_base); > -+ > -+ return 0; > -+} > -+ > -+static int __init da850_hawk_config_emac(void) > -+{ > -+ void __iomem *cfg_chip3_base; > -+ int ret; > -+ u32 val; > -+ struct davinci_soc_info *soc_info = &davinci_soc_info; > -+ > -+ if (!machine_is_omapl138_hawkboard()) > -+ return 0; > -+ > -+ cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); > -+ > -+ val = __raw_readl(cfg_chip3_base); > -+ > -+ val &= ~BIT(8); > -+ ret = da8xx_pinmux_setup(da850_cpgmac_pins); > -+ if (ret) > -+ pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: > %d\n", > -+ ret); > -+ > -+ /* configure the CFGCHIP3 register for MII */ > -+ __raw_writel(val, cfg_chip3_base); > -+ > -+ soc_info->emac_pdata->phy_mask = DA850_HAWK_PHY_MASK; > -+ soc_info->emac_pdata->mdio_max_freq = > DA850_HAWK_MDIO_FREQUENCY; > -+ > -+ ret = da8xx_register_emac(); > -+ if (ret) > -+ pr_warning("da850_hawk_init: emac registration failed: > %d\n", > -+ ret); > -+ > -+ return 0; > -+} > -+device_initcall(da850_hawk_config_emac); > -+ > -+static int da850_setup_vpif_input_channel_mode(int mux_mode) > -+{ > -+ return 0; > -+} > -+ > -+static int da850_vpif_intr_status(void __iomem *vpif_base, int channel) > -+{ > -+ int status = 0; > -+ int mask; > -+ > -+ // TODO - only one channel active on hawk? > -+ if (channel < 0 || channel > 3) > -+ return 0; > -+ > -+ mask = 1 << channel; > -+ status = __raw_readl((vpif_base + VPIF_STATUS)) & mask; > -+ __raw_writel(status, (vpif_base + VPIF_STATUS_CLR)); > -+ > -+ return status; > -+} > -+ > -+/* VPIF capture configuration */ > -+static struct tvp514x_platform_data tvp5146_pdata = { > -+ .clk_polarity = 0, > -+ .hs_polarity = 1, > -+ .vs_polarity = 1 > -+}; > -+ > -+#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) > -+ > -+static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = { > -+ { > -+ .name = TVP5147_CH0, > -+ .board_info = { > -+ I2C_BOARD_INFO("tvp5146", 0x5d), > -+ .platform_data = &tvp5146_pdata, > -+ }, > -+ .input = INPUT_CVBS_VI2B, > -+ .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, > -+ .can_route = 1, > -+ .vpif_if = { > -+ .if_type = VPIF_IF_BT656, > -+ .hd_pol = 1, > -+ .vd_pol = 1, > -+ .fid_pol = 0, > -+ }, > -+ }, > -+}; > -+ > -+static const struct vpif_input da850_ch0_inputs[] = { > -+ { > -+ .input = { > -+ .index = 0, > -+ .name = "Composite", > -+ .type = V4L2_INPUT_TYPE_CAMERA, > -+ .std = TVP514X_STD_ALL, > -+ }, > -+ .subdev_name = TVP5147_CH0, > -+ }, > -+}; > -+ > -+// TODO - V4L2 device creates 2 device nodes for 2 channels - why? > -+// - do we need to set .chan_config[1] to NULL? > -+static struct vpif_capture_config da850_vpif_capture_config = { > -+ .setup_input_channel_mode = > da850_setup_vpif_input_channel_mode, > -+ .intr_status = da850_vpif_intr_status, > -+ .subdev_info = da850_vpif_capture_sdev_info, > -+ .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info), > -+ .chan_config[0] = { > -+ .inputs = da850_ch0_inputs, > -+ .input_count = ARRAY_SIZE(da850_ch0_inputs), > -+ }, > -+ .card_name = "DA850/OMAP-L138 Video Capture", > -+}; > -+ > -+// TODO - fix all these references to _UI > -+ > -+#if defined(CONFIG_DAVINCI_MCBSP0) > -+#define HAS_MCBSP0 1 > -+#else > -+#define HAS_MCBSP0 0 > -+#endif > -+ > -+#if defined(CONFIG_DAVINCI_MCBSP1) > -+#define HAS_MCBSP1 1 > -+#else > -+#define HAS_MCBSP1 0 > -+#endif > -+ > -+#if defined(CONFIG_TI_DAVINCI_EMAC) || \ > -+ defined(CONFIG_TI_DAVINCI_EMAC_MODULE) > -+#define HAS_EMAC 1 > -+#else > -+#define HAS_EMAC 0 > -+#endif > -+ > -+//TODO - fix dependence on _EVM > -+#if defined(CONFIG_SND_DA850_SOC_EVM) || \ > -+ defined(CONFIG_SND_DA850_SOC_EVM_MODULE) > -+#define HAS_MCASP 1 > -+#else > -+#define HAS_MCASP 0 > -+#endif > -+ > -+#if defined(CONFIG_DA850_UI_RMII) && (HAS_EMAC) > -+#define HAS_RMII 1 > -+#else > -+#define HAS_RMII 0 > -+#endif > -+ > -+#if defined(CONFIG_DA850_UI_LCD) && defined(CONFIG_FB_DA8XX) ||\ > -+ defined(CONFIG_FB_DA8XX_MODULE) > -+#define HAS_GLCD 1 > -+#else > -+#define HAS_GLCD 0 > -+#endif > -+ > -+#if defined(CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY) ||\ > -+ defined(CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY_MODULE) > -+#define HAS_VPIF_DISPLAY 1 > -+#else > -+#define HAS_VPIF_DISPLAY 0 > -+#endif > -+ > -+#if defined(CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE) ||\ > -+ defined(CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE_MODULE) > -+#define HAS_VPIF_CAPTURE 1 > -+#else > -+#define HAS_VPIF_CAPTURE 0 > -+#endif > -+ > -+static struct da8xx_ohci_root_hub da850_hawk_usb11_pdata = { > -+}; > -+ > -+static struct musb_hdrc_platform_data usb_hawk_data[] = { > -+ { > -+#ifdef CONFIG_USB_MUSB_OTG > -+ .mode = MUSB_OTG, > -+#elif defined(CONFIG_USB_MUSB_DUAL_ROLE) > -+ .mode = MUSB_DUAL_ROLE, > -+#elif defined(CONFIG_USB_MUSB_PERIPHERAL) > -+ .mode = MUSB_PERIPHERAL, > -+#elif defined(CONFIG_USB_MUSB_HOST) > -+ .mode = MUSB_HOST, > -+#endif > -+ .power = 255, > -+ .potpgt = 8, > -+ .set_vbus = NULL, /* VBUs is directly controlled by the IP */ > -+ } > -+}; > -+ > -+static __init void da850_hawk_usb_init(void) > -+{ > -+ int ret; > -+ u32 cfgchip2; > -+ > -+ /* > -+ * Setup the Ref. clock frequency for the HAWK at 24 MHz. > -+ */ > -+ cfgchip2 = > __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); > -+ cfgchip2 &= ~CFGCHIP2_REFFREQ; > -+ cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; > -+ __raw_writel(cfgchip2, > DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); > -+ > -+ da8xx_usb20_configure(usb_hawk_data, > ARRAY_SIZE(usb_hawk_data)); > -+ > -+ ret = da8xx_register_usb11(&da850_hawk_usb11_pdata); > -+ if (ret) > -+ pr_warning("%s: USB 1.1 registration failed: %d\n", > -+ __func__, ret); > -+} > -+ > -+static struct i2c_gpio_platform_data da850_gpio_i2c_pdata = { > -+ .sda_pin = GPIO_TO_PIN(1, 4), > -+ .scl_pin = GPIO_TO_PIN(1, 5), > -+ .udelay = 2, /* 250 KHz */ > -+}; > -+ > -+static struct platform_device da850_gpio_i2c = { > -+ .name = "i2c-gpio", > -+ .id = 1, > -+ .dev = { > -+ .platform_data = &da850_gpio_i2c_pdata, > -+ }, > -+}; > -+ > -+static __init void da850_hawk_init(void) > -+{ > -+ int ret; > -+ > -+ ret = da8xx_register_edma(); > -+ if (ret) > -+ pr_warning("da850_hawk_init: edma registration failed: > %d\n", > -+ ret); > -+ > -+ // TODO - check safe to enable alongside MMC > -+ ret = da8xx_pinmux_setup(da850_nand_pins); > -+ if (ret) > -+ pr_warning("da850_hawk_init: nand mux setup failed: " > -+ "%d\n", ret); > -+ > -+ platform_add_devices(da850_hawk_devices, > -+ ARRAY_SIZE(da850_hawk_devices)); > -+ > -+ ret = da8xx_pinmux_setup(da850_i2c0_pins); > -+ if (ret) > -+ pr_warning("da850_hawk_init: i2c0 mux setup failed: %d\n", > -+ ret); > -+ > -+ platform_device_register(&da850_gpio_i2c); > -+ > -+ ret = da8xx_register_watchdog(); > -+ if (ret) > -+ pr_warning("da830_hawk_init: watchdog registration failed: > %d\n", > -+ ret); > -+ > -+ if (HAS_MMC) { > -+ ret = da8xx_pinmux_setup(da850_mmcsd0_pins); > -+ if (ret) > -+ pr_warning("da850_hawk_init: mmcsd0 mux setup > failed:" > -+ " %d\n", ret); > -+ > -+ ret = gpio_request(DA850_HAWK_MMCSD_CD_PIN, "MMC > CD\n"); > -+ if (ret) > -+ pr_warning("da850_hawk_init: can not open GPIO > %d\n", > -+ DA850_HAWK_MMCSD_CD_PIN); > -+ gpio_direction_input(DA850_HAWK_MMCSD_CD_PIN); > -+ > -+ ret = gpio_request(DA850_HAWK_MMCSD_WP_PIN, "MMC > WP\n"); > -+ if (ret) > -+ pr_warning("da850_hawk_init: can not open GPIO > %d\n", > -+ DA850_HAWK_MMCSD_WP_PIN); > -+ gpio_direction_input(DA850_HAWK_MMCSD_WP_PIN); > -+ > -+ ret = da8xx_register_mmcsd0(&da850_mmc_config); > -+ if (ret) > -+ pr_warning("da850_hawk_init: mmcsd0 registration > failed:" > -+ " %d\n", ret); > -+ } > -+ > -+ davinci_serial_init(&da850_hawk_uart_config); > -+ > -+ i2c_register_board_info(1, da850_hawk_i2c_devices, > -+ ARRAY_SIZE(da850_hawk_i2c_devices)); > -+ > -+ /* > -+ * shut down uart 0 and 1; they are not used on the board and > -+ * accessing them causes endless "too much work in irq53" messages > -+ * with arago fs > -+ */ > -+ __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); > -+ __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); > -+ > -+ if (HAS_MCBSP0) { > -+ if (HAS_EMAC) > -+ pr_warning("WARNING: both MCBSP0 and EMAC are " > -+ "enabled, but they share pins.\n" > -+ "\tDisable one of them.\n"); > -+ > -+ ret = da8xx_pinmux_setup(da850_mcbsp0_pins); > -+ if (ret) > -+ pr_warning("da850_hawk_init: mcbsp0 mux setup > failed:" > -+ " %d\n", ret); > -+ > -+ ret = da850_init_mcbsp(&da850_mcbsp0_config); > -+ if (ret) > -+ pr_warning("da850_hawk_init: mcbsp0 registration" > -+ "failed: %d\n", ret); > -+ } > -+ > -+ if (HAS_MCBSP1) { > -+ ret = da8xx_pinmux_setup(da850_mcbsp1_pins); > -+ if (ret) > -+ pr_warning("da850_hawl_init: mcbsp1 mux setup > failed:" > -+ " %d\n", ret); > -+ > -+ ret = da850_init_mcbsp(&da850_mcbsp1_config); > -+ if (ret) > -+ pr_warning("da850_hawk_init: mcbsp1 registration" > -+ " failed: %d\n", ret); > -+ } > -+ > -+ if (HAS_MCASP) { > -+ if ((HAS_MCBSP0 || HAS_MCBSP1)) > -+ pr_warning("WARNING: both McASP and McBSP are > enabled, " > -+ "but they share pins.\n" > -+ "\tDisable one of them.\n"); > -+ > -+ ret = da8xx_pinmux_setup(da850_mcasp_pins); > -+ if (ret) > -+ pr_warning("da850_hawk_init: mcasp mux setup > failed:" > -+ "%d\n", ret); > -+ > -+ da8xx_register_mcasp(0, &da850_hawk_snd_data); > -+ } > -+ > -+ ret = da8xx_pinmux_setup(da850_lcdcntl_pins); > -+ if (ret) > -+ pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", > -+ ret); > -+ > -+ ret = da850_lcd_hw_init(); > -+ if (ret) > -+ pr_warning("da850_hawk_init: lcd initialization failed: %d\n", > -+ ret); > -+ > -+ ret = da8xx_register_lcdc(&vga_monitor_pdata); > -+ if (ret) > -+ pr_warning("da850_hawk_init: lcdc registration failed: %d\n", > -+ ret); > -+ > -+ // Default hawkboard doesn't have RTC battery - so > CONFIG_RTC_DRV_OMAP > -+ // should be disabled by default > -+ ret = da8xx_register_rtc(); > -+ if (ret) > -+ pr_warning("da850_hawk_init: rtc setup failed: %d\n", ret); > -+ > -+ // Generic da850(.c) CPUFREQ support ok as long as > CONFIG_REGULATOR disabled > -+ ret = da850_register_cpufreq(); > -+ if (ret) > -+ pr_warning("da850_hawk_init: cpufreq registration failed: > %d\n", > -+ ret); > -+ > -+ ret = da8xx_register_cpuidle(); > -+ if (ret) > -+ pr_warning("da850_hawk_init: cpuidle registration failed: > %d\n", > -+ ret); > -+ > -+ // Wake-Up relies upon RTC (which requires battery fitted > -+ ret = da850_register_pm(&da850_pm_device); > -+ if (ret) > -+ pr_warning("da850_hawk_init: suspend registration failed: > %d\n", > -+ ret); > -+ > -+ da850_hawk_usb_init(); > -+ > -+ ret = da8xx_register_sata(); > -+ if (ret) > -+ pr_warning("da850_hawk_init: SATA registration failed: > %d\n", > -+ ret); > -+ > -+ ret = da850_register_vpif(); > -+ if (ret) > -+ pr_warning("da850_hawk_init: VPIF registration failed: " > -+ "%d\n", ret); > -+ > -+ ret = da8xx_pinmux_setup(da850_vpif_capture_pins); > -+ if (ret) > -+ pr_warning("da850_hawk_init: vpif capture mux failed: " > -+ "%d\n", ret); > -+ > -+ ret = da850_register_vpif_capture(&da850_vpif_capture_config); > -+ if (ret) > -+ pr_warning("da850_hawk_init: VPIF registration failed: " > -+ "%d\n", ret); > -+} > -+ > -+#ifdef CONFIG_SERIAL_8250_CONSOLE > -+static int __init da850_hawk_console_init(void) > -+{ > -+ return add_preferred_console("ttyS", 2, "115200"); > -+} > -+console_initcall(da850_hawk_console_init); > -+#endif > -+ > -+static __init void da850_hawk_irq_init(void) > -+{ > -+ struct davinci_soc_info *soc_info = &davinci_soc_info; > -+ > -+ cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, > DA850_N_CP_INTC_IRQ, > -+ soc_info->intc_irq_prios); > -+} > -+ > -+static void __init da850_hawk_map_io(void) > -+{ > -+ da850_init(); > -+} > -+ > -+MACHINE_START(OMAPL138_HAWKBOARD, "DaVinci DA850/OMAP- > L138/AM18xx Hawkboard(.org)") > -+ .phys_io = IO_PHYS, > -+ .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, > -+ .boot_params = (DA8XX_DDR_BASE + 0x100), > -+ .map_io = da850_hawk_map_io, > -+ .init_irq = da850_hawk_irq_init, > -+ .timer = &davinci_timer, > -+ .init_machine = da850_hawk_init, > -+MACHINE_END > -diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c > -index cfecd3c..a32c636 100755 > ---- a/arch/arm/mach-davinci/da850.c > -+++ b/arch/arm/mach-davinci/da850.c > -@@ -720,7 +720,7 @@ const short da850_rmii_pins[] __initdata = { > - const short da850_mcasp_pins[] __initdata = { > - DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, > - DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, > -- DA850_AXR_11, DA850_AXR_12, > -+ DA850_AXR_11, DA850_AXR_12, DA850_AXR_13, DA850_AXR_14, > - -1 > - }; > - > -diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach- > davinci/devices-da8xx.c > -index 0842590..97a4611 100755 > ---- a/arch/arm/mach-davinci/devices-da8xx.c > -+++ b/arch/arm/mach-davinci/devices-da8xx.c > -@@ -560,6 +560,12 @@ struct da8xx_lcdc_platform_data > sharp_lk043t1dg01_pdata = { > - .type = "Sharp_LK043T1DG01", > - }; > - > -+struct da8xx_lcdc_platform_data vga_monitor_pdata = { > -+ .manu_name = "vga_mon", > -+ .controller_data = &lcd_cfg, > -+ .type = "VGA_Monitor", > -+}; > -+ > - #if !defined(CONFIG_FB_DA8XX) && !defined(CONFIG_FB_DA8XX_MODULE) > - static struct da8xx_clcd_platform_data da8xx_evm_clcd_pdata = { > - .version = CONFIG_SPACE_1, > -@@ -664,9 +670,11 @@ int da8xx_register_rtc(void) > - { > - int ret; > - > -+#ifdef CONFIG_RTC_DRV_OMAP > - /* Unlock the rtc's registers */ > - __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); > - __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); > -+#endif > - > - ret = platform_device_register(&da8xx_rtc_device); > - if (!ret) > -diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach- > davinci/include/mach/da8xx.h > -index f76433f..c39b5b0 100755 > ---- a/arch/arm/mach-davinci/include/mach/da8xx.h > -+++ b/arch/arm/mach-davinci/include/mach/da8xx.h > -@@ -168,6 +168,8 @@ extern struct platform_device da8xx_serial_device; > - extern struct emac_platform_data da8xx_emac_pdata; > - extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; > - extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; > -+extern struct da8xx_lcdc_platform_data vga_monitor_pdata; > -+ > - void da8xx_usb20_configure(struct musb_hdrc_platform_data *pdata, u8 > num_inst); > - > - extern const short da830_emif25_pins[]; > -diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S > b/arch/arm/mach-davinci/include/mach/debug-macro.S > -index 17ab523..f04c481 100644 > ---- a/arch/arm/mach-davinci/include/mach/debug-macro.S > -+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S > -@@ -27,7 +27,8 @@ > - #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && > defined(CONFIG_ARCH_DAVINCI_DMx) > - #error Cannot enable DaVinci and DA8XX platforms concurrently > - #elif defined(CONFIG_MACH_DAVINCI_DA830_EVM) || \ > -- defined(CONFIG_MACH_DAVINCI_DA850_EVM) > -+ defined(CONFIG_MACH_DAVINCI_DA850_EVM) || \ > -+ defined(CONFIG_MACH_OMAPL138_HAWKBOARD) > - orr \rx, \rx, #0x00d00000 @ physical base address > - orr \rx, \rx, #0x0000d000 @ of UART 2 > - #else > -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig > -index d0db690..ea91489 100644 > ---- a/drivers/media/video/Kconfig > -+++ b/drivers/media/video/Kconfig > -@@ -513,11 +513,11 @@ config VIDEO_DAVINCI_VPIF_DISPLAY > - > - config VIDEO_DAVINCI_VPIF_CAPTURE > - tristate "DaVinci Video VPIF Capture" > -- depends on VIDEO_DEV && (MACH_DAVINCI_DM6467_EVM || > MACH_DAVINCI_DA850_EVM) > -+ depends on VIDEO_DEV && (MACH_DAVINCI_DM6467_EVM || > MACH_DAVINCI_DA850_EVM || MACH_OMAPL138_HAWKBOARD) > - select VIDEOBUF_DMA_CONTIG > - select VIDEO_DAVINCI_VPIF > - help > -- Support for DaVinci VPIF Capture on DM6467 EVM and/or > DA850/OMAP-L138/AM18xx EVM. > -+ Support for DaVinci VPIF Capture on DM6467 EVM and/or > DA850/OMAP-L138/AM18xx EVM/Hawkboard. > - > - To compile this driver as a module, choose M here: the > - module will be called vpif_capture. > -diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c > -index faa1fd3..d416923 100644 > ---- a/drivers/video/da8xx-fb.c > -+++ b/drivers/video/da8xx-fb.c > -@@ -196,6 +196,20 @@ static struct da8xx_panel known_lcd_panels[] = { > - .pxl_clk = 7833600, > - .invert_pxl_clk = 0, > - }, > -+ /* CRT Monitor or LCD Screen */ > -+ [2] = { > -+ .name = "VGA_Monitor", > -+ .width = 640, > -+ .height = 480, > -+ .hfp = 48, > -+ .hbp = 48, > -+ .hsw = 63, > -+ .vfp = 11, > -+ .vbp = 31, > -+ .vsw = 1, > -+ .pxl_clk = 25000000, > -+ .invert_pxl_clk = 1, > -+ }, > - }; > - > - /* Enable the Raster Engine of the LCD Controller */ > -diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig > -index 62dab95..8b34b5b 100644 > ---- a/sound/soc/davinci/Kconfig > -+++ b/sound/soc/davinci/Kconfig > -@@ -53,11 +53,11 @@ config SND_DA830_SOC_EVM > - DA830/OMAP-L137/AM17xx EVM > - > - config SND_DA850_SOC_EVM > -- tristate "SoC Audio support for DA850/OMAP-L138/AM18xx EVM" > -- depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA850_EVM > -+ tristate "SoC Audio support for DA850/OMAP-L138/AM18xx EVM / > Hawkboard" > -+ depends on SND_DAVINCI_SOC && (MACH_DAVINCI_DA850_EVM || > MACH_OMAPL138_HAWKBOARD) > - select SND_DAVINCI_SOC_MCASP > - select SND_SOC_TLV320AIC3X > - help > - Say Y if you want to add support for SoC audio on TI > -- DA850/OMAP-L138/AM18xx EVM > -+ DA850/OMAP-L138/AM18xx EVM/Hawkboard > - > -diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci- > evm.c > -index 7ccbe66..a7594b8 100644 > ---- a/sound/soc/davinci/davinci-evm.c > -+++ b/sound/soc/davinci/davinci-evm.c > -@@ -57,7 +57,8 @@ static int evm_hw_params(struct snd_pcm_substream > *substream, > - sysclk = 12288000; > - > - else if (machine_is_davinci_da830_evm() || > -- machine_is_davinci_da850_evm()) > -+ machine_is_davinci_da850_evm() || > -+ machine_is_omapl138_hawkboard() ) > - sysclk = 24576000; > - > - else > -@@ -256,7 +257,7 @@ static int __init evm_init(void) > - } else if (machine_is_davinci_da830_evm()) { > - evm_snd_dev_data = &da830_evm_snd_devdata; > - index = 1; > -- } else if (machine_is_davinci_da850_evm()) { > -+ } else if (machine_is_davinci_da850_evm() || > machine_is_omapl138_hawkboard()) { > - evm_snd_dev_data = &da850_evm_snd_devdata; > - index = 0; > - } else > --- > -1.6.0.6 > - > diff --git a/recipes-kernel/linux/linux-davinci/omapl138/0001-board-da850- > evm-Disable-NAND-SUBPAGE.patch b/recipes-kernel/linux/linux- > davinci/omapl138/0001-board-da850-evm-Disable-NAND-SUBPAGE.patch > deleted file mode 100644 > index 3653bdf..0000000 > --- a/recipes-kernel/linux/linux-davinci/omapl138/0001-board-da850-evm- > Disable-NAND-SUBPAGE.patch > +++ /dev/null > @@ -1,29 +0,0 @@ > -From 2ee9f2c655710d9e60a5a9b49871edc316e5363d Mon Sep 17 00:00:00 > 2001 > -From: Roger Monk <r-monk@ti.com> > -Date: Wed, 25 Aug 2010 17:29:14 +0100 > -Subject: [PATCH] board-da850-evm: Disable NAND SUBPAGE > - > - * This was causing issues with UBI > - * Solution/Workaround identified by Caglar Akyuz - now applied locally to > board file > - > -Signed-off-by: Roger Monk <r-monk@ti.com> > ---- > - arch/arm/mach-davinci/board-da850-evm.c | 2 +- > - 1 files changed, 1 insertions(+), 1 deletions(-) > - > -diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach- > davinci/board-da850-evm.c > -index cfed439..502b914 100755 > ---- a/arch/arm/mach-davinci/board-da850-evm.c > -+++ b/arch/arm/mach-davinci/board-da850-evm.c > -@@ -187,7 +187,7 @@ static struct davinci_nand_pdata > da850_evm_nandflash_data = { > - .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), > - .ecc_mode = NAND_ECC_HW, > - .ecc_bits = 4, > -- .options = NAND_USE_FLASH_BBT, > -+ .options = NAND_USE_FLASH_BBT | > NAND_NO_SUBPAGE_WRITE, > - .timing = &da850_evm_nandflash_timing, > - }; > - > --- > -1.6.0.4 > - > diff --git a/recipes-kernel/linux/linux-davinci/omapl138/0001-uio_pruss1-Core- > driver-addition.patch b/recipes-kernel/linux/linux-davinci/omapl138/0001- > uio_pruss1-Core-driver-addition.patch > deleted file mode 100755 > index 389097f..0000000 > --- a/recipes-kernel/linux/linux-davinci/omapl138/0001-uio_pruss1-Core- > driver-addition.patch > +++ /dev/null > @@ -1,334 +0,0 @@ > -From: Melissa Watkins <m-watkins@ti.com> > -Date: Wed, 24 Nov 2010 02:59:34 -0600 > -Subject: [PATCH 1/3] uio_pruss1: Core driver addition > - > -This patch adds the uio_pru driver and updates the uio Makefile > - and Kconfig files to support this driver. The uio_pru driver provides > -a framework for handling the PRU in the user space and is responsible > -for the device setup and the primary interrupt handling. > - > -Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com> > -Signed-off-by: Melissa Watkins <m-watkins@ti.com> > ---- > - drivers/uio/Kconfig | 10 ++ > - drivers/uio/Makefile | 1 + > - drivers/uio/uio_pru.c | 279 > +++++++++++++++++++++++++++++++++++++++++++++++++ > - 3 files changed, 290 insertions(+), 0 deletions(-) > - create mode 100644 drivers/uio/uio_pru.c > - > -diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig > -index 8aa1955..8ae8280 100644 > ---- a/drivers/uio/Kconfig > -+++ b/drivers/uio/Kconfig > -@@ -94,4 +94,14 @@ config UIO_PCI_GENERIC > - primarily, for virtualization scenarios. > - If you compile this as a module, it will be called uio_pci_generic. > - > -+config UIO_PRUSS > -+ tristate "Texas Instruments PRUSS driver" > -+ depends on ARCH_DAVINCI_DA850 > -+ default n > -+ help > -+ PRUSS driver for OMAPL13X/DA8XX/AM17XX/AM18XX devices > -+ PRUSS driver requires user space components > -+ To compile this driver as a module, choose M here: the module > -+ will be called uio_pruss. > -+ > - endif > -diff --git a/drivers/uio/Makefile b/drivers/uio/Makefile > -index 73b2e75..e6d8adb 100644 > ---- a/drivers/uio/Makefile > -+++ b/drivers/uio/Makefile > -@@ -6,3 +6,4 @@ obj-$(CONFIG_UIO_SMX) += uio_smx.o > - obj-$(CONFIG_UIO_AEC) += uio_aec.o > - obj-$(CONFIG_UIO_SERCOS3) += uio_sercos3.o > - obj-$(CONFIG_UIO_PCI_GENERIC) += uio_pci_generic.o > -+obj-$(CONFIG_UIO_PRUSS) += uio_pru.o > -diff --git a/drivers/uio/uio_pru.c b/drivers/uio/uio_pru.c > -new file mode 100644 > -index 0000000..82dc35e > ---- /dev/null > -+++ b/drivers/uio/uio_pru.c > -@@ -0,0 +1,279 @@ > -+/* > -+ * UIO TI Programmable Real-Time Unit (PRU) driver. > -+ * > -+ * (C) 2010 Amit Chatterjee <amit.chatterjee@ti.com> > -+ * > -+ * Copyright (C) {YEAR} Texas Instruments Incorporated - http://www.ti.com/ > -+ * > -+ * This program is free software; you can redistribute it and/or > -+ * modify it under the terms of the GNU General Public License as > -+ * published by the Free Software Foundation version 2. > -+ * > -+ * This program is distributed .as is. WITHOUT ANY WARRANTY of any > -+ * kind, whether express or implied; without even the implied warranty > -+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > -+ * GNU General Public License for more details. > -+ */ > -+ > -+#include <linux/device.h> > -+#include <linux/module.h> > -+#include <linux/platform_device.h> > -+#include <linux/uio_driver.h> > -+#include <linux/io.h> > -+#include <linux/clk.h> > -+#include <linux/dma-mapping.h> > -+ > -+#define DRV_NAME "pruss" > -+#define DRV_VERSION "0.01" > -+ > -+/* > -+0x01C30000 - 0x01C301FF Data RAM 0 > -+0x01C30200 - 0x01C31FFF Reserved > -+0x01C32000 - 0x01C321FF Data RAM 1 > -+0x01C32200 - 0x01C33FFF Reserved > -+0x01C34000 - 0x01C36FFF INTC Registers > -+0x01C37000 - 0x01C373FF PRU0 Control Registers > -+0x01C37400 - 0x01C377FF PRU0 Debug Registers > -+0x01C37800 - 0x01C37BFF PRU1 Control Registers > -+0x01C37C00 - 0x01C37FFF PRU1 Debug Registers > -+0x01C38000 - 0x01C38FFF PRU0 Instruction RAM > -+0x01C39000 - 0x01C3BFFF Reserved > -+0x01C3C000 - 0x01C3CFFF PRU1 Instruction RAM > -+0x01C3D000 - 0x01C3FFFF Reserved > -+*/ > -+/* > -+ * 3 PRU_EVTOUT0 PRUSS Interrupt > -+ * 4 PRU_EVTOUT1 PRUSS Interrupt > -+ * 5 PRU_EVTOUT2 PRUSS Interrupt > -+ * 6 PRU_EVTOUT3 PRUSS Interrupt > -+ * 7 PRU_EVTOUT4 PRUSS Interrupt > -+ * 8 PRU_EVTOUT5 PRUSS Interrupt > -+ * 9 PRU_EVTOUT6 PRUSS Interrupt > -+ * 10 PRU_EVTOUT7 PRUSS Interrupt > -+*/ > -+ > -+#define PRUSS_INSTANCE (8) > -+ > -+static struct clk *pruss_clk = NULL, *ecap0_clk = NULL; > -+static struct uio_info *info[PRUSS_INSTANCE]; > -+static void *ddr_virt_addr; > -+static dma_addr_t ddr_phy_addr; > -+ > -+ > -+ > -+static irqreturn_t pruss_handler(int irq, struct uio_info *dev_info) > -+{ > -+ return IRQ_HANDLED; > -+} > -+ > -+static int __devinit pruss_probe(struct platform_device *dev) > -+{ > -+ int ret = -ENODEV; > -+ int count = 0; > -+ struct resource *regs_pruram, *regs_l3ram, *regs_ddr; > -+ char *string; > -+ > -+ /* Power on PRU in case its not done as part of boot-loader */ > -+ pruss_clk = clk_get(&dev->dev, "pruss"); > -+ if (IS_ERR(pruss_clk)) { > -+ dev_err(&dev->dev, "no pruss clock available\n"); > -+ ret = PTR_ERR(pruss_clk); > -+ pruss_clk = NULL; > -+ return ret; > -+ } else { > -+ clk_enable (pruss_clk); > -+ } > -+ > -+ ecap0_clk = clk_get(&dev->dev, "ecap0"); > -+ if (IS_ERR(ecap0_clk)) { > -+ dev_err(&dev->dev, "no ecap0 clock available\n"); > -+ ret = PTR_ERR(ecap0_clk); > -+ ecap0_clk = NULL; > -+ return ret; > -+ } else { > -+ clk_enable(ecap0_clk); > -+ } > -+ > -+ > -+ > -+ for (count = 0; count < PRUSS_INSTANCE; count++) { > -+ info[count] = (struct uio_info *)kzalloc(sizeof(struct uio_info), > GFP_KERNEL); > -+ if (!info[count]) > -+ return -ENOMEM; > -+ > -+ } > -+ > -+ regs_pruram = platform_get_resource(dev, IORESOURCE_MEM, 0); > -+ if (!regs_pruram) { > -+ dev_err(&dev->dev, "No memory resource specified\n"); > -+ goto out_free; > -+ } > -+ > -+ regs_l3ram = platform_get_resource(dev, IORESOURCE_MEM, 1); > -+ if (!regs_l3ram) { > -+ dev_err(&dev->dev, "No memory resource specified\n"); > -+ goto out_free; > -+ } > -+ > -+ regs_ddr = platform_get_resource(dev, IORESOURCE_MEM, 2); > -+ if (!regs_ddr) { > -+ dev_err(&dev->dev, "No memory resource specified\n"); > -+ goto out_free; > -+ } > -+ ddr_virt_addr = dma_alloc_coherent(&dev->dev, regs_ddr->end- > regs_ddr->start+1, &ddr_phy_addr, GFP_KERNEL|GFP_DMA); > -+ > -+ > -+ for (count = 0; count < PRUSS_INSTANCE; count++) { > -+ info[count]->mem[0].addr = regs_pruram->start; > -+ if (!info[count]->mem[0].addr) { > -+ dev_err(&dev->dev, "Invalid memory resource\n"); > -+ break; > -+ } > -+ > -+ info[count]->mem[0].size = regs_pruram->end - regs_pruram- > >start + 1; > -+ info[count]->mem[0].internal_addr = ioremap(regs_pruram- > >start, info[count]->mem[0].size); > -+ > -+ if (!info[count]->mem[0].internal_addr) { > -+ dev_err(&dev->dev, "Can't remap memory address > range\n"); > -+ break; > -+ } > -+ info[count]->mem[0].memtype = UIO_MEM_PHYS; > -+ > -+ > -+ info[count]->mem[1].addr = regs_l3ram->start; > -+ if (!info[count]->mem[1].addr) { > -+ dev_err(&dev->dev, "Invalid memory resource\n"); > -+ break; > -+ } > -+ > -+ info[count]->mem[1].size = regs_l3ram->end - regs_l3ram- > >start + 1; > -+ info[count]->mem[1].internal_addr = ioremap(regs_l3ram- > >start, info[count]->mem[1].size); > -+ > -+ if (!info[count]->mem[1].internal_addr) { > -+ dev_err(&dev->dev, "Can't remap memory address > range\n"); > -+ break; > -+ } > -+ info[count]->mem[1].memtype = UIO_MEM_PHYS; > -+ > -+ > -+ info[count]->mem[2].size = regs_ddr->end - regs_ddr->start + > 1; > -+ if (!(info[count]->mem[2].size-1)) { > -+ dev_err(&dev->dev, "Invalid memory resource\n"); > -+ break; > -+ } > -+ > -+ > -+ info[count]->mem[2].internal_addr = ddr_virt_addr; > -+ > -+ if (!info[count]->mem[2].internal_addr) { > -+ dev_err(&dev->dev, "Can't remap memory address > range\n"); > -+ break; > -+ } > -+ info[count]->mem[2].addr = ddr_phy_addr; > -+ info[count]->mem[2].memtype = UIO_MEM_PHYS; > -+ > -+ > -+ string = kzalloc(20, GFP_KERNEL); > -+ sprintf(string, "pruss_evt%d", count); > -+ info[count]->name = string; > -+ info[count]->version = "0.01"; > -+ > -+ /* Register PRUSS IRQ lines */ > -+ info[count]->irq = IRQ_DA8XX_EVTOUT0+count; > -+ > -+ info[count]->irq_flags = IRQF_SHARED; > -+ info[count]->handler = pruss_handler; > -+ > -+ ret = uio_register_device(&dev->dev, info[count]); > -+ > -+ if (ret < 0) > -+ break; > -+ } > -+ > -+ platform_set_drvdata(dev, info); > -+ > -+ if (ret < 0) { > -+ if (ddr_virt_addr) > -+ dma_free_coherent(&dev->dev, regs_ddr->end - > regs_ddr->start + 1, ddr_virt_addr, ddr_phy_addr); > -+ while (count--) { > -+ uio_unregister_device(info[count]); > -+ if (info[count]->name) > -+ kfree(info[count]->name); > -+ iounmap(info[count]->mem[0].internal_addr); > -+ } > -+ } else { > -+ return 0; > -+ } > -+ > -+out_free: > -+ for (count = 0; count < PRUSS_INSTANCE; count++) { > -+ if (info[count]) > -+ kfree(info[count]); > -+ } > -+ > -+ if (pruss_clk != NULL) > -+ clk_put(pruss_clk); > -+ if (ecap0_clk != NULL) > -+ clk_put(ecap0_clk); > -+ > -+ return ret; > -+} > -+ > -+static int __devexit pruss_remove(struct platform_device *dev) > -+{ > -+ int count = 0; > -+ struct uio_info **info; > -+ > -+ info = (struct uio_info **)platform_get_drvdata(dev); > -+ > -+ for (count = 0; count < PRUSS_INSTANCE; count++) { > -+ uio_unregister_device(info[count]); > -+ if (info[count]->name) > -+ kfree(info[count]->name); > -+ > -+ } > -+ iounmap(info[0]->mem[0].internal_addr); > -+ iounmap(info[0]->mem[1].internal_addr); > -+ if (ddr_virt_addr) > -+ dma_free_coherent(&dev->dev, info[0]->mem[2].size, info[0]- > >mem[2].internal_addr, info[0]->mem[2].addr); > -+ > -+ for (count = 0; count < PRUSS_INSTANCE; count++) { > -+ if (info[count]) > -+ kfree(info[count]); > -+ } > -+ > -+ platform_set_drvdata(dev, NULL); > -+ > -+ if (pruss_clk != NULL) > -+ clk_put(pruss_clk); > -+ if (ecap0_clk != NULL) > -+ clk_put(ecap0_clk); > -+ > -+ > -+ return 0; > -+} > -+ > -+static struct platform_driver pruss_driver = { > -+ .probe = pruss_probe, > -+ .remove = __devexit_p(pruss_remove), > -+ .driver = { > -+ .name = DRV_NAME, > -+ .owner = THIS_MODULE, > -+ }, > -+}; > -+ > -+static int __init pruss_init_module(void) > -+{ > -+ return platform_driver_register(&pruss_driver); > -+} > -+module_init(pruss_init_module); > -+ > -+static void __exit pruss_exit_module(void) > -+{ > -+ platform_driver_unregister(&pruss_driver); > -+} > -+module_exit(pruss_exit_module); > -+ > -+MODULE_LICENSE("GPL v2"); > -+MODULE_VERSION(DRV_VERSION); > -+MODULE_AUTHOR("Amit Chatterjee <amit.chatterjee@ti.com>"); > --- > -1.7.0.4 > - > diff --git a/recipes-kernel/linux/linux-davinci/omapl138/0002-uio_pruss2- > Platform-changes.patch b/recipes-kernel/linux/linux-davinci/omapl138/0002- > uio_pruss2-Platform-changes.patch > deleted file mode 100755 > index d913209..0000000 > --- a/recipes-kernel/linux/linux-davinci/omapl138/0002-uio_pruss2-Platform- > changes.patch > +++ /dev/null > @@ -1,243 +0,0 @@ > -From: Melissa Watkins <m-watkins@ti.com> > -Date: Wed, 24 Nov 2010 04:18:07 -0600 > -Subject: [PATCH 2/3] uio_pruss2: Platform changes > - > -Adding resources supporting the uio_pru driver within the > -da850 (omapl138) device. > - > -Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com> > -Signed-off-by: Melissa Watkins <m-watkins@ti.com> > ---- > - arch/arm/configs/da850_omapl138_defconfig | 8 +++- > - arch/arm/mach-davinci/board-da850-evm.c | 3 + > - arch/arm/mach-davinci/da850.c | 38 +++++++++++++- > - arch/arm/mach-davinci/devices-da8xx.c | 75 > ++++++++++++++++++++++++++++ > - arch/arm/mach-davinci/include/mach/da8xx.h | 3 + > - 5 files changed, 124 insertions(+), 3 deletions(-) > - > -diff --git a/arch/arm/configs/da850_omapl138_defconfig > b/arch/arm/configs/da850_omapl138_defconfig > -index b312050..baebec8 100644 > ---- a/arch/arm/configs/da850_omapl138_defconfig > -+++ b/arch/arm/configs/da850_omapl138_defconfig > -@@ -1361,6 +1361,7 @@ CONFIG_USB_MUSB_HDRC=y > - CONFIG_USB_MUSB_SOC=y > - CONFIG_USB_MUSB_HOST=y > - # CONFIG_USB_MUSB_PERIPHERAL is not set > -+# CONFIG_USB_MUSB_DUAL_ROLE is not set > - # CONFIG_USB_MUSB_OTG is not set > - CONFIG_USB_MUSB_HDRC_HCD=y > - # CONFIG_MUSB_PIO_ONLY is not set > -@@ -1535,7 +1536,12 @@ CONFIG_RTC_INTF_DEV=y > - CONFIG_RTC_DRV_OMAP=y > - # CONFIG_DMADEVICES is not set > - # CONFIG_AUXDISPLAY is not set > --# CONFIG_UIO is not set > -+CONFIG_UIO=y > -+# CONFIG_UIO_PDRV is not set > -+# CONFIG_UIO_PDRV_GENIRQ is not set > -+# CONFIG_UIO_SMX is not set > -+# CONFIG_UIO_SERCOS3 is not set > -+CONFIG_UIO_PRUSS=m > - > - # > - # TI VLYNQ > -diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach- > davinci/board-da850-evm.c > -index 009e9b5..1687c7c 100755 > ---- a/arch/arm/mach-davinci/board-da850-evm.c > -+++ b/arch/arm/mach-davinci/board-da850-evm.c > -@@ -1070,6 +1070,9 @@ static __init void da850_evm_init(void) > - > - platform_device_register(&da850_gpio_i2c); > - > -+ /* Register PRUSS device */ > -+ da8xx_register_pruss(); > -+ > - ret = da8xx_register_watchdog(); > - if (ret) > - pr_warning("da830_evm_init: watchdog registration failed: > %d\n", > -diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c > -index 513ae85..8bd1919 100755 > ---- a/arch/arm/mach-davinci/da850.c > -+++ b/arch/arm/mach-davinci/da850.c > -@@ -237,6 +237,13 @@ static struct clk tptc2_clk = { > - .flags = ALWAYS_ENABLED, > - }; > - > -+static struct clk pruss_clk = { > -+ .name = "pruss", > -+ .parent = &pll0_sysclk2, > -+ .lpsc = DA8XX_LPSC0_DMAX, > -+ .flags = ALWAYS_ENABLED, > -+}; > -+ > - static struct clk uart0_clk = { > - .name = "uart0", > - .parent = &pll0_sysclk2, > -@@ -385,13 +392,37 @@ static struct clk usb20_clk = { > - .gpsc = 1, > - }; > - > -- > - static struct clk sata_clk = { > - .name = "ahci", > - .parent = &pll0_sysclk2, > - .lpsc = DA850_LPSC1_SATA, > - .gpsc = 1, > - }; > -+ > -+static struct clk ecap0_clk = { > -+ .name = "ecap0", > -+ .parent = &pll0_sysclk2, > -+ .lpsc = DA8XX_LPSC1_ECAP, > -+ .flags = DA850_CLK_ASYNC3, > -+ .gpsc = 1, > -+}; > -+ > -+static struct clk ecap1_clk = { > -+ .name = "ecap1", > -+ .parent = &pll0_sysclk2, > -+ .lpsc = DA8XX_LPSC1_ECAP, > -+ .flags = DA850_CLK_ASYNC3, > -+ .gpsc = 1, > -+}; > -+ > -+static struct clk ecap2_clk = { > -+ .name = "ecap2", > -+ .parent = &pll0_sysclk2, > -+ .lpsc = DA8XX_LPSC1_ECAP, > -+ .flags = DA850_CLK_ASYNC3, > -+ .gpsc = 1, > -+}; > -+ > - static struct clk_lookup da850_clks[] = { > - CLK(NULL, "ref", &ref_clk), > - CLK(NULL, "pll0", &pll0_clk), > -@@ -419,6 +450,7 @@ static struct clk_lookup da850_clks[] = { > - CLK(NULL, "tptc1", &tptc1_clk), > - CLK(NULL, "tpcc1", &tpcc1_clk), > - CLK(NULL, "tptc2", &tptc2_clk), > -+ CLK(NULL, "pruss", &pruss_clk), > - CLK(NULL, "uart0", &uart0_clk), > - CLK(NULL, "uart1", &uart1_clk), > - CLK(NULL, "uart2", &uart2_clk), > -@@ -441,7 +473,9 @@ static struct clk_lookup da850_clks[] = { > - CLK(NULL, "usb11", &usb11_clk), > - CLK(NULL, "usb20", &usb20_clk), > - CLK(NULL, "ahci", &sata_clk), > -- > -+ CLK(NULL, "ecap0", &ecap0_clk), > -+ CLK(NULL, "ecap1", &ecap1_clk), > -+ CLK(NULL, "ecap2", &ecap2_clk), > - CLK(NULL, NULL, NULL), > - }; > - > -diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach- > davinci/devices-da8xx.c > -index 0842590..94979b3 100755 > ---- a/arch/arm/mach-davinci/devices-da8xx.c > -+++ b/arch/arm/mach-davinci/devices-da8xx.c > -@@ -972,6 +972,81 @@ int __init da8xx_register_sata(void) > - return platform_device_register(&da850_ahci_device); > - } > - > -+static struct resource pruss_resources[] = { > -+ [0] = { > -+ .start = DA8XX_PRUSS_BASE, > -+ .end = DA8XX_PRUSS_BASE + SZ_64K - 1, > -+ .flags = IORESOURCE_MEM, > -+ }, > -+ [1] = { > -+ .start = DA8XX_L3RAM_BASE, > -+ .end = DA8XX_L3RAM_BASE + SZ_128K - 1, > -+ .flags = IORESOURCE_MEM, > -+ }, > -+ [2] = { > -+ .start = 0, > -+ .end = SZ_256K - 1, > -+ .flags = IORESOURCE_MEM, > -+ }, > -+ > -+ [3] = { > -+ .start = IRQ_DA8XX_EVTOUT0, > -+ .end = IRQ_DA8XX_EVTOUT0, > -+ .flags = IORESOURCE_IRQ, > -+ }, > -+ [4] = { > -+ .start = IRQ_DA8XX_EVTOUT1, > -+ .end = IRQ_DA8XX_EVTOUT1, > -+ .flags = IORESOURCE_IRQ, > -+ }, > -+ [5] = { > -+ .start = IRQ_DA8XX_EVTOUT2, > -+ .end = IRQ_DA8XX_EVTOUT2, > -+ .flags = IORESOURCE_IRQ, > -+ }, > -+ [6] = { > -+ .start = IRQ_DA8XX_EVTOUT3, > -+ .end = IRQ_DA8XX_EVTOUT3, > -+ .flags = IORESOURCE_IRQ, > -+ }, > -+ [7] = { > -+ .start = IRQ_DA8XX_EVTOUT4, > -+ .end = IRQ_DA8XX_EVTOUT4, > -+ .flags = IORESOURCE_IRQ, > -+ }, > -+ [8] = { > -+ .start = IRQ_DA8XX_EVTOUT5, > -+ .end = IRQ_DA8XX_EVTOUT5, > -+ .flags = IORESOURCE_IRQ, > -+ }, > -+ [9] = { > -+ .start = IRQ_DA8XX_EVTOUT6, > -+ .end = IRQ_DA8XX_EVTOUT6, > -+ .flags = IORESOURCE_IRQ, > -+ }, > -+ [10] = { > -+ .start = IRQ_DA8XX_EVTOUT7, > -+ .end = IRQ_DA8XX_EVTOUT7, > -+ .flags = IORESOURCE_IRQ, > -+ }, > -+}; > -+ > -+static struct platform_device pruss_device = { > -+ .name = "pruss", > -+ .id = 0, > -+ .num_resources = ARRAY_SIZE(pruss_resources), > -+ .resource = pruss_resources, > -+ .dev = { > -+ .coherent_dma_mask = 0xffffffff, > -+ } > -+ > -+}; > -+ > -+int __init da8xx_register_pruss() > -+{ > -+ return platform_device_register(&pruss_device); > -+} > -+ > - #define CFGCHIP2 DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG) > - /* > - * Configure the USB PHY for DA8xx platforms. > -diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach- > davinci/include/mach/da8xx.h > -index f76433f..632d7e2 100755 > ---- a/arch/arm/mach-davinci/include/mach/da8xx.h > -+++ b/arch/arm/mach-davinci/include/mach/da8xx.h > -@@ -75,6 +75,8 @@ extern void __iomem *da8xx_syscfg1_base; > - #define DA8XX_USB0_BASE 0x01e00000 > - #define DA850_SATA_BASE 0x01E18000 > - #define DA850_SATA_CLK_PWRDN 0x01E2C018 > -+#define DA8XX_PRUSS_BASE 0x01C30000 > -+#define DA8XX_L3RAM_BASE 0x80000000 > - > - #define PINMUX0 0x00 > - #define PINMUX1 0x04 > -@@ -162,6 +164,7 @@ int __init da850_register_vpif_capture(struct > vpif_capture_config > - > - int cppi41_init(void); > - int da8xx_register_sata(void); > -+int da8xx_register_pruss(void); > - > - > - extern struct platform_device da8xx_serial_device; > --- > -1.7.0.4 > - > diff --git a/recipes-kernel/linux/linux-davinci/omapl138/0003-uio_pruss3- > Workarounds-put-into-core-code.patch b/recipes-kernel/linux/linux- > davinci/omapl138/0003-uio_pruss3-Workarounds-put-into-core-code.patch > deleted file mode 100755 > index a734510..0000000 > --- a/recipes-kernel/linux/linux-davinci/omapl138/0003-uio_pruss3- > Workarounds-put-into-core-code.patch > +++ /dev/null > @@ -1,45 +0,0 @@ > -From: Melissa Watkins <m-watkins@ti.com> > -Date: Wed, 24 Nov 2010 04:20:24 -0600 > -Subject: [PATCH 3/3] uio_pruss3: Workarounds put into core code to support > our devices > - > -This patch modifies uio.c to support the uio_pruss driver. The UIO user space > module relies on IO memory being mapped to user space. The IO map works > fine for all mapped virtual addresses less than 0x80000000. However for the > uio_pruss driver, the virtual address is on the higher side, so it fails. The fix > added in this patch is mainly to check if the page map returned is correct. > - > -Signed-off-by: Amit Chatterjee <amit.chatterjee@ti.com> > -Signed-off-by: Melissa Watkins <m-watkins@ti.com> > ---- > - drivers/uio/uio.c | 9 +++++++-- > - 1 files changed, 7 insertions(+), 2 deletions(-) > - > -diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c > -index e941367..3241d26 100644 > ---- a/drivers/uio/uio.c > -+++ b/drivers/uio/uio.c > -@@ -19,7 +19,6 @@ > - #include <linux/device.h> > - #include <linux/mm.h> > - #include <linux/idr.h> > --#include <linux/sched.h> > - #include <linux/string.h> > - #include <linux/kobject.h> > - #include <linux/uio_driver.h> > -@@ -615,7 +615,7 @@ static int uio_find_mem_index(struct vm_area_struct > *vma) > - for (mi = 0; mi < MAX_UIO_MAPS; mi++) { > - if (idev->info->mem[mi].size == 0) > - return -1; > -- if (vma->vm_pgoff == mi) > -+ if ((idev->info->mem[mi].addr) >> PAGE_SHIFT == vma- > >vm_pgoff) > - return mi; > - } > - return -1; > -@@ -659,7 +664,7 @@ static int uio_vma_fault(struct vm_area_struct *vma, > struct vm_fault *vmf) > - return 0; > - } > - > --static const struct vm_operations_struct uio_vm_ops = { > -+static struct vm_operations_struct uio_vm_ops = { > - .open = uio_vma_open, > - .close = uio_vma_close, > - .fault = uio_vma_fault, > --- > -1.7.0.4 > - > diff --git a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig b/recipes- > kernel/linux/linux-davinci/omapl138/configs/da850_omapl138_defconfig > deleted file mode 100644 > index b312050..0000000 > --- a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig > +++ /dev/null > @@ -1,1876 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux kernel version: 2.6.33-rc4 > -# Thu Feb 18 17:57:55 2010 > -# > -CONFIG_ARM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_GENERIC_GPIO=y > -CONFIG_GENERIC_TIME=y > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_ZONE_DMA=y > -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -CONFIG_VECTORS_BASE=0xffff0000 > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_LOCK_KERNEL=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_BZIP2 is not set > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -# CONFIG_BSD_PROCESS_ACCT is not set > -# CONFIG_TASKSTATS is not set > -# CONFIG_AUDIT is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_RCU=y > -# CONFIG_TREE_PREEMPT_RCU is not set > -# CONFIG_TINY_RCU is not set > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=14 > -CONFIG_GROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -# CONFIG_RT_GROUP_SCHED is not set > -CONFIG_USER_SCHED=y > -# CONFIG_CGROUP_SCHED is not set > -# CONFIG_CGROUPS is not set > -# CONFIG_SYSFS_DEPRECATED_V2 is not set > -# CONFIG_RELAY is not set > -# CONFIG_NAMESPACES is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -# CONFIG_RD_BZIP2 is not set > -# CONFIG_RD_LZMA is not set > -# CONFIG_RD_LZO is not set > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EMBEDDED=y > -CONFIG_UID16=y > -CONFIG_SYSCTL_SYSCALL=y > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_VM_EVENT_COUNTERS=y > -CONFIG_SLUB_DEBUG=y > -CONFIG_COMPAT_BRK=y > -# CONFIG_SLAB is not set > -CONFIG_SLUB=y > -# CONFIG_SLOB is not set > -# CONFIG_PROFILING is not set > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_CLK=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -# CONFIG_SLOW_WORK is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -# CONFIG_MODULE_FORCE_LOAD is not set > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -# CONFIG_MODULE_SRCVERSION_ALL is not set > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -# CONFIG_BLK_DEV_BSG is not set > -# CONFIG_BLK_DEV_INTEGRITY is not set > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -# CONFIG_IOSCHED_DEADLINE is not set > -# CONFIG_IOSCHED_CFQ is not set > -# CONFIG_DEFAULT_DEADLINE is not set > -# CONFIG_DEFAULT_CFQ is not set > -CONFIG_DEFAULT_NOOP=y > -CONFIG_DEFAULT_IOSCHED="noop" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_AAEC2000 is not set > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_L7200 is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5PC1XX is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_LH7A40X is not set > -# CONFIG_ARCH_U300 is not set > -CONFIG_ARCH_DAVINCI=y > -# CONFIG_ARCH_OMAP is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_U8500 is not set > -CONFIG_CP_INTC=y > - > -# > -# TI DaVinci Implementations > -# > - > -# > -# DaVinci Core Type > -# > -# CONFIG_ARCH_DAVINCI_DM644x is not set > -# CONFIG_ARCH_DAVINCI_DM355 is not set > -# CONFIG_ARCH_DAVINCI_DM646x is not set > -# CONFIG_ARCH_DAVINCI_DA830 is not set > -CONFIG_ARCH_DAVINCI_DA850=y > -# CONFIG_DA8XX_MAX_SPEED_300 is not set > -# CONFIG_DA8XX_MAX_SPEED_372 is not set > -# CONFIG_DA8XX_MAX_SPEED_408 is not set > -CONFIG_DA8XX_MAX_SPEED_456=y > -CONFIG_ARCH_DAVINCI_DA8XX=y > -# CONFIG_ARCH_DAVINCI_DM365 is not set > - > -# > -# DaVinci Board Type > -# > -CONFIG_MACH_DAVINCI_DA850_EVM=y > -CONFIG_DA850_UI_NONE=y > -# CONFIG_DA850_UI_RMII is not set > -# CONFIG_DA850_UI_CLCD is not set > -# CONFIG_DA850_UI_VIDEO_PORT is not set > -CONFIG_DAVINCI_MUX=y > -# CONFIG_DAVINCI_MUX_DEBUG is not set > -# CONFIG_DAVINCI_MUX_WARNINGS is not set > -CONFIG_DAVINCI_RESET_CLOCKS=y > -# CONFIG_DAVINCI_MCBSP is not set > - > -# > -# Processor Type > -# > -CONFIG_CPU_ARM926T=y > -CONFIG_CPU_32v5=y > -CONFIG_CPU_ABRT_EV5TJ=y > -CONFIG_CPU_PABRT_LEGACY=y > -CONFIG_CPU_CACHE_VIVT=y > -CONFIG_CPU_COPY_V4WB=y > -CONFIG_CPU_TLB_V4WBI=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -CONFIG_ARM_L1_CACHE_SHIFT=5 > -CONFIG_COMMON_CLKDEV=y > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=100 > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -# CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=999999 > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=1 > -CONFIG_BOUNCE=y > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_LEDS=y > -# CONFIG_LEDS_CPU is not set > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE="" > -# CONFIG_XIP_KERNEL is not set > -# CONFIG_KEXEC is not set > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -# CONFIG_CPU_FREQ_STAT_DETAILS is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -# CONFIG_VFP is not set > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -# CONFIG_BINFMT_AOUT is not set > -# CONFIG_BINFMT_MISC is not set > - > -# > -# Power management options > -# > -CONFIG_PM=y > -# CONFIG_PM_DEBUG is not set > -CONFIG_PM_SLEEP=y > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -# CONFIG_APM_EMULATION is not set > -# CONFIG_PM_RUNTIME is not set > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -# CONFIG_PACKET_MMAP is not set > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -# CONFIG_NET_KEY is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_FIB_HASH=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -# CONFIG_IP_PNP_BOOTP is not set > -# CONFIG_IP_PNP_RARP is not set > -# CONFIG_NET_IPIP is not set > -# CONFIG_NET_IPGRE is not set > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -# CONFIG_INET_AH is not set > -# CONFIG_INET_ESP is not set > -# CONFIG_INET_IPCOMP is not set > -# CONFIG_INET_XFRM_TUNNEL is not set > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -# CONFIG_INET_LRO is not set > -CONFIG_INET_DIAG=y > -CONFIG_INET_TCP_DIAG=y > -# CONFIG_TCP_CONG_ADVANCED is not set > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -# CONFIG_INET6_AH is not set > -# CONFIG_INET6_ESP is not set > -# CONFIG_INET6_IPCOMP is not set > -# CONFIG_IPV6_MIP6 is not set > -# CONFIG_INET6_XFRM_TUNNEL is not set > -# CONFIG_INET6_TUNNEL is not set > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -# CONFIG_IPV6_TUNNEL is not set > -# CONFIG_IPV6_MULTIPLE_TABLES is not set > -# CONFIG_IPV6_MROUTE is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > - > -# > -# Core Netfilter Configuration > -# > -# CONFIG_NETFILTER_NETLINK_QUEUE is not set > -# CONFIG_NETFILTER_NETLINK_LOG is not set > -# CONFIG_NF_CONNTRACK is not set > -# CONFIG_NETFILTER_XTABLES is not set > -# CONFIG_IP_VS is not set > - > -# > -# IP: Netfilter Configuration > -# > -# CONFIG_NF_DEFRAG_IPV4 is not set > -# CONFIG_IP_NF_QUEUE is not set > -# CONFIG_IP_NF_IPTABLES is not set > -# CONFIG_IP_NF_ARPTABLES is not set > - > -# > -# IPv6: Netfilter Configuration > -# > -# CONFIG_IP6_NF_QUEUE is not set > -# CONFIG_IP6_NF_IPTABLES is not set > -# CONFIG_IP_DCCP is not set > -# CONFIG_IP_SCTP is not set > -# CONFIG_RDS is not set > -# CONFIG_TIPC is not set > -# CONFIG_ATM is not set > -# CONFIG_BRIDGE is not set > -# CONFIG_NET_DSA is not set > -# CONFIG_VLAN_8021Q is not set > -# CONFIG_DECNET is not set > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -# CONFIG_WAN_ROUTER is not set > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -# CONFIG_NET_SCHED is not set > -# CONFIG_DCB is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -# CONFIG_CAN is not set > -# CONFIG_IRDA is not set > -# CONFIG_BT is not set > -# CONFIG_AF_RXRPC is not set > -CONFIG_WIRELESS=y > -# CONFIG_CFG80211 is not set > -# CONFIG_LIB80211 is not set > - > -# > -# CFG80211 needs to be enabled for MAC80211 > -# > -# CONFIG_WIMAX is not set > -# CONFIG_RFKILL is not set > -# CONFIG_NET_9P is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > -# CONFIG_DEVTMPFS is not set > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -# CONFIG_FW_LOADER is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_CONCAT is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -# CONFIG_MTD_OOPS is not set > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -CONFIG_MTD_M25P80=y > -CONFIG_M25PXX_USE_FAST_READ=y > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -# CONFIG_MTD_NAND is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > - > -# > -# UBI - Unsorted block images > -# > -# CONFIG_MTD_UBI is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=m > -# CONFIG_BLK_DEV_CRYPTOLOOP is not set > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=1 > -CONFIG_BLK_DEV_RAM_SIZE=32768 > -# CONFIG_BLK_DEV_XIP is not set > -# CONFIG_CDROM_PKTCDVD is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=y > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -# CONFIG_EEPROM_93CX6 is not set > -# CONFIG_IWMC3200TOP is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -# CONFIG_RAID_ATTRS is not set > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -# CONFIG_BLK_DEV_SR is not set > -CONFIG_CHR_DEV_SG=y > -# CONFIG_CHR_DEV_SCH is not set > -# CONFIG_SCSI_MULTI_LUN is not set > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -# CONFIG_SCSI_ISCSI_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -# CONFIG_ISCSI_TCP is not set > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -CONFIG_ATA=y > -# CONFIG_ATA_NONSTANDARD is not set > -CONFIG_ATA_VERBOSE_ERROR=y > -CONFIG_SATA_PMP=y > -CONFIG_SATA_AHCI=y > -# CONFIG_ATA_SFF is not set > -# CONFIG_MD is not set > -CONFIG_NETDEVICES=y > -# CONFIG_DUMMY is not set > -# CONFIG_BONDING is not set > -# CONFIG_MACVLAN is not set > -# CONFIG_EQUALIZER is not set > -# CONFIG_TUN is not set > -# CONFIG_VETH is not set > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -CONFIG_LXT_PHY=y > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -CONFIG_SMSC_PHY=y > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -CONFIG_LSI_ET1011C_PHY=y > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -CONFIG_MII=y > -# CONFIG_AX88796 is not set > -# CONFIG_SMC91X is not set > -CONFIG_TI_DAVINCI_EMAC=y > -# CONFIG_DM9000 is not set > -# CONFIG_ENC28J60 is not set > -# CONFIG_ETHOC is not set > -# CONFIG_SMC911X is not set > -# CONFIG_SMSC911X is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -# CONFIG_KS8842 is not set > -# CONFIG_KS8851 is not set > -# CONFIG_KS8851_MLL is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_USB_ZD1201 is not set > -# CONFIG_HOSTAP is not set > - > -# > -# Enable WiMAX (Networking options) to see the WiMAX drivers > -# > - > -# > -# USB Network Adapters > -# > -# CONFIG_USB_CATC is not set > -# CONFIG_USB_KAWETH is not set > -# CONFIG_USB_PEGASUS is not set > -# CONFIG_USB_RTL8150 is not set > -# CONFIG_USB_USBNET is not set > -# CONFIG_WAN is not set > -# CONFIG_PPP is not set > -# CONFIG_SLIP is not set > -CONFIG_NETCONSOLE=y > -# CONFIG_NETCONSOLE_DYNAMIC is not set > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -# CONFIG_INPUT_FF_MEMLESS is not set > -# CONFIG_INPUT_POLLDEV is not set > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -# CONFIG_INPUT_MOUSEDEV is not set > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -CONFIG_KEYBOARD_ATKBD=m > -# CONFIG_QT2160 is not set > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -CONFIG_KEYBOARD_XTKBD=m > -# CONFIG_INPUT_MOUSE is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2007 is not set > -# CONFIG_TOUCHSCREEN_TSC2004 is not set > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -CONFIG_TOUCHSCREEN_TPS6507X=y > -# CONFIG_INPUT_MISC is not set > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -# CONFIG_VT_CONSOLE is not set > -CONFIG_HW_CONSOLE=y > -# CONFIG_VT_HW_CONSOLE_BINDING is not set > -CONFIG_DEVKMEM=y > -# CONFIG_SERIAL_NONSTANDARD is not set > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=3 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -# CONFIG_SERIAL_8250_EXTENDED is not set > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -CONFIG_LEGACY_PTYS=y > -CONFIG_LEGACY_PTY_COUNT=8 > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=m > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=y > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -CONFIG_I2C_DAVINCI=y > -# CONFIG_I2C_DESIGNWARE is not set > -CONFIG_I2C_GPIO=y > -# CONFIG_I2C_OCORES is not set > -# CONFIG_I2C_SIMTEC is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_STUB is not set > - > -# > -# Miscellaneous I2C Chip support > -# > -# CONFIG_SENSORS_TSL2550 is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -# CONFIG_I2C_DEBUG_CHIP is not set > -CONFIG_SPI=y > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -CONFIG_SPI_DAVINCI=y > -CONFIG_SPI_BITBANG=y > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -# CONFIG_SPI_SPIDEV is not set > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_GPIO_SYSFS is not set > - > -# > -# Memory mapped GPIO expanders: > -# > - > -# > -# I2C GPIO expanders: > -# > -# CONFIG_GPIO_MAX732X is not set > -CONFIG_GPIO_PCA953X=y > -CONFIG_GPIO_PCF857X=y > -# CONFIG_GPIO_ADP5588 is not set > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > - > -# > -# AC97 GPIO expanders: > -# > -# CONFIG_W1 is not set > -# CONFIG_POWER_SUPPLY is not set > -# CONFIG_HWMON is not set > -# CONFIG_THERMAL is not set > -CONFIG_WATCHDOG=y > -# CONFIG_WATCHDOG_NOWAYOUT is not set > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_DAVINCI_WATCHDOG=y > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -# CONFIG_SSB is not set > - > -# > -# Multifunction device drivers > -# > -# CONFIG_MFD_CORE is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507x=y > -# CONFIG_TWL4030_CORE is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13783 is not set > -# CONFIG_AB3100_CORE is not set > -# CONFIG_EZX_PCAP is not set > -# CONFIG_MFD_88PM8607 is not set > -# CONFIG_AB4500_CORE is not set > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_TPS65023 is not set > -CONFIG_REGULATOR_TPS6507X=y > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_ALLOW_V4L1=y > -CONFIG_VIDEO_V4L1_COMPAT=y > -# CONFIG_DVB_CORE is not set > -CONFIG_VIDEO_MEDIA=y > - > -# > -# Multimedia drivers > -# > -CONFIG_IR_CORE=y > -CONFIG_VIDEO_IR=y > -# CONFIG_MEDIA_ATTACH is not set > -CONFIG_MEDIA_TUNER=y > -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set > -CONFIG_MEDIA_TUNER_SIMPLE=y > -CONFIG_MEDIA_TUNER_TDA8290=y > -CONFIG_MEDIA_TUNER_TDA9887=y > -CONFIG_MEDIA_TUNER_TEA5761=y > -CONFIG_MEDIA_TUNER_TEA5767=y > -CONFIG_MEDIA_TUNER_MT20XX=y > -CONFIG_MEDIA_TUNER_XC2028=y > -CONFIG_MEDIA_TUNER_XC5000=y > -CONFIG_MEDIA_TUNER_MC44S803=y > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEO_V4L1=y > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -# CONFIG_VIDEO_IR_I2C is not set > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TDA9875 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -# CONFIG_VIDEO_MSP3400 is not set > -# CONFIG_VIDEO_CS5345 is not set > -# CONFIG_VIDEO_CS53L32A is not set > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -# CONFIG_VIDEO_WM8775 is not set > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -# CONFIG_VIDEO_ADV7180 is not set > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -# CONFIG_VIDEO_MT9V011 is not set > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -# CONFIG_VIDEO_SAA711X is not set > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -# CONFIG_VIDEO_TVP514X is not set > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -# CONFIG_VIDEO_CX25840 is not set > - > -# > -# MPEG video encoders > -# > -# CONFIG_VIDEO_CX2341X is not set > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE is not set > -# CONFIG_VIDEO_VIVI is not set > -# CONFIG_VIDEO_VPSS_SYSTEM is not set > -# CONFIG_VIDEO_VPFE_CAPTURE is not set > -# CONFIG_VIDEO_CPIA is not set > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_SAA5246A is not set > -# CONFIG_VIDEO_SAA5249 is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=y > -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set > -# CONFIG_USB_GSPCA is not set > -# CONFIG_VIDEO_PVRUSB2 is not set > -# CONFIG_VIDEO_HDPVR is not set > -# CONFIG_VIDEO_EM28XX is not set > -# CONFIG_VIDEO_CX231XX is not set > -# CONFIG_VIDEO_USBVISION is not set > -# CONFIG_USB_VICAM is not set > -# CONFIG_USB_IBMCAM is not set > -# CONFIG_USB_KONICAWC is not set > -# CONFIG_USB_QUICKCAM_MESSENGER is not set > -# CONFIG_USB_ET61X251 is not set > -# CONFIG_VIDEO_OVCAMCHIP is not set > -# CONFIG_USB_OV511 is not set > -# CONFIG_USB_SE401 is not set > -# CONFIG_USB_SN9C102 is not set > -# CONFIG_USB_STV680 is not set > -# CONFIG_USB_ZC0301 is not set > -# CONFIG_USB_PWC is not set > -# CONFIG_USB_PWC_INPUT_EVDEV is not set > -# CONFIG_USB_ZR364XX is not set > -# CONFIG_USB_STKWEBCAM is not set > -# CONFIG_USB_S2255 is not set > -# CONFIG_RADIO_ADAPTERS is not set > -# CONFIG_DAB is not set > - > -# > -# Graphics support > -# > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -# CONFIG_FB_SYS_FILLRECT is not set > -# CONFIG_FB_SYS_COPYAREA is not set > -# CONFIG_FB_SYS_IMAGEBLIT is not set > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -# CONFIG_FB_SYS_FOPS is not set > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -# CONFIG_FB_MODE_HELPERS is not set > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_DAVINCI is not set > -# CONFIG_FB_VIRTUAL is not set > -CONFIG_FB_DA8XX=y > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > - > -# > -# Display device support > -# > -# CONFIG_DISPLAY_SUPPORT is not set > - > -# > -# Console display driver support > -# > -# CONFIG_VGA_CONSOLE is not set > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -CONFIG_LOGO_LINUX_MONO=y > -CONFIG_LOGO_LINUX_VGA16=y > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -# CONFIG_SOUND_OSS_CORE is not set > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -# CONFIG_SND_SEQUENCER is not set > -# CONFIG_SND_MIXER_OSS is not set > -# CONFIG_SND_PCM_OSS is not set > -# CONFIG_SND_HRTIMER is not set > -# CONFIG_SND_DYNAMIC_MINORS is not set > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -# CONFIG_SND_RAWMIDI_SEQ is not set > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -CONFIG_SND_ARM=y > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -# CONFIG_SND_USB_CAIAQ is not set > -CONFIG_SND_SOC=y > -CONFIG_SND_DAVINCI_SOC=y > -CONFIG_SND_DAVINCI_SOC_MCASP=y > -CONFIG_SND_DA850_SOC_EVM=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TLV320AIC3X=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_A4TECH is not set > -# CONFIG_HID_APPLE is not set > -# CONFIG_HID_BELKIN is not set > -# CONFIG_HID_CHERRY is not set > -# CONFIG_HID_CHICONY is not set > -# CONFIG_HID_CYPRESS is not set > -# CONFIG_HID_DRAGONRISE is not set > -# CONFIG_HID_EZKEY is not set > -# CONFIG_HID_KYE is not set > -# CONFIG_HID_GYRATION is not set > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -# CONFIG_HID_LOGITECH is not set > -# CONFIG_HID_MICROSOFT is not set > -# CONFIG_HID_MONTEREY is not set > -# CONFIG_HID_NTRIG is not set > -# CONFIG_HID_PANTHERLORD is not set > -# CONFIG_HID_PETALYNX is not set > -# CONFIG_HID_SAMSUNG is not set > -# CONFIG_HID_SONY is not set > -# CONFIG_HID_SUNPLUS is not set > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -# CONFIG_HID_TOPSEED is not set > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_ZEROPLUS is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -# CONFIG_USB_ARCH_HAS_EHCI is not set > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > - > -# > -# Miscellaneous USB options > -# > -# CONFIG_USB_DEVICEFS is not set > -# CONFIG_USB_DEVICE_CLASS is not set > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -# CONFIG_USB_OTG is not set > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -# CONFIG_USB_MON is not set > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -CONFIG_USB_OHCI_HCD=y > -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -CONFIG_USB_MUSB_SOC=y > -CONFIG_USB_MUSB_HOST=y > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -# CONFIG_USB_MUSB_OTG is not set > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_INVENTRA_DMA is not set > -# CONFIG_USB_TI_CPPI_DMA is not set > -CONFIG_USB_TI_CPPI41_DMA=y > -CONFIG_USB_MUSB_DEBUG=y > - > -# > -# USB Device Class drivers > -# > -# CONFIG_USB_ACM is not set > -# CONFIG_USB_PRINTER is not set > -# CONFIG_USB_WDM is not set > -# CONFIG_USB_TMC is not set > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -# CONFIG_USB_SERIAL is not set > - > -# > -# USB Miscellaneous drivers > -# > -# CONFIG_USB_EMI62 is not set > -# CONFIG_USB_EMI26 is not set > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -# CONFIG_USB_LEGOTOWER is not set > -# CONFIG_USB_LCD is not set > -# CONFIG_USB_BERRY_CHARGE is not set > -# CONFIG_USB_LED is not set > -# CONFIG_USB_CYPRESS_CY7C63 is not set > -# CONFIG_USB_CYTHERM is not set > -# CONFIG_USB_IDMOUSE is not set > -# CONFIG_USB_FTDI_ELAN is not set > -# CONFIG_USB_APPLEDISPLAY is not set > -# CONFIG_USB_SISUSBVGA is not set > -# CONFIG_USB_LD is not set > -# CONFIG_USB_TRANCEVIBRATOR is not set > -# CONFIG_USB_IOWARRIOR is not set > -# CONFIG_USB_TEST is not set > -# CONFIG_USB_ISIGHTFW is not set > -# CONFIG_USB_VST is not set > -# CONFIG_USB_GADGET is not set > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -# CONFIG_USB_GPIO_VBUS is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -# CONFIG_MMC_UNSAFE_RESUME is not set > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_BOUNCE=y > -# CONFIG_SDIO_UART is not set > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_AT91 is not set > -# CONFIG_MMC_ATMELMCI is not set > -CONFIG_MMC_DAVINCI=y > -# CONFIG_MMC_SPI is not set > -# CONFIG_MEMSTICK is not set > -# CONFIG_NEW_LEDS is not set > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -# CONFIG_RTC_DRV_DS1307 is not set > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -# CONFIG_RTC_DRV_BQ32K is not set > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -CONFIG_RTC_DRV_OMAP=y > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -# CONFIG_UIO is not set > - > -# > -# TI VLYNQ > -# > -# CONFIG_STAGING is not set > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -# CONFIG_EXT3_FS_POSIX_ACL is not set > -# CONFIG_EXT3_FS_SECURITY is not set > -# CONFIG_EXT4_FS is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -# CONFIG_REISERFS_FS is not set > -# CONFIG_JFS_FS is not set > -# CONFIG_FS_POSIX_ACL is not set > -# CONFIG_XFS_FS is not set > -# CONFIG_GFS2_FS is not set > -# CONFIG_OCFS2_FS is not set > -# CONFIG_BTRFS_FS is not set > -# CONFIG_NILFS2_FS is not set > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY=y > -CONFIG_INOTIFY_USER=y > -# CONFIG_QUOTA is not set > -# CONFIG_AUTOFS_FS is not set > -CONFIG_AUTOFS4_FS=m > -# CONFIG_FUSE_FS is not set > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -# CONFIG_ISO9660_FS is not set > -# CONFIG_UDF_FS is not set > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -# CONFIG_NTFS_FS is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -# CONFIG_TMPFS_POSIX_ACL is not set > -# CONFIG_HUGETLB_PAGE is not set > -# CONFIG_CONFIGFS_FS is not set > -CONFIG_MISC_FILESYSTEMS=y > -# CONFIG_ADFS_FS is not set > -# CONFIG_AFFS_FS is not set > -# CONFIG_HFS_FS is not set > -# CONFIG_HFSPLUS_FS is not set > -# CONFIG_BEFS_FS is not set > -# CONFIG_BFS_FS is not set > -# CONFIG_EFS_FS is not set > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -# CONFIG_JFFS2_SUMMARY is not set > -# CONFIG_JFFS2_FS_XATTR is not set > -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -CONFIG_JFFS2_ZLIB=y > -# CONFIG_JFFS2_LZO is not set > -CONFIG_JFFS2_RTIME=y > -# CONFIG_JFFS2_RUBIN is not set > -CONFIG_CRAMFS=y > -# CONFIG_SQUASHFS is not set > -# CONFIG_VXFS_FS is not set > -CONFIG_MINIX_FS=m > -# CONFIG_OMFS_FS is not set > -# CONFIG_HPFS_FS is not set > -# CONFIG_QNX4FS_FS is not set > -# CONFIG_ROMFS_FS is not set > -# CONFIG_SYSV_FS is not set > -# CONFIG_UFS_FS is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -# CONFIG_NFS_V4 is not set > -CONFIG_ROOT_NFS=y > -CONFIG_NFSD=m > -CONFIG_NFSD_V3=y > -# CONFIG_NFSD_V3_ACL is not set > -# CONFIG_NFSD_V4 is not set > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_EXPORTFS=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -# CONFIG_RPCSEC_GSS_KRB5 is not set > -# CONFIG_RPCSEC_GSS_SPKM3 is not set > -CONFIG_SMB_FS=m > -# CONFIG_SMB_NLS_DEFAULT is not set > -# CONFIG_CIFS is not set > -# CONFIG_NCP_FS is not set > -# CONFIG_CODA_FS is not set > -# CONFIG_AFS_FS is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -# CONFIG_MAC_PARTITION is not set > -CONFIG_MSDOS_PARTITION=y > -# CONFIG_BSD_DISKLABEL is not set > -# CONFIG_MINIX_SUBPARTITION is not set > -# CONFIG_SOLARIS_X86_PARTITION is not set > -# CONFIG_UNIXWARE_DISKLABEL is not set > -# CONFIG_LDM_PARTITION is not set > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -# CONFIG_EFI_PARTITION is not set > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -# CONFIG_NLS_CODEPAGE_737 is not set > -# CONFIG_NLS_CODEPAGE_775 is not set > -# CONFIG_NLS_CODEPAGE_850 is not set > -# CONFIG_NLS_CODEPAGE_852 is not set > -# CONFIG_NLS_CODEPAGE_855 is not set > -# CONFIG_NLS_CODEPAGE_857 is not set > -# CONFIG_NLS_CODEPAGE_860 is not set > -# CONFIG_NLS_CODEPAGE_861 is not set > -# CONFIG_NLS_CODEPAGE_862 is not set > -# CONFIG_NLS_CODEPAGE_863 is not set > -# CONFIG_NLS_CODEPAGE_864 is not set > -# CONFIG_NLS_CODEPAGE_865 is not set > -# CONFIG_NLS_CODEPAGE_866 is not set > -# CONFIG_NLS_CODEPAGE_869 is not set > -# CONFIG_NLS_CODEPAGE_936 is not set > -# CONFIG_NLS_CODEPAGE_950 is not set > -# CONFIG_NLS_CODEPAGE_932 is not set > -# CONFIG_NLS_CODEPAGE_949 is not set > -# CONFIG_NLS_CODEPAGE_874 is not set > -# CONFIG_NLS_ISO8859_8 is not set > -# CONFIG_NLS_CODEPAGE_1250 is not set > -# CONFIG_NLS_CODEPAGE_1251 is not set > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -# CONFIG_NLS_ISO8859_2 is not set > -# CONFIG_NLS_ISO8859_3 is not set > -# CONFIG_NLS_ISO8859_4 is not set > -# CONFIG_NLS_ISO8859_5 is not set > -# CONFIG_NLS_ISO8859_6 is not set > -# CONFIG_NLS_ISO8859_7 is not set > -# CONFIG_NLS_ISO8859_9 is not set > -# CONFIG_NLS_ISO8859_13 is not set > -# CONFIG_NLS_ISO8859_14 is not set > -# CONFIG_NLS_ISO8859_15 is not set > -# CONFIG_NLS_KOI8_R is not set > -# CONFIG_NLS_KOI8_U is not set > -CONFIG_NLS_UTF8=m > -# CONFIG_DLM is not set > - > -# > -# Kernel hacking > -# > -# CONFIG_PRINTK_TIME is not set > -# CONFIG_ENABLE_WARN_DEPRECATED is not set > -# CONFIG_ENABLE_MUST_CHECK is not set > -CONFIG_FRAME_WARN=1024 > -# CONFIG_MAGIC_SYSRQ is not set > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -# CONFIG_DEBUG_KERNEL is not set > -# CONFIG_SLUB_DEBUG_ON is not set > -# CONFIG_SLUB_STATS is not set > -CONFIG_DEBUG_BUGVERBOSE=y > -# CONFIG_DEBUG_MEMORY_INIT is not set > -CONFIG_FRAME_POINTER=y > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_TRACING_SUPPORT=y > -# CONFIG_FTRACE is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_ARM_UNWIND is not set > -# CONFIG_DEBUG_USER is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -# CONFIG_KEYS is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -# CONFIG_DEFAULT_SECURITY_SMACK is not set > -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -# CONFIG_CRYPTO_MANAGER is not set > -# CONFIG_CRYPTO_MANAGER2 is not set > -# CONFIG_CRYPTO_GF128MUL is not set > -# CONFIG_CRYPTO_NULL is not set > -# CONFIG_CRYPTO_CRYPTD is not set > -# CONFIG_CRYPTO_AUTHENC is not set > -# CONFIG_CRYPTO_TEST is not set > - > -# > -# Authenticated Encryption with Associated Data > -# > -# CONFIG_CRYPTO_CCM is not set > -# CONFIG_CRYPTO_GCM is not set > -# CONFIG_CRYPTO_SEQIV is not set > - > -# > -# Block modes > -# > -# CONFIG_CRYPTO_CBC is not set > -# CONFIG_CRYPTO_CTR is not set > -# CONFIG_CRYPTO_CTS is not set > -# CONFIG_CRYPTO_ECB is not set > -# CONFIG_CRYPTO_LRW is not set > -# CONFIG_CRYPTO_PCBC is not set > -# CONFIG_CRYPTO_XTS is not set > - > -# > -# Hash modes > -# > -# CONFIG_CRYPTO_HMAC is not set > -# CONFIG_CRYPTO_XCBC is not set > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -# CONFIG_CRYPTO_CRC32C is not set > -# CONFIG_CRYPTO_GHASH is not set > -# CONFIG_CRYPTO_MD4 is not set > -# CONFIG_CRYPTO_MD5 is not set > -# CONFIG_CRYPTO_MICHAEL_MIC is not set > -# CONFIG_CRYPTO_RMD128 is not set > -# CONFIG_CRYPTO_RMD160 is not set > -# CONFIG_CRYPTO_RMD256 is not set > -# CONFIG_CRYPTO_RMD320 is not set > -# CONFIG_CRYPTO_SHA1 is not set > -# CONFIG_CRYPTO_SHA256 is not set > -# CONFIG_CRYPTO_SHA512 is not set > -# CONFIG_CRYPTO_TGR192 is not set > -# CONFIG_CRYPTO_WP512 is not set > - > -# > -# Ciphers > -# > -# CONFIG_CRYPTO_AES is not set > -# CONFIG_CRYPTO_ANUBIS is not set > -# CONFIG_CRYPTO_ARC4 is not set > -# CONFIG_CRYPTO_BLOWFISH is not set > -# CONFIG_CRYPTO_CAMELLIA is not set > -# CONFIG_CRYPTO_CAST5 is not set > -# CONFIG_CRYPTO_CAST6 is not set > -# CONFIG_CRYPTO_DES is not set > -# CONFIG_CRYPTO_FCRYPT is not set > -# CONFIG_CRYPTO_KHAZAD is not set > -# CONFIG_CRYPTO_SALSA20 is not set > -# CONFIG_CRYPTO_SEED is not set > -# CONFIG_CRYPTO_SERPENT is not set > -# CONFIG_CRYPTO_TEA is not set > -# CONFIG_CRYPTO_TWOFISH is not set > - > -# > -# Compression > -# > -# CONFIG_CRYPTO_DEFLATE is not set > -# CONFIG_CRYPTO_ZLIB is not set > -# CONFIG_CRYPTO_LZO is not set > - > -# > -# Random Number Generation > -# > -# CONFIG_CRYPTO_ANSI_CPRNG is not set > -# CONFIG_CRYPTO_HW is not set > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=m > -# CONFIG_CRC16 is not set > -CONFIG_CRC_T10DIF=m > -# CONFIG_CRC_ITU_T is not set > -CONFIG_CRC32=y > -# CONFIG_CRC7 is not set > -# CONFIG_LIBCRC32C is not set > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_GENERIC_ALLOCATOR=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > diff --git a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_mmcpm_stats > b/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_mmcpm_stats > deleted file mode 100644 > index 4836640..0000000 > --- a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_mmcpm_stats > +++ /dev/null > @@ -1,1917 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux kernel version: 2.6.33-rc4 > -# Mon Feb 15 17:04:00 2010 > -# > -CONFIG_ARM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_GENERIC_GPIO=y > -CONFIG_GENERIC_TIME=y > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_ZONE_DMA=y > -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -CONFIG_VECTORS_BASE=0xffff0000 > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_LOCK_KERNEL=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_BZIP2 is not set > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -# CONFIG_BSD_PROCESS_ACCT is not set > -# CONFIG_TASKSTATS is not set > -# CONFIG_AUDIT is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_RCU=y > -# CONFIG_TREE_PREEMPT_RCU is not set > -# CONFIG_TINY_RCU is not set > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=14 > -CONFIG_GROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -# CONFIG_RT_GROUP_SCHED is not set > -CONFIG_USER_SCHED=y > -# CONFIG_CGROUP_SCHED is not set > -# CONFIG_CGROUPS is not set > -# CONFIG_SYSFS_DEPRECATED_V2 is not set > -# CONFIG_RELAY is not set > -# CONFIG_NAMESPACES is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -# CONFIG_RD_BZIP2 is not set > -# CONFIG_RD_LZMA is not set > -# CONFIG_RD_LZO is not set > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EMBEDDED=y > -CONFIG_UID16=y > -CONFIG_SYSCTL_SYSCALL=y > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_ALL is not set > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_VM_EVENT_COUNTERS=y > -CONFIG_SLUB_DEBUG=y > -CONFIG_COMPAT_BRK=y > -# CONFIG_SLAB is not set > -CONFIG_SLUB=y > -# CONFIG_SLOB is not set > -# CONFIG_PROFILING is not set > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_CLK=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -# CONFIG_SLOW_WORK is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -# CONFIG_MODULE_FORCE_LOAD is not set > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -# CONFIG_MODULE_SRCVERSION_ALL is not set > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -# CONFIG_BLK_DEV_BSG is not set > -# CONFIG_BLK_DEV_INTEGRITY is not set > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -# CONFIG_IOSCHED_DEADLINE is not set > -# CONFIG_IOSCHED_CFQ is not set > -# CONFIG_DEFAULT_DEADLINE is not set > -# CONFIG_DEFAULT_CFQ is not set > -CONFIG_DEFAULT_NOOP=y > -CONFIG_DEFAULT_IOSCHED="noop" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_AAEC2000 is not set > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_L7200 is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5PC1XX is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_LH7A40X is not set > -# CONFIG_ARCH_U300 is not set > -CONFIG_ARCH_DAVINCI=y > -# CONFIG_ARCH_OMAP is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_U8500 is not set > -CONFIG_CP_INTC=y > - > -# > -# TI DaVinci Implementations > -# > - > -# > -# DaVinci Core Type > -# > -# CONFIG_ARCH_DAVINCI_DM644x is not set > -# CONFIG_ARCH_DAVINCI_DM355 is not set > -# CONFIG_ARCH_DAVINCI_DM646x is not set > -# CONFIG_ARCH_DAVINCI_DA830 is not set > -CONFIG_ARCH_DAVINCI_DA850=y > -CONFIG_DA8XX_MAX_SPEED_300=y > -# CONFIG_DA8XX_MAX_SPEED_372 is not set > -# CONFIG_DA8XX_MAX_SPEED_408 is not set > -# CONFIG_DA8XX_MAX_SPEED_456 is not set > -CONFIG_ARCH_DAVINCI_DA8XX=y > -# CONFIG_ARCH_DAVINCI_DM365 is not set > - > -# > -# DaVinci Board Type > -# > -CONFIG_MACH_DAVINCI_DA850_EVM=y > -CONFIG_DA850_UI_NONE=y > -# CONFIG_DA850_UI_RMII is not set > -# CONFIG_DA850_UI_CLCD is not set > -# CONFIG_DA850_UI_VIDEO_PORT is not set > -CONFIG_DAVINCI_MUX=y > -# CONFIG_DAVINCI_MUX_DEBUG is not set > -# CONFIG_DAVINCI_MUX_WARNINGS is not set > -CONFIG_DAVINCI_RESET_CLOCKS=y > -# CONFIG_DAVINCI_MCBSP is not set > - > -# > -# Processor Type > -# > -CONFIG_CPU_ARM926T=y > -CONFIG_CPU_32v5=y > -CONFIG_CPU_ABRT_EV5TJ=y > -CONFIG_CPU_PABRT_LEGACY=y > -CONFIG_CPU_CACHE_VIVT=y > -CONFIG_CPU_COPY_V4WB=y > -CONFIG_CPU_TLB_V4WBI=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -CONFIG_ARM_L1_CACHE_SHIFT=5 > -CONFIG_COMMON_CLKDEV=y > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=100 > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -# CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=999999 > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=1 > -CONFIG_BOUNCE=y > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_LEDS=y > -# CONFIG_LEDS_CPU is not set > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE="" > -# CONFIG_XIP_KERNEL is not set > -# CONFIG_KEXEC is not set > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -# CONFIG_CPU_FREQ_STAT_DETAILS is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -# CONFIG_VFP is not set > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -# CONFIG_BINFMT_AOUT is not set > -# CONFIG_BINFMT_MISC is not set > - > -# > -# Power management options > -# > -CONFIG_PM=y > -# CONFIG_PM_DEBUG is not set > -CONFIG_PM_SLEEP=y > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -# CONFIG_APM_EMULATION is not set > -# CONFIG_PM_RUNTIME is not set > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -# CONFIG_PACKET_MMAP is not set > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -# CONFIG_NET_KEY is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_FIB_HASH=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -# CONFIG_IP_PNP_BOOTP is not set > -# CONFIG_IP_PNP_RARP is not set > -# CONFIG_NET_IPIP is not set > -# CONFIG_NET_IPGRE is not set > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -# CONFIG_INET_AH is not set > -# CONFIG_INET_ESP is not set > -# CONFIG_INET_IPCOMP is not set > -# CONFIG_INET_XFRM_TUNNEL is not set > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -# CONFIG_INET_LRO is not set > -CONFIG_INET_DIAG=y > -CONFIG_INET_TCP_DIAG=y > -# CONFIG_TCP_CONG_ADVANCED is not set > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -# CONFIG_INET6_AH is not set > -# CONFIG_INET6_ESP is not set > -# CONFIG_INET6_IPCOMP is not set > -# CONFIG_IPV6_MIP6 is not set > -# CONFIG_INET6_XFRM_TUNNEL is not set > -# CONFIG_INET6_TUNNEL is not set > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -# CONFIG_IPV6_TUNNEL is not set > -# CONFIG_IPV6_MULTIPLE_TABLES is not set > -# CONFIG_IPV6_MROUTE is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > - > -# > -# Core Netfilter Configuration > -# > -# CONFIG_NETFILTER_NETLINK_QUEUE is not set > -# CONFIG_NETFILTER_NETLINK_LOG is not set > -# CONFIG_NF_CONNTRACK is not set > -# CONFIG_NETFILTER_XTABLES is not set > -# CONFIG_IP_VS is not set > - > -# > -# IP: Netfilter Configuration > -# > -# CONFIG_NF_DEFRAG_IPV4 is not set > -# CONFIG_IP_NF_QUEUE is not set > -# CONFIG_IP_NF_IPTABLES is not set > -# CONFIG_IP_NF_ARPTABLES is not set > - > -# > -# IPv6: Netfilter Configuration > -# > -# CONFIG_IP6_NF_QUEUE is not set > -# CONFIG_IP6_NF_IPTABLES is not set > -# CONFIG_IP_DCCP is not set > -# CONFIG_IP_SCTP is not set > -# CONFIG_RDS is not set > -# CONFIG_TIPC is not set > -# CONFIG_ATM is not set > -# CONFIG_BRIDGE is not set > -# CONFIG_NET_DSA is not set > -# CONFIG_VLAN_8021Q is not set > -# CONFIG_DECNET is not set > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -# CONFIG_WAN_ROUTER is not set > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -# CONFIG_NET_SCHED is not set > -# CONFIG_DCB is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -# CONFIG_CAN is not set > -# CONFIG_IRDA is not set > -# CONFIG_BT is not set > -# CONFIG_AF_RXRPC is not set > -CONFIG_WIRELESS=y > -# CONFIG_CFG80211 is not set > -# CONFIG_LIB80211 is not set > - > -# > -# CFG80211 needs to be enabled for MAC80211 > -# > -# CONFIG_WIMAX is not set > -# CONFIG_RFKILL is not set > -# CONFIG_NET_9P is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > -# CONFIG_DEVTMPFS is not set > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -# CONFIG_FW_LOADER is not set > -# CONFIG_DEBUG_DRIVER is not set > -# CONFIG_DEBUG_DEVRES is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_CONCAT is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -# CONFIG_MTD_OOPS is not set > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -CONFIG_MTD_M25P80=y > -CONFIG_M25PXX_USE_FAST_READ=y > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -# CONFIG_MTD_NAND is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > - > -# > -# UBI - Unsorted block images > -# > -# CONFIG_MTD_UBI is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=m > -# CONFIG_BLK_DEV_CRYPTOLOOP is not set > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=1 > -CONFIG_BLK_DEV_RAM_SIZE=32768 > -# CONFIG_BLK_DEV_XIP is not set > -# CONFIG_CDROM_PKTCDVD is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=y > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -# CONFIG_EEPROM_93CX6 is not set > -# CONFIG_IWMC3200TOP is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -# CONFIG_RAID_ATTRS is not set > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -# CONFIG_BLK_DEV_SR is not set > -CONFIG_CHR_DEV_SG=y > -# CONFIG_CHR_DEV_SCH is not set > -# CONFIG_SCSI_MULTI_LUN is not set > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -# CONFIG_SCSI_ISCSI_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -# CONFIG_ISCSI_TCP is not set > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -# CONFIG_ATA is not set > -# CONFIG_MD is not set > -CONFIG_NETDEVICES=y > -# CONFIG_DUMMY is not set > -# CONFIG_BONDING is not set > -# CONFIG_MACVLAN is not set > -# CONFIG_EQUALIZER is not set > -# CONFIG_TUN is not set > -# CONFIG_VETH is not set > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -CONFIG_LXT_PHY=y > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -CONFIG_SMSC_PHY=y > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -CONFIG_LSI_ET1011C_PHY=y > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -CONFIG_MII=y > -# CONFIG_AX88796 is not set > -# CONFIG_SMC91X is not set > -CONFIG_TI_DAVINCI_EMAC=y > -# CONFIG_DM9000 is not set > -# CONFIG_ENC28J60 is not set > -# CONFIG_ETHOC is not set > -# CONFIG_SMC911X is not set > -# CONFIG_SMSC911X is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -# CONFIG_KS8842 is not set > -# CONFIG_KS8851 is not set > -# CONFIG_KS8851_MLL is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_USB_ZD1201 is not set > -# CONFIG_HOSTAP is not set > - > -# > -# Enable WiMAX (Networking options) to see the WiMAX drivers > -# > - > -# > -# USB Network Adapters > -# > -# CONFIG_USB_CATC is not set > -# CONFIG_USB_KAWETH is not set > -# CONFIG_USB_PEGASUS is not set > -# CONFIG_USB_RTL8150 is not set > -# CONFIG_USB_USBNET is not set > -# CONFIG_WAN is not set > -# CONFIG_PPP is not set > -# CONFIG_SLIP is not set > -CONFIG_NETCONSOLE=y > -# CONFIG_NETCONSOLE_DYNAMIC is not set > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -# CONFIG_INPUT_FF_MEMLESS is not set > -# CONFIG_INPUT_POLLDEV is not set > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -# CONFIG_INPUT_MOUSEDEV is not set > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -CONFIG_KEYBOARD_ATKBD=m > -# CONFIG_QT2160 is not set > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -CONFIG_KEYBOARD_XTKBD=m > -# CONFIG_INPUT_MOUSE is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2007 is not set > -# CONFIG_TOUCHSCREEN_TSC2004 is not set > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -CONFIG_TOUCHSCREEN_TPS6507X=y > -# CONFIG_INPUT_MISC is not set > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -# CONFIG_VT_CONSOLE is not set > -CONFIG_HW_CONSOLE=y > -# CONFIG_VT_HW_CONSOLE_BINDING is not set > -CONFIG_DEVKMEM=y > -# CONFIG_SERIAL_NONSTANDARD is not set > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=3 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -# CONFIG_SERIAL_8250_EXTENDED is not set > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -CONFIG_LEGACY_PTYS=y > -CONFIG_LEGACY_PTY_COUNT=8 > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=m > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=y > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -CONFIG_I2C_DAVINCI=y > -# CONFIG_I2C_DESIGNWARE is not set > -CONFIG_I2C_GPIO=y > -# CONFIG_I2C_OCORES is not set > -# CONFIG_I2C_SIMTEC is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_STUB is not set > - > -# > -# Miscellaneous I2C Chip support > -# > -# CONFIG_SENSORS_TSL2550 is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -# CONFIG_I2C_DEBUG_CHIP is not set > -CONFIG_SPI=y > -# CONFIG_SPI_DEBUG is not set > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -CONFIG_SPI_DAVINCI=y > -CONFIG_SPI_BITBANG=y > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -# CONFIG_SPI_SPIDEV is not set > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_DEBUG_GPIO is not set > -# CONFIG_GPIO_SYSFS is not set > - > -# > -# Memory mapped GPIO expanders: > -# > - > -# > -# I2C GPIO expanders: > -# > -# CONFIG_GPIO_MAX732X is not set > -CONFIG_GPIO_PCA953X=y > -CONFIG_GPIO_PCF857X=y > -# CONFIG_GPIO_ADP5588 is not set > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > - > -# > -# AC97 GPIO expanders: > -# > -# CONFIG_W1 is not set > -# CONFIG_POWER_SUPPLY is not set > -# CONFIG_HWMON is not set > -# CONFIG_THERMAL is not set > -CONFIG_WATCHDOG=y > -# CONFIG_WATCHDOG_NOWAYOUT is not set > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_DAVINCI_WATCHDOG=y > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -# CONFIG_SSB is not set > - > -# > -# Multifunction device drivers > -# > -# CONFIG_MFD_CORE is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507x=y > -# CONFIG_TWL4030_CORE is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13783 is not set > -# CONFIG_AB3100_CORE is not set > -# CONFIG_EZX_PCAP is not set > -# CONFIG_MFD_88PM8607 is not set > -# CONFIG_AB4500_CORE is not set > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_TPS65023 is not set > -CONFIG_REGULATOR_TPS6507X=y > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_ALLOW_V4L1=y > -CONFIG_VIDEO_V4L1_COMPAT=y > -# CONFIG_DVB_CORE is not set > -CONFIG_VIDEO_MEDIA=y > - > -# > -# Multimedia drivers > -# > -CONFIG_IR_CORE=y > -CONFIG_VIDEO_IR=y > -# CONFIG_MEDIA_ATTACH is not set > -CONFIG_MEDIA_TUNER=y > -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set > -CONFIG_MEDIA_TUNER_SIMPLE=y > -CONFIG_MEDIA_TUNER_TDA8290=y > -CONFIG_MEDIA_TUNER_TDA9887=y > -CONFIG_MEDIA_TUNER_TEA5761=y > -CONFIG_MEDIA_TUNER_TEA5767=y > -CONFIG_MEDIA_TUNER_MT20XX=y > -CONFIG_MEDIA_TUNER_XC2028=y > -CONFIG_MEDIA_TUNER_XC5000=y > -CONFIG_MEDIA_TUNER_MC44S803=y > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEO_V4L1=y > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -# CONFIG_VIDEO_IR_I2C is not set > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TDA9875 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -# CONFIG_VIDEO_MSP3400 is not set > -# CONFIG_VIDEO_CS5345 is not set > -# CONFIG_VIDEO_CS53L32A is not set > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -# CONFIG_VIDEO_WM8775 is not set > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -# CONFIG_VIDEO_ADV7180 is not set > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -# CONFIG_VIDEO_MT9V011 is not set > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -# CONFIG_VIDEO_SAA711X is not set > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -# CONFIG_VIDEO_TVP514X is not set > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -# CONFIG_VIDEO_CX25840 is not set > - > -# > -# MPEG video encoders > -# > -# CONFIG_VIDEO_CX2341X is not set > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE is not set > -# CONFIG_VIDEO_VIVI is not set > -# CONFIG_VIDEO_VPSS_SYSTEM is not set > -# CONFIG_VIDEO_VPFE_CAPTURE is not set > -# CONFIG_VIDEO_CPIA is not set > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_SAA5246A is not set > -# CONFIG_VIDEO_SAA5249 is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=y > -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set > -# CONFIG_USB_GSPCA is not set > -# CONFIG_VIDEO_PVRUSB2 is not set > -# CONFIG_VIDEO_HDPVR is not set > -# CONFIG_VIDEO_EM28XX is not set > -# CONFIG_VIDEO_CX231XX is not set > -# CONFIG_VIDEO_USBVISION is not set > -# CONFIG_USB_VICAM is not set > -# CONFIG_USB_IBMCAM is not set > -# CONFIG_USB_KONICAWC is not set > -# CONFIG_USB_QUICKCAM_MESSENGER is not set > -# CONFIG_USB_ET61X251 is not set > -# CONFIG_VIDEO_OVCAMCHIP is not set > -# CONFIG_USB_OV511 is not set > -# CONFIG_USB_SE401 is not set > -# CONFIG_USB_SN9C102 is not set > -# CONFIG_USB_STV680 is not set > -# CONFIG_USB_ZC0301 is not set > -# CONFIG_USB_PWC is not set > -# CONFIG_USB_PWC_INPUT_EVDEV is not set > -# CONFIG_USB_ZR364XX is not set > -# CONFIG_USB_STKWEBCAM is not set > -# CONFIG_USB_S2255 is not set > -# CONFIG_RADIO_ADAPTERS is not set > -# CONFIG_DAB is not set > - > -# > -# Graphics support > -# > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -# CONFIG_FB_SYS_FILLRECT is not set > -# CONFIG_FB_SYS_COPYAREA is not set > -# CONFIG_FB_SYS_IMAGEBLIT is not set > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -# CONFIG_FB_SYS_FOPS is not set > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -# CONFIG_FB_MODE_HELPERS is not set > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_DAVINCI is not set > -# CONFIG_FB_VIRTUAL is not set > -CONFIG_FB_DA8XX=y > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > - > -# > -# Display device support > -# > -# CONFIG_DISPLAY_SUPPORT is not set > - > -# > -# Console display driver support > -# > -# CONFIG_VGA_CONSOLE is not set > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -CONFIG_LOGO_LINUX_MONO=y > -CONFIG_LOGO_LINUX_VGA16=y > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -# CONFIG_SOUND_OSS_CORE is not set > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -# CONFIG_SND_SEQUENCER is not set > -# CONFIG_SND_MIXER_OSS is not set > -# CONFIG_SND_PCM_OSS is not set > -# CONFIG_SND_HRTIMER is not set > -# CONFIG_SND_DYNAMIC_MINORS is not set > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -# CONFIG_SND_RAWMIDI_SEQ is not set > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -CONFIG_SND_ARM=y > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -# CONFIG_SND_USB_CAIAQ is not set > -CONFIG_SND_SOC=y > -CONFIG_SND_DAVINCI_SOC=y > -CONFIG_SND_DAVINCI_SOC_MCASP=y > -CONFIG_SND_DA850_SOC_EVM=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TLV320AIC3X=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_A4TECH is not set > -# CONFIG_HID_APPLE is not set > -# CONFIG_HID_BELKIN is not set > -# CONFIG_HID_CHERRY is not set > -# CONFIG_HID_CHICONY is not set > -# CONFIG_HID_CYPRESS is not set > -# CONFIG_HID_DRAGONRISE is not set > -# CONFIG_HID_EZKEY is not set > -# CONFIG_HID_KYE is not set > -# CONFIG_HID_GYRATION is not set > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -# CONFIG_HID_LOGITECH is not set > -# CONFIG_HID_MICROSOFT is not set > -# CONFIG_HID_MONTEREY is not set > -# CONFIG_HID_NTRIG is not set > -# CONFIG_HID_PANTHERLORD is not set > -# CONFIG_HID_PETALYNX is not set > -# CONFIG_HID_SAMSUNG is not set > -# CONFIG_HID_SONY is not set > -# CONFIG_HID_SUNPLUS is not set > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -# CONFIG_HID_TOPSEED is not set > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_ZEROPLUS is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -# CONFIG_USB_ARCH_HAS_EHCI is not set > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > - > -# > -# Miscellaneous USB options > -# > -# CONFIG_USB_DEVICEFS is not set > -# CONFIG_USB_DEVICE_CLASS is not set > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -# CONFIG_USB_OTG is not set > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -# CONFIG_USB_MON is not set > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -CONFIG_USB_OHCI_HCD=y > -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -CONFIG_USB_MUSB_SOC=y > -CONFIG_USB_MUSB_HOST=y > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -# CONFIG_USB_MUSB_OTG is not set > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_INVENTRA_DMA is not set > -# CONFIG_USB_TI_CPPI_DMA is not set > -CONFIG_USB_TI_CPPI41_DMA=y > -CONFIG_USB_MUSB_DEBUG=y > - > -# > -# USB Device Class drivers > -# > -# CONFIG_USB_ACM is not set > -# CONFIG_USB_PRINTER is not set > -# CONFIG_USB_WDM is not set > -# CONFIG_USB_TMC is not set > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -# CONFIG_USB_SERIAL is not set > - > -# > -# USB Miscellaneous drivers > -# > -# CONFIG_USB_EMI62 is not set > -# CONFIG_USB_EMI26 is not set > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -# CONFIG_USB_LEGOTOWER is not set > -# CONFIG_USB_LCD is not set > -# CONFIG_USB_BERRY_CHARGE is not set > -# CONFIG_USB_LED is not set > -# CONFIG_USB_CYPRESS_CY7C63 is not set > -# CONFIG_USB_CYTHERM is not set > -# CONFIG_USB_IDMOUSE is not set > -# CONFIG_USB_FTDI_ELAN is not set > -# CONFIG_USB_APPLEDISPLAY is not set > -# CONFIG_USB_SISUSBVGA is not set > -# CONFIG_USB_LD is not set > -# CONFIG_USB_TRANCEVIBRATOR is not set > -# CONFIG_USB_IOWARRIOR is not set > -# CONFIG_USB_TEST is not set > -# CONFIG_USB_ISIGHTFW is not set > -# CONFIG_USB_VST is not set > -# CONFIG_USB_GADGET is not set > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -# CONFIG_USB_GPIO_VBUS is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -CONFIG_MMC_UNSAFE_RESUME=y > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_BOUNCE=y > -# CONFIG_SDIO_UART is not set > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_AT91 is not set > -# CONFIG_MMC_ATMELMCI is not set > -CONFIG_MMC_DAVINCI=y > -# CONFIG_MMC_SPI is not set > -# CONFIG_MEMSTICK is not set > -# CONFIG_NEW_LEDS is not set > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -# CONFIG_RTC_DRV_DS1307 is not set > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -# CONFIG_RTC_DRV_BQ32K is not set > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -CONFIG_RTC_DRV_OMAP=y > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -# CONFIG_UIO is not set > - > -# > -# TI VLYNQ > -# > -# CONFIG_STAGING is not set > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -# CONFIG_EXT3_FS_POSIX_ACL is not set > -# CONFIG_EXT3_FS_SECURITY is not set > -# CONFIG_EXT4_FS is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -# CONFIG_REISERFS_FS is not set > -# CONFIG_JFS_FS is not set > -# CONFIG_FS_POSIX_ACL is not set > -# CONFIG_XFS_FS is not set > -# CONFIG_GFS2_FS is not set > -# CONFIG_OCFS2_FS is not set > -# CONFIG_BTRFS_FS is not set > -# CONFIG_NILFS2_FS is not set > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY=y > -CONFIG_INOTIFY_USER=y > -# CONFIG_QUOTA is not set > -# CONFIG_AUTOFS_FS is not set > -CONFIG_AUTOFS4_FS=m > -# CONFIG_FUSE_FS is not set > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -# CONFIG_ISO9660_FS is not set > -# CONFIG_UDF_FS is not set > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -# CONFIG_NTFS_FS is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -# CONFIG_TMPFS_POSIX_ACL is not set > -# CONFIG_HUGETLB_PAGE is not set > -# CONFIG_CONFIGFS_FS is not set > -CONFIG_MISC_FILESYSTEMS=y > -# CONFIG_ADFS_FS is not set > -# CONFIG_AFFS_FS is not set > -# CONFIG_HFS_FS is not set > -# CONFIG_HFSPLUS_FS is not set > -# CONFIG_BEFS_FS is not set > -# CONFIG_BFS_FS is not set > -# CONFIG_EFS_FS is not set > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -# CONFIG_JFFS2_SUMMARY is not set > -# CONFIG_JFFS2_FS_XATTR is not set > -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -CONFIG_JFFS2_ZLIB=y > -# CONFIG_JFFS2_LZO is not set > -CONFIG_JFFS2_RTIME=y > -# CONFIG_JFFS2_RUBIN is not set > -CONFIG_CRAMFS=y > -# CONFIG_SQUASHFS is not set > -# CONFIG_VXFS_FS is not set > -CONFIG_MINIX_FS=m > -# CONFIG_OMFS_FS is not set > -# CONFIG_HPFS_FS is not set > -# CONFIG_QNX4FS_FS is not set > -# CONFIG_ROMFS_FS is not set > -# CONFIG_SYSV_FS is not set > -# CONFIG_UFS_FS is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -# CONFIG_NFS_V4 is not set > -CONFIG_ROOT_NFS=y > -CONFIG_NFSD=m > -CONFIG_NFSD_V3=y > -# CONFIG_NFSD_V3_ACL is not set > -# CONFIG_NFSD_V4 is not set > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_EXPORTFS=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -# CONFIG_RPCSEC_GSS_KRB5 is not set > -# CONFIG_RPCSEC_GSS_SPKM3 is not set > -CONFIG_SMB_FS=m > -# CONFIG_SMB_NLS_DEFAULT is not set > -# CONFIG_CIFS is not set > -# CONFIG_NCP_FS is not set > -# CONFIG_CODA_FS is not set > -# CONFIG_AFS_FS is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -# CONFIG_MAC_PARTITION is not set > -CONFIG_MSDOS_PARTITION=y > -# CONFIG_BSD_DISKLABEL is not set > -# CONFIG_MINIX_SUBPARTITION is not set > -# CONFIG_SOLARIS_X86_PARTITION is not set > -# CONFIG_UNIXWARE_DISKLABEL is not set > -# CONFIG_LDM_PARTITION is not set > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -# CONFIG_EFI_PARTITION is not set > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -# CONFIG_NLS_CODEPAGE_737 is not set > -# CONFIG_NLS_CODEPAGE_775 is not set > -# CONFIG_NLS_CODEPAGE_850 is not set > -# CONFIG_NLS_CODEPAGE_852 is not set > -# CONFIG_NLS_CODEPAGE_855 is not set > -# CONFIG_NLS_CODEPAGE_857 is not set > -# CONFIG_NLS_CODEPAGE_860 is not set > -# CONFIG_NLS_CODEPAGE_861 is not set > -# CONFIG_NLS_CODEPAGE_862 is not set > -# CONFIG_NLS_CODEPAGE_863 is not set > -# CONFIG_NLS_CODEPAGE_864 is not set > -# CONFIG_NLS_CODEPAGE_865 is not set > -# CONFIG_NLS_CODEPAGE_866 is not set > -# CONFIG_NLS_CODEPAGE_869 is not set > -# CONFIG_NLS_CODEPAGE_936 is not set > -# CONFIG_NLS_CODEPAGE_950 is not set > -# CONFIG_NLS_CODEPAGE_932 is not set > -# CONFIG_NLS_CODEPAGE_949 is not set > -# CONFIG_NLS_CODEPAGE_874 is not set > -# CONFIG_NLS_ISO8859_8 is not set > -# CONFIG_NLS_CODEPAGE_1250 is not set > -# CONFIG_NLS_CODEPAGE_1251 is not set > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -# CONFIG_NLS_ISO8859_2 is not set > -# CONFIG_NLS_ISO8859_3 is not set > -# CONFIG_NLS_ISO8859_4 is not set > -# CONFIG_NLS_ISO8859_5 is not set > -# CONFIG_NLS_ISO8859_6 is not set > -# CONFIG_NLS_ISO8859_7 is not set > -# CONFIG_NLS_ISO8859_9 is not set > -# CONFIG_NLS_ISO8859_13 is not set > -# CONFIG_NLS_ISO8859_14 is not set > -# CONFIG_NLS_ISO8859_15 is not set > -# CONFIG_NLS_KOI8_R is not set > -# CONFIG_NLS_KOI8_U is not set > -CONFIG_NLS_UTF8=m > -# CONFIG_DLM is not set > - > -# > -# Kernel hacking > -# > -# CONFIG_PRINTK_TIME is not set > -# CONFIG_ENABLE_WARN_DEPRECATED is not set > -# CONFIG_ENABLE_MUST_CHECK is not set > -CONFIG_FRAME_WARN=1024 > -# CONFIG_MAGIC_SYSRQ is not set > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -CONFIG_DEBUG_KERNEL=y > -# CONFIG_DEBUG_SHIRQ is not set > -CONFIG_DETECT_SOFTLOCKUP=y > -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set > -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 > -CONFIG_DETECT_HUNG_TASK=y > -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set > -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 > -CONFIG_SCHED_DEBUG=y > -# CONFIG_SCHEDSTATS is not set > -CONFIG_TIMER_STATS=y > -# CONFIG_DEBUG_OBJECTS is not set > -# CONFIG_SLUB_DEBUG_ON is not set > -# CONFIG_SLUB_STATS is not set > -# CONFIG_DEBUG_KMEMLEAK is not set > -CONFIG_DEBUG_PREEMPT=y > -# CONFIG_DEBUG_RT_MUTEXES is not set > -# CONFIG_RT_MUTEX_TESTER is not set > -# CONFIG_DEBUG_SPINLOCK is not set > -# CONFIG_DEBUG_MUTEXES is not set > -# CONFIG_DEBUG_LOCK_ALLOC is not set > -# CONFIG_PROVE_LOCKING is not set > -# CONFIG_LOCK_STAT is not set > -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set > -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set > -# CONFIG_DEBUG_KOBJECT is not set > -CONFIG_DEBUG_BUGVERBOSE=y > -# CONFIG_DEBUG_INFO is not set > -# CONFIG_DEBUG_VM is not set > -# CONFIG_DEBUG_WRITECOUNT is not set > -# CONFIG_DEBUG_MEMORY_INIT is not set > -# CONFIG_DEBUG_LIST is not set > -# CONFIG_DEBUG_SG is not set > -# CONFIG_DEBUG_NOTIFIERS is not set > -# CONFIG_DEBUG_CREDENTIALS is not set > -CONFIG_FRAME_POINTER=y > -# CONFIG_BOOT_PRINTK_DELAY is not set > -# CONFIG_RCU_TORTURE_TEST is not set > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_BACKTRACE_SELF_TEST is not set > -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set > -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set > -# CONFIG_FAULT_INJECTION is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -# CONFIG_PAGE_POISONING is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_TRACING_SUPPORT=y > -# CONFIG_FTRACE is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_KGDB is not set > -# CONFIG_ARM_UNWIND is not set > -# CONFIG_DEBUG_USER is not set > -# CONFIG_DEBUG_ERRORS is not set > -# CONFIG_DEBUG_STACK_USAGE is not set > -# CONFIG_DEBUG_LL is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -# CONFIG_KEYS is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -# CONFIG_DEFAULT_SECURITY_SMACK is not set > -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -# CONFIG_CRYPTO_MANAGER is not set > -# CONFIG_CRYPTO_MANAGER2 is not set > -# CONFIG_CRYPTO_GF128MUL is not set > -# CONFIG_CRYPTO_NULL is not set > -# CONFIG_CRYPTO_CRYPTD is not set > -# CONFIG_CRYPTO_AUTHENC is not set > -# CONFIG_CRYPTO_TEST is not set > - > -# > -# Authenticated Encryption with Associated Data > -# > -# CONFIG_CRYPTO_CCM is not set > -# CONFIG_CRYPTO_GCM is not set > -# CONFIG_CRYPTO_SEQIV is not set > - > -# > -# Block modes > -# > -# CONFIG_CRYPTO_CBC is not set > -# CONFIG_CRYPTO_CTR is not set > -# CONFIG_CRYPTO_CTS is not set > -# CONFIG_CRYPTO_ECB is not set > -# CONFIG_CRYPTO_LRW is not set > -# CONFIG_CRYPTO_PCBC is not set > -# CONFIG_CRYPTO_XTS is not set > - > -# > -# Hash modes > -# > -# CONFIG_CRYPTO_HMAC is not set > -# CONFIG_CRYPTO_XCBC is not set > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -# CONFIG_CRYPTO_CRC32C is not set > -# CONFIG_CRYPTO_GHASH is not set > -# CONFIG_CRYPTO_MD4 is not set > -# CONFIG_CRYPTO_MD5 is not set > -# CONFIG_CRYPTO_MICHAEL_MIC is not set > -# CONFIG_CRYPTO_RMD128 is not set > -# CONFIG_CRYPTO_RMD160 is not set > -# CONFIG_CRYPTO_RMD256 is not set > -# CONFIG_CRYPTO_RMD320 is not set > -# CONFIG_CRYPTO_SHA1 is not set > -# CONFIG_CRYPTO_SHA256 is not set > -# CONFIG_CRYPTO_SHA512 is not set > -# CONFIG_CRYPTO_TGR192 is not set > -# CONFIG_CRYPTO_WP512 is not set > - > -# > -# Ciphers > -# > -# CONFIG_CRYPTO_AES is not set > -# CONFIG_CRYPTO_ANUBIS is not set > -# CONFIG_CRYPTO_ARC4 is not set > -# CONFIG_CRYPTO_BLOWFISH is not set > -# CONFIG_CRYPTO_CAMELLIA is not set > -# CONFIG_CRYPTO_CAST5 is not set > -# CONFIG_CRYPTO_CAST6 is not set > -# CONFIG_CRYPTO_DES is not set > -# CONFIG_CRYPTO_FCRYPT is not set > -# CONFIG_CRYPTO_KHAZAD is not set > -# CONFIG_CRYPTO_SALSA20 is not set > -# CONFIG_CRYPTO_SEED is not set > -# CONFIG_CRYPTO_SERPENT is not set > -# CONFIG_CRYPTO_TEA is not set > -# CONFIG_CRYPTO_TWOFISH is not set > - > -# > -# Compression > -# > -# CONFIG_CRYPTO_DEFLATE is not set > -# CONFIG_CRYPTO_ZLIB is not set > -# CONFIG_CRYPTO_LZO is not set > - > -# > -# Random Number Generation > -# > -# CONFIG_CRYPTO_ANSI_CPRNG is not set > -# CONFIG_CRYPTO_HW is not set > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=m > -# CONFIG_CRC16 is not set > -CONFIG_CRC_T10DIF=m > -# CONFIG_CRC_ITU_T is not set > -CONFIG_CRC32=y > -# CONFIG_CRC7 is not set > -# CONFIG_LIBCRC32C is not set > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_GENERIC_ALLOCATOR=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > diff --git a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_nandnommc > b/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_nandnommc > deleted file mode 100644 > index 8b55763..0000000 > --- a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_nandnommc > +++ /dev/null > @@ -1,1886 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux kernel version: 2.6.33-rc4 > -# Thu Feb 18 17:57:55 2010 > -# > -CONFIG_ARM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_GENERIC_GPIO=y > -CONFIG_GENERIC_TIME=y > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_ZONE_DMA=y > -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -CONFIG_VECTORS_BASE=0xffff0000 > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_LOCK_KERNEL=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_BZIP2 is not set > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -# CONFIG_BSD_PROCESS_ACCT is not set > -# CONFIG_TASKSTATS is not set > -# CONFIG_AUDIT is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_RCU=y > -# CONFIG_TREE_PREEMPT_RCU is not set > -# CONFIG_TINY_RCU is not set > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=14 > -CONFIG_GROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -# CONFIG_RT_GROUP_SCHED is not set > -CONFIG_USER_SCHED=y > -# CONFIG_CGROUP_SCHED is not set > -# CONFIG_CGROUPS is not set > -# CONFIG_SYSFS_DEPRECATED_V2 is not set > -# CONFIG_RELAY is not set > -# CONFIG_NAMESPACES is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -# CONFIG_RD_BZIP2 is not set > -# CONFIG_RD_LZMA is not set > -# CONFIG_RD_LZO is not set > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EMBEDDED=y > -CONFIG_UID16=y > -CONFIG_SYSCTL_SYSCALL=y > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_VM_EVENT_COUNTERS=y > -CONFIG_SLUB_DEBUG=y > -CONFIG_COMPAT_BRK=y > -# CONFIG_SLAB is not set > -CONFIG_SLUB=y > -# CONFIG_SLOB is not set > -# CONFIG_PROFILING is not set > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_CLK=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -# CONFIG_SLOW_WORK is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -# CONFIG_MODULE_FORCE_LOAD is not set > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -# CONFIG_MODULE_SRCVERSION_ALL is not set > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -# CONFIG_BLK_DEV_BSG is not set > -# CONFIG_BLK_DEV_INTEGRITY is not set > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -# CONFIG_IOSCHED_DEADLINE is not set > -# CONFIG_IOSCHED_CFQ is not set > -# CONFIG_DEFAULT_DEADLINE is not set > -# CONFIG_DEFAULT_CFQ is not set > -CONFIG_DEFAULT_NOOP=y > -CONFIG_DEFAULT_IOSCHED="noop" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_AAEC2000 is not set > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_L7200 is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5PC1XX is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_LH7A40X is not set > -# CONFIG_ARCH_U300 is not set > -CONFIG_ARCH_DAVINCI=y > -# CONFIG_ARCH_OMAP is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_U8500 is not set > -CONFIG_CP_INTC=y > - > -# > -# TI DaVinci Implementations > -# > - > -# > -# DaVinci Core Type > -# > -# CONFIG_ARCH_DAVINCI_DM644x is not set > -# CONFIG_ARCH_DAVINCI_DM355 is not set > -# CONFIG_ARCH_DAVINCI_DM646x is not set > -# CONFIG_ARCH_DAVINCI_DA830 is not set > -CONFIG_ARCH_DAVINCI_DA850=y > -# CONFIG_DA8XX_MAX_SPEED_300 is not set > -# CONFIG_DA8XX_MAX_SPEED_372 is not set > -# CONFIG_DA8XX_MAX_SPEED_408 is not set > -CONFIG_DA8XX_MAX_SPEED_456=y > -CONFIG_ARCH_DAVINCI_DA8XX=y > -# CONFIG_ARCH_DAVINCI_DM365 is not set > - > -# > -# DaVinci Board Type > -# > -CONFIG_MACH_DAVINCI_DA850_EVM=y > -CONFIG_DA850_UI_NONE=y > -# CONFIG_DA850_UI_RMII is not set > -# CONFIG_DA850_UI_CLCD is not set > -# CONFIG_DA850_UI_VIDEO_PORT is not set > -CONFIG_DAVINCI_MUX=y > -# CONFIG_DAVINCI_MUX_DEBUG is not set > -# CONFIG_DAVINCI_MUX_WARNINGS is not set > -CONFIG_DAVINCI_RESET_CLOCKS=y > -# CONFIG_DAVINCI_MCBSP is not set > - > -# > -# Processor Type > -# > -CONFIG_CPU_ARM926T=y > -CONFIG_CPU_32v5=y > -CONFIG_CPU_ABRT_EV5TJ=y > -CONFIG_CPU_PABRT_LEGACY=y > -CONFIG_CPU_CACHE_VIVT=y > -CONFIG_CPU_COPY_V4WB=y > -CONFIG_CPU_TLB_V4WBI=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -CONFIG_ARM_L1_CACHE_SHIFT=5 > -CONFIG_COMMON_CLKDEV=y > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=100 > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -# CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=999999 > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=1 > -CONFIG_BOUNCE=y > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_LEDS=y > -# CONFIG_LEDS_CPU is not set > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE="" > -# CONFIG_XIP_KERNEL is not set > -# CONFIG_KEXEC is not set > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -# CONFIG_CPU_FREQ_STAT_DETAILS is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -# CONFIG_VFP is not set > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -# CONFIG_BINFMT_AOUT is not set > -# CONFIG_BINFMT_MISC is not set > - > -# > -# Power management options > -# > -CONFIG_PM=y > -# CONFIG_PM_DEBUG is not set > -CONFIG_PM_SLEEP=y > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -# CONFIG_APM_EMULATION is not set > -# CONFIG_PM_RUNTIME is not set > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -# CONFIG_PACKET_MMAP is not set > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -# CONFIG_NET_KEY is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_FIB_HASH=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -# CONFIG_IP_PNP_BOOTP is not set > -# CONFIG_IP_PNP_RARP is not set > -# CONFIG_NET_IPIP is not set > -# CONFIG_NET_IPGRE is not set > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -# CONFIG_INET_AH is not set > -# CONFIG_INET_ESP is not set > -# CONFIG_INET_IPCOMP is not set > -# CONFIG_INET_XFRM_TUNNEL is not set > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -# CONFIG_INET_LRO is not set > -CONFIG_INET_DIAG=y > -CONFIG_INET_TCP_DIAG=y > -# CONFIG_TCP_CONG_ADVANCED is not set > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -# CONFIG_INET6_AH is not set > -# CONFIG_INET6_ESP is not set > -# CONFIG_INET6_IPCOMP is not set > -# CONFIG_IPV6_MIP6 is not set > -# CONFIG_INET6_XFRM_TUNNEL is not set > -# CONFIG_INET6_TUNNEL is not set > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -# CONFIG_IPV6_TUNNEL is not set > -# CONFIG_IPV6_MULTIPLE_TABLES is not set > -# CONFIG_IPV6_MROUTE is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > - > -# > -# Core Netfilter Configuration > -# > -# CONFIG_NETFILTER_NETLINK_QUEUE is not set > -# CONFIG_NETFILTER_NETLINK_LOG is not set > -# CONFIG_NF_CONNTRACK is not set > -# CONFIG_NETFILTER_XTABLES is not set > -# CONFIG_IP_VS is not set > - > -# > -# IP: Netfilter Configuration > -# > -# CONFIG_NF_DEFRAG_IPV4 is not set > -# CONFIG_IP_NF_QUEUE is not set > -# CONFIG_IP_NF_IPTABLES is not set > -# CONFIG_IP_NF_ARPTABLES is not set > - > -# > -# IPv6: Netfilter Configuration > -# > -# CONFIG_IP6_NF_QUEUE is not set > -# CONFIG_IP6_NF_IPTABLES is not set > -# CONFIG_IP_DCCP is not set > -# CONFIG_IP_SCTP is not set > -# CONFIG_RDS is not set > -# CONFIG_TIPC is not set > -# CONFIG_ATM is not set > -# CONFIG_BRIDGE is not set > -# CONFIG_NET_DSA is not set > -# CONFIG_VLAN_8021Q is not set > -# CONFIG_DECNET is not set > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -# CONFIG_WAN_ROUTER is not set > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -# CONFIG_NET_SCHED is not set > -# CONFIG_DCB is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -# CONFIG_CAN is not set > -# CONFIG_IRDA is not set > -# CONFIG_BT is not set > -# CONFIG_AF_RXRPC is not set > -CONFIG_WIRELESS=y > -# CONFIG_CFG80211 is not set > -# CONFIG_LIB80211 is not set > - > -# > -# CFG80211 needs to be enabled for MAC80211 > -# > -# CONFIG_WIMAX is not set > -# CONFIG_RFKILL is not set > -# CONFIG_NET_9P is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > -# CONFIG_DEVTMPFS is not set > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -# CONFIG_FW_LOADER is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_CONCAT is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -# CONFIG_MTD_OOPS is not set > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -CONFIG_MTD_M25P80=y > -CONFIG_M25PXX_USE_FAST_READ=y > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -CONFIG_MTD_NAND=y > -# CONFIG_MTD_NAND_VERIFY_WRITE is not set > -# CONFIG_MTD_NAND_ECC_SMC is not set > -# CONFIG_MTD_NAND_MUSEUM_IDS is not set > -# CONFIG_MTD_NAND_GPIO is not set > -CONFIG_MTD_NAND_IDS=y > -# CONFIG_MTD_NAND_DISKONCHIP is not set > -# CONFIG_MTD_NAND_NANDSIM is not set > -# CONFIG_MTD_NAND_PLATFORM is not set > -# CONFIG_MTD_ALAUDA is not set > -CONFIG_MTD_NAND_DAVINCI=y > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > - > -# > -# UBI - Unsorted block images > -# > -# CONFIG_MTD_UBI is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=m > -# CONFIG_BLK_DEV_CRYPTOLOOP is not set > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=1 > -CONFIG_BLK_DEV_RAM_SIZE=32768 > -# CONFIG_BLK_DEV_XIP is not set > -# CONFIG_CDROM_PKTCDVD is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=y > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -# CONFIG_EEPROM_93CX6 is not set > -# CONFIG_IWMC3200TOP is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -# CONFIG_RAID_ATTRS is not set > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -# CONFIG_BLK_DEV_SR is not set > -CONFIG_CHR_DEV_SG=y > -# CONFIG_CHR_DEV_SCH is not set > -# CONFIG_SCSI_MULTI_LUN is not set > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -# CONFIG_SCSI_ISCSI_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -# CONFIG_ISCSI_TCP is not set > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -CONFIG_ATA=y > -# CONFIG_ATA_NONSTANDARD is not set > -CONFIG_ATA_VERBOSE_ERROR=y > -CONFIG_SATA_PMP=y > -CONFIG_SATA_AHCI=y > -# CONFIG_ATA_SFF is not set > -# CONFIG_MD is not set > -CONFIG_NETDEVICES=y > -# CONFIG_DUMMY is not set > -# CONFIG_BONDING is not set > -# CONFIG_MACVLAN is not set > -# CONFIG_EQUALIZER is not set > -# CONFIG_TUN is not set > -# CONFIG_VETH is not set > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -CONFIG_LXT_PHY=y > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -CONFIG_SMSC_PHY=y > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -CONFIG_LSI_ET1011C_PHY=y > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -CONFIG_MII=y > -# CONFIG_AX88796 is not set > -# CONFIG_SMC91X is not set > -CONFIG_TI_DAVINCI_EMAC=y > -# CONFIG_DM9000 is not set > -# CONFIG_ENC28J60 is not set > -# CONFIG_ETHOC is not set > -# CONFIG_SMC911X is not set > -# CONFIG_SMSC911X is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -# CONFIG_KS8842 is not set > -# CONFIG_KS8851 is not set > -# CONFIG_KS8851_MLL is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_USB_ZD1201 is not set > -# CONFIG_HOSTAP is not set > - > -# > -# Enable WiMAX (Networking options) to see the WiMAX drivers > -# > - > -# > -# USB Network Adapters > -# > -# CONFIG_USB_CATC is not set > -# CONFIG_USB_KAWETH is not set > -# CONFIG_USB_PEGASUS is not set > -# CONFIG_USB_RTL8150 is not set > -# CONFIG_USB_USBNET is not set > -# CONFIG_WAN is not set > -# CONFIG_PPP is not set > -# CONFIG_SLIP is not set > -CONFIG_NETCONSOLE=y > -# CONFIG_NETCONSOLE_DYNAMIC is not set > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -# CONFIG_INPUT_FF_MEMLESS is not set > -# CONFIG_INPUT_POLLDEV is not set > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -# CONFIG_INPUT_MOUSEDEV is not set > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -CONFIG_KEYBOARD_ATKBD=m > -# CONFIG_QT2160 is not set > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -CONFIG_KEYBOARD_XTKBD=m > -# CONFIG_INPUT_MOUSE is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2007 is not set > -# CONFIG_TOUCHSCREEN_TSC2004 is not set > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -CONFIG_TOUCHSCREEN_TPS6507X=y > -# CONFIG_INPUT_MISC is not set > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -# CONFIG_VT_CONSOLE is not set > -CONFIG_HW_CONSOLE=y > -# CONFIG_VT_HW_CONSOLE_BINDING is not set > -CONFIG_DEVKMEM=y > -# CONFIG_SERIAL_NONSTANDARD is not set > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=3 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -# CONFIG_SERIAL_8250_EXTENDED is not set > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -CONFIG_LEGACY_PTYS=y > -CONFIG_LEGACY_PTY_COUNT=8 > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=m > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=y > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -CONFIG_I2C_DAVINCI=y > -# CONFIG_I2C_DESIGNWARE is not set > -CONFIG_I2C_GPIO=y > -# CONFIG_I2C_OCORES is not set > -# CONFIG_I2C_SIMTEC is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_STUB is not set > - > -# > -# Miscellaneous I2C Chip support > -# > -# CONFIG_SENSORS_TSL2550 is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -# CONFIG_I2C_DEBUG_CHIP is not set > -CONFIG_SPI=y > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -CONFIG_SPI_DAVINCI=y > -CONFIG_SPI_BITBANG=y > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -# CONFIG_SPI_SPIDEV is not set > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_GPIO_SYSFS is not set > - > -# > -# Memory mapped GPIO expanders: > -# > - > -# > -# I2C GPIO expanders: > -# > -# CONFIG_GPIO_MAX732X is not set > -CONFIG_GPIO_PCA953X=y > -CONFIG_GPIO_PCF857X=y > -# CONFIG_GPIO_ADP5588 is not set > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > - > -# > -# AC97 GPIO expanders: > -# > -# CONFIG_W1 is not set > -# CONFIG_POWER_SUPPLY is not set > -# CONFIG_HWMON is not set > -# CONFIG_THERMAL is not set > -CONFIG_WATCHDOG=y > -# CONFIG_WATCHDOG_NOWAYOUT is not set > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_DAVINCI_WATCHDOG=y > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -# CONFIG_SSB is not set > - > -# > -# Multifunction device drivers > -# > -# CONFIG_MFD_CORE is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507x=y > -# CONFIG_TWL4030_CORE is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13783 is not set > -# CONFIG_AB3100_CORE is not set > -# CONFIG_EZX_PCAP is not set > -# CONFIG_MFD_88PM8607 is not set > -# CONFIG_AB4500_CORE is not set > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_TPS65023 is not set > -CONFIG_REGULATOR_TPS6507X=y > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_ALLOW_V4L1=y > -CONFIG_VIDEO_V4L1_COMPAT=y > -# CONFIG_DVB_CORE is not set > -CONFIG_VIDEO_MEDIA=y > - > -# > -# Multimedia drivers > -# > -CONFIG_IR_CORE=y > -CONFIG_VIDEO_IR=y > -# CONFIG_MEDIA_ATTACH is not set > -CONFIG_MEDIA_TUNER=y > -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set > -CONFIG_MEDIA_TUNER_SIMPLE=y > -CONFIG_MEDIA_TUNER_TDA8290=y > -CONFIG_MEDIA_TUNER_TDA9887=y > -CONFIG_MEDIA_TUNER_TEA5761=y > -CONFIG_MEDIA_TUNER_TEA5767=y > -CONFIG_MEDIA_TUNER_MT20XX=y > -CONFIG_MEDIA_TUNER_XC2028=y > -CONFIG_MEDIA_TUNER_XC5000=y > -CONFIG_MEDIA_TUNER_MC44S803=y > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEO_V4L1=y > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -# CONFIG_VIDEO_IR_I2C is not set > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TDA9875 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -# CONFIG_VIDEO_MSP3400 is not set > -# CONFIG_VIDEO_CS5345 is not set > -# CONFIG_VIDEO_CS53L32A is not set > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -# CONFIG_VIDEO_WM8775 is not set > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -# CONFIG_VIDEO_ADV7180 is not set > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -# CONFIG_VIDEO_MT9V011 is not set > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -# CONFIG_VIDEO_SAA711X is not set > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -# CONFIG_VIDEO_TVP514X is not set > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -# CONFIG_VIDEO_CX25840 is not set > - > -# > -# MPEG video encoders > -# > -# CONFIG_VIDEO_CX2341X is not set > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE is not set > -# CONFIG_VIDEO_VIVI is not set > -# CONFIG_VIDEO_VPSS_SYSTEM is not set > -# CONFIG_VIDEO_VPFE_CAPTURE is not set > -# CONFIG_VIDEO_CPIA is not set > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_SAA5246A is not set > -# CONFIG_VIDEO_SAA5249 is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=y > -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set > -# CONFIG_USB_GSPCA is not set > -# CONFIG_VIDEO_PVRUSB2 is not set > -# CONFIG_VIDEO_HDPVR is not set > -# CONFIG_VIDEO_EM28XX is not set > -# CONFIG_VIDEO_CX231XX is not set > -# CONFIG_VIDEO_USBVISION is not set > -# CONFIG_USB_VICAM is not set > -# CONFIG_USB_IBMCAM is not set > -# CONFIG_USB_KONICAWC is not set > -# CONFIG_USB_QUICKCAM_MESSENGER is not set > -# CONFIG_USB_ET61X251 is not set > -# CONFIG_VIDEO_OVCAMCHIP is not set > -# CONFIG_USB_OV511 is not set > -# CONFIG_USB_SE401 is not set > -# CONFIG_USB_SN9C102 is not set > -# CONFIG_USB_STV680 is not set > -# CONFIG_USB_ZC0301 is not set > -# CONFIG_USB_PWC is not set > -# CONFIG_USB_PWC_INPUT_EVDEV is not set > -# CONFIG_USB_ZR364XX is not set > -# CONFIG_USB_STKWEBCAM is not set > -# CONFIG_USB_S2255 is not set > -# CONFIG_RADIO_ADAPTERS is not set > -# CONFIG_DAB is not set > - > -# > -# Graphics support > -# > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -# CONFIG_FB_SYS_FILLRECT is not set > -# CONFIG_FB_SYS_COPYAREA is not set > -# CONFIG_FB_SYS_IMAGEBLIT is not set > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -# CONFIG_FB_SYS_FOPS is not set > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -# CONFIG_FB_MODE_HELPERS is not set > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_DAVINCI is not set > -# CONFIG_FB_VIRTUAL is not set > -CONFIG_FB_DA8XX=y > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > - > -# > -# Display device support > -# > -# CONFIG_DISPLAY_SUPPORT is not set > - > -# > -# Console display driver support > -# > -# CONFIG_VGA_CONSOLE is not set > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -CONFIG_LOGO_LINUX_MONO=y > -CONFIG_LOGO_LINUX_VGA16=y > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -# CONFIG_SOUND_OSS_CORE is not set > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -# CONFIG_SND_SEQUENCER is not set > -# CONFIG_SND_MIXER_OSS is not set > -# CONFIG_SND_PCM_OSS is not set > -# CONFIG_SND_HRTIMER is not set > -# CONFIG_SND_DYNAMIC_MINORS is not set > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -# CONFIG_SND_RAWMIDI_SEQ is not set > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -CONFIG_SND_ARM=y > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -# CONFIG_SND_USB_CAIAQ is not set > -CONFIG_SND_SOC=y > -CONFIG_SND_DAVINCI_SOC=y > -CONFIG_SND_DAVINCI_SOC_MCASP=y > -CONFIG_SND_DA850_SOC_EVM=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TLV320AIC3X=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_A4TECH is not set > -# CONFIG_HID_APPLE is not set > -# CONFIG_HID_BELKIN is not set > -# CONFIG_HID_CHERRY is not set > -# CONFIG_HID_CHICONY is not set > -# CONFIG_HID_CYPRESS is not set > -# CONFIG_HID_DRAGONRISE is not set > -# CONFIG_HID_EZKEY is not set > -# CONFIG_HID_KYE is not set > -# CONFIG_HID_GYRATION is not set > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -# CONFIG_HID_LOGITECH is not set > -# CONFIG_HID_MICROSOFT is not set > -# CONFIG_HID_MONTEREY is not set > -# CONFIG_HID_NTRIG is not set > -# CONFIG_HID_PANTHERLORD is not set > -# CONFIG_HID_PETALYNX is not set > -# CONFIG_HID_SAMSUNG is not set > -# CONFIG_HID_SONY is not set > -# CONFIG_HID_SUNPLUS is not set > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -# CONFIG_HID_TOPSEED is not set > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_ZEROPLUS is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -# CONFIG_USB_ARCH_HAS_EHCI is not set > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > - > -# > -# Miscellaneous USB options > -# > -# CONFIG_USB_DEVICEFS is not set > -# CONFIG_USB_DEVICE_CLASS is not set > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -# CONFIG_USB_OTG is not set > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -# CONFIG_USB_MON is not set > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -CONFIG_USB_OHCI_HCD=y > -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -CONFIG_USB_MUSB_SOC=y > -CONFIG_USB_MUSB_HOST=y > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -# CONFIG_USB_MUSB_OTG is not set > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_INVENTRA_DMA is not set > -# CONFIG_USB_TI_CPPI_DMA is not set > -CONFIG_USB_TI_CPPI41_DMA=y > -CONFIG_USB_MUSB_DEBUG=y > - > -# > -# USB Device Class drivers > -# > -# CONFIG_USB_ACM is not set > -# CONFIG_USB_PRINTER is not set > -# CONFIG_USB_WDM is not set > -# CONFIG_USB_TMC is not set > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -# CONFIG_USB_SERIAL is not set > - > -# > -# USB Miscellaneous drivers > -# > -# CONFIG_USB_EMI62 is not set > -# CONFIG_USB_EMI26 is not set > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -# CONFIG_USB_LEGOTOWER is not set > -# CONFIG_USB_LCD is not set > -# CONFIG_USB_BERRY_CHARGE is not set > -# CONFIG_USB_LED is not set > -# CONFIG_USB_CYPRESS_CY7C63 is not set > -# CONFIG_USB_CYTHERM is not set > -# CONFIG_USB_IDMOUSE is not set > -# CONFIG_USB_FTDI_ELAN is not set > -# CONFIG_USB_APPLEDISPLAY is not set > -# CONFIG_USB_SISUSBVGA is not set > -# CONFIG_USB_LD is not set > -# CONFIG_USB_TRANCEVIBRATOR is not set > -# CONFIG_USB_IOWARRIOR is not set > -# CONFIG_USB_TEST is not set > -# CONFIG_USB_ISIGHTFW is not set > -# CONFIG_USB_VST is not set > -# CONFIG_USB_GADGET is not set > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -# CONFIG_USB_GPIO_VBUS is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -# CONFIG_MMC_UNSAFE_RESUME is not set > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_BOUNCE=y > -# CONFIG_SDIO_UART is not set > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_AT91 is not set > -# CONFIG_MMC_ATMELMCI is not set > -# CONFIG_MMC_DAVINCI is not set > -# CONFIG_MMC_SPI is not set > -# CONFIG_MEMSTICK is not set > -# CONFIG_NEW_LEDS is not set > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -# CONFIG_RTC_DRV_DS1307 is not set > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -# CONFIG_RTC_DRV_BQ32K is not set > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -CONFIG_RTC_DRV_OMAP=y > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -# CONFIG_UIO is not set > - > -# > -# TI VLYNQ > -# > -# CONFIG_STAGING is not set > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -# CONFIG_EXT3_FS_POSIX_ACL is not set > -# CONFIG_EXT3_FS_SECURITY is not set > -# CONFIG_EXT4_FS is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -# CONFIG_REISERFS_FS is not set > -# CONFIG_JFS_FS is not set > -# CONFIG_FS_POSIX_ACL is not set > -# CONFIG_XFS_FS is not set > -# CONFIG_GFS2_FS is not set > -# CONFIG_OCFS2_FS is not set > -# CONFIG_BTRFS_FS is not set > -# CONFIG_NILFS2_FS is not set > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY=y > -CONFIG_INOTIFY_USER=y > -# CONFIG_QUOTA is not set > -# CONFIG_AUTOFS_FS is not set > -CONFIG_AUTOFS4_FS=m > -# CONFIG_FUSE_FS is not set > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -# CONFIG_ISO9660_FS is not set > -# CONFIG_UDF_FS is not set > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -# CONFIG_NTFS_FS is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -# CONFIG_TMPFS_POSIX_ACL is not set > -# CONFIG_HUGETLB_PAGE is not set > -# CONFIG_CONFIGFS_FS is not set > -CONFIG_MISC_FILESYSTEMS=y > -# CONFIG_ADFS_FS is not set > -# CONFIG_AFFS_FS is not set > -# CONFIG_HFS_FS is not set > -# CONFIG_HFSPLUS_FS is not set > -# CONFIG_BEFS_FS is not set > -# CONFIG_BFS_FS is not set > -# CONFIG_EFS_FS is not set > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -# CONFIG_JFFS2_SUMMARY is not set > -# CONFIG_JFFS2_FS_XATTR is not set > -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -CONFIG_JFFS2_ZLIB=y > -# CONFIG_JFFS2_LZO is not set > -CONFIG_JFFS2_RTIME=y > -# CONFIG_JFFS2_RUBIN is not set > -CONFIG_CRAMFS=y > -# CONFIG_SQUASHFS is not set > -# CONFIG_VXFS_FS is not set > -CONFIG_MINIX_FS=m > -# CONFIG_OMFS_FS is not set > -# CONFIG_HPFS_FS is not set > -# CONFIG_QNX4FS_FS is not set > -# CONFIG_ROMFS_FS is not set > -# CONFIG_SYSV_FS is not set > -# CONFIG_UFS_FS is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -# CONFIG_NFS_V4 is not set > -CONFIG_ROOT_NFS=y > -CONFIG_NFSD=m > -CONFIG_NFSD_V3=y > -# CONFIG_NFSD_V3_ACL is not set > -# CONFIG_NFSD_V4 is not set > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_EXPORTFS=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -# CONFIG_RPCSEC_GSS_KRB5 is not set > -# CONFIG_RPCSEC_GSS_SPKM3 is not set > -CONFIG_SMB_FS=m > -# CONFIG_SMB_NLS_DEFAULT is not set > -# CONFIG_CIFS is not set > -# CONFIG_NCP_FS is not set > -# CONFIG_CODA_FS is not set > -# CONFIG_AFS_FS is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -# CONFIG_MAC_PARTITION is not set > -CONFIG_MSDOS_PARTITION=y > -# CONFIG_BSD_DISKLABEL is not set > -# CONFIG_MINIX_SUBPARTITION is not set > -# CONFIG_SOLARIS_X86_PARTITION is not set > -# CONFIG_UNIXWARE_DISKLABEL is not set > -# CONFIG_LDM_PARTITION is not set > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -# CONFIG_EFI_PARTITION is not set > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -# CONFIG_NLS_CODEPAGE_737 is not set > -# CONFIG_NLS_CODEPAGE_775 is not set > -# CONFIG_NLS_CODEPAGE_850 is not set > -# CONFIG_NLS_CODEPAGE_852 is not set > -# CONFIG_NLS_CODEPAGE_855 is not set > -# CONFIG_NLS_CODEPAGE_857 is not set > -# CONFIG_NLS_CODEPAGE_860 is not set > -# CONFIG_NLS_CODEPAGE_861 is not set > -# CONFIG_NLS_CODEPAGE_862 is not set > -# CONFIG_NLS_CODEPAGE_863 is not set > -# CONFIG_NLS_CODEPAGE_864 is not set > -# CONFIG_NLS_CODEPAGE_865 is not set > -# CONFIG_NLS_CODEPAGE_866 is not set > -# CONFIG_NLS_CODEPAGE_869 is not set > -# CONFIG_NLS_CODEPAGE_936 is not set > -# CONFIG_NLS_CODEPAGE_950 is not set > -# CONFIG_NLS_CODEPAGE_932 is not set > -# CONFIG_NLS_CODEPAGE_949 is not set > -# CONFIG_NLS_CODEPAGE_874 is not set > -# CONFIG_NLS_ISO8859_8 is not set > -# CONFIG_NLS_CODEPAGE_1250 is not set > -# CONFIG_NLS_CODEPAGE_1251 is not set > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -# CONFIG_NLS_ISO8859_2 is not set > -# CONFIG_NLS_ISO8859_3 is not set > -# CONFIG_NLS_ISO8859_4 is not set > -# CONFIG_NLS_ISO8859_5 is not set > -# CONFIG_NLS_ISO8859_6 is not set > -# CONFIG_NLS_ISO8859_7 is not set > -# CONFIG_NLS_ISO8859_9 is not set > -# CONFIG_NLS_ISO8859_13 is not set > -# CONFIG_NLS_ISO8859_14 is not set > -# CONFIG_NLS_ISO8859_15 is not set > -# CONFIG_NLS_KOI8_R is not set > -# CONFIG_NLS_KOI8_U is not set > -CONFIG_NLS_UTF8=m > -# CONFIG_DLM is not set > - > -# > -# Kernel hacking > -# > -# CONFIG_PRINTK_TIME is not set > -# CONFIG_ENABLE_WARN_DEPRECATED is not set > -# CONFIG_ENABLE_MUST_CHECK is not set > -CONFIG_FRAME_WARN=1024 > -# CONFIG_MAGIC_SYSRQ is not set > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -# CONFIG_DEBUG_KERNEL is not set > -# CONFIG_SLUB_DEBUG_ON is not set > -# CONFIG_SLUB_STATS is not set > -CONFIG_DEBUG_BUGVERBOSE=y > -# CONFIG_DEBUG_MEMORY_INIT is not set > -CONFIG_FRAME_POINTER=y > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_TRACING_SUPPORT=y > -# CONFIG_FTRACE is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_ARM_UNWIND is not set > -# CONFIG_DEBUG_USER is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -# CONFIG_KEYS is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -# CONFIG_DEFAULT_SECURITY_SMACK is not set > -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -# CONFIG_CRYPTO_MANAGER is not set > -# CONFIG_CRYPTO_MANAGER2 is not set > -# CONFIG_CRYPTO_GF128MUL is not set > -# CONFIG_CRYPTO_NULL is not set > -# CONFIG_CRYPTO_CRYPTD is not set > -# CONFIG_CRYPTO_AUTHENC is not set > -# CONFIG_CRYPTO_TEST is not set > - > -# > -# Authenticated Encryption with Associated Data > -# > -# CONFIG_CRYPTO_CCM is not set > -# CONFIG_CRYPTO_GCM is not set > -# CONFIG_CRYPTO_SEQIV is not set > - > -# > -# Block modes > -# > -# CONFIG_CRYPTO_CBC is not set > -# CONFIG_CRYPTO_CTR is not set > -# CONFIG_CRYPTO_CTS is not set > -# CONFIG_CRYPTO_ECB is not set > -# CONFIG_CRYPTO_LRW is not set > -# CONFIG_CRYPTO_PCBC is not set > -# CONFIG_CRYPTO_XTS is not set > - > -# > -# Hash modes > -# > -# CONFIG_CRYPTO_HMAC is not set > -# CONFIG_CRYPTO_XCBC is not set > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -# CONFIG_CRYPTO_CRC32C is not set > -# CONFIG_CRYPTO_GHASH is not set > -# CONFIG_CRYPTO_MD4 is not set > -# CONFIG_CRYPTO_MD5 is not set > -# CONFIG_CRYPTO_MICHAEL_MIC is not set > -# CONFIG_CRYPTO_RMD128 is not set > -# CONFIG_CRYPTO_RMD160 is not set > -# CONFIG_CRYPTO_RMD256 is not set > -# CONFIG_CRYPTO_RMD320 is not set > -# CONFIG_CRYPTO_SHA1 is not set > -# CONFIG_CRYPTO_SHA256 is not set > -# CONFIG_CRYPTO_SHA512 is not set > -# CONFIG_CRYPTO_TGR192 is not set > -# CONFIG_CRYPTO_WP512 is not set > - > -# > -# Ciphers > -# > -# CONFIG_CRYPTO_AES is not set > -# CONFIG_CRYPTO_ANUBIS is not set > -# CONFIG_CRYPTO_ARC4 is not set > -# CONFIG_CRYPTO_BLOWFISH is not set > -# CONFIG_CRYPTO_CAMELLIA is not set > -# CONFIG_CRYPTO_CAST5 is not set > -# CONFIG_CRYPTO_CAST6 is not set > -# CONFIG_CRYPTO_DES is not set > -# CONFIG_CRYPTO_FCRYPT is not set > -# CONFIG_CRYPTO_KHAZAD is not set > -# CONFIG_CRYPTO_SALSA20 is not set > -# CONFIG_CRYPTO_SEED is not set > -# CONFIG_CRYPTO_SERPENT is not set > -# CONFIG_CRYPTO_TEA is not set > -# CONFIG_CRYPTO_TWOFISH is not set > - > -# > -# Compression > -# > -# CONFIG_CRYPTO_DEFLATE is not set > -# CONFIG_CRYPTO_ZLIB is not set > -# CONFIG_CRYPTO_LZO is not set > - > -# > -# Random Number Generation > -# > -# CONFIG_CRYPTO_ANSI_CPRNG is not set > -# CONFIG_CRYPTO_HW is not set > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=m > -# CONFIG_CRC16 is not set > -CONFIG_CRC_T10DIF=m > -# CONFIG_CRC_ITU_T is not set > -CONFIG_CRC32=y > -# CONFIG_CRC7 is not set > -# CONFIG_LIBCRC32C is not set > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_GENERIC_ALLOCATOR=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > diff --git a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_uivideocap b/recipes- > kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_uivideocap > deleted file mode 100644 > index 0597147..0000000 > --- a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_uivideocap > +++ /dev/null > @@ -1,1874 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux kernel version: 2.6.33-rc4 > -# Mon Feb 15 17:09:13 2010 > -# > -CONFIG_ARM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_GENERIC_GPIO=y > -CONFIG_GENERIC_TIME=y > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_ZONE_DMA=y > -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -CONFIG_VECTORS_BASE=0xffff0000 > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_LOCK_KERNEL=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_BZIP2 is not set > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -# CONFIG_BSD_PROCESS_ACCT is not set > -# CONFIG_TASKSTATS is not set > -# CONFIG_AUDIT is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_RCU=y > -# CONFIG_TREE_PREEMPT_RCU is not set > -# CONFIG_TINY_RCU is not set > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=14 > -CONFIG_GROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -# CONFIG_RT_GROUP_SCHED is not set > -CONFIG_USER_SCHED=y > -# CONFIG_CGROUP_SCHED is not set > -# CONFIG_CGROUPS is not set > -# CONFIG_SYSFS_DEPRECATED_V2 is not set > -# CONFIG_RELAY is not set > -# CONFIG_NAMESPACES is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -# CONFIG_RD_BZIP2 is not set > -# CONFIG_RD_LZMA is not set > -# CONFIG_RD_LZO is not set > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EMBEDDED=y > -CONFIG_UID16=y > -CONFIG_SYSCTL_SYSCALL=y > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_VM_EVENT_COUNTERS=y > -CONFIG_SLUB_DEBUG=y > -CONFIG_COMPAT_BRK=y > -# CONFIG_SLAB is not set > -CONFIG_SLUB=y > -# CONFIG_SLOB is not set > -# CONFIG_PROFILING is not set > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_CLK=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -# CONFIG_SLOW_WORK is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -# CONFIG_MODULE_FORCE_LOAD is not set > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -# CONFIG_MODULE_SRCVERSION_ALL is not set > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -# CONFIG_BLK_DEV_BSG is not set > -# CONFIG_BLK_DEV_INTEGRITY is not set > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -# CONFIG_IOSCHED_DEADLINE is not set > -# CONFIG_IOSCHED_CFQ is not set > -# CONFIG_DEFAULT_DEADLINE is not set > -# CONFIG_DEFAULT_CFQ is not set > -CONFIG_DEFAULT_NOOP=y > -CONFIG_DEFAULT_IOSCHED="noop" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_AAEC2000 is not set > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_L7200 is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5PC1XX is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_LH7A40X is not set > -# CONFIG_ARCH_U300 is not set > -CONFIG_ARCH_DAVINCI=y > -# CONFIG_ARCH_OMAP is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_U8500 is not set > -CONFIG_CP_INTC=y > - > -# > -# TI DaVinci Implementations > -# > - > -# > -# DaVinci Core Type > -# > -# CONFIG_ARCH_DAVINCI_DM644x is not set > -# CONFIG_ARCH_DAVINCI_DM355 is not set > -# CONFIG_ARCH_DAVINCI_DM646x is not set > -# CONFIG_ARCH_DAVINCI_DA830 is not set > -CONFIG_ARCH_DAVINCI_DA850=y > -CONFIG_DA8XX_MAX_SPEED_300=y > -# CONFIG_DA8XX_MAX_SPEED_372 is not set > -# CONFIG_DA8XX_MAX_SPEED_408 is not set > -# CONFIG_DA8XX_MAX_SPEED_456 is not set > -CONFIG_ARCH_DAVINCI_DA8XX=y > -# CONFIG_ARCH_DAVINCI_DM365 is not set > - > -# > -# DaVinci Board Type > -# > -CONFIG_MACH_DAVINCI_DA850_EVM=y > -# CONFIG_DA850_UI_NONE is not set > -# CONFIG_DA850_UI_RMII is not set > -# CONFIG_DA850_UI_CLCD is not set > -CONFIG_DA850_UI_VIDEO_PORT=y > -CONFIG_DAVINCI_MUX=y > -# CONFIG_DAVINCI_MUX_DEBUG is not set > -# CONFIG_DAVINCI_MUX_WARNINGS is not set > -CONFIG_DAVINCI_RESET_CLOCKS=y > -# CONFIG_DAVINCI_MCBSP is not set > - > -# > -# Processor Type > -# > -CONFIG_CPU_ARM926T=y > -CONFIG_CPU_32v5=y > -CONFIG_CPU_ABRT_EV5TJ=y > -CONFIG_CPU_PABRT_LEGACY=y > -CONFIG_CPU_CACHE_VIVT=y > -CONFIG_CPU_COPY_V4WB=y > -CONFIG_CPU_TLB_V4WBI=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -CONFIG_ARM_L1_CACHE_SHIFT=5 > -CONFIG_COMMON_CLKDEV=y > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=100 > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -# CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=999999 > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=1 > -CONFIG_BOUNCE=y > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_LEDS=y > -# CONFIG_LEDS_CPU is not set > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE="" > -# CONFIG_XIP_KERNEL is not set > -# CONFIG_KEXEC is not set > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -# CONFIG_CPU_FREQ_STAT_DETAILS is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -# CONFIG_VFP is not set > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -# CONFIG_BINFMT_AOUT is not set > -# CONFIG_BINFMT_MISC is not set > - > -# > -# Power management options > -# > -CONFIG_PM=y > -# CONFIG_PM_DEBUG is not set > -CONFIG_PM_SLEEP=y > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -# CONFIG_APM_EMULATION is not set > -# CONFIG_PM_RUNTIME is not set > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -# CONFIG_PACKET_MMAP is not set > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -# CONFIG_NET_KEY is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_FIB_HASH=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -# CONFIG_IP_PNP_BOOTP is not set > -# CONFIG_IP_PNP_RARP is not set > -# CONFIG_NET_IPIP is not set > -# CONFIG_NET_IPGRE is not set > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -# CONFIG_INET_AH is not set > -# CONFIG_INET_ESP is not set > -# CONFIG_INET_IPCOMP is not set > -# CONFIG_INET_XFRM_TUNNEL is not set > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -# CONFIG_INET_LRO is not set > -CONFIG_INET_DIAG=y > -CONFIG_INET_TCP_DIAG=y > -# CONFIG_TCP_CONG_ADVANCED is not set > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -# CONFIG_INET6_AH is not set > -# CONFIG_INET6_ESP is not set > -# CONFIG_INET6_IPCOMP is not set > -# CONFIG_IPV6_MIP6 is not set > -# CONFIG_INET6_XFRM_TUNNEL is not set > -# CONFIG_INET6_TUNNEL is not set > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -# CONFIG_IPV6_TUNNEL is not set > -# CONFIG_IPV6_MULTIPLE_TABLES is not set > -# CONFIG_IPV6_MROUTE is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > - > -# > -# Core Netfilter Configuration > -# > -# CONFIG_NETFILTER_NETLINK_QUEUE is not set > -# CONFIG_NETFILTER_NETLINK_LOG is not set > -# CONFIG_NF_CONNTRACK is not set > -# CONFIG_NETFILTER_XTABLES is not set > -# CONFIG_IP_VS is not set > - > -# > -# IP: Netfilter Configuration > -# > -# CONFIG_NF_DEFRAG_IPV4 is not set > -# CONFIG_IP_NF_QUEUE is not set > -# CONFIG_IP_NF_IPTABLES is not set > -# CONFIG_IP_NF_ARPTABLES is not set > - > -# > -# IPv6: Netfilter Configuration > -# > -# CONFIG_IP6_NF_QUEUE is not set > -# CONFIG_IP6_NF_IPTABLES is not set > -# CONFIG_IP_DCCP is not set > -# CONFIG_IP_SCTP is not set > -# CONFIG_RDS is not set > -# CONFIG_TIPC is not set > -# CONFIG_ATM is not set > -# CONFIG_BRIDGE is not set > -# CONFIG_NET_DSA is not set > -# CONFIG_VLAN_8021Q is not set > -# CONFIG_DECNET is not set > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -# CONFIG_WAN_ROUTER is not set > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -# CONFIG_NET_SCHED is not set > -# CONFIG_DCB is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -# CONFIG_CAN is not set > -# CONFIG_IRDA is not set > -# CONFIG_BT is not set > -# CONFIG_AF_RXRPC is not set > -CONFIG_WIRELESS=y > -# CONFIG_CFG80211 is not set > -# CONFIG_LIB80211 is not set > - > -# > -# CFG80211 needs to be enabled for MAC80211 > -# > -# CONFIG_WIMAX is not set > -# CONFIG_RFKILL is not set > -# CONFIG_NET_9P is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > -# CONFIG_DEVTMPFS is not set > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -# CONFIG_FW_LOADER is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_CONCAT is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -# CONFIG_MTD_OOPS is not set > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -CONFIG_MTD_M25P80=y > -CONFIG_M25PXX_USE_FAST_READ=y > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -# CONFIG_MTD_NAND is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > - > -# > -# UBI - Unsorted block images > -# > -# CONFIG_MTD_UBI is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=m > -# CONFIG_BLK_DEV_CRYPTOLOOP is not set > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=1 > -CONFIG_BLK_DEV_RAM_SIZE=32768 > -# CONFIG_BLK_DEV_XIP is not set > -# CONFIG_CDROM_PKTCDVD is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=y > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -# CONFIG_EEPROM_93CX6 is not set > -# CONFIG_IWMC3200TOP is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -# CONFIG_RAID_ATTRS is not set > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -# CONFIG_BLK_DEV_SR is not set > -CONFIG_CHR_DEV_SG=y > -# CONFIG_CHR_DEV_SCH is not set > -# CONFIG_SCSI_MULTI_LUN is not set > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -# CONFIG_SCSI_ISCSI_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -# CONFIG_ISCSI_TCP is not set > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -# CONFIG_ATA is not set > -# CONFIG_MD is not set > -CONFIG_NETDEVICES=y > -# CONFIG_DUMMY is not set > -# CONFIG_BONDING is not set > -# CONFIG_MACVLAN is not set > -# CONFIG_EQUALIZER is not set > -# CONFIG_TUN is not set > -# CONFIG_VETH is not set > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -CONFIG_LXT_PHY=y > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -CONFIG_SMSC_PHY=y > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -CONFIG_LSI_ET1011C_PHY=y > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -CONFIG_MII=y > -# CONFIG_AX88796 is not set > -# CONFIG_SMC91X is not set > -CONFIG_TI_DAVINCI_EMAC=y > -# CONFIG_DM9000 is not set > -# CONFIG_ENC28J60 is not set > -# CONFIG_ETHOC is not set > -# CONFIG_SMC911X is not set > -# CONFIG_SMSC911X is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -# CONFIG_KS8842 is not set > -# CONFIG_KS8851 is not set > -# CONFIG_KS8851_MLL is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_USB_ZD1201 is not set > -# CONFIG_HOSTAP is not set > - > -# > -# Enable WiMAX (Networking options) to see the WiMAX drivers > -# > - > -# > -# USB Network Adapters > -# > -# CONFIG_USB_CATC is not set > -# CONFIG_USB_KAWETH is not set > -# CONFIG_USB_PEGASUS is not set > -# CONFIG_USB_RTL8150 is not set > -# CONFIG_USB_USBNET is not set > -# CONFIG_WAN is not set > -# CONFIG_PPP is not set > -# CONFIG_SLIP is not set > -CONFIG_NETCONSOLE=y > -# CONFIG_NETCONSOLE_DYNAMIC is not set > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -# CONFIG_INPUT_FF_MEMLESS is not set > -# CONFIG_INPUT_POLLDEV is not set > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -# CONFIG_INPUT_MOUSEDEV is not set > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -CONFIG_KEYBOARD_ATKBD=m > -# CONFIG_QT2160 is not set > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -CONFIG_KEYBOARD_XTKBD=m > -# CONFIG_INPUT_MOUSE is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2007 is not set > -# CONFIG_TOUCHSCREEN_TSC2004 is not set > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -CONFIG_TOUCHSCREEN_TPS6507X=y > -# CONFIG_INPUT_MISC is not set > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -# CONFIG_VT_CONSOLE is not set > -CONFIG_HW_CONSOLE=y > -# CONFIG_VT_HW_CONSOLE_BINDING is not set > -CONFIG_DEVKMEM=y > -# CONFIG_SERIAL_NONSTANDARD is not set > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=3 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -# CONFIG_SERIAL_8250_EXTENDED is not set > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -CONFIG_LEGACY_PTYS=y > -CONFIG_LEGACY_PTY_COUNT=8 > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=m > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=y > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -CONFIG_I2C_DAVINCI=y > -# CONFIG_I2C_DESIGNWARE is not set > -CONFIG_I2C_GPIO=y > -# CONFIG_I2C_OCORES is not set > -# CONFIG_I2C_SIMTEC is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_STUB is not set > - > -# > -# Miscellaneous I2C Chip support > -# > -# CONFIG_SENSORS_TSL2550 is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -# CONFIG_I2C_DEBUG_CHIP is not set > -CONFIG_SPI=y > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -CONFIG_SPI_DAVINCI=y > -CONFIG_SPI_BITBANG=y > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -# CONFIG_SPI_SPIDEV is not set > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_GPIO_SYSFS is not set > - > -# > -# Memory mapped GPIO expanders: > -# > - > -# > -# I2C GPIO expanders: > -# > -# CONFIG_GPIO_MAX732X is not set > -CONFIG_GPIO_PCA953X=y > -CONFIG_GPIO_PCF857X=y > -# CONFIG_GPIO_ADP5588 is not set > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > - > -# > -# AC97 GPIO expanders: > -# > -# CONFIG_W1 is not set > -# CONFIG_POWER_SUPPLY is not set > -# CONFIG_HWMON is not set > -# CONFIG_THERMAL is not set > -CONFIG_WATCHDOG=y > -# CONFIG_WATCHDOG_NOWAYOUT is not set > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_DAVINCI_WATCHDOG=y > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -# CONFIG_SSB is not set > - > -# > -# Multifunction device drivers > -# > -# CONFIG_MFD_CORE is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507x=y > -# CONFIG_TWL4030_CORE is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13783 is not set > -# CONFIG_AB3100_CORE is not set > -# CONFIG_EZX_PCAP is not set > -# CONFIG_MFD_88PM8607 is not set > -# CONFIG_AB4500_CORE is not set > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_TPS65023 is not set > -CONFIG_REGULATOR_TPS6507X=y > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_ALLOW_V4L1=y > -CONFIG_VIDEO_V4L1_COMPAT=y > -# CONFIG_DVB_CORE is not set > -CONFIG_VIDEO_MEDIA=y > - > -# > -# Multimedia drivers > -# > -CONFIG_IR_CORE=y > -CONFIG_VIDEO_IR=y > -# CONFIG_MEDIA_ATTACH is not set > -CONFIG_MEDIA_TUNER=y > -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set > -CONFIG_MEDIA_TUNER_SIMPLE=y > -CONFIG_MEDIA_TUNER_TDA8290=y > -CONFIG_MEDIA_TUNER_TDA9887=y > -CONFIG_MEDIA_TUNER_TEA5761=y > -CONFIG_MEDIA_TUNER_TEA5767=y > -CONFIG_MEDIA_TUNER_MT20XX=y > -CONFIG_MEDIA_TUNER_XC2028=y > -CONFIG_MEDIA_TUNER_XC5000=y > -CONFIG_MEDIA_TUNER_MC44S803=y > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEO_V4L1=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -# CONFIG_VIDEO_IR_I2C is not set > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TDA9875 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -# CONFIG_VIDEO_MSP3400 is not set > -# CONFIG_VIDEO_CS5345 is not set > -# CONFIG_VIDEO_CS53L32A is not set > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -# CONFIG_VIDEO_WM8775 is not set > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -# CONFIG_VIDEO_ADV7180 is not set > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -# CONFIG_VIDEO_MT9V011 is not set > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -# CONFIG_VIDEO_SAA711X is not set > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -CONFIG_VIDEO_TVP514X=y > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -# CONFIG_VIDEO_CX25840 is not set > - > -# > -# MPEG video encoders > -# > -# CONFIG_VIDEO_CX2341X is not set > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set > -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y > -CONFIG_VIDEO_DAVINCI_VPIF=y > -# CONFIG_VIDEO_VIVI is not set > -# CONFIG_VIDEO_VPSS_SYSTEM is not set > -# CONFIG_VIDEO_VPFE_CAPTURE is not set > -# CONFIG_VIDEO_CPIA is not set > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_SAA5246A is not set > -# CONFIG_VIDEO_SAA5249 is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=y > -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set > -# CONFIG_USB_GSPCA is not set > -# CONFIG_VIDEO_PVRUSB2 is not set > -# CONFIG_VIDEO_HDPVR is not set > -# CONFIG_VIDEO_EM28XX is not set > -# CONFIG_VIDEO_CX231XX is not set > -# CONFIG_VIDEO_USBVISION is not set > -# CONFIG_USB_VICAM is not set > -# CONFIG_USB_IBMCAM is not set > -# CONFIG_USB_KONICAWC is not set > -# CONFIG_USB_QUICKCAM_MESSENGER is not set > -# CONFIG_USB_ET61X251 is not set > -# CONFIG_VIDEO_OVCAMCHIP is not set > -# CONFIG_USB_OV511 is not set > -# CONFIG_USB_SE401 is not set > -# CONFIG_USB_SN9C102 is not set > -# CONFIG_USB_STV680 is not set > -# CONFIG_USB_ZC0301 is not set > -# CONFIG_USB_PWC is not set > -# CONFIG_USB_PWC_INPUT_EVDEV is not set > -# CONFIG_USB_ZR364XX is not set > -# CONFIG_USB_STKWEBCAM is not set > -# CONFIG_USB_S2255 is not set > -# CONFIG_RADIO_ADAPTERS is not set > -# CONFIG_DAB is not set > - > -# > -# Graphics support > -# > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -# CONFIG_FB_SYS_FILLRECT is not set > -# CONFIG_FB_SYS_COPYAREA is not set > -# CONFIG_FB_SYS_IMAGEBLIT is not set > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -# CONFIG_FB_SYS_FOPS is not set > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -# CONFIG_FB_MODE_HELPERS is not set > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_DAVINCI is not set > -# CONFIG_FB_VIRTUAL is not set > -CONFIG_FB_DA8XX=y > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > - > -# > -# Display device support > -# > -# CONFIG_DISPLAY_SUPPORT is not set > - > -# > -# Console display driver support > -# > -# CONFIG_VGA_CONSOLE is not set > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -CONFIG_LOGO_LINUX_MONO=y > -CONFIG_LOGO_LINUX_VGA16=y > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -# CONFIG_SOUND_OSS_CORE is not set > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -# CONFIG_SND_SEQUENCER is not set > -# CONFIG_SND_MIXER_OSS is not set > -# CONFIG_SND_PCM_OSS is not set > -# CONFIG_SND_HRTIMER is not set > -# CONFIG_SND_DYNAMIC_MINORS is not set > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -# CONFIG_SND_RAWMIDI_SEQ is not set > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -CONFIG_SND_ARM=y > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -# CONFIG_SND_USB_CAIAQ is not set > -CONFIG_SND_SOC=y > -CONFIG_SND_DAVINCI_SOC=y > -CONFIG_SND_DAVINCI_SOC_MCASP=y > -CONFIG_SND_DA850_SOC_EVM=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TLV320AIC3X=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_A4TECH is not set > -# CONFIG_HID_APPLE is not set > -# CONFIG_HID_BELKIN is not set > -# CONFIG_HID_CHERRY is not set > -# CONFIG_HID_CHICONY is not set > -# CONFIG_HID_CYPRESS is not set > -# CONFIG_HID_DRAGONRISE is not set > -# CONFIG_HID_EZKEY is not set > -# CONFIG_HID_KYE is not set > -# CONFIG_HID_GYRATION is not set > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -# CONFIG_HID_LOGITECH is not set > -# CONFIG_HID_MICROSOFT is not set > -# CONFIG_HID_MONTEREY is not set > -# CONFIG_HID_NTRIG is not set > -# CONFIG_HID_PANTHERLORD is not set > -# CONFIG_HID_PETALYNX is not set > -# CONFIG_HID_SAMSUNG is not set > -# CONFIG_HID_SONY is not set > -# CONFIG_HID_SUNPLUS is not set > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -# CONFIG_HID_TOPSEED is not set > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_ZEROPLUS is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -# CONFIG_USB_ARCH_HAS_EHCI is not set > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > - > -# > -# Miscellaneous USB options > -# > -# CONFIG_USB_DEVICEFS is not set > -# CONFIG_USB_DEVICE_CLASS is not set > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -# CONFIG_USB_OTG is not set > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -# CONFIG_USB_MON is not set > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -CONFIG_USB_OHCI_HCD=y > -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -CONFIG_USB_MUSB_SOC=y > -CONFIG_USB_MUSB_HOST=y > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -# CONFIG_USB_MUSB_OTG is not set > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_INVENTRA_DMA is not set > -# CONFIG_USB_TI_CPPI_DMA is not set > -CONFIG_USB_TI_CPPI41_DMA=y > -CONFIG_USB_MUSB_DEBUG=y > - > -# > -# USB Device Class drivers > -# > -# CONFIG_USB_ACM is not set > -# CONFIG_USB_PRINTER is not set > -# CONFIG_USB_WDM is not set > -# CONFIG_USB_TMC is not set > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -# CONFIG_USB_SERIAL is not set > - > -# > -# USB Miscellaneous drivers > -# > -# CONFIG_USB_EMI62 is not set > -# CONFIG_USB_EMI26 is not set > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -# CONFIG_USB_LEGOTOWER is not set > -# CONFIG_USB_LCD is not set > -# CONFIG_USB_BERRY_CHARGE is not set > -# CONFIG_USB_LED is not set > -# CONFIG_USB_CYPRESS_CY7C63 is not set > -# CONFIG_USB_CYTHERM is not set > -# CONFIG_USB_IDMOUSE is not set > -# CONFIG_USB_FTDI_ELAN is not set > -# CONFIG_USB_APPLEDISPLAY is not set > -# CONFIG_USB_SISUSBVGA is not set > -# CONFIG_USB_LD is not set > -# CONFIG_USB_TRANCEVIBRATOR is not set > -# CONFIG_USB_IOWARRIOR is not set > -# CONFIG_USB_TEST is not set > -# CONFIG_USB_ISIGHTFW is not set > -# CONFIG_USB_VST is not set > -# CONFIG_USB_GADGET is not set > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -# CONFIG_USB_GPIO_VBUS is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -# CONFIG_MMC_UNSAFE_RESUME is not set > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_BOUNCE=y > -# CONFIG_SDIO_UART is not set > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_AT91 is not set > -# CONFIG_MMC_ATMELMCI is not set > -CONFIG_MMC_DAVINCI=y > -# CONFIG_MMC_SPI is not set > -# CONFIG_MEMSTICK is not set > -# CONFIG_NEW_LEDS is not set > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -# CONFIG_RTC_DRV_DS1307 is not set > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -# CONFIG_RTC_DRV_BQ32K is not set > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -CONFIG_RTC_DRV_OMAP=y > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -# CONFIG_UIO is not set > - > -# > -# TI VLYNQ > -# > -# CONFIG_STAGING is not set > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -# CONFIG_EXT3_FS_POSIX_ACL is not set > -# CONFIG_EXT3_FS_SECURITY is not set > -# CONFIG_EXT4_FS is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -# CONFIG_REISERFS_FS is not set > -# CONFIG_JFS_FS is not set > -# CONFIG_FS_POSIX_ACL is not set > -# CONFIG_XFS_FS is not set > -# CONFIG_GFS2_FS is not set > -# CONFIG_OCFS2_FS is not set > -# CONFIG_BTRFS_FS is not set > -# CONFIG_NILFS2_FS is not set > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY=y > -CONFIG_INOTIFY_USER=y > -# CONFIG_QUOTA is not set > -# CONFIG_AUTOFS_FS is not set > -CONFIG_AUTOFS4_FS=m > -# CONFIG_FUSE_FS is not set > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -# CONFIG_ISO9660_FS is not set > -# CONFIG_UDF_FS is not set > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -# CONFIG_NTFS_FS is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -# CONFIG_TMPFS_POSIX_ACL is not set > -# CONFIG_HUGETLB_PAGE is not set > -# CONFIG_CONFIGFS_FS is not set > -CONFIG_MISC_FILESYSTEMS=y > -# CONFIG_ADFS_FS is not set > -# CONFIG_AFFS_FS is not set > -# CONFIG_HFS_FS is not set > -# CONFIG_HFSPLUS_FS is not set > -# CONFIG_BEFS_FS is not set > -# CONFIG_BFS_FS is not set > -# CONFIG_EFS_FS is not set > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -# CONFIG_JFFS2_SUMMARY is not set > -# CONFIG_JFFS2_FS_XATTR is not set > -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -CONFIG_JFFS2_ZLIB=y > -# CONFIG_JFFS2_LZO is not set > -CONFIG_JFFS2_RTIME=y > -# CONFIG_JFFS2_RUBIN is not set > -CONFIG_CRAMFS=y > -# CONFIG_SQUASHFS is not set > -# CONFIG_VXFS_FS is not set > -CONFIG_MINIX_FS=m > -# CONFIG_OMFS_FS is not set > -# CONFIG_HPFS_FS is not set > -# CONFIG_QNX4FS_FS is not set > -# CONFIG_ROMFS_FS is not set > -# CONFIG_SYSV_FS is not set > -# CONFIG_UFS_FS is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -# CONFIG_NFS_V4 is not set > -CONFIG_ROOT_NFS=y > -CONFIG_NFSD=m > -CONFIG_NFSD_V3=y > -# CONFIG_NFSD_V3_ACL is not set > -# CONFIG_NFSD_V4 is not set > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_EXPORTFS=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -# CONFIG_RPCSEC_GSS_KRB5 is not set > -# CONFIG_RPCSEC_GSS_SPKM3 is not set > -CONFIG_SMB_FS=m > -# CONFIG_SMB_NLS_DEFAULT is not set > -# CONFIG_CIFS is not set > -# CONFIG_NCP_FS is not set > -# CONFIG_CODA_FS is not set > -# CONFIG_AFS_FS is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -# CONFIG_MAC_PARTITION is not set > -CONFIG_MSDOS_PARTITION=y > -# CONFIG_BSD_DISKLABEL is not set > -# CONFIG_MINIX_SUBPARTITION is not set > -# CONFIG_SOLARIS_X86_PARTITION is not set > -# CONFIG_UNIXWARE_DISKLABEL is not set > -# CONFIG_LDM_PARTITION is not set > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -# CONFIG_EFI_PARTITION is not set > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -# CONFIG_NLS_CODEPAGE_737 is not set > -# CONFIG_NLS_CODEPAGE_775 is not set > -# CONFIG_NLS_CODEPAGE_850 is not set > -# CONFIG_NLS_CODEPAGE_852 is not set > -# CONFIG_NLS_CODEPAGE_855 is not set > -# CONFIG_NLS_CODEPAGE_857 is not set > -# CONFIG_NLS_CODEPAGE_860 is not set > -# CONFIG_NLS_CODEPAGE_861 is not set > -# CONFIG_NLS_CODEPAGE_862 is not set > -# CONFIG_NLS_CODEPAGE_863 is not set > -# CONFIG_NLS_CODEPAGE_864 is not set > -# CONFIG_NLS_CODEPAGE_865 is not set > -# CONFIG_NLS_CODEPAGE_866 is not set > -# CONFIG_NLS_CODEPAGE_869 is not set > -# CONFIG_NLS_CODEPAGE_936 is not set > -# CONFIG_NLS_CODEPAGE_950 is not set > -# CONFIG_NLS_CODEPAGE_932 is not set > -# CONFIG_NLS_CODEPAGE_949 is not set > -# CONFIG_NLS_CODEPAGE_874 is not set > -# CONFIG_NLS_ISO8859_8 is not set > -# CONFIG_NLS_CODEPAGE_1250 is not set > -# CONFIG_NLS_CODEPAGE_1251 is not set > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -# CONFIG_NLS_ISO8859_2 is not set > -# CONFIG_NLS_ISO8859_3 is not set > -# CONFIG_NLS_ISO8859_4 is not set > -# CONFIG_NLS_ISO8859_5 is not set > -# CONFIG_NLS_ISO8859_6 is not set > -# CONFIG_NLS_ISO8859_7 is not set > -# CONFIG_NLS_ISO8859_9 is not set > -# CONFIG_NLS_ISO8859_13 is not set > -# CONFIG_NLS_ISO8859_14 is not set > -# CONFIG_NLS_ISO8859_15 is not set > -# CONFIG_NLS_KOI8_R is not set > -# CONFIG_NLS_KOI8_U is not set > -CONFIG_NLS_UTF8=m > -# CONFIG_DLM is not set > - > -# > -# Kernel hacking > -# > -# CONFIG_PRINTK_TIME is not set > -# CONFIG_ENABLE_WARN_DEPRECATED is not set > -# CONFIG_ENABLE_MUST_CHECK is not set > -CONFIG_FRAME_WARN=1024 > -# CONFIG_MAGIC_SYSRQ is not set > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -# CONFIG_DEBUG_KERNEL is not set > -# CONFIG_SLUB_DEBUG_ON is not set > -# CONFIG_SLUB_STATS is not set > -CONFIG_DEBUG_BUGVERBOSE=y > -# CONFIG_DEBUG_MEMORY_INIT is not set > -CONFIG_FRAME_POINTER=y > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_TRACING_SUPPORT=y > -# CONFIG_FTRACE is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_ARM_UNWIND is not set > -# CONFIG_DEBUG_USER is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -# CONFIG_KEYS is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -# CONFIG_DEFAULT_SECURITY_SMACK is not set > -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -# CONFIG_CRYPTO_MANAGER is not set > -# CONFIG_CRYPTO_MANAGER2 is not set > -# CONFIG_CRYPTO_GF128MUL is not set > -# CONFIG_CRYPTO_NULL is not set > -# CONFIG_CRYPTO_CRYPTD is not set > -# CONFIG_CRYPTO_AUTHENC is not set > -# CONFIG_CRYPTO_TEST is not set > - > -# > -# Authenticated Encryption with Associated Data > -# > -# CONFIG_CRYPTO_CCM is not set > -# CONFIG_CRYPTO_GCM is not set > -# CONFIG_CRYPTO_SEQIV is not set > - > -# > -# Block modes > -# > -# CONFIG_CRYPTO_CBC is not set > -# CONFIG_CRYPTO_CTR is not set > -# CONFIG_CRYPTO_CTS is not set > -# CONFIG_CRYPTO_ECB is not set > -# CONFIG_CRYPTO_LRW is not set > -# CONFIG_CRYPTO_PCBC is not set > -# CONFIG_CRYPTO_XTS is not set > - > -# > -# Hash modes > -# > -# CONFIG_CRYPTO_HMAC is not set > -# CONFIG_CRYPTO_XCBC is not set > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -# CONFIG_CRYPTO_CRC32C is not set > -# CONFIG_CRYPTO_GHASH is not set > -# CONFIG_CRYPTO_MD4 is not set > -# CONFIG_CRYPTO_MD5 is not set > -# CONFIG_CRYPTO_MICHAEL_MIC is not set > -# CONFIG_CRYPTO_RMD128 is not set > -# CONFIG_CRYPTO_RMD160 is not set > -# CONFIG_CRYPTO_RMD256 is not set > -# CONFIG_CRYPTO_RMD320 is not set > -# CONFIG_CRYPTO_SHA1 is not set > -# CONFIG_CRYPTO_SHA256 is not set > -# CONFIG_CRYPTO_SHA512 is not set > -# CONFIG_CRYPTO_TGR192 is not set > -# CONFIG_CRYPTO_WP512 is not set > - > -# > -# Ciphers > -# > -# CONFIG_CRYPTO_AES is not set > -# CONFIG_CRYPTO_ANUBIS is not set > -# CONFIG_CRYPTO_ARC4 is not set > -# CONFIG_CRYPTO_BLOWFISH is not set > -# CONFIG_CRYPTO_CAMELLIA is not set > -# CONFIG_CRYPTO_CAST5 is not set > -# CONFIG_CRYPTO_CAST6 is not set > -# CONFIG_CRYPTO_DES is not set > -# CONFIG_CRYPTO_FCRYPT is not set > -# CONFIG_CRYPTO_KHAZAD is not set > -# CONFIG_CRYPTO_SALSA20 is not set > -# CONFIG_CRYPTO_SEED is not set > -# CONFIG_CRYPTO_SERPENT is not set > -# CONFIG_CRYPTO_TEA is not set > -# CONFIG_CRYPTO_TWOFISH is not set > - > -# > -# Compression > -# > -# CONFIG_CRYPTO_DEFLATE is not set > -# CONFIG_CRYPTO_ZLIB is not set > -# CONFIG_CRYPTO_LZO is not set > - > -# > -# Random Number Generation > -# > -# CONFIG_CRYPTO_ANSI_CPRNG is not set > -# CONFIG_CRYPTO_HW is not set > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=m > -# CONFIG_CRC16 is not set > -CONFIG_CRC_T10DIF=m > -# CONFIG_CRC_ITU_T is not set > -CONFIG_CRC32=y > -# CONFIG_CRC7 is not set > -# CONFIG_LIBCRC32C is not set > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_GENERIC_ALLOCATOR=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > diff --git a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_uivideocapdis > b/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_uivideocapdis > deleted file mode 100644 > index 5f40d99..0000000 > --- a/recipes-kernel/linux/linux- > davinci/omapl138/configs/da850_omapl138_defconfig_uivideocapdis > +++ /dev/null > @@ -1,1874 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux kernel version: 2.6.33-rc4 > -# Mon Feb 15 17:09:55 2010 > -# > -CONFIG_ARM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_GENERIC_GPIO=y > -CONFIG_GENERIC_TIME=y > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_ZONE_DMA=y > -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -CONFIG_VECTORS_BASE=0xffff0000 > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_LOCK_KERNEL=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_BZIP2 is not set > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -# CONFIG_BSD_PROCESS_ACCT is not set > -# CONFIG_TASKSTATS is not set > -# CONFIG_AUDIT is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_RCU=y > -# CONFIG_TREE_PREEMPT_RCU is not set > -# CONFIG_TINY_RCU is not set > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=14 > -CONFIG_GROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -# CONFIG_RT_GROUP_SCHED is not set > -CONFIG_USER_SCHED=y > -# CONFIG_CGROUP_SCHED is not set > -# CONFIG_CGROUPS is not set > -# CONFIG_SYSFS_DEPRECATED_V2 is not set > -# CONFIG_RELAY is not set > -# CONFIG_NAMESPACES is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -# CONFIG_RD_BZIP2 is not set > -# CONFIG_RD_LZMA is not set > -# CONFIG_RD_LZO is not set > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EMBEDDED=y > -CONFIG_UID16=y > -CONFIG_SYSCTL_SYSCALL=y > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_VM_EVENT_COUNTERS=y > -CONFIG_SLUB_DEBUG=y > -CONFIG_COMPAT_BRK=y > -# CONFIG_SLAB is not set > -CONFIG_SLUB=y > -# CONFIG_SLOB is not set > -# CONFIG_PROFILING is not set > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_CLK=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -# CONFIG_SLOW_WORK is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -# CONFIG_MODULE_FORCE_LOAD is not set > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -# CONFIG_MODULE_SRCVERSION_ALL is not set > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -# CONFIG_BLK_DEV_BSG is not set > -# CONFIG_BLK_DEV_INTEGRITY is not set > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -# CONFIG_IOSCHED_DEADLINE is not set > -# CONFIG_IOSCHED_CFQ is not set > -# CONFIG_DEFAULT_DEADLINE is not set > -# CONFIG_DEFAULT_CFQ is not set > -CONFIG_DEFAULT_NOOP=y > -CONFIG_DEFAULT_IOSCHED="noop" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_AAEC2000 is not set > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_L7200 is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5PC1XX is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_LH7A40X is not set > -# CONFIG_ARCH_U300 is not set > -CONFIG_ARCH_DAVINCI=y > -# CONFIG_ARCH_OMAP is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_U8500 is not set > -CONFIG_CP_INTC=y > - > -# > -# TI DaVinci Implementations > -# > - > -# > -# DaVinci Core Type > -# > -# CONFIG_ARCH_DAVINCI_DM644x is not set > -# CONFIG_ARCH_DAVINCI_DM355 is not set > -# CONFIG_ARCH_DAVINCI_DM646x is not set > -# CONFIG_ARCH_DAVINCI_DA830 is not set > -CONFIG_ARCH_DAVINCI_DA850=y > -CONFIG_DA8XX_MAX_SPEED_300=y > -# CONFIG_DA8XX_MAX_SPEED_372 is not set > -# CONFIG_DA8XX_MAX_SPEED_408 is not set > -# CONFIG_DA8XX_MAX_SPEED_456 is not set > -CONFIG_ARCH_DAVINCI_DA8XX=y > -# CONFIG_ARCH_DAVINCI_DM365 is not set > - > -# > -# DaVinci Board Type > -# > -CONFIG_MACH_DAVINCI_DA850_EVM=y > -# CONFIG_DA850_UI_NONE is not set > -# CONFIG_DA850_UI_RMII is not set > -# CONFIG_DA850_UI_CLCD is not set > -CONFIG_DA850_UI_VIDEO_PORT=y > -CONFIG_DAVINCI_MUX=y > -# CONFIG_DAVINCI_MUX_DEBUG is not set > -# CONFIG_DAVINCI_MUX_WARNINGS is not set > -CONFIG_DAVINCI_RESET_CLOCKS=y > -# CONFIG_DAVINCI_MCBSP is not set > - > -# > -# Processor Type > -# > -CONFIG_CPU_ARM926T=y > -CONFIG_CPU_32v5=y > -CONFIG_CPU_ABRT_EV5TJ=y > -CONFIG_CPU_PABRT_LEGACY=y > -CONFIG_CPU_CACHE_VIVT=y > -CONFIG_CPU_COPY_V4WB=y > -CONFIG_CPU_TLB_V4WBI=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -CONFIG_ARM_L1_CACHE_SHIFT=5 > -CONFIG_COMMON_CLKDEV=y > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=100 > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -# CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=999999 > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=1 > -CONFIG_BOUNCE=y > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_LEDS=y > -# CONFIG_LEDS_CPU is not set > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE="" > -# CONFIG_XIP_KERNEL is not set > -# CONFIG_KEXEC is not set > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -# CONFIG_CPU_FREQ_STAT_DETAILS is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -# CONFIG_VFP is not set > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -# CONFIG_BINFMT_AOUT is not set > -# CONFIG_BINFMT_MISC is not set > - > -# > -# Power management options > -# > -CONFIG_PM=y > -# CONFIG_PM_DEBUG is not set > -CONFIG_PM_SLEEP=y > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -# CONFIG_APM_EMULATION is not set > -# CONFIG_PM_RUNTIME is not set > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -# CONFIG_PACKET_MMAP is not set > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -# CONFIG_NET_KEY is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_FIB_HASH=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -# CONFIG_IP_PNP_BOOTP is not set > -# CONFIG_IP_PNP_RARP is not set > -# CONFIG_NET_IPIP is not set > -# CONFIG_NET_IPGRE is not set > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -# CONFIG_INET_AH is not set > -# CONFIG_INET_ESP is not set > -# CONFIG_INET_IPCOMP is not set > -# CONFIG_INET_XFRM_TUNNEL is not set > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -# CONFIG_INET_LRO is not set > -CONFIG_INET_DIAG=y > -CONFIG_INET_TCP_DIAG=y > -# CONFIG_TCP_CONG_ADVANCED is not set > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -# CONFIG_INET6_AH is not set > -# CONFIG_INET6_ESP is not set > -# CONFIG_INET6_IPCOMP is not set > -# CONFIG_IPV6_MIP6 is not set > -# CONFIG_INET6_XFRM_TUNNEL is not set > -# CONFIG_INET6_TUNNEL is not set > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -# CONFIG_IPV6_TUNNEL is not set > -# CONFIG_IPV6_MULTIPLE_TABLES is not set > -# CONFIG_IPV6_MROUTE is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > - > -# > -# Core Netfilter Configuration > -# > -# CONFIG_NETFILTER_NETLINK_QUEUE is not set > -# CONFIG_NETFILTER_NETLINK_LOG is not set > -# CONFIG_NF_CONNTRACK is not set > -# CONFIG_NETFILTER_XTABLES is not set > -# CONFIG_IP_VS is not set > - > -# > -# IP: Netfilter Configuration > -# > -# CONFIG_NF_DEFRAG_IPV4 is not set > -# CONFIG_IP_NF_QUEUE is not set > -# CONFIG_IP_NF_IPTABLES is not set > -# CONFIG_IP_NF_ARPTABLES is not set > - > -# > -# IPv6: Netfilter Configuration > -# > -# CONFIG_IP6_NF_QUEUE is not set > -# CONFIG_IP6_NF_IPTABLES is not set > -# CONFIG_IP_DCCP is not set > -# CONFIG_IP_SCTP is not set > -# CONFIG_RDS is not set > -# CONFIG_TIPC is not set > -# CONFIG_ATM is not set > -# CONFIG_BRIDGE is not set > -# CONFIG_NET_DSA is not set > -# CONFIG_VLAN_8021Q is not set > -# CONFIG_DECNET is not set > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -# CONFIG_WAN_ROUTER is not set > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -# CONFIG_NET_SCHED is not set > -# CONFIG_DCB is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -# CONFIG_CAN is not set > -# CONFIG_IRDA is not set > -# CONFIG_BT is not set > -# CONFIG_AF_RXRPC is not set > -CONFIG_WIRELESS=y > -# CONFIG_CFG80211 is not set > -# CONFIG_LIB80211 is not set > - > -# > -# CFG80211 needs to be enabled for MAC80211 > -# > -# CONFIG_WIMAX is not set > -# CONFIG_RFKILL is not set > -# CONFIG_NET_9P is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > -# CONFIG_DEVTMPFS is not set > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -# CONFIG_FW_LOADER is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_CONCAT is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -# CONFIG_MTD_OOPS is not set > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -CONFIG_MTD_M25P80=y > -CONFIG_M25PXX_USE_FAST_READ=y > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -# CONFIG_MTD_NAND is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > - > -# > -# UBI - Unsorted block images > -# > -# CONFIG_MTD_UBI is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=m > -# CONFIG_BLK_DEV_CRYPTOLOOP is not set > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=1 > -CONFIG_BLK_DEV_RAM_SIZE=32768 > -# CONFIG_BLK_DEV_XIP is not set > -# CONFIG_CDROM_PKTCDVD is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=y > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -# CONFIG_EEPROM_93CX6 is not set > -# CONFIG_IWMC3200TOP is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -# CONFIG_RAID_ATTRS is not set > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -# CONFIG_BLK_DEV_SR is not set > -CONFIG_CHR_DEV_SG=y > -# CONFIG_CHR_DEV_SCH is not set > -# CONFIG_SCSI_MULTI_LUN is not set > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -# CONFIG_SCSI_ISCSI_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -# CONFIG_ISCSI_TCP is not set > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -# CONFIG_ATA is not set > -# CONFIG_MD is not set > -CONFIG_NETDEVICES=y > -# CONFIG_DUMMY is not set > -# CONFIG_BONDING is not set > -# CONFIG_MACVLAN is not set > -# CONFIG_EQUALIZER is not set > -# CONFIG_TUN is not set > -# CONFIG_VETH is not set > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -CONFIG_LXT_PHY=y > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -CONFIG_SMSC_PHY=y > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -CONFIG_LSI_ET1011C_PHY=y > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -CONFIG_MII=y > -# CONFIG_AX88796 is not set > -# CONFIG_SMC91X is not set > -CONFIG_TI_DAVINCI_EMAC=y > -# CONFIG_DM9000 is not set > -# CONFIG_ENC28J60 is not set > -# CONFIG_ETHOC is not set > -# CONFIG_SMC911X is not set > -# CONFIG_SMSC911X is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -# CONFIG_KS8842 is not set > -# CONFIG_KS8851 is not set > -# CONFIG_KS8851_MLL is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_USB_ZD1201 is not set > -# CONFIG_HOSTAP is not set > - > -# > -# Enable WiMAX (Networking options) to see the WiMAX drivers > -# > - > -# > -# USB Network Adapters > -# > -# CONFIG_USB_CATC is not set > -# CONFIG_USB_KAWETH is not set > -# CONFIG_USB_PEGASUS is not set > -# CONFIG_USB_RTL8150 is not set > -# CONFIG_USB_USBNET is not set > -# CONFIG_WAN is not set > -# CONFIG_PPP is not set > -# CONFIG_SLIP is not set > -CONFIG_NETCONSOLE=y > -# CONFIG_NETCONSOLE_DYNAMIC is not set > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -# CONFIG_INPUT_FF_MEMLESS is not set > -# CONFIG_INPUT_POLLDEV is not set > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -# CONFIG_INPUT_MOUSEDEV is not set > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -CONFIG_KEYBOARD_ATKBD=m > -# CONFIG_QT2160 is not set > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -CONFIG_KEYBOARD_XTKBD=m > -# CONFIG_INPUT_MOUSE is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2007 is not set > -# CONFIG_TOUCHSCREEN_TSC2004 is not set > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -CONFIG_TOUCHSCREEN_TPS6507X=y > -# CONFIG_INPUT_MISC is not set > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -# CONFIG_VT_CONSOLE is not set > -CONFIG_HW_CONSOLE=y > -# CONFIG_VT_HW_CONSOLE_BINDING is not set > -CONFIG_DEVKMEM=y > -# CONFIG_SERIAL_NONSTANDARD is not set > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=3 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -# CONFIG_SERIAL_8250_EXTENDED is not set > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -CONFIG_LEGACY_PTYS=y > -CONFIG_LEGACY_PTY_COUNT=8 > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=m > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=y > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -CONFIG_I2C_DAVINCI=y > -# CONFIG_I2C_DESIGNWARE is not set > -CONFIG_I2C_GPIO=y > -# CONFIG_I2C_OCORES is not set > -# CONFIG_I2C_SIMTEC is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_STUB is not set > - > -# > -# Miscellaneous I2C Chip support > -# > -# CONFIG_SENSORS_TSL2550 is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -# CONFIG_I2C_DEBUG_CHIP is not set > -CONFIG_SPI=y > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -CONFIG_SPI_DAVINCI=y > -CONFIG_SPI_BITBANG=y > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -# CONFIG_SPI_SPIDEV is not set > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_GPIO_SYSFS is not set > - > -# > -# Memory mapped GPIO expanders: > -# > - > -# > -# I2C GPIO expanders: > -# > -# CONFIG_GPIO_MAX732X is not set > -CONFIG_GPIO_PCA953X=y > -CONFIG_GPIO_PCF857X=y > -# CONFIG_GPIO_ADP5588 is not set > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > - > -# > -# AC97 GPIO expanders: > -# > -# CONFIG_W1 is not set > -# CONFIG_POWER_SUPPLY is not set > -# CONFIG_HWMON is not set > -# CONFIG_THERMAL is not set > -CONFIG_WATCHDOG=y > -# CONFIG_WATCHDOG_NOWAYOUT is not set > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_DAVINCI_WATCHDOG=y > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -# CONFIG_SSB is not set > - > -# > -# Multifunction device drivers > -# > -# CONFIG_MFD_CORE is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507x=y > -# CONFIG_TWL4030_CORE is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13783 is not set > -# CONFIG_AB3100_CORE is not set > -# CONFIG_EZX_PCAP is not set > -# CONFIG_MFD_88PM8607 is not set > -# CONFIG_AB4500_CORE is not set > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_TPS65023 is not set > -CONFIG_REGULATOR_TPS6507X=y > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_ALLOW_V4L1=y > -CONFIG_VIDEO_V4L1_COMPAT=y > -# CONFIG_DVB_CORE is not set > -CONFIG_VIDEO_MEDIA=y > - > -# > -# Multimedia drivers > -# > -CONFIG_IR_CORE=y > -CONFIG_VIDEO_IR=y > -# CONFIG_MEDIA_ATTACH is not set > -CONFIG_MEDIA_TUNER=y > -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set > -CONFIG_MEDIA_TUNER_SIMPLE=y > -CONFIG_MEDIA_TUNER_TDA8290=y > -CONFIG_MEDIA_TUNER_TDA9887=y > -CONFIG_MEDIA_TUNER_TEA5761=y > -CONFIG_MEDIA_TUNER_TEA5767=y > -CONFIG_MEDIA_TUNER_MT20XX=y > -CONFIG_MEDIA_TUNER_XC2028=y > -CONFIG_MEDIA_TUNER_XC5000=y > -CONFIG_MEDIA_TUNER_MC44S803=y > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEO_V4L1=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -# CONFIG_VIDEO_IR_I2C is not set > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TDA9875 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -# CONFIG_VIDEO_MSP3400 is not set > -# CONFIG_VIDEO_CS5345 is not set > -# CONFIG_VIDEO_CS53L32A is not set > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -# CONFIG_VIDEO_WM8775 is not set > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -# CONFIG_VIDEO_ADV7180 is not set > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -# CONFIG_VIDEO_MT9V011 is not set > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -# CONFIG_VIDEO_SAA711X is not set > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -CONFIG_VIDEO_TVP514X=y > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -# CONFIG_VIDEO_CX25840 is not set > - > -# > -# MPEG video encoders > -# > -# CONFIG_VIDEO_CX2341X is not set > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -CONFIG_VIDEO_THS7303=y > -CONFIG_VIDEO_ADV7343=y > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY=y > -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y > -CONFIG_VIDEO_DAVINCI_VPIF=y > -# CONFIG_VIDEO_VIVI is not set > -# CONFIG_VIDEO_VPSS_SYSTEM is not set > -# CONFIG_VIDEO_VPFE_CAPTURE is not set > -# CONFIG_VIDEO_CPIA is not set > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_SAA5246A is not set > -# CONFIG_VIDEO_SAA5249 is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=y > -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set > -# CONFIG_USB_GSPCA is not set > -# CONFIG_VIDEO_PVRUSB2 is not set > -# CONFIG_VIDEO_HDPVR is not set > -# CONFIG_VIDEO_EM28XX is not set > -# CONFIG_VIDEO_CX231XX is not set > -# CONFIG_VIDEO_USBVISION is not set > -# CONFIG_USB_VICAM is not set > -# CONFIG_USB_IBMCAM is not set > -# CONFIG_USB_KONICAWC is not set > -# CONFIG_USB_QUICKCAM_MESSENGER is not set > -# CONFIG_USB_ET61X251 is not set > -# CONFIG_VIDEO_OVCAMCHIP is not set > -# CONFIG_USB_OV511 is not set > -# CONFIG_USB_SE401 is not set > -# CONFIG_USB_SN9C102 is not set > -# CONFIG_USB_STV680 is not set > -# CONFIG_USB_ZC0301 is not set > -# CONFIG_USB_PWC is not set > -# CONFIG_USB_PWC_INPUT_EVDEV is not set > -# CONFIG_USB_ZR364XX is not set > -# CONFIG_USB_STKWEBCAM is not set > -# CONFIG_USB_S2255 is not set > -# CONFIG_RADIO_ADAPTERS is not set > -# CONFIG_DAB is not set > - > -# > -# Graphics support > -# > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -# CONFIG_FB_SYS_FILLRECT is not set > -# CONFIG_FB_SYS_COPYAREA is not set > -# CONFIG_FB_SYS_IMAGEBLIT is not set > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -# CONFIG_FB_SYS_FOPS is not set > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -# CONFIG_FB_MODE_HELPERS is not set > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_DAVINCI is not set > -# CONFIG_FB_VIRTUAL is not set > -CONFIG_FB_DA8XX=y > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > - > -# > -# Display device support > -# > -# CONFIG_DISPLAY_SUPPORT is not set > - > -# > -# Console display driver support > -# > -# CONFIG_VGA_CONSOLE is not set > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -CONFIG_LOGO_LINUX_MONO=y > -CONFIG_LOGO_LINUX_VGA16=y > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -# CONFIG_SOUND_OSS_CORE is not set > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -# CONFIG_SND_SEQUENCER is not set > -# CONFIG_SND_MIXER_OSS is not set > -# CONFIG_SND_PCM_OSS is not set > -# CONFIG_SND_HRTIMER is not set > -# CONFIG_SND_DYNAMIC_MINORS is not set > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -# CONFIG_SND_RAWMIDI_SEQ is not set > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -CONFIG_SND_ARM=y > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -# CONFIG_SND_USB_CAIAQ is not set > -CONFIG_SND_SOC=y > -CONFIG_SND_DAVINCI_SOC=y > -CONFIG_SND_DAVINCI_SOC_MCASP=y > -CONFIG_SND_DA850_SOC_EVM=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TLV320AIC3X=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_A4TECH is not set > -# CONFIG_HID_APPLE is not set > -# CONFIG_HID_BELKIN is not set > -# CONFIG_HID_CHERRY is not set > -# CONFIG_HID_CHICONY is not set > -# CONFIG_HID_CYPRESS is not set > -# CONFIG_HID_DRAGONRISE is not set > -# CONFIG_HID_EZKEY is not set > -# CONFIG_HID_KYE is not set > -# CONFIG_HID_GYRATION is not set > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -# CONFIG_HID_LOGITECH is not set > -# CONFIG_HID_MICROSOFT is not set > -# CONFIG_HID_MONTEREY is not set > -# CONFIG_HID_NTRIG is not set > -# CONFIG_HID_PANTHERLORD is not set > -# CONFIG_HID_PETALYNX is not set > -# CONFIG_HID_SAMSUNG is not set > -# CONFIG_HID_SONY is not set > -# CONFIG_HID_SUNPLUS is not set > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -# CONFIG_HID_TOPSEED is not set > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_ZEROPLUS is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -# CONFIG_USB_ARCH_HAS_EHCI is not set > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > - > -# > -# Miscellaneous USB options > -# > -# CONFIG_USB_DEVICEFS is not set > -# CONFIG_USB_DEVICE_CLASS is not set > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -# CONFIG_USB_OTG is not set > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -# CONFIG_USB_MON is not set > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -CONFIG_USB_OHCI_HCD=y > -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -CONFIG_USB_MUSB_SOC=y > -CONFIG_USB_MUSB_HOST=y > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -# CONFIG_USB_MUSB_OTG is not set > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_INVENTRA_DMA is not set > -# CONFIG_USB_TI_CPPI_DMA is not set > -CONFIG_USB_TI_CPPI41_DMA=y > -CONFIG_USB_MUSB_DEBUG=y > - > -# > -# USB Device Class drivers > -# > -# CONFIG_USB_ACM is not set > -# CONFIG_USB_PRINTER is not set > -# CONFIG_USB_WDM is not set > -# CONFIG_USB_TMC is not set > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -# CONFIG_USB_SERIAL is not set > - > -# > -# USB Miscellaneous drivers > -# > -# CONFIG_USB_EMI62 is not set > -# CONFIG_USB_EMI26 is not set > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -# CONFIG_USB_LEGOTOWER is not set > -# CONFIG_USB_LCD is not set > -# CONFIG_USB_BERRY_CHARGE is not set > -# CONFIG_USB_LED is not set > -# CONFIG_USB_CYPRESS_CY7C63 is not set > -# CONFIG_USB_CYTHERM is not set > -# CONFIG_USB_IDMOUSE is not set > -# CONFIG_USB_FTDI_ELAN is not set > -# CONFIG_USB_APPLEDISPLAY is not set > -# CONFIG_USB_SISUSBVGA is not set > -# CONFIG_USB_LD is not set > -# CONFIG_USB_TRANCEVIBRATOR is not set > -# CONFIG_USB_IOWARRIOR is not set > -# CONFIG_USB_TEST is not set > -# CONFIG_USB_ISIGHTFW is not set > -# CONFIG_USB_VST is not set > -# CONFIG_USB_GADGET is not set > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -# CONFIG_USB_GPIO_VBUS is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -# CONFIG_MMC_UNSAFE_RESUME is not set > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_BOUNCE=y > -# CONFIG_SDIO_UART is not set > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_AT91 is not set > -# CONFIG_MMC_ATMELMCI is not set > -CONFIG_MMC_DAVINCI=y > -# CONFIG_MMC_SPI is not set > -# CONFIG_MEMSTICK is not set > -# CONFIG_NEW_LEDS is not set > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -# CONFIG_RTC_DRV_DS1307 is not set > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -# CONFIG_RTC_DRV_BQ32K is not set > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -CONFIG_RTC_DRV_OMAP=y > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -# CONFIG_UIO is not set > - > -# > -# TI VLYNQ > -# > -# CONFIG_STAGING is not set > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -# CONFIG_EXT3_FS_POSIX_ACL is not set > -# CONFIG_EXT3_FS_SECURITY is not set > -# CONFIG_EXT4_FS is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -# CONFIG_REISERFS_FS is not set > -# CONFIG_JFS_FS is not set > -# CONFIG_FS_POSIX_ACL is not set > -# CONFIG_XFS_FS is not set > -# CONFIG_GFS2_FS is not set > -# CONFIG_OCFS2_FS is not set > -# CONFIG_BTRFS_FS is not set > -# CONFIG_NILFS2_FS is not set > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY=y > -CONFIG_INOTIFY_USER=y > -# CONFIG_QUOTA is not set > -# CONFIG_AUTOFS_FS is not set > -CONFIG_AUTOFS4_FS=m > -# CONFIG_FUSE_FS is not set > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -# CONFIG_ISO9660_FS is not set > -# CONFIG_UDF_FS is not set > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -# CONFIG_NTFS_FS is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -# CONFIG_TMPFS_POSIX_ACL is not set > -# CONFIG_HUGETLB_PAGE is not set > -# CONFIG_CONFIGFS_FS is not set > -CONFIG_MISC_FILESYSTEMS=y > -# CONFIG_ADFS_FS is not set > -# CONFIG_AFFS_FS is not set > -# CONFIG_HFS_FS is not set > -# CONFIG_HFSPLUS_FS is not set > -# CONFIG_BEFS_FS is not set > -# CONFIG_BFS_FS is not set > -# CONFIG_EFS_FS is not set > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -# CONFIG_JFFS2_SUMMARY is not set > -# CONFIG_JFFS2_FS_XATTR is not set > -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -CONFIG_JFFS2_ZLIB=y > -# CONFIG_JFFS2_LZO is not set > -CONFIG_JFFS2_RTIME=y > -# CONFIG_JFFS2_RUBIN is not set > -CONFIG_CRAMFS=y > -# CONFIG_SQUASHFS is not set > -# CONFIG_VXFS_FS is not set > -CONFIG_MINIX_FS=m > -# CONFIG_OMFS_FS is not set > -# CONFIG_HPFS_FS is not set > -# CONFIG_QNX4FS_FS is not set > -# CONFIG_ROMFS_FS is not set > -# CONFIG_SYSV_FS is not set > -# CONFIG_UFS_FS is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -# CONFIG_NFS_V4 is not set > -CONFIG_ROOT_NFS=y > -CONFIG_NFSD=m > -CONFIG_NFSD_V3=y > -# CONFIG_NFSD_V3_ACL is not set > -# CONFIG_NFSD_V4 is not set > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_EXPORTFS=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -# CONFIG_RPCSEC_GSS_KRB5 is not set > -# CONFIG_RPCSEC_GSS_SPKM3 is not set > -CONFIG_SMB_FS=m > -# CONFIG_SMB_NLS_DEFAULT is not set > -# CONFIG_CIFS is not set > -# CONFIG_NCP_FS is not set > -# CONFIG_CODA_FS is not set > -# CONFIG_AFS_FS is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -# CONFIG_MAC_PARTITION is not set > -CONFIG_MSDOS_PARTITION=y > -# CONFIG_BSD_DISKLABEL is not set > -# CONFIG_MINIX_SUBPARTITION is not set > -# CONFIG_SOLARIS_X86_PARTITION is not set > -# CONFIG_UNIXWARE_DISKLABEL is not set > -# CONFIG_LDM_PARTITION is not set > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -# CONFIG_EFI_PARTITION is not set > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -# CONFIG_NLS_CODEPAGE_737 is not set > -# CONFIG_NLS_CODEPAGE_775 is not set > -# CONFIG_NLS_CODEPAGE_850 is not set > -# CONFIG_NLS_CODEPAGE_852 is not set > -# CONFIG_NLS_CODEPAGE_855 is not set > -# CONFIG_NLS_CODEPAGE_857 is not set > -# CONFIG_NLS_CODEPAGE_860 is not set > -# CONFIG_NLS_CODEPAGE_861 is not set > -# CONFIG_NLS_CODEPAGE_862 is not set > -# CONFIG_NLS_CODEPAGE_863 is not set > -# CONFIG_NLS_CODEPAGE_864 is not set > -# CONFIG_NLS_CODEPAGE_865 is not set > -# CONFIG_NLS_CODEPAGE_866 is not set > -# CONFIG_NLS_CODEPAGE_869 is not set > -# CONFIG_NLS_CODEPAGE_936 is not set > -# CONFIG_NLS_CODEPAGE_950 is not set > -# CONFIG_NLS_CODEPAGE_932 is not set > -# CONFIG_NLS_CODEPAGE_949 is not set > -# CONFIG_NLS_CODEPAGE_874 is not set > -# CONFIG_NLS_ISO8859_8 is not set > -# CONFIG_NLS_CODEPAGE_1250 is not set > -# CONFIG_NLS_CODEPAGE_1251 is not set > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -# CONFIG_NLS_ISO8859_2 is not set > -# CONFIG_NLS_ISO8859_3 is not set > -# CONFIG_NLS_ISO8859_4 is not set > -# CONFIG_NLS_ISO8859_5 is not set > -# CONFIG_NLS_ISO8859_6 is not set > -# CONFIG_NLS_ISO8859_7 is not set > -# CONFIG_NLS_ISO8859_9 is not set > -# CONFIG_NLS_ISO8859_13 is not set > -# CONFIG_NLS_ISO8859_14 is not set > -# CONFIG_NLS_ISO8859_15 is not set > -# CONFIG_NLS_KOI8_R is not set > -# CONFIG_NLS_KOI8_U is not set > -CONFIG_NLS_UTF8=m > -# CONFIG_DLM is not set > - > -# > -# Kernel hacking > -# > -# CONFIG_PRINTK_TIME is not set > -# CONFIG_ENABLE_WARN_DEPRECATED is not set > -# CONFIG_ENABLE_MUST_CHECK is not set > -CONFIG_FRAME_WARN=1024 > -# CONFIG_MAGIC_SYSRQ is not set > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -# CONFIG_DEBUG_KERNEL is not set > -# CONFIG_SLUB_DEBUG_ON is not set > -# CONFIG_SLUB_STATS is not set > -CONFIG_DEBUG_BUGVERBOSE=y > -# CONFIG_DEBUG_MEMORY_INIT is not set > -CONFIG_FRAME_POINTER=y > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_TRACING_SUPPORT=y > -# CONFIG_FTRACE is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_ARM_UNWIND is not set > -# CONFIG_DEBUG_USER is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -# CONFIG_KEYS is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -# CONFIG_DEFAULT_SECURITY_SMACK is not set > -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -# CONFIG_CRYPTO_MANAGER is not set > -# CONFIG_CRYPTO_MANAGER2 is not set > -# CONFIG_CRYPTO_GF128MUL is not set > -# CONFIG_CRYPTO_NULL is not set > -# CONFIG_CRYPTO_CRYPTD is not set > -# CONFIG_CRYPTO_AUTHENC is not set > -# CONFIG_CRYPTO_TEST is not set > - > -# > -# Authenticated Encryption with Associated Data > -# > -# CONFIG_CRYPTO_CCM is not set > -# CONFIG_CRYPTO_GCM is not set > -# CONFIG_CRYPTO_SEQIV is not set > - > -# > -# Block modes > -# > -# CONFIG_CRYPTO_CBC is not set > -# CONFIG_CRYPTO_CTR is not set > -# CONFIG_CRYPTO_CTS is not set > -# CONFIG_CRYPTO_ECB is not set > -# CONFIG_CRYPTO_LRW is not set > -# CONFIG_CRYPTO_PCBC is not set > -# CONFIG_CRYPTO_XTS is not set > - > -# > -# Hash modes > -# > -# CONFIG_CRYPTO_HMAC is not set > -# CONFIG_CRYPTO_XCBC is not set > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -# CONFIG_CRYPTO_CRC32C is not set > -# CONFIG_CRYPTO_GHASH is not set > -# CONFIG_CRYPTO_MD4 is not set > -# CONFIG_CRYPTO_MD5 is not set > -# CONFIG_CRYPTO_MICHAEL_MIC is not set > -# CONFIG_CRYPTO_RMD128 is not set > -# CONFIG_CRYPTO_RMD160 is not set > -# CONFIG_CRYPTO_RMD256 is not set > -# CONFIG_CRYPTO_RMD320 is not set > -# CONFIG_CRYPTO_SHA1 is not set > -# CONFIG_CRYPTO_SHA256 is not set > -# CONFIG_CRYPTO_SHA512 is not set > -# CONFIG_CRYPTO_TGR192 is not set > -# CONFIG_CRYPTO_WP512 is not set > - > -# > -# Ciphers > -# > -# CONFIG_CRYPTO_AES is not set > -# CONFIG_CRYPTO_ANUBIS is not set > -# CONFIG_CRYPTO_ARC4 is not set > -# CONFIG_CRYPTO_BLOWFISH is not set > -# CONFIG_CRYPTO_CAMELLIA is not set > -# CONFIG_CRYPTO_CAST5 is not set > -# CONFIG_CRYPTO_CAST6 is not set > -# CONFIG_CRYPTO_DES is not set > -# CONFIG_CRYPTO_FCRYPT is not set > -# CONFIG_CRYPTO_KHAZAD is not set > -# CONFIG_CRYPTO_SALSA20 is not set > -# CONFIG_CRYPTO_SEED is not set > -# CONFIG_CRYPTO_SERPENT is not set > -# CONFIG_CRYPTO_TEA is not set > -# CONFIG_CRYPTO_TWOFISH is not set > - > -# > -# Compression > -# > -# CONFIG_CRYPTO_DEFLATE is not set > -# CONFIG_CRYPTO_ZLIB is not set > -# CONFIG_CRYPTO_LZO is not set > - > -# > -# Random Number Generation > -# > -# CONFIG_CRYPTO_ANSI_CPRNG is not set > -# CONFIG_CRYPTO_HW is not set > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=m > -# CONFIG_CRC16 is not set > -CONFIG_CRC_T10DIF=m > -# CONFIG_CRC_ITU_T is not set > -CONFIG_CRC32=y > -# CONFIG_CRC7 is not set > -# CONFIG_LIBCRC32C is not set > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_GENERIC_ALLOCATOR=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > diff --git a/recipes-kernel/linux/linux-davinci/omapl138/defconfig b/recipes- > kernel/linux/linux-davinci/omapl138/defconfig > deleted file mode 100644 > index ad52484..0000000 > --- a/recipes-kernel/linux/linux-davinci/omapl138/defconfig > +++ /dev/null > @@ -1,1951 +0,0 @@ > -# > -# Automatically generated make config: don't edit > -# Linux kernel version: 2.6.33-rc4 > -# Mon Feb 15 17:08:11 2010 > -# > -CONFIG_ARM=y > -CONFIG_SYS_SUPPORTS_APM_EMULATION=y > -CONFIG_GENERIC_GPIO=y > -CONFIG_GENERIC_TIME=y > -CONFIG_GENERIC_CLOCKEVENTS=y > -CONFIG_GENERIC_HARDIRQS=y > -CONFIG_STACKTRACE_SUPPORT=y > -CONFIG_HAVE_LATENCYTOP_SUPPORT=y > -CONFIG_LOCKDEP_SUPPORT=y > -CONFIG_TRACE_IRQFLAGS_SUPPORT=y > -CONFIG_HARDIRQS_SW_RESEND=y > -CONFIG_GENERIC_IRQ_PROBE=y > -CONFIG_RWSEM_GENERIC_SPINLOCK=y > -CONFIG_ARCH_HAS_CPUFREQ=y > -CONFIG_GENERIC_HWEIGHT=y > -CONFIG_GENERIC_CALIBRATE_DELAY=y > -CONFIG_ZONE_DMA=y > -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y > -CONFIG_VECTORS_BASE=0xffff0000 > -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > -CONFIG_CONSTRUCTORS=y > - > -# > -# General setup > -# > -CONFIG_EXPERIMENTAL=y > -CONFIG_BROKEN_ON_SMP=y > -CONFIG_LOCK_KERNEL=y > -CONFIG_INIT_ENV_ARG_LIMIT=32 > -CONFIG_LOCALVERSION="" > -# CONFIG_LOCALVERSION_AUTO is not set > -CONFIG_HAVE_KERNEL_GZIP=y > -CONFIG_HAVE_KERNEL_LZO=y > -CONFIG_KERNEL_GZIP=y > -# CONFIG_KERNEL_BZIP2 is not set > -# CONFIG_KERNEL_LZMA is not set > -# CONFIG_KERNEL_LZO is not set > -CONFIG_SWAP=y > -CONFIG_SYSVIPC=y > -CONFIG_SYSVIPC_SYSCTL=y > -CONFIG_POSIX_MQUEUE=y > -CONFIG_POSIX_MQUEUE_SYSCTL=y > -# CONFIG_BSD_PROCESS_ACCT is not set > -# CONFIG_TASKSTATS is not set > -# CONFIG_AUDIT is not set > - > -# > -# RCU Subsystem > -# > -CONFIG_TREE_RCU=y > -# CONFIG_TREE_PREEMPT_RCU is not set > -# CONFIG_TINY_RCU is not set > -# CONFIG_RCU_TRACE is not set > -CONFIG_RCU_FANOUT=32 > -# CONFIG_RCU_FANOUT_EXACT is not set > -# CONFIG_TREE_RCU_TRACE is not set > -CONFIG_IKCONFIG=y > -CONFIG_IKCONFIG_PROC=y > -CONFIG_LOG_BUF_SHIFT=14 > -CONFIG_GROUP_SCHED=y > -CONFIG_FAIR_GROUP_SCHED=y > -# CONFIG_RT_GROUP_SCHED is not set > -CONFIG_USER_SCHED=y > -# CONFIG_CGROUP_SCHED is not set > -# CONFIG_CGROUPS is not set > -# CONFIG_SYSFS_DEPRECATED_V2 is not set > -# CONFIG_RELAY is not set > -# CONFIG_NAMESPACES is not set > -CONFIG_BLK_DEV_INITRD=y > -CONFIG_INITRAMFS_SOURCE="" > -CONFIG_RD_GZIP=y > -# CONFIG_RD_BZIP2 is not set > -# CONFIG_RD_LZMA is not set > -# CONFIG_RD_LZO is not set > -CONFIG_CC_OPTIMIZE_FOR_SIZE=y > -CONFIG_SYSCTL=y > -CONFIG_ANON_INODES=y > -CONFIG_EMBEDDED=y > -CONFIG_UID16=y > -CONFIG_SYSCTL_SYSCALL=y > -CONFIG_KALLSYMS=y > -# CONFIG_KALLSYMS_ALL is not set > -# CONFIG_KALLSYMS_EXTRA_PASS is not set > -CONFIG_HOTPLUG=y > -CONFIG_PRINTK=y > -CONFIG_BUG=y > -CONFIG_ELF_CORE=y > -CONFIG_BASE_FULL=y > -CONFIG_FUTEX=y > -CONFIG_EPOLL=y > -CONFIG_SIGNALFD=y > -CONFIG_TIMERFD=y > -CONFIG_EVENTFD=y > -CONFIG_SHMEM=y > -CONFIG_AIO=y > - > -# > -# Kernel Performance Events And Counters > -# > -CONFIG_VM_EVENT_COUNTERS=y > -CONFIG_SLUB_DEBUG=y > -CONFIG_COMPAT_BRK=y > -# CONFIG_SLAB is not set > -CONFIG_SLUB=y > -# CONFIG_SLOB is not set > -# CONFIG_PROFILING is not set > -CONFIG_HAVE_OPROFILE=y > -# CONFIG_KPROBES is not set > -CONFIG_HAVE_KPROBES=y > -CONFIG_HAVE_KRETPROBES=y > -CONFIG_HAVE_CLK=y > - > -# > -# GCOV-based kernel profiling > -# > -# CONFIG_GCOV_KERNEL is not set > -# CONFIG_SLOW_WORK is not set > -CONFIG_HAVE_GENERIC_DMA_COHERENT=y > -CONFIG_SLABINFO=y > -CONFIG_RT_MUTEXES=y > -CONFIG_BASE_SMALL=0 > -CONFIG_MODULES=y > -# CONFIG_MODULE_FORCE_LOAD is not set > -CONFIG_MODULE_UNLOAD=y > -CONFIG_MODULE_FORCE_UNLOAD=y > -CONFIG_MODVERSIONS=y > -# CONFIG_MODULE_SRCVERSION_ALL is not set > -CONFIG_BLOCK=y > -CONFIG_LBDAF=y > -# CONFIG_BLK_DEV_BSG is not set > -# CONFIG_BLK_DEV_INTEGRITY is not set > - > -# > -# IO Schedulers > -# > -CONFIG_IOSCHED_NOOP=y > -# CONFIG_IOSCHED_DEADLINE is not set > -# CONFIG_IOSCHED_CFQ is not set > -# CONFIG_DEFAULT_DEADLINE is not set > -# CONFIG_DEFAULT_CFQ is not set > -CONFIG_DEFAULT_NOOP=y > -CONFIG_DEFAULT_IOSCHED="noop" > -# CONFIG_INLINE_SPIN_TRYLOCK is not set > -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK is not set > -# CONFIG_INLINE_SPIN_LOCK_BH is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_SPIN_UNLOCK is not set > -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set > -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_READ_TRYLOCK is not set > -# CONFIG_INLINE_READ_LOCK is not set > -# CONFIG_INLINE_READ_LOCK_BH is not set > -# CONFIG_INLINE_READ_LOCK_IRQ is not set > -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_READ_UNLOCK is not set > -# CONFIG_INLINE_READ_UNLOCK_BH is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set > -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set > -# CONFIG_INLINE_WRITE_TRYLOCK is not set > -# CONFIG_INLINE_WRITE_LOCK is not set > -# CONFIG_INLINE_WRITE_LOCK_BH is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set > -# CONFIG_INLINE_WRITE_UNLOCK is not set > -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set > -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set > -# CONFIG_MUTEX_SPIN_ON_OWNER is not set > -CONFIG_FREEZER=y > - > -# > -# System Type > -# > -CONFIG_MMU=y > -# CONFIG_ARCH_AAEC2000 is not set > -# CONFIG_ARCH_INTEGRATOR is not set > -# CONFIG_ARCH_REALVIEW is not set > -# CONFIG_ARCH_VERSATILE is not set > -# CONFIG_ARCH_AT91 is not set > -# CONFIG_ARCH_CLPS711X is not set > -# CONFIG_ARCH_GEMINI is not set > -# CONFIG_ARCH_EBSA110 is not set > -# CONFIG_ARCH_EP93XX is not set > -# CONFIG_ARCH_FOOTBRIDGE is not set > -# CONFIG_ARCH_MXC is not set > -# CONFIG_ARCH_STMP3XXX is not set > -# CONFIG_ARCH_NETX is not set > -# CONFIG_ARCH_H720X is not set > -# CONFIG_ARCH_NOMADIK is not set > -# CONFIG_ARCH_IOP13XX is not set > -# CONFIG_ARCH_IOP32X is not set > -# CONFIG_ARCH_IOP33X is not set > -# CONFIG_ARCH_IXP23XX is not set > -# CONFIG_ARCH_IXP2000 is not set > -# CONFIG_ARCH_IXP4XX is not set > -# CONFIG_ARCH_L7200 is not set > -# CONFIG_ARCH_DOVE is not set > -# CONFIG_ARCH_KIRKWOOD is not set > -# CONFIG_ARCH_LOKI is not set > -# CONFIG_ARCH_MV78XX0 is not set > -# CONFIG_ARCH_ORION5X is not set > -# CONFIG_ARCH_MMP is not set > -# CONFIG_ARCH_KS8695 is not set > -# CONFIG_ARCH_NS9XXX is not set > -# CONFIG_ARCH_W90X900 is not set > -# CONFIG_ARCH_PNX4008 is not set > -# CONFIG_ARCH_PXA is not set > -# CONFIG_ARCH_MSM is not set > -# CONFIG_ARCH_RPC is not set > -# CONFIG_ARCH_SA1100 is not set > -# CONFIG_ARCH_S3C2410 is not set > -# CONFIG_ARCH_S3C64XX is not set > -# CONFIG_ARCH_S5PC1XX is not set > -# CONFIG_ARCH_SHARK is not set > -# CONFIG_ARCH_LH7A40X is not set > -# CONFIG_ARCH_U300 is not set > -CONFIG_ARCH_DAVINCI=y > -# CONFIG_ARCH_OMAP is not set > -# CONFIG_ARCH_BCMRING is not set > -# CONFIG_ARCH_U8500 is not set > -CONFIG_CP_INTC=y > - > -# > -# TI DaVinci Implementations > -# > - > -# > -# DaVinci Core Type > -# > -# CONFIG_ARCH_DAVINCI_DM644x is not set > -# CONFIG_ARCH_DAVINCI_DM355 is not set > -# CONFIG_ARCH_DAVINCI_DM646x is not set > -# CONFIG_ARCH_DAVINCI_DA830 is not set > -CONFIG_ARCH_DAVINCI_DA850=y > -CONFIG_DA8XX_MAX_SPEED_300=y > -# CONFIG_DA8XX_MAX_SPEED_372 is not set > -# CONFIG_DA8XX_MAX_SPEED_408 is not set > -# CONFIG_DA8XX_MAX_SPEED_456 is not set > -CONFIG_ARCH_DAVINCI_DA8XX=y > -# CONFIG_ARCH_DAVINCI_DM365 is not set > - > -# > -# DaVinci Board Type > -# > -CONFIG_MACH_DAVINCI_DA850_EVM=y > -# CONFIG_DA850_UI_NONE is not set > -# CONFIG_DA850_UI_RMII is not set > -# CONFIG_DA850_UI_CLCD is not set > -CONFIG_DA850_UI_VIDEO_PORT=y > -CONFIG_DAVINCI_MUX=y > -# CONFIG_DAVINCI_MUX_DEBUG is not set > -# CONFIG_DAVINCI_MUX_WARNINGS is not set > -CONFIG_DAVINCI_RESET_CLOCKS=y > -# CONFIG_DAVINCI_MCBSP is not set > - > -# > -# Processor Type > -# > -CONFIG_CPU_ARM926T=y > -CONFIG_CPU_32v5=y > -CONFIG_CPU_ABRT_EV5TJ=y > -CONFIG_CPU_PABRT_LEGACY=y > -CONFIG_CPU_CACHE_VIVT=y > -CONFIG_CPU_COPY_V4WB=y > -CONFIG_CPU_TLB_V4WBI=y > -CONFIG_CPU_CP15=y > -CONFIG_CPU_CP15_MMU=y > - > -# > -# Processor Features > -# > -CONFIG_ARM_THUMB=y > -# CONFIG_CPU_ICACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_DISABLE is not set > -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set > -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set > -CONFIG_ARM_L1_CACHE_SHIFT=5 > -CONFIG_COMMON_CLKDEV=y > - > -# > -# Bus support > -# > -# CONFIG_PCI_SYSCALL is not set > -# CONFIG_ARCH_SUPPORTS_MSI is not set > -# CONFIG_PCCARD is not set > - > -# > -# Kernel Features > -# > -CONFIG_TICK_ONESHOT=y > -CONFIG_NO_HZ=y > -CONFIG_HIGH_RES_TIMERS=y > -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > -CONFIG_VMSPLIT_3G=y > -# CONFIG_VMSPLIT_2G is not set > -# CONFIG_VMSPLIT_1G is not set > -CONFIG_PAGE_OFFSET=0xC0000000 > -# CONFIG_PREEMPT_NONE is not set > -# CONFIG_PREEMPT_VOLUNTARY is not set > -CONFIG_PREEMPT=y > -CONFIG_HZ=100 > -CONFIG_AEABI=y > -# CONFIG_OABI_COMPAT is not set > -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y > -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set > -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set > -# CONFIG_HIGHMEM is not set > -CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > -# CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -CONFIG_PAGEFLAGS_EXTENDED=y > -CONFIG_SPLIT_PTLOCK_CPUS=999999 > -# CONFIG_PHYS_ADDR_T_64BIT is not set > -CONFIG_ZONE_DMA_FLAG=1 > -CONFIG_BOUNCE=y > -CONFIG_VIRT_TO_BUS=y > -# CONFIG_KSM is not set > -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 > -CONFIG_LEDS=y > -# CONFIG_LEDS_CPU is not set > -CONFIG_ALIGNMENT_TRAP=y > -# CONFIG_UACCESS_WITH_MEMCPY is not set > - > -# > -# Boot options > -# > -CONFIG_ZBOOT_ROM_TEXT=0x0 > -CONFIG_ZBOOT_ROM_BSS=0x0 > -CONFIG_CMDLINE="" > -# CONFIG_XIP_KERNEL is not set > -# CONFIG_KEXEC is not set > - > -# > -# CPU Power Management > -# > -CONFIG_CPU_FREQ=y > -CONFIG_CPU_FREQ_TABLE=y > -# CONFIG_CPU_FREQ_DEBUG is not set > -CONFIG_CPU_FREQ_STAT=y > -# CONFIG_CPU_FREQ_STAT_DETAILS is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set > -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y > -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > -CONFIG_CPU_FREQ_GOV_POWERSAVE=y > -CONFIG_CPU_FREQ_GOV_USERSPACE=y > -CONFIG_CPU_FREQ_GOV_ONDEMAND=y > -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y > -CONFIG_CPU_IDLE=y > -CONFIG_CPU_IDLE_GOV_LADDER=y > -CONFIG_CPU_IDLE_GOV_MENU=y > - > -# > -# Floating point emulation > -# > - > -# > -# At least one emulation must be selected > -# > -# CONFIG_VFP is not set > - > -# > -# Userspace binary formats > -# > -CONFIG_BINFMT_ELF=y > -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > -CONFIG_HAVE_AOUT=y > -# CONFIG_BINFMT_AOUT is not set > -# CONFIG_BINFMT_MISC is not set > - > -# > -# Power management options > -# > -CONFIG_PM=y > -# CONFIG_PM_DEBUG is not set > -CONFIG_PM_SLEEP=y > -CONFIG_SUSPEND=y > -CONFIG_SUSPEND_FREEZER=y > -# CONFIG_APM_EMULATION is not set > -# CONFIG_PM_RUNTIME is not set > -CONFIG_ARCH_SUSPEND_POSSIBLE=y > -CONFIG_NET=y > - > -# > -# Networking options > -# > -CONFIG_PACKET=y > -# CONFIG_PACKET_MMAP is not set > -CONFIG_UNIX=y > -CONFIG_XFRM=y > -# CONFIG_XFRM_USER is not set > -# CONFIG_XFRM_SUB_POLICY is not set > -# CONFIG_XFRM_MIGRATE is not set > -# CONFIG_XFRM_STATISTICS is not set > -# CONFIG_NET_KEY is not set > -CONFIG_INET=y > -# CONFIG_IP_MULTICAST is not set > -# CONFIG_IP_ADVANCED_ROUTER is not set > -CONFIG_IP_FIB_HASH=y > -CONFIG_IP_PNP=y > -CONFIG_IP_PNP_DHCP=y > -# CONFIG_IP_PNP_BOOTP is not set > -# CONFIG_IP_PNP_RARP is not set > -# CONFIG_NET_IPIP is not set > -# CONFIG_NET_IPGRE is not set > -# CONFIG_ARPD is not set > -# CONFIG_SYN_COOKIES is not set > -# CONFIG_INET_AH is not set > -# CONFIG_INET_ESP is not set > -# CONFIG_INET_IPCOMP is not set > -# CONFIG_INET_XFRM_TUNNEL is not set > -CONFIG_INET_TUNNEL=m > -CONFIG_INET_XFRM_MODE_TRANSPORT=y > -CONFIG_INET_XFRM_MODE_TUNNEL=y > -CONFIG_INET_XFRM_MODE_BEET=y > -# CONFIG_INET_LRO is not set > -CONFIG_INET_DIAG=y > -CONFIG_INET_TCP_DIAG=y > -# CONFIG_TCP_CONG_ADVANCED is not set > -CONFIG_TCP_CONG_CUBIC=y > -CONFIG_DEFAULT_TCP_CONG="cubic" > -# CONFIG_TCP_MD5SIG is not set > -CONFIG_IPV6=m > -# CONFIG_IPV6_PRIVACY is not set > -# CONFIG_IPV6_ROUTER_PREF is not set > -# CONFIG_IPV6_OPTIMISTIC_DAD is not set > -# CONFIG_INET6_AH is not set > -# CONFIG_INET6_ESP is not set > -# CONFIG_INET6_IPCOMP is not set > -# CONFIG_IPV6_MIP6 is not set > -# CONFIG_INET6_XFRM_TUNNEL is not set > -# CONFIG_INET6_TUNNEL is not set > -CONFIG_INET6_XFRM_MODE_TRANSPORT=m > -CONFIG_INET6_XFRM_MODE_TUNNEL=m > -CONFIG_INET6_XFRM_MODE_BEET=m > -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > -CONFIG_IPV6_SIT=m > -# CONFIG_IPV6_SIT_6RD is not set > -CONFIG_IPV6_NDISC_NODETYPE=y > -# CONFIG_IPV6_TUNNEL is not set > -# CONFIG_IPV6_MULTIPLE_TABLES is not set > -# CONFIG_IPV6_MROUTE is not set > -# CONFIG_NETWORK_SECMARK is not set > -CONFIG_NETFILTER=y > -# CONFIG_NETFILTER_DEBUG is not set > -CONFIG_NETFILTER_ADVANCED=y > - > -# > -# Core Netfilter Configuration > -# > -# CONFIG_NETFILTER_NETLINK_QUEUE is not set > -# CONFIG_NETFILTER_NETLINK_LOG is not set > -# CONFIG_NF_CONNTRACK is not set > -# CONFIG_NETFILTER_XTABLES is not set > -# CONFIG_IP_VS is not set > - > -# > -# IP: Netfilter Configuration > -# > -# CONFIG_NF_DEFRAG_IPV4 is not set > -# CONFIG_IP_NF_QUEUE is not set > -# CONFIG_IP_NF_IPTABLES is not set > -# CONFIG_IP_NF_ARPTABLES is not set > - > -# > -# IPv6: Netfilter Configuration > -# > -# CONFIG_IP6_NF_QUEUE is not set > -# CONFIG_IP6_NF_IPTABLES is not set > -# CONFIG_IP_DCCP is not set > -# CONFIG_IP_SCTP is not set > -# CONFIG_RDS is not set > -# CONFIG_TIPC is not set > -# CONFIG_ATM is not set > -# CONFIG_BRIDGE is not set > -# CONFIG_NET_DSA is not set > -# CONFIG_VLAN_8021Q is not set > -# CONFIG_DECNET is not set > -# CONFIG_LLC2 is not set > -# CONFIG_IPX is not set > -# CONFIG_ATALK is not set > -# CONFIG_X25 is not set > -# CONFIG_LAPB is not set > -# CONFIG_ECONET is not set > -# CONFIG_WAN_ROUTER is not set > -# CONFIG_PHONET is not set > -# CONFIG_IEEE802154 is not set > -# CONFIG_NET_SCHED is not set > -# CONFIG_DCB is not set > - > -# > -# Network testing > -# > -# CONFIG_NET_PKTGEN is not set > -# CONFIG_HAMRADIO is not set > -# CONFIG_CAN is not set > -# CONFIG_IRDA is not set > -# CONFIG_BT is not set > -# CONFIG_AF_RXRPC is not set > -CONFIG_WIRELESS=y > -# CONFIG_CFG80211 is not set > -# CONFIG_LIB80211 is not set > - > -# > -# CFG80211 needs to be enabled for MAC80211 > -# > -# CONFIG_WIMAX is not set > -# CONFIG_RFKILL is not set > -# CONFIG_NET_9P is not set > - > -# > -# Device Drivers > -# > - > -# > -# Generic Driver Options > -# > -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > -# CONFIG_DEVTMPFS is not set > -CONFIG_STANDALONE=y > -CONFIG_PREVENT_FIRMWARE_BUILD=y > -# CONFIG_FW_LOADER is not set > -# CONFIG_DEBUG_DRIVER is not set > -# CONFIG_DEBUG_DEVRES is not set > -# CONFIG_SYS_HYPERVISOR is not set > -# CONFIG_CONNECTOR is not set > -CONFIG_MTD=y > -# CONFIG_MTD_DEBUG is not set > -# CONFIG_MTD_TESTS is not set > -# CONFIG_MTD_CONCAT is not set > -CONFIG_MTD_PARTITIONS=y > -# CONFIG_MTD_REDBOOT_PARTS is not set > -# CONFIG_MTD_CMDLINE_PARTS is not set > -# CONFIG_MTD_AFS_PARTS is not set > -# CONFIG_MTD_AR7_PARTS is not set > - > -# > -# User Modules And Translation Layers > -# > -CONFIG_MTD_CHAR=y > -CONFIG_MTD_BLKDEVS=y > -CONFIG_MTD_BLOCK=y > -# CONFIG_FTL is not set > -# CONFIG_NFTL is not set > -# CONFIG_INFTL is not set > -# CONFIG_RFD_FTL is not set > -# CONFIG_SSFDC is not set > -# CONFIG_MTD_OOPS is not set > - > -# > -# RAM/ROM/Flash chip drivers > -# > -# CONFIG_MTD_CFI is not set > -# CONFIG_MTD_JEDECPROBE is not set > -CONFIG_MTD_MAP_BANK_WIDTH_1=y > -CONFIG_MTD_MAP_BANK_WIDTH_2=y > -CONFIG_MTD_MAP_BANK_WIDTH_4=y > -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set > -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set > -CONFIG_MTD_CFI_I1=y > -CONFIG_MTD_CFI_I2=y > -# CONFIG_MTD_CFI_I4 is not set > -# CONFIG_MTD_CFI_I8 is not set > -# CONFIG_MTD_RAM is not set > -# CONFIG_MTD_ROM is not set > -# CONFIG_MTD_ABSENT is not set > - > -# > -# Mapping drivers for chip access > -# > -# CONFIG_MTD_COMPLEX_MAPPINGS is not set > -# CONFIG_MTD_PLATRAM is not set > - > -# > -# Self-contained MTD device drivers > -# > -# CONFIG_MTD_DATAFLASH is not set > -CONFIG_MTD_M25P80=y > -CONFIG_M25PXX_USE_FAST_READ=y > -# CONFIG_MTD_SST25L is not set > -# CONFIG_MTD_SLRAM is not set > -# CONFIG_MTD_PHRAM is not set > -# CONFIG_MTD_MTDRAM is not set > -# CONFIG_MTD_BLOCK2MTD is not set > - > -# > -# Disk-On-Chip Device Drivers > -# > -# CONFIG_MTD_DOC2000 is not set > -# CONFIG_MTD_DOC2001 is not set > -# CONFIG_MTD_DOC2001PLUS is not set > -# CONFIG_MTD_NAND is not set > -# CONFIG_MTD_ONENAND is not set > - > -# > -# LPDDR flash memory drivers > -# > -# CONFIG_MTD_LPDDR is not set > - > -# > -# UBI - Unsorted block images > -# > -# CONFIG_MTD_UBI is not set > -# CONFIG_PARPORT is not set > -CONFIG_BLK_DEV=y > -# CONFIG_BLK_DEV_COW_COMMON is not set > -CONFIG_BLK_DEV_LOOP=m > -# CONFIG_BLK_DEV_CRYPTOLOOP is not set > - > -# > -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected > -# > -# CONFIG_BLK_DEV_NBD is not set > -# CONFIG_BLK_DEV_UB is not set > -CONFIG_BLK_DEV_RAM=y > -CONFIG_BLK_DEV_RAM_COUNT=1 > -CONFIG_BLK_DEV_RAM_SIZE=32768 > -# CONFIG_BLK_DEV_XIP is not set > -# CONFIG_CDROM_PKTCDVD is not set > -# CONFIG_ATA_OVER_ETH is not set > -# CONFIG_MG_DISK is not set > -CONFIG_MISC_DEVICES=y > -# CONFIG_AD525X_DPOT is not set > -# CONFIG_ICS932S401 is not set > -# CONFIG_ENCLOSURE_SERVICES is not set > -# CONFIG_ISL29003 is not set > -# CONFIG_DS1682 is not set > -# CONFIG_TI_DAC7512 is not set > -# CONFIG_C2PORT is not set > - > -# > -# EEPROM support > -# > -CONFIG_EEPROM_AT24=y > -# CONFIG_EEPROM_AT25 is not set > -# CONFIG_EEPROM_LEGACY is not set > -# CONFIG_EEPROM_MAX6875 is not set > -# CONFIG_EEPROM_93CX6 is not set > -# CONFIG_IWMC3200TOP is not set > -CONFIG_HAVE_IDE=y > -# CONFIG_IDE is not set > - > -# > -# SCSI device support > -# > -# CONFIG_RAID_ATTRS is not set > -CONFIG_SCSI=y > -CONFIG_SCSI_DMA=y > -# CONFIG_SCSI_TGT is not set > -# CONFIG_SCSI_NETLINK is not set > -CONFIG_SCSI_PROC_FS=y > - > -# > -# SCSI support type (disk, tape, CD-ROM) > -# > -CONFIG_BLK_DEV_SD=y > -# CONFIG_CHR_DEV_ST is not set > -# CONFIG_CHR_DEV_OSST is not set > -# CONFIG_BLK_DEV_SR is not set > -CONFIG_CHR_DEV_SG=y > -# CONFIG_CHR_DEV_SCH is not set > -# CONFIG_SCSI_MULTI_LUN is not set > -# CONFIG_SCSI_CONSTANTS is not set > -# CONFIG_SCSI_LOGGING is not set > -# CONFIG_SCSI_SCAN_ASYNC is not set > -CONFIG_SCSI_WAIT_SCAN=m > - > -# > -# SCSI Transports > -# > -# CONFIG_SCSI_SPI_ATTRS is not set > -# CONFIG_SCSI_FC_ATTRS is not set > -# CONFIG_SCSI_ISCSI_ATTRS is not set > -# CONFIG_SCSI_SAS_LIBSAS is not set > -# CONFIG_SCSI_SRP_ATTRS is not set > -CONFIG_SCSI_LOWLEVEL=y > -# CONFIG_ISCSI_TCP is not set > -# CONFIG_LIBFC is not set > -# CONFIG_LIBFCOE is not set > -# CONFIG_SCSI_DEBUG is not set > -# CONFIG_SCSI_DH is not set > -# CONFIG_SCSI_OSD_INITIATOR is not set > -CONFIG_ATA=y > -# CONFIG_ATA_NONSTANDARD is not set > -CONFIG_ATA_VERBOSE_ERROR=y > -CONFIG_SATA_PMP=y > -CONFIG_SATA_AHCI=y > -CONFIG_ATA_SFF=y > -# CONFIG_SATA_MV is not set > -# CONFIG_PATA_PLATFORM is not set > -CONFIG_MD=y > -CONFIG_BLK_DEV_MD=y > -CONFIG_MD_AUTODETECT=y > -CONFIG_MD_LINEAR=m > -CONFIG_MD_RAID0=m > -CONFIG_MD_RAID1=m > -CONFIG_MD_RAID10=m > -CONFIG_MD_RAID456=m > -CONFIG_MD_RAID6_PQ=m > -CONFIG_ASYNC_RAID6_TEST=m > -CONFIG_MD_MULTIPATH=m > -CONFIG_MD_FAULTY=m > -# CONFIG_BLK_DEV_DM is not set > -CONFIG_NETDEVICES=y > -# CONFIG_DUMMY is not set > -# CONFIG_BONDING is not set > -# CONFIG_MACVLAN is not set > -# CONFIG_EQUALIZER is not set > -# CONFIG_TUN is not set > -# CONFIG_VETH is not set > -CONFIG_PHYLIB=y > - > -# > -# MII PHY device drivers > -# > -# CONFIG_MARVELL_PHY is not set > -# CONFIG_DAVICOM_PHY is not set > -# CONFIG_QSEMI_PHY is not set > -CONFIG_LXT_PHY=y > -# CONFIG_CICADA_PHY is not set > -# CONFIG_VITESSE_PHY is not set > -CONFIG_SMSC_PHY=y > -# CONFIG_BROADCOM_PHY is not set > -# CONFIG_ICPLUS_PHY is not set > -# CONFIG_REALTEK_PHY is not set > -# CONFIG_NATIONAL_PHY is not set > -# CONFIG_STE10XP is not set > -CONFIG_LSI_ET1011C_PHY=y > -# CONFIG_FIXED_PHY is not set > -# CONFIG_MDIO_BITBANG is not set > -CONFIG_NET_ETHERNET=y > -CONFIG_MII=y > -# CONFIG_AX88796 is not set > -# CONFIG_SMC91X is not set > -CONFIG_TI_DAVINCI_EMAC=y > -# CONFIG_DM9000 is not set > -# CONFIG_ENC28J60 is not set > -# CONFIG_ETHOC is not set > -# CONFIG_SMC911X is not set > -# CONFIG_SMSC911X is not set > -# CONFIG_DNET is not set > -# CONFIG_IBM_NEW_EMAC_ZMII is not set > -# CONFIG_IBM_NEW_EMAC_RGMII is not set > -# CONFIG_IBM_NEW_EMAC_TAH is not set > -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set > -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set > -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set > -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set > -# CONFIG_B44 is not set > -# CONFIG_KS8842 is not set > -# CONFIG_KS8851 is not set > -# CONFIG_KS8851_MLL is not set > -# CONFIG_NETDEV_1000 is not set > -# CONFIG_NETDEV_10000 is not set > -CONFIG_WLAN=y > -# CONFIG_USB_ZD1201 is not set > -# CONFIG_HOSTAP is not set > - > -# > -# Enable WiMAX (Networking options) to see the WiMAX drivers > -# > - > -# > -# USB Network Adapters > -# > -# CONFIG_USB_CATC is not set > -# CONFIG_USB_KAWETH is not set > -# CONFIG_USB_PEGASUS is not set > -# CONFIG_USB_RTL8150 is not set > -# CONFIG_USB_USBNET is not set > -# CONFIG_WAN is not set > -# CONFIG_PPP is not set > -# CONFIG_SLIP is not set > -CONFIG_NETCONSOLE=y > -# CONFIG_NETCONSOLE_DYNAMIC is not set > -CONFIG_NETPOLL=y > -CONFIG_NETPOLL_TRAP=y > -CONFIG_NET_POLL_CONTROLLER=y > -# CONFIG_ISDN is not set > -# CONFIG_PHONE is not set > - > -# > -# Input device support > -# > -CONFIG_INPUT=y > -# CONFIG_INPUT_FF_MEMLESS is not set > -# CONFIG_INPUT_POLLDEV is not set > -# CONFIG_INPUT_SPARSEKMAP is not set > - > -# > -# Userland interfaces > -# > -# CONFIG_INPUT_MOUSEDEV is not set > -# CONFIG_INPUT_JOYDEV is not set > -CONFIG_INPUT_EVDEV=y > -# CONFIG_INPUT_EVBUG is not set > - > -# > -# Input Device Drivers > -# > -CONFIG_INPUT_KEYBOARD=y > -# CONFIG_KEYBOARD_ADP5588 is not set > -CONFIG_KEYBOARD_ATKBD=m > -# CONFIG_QT2160 is not set > -# CONFIG_KEYBOARD_LKKBD is not set > -CONFIG_KEYBOARD_GPIO=y > -# CONFIG_KEYBOARD_MATRIX is not set > -# CONFIG_KEYBOARD_MAX7359 is not set > -# CONFIG_KEYBOARD_NEWTON is not set > -# CONFIG_KEYBOARD_OPENCORES is not set > -# CONFIG_KEYBOARD_STOWAWAY is not set > -# CONFIG_KEYBOARD_SUNKBD is not set > -CONFIG_KEYBOARD_XTKBD=m > -# CONFIG_INPUT_MOUSE is not set > -# CONFIG_INPUT_JOYSTICK is not set > -# CONFIG_INPUT_TABLET is not set > -CONFIG_INPUT_TOUCHSCREEN=y > -# CONFIG_TOUCHSCREEN_ADS7846 is not set > -# CONFIG_TOUCHSCREEN_AD7877 is not set > -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set > -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set > -# CONFIG_TOUCHSCREEN_AD7879 is not set > -# CONFIG_TOUCHSCREEN_DYNAPRO is not set > -# CONFIG_TOUCHSCREEN_EETI is not set > -# CONFIG_TOUCHSCREEN_FUJITSU is not set > -# CONFIG_TOUCHSCREEN_GUNZE is not set > -# CONFIG_TOUCHSCREEN_ELO is not set > -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set > -# CONFIG_TOUCHSCREEN_MCS5000 is not set > -# CONFIG_TOUCHSCREEN_MTOUCH is not set > -# CONFIG_TOUCHSCREEN_INEXIO is not set > -# CONFIG_TOUCHSCREEN_MK712 is not set > -# CONFIG_TOUCHSCREEN_PENMOUNT is not set > -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set > -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set > -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set > -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set > -# CONFIG_TOUCHSCREEN_TSC2007 is not set > -# CONFIG_TOUCHSCREEN_TSC2004 is not set > -# CONFIG_TOUCHSCREEN_W90X900 is not set > -CONFIG_TOUCHSCREEN_TPS6507X=y > -# CONFIG_INPUT_MISC is not set > - > -# > -# Hardware I/O ports > -# > -CONFIG_SERIO=y > -CONFIG_SERIO_SERPORT=y > -CONFIG_SERIO_LIBPS2=y > -# CONFIG_SERIO_RAW is not set > -# CONFIG_SERIO_ALTERA_PS2 is not set > -# CONFIG_GAMEPORT is not set > - > -# > -# Character devices > -# > -CONFIG_VT=y > -CONFIG_CONSOLE_TRANSLATIONS=y > -# CONFIG_VT_CONSOLE is not set > -CONFIG_HW_CONSOLE=y > -# CONFIG_VT_HW_CONSOLE_BINDING is not set > -CONFIG_DEVKMEM=y > -# CONFIG_SERIAL_NONSTANDARD is not set > - > -# > -# Serial drivers > -# > -CONFIG_SERIAL_8250=y > -CONFIG_SERIAL_8250_CONSOLE=y > -CONFIG_SERIAL_8250_NR_UARTS=3 > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 > -# CONFIG_SERIAL_8250_EXTENDED is not set > - > -# > -# Non-8250 serial port support > -# > -# CONFIG_SERIAL_MAX3100 is not set > -CONFIG_SERIAL_CORE=y > -CONFIG_SERIAL_CORE_CONSOLE=y > -CONFIG_UNIX98_PTYS=y > -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > -CONFIG_LEGACY_PTYS=y > -CONFIG_LEGACY_PTY_COUNT=8 > -# CONFIG_IPMI_HANDLER is not set > -CONFIG_HW_RANDOM=m > -# CONFIG_HW_RANDOM_TIMERIOMEM is not set > -# CONFIG_R3964 is not set > -# CONFIG_RAW_DRIVER is not set > -# CONFIG_TCG_TPM is not set > -CONFIG_I2C=y > -CONFIG_I2C_BOARDINFO=y > -CONFIG_I2C_COMPAT=y > -CONFIG_I2C_CHARDEV=y > -CONFIG_I2C_HELPER_AUTO=y > -CONFIG_I2C_ALGOBIT=y > - > -# > -# I2C Hardware Bus support > -# > - > -# > -# I2C system bus drivers (mostly embedded / system-on-chip) > -# > -CONFIG_I2C_DAVINCI=y > -# CONFIG_I2C_DESIGNWARE is not set > -CONFIG_I2C_GPIO=y > -# CONFIG_I2C_OCORES is not set > -# CONFIG_I2C_SIMTEC is not set > - > -# > -# External I2C/SMBus adapter drivers > -# > -# CONFIG_I2C_PARPORT_LIGHT is not set > -# CONFIG_I2C_TAOS_EVM is not set > -# CONFIG_I2C_TINY_USB is not set > - > -# > -# Other I2C/SMBus bus drivers > -# > -# CONFIG_I2C_PCA_PLATFORM is not set > -# CONFIG_I2C_STUB is not set > - > -# > -# Miscellaneous I2C Chip support > -# > -# CONFIG_SENSORS_TSL2550 is not set > -# CONFIG_I2C_DEBUG_CORE is not set > -# CONFIG_I2C_DEBUG_ALGO is not set > -# CONFIG_I2C_DEBUG_BUS is not set > -# CONFIG_I2C_DEBUG_CHIP is not set > -CONFIG_SPI=y > -# CONFIG_SPI_DEBUG is not set > -CONFIG_SPI_MASTER=y > - > -# > -# SPI Master Controller Drivers > -# > -CONFIG_SPI_DAVINCI=y > -CONFIG_SPI_BITBANG=y > -# CONFIG_SPI_GPIO is not set > -# CONFIG_SPI_XILINX is not set > -# CONFIG_SPI_DESIGNWARE is not set > - > -# > -# SPI Protocol Masters > -# > -# CONFIG_SPI_SPIDEV is not set > -# CONFIG_SPI_TLE62X0 is not set > - > -# > -# PPS support > -# > -# CONFIG_PPS is not set > -CONFIG_ARCH_REQUIRE_GPIOLIB=y > -CONFIG_GPIOLIB=y > -# CONFIG_DEBUG_GPIO is not set > -# CONFIG_GPIO_SYSFS is not set > - > -# > -# Memory mapped GPIO expanders: > -# > - > -# > -# I2C GPIO expanders: > -# > -# CONFIG_GPIO_MAX732X is not set > -CONFIG_GPIO_PCA953X=y > -CONFIG_GPIO_PCF857X=y > -# CONFIG_GPIO_ADP5588 is not set > - > -# > -# PCI GPIO expanders: > -# > - > -# > -# SPI GPIO expanders: > -# > -# CONFIG_GPIO_MAX7301 is not set > -# CONFIG_GPIO_MCP23S08 is not set > -# CONFIG_GPIO_MC33880 is not set > - > -# > -# AC97 GPIO expanders: > -# > -# CONFIG_W1 is not set > -# CONFIG_POWER_SUPPLY is not set > -# CONFIG_HWMON is not set > -# CONFIG_THERMAL is not set > -CONFIG_WATCHDOG=y > -# CONFIG_WATCHDOG_NOWAYOUT is not set > - > -# > -# Watchdog Device Drivers > -# > -# CONFIG_SOFT_WATCHDOG is not set > -CONFIG_DAVINCI_WATCHDOG=y > - > -# > -# USB-based Watchdog Cards > -# > -# CONFIG_USBPCWATCHDOG is not set > -CONFIG_SSB_POSSIBLE=y > - > -# > -# Sonics Silicon Backplane > -# > -# CONFIG_SSB is not set > - > -# > -# Multifunction device drivers > -# > -# CONFIG_MFD_CORE is not set > -# CONFIG_MFD_SM501 is not set > -# CONFIG_MFD_ASIC3 is not set > -# CONFIG_HTC_EGPIO is not set > -# CONFIG_HTC_PASIC3 is not set > -# CONFIG_TPS65010 is not set > -CONFIG_TPS6507x=y > -# CONFIG_TWL4030_CORE is not set > -# CONFIG_MFD_TMIO is not set > -# CONFIG_MFD_T7L66XB is not set > -# CONFIG_MFD_TC6387XB is not set > -# CONFIG_MFD_TC6393XB is not set > -# CONFIG_PMIC_DA903X is not set > -# CONFIG_PMIC_ADP5520 is not set > -# CONFIG_MFD_WM8400 is not set > -# CONFIG_MFD_WM831X is not set > -# CONFIG_MFD_WM8350_I2C is not set > -# CONFIG_MFD_PCF50633 is not set > -# CONFIG_MFD_MC13783 is not set > -# CONFIG_AB3100_CORE is not set > -# CONFIG_EZX_PCAP is not set > -# CONFIG_MFD_88PM8607 is not set > -# CONFIG_AB4500_CORE is not set > -CONFIG_REGULATOR=y > -# CONFIG_REGULATOR_DEBUG is not set > -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set > -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set > -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set > -# CONFIG_REGULATOR_BQ24022 is not set > -# CONFIG_REGULATOR_MAX1586 is not set > -# CONFIG_REGULATOR_MAX8660 is not set > -# CONFIG_REGULATOR_LP3971 is not set > -# CONFIG_REGULATOR_TPS65023 is not set > -CONFIG_REGULATOR_TPS6507X=y > -CONFIG_MEDIA_SUPPORT=y > - > -# > -# Multimedia core support > -# > -CONFIG_VIDEO_DEV=y > -CONFIG_VIDEO_V4L2_COMMON=y > -CONFIG_VIDEO_ALLOW_V4L1=y > -CONFIG_VIDEO_V4L1_COMPAT=y > -# CONFIG_DVB_CORE is not set > -CONFIG_VIDEO_MEDIA=y > - > -# > -# Multimedia drivers > -# > -CONFIG_IR_CORE=y > -CONFIG_VIDEO_IR=y > -# CONFIG_MEDIA_ATTACH is not set > -CONFIG_MEDIA_TUNER=y > -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set > -CONFIG_MEDIA_TUNER_SIMPLE=y > -CONFIG_MEDIA_TUNER_TDA8290=y > -CONFIG_MEDIA_TUNER_TDA9887=y > -CONFIG_MEDIA_TUNER_TEA5761=y > -CONFIG_MEDIA_TUNER_TEA5767=y > -CONFIG_MEDIA_TUNER_MT20XX=y > -CONFIG_MEDIA_TUNER_XC2028=y > -CONFIG_MEDIA_TUNER_XC5000=y > -CONFIG_MEDIA_TUNER_MC44S803=y > -CONFIG_VIDEO_V4L2=y > -CONFIG_VIDEO_V4L1=y > -CONFIG_VIDEOBUF_GEN=y > -CONFIG_VIDEOBUF_DMA_CONTIG=y > -CONFIG_VIDEO_CAPTURE_DRIVERS=y > -# CONFIG_VIDEO_ADV_DEBUG is not set > -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set > -# CONFIG_VIDEO_IR_I2C is not set > - > -# > -# Encoders/decoders and other helper chips > -# > - > -# > -# Audio decoders > -# > -# CONFIG_VIDEO_TVAUDIO is not set > -# CONFIG_VIDEO_TDA7432 is not set > -# CONFIG_VIDEO_TDA9840 is not set > -# CONFIG_VIDEO_TDA9875 is not set > -# CONFIG_VIDEO_TEA6415C is not set > -# CONFIG_VIDEO_TEA6420 is not set > -# CONFIG_VIDEO_MSP3400 is not set > -# CONFIG_VIDEO_CS5345 is not set > -# CONFIG_VIDEO_CS53L32A is not set > -# CONFIG_VIDEO_M52790 is not set > -# CONFIG_VIDEO_TLV320AIC23B is not set > -# CONFIG_VIDEO_WM8775 is not set > -# CONFIG_VIDEO_WM8739 is not set > -# CONFIG_VIDEO_VP27SMPX is not set > - > -# > -# RDS decoders > -# > -# CONFIG_VIDEO_SAA6588 is not set > - > -# > -# Video decoders > -# > -# CONFIG_VIDEO_ADV7180 is not set > -# CONFIG_VIDEO_BT819 is not set > -# CONFIG_VIDEO_BT856 is not set > -# CONFIG_VIDEO_BT866 is not set > -# CONFIG_VIDEO_KS0127 is not set > -# CONFIG_VIDEO_OV7670 is not set > -# CONFIG_VIDEO_MT9V011 is not set > -# CONFIG_VIDEO_TCM825X is not set > -# CONFIG_VIDEO_SAA7110 is not set > -# CONFIG_VIDEO_SAA711X is not set > -# CONFIG_VIDEO_SAA717X is not set > -# CONFIG_VIDEO_SAA7191 is not set > -CONFIG_VIDEO_TVP514X=y > -# CONFIG_VIDEO_TVP5150 is not set > -# CONFIG_VIDEO_VPX3220 is not set > - > -# > -# Video and audio decoders > -# > -# CONFIG_VIDEO_CX25840 is not set > - > -# > -# MPEG video encoders > -# > -# CONFIG_VIDEO_CX2341X is not set > - > -# > -# Video encoders > -# > -# CONFIG_VIDEO_SAA7127 is not set > -# CONFIG_VIDEO_SAA7185 is not set > -# CONFIG_VIDEO_ADV7170 is not set > -# CONFIG_VIDEO_ADV7175 is not set > -# CONFIG_VIDEO_THS7303 is not set > -# CONFIG_VIDEO_ADV7343 is not set > - > -# > -# Video improvement chips > -# > -# CONFIG_VIDEO_UPD64031A is not set > -# CONFIG_VIDEO_UPD64083 is not set > -# CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY is not set > -CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=y > -CONFIG_VIDEO_DAVINCI_VPIF=y > -# CONFIG_VIDEO_VIVI is not set > -# CONFIG_VIDEO_VPSS_SYSTEM is not set > -# CONFIG_VIDEO_VPFE_CAPTURE is not set > -# CONFIG_VIDEO_CPIA is not set > -# CONFIG_VIDEO_CPIA2 is not set > -# CONFIG_VIDEO_SAA5246A is not set > -# CONFIG_VIDEO_SAA5249 is not set > -# CONFIG_SOC_CAMERA is not set > -CONFIG_V4L_USB_DRIVERS=y > -CONFIG_USB_VIDEO_CLASS=y > -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set > -# CONFIG_USB_GSPCA is not set > -# CONFIG_VIDEO_PVRUSB2 is not set > -# CONFIG_VIDEO_HDPVR is not set > -# CONFIG_VIDEO_EM28XX is not set > -# CONFIG_VIDEO_CX231XX is not set > -# CONFIG_VIDEO_USBVISION is not set > -# CONFIG_USB_VICAM is not set > -# CONFIG_USB_IBMCAM is not set > -# CONFIG_USB_KONICAWC is not set > -# CONFIG_USB_QUICKCAM_MESSENGER is not set > -# CONFIG_USB_ET61X251 is not set > -# CONFIG_VIDEO_OVCAMCHIP is not set > -# CONFIG_USB_OV511 is not set > -# CONFIG_USB_SE401 is not set > -# CONFIG_USB_SN9C102 is not set > -# CONFIG_USB_STV680 is not set > -# CONFIG_USB_ZC0301 is not set > -# CONFIG_USB_PWC is not set > -# CONFIG_USB_PWC_INPUT_EVDEV is not set > -# CONFIG_USB_ZR364XX is not set > -# CONFIG_USB_STKWEBCAM is not set > -# CONFIG_USB_S2255 is not set > -# CONFIG_RADIO_ADAPTERS is not set > -# CONFIG_DAB is not set > - > -# > -# Graphics support > -# > -# CONFIG_VGASTATE is not set > -# CONFIG_VIDEO_OUTPUT_CONTROL is not set > -CONFIG_FB=y > -# CONFIG_FIRMWARE_EDID is not set > -# CONFIG_FB_DDC is not set > -# CONFIG_FB_BOOT_VESA_SUPPORT is not set > -CONFIG_FB_CFB_FILLRECT=y > -CONFIG_FB_CFB_COPYAREA=y > -CONFIG_FB_CFB_IMAGEBLIT=y > -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > -# CONFIG_FB_SYS_FILLRECT is not set > -# CONFIG_FB_SYS_COPYAREA is not set > -# CONFIG_FB_SYS_IMAGEBLIT is not set > -# CONFIG_FB_FOREIGN_ENDIAN is not set > -# CONFIG_FB_SYS_FOPS is not set > -# CONFIG_FB_SVGALIB is not set > -# CONFIG_FB_MACMODES is not set > -# CONFIG_FB_BACKLIGHT is not set > -# CONFIG_FB_MODE_HELPERS is not set > -# CONFIG_FB_TILEBLITTING is not set > - > -# > -# Frame buffer hardware drivers > -# > -# CONFIG_FB_S1D13XXX is not set > -# CONFIG_FB_DAVINCI is not set > -# CONFIG_FB_VIRTUAL is not set > -CONFIG_FB_DA8XX=y > -# CONFIG_FB_METRONOME is not set > -# CONFIG_FB_MB862XX is not set > -# CONFIG_FB_BROADSHEET is not set > -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set > - > -# > -# Display device support > -# > -# CONFIG_DISPLAY_SUPPORT is not set > - > -# > -# Console display driver support > -# > -# CONFIG_VGA_CONSOLE is not set > -CONFIG_DUMMY_CONSOLE=y > -CONFIG_FRAMEBUFFER_CONSOLE=y > -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set > -# CONFIG_FONTS is not set > -CONFIG_FONT_8x8=y > -CONFIG_FONT_8x16=y > -CONFIG_LOGO=y > -CONFIG_LOGO_LINUX_MONO=y > -CONFIG_LOGO_LINUX_VGA16=y > -CONFIG_LOGO_LINUX_CLUT224=y > -CONFIG_SOUND=y > -# CONFIG_SOUND_OSS_CORE is not set > -CONFIG_SND=y > -CONFIG_SND_TIMER=y > -CONFIG_SND_PCM=y > -CONFIG_SND_HWDEP=y > -CONFIG_SND_RAWMIDI=y > -CONFIG_SND_JACK=y > -# CONFIG_SND_SEQUENCER is not set > -# CONFIG_SND_MIXER_OSS is not set > -# CONFIG_SND_PCM_OSS is not set > -# CONFIG_SND_HRTIMER is not set > -# CONFIG_SND_DYNAMIC_MINORS is not set > -CONFIG_SND_SUPPORT_OLD_API=y > -CONFIG_SND_VERBOSE_PROCFS=y > -# CONFIG_SND_VERBOSE_PRINTK is not set > -# CONFIG_SND_DEBUG is not set > -# CONFIG_SND_RAWMIDI_SEQ is not set > -# CONFIG_SND_OPL3_LIB_SEQ is not set > -# CONFIG_SND_OPL4_LIB_SEQ is not set > -# CONFIG_SND_SBAWE_SEQ is not set > -# CONFIG_SND_EMU10K1_SEQ is not set > -CONFIG_SND_DRIVERS=y > -# CONFIG_SND_DUMMY is not set > -# CONFIG_SND_MTPAV is not set > -# CONFIG_SND_SERIAL_U16550 is not set > -# CONFIG_SND_MPU401 is not set > -CONFIG_SND_ARM=y > -CONFIG_SND_SPI=y > -CONFIG_SND_USB=y > -CONFIG_SND_USB_AUDIO=y > -# CONFIG_SND_USB_CAIAQ is not set > -CONFIG_SND_SOC=y > -CONFIG_SND_DAVINCI_SOC=y > -CONFIG_SND_DAVINCI_SOC_MCASP=y > -CONFIG_SND_DA850_SOC_EVM=y > -CONFIG_SND_SOC_I2C_AND_SPI=y > -# CONFIG_SND_SOC_ALL_CODECS is not set > -CONFIG_SND_SOC_TLV320AIC3X=y > -# CONFIG_SOUND_PRIME is not set > -CONFIG_HID_SUPPORT=y > -CONFIG_HID=y > -# CONFIG_HIDRAW is not set > - > -# > -# USB Input Devices > -# > -CONFIG_USB_HID=y > -# CONFIG_HID_PID is not set > -# CONFIG_USB_HIDDEV is not set > - > -# > -# Special HID drivers > -# > -# CONFIG_HID_A4TECH is not set > -# CONFIG_HID_APPLE is not set > -# CONFIG_HID_BELKIN is not set > -# CONFIG_HID_CHERRY is not set > -# CONFIG_HID_CHICONY is not set > -# CONFIG_HID_CYPRESS is not set > -# CONFIG_HID_DRAGONRISE is not set > -# CONFIG_HID_EZKEY is not set > -# CONFIG_HID_KYE is not set > -# CONFIG_HID_GYRATION is not set > -# CONFIG_HID_TWINHAN is not set > -# CONFIG_HID_KENSINGTON is not set > -# CONFIG_HID_LOGITECH is not set > -# CONFIG_HID_MICROSOFT is not set > -# CONFIG_HID_MONTEREY is not set > -# CONFIG_HID_NTRIG is not set > -# CONFIG_HID_PANTHERLORD is not set > -# CONFIG_HID_PETALYNX is not set > -# CONFIG_HID_SAMSUNG is not set > -# CONFIG_HID_SONY is not set > -# CONFIG_HID_SUNPLUS is not set > -# CONFIG_HID_GREENASIA is not set > -# CONFIG_HID_SMARTJOYPLUS is not set > -# CONFIG_HID_TOPSEED is not set > -# CONFIG_HID_THRUSTMASTER is not set > -# CONFIG_HID_ZEROPLUS is not set > -CONFIG_USB_SUPPORT=y > -CONFIG_USB_ARCH_HAS_HCD=y > -CONFIG_USB_ARCH_HAS_OHCI=y > -# CONFIG_USB_ARCH_HAS_EHCI is not set > -CONFIG_USB=y > -# CONFIG_USB_DEBUG is not set > -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > - > -# > -# Miscellaneous USB options > -# > -# CONFIG_USB_DEVICEFS is not set > -# CONFIG_USB_DEVICE_CLASS is not set > -# CONFIG_USB_DYNAMIC_MINORS is not set > -CONFIG_USB_SUSPEND=y > -# CONFIG_USB_OTG is not set > -# CONFIG_USB_OTG_WHITELIST is not set > -# CONFIG_USB_OTG_BLACKLIST_HUB is not set > -# CONFIG_USB_MON is not set > -# CONFIG_USB_WUSB is not set > -# CONFIG_USB_WUSB_CBAF is not set > - > -# > -# USB Host Controller Drivers > -# > -# CONFIG_USB_C67X00_HCD is not set > -# CONFIG_USB_OXU210HP_HCD is not set > -# CONFIG_USB_ISP116X_HCD is not set > -# CONFIG_USB_ISP1760_HCD is not set > -# CONFIG_USB_ISP1362_HCD is not set > -CONFIG_USB_OHCI_HCD=y > -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > -CONFIG_USB_OHCI_LITTLE_ENDIAN=y > -# CONFIG_USB_SL811_HCD is not set > -# CONFIG_USB_R8A66597_HCD is not set > -# CONFIG_USB_HWA_HCD is not set > -CONFIG_USB_MUSB_HDRC=y > -CONFIG_USB_MUSB_SOC=y > -CONFIG_USB_MUSB_HOST=y > -# CONFIG_USB_MUSB_PERIPHERAL is not set > -# CONFIG_USB_MUSB_DUAL_ROLE is not set > -# CONFIG_USB_MUSB_OTG is not set > -CONFIG_USB_MUSB_HDRC_HCD=y > -# CONFIG_MUSB_PIO_ONLY is not set > -# CONFIG_USB_INVENTRA_DMA is not set > -# CONFIG_USB_TI_CPPI_DMA is not set > -CONFIG_USB_TI_CPPI41_DMA=y > -CONFIG_USB_MUSB_DEBUG=y > - > -# > -# USB Device Class drivers > -# > -# CONFIG_USB_ACM is not set > -# CONFIG_USB_PRINTER is not set > -# CONFIG_USB_WDM is not set > -# CONFIG_USB_TMC is not set > - > -# > -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may > -# > - > -# > -# also be needed; see USB_STORAGE Help for more info > -# > -CONFIG_USB_STORAGE=y > -# CONFIG_USB_STORAGE_DEBUG is not set > -# CONFIG_USB_STORAGE_DATAFAB is not set > -# CONFIG_USB_STORAGE_FREECOM is not set > -# CONFIG_USB_STORAGE_ISD200 is not set > -# CONFIG_USB_STORAGE_USBAT is not set > -# CONFIG_USB_STORAGE_SDDR09 is not set > -# CONFIG_USB_STORAGE_SDDR55 is not set > -# CONFIG_USB_STORAGE_JUMPSHOT is not set > -# CONFIG_USB_STORAGE_ALAUDA is not set > -# CONFIG_USB_STORAGE_ONETOUCH is not set > -# CONFIG_USB_STORAGE_KARMA is not set > -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > -# CONFIG_USB_LIBUSUAL is not set > - > -# > -# USB Imaging devices > -# > -# CONFIG_USB_MDC800 is not set > -# CONFIG_USB_MICROTEK is not set > - > -# > -# USB port drivers > -# > -# CONFIG_USB_SERIAL is not set > - > -# > -# USB Miscellaneous drivers > -# > -# CONFIG_USB_EMI62 is not set > -# CONFIG_USB_EMI26 is not set > -# CONFIG_USB_ADUTUX is not set > -# CONFIG_USB_SEVSEG is not set > -# CONFIG_USB_RIO500 is not set > -# CONFIG_USB_LEGOTOWER is not set > -# CONFIG_USB_LCD is not set > -# CONFIG_USB_BERRY_CHARGE is not set > -# CONFIG_USB_LED is not set > -# CONFIG_USB_CYPRESS_CY7C63 is not set > -# CONFIG_USB_CYTHERM is not set > -# CONFIG_USB_IDMOUSE is not set > -# CONFIG_USB_FTDI_ELAN is not set > -# CONFIG_USB_APPLEDISPLAY is not set > -# CONFIG_USB_SISUSBVGA is not set > -# CONFIG_USB_LD is not set > -# CONFIG_USB_TRANCEVIBRATOR is not set > -# CONFIG_USB_IOWARRIOR is not set > -# CONFIG_USB_TEST is not set > -# CONFIG_USB_ISIGHTFW is not set > -# CONFIG_USB_VST is not set > -# CONFIG_USB_GADGET is not set > - > -# > -# OTG and related infrastructure > -# > -CONFIG_USB_OTG_UTILS=y > -# CONFIG_USB_GPIO_VBUS is not set > -# CONFIG_USB_ULPI is not set > -CONFIG_NOP_USB_XCEIV=y > -CONFIG_MMC=y > -# CONFIG_MMC_DEBUG is not set > -CONFIG_MMC_UNSAFE_RESUME=y > - > -# > -# MMC/SD/SDIO Card Drivers > -# > -CONFIG_MMC_BLOCK=y > -CONFIG_MMC_BLOCK_BOUNCE=y > -# CONFIG_SDIO_UART is not set > -# CONFIG_MMC_TEST is not set > - > -# > -# MMC/SD/SDIO Host Controller Drivers > -# > -# CONFIG_MMC_SDHCI is not set > -# CONFIG_MMC_AT91 is not set > -# CONFIG_MMC_ATMELMCI is not set > -CONFIG_MMC_DAVINCI=y > -# CONFIG_MMC_SPI is not set > -# CONFIG_MEMSTICK is not set > -# CONFIG_NEW_LEDS is not set > -# CONFIG_ACCESSIBILITY is not set > -CONFIG_RTC_LIB=y > -CONFIG_RTC_CLASS=y > -CONFIG_RTC_HCTOSYS=y > -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" > -# CONFIG_RTC_DEBUG is not set > - > -# > -# RTC interfaces > -# > -CONFIG_RTC_INTF_SYSFS=y > -CONFIG_RTC_INTF_PROC=y > -CONFIG_RTC_INTF_DEV=y > -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set > -# CONFIG_RTC_DRV_TEST is not set > - > -# > -# I2C RTC drivers > -# > -# CONFIG_RTC_DRV_DS1307 is not set > -# CONFIG_RTC_DRV_DS1374 is not set > -# CONFIG_RTC_DRV_DS1672 is not set > -# CONFIG_RTC_DRV_MAX6900 is not set > -# CONFIG_RTC_DRV_RS5C372 is not set > -# CONFIG_RTC_DRV_ISL1208 is not set > -# CONFIG_RTC_DRV_X1205 is not set > -# CONFIG_RTC_DRV_PCF8563 is not set > -# CONFIG_RTC_DRV_PCF8583 is not set > -# CONFIG_RTC_DRV_M41T80 is not set > -# CONFIG_RTC_DRV_BQ32K is not set > -# CONFIG_RTC_DRV_S35390A is not set > -# CONFIG_RTC_DRV_FM3130 is not set > -# CONFIG_RTC_DRV_RX8581 is not set > -# CONFIG_RTC_DRV_RX8025 is not set > - > -# > -# SPI RTC drivers > -# > -# CONFIG_RTC_DRV_M41T94 is not set > -# CONFIG_RTC_DRV_DS1305 is not set > -# CONFIG_RTC_DRV_DS1390 is not set > -# CONFIG_RTC_DRV_MAX6902 is not set > -# CONFIG_RTC_DRV_R9701 is not set > -# CONFIG_RTC_DRV_RS5C348 is not set > -# CONFIG_RTC_DRV_DS3234 is not set > -# CONFIG_RTC_DRV_PCF2123 is not set > - > -# > -# Platform RTC drivers > -# > -# CONFIG_RTC_DRV_CMOS is not set > -# CONFIG_RTC_DRV_DS1286 is not set > -# CONFIG_RTC_DRV_DS1511 is not set > -# CONFIG_RTC_DRV_DS1553 is not set > -# CONFIG_RTC_DRV_DS1742 is not set > -# CONFIG_RTC_DRV_STK17TA8 is not set > -# CONFIG_RTC_DRV_M48T86 is not set > -# CONFIG_RTC_DRV_M48T35 is not set > -# CONFIG_RTC_DRV_M48T59 is not set > -# CONFIG_RTC_DRV_MSM6242 is not set > -# CONFIG_RTC_DRV_BQ4802 is not set > -# CONFIG_RTC_DRV_RP5C01 is not set > -# CONFIG_RTC_DRV_V3020 is not set > - > -# > -# on-CPU RTC drivers > -# > -CONFIG_RTC_DRV_OMAP=y > -# CONFIG_DMADEVICES is not set > -# CONFIG_AUXDISPLAY is not set > -CONFIG_UIO=y > -# CONFIG_UIO_PDRV is not set > -# CONFIG_UIO_PDRV_GENIRQ is not set > -# CONFIG_UIO_SMX is not set > -# CONFIG_UIO_SERCOS3 is not set > -CONFIG_UIO_PRUSS=m > - > -# > -# TI VLYNQ > -# > -# CONFIG_STAGING is not set > - > -# > -# File systems > -# > -CONFIG_EXT2_FS=y > -# CONFIG_EXT2_FS_XATTR is not set > -# CONFIG_EXT2_FS_XIP is not set > -CONFIG_EXT3_FS=y > -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set > -CONFIG_EXT3_FS_XATTR=y > -# CONFIG_EXT3_FS_POSIX_ACL is not set > -# CONFIG_EXT3_FS_SECURITY is not set > -# CONFIG_EXT4_FS is not set > -CONFIG_JBD=y > -# CONFIG_JBD_DEBUG is not set > -CONFIG_FS_MBCACHE=y > -# CONFIG_REISERFS_FS is not set > -# CONFIG_JFS_FS is not set > -# CONFIG_FS_POSIX_ACL is not set > -# CONFIG_XFS_FS is not set > -# CONFIG_GFS2_FS is not set > -# CONFIG_OCFS2_FS is not set > -# CONFIG_BTRFS_FS is not set > -# CONFIG_NILFS2_FS is not set > -CONFIG_FILE_LOCKING=y > -CONFIG_FSNOTIFY=y > -CONFIG_DNOTIFY=y > -CONFIG_INOTIFY=y > -CONFIG_INOTIFY_USER=y > -# CONFIG_QUOTA is not set > -# CONFIG_AUTOFS_FS is not set > -CONFIG_AUTOFS4_FS=m > -# CONFIG_FUSE_FS is not set > - > -# > -# Caches > -# > -# CONFIG_FSCACHE is not set > - > -# > -# CD-ROM/DVD Filesystems > -# > -# CONFIG_ISO9660_FS is not set > -# CONFIG_UDF_FS is not set > - > -# > -# DOS/FAT/NT Filesystems > -# > -CONFIG_FAT_FS=y > -CONFIG_MSDOS_FS=y > -CONFIG_VFAT_FS=y > -CONFIG_FAT_DEFAULT_CODEPAGE=437 > -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > -# CONFIG_NTFS_FS is not set > - > -# > -# Pseudo filesystems > -# > -CONFIG_PROC_FS=y > -CONFIG_PROC_SYSCTL=y > -CONFIG_PROC_PAGE_MONITOR=y > -CONFIG_SYSFS=y > -CONFIG_TMPFS=y > -# CONFIG_TMPFS_POSIX_ACL is not set > -# CONFIG_HUGETLB_PAGE is not set > -# CONFIG_CONFIGFS_FS is not set > -CONFIG_MISC_FILESYSTEMS=y > -# CONFIG_ADFS_FS is not set > -# CONFIG_AFFS_FS is not set > -# CONFIG_HFS_FS is not set > -# CONFIG_HFSPLUS_FS is not set > -# CONFIG_BEFS_FS is not set > -# CONFIG_BFS_FS is not set > -# CONFIG_EFS_FS is not set > -CONFIG_JFFS2_FS=y > -CONFIG_JFFS2_FS_DEBUG=0 > -CONFIG_JFFS2_FS_WRITEBUFFER=y > -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set > -# CONFIG_JFFS2_SUMMARY is not set > -# CONFIG_JFFS2_FS_XATTR is not set > -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set > -CONFIG_JFFS2_ZLIB=y > -# CONFIG_JFFS2_LZO is not set > -CONFIG_JFFS2_RTIME=y > -# CONFIG_JFFS2_RUBIN is not set > -CONFIG_CRAMFS=y > -# CONFIG_SQUASHFS is not set > -# CONFIG_VXFS_FS is not set > -CONFIG_MINIX_FS=m > -# CONFIG_OMFS_FS is not set > -# CONFIG_HPFS_FS is not set > -# CONFIG_QNX4FS_FS is not set > -# CONFIG_ROMFS_FS is not set > -# CONFIG_SYSV_FS is not set > -# CONFIG_UFS_FS is not set > -CONFIG_NETWORK_FILESYSTEMS=y > -CONFIG_NFS_FS=y > -CONFIG_NFS_V3=y > -# CONFIG_NFS_V3_ACL is not set > -# CONFIG_NFS_V4 is not set > -CONFIG_ROOT_NFS=y > -CONFIG_NFSD=m > -CONFIG_NFSD_V3=y > -# CONFIG_NFSD_V3_ACL is not set > -# CONFIG_NFSD_V4 is not set > -CONFIG_LOCKD=y > -CONFIG_LOCKD_V4=y > -CONFIG_EXPORTFS=m > -CONFIG_NFS_COMMON=y > -CONFIG_SUNRPC=y > -# CONFIG_RPCSEC_GSS_KRB5 is not set > -# CONFIG_RPCSEC_GSS_SPKM3 is not set > -CONFIG_SMB_FS=m > -# CONFIG_SMB_NLS_DEFAULT is not set > -# CONFIG_CIFS is not set > -# CONFIG_NCP_FS is not set > -# CONFIG_CODA_FS is not set > -# CONFIG_AFS_FS is not set > - > -# > -# Partition Types > -# > -CONFIG_PARTITION_ADVANCED=y > -# CONFIG_ACORN_PARTITION is not set > -# CONFIG_OSF_PARTITION is not set > -# CONFIG_AMIGA_PARTITION is not set > -# CONFIG_ATARI_PARTITION is not set > -# CONFIG_MAC_PARTITION is not set > -CONFIG_MSDOS_PARTITION=y > -# CONFIG_BSD_DISKLABEL is not set > -# CONFIG_MINIX_SUBPARTITION is not set > -# CONFIG_SOLARIS_X86_PARTITION is not set > -# CONFIG_UNIXWARE_DISKLABEL is not set > -# CONFIG_LDM_PARTITION is not set > -# CONFIG_SGI_PARTITION is not set > -# CONFIG_ULTRIX_PARTITION is not set > -# CONFIG_SUN_PARTITION is not set > -# CONFIG_KARMA_PARTITION is not set > -# CONFIG_EFI_PARTITION is not set > -# CONFIG_SYSV68_PARTITION is not set > -CONFIG_NLS=y > -CONFIG_NLS_DEFAULT="iso8859-1" > -CONFIG_NLS_CODEPAGE_437=y > -# CONFIG_NLS_CODEPAGE_737 is not set > -# CONFIG_NLS_CODEPAGE_775 is not set > -# CONFIG_NLS_CODEPAGE_850 is not set > -# CONFIG_NLS_CODEPAGE_852 is not set > -# CONFIG_NLS_CODEPAGE_855 is not set > -# CONFIG_NLS_CODEPAGE_857 is not set > -# CONFIG_NLS_CODEPAGE_860 is not set > -# CONFIG_NLS_CODEPAGE_861 is not set > -# CONFIG_NLS_CODEPAGE_862 is not set > -# CONFIG_NLS_CODEPAGE_863 is not set > -# CONFIG_NLS_CODEPAGE_864 is not set > -# CONFIG_NLS_CODEPAGE_865 is not set > -# CONFIG_NLS_CODEPAGE_866 is not set > -# CONFIG_NLS_CODEPAGE_869 is not set > -# CONFIG_NLS_CODEPAGE_936 is not set > -# CONFIG_NLS_CODEPAGE_950 is not set > -# CONFIG_NLS_CODEPAGE_932 is not set > -# CONFIG_NLS_CODEPAGE_949 is not set > -# CONFIG_NLS_CODEPAGE_874 is not set > -# CONFIG_NLS_ISO8859_8 is not set > -# CONFIG_NLS_CODEPAGE_1250 is not set > -# CONFIG_NLS_CODEPAGE_1251 is not set > -CONFIG_NLS_ASCII=m > -CONFIG_NLS_ISO8859_1=y > -# CONFIG_NLS_ISO8859_2 is not set > -# CONFIG_NLS_ISO8859_3 is not set > -# CONFIG_NLS_ISO8859_4 is not set > -# CONFIG_NLS_ISO8859_5 is not set > -# CONFIG_NLS_ISO8859_6 is not set > -# CONFIG_NLS_ISO8859_7 is not set > -# CONFIG_NLS_ISO8859_9 is not set > -# CONFIG_NLS_ISO8859_13 is not set > -# CONFIG_NLS_ISO8859_14 is not set > -# CONFIG_NLS_ISO8859_15 is not set > -# CONFIG_NLS_KOI8_R is not set > -# CONFIG_NLS_KOI8_U is not set > -CONFIG_NLS_UTF8=m > -# CONFIG_DLM is not set > - > -# > -# Kernel hacking > -# > -# CONFIG_PRINTK_TIME is not set > -# CONFIG_ENABLE_WARN_DEPRECATED is not set > -# CONFIG_ENABLE_MUST_CHECK is not set > -CONFIG_FRAME_WARN=1024 > -# CONFIG_MAGIC_SYSRQ is not set > -# CONFIG_STRIP_ASM_SYMS is not set > -# CONFIG_UNUSED_SYMBOLS is not set > -CONFIG_DEBUG_FS=y > -# CONFIG_HEADERS_CHECK is not set > -CONFIG_DEBUG_KERNEL=y > -# CONFIG_DEBUG_SHIRQ is not set > -CONFIG_DETECT_SOFTLOCKUP=y > -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set > -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 > -CONFIG_DETECT_HUNG_TASK=y > -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set > -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 > -CONFIG_SCHED_DEBUG=y > -# CONFIG_SCHEDSTATS is not set > -CONFIG_TIMER_STATS=y > -# CONFIG_DEBUG_OBJECTS is not set > -# CONFIG_SLUB_DEBUG_ON is not set > -# CONFIG_SLUB_STATS is not set > -# CONFIG_DEBUG_KMEMLEAK is not set > -CONFIG_DEBUG_PREEMPT=y > -# CONFIG_DEBUG_RT_MUTEXES is not set > -# CONFIG_RT_MUTEX_TESTER is not set > -# CONFIG_DEBUG_SPINLOCK is not set > -# CONFIG_DEBUG_MUTEXES is not set > -# CONFIG_DEBUG_LOCK_ALLOC is not set > -# CONFIG_PROVE_LOCKING is not set > -# CONFIG_LOCK_STAT is not set > -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set > -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set > -# CONFIG_DEBUG_KOBJECT is not set > -CONFIG_DEBUG_BUGVERBOSE=y > -# CONFIG_DEBUG_INFO is not set > -# CONFIG_DEBUG_VM is not set > -# CONFIG_DEBUG_WRITECOUNT is not set > -# CONFIG_DEBUG_MEMORY_INIT is not set > -# CONFIG_DEBUG_LIST is not set > -# CONFIG_DEBUG_SG is not set > -# CONFIG_DEBUG_NOTIFIERS is not set > -# CONFIG_DEBUG_CREDENTIALS is not set > -CONFIG_FRAME_POINTER=y > -# CONFIG_BOOT_PRINTK_DELAY is not set > -# CONFIG_RCU_TORTURE_TEST is not set > -# CONFIG_RCU_CPU_STALL_DETECTOR is not set > -# CONFIG_BACKTRACE_SELF_TEST is not set > -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set > -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set > -# CONFIG_FAULT_INJECTION is not set > -# CONFIG_LATENCYTOP is not set > -# CONFIG_SYSCTL_SYSCALL_CHECK is not set > -# CONFIG_PAGE_POISONING is not set > -CONFIG_HAVE_FUNCTION_TRACER=y > -CONFIG_TRACING_SUPPORT=y > -# CONFIG_FTRACE is not set > -# CONFIG_DYNAMIC_DEBUG is not set > -# CONFIG_SAMPLES is not set > -CONFIG_HAVE_ARCH_KGDB=y > -# CONFIG_KGDB is not set > -# CONFIG_ARM_UNWIND is not set > -# CONFIG_DEBUG_USER is not set > -# CONFIG_DEBUG_ERRORS is not set > -# CONFIG_DEBUG_STACK_USAGE is not set > -# CONFIG_DEBUG_LL is not set > -# CONFIG_OC_ETM is not set > - > -# > -# Security options > -# > -# CONFIG_KEYS is not set > -# CONFIG_SECURITY is not set > -# CONFIG_SECURITYFS is not set > -# CONFIG_DEFAULT_SECURITY_SELINUX is not set > -# CONFIG_DEFAULT_SECURITY_SMACK is not set > -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set > -CONFIG_DEFAULT_SECURITY_DAC=y > -CONFIG_DEFAULT_SECURITY="" > -CONFIG_XOR_BLOCKS=m > -CONFIG_ASYNC_CORE=m > -CONFIG_ASYNC_MEMCPY=m > -CONFIG_ASYNC_XOR=m > -CONFIG_ASYNC_PQ=m > -CONFIG_ASYNC_RAID6_RECOV=m > -CONFIG_CRYPTO=y > - > -# > -# Crypto core or helper > -# > -# CONFIG_CRYPTO_MANAGER is not set > -# CONFIG_CRYPTO_MANAGER2 is not set > -# CONFIG_CRYPTO_GF128MUL is not set > -# CONFIG_CRYPTO_NULL is not set > -# CONFIG_CRYPTO_CRYPTD is not set > -# CONFIG_CRYPTO_AUTHENC is not set > -# CONFIG_CRYPTO_TEST is not set > - > -# > -# Authenticated Encryption with Associated Data > -# > -# CONFIG_CRYPTO_CCM is not set > -# CONFIG_CRYPTO_GCM is not set > -# CONFIG_CRYPTO_SEQIV is not set > - > -# > -# Block modes > -# > -# CONFIG_CRYPTO_CBC is not set > -# CONFIG_CRYPTO_CTR is not set > -# CONFIG_CRYPTO_CTS is not set > -# CONFIG_CRYPTO_ECB is not set > -# CONFIG_CRYPTO_LRW is not set > -# CONFIG_CRYPTO_PCBC is not set > -# CONFIG_CRYPTO_XTS is not set > - > -# > -# Hash modes > -# > -# CONFIG_CRYPTO_HMAC is not set > -# CONFIG_CRYPTO_XCBC is not set > -# CONFIG_CRYPTO_VMAC is not set > - > -# > -# Digest > -# > -# CONFIG_CRYPTO_CRC32C is not set > -# CONFIG_CRYPTO_GHASH is not set > -# CONFIG_CRYPTO_MD4 is not set > -# CONFIG_CRYPTO_MD5 is not set > -# CONFIG_CRYPTO_MICHAEL_MIC is not set > -# CONFIG_CRYPTO_RMD128 is not set > -# CONFIG_CRYPTO_RMD160 is not set > -# CONFIG_CRYPTO_RMD256 is not set > -# CONFIG_CRYPTO_RMD320 is not set > -# CONFIG_CRYPTO_SHA1 is not set > -# CONFIG_CRYPTO_SHA256 is not set > -# CONFIG_CRYPTO_SHA512 is not set > -# CONFIG_CRYPTO_TGR192 is not set > -# CONFIG_CRYPTO_WP512 is not set > - > -# > -# Ciphers > -# > -# CONFIG_CRYPTO_AES is not set > -# CONFIG_CRYPTO_ANUBIS is not set > -# CONFIG_CRYPTO_ARC4 is not set > -# CONFIG_CRYPTO_BLOWFISH is not set > -# CONFIG_CRYPTO_CAMELLIA is not set > -# CONFIG_CRYPTO_CAST5 is not set > -# CONFIG_CRYPTO_CAST6 is not set > -# CONFIG_CRYPTO_DES is not set > -# CONFIG_CRYPTO_FCRYPT is not set > -# CONFIG_CRYPTO_KHAZAD is not set > -# CONFIG_CRYPTO_SALSA20 is not set > -# CONFIG_CRYPTO_SEED is not set > -# CONFIG_CRYPTO_SERPENT is not set > -# CONFIG_CRYPTO_TEA is not set > -# CONFIG_CRYPTO_TWOFISH is not set > - > -# > -# Compression > -# > -# CONFIG_CRYPTO_DEFLATE is not set > -# CONFIG_CRYPTO_ZLIB is not set > -# CONFIG_CRYPTO_LZO is not set > - > -# > -# Random Number Generation > -# > -# CONFIG_CRYPTO_ANSI_CPRNG is not set > -# CONFIG_CRYPTO_HW is not set > -# CONFIG_BINARY_PRINTF is not set > - > -# > -# Library routines > -# > -CONFIG_BITREVERSE=y > -CONFIG_GENERIC_FIND_LAST_BIT=y > -CONFIG_CRC_CCITT=m > -# CONFIG_CRC16 is not set > -CONFIG_CRC_T10DIF=m > -# CONFIG_CRC_ITU_T is not set > -CONFIG_CRC32=y > -# CONFIG_CRC7 is not set > -# CONFIG_LIBCRC32C is not set > -CONFIG_ZLIB_INFLATE=y > -CONFIG_ZLIB_DEFLATE=y > -CONFIG_DECOMPRESS_GZIP=y > -CONFIG_GENERIC_ALLOCATOR=y > -CONFIG_HAS_IOMEM=y > -CONFIG_HAS_IOPORT=y > -CONFIG_HAS_DMA=y > -CONFIG_NLATTR=y > diff --git a/recipes-kernel/linux/linux- > davinci/omapl138/logo_linux_clut224.ppm b/recipes-kernel/linux/linux- > davinci/omapl138/logo_linux_clut224.ppm > deleted file mode 100644 > index 98fd656..0000000 > --- a/recipes-kernel/linux/linux-davinci/omapl138/logo_linux_clut224.ppm > +++ /dev/null > @@ -1,21763 +0,0 @@ > -P3 > -480 272 > -255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 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255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > -255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 > 255 > diff --git a/recipes-kernel/linux/linux-davinci/update-mach-types.patch > b/recipes-kernel/linux/linux-davinci/update-mach-types.patch > deleted file mode 100644 > index f72836b..0000000 > --- a/recipes-kernel/linux/linux-davinci/update-mach-types.patch > +++ /dev/null > @@ -1,160 +0,0 @@ > ---- /tmp/mach-types 2009-03-17 16:55:42.000000000 +0100 > -+++ git/arch/arm/tools/mach-types 2009-03-17 16:56:28.000000000 > +0100 > -@@ -12,7 +12,7 @@ > - # > - # http://www.arm.linux.org.uk/developer/machines/?action=new > - # > --# Last update: Sun Nov 30 16:39:36 2008 > -+# Last update: Tue Mar 17 15:56:28 2009 > - # > - # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx > number > - # > -@@ -1811,7 +1811,7 @@ > - jade MACH_JADE JADE 1821 > - ks8695_softplc MACH_KS8695_SOFTPLC > KS8695_SOFTPLC 1822 > - gprisc3 MACH_GPRISC3 GPRISC3 > 1823 > --stamp9260 MACH_STAMP9260 STAMP9260 > 1824 > -+stamp9g20 MACH_STAMP9G20 STAMP9G20 > 1824 > - smdk6430 MACH_SMDK6430 SMDK6430 > 1825 > - smdkc100 MACH_SMDKC100 SMDKC100 > 1826 > - tavorevb MACH_TAVOREVB TAVOREVB > 1827 > -@@ -1993,4 +1993,138 @@ > - benzina MACH_BENZINA BENZINA > 2003 > - blaze MACH_BLAZE BLAZE 2004 > - linkstation_ls_hgl MACH_LINKSTATION_LS_HGL > LINKSTATION_LS_HGL 2005 > --htcvenus MACH_HTCVENUS HTCVENUS > 2006 > -+htckovsky MACH_HTCVENUS HTCVENUS > 2006 > -+sony_prs505 MACH_SONY_PRS505 SONY_PRS505 2007 > -+hanlin_v3 MACH_HANLIN_V3 HANLIN_V3 > 2008 > -+sapphira MACH_SAPPHIRA SAPPHIRA > 2009 > -+dack_sda_01 MACH_DACK_SDA_01 DACK_SDA_01 2010 > -+armbox MACH_ARMBOX ARMBOX > 2011 > -+harris_rvp MACH_HARRIS_RVP HARRIS_RVP > 2012 > -+ribaldo MACH_RIBALDO RIBALDO > 2013 > -+agora MACH_AGORA AGORA 2014 > -+omap3_mini MACH_OMAP3_MINI OMAP3_MINI > 2015 > -+a9sam6432_b MACH_A9SAM6432_B A9SAM6432_B > 2016 > -+usg2410 MACH_USG2410 USG2410 > 2017 > -+pc72052_i10_revb MACH_PC72052_I10_REVB PC72052_I10_REVB > 2018 > -+mx35_exm32 MACH_MX35_EXM32 MX35_EXM32 > 2019 > -+topas910 MACH_TOPAS910 TOPAS910 > 2020 > -+hyena MACH_HYENA HYENA > 2021 > -+pospax MACH_POSPAX POSPAX > 2022 > -+hdl_gx MACH_HDL_GX HDL_GX > 2023 > -+ctera_4bay MACH_CTERA_4BAY CTERA_4BAY > 2024 > -+ctera_plug_c MACH_CTERA_PLUG_C CTERA_PLUG_C 2025 > -+crwea_plug_i MACH_CRWEA_PLUG_I CRWEA_PLUG_I 2026 > -+egauge2 MACH_EGAUGE2 EGAUGE2 > 2027 > -+didj MACH_DIDJ DIDJ 2028 > -+m_s3c2443 MACH_MEISTER MEISTER > 2029 > -+htcblackstone MACH_HTCBLACKSTONE HTCBLACKSTONE > 2030 > -+cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 > 2031 > -+smdk6440 MACH_SMDK6440 SMDK6440 > 2032 > -+omap_35xx_mvp MACH_OMAP_35XX_MVP > OMAP_35XX_MVP 2033 > -+ctera_plug_i MACH_CTERA_PLUG_I CTERA_PLUG_I 2034 > -+pvg610_100 MACH_PVG610 PVG610 > 2035 > -+hprw6815 MACH_HPRW6815 HPRW6815 > 2036 > -+omap3_oswald MACH_OMAP3_OSWALD > OMAP3_OSWALD 2037 > -+nas4220b MACH_NAS4220B NAS4220B > 2038 > -+htcraphael_cdma MACH_HTCRAPHAEL_CDMA > HTCRAPHAEL_CDMA 2039 > -+htcdiamond_cdma MACH_HTCDIAMOND_CDMA > HTCDIAMOND_CDMA 2040 > -+scaler MACH_SCALER SCALER 2041 > -+zylonite2 MACH_ZYLONITE2 ZYLONITE2 > 2042 > -+aspenite MACH_ASPENITE ASPENITE > 2043 > -+teton MACH_TETON TETON 2044 > -+ttc_dkb MACH_TTC_DKB TTC_DKB > 2045 > -+bishop2 MACH_BISHOP2 BISHOP2 > 2046 > -+ippv5 MACH_IPPV5 IPPV5 2047 > -+farm926 MACH_FARM926 FARM926 > 2048 > -+mmccpu MACH_MMCCPU MMCCPU > 2049 > -+sgmsfl MACH_SGMSFL SGMSFL > 2050 > -+tt8000 MACH_TT8000 TT8000 > 2051 > -+zrn4300lp MACH_ZRN4300LP ZRN4300LP > 2052 > -+mptc MACH_MPTC MPTC 2053 > -+h6051 MACH_H6051 H6051 > 2054 > -+pvg610_101 MACH_PVG610_101 PVG610_101 > 2055 > -+stamp9261_pc_evb MACH_STAMP9261_PC_EVB STAMP9261_PC_EVB > 2056 > -+pelco_odysseus MACH_PELCO_ODYSSEUS > PELCO_ODYSSEUS 2057 > -+tny_a9260 MACH_TNY_A9260 TNY_A9260 > 2058 > -+tny_a9g20 MACH_TNY_A9G20 TNY_A9G20 > 2059 > -+aesop_mp2530f MACH_AESOP_MP2530F > AESOP_MP2530F 2060 > -+dx900 MACH_DX900 DX900 > 2061 > -+cpodc2 MACH_CPODC2 CPODC2 > 2062 > -+tilt_8925 MACH_TILT_8925 TILT_8925 > 2063 > -+davinci_dm357_evm MACH_DAVINCI_DM357_EVM > DAVINCI_DM357_EVM 2064 > -+swordfish MACH_SWORDFISH SWORDFISH > 2065 > -+corvus MACH_CORVUS CORVUS > 2066 > -+taurus MACH_TAURUS TAURUS > 2067 > -+axm MACH_AXM AXM 2068 > -+axc MACH_AXC AXC 2069 > -+baby MACH_BABY BABY 2070 > -+mp200 MACH_MP200 MP200 > 2071 > -+pcm043 MACH_PCM043 PCM043 > 2072 > -+hanlin_v3c MACH_HANLIN_V3C HANLIN_V3C > 2073 > -+kbk9g20 MACH_KBK9G20 KBK9G20 > 2074 > -+adsturbog5 MACH_ADSTURBOG5 ADSTURBOG5 > 2075 > -+avenger_lite1 MACH_AVENGER_LITE1 AVENGER_LITE1 > 2076 > -+suc82x MACH_SUC SUC > 2077 > -+at91sam7s256 MACH_AT91SAM7S256 AT91SAM7S256 > 2078 > -+mendoza MACH_MENDOZA MENDOZA > 2079 > -+kira MACH_KIRA KIRA 2080 > -+mx1hbm MACH_MX1HBM MX1HBM > 2081 > -+quatro43xx MACH_QUATRO43XX QUATRO43XX > 2082 > -+quatro4230 MACH_QUATRO4230 QUATRO4230 > 2083 > -+nsb400 MACH_NSB400 NSB400 > 2084 > -+drp255 MACH_DRP255 DRP255 > 2085 > -+thoth MACH_THOTH THOTH 2086 > -+firestone MACH_FIRESTONE FIRESTONE > 2087 > -+asusp750 MACH_ASUSP750 ASUSP750 > 2088 > -+ctera_dl MACH_CTERA_DL CTERA_DL > 2089 > -+socr MACH_SOCR SOCR 2090 > -+htcoxygen MACH_HTCOXYGEN HTCOXYGEN > 2091 > -+heroc MACH_HEROC HEROC 2092 > -+zeno6800 MACH_ZENO6800 ZENO6800 > 2093 > -+sc2mcs MACH_SC2MCS SC2MCS > 2094 > -+gene100 MACH_GENE100 GENE100 > 2095 > -+as353x MACH_AS353X AS353X > 2096 > -+sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG > 2097 > -+at91sam9g20 MACH_AT91SAM9G20 AT91SAM9G20 2098 > -+mv88f6192gtw_fe MACH_MV88F6192GTW_FE > MV88F6192GTW_FE 2099 > -+cc9200 MACH_CC9200 CC9200 > 2100 > -+sm9200 MACH_SM9200 SM9200 > 2101 > -+tp9200 MACH_TP9200 TP9200 > 2102 > -+snapperdv MACH_SNAPPERDV SNAPPERDV > 2103 > -+avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104 > -+avengers_lite1 MACH_AVENGERS_LITE1 > AVENGERS_LITE1 2105 > -+omap3axon MACH_OMAP3AXON OMAP3AXON > 2106 > -+ma8xx MACH_MA8XX MA8XX > 2107 > -+mp201ek MACH_MP201EK MP201EK > 2108 > -+davinci_tux MACH_DAVINCI_TUX DAVINCI_TUX 2109 > -+mpa1600 MACH_MPA1600 MPA1600 > 2110 > -+pelco_troy MACH_PELCO_TROY PELCO_TROY > 2111 > -+nsb667 MACH_NSB667 NSB667 > 2112 > -+rovers5_4mpix MACH_ROVERS5_4MPIX > ROVERS5_4MPIX 2113 > -+twocom MACH_TWOCOM TWOCOM > 2114 > -+ubisys_p9_rcu3r2 MACH_UBISYS_P9_RCU3R2 UBISYS_P9_RCU3R2 > 2115 > -+hero_espresso MACH_HERO_ESPRESSO > HERO_ESPRESSO 2116 > -+afeusb MACH_AFEUSB AFEUSB > 2117 > -+t830 MACH_T830 T830 2118 > -+spd8020_cc MACH_SPD8020_CC SPD8020_CC > 2119 > -+om_3d7k MACH_OM_3D7K OM_3D7K > 2120 > -+picocom2 MACH_PICOCOM2 PICOCOM2 > 2121 > -+uwg4mx27 MACH_UWG4MX27 UWG4MX27 > 2122 > -+uwg4mx31 MACH_UWG4MX31 UWG4MX31 > 2123 > -+cherry MACH_CHERRY CHERRY > 2124 > -+mx51_babbage MACH_MX51_BABBAGE > MX51_BABBAGE 2125 > -+s3c2440turkiye MACH_S3C2440TURKIYE > S3C2440TURKIYE 2126 > -+tx37 MACH_TX37 TX37 2127 > -+sbc2800_9g20 MACH_SBC2800_9G20 SBC2800_9G20 > 2128 > -+benzglb MACH_BENZGLB BENZGLB > 2129 > -+benztd MACH_BENZTD BENZTD > 2130 > -+cartesio_plus MACH_CARTESIO_PLUS CARTESIO_PLUS > 2131 > -+solrad_g20 MACH_SOLRAD_G20 SOLRAD_G20 > 2132 > -+mx27wallace MACH_MX27WALLACE MX27WALLACE 2133 > -+fmzwebmodul MACH_FMZWEBMODUL > FMZWEBMODUL 2134 > -+rd78x00_masa MACH_RD78X00_MASA > RD78X00_MASA 2135 > -+smallogger MACH_SMALLOGGER SMALLOGGER > 2136 > -+ccw9p9215 MACH_CCW9P9215 CCW9P9215 > 2137 > -+dm355_leopard MACH_DM355_LEOPARD > DM355_LEOPARD 2138 > -+ts219 MACH_TS219 TS219 2139 > -+tny_a9263 MACH_TNY_A9263 TNY_A9263 > 2140 > diff --git a/recipes-kernel/linux/linux-davinci_git.bb b/recipes-kernel/linux/linux- > davinci_git.bb > deleted file mode 100644 > index 03eeb46..0000000 > --- a/recipes-kernel/linux/linux-davinci_git.bb > +++ /dev/null > @@ -1,56 +0,0 @@ > -require multi-kernel.inc > - > -DESCRIPTION = "Linux kernel for DaVinci processors" > - > -COMPATIBLE_MACHINE = "hawkboard" > - > -DEFAULT_PREFERENCE_hawkboard = "1" > - > -BRANCH = "master" > - > -SRC_URI_append = " file://defconfig " > - > -S = "${WORKDIR}/git" > - > -# The main PR is now using MACHINE_KERNEL_PR, for davinci see > conf/machine/include/davinci.inc > - > -# OMAPL tracking master branch - PSP 3.20.00.12 > - > -ARAGO_L1_REV = "2acf935c01b9adb50164d421c40cdc5862b9e143" > -ARAGO_L1_BR = "master" > -ARAGO_L1_PV = "2.6.32+2.6.33-rc4-${PR}+gitr${SRCREV}" > -ARAGO_L1_URI = "git://arago-project.org/git/projects/linux- > omapl1.git;protocol=git;branch=${BRANCH} " > - > -SRCREV_hawkboard = "${ARAGO_L1_REV}" > - > -PV_omapl138 = "${ARAGO_L1_PV}" > - > -BRANCH_omapl138 = "${ARAGO_L1_BR}" > - > -SRC_URI_append_omapl138 = "${ARAGO_L1_URI}" > - > -SRC_URI_append_omapl138 = " file://logo_linux_clut224.ppm \ > - file://0001-ahci-ti-Fix-currently-harmless-typo-in-SATA- > PHY.patch \ > - file://0002-ahci-ti-Update-SATA-PHY-configuration- > RXCDR.patch \ > - file://0001-board-da850-evm-Disable-NAND- > SUBPAGE.patch \ > - file://0001-uio_pruss1-Core-driver-addition.patch \ > - file://0002-uio_pruss2-Platform-changes.patch \ > - file://0003-uio_pruss3-Workarounds-put-into-core- > code.patch \ > - file://0001-cgroupfs-create-sys-fs-cgroup-to-mount- > cgroupfs-on.patch \ > - file://0001-ARM-6329-1-wire-up-sys_accept4-on- > ARM.patch \ > - " > - > -SRC_URI_append_hawkboard = " \ > - file://patch-2.6.33rc4-psp-to-hawkboard.patch \ > - file://0001-board-da850-hawk-Disable-NAND- > SUBPAGE.patch \ > - " > - > -# Perf in 2.6.33rc has broken perl handling, so disable it > -do_compile_perf() { > - : > -} > - > -do_install_perf() { > - : > -} > - > -- > 1.8.3.2 > > _______________________________________________ > meta-ti mailing list > meta-ti@yoctoproject.org > https://lists.yoctoproject.org/listinfo/meta-ti ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 5/8] linux-omap-psp-2.6.32: remove old linux-omap3 PSP kernel 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko ` (3 preceding siblings ...) 2013-09-28 22:54 ` [PATCH 4/8] linux-davinci 2.6.32: remove old hawkboard-specific kernel Denys Dmytriyenko @ 2013-09-28 22:54 ` Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 6/8] linux-keystone: update from 3.6.6 to 3.8.4 Denys Dmytriyenko ` (2 subsequent siblings) 7 siblings, 0 replies; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-28 22:54 UTC (permalink / raw) To: meta-ti [-- Warning: decoded text below may be mangled, UTF-8 assumed --] [-- Attachment #1: Type: text/plain; charset=UTF-8, Size: 5580346 bytes --] From: Denys Dmytriyenko <denys@ti.com> * Many machines are supported by newer 3.x kernel recipes * Few old platforms are still supported by 2.6.37 recipes * Some platforms are not supported in meta-ti, like Crane, Touchbook, Overo * For any platform still requiring this outdated kernel, the recipe can be picked up from Danny or Denzil Signed-off-by: Denys Dmytriyenko <denys@ti.com> --- .../0001-Added-Crane-Board-support.patch | 5237 -- ...BeagleBoard-Adjust-USER-button-pin-for-xM.patch | 28 - ...board-print-expansionboard-name-detected-.patch | 51 - ....1.6-kernel-source-patched-with-OCF-Linux.patch | 88333 ------------------- ...vert-omap3-beagle-Fix-compile-time-errors.patch | 67 - ...create-sys-fs-cgroup-to-mount-cgroupfs-on.patch | 58 - ...board-add-support-for-TinCanTools-Trainer.patch | 55 - ...touchbook-make-it-build-against-TI-linux-.patch | 61 - ...d-support-for-TCT-Zippy-to-Beagle-board-f.patch | 135 - ...MAP-Make-beagle-u-boot-partition-writable.patch | 24 - .../0005-board-omap3-beagle-add-DSS2-support.patch | 200 - ...beagle-prepare-for-DM3730-based-Beagleboa.patch | 103 - ...agleboard-Add-infrastructure-to-do-fixups.patch | 172 - ...agleboard-pre-export-GPIOs-to-userspace-w.patch | 57 - ...agleboard-initialize-ds1307-and-eeprom-on.patch | 76 - ...010-ARM-OMAP-update-beagleboard-defconfig.patch | 3323 - ...able-audio-capture-by-default-for-twl4030.patch | 27 - ...ap2-proper-fix-for-subpage-read-ECC-error.patch | 35 - ...-DSS2-Enable-Pre-Multiplied-Alpha-Support.patch | 44 - ...otarg-for-selecting-svideo-or-composite-f.patch | 75 - ...-add-some-more-from-Leopard-imaging-patch.patch | 133 - ...vero-Add-support-for-second-ethernet-port.patch | 110 - ...-smsc911x-return-ENODEV-if-device-is-not-.patch | 29 - ...ut-touchscreen-ads7846-return-ENODEV-if-d.patch | 53 - .../0019-drivers-mfd-add-twl4030-madc-driver.patch | 601 - ...OMAP-Add-missing-twl4030-madc-header-file.patch | 149 - ...RM-OMAP-Add-twl4030-madc-support-to-Overo.patch | 32 - ...M-OMAP-Add-twl4030-madc-support-to-Beagle.patch | 35 - ...usb-add-vendor-device-ID-for-Ceiva-Wirele.patch | 25 - ...isplay-single-block-read-console-messages.patch | 28 - ...mc-twl4030-move-clock-input-selection-pri.patch | 47 - ...-add-PM-code-and-sync-with-http-www.sakom.patch | 373 - ...0-madc-adjust-for-twl4030-twl-api-changes.patch | 85 - ...e-add-support-for-Samsung-lte430wq-f0c-pa.patch | 161 - ...Add-support-for-LG-Philips-LB035Q02-panel.patch | 254 - ...-width-which-improves-SD-card-s-peformanc.patch | 32 - ...-support-to-sync-the-VFP-state-of-the-cur.patch | 109 - ...serve-the-HW-context-when-calling-signal-.patch | 211 - ...h-SGX-clocks-to-200MHz-on-DM37xx-OMAP36xx.patch | 27 - .../0034-modedb.c-add-proper-720p60-mode.patch | 27 - ...C-add-support-for-backup-battery-recharge.patch | 55 - ...-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch | 29 - ...-warning-on-alignment-trap-in-kernel-mode.patch | 31 - ...pose-some-CPU-control-registers-via-sysfs.patch | 202 - ...-Add-option-to-allow-userspace-PLE-access.patch | 48 - ...ion-to-allow-userspace-access-to-performa.patch | 49 - ...-Expose-some-PMON-registers-through-sysfs.patch | 41 - ...-musb-allow-host-io-without-gadget-module.patch | 90 - .../0043-MTD-silence-ecc-errors-on-mtdblock0.patch | 59 - ...agle-every-known-beagle-except-revB-uses-.patch | 34 - ...agle-add-support-for-beagleFPGA-expansion.patch | 70 - ...ix-serial-console-corruption-during-cpuid.patch | 57 - ...nly-try-to-idle-IVA-subsys-when-CONFIG_PM.patch | 37 - ...048-HACK-try-to-poweron-stuff-on-xM-rev-A.patch | 60 - .../linux-omap-psp-2.6.32/am3517-crane/defconfig | 2139 - .../linux-omap-psp-2.6.32/am3517-evm/configs/stock | 2151 - .../linux-omap-psp-2.6.32/am3517-evm/defconfig | 2151 - .../linux-omap-psp-2.6.32/am37x-evm/defconfig | 2045 - .../0001-omap-Beagle-revision-detection.patch | 135 - ...-only-Cx-boards-use-pin-23-for-write-prot.patch | 35 - ...ap-Beagle-no-gpio_wp-pin-connection-on-xM.patch | 33 - ...omap3-beaglexm-fix-EHCI-power-up-GPIO-dir.patch | 42 - .../0005-omap3-beaglexm-fix-DVI-reset-GPIO.patch | 48 - .../0006-omap3-beaglexm-fix-power-on-of-DVI.patch | 92 - ...beagleboard-hack-in-support-from-xM-rev-C.patch | 61 - ...agle-cleaned-up-board-revision-conditions.patch | 153 - .../beagleboard/configs/cpuidle | 3053 - .../beagleboard/configs/cpuidle-gether | 3051 - .../linux-omap-psp-2.6.32/beagleboard/defconfig | 3071 - .../beagleboard/logo_linux_clut224.ppm | 73147 --------------- ...st-stab-at-merging-sensor-driver-based-on.patch | 2394 - .../0002-mt9t111-Fix-all-checkpatch-errors.patch | 398 - .../0003-mt9t111-Pass-v4l2_int_device-data.patch | 40 - .../cam/0004-omap3beagle-Add-camera-support.patch | 352 - ...005-TEMP-omap3beagle-camera-Add-defconfig.patch | 3070 - ...3beagle-camera-Add-support-for-regulators.patch | 238 - ...0007-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch | 37 - ...eagle-camera-Fix-null-pointer-dereference.patch | 54 - ...vert-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch | 42 - ...p3beagle-camera-Change-arch-late_initcall.patch | 25 - ...-camera-Move-i2c-registration-to-the-main.patch | 107 - ...ake-camera-code-build-if-MT9T111-is-built.patch | 38 - ...ap3beagle-camera-Force-mode0-in-cam_xclka.patch | 41 - ...-Add-capability-to-change-rate-of-dpll4_m.patch | 33 - ...G-omap3beagle-camera-Force-mode0-in-cam_x.patch | 41 - ...p3beagle-camera-Fix-wrong-XCLKA-selection.patch | 30 - ...t-CAM_MCLK-to-172.8-MHz-allows-exact-9.6-.patch | 91 - ...-Fix-Moved-MCLK-setting-to-the-board-file.patch | 209 - ...019-omap3isp-core-Do-smarter-MCLK-setting.patch | 47 - ...0-omap3beagle-camera-set-mclk-for-mt9t111.patch | 36 - .../cam/0021-mt9t111-Fix-max-supported-xclk.patch | 28 - ...ap3beagle-camera-Clarify-regulators-names.patch | 103 - ...3-omap3beagle-camera-Fix-powerup-sequence.patch | 103 - ...4-omap3beagle-camera-Change-vaux4-to-1.8v.patch | 32 - ...-camera-Rename-regulators-to-match-actual.patch | 110 - ...-camera-Complement-remainig-sensor-hw-con.patch | 37 - ...-detect-function-retval-and-cleanup-print.patch | 48 - ...e-camera-Set-padconf-settings-in-cam-init.patch | 66 - ...-camera-only-register-camera-driver-for-3.patch | 31 - ...11-Work-in-progress-for-camera-enablement.patch | 53 - ...XM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch | 2441 - ...MT9V113-Fixed-sensor-nitialization-issues.patch | 294 - .../cam/0033-mt9v113-Fix-wrong-active-widths.patch | 29 - ...x-Wrong-check-on-non-interlaced-sensor-on.patch | 34 - ...-Fix-bad-YUV_BT-checks-in-datapath_config.patch | 45 - ...p-Set-vd_pol-to-0-by-default-on-all-cases.patch | 35 - ...isp-ccdc-Set-datalines-to-10-for-YUV_SYNC.patch | 29 - ...p3beagle-camera-Fix-parallel-i-f-settings.patch | 43 - ...-camera-Clean-up-Remove-unneccessary-code.patch | 118 - ...-Clean-Up-Remove-unneccessary-code-printf.patch | 390 - ...Min-Max-clk-input-changed-as-per-the-spec.patch | 54 - ...-omap3beagle-camera-Further-clode-cleanup.patch | 237 - ...Settings-from-Aptima-used-to-increase-FPS.patch | 135 - ...44-mt9v113-AE-param-tuned-to-get-28-30FPS.patch | 33 - ...5-omap3beagle-camera-Cleanup-of-boardfile.patch | 161 - ...map3beagle-camera-Cleanup-regulator-usage.patch | 172 - ...3beagle-camera-Bring-back-mt9t111-support.patch | 251 - ...-REMOVE-v4l2-Delete-MT9T111-sensor-driver.patch | 2402 - ...3670-soc-camera-Add-mt9t112-camera-driver.patch | 1285 - ...mt9t112-modify-exiting-conditions-from-st.patch | 31 - ...igrate-from-soc_camera-to-v4l2-int-device.patch | 934 - ...52-mt9t112-Add-more-info-to-public-header.patch | 29 - .../0053-mt9t112-Fix-null-pointer-kernel-bug.patch | 84 - ...EBUG-omap3beagle-Add-MT9T112-to-defconfig.patch | 26 - ...-camera-Change-MT9T111-references-to-new-.patch | 207 - ...4xxcam-Fix-multi-pixel-format-negotiation.patch | 26 - ...3beagle-camera-Bring-back-mt9t111-support.patch | 43 - ...0058-mt9t112-Do-init_camera-every-powerup.patch | 57 - ...agle-camera-Switch-flag-for-no-sensor-ISP.patch | 26 - .../cam/0060-mt9t112-Add-back-3MP-basesize.patch | 37 - ...9t112-Prepare-for-24MHz-EXTCLK-and-30-fps.patch | 63 - ...gle-camera-Prepare-24MHz-xclk-for-mt9t112.patch | 62 - ...rect-register-settings-for-mt9t111-sensor.patch | 109 - .../0064-mt9t112-Remove-smart-size-selection.patch | 188 - ...emove-bogus-Kconfig-depend-on-PCI-and-add.patch | 38 - ...12-Add-Context-selection-to-configuration.patch | 96 - .../0067-mt9t112-Disable-JPEG-in-Context-B.patch | 32 - ...12-Make-context-B-stream-unlimited-frames.patch | 30 - ...69-mt9t112-Fix-pll-p-dividers-abstraction.patch | 58 - ...t9t112-Adjust-50-60Hz-flickering-settings.patch | 51 - ...gger-autofocus-at-the-end-of-context-swit.patch | 35 - ...eagle-camera-Fix-dual-sensor-registration.patch | 43 - .../0073-mt9v113-Fix-State-variable-handling.patch | 68 - ...-Move-sensor-rest-to-after-applying-power.patch | 65 - .../cam/0075-omap3beagle-Add-camera-bootarg.patch | 108 - ...ort-driver-from-https-github.com-Aptina-B.patch | 1547 - ...beagle-import-li5m03-driver-from-https-gi.patch | 294 - .../linux-omap-psp-2.6.32/dm37x-evm/defconfig | 2024 - .../0001-ARM-OMAP-add-spi-platform-devices.patch | 62 - .../0002-MMA7455L-accelerometer-driver.patch | 683 - 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recipes-kernel/linux/linux-omap-psp_2.6.32.bb diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Added-Crane-Board-support.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Added-Crane-Board-support.patch deleted file mode 100644 index 25a7d61..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Added-Crane-Board-support.patch +++ /dev/null @@ -1,5237 +0,0 @@ -From 65b68a814742181e9a709949b8e3f06fb08e749b Mon Sep 17 00:00:00 2001 -From: Srinath <srinath@mistralsolutions.com> -Date: Thu, 5 Aug 2010 12:03:25 +0530 -Subject: [PATCH] Added Crane Board support - ---- - arch/arm/configs/am3517_crane_defconfig | 1768 ++++++++++++++++++++++++++ - arch/arm/mach-omap2/Kconfig | 6 + - arch/arm/mach-omap2/Makefile | 2 + - arch/arm/mach-omap2/board-am3517crane.c | 773 +++++++++++ - arch/arm/mach-omap2/mmc-am3517crane.c | 267 ++++ - arch/arm/mach-omap2/mmc-am3517crane.h | 22 + - arch/arm/mach-omap2/tps65910-pmic.c | 195 +++ - arch/arm/tools/mach-types | 1 + - drivers/gpio/Makefile | 1 + - drivers/i2c/busses/i2c-omap.c | 3 +- - drivers/mfd/Kconfig | 13 + - drivers/mfd/Makefile | 4 +- - drivers/mfd/tps65910-core.c | 741 +++++++++++ - drivers/rtc/Kconfig | 8 + - drivers/rtc/Makefile | 1 + - drivers/rtc/rtc-tps65910.c | 657 ++++++++++ - drivers/usb/host/ehci-hub.c | 9 +- - drivers/usb/musb/Kconfig | 6 +- - drivers/usb/musb/Makefile | 3 +- - drivers/usb/musb/musb_core.c | 2 +- - drivers/usb/musb/musb_core.h | 2 +- - drivers/usb/musb/musb_gadget.c | 2 +- - drivers/usb/musb/musb_gadget_ep0.c | 2 +- - drivers/usb/musb/musb_io.h | 5 +- - drivers/usb/musb/musb_virthub.c | 8 +- - drivers/video/omap2/displays/panel-generic.c | 9 + - drivers/video/omap2/dss/venc.c | 15 +- - include/linux/i2c/tps65910.h | 278 ++++ - 28 files changed, 4779 insertions(+), 24 deletions(-) - create mode 100644 arch/arm/configs/am3517_crane_defconfig - create mode 100644 arch/arm/mach-omap2/board-am3517crane.c - create mode 100644 arch/arm/mach-omap2/mmc-am3517crane.c - create mode 100644 arch/arm/mach-omap2/mmc-am3517crane.h - create mode 100644 arch/arm/mach-omap2/tps65910-pmic.c - create mode 100644 drivers/mfd/tps65910-core.c - create mode 100644 drivers/rtc/rtc-tps65910.c - create mode 100644 include/linux/i2c/tps65910.h - -diff --git a/arch/arm/configs/am3517_crane_defconfig b/arch/arm/configs/am3517_crane_defconfig -new file mode 100644 -index 0000000..24ffc83 ---- /dev/null -+++ b/arch/arm/configs/am3517_crane_defconfig -@@ -0,0 +1,1768 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.32 -+# Fri Nov 26 17:48:55 2010 -+# -+CONFIG_ARM=y -+CONFIG_SYS_SUPPORTS_APM_EMULATION=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_TIME=y -+CONFIG_GENERIC_CLOCKEVENTS=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_HAVE_LATENCYTOP_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_ARCH_HAS_CPUFREQ=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -+CONFIG_VECTORS_BASE=0xffff0000 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+CONFIG_CONSTRUCTORS=y -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_SWAP=y -+CONFIG_SYSVIPC=y -+CONFIG_SYSVIPC_SYSCTL=y -+# CONFIG_POSIX_MQUEUE is not set -+CONFIG_BSD_PROCESS_ACCT=y -+# CONFIG_BSD_PROCESS_ACCT_V3 is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_AUDIT is not set -+ -+# -+# RCU Subsystem -+# -+CONFIG_TREE_RCU=y -+# CONFIG_TREE_PREEMPT_RCU is not set -+# CONFIG_TINY_RCU is not set -+# CONFIG_RCU_TRACE is not set -+CONFIG_RCU_FANOUT=32 -+# CONFIG_RCU_FANOUT_EXACT is not set -+# CONFIG_TREE_RCU_TRACE is not set -+CONFIG_IKCONFIG=y -+CONFIG_IKCONFIG_PROC=y -+CONFIG_LOG_BUF_SHIFT=14 -+CONFIG_GROUP_SCHED=y -+CONFIG_FAIR_GROUP_SCHED=y -+# CONFIG_RT_GROUP_SCHED is not set -+CONFIG_USER_SCHED=y -+# CONFIG_CGROUP_SCHED is not set -+# CONFIG_CGROUPS is not set -+CONFIG_SYSFS_DEPRECATED=y -+CONFIG_SYSFS_DEPRECATED_V2=y -+# CONFIG_RELAY is not set -+# CONFIG_NAMESPACES is not set -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_RD_GZIP=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_ANON_INODES=y -+CONFIG_EMBEDDED=y -+CONFIG_UID16=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+CONFIG_KALLSYMS_EXTRA_PASS=y -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_EPOLL=y -+CONFIG_SIGNALFD=y -+CONFIG_TIMERFD=y -+CONFIG_EVENTFD=y -+CONFIG_SHMEM=y -+CONFIG_AIO=y -+ -+# -+# Kernel Performance Events And Counters -+# -+CONFIG_VM_EVENT_COUNTERS=y -+CONFIG_COMPAT_BRK=y -+CONFIG_SLAB=y -+# CONFIG_SLUB is not set -+# CONFIG_SLOB is not set -+# CONFIG_PROFILING is not set -+CONFIG_HAVE_OPROFILE=y -+# CONFIG_KPROBES is not set -+CONFIG_HAVE_KPROBES=y -+CONFIG_HAVE_KRETPROBES=y -+CONFIG_HAVE_CLK=y -+ -+# -+# GCOV-based kernel profiling -+# -+# CONFIG_SLOW_WORK is not set -+CONFIG_HAVE_GENERIC_DMA_COHERENT=y -+CONFIG_SLABINFO=y -+CONFIG_RT_MUTEXES=y -+CONFIG_BASE_SMALL=0 -+CONFIG_MODULES=y -+# CONFIG_MODULE_FORCE_LOAD is not set -+CONFIG_MODULE_UNLOAD=y -+# CONFIG_MODULE_FORCE_UNLOAD is not set -+CONFIG_MODVERSIONS=y -+CONFIG_MODULE_SRCVERSION_ALL=y -+CONFIG_BLOCK=y -+CONFIG_LBDAF=y -+# CONFIG_BLK_DEV_BSG is not set -+# CONFIG_BLK_DEV_INTEGRITY is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+CONFIG_IOSCHED_DEADLINE=y -+CONFIG_IOSCHED_CFQ=y -+# CONFIG_DEFAULT_DEADLINE is not set -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" -+# CONFIG_INLINE_SPIN_TRYLOCK is not set -+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -+# CONFIG_INLINE_SPIN_LOCK is not set -+# CONFIG_INLINE_SPIN_LOCK_BH is not set -+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -+CONFIG_INLINE_SPIN_UNLOCK=y -+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -+# CONFIG_INLINE_READ_TRYLOCK is not set -+# CONFIG_INLINE_READ_LOCK is not set -+# CONFIG_INLINE_READ_LOCK_BH is not set -+# CONFIG_INLINE_READ_LOCK_IRQ is not set -+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -+CONFIG_INLINE_READ_UNLOCK=y -+# CONFIG_INLINE_READ_UNLOCK_BH is not set -+CONFIG_INLINE_READ_UNLOCK_IRQ=y -+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -+# CONFIG_INLINE_WRITE_TRYLOCK is not set -+# CONFIG_INLINE_WRITE_LOCK is not set -+# CONFIG_INLINE_WRITE_LOCK_BH is not set -+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -+CONFIG_INLINE_WRITE_UNLOCK=y -+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -+# CONFIG_MUTEX_SPIN_ON_OWNER is not set -+CONFIG_FREEZER=y -+ -+# -+# System Type -+# -+CONFIG_MMU=y -+# CONFIG_ARCH_AAEC2000 is not set -+# CONFIG_ARCH_INTEGRATOR is not set -+# CONFIG_ARCH_REALVIEW is not set -+# CONFIG_ARCH_VERSATILE is not set -+# CONFIG_ARCH_AT91 is not set -+# CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_GEMINI is not set -+# CONFIG_ARCH_EBSA110 is not set -+# CONFIG_ARCH_EP93XX is not set -+# CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_MXC is not set -+# CONFIG_ARCH_STMP3XXX is not set -+# CONFIG_ARCH_NETX is not set -+# CONFIG_ARCH_H720X is not set -+# CONFIG_ARCH_NOMADIK is not set -+# CONFIG_ARCH_IOP13XX is not set -+# CONFIG_ARCH_IOP32X is not set -+# CONFIG_ARCH_IOP33X is not set -+# CONFIG_ARCH_IXP23XX is not set -+# CONFIG_ARCH_IXP2000 is not set -+# CONFIG_ARCH_IXP4XX is not set -+# CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_DOVE is not set -+# CONFIG_ARCH_KIRKWOOD is not set -+# CONFIG_ARCH_LOKI is not set -+# CONFIG_ARCH_MV78XX0 is not set -+# CONFIG_ARCH_ORION5X is not set -+# CONFIG_ARCH_MMP is not set -+# CONFIG_ARCH_KS8695 is not set -+# CONFIG_ARCH_NS9XXX is not set -+# CONFIG_ARCH_W90X900 is not set -+# CONFIG_ARCH_PNX4008 is not set -+# CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_MSM is not set -+# CONFIG_ARCH_RPC is not set -+# CONFIG_ARCH_SA1100 is not set -+# CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_S3C64XX is not set -+# CONFIG_ARCH_S5PC1XX is not set -+# CONFIG_ARCH_SHARK is not set -+# CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_U300 is not set -+# CONFIG_ARCH_DAVINCI is not set -+CONFIG_ARCH_OMAP=y -+# CONFIG_ARCH_BCMRING is not set -+# CONFIG_ARCH_U8500 is not set -+ -+# -+# TI OMAP Implementations -+# -+CONFIG_ARCH_OMAP_OTG=y -+# CONFIG_ARCH_OMAP1 is not set -+# CONFIG_ARCH_OMAP2 is not set -+CONFIG_ARCH_OMAP3=y -+# CONFIG_ARCH_OMAP4 is not set -+ -+# -+# OMAP Feature Selections -+# -+CONFIG_OMAP_RESET_CLOCKS=y -+CONFIG_OMAP_MUX=y -+# CONFIG_OMAP_MUX_DEBUG is not set -+CONFIG_OMAP_MUX_WARNINGS=y -+CONFIG_OMAP_MCBSP=y -+# CONFIG_OMAP_MBOX_FWK is not set -+# CONFIG_OMAP_MPU_TIMER is not set -+CONFIG_OMAP_32K_TIMER=y -+# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -+CONFIG_OMAP_32K_TIMER_HZ=128 -+CONFIG_OMAP_DM_TIMER=y -+# CONFIG_OMAP_LL_DEBUG_UART1 is not set -+# CONFIG_OMAP_LL_DEBUG_UART2 is not set -+CONFIG_OMAP_LL_DEBUG_UART3=y -+# CONFIG_OMAP_LL_DEBUG_NONE is not set -+# CONFIG_OMAP_PM_NONE is not set -+CONFIG_OMAP_PM_NOOP=y -+# CONFIG_OMAP_PM_SRF is not set -+CONFIG_ARCH_OMAP34XX=y -+CONFIG_ARCH_OMAP3430=y -+CONFIG_OMAP_PACKAGE_CBB=y -+ -+# -+# OMAP Board Type -+# -+# CONFIG_MACH_OMAP3_BEAGLE is not set -+# CONFIG_MACH_OMAP_LDP is not set -+# CONFIG_MACH_OVERO is not set -+# CONFIG_MACH_OMAP3EVM is not set -+# CONFIG_MACH_OMAP3517EVM is not set -+CONFIG_MACH_CRANEBOARD=y -+# CONFIG_MACH_OMAP3_PANDORA is not set -+# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -+# CONFIG_MACH_OMAP_3430SDP is not set -+# CONFIG_MACH_NOKIA_RX51 is not set -+# CONFIG_MACH_OMAP_ZOOM2 is not set -+# CONFIG_MACH_OMAP_ZOOM3 is not set -+# CONFIG_MACH_CM_T35 is not set -+# CONFIG_MACH_IGEP0020 is not set -+# CONFIG_MACH_OMAP_3630SDP is not set -+# CONFIG_OMAP3_EMU is not set -+# CONFIG_OMAP3_SDRC_AC_TIMING is not set -+ -+# -+# Processor Type -+# -+CONFIG_CPU_32=y -+CONFIG_CPU_32v6K=y -+CONFIG_CPU_V7=y -+CONFIG_CPU_32v7=y -+CONFIG_CPU_ABRT_EV7=y -+CONFIG_CPU_PABRT_V7=y -+CONFIG_CPU_CACHE_V7=y -+CONFIG_CPU_CACHE_VIPT=y -+CONFIG_CPU_COPY_V6=y -+CONFIG_CPU_TLB_V7=y -+CONFIG_CPU_HAS_ASID=y -+CONFIG_CPU_CP15=y -+CONFIG_CPU_CP15_MMU=y -+ -+# -+# Processor Features -+# -+CONFIG_ARM_THUMB=y -+# CONFIG_ARM_THUMBEE is not set -+# CONFIG_CPU_ICACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_DISABLE is not set -+# CONFIG_CPU_BPREDICT_DISABLE is not set -+CONFIG_HAS_TLS_REG=y -+CONFIG_ARM_L1_CACHE_SHIFT=6 -+CONFIG_ARM_ERRATA_430973=y -+CONFIG_ARM_ERRATA_458693=y -+CONFIG_ARM_ERRATA_460075=y -+CONFIG_COMMON_CLKDEV=y -+ -+# -+# Bus support -+# -+# CONFIG_PCI_SYSCALL is not set -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+# CONFIG_PCCARD is not set -+ -+# -+# Kernel Features -+# -+CONFIG_TICK_ONESHOT=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -+CONFIG_VMSPLIT_3G=y -+# CONFIG_VMSPLIT_2G is not set -+# CONFIG_VMSPLIT_1G is not set -+CONFIG_PAGE_OFFSET=0xC0000000 -+CONFIG_PREEMPT_NONE=y -+# CONFIG_PREEMPT_VOLUNTARY is not set -+# CONFIG_PREEMPT is not set -+CONFIG_HZ=128 -+# CONFIG_THUMB2_KERNEL is not set -+CONFIG_AEABI=y -+CONFIG_OABI_COMPAT=y -+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -+# CONFIG_HIGHMEM is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+CONFIG_PAGEFLAGS_EXTENDED=y -+CONFIG_SPLIT_PTLOCK_CPUS=4 -+# CONFIG_PHYS_ADDR_T_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_KSM is not set -+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -+# CONFIG_LEDS is not set -+CONFIG_ALIGNMENT_TRAP=y -+# CONFIG_UACCESS_WITH_MEMCPY is not set -+ -+# -+# Boot options -+# -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -+# CONFIG_XIP_KERNEL is not set -+# CONFIG_KEXEC is not set -+ -+# -+# CPU Power Management -+# -+# CONFIG_CPU_FREQ is not set -+# CONFIG_CPU_IDLE is not set -+ -+# -+# Floating point emulation -+# -+ -+# -+# At least one emulation must be selected -+# -+CONFIG_FPE_NWFPE=y -+# CONFIG_FPE_NWFPE_XP is not set -+# CONFIG_FPE_FASTFPE is not set -+CONFIG_VFP=y -+CONFIG_VFPv3=y -+CONFIG_NEON=y -+ -+# -+# Userspace binary formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -+CONFIG_HAVE_AOUT=y -+# CONFIG_BINFMT_AOUT is not set -+CONFIG_BINFMT_MISC=y -+ -+# -+# Power management options -+# -+CONFIG_PM=y -+CONFIG_PM_DEBUG=y -+# CONFIG_PM_VERBOSE is not set -+CONFIG_CAN_PM_TRACE=y -+CONFIG_PM_SLEEP=y -+CONFIG_SUSPEND=y -+# CONFIG_PM_TEST_SUSPEND is not set -+CONFIG_SUSPEND_FREEZER=y -+# CONFIG_APM_EMULATION is not set -+# CONFIG_PM_RUNTIME is not set -+CONFIG_ARCH_SUSPEND_POSSIBLE=y -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+# CONFIG_PACKET_MMAP is not set -+CONFIG_UNIX=y -+CONFIG_XFRM=y -+# CONFIG_XFRM_USER is not set -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_XFRM_MIGRATE is not set -+# CONFIG_XFRM_STATISTICS is not set -+CONFIG_NET_KEY=y -+# CONFIG_NET_KEY_MIGRATE is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+CONFIG_IP_PNP=y -+CONFIG_IP_PNP_DHCP=y -+CONFIG_IP_PNP_BOOTP=y -+CONFIG_IP_PNP_RARP=y -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+CONFIG_INET_XFRM_MODE_TRANSPORT=y -+CONFIG_INET_XFRM_MODE_TUNNEL=y -+CONFIG_INET_XFRM_MODE_BEET=y -+# CONFIG_INET_LRO is not set -+CONFIG_INET_DIAG=y -+CONFIG_INET_TCP_DIAG=y -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+# CONFIG_IPV6 is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_RDS is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_NET_DSA is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_PHONET is not set -+# CONFIG_IEEE802154 is not set -+# CONFIG_NET_SCHED is not set -+# CONFIG_DCB is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+CONFIG_CAN=y -+CONFIG_CAN_RAW=y -+CONFIG_CAN_BCM=y -+ -+# -+# CAN Device Drivers -+# -+CONFIG_CAN_VCAN=y -+CONFIG_CAN_DEV=y -+CONFIG_CAN_CALC_BITTIMING=y -+CONFIG_CAN_TI_HECC=y -+# CONFIG_CAN_SJA1000 is not set -+ -+# -+# CAN USB interfaces -+# -+# CONFIG_CAN_EMS_USB is not set -+CONFIG_CAN_DEBUG_DEVICES=y -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+CONFIG_WIRELESS=y -+# CONFIG_CFG80211 is not set -+# CONFIG_LIB80211 is not set -+ -+# -+# CFG80211 needs to be enabled for MAC80211 -+# -+# CONFIG_WIMAX is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+# CONFIG_DEVTMPFS is not set -+CONFIG_STANDALONE=y -+CONFIG_PREVENT_FIRMWARE_BUILD=y -+# CONFIG_FW_LOADER is not set -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_DEBUG_DEVRES is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_TESTS is not set -+CONFIG_MTD_CONCAT=y -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+# CONFIG_MTD_AFS_PARTS is not set -+# CONFIG_MTD_AR7_PARTS is not set -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+# CONFIG_MTD_CFI is not set -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+CONFIG_MTD_NAND=y -+# CONFIG_MTD_NAND_VERIFY_WRITE is not set -+# CONFIG_MTD_NAND_ECC_SMC is not set -+# CONFIG_MTD_NAND_MUSEUM_IDS is not set -+# CONFIG_MTD_NAND_GPIO is not set -+CONFIG_MTD_NAND_OMAP2=y -+# CONFIG_MTD_NAND_OMAP_PREFETCH is not set -+CONFIG_MTD_NAND_IDS=y -+# CONFIG_MTD_NAND_DISKONCHIP is not set -+# CONFIG_MTD_NAND_NANDSIM is not set -+# CONFIG_MTD_NAND_PLATFORM is not set -+# CONFIG_MTD_ALAUDA is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# LPDDR flash memory drivers -+# -+# CONFIG_MTD_LPDDR is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+CONFIG_BLK_DEV=y -+# CONFIG_BLK_DEV_COW_COMMON is not set -+CONFIG_BLK_DEV_LOOP=y -+# CONFIG_BLK_DEV_CRYPTOLOOP is not set -+ -+# -+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -+# -+# CONFIG_BLK_DEV_NBD is not set -+# CONFIG_BLK_DEV_UB is not set -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=32768 -+# CONFIG_BLK_DEV_XIP is not set -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+# CONFIG_MG_DISK is not set -+# CONFIG_MISC_DEVICES is not set -+CONFIG_HAVE_IDE=y -+# CONFIG_IDE is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=y -+CONFIG_SCSI_DMA=y -+# CONFIG_SCSI_TGT is not set -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=y -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+# CONFIG_SCSI_MULTI_LUN is not set -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+# CONFIG_SCSI_SCAN_ASYNC is not set -+CONFIG_SCSI_WAIT_SCAN=m -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+# CONFIG_SCSI_SRP_ATTRS is not set -+CONFIG_SCSI_LOWLEVEL=y -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_LIBFC is not set -+# CONFIG_LIBFCOE is not set -+# CONFIG_SCSI_DEBUG is not set -+# CONFIG_SCSI_DH is not set -+# CONFIG_SCSI_OSD_INITIATOR is not set -+# CONFIG_ATA is not set -+# CONFIG_MD is not set -+CONFIG_NETDEVICES=y -+# CONFIG_DUMMY is not set -+# CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set -+# CONFIG_EQUALIZER is not set -+# CONFIG_TUN is not set -+# CONFIG_VETH is not set -+CONFIG_PHYLIB=y -+ -+# -+# MII PHY device drivers -+# -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+# CONFIG_LXT_PHY is not set -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_ICPLUS_PHY is not set -+# CONFIG_REALTEK_PHY is not set -+# CONFIG_NATIONAL_PHY is not set -+# CONFIG_STE10XP is not set -+# CONFIG_LSI_ET1011C_PHY is not set -+# CONFIG_FIXED_PHY is not set -+# CONFIG_MDIO_BITBANG is not set -+CONFIG_NET_ETHERNET=y -+CONFIG_MII=y -+# CONFIG_AX88796 is not set -+# CONFIG_SMC91X is not set -+CONFIG_TI_DAVINCI_EMAC=y -+# CONFIG_DM9000 is not set -+# CONFIG_ETHOC is not set -+# CONFIG_SMC911X is not set -+# CONFIG_SMSC911X is not set -+# CONFIG_DNET is not set -+# CONFIG_IBM_NEW_EMAC_ZMII is not set -+# CONFIG_IBM_NEW_EMAC_RGMII is not set -+# CONFIG_IBM_NEW_EMAC_TAH is not set -+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -+# CONFIG_B44 is not set -+# CONFIG_KS8842 is not set -+# CONFIG_KS8851_MLL is not set -+CONFIG_NETDEV_1000=y -+CONFIG_NETDEV_10000=y -+CONFIG_WLAN=y -+# CONFIG_USB_ZD1201 is not set -+# CONFIG_HOSTAP is not set -+ -+# -+# Enable WiMAX (Networking options) to see the WiMAX drivers -+# -+ -+# -+# USB Network Adapters -+# -+# CONFIG_USB_CATC is not set -+# CONFIG_USB_KAWETH is not set -+# CONFIG_USB_PEGASUS is not set -+# CONFIG_USB_RTL8150 is not set -+CONFIG_USB_USBNET=y -+# CONFIG_USB_NET_AX8817X is not set -+CONFIG_USB_NET_CDCETHER=y -+# CONFIG_USB_NET_CDC_EEM is not set -+CONFIG_USB_NET_DM9601=y -+# CONFIG_USB_NET_SMSC95XX is not set -+# CONFIG_USB_NET_GL620A is not set -+# CONFIG_USB_NET_NET1080 is not set -+# CONFIG_USB_NET_PLUSB is not set -+# CONFIG_USB_NET_MCS7830 is not set -+# CONFIG_USB_NET_RNDIS_HOST is not set -+# CONFIG_USB_NET_CDC_SUBSET is not set -+# CONFIG_USB_NET_ZAURUS is not set -+# CONFIG_USB_NET_INT51X1 is not set -+# CONFIG_WAN is not set -+# CONFIG_PPP is not set -+# CONFIG_SLIP is not set -+# CONFIG_NETCONSOLE is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=y -+# CONFIG_INPUT_FF_MEMLESS is not set -+# CONFIG_INPUT_POLLDEV is not set -+# CONFIG_INPUT_SPARSEKMAP is not set -+ -+# -+# Userland interfaces -+# -+# CONFIG_INPUT_MOUSEDEV is not set -+# CONFIG_INPUT_JOYDEV is not set -+CONFIG_INPUT_EVDEV=y -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+# CONFIG_INPUT_KEYBOARD is not set -+# CONFIG_INPUT_MOUSE is not set -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+CONFIG_SERIO=y -+CONFIG_SERIO_SERPORT=y -+CONFIG_SERIO_LIBPS2=y -+# CONFIG_SERIO_RAW is not set -+# CONFIG_SERIO_ALTERA_PS2 is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+CONFIG_VT=y -+CONFIG_CONSOLE_TRANSLATIONS=y -+CONFIG_VT_CONSOLE=y -+CONFIG_HW_CONSOLE=y -+# CONFIG_VT_HW_CONSOLE_BINDING is not set -+CONFIG_DEVKMEM=y -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+CONFIG_SERIAL_8250=y -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=32 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -+CONFIG_SERIAL_8250_EXTENDED=y -+CONFIG_SERIAL_8250_MANY_PORTS=y -+CONFIG_SERIAL_8250_SHARE_IRQ=y -+CONFIG_SERIAL_8250_DETECT_IRQ=y -+CONFIG_SERIAL_8250_RSA=y -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+CONFIG_HW_RANDOM=y -+# CONFIG_HW_RANDOM_TIMERIOMEM is not set -+# CONFIG_R3964 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+CONFIG_I2C=y -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_COMPAT=y -+# CONFIG_I2C_CHARDEV is not set -+CONFIG_I2C_HELPER_AUTO=y -+ -+# -+# I2C Hardware Bus support -+# -+ -+# -+# I2C system bus drivers (mostly embedded / system-on-chip) -+# -+# CONFIG_I2C_DESIGNWARE is not set -+# CONFIG_I2C_GPIO is not set -+# CONFIG_I2C_OCORES is not set -+CONFIG_I2C_OMAP=y -+# CONFIG_I2C_SIMTEC is not set -+ -+# -+# External I2C/SMBus adapter drivers -+# -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_TINY_USB is not set -+ -+# -+# Other I2C/SMBus bus drivers -+# -+# CONFIG_I2C_PCA_PLATFORM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set -+# CONFIG_SPI is not set -+ -+# -+# PPS support -+# -+# CONFIG_PPS is not set -+CONFIG_ARCH_REQUIRE_GPIOLIB=y -+CONFIG_GPIOLIB=y -+# CONFIG_DEBUG_GPIO is not set -+CONFIG_GPIO_SYSFS=y -+ -+# -+# Memory mapped GPIO expanders: -+# -+ -+# -+# I2C GPIO expanders: -+# -+# CONFIG_GPIO_MAX732X is not set -+# CONFIG_GPIO_PCA953X is not set -+# CONFIG_GPIO_PCF857X is not set -+# CONFIG_GPIO_TPS65910 is not set -+ -+# -+# PCI GPIO expanders: -+# -+ -+# -+# SPI GPIO expanders: -+# -+ -+# -+# AC97 GPIO expanders: -+# -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+# CONFIG_THERMAL is not set -+CONFIG_WATCHDOG=y -+CONFIG_WATCHDOG_NOWAYOUT=y -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_OMAP_WATCHDOG=y -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+CONFIG_SSB_POSSIBLE=y -+ -+# -+# Sonics Silicon Backplane -+# -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_CORE is not set -+# CONFIG_MFD_SM501 is not set -+# CONFIG_MFD_ASIC3 is not set -+# CONFIG_HTC_EGPIO is not set -+# CONFIG_HTC_PASIC3 is not set -+# CONFIG_TPS65010 is not set -+# CONFIG_TWL4030_CORE is not set -+CONFIG_TPS65910_CORE=y -+# CONFIG_MFD_TMIO is not set -+# CONFIG_MFD_T7L66XB is not set -+# CONFIG_MFD_TC6387XB is not set -+# CONFIG_MFD_TC6393XB is not set -+# CONFIG_PMIC_DA903X is not set -+# CONFIG_PMIC_ADP5520 is not set -+# CONFIG_MFD_WM8400 is not set -+# CONFIG_MFD_WM831X is not set -+# CONFIG_MFD_WM8350_I2C is not set -+# CONFIG_MFD_PCF50633 is not set -+# CONFIG_AB3100_CORE is not set -+# CONFIG_MFD_88PM8607 is not set -+CONFIG_REGULATOR=y -+# CONFIG_REGULATOR_DEBUG is not set -+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -+# CONFIG_REGULATOR_BQ24022 is not set -+# CONFIG_REGULATOR_MAX1586 is not set -+# CONFIG_REGULATOR_TPS65910 is not set -+# CONFIG_REGULATOR_LP3971 is not set -+# CONFIG_REGULATOR_TPS65023 is not set -+# CONFIG_REGULATOR_TPS6507X is not set -+CONFIG_MEDIA_SUPPORT=y -+ -+# -+# Multimedia core support -+# -+CONFIG_VIDEO_DEV=y -+CONFIG_VIDEO_V4L2_COMMON=y -+CONFIG_VIDEO_ALLOW_V4L1=y -+CONFIG_VIDEO_V4L1_COMPAT=y -+# CONFIG_DVB_CORE is not set -+CONFIG_VIDEO_MEDIA=y -+ -+# -+# Multimedia drivers -+# -+# CONFIG_MEDIA_ATTACH is not set -+CONFIG_MEDIA_TUNER=y -+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -+CONFIG_MEDIA_TUNER_SIMPLE=y -+CONFIG_MEDIA_TUNER_TDA8290=y -+CONFIG_MEDIA_TUNER_TDA9887=y -+CONFIG_MEDIA_TUNER_TEA5761=y -+CONFIG_MEDIA_TUNER_TEA5767=y -+CONFIG_MEDIA_TUNER_MT20XX=y -+CONFIG_MEDIA_TUNER_XC2028=y -+CONFIG_MEDIA_TUNER_XC5000=y -+CONFIG_MEDIA_TUNER_MC44S803=y -+CONFIG_VIDEO_V4L2=y -+CONFIG_VIDEO_V4L1=y -+# CONFIG_VIDEO_CAPTURE_DRIVERS is not set -+# CONFIG_RADIO_ADAPTERS is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+# CONFIG_FB_BOOT_VESA_SUPPORT is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_FOREIGN_ENDIAN is not set -+# CONFIG_FB_SYS_FOPS is not set -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+# CONFIG_FB_VIRTUAL is not set -+# CONFIG_FB_METRONOME is not set -+# CONFIG_FB_MB862XX is not set -+# CONFIG_FB_BROADSHEET is not set -+# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -+CONFIG_OMAP2_VRAM=y -+CONFIG_OMAP2_VRFB=y -+CONFIG_OMAP2_DSS=y -+CONFIG_OMAP2_VRAM_SIZE=4 -+# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -+# CONFIG_OMAP2_DSS_RFBI is not set -+CONFIG_OMAP2_DSS_VENC=y -+# CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO is not set -+CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE=y -+# CONFIG_OMAP2_DSS_SDI is not set -+# CONFIG_OMAP2_DSS_DSI is not set -+# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -+CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1 -+CONFIG_FB_OMAP2=y -+# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set -+# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -+CONFIG_FB_OMAP2_NUM_FBS=1 -+ -+# -+# OMAP2/3 Display Device Drivers -+# -+CONFIG_PANEL_GENERIC=y -+# CONFIG_PANEL_SHARP_LS037V7DW01 is not set -+# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+ -+# -+# Console display driver support -+# -+# CONFIG_VGA_CONSOLE is not set -+CONFIG_DUMMY_CONSOLE=y -+# CONFIG_FRAMEBUFFER_CONSOLE is not set -+CONFIG_LOGO=y -+CONFIG_LOGO_LINUX_MONO=y -+CONFIG_LOGO_LINUX_VGA16=y -+CONFIG_LOGO_LINUX_CLUT224=y -+# CONFIG_SOUND is not set -+CONFIG_HID_SUPPORT=y -+CONFIG_HID=y -+# CONFIG_HIDRAW is not set -+ -+# -+# USB Input Devices -+# -+CONFIG_USB_HID=y -+# CONFIG_HID_PID is not set -+# CONFIG_USB_HIDDEV is not set -+ -+# -+# Special HID drivers -+# -+# CONFIG_HID_A4TECH is not set -+# CONFIG_HID_APPLE is not set -+# CONFIG_HID_BELKIN is not set -+# CONFIG_HID_CHERRY is not set -+# CONFIG_HID_CHICONY is not set -+# CONFIG_HID_CYPRESS is not set -+# CONFIG_HID_DRAGONRISE is not set -+# CONFIG_HID_EZKEY is not set -+# CONFIG_HID_KYE is not set -+# CONFIG_HID_GYRATION is not set -+# CONFIG_HID_TWINHAN is not set -+# CONFIG_HID_KENSINGTON is not set -+# CONFIG_HID_LOGITECH is not set -+# CONFIG_HID_MICROSOFT is not set -+# CONFIG_HID_MONTEREY is not set -+# CONFIG_HID_NTRIG is not set -+# CONFIG_HID_PANTHERLORD is not set -+# CONFIG_HID_PETALYNX is not set -+# CONFIG_HID_SAMSUNG is not set -+# CONFIG_HID_SONY is not set -+# CONFIG_HID_SUNPLUS is not set -+# CONFIG_HID_GREENASIA is not set -+# CONFIG_HID_SMARTJOYPLUS is not set -+# CONFIG_HID_TOPSEED is not set -+# CONFIG_HID_THRUSTMASTER is not set -+# CONFIG_HID_ZEROPLUS is not set -+CONFIG_USB_SUPPORT=y -+CONFIG_USB_ARCH_HAS_HCD=y -+CONFIG_USB_ARCH_HAS_OHCI=y -+CONFIG_USB_ARCH_HAS_EHCI=y -+CONFIG_USB=y -+# CONFIG_USB_DEBUG is not set -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+ -+# -+# Miscellaneous USB options -+# -+CONFIG_USB_DEVICEFS=y -+CONFIG_USB_DEVICE_CLASS=y -+# CONFIG_USB_DYNAMIC_MINORS is not set -+CONFIG_USB_SUSPEND=y -+CONFIG_USB_OTG=y -+# CONFIG_USB_OTG_WHITELIST is not set -+# CONFIG_USB_OTG_BLACKLIST_HUB is not set -+# CONFIG_USB_MON is not set -+# CONFIG_USB_WUSB is not set -+# CONFIG_USB_WUSB_CBAF is not set -+ -+# -+# USB Host Controller Drivers -+# -+# CONFIG_USB_C67X00_HCD is not set -+CONFIG_USB_EHCI_HCD=y -+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -+CONFIG_USB_EHCI_TT_NEWSCHED=y -+# CONFIG_USB_OXU210HP_HCD is not set -+# CONFIG_USB_ISP116X_HCD is not set -+# CONFIG_USB_ISP1760_HCD is not set -+# CONFIG_USB_ISP1362_HCD is not set -+# CONFIG_USB_OHCI_HCD is not set -+# CONFIG_USB_SL811_HCD is not set -+# CONFIG_USB_R8A66597_HCD is not set -+# CONFIG_USB_HWA_HCD is not set -+CONFIG_USB_MUSB_HDRC=y -+CONFIG_USB_MUSB_SOC=y -+ -+# -+# OMAP 343x high speed USB support -+# -+# CONFIG_USB_MUSB_HOST is not set -+# CONFIG_USB_MUSB_PERIPHERAL is not set -+CONFIG_USB_MUSB_OTG=y -+CONFIG_USB_GADGET_MUSB_HDRC=y -+CONFIG_USB_MUSB_HDRC_HCD=y -+# CONFIG_MUSB_PIO_ONLY is not set -+# CONFIG_USB_TI_CPPI_DMA is not set -+CONFIG_USB_TI_CPPI41_DMA=y -+CONFIG_USB_MUSB_DEBUG=y -+ -+# -+# USB Device Class drivers -+# -+# CONFIG_USB_ACM is not set -+# CONFIG_USB_PRINTER is not set -+# CONFIG_USB_WDM is not set -+# CONFIG_USB_TMC is not set -+ -+# -+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -+# -+ -+# -+# also be needed; see USB_STORAGE Help for more info -+# -+CONFIG_USB_STORAGE=y -+# CONFIG_USB_STORAGE_DEBUG is not set -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_ISD200 is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_ONETOUCH is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -+# CONFIG_USB_LIBUSUAL is not set -+ -+# -+# USB Imaging devices -+# -+# CONFIG_USB_MDC800 is not set -+# CONFIG_USB_MICROTEK is not set -+ -+# -+# USB port drivers -+# -+# CONFIG_USB_SERIAL is not set -+ -+# -+# USB Miscellaneous drivers -+# -+# CONFIG_USB_EMI62 is not set -+# CONFIG_USB_EMI26 is not set -+# CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_SEVSEG is not set -+# CONFIG_USB_RIO500 is not set -+# CONFIG_USB_LEGOTOWER is not set -+# CONFIG_USB_LCD is not set -+# CONFIG_USB_BERRY_CHARGE is not set -+# CONFIG_USB_LED is not set -+# CONFIG_USB_CYPRESS_CY7C63 is not set -+# CONFIG_USB_CYTHERM is not set -+# CONFIG_USB_IDMOUSE is not set -+# CONFIG_USB_FTDI_ELAN is not set -+# CONFIG_USB_APPLEDISPLAY is not set -+# CONFIG_USB_SISUSBVGA is not set -+# CONFIG_USB_LD is not set -+# CONFIG_USB_TRANCEVIBRATOR is not set -+# CONFIG_USB_IOWARRIOR is not set -+CONFIG_USB_TEST=y -+# CONFIG_USB_ISIGHTFW is not set -+# CONFIG_USB_VST is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_VBUS_DRAW=2 -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_ATMEL_USBA is not set -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_PXA25X is not set -+# CONFIG_USB_GADGET_R8A66597 is not set -+# CONFIG_USB_GADGET_PXA27X is not set -+# CONFIG_USB_GADGET_S3C_HSOTG is not set -+# CONFIG_USB_GADGET_IMX is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+# CONFIG_USB_GADGET_FSL_QE is not set -+# CONFIG_USB_GADGET_CI13XXX is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LANGWELL is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+# CONFIG_USB_ZERO is not set -+# CONFIG_USB_AUDIO is not set -+# CONFIG_USB_ETH is not set -+# CONFIG_USB_GADGETFS is not set -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_MASS_STORAGE=m -+# CONFIG_USB_G_SERIAL is not set -+# CONFIG_USB_MIDI_GADGET is not set -+# CONFIG_USB_G_PRINTER is not set -+# CONFIG_USB_CDC_COMPOSITE is not set -+# CONFIG_USB_G_MULTI is not set -+ -+# -+# OTG and related infrastructure -+# -+CONFIG_USB_OTG_UTILS=y -+# CONFIG_USB_GPIO_VBUS is not set -+# CONFIG_ISP1301_OMAP is not set -+# CONFIG_USB_ULPI is not set -+CONFIG_NOP_USB_XCEIV=y -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD/SDIO Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+CONFIG_MMC_BLOCK_BOUNCE=y -+# CONFIG_SDIO_UART is not set -+# CONFIG_MMC_TEST is not set -+ -+# -+# MMC/SD/SDIO Host Controller Drivers -+# -+# CONFIG_MMC_SDHCI is not set -+# CONFIG_MMC_OMAP is not set -+CONFIG_MMC_OMAP_HS=y -+# CONFIG_MMC_AT91 is not set -+# CONFIG_MMC_ATMELMCI is not set -+# CONFIG_MEMSTICK is not set -+# CONFIG_NEW_LEDS is not set -+# CONFIG_ACCESSIBILITY is not set -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set -+CONFIG_RTC_DRV_TPS65910=y -+# CONFIG_RTC_DRV_S35390A is not set -+# CONFIG_RTC_DRV_FM3130 is not set -+# CONFIG_RTC_DRV_RX8581 is not set -+# CONFIG_RTC_DRV_RX8025 is not set -+ -+# -+# SPI RTC drivers -+# -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_CMOS is not set -+# CONFIG_RTC_DRV_DS1286 is not set -+# CONFIG_RTC_DRV_DS1511 is not set -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T35 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_MSM6242 is not set -+# CONFIG_RTC_DRV_BQ4802 is not set -+# CONFIG_RTC_DRV_RP5C01 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+# CONFIG_DMADEVICES is not set -+# CONFIG_AUXDISPLAY is not set -+# CONFIG_UIO is not set -+ -+# -+# TI VLYNQ -+# -+# CONFIG_STAGING is not set -+ -+# -+# CBUS support -+# -+# CONFIG_CBUS is not set -+ -+# -+# File systems -+# -+CONFIG_FS_JOURNAL_INFO=y -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -+# CONFIG_EXT3_FS_XATTR is not set -+# CONFIG_EXT4_FS is not set -+CONFIG_JBD=y -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_BTRFS_FS is not set -+# CONFIG_NILFS2_FS is not set -+CONFIG_FILE_LOCKING=y -+CONFIG_FSNOTIFY=y -+CONFIG_DNOTIFY=y -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+CONFIG_QUOTA=y -+# CONFIG_QUOTA_NETLINK_INTERFACE is not set -+CONFIG_PRINT_QUOTA_WARNING=y -+CONFIG_QUOTA_TREE=y -+# CONFIG_QFMT_V1 is not set -+CONFIG_QFMT_V2=y -+CONFIG_QUOTACTL=y -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# Caches -+# -+# CONFIG_FSCACHE is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+CONFIG_MSDOS_FS=y -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_PROC_PAGE_MONITOR=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+# CONFIG_CONFIGFS_FS is not set -+CONFIG_MISC_FILESYSTEMS=y -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -+# CONFIG_JFFS2_SUMMARY is not set -+# CONFIG_JFFS2_FS_XATTR is not set -+CONFIG_JFFS2_COMPRESSION_OPTIONS=y -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+# CONFIG_JFFS2_CMODE_NONE is not set -+CONFIG_JFFS2_CMODE_PRIORITY=y -+# CONFIG_JFFS2_CMODE_SIZE is not set -+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -+# CONFIG_CRAMFS is not set -+# CONFIG_SQUASHFS is not set -+# CONFIG_VXFS_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_OMFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_ROMFS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+CONFIG_NETWORK_FILESYSTEMS=y -+CONFIG_NFS_FS=y -+CONFIG_NFS_V3=y -+# CONFIG_NFS_V3_ACL is not set -+CONFIG_NFS_V4=y -+# CONFIG_NFS_V4_1 is not set -+CONFIG_ROOT_NFS=y -+# CONFIG_NFSD is not set -+CONFIG_LOCKD=y -+CONFIG_LOCKD_V4=y -+CONFIG_NFS_COMMON=y -+CONFIG_SUNRPC=y -+CONFIG_SUNRPC_GSS=y -+CONFIG_RPCSEC_GSS_KRB5=y -+# CONFIG_RPCSEC_GSS_SPKM3 is not set -+# CONFIG_SMB_FS is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+ -+# -+# Partition Types -+# -+CONFIG_PARTITION_ADVANCED=y -+# CONFIG_ACORN_PARTITION is not set -+# CONFIG_OSF_PARTITION is not set -+# CONFIG_AMIGA_PARTITION is not set -+# CONFIG_ATARI_PARTITION is not set -+# CONFIG_MAC_PARTITION is not set -+CONFIG_MSDOS_PARTITION=y -+# CONFIG_BSD_DISKLABEL is not set -+# CONFIG_MINIX_SUBPARTITION is not set -+# CONFIG_SOLARIS_X86_PARTITION is not set -+# CONFIG_UNIXWARE_DISKLABEL is not set -+# CONFIG_LDM_PARTITION is not set -+# CONFIG_SGI_PARTITION is not set -+# CONFIG_ULTRIX_PARTITION is not set -+# CONFIG_SUN_PARTITION is not set -+# CONFIG_KARMA_PARTITION is not set -+# CONFIG_EFI_PARTITION is not set -+# CONFIG_SYSV68_PARTITION is not set -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=y -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+# CONFIG_NLS_CODEPAGE_850 is not set -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=y -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+# CONFIG_NLS_UTF8 is not set -+# CONFIG_DLM is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_FRAME_WARN=1024 -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_STRIP_ASM_SYMS is not set -+# CONFIG_UNUSED_SYMBOLS is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_HEADERS_CHECK is not set -+CONFIG_DEBUG_KERNEL=y -+# CONFIG_DEBUG_SHIRQ is not set -+CONFIG_DETECT_SOFTLOCKUP=y -+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -+CONFIG_DETECT_HUNG_TASK=y -+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -+# CONFIG_SCHED_DEBUG is not set -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_TIMER_STATS is not set -+# CONFIG_DEBUG_OBJECTS is not set -+# CONFIG_DEBUG_SLAB is not set -+# CONFIG_DEBUG_KMEMLEAK is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+CONFIG_DEBUG_MUTEXES=y -+# CONFIG_DEBUG_LOCK_ALLOC is not set -+# CONFIG_PROVE_LOCKING is not set -+# CONFIG_LOCK_STAT is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+# CONFIG_DEBUG_BUGVERBOSE is not set -+CONFIG_DEBUG_INFO=y -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_WRITECOUNT is not set -+# CONFIG_DEBUG_MEMORY_INIT is not set -+# CONFIG_DEBUG_LIST is not set -+# CONFIG_DEBUG_SG is not set -+# CONFIG_DEBUG_NOTIFIERS is not set -+# CONFIG_DEBUG_CREDENTIALS is not set -+# CONFIG_BOOT_PRINTK_DELAY is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_RCU_CPU_STALL_DETECTOR is not set -+# CONFIG_BACKTRACE_SELF_TEST is not set -+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -+# CONFIG_FAULT_INJECTION is not set -+# CONFIG_LATENCYTOP is not set -+# CONFIG_SYSCTL_SYSCALL_CHECK is not set -+# CONFIG_PAGE_POISONING is not set -+CONFIG_HAVE_FUNCTION_TRACER=y -+CONFIG_TRACING_SUPPORT=y -+CONFIG_FTRACE=y -+# CONFIG_FUNCTION_TRACER is not set -+# CONFIG_IRQSOFF_TRACER is not set -+# CONFIG_SCHED_TRACER is not set -+# CONFIG_ENABLE_DEFAULT_TRACERS is not set -+# CONFIG_BOOT_TRACER is not set -+CONFIG_BRANCH_PROFILE_NONE=y -+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -+# CONFIG_PROFILE_ALL_BRANCHES is not set -+# CONFIG_STACK_TRACER is not set -+# CONFIG_KMEMTRACE is not set -+# CONFIG_WORKQUEUE_TRACER is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_SAMPLES is not set -+CONFIG_HAVE_ARCH_KGDB=y -+# CONFIG_KGDB is not set -+CONFIG_ARM_UNWIND=y -+# CONFIG_DEBUG_USER is not set -+# CONFIG_DEBUG_ERRORS is not set -+# CONFIG_DEBUG_STACK_USAGE is not set -+CONFIG_DEBUG_LL=y -+# CONFIG_EARLY_PRINTK is not set -+# CONFIG_DEBUG_ICEDCC is not set -+# CONFIG_OC_ETM is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITYFS is not set -+# CONFIG_DEFAULT_SECURITY_SELINUX is not set -+# CONFIG_DEFAULT_SECURITY_SMACK is not set -+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -+CONFIG_DEFAULT_SECURITY_DAC=y -+CONFIG_DEFAULT_SECURITY="" -+CONFIG_CRYPTO=y -+ -+# -+# Crypto core or helper -+# -+CONFIG_CRYPTO_ALGAPI=y -+CONFIG_CRYPTO_ALGAPI2=y -+CONFIG_CRYPTO_AEAD2=y -+CONFIG_CRYPTO_BLKCIPHER=y -+CONFIG_CRYPTO_BLKCIPHER2=y -+CONFIG_CRYPTO_HASH=y -+CONFIG_CRYPTO_HASH2=y -+CONFIG_CRYPTO_RNG2=y -+CONFIG_CRYPTO_PCOMP=y -+CONFIG_CRYPTO_MANAGER=y -+CONFIG_CRYPTO_MANAGER2=y -+# CONFIG_CRYPTO_GF128MUL is not set -+# CONFIG_CRYPTO_NULL is not set -+CONFIG_CRYPTO_WORKQUEUE=y -+# CONFIG_CRYPTO_CRYPTD is not set -+# CONFIG_CRYPTO_AUTHENC is not set -+# CONFIG_CRYPTO_TEST is not set -+ -+# -+# Authenticated Encryption with Associated Data -+# -+# CONFIG_CRYPTO_CCM is not set -+# CONFIG_CRYPTO_GCM is not set -+# CONFIG_CRYPTO_SEQIV is not set -+ -+# -+# Block modes -+# -+CONFIG_CRYPTO_CBC=y -+# CONFIG_CRYPTO_CTR is not set -+# CONFIG_CRYPTO_CTS is not set -+CONFIG_CRYPTO_ECB=m -+# CONFIG_CRYPTO_LRW is not set -+CONFIG_CRYPTO_PCBC=m -+# CONFIG_CRYPTO_XTS is not set -+ -+# -+# Hash modes -+# -+# CONFIG_CRYPTO_HMAC is not set -+# CONFIG_CRYPTO_XCBC is not set -+# CONFIG_CRYPTO_VMAC is not set -+ -+# -+# Digest -+# -+CONFIG_CRYPTO_CRC32C=y -+# CONFIG_CRYPTO_GHASH is not set -+# CONFIG_CRYPTO_MD4 is not set -+CONFIG_CRYPTO_MD5=y -+# CONFIG_CRYPTO_MICHAEL_MIC is not set -+# CONFIG_CRYPTO_RMD128 is not set -+# CONFIG_CRYPTO_RMD160 is not set -+# CONFIG_CRYPTO_RMD256 is not set -+# CONFIG_CRYPTO_RMD320 is not set -+# CONFIG_CRYPTO_SHA1 is not set -+# CONFIG_CRYPTO_SHA256 is not set -+# CONFIG_CRYPTO_SHA512 is not set -+# CONFIG_CRYPTO_TGR192 is not set -+# CONFIG_CRYPTO_WP512 is not set -+ -+# -+# Ciphers -+# -+# CONFIG_CRYPTO_AES is not set -+# CONFIG_CRYPTO_ANUBIS is not set -+# CONFIG_CRYPTO_ARC4 is not set -+# CONFIG_CRYPTO_BLOWFISH is not set -+# CONFIG_CRYPTO_CAMELLIA is not set -+# CONFIG_CRYPTO_CAST5 is not set -+# CONFIG_CRYPTO_CAST6 is not set -+CONFIG_CRYPTO_DES=y -+# CONFIG_CRYPTO_FCRYPT is not set -+# CONFIG_CRYPTO_KHAZAD is not set -+# CONFIG_CRYPTO_SALSA20 is not set -+# CONFIG_CRYPTO_SEED is not set -+# CONFIG_CRYPTO_SERPENT is not set -+# CONFIG_CRYPTO_TEA is not set -+# CONFIG_CRYPTO_TWOFISH is not set -+ -+# -+# Compression -+# -+# CONFIG_CRYPTO_DEFLATE is not set -+# CONFIG_CRYPTO_ZLIB is not set -+# CONFIG_CRYPTO_LZO is not set -+ -+# -+# Random Number Generation -+# -+# CONFIG_CRYPTO_ANSI_CPRNG is not set -+CONFIG_CRYPTO_HW=y -+# CONFIG_BINARY_PRINTF is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+CONFIG_GENERIC_FIND_LAST_BIT=y -+CONFIG_CRC_CCITT=y -+# CONFIG_CRC16 is not set -+# CONFIG_CRC_T10DIF is not set -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC7 is not set -+CONFIG_LIBCRC32C=y -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_DECOMPRESS_GZIP=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -+CONFIG_NLATTR=y -diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig -index b72ae06..d965d58 100644 ---- a/arch/arm/mach-omap2/Kconfig -+++ b/arch/arm/mach-omap2/Kconfig -@@ -96,6 +96,11 @@ config MACH_OMAP3517EVM - depends on ARCH_OMAP3 && ARCH_OMAP34XX - select OMAP_PACKAGE_CBB - -+config MACH_CRANEBOARD -+ bool "AM3517/05 Crane board" -+ depends on ARCH_OMAP3 && ARCH_OMAP34XX -+ select OMAP_PACKAGE_CBB -+ - config PMIC_TPS65023 - bool "TPS65023 Power Module" - default y -@@ -171,6 +176,7 @@ config MACH_OMAP_4430SDP - bool "OMAP 4430 SDP board" - depends on ARCH_OMAP4 - -+ - config OMAP3_EMU - bool "OMAP3 debugging peripherals" - depends on ARCH_OMAP3 -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index fa01859..9042317 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -130,6 +130,8 @@ obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o - obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \ - mmc-am3517evm.o - -+obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o \ -+ mmc-am3517crane.o - # Platform specific device init code - obj-y += usb-musb.o - obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o -diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c -new file mode 100644 -index 0000000..0bf4f60 ---- /dev/null -+++ b/arch/arm/mach-omap2/board-am3517crane.c -@@ -0,0 +1,773 @@ -+/* -+ * linux/arch/arm/mach-omap2/board-am3517crane.c -+ * -+ * Copyright (C) 2010 Mistral Solutions Pvt LtD <www.mistralsolutions.com> -+ * Author: Srinath.R <srinath@mistralsolutions.com> -+ * -+ * Based on mach-omap2/board-am3517evm.c -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation version 2. -+ * -+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, -+ * whether express or implied; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/gpio.h> -+#include <linux/irq.h> -+#include <linux/i2c/tsc2004.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/partitions.h> -+#include <linux/mtd/nand.h> -+#include <linux/input.h> -+#include <linux/tca6416_keypad.h> -+#include <linux/davinci_emac.h> -+#include <linux/i2c/pca953x.h> -+#include <linux/regulator/machine.h> -+#include <linux/can/platform/ti_hecc.h> -+#include <linux/i2c/tps65910.h> -+ -+#include <mach/hardware.h> -+#include <mach/am35xx.h> -+#include <asm/mach-types.h> -+#include <asm/mach/arch.h> -+#include <asm/mach/map.h> -+ -+#include <plat/board.h> -+#include <plat/common.h> -+#include <plat/control.h> -+#include <plat/usb.h> -+#include <plat/display.h> -+#include <plat/gpmc.h> -+#include <plat/nand.h> -+ -+#include "mmc-am3517crane.h" -+#include "mux.h" -+ -+#define GPMC_CS0_BASE 0x60 -+#define GPMC_CS_SIZE 0x30 -+ -+#define NAND_BLOCK_SIZE SZ_128K -+ -+static struct mtd_partition am3517crane_nand_partitions[] = { -+ /* All the partition sizes are listed in terms of NAND block size */ -+ { -+ .name = "xloader-nand", -+ .offset = 0, -+ .size = 4*(SZ_128K), -+ .mask_flags = MTD_WRITEABLE -+ }, -+ { -+ .name = "uboot-nand", -+ .offset = MTDPART_OFS_APPEND, -+ .size = 28*(SZ_128K), -+ .mask_flags = MTD_WRITEABLE -+ }, -+ { -+ .name = "params-nand", -+ .offset = MTDPART_OFS_APPEND, -+ .size = 4*(SZ_128K) -+ }, -+ { -+ .name = "linux-nand", -+ .offset = MTDPART_OFS_APPEND, -+ .size = 80*(SZ_128K) -+ }, -+ { -+ .name = "jffs2-nand", -+ .size = MTDPART_SIZ_FULL, -+ .offset = MTDPART_OFS_APPEND, -+ }, -+}; -+ -+static struct omap_nand_platform_data am3517crane_nand_data = { -+ .parts = am3517crane_nand_partitions, -+ .nr_parts = ARRAY_SIZE(am3517crane_nand_partitions), -+ .nand_setup = NULL, -+ .dma_channel = -1, /* disable DMA in OMAP NAND driver */ -+ .dev_ready = NULL, -+}; -+ -+static struct resource am3517crane_nand_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device am3517crane_nand_device = { -+ .name = "omap2-nand", -+ .id = 0, -+ .dev = { -+ .platform_data = &am3517crane_nand_data, -+ }, -+ .num_resources = 1, -+ .resource = &am3517crane_nand_resource, -+}; -+ -+void __init am3517crane_flash_init(void) -+{ -+ u8 cs = 0; -+ u8 nandcs = GPMC_CS_NUM + 1; -+ u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; -+ -+ while (cs < GPMC_CS_NUM) { -+ u32 ret = 0; -+ ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); -+ -+ if ((ret & 0xC00) == 0x800) { -+ /* Found it!! */ -+ if (nandcs > GPMC_CS_NUM) -+ nandcs = cs; -+ } -+ cs++; -+ } -+ if (nandcs > GPMC_CS_NUM) { -+ printk(KERN_INFO "NAND: Unable to find configuration " -+ " in GPMC\n "); -+ return; -+ } -+ -+ if (nandcs < GPMC_CS_NUM) { -+ am3517crane_nand_data.cs = nandcs; -+ am3517crane_nand_data.gpmc_cs_baseaddr = -+ (void *)(gpmc_base_add + GPMC_CS0_BASE + nandcs*GPMC_CS_SIZE); -+ -+ am3517crane_nand_data.gpmc_baseaddr = (void *)(gpmc_base_add); -+ -+ if (platform_device_register(&am3517crane_nand_device) < 0) -+ printk(KERN_ERR "Unable to register NAND device\n"); -+ -+ } -+} -+ -+ -+#define AM35XX_EVM_PHY_MASK (0xF) -+#define AM35XX_EVM_MDIO_FREQUENCY (1000000) -+ -+static struct emac_platform_data am3517_crane_emac_pdata = { -+ .phy_mask = AM35XX_EVM_PHY_MASK, -+ .mdio_max_freq = AM35XX_EVM_MDIO_FREQUENCY, -+ .rmii_en = 1, -+}; -+ -+static int __init eth_addr_setup(char *str) -+{ -+ int i; -+ -+ if (str == NULL) -+ return 0; -+ for (i = 0; i < ETH_ALEN; i++) -+ am3517_crane_emac_pdata.mac_addr[i] = simple_strtol(&str[i*3], -+ (char **)NULL, 16); -+ return 1; -+} -+ -+/* Get MAC address from kernel boot parameter eth=AA:BB:CC:DD:EE:FF */ -+__setup("eth=", eth_addr_setup); -+ -+static struct resource am3517_emac_resources[] = { -+ { -+ .start = AM35XX_IPSS_EMAC_BASE, -+ .end = AM35XX_IPSS_EMAC_BASE + 0x3FFFF, -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = INT_35XX_EMAC_C0_RXTHRESH_IRQ, -+ .end = INT_35XX_EMAC_C0_RXTHRESH_IRQ, -+ .flags = IORESOURCE_IRQ, -+ }, -+ { -+ .start = INT_35XX_EMAC_C0_RX_PULSE_IRQ, -+ .end = INT_35XX_EMAC_C0_RX_PULSE_IRQ, -+ .flags = IORESOURCE_IRQ, -+ }, -+ { -+ .start = INT_35XX_EMAC_C0_TX_PULSE_IRQ, -+ .end = INT_35XX_EMAC_C0_TX_PULSE_IRQ, -+ .flags = IORESOURCE_IRQ, -+ }, -+ { -+ .start = INT_35XX_EMAC_C0_MISC_PULSE_IRQ, -+ .end = INT_35XX_EMAC_C0_MISC_PULSE_IRQ, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device am3517_emac_device = { -+ .name = "davinci_emac", -+ .id = -1, -+ .num_resources = ARRAY_SIZE(am3517_emac_resources), -+ .resource = am3517_emac_resources, -+}; -+ -+static void am3517_enable_ethernet_int(void) -+{ -+ u32 regval; -+ -+ regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); -+ regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR | -+ AM35XX_CPGMAC_C0_TX_PULSE_CLR | -+ AM35XX_CPGMAC_C0_MISC_PULSE_CLR | -+ AM35XX_CPGMAC_C0_RX_THRESH_CLR); -+ -+ omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); -+ regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); -+} -+ -+static void am3517_disable_ethernet_int(void) -+{ -+ u32 regval; -+ -+ regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); -+ regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR | -+ AM35XX_CPGMAC_C0_TX_PULSE_CLR); -+ omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); -+ regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); -+} -+ -+void am3517_crane_ethernet_init(struct emac_platform_data *pdata) -+{ -+ unsigned int regval; -+ -+ pdata->ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET; -+ pdata->ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET; -+ pdata->ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET; -+ pdata->mdio_reg_offset = AM35XX_EMAC_MDIO_OFFSET; -+ pdata->ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE; -+ pdata->version = EMAC_VERSION_2; -+ pdata->hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR; -+ pdata->interrupt_enable = am3517_enable_ethernet_int; -+ pdata->interrupt_disable = am3517_disable_ethernet_int; -+ am3517_emac_device.dev.platform_data = pdata; -+ platform_device_register(&am3517_emac_device); -+ -+ regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); -+ regval = regval & (~(AM35XX_CPGMACSS_SW_RST)); -+ omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); -+ regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); -+ -+ return ; -+} -+ -+static void __init am3517_crane_display_init(void) -+{ -+ omap_mux_init_gpio(52, OMAP_PIN_OUTPUT); -+ gpio_request(52, "dvi_enable"); -+ gpio_direction_output(52, 1); -+} -+ -+ -+ -+static struct omap_dss_device am3517_crane_tv_device = { -+ .type = OMAP_DISPLAY_TYPE_VENC, -+ .name = "tv", -+ .driver_name = "venc", -+ .phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE, -+ .platform_enable = NULL, -+ .platform_disable = NULL, -+}; -+ -+static int am3517_crane_panel_enable_dvi(struct omap_dss_device *dssdev) -+{ -+ gpio_set_value(52, 1); -+ return 0; -+} -+ -+static void am3517_crane_panel_disable_dvi(struct omap_dss_device *dssdev) -+{ -+ gpio_set_value(52, 0); -+} -+ -+static struct omap_dss_device am3517_crane_dvi_device = { -+ .type = OMAP_DISPLAY_TYPE_DPI, -+ .name = "dvi", -+ .driver_name = "generic_panel", -+ .phy.dpi.data_lines = 24, -+ .platform_enable = am3517_crane_panel_enable_dvi, -+ .platform_disable = am3517_crane_panel_disable_dvi, -+}; -+ -+static struct omap_dss_device *am3517_crane_dss_devices[] = { -+ &am3517_crane_tv_device, -+ &am3517_crane_dvi_device, -+}; -+ -+static struct omap_dss_board_info am3517_crane_dss_data = { -+ .num_devices = ARRAY_SIZE(am3517_crane_dss_devices), -+ .devices = am3517_crane_dss_devices, -+ .default_device = &am3517_crane_dvi_device, -+}; -+ -+struct platform_device am3517_crane_dss_device = { -+ .name = "omapdss", -+ .id = -1, -+ .dev = { -+ .platform_data = &am3517_crane_dss_data, -+ }, -+}; -+ -+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); -+static struct resource dm644x_ccdc_resource[] = { -+ /* CCDC Base address */ -+ { -+ .start = AM35XX_IPSS_VPFE_BASE, -+ .end = AM35XX_IPSS_VPFE_BASE + 0xffff, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct platform_device dm644x_ccdc_dev = { -+ .name = "dm644x_ccdc", -+ .id = -1, -+ .num_resources = ARRAY_SIZE(dm644x_ccdc_resource), -+ .resource = dm644x_ccdc_resource, -+ .dev = { -+ .dma_mask = &vpfe_capture_dma_mask, -+ .coherent_dma_mask = DMA_BIT_MASK(32), -+ }, -+}; -+ -+static struct regulator_consumer_supply am3517_crane_vdd1_supplies[] = { -+ { -+ .supply = "vdd_core", -+ }, -+}; -+ -+static struct regulator_init_data am3517_crane_regulator_vdd1 = { -+ .constraints = { -+ .min_uV = 1200000, -+ .max_uV = 1200000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL, -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vdd1_supplies), -+ .consumer_supplies = am3517_crane_vdd1_supplies, -+}; -+ -+static struct regulator_consumer_supply am3517_crane_vdd2_supplies[] = { -+ { -+ .supply = "vddshv", -+ }, -+}; -+ -+static struct regulator_init_data am3517_crane_regulator_vdd2 = { -+ .constraints = { -+ .min_uV = 3300000, -+ .max_uV = 3300000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL, -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vdd2_supplies), -+ .consumer_supplies = am3517_crane_vdd2_supplies, -+}; -+ -+ -+static struct regulator_consumer_supply am3517_crane_vio_supplies[] = { -+ { -+ .supply = "vdds", -+ }, -+}; -+ -+static struct regulator_init_data am3517_crane_regulator_vio = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL, -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vio_supplies), -+ .consumer_supplies = am3517_crane_vio_supplies, -+}; -+ -+ -+static struct regulator_consumer_supply am3517_crane_vaux1_supplies[] = { -+ { -+ .supply = "vdd_sram_mpu", -+ }, -+ { -+ .supply = "vdd_sram_core_bg0", -+ }, -+ { -+ .supply = "vddsosc", -+ }, -+}; -+ -+static struct regulator_init_data am3517_crane_regulator_vaux1 = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL, -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vaux1_supplies), -+ .consumer_supplies = am3517_crane_vaux1_supplies, -+}; -+ -+ -+static struct regulator_consumer_supply am3517_crane_vaux2_supplies[] = { -+ { -+ .supply = "vdda1p8v_usbphy", -+ }, -+}; -+ -+static struct regulator_init_data am3517_crane_regulator_vaux2 = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL, -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vaux2_supplies), -+ .consumer_supplies = am3517_crane_vaux2_supplies, -+}; -+ -+ -+static struct regulator_consumer_supply am3517_crane_vdac_supplies[] = { -+ { -+ .supply = "vdda_dac", -+ .dev = &am3517_crane_dss_device.dev, -+ }, -+}; -+ -+static struct regulator_init_data am3517_crane_regulator_vdac = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vdac_supplies), -+ .consumer_supplies = am3517_crane_vdac_supplies, -+}; -+ -+static struct regulator_consumer_supply am3517_crane_vmmc_supplies[] = { -+ { -+ .supply = "vdda3p3v_usbphy", -+ }, -+}; -+ -+static struct regulator_init_data am3517_crane_regulator_vmmc = { -+ .constraints = { -+ .min_uV = 3300000, -+ .max_uV = 3300000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL, -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vmmc_supplies), -+ .consumer_supplies = am3517_crane_vmmc_supplies, -+}; -+ -+ -+static struct regulator_consumer_supply am3517_crane_vpll_supplies[] = { -+ { -+ .supply = "vdds_dpll_mpu_usbhost", -+ }, -+ { -+ .supply = "vdds_dpll_per_core", -+ }, -+}; -+ -+static struct regulator_init_data am3517_crane_regulator_vpll = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL, -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(am3517_crane_vpll_supplies), -+ .consumer_supplies = am3517_crane_vpll_supplies, -+}; -+ -+static int am3517_crane_tps65910_config(struct tps65910_platform_data *pdata) -+{ -+ u8 val = 0; -+ int i = 0; -+ int err = -1; -+ -+ -+ /* Configure TPS65910 for am3517_crane board needs */ -+ -+ /* Set sleep state active high */ -+ val |= (TPS65910_DEV2_SLEEPSIG_POL); -+ -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, -+ TPS65910_REG_DEVCTRL2); -+ if (err) { -+ printk(KERN_ERR "Unable to write TPS65910_REG_DEVCTRL2 reg\n"); -+ return -EIO; -+ } -+ -+ /* Mask ALL interrupts */ -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, 0xFF, -+ TPS65910_REG_INT_MSK); -+ if (err) { -+ printk(KERN_ERR "Unable to write TPS65910_REG_INT_MSK reg\n"); -+ return -EIO; -+ } -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, 0x03, -+ TPS65910_REG_INT_MSK2); -+ if (err) { -+ printk(KERN_ERR "Unable to write TPS65910_REG_INT_MSK2 reg\n"); -+ return -EIO; -+ } -+ -+ /* Set RTC regulator on during sleep */ -+ -+ val = TPS65910_VRTC_OFFMASK; -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, -+ TPS65910_REG_VRTC); -+ -+ if (err) { -+ printk(KERN_ERR "Unable to write TPS65910_REG_VRTC reg\n"); -+ return -EIO; -+ } -+ /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */ -+ val = 0; -+ val &= ~TPS65910_RTC_PWDNN; -+ val |= (TPS65910_CK32K_CTRL | TPS65910_SR_CTL_I2C_SEL); -+ -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, -+ TPS65910_REG_DEVCTRL); -+ if (err) { -+ printk(KERN_ERR "Unable to write TPS65910_REG_DEVCTRL reg\n"); -+ return -EIO; -+ } -+ -+ /* Enable and set back-up battery charger control*/ -+ -+ tps65910_enable_bbch(TPS65910_BBSEL_2P52); -+ -+ err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, -+ TPS65910_REG_VRTC); -+ if (err) { -+ printk(KERN_ERR "Unable to read TPS65910_REG_VRTC reg\n"); -+ return -EIO; -+ } -+ val = TPS65910_VRTC_OFFMASK; -+ -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, -+ TPS65910_REG_VRTC); -+ if (err) { -+ printk(KERN_ERR "Unable to write TPS65910_REG_VRTC reg\n"); -+ return -EIO; -+ } -+ -+ /* Disable SmartReflex control */ -+ val &= 0; -+ val &= ~TPS65910_RTC_PWDNN; -+ val |= (TPS65910_CK32K_CTRL | TPS65910_SR_CTL_I2C_SEL); -+ -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, -+ TPS65910_REG_DEVCTRL); -+ if (err) { -+ printk(KERN_ERR "Unabale to write TPS65910_REG_DEVCTRL reg\n"); -+ return -EIO; -+ } -+ -+ /* initilize all ISR work as NULL, specific driver will -+ * assign function(s) later. -+ */ -+ for (i = 0; i < TPS65910_MAX_IRQS; i++) -+ pdata->handlers[i] = NULL; -+ -+ return 0; -+} -+ -+struct tps65910_platform_data am3517_crane_tps65910_data = { -+ .irq_num = (unsigned)TPS65910_HOST_IRQ, -+ .gpio = NULL, -+ .vio = &am3517_crane_regulator_vio, -+ .vdd1 = &am3517_crane_regulator_vdd1, -+ .vdd2 = &am3517_crane_regulator_vdd2, -+ .vdd3 = NULL, -+ .vdig1 = NULL, -+ .vdig2 = NULL, -+ .vaux33 = NULL, -+ .vmmc = &am3517_crane_regulator_vmmc, -+ .vaux1 = &am3517_crane_regulator_vaux1, -+ .vaux2 = &am3517_crane_regulator_vaux2, -+ .vdac = &am3517_crane_regulator_vdac, -+ .vpll = &am3517_crane_regulator_vpll, -+ .board_tps65910_config = am3517_crane_tps65910_config, -+}; -+ -+static struct i2c_board_info __initdata am3517crane_i2c1_boardinfo[] = { -+ { -+ I2C_BOARD_INFO("tps65910", TPS65910_I2C_ID0), -+ .flags = I2C_CLIENT_WAKE, -+ .irq = TPS65910_HOST_IRQ, -+ .platform_data = &am3517_crane_tps65910_data, -+ }, -+}; -+ -+ -+static int __init am3517_crane_i2c_init(void) -+{ -+ omap_register_i2c_bus(1, 400, am3517crane_i2c1_boardinfo, -+ ARRAY_SIZE(am3517crane_i2c1_boardinfo)); -+ omap_register_i2c_bus(2, 400, NULL, 0); -+ omap_register_i2c_bus(3, 400, NULL, 0); -+ -+ return 0; -+} -+ -+/* -+ * HECC information -+ */ -+static struct resource am3517_hecc_resources[] = { -+ { -+ .start = AM35XX_IPSS_HECC_BASE, -+ .end = AM35XX_IPSS_HECC_BASE + 0x3FFF, -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = INT_35XX_HECC0_IRQ, -+ .end = INT_35XX_HECC0_IRQ, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device am3517_hecc_device = { -+ .name = "ti_hecc", -+ .id = 1, -+ .num_resources = ARRAY_SIZE(am3517_hecc_resources), -+ .resource = am3517_hecc_resources, -+}; -+ -+static struct ti_hecc_platform_data am3517_crane_hecc_pdata = { -+ .scc_hecc_offset = AM35XX_HECC_SCC_HECC_OFFSET, -+ .scc_ram_offset = AM35XX_HECC_SCC_RAM_OFFSET, -+ .hecc_ram_offset = AM35XX_HECC_RAM_OFFSET, -+ .mbx_offset = AM35XX_HECC_MBOX_OFFSET, -+ .int_line = AM35XX_HECC_INT_LINE, -+ .version = AM35XX_HECC_VERSION, -+}; -+ -+static void am3517_crane_hecc_init(struct ti_hecc_platform_data *pdata) -+{ -+ am3517_hecc_device.dev.platform_data = pdata; -+ platform_device_register(&am3517_hecc_device); -+} -+ -+ -+/* -+ * Board initialization -+ */ -+static struct omap_board_config_kernel am3517_crane_config[] __initdata = { -+}; -+ -+static struct platform_device *am3517_crane_devices[] __initdata = { -+ &dm644x_ccdc_dev, -+ &am3517_crane_dss_device, -+}; -+ -+static void __init am3517_crane_init_irq(void) -+{ -+ omap_board_config = am3517_crane_config; -+ omap_board_config_size = ARRAY_SIZE(am3517_crane_config); -+ -+ omap2_init_common_hw(NULL, NULL, NULL, NULL, NULL); -+ omap_init_irq(); -+ omap_gpio_init(); -+} -+ -+static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { -+ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, -+ .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, -+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, -+ -+ .phy_reset = true, -+ .reset_gpio_port[0] = 38, -+ .reset_gpio_port[1] = -EINVAL, -+ .reset_gpio_port[2] = -EINVAL -+}; -+ -+#ifdef CONFIG_OMAP_MUX -+static struct omap_board_mux board_mux[] __initdata = { -+ /* USB OTG DRVVBUS offset = 0x212 */ -+ OMAP3_MUX(CHASSIS_DMAREQ3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), -+ OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), -+ OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN), -+ { .reg_offset = OMAP_MUX_TERMINATOR }, -+}; -+#else -+#define board_mux NULL -+#endif -+ -+static struct am3517_hsmmc_info mmc[] = { -+ { -+ .mmc = 1, -+ .wires = 8, -+ .gpio_cd = 41, -+ .gpio_wp = 40, -+ }, -+ {} /* Terminator */ -+}; -+ -+static void __init am3517_crane_init(void) -+{ -+ -+ am3517_crane_i2c_init(); -+ omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); -+ platform_add_devices(am3517_crane_devices, -+ ARRAY_SIZE(am3517_crane_devices)); -+ -+ omap_serial_init(); -+ am3517crane_flash_init(); -+ usb_musb_init(); -+ -+ /* Configure GPIO for EHCI port */ -+ omap_mux_init_gpio(35, OMAP_PIN_OUTPUT); -+ gpio_request(35, "usb_ehci_enable"); -+ gpio_direction_output(35, 1); -+ gpio_set_value(35, 1); -+ omap_mux_init_gpio(38, OMAP_PIN_OUTPUT); -+ usb_ehci_init(&ehci_pdata); -+ -+ /* DSS */ -+ am3517_crane_display_init(); -+ -+ /*Ethernet*/ -+ am3517_crane_ethernet_init(&am3517_crane_emac_pdata); -+ am3517_crane_hecc_init(&am3517_crane_hecc_pdata); -+ -+ /* MMC init function */ -+ am3517_mmc_init(mmc); -+ -+} -+ -+static void __init am3517_crane_map_io(void) -+{ -+ omap2_set_globals_343x(); -+ omap2_map_common_io(); -+} -+ -+MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") -+ .phys_io = 0x48000000, -+ .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, -+ .boot_params = 0x80000100, -+ .map_io = am3517_crane_map_io, -+ .init_irq = am3517_crane_init_irq, -+ .init_machine = am3517_crane_init, -+ .timer = &omap_timer, -+MACHINE_END -diff --git a/arch/arm/mach-omap2/mmc-am3517crane.c b/arch/arm/mach-omap2/mmc-am3517crane.c -new file mode 100644 -index 0000000..80ad8ae ---- /dev/null -+++ b/arch/arm/mach-omap2/mmc-am3517crane.c -@@ -0,0 +1,267 @@ -+/* -+ * linux/arch/arm/mach-omap2/mmc-crane.c -+ * -+ * Copyright (C) 2010 Mistral Solutions Pvt Ltd <www.mistralsolutions.com> -+ * Author: Srinath.R <srinath@mistralsolutions.com> -+ * -+ * Based on linux/arch/arm/mach-omap2/mmc-am3517evm.c -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/interrupt.h> -+#include <linux/delay.h> -+#include <linux/gpio.h> -+ -+#include <mach/hardware.h> -+#include <plat/control.h> -+#include <plat/mmc.h> -+#include <plat/board.h> -+#include "mmc-am3517crane.h" -+ -+#define LDO_CLR 0x00 -+#define VSEL_S2_CLR 0x40 -+ -+#define VMMC1_DEV_GRP 0x27 -+#define VMMC1_CLR 0x00 -+#define VMMC1_315V 0x03 -+#define VMMC1_300V 0x02 -+#define VMMC1_285V 0x01 -+#define VMMC1_185V 0x00 -+#define VMMC1_DEDICATED 0x2A -+ -+#define VMMC2_DEV_GRP 0x2B -+#define VMMC2_CLR 0x40 -+#define VMMC2_315V 0x0c -+#define VMMC2_300V 0x0b -+#define VMMC2_285V 0x0a -+#define VMMC2_260V 0x08 -+#define VMMC2_185V 0x06 -+#define VMMC2_DEDICATED 0x2E -+ -+#define VMMC_DEV_GRP_P1 0x20 -+ -+#define HSMMC_NAME_LEN 9 -+ -+#if defined(CONFIG_REGULATOR) || \ -+ (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ -+ defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)) -+ -+/* -+ * MMC definitions -+ * -+ */ -+static struct mmc_controller { -+ struct omap_mmc_platform_data *mmc; -+ u8 vmmc_dev_grp; -+ u8 vmmc_dedicated; -+ char name[HSMMC_NAME_LEN]; -+} hsmmc[] = { -+ { -+ .vmmc_dev_grp = VMMC1_DEV_GRP, -+ .vmmc_dedicated = VMMC1_DEDICATED, -+ }, -+ { -+ .vmmc_dev_grp = VMMC2_DEV_GRP, -+ .vmmc_dedicated = VMMC2_DEDICATED, -+ }, -+}; -+ -+static int mmc_card_detect(int irq) -+{ -+ unsigned i; -+ -+ for (i = 0; i < ARRAY_SIZE(hsmmc); i++) { -+ struct omap_mmc_platform_data *mmc; -+ -+ mmc = hsmmc[i].mmc; -+ if (!mmc) -+ continue; -+ if (irq != mmc->slots[0].card_detect_irq) -+ continue; -+ -+ /* NOTE: assumes card detect signal is active-low */ -+ return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); -+ } -+ return -ENOSYS; -+} -+ -+static int mmc_get_ro(struct device *dev, int slot) -+{ -+ struct omap_mmc_platform_data *mmc = dev->platform_data; -+ -+ /* NOTE: assumes write protect signal is active-high */ -+ return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); -+} -+ -+/* -+ * MMC Slot Initialization. -+ */ -+static int mmc_late_init(struct device *dev) -+{ -+ struct omap_mmc_platform_data *mmc = dev->platform_data; -+ int ret = 0; -+ int i; -+ -+ ret = gpio_request(mmc->slots[0].switch_pin, "mmc_cd"); -+ if (ret) -+ goto done; -+ ret = gpio_direction_input(mmc->slots[0].switch_pin); -+ if (ret) -+ goto err; -+ -+ for (i = 0; i < ARRAY_SIZE(hsmmc); i++) { -+ if (hsmmc[i].name == mmc->slots[0].name) { -+ hsmmc[i].mmc = mmc; -+ break; -+ } -+ } -+ -+ return 0; -+ -+err: -+ gpio_free(mmc->slots[0].switch_pin); -+done: -+ mmc->slots[0].card_detect_irq = 0; -+ mmc->slots[0].card_detect = NULL; -+ -+ dev_err(dev, "err %d configuring card detect\n", ret); -+ return ret; -+} -+ -+static void mmc_cleanup(struct device *dev) -+{ -+ struct omap_mmc_platform_data *mmc = dev->platform_data; -+ -+ gpio_free(mmc->slots[0].switch_pin); -+} -+ -+#ifdef CONFIG_PM -+ -+static int mmc_suspend(struct device *dev, int slot) -+{ -+ struct omap_mmc_platform_data *mmc = dev->platform_data; -+ -+ disable_irq(mmc->slots[0].card_detect_irq); -+ return 0; -+} -+ -+static int mmc_resume(struct device *dev, int slot) -+{ -+ struct omap_mmc_platform_data *mmc = dev->platform_data; -+ -+ enable_irq(mmc->slots[0].card_detect_irq); -+ return 0; -+} -+ -+#else -+#define mmc_suspend NULL -+#define mmc_resume NULL -+#endif -+ -+/* -+ * the MMC power setting function -+ */ -+ -+static int mmc1_set_power(struct device *dev, int slot, int power_on, -+ int vdd) -+{ -+ return 0; -+} -+ -+static int mmc2_set_power(struct device *dev, int slot, int power_on, int vdd) -+{ -+ return 0; -+} -+ -+static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata; -+ -+void __init am3517_mmc_init(struct am3517_hsmmc_info *controllers) -+{ -+ struct am3517_hsmmc_info *c; -+ int nr_hsmmc = ARRAY_SIZE(hsmmc_data); -+ -+ for (c = controllers; c->mmc; c++) { -+ struct mmc_controller *mmc_control = hsmmc + c->mmc - 1; -+ struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1]; -+ -+ if (!c->mmc || c->mmc > nr_hsmmc) { -+ pr_debug("MMC%d: no such controller\n", c->mmc); -+ continue; -+ } -+ if (mmc) { -+ pr_debug("MMC%d: already configured\n", c->mmc); -+ continue; -+ } -+ -+ mmc = kzalloc(sizeof(struct omap_mmc_platform_data), -+ GFP_KERNEL); -+ if (!mmc) { -+ pr_err("Cannot allocate memory for mmc device!\n"); -+ return; -+ } -+ -+ sprintf(mmc_control->name, "mmc%islot%i", c->mmc, 1); -+ mmc->slots[0].name = mmc_control->name; -+ mmc->nr_slots = 1; -+ mmc->slots[0].ocr_mask = MMC_VDD_165_195 | -+ MMC_VDD_26_27 | MMC_VDD_27_28 | -+ MMC_VDD_29_30 | -+ MMC_VDD_30_31 | MMC_VDD_31_32; -+ mmc->slots[0].wires = c->wires; -+ mmc->slots[0].internal_clock = !c->ext_clock; -+ mmc->dma_mask = 0xffffffff; -+ -+ if (1) { -+ mmc->init = mmc_late_init; -+ mmc->cleanup = mmc_cleanup; -+ mmc->suspend = mmc_suspend; -+ mmc->resume = mmc_resume; -+ -+ mmc->slots[0].switch_pin = c->gpio_cd; -+ mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd); -+ mmc->slots[0].card_detect = mmc_card_detect; -+ } else -+ mmc->slots[0].switch_pin = -EINVAL; -+ -+ /* write protect normally uses an OMAP gpio */ -+ if (gpio_is_valid(c->gpio_wp)) { -+ gpio_request(c->gpio_wp, "mmc_wp"); -+ gpio_direction_input(c->gpio_wp); -+ -+ mmc->slots[0].gpio_wp = c->gpio_wp; -+ mmc->slots[0].get_ro = mmc_get_ro; -+ } else -+ mmc->slots[0].gpio_wp = -EINVAL; -+ -+ /* NOTE: we assume OMAP's MMC1 and MMC2 use -+ * the TWL4030's VMMC1 and VMMC2, respectively; -+ * and that OMAP's MMC3 isn't used. -+ */ -+ -+ switch (c->mmc) { -+ case 1: -+ mmc->slots[0].set_power = mmc1_set_power; -+ break; -+ case 2: -+ mmc->slots[0].set_power = mmc2_set_power; -+ break; -+ default: -+ pr_err("MMC%d configuration not supported!\n", c->mmc); -+ continue; -+ } -+ hsmmc_data[c->mmc - 1] = mmc; -+ } -+ -+ omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC); -+} -+#else -+inline void am3517_mmc_init(struct craneboard_hsmmc_info *info) -+{ -+} -+#endif -diff --git a/arch/arm/mach-omap2/mmc-am3517crane.h b/arch/arm/mach-omap2/mmc-am3517crane.h -new file mode 100644 -index 0000000..97fd872 ---- /dev/null -+++ b/arch/arm/mach-omap2/mmc-am3517crane.h -@@ -0,0 +1,22 @@ -+/* -+ * MMC definitions for craneboard AM3517/05 -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+struct am3517_hsmmc_info { -+ u8 mmc; /* controller 1/2/3 */ -+ u8 wires; /* 1/4/8 wires */ -+ bool transceiver; /* MMC-2 option */ -+ bool ext_clock; /* use external pin for input clock */ -+ bool cover_only; /* No card detect - just cover switch */ -+ int gpio_cd; /* or -EINVAL */ -+ int gpio_wp; /* or -EINVAL */ -+ char *name; /* or NULL for default */ -+ struct device *dev; /* returned: pointer to mmc adapter */ -+ int ocr_mask; /* temporary HACK */ -+}; -+ -+void am3517_mmc_init(struct am3517_hsmmc_info *); -diff --git a/arch/arm/mach-omap2/tps65910-pmic.c b/arch/arm/mach-omap2/tps65910-pmic.c -new file mode 100644 -index 0000000..b17d662 ---- /dev/null -+++ b/arch/arm/mach-omap2/tps65910-pmic.c -@@ -0,0 +1,195 @@ -+/* -+ * tps65910-pmic.c -+ * -+ * Common regulator supplies and init data structs for TPS65910 -+ * PMIC for AM35xx based EVMs. They can be used in various board-evm -+ * files for Am35xx based platforms using TPS65910. -+ * -+ * Copyright (C) 2010 Mistral Solutions Pvt Ltd <www.mistralsolutions.com> -+ * -+ * Based on arch/arm/mach-omap2/twl4030-pmic.c -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation version 2. -+ * -+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, -+ * whether express or implied; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+/* Power domain maping for TPS65910 and AM35XX -+ -+ 1.8V -+ VIO -----------> VDDS -+ -+ 1.8V -+ VAUX1 ---------> VDDS_SRAM_CORE_BG -+ | -+ -------> VDDS_SRAM_MPU -+ | -+ -------> VDDOSC -+ -+ 3.3V -+ VDD2 ----------> VDDSHV -+ -+ 1.2V -+ VDD1 ----------> VDD_CORE -+ -+ 1.8V -+ VPLL ----------> VDDS_DPLL_PRE_CORE -+ | -+ -------> VDDSPLL_MPU_USBHOST -+ -+ 1.8V -+ VDAC ----------> VDDA_DAC -+ -+ 1.8V -+ VAUX2 ----------> VDDA1P8V_USBPHY -+ -+ 3.3V -+ VMMC ----------> VDDA3P3V_USBPHY -+ -+*/ -+#include <linux/regulator/machine.h> -+ -+/* VIO */ -+struct regulator_consumer_supply tps65910_vio_supply = { -+ .supply = "vdds", -+}; -+ -+ -+/* VAUX1 */ -+struct regulator_consumer_supply tps65910_vaux1_supply[] = { -+ { -+ .supply = "vdds_sram_core_bg", -+ }, -+ { -+ .supply = "vdds_sram_mpu", -+ }, -+ { -+ .supply = "vddosc", -+ }, -+}; -+ -+/* VPLL */ -+struct regulator_consumer_supply tps65910_vpll_supply[] = { -+ { -+ .supply = "vdds_dpll_pre_core", -+ }, -+ { -+ .supply = "vddspll_mpu_usbhost", -+ }, -+ -+}; -+ -+/* VDAC */ -+struct regulator_consumer_supply tps65910_vdac_supply = { -+ .supply = "vdda_dac", -+}; -+ -+/* VAUX2 */ -+struct regulator_consumer_supply tps65910_vaux2_supply = { -+ .supply = "vdda1p8v_usbphy", -+}; -+ -+ -+/* VMMC */ -+struct regulator_consumer_supply tps65910_vmmc_supply = { -+ .supply = "vdda3p3v_usbphy", -+}; -+ -+ -+/* Regulator initialization data */ -+ -+/* VIO LDO */ -+struct regulator_init_data vio_data = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(tps65910_vaux1_supply), -+ .consumer_supplies = &tps65910_vaux1_supply, -+}; -+ -+ -+ -+/* VAUX1 LDO */ -+struct regulator_init_data vaux1_data = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 2850000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = false, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(tps65910_vaux1_supply), -+ .consumer_supplies = &tps65910_vaux1_supply, -+}; -+ -+/* VAUX2 LDO */ -+struct regulator_init_data vaux2_data = { -+ .constraints = { -+ .min_uV = 3300000, -+ .max_uV = 3300000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = true, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(tps65910_vaux2_supply), -+ .consumer_supplies = &tps65910_vaux2_supply, -+ -+}; -+ -+/* VMMC LDO */ -+struct regulator_init_data vmmc_data = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 3300000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = false, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(tps65910_vmmc_supply), -+ .consumer_supplies = &tps65910_vmmc_supply, -+ -+}; -+ -+/* VPLL LDO */ -+struct regulator_init_data vpll_data = { -+ .constraints = { -+ .min_uV = 100000, -+ .max_uV = 2500000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = false, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(tps65910_vpll_supply), -+ .consumer_supplies = &tps65910_vpll_supply, -+}; -+ -+/* VDAC LDO */ -+struct regulator_init_data vdac_data = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 2850000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, -+ .apply_uV = false, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(tps65910_vdac_supply), -+ .consumer_supplies = &tps65910_vdac_supply, -+ -+}; -+ -+ -diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types -index 07b976d..2c9a874 100644 ---- a/arch/arm/tools/mach-types -+++ b/arch/arm/tools/mach-types -@@ -2536,3 +2536,4 @@ c3ax03 MACH_C3AX03 C3AX03 2549 - mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 - esyx MACH_ESYX ESYX 2551 - bulldog MACH_BULLDOG BULLDOG 2553 -+craneboard MACH_CRANEBOARD CRANEBOARD 2932 -diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile -index 270b6d7..b7ae0c4 100644 ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -20,3 +20,4 @@ obj-$(CONFIG_GPIO_CS5535) += cs5535-gpio.o - obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o - obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o - obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o -+ -diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c -index bbea8a0..48273d7 100644 ---- a/drivers/i2c/busses/i2c-omap.c -+++ b/drivers/i2c/busses/i2c-omap.c -@@ -801,7 +801,7 @@ complete: - "data to send\n"); - break; - } -- -+#ifndef CONFIG_CRANEBOARD - /* - * OMAP3430 Errata 1.153: When an XRDY/XDR - * is hit, wait for XUDF before writing data -@@ -821,6 +821,7 @@ complete: - stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); - } - } -+#endif - - omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w); - } -diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig -index 8782978..306b346 100644 ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -129,12 +129,25 @@ config TWL4030_POWER - and load scripts controling which resources are switched off/on - or reset when a sleep, wakeup or warm reset event occurs. - -+config TPS65910_CORE -+ bool "Texas Instruments TPS65910 Support" -+ depends on I2C=y && GENERIC_HARDIRQS -+ help -+ Say yes here if you have TPS65910 family chip on your board. -+ This core driver provides register access and registers devices -+ for the various functions so that function-specific drivers can -+ bind to them. -+ -+ These multi-function chips are found on many AM35xx boards, -+ providing power management, RTC, GPIO features. -+ - config TWL4030_CODEC - bool - depends on TWL4030_CORE - select MFD_CORE - default n - -+ - config MFD_TMIO - bool - default n -diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile -index ca2f2c4..85dc3a7 100644 ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -30,6 +30,8 @@ obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o twl6030-irq.o - obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o - obj-$(CONFIG_TWL4030_CODEC) += twl4030-codec.o - -+obj-$(CONFIG_TPS65910_CORE) += tps65910-core.o -+ - obj-$(CONFIG_MFD_MC13783) += mc13783-core.o - - obj-$(CONFIG_MFD_CORE) += mfd-core.o -@@ -55,4 +57,4 @@ obj-$(CONFIG_AB3100_CORE) += ab3100-core.o - obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o - obj-$(CONFIG_AB4500_CORE) += ab4500-core.o - obj-$(CONFIG_MFD_88PM8607) += 88pm8607.o --obj-$(CONFIG_PMIC_ADP5520) += adp5520.o -\ No newline at end of file -+obj-$(CONFIG_PMIC_ADP5520) += adp5520.o -diff --git a/drivers/mfd/tps65910-core.c b/drivers/mfd/tps65910-core.c -new file mode 100644 -index 0000000..9ffccc7 ---- /dev/null -+++ b/drivers/mfd/tps65910-core.c -@@ -0,0 +1,741 @@ -+/* -+ * tps65910-core.c -- Multifunction core driver for TPS65910x chips -+ * -+ * Copyright (C) 2010 Mistral solutions Pvt Ltd <www.mistralsolutions.com> -+ * -+ * Based on twl-core.c -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+ -+#include <linux/init.h> -+#include <linux/mutex.h> -+#include <linux/platform_device.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+ -+#include <linux/regulator/machine.h> -+ -+#include <linux/i2c.h> -+#include <linux/i2c/tps65910.h> -+#include <plat/board.h> -+#include <linux/irq.h> -+#include <linux/interrupt.h> -+#include <linux/delay.h> -+ -+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) -+#include <plat/cpu.h> -+#endif -+ -+#define DRIVER_NAME "tps65910" -+ -+#if defined(CONFIG_GPIO_TPS65910) -+#define tps65910_has_gpio() true -+#else -+#define tps65910_has_gpio() false -+#endif -+ -+#if defined(CONFIG_REGULATOR_TPS65910) -+#define tps65910_has_regulator() true -+#else -+#define tps65910_has_regulator() false -+#endif -+ -+#if defined(CONFIG_RTC_DRV_TPS65910) -+#define tps65910_has_rtc() true -+#else -+#define tps65910_has_rtc() false -+#endif -+ -+#define TPS65910_GENERAL 0 -+#define TPS65910_SMARTREFLEX 1 -+ -+ -+struct tps65910_platform_data *the_tps65910; -+ -+enum tps65910x_model { -+ TPS65910, /* TI processors OMAP3 family */ -+ TPS659101, /* Samsung - S5PV210, S5PC1xx */ -+ TPS659102, /* Samsung - S3C64xx */ -+ TPS659103, /* Reserved */ -+ TPS659104, /* Reserved */ -+ TPS659105, /* TI processors - DM643x, DM644x */ -+ TPS659106, /* Reserved */ -+ TPS659107, /* Reserved */ -+ TPS659108, /* Reserved */ -+ TPS659109, /* Freescale - i.MX51 */ -+ -+}; -+ -+static bool inuse; -+static struct work_struct core_work; -+static struct mutex work_lock; -+ -+/* Structure for each TPS65910 Slave */ -+struct tps65910_client { -+ struct i2c_client *client; -+ u8 address; -+ /* max numb of i2c_msg required for read = 2 */ -+ struct i2c_msg xfer_msg[2]; -+ /* To lock access to xfer_msg */ -+ struct mutex xfer_lock; -+}; -+static struct tps65910_client tps65910_modules[TPS65910_NUM_SLAVES]; -+ -+/* bbch = Back-up battery charger control register */ -+int tps65910_enable_bbch(u8 voltage) -+{ -+ -+ u8 val = 0; -+ int err; -+ -+ if (voltage == TPS65910_BBSEL_3P0 || voltage == TPS65910_BBSEL_2P52 || -+ voltage == TPS65910_BBSEL_3P15 || -+ voltage == TPS65910_BBSEL_VBAT) { -+ val = (voltage | TPS65910_BBCHEN); -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, -+ TPS65910_REG_BBCH); -+ if (err) { -+ printk(KERN_ERR "Unable write TPS65910_REG_BBCH reg\n"); -+ return -EIO; -+ } -+ } else { -+ printk(KERN_ERR"Invalid argumnet for %s \n", __func__); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL(tps65910_enable_bbch); -+ -+int tps65910_disable_bbch(void) -+{ -+ -+ u8 val = 0; -+ int err; -+ -+ err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_BBCH); -+ -+ if (!err) { -+ val &= ~TPS65910_BBCHEN; -+ -+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, -+ TPS65910_REG_BBCH); -+ if (err) { -+ printk(KERN_ERR "Unable write TPS65910_REG_BBCH \ -+ reg\n"); -+ return -EIO; -+ } -+ } else { -+ printk(KERN_ERR "Unable to read TPS65910_REG_BBCH reg\n"); -+ return -EIO; -+ } -+ return 0; -+} -+EXPORT_SYMBOL(tps65910_disable_bbch); -+ -+int tps65910_i2c_read(u8 slave_addr, u8 *value, u8 reg, unsigned num_bytes) -+{ -+ u8 val; -+ u32 ret; -+ struct tps65910_client *tps65910; -+ struct i2c_msg *msg; -+ -+ switch (slave_addr) { -+ case TPS65910_I2C_ID0: -+ tps65910 = &tps65910_modules[0]; -+ tps65910->address = TPS65910_I2C_ID0; -+ break; -+ case TPS65910_I2C_ID1: -+ tps65910 = &tps65910_modules[1]; -+ tps65910->address = TPS65910_I2C_ID1; -+ break; -+ default: -+ printk(KERN_ERR "Invalid Slave address for TPS65910\n"); -+ return -ENODEV; -+ } -+ mutex_lock(&tps65910->xfer_lock); -+ /* [MSG1] fill the register address data */ -+ msg = &tps65910->xfer_msg[0]; -+ msg->addr = tps65910->address; -+ msg->len = 1; -+ msg->flags = 0; -+ val = reg; -+ msg->buf = &val; -+ /* [MSG2] fill the data rx buffer */ -+ msg = &tps65910->xfer_msg[1]; -+ msg->addr = tps65910->address; -+ msg->flags = I2C_M_RD; /* Read the register value */ -+ msg->len = num_bytes; /* only n bytes */ -+ msg->buf = value; -+ -+ ret = i2c_transfer(tps65910->client->adapter, tps65910->xfer_msg, 2); -+ mutex_unlock(&tps65910->xfer_lock); -+ -+ /* i2c_transfer returns number of messages transferred */ -+ if (ret != 2) { -+ pr_err("%s: i2c_read failed to transfer all messages\n", -+ "TPS65910C"); -+ return -EIO; -+ } else { -+ return 0; -+ } -+} -+EXPORT_SYMBOL(tps65910_i2c_read); -+ -+ -+int tps65910_i2c_write(u8 slave_addr, u8 *value, u8 reg, unsigned num_bytes) -+{ -+ int ret; -+ struct tps65910_client *tps65910; -+ struct i2c_msg *msg; -+ u8 write_buf[66]; /* Max 65 Regs + offset*/ -+ -+ switch (slave_addr) { -+ case TPS65910_I2C_ID0: -+ tps65910 = &tps65910_modules[0]; -+ tps65910->address = TPS65910_I2C_ID0; -+ break; -+ case TPS65910_I2C_ID1: -+ tps65910 = &tps65910_modules[1]; -+ tps65910->address = TPS65910_I2C_ID1; -+ break; -+ default: -+ printk(KERN_ERR "Invalid Slave address for TPS65910\n"); -+ return -ENODEV; -+ } -+ -+ mutex_lock(&tps65910->xfer_lock); -+ /* [MSG1]: fill the register address data fill the data Tx buffer */ -+ msg = &tps65910->xfer_msg[0]; -+ msg->addr = tps65910->address; -+ msg->len = num_bytes + 1; -+ msg->flags = 0; -+ write_buf[0] = reg; -+ memcpy(&write_buf[1], value, num_bytes); -+ msg->buf = &write_buf[0]; -+ ret = i2c_transfer(tps65910->client->adapter, tps65910->xfer_msg, 1); -+ mutex_unlock(&tps65910->xfer_lock); -+ -+ /* i2c_transfer returns number of messages transferred */ -+ if (ret != 1) { -+ pr_err("%s: i2c_write failed to transfer all messages\n", -+ __func__); -+ return -EIO; -+ } else { -+ return 0; -+ } -+} -+EXPORT_SYMBOL(tps65910_i2c_write); -+ -+int tps65910_i2c_read_u8(u8 mod_no, u8 *value, u8 reg) -+{ -+ struct tps65910_client *tps65910; -+ -+ switch (mod_no) { -+ case TPS65910_I2C_ID0: -+ tps65910 = &tps65910_modules[0]; -+ tps65910->address = TPS65910_I2C_ID0; -+ break; -+ case TPS65910_I2C_ID1: -+ tps65910 = &tps65910_modules[1]; -+ tps65910->address = TPS65910_I2C_ID1; -+ break; -+ default: -+ printk(KERN_ERR "Invalid Slave address for TPS65910\n"); -+ return -ENODEV; -+ } -+ -+ (*value) = i2c_smbus_read_byte_data(tps65910->client, reg); -+ mdelay(10); -+ if (*value < 0) -+ return -EIO; -+ else -+ return 0; -+} -+EXPORT_SYMBOL(tps65910_i2c_read_u8); -+ -+int tps65910_i2c_write_u8(u8 slave_addr, u8 value, u8 reg) -+{ -+ int ret; -+ struct tps65910_client *tps65910; -+ -+ switch (slave_addr) { -+ case TPS65910_I2C_ID0: -+ tps65910 = &tps65910_modules[0]; -+ tps65910->address = TPS65910_I2C_ID0; -+ break; -+ case TPS65910_I2C_ID1: -+ tps65910 = &tps65910_modules[1]; -+ tps65910->address = TPS65910_I2C_ID1; -+ break; -+ default: -+ printk(KERN_ERR "Invalid Slave address for TPS65910\n"); -+ return -ENODEV; -+ } -+ ret = i2c_smbus_write_byte_data(tps65910->client, reg, value); -+ if (ret < 0) -+ return -EIO; -+ else -+ return 0; -+} -+EXPORT_SYMBOL(tps65910_i2c_write_u8); -+ -+ -+int tps65910_enable_irq(int irq) -+{ -+ u8 mask = 0x00; -+ -+ if (irq > 7) { -+ irq -= 8; -+ tps65910_i2c_read_u8(TPS65910_I2C_ID0, -+ &mask, TPS65910_REG_INT_MSK2); -+ mask &= ~(1 << irq); -+ return tps65910_i2c_write_u8(TPS65910_I2C_ID0, -+ mask, TPS65910_REG_INT_MSK2); -+ } else { -+ tps65910_i2c_read_u8(TPS65910_I2C_ID0, -+ &mask, TPS65910_REG_INT_MSK); -+ mask &= ~(1 << irq); -+ return tps65910_i2c_write_u8(TPS65910_I2C_ID0, -+ mask, TPS65910_REG_INT_MSK); -+ } -+} -+EXPORT_SYMBOL(tps65910_enable_irq); -+ -+int tps65910_disable_irq(int irq) -+{ -+ u8 mask = 0x00; -+ -+ if (irq > 7) { -+ irq -= 8; -+ tps65910_i2c_read_u8(TPS65910_I2C_ID0, -+ &mask, TPS65910_REG_INT_MSK2); -+ mask |= (1 << irq); -+ return tps65910_i2c_write_u8(TPS65910_I2C_ID0, -+ mask, TPS65910_REG_INT_MSK2); -+ } else { -+ tps65910_i2c_read_u8(TPS65910_I2C_ID0, -+ &mask, TPS65910_REG_INT_MSK); -+ mask = (1 << irq); -+ return tps65910_i2c_write_u8(TPS65910_I2C_ID0, -+ mask, TPS65910_REG_INT_MSK); -+ } -+} -+EXPORT_SYMBOL(tps65910_disable_irq); -+ -+int tps65910_add_irq_work(int irq, -+ void (*handler)(void *data)) -+{ -+ int ret = 0; -+ the_tps65910->handlers[irq] = handler; -+ ret = tps65910_enable_irq(irq); -+ -+ return ret; -+} -+EXPORT_SYMBOL(tps65910_add_irq_work); -+ -+int tps65910_remove_irq_work(int irq) -+{ -+ int ret = 0; -+ ret = tps65910_disable_irq(irq); -+ the_tps65910->handlers[irq] = NULL; -+ return ret; -+} -+EXPORT_SYMBOL(tps65910_remove_irq_work); -+ -+static void tps65910_core_work(struct work_struct *work) -+{ -+ /* Read the status register and take action */ -+ u8 status = 0x00; -+ u8 status2 = 0x00; -+ u8 mask = 0x00; -+ u8 mask2 = 0x00; -+ u16 isr = 0x00; -+ u16 irq = 0; -+ void (*handler)(void *data) = NULL; -+ -+ mutex_lock(&work_lock); -+ while (1) { -+ tps65910_i2c_read_u8(TPS65910_I2C_ID0, &status2, -+ TPS65910_REG_INT_STS2); -+ tps65910_i2c_read_u8(TPS65910_I2C_ID0, &mask2, -+ TPS65910_REG_INT_MSK2); -+ status2 &= (~mask2); -+ isr = (status2 << 8); -+ tps65910_i2c_read_u8(TPS65910_I2C_ID0, &status, -+ TPS65910_REG_INT_STS); -+ tps65910_i2c_read_u8(TPS65910_I2C_ID0, &mask, -+ TPS65910_REG_INT_MSK); -+ status &= ~(mask); -+ isr |= status; -+ if (!isr) -+ break; -+ -+ while (isr) { -+ irq = fls(isr) - 1; -+ isr &= ~(1 << irq); -+ handler = the_tps65910->handlers[irq]; -+ if (handler) -+ handler(the_tps65910); -+ } -+ } -+ enable_irq(the_tps65910->irq_num); -+ mutex_unlock(&work_lock); -+} -+ -+ -+static irqreturn_t tps65910_isr(int irq, void *data) -+{ -+ -+#ifdef CONFIG_LOCKDEP -+ /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which -+ * we don't want and can't tolerate. Although it might be -+ * friendlier not to borrow this thread context... -+ */ -+ local_irq_enable(); -+#endif -+ disable_irq_nosync(irq); -+ (void) schedule_work(&core_work); -+ return IRQ_HANDLED; -+} -+ -+ -+static struct device *add_numbered_child(unsigned chip, const char *name, -+ int num, void *pdata, unsigned pdata_len, bool can_wakeup, int irq) -+{ -+ -+ struct platform_device *pdev; -+ struct tps65910_client *tps65910 = &tps65910_modules[chip]; -+ int status; -+ -+ pdev = platform_device_alloc(name, num); -+ if (!pdev) { -+ dev_dbg(&tps65910->client->dev, "can't alloc dev\n"); -+ status = -ENOMEM; -+ goto err; -+ } -+ device_init_wakeup(&pdev->dev, can_wakeup); -+ pdev->dev.parent = &tps65910->client->dev; -+ -+ if (pdata) { -+ status = platform_device_add_data(pdev, pdata, pdata_len); -+ if (status < 0) { -+ dev_dbg(&pdev->dev, "can't add platform_data\n"); -+ goto err; -+ } -+ } -+ status = platform_device_add(pdev); -+ -+err: -+ if (status < 0) { -+ platform_device_put(pdev); -+ dev_err(&tps65910->client->dev, "can't add %s dev\n", name); -+ return ERR_PTR(status); -+ } -+ return &pdev->dev; -+ -+} -+ -+static inline struct device *add_child(unsigned chip, const char *name, -+ void *pdata, unsigned pdata_len, -+ bool can_wakeup, int irq) -+{ -+ return add_numbered_child(chip, name, -1, pdata, pdata_len, -+ can_wakeup, irq); -+} -+ static -+struct device *add_regulator_linked(int num, struct regulator_init_data *pdata, -+ struct regulator_consumer_supply *consumers, -+ unsigned num_consumers) -+{ -+ /* regulator framework demands init_data */ -+ if (!pdata) -+ return NULL; -+ -+ if (consumers) { -+ pdata->consumer_supplies = consumers; -+ pdata->num_consumer_supplies = num_consumers; -+ } -+ return add_numbered_child(TPS65910_GENERAL, "tps65910_regulator", num, -+ pdata, sizeof(*pdata), false, TPS65910_HOST_IRQ); -+} -+ -+ static struct device * -+add_regulator(int num, struct regulator_init_data *pdata) -+{ -+ return add_regulator_linked(num, pdata, NULL, 0); -+} -+ -+ static int -+add_children(struct tps65910_platform_data *pdata, unsigned long features) -+{ -+ int status; -+ struct device *child; -+ -+ struct platform_device *pdev = NULL; -+ -+ if (tps65910_has_gpio() && (pdata->gpio != NULL)) { -+ -+ pdev = platform_device_alloc("tps65910_gpio", -1); -+ if (!pdev) { -+ status = -ENOMEM; -+ goto err; -+ } -+ pdev->dev.parent = &tps65910_modules[0].client->dev; -+ device_init_wakeup(&pdev->dev, 0); -+ if (pdata) { -+ status = platform_device_add_data(pdev, pdata, -+ sizeof(*pdata)); -+ if (status < 0) { -+ dev_dbg(&pdev->dev, -+ "can't add platform_data\n"); -+ goto err; -+ } -+ } -+ } -+ if (tps65910_has_rtc()) { -+ child = add_child(TPS65910_GENERAL, "tps65910_rtc", -+ NULL, 0, true, pdata->irq_num); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ } -+ -+ if (tps65910_has_regulator()) { -+ -+ child = add_regulator(TPS65910_VIO, pdata->vio); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VDD1, pdata->vdd1); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VDD2, pdata->vdd2); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VDD3, pdata->vdd3); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VDIG1, pdata->vdig1); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VDIG2, pdata->vdig2); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VAUX33, pdata->vaux33); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VMMC, pdata->vmmc); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VAUX1, pdata->vaux1); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VAUX2, pdata->vaux2); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VDAC, pdata->vdac); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ -+ child = add_regulator(TPS65910_VPLL, pdata->vpll); -+ if (IS_ERR(child)) -+ return PTR_ERR(child); -+ } -+ return 0; -+ -+err: -+ return -1; -+ -+} -+ -+static int tps65910_remove(struct i2c_client *client) -+{ -+ unsigned i; -+ -+ for (i = 0; i < TPS65910_NUM_SLAVES; i++) { -+ -+ struct tps65910_client *tps65910 = &tps65910_modules[i]; -+ -+ if (tps65910->client && tps65910->client != client) -+ i2c_unregister_device(tps65910->client); -+ -+ tps65910_modules[i].client = NULL; -+ } -+ inuse = false; -+ return 0; -+} -+ -+static int __init -+tps65910_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) -+{ -+ int status; -+ unsigned i; -+ struct tps65910_platform_data *pdata; -+ -+ pdata = client->dev.platform_data; -+ the_tps65910 = pdata; -+ -+ if (!pdata) { -+ dev_dbg(&client->dev, "no platform data?\n"); -+ return -EINVAL; -+ } -+ -+ if (i2c_check_functionality(client->adapter, -+ (I2C_FUNC_I2C | I2C_FUNC_SMBUS_BYTE)) == 0) { -+ dev_dbg(&client->dev, "can't talk I2C?\n"); -+ return -EIO; -+ } -+ -+ if (inuse) { -+ dev_dbg(&client->dev, "driver is already in use\n"); -+ return -EBUSY; -+ } -+ -+ for (i = 0; i < TPS65910_NUM_SLAVES; i++) { -+ -+ struct tps65910_client *tps65910 = &tps65910_modules[i]; -+ -+ tps65910->address = client->addr + i; -+ -+ if (i == 0) -+ tps65910->client = client; -+ else { -+ tps65910->client = i2c_new_dummy(client->adapter, -+ tps65910->address); -+ -+ if (!tps65910->client) { -+ dev_err(&client->dev, -+ "can't attach client %d\n", i); -+ status = -ENOMEM; -+ goto fail; -+ } -+ } -+ mutex_init(&tps65910->xfer_lock); -+ } -+ -+ inuse = true; -+ -+ if (pdata->board_tps65910_config != NULL) -+ pdata->board_tps65910_config(pdata); -+ -+ -+ if (pdata->irq_num) { -+ /* TPS65910 power ON interrupt(s) would have already been -+ * occured, immediately after request_irq the control will be -+ * transfered to tps65910_isr, if we do work initialization -+ * after requesting IRQ, the system crashes (does not boot), -+ * to avoid this we do work initialization before requesting -+ * IRQ -+ */ -+ mutex_init(&work_lock); -+ INIT_WORK(&core_work, tps65910_core_work); -+ -+ status = request_irq(pdata->irq_num, tps65910_isr, -+ IRQF_DISABLED, "tps65910", pdata); -+ if (status < 0) { -+ pr_err("tps65910: could not claim irq%d: %d\n", -+ pdata->irq_num, status); -+ goto fail; -+ } -+ } -+ -+ status = add_children(pdata, 0x00); -+ if (status < 0) -+ goto fail; -+ -+ return 0; -+ -+fail: -+ if (status < 0) -+ tps65910_remove(client); -+ -+ return status; -+} -+ -+ -+static int tps65910_i2c_remove(struct i2c_client *client) -+{ -+ unsigned i; -+ -+ for (i = 0; i < TPS65910_NUM_SLAVES; i++) { -+ -+ struct tps65910_client *tps65910 = &tps65910_modules[i]; -+ -+ if (tps65910->client && tps65910->client != client) -+ i2c_unregister_device(tps65910->client); -+ -+ tps65910_modules[i].client = NULL; -+ } -+ inuse = false; -+ return 0; -+} -+ -+/* chip-specific feature flags, for i2c_device_id.driver_data */ -+static const struct i2c_device_id tps65910_i2c_ids[] = { -+ { "tps65910", TPS65910 }, -+ { "tps659101", TPS659101 }, -+ { "tps659102", TPS659102 }, -+ { "tps659103", TPS659103 }, -+ { "tps659104", TPS659104 }, -+ { "tps659105", TPS659105 }, -+ { "tps659106", TPS659106 }, -+ { "tps659107", TPS659107 }, -+ { "tps659108", TPS659108 }, -+ { "tps659109", TPS659109 }, -+ {/* end of list */ }, -+}; -+MODULE_DEVICE_TABLE(i2c, tps65910_i2c_ids); -+ -+/* One Client Driver ,3 Clients - Regulator, RTC , GPIO */ -+static struct i2c_driver tps65910_i2c_driver = { -+ .driver.name = DRIVER_NAME, -+ .id_table = tps65910_i2c_ids, -+ .probe = tps65910_i2c_probe, -+ .remove = tps65910_i2c_remove, -+}; -+ -+static int __init tps65910_init(void) -+{ -+ int res; -+ -+ res = i2c_add_driver(&tps65910_i2c_driver); -+ if (res < 0) { -+ pr_err(DRIVER_NAME ": driver registration failed\n"); -+ return res; -+ } -+ -+ return 0; -+} -+subsys_initcall(tps65910_init); -+ -+static void __exit tps65910_exit(void) -+{ -+ i2c_del_driver(&tps65910_i2c_driver); -+} -+module_exit(tps65910_exit); -+ -+MODULE_AUTHOR("Mistral Solutions Pvt Ltd"); -+MODULE_DESCRIPTION("I2C Core interface for TPS65910"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig -index 71fbd6e..0ddf4c2 100644 ---- a/drivers/rtc/Kconfig -+++ b/drivers/rtc/Kconfig -@@ -267,6 +267,14 @@ config RTC_DRV_TWL4030 - This driver can also be built as a module. If so, the module - will be called rtc-twl. - -+config RTC_DRV_TPS65910 -+ boolean "TI TPS65910" -+ depends on RTC_CLASS && TPS65910_CORE -+ help -+ If you say yes here you get support for the RTC on the -+ TPS65910 family chips, used mostly with OMAP3/AM35xx platforms. -+ -+ - config RTC_DRV_S35390A - tristate "Seiko Instruments S-35390A" - select BITREVERSE -diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile -index 7da6efb..8fcfe49 100644 ---- a/drivers/rtc/Makefile -+++ b/drivers/rtc/Makefile -@@ -81,6 +81,7 @@ obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o - obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o - obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o - obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o -+obj-$(CONFIG_RTC_DRV_TPS65910) += rtc-tps65910.o - obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o - obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o - obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o -diff --git a/drivers/rtc/rtc-tps65910.c b/drivers/rtc/rtc-tps65910.c -new file mode 100644 -index 0000000..7e7ed4b ---- /dev/null -+++ b/drivers/rtc/rtc-tps65910.c -@@ -0,0 +1,657 @@ -+/* -+ * rtc-tps65910.c -- TPS65910 Real Time Clock interface -+ * -+ * Copyright (C) 2010 Mistral Solutions Pvt Ltd. <www.mistralsolutions.com> -+ * Author: Umesh K <umeshk@mistralsolutions.com> -+ * -+ * Based on rtc-twl.c -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/errno.h> -+#include <linux/init.h> -+#include <linux/module.h> -+#include <linux/types.h> -+#include <linux/rtc.h> -+#include <linux/bcd.h> -+#include <linux/platform_device.h> -+#include <linux/interrupt.h> -+#include <linux/i2c/tps65910.h> -+#include <linux/gpio.h> -+#include <linux/delay.h> -+ -+/* RTC Definitions */ -+/* RTC_CTRL_REG bitfields */ -+#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 -+#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02 -+#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04 -+#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08 -+#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10 -+#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20 -+#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40 -+#define BIT_RTC_CTRL_REG_RTC_V_OPT_M 0x80 -+ -+/* RTC_STATUS_REG bitfields */ -+#define BIT_RTC_STATUS_REG_RUN_M 0x02 -+#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04 -+#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08 -+#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10 -+#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20 -+#define BIT_RTC_STATUS_REG_ALARM_M 0x40 -+#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80 -+ -+/* RTC_INTERRUPTS_REG bitfields */ -+#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03 -+#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04 -+#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08 -+ -+/* DEVCTRL bitfields */ -+#define BIT_RTC_PWDN 0x40 -+ -+/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ -+#define ALL_TIME_REGS 6 -+ -+/* -+ * Supports 1 byte read from TPS65910 RTC register. -+ */ -+static int tps65910_rtc_read_u8(u8 *data, u8 reg) -+{ -+ int ret; -+ -+ ret = tps65910_i2c_read_u8(TPS65910_I2C_ID0, data, reg); -+ -+ if (ret < 0) -+ pr_err("tps65910_rtc: Could not read TPS65910" -+ "register %X - error %d\n", reg, ret); -+ return ret; -+} -+ -+/* -+ * Supports 1 byte write to TPS65910 RTC registers. -+ */ -+static int tps65910_rtc_write_u8(u8 data, u8 reg) -+{ -+ int ret; -+ -+ ret = tps65910_i2c_write_u8(TPS65910_I2C_ID0, data, reg); -+ if (ret < 0) -+ pr_err("tps65910_rtc: Could not write TPS65910" -+ "register %X - error %d\n", reg, ret); -+ return ret; -+} -+ -+/* -+ * Cache the value for timer/alarm interrupts register; this is -+ * only changed by callers holding rtc ops lock (or resume). -+ */ -+static unsigned char rtc_irq_bits; -+ -+/* -+ * Enable 1/second update and/or alarm interrupts. -+ */ -+static int set_rtc_irq_bit(unsigned char bit) -+{ -+ unsigned char val; -+ int ret; -+ -+ val = rtc_irq_bits | bit; -+ val |= bit; -+ ret = tps65910_rtc_write_u8(val, TPS65910_REG_RTC_INTERRUPTS); -+ if (ret == 0) -+ rtc_irq_bits = val; -+ -+ return ret; -+} -+ -+/* -+ * Disable update and/or alarm interrupts. -+ */ -+static int mask_rtc_irq_bit(unsigned char bit) -+{ -+ unsigned char val; -+ int ret; -+ -+ val = rtc_irq_bits & ~bit; -+ ret = tps65910_rtc_write_u8(val, TPS65910_REG_RTC_INTERRUPTS); -+ if (ret == 0) -+ rtc_irq_bits = val; -+ -+ return ret; -+} -+ -+static int tps65910_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) -+{ -+ int ret; -+ -+ if (enabled) -+ ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); -+ else -+ ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); -+ -+ return ret; -+} -+ -+static int tps65910_rtc_update_irq_enable(struct device *dev, unsigned enabled) -+{ -+ int ret; -+ -+ if (enabled) -+ ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); -+ else -+ ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); -+ -+ return ret; -+} -+ -+#if 1 /* Debugging periodic interrupts */ -+/* -+ * We will just handle setting the frequency and make use the framework for -+ * reading the periodic interupts. -+ * -+ * @freq: Current periodic IRQ freq: -+ * bit 0: every second -+ * bit 1: every minute -+ * bit 2: every hour -+ * bit 3: every day -+ */ -+ -+static int tps65910_rtc_irq_set_freq(struct device *dev, int freq) -+{ -+ struct rtc_device *rtc = dev_get_drvdata(dev); -+ -+ if (freq < 0 || freq > 3) -+ return -EINVAL; -+ -+ rtc->irq_freq = freq; -+ /* set rtc irq freq to user defined value */ -+ set_rtc_irq_bit(freq); -+ -+ return 0; -+} -+#endif -+ -+/* -+ * Gets current TPS65910 RTC time and date parameters. -+ * -+ * The RTC's time/alarm representation is not what gmtime(3) requires -+ * Linux to use: -+ * -+ * - Months are 1..12 vs Linux 0-11 -+ * - Years are 0..99 vs Linux 1900..N (we assume 21st century) -+ */ -+static int tps65910_rtc_read_time(struct device *dev, struct rtc_time *tm) -+{ -+ unsigned char rtc_data[ALL_TIME_REGS + 1]; -+ int ret; -+ u8 save_control; -+ -+ tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); -+ ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); -+ if (ret < 0) -+ return ret; -+ -+ save_control &= ~BIT_RTC_CTRL_REG_RTC_V_OPT_M; -+ -+ ret = tps65910_rtc_write_u8(save_control, TPS65910_REG_RTC_CTRL); -+ if (ret < 0) -+ return ret; -+ -+ ret = tps65910_rtc_read_u8(&rtc_data[0], TPS65910_REG_SECONDS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[1], TPS65910_REG_MINUTES); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[2], TPS65910_REG_HOURS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[3], TPS65910_REG_DAYS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[4], TPS65910_REG_MONTHS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[5], TPS65910_REG_YEARS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ -+ tm->tm_sec = bcd2bin(rtc_data[0]); -+ tm->tm_min = bcd2bin(rtc_data[1]); -+ tm->tm_hour = bcd2bin(rtc_data[2]); -+ tm->tm_mday = bcd2bin(rtc_data[3]); -+ tm->tm_mon = bcd2bin(rtc_data[4]) - 1; -+ tm->tm_year = bcd2bin(rtc_data[5]) + 100; -+ -+ return ret; -+} -+ -+static int tps65910_rtc_set_time(struct device *dev, struct rtc_time *tm) -+{ -+ unsigned char save_control; -+ unsigned char rtc_data[ALL_TIME_REGS + 1]; -+ int ret; -+ -+ rtc_data[1] = bin2bcd(tm->tm_sec); -+ rtc_data[2] = bin2bcd(tm->tm_min); -+ rtc_data[3] = bin2bcd(tm->tm_hour); -+ rtc_data[4] = bin2bcd(tm->tm_mday); -+ rtc_data[5] = bin2bcd(tm->tm_mon + 1); -+ rtc_data[6] = bin2bcd(tm->tm_year - 100); -+ -+ /*Dummy read*/ -+ ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); -+ -+ /* Stop RTC while updating the TC registers */ -+ ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); -+ if (ret < 0) -+ goto out; -+ -+ save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; -+ -+ tps65910_rtc_write_u8(save_control, TPS65910_REG_RTC_CTRL); -+ -+ /* update all the time registers in one shot */ -+ ret = tps65910_rtc_write_u8(rtc_data[1], TPS65910_REG_SECONDS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(rtc_data[2], TPS65910_REG_MINUTES); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(rtc_data[3], TPS65910_REG_HOURS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(rtc_data[4], TPS65910_REG_DAYS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(rtc_data[5], TPS65910_REG_MONTHS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(rtc_data[6], TPS65910_REG_YEARS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ -+ /*Dummy read*/ -+ ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); -+ -+ ret = tps65910_rtc_read_u8(&save_control, TPS65910_REG_RTC_CTRL); -+ if (ret < 0) -+ goto out; -+ /* Start back RTC */ -+ save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; -+ ret = tps65910_rtc_write_u8(save_control, TPS65910_REG_RTC_CTRL); -+ -+out: -+ return ret; -+} -+ -+/* -+ * Gets current TPS65910 RTC alarm time. -+ */ -+static int tps65910_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) -+{ -+ unsigned char rtc_data[ALL_TIME_REGS + 1]; -+ int ret; -+ -+ ret = tps65910_rtc_read_u8(&rtc_data[0], TPS65910_REG_ALARM_SECONDS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[1], TPS65910_REG_ALARM_MINUTES); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[2], TPS65910_REG_ALARM_HOURS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[3], TPS65910_REG_ALARM_DAYS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[4], TPS65910_REG_ALARM_MONTHS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_read_u8(&rtc_data[5], TPS65910_REG_ALARM_YEARS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_read_time error %d\n", ret); -+ return ret; -+ } -+ -+ /* some of these fields may be wildcard/"match all" */ -+ alm->time.tm_sec = bcd2bin(rtc_data[0]); -+ alm->time.tm_min = bcd2bin(rtc_data[1]); -+ alm->time.tm_hour = bcd2bin(rtc_data[2]); -+ alm->time.tm_mday = bcd2bin(rtc_data[3]); -+ alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1; -+ alm->time.tm_year = bcd2bin(rtc_data[5]) + 100; -+ -+ /* report cached alarm enable state */ -+ if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) -+ alm->enabled = 1; -+ -+ return ret; -+} -+ -+static int tps65910_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) -+{ -+ unsigned char alarm_data[ALL_TIME_REGS + 1]; -+ int ret; -+ -+ ret = tps65910_rtc_alarm_irq_enable(dev, 0); -+ if (ret) -+ goto out; -+ -+ alarm_data[1] = bin2bcd(alm->time.tm_sec); -+ alarm_data[2] = bin2bcd(alm->time.tm_min); -+ alarm_data[3] = bin2bcd(alm->time.tm_hour); -+ alarm_data[4] = bin2bcd(alm->time.tm_mday); -+ alarm_data[5] = bin2bcd(alm->time.tm_mon + 1); -+ alarm_data[6] = bin2bcd(alm->time.tm_year - 100); -+ -+ /* update all the alarm registers in one shot */ -+ ret = tps65910_rtc_write_u8(alarm_data[1], TPS65910_REG_ALARM_SECONDS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(alarm_data[2], TPS65910_REG_ALARM_MINUTES); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(alarm_data[3], TPS65910_REG_ALARM_HOURS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(alarm_data[4], TPS65910_REG_ALARM_DAYS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(alarm_data[5], TPS65910_REG_ALARM_MONTHS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ ret = tps65910_rtc_write_u8(alarm_data[6], TPS65910_REG_ALARM_YEARS); -+ if (ret < 0) { -+ dev_err(dev, "rtc_write_time error %d\n", ret); -+ return ret; -+ } -+ -+ if (alm->enabled) -+ ret = tps65910_rtc_alarm_irq_enable(dev, 1); -+out: -+ return ret; -+} -+ -+ -+struct work_struct rtc_wq; -+unsigned long rtc_events; -+struct rtc_device *global_rtc; -+ -+void rtc_work(void *data) -+{ -+ -+ int res; -+ u8 rd_reg; -+ unsigned long events = 0; -+ -+ res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_INT_STS); -+ -+ if (res < 0) -+ goto out; -+ /* -+ * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG. -+ * only one (ALARM or RTC) interrupt source may be enabled -+ * at time, we also could check our results -+ * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM] -+ */ -+ if (rd_reg & TPS65910_RTC_ALARM_IT) { -+ res = tps65910_rtc_write_u8(rd_reg | TPS65910_RTC_ALARM_IT, -+ TPS65910_REG_INT_STS); -+ if (res < 0) -+ goto out; -+ -+ /*Dummy read -- mandatory for status register*/ -+ res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); -+ mdelay(100); -+ res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); -+ res = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_RTC_STATUS); -+ -+ rtc_events |= RTC_IRQF | RTC_AF; -+ } else if (rd_reg & TPS65910_RTC_PERIOD_IT) { -+ res = tps65910_rtc_write_u8(rd_reg | TPS65910_RTC_PERIOD_IT, -+ TPS65910_REG_INT_STS); -+ if (res < 0) -+ goto out; -+ -+ /*Dummy read -- mandatory for status register*/ -+ res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); -+ mdelay(100); -+ res = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); -+ rd_reg &= 0xC3; -+ res = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_RTC_STATUS); -+ rtc_events |= RTC_IRQF | RTC_UF; -+ } -+out: -+ /* Notify RTC core on event */ -+ events = rtc_events; -+ rtc_update_irq(global_rtc, 1, events); -+} -+ -+static struct rtc_class_ops tps65910_rtc_ops = { -+ .read_time = tps65910_rtc_read_time, -+ .set_time = tps65910_rtc_set_time, -+ .read_alarm = tps65910_rtc_read_alarm, -+ .set_alarm = tps65910_rtc_set_alarm, -+ .alarm_irq_enable = tps65910_rtc_alarm_irq_enable, -+ .update_irq_enable = tps65910_rtc_update_irq_enable, -+ .irq_set_freq = tps65910_rtc_irq_set_freq, -+}; -+ -+static int __devinit tps65910_rtc_probe(struct platform_device *pdev) -+{ -+ struct rtc_device *rtc; -+ int ret = 0; -+ u8 rd_reg; -+ -+ rtc = rtc_device_register(pdev->name, -+ &pdev->dev, &tps65910_rtc_ops, THIS_MODULE); -+ -+ if (IS_ERR(rtc)) { -+ ret = PTR_ERR(rtc); -+ dev_err(&pdev->dev, "can't register TPS65910 RTC device,\ -+ err %ld\n", PTR_ERR(rtc)); -+ goto out0; -+ -+ } -+ printk(KERN_INFO "TPS65910 RTC device successfully registered\n"); -+ -+ platform_set_drvdata(pdev, rtc); -+ -+ /* Take rtc out of reset */ -+ tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_DEVCTRL); -+ rd_reg &= ~BIT_RTC_PWDN; -+ ret = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_DEVCTRL); -+ -+ /* Dummy read to ensure that the register gets updated. -+ * Please refer tps65910 TRM table:25 for details -+ */ -+ tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); -+ -+ ret = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_STATUS); -+ if (ret < 0) { -+ printk(KERN_ERR "TPS65910 RTC STATUS REG READ FAILED\n"); -+ goto out1; -+ } -+ -+ if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M) -+ dev_warn(&pdev->dev, "Power up reset detected.\n"); -+ -+ if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) -+ dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); -+ -+ /* Clear RTC Power up reset and pending alarm interrupts */ -+ ret = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_RTC_STATUS); -+ if (ret < 0) -+ goto out1; -+ ret = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_INT_STS); -+ if (ret < 0) { -+ printk(KERN_ERR "TPS65910 RTC STATUS REG READ FAILED\n"); -+ goto out1; -+ } -+ -+ if (rd_reg & 0x40) { -+ printk(KERN_INFO "pending alarm interrupt!!! clearing!!!"); -+ tps65910_rtc_write_u8(rd_reg, TPS65910_REG_INT_STS); -+ } -+ -+ global_rtc = rtc; -+ -+ /* Link RTC IRQ handler to TPS65910 Core */ -+ tps65910_add_irq_work(TPS65910_RTC_ALARM_IRQ, rtc_work); -+ tps65910_add_irq_work(TPS65910_RTC_PERIOD_IRQ, rtc_work); -+ -+ /* Check RTC module status, Enable if it is off */ -+ ret = tps65910_rtc_read_u8(&rd_reg, TPS65910_REG_RTC_CTRL); -+ if (ret < 0) -+ goto out1; -+ -+ if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { -+ dev_info(&pdev->dev, "Enabling TPS65910-RTC.\n"); -+ rd_reg |= BIT_RTC_CTRL_REG_STOP_RTC_M; -+ ret = tps65910_rtc_write_u8(rd_reg, TPS65910_REG_RTC_CTRL); -+ if (ret < 0) -+ goto out1; -+ } -+ -+ /* init cached IRQ enable bits */ -+ ret = tps65910_rtc_read_u8(&rtc_irq_bits, TPS65910_REG_RTC_INTERRUPTS); -+ if (ret < 0) -+ goto out1; -+ -+ tps65910_rtc_write_u8(0x3F, TPS65910_REG_INT_MSK); -+ return ret; -+ -+out1: -+ rtc_device_unregister(rtc); -+out0: -+ return ret; -+} -+ -+/* -+ * Disable all TPS65910 RTC module interrupts. -+ * Sets status flag to free. -+ */ -+static int __devexit tps65910_rtc_remove(struct platform_device *pdev) -+{ -+ /* leave rtc running, but disable irqs */ -+ struct rtc_device *rtc = platform_get_drvdata(pdev); -+ int irq = platform_get_irq(pdev, 0); -+ -+ mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); -+ mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); -+ -+ -+ free_irq(irq, rtc); -+ -+ rtc_device_unregister(rtc); -+ platform_set_drvdata(pdev, NULL); -+ return 0; -+} -+ -+static void tps65910_rtc_shutdown(struct platform_device *pdev) -+{ -+ /* mask timer interrupts, but leave alarm interrupts on to enable -+ * power-on when alarm is triggered -+ */ -+ mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); -+} -+ -+#ifdef CONFIG_PM -+ -+static unsigned char irqstat; -+ -+ static -+int tps65910_rtc_suspend(struct platform_device *pdev, pm_message_t state) -+{ -+ irqstat = rtc_irq_bits; -+ mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); -+ return 0; -+} -+ -+static int tps65910_rtc_resume(struct platform_device *pdev) -+{ -+ set_rtc_irq_bit(irqstat); -+ return 0; -+} -+ -+#else -+#define tps65910_rtc_suspend NULL -+#define tps65910_rtc_resume NULL -+#endif -+ -+ -+static struct platform_driver tps65910rtc_driver = { -+ .probe = tps65910_rtc_probe, -+ .remove = __devexit_p(tps65910_rtc_remove), -+ .shutdown = tps65910_rtc_shutdown, -+ .suspend = tps65910_rtc_suspend, -+ .resume = tps65910_rtc_resume, -+ .driver = { -+ .owner = THIS_MODULE, -+ .name = "tps65910_rtc", -+ }, -+}; -+static int __init tps65910_rtc_init(void) -+{ -+ return platform_driver_register(&tps65910rtc_driver); -+} -+module_init(tps65910_rtc_init); -+ -+static void __exit tps65910_rtc_exit(void) -+{ -+ platform_driver_unregister(&tps65910rtc_driver); -+} -+module_exit(tps65910_rtc_exit); -+ -+MODULE_ALIAS("platform:tps65910_rtc"); -+MODULE_AUTHOR("Umesh K <umeshk@mistralsolutions.com"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c -index c80105b..1d9cf0c 100644 ---- a/drivers/usb/host/ehci-hub.c -+++ b/drivers/usb/host/ehci-hub.c -@@ -468,7 +468,8 @@ static int check_reset_complete ( - index + 1); - - // what happens if HCS_N_CC(params) == 0 ? --#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) -+#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) && \ -+ !defined(CONFIG_MACH_CRANEBOARD) - port_status |= PORT_OWNER; - #endif - port_status &= ~PORT_RWC_BITS; -@@ -927,7 +928,8 @@ static int ehci_hub_control ( - ehci_dbg (ehci, - "port %d low speed --> companion\n", - wIndex + 1); --#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) -+#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) && \ -+ !defined(CONFIG_MACH_CRANEBOARD) - temp |= PORT_OWNER; - #endif - } else { -@@ -978,7 +980,8 @@ error_exit: - - static void ehci_relinquish_port(struct usb_hcd *hcd, int portnum) - { --#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) -+#if !defined(CONFIG_MACH_OMAP3EVM) && !defined(CONFIG_MACH_OMAP3517EVM) && \ -+ !defined(CONFIG_MACH_CRANEBOARD) - struct ehci_hcd *ehci = hcd_to_ehci(hcd); - - if (ehci_is_TDI(ehci)) -diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig -index dd1edfd..5ac688d 100644 ---- a/drivers/usb/musb/Kconfig -+++ b/drivers/usb/musb/Kconfig -@@ -10,7 +10,7 @@ comment "Enable Host or Gadget support to see Inventra options" - config USB_MUSB_HDRC - depends on (USB || USB_GADGET) - depends on (ARM || (BF54x && !BF544) || (BF52x && !BF522 && !BF523)) -- select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN || MACH_OMAP3517EVM) -+ select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN || MACH_OMAP3517EVM || MACH_CRANEBOARD) - select TWL4030_USB if MACH_OMAP_3430SDP - select USB_OTG_UTILS - tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)' -@@ -152,7 +152,7 @@ config MUSB_PIO_ONLY - - config USB_INVENTRA_DMA - bool -- depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY && !MACH_OMAP3517EVM -+ depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY && !MACH_OMAP3517EVM && !MACH_CRANEBOARD - default ARCH_OMAP2430 || ARCH_OMAP34XX || BLACKFIN - help - Enable DMA transfers using Mentor's engine. -@@ -182,7 +182,7 @@ config USB_TI_CPPI_DMA - config USB_TI_CPPI41_DMA - bool - depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY -- default ARCH_DAVINCI_DA830 || MACH_OMAP3517EVM -+ default ARCH_DAVINCI_DA830 || MACH_OMAP3517EVM || MACH_CRANEBOARD - select CPPI41 - help - Enable DMA transfers when TI CPPI 4.1 DMA is available. -diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile -index 01de383..daf3415 100644 ---- a/drivers/usb/musb/Makefile -+++ b/drivers/usb/musb/Makefile -@@ -19,7 +19,8 @@ ifeq ($(CONFIG_ARCH_OMAP2430),y) - endif - - ifeq ($(CONFIG_ARCH_OMAP3430),y) -- ifeq ($(CONFIG_MACH_OMAP3517EVM),y) -+ -+ ifeq ($(CONFIG_MACH_CRANEBOARD),y) - musb_hdrc-objs += am3517.o - else - musb_hdrc-objs += omap2430.o -diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c -index 98874c5..71ec7e8 100644 ---- a/drivers/usb/musb/musb_core.c -+++ b/drivers/usb/musb/musb_core.c -@@ -1019,7 +1019,7 @@ static void musb_shutdown(struct platform_device *pdev) - */ - #if defined(CONFIG_USB_TUSB6010) || \ - defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX) || \ -- defined(CONFIG_MACH_OMAP3517EVM) -+ defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) - static ushort __initdata fifo_mode = 4; - #else - static ushort __initdata fifo_mode = 2; -diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h -index 0b19d0b..d7850c7 100644 ---- a/drivers/usb/musb/musb_core.h -+++ b/drivers/usb/musb/musb_core.h -@@ -380,7 +380,7 @@ struct musb { - void __iomem *sync_va; - #endif - --#ifdef CONFIG_MACH_OMAP3517EVM -+#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) - /* Backup registers required for the workaround of AM3517 bytewise - * read issue. FADDR, POWER, INTRTXE, INTRRXE and INTRUSBE register - * read would actually clear the interrupt registers and would cause -diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c -index c0e2efc..bb93de7 100644 ---- a/drivers/usb/musb/musb_gadget.c -+++ b/drivers/usb/musb/musb_gadget.c -@@ -2024,7 +2024,7 @@ __acquires(musb->lock) - - - /* what speed did we negotiate? */ --#ifdef CONFIG_MACH_OMAP3517EVM -+#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) - musb->read_mask &= ~AM3517_READ_ISSUE_POWER; - #endif - power = musb_readb(mbase, MUSB_POWER); -diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c -index 7a9dc1e..bcc754d 100644 ---- a/drivers/usb/musb/musb_gadget_ep0.c -+++ b/drivers/usb/musb/musb_gadget_ep0.c -@@ -770,7 +770,7 @@ setup: - printk(KERN_NOTICE "%s: peripheral reset " - "irq lost!\n", - musb_driver_name); --#ifdef CONFIG_MACH_OMAP3517EVM -+#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) - musb->read_mask &= ~AM3517_READ_ISSUE_POWER; - #endif - power = musb_readb(mbase, MUSB_POWER); -diff --git a/drivers/usb/musb/musb_io.h b/drivers/usb/musb/musb_io.h -index 0969d88..e578061 100644 ---- a/drivers/usb/musb/musb_io.h -+++ b/drivers/usb/musb/musb_io.h -@@ -56,7 +56,8 @@ static inline void writesb(const void __iomem *addr, const void *buf, int len) - - #endif - --#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_MACH_OMAP3517EVM) -+#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_MACH_OMAP3517EVM) && \ -+ !defined(CONFIG_MACH_CRANEBOARD) - - /* NOTE: these offsets are all in bytes */ - -@@ -136,7 +137,7 @@ static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data) - static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data) - { bfin_write16(addr + offset, (u16) data); } - --#elif defined(CONFIG_MACH_OMAP3517EVM) -+#elif (defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD)) - - /* AM3517 has a limitation on read operation. Only 32 bit read is - * allowed and thus 8bit and 16bit read has to be handled differently -diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c -index 0200a62..c1570b6 100644 ---- a/drivers/usb/musb/musb_virthub.c -+++ b/drivers/usb/musb/musb_virthub.c -@@ -68,12 +68,12 @@ static void musb_port_suspend(struct musb *musb, bool do_suspend) - musb_writeb(mbase, MUSB_POWER, power); - - /* Needed for OPT A tests */ --#ifdef CONFIG_MACH_OMAP3517EVM -+#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) - musb->read_mask &= ~AM3517_READ_ISSUE_POWER; - #endif - power = musb_readb(mbase, MUSB_POWER); - while (power & MUSB_POWER_SUSPENDM) { --#ifdef CONFIG_MACH_OMAP3517EVM -+#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) - musb->read_mask &= ~AM3517_READ_ISSUE_POWER; - #endif - power = musb_readb(mbase, MUSB_POWER); -@@ -135,7 +135,7 @@ static void musb_port_reset(struct musb *musb, bool do_reset) - /* NOTE: caller guarantees it will turn off the reset when - * the appropriate amount of time has passed - */ --#ifdef CONFIG_MACH_OMAP3517EVM -+#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) - musb->read_mask &= ~AM3517_READ_ISSUE_POWER; - #endif - power = musb_readb(mbase, MUSB_POWER); -@@ -171,7 +171,7 @@ static void musb_port_reset(struct musb *musb, bool do_reset) - - musb->ignore_disconnect = false; - --#ifdef CONFIG_MACH_OMAP3517EVM -+#if defined(CONFIG_MACH_OMAP3517EVM) || defined(CONFIG_MACH_CRANEBOARD) - musb->read_mask &= ~AM3517_READ_ISSUE_POWER; - #endif - power = musb_readb(mbase, MUSB_POWER); -diff --git a/drivers/video/omap2/displays/panel-generic.c b/drivers/video/omap2/displays/panel-generic.c -index eb48d1a..ad9ecc2 100644 ---- a/drivers/video/omap2/displays/panel-generic.c -+++ b/drivers/video/omap2/displays/panel-generic.c -@@ -26,7 +26,11 @@ static struct omap_video_timings generic_panel_timings = { - /* 640 x 480 @ 60 Hz Reduced blanking VESA CVT 0.31M3-R */ - .x_res = 640, - .y_res = 480, -+#ifdef CONFIG_MACH_CRANEBOARD -+ .pixel_clock = 24000, -+#else - .pixel_clock = 23500, -+#endif - .hfp = 48, - .hsw = 32, - .hbp = 80, -@@ -37,7 +41,12 @@ static struct omap_video_timings generic_panel_timings = { - - static int generic_panel_probe(struct omap_dss_device *dssdev) - { -+#ifdef CONFIG_MACH_CRANEBOARD -+ dssdev->panel.config = (OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | -+ OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC); -+#else - dssdev->panel.config = OMAP_DSS_LCD_TFT; -+#endif - dssdev->panel.timings = generic_panel_timings; - - return 0; -diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c -index 1127e85..8be116f 100644 ---- a/drivers/video/omap2/dss/venc.c -+++ b/drivers/video/omap2/dss/venc.c -@@ -292,7 +292,9 @@ static struct { - void __iomem *base; - struct mutex venc_lock; - u32 wss_data; -+#ifndef CONFIG_MACH_CRANEBOARD - struct regulator *vdda_dac_reg; -+#endif - } venc; - - static inline void venc_write_reg(int idx, u32 val) -@@ -503,13 +505,14 @@ int venc_init(struct platform_device *pdev) - return -ENOMEM; - } - -+#ifndef CONFIG_MACH_CRANEBOARD - venc.vdda_dac_reg = regulator_get(&pdev->dev, "vdda_dac"); - if (IS_ERR(venc.vdda_dac_reg)) { - iounmap(venc.base); - DSSERR("can't get VDDA_DAC regulator\n"); - return PTR_ERR(venc.vdda_dac_reg); - } -- -+#endif - venc_enable_clocks(1); - - rev_id = (u8)(venc_read_reg(VENC_REV_ID) & 0xff); -@@ -523,9 +526,9 @@ int venc_init(struct platform_device *pdev) - void venc_exit(void) - { - omap_dss_unregister_driver(&venc_driver); -- -+#ifndef CONFIG_MACH_CRANEBOARD - regulator_put(venc.vdda_dac_reg); -- -+#endif - iounmap(venc.base); - } - -@@ -576,8 +579,9 @@ static int venc_power_on(struct omap_dss_device *dssdev) - dispc_set_digit_size(dssdev->panel.timings.x_res, - dssdev->panel.timings.y_res/2); - -+#ifndef CONFIG_MACH_CRANEBOARD - regulator_enable(venc.vdda_dac_reg); -- -+#endif - if (dssdev->platform_enable) - dssdev->platform_enable(dssdev); - -@@ -604,8 +608,9 @@ static void venc_power_off(struct omap_dss_device *dssdev) - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - -+#ifndef CONFIG_MACH_CRANEBOARD - regulator_disable(venc.vdda_dac_reg); -- -+#endif - #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL - dsi_pll_uninit(); - dss_clk_disable(DSS_CLK_FCK2); -diff --git a/include/linux/i2c/tps65910.h b/include/linux/i2c/tps65910.h -new file mode 100644 -index 0000000..1362de4 ---- /dev/null -+++ b/include/linux/i2c/tps65910.h -@@ -0,0 +1,278 @@ -+/* linux/i2c/tps65910.h -+ * -+ * TPS65910 Power Management Device Definitions. -+ * -+ * Based on include/linux/i2c/twl.h -+ * -+ * Copyright (C) 2010 Mistral Solutions Pvt Ltd <www.mistralsolutions.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#ifndef __LINUX_I2C_TPS65910_H -+#define __LINUX_I2C_TPS65910_H -+ -+#define TPS65910_NUM_SLAVES 2 -+/* I2C Slave Address 7-bit */ -+#define TPS65910_I2C_ID0 0x2D /* general-purpose */ -+#define TPS65910_I2C_ID1 0x12 /* Smart Reflex */ -+ -+/* TPS65910 to host IRQ */ -+#define TPS65910_HOST_IRQ INT_34XX_SYS_NIRQ -+ -+/* TPS65910 MAX GPIOs */ -+#define TPS65910_GPIO_MAX 1 -+ -+/* -+ * ---------------------------------------------------------------------------- -+ * Registers, all 8 bits -+ * ---------------------------------------------------------------------------- -+ */ -+#define TPS65910_REG_SECONDS 0x00 -+#define TPS65910_REG_MINUTES 0x01 -+#define TPS65910_REG_HOURS 0x02 -+#define TPS65910_REG_DAYS 0x03 -+#define TPS65910_REG_MONTHS 0x04 -+#define TPS65910_REG_YEARS 0x05 -+#define TPS65910_REG_WEEKS 0x06 -+#define TPS65910_REG_ALARM_SECONDS 0x08 -+#define TPS65910_REG_ALARM_MINUTES 0x09 -+#define TPS65910_REG_ALARM_HOURS 0x0A -+#define TPS65910_REG_ALARM_DAYS 0x0B -+#define TPS65910_REG_ALARM_MONTHS 0x0C -+#define TPS65910_REG_ALARM_YEARS 0x0D -+ -+#define TPS65910_REG_RTC_CTRL 0x10 -+#define TPS65910_REG_RTC_STATUS 0x11 -+#define TPS65910_REG_RTC_INTERRUPTS 0x12 -+#define TPS65910_REG_RTC_COMP_LSB 0x13 -+#define TPS65910_REG_RTC_COMP_MSB 0x14 -+#define TPS65910_REG_RTC_RES_PROG 0x15 -+#define TPS65910_REG_RTC_RESET_STATUS 0x16 -+#define TPS65910_REG_BCK1 0x17 -+#define TPS65910_REG_BCK2 0x18 -+#define TPS65910_REG_BCK3 0x19 -+#define TPS65910_REG_BCK4 0x1A -+#define TPS65910_REG_BCK5 0x1B -+#define TPS65910_REG_PUADEN 0x1C -+#define TPS65910_REG_REF 0x1D -+#define TPS65910_REG_VRTC 0x1E -+ -+#define TPS65910_REG_VIO 0x20 -+#define TPS65910_REG_VDD1 0x21 -+#define TPS65910_REG_VDD1_OP 0x22 -+#define TPS65910_REG_VDD1_SR 0x23 -+#define TPS65910_REG_VDD2 0x24 -+#define TPS65910_REG_VDD2_OP 0x25 -+#define TPS65910_REG_VDD2_SR 0x26 -+#define TPS65910_REG_VDD3 0x27 -+ -+#define TPS65910_REG_VDIG1 0x30 -+#define TPS65910_REG_VDIG2 0x31 -+#define TPS65910_REG_VAUX1 0x32 -+#define TPS65910_REG_VAUX2 0x33 -+#define TPS65910_REG_VAUX33 0x34 -+#define TPS65910_REG_VMMC 0x35 -+#define TPS65910_REG_VPLL 0x36 -+#define TPS65910_REG_VDAC 0x37 -+#define TPS65910_REG_THERM 0x38 -+#define TPS65910_REG_BBCH 0x39 -+ -+#define TPS65910_REG_DCDCCTRL 0x3E -+#define TPS65910_REG_DEVCTRL 0x3F -+#define TPS65910_REG_DEVCTRL2 0x40 -+#define TPS65910_REG_SLEEP_KEEP_LDO_ON 0x41 -+#define TPS65910_REG_SLEEP_KEEP_RES_ON 0x42 -+#define TPS65910_REG_SLEEP_SET_LDO_OFF 0x43 -+#define TPS65910_REG_SLEEP_SET_RES_OFF 0x44 -+#define TPS65910_REG_EN1_LDO_ASS 0x45 -+#define TPS65910_REG_EN1_SMPS_ASS 0x46 -+#define TPS65910_REG_EN2_LDO_ASS 0x47 -+#define TPS65910_REG_EN2_SMPS_ASS 0x48 -+#define TPS65910_REG_EN3_LDO_ASS 0x49 -+#define TPS65910_REG_SPARE 0x4A -+ -+#define TPS65910_REG_INT_STS 0x50 -+#define TPS65910_REG_INT_MSK 0x51 -+#define TPS65910_REG_INT_STS2 0x52 -+#define TPS65910_REG_INT_MSK2 0x53 -+#define TPS65910_REG_INT_STS3 0x54 -+#define TPS65910_REG_INT_MSK3 0x55 -+ -+#define TPS65910_REG_GPIO0 0x60 -+ -+#define TPS65910_REG_JTAGVERNUM 0x80 -+ -+/* TPS65910 GPIO Specific flags */ -+#define TPS65910_GPIO_INT_FALLING 0 -+#define TPS65910_GPIO_INT_RISING 1 -+ -+#define TPS65910_DEBOUNCE_91_5_MS 0 -+#define TPS65910_DEBOUNCE_150_MS 1 -+ -+#define TPS65910_GPIO_PUDIS (1 << 3) -+#define TPS65910_GPIO_CFG_OUTPUT (1 << 2) -+ -+ -+ -+/* TPS65910 Interrupt events */ -+ -+/* RTC Driver */ -+#define TPS65910_RTC_ALARM_IT 0x80 -+#define TPS65910_RTC_PERIOD_IT 0x40 -+ -+/*Core Driver */ -+#define TPS65910_HOT_DIE_IT 0x20 -+#define TPS65910_PWRHOLD_IT 0x10 -+#define TPS65910_PWRON_LP_IT 0x08 -+#define TPS65910_PWRON_IT 0x04 -+#define TPS65910_VMBHI_IT 0x02 -+#define TPS65910_VMBGCH_IT 0x01 -+ -+/* GPIO driver */ -+#define TPS65910_GPIO_F_IT 0x02 -+#define TPS65910_GPIO_R_IT 0x01 -+ -+ -+#define TPS65910_VRTC_OFFMASK (1<<3) -+ -+/* Back-up battery charger control */ -+#define TPS65910_BBCHEN 0x01 -+ -+/* Back-up battery charger voltage */ -+#define TPS65910_BBSEL_3P0 0x00 -+#define TPS65910_BBSEL_2P52 0x02 -+#define TPS65910_BBSEL_3P15 0x04 -+#define TPS65910_BBSEL_VBAT 0x06 -+ -+/* DEVCTRL_REG flags */ -+#define TPS65910_RTC_PWDNN 0x40 -+#define TPS65910_CK32K_CTRL 0x20 -+#define TPS65910_SR_CTL_I2C_SEL 0x10 -+#define TPS65910_DEV_OFF_RST 0x08 -+#define TPS65910_DEV_ON 0x04 -+#define TPS65910_DEV_SLP 0x02 -+#define TPS65910_DEV_OFF 0x01 -+ -+/* DEVCTRL2_REG flags */ -+#define TPS65910_DEV2_TSLOT_LENGTH 0x30 -+#define TPS65910_DEV2_SLEEPSIG_POL 0x08 -+#define TPS65910_DEV2_PWON_LP_OFF 0x04 -+#define TPS65910_DEV2_PWON_LP_RST 0x02 -+#define TPS65910_DEV2_IT_POL 0x01 -+ -+/* TPS65910 SMPS/LDO's */ -+#define TPS65910_VIO 0 -+#define TPS65910_VDD1 1 -+#define TPS65910_VDD2 2 -+#define TPS65910_VDD3 3 -+/* LDOs */ -+#define TPS65910_VDIG1 4 -+#define TPS65910_VDIG2 5 -+#define TPS65910_VAUX33 6 -+#define TPS65910_VMMC 7 -+#define TPS65910_VAUX1 8 -+#define TPS65910_VAUX2 9 -+#define TPS65910_VDAC 10 -+#define TPS65910_VPLL 11 -+/* Internal LDO */ -+#define TPS65910_VRTC 12 -+ -+/* Number of step-down/up converters available */ -+#define TPS65910_NUM_DCDC 4 -+ -+/* Number of LDO voltage regulators available */ -+#define TPS65910_NUM_LDO 9 -+ -+/* Number of total regulators available */ -+#define TPS65910_NUM_REGULATOR (TPS65910_NUM_DCDC + TPS65910_NUM_LDO) -+ -+ -+/* Regulator Supply state */ -+#define SUPPLY_STATE_FLAG 0x03 -+/* OFF States */ -+#define TPS65910_REG_OFF_00 0x00 -+#define TPS65910_REG_OFF_10 0x02 -+/* OHP - on High Power */ -+#define TPS65910_REG_OHP 0x01 -+/* OLP - on Low Power */ -+#define TPS65910_REG_OLP 0x03 -+ -+#define TPS65910_MAX_IRQS 10 -+#define TPS65910_VMBDCH_IRQ 0 -+#define TPS65910_VMBHI_IRQ 1 -+#define TPS65910_PWRON_IRQ 2 -+#define TPS65910_PWRON_LP_IRQ 3 -+#define TPS65910_PWRHOLD_IRQ 4 -+#define TPS65910_HOTDIE_IRQ 5 -+#define TPS65910_RTC_ALARM_IRQ 6 -+#define TPS65910_RTC_PERIOD_IRQ 7 -+#define TPS65910_GPIO0_R_IRQ 8 -+#define TPS65910_GPIO0_F_IRQ 9 -+ -+/* TPS65910 has 1 GPIO */ -+struct tps65910_gpio { -+ u8 debounce; -+ u8 pullup_pulldown; -+ u8 gpio_config; /* Input or output */ -+ u8 gpio_val; /* Output value */ -+ int (*gpio_setup)(struct tps65910_gpio *pdata); -+ int (*gpio_taredown)(struct tps65910_gpio *pdata); -+}; -+ -+struct tps65910_platform_data { -+ -+ unsigned irq_num; /* TPS65910 to Host IRQ Number */ -+ struct tps65910_gpio *gpio; -+ -+ /* plaform specific data to be initialised in board file */ -+ struct regulator_init_data *vio; -+ struct regulator_init_data *vdd1; -+ struct regulator_init_data *vdd2; -+ struct regulator_init_data *vdd3; -+ struct regulator_init_data *vdig1; -+ struct regulator_init_data *vdig2; -+ struct regulator_init_data *vaux33; -+ struct regulator_init_data *vmmc; -+ struct regulator_init_data *vaux1; -+ struct regulator_init_data *vaux2; -+ struct regulator_init_data *vdac; -+ struct regulator_init_data *vpll; -+ -+ void (*handlers[TPS65910_MAX_IRQS]) (void *data); -+ /* Configure TP65910 to board specific usage*/ -+ int (*board_tps65910_config)(struct tps65910_platform_data *pdata); -+}; -+ -+int tps65910_enable_bbch(u8 voltage); -+int tps65910_disable_bbch(void); -+ -+int tps65910_remove_irq_work(int irq); -+int tps65910_add_irq_work(int irq, void (*handler)(void *data)); -+ -+int tps65910_i2c_write_u8(u8 slave_addr, u8 val, u8 reg); -+int tps65910_i2c_read_u8(u8 slave_addr, u8 *val, u8 reg); -+ -+int tps65910_i2c_write(u8 slave_addr, u8 *value, u8 reg, unsigned num_bytes); -+int tps65910_i2c_read(u8 slave_addr, u8 *value, u8 reg, unsigned num_bytes); -+ -+#endif /* __LINUX_I2C_TPS65910_H */ -+ --- -1.7.0.4 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-BeagleBoard-Adjust-USER-button-pin-for-xM.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-BeagleBoard-Adjust-USER-button-pin-for-xM.patch deleted file mode 100644 index a9c297d..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-BeagleBoard-Adjust-USER-button-pin-for-xM.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 1c63789190687e20ddbed3084e7ae893176d0dd6 Mon Sep 17 00:00:00 2001 -From: Jason Kridner <jkridner@beagleboard.org> -Date: Sat, 17 Jul 2010 14:28:22 -0500 -Subject: [PATCH] BeagleBoard: Adjust USER button pin for xM - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 1e8b77b..2677b41 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -854,6 +854,11 @@ static void __init omap3_beagle_init(void) - { - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap3_beagle_i2c_init(); -+ -+ if (cpu_is_omap3630()) { -+ gpio_buttons[0].gpio = 4; -+ } -+ - platform_add_devices(omap3_beagle_devices, - ARRAY_SIZE(omap3_beagle_devices)); - omap_serial_init(); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-OMAP3-craneboard-print-expansionboard-name-detected-.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-OMAP3-craneboard-print-expansionboard-name-detected-.patch deleted file mode 100644 index be7c4d7..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-OMAP3-craneboard-print-expansionboard-name-detected-.patch +++ /dev/null @@ -1,51 +0,0 @@ -From e618eb6ab097d2f655ee6094d5e3c0dc603d7242 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 19 Jan 2011 16:30:06 +0100 -Subject: [PATCH 1/2] OMAP3: craneboard: print expansionboard name detected from uboot - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-am3517crane.c | 13 +++++++++++++ - 1 files changed, 13 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c -index 0bf4f60..300a79d 100644 ---- a/arch/arm/mach-omap2/board-am3517crane.c -+++ b/arch/arm/mach-omap2/board-am3517crane.c -@@ -55,6 +55,8 @@ - - #define NAND_BLOCK_SIZE SZ_128K - -+char expansionboard_name[16]; -+ - static struct mtd_partition am3517crane_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -724,6 +726,15 @@ static struct am3517_hsmmc_info mmc[] = { - {} /* Terminator */ - }; - -+static int __init expansionboard_setup(char *str) -+{ -+ if (!str) -+ return -EINVAL; -+ strncpy(expansionboard_name, str, 16); -+ printk(KERN_INFO "Crane expansionboard: %s\n", expansionboard_name); -+ return 0; -+} -+ - static void __init am3517_crane_init(void) - { - -@@ -762,6 +773,8 @@ static void __init am3517_crane_map_io(void) - omap2_map_common_io(); - } - -+early_param("buddy", expansionboard_setup); -+ - MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") - .phys_io = 0x48000000, - .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-PSP-3.0.1.6-kernel-source-patched-with-OCF-Linux.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-PSP-3.0.1.6-kernel-source-patched-with-OCF-Linux.patch deleted file mode 100644 index 561670e..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-PSP-3.0.1.6-kernel-source-patched-with-OCF-Linux.patch +++ /dev/null @@ -1,88333 +0,0 @@ -From 8e1595675e4f2ad795faecb30e0657ac556913d1 Mon Sep 17 00:00:00 2001 -From: Greg Turner <gregturner@ti.com> -Date: Wed, 19 Jan 2011 16:19:37 +0100 -Subject: [PATCH] PSP 3.0.1.6 kernel source patched with OCF-Linux - ---- - crypto/Kconfig | 3 + - crypto/Makefile | 2 + - crypto/modules.builtin | 22 + - crypto/ocf/Config.in | 36 + - crypto/ocf/Kconfig | 119 + - crypto/ocf/Makefile | 124 + - crypto/ocf/README | 167 ++ - crypto/ocf/c7108/Makefile | 12 + - crypto/ocf/c7108/aes-7108.c | 839 ++++++ - crypto/ocf/c7108/aes-7108.h | 134 + - crypto/ocf/criov.c | 215 ++ - crypto/ocf/crypto.c | 1784 +++++++++++ - crypto/ocf/cryptocteon/Makefile | 17 + - crypto/ocf/cryptocteon/cavium_crypto.c | 2283 ++++++++++++++ - crypto/ocf/cryptocteon/cryptocteon.c | 574 ++++ - crypto/ocf/cryptodev.c | 1061 +++++++ - crypto/ocf/cryptodev.h | 479 +++ - crypto/ocf/cryptosoft.c | 1210 ++++++++ - crypto/ocf/ep80579/Makefile | 119 + - crypto/ocf/ep80579/icp_asym.c | 1334 +++++++++ - crypto/ocf/ep80579/icp_common.c | 773 +++++ - crypto/ocf/ep80579/icp_ocf.h | 376 +++ - crypto/ocf/ep80579/icp_sym.c | 1153 ++++++++ - crypto/ocf/hifn/Makefile | 13 + - crypto/ocf/hifn/hifn7751.c | 2976 +++++++++++++++++++ - crypto/ocf/hifn/hifn7751reg.h | 540 ++++ - crypto/ocf/hifn/hifn7751var.h | 369 +++ - crypto/ocf/hifn/hifnHIPP.c | 420 +++ - crypto/ocf/hifn/hifnHIPPreg.h | 46 + - crypto/ocf/hifn/hifnHIPPvar.h | 93 + - crypto/ocf/ixp4xx/Makefile | 104 + - crypto/ocf/ixp4xx/ixp4xx.c | 1324 +++++++++ - crypto/ocf/kirkwood/Makefile | 19 + - crypto/ocf/kirkwood/cesa/AES/mvAes.h | 62 + - crypto/ocf/kirkwood/cesa/AES/mvAesAlg.c | 317 ++ - crypto/ocf/kirkwood/cesa/AES/mvAesAlg.h | 19 + - crypto/ocf/kirkwood/cesa/AES/mvAesApi.c | 312 ++ - crypto/ocf/kirkwood/cesa/mvCesa.c | 3126 ++++++++++++++++++++ - crypto/ocf/kirkwood/cesa/mvCesa.h | 412 +++ - crypto/ocf/kirkwood/cesa/mvCesaDebug.c | 484 +++ - crypto/ocf/kirkwood/cesa/mvCesaRegs.h | 357 +++ - crypto/ocf/kirkwood/cesa/mvCesaTest.c | 3096 +++++++++++++++++++ - crypto/ocf/kirkwood/cesa/mvLru.c | 158 + - crypto/ocf/kirkwood/cesa/mvLru.h | 112 + - crypto/ocf/kirkwood/cesa/mvMD5.c | 349 +++ - crypto/ocf/kirkwood/cesa/mvMD5.h | 93 + - crypto/ocf/kirkwood/cesa/mvSHA1.c | 239 ++ - crypto/ocf/kirkwood/cesa/mvSHA1.h | 88 + - crypto/ocf/kirkwood/cesa_ocf_drv.c | 1296 ++++++++ - crypto/ocf/kirkwood/mvHal/common/mv802_3.h | 213 ++ - crypto/ocf/kirkwood/mvHal/common/mvCommon.c | 277 ++ - crypto/ocf/kirkwood/mvHal/common/mvCommon.h | 308 ++ - crypto/ocf/kirkwood/mvHal/common/mvDebug.c | 326 ++ - crypto/ocf/kirkwood/mvHal/common/mvDebug.h | 178 ++ - crypto/ocf/kirkwood/mvHal/common/mvDeviceId.h | 225 ++ - crypto/ocf/kirkwood/mvHal/common/mvHalVer.h | 73 + - crypto/ocf/kirkwood/mvHal/common/mvStack.c | 100 + - crypto/ocf/kirkwood/mvHal/common/mvStack.h | 140 + - crypto/ocf/kirkwood/mvHal/common/mvTypes.h | 245 ++ - crypto/ocf/kirkwood/mvHal/dbg-trace.c | 110 + - crypto/ocf/kirkwood/mvHal/dbg-trace.h | 24 + - .../mvHal/kw_family/boardEnv/mvBoardEnvLib.c | 2513 ++++++++++++++++ - .../mvHal/kw_family/boardEnv/mvBoardEnvLib.h | 376 +++ - .../mvHal/kw_family/boardEnv/mvBoardEnvSpec.c | 848 ++++++ - .../mvHal/kw_family/boardEnv/mvBoardEnvSpec.h | 262 ++ - crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.c | 320 ++ - crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.h | 99 + - .../mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.c | 296 ++ - .../mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.h | 203 ++ - .../mvHal/kw_family/ctrlEnv/mvCtrlEnvAsm.h | 98 + - .../mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.c | 1825 ++++++++++++ - .../mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.h | 185 ++ - .../mvHal/kw_family/ctrlEnv/mvCtrlEnvRegs.h | 419 +++ - .../mvHal/kw_family/ctrlEnv/mvCtrlEnvSpec.h | 257 ++ - .../mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.c | 1048 +++++++ - .../mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.h | 130 + - .../mvHal/kw_family/ctrlEnv/sys/mvAhbToMbusRegs.h | 143 + - .../kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.c | 1036 +++++++ - .../kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.h | 120 + - .../mvHal/kw_family/ctrlEnv/sys/mvCpuIfRegs.h | 304 ++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysAudio.c | 324 ++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysAudio.h | 123 + - .../mvHal/kw_family/ctrlEnv/sys/mvSysCesa.c | 382 +++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysCesa.h | 100 + - .../mvHal/kw_family/ctrlEnv/sys/mvSysDram.c | 348 +++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysDram.h | 80 + - .../mvHal/kw_family/ctrlEnv/sys/mvSysGbe.c | 658 ++++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysGbe.h | 113 + - .../mvHal/kw_family/ctrlEnv/sys/mvSysPex.c | 1697 +++++++++++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysPex.h | 348 +++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysSata.c | 430 +++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysSata.h | 128 + - .../mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.c | 427 +++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.h | 125 + - .../mvHal/kw_family/ctrlEnv/sys/mvSysTdm.c | 462 +++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysTdm.h | 106 + - .../kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.c | 591 ++++ - .../kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.h | 110 + - .../mvHal/kw_family/ctrlEnv/sys/mvSysUsb.c | 497 ++++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysUsb.h | 125 + - .../mvHal/kw_family/ctrlEnv/sys/mvSysXor.c | 662 +++++ - .../mvHal/kw_family/ctrlEnv/sys/mvSysXor.h | 140 + - .../ocf/kirkwood/mvHal/kw_family/device/mvDevice.c | 75 + - .../ocf/kirkwood/mvHal/kw_family/device/mvDevice.h | 74 + - .../kirkwood/mvHal/kw_family/device/mvDeviceRegs.h | 101 + - crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.c | 211 ++ - crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.h | 423 +++ - crypto/ocf/kirkwood/mvHal/linux_oss/mvOsSata.h | 158 + - crypto/ocf/kirkwood/mvHal/mvSysHwConfig.h | 375 +++ - crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.c | 376 +++ - crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.h | 121 + - .../ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmrRegs.h | 121 + - crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.c | 207 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.h | 213 ++ - .../ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.c | 143 + - .../ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.h | 151 + - crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.c | 1479 +++++++++ - crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.h | 191 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.c | 1599 ++++++++++ - crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.h | 179 ++ - .../kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfConfig.h | 192 ++ - .../kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfRegs.h | 306 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.c | 1855 ++++++++++++ - crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.h | 172 ++ - .../kirkwood/mvHal/mv_hal/ddr2/mvDramIfConfig.h | 157 + - .../ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfRegs.h | 423 +++ - .../mvHal/mv_hal/ddr2/mvDramIfStaticInit.h | 179 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.c | 1474 +++++++++ - crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.h | 192 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEth.c | 2952 ++++++++++++++++++ - .../ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.c | 748 +++++ - .../ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.h | 146 + - .../ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthGbe.h | 751 +++++ - .../ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthRegs.h | 700 +++++ - crypto/ocf/kirkwood/mvHal/mv_hal/eth/mvEth.h | 356 +++ - crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.c | 362 +++ - crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.h | 118 + - crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGppRegs.h | 116 + - crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.c | 669 +++++ - crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.h | 134 + - .../ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIfRegs.h | 245 ++ - .../mvHal/mv_hal/pci-if/pci_util/mvPciUtils.c | 1006 +++++++ - .../mvHal/mv_hal/pci-if/pci_util/mvPciUtils.h | 323 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.c | 1047 +++++++ - crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.h | 185 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPciRegs.h | 411 +++ - crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.c | 1143 +++++++ - crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.h | 168 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPexRegs.h | 751 +++++ - crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.c | 313 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.h | 82 + - crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.c | 1522 ++++++++++ - crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.h | 166 ++ - .../kirkwood/mvHal/mv_hal/sflash/mvSFlashSpec.h | 233 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.c | 576 ++++ - crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.h | 94 + - crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.c | 249 ++ - crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.h | 82 + - crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiSpec.h | 98 + - crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.c | 1023 +++++++ - crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.h | 121 + - crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsiSpec.h | 160 + - crypto/ocf/ocf-bench.c | 436 +++ - crypto/ocf/ocf-compat.h | 294 ++ - crypto/ocf/ocfnull/Makefile | 12 + - crypto/ocf/ocfnull/ocfnull.c | 203 ++ - crypto/ocf/pasemi/Makefile | 12 + - crypto/ocf/pasemi/pasemi.c | 1009 +++++++ - crypto/ocf/pasemi/pasemi_fnu.h | 410 +++ - crypto/ocf/random.c | 322 ++ - crypto/ocf/rndtest.c | 300 ++ - crypto/ocf/rndtest.h | 54 + - crypto/ocf/safe/Makefile | 12 + - crypto/ocf/safe/md5.c | 308 ++ - crypto/ocf/safe/md5.h | 76 + - crypto/ocf/safe/safe.c | 2288 ++++++++++++++ - crypto/ocf/safe/safereg.h | 421 +++ - crypto/ocf/safe/safevar.h | 230 ++ - crypto/ocf/safe/sha1.c | 279 ++ - crypto/ocf/safe/sha1.h | 72 + - crypto/ocf/talitos/Makefile | 12 + - crypto/ocf/talitos/talitos.c | 1359 +++++++++ - crypto/ocf/talitos/talitos_dev.h | 277 ++ - crypto/ocf/talitos/talitos_soft.h | 77 + - crypto/ocf/uio.h | 54 + - drivers/char/random.c | 65 + - fs/fcntl.c | 1 + - include/linux/miscdevice.h | 1 + - include/linux/random.h | 29 + - kernel/pid.c | 1 + - 190 files changed, 86748 insertions(+), 0 deletions(-) - create mode 100644 crypto/modules.builtin - create mode 100644 crypto/ocf/Config.in - create mode 100644 crypto/ocf/Kconfig - create mode 100644 crypto/ocf/Makefile - create mode 100644 crypto/ocf/README - create mode 100644 crypto/ocf/c7108/Makefile - create mode 100644 crypto/ocf/c7108/aes-7108.c - create mode 100644 crypto/ocf/c7108/aes-7108.h - create mode 100644 crypto/ocf/criov.c - create mode 100644 crypto/ocf/crypto.c - create mode 100644 crypto/ocf/cryptocteon/Makefile - create mode 100644 crypto/ocf/cryptocteon/cavium_crypto.c - create mode 100644 crypto/ocf/cryptocteon/cryptocteon.c - create mode 100644 crypto/ocf/cryptodev.c - create mode 100644 crypto/ocf/cryptodev.h - create mode 100644 crypto/ocf/cryptosoft.c - create mode 100644 crypto/ocf/ep80579/Makefile - create mode 100644 crypto/ocf/ep80579/icp_asym.c - create mode 100644 crypto/ocf/ep80579/icp_common.c - create mode 100644 crypto/ocf/ep80579/icp_ocf.h - create mode 100644 crypto/ocf/ep80579/icp_sym.c - create mode 100644 crypto/ocf/hifn/Makefile - create mode 100644 crypto/ocf/hifn/hifn7751.c - create mode 100644 crypto/ocf/hifn/hifn7751reg.h - create mode 100644 crypto/ocf/hifn/hifn7751var.h - create mode 100644 crypto/ocf/hifn/hifnHIPP.c - create mode 100644 crypto/ocf/hifn/hifnHIPPreg.h - create mode 100644 crypto/ocf/hifn/hifnHIPPvar.h - create mode 100644 crypto/ocf/ixp4xx/Makefile - create mode 100644 crypto/ocf/ixp4xx/ixp4xx.c - create mode 100644 crypto/ocf/kirkwood/Makefile - create mode 100644 crypto/ocf/kirkwood/cesa/AES/mvAes.h - create mode 100644 crypto/ocf/kirkwood/cesa/AES/mvAesAlg.c - create mode 100644 crypto/ocf/kirkwood/cesa/AES/mvAesAlg.h - create mode 100644 crypto/ocf/kirkwood/cesa/AES/mvAesApi.c - create mode 100644 crypto/ocf/kirkwood/cesa/mvCesa.c - create mode 100644 crypto/ocf/kirkwood/cesa/mvCesa.h - create mode 100644 crypto/ocf/kirkwood/cesa/mvCesaDebug.c - create mode 100644 crypto/ocf/kirkwood/cesa/mvCesaRegs.h - create mode 100644 crypto/ocf/kirkwood/cesa/mvCesaTest.c - create mode 100644 crypto/ocf/kirkwood/cesa/mvLru.c - create mode 100644 crypto/ocf/kirkwood/cesa/mvLru.h - create mode 100644 crypto/ocf/kirkwood/cesa/mvMD5.c - create mode 100644 crypto/ocf/kirkwood/cesa/mvMD5.h - create mode 100644 crypto/ocf/kirkwood/cesa/mvSHA1.c - create mode 100644 crypto/ocf/kirkwood/cesa/mvSHA1.h - create mode 100644 crypto/ocf/kirkwood/cesa_ocf_drv.c - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mv802_3.h - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvCommon.c - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvCommon.h - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvDebug.c - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvDebug.h - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvDeviceId.h - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvHalVer.h - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvStack.c - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvStack.h - create mode 100644 crypto/ocf/kirkwood/mvHal/common/mvTypes.h - create mode 100644 crypto/ocf/kirkwood/mvHal/dbg-trace.c - create mode 100644 crypto/ocf/kirkwood/mvHal/dbg-trace.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvLib.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvLib.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvSpec.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvSpec.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAsm.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvSpec.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbusRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIfRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysAudio.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysAudio.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysCesa.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysCesa.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysDram.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysDram.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysGbe.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysGbe.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSata.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSata.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTdm.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTdm.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysUsb.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysUsb.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysXor.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysXor.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/device/mvDevice.c - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/device/mvDevice.h - create mode 100644 crypto/ocf/kirkwood/mvHal/kw_family/device/mvDeviceRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.c - create mode 100644 crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/linux_oss/mvOsSata.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mvSysHwConfig.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmrRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfConfig.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfConfig.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfStaticInit.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEth.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthGbe.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/eth/mvEth.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGppRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIfRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPciRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPexRegs.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlashSpec.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiSpec.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.c - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.h - create mode 100644 crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsiSpec.h - create mode 100644 crypto/ocf/ocf-bench.c - create mode 100644 crypto/ocf/ocf-compat.h - create mode 100644 crypto/ocf/ocfnull/Makefile - create mode 100644 crypto/ocf/ocfnull/ocfnull.c - create mode 100644 crypto/ocf/pasemi/Makefile - create mode 100644 crypto/ocf/pasemi/pasemi.c - create mode 100644 crypto/ocf/pasemi/pasemi_fnu.h - create mode 100644 crypto/ocf/random.c - create mode 100644 crypto/ocf/rndtest.c - create mode 100644 crypto/ocf/rndtest.h - create mode 100644 crypto/ocf/safe/Makefile - create mode 100644 crypto/ocf/safe/md5.c - create mode 100644 crypto/ocf/safe/md5.h - create mode 100644 crypto/ocf/safe/safe.c - create mode 100644 crypto/ocf/safe/safereg.h - create mode 100644 crypto/ocf/safe/safevar.h - create mode 100644 crypto/ocf/safe/sha1.c - create mode 100644 crypto/ocf/safe/sha1.h - create mode 100644 crypto/ocf/talitos/Makefile - create mode 100644 crypto/ocf/talitos/talitos.c - create mode 100644 crypto/ocf/talitos/talitos_dev.h - create mode 100644 crypto/ocf/talitos/talitos_soft.h - create mode 100644 crypto/ocf/uio.h - -diff --git a/crypto/Kconfig b/crypto/Kconfig -index 81c185a..9f1c30f 100644 ---- a/crypto/Kconfig -+++ b/crypto/Kconfig -@@ -822,3 +822,6 @@ config CRYPTO_ANSI_CPRNG - source "drivers/crypto/Kconfig" - - endif # if CRYPTO -+ -+source "crypto/ocf/Kconfig" -+ -diff --git a/crypto/Makefile b/crypto/Makefile -index 9e8f619..79631fc 100644 ---- a/crypto/Makefile -+++ b/crypto/Makefile -@@ -85,6 +85,8 @@ obj-$(CONFIG_CRYPTO_ANSI_CPRNG) += ansi_cprng.o - obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o - obj-$(CONFIG_CRYPTO_GHASH) += ghash-generic.o - -+obj-$(CONFIG_OCF_OCF) += ocf/ -+ - # - # generic algorithms and the async_tx api - # -diff --git a/crypto/modules.builtin b/crypto/modules.builtin -new file mode 100644 -index 0000000..04825d1 ---- /dev/null -+++ b/crypto/modules.builtin -@@ -0,0 +1,22 @@ -+kernel/crypto/crypto.ko -+kernel/crypto/crypto_wq.ko -+kernel/crypto/crypto_algapi.ko -+kernel/crypto/aead.ko -+kernel/crypto/crypto_blkcipher.ko -+kernel/crypto/chainiv.ko -+kernel/crypto/eseqiv.ko -+kernel/crypto/crypto_hash.ko -+kernel/crypto/pcompress.ko -+kernel/crypto/cryptomgr.ko -+kernel/crypto/md5.ko -+kernel/crypto/ecb.ko -+kernel/crypto/cbc.ko -+kernel/crypto/des_generic.ko -+kernel/crypto/aes_generic.ko -+kernel/crypto/arc4.ko -+kernel/crypto/deflate.ko -+kernel/crypto/michael_mic.ko -+kernel/crypto/crc32c.ko -+kernel/crypto/lzo.ko -+kernel/crypto/rng.ko -+kernel/crypto/krng.ko -diff --git a/crypto/ocf/Config.in b/crypto/ocf/Config.in -new file mode 100644 -index 0000000..d722cba ---- /dev/null -+++ b/crypto/ocf/Config.in -@@ -0,0 +1,36 @@ -+############################################################################# -+ -+mainmenu_option next_comment -+comment 'OCF Configuration' -+tristate 'OCF (Open Cryptograhic Framework)' CONFIG_OCF_OCF -+dep_mbool ' enable fips RNG checks (fips check on RNG data before use)' \ -+ CONFIG_OCF_FIPS $CONFIG_OCF_OCF -+dep_mbool ' enable harvesting entropy for /dev/random' \ -+ CONFIG_OCF_RANDOMHARVEST $CONFIG_OCF_OCF -+dep_tristate ' cryptodev (user space support)' \ -+ CONFIG_OCF_CRYPTODEV $CONFIG_OCF_OCF -+dep_tristate ' cryptosoft (software crypto engine)' \ -+ CONFIG_OCF_CRYPTOSOFT $CONFIG_OCF_OCF -+dep_tristate ' safenet (HW crypto engine)' \ -+ CONFIG_OCF_SAFE $CONFIG_OCF_OCF -+dep_tristate ' IXP4xx (HW crypto engine)' \ -+ CONFIG_OCF_IXP4XX $CONFIG_OCF_OCF -+dep_mbool ' Enable IXP4xx HW to perform SHA1 and MD5 hashing (very slow)' \ -+ CONFIG_OCF_IXP4XX_SHA1_MD5 $CONFIG_OCF_IXP4XX -+dep_tristate ' hifn (HW crypto engine)' \ -+ CONFIG_OCF_HIFN $CONFIG_OCF_OCF -+dep_tristate ' talitos (HW crypto engine)' \ -+ CONFIG_OCF_TALITOS $CONFIG_OCF_OCF -+dep_tristate ' pasemi (HW crypto engine)' \ -+ CONFIG_OCF_PASEMI $CONFIG_OCF_OCF -+dep_tristate ' ep80579 (HW crypto engine)' \ -+ CONFIG_OCF_EP80579 $CONFIG_OCF_OCF -+dep_tristate ' Micronas c7108 (HW crypto engine)' \ -+ CONFIG_OCF_C7108 $CONFIG_OCF_OCF -+dep_tristate ' ocfnull (does no crypto)' \ -+ CONFIG_OCF_OCFNULL $CONFIG_OCF_OCF -+dep_tristate ' ocf-bench (HW crypto in-kernel benchmark)' \ -+ CONFIG_OCF_BENCH $CONFIG_OCF_OCF -+endmenu -+ -+############################################################################# -diff --git a/crypto/ocf/Kconfig b/crypto/ocf/Kconfig -new file mode 100644 -index 0000000..b9c24ff ---- /dev/null -+++ b/crypto/ocf/Kconfig -@@ -0,0 +1,119 @@ -+menu "OCF Configuration" -+ -+config OCF_OCF -+ tristate "OCF (Open Cryptograhic Framework)" -+ help -+ A linux port of the OpenBSD/FreeBSD crypto framework. -+ -+config OCF_RANDOMHARVEST -+ bool "crypto random --- harvest entropy for /dev/random" -+ depends on OCF_OCF -+ help -+ Includes code to harvest random numbers from devices that support it. -+ -+config OCF_FIPS -+ bool "enable fips RNG checks" -+ depends on OCF_OCF && OCF_RANDOMHARVEST -+ help -+ Run all RNG provided data through a fips check before -+ adding it /dev/random's entropy pool. -+ -+config OCF_CRYPTODEV -+ tristate "cryptodev (user space support)" -+ depends on OCF_OCF -+ help -+ The user space API to access crypto hardware. -+ -+config OCF_CRYPTOSOFT -+ tristate "cryptosoft (software crypto engine)" -+ depends on OCF_OCF -+ help -+ A software driver for the OCF framework that uses -+ the kernel CryptoAPI. -+ -+config OCF_SAFE -+ tristate "safenet (HW crypto engine)" -+ depends on OCF_OCF -+ help -+ A driver for a number of the safenet Excel crypto accelerators. -+ Currently tested and working on the 1141 and 1741. -+ -+config OCF_IXP4XX -+ tristate "IXP4xx (HW crypto engine)" -+ depends on OCF_OCF -+ help -+ XScale IXP4xx crypto accelerator driver. Requires the -+ Intel Access library. -+ -+config OCF_IXP4XX_SHA1_MD5 -+ bool "IXP4xx SHA1 and MD5 Hashing" -+ depends on OCF_IXP4XX -+ help -+ Allows the IXP4xx crypto accelerator to perform SHA1 and MD5 hashing. -+ Note: this is MUCH slower than using cryptosoft (software crypto engine). -+ -+config OCF_HIFN -+ tristate "hifn (HW crypto engine)" -+ depends on OCF_OCF -+ help -+ OCF driver for various HIFN based crypto accelerators. -+ (7951, 7955, 7956, 7751, 7811) -+ -+config OCF_HIFNHIPP -+ tristate "Hifn HIPP (HW packet crypto engine)" -+ depends on OCF_OCF -+ help -+ OCF driver for various HIFN (HIPP) based crypto accelerators -+ (7855) -+ -+config OCF_TALITOS -+ tristate "talitos (HW crypto engine)" -+ depends on OCF_OCF -+ help -+ OCF driver for Freescale's security engine (SEC/talitos). -+ -+config OCF_PASEMI -+ tristate "pasemi (HW crypto engine)" -+ depends on OCF_OCF && PPC_PASEMI -+ help -+ OCF driver for the PA Semi PWRficient DMA Engine -+ -+config OCF_EP80579 -+ tristate "ep80579 (HW crypto engine)" -+ depends on OCF_OCF -+ help -+ OCF driver for the Intel EP80579 Integrated Processor Product Line. -+ -+config OCF_CRYPTOCTEON -+ tristate "cryptocteon (HW crypto engine)" -+ depends on OCF_OCF -+ help -+ OCF driver for the Cavium OCTEON Processors. -+ -+config OCF_KIRKWOOD -+ tristate "kirkwood (HW crypto engine)" -+ depends on OCF_OCF -+ help -+ OCF driver for the Marvell Kirkwood (88F6xxx) Processors. -+ -+config OCF_C7108 -+ tristate "Micronas 7108 (HW crypto engine)" -+ depends on OCF_OCF -+ help -+ OCF driver for the Microna 7108 Cipher processors. -+ -+config OCF_OCFNULL -+ tristate "ocfnull (fake crypto engine)" -+ depends on OCF_OCF -+ help -+ OCF driver for measuring ipsec overheads (does no crypto) -+ -+config OCF_BENCH -+ tristate "ocf-bench (HW crypto in-kernel benchmark)" -+ depends on OCF_OCF -+ help -+ A very simple encryption test for the in-kernel interface -+ of OCF. Also includes code to benchmark the IXP Access library -+ for comparison. -+ -+endmenu -diff --git a/crypto/ocf/Makefile b/crypto/ocf/Makefile -new file mode 100644 -index 0000000..fa951f4 ---- /dev/null -+++ b/crypto/ocf/Makefile -@@ -0,0 +1,124 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+OCF_OBJS = crypto.o criov.o -+ -+ifdef CONFIG_OCF_RANDOMHARVEST -+ OCF_OBJS += random.o -+endif -+ -+ifdef CONFIG_OCF_FIPS -+ OCF_OBJS += rndtest.o -+endif -+ -+# Add in autoconf.h to get #defines for CONFIG_xxx -+AUTOCONF_H=$(ROOTDIR)/modules/autoconf.h -+ifeq ($(AUTOCONF_H), $(wildcard $(AUTOCONF_H))) -+ EXTRA_CFLAGS += -include $(AUTOCONF_H) -+ export EXTRA_CFLAGS -+endif -+ -+ifndef obj -+ obj ?= . -+ _obj = subdir -+ mod-subdirs := safe hifn ixp4xx talitos ocfnull -+ export-objs += crypto.o criov.o random.o -+ list-multi += ocf.o -+ _slash := -+else -+ _obj = obj -+ _slash := / -+endif -+ -+EXTRA_CFLAGS += -I$(obj)/. -+ -+obj-$(CONFIG_OCF_OCF) += ocf.o -+obj-$(CONFIG_OCF_CRYPTODEV) += cryptodev.o -+obj-$(CONFIG_OCF_CRYPTOSOFT) += cryptosoft.o -+obj-$(CONFIG_OCF_BENCH) += ocf-bench.o -+ -+$(_obj)-$(CONFIG_OCF_SAFE) += safe$(_slash) -+$(_obj)-$(CONFIG_OCF_HIFN) += hifn$(_slash) -+$(_obj)-$(CONFIG_OCF_IXP4XX) += ixp4xx$(_slash) -+$(_obj)-$(CONFIG_OCF_TALITOS) += talitos$(_slash) -+$(_obj)-$(CONFIG_OCF_PASEMI) += pasemi$(_slash) -+$(_obj)-$(CONFIG_OCF_EP80579) += ep80579$(_slash) -+$(_obj)-$(CONFIG_OCF_CRYPTOCTEON) += cryptocteon$(_slash) -+$(_obj)-$(CONFIG_OCF_KIRKWOOD) += kirkwood$(_slash) -+$(_obj)-$(CONFIG_OCF_OCFNULL) += ocfnull$(_slash) -+$(_obj)-$(CONFIG_OCF_C7108) += c7108$(_slash) -+ -+ocf-objs := $(OCF_OBJS) -+ -+$(list-multi) dummy1: $(ocf-objs) -+ $(LD) -r -o $@ $(ocf-objs) -+ -+.PHONY: -+clean: -+ rm -f *.o *.ko .*.o.flags .*.ko.cmd .*.o.cmd .*.mod.o.cmd *.mod.c -+ rm -f */*.o */*.ko */.*.o.cmd */.*.ko.cmd */.*.mod.o.cmd */*.mod.c */.*.o.flags -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -+# -+# release gen targets -+# -+ -+.PHONY: patch -+patch: -+ REL=`date +%Y%m%d`; \ -+ patch=ocf-linux-$$REL.patch; \ -+ patch24=ocf-linux-24-$$REL.patch; \ -+ patch26=ocf-linux-26-$$REL.patch; \ -+ ( \ -+ find . -name Makefile; \ -+ find . -name Config.in; \ -+ find . -name Kconfig; \ -+ find . -name README; \ -+ find . -name '*.[ch]' | grep -v '.mod.c'; \ -+ ) | while read t; do \ -+ diff -Nau /dev/null $$t | sed 's?^+++ \./?+++ linux/crypto/ocf/?'; \ -+ done > $$patch; \ -+ cat patches/linux-2.4.35-ocf.patch $$patch > $$patch24; \ -+ cat patches/linux-2.6.33-ocf.patch $$patch > $$patch26 -+ -+.PHONY: tarball -+tarball: -+ REL=`date +%Y%m%d`; RELDIR=/tmp/ocf-linux-$$REL; \ -+ CURDIR=`pwd`; \ -+ rm -rf /tmp/ocf-linux-$$REL*; \ -+ mkdir -p $$RELDIR/tools; \ -+ cp README* $$RELDIR; \ -+ cp patches/openss*.patch $$RELDIR; \ -+ cp patches/crypto-tools.patch $$RELDIR; \ -+ cp tools/[!C]* $$RELDIR/tools; \ -+ cd ..; \ -+ tar cvf $$RELDIR/ocf-linux.tar \ -+ --exclude=CVS \ -+ --exclude=.* \ -+ --exclude=*.o \ -+ --exclude=*.ko \ -+ --exclude=*.mod.* \ -+ --exclude=README* \ -+ --exclude=ocf-*.patch \ -+ --exclude=ocf/patches/openss*.patch \ -+ --exclude=ocf/patches/crypto-tools.patch \ -+ --exclude=ocf/tools \ -+ ocf; \ -+ gzip -9 $$RELDIR/ocf-linux.tar; \ -+ cd /tmp; \ -+ tar cvf ocf-linux-$$REL.tar ocf-linux-$$REL; \ -+ gzip -9 ocf-linux-$$REL.tar; \ -+ cd $$CURDIR/../../user; \ -+ rm -rf /tmp/crypto-tools-$$REL*; \ -+ tar cvf /tmp/crypto-tools-$$REL.tar \ -+ --exclude=CVS \ -+ --exclude=.* \ -+ --exclude=*.o \ -+ --exclude=cryptotest \ -+ --exclude=cryptokeytest \ -+ crypto-tools; \ -+ gzip -9 /tmp/crypto-tools-$$REL.tar -+ -diff --git a/crypto/ocf/README b/crypto/ocf/README -new file mode 100644 -index 0000000..ba0a7de ---- /dev/null -+++ b/crypto/ocf/README -@@ -0,0 +1,167 @@ -+README - ocf-linux-20100325 -+--------------------------- -+ -+This README provides instructions for getting ocf-linux compiled and -+operating in a generic linux environment. For other information you -+might like to visit the home page for this project: -+ -+ http://ocf-linux.sourceforge.net/ -+ -+Adding OCF to linux -+------------------- -+ -+ Not much in this file for now, just some notes. I usually build -+ the ocf support as modules but it can be built into the kernel as -+ well. To use it: -+ -+ * mknod /dev/crypto c 10 70 -+ -+ * to add OCF to your kernel source, you have two options. Apply -+ the kernel specific patch: -+ -+ cd linux-2.4*; gunzip < ocf-linux-24-XXXXXXXX.patch.gz | patch -p1 -+ cd linux-2.6*; gunzip < ocf-linux-26-XXXXXXXX.patch.gz | patch -p1 -+ -+ if you do one of the above, then you can proceed to the next step, -+ or you can do the above process by hand with using the patches against -+ linux-2.4.35 and 2.6.33 to include the ocf code under crypto/ocf. -+ Here's how to add it: -+ -+ for 2.4.35 (and later) -+ -+ cd linux-2.4.35/crypto -+ tar xvzf ocf-linux.tar.gz -+ cd .. -+ patch -p1 < crypto/ocf/patches/linux-2.4.35-ocf.patch -+ -+ for 2.6.23 (and later), find the kernel patch specific (or nearest) -+ to your kernel versions and then: -+ -+ cd linux-2.6.NN/crypto -+ tar xvzf ocf-linux.tar.gz -+ cd .. -+ patch -p1 < crypto/ocf/patches/linux-2.6.NN-ocf.patch -+ -+ It should be easy to take this patch and apply it to other more -+ recent versions of the kernels. The same patches should also work -+ relatively easily on kernels as old as 2.6.11 and 2.4.18. -+ -+ * under 2.4 if you are on a non-x86 platform, you may need to: -+ -+ cp linux-2.X.x/include/asm-i386/kmap_types.h linux-2.X.x/include/asm-YYY -+ -+ so that you can build the kernel crypto support needed for the cryptosoft -+ driver. -+ -+ * For simplicity you should enable all the crypto support in your kernel -+ except for the test driver. Likewise for the OCF options. Do not -+ enable OCF crypto drivers for HW that you do not have (for example -+ ixp4xx will not compile on non-Xscale systems). -+ -+ * make sure that cryptodev.h (from ocf-linux.tar.gz) is installed as -+ crypto/cryptodev.h in an include directory that is used for building -+ applications for your platform. For example on a host system that -+ might be: -+ -+ /usr/include/crypto/cryptodev.h -+ -+ * patch your openssl-0.9.8n code with the openssl-0.9.8n.patch. -+ (NOTE: there is no longer a need to patch ssh). The patch is against: -+ openssl-0_9_8e -+ -+ If you need a patch for an older version of openssl, you should look -+ to older OCF releases. This patch is unlikely to work on older -+ openssl versions. -+ -+ openssl-0.9.8n.patch -+ - enables --with-cryptodev for non BSD systems -+ - adds -cpu option to openssl speed for calculating CPU load -+ under linux -+ - fixes null pointer in openssl speed multi thread output. -+ - fixes test keys to work with linux crypto's more stringent -+ key checking. -+ - adds MD5/SHA acceleration (Ronen Shitrit), only enabled -+ with the --with-cryptodev-digests option -+ - fixes bug in engine code caching. -+ -+ * build crypto-tools-XXXXXXXX.tar.gz if you want to try some of the BSD -+ tools for testing OCF (ie., cryptotest). -+ -+How to load the OCF drivers -+--------------------------- -+ -+ First insert the base modules: -+ -+ insmod ocf -+ insmod cryptodev -+ -+ You can then install the software OCF driver with: -+ -+ insmod cryptosoft -+ -+ and one or more of the OCF HW drivers with: -+ -+ insmod safe -+ insmod hifn7751 -+ insmod ixp4xx -+ ... -+ -+ all the drivers take a debug option to enable verbose debug so that -+ you can see what is going on. For debug you load them as: -+ -+ insmod ocf crypto_debug=1 -+ insmod cryptodev cryptodev_debug=1 -+ insmod cryptosoft swcr_debug=1 -+ -+ You may load more than one OCF crypto driver but then there is no guarantee -+ as to which will be used. -+ -+ You can also enable debug at run time on 2.6 systems with the following: -+ -+ echo 1 > /sys/module/ocf/parameters/crypto_debug -+ echo 1 > /sys/module/cryptodev/parameters/cryptodev_debug -+ echo 1 > /sys/module/cryptosoft/parameters/swcr_debug -+ echo 1 > /sys/module/hifn7751/parameters/hifn_debug -+ echo 1 > /sys/module/safe/parameters/safe_debug -+ echo 1 > /sys/module/ixp4xx/parameters/ixp_debug -+ ... -+ -+Testing the OCF support -+----------------------- -+ -+ run "cryptotest", it should do a short test for a couple of -+ des packets. If it does everything is working. -+ -+ If this works, then ssh will use the driver when invoked as: -+ -+ ssh -c 3des username@host -+ -+ to see for sure that it is operating, enable debug as defined above. -+ -+ To get a better idea of performance run: -+ -+ cryptotest 100 4096 -+ -+ There are more options to cryptotest, see the help. -+ -+ It is also possible to use openssl to test the speed of the crypto -+ drivers. -+ -+ openssl speed -evp des -engine cryptodev -elapsed -+ openssl speed -evp des3 -engine cryptodev -elapsed -+ openssl speed -evp aes128 -engine cryptodev -elapsed -+ -+ and multiple threads (10) with: -+ -+ openssl speed -evp des -engine cryptodev -elapsed -multi 10 -+ openssl speed -evp des3 -engine cryptodev -elapsed -multi 10 -+ openssl speed -evp aes128 -engine cryptodev -elapsed -multi 10 -+ -+ for public key testing you can try: -+ -+ cryptokeytest -+ openssl speed -engine cryptodev rsa -elapsed -+ openssl speed -engine cryptodev dsa -elapsed -+ -+David McCullough -+david_mccullough@mcafee.com -diff --git a/crypto/ocf/c7108/Makefile b/crypto/ocf/c7108/Makefile -new file mode 100644 -index 0000000..e7e634b ---- /dev/null -+++ b/crypto/ocf/c7108/Makefile -@@ -0,0 +1,12 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+obj-$(CONFIG_OCF_C7108) += aes-7108.o -+ -+obj ?= . -+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/ -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/c7108/aes-7108.c b/crypto/ocf/c7108/aes-7108.c -new file mode 100644 -index 0000000..6dbc515 ---- /dev/null -+++ b/crypto/ocf/c7108/aes-7108.c -@@ -0,0 +1,839 @@ -+/* -+ * Copyright (C) 2006 Micronas USA -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored in part by the Defense Advanced Research Projects -+ * Agency (DARPA) and Air Force Research Laboratory, Air Force -+ * Materiel Command, USAF, under agreement number F30602-01-2-0537. -+ * -+ */ -+ -+//#include <linux/config.h> -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/sched.h> -+#include <linux/wait.h> -+#include <linux/crypto.h> -+#include <linux/mm.h> -+#include <linux/skbuff.h> -+#include <linux/random.h> -+#include <asm/io.h> -+#include <asm/delay.h> -+//#include <asm/scatterlist.h> -+#include <linux/scatterlist.h> -+#include <linux/dma-mapping.h> -+#include <linux/highmem.h> -+#include <cryptodev.h> -+#include <uio.h> -+#include <aes-7108.h> -+ -+/* Runtime mode */ -+static int c7108_crypto_mode = C7108_AES_CTRL_MODE_CTR; -+//static int c7108_crypto_mode = C7108_AES_CTRL_MODE_CBC; -+ -+static int32_t c7108_id = -1; -+static struct cipher_7108 **c7108_sessions = NULL; -+static u_int32_t c7108_sesnum = 0; -+static unsigned long iobar; -+ -+/* Crypto entry points */ -+static int c7108_process(void *, struct cryptop *, int); -+static int c7108_newsession(void *, u_int32_t *, struct cryptoini *); -+static int c7108_freesession(void *, u_int64_t); -+ -+/* Globals */ -+static int debug = 0; -+static spinlock_t csr_mutex; -+ -+/* Generic controller-based lock */ -+#define AES_LOCK()\ -+ spin_lock(&csr_mutex) -+#define AES_UNLOCK()\ -+ spin_unlock(&csr_mutex) -+ -+/* 7108 AES register access */ -+#define c7108_reg_wr8(a,d) iowrite8(d, (void*)(iobar+(a))) -+#define c7108_reg_wr16(a,d) iowrite16(d, (void*)(iobar+(a))) -+#define c7108_reg_wr32(a,d) iowrite32(d, (void*)(iobar+(a))) -+#define c7108_reg_rd8(a) ioread8((void*)(iobar+(a))) -+#define c7108_reg_rd16(a) ioread16((void*)(iobar+(a))) -+#define c7108_reg_rd32(a) ioread32((void*)(iobar+(a))) -+ -+static int -+c7108_xlate_key(int klen, u8* k8ptr, u32* k32ptr) -+{ -+ int i, nw=0; -+ nw = ((klen >= 256) ? 8 : (klen >= 192) ? 6 : 4); -+ for ( i = 0; i < nw; i++) { -+ k32ptr[i] = (k8ptr[i+3] << 24) | (k8ptr[i+2] << 16) | -+ (k8ptr[i+1] << 8) | k8ptr[i]; -+ -+ } -+ return 0; -+} -+ -+static int -+c7108_cache_key(int klen, u32* k32ptr, u8* k8ptr) -+{ -+ int i, nb=0; -+ u8* ptr = (u8*)k32ptr; -+ nb = ((klen >= 256) ? 32 : (klen >= 192) ? 24 : 16); -+ for ( i = 0; i < nb; i++) -+ k8ptr[i] = ptr[i]; -+ return 0; -+} -+ -+static int -+c7108_aes_setup_dma(u32 src, u32 dst, u32 len) -+{ -+ if (len < 16) { -+ printk("len < 16\n"); -+ return -10; -+ } -+ if (len % 16) { -+ printk("len not multiple of 16\n"); -+ return -11; -+ } -+ c7108_reg_wr16(C7108_AES_DMA_SRC0_LO, (u16) src); -+ c7108_reg_wr16(C7108_AES_DMA_SRC0_HI, (u16)((src & 0xffff0000) >> 16)); -+ c7108_reg_wr16(C7108_AES_DMA_DST0_LO, (u16) dst); -+ c7108_reg_wr16(C7108_AES_DMA_DST0_HI, (u16)((dst & 0xffff0000) >> 16)); -+ c7108_reg_wr16(C7108_AES_DMA_LEN, (u16) ((len / 16) - 1)); -+ -+ return 0; -+} -+ -+static int -+c7108_aes_set_hw_iv(u8 iv[16]) -+{ -+ c7108_reg_wr16(C7108_AES_IV0_LO, (u16) ((iv[1] << 8) | iv[0])); -+ c7108_reg_wr16(C7108_AES_IV0_HI, (u16) ((iv[3] << 8) | iv[2])); -+ c7108_reg_wr16(C7108_AES_IV1_LO, (u16) ((iv[5] << 8) | iv[4])); -+ c7108_reg_wr16(C7108_AES_IV1_HI, (u16) ((iv[7] << 8) | iv[6])); -+ c7108_reg_wr16(C7108_AES_IV2_LO, (u16) ((iv[9] << 8) | iv[8])); -+ c7108_reg_wr16(C7108_AES_IV2_HI, (u16) ((iv[11] << 8) | iv[10])); -+ c7108_reg_wr16(C7108_AES_IV3_LO, (u16) ((iv[13] << 8) | iv[12])); -+ c7108_reg_wr16(C7108_AES_IV3_HI, (u16) ((iv[15] << 8) | iv[14])); -+ -+ return 0; -+} -+ -+static void -+c7108_aes_read_dkey(u32 * dkey) -+{ -+ dkey[0] = (c7108_reg_rd16(C7108_AES_EKEY0_HI) << 16) | -+ c7108_reg_rd16(C7108_AES_EKEY0_LO); -+ dkey[1] = (c7108_reg_rd16(C7108_AES_EKEY1_HI) << 16) | -+ c7108_reg_rd16(C7108_AES_EKEY1_LO); -+ dkey[2] = (c7108_reg_rd16(C7108_AES_EKEY2_HI) << 16) | -+ c7108_reg_rd16(C7108_AES_EKEY2_LO); -+ dkey[3] = (c7108_reg_rd16(C7108_AES_EKEY3_HI) << 16) | -+ c7108_reg_rd16(C7108_AES_EKEY3_LO); -+ dkey[4] = (c7108_reg_rd16(C7108_AES_EKEY4_HI) << 16) | -+ c7108_reg_rd16(C7108_AES_EKEY4_LO); -+ dkey[5] = (c7108_reg_rd16(C7108_AES_EKEY5_HI) << 16) | -+ c7108_reg_rd16(C7108_AES_EKEY5_LO); -+ dkey[6] = (c7108_reg_rd16(C7108_AES_EKEY6_HI) << 16) | -+ c7108_reg_rd16(C7108_AES_EKEY6_LO); -+ dkey[7] = (c7108_reg_rd16(C7108_AES_EKEY7_HI) << 16) | -+ c7108_reg_rd16(C7108_AES_EKEY7_LO); -+} -+ -+static int -+c7108_aes_cipher(int op, -+ u32 dst, -+ u32 src, -+ u32 len, -+ int klen, -+ u16 mode, -+ u32 key[8], -+ u8 iv[16]) -+{ -+ int rv = 0, cnt=0; -+ u16 ctrl = 0, stat = 0; -+ -+ AES_LOCK(); -+ -+ /* Setup key length */ -+ if (klen == 128) { -+ ctrl |= C7108_AES_KEY_LEN_128; -+ } else if (klen == 192) { -+ ctrl |= C7108_AES_KEY_LEN_192; -+ } else if (klen == 256) { -+ ctrl |= C7108_AES_KEY_LEN_256; -+ } else { -+ AES_UNLOCK(); -+ return -3; -+ } -+ -+ /* Check opcode */ -+ if (C7108_AES_ENCRYPT == op) { -+ ctrl |= C7108_AES_ENCRYPT; -+ } else if (C7108_AES_DECRYPT == op) { -+ ctrl |= C7108_AES_DECRYPT; -+ } else { -+ AES_UNLOCK(); -+ return -4; -+ } -+ -+ /* check mode */ -+ if ( (mode != C7108_AES_CTRL_MODE_CBC) && -+ (mode != C7108_AES_CTRL_MODE_CFB) && -+ (mode != C7108_AES_CTRL_MODE_OFB) && -+ (mode != C7108_AES_CTRL_MODE_CTR) && -+ (mode != C7108_AES_CTRL_MODE_ECB) ) { -+ AES_UNLOCK(); -+ return -5; -+ } -+ -+ /* Now set mode */ -+ ctrl |= mode; -+ -+ /* For CFB, OFB, and CTR, neither backward key -+ * expansion nor key inversion is required. -+ */ -+ if ( (C7108_AES_DECRYPT == op) && -+ (C7108_AES_CTRL_MODE_CBC == mode || -+ C7108_AES_CTRL_MODE_ECB == mode ) ){ -+ -+ /* Program Key */ -+ c7108_reg_wr16(C7108_AES_KEY0_LO, (u16) key[4]); -+ c7108_reg_wr16(C7108_AES_KEY0_HI, (u16) (key[4] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY1_LO, (u16) key[5]); -+ c7108_reg_wr16(C7108_AES_KEY1_HI, (u16) (key[5] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY2_LO, (u16) key[6]); -+ c7108_reg_wr16(C7108_AES_KEY2_HI, (u16) (key[6] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY3_LO, (u16) key[7]); -+ c7108_reg_wr16(C7108_AES_KEY3_HI, (u16) (key[7] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY6_LO, (u16) key[2]); -+ c7108_reg_wr16(C7108_AES_KEY6_HI, (u16) (key[2] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY7_LO, (u16) key[3]); -+ c7108_reg_wr16(C7108_AES_KEY7_HI, (u16) (key[3] >> 16)); -+ -+ -+ if (192 == klen) { -+ c7108_reg_wr16(C7108_AES_KEY4_LO, (u16) key[7]); -+ c7108_reg_wr16(C7108_AES_KEY4_HI, (u16) (key[7] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY5_LO, (u16) key[7]); -+ c7108_reg_wr16(C7108_AES_KEY5_HI, (u16) (key[7] >> 16)); -+ -+ } else if (256 == klen) { -+ /* 256 */ -+ c7108_reg_wr16(C7108_AES_KEY4_LO, (u16) key[0]); -+ c7108_reg_wr16(C7108_AES_KEY4_HI, (u16) (key[0] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY5_LO, (u16) key[1]); -+ c7108_reg_wr16(C7108_AES_KEY5_HI, (u16) (key[1] >> 16)); -+ -+ } -+ -+ } else { -+ /* Program Key */ -+ c7108_reg_wr16(C7108_AES_KEY0_LO, (u16) key[0]); -+ c7108_reg_wr16(C7108_AES_KEY0_HI, (u16) (key[0] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY1_LO, (u16) key[1]); -+ c7108_reg_wr16(C7108_AES_KEY1_HI, (u16) (key[1] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY2_LO, (u16) key[2]); -+ c7108_reg_wr16(C7108_AES_KEY2_HI, (u16) (key[2] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY3_LO, (u16) key[3]); -+ c7108_reg_wr16(C7108_AES_KEY3_HI, (u16) (key[3] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY4_LO, (u16) key[4]); -+ c7108_reg_wr16(C7108_AES_KEY4_HI, (u16) (key[4] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY5_LO, (u16) key[5]); -+ c7108_reg_wr16(C7108_AES_KEY5_HI, (u16) (key[5] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY6_LO, (u16) key[6]); -+ c7108_reg_wr16(C7108_AES_KEY6_HI, (u16) (key[6] >> 16)); -+ c7108_reg_wr16(C7108_AES_KEY7_LO, (u16) key[7]); -+ c7108_reg_wr16(C7108_AES_KEY7_HI, (u16) (key[7] >> 16)); -+ -+ } -+ -+ /* Set IV always */ -+ c7108_aes_set_hw_iv(iv); -+ -+ /* Program DMA addresses */ -+ if ((rv = c7108_aes_setup_dma(src, dst, len)) < 0) { -+ AES_UNLOCK(); -+ return rv; -+ } -+ -+ -+ /* Start AES cipher */ -+ c7108_reg_wr16(C7108_AES_CTRL, ctrl | C7108_AES_GO); -+ -+ //printk("Ctrl: 0x%x\n", ctrl | C7108_AES_GO); -+ do { -+ /* TODO: interrupt mode */ -+ // printk("aes_stat=0x%x\n", stat); -+ //udelay(100); -+ } while ((cnt++ < 1000000) && -+ !((stat=c7108_reg_rd16(C7108_AES_CTRL))&C7108_AES_OP_DONE)); -+ -+ -+ if ((mode == C7108_AES_CTRL_MODE_ECB)|| -+ (mode == C7108_AES_CTRL_MODE_CBC)) { -+ /* Save out key when the lock is held ... */ -+ c7108_aes_read_dkey(key); -+ } -+ -+ AES_UNLOCK(); -+ return 0; -+ -+} -+ -+/* -+ * Generate a new crypto device session. -+ */ -+static int -+c7108_newsession(void *arg, u_int32_t *sid, struct cryptoini *cri) -+{ -+ struct cipher_7108 **swd; -+ u_int32_t i; -+ char *algo; -+ int mode, xfm_type; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid == NULL || cri == NULL) { -+ dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ if (c7108_sessions) { -+ for (i = 1; i < c7108_sesnum; i++) -+ if (c7108_sessions[i] == NULL) -+ break; -+ } else -+ i = 1; /* NB: to silence compiler warning */ -+ -+ if (c7108_sessions == NULL || i == c7108_sesnum) { -+ if (c7108_sessions == NULL) { -+ i = 1; /* We leave c7108_sessions[0] empty */ -+ c7108_sesnum = CRYPTO_SW_SESSIONS; -+ } else -+ c7108_sesnum *= 2; -+ -+ swd = kmalloc(c7108_sesnum * sizeof(struct cipher_7108 *), -+ GFP_ATOMIC); -+ if (swd == NULL) { -+ /* Reset session number */ -+ if (c7108_sesnum == CRYPTO_SW_SESSIONS) -+ c7108_sesnum = 0; -+ else -+ c7108_sesnum /= 2; -+ dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ memset(swd, 0, c7108_sesnum * sizeof(struct cipher_7108 *)); -+ -+ /* Copy existing sessions */ -+ if (c7108_sessions) { -+ memcpy(swd, c7108_sessions, -+ (c7108_sesnum / 2) * sizeof(struct cipher_7108 *)); -+ kfree(c7108_sessions); -+ } -+ -+ c7108_sessions = swd; -+ -+ } -+ -+ swd = &c7108_sessions[i]; -+ *sid = i; -+ -+ while (cri) { -+ *swd = (struct cipher_7108 *) -+ kmalloc(sizeof(struct cipher_7108), GFP_ATOMIC); -+ if (*swd == NULL) { -+ c7108_freesession(NULL, i); -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ memset(*swd, 0, sizeof(struct cipher_7108)); -+ -+ algo = NULL; -+ mode = 0; -+ xfm_type = HW_TYPE_CIPHER; -+ -+ switch (cri->cri_alg) { -+ -+ case CRYPTO_AES_CBC: -+ algo = "aes"; -+ mode = CRYPTO_TFM_MODE_CBC; -+ c7108_crypto_mode = C7108_AES_CTRL_MODE_CBC; -+ break; -+#if 0 -+ case CRYPTO_AES_CTR: -+ algo = "aes_ctr"; -+ mode = CRYPTO_TFM_MODE_CBC; -+ c7108_crypto_mode = C7108_AES_CTRL_MODE_CTR; -+ break; -+ case CRYPTO_AES_ECB: -+ algo = "aes_ecb"; -+ mode = CRYPTO_TFM_MODE_CBC; -+ c7108_crypto_mode = C7108_AES_CTRL_MODE_ECB; -+ break; -+ case CRYPTO_AES_OFB: -+ algo = "aes_ofb"; -+ mode = CRYPTO_TFM_MODE_CBC; -+ c7108_crypto_mode = C7108_AES_CTRL_MODE_OFB; -+ break; -+ case CRYPTO_AES_CFB: -+ algo = "aes_cfb"; -+ mode = CRYPTO_TFM_MODE_CBC; -+ c7108_crypto_mode = C7108_AES_CTRL_MODE_CFB; -+ break; -+#endif -+ default: -+ printk("unsupported crypto algorithm: %d\n", -+ cri->cri_alg); -+ return -EINVAL; -+ break; -+ } -+ -+ -+ if (!algo || !*algo) { -+ printk("cypher_7108_crypto: Unknown algo 0x%x\n", -+ cri->cri_alg); -+ c7108_freesession(NULL, i); -+ return EINVAL; -+ } -+ -+ if (xfm_type == HW_TYPE_CIPHER) { -+ if (debug) { -+ dprintk("%s key:", __FUNCTION__); -+ for (i = 0; i < (cri->cri_klen + 7) / 8; i++) -+ dprintk("%s0x%02x", (i % 8) ? " " : "\n ", -+ cri->cri_key[i]); -+ dprintk("\n"); -+ } -+ -+ } else if (xfm_type == SW_TYPE_HMAC || -+ xfm_type == SW_TYPE_HASH) { -+ printk("cypher_7108_crypto: HMAC unsupported!\n"); -+ return -EINVAL; -+ c7108_freesession(NULL, i); -+ } else { -+ printk("cypher_7108_crypto: " -+ "Unhandled xfm_type %d\n", xfm_type); -+ c7108_freesession(NULL, i); -+ return EINVAL; -+ } -+ -+ (*swd)->cri_alg = cri->cri_alg; -+ (*swd)->xfm_type = xfm_type; -+ -+ cri = cri->cri_next; -+ swd = &((*swd)->next); -+ } -+ return 0; -+} -+ -+/* -+ * Free a session. -+ */ -+static int -+c7108_freesession(void *arg, u_int64_t tid) -+{ -+ struct cipher_7108 *swd; -+ u_int32_t sid = CRYPTO_SESID2LID(tid); -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid > c7108_sesnum || c7108_sessions == NULL || -+ c7108_sessions[sid] == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return(EINVAL); -+ } -+ -+ /* Silently accept and return */ -+ if (sid == 0) -+ return(0); -+ -+ while ((swd = c7108_sessions[sid]) != NULL) { -+ c7108_sessions[sid] = swd->next; -+ kfree(swd); -+ } -+ return 0; -+} -+ -+/* -+ * Process a hardware request. -+ */ -+static int -+c7108_process(void *arg, struct cryptop *crp, int hint) -+{ -+ struct cryptodesc *crd; -+ struct cipher_7108 *sw; -+ u_int32_t lid; -+ int type; -+ u32 hwkey[8]; -+ -+#define SCATTERLIST_MAX 16 -+ struct scatterlist sg[SCATTERLIST_MAX]; -+ int sg_num, sg_len, skip; -+ struct sk_buff *skb = NULL; -+ struct uio *uiop = NULL; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ /* Sanity check */ -+ if (crp == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ crp->crp_etype = 0; -+ -+ if (crp->crp_desc == NULL || crp->crp_buf == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+ lid = crp->crp_sid & 0xffffffff; -+ if (lid >= c7108_sesnum || lid == 0 || c7108_sessions == NULL || -+ c7108_sessions[lid] == NULL) { -+ crp->crp_etype = ENOENT; -+ dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__); -+ goto done; -+ } -+ -+ /* -+ * do some error checking outside of the loop for SKB and IOV -+ * processing this leaves us with valid skb or uiop pointers -+ * for later -+ */ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ skb = (struct sk_buff *) crp->crp_buf; -+ if (skb_shinfo(skb)->nr_frags >= SCATTERLIST_MAX) { -+ printk("%s,%d: %d nr_frags > SCATTERLIST_MAX", -+ __FILE__, __LINE__, -+ skb_shinfo(skb)->nr_frags); -+ goto done; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ uiop = (struct uio *) crp->crp_buf; -+ if (uiop->uio_iovcnt > SCATTERLIST_MAX) { -+ printk("%s,%d: %d uio_iovcnt > SCATTERLIST_MAX", -+ __FILE__, __LINE__, -+ uiop->uio_iovcnt); -+ goto done; -+ } -+ } -+ -+ /* Go through crypto descriptors, processing as we go */ -+ for (crd = crp->crp_desc; crd; crd = crd->crd_next) { -+ /* -+ * Find the crypto context. -+ * -+ * XXX Note that the logic here prevents us from having -+ * XXX the same algorithm multiple times in a session -+ * XXX (or rather, we can but it won't give us the right -+ * XXX results). To do that, we'd need some way of differentiating -+ * XXX between the various instances of an algorithm (so we can -+ * XXX locate the correct crypto context). -+ */ -+ for (sw = c7108_sessions[lid]; -+ sw && sw->cri_alg != crd->crd_alg; -+ sw = sw->next) -+ ; -+ -+ /* No such context ? */ -+ if (sw == NULL) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ goto done; -+ } -+ -+ skip = crd->crd_skip; -+ -+ /* -+ * setup the SG list skip from the start of the buffer -+ */ -+ memset(sg, 0, sizeof(sg)); -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ int i, len; -+ type = CRYPTO_BUF_SKBUF; -+ -+ sg_num = 0; -+ sg_len = 0; -+ -+ if (skip < skb_headlen(skb)) { -+ //sg[sg_num].page = virt_to_page(skb->data + skip); -+ //sg[sg_num].offset = offset_in_page(skb->data + skip); -+ len = skb_headlen(skb) - skip; -+ if (len + sg_len > crd->crd_len) -+ len = crd->crd_len - sg_len; -+ //sg[sg_num].length = len; -+ sg_set_page(&sg[sg_num], virt_to_page(skb->data + skip), len, offset_in_page(skb->data + skip)); -+ sg_len += sg[sg_num].length; -+ sg_num++; -+ skip = 0; -+ } else -+ skip -= skb_headlen(skb); -+ -+ for (i = 0; sg_len < crd->crd_len && -+ i < skb_shinfo(skb)->nr_frags && -+ sg_num < SCATTERLIST_MAX; i++) { -+ if (skip < skb_shinfo(skb)->frags[i].size) { -+ //sg[sg_num].page = skb_shinfo(skb)->frags[i].page; -+ //sg[sg_num].offset = skb_shinfo(skb)->frags[i].page_offset + skip; -+ len = skb_shinfo(skb)->frags[i].size - skip; -+ if (len + sg_len > crd->crd_len) -+ len = crd->crd_len - sg_len; -+ //sg[sg_num].length = len; -+ sg_set_page(&sg[sg_num], skb_shinfo(skb)->frags[i].page, len, skb_shinfo(skb)->frags[i].page_offset + skip); -+ sg_len += sg[sg_num].length; -+ sg_num++; -+ skip = 0; -+ } else -+ skip -= skb_shinfo(skb)->frags[i].size; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ int len; -+ type = CRYPTO_BUF_IOV; -+ sg_len = 0; -+ for (sg_num = 0; sg_len < crd->crd_len && -+ sg_num < uiop->uio_iovcnt && -+ sg_num < SCATTERLIST_MAX; sg_num++) { -+ if (skip < uiop->uio_iov[sg_num].iov_len) { -+ //sg[sg_num].page = virt_to_page(uiop->uio_iov[sg_num].iov_base+skip); -+ //sg[sg_num].offset = offset_in_page(uiop->uio_iov[sg_num].iov_base+skip); -+ len = uiop->uio_iov[sg_num].iov_len - skip; -+ if (len + sg_len > crd->crd_len) -+ len = crd->crd_len - sg_len; -+ //sg[sg_num].length = len; -+ sg_set_page(&sg[sg_num], virt_to_page(uiop->uio_iov[sg_num].iov_base+skip), len, offset_in_page(uiop->uio_iov[sg_num].iov_base+skip)); -+ sg_len += sg[sg_num].length; -+ skip = 0; -+ } else -+ skip -= uiop->uio_iov[sg_num].iov_len; -+ } -+ } else { -+ type = CRYPTO_BUF_CONTIG; -+ //sg[0].page = virt_to_page(crp->crp_buf + skip); -+ //sg[0].offset = offset_in_page(crp->crp_buf + skip); -+ sg_len = (crp->crp_ilen - skip); -+ if (sg_len > crd->crd_len) -+ sg_len = crd->crd_len; -+ //sg[0].length = sg_len; -+ sg_set_page(&sg[0], virt_to_page(crp->crp_buf + skip), sg_len, offset_in_page(crp->crp_buf + skip)); -+ sg_num = 1; -+ } -+ -+ -+ switch (sw->xfm_type) { -+ -+ case HW_TYPE_CIPHER: { -+ -+ unsigned char iv[64]; -+ unsigned char *ivp = iv; -+ int i; -+ int ivsize = 16; /* fixed for AES */ -+ int blocksize = 16; /* fixed for AES */ -+ -+ if (sg_len < blocksize) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: EINVAL len %d < %d\n", -+ __FILE__, __LINE__, -+ sg_len, -+ blocksize); -+ goto done; -+ } -+ -+ if (ivsize > sizeof(iv)) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ goto done; -+ } -+ -+ if (crd->crd_flags & CRD_F_ENCRYPT) { /* encrypt */ -+ -+ if (crd->crd_flags & CRD_F_IV_EXPLICIT) { -+ ivp = crd->crd_iv; -+ } else { -+ get_random_bytes(ivp, ivsize); -+ } -+ /* -+ * do we have to copy the IV back to the buffer ? -+ */ -+ if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) { -+ crypto_copyback(crp->crp_buf, -+ crd->crd_inject, -+ ivsize, -+ (caddr_t)ivp); -+ } -+ -+ c7108_xlate_key(crd->crd_klen, -+ (u8*)crd->crd_key, (u32*)hwkey); -+ -+ /* Encrypt SG list */ -+ for (i = 0; i < sg_num; i++) { -+ sg[i].dma_address = -+ dma_map_single(NULL, -+ kmap(sg_page(&sg[i])) + sg[i].offset, sg_len, DMA_BIDIRECTIONAL); -+#if 0 -+ printk("sg[%d]:0x%08x, off 0x%08x " -+ "kmap 0x%08x phys 0x%08x\n", -+ i, sg[i].page, sg[i].offset, -+ kmap(sg[i].page) + sg[i].offset, -+ sg[i].dma_address); -+#endif -+ c7108_aes_cipher(C7108_AES_ENCRYPT, -+ sg[i].dma_address, -+ sg[i].dma_address, -+ sg_len, -+ crd->crd_klen, -+ c7108_crypto_mode, -+ hwkey, -+ ivp); -+ -+ if ((c7108_crypto_mode == C7108_AES_CTRL_MODE_CBC)|| -+ (c7108_crypto_mode == C7108_AES_CTRL_MODE_ECB)) { -+ /* Read back expanded key and cache it in key -+ * context. -+ * NOTE: for ECB/CBC modes only (not CTR, CFB, OFB) -+ * where you set the key once. -+ */ -+ c7108_cache_key(crd->crd_klen, -+ (u32*)hwkey, (u8*)crd->crd_key); -+#if 0 -+ printk("%s expanded key:", __FUNCTION__); -+ for (i = 0; i < (crd->crd_klen + 7) / 8; i++) -+ printk("%s0x%02x", (i % 8) ? " " : "\n ", -+ crd->crd_key[i]); -+ printk("\n"); -+#endif -+ } -+ } -+ } -+ else { /*decrypt */ -+ -+ if (crd->crd_flags & CRD_F_IV_EXPLICIT) { -+ ivp = crd->crd_iv; -+ } else { -+ crypto_copydata(crp->crp_buf, crd->crd_inject, -+ ivsize, (caddr_t)ivp); -+ } -+ -+ c7108_xlate_key(crd->crd_klen, -+ (u8*)crd->crd_key, (u32*)hwkey); -+ -+ /* Decrypt SG list */ -+ for (i = 0; i < sg_num; i++) { -+ sg[i].dma_address = -+ dma_map_single(NULL, -+ kmap(sg_page(&sg[i])) + sg[i].offset, -+ sg_len, DMA_BIDIRECTIONAL); -+ -+#if 0 -+ printk("sg[%d]:0x%08x, off 0x%08x " -+ "kmap 0x%08x phys 0x%08x\n", -+ i, sg[i].page, sg[i].offset, -+ kmap(sg[i].page) + sg[i].offset, -+ sg[i].dma_address); -+#endif -+ c7108_aes_cipher(C7108_AES_DECRYPT, -+ sg[i].dma_address, -+ sg[i].dma_address, -+ sg_len, -+ crd->crd_klen, -+ c7108_crypto_mode, -+ hwkey, -+ ivp); -+ } -+ } -+ } break; -+ case SW_TYPE_HMAC: -+ case SW_TYPE_HASH: -+ crp->crp_etype = EINVAL; -+ goto done; -+ break; -+ -+ case SW_TYPE_COMP: -+ crp->crp_etype = EINVAL; -+ goto done; -+ break; -+ -+ default: -+ /* Unknown/unsupported algorithm */ -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ } -+ -+done: -+ crypto_done(crp); -+ return 0; -+} -+ -+static struct { -+ softc_device_decl sc_dev; -+} a7108dev; -+ -+static device_method_t a7108_methods = { -+/* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, c7108_newsession), -+ DEVMETHOD(cryptodev_freesession, c7108_freesession), -+ DEVMETHOD(cryptodev_process, c7108_process), -+ DEVMETHOD(cryptodev_kprocess, NULL) -+}; -+ -+static int -+cypher_7108_crypto_init(void) -+{ -+ dprintk("%s(%p)\n", __FUNCTION__, cypher_7108_crypto_init); -+ -+ iobar = (unsigned long)ioremap(CCU_AES_REG_BASE, 0x4000); -+ printk("7108: AES @ 0x%08x (0x%08x phys) %s mode\n", -+ iobar, CCU_AES_REG_BASE, -+ c7108_crypto_mode & C7108_AES_CTRL_MODE_CBC ? "CBC" : -+ c7108_crypto_mode & C7108_AES_CTRL_MODE_ECB ? "ECB" : -+ c7108_crypto_mode & C7108_AES_CTRL_MODE_CTR ? "CTR" : -+ c7108_crypto_mode & C7108_AES_CTRL_MODE_CFB ? "CFB" : -+ c7108_crypto_mode & C7108_AES_CTRL_MODE_OFB ? "OFB" : "???"); -+ csr_mutex = SPIN_LOCK_UNLOCKED; -+ -+ memset(&a7108dev, 0, sizeof(a7108dev)); -+ softc_device_init(&a7108dev, "aes7108", 0, a7108_methods); -+ -+ c7108_id = crypto_get_driverid(softc_get_device(&a7108dev), CRYPTOCAP_F_HARDWARE); -+ if (c7108_id < 0) -+ panic("7108: crypto device cannot initialize!"); -+ -+// crypto_register(c7108_id, CRYPTO_AES_CBC, 0, 0, c7108_newsession, c7108_freesession, c7108_process, NULL); -+ crypto_register(c7108_id, CRYPTO_AES_CBC, 0, 0); -+ -+ return(0); -+} -+ -+static void -+cypher_7108_crypto_exit(void) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ crypto_unregister_all(c7108_id); -+ c7108_id = -1; -+} -+ -+module_init(cypher_7108_crypto_init); -+module_exit(cypher_7108_crypto_exit); -+ -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_DESCRIPTION("Cypher 7108 Crypto (OCF module for kernel crypto)"); -diff --git a/crypto/ocf/c7108/aes-7108.h b/crypto/ocf/c7108/aes-7108.h -new file mode 100644 -index 0000000..48711b4 ---- /dev/null -+++ b/crypto/ocf/c7108/aes-7108.h -@@ -0,0 +1,134 @@ -+/* -+ * Copyright (C) 2006 Micronas USA -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored in part by the Defense Advanced Research Projects -+ * Agency (DARPA) and Air Force Research Laboratory, Air Force -+ * Materiel Command, USAF, under agreement number F30602-01-2-0537. -+ * -+ */ -+ -+#ifndef __AES_7108_H__ -+#define __AES_7108_H__ -+ -+/* Cypher 7108 AES Controller Hardware */ -+#define CCU_REG_BASE 0x1b500000 -+#define CCU_AES_REG_BASE (CCU_REG_BASE + 0x100) -+#define C7108_AES_KEY0_LO (0x0000) -+#define C7108_AES_KEY0_HI (0x0004) -+#define C7108_AES_KEY1_LO (0x0008) -+#define C7108_AES_KEY1_HI (0x000c) -+#define C7108_AES_KEY2_LO (0x0010) -+#define C7108_AES_KEY2_HI (0x0014) -+#define C7108_AES_KEY3_LO (0x0018) -+#define C7108_AES_KEY3_HI (0x001c) -+#define C7108_AES_KEY4_LO (0x0020) -+#define C7108_AES_KEY4_HI (0x0024) -+#define C7108_AES_KEY5_LO (0x0028) -+#define C7108_AES_KEY5_HI (0x002c) -+#define C7108_AES_KEY6_LO (0x0030) -+#define C7108_AES_KEY6_HI (0x0034) -+#define C7108_AES_KEY7_LO (0x0038) -+#define C7108_AES_KEY7_HI (0x003c) -+#define C7108_AES_IV0_LO (0x0040) -+#define C7108_AES_IV0_HI (0x0044) -+#define C7108_AES_IV1_LO (0x0048) -+#define C7108_AES_IV1_HI (0x004c) -+#define C7108_AES_IV2_LO (0x0050) -+#define C7108_AES_IV2_HI (0x0054) -+#define C7108_AES_IV3_LO (0x0058) -+#define C7108_AES_IV3_HI (0x005c) -+ -+#define C7108_AES_DMA_SRC0_LO (0x0068) /* Bits 0:15 */ -+#define C7108_AES_DMA_SRC0_HI (0x006c) /* Bits 27:16 */ -+#define C7108_AES_DMA_DST0_LO (0x0070) /* Bits 0:15 */ -+#define C7108_AES_DMA_DST0_HI (0x0074) /* Bits 27:16 */ -+#define C7108_AES_DMA_LEN (0x0078) /*Bytes:(Count+1)x16 */ -+ -+/* AES/Copy engine control register */ -+#define C7108_AES_CTRL (0x007c) /* AES control */ -+#define C7108_AES_CTRL_RS (1<<0) /* Which set of src/dst to use */ -+ -+/* AES Cipher mode, controlled by setting Bits 2:0 */ -+#define C7108_AES_CTRL_MODE_CBC 0 -+#define C7108_AES_CTRL_MODE_CFB (1<<0) -+#define C7108_AES_CTRL_MODE_OFB (1<<1) -+#define C7108_AES_CTRL_MODE_CTR ((1<<0)|(1<<1)) -+#define C7108_AES_CTRL_MODE_ECB (1<<2) -+ -+/* AES Key length , Bits 5:4 */ -+#define C7108_AES_KEY_LEN_128 0 /* 00 */ -+#define C7108_AES_KEY_LEN_192 (1<<4) /* 01 */ -+#define C7108_AES_KEY_LEN_256 (1<<5) /* 10 */ -+ -+/* AES Operation (crypt/decrypt), Bit 3 */ -+#define C7108_AES_DECRYPT (1<<3) /* Clear for encrypt */ -+#define C7108_AES_ENCRYPT 0 -+#define C7108_AES_INTR (1<<13) /* Set on done trans from 0->1*/ -+#define C7108_AES_GO (1<<14) /* Run */ -+#define C7108_AES_OP_DONE (1<<15) /* Set when complete */ -+ -+ -+/* Expanded key registers */ -+#define C7108_AES_EKEY0_LO (0x0080) -+#define C7108_AES_EKEY0_HI (0x0084) -+#define C7108_AES_EKEY1_LO (0x0088) -+#define C7108_AES_EKEY1_HI (0x008c) -+#define C7108_AES_EKEY2_LO (0x0090) -+#define C7108_AES_EKEY2_HI (0x0094) -+#define C7108_AES_EKEY3_LO (0x0098) -+#define C7108_AES_EKEY3_HI (0x009c) -+#define C7108_AES_EKEY4_LO (0x00a0) -+#define C7108_AES_EKEY4_HI (0x00a4) -+#define C7108_AES_EKEY5_LO (0x00a8) -+#define C7108_AES_EKEY5_HI (0x00ac) -+#define C7108_AES_EKEY6_LO (0x00b0) -+#define C7108_AES_EKEY6_HI (0x00b4) -+#define C7108_AES_EKEY7_LO (0x00b8) -+#define C7108_AES_EKEY7_HI (0x00bc) -+#define C7108_AES_OK (0x00fc) /* Reset: "OK" */ -+ -+#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK) -+ -+/* Software session entry */ -+ -+#define HW_TYPE_CIPHER 0 -+#define SW_TYPE_HMAC 1 -+#define SW_TYPE_AUTH2 2 -+#define SW_TYPE_HASH 3 -+#define SW_TYPE_COMP 4 -+ -+struct cipher_7108 { -+ int xfm_type; -+ int cri_alg; -+ union { -+ struct { -+ char sw_key[HMAC_BLOCK_LEN]; -+ int sw_klen; -+ int sw_authlen; -+ } hmac; -+ } u; -+ struct cipher_7108 *next; -+}; -+ -+ -+ -+#endif /* __C7108_AES_7108_H__ */ -diff --git a/crypto/ocf/criov.c b/crypto/ocf/criov.c -new file mode 100644 -index 0000000..d04b984 ---- /dev/null -+++ b/crypto/ocf/criov.c -@@ -0,0 +1,215 @@ -+/* $OpenBSD: criov.c,v 1.9 2002/01/29 15:48:29 jason Exp $ */ -+ -+/* -+ * Linux port done by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * The license and original author are listed below. -+ * -+ * Copyright (c) 1999 Theo de Raadt -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+__FBSDID("$FreeBSD: src/sys/opencrypto/criov.c,v 1.5 2006/06/04 22:15:13 pjd Exp $"); -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/slab.h> -+#include <linux/uio.h> -+#include <linux/skbuff.h> -+#include <linux/kernel.h> -+#include <linux/mm.h> -+#include <asm/io.h> -+ -+#include <uio.h> -+#include <cryptodev.h> -+ -+/* -+ * This macro is only for avoiding code duplication, as we need to skip -+ * given number of bytes in the same way in three functions below. -+ */ -+#define CUIO_SKIP() do { \ -+ KASSERT(off >= 0, ("%s: off %d < 0", __func__, off)); \ -+ KASSERT(len >= 0, ("%s: len %d < 0", __func__, len)); \ -+ while (off > 0) { \ -+ KASSERT(iol >= 0, ("%s: empty in skip", __func__)); \ -+ if (off < iov->iov_len) \ -+ break; \ -+ off -= iov->iov_len; \ -+ iol--; \ -+ iov++; \ -+ } \ -+} while (0) -+ -+void -+cuio_copydata(struct uio* uio, int off, int len, caddr_t cp) -+{ -+ struct iovec *iov = uio->uio_iov; -+ int iol = uio->uio_iovcnt; -+ unsigned count; -+ -+ CUIO_SKIP(); -+ while (len > 0) { -+ KASSERT(iol >= 0, ("%s: empty", __func__)); -+ count = min((int)(iov->iov_len - off), len); -+ memcpy(cp, ((caddr_t)iov->iov_base) + off, count); -+ len -= count; -+ cp += count; -+ off = 0; -+ iol--; -+ iov++; -+ } -+} -+ -+void -+cuio_copyback(struct uio* uio, int off, int len, caddr_t cp) -+{ -+ struct iovec *iov = uio->uio_iov; -+ int iol = uio->uio_iovcnt; -+ unsigned count; -+ -+ CUIO_SKIP(); -+ while (len > 0) { -+ KASSERT(iol >= 0, ("%s: empty", __func__)); -+ count = min((int)(iov->iov_len - off), len); -+ memcpy(((caddr_t)iov->iov_base) + off, cp, count); -+ len -= count; -+ cp += count; -+ off = 0; -+ iol--; -+ iov++; -+ } -+} -+ -+/* -+ * Return a pointer to iov/offset of location in iovec list. -+ */ -+struct iovec * -+cuio_getptr(struct uio *uio, int loc, int *off) -+{ -+ struct iovec *iov = uio->uio_iov; -+ int iol = uio->uio_iovcnt; -+ -+ while (loc >= 0) { -+ /* Normal end of search */ -+ if (loc < iov->iov_len) { -+ *off = loc; -+ return (iov); -+ } -+ -+ loc -= iov->iov_len; -+ if (iol == 0) { -+ if (loc == 0) { -+ /* Point at the end of valid data */ -+ *off = iov->iov_len; -+ return (iov); -+ } else -+ return (NULL); -+ } else { -+ iov++, iol--; -+ } -+ } -+ -+ return (NULL); -+} -+ -+EXPORT_SYMBOL(cuio_copyback); -+EXPORT_SYMBOL(cuio_copydata); -+EXPORT_SYMBOL(cuio_getptr); -+ -+ -+static void -+skb_copy_bits_back(struct sk_buff *skb, int offset, caddr_t cp, int len) -+{ -+ int i; -+ if (offset < skb_headlen(skb)) { -+ memcpy(skb->data + offset, cp, min_t(int, skb_headlen(skb), len)); -+ len -= skb_headlen(skb); -+ cp += skb_headlen(skb); -+ } -+ offset -= skb_headlen(skb); -+ for (i = 0; len > 0 && i < skb_shinfo(skb)->nr_frags; i++) { -+ if (offset < skb_shinfo(skb)->frags[i].size) { -+ memcpy(page_address(skb_shinfo(skb)->frags[i].page) + -+ skb_shinfo(skb)->frags[i].page_offset, -+ cp, min_t(int, skb_shinfo(skb)->frags[i].size, len)); -+ len -= skb_shinfo(skb)->frags[i].size; -+ cp += skb_shinfo(skb)->frags[i].size; -+ } -+ offset -= skb_shinfo(skb)->frags[i].size; -+ } -+} -+ -+void -+crypto_copyback(int flags, caddr_t buf, int off, int size, caddr_t in) -+{ -+ -+ if ((flags & CRYPTO_F_SKBUF) != 0) -+ skb_copy_bits_back((struct sk_buff *)buf, off, in, size); -+ else if ((flags & CRYPTO_F_IOV) != 0) -+ cuio_copyback((struct uio *)buf, off, size, in); -+ else -+ bcopy(in, buf + off, size); -+} -+ -+void -+crypto_copydata(int flags, caddr_t buf, int off, int size, caddr_t out) -+{ -+ -+ if ((flags & CRYPTO_F_SKBUF) != 0) -+ skb_copy_bits((struct sk_buff *)buf, off, out, size); -+ else if ((flags & CRYPTO_F_IOV) != 0) -+ cuio_copydata((struct uio *)buf, off, size, out); -+ else -+ bcopy(buf + off, out, size); -+} -+ -+int -+crypto_apply(int flags, caddr_t buf, int off, int len, -+ int (*f)(void *, void *, u_int), void *arg) -+{ -+#if 0 -+ int error; -+ -+ if ((flags & CRYPTO_F_SKBUF) != 0) -+ error = XXXXXX((struct mbuf *)buf, off, len, f, arg); -+ else if ((flags & CRYPTO_F_IOV) != 0) -+ error = cuio_apply((struct uio *)buf, off, len, f, arg); -+ else -+ error = (*f)(arg, buf + off, len); -+ return (error); -+#else -+ KASSERT(0, ("crypto_apply not implemented!\n")); -+#endif -+ return 0; -+} -+ -+EXPORT_SYMBOL(crypto_copyback); -+EXPORT_SYMBOL(crypto_copydata); -+EXPORT_SYMBOL(crypto_apply); -+ -diff --git a/crypto/ocf/crypto.c b/crypto/ocf/crypto.c -new file mode 100644 -index 0000000..1adbaa7 ---- /dev/null -+++ b/crypto/ocf/crypto.c -@@ -0,0 +1,1784 @@ -+/*- -+ * Linux port done by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * The license and original author are listed below. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * Copyright (c) 2002-2006 Sam Leffler. All rights reserved. -+ * -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#if 0 -+#include <sys/cdefs.h> -+__FBSDID("$FreeBSD: src/sys/opencrypto/crypto.c,v 1.27 2007/03/21 03:42:51 sam Exp $"); -+#endif -+ -+/* -+ * Cryptographic Subsystem. -+ * -+ * This code is derived from the Openbsd Cryptographic Framework (OCF) -+ * that has the copyright shown below. Very little of the original -+ * code remains. -+ */ -+/*- -+ * The author of this code is Angelos D. Keromytis (angelos@cis.upenn.edu) -+ * -+ * This code was written by Angelos D. Keromytis in Athens, Greece, in -+ * February 2000. Network Security Technologies Inc. (NSTI) kindly -+ * supported the development of this code. -+ * -+ * Copyright (c) 2000, 2001 Angelos D. Keromytis -+ * -+ * Permission to use, copy, and modify this software with or without fee -+ * is hereby granted, provided that this entire notice is included in -+ * all source code copies of any software which is or includes a copy or -+ * modification of this software. -+ * -+ * THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR -+ * IMPLIED WARRANTY. IN PARTICULAR, NONE OF THE AUTHORS MAKES ANY -+ * REPRESENTATION OR WARRANTY OF ANY KIND CONCERNING THE -+ * MERCHANTABILITY OF THIS SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR -+ * PURPOSE. -+ * -+__FBSDID("$FreeBSD: src/sys/opencrypto/crypto.c,v 1.16 2005/01/07 02:29:16 imp Exp $"); -+ */ -+ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/wait.h> -+#include <linux/sched.h> -+#include <linux/spinlock.h> -+#include <linux/version.h> -+#include <cryptodev.h> -+ -+/* -+ * keep track of whether or not we have been initialised, a big -+ * issue if we are linked into the kernel and a driver gets started before -+ * us -+ */ -+static int crypto_initted = 0; -+ -+/* -+ * Crypto drivers register themselves by allocating a slot in the -+ * crypto_drivers table with crypto_get_driverid() and then registering -+ * each algorithm they support with crypto_register() and crypto_kregister(). -+ */ -+ -+/* -+ * lock on driver table -+ * we track its state as spin_is_locked does not do anything on non-SMP boxes -+ */ -+static spinlock_t crypto_drivers_lock; -+static int crypto_drivers_locked; /* for non-SMP boxes */ -+ -+#define CRYPTO_DRIVER_LOCK() \ -+ ({ \ -+ spin_lock_irqsave(&crypto_drivers_lock, d_flags); \ -+ crypto_drivers_locked = 1; \ -+ dprintk("%s,%d: DRIVER_LOCK()\n", __FILE__, __LINE__); \ -+ }) -+#define CRYPTO_DRIVER_UNLOCK() \ -+ ({ \ -+ dprintk("%s,%d: DRIVER_UNLOCK()\n", __FILE__, __LINE__); \ -+ crypto_drivers_locked = 0; \ -+ spin_unlock_irqrestore(&crypto_drivers_lock, d_flags); \ -+ }) -+#define CRYPTO_DRIVER_ASSERT() \ -+ ({ \ -+ if (!crypto_drivers_locked) { \ -+ dprintk("%s,%d: DRIVER_ASSERT!\n", __FILE__, __LINE__); \ -+ } \ -+ }) -+ -+/* -+ * Crypto device/driver capabilities structure. -+ * -+ * Synchronization: -+ * (d) - protected by CRYPTO_DRIVER_LOCK() -+ * (q) - protected by CRYPTO_Q_LOCK() -+ * Not tagged fields are read-only. -+ */ -+struct cryptocap { -+ device_t cc_dev; /* (d) device/driver */ -+ u_int32_t cc_sessions; /* (d) # of sessions */ -+ u_int32_t cc_koperations; /* (d) # os asym operations */ -+ /* -+ * Largest possible operator length (in bits) for each type of -+ * encryption algorithm. XXX not used -+ */ -+ u_int16_t cc_max_op_len[CRYPTO_ALGORITHM_MAX + 1]; -+ u_int8_t cc_alg[CRYPTO_ALGORITHM_MAX + 1]; -+ u_int8_t cc_kalg[CRK_ALGORITHM_MAX + 1]; -+ -+ int cc_flags; /* (d) flags */ -+#define CRYPTOCAP_F_CLEANUP 0x80000000 /* needs resource cleanup */ -+ int cc_qblocked; /* (q) symmetric q blocked */ -+ int cc_kqblocked; /* (q) asymmetric q blocked */ -+ -+ int cc_unqblocked; /* (q) symmetric q blocked */ -+ int cc_unkqblocked; /* (q) asymmetric q blocked */ -+}; -+static struct cryptocap *crypto_drivers = NULL; -+static int crypto_drivers_num = 0; -+ -+/* -+ * There are two queues for crypto requests; one for symmetric (e.g. -+ * cipher) operations and one for asymmetric (e.g. MOD)operations. -+ * A single mutex is used to lock access to both queues. We could -+ * have one per-queue but having one simplifies handling of block/unblock -+ * operations. -+ */ -+static int crp_sleep = 0; -+static LIST_HEAD(crp_q); /* request queues */ -+static LIST_HEAD(crp_kq); -+ -+static spinlock_t crypto_q_lock; -+ -+int crypto_all_qblocked = 0; /* protect with Q_LOCK */ -+module_param(crypto_all_qblocked, int, 0444); -+MODULE_PARM_DESC(crypto_all_qblocked, "Are all crypto queues blocked"); -+ -+int crypto_all_kqblocked = 0; /* protect with Q_LOCK */ -+module_param(crypto_all_kqblocked, int, 0444); -+MODULE_PARM_DESC(crypto_all_kqblocked, "Are all asym crypto queues blocked"); -+ -+#define CRYPTO_Q_LOCK() \ -+ ({ \ -+ spin_lock_irqsave(&crypto_q_lock, q_flags); \ -+ dprintk("%s,%d: Q_LOCK()\n", __FILE__, __LINE__); \ -+ }) -+#define CRYPTO_Q_UNLOCK() \ -+ ({ \ -+ dprintk("%s,%d: Q_UNLOCK()\n", __FILE__, __LINE__); \ -+ spin_unlock_irqrestore(&crypto_q_lock, q_flags); \ -+ }) -+ -+/* -+ * There are two queues for processing completed crypto requests; one -+ * for the symmetric and one for the asymmetric ops. We only need one -+ * but have two to avoid type futzing (cryptop vs. cryptkop). A single -+ * mutex is used to lock access to both queues. Note that this lock -+ * must be separate from the lock on request queues to insure driver -+ * callbacks don't generate lock order reversals. -+ */ -+static LIST_HEAD(crp_ret_q); /* callback queues */ -+static LIST_HEAD(crp_ret_kq); -+ -+static spinlock_t crypto_ret_q_lock; -+#define CRYPTO_RETQ_LOCK() \ -+ ({ \ -+ spin_lock_irqsave(&crypto_ret_q_lock, r_flags); \ -+ dprintk("%s,%d: RETQ_LOCK\n", __FILE__, __LINE__); \ -+ }) -+#define CRYPTO_RETQ_UNLOCK() \ -+ ({ \ -+ dprintk("%s,%d: RETQ_UNLOCK\n", __FILE__, __LINE__); \ -+ spin_unlock_irqrestore(&crypto_ret_q_lock, r_flags); \ -+ }) -+#define CRYPTO_RETQ_EMPTY() (list_empty(&crp_ret_q) && list_empty(&crp_ret_kq)) -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) -+static kmem_cache_t *cryptop_zone; -+static kmem_cache_t *cryptodesc_zone; -+#else -+static struct kmem_cache *cryptop_zone; -+static struct kmem_cache *cryptodesc_zone; -+#endif -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) -+#include <linux/sched.h> -+#define kill_proc(p,s,v) send_sig(s,find_task_by_vpid(p),0) -+#endif -+ -+#define debug crypto_debug -+int crypto_debug = 0; -+module_param(crypto_debug, int, 0644); -+MODULE_PARM_DESC(crypto_debug, "Enable debug"); -+EXPORT_SYMBOL(crypto_debug); -+ -+/* -+ * Maximum number of outstanding crypto requests before we start -+ * failing requests. We need this to prevent DOS when too many -+ * requests are arriving for us to keep up. Otherwise we will -+ * run the system out of memory. Since crypto is slow, we are -+ * usually the bottleneck that needs to say, enough is enough. -+ * -+ * We cannot print errors when this condition occurs, we are already too -+ * slow, printing anything will just kill us -+ */ -+ -+static int crypto_q_cnt = 0; -+module_param(crypto_q_cnt, int, 0444); -+MODULE_PARM_DESC(crypto_q_cnt, -+ "Current number of outstanding crypto requests"); -+ -+static int crypto_q_max = 1000; -+module_param(crypto_q_max, int, 0644); -+MODULE_PARM_DESC(crypto_q_max, -+ "Maximum number of outstanding crypto requests"); -+ -+#define bootverbose crypto_verbose -+static int crypto_verbose = 0; -+module_param(crypto_verbose, int, 0644); -+MODULE_PARM_DESC(crypto_verbose, -+ "Enable verbose crypto startup"); -+ -+int crypto_usercrypto = 1; /* userland may do crypto reqs */ -+module_param(crypto_usercrypto, int, 0644); -+MODULE_PARM_DESC(crypto_usercrypto, -+ "Enable/disable user-mode access to crypto support"); -+ -+int crypto_userasymcrypto = 1; /* userland may do asym crypto reqs */ -+module_param(crypto_userasymcrypto, int, 0644); -+MODULE_PARM_DESC(crypto_userasymcrypto, -+ "Enable/disable user-mode access to asymmetric crypto support"); -+ -+int crypto_devallowsoft = 0; /* only use hardware crypto */ -+module_param(crypto_devallowsoft, int, 0644); -+MODULE_PARM_DESC(crypto_devallowsoft, -+ "Enable/disable use of software crypto support"); -+ -+/* -+ * This parameter controls the maximum number of crypto operations to -+ * do consecutively in the crypto kernel thread before scheduling to allow -+ * other processes to run. Without it, it is possible to get into a -+ * situation where the crypto thread never allows any other processes to run. -+ * Default to 1000 which should be less than one second. -+ */ -+static int crypto_max_loopcount = 1000; -+module_param(crypto_max_loopcount, int, 0644); -+MODULE_PARM_DESC(crypto_max_loopcount, -+ "Maximum number of crypto ops to do before yielding to other processes"); -+ -+static pid_t cryptoproc = (pid_t) -1; -+static struct completion cryptoproc_exited; -+static DECLARE_WAIT_QUEUE_HEAD(cryptoproc_wait); -+static pid_t cryptoretproc = (pid_t) -1; -+static struct completion cryptoretproc_exited; -+static DECLARE_WAIT_QUEUE_HEAD(cryptoretproc_wait); -+ -+static int crypto_proc(void *arg); -+static int crypto_ret_proc(void *arg); -+static int crypto_invoke(struct cryptocap *cap, struct cryptop *crp, int hint); -+static int crypto_kinvoke(struct cryptkop *krp, int flags); -+static void crypto_exit(void); -+static int crypto_init(void); -+ -+static struct cryptostats cryptostats; -+ -+static struct cryptocap * -+crypto_checkdriver(u_int32_t hid) -+{ -+ if (crypto_drivers == NULL) -+ return NULL; -+ return (hid >= crypto_drivers_num ? NULL : &crypto_drivers[hid]); -+} -+ -+/* -+ * Compare a driver's list of supported algorithms against another -+ * list; return non-zero if all algorithms are supported. -+ */ -+static int -+driver_suitable(const struct cryptocap *cap, const struct cryptoini *cri) -+{ -+ const struct cryptoini *cr; -+ -+ /* See if all the algorithms are supported. */ -+ for (cr = cri; cr; cr = cr->cri_next) -+ if (cap->cc_alg[cr->cri_alg] == 0) -+ return 0; -+ return 1; -+} -+ -+/* -+ * Select a driver for a new session that supports the specified -+ * algorithms and, optionally, is constrained according to the flags. -+ * The algorithm we use here is pretty stupid; just use the -+ * first driver that supports all the algorithms we need. If there -+ * are multiple drivers we choose the driver with the fewest active -+ * sessions. We prefer hardware-backed drivers to software ones. -+ * -+ * XXX We need more smarts here (in real life too, but that's -+ * XXX another story altogether). -+ */ -+static struct cryptocap * -+crypto_select_driver(const struct cryptoini *cri, int flags) -+{ -+ struct cryptocap *cap, *best; -+ int match, hid; -+ -+ CRYPTO_DRIVER_ASSERT(); -+ -+ /* -+ * Look first for hardware crypto devices if permitted. -+ */ -+ if (flags & CRYPTOCAP_F_HARDWARE) -+ match = CRYPTOCAP_F_HARDWARE; -+ else -+ match = CRYPTOCAP_F_SOFTWARE; -+ best = NULL; -+again: -+ for (hid = 0; hid < crypto_drivers_num; hid++) { -+ cap = &crypto_drivers[hid]; -+ /* -+ * If it's not initialized, is in the process of -+ * going away, or is not appropriate (hardware -+ * or software based on match), then skip. -+ */ -+ if (cap->cc_dev == NULL || -+ (cap->cc_flags & CRYPTOCAP_F_CLEANUP) || -+ (cap->cc_flags & match) == 0) -+ continue; -+ -+ /* verify all the algorithms are supported. */ -+ if (driver_suitable(cap, cri)) { -+ if (best == NULL || -+ cap->cc_sessions < best->cc_sessions) -+ best = cap; -+ } -+ } -+ if (best != NULL) -+ return best; -+ if (match == CRYPTOCAP_F_HARDWARE && (flags & CRYPTOCAP_F_SOFTWARE)) { -+ /* sort of an Algol 68-style for loop */ -+ match = CRYPTOCAP_F_SOFTWARE; -+ goto again; -+ } -+ return best; -+} -+ -+/* -+ * Create a new session. The crid argument specifies a crypto -+ * driver to use or constraints on a driver to select (hardware -+ * only, software only, either). Whatever driver is selected -+ * must be capable of the requested crypto algorithms. -+ */ -+int -+crypto_newsession(u_int64_t *sid, struct cryptoini *cri, int crid) -+{ -+ struct cryptocap *cap; -+ u_int32_t hid, lid; -+ int err; -+ unsigned long d_flags; -+ -+ CRYPTO_DRIVER_LOCK(); -+ if ((crid & (CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE)) == 0) { -+ /* -+ * Use specified driver; verify it is capable. -+ */ -+ cap = crypto_checkdriver(crid); -+ if (cap != NULL && !driver_suitable(cap, cri)) -+ cap = NULL; -+ } else { -+ /* -+ * No requested driver; select based on crid flags. -+ */ -+ cap = crypto_select_driver(cri, crid); -+ /* -+ * if NULL then can't do everything in one session. -+ * XXX Fix this. We need to inject a "virtual" session -+ * XXX layer right about here. -+ */ -+ } -+ if (cap != NULL) { -+ /* Call the driver initialization routine. */ -+ hid = cap - crypto_drivers; -+ lid = hid; /* Pass the driver ID. */ -+ cap->cc_sessions++; -+ CRYPTO_DRIVER_UNLOCK(); -+ err = CRYPTODEV_NEWSESSION(cap->cc_dev, &lid, cri); -+ CRYPTO_DRIVER_LOCK(); -+ if (err == 0) { -+ (*sid) = (cap->cc_flags & 0xff000000) -+ | (hid & 0x00ffffff); -+ (*sid) <<= 32; -+ (*sid) |= (lid & 0xffffffff); -+ } else -+ cap->cc_sessions--; -+ } else -+ err = EINVAL; -+ CRYPTO_DRIVER_UNLOCK(); -+ return err; -+} -+ -+static void -+crypto_remove(struct cryptocap *cap) -+{ -+ CRYPTO_DRIVER_ASSERT(); -+ if (cap->cc_sessions == 0 && cap->cc_koperations == 0) -+ bzero(cap, sizeof(*cap)); -+} -+ -+/* -+ * Delete an existing session (or a reserved session on an unregistered -+ * driver). -+ */ -+int -+crypto_freesession(u_int64_t sid) -+{ -+ struct cryptocap *cap; -+ u_int32_t hid; -+ int err = 0; -+ unsigned long d_flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ CRYPTO_DRIVER_LOCK(); -+ -+ if (crypto_drivers == NULL) { -+ err = EINVAL; -+ goto done; -+ } -+ -+ /* Determine two IDs. */ -+ hid = CRYPTO_SESID2HID(sid); -+ -+ if (hid >= crypto_drivers_num) { -+ dprintk("%s - INVALID DRIVER NUM %d\n", __FUNCTION__, hid); -+ err = ENOENT; -+ goto done; -+ } -+ cap = &crypto_drivers[hid]; -+ -+ if (cap->cc_dev) { -+ CRYPTO_DRIVER_UNLOCK(); -+ /* Call the driver cleanup routine, if available, unlocked. */ -+ err = CRYPTODEV_FREESESSION(cap->cc_dev, sid); -+ CRYPTO_DRIVER_LOCK(); -+ } -+ -+ if (cap->cc_sessions) -+ cap->cc_sessions--; -+ -+ if (cap->cc_flags & CRYPTOCAP_F_CLEANUP) -+ crypto_remove(cap); -+ -+done: -+ CRYPTO_DRIVER_UNLOCK(); -+ return err; -+} -+ -+/* -+ * Return an unused driver id. Used by drivers prior to registering -+ * support for the algorithms they handle. -+ */ -+int32_t -+crypto_get_driverid(device_t dev, int flags) -+{ -+ struct cryptocap *newdrv; -+ int i; -+ unsigned long d_flags; -+ -+ if ((flags & (CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE)) == 0) { -+ printf("%s: no flags specified when registering driver\n", -+ device_get_nameunit(dev)); -+ return -1; -+ } -+ -+ CRYPTO_DRIVER_LOCK(); -+ -+ for (i = 0; i < crypto_drivers_num; i++) { -+ if (crypto_drivers[i].cc_dev == NULL && -+ (crypto_drivers[i].cc_flags & CRYPTOCAP_F_CLEANUP) == 0) { -+ break; -+ } -+ } -+ -+ /* Out of entries, allocate some more. */ -+ if (i == crypto_drivers_num) { -+ /* Be careful about wrap-around. */ -+ if (2 * crypto_drivers_num <= crypto_drivers_num) { -+ CRYPTO_DRIVER_UNLOCK(); -+ printk("crypto: driver count wraparound!\n"); -+ return -1; -+ } -+ -+ newdrv = kmalloc(2 * crypto_drivers_num * sizeof(struct cryptocap), -+ GFP_KERNEL); -+ if (newdrv == NULL) { -+ CRYPTO_DRIVER_UNLOCK(); -+ printk("crypto: no space to expand driver table!\n"); -+ return -1; -+ } -+ -+ memcpy(newdrv, crypto_drivers, -+ crypto_drivers_num * sizeof(struct cryptocap)); -+ memset(&newdrv[crypto_drivers_num], 0, -+ crypto_drivers_num * sizeof(struct cryptocap)); -+ -+ crypto_drivers_num *= 2; -+ -+ kfree(crypto_drivers); -+ crypto_drivers = newdrv; -+ } -+ -+ /* NB: state is zero'd on free */ -+ crypto_drivers[i].cc_sessions = 1; /* Mark */ -+ crypto_drivers[i].cc_dev = dev; -+ crypto_drivers[i].cc_flags = flags; -+ if (bootverbose) -+ printf("crypto: assign %s driver id %u, flags %u\n", -+ device_get_nameunit(dev), i, flags); -+ -+ CRYPTO_DRIVER_UNLOCK(); -+ -+ return i; -+} -+ -+/* -+ * Lookup a driver by name. We match against the full device -+ * name and unit, and against just the name. The latter gives -+ * us a simple widlcarding by device name. On success return the -+ * driver/hardware identifier; otherwise return -1. -+ */ -+int -+crypto_find_driver(const char *match) -+{ -+ int i, len = strlen(match); -+ unsigned long d_flags; -+ -+ CRYPTO_DRIVER_LOCK(); -+ for (i = 0; i < crypto_drivers_num; i++) { -+ device_t dev = crypto_drivers[i].cc_dev; -+ if (dev == NULL || -+ (crypto_drivers[i].cc_flags & CRYPTOCAP_F_CLEANUP)) -+ continue; -+ if (strncmp(match, device_get_nameunit(dev), len) == 0 || -+ strncmp(match, device_get_name(dev), len) == 0) -+ break; -+ } -+ CRYPTO_DRIVER_UNLOCK(); -+ return i < crypto_drivers_num ? i : -1; -+} -+ -+/* -+ * Return the device_t for the specified driver or NULL -+ * if the driver identifier is invalid. -+ */ -+device_t -+crypto_find_device_byhid(int hid) -+{ -+ struct cryptocap *cap = crypto_checkdriver(hid); -+ return cap != NULL ? cap->cc_dev : NULL; -+} -+ -+/* -+ * Return the device/driver capabilities. -+ */ -+int -+crypto_getcaps(int hid) -+{ -+ struct cryptocap *cap = crypto_checkdriver(hid); -+ return cap != NULL ? cap->cc_flags : 0; -+} -+ -+/* -+ * Register support for a key-related algorithm. This routine -+ * is called once for each algorithm supported a driver. -+ */ -+int -+crypto_kregister(u_int32_t driverid, int kalg, u_int32_t flags) -+{ -+ struct cryptocap *cap; -+ int err; -+ unsigned long d_flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ CRYPTO_DRIVER_LOCK(); -+ -+ cap = crypto_checkdriver(driverid); -+ if (cap != NULL && -+ (CRK_ALGORITM_MIN <= kalg && kalg <= CRK_ALGORITHM_MAX)) { -+ /* -+ * XXX Do some performance testing to determine placing. -+ * XXX We probably need an auxiliary data structure that -+ * XXX describes relative performances. -+ */ -+ -+ cap->cc_kalg[kalg] = flags | CRYPTO_ALG_FLAG_SUPPORTED; -+ if (bootverbose) -+ printf("crypto: %s registers key alg %u flags %u\n" -+ , device_get_nameunit(cap->cc_dev) -+ , kalg -+ , flags -+ ); -+ err = 0; -+ } else -+ err = EINVAL; -+ -+ CRYPTO_DRIVER_UNLOCK(); -+ return err; -+} -+ -+/* -+ * Register support for a non-key-related algorithm. This routine -+ * is called once for each such algorithm supported by a driver. -+ */ -+int -+crypto_register(u_int32_t driverid, int alg, u_int16_t maxoplen, -+ u_int32_t flags) -+{ -+ struct cryptocap *cap; -+ int err; -+ unsigned long d_flags; -+ -+ dprintk("%s(id=0x%x, alg=%d, maxoplen=%d, flags=0x%x)\n", __FUNCTION__, -+ driverid, alg, maxoplen, flags); -+ -+ CRYPTO_DRIVER_LOCK(); -+ -+ cap = crypto_checkdriver(driverid); -+ /* NB: algorithms are in the range [1..max] */ -+ if (cap != NULL && -+ (CRYPTO_ALGORITHM_MIN <= alg && alg <= CRYPTO_ALGORITHM_MAX)) { -+ /* -+ * XXX Do some performance testing to determine placing. -+ * XXX We probably need an auxiliary data structure that -+ * XXX describes relative performances. -+ */ -+ -+ cap->cc_alg[alg] = flags | CRYPTO_ALG_FLAG_SUPPORTED; -+ cap->cc_max_op_len[alg] = maxoplen; -+ if (bootverbose) -+ printf("crypto: %s registers alg %u flags %u maxoplen %u\n" -+ , device_get_nameunit(cap->cc_dev) -+ , alg -+ , flags -+ , maxoplen -+ ); -+ cap->cc_sessions = 0; /* Unmark */ -+ err = 0; -+ } else -+ err = EINVAL; -+ -+ CRYPTO_DRIVER_UNLOCK(); -+ return err; -+} -+ -+static void -+driver_finis(struct cryptocap *cap) -+{ -+ u_int32_t ses, kops; -+ -+ CRYPTO_DRIVER_ASSERT(); -+ -+ ses = cap->cc_sessions; -+ kops = cap->cc_koperations; -+ bzero(cap, sizeof(*cap)); -+ if (ses != 0 || kops != 0) { -+ /* -+ * If there are pending sessions, -+ * just mark as invalid. -+ */ -+ cap->cc_flags |= CRYPTOCAP_F_CLEANUP; -+ cap->cc_sessions = ses; -+ cap->cc_koperations = kops; -+ } -+} -+ -+/* -+ * Unregister a crypto driver. If there are pending sessions using it, -+ * leave enough information around so that subsequent calls using those -+ * sessions will correctly detect the driver has been unregistered and -+ * reroute requests. -+ */ -+int -+crypto_unregister(u_int32_t driverid, int alg) -+{ -+ struct cryptocap *cap; -+ int i, err; -+ unsigned long d_flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ CRYPTO_DRIVER_LOCK(); -+ -+ cap = crypto_checkdriver(driverid); -+ if (cap != NULL && -+ (CRYPTO_ALGORITHM_MIN <= alg && alg <= CRYPTO_ALGORITHM_MAX) && -+ cap->cc_alg[alg] != 0) { -+ cap->cc_alg[alg] = 0; -+ cap->cc_max_op_len[alg] = 0; -+ -+ /* Was this the last algorithm ? */ -+ for (i = 1; i <= CRYPTO_ALGORITHM_MAX; i++) -+ if (cap->cc_alg[i] != 0) -+ break; -+ -+ if (i == CRYPTO_ALGORITHM_MAX + 1) -+ driver_finis(cap); -+ err = 0; -+ } else -+ err = EINVAL; -+ CRYPTO_DRIVER_UNLOCK(); -+ return err; -+} -+ -+/* -+ * Unregister all algorithms associated with a crypto driver. -+ * If there are pending sessions using it, leave enough information -+ * around so that subsequent calls using those sessions will -+ * correctly detect the driver has been unregistered and reroute -+ * requests. -+ */ -+int -+crypto_unregister_all(u_int32_t driverid) -+{ -+ struct cryptocap *cap; -+ int err; -+ unsigned long d_flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ CRYPTO_DRIVER_LOCK(); -+ cap = crypto_checkdriver(driverid); -+ if (cap != NULL) { -+ driver_finis(cap); -+ err = 0; -+ } else -+ err = EINVAL; -+ CRYPTO_DRIVER_UNLOCK(); -+ -+ return err; -+} -+ -+/* -+ * Clear blockage on a driver. The what parameter indicates whether -+ * the driver is now ready for cryptop's and/or cryptokop's. -+ */ -+int -+crypto_unblock(u_int32_t driverid, int what) -+{ -+ struct cryptocap *cap; -+ int err; -+ unsigned long q_flags; -+ -+ CRYPTO_Q_LOCK(); -+ cap = crypto_checkdriver(driverid); -+ if (cap != NULL) { -+ if (what & CRYPTO_SYMQ) { -+ cap->cc_qblocked = 0; -+ cap->cc_unqblocked = 0; -+ crypto_all_qblocked = 0; -+ } -+ if (what & CRYPTO_ASYMQ) { -+ cap->cc_kqblocked = 0; -+ cap->cc_unkqblocked = 0; -+ crypto_all_kqblocked = 0; -+ } -+ if (crp_sleep) -+ wake_up_interruptible(&cryptoproc_wait); -+ err = 0; -+ } else -+ err = EINVAL; -+ CRYPTO_Q_UNLOCK(); //DAVIDM should this be a driver lock -+ -+ return err; -+} -+ -+/* -+ * Add a crypto request to a queue, to be processed by the kernel thread. -+ */ -+int -+crypto_dispatch(struct cryptop *crp) -+{ -+ struct cryptocap *cap; -+ int result = -1; -+ unsigned long q_flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ cryptostats.cs_ops++; -+ -+ CRYPTO_Q_LOCK(); -+ if (crypto_q_cnt >= crypto_q_max) { -+ CRYPTO_Q_UNLOCK(); -+ cryptostats.cs_drops++; -+ return ENOMEM; -+ } -+ crypto_q_cnt++; -+ -+ /* make sure we are starting a fresh run on this crp. */ -+ crp->crp_flags &= ~CRYPTO_F_DONE; -+ crp->crp_etype = 0; -+ -+ /* -+ * Caller marked the request to be processed immediately; dispatch -+ * it directly to the driver unless the driver is currently blocked. -+ */ -+ if ((crp->crp_flags & CRYPTO_F_BATCH) == 0) { -+ int hid = CRYPTO_SESID2HID(crp->crp_sid); -+ cap = crypto_checkdriver(hid); -+ /* Driver cannot disappear when there is an active session. */ -+ KASSERT(cap != NULL, ("%s: Driver disappeared.", __func__)); -+ if (!cap->cc_qblocked) { -+ crypto_all_qblocked = 0; -+ crypto_drivers[hid].cc_unqblocked = 1; -+ CRYPTO_Q_UNLOCK(); -+ result = crypto_invoke(cap, crp, 0); -+ CRYPTO_Q_LOCK(); -+ if (result == ERESTART) -+ if (crypto_drivers[hid].cc_unqblocked) -+ crypto_drivers[hid].cc_qblocked = 1; -+ crypto_drivers[hid].cc_unqblocked = 0; -+ } -+ } -+ if (result == ERESTART) { -+ /* -+ * The driver ran out of resources, mark the -+ * driver ``blocked'' for cryptop's and put -+ * the request back in the queue. It would -+ * best to put the request back where we got -+ * it but that's hard so for now we put it -+ * at the front. This should be ok; putting -+ * it at the end does not work. -+ */ -+ list_add(&crp->crp_next, &crp_q); -+ cryptostats.cs_blocks++; -+ result = 0; -+ } else if (result == -1) { -+ TAILQ_INSERT_TAIL(&crp_q, crp, crp_next); -+ result = 0; -+ } -+ if (crp_sleep) -+ wake_up_interruptible(&cryptoproc_wait); -+ CRYPTO_Q_UNLOCK(); -+ return result; -+} -+ -+/* -+ * Add an asymetric crypto request to a queue, -+ * to be processed by the kernel thread. -+ */ -+int -+crypto_kdispatch(struct cryptkop *krp) -+{ -+ int error; -+ unsigned long q_flags; -+ -+ cryptostats.cs_kops++; -+ -+ error = crypto_kinvoke(krp, krp->krp_crid); -+ if (error == ERESTART) { -+ CRYPTO_Q_LOCK(); -+ TAILQ_INSERT_TAIL(&crp_kq, krp, krp_next); -+ if (crp_sleep) -+ wake_up_interruptible(&cryptoproc_wait); -+ CRYPTO_Q_UNLOCK(); -+ error = 0; -+ } -+ return error; -+} -+ -+/* -+ * Verify a driver is suitable for the specified operation. -+ */ -+static __inline int -+kdriver_suitable(const struct cryptocap *cap, const struct cryptkop *krp) -+{ -+ return (cap->cc_kalg[krp->krp_op] & CRYPTO_ALG_FLAG_SUPPORTED) != 0; -+} -+ -+/* -+ * Select a driver for an asym operation. The driver must -+ * support the necessary algorithm. The caller can constrain -+ * which device is selected with the flags parameter. The -+ * algorithm we use here is pretty stupid; just use the first -+ * driver that supports the algorithms we need. If there are -+ * multiple suitable drivers we choose the driver with the -+ * fewest active operations. We prefer hardware-backed -+ * drivers to software ones when either may be used. -+ */ -+static struct cryptocap * -+crypto_select_kdriver(const struct cryptkop *krp, int flags) -+{ -+ struct cryptocap *cap, *best, *blocked; -+ int match, hid; -+ -+ CRYPTO_DRIVER_ASSERT(); -+ -+ /* -+ * Look first for hardware crypto devices if permitted. -+ */ -+ if (flags & CRYPTOCAP_F_HARDWARE) -+ match = CRYPTOCAP_F_HARDWARE; -+ else -+ match = CRYPTOCAP_F_SOFTWARE; -+ best = NULL; -+ blocked = NULL; -+again: -+ for (hid = 0; hid < crypto_drivers_num; hid++) { -+ cap = &crypto_drivers[hid]; -+ /* -+ * If it's not initialized, is in the process of -+ * going away, or is not appropriate (hardware -+ * or software based on match), then skip. -+ */ -+ if (cap->cc_dev == NULL || -+ (cap->cc_flags & CRYPTOCAP_F_CLEANUP) || -+ (cap->cc_flags & match) == 0) -+ continue; -+ -+ /* verify all the algorithms are supported. */ -+ if (kdriver_suitable(cap, krp)) { -+ if (best == NULL || -+ cap->cc_koperations < best->cc_koperations) -+ best = cap; -+ } -+ } -+ if (best != NULL) -+ return best; -+ if (match == CRYPTOCAP_F_HARDWARE && (flags & CRYPTOCAP_F_SOFTWARE)) { -+ /* sort of an Algol 68-style for loop */ -+ match = CRYPTOCAP_F_SOFTWARE; -+ goto again; -+ } -+ return best; -+} -+ -+/* -+ * Dispatch an assymetric crypto request. -+ */ -+static int -+crypto_kinvoke(struct cryptkop *krp, int crid) -+{ -+ struct cryptocap *cap = NULL; -+ int error; -+ unsigned long d_flags; -+ -+ KASSERT(krp != NULL, ("%s: krp == NULL", __func__)); -+ KASSERT(krp->krp_callback != NULL, -+ ("%s: krp->crp_callback == NULL", __func__)); -+ -+ CRYPTO_DRIVER_LOCK(); -+ if ((crid & (CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE)) == 0) { -+ cap = crypto_checkdriver(crid); -+ if (cap != NULL) { -+ /* -+ * Driver present, it must support the necessary -+ * algorithm and, if s/w drivers are excluded, -+ * it must be registered as hardware-backed. -+ */ -+ if (!kdriver_suitable(cap, krp) || -+ (!crypto_devallowsoft && -+ (cap->cc_flags & CRYPTOCAP_F_HARDWARE) == 0)) -+ cap = NULL; -+ } -+ } else { -+ /* -+ * No requested driver; select based on crid flags. -+ */ -+ if (!crypto_devallowsoft) /* NB: disallow s/w drivers */ -+ crid &= ~CRYPTOCAP_F_SOFTWARE; -+ cap = crypto_select_kdriver(krp, crid); -+ } -+ if (cap != NULL && !cap->cc_kqblocked) { -+ krp->krp_hid = cap - crypto_drivers; -+ cap->cc_koperations++; -+ CRYPTO_DRIVER_UNLOCK(); -+ error = CRYPTODEV_KPROCESS(cap->cc_dev, krp, 0); -+ CRYPTO_DRIVER_LOCK(); -+ if (error == ERESTART) { -+ cap->cc_koperations--; -+ CRYPTO_DRIVER_UNLOCK(); -+ return (error); -+ } -+ /* return the actual device used */ -+ krp->krp_crid = krp->krp_hid; -+ } else { -+ /* -+ * NB: cap is !NULL if device is blocked; in -+ * that case return ERESTART so the operation -+ * is resubmitted if possible. -+ */ -+ error = (cap == NULL) ? ENODEV : ERESTART; -+ } -+ CRYPTO_DRIVER_UNLOCK(); -+ -+ if (error) { -+ krp->krp_status = error; -+ crypto_kdone(krp); -+ } -+ return 0; -+} -+ -+ -+/* -+ * Dispatch a crypto request to the appropriate crypto devices. -+ */ -+static int -+crypto_invoke(struct cryptocap *cap, struct cryptop *crp, int hint) -+{ -+ KASSERT(crp != NULL, ("%s: crp == NULL", __func__)); -+ KASSERT(crp->crp_callback != NULL, -+ ("%s: crp->crp_callback == NULL", __func__)); -+ KASSERT(crp->crp_desc != NULL, ("%s: crp->crp_desc == NULL", __func__)); -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+#ifdef CRYPTO_TIMING -+ if (crypto_timing) -+ crypto_tstat(&cryptostats.cs_invoke, &crp->crp_tstamp); -+#endif -+ if (cap->cc_flags & CRYPTOCAP_F_CLEANUP) { -+ struct cryptodesc *crd; -+ u_int64_t nid; -+ -+ /* -+ * Driver has unregistered; migrate the session and return -+ * an error to the caller so they'll resubmit the op. -+ * -+ * XXX: What if there are more already queued requests for this -+ * session? -+ */ -+ crypto_freesession(crp->crp_sid); -+ -+ for (crd = crp->crp_desc; crd->crd_next; crd = crd->crd_next) -+ crd->CRD_INI.cri_next = &(crd->crd_next->CRD_INI); -+ -+ /* XXX propagate flags from initial session? */ -+ if (crypto_newsession(&nid, &(crp->crp_desc->CRD_INI), -+ CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE) == 0) -+ crp->crp_sid = nid; -+ -+ crp->crp_etype = EAGAIN; -+ crypto_done(crp); -+ return 0; -+ } else { -+ /* -+ * Invoke the driver to process the request. -+ */ -+ return CRYPTODEV_PROCESS(cap->cc_dev, crp, hint); -+ } -+} -+ -+/* -+ * Release a set of crypto descriptors. -+ */ -+void -+crypto_freereq(struct cryptop *crp) -+{ -+ struct cryptodesc *crd; -+ -+ if (crp == NULL) -+ return; -+ -+#ifdef DIAGNOSTIC -+ { -+ struct cryptop *crp2; -+ unsigned long q_flags; -+ -+ CRYPTO_Q_LOCK(); -+ TAILQ_FOREACH(crp2, &crp_q, crp_next) { -+ KASSERT(crp2 != crp, -+ ("Freeing cryptop from the crypto queue (%p).", -+ crp)); -+ } -+ CRYPTO_Q_UNLOCK(); -+ CRYPTO_RETQ_LOCK(); -+ TAILQ_FOREACH(crp2, &crp_ret_q, crp_next) { -+ KASSERT(crp2 != crp, -+ ("Freeing cryptop from the return queue (%p).", -+ crp)); -+ } -+ CRYPTO_RETQ_UNLOCK(); -+ } -+#endif -+ -+ while ((crd = crp->crp_desc) != NULL) { -+ crp->crp_desc = crd->crd_next; -+ kmem_cache_free(cryptodesc_zone, crd); -+ } -+ kmem_cache_free(cryptop_zone, crp); -+} -+ -+/* -+ * Acquire a set of crypto descriptors. -+ */ -+struct cryptop * -+crypto_getreq(int num) -+{ -+ struct cryptodesc *crd; -+ struct cryptop *crp; -+ -+ crp = kmem_cache_alloc(cryptop_zone, SLAB_ATOMIC); -+ if (crp != NULL) { -+ memset(crp, 0, sizeof(*crp)); -+ INIT_LIST_HEAD(&crp->crp_next); -+ init_waitqueue_head(&crp->crp_waitq); -+ while (num--) { -+ crd = kmem_cache_alloc(cryptodesc_zone, SLAB_ATOMIC); -+ if (crd == NULL) { -+ crypto_freereq(crp); -+ return NULL; -+ } -+ memset(crd, 0, sizeof(*crd)); -+ crd->crd_next = crp->crp_desc; -+ crp->crp_desc = crd; -+ } -+ } -+ return crp; -+} -+ -+/* -+ * Invoke the callback on behalf of the driver. -+ */ -+void -+crypto_done(struct cryptop *crp) -+{ -+ unsigned long q_flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if ((crp->crp_flags & CRYPTO_F_DONE) == 0) { -+ crp->crp_flags |= CRYPTO_F_DONE; -+ CRYPTO_Q_LOCK(); -+ crypto_q_cnt--; -+ CRYPTO_Q_UNLOCK(); -+ } else -+ printk("crypto: crypto_done op already done, flags 0x%x", -+ crp->crp_flags); -+ if (crp->crp_etype != 0) -+ cryptostats.cs_errs++; -+ /* -+ * CBIMM means unconditionally do the callback immediately; -+ * CBIFSYNC means do the callback immediately only if the -+ * operation was done synchronously. Both are used to avoid -+ * doing extraneous context switches; the latter is mostly -+ * used with the software crypto driver. -+ */ -+ if ((crp->crp_flags & CRYPTO_F_CBIMM) || -+ ((crp->crp_flags & CRYPTO_F_CBIFSYNC) && -+ (CRYPTO_SESID2CAPS(crp->crp_sid) & CRYPTOCAP_F_SYNC))) { -+ /* -+ * Do the callback directly. This is ok when the -+ * callback routine does very little (e.g. the -+ * /dev/crypto callback method just does a wakeup). -+ */ -+ crp->crp_callback(crp); -+ } else { -+ unsigned long r_flags; -+ /* -+ * Normal case; queue the callback for the thread. -+ */ -+ CRYPTO_RETQ_LOCK(); -+ if (CRYPTO_RETQ_EMPTY()) -+ wake_up_interruptible(&cryptoretproc_wait);/* shared wait channel */ -+ TAILQ_INSERT_TAIL(&crp_ret_q, crp, crp_next); -+ CRYPTO_RETQ_UNLOCK(); -+ } -+} -+ -+/* -+ * Invoke the callback on behalf of the driver. -+ */ -+void -+crypto_kdone(struct cryptkop *krp) -+{ -+ struct cryptocap *cap; -+ unsigned long d_flags; -+ -+ if ((krp->krp_flags & CRYPTO_KF_DONE) != 0) -+ printk("crypto: crypto_kdone op already done, flags 0x%x", -+ krp->krp_flags); -+ krp->krp_flags |= CRYPTO_KF_DONE; -+ if (krp->krp_status != 0) -+ cryptostats.cs_kerrs++; -+ -+ CRYPTO_DRIVER_LOCK(); -+ /* XXX: What if driver is loaded in the meantime? */ -+ if (krp->krp_hid < crypto_drivers_num) { -+ cap = &crypto_drivers[krp->krp_hid]; -+ cap->cc_koperations--; -+ KASSERT(cap->cc_koperations >= 0, ("cc_koperations < 0")); -+ if (cap->cc_flags & CRYPTOCAP_F_CLEANUP) -+ crypto_remove(cap); -+ } -+ CRYPTO_DRIVER_UNLOCK(); -+ -+ /* -+ * CBIMM means unconditionally do the callback immediately; -+ * This is used to avoid doing extraneous context switches -+ */ -+ if ((krp->krp_flags & CRYPTO_KF_CBIMM)) { -+ /* -+ * Do the callback directly. This is ok when the -+ * callback routine does very little (e.g. the -+ * /dev/crypto callback method just does a wakeup). -+ */ -+ krp->krp_callback(krp); -+ } else { -+ unsigned long r_flags; -+ /* -+ * Normal case; queue the callback for the thread. -+ */ -+ CRYPTO_RETQ_LOCK(); -+ if (CRYPTO_RETQ_EMPTY()) -+ wake_up_interruptible(&cryptoretproc_wait);/* shared wait channel */ -+ TAILQ_INSERT_TAIL(&crp_ret_kq, krp, krp_next); -+ CRYPTO_RETQ_UNLOCK(); -+ } -+} -+ -+int -+crypto_getfeat(int *featp) -+{ -+ int hid, kalg, feat = 0; -+ unsigned long d_flags; -+ -+ CRYPTO_DRIVER_LOCK(); -+ for (hid = 0; hid < crypto_drivers_num; hid++) { -+ const struct cryptocap *cap = &crypto_drivers[hid]; -+ -+ if ((cap->cc_flags & CRYPTOCAP_F_SOFTWARE) && -+ !crypto_devallowsoft) { -+ continue; -+ } -+ for (kalg = 0; kalg < CRK_ALGORITHM_MAX; kalg++) -+ if (cap->cc_kalg[kalg] & CRYPTO_ALG_FLAG_SUPPORTED) -+ feat |= 1 << kalg; -+ } -+ CRYPTO_DRIVER_UNLOCK(); -+ *featp = feat; -+ return (0); -+} -+ -+/* -+ * Crypto thread, dispatches crypto requests. -+ */ -+static int -+crypto_proc(void *arg) -+{ -+ struct cryptop *crp, *submit; -+ struct cryptkop *krp, *krpp; -+ struct cryptocap *cap; -+ u_int32_t hid; -+ int result, hint; -+ unsigned long q_flags; -+ int loopcount = 0; -+ -+ ocf_daemonize("crypto"); -+ -+ CRYPTO_Q_LOCK(); -+ for (;;) { -+ /* -+ * we need to make sure we don't get into a busy loop with nothing -+ * to do, the two crypto_all_*blocked vars help us find out when -+ * we are all full and can do nothing on any driver or Q. If so we -+ * wait for an unblock. -+ */ -+ crypto_all_qblocked = !list_empty(&crp_q); -+ -+ /* -+ * Find the first element in the queue that can be -+ * processed and look-ahead to see if multiple ops -+ * are ready for the same driver. -+ */ -+ submit = NULL; -+ hint = 0; -+ list_for_each_entry(crp, &crp_q, crp_next) { -+ hid = CRYPTO_SESID2HID(crp->crp_sid); -+ cap = crypto_checkdriver(hid); -+ /* -+ * Driver cannot disappear when there is an active -+ * session. -+ */ -+ KASSERT(cap != NULL, ("%s:%u Driver disappeared.", -+ __func__, __LINE__)); -+ if (cap == NULL || cap->cc_dev == NULL) { -+ /* Op needs to be migrated, process it. */ -+ if (submit == NULL) -+ submit = crp; -+ break; -+ } -+ if (!cap->cc_qblocked) { -+ if (submit != NULL) { -+ /* -+ * We stop on finding another op, -+ * regardless whether its for the same -+ * driver or not. We could keep -+ * searching the queue but it might be -+ * better to just use a per-driver -+ * queue instead. -+ */ -+ if (CRYPTO_SESID2HID(submit->crp_sid) == hid) -+ hint = CRYPTO_HINT_MORE; -+ break; -+ } else { -+ submit = crp; -+ if ((submit->crp_flags & CRYPTO_F_BATCH) == 0) -+ break; -+ /* keep scanning for more are q'd */ -+ } -+ } -+ } -+ if (submit != NULL) { -+ hid = CRYPTO_SESID2HID(submit->crp_sid); -+ crypto_all_qblocked = 0; -+ list_del(&submit->crp_next); -+ crypto_drivers[hid].cc_unqblocked = 1; -+ cap = crypto_checkdriver(hid); -+ CRYPTO_Q_UNLOCK(); -+ KASSERT(cap != NULL, ("%s:%u Driver disappeared.", -+ __func__, __LINE__)); -+ result = crypto_invoke(cap, submit, hint); -+ CRYPTO_Q_LOCK(); -+ if (result == ERESTART) { -+ /* -+ * The driver ran out of resources, mark the -+ * driver ``blocked'' for cryptop's and put -+ * the request back in the queue. It would -+ * best to put the request back where we got -+ * it but that's hard so for now we put it -+ * at the front. This should be ok; putting -+ * it at the end does not work. -+ */ -+ /* XXX validate sid again? */ -+ list_add(&submit->crp_next, &crp_q); -+ cryptostats.cs_blocks++; -+ if (crypto_drivers[hid].cc_unqblocked) -+ crypto_drivers[hid].cc_qblocked=0; -+ crypto_drivers[hid].cc_unqblocked=0; -+ } -+ crypto_drivers[hid].cc_unqblocked = 0; -+ } -+ -+ crypto_all_kqblocked = !list_empty(&crp_kq); -+ -+ /* As above, but for key ops */ -+ krp = NULL; -+ list_for_each_entry(krpp, &crp_kq, krp_next) { -+ cap = crypto_checkdriver(krpp->krp_hid); -+ if (cap == NULL || cap->cc_dev == NULL) { -+ /* -+ * Operation needs to be migrated, invalidate -+ * the assigned device so it will reselect a -+ * new one below. Propagate the original -+ * crid selection flags if supplied. -+ */ -+ krp->krp_hid = krp->krp_crid & -+ (CRYPTOCAP_F_SOFTWARE|CRYPTOCAP_F_HARDWARE); -+ if (krp->krp_hid == 0) -+ krp->krp_hid = -+ CRYPTOCAP_F_SOFTWARE|CRYPTOCAP_F_HARDWARE; -+ break; -+ } -+ if (!cap->cc_kqblocked) { -+ krp = krpp; -+ break; -+ } -+ } -+ if (krp != NULL) { -+ crypto_all_kqblocked = 0; -+ list_del(&krp->krp_next); -+ crypto_drivers[krp->krp_hid].cc_kqblocked = 1; -+ CRYPTO_Q_UNLOCK(); -+ result = crypto_kinvoke(krp, krp->krp_hid); -+ CRYPTO_Q_LOCK(); -+ if (result == ERESTART) { -+ /* -+ * The driver ran out of resources, mark the -+ * driver ``blocked'' for cryptkop's and put -+ * the request back in the queue. It would -+ * best to put the request back where we got -+ * it but that's hard so for now we put it -+ * at the front. This should be ok; putting -+ * it at the end does not work. -+ */ -+ /* XXX validate sid again? */ -+ list_add(&krp->krp_next, &crp_kq); -+ cryptostats.cs_kblocks++; -+ } else -+ crypto_drivers[krp->krp_hid].cc_kqblocked = 0; -+ } -+ -+ if (submit == NULL && krp == NULL) { -+ /* -+ * Nothing more to be processed. Sleep until we're -+ * woken because there are more ops to process. -+ * This happens either by submission or by a driver -+ * becoming unblocked and notifying us through -+ * crypto_unblock. Note that when we wakeup we -+ * start processing each queue again from the -+ * front. It's not clear that it's important to -+ * preserve this ordering since ops may finish -+ * out of order if dispatched to different devices -+ * and some become blocked while others do not. -+ */ -+ dprintk("%s - sleeping (qe=%d qb=%d kqe=%d kqb=%d)\n", -+ __FUNCTION__, -+ list_empty(&crp_q), crypto_all_qblocked, -+ list_empty(&crp_kq), crypto_all_kqblocked); -+ loopcount = 0; -+ CRYPTO_Q_UNLOCK(); -+ crp_sleep = 1; -+ wait_event_interruptible(cryptoproc_wait, -+ !(list_empty(&crp_q) || crypto_all_qblocked) || -+ !(list_empty(&crp_kq) || crypto_all_kqblocked) || -+ cryptoproc == (pid_t) -1); -+ crp_sleep = 0; -+ if (signal_pending (current)) { -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ spin_lock_irq(¤t->sigmask_lock); -+#endif -+ flush_signals(current); -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ spin_unlock_irq(¤t->sigmask_lock); -+#endif -+ } -+ CRYPTO_Q_LOCK(); -+ dprintk("%s - awake\n", __FUNCTION__); -+ if (cryptoproc == (pid_t) -1) -+ break; -+ cryptostats.cs_intrs++; -+ } else if (loopcount > crypto_max_loopcount) { -+ /* -+ * Give other processes a chance to run if we've -+ * been using the CPU exclusively for a while. -+ */ -+ loopcount = 0; -+ schedule(); -+ } -+ loopcount++; -+ } -+ CRYPTO_Q_UNLOCK(); -+ complete_and_exit(&cryptoproc_exited, 0); -+} -+ -+/* -+ * Crypto returns thread, does callbacks for processed crypto requests. -+ * Callbacks are done here, rather than in the crypto drivers, because -+ * callbacks typically are expensive and would slow interrupt handling. -+ */ -+static int -+crypto_ret_proc(void *arg) -+{ -+ struct cryptop *crpt; -+ struct cryptkop *krpt; -+ unsigned long r_flags; -+ -+ ocf_daemonize("crypto_ret"); -+ -+ CRYPTO_RETQ_LOCK(); -+ for (;;) { -+ /* Harvest return q's for completed ops */ -+ crpt = NULL; -+ if (!list_empty(&crp_ret_q)) -+ crpt = list_entry(crp_ret_q.next, typeof(*crpt), crp_next); -+ if (crpt != NULL) -+ list_del(&crpt->crp_next); -+ -+ krpt = NULL; -+ if (!list_empty(&crp_ret_kq)) -+ krpt = list_entry(crp_ret_kq.next, typeof(*krpt), krp_next); -+ if (krpt != NULL) -+ list_del(&krpt->krp_next); -+ -+ if (crpt != NULL || krpt != NULL) { -+ CRYPTO_RETQ_UNLOCK(); -+ /* -+ * Run callbacks unlocked. -+ */ -+ if (crpt != NULL) -+ crpt->crp_callback(crpt); -+ if (krpt != NULL) -+ krpt->krp_callback(krpt); -+ CRYPTO_RETQ_LOCK(); -+ } else { -+ /* -+ * Nothing more to be processed. Sleep until we're -+ * woken because there are more returns to process. -+ */ -+ dprintk("%s - sleeping\n", __FUNCTION__); -+ CRYPTO_RETQ_UNLOCK(); -+ wait_event_interruptible(cryptoretproc_wait, -+ cryptoretproc == (pid_t) -1 || -+ !list_empty(&crp_ret_q) || -+ !list_empty(&crp_ret_kq)); -+ if (signal_pending (current)) { -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ spin_lock_irq(¤t->sigmask_lock); -+#endif -+ flush_signals(current); -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ spin_unlock_irq(¤t->sigmask_lock); -+#endif -+ } -+ CRYPTO_RETQ_LOCK(); -+ dprintk("%s - awake\n", __FUNCTION__); -+ if (cryptoretproc == (pid_t) -1) { -+ dprintk("%s - EXITING!\n", __FUNCTION__); -+ break; -+ } -+ cryptostats.cs_rets++; -+ } -+ } -+ CRYPTO_RETQ_UNLOCK(); -+ complete_and_exit(&cryptoretproc_exited, 0); -+} -+ -+ -+#if 0 /* should put this into /proc or something */ -+static void -+db_show_drivers(void) -+{ -+ int hid; -+ -+ db_printf("%12s %4s %4s %8s %2s %2s\n" -+ , "Device" -+ , "Ses" -+ , "Kops" -+ , "Flags" -+ , "QB" -+ , "KB" -+ ); -+ for (hid = 0; hid < crypto_drivers_num; hid++) { -+ const struct cryptocap *cap = &crypto_drivers[hid]; -+ if (cap->cc_dev == NULL) -+ continue; -+ db_printf("%-12s %4u %4u %08x %2u %2u\n" -+ , device_get_nameunit(cap->cc_dev) -+ , cap->cc_sessions -+ , cap->cc_koperations -+ , cap->cc_flags -+ , cap->cc_qblocked -+ , cap->cc_kqblocked -+ ); -+ } -+} -+ -+DB_SHOW_COMMAND(crypto, db_show_crypto) -+{ -+ struct cryptop *crp; -+ -+ db_show_drivers(); -+ db_printf("\n"); -+ -+ db_printf("%4s %8s %4s %4s %4s %4s %8s %8s\n", -+ "HID", "Caps", "Ilen", "Olen", "Etype", "Flags", -+ "Desc", "Callback"); -+ TAILQ_FOREACH(crp, &crp_q, crp_next) { -+ db_printf("%4u %08x %4u %4u %4u %04x %8p %8p\n" -+ , (int) CRYPTO_SESID2HID(crp->crp_sid) -+ , (int) CRYPTO_SESID2CAPS(crp->crp_sid) -+ , crp->crp_ilen, crp->crp_olen -+ , crp->crp_etype -+ , crp->crp_flags -+ , crp->crp_desc -+ , crp->crp_callback -+ ); -+ } -+ if (!TAILQ_EMPTY(&crp_ret_q)) { -+ db_printf("\n%4s %4s %4s %8s\n", -+ "HID", "Etype", "Flags", "Callback"); -+ TAILQ_FOREACH(crp, &crp_ret_q, crp_next) { -+ db_printf("%4u %4u %04x %8p\n" -+ , (int) CRYPTO_SESID2HID(crp->crp_sid) -+ , crp->crp_etype -+ , crp->crp_flags -+ , crp->crp_callback -+ ); -+ } -+ } -+} -+ -+DB_SHOW_COMMAND(kcrypto, db_show_kcrypto) -+{ -+ struct cryptkop *krp; -+ -+ db_show_drivers(); -+ db_printf("\n"); -+ -+ db_printf("%4s %5s %4s %4s %8s %4s %8s\n", -+ "Op", "Status", "#IP", "#OP", "CRID", "HID", "Callback"); -+ TAILQ_FOREACH(krp, &crp_kq, krp_next) { -+ db_printf("%4u %5u %4u %4u %08x %4u %8p\n" -+ , krp->krp_op -+ , krp->krp_status -+ , krp->krp_iparams, krp->krp_oparams -+ , krp->krp_crid, krp->krp_hid -+ , krp->krp_callback -+ ); -+ } -+ if (!TAILQ_EMPTY(&crp_ret_q)) { -+ db_printf("%4s %5s %8s %4s %8s\n", -+ "Op", "Status", "CRID", "HID", "Callback"); -+ TAILQ_FOREACH(krp, &crp_ret_kq, krp_next) { -+ db_printf("%4u %5u %08x %4u %8p\n" -+ , krp->krp_op -+ , krp->krp_status -+ , krp->krp_crid, krp->krp_hid -+ , krp->krp_callback -+ ); -+ } -+ } -+} -+#endif -+ -+ -+static int -+crypto_init(void) -+{ -+ int error; -+ -+ dprintk("%s(%p)\n", __FUNCTION__, (void *) crypto_init); -+ -+ if (crypto_initted) -+ return 0; -+ crypto_initted = 1; -+ -+ spin_lock_init(&crypto_drivers_lock); -+ spin_lock_init(&crypto_q_lock); -+ spin_lock_init(&crypto_ret_q_lock); -+ -+ cryptop_zone = kmem_cache_create("cryptop", sizeof(struct cryptop), -+ 0, SLAB_HWCACHE_ALIGN, NULL -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) -+ , NULL -+#endif -+ ); -+ -+ cryptodesc_zone = kmem_cache_create("cryptodesc", sizeof(struct cryptodesc), -+ 0, SLAB_HWCACHE_ALIGN, NULL -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) -+ , NULL -+#endif -+ ); -+ -+ if (cryptodesc_zone == NULL || cryptop_zone == NULL) { -+ printk("crypto: crypto_init cannot setup crypto zones\n"); -+ error = ENOMEM; -+ goto bad; -+ } -+ -+ crypto_drivers_num = CRYPTO_DRIVERS_INITIAL; -+ crypto_drivers = kmalloc(crypto_drivers_num * sizeof(struct cryptocap), -+ GFP_KERNEL); -+ if (crypto_drivers == NULL) { -+ printk("crypto: crypto_init cannot setup crypto drivers\n"); -+ error = ENOMEM; -+ goto bad; -+ } -+ -+ memset(crypto_drivers, 0, crypto_drivers_num * sizeof(struct cryptocap)); -+ -+ init_completion(&cryptoproc_exited); -+ init_completion(&cryptoretproc_exited); -+ -+ cryptoproc = 0; /* to avoid race condition where proc runs first */ -+ cryptoproc = kernel_thread(crypto_proc, NULL, CLONE_FS|CLONE_FILES); -+ if (cryptoproc < 0) { -+ error = cryptoproc; -+ printk("crypto: crypto_init cannot start crypto thread; error %d", -+ error); -+ goto bad; -+ } -+ -+ cryptoretproc = 0; /* to avoid race condition where proc runs first */ -+ cryptoretproc = kernel_thread(crypto_ret_proc, NULL, CLONE_FS|CLONE_FILES); -+ if (cryptoretproc < 0) { -+ error = cryptoretproc; -+ printk("crypto: crypto_init cannot start cryptoret thread; error %d", -+ error); -+ goto bad; -+ } -+ -+ return 0; -+bad: -+ crypto_exit(); -+ return error; -+} -+ -+ -+static void -+crypto_exit(void) -+{ -+ pid_t p; -+ unsigned long d_flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ /* -+ * Terminate any crypto threads. -+ */ -+ -+ CRYPTO_DRIVER_LOCK(); -+ p = cryptoproc; -+ cryptoproc = (pid_t) -1; -+ kill_proc(p, SIGTERM, 1); -+ wake_up_interruptible(&cryptoproc_wait); -+ CRYPTO_DRIVER_UNLOCK(); -+ -+ wait_for_completion(&cryptoproc_exited); -+ -+ CRYPTO_DRIVER_LOCK(); -+ p = cryptoretproc; -+ cryptoretproc = (pid_t) -1; -+ kill_proc(p, SIGTERM, 1); -+ wake_up_interruptible(&cryptoretproc_wait); -+ CRYPTO_DRIVER_UNLOCK(); -+ -+ wait_for_completion(&cryptoretproc_exited); -+ -+ /* XXX flush queues??? */ -+ -+ /* -+ * Reclaim dynamically allocated resources. -+ */ -+ if (crypto_drivers != NULL) -+ kfree(crypto_drivers); -+ -+ if (cryptodesc_zone != NULL) -+ kmem_cache_destroy(cryptodesc_zone); -+ if (cryptop_zone != NULL) -+ kmem_cache_destroy(cryptop_zone); -+} -+ -+ -+EXPORT_SYMBOL(crypto_newsession); -+EXPORT_SYMBOL(crypto_freesession); -+EXPORT_SYMBOL(crypto_get_driverid); -+EXPORT_SYMBOL(crypto_kregister); -+EXPORT_SYMBOL(crypto_register); -+EXPORT_SYMBOL(crypto_unregister); -+EXPORT_SYMBOL(crypto_unregister_all); -+EXPORT_SYMBOL(crypto_unblock); -+EXPORT_SYMBOL(crypto_dispatch); -+EXPORT_SYMBOL(crypto_kdispatch); -+EXPORT_SYMBOL(crypto_freereq); -+EXPORT_SYMBOL(crypto_getreq); -+EXPORT_SYMBOL(crypto_done); -+EXPORT_SYMBOL(crypto_kdone); -+EXPORT_SYMBOL(crypto_getfeat); -+EXPORT_SYMBOL(crypto_userasymcrypto); -+EXPORT_SYMBOL(crypto_getcaps); -+EXPORT_SYMBOL(crypto_find_driver); -+EXPORT_SYMBOL(crypto_find_device_byhid); -+ -+module_init(crypto_init); -+module_exit(crypto_exit); -+ -+MODULE_LICENSE("BSD"); -+MODULE_AUTHOR("David McCullough <david_mccullough@mcafee.com>"); -+MODULE_DESCRIPTION("OCF (OpenBSD Cryptographic Framework)"); -diff --git a/crypto/ocf/cryptocteon/Makefile b/crypto/ocf/cryptocteon/Makefile -new file mode 100644 -index 0000000..eeed0d6 ---- /dev/null -+++ b/crypto/ocf/cryptocteon/Makefile -@@ -0,0 +1,17 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+obj-$(CONFIG_OCF_CRYPTOCTEON) += cryptocteon.o -+ -+obj ?= . -+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/ -+ -+ifdef CONFIG_OCF_CRYPTOCTEON -+# you need the cavium crypto component installed -+EXTRA_CFLAGS += -I$(ROOTDIR)/prop/include -+endif -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/cryptocteon/cavium_crypto.c b/crypto/ocf/cryptocteon/cavium_crypto.c -new file mode 100644 -index 0000000..0254b9b ---- /dev/null -+++ b/crypto/ocf/cryptocteon/cavium_crypto.c -@@ -0,0 +1,2283 @@ -+/* -+ * Copyright (c) 2009 David McCullough <david.mccullough@securecomputing.com> -+ * -+ * Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -+ * reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * 1. Redistributions of source code must retain the above copyright notice, -+ * this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright notice, -+ * this list of conditions and the following disclaimer in the documentation -+ * and/or other materials provided with the distribution. -+ * 3. All advertising materials mentioning features or use of this software -+ * must display the following acknowledgement: -+ * This product includes software developed by Cavium Networks -+ * 4. Cavium Networks' name may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * This Software, including technical data, may be subject to U.S. export -+ * control laws, including the U.S. Export Administration Act and its -+ * associated regulations, and may be subject to export or import regulations -+ * in other countries. You warrant that You will comply strictly in all -+ * respects with all such regulations and acknowledge that you have the -+ * responsibility to obtain licenses to export, re-export or import the -+ * Software. -+ * -+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" AND -+ * WITH ALL FAULTS AND CAVIUM MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, -+ * EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE -+ * SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR -+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM -+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, -+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF -+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR -+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR -+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. -+*/ -+/****************************************************************************/ -+ -+#include <linux/scatterlist.h> -+#include <asm/octeon/octeon.h> -+#include "octeon-asm.h" -+ -+/****************************************************************************/ -+ -+extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *); -+extern void octeon_crypto_disable(struct octeon_cop2_state *, unsigned long); -+ -+#define SG_INIT(s, p, i, l) \ -+ { \ -+ (i) = 0; \ -+ (l) = (s)[0].length; \ -+ (p) = (typeof(p)) sg_virt((s)); \ -+ CVMX_PREFETCH0((p)); \ -+ } -+ -+#define SG_CONSUME(s, p, i, l) \ -+ { \ -+ (p)++; \ -+ (l) -= sizeof(*(p)); \ -+ if ((l) < 0) { \ -+ dprintk("%s, %d: l = %d\n", __FILE__, __LINE__, l); \ -+ } else if ((l) == 0) { \ -+ (i)++; \ -+ (l) = (s)[0].length; \ -+ (p) = (typeof(p)) sg_virt(s); \ -+ CVMX_PREFETCH0((p)); \ -+ } \ -+ } -+ -+#define ESP_HEADER_LENGTH 8 -+#define DES_CBC_IV_LENGTH 8 -+#define AES_CBC_IV_LENGTH 16 -+#define ESP_HMAC_LEN 12 -+ -+#define ESP_HEADER_LENGTH 8 -+#define DES_CBC_IV_LENGTH 8 -+ -+/****************************************************************************/ -+ -+#define CVM_LOAD_SHA_UNIT(dat, next) { \ -+ if (next == 0) { \ -+ next = 1; \ -+ CVMX_MT_HSH_DAT (dat, 0); \ -+ } else if (next == 1) { \ -+ next = 2; \ -+ CVMX_MT_HSH_DAT (dat, 1); \ -+ } else if (next == 2) { \ -+ next = 3; \ -+ CVMX_MT_HSH_DAT (dat, 2); \ -+ } else if (next == 3) { \ -+ next = 4; \ -+ CVMX_MT_HSH_DAT (dat, 3); \ -+ } else if (next == 4) { \ -+ next = 5; \ -+ CVMX_MT_HSH_DAT (dat, 4); \ -+ } else if (next == 5) { \ -+ next = 6; \ -+ CVMX_MT_HSH_DAT (dat, 5); \ -+ } else if (next == 6) { \ -+ next = 7; \ -+ CVMX_MT_HSH_DAT (dat, 6); \ -+ } else { \ -+ CVMX_MT_HSH_STARTSHA (dat); \ -+ next = 0; \ -+ } \ -+} -+ -+#define CVM_LOAD2_SHA_UNIT(dat1, dat2, next) { \ -+ if (next == 0) { \ -+ CVMX_MT_HSH_DAT (dat1, 0); \ -+ CVMX_MT_HSH_DAT (dat2, 1); \ -+ next = 2; \ -+ } else if (next == 1) { \ -+ CVMX_MT_HSH_DAT (dat1, 1); \ -+ CVMX_MT_HSH_DAT (dat2, 2); \ -+ next = 3; \ -+ } else if (next == 2) { \ -+ CVMX_MT_HSH_DAT (dat1, 2); \ -+ CVMX_MT_HSH_DAT (dat2, 3); \ -+ next = 4; \ -+ } else if (next == 3) { \ -+ CVMX_MT_HSH_DAT (dat1, 3); \ -+ CVMX_MT_HSH_DAT (dat2, 4); \ -+ next = 5; \ -+ } else if (next == 4) { \ -+ CVMX_MT_HSH_DAT (dat1, 4); \ -+ CVMX_MT_HSH_DAT (dat2, 5); \ -+ next = 6; \ -+ } else if (next == 5) { \ -+ CVMX_MT_HSH_DAT (dat1, 5); \ -+ CVMX_MT_HSH_DAT (dat2, 6); \ -+ next = 7; \ -+ } else if (next == 6) { \ -+ CVMX_MT_HSH_DAT (dat1, 6); \ -+ CVMX_MT_HSH_STARTSHA (dat2); \ -+ next = 0; \ -+ } else { \ -+ CVMX_MT_HSH_STARTSHA (dat1); \ -+ CVMX_MT_HSH_DAT (dat2, 0); \ -+ next = 1; \ -+ } \ -+} -+ -+/****************************************************************************/ -+ -+#define CVM_LOAD_MD5_UNIT(dat, next) { \ -+ if (next == 0) { \ -+ next = 1; \ -+ CVMX_MT_HSH_DAT (dat, 0); \ -+ } else if (next == 1) { \ -+ next = 2; \ -+ CVMX_MT_HSH_DAT (dat, 1); \ -+ } else if (next == 2) { \ -+ next = 3; \ -+ CVMX_MT_HSH_DAT (dat, 2); \ -+ } else if (next == 3) { \ -+ next = 4; \ -+ CVMX_MT_HSH_DAT (dat, 3); \ -+ } else if (next == 4) { \ -+ next = 5; \ -+ CVMX_MT_HSH_DAT (dat, 4); \ -+ } else if (next == 5) { \ -+ next = 6; \ -+ CVMX_MT_HSH_DAT (dat, 5); \ -+ } else if (next == 6) { \ -+ next = 7; \ -+ CVMX_MT_HSH_DAT (dat, 6); \ -+ } else { \ -+ CVMX_MT_HSH_STARTMD5 (dat); \ -+ next = 0; \ -+ } \ -+} -+ -+#define CVM_LOAD2_MD5_UNIT(dat1, dat2, next) { \ -+ if (next == 0) { \ -+ CVMX_MT_HSH_DAT (dat1, 0); \ -+ CVMX_MT_HSH_DAT (dat2, 1); \ -+ next = 2; \ -+ } else if (next == 1) { \ -+ CVMX_MT_HSH_DAT (dat1, 1); \ -+ CVMX_MT_HSH_DAT (dat2, 2); \ -+ next = 3; \ -+ } else if (next == 2) { \ -+ CVMX_MT_HSH_DAT (dat1, 2); \ -+ CVMX_MT_HSH_DAT (dat2, 3); \ -+ next = 4; \ -+ } else if (next == 3) { \ -+ CVMX_MT_HSH_DAT (dat1, 3); \ -+ CVMX_MT_HSH_DAT (dat2, 4); \ -+ next = 5; \ -+ } else if (next == 4) { \ -+ CVMX_MT_HSH_DAT (dat1, 4); \ -+ CVMX_MT_HSH_DAT (dat2, 5); \ -+ next = 6; \ -+ } else if (next == 5) { \ -+ CVMX_MT_HSH_DAT (dat1, 5); \ -+ CVMX_MT_HSH_DAT (dat2, 6); \ -+ next = 7; \ -+ } else if (next == 6) { \ -+ CVMX_MT_HSH_DAT (dat1, 6); \ -+ CVMX_MT_HSH_STARTMD5 (dat2); \ -+ next = 0; \ -+ } else { \ -+ CVMX_MT_HSH_STARTMD5 (dat1); \ -+ CVMX_MT_HSH_DAT (dat2, 0); \ -+ next = 1; \ -+ } \ -+} -+ -+/****************************************************************************/ -+ -+static inline uint64_t -+swap64(uint64_t a) -+{ -+ return ((a >> 56) | -+ (((a >> 48) & 0xfful) << 8) | -+ (((a >> 40) & 0xfful) << 16) | -+ (((a >> 32) & 0xfful) << 24) | -+ (((a >> 24) & 0xfful) << 32) | -+ (((a >> 16) & 0xfful) << 40) | -+ (((a >> 8) & 0xfful) << 48) | (((a >> 0) & 0xfful) << 56)); -+} -+ -+/****************************************************************************/ -+ -+void -+octo_calc_hash(__u8 auth, unsigned char *key, uint64_t *inner, uint64_t *outer) -+{ -+ uint8_t hash_key[64]; -+ uint64_t *key1; -+ register uint64_t xor1 = 0x3636363636363636ULL; -+ register uint64_t xor2 = 0x5c5c5c5c5c5c5c5cULL; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ memset(hash_key, 0, sizeof(hash_key)); -+ memcpy(hash_key, (uint8_t *) key, (auth ? 20 : 16)); -+ key1 = (uint64_t *) hash_key; -+ flags = octeon_crypto_enable(&state); -+ if (auth) { -+ CVMX_MT_HSH_IV(0x67452301EFCDAB89ULL, 0); -+ CVMX_MT_HSH_IV(0x98BADCFE10325476ULL, 1); -+ CVMX_MT_HSH_IV(0xC3D2E1F000000000ULL, 2); -+ } else { -+ CVMX_MT_HSH_IV(0x0123456789ABCDEFULL, 0); -+ CVMX_MT_HSH_IV(0xFEDCBA9876543210ULL, 1); -+ } -+ -+ CVMX_MT_HSH_DAT((*key1 ^ xor1), 0); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor1), 1); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor1), 2); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor1), 3); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor1), 4); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor1), 5); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor1), 6); -+ key1++; -+ if (auth) -+ CVMX_MT_HSH_STARTSHA((*key1 ^ xor1)); -+ else -+ CVMX_MT_HSH_STARTMD5((*key1 ^ xor1)); -+ -+ CVMX_MF_HSH_IV(inner[0], 0); -+ CVMX_MF_HSH_IV(inner[1], 1); -+ if (auth) { -+ inner[2] = 0; -+ CVMX_MF_HSH_IV(((uint64_t *) inner)[2], 2); -+ } -+ -+ memset(hash_key, 0, sizeof(hash_key)); -+ memcpy(hash_key, (uint8_t *) key, (auth ? 20 : 16)); -+ key1 = (uint64_t *) hash_key; -+ if (auth) { -+ CVMX_MT_HSH_IV(0x67452301EFCDAB89ULL, 0); -+ CVMX_MT_HSH_IV(0x98BADCFE10325476ULL, 1); -+ CVMX_MT_HSH_IV(0xC3D2E1F000000000ULL, 2); -+ } else { -+ CVMX_MT_HSH_IV(0x0123456789ABCDEFULL, 0); -+ CVMX_MT_HSH_IV(0xFEDCBA9876543210ULL, 1); -+ } -+ -+ CVMX_MT_HSH_DAT((*key1 ^ xor2), 0); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor2), 1); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor2), 2); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor2), 3); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor2), 4); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor2), 5); -+ key1++; -+ CVMX_MT_HSH_DAT((*key1 ^ xor2), 6); -+ key1++; -+ if (auth) -+ CVMX_MT_HSH_STARTSHA((*key1 ^ xor2)); -+ else -+ CVMX_MT_HSH_STARTMD5((*key1 ^ xor2)); -+ -+ CVMX_MF_HSH_IV(outer[0], 0); -+ CVMX_MF_HSH_IV(outer[1], 1); -+ if (auth) { -+ outer[2] = 0; -+ CVMX_MF_HSH_IV(outer[2], 2); -+ } -+ octeon_crypto_disable(&state, flags); -+ return; -+} -+ -+/****************************************************************************/ -+/* DES functions */ -+ -+int -+octo_des_cbc_encrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ uint64_t *data; -+ int data_i, data_l; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x7) || (crypt_off + crypt_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load 3DES Key */ -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ if (od->octo_encklen == 24) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ } else if (od->octo_encklen == 8) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ -+ CVMX_MT_3DES_IV(* (uint64_t *) ivp); -+ -+ while (crypt_off > 0) { -+ SG_CONSUME(sg, data, data_i, data_l); -+ crypt_off -= 8; -+ } -+ -+ while (crypt_len > 0) { -+ CVMX_MT_3DES_ENC_CBC(*data); -+ CVMX_MF_3DES_RESULT(*data); -+ SG_CONSUME(sg, data, data_i, data_l); -+ crypt_len -= 8; -+ } -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+ -+int -+octo_des_cbc_decrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ uint64_t *data; -+ int data_i, data_l; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x7) || (crypt_off + crypt_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load 3DES Key */ -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ if (od->octo_encklen == 24) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ } else if (od->octo_encklen == 8) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ -+ CVMX_MT_3DES_IV(* (uint64_t *) ivp); -+ -+ while (crypt_off > 0) { -+ SG_CONSUME(sg, data, data_i, data_l); -+ crypt_off -= 8; -+ } -+ -+ while (crypt_len > 0) { -+ CVMX_MT_3DES_DEC_CBC(*data); -+ CVMX_MF_3DES_RESULT(*data); -+ SG_CONSUME(sg, data, data_i, data_l); -+ crypt_len -= 8; -+ } -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+/****************************************************************************/ -+/* AES functions */ -+ -+int -+octo_aes_cbc_encrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ uint64_t *data, *pdata; -+ int data_i, data_l; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x7) || (crypt_off + crypt_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load AES Key */ -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ -+ if (od->octo_encklen == 16) { -+ CVMX_MT_AES_KEY(0x0, 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 24) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 32) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); -+ -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); -+ -+ while (crypt_off > 0) { -+ SG_CONSUME(sg, data, data_i, data_l); -+ crypt_off -= 8; -+ } -+ -+ while (crypt_len > 0) { -+ pdata = data; -+ CVMX_MT_AES_ENC_CBC0(*data); -+ SG_CONSUME(sg, data, data_i, data_l); -+ CVMX_MT_AES_ENC_CBC1(*data); -+ CVMX_MF_AES_RESULT(*pdata, 0); -+ CVMX_MF_AES_RESULT(*data, 1); -+ SG_CONSUME(sg, data, data_i, data_l); -+ crypt_len -= 16; -+ } -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+ -+int -+octo_aes_cbc_decrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ uint64_t *data, *pdata; -+ int data_i, data_l; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x7) || (crypt_off + crypt_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load AES Key */ -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ -+ if (od->octo_encklen == 16) { -+ CVMX_MT_AES_KEY(0x0, 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 24) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 32) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); -+ -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); -+ -+ while (crypt_off > 0) { -+ SG_CONSUME(sg, data, data_i, data_l); -+ crypt_off -= 8; -+ } -+ -+ while (crypt_len > 0) { -+ pdata = data; -+ CVMX_MT_AES_DEC_CBC0(*data); -+ SG_CONSUME(sg, data, data_i, data_l); -+ CVMX_MT_AES_DEC_CBC1(*data); -+ CVMX_MF_AES_RESULT(*pdata, 0); -+ CVMX_MF_AES_RESULT(*data, 1); -+ SG_CONSUME(sg, data, data_i, data_l); -+ crypt_len -= 16; -+ } -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+/****************************************************************************/ -+/* MD5 */ -+ -+int -+octo_null_md5_encrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ uint64_t *data; -+ uint64_t tmp1, tmp2; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || -+ (auth_off & 0x7) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data, data_i, data_l); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* Load MD5 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ -+ while (auth_off > 0) { -+ SG_CONSUME(sg, data, data_i, data_l); -+ auth_off -= 8; -+ } -+ -+ while (auth_len > 0) { -+ CVM_LOAD_MD5_UNIT(*data, next); -+ auth_len -= 8; -+ SG_CONSUME(sg, data, data_i, data_l); -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_MD5_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVMX_ES64(tmp1, ((alen + 64) << 3)); -+ CVM_LOAD_MD5_UNIT(tmp1, next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_ES64(tmp1, ((64 + 16) << 3)); -+ CVMX_MT_HSH_STARTMD5(tmp1); -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data, data_i, data_l); -+ icv_off -= 8; -+ } -+ CVMX_MF_HSH_IV(*data, 0); -+ SG_CONSUME(sg, data, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *(uint32_t *)data = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+/****************************************************************************/ -+/* SHA1 */ -+ -+int -+octo_null_sha1_encrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ uint64_t *data; -+ uint64_t tmp1, tmp2, tmp3; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || -+ (auth_off & 0x7) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data, data_i, data_l); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* Load SHA1 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hminner[2], 2); -+ -+ while (auth_off > 0) { -+ SG_CONSUME(sg, data, data_i, data_l); -+ auth_off -= 8; -+ } -+ -+ while (auth_len > 0) { -+ CVM_LOAD_SHA_UNIT(*data, next); -+ auth_len -= 8; -+ SG_CONSUME(sg, data, data_i, data_l); -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_MD5_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ tmp3 = 0; -+ CVMX_MF_HSH_IV(tmp3, 2); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hmouter[2], 2); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ tmp3 |= 0x0000000080000000; -+ CVMX_MT_HSH_DAT(tmp3, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3)); -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data, data_i, data_l); -+ icv_off -= 8; -+ } -+ CVMX_MF_HSH_IV(*data, 0); -+ SG_CONSUME(sg, data, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *(uint32_t *)data = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+/****************************************************************************/ -+/* DES MD5 */ -+ -+int -+octo_des_cbc_md5_encrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ union { -+ uint32_t data32[2]; -+ uint64_t data64[1]; -+ } mydata; -+ uint64_t *data = &mydata.data64[0]; -+ uint32_t *data32; -+ uint64_t tmp1, tmp2; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) || -+ (crypt_len & 0x7) || -+ (auth_len & 0x7) || -+ (auth_off & 0x3) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data32, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load 3DES Key */ -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ if (od->octo_encklen == 24) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ } else if (od->octo_encklen == 8) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ -+ CVMX_MT_3DES_IV(* (uint64_t *) ivp); -+ -+ /* Load MD5 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ -+ while (crypt_off > 0 && auth_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ crypt_off -= 4; -+ auth_off -= 4; -+ } -+ -+ while (crypt_len > 0 || auth_len > 0) { -+ uint32_t *first = data32; -+ mydata.data32[0] = *first; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata.data32[1] = *data32; -+ if (crypt_off <= 0) { -+ if (crypt_len > 0) { -+ CVMX_MT_3DES_ENC_CBC(*data); -+ CVMX_MF_3DES_RESULT(*data); -+ crypt_len -= 8; -+ } -+ } else -+ crypt_off -= 8; -+ if (auth_off <= 0) { -+ if (auth_len > 0) { -+ CVM_LOAD_MD5_UNIT(*data, next); -+ auth_len -= 8; -+ } -+ } else -+ auth_off -= 8; -+ *first = mydata.data32[0]; -+ *data32 = mydata.data32[1]; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_MD5_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVMX_ES64(tmp1, ((alen + 64) << 3)); -+ CVM_LOAD_MD5_UNIT(tmp1, next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_ES64(tmp1, ((64 + 16) << 3)); -+ CVMX_MT_HSH_STARTMD5(tmp1); -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data32, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ icv_off -= 4; -+ } -+ CVMX_MF_HSH_IV(tmp1, 0); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ SG_CONSUME(sg, data32, data_i, data_l); -+ *data32 = (uint32_t) tmp1; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+int -+octo_des_cbc_md5_decrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ union { -+ uint32_t data32[2]; -+ uint64_t data64[1]; -+ } mydata; -+ uint64_t *data = &mydata.data64[0]; -+ uint32_t *data32; -+ uint64_t tmp1, tmp2; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) || -+ (crypt_len & 0x7) || -+ (auth_len & 0x7) || -+ (auth_off & 0x3) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data32, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load 3DES Key */ -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ if (od->octo_encklen == 24) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ } else if (od->octo_encklen == 8) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ -+ CVMX_MT_3DES_IV(* (uint64_t *) ivp); -+ -+ /* Load MD5 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ -+ while (crypt_off > 0 && auth_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ crypt_off -= 4; -+ auth_off -= 4; -+ } -+ -+ while (crypt_len > 0 || auth_len > 0) { -+ uint32_t *first = data32; -+ mydata.data32[0] = *first; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata.data32[1] = *data32; -+ if (auth_off <= 0) { -+ if (auth_len > 0) { -+ CVM_LOAD_MD5_UNIT(*data, next); -+ auth_len -= 8; -+ } -+ } else -+ auth_off -= 8; -+ if (crypt_off <= 0) { -+ if (crypt_len > 0) { -+ CVMX_MT_3DES_DEC_CBC(*data); -+ CVMX_MF_3DES_RESULT(*data); -+ crypt_len -= 8; -+ } -+ } else -+ crypt_off -= 8; -+ *first = mydata.data32[0]; -+ *data32 = mydata.data32[1]; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_MD5_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVMX_ES64(tmp1, ((alen + 64) << 3)); -+ CVM_LOAD_MD5_UNIT(tmp1, next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_ES64(tmp1, ((64 + 16) << 3)); -+ CVMX_MT_HSH_STARTMD5(tmp1); -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data32, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ icv_off -= 4; -+ } -+ CVMX_MF_HSH_IV(tmp1, 0); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ SG_CONSUME(sg, data32, data_i, data_l); -+ *data32 = (uint32_t) tmp1; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+/****************************************************************************/ -+/* DES SHA */ -+ -+int -+octo_des_cbc_sha1_encrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ union { -+ uint32_t data32[2]; -+ uint64_t data64[1]; -+ } mydata; -+ uint64_t *data = &mydata.data64[0]; -+ uint32_t *data32; -+ uint64_t tmp1, tmp2, tmp3; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) || -+ (crypt_len & 0x7) || -+ (auth_len & 0x7) || -+ (auth_off & 0x3) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data32, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load 3DES Key */ -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ if (od->octo_encklen == 24) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ } else if (od->octo_encklen == 8) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ -+ CVMX_MT_3DES_IV(* (uint64_t *) ivp); -+ -+ /* Load SHA1 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hminner[2], 2); -+ -+ while (crypt_off > 0 && auth_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ crypt_off -= 4; -+ auth_off -= 4; -+ } -+ -+ while (crypt_len > 0 || auth_len > 0) { -+ uint32_t *first = data32; -+ mydata.data32[0] = *first; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata.data32[1] = *data32; -+ if (crypt_off <= 0) { -+ if (crypt_len > 0) { -+ CVMX_MT_3DES_ENC_CBC(*data); -+ CVMX_MF_3DES_RESULT(*data); -+ crypt_len -= 8; -+ } -+ } else -+ crypt_off -= 8; -+ if (auth_off <= 0) { -+ if (auth_len > 0) { -+ CVM_LOAD_SHA_UNIT(*data, next); -+ auth_len -= 8; -+ } -+ } else -+ auth_off -= 8; -+ *first = mydata.data32[0]; -+ *data32 = mydata.data32[1]; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_SHA_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ tmp3 = 0; -+ CVMX_MF_HSH_IV(tmp3, 2); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hmouter[2], 2); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ tmp3 |= 0x0000000080000000; -+ CVMX_MT_HSH_DAT(tmp3, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3)); -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data32, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ icv_off -= 4; -+ } -+ CVMX_MF_HSH_IV(tmp1, 0); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ SG_CONSUME(sg, data32, data_i, data_l); -+ *data32 = (uint32_t) tmp1; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+int -+octo_des_cbc_sha1_decrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ union { -+ uint32_t data32[2]; -+ uint64_t data64[1]; -+ } mydata; -+ uint64_t *data = &mydata.data64[0]; -+ uint32_t *data32; -+ uint64_t tmp1, tmp2, tmp3; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) || -+ (crypt_len & 0x7) || -+ (auth_len & 0x7) || -+ (auth_off & 0x3) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data32, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load 3DES Key */ -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ if (od->octo_encklen == 24) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ } else if (od->octo_encklen == 8) { -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1); -+ CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ -+ CVMX_MT_3DES_IV(* (uint64_t *) ivp); -+ -+ /* Load SHA1 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hminner[2], 2); -+ -+ while (crypt_off > 0 && auth_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ crypt_off -= 4; -+ auth_off -= 4; -+ } -+ -+ while (crypt_len > 0 || auth_len > 0) { -+ uint32_t *first = data32; -+ mydata.data32[0] = *first; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata.data32[1] = *data32; -+ if (auth_off <= 0) { -+ if (auth_len > 0) { -+ CVM_LOAD_SHA_UNIT(*data, next); -+ auth_len -= 8; -+ } -+ } else -+ auth_off -= 8; -+ if (crypt_off <= 0) { -+ if (crypt_len > 0) { -+ CVMX_MT_3DES_DEC_CBC(*data); -+ CVMX_MF_3DES_RESULT(*data); -+ crypt_len -= 8; -+ } -+ } else -+ crypt_off -= 8; -+ *first = mydata.data32[0]; -+ *data32 = mydata.data32[1]; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_SHA_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ tmp3 = 0; -+ CVMX_MF_HSH_IV(tmp3, 2); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hmouter[2], 2); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ tmp3 |= 0x0000000080000000; -+ CVMX_MT_HSH_DAT(tmp3, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3)); -+ /* save the HMAC */ -+ SG_INIT(sg, data32, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ icv_off -= 4; -+ } -+ CVMX_MF_HSH_IV(tmp1, 0); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ SG_CONSUME(sg, data32, data_i, data_l); -+ *data32 = (uint32_t) tmp1; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+/****************************************************************************/ -+/* AES MD5 */ -+ -+int -+octo_aes_cbc_md5_encrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ union { -+ uint32_t data32[2]; -+ uint64_t data64[1]; -+ } mydata[2]; -+ uint64_t *pdata = &mydata[0].data64[0]; -+ uint64_t *data = &mydata[1].data64[0]; -+ uint32_t *data32; -+ uint64_t tmp1, tmp2; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) || -+ (crypt_len & 0x7) || -+ (auth_len & 0x7) || -+ (auth_off & 0x3) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data32, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load AES Key */ -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ -+ if (od->octo_encklen == 16) { -+ CVMX_MT_AES_KEY(0x0, 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 24) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 32) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); -+ -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); -+ -+ /* Load MD5 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ -+ while (crypt_off > 0 && auth_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ crypt_off -= 4; -+ auth_off -= 4; -+ } -+ -+ /* align auth and crypt */ -+ while (crypt_off > 0 && auth_len > 0) { -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVM_LOAD_MD5_UNIT(*pdata, next); -+ crypt_off -= 8; -+ auth_len -= 8; -+ } -+ -+ while (crypt_len > 0) { -+ uint32_t *pdata32[3]; -+ -+ pdata32[0] = data32; -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ -+ pdata32[1] = data32; -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ -+ pdata32[2] = data32; -+ mydata[1].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ -+ mydata[1].data32[1] = *data32; -+ -+ CVMX_MT_AES_ENC_CBC0(*pdata); -+ CVMX_MT_AES_ENC_CBC1(*data); -+ CVMX_MF_AES_RESULT(*pdata, 0); -+ CVMX_MF_AES_RESULT(*data, 1); -+ crypt_len -= 16; -+ -+ if (auth_len > 0) { -+ CVM_LOAD_MD5_UNIT(*pdata, next); -+ auth_len -= 8; -+ } -+ if (auth_len > 0) { -+ CVM_LOAD_MD5_UNIT(*data, next); -+ auth_len -= 8; -+ } -+ -+ *pdata32[0] = mydata[0].data32[0]; -+ *pdata32[1] = mydata[0].data32[1]; -+ *pdata32[2] = mydata[1].data32[0]; -+ *data32 = mydata[1].data32[1]; -+ -+ SG_CONSUME(sg, data32, data_i, data_l); -+ } -+ -+ /* finish any left over hashing */ -+ while (auth_len > 0) { -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVM_LOAD_MD5_UNIT(*pdata, next); -+ auth_len -= 8; -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_MD5_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVMX_ES64(tmp1, ((alen + 64) << 3)); -+ CVM_LOAD_MD5_UNIT(tmp1, next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_ES64(tmp1, ((64 + 16) << 3)); -+ CVMX_MT_HSH_STARTMD5(tmp1); -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data32, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ icv_off -= 4; -+ } -+ CVMX_MF_HSH_IV(tmp1, 0); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ SG_CONSUME(sg, data32, data_i, data_l); -+ *data32 = (uint32_t) tmp1; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+int -+octo_aes_cbc_md5_decrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ union { -+ uint32_t data32[2]; -+ uint64_t data64[1]; -+ } mydata[2]; -+ uint64_t *pdata = &mydata[0].data64[0]; -+ uint64_t *data = &mydata[1].data64[0]; -+ uint32_t *data32; -+ uint64_t tmp1, tmp2; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) || -+ (crypt_len & 0x7) || -+ (auth_len & 0x7) || -+ (auth_off & 0x3) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data32, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load AES Key */ -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ -+ if (od->octo_encklen == 16) { -+ CVMX_MT_AES_KEY(0x0, 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 24) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 32) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); -+ -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); -+ -+ /* Load MD5 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ -+ while (crypt_off > 0 && auth_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ crypt_off -= 4; -+ auth_off -= 4; -+ } -+ -+ /* align auth and crypt */ -+ while (crypt_off > 0 && auth_len > 0) { -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVM_LOAD_MD5_UNIT(*pdata, next); -+ crypt_off -= 8; -+ auth_len -= 8; -+ } -+ -+ while (crypt_len > 0) { -+ uint32_t *pdata32[3]; -+ -+ pdata32[0] = data32; -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ pdata32[1] = data32; -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ pdata32[2] = data32; -+ mydata[1].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[1].data32[1] = *data32; -+ -+ if (auth_len > 0) { -+ CVM_LOAD_MD5_UNIT(*pdata, next); -+ auth_len -= 8; -+ } -+ -+ if (auth_len > 0) { -+ CVM_LOAD_MD5_UNIT(*data, next); -+ auth_len -= 8; -+ } -+ -+ CVMX_MT_AES_DEC_CBC0(*pdata); -+ CVMX_MT_AES_DEC_CBC1(*data); -+ CVMX_MF_AES_RESULT(*pdata, 0); -+ CVMX_MF_AES_RESULT(*data, 1); -+ crypt_len -= 16; -+ -+ *pdata32[0] = mydata[0].data32[0]; -+ *pdata32[1] = mydata[0].data32[1]; -+ *pdata32[2] = mydata[1].data32[0]; -+ *data32 = mydata[1].data32[1]; -+ -+ SG_CONSUME(sg, data32, data_i, data_l); -+ } -+ -+ /* finish left over hash if any */ -+ while (auth_len > 0) { -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVM_LOAD_MD5_UNIT(*pdata, next); -+ auth_len -= 8; -+ } -+ -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_MD5_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVMX_ES64(tmp1, ((alen + 64) << 3)); -+ CVM_LOAD_MD5_UNIT(tmp1, next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_ES64(tmp1, ((64 + 16) << 3)); -+ CVMX_MT_HSH_STARTMD5(tmp1); -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data32, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ icv_off -= 4; -+ } -+ CVMX_MF_HSH_IV(tmp1, 0); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ SG_CONSUME(sg, data32, data_i, data_l); -+ *data32 = (uint32_t) tmp1; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+/****************************************************************************/ -+/* AES SHA1 */ -+ -+int -+octo_aes_cbc_sha1_encrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ union { -+ uint32_t data32[2]; -+ uint64_t data64[1]; -+ } mydata[2]; -+ uint64_t *pdata = &mydata[0].data64[0]; -+ uint64_t *data = &mydata[1].data64[0]; -+ uint32_t *data32; -+ uint64_t tmp1, tmp2, tmp3; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s(a_off=%d a_len=%d c_off=%d c_len=%d icv_off=%d)\n", -+ __FUNCTION__, auth_off, auth_len, crypt_off, crypt_len, icv_off); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) || -+ (crypt_len & 0x7) || -+ (auth_len & 0x7) || -+ (auth_off & 0x3) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data32, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load AES Key */ -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ -+ if (od->octo_encklen == 16) { -+ CVMX_MT_AES_KEY(0x0, 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 24) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 32) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); -+ -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); -+ -+ /* Load SHA IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hminner[2], 2); -+ -+ while (crypt_off > 0 && auth_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ crypt_off -= 4; -+ auth_off -= 4; -+ } -+ -+ /* align auth and crypt */ -+ while (crypt_off > 0 && auth_len > 0) { -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVM_LOAD_SHA_UNIT(*pdata, next); -+ crypt_off -= 8; -+ auth_len -= 8; -+ } -+ -+ while (crypt_len > 0) { -+ uint32_t *pdata32[3]; -+ -+ pdata32[0] = data32; -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ pdata32[1] = data32; -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ pdata32[2] = data32; -+ mydata[1].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[1].data32[1] = *data32; -+ -+ CVMX_MT_AES_ENC_CBC0(*pdata); -+ CVMX_MT_AES_ENC_CBC1(*data); -+ CVMX_MF_AES_RESULT(*pdata, 0); -+ CVMX_MF_AES_RESULT(*data, 1); -+ crypt_len -= 16; -+ -+ if (auth_len > 0) { -+ CVM_LOAD_SHA_UNIT(*pdata, next); -+ auth_len -= 8; -+ } -+ if (auth_len > 0) { -+ CVM_LOAD_SHA_UNIT(*data, next); -+ auth_len -= 8; -+ } -+ -+ *pdata32[0] = mydata[0].data32[0]; -+ *pdata32[1] = mydata[0].data32[1]; -+ *pdata32[2] = mydata[1].data32[0]; -+ *data32 = mydata[1].data32[1]; -+ -+ SG_CONSUME(sg, data32, data_i, data_l); -+ } -+ -+ /* finish and hashing */ -+ while (auth_len > 0) { -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVM_LOAD_SHA_UNIT(*pdata, next); -+ auth_len -= 8; -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_SHA_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ tmp3 = 0; -+ CVMX_MF_HSH_IV(tmp3, 2); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hmouter[2], 2); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ tmp3 |= 0x0000000080000000; -+ CVMX_MT_HSH_DAT(tmp3, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3)); -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_MD5_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data32, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ icv_off -= 4; -+ } -+ CVMX_MF_HSH_IV(tmp1, 0); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ SG_CONSUME(sg, data32, data_i, data_l); -+ *data32 = (uint32_t) tmp1; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+int -+octo_aes_cbc_sha1_decrypt( -+ struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp) -+{ -+ register int next = 0; -+ union { -+ uint32_t data32[2]; -+ uint64_t data64[1]; -+ } mydata[2]; -+ uint64_t *pdata = &mydata[0].data64[0]; -+ uint64_t *data = &mydata[1].data64[0]; -+ uint32_t *data32; -+ uint64_t tmp1, tmp2, tmp3; -+ int data_i, data_l, alen = auth_len; -+ struct octeon_cop2_state state; -+ unsigned long flags; -+ -+ dprintk("%s(a_off=%d a_len=%d c_off=%d c_len=%d icv_off=%d)\n", -+ __FUNCTION__, auth_off, auth_len, crypt_off, crypt_len, icv_off); -+ -+ if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL || -+ (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) || -+ (crypt_len & 0x7) || -+ (auth_len & 0x7) || -+ (auth_off & 0x3) || (auth_off + auth_len > sg_len))) { -+ dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d " -+ "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " -+ "icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ return -EINVAL; -+ } -+ -+ SG_INIT(sg, data32, data_i, data_l); -+ -+ CVMX_PREFETCH0(ivp); -+ CVMX_PREFETCH0(od->octo_enckey); -+ -+ flags = octeon_crypto_enable(&state); -+ -+ /* load AES Key */ -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); -+ -+ if (od->octo_encklen == 16) { -+ CVMX_MT_AES_KEY(0x0, 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 24) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(0x0, 3); -+ } else if (od->octo_encklen == 32) { -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); -+ CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); -+ } else { -+ octeon_crypto_disable(&state, flags); -+ dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen); -+ return -EINVAL; -+ } -+ CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); -+ -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); -+ CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); -+ -+ /* Load SHA1 IV */ -+ CVMX_MT_HSH_IV(od->octo_hminner[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hminner[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hminner[2], 2); -+ -+ while (crypt_off > 0 && auth_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ crypt_off -= 4; -+ auth_off -= 4; -+ } -+ -+ /* align auth and crypt */ -+ while (crypt_off > 0 && auth_len > 0) { -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVM_LOAD_SHA_UNIT(*pdata, next); -+ crypt_off -= 8; -+ auth_len -= 8; -+ } -+ -+ while (crypt_len > 0) { -+ uint32_t *pdata32[3]; -+ -+ pdata32[0] = data32; -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ pdata32[1] = data32; -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ pdata32[2] = data32; -+ mydata[1].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[1].data32[1] = *data32; -+ -+ if (auth_len > 0) { -+ CVM_LOAD_SHA_UNIT(*pdata, next); -+ auth_len -= 8; -+ } -+ if (auth_len > 0) { -+ CVM_LOAD_SHA_UNIT(*data, next); -+ auth_len -= 8; -+ } -+ -+ CVMX_MT_AES_DEC_CBC0(*pdata); -+ CVMX_MT_AES_DEC_CBC1(*data); -+ CVMX_MF_AES_RESULT(*pdata, 0); -+ CVMX_MF_AES_RESULT(*data, 1); -+ crypt_len -= 16; -+ -+ *pdata32[0] = mydata[0].data32[0]; -+ *pdata32[1] = mydata[0].data32[1]; -+ *pdata32[2] = mydata[1].data32[0]; -+ *data32 = mydata[1].data32[1]; -+ -+ SG_CONSUME(sg, data32, data_i, data_l); -+ } -+ -+ /* finish and leftover hashing */ -+ while (auth_len > 0) { -+ mydata[0].data32[0] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ mydata[0].data32[1] = *data32; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVM_LOAD_SHA_UNIT(*pdata, next); -+ auth_len -= 8; -+ } -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_SHA_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* Finish Inner hash */ -+ while (next != 7) { -+ CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next); -+ } -+ CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next); -+ -+ /* Get the inner hash of HMAC */ -+ CVMX_MF_HSH_IV(tmp1, 0); -+ CVMX_MF_HSH_IV(tmp2, 1); -+ tmp3 = 0; -+ CVMX_MF_HSH_IV(tmp3, 2); -+ -+ /* Initialize hash unit */ -+ CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); -+ CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); -+ CVMX_MT_HSH_IV(od->octo_hmouter[2], 2); -+ -+ CVMX_MT_HSH_DAT(tmp1, 0); -+ CVMX_MT_HSH_DAT(tmp2, 1); -+ tmp3 |= 0x0000000080000000; -+ CVMX_MT_HSH_DAT(tmp3, 2); -+ CVMX_MT_HSH_DATZ(3); -+ CVMX_MT_HSH_DATZ(4); -+ CVMX_MT_HSH_DATZ(5); -+ CVMX_MT_HSH_DATZ(6); -+ CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3)); -+ -+ /* finish the hash */ -+ CVMX_PREFETCH0(od->octo_hmouter); -+#if 0 -+ if (unlikely(inplen)) { -+ uint64_t tmp = 0; -+ uint8_t *p = (uint8_t *) & tmp; -+ p[inplen] = 0x80; -+ do { -+ inplen--; -+ p[inplen] = ((uint8_t *) data)[inplen]; -+ } while (inplen); -+ CVM_LOAD_MD5_UNIT(tmp, next); -+ } else { -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+ } -+#else -+ CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -+#endif -+ -+ /* save the HMAC */ -+ SG_INIT(sg, data32, data_i, data_l); -+ while (icv_off > 0) { -+ SG_CONSUME(sg, data32, data_i, data_l); -+ icv_off -= 4; -+ } -+ CVMX_MF_HSH_IV(tmp1, 0); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ SG_CONSUME(sg, data32, data_i, data_l); -+ *data32 = (uint32_t) tmp1; -+ SG_CONSUME(sg, data32, data_i, data_l); -+ CVMX_MF_HSH_IV(tmp1, 1); -+ *data32 = (uint32_t) (tmp1 >> 32); -+ -+ octeon_crypto_disable(&state, flags); -+ return 0; -+} -+ -+/****************************************************************************/ -diff --git a/crypto/ocf/cryptocteon/cryptocteon.c b/crypto/ocf/cryptocteon/cryptocteon.c -new file mode 100644 -index 0000000..9940f59 ---- /dev/null -+++ b/crypto/ocf/cryptocteon/cryptocteon.c -@@ -0,0 +1,574 @@ -+/* -+ * Octeon Crypto for OCF -+ * -+ * Written by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2009-2010 David McCullough -+ * -+ * LICENSE TERMS -+ * -+ * The free distribution and use of this software in both source and binary -+ * form is allowed (with or without changes) provided that: -+ * -+ * 1. distributions of this source code include the above copyright -+ * notice, this list of conditions and the following disclaimer; -+ * -+ * 2. distributions in binary form include the above copyright -+ * notice, this list of conditions and the following disclaimer -+ * in the documentation and/or other associated materials; -+ * -+ * 3. the copyright holder's name is not used to endorse products -+ * built using this software without specific written permission. -+ * -+ * DISCLAIMER -+ * -+ * This software is provided 'as is' with no explicit or implied warranties -+ * in respect of its properties, including, but not limited to, correctness -+ * and/or fitness for purpose. -+ * --------------------------------------------------------------------------- -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/sched.h> -+#include <linux/wait.h> -+#include <linux/crypto.h> -+#include <linux/mm.h> -+#include <linux/skbuff.h> -+#include <linux/random.h> -+#include <linux/scatterlist.h> -+ -+#include <cryptodev.h> -+#include <uio.h> -+ -+struct { -+ softc_device_decl sc_dev; -+} octo_softc; -+ -+#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK) -+ -+struct octo_sess { -+ int octo_encalg; -+ #define MAX_CIPHER_KEYLEN 64 -+ char octo_enckey[MAX_CIPHER_KEYLEN]; -+ int octo_encklen; -+ -+ int octo_macalg; -+ #define MAX_HASH_KEYLEN 64 -+ char octo_mackey[MAX_HASH_KEYLEN]; -+ int octo_macklen; -+ int octo_mackey_set; -+ -+ int octo_mlen; -+ int octo_ivsize; -+ -+#if 0 -+ int (*octo_decrypt)(struct scatterlist *sg, int sg_len, -+ uint8_t *key, int key_len, uint8_t * iv, -+ uint64_t *hminner, uint64_t *hmouter); -+ -+ int (*octo_encrypt)(struct scatterlist *sg, int sg_len, -+ uint8_t *key, int key_len, uint8_t * iv, -+ uint64_t *hminner, uint64_t *hmouter); -+#else -+ int (*octo_encrypt)(struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp); -+ int (*octo_decrypt)(struct octo_sess *od, -+ struct scatterlist *sg, int sg_len, -+ int auth_off, int auth_len, -+ int crypt_off, int crypt_len, -+ int icv_off, uint8_t *ivp); -+#endif -+ -+ uint64_t octo_hminner[3]; -+ uint64_t octo_hmouter[3]; -+}; -+ -+int32_t octo_id = -1; -+module_param(octo_id, int, 0444); -+MODULE_PARM_DESC(octo_id, "Read-Only OCF ID for cryptocteon driver"); -+ -+static struct octo_sess **octo_sessions = NULL; -+static u_int32_t octo_sesnum = 0; -+ -+static int octo_process(device_t, struct cryptop *, int); -+static int octo_newsession(device_t, u_int32_t *, struct cryptoini *); -+static int octo_freesession(device_t, u_int64_t); -+ -+static device_method_t octo_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, octo_newsession), -+ DEVMETHOD(cryptodev_freesession,octo_freesession), -+ DEVMETHOD(cryptodev_process, octo_process), -+}; -+ -+#define debug octo_debug -+int octo_debug = 0; -+module_param(octo_debug, int, 0644); -+MODULE_PARM_DESC(octo_debug, "Enable debug"); -+ -+ -+#include "cavium_crypto.c" -+ -+ -+/* -+ * Generate a new octo session. We artifically limit it to a single -+ * hash/cipher or hash-cipher combo just to make it easier, most callers -+ * do not expect more than this anyway. -+ */ -+static int -+octo_newsession(device_t dev, u_int32_t *sid, struct cryptoini *cri) -+{ -+ struct cryptoini *c, *encini = NULL, *macini = NULL; -+ struct octo_sess **ocd; -+ int i; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid == NULL || cri == NULL) { -+ dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ /* -+ * To keep it simple, we only handle hash, cipher or hash/cipher in a -+ * session, you cannot currently do multiple ciphers/hashes in one -+ * session even though it would be possibel to code this driver to -+ * handle it. -+ */ -+ for (i = 0, c = cri; c && i < 2; i++) { -+ if (c->cri_alg == CRYPTO_MD5_HMAC || -+ c->cri_alg == CRYPTO_SHA1_HMAC || -+ c->cri_alg == CRYPTO_NULL_HMAC) { -+ if (macini) { -+ break; -+ } -+ macini = c; -+ } -+ if (c->cri_alg == CRYPTO_DES_CBC || -+ c->cri_alg == CRYPTO_3DES_CBC || -+ c->cri_alg == CRYPTO_AES_CBC || -+ c->cri_alg == CRYPTO_NULL_CBC) { -+ if (encini) { -+ break; -+ } -+ encini = c; -+ } -+ c = c->cri_next; -+ } -+ if (!macini && !encini) { -+ dprintk("%s,%d - EINVAL bad cipher/hash or combination\n", -+ __FILE__, __LINE__); -+ return EINVAL; -+ } -+ if (c) { -+ dprintk("%s,%d - EINVAL cannot handle chained cipher/hash combos\n", -+ __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ /* -+ * So we have something we can do, lets setup the session -+ */ -+ -+ if (octo_sessions) { -+ for (i = 1; i < octo_sesnum; i++) -+ if (octo_sessions[i] == NULL) -+ break; -+ } else -+ i = 1; /* NB: to silence compiler warning */ -+ -+ if (octo_sessions == NULL || i == octo_sesnum) { -+ if (octo_sessions == NULL) { -+ i = 1; /* We leave octo_sessions[0] empty */ -+ octo_sesnum = CRYPTO_SW_SESSIONS; -+ } else -+ octo_sesnum *= 2; -+ -+ ocd = kmalloc(octo_sesnum * sizeof(struct octo_sess *), SLAB_ATOMIC); -+ if (ocd == NULL) { -+ /* Reset session number */ -+ if (octo_sesnum == CRYPTO_SW_SESSIONS) -+ octo_sesnum = 0; -+ else -+ octo_sesnum /= 2; -+ dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ memset(ocd, 0, octo_sesnum * sizeof(struct octo_sess *)); -+ -+ /* Copy existing sessions */ -+ if (octo_sessions) { -+ memcpy(ocd, octo_sessions, -+ (octo_sesnum / 2) * sizeof(struct octo_sess *)); -+ kfree(octo_sessions); -+ } -+ -+ octo_sessions = ocd; -+ } -+ -+ ocd = &octo_sessions[i]; -+ *sid = i; -+ -+ -+ *ocd = (struct octo_sess *) kmalloc(sizeof(struct octo_sess), SLAB_ATOMIC); -+ if (*ocd == NULL) { -+ octo_freesession(NULL, i); -+ dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ memset(*ocd, 0, sizeof(struct octo_sess)); -+ -+ if (encini && encini->cri_key) { -+ (*ocd)->octo_encklen = (encini->cri_klen + 7) / 8; -+ memcpy((*ocd)->octo_enckey, encini->cri_key, (*ocd)->octo_encklen); -+ } -+ -+ if (macini && macini->cri_key) { -+ (*ocd)->octo_macklen = (macini->cri_klen + 7) / 8; -+ memcpy((*ocd)->octo_mackey, macini->cri_key, (*ocd)->octo_macklen); -+ } -+ -+ (*ocd)->octo_mlen = 0; -+ if (encini && encini->cri_mlen) -+ (*ocd)->octo_mlen = encini->cri_mlen; -+ else if (macini && macini->cri_mlen) -+ (*ocd)->octo_mlen = macini->cri_mlen; -+ else -+ (*ocd)->octo_mlen = 12; -+ -+ /* -+ * point c at the enc if it exists, otherwise the mac -+ */ -+ c = encini ? encini : macini; -+ -+ switch (c->cri_alg) { -+ case CRYPTO_DES_CBC: -+ case CRYPTO_3DES_CBC: -+ (*ocd)->octo_ivsize = 8; -+ switch (macini ? macini->cri_alg : -1) { -+ case CRYPTO_MD5_HMAC: -+ (*ocd)->octo_encrypt = octo_des_cbc_md5_encrypt; -+ (*ocd)->octo_decrypt = octo_des_cbc_md5_decrypt; -+ octo_calc_hash(0, macini->cri_key, (*ocd)->octo_hminner, -+ (*ocd)->octo_hmouter); -+ break; -+ case CRYPTO_SHA1_HMAC: -+ (*ocd)->octo_encrypt = octo_des_cbc_sha1_encrypt; -+ (*ocd)->octo_decrypt = octo_des_cbc_sha1_encrypt; -+ octo_calc_hash(1, macini->cri_key, (*ocd)->octo_hminner, -+ (*ocd)->octo_hmouter); -+ break; -+ case -1: -+ (*ocd)->octo_encrypt = octo_des_cbc_encrypt; -+ (*ocd)->octo_decrypt = octo_des_cbc_decrypt; -+ break; -+ default: -+ octo_freesession(NULL, i); -+ dprintk("%s,%d: EINVALn", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ break; -+ case CRYPTO_AES_CBC: -+ (*ocd)->octo_ivsize = 16; -+ switch (macini ? macini->cri_alg : -1) { -+ case CRYPTO_MD5_HMAC: -+ (*ocd)->octo_encrypt = octo_aes_cbc_md5_encrypt; -+ (*ocd)->octo_decrypt = octo_aes_cbc_md5_decrypt; -+ octo_calc_hash(0, macini->cri_key, (*ocd)->octo_hminner, -+ (*ocd)->octo_hmouter); -+ break; -+ case CRYPTO_SHA1_HMAC: -+ (*ocd)->octo_encrypt = octo_aes_cbc_sha1_encrypt; -+ (*ocd)->octo_decrypt = octo_aes_cbc_sha1_decrypt; -+ octo_calc_hash(1, macini->cri_key, (*ocd)->octo_hminner, -+ (*ocd)->octo_hmouter); -+ break; -+ case -1: -+ (*ocd)->octo_encrypt = octo_aes_cbc_encrypt; -+ (*ocd)->octo_decrypt = octo_aes_cbc_decrypt; -+ break; -+ default: -+ octo_freesession(NULL, i); -+ dprintk("%s,%d: EINVALn", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ break; -+ case CRYPTO_MD5_HMAC: -+ (*ocd)->octo_encrypt = octo_null_md5_encrypt; -+ (*ocd)->octo_decrypt = octo_null_md5_encrypt; -+ octo_calc_hash(0, macini->cri_key, (*ocd)->octo_hminner, -+ (*ocd)->octo_hmouter); -+ break; -+ case CRYPTO_SHA1_HMAC: -+ (*ocd)->octo_encrypt = octo_null_sha1_encrypt; -+ (*ocd)->octo_decrypt = octo_null_sha1_encrypt; -+ octo_calc_hash(1, macini->cri_key, (*ocd)->octo_hminner, -+ (*ocd)->octo_hmouter); -+ break; -+ default: -+ octo_freesession(NULL, i); -+ dprintk("%s,%d: EINVALn", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ (*ocd)->octo_encalg = encini ? encini->cri_alg : -1; -+ (*ocd)->octo_macalg = macini ? macini->cri_alg : -1; -+ -+ return 0; -+} -+ -+/* -+ * Free a session. -+ */ -+static int -+octo_freesession(device_t dev, u_int64_t tid) -+{ -+ u_int32_t sid = CRYPTO_SESID2LID(tid); -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid > octo_sesnum || octo_sessions == NULL || -+ octo_sessions[sid] == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return(EINVAL); -+ } -+ -+ /* Silently accept and return */ -+ if (sid == 0) -+ return(0); -+ -+ if (octo_sessions[sid]) -+ kfree(octo_sessions[sid]); -+ octo_sessions[sid] = NULL; -+ return 0; -+} -+ -+/* -+ * Process a request. -+ */ -+static int -+octo_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ struct cryptodesc *crd; -+ struct octo_sess *od; -+ u_int32_t lid; -+#define SCATTERLIST_MAX 16 -+ struct scatterlist sg[SCATTERLIST_MAX]; -+ int sg_num, sg_len; -+ struct sk_buff *skb = NULL; -+ struct uio *uiop = NULL; -+ struct cryptodesc *enccrd = NULL, *maccrd = NULL; -+ unsigned char *ivp = NULL; -+ unsigned char iv_data[HASH_MAX_LEN]; -+ int auth_off = 0, auth_len = 0, crypt_off = 0, crypt_len = 0, icv_off = 0; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ /* Sanity check */ -+ if (crp == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ crp->crp_etype = 0; -+ -+ if (crp->crp_desc == NULL || crp->crp_buf == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+ lid = crp->crp_sid & 0xffffffff; -+ if (lid >= octo_sesnum || lid == 0 || octo_sessions == NULL || -+ octo_sessions[lid] == NULL) { -+ crp->crp_etype = ENOENT; -+ dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__); -+ goto done; -+ } -+ od = octo_sessions[lid]; -+ -+ /* -+ * do some error checking outside of the loop for SKB and IOV processing -+ * this leaves us with valid skb or uiop pointers for later -+ */ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ skb = (struct sk_buff *) crp->crp_buf; -+ if (skb_shinfo(skb)->nr_frags >= SCATTERLIST_MAX) { -+ printk("%s,%d: %d nr_frags > SCATTERLIST_MAX", __FILE__, __LINE__, -+ skb_shinfo(skb)->nr_frags); -+ goto done; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ uiop = (struct uio *) crp->crp_buf; -+ if (uiop->uio_iovcnt > SCATTERLIST_MAX) { -+ printk("%s,%d: %d uio_iovcnt > SCATTERLIST_MAX", __FILE__, __LINE__, -+ uiop->uio_iovcnt); -+ goto done; -+ } -+ } -+ -+ /* point our enccrd and maccrd appropriately */ -+ crd = crp->crp_desc; -+ if (crd->crd_alg == od->octo_encalg) enccrd = crd; -+ if (crd->crd_alg == od->octo_macalg) maccrd = crd; -+ crd = crd->crd_next; -+ if (crd) { -+ if (crd->crd_alg == od->octo_encalg) enccrd = crd; -+ if (crd->crd_alg == od->octo_macalg) maccrd = crd; -+ crd = crd->crd_next; -+ } -+ if (crd) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: ENOENT - descriptors do not match session\n", -+ __FILE__, __LINE__); -+ goto done; -+ } -+ -+ if (enccrd) { -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) { -+ ivp = enccrd->crd_iv; -+ } else { -+ ivp = iv_data; -+ crypto_copydata(crp->crp_flags, crp->crp_buf, -+ enccrd->crd_inject, od->octo_ivsize, (caddr_t) ivp); -+ } -+ -+ if (maccrd) { -+ auth_off = maccrd->crd_skip; -+ auth_len = maccrd->crd_len; -+ icv_off = maccrd->crd_inject; -+ } -+ -+ crypt_off = enccrd->crd_skip; -+ crypt_len = enccrd->crd_len; -+ } else { /* if (maccrd) */ -+ auth_off = maccrd->crd_skip; -+ auth_len = maccrd->crd_len; -+ icv_off = maccrd->crd_inject; -+ } -+ -+ -+ /* -+ * setup the SG list to cover the buffer -+ */ -+ memset(sg, 0, sizeof(sg)); -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ int i, len; -+ -+ sg_num = 0; -+ sg_len = 0; -+ -+ len = skb_headlen(skb); -+ sg_set_page(&sg[sg_num], virt_to_page(skb->data), len, -+ offset_in_page(skb->data)); -+ sg_len += len; -+ sg_num++; -+ -+ for (i = 0; i < skb_shinfo(skb)->nr_frags && sg_num < SCATTERLIST_MAX; -+ i++) { -+ len = skb_shinfo(skb)->frags[i].size; -+ sg_set_page(&sg[sg_num], skb_shinfo(skb)->frags[i].page, -+ len, skb_shinfo(skb)->frags[i].page_offset); -+ sg_len += len; -+ sg_num++; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ int len; -+ -+ sg_len = 0; -+ for (sg_num = 0; sg_len < crp->crp_ilen && -+ sg_num < uiop->uio_iovcnt && -+ sg_num < SCATTERLIST_MAX; sg_num++) { -+ len = uiop->uio_iov[sg_num].iov_len; -+ sg_set_page(&sg[sg_num], -+ virt_to_page(uiop->uio_iov[sg_num].iov_base), len, -+ offset_in_page(uiop->uio_iov[sg_num].iov_base)); -+ sg_len += len; -+ } -+ } else { -+ sg_len = crp->crp_ilen; -+ sg_set_page(&sg[0], virt_to_page(crp->crp_buf), sg_len, -+ offset_in_page(crp->crp_buf)); -+ sg_num = 1; -+ } -+ -+ -+ /* -+ * setup a new explicit key -+ */ -+ if (enccrd) { -+ if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) { -+ od->octo_encklen = (enccrd->crd_klen + 7) / 8; -+ memcpy(od->octo_enckey, enccrd->crd_key, od->octo_encklen); -+ } -+ } -+ if (maccrd) { -+ if (maccrd->crd_flags & CRD_F_KEY_EXPLICIT) { -+ od->octo_macklen = (maccrd->crd_klen + 7) / 8; -+ memcpy(od->octo_mackey, maccrd->crd_key, od->octo_macklen); -+ od->octo_mackey_set = 0; -+ } -+ if (!od->octo_mackey_set) { -+ octo_calc_hash(maccrd->crd_alg == CRYPTO_MD5_HMAC ? 0 : 1, -+ maccrd->crd_key, od->octo_hminner, od->octo_hmouter); -+ od->octo_mackey_set = 1; -+ } -+ } -+ -+ -+ if (!enccrd || (enccrd->crd_flags & CRD_F_ENCRYPT)) -+ (*od->octo_encrypt)(od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ else -+ (*od->octo_decrypt)(od, sg, sg_len, -+ auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp); -+ -+done: -+ crypto_done(crp); -+ return 0; -+} -+ -+static int -+cryptocteon_init(void) -+{ -+ dprintk("%s(%p)\n", __FUNCTION__, cryptocteon_init); -+ -+ softc_device_init(&octo_softc, "cryptocteon", 0, octo_methods); -+ -+ octo_id = crypto_get_driverid(softc_get_device(&octo_softc), -+ CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SYNC); -+ if (octo_id < 0) { -+ printk("Cryptocteon device cannot initialize!"); -+ return -ENODEV; -+ } -+ -+ crypto_register(octo_id, CRYPTO_MD5_HMAC, 0,0); -+ crypto_register(octo_id, CRYPTO_SHA1_HMAC, 0,0); -+ //crypto_register(octo_id, CRYPTO_MD5, 0,0); -+ //crypto_register(octo_id, CRYPTO_SHA1, 0,0); -+ crypto_register(octo_id, CRYPTO_DES_CBC, 0,0); -+ crypto_register(octo_id, CRYPTO_3DES_CBC, 0,0); -+ crypto_register(octo_id, CRYPTO_AES_CBC, 0,0); -+ -+ return(0); -+} -+ -+static void -+cryptocteon_exit(void) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ crypto_unregister_all(octo_id); -+ octo_id = -1; -+} -+ -+module_init(cryptocteon_init); -+module_exit(cryptocteon_exit); -+ -+MODULE_LICENSE("BSD"); -+MODULE_AUTHOR("David McCullough <david_mccullough@mcafee.com>"); -+MODULE_DESCRIPTION("Cryptocteon (OCF module for Cavium OCTEON crypto)"); -diff --git a/crypto/ocf/cryptodev.c b/crypto/ocf/cryptodev.c -new file mode 100644 -index 0000000..d20da17 ---- /dev/null -+++ b/crypto/ocf/cryptodev.c -@@ -0,0 +1,1061 @@ -+/* $OpenBSD: cryptodev.c,v 1.52 2002/06/19 07:22:46 deraadt Exp $ */ -+ -+/*- -+ * Linux port done by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * The license and original author are listed below. -+ * -+ * Copyright (c) 2001 Theo de Raadt -+ * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored in part by the Defense Advanced Research Projects -+ * Agency (DARPA) and Air Force Research Laboratory, Air Force -+ * Materiel Command, USAF, under agreement number F30602-01-2-0537. -+ * -+__FBSDID("$FreeBSD: src/sys/opencrypto/cryptodev.c,v 1.34 2007/05/09 19:37:02 gnn Exp $"); -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/types.h> -+#include <linux/time.h> -+#include <linux/delay.h> -+#include <linux/list.h> -+#include <linux/init.h> -+#include <linux/sched.h> -+#include <linux/unistd.h> -+#include <linux/module.h> -+#include <linux/wait.h> -+#include <linux/slab.h> -+#include <linux/fs.h> -+#include <linux/dcache.h> -+#include <linux/file.h> -+#include <linux/mount.h> -+#include <linux/miscdevice.h> -+#include <linux/version.h> -+#include <asm/uaccess.h> -+ -+#include <cryptodev.h> -+#include <uio.h> -+ -+extern asmlinkage long sys_dup(unsigned int fildes); -+ -+#define debug cryptodev_debug -+int cryptodev_debug = 0; -+module_param(cryptodev_debug, int, 0644); -+MODULE_PARM_DESC(cryptodev_debug, "Enable cryptodev debug"); -+ -+struct csession_info { -+ u_int16_t blocksize; -+ u_int16_t minkey, maxkey; -+ -+ u_int16_t keysize; -+ /* u_int16_t hashsize; */ -+ u_int16_t authsize; -+ u_int16_t authkey; -+ /* u_int16_t ctxsize; */ -+}; -+ -+struct csession { -+ struct list_head list; -+ u_int64_t sid; -+ u_int32_t ses; -+ -+ wait_queue_head_t waitq; -+ -+ u_int32_t cipher; -+ -+ u_int32_t mac; -+ -+ caddr_t key; -+ int keylen; -+ u_char tmp_iv[EALG_MAX_BLOCK_LEN]; -+ -+ caddr_t mackey; -+ int mackeylen; -+ -+ struct csession_info info; -+ -+ struct iovec iovec; -+ struct uio uio; -+ int error; -+}; -+ -+struct fcrypt { -+ struct list_head csessions; -+ int sesn; -+}; -+ -+static struct csession *csefind(struct fcrypt *, u_int); -+static int csedelete(struct fcrypt *, struct csession *); -+static struct csession *cseadd(struct fcrypt *, struct csession *); -+static struct csession *csecreate(struct fcrypt *, u_int64_t, -+ struct cryptoini *crie, struct cryptoini *cria, struct csession_info *); -+static int csefree(struct csession *); -+ -+static int cryptodev_op(struct csession *, struct crypt_op *); -+static int cryptodev_key(struct crypt_kop *); -+static int cryptodev_find(struct crypt_find_op *); -+ -+static int cryptodev_cb(void *); -+static int cryptodev_open(struct inode *inode, struct file *filp); -+ -+/* -+ * Check a crypto identifier to see if it requested -+ * a valid crid and it's capabilities match. -+ */ -+static int -+checkcrid(int crid) -+{ -+ int hid = crid & ~(CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_HARDWARE); -+ int typ = crid & (CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_HARDWARE); -+ int caps = 0; -+ -+ /* if the user hasn't selected a driver, then just call newsession */ -+ if (hid == 0 && typ != 0) -+ return 0; -+ -+ caps = crypto_getcaps(hid); -+ -+ /* didn't find anything with capabilities */ -+ if (caps == 0) { -+ dprintk("%s: hid=%x typ=%x not matched\n", __FUNCTION__, hid, typ); -+ return EINVAL; -+ } -+ -+ /* the user didn't specify SW or HW, so the driver is ok */ -+ if (typ == 0) -+ return 0; -+ -+ /* if the type specified didn't match */ -+ if (typ != (caps & (CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_HARDWARE))) { -+ dprintk("%s: hid=%x typ=%x caps=%x not matched\n", __FUNCTION__, -+ hid, typ, caps); -+ return EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int -+cryptodev_op(struct csession *cse, struct crypt_op *cop) -+{ -+ struct cryptop *crp = NULL; -+ struct cryptodesc *crde = NULL, *crda = NULL; -+ int error = 0; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (cop->len > CRYPTO_MAX_DATA_LEN) { -+ dprintk("%s: %d > %d\n", __FUNCTION__, cop->len, CRYPTO_MAX_DATA_LEN); -+ return (E2BIG); -+ } -+ -+ if (cse->info.blocksize && (cop->len % cse->info.blocksize) != 0) { -+ dprintk("%s: blocksize=%d len=%d\n", __FUNCTION__, cse->info.blocksize, -+ cop->len); -+ return (EINVAL); -+ } -+ -+ cse->uio.uio_iov = &cse->iovec; -+ cse->uio.uio_iovcnt = 1; -+ cse->uio.uio_offset = 0; -+#if 0 -+ cse->uio.uio_resid = cop->len; -+ cse->uio.uio_segflg = UIO_SYSSPACE; -+ cse->uio.uio_rw = UIO_WRITE; -+ cse->uio.uio_td = td; -+#endif -+ cse->uio.uio_iov[0].iov_len = cop->len; -+ if (cse->info.authsize) -+ cse->uio.uio_iov[0].iov_len += cse->info.authsize; -+ cse->uio.uio_iov[0].iov_base = kmalloc(cse->uio.uio_iov[0].iov_len, -+ GFP_KERNEL); -+ -+ if (cse->uio.uio_iov[0].iov_base == NULL) { -+ dprintk("%s: iov_base kmalloc(%d) failed\n", __FUNCTION__, -+ (int)cse->uio.uio_iov[0].iov_len); -+ return (ENOMEM); -+ } -+ -+ crp = crypto_getreq((cse->info.blocksize != 0) + (cse->info.authsize != 0)); -+ if (crp == NULL) { -+ dprintk("%s: ENOMEM\n", __FUNCTION__); -+ error = ENOMEM; -+ goto bail; -+ } -+ -+ if (cse->info.authsize && cse->info.blocksize) { -+ if (cop->op == COP_ENCRYPT) { -+ crde = crp->crp_desc; -+ crda = crde->crd_next; -+ } else { -+ crda = crp->crp_desc; -+ crde = crda->crd_next; -+ } -+ } else if (cse->info.authsize) { -+ crda = crp->crp_desc; -+ } else if (cse->info.blocksize) { -+ crde = crp->crp_desc; -+ } else { -+ dprintk("%s: bad request\n", __FUNCTION__); -+ error = EINVAL; -+ goto bail; -+ } -+ -+ if ((error = copy_from_user(cse->uio.uio_iov[0].iov_base, cop->src, -+ cop->len))) { -+ dprintk("%s: bad copy\n", __FUNCTION__); -+ goto bail; -+ } -+ -+ if (crda) { -+ crda->crd_skip = 0; -+ crda->crd_len = cop->len; -+ crda->crd_inject = cop->len; -+ -+ crda->crd_alg = cse->mac; -+ crda->crd_key = cse->mackey; -+ crda->crd_klen = cse->mackeylen * 8; -+ } -+ -+ if (crde) { -+ if (cop->op == COP_ENCRYPT) -+ crde->crd_flags |= CRD_F_ENCRYPT; -+ else -+ crde->crd_flags &= ~CRD_F_ENCRYPT; -+ crde->crd_len = cop->len; -+ crde->crd_inject = 0; -+ -+ crde->crd_alg = cse->cipher; -+ crde->crd_key = cse->key; -+ crde->crd_klen = cse->keylen * 8; -+ } -+ -+ crp->crp_ilen = cse->uio.uio_iov[0].iov_len; -+ crp->crp_flags = CRYPTO_F_IOV | CRYPTO_F_CBIMM -+ | (cop->flags & COP_F_BATCH); -+ crp->crp_buf = (caddr_t)&cse->uio; -+ crp->crp_callback = (int (*) (struct cryptop *)) cryptodev_cb; -+ crp->crp_sid = cse->sid; -+ crp->crp_opaque = (void *)cse; -+ -+ if (cop->iv) { -+ if (crde == NULL) { -+ error = EINVAL; -+ dprintk("%s no crde\n", __FUNCTION__); -+ goto bail; -+ } -+ if (cse->cipher == CRYPTO_ARC4) { /* XXX use flag? */ -+ error = EINVAL; -+ dprintk("%s arc4 with IV\n", __FUNCTION__); -+ goto bail; -+ } -+ if ((error = copy_from_user(cse->tmp_iv, cop->iv, -+ cse->info.blocksize))) { -+ dprintk("%s bad iv copy\n", __FUNCTION__); -+ goto bail; -+ } -+ memcpy(crde->crd_iv, cse->tmp_iv, cse->info.blocksize); -+ crde->crd_flags |= CRD_F_IV_EXPLICIT | CRD_F_IV_PRESENT; -+ crde->crd_skip = 0; -+ } else if (cse->cipher == CRYPTO_ARC4) { /* XXX use flag? */ -+ crde->crd_skip = 0; -+ } else if (crde) { -+ crde->crd_flags |= CRD_F_IV_PRESENT; -+ crde->crd_skip = cse->info.blocksize; -+ crde->crd_len -= cse->info.blocksize; -+ } -+ -+ if (cop->mac && crda == NULL) { -+ error = EINVAL; -+ dprintk("%s no crda\n", __FUNCTION__); -+ goto bail; -+ } -+ -+ /* -+ * Let the dispatch run unlocked, then, interlock against the -+ * callback before checking if the operation completed and going -+ * to sleep. This insures drivers don't inherit our lock which -+ * results in a lock order reversal between crypto_dispatch forced -+ * entry and the crypto_done callback into us. -+ */ -+ error = crypto_dispatch(crp); -+ if (error) { -+ dprintk("%s error in crypto_dispatch\n", __FUNCTION__); -+ goto bail; -+ } -+ -+ dprintk("%s about to WAIT\n", __FUNCTION__); -+ /* -+ * we really need to wait for driver to complete to maintain -+ * state, luckily interrupts will be remembered -+ */ -+ do { -+ error = wait_event_interruptible(crp->crp_waitq, -+ ((crp->crp_flags & CRYPTO_F_DONE) != 0)); -+ /* -+ * we can't break out of this loop or we will leave behind -+ * a huge mess, however, staying here means if your driver -+ * is broken user applications can hang and not be killed. -+ * The solution, fix your driver :-) -+ */ -+ if (error) { -+ schedule(); -+ error = 0; -+ } -+ } while ((crp->crp_flags & CRYPTO_F_DONE) == 0); -+ dprintk("%s finished WAITING error=%d\n", __FUNCTION__, error); -+ -+ if (crp->crp_etype != 0) { -+ error = crp->crp_etype; -+ dprintk("%s error in crp processing\n", __FUNCTION__); -+ goto bail; -+ } -+ -+ if (cse->error) { -+ error = cse->error; -+ dprintk("%s error in cse processing\n", __FUNCTION__); -+ goto bail; -+ } -+ -+ if (cop->dst && (error = copy_to_user(cop->dst, -+ cse->uio.uio_iov[0].iov_base, cop->len))) { -+ dprintk("%s bad dst copy\n", __FUNCTION__); -+ goto bail; -+ } -+ -+ if (cop->mac && -+ (error=copy_to_user(cop->mac, -+ (caddr_t)cse->uio.uio_iov[0].iov_base + cop->len, -+ cse->info.authsize))) { -+ dprintk("%s bad mac copy\n", __FUNCTION__); -+ goto bail; -+ } -+ -+bail: -+ if (crp) -+ crypto_freereq(crp); -+ if (cse->uio.uio_iov[0].iov_base) -+ kfree(cse->uio.uio_iov[0].iov_base); -+ -+ return (error); -+} -+ -+static int -+cryptodev_cb(void *op) -+{ -+ struct cryptop *crp = (struct cryptop *) op; -+ struct csession *cse = (struct csession *)crp->crp_opaque; -+ int error; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ error = crp->crp_etype; -+ if (error == EAGAIN) { -+ crp->crp_flags &= ~CRYPTO_F_DONE; -+#ifdef NOTYET -+ /* -+ * DAVIDM I am fairly sure that we should turn this into a batch -+ * request to stop bad karma/lockup, revisit -+ */ -+ crp->crp_flags |= CRYPTO_F_BATCH; -+#endif -+ return crypto_dispatch(crp); -+ } -+ if (error != 0 || (crp->crp_flags & CRYPTO_F_DONE)) { -+ cse->error = error; -+ wake_up_interruptible(&crp->crp_waitq); -+ } -+ return (0); -+} -+ -+static int -+cryptodevkey_cb(void *op) -+{ -+ struct cryptkop *krp = (struct cryptkop *) op; -+ dprintk("%s()\n", __FUNCTION__); -+ wake_up_interruptible(&krp->krp_waitq); -+ return (0); -+} -+ -+static int -+cryptodev_key(struct crypt_kop *kop) -+{ -+ struct cryptkop *krp = NULL; -+ int error = EINVAL; -+ int in, out, size, i; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (kop->crk_iparams + kop->crk_oparams > CRK_MAXPARAM) { -+ dprintk("%s params too big\n", __FUNCTION__); -+ return (EFBIG); -+ } -+ -+ in = kop->crk_iparams; -+ out = kop->crk_oparams; -+ switch (kop->crk_op) { -+ case CRK_MOD_EXP: -+ if (in == 3 && out == 1) -+ break; -+ return (EINVAL); -+ case CRK_MOD_EXP_CRT: -+ if (in == 6 && out == 1) -+ break; -+ return (EINVAL); -+ case CRK_DSA_SIGN: -+ if (in == 5 && out == 2) -+ break; -+ return (EINVAL); -+ case CRK_DSA_VERIFY: -+ if (in == 7 && out == 0) -+ break; -+ return (EINVAL); -+ case CRK_DH_COMPUTE_KEY: -+ if (in == 3 && out == 1) -+ break; -+ return (EINVAL); -+ default: -+ return (EINVAL); -+ } -+ -+ krp = (struct cryptkop *)kmalloc(sizeof *krp, GFP_KERNEL); -+ if (!krp) -+ return (ENOMEM); -+ bzero(krp, sizeof *krp); -+ krp->krp_op = kop->crk_op; -+ krp->krp_status = kop->crk_status; -+ krp->krp_iparams = kop->crk_iparams; -+ krp->krp_oparams = kop->crk_oparams; -+ krp->krp_crid = kop->crk_crid; -+ krp->krp_status = 0; -+ krp->krp_flags = CRYPTO_KF_CBIMM; -+ krp->krp_callback = (int (*) (struct cryptkop *)) cryptodevkey_cb; -+ init_waitqueue_head(&krp->krp_waitq); -+ -+ for (i = 0; i < CRK_MAXPARAM; i++) -+ krp->krp_param[i].crp_nbits = kop->crk_param[i].crp_nbits; -+ for (i = 0; i < krp->krp_iparams + krp->krp_oparams; i++) { -+ size = (krp->krp_param[i].crp_nbits + 7) / 8; -+ if (size == 0) -+ continue; -+ krp->krp_param[i].crp_p = (caddr_t) kmalloc(size, GFP_KERNEL); -+ if (i >= krp->krp_iparams) -+ continue; -+ error = copy_from_user(krp->krp_param[i].crp_p, -+ kop->crk_param[i].crp_p, size); -+ if (error) -+ goto fail; -+ } -+ -+ error = crypto_kdispatch(krp); -+ if (error) -+ goto fail; -+ -+ do { -+ error = wait_event_interruptible(krp->krp_waitq, -+ ((krp->krp_flags & CRYPTO_KF_DONE) != 0)); -+ /* -+ * we can't break out of this loop or we will leave behind -+ * a huge mess, however, staying here means if your driver -+ * is broken user applications can hang and not be killed. -+ * The solution, fix your driver :-) -+ */ -+ if (error) { -+ schedule(); -+ error = 0; -+ } -+ } while ((krp->krp_flags & CRYPTO_KF_DONE) == 0); -+ -+ dprintk("%s finished WAITING error=%d\n", __FUNCTION__, error); -+ -+ kop->crk_crid = krp->krp_crid; /* device that did the work */ -+ if (krp->krp_status != 0) { -+ error = krp->krp_status; -+ goto fail; -+ } -+ -+ for (i = krp->krp_iparams; i < krp->krp_iparams + krp->krp_oparams; i++) { -+ size = (krp->krp_param[i].crp_nbits + 7) / 8; -+ if (size == 0) -+ continue; -+ error = copy_to_user(kop->crk_param[i].crp_p, krp->krp_param[i].crp_p, -+ size); -+ if (error) -+ goto fail; -+ } -+ -+fail: -+ if (krp) { -+ kop->crk_status = krp->krp_status; -+ for (i = 0; i < CRK_MAXPARAM; i++) { -+ if (krp->krp_param[i].crp_p) -+ kfree(krp->krp_param[i].crp_p); -+ } -+ kfree(krp); -+ } -+ return (error); -+} -+ -+static int -+cryptodev_find(struct crypt_find_op *find) -+{ -+ device_t dev; -+ -+ if (find->crid != -1) { -+ dev = crypto_find_device_byhid(find->crid); -+ if (dev == NULL) -+ return (ENOENT); -+ strlcpy(find->name, device_get_nameunit(dev), -+ sizeof(find->name)); -+ } else { -+ find->crid = crypto_find_driver(find->name); -+ if (find->crid == -1) -+ return (ENOENT); -+ } -+ return (0); -+} -+ -+static struct csession * -+csefind(struct fcrypt *fcr, u_int ses) -+{ -+ struct csession *cse; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ list_for_each_entry(cse, &fcr->csessions, list) -+ if (cse->ses == ses) -+ return (cse); -+ return (NULL); -+} -+ -+static int -+csedelete(struct fcrypt *fcr, struct csession *cse_del) -+{ -+ struct csession *cse; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ list_for_each_entry(cse, &fcr->csessions, list) { -+ if (cse == cse_del) { -+ list_del(&cse->list); -+ return (1); -+ } -+ } -+ return (0); -+} -+ -+static struct csession * -+cseadd(struct fcrypt *fcr, struct csession *cse) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ list_add_tail(&cse->list, &fcr->csessions); -+ cse->ses = fcr->sesn++; -+ return (cse); -+} -+ -+static struct csession * -+csecreate(struct fcrypt *fcr, u_int64_t sid, struct cryptoini *crie, -+ struct cryptoini *cria, struct csession_info *info) -+{ -+ struct csession *cse; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ cse = (struct csession *) kmalloc(sizeof(struct csession), GFP_KERNEL); -+ if (cse == NULL) -+ return NULL; -+ memset(cse, 0, sizeof(struct csession)); -+ -+ INIT_LIST_HEAD(&cse->list); -+ init_waitqueue_head(&cse->waitq); -+ -+ cse->key = crie->cri_key; -+ cse->keylen = crie->cri_klen/8; -+ cse->mackey = cria->cri_key; -+ cse->mackeylen = cria->cri_klen/8; -+ cse->sid = sid; -+ cse->cipher = crie->cri_alg; -+ cse->mac = cria->cri_alg; -+ cse->info = *info; -+ cseadd(fcr, cse); -+ return (cse); -+} -+ -+static int -+csefree(struct csession *cse) -+{ -+ int error; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ error = crypto_freesession(cse->sid); -+ if (cse->key) -+ kfree(cse->key); -+ if (cse->mackey) -+ kfree(cse->mackey); -+ kfree(cse); -+ return(error); -+} -+ -+static int -+cryptodev_ioctl( -+ struct inode *inode, -+ struct file *filp, -+ unsigned int cmd, -+ unsigned long arg) -+{ -+ struct cryptoini cria, crie; -+ struct fcrypt *fcr = filp->private_data; -+ struct csession *cse; -+ struct csession_info info; -+ struct session2_op sop; -+ struct crypt_op cop; -+ struct crypt_kop kop; -+ struct crypt_find_op fop; -+ u_int64_t sid; -+ u_int32_t ses = 0; -+ int feat, fd, error = 0, crid; -+ mm_segment_t fs; -+ -+ dprintk("%s(cmd=%x arg=%lx)\n", __FUNCTION__, cmd, arg); -+ -+ switch (cmd) { -+ -+ case CRIOGET: { -+ dprintk("%s(CRIOGET)\n", __FUNCTION__); -+ fs = get_fs(); -+ set_fs(get_ds()); -+ for (fd = 0; fd < files_fdtable(current->files)->max_fds; fd++) -+ if (files_fdtable(current->files)->fd[fd] == filp) -+ break; -+ fd = sys_dup(fd); -+ set_fs(fs); -+ put_user(fd, (int *) arg); -+ return IS_ERR_VALUE(fd) ? fd : 0; -+ } -+ -+#define CIOCGSESSSTR (cmd == CIOCGSESSION ? "CIOCGSESSION" : "CIOCGSESSION2") -+ case CIOCGSESSION: -+ case CIOCGSESSION2: -+ dprintk("%s(%s)\n", __FUNCTION__, CIOCGSESSSTR); -+ memset(&crie, 0, sizeof(crie)); -+ memset(&cria, 0, sizeof(cria)); -+ memset(&info, 0, sizeof(info)); -+ memset(&sop, 0, sizeof(sop)); -+ -+ if (copy_from_user(&sop, (void*)arg, (cmd == CIOCGSESSION) ? -+ sizeof(struct session_op) : sizeof(sop))) { -+ dprintk("%s(%s) - bad copy\n", __FUNCTION__, CIOCGSESSSTR); -+ error = EFAULT; -+ goto bail; -+ } -+ -+ switch (sop.cipher) { -+ case 0: -+ dprintk("%s(%s) - no cipher\n", __FUNCTION__, CIOCGSESSSTR); -+ break; -+ case CRYPTO_NULL_CBC: -+ info.blocksize = NULL_BLOCK_LEN; -+ info.minkey = NULL_MIN_KEY_LEN; -+ info.maxkey = NULL_MAX_KEY_LEN; -+ break; -+ case CRYPTO_DES_CBC: -+ info.blocksize = DES_BLOCK_LEN; -+ info.minkey = DES_MIN_KEY_LEN; -+ info.maxkey = DES_MAX_KEY_LEN; -+ break; -+ case CRYPTO_3DES_CBC: -+ info.blocksize = DES3_BLOCK_LEN; -+ info.minkey = DES3_MIN_KEY_LEN; -+ info.maxkey = DES3_MAX_KEY_LEN; -+ break; -+ case CRYPTO_BLF_CBC: -+ info.blocksize = BLOWFISH_BLOCK_LEN; -+ info.minkey = BLOWFISH_MIN_KEY_LEN; -+ info.maxkey = BLOWFISH_MAX_KEY_LEN; -+ break; -+ case CRYPTO_CAST_CBC: -+ info.blocksize = CAST128_BLOCK_LEN; -+ info.minkey = CAST128_MIN_KEY_LEN; -+ info.maxkey = CAST128_MAX_KEY_LEN; -+ break; -+ case CRYPTO_SKIPJACK_CBC: -+ info.blocksize = SKIPJACK_BLOCK_LEN; -+ info.minkey = SKIPJACK_MIN_KEY_LEN; -+ info.maxkey = SKIPJACK_MAX_KEY_LEN; -+ break; -+ case CRYPTO_AES_CBC: -+ info.blocksize = AES_BLOCK_LEN; -+ info.minkey = AES_MIN_KEY_LEN; -+ info.maxkey = AES_MAX_KEY_LEN; -+ break; -+ case CRYPTO_ARC4: -+ info.blocksize = ARC4_BLOCK_LEN; -+ info.minkey = ARC4_MIN_KEY_LEN; -+ info.maxkey = ARC4_MAX_KEY_LEN; -+ break; -+ case CRYPTO_CAMELLIA_CBC: -+ info.blocksize = CAMELLIA_BLOCK_LEN; -+ info.minkey = CAMELLIA_MIN_KEY_LEN; -+ info.maxkey = CAMELLIA_MAX_KEY_LEN; -+ break; -+ default: -+ dprintk("%s(%s) - bad cipher\n", __FUNCTION__, CIOCGSESSSTR); -+ error = EINVAL; -+ goto bail; -+ } -+ -+ switch (sop.mac) { -+ case 0: -+ dprintk("%s(%s) - no mac\n", __FUNCTION__, CIOCGSESSSTR); -+ break; -+ case CRYPTO_NULL_HMAC: -+ info.authsize = NULL_HASH_LEN; -+ break; -+ case CRYPTO_MD5: -+ info.authsize = MD5_HASH_LEN; -+ break; -+ case CRYPTO_SHA1: -+ info.authsize = SHA1_HASH_LEN; -+ break; -+ case CRYPTO_SHA2_256: -+ info.authsize = SHA2_256_HASH_LEN; -+ break; -+ case CRYPTO_SHA2_384: -+ info.authsize = SHA2_384_HASH_LEN; -+ break; -+ case CRYPTO_SHA2_512: -+ info.authsize = SHA2_512_HASH_LEN; -+ break; -+ case CRYPTO_RIPEMD160: -+ info.authsize = RIPEMD160_HASH_LEN; -+ break; -+ case CRYPTO_MD5_HMAC: -+ info.authsize = MD5_HASH_LEN; -+ info.authkey = 16; -+ break; -+ case CRYPTO_SHA1_HMAC: -+ info.authsize = SHA1_HASH_LEN; -+ info.authkey = 20; -+ break; -+ case CRYPTO_SHA2_256_HMAC: -+ info.authsize = SHA2_256_HASH_LEN; -+ info.authkey = 32; -+ break; -+ case CRYPTO_SHA2_384_HMAC: -+ info.authsize = SHA2_384_HASH_LEN; -+ info.authkey = 48; -+ break; -+ case CRYPTO_SHA2_512_HMAC: -+ info.authsize = SHA2_512_HASH_LEN; -+ info.authkey = 64; -+ break; -+ case CRYPTO_RIPEMD160_HMAC: -+ info.authsize = RIPEMD160_HASH_LEN; -+ info.authkey = 20; -+ break; -+ default: -+ dprintk("%s(%s) - bad mac\n", __FUNCTION__, CIOCGSESSSTR); -+ error = EINVAL; -+ goto bail; -+ } -+ -+ if (info.blocksize) { -+ crie.cri_alg = sop.cipher; -+ crie.cri_klen = sop.keylen * 8; -+ if ((info.maxkey && sop.keylen > info.maxkey) || -+ sop.keylen < info.minkey) { -+ dprintk("%s(%s) - bad key\n", __FUNCTION__, CIOCGSESSSTR); -+ error = EINVAL; -+ goto bail; -+ } -+ -+ crie.cri_key = (u_int8_t *) kmalloc(crie.cri_klen/8+1, GFP_KERNEL); -+ if (copy_from_user(crie.cri_key, sop.key, -+ crie.cri_klen/8)) { -+ dprintk("%s(%s) - bad copy\n", __FUNCTION__, CIOCGSESSSTR); -+ error = EFAULT; -+ goto bail; -+ } -+ if (info.authsize) -+ crie.cri_next = &cria; -+ } -+ -+ if (info.authsize) { -+ cria.cri_alg = sop.mac; -+ cria.cri_klen = sop.mackeylen * 8; -+ if (info.authkey && sop.mackeylen != info.authkey) { -+ dprintk("%s(%s) - mackeylen %d != %d\n", __FUNCTION__, -+ CIOCGSESSSTR, sop.mackeylen, info.authkey); -+ error = EINVAL; -+ goto bail; -+ } -+ -+ if (cria.cri_klen) { -+ cria.cri_key = (u_int8_t *) kmalloc(cria.cri_klen/8,GFP_KERNEL); -+ if (copy_from_user(cria.cri_key, sop.mackey, -+ cria.cri_klen / 8)) { -+ dprintk("%s(%s) - bad copy\n", __FUNCTION__, CIOCGSESSSTR); -+ error = EFAULT; -+ goto bail; -+ } -+ } -+ } -+ -+ /* NB: CIOGSESSION2 has the crid */ -+ if (cmd == CIOCGSESSION2) { -+ crid = sop.crid; -+ error = checkcrid(crid); -+ if (error) { -+ dprintk("%s(%s) - checkcrid %x\n", __FUNCTION__, -+ CIOCGSESSSTR, error); -+ goto bail; -+ } -+ } else { -+ /* allow either HW or SW to be used */ -+ crid = CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE; -+ } -+ error = crypto_newsession(&sid, (info.blocksize ? &crie : &cria), crid); -+ if (error) { -+ dprintk("%s(%s) - newsession %d\n",__FUNCTION__,CIOCGSESSSTR,error); -+ goto bail; -+ } -+ -+ cse = csecreate(fcr, sid, &crie, &cria, &info); -+ if (cse == NULL) { -+ crypto_freesession(sid); -+ error = EINVAL; -+ dprintk("%s(%s) - csecreate failed\n", __FUNCTION__, CIOCGSESSSTR); -+ goto bail; -+ } -+ sop.ses = cse->ses; -+ -+ if (cmd == CIOCGSESSION2) { -+ /* return hardware/driver id */ -+ sop.crid = CRYPTO_SESID2HID(cse->sid); -+ } -+ -+ if (copy_to_user((void*)arg, &sop, (cmd == CIOCGSESSION) ? -+ sizeof(struct session_op) : sizeof(sop))) { -+ dprintk("%s(%s) - bad copy\n", __FUNCTION__, CIOCGSESSSTR); -+ error = EFAULT; -+ } -+bail: -+ if (error) { -+ dprintk("%s(%s) - bail %d\n", __FUNCTION__, CIOCGSESSSTR, error); -+ if (crie.cri_key) -+ kfree(crie.cri_key); -+ if (cria.cri_key) -+ kfree(cria.cri_key); -+ } -+ break; -+ case CIOCFSESSION: -+ dprintk("%s(CIOCFSESSION)\n", __FUNCTION__); -+ get_user(ses, (uint32_t*)arg); -+ cse = csefind(fcr, ses); -+ if (cse == NULL) { -+ error = EINVAL; -+ dprintk("%s(CIOCFSESSION) - Fail %d\n", __FUNCTION__, error); -+ break; -+ } -+ csedelete(fcr, cse); -+ error = csefree(cse); -+ break; -+ case CIOCCRYPT: -+ dprintk("%s(CIOCCRYPT)\n", __FUNCTION__); -+ if(copy_from_user(&cop, (void*)arg, sizeof(cop))) { -+ dprintk("%s(CIOCCRYPT) - bad copy\n", __FUNCTION__); -+ error = EFAULT; -+ goto bail; -+ } -+ cse = csefind(fcr, cop.ses); -+ if (cse == NULL) { -+ error = EINVAL; -+ dprintk("%s(CIOCCRYPT) - Fail %d\n", __FUNCTION__, error); -+ break; -+ } -+ error = cryptodev_op(cse, &cop); -+ if(copy_to_user((void*)arg, &cop, sizeof(cop))) { -+ dprintk("%s(CIOCCRYPT) - bad return copy\n", __FUNCTION__); -+ error = EFAULT; -+ goto bail; -+ } -+ break; -+ case CIOCKEY: -+ case CIOCKEY2: -+ dprintk("%s(CIOCKEY)\n", __FUNCTION__); -+ if (!crypto_userasymcrypto) -+ return (EPERM); /* XXX compat? */ -+ if(copy_from_user(&kop, (void*)arg, sizeof(kop))) { -+ dprintk("%s(CIOCKEY) - bad copy\n", __FUNCTION__); -+ error = EFAULT; -+ goto bail; -+ } -+ if (cmd == CIOCKEY) { -+ /* NB: crypto core enforces s/w driver use */ -+ kop.crk_crid = -+ CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE; -+ } -+ error = cryptodev_key(&kop); -+ if(copy_to_user((void*)arg, &kop, sizeof(kop))) { -+ dprintk("%s(CIOCGKEY) - bad return copy\n", __FUNCTION__); -+ error = EFAULT; -+ goto bail; -+ } -+ break; -+ case CIOCASYMFEAT: -+ dprintk("%s(CIOCASYMFEAT)\n", __FUNCTION__); -+ if (!crypto_userasymcrypto) { -+ /* -+ * NB: if user asym crypto operations are -+ * not permitted return "no algorithms" -+ * so well-behaved applications will just -+ * fallback to doing them in software. -+ */ -+ feat = 0; -+ } else -+ error = crypto_getfeat(&feat); -+ if (!error) { -+ error = copy_to_user((void*)arg, &feat, sizeof(feat)); -+ } -+ break; -+ case CIOCFINDDEV: -+ if (copy_from_user(&fop, (void*)arg, sizeof(fop))) { -+ dprintk("%s(CIOCFINDDEV) - bad copy\n", __FUNCTION__); -+ error = EFAULT; -+ goto bail; -+ } -+ error = cryptodev_find(&fop); -+ if (copy_to_user((void*)arg, &fop, sizeof(fop))) { -+ dprintk("%s(CIOCFINDDEV) - bad return copy\n", __FUNCTION__); -+ error = EFAULT; -+ goto bail; -+ } -+ break; -+ default: -+ dprintk("%s(unknown ioctl 0x%x)\n", __FUNCTION__, cmd); -+ error = EINVAL; -+ break; -+ } -+ return(-error); -+} -+ -+#ifdef HAVE_UNLOCKED_IOCTL -+static long -+cryptodev_unlocked_ioctl( -+ struct file *filp, -+ unsigned int cmd, -+ unsigned long arg) -+{ -+ return cryptodev_ioctl(NULL, filp, cmd, arg); -+} -+#endif -+ -+static int -+cryptodev_open(struct inode *inode, struct file *filp) -+{ -+ struct fcrypt *fcr; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (filp->private_data) { -+ printk("cryptodev: Private data already exists !\n"); -+ return(0); -+ } -+ -+ fcr = kmalloc(sizeof(*fcr), GFP_KERNEL); -+ if (!fcr) { -+ dprintk("%s() - malloc failed\n", __FUNCTION__); -+ return(-ENOMEM); -+ } -+ memset(fcr, 0, sizeof(*fcr)); -+ -+ INIT_LIST_HEAD(&fcr->csessions); -+ filp->private_data = fcr; -+ return(0); -+} -+ -+static int -+cryptodev_release(struct inode *inode, struct file *filp) -+{ -+ struct fcrypt *fcr = filp->private_data; -+ struct csession *cse, *tmp; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (!filp) { -+ printk("cryptodev: No private data on release\n"); -+ return(0); -+ } -+ -+ list_for_each_entry_safe(cse, tmp, &fcr->csessions, list) { -+ list_del(&cse->list); -+ (void)csefree(cse); -+ } -+ filp->private_data = NULL; -+ kfree(fcr); -+ return(0); -+} -+ -+static struct file_operations cryptodev_fops = { -+ .owner = THIS_MODULE, -+ .open = cryptodev_open, -+ .release = cryptodev_release, -+ .ioctl = cryptodev_ioctl, -+#ifdef HAVE_UNLOCKED_IOCTL -+ .unlocked_ioctl = cryptodev_unlocked_ioctl, -+#endif -+}; -+ -+static struct miscdevice cryptodev = { -+ .minor = CRYPTODEV_MINOR, -+ .name = "crypto", -+ .fops = &cryptodev_fops, -+}; -+ -+static int __init -+cryptodev_init(void) -+{ -+ int rc; -+ -+ dprintk("%s(%p)\n", __FUNCTION__, cryptodev_init); -+ rc = misc_register(&cryptodev); -+ if (rc) { -+ printk(KERN_ERR "cryptodev: registration of /dev/crypto failed\n"); -+ return(rc); -+ } -+ -+ return(0); -+} -+ -+static void __exit -+cryptodev_exit(void) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ misc_deregister(&cryptodev); -+} -+ -+module_init(cryptodev_init); -+module_exit(cryptodev_exit); -+ -+MODULE_LICENSE("BSD"); -+MODULE_AUTHOR("David McCullough <david_mccullough@mcafee.com>"); -+MODULE_DESCRIPTION("Cryptodev (user interface to OCF)"); -diff --git a/crypto/ocf/cryptodev.h b/crypto/ocf/cryptodev.h -new file mode 100644 -index 0000000..bb11a56 ---- /dev/null -+++ b/crypto/ocf/cryptodev.h -@@ -0,0 +1,479 @@ -+/* $FreeBSD: src/sys/opencrypto/cryptodev.h,v 1.25 2007/05/09 19:37:02 gnn Exp $ */ -+/* $OpenBSD: cryptodev.h,v 1.31 2002/06/11 11:14:29 beck Exp $ */ -+ -+/*- -+ * Linux port done by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * The license and original author are listed below. -+ * -+ * The author of this code is Angelos D. Keromytis (angelos@cis.upenn.edu) -+ * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting -+ * -+ * This code was written by Angelos D. Keromytis in Athens, Greece, in -+ * February 2000. Network Security Technologies Inc. (NSTI) kindly -+ * supported the development of this code. -+ * -+ * Copyright (c) 2000 Angelos D. Keromytis -+ * -+ * Permission to use, copy, and modify this software with or without fee -+ * is hereby granted, provided that this entire notice is included in -+ * all source code copies of any software which is or includes a copy or -+ * modification of this software. -+ * -+ * THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR -+ * IMPLIED WARRANTY. IN PARTICULAR, NONE OF THE AUTHORS MAKES ANY -+ * REPRESENTATION OR WARRANTY OF ANY KIND CONCERNING THE -+ * MERCHANTABILITY OF THIS SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR -+ * PURPOSE. -+ * -+ * Copyright (c) 2001 Theo de Raadt -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored in part by the Defense Advanced Research Projects -+ * Agency (DARPA) and Air Force Research Laboratory, Air Force -+ * Materiel Command, USAF, under agreement number F30602-01-2-0537. -+ * -+ */ -+ -+#ifndef _CRYPTO_CRYPTO_H_ -+#define _CRYPTO_CRYPTO_H_ -+ -+/* Some initial values */ -+#define CRYPTO_DRIVERS_INITIAL 4 -+#define CRYPTO_SW_SESSIONS 32 -+ -+/* Hash values */ -+#define NULL_HASH_LEN 0 -+#define MD5_HASH_LEN 16 -+#define SHA1_HASH_LEN 20 -+#define RIPEMD160_HASH_LEN 20 -+#define SHA2_256_HASH_LEN 32 -+#define SHA2_384_HASH_LEN 48 -+#define SHA2_512_HASH_LEN 64 -+#define MD5_KPDK_HASH_LEN 16 -+#define SHA1_KPDK_HASH_LEN 20 -+/* Maximum hash algorithm result length */ -+#define HASH_MAX_LEN SHA2_512_HASH_LEN /* Keep this updated */ -+ -+/* HMAC values */ -+#define NULL_HMAC_BLOCK_LEN 1 -+#define MD5_HMAC_BLOCK_LEN 64 -+#define SHA1_HMAC_BLOCK_LEN 64 -+#define RIPEMD160_HMAC_BLOCK_LEN 64 -+#define SHA2_256_HMAC_BLOCK_LEN 64 -+#define SHA2_384_HMAC_BLOCK_LEN 128 -+#define SHA2_512_HMAC_BLOCK_LEN 128 -+/* Maximum HMAC block length */ -+#define HMAC_MAX_BLOCK_LEN SHA2_512_HMAC_BLOCK_LEN /* Keep this updated */ -+#define HMAC_IPAD_VAL 0x36 -+#define HMAC_OPAD_VAL 0x5C -+ -+/* Encryption algorithm block sizes */ -+#define NULL_BLOCK_LEN 1 -+#define DES_BLOCK_LEN 8 -+#define DES3_BLOCK_LEN 8 -+#define BLOWFISH_BLOCK_LEN 8 -+#define SKIPJACK_BLOCK_LEN 8 -+#define CAST128_BLOCK_LEN 8 -+#define RIJNDAEL128_BLOCK_LEN 16 -+#define AES_BLOCK_LEN RIJNDAEL128_BLOCK_LEN -+#define CAMELLIA_BLOCK_LEN 16 -+#define ARC4_BLOCK_LEN 1 -+#define EALG_MAX_BLOCK_LEN AES_BLOCK_LEN /* Keep this updated */ -+ -+/* Encryption algorithm min and max key sizes */ -+#define NULL_MIN_KEY_LEN 0 -+#define NULL_MAX_KEY_LEN 0 -+#define DES_MIN_KEY_LEN 8 -+#define DES_MAX_KEY_LEN 8 -+#define DES3_MIN_KEY_LEN 24 -+#define DES3_MAX_KEY_LEN 24 -+#define BLOWFISH_MIN_KEY_LEN 4 -+#define BLOWFISH_MAX_KEY_LEN 56 -+#define SKIPJACK_MIN_KEY_LEN 10 -+#define SKIPJACK_MAX_KEY_LEN 10 -+#define CAST128_MIN_KEY_LEN 5 -+#define CAST128_MAX_KEY_LEN 16 -+#define RIJNDAEL128_MIN_KEY_LEN 16 -+#define RIJNDAEL128_MAX_KEY_LEN 32 -+#define AES_MIN_KEY_LEN RIJNDAEL128_MIN_KEY_LEN -+#define AES_MAX_KEY_LEN RIJNDAEL128_MAX_KEY_LEN -+#define CAMELLIA_MIN_KEY_LEN 16 -+#define CAMELLIA_MAX_KEY_LEN 32 -+#define ARC4_MIN_KEY_LEN 1 -+#define ARC4_MAX_KEY_LEN 256 -+ -+/* Max size of data that can be processed */ -+#define CRYPTO_MAX_DATA_LEN 64*1024 - 1 -+ -+#define CRYPTO_ALGORITHM_MIN 1 -+#define CRYPTO_DES_CBC 1 -+#define CRYPTO_3DES_CBC 2 -+#define CRYPTO_BLF_CBC 3 -+#define CRYPTO_CAST_CBC 4 -+#define CRYPTO_SKIPJACK_CBC 5 -+#define CRYPTO_MD5_HMAC 6 -+#define CRYPTO_SHA1_HMAC 7 -+#define CRYPTO_RIPEMD160_HMAC 8 -+#define CRYPTO_MD5_KPDK 9 -+#define CRYPTO_SHA1_KPDK 10 -+#define CRYPTO_RIJNDAEL128_CBC 11 /* 128 bit blocksize */ -+#define CRYPTO_AES_CBC 11 /* 128 bit blocksize -- the same as above */ -+#define CRYPTO_ARC4 12 -+#define CRYPTO_MD5 13 -+#define CRYPTO_SHA1 14 -+#define CRYPTO_NULL_HMAC 15 -+#define CRYPTO_NULL_CBC 16 -+#define CRYPTO_DEFLATE_COMP 17 /* Deflate compression algorithm */ -+#define CRYPTO_SHA2_256_HMAC 18 -+#define CRYPTO_SHA2_384_HMAC 19 -+#define CRYPTO_SHA2_512_HMAC 20 -+#define CRYPTO_CAMELLIA_CBC 21 -+#define CRYPTO_SHA2_256 22 -+#define CRYPTO_SHA2_384 23 -+#define CRYPTO_SHA2_512 24 -+#define CRYPTO_RIPEMD160 25 -+#define CRYPTO_ALGORITHM_MAX 25 /* Keep updated - see below */ -+ -+/* Algorithm flags */ -+#define CRYPTO_ALG_FLAG_SUPPORTED 0x01 /* Algorithm is supported */ -+#define CRYPTO_ALG_FLAG_RNG_ENABLE 0x02 /* Has HW RNG for DH/DSA */ -+#define CRYPTO_ALG_FLAG_DSA_SHA 0x04 /* Can do SHA on msg */ -+ -+/* -+ * Crypto driver/device flags. They can set in the crid -+ * parameter when creating a session or submitting a key -+ * op to affect the device/driver assigned. If neither -+ * of these are specified then the crid is assumed to hold -+ * the driver id of an existing (and suitable) device that -+ * must be used to satisfy the request. -+ */ -+#define CRYPTO_FLAG_HARDWARE 0x01000000 /* hardware accelerated */ -+#define CRYPTO_FLAG_SOFTWARE 0x02000000 /* software implementation */ -+ -+/* NB: deprecated */ -+struct session_op { -+ u_int32_t cipher; /* ie. CRYPTO_DES_CBC */ -+ u_int32_t mac; /* ie. CRYPTO_MD5_HMAC */ -+ -+ u_int32_t keylen; /* cipher key */ -+ caddr_t key; -+ int mackeylen; /* mac key */ -+ caddr_t mackey; -+ -+ u_int32_t ses; /* returns: session # */ -+}; -+ -+struct session2_op { -+ u_int32_t cipher; /* ie. CRYPTO_DES_CBC */ -+ u_int32_t mac; /* ie. CRYPTO_MD5_HMAC */ -+ -+ u_int32_t keylen; /* cipher key */ -+ caddr_t key; -+ int mackeylen; /* mac key */ -+ caddr_t mackey; -+ -+ u_int32_t ses; /* returns: session # */ -+ int crid; /* driver id + flags (rw) */ -+ int pad[4]; /* for future expansion */ -+}; -+ -+struct crypt_op { -+ u_int32_t ses; -+ u_int16_t op; /* i.e. COP_ENCRYPT */ -+#define COP_NONE 0 -+#define COP_ENCRYPT 1 -+#define COP_DECRYPT 2 -+ u_int16_t flags; -+#define COP_F_BATCH 0x0008 /* Batch op if possible */ -+ u_int len; -+ caddr_t src, dst; /* become iov[] inside kernel */ -+ caddr_t mac; /* must be big enough for chosen MAC */ -+ caddr_t iv; -+}; -+ -+/* -+ * Parameters for looking up a crypto driver/device by -+ * device name or by id. The latter are returned for -+ * created sessions (crid) and completed key operations. -+ */ -+struct crypt_find_op { -+ int crid; /* driver id + flags */ -+ char name[32]; /* device/driver name */ -+}; -+ -+/* bignum parameter, in packed bytes, ... */ -+struct crparam { -+ caddr_t crp_p; -+ u_int crp_nbits; -+}; -+ -+#define CRK_MAXPARAM 8 -+ -+struct crypt_kop { -+ u_int crk_op; /* ie. CRK_MOD_EXP or other */ -+ u_int crk_status; /* return status */ -+ u_short crk_iparams; /* # of input parameters */ -+ u_short crk_oparams; /* # of output parameters */ -+ u_int crk_crid; /* NB: only used by CIOCKEY2 (rw) */ -+ struct crparam crk_param[CRK_MAXPARAM]; -+}; -+#define CRK_ALGORITM_MIN 0 -+#define CRK_MOD_EXP 0 -+#define CRK_MOD_EXP_CRT 1 -+#define CRK_DSA_SIGN 2 -+#define CRK_DSA_VERIFY 3 -+#define CRK_DH_COMPUTE_KEY 4 -+#define CRK_ALGORITHM_MAX 4 /* Keep updated - see below */ -+ -+#define CRF_MOD_EXP (1 << CRK_MOD_EXP) -+#define CRF_MOD_EXP_CRT (1 << CRK_MOD_EXP_CRT) -+#define CRF_DSA_SIGN (1 << CRK_DSA_SIGN) -+#define CRF_DSA_VERIFY (1 << CRK_DSA_VERIFY) -+#define CRF_DH_COMPUTE_KEY (1 << CRK_DH_COMPUTE_KEY) -+ -+/* -+ * done against open of /dev/crypto, to get a cloned descriptor. -+ * Please use F_SETFD against the cloned descriptor. -+ */ -+#define CRIOGET _IOWR('c', 100, u_int32_t) -+#define CRIOASYMFEAT CIOCASYMFEAT -+#define CRIOFINDDEV CIOCFINDDEV -+ -+/* the following are done against the cloned descriptor */ -+#define CIOCGSESSION _IOWR('c', 101, struct session_op) -+#define CIOCFSESSION _IOW('c', 102, u_int32_t) -+#define CIOCCRYPT _IOWR('c', 103, struct crypt_op) -+#define CIOCKEY _IOWR('c', 104, struct crypt_kop) -+#define CIOCASYMFEAT _IOR('c', 105, u_int32_t) -+#define CIOCGSESSION2 _IOWR('c', 106, struct session2_op) -+#define CIOCKEY2 _IOWR('c', 107, struct crypt_kop) -+#define CIOCFINDDEV _IOWR('c', 108, struct crypt_find_op) -+ -+struct cryptotstat { -+ struct timespec acc; /* total accumulated time */ -+ struct timespec min; /* min time */ -+ struct timespec max; /* max time */ -+ u_int32_t count; /* number of observations */ -+}; -+ -+struct cryptostats { -+ u_int32_t cs_ops; /* symmetric crypto ops submitted */ -+ u_int32_t cs_errs; /* symmetric crypto ops that failed */ -+ u_int32_t cs_kops; /* asymetric/key ops submitted */ -+ u_int32_t cs_kerrs; /* asymetric/key ops that failed */ -+ u_int32_t cs_intrs; /* crypto swi thread activations */ -+ u_int32_t cs_rets; /* crypto return thread activations */ -+ u_int32_t cs_blocks; /* symmetric op driver block */ -+ u_int32_t cs_kblocks; /* symmetric op driver block */ -+ /* -+ * When CRYPTO_TIMING is defined at compile time and the -+ * sysctl debug.crypto is set to 1, the crypto system will -+ * accumulate statistics about how long it takes to process -+ * crypto requests at various points during processing. -+ */ -+ struct cryptotstat cs_invoke; /* crypto_dipsatch -> crypto_invoke */ -+ struct cryptotstat cs_done; /* crypto_invoke -> crypto_done */ -+ struct cryptotstat cs_cb; /* crypto_done -> callback */ -+ struct cryptotstat cs_finis; /* callback -> callback return */ -+ -+ u_int32_t cs_drops; /* crypto ops dropped due to congestion */ -+}; -+ -+#ifdef __KERNEL__ -+ -+/* Standard initialization structure beginning */ -+struct cryptoini { -+ int cri_alg; /* Algorithm to use */ -+ int cri_klen; /* Key length, in bits */ -+ int cri_mlen; /* Number of bytes we want from the -+ entire hash. 0 means all. */ -+ caddr_t cri_key; /* key to use */ -+ u_int8_t cri_iv[EALG_MAX_BLOCK_LEN]; /* IV to use */ -+ struct cryptoini *cri_next; -+}; -+ -+/* Describe boundaries of a single crypto operation */ -+struct cryptodesc { -+ int crd_skip; /* How many bytes to ignore from start */ -+ int crd_len; /* How many bytes to process */ -+ int crd_inject; /* Where to inject results, if applicable */ -+ int crd_flags; -+ -+#define CRD_F_ENCRYPT 0x01 /* Set when doing encryption */ -+#define CRD_F_IV_PRESENT 0x02 /* When encrypting, IV is already in -+ place, so don't copy. */ -+#define CRD_F_IV_EXPLICIT 0x04 /* IV explicitly provided */ -+#define CRD_F_DSA_SHA_NEEDED 0x08 /* Compute SHA-1 of buffer for DSA */ -+#define CRD_F_KEY_EXPLICIT 0x10 /* Key explicitly provided */ -+#define CRD_F_COMP 0x0f /* Set when doing compression */ -+ -+ struct cryptoini CRD_INI; /* Initialization/context data */ -+#define crd_iv CRD_INI.cri_iv -+#define crd_key CRD_INI.cri_key -+#define crd_alg CRD_INI.cri_alg -+#define crd_klen CRD_INI.cri_klen -+#define crd_mlen CRD_INI.cri_mlen -+ -+ struct cryptodesc *crd_next; -+}; -+ -+/* Structure describing complete operation */ -+struct cryptop { -+ struct list_head crp_next; -+ wait_queue_head_t crp_waitq; -+ -+ u_int64_t crp_sid; /* Session ID */ -+ int crp_ilen; /* Input data total length */ -+ int crp_olen; /* Result total length */ -+ -+ int crp_etype; /* -+ * Error type (zero means no error). -+ * All error codes except EAGAIN -+ * indicate possible data corruption (as in, -+ * the data have been touched). On all -+ * errors, the crp_sid may have changed -+ * (reset to a new one), so the caller -+ * should always check and use the new -+ * value on future requests. -+ */ -+ int crp_flags; -+ -+#define CRYPTO_F_SKBUF 0x0001 /* Input/output are skbuf chains */ -+#define CRYPTO_F_IOV 0x0002 /* Input/output are uio */ -+#define CRYPTO_F_REL 0x0004 /* Must return data in same place */ -+#define CRYPTO_F_BATCH 0x0008 /* Batch op if possible */ -+#define CRYPTO_F_CBIMM 0x0010 /* Do callback immediately */ -+#define CRYPTO_F_DONE 0x0020 /* Operation completed */ -+#define CRYPTO_F_CBIFSYNC 0x0040 /* Do CBIMM if op is synchronous */ -+ -+ caddr_t crp_buf; /* Data to be processed */ -+ caddr_t crp_opaque; /* Opaque pointer, passed along */ -+ struct cryptodesc *crp_desc; /* Linked list of processing descriptors */ -+ -+ int (*crp_callback)(struct cryptop *); /* Callback function */ -+}; -+ -+#define CRYPTO_BUF_CONTIG 0x0 -+#define CRYPTO_BUF_IOV 0x1 -+#define CRYPTO_BUF_SKBUF 0x2 -+ -+#define CRYPTO_OP_DECRYPT 0x0 -+#define CRYPTO_OP_ENCRYPT 0x1 -+ -+/* -+ * Hints passed to process methods. -+ */ -+#define CRYPTO_HINT_MORE 0x1 /* more ops coming shortly */ -+ -+struct cryptkop { -+ struct list_head krp_next; -+ wait_queue_head_t krp_waitq; -+ -+ int krp_flags; -+#define CRYPTO_KF_DONE 0x0001 /* Operation completed */ -+#define CRYPTO_KF_CBIMM 0x0002 /* Do callback immediately */ -+ -+ u_int krp_op; /* ie. CRK_MOD_EXP or other */ -+ u_int krp_status; /* return status */ -+ u_short krp_iparams; /* # of input parameters */ -+ u_short krp_oparams; /* # of output parameters */ -+ u_int krp_crid; /* desired device, etc. */ -+ u_int32_t krp_hid; -+ struct crparam krp_param[CRK_MAXPARAM]; /* kvm */ -+ int (*krp_callback)(struct cryptkop *); -+}; -+ -+#include <ocf-compat.h> -+ -+/* -+ * Session ids are 64 bits. The lower 32 bits contain a "local id" which -+ * is a driver-private session identifier. The upper 32 bits contain a -+ * "hardware id" used by the core crypto code to identify the driver and -+ * a copy of the driver's capabilities that can be used by client code to -+ * optimize operation. -+ */ -+#define CRYPTO_SESID2HID(_sid) (((_sid) >> 32) & 0x00ffffff) -+#define CRYPTO_SESID2CAPS(_sid) (((_sid) >> 32) & 0xff000000) -+#define CRYPTO_SESID2LID(_sid) (((u_int32_t) (_sid)) & 0xffffffff) -+ -+extern int crypto_newsession(u_int64_t *sid, struct cryptoini *cri, int hard); -+extern int crypto_freesession(u_int64_t sid); -+#define CRYPTOCAP_F_HARDWARE CRYPTO_FLAG_HARDWARE -+#define CRYPTOCAP_F_SOFTWARE CRYPTO_FLAG_SOFTWARE -+#define CRYPTOCAP_F_SYNC 0x04000000 /* operates synchronously */ -+extern int32_t crypto_get_driverid(device_t dev, int flags); -+extern int crypto_find_driver(const char *); -+extern device_t crypto_find_device_byhid(int hid); -+extern int crypto_getcaps(int hid); -+extern int crypto_register(u_int32_t driverid, int alg, u_int16_t maxoplen, -+ u_int32_t flags); -+extern int crypto_kregister(u_int32_t, int, u_int32_t); -+extern int crypto_unregister(u_int32_t driverid, int alg); -+extern int crypto_unregister_all(u_int32_t driverid); -+extern int crypto_dispatch(struct cryptop *crp); -+extern int crypto_kdispatch(struct cryptkop *); -+#define CRYPTO_SYMQ 0x1 -+#define CRYPTO_ASYMQ 0x2 -+extern int crypto_unblock(u_int32_t, int); -+extern void crypto_done(struct cryptop *crp); -+extern void crypto_kdone(struct cryptkop *); -+extern int crypto_getfeat(int *); -+ -+extern void crypto_freereq(struct cryptop *crp); -+extern struct cryptop *crypto_getreq(int num); -+ -+extern int crypto_usercrypto; /* userland may do crypto requests */ -+extern int crypto_userasymcrypto; /* userland may do asym crypto reqs */ -+extern int crypto_devallowsoft; /* only use hardware crypto */ -+ -+/* -+ * random number support, crypto_unregister_all will unregister -+ */ -+extern int crypto_rregister(u_int32_t driverid, -+ int (*read_random)(void *arg, u_int32_t *buf, int len), void *arg); -+extern int crypto_runregister_all(u_int32_t driverid); -+ -+/* -+ * Crypto-related utility routines used mainly by drivers. -+ * -+ * XXX these don't really belong here; but for now they're -+ * kept apart from the rest of the system. -+ */ -+struct uio; -+extern void cuio_copydata(struct uio* uio, int off, int len, caddr_t cp); -+extern void cuio_copyback(struct uio* uio, int off, int len, caddr_t cp); -+extern struct iovec *cuio_getptr(struct uio *uio, int loc, int *off); -+ -+extern void crypto_copyback(int flags, caddr_t buf, int off, int size, -+ caddr_t in); -+extern void crypto_copydata(int flags, caddr_t buf, int off, int size, -+ caddr_t out); -+extern int crypto_apply(int flags, caddr_t buf, int off, int len, -+ int (*f)(void *, void *, u_int), void *arg); -+ -+#endif /* __KERNEL__ */ -+#endif /* _CRYPTO_CRYPTO_H_ */ -diff --git a/crypto/ocf/cryptosoft.c b/crypto/ocf/cryptosoft.c -new file mode 100644 -index 0000000..fa8838e ---- /dev/null -+++ b/crypto/ocf/cryptosoft.c -@@ -0,0 +1,1210 @@ -+/* -+ * An OCF module that uses the linux kernel cryptoapi, based on the -+ * original cryptosoft for BSD by Angelos D. Keromytis (angelos@cis.upenn.edu) -+ * but is mostly unrecognisable, -+ * -+ * Written by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2004-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * -+ * LICENSE TERMS -+ * -+ * The free distribution and use of this software in both source and binary -+ * form is allowed (with or without changes) provided that: -+ * -+ * 1. distributions of this source code include the above copyright -+ * notice, this list of conditions and the following disclaimer; -+ * -+ * 2. distributions in binary form include the above copyright -+ * notice, this list of conditions and the following disclaimer -+ * in the documentation and/or other associated materials; -+ * -+ * 3. the copyright holder's name is not used to endorse products -+ * built using this software without specific written permission. -+ * -+ * ALTERNATIVELY, provided that this notice is retained in full, this product -+ * may be distributed under the terms of the GNU General Public License (GPL), -+ * in which case the provisions of the GPL apply INSTEAD OF those given above. -+ * -+ * DISCLAIMER -+ * -+ * This software is provided 'as is' with no explicit or implied warranties -+ * in respect of its properties, including, but not limited to, correctness -+ * and/or fitness for purpose. -+ * --------------------------------------------------------------------------- -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/sched.h> -+#include <linux/wait.h> -+#include <linux/crypto.h> -+#include <linux/mm.h> -+#include <linux/skbuff.h> -+#include <linux/random.h> -+#include <linux/version.h> -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) -+#include <linux/scatterlist.h> -+#endif -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) -+#include <crypto/hash.h> -+#endif -+ -+#include <cryptodev.h> -+#include <uio.h> -+ -+struct { -+ softc_device_decl sc_dev; -+} swcr_softc; -+ -+#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK) -+ -+#define SW_TYPE_CIPHER 0x01 -+#define SW_TYPE_HMAC 0x02 -+#define SW_TYPE_HASH 0x04 -+#define SW_TYPE_COMP 0x08 -+#define SW_TYPE_BLKCIPHER 0x10 -+#define SW_TYPE_ALG_MASK 0x1f -+ -+#define SW_TYPE_ASYNC 0x8000 -+ -+/* We change some of the above if we have an async interface */ -+ -+#define SW_TYPE_ALG_AMASK (SW_TYPE_ALG_MASK | SW_TYPE_ASYNC) -+ -+#define SW_TYPE_ABLKCIPHER (SW_TYPE_BLKCIPHER | SW_TYPE_ASYNC) -+#define SW_TYPE_AHASH (SW_TYPE_HASH | SW_TYPE_ASYNC) -+#define SW_TYPE_AHMAC (SW_TYPE_HMAC | SW_TYPE_ASYNC) -+ -+#define SCATTERLIST_MAX 16 -+ -+struct swcr_data { -+ int sw_type; -+ int sw_alg; -+ struct crypto_tfm *sw_tfm; -+ union { -+ struct { -+ char *sw_key; -+ int sw_klen; -+ int sw_mlen; -+ } hmac; -+ void *sw_comp_buf; -+ } u; -+ struct swcr_data *sw_next; -+}; -+ -+struct swcr_req { -+ struct swcr_data *sw_head; -+ struct swcr_data *sw; -+ struct cryptop *crp; -+ struct cryptodesc *crd; -+ struct scatterlist sg[SCATTERLIST_MAX]; -+ unsigned char iv[EALG_MAX_BLOCK_LEN]; -+ char result[HASH_MAX_LEN]; -+ void *crypto_req; -+}; -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) -+static kmem_cache_t *swcr_req_cache; -+#else -+static struct kmem_cache *swcr_req_cache; -+#endif -+ -+#ifndef CRYPTO_TFM_MODE_CBC -+/* -+ * As of linux-2.6.21 this is no longer defined, and presumably no longer -+ * needed to be passed into the crypto core code. -+ */ -+#define CRYPTO_TFM_MODE_CBC 0 -+#define CRYPTO_TFM_MODE_ECB 0 -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) -+ /* -+ * Linux 2.6.19 introduced a new Crypto API, setup macro's to convert new -+ * API into old API. -+ */ -+ -+ /* Symmetric/Block Cipher */ -+ struct blkcipher_desc -+ { -+ struct crypto_tfm *tfm; -+ void *info; -+ }; -+ #define ecb(X) #X , CRYPTO_TFM_MODE_ECB -+ #define cbc(X) #X , CRYPTO_TFM_MODE_CBC -+ #define crypto_has_blkcipher(X, Y, Z) crypto_alg_available(X, 0) -+ #define crypto_blkcipher_cast(X) X -+ #define crypto_blkcipher_tfm(X) X -+ #define crypto_alloc_blkcipher(X, Y, Z) crypto_alloc_tfm(X, mode) -+ #define crypto_blkcipher_ivsize(X) crypto_tfm_alg_ivsize(X) -+ #define crypto_blkcipher_blocksize(X) crypto_tfm_alg_blocksize(X) -+ #define crypto_blkcipher_setkey(X, Y, Z) crypto_cipher_setkey(X, Y, Z) -+ #define crypto_blkcipher_encrypt_iv(W, X, Y, Z) \ -+ crypto_cipher_encrypt_iv((W)->tfm, X, Y, Z, (u8 *)((W)->info)) -+ #define crypto_blkcipher_decrypt_iv(W, X, Y, Z) \ -+ crypto_cipher_decrypt_iv((W)->tfm, X, Y, Z, (u8 *)((W)->info)) -+ #define crypto_blkcipher_set_flags(x, y) /* nop */ -+ -+ /* Hash/HMAC/Digest */ -+ struct hash_desc -+ { -+ struct crypto_tfm *tfm; -+ }; -+ #define hmac(X) #X , 0 -+ #define crypto_has_hash(X, Y, Z) crypto_alg_available(X, 0) -+ #define crypto_hash_cast(X) X -+ #define crypto_hash_tfm(X) X -+ #define crypto_alloc_hash(X, Y, Z) crypto_alloc_tfm(X, mode) -+ #define crypto_hash_digestsize(X) crypto_tfm_alg_digestsize(X) -+ #define crypto_hash_digest(W, X, Y, Z) \ -+ crypto_digest_digest((W)->tfm, X, sg_num, Z) -+ -+ /* Asymmetric Cipher */ -+ #define crypto_has_cipher(X, Y, Z) crypto_alg_available(X, 0) -+ -+ /* Compression */ -+ #define crypto_has_comp(X, Y, Z) crypto_alg_available(X, 0) -+ #define crypto_comp_tfm(X) X -+ #define crypto_comp_cast(X) X -+ #define crypto_alloc_comp(X, Y, Z) crypto_alloc_tfm(X, mode) -+ #define plain(X) #X , 0 -+#else -+ #define ecb(X) "ecb(" #X ")" , 0 -+ #define cbc(X) "cbc(" #X ")" , 0 -+ #define hmac(X) "hmac(" #X ")" , 0 -+ #define plain(X) #X , 0 -+#endif /* if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) */ -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) -+/* no ablkcipher in older kernels */ -+#define crypto_alloc_ablkcipher(a,b,c) (NULL) -+#define crypto_ablkcipher_tfm(x) ((struct crypto_tfm *)(x)) -+#define crypto_ablkcipher_set_flags(a, b) /* nop */ -+#define crypto_ablkcipher_setkey(x, y, z) (-EINVAL) -+#define crypto_has_ablkcipher(a,b,c) (0) -+#else -+#define HAVE_ABLKCIPHER -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) -+/* no ahash in older kernels */ -+#define crypto_ahash_tfm(x) ((struct crypto_tfm *)(x)) -+#define crypto_alloc_ahash(a,b,c) (NULL) -+#define crypto_ahash_digestsize(x) 0 -+#else -+#define HAVE_AHASH -+#endif -+ -+struct crypto_details { -+ char *alg_name; -+ int mode; -+ int sw_type; -+}; -+ -+static struct crypto_details crypto_details[] = { -+ [CRYPTO_DES_CBC] = { cbc(des), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_3DES_CBC] = { cbc(des3_ede), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_BLF_CBC] = { cbc(blowfish), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_CAST_CBC] = { cbc(cast5), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_SKIPJACK_CBC] = { cbc(skipjack), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_MD5_HMAC] = { hmac(md5), SW_TYPE_HMAC, }, -+ [CRYPTO_SHA1_HMAC] = { hmac(sha1), SW_TYPE_HMAC, }, -+ [CRYPTO_RIPEMD160_HMAC] = { hmac(ripemd160), SW_TYPE_HMAC, }, -+ [CRYPTO_MD5_KPDK] = { plain(md5-kpdk), SW_TYPE_HASH, }, -+ [CRYPTO_SHA1_KPDK] = { plain(sha1-kpdk), SW_TYPE_HASH, }, -+ [CRYPTO_AES_CBC] = { cbc(aes), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_ARC4] = { ecb(arc4), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_MD5] = { plain(md5), SW_TYPE_HASH, }, -+ [CRYPTO_SHA1] = { plain(sha1), SW_TYPE_HASH, }, -+ [CRYPTO_NULL_HMAC] = { hmac(digest_null), SW_TYPE_HMAC, }, -+ [CRYPTO_NULL_CBC] = { cbc(cipher_null), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_DEFLATE_COMP] = { plain(deflate), SW_TYPE_COMP, }, -+ [CRYPTO_SHA2_256_HMAC] = { hmac(sha256), SW_TYPE_HMAC, }, -+ [CRYPTO_SHA2_384_HMAC] = { hmac(sha384), SW_TYPE_HMAC, }, -+ [CRYPTO_SHA2_512_HMAC] = { hmac(sha512), SW_TYPE_HMAC, }, -+ [CRYPTO_CAMELLIA_CBC] = { cbc(camellia), SW_TYPE_BLKCIPHER, }, -+ [CRYPTO_SHA2_256] = { plain(sha256), SW_TYPE_HASH, }, -+ [CRYPTO_SHA2_384] = { plain(sha384), SW_TYPE_HASH, }, -+ [CRYPTO_SHA2_512] = { plain(sha512), SW_TYPE_HASH, }, -+ [CRYPTO_RIPEMD160] = { plain(ripemd160), SW_TYPE_HASH, }, -+}; -+ -+int32_t swcr_id = -1; -+module_param(swcr_id, int, 0444); -+MODULE_PARM_DESC(swcr_id, "Read-Only OCF ID for cryptosoft driver"); -+ -+int swcr_fail_if_compression_grows = 1; -+module_param(swcr_fail_if_compression_grows, int, 0644); -+MODULE_PARM_DESC(swcr_fail_if_compression_grows, -+ "Treat compression that results in more data as a failure"); -+ -+int swcr_no_ahash = 0; -+module_param(swcr_no_ahash, int, 0644); -+MODULE_PARM_DESC(swcr_no_ahash, -+ "Do not use async hash/hmac even if available"); -+ -+int swcr_no_ablk = 0; -+module_param(swcr_no_ablk, int, 0644); -+MODULE_PARM_DESC(swcr_no_ablk, -+ "Do not use async blk ciphers even if available"); -+ -+static struct swcr_data **swcr_sessions = NULL; -+static u_int32_t swcr_sesnum = 0; -+ -+static int swcr_process(device_t, struct cryptop *, int); -+static int swcr_newsession(device_t, u_int32_t *, struct cryptoini *); -+static int swcr_freesession(device_t, u_int64_t); -+ -+static device_method_t swcr_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, swcr_newsession), -+ DEVMETHOD(cryptodev_freesession,swcr_freesession), -+ DEVMETHOD(cryptodev_process, swcr_process), -+}; -+ -+#define debug swcr_debug -+int swcr_debug = 0; -+module_param(swcr_debug, int, 0644); -+MODULE_PARM_DESC(swcr_debug, "Enable debug"); -+ -+static void swcr_process_req(struct swcr_req *req); -+ -+/* -+ * Generate a new software session. -+ */ -+static int -+swcr_newsession(device_t dev, u_int32_t *sid, struct cryptoini *cri) -+{ -+ struct swcr_data **swd; -+ u_int32_t i; -+ int error; -+ char *algo; -+ int mode; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid == NULL || cri == NULL) { -+ dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ if (swcr_sessions) { -+ for (i = 1; i < swcr_sesnum; i++) -+ if (swcr_sessions[i] == NULL) -+ break; -+ } else -+ i = 1; /* NB: to silence compiler warning */ -+ -+ if (swcr_sessions == NULL || i == swcr_sesnum) { -+ if (swcr_sessions == NULL) { -+ i = 1; /* We leave swcr_sessions[0] empty */ -+ swcr_sesnum = CRYPTO_SW_SESSIONS; -+ } else -+ swcr_sesnum *= 2; -+ -+ swd = kmalloc(swcr_sesnum * sizeof(struct swcr_data *), SLAB_ATOMIC); -+ if (swd == NULL) { -+ /* Reset session number */ -+ if (swcr_sesnum == CRYPTO_SW_SESSIONS) -+ swcr_sesnum = 0; -+ else -+ swcr_sesnum /= 2; -+ dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ memset(swd, 0, swcr_sesnum * sizeof(struct swcr_data *)); -+ -+ /* Copy existing sessions */ -+ if (swcr_sessions) { -+ memcpy(swd, swcr_sessions, -+ (swcr_sesnum / 2) * sizeof(struct swcr_data *)); -+ kfree(swcr_sessions); -+ } -+ -+ swcr_sessions = swd; -+ } -+ -+ swd = &swcr_sessions[i]; -+ *sid = i; -+ -+ while (cri) { -+ *swd = (struct swcr_data *) kmalloc(sizeof(struct swcr_data), -+ SLAB_ATOMIC); -+ if (*swd == NULL) { -+ swcr_freesession(NULL, i); -+ dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ memset(*swd, 0, sizeof(struct swcr_data)); -+ -+ if (cri->cri_alg < 0 || -+ cri->cri_alg>=sizeof(crypto_details)/sizeof(crypto_details[0])){ -+ printk("cryptosoft: Unknown algorithm 0x%x\n", cri->cri_alg); -+ swcr_freesession(NULL, i); -+ return EINVAL; -+ } -+ -+ algo = crypto_details[cri->cri_alg].alg_name; -+ if (!algo || !*algo) { -+ printk("cryptosoft: Unsupported algorithm 0x%x\n", cri->cri_alg); -+ swcr_freesession(NULL, i); -+ return EINVAL; -+ } -+ -+ mode = crypto_details[cri->cri_alg].mode; -+ (*swd)->sw_type = crypto_details[cri->cri_alg].sw_type; -+ (*swd)->sw_alg = cri->cri_alg; -+ -+ /* Algorithm specific configuration */ -+ switch (cri->cri_alg) { -+ case CRYPTO_NULL_CBC: -+ cri->cri_klen = 0; /* make it work with crypto API */ -+ break; -+ default: -+ break; -+ } -+ -+ if ((*swd)->sw_type & SW_TYPE_BLKCIPHER) { -+ dprintk("%s crypto_alloc_*blkcipher(%s, 0x%x)\n", __FUNCTION__, -+ algo, mode); -+ -+ /* try async first */ -+ (*swd)->sw_tfm = swcr_no_ablk ? NULL : -+ crypto_ablkcipher_tfm(crypto_alloc_ablkcipher(algo, 0, 0)); -+ if ((*swd)->sw_tfm) { -+ dprintk("%s %s cipher is async\n", __FUNCTION__, algo); -+ (*swd)->sw_type |= SW_TYPE_ASYNC; -+ } else { -+ dprintk("%s %s cipher is sync\n", __FUNCTION__, algo); -+ (*swd)->sw_tfm = crypto_blkcipher_tfm( -+ crypto_alloc_blkcipher(algo, 0, CRYPTO_ALG_ASYNC)); -+ } -+ if (!(*swd)->sw_tfm) { -+ dprintk("cryptosoft: crypto_alloc_blkcipher failed(%s, 0x%x)\n", -+ algo,mode); -+ swcr_freesession(NULL, i); -+ return EINVAL; -+ } -+ -+ if (debug) { -+ dprintk("%s key:cri->cri_klen=%d,(cri->cri_klen + 7)/8=%d", -+ __FUNCTION__, cri->cri_klen, (cri->cri_klen + 7) / 8); -+ for (i = 0; i < (cri->cri_klen + 7) / 8; i++) -+ dprintk("%s0x%x", (i % 8) ? " " : "\n ", -+ cri->cri_key[i] & 0xff); -+ dprintk("\n"); -+ } -+ if ((*swd)->sw_type & SW_TYPE_ASYNC) { -+ /* OCF doesn't enforce keys */ -+ crypto_ablkcipher_set_flags( -+ __crypto_ablkcipher_cast((*swd)->sw_tfm), -+ CRYPTO_TFM_REQ_WEAK_KEY); -+ error = crypto_ablkcipher_setkey( -+ __crypto_ablkcipher_cast((*swd)->sw_tfm), -+ cri->cri_key, (cri->cri_klen + 7) / 8); -+ } else { -+ /* OCF doesn't enforce keys */ -+ crypto_blkcipher_set_flags( -+ crypto_blkcipher_cast((*swd)->sw_tfm), -+ CRYPTO_TFM_REQ_WEAK_KEY); -+ error = crypto_blkcipher_setkey( -+ crypto_blkcipher_cast((*swd)->sw_tfm), -+ cri->cri_key, (cri->cri_klen + 7) / 8); -+ } -+ if (error) { -+ printk("cryptosoft: setkey failed %d (crt_flags=0x%x)\n", error, -+ (*swd)->sw_tfm->crt_flags); -+ swcr_freesession(NULL, i); -+ return error; -+ } -+ } else if ((*swd)->sw_type & (SW_TYPE_HMAC | SW_TYPE_HASH)) { -+ dprintk("%s crypto_alloc_*hash(%s, 0x%x)\n", __FUNCTION__, -+ algo, mode); -+ -+ /* try async first */ -+ (*swd)->sw_tfm = swcr_no_ahash ? NULL : -+ crypto_ahash_tfm(crypto_alloc_ahash(algo, 0, 0)); -+ if ((*swd)->sw_tfm) { -+ dprintk("%s %s hash is async\n", __FUNCTION__, algo); -+ (*swd)->sw_type |= SW_TYPE_ASYNC; -+ } else { -+ dprintk("%s %s hash is sync\n", __FUNCTION__, algo); -+ (*swd)->sw_tfm = crypto_hash_tfm( -+ crypto_alloc_hash(algo, 0, CRYPTO_ALG_ASYNC)); -+ } -+ -+ if (!(*swd)->sw_tfm) { -+ dprintk("cryptosoft: crypto_alloc_hash failed(%s,0x%x)\n", -+ algo, mode); -+ swcr_freesession(NULL, i); -+ return EINVAL; -+ } -+ -+ (*swd)->u.hmac.sw_klen = (cri->cri_klen + 7) / 8; -+ (*swd)->u.hmac.sw_key = (char *)kmalloc((*swd)->u.hmac.sw_klen, -+ SLAB_ATOMIC); -+ if ((*swd)->u.hmac.sw_key == NULL) { -+ swcr_freesession(NULL, i); -+ dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ memcpy((*swd)->u.hmac.sw_key, cri->cri_key, (*swd)->u.hmac.sw_klen); -+ if (cri->cri_mlen) { -+ (*swd)->u.hmac.sw_mlen = cri->cri_mlen; -+ } else if ((*swd)->sw_type & SW_TYPE_ASYNC) { -+ (*swd)->u.hmac.sw_mlen = crypto_ahash_digestsize( -+ __crypto_ahash_cast((*swd)->sw_tfm)); -+ } else { -+ (*swd)->u.hmac.sw_mlen = crypto_hash_digestsize( -+ crypto_hash_cast((*swd)->sw_tfm)); -+ } -+ } else if ((*swd)->sw_type & SW_TYPE_COMP) { -+ (*swd)->sw_tfm = crypto_comp_tfm( -+ crypto_alloc_comp(algo, 0, CRYPTO_ALG_ASYNC)); -+ if (!(*swd)->sw_tfm) { -+ dprintk("cryptosoft: crypto_alloc_comp failed(%s,0x%x)\n", -+ algo, mode); -+ swcr_freesession(NULL, i); -+ return EINVAL; -+ } -+ (*swd)->u.sw_comp_buf = kmalloc(CRYPTO_MAX_DATA_LEN, SLAB_ATOMIC); -+ if ((*swd)->u.sw_comp_buf == NULL) { -+ swcr_freesession(NULL, i); -+ dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ } else { -+ printk("cryptosoft: Unhandled sw_type %d\n", (*swd)->sw_type); -+ swcr_freesession(NULL, i); -+ return EINVAL; -+ } -+ -+ cri = cri->cri_next; -+ swd = &((*swd)->sw_next); -+ } -+ return 0; -+} -+ -+/* -+ * Free a session. -+ */ -+static int -+swcr_freesession(device_t dev, u_int64_t tid) -+{ -+ struct swcr_data *swd; -+ u_int32_t sid = CRYPTO_SESID2LID(tid); -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid > swcr_sesnum || swcr_sessions == NULL || -+ swcr_sessions[sid] == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return(EINVAL); -+ } -+ -+ /* Silently accept and return */ -+ if (sid == 0) -+ return(0); -+ -+ while ((swd = swcr_sessions[sid]) != NULL) { -+ swcr_sessions[sid] = swd->sw_next; -+ if (swd->sw_tfm) { -+ switch (swd->sw_type & SW_TYPE_ALG_AMASK) { -+#ifdef HAVE_AHASH -+ case SW_TYPE_AHMAC: -+ case SW_TYPE_AHASH: -+ crypto_free_ahash(__crypto_ahash_cast(swd->sw_tfm)); -+ break; -+#endif -+#ifdef HAVE_ABLKCIPHER -+ case SW_TYPE_ABLKCIPHER: -+ crypto_free_ablkcipher(__crypto_ablkcipher_cast(swd->sw_tfm)); -+ break; -+#endif -+ case SW_TYPE_BLKCIPHER: -+ crypto_free_blkcipher(crypto_blkcipher_cast(swd->sw_tfm)); -+ break; -+ case SW_TYPE_HMAC: -+ case SW_TYPE_HASH: -+ crypto_free_hash(crypto_hash_cast(swd->sw_tfm)); -+ break; -+ case SW_TYPE_COMP: -+ crypto_free_comp(crypto_comp_cast(swd->sw_tfm)); -+ default: -+ crypto_free_tfm(swd->sw_tfm); -+ break; -+ } -+ swd->sw_tfm = NULL; -+ } -+ if (swd->sw_type & SW_TYPE_COMP) { -+ if (swd->u.sw_comp_buf) -+ kfree(swd->u.sw_comp_buf); -+ } else { -+ if (swd->u.hmac.sw_key) -+ kfree(swd->u.hmac.sw_key); -+ } -+ kfree(swd); -+ } -+ return 0; -+} -+ -+#if defined(HAVE_ABLKCIPHER) || defined(HAVE_AHASH) -+/* older kernels had no async interface */ -+ -+static void swcr_process_callback(struct crypto_async_request *creq, int err) -+{ -+ struct swcr_req *req = creq->data; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (err) { -+ if (err == -EINPROGRESS) -+ return; -+ dprintk("%s() fail %d\n", __FUNCTION__, -err); -+ req->crp->crp_etype = -err; -+ goto done; -+ } -+ -+ switch (req->sw->sw_type & SW_TYPE_ALG_AMASK) { -+ case SW_TYPE_AHMAC: -+ case SW_TYPE_AHASH: -+ crypto_copyback(req->crp->crp_flags, req->crp->crp_buf, -+ req->crd->crd_inject, req->sw->u.hmac.sw_mlen, req->result); -+ ahash_request_free(req->crypto_req); -+ break; -+ case SW_TYPE_ABLKCIPHER: -+ ablkcipher_request_free(req->crypto_req); -+ break; -+ default: -+ req->crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+ req->crd = req->crd->crd_next; -+ if (req->crd) { -+ swcr_process_req(req); -+ return; -+ } -+ -+done: -+ dprintk("%s crypto_done %p\n", __FUNCTION__, req); -+ crypto_done(req->crp); -+ kmem_cache_free(swcr_req_cache, req); -+} -+#endif /* defined(HAVE_ABLKCIPHER) || defined(HAVE_AHASH) */ -+ -+ -+static void swcr_process_req(struct swcr_req *req) -+{ -+ struct swcr_data *sw; -+ struct cryptop *crp = req->crp; -+ struct cryptodesc *crd = req->crd; -+ struct sk_buff *skb = (struct sk_buff *) crp->crp_buf; -+ struct uio *uiop = (struct uio *) crp->crp_buf; -+ int sg_num, sg_len, skip; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ /* -+ * Find the crypto context. -+ * -+ * XXX Note that the logic here prevents us from having -+ * XXX the same algorithm multiple times in a session -+ * XXX (or rather, we can but it won't give us the right -+ * XXX results). To do that, we'd need some way of differentiating -+ * XXX between the various instances of an algorithm (so we can -+ * XXX locate the correct crypto context). -+ */ -+ for (sw = req->sw_head; sw && sw->sw_alg != crd->crd_alg; sw = sw->sw_next) -+ ; -+ -+ /* No such context ? */ -+ if (sw == NULL) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ goto done; -+ } -+ -+ req->sw = sw; -+ skip = crd->crd_skip; -+ -+ /* -+ * setup the SG list skip from the start of the buffer -+ */ -+ memset(req->sg, 0, sizeof(req->sg)); -+ sg_init_table(req->sg, SCATTERLIST_MAX); -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ int i, len; -+ -+ sg_num = 0; -+ sg_len = 0; -+ -+ if (skip < skb_headlen(skb)) { -+ len = skb_headlen(skb) - skip; -+ if (len + sg_len > crd->crd_len) -+ len = crd->crd_len - sg_len; -+ sg_set_page(&req->sg[sg_num], -+ virt_to_page(skb->data + skip), len, -+ offset_in_page(skb->data + skip)); -+ sg_len += len; -+ sg_num++; -+ skip = 0; -+ } else -+ skip -= skb_headlen(skb); -+ -+ for (i = 0; sg_len < crd->crd_len && -+ i < skb_shinfo(skb)->nr_frags && -+ sg_num < SCATTERLIST_MAX; i++) { -+ if (skip < skb_shinfo(skb)->frags[i].size) { -+ len = skb_shinfo(skb)->frags[i].size - skip; -+ if (len + sg_len > crd->crd_len) -+ len = crd->crd_len - sg_len; -+ sg_set_page(&req->sg[sg_num], -+ skb_shinfo(skb)->frags[i].page, -+ len, -+ skb_shinfo(skb)->frags[i].page_offset + skip); -+ sg_len += len; -+ sg_num++; -+ skip = 0; -+ } else -+ skip -= skb_shinfo(skb)->frags[i].size; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ int len; -+ -+ sg_len = 0; -+ for (sg_num = 0; sg_len < crd->crd_len && -+ sg_num < uiop->uio_iovcnt && -+ sg_num < SCATTERLIST_MAX; sg_num++) { -+ if (skip <= uiop->uio_iov[sg_num].iov_len) { -+ len = uiop->uio_iov[sg_num].iov_len - skip; -+ if (len + sg_len > crd->crd_len) -+ len = crd->crd_len - sg_len; -+ sg_set_page(&req->sg[sg_num], -+ virt_to_page(uiop->uio_iov[sg_num].iov_base+skip), -+ len, -+ offset_in_page(uiop->uio_iov[sg_num].iov_base+skip)); -+ sg_len += len; -+ skip = 0; -+ } else -+ skip -= uiop->uio_iov[sg_num].iov_len; -+ } -+ } else { -+ sg_len = (crp->crp_ilen - skip); -+ if (sg_len > crd->crd_len) -+ sg_len = crd->crd_len; -+ sg_set_page(&req->sg[0], virt_to_page(crp->crp_buf + skip), -+ sg_len, offset_in_page(crp->crp_buf + skip)); -+ sg_num = 1; -+ } -+ -+ switch (sw->sw_type & SW_TYPE_ALG_AMASK) { -+ -+#ifdef HAVE_AHASH -+ case SW_TYPE_AHMAC: -+ case SW_TYPE_AHASH: -+ { -+ int ret; -+ -+ /* check we have room for the result */ -+ if (crp->crp_ilen - crd->crd_inject < sw->u.hmac.sw_mlen) { -+ dprintk("cryptosoft: EINVAL crp_ilen=%d, len=%d, inject=%d " -+ "digestsize=%d\n", crp->crp_ilen, crd->crd_skip + sg_len, -+ crd->crd_inject, sw->u.hmac.sw_mlen); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+ req->crypto_req = -+ ahash_request_alloc(__crypto_ahash_cast(sw->sw_tfm),GFP_KERNEL); -+ if (!req->crypto_req) { -+ crp->crp_etype = ENOMEM; -+ dprintk("%s,%d: ENOMEM ahash_request_alloc", __FILE__, __LINE__); -+ goto done; -+ } -+ -+ ahash_request_set_callback(req->crypto_req, -+ CRYPTO_TFM_REQ_MAY_BACKLOG, swcr_process_callback, req); -+ -+ memset(req->result, 0, sizeof(req->result)); -+ -+ if (sw->sw_type & SW_TYPE_AHMAC) -+ crypto_ahash_setkey(__crypto_ahash_cast(sw->sw_tfm), -+ sw->u.hmac.sw_key, sw->u.hmac.sw_klen); -+ ahash_request_set_crypt(req->crypto_req, req->sg, req->result, sg_len); -+ ret = crypto_ahash_digest(req->crypto_req); -+ switch (ret) { -+ case -EINPROGRESS: -+ case -EBUSY: -+ return; -+ default: -+ case 0: -+ dprintk("hash OP %s %d\n", ret ? "failed" : "success", ret); -+ crp->crp_etype = ret; -+ ahash_request_free(req->crypto_req); -+ goto done; -+ } -+ } break; -+#endif /* HAVE_AHASH */ -+ -+#ifdef HAVE_ABLKCIPHER -+ case SW_TYPE_ABLKCIPHER: { -+ int ret; -+ unsigned char *ivp = req->iv; -+ int ivsize = -+ crypto_ablkcipher_ivsize(__crypto_ablkcipher_cast(sw->sw_tfm)); -+ -+ if (sg_len < crypto_ablkcipher_blocksize( -+ __crypto_ablkcipher_cast(sw->sw_tfm))) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: EINVAL len %d < %d\n", __FILE__, __LINE__, -+ sg_len, crypto_ablkcipher_blocksize( -+ __crypto_ablkcipher_cast(sw->sw_tfm))); -+ goto done; -+ } -+ -+ if (ivsize > sizeof(req->iv)) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ goto done; -+ } -+ -+ req->crypto_req = ablkcipher_request_alloc( -+ __crypto_ablkcipher_cast(sw->sw_tfm), GFP_KERNEL); -+ if (!req->crypto_req) { -+ crp->crp_etype = ENOMEM; -+ dprintk("%s,%d: ENOMEM ablkcipher_request_alloc", -+ __FILE__, __LINE__); -+ goto done; -+ } -+ -+ ablkcipher_request_set_callback(req->crypto_req, -+ CRYPTO_TFM_REQ_MAY_BACKLOG, swcr_process_callback, req); -+ -+ if (crd->crd_flags & CRD_F_KEY_EXPLICIT) { -+ int i, error; -+ -+ if (debug) { -+ dprintk("%s key:", __FUNCTION__); -+ for (i = 0; i < (crd->crd_klen + 7) / 8; i++) -+ dprintk("%s0x%x", (i % 8) ? " " : "\n ", -+ crd->crd_key[i] & 0xff); -+ dprintk("\n"); -+ } -+ /* OCF doesn't enforce keys */ -+ crypto_ablkcipher_set_flags(__crypto_ablkcipher_cast(sw->sw_tfm), -+ CRYPTO_TFM_REQ_WEAK_KEY); -+ error = crypto_ablkcipher_setkey( -+ __crypto_ablkcipher_cast(sw->sw_tfm), crd->crd_key, -+ (crd->crd_klen + 7) / 8); -+ if (error) { -+ dprintk("cryptosoft: setkey failed %d (crt_flags=0x%x)\n", -+ error, sw->sw_tfm->crt_flags); -+ crp->crp_etype = -error; -+ } -+ } -+ -+ if (crd->crd_flags & CRD_F_ENCRYPT) { /* encrypt */ -+ -+ if (crd->crd_flags & CRD_F_IV_EXPLICIT) -+ ivp = crd->crd_iv; -+ else -+ get_random_bytes(ivp, ivsize); -+ /* -+ * do we have to copy the IV back to the buffer ? -+ */ -+ if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) { -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ crd->crd_inject, ivsize, (caddr_t)ivp); -+ } -+ ablkcipher_request_set_crypt(req->crypto_req, req->sg, req->sg, -+ sg_len, ivp); -+ ret = crypto_ablkcipher_encrypt(req->crypto_req); -+ -+ } else { /*decrypt */ -+ -+ if (crd->crd_flags & CRD_F_IV_EXPLICIT) -+ ivp = crd->crd_iv; -+ else -+ crypto_copydata(crp->crp_flags, crp->crp_buf, -+ crd->crd_inject, ivsize, (caddr_t)ivp); -+ ablkcipher_request_set_crypt(req->crypto_req, req->sg, req->sg, -+ sg_len, ivp); -+ ret = crypto_ablkcipher_decrypt(req->crypto_req); -+ } -+ -+ switch (ret) { -+ case -EINPROGRESS: -+ case -EBUSY: -+ return; -+ default: -+ case 0: -+ dprintk("crypto OP %s %d\n", ret ? "failed" : "success", ret); -+ crp->crp_etype = ret; -+ goto done; -+ } -+ } break; -+#endif /* HAVE_ABLKCIPHER */ -+ -+ case SW_TYPE_BLKCIPHER: { -+ unsigned char iv[EALG_MAX_BLOCK_LEN]; -+ unsigned char *ivp = iv; -+ struct blkcipher_desc desc; -+ int ivsize = crypto_blkcipher_ivsize(crypto_blkcipher_cast(sw->sw_tfm)); -+ -+ if (sg_len < crypto_blkcipher_blocksize( -+ crypto_blkcipher_cast(sw->sw_tfm))) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: EINVAL len %d < %d\n", __FILE__, __LINE__, -+ sg_len, crypto_blkcipher_blocksize( -+ crypto_blkcipher_cast(sw->sw_tfm))); -+ goto done; -+ } -+ -+ if (ivsize > sizeof(iv)) { -+ crp->crp_etype = EINVAL; -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ goto done; -+ } -+ -+ if (crd->crd_flags & CRD_F_KEY_EXPLICIT) { -+ int i, error; -+ -+ if (debug) { -+ dprintk("%s key:", __FUNCTION__); -+ for (i = 0; i < (crd->crd_klen + 7) / 8; i++) -+ dprintk("%s0x%x", (i % 8) ? " " : "\n ", -+ crd->crd_key[i] & 0xff); -+ dprintk("\n"); -+ } -+ /* OCF doesn't enforce keys */ -+ crypto_blkcipher_set_flags(crypto_blkcipher_cast(sw->sw_tfm), -+ CRYPTO_TFM_REQ_WEAK_KEY); -+ error = crypto_blkcipher_setkey( -+ crypto_blkcipher_cast(sw->sw_tfm), crd->crd_key, -+ (crd->crd_klen + 7) / 8); -+ if (error) { -+ dprintk("cryptosoft: setkey failed %d (crt_flags=0x%x)\n", -+ error, sw->sw_tfm->crt_flags); -+ crp->crp_etype = -error; -+ } -+ } -+ -+ memset(&desc, 0, sizeof(desc)); -+ desc.tfm = crypto_blkcipher_cast(sw->sw_tfm); -+ -+ if (crd->crd_flags & CRD_F_ENCRYPT) { /* encrypt */ -+ -+ if (crd->crd_flags & CRD_F_IV_EXPLICIT) { -+ ivp = crd->crd_iv; -+ } else { -+ get_random_bytes(ivp, ivsize); -+ } -+ /* -+ * do we have to copy the IV back to the buffer ? -+ */ -+ if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) { -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ crd->crd_inject, ivsize, (caddr_t)ivp); -+ } -+ desc.info = ivp; -+ crypto_blkcipher_encrypt_iv(&desc, req->sg, req->sg, sg_len); -+ -+ } else { /*decrypt */ -+ -+ if (crd->crd_flags & CRD_F_IV_EXPLICIT) { -+ ivp = crd->crd_iv; -+ } else { -+ crypto_copydata(crp->crp_flags, crp->crp_buf, -+ crd->crd_inject, ivsize, (caddr_t)ivp); -+ } -+ desc.info = ivp; -+ crypto_blkcipher_decrypt_iv(&desc, req->sg, req->sg, sg_len); -+ } -+ } break; -+ -+ case SW_TYPE_HMAC: -+ case SW_TYPE_HASH: -+ { -+ char result[HASH_MAX_LEN]; -+ struct hash_desc desc; -+ -+ /* check we have room for the result */ -+ if (crp->crp_ilen - crd->crd_inject < sw->u.hmac.sw_mlen) { -+ dprintk("cryptosoft: EINVAL crp_ilen=%d, len=%d, inject=%d " -+ "digestsize=%d\n", crp->crp_ilen, crd->crd_skip + sg_len, -+ crd->crd_inject, sw->u.hmac.sw_mlen); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+ memset(&desc, 0, sizeof(desc)); -+ desc.tfm = crypto_hash_cast(sw->sw_tfm); -+ -+ memset(result, 0, sizeof(result)); -+ -+ if (sw->sw_type & SW_TYPE_HMAC) { -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) -+ crypto_hmac(sw->sw_tfm, sw->u.hmac.sw_key, &sw->u.hmac.sw_klen, -+ req->sg, sg_num, result); -+#else -+ crypto_hash_setkey(desc.tfm, sw->u.hmac.sw_key, -+ sw->u.hmac.sw_klen); -+ crypto_hash_digest(&desc, req->sg, sg_len, result); -+#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) */ -+ -+ } else { /* SW_TYPE_HASH */ -+ crypto_hash_digest(&desc, req->sg, sg_len, result); -+ } -+ -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ crd->crd_inject, sw->u.hmac.sw_mlen, result); -+ } -+ break; -+ -+ case SW_TYPE_COMP: { -+ void *ibuf = NULL; -+ void *obuf = sw->u.sw_comp_buf; -+ int ilen = sg_len, olen = CRYPTO_MAX_DATA_LEN; -+ int ret = 0; -+ -+ /* -+ * we need to use an additional copy if there is more than one -+ * input chunk since the kernel comp routines do not handle -+ * SG yet. Otherwise we just use the input buffer as is. -+ * Rather than allocate another buffer we just split the tmp -+ * buffer we already have. -+ * Perhaps we should just use zlib directly ? -+ */ -+ if (sg_num > 1) { -+ int blk; -+ -+ ibuf = obuf; -+ for (blk = 0; blk < sg_num; blk++) { -+ memcpy(obuf, sg_virt(&req->sg[blk]), -+ req->sg[blk].length); -+ obuf += req->sg[blk].length; -+ } -+ olen -= sg_len; -+ } else -+ ibuf = sg_virt(&req->sg[0]); -+ -+ if (crd->crd_flags & CRD_F_ENCRYPT) { /* compress */ -+ ret = crypto_comp_compress(crypto_comp_cast(sw->sw_tfm), -+ ibuf, ilen, obuf, &olen); -+ if (!ret && olen > crd->crd_len) { -+ dprintk("cryptosoft: ERANGE compress %d into %d\n", -+ crd->crd_len, olen); -+ if (swcr_fail_if_compression_grows) -+ ret = ERANGE; -+ } -+ } else { /* decompress */ -+ ret = crypto_comp_decompress(crypto_comp_cast(sw->sw_tfm), -+ ibuf, ilen, obuf, &olen); -+ if (!ret && (olen + crd->crd_inject) > crp->crp_olen) { -+ dprintk("cryptosoft: ETOOSMALL decompress %d into %d, " -+ "space for %d,at offset %d\n", -+ crd->crd_len, olen, crp->crp_olen, crd->crd_inject); -+ ret = ETOOSMALL; -+ } -+ } -+ if (ret) -+ dprintk("%s,%d: ret = %d\n", __FILE__, __LINE__, ret); -+ -+ /* -+ * on success copy result back, -+ * linux crpyto API returns -errno, we need to fix that -+ */ -+ crp->crp_etype = ret < 0 ? -ret : ret; -+ if (ret == 0) { -+ /* copy back the result and return it's size */ -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ crd->crd_inject, olen, obuf); -+ crp->crp_olen = olen; -+ } -+ -+ -+ } break; -+ -+ default: -+ /* Unknown/unsupported algorithm */ -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+done: -+ crypto_done(crp); -+ kmem_cache_free(swcr_req_cache, req); -+} -+ -+ -+/* -+ * Process a crypto request. -+ */ -+static int -+swcr_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ struct swcr_req *req = NULL; -+ u_int32_t lid; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ /* Sanity check */ -+ if (crp == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ crp->crp_etype = 0; -+ -+ if (crp->crp_desc == NULL || crp->crp_buf == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+ lid = crp->crp_sid & 0xffffffff; -+ if (lid >= swcr_sesnum || lid == 0 || swcr_sessions == NULL || -+ swcr_sessions[lid] == NULL) { -+ crp->crp_etype = ENOENT; -+ dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__); -+ goto done; -+ } -+ -+ /* -+ * do some error checking outside of the loop for SKB and IOV processing -+ * this leaves us with valid skb or uiop pointers for later -+ */ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ struct sk_buff *skb = (struct sk_buff *) crp->crp_buf; -+ if (skb_shinfo(skb)->nr_frags >= SCATTERLIST_MAX) { -+ printk("%s,%d: %d nr_frags > SCATTERLIST_MAX", __FILE__, __LINE__, -+ skb_shinfo(skb)->nr_frags); -+ goto done; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ struct uio *uiop = (struct uio *) crp->crp_buf; -+ if (uiop->uio_iovcnt > SCATTERLIST_MAX) { -+ printk("%s,%d: %d uio_iovcnt > SCATTERLIST_MAX", __FILE__, __LINE__, -+ uiop->uio_iovcnt); -+ goto done; -+ } -+ } -+ -+ /* -+ * setup a new request ready for queuing -+ */ -+ req = kmem_cache_alloc(swcr_req_cache, SLAB_ATOMIC); -+ if (req == NULL) { -+ dprintk("%s,%d: ENOMEM\n", __FILE__, __LINE__); -+ crp->crp_etype = ENOMEM; -+ goto done; -+ } -+ memset(req, 0, sizeof(*req)); -+ -+ req->sw_head = swcr_sessions[lid]; -+ req->crp = crp; -+ req->crd = crp->crp_desc; -+ -+ swcr_process_req(req); -+ return 0; -+ -+done: -+ crypto_done(crp); -+ if (req) -+ kmem_cache_free(swcr_req_cache, req); -+ return 0; -+} -+ -+ -+static int -+cryptosoft_init(void) -+{ -+ int i, sw_type, mode; -+ char *algo; -+ -+ dprintk("%s(%p)\n", __FUNCTION__, cryptosoft_init); -+ -+ swcr_req_cache = kmem_cache_create("cryptosoft_req", -+ sizeof(struct swcr_req), 0, SLAB_HWCACHE_ALIGN, NULL -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) -+ , NULL -+#endif -+ ); -+ if (!swcr_req_cache) { -+ printk("cryptosoft: failed to create request cache\n"); -+ return -ENOENT; -+ } -+ -+ softc_device_init(&swcr_softc, "cryptosoft", 0, swcr_methods); -+ -+ swcr_id = crypto_get_driverid(softc_get_device(&swcr_softc), -+ CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_SYNC); -+ if (swcr_id < 0) { -+ printk("cryptosoft: Software crypto device cannot initialize!"); -+ return -ENODEV; -+ } -+ -+#define REGISTER(alg) \ -+ crypto_register(swcr_id, alg, 0,0) -+ -+ for (i = 0; i < sizeof(crypto_details)/sizeof(crypto_details[0]); i++) { -+ int found; -+ -+ algo = crypto_details[i].alg_name; -+ if (!algo || !*algo) { -+ dprintk("%s:Algorithm %d not supported\n", __FUNCTION__, i); -+ continue; -+ } -+ -+ mode = crypto_details[i].mode; -+ sw_type = crypto_details[i].sw_type; -+ -+ found = 0; -+ switch (sw_type & SW_TYPE_ALG_MASK) { -+ case SW_TYPE_CIPHER: -+ found = crypto_has_cipher(algo, 0, CRYPTO_ALG_ASYNC); -+ break; -+ case SW_TYPE_HMAC: -+ found = crypto_has_hash(algo, 0, swcr_no_ahash?CRYPTO_ALG_ASYNC:0); -+ break; -+ case SW_TYPE_HASH: -+ found = crypto_has_hash(algo, 0, swcr_no_ahash?CRYPTO_ALG_ASYNC:0); -+ break; -+ case SW_TYPE_COMP: -+ found = crypto_has_comp(algo, 0, CRYPTO_ALG_ASYNC); -+ break; -+ case SW_TYPE_BLKCIPHER: -+ found = crypto_has_blkcipher(algo, 0, CRYPTO_ALG_ASYNC); -+ if (!found && !swcr_no_ablk) -+ found = crypto_has_ablkcipher(algo, 0, 0); -+ break; -+ } -+ if (found) { -+ REGISTER(i); -+ } else { -+ dprintk("%s:Algorithm Type %d not supported (algorithm %d:'%s')\n", -+ __FUNCTION__, sw_type, i, algo); -+ } -+ } -+ return 0; -+} -+ -+static void -+cryptosoft_exit(void) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ crypto_unregister_all(swcr_id); -+ swcr_id = -1; -+ kmem_cache_destroy(swcr_req_cache); -+} -+ -+late_initcall(cryptosoft_init); -+module_exit(cryptosoft_exit); -+ -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>"); -+MODULE_DESCRIPTION("Cryptosoft (OCF module for kernel crypto)"); -diff --git a/crypto/ocf/ep80579/Makefile b/crypto/ocf/ep80579/Makefile -new file mode 100644 -index 0000000..e488374 ---- /dev/null -+++ b/crypto/ocf/ep80579/Makefile -@@ -0,0 +1,119 @@ -+######################################################################### -+# -+# Targets supported -+# all - builds everything and installs -+# install - identical to all -+# depend - build dependencies -+# clean - clears derived objects except the .depend files -+# distclean- clears all derived objects and the .depend file -+# -+# @par -+# This file is provided under a dual BSD/GPLv2 license. When using or -+# redistributing this file, you may do so under either license. -+# -+# GPL LICENSE SUMMARY -+# -+# Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+# -+# This program is free software; you can redistribute it and/or modify -+# it under the terms of version 2 of the GNU General Public License as -+# published by the Free Software Foundation. -+# -+# This program is distributed in the hope that it will be useful, but -+# WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+# General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. -+# The full GNU General Public License is included in this distribution -+# in the file called LICENSE.GPL. -+# -+# Contact Information: -+# Intel Corporation -+# -+# BSD LICENSE -+# -+# Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+# All rights reserved. -+# -+# Redistribution and use in source and binary forms, with or without -+# modification, are permitted provided that the following conditions -+# are met: -+# -+# * Redistributions of source code must retain the above copyright -+# notice, this list of conditions and the following disclaimer. -+# * Redistributions in binary form must reproduce the above copyright -+# notice, this list of conditions and the following disclaimer in -+# the documentation and/or other materials provided with the -+# distribution. -+# * Neither the name of Intel Corporation nor the names of its -+# contributors may be used to endorse or promote products derived -+# from this software without specific prior written permission. -+# -+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+# -+# -+# version: Security.L.1.0.2-229 -+############################################################################ -+ -+ -+####################Common variables and definitions######################## -+ -+ifndef ICP_ROOT -+$(warning ICP_ROOT is undefined. Please set the path to EP80579 release package directory \ -+ "-> setenv ICP_ROOT <path>") -+all fastdep: -+ : -+else -+ -+ifndef KERNEL_SOURCE_ROOT -+$(error KERNEL_SOURCE_ROOT is undefined. Please set the path to the kernel source directory \ -+ "-> setenv KERNEL_SOURCE_ROOT <path>") -+endif -+ -+# Ensure The ENV_DIR environmental var is defined. -+ifndef ICP_ENV_DIR -+$(error ICP_ENV_DIR is undefined. Please set the path to EP80579 driver environment.mk file \ -+ "-> setenv ICP_ENV_DIR <path>") -+endif -+ -+#Add your project environment Makefile -+include ${ICP_ENV_DIR}/environment.mk -+ -+#include the makefile with all the default and common Make variable definitions -+include ${ICP_BUILDSYSTEM_PATH}/build_files/common.mk -+ -+#Add the name for the executable, Library or Module output definitions -+OUTPUT_NAME= icp_ocf -+ -+# List of Source Files to be compiled -+SOURCES= icp_common.c icp_sym.c icp_asym.c icp_ocf_linux.c -+ -+#common includes between all supported OSes -+INCLUDES= -I ${ICP_API_DIR} -I${ICP_LAC_API} \ -+-I${ICP_OCF_SRC_DIR} -+ -+# The location of the os level makefile needs to be changed. -+include ${ICP_ENV_DIR}/${ICP_OS}_${ICP_OS_LEVEL}.mk -+ -+# On the line directly below list the outputs you wish to build for, -+# e.g "lib_static lib_shared exe module" as shown below -+install: module -+ -+###################Include rules makefiles######################## -+include ${ICP_BUILDSYSTEM_PATH}/build_files/rules.mk -+###################End of Rules inclusion######################### -+ -+endif -diff --git a/crypto/ocf/ep80579/icp_asym.c b/crypto/ocf/ep80579/icp_asym.c -new file mode 100644 -index 0000000..ebdddc1 ---- /dev/null -+++ b/crypto/ocf/ep80579/icp_asym.c -@@ -0,0 +1,1334 @@ -+/*************************************************************************** -+ * -+ * This file is provided under a dual BSD/GPLv2 license. When using or -+ * redistributing this file, you may do so under either license. -+ * -+ * GPL LICENSE SUMMARY -+ * -+ * Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. -+ * The full GNU General Public License is included in this distribution -+ * in the file called LICENSE.GPL. -+ * -+ * Contact Information: -+ * Intel Corporation -+ * -+ * BSD LICENSE -+ * -+ * Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Intel Corporation nor the names of its -+ * contributors may be used to endorse or promote products derived -+ * from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * version: Security.L.1.0.2-229 -+ * -+ ***************************************************************************/ -+ -+#include "icp_ocf.h" -+ -+/*The following define values (containing the word 'INDEX') are used to find -+the index of each input buffer of the crypto_kop struct (see OCF cryptodev.h). -+These values were found through analysis of the OCF OpenSSL patch. If the -+calling program uses different input buffer positions, these defines will have -+to be changed.*/ -+ -+/*DIFFIE HELLMAN buffer index values*/ -+#define ICP_DH_KRP_PARAM_PRIME_INDEX (0) -+#define ICP_DH_KRP_PARAM_BASE_INDEX (1) -+#define ICP_DH_KRP_PARAM_PRIVATE_VALUE_INDEX (2) -+#define ICP_DH_KRP_PARAM_RESULT_INDEX (3) -+ -+/*MOD EXP buffer index values*/ -+#define ICP_MOD_EXP_KRP_PARAM_BASE_INDEX (0) -+#define ICP_MOD_EXP_KRP_PARAM_EXPONENT_INDEX (1) -+#define ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX (2) -+#define ICP_MOD_EXP_KRP_PARAM_RESULT_INDEX (3) -+ -+/*MOD EXP CRT buffer index values*/ -+#define ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_P_INDEX (0) -+#define ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_Q_INDEX (1) -+#define ICP_MOD_EXP_CRT_KRP_PARAM_I_INDEX (2) -+#define ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DP_INDEX (3) -+#define ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DQ_INDEX (4) -+#define ICP_MOD_EXP_CRT_KRP_PARAM_COEFF_QINV_INDEX (5) -+#define ICP_MOD_EXP_CRT_KRP_PARAM_RESULT_INDEX (6) -+ -+/*DSA sign buffer index values*/ -+#define ICP_DSA_SIGN_KRP_PARAM_DGST_INDEX (0) -+#define ICP_DSA_SIGN_KRP_PARAM_PRIME_P_INDEX (1) -+#define ICP_DSA_SIGN_KRP_PARAM_PRIME_Q_INDEX (2) -+#define ICP_DSA_SIGN_KRP_PARAM_G_INDEX (3) -+#define ICP_DSA_SIGN_KRP_PARAM_X_INDEX (4) -+#define ICP_DSA_SIGN_KRP_PARAM_R_RESULT_INDEX (5) -+#define ICP_DSA_SIGN_KRP_PARAM_S_RESULT_INDEX (6) -+ -+/*DSA verify buffer index values*/ -+#define ICP_DSA_VERIFY_KRP_PARAM_DGST_INDEX (0) -+#define ICP_DSA_VERIFY_KRP_PARAM_PRIME_P_INDEX (1) -+#define ICP_DSA_VERIFY_KRP_PARAM_PRIME_Q_INDEX (2) -+#define ICP_DSA_VERIFY_KRP_PARAM_G_INDEX (3) -+#define ICP_DSA_VERIFY_KRP_PARAM_PUBKEY_INDEX (4) -+#define ICP_DSA_VERIFY_KRP_PARAM_SIG_R_INDEX (5) -+#define ICP_DSA_VERIFY_KRP_PARAM_SIG_S_INDEX (6) -+ -+/*DSA sign prime Q vs random number K size check values*/ -+#define DONT_RUN_LESS_THAN_CHECK (0) -+#define FAIL_A_IS_GREATER_THAN_B (1) -+#define FAIL_A_IS_EQUAL_TO_B (1) -+#define SUCCESS_A_IS_LESS_THAN_B (0) -+#define DSA_SIGN_RAND_GEN_VAL_CHECK_MAX_ITERATIONS (500) -+ -+/* We need to set a cryptokp success value just in case it is set or allocated -+ and not set to zero outside of this module */ -+#define CRYPTO_OP_SUCCESS (0) -+ -+/*Function to compute Diffie Hellman (DH) phase 1 or phase 2 key values*/ -+static int icp_ocfDrvDHComputeKey(struct cryptkop *krp); -+ -+/*Function to compute a Modular Exponentiation (Mod Exp)*/ -+static int icp_ocfDrvModExp(struct cryptkop *krp); -+ -+/*Function to compute a Mod Exp using the Chinease Remainder Theorem*/ -+static int icp_ocfDrvModExpCRT(struct cryptkop *krp); -+ -+/*Helper function to compute whether the first big number argument is less than -+ the second big number argument */ -+static int -+icp_ocfDrvCheckALessThanB(CpaFlatBuffer * pK, CpaFlatBuffer * pQ, int *doCheck); -+ -+/*Function to sign an input with DSA R and S keys*/ -+static int icp_ocfDrvDsaSign(struct cryptkop *krp); -+ -+/*Function to Verify a DSA buffer signature*/ -+static int icp_ocfDrvDsaVerify(struct cryptkop *krp); -+ -+/*Callback function for DH operation*/ -+static void -+icp_ocfDrvDhP1CallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, CpaFlatBuffer * pLocalOctetStringPV); -+ -+/*Callback function for ME operation*/ -+static void -+icp_ocfDrvModExpCallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, CpaFlatBuffer * pResult); -+ -+/*Callback function for ME CRT operation*/ -+static void -+icp_ocfDrvModExpCRTCallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, CpaFlatBuffer * pOutputData); -+ -+/*Callback function for DSA sign operation*/ -+static void -+icp_ocfDrvDsaRSSignCallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, -+ CpaBoolean protocolStatus, -+ CpaFlatBuffer * pR, CpaFlatBuffer * pS); -+ -+/*Callback function for DSA Verify operation*/ -+static void -+icp_ocfDrvDsaVerifyCallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, CpaBoolean verifyStatus); -+ -+/* Name : icp_ocfDrvPkeProcess -+ * -+ * Description : This function will choose which PKE process to follow -+ * based on the input arguments -+ */ -+int icp_ocfDrvPkeProcess(icp_device_t dev, struct cryptkop *krp, int hint) -+{ -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ -+ if (NULL == krp) { -+ DPRINTK("%s(): Invalid input parameters, cryptkop = %p\n", -+ __FUNCTION__, krp); -+ return EINVAL; -+ } -+ -+ if (CPA_TRUE == icp_atomic_read(&icp_ocfDrvIsExiting)) { -+ krp->krp_status = ECANCELED; -+ return ECANCELED; -+ } -+ -+ switch (krp->krp_op) { -+ case CRK_DH_COMPUTE_KEY: -+ DPRINTK("%s() doing DH_COMPUTE_KEY\n", __FUNCTION__); -+ lacStatus = icp_ocfDrvDHComputeKey(krp); -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): icp_ocfDrvDHComputeKey failed " -+ "(%d).\n", __FUNCTION__, lacStatus); -+ krp->krp_status = ECANCELED; -+ return ECANCELED; -+ } -+ -+ break; -+ -+ case CRK_MOD_EXP: -+ DPRINTK("%s() doing MOD_EXP \n", __FUNCTION__); -+ lacStatus = icp_ocfDrvModExp(krp); -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): icp_ocfDrvModExp failed (%d).\n", -+ __FUNCTION__, lacStatus); -+ krp->krp_status = ECANCELED; -+ return ECANCELED; -+ } -+ -+ break; -+ -+ case CRK_MOD_EXP_CRT: -+ DPRINTK("%s() doing MOD_EXP_CRT \n", __FUNCTION__); -+ lacStatus = icp_ocfDrvModExpCRT(krp); -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): icp_ocfDrvModExpCRT " -+ "failed (%d).\n", __FUNCTION__, lacStatus); -+ krp->krp_status = ECANCELED; -+ return ECANCELED; -+ } -+ -+ break; -+ -+ case CRK_DSA_SIGN: -+ DPRINTK("%s() doing DSA_SIGN \n", __FUNCTION__); -+ lacStatus = icp_ocfDrvDsaSign(krp); -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): icp_ocfDrvDsaSign " -+ "failed (%d).\n", __FUNCTION__, lacStatus); -+ krp->krp_status = ECANCELED; -+ return ECANCELED; -+ } -+ -+ break; -+ -+ case CRK_DSA_VERIFY: -+ DPRINTK("%s() doing DSA_VERIFY \n", __FUNCTION__); -+ lacStatus = icp_ocfDrvDsaVerify(krp); -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): icp_ocfDrvDsaVerify " -+ "failed (%d).\n", __FUNCTION__, lacStatus); -+ krp->krp_status = ECANCELED; -+ return ECANCELED; -+ } -+ -+ break; -+ -+ default: -+ EPRINTK("%s(): Asymettric function not " -+ "supported (%d).\n", __FUNCTION__, krp->krp_op); -+ krp->krp_status = EOPNOTSUPP; -+ return EOPNOTSUPP; -+ } -+ -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+} -+ -+/* Name : icp_ocfDrvSwapBytes -+ * -+ * Description : This function is used to swap the byte order of a buffer. -+ * It has been seen that in general we are passed little endian byte order -+ * buffers, but LAC only accepts big endian byte order buffers. -+ */ -+static void inline icp_ocfDrvSwapBytes(u_int8_t * num, u_int32_t buff_len_bytes) -+{ -+ -+ int i; -+ u_int8_t *end_ptr; -+ u_int8_t hold_val; -+ -+ end_ptr = num + (buff_len_bytes - 1); -+ buff_len_bytes = buff_len_bytes >> 1; -+ for (i = 0; i < buff_len_bytes; i++) { -+ hold_val = *num; -+ *num = *end_ptr; -+ num++; -+ *end_ptr = hold_val; -+ end_ptr--; -+ } -+} -+ -+/* Name : icp_ocfDrvDHComputeKey -+ * -+ * Description : This function will map Diffie Hellman calls from OCF -+ * to the LAC API. OCF uses this function for Diffie Hellman Phase1 and -+ * Phase2. LAC has a separate Diffie Hellman Phase2 call, however both phases -+ * break down to a modular exponentiation. -+ */ -+static int icp_ocfDrvDHComputeKey(struct cryptkop *krp) -+{ -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ void *callbackTag = NULL; -+ CpaCyDhPhase1KeyGenOpData *pPhase1OpData = NULL; -+ CpaFlatBuffer *pLocalOctetStringPV = NULL; -+ uint32_t dh_prime_len_bytes = 0, dh_prime_len_bits = 0; -+ -+ /* Input checks - check prime is a multiple of 8 bits to allow for -+ allocation later */ -+ dh_prime_len_bits = -+ (krp->krp_param[ICP_DH_KRP_PARAM_PRIME_INDEX].crp_nbits); -+ -+ /* LAC can reject prime lengths based on prime key sizes, we just -+ need to make sure we can allocate space for the base and -+ exponent buffers correctly */ -+ if ((dh_prime_len_bits % NUM_BITS_IN_BYTE) != 0) { -+ APRINTK("%s(): Warning Prime number buffer size is not a " -+ "multiple of 8 bits\n", __FUNCTION__); -+ } -+ -+ /* Result storage space should be the same size as the prime as this -+ value can take up the same amount of storage space */ -+ if (dh_prime_len_bits != -+ krp->krp_param[ICP_DH_KRP_PARAM_RESULT_INDEX].crp_nbits) { -+ DPRINTK("%s(): Return Buffer must be the same size " -+ "as the Prime buffer\n", __FUNCTION__); -+ krp->krp_status = EINVAL; -+ return EINVAL; -+ } -+ /* Switch to size in bytes */ -+ BITS_TO_BYTES(dh_prime_len_bytes, dh_prime_len_bits); -+ -+ callbackTag = krp; -+ -+/*All allocations are set to ICP_M_NOWAIT due to the possibility of getting -+called in interrupt context*/ -+ pPhase1OpData = icp_kmem_cache_zalloc(drvDH_zone, ICP_M_NOWAIT); -+ if (NULL == pPhase1OpData) { -+ APRINTK("%s():Failed to get memory for key gen data\n", -+ __FUNCTION__); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ pLocalOctetStringPV = -+ icp_kmem_cache_zalloc(drvFlatBuffer_zone, ICP_M_NOWAIT); -+ if (NULL == pLocalOctetStringPV) { -+ APRINTK("%s():Failed to get memory for pLocalOctetStringPV\n", -+ __FUNCTION__); -+ ICP_CACHE_FREE(drvDH_zone, pPhase1OpData); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ /* Link parameters */ -+ pPhase1OpData->primeP.pData = -+ krp->krp_param[ICP_DH_KRP_PARAM_PRIME_INDEX].crp_p; -+ -+ pPhase1OpData->primeP.dataLenInBytes = dh_prime_len_bytes; -+ -+ icp_ocfDrvSwapBytes(pPhase1OpData->primeP.pData, dh_prime_len_bytes); -+ -+ pPhase1OpData->baseG.pData = -+ krp->krp_param[ICP_DH_KRP_PARAM_BASE_INDEX].crp_p; -+ -+ BITS_TO_BYTES(pPhase1OpData->baseG.dataLenInBytes, -+ krp->krp_param[ICP_DH_KRP_PARAM_BASE_INDEX].crp_nbits); -+ -+ icp_ocfDrvSwapBytes(pPhase1OpData->baseG.pData, -+ pPhase1OpData->baseG.dataLenInBytes); -+ -+ pPhase1OpData->privateValueX.pData = -+ krp->krp_param[ICP_DH_KRP_PARAM_PRIVATE_VALUE_INDEX].crp_p; -+ -+ BITS_TO_BYTES(pPhase1OpData->privateValueX.dataLenInBytes, -+ krp->krp_param[ICP_DH_KRP_PARAM_PRIVATE_VALUE_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(pPhase1OpData->privateValueX.pData, -+ pPhase1OpData->privateValueX.dataLenInBytes); -+ -+ /* Output parameters */ -+ pLocalOctetStringPV->pData = -+ krp->krp_param[ICP_DH_KRP_PARAM_RESULT_INDEX].crp_p; -+ -+ BITS_TO_BYTES(pLocalOctetStringPV->dataLenInBytes, -+ krp->krp_param[ICP_DH_KRP_PARAM_RESULT_INDEX].crp_nbits); -+ -+ lacStatus = cpaCyDhKeyGenPhase1(CPA_INSTANCE_HANDLE_SINGLE, -+ icp_ocfDrvDhP1CallBack, -+ callbackTag, pPhase1OpData, -+ pLocalOctetStringPV); -+ -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): DH Phase 1 Key Gen failed (%d).\n", -+ __FUNCTION__, lacStatus); -+ icp_ocfDrvFreeFlatBuffer(pLocalOctetStringPV); -+ ICP_CACHE_FREE(drvDH_zone, pPhase1OpData); -+ } -+ -+ return lacStatus; -+} -+ -+/* Name : icp_ocfDrvModExp -+ * -+ * Description : This function will map ordinary Modular Exponentiation calls -+ * from OCF to the LAC API. -+ * -+ */ -+static int icp_ocfDrvModExp(struct cryptkop *krp) -+{ -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ void *callbackTag = NULL; -+ CpaCyLnModExpOpData *pModExpOpData = NULL; -+ CpaFlatBuffer *pResult = NULL; -+ -+ if ((krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX].crp_nbits % -+ NUM_BITS_IN_BYTE) != 0) { -+ DPRINTK("%s(): Warning - modulus buffer size (%d) is not a " -+ "multiple of 8 bits\n", __FUNCTION__, -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX]. -+ crp_nbits); -+ } -+ -+ /* Result storage space should be the same size as the prime as this -+ value can take up the same amount of storage space */ -+ if (krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX].crp_nbits > -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_RESULT_INDEX].crp_nbits) { -+ APRINTK("%s(): Return Buffer size must be the same or" -+ " greater than the Modulus buffer\n", __FUNCTION__); -+ krp->krp_status = EINVAL; -+ return EINVAL; -+ } -+ -+ callbackTag = krp; -+ -+ pModExpOpData = icp_kmem_cache_zalloc(drvLnModExp_zone, ICP_M_NOWAIT); -+ if (NULL == pModExpOpData) { -+ APRINTK("%s():Failed to get memory for key gen data\n", -+ __FUNCTION__); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ pResult = icp_kmem_cache_zalloc(drvFlatBuffer_zone, ICP_M_NOWAIT); -+ if (NULL == pResult) { -+ APRINTK("%s():Failed to get memory for ModExp result\n", -+ __FUNCTION__); -+ ICP_CACHE_FREE(drvLnModExp_zone, pModExpOpData); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ /* Link parameters */ -+ pModExpOpData->modulus.pData = -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX].crp_p; -+ BITS_TO_BYTES(pModExpOpData->modulus.dataLenInBytes, -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(pModExpOpData->modulus.pData, -+ pModExpOpData->modulus.dataLenInBytes); -+ -+ DPRINTK("%s : base (%d)\n", __FUNCTION__, krp-> -+ krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].crp_nbits); -+ pModExpOpData->base.pData = -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].crp_p; -+ BITS_TO_BYTES(pModExpOpData->base.dataLenInBytes, -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX]. -+ crp_nbits); -+ icp_ocfDrvSwapBytes(pModExpOpData->base.pData, -+ pModExpOpData->base.dataLenInBytes); -+ -+ pModExpOpData->exponent.pData = -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_EXPONENT_INDEX].crp_p; -+ BITS_TO_BYTES(pModExpOpData->exponent.dataLenInBytes, -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_EXPONENT_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(pModExpOpData->exponent.pData, -+ pModExpOpData->exponent.dataLenInBytes); -+ /* Output parameters */ -+ pResult->pData = -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_RESULT_INDEX].crp_p, -+ BITS_TO_BYTES(pResult->dataLenInBytes, -+ krp->krp_param[ICP_MOD_EXP_KRP_PARAM_RESULT_INDEX]. -+ crp_nbits); -+ -+ lacStatus = cpaCyLnModExp(CPA_INSTANCE_HANDLE_SINGLE, -+ icp_ocfDrvModExpCallBack, -+ callbackTag, pModExpOpData, pResult); -+ -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): Mod Exp Operation failed (%d).\n", -+ __FUNCTION__, lacStatus); -+ krp->krp_status = ECANCELED; -+ icp_ocfDrvFreeFlatBuffer(pResult); -+ ICP_CACHE_FREE(drvLnModExp_zone, pModExpOpData); -+ } -+ -+ return lacStatus; -+} -+ -+/* Name : icp_ocfDrvModExpCRT -+ * -+ * Description : This function will map ordinary Modular Exponentiation Chinese -+ * Remainder Theorem implementaion calls from OCF to the LAC API. -+ * -+ * Note : Mod Exp CRT for this driver is accelerated through LAC RSA type 2 -+ * decrypt operation. Therefore P and Q input values must always be prime -+ * numbers. Although basic primality checks are done in LAC, it is up to the -+ * user to do any correct prime number checking before passing the inputs. -+ */ -+static int icp_ocfDrvModExpCRT(struct cryptkop *krp) -+{ -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ CpaCyRsaDecryptOpData *rsaDecryptOpData = NULL; -+ void *callbackTag = NULL; -+ CpaFlatBuffer *pOutputData = NULL; -+ -+ /*Parameter input checks are all done by LAC, no need to repeat -+ them here. */ -+ callbackTag = krp; -+ -+ rsaDecryptOpData = -+ icp_kmem_cache_zalloc(drvRSADecrypt_zone, ICP_M_NOWAIT); -+ if (NULL == rsaDecryptOpData) { -+ APRINTK("%s():Failed to get memory" -+ " for MOD EXP CRT Op data struct\n", __FUNCTION__); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ rsaDecryptOpData->pRecipientPrivateKey -+ = icp_kmem_cache_zalloc(drvRSAPrivateKey_zone, ICP_M_NOWAIT); -+ if (NULL == rsaDecryptOpData->pRecipientPrivateKey) { -+ APRINTK("%s():Failed to get memory for MOD EXP CRT" -+ " private key values struct\n", __FUNCTION__); -+ ICP_CACHE_FREE(drvRSADecrypt_zone, rsaDecryptOpData); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ version = CPA_CY_RSA_VERSION_TWO_PRIME; -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRepType = CPA_CY_RSA_PRIVATE_KEY_REP_TYPE_2; -+ -+ pOutputData = icp_kmem_cache_zalloc(drvFlatBuffer_zone, ICP_M_NOWAIT); -+ if (NULL == pOutputData) { -+ APRINTK("%s():Failed to get memory" -+ " for MOD EXP CRT output data\n", __FUNCTION__); -+ ICP_CACHE_FREE(drvRSAPrivateKey_zone, -+ rsaDecryptOpData->pRecipientPrivateKey); -+ ICP_CACHE_FREE(drvRSADecrypt_zone, rsaDecryptOpData); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ version = CPA_CY_RSA_VERSION_TWO_PRIME; -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRepType = CPA_CY_RSA_PRIVATE_KEY_REP_TYPE_2; -+ -+ /* Link parameters */ -+ rsaDecryptOpData->inputData.pData = -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_I_INDEX].crp_p; -+ BITS_TO_BYTES(rsaDecryptOpData->inputData.dataLenInBytes, -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_I_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(rsaDecryptOpData->inputData.pData, -+ rsaDecryptOpData->inputData.dataLenInBytes); -+ -+ rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2.prime1P.pData = -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_P_INDEX].crp_p; -+ BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2. -+ prime1P.dataLenInBytes, -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_P_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.prime1P.pData, -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.prime1P.dataLenInBytes); -+ -+ rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2.prime2Q.pData = -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_Q_INDEX].crp_p; -+ BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2. -+ prime2Q.dataLenInBytes, -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_Q_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.prime2Q.pData, -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.prime2Q.dataLenInBytes); -+ -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.exponent1Dp.pData = -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DP_INDEX].crp_p; -+ BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2. -+ exponent1Dp.dataLenInBytes, -+ krp-> -+ krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DP_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.exponent1Dp.pData, -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.exponent1Dp.dataLenInBytes); -+ -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.exponent2Dq.pData = -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DQ_INDEX].crp_p; -+ BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.exponent2Dq.dataLenInBytes, -+ krp-> -+ krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DQ_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.exponent2Dq.pData, -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.exponent2Dq.dataLenInBytes); -+ -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.coefficientQInv.pData = -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_COEFF_QINV_INDEX].crp_p; -+ BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.coefficientQInv.dataLenInBytes, -+ krp-> -+ krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_COEFF_QINV_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.coefficientQInv.pData, -+ rsaDecryptOpData->pRecipientPrivateKey-> -+ privateKeyRep2.coefficientQInv.dataLenInBytes); -+ -+ /* Output Parameter */ -+ pOutputData->pData = -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_RESULT_INDEX].crp_p; -+ BITS_TO_BYTES(pOutputData->dataLenInBytes, -+ krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_RESULT_INDEX]. -+ crp_nbits); -+ -+ lacStatus = cpaCyRsaDecrypt(CPA_INSTANCE_HANDLE_SINGLE, -+ icp_ocfDrvModExpCRTCallBack, -+ callbackTag, rsaDecryptOpData, pOutputData); -+ -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): Mod Exp CRT Operation failed (%d).\n", -+ __FUNCTION__, lacStatus); -+ krp->krp_status = ECANCELED; -+ icp_ocfDrvFreeFlatBuffer(pOutputData); -+ ICP_CACHE_FREE(drvRSAPrivateKey_zone, -+ rsaDecryptOpData->pRecipientPrivateKey); -+ ICP_CACHE_FREE(drvRSADecrypt_zone, rsaDecryptOpData); -+ } -+ -+ return lacStatus; -+} -+ -+/* Name : icp_ocfDrvCheckALessThanB -+ * -+ * Description : This function will check whether the first argument is less -+ * than the second. It is used to check whether the DSA RS sign Random K -+ * value is less than the Prime Q value (as defined in the specification) -+ * -+ */ -+static int -+icp_ocfDrvCheckALessThanB(CpaFlatBuffer * pK, CpaFlatBuffer * pQ, int *doCheck) -+{ -+ -+ uint8_t *MSB_K = pK->pData; -+ uint8_t *MSB_Q = pQ->pData; -+ uint32_t buffer_lengths_in_bytes = pQ->dataLenInBytes; -+ -+ if (DONT_RUN_LESS_THAN_CHECK == *doCheck) { -+ return FAIL_A_IS_GREATER_THAN_B; -+ } -+ -+/*Check MSBs -+if A == B, check next MSB -+if A > B, return A_IS_GREATER_THAN_B -+if A < B, return A_IS_LESS_THAN_B (success) -+*/ -+ while (*MSB_K == *MSB_Q) { -+ MSB_K++; -+ MSB_Q++; -+ -+ buffer_lengths_in_bytes--; -+ if (0 == buffer_lengths_in_bytes) { -+ DPRINTK("%s() Buffers have equal value!!\n", -+ __FUNCTION__); -+ return FAIL_A_IS_EQUAL_TO_B; -+ } -+ -+ } -+ -+ if (*MSB_K < *MSB_Q) { -+ return SUCCESS_A_IS_LESS_THAN_B; -+ } else { -+ return FAIL_A_IS_GREATER_THAN_B; -+ } -+ -+} -+ -+/* Name : icp_ocfDrvDsaSign -+ * -+ * Description : This function will map DSA RS Sign from OCF to the LAC API. -+ * -+ * NOTE: From looking at OCF patch to OpenSSL and even the number of input -+ * parameters, OCF expects us to generate the random seed value. This value -+ * is generated and passed to LAC, however the number is discared in the -+ * callback and not returned to the user. -+ */ -+static int icp_ocfDrvDsaSign(struct cryptkop *krp) -+{ -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ CpaCyDsaRSSignOpData *dsaRsSignOpData = NULL; -+ void *callbackTag = NULL; -+ CpaCyRandGenOpData randGenOpData; -+ int primeQSizeInBytes = 0; -+ int doCheck = 0; -+ CpaFlatBuffer randData; -+ CpaBoolean protocolStatus = CPA_FALSE; -+ CpaFlatBuffer *pR = NULL; -+ CpaFlatBuffer *pS = NULL; -+ -+ callbackTag = krp; -+ -+ BITS_TO_BYTES(primeQSizeInBytes, -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_Q_INDEX]. -+ crp_nbits); -+ -+ if (DSA_RS_SIGN_PRIMEQ_SIZE_IN_BYTES != primeQSizeInBytes) { -+ APRINTK("%s(): DSA PRIME Q size not equal to the " -+ "FIPS defined 20bytes, = %d\n", -+ __FUNCTION__, primeQSizeInBytes); -+ krp->krp_status = EDOM; -+ return EDOM; -+ } -+ -+ dsaRsSignOpData = -+ icp_kmem_cache_zalloc(drvDSARSSign_zone, ICP_M_NOWAIT); -+ if (NULL == dsaRsSignOpData) { -+ APRINTK("%s():Failed to get memory" -+ " for DSA RS Sign Op data struct\n", __FUNCTION__); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ dsaRsSignOpData->K.pData = -+ icp_kmem_cache_alloc(drvDSARSSignKValue_zone, ICP_M_NOWAIT); -+ -+ if (NULL == dsaRsSignOpData->K.pData) { -+ APRINTK("%s():Failed to get memory" -+ " for DSA RS Sign Op Random value\n", __FUNCTION__); -+ ICP_CACHE_FREE(drvDSARSSign_zone, dsaRsSignOpData); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ pR = icp_kmem_cache_zalloc(drvFlatBuffer_zone, ICP_M_NOWAIT); -+ if (NULL == pR) { -+ APRINTK("%s():Failed to get memory" -+ " for DSA signature R\n", __FUNCTION__); -+ ICP_CACHE_FREE(drvDSARSSignKValue_zone, -+ dsaRsSignOpData->K.pData); -+ ICP_CACHE_FREE(drvDSARSSign_zone, dsaRsSignOpData); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ pS = icp_kmem_cache_zalloc(drvFlatBuffer_zone, ICP_M_NOWAIT); -+ if (NULL == pS) { -+ APRINTK("%s():Failed to get memory" -+ " for DSA signature S\n", __FUNCTION__); -+ icp_ocfDrvFreeFlatBuffer(pR); -+ ICP_CACHE_FREE(drvDSARSSignKValue_zone, -+ dsaRsSignOpData->K.pData); -+ ICP_CACHE_FREE(drvDSARSSign_zone, dsaRsSignOpData); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ /*link prime number parameter for ease of processing */ -+ dsaRsSignOpData->P.pData = -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_P_INDEX].crp_p; -+ BITS_TO_BYTES(dsaRsSignOpData->P.dataLenInBytes, -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_P_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(dsaRsSignOpData->P.pData, -+ dsaRsSignOpData->P.dataLenInBytes); -+ -+ dsaRsSignOpData->Q.pData = -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_Q_INDEX].crp_p; -+ BITS_TO_BYTES(dsaRsSignOpData->Q.dataLenInBytes, -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_Q_INDEX]. -+ crp_nbits); -+ -+ icp_ocfDrvSwapBytes(dsaRsSignOpData->Q.pData, -+ dsaRsSignOpData->Q.dataLenInBytes); -+ -+ /*generate random number with equal buffer size to Prime value Q, -+ but value less than Q */ -+ dsaRsSignOpData->K.dataLenInBytes = dsaRsSignOpData->Q.dataLenInBytes; -+ -+ randGenOpData.generateBits = CPA_TRUE; -+ randGenOpData.lenInBytes = dsaRsSignOpData->K.dataLenInBytes; -+ -+ icp_ocfDrvPtrAndLenToFlatBuffer(dsaRsSignOpData->K.pData, -+ dsaRsSignOpData->K.dataLenInBytes, -+ &randData); -+ -+ doCheck = 0; -+ while (icp_ocfDrvCheckALessThanB(&(dsaRsSignOpData->K), -+ &(dsaRsSignOpData->Q), &doCheck)) { -+ -+ if (CPA_STATUS_SUCCESS -+ != cpaCyRandGen(CPA_INSTANCE_HANDLE_SINGLE, -+ NULL, NULL, &randGenOpData, &randData)) { -+ APRINTK("%s(): ERROR - Failed to generate DSA RS Sign K" -+ "value\n", __FUNCTION__); -+ icp_ocfDrvFreeFlatBuffer(pS); -+ icp_ocfDrvFreeFlatBuffer(pR); -+ ICP_CACHE_FREE(drvDSARSSignKValue_zone, -+ dsaRsSignOpData->K.pData); -+ ICP_CACHE_FREE(drvDSARSSign_zone, dsaRsSignOpData); -+ krp->krp_status = EAGAIN; -+ return EAGAIN; -+ } -+ -+ doCheck++; -+ if (DSA_SIGN_RAND_GEN_VAL_CHECK_MAX_ITERATIONS == doCheck) { -+ APRINTK("%s(): ERROR - Failed to find DSA RS Sign K " -+ "value less than Q value\n", __FUNCTION__); -+ icp_ocfDrvFreeFlatBuffer(pS); -+ icp_ocfDrvFreeFlatBuffer(pR); -+ ICP_CACHE_FREE(drvDSARSSignKValue_zone, -+ dsaRsSignOpData->K.pData); -+ ICP_CACHE_FREE(drvDSARSSign_zone, dsaRsSignOpData); -+ krp->krp_status = EAGAIN; -+ return EAGAIN; -+ } -+ -+ } -+ /*Rand Data - no need to swap bytes for pK */ -+ -+ /* Link parameters */ -+ dsaRsSignOpData->G.pData = -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_G_INDEX].crp_p; -+ BITS_TO_BYTES(dsaRsSignOpData->G.dataLenInBytes, -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_G_INDEX].crp_nbits); -+ -+ icp_ocfDrvSwapBytes(dsaRsSignOpData->G.pData, -+ dsaRsSignOpData->G.dataLenInBytes); -+ -+ dsaRsSignOpData->X.pData = -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_X_INDEX].crp_p; -+ BITS_TO_BYTES(dsaRsSignOpData->X.dataLenInBytes, -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_X_INDEX].crp_nbits); -+ icp_ocfDrvSwapBytes(dsaRsSignOpData->X.pData, -+ dsaRsSignOpData->X.dataLenInBytes); -+ -+ /*OpenSSL dgst parameter is left in big endian byte order, -+ therefore no byte swap is required */ -+ dsaRsSignOpData->M.pData = -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_DGST_INDEX].crp_p; -+ BITS_TO_BYTES(dsaRsSignOpData->M.dataLenInBytes, -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_DGST_INDEX]. -+ crp_nbits); -+ -+ /* Output Parameters */ -+ pS->pData = krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_S_RESULT_INDEX].crp_p; -+ BITS_TO_BYTES(pS->dataLenInBytes, -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_S_RESULT_INDEX]. -+ crp_nbits); -+ -+ pR->pData = krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_R_RESULT_INDEX].crp_p; -+ BITS_TO_BYTES(pR->dataLenInBytes, -+ krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_R_RESULT_INDEX]. -+ crp_nbits); -+ -+ lacStatus = cpaCyDsaSignRS(CPA_INSTANCE_HANDLE_SINGLE, -+ icp_ocfDrvDsaRSSignCallBack, -+ callbackTag, dsaRsSignOpData, -+ &protocolStatus, pR, pS); -+ -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): DSA RS Sign Operation failed (%d).\n", -+ __FUNCTION__, lacStatus); -+ krp->krp_status = ECANCELED; -+ icp_ocfDrvFreeFlatBuffer(pS); -+ icp_ocfDrvFreeFlatBuffer(pR); -+ ICP_CACHE_FREE(drvDSARSSignKValue_zone, -+ dsaRsSignOpData->K.pData); -+ ICP_CACHE_FREE(drvDSARSSign_zone, dsaRsSignOpData); -+ } -+ -+ return lacStatus; -+} -+ -+/* Name : icp_ocfDrvDsaVerify -+ * -+ * Description : This function will map DSA RS Verify from OCF to the LAC API. -+ * -+ */ -+static int icp_ocfDrvDsaVerify(struct cryptkop *krp) -+{ -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ CpaCyDsaVerifyOpData *dsaVerifyOpData = NULL; -+ void *callbackTag = NULL; -+ CpaBoolean verifyStatus = CPA_FALSE; -+ -+ callbackTag = krp; -+ -+ dsaVerifyOpData = -+ icp_kmem_cache_zalloc(drvDSAVerify_zone, ICP_M_NOWAIT); -+ if (NULL == dsaVerifyOpData) { -+ APRINTK("%s():Failed to get memory" -+ " for DSA Verify Op data struct\n", __FUNCTION__); -+ krp->krp_status = ENOMEM; -+ return ENOMEM; -+ } -+ -+ /* Link parameters */ -+ dsaVerifyOpData->P.pData = -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PRIME_P_INDEX].crp_p; -+ BITS_TO_BYTES(dsaVerifyOpData->P.dataLenInBytes, -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PRIME_P_INDEX]. -+ crp_nbits); -+ icp_ocfDrvSwapBytes(dsaVerifyOpData->P.pData, -+ dsaVerifyOpData->P.dataLenInBytes); -+ -+ dsaVerifyOpData->Q.pData = -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PRIME_Q_INDEX].crp_p; -+ BITS_TO_BYTES(dsaVerifyOpData->Q.dataLenInBytes, -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PRIME_Q_INDEX]. -+ crp_nbits); -+ icp_ocfDrvSwapBytes(dsaVerifyOpData->Q.pData, -+ dsaVerifyOpData->Q.dataLenInBytes); -+ -+ dsaVerifyOpData->G.pData = -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_G_INDEX].crp_p; -+ BITS_TO_BYTES(dsaVerifyOpData->G.dataLenInBytes, -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_G_INDEX]. -+ crp_nbits); -+ icp_ocfDrvSwapBytes(dsaVerifyOpData->G.pData, -+ dsaVerifyOpData->G.dataLenInBytes); -+ -+ dsaVerifyOpData->Y.pData = -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PUBKEY_INDEX].crp_p; -+ BITS_TO_BYTES(dsaVerifyOpData->Y.dataLenInBytes, -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PUBKEY_INDEX]. -+ crp_nbits); -+ icp_ocfDrvSwapBytes(dsaVerifyOpData->Y.pData, -+ dsaVerifyOpData->Y.dataLenInBytes); -+ -+ /*OpenSSL dgst parameter is left in big endian byte order, -+ therefore no byte swap is required */ -+ dsaVerifyOpData->M.pData = -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_DGST_INDEX].crp_p; -+ BITS_TO_BYTES(dsaVerifyOpData->M.dataLenInBytes, -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_DGST_INDEX]. -+ crp_nbits); -+ -+ dsaVerifyOpData->R.pData = -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_SIG_R_INDEX].crp_p; -+ BITS_TO_BYTES(dsaVerifyOpData->R.dataLenInBytes, -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_SIG_R_INDEX]. -+ crp_nbits); -+ icp_ocfDrvSwapBytes(dsaVerifyOpData->R.pData, -+ dsaVerifyOpData->R.dataLenInBytes); -+ -+ dsaVerifyOpData->S.pData = -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_SIG_S_INDEX].crp_p; -+ BITS_TO_BYTES(dsaVerifyOpData->S.dataLenInBytes, -+ krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_SIG_S_INDEX]. -+ crp_nbits); -+ icp_ocfDrvSwapBytes(dsaVerifyOpData->S.pData, -+ dsaVerifyOpData->S.dataLenInBytes); -+ -+ lacStatus = cpaCyDsaVerify(CPA_INSTANCE_HANDLE_SINGLE, -+ icp_ocfDrvDsaVerifyCallBack, -+ callbackTag, dsaVerifyOpData, &verifyStatus); -+ -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): DSA Verify Operation failed (%d).\n", -+ __FUNCTION__, lacStatus); -+ ICP_CACHE_FREE(drvDSAVerify_zone, dsaVerifyOpData); -+ krp->krp_status = ECANCELED; -+ } -+ -+ return lacStatus; -+} -+ -+/* Name : icp_ocfDrvDhP1Callback -+ * -+ * Description : When this function returns it signifies that the LAC -+ * component has completed the DH operation. -+ */ -+static void -+icp_ocfDrvDhP1CallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, CpaFlatBuffer * pLocalOctetStringPV) -+{ -+ struct cryptkop *krp = NULL; -+ CpaCyDhPhase1KeyGenOpData *pPhase1OpData = NULL; -+ -+ if (NULL == callbackTag) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "callbackTag data is NULL\n", __FUNCTION__); -+ return; -+ } -+ krp = (struct cryptkop *)callbackTag; -+ -+ if (NULL == pOpData) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "Operation Data is NULL\n", __FUNCTION__); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ pPhase1OpData = (CpaCyDhPhase1KeyGenOpData *) pOpData; -+ -+ if (NULL == pLocalOctetStringPV) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "pLocalOctetStringPV Data is NULL\n", __FUNCTION__); -+ memset(pPhase1OpData, 0, sizeof(CpaCyDhPhase1KeyGenOpData)); -+ ICP_CACHE_FREE(drvDH_zone, pPhase1OpData); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ -+ if (CPA_STATUS_SUCCESS == status) { -+ krp->krp_status = CRYPTO_OP_SUCCESS; -+ } else { -+ APRINTK("%s(): Diffie Hellman Phase1 Key Gen failed - " -+ "Operation Status = %d\n", __FUNCTION__, status); -+ krp->krp_status = ECANCELED; -+ } -+ -+ icp_ocfDrvSwapBytes(pLocalOctetStringPV->pData, -+ pLocalOctetStringPV->dataLenInBytes); -+ -+ icp_ocfDrvFreeFlatBuffer(pLocalOctetStringPV); -+ memset(pPhase1OpData, 0, sizeof(CpaCyDhPhase1KeyGenOpData)); -+ ICP_CACHE_FREE(drvDH_zone, pPhase1OpData); -+ -+ crypto_kdone(krp); -+ -+ return; -+} -+ -+/* Name : icp_ocfDrvModExpCallBack -+ * -+ * Description : When this function returns it signifies that the LAC -+ * component has completed the Mod Exp operation. -+ */ -+static void -+icp_ocfDrvModExpCallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpdata, CpaFlatBuffer * pResult) -+{ -+ struct cryptkop *krp = NULL; -+ CpaCyLnModExpOpData *pLnModExpOpData = NULL; -+ -+ if (NULL == callbackTag) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "callbackTag data is NULL\n", __FUNCTION__); -+ return; -+ } -+ krp = (struct cryptkop *)callbackTag; -+ -+ if (NULL == pOpdata) { -+ DPRINTK("%s(): Invalid Mod Exp input parameters - " -+ "Operation Data is NULL\n", __FUNCTION__); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ pLnModExpOpData = (CpaCyLnModExpOpData *) pOpdata; -+ -+ if (NULL == pResult) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "pResult data is NULL\n", __FUNCTION__); -+ krp->krp_status = ECANCELED; -+ memset(pLnModExpOpData, 0, sizeof(CpaCyLnModExpOpData)); -+ ICP_CACHE_FREE(drvLnModExp_zone, pLnModExpOpData); -+ crypto_kdone(krp); -+ return; -+ } -+ -+ if (CPA_STATUS_SUCCESS == status) { -+ krp->krp_status = CRYPTO_OP_SUCCESS; -+ } else { -+ APRINTK("%s(): LAC Mod Exp Operation failed - " -+ "Operation Status = %d\n", __FUNCTION__, status); -+ krp->krp_status = ECANCELED; -+ } -+ -+ icp_ocfDrvSwapBytes(pResult->pData, pResult->dataLenInBytes); -+ -+ /*switch base size value back to original */ -+ if (pLnModExpOpData->base.pData == -+ (uint8_t *) & (krp-> -+ krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX]. -+ crp_nbits)) { -+ *((uint32_t *) pLnModExpOpData->base.pData) = -+ ntohl(*((uint32_t *) pLnModExpOpData->base.pData)); -+ } -+ icp_ocfDrvFreeFlatBuffer(pResult); -+ memset(pLnModExpOpData, 0, sizeof(CpaCyLnModExpOpData)); -+ ICP_CACHE_FREE(drvLnModExp_zone, pLnModExpOpData); -+ -+ crypto_kdone(krp); -+ -+ return; -+ -+} -+ -+/* Name : icp_ocfDrvModExpCRTCallBack -+ * -+ * Description : When this function returns it signifies that the LAC -+ * component has completed the Mod Exp CRT operation. -+ */ -+static void -+icp_ocfDrvModExpCRTCallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, CpaFlatBuffer * pOutputData) -+{ -+ struct cryptkop *krp = NULL; -+ CpaCyRsaDecryptOpData *pDecryptData = NULL; -+ -+ if (NULL == callbackTag) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "callbackTag data is NULL\n", __FUNCTION__); -+ return; -+ } -+ -+ krp = (struct cryptkop *)callbackTag; -+ -+ if (NULL == pOpData) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "Operation Data is NULL\n", __FUNCTION__); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ pDecryptData = (CpaCyRsaDecryptOpData *) pOpData; -+ -+ if (NULL == pOutputData) { -+ DPRINTK("%s(): Invalid input parameter - " -+ "pOutputData is NULL\n", __FUNCTION__); -+ memset(pDecryptData->pRecipientPrivateKey, 0, -+ sizeof(CpaCyRsaPrivateKey)); -+ ICP_CACHE_FREE(drvRSAPrivateKey_zone, -+ pDecryptData->pRecipientPrivateKey); -+ memset(pDecryptData, 0, sizeof(CpaCyRsaDecryptOpData)); -+ ICP_CACHE_FREE(drvRSADecrypt_zone, pDecryptData); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ -+ if (CPA_STATUS_SUCCESS == status) { -+ krp->krp_status = CRYPTO_OP_SUCCESS; -+ } else { -+ APRINTK("%s(): LAC Mod Exp CRT operation failed - " -+ "Operation Status = %d\n", __FUNCTION__, status); -+ krp->krp_status = ECANCELED; -+ } -+ -+ icp_ocfDrvSwapBytes(pOutputData->pData, pOutputData->dataLenInBytes); -+ -+ icp_ocfDrvFreeFlatBuffer(pOutputData); -+ memset(pDecryptData->pRecipientPrivateKey, 0, -+ sizeof(CpaCyRsaPrivateKey)); -+ ICP_CACHE_FREE(drvRSAPrivateKey_zone, -+ pDecryptData->pRecipientPrivateKey); -+ memset(pDecryptData, 0, sizeof(CpaCyRsaDecryptOpData)); -+ ICP_CACHE_FREE(drvRSADecrypt_zone, pDecryptData); -+ -+ crypto_kdone(krp); -+ -+ return; -+} -+ -+/* Name : icp_ocfDrvDsaRSSignCallBack -+ * -+ * Description : When this function returns it signifies that the LAC -+ * component has completed the DSA RS sign operation. -+ */ -+static void -+icp_ocfDrvDsaRSSignCallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, -+ CpaBoolean protocolStatus, -+ CpaFlatBuffer * pR, CpaFlatBuffer * pS) -+{ -+ struct cryptkop *krp = NULL; -+ CpaCyDsaRSSignOpData *pSignData = NULL; -+ -+ if (NULL == callbackTag) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "callbackTag data is NULL\n", __FUNCTION__); -+ return; -+ } -+ -+ krp = (struct cryptkop *)callbackTag; -+ -+ if (NULL == pOpData) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "Operation Data is NULL\n", __FUNCTION__); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ pSignData = (CpaCyDsaRSSignOpData *) pOpData; -+ -+ if (NULL == pR) { -+ DPRINTK("%s(): Invalid input parameter - " -+ "pR sign is NULL\n", __FUNCTION__); -+ icp_ocfDrvFreeFlatBuffer(pS); -+ ICP_CACHE_FREE(drvDSARSSign_zone, pSignData); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ -+ if (NULL == pS) { -+ DPRINTK("%s(): Invalid input parameter - " -+ "pS sign is NULL\n", __FUNCTION__); -+ icp_ocfDrvFreeFlatBuffer(pR); -+ ICP_CACHE_FREE(drvDSARSSign_zone, pSignData); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ -+ if (CPA_STATUS_SUCCESS != status) { -+ APRINTK("%s(): LAC DSA RS Sign operation failed - " -+ "Operation Status = %d\n", __FUNCTION__, status); -+ krp->krp_status = ECANCELED; -+ } else { -+ krp->krp_status = CRYPTO_OP_SUCCESS; -+ -+ if (CPA_TRUE != protocolStatus) { -+ DPRINTK("%s(): LAC DSA RS Sign operation failed due " -+ "to protocol error\n", __FUNCTION__); -+ krp->krp_status = EIO; -+ } -+ } -+ -+ /* Swap bytes only when the callback status is successful and -+ protocolStatus is set to true */ -+ if (CPA_STATUS_SUCCESS == status && CPA_TRUE == protocolStatus) { -+ icp_ocfDrvSwapBytes(pR->pData, pR->dataLenInBytes); -+ icp_ocfDrvSwapBytes(pS->pData, pS->dataLenInBytes); -+ } -+ -+ icp_ocfDrvFreeFlatBuffer(pR); -+ icp_ocfDrvFreeFlatBuffer(pS); -+ memset(pSignData->K.pData, 0, pSignData->K.dataLenInBytes); -+ ICP_CACHE_FREE(drvDSARSSignKValue_zone, pSignData->K.pData); -+ memset(pSignData, 0, sizeof(CpaCyDsaRSSignOpData)); -+ ICP_CACHE_FREE(drvDSARSSign_zone, pSignData); -+ crypto_kdone(krp); -+ -+ return; -+} -+ -+/* Name : icp_ocfDrvDsaVerifyCallback -+ * -+ * Description : When this function returns it signifies that the LAC -+ * component has completed the DSA Verify operation. -+ */ -+static void -+icp_ocfDrvDsaVerifyCallBack(void *callbackTag, -+ CpaStatus status, -+ void *pOpData, CpaBoolean verifyStatus) -+{ -+ -+ struct cryptkop *krp = NULL; -+ CpaCyDsaVerifyOpData *pVerData = NULL; -+ -+ if (NULL == callbackTag) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "callbackTag data is NULL\n", __FUNCTION__); -+ return; -+ } -+ -+ krp = (struct cryptkop *)callbackTag; -+ -+ if (NULL == pOpData) { -+ DPRINTK("%s(): Invalid input parameters - " -+ "Operation Data is NULL\n", __FUNCTION__); -+ krp->krp_status = ECANCELED; -+ crypto_kdone(krp); -+ return; -+ } -+ pVerData = (CpaCyDsaVerifyOpData *) pOpData; -+ -+ if (CPA_STATUS_SUCCESS != status) { -+ APRINTK("%s(): LAC DSA Verify operation failed - " -+ "Operation Status = %d\n", __FUNCTION__, status); -+ krp->krp_status = ECANCELED; -+ } else { -+ krp->krp_status = CRYPTO_OP_SUCCESS; -+ -+ if (CPA_TRUE != verifyStatus) { -+ DPRINTK("%s(): DSA signature invalid\n", __FUNCTION__); -+ krp->krp_status = EIO; -+ } -+ } -+ -+ /* Swap bytes only when the callback status is successful and -+ verifyStatus is set to true */ -+ /*Just swapping back the key values for now. Possibly all -+ swapped buffers need to be reverted */ -+ if (CPA_STATUS_SUCCESS == status && CPA_TRUE == verifyStatus) { -+ icp_ocfDrvSwapBytes(pVerData->R.pData, -+ pVerData->R.dataLenInBytes); -+ icp_ocfDrvSwapBytes(pVerData->S.pData, -+ pVerData->S.dataLenInBytes); -+ } -+ -+ memset(pVerData, 0, sizeof(CpaCyDsaVerifyOpData)); -+ ICP_CACHE_FREE(drvDSAVerify_zone, pVerData); -+ crypto_kdone(krp); -+ -+ return; -+} -diff --git a/crypto/ocf/ep80579/icp_common.c b/crypto/ocf/ep80579/icp_common.c -new file mode 100644 -index 0000000..06a4cf2 ---- /dev/null -+++ b/crypto/ocf/ep80579/icp_common.c -@@ -0,0 +1,773 @@ -+/************************************************************************* -+ * -+ * This file is provided under a dual BSD/GPLv2 license. When using or -+ * redistributing this file, you may do so under either license. -+ * -+ * GPL LICENSE SUMMARY -+ * -+ * Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. -+ * The full GNU General Public License is included in this distribution -+ * in the file called LICENSE.GPL. -+ * -+ * Contact Information: -+ * Intel Corporation -+ * -+ * BSD LICENSE -+ * -+ * Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Intel Corporation nor the names of its -+ * contributors may be used to endorse or promote products derived -+ * from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * version: Security.L.1.0.2-229 -+ * -+ ***************************************************************************/ -+ -+/* -+ * An OCF module that uses Intel® QuickAssist Integrated Accelerator to do the -+ * crypto. -+ * -+ * This driver requires the ICP Access Library that is available from Intel in -+ * order to operate. -+ */ -+ -+#include "icp_ocf.h" -+ -+#define ICP_OCF_COMP_NAME "ICP_OCF" -+#define ICP_OCF_VER_MAIN (2) -+#define ICP_OCF_VER_MJR (1) -+#define ICP_OCF_VER_MNR (0) -+ -+#define MAX_DEREG_RETRIES (100) -+#define DEFAULT_DEREG_RETRIES (10) -+#define DEFAULT_DEREG_DELAY_IN_JIFFIES (10) -+ -+/* This defines the maximum number of sessions possible between OCF -+ and the OCF EP80579 Driver. If set to zero, there is no limit. */ -+#define DEFAULT_OCF_TO_DRV_MAX_SESSION_COUNT (0) -+#define NUM_SUPPORTED_CAPABILITIES (21) -+ -+/*Slab zone names*/ -+#define ICP_SESSION_DATA_NAME "icp_ocf.SesDat" -+#define ICP_OP_DATA_NAME "icp_ocf.OpDat" -+#define ICP_DH_NAME "icp_ocf.DH" -+#define ICP_MODEXP_NAME "icp_ocf.ModExp" -+#define ICP_RSA_DECRYPT_NAME "icp_ocf.RSAdec" -+#define ICP_RSA_PKEY_NAME "icp_ocf.RSApk" -+#define ICP_DSA_SIGN_NAME "icp_ocf.DSAsg" -+#define ICP_DSA_VER_NAME "icp_ocf.DSAver" -+#define ICP_RAND_VAL_NAME "icp_ocf.DSArnd" -+#define ICP_FLAT_BUFF_NAME "icp_ocf.FB" -+ -+/*Slabs zones*/ -+icp_kmem_cache drvSessionData_zone = NULL; -+icp_kmem_cache drvOpData_zone = NULL; -+icp_kmem_cache drvDH_zone = NULL; -+icp_kmem_cache drvLnModExp_zone = NULL; -+icp_kmem_cache drvRSADecrypt_zone = NULL; -+icp_kmem_cache drvRSAPrivateKey_zone = NULL; -+icp_kmem_cache drvDSARSSign_zone = NULL; -+icp_kmem_cache drvDSARSSignKValue_zone = NULL; -+icp_kmem_cache drvDSAVerify_zone = NULL; -+ -+/*Slab zones for flatbuffers and bufferlist*/ -+icp_kmem_cache drvFlatBuffer_zone = NULL; -+ -+static inline int icp_cache_null_check(void) -+{ -+ return (drvSessionData_zone && drvOpData_zone -+ && drvDH_zone && drvLnModExp_zone && drvRSADecrypt_zone -+ && drvRSAPrivateKey_zone && drvDSARSSign_zone -+ && drvDSARSSign_zone && drvDSARSSignKValue_zone -+ && drvDSAVerify_zone && drvFlatBuffer_zone); -+} -+ -+/*Function to free all allocated slab caches before exiting the module*/ -+static void icp_ocfDrvFreeCaches(void); -+ -+int32_t icp_ocfDrvDriverId = INVALID_DRIVER_ID; -+ -+/* Module parameter - gives the number of times LAC deregistration shall be -+ re-tried */ -+int num_dereg_retries = DEFAULT_DEREG_RETRIES; -+ -+/* Module parameter - gives the delay time in jiffies before a LAC session -+ shall be attempted to be deregistered again */ -+int dereg_retry_delay_in_jiffies = DEFAULT_DEREG_DELAY_IN_JIFFIES; -+ -+/* Module parameter - gives the maximum number of sessions possible between -+ OCF and the OCF EP80579 Driver. If set to zero, there is no limit.*/ -+int max_sessions = DEFAULT_OCF_TO_DRV_MAX_SESSION_COUNT; -+ -+/* This is set when the module is removed from the system, no further -+ processing can take place if this is set */ -+icp_atomic_t icp_ocfDrvIsExiting = ICP_ATOMIC_INIT(0); -+ -+/* This is used to show how many lac sessions were not deregistered*/ -+icp_atomic_t lac_session_failed_dereg_count = ICP_ATOMIC_INIT(0); -+ -+/* This is used to track the number of registered sessions between OCF and -+ * and the OCF EP80579 driver, when max_session is set to value other than -+ * zero. This ensures that the max_session set for the OCF and the driver -+ * is equal to the LAC registered sessions */ -+icp_atomic_t num_ocf_to_drv_registered_sessions = ICP_ATOMIC_INIT(0); -+ -+/* Head of linked list used to store session data */ -+icp_drvSessionListHead_t icp_ocfDrvGlobalSymListHead; -+icp_drvSessionListHead_t icp_ocfDrvGlobalSymListHead_FreeMemList; -+ -+icp_spinlock_t icp_ocfDrvSymSessInfoListSpinlock; -+ -+/*Below pointer is only used in linux, FreeBSD uses the name to -+create its own variable name*/ -+icp_workqueue *icp_ocfDrvFreeLacSessionWorkQ = NULL; -+ICP_WORKQUEUE_DEFINE_THREAD(icp_ocfDrvFreeLacSessionWorkQ); -+ -+struct icp_drvBuffListInfo defBuffListInfo; -+ -+/* Name : icp_ocfDrvInit -+ * -+ * Description : This function will register all the symmetric and asymmetric -+ * functionality that will be accelerated by the hardware. It will also -+ * get a unique driver ID from the OCF and initialise all slab caches -+ */ -+ICP_MODULE_INIT_FUNC(icp_ocfDrvInit) -+{ -+ int ocfStatus = 0; -+ -+ IPRINTK("=== %s ver %d.%d.%d ===\n", ICP_OCF_COMP_NAME, -+ ICP_OCF_VER_MAIN, ICP_OCF_VER_MJR, ICP_OCF_VER_MNR); -+ -+ if (MAX_DEREG_RETRIES < num_dereg_retries) { -+ EPRINTK("Session deregistration retry count set to greater " -+ "than %d", MAX_DEREG_RETRIES); -+ icp_module_return_code(EINVAL); -+ } -+ -+ /* Initialize and Start the Cryptographic component */ -+ if (CPA_STATUS_SUCCESS != -+ cpaCyStartInstance(CPA_INSTANCE_HANDLE_SINGLE)) { -+ EPRINTK("Failed to initialize and start the instance " -+ "of the Cryptographic component.\n"); -+ return icp_module_return_code(EINVAL); -+ } -+ -+ icp_spin_lock_init(&icp_ocfDrvSymSessInfoListSpinlock); -+ -+ /* Set the default size of BufferList to allocate */ -+ memset(&defBuffListInfo, 0, sizeof(struct icp_drvBuffListInfo)); -+ if (ICP_OCF_DRV_STATUS_SUCCESS != -+ icp_ocfDrvBufferListMemInfo(ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS, -+ &defBuffListInfo)) { -+ EPRINTK("Failed to get bufferlist memory info.\n"); -+ return icp_module_return_code(ENOMEM); -+ } -+ -+ /*Register OCF EP80579 Driver with OCF */ -+ icp_ocfDrvDriverId = ICP_CRYPTO_GET_DRIVERID(); -+ -+ if (icp_ocfDrvDriverId < 0) { -+ EPRINTK("%s : ICP driver failed to register with OCF!\n", -+ __FUNCTION__); -+ return icp_module_return_code(ENODEV); -+ } -+ -+ /*Create all the slab caches used by the OCF EP80579 Driver */ -+ drvSessionData_zone = -+ ICP_CACHE_CREATE(ICP_SESSION_DATA_NAME, struct icp_drvSessionData); -+ -+ /* -+ * Allocation of the OpData includes the allocation space for meta data. -+ * The memory after the opData structure is reserved for this meta data. -+ */ -+ drvOpData_zone = -+ icp_kmem_cache_create(ICP_OP_DATA_NAME, -+ sizeof(struct icp_drvOpData) + -+ defBuffListInfo.metaSize, -+ ICP_KERNEL_CACHE_ALIGN, -+ ICP_KERNEL_CACHE_NOINIT); -+ -+ drvDH_zone = ICP_CACHE_CREATE(ICP_DH_NAME, CpaCyDhPhase1KeyGenOpData); -+ -+ drvLnModExp_zone = -+ ICP_CACHE_CREATE(ICP_MODEXP_NAME, CpaCyLnModExpOpData); -+ -+ drvRSADecrypt_zone = -+ ICP_CACHE_CREATE(ICP_RSA_DECRYPT_NAME, CpaCyRsaDecryptOpData); -+ -+ drvRSAPrivateKey_zone = -+ ICP_CACHE_CREATE(ICP_RSA_PKEY_NAME, CpaCyRsaPrivateKey); -+ -+ drvDSARSSign_zone = -+ ICP_CACHE_CREATE(ICP_DSA_SIGN_NAME, CpaCyDsaRSSignOpData); -+ -+ /*too awkward to use a macro here */ -+ drvDSARSSignKValue_zone = -+ ICP_CACHE_CREATE(ICP_RAND_VAL_NAME, -+ DSA_RS_SIGN_PRIMEQ_SIZE_IN_BYTES); -+ -+ drvDSAVerify_zone = -+ ICP_CACHE_CREATE(ICP_DSA_VER_NAME, CpaCyDsaVerifyOpData); -+ -+ drvFlatBuffer_zone = -+ ICP_CACHE_CREATE(ICP_FLAT_BUFF_NAME, CpaFlatBuffer); -+ -+ if (0 == icp_cache_null_check()) { -+ icp_ocfDrvFreeCaches(); -+ EPRINTK("%s() line %d: Not enough memory!\n", -+ __FUNCTION__, __LINE__); -+ return ENOMEM; -+ } -+ -+ /* Register the ICP symmetric crypto support. */ -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_NULL_CBC, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_DES_CBC, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_3DES_CBC, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_AES_CBC, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_ARC4, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_MD5, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_MD5_HMAC, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_SHA1, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_SHA1_HMAC, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_SHA2_256, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_SHA2_256_HMAC, -+ ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_SHA2_384, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_SHA2_384_HMAC, -+ ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_SHA2_512, ocfStatus); -+ ICP_REG_SYM_WITH_OCF(icp_ocfDrvDriverId, CRYPTO_SHA2_512_HMAC, -+ ocfStatus); -+ -+ /* Register the ICP asymmetric algorithm support */ -+ ICP_REG_ASYM_WITH_OCF(icp_ocfDrvDriverId, CRK_DH_COMPUTE_KEY, -+ ocfStatus); -+ ICP_REG_ASYM_WITH_OCF(icp_ocfDrvDriverId, CRK_MOD_EXP, ocfStatus); -+ ICP_REG_ASYM_WITH_OCF(icp_ocfDrvDriverId, CRK_MOD_EXP_CRT, ocfStatus); -+ ICP_REG_ASYM_WITH_OCF(icp_ocfDrvDriverId, CRK_DSA_SIGN, ocfStatus); -+ ICP_REG_ASYM_WITH_OCF(icp_ocfDrvDriverId, CRK_DSA_VERIFY, ocfStatus); -+ -+ /* Register the ICP random number generator support */ -+ ICP_REG_RAND_WITH_OCF(icp_ocfDrvDriverId, -+ icp_ocfDrvReadRandom, NULL, ocfStatus); -+ -+ if (OCF_ZERO_FUNCTIONALITY_REGISTERED == ocfStatus) { -+ DPRINTK("%s: Failed to register any device capabilities\n", -+ __FUNCTION__); -+ icp_ocfDrvFreeCaches(); -+ icp_ocfDrvDriverId = INVALID_DRIVER_ID; -+ return icp_module_return_code(ECANCELED); -+ } -+ -+ DPRINTK("%s: Registered %d of %d device capabilities\n", -+ __FUNCTION__, ocfStatus, NUM_SUPPORTED_CAPABILITIES); -+ -+ /*Session data linked list used during module exit */ -+ ICP_INIT_LIST_HEAD(&icp_ocfDrvGlobalSymListHead); -+ ICP_INIT_LIST_HEAD(&icp_ocfDrvGlobalSymListHead_FreeMemList); -+ -+ ICP_WORKQUEUE_CREATE(icp_ocfDrvFreeLacSessionWorkQ, "icpwq"); -+ if (ICP_WORKQUEUE_NULL_CHECK(icp_ocfDrvFreeLacSessionWorkQ)) { -+ EPRINTK("%s: Failed to create single " -+ "thread workqueue\n", __FUNCTION__); -+ icp_ocfDrvFreeCaches(); -+ icp_ocfDrvDriverId = INVALID_DRIVER_ID; -+ return icp_module_return_code(ENOMEM); -+ } -+ -+ return icp_module_return_code(0); -+} -+ -+/* Name : icp_ocfDrvExit -+ * -+ * Description : This function will deregister all the symmetric sessions -+ * registered with the LAC component. It will also deregister all symmetric -+ * and asymmetric functionality that can be accelerated by the hardware via OCF -+ * and random number generation if it is enabled. -+ */ -+ICP_MODULE_EXIT_FUNC(icp_ocfDrvExit) -+{ -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ struct icp_drvSessionData *sessionData = NULL; -+ struct icp_drvSessionData *tempSessionData = NULL; -+ int i, remaining_delay_time_in_jiffies = 0; -+ -+ /* For FreeBSD the invariant macro below makes function to return */ -+ /* with EBUSY value in the case of any session which has been regi- */ -+ /* stered with LAC not being deregistered. */ -+ /* The Linux implementation is empty since it is purely to compensate */ -+ /* for a limitation of the FreeBSD 7.1 Opencrypto framework. */ -+ -+ ICP_MODULE_EXIT_INV(); -+ -+ /* There is a possibility of a process or new session command being */ -+ /* sent before this variable is incremented. The aim of this variable */ -+ /* is to stop a loop of calls creating a deadlock situation which */ -+ /* would prevent the driver from exiting. */ -+ icp_atomic_set(&icp_ocfDrvIsExiting, 1); -+ -+ /*Existing sessions will be routed to another driver after these calls */ -+ crypto_unregister_all(icp_ocfDrvDriverId); -+ crypto_runregister_all(icp_ocfDrvDriverId); -+ -+ if (ICP_WORKQUEUE_NULL_CHECK(icp_ocfDrvFreeLacSessionWorkQ)) { -+ DPRINTK("%s: workqueue already " -+ "destroyed, therefore module exit " -+ " function already called. Exiting.\n", __FUNCTION__); -+ return ICP_MODULE_EXIT_FUNC_RETURN_VAL; -+ } -+ /*If any sessions are waiting to be deregistered, do that. This also -+ flushes the work queue */ -+ ICP_WORKQUEUE_DESTROY(icp_ocfDrvFreeLacSessionWorkQ); -+ -+ /*ENTER CRITICAL SECTION */ -+ icp_spin_lockbh_lock(&icp_ocfDrvSymSessInfoListSpinlock); -+ -+ ICP_LIST_FOR_EACH_ENTRY_SAFE(tempSessionData, sessionData, -+ &icp_ocfDrvGlobalSymListHead, listNode) { -+ for (i = 0; i < num_dereg_retries; i++) { -+ /*No harm if bad input - LAC will handle error cases */ -+ if (ICP_SESSION_RUNNING == tempSessionData->inUse) { -+ lacStatus = -+ cpaCySymRemoveSession -+ (CPA_INSTANCE_HANDLE_SINGLE, -+ tempSessionData->sessHandle); -+ if (CPA_STATUS_SUCCESS == lacStatus) { -+ /* Succesfully deregistered */ -+ break; -+ } else if (CPA_STATUS_RETRY != lacStatus) { -+ icp_atomic_inc -+ (&lac_session_failed_dereg_count); -+ break; -+ } -+ -+ /*schedule_timout returns the time left for completion if -+ * this task is set to TASK_INTERRUPTIBLE */ -+ remaining_delay_time_in_jiffies = -+ dereg_retry_delay_in_jiffies; -+ while (0 > remaining_delay_time_in_jiffies) { -+ remaining_delay_time_in_jiffies = -+ icp_schedule_timeout -+ (&icp_ocfDrvSymSessInfoListSpinlock, -+ remaining_delay_time_in_jiffies); -+ } -+ -+ DPRINTK -+ ("%s(): Retry %d to deregistrate the session\n", -+ __FUNCTION__, i); -+ } -+ } -+ -+ /*remove from current list */ -+ ICP_LIST_DEL(tempSessionData, listNode); -+ /*add to free mem linked list */ -+ ICP_LIST_ADD(tempSessionData, -+ &icp_ocfDrvGlobalSymListHead_FreeMemList, -+ listNode); -+ -+ } -+ -+ /*EXIT CRITICAL SECTION */ -+ icp_spin_lockbh_unlock(&icp_ocfDrvSymSessInfoListSpinlock); -+ -+ /*set back to initial values */ -+ sessionData = NULL; -+ /*still have a reference in our list! */ -+ tempSessionData = NULL; -+ /*free memory */ -+ -+ ICP_LIST_FOR_EACH_ENTRY_SAFE(tempSessionData, sessionData, -+ &icp_ocfDrvGlobalSymListHead_FreeMemList, -+ listNode) { -+ -+ ICP_LIST_DEL(tempSessionData, listNode); -+ /* Free allocated CpaCySymSessionCtx */ -+ if (NULL != tempSessionData->sessHandle) { -+ icp_kfree(tempSessionData->sessHandle); -+ } -+ memset(tempSessionData, 0, sizeof(struct icp_drvSessionData)); -+ ICP_CACHE_FREE(drvSessionData_zone, tempSessionData); -+ } -+ -+ if (0 != icp_atomic_read(&lac_session_failed_dereg_count)) { -+ DPRINTK("%s(): %d LAC sessions were not deregistered " -+ "correctly. This is not a clean exit! \n", -+ __FUNCTION__, -+ icp_atomic_read(&lac_session_failed_dereg_count)); -+ } -+ -+ icp_ocfDrvFreeCaches(); -+ icp_ocfDrvDriverId = INVALID_DRIVER_ID; -+ -+ icp_spin_lock_destroy(&icp_ocfDrvSymSessInfoListSpinlock); -+ -+ /* Shutdown the Cryptographic component */ -+ lacStatus = cpaCyStopInstance(CPA_INSTANCE_HANDLE_SINGLE); -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ DPRINTK("%s(): Failed to stop instance of the " -+ "Cryptographic component.(status == %d)\n", -+ __FUNCTION__, lacStatus); -+ } -+ -+ return ICP_MODULE_EXIT_FUNC_RETURN_VAL; -+} -+ -+/* Name : icp_ocfDrvFreeCaches -+ * -+ * Description : This function deregisters all slab caches -+ */ -+static void icp_ocfDrvFreeCaches(void) -+{ -+ icp_atomic_set(&icp_ocfDrvIsExiting, 1); -+ -+ /*Sym Zones */ -+ ICP_CACHE_DESTROY(drvSessionData_zone); -+ ICP_CACHE_DESTROY(drvOpData_zone); -+ -+ /*Asym zones */ -+ ICP_CACHE_DESTROY(drvDH_zone); -+ ICP_CACHE_DESTROY(drvLnModExp_zone); -+ ICP_CACHE_DESTROY(drvRSADecrypt_zone); -+ ICP_CACHE_DESTROY(drvRSAPrivateKey_zone); -+ ICP_CACHE_DESTROY(drvDSARSSignKValue_zone); -+ ICP_CACHE_DESTROY(drvDSARSSign_zone); -+ ICP_CACHE_DESTROY(drvDSAVerify_zone); -+ -+ /*FlatBuffer and BufferList Zones */ -+ ICP_CACHE_DESTROY(drvFlatBuffer_zone); -+ -+} -+ -+/* Name : icp_ocfDrvDeregRetry -+ * -+ * Description : This function will try to farm the session deregistration -+ * off to a work queue. If it fails, nothing more can be done and it -+ * returns an error -+ */ -+int icp_ocfDrvDeregRetry(CpaCySymSessionCtx sessionToDeregister) -+{ -+ struct icp_ocfDrvFreeLacSession *workstore = NULL; -+ -+ DPRINTK("%s(): Retry - Deregistering session (%p)\n", -+ __FUNCTION__, sessionToDeregister); -+ -+ /*make sure the session is not available to be allocated during this -+ process */ -+ icp_atomic_inc(&lac_session_failed_dereg_count); -+ -+ /*Farm off to work queue */ -+ workstore = -+ icp_kmalloc(sizeof(struct icp_ocfDrvFreeLacSession), ICP_M_NOWAIT); -+ if (NULL == workstore) { -+ DPRINTK("%s(): unable to free session - no memory available " -+ "for work queue\n", __FUNCTION__); -+ return ENOMEM; -+ } -+ -+ workstore->sessionToDeregister = sessionToDeregister; -+ -+ icp_init_work(&(workstore->work), -+ icp_ocfDrvDeferedFreeLacSessionTaskFn, workstore); -+ -+ ICP_WORKQUEUE_ENQUEUE(icp_ocfDrvFreeLacSessionWorkQ, -+ &(workstore->work)); -+ -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+ -+} -+ -+/* Name : icp_ocfDrvDeferedFreeLacSessionProcess -+ * -+ * Description : This function will retry (module input parameter) -+ * 'num_dereg_retries' times to deregister any symmetric session that recieves a -+ * CPA_STATUS_RETRY message from the LAC component. This function is run in -+ * Thread context because it is called from a worker thread -+ */ -+void icp_ocfDrvDeferedFreeLacSessionProcess(void *arg) -+{ -+ struct icp_ocfDrvFreeLacSession *workstore = NULL; -+ CpaCySymSessionCtx sessionToDeregister = NULL; -+ int i = 0; -+ int remaining_delay_time_in_jiffies = 0; -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ -+ workstore = (struct icp_ocfDrvFreeLacSession *)arg; -+ if (NULL == workstore) { -+ DPRINTK("%s() function called with null parameter \n", -+ __FUNCTION__); -+ return; -+ } -+ -+ sessionToDeregister = workstore->sessionToDeregister; -+ icp_kfree(workstore); -+ -+ /*if exiting, give deregistration one more blast only */ -+ if (icp_atomic_read(&icp_ocfDrvIsExiting) == CPA_TRUE) { -+ lacStatus = cpaCySymRemoveSession(CPA_INSTANCE_HANDLE_SINGLE, -+ sessionToDeregister); -+ -+ if (lacStatus != CPA_STATUS_SUCCESS) { -+ DPRINTK("%s() Failed to Dereg LAC session %p " -+ "during module exit\n", __FUNCTION__, -+ sessionToDeregister); -+ return; -+ } -+ -+ icp_atomic_dec(&lac_session_failed_dereg_count); -+ return; -+ } -+ -+ for (i = 0; i <= num_dereg_retries; i++) { -+ lacStatus = cpaCySymRemoveSession(CPA_INSTANCE_HANDLE_SINGLE, -+ sessionToDeregister); -+ -+ if (lacStatus == CPA_STATUS_SUCCESS) { -+ icp_atomic_dec(&lac_session_failed_dereg_count); -+ return; -+ } -+ if (lacStatus != CPA_STATUS_RETRY) { -+ DPRINTK("%s() Failed to deregister session - lacStatus " -+ " = %d", __FUNCTION__, lacStatus); -+ break; -+ } -+ -+ /*schedule_timout returns the time left for completion if this -+ task is set to TASK_INTERRUPTIBLE */ -+ remaining_delay_time_in_jiffies = dereg_retry_delay_in_jiffies; -+ while (0 < remaining_delay_time_in_jiffies) { -+ remaining_delay_time_in_jiffies = -+ icp_schedule_timeout(NULL, -+ remaining_delay_time_in_jiffies); -+ } -+ -+ } -+ -+ DPRINTK("%s(): Unable to deregister session\n", __FUNCTION__); -+ DPRINTK("%s(): Number of unavailable LAC sessions = %d\n", __FUNCTION__, -+ icp_atomic_read(&lac_session_failed_dereg_count)); -+} -+ -+/* Name : icp_ocfDrvPtrAndLenToFlatBuffer -+ * -+ * Description : This function converts a "pointer and length" buffer -+ * structure to Fredericksburg Flat Buffer (CpaFlatBuffer) format. -+ * -+ * This function assumes that the data passed in are valid. -+ */ -+inline void -+icp_ocfDrvPtrAndLenToFlatBuffer(void *pData, uint32_t len, -+ CpaFlatBuffer * pFlatBuffer) -+{ -+ pFlatBuffer->pData = pData; -+ pFlatBuffer->dataLenInBytes = len; -+} -+ -+/* Name : icp_ocfDrvPtrAndLenToBufferList -+ * -+ * Description : This function converts a "pointer and length" buffer -+ * structure to Fredericksburg Scatter/Gather Buffer (CpaBufferList) format. -+ * -+ * This function assumes that the data passed in are valid. -+ */ -+inline void -+icp_ocfDrvPtrAndLenToBufferList(void *pDataIn, uint32_t length, -+ CpaBufferList * pBufferList) -+{ -+ pBufferList->numBuffers = 1; -+ pBufferList->pBuffers->pData = pDataIn; -+ pBufferList->pBuffers->dataLenInBytes = length; -+} -+ -+/* Name : icp_ocfDrvBufferListToPtrAndLen -+ * -+ * Description : This function converts Fredericksburg Scatter/Gather Buffer -+ * (CpaBufferList) format to a "pointer and length" buffer structure. -+ * -+ * This function assumes that the data passed in are valid. -+ */ -+inline void -+icp_ocfDrvBufferListToPtrAndLen(CpaBufferList * pBufferList, -+ void **ppDataOut, uint32_t * pLength) -+{ -+ *ppDataOut = pBufferList->pBuffers->pData; -+ *pLength = pBufferList->pBuffers->dataLenInBytes; -+} -+ -+/* Name : icp_ocfDrvBufferListMemInfo -+ * -+ * Description : This function will set the number of flat buffers in -+ * bufferlist, the size of memory to allocate for the pPrivateMetaData -+ * member of the CpaBufferList. -+ */ -+int -+icp_ocfDrvBufferListMemInfo(uint16_t numBuffers, -+ struct icp_drvBuffListInfo *buffListInfo) -+{ -+ buffListInfo->numBuffers = numBuffers; -+ -+ if (CPA_STATUS_SUCCESS != -+ cpaCyBufferListGetMetaSize(CPA_INSTANCE_HANDLE_SINGLE, -+ buffListInfo->numBuffers, -+ &(buffListInfo->metaSize))) { -+ EPRINTK("%s() Failed to get buffer list meta size.\n", -+ __FUNCTION__); -+ return ICP_OCF_DRV_STATUS_FAIL; -+ } -+ -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+} -+ -+/* Name : icp_ocfDrvFreeFlatBuffer -+ * -+ * Description : This function will deallocate flat buffer. -+ */ -+inline void icp_ocfDrvFreeFlatBuffer(CpaFlatBuffer * pFlatBuffer) -+{ -+ if (pFlatBuffer != NULL) { -+ memset(pFlatBuffer, 0, sizeof(CpaFlatBuffer)); -+ ICP_CACHE_FREE(drvFlatBuffer_zone, pFlatBuffer); -+ } -+} -+ -+/* Name : icp_ocfDrvAllocMetaData -+ * -+ * Description : This function will allocate memory for the -+ * pPrivateMetaData member of CpaBufferList. -+ */ -+inline int -+icp_ocfDrvAllocMetaData(CpaBufferList * pBufferList, -+ struct icp_drvOpData *pOpData) -+{ -+ Cpa32U metaSize = 0; -+ -+ if (pBufferList->numBuffers <= ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS) { -+ uint8_t *pOpDataStartAddr = (uint8_t *) pOpData; -+ -+ if (0 == defBuffListInfo.metaSize) { -+ pBufferList->pPrivateMetaData = NULL; -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+ } -+ /* -+ * The meta data allocation has been included as part of the -+ * op data. It has been pre-allocated in memory just after the -+ * icp_drvOpData structure. -+ */ -+ pBufferList->pPrivateMetaData = (void *)(pOpDataStartAddr + -+ sizeof(struct -+ icp_drvOpData)); -+ } else { -+ if (CPA_STATUS_SUCCESS != -+ cpaCyBufferListGetMetaSize(CPA_INSTANCE_HANDLE_SINGLE, -+ pBufferList->numBuffers, -+ &metaSize)) { -+ EPRINTK("%s() Failed to get buffer list meta size.\n", -+ __FUNCTION__); -+ return ICP_OCF_DRV_STATUS_FAIL; -+ } -+ -+ if (0 == metaSize) { -+ pBufferList->pPrivateMetaData = NULL; -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+ } -+ -+ pBufferList->pPrivateMetaData = -+ icp_kmalloc(metaSize, ICP_M_NOWAIT); -+ } -+ if (NULL == pBufferList->pPrivateMetaData) { -+ EPRINTK("%s() Failed to allocate pPrivateMetaData.\n", -+ __FUNCTION__); -+ return ICP_OCF_DRV_STATUS_FAIL; -+ } -+ -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+} -+ -+/* Name : icp_ocfDrvFreeMetaData -+ * -+ * Description : This function will deallocate pPrivateMetaData memory. -+ */ -+inline void icp_ocfDrvFreeMetaData(CpaBufferList * pBufferList) -+{ -+ if (NULL == pBufferList->pPrivateMetaData) { -+ return; -+ } -+ -+ /* -+ * Only free the meta data if the BufferList has more than -+ * ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS number of buffers. -+ * Otherwise, the meta data shall be freed when the icp_drvOpData is -+ * freed. -+ */ -+ if (ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS < pBufferList->numBuffers) { -+ icp_kfree(pBufferList->pPrivateMetaData); -+ } -+} -+ -+/* Module declaration, init and exit functions */ -+ICP_DECLARE_MODULE(icp_ocf, icp_ocfDrvInit, icp_ocfDrvExit); -+ICP_MODULE_DESCRIPTION("OCF Driver for Intel Quick Assist crypto acceleration"); -+ICP_MODULE_VERSION(icp_ocf, ICP_OCF_VER_MJR); -+ICP_MODULE_LICENSE("Dual BSD/GPL"); -+ICP_MODULE_AUTHOR("Intel"); -+ -+/* Module parameters */ -+ICP_MODULE_PARAM_INT(icp_ocf, num_dereg_retries, -+ "Number of times to retry LAC Sym Session Deregistration. " -+ "Default 10, Max 100"); -+ICP_MODULE_PARAM_INT(icp_ocf, dereg_retry_delay_in_jiffies, "Delay in jiffies " -+ "(added to a schedule() function call) before a LAC Sym " -+ "Session Dereg is retried. Default 10"); -+ICP_MODULE_PARAM_INT(icp_ocf, max_sessions, -+ "This sets the maximum number of sessions " -+ "between OCF and this driver. If this value is set to zero," -+ "max session count checking is disabled. Default is zero(0)"); -+ -+/* Module dependencies */ -+#define MODULE_MIN_VER 1 -+#define CRYPTO_MAX_VER 3 -+#define LAC_MAX_VER 2 -+ -+ICP_MODULE_DEPEND(icp_ocf, crypto, MODULE_MIN_VER, MODULE_MIN_VER, -+ CRYPTO_MAX_VER); -+ICP_MODULE_DEPEND(icp_ocf, cryptodev, MODULE_MIN_VER, MODULE_MIN_VER, -+ CRYPTO_MAX_VER); -+ICP_MODULE_DEPEND(icp_ocf, icp_crypto, MODULE_MIN_VER, MODULE_MIN_VER, -+ LAC_MAX_VER); -diff --git a/crypto/ocf/ep80579/icp_ocf.h b/crypto/ocf/ep80579/icp_ocf.h -new file mode 100644 -index 0000000..854b306 ---- /dev/null -+++ b/crypto/ocf/ep80579/icp_ocf.h -@@ -0,0 +1,376 @@ -+/*************************************************************************** -+ * -+ * This file is provided under a dual BSD/GPLv2 license. When using or -+ * redistributing this file, you may do so under either license. -+ * -+ * GPL LICENSE SUMMARY -+ * -+ * Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. -+ * The full GNU General Public License is included in this distribution -+ * in the file called LICENSE.GPL. -+ * -+ * Contact Information: -+ * Intel Corporation -+ * -+ * BSD LICENSE -+ * -+ * Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Intel Corporation nor the names of its -+ * contributors may be used to endorse or promote products derived -+ * from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * version: Security.L.1.0.2-229 -+ * -+ ***************************************************************************/ -+ -+/* -+ * OCF driver header file for the Intel ICP processor. -+ */ -+ -+#ifndef ICP_OCF_H_ -+#define ICP_OCF_H_ -+ -+#include <cpa.h> -+#include <cpa_cy_im.h> -+#include <cpa_cy_sym.h> -+#include <cpa_cy_rand.h> -+#include <cpa_cy_dh.h> -+#include <cpa_cy_rsa.h> -+#include <cpa_cy_ln.h> -+#include <cpa_cy_common.h> -+#include <cpa_cy_dsa.h> -+ -+#include "icp_os.h" -+ -+#define NUM_BITS_IN_BYTE (8) -+#define NUM_BITS_IN_BYTE_MINUS_ONE (NUM_BITS_IN_BYTE -1) -+#define INVALID_DRIVER_ID (-1) -+#define RETURN_RAND_NUM_GEN_FAILED (-1) -+ -+/*This is the max block cipher initialisation vector*/ -+#define MAX_IV_LEN_IN_BYTES (20) -+/*This is used to check whether the OCF to this driver session limit has -+ been disabled*/ -+#define NO_OCF_TO_DRV_MAX_SESSIONS (0) -+ -+/*OCF values mapped here*/ -+#define ICP_SHA1_DIGEST_SIZE_IN_BYTES (SHA1_HASH_LEN) -+#define ICP_SHA256_DIGEST_SIZE_IN_BYTES (SHA2_256_HASH_LEN) -+#define ICP_SHA384_DIGEST_SIZE_IN_BYTES (SHA2_384_HASH_LEN) -+#define ICP_SHA512_DIGEST_SIZE_IN_BYTES (SHA2_512_HASH_LEN) -+#define ICP_MD5_DIGEST_SIZE_IN_BYTES (MD5_HASH_LEN) -+#define ARC4_COUNTER_LEN (ARC4_BLOCK_LEN) -+ -+#define OCF_REGISTRATION_STATUS_SUCCESS (0) -+#define OCF_ZERO_FUNCTIONALITY_REGISTERED (0) -+#define ICP_OCF_DRV_NO_CRYPTO_PROCESS_ERROR (0) -+#define ICP_OCF_DRV_STATUS_SUCCESS (0) -+#define ICP_OCF_DRV_STATUS_FAIL (1) -+ -+/*Turn on/off debug options*/ -+#define ICP_OCF_PRINT_DEBUG_MESSAGES (0) -+#define ICP_OCF_PRINT_KERN_ALERT (1) -+#define ICP_OCF_PRINT_KERN_ERRS (1) -+ -+#if ICP_OCF_PRINT_DEBUG_MESSAGES == 1 -+#define DPRINTK(args...) \ -+{ \ -+ ICP_IPRINTK(args); \ -+} -+ -+#else //ICP_OCF_PRINT_DEBUG_MESSAGES == 1 -+ -+#define DPRINTK(args...) -+ -+#endif //ICP_OCF_PRINT_DEBUG_MESSAGES == 1 -+ -+#if ICP_OCF_PRINT_KERN_ALERT == 1 -+#define APRINTK(args...) \ -+{ \ -+ ICP_APRINTK(args); \ -+} -+ -+#else //ICP_OCF_PRINT_KERN_ALERT == 1 -+ -+#define APRINTK(args...) -+ -+#endif //ICP_OCF_PRINT_KERN_ALERT == 1 -+ -+#if ICP_OCF_PRINT_KERN_ERRS == 1 -+#define EPRINTK(args...) \ -+{ \ -+ ICP_EPRINTK(args); \ -+} -+ -+#else //ICP_OCF_PRINT_KERN_ERRS == 1 -+ -+#define EPRINTK(args...) -+ -+#endif //ICP_OCF_PRINT_KERN_ERRS == 1 -+ -+#define IPRINTK(args...) \ -+{ \ -+ ICP_IPRINTK(args); \ -+} -+ -+/*DSA Prime Q size in bytes (as defined in the standard) */ -+#define DSA_RS_SIGN_PRIMEQ_SIZE_IN_BYTES (20) -+ -+#define BITS_TO_BYTES(bytes, bits) \ -+ bytes = (bits + NUM_BITS_IN_BYTE_MINUS_ONE) / NUM_BITS_IN_BYTE -+ -+typedef enum { -+ ICP_OCF_DRV_ALG_CIPHER = 0, -+ ICP_OCF_DRV_ALG_HASH -+} icp_ocf_drv_alg_type_t; -+ -+typedef ICP_LIST_HEAD(icp_drvSessionListHead_s, -+ icp_drvSessionData) icp_drvSessionListHead_t; -+ -+/*Values used to derisk chances of performs being called against -+deregistered sessions (for which the slab page has been reclaimed) -+This is not a fix - since page frames are reclaimed from a slab, one cannot -+rely on that memory not being re-used by another app.*/ -+typedef enum { -+ ICP_SESSION_INITIALISED = 0x5C5C5C, -+ ICP_SESSION_RUNNING = 0x005C00, -+ ICP_SESSION_DEREGISTERED = 0xC5C5C5 -+} usage_derisk; -+ -+/* This struct is required for deferred session -+ deregistration as a work queue function can -+ only have one argument*/ -+struct icp_ocfDrvFreeLacSession { -+ CpaCySymSessionCtx sessionToDeregister; -+ icp_workstruct work; -+}; -+ -+/* -+This is the OCF<->OCF_DRV session object: -+ -+1.listNode -+ The first member is a listNode. These session objects are added to a linked -+ list in order to make it easier to remove them all at session exit time. -+ -+2.inUse -+ The second member is used to give the session object state and derisk the -+ possibility of OCF batch calls executing against a deregistered session (as -+ described above). -+ -+3.sessHandle -+ The third member is a LAC<->OCF_DRV session handle (initialised with the first -+ perform request for that session). -+ -+4.lacSessCtx -+ The fourth is the LAC session context. All the parameters for this structure -+ are only known when the first perform request for this session occurs. That is -+ why the OCF EP80579 Driver only registers a new LAC session at perform time -+*/ -+struct icp_drvSessionData { -+ ICP_LIST_ENTRY(icp_drvSessionData) listNode; -+ usage_derisk inUse; -+ CpaCySymSessionCtx sessHandle; -+ CpaCySymSessionSetupData lacSessCtx; -+}; -+ -+/* These are all defined in icp_common.c */ -+extern icp_atomic_t lac_session_failed_dereg_count; -+extern icp_atomic_t icp_ocfDrvIsExiting; -+extern icp_atomic_t num_ocf_to_drv_registered_sessions; -+ -+extern int32_t icp_ocfDrvDriverId; -+ -+extern icp_drvSessionListHead_t icp_ocfDrvGlobalSymListHead; -+extern icp_drvSessionListHead_t icp_ocfDrvGlobalSymListHead_FreeMemList; -+extern icp_workqueue *icp_ocfDrvFreeLacSessionWorkQ; -+extern icp_spinlock_t icp_ocfDrvSymSessInfoListSpinlock; -+ -+/*Slab zones for symettric functionality, instantiated in icp_common.c*/ -+extern icp_kmem_cache drvSessionData_zone; -+extern icp_kmem_cache drvOpData_zone; -+ -+/*Slabs zones for asymettric functionality, instantiated in icp_common.c*/ -+extern icp_kmem_cache drvDH_zone; -+extern icp_kmem_cache drvLnModExp_zone; -+extern icp_kmem_cache drvRSADecrypt_zone; -+extern icp_kmem_cache drvRSAPrivateKey_zone; -+extern icp_kmem_cache drvDSARSSign_zone; -+extern icp_kmem_cache drvDSARSSignKValue_zone; -+extern icp_kmem_cache drvDSAVerify_zone; -+ -+/* Module parameters defined in icp_cpmmon.c*/ -+ -+/* Module parameters - gives the number of times LAC deregistration shall be -+ re-tried */ -+extern int num_dereg_retries; -+ -+/* Module parameter - gives the delay time in jiffies before a LAC session -+ shall be attempted to be deregistered again */ -+extern int dereg_retry_delay_in_jiffies; -+ -+/* Module parameter - gives the maximum number of sessions possible between -+ OCF and the OCF EP80579 Driver. If set to zero, there is no limit.*/ -+extern int max_sessions; -+ -+/*Slab zones for flatbuffers and bufferlist*/ -+extern icp_kmem_cache drvFlatBuffer_zone; -+ -+#define ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS (16) -+ -+struct icp_drvBuffListInfo { -+ Cpa16U numBuffers; -+ Cpa32U metaSize; -+ Cpa32U metaOffset; -+ Cpa32U buffListSize; -+}; -+ -+extern struct icp_drvBuffListInfo defBuffListInfo; -+ -+/* This struct is used to keep a reference to the relevant node in the list -+ of sessionData structs, to the buffer type required by OCF and to the OCF -+ provided crp struct that needs to be returned. All this info is needed in -+ the callback function.*/ -+struct icp_drvOpData { -+ CpaCySymOpData lacOpData; -+ uint32_t digestSizeInBytes; -+ struct cryptop *crp; -+ uint8_t bufferType; -+ uint8_t ivData[MAX_IV_LEN_IN_BYTES]; -+ uint16_t numBufferListArray; -+ CpaBufferList srcBuffer; -+ CpaFlatBuffer bufferListArray[ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS]; -+ CpaBoolean verifyResult; -+}; -+ -+/* Create a new session between OCF and this driver*/ -+int icp_ocfDrvNewSession(icp_device_t dev, uint32_t * sild, -+ struct cryptoini *cri); -+ -+/* Free a session between this driver and the Quick Assist Framework*/ -+int icp_ocfDrvFreeLACSession(icp_device_t dev, uint64_t sid); -+ -+/* Defer freeing a Quick Assist session*/ -+void icp_ocfDrvDeferedFreeLacSessionProcess(void *arg); -+ -+/* Process OCF cryptographic request for a symmetric algorithm*/ -+int icp_ocfDrvSymProcess(icp_device_t dev, struct cryptop *crp, int hint); -+ -+/* Process OCF cryptographic request for an asymmetric algorithm*/ -+int icp_ocfDrvPkeProcess(icp_device_t dev, struct cryptkop *krp, int hint); -+ -+/* Populate a buffer with random data*/ -+int icp_ocfDrvReadRandom(void *arg, uint32_t * buf, int maxwords); -+ -+/* Retry Quick Assist session deregistration*/ -+int icp_ocfDrvDeregRetry(CpaCySymSessionCtx sessionToDeregister); -+ -+/* Convert an OS scatter gather list to a CPA buffer list*/ -+int icp_ocfDrvPacketBuffToBufferList(icp_packet_buffer_t * pPacketBuffer, -+ CpaBufferList * bufferList); -+ -+/* Convert a CPA buffer list to an OS scatter gather list*/ -+int icp_ocfDrvBufferListToPacketBuff(CpaBufferList * bufferList, -+ icp_packet_buffer_t ** pPacketBuffer); -+ -+/* Get the number of buffers in an OS scatter gather list*/ -+uint16_t icp_ocfDrvGetPacketBuffFrags(icp_packet_buffer_t * pPacketBuffer); -+ -+/* Convert a single OS buffer to a CPA Flat Buffer*/ -+void icp_ocfDrvSinglePacketBuffToFlatBuffer(icp_packet_buffer_t * pPacketBuffer, -+ CpaFlatBuffer * pFlatBuffer); -+ -+/* Add pointer and length to a CPA Flat Buffer structure*/ -+void icp_ocfDrvPtrAndLenToFlatBuffer(void *pData, uint32_t len, -+ CpaFlatBuffer * pFlatBuffer); -+ -+/* Convert pointer and length values to a CPA buffer list*/ -+void icp_ocfDrvPtrAndLenToBufferList(void *pDataIn, uint32_t length, -+ CpaBufferList * pBufferList); -+ -+/* Convert a CPA buffer list to pointer and length values*/ -+void icp_ocfDrvBufferListToPtrAndLen(CpaBufferList * pBufferList, -+ void **ppDataOut, uint32_t * pLength); -+ -+/* Set the number of flat buffers in bufferlist and the size of memory -+ to allocate for the pPrivateMetaData member of the CpaBufferList.*/ -+int icp_ocfDrvBufferListMemInfo(uint16_t numBuffers, -+ struct icp_drvBuffListInfo *buffListInfo); -+ -+/* Find pointer position of the digest within an OS scatter gather list*/ -+uint8_t *icp_ocfDrvPacketBufferDigestPointerFind(struct icp_drvOpData -+ *drvOpData, -+ int offsetInBytes, -+ uint32_t digestSizeInBytes); -+ -+/*This top level function is used to find a pointer to where a digest is -+ stored/needs to be inserted. */ -+uint8_t *icp_ocfDrvDigestPointerFind(struct icp_drvOpData *drvOpData, -+ struct cryptodesc *crp_desc); -+ -+/* Free a CPA flat buffer*/ -+void icp_ocfDrvFreeFlatBuffer(CpaFlatBuffer * pFlatBuffer); -+ -+/* This function will allocate memory for the pPrivateMetaData -+ member of CpaBufferList. */ -+int icp_ocfDrvAllocMetaData(CpaBufferList * pBufferList, -+ struct icp_drvOpData *pOpData); -+ -+/* Free data allocated for the pPrivateMetaData -+ member of CpaBufferList.*/ -+void icp_ocfDrvFreeMetaData(CpaBufferList * pBufferList); -+ -+#define ICP_CACHE_CREATE(cache_ID, cache_name) \ -+ icp_kmem_cache_create(cache_ID, sizeof(cache_name),ICP_KERNEL_CACHE_ALIGN,\ -+ ICP_KERNEL_CACHE_NOINIT) -+ -+#define ICP_CACHE_FREE(args...) \ -+ icp_kmem_cache_free (args) -+ -+#define ICP_CACHE_DESTROY(slab_zone)\ -+{\ -+ if(NULL != slab_zone){\ -+ icp_kmem_cache_destroy(slab_zone);\ -+ slab_zone = NULL;\ -+ }\ -+} -+ -+#endif -+/* ICP_OCF_H_ */ -diff --git a/crypto/ocf/ep80579/icp_sym.c b/crypto/ocf/ep80579/icp_sym.c -new file mode 100644 -index 0000000..a3edc43 ---- /dev/null -+++ b/crypto/ocf/ep80579/icp_sym.c -@@ -0,0 +1,1153 @@ -+/*************************************************************************** -+ * -+ * This file is provided under a dual BSD/GPLv2 license. When using or -+ * redistributing this file, you may do so under either license. -+ * -+ * GPL LICENSE SUMMARY -+ * -+ * Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. -+ * The full GNU General Public License is included in this distribution -+ * in the file called LICENSE.GPL. -+ * -+ * Contact Information: -+ * Intel Corporation -+ * -+ * BSD LICENSE -+ * -+ * Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in -+ * the documentation and/or other materials provided with the -+ * distribution. -+ * * Neither the name of Intel Corporation nor the names of its -+ * contributors may be used to endorse or promote products derived -+ * from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * version: Security.L.1.0.2-229 -+ * -+ ***************************************************************************/ -+/* -+ * An OCF module that uses the API for Intel® QuickAssist Technology to do the -+ * cryptography. -+ * -+ * This driver requires the ICP Access Library that is available from Intel in -+ * order to operate. -+ */ -+ -+#include "icp_ocf.h" -+ -+/*This is the call back function for all symmetric cryptographic processes. -+ Its main functionality is to free driver crypto operation structure and to -+ call back to OCF*/ -+static void -+icp_ocfDrvSymCallBack(void *callbackTag, -+ CpaStatus status, -+ const CpaCySymOp operationType, -+ void *pOpData, -+ CpaBufferList * pDstBuffer, CpaBoolean verifyResult); -+ -+/*This function is used to extract crypto processing information from the OCF -+ inputs, so as that it may be passed onto LAC*/ -+static int -+icp_ocfDrvProcessDataSetup(struct icp_drvOpData *drvOpData, -+ struct cryptodesc *crp_desc); -+ -+/*This function checks whether the crp_desc argument pertains to a digest or a -+ cipher operation*/ -+static int icp_ocfDrvAlgCheck(struct cryptodesc *crp_desc); -+ -+/*This function copies all the passed in session context information and stores -+ it in a LAC context structure*/ -+static int -+icp_ocfDrvAlgorithmSetup(struct cryptoini *cri, -+ CpaCySymSessionSetupData * lacSessCtx); -+ -+/*This function is used to free an OCF->OCF_DRV session object*/ -+static void icp_ocfDrvFreeOCFSession(struct icp_drvSessionData *sessionData); -+ -+/*max IOV buffs supported in a UIO structure*/ -+#define NUM_IOV_SUPPORTED (1) -+ -+/* Name : icp_ocfDrvSymCallBack -+ * -+ * Description : When this function returns it signifies that the LAC -+ * component has completed the relevant symmetric operation. -+ * -+ * Notes : The callbackTag is a pointer to an icp_drvOpData. This memory -+ * object was passed to LAC for the cryptographic processing and contains all -+ * the relevant information for cleaning up buffer handles etc. so that the -+ * OCF EP80579 Driver portion of this crypto operation can be fully completed. -+ */ -+static void -+icp_ocfDrvSymCallBack(void *callbackTag, -+ CpaStatus status, -+ const CpaCySymOp operationType, -+ void *pOpData, -+ CpaBufferList * pDstBuffer, CpaBoolean verifyResult) -+{ -+ struct cryptop *crp = NULL; -+ struct icp_drvOpData *temp_drvOpData = -+ (struct icp_drvOpData *)callbackTag; -+ uint64_t *tempBasePtr = NULL; -+ uint32_t tempLen = 0; -+ -+ if (NULL == temp_drvOpData) { -+ DPRINTK("%s(): The callback from the LAC component" -+ " has failed due to Null userOpaque data" -+ "(status == %d).\n", __FUNCTION__, status); -+ DPRINTK("%s(): Unable to call OCF back! \n", __FUNCTION__); -+ return; -+ } -+ -+ crp = temp_drvOpData->crp; -+ crp->crp_etype = ICP_OCF_DRV_NO_CRYPTO_PROCESS_ERROR; -+ -+ if (NULL == pOpData) { -+ DPRINTK("%s(): The callback from the LAC component" -+ " has failed due to Null Symmetric Op data" -+ "(status == %d).\n", __FUNCTION__, status); -+ crp->crp_etype = ECANCELED; -+ crypto_done(crp); -+ return; -+ } -+ -+ if (NULL == pDstBuffer) { -+ DPRINTK("%s(): The callback from the LAC component" -+ " has failed due to Null Dst Bufferlist data" -+ "(status == %d).\n", __FUNCTION__, status); -+ crp->crp_etype = ECANCELED; -+ crypto_done(crp); -+ return; -+ } -+ -+ if (CPA_STATUS_SUCCESS == status) { -+ -+ if (temp_drvOpData->bufferType == ICP_CRYPTO_F_PACKET_BUF) { -+ if (ICP_OCF_DRV_STATUS_SUCCESS != -+ icp_ocfDrvBufferListToPacketBuff(pDstBuffer, -+ (icp_packet_buffer_t -+ **) -+ & (crp->crp_buf))) { -+ EPRINTK("%s(): BufferList to SkBuff " -+ "conversion error.\n", __FUNCTION__); -+ crp->crp_etype = EPERM; -+ } -+ } else { -+ icp_ocfDrvBufferListToPtrAndLen(pDstBuffer, -+ (void **)&tempBasePtr, -+ &tempLen); -+ crp->crp_olen = (int)tempLen; -+ } -+ -+ } else { -+ DPRINTK("%s(): The callback from the LAC component has failed" -+ "(status == %d).\n", __FUNCTION__, status); -+ -+ crp->crp_etype = ECANCELED; -+ } -+ -+ if (temp_drvOpData->numBufferListArray > -+ ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS) { -+ icp_kfree(pDstBuffer->pBuffers); -+ } -+ icp_ocfDrvFreeMetaData(pDstBuffer); -+ ICP_CACHE_FREE(drvOpData_zone, temp_drvOpData); -+ -+ /* Invoke the OCF callback function */ -+ crypto_done(crp); -+ -+ return; -+} -+ -+/* Name : icp_ocfDrvNewSession -+ * -+ * Description : This function will create a new Driver<->OCF session -+ * -+ * Notes : LAC session registration happens during the first perform call. -+ * That is the first time we know all information about a given session. -+ */ -+int icp_ocfDrvNewSession(icp_device_t dev, uint32_t * sid, -+ struct cryptoini *cri) -+{ -+ struct icp_drvSessionData *sessionData = NULL; -+ uint32_t delete_session = 0; -+ -+ /* The SID passed in should be our driver ID. We can return the */ -+ /* local ID (LID) which is a unique identifier which we can use */ -+ /* to differentiate between the encrypt/decrypt LAC session handles */ -+ if (NULL == sid) { -+ EPRINTK("%s(): Invalid input parameters - NULL sid.\n", -+ __FUNCTION__); -+ return EINVAL; -+ } -+ -+ if (NULL == cri) { -+ EPRINTK("%s(): Invalid input parameters - NULL cryptoini.\n", -+ __FUNCTION__); -+ return EINVAL; -+ } -+ -+ if (icp_ocfDrvDriverId != *sid) { -+ EPRINTK("%s(): Invalid input parameters - bad driver ID\n", -+ __FUNCTION__); -+ EPRINTK("\t sid = 0x08%p \n \t cri = 0x08%p \n", sid, cri); -+ return EINVAL; -+ } -+ -+ sessionData = icp_kmem_cache_zalloc(drvSessionData_zone, ICP_M_NOWAIT); -+ if (NULL == sessionData) { -+ DPRINTK("%s():No memory for Session Data\n", __FUNCTION__); -+ return ENOMEM; -+ } -+ -+ /*ENTER CRITICAL SECTION */ -+ icp_spin_lockbh_lock(&icp_ocfDrvSymSessInfoListSpinlock); -+ /*put this check in the spinlock so no new sessions can be added to the -+ linked list when we are exiting */ -+ if (CPA_TRUE == icp_atomic_read(&icp_ocfDrvIsExiting)) { -+ delete_session++; -+ -+ } else if (NO_OCF_TO_DRV_MAX_SESSIONS != max_sessions) { -+ if (icp_atomic_read(&num_ocf_to_drv_registered_sessions) >= -+ (max_sessions - -+ icp_atomic_read(&lac_session_failed_dereg_count))) { -+ delete_session++; -+ } else { -+ icp_atomic_inc(&num_ocf_to_drv_registered_sessions); -+ /* Add to session data linked list */ -+ ICP_LIST_ADD(sessionData, &icp_ocfDrvGlobalSymListHead, -+ listNode); -+ } -+ -+ } else if (NO_OCF_TO_DRV_MAX_SESSIONS == max_sessions) { -+ ICP_LIST_ADD(sessionData, &icp_ocfDrvGlobalSymListHead, -+ listNode); -+ } -+ -+ sessionData->inUse = ICP_SESSION_INITIALISED; -+ -+ /*EXIT CRITICAL SECTION */ -+ icp_spin_lockbh_unlock(&icp_ocfDrvSymSessInfoListSpinlock); -+ -+ if (delete_session) { -+ DPRINTK("%s():No Session handles available\n", __FUNCTION__); -+ ICP_CACHE_FREE(drvSessionData_zone, sessionData); -+ return EPERM; -+ } -+ -+ if (ICP_OCF_DRV_STATUS_SUCCESS != -+ icp_ocfDrvAlgorithmSetup(cri, &(sessionData->lacSessCtx))) { -+ DPRINTK("%s():algorithm not supported\n", __FUNCTION__); -+ icp_ocfDrvFreeOCFSession(sessionData); -+ return EINVAL; -+ } -+ -+ if (cri->cri_next) { -+ if (cri->cri_next->cri_next != NULL) { -+ DPRINTK("%s():only two chained algorithms supported\n", -+ __FUNCTION__); -+ icp_ocfDrvFreeOCFSession(sessionData); -+ return EPERM; -+ } -+ -+ if (ICP_OCF_DRV_STATUS_SUCCESS != -+ icp_ocfDrvAlgorithmSetup(cri->cri_next, -+ &(sessionData->lacSessCtx))) { -+ DPRINTK("%s():second algorithm not supported\n", -+ __FUNCTION__); -+ icp_ocfDrvFreeOCFSession(sessionData); -+ return EINVAL; -+ } -+ -+ sessionData->lacSessCtx.symOperation = -+ CPA_CY_SYM_OP_ALGORITHM_CHAINING; -+ } -+ -+ *sid = (uint32_t) sessionData; -+ -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+} -+ -+/* Name : icp_ocfDrvAlgorithmSetup -+ * -+ * Description : This function builds the session context data from the -+ * information supplied through OCF. Algorithm chain order and whether the -+ * session is Encrypt/Decrypt can only be found out at perform time however, so -+ * the session is registered with LAC at that time. -+ */ -+static int -+icp_ocfDrvAlgorithmSetup(struct cryptoini *cri, -+ CpaCySymSessionSetupData * lacSessCtx) -+{ -+ -+ lacSessCtx->sessionPriority = CPA_CY_PRIORITY_NORMAL; -+ -+ switch (cri->cri_alg) { -+ -+ case CRYPTO_NULL_CBC: -+ DPRINTK("%s(): NULL CBC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER; -+ lacSessCtx->cipherSetupData.cipherAlgorithm = -+ CPA_CY_SYM_CIPHER_NULL; -+ lacSessCtx->cipherSetupData.cipherKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key; -+ break; -+ -+ case CRYPTO_DES_CBC: -+ DPRINTK("%s(): DES CBC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER; -+ lacSessCtx->cipherSetupData.cipherAlgorithm = -+ CPA_CY_SYM_CIPHER_DES_CBC; -+ lacSessCtx->cipherSetupData.cipherKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key; -+ break; -+ -+ case CRYPTO_3DES_CBC: -+ DPRINTK("%s(): 3DES CBC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER; -+ lacSessCtx->cipherSetupData.cipherAlgorithm = -+ CPA_CY_SYM_CIPHER_3DES_CBC; -+ lacSessCtx->cipherSetupData.cipherKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key; -+ break; -+ -+ case CRYPTO_AES_CBC: -+ DPRINTK("%s(): AES CBC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER; -+ lacSessCtx->cipherSetupData.cipherAlgorithm = -+ CPA_CY_SYM_CIPHER_AES_CBC; -+ lacSessCtx->cipherSetupData.cipherKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key; -+ break; -+ -+ case CRYPTO_ARC4: -+ DPRINTK("%s(): ARC4\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER; -+ lacSessCtx->cipherSetupData.cipherAlgorithm = -+ CPA_CY_SYM_CIPHER_ARC4; -+ lacSessCtx->cipherSetupData.cipherKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key; -+ break; -+ -+ case CRYPTO_SHA1: -+ DPRINTK("%s(): SHA1\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA1; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_SHA1_DIGEST_SIZE_IN_BYTES); -+ -+ break; -+ -+ case CRYPTO_SHA1_HMAC: -+ DPRINTK("%s(): SHA1_HMAC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA1; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_SHA1_DIGEST_SIZE_IN_BYTES); -+ lacSessCtx->hashSetupData.authModeSetupData.authKey = -+ cri->cri_key; -+ lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0; -+ -+ break; -+ -+ case CRYPTO_SHA2_256: -+ DPRINTK("%s(): SHA256\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = -+ CPA_CY_SYM_HASH_SHA256; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_SHA256_DIGEST_SIZE_IN_BYTES); -+ -+ break; -+ -+ case CRYPTO_SHA2_256_HMAC: -+ DPRINTK("%s(): SHA256_HMAC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = -+ CPA_CY_SYM_HASH_SHA256; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_SHA256_DIGEST_SIZE_IN_BYTES); -+ lacSessCtx->hashSetupData.authModeSetupData.authKey = -+ cri->cri_key; -+ lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0; -+ -+ break; -+ -+ case CRYPTO_SHA2_384: -+ DPRINTK("%s(): SHA384\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = -+ CPA_CY_SYM_HASH_SHA384; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_SHA384_DIGEST_SIZE_IN_BYTES); -+ -+ break; -+ -+ case CRYPTO_SHA2_384_HMAC: -+ DPRINTK("%s(): SHA384_HMAC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = -+ CPA_CY_SYM_HASH_SHA384; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_SHA384_DIGEST_SIZE_IN_BYTES); -+ lacSessCtx->hashSetupData.authModeSetupData.authKey = -+ cri->cri_key; -+ lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0; -+ -+ break; -+ -+ case CRYPTO_SHA2_512: -+ DPRINTK("%s(): SHA512\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = -+ CPA_CY_SYM_HASH_SHA512; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_SHA512_DIGEST_SIZE_IN_BYTES); -+ -+ break; -+ -+ case CRYPTO_SHA2_512_HMAC: -+ DPRINTK("%s(): SHA512_HMAC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = -+ CPA_CY_SYM_HASH_SHA512; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_SHA512_DIGEST_SIZE_IN_BYTES); -+ lacSessCtx->hashSetupData.authModeSetupData.authKey = -+ cri->cri_key; -+ lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0; -+ -+ break; -+ -+ case CRYPTO_MD5: -+ DPRINTK("%s(): MD5\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_MD5; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_MD5_DIGEST_SIZE_IN_BYTES); -+ -+ break; -+ -+ case CRYPTO_MD5_HMAC: -+ DPRINTK("%s(): MD5_HMAC\n", __FUNCTION__); -+ lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH; -+ lacSessCtx->hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_MD5; -+ lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH; -+ lacSessCtx->hashSetupData.digestResultLenInBytes = -+ (cri->cri_mlen ? -+ cri->cri_mlen : ICP_MD5_DIGEST_SIZE_IN_BYTES); -+ lacSessCtx->hashSetupData.authModeSetupData.authKey = -+ cri->cri_key; -+ lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes = -+ cri->cri_klen / NUM_BITS_IN_BYTE; -+ lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0; -+ -+ break; -+ -+ default: -+ DPRINTK("%s(): ALG Setup FAIL\n", __FUNCTION__); -+ return ICP_OCF_DRV_STATUS_FAIL; -+ } -+ -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+} -+ -+/* Name : icp_ocfDrvFreeOCFSession -+ * -+ * Description : This function deletes all existing Session data representing -+ * the Cryptographic session established between OCF and this driver. This -+ * also includes freeing the memory allocated for the session context. The -+ * session object is also removed from the session linked list. -+ */ -+static void icp_ocfDrvFreeOCFSession(struct icp_drvSessionData *sessionData) -+{ -+ -+ sessionData->inUse = ICP_SESSION_DEREGISTERED; -+ -+ /*ENTER CRITICAL SECTION */ -+ icp_spin_lockbh_lock(&icp_ocfDrvSymSessInfoListSpinlock); -+ -+ if (CPA_TRUE == icp_atomic_read(&icp_ocfDrvIsExiting)) { -+ /*If the Driver is exiting, allow that process to -+ handle any deletions */ -+ /*EXIT CRITICAL SECTION */ -+ icp_spin_lockbh_unlock(&icp_ocfDrvSymSessInfoListSpinlock); -+ return; -+ } -+ -+ icp_atomic_dec(&num_ocf_to_drv_registered_sessions); -+ -+ ICP_LIST_DEL(sessionData, listNode); -+ -+ /*EXIT CRITICAL SECTION */ -+ icp_spin_lockbh_unlock(&icp_ocfDrvSymSessInfoListSpinlock); -+ -+ if (NULL != sessionData->sessHandle) { -+ icp_kfree(sessionData->sessHandle); -+ } -+ ICP_CACHE_FREE(drvSessionData_zone, sessionData); -+} -+ -+/* Name : icp_ocfDrvFreeLACSession -+ * -+ * Description : This attempts to deregister a LAC session. If it fails, the -+ * deregistation retry function is called. -+ */ -+int icp_ocfDrvFreeLACSession(icp_device_t dev, uint64_t sid) -+{ -+ CpaCySymSessionCtx sessionToDeregister = NULL; -+ struct icp_drvSessionData *sessionData = NULL; -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ int retval = 0; -+ -+ sessionData = (struct icp_drvSessionData *)CRYPTO_SESID2LID(sid); -+ if (NULL == sessionData) { -+ EPRINTK("%s(): OCF Free session called with Null Session ID.\n", -+ __FUNCTION__); -+ return EINVAL; -+ } -+ -+ sessionToDeregister = sessionData->sessHandle; -+ -+ if ((ICP_SESSION_INITIALISED != sessionData->inUse) && -+ (ICP_SESSION_RUNNING != sessionData->inUse) && -+ (ICP_SESSION_DEREGISTERED != sessionData->inUse)) { -+ DPRINTK("%s() Session not initialised.\n", __FUNCTION__); -+ return EINVAL; -+ } -+ -+ if (ICP_SESSION_RUNNING == sessionData->inUse) { -+ lacStatus = cpaCySymRemoveSession(CPA_INSTANCE_HANDLE_SINGLE, -+ sessionToDeregister); -+ if (CPA_STATUS_RETRY == lacStatus) { -+ if (ICP_OCF_DRV_STATUS_SUCCESS != -+ icp_ocfDrvDeregRetry(&sessionToDeregister)) { -+ /* the retry function increments the -+ dereg failed count */ -+ DPRINTK("%s(): LAC failed to deregister the " -+ "session. (localSessionId= %p)\n", -+ __FUNCTION__, sessionToDeregister); -+ retval = EPERM; -+ } -+ -+ } else if (CPA_STATUS_SUCCESS != lacStatus) { -+ DPRINTK("%s(): LAC failed to deregister the session. " -+ "localSessionId= %p, lacStatus = %d\n", -+ __FUNCTION__, sessionToDeregister, lacStatus); -+ icp_atomic_inc(&lac_session_failed_dereg_count); -+ retval = EPERM; -+ } -+ } else { -+ DPRINTK("%s() Session not registered with LAC.\n", -+ __FUNCTION__); -+ } -+ -+ icp_ocfDrvFreeOCFSession(sessionData); -+ return retval; -+ -+} -+ -+/* Name : icp_ocfDrvAlgCheck -+ * -+ * Description : This function checks whether the cryptodesc argument pertains -+ * to a sym or hash function -+ */ -+static int icp_ocfDrvAlgCheck(struct cryptodesc *crp_desc) -+{ -+ -+ if (crp_desc->crd_alg == CRYPTO_3DES_CBC || -+ crp_desc->crd_alg == CRYPTO_AES_CBC || -+ crp_desc->crd_alg == CRYPTO_DES_CBC || -+ crp_desc->crd_alg == CRYPTO_NULL_CBC || -+ crp_desc->crd_alg == CRYPTO_ARC4) { -+ return ICP_OCF_DRV_ALG_CIPHER; -+ } -+ -+ return ICP_OCF_DRV_ALG_HASH; -+} -+ -+/* Name : icp_ocfDrvSymProcess -+ * -+ * Description : This function will map symmetric functionality calls from OCF -+ * to the LAC API. It will also allocate memory to store the session context. -+ * -+ * Notes: If it is the first perform call for a given session, then a LAC -+ * session is registered. After the session is registered, no checks as -+ * to whether session paramaters have changed (e.g. alg chain order) are -+ * done. -+ */ -+int icp_ocfDrvSymProcess(icp_device_t dev, struct cryptop *crp, int hint) -+{ -+ struct icp_drvSessionData *sessionData = NULL; -+ struct icp_drvOpData *drvOpData = NULL; -+ CpaStatus lacStatus = CPA_STATUS_SUCCESS; -+ Cpa32U sessionCtxSizeInBytes = 0; -+ -+ if (NULL == crp) { -+ DPRINTK("%s(): Invalid input parameters, cryptop is NULL\n", -+ __FUNCTION__); -+ return EINVAL; -+ } -+ -+ if (NULL == crp->crp_desc) { -+ DPRINTK("%s(): Invalid input parameters, no crp_desc attached " -+ "to crp\n", __FUNCTION__); -+ crp->crp_etype = EINVAL; -+ return EINVAL; -+ } -+ -+ if (NULL == crp->crp_buf) { -+ DPRINTK("%s(): Invalid input parameters, no buffer attached " -+ "to crp\n", __FUNCTION__); -+ crp->crp_etype = EINVAL; -+ return EINVAL; -+ } -+ -+ if (CPA_TRUE == icp_atomic_read(&icp_ocfDrvIsExiting)) { -+ crp->crp_etype = EFAULT; -+ return EFAULT; -+ } -+ -+ sessionData = (struct icp_drvSessionData *) -+ (CRYPTO_SESID2LID(crp->crp_sid)); -+ if (NULL == sessionData) { -+ DPRINTK("%s(): Invalid input parameters, Null Session ID \n", -+ __FUNCTION__); -+ crp->crp_etype = EINVAL; -+ return EINVAL; -+ } -+ -+/*If we get a request against a deregisted session, cancel operation*/ -+ if (ICP_SESSION_DEREGISTERED == sessionData->inUse) { -+ DPRINTK("%s(): Session ID %d was deregistered \n", -+ __FUNCTION__, (int)(CRYPTO_SESID2LID(crp->crp_sid))); -+ crp->crp_etype = EFAULT; -+ return EFAULT; -+ } -+ -+/*If none of the session states are set, then the session structure was either -+ not initialised properly or we are reading from a freed memory area (possible -+ due to OCF batch mode not removing queued requests against deregistered -+ sessions*/ -+ if (ICP_SESSION_INITIALISED != sessionData->inUse && -+ ICP_SESSION_RUNNING != sessionData->inUse) { -+ DPRINTK("%s(): Session - ID %d - not properly initialised or " -+ "memory freed back to the kernel \n", -+ __FUNCTION__, (int)(CRYPTO_SESID2LID(crp->crp_sid))); -+ crp->crp_etype = EINVAL; -+ return EINVAL; -+ } -+ -+ /*For the below checks, remember error checking is already done in LAC. -+ We're not validating inputs subsequent to registration */ -+ if (sessionData->inUse == ICP_SESSION_INITIALISED) { -+ DPRINTK("%s(): Initialising session\n", __FUNCTION__); -+ -+ if (NULL != crp->crp_desc->crd_next) { -+ if (ICP_OCF_DRV_ALG_CIPHER == -+ icp_ocfDrvAlgCheck(crp->crp_desc)) { -+ -+ sessionData->lacSessCtx.algChainOrder = -+ CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH; -+ -+ if (crp->crp_desc->crd_flags & CRD_F_ENCRYPT) { -+ sessionData->lacSessCtx.cipherSetupData. -+ cipherDirection = -+ CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT; -+ } else { -+ sessionData->lacSessCtx.cipherSetupData. -+ cipherDirection = -+ CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT; -+ } -+ } else { -+ sessionData->lacSessCtx.algChainOrder = -+ CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER; -+ -+ if (crp->crp_desc->crd_next->crd_flags & -+ CRD_F_ENCRYPT) { -+ sessionData->lacSessCtx.cipherSetupData. -+ cipherDirection = -+ CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT; -+ } else { -+ sessionData->lacSessCtx.cipherSetupData. -+ cipherDirection = -+ CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT; -+ } -+ -+ } -+ -+ } else if (ICP_OCF_DRV_ALG_CIPHER == -+ icp_ocfDrvAlgCheck(crp->crp_desc)) { -+ if (crp->crp_desc->crd_flags & CRD_F_ENCRYPT) { -+ sessionData->lacSessCtx.cipherSetupData. -+ cipherDirection = -+ CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT; -+ } else { -+ sessionData->lacSessCtx.cipherSetupData. -+ cipherDirection = -+ CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT; -+ } -+ -+ } -+ -+ /*No action required for standalone Auth here */ -+ -+ /* Allocate memory for SymSessionCtx before the Session Registration */ -+ lacStatus = -+ cpaCySymSessionCtxGetSize(CPA_INSTANCE_HANDLE_SINGLE, -+ &(sessionData->lacSessCtx), -+ &sessionCtxSizeInBytes); -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): cpaCySymSessionCtxGetSize failed - %d\n", -+ __FUNCTION__, lacStatus); -+ crp->crp_etype = EINVAL; -+ return EINVAL; -+ } -+ sessionData->sessHandle = -+ icp_kmalloc(sessionCtxSizeInBytes, ICP_M_NOWAIT); -+ if (NULL == sessionData->sessHandle) { -+ EPRINTK -+ ("%s(): Failed to get memory for SymSessionCtx\n", -+ __FUNCTION__); -+ crp->crp_etype = ENOMEM; -+ return ENOMEM; -+ } -+ -+ lacStatus = cpaCySymInitSession(CPA_INSTANCE_HANDLE_SINGLE, -+ icp_ocfDrvSymCallBack, -+ &(sessionData->lacSessCtx), -+ sessionData->sessHandle); -+ -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): cpaCySymInitSession failed -%d \n", -+ __FUNCTION__, lacStatus); -+ crp->crp_etype = EFAULT; -+ return EFAULT; -+ } -+ -+ sessionData->inUse = ICP_SESSION_RUNNING; -+ } -+ -+ drvOpData = icp_kmem_cache_zalloc(drvOpData_zone, ICP_M_NOWAIT); -+ if (NULL == drvOpData) { -+ EPRINTK("%s():Failed to get memory for drvOpData\n", -+ __FUNCTION__); -+ crp->crp_etype = ENOMEM; -+ return ENOMEM; -+ } -+ -+ drvOpData->lacOpData.pSessionCtx = sessionData->sessHandle; -+ drvOpData->digestSizeInBytes = sessionData->lacSessCtx.hashSetupData. -+ digestResultLenInBytes; -+ drvOpData->crp = crp; -+ -+ /* Set the default buffer list array memory allocation */ -+ drvOpData->srcBuffer.pBuffers = drvOpData->bufferListArray; -+ drvOpData->numBufferListArray = ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS; -+ -+ if (ICP_OCF_DRV_STATUS_SUCCESS != -+ icp_ocfDrvProcessDataSetup(drvOpData, drvOpData->crp->crp_desc)) { -+ crp->crp_etype = EINVAL; -+ goto err; -+ } -+ -+ if (drvOpData->crp->crp_desc->crd_next != NULL) { -+ if (icp_ocfDrvProcessDataSetup(drvOpData, drvOpData->crp-> -+ crp_desc->crd_next)) { -+ crp->crp_etype = EINVAL; -+ goto err; -+ } -+ -+ } -+ -+ /* -+ * Allocate buffer list array memory if the data fragment is more than -+ * the default number (ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS) and not -+ * calculated already -+ */ -+ if (crp->crp_flags & ICP_CRYPTO_F_PACKET_BUF) { -+ if (NULL == drvOpData->lacOpData.pDigestResult) { -+ drvOpData->numBufferListArray = -+ icp_ocfDrvGetPacketBuffFrags((icp_packet_buffer_t *) -+ crp->crp_buf); -+ } -+ -+ if (ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS < -+ drvOpData->numBufferListArray) { -+ DPRINTK("%s() numBufferListArray more than default\n", -+ __FUNCTION__); -+ drvOpData->srcBuffer.pBuffers = NULL; -+ drvOpData->srcBuffer.pBuffers = -+ icp_kmalloc(drvOpData->numBufferListArray * -+ sizeof(CpaFlatBuffer), ICP_M_NOWAIT); -+ if (NULL == drvOpData->srcBuffer.pBuffers) { -+ EPRINTK("%s() Failed to get memory for " -+ "pBuffers\n", __FUNCTION__); -+ ICP_CACHE_FREE(drvOpData_zone, drvOpData); -+ crp->crp_etype = ENOMEM; -+ return ENOMEM; -+ } -+ } -+ } -+ -+ /* -+ * Check the type of buffer structure we got and convert it into -+ * CpaBufferList format. -+ */ -+ if (crp->crp_flags & ICP_CRYPTO_F_PACKET_BUF) { -+ if (ICP_OCF_DRV_STATUS_SUCCESS != -+ icp_ocfDrvPacketBuffToBufferList((icp_packet_buffer_t *) -+ crp->crp_buf, -+ &(drvOpData->srcBuffer))) { -+ EPRINTK("%s():Failed to translate from packet buffer " -+ "to bufferlist\n", __FUNCTION__); -+ crp->crp_etype = EINVAL; -+ goto err; -+ } -+ -+ drvOpData->bufferType = ICP_CRYPTO_F_PACKET_BUF; -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ /* OCF only supports IOV of one entry. */ -+ if (NUM_IOV_SUPPORTED == -+ ((struct uio *)(crp->crp_buf))->uio_iovcnt) { -+ -+ icp_ocfDrvPtrAndLenToBufferList(((struct uio *)(crp-> -+ crp_buf))-> -+ uio_iov[0].iov_base, -+ ((struct uio *)(crp-> -+ crp_buf))-> -+ uio_iov[0].iov_len, -+ &(drvOpData-> -+ srcBuffer)); -+ -+ drvOpData->bufferType = CRYPTO_F_IOV; -+ -+ } else { -+ DPRINTK("%s():Unable to handle IOVs with lengths of " -+ "greater than one!\n", __FUNCTION__); -+ crp->crp_etype = EINVAL; -+ goto err; -+ } -+ -+ } else { -+ icp_ocfDrvPtrAndLenToBufferList(crp->crp_buf, -+ crp->crp_ilen, -+ &(drvOpData->srcBuffer)); -+ -+ drvOpData->bufferType = CRYPTO_BUF_CONTIG; -+ } -+ -+ /* Allocate srcBuffer's private meta data */ -+ if (ICP_OCF_DRV_STATUS_SUCCESS != -+ icp_ocfDrvAllocMetaData(&(drvOpData->srcBuffer), drvOpData)) { -+ EPRINTK("%s() icp_ocfDrvAllocMetaData failed\n", __FUNCTION__); -+ memset(&(drvOpData->lacOpData), 0, sizeof(CpaCySymOpData)); -+ crp->crp_etype = EINVAL; -+ goto err; -+ } -+ -+ /* Perform "in-place" crypto operation */ -+ lacStatus = cpaCySymPerformOp(CPA_INSTANCE_HANDLE_SINGLE, -+ (void *)drvOpData, -+ &(drvOpData->lacOpData), -+ &(drvOpData->srcBuffer), -+ &(drvOpData->srcBuffer), -+ &(drvOpData->verifyResult)); -+ if (CPA_STATUS_RETRY == lacStatus) { -+ DPRINTK("%s(): cpaCySymPerformOp retry, lacStatus = %d\n", -+ __FUNCTION__, lacStatus); -+ memset(&(drvOpData->lacOpData), 0, sizeof(CpaCySymOpData)); -+ crp->crp_etype = ERESTART; -+ goto err; -+ } -+ if (CPA_STATUS_SUCCESS != lacStatus) { -+ EPRINTK("%s(): cpaCySymPerformOp failed, lacStatus = %d\n", -+ __FUNCTION__, lacStatus); -+ memset(&(drvOpData->lacOpData), 0, sizeof(CpaCySymOpData)); -+ crp->crp_etype = EINVAL; -+ goto err; -+ } -+ -+ return 0; //OCF success status value -+ -+ err: -+ if (drvOpData->numBufferListArray > ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS) { -+ icp_kfree(drvOpData->srcBuffer.pBuffers); -+ } -+ icp_ocfDrvFreeMetaData(&(drvOpData->srcBuffer)); -+ ICP_CACHE_FREE(drvOpData_zone, drvOpData); -+ -+ return crp->crp_etype; -+} -+ -+/* Name : icp_ocfDrvProcessDataSetup -+ * -+ * Description : This function will setup all the cryptographic operation data -+ * that is required by LAC to execute the operation. -+ */ -+static int icp_ocfDrvProcessDataSetup(struct icp_drvOpData *drvOpData, -+ struct cryptodesc *crp_desc) -+{ -+ CpaCyRandGenOpData randGenOpData; -+ CpaFlatBuffer randData; -+ -+ drvOpData->lacOpData.packetType = CPA_CY_SYM_PACKET_TYPE_FULL; -+ -+ /* Convert from the cryptop to the ICP LAC crypto parameters */ -+ switch (crp_desc->crd_alg) { -+ case CRYPTO_NULL_CBC: -+ drvOpData->lacOpData. -+ cryptoStartSrcOffsetInBytes = crp_desc->crd_skip; -+ drvOpData->lacOpData. -+ messageLenToCipherInBytes = crp_desc->crd_len; -+ drvOpData->verifyResult = CPA_FALSE; -+ drvOpData->lacOpData.ivLenInBytes = NULL_BLOCK_LEN; -+ break; -+ case CRYPTO_DES_CBC: -+ drvOpData->lacOpData. -+ cryptoStartSrcOffsetInBytes = crp_desc->crd_skip; -+ drvOpData->lacOpData. -+ messageLenToCipherInBytes = crp_desc->crd_len; -+ drvOpData->verifyResult = CPA_FALSE; -+ drvOpData->lacOpData.ivLenInBytes = DES_BLOCK_LEN; -+ break; -+ case CRYPTO_3DES_CBC: -+ drvOpData->lacOpData. -+ cryptoStartSrcOffsetInBytes = crp_desc->crd_skip; -+ drvOpData->lacOpData. -+ messageLenToCipherInBytes = crp_desc->crd_len; -+ drvOpData->verifyResult = CPA_FALSE; -+ drvOpData->lacOpData.ivLenInBytes = DES3_BLOCK_LEN; -+ break; -+ case CRYPTO_ARC4: -+ drvOpData->lacOpData. -+ cryptoStartSrcOffsetInBytes = crp_desc->crd_skip; -+ drvOpData->lacOpData. -+ messageLenToCipherInBytes = crp_desc->crd_len; -+ drvOpData->verifyResult = CPA_FALSE; -+ drvOpData->lacOpData.ivLenInBytes = ARC4_COUNTER_LEN; -+ break; -+ case CRYPTO_AES_CBC: -+ drvOpData->lacOpData. -+ cryptoStartSrcOffsetInBytes = crp_desc->crd_skip; -+ drvOpData->lacOpData. -+ messageLenToCipherInBytes = crp_desc->crd_len; -+ drvOpData->verifyResult = CPA_FALSE; -+ drvOpData->lacOpData.ivLenInBytes = RIJNDAEL128_BLOCK_LEN; -+ break; -+ case CRYPTO_SHA1: -+ case CRYPTO_SHA1_HMAC: -+ case CRYPTO_SHA2_256: -+ case CRYPTO_SHA2_256_HMAC: -+ case CRYPTO_SHA2_384: -+ case CRYPTO_SHA2_384_HMAC: -+ case CRYPTO_SHA2_512: -+ case CRYPTO_SHA2_512_HMAC: -+ case CRYPTO_MD5: -+ case CRYPTO_MD5_HMAC: -+ drvOpData->lacOpData. -+ hashStartSrcOffsetInBytes = crp_desc->crd_skip; -+ drvOpData->lacOpData. -+ messageLenToHashInBytes = crp_desc->crd_len; -+ drvOpData->lacOpData. -+ pDigestResult = -+ icp_ocfDrvDigestPointerFind(drvOpData, crp_desc); -+ -+ if (NULL == drvOpData->lacOpData.pDigestResult) { -+ DPRINTK("%s(): ERROR - could not calculate " -+ "Digest Result memory address\n", __FUNCTION__); -+ return ICP_OCF_DRV_STATUS_FAIL; -+ } -+ -+ drvOpData->lacOpData.digestVerify = CPA_FALSE; -+ break; -+ default: -+ DPRINTK("%s(): Crypto process error - algorithm not " -+ "found \n", __FUNCTION__); -+ return ICP_OCF_DRV_STATUS_FAIL; -+ } -+ -+ /* Figure out what the IV is supposed to be */ -+ if ((crp_desc->crd_alg == CRYPTO_DES_CBC) || -+ (crp_desc->crd_alg == CRYPTO_3DES_CBC) || -+ (crp_desc->crd_alg == CRYPTO_AES_CBC)) { -+ /*ARC4 doesn't use an IV */ -+ if (crp_desc->crd_flags & CRD_F_IV_EXPLICIT) { -+ /* Explicit IV provided to OCF */ -+ drvOpData->lacOpData.pIv = crp_desc->crd_iv; -+ } else { -+ /* IV is not explicitly provided to OCF */ -+ -+ /* Point the LAC OP Data IV pointer to our allocated -+ storage location for this session. */ -+ drvOpData->lacOpData.pIv = drvOpData->ivData; -+ -+ if ((crp_desc->crd_flags & CRD_F_ENCRYPT) && -+ ((crp_desc->crd_flags & CRD_F_IV_PRESENT) == 0)) { -+ -+ /* Encrypting - need to create IV */ -+ randGenOpData.generateBits = CPA_TRUE; -+ randGenOpData.lenInBytes = MAX_IV_LEN_IN_BYTES; -+ -+ icp_ocfDrvPtrAndLenToFlatBuffer((Cpa8U *) -+ drvOpData-> -+ ivData, -+ MAX_IV_LEN_IN_BYTES, -+ &randData); -+ -+ if (CPA_STATUS_SUCCESS != -+ cpaCyRandGen(CPA_INSTANCE_HANDLE_SINGLE, -+ NULL, NULL, -+ &randGenOpData, &randData)) { -+ DPRINTK("%s(): ERROR - Failed to" -+ " generate" -+ " Initialisation Vector\n", -+ __FUNCTION__); -+ return ICP_OCF_DRV_STATUS_FAIL; -+ } -+ -+ crypto_copyback(drvOpData->crp-> -+ crp_flags, -+ drvOpData->crp->crp_buf, -+ crp_desc->crd_inject, -+ drvOpData->lacOpData. -+ ivLenInBytes, -+ (caddr_t) (drvOpData->lacOpData. -+ pIv)); -+ } else { -+ /* Reading IV from buffer */ -+ crypto_copydata(drvOpData->crp-> -+ crp_flags, -+ drvOpData->crp->crp_buf, -+ crp_desc->crd_inject, -+ drvOpData->lacOpData. -+ ivLenInBytes, -+ (caddr_t) (drvOpData->lacOpData. -+ pIv)); -+ } -+ -+ } -+ -+ } -+ -+ return ICP_OCF_DRV_STATUS_SUCCESS; -+} -+ -+/* Name : icp_ocfDrvDigestPointerFind -+ * -+ * Description : This function is used to find the memory address of where the -+ * digest information shall be stored in. Input buffer types are an skbuff, iov -+ * or flat buffer. The address is found using the buffer data start address and -+ * an offset. -+ * -+ * Note: In the case of a linux skbuff, the digest address may exist within -+ * a memory space linked to from the start buffer. These linked memory spaces -+ * must be traversed by the data length offset in order to find the digest start -+ * address. Whether there is enough space for the digest must also be checked. -+ */ -+uint8_t *icp_ocfDrvDigestPointerFind(struct icp_drvOpData * drvOpData, -+ struct cryptodesc * crp_desc) -+{ -+ -+ int offsetInBytes = crp_desc->crd_inject; -+ uint32_t digestSizeInBytes = drvOpData->digestSizeInBytes; -+ uint8_t *flat_buffer_base = NULL; -+ int flat_buffer_length = 0; -+ -+ if (drvOpData->crp->crp_flags & ICP_CRYPTO_F_PACKET_BUF) { -+ -+ return icp_ocfDrvPacketBufferDigestPointerFind(drvOpData, -+ offsetInBytes, -+ digestSizeInBytes); -+ -+ } else { -+ /* IOV or flat buffer */ -+ if (drvOpData->crp->crp_flags & CRYPTO_F_IOV) { -+ /*single IOV check has already been done */ -+ flat_buffer_base = ((struct uio *) -+ (drvOpData->crp->crp_buf))-> -+ uio_iov[0].iov_base; -+ flat_buffer_length = ((struct uio *) -+ (drvOpData->crp->crp_buf))-> -+ uio_iov[0].iov_len; -+ } else { -+ flat_buffer_base = (uint8_t *) drvOpData->crp->crp_buf; -+ flat_buffer_length = drvOpData->crp->crp_ilen; -+ } -+ -+ if (flat_buffer_length < (offsetInBytes + digestSizeInBytes)) { -+ DPRINTK("%s() Not enough space for Digest " -+ "(IOV/Flat Buffer) \n", __FUNCTION__); -+ return NULL; -+ } else { -+ return (uint8_t *) (flat_buffer_base + offsetInBytes); -+ } -+ } -+ DPRINTK("%s() Should not reach this point\n", __FUNCTION__); -+ return NULL; -+} -diff --git a/crypto/ocf/hifn/Makefile b/crypto/ocf/hifn/Makefile -new file mode 100644 -index 0000000..163fed0 ---- /dev/null -+++ b/crypto/ocf/hifn/Makefile -@@ -0,0 +1,13 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+obj-$(CONFIG_OCF_HIFN) += hifn7751.o -+obj-$(CONFIG_OCF_HIFNHIPP) += hifnHIPP.o -+ -+obj ?= . -+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/ -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/hifn/hifn7751.c b/crypto/ocf/hifn/hifn7751.c -new file mode 100644 -index 0000000..e7a5958 ---- /dev/null -+++ b/crypto/ocf/hifn/hifn7751.c -@@ -0,0 +1,2976 @@ -+/* $OpenBSD: hifn7751.c,v 1.120 2002/05/17 00:33:34 deraadt Exp $ */ -+ -+/*- -+ * Invertex AEON / Hifn 7751 driver -+ * Copyright (c) 1999 Invertex Inc. All rights reserved. -+ * Copyright (c) 1999 Theo de Raadt -+ * Copyright (c) 2000-2001 Network Security Technologies, Inc. -+ * http://www.netsec.net -+ * Copyright (c) 2003 Hifn Inc. -+ * -+ * This driver is based on a previous driver by Invertex, for which they -+ * requested: Please send any comments, feedback, bug-fixes, or feature -+ * requests to software@invertex.com. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored in part by the Defense Advanced Research Projects -+ * Agency (DARPA) and Air Force Research Laboratory, Air Force -+ * Materiel Command, USAF, under agreement number F30602-01-2-0537. -+ * -+ * -+__FBSDID("$FreeBSD: src/sys/dev/hifn/hifn7751.c,v 1.40 2007/03/21 03:42:49 sam Exp $"); -+ */ -+ -+/* -+ * Driver for various Hifn encryption processors. -+ */ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/wait.h> -+#include <linux/sched.h> -+#include <linux/pci.h> -+#include <linux/delay.h> -+#include <linux/interrupt.h> -+#include <linux/spinlock.h> -+#include <linux/random.h> -+#include <linux/version.h> -+#include <linux/skbuff.h> -+#include <asm/io.h> -+ -+#include <cryptodev.h> -+#include <uio.h> -+#include <hifn/hifn7751reg.h> -+#include <hifn/hifn7751var.h> -+ -+#if 1 -+#define DPRINTF(a...) if (hifn_debug) { \ -+ printk("%s: ", sc ? \ -+ device_get_nameunit(sc->sc_dev) : "hifn"); \ -+ printk(a); \ -+ } else -+#else -+#define DPRINTF(a...) -+#endif -+ -+static inline int -+pci_get_revid(struct pci_dev *dev) -+{ -+ u8 rid = 0; -+ pci_read_config_byte(dev, PCI_REVISION_ID, &rid); -+ return rid; -+} -+ -+static struct hifn_stats hifnstats; -+ -+#define debug hifn_debug -+int hifn_debug = 0; -+module_param(hifn_debug, int, 0644); -+MODULE_PARM_DESC(hifn_debug, "Enable debug"); -+ -+int hifn_maxbatch = 1; -+module_param(hifn_maxbatch, int, 0644); -+MODULE_PARM_DESC(hifn_maxbatch, "max ops to batch w/o interrupt"); -+ -+int hifn_cache_linesize = 0x10; -+module_param(hifn_cache_linesize, int, 0444); -+MODULE_PARM_DESC(hifn_cache_linesize, "PCI config cache line size"); -+ -+#ifdef MODULE_PARM -+char *hifn_pllconfig = NULL; -+MODULE_PARM(hifn_pllconfig, "s"); -+#else -+char hifn_pllconfig[32]; /* This setting is RO after loading */ -+module_param_string(hifn_pllconfig, hifn_pllconfig, 32, 0444); -+#endif -+MODULE_PARM_DESC(hifn_pllconfig, "PLL config, ie., pci66, ext33, ..."); -+ -+#ifdef HIFN_VULCANDEV -+#include <sys/conf.h> -+#include <sys/uio.h> -+ -+static struct cdevsw vulcanpk_cdevsw; /* forward declaration */ -+#endif -+ -+/* -+ * Prototypes and count for the pci_device structure -+ */ -+static int hifn_probe(struct pci_dev *dev, const struct pci_device_id *ent); -+static void hifn_remove(struct pci_dev *dev); -+ -+static int hifn_newsession(device_t, u_int32_t *, struct cryptoini *); -+static int hifn_freesession(device_t, u_int64_t); -+static int hifn_process(device_t, struct cryptop *, int); -+ -+static device_method_t hifn_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, hifn_newsession), -+ DEVMETHOD(cryptodev_freesession,hifn_freesession), -+ DEVMETHOD(cryptodev_process, hifn_process), -+}; -+ -+static void hifn_reset_board(struct hifn_softc *, int); -+static void hifn_reset_puc(struct hifn_softc *); -+static void hifn_puc_wait(struct hifn_softc *); -+static int hifn_enable_crypto(struct hifn_softc *); -+static void hifn_set_retry(struct hifn_softc *sc); -+static void hifn_init_dma(struct hifn_softc *); -+static void hifn_init_pci_registers(struct hifn_softc *); -+static int hifn_sramsize(struct hifn_softc *); -+static int hifn_dramsize(struct hifn_softc *); -+static int hifn_ramtype(struct hifn_softc *); -+static void hifn_sessions(struct hifn_softc *); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19) -+static irqreturn_t hifn_intr(int irq, void *arg); -+#else -+static irqreturn_t hifn_intr(int irq, void *arg, struct pt_regs *regs); -+#endif -+static u_int hifn_write_command(struct hifn_command *, u_int8_t *); -+static u_int32_t hifn_next_signature(u_int32_t a, u_int cnt); -+static void hifn_callback(struct hifn_softc *, struct hifn_command *, u_int8_t *); -+static int hifn_crypto(struct hifn_softc *, struct hifn_command *, struct cryptop *, int); -+static int hifn_readramaddr(struct hifn_softc *, int, u_int8_t *); -+static int hifn_writeramaddr(struct hifn_softc *, int, u_int8_t *); -+static int hifn_dmamap_load_src(struct hifn_softc *, struct hifn_command *); -+static int hifn_dmamap_load_dst(struct hifn_softc *, struct hifn_command *); -+static int hifn_init_pubrng(struct hifn_softc *); -+static void hifn_tick(unsigned long arg); -+static void hifn_abort(struct hifn_softc *); -+static void hifn_alloc_slot(struct hifn_softc *, int *, int *, int *, int *); -+ -+static void hifn_write_reg_0(struct hifn_softc *, bus_size_t, u_int32_t); -+static void hifn_write_reg_1(struct hifn_softc *, bus_size_t, u_int32_t); -+ -+#ifdef CONFIG_OCF_RANDOMHARVEST -+static int hifn_read_random(void *arg, u_int32_t *buf, int len); -+#endif -+ -+#define HIFN_MAX_CHIPS 8 -+static struct hifn_softc *hifn_chip_idx[HIFN_MAX_CHIPS]; -+ -+static __inline u_int32_t -+READ_REG_0(struct hifn_softc *sc, bus_size_t reg) -+{ -+ u_int32_t v = readl(sc->sc_bar0 + reg); -+ sc->sc_bar0_lastreg = (bus_size_t) -1; -+ return (v); -+} -+#define WRITE_REG_0(sc, reg, val) hifn_write_reg_0(sc, reg, val) -+ -+static __inline u_int32_t -+READ_REG_1(struct hifn_softc *sc, bus_size_t reg) -+{ -+ u_int32_t v = readl(sc->sc_bar1 + reg); -+ sc->sc_bar1_lastreg = (bus_size_t) -1; -+ return (v); -+} -+#define WRITE_REG_1(sc, reg, val) hifn_write_reg_1(sc, reg, val) -+ -+/* -+ * map in a given buffer (great on some arches :-) -+ */ -+ -+static int -+pci_map_uio(struct hifn_softc *sc, struct hifn_operand *buf, struct uio *uio) -+{ -+ struct iovec *iov = uio->uio_iov; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ buf->mapsize = 0; -+ for (buf->nsegs = 0; buf->nsegs < uio->uio_iovcnt; ) { -+ buf->segs[buf->nsegs].ds_addr = pci_map_single(sc->sc_pcidev, -+ iov->iov_base, iov->iov_len, -+ PCI_DMA_BIDIRECTIONAL); -+ buf->segs[buf->nsegs].ds_len = iov->iov_len; -+ buf->mapsize += iov->iov_len; -+ iov++; -+ buf->nsegs++; -+ } -+ /* identify this buffer by the first segment */ -+ buf->map = (void *) buf->segs[0].ds_addr; -+ return(0); -+} -+ -+/* -+ * map in a given sk_buff -+ */ -+ -+static int -+pci_map_skb(struct hifn_softc *sc,struct hifn_operand *buf,struct sk_buff *skb) -+{ -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ buf->mapsize = 0; -+ -+ buf->segs[0].ds_addr = pci_map_single(sc->sc_pcidev, -+ skb->data, skb_headlen(skb), PCI_DMA_BIDIRECTIONAL); -+ buf->segs[0].ds_len = skb_headlen(skb); -+ buf->mapsize += buf->segs[0].ds_len; -+ -+ buf->nsegs = 1; -+ -+ for (i = 0; i < skb_shinfo(skb)->nr_frags; ) { -+ buf->segs[buf->nsegs].ds_len = skb_shinfo(skb)->frags[i].size; -+ buf->segs[buf->nsegs].ds_addr = pci_map_single(sc->sc_pcidev, -+ page_address(skb_shinfo(skb)->frags[i].page) + -+ skb_shinfo(skb)->frags[i].page_offset, -+ buf->segs[buf->nsegs].ds_len, PCI_DMA_BIDIRECTIONAL); -+ buf->mapsize += buf->segs[buf->nsegs].ds_len; -+ buf->nsegs++; -+ } -+ -+ /* identify this buffer by the first segment */ -+ buf->map = (void *) buf->segs[0].ds_addr; -+ return(0); -+} -+ -+/* -+ * map in a given contiguous buffer -+ */ -+ -+static int -+pci_map_buf(struct hifn_softc *sc,struct hifn_operand *buf, void *b, int len) -+{ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ buf->mapsize = 0; -+ buf->segs[0].ds_addr = pci_map_single(sc->sc_pcidev, -+ b, len, PCI_DMA_BIDIRECTIONAL); -+ buf->segs[0].ds_len = len; -+ buf->mapsize += buf->segs[0].ds_len; -+ buf->nsegs = 1; -+ -+ /* identify this buffer by the first segment */ -+ buf->map = (void *) buf->segs[0].ds_addr; -+ return(0); -+} -+ -+#if 0 /* not needed at this time */ -+static void -+pci_sync_iov(struct hifn_softc *sc, struct hifn_operand *buf) -+{ -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ for (i = 0; i < buf->nsegs; i++) -+ pci_dma_sync_single_for_cpu(sc->sc_pcidev, buf->segs[i].ds_addr, -+ buf->segs[i].ds_len, PCI_DMA_BIDIRECTIONAL); -+} -+#endif -+ -+static void -+pci_unmap_buf(struct hifn_softc *sc, struct hifn_operand *buf) -+{ -+ int i; -+ DPRINTF("%s()\n", __FUNCTION__); -+ for (i = 0; i < buf->nsegs; i++) { -+ pci_unmap_single(sc->sc_pcidev, buf->segs[i].ds_addr, -+ buf->segs[i].ds_len, PCI_DMA_BIDIRECTIONAL); -+ buf->segs[i].ds_addr = 0; -+ buf->segs[i].ds_len = 0; -+ } -+ buf->nsegs = 0; -+ buf->mapsize = 0; -+ buf->map = 0; -+} -+ -+static const char* -+hifn_partname(struct hifn_softc *sc) -+{ -+ /* XXX sprintf numbers when not decoded */ -+ switch (pci_get_vendor(sc->sc_pcidev)) { -+ case PCI_VENDOR_HIFN: -+ switch (pci_get_device(sc->sc_pcidev)) { -+ case PCI_PRODUCT_HIFN_6500: return "Hifn 6500"; -+ case PCI_PRODUCT_HIFN_7751: return "Hifn 7751"; -+ case PCI_PRODUCT_HIFN_7811: return "Hifn 7811"; -+ case PCI_PRODUCT_HIFN_7951: return "Hifn 7951"; -+ case PCI_PRODUCT_HIFN_7955: return "Hifn 7955"; -+ case PCI_PRODUCT_HIFN_7956: return "Hifn 7956"; -+ } -+ return "Hifn unknown-part"; -+ case PCI_VENDOR_INVERTEX: -+ switch (pci_get_device(sc->sc_pcidev)) { -+ case PCI_PRODUCT_INVERTEX_AEON: return "Invertex AEON"; -+ } -+ return "Invertex unknown-part"; -+ case PCI_VENDOR_NETSEC: -+ switch (pci_get_device(sc->sc_pcidev)) { -+ case PCI_PRODUCT_NETSEC_7751: return "NetSec 7751"; -+ } -+ return "NetSec unknown-part"; -+ } -+ return "Unknown-vendor unknown-part"; -+} -+ -+static u_int -+checkmaxmin(struct pci_dev *dev, const char *what, u_int v, u_int min, u_int max) -+{ -+ struct hifn_softc *sc = pci_get_drvdata(dev); -+ if (v > max) { -+ device_printf(sc->sc_dev, "Warning, %s %u out of range, " -+ "using max %u\n", what, v, max); -+ v = max; -+ } else if (v < min) { -+ device_printf(sc->sc_dev, "Warning, %s %u out of range, " -+ "using min %u\n", what, v, min); -+ v = min; -+ } -+ return v; -+} -+ -+/* -+ * Select PLL configuration for 795x parts. This is complicated in -+ * that we cannot determine the optimal parameters without user input. -+ * The reference clock is derived from an external clock through a -+ * multiplier. The external clock is either the host bus (i.e. PCI) -+ * or an external clock generator. When using the PCI bus we assume -+ * the clock is either 33 or 66 MHz; for an external source we cannot -+ * tell the speed. -+ * -+ * PLL configuration is done with a string: "pci" for PCI bus, or "ext" -+ * for an external source, followed by the frequency. We calculate -+ * the appropriate multiplier and PLL register contents accordingly. -+ * When no configuration is given we default to "pci66" since that -+ * always will allow the card to work. If a card is using the PCI -+ * bus clock and in a 33MHz slot then it will be operating at half -+ * speed until the correct information is provided. -+ * -+ * We use a default setting of "ext66" because according to Mike Ham -+ * of HiFn, almost every board in existence has an external crystal -+ * populated at 66Mhz. Using PCI can be a problem on modern motherboards, -+ * because PCI33 can have clocks from 0 to 33Mhz, and some have -+ * non-PCI-compliant spread-spectrum clocks, which can confuse the pll. -+ */ -+static void -+hifn_getpllconfig(struct pci_dev *dev, u_int *pll) -+{ -+ const char *pllspec = hifn_pllconfig; -+ u_int freq, mul, fl, fh; -+ u_int32_t pllconfig; -+ char *nxt; -+ -+ if (pllspec == NULL) -+ pllspec = "ext66"; -+ fl = 33, fh = 66; -+ pllconfig = 0; -+ if (strncmp(pllspec, "ext", 3) == 0) { -+ pllspec += 3; -+ pllconfig |= HIFN_PLL_REF_SEL; -+ switch (pci_get_device(dev)) { -+ case PCI_PRODUCT_HIFN_7955: -+ case PCI_PRODUCT_HIFN_7956: -+ fl = 20, fh = 100; -+ break; -+#ifdef notyet -+ case PCI_PRODUCT_HIFN_7954: -+ fl = 20, fh = 66; -+ break; -+#endif -+ } -+ } else if (strncmp(pllspec, "pci", 3) == 0) -+ pllspec += 3; -+ freq = strtoul(pllspec, &nxt, 10); -+ if (nxt == pllspec) -+ freq = 66; -+ else -+ freq = checkmaxmin(dev, "frequency", freq, fl, fh); -+ /* -+ * Calculate multiplier. We target a Fck of 266 MHz, -+ * allowing only even values, possibly rounded down. -+ * Multipliers > 8 must set the charge pump current. -+ */ -+ mul = checkmaxmin(dev, "PLL divisor", (266 / freq) &~ 1, 2, 12); -+ pllconfig |= (mul / 2 - 1) << HIFN_PLL_ND_SHIFT; -+ if (mul > 8) -+ pllconfig |= HIFN_PLL_IS; -+ *pll = pllconfig; -+} -+ -+/* -+ * Attach an interface that successfully probed. -+ */ -+static int -+hifn_probe(struct pci_dev *dev, const struct pci_device_id *ent) -+{ -+ struct hifn_softc *sc = NULL; -+ char rbase; -+ u_int16_t ena, rev; -+ int rseg, rc; -+ unsigned long mem_start, mem_len; -+ static int num_chips = 0; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (pci_enable_device(dev) < 0) -+ return(-ENODEV); -+ -+ if (pci_set_mwi(dev)) -+ return(-ENODEV); -+ -+ if (!dev->irq) { -+ printk("hifn: found device with no IRQ assigned. check BIOS settings!"); -+ pci_disable_device(dev); -+ return(-ENODEV); -+ } -+ -+ sc = (struct hifn_softc *) kmalloc(sizeof(*sc), GFP_KERNEL); -+ if (!sc) -+ return(-ENOMEM); -+ memset(sc, 0, sizeof(*sc)); -+ -+ softc_device_init(sc, "hifn", num_chips, hifn_methods); -+ -+ sc->sc_pcidev = dev; -+ sc->sc_irq = -1; -+ sc->sc_cid = -1; -+ sc->sc_num = num_chips++; -+ if (sc->sc_num < HIFN_MAX_CHIPS) -+ hifn_chip_idx[sc->sc_num] = sc; -+ -+ pci_set_drvdata(sc->sc_pcidev, sc); -+ -+ spin_lock_init(&sc->sc_mtx); -+ -+ /* XXX handle power management */ -+ -+ /* -+ * The 7951 and 795x have a random number generator and -+ * public key support; note this. -+ */ -+ if (pci_get_vendor(dev) == PCI_VENDOR_HIFN && -+ (pci_get_device(dev) == PCI_PRODUCT_HIFN_7951 || -+ pci_get_device(dev) == PCI_PRODUCT_HIFN_7955 || -+ pci_get_device(dev) == PCI_PRODUCT_HIFN_7956)) -+ sc->sc_flags = HIFN_HAS_RNG | HIFN_HAS_PUBLIC; -+ /* -+ * The 7811 has a random number generator and -+ * we also note it's identity 'cuz of some quirks. -+ */ -+ if (pci_get_vendor(dev) == PCI_VENDOR_HIFN && -+ pci_get_device(dev) == PCI_PRODUCT_HIFN_7811) -+ sc->sc_flags |= HIFN_IS_7811 | HIFN_HAS_RNG; -+ -+ /* -+ * The 795x parts support AES. -+ */ -+ if (pci_get_vendor(dev) == PCI_VENDOR_HIFN && -+ (pci_get_device(dev) == PCI_PRODUCT_HIFN_7955 || -+ pci_get_device(dev) == PCI_PRODUCT_HIFN_7956)) { -+ sc->sc_flags |= HIFN_IS_7956 | HIFN_HAS_AES; -+ /* -+ * Select PLL configuration. This depends on the -+ * bus and board design and must be manually configured -+ * if the default setting is unacceptable. -+ */ -+ hifn_getpllconfig(dev, &sc->sc_pllconfig); -+ } -+ -+ /* -+ * Setup PCI resources. Note that we record the bus -+ * tag and handle for each register mapping, this is -+ * used by the READ_REG_0, WRITE_REG_0, READ_REG_1, -+ * and WRITE_REG_1 macros throughout the driver. -+ */ -+ mem_start = pci_resource_start(sc->sc_pcidev, 0); -+ mem_len = pci_resource_len(sc->sc_pcidev, 0); -+ sc->sc_bar0 = (ocf_iomem_t) ioremap(mem_start, mem_len); -+ if (!sc->sc_bar0) { -+ device_printf(sc->sc_dev, "cannot map bar%d register space\n", 0); -+ goto fail; -+ } -+ sc->sc_bar0_lastreg = (bus_size_t) -1; -+ -+ mem_start = pci_resource_start(sc->sc_pcidev, 1); -+ mem_len = pci_resource_len(sc->sc_pcidev, 1); -+ sc->sc_bar1 = (ocf_iomem_t) ioremap(mem_start, mem_len); -+ if (!sc->sc_bar1) { -+ device_printf(sc->sc_dev, "cannot map bar%d register space\n", 1); -+ goto fail; -+ } -+ sc->sc_bar1_lastreg = (bus_size_t) -1; -+ -+ /* fix up the bus size */ -+ if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) { -+ device_printf(sc->sc_dev, "No usable DMA configuration, aborting.\n"); -+ goto fail; -+ } -+ if (pci_set_consistent_dma_mask(dev, DMA_32BIT_MASK)) { -+ device_printf(sc->sc_dev, -+ "No usable consistent DMA configuration, aborting.\n"); -+ goto fail; -+ } -+ -+ hifn_set_retry(sc); -+ -+ /* -+ * Setup the area where the Hifn DMA's descriptors -+ * and associated data structures. -+ */ -+ sc->sc_dma = (struct hifn_dma *) pci_alloc_consistent(dev, -+ sizeof(*sc->sc_dma), -+ &sc->sc_dma_physaddr); -+ if (!sc->sc_dma) { -+ device_printf(sc->sc_dev, "cannot alloc sc_dma\n"); -+ goto fail; -+ } -+ bzero(sc->sc_dma, sizeof(*sc->sc_dma)); -+ -+ /* -+ * Reset the board and do the ``secret handshake'' -+ * to enable the crypto support. Then complete the -+ * initialization procedure by setting up the interrupt -+ * and hooking in to the system crypto support so we'll -+ * get used for system services like the crypto device, -+ * IPsec, RNG device, etc. -+ */ -+ hifn_reset_board(sc, 0); -+ -+ if (hifn_enable_crypto(sc) != 0) { -+ device_printf(sc->sc_dev, "crypto enabling failed\n"); -+ goto fail; -+ } -+ hifn_reset_puc(sc); -+ -+ hifn_init_dma(sc); -+ hifn_init_pci_registers(sc); -+ -+ pci_set_master(sc->sc_pcidev); -+ -+ /* XXX can't dynamically determine ram type for 795x; force dram */ -+ if (sc->sc_flags & HIFN_IS_7956) -+ sc->sc_drammodel = 1; -+ else if (hifn_ramtype(sc)) -+ goto fail; -+ -+ if (sc->sc_drammodel == 0) -+ hifn_sramsize(sc); -+ else -+ hifn_dramsize(sc); -+ -+ /* -+ * Workaround for NetSec 7751 rev A: half ram size because two -+ * of the address lines were left floating -+ */ -+ if (pci_get_vendor(dev) == PCI_VENDOR_NETSEC && -+ pci_get_device(dev) == PCI_PRODUCT_NETSEC_7751 && -+ pci_get_revid(dev) == 0x61) /*XXX???*/ -+ sc->sc_ramsize >>= 1; -+ -+ /* -+ * Arrange the interrupt line. -+ */ -+ rc = request_irq(dev->irq, hifn_intr, IRQF_SHARED, "hifn", sc); -+ if (rc) { -+ device_printf(sc->sc_dev, "could not map interrupt: %d\n", rc); -+ goto fail; -+ } -+ sc->sc_irq = dev->irq; -+ -+ hifn_sessions(sc); -+ -+ /* -+ * NB: Keep only the low 16 bits; this masks the chip id -+ * from the 7951. -+ */ -+ rev = READ_REG_1(sc, HIFN_1_REVID) & 0xffff; -+ -+ rseg = sc->sc_ramsize / 1024; -+ rbase = 'K'; -+ if (sc->sc_ramsize >= (1024 * 1024)) { -+ rbase = 'M'; -+ rseg /= 1024; -+ } -+ device_printf(sc->sc_dev, "%s, rev %u, %d%cB %cram", -+ hifn_partname(sc), rev, -+ rseg, rbase, sc->sc_drammodel ? 'd' : 's'); -+ if (sc->sc_flags & HIFN_IS_7956) -+ printf(", pll=0x%x<%s clk, %ux mult>", -+ sc->sc_pllconfig, -+ sc->sc_pllconfig & HIFN_PLL_REF_SEL ? "ext" : "pci", -+ 2 + 2*((sc->sc_pllconfig & HIFN_PLL_ND) >> 11)); -+ printf("\n"); -+ -+ sc->sc_cid = crypto_get_driverid(softc_get_device(sc),CRYPTOCAP_F_HARDWARE); -+ if (sc->sc_cid < 0) { -+ device_printf(sc->sc_dev, "could not get crypto driver id\n"); -+ goto fail; -+ } -+ -+ WRITE_REG_0(sc, HIFN_0_PUCNFG, -+ READ_REG_0(sc, HIFN_0_PUCNFG) | HIFN_PUCNFG_CHIPID); -+ ena = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA; -+ -+ switch (ena) { -+ case HIFN_PUSTAT_ENA_2: -+ crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_ARC4, 0, 0); -+ if (sc->sc_flags & HIFN_HAS_AES) -+ crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0); -+ /*FALLTHROUGH*/ -+ case HIFN_PUSTAT_ENA_1: -+ crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0); -+ break; -+ } -+ -+ if (sc->sc_flags & (HIFN_HAS_PUBLIC | HIFN_HAS_RNG)) -+ hifn_init_pubrng(sc); -+ -+ init_timer(&sc->sc_tickto); -+ sc->sc_tickto.function = hifn_tick; -+ sc->sc_tickto.data = (unsigned long) sc->sc_num; -+ mod_timer(&sc->sc_tickto, jiffies + HZ); -+ -+ return (0); -+ -+fail: -+ if (sc->sc_cid >= 0) -+ crypto_unregister_all(sc->sc_cid); -+ if (sc->sc_irq != -1) -+ free_irq(sc->sc_irq, sc); -+ if (sc->sc_dma) { -+ /* Turn off DMA polling */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | -+ HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE); -+ -+ pci_free_consistent(sc->sc_pcidev, -+ sizeof(*sc->sc_dma), -+ sc->sc_dma, sc->sc_dma_physaddr); -+ } -+ kfree(sc); -+ return (-ENXIO); -+} -+ -+/* -+ * Detach an interface that successfully probed. -+ */ -+static void -+hifn_remove(struct pci_dev *dev) -+{ -+ struct hifn_softc *sc = pci_get_drvdata(dev); -+ unsigned long l_flags; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ KASSERT(sc != NULL, ("hifn_detach: null software carrier!")); -+ -+ /* disable interrupts */ -+ HIFN_LOCK(sc); -+ WRITE_REG_1(sc, HIFN_1_DMA_IER, 0); -+ HIFN_UNLOCK(sc); -+ -+ /*XXX other resources */ -+ del_timer_sync(&sc->sc_tickto); -+ -+ /* Turn off DMA polling */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | -+ HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE); -+ -+ crypto_unregister_all(sc->sc_cid); -+ -+ free_irq(sc->sc_irq, sc); -+ -+ pci_free_consistent(sc->sc_pcidev, sizeof(*sc->sc_dma), -+ sc->sc_dma, sc->sc_dma_physaddr); -+} -+ -+ -+static int -+hifn_init_pubrng(struct hifn_softc *sc) -+{ -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if ((sc->sc_flags & HIFN_IS_7811) == 0) { -+ /* Reset 7951 public key/rng engine */ -+ WRITE_REG_1(sc, HIFN_1_PUB_RESET, -+ READ_REG_1(sc, HIFN_1_PUB_RESET) | HIFN_PUBRST_RESET); -+ -+ for (i = 0; i < 100; i++) { -+ DELAY(1000); -+ if ((READ_REG_1(sc, HIFN_1_PUB_RESET) & -+ HIFN_PUBRST_RESET) == 0) -+ break; -+ } -+ -+ if (i == 100) { -+ device_printf(sc->sc_dev, "public key init failed\n"); -+ return (1); -+ } -+ } -+ -+ /* Enable the rng, if available */ -+#ifdef CONFIG_OCF_RANDOMHARVEST -+ if (sc->sc_flags & HIFN_HAS_RNG) { -+ if (sc->sc_flags & HIFN_IS_7811) { -+ u_int32_t r; -+ r = READ_REG_1(sc, HIFN_1_7811_RNGENA); -+ if (r & HIFN_7811_RNGENA_ENA) { -+ r &= ~HIFN_7811_RNGENA_ENA; -+ WRITE_REG_1(sc, HIFN_1_7811_RNGENA, r); -+ } -+ WRITE_REG_1(sc, HIFN_1_7811_RNGCFG, -+ HIFN_7811_RNGCFG_DEFL); -+ r |= HIFN_7811_RNGENA_ENA; -+ WRITE_REG_1(sc, HIFN_1_7811_RNGENA, r); -+ } else -+ WRITE_REG_1(sc, HIFN_1_RNG_CONFIG, -+ READ_REG_1(sc, HIFN_1_RNG_CONFIG) | -+ HIFN_RNGCFG_ENA); -+ -+ sc->sc_rngfirst = 1; -+ crypto_rregister(sc->sc_cid, hifn_read_random, sc); -+ } -+#endif -+ -+ /* Enable public key engine, if available */ -+ if (sc->sc_flags & HIFN_HAS_PUBLIC) { -+ WRITE_REG_1(sc, HIFN_1_PUB_IEN, HIFN_PUBIEN_DONE); -+ sc->sc_dmaier |= HIFN_DMAIER_PUBDONE; -+ WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); -+#ifdef HIFN_VULCANDEV -+ sc->sc_pkdev = make_dev(&vulcanpk_cdevsw, 0, -+ UID_ROOT, GID_WHEEL, 0666, -+ "vulcanpk"); -+ sc->sc_pkdev->si_drv1 = sc; -+#endif -+ } -+ -+ return (0); -+} -+ -+#ifdef CONFIG_OCF_RANDOMHARVEST -+static int -+hifn_read_random(void *arg, u_int32_t *buf, int len) -+{ -+ struct hifn_softc *sc = (struct hifn_softc *) arg; -+ u_int32_t sts; -+ int i, rc = 0; -+ -+ if (len <= 0) -+ return rc; -+ -+ if (sc->sc_flags & HIFN_IS_7811) { -+ /* ONLY VALID ON 7811!!!! */ -+ for (i = 0; i < 5; i++) { -+ sts = READ_REG_1(sc, HIFN_1_7811_RNGSTS); -+ if (sts & HIFN_7811_RNGSTS_UFL) { -+ device_printf(sc->sc_dev, -+ "RNG underflow: disabling\n"); -+ /* DAVIDM perhaps return -1 */ -+ break; -+ } -+ if ((sts & HIFN_7811_RNGSTS_RDY) == 0) -+ break; -+ -+ /* -+ * There are at least two words in the RNG FIFO -+ * at this point. -+ */ -+ if (rc < len) -+ buf[rc++] = READ_REG_1(sc, HIFN_1_7811_RNGDAT); -+ if (rc < len) -+ buf[rc++] = READ_REG_1(sc, HIFN_1_7811_RNGDAT); -+ } -+ } else -+ buf[rc++] = READ_REG_1(sc, HIFN_1_RNG_DATA); -+ -+ /* NB: discard first data read */ -+ if (sc->sc_rngfirst) { -+ sc->sc_rngfirst = 0; -+ rc = 0; -+ } -+ -+ return(rc); -+} -+#endif /* CONFIG_OCF_RANDOMHARVEST */ -+ -+static void -+hifn_puc_wait(struct hifn_softc *sc) -+{ -+ int i; -+ int reg = HIFN_0_PUCTRL; -+ -+ if (sc->sc_flags & HIFN_IS_7956) { -+ reg = HIFN_0_PUCTRL2; -+ } -+ -+ for (i = 5000; i > 0; i--) { -+ DELAY(1); -+ if (!(READ_REG_0(sc, reg) & HIFN_PUCTRL_RESET)) -+ break; -+ } -+ if (!i) -+ device_printf(sc->sc_dev, "proc unit did not reset(0x%x)\n", -+ READ_REG_0(sc, HIFN_0_PUCTRL)); -+} -+ -+/* -+ * Reset the processing unit. -+ */ -+static void -+hifn_reset_puc(struct hifn_softc *sc) -+{ -+ /* Reset processing unit */ -+ int reg = HIFN_0_PUCTRL; -+ -+ if (sc->sc_flags & HIFN_IS_7956) { -+ reg = HIFN_0_PUCTRL2; -+ } -+ WRITE_REG_0(sc, reg, HIFN_PUCTRL_DMAENA); -+ -+ hifn_puc_wait(sc); -+} -+ -+/* -+ * Set the Retry and TRDY registers; note that we set them to -+ * zero because the 7811 locks up when forced to retry (section -+ * 3.6 of "Specification Update SU-0014-04". Not clear if we -+ * should do this for all Hifn parts, but it doesn't seem to hurt. -+ */ -+static void -+hifn_set_retry(struct hifn_softc *sc) -+{ -+ DPRINTF("%s()\n", __FUNCTION__); -+ /* NB: RETRY only responds to 8-bit reads/writes */ -+ pci_write_config_byte(sc->sc_pcidev, HIFN_RETRY_TIMEOUT, 0); -+ pci_write_config_dword(sc->sc_pcidev, HIFN_TRDY_TIMEOUT, 0); -+ /* piggy back the cache line setting here */ -+ pci_write_config_byte(sc->sc_pcidev, PCI_CACHE_LINE_SIZE, hifn_cache_linesize); -+} -+ -+/* -+ * Resets the board. Values in the regesters are left as is -+ * from the reset (i.e. initial values are assigned elsewhere). -+ */ -+static void -+hifn_reset_board(struct hifn_softc *sc, int full) -+{ -+ u_int32_t reg; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ /* -+ * Set polling in the DMA configuration register to zero. 0x7 avoids -+ * resetting the board and zeros out the other fields. -+ */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | -+ HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE); -+ -+ /* -+ * Now that polling has been disabled, we have to wait 1 ms -+ * before resetting the board. -+ */ -+ DELAY(1000); -+ -+ /* Reset the DMA unit */ -+ if (full) { -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MODE); -+ DELAY(1000); -+ } else { -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, -+ HIFN_DMACNFG_MODE | HIFN_DMACNFG_MSTRESET); -+ hifn_reset_puc(sc); -+ } -+ -+ KASSERT(sc->sc_dma != NULL, ("hifn_reset_board: null DMA tag!")); -+ bzero(sc->sc_dma, sizeof(*sc->sc_dma)); -+ -+ /* Bring dma unit out of reset */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | -+ HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE); -+ -+ hifn_puc_wait(sc); -+ hifn_set_retry(sc); -+ -+ if (sc->sc_flags & HIFN_IS_7811) { -+ for (reg = 0; reg < 1000; reg++) { -+ if (READ_REG_1(sc, HIFN_1_7811_MIPSRST) & -+ HIFN_MIPSRST_CRAMINIT) -+ break; -+ DELAY(1000); -+ } -+ if (reg == 1000) -+ device_printf(sc->sc_dev, ": cram init timeout\n"); -+ } else { -+ /* set up DMA configuration register #2 */ -+ /* turn off all PK and BAR0 swaps */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG2, -+ (3 << HIFN_DMACNFG2_INIT_WRITE_BURST_SHIFT)| -+ (3 << HIFN_DMACNFG2_INIT_READ_BURST_SHIFT)| -+ (2 << HIFN_DMACNFG2_TGT_WRITE_BURST_SHIFT)| -+ (2 << HIFN_DMACNFG2_TGT_READ_BURST_SHIFT)); -+ } -+} -+ -+static u_int32_t -+hifn_next_signature(u_int32_t a, u_int cnt) -+{ -+ int i; -+ u_int32_t v; -+ -+ for (i = 0; i < cnt; i++) { -+ -+ /* get the parity */ -+ v = a & 0x80080125; -+ v ^= v >> 16; -+ v ^= v >> 8; -+ v ^= v >> 4; -+ v ^= v >> 2; -+ v ^= v >> 1; -+ -+ a = (v & 1) ^ (a << 1); -+ } -+ -+ return a; -+} -+ -+ -+/* -+ * Checks to see if crypto is already enabled. If crypto isn't enable, -+ * "hifn_enable_crypto" is called to enable it. The check is important, -+ * as enabling crypto twice will lock the board. -+ */ -+static int -+hifn_enable_crypto(struct hifn_softc *sc) -+{ -+ u_int32_t dmacfg, ramcfg, encl, addr, i; -+ char offtbl[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00 }; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ ramcfg = READ_REG_0(sc, HIFN_0_PUCNFG); -+ dmacfg = READ_REG_1(sc, HIFN_1_DMA_CNFG); -+ -+ /* -+ * The RAM config register's encrypt level bit needs to be set before -+ * every read performed on the encryption level register. -+ */ -+ WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg | HIFN_PUCNFG_CHIPID); -+ -+ encl = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA; -+ -+ /* -+ * Make sure we don't re-unlock. Two unlocks kills chip until the -+ * next reboot. -+ */ -+ if (encl == HIFN_PUSTAT_ENA_1 || encl == HIFN_PUSTAT_ENA_2) { -+#ifdef HIFN_DEBUG -+ if (hifn_debug) -+ device_printf(sc->sc_dev, -+ "Strong crypto already enabled!\n"); -+#endif -+ goto report; -+ } -+ -+ if (encl != 0 && encl != HIFN_PUSTAT_ENA_0) { -+#ifdef HIFN_DEBUG -+ if (hifn_debug) -+ device_printf(sc->sc_dev, -+ "Unknown encryption level 0x%x\n", encl); -+#endif -+ return 1; -+ } -+ -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_UNLOCK | -+ HIFN_DMACNFG_MSTRESET | HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE); -+ DELAY(1000); -+ addr = READ_REG_1(sc, HIFN_UNLOCK_SECRET1); -+ DELAY(1000); -+ WRITE_REG_1(sc, HIFN_UNLOCK_SECRET2, 0); -+ DELAY(1000); -+ -+ for (i = 0; i <= 12; i++) { -+ addr = hifn_next_signature(addr, offtbl[i] + 0x101); -+ WRITE_REG_1(sc, HIFN_UNLOCK_SECRET2, addr); -+ -+ DELAY(1000); -+ } -+ -+ WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg | HIFN_PUCNFG_CHIPID); -+ encl = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA; -+ -+#ifdef HIFN_DEBUG -+ if (hifn_debug) { -+ if (encl != HIFN_PUSTAT_ENA_1 && encl != HIFN_PUSTAT_ENA_2) -+ device_printf(sc->sc_dev, "Engine is permanently " -+ "locked until next system reset!\n"); -+ else -+ device_printf(sc->sc_dev, "Engine enabled " -+ "successfully!\n"); -+ } -+#endif -+ -+report: -+ WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg); -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, dmacfg); -+ -+ switch (encl) { -+ case HIFN_PUSTAT_ENA_1: -+ case HIFN_PUSTAT_ENA_2: -+ break; -+ case HIFN_PUSTAT_ENA_0: -+ default: -+ device_printf(sc->sc_dev, "disabled\n"); -+ break; -+ } -+ -+ return 0; -+} -+ -+/* -+ * Give initial values to the registers listed in the "Register Space" -+ * section of the HIFN Software Development reference manual. -+ */ -+static void -+hifn_init_pci_registers(struct hifn_softc *sc) -+{ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ /* write fixed values needed by the Initialization registers */ -+ WRITE_REG_0(sc, HIFN_0_PUCTRL, HIFN_PUCTRL_DMAENA); -+ WRITE_REG_0(sc, HIFN_0_FIFOCNFG, HIFN_FIFOCNFG_THRESHOLD); -+ WRITE_REG_0(sc, HIFN_0_PUIER, HIFN_PUIER_DSTOVER); -+ -+ /* write all 4 ring address registers */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CRAR, sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, cmdr[0])); -+ WRITE_REG_1(sc, HIFN_1_DMA_SRAR, sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, srcr[0])); -+ WRITE_REG_1(sc, HIFN_1_DMA_DRAR, sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, dstr[0])); -+ WRITE_REG_1(sc, HIFN_1_DMA_RRAR, sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, resr[0])); -+ -+ DELAY(2000); -+ -+ /* write status register */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CSR, -+ HIFN_DMACSR_D_CTRL_DIS | HIFN_DMACSR_R_CTRL_DIS | -+ HIFN_DMACSR_S_CTRL_DIS | HIFN_DMACSR_C_CTRL_DIS | -+ HIFN_DMACSR_D_ABORT | HIFN_DMACSR_D_DONE | HIFN_DMACSR_D_LAST | -+ HIFN_DMACSR_D_WAIT | HIFN_DMACSR_D_OVER | -+ HIFN_DMACSR_R_ABORT | HIFN_DMACSR_R_DONE | HIFN_DMACSR_R_LAST | -+ HIFN_DMACSR_R_WAIT | HIFN_DMACSR_R_OVER | -+ HIFN_DMACSR_S_ABORT | HIFN_DMACSR_S_DONE | HIFN_DMACSR_S_LAST | -+ HIFN_DMACSR_S_WAIT | -+ HIFN_DMACSR_C_ABORT | HIFN_DMACSR_C_DONE | HIFN_DMACSR_C_LAST | -+ HIFN_DMACSR_C_WAIT | -+ HIFN_DMACSR_ENGINE | -+ ((sc->sc_flags & HIFN_HAS_PUBLIC) ? -+ HIFN_DMACSR_PUBDONE : 0) | -+ ((sc->sc_flags & HIFN_IS_7811) ? -+ HIFN_DMACSR_ILLW | HIFN_DMACSR_ILLR : 0)); -+ -+ sc->sc_d_busy = sc->sc_r_busy = sc->sc_s_busy = sc->sc_c_busy = 0; -+ sc->sc_dmaier |= HIFN_DMAIER_R_DONE | HIFN_DMAIER_C_ABORT | -+ HIFN_DMAIER_D_OVER | HIFN_DMAIER_R_OVER | -+ HIFN_DMAIER_S_ABORT | HIFN_DMAIER_D_ABORT | HIFN_DMAIER_R_ABORT | -+ ((sc->sc_flags & HIFN_IS_7811) ? -+ HIFN_DMAIER_ILLW | HIFN_DMAIER_ILLR : 0); -+ sc->sc_dmaier &= ~HIFN_DMAIER_C_WAIT; -+ WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); -+ -+ -+ if (sc->sc_flags & HIFN_IS_7956) { -+ u_int32_t pll; -+ -+ WRITE_REG_0(sc, HIFN_0_PUCNFG, HIFN_PUCNFG_COMPSING | -+ HIFN_PUCNFG_TCALLPHASES | -+ HIFN_PUCNFG_TCDRVTOTEM | HIFN_PUCNFG_BUS32); -+ -+ /* turn off the clocks and insure bypass is set */ -+ pll = READ_REG_1(sc, HIFN_1_PLL); -+ pll = (pll &~ (HIFN_PLL_PK_CLK_SEL | HIFN_PLL_PE_CLK_SEL)) -+ | HIFN_PLL_BP | HIFN_PLL_MBSET; -+ WRITE_REG_1(sc, HIFN_1_PLL, pll); -+ DELAY(10*1000); /* 10ms */ -+ -+ /* change configuration */ -+ pll = (pll &~ HIFN_PLL_CONFIG) | sc->sc_pllconfig; -+ WRITE_REG_1(sc, HIFN_1_PLL, pll); -+ DELAY(10*1000); /* 10ms */ -+ -+ /* disable bypass */ -+ pll &= ~HIFN_PLL_BP; -+ WRITE_REG_1(sc, HIFN_1_PLL, pll); -+ /* enable clocks with new configuration */ -+ pll |= HIFN_PLL_PK_CLK_SEL | HIFN_PLL_PE_CLK_SEL; -+ WRITE_REG_1(sc, HIFN_1_PLL, pll); -+ } else { -+ WRITE_REG_0(sc, HIFN_0_PUCNFG, HIFN_PUCNFG_COMPSING | -+ HIFN_PUCNFG_DRFR_128 | HIFN_PUCNFG_TCALLPHASES | -+ HIFN_PUCNFG_TCDRVTOTEM | HIFN_PUCNFG_BUS32 | -+ (sc->sc_drammodel ? HIFN_PUCNFG_DRAM : HIFN_PUCNFG_SRAM)); -+ } -+ -+ WRITE_REG_0(sc, HIFN_0_PUISR, HIFN_PUISR_DSTOVER); -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | -+ HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE | HIFN_DMACNFG_LAST | -+ ((HIFN_POLL_FREQUENCY << 16 ) & HIFN_DMACNFG_POLLFREQ) | -+ ((HIFN_POLL_SCALAR << 8) & HIFN_DMACNFG_POLLINVAL)); -+} -+ -+/* -+ * The maximum number of sessions supported by the card -+ * is dependent on the amount of context ram, which -+ * encryption algorithms are enabled, and how compression -+ * is configured. This should be configured before this -+ * routine is called. -+ */ -+static void -+hifn_sessions(struct hifn_softc *sc) -+{ -+ u_int32_t pucnfg; -+ int ctxsize; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ pucnfg = READ_REG_0(sc, HIFN_0_PUCNFG); -+ -+ if (pucnfg & HIFN_PUCNFG_COMPSING) { -+ if (pucnfg & HIFN_PUCNFG_ENCCNFG) -+ ctxsize = 128; -+ else -+ ctxsize = 512; -+ /* -+ * 7955/7956 has internal context memory of 32K -+ */ -+ if (sc->sc_flags & HIFN_IS_7956) -+ sc->sc_maxses = 32768 / ctxsize; -+ else -+ sc->sc_maxses = 1 + -+ ((sc->sc_ramsize - 32768) / ctxsize); -+ } else -+ sc->sc_maxses = sc->sc_ramsize / 16384; -+ -+ if (sc->sc_maxses > 2048) -+ sc->sc_maxses = 2048; -+} -+ -+/* -+ * Determine ram type (sram or dram). Board should be just out of a reset -+ * state when this is called. -+ */ -+static int -+hifn_ramtype(struct hifn_softc *sc) -+{ -+ u_int8_t data[8], dataexpect[8]; -+ int i; -+ -+ for (i = 0; i < sizeof(data); i++) -+ data[i] = dataexpect[i] = 0x55; -+ if (hifn_writeramaddr(sc, 0, data)) -+ return (-1); -+ if (hifn_readramaddr(sc, 0, data)) -+ return (-1); -+ if (bcmp(data, dataexpect, sizeof(data)) != 0) { -+ sc->sc_drammodel = 1; -+ return (0); -+ } -+ -+ for (i = 0; i < sizeof(data); i++) -+ data[i] = dataexpect[i] = 0xaa; -+ if (hifn_writeramaddr(sc, 0, data)) -+ return (-1); -+ if (hifn_readramaddr(sc, 0, data)) -+ return (-1); -+ if (bcmp(data, dataexpect, sizeof(data)) != 0) { -+ sc->sc_drammodel = 1; -+ return (0); -+ } -+ -+ return (0); -+} -+ -+#define HIFN_SRAM_MAX (32 << 20) -+#define HIFN_SRAM_STEP_SIZE 16384 -+#define HIFN_SRAM_GRANULARITY (HIFN_SRAM_MAX / HIFN_SRAM_STEP_SIZE) -+ -+static int -+hifn_sramsize(struct hifn_softc *sc) -+{ -+ u_int32_t a; -+ u_int8_t data[8]; -+ u_int8_t dataexpect[sizeof(data)]; -+ int32_t i; -+ -+ for (i = 0; i < sizeof(data); i++) -+ data[i] = dataexpect[i] = i ^ 0x5a; -+ -+ for (i = HIFN_SRAM_GRANULARITY - 1; i >= 0; i--) { -+ a = i * HIFN_SRAM_STEP_SIZE; -+ bcopy(&i, data, sizeof(i)); -+ hifn_writeramaddr(sc, a, data); -+ } -+ -+ for (i = 0; i < HIFN_SRAM_GRANULARITY; i++) { -+ a = i * HIFN_SRAM_STEP_SIZE; -+ bcopy(&i, dataexpect, sizeof(i)); -+ if (hifn_readramaddr(sc, a, data) < 0) -+ return (0); -+ if (bcmp(data, dataexpect, sizeof(data)) != 0) -+ return (0); -+ sc->sc_ramsize = a + HIFN_SRAM_STEP_SIZE; -+ } -+ -+ return (0); -+} -+ -+/* -+ * XXX For dram boards, one should really try all of the -+ * HIFN_PUCNFG_DSZ_*'s. This just assumes that PUCNFG -+ * is already set up correctly. -+ */ -+static int -+hifn_dramsize(struct hifn_softc *sc) -+{ -+ u_int32_t cnfg; -+ -+ if (sc->sc_flags & HIFN_IS_7956) { -+ /* -+ * 7955/7956 have a fixed internal ram of only 32K. -+ */ -+ sc->sc_ramsize = 32768; -+ } else { -+ cnfg = READ_REG_0(sc, HIFN_0_PUCNFG) & -+ HIFN_PUCNFG_DRAMMASK; -+ sc->sc_ramsize = 1 << ((cnfg >> 13) + 18); -+ } -+ return (0); -+} -+ -+static void -+hifn_alloc_slot(struct hifn_softc *sc, int *cmdp, int *srcp, int *dstp, int *resp) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (dma->cmdi == HIFN_D_CMD_RSIZE) { -+ dma->cmdi = 0; -+ dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ); -+ wmb(); -+ dma->cmdr[HIFN_D_CMD_RSIZE].l |= htole32(HIFN_D_VALID); -+ HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE, -+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); -+ } -+ *cmdp = dma->cmdi++; -+ dma->cmdk = dma->cmdi; -+ -+ if (dma->srci == HIFN_D_SRC_RSIZE) { -+ dma->srci = 0; -+ dma->srcr[HIFN_D_SRC_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ); -+ wmb(); -+ dma->srcr[HIFN_D_SRC_RSIZE].l |= htole32(HIFN_D_VALID); -+ HIFN_SRCR_SYNC(sc, HIFN_D_SRC_RSIZE, -+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); -+ } -+ *srcp = dma->srci++; -+ dma->srck = dma->srci; -+ -+ if (dma->dsti == HIFN_D_DST_RSIZE) { -+ dma->dsti = 0; -+ dma->dstr[HIFN_D_DST_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ); -+ wmb(); -+ dma->dstr[HIFN_D_DST_RSIZE].l |= htole32(HIFN_D_VALID); -+ HIFN_DSTR_SYNC(sc, HIFN_D_DST_RSIZE, -+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); -+ } -+ *dstp = dma->dsti++; -+ dma->dstk = dma->dsti; -+ -+ if (dma->resi == HIFN_D_RES_RSIZE) { -+ dma->resi = 0; -+ dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ); -+ wmb(); -+ dma->resr[HIFN_D_RES_RSIZE].l |= htole32(HIFN_D_VALID); -+ HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE, -+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); -+ } -+ *resp = dma->resi++; -+ dma->resk = dma->resi; -+} -+ -+static int -+hifn_writeramaddr(struct hifn_softc *sc, int addr, u_int8_t *data) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ hifn_base_command_t wc; -+ const u_int32_t masks = HIFN_D_VALID | HIFN_D_LAST | HIFN_D_MASKDONEIRQ; -+ int r, cmdi, resi, srci, dsti; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ wc.masks = htole16(3 << 13); -+ wc.session_num = htole16(addr >> 14); -+ wc.total_source_count = htole16(8); -+ wc.total_dest_count = htole16(addr & 0x3fff); -+ -+ hifn_alloc_slot(sc, &cmdi, &srci, &dsti, &resi); -+ -+ WRITE_REG_1(sc, HIFN_1_DMA_CSR, -+ HIFN_DMACSR_C_CTRL_ENA | HIFN_DMACSR_S_CTRL_ENA | -+ HIFN_DMACSR_D_CTRL_ENA | HIFN_DMACSR_R_CTRL_ENA); -+ -+ /* build write command */ -+ bzero(dma->command_bufs[cmdi], HIFN_MAX_COMMAND); -+ *(hifn_base_command_t *)dma->command_bufs[cmdi] = wc; -+ bcopy(data, &dma->test_src, sizeof(dma->test_src)); -+ -+ dma->srcr[srci].p = htole32(sc->sc_dma_physaddr -+ + offsetof(struct hifn_dma, test_src)); -+ dma->dstr[dsti].p = htole32(sc->sc_dma_physaddr -+ + offsetof(struct hifn_dma, test_dst)); -+ -+ dma->cmdr[cmdi].l = htole32(16 | masks); -+ dma->srcr[srci].l = htole32(8 | masks); -+ dma->dstr[dsti].l = htole32(4 | masks); -+ dma->resr[resi].l = htole32(4 | masks); -+ -+ for (r = 10000; r >= 0; r--) { -+ DELAY(10); -+ if ((dma->resr[resi].l & htole32(HIFN_D_VALID)) == 0) -+ break; -+ } -+ if (r == 0) { -+ device_printf(sc->sc_dev, "writeramaddr -- " -+ "result[%d](addr %d) still valid\n", resi, addr); -+ r = -1; -+ return (-1); -+ } else -+ r = 0; -+ -+ WRITE_REG_1(sc, HIFN_1_DMA_CSR, -+ HIFN_DMACSR_C_CTRL_DIS | HIFN_DMACSR_S_CTRL_DIS | -+ HIFN_DMACSR_D_CTRL_DIS | HIFN_DMACSR_R_CTRL_DIS); -+ -+ return (r); -+} -+ -+static int -+hifn_readramaddr(struct hifn_softc *sc, int addr, u_int8_t *data) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ hifn_base_command_t rc; -+ const u_int32_t masks = HIFN_D_VALID | HIFN_D_LAST | HIFN_D_MASKDONEIRQ; -+ int r, cmdi, srci, dsti, resi; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ rc.masks = htole16(2 << 13); -+ rc.session_num = htole16(addr >> 14); -+ rc.total_source_count = htole16(addr & 0x3fff); -+ rc.total_dest_count = htole16(8); -+ -+ hifn_alloc_slot(sc, &cmdi, &srci, &dsti, &resi); -+ -+ WRITE_REG_1(sc, HIFN_1_DMA_CSR, -+ HIFN_DMACSR_C_CTRL_ENA | HIFN_DMACSR_S_CTRL_ENA | -+ HIFN_DMACSR_D_CTRL_ENA | HIFN_DMACSR_R_CTRL_ENA); -+ -+ bzero(dma->command_bufs[cmdi], HIFN_MAX_COMMAND); -+ *(hifn_base_command_t *)dma->command_bufs[cmdi] = rc; -+ -+ dma->srcr[srci].p = htole32(sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, test_src)); -+ dma->test_src = 0; -+ dma->dstr[dsti].p = htole32(sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, test_dst)); -+ dma->test_dst = 0; -+ dma->cmdr[cmdi].l = htole32(8 | masks); -+ dma->srcr[srci].l = htole32(8 | masks); -+ dma->dstr[dsti].l = htole32(8 | masks); -+ dma->resr[resi].l = htole32(HIFN_MAX_RESULT | masks); -+ -+ for (r = 10000; r >= 0; r--) { -+ DELAY(10); -+ if ((dma->resr[resi].l & htole32(HIFN_D_VALID)) == 0) -+ break; -+ } -+ if (r == 0) { -+ device_printf(sc->sc_dev, "readramaddr -- " -+ "result[%d](addr %d) still valid\n", resi, addr); -+ r = -1; -+ } else { -+ r = 0; -+ bcopy(&dma->test_dst, data, sizeof(dma->test_dst)); -+ } -+ -+ WRITE_REG_1(sc, HIFN_1_DMA_CSR, -+ HIFN_DMACSR_C_CTRL_DIS | HIFN_DMACSR_S_CTRL_DIS | -+ HIFN_DMACSR_D_CTRL_DIS | HIFN_DMACSR_R_CTRL_DIS); -+ -+ return (r); -+} -+ -+/* -+ * Initialize the descriptor rings. -+ */ -+static void -+hifn_init_dma(struct hifn_softc *sc) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ hifn_set_retry(sc); -+ -+ /* initialize static pointer values */ -+ for (i = 0; i < HIFN_D_CMD_RSIZE; i++) -+ dma->cmdr[i].p = htole32(sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, command_bufs[i][0])); -+ for (i = 0; i < HIFN_D_RES_RSIZE; i++) -+ dma->resr[i].p = htole32(sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, result_bufs[i][0])); -+ -+ dma->cmdr[HIFN_D_CMD_RSIZE].p = -+ htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, cmdr[0])); -+ dma->srcr[HIFN_D_SRC_RSIZE].p = -+ htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, srcr[0])); -+ dma->dstr[HIFN_D_DST_RSIZE].p = -+ htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, dstr[0])); -+ dma->resr[HIFN_D_RES_RSIZE].p = -+ htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, resr[0])); -+ -+ dma->cmdu = dma->srcu = dma->dstu = dma->resu = 0; -+ dma->cmdi = dma->srci = dma->dsti = dma->resi = 0; -+ dma->cmdk = dma->srck = dma->dstk = dma->resk = 0; -+} -+ -+/* -+ * Writes out the raw command buffer space. Returns the -+ * command buffer size. -+ */ -+static u_int -+hifn_write_command(struct hifn_command *cmd, u_int8_t *buf) -+{ -+ struct hifn_softc *sc = NULL; -+ u_int8_t *buf_pos; -+ hifn_base_command_t *base_cmd; -+ hifn_mac_command_t *mac_cmd; -+ hifn_crypt_command_t *cry_cmd; -+ int using_mac, using_crypt, len, ivlen; -+ u_int32_t dlen, slen; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ buf_pos = buf; -+ using_mac = cmd->base_masks & HIFN_BASE_CMD_MAC; -+ using_crypt = cmd->base_masks & HIFN_BASE_CMD_CRYPT; -+ -+ base_cmd = (hifn_base_command_t *)buf_pos; -+ base_cmd->masks = htole16(cmd->base_masks); -+ slen = cmd->src_mapsize; -+ if (cmd->sloplen) -+ dlen = cmd->dst_mapsize - cmd->sloplen + sizeof(u_int32_t); -+ else -+ dlen = cmd->dst_mapsize; -+ base_cmd->total_source_count = htole16(slen & HIFN_BASE_CMD_LENMASK_LO); -+ base_cmd->total_dest_count = htole16(dlen & HIFN_BASE_CMD_LENMASK_LO); -+ dlen >>= 16; -+ slen >>= 16; -+ base_cmd->session_num = htole16( -+ ((slen << HIFN_BASE_CMD_SRCLEN_S) & HIFN_BASE_CMD_SRCLEN_M) | -+ ((dlen << HIFN_BASE_CMD_DSTLEN_S) & HIFN_BASE_CMD_DSTLEN_M)); -+ buf_pos += sizeof(hifn_base_command_t); -+ -+ if (using_mac) { -+ mac_cmd = (hifn_mac_command_t *)buf_pos; -+ dlen = cmd->maccrd->crd_len; -+ mac_cmd->source_count = htole16(dlen & 0xffff); -+ dlen >>= 16; -+ mac_cmd->masks = htole16(cmd->mac_masks | -+ ((dlen << HIFN_MAC_CMD_SRCLEN_S) & HIFN_MAC_CMD_SRCLEN_M)); -+ mac_cmd->header_skip = htole16(cmd->maccrd->crd_skip); -+ mac_cmd->reserved = 0; -+ buf_pos += sizeof(hifn_mac_command_t); -+ } -+ -+ if (using_crypt) { -+ cry_cmd = (hifn_crypt_command_t *)buf_pos; -+ dlen = cmd->enccrd->crd_len; -+ cry_cmd->source_count = htole16(dlen & 0xffff); -+ dlen >>= 16; -+ cry_cmd->masks = htole16(cmd->cry_masks | -+ ((dlen << HIFN_CRYPT_CMD_SRCLEN_S) & HIFN_CRYPT_CMD_SRCLEN_M)); -+ cry_cmd->header_skip = htole16(cmd->enccrd->crd_skip); -+ cry_cmd->reserved = 0; -+ buf_pos += sizeof(hifn_crypt_command_t); -+ } -+ -+ if (using_mac && cmd->mac_masks & HIFN_MAC_CMD_NEW_KEY) { -+ bcopy(cmd->mac, buf_pos, HIFN_MAC_KEY_LENGTH); -+ buf_pos += HIFN_MAC_KEY_LENGTH; -+ } -+ -+ if (using_crypt && cmd->cry_masks & HIFN_CRYPT_CMD_NEW_KEY) { -+ switch (cmd->cry_masks & HIFN_CRYPT_CMD_ALG_MASK) { -+ case HIFN_CRYPT_CMD_ALG_3DES: -+ bcopy(cmd->ck, buf_pos, HIFN_3DES_KEY_LENGTH); -+ buf_pos += HIFN_3DES_KEY_LENGTH; -+ break; -+ case HIFN_CRYPT_CMD_ALG_DES: -+ bcopy(cmd->ck, buf_pos, HIFN_DES_KEY_LENGTH); -+ buf_pos += HIFN_DES_KEY_LENGTH; -+ break; -+ case HIFN_CRYPT_CMD_ALG_RC4: -+ len = 256; -+ do { -+ int clen; -+ -+ clen = MIN(cmd->cklen, len); -+ bcopy(cmd->ck, buf_pos, clen); -+ len -= clen; -+ buf_pos += clen; -+ } while (len > 0); -+ bzero(buf_pos, 4); -+ buf_pos += 4; -+ break; -+ case HIFN_CRYPT_CMD_ALG_AES: -+ /* -+ * AES keys are variable 128, 192 and -+ * 256 bits (16, 24 and 32 bytes). -+ */ -+ bcopy(cmd->ck, buf_pos, cmd->cklen); -+ buf_pos += cmd->cklen; -+ break; -+ } -+ } -+ -+ if (using_crypt && cmd->cry_masks & HIFN_CRYPT_CMD_NEW_IV) { -+ switch (cmd->cry_masks & HIFN_CRYPT_CMD_ALG_MASK) { -+ case HIFN_CRYPT_CMD_ALG_AES: -+ ivlen = HIFN_AES_IV_LENGTH; -+ break; -+ default: -+ ivlen = HIFN_IV_LENGTH; -+ break; -+ } -+ bcopy(cmd->iv, buf_pos, ivlen); -+ buf_pos += ivlen; -+ } -+ -+ if ((cmd->base_masks & (HIFN_BASE_CMD_MAC|HIFN_BASE_CMD_CRYPT)) == 0) { -+ bzero(buf_pos, 8); -+ buf_pos += 8; -+ } -+ -+ return (buf_pos - buf); -+} -+ -+static int -+hifn_dmamap_aligned(struct hifn_operand *op) -+{ -+ struct hifn_softc *sc = NULL; -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ for (i = 0; i < op->nsegs; i++) { -+ if (op->segs[i].ds_addr & 3) -+ return (0); -+ if ((i != (op->nsegs - 1)) && (op->segs[i].ds_len & 3)) -+ return (0); -+ } -+ return (1); -+} -+ -+static __inline int -+hifn_dmamap_dstwrap(struct hifn_softc *sc, int idx) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ -+ if (++idx == HIFN_D_DST_RSIZE) { -+ dma->dstr[idx].l = htole32(HIFN_D_VALID | HIFN_D_JUMP | -+ HIFN_D_MASKDONEIRQ); -+ HIFN_DSTR_SYNC(sc, idx, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ idx = 0; -+ } -+ return (idx); -+} -+ -+static int -+hifn_dmamap_load_dst(struct hifn_softc *sc, struct hifn_command *cmd) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ struct hifn_operand *dst = &cmd->dst; -+ u_int32_t p, l; -+ int idx, used = 0, i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ idx = dma->dsti; -+ for (i = 0; i < dst->nsegs - 1; i++) { -+ dma->dstr[idx].p = htole32(dst->segs[i].ds_addr); -+ dma->dstr[idx].l = htole32(HIFN_D_MASKDONEIRQ | dst->segs[i].ds_len); -+ wmb(); -+ dma->dstr[idx].l |= htole32(HIFN_D_VALID); -+ HIFN_DSTR_SYNC(sc, idx, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ used++; -+ -+ idx = hifn_dmamap_dstwrap(sc, idx); -+ } -+ -+ if (cmd->sloplen == 0) { -+ p = dst->segs[i].ds_addr; -+ l = HIFN_D_MASKDONEIRQ | HIFN_D_LAST | -+ dst->segs[i].ds_len; -+ } else { -+ p = sc->sc_dma_physaddr + -+ offsetof(struct hifn_dma, slop[cmd->slopidx]); -+ l = HIFN_D_MASKDONEIRQ | HIFN_D_LAST | -+ sizeof(u_int32_t); -+ -+ if ((dst->segs[i].ds_len - cmd->sloplen) != 0) { -+ dma->dstr[idx].p = htole32(dst->segs[i].ds_addr); -+ dma->dstr[idx].l = htole32(HIFN_D_MASKDONEIRQ | -+ (dst->segs[i].ds_len - cmd->sloplen)); -+ wmb(); -+ dma->dstr[idx].l |= htole32(HIFN_D_VALID); -+ HIFN_DSTR_SYNC(sc, idx, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ used++; -+ -+ idx = hifn_dmamap_dstwrap(sc, idx); -+ } -+ } -+ dma->dstr[idx].p = htole32(p); -+ dma->dstr[idx].l = htole32(l); -+ wmb(); -+ dma->dstr[idx].l |= htole32(HIFN_D_VALID); -+ HIFN_DSTR_SYNC(sc, idx, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ used++; -+ -+ idx = hifn_dmamap_dstwrap(sc, idx); -+ -+ dma->dsti = idx; -+ dma->dstu += used; -+ return (idx); -+} -+ -+static __inline int -+hifn_dmamap_srcwrap(struct hifn_softc *sc, int idx) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ -+ if (++idx == HIFN_D_SRC_RSIZE) { -+ dma->srcr[idx].l = htole32(HIFN_D_VALID | -+ HIFN_D_JUMP | HIFN_D_MASKDONEIRQ); -+ HIFN_SRCR_SYNC(sc, HIFN_D_SRC_RSIZE, -+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); -+ idx = 0; -+ } -+ return (idx); -+} -+ -+static int -+hifn_dmamap_load_src(struct hifn_softc *sc, struct hifn_command *cmd) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ struct hifn_operand *src = &cmd->src; -+ int idx, i; -+ u_int32_t last = 0; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ idx = dma->srci; -+ for (i = 0; i < src->nsegs; i++) { -+ if (i == src->nsegs - 1) -+ last = HIFN_D_LAST; -+ -+ dma->srcr[idx].p = htole32(src->segs[i].ds_addr); -+ dma->srcr[idx].l = htole32(src->segs[i].ds_len | -+ HIFN_D_MASKDONEIRQ | last); -+ wmb(); -+ dma->srcr[idx].l |= htole32(HIFN_D_VALID); -+ HIFN_SRCR_SYNC(sc, idx, -+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); -+ -+ idx = hifn_dmamap_srcwrap(sc, idx); -+ } -+ dma->srci = idx; -+ dma->srcu += src->nsegs; -+ return (idx); -+} -+ -+ -+static int -+hifn_crypto( -+ struct hifn_softc *sc, -+ struct hifn_command *cmd, -+ struct cryptop *crp, -+ int hint) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ u_int32_t cmdlen, csr; -+ int cmdi, resi, err = 0; -+ unsigned long l_flags; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ /* -+ * need 1 cmd, and 1 res -+ * -+ * NB: check this first since it's easy. -+ */ -+ HIFN_LOCK(sc); -+ if ((dma->cmdu + 1) > HIFN_D_CMD_RSIZE || -+ (dma->resu + 1) > HIFN_D_RES_RSIZE) { -+#ifdef HIFN_DEBUG -+ if (hifn_debug) { -+ device_printf(sc->sc_dev, -+ "cmd/result exhaustion, cmdu %u resu %u\n", -+ dma->cmdu, dma->resu); -+ } -+#endif -+ hifnstats.hst_nomem_cr++; -+ sc->sc_needwakeup |= CRYPTO_SYMQ; -+ HIFN_UNLOCK(sc); -+ return (ERESTART); -+ } -+ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ if (pci_map_skb(sc, &cmd->src, cmd->src_skb)) { -+ hifnstats.hst_nomem_load++; -+ err = ENOMEM; -+ goto err_srcmap1; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ if (pci_map_uio(sc, &cmd->src, cmd->src_io)) { -+ hifnstats.hst_nomem_load++; -+ err = ENOMEM; -+ goto err_srcmap1; -+ } -+ } else { -+ if (pci_map_buf(sc, &cmd->src, cmd->src_buf, crp->crp_ilen)) { -+ hifnstats.hst_nomem_load++; -+ err = ENOMEM; -+ goto err_srcmap1; -+ } -+ } -+ -+ if (hifn_dmamap_aligned(&cmd->src)) { -+ cmd->sloplen = cmd->src_mapsize & 3; -+ cmd->dst = cmd->src; -+ } else { -+ if (crp->crp_flags & CRYPTO_F_IOV) { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ err = EINVAL; -+ goto err_srcmap; -+ } else if (crp->crp_flags & CRYPTO_F_SKBUF) { -+#ifdef NOTYET -+ int totlen, len; -+ struct mbuf *m, *m0, *mlast; -+ -+ KASSERT(cmd->dst_m == cmd->src_m, -+ ("hifn_crypto: dst_m initialized improperly")); -+ hifnstats.hst_unaligned++; -+ /* -+ * Source is not aligned on a longword boundary. -+ * Copy the data to insure alignment. If we fail -+ * to allocate mbufs or clusters while doing this -+ * we return ERESTART so the operation is requeued -+ * at the crypto later, but only if there are -+ * ops already posted to the hardware; otherwise we -+ * have no guarantee that we'll be re-entered. -+ */ -+ totlen = cmd->src_mapsize; -+ if (cmd->src_m->m_flags & M_PKTHDR) { -+ len = MHLEN; -+ MGETHDR(m0, M_DONTWAIT, MT_DATA); -+ if (m0 && !m_dup_pkthdr(m0, cmd->src_m, M_DONTWAIT)) { -+ m_free(m0); -+ m0 = NULL; -+ } -+ } else { -+ len = MLEN; -+ MGET(m0, M_DONTWAIT, MT_DATA); -+ } -+ if (m0 == NULL) { -+ hifnstats.hst_nomem_mbuf++; -+ err = dma->cmdu ? ERESTART : ENOMEM; -+ goto err_srcmap; -+ } -+ if (totlen >= MINCLSIZE) { -+ MCLGET(m0, M_DONTWAIT); -+ if ((m0->m_flags & M_EXT) == 0) { -+ hifnstats.hst_nomem_mcl++; -+ err = dma->cmdu ? ERESTART : ENOMEM; -+ m_freem(m0); -+ goto err_srcmap; -+ } -+ len = MCLBYTES; -+ } -+ totlen -= len; -+ m0->m_pkthdr.len = m0->m_len = len; -+ mlast = m0; -+ -+ while (totlen > 0) { -+ MGET(m, M_DONTWAIT, MT_DATA); -+ if (m == NULL) { -+ hifnstats.hst_nomem_mbuf++; -+ err = dma->cmdu ? ERESTART : ENOMEM; -+ m_freem(m0); -+ goto err_srcmap; -+ } -+ len = MLEN; -+ if (totlen >= MINCLSIZE) { -+ MCLGET(m, M_DONTWAIT); -+ if ((m->m_flags & M_EXT) == 0) { -+ hifnstats.hst_nomem_mcl++; -+ err = dma->cmdu ? ERESTART : ENOMEM; -+ mlast->m_next = m; -+ m_freem(m0); -+ goto err_srcmap; -+ } -+ len = MCLBYTES; -+ } -+ -+ m->m_len = len; -+ m0->m_pkthdr.len += len; -+ totlen -= len; -+ -+ mlast->m_next = m; -+ mlast = m; -+ } -+ cmd->dst_m = m0; -+#else -+ device_printf(sc->sc_dev, -+ "%s,%d: CRYPTO_F_SKBUF unaligned not implemented\n", -+ __FILE__, __LINE__); -+ err = EINVAL; -+ goto err_srcmap; -+#endif -+ } else { -+ device_printf(sc->sc_dev, -+ "%s,%d: unaligned contig buffers not implemented\n", -+ __FILE__, __LINE__); -+ err = EINVAL; -+ goto err_srcmap; -+ } -+ } -+ -+ if (cmd->dst_map == NULL) { -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ if (pci_map_skb(sc, &cmd->dst, cmd->dst_skb)) { -+ hifnstats.hst_nomem_map++; -+ err = ENOMEM; -+ goto err_dstmap1; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ if (pci_map_uio(sc, &cmd->dst, cmd->dst_io)) { -+ hifnstats.hst_nomem_load++; -+ err = ENOMEM; -+ goto err_dstmap1; -+ } -+ } else { -+ if (pci_map_buf(sc, &cmd->dst, cmd->dst_buf, crp->crp_ilen)) { -+ hifnstats.hst_nomem_load++; -+ err = ENOMEM; -+ goto err_dstmap1; -+ } -+ } -+ } -+ -+#ifdef HIFN_DEBUG -+ if (hifn_debug) { -+ device_printf(sc->sc_dev, -+ "Entering cmd: stat %8x ien %8x u %d/%d/%d/%d n %d/%d\n", -+ READ_REG_1(sc, HIFN_1_DMA_CSR), -+ READ_REG_1(sc, HIFN_1_DMA_IER), -+ dma->cmdu, dma->srcu, dma->dstu, dma->resu, -+ cmd->src_nsegs, cmd->dst_nsegs); -+ } -+#endif -+ -+#if 0 -+ if (cmd->src_map == cmd->dst_map) { -+ bus_dmamap_sync(sc->sc_dmat, cmd->src_map, -+ BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); -+ } else { -+ bus_dmamap_sync(sc->sc_dmat, cmd->src_map, -+ BUS_DMASYNC_PREWRITE); -+ bus_dmamap_sync(sc->sc_dmat, cmd->dst_map, -+ BUS_DMASYNC_PREREAD); -+ } -+#endif -+ -+ /* -+ * need N src, and N dst -+ */ -+ if ((dma->srcu + cmd->src_nsegs) > HIFN_D_SRC_RSIZE || -+ (dma->dstu + cmd->dst_nsegs + 1) > HIFN_D_DST_RSIZE) { -+#ifdef HIFN_DEBUG -+ if (hifn_debug) { -+ device_printf(sc->sc_dev, -+ "src/dst exhaustion, srcu %u+%u dstu %u+%u\n", -+ dma->srcu, cmd->src_nsegs, -+ dma->dstu, cmd->dst_nsegs); -+ } -+#endif -+ hifnstats.hst_nomem_sd++; -+ err = ERESTART; -+ goto err_dstmap; -+ } -+ -+ if (dma->cmdi == HIFN_D_CMD_RSIZE) { -+ dma->cmdi = 0; -+ dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ); -+ wmb(); -+ dma->cmdr[HIFN_D_CMD_RSIZE].l |= htole32(HIFN_D_VALID); -+ HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE, -+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); -+ } -+ cmdi = dma->cmdi++; -+ cmdlen = hifn_write_command(cmd, dma->command_bufs[cmdi]); -+ HIFN_CMD_SYNC(sc, cmdi, BUS_DMASYNC_PREWRITE); -+ -+ /* .p for command/result already set */ -+ dma->cmdr[cmdi].l = htole32(cmdlen | HIFN_D_LAST | -+ HIFN_D_MASKDONEIRQ); -+ wmb(); -+ dma->cmdr[cmdi].l |= htole32(HIFN_D_VALID); -+ HIFN_CMDR_SYNC(sc, cmdi, -+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); -+ dma->cmdu++; -+ -+ /* -+ * We don't worry about missing an interrupt (which a "command wait" -+ * interrupt salvages us from), unless there is more than one command -+ * in the queue. -+ */ -+ if (dma->cmdu > 1) { -+ sc->sc_dmaier |= HIFN_DMAIER_C_WAIT; -+ WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); -+ } -+ -+ hifnstats.hst_ipackets++; -+ hifnstats.hst_ibytes += cmd->src_mapsize; -+ -+ hifn_dmamap_load_src(sc, cmd); -+ -+ /* -+ * Unlike other descriptors, we don't mask done interrupt from -+ * result descriptor. -+ */ -+#ifdef HIFN_DEBUG -+ if (hifn_debug) -+ device_printf(sc->sc_dev, "load res\n"); -+#endif -+ if (dma->resi == HIFN_D_RES_RSIZE) { -+ dma->resi = 0; -+ dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ); -+ wmb(); -+ dma->resr[HIFN_D_RES_RSIZE].l |= htole32(HIFN_D_VALID); -+ HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ } -+ resi = dma->resi++; -+ KASSERT(dma->hifn_commands[resi] == NULL, -+ ("hifn_crypto: command slot %u busy", resi)); -+ dma->hifn_commands[resi] = cmd; -+ HIFN_RES_SYNC(sc, resi, BUS_DMASYNC_PREREAD); -+ if ((hint & CRYPTO_HINT_MORE) && sc->sc_curbatch < hifn_maxbatch) { -+ dma->resr[resi].l = htole32(HIFN_MAX_RESULT | -+ HIFN_D_LAST | HIFN_D_MASKDONEIRQ); -+ wmb(); -+ dma->resr[resi].l |= htole32(HIFN_D_VALID); -+ sc->sc_curbatch++; -+ if (sc->sc_curbatch > hifnstats.hst_maxbatch) -+ hifnstats.hst_maxbatch = sc->sc_curbatch; -+ hifnstats.hst_totbatch++; -+ } else { -+ dma->resr[resi].l = htole32(HIFN_MAX_RESULT | HIFN_D_LAST); -+ wmb(); -+ dma->resr[resi].l |= htole32(HIFN_D_VALID); -+ sc->sc_curbatch = 0; -+ } -+ HIFN_RESR_SYNC(sc, resi, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ dma->resu++; -+ -+ if (cmd->sloplen) -+ cmd->slopidx = resi; -+ -+ hifn_dmamap_load_dst(sc, cmd); -+ -+ csr = 0; -+ if (sc->sc_c_busy == 0) { -+ csr |= HIFN_DMACSR_C_CTRL_ENA; -+ sc->sc_c_busy = 1; -+ } -+ if (sc->sc_s_busy == 0) { -+ csr |= HIFN_DMACSR_S_CTRL_ENA; -+ sc->sc_s_busy = 1; -+ } -+ if (sc->sc_r_busy == 0) { -+ csr |= HIFN_DMACSR_R_CTRL_ENA; -+ sc->sc_r_busy = 1; -+ } -+ if (sc->sc_d_busy == 0) { -+ csr |= HIFN_DMACSR_D_CTRL_ENA; -+ sc->sc_d_busy = 1; -+ } -+ if (csr) -+ WRITE_REG_1(sc, HIFN_1_DMA_CSR, csr); -+ -+#ifdef HIFN_DEBUG -+ if (hifn_debug) { -+ device_printf(sc->sc_dev, "command: stat %8x ier %8x\n", -+ READ_REG_1(sc, HIFN_1_DMA_CSR), -+ READ_REG_1(sc, HIFN_1_DMA_IER)); -+ } -+#endif -+ -+ sc->sc_active = 5; -+ HIFN_UNLOCK(sc); -+ KASSERT(err == 0, ("hifn_crypto: success with error %u", err)); -+ return (err); /* success */ -+ -+err_dstmap: -+ if (cmd->src_map != cmd->dst_map) -+ pci_unmap_buf(sc, &cmd->dst); -+err_dstmap1: -+err_srcmap: -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ if (cmd->src_skb != cmd->dst_skb) -+#ifdef NOTYET -+ m_freem(cmd->dst_m); -+#else -+ device_printf(sc->sc_dev, -+ "%s,%d: CRYPTO_F_SKBUF src != dst not implemented\n", -+ __FILE__, __LINE__); -+#endif -+ } -+ pci_unmap_buf(sc, &cmd->src); -+err_srcmap1: -+ HIFN_UNLOCK(sc); -+ return (err); -+} -+ -+static void -+hifn_tick(unsigned long arg) -+{ -+ struct hifn_softc *sc; -+ unsigned long l_flags; -+ -+ if (arg >= HIFN_MAX_CHIPS) -+ return; -+ sc = hifn_chip_idx[arg]; -+ if (!sc) -+ return; -+ -+ HIFN_LOCK(sc); -+ if (sc->sc_active == 0) { -+ struct hifn_dma *dma = sc->sc_dma; -+ u_int32_t r = 0; -+ -+ if (dma->cmdu == 0 && sc->sc_c_busy) { -+ sc->sc_c_busy = 0; -+ r |= HIFN_DMACSR_C_CTRL_DIS; -+ } -+ if (dma->srcu == 0 && sc->sc_s_busy) { -+ sc->sc_s_busy = 0; -+ r |= HIFN_DMACSR_S_CTRL_DIS; -+ } -+ if (dma->dstu == 0 && sc->sc_d_busy) { -+ sc->sc_d_busy = 0; -+ r |= HIFN_DMACSR_D_CTRL_DIS; -+ } -+ if (dma->resu == 0 && sc->sc_r_busy) { -+ sc->sc_r_busy = 0; -+ r |= HIFN_DMACSR_R_CTRL_DIS; -+ } -+ if (r) -+ WRITE_REG_1(sc, HIFN_1_DMA_CSR, r); -+ } else -+ sc->sc_active--; -+ HIFN_UNLOCK(sc); -+ mod_timer(&sc->sc_tickto, jiffies + HZ); -+} -+ -+static irqreturn_t -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19) -+hifn_intr(int irq, void *arg) -+#else -+hifn_intr(int irq, void *arg, struct pt_regs *regs) -+#endif -+{ -+ struct hifn_softc *sc = arg; -+ struct hifn_dma *dma; -+ u_int32_t dmacsr, restart; -+ int i, u; -+ unsigned long l_flags; -+ -+ dmacsr = READ_REG_1(sc, HIFN_1_DMA_CSR); -+ -+ /* Nothing in the DMA unit interrupted */ -+ if ((dmacsr & sc->sc_dmaier) == 0) -+ return IRQ_NONE; -+ -+ HIFN_LOCK(sc); -+ -+ dma = sc->sc_dma; -+ -+#ifdef HIFN_DEBUG -+ if (hifn_debug) { -+ device_printf(sc->sc_dev, -+ "irq: stat %08x ien %08x damier %08x i %d/%d/%d/%d k %d/%d/%d/%d u %d/%d/%d/%d\n", -+ dmacsr, READ_REG_1(sc, HIFN_1_DMA_IER), sc->sc_dmaier, -+ dma->cmdi, dma->srci, dma->dsti, dma->resi, -+ dma->cmdk, dma->srck, dma->dstk, dma->resk, -+ dma->cmdu, dma->srcu, dma->dstu, dma->resu); -+ } -+#endif -+ -+ WRITE_REG_1(sc, HIFN_1_DMA_CSR, dmacsr & sc->sc_dmaier); -+ -+ if ((sc->sc_flags & HIFN_HAS_PUBLIC) && -+ (dmacsr & HIFN_DMACSR_PUBDONE)) -+ WRITE_REG_1(sc, HIFN_1_PUB_STATUS, -+ READ_REG_1(sc, HIFN_1_PUB_STATUS) | HIFN_PUBSTS_DONE); -+ -+ restart = dmacsr & (HIFN_DMACSR_D_OVER | HIFN_DMACSR_R_OVER); -+ if (restart) -+ device_printf(sc->sc_dev, "overrun %x\n", dmacsr); -+ -+ if (sc->sc_flags & HIFN_IS_7811) { -+ if (dmacsr & HIFN_DMACSR_ILLR) -+ device_printf(sc->sc_dev, "illegal read\n"); -+ if (dmacsr & HIFN_DMACSR_ILLW) -+ device_printf(sc->sc_dev, "illegal write\n"); -+ } -+ -+ restart = dmacsr & (HIFN_DMACSR_C_ABORT | HIFN_DMACSR_S_ABORT | -+ HIFN_DMACSR_D_ABORT | HIFN_DMACSR_R_ABORT); -+ if (restart) { -+ device_printf(sc->sc_dev, "abort, resetting.\n"); -+ hifnstats.hst_abort++; -+ hifn_abort(sc); -+ HIFN_UNLOCK(sc); -+ return IRQ_HANDLED; -+ } -+ -+ if ((dmacsr & HIFN_DMACSR_C_WAIT) && (dma->cmdu == 0)) { -+ /* -+ * If no slots to process and we receive a "waiting on -+ * command" interrupt, we disable the "waiting on command" -+ * (by clearing it). -+ */ -+ sc->sc_dmaier &= ~HIFN_DMAIER_C_WAIT; -+ WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier); -+ } -+ -+ /* clear the rings */ -+ i = dma->resk; u = dma->resu; -+ while (u != 0) { -+ HIFN_RESR_SYNC(sc, i, -+ BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); -+ if (dma->resr[i].l & htole32(HIFN_D_VALID)) { -+ HIFN_RESR_SYNC(sc, i, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ break; -+ } -+ -+ if (i != HIFN_D_RES_RSIZE) { -+ struct hifn_command *cmd; -+ u_int8_t *macbuf = NULL; -+ -+ HIFN_RES_SYNC(sc, i, BUS_DMASYNC_POSTREAD); -+ cmd = dma->hifn_commands[i]; -+ KASSERT(cmd != NULL, -+ ("hifn_intr: null command slot %u", i)); -+ dma->hifn_commands[i] = NULL; -+ -+ if (cmd->base_masks & HIFN_BASE_CMD_MAC) { -+ macbuf = dma->result_bufs[i]; -+ macbuf += 12; -+ } -+ -+ hifn_callback(sc, cmd, macbuf); -+ hifnstats.hst_opackets++; -+ u--; -+ } -+ -+ if (++i == (HIFN_D_RES_RSIZE + 1)) -+ i = 0; -+ } -+ dma->resk = i; dma->resu = u; -+ -+ i = dma->srck; u = dma->srcu; -+ while (u != 0) { -+ if (i == HIFN_D_SRC_RSIZE) -+ i = 0; -+ HIFN_SRCR_SYNC(sc, i, -+ BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); -+ if (dma->srcr[i].l & htole32(HIFN_D_VALID)) { -+ HIFN_SRCR_SYNC(sc, i, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ break; -+ } -+ i++, u--; -+ } -+ dma->srck = i; dma->srcu = u; -+ -+ i = dma->cmdk; u = dma->cmdu; -+ while (u != 0) { -+ HIFN_CMDR_SYNC(sc, i, -+ BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); -+ if (dma->cmdr[i].l & htole32(HIFN_D_VALID)) { -+ HIFN_CMDR_SYNC(sc, i, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+ break; -+ } -+ if (i != HIFN_D_CMD_RSIZE) { -+ u--; -+ HIFN_CMD_SYNC(sc, i, BUS_DMASYNC_POSTWRITE); -+ } -+ if (++i == (HIFN_D_CMD_RSIZE + 1)) -+ i = 0; -+ } -+ dma->cmdk = i; dma->cmdu = u; -+ -+ HIFN_UNLOCK(sc); -+ -+ if (sc->sc_needwakeup) { /* XXX check high watermark */ -+ int wakeup = sc->sc_needwakeup & (CRYPTO_SYMQ|CRYPTO_ASYMQ); -+#ifdef HIFN_DEBUG -+ if (hifn_debug) -+ device_printf(sc->sc_dev, -+ "wakeup crypto (%x) u %d/%d/%d/%d\n", -+ sc->sc_needwakeup, -+ dma->cmdu, dma->srcu, dma->dstu, dma->resu); -+#endif -+ sc->sc_needwakeup &= ~wakeup; -+ crypto_unblock(sc->sc_cid, wakeup); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+/* -+ * Allocate a new 'session' and return an encoded session id. 'sidp' -+ * contains our registration id, and should contain an encoded session -+ * id on successful allocation. -+ */ -+static int -+hifn_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri) -+{ -+ struct hifn_softc *sc = device_get_softc(dev); -+ struct cryptoini *c; -+ int mac = 0, cry = 0, sesn; -+ struct hifn_session *ses = NULL; -+ unsigned long l_flags; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ KASSERT(sc != NULL, ("hifn_newsession: null softc")); -+ if (sidp == NULL || cri == NULL || sc == NULL) { -+ DPRINTF("%s,%d: %s - EINVAL\n", __FILE__, __LINE__, __FUNCTION__); -+ return (EINVAL); -+ } -+ -+ HIFN_LOCK(sc); -+ if (sc->sc_sessions == NULL) { -+ ses = sc->sc_sessions = (struct hifn_session *)kmalloc(sizeof(*ses), -+ SLAB_ATOMIC); -+ if (ses == NULL) { -+ HIFN_UNLOCK(sc); -+ return (ENOMEM); -+ } -+ sesn = 0; -+ sc->sc_nsessions = 1; -+ } else { -+ for (sesn = 0; sesn < sc->sc_nsessions; sesn++) { -+ if (!sc->sc_sessions[sesn].hs_used) { -+ ses = &sc->sc_sessions[sesn]; -+ break; -+ } -+ } -+ -+ if (ses == NULL) { -+ sesn = sc->sc_nsessions; -+ ses = (struct hifn_session *)kmalloc((sesn + 1) * sizeof(*ses), -+ SLAB_ATOMIC); -+ if (ses == NULL) { -+ HIFN_UNLOCK(sc); -+ return (ENOMEM); -+ } -+ bcopy(sc->sc_sessions, ses, sesn * sizeof(*ses)); -+ bzero(sc->sc_sessions, sesn * sizeof(*ses)); -+ kfree(sc->sc_sessions); -+ sc->sc_sessions = ses; -+ ses = &sc->sc_sessions[sesn]; -+ sc->sc_nsessions++; -+ } -+ } -+ HIFN_UNLOCK(sc); -+ -+ bzero(ses, sizeof(*ses)); -+ ses->hs_used = 1; -+ -+ for (c = cri; c != NULL; c = c->cri_next) { -+ switch (c->cri_alg) { -+ case CRYPTO_MD5: -+ case CRYPTO_SHA1: -+ case CRYPTO_MD5_HMAC: -+ case CRYPTO_SHA1_HMAC: -+ if (mac) { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ return (EINVAL); -+ } -+ mac = 1; -+ ses->hs_mlen = c->cri_mlen; -+ if (ses->hs_mlen == 0) { -+ switch (c->cri_alg) { -+ case CRYPTO_MD5: -+ case CRYPTO_MD5_HMAC: -+ ses->hs_mlen = 16; -+ break; -+ case CRYPTO_SHA1: -+ case CRYPTO_SHA1_HMAC: -+ ses->hs_mlen = 20; -+ break; -+ } -+ } -+ break; -+ case CRYPTO_DES_CBC: -+ case CRYPTO_3DES_CBC: -+ case CRYPTO_AES_CBC: -+ /* XXX this may read fewer, does it matter? */ -+ read_random(ses->hs_iv, -+ c->cri_alg == CRYPTO_AES_CBC ? -+ HIFN_AES_IV_LENGTH : HIFN_IV_LENGTH); -+ /*FALLTHROUGH*/ -+ case CRYPTO_ARC4: -+ if (cry) { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ return (EINVAL); -+ } -+ cry = 1; -+ break; -+ default: -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ return (EINVAL); -+ } -+ } -+ if (mac == 0 && cry == 0) { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ return (EINVAL); -+ } -+ -+ *sidp = HIFN_SID(device_get_unit(sc->sc_dev), sesn); -+ -+ return (0); -+} -+ -+/* -+ * Deallocate a session. -+ * XXX this routine should run a zero'd mac/encrypt key into context ram. -+ * XXX to blow away any keys already stored there. -+ */ -+static int -+hifn_freesession(device_t dev, u_int64_t tid) -+{ -+ struct hifn_softc *sc = device_get_softc(dev); -+ int session, error; -+ u_int32_t sid = CRYPTO_SESID2LID(tid); -+ unsigned long l_flags; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ KASSERT(sc != NULL, ("hifn_freesession: null softc")); -+ if (sc == NULL) { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ return (EINVAL); -+ } -+ -+ HIFN_LOCK(sc); -+ session = HIFN_SESSION(sid); -+ if (session < sc->sc_nsessions) { -+ bzero(&sc->sc_sessions[session], sizeof(struct hifn_session)); -+ error = 0; -+ } else { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ error = EINVAL; -+ } -+ HIFN_UNLOCK(sc); -+ -+ return (error); -+} -+ -+static int -+hifn_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ struct hifn_softc *sc = device_get_softc(dev); -+ struct hifn_command *cmd = NULL; -+ int session, err, ivlen; -+ struct cryptodesc *crd1, *crd2, *maccrd, *enccrd; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (crp == NULL || crp->crp_callback == NULL) { -+ hifnstats.hst_invalid++; -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ return (EINVAL); -+ } -+ session = HIFN_SESSION(crp->crp_sid); -+ -+ if (sc == NULL || session >= sc->sc_nsessions) { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ err = EINVAL; -+ goto errout; -+ } -+ -+ cmd = kmalloc(sizeof(struct hifn_command), SLAB_ATOMIC); -+ if (cmd == NULL) { -+ hifnstats.hst_nomem++; -+ err = ENOMEM; -+ goto errout; -+ } -+ memset(cmd, 0, sizeof(*cmd)); -+ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ cmd->src_skb = (struct sk_buff *)crp->crp_buf; -+ cmd->dst_skb = (struct sk_buff *)crp->crp_buf; -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ cmd->src_io = (struct uio *)crp->crp_buf; -+ cmd->dst_io = (struct uio *)crp->crp_buf; -+ } else { -+ cmd->src_buf = crp->crp_buf; -+ cmd->dst_buf = crp->crp_buf; -+ } -+ -+ crd1 = crp->crp_desc; -+ if (crd1 == NULL) { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ err = EINVAL; -+ goto errout; -+ } -+ crd2 = crd1->crd_next; -+ -+ if (crd2 == NULL) { -+ if (crd1->crd_alg == CRYPTO_MD5_HMAC || -+ crd1->crd_alg == CRYPTO_SHA1_HMAC || -+ crd1->crd_alg == CRYPTO_SHA1 || -+ crd1->crd_alg == CRYPTO_MD5) { -+ maccrd = crd1; -+ enccrd = NULL; -+ } else if (crd1->crd_alg == CRYPTO_DES_CBC || -+ crd1->crd_alg == CRYPTO_3DES_CBC || -+ crd1->crd_alg == CRYPTO_AES_CBC || -+ crd1->crd_alg == CRYPTO_ARC4) { -+ if ((crd1->crd_flags & CRD_F_ENCRYPT) == 0) -+ cmd->base_masks |= HIFN_BASE_CMD_DECODE; -+ maccrd = NULL; -+ enccrd = crd1; -+ } else { -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ err = EINVAL; -+ goto errout; -+ } -+ } else { -+ if ((crd1->crd_alg == CRYPTO_MD5_HMAC || -+ crd1->crd_alg == CRYPTO_SHA1_HMAC || -+ crd1->crd_alg == CRYPTO_MD5 || -+ crd1->crd_alg == CRYPTO_SHA1) && -+ (crd2->crd_alg == CRYPTO_DES_CBC || -+ crd2->crd_alg == CRYPTO_3DES_CBC || -+ crd2->crd_alg == CRYPTO_AES_CBC || -+ crd2->crd_alg == CRYPTO_ARC4) && -+ ((crd2->crd_flags & CRD_F_ENCRYPT) == 0)) { -+ cmd->base_masks = HIFN_BASE_CMD_DECODE; -+ maccrd = crd1; -+ enccrd = crd2; -+ } else if ((crd1->crd_alg == CRYPTO_DES_CBC || -+ crd1->crd_alg == CRYPTO_ARC4 || -+ crd1->crd_alg == CRYPTO_3DES_CBC || -+ crd1->crd_alg == CRYPTO_AES_CBC) && -+ (crd2->crd_alg == CRYPTO_MD5_HMAC || -+ crd2->crd_alg == CRYPTO_SHA1_HMAC || -+ crd2->crd_alg == CRYPTO_MD5 || -+ crd2->crd_alg == CRYPTO_SHA1) && -+ (crd1->crd_flags & CRD_F_ENCRYPT)) { -+ enccrd = crd1; -+ maccrd = crd2; -+ } else { -+ /* -+ * We cannot order the 7751 as requested -+ */ -+ DPRINTF("%s,%d: %s %d,%d,%d - EINVAL\n",__FILE__,__LINE__,__FUNCTION__, crd1->crd_alg, crd2->crd_alg, crd1->crd_flags & CRD_F_ENCRYPT); -+ err = EINVAL; -+ goto errout; -+ } -+ } -+ -+ if (enccrd) { -+ cmd->enccrd = enccrd; -+ cmd->base_masks |= HIFN_BASE_CMD_CRYPT; -+ switch (enccrd->crd_alg) { -+ case CRYPTO_ARC4: -+ cmd->cry_masks |= HIFN_CRYPT_CMD_ALG_RC4; -+ break; -+ case CRYPTO_DES_CBC: -+ cmd->cry_masks |= HIFN_CRYPT_CMD_ALG_DES | -+ HIFN_CRYPT_CMD_MODE_CBC | -+ HIFN_CRYPT_CMD_NEW_IV; -+ break; -+ case CRYPTO_3DES_CBC: -+ cmd->cry_masks |= HIFN_CRYPT_CMD_ALG_3DES | -+ HIFN_CRYPT_CMD_MODE_CBC | -+ HIFN_CRYPT_CMD_NEW_IV; -+ break; -+ case CRYPTO_AES_CBC: -+ cmd->cry_masks |= HIFN_CRYPT_CMD_ALG_AES | -+ HIFN_CRYPT_CMD_MODE_CBC | -+ HIFN_CRYPT_CMD_NEW_IV; -+ break; -+ default: -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ err = EINVAL; -+ goto errout; -+ } -+ if (enccrd->crd_alg != CRYPTO_ARC4) { -+ ivlen = ((enccrd->crd_alg == CRYPTO_AES_CBC) ? -+ HIFN_AES_IV_LENGTH : HIFN_IV_LENGTH); -+ if (enccrd->crd_flags & CRD_F_ENCRYPT) { -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) -+ bcopy(enccrd->crd_iv, cmd->iv, ivlen); -+ else -+ bcopy(sc->sc_sessions[session].hs_iv, -+ cmd->iv, ivlen); -+ -+ if ((enccrd->crd_flags & CRD_F_IV_PRESENT) -+ == 0) { -+ crypto_copyback(crp->crp_flags, -+ crp->crp_buf, enccrd->crd_inject, -+ ivlen, cmd->iv); -+ } -+ } else { -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) -+ bcopy(enccrd->crd_iv, cmd->iv, ivlen); -+ else { -+ crypto_copydata(crp->crp_flags, -+ crp->crp_buf, enccrd->crd_inject, -+ ivlen, cmd->iv); -+ } -+ } -+ } -+ -+ if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) -+ cmd->cry_masks |= HIFN_CRYPT_CMD_NEW_KEY; -+ cmd->ck = enccrd->crd_key; -+ cmd->cklen = enccrd->crd_klen >> 3; -+ cmd->cry_masks |= HIFN_CRYPT_CMD_NEW_KEY; -+ -+ /* -+ * Need to specify the size for the AES key in the masks. -+ */ -+ if ((cmd->cry_masks & HIFN_CRYPT_CMD_ALG_MASK) == -+ HIFN_CRYPT_CMD_ALG_AES) { -+ switch (cmd->cklen) { -+ case 16: -+ cmd->cry_masks |= HIFN_CRYPT_CMD_KSZ_128; -+ break; -+ case 24: -+ cmd->cry_masks |= HIFN_CRYPT_CMD_KSZ_192; -+ break; -+ case 32: -+ cmd->cry_masks |= HIFN_CRYPT_CMD_KSZ_256; -+ break; -+ default: -+ DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__); -+ err = EINVAL; -+ goto errout; -+ } -+ } -+ } -+ -+ if (maccrd) { -+ cmd->maccrd = maccrd; -+ cmd->base_masks |= HIFN_BASE_CMD_MAC; -+ -+ switch (maccrd->crd_alg) { -+ case CRYPTO_MD5: -+ cmd->mac_masks |= HIFN_MAC_CMD_ALG_MD5 | -+ HIFN_MAC_CMD_RESULT | HIFN_MAC_CMD_MODE_HASH | -+ HIFN_MAC_CMD_POS_IPSEC; -+ break; -+ case CRYPTO_MD5_HMAC: -+ cmd->mac_masks |= HIFN_MAC_CMD_ALG_MD5 | -+ HIFN_MAC_CMD_RESULT | HIFN_MAC_CMD_MODE_HMAC | -+ HIFN_MAC_CMD_POS_IPSEC | HIFN_MAC_CMD_TRUNC; -+ break; -+ case CRYPTO_SHA1: -+ cmd->mac_masks |= HIFN_MAC_CMD_ALG_SHA1 | -+ HIFN_MAC_CMD_RESULT | HIFN_MAC_CMD_MODE_HASH | -+ HIFN_MAC_CMD_POS_IPSEC; -+ break; -+ case CRYPTO_SHA1_HMAC: -+ cmd->mac_masks |= HIFN_MAC_CMD_ALG_SHA1 | -+ HIFN_MAC_CMD_RESULT | HIFN_MAC_CMD_MODE_HMAC | -+ HIFN_MAC_CMD_POS_IPSEC | HIFN_MAC_CMD_TRUNC; -+ break; -+ } -+ -+ if (maccrd->crd_alg == CRYPTO_SHA1_HMAC || -+ maccrd->crd_alg == CRYPTO_MD5_HMAC) { -+ cmd->mac_masks |= HIFN_MAC_CMD_NEW_KEY; -+ bcopy(maccrd->crd_key, cmd->mac, maccrd->crd_klen >> 3); -+ bzero(cmd->mac + (maccrd->crd_klen >> 3), -+ HIFN_MAC_KEY_LENGTH - (maccrd->crd_klen >> 3)); -+ } -+ } -+ -+ cmd->crp = crp; -+ cmd->session_num = session; -+ cmd->softc = sc; -+ -+ err = hifn_crypto(sc, cmd, crp, hint); -+ if (!err) { -+ return 0; -+ } else if (err == ERESTART) { -+ /* -+ * There weren't enough resources to dispatch the request -+ * to the part. Notify the caller so they'll requeue this -+ * request and resubmit it again soon. -+ */ -+#ifdef HIFN_DEBUG -+ if (hifn_debug) -+ device_printf(sc->sc_dev, "requeue request\n"); -+#endif -+ kfree(cmd); -+ sc->sc_needwakeup |= CRYPTO_SYMQ; -+ return (err); -+ } -+ -+errout: -+ if (cmd != NULL) -+ kfree(cmd); -+ if (err == EINVAL) -+ hifnstats.hst_invalid++; -+ else -+ hifnstats.hst_nomem++; -+ crp->crp_etype = err; -+ crypto_done(crp); -+ return (err); -+} -+ -+static void -+hifn_abort(struct hifn_softc *sc) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ struct hifn_command *cmd; -+ struct cryptop *crp; -+ int i, u; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ i = dma->resk; u = dma->resu; -+ while (u != 0) { -+ cmd = dma->hifn_commands[i]; -+ KASSERT(cmd != NULL, ("hifn_abort: null command slot %u", i)); -+ dma->hifn_commands[i] = NULL; -+ crp = cmd->crp; -+ -+ if ((dma->resr[i].l & htole32(HIFN_D_VALID)) == 0) { -+ /* Salvage what we can. */ -+ u_int8_t *macbuf; -+ -+ if (cmd->base_masks & HIFN_BASE_CMD_MAC) { -+ macbuf = dma->result_bufs[i]; -+ macbuf += 12; -+ } else -+ macbuf = NULL; -+ hifnstats.hst_opackets++; -+ hifn_callback(sc, cmd, macbuf); -+ } else { -+#if 0 -+ if (cmd->src_map == cmd->dst_map) { -+ bus_dmamap_sync(sc->sc_dmat, cmd->src_map, -+ BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); -+ } else { -+ bus_dmamap_sync(sc->sc_dmat, cmd->src_map, -+ BUS_DMASYNC_POSTWRITE); -+ bus_dmamap_sync(sc->sc_dmat, cmd->dst_map, -+ BUS_DMASYNC_POSTREAD); -+ } -+#endif -+ -+ if (cmd->src_skb != cmd->dst_skb) { -+#ifdef NOTYET -+ m_freem(cmd->src_m); -+ crp->crp_buf = (caddr_t)cmd->dst_m; -+#else -+ device_printf(sc->sc_dev, -+ "%s,%d: CRYPTO_F_SKBUF src != dst not implemented\n", -+ __FILE__, __LINE__); -+#endif -+ } -+ -+ /* non-shared buffers cannot be restarted */ -+ if (cmd->src_map != cmd->dst_map) { -+ /* -+ * XXX should be EAGAIN, delayed until -+ * after the reset. -+ */ -+ crp->crp_etype = ENOMEM; -+ pci_unmap_buf(sc, &cmd->dst); -+ } else -+ crp->crp_etype = ENOMEM; -+ -+ pci_unmap_buf(sc, &cmd->src); -+ -+ kfree(cmd); -+ if (crp->crp_etype != EAGAIN) -+ crypto_done(crp); -+ } -+ -+ if (++i == HIFN_D_RES_RSIZE) -+ i = 0; -+ u--; -+ } -+ dma->resk = i; dma->resu = u; -+ -+ hifn_reset_board(sc, 1); -+ hifn_init_dma(sc); -+ hifn_init_pci_registers(sc); -+} -+ -+static void -+hifn_callback(struct hifn_softc *sc, struct hifn_command *cmd, u_int8_t *macbuf) -+{ -+ struct hifn_dma *dma = sc->sc_dma; -+ struct cryptop *crp = cmd->crp; -+ struct cryptodesc *crd; -+ int i, u, ivlen; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+#if 0 -+ if (cmd->src_map == cmd->dst_map) { -+ bus_dmamap_sync(sc->sc_dmat, cmd->src_map, -+ BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); -+ } else { -+ bus_dmamap_sync(sc->sc_dmat, cmd->src_map, -+ BUS_DMASYNC_POSTWRITE); -+ bus_dmamap_sync(sc->sc_dmat, cmd->dst_map, -+ BUS_DMASYNC_POSTREAD); -+ } -+#endif -+ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ if (cmd->src_skb != cmd->dst_skb) { -+#ifdef NOTYET -+ crp->crp_buf = (caddr_t)cmd->dst_m; -+ totlen = cmd->src_mapsize; -+ for (m = cmd->dst_m; m != NULL; m = m->m_next) { -+ if (totlen < m->m_len) { -+ m->m_len = totlen; -+ totlen = 0; -+ } else -+ totlen -= m->m_len; -+ } -+ cmd->dst_m->m_pkthdr.len = cmd->src_m->m_pkthdr.len; -+ m_freem(cmd->src_m); -+#else -+ device_printf(sc->sc_dev, -+ "%s,%d: CRYPTO_F_SKBUF src != dst not implemented\n", -+ __FILE__, __LINE__); -+#endif -+ } -+ } -+ -+ if (cmd->sloplen != 0) { -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ cmd->src_mapsize - cmd->sloplen, cmd->sloplen, -+ (caddr_t)&dma->slop[cmd->slopidx]); -+ } -+ -+ i = dma->dstk; u = dma->dstu; -+ while (u != 0) { -+ if (i == HIFN_D_DST_RSIZE) -+ i = 0; -+#if 0 -+ bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, -+ BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); -+#endif -+ if (dma->dstr[i].l & htole32(HIFN_D_VALID)) { -+#if 0 -+ bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, -+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); -+#endif -+ break; -+ } -+ i++, u--; -+ } -+ dma->dstk = i; dma->dstu = u; -+ -+ hifnstats.hst_obytes += cmd->dst_mapsize; -+ -+ if ((cmd->base_masks & (HIFN_BASE_CMD_CRYPT | HIFN_BASE_CMD_DECODE)) == -+ HIFN_BASE_CMD_CRYPT) { -+ for (crd = crp->crp_desc; crd; crd = crd->crd_next) { -+ if (crd->crd_alg != CRYPTO_DES_CBC && -+ crd->crd_alg != CRYPTO_3DES_CBC && -+ crd->crd_alg != CRYPTO_AES_CBC) -+ continue; -+ ivlen = ((crd->crd_alg == CRYPTO_AES_CBC) ? -+ HIFN_AES_IV_LENGTH : HIFN_IV_LENGTH); -+ crypto_copydata(crp->crp_flags, crp->crp_buf, -+ crd->crd_skip + crd->crd_len - ivlen, ivlen, -+ cmd->softc->sc_sessions[cmd->session_num].hs_iv); -+ break; -+ } -+ } -+ -+ if (macbuf != NULL) { -+ for (crd = crp->crp_desc; crd; crd = crd->crd_next) { -+ int len; -+ -+ if (crd->crd_alg != CRYPTO_MD5 && -+ crd->crd_alg != CRYPTO_SHA1 && -+ crd->crd_alg != CRYPTO_MD5_HMAC && -+ crd->crd_alg != CRYPTO_SHA1_HMAC) { -+ continue; -+ } -+ len = cmd->softc->sc_sessions[cmd->session_num].hs_mlen; -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ crd->crd_inject, len, macbuf); -+ break; -+ } -+ } -+ -+ if (cmd->src_map != cmd->dst_map) -+ pci_unmap_buf(sc, &cmd->dst); -+ pci_unmap_buf(sc, &cmd->src); -+ kfree(cmd); -+ crypto_done(crp); -+} -+ -+/* -+ * 7811 PB3 rev/2 parts lock-up on burst writes to Group 0 -+ * and Group 1 registers; avoid conditions that could create -+ * burst writes by doing a read in between the writes. -+ * -+ * NB: The read we interpose is always to the same register; -+ * we do this because reading from an arbitrary (e.g. last) -+ * register may not always work. -+ */ -+static void -+hifn_write_reg_0(struct hifn_softc *sc, bus_size_t reg, u_int32_t val) -+{ -+ if (sc->sc_flags & HIFN_IS_7811) { -+ if (sc->sc_bar0_lastreg == reg - 4) -+ readl(sc->sc_bar0 + HIFN_0_PUCNFG); -+ sc->sc_bar0_lastreg = reg; -+ } -+ writel(val, sc->sc_bar0 + reg); -+} -+ -+static void -+hifn_write_reg_1(struct hifn_softc *sc, bus_size_t reg, u_int32_t val) -+{ -+ if (sc->sc_flags & HIFN_IS_7811) { -+ if (sc->sc_bar1_lastreg == reg - 4) -+ readl(sc->sc_bar1 + HIFN_1_REVID); -+ sc->sc_bar1_lastreg = reg; -+ } -+ writel(val, sc->sc_bar1 + reg); -+} -+ -+ -+static struct pci_device_id hifn_pci_tbl[] = { -+ { PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7951, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ { PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7955, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ { PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7956, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ { PCI_VENDOR_NETSEC, PCI_PRODUCT_NETSEC_7751, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ { PCI_VENDOR_INVERTEX, PCI_PRODUCT_INVERTEX_AEON, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ { PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7811, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ /* -+ * Other vendors share this PCI ID as well, such as -+ * http://www.powercrypt.com, and obviously they also -+ * use the same key. -+ */ -+ { PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7751, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ { 0, 0, 0, 0, 0, 0, } -+}; -+MODULE_DEVICE_TABLE(pci, hifn_pci_tbl); -+ -+static struct pci_driver hifn_driver = { -+ .name = "hifn", -+ .id_table = hifn_pci_tbl, -+ .probe = hifn_probe, -+ .remove = hifn_remove, -+ /* add PM stuff here one day */ -+}; -+ -+static int __init hifn_init (void) -+{ -+ struct hifn_softc *sc = NULL; -+ int rc; -+ -+ DPRINTF("%s(%p)\n", __FUNCTION__, hifn_init); -+ -+ rc = pci_register_driver(&hifn_driver); -+ pci_register_driver_compat(&hifn_driver, rc); -+ -+ return rc; -+} -+ -+static void __exit hifn_exit (void) -+{ -+ pci_unregister_driver(&hifn_driver); -+} -+ -+module_init(hifn_init); -+module_exit(hifn_exit); -+ -+MODULE_LICENSE("BSD"); -+MODULE_AUTHOR("David McCullough <david_mccullough@mcafee.com>"); -+MODULE_DESCRIPTION("OCF driver for hifn PCI crypto devices"); -diff --git a/crypto/ocf/hifn/hifn7751reg.h b/crypto/ocf/hifn/hifn7751reg.h -new file mode 100644 -index 0000000..23d70c5 ---- /dev/null -+++ b/crypto/ocf/hifn/hifn7751reg.h -@@ -0,0 +1,540 @@ -+/* $FreeBSD: src/sys/dev/hifn/hifn7751reg.h,v 1.7 2007/03/21 03:42:49 sam Exp $ */ -+/* $OpenBSD: hifn7751reg.h,v 1.35 2002/04/08 17:49:42 jason Exp $ */ -+ -+/*- -+ * Invertex AEON / Hifn 7751 driver -+ * Copyright (c) 1999 Invertex Inc. All rights reserved. -+ * Copyright (c) 1999 Theo de Raadt -+ * Copyright (c) 2000-2001 Network Security Technologies, Inc. -+ * http://www.netsec.net -+ * -+ * Please send any comments, feedback, bug-fixes, or feature requests to -+ * software@invertex.com. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored in part by the Defense Advanced Research Projects -+ * Agency (DARPA) and Air Force Research Laboratory, Air Force -+ * Materiel Command, USAF, under agreement number F30602-01-2-0537. -+ * -+ */ -+#ifndef __HIFN_H__ -+#define __HIFN_H__ -+ -+/* -+ * Some PCI configuration space offset defines. The names were made -+ * identical to the names used by the Linux kernel. -+ */ -+#define HIFN_BAR0 PCIR_BAR(0) /* PUC register map */ -+#define HIFN_BAR1 PCIR_BAR(1) /* DMA register map */ -+#define HIFN_TRDY_TIMEOUT 0x40 -+#define HIFN_RETRY_TIMEOUT 0x41 -+ -+/* -+ * PCI vendor and device identifiers -+ * (the names are preserved from their OpenBSD source). -+ */ -+#define PCI_VENDOR_HIFN 0x13a3 /* Hifn */ -+#define PCI_PRODUCT_HIFN_7751 0x0005 /* 7751 */ -+#define PCI_PRODUCT_HIFN_6500 0x0006 /* 6500 */ -+#define PCI_PRODUCT_HIFN_7811 0x0007 /* 7811 */ -+#define PCI_PRODUCT_HIFN_7855 0x001f /* 7855 */ -+#define PCI_PRODUCT_HIFN_7951 0x0012 /* 7951 */ -+#define PCI_PRODUCT_HIFN_7955 0x0020 /* 7954/7955 */ -+#define PCI_PRODUCT_HIFN_7956 0x001d /* 7956 */ -+ -+#define PCI_VENDOR_INVERTEX 0x14e1 /* Invertex */ -+#define PCI_PRODUCT_INVERTEX_AEON 0x0005 /* AEON */ -+ -+#define PCI_VENDOR_NETSEC 0x1660 /* NetSec */ -+#define PCI_PRODUCT_NETSEC_7751 0x7751 /* 7751 */ -+ -+/* -+ * The values below should multiple of 4 -- and be large enough to handle -+ * any command the driver implements. -+ * -+ * MAX_COMMAND = base command + mac command + encrypt command + -+ * mac-key + rc4-key -+ * MAX_RESULT = base result + mac result + mac + encrypt result -+ * -+ * -+ */ -+#define HIFN_MAX_COMMAND (8 + 8 + 8 + 64 + 260) -+#define HIFN_MAX_RESULT (8 + 4 + 20 + 4) -+ -+/* -+ * hifn_desc_t -+ * -+ * Holds an individual descriptor for any of the rings. -+ */ -+typedef struct hifn_desc { -+ volatile u_int32_t l; /* length and status bits */ -+ volatile u_int32_t p; -+} hifn_desc_t; -+ -+/* -+ * Masks for the "length" field of struct hifn_desc. -+ */ -+#define HIFN_D_LENGTH 0x0000ffff /* length bit mask */ -+#define HIFN_D_MASKDONEIRQ 0x02000000 /* mask the done interrupt */ -+#define HIFN_D_DESTOVER 0x04000000 /* destination overflow */ -+#define HIFN_D_OVER 0x08000000 /* overflow */ -+#define HIFN_D_LAST 0x20000000 /* last descriptor in chain */ -+#define HIFN_D_JUMP 0x40000000 /* jump descriptor */ -+#define HIFN_D_VALID 0x80000000 /* valid bit */ -+ -+ -+/* -+ * Processing Unit Registers (offset from BASEREG0) -+ */ -+#define HIFN_0_PUDATA 0x00 /* Processing Unit Data */ -+#define HIFN_0_PUCTRL 0x04 /* Processing Unit Control */ -+#define HIFN_0_PUISR 0x08 /* Processing Unit Interrupt Status */ -+#define HIFN_0_PUCNFG 0x0c /* Processing Unit Configuration */ -+#define HIFN_0_PUIER 0x10 /* Processing Unit Interrupt Enable */ -+#define HIFN_0_PUSTAT 0x14 /* Processing Unit Status/Chip ID */ -+#define HIFN_0_FIFOSTAT 0x18 /* FIFO Status */ -+#define HIFN_0_FIFOCNFG 0x1c /* FIFO Configuration */ -+#define HIFN_0_PUCTRL2 0x28 /* Processing Unit Control (2nd map) */ -+#define HIFN_0_MUTE1 0x80 -+#define HIFN_0_MUTE2 0x90 -+#define HIFN_0_SPACESIZE 0x100 /* Register space size */ -+ -+/* Processing Unit Control Register (HIFN_0_PUCTRL) */ -+#define HIFN_PUCTRL_CLRSRCFIFO 0x0010 /* clear source fifo */ -+#define HIFN_PUCTRL_STOP 0x0008 /* stop pu */ -+#define HIFN_PUCTRL_LOCKRAM 0x0004 /* lock ram */ -+#define HIFN_PUCTRL_DMAENA 0x0002 /* enable dma */ -+#define HIFN_PUCTRL_RESET 0x0001 /* Reset processing unit */ -+ -+/* Processing Unit Interrupt Status Register (HIFN_0_PUISR) */ -+#define HIFN_PUISR_CMDINVAL 0x8000 /* Invalid command interrupt */ -+#define HIFN_PUISR_DATAERR 0x4000 /* Data error interrupt */ -+#define HIFN_PUISR_SRCFIFO 0x2000 /* Source FIFO ready interrupt */ -+#define HIFN_PUISR_DSTFIFO 0x1000 /* Destination FIFO ready interrupt */ -+#define HIFN_PUISR_DSTOVER 0x0200 /* Destination overrun interrupt */ -+#define HIFN_PUISR_SRCCMD 0x0080 /* Source command interrupt */ -+#define HIFN_PUISR_SRCCTX 0x0040 /* Source context interrupt */ -+#define HIFN_PUISR_SRCDATA 0x0020 /* Source data interrupt */ -+#define HIFN_PUISR_DSTDATA 0x0010 /* Destination data interrupt */ -+#define HIFN_PUISR_DSTRESULT 0x0004 /* Destination result interrupt */ -+ -+/* Processing Unit Configuration Register (HIFN_0_PUCNFG) */ -+#define HIFN_PUCNFG_DRAMMASK 0xe000 /* DRAM size mask */ -+#define HIFN_PUCNFG_DSZ_256K 0x0000 /* 256k dram */ -+#define HIFN_PUCNFG_DSZ_512K 0x2000 /* 512k dram */ -+#define HIFN_PUCNFG_DSZ_1M 0x4000 /* 1m dram */ -+#define HIFN_PUCNFG_DSZ_2M 0x6000 /* 2m dram */ -+#define HIFN_PUCNFG_DSZ_4M 0x8000 /* 4m dram */ -+#define HIFN_PUCNFG_DSZ_8M 0xa000 /* 8m dram */ -+#define HIFN_PUNCFG_DSZ_16M 0xc000 /* 16m dram */ -+#define HIFN_PUCNFG_DSZ_32M 0xe000 /* 32m dram */ -+#define HIFN_PUCNFG_DRAMREFRESH 0x1800 /* DRAM refresh rate mask */ -+#define HIFN_PUCNFG_DRFR_512 0x0000 /* 512 divisor of ECLK */ -+#define HIFN_PUCNFG_DRFR_256 0x0800 /* 256 divisor of ECLK */ -+#define HIFN_PUCNFG_DRFR_128 0x1000 /* 128 divisor of ECLK */ -+#define HIFN_PUCNFG_TCALLPHASES 0x0200 /* your guess is as good as mine... */ -+#define HIFN_PUCNFG_TCDRVTOTEM 0x0100 /* your guess is as good as mine... */ -+#define HIFN_PUCNFG_BIGENDIAN 0x0080 /* DMA big endian mode */ -+#define HIFN_PUCNFG_BUS32 0x0040 /* Bus width 32bits */ -+#define HIFN_PUCNFG_BUS16 0x0000 /* Bus width 16 bits */ -+#define HIFN_PUCNFG_CHIPID 0x0020 /* Allow chipid from PUSTAT */ -+#define HIFN_PUCNFG_DRAM 0x0010 /* Context RAM is DRAM */ -+#define HIFN_PUCNFG_SRAM 0x0000 /* Context RAM is SRAM */ -+#define HIFN_PUCNFG_COMPSING 0x0004 /* Enable single compression context */ -+#define HIFN_PUCNFG_ENCCNFG 0x0002 /* Encryption configuration */ -+ -+/* Processing Unit Interrupt Enable Register (HIFN_0_PUIER) */ -+#define HIFN_PUIER_CMDINVAL 0x8000 /* Invalid command interrupt */ -+#define HIFN_PUIER_DATAERR 0x4000 /* Data error interrupt */ -+#define HIFN_PUIER_SRCFIFO 0x2000 /* Source FIFO ready interrupt */ -+#define HIFN_PUIER_DSTFIFO 0x1000 /* Destination FIFO ready interrupt */ -+#define HIFN_PUIER_DSTOVER 0x0200 /* Destination overrun interrupt */ -+#define HIFN_PUIER_SRCCMD 0x0080 /* Source command interrupt */ -+#define HIFN_PUIER_SRCCTX 0x0040 /* Source context interrupt */ -+#define HIFN_PUIER_SRCDATA 0x0020 /* Source data interrupt */ -+#define HIFN_PUIER_DSTDATA 0x0010 /* Destination data interrupt */ -+#define HIFN_PUIER_DSTRESULT 0x0004 /* Destination result interrupt */ -+ -+/* Processing Unit Status Register/Chip ID (HIFN_0_PUSTAT) */ -+#define HIFN_PUSTAT_CMDINVAL 0x8000 /* Invalid command interrupt */ -+#define HIFN_PUSTAT_DATAERR 0x4000 /* Data error interrupt */ -+#define HIFN_PUSTAT_SRCFIFO 0x2000 /* Source FIFO ready interrupt */ -+#define HIFN_PUSTAT_DSTFIFO 0x1000 /* Destination FIFO ready interrupt */ -+#define HIFN_PUSTAT_DSTOVER 0x0200 /* Destination overrun interrupt */ -+#define HIFN_PUSTAT_SRCCMD 0x0080 /* Source command interrupt */ -+#define HIFN_PUSTAT_SRCCTX 0x0040 /* Source context interrupt */ -+#define HIFN_PUSTAT_SRCDATA 0x0020 /* Source data interrupt */ -+#define HIFN_PUSTAT_DSTDATA 0x0010 /* Destination data interrupt */ -+#define HIFN_PUSTAT_DSTRESULT 0x0004 /* Destination result interrupt */ -+#define HIFN_PUSTAT_CHIPREV 0x00ff /* Chip revision mask */ -+#define HIFN_PUSTAT_CHIPENA 0xff00 /* Chip enabled mask */ -+#define HIFN_PUSTAT_ENA_2 0x1100 /* Level 2 enabled */ -+#define HIFN_PUSTAT_ENA_1 0x1000 /* Level 1 enabled */ -+#define HIFN_PUSTAT_ENA_0 0x3000 /* Level 0 enabled */ -+#define HIFN_PUSTAT_REV_2 0x0020 /* 7751 PT6/2 */ -+#define HIFN_PUSTAT_REV_3 0x0030 /* 7751 PT6/3 */ -+ -+/* FIFO Status Register (HIFN_0_FIFOSTAT) */ -+#define HIFN_FIFOSTAT_SRC 0x7f00 /* Source FIFO available */ -+#define HIFN_FIFOSTAT_DST 0x007f /* Destination FIFO available */ -+ -+/* FIFO Configuration Register (HIFN_0_FIFOCNFG) */ -+#define HIFN_FIFOCNFG_THRESHOLD 0x0400 /* must be written as this value */ -+ -+/* -+ * DMA Interface Registers (offset from BASEREG1) -+ */ -+#define HIFN_1_DMA_CRAR 0x0c /* DMA Command Ring Address */ -+#define HIFN_1_DMA_SRAR 0x1c /* DMA Source Ring Address */ -+#define HIFN_1_DMA_RRAR 0x2c /* DMA Result Ring Address */ -+#define HIFN_1_DMA_DRAR 0x3c /* DMA Destination Ring Address */ -+#define HIFN_1_DMA_CSR 0x40 /* DMA Status and Control */ -+#define HIFN_1_DMA_IER 0x44 /* DMA Interrupt Enable */ -+#define HIFN_1_DMA_CNFG 0x48 /* DMA Configuration */ -+#define HIFN_1_PLL 0x4c /* 7955/7956: PLL config */ -+#define HIFN_1_7811_RNGENA 0x60 /* 7811: rng enable */ -+#define HIFN_1_7811_RNGCFG 0x64 /* 7811: rng config */ -+#define HIFN_1_7811_RNGDAT 0x68 /* 7811: rng data */ -+#define HIFN_1_7811_RNGSTS 0x6c /* 7811: rng status */ -+#define HIFN_1_DMA_CNFG2 0x6c /* 7955/7956: dma config #2 */ -+#define HIFN_1_7811_MIPSRST 0x94 /* 7811: MIPS reset */ -+#define HIFN_1_REVID 0x98 /* Revision ID */ -+ -+#define HIFN_1_PUB_RESET 0x204 /* Public/RNG Reset */ -+#define HIFN_1_PUB_BASE 0x300 /* Public Base Address */ -+#define HIFN_1_PUB_OPLEN 0x304 /* 7951-compat Public Operand Length */ -+#define HIFN_1_PUB_OP 0x308 /* 7951-compat Public Operand */ -+#define HIFN_1_PUB_STATUS 0x30c /* 7951-compat Public Status */ -+#define HIFN_1_PUB_IEN 0x310 /* Public Interrupt enable */ -+#define HIFN_1_RNG_CONFIG 0x314 /* RNG config */ -+#define HIFN_1_RNG_DATA 0x318 /* RNG data */ -+#define HIFN_1_PUB_MODE 0x320 /* PK mode */ -+#define HIFN_1_PUB_FIFO_OPLEN 0x380 /* first element of oplen fifo */ -+#define HIFN_1_PUB_FIFO_OP 0x384 /* first element of op fifo */ -+#define HIFN_1_PUB_MEM 0x400 /* start of Public key memory */ -+#define HIFN_1_PUB_MEMEND 0xbff /* end of Public key memory */ -+ -+/* DMA Status and Control Register (HIFN_1_DMA_CSR) */ -+#define HIFN_DMACSR_D_CTRLMASK 0xc0000000 /* Destinition Ring Control */ -+#define HIFN_DMACSR_D_CTRL_NOP 0x00000000 /* Dest. Control: no-op */ -+#define HIFN_DMACSR_D_CTRL_DIS 0x40000000 /* Dest. Control: disable */ -+#define HIFN_DMACSR_D_CTRL_ENA 0x80000000 /* Dest. Control: enable */ -+#define HIFN_DMACSR_D_ABORT 0x20000000 /* Destinition Ring PCIAbort */ -+#define HIFN_DMACSR_D_DONE 0x10000000 /* Destinition Ring Done */ -+#define HIFN_DMACSR_D_LAST 0x08000000 /* Destinition Ring Last */ -+#define HIFN_DMACSR_D_WAIT 0x04000000 /* Destinition Ring Waiting */ -+#define HIFN_DMACSR_D_OVER 0x02000000 /* Destinition Ring Overflow */ -+#define HIFN_DMACSR_R_CTRL 0x00c00000 /* Result Ring Control */ -+#define HIFN_DMACSR_R_CTRL_NOP 0x00000000 /* Result Control: no-op */ -+#define HIFN_DMACSR_R_CTRL_DIS 0x00400000 /* Result Control: disable */ -+#define HIFN_DMACSR_R_CTRL_ENA 0x00800000 /* Result Control: enable */ -+#define HIFN_DMACSR_R_ABORT 0x00200000 /* Result Ring PCI Abort */ -+#define HIFN_DMACSR_R_DONE 0x00100000 /* Result Ring Done */ -+#define HIFN_DMACSR_R_LAST 0x00080000 /* Result Ring Last */ -+#define HIFN_DMACSR_R_WAIT 0x00040000 /* Result Ring Waiting */ -+#define HIFN_DMACSR_R_OVER 0x00020000 /* Result Ring Overflow */ -+#define HIFN_DMACSR_S_CTRL 0x0000c000 /* Source Ring Control */ -+#define HIFN_DMACSR_S_CTRL_NOP 0x00000000 /* Source Control: no-op */ -+#define HIFN_DMACSR_S_CTRL_DIS 0x00004000 /* Source Control: disable */ -+#define HIFN_DMACSR_S_CTRL_ENA 0x00008000 /* Source Control: enable */ -+#define HIFN_DMACSR_S_ABORT 0x00002000 /* Source Ring PCI Abort */ -+#define HIFN_DMACSR_S_DONE 0x00001000 /* Source Ring Done */ -+#define HIFN_DMACSR_S_LAST 0x00000800 /* Source Ring Last */ -+#define HIFN_DMACSR_S_WAIT 0x00000400 /* Source Ring Waiting */ -+#define HIFN_DMACSR_ILLW 0x00000200 /* Illegal write (7811 only) */ -+#define HIFN_DMACSR_ILLR 0x00000100 /* Illegal read (7811 only) */ -+#define HIFN_DMACSR_C_CTRL 0x000000c0 /* Command Ring Control */ -+#define HIFN_DMACSR_C_CTRL_NOP 0x00000000 /* Command Control: no-op */ -+#define HIFN_DMACSR_C_CTRL_DIS 0x00000040 /* Command Control: disable */ -+#define HIFN_DMACSR_C_CTRL_ENA 0x00000080 /* Command Control: enable */ -+#define HIFN_DMACSR_C_ABORT 0x00000020 /* Command Ring PCI Abort */ -+#define HIFN_DMACSR_C_DONE 0x00000010 /* Command Ring Done */ -+#define HIFN_DMACSR_C_LAST 0x00000008 /* Command Ring Last */ -+#define HIFN_DMACSR_C_WAIT 0x00000004 /* Command Ring Waiting */ -+#define HIFN_DMACSR_PUBDONE 0x00000002 /* Public op done (7951 only) */ -+#define HIFN_DMACSR_ENGINE 0x00000001 /* Command Ring Engine IRQ */ -+ -+/* DMA Interrupt Enable Register (HIFN_1_DMA_IER) */ -+#define HIFN_DMAIER_D_ABORT 0x20000000 /* Destination Ring PCIAbort */ -+#define HIFN_DMAIER_D_DONE 0x10000000 /* Destination Ring Done */ -+#define HIFN_DMAIER_D_LAST 0x08000000 /* Destination Ring Last */ -+#define HIFN_DMAIER_D_WAIT 0x04000000 /* Destination Ring Waiting */ -+#define HIFN_DMAIER_D_OVER 0x02000000 /* Destination Ring Overflow */ -+#define HIFN_DMAIER_R_ABORT 0x00200000 /* Result Ring PCI Abort */ -+#define HIFN_DMAIER_R_DONE 0x00100000 /* Result Ring Done */ -+#define HIFN_DMAIER_R_LAST 0x00080000 /* Result Ring Last */ -+#define HIFN_DMAIER_R_WAIT 0x00040000 /* Result Ring Waiting */ -+#define HIFN_DMAIER_R_OVER 0x00020000 /* Result Ring Overflow */ -+#define HIFN_DMAIER_S_ABORT 0x00002000 /* Source Ring PCI Abort */ -+#define HIFN_DMAIER_S_DONE 0x00001000 /* Source Ring Done */ -+#define HIFN_DMAIER_S_LAST 0x00000800 /* Source Ring Last */ -+#define HIFN_DMAIER_S_WAIT 0x00000400 /* Source Ring Waiting */ -+#define HIFN_DMAIER_ILLW 0x00000200 /* Illegal write (7811 only) */ -+#define HIFN_DMAIER_ILLR 0x00000100 /* Illegal read (7811 only) */ -+#define HIFN_DMAIER_C_ABORT 0x00000020 /* Command Ring PCI Abort */ -+#define HIFN_DMAIER_C_DONE 0x00000010 /* Command Ring Done */ -+#define HIFN_DMAIER_C_LAST 0x00000008 /* Command Ring Last */ -+#define HIFN_DMAIER_C_WAIT 0x00000004 /* Command Ring Waiting */ -+#define HIFN_DMAIER_PUBDONE 0x00000002 /* public op done (7951 only) */ -+#define HIFN_DMAIER_ENGINE 0x00000001 /* Engine IRQ */ -+ -+/* DMA Configuration Register (HIFN_1_DMA_CNFG) */ -+#define HIFN_DMACNFG_BIGENDIAN 0x10000000 /* big endian mode */ -+#define HIFN_DMACNFG_POLLFREQ 0x00ff0000 /* Poll frequency mask */ -+#define HIFN_DMACNFG_UNLOCK 0x00000800 -+#define HIFN_DMACNFG_POLLINVAL 0x00000700 /* Invalid Poll Scalar */ -+#define HIFN_DMACNFG_LAST 0x00000010 /* Host control LAST bit */ -+#define HIFN_DMACNFG_MODE 0x00000004 /* DMA mode */ -+#define HIFN_DMACNFG_DMARESET 0x00000002 /* DMA Reset # */ -+#define HIFN_DMACNFG_MSTRESET 0x00000001 /* Master Reset # */ -+ -+/* DMA Configuration Register (HIFN_1_DMA_CNFG2) */ -+#define HIFN_DMACNFG2_PKSWAP32 (1 << 19) /* swap the OPLEN/OP reg */ -+#define HIFN_DMACNFG2_PKSWAP8 (1 << 18) /* swap the bits of OPLEN/OP */ -+#define HIFN_DMACNFG2_BAR0_SWAP32 (1<<17) /* swap the bytes of BAR0 */ -+#define HIFN_DMACNFG2_BAR1_SWAP8 (1<<16) /* swap the bits of BAR0 */ -+#define HIFN_DMACNFG2_INIT_WRITE_BURST_SHIFT 12 -+#define HIFN_DMACNFG2_INIT_READ_BURST_SHIFT 8 -+#define HIFN_DMACNFG2_TGT_WRITE_BURST_SHIFT 4 -+#define HIFN_DMACNFG2_TGT_READ_BURST_SHIFT 0 -+ -+/* 7811 RNG Enable Register (HIFN_1_7811_RNGENA) */ -+#define HIFN_7811_RNGENA_ENA 0x00000001 /* enable RNG */ -+ -+/* 7811 RNG Config Register (HIFN_1_7811_RNGCFG) */ -+#define HIFN_7811_RNGCFG_PRE1 0x00000f00 /* first prescalar */ -+#define HIFN_7811_RNGCFG_OPRE 0x00000080 /* output prescalar */ -+#define HIFN_7811_RNGCFG_DEFL 0x00000f80 /* 2 words/ 1/100 sec */ -+ -+/* 7811 RNG Status Register (HIFN_1_7811_RNGSTS) */ -+#define HIFN_7811_RNGSTS_RDY 0x00004000 /* two numbers in FIFO */ -+#define HIFN_7811_RNGSTS_UFL 0x00001000 /* rng underflow */ -+ -+/* 7811 MIPS Reset Register (HIFN_1_7811_MIPSRST) */ -+#define HIFN_MIPSRST_BAR2SIZE 0xffff0000 /* sdram size */ -+#define HIFN_MIPSRST_GPRAMINIT 0x00008000 /* gpram can be accessed */ -+#define HIFN_MIPSRST_CRAMINIT 0x00004000 /* ctxram can be accessed */ -+#define HIFN_MIPSRST_LED2 0x00000400 /* external LED2 */ -+#define HIFN_MIPSRST_LED1 0x00000200 /* external LED1 */ -+#define HIFN_MIPSRST_LED0 0x00000100 /* external LED0 */ -+#define HIFN_MIPSRST_MIPSDIS 0x00000004 /* disable MIPS */ -+#define HIFN_MIPSRST_MIPSRST 0x00000002 /* warm reset MIPS */ -+#define HIFN_MIPSRST_MIPSCOLD 0x00000001 /* cold reset MIPS */ -+ -+/* Public key reset register (HIFN_1_PUB_RESET) */ -+#define HIFN_PUBRST_RESET 0x00000001 /* reset public/rng unit */ -+ -+/* Public operation register (HIFN_1_PUB_OP) */ -+#define HIFN_PUBOP_AOFFSET 0x0000003e /* A offset */ -+#define HIFN_PUBOP_BOFFSET 0x00000fc0 /* B offset */ -+#define HIFN_PUBOP_MOFFSET 0x0003f000 /* M offset */ -+#define HIFN_PUBOP_OP_MASK 0x003c0000 /* Opcode: */ -+#define HIFN_PUBOP_OP_NOP 0x00000000 /* NOP */ -+#define HIFN_PUBOP_OP_ADD 0x00040000 /* ADD */ -+#define HIFN_PUBOP_OP_ADDC 0x00080000 /* ADD w/carry */ -+#define HIFN_PUBOP_OP_SUB 0x000c0000 /* SUB */ -+#define HIFN_PUBOP_OP_SUBC 0x00100000 /* SUB w/carry */ -+#define HIFN_PUBOP_OP_MODADD 0x00140000 /* Modular ADD */ -+#define HIFN_PUBOP_OP_MODSUB 0x00180000 /* Modular SUB */ -+#define HIFN_PUBOP_OP_INCA 0x001c0000 /* INC A */ -+#define HIFN_PUBOP_OP_DECA 0x00200000 /* DEC A */ -+#define HIFN_PUBOP_OP_MULT 0x00240000 /* MULT */ -+#define HIFN_PUBOP_OP_MODMULT 0x00280000 /* Modular MULT */ -+#define HIFN_PUBOP_OP_MODRED 0x002c0000 /* Modular Red */ -+#define HIFN_PUBOP_OP_MODEXP 0x00300000 /* Modular Exp */ -+ -+/* Public operand length register (HIFN_1_PUB_OPLEN) */ -+#define HIFN_PUBOPLEN_MODLEN 0x0000007f -+#define HIFN_PUBOPLEN_EXPLEN 0x0003ff80 -+#define HIFN_PUBOPLEN_REDLEN 0x003c0000 -+ -+/* Public status register (HIFN_1_PUB_STATUS) */ -+#define HIFN_PUBSTS_DONE 0x00000001 /* operation done */ -+#define HIFN_PUBSTS_CARRY 0x00000002 /* carry */ -+#define HIFN_PUBSTS_FIFO_EMPTY 0x00000100 /* fifo empty */ -+#define HIFN_PUBSTS_FIFO_FULL 0x00000200 /* fifo full */ -+#define HIFN_PUBSTS_FIFO_OVFL 0x00000400 /* fifo overflow */ -+#define HIFN_PUBSTS_FIFO_WRITE 0x000f0000 /* fifo write */ -+#define HIFN_PUBSTS_FIFO_READ 0x0f000000 /* fifo read */ -+ -+/* Public interrupt enable register (HIFN_1_PUB_IEN) */ -+#define HIFN_PUBIEN_DONE 0x00000001 /* operation done interrupt */ -+ -+/* Random number generator config register (HIFN_1_RNG_CONFIG) */ -+#define HIFN_RNGCFG_ENA 0x00000001 /* enable rng */ -+ -+/* -+ * Register offsets in register set 1 -+ */ -+ -+#define HIFN_UNLOCK_SECRET1 0xf4 -+#define HIFN_UNLOCK_SECRET2 0xfc -+ -+/* -+ * PLL config register -+ * -+ * This register is present only on 7954/7955/7956 parts. It must be -+ * programmed according to the bus interface method used by the h/w. -+ * Note that the parts require a stable clock. Since the PCI clock -+ * may vary the reference clock must usually be used. To avoid -+ * overclocking the core logic, setup must be done carefully, refer -+ * to the driver for details. The exact multiplier required varies -+ * by part and system configuration; refer to the Hifn documentation. -+ */ -+#define HIFN_PLL_REF_SEL 0x00000001 /* REF/HBI clk selection */ -+#define HIFN_PLL_BP 0x00000002 /* bypass (used during setup) */ -+/* bit 2 reserved */ -+#define HIFN_PLL_PK_CLK_SEL 0x00000008 /* public key clk select */ -+#define HIFN_PLL_PE_CLK_SEL 0x00000010 /* packet engine clk select */ -+/* bits 5-9 reserved */ -+#define HIFN_PLL_MBSET 0x00000400 /* must be set to 1 */ -+#define HIFN_PLL_ND 0x00003800 /* Fpll_ref multiplier select */ -+#define HIFN_PLL_ND_SHIFT 11 -+#define HIFN_PLL_ND_2 0x00000000 /* 2x */ -+#define HIFN_PLL_ND_4 0x00000800 /* 4x */ -+#define HIFN_PLL_ND_6 0x00001000 /* 6x */ -+#define HIFN_PLL_ND_8 0x00001800 /* 8x */ -+#define HIFN_PLL_ND_10 0x00002000 /* 10x */ -+#define HIFN_PLL_ND_12 0x00002800 /* 12x */ -+/* bits 14-15 reserved */ -+#define HIFN_PLL_IS 0x00010000 /* charge pump current select */ -+/* bits 17-31 reserved */ -+ -+/* -+ * Board configuration specifies only these bits. -+ */ -+#define HIFN_PLL_CONFIG (HIFN_PLL_IS|HIFN_PLL_ND|HIFN_PLL_REF_SEL) -+ -+/* -+ * Public Key Engine Mode Register -+ */ -+#define HIFN_PKMODE_HOSTINVERT (1 << 0) /* HOST INVERT */ -+#define HIFN_PKMODE_ENHANCED (1 << 1) /* Enable enhanced mode */ -+ -+ -+/********************************************************************* -+ * Structs for board commands -+ * -+ *********************************************************************/ -+ -+/* -+ * Structure to help build up the command data structure. -+ */ -+typedef struct hifn_base_command { -+ volatile u_int16_t masks; -+ volatile u_int16_t session_num; -+ volatile u_int16_t total_source_count; -+ volatile u_int16_t total_dest_count; -+} hifn_base_command_t; -+ -+#define HIFN_BASE_CMD_MAC 0x0400 -+#define HIFN_BASE_CMD_CRYPT 0x0800 -+#define HIFN_BASE_CMD_DECODE 0x2000 -+#define HIFN_BASE_CMD_SRCLEN_M 0xc000 -+#define HIFN_BASE_CMD_SRCLEN_S 14 -+#define HIFN_BASE_CMD_DSTLEN_M 0x3000 -+#define HIFN_BASE_CMD_DSTLEN_S 12 -+#define HIFN_BASE_CMD_LENMASK_HI 0x30000 -+#define HIFN_BASE_CMD_LENMASK_LO 0x0ffff -+ -+/* -+ * Structure to help build up the command data structure. -+ */ -+typedef struct hifn_crypt_command { -+ volatile u_int16_t masks; -+ volatile u_int16_t header_skip; -+ volatile u_int16_t source_count; -+ volatile u_int16_t reserved; -+} hifn_crypt_command_t; -+ -+#define HIFN_CRYPT_CMD_ALG_MASK 0x0003 /* algorithm: */ -+#define HIFN_CRYPT_CMD_ALG_DES 0x0000 /* DES */ -+#define HIFN_CRYPT_CMD_ALG_3DES 0x0001 /* 3DES */ -+#define HIFN_CRYPT_CMD_ALG_RC4 0x0002 /* RC4 */ -+#define HIFN_CRYPT_CMD_ALG_AES 0x0003 /* AES */ -+#define HIFN_CRYPT_CMD_MODE_MASK 0x0018 /* Encrypt mode: */ -+#define HIFN_CRYPT_CMD_MODE_ECB 0x0000 /* ECB */ -+#define HIFN_CRYPT_CMD_MODE_CBC 0x0008 /* CBC */ -+#define HIFN_CRYPT_CMD_MODE_CFB 0x0010 /* CFB */ -+#define HIFN_CRYPT_CMD_MODE_OFB 0x0018 /* OFB */ -+#define HIFN_CRYPT_CMD_CLR_CTX 0x0040 /* clear context */ -+#define HIFN_CRYPT_CMD_NEW_KEY 0x0800 /* expect new key */ -+#define HIFN_CRYPT_CMD_NEW_IV 0x1000 /* expect new iv */ -+ -+#define HIFN_CRYPT_CMD_SRCLEN_M 0xc000 -+#define HIFN_CRYPT_CMD_SRCLEN_S 14 -+ -+#define HIFN_CRYPT_CMD_KSZ_MASK 0x0600 /* AES key size: */ -+#define HIFN_CRYPT_CMD_KSZ_128 0x0000 /* 128 bit */ -+#define HIFN_CRYPT_CMD_KSZ_192 0x0200 /* 192 bit */ -+#define HIFN_CRYPT_CMD_KSZ_256 0x0400 /* 256 bit */ -+ -+/* -+ * Structure to help build up the command data structure. -+ */ -+typedef struct hifn_mac_command { -+ volatile u_int16_t masks; -+ volatile u_int16_t header_skip; -+ volatile u_int16_t source_count; -+ volatile u_int16_t reserved; -+} hifn_mac_command_t; -+ -+#define HIFN_MAC_CMD_ALG_MASK 0x0001 -+#define HIFN_MAC_CMD_ALG_SHA1 0x0000 -+#define HIFN_MAC_CMD_ALG_MD5 0x0001 -+#define HIFN_MAC_CMD_MODE_MASK 0x000c -+#define HIFN_MAC_CMD_MODE_HMAC 0x0000 -+#define HIFN_MAC_CMD_MODE_SSL_MAC 0x0004 -+#define HIFN_MAC_CMD_MODE_HASH 0x0008 -+#define HIFN_MAC_CMD_MODE_FULL 0x0004 -+#define HIFN_MAC_CMD_TRUNC 0x0010 -+#define HIFN_MAC_CMD_RESULT 0x0020 -+#define HIFN_MAC_CMD_APPEND 0x0040 -+#define HIFN_MAC_CMD_SRCLEN_M 0xc000 -+#define HIFN_MAC_CMD_SRCLEN_S 14 -+ -+/* -+ * MAC POS IPsec initiates authentication after encryption on encodes -+ * and before decryption on decodes. -+ */ -+#define HIFN_MAC_CMD_POS_IPSEC 0x0200 -+#define HIFN_MAC_CMD_NEW_KEY 0x0800 -+ -+/* -+ * The poll frequency and poll scalar defines are unshifted values used -+ * to set fields in the DMA Configuration Register. -+ */ -+#ifndef HIFN_POLL_FREQUENCY -+#define HIFN_POLL_FREQUENCY 0x1 -+#endif -+ -+#ifndef HIFN_POLL_SCALAR -+#define HIFN_POLL_SCALAR 0x0 -+#endif -+ -+#define HIFN_MAX_SEGLEN 0xffff /* maximum dma segment len */ -+#define HIFN_MAX_DMALEN 0x3ffff /* maximum dma length */ -+#endif /* __HIFN_H__ */ -diff --git a/crypto/ocf/hifn/hifn7751var.h b/crypto/ocf/hifn/hifn7751var.h -new file mode 100644 -index 0000000..6146bfb ---- /dev/null -+++ b/crypto/ocf/hifn/hifn7751var.h -@@ -0,0 +1,369 @@ -+/* $FreeBSD: src/sys/dev/hifn/hifn7751var.h,v 1.9 2007/03/21 03:42:49 sam Exp $ */ -+/* $OpenBSD: hifn7751var.h,v 1.42 2002/04/08 17:49:42 jason Exp $ */ -+ -+/*- -+ * Invertex AEON / Hifn 7751 driver -+ * Copyright (c) 1999 Invertex Inc. All rights reserved. -+ * Copyright (c) 1999 Theo de Raadt -+ * Copyright (c) 2000-2001 Network Security Technologies, Inc. -+ * http://www.netsec.net -+ * -+ * Please send any comments, feedback, bug-fixes, or feature requests to -+ * software@invertex.com. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored in part by the Defense Advanced Research Projects -+ * Agency (DARPA) and Air Force Research Laboratory, Air Force -+ * Materiel Command, USAF, under agreement number F30602-01-2-0537. -+ * -+ */ -+ -+#ifndef __HIFN7751VAR_H__ -+#define __HIFN7751VAR_H__ -+ -+#ifdef __KERNEL__ -+ -+/* -+ * Some configurable values for the driver. By default command+result -+ * descriptor rings are the same size. The src+dst descriptor rings -+ * are sized at 3.5x the number of potential commands. Slower parts -+ * (e.g. 7951) tend to run out of src descriptors; faster parts (7811) -+ * src+cmd/result descriptors. It's not clear that increasing the size -+ * of the descriptor rings helps performance significantly as other -+ * factors tend to come into play (e.g. copying misaligned packets). -+ */ -+#define HIFN_D_CMD_RSIZE 24 /* command descriptors */ -+#define HIFN_D_SRC_RSIZE ((HIFN_D_CMD_RSIZE * 7) / 2) /* source descriptors */ -+#define HIFN_D_RES_RSIZE HIFN_D_CMD_RSIZE /* result descriptors */ -+#define HIFN_D_DST_RSIZE HIFN_D_SRC_RSIZE /* destination descriptors */ -+ -+/* -+ * Length values for cryptography -+ */ -+#define HIFN_DES_KEY_LENGTH 8 -+#define HIFN_3DES_KEY_LENGTH 24 -+#define HIFN_MAX_CRYPT_KEY_LENGTH HIFN_3DES_KEY_LENGTH -+#define HIFN_IV_LENGTH 8 -+#define HIFN_AES_IV_LENGTH 16 -+#define HIFN_MAX_IV_LENGTH HIFN_AES_IV_LENGTH -+ -+/* -+ * Length values for authentication -+ */ -+#define HIFN_MAC_KEY_LENGTH 64 -+#define HIFN_MD5_LENGTH 16 -+#define HIFN_SHA1_LENGTH 20 -+#define HIFN_MAC_TRUNC_LENGTH 12 -+ -+#define MAX_SCATTER 64 -+ -+/* -+ * Data structure to hold all 4 rings and any other ring related data. -+ */ -+struct hifn_dma { -+ /* -+ * Descriptor rings. We add +1 to the size to accomidate the -+ * jump descriptor. -+ */ -+ struct hifn_desc cmdr[HIFN_D_CMD_RSIZE+1]; -+ struct hifn_desc srcr[HIFN_D_SRC_RSIZE+1]; -+ struct hifn_desc dstr[HIFN_D_DST_RSIZE+1]; -+ struct hifn_desc resr[HIFN_D_RES_RSIZE+1]; -+ -+ struct hifn_command *hifn_commands[HIFN_D_RES_RSIZE]; -+ -+ u_char command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND]; -+ u_char result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT]; -+ u_int32_t slop[HIFN_D_CMD_RSIZE]; -+ -+ u_int64_t test_src, test_dst; -+ -+ /* -+ * Our current positions for insertion and removal from the desriptor -+ * rings. -+ */ -+ int cmdi, srci, dsti, resi; -+ volatile int cmdu, srcu, dstu, resu; -+ int cmdk, srck, dstk, resk; -+}; -+ -+struct hifn_session { -+ int hs_used; -+ int hs_mlen; -+ u_int8_t hs_iv[HIFN_MAX_IV_LENGTH]; -+}; -+ -+#define HIFN_RING_SYNC(sc, r, i, f) \ -+ /* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */ -+ -+#define HIFN_CMDR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), cmdr, (i), (f)) -+#define HIFN_RESR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), resr, (i), (f)) -+#define HIFN_SRCR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), srcr, (i), (f)) -+#define HIFN_DSTR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), dstr, (i), (f)) -+ -+#define HIFN_CMD_SYNC(sc, i, f) \ -+ /* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */ -+ -+#define HIFN_RES_SYNC(sc, i, f) \ -+ /* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */ -+ -+typedef int bus_size_t; -+ -+/* -+ * Holds data specific to a single HIFN board. -+ */ -+struct hifn_softc { -+ softc_device_decl sc_dev; -+ -+ struct pci_dev *sc_pcidev; /* PCI device pointer */ -+ spinlock_t sc_mtx; /* per-instance lock */ -+ -+ int sc_num; /* for multiple devs */ -+ -+ ocf_iomem_t sc_bar0; -+ bus_size_t sc_bar0_lastreg;/* bar0 last reg written */ -+ ocf_iomem_t sc_bar1; -+ bus_size_t sc_bar1_lastreg;/* bar1 last reg written */ -+ -+ int sc_irq; -+ -+ u_int32_t sc_dmaier; -+ u_int32_t sc_drammodel; /* 1=dram, 0=sram */ -+ u_int32_t sc_pllconfig; /* 7954/7955/7956 PLL config */ -+ -+ struct hifn_dma *sc_dma; -+ dma_addr_t sc_dma_physaddr;/* physical address of sc_dma */ -+ -+ int sc_dmansegs; -+ int32_t sc_cid; -+ int sc_maxses; -+ int sc_nsessions; -+ struct hifn_session *sc_sessions; -+ int sc_ramsize; -+ int sc_flags; -+#define HIFN_HAS_RNG 0x1 /* includes random number generator */ -+#define HIFN_HAS_PUBLIC 0x2 /* includes public key support */ -+#define HIFN_HAS_AES 0x4 /* includes AES support */ -+#define HIFN_IS_7811 0x8 /* Hifn 7811 part */ -+#define HIFN_IS_7956 0x10 /* Hifn 7956/7955 don't have SDRAM */ -+ -+ struct timer_list sc_tickto; /* for managing DMA */ -+ -+ int sc_rngfirst; -+ int sc_rnghz; /* RNG polling frequency */ -+ -+ int sc_c_busy; /* command ring busy */ -+ int sc_s_busy; /* source data ring busy */ -+ int sc_d_busy; /* destination data ring busy */ -+ int sc_r_busy; /* result ring busy */ -+ int sc_active; /* for initial countdown */ -+ int sc_needwakeup; /* ops q'd wating on resources */ -+ int sc_curbatch; /* # ops submitted w/o int */ -+ int sc_suspended; -+#ifdef HIFN_VULCANDEV -+ struct cdev *sc_pkdev; -+#endif -+}; -+ -+#define HIFN_LOCK(_sc) spin_lock_irqsave(&(_sc)->sc_mtx, l_flags) -+#define HIFN_UNLOCK(_sc) spin_unlock_irqrestore(&(_sc)->sc_mtx, l_flags) -+ -+/* -+ * hifn_command_t -+ * -+ * This is the control structure used to pass commands to hifn_encrypt(). -+ * -+ * flags -+ * ----- -+ * Flags is the bitwise "or" values for command configuration. A single -+ * encrypt direction needs to be set: -+ * -+ * HIFN_ENCODE or HIFN_DECODE -+ * -+ * To use cryptography, a single crypto algorithm must be included: -+ * -+ * HIFN_CRYPT_3DES or HIFN_CRYPT_DES -+ * -+ * To use authentication is used, a single MAC algorithm must be included: -+ * -+ * HIFN_MAC_MD5 or HIFN_MAC_SHA1 -+ * -+ * By default MD5 uses a 16 byte hash and SHA-1 uses a 20 byte hash. -+ * If the value below is set, hash values are truncated or assumed -+ * truncated to 12 bytes: -+ * -+ * HIFN_MAC_TRUNC -+ * -+ * Keys for encryption and authentication can be sent as part of a command, -+ * or the last key value used with a particular session can be retrieved -+ * and used again if either of these flags are not specified. -+ * -+ * HIFN_CRYPT_NEW_KEY, HIFN_MAC_NEW_KEY -+ * -+ * session_num -+ * ----------- -+ * A number between 0 and 2048 (for DRAM models) or a number between -+ * 0 and 768 (for SRAM models). Those who don't want to use session -+ * numbers should leave value at zero and send a new crypt key and/or -+ * new MAC key on every command. If you use session numbers and -+ * don't send a key with a command, the last key sent for that same -+ * session number will be used. -+ * -+ * Warning: Using session numbers and multiboard at the same time -+ * is currently broken. -+ * -+ * mbuf -+ * ---- -+ * Either fill in the mbuf pointer and npa=0 or -+ * fill packp[] and packl[] and set npa to > 0 -+ * -+ * mac_header_skip -+ * --------------- -+ * The number of bytes of the source_buf that are skipped over before -+ * authentication begins. This must be a number between 0 and 2^16-1 -+ * and can be used by IPsec implementers to skip over IP headers. -+ * *** Value ignored if authentication not used *** -+ * -+ * crypt_header_skip -+ * ----------------- -+ * The number of bytes of the source_buf that are skipped over before -+ * the cryptographic operation begins. This must be a number between 0 -+ * and 2^16-1. For IPsec, this number will always be 8 bytes larger -+ * than the auth_header_skip (to skip over the ESP header). -+ * *** Value ignored if cryptography not used *** -+ * -+ */ -+struct hifn_operand { -+ union { -+ struct sk_buff *skb; -+ struct uio *io; -+ unsigned char *buf; -+ } u; -+ void *map; -+ bus_size_t mapsize; -+ int nsegs; -+ struct { -+ dma_addr_t ds_addr; -+ int ds_len; -+ } segs[MAX_SCATTER]; -+}; -+ -+struct hifn_command { -+ u_int16_t session_num; -+ u_int16_t base_masks, cry_masks, mac_masks; -+ u_int8_t iv[HIFN_MAX_IV_LENGTH], *ck, mac[HIFN_MAC_KEY_LENGTH]; -+ int cklen; -+ int sloplen, slopidx; -+ -+ struct hifn_operand src; -+ struct hifn_operand dst; -+ -+ struct hifn_softc *softc; -+ struct cryptop *crp; -+ struct cryptodesc *enccrd, *maccrd; -+}; -+ -+#define src_skb src.u.skb -+#define src_io src.u.io -+#define src_map src.map -+#define src_mapsize src.mapsize -+#define src_segs src.segs -+#define src_nsegs src.nsegs -+#define src_buf src.u.buf -+ -+#define dst_skb dst.u.skb -+#define dst_io dst.u.io -+#define dst_map dst.map -+#define dst_mapsize dst.mapsize -+#define dst_segs dst.segs -+#define dst_nsegs dst.nsegs -+#define dst_buf dst.u.buf -+ -+/* -+ * Return values for hifn_crypto() -+ */ -+#define HIFN_CRYPTO_SUCCESS 0 -+#define HIFN_CRYPTO_BAD_INPUT (-1) -+#define HIFN_CRYPTO_RINGS_FULL (-2) -+ -+/************************************************************************** -+ * -+ * Function: hifn_crypto -+ * -+ * Purpose: Called by external drivers to begin an encryption on the -+ * HIFN board. -+ * -+ * Blocking/Non-blocking Issues -+ * ============================ -+ * The driver cannot block in hifn_crypto (no calls to tsleep) currently. -+ * hifn_crypto() returns HIFN_CRYPTO_RINGS_FULL if there is not enough -+ * room in any of the rings for the request to proceed. -+ * -+ * Return Values -+ * ============= -+ * 0 for success, negative values on error -+ * -+ * Defines for negative error codes are: -+ * -+ * HIFN_CRYPTO_BAD_INPUT : The passed in command had invalid settings. -+ * HIFN_CRYPTO_RINGS_FULL : All DMA rings were full and non-blocking -+ * behaviour was requested. -+ * -+ *************************************************************************/ -+ -+/* -+ * Convert back and forth from 'sid' to 'card' and 'session' -+ */ -+#define HIFN_CARD(sid) (((sid) & 0xf0000000) >> 28) -+#define HIFN_SESSION(sid) ((sid) & 0x000007ff) -+#define HIFN_SID(crd,ses) (((crd) << 28) | ((ses) & 0x7ff)) -+ -+#endif /* _KERNEL */ -+ -+struct hifn_stats { -+ u_int64_t hst_ibytes; -+ u_int64_t hst_obytes; -+ u_int32_t hst_ipackets; -+ u_int32_t hst_opackets; -+ u_int32_t hst_invalid; -+ u_int32_t hst_nomem; /* malloc or one of hst_nomem_* */ -+ u_int32_t hst_abort; -+ u_int32_t hst_noirq; /* IRQ for no reason */ -+ u_int32_t hst_totbatch; /* ops submitted w/o interrupt */ -+ u_int32_t hst_maxbatch; /* max ops submitted together */ -+ u_int32_t hst_unaligned; /* unaligned src caused copy */ -+ /* -+ * The following divides hst_nomem into more specific buckets. -+ */ -+ u_int32_t hst_nomem_map; /* bus_dmamap_create failed */ -+ u_int32_t hst_nomem_load; /* bus_dmamap_load_* failed */ -+ u_int32_t hst_nomem_mbuf; /* MGET* failed */ -+ u_int32_t hst_nomem_mcl; /* MCLGET* failed */ -+ u_int32_t hst_nomem_cr; /* out of command/result descriptor */ -+ u_int32_t hst_nomem_sd; /* out of src/dst descriptors */ -+}; -+ -+#endif /* __HIFN7751VAR_H__ */ -diff --git a/crypto/ocf/hifn/hifnHIPP.c b/crypto/ocf/hifn/hifnHIPP.c -new file mode 100644 -index 0000000..1785147 ---- /dev/null -+++ b/crypto/ocf/hifn/hifnHIPP.c -@@ -0,0 +1,420 @@ -+/*- -+ * Driver for Hifn HIPP-I/II chipset -+ * Copyright (c) 2006 Michael Richardson <mcr@xelerance.com> -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored by Hifn Inc. -+ * -+ */ -+ -+/* -+ * Driver for various Hifn encryption processors. -+ */ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/wait.h> -+#include <linux/sched.h> -+#include <linux/pci.h> -+#include <linux/delay.h> -+#include <linux/interrupt.h> -+#include <linux/spinlock.h> -+#include <linux/random.h> -+#include <linux/version.h> -+#include <linux/skbuff.h> -+#include <linux/uio.h> -+#include <linux/sysfs.h> -+#include <linux/miscdevice.h> -+#include <asm/io.h> -+ -+#include <cryptodev.h> -+ -+#include "hifnHIPPreg.h" -+#include "hifnHIPPvar.h" -+ -+#if 1 -+#define DPRINTF(a...) if (hipp_debug) { \ -+ printk("%s: ", sc ? \ -+ device_get_nameunit(sc->sc_dev) : "hifn"); \ -+ printk(a); \ -+ } else -+#else -+#define DPRINTF(a...) -+#endif -+ -+typedef int bus_size_t; -+ -+static inline int -+pci_get_revid(struct pci_dev *dev) -+{ -+ u8 rid = 0; -+ pci_read_config_byte(dev, PCI_REVISION_ID, &rid); -+ return rid; -+} -+ -+#define debug hipp_debug -+int hipp_debug = 0; -+module_param(hipp_debug, int, 0644); -+MODULE_PARM_DESC(hipp_debug, "Enable debug"); -+ -+int hipp_maxbatch = 1; -+module_param(hipp_maxbatch, int, 0644); -+MODULE_PARM_DESC(hipp_maxbatch, "max ops to batch w/o interrupt"); -+ -+static int hipp_probe(struct pci_dev *dev, const struct pci_device_id *ent); -+static void hipp_remove(struct pci_dev *dev); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19) -+static irqreturn_t hipp_intr(int irq, void *arg); -+#else -+static irqreturn_t hipp_intr(int irq, void *arg, struct pt_regs *regs); -+#endif -+ -+static int hipp_num_chips = 0; -+static struct hipp_softc *hipp_chip_idx[HIPP_MAX_CHIPS]; -+ -+static int hipp_newsession(device_t, u_int32_t *, struct cryptoini *); -+static int hipp_freesession(device_t, u_int64_t); -+static int hipp_process(device_t, struct cryptop *, int); -+ -+static device_method_t hipp_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, hipp_newsession), -+ DEVMETHOD(cryptodev_freesession,hipp_freesession), -+ DEVMETHOD(cryptodev_process, hipp_process), -+}; -+ -+static __inline u_int32_t -+READ_REG(struct hipp_softc *sc, unsigned int barno, bus_size_t reg) -+{ -+ u_int32_t v = readl(sc->sc_bar[barno] + reg); -+ //sc->sc_bar0_lastreg = (bus_size_t) -1; -+ return (v); -+} -+static __inline void -+WRITE_REG(struct hipp_softc *sc, unsigned int barno, bus_size_t reg, u_int32_t val) -+{ -+ writel(val, sc->sc_bar[barno] + reg); -+} -+ -+#define READ_REG_0(sc, reg) READ_REG(sc, 0, reg) -+#define WRITE_REG_0(sc, reg, val) WRITE_REG(sc,0, reg, val) -+#define READ_REG_1(sc, reg) READ_REG(sc, 1, reg) -+#define WRITE_REG_1(sc, reg, val) WRITE_REG(sc,1, reg, val) -+ -+static int -+hipp_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri) -+{ -+ return EINVAL; -+} -+ -+static int -+hipp_freesession(device_t dev, u_int64_t tid) -+{ -+ return EINVAL; -+} -+ -+static int -+hipp_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ return EINVAL; -+} -+ -+static const char* -+hipp_partname(struct hipp_softc *sc, char buf[128], size_t blen) -+{ -+ char *n = NULL; -+ -+ switch (pci_get_vendor(sc->sc_pcidev)) { -+ case PCI_VENDOR_HIFN: -+ switch (pci_get_device(sc->sc_pcidev)) { -+ case PCI_PRODUCT_HIFN_7855: n = "Hifn 7855"; -+ case PCI_PRODUCT_HIFN_8155: n = "Hifn 8155"; -+ case PCI_PRODUCT_HIFN_6500: n = "Hifn 6500"; -+ } -+ } -+ -+ if(n==NULL) { -+ snprintf(buf, blen, "VID=%02x,PID=%02x", -+ pci_get_vendor(sc->sc_pcidev), -+ pci_get_device(sc->sc_pcidev)); -+ } else { -+ buf[0]='\0'; -+ strncat(buf, n, blen); -+ } -+ return buf; -+} -+ -+struct hipp_fs_entry { -+ struct attribute attr; -+ /* other stuff */ -+}; -+ -+ -+static ssize_t -+cryptoid_show(struct device *dev, -+ struct device_attribute *attr, -+ char *buf) -+{ -+ struct hipp_softc *sc; -+ -+ sc = pci_get_drvdata(to_pci_dev (dev)); -+ return sprintf (buf, "%d\n", sc->sc_cid); -+} -+ -+struct device_attribute hipp_dev_cryptoid = __ATTR_RO(cryptoid); -+ -+/* -+ * Attach an interface that successfully probed. -+ */ -+static int -+hipp_probe(struct pci_dev *dev, const struct pci_device_id *ent) -+{ -+ struct hipp_softc *sc = NULL; -+ int i; -+ //char rbase; -+ //u_int16_t ena; -+ int rev; -+ //int rseg; -+ int rc; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (pci_enable_device(dev) < 0) -+ return(-ENODEV); -+ -+ if (pci_set_mwi(dev)) -+ return(-ENODEV); -+ -+ if (!dev->irq) { -+ printk("hifn: found device with no IRQ assigned. check BIOS settings!"); -+ pci_disable_device(dev); -+ return(-ENODEV); -+ } -+ -+ sc = (struct hipp_softc *) kmalloc(sizeof(*sc), GFP_KERNEL); -+ if (!sc) -+ return(-ENOMEM); -+ memset(sc, 0, sizeof(*sc)); -+ -+ softc_device_init(sc, "hifn-hipp", hipp_num_chips, hipp_methods); -+ -+ sc->sc_pcidev = dev; -+ sc->sc_irq = -1; -+ sc->sc_cid = -1; -+ sc->sc_num = hipp_num_chips++; -+ -+ if (sc->sc_num < HIPP_MAX_CHIPS) -+ hipp_chip_idx[sc->sc_num] = sc; -+ -+ pci_set_drvdata(sc->sc_pcidev, sc); -+ -+ spin_lock_init(&sc->sc_mtx); -+ -+ /* -+ * Setup PCI resources. -+ * The READ_REG_0, WRITE_REG_0, READ_REG_1, -+ * and WRITE_REG_1 macros throughout the driver are used -+ * to permit better debugging. -+ */ -+ for(i=0; i<4; i++) { -+ unsigned long mem_start, mem_len; -+ mem_start = pci_resource_start(sc->sc_pcidev, i); -+ mem_len = pci_resource_len(sc->sc_pcidev, i); -+ sc->sc_barphy[i] = (caddr_t)mem_start; -+ sc->sc_bar[i] = (ocf_iomem_t) ioremap(mem_start, mem_len); -+ if (!sc->sc_bar[i]) { -+ device_printf(sc->sc_dev, "cannot map bar%d register space\n", i); -+ goto fail; -+ } -+ } -+ -+ //hipp_reset_board(sc, 0); -+ pci_set_master(sc->sc_pcidev); -+ -+ /* -+ * Arrange the interrupt line. -+ */ -+ rc = request_irq(dev->irq, hipp_intr, IRQF_SHARED, "hifn", sc); -+ if (rc) { -+ device_printf(sc->sc_dev, "could not map interrupt: %d\n", rc); -+ goto fail; -+ } -+ sc->sc_irq = dev->irq; -+ -+ rev = READ_REG_1(sc, HIPP_1_REVID) & 0xffff; -+ -+ { -+ char b[32]; -+ device_printf(sc->sc_dev, "%s, rev %u", -+ hipp_partname(sc, b, sizeof(b)), rev); -+ } -+ -+#if 0 -+ if (sc->sc_flags & HIFN_IS_7956) -+ printf(", pll=0x%x<%s clk, %ux mult>", -+ sc->sc_pllconfig, -+ sc->sc_pllconfig & HIFN_PLL_REF_SEL ? "ext" : "pci", -+ 2 + 2*((sc->sc_pllconfig & HIFN_PLL_ND) >> 11)); -+#endif -+ printf("\n"); -+ -+ sc->sc_cid = crypto_get_driverid(softc_get_device(sc),CRYPTOCAP_F_HARDWARE); -+ if (sc->sc_cid < 0) { -+ device_printf(sc->sc_dev, "could not get crypto driver id\n"); -+ goto fail; -+ } -+ -+#if 0 /* cannot work with a non-GPL module */ -+ /* make a sysfs entry to let the world know what entry we got */ -+ sysfs_create_file(&sc->sc_pcidev->dev.kobj, &hipp_dev_cryptoid.attr); -+#endif -+ -+#if 0 -+ init_timer(&sc->sc_tickto); -+ sc->sc_tickto.function = hifn_tick; -+ sc->sc_tickto.data = (unsigned long) sc->sc_num; -+ mod_timer(&sc->sc_tickto, jiffies + HZ); -+#endif -+ -+#if 0 /* no code here yet ?? */ -+ crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0); -+#endif -+ -+ return (0); -+ -+fail: -+ if (sc->sc_cid >= 0) -+ crypto_unregister_all(sc->sc_cid); -+ if (sc->sc_irq != -1) -+ free_irq(sc->sc_irq, sc); -+ -+#if 0 -+ if (sc->sc_dma) { -+ /* Turn off DMA polling */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | -+ HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE); -+ -+ pci_free_consistent(sc->sc_pcidev, -+ sizeof(*sc->sc_dma), -+ sc->sc_dma, sc->sc_dma_physaddr); -+ } -+#endif -+ kfree(sc); -+ return (-ENXIO); -+} -+ -+/* -+ * Detach an interface that successfully probed. -+ */ -+static void -+hipp_remove(struct pci_dev *dev) -+{ -+ struct hipp_softc *sc = pci_get_drvdata(dev); -+ unsigned long l_flags; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ /* disable interrupts */ -+ HIPP_LOCK(sc); -+ -+#if 0 -+ WRITE_REG_1(sc, HIFN_1_DMA_IER, 0); -+ HIFN_UNLOCK(sc); -+ -+ /*XXX other resources */ -+ del_timer_sync(&sc->sc_tickto); -+ -+ /* Turn off DMA polling */ -+ WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | -+ HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE); -+#endif -+ -+ crypto_unregister_all(sc->sc_cid); -+ -+ free_irq(sc->sc_irq, sc); -+ -+#if 0 -+ pci_free_consistent(sc->sc_pcidev, sizeof(*sc->sc_dma), -+ sc->sc_dma, sc->sc_dma_physaddr); -+#endif -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19) -+static irqreturn_t hipp_intr(int irq, void *arg) -+#else -+static irqreturn_t hipp_intr(int irq, void *arg, struct pt_regs *regs) -+#endif -+{ -+ struct hipp_softc *sc = arg; -+ -+ sc = sc; /* shut up compiler */ -+ -+ return IRQ_HANDLED; -+} -+ -+static struct pci_device_id hipp_pci_tbl[] = { -+ { PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7855, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ { PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_8155, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+}; -+MODULE_DEVICE_TABLE(pci, hipp_pci_tbl); -+ -+static struct pci_driver hipp_driver = { -+ .name = "hipp", -+ .id_table = hipp_pci_tbl, -+ .probe = hipp_probe, -+ .remove = hipp_remove, -+ /* add PM stuff here one day */ -+}; -+ -+static int __init hipp_init (void) -+{ -+ struct hipp_softc *sc = NULL; -+ int rc; -+ -+ DPRINTF("%s(%p)\n", __FUNCTION__, hipp_init); -+ -+ rc = pci_register_driver(&hipp_driver); -+ pci_register_driver_compat(&hipp_driver, rc); -+ -+ return rc; -+} -+ -+static void __exit hipp_exit (void) -+{ -+ pci_unregister_driver(&hipp_driver); -+} -+ -+module_init(hipp_init); -+module_exit(hipp_exit); -+ -+MODULE_LICENSE("BSD"); -+MODULE_AUTHOR("Michael Richardson <mcr@xelerance.com>"); -+MODULE_DESCRIPTION("OCF driver for hifn HIPP-I/II PCI crypto devices"); -diff --git a/crypto/ocf/hifn/hifnHIPPreg.h b/crypto/ocf/hifn/hifnHIPPreg.h -new file mode 100644 -index 0000000..8c0e720 ---- /dev/null -+++ b/crypto/ocf/hifn/hifnHIPPreg.h -@@ -0,0 +1,46 @@ -+/*- -+ * Hifn HIPP-I/HIPP-II (7855/8155) driver. -+ * Copyright (c) 2006 Michael Richardson <mcr@xelerance.com> -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored by Hifn inc. -+ * -+ */ -+ -+#ifndef __HIFNHIPP_H__ -+#define __HIFNHIPP_H__ -+ -+/* -+ * PCI vendor and device identifiers -+ */ -+#define PCI_VENDOR_HIFN 0x13a3 /* Hifn */ -+#define PCI_PRODUCT_HIFN_6500 0x0006 /* 6500 */ -+#define PCI_PRODUCT_HIFN_7855 0x001f /* 7855 */ -+#define PCI_PRODUCT_HIFN_8155 0x999 /* XXX 8155 */ -+ -+#define HIPP_1_REVID 0x01 /* BOGUS */ -+ -+#endif /* __HIPP_H__ */ -diff --git a/crypto/ocf/hifn/hifnHIPPvar.h b/crypto/ocf/hifn/hifnHIPPvar.h -new file mode 100644 -index 0000000..dde47f7 ---- /dev/null -+++ b/crypto/ocf/hifn/hifnHIPPvar.h -@@ -0,0 +1,93 @@ -+/* -+ * Hifn HIPP-I/HIPP-II (7855/8155) driver. -+ * Copyright (c) 2006 Michael Richardson <mcr@xelerance.com> * -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * Effort sponsored by Hifn inc. -+ * -+ */ -+ -+#ifndef __HIFNHIPPVAR_H__ -+#define __HIFNHIPPVAR_H__ -+ -+#define HIPP_MAX_CHIPS 8 -+ -+/* -+ * Holds data specific to a single Hifn HIPP-I board. -+ */ -+struct hipp_softc { -+ softc_device_decl sc_dev; -+ -+ struct pci_dev *sc_pcidev; /* device backpointer */ -+ ocf_iomem_t sc_bar[5]; -+ caddr_t sc_barphy[5]; /* physical address */ -+ int sc_num; /* for multiple devs */ -+ spinlock_t sc_mtx; /* per-instance lock */ -+ int32_t sc_cid; -+ int sc_irq; -+ -+#if 0 -+ -+ u_int32_t sc_dmaier; -+ u_int32_t sc_drammodel; /* 1=dram, 0=sram */ -+ u_int32_t sc_pllconfig; /* 7954/7955/7956 PLL config */ -+ -+ struct hifn_dma *sc_dma; -+ dma_addr_t sc_dma_physaddr;/* physical address of sc_dma */ -+ -+ int sc_dmansegs; -+ int sc_maxses; -+ int sc_nsessions; -+ struct hifn_session *sc_sessions; -+ int sc_ramsize; -+ int sc_flags; -+#define HIFN_HAS_RNG 0x1 /* includes random number generator */ -+#define HIFN_HAS_PUBLIC 0x2 /* includes public key support */ -+#define HIFN_HAS_AES 0x4 /* includes AES support */ -+#define HIFN_IS_7811 0x8 /* Hifn 7811 part */ -+#define HIFN_IS_7956 0x10 /* Hifn 7956/7955 don't have SDRAM */ -+ -+ struct timer_list sc_tickto; /* for managing DMA */ -+ -+ int sc_rngfirst; -+ int sc_rnghz; /* RNG polling frequency */ -+ -+ int sc_c_busy; /* command ring busy */ -+ int sc_s_busy; /* source data ring busy */ -+ int sc_d_busy; /* destination data ring busy */ -+ int sc_r_busy; /* result ring busy */ -+ int sc_active; /* for initial countdown */ -+ int sc_needwakeup; /* ops q'd wating on resources */ -+ int sc_curbatch; /* # ops submitted w/o int */ -+ int sc_suspended; -+ struct miscdevice sc_miscdev; -+#endif -+}; -+ -+#define HIPP_LOCK(_sc) spin_lock_irqsave(&(_sc)->sc_mtx, l_flags) -+#define HIPP_UNLOCK(_sc) spin_unlock_irqrestore(&(_sc)->sc_mtx, l_flags) -+ -+#endif /* __HIFNHIPPVAR_H__ */ -diff --git a/crypto/ocf/ixp4xx/Makefile b/crypto/ocf/ixp4xx/Makefile -new file mode 100644 -index 0000000..d94a3b7 ---- /dev/null -+++ b/crypto/ocf/ixp4xx/Makefile -@@ -0,0 +1,104 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+# -+# You will need to point this at your Intel ixp425 includes, this portion -+# of the Makefile only really works under SGLinux with the appropriate libs -+# installed. They can be downloaded from http://www.snapgear.org/ -+# -+ifeq ($(CONFIG_CPU_IXP46X),y) -+IXPLATFORM = ixp46X -+else -+ifeq ($(CONFIG_CPU_IXP43X),y) -+IXPLATFORM = ixp43X -+else -+IXPLATFORM = ixp42X -+endif -+endif -+ -+ifdef CONFIG_IXP400_LIB_2_4 -+IX_XSCALE_SW = $(ROOTDIR)/modules/ixp425/ixp400-2.4/ixp400_xscale_sw -+OSAL_DIR = $(ROOTDIR)/modules/ixp425/ixp400-2.4/ixp_osal -+endif -+ifdef CONFIG_IXP400_LIB_2_1 -+IX_XSCALE_SW = $(ROOTDIR)/modules/ixp425/ixp400-2.1/ixp400_xscale_sw -+OSAL_DIR = $(ROOTDIR)/modules/ixp425/ixp400-2.1/ixp_osal -+endif -+ifdef CONFIG_IXP400_LIB_2_0 -+IX_XSCALE_SW = $(ROOTDIR)/modules/ixp425/ixp400-2.0/ixp400_xscale_sw -+OSAL_DIR = $(ROOTDIR)/modules/ixp425/ixp400-2.0/ixp_osal -+endif -+ifdef IX_XSCALE_SW -+ifdef CONFIG_IXP400_LIB_2_4 -+IXP_CFLAGS = \ -+ -I$(ROOTDIR)/. \ -+ -I$(IX_XSCALE_SW)/src/include \ -+ -I$(OSAL_DIR)/common/include/ \ -+ -I$(OSAL_DIR)/common/include/modules/ \ -+ -I$(OSAL_DIR)/common/include/modules/ddk/ \ -+ -I$(OSAL_DIR)/common/include/modules/bufferMgt/ \ -+ -I$(OSAL_DIR)/common/include/modules/ioMem/ \ -+ -I$(OSAL_DIR)/common/os/linux/include/ \ -+ -I$(OSAL_DIR)/common/os/linux/include/core/ \ -+ -I$(OSAL_DIR)/common/os/linux/include/modules/ \ -+ -I$(OSAL_DIR)/common/os/linux/include/modules/ddk/ \ -+ -I$(OSAL_DIR)/common/os/linux/include/modules/bufferMgt/ \ -+ -I$(OSAL_DIR)/common/os/linux/include/modules/ioMem/ \ -+ -I$(OSAL_DIR)/platforms/$(IXPLATFORM)/include/ \ -+ -I$(OSAL_DIR)/platforms/$(IXPLATFORM)/os/linux/include/ \ -+ -DENABLE_IOMEM -DENABLE_BUFFERMGT -DENABLE_DDK \ -+ -DUSE_IXP4XX_CRYPTO -+else -+IXP_CFLAGS = \ -+ -I$(ROOTDIR)/. \ -+ -I$(IX_XSCALE_SW)/src/include \ -+ -I$(OSAL_DIR)/ \ -+ -I$(OSAL_DIR)/os/linux/include/ \ -+ -I$(OSAL_DIR)/os/linux/include/modules/ \ -+ -I$(OSAL_DIR)/os/linux/include/modules/ioMem/ \ -+ -I$(OSAL_DIR)/os/linux/include/modules/bufferMgt/ \ -+ -I$(OSAL_DIR)/os/linux/include/core/ \ -+ -I$(OSAL_DIR)/os/linux/include/platforms/ \ -+ -I$(OSAL_DIR)/os/linux/include/platforms/ixp400/ \ -+ -I$(OSAL_DIR)/os/linux/include/platforms/ixp400/ixp425 \ -+ -I$(OSAL_DIR)/os/linux/include/platforms/ixp400/ixp465 \ -+ -I$(OSAL_DIR)/os/linux/include/core/ \ -+ -I$(OSAL_DIR)/include/ \ -+ -I$(OSAL_DIR)/include/modules/ \ -+ -I$(OSAL_DIR)/include/modules/bufferMgt/ \ -+ -I$(OSAL_DIR)/include/modules/ioMem/ \ -+ -I$(OSAL_DIR)/include/platforms/ \ -+ -I$(OSAL_DIR)/include/platforms/ixp400/ \ -+ -DUSE_IXP4XX_CRYPTO -+endif -+endif -+ifdef CONFIG_IXP400_LIB_1_4 -+IXP_CFLAGS = \ -+ -I$(ROOTDIR)/. \ -+ -I$(ROOTDIR)/modules/ixp425/ixp400-1.4/ixp400_xscale_sw/src/include \ -+ -I$(ROOTDIR)/modules/ixp425/ixp400-1.4/ixp400_xscale_sw/src/linux \ -+ -DUSE_IXP4XX_CRYPTO -+endif -+ifndef IXPDIR -+IXPDIR = ixp-version-is-not-supported -+endif -+ -+ifeq ($(CONFIG_CPU_IXP46X),y) -+IXP_CFLAGS += -D__ixp46X -+else -+ifeq ($(CONFIG_CPU_IXP43X),y) -+IXP_CFLAGS += -D__ixp43X -+else -+IXP_CFLAGS += -D__ixp42X -+endif -+endif -+ -+obj-$(CONFIG_OCF_IXP4XX) += ixp4xx.o -+ -+obj ?= . -+EXTRA_CFLAGS += $(IXP_CFLAGS) -I$(obj)/.. -I$(obj)/. -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/ixp4xx/ixp4xx.c b/crypto/ocf/ixp4xx/ixp4xx.c -new file mode 100644 -index 0000000..7af7b0a ---- /dev/null -+++ b/crypto/ocf/ixp4xx/ixp4xx.c -@@ -0,0 +1,1324 @@ -+/* -+ * An OCF module that uses Intels IXP CryptACC API to do the crypto. -+ * This driver requires the IXP400 Access Library that is available -+ * from Intel in order to operate (or compile). -+ * -+ * Written by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * -+ * LICENSE TERMS -+ * -+ * The free distribution and use of this software in both source and binary -+ * form is allowed (with or without changes) provided that: -+ * -+ * 1. distributions of this source code include the above copyright -+ * notice, this list of conditions and the following disclaimer; -+ * -+ * 2. distributions in binary form include the above copyright -+ * notice, this list of conditions and the following disclaimer -+ * in the documentation and/or other associated materials; -+ * -+ * 3. the copyright holder's name is not used to endorse products -+ * built using this software without specific written permission. -+ * -+ * ALTERNATIVELY, provided that this notice is retained in full, this product -+ * may be distributed under the terms of the GNU General Public License (GPL), -+ * in which case the provisions of the GPL apply INSTEAD OF those given above. -+ * -+ * DISCLAIMER -+ * -+ * This software is provided 'as is' with no explicit or implied warranties -+ * in respect of its properties, including, but not limited to, correctness -+ * and/or fitness for purpose. -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/sched.h> -+#include <linux/wait.h> -+#include <linux/crypto.h> -+#include <linux/interrupt.h> -+#include <asm/scatterlist.h> -+ -+#include <IxTypes.h> -+#include <IxOsBuffMgt.h> -+#include <IxNpeDl.h> -+#include <IxCryptoAcc.h> -+#include <IxQMgr.h> -+#include <IxOsServices.h> -+#include <IxOsCacheMMU.h> -+ -+#include <cryptodev.h> -+#include <uio.h> -+ -+#ifndef IX_MBUF_PRIV -+#define IX_MBUF_PRIV(x) ((x)->priv) -+#endif -+ -+struct ixp_data; -+ -+struct ixp_q { -+ struct list_head ixp_q_list; -+ struct ixp_data *ixp_q_data; -+ struct cryptop *ixp_q_crp; -+ struct cryptodesc *ixp_q_ccrd; -+ struct cryptodesc *ixp_q_acrd; -+ IX_MBUF ixp_q_mbuf; -+ UINT8 *ixp_hash_dest; /* Location for hash in client buffer */ -+ UINT8 *ixp_hash_src; /* Location of hash in internal buffer */ -+ unsigned char ixp_q_iv_data[IX_CRYPTO_ACC_MAX_CIPHER_IV_LENGTH]; -+ unsigned char *ixp_q_iv; -+}; -+ -+struct ixp_data { -+ int ixp_registered; /* is the context registered */ -+ int ixp_crd_flags; /* detect direction changes */ -+ -+ int ixp_cipher_alg; -+ int ixp_auth_alg; -+ -+ UINT32 ixp_ctx_id; -+ UINT32 ixp_hash_key_id; /* used when hashing */ -+ IxCryptoAccCtx ixp_ctx; -+ IX_MBUF ixp_pri_mbuf; -+ IX_MBUF ixp_sec_mbuf; -+ -+ struct work_struct ixp_pending_work; -+ struct work_struct ixp_registration_work; -+ struct list_head ixp_q; /* unprocessed requests */ -+}; -+ -+#ifdef __ixp46X -+ -+#define MAX_IOP_SIZE 64 /* words */ -+#define MAX_OOP_SIZE 128 -+ -+#define MAX_PARAMS 3 -+ -+struct ixp_pkq { -+ struct list_head pkq_list; -+ struct cryptkop *pkq_krp; -+ -+ IxCryptoAccPkeEauInOperands pkq_op; -+ IxCryptoAccPkeEauOpResult pkq_result; -+ -+ UINT32 pkq_ibuf0[MAX_IOP_SIZE]; -+ UINT32 pkq_ibuf1[MAX_IOP_SIZE]; -+ UINT32 pkq_ibuf2[MAX_IOP_SIZE]; -+ UINT32 pkq_obuf[MAX_OOP_SIZE]; -+}; -+ -+static LIST_HEAD(ixp_pkq); /* current PK wait list */ -+static struct ixp_pkq *ixp_pk_cur; -+static spinlock_t ixp_pkq_lock; -+ -+#endif /* __ixp46X */ -+ -+static int ixp_blocked = 0; -+ -+static int32_t ixp_id = -1; -+static struct ixp_data **ixp_sessions = NULL; -+static u_int32_t ixp_sesnum = 0; -+ -+static int ixp_process(device_t, struct cryptop *, int); -+static int ixp_newsession(device_t, u_int32_t *, struct cryptoini *); -+static int ixp_freesession(device_t, u_int64_t); -+#ifdef __ixp46X -+static int ixp_kprocess(device_t, struct cryptkop *krp, int hint); -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) -+static kmem_cache_t *qcache; -+#else -+static struct kmem_cache *qcache; -+#endif -+ -+#define debug ixp_debug -+static int ixp_debug = 0; -+module_param(ixp_debug, int, 0644); -+MODULE_PARM_DESC(ixp_debug, "Enable debug"); -+ -+static int ixp_init_crypto = 1; -+module_param(ixp_init_crypto, int, 0444); /* RO after load/boot */ -+MODULE_PARM_DESC(ixp_init_crypto, "Call ixCryptoAccInit (default is 1)"); -+ -+static void ixp_process_pending(void *arg); -+static void ixp_registration(void *arg); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+static void ixp_process_pending_wq(struct work_struct *work); -+static void ixp_registration_wq(struct work_struct *work); -+#endif -+ -+/* -+ * dummy device structure -+ */ -+ -+static struct { -+ softc_device_decl sc_dev; -+} ixpdev; -+ -+static device_method_t ixp_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, ixp_newsession), -+ DEVMETHOD(cryptodev_freesession,ixp_freesession), -+ DEVMETHOD(cryptodev_process, ixp_process), -+#ifdef __ixp46X -+ DEVMETHOD(cryptodev_kprocess, ixp_kprocess), -+#endif -+}; -+ -+/* -+ * Generate a new software session. -+ */ -+static int -+ixp_newsession(device_t dev, u_int32_t *sid, struct cryptoini *cri) -+{ -+ struct ixp_data *ixp; -+ u_int32_t i; -+#define AUTH_LEN(cri, def) \ -+ (cri->cri_mlen ? cri->cri_mlen : (def)) -+ -+ dprintk("%s():alg %d\n", __FUNCTION__,cri->cri_alg); -+ if (sid == NULL || cri == NULL) { -+ dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ if (ixp_sessions) { -+ for (i = 1; i < ixp_sesnum; i++) -+ if (ixp_sessions[i] == NULL) -+ break; -+ } else -+ i = 1; /* NB: to silence compiler warning */ -+ -+ if (ixp_sessions == NULL || i == ixp_sesnum) { -+ struct ixp_data **ixpd; -+ -+ if (ixp_sessions == NULL) { -+ i = 1; /* We leave ixp_sessions[0] empty */ -+ ixp_sesnum = CRYPTO_SW_SESSIONS; -+ } else -+ ixp_sesnum *= 2; -+ -+ ixpd = kmalloc(ixp_sesnum * sizeof(struct ixp_data *), SLAB_ATOMIC); -+ if (ixpd == NULL) { -+ /* Reset session number */ -+ if (ixp_sesnum == CRYPTO_SW_SESSIONS) -+ ixp_sesnum = 0; -+ else -+ ixp_sesnum /= 2; -+ dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ memset(ixpd, 0, ixp_sesnum * sizeof(struct ixp_data *)); -+ -+ /* Copy existing sessions */ -+ if (ixp_sessions) { -+ memcpy(ixpd, ixp_sessions, -+ (ixp_sesnum / 2) * sizeof(struct ixp_data *)); -+ kfree(ixp_sessions); -+ } -+ -+ ixp_sessions = ixpd; -+ } -+ -+ ixp_sessions[i] = (struct ixp_data *) kmalloc(sizeof(struct ixp_data), -+ SLAB_ATOMIC); -+ if (ixp_sessions[i] == NULL) { -+ ixp_freesession(NULL, i); -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ -+ *sid = i; -+ -+ ixp = ixp_sessions[i]; -+ memset(ixp, 0, sizeof(*ixp)); -+ -+ ixp->ixp_cipher_alg = -1; -+ ixp->ixp_auth_alg = -1; -+ ixp->ixp_ctx_id = -1; -+ INIT_LIST_HEAD(&ixp->ixp_q); -+ -+ ixp->ixp_ctx.useDifferentSrcAndDestMbufs = 0; -+ -+ while (cri) { -+ switch (cri->cri_alg) { -+ case CRYPTO_DES_CBC: -+ ixp->ixp_cipher_alg = cri->cri_alg; -+ ixp->ixp_ctx.cipherCtx.cipherAlgo = IX_CRYPTO_ACC_CIPHER_DES; -+ ixp->ixp_ctx.cipherCtx.cipherMode = IX_CRYPTO_ACC_MODE_CBC; -+ ixp->ixp_ctx.cipherCtx.cipherKeyLen = (cri->cri_klen + 7) / 8; -+ ixp->ixp_ctx.cipherCtx.cipherBlockLen = IX_CRYPTO_ACC_DES_BLOCK_64; -+ ixp->ixp_ctx.cipherCtx.cipherInitialVectorLen = -+ IX_CRYPTO_ACC_DES_IV_64; -+ memcpy(ixp->ixp_ctx.cipherCtx.key.cipherKey, -+ cri->cri_key, (cri->cri_klen + 7) / 8); -+ break; -+ -+ case CRYPTO_3DES_CBC: -+ ixp->ixp_cipher_alg = cri->cri_alg; -+ ixp->ixp_ctx.cipherCtx.cipherAlgo = IX_CRYPTO_ACC_CIPHER_3DES; -+ ixp->ixp_ctx.cipherCtx.cipherMode = IX_CRYPTO_ACC_MODE_CBC; -+ ixp->ixp_ctx.cipherCtx.cipherKeyLen = (cri->cri_klen + 7) / 8; -+ ixp->ixp_ctx.cipherCtx.cipherBlockLen = IX_CRYPTO_ACC_DES_BLOCK_64; -+ ixp->ixp_ctx.cipherCtx.cipherInitialVectorLen = -+ IX_CRYPTO_ACC_DES_IV_64; -+ memcpy(ixp->ixp_ctx.cipherCtx.key.cipherKey, -+ cri->cri_key, (cri->cri_klen + 7) / 8); -+ break; -+ -+ case CRYPTO_RIJNDAEL128_CBC: -+ ixp->ixp_cipher_alg = cri->cri_alg; -+ ixp->ixp_ctx.cipherCtx.cipherAlgo = IX_CRYPTO_ACC_CIPHER_AES; -+ ixp->ixp_ctx.cipherCtx.cipherMode = IX_CRYPTO_ACC_MODE_CBC; -+ ixp->ixp_ctx.cipherCtx.cipherKeyLen = (cri->cri_klen + 7) / 8; -+ ixp->ixp_ctx.cipherCtx.cipherBlockLen = 16; -+ ixp->ixp_ctx.cipherCtx.cipherInitialVectorLen = 16; -+ memcpy(ixp->ixp_ctx.cipherCtx.key.cipherKey, -+ cri->cri_key, (cri->cri_klen + 7) / 8); -+ break; -+ -+ case CRYPTO_MD5: -+ case CRYPTO_MD5_HMAC: -+ ixp->ixp_auth_alg = cri->cri_alg; -+ ixp->ixp_ctx.authCtx.authAlgo = IX_CRYPTO_ACC_AUTH_MD5; -+ ixp->ixp_ctx.authCtx.authDigestLen = AUTH_LEN(cri, MD5_HASH_LEN); -+ ixp->ixp_ctx.authCtx.aadLen = 0; -+ /* Only MD5_HMAC needs a key */ -+ if (cri->cri_alg == CRYPTO_MD5_HMAC) { -+ ixp->ixp_ctx.authCtx.authKeyLen = (cri->cri_klen + 7) / 8; -+ if (ixp->ixp_ctx.authCtx.authKeyLen > -+ sizeof(ixp->ixp_ctx.authCtx.key.authKey)) { -+ printk( -+ "ixp4xx: Invalid key length for MD5_HMAC - %d bits\n", -+ cri->cri_klen); -+ ixp_freesession(NULL, i); -+ return EINVAL; -+ } -+ memcpy(ixp->ixp_ctx.authCtx.key.authKey, -+ cri->cri_key, (cri->cri_klen + 7) / 8); -+ } -+ break; -+ -+ case CRYPTO_SHA1: -+ case CRYPTO_SHA1_HMAC: -+ ixp->ixp_auth_alg = cri->cri_alg; -+ ixp->ixp_ctx.authCtx.authAlgo = IX_CRYPTO_ACC_AUTH_SHA1; -+ ixp->ixp_ctx.authCtx.authDigestLen = AUTH_LEN(cri, SHA1_HASH_LEN); -+ ixp->ixp_ctx.authCtx.aadLen = 0; -+ /* Only SHA1_HMAC needs a key */ -+ if (cri->cri_alg == CRYPTO_SHA1_HMAC) { -+ ixp->ixp_ctx.authCtx.authKeyLen = (cri->cri_klen + 7) / 8; -+ if (ixp->ixp_ctx.authCtx.authKeyLen > -+ sizeof(ixp->ixp_ctx.authCtx.key.authKey)) { -+ printk( -+ "ixp4xx: Invalid key length for SHA1_HMAC - %d bits\n", -+ cri->cri_klen); -+ ixp_freesession(NULL, i); -+ return EINVAL; -+ } -+ memcpy(ixp->ixp_ctx.authCtx.key.authKey, -+ cri->cri_key, (cri->cri_klen + 7) / 8); -+ } -+ break; -+ -+ default: -+ printk("ixp: unknown algo 0x%x\n", cri->cri_alg); -+ ixp_freesession(NULL, i); -+ return EINVAL; -+ } -+ cri = cri->cri_next; -+ } -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+ INIT_WORK(&ixp->ixp_pending_work, ixp_process_pending_wq); -+ INIT_WORK(&ixp->ixp_registration_work, ixp_registration_wq); -+#else -+ INIT_WORK(&ixp->ixp_pending_work, ixp_process_pending, ixp); -+ INIT_WORK(&ixp->ixp_registration_work, ixp_registration, ixp); -+#endif -+ -+ return 0; -+} -+ -+ -+/* -+ * Free a session. -+ */ -+static int -+ixp_freesession(device_t dev, u_int64_t tid) -+{ -+ u_int32_t sid = CRYPTO_SESID2LID(tid); -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid > ixp_sesnum || ixp_sessions == NULL || -+ ixp_sessions[sid] == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ /* Silently accept and return */ -+ if (sid == 0) -+ return 0; -+ -+ if (ixp_sessions[sid]) { -+ if (ixp_sessions[sid]->ixp_ctx_id != -1) { -+ ixCryptoAccCtxUnregister(ixp_sessions[sid]->ixp_ctx_id); -+ ixp_sessions[sid]->ixp_ctx_id = -1; -+ } -+ kfree(ixp_sessions[sid]); -+ } -+ ixp_sessions[sid] = NULL; -+ if (ixp_blocked) { -+ ixp_blocked = 0; -+ crypto_unblock(ixp_id, CRYPTO_SYMQ); -+ } -+ return 0; -+} -+ -+ -+/* -+ * callback for when hash processing is complete -+ */ -+ -+static void -+ixp_hash_perform_cb( -+ UINT32 hash_key_id, -+ IX_MBUF *bufp, -+ IxCryptoAccStatus status) -+{ -+ struct ixp_q *q; -+ -+ dprintk("%s(%u, %p, 0x%x)\n", __FUNCTION__, hash_key_id, bufp, status); -+ -+ if (bufp == NULL) { -+ printk("ixp: NULL buf in %s\n", __FUNCTION__); -+ return; -+ } -+ -+ q = IX_MBUF_PRIV(bufp); -+ if (q == NULL) { -+ printk("ixp: NULL priv in %s\n", __FUNCTION__); -+ return; -+ } -+ -+ if (status == IX_CRYPTO_ACC_STATUS_SUCCESS) { -+ /* On success, need to copy hash back into original client buffer */ -+ memcpy(q->ixp_hash_dest, q->ixp_hash_src, -+ (q->ixp_q_data->ixp_auth_alg == CRYPTO_SHA1) ? -+ SHA1_HASH_LEN : MD5_HASH_LEN); -+ } -+ else { -+ printk("ixp: hash perform failed status=%d\n", status); -+ q->ixp_q_crp->crp_etype = EINVAL; -+ } -+ -+ /* Free internal buffer used for hashing */ -+ kfree(IX_MBUF_MDATA(&q->ixp_q_mbuf)); -+ -+ crypto_done(q->ixp_q_crp); -+ kmem_cache_free(qcache, q); -+} -+ -+/* -+ * setup a request and perform it -+ */ -+static void -+ixp_q_process(struct ixp_q *q) -+{ -+ IxCryptoAccStatus status; -+ struct ixp_data *ixp = q->ixp_q_data; -+ int auth_off = 0; -+ int auth_len = 0; -+ int crypt_off = 0; -+ int crypt_len = 0; -+ int icv_off = 0; -+ char *crypt_func; -+ -+ dprintk("%s(%p)\n", __FUNCTION__, q); -+ -+ if (q->ixp_q_ccrd) { -+ if (q->ixp_q_ccrd->crd_flags & CRD_F_IV_EXPLICIT) { -+ q->ixp_q_iv = q->ixp_q_ccrd->crd_iv; -+ } else { -+ q->ixp_q_iv = q->ixp_q_iv_data; -+ crypto_copydata(q->ixp_q_crp->crp_flags, q->ixp_q_crp->crp_buf, -+ q->ixp_q_ccrd->crd_inject, -+ ixp->ixp_ctx.cipherCtx.cipherInitialVectorLen, -+ (caddr_t) q->ixp_q_iv); -+ } -+ -+ if (q->ixp_q_acrd) { -+ auth_off = q->ixp_q_acrd->crd_skip; -+ auth_len = q->ixp_q_acrd->crd_len; -+ icv_off = q->ixp_q_acrd->crd_inject; -+ } -+ -+ crypt_off = q->ixp_q_ccrd->crd_skip; -+ crypt_len = q->ixp_q_ccrd->crd_len; -+ } else { /* if (q->ixp_q_acrd) */ -+ auth_off = q->ixp_q_acrd->crd_skip; -+ auth_len = q->ixp_q_acrd->crd_len; -+ icv_off = q->ixp_q_acrd->crd_inject; -+ } -+ -+ if (q->ixp_q_crp->crp_flags & CRYPTO_F_SKBUF) { -+ struct sk_buff *skb = (struct sk_buff *) q->ixp_q_crp->crp_buf; -+ if (skb_shinfo(skb)->nr_frags) { -+ /* -+ * DAVIDM fix this limitation one day by using -+ * a buffer pool and chaining, it is not currently -+ * needed for current user/kernel space acceleration -+ */ -+ printk("ixp: Cannot handle fragmented skb's yet !\n"); -+ q->ixp_q_crp->crp_etype = ENOENT; -+ goto done; -+ } -+ IX_MBUF_MLEN(&q->ixp_q_mbuf) = -+ IX_MBUF_PKT_LEN(&q->ixp_q_mbuf) = skb->len; -+ IX_MBUF_MDATA(&q->ixp_q_mbuf) = skb->data; -+ } else if (q->ixp_q_crp->crp_flags & CRYPTO_F_IOV) { -+ struct uio *uiop = (struct uio *) q->ixp_q_crp->crp_buf; -+ if (uiop->uio_iovcnt != 1) { -+ /* -+ * DAVIDM fix this limitation one day by using -+ * a buffer pool and chaining, it is not currently -+ * needed for current user/kernel space acceleration -+ */ -+ printk("ixp: Cannot handle more than 1 iovec yet !\n"); -+ q->ixp_q_crp->crp_etype = ENOENT; -+ goto done; -+ } -+ IX_MBUF_MLEN(&q->ixp_q_mbuf) = -+ IX_MBUF_PKT_LEN(&q->ixp_q_mbuf) = uiop->uio_iov[0].iov_len; -+ IX_MBUF_MDATA(&q->ixp_q_mbuf) = uiop->uio_iov[0].iov_base; -+ } else /* contig buffer */ { -+ IX_MBUF_MLEN(&q->ixp_q_mbuf) = -+ IX_MBUF_PKT_LEN(&q->ixp_q_mbuf) = q->ixp_q_crp->crp_ilen; -+ IX_MBUF_MDATA(&q->ixp_q_mbuf) = q->ixp_q_crp->crp_buf; -+ } -+ -+ IX_MBUF_PRIV(&q->ixp_q_mbuf) = q; -+ -+ if (ixp->ixp_auth_alg == CRYPTO_SHA1 || ixp->ixp_auth_alg == CRYPTO_MD5) { -+ /* -+ * For SHA1 and MD5 hash, need to create an internal buffer that is big -+ * enough to hold the original data + the appropriate padding for the -+ * hash algorithm. -+ */ -+ UINT8 *tbuf = NULL; -+ -+ IX_MBUF_MLEN(&q->ixp_q_mbuf) = IX_MBUF_PKT_LEN(&q->ixp_q_mbuf) = -+ ((IX_MBUF_MLEN(&q->ixp_q_mbuf) * 8) + 72 + 511) / 8; -+ tbuf = kmalloc(IX_MBUF_MLEN(&q->ixp_q_mbuf), SLAB_ATOMIC); -+ -+ if (IX_MBUF_MDATA(&q->ixp_q_mbuf) == NULL) { -+ printk("ixp: kmalloc(%u, SLAB_ATOMIC) failed\n", -+ IX_MBUF_MLEN(&q->ixp_q_mbuf)); -+ q->ixp_q_crp->crp_etype = ENOMEM; -+ goto done; -+ } -+ memcpy(tbuf, &(IX_MBUF_MDATA(&q->ixp_q_mbuf))[auth_off], auth_len); -+ -+ /* Set location in client buffer to copy hash into */ -+ q->ixp_hash_dest = -+ &(IX_MBUF_MDATA(&q->ixp_q_mbuf))[auth_off + auth_len]; -+ -+ IX_MBUF_MDATA(&q->ixp_q_mbuf) = tbuf; -+ -+ /* Set location in internal buffer for where hash starts */ -+ q->ixp_hash_src = &(IX_MBUF_MDATA(&q->ixp_q_mbuf))[auth_len]; -+ -+ crypt_func = "ixCryptoAccHashPerform"; -+ status = ixCryptoAccHashPerform(ixp->ixp_ctx.authCtx.authAlgo, -+ &q->ixp_q_mbuf, ixp_hash_perform_cb, 0, auth_len, auth_len, -+ &ixp->ixp_hash_key_id); -+ } -+ else { -+ crypt_func = "ixCryptoAccAuthCryptPerform"; -+ status = ixCryptoAccAuthCryptPerform(ixp->ixp_ctx_id, &q->ixp_q_mbuf, -+ NULL, auth_off, auth_len, crypt_off, crypt_len, icv_off, -+ q->ixp_q_iv); -+ } -+ -+ if (IX_CRYPTO_ACC_STATUS_SUCCESS == status) -+ return; -+ -+ if (IX_CRYPTO_ACC_STATUS_QUEUE_FULL == status) { -+ q->ixp_q_crp->crp_etype = ENOMEM; -+ goto done; -+ } -+ -+ printk("ixp: %s failed %u\n", crypt_func, status); -+ q->ixp_q_crp->crp_etype = EINVAL; -+ -+done: -+ crypto_done(q->ixp_q_crp); -+ kmem_cache_free(qcache, q); -+} -+ -+ -+/* -+ * because we cannot process the Q from the Register callback -+ * we do it here on a task Q. -+ */ -+ -+static void -+ixp_process_pending(void *arg) -+{ -+ struct ixp_data *ixp = arg; -+ struct ixp_q *q = NULL; -+ -+ dprintk("%s(%p)\n", __FUNCTION__, arg); -+ -+ if (!ixp) -+ return; -+ -+ while (!list_empty(&ixp->ixp_q)) { -+ q = list_entry(ixp->ixp_q.next, struct ixp_q, ixp_q_list); -+ list_del(&q->ixp_q_list); -+ ixp_q_process(q); -+ } -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+static void -+ixp_process_pending_wq(struct work_struct *work) -+{ -+ struct ixp_data *ixp = container_of(work, struct ixp_data, ixp_pending_work); -+ ixp_process_pending(ixp); -+} -+#endif -+ -+/* -+ * callback for when context registration is complete -+ */ -+ -+static void -+ixp_register_cb(UINT32 ctx_id, IX_MBUF *bufp, IxCryptoAccStatus status) -+{ -+ int i; -+ struct ixp_data *ixp; -+ struct ixp_q *q; -+ -+ dprintk("%s(%d, %p, %d)\n", __FUNCTION__, ctx_id, bufp, status); -+ -+ /* -+ * free any buffer passed in to this routine -+ */ -+ if (bufp) { -+ IX_MBUF_MLEN(bufp) = IX_MBUF_PKT_LEN(bufp) = 0; -+ kfree(IX_MBUF_MDATA(bufp)); -+ IX_MBUF_MDATA(bufp) = NULL; -+ } -+ -+ for (i = 0; i < ixp_sesnum; i++) { -+ ixp = ixp_sessions[i]; -+ if (ixp && ixp->ixp_ctx_id == ctx_id) -+ break; -+ } -+ if (i >= ixp_sesnum) { -+ printk("ixp: invalid context id %d\n", ctx_id); -+ return; -+ } -+ -+ if (IX_CRYPTO_ACC_STATUS_WAIT == status) { -+ /* this is normal to free the first of two buffers */ -+ dprintk("ixp: register not finished yet.\n"); -+ return; -+ } -+ -+ if (IX_CRYPTO_ACC_STATUS_SUCCESS != status) { -+ printk("ixp: register failed 0x%x\n", status); -+ while (!list_empty(&ixp->ixp_q)) { -+ q = list_entry(ixp->ixp_q.next, struct ixp_q, ixp_q_list); -+ list_del(&q->ixp_q_list); -+ q->ixp_q_crp->crp_etype = EINVAL; -+ crypto_done(q->ixp_q_crp); -+ kmem_cache_free(qcache, q); -+ } -+ return; -+ } -+ -+ /* -+ * we are now registered, we cannot start processing the Q here -+ * or we get strange errors with AES (DES/3DES seem to be ok). -+ */ -+ ixp->ixp_registered = 1; -+ schedule_work(&ixp->ixp_pending_work); -+} -+ -+ -+/* -+ * callback for when data processing is complete -+ */ -+ -+static void -+ixp_perform_cb( -+ UINT32 ctx_id, -+ IX_MBUF *sbufp, -+ IX_MBUF *dbufp, -+ IxCryptoAccStatus status) -+{ -+ struct ixp_q *q; -+ -+ dprintk("%s(%d, %p, %p, 0x%x)\n", __FUNCTION__, ctx_id, sbufp, -+ dbufp, status); -+ -+ if (sbufp == NULL) { -+ printk("ixp: NULL sbuf in ixp_perform_cb\n"); -+ return; -+ } -+ -+ q = IX_MBUF_PRIV(sbufp); -+ if (q == NULL) { -+ printk("ixp: NULL priv in ixp_perform_cb\n"); -+ return; -+ } -+ -+ if (status != IX_CRYPTO_ACC_STATUS_SUCCESS) { -+ printk("ixp: perform failed status=%d\n", status); -+ q->ixp_q_crp->crp_etype = EINVAL; -+ } -+ -+ crypto_done(q->ixp_q_crp); -+ kmem_cache_free(qcache, q); -+} -+ -+ -+/* -+ * registration is not callable at IRQ time, so we defer -+ * to a task queue, this routines completes the registration for us -+ * when the task queue runs -+ * -+ * Unfortunately this means we cannot tell OCF that the driver is blocked, -+ * we do that on the next request. -+ */ -+ -+static void -+ixp_registration(void *arg) -+{ -+ struct ixp_data *ixp = arg; -+ struct ixp_q *q = NULL; -+ IX_MBUF *pri = NULL, *sec = NULL; -+ int status = IX_CRYPTO_ACC_STATUS_SUCCESS; -+ -+ if (!ixp) { -+ printk("ixp: ixp_registration with no arg\n"); -+ return; -+ } -+ -+ if (ixp->ixp_ctx_id != -1) { -+ ixCryptoAccCtxUnregister(ixp->ixp_ctx_id); -+ ixp->ixp_ctx_id = -1; -+ } -+ -+ if (list_empty(&ixp->ixp_q)) { -+ printk("ixp: ixp_registration with no Q\n"); -+ return; -+ } -+ -+ /* -+ * setup the primary and secondary buffers -+ */ -+ q = list_entry(ixp->ixp_q.next, struct ixp_q, ixp_q_list); -+ if (q->ixp_q_acrd) { -+ pri = &ixp->ixp_pri_mbuf; -+ sec = &ixp->ixp_sec_mbuf; -+ IX_MBUF_MLEN(pri) = IX_MBUF_PKT_LEN(pri) = 128; -+ IX_MBUF_MDATA(pri) = (unsigned char *) kmalloc(128, SLAB_ATOMIC); -+ IX_MBUF_MLEN(sec) = IX_MBUF_PKT_LEN(sec) = 128; -+ IX_MBUF_MDATA(sec) = (unsigned char *) kmalloc(128, SLAB_ATOMIC); -+ } -+ -+ /* Only need to register if a crypt op or HMAC op */ -+ if (!(ixp->ixp_auth_alg == CRYPTO_SHA1 || -+ ixp->ixp_auth_alg == CRYPTO_MD5)) { -+ status = ixCryptoAccCtxRegister( -+ &ixp->ixp_ctx, -+ pri, sec, -+ ixp_register_cb, -+ ixp_perform_cb, -+ &ixp->ixp_ctx_id); -+ } -+ else { -+ /* Otherwise we start processing pending q */ -+ schedule_work(&ixp->ixp_pending_work); -+ } -+ -+ if (IX_CRYPTO_ACC_STATUS_SUCCESS == status) -+ return; -+ -+ if (IX_CRYPTO_ACC_STATUS_EXCEED_MAX_TUNNELS == status) { -+ printk("ixp: ixCryptoAccCtxRegister failed (out of tunnels)\n"); -+ ixp_blocked = 1; -+ /* perhaps we should return EGAIN on queued ops ? */ -+ return; -+ } -+ -+ printk("ixp: ixCryptoAccCtxRegister failed %d\n", status); -+ ixp->ixp_ctx_id = -1; -+ -+ /* -+ * everything waiting is toasted -+ */ -+ while (!list_empty(&ixp->ixp_q)) { -+ q = list_entry(ixp->ixp_q.next, struct ixp_q, ixp_q_list); -+ list_del(&q->ixp_q_list); -+ q->ixp_q_crp->crp_etype = ENOENT; -+ crypto_done(q->ixp_q_crp); -+ kmem_cache_free(qcache, q); -+ } -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+static void -+ixp_registration_wq(struct work_struct *work) -+{ -+ struct ixp_data *ixp = container_of(work, struct ixp_data, -+ ixp_registration_work); -+ ixp_registration(ixp); -+} -+#endif -+ -+/* -+ * Process a request. -+ */ -+static int -+ixp_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ struct ixp_data *ixp; -+ unsigned int lid; -+ struct ixp_q *q = NULL; -+ int status; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ /* Sanity check */ -+ if (crp == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ crp->crp_etype = 0; -+ -+ if (ixp_blocked) -+ return ERESTART; -+ -+ if (crp->crp_desc == NULL || crp->crp_buf == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+ /* -+ * find the session we are using -+ */ -+ -+ lid = crp->crp_sid & 0xffffffff; -+ if (lid >= ixp_sesnum || lid == 0 || ixp_sessions == NULL || -+ ixp_sessions[lid] == NULL) { -+ crp->crp_etype = ENOENT; -+ dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__); -+ goto done; -+ } -+ ixp = ixp_sessions[lid]; -+ -+ /* -+ * setup a new request ready for queuing -+ */ -+ q = kmem_cache_alloc(qcache, SLAB_ATOMIC); -+ if (q == NULL) { -+ dprintk("%s,%d: ENOMEM\n", __FILE__, __LINE__); -+ crp->crp_etype = ENOMEM; -+ goto done; -+ } -+ /* -+ * save some cycles by only zeroing the important bits -+ */ -+ memset(&q->ixp_q_mbuf, 0, sizeof(q->ixp_q_mbuf)); -+ q->ixp_q_ccrd = NULL; -+ q->ixp_q_acrd = NULL; -+ q->ixp_q_crp = crp; -+ q->ixp_q_data = ixp; -+ -+ /* -+ * point the cipher and auth descriptors appropriately -+ * check that we have something to do -+ */ -+ if (crp->crp_desc->crd_alg == ixp->ixp_cipher_alg) -+ q->ixp_q_ccrd = crp->crp_desc; -+ else if (crp->crp_desc->crd_alg == ixp->ixp_auth_alg) -+ q->ixp_q_acrd = crp->crp_desc; -+ else { -+ crp->crp_etype = ENOENT; -+ dprintk("%s,%d: bad desc match: ENOENT\n", __FILE__, __LINE__); -+ goto done; -+ } -+ if (crp->crp_desc->crd_next) { -+ if (crp->crp_desc->crd_next->crd_alg == ixp->ixp_cipher_alg) -+ q->ixp_q_ccrd = crp->crp_desc->crd_next; -+ else if (crp->crp_desc->crd_next->crd_alg == ixp->ixp_auth_alg) -+ q->ixp_q_acrd = crp->crp_desc->crd_next; -+ else { -+ crp->crp_etype = ENOENT; -+ dprintk("%s,%d: bad desc match: ENOENT\n", __FILE__, __LINE__); -+ goto done; -+ } -+ } -+ -+ /* -+ * If there is a direction change for this context then we mark it as -+ * unregistered and re-register is for the new direction. This is not -+ * a very expensive operation and currently only tends to happen when -+ * user-space application are doing benchmarks -+ * -+ * DM - we should be checking for pending requests before unregistering. -+ */ -+ if (q->ixp_q_ccrd && ixp->ixp_registered && -+ ixp->ixp_crd_flags != (q->ixp_q_ccrd->crd_flags & CRD_F_ENCRYPT)) { -+ dprintk("%s - detected direction change on session\n", __FUNCTION__); -+ ixp->ixp_registered = 0; -+ } -+ -+ /* -+ * if we are registered, call straight into the perform code -+ */ -+ if (ixp->ixp_registered) { -+ ixp_q_process(q); -+ return 0; -+ } -+ -+ /* -+ * the only part of the context not set in newsession is the direction -+ * dependent parts -+ */ -+ if (q->ixp_q_ccrd) { -+ ixp->ixp_crd_flags = (q->ixp_q_ccrd->crd_flags & CRD_F_ENCRYPT); -+ if (q->ixp_q_ccrd->crd_flags & CRD_F_ENCRYPT) { -+ ixp->ixp_ctx.operation = q->ixp_q_acrd ? -+ IX_CRYPTO_ACC_OP_ENCRYPT_AUTH : IX_CRYPTO_ACC_OP_ENCRYPT; -+ } else { -+ ixp->ixp_ctx.operation = q->ixp_q_acrd ? -+ IX_CRYPTO_ACC_OP_AUTH_DECRYPT : IX_CRYPTO_ACC_OP_DECRYPT; -+ } -+ } else { -+ /* q->ixp_q_acrd must be set if we are here */ -+ ixp->ixp_ctx.operation = IX_CRYPTO_ACC_OP_AUTH_CALC; -+ } -+ -+ status = list_empty(&ixp->ixp_q); -+ list_add_tail(&q->ixp_q_list, &ixp->ixp_q); -+ if (status) -+ schedule_work(&ixp->ixp_registration_work); -+ return 0; -+ -+done: -+ if (q) -+ kmem_cache_free(qcache, q); -+ crypto_done(crp); -+ return 0; -+} -+ -+ -+#ifdef __ixp46X -+/* -+ * key processing support for the ixp465 -+ */ -+ -+ -+/* -+ * copy a BN (LE) into a buffer (BE) an fill out the op appropriately -+ * assume zeroed and only copy bits that are significant -+ */ -+ -+static int -+ixp_copy_ibuf(struct crparam *p, IxCryptoAccPkeEauOperand *op, UINT32 *buf) -+{ -+ unsigned char *src = (unsigned char *) p->crp_p; -+ unsigned char *dst; -+ int len, bits = p->crp_nbits; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if (bits > MAX_IOP_SIZE * sizeof(UINT32) * 8) { -+ dprintk("%s - ibuf too big (%d > %d)\n", __FUNCTION__, -+ bits, MAX_IOP_SIZE * sizeof(UINT32) * 8); -+ return -1; -+ } -+ -+ len = (bits + 31) / 32; /* the number UINT32's needed */ -+ -+ dst = (unsigned char *) &buf[len]; -+ dst--; -+ -+ while (bits > 0) { -+ *dst-- = *src++; -+ bits -= 8; -+ } -+ -+#if 0 /* no need to zero remaining bits as it is done during request alloc */ -+ while (dst > (unsigned char *) buf) -+ *dst-- = '\0'; -+#endif -+ -+ op->pData = buf; -+ op->dataLen = len; -+ return 0; -+} -+ -+/* -+ * copy out the result, be as forgiving as we can about small output buffers -+ */ -+ -+static int -+ixp_copy_obuf(struct crparam *p, IxCryptoAccPkeEauOpResult *op, UINT32 *buf) -+{ -+ unsigned char *dst = (unsigned char *) p->crp_p; -+ unsigned char *src = (unsigned char *) buf; -+ int len, z, bits = p->crp_nbits; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ len = op->dataLen * sizeof(UINT32); -+ -+ /* skip leading zeroes to be small buffer friendly */ -+ z = 0; -+ while (z < len && src[z] == '\0') -+ z++; -+ -+ src += len; -+ src--; -+ len -= z; -+ -+ while (len > 0 && bits > 0) { -+ *dst++ = *src--; -+ len--; -+ bits -= 8; -+ } -+ -+ while (bits > 0) { -+ *dst++ = '\0'; -+ bits -= 8; -+ } -+ -+ if (len > 0) { -+ dprintk("%s - obuf is %d (z=%d, ob=%d) bytes too small\n", -+ __FUNCTION__, len, z, p->crp_nbits / 8); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+ -+/* -+ * the parameter offsets for exp_mod -+ */ -+ -+#define IXP_PARAM_BASE 0 -+#define IXP_PARAM_EXP 1 -+#define IXP_PARAM_MOD 2 -+#define IXP_PARAM_RES 3 -+ -+/* -+ * key processing complete callback, is also used to start processing -+ * by passing a NULL for pResult -+ */ -+ -+static void -+ixp_kperform_cb( -+ IxCryptoAccPkeEauOperation operation, -+ IxCryptoAccPkeEauOpResult *pResult, -+ BOOL carryOrBorrow, -+ IxCryptoAccStatus status) -+{ -+ struct ixp_pkq *q, *tmp; -+ unsigned long flags; -+ -+ dprintk("%s(0x%x, %p, %d, 0x%x)\n", __FUNCTION__, operation, pResult, -+ carryOrBorrow, status); -+ -+ /* handle a completed request */ -+ if (pResult) { -+ if (ixp_pk_cur && &ixp_pk_cur->pkq_result == pResult) { -+ q = ixp_pk_cur; -+ if (status != IX_CRYPTO_ACC_STATUS_SUCCESS) { -+ dprintk("%s() - op failed 0x%x\n", __FUNCTION__, status); -+ q->pkq_krp->krp_status = ERANGE; /* could do better */ -+ } else { -+ /* copy out the result */ -+ if (ixp_copy_obuf(&q->pkq_krp->krp_param[IXP_PARAM_RES], -+ &q->pkq_result, q->pkq_obuf)) -+ q->pkq_krp->krp_status = ERANGE; -+ } -+ crypto_kdone(q->pkq_krp); -+ kfree(q); -+ ixp_pk_cur = NULL; -+ } else -+ printk("%s - callback with invalid result pointer\n", __FUNCTION__); -+ } -+ -+ spin_lock_irqsave(&ixp_pkq_lock, flags); -+ if (ixp_pk_cur || list_empty(&ixp_pkq)) { -+ spin_unlock_irqrestore(&ixp_pkq_lock, flags); -+ return; -+ } -+ -+ list_for_each_entry_safe(q, tmp, &ixp_pkq, pkq_list) { -+ -+ list_del(&q->pkq_list); -+ ixp_pk_cur = q; -+ -+ spin_unlock_irqrestore(&ixp_pkq_lock, flags); -+ -+ status = ixCryptoAccPkeEauPerform( -+ IX_CRYPTO_ACC_OP_EAU_MOD_EXP, -+ &q->pkq_op, -+ ixp_kperform_cb, -+ &q->pkq_result); -+ -+ if (status == IX_CRYPTO_ACC_STATUS_SUCCESS) { -+ dprintk("%s() - ixCryptoAccPkeEauPerform SUCCESS\n", __FUNCTION__); -+ return; /* callback will return here for callback */ -+ } else if (status == IX_CRYPTO_ACC_STATUS_RETRY) { -+ printk("%s() - ixCryptoAccPkeEauPerform RETRY\n", __FUNCTION__); -+ } else { -+ printk("%s() - ixCryptoAccPkeEauPerform failed %d\n", -+ __FUNCTION__, status); -+ } -+ q->pkq_krp->krp_status = ERANGE; /* could do better */ -+ crypto_kdone(q->pkq_krp); -+ kfree(q); -+ spin_lock_irqsave(&ixp_pkq_lock, flags); -+ } -+ spin_unlock_irqrestore(&ixp_pkq_lock, flags); -+} -+ -+ -+static int -+ixp_kprocess(device_t dev, struct cryptkop *krp, int hint) -+{ -+ struct ixp_pkq *q; -+ int rc = 0; -+ unsigned long flags; -+ -+ dprintk("%s l1=%d l2=%d l3=%d l4=%d\n", __FUNCTION__, -+ krp->krp_param[IXP_PARAM_BASE].crp_nbits, -+ krp->krp_param[IXP_PARAM_EXP].crp_nbits, -+ krp->krp_param[IXP_PARAM_MOD].crp_nbits, -+ krp->krp_param[IXP_PARAM_RES].crp_nbits); -+ -+ -+ if (krp->krp_op != CRK_MOD_EXP) { -+ krp->krp_status = EOPNOTSUPP; -+ goto err; -+ } -+ -+ q = (struct ixp_pkq *) kmalloc(sizeof(*q), GFP_KERNEL); -+ if (q == NULL) { -+ krp->krp_status = ENOMEM; -+ goto err; -+ } -+ -+ /* -+ * The PKE engine does not appear to zero the output buffer -+ * appropriately, so we need to do it all here. -+ */ -+ memset(q, 0, sizeof(*q)); -+ -+ q->pkq_krp = krp; -+ INIT_LIST_HEAD(&q->pkq_list); -+ -+ if (ixp_copy_ibuf(&krp->krp_param[IXP_PARAM_BASE], &q->pkq_op.modExpOpr.M, -+ q->pkq_ibuf0)) -+ rc = 1; -+ if (!rc && ixp_copy_ibuf(&krp->krp_param[IXP_PARAM_EXP], -+ &q->pkq_op.modExpOpr.e, q->pkq_ibuf1)) -+ rc = 2; -+ if (!rc && ixp_copy_ibuf(&krp->krp_param[IXP_PARAM_MOD], -+ &q->pkq_op.modExpOpr.N, q->pkq_ibuf2)) -+ rc = 3; -+ -+ if (rc) { -+ kfree(q); -+ krp->krp_status = ERANGE; -+ goto err; -+ } -+ -+ q->pkq_result.pData = q->pkq_obuf; -+ q->pkq_result.dataLen = -+ (krp->krp_param[IXP_PARAM_RES].crp_nbits + 31) / 32; -+ -+ spin_lock_irqsave(&ixp_pkq_lock, flags); -+ list_add_tail(&q->pkq_list, &ixp_pkq); -+ spin_unlock_irqrestore(&ixp_pkq_lock, flags); -+ -+ if (!ixp_pk_cur) -+ ixp_kperform_cb(0, NULL, 0, 0); -+ return (0); -+ -+err: -+ crypto_kdone(krp); -+ return (0); -+} -+ -+ -+ -+#ifdef CONFIG_OCF_RANDOMHARVEST -+/* -+ * We run the random number generator output through SHA so that it -+ * is FIPS compliant. -+ */ -+ -+static volatile int sha_done = 0; -+static unsigned char sha_digest[20]; -+ -+static void -+ixp_hash_cb(UINT8 *digest, IxCryptoAccStatus status) -+{ -+ dprintk("%s(%p, %d)\n", __FUNCTION__, digest, status); -+ if (sha_digest != digest) -+ printk("digest error\n"); -+ if (IX_CRYPTO_ACC_STATUS_SUCCESS == status) -+ sha_done = 1; -+ else -+ sha_done = -status; -+} -+ -+static int -+ixp_read_random(void *arg, u_int32_t *buf, int maxwords) -+{ -+ IxCryptoAccStatus status; -+ int i, n, rc; -+ -+ dprintk("%s(%p, %d)\n", __FUNCTION__, buf, maxwords); -+ memset(buf, 0, maxwords * sizeof(*buf)); -+ status = ixCryptoAccPkePseudoRandomNumberGet(maxwords, buf); -+ if (status != IX_CRYPTO_ACC_STATUS_SUCCESS) { -+ dprintk("%s: ixCryptoAccPkePseudoRandomNumberGet failed %d\n", -+ __FUNCTION__, status); -+ return 0; -+ } -+ -+ /* -+ * run the random data through SHA to make it look more random -+ */ -+ -+ n = sizeof(sha_digest); /* process digest bytes at a time */ -+ -+ rc = 0; -+ for (i = 0; i < maxwords; i += n / sizeof(*buf)) { -+ if ((maxwords - i) * sizeof(*buf) < n) -+ n = (maxwords - i) * sizeof(*buf); -+ sha_done = 0; -+ status = ixCryptoAccPkeHashPerform(IX_CRYPTO_ACC_AUTH_SHA1, -+ (UINT8 *) &buf[i], n, ixp_hash_cb, sha_digest); -+ if (status != IX_CRYPTO_ACC_STATUS_SUCCESS) { -+ dprintk("ixCryptoAccPkeHashPerform failed %d\n", status); -+ return -EIO; -+ } -+ while (!sha_done) -+ schedule(); -+ if (sha_done < 0) { -+ dprintk("ixCryptoAccPkeHashPerform failed CB %d\n", -sha_done); -+ return 0; -+ } -+ memcpy(&buf[i], sha_digest, n); -+ rc += n / sizeof(*buf);; -+ } -+ -+ return rc; -+} -+#endif /* CONFIG_OCF_RANDOMHARVEST */ -+ -+#endif /* __ixp46X */ -+ -+ -+ -+/* -+ * our driver startup and shutdown routines -+ */ -+ -+static int -+ixp_init(void) -+{ -+ dprintk("%s(%p)\n", __FUNCTION__, ixp_init); -+ -+ if (ixp_init_crypto && ixCryptoAccInit() != IX_CRYPTO_ACC_STATUS_SUCCESS) -+ printk("ixCryptoAccInit failed, assuming already initialised!\n"); -+ -+ qcache = kmem_cache_create("ixp4xx_q", sizeof(struct ixp_q), 0, -+ SLAB_HWCACHE_ALIGN, NULL -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) -+ , NULL -+#endif -+ ); -+ if (!qcache) { -+ printk("failed to create Qcache\n"); -+ return -ENOENT; -+ } -+ -+ memset(&ixpdev, 0, sizeof(ixpdev)); -+ softc_device_init(&ixpdev, "ixp4xx", 0, ixp_methods); -+ -+ ixp_id = crypto_get_driverid(softc_get_device(&ixpdev), -+ CRYPTOCAP_F_HARDWARE); -+ if (ixp_id < 0) -+ panic("IXP/OCF crypto device cannot initialize!"); -+ -+#define REGISTER(alg) \ -+ crypto_register(ixp_id,alg,0,0) -+ -+ REGISTER(CRYPTO_DES_CBC); -+ REGISTER(CRYPTO_3DES_CBC); -+ REGISTER(CRYPTO_RIJNDAEL128_CBC); -+#ifdef CONFIG_OCF_IXP4XX_SHA1_MD5 -+ REGISTER(CRYPTO_MD5); -+ REGISTER(CRYPTO_SHA1); -+#endif -+ REGISTER(CRYPTO_MD5_HMAC); -+ REGISTER(CRYPTO_SHA1_HMAC); -+#undef REGISTER -+ -+#ifdef __ixp46X -+ spin_lock_init(&ixp_pkq_lock); -+ /* -+ * we do not enable the go fast options here as they can potentially -+ * allow timing based attacks -+ * -+ * http://www.openssl.org/news/secadv_20030219.txt -+ */ -+ ixCryptoAccPkeEauExpConfig(0, 0); -+ crypto_kregister(ixp_id, CRK_MOD_EXP, 0); -+#ifdef CONFIG_OCF_RANDOMHARVEST -+ crypto_rregister(ixp_id, ixp_read_random, NULL); -+#endif -+#endif -+ -+ return 0; -+} -+ -+static void -+ixp_exit(void) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ crypto_unregister_all(ixp_id); -+ ixp_id = -1; -+ kmem_cache_destroy(qcache); -+ qcache = NULL; -+} -+ -+module_init(ixp_init); -+module_exit(ixp_exit); -+ -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_AUTHOR("David McCullough <dmccullough@cyberguard.com>"); -+MODULE_DESCRIPTION("ixp (OCF module for IXP4xx crypto)"); -diff --git a/crypto/ocf/kirkwood/Makefile b/crypto/ocf/kirkwood/Makefile -new file mode 100644 -index 0000000..6dafd00 ---- /dev/null -+++ b/crypto/ocf/kirkwood/Makefile -@@ -0,0 +1,19 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+obj-$(CONFIG_OCF_KIRKWOOD) += mv_cesa.o -+ -+mv_cesa-y := cesa/mvCesa.o cesa/mvLru.o cesa/mvMD5.o cesa/mvSHA1.o cesa/AES/mvAesAlg.o cesa/AES/mvAesApi.o cesa/mvCesaDebug.o cesa_ocf_drv.o -+ -+# Extra objects required by the CESA driver -+mv_cesa-y += mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.o mvHal/kw_family/boardEnv/mvBoardEnvLib.o mvHal/mv_hal/twsi/mvTwsi.o mvHal/kw_family/ctrlEnv/sys/mvCpuIf.o mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.o mvHal/kw_family/ctrlEnv/sys/mvSysDram.o mvHal/linux_oss/mvOs.o mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.o mvHal/mv_hal/gpp/mvGpp.o mvHal/kw_family/ctrlEnv/sys/mvSysPex.o mvHal/mv_hal/pex/mvPex.o mvHal/kw_family/boardEnv/mvBoardEnvSpec.o mvHal/common/mvCommon.o mvHal/common/mvDebug.o mvHal/kw_family/ctrlEnv/sys/mvSysCesa.o -+ -+ifdef src -+EXTRA_CFLAGS += -I$(src)/.. -I$(src)/cesa -I$(src)/mvHal -I$(src)/mvHal/common -I$(src)/mvHal/kw_family -I$(src)/mvHal/mv_hal -I$(src)/mvHal/linux_oss -I$(src) -+endif -+ -+EXTRA_CFLAGS += -DMV_LINUX -DMV_CPU_LE -DMV_ARM -DMV_INCLUDE_CESA -DMV_INCLUDE_PEX -DMV_CACHE_COHERENCY=3 -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/kirkwood/cesa/AES/mvAes.h b/crypto/ocf/kirkwood/cesa/AES/mvAes.h -new file mode 100644 -index 0000000..969727f ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/AES/mvAes.h -@@ -0,0 +1,62 @@ -+/* mvAes.h v2.0 August '99 -+ * Reference ANSI C code -+ */ -+ -+/* AES Cipher header file for ANSI C Submissions -+ Lawrence E. Bassham III -+ Computer Security Division -+ National Institute of Standards and Technology -+ -+ April 15, 1998 -+ -+ This sample is to assist implementers developing to the Cryptographic -+API Profile for AES Candidate Algorithm Submissions. Please consult this -+document as a cross-reference. -+ -+ ANY CHANGES, WHERE APPROPRIATE, TO INFORMATION PROVIDED IN THIS FILE -+MUST BE DOCUMENTED. CHANGES ARE ONLY APPROPRIATE WHERE SPECIFIED WITH -+THE STRING "CHANGE POSSIBLE". FUNCTION CALLS AND THEIR PARAMETERS CANNOT -+BE CHANGED. STRUCTURES CAN BE ALTERED TO ALLOW IMPLEMENTERS TO INCLUDE -+IMPLEMENTATION SPECIFIC INFORMATION. -+*/ -+ -+/* Includes: -+ Standard include files -+*/ -+ -+#include "mvOs.h" -+ -+ -+/* Error Codes - CHANGE POSSIBLE: inclusion of additional error codes */ -+ -+/* Key direction is invalid, e.g., unknown value */ -+#define AES_BAD_KEY_DIR -1 -+ -+/* Key material not of correct length */ -+#define AES_BAD_KEY_MAT -2 -+ -+/* Key passed is not valid */ -+#define AES_BAD_KEY_INSTANCE -3 -+ -+/* Params struct passed to cipherInit invalid */ -+#define AES_BAD_CIPHER_MODE -4 -+ -+/* Cipher in wrong state (e.g., not initialized) */ -+#define AES_BAD_CIPHER_STATE -5 -+ -+#define AES_BAD_CIPHER_INSTANCE -7 -+ -+ -+/* Function protoypes */ -+/* CHANGED: makeKey(): parameter blockLen added -+ this parameter is absolutely necessary if you want to -+ setup the round keys in a variable block length setting -+ cipherInit(): parameter blockLen added (for obvious reasons) -+ */ -+int aesMakeKey(MV_U8 *expandedKey, MV_U8 *keyMaterial, int keyLen, int blockLen); -+int aesBlockEncrypt128(MV_U8 mode, MV_U8 *IV, MV_U8 *expandedKey, int keyLen, -+ MV_U32 *plain, int numBlocks, MV_U32 *cipher); -+int aesBlockDecrypt128(MV_U8 mode, MV_U8 *IV, MV_U8 *expandedKey, int keyLen, -+ MV_U32 *plain, int numBlocks, MV_U32 *cipher); -+ -+ -diff --git a/crypto/ocf/kirkwood/cesa/AES/mvAesAlg.c b/crypto/ocf/kirkwood/cesa/AES/mvAesAlg.c -new file mode 100644 -index 0000000..2f57e4f ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/AES/mvAesAlg.c -@@ -0,0 +1,317 @@ -+/* rijndael-alg-ref.c v2.0 August '99 -+ * Reference ANSI C code -+ * authors: Paulo Barreto -+ * Vincent Rijmen, K.U.Leuven -+ * -+ * This code is placed in the public domain. -+ */ -+ -+#include "mvOs.h" -+ -+#include "mvAesAlg.h" -+ -+#include "mvAesBoxes.dat" -+ -+ -+MV_U8 mul1(MV_U8 aa, MV_U8 bb); -+void KeyAddition(MV_U8 a[4][MAXBC], MV_U8 rk[4][MAXBC], MV_U8 BC); -+void ShiftRow128Enc(MV_U8 a[4][MAXBC]); -+void ShiftRow128Dec(MV_U8 a[4][MAXBC]); -+void Substitution(MV_U8 a[4][MAXBC], MV_U8 box[256]); -+void MixColumn(MV_U8 a[4][MAXBC], MV_U8 rk[4][MAXBC]); -+void InvMixColumn(MV_U8 a[4][MAXBC]); -+ -+ -+#define mul(aa, bb) (mask[bb] & Alogtable[aa + Logtable[bb]]) -+ -+MV_U8 mul1(MV_U8 aa, MV_U8 bb) -+{ -+ return mask[bb] & Alogtable[aa + Logtable[bb]]; -+} -+ -+ -+void KeyAddition(MV_U8 a[4][MAXBC], MV_U8 rk[4][MAXBC], MV_U8 BC) -+{ -+ /* Exor corresponding text input and round key input bytes -+ */ -+ ((MV_U32*)(&(a[0][0])))[0] ^= ((MV_U32*)(&(rk[0][0])))[0]; -+ ((MV_U32*)(&(a[1][0])))[0] ^= ((MV_U32*)(&(rk[1][0])))[0]; -+ ((MV_U32*)(&(a[2][0])))[0] ^= ((MV_U32*)(&(rk[2][0])))[0]; -+ ((MV_U32*)(&(a[3][0])))[0] ^= ((MV_U32*)(&(rk[3][0])))[0]; -+ -+} -+ -+void ShiftRow128Enc(MV_U8 a[4][MAXBC]) { -+ /* Row 0 remains unchanged -+ * The other three rows are shifted a variable amount -+ */ -+ MV_U8 tmp[MAXBC]; -+ -+ tmp[0] = a[1][1]; -+ tmp[1] = a[1][2]; -+ tmp[2] = a[1][3]; -+ tmp[3] = a[1][0]; -+ -+ ((MV_U32*)(&(a[1][0])))[0] = ((MV_U32*)(&(tmp[0])))[0]; -+ /* -+ a[1][0] = tmp[0]; -+ a[1][1] = tmp[1]; -+ a[1][2] = tmp[2]; -+ a[1][3] = tmp[3]; -+ */ -+ tmp[0] = a[2][2]; -+ tmp[1] = a[2][3]; -+ tmp[2] = a[2][0]; -+ tmp[3] = a[2][1]; -+ -+ ((MV_U32*)(&(a[2][0])))[0] = ((MV_U32*)(&(tmp[0])))[0]; -+ /* -+ a[2][0] = tmp[0]; -+ a[2][1] = tmp[1]; -+ a[2][2] = tmp[2]; -+ a[2][3] = tmp[3]; -+ */ -+ tmp[0] = a[3][3]; -+ tmp[1] = a[3][0]; -+ tmp[2] = a[3][1]; -+ tmp[3] = a[3][2]; -+ -+ ((MV_U32*)(&(a[3][0])))[0] = ((MV_U32*)(&(tmp[0])))[0]; -+ /* -+ a[3][0] = tmp[0]; -+ a[3][1] = tmp[1]; -+ a[3][2] = tmp[2]; -+ a[3][3] = tmp[3]; -+ */ -+} -+ -+void ShiftRow128Dec(MV_U8 a[4][MAXBC]) { -+ /* Row 0 remains unchanged -+ * The other three rows are shifted a variable amount -+ */ -+ MV_U8 tmp[MAXBC]; -+ -+ tmp[0] = a[1][3]; -+ tmp[1] = a[1][0]; -+ tmp[2] = a[1][1]; -+ tmp[3] = a[1][2]; -+ -+ ((MV_U32*)(&(a[1][0])))[0] = ((MV_U32*)(&(tmp[0])))[0]; -+ /* -+ a[1][0] = tmp[0]; -+ a[1][1] = tmp[1]; -+ a[1][2] = tmp[2]; -+ a[1][3] = tmp[3]; -+ */ -+ -+ tmp[0] = a[2][2]; -+ tmp[1] = a[2][3]; -+ tmp[2] = a[2][0]; -+ tmp[3] = a[2][1]; -+ -+ ((MV_U32*)(&(a[2][0])))[0] = ((MV_U32*)(&(tmp[0])))[0]; -+ /* -+ a[2][0] = tmp[0]; -+ a[2][1] = tmp[1]; -+ a[2][2] = tmp[2]; -+ a[2][3] = tmp[3]; -+ */ -+ -+ tmp[0] = a[3][1]; -+ tmp[1] = a[3][2]; -+ tmp[2] = a[3][3]; -+ tmp[3] = a[3][0]; -+ -+ ((MV_U32*)(&(a[3][0])))[0] = ((MV_U32*)(&(tmp[0])))[0]; -+ /* -+ a[3][0] = tmp[0]; -+ a[3][1] = tmp[1]; -+ a[3][2] = tmp[2]; -+ a[3][3] = tmp[3]; -+ */ -+} -+ -+void Substitution(MV_U8 a[4][MAXBC], MV_U8 box[256]) { -+ /* Replace every byte of the input by the byte at that place -+ * in the nonlinear S-box -+ */ -+ int i, j; -+ -+ for(i = 0; i < 4; i++) -+ for(j = 0; j < 4; j++) a[i][j] = box[a[i][j]] ; -+} -+ -+void MixColumn(MV_U8 a[4][MAXBC], MV_U8 rk[4][MAXBC]) { -+ /* Mix the four bytes of every column in a linear way -+ */ -+ MV_U8 b[4][MAXBC]; -+ int i, j; -+ -+ for(j = 0; j < 4; j++){ -+ b[0][j] = mul(25,a[0][j]) ^ mul(1,a[1][j]) ^ a[2][j] ^ a[3][j]; -+ b[1][j] = mul(25,a[1][j]) ^ mul(1,a[2][j]) ^ a[3][j] ^ a[0][j]; -+ b[2][j] = mul(25,a[2][j]) ^ mul(1,a[3][j]) ^ a[0][j] ^ a[1][j]; -+ b[3][j] = mul(25,a[3][j]) ^ mul(1,a[0][j]) ^ a[1][j] ^ a[2][j]; -+ } -+ for(i = 0; i < 4; i++) -+ /*for(j = 0; j < BC; j++) a[i][j] = b[i][j];*/ -+ ((MV_U32*)(&(a[i][0])))[0] = ((MV_U32*)(&(b[i][0])))[0] ^ ((MV_U32*)(&(rk[i][0])))[0];; -+} -+ -+void InvMixColumn(MV_U8 a[4][MAXBC]) { -+ /* Mix the four bytes of every column in a linear way -+ * This is the opposite operation of Mixcolumn -+ */ -+ MV_U8 b[4][MAXBC]; -+ int i, j; -+ -+ for(j = 0; j < 4; j++){ -+ b[0][j] = mul(223,a[0][j]) ^ mul(104,a[1][j]) ^ mul(238,a[2][j]) ^ mul(199,a[3][j]); -+ b[1][j] = mul(223,a[1][j]) ^ mul(104,a[2][j]) ^ mul(238,a[3][j]) ^ mul(199,a[0][j]); -+ b[2][j] = mul(223,a[2][j]) ^ mul(104,a[3][j]) ^ mul(238,a[0][j]) ^ mul(199,a[1][j]); -+ b[3][j] = mul(223,a[3][j]) ^ mul(104,a[0][j]) ^ mul(238,a[1][j]) ^ mul(199,a[2][j]); -+ } -+ for(i = 0; i < 4; i++) -+ /*for(j = 0; j < BC; j++) a[i][j] = b[i][j];*/ -+ ((MV_U32*)(&(a[i][0])))[0] = ((MV_U32*)(&(b[i][0])))[0]; -+} -+ -+int rijndaelKeySched (MV_U8 k[4][MAXKC], int keyBits, int blockBits, MV_U8 W[MAXROUNDS+1][4][MAXBC]) -+{ -+ /* Calculate the necessary round keys -+ * The number of calculations depends on keyBits and blockBits -+ */ -+ int KC, BC, ROUNDS; -+ int i, j, t, rconpointer = 0; -+ MV_U8 tk[4][MAXKC]; -+ -+ switch (keyBits) { -+ case 128: KC = 4; break; -+ case 192: KC = 6; break; -+ case 256: KC = 8; break; -+ default : return (-1); -+ } -+ -+ switch (blockBits) { -+ case 128: BC = 4; break; -+ case 192: BC = 6; break; -+ case 256: BC = 8; break; -+ default : return (-2); -+ } -+ -+ switch (keyBits >= blockBits ? keyBits : blockBits) { -+ case 128: ROUNDS = 10; break; -+ case 192: ROUNDS = 12; break; -+ case 256: ROUNDS = 14; break; -+ default : return (-3); /* this cannot happen */ -+ } -+ -+ -+ for(j = 0; j < KC; j++) -+ for(i = 0; i < 4; i++) -+ tk[i][j] = k[i][j]; -+ t = 0; -+ /* copy values into round key array */ -+ for(j = 0; (j < KC) && (t < (ROUNDS+1)*BC); j++, t++) -+ for(i = 0; i < 4; i++) W[t / BC][i][t % BC] = tk[i][j]; -+ -+ while (t < (ROUNDS+1)*BC) { /* while not enough round key material calculated */ -+ /* calculate new values */ -+ for(i = 0; i < 4; i++) -+ tk[i][0] ^= S[tk[(i+1)%4][KC-1]]; -+ tk[0][0] ^= rcon[rconpointer++]; -+ -+ if (KC != 8) -+ for(j = 1; j < KC; j++) -+ for(i = 0; i < 4; i++) tk[i][j] ^= tk[i][j-1]; -+ else { -+ for(j = 1; j < KC/2; j++) -+ for(i = 0; i < 4; i++) tk[i][j] ^= tk[i][j-1]; -+ for(i = 0; i < 4; i++) tk[i][KC/2] ^= S[tk[i][KC/2 - 1]]; -+ for(j = KC/2 + 1; j < KC; j++) -+ for(i = 0; i < 4; i++) tk[i][j] ^= tk[i][j-1]; -+ } -+ /* copy values into round key array */ -+ for(j = 0; (j < KC) && (t < (ROUNDS+1)*BC); j++, t++) -+ for(i = 0; i < 4; i++) W[t / BC][i][t % BC] = tk[i][j]; -+ } -+ -+ return 0; -+} -+ -+ -+ -+int rijndaelEncrypt128(MV_U8 a[4][MAXBC], MV_U8 rk[MAXROUNDS+1][4][MAXBC], int rounds) -+{ -+ /* Encryption of one block. -+ */ -+ int r, BC, ROUNDS; -+ -+ BC = 4; -+ ROUNDS = rounds; -+ -+ /* begin with a key addition -+ */ -+ -+ KeyAddition(a,rk[0],BC); -+ -+ /* ROUNDS-1 ordinary rounds -+ */ -+ for(r = 1; r < ROUNDS; r++) { -+ Substitution(a,S); -+ ShiftRow128Enc(a); -+ MixColumn(a, rk[r]); -+ /*KeyAddition(a,rk[r],BC);*/ -+ } -+ -+ /* Last round is special: there is no MixColumn -+ */ -+ Substitution(a,S); -+ ShiftRow128Enc(a); -+ KeyAddition(a,rk[ROUNDS],BC); -+ -+ return 0; -+} -+ -+ -+int rijndaelDecrypt128(MV_U8 a[4][MAXBC], MV_U8 rk[MAXROUNDS+1][4][MAXBC], int rounds) -+{ -+ int r, BC, ROUNDS; -+ -+ BC = 4; -+ ROUNDS = rounds; -+ -+ /* To decrypt: apply the inverse operations of the encrypt routine, -+ * in opposite order -+ * -+ * (KeyAddition is an involution: it 's equal to its inverse) -+ * (the inverse of Substitution with table S is Substitution with the inverse table of S) -+ * (the inverse of Shiftrow is Shiftrow over a suitable distance) -+ */ -+ -+ /* First the special round: -+ * without InvMixColumn -+ * with extra KeyAddition -+ */ -+ KeyAddition(a,rk[ROUNDS],BC); -+ ShiftRow128Dec(a); -+ Substitution(a,Si); -+ -+ /* ROUNDS-1 ordinary rounds -+ */ -+ for(r = ROUNDS-1; r > 0; r--) { -+ KeyAddition(a,rk[r],BC); -+ InvMixColumn(a); -+ ShiftRow128Dec(a); -+ Substitution(a,Si); -+ -+ } -+ -+ /* End with the extra key addition -+ */ -+ -+ KeyAddition(a,rk[0],BC); -+ -+ return 0; -+} -+ -diff --git a/crypto/ocf/kirkwood/cesa/AES/mvAesAlg.h b/crypto/ocf/kirkwood/cesa/AES/mvAesAlg.h -new file mode 100644 -index 0000000..ec81e40 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/AES/mvAesAlg.h -@@ -0,0 +1,19 @@ -+/* rijndael-alg-ref.h v2.0 August '99 -+ * Reference ANSI C code -+ * authors: Paulo Barreto -+ * Vincent Rijmen, K.U.Leuven -+ */ -+#ifndef __RIJNDAEL_ALG_H -+#define __RIJNDAEL_ALG_H -+ -+#define MAXBC (128/32) -+#define MAXKC (256/32) -+#define MAXROUNDS 14 -+ -+ -+int rijndaelKeySched (MV_U8 k[4][MAXKC], int keyBits, int blockBits, MV_U8 rk[MAXROUNDS+1][4][MAXBC]); -+ -+int rijndaelEncrypt128(MV_U8 a[4][MAXBC], MV_U8 rk[MAXROUNDS+1][4][MAXBC], int rounds); -+int rijndaelDecrypt128(MV_U8 a[4][MAXBC], MV_U8 rk[MAXROUNDS+1][4][MAXBC], int rounds); -+ -+#endif /* __RIJNDAEL_ALG_H */ -diff --git a/crypto/ocf/kirkwood/cesa/AES/mvAesApi.c b/crypto/ocf/kirkwood/cesa/AES/mvAesApi.c -new file mode 100644 -index 0000000..70ae60d ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/AES/mvAesApi.c -@@ -0,0 +1,312 @@ -+/* rijndael-api-ref.c v2.1 April 2000 -+ * Reference ANSI C code -+ * authors: v2.0 Paulo Barreto -+ * Vincent Rijmen, K.U.Leuven -+ * v2.1 Vincent Rijmen, K.U.Leuven -+ * -+ * This code is placed in the public domain. -+ */ -+#include "mvOs.h" -+ -+#include "mvAes.h" -+#include "mvAesAlg.h" -+ -+ -+/* Defines: -+ Add any additional defines you need -+*/ -+ -+#define MODE_ECB 1 /* Are we ciphering in ECB mode? */ -+#define MODE_CBC 2 /* Are we ciphering in CBC mode? */ -+#define MODE_CFB1 3 /* Are we ciphering in 1-bit CFB mode? */ -+ -+ -+int aesMakeKey(MV_U8 *expandedKey, MV_U8 *keyMaterial, int keyLen, int blockLen) -+{ -+ MV_U8 W[MAXROUNDS+1][4][MAXBC]; -+ MV_U8 k[4][MAXKC]; -+ MV_U8 j; -+ int i, rounds, KC; -+ -+ if (expandedKey == NULL) -+ { -+ return AES_BAD_KEY_INSTANCE; -+ } -+ -+ if (!((keyLen == 128) || (keyLen == 192) || (keyLen == 256))) -+ { -+ return AES_BAD_KEY_MAT; -+ } -+ -+ if (keyMaterial == NULL) -+ { -+ return AES_BAD_KEY_MAT; -+ } -+ -+ /* initialize key schedule: */ -+ for(i=0; i<keyLen/8; i++) -+ { -+ j = keyMaterial[i]; -+ k[i % 4][i / 4] = j; -+ } -+ -+ rijndaelKeySched (k, keyLen, blockLen, W); -+#ifdef MV_AES_DEBUG -+ { -+ MV_U8* pW = &W[0][0][0]; -+ int x; -+ -+ mvOsPrintf("Expended Key: size = %d\n", sizeof(W)); -+ for(i=0; i<sizeof(W); i++) -+ { -+ mvOsPrintf("%02x ", pW[i]); -+ } -+ for(i=0; i<MAXROUNDS+1; i++) -+ { -+ mvOsPrintf("\n Round #%02d: ", i); -+ for(x=0; x<MAXBC; x++) -+ { -+ mvOsPrintf("%02x%02x%02x%02x ", -+ W[i][0][x], W[i][1][x], W[i][2][x], W[i][3][x]); -+ } -+ mvOsPrintf("\n"); -+ } -+ } -+#endif /* MV_AES_DEBUG */ -+ switch (keyLen) -+ { -+ case 128: -+ rounds = 10; -+ KC = 4; -+ break; -+ case 192: -+ rounds = 12; -+ KC = 6; -+ break; -+ case 256: -+ rounds = 14; -+ KC = 8; -+ break; -+ default : -+ return (-1); -+ } -+ -+ for(i=0; i<MAXBC; i++) -+ { -+ for(j=0; j<4; j++) -+ { -+ expandedKey[i*4+j] = W[rounds][j][i]; -+ } -+ } -+ for(; i<KC; i++) -+ { -+ for(j=0; j<4; j++) -+ { -+ expandedKey[i*4+j] = W[rounds-1][j][i+MAXBC-KC]; -+ } -+ } -+ -+ -+ return 0; -+} -+ -+int aesBlockEncrypt128(MV_U8 mode, MV_U8 *IV, MV_U8 *expandedKey, int keyLen, -+ MV_U32 *plain, int numBlocks, MV_U32 *cipher) -+{ -+ int i, j, t; -+ MV_U8 block[4][MAXBC]; -+ int rounds; -+ char *input, *outBuffer; -+ -+ input = (char*)plain; -+ outBuffer = (char*)cipher; -+ -+ /* check parameter consistency: */ -+ if( (expandedKey == NULL) || ((keyLen != 128) && (keyLen != 192) && (keyLen != 256))) -+ { -+ return AES_BAD_KEY_MAT; -+ } -+ if ((mode != MODE_ECB && mode != MODE_CBC)) -+ { -+ return AES_BAD_CIPHER_STATE; -+ } -+ -+ switch (keyLen) -+ { -+ case 128: rounds = 10; break; -+ case 192: rounds = 12; break; -+ case 256: rounds = 14; break; -+ default : return (-3); /* this cannot happen */ -+ } -+ -+ -+ switch (mode) -+ { -+ case MODE_ECB: -+ for (i = 0; i < numBlocks; i++) -+ { -+ for (j = 0; j < 4; j++) -+ { -+ for(t = 0; t < 4; t++) -+ /* parse input stream into rectangular array */ -+ block[t][j] = input[16*i+4*j+t] & 0xFF; -+ } -+ rijndaelEncrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds); -+ for (j = 0; j < 4; j++) -+ { -+ /* parse rectangular array into output ciphertext bytes */ -+ for(t = 0; t < 4; t++) -+ outBuffer[16*i+4*j+t] = (MV_U8) block[t][j]; -+ -+ } -+ } -+ break; -+ -+ case MODE_CBC: -+ for (j = 0; j < 4; j++) -+ { -+ for(t = 0; t < 4; t++) -+ /* parse initial value into rectangular array */ -+ block[t][j] = IV[t+4*j] & 0xFF; -+ } -+ for (i = 0; i < numBlocks; i++) -+ { -+ for (j = 0; j < 4; j++) -+ { -+ for(t = 0; t < 4; t++) -+ /* parse input stream into rectangular array and exor with -+ IV or the previous ciphertext */ -+ block[t][j] ^= input[16*i+4*j+t] & 0xFF; -+ } -+ rijndaelEncrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds); -+ for (j = 0; j < 4; j++) -+ { -+ /* parse rectangular array into output ciphertext bytes */ -+ for(t = 0; t < 4; t++) -+ outBuffer[16*i+4*j+t] = (MV_U8) block[t][j]; -+ } -+ } -+ break; -+ -+ default: return AES_BAD_CIPHER_STATE; -+ } -+ -+ return 0; -+} -+ -+int aesBlockDecrypt128(MV_U8 mode, MV_U8 *IV, MV_U8 *expandedKey, int keyLen, -+ MV_U32 *srcData, int numBlocks, MV_U32 *dstData) -+{ -+ int i, j, t; -+ MV_U8 block[4][MAXBC]; -+ MV_U8 iv[4][MAXBC]; -+ int rounds; -+ char *input, *outBuffer; -+ -+ input = (char*)srcData; -+ outBuffer = (char*)dstData; -+ -+ if (expandedKey == NULL) -+ { -+ return AES_BAD_KEY_MAT; -+ } -+ -+ /* check parameter consistency: */ -+ if (keyLen != 128 && keyLen != 192 && keyLen != 256) -+ { -+ return AES_BAD_KEY_MAT; -+ } -+ if ((mode != MODE_ECB && mode != MODE_CBC)) -+ { -+ return AES_BAD_CIPHER_STATE; -+ } -+ -+ switch (keyLen) -+ { -+ case 128: rounds = 10; break; -+ case 192: rounds = 12; break; -+ case 256: rounds = 14; break; -+ default : return (-3); /* this cannot happen */ -+ } -+ -+ -+ switch (mode) -+ { -+ case MODE_ECB: -+ for (i = 0; i < numBlocks; i++) -+ { -+ for (j = 0; j < 4; j++) -+ { -+ for(t = 0; t < 4; t++) -+ { -+ /* parse input stream into rectangular array */ -+ block[t][j] = input[16*i+4*j+t] & 0xFF; -+ } -+ } -+ rijndaelDecrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds); -+ for (j = 0; j < 4; j++) -+ { -+ /* parse rectangular array into output ciphertext bytes */ -+ for(t = 0; t < 4; t++) -+ outBuffer[16*i+4*j+t] = (MV_U8) block[t][j]; -+ } -+ } -+ break; -+ -+ case MODE_CBC: -+ /* first block */ -+ for (j = 0; j < 4; j++) -+ { -+ for(t = 0; t < 4; t++) -+ { -+ /* parse input stream into rectangular array */ -+ block[t][j] = input[4*j+t] & 0xFF; -+ iv[t][j] = block[t][j]; -+ } -+ } -+ rijndaelDecrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds); -+ -+ for (j = 0; j < 4; j++) -+ { -+ /* exor the IV and parse rectangular array into output ciphertext bytes */ -+ for(t = 0; t < 4; t++) -+ { -+ outBuffer[4*j+t] = (MV_U8) (block[t][j] ^ IV[t+4*j]); -+ IV[t+4*j] = iv[t][j]; -+ } -+ } -+ -+ /* next blocks */ -+ for (i = 1; i < numBlocks; i++) -+ { -+ for (j = 0; j < 4; j++) -+ { -+ for(t = 0; t < 4; t++) -+ { -+ /* parse input stream into rectangular array */ -+ iv[t][j] = input[16*i+4*j+t] & 0xFF; -+ block[t][j] = iv[t][j]; -+ } -+ } -+ rijndaelDecrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds); -+ -+ for (j = 0; j < 4; j++) -+ { -+ /* exor previous ciphertext block and parse rectangular array -+ into output ciphertext bytes */ -+ for(t = 0; t < 4; t++) -+ { -+ outBuffer[16*i+4*j+t] = (MV_U8) (block[t][j] ^ IV[t+4*j]); -+ IV[t+4*j] = iv[t][j]; -+ } -+ } -+ } -+ break; -+ -+ default: return AES_BAD_CIPHER_STATE; -+ } -+ -+ return 0; -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/cesa/mvCesa.c b/crypto/ocf/kirkwood/cesa/mvCesa.c -new file mode 100644 -index 0000000..e09ad62 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvCesa.c -@@ -0,0 +1,3126 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "cesa/mvCesa.h" -+ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#undef CESA_DEBUG -+ -+ -+/********** Global variables **********/ -+ -+/* If request size is more than MV_CESA_MAX_BUF_SIZE the -+ * request is processed as fragmented request. -+ */ -+ -+MV_CESA_STATS cesaStats; -+ -+MV_BUF_INFO cesaSramSaBuf; -+short cesaLastSid = -1; -+MV_CESA_SA* pCesaSAD = NULL; -+MV_U16 cesaMaxSA = 0; -+ -+MV_CESA_REQ* pCesaReqFirst = NULL; -+MV_CESA_REQ* pCesaReqLast = NULL; -+MV_CESA_REQ* pCesaReqEmpty = NULL; -+MV_CESA_REQ* pCesaReqProcess = NULL; -+int cesaQueueDepth = 0; -+int cesaReqResources = 0; -+ -+MV_CESA_SRAM_MAP* cesaSramVirtPtr = NULL; -+MV_U32 cesaCryptEngBase = 0; -+void *cesaOsHandle = NULL; -+#if (MV_CESA_VERSION >= 3) -+MV_U32 cesaChainLength = 0; -+int chainReqNum = 0; -+MV_U32 chainIndex = 0; -+MV_CESA_REQ* pNextActiveChain = 0; -+MV_CESA_REQ* pEndCurrChain = 0; -+MV_BOOL isFirstReq = MV_TRUE; -+#endif -+ -+static INLINE MV_U8* mvCesaSramAddrGet(void) -+{ -+#ifdef MV_CESA_NO_SRAM -+ return (MV_U8*)cesaSramVirtPtr; -+#else -+ return (MV_U8*)cesaCryptEngBase; -+#endif /* MV_CESA_NO_SRAM */ -+} -+ -+static INLINE MV_ULONG mvCesaSramVirtToPhys(void* pDev, MV_U8* pSramVirt) -+{ -+#ifdef MV_CESA_NO_SRAM -+ return (MV_ULONG)mvOsIoVirtToPhy(NULL, pSramVirt); -+#else -+ return (MV_ULONG)pSramVirt; -+#endif /* MV_CESA_NO_SRAM */ -+} -+ -+/* Internal Function prototypes */ -+ -+static INLINE void mvCesaSramDescrBuild(MV_U32 config, int frag, -+ int cryptoOffset, int ivOffset, int cryptoLength, -+ int macOffset, int digestOffset, int macLength, int macTotalLen, -+ MV_CESA_REQ *pCesaReq, MV_DMA_DESC* pDmaDesc); -+ -+static INLINE void mvCesaSramSaUpdate(short sid, MV_DMA_DESC *pDmaDesc); -+ -+static INLINE int mvCesaDmaCopyPrepare(MV_CESA_MBUF* pMbuf, MV_U8* pSramBuf, -+ MV_DMA_DESC* pDmaDesc, MV_BOOL isToMbuf, -+ int offset, int copySize, MV_BOOL skipFlush); -+ -+static void mvCesaHmacIvGet(MV_CESA_MAC_MODE macMode, unsigned char key[], int keyLength, -+ unsigned char innerIV[], unsigned char outerIV[]); -+ -+static MV_STATUS mvCesaFragAuthComplete(MV_CESA_REQ* pReq, MV_CESA_SA* pSA, -+ int macDataSize); -+ -+static MV_CESA_COMMAND* mvCesaCtrModeInit(void); -+ -+static MV_STATUS mvCesaCtrModePrepare(MV_CESA_COMMAND *pCtrModeCmd, MV_CESA_COMMAND *pCmd); -+static MV_STATUS mvCesaCtrModeComplete(MV_CESA_COMMAND *pOrgCmd, MV_CESA_COMMAND *pCmd); -+static void mvCesaCtrModeFinish(MV_CESA_COMMAND *pCmd); -+ -+static INLINE MV_STATUS mvCesaReqProcess(MV_CESA_REQ* pReq); -+static MV_STATUS mvCesaFragReqProcess(MV_CESA_REQ* pReq, MV_U8 frag); -+ -+static INLINE MV_STATUS mvCesaParamCheck(MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd, MV_U8* pFixOffset); -+static INLINE MV_STATUS mvCesaFragParamCheck(MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd); -+ -+static INLINE void mvCesaFragSizeFind(MV_CESA_SA* pSA, MV_CESA_REQ* pReq, -+ int cryptoOffset, int macOffset, -+ int* pCopySize, int* pCryptoDataSize, int* pMacDataSize); -+static MV_STATUS mvCesaMbufCacheUnmap(MV_CESA_MBUF* pMbuf, int offset, int size); -+ -+ -+/* Go to the next request in the request queue */ -+static INLINE MV_CESA_REQ* MV_CESA_REQ_NEXT_PTR(MV_CESA_REQ* pReq) -+{ -+ if(pReq == pCesaReqLast) -+ return pCesaReqFirst; -+ -+ return pReq+1; -+} -+ -+#if (MV_CESA_VERSION >= 3) -+/* Go to the previous request in the request queue */ -+static INLINE MV_CESA_REQ* MV_CESA_REQ_PREV_PTR(MV_CESA_REQ* pReq) -+{ -+ if(pReq == pCesaReqFirst) -+ return pCesaReqLast; -+ -+ return pReq-1; -+} -+ -+#endif -+ -+ -+static INLINE void mvCesaReqProcessStart(MV_CESA_REQ* pReq) -+{ -+ int frag; -+ -+#if (MV_CESA_VERSION >= 3) -+ pReq->state = MV_CESA_CHAIN; -+#else -+ pReq->state = MV_CESA_PROCESS; -+#endif -+ cesaStats.startCount++; -+ -+ if(pReq->fragMode == MV_CESA_FRAG_NONE) -+ { -+ frag = 0; -+ } -+ else -+ { -+ frag = pReq->frags.nextFrag; -+ pReq->frags.nextFrag++; -+ } -+#if (MV_CESA_VERSION >= 2) -+ /* Enable TDMA engine */ -+ MV_REG_WRITE(MV_CESA_TDMA_CURR_DESC_PTR_REG, 0); -+ MV_REG_WRITE(MV_CESA_TDMA_NEXT_DESC_PTR_REG, -+ (MV_U32)mvCesaVirtToPhys(&pReq->dmaDescBuf, pReq->dma[frag].pDmaFirst)); -+#else -+ /* Enable IDMA engine */ -+ MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(0), 0); -+ MV_REG_WRITE(IDMA_NEXT_DESC_PTR_REG(0), -+ (MV_U32)mvCesaVirtToPhys(&pReq->dmaDescBuf, pReq->dma[frag].pDmaFirst)); -+#endif /* MV_CESA_VERSION >= 2 */ -+ -+#if defined(MV_BRIDGE_SYNC_REORDER) -+ mvOsBridgeReorderWA(); -+#endif -+ -+ /* Start Accelerator */ -+ MV_REG_WRITE(MV_CESA_CMD_REG, MV_CESA_CMD_CHAN_ENABLE_MASK); -+} -+ -+ -+/******************************************************************************* -+* mvCesaHalInit - Initialize the CESA driver -+* -+* DESCRIPTION: -+* This function initialize the CESA driver. -+* 1) Session database -+* 2) Request queue -+* 4) DMA descriptor lists - one list per request. Each list -+* has MV_CESA_MAX_DMA_DESC descriptors. -+* -+* INPUT: -+* numOfSession - maximum number of supported sessions -+* queueDepth - number of elements in the request queue. -+* pSramBase - virtual address of Sram -+* osHandle - A handle used by the OS to allocate memory for the -+* module (Passed to the OS Services layer) -+* -+* RETURN: -+* MV_OK - Success -+* MV_NO_RESOURCE - Fail, can't allocate resources: -+* Session database, request queue, -+* DMA descriptors list, LRU cache database. -+* MV_NOT_ALIGNED - Sram base address is not 8 byte aligned. -+* -+*******************************************************************************/ -+MV_STATUS mvCesaHalInit (int numOfSession, int queueDepth, char* pSramBase, MV_U32 cryptEngBase, -+ void *osHandle) -+{ -+ int i, req; -+ MV_U32 descOffsetReg, configReg; -+ MV_CESA_SRAM_SA *pSramSA; -+ -+ -+ mvOsPrintf("mvCesaInit: sessions=%d, queue=%d, pSram=%p\n", -+ numOfSession, queueDepth, pSramBase); -+ -+ cesaOsHandle = osHandle; -+ /* Create Session database */ -+ pCesaSAD = mvOsMalloc(sizeof(MV_CESA_SA)*numOfSession); -+ if(pCesaSAD == NULL) -+ { -+ mvOsPrintf("mvCesaInit: Can't allocate %u bytes for %d SAs\n", -+ sizeof(MV_CESA_SA)*numOfSession, numOfSession); -+ mvCesaFinish(); -+ return MV_NO_RESOURCE; -+ } -+ memset(pCesaSAD, 0, sizeof(MV_CESA_SA)*numOfSession); -+ cesaMaxSA = numOfSession; -+ -+ /* Allocate imag of sramSA in the DRAM */ -+ cesaSramSaBuf.bufSize = sizeof(MV_CESA_SRAM_SA)*numOfSession + -+ CPU_D_CACHE_LINE_SIZE; -+ -+ cesaSramSaBuf.bufVirtPtr = mvOsIoCachedMalloc(osHandle,cesaSramSaBuf.bufSize, -+ &cesaSramSaBuf.bufPhysAddr, -+ &cesaSramSaBuf.memHandle); -+ -+ if(cesaSramSaBuf.bufVirtPtr == NULL) -+ { -+ mvOsPrintf("mvCesaInit: Can't allocate %d bytes for sramSA structures\n", -+ cesaSramSaBuf.bufSize); -+ mvCesaFinish(); -+ return MV_NO_RESOURCE; -+ } -+ memset(cesaSramSaBuf.bufVirtPtr, 0, cesaSramSaBuf.bufSize); -+ pSramSA = (MV_CESA_SRAM_SA*)MV_ALIGN_UP((MV_ULONG)cesaSramSaBuf.bufVirtPtr, -+ CPU_D_CACHE_LINE_SIZE); -+ for(i=0; i<numOfSession; i++) -+ { -+ pCesaSAD[i].pSramSA = &pSramSA[i]; -+ } -+ -+ /* Create request queue */ -+ pCesaReqFirst = mvOsMalloc(sizeof(MV_CESA_REQ)*queueDepth); -+ if(pCesaReqFirst == NULL) -+ { -+ mvOsPrintf("mvCesaInit: Can't allocate %u bytes for %d requests\n", -+ sizeof(MV_CESA_REQ)*queueDepth, queueDepth); -+ mvCesaFinish(); -+ return MV_NO_RESOURCE; -+ } -+ memset(pCesaReqFirst, 0, sizeof(MV_CESA_REQ)*queueDepth); -+ pCesaReqEmpty = pCesaReqFirst; -+ pCesaReqLast = pCesaReqFirst + (queueDepth-1); -+ pCesaReqProcess = pCesaReqEmpty; -+ cesaQueueDepth = queueDepth; -+ cesaReqResources = queueDepth; -+#if (MV_CESA_VERSION >= 3) -+ cesaChainLength = MAX_CESA_CHAIN_LENGTH; -+#endif -+ /* pSramBase must be 8 byte aligned */ -+ if( MV_IS_NOT_ALIGN((MV_ULONG)pSramBase, 8) ) -+ { -+ mvOsPrintf("mvCesaInit: pSramBase (%p) must be 8 byte aligned\n", -+ pSramBase); -+ mvCesaFinish(); -+ return MV_NOT_ALIGNED; -+ } -+ cesaSramVirtPtr = (MV_CESA_SRAM_MAP*)pSramBase; -+ -+ cesaCryptEngBase = cryptEngBase; -+ -+ /*memset(cesaSramVirtPtr, 0, sizeof(MV_CESA_SRAM_MAP));*/ -+ -+ /* Clear registers */ -+ MV_REG_WRITE( MV_CESA_CFG_REG, 0); -+ MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0); -+ MV_REG_WRITE( MV_CESA_ISR_MASK_REG, 0); -+ -+ /* Initialize DMA descriptor lists for all requests in Request queue */ -+ descOffsetReg = configReg = 0; -+ for(req=0; req<queueDepth; req++) -+ { -+ int frag; -+ MV_CESA_REQ* pReq; -+ MV_DMA_DESC* pDmaDesc; -+ -+ pReq = &pCesaReqFirst[req]; -+ -+ pReq->cesaDescBuf.bufSize = sizeof(MV_CESA_DESC)*MV_CESA_MAX_REQ_FRAGS + -+ CPU_D_CACHE_LINE_SIZE; -+ -+ pReq->cesaDescBuf.bufVirtPtr = -+ mvOsIoCachedMalloc(osHandle,pReq->cesaDescBuf.bufSize, -+ &pReq->cesaDescBuf.bufPhysAddr, -+ &pReq->cesaDescBuf.memHandle); -+ -+ if(pReq->cesaDescBuf.bufVirtPtr == NULL) -+ { -+ mvOsPrintf("mvCesaInit: req=%d, Can't allocate %d bytes for CESA descriptors\n", -+ req, pReq->cesaDescBuf.bufSize); -+ mvCesaFinish(); -+ return MV_NO_RESOURCE; -+ } -+ memset(pReq->cesaDescBuf.bufVirtPtr, 0, pReq->cesaDescBuf.bufSize); -+ pReq->pCesaDesc = (MV_CESA_DESC*)MV_ALIGN_UP((MV_ULONG)pReq->cesaDescBuf.bufVirtPtr, -+ CPU_D_CACHE_LINE_SIZE); -+ -+ pReq->dmaDescBuf.bufSize = sizeof(MV_DMA_DESC)*MV_CESA_MAX_DMA_DESC*MV_CESA_MAX_REQ_FRAGS + -+ CPU_D_CACHE_LINE_SIZE; -+ -+ pReq->dmaDescBuf.bufVirtPtr = -+ mvOsIoCachedMalloc(osHandle,pReq->dmaDescBuf.bufSize, -+ &pReq->dmaDescBuf.bufPhysAddr, -+ &pReq->dmaDescBuf.memHandle); -+ -+ if(pReq->dmaDescBuf.bufVirtPtr == NULL) -+ { -+ mvOsPrintf("mvCesaInit: req=%d, Can't allocate %d bytes for DMA descriptor list\n", -+ req, pReq->dmaDescBuf.bufSize); -+ mvCesaFinish(); -+ return MV_NO_RESOURCE; -+ } -+ memset(pReq->dmaDescBuf.bufVirtPtr, 0, pReq->dmaDescBuf.bufSize); -+ pDmaDesc = (MV_DMA_DESC*)MV_ALIGN_UP((MV_ULONG)pReq->dmaDescBuf.bufVirtPtr, -+ CPU_D_CACHE_LINE_SIZE); -+ -+ for(frag=0; frag<MV_CESA_MAX_REQ_FRAGS; frag++) -+ { -+ MV_CESA_DMA* pDma = &pReq->dma[frag]; -+ -+ pDma->pDmaFirst = pDmaDesc; -+ pDma->pDmaLast = NULL; -+ -+ for(i=0; i<MV_CESA_MAX_DMA_DESC-1; i++) -+ { -+ /* link all DMA descriptors together */ -+ pDma->pDmaFirst[i].phyNextDescPtr = -+ MV_32BIT_LE(mvCesaVirtToPhys(&pReq->dmaDescBuf, &pDmaDesc[i+1])); -+ } -+ pDma->pDmaFirst[i].phyNextDescPtr = 0; -+ mvOsCacheFlush(NULL, &pDma->pDmaFirst[0], MV_CESA_MAX_DMA_DESC*sizeof(MV_DMA_DESC)); -+ -+ pDmaDesc += MV_CESA_MAX_DMA_DESC; -+ } -+ } -+ /*mvCesaCryptoIvSet(NULL, MV_CESA_MAX_IV_LENGTH);*/ -+ descOffsetReg = (MV_U16)((MV_U8*)&cesaSramVirtPtr->desc - mvCesaSramAddrGet()); -+ MV_REG_WRITE(MV_CESA_CHAN_DESC_OFFSET_REG, descOffsetReg); -+ -+ configReg |= (MV_CESA_CFG_WAIT_DMA_MASK | MV_CESA_CFG_ACT_DMA_MASK); -+#if (MV_CESA_VERSION >= 3) -+ configReg |= MV_CESA_CFG_CHAIN_MODE_MASK; -+#endif -+ -+#if (MV_CESA_VERSION >= 2) -+ /* Initialize TDMA engine */ -+ MV_REG_WRITE(MV_CESA_TDMA_CTRL_REG, MV_CESA_TDMA_CTRL_VALUE); -+ MV_REG_WRITE(MV_CESA_TDMA_BYTE_COUNT_REG, 0); -+ MV_REG_WRITE(MV_CESA_TDMA_CURR_DESC_PTR_REG, 0); -+#else -+ /* Initialize IDMA #0 engine */ -+ MV_REG_WRITE(IDMA_CTRL_LOW_REG(0), 0); -+ MV_REG_WRITE(IDMA_BYTE_COUNT_REG(0), 0); -+ MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(0), 0); -+ MV_REG_WRITE(IDMA_CTRL_HIGH_REG(0), ICCHR_ENDIAN_LITTLE -+#ifdef MV_CPU_LE -+ | ICCHR_DESC_BYTE_SWAP_EN -+#endif -+ ); -+ /* Clear Cause Byte of IDMA channel to be used */ -+ MV_REG_WRITE( IDMA_CAUSE_REG, ~ICICR_CAUSE_MASK_ALL(0)); -+ MV_REG_WRITE(IDMA_CTRL_LOW_REG(0), MV_CESA_IDMA_CTRL_LOW_VALUE); -+#endif /* (MV_CESA_VERSION >= 2) */ -+ -+ /* Set CESA configuration registers */ -+ MV_REG_WRITE( MV_CESA_CFG_REG, configReg); -+ mvCesaDebugStatsClear(); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaFinish - Shutdown the CESA driver -+* -+* DESCRIPTION: -+* This function shutdown the CESA driver and free all allocted resources. -+* -+* INPUT: None -+* -+* RETURN: -+* MV_OK - Success -+* Other - Fail -+* -+*******************************************************************************/ -+MV_STATUS mvCesaFinish (void) -+{ -+ int req; -+ MV_CESA_REQ* pReq; -+ -+ mvOsPrintf("mvCesaFinish: \n"); -+ -+ cesaSramVirtPtr = NULL; -+ -+ /* Free all resources: DMA list, etc. */ -+ for(req=0; req<cesaQueueDepth; req++) -+ { -+ pReq = &pCesaReqFirst[req]; -+ if(pReq->dmaDescBuf.bufVirtPtr != NULL) -+ { -+ mvOsIoCachedFree(cesaOsHandle,pReq->dmaDescBuf.bufSize, -+ pReq->dmaDescBuf.bufPhysAddr, -+ pReq->dmaDescBuf.bufVirtPtr, -+ pReq->dmaDescBuf.memHandle); -+ } -+ if(pReq->cesaDescBuf.bufVirtPtr != NULL) -+ { -+ mvOsIoCachedFree(cesaOsHandle,pReq->cesaDescBuf.bufSize, -+ pReq->cesaDescBuf.bufPhysAddr, -+ pReq->cesaDescBuf.bufVirtPtr, -+ pReq->cesaDescBuf.memHandle); -+ } -+ } -+#if (MV_CESA_VERSION < 2) -+ MV_REG_WRITE(IDMA_CTRL_LOW_REG(0), 0); -+#endif /* (MV_CESA_VERSION < 2) */ -+ -+ /* Free request queue */ -+ if(pCesaReqFirst != NULL) -+ { -+ mvOsFree(pCesaReqFirst); -+ pCesaReqFirst = pCesaReqLast = NULL; -+ pCesaReqEmpty = pCesaReqProcess = NULL; -+ cesaQueueDepth = cesaReqResources = 0; -+ } -+ /* Free SA database */ -+ if(pCesaSAD != NULL) -+ { -+ mvOsFree(pCesaSAD); -+ pCesaSAD = NULL; -+ cesaMaxSA = 0; -+ } -+ MV_REG_WRITE( MV_CESA_CFG_REG, 0); -+ MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0); -+ MV_REG_WRITE( MV_CESA_ISR_MASK_REG, 0); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaCryptoIvSet - Set IV value for Crypto algorithm working in CBC mode -+* -+* DESCRIPTION: -+* This function set IV value using by Crypto algorithms in CBC mode. -+* Each channel has its own IV value. -+* This function gets IV value from the caller. If no IV value passed from -+* the caller or only part of IV passed, the function will init the rest part -+* of IV value (or the whole IV) by random value. -+* -+* INPUT: -+* MV_U8* pIV - Pointer to IV value supplied by user. If pIV==NULL -+* the function will generate random IV value. -+* int ivSize - size (in bytes) of IV provided by user. If ivSize is -+* smaller than maximum IV size, the function will complete -+* IV by random value. -+* -+* RETURN: -+* MV_OK - Success -+* Other - Fail -+* -+*******************************************************************************/ -+MV_STATUS mvCesaCryptoIvSet(MV_U8* pIV, int ivSize) -+{ -+ MV_U8* pSramIV; -+#if defined(MV646xx) -+ mvOsPrintf("mvCesaCryptoIvSet: ERR. shouldn't use this call on MV64660\n"); -+#endif -+ pSramIV = cesaSramVirtPtr->cryptoIV; -+ if(ivSize > MV_CESA_MAX_IV_LENGTH) -+ { -+ mvOsPrintf("mvCesaCryptoIvSet: ivSize (%d) is too large\n", ivSize); -+ ivSize = MV_CESA_MAX_IV_LENGTH; -+ } -+ if(pIV != NULL) -+ { -+ memcpy(pSramIV, pIV, ivSize); -+ ivSize = MV_CESA_MAX_IV_LENGTH - ivSize; -+ pSramIV += ivSize; -+ } -+ -+ while(ivSize > 0) -+ { -+ int size, mv_random = mvOsRand(); -+ -+ size = MV_MIN(ivSize, sizeof(mv_random)); -+ memcpy(pSramIV, (void*)&mv_random, size); -+ -+ pSramIV += size; -+ ivSize -= size; -+ } -+/* -+ mvOsCacheFlush(NULL, cesaSramVirtPtr->cryptoIV, -+ MV_CESA_MAX_IV_LENGTH); -+ mvOsCacheInvalidate(NULL, cesaSramVirtPtr->cryptoIV, -+ MV_CESA_MAX_IV_LENGTH); -+*/ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaSessionOpen - Open new uni-directional crypto session -+* -+* DESCRIPTION: -+* This function open new session. -+* -+* INPUT: -+* MV_CESA_OPEN_SESSION *pSession - pointer to new session input parameters -+* -+* OUTPUT: -+* short *pSid - session ID, should be used for all future -+* requests over this session. -+* -+* RETURN: -+* MV_OK - Session opend successfully. -+* MV_FULL - All sessions are in use, no free place in -+* SA database. -+* MV_BAD_PARAM - One of session input parameters is invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvCesaSessionOpen(MV_CESA_OPEN_SESSION *pSession, short* pSid) -+{ -+ short sid; -+ MV_U32 config = 0; -+ int digestSize; -+ -+ cesaStats.openedCount++; -+ -+ /* Find free entry in SAD */ -+ for(sid=0; sid<cesaMaxSA; sid++) -+ { -+ if(pCesaSAD[sid].valid == 0) -+ { -+ break; -+ } -+ } -+ if(sid == cesaMaxSA) -+ { -+ mvOsPrintf("mvCesaSessionOpen: SA Database is FULL\n"); -+ return MV_FULL; -+ } -+ -+ /* Check Input parameters for Open session */ -+ if (pSession->operation >= MV_CESA_MAX_OPERATION) -+ { -+ mvOsPrintf("mvCesaSessionOpen: Unexpected operation %d\n", -+ pSession->operation); -+ return MV_BAD_PARAM; -+ } -+ config |= (pSession->operation << MV_CESA_OPERATION_OFFSET); -+ -+ if( (pSession->direction != MV_CESA_DIR_ENCODE) && -+ (pSession->direction != MV_CESA_DIR_DECODE) ) -+ { -+ mvOsPrintf("mvCesaSessionOpen: Unexpected direction %d\n", -+ pSession->direction); -+ return MV_BAD_PARAM; -+ } -+ config |= (pSession->direction << MV_CESA_DIRECTION_BIT); -+ /* Clear SA entry */ -+ /* memset(&pCesaSAD[sid], 0, sizeof(pCesaSAD[sid])); */ -+ -+ /* Check AUTH parameters and update SA entry */ -+ if(pSession->operation != MV_CESA_CRYPTO_ONLY) -+ { -+ /* For HMAC (MD5 and SHA1) - Maximum Key size is 64 bytes */ -+ if( (pSession->macMode == MV_CESA_MAC_HMAC_MD5) || -+ (pSession->macMode == MV_CESA_MAC_HMAC_SHA1) ) -+ { -+ if(pSession->macKeyLength > MV_CESA_MAX_MAC_KEY_LENGTH) -+ { -+ mvOsPrintf("mvCesaSessionOpen: macKeyLength %d is too large\n", -+ pSession->macKeyLength); -+ return MV_BAD_PARAM; -+ } -+ mvCesaHmacIvGet(pSession->macMode, pSession->macKey, pSession->macKeyLength, -+ pCesaSAD[sid].pSramSA->macInnerIV, -+ pCesaSAD[sid].pSramSA->macOuterIV); -+ pCesaSAD[sid].macKeyLength = pSession->macKeyLength; -+ } -+ switch(pSession->macMode) -+ { -+ case MV_CESA_MAC_MD5: -+ case MV_CESA_MAC_HMAC_MD5: -+ digestSize = MV_CESA_MD5_DIGEST_SIZE; -+ break; -+ -+ case MV_CESA_MAC_SHA1: -+ case MV_CESA_MAC_HMAC_SHA1: -+ digestSize = MV_CESA_SHA1_DIGEST_SIZE; -+ break; -+ -+ default: -+ mvOsPrintf("mvCesaSessionOpen: Unexpected macMode %d\n", -+ pSession->macMode); -+ return MV_BAD_PARAM; -+ } -+ config |= (pSession->macMode << MV_CESA_MAC_MODE_OFFSET); -+ -+ /* Supported digest sizes: MD5 - 16 bytes (128 bits), */ -+ /* SHA1 - 20 bytes (160 bits) or 12 bytes (96 bits) for both */ -+ if( (pSession->digestSize != digestSize) && (pSession->digestSize != 12)) -+ { -+ mvOsPrintf("mvCesaSessionOpen: Unexpected digest size %d\n", -+ pSession->digestSize); -+ mvOsPrintf("\t Valid values [bytes]: MD5-16, SHA1-20, Both-12\n"); -+ return MV_BAD_PARAM; -+ } -+ pCesaSAD[sid].digestSize = pSession->digestSize; -+ -+ if(pCesaSAD[sid].digestSize == 12) -+ { -+ /* Set MV_CESA_MAC_DIGEST_SIZE_BIT if digest size is 96 bits */ -+ config |= (MV_CESA_MAC_DIGEST_96B << MV_CESA_MAC_DIGEST_SIZE_BIT); -+ } -+ } -+ -+ /* Check CRYPTO parameters and update SA entry */ -+ if(pSession->operation != MV_CESA_MAC_ONLY) -+ { -+ switch(pSession->cryptoAlgorithm) -+ { -+ case MV_CESA_CRYPTO_DES: -+ pCesaSAD[sid].cryptoKeyLength = MV_CESA_DES_KEY_LENGTH; -+ pCesaSAD[sid].cryptoBlockSize = MV_CESA_DES_BLOCK_SIZE; -+ break; -+ -+ case MV_CESA_CRYPTO_3DES: -+ pCesaSAD[sid].cryptoKeyLength = MV_CESA_3DES_KEY_LENGTH; -+ pCesaSAD[sid].cryptoBlockSize = MV_CESA_DES_BLOCK_SIZE; -+ /* Only EDE mode is supported */ -+ config |= (MV_CESA_CRYPTO_3DES_EDE << -+ MV_CESA_CRYPTO_3DES_MODE_BIT); -+ break; -+ -+ case MV_CESA_CRYPTO_AES: -+ switch(pSession->cryptoKeyLength) -+ { -+ case 16: -+ pCesaSAD[sid].cryptoKeyLength = MV_CESA_AES_128_KEY_LENGTH; -+ config |= (MV_CESA_CRYPTO_AES_KEY_128 << -+ MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET); -+ break; -+ -+ case 24: -+ pCesaSAD[sid].cryptoKeyLength = MV_CESA_AES_192_KEY_LENGTH; -+ config |= (MV_CESA_CRYPTO_AES_KEY_192 << -+ MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET); -+ break; -+ -+ case 32: -+ default: -+ pCesaSAD[sid].cryptoKeyLength = MV_CESA_AES_256_KEY_LENGTH; -+ config |= (MV_CESA_CRYPTO_AES_KEY_256 << -+ MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET); -+ break; -+ } -+ pCesaSAD[sid].cryptoBlockSize = MV_CESA_AES_BLOCK_SIZE; -+ break; -+ -+ default: -+ mvOsPrintf("mvCesaSessionOpen: Unexpected cryptoAlgorithm %d\n", -+ pSession->cryptoAlgorithm); -+ return MV_BAD_PARAM; -+ } -+ config |= (pSession->cryptoAlgorithm << MV_CESA_CRYPTO_ALG_OFFSET); -+ -+ if(pSession->cryptoKeyLength != pCesaSAD[sid].cryptoKeyLength) -+ { -+ mvOsPrintf("cesaSessionOpen: Wrong CryptoKeySize %d != %d\n", -+ pSession->cryptoKeyLength, pCesaSAD[sid].cryptoKeyLength); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Copy Crypto key */ -+ if( (pSession->cryptoAlgorithm == MV_CESA_CRYPTO_AES) && -+ (pSession->direction == MV_CESA_DIR_DECODE)) -+ { -+ /* Crypto Key for AES decode is computed from original key material */ -+ /* and depend on cryptoKeyLength (128/192/256 bits) */ -+ aesMakeKey(pCesaSAD[sid].pSramSA->cryptoKey, pSession->cryptoKey, -+ pSession->cryptoKeyLength*8, MV_CESA_AES_BLOCK_SIZE*8); -+ } -+ else -+ { -+ /*panic("mvCesaSessionOpen2");*/ -+ memcpy(pCesaSAD[sid].pSramSA->cryptoKey, pSession->cryptoKey, -+ pCesaSAD[sid].cryptoKeyLength); -+ -+ } -+ -+ switch(pSession->cryptoMode) -+ { -+ case MV_CESA_CRYPTO_ECB: -+ pCesaSAD[sid].cryptoIvSize = 0; -+ break; -+ -+ case MV_CESA_CRYPTO_CBC: -+ pCesaSAD[sid].cryptoIvSize = pCesaSAD[sid].cryptoBlockSize; -+ break; -+ -+ case MV_CESA_CRYPTO_CTR: -+ /* Supported only for AES algorithm */ -+ if(pSession->cryptoAlgorithm != MV_CESA_CRYPTO_AES) -+ { -+ mvOsPrintf("mvCesaSessionOpen: CRYPTO CTR mode supported for AES only\n"); -+ return MV_BAD_PARAM; -+ } -+ pCesaSAD[sid].cryptoIvSize = 0; -+ pCesaSAD[sid].ctrMode = 1; -+ /* Replace to ECB mode for HW */ -+ pSession->cryptoMode = MV_CESA_CRYPTO_ECB; -+ break; -+ -+ default: -+ mvOsPrintf("mvCesaSessionOpen: Unexpected cryptoMode %d\n", -+ pSession->cryptoMode); -+ return MV_BAD_PARAM; -+ } -+ -+ config |= (pSession->cryptoMode << MV_CESA_CRYPTO_MODE_BIT); -+ } -+ pCesaSAD[sid].config = config; -+ -+ mvOsCacheFlush(NULL, pCesaSAD[sid].pSramSA, sizeof(MV_CESA_SRAM_SA)); -+ if(pSid != NULL) -+ *pSid = sid; -+ -+ pCesaSAD[sid].valid = 1; -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaSessionClose - Close active crypto session -+* -+* DESCRIPTION: -+* This function closes existing session -+* -+* INPUT: -+* short sid - Unique identifier of the session to be closed -+* -+* RETURN: -+* MV_OK - Session closed successfully. -+* MV_BAD_PARAM - Session identifier is out of valid range. -+* MV_NOT_FOUND - There is no active session with such ID. -+* -+*******************************************************************************/ -+MV_STATUS mvCesaSessionClose(short sid) -+{ -+ cesaStats.closedCount++; -+ -+ if(sid >= cesaMaxSA) -+ { -+ mvOsPrintf("CESA Error: sid (%d) is too big\n", sid); -+ return MV_BAD_PARAM; -+ } -+ if(pCesaSAD[sid].valid == 0) -+ { -+ mvOsPrintf("CESA Warning: Session (sid=%d) is invalid\n", sid); -+ return MV_NOT_FOUND; -+ } -+ if(cesaLastSid == sid) -+ cesaLastSid = -1; -+ -+ pCesaSAD[sid].valid = 0; -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaAction - Perform crypto operation -+* -+* DESCRIPTION: -+* This function set new CESA request FIFO queue for further HW processing. -+* The function checks request parameters before set new request to the queue. -+* If one of the CESA channels is ready for processing the request will be -+* passed to HW. When request processing is finished the CESA interrupt will -+* be generated by HW. The caller should call mvCesaReadyGet() function to -+* complete request processing and get result. -+* -+* INPUT: -+* MV_CESA_COMMAND *pCmd - pointer to new CESA request. -+* It includes pointers to Source and Destination -+* buffers, session identifier get from -+* mvCesaSessionOpen() function, pointer to caller -+* private data and all needed crypto parameters. -+* -+* RETURN: -+* MV_OK - request successfully added to request queue -+* and will be processed. -+* MV_NO_MORE - request successfully added to request queue and will -+* be processed, but request queue became Full and next -+* request will not be accepted. -+* MV_NO_RESOURCE - request queue is FULL and the request can not -+* be processed. -+* MV_OUT_OF_CPU_MEM - memory allocation needed for request processing is -+* failed. Request can not be processed. -+* MV_NOT_ALLOWED - This mixed request (CRYPTO+MAC) can not be processed -+* as one request and should be splitted for two requests: -+* CRYPTO_ONLY and MAC_ONLY. -+* MV_BAD_PARAM - One of the request parameters is out of valid range. -+* The request can not be processed. -+* -+*******************************************************************************/ -+MV_STATUS mvCesaAction (MV_CESA_COMMAND *pCmd) -+{ -+ MV_STATUS status; -+ MV_CESA_REQ* pReq = pCesaReqEmpty; -+ int sid = pCmd->sessionId; -+ MV_CESA_SA* pSA = &pCesaSAD[sid]; -+#if (MV_CESA_VERSION >= 3) -+ MV_CESA_REQ* pFromReq; -+ MV_CESA_REQ* pToReq; -+#endif -+ cesaStats.reqCount++; -+ -+ /* Check that the request queue is not FULL */ -+ if(cesaReqResources == 0) -+ return MV_NO_RESOURCE; -+ -+ if( (sid >= cesaMaxSA) || (!pSA->valid) ) -+ { -+ mvOsPrintf("CESA Action Error: Session sid=%d is INVALID\n", sid); -+ return MV_BAD_PARAM; -+ } -+ pSA->count++; -+ -+ if(pSA->ctrMode) -+ { -+ /* AES in CTR mode can't be mixed with Authentication */ -+ if( (pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ mvOsPrintf("mvCesaAction : CRYPTO CTR mode can't be mixed with AUTH\n"); -+ return MV_NOT_ALLOWED; -+ } -+ /* All other request parameters should not be checked because key stream */ -+ /* (not user data) processed by AES HW engine */ -+ pReq->pOrgCmd = pCmd; -+ /* Allocate temporary pCmd structure for Key stream */ -+ pCmd = mvCesaCtrModeInit(); -+ if(pCmd == NULL) -+ return MV_OUT_OF_CPU_MEM; -+ -+ /* Prepare Key stream */ -+ mvCesaCtrModePrepare(pCmd, pReq->pOrgCmd); -+ pReq->fixOffset = 0; -+ } -+ else -+ { -+ /* Check request parameters and calculae fixOffset */ -+ status = mvCesaParamCheck(pSA, pCmd, &pReq->fixOffset); -+ if(status != MV_OK) -+ { -+ return status; -+ } -+ } -+ pReq->pCmd = pCmd; -+ -+ /* Check if the packet need fragmentation */ -+ if(pCmd->pSrc->mbufSize <= sizeof(cesaSramVirtPtr->buf) ) -+ { -+ /* request size is smaller than single buffer size */ -+ pReq->fragMode = MV_CESA_FRAG_NONE; -+ -+ /* Prepare NOT fragmented packets */ -+ status = mvCesaReqProcess(pReq); -+ if(status != MV_OK) -+ { -+ mvOsPrintf("CesaReady: ReqProcess error: pReq=%p, status=0x%x\n", -+ pReq, status); -+ } -+#if (MV_CESA_VERSION >= 3) -+ pReq->frags.numFrag = 1; -+#endif -+ } -+ else -+ { -+ MV_U8 frag = 0; -+ -+ /* request size is larger than buffer size - needs fragmentation */ -+ -+ /* Check restrictions for processing fragmented packets */ -+ status = mvCesaFragParamCheck(pSA, pCmd); -+ if(status != MV_OK) -+ return status; -+ -+ pReq->fragMode = MV_CESA_FRAG_FIRST; -+ pReq->frags.nextFrag = 0; -+ -+ /* Prepare Process Fragmented packets */ -+ while(pReq->fragMode != MV_CESA_FRAG_LAST) -+ { -+ if(frag >= MV_CESA_MAX_REQ_FRAGS) -+ { -+ mvOsPrintf("mvCesaAction Error: Too large request frag=%d\n", frag); -+ return MV_OUT_OF_CPU_MEM; -+ } -+ status = mvCesaFragReqProcess(pReq, frag); -+ if(status == MV_OK) { -+#if (MV_CESA_VERSION >= 3) -+ if(frag) { -+ pReq->dma[frag-1].pDmaLast->phyNextDescPtr = -+ MV_32BIT_LE(mvCesaVirtToPhys(&pReq->dmaDescBuf, pReq->dma[frag].pDmaFirst)); -+ mvOsCacheFlush(NULL, pReq->dma[frag-1].pDmaLast, sizeof(MV_DMA_DESC)); -+ } -+#endif -+ frag++; -+ } -+ } -+ pReq->frags.numFrag = frag; -+#if (MV_CESA_VERSION >= 3) -+ if(chainReqNum) { -+ chainReqNum += pReq->frags.numFrag; -+ if(chainReqNum >= MAX_CESA_CHAIN_LENGTH) -+ chainReqNum = MAX_CESA_CHAIN_LENGTH; -+ } -+#endif -+ } -+ -+ pReq->state = MV_CESA_PENDING; -+ -+ pCesaReqEmpty = MV_CESA_REQ_NEXT_PTR(pReq); -+ cesaReqResources -= 1; -+ -+/* #ifdef CESA_DEBUG */ -+ if( (cesaQueueDepth - cesaReqResources) > cesaStats.maxReqCount) -+ cesaStats.maxReqCount = (cesaQueueDepth - cesaReqResources); -+/* #endif CESA_DEBUG */ -+ -+ cesaLastSid = sid; -+ -+#if (MV_CESA_VERSION >= 3) -+ /* Are we within chain bounderies and follows the first request ? */ -+ if((chainReqNum > 0) && (chainReqNum < MAX_CESA_CHAIN_LENGTH)) { -+ if(chainIndex) { -+ pFromReq = MV_CESA_REQ_PREV_PTR(pReq); -+ pToReq = pReq; -+ pReq->state = MV_CESA_CHAIN; -+ /* assume concatenating is possible */ -+ pFromReq->dma[pFromReq->frags.numFrag-1].pDmaLast->phyNextDescPtr = -+ MV_32BIT_LE(mvCesaVirtToPhys(&pToReq->dmaDescBuf, pToReq->dma[0].pDmaFirst)); -+ mvOsCacheFlush(NULL, pFromReq->dma[pFromReq->frags.numFrag-1].pDmaLast, sizeof(MV_DMA_DESC)); -+ -+ /* align active & next pointers */ -+ if(pNextActiveChain->state != MV_CESA_PENDING) -+ pEndCurrChain = pNextActiveChain = MV_CESA_REQ_NEXT_PTR(pReq); -+ } -+ else { /* we have only one chain, start new one */ -+ chainReqNum = 0; -+ chainIndex++; -+ /* align active & next pointers */ -+ if(pNextActiveChain->state != MV_CESA_PENDING) -+ pEndCurrChain = pNextActiveChain = pReq; -+ } -+ } -+ else { -+ /* In case we concatenate full chain */ -+ if(chainReqNum == MAX_CESA_CHAIN_LENGTH) { -+ chainIndex++; -+ if(pNextActiveChain->state != MV_CESA_PENDING) -+ pEndCurrChain = pNextActiveChain = pReq; -+ chainReqNum = 0; -+ } -+ -+ pReq = pCesaReqProcess; -+ if(pReq->state == MV_CESA_PENDING) { -+ pNextActiveChain = pReq; -+ pEndCurrChain = MV_CESA_REQ_NEXT_PTR(pReq); -+ /* Start Process new request */ -+ mvCesaReqProcessStart(pReq); -+ } -+ } -+ -+ chainReqNum++; -+ -+ if((chainIndex < MAX_CESA_CHAIN_LENGTH) && (chainReqNum > cesaStats.maxChainUsage)) -+ cesaStats.maxChainUsage = chainReqNum; -+ -+#else -+ -+ /* Check status of CESA channels and process requests if possible */ -+ pReq = pCesaReqProcess; -+ if(pReq->state == MV_CESA_PENDING) -+ { -+ /* Start Process new request */ -+ mvCesaReqProcessStart(pReq); -+ } -+#endif -+ /* If request queue became FULL - return MV_NO_MORE */ -+ if(cesaReqResources == 0) -+ return MV_NO_MORE; -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvCesaReadyGet - Get crypto request that processing is finished -+* -+* DESCRIPTION: -+* This function complete request processing and return ready request to -+* caller. To don't miss interrupts the caller must call this function -+* while MV_OK or MV_TERMINATE values returned. -+* -+* INPUT: -+* MV_U32 chanMap - map of CESA channels finished thier job -+* accordingly with CESA Cause register. -+* MV_CESA_RESULT* pResult - pointer to structure contains information -+* about ready request. It includes pointer to -+* user private structure "pReqPrv", session identifier -+* for this request "sessionId" and return code. -+* Return code set to MV_FAIL if calculated digest value -+* on decode direction is different than digest value -+* in the packet. -+* -+* RETURN: -+* MV_OK - Success, ready request is returned. -+* MV_NOT_READY - Next request is not ready yet. New interrupt will -+* be generated for futher request processing. -+* MV_EMPTY - There is no more request for processing. -+* MV_BUSY - Fragmented request is not ready yet. -+* MV_TERMINATE - Call this function once more to complete processing -+* of fragmented request. -+* -+*******************************************************************************/ -+MV_STATUS mvCesaReadyGet(MV_CESA_RESULT* pResult) -+{ -+ MV_STATUS status, readyStatus = MV_NOT_READY; -+ MV_U32 statusReg; -+ MV_CESA_REQ* pReq; -+ MV_CESA_SA* pSA; -+ -+#if (MV_CESA_VERSION >= 3) -+ if(isFirstReq == MV_TRUE) { -+ if(chainIndex == 0) -+ chainReqNum = 0; -+ -+ isFirstReq = MV_FALSE; -+ -+ if(pNextActiveChain->state == MV_CESA_PENDING) { -+ /* Start request Process */ -+ mvCesaReqProcessStart(pNextActiveChain); -+ pEndCurrChain = pNextActiveChain; -+ if(chainIndex > 0) -+ chainIndex--; -+ /* Update pNextActiveChain to next chain head */ -+ while(pNextActiveChain->state == MV_CESA_CHAIN) -+ pNextActiveChain = MV_CESA_REQ_NEXT_PTR(pNextActiveChain); -+ } -+ } -+ -+ /* Check if there are more processed requests - can we remove pEndCurrChain ??? */ -+ if(pCesaReqProcess == pEndCurrChain) { -+ isFirstReq = MV_TRUE; -+ pEndCurrChain = pNextActiveChain; -+#else -+ if(pCesaReqProcess->state != MV_CESA_PROCESS) { -+#endif -+ return MV_EMPTY; -+ } -+ -+#ifdef CESA_DEBUG -+ statusReg = MV_REG_READ(MV_CESA_STATUS_REG); -+ if( statusReg & MV_CESA_STATUS_ACTIVE_MASK ) -+ { -+ mvOsPrintf("mvCesaReadyGet: Not Ready, Status = 0x%x\n", statusReg); -+ cesaStats.notReadyCount++; -+ return MV_NOT_READY; -+ } -+#endif /* CESA_DEBUG */ -+ -+ cesaStats.readyCount++; -+ -+ pReq = pCesaReqProcess; -+ pSA = &pCesaSAD[pReq->pCmd->sessionId]; -+ -+ pResult->retCode = MV_OK; -+ if(pReq->fragMode != MV_CESA_FRAG_NONE) -+ { -+ MV_U8* pNewDigest; -+ int frag; -+#if (MV_CESA_VERSION >= 3) -+ pReq->frags.nextFrag = 1; -+ while(pReq->frags.nextFrag <= pReq->frags.numFrag) { -+#endif -+ frag = (pReq->frags.nextFrag - 1); -+ -+ /* Restore DMA descriptor list */ -+ pReq->dma[frag].pDmaLast->phyNextDescPtr = -+ MV_32BIT_LE(mvCesaVirtToPhys(&pReq->dmaDescBuf, &pReq->dma[frag].pDmaLast[1])); -+ pReq->dma[frag].pDmaLast = NULL; -+ -+ /* Special processing for finished fragmented request */ -+ if(pReq->frags.nextFrag >= pReq->frags.numFrag) -+ { -+ mvCesaMbufCacheUnmap(pReq->pCmd->pDst, 0, pReq->pCmd->pDst->mbufSize); -+ -+ /* Fragmented packet is ready */ -+ if( (pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ int macDataSize = pReq->pCmd->macLength - pReq->frags.macSize; -+ -+ if(macDataSize != 0) -+ { -+ /* Calculate all other blocks by SW */ -+ mvCesaFragAuthComplete(pReq, pSA, macDataSize); -+ } -+ -+ /* Copy new digest from SRAM to the Destination buffer */ -+ pNewDigest = cesaSramVirtPtr->buf + pReq->frags.newDigestOffset; -+ status = mvCesaCopyToMbuf(pNewDigest, pReq->pCmd->pDst, -+ pReq->pCmd->digestOffset, pSA->digestSize); -+ -+ /* For decryption: Compare new digest value with original one */ -+ if((pSA->config & MV_CESA_DIRECTION_MASK) == -+ (MV_CESA_DIR_DECODE << MV_CESA_DIRECTION_BIT)) -+ { -+ if( memcmp(pNewDigest, pReq->frags.orgDigest, pSA->digestSize) != 0) -+ { -+/* -+ mvOsPrintf("Digest error: chan=%d, newDigest=%p, orgDigest=%p, status = 0x%x\n", -+ chan, pNewDigest, pReq->frags.orgDigest, MV_REG_READ(MV_CESA_STATUS_REG)); -+*/ -+ /* Signiture verification is failed */ -+ pResult->retCode = MV_FAIL; -+ } -+ } -+ } -+ readyStatus = MV_OK; -+ } -+#if (MV_CESA_VERSION >= 3) -+ pReq->frags.nextFrag++; -+ } -+#endif -+ } -+ else -+ { -+ mvCesaMbufCacheUnmap(pReq->pCmd->pDst, 0, pReq->pCmd->pDst->mbufSize); -+ -+ /* Restore DMA descriptor list */ -+ pReq->dma[0].pDmaLast->phyNextDescPtr = -+ MV_32BIT_LE(mvCesaVirtToPhys(&pReq->dmaDescBuf, &pReq->dma[0].pDmaLast[1])); -+ pReq->dma[0].pDmaLast = NULL; -+ if( ((pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) ) && -+ ((pSA->config & MV_CESA_DIRECTION_MASK) == -+ (MV_CESA_DIR_DECODE << MV_CESA_DIRECTION_BIT)) ) -+ { -+ /* For AUTH on decode : Check Digest result in Status register */ -+ statusReg = MV_REG_READ(MV_CESA_STATUS_REG); -+ if(statusReg & MV_CESA_STATUS_DIGEST_ERR_MASK) -+ { -+/* -+ mvOsPrintf("Digest error: chan=%d, status = 0x%x\n", -+ chan, statusReg); -+*/ -+ /* Signiture verification is failed */ -+ pResult->retCode = MV_FAIL; -+ } -+ } -+ readyStatus = MV_OK; -+ } -+ -+ if(readyStatus == MV_OK) -+ { -+ /* If Request is ready - Prepare pResult structure */ -+ pResult->pReqPrv = pReq->pCmd->pReqPrv; -+ pResult->sessionId = pReq->pCmd->sessionId; -+ -+ pReq->state = MV_CESA_IDLE; -+ pCesaReqProcess = MV_CESA_REQ_NEXT_PTR(pReq); -+ cesaReqResources++; -+ -+ if(pSA->ctrMode) -+ { -+ /* For AES CTR mode - complete processing and free allocated resources */ -+ mvCesaCtrModeComplete(pReq->pOrgCmd, pReq->pCmd); -+ mvCesaCtrModeFinish(pReq->pCmd); -+ pReq->pOrgCmd = NULL; -+ } -+ } -+ -+#if (MV_CESA_VERSION < 3) -+ if(pCesaReqProcess->state == MV_CESA_PROCESS) -+ { -+ /* Start request Process */ -+ mvCesaReqProcessStart(pCesaReqProcess); -+ if(readyStatus == MV_NOT_READY) -+ readyStatus = MV_BUSY; -+ } -+ else if(pCesaReqProcess != pCesaReqEmpty) -+ { -+ /* Start process new request from the queue */ -+ mvCesaReqProcessStart(pCesaReqProcess); -+ } -+#endif -+ return readyStatus; -+} -+ -+/***************** Functions to work with CESA_MBUF structure ******************/ -+ -+/******************************************************************************* -+* mvCesaMbufOffset - Locate offset in the Mbuf structure -+* -+* DESCRIPTION: -+* This function locates offset inside Multi-Bufeer structure. -+* It get fragment number and place in the fragment where the offset -+* is located. -+* -+* -+* INPUT: -+* MV_CESA_MBUF* pMbuf - Pointer to multi-buffer structure -+* int offset - Offset from the beginning of the data presented by -+* the Mbuf structure. -+* -+* OUTPUT: -+* int* pBufOffset - Offset from the beginning of the fragment where -+* the offset is located. -+* -+* RETURN: -+* int - Number of fragment, where the offset is located\ -+* -+*******************************************************************************/ -+int mvCesaMbufOffset(MV_CESA_MBUF* pMbuf, int offset, int* pBufOffset) -+{ -+ int frag = 0; -+ -+ while(offset > 0) -+ { -+ if(frag >= pMbuf->numFrags) -+ { -+ mvOsPrintf("mvCesaMbufOffset: Error: frag (%d) > numFrags (%d)\n", -+ frag, pMbuf->numFrags); -+ return MV_INVALID; -+ } -+ if(offset < pMbuf->pFrags[frag].bufSize) -+ { -+ break; -+ } -+ offset -= pMbuf->pFrags[frag].bufSize; -+ frag++; -+ } -+ if(pBufOffset != NULL) -+ *pBufOffset = offset; -+ -+ return frag; -+} -+ -+/******************************************************************************* -+* mvCesaCopyFromMbuf - Copy data from the Mbuf structure to continuous buffer -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_U8* pDstBuf - Pointer to continuous buffer, where data is -+* copied to. -+* MV_CESA_MBUF* pSrcMbuf - Pointer to multi-buffer structure where data is -+* copied from. -+* int offset - Offset in the Mbuf structure where located first -+* byte of data should be copied. -+* int size - Size of data should be copied -+* -+* RETURN: -+* MV_OK - Success, all data is copied successfully. -+* MV_OUT_OF_RANGE - Failed, offset is out of Multi-buffer data range. -+* No data is copied. -+* MV_EMPTY - Multi-buffer structure has not enough data to copy -+* Data from the offset to end of Mbuf data is copied. -+* -+*******************************************************************************/ -+MV_STATUS mvCesaCopyFromMbuf(MV_U8* pDstBuf, MV_CESA_MBUF* pSrcMbuf, -+ int offset, int size) -+{ -+ int frag, fragOffset, bufSize; -+ MV_U8* pBuf; -+ -+ if(size == 0) -+ return MV_OK; -+ -+ frag = mvCesaMbufOffset(pSrcMbuf, offset, &fragOffset); -+ if(frag == MV_INVALID) -+ { -+ mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset); -+ return MV_OUT_OF_RANGE; -+ } -+ -+ bufSize = pSrcMbuf->pFrags[frag].bufSize - fragOffset; -+ pBuf = pSrcMbuf->pFrags[frag].bufVirtPtr + fragOffset; -+ while(MV_TRUE) -+ { -+ if(size <= bufSize) -+ { -+ memcpy(pDstBuf, pBuf, size); -+ return MV_OK; -+ } -+ memcpy(pDstBuf, pBuf, bufSize); -+ size -= bufSize; -+ frag++; -+ pDstBuf += bufSize; -+ if(frag >= pSrcMbuf->numFrags) -+ break; -+ -+ bufSize = pSrcMbuf->pFrags[frag].bufSize; -+ pBuf = pSrcMbuf->pFrags[frag].bufVirtPtr; -+ } -+ mvOsPrintf("mvCesaCopyFromMbuf: Mbuf is EMPTY - %d bytes isn't copied\n", -+ size); -+ return MV_EMPTY; -+} -+ -+/******************************************************************************* -+* mvCesaCopyToMbuf - Copy data from continuous buffer to the Mbuf structure -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_U8* pSrcBuf - Pointer to continuous buffer, where data is -+* copied from. -+* MV_CESA_MBUF* pDstMbuf - Pointer to multi-buffer structure where data is -+* copied to. -+* int offset - Offset in the Mbuf structure where located first -+* byte of data should be copied. -+* int size - Size of data should be copied -+* -+* RETURN: -+* MV_OK - Success, all data is copied successfully. -+* MV_OUT_OF_RANGE - Failed, offset is out of Multi-buffer data range. -+* No data is copied. -+* MV_FULL - Multi-buffer structure has not enough place to copy -+* all data. Data from the offset to end of Mbuf data -+* is copied. -+* -+*******************************************************************************/ -+MV_STATUS mvCesaCopyToMbuf(MV_U8* pSrcBuf, MV_CESA_MBUF* pDstMbuf, -+ int offset, int size) -+{ -+ int frag, fragOffset, bufSize; -+ MV_U8* pBuf; -+ -+ if(size == 0) -+ return MV_OK; -+ -+ frag = mvCesaMbufOffset(pDstMbuf, offset, &fragOffset); -+ if(frag == MV_INVALID) -+ { -+ mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset); -+ return MV_OUT_OF_RANGE; -+ } -+ -+ bufSize = pDstMbuf->pFrags[frag].bufSize - fragOffset; -+ pBuf = pDstMbuf->pFrags[frag].bufVirtPtr + fragOffset; -+ while(MV_TRUE) -+ { -+ if(size <= bufSize) -+ { -+ memcpy(pBuf, pSrcBuf, size); -+ return MV_OK; -+ } -+ memcpy(pBuf, pSrcBuf, bufSize); -+ size -= bufSize; -+ frag++; -+ pSrcBuf += bufSize; -+ if(frag >= pDstMbuf->numFrags) -+ break; -+ -+ bufSize = pDstMbuf->pFrags[frag].bufSize; -+ pBuf = pDstMbuf->pFrags[frag].bufVirtPtr; -+ } -+ mvOsPrintf("mvCesaCopyToMbuf: Mbuf is FULL - %d bytes isn't copied\n", -+ size); -+ return MV_FULL; -+} -+ -+/******************************************************************************* -+* mvCesaMbufCopy - Copy data from one Mbuf structure to the other Mbuf structure -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* -+* MV_CESA_MBUF* pDstMbuf - Pointer to multi-buffer structure where data is -+* copied to. -+* int dstMbufOffset - Offset in the dstMbuf structure where first byte -+* of data should be copied to. -+* MV_CESA_MBUF* pSrcMbuf - Pointer to multi-buffer structure where data is -+* copied from. -+* int srcMbufOffset - Offset in the srcMbuf structure where first byte -+* of data should be copied from. -+* int size - Size of data should be copied -+* -+* RETURN: -+* MV_OK - Success, all data is copied successfully. -+* MV_OUT_OF_RANGE - Failed, srcMbufOffset or dstMbufOffset is out of -+* srcMbuf or dstMbuf structure correspondently. -+* No data is copied. -+* MV_BAD_SIZE - srcMbuf or dstMbuf structure is too small to copy -+* all data. Partial data is copied -+* -+*******************************************************************************/ -+MV_STATUS mvCesaMbufCopy(MV_CESA_MBUF* pMbufDst, int dstMbufOffset, -+ MV_CESA_MBUF* pMbufSrc, int srcMbufOffset, int size) -+{ -+ int srcFrag, dstFrag, srcSize, dstSize, srcOffset, dstOffset; -+ int copySize; -+ MV_U8 *pSrc, *pDst; -+ -+ if(size == 0) -+ return MV_OK; -+ -+ srcFrag = mvCesaMbufOffset(pMbufSrc, srcMbufOffset, &srcOffset); -+ if(srcFrag == MV_INVALID) -+ { -+ mvOsPrintf("CESA srcMbuf Error: offset (%d) out of range\n", srcMbufOffset); -+ return MV_OUT_OF_RANGE; -+ } -+ pSrc = pMbufSrc->pFrags[srcFrag].bufVirtPtr + srcOffset; -+ srcSize = pMbufSrc->pFrags[srcFrag].bufSize - srcOffset; -+ -+ dstFrag = mvCesaMbufOffset(pMbufDst, dstMbufOffset, &dstOffset); -+ if(dstFrag == MV_INVALID) -+ { -+ mvOsPrintf("CESA dstMbuf Error: offset (%d) out of range\n", dstMbufOffset); -+ return MV_OUT_OF_RANGE; -+ } -+ pDst = pMbufDst->pFrags[dstFrag].bufVirtPtr + dstOffset; -+ dstSize = pMbufDst->pFrags[dstFrag].bufSize - dstOffset; -+ -+ while(size > 0) -+ { -+ copySize = MV_MIN(srcSize, dstSize); -+ if(size <= copySize) -+ { -+ memcpy(pDst, pSrc, size); -+ return MV_OK; -+ } -+ memcpy(pDst, pSrc, copySize); -+ size -= copySize; -+ srcSize -= copySize; -+ dstSize -= copySize; -+ -+ if(srcSize == 0) -+ { -+ srcFrag++; -+ if(srcFrag >= pMbufSrc->numFrags) -+ break; -+ -+ pSrc = pMbufSrc->pFrags[srcFrag].bufVirtPtr; -+ srcSize = pMbufSrc->pFrags[srcFrag].bufSize; -+ } -+ -+ if(dstSize == 0) -+ { -+ dstFrag++; -+ if(dstFrag >= pMbufDst->numFrags) -+ break; -+ -+ pDst = pMbufDst->pFrags[dstFrag].bufVirtPtr; -+ dstSize = pMbufDst->pFrags[dstFrag].bufSize; -+ } -+ } -+ mvOsPrintf("mvCesaMbufCopy: BAD size - %d bytes isn't copied\n", -+ size); -+ -+ return MV_BAD_SIZE; -+} -+ -+static MV_STATUS mvCesaMbufCacheUnmap(MV_CESA_MBUF* pMbuf, int offset, int size) -+{ -+ int frag, fragOffset, bufSize; -+ MV_U8* pBuf; -+ -+ if(size == 0) -+ return MV_OK; -+ -+ frag = mvCesaMbufOffset(pMbuf, offset, &fragOffset); -+ if(frag == MV_INVALID) -+ { -+ mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset); -+ return MV_OUT_OF_RANGE; -+ } -+ -+ bufSize = pMbuf->pFrags[frag].bufSize - fragOffset; -+ pBuf = pMbuf->pFrags[frag].bufVirtPtr + fragOffset; -+ while(MV_TRUE) -+ { -+ if(size <= bufSize) -+ { -+ mvOsCacheUnmap(NULL, mvOsIoVirtToPhy(NULL, pBuf), size); -+ return MV_OK; -+ } -+ -+ mvOsCacheUnmap(NULL, mvOsIoVirtToPhy(NULL, pBuf), bufSize); -+ size -= bufSize; -+ frag++; -+ if(frag >= pMbuf->numFrags) -+ break; -+ -+ bufSize = pMbuf->pFrags[frag].bufSize; -+ pBuf = pMbuf->pFrags[frag].bufVirtPtr; -+ } -+ mvOsPrintf("%s: Mbuf is FULL - %d bytes isn't Unmapped\n", -+ __FUNCTION__, size); -+ return MV_FULL; -+} -+ -+ -+/*************************************** Local Functions ******************************/ -+ -+/******************************************************************************* -+* mvCesaFragReqProcess - Process fragmented request -+* -+* DESCRIPTION: -+* This function processes a fragment of fragmented request (First, Middle or Last) -+* -+* -+* INPUT: -+* MV_CESA_REQ* pReq - Pointer to the request in the request queue. -+* -+* RETURN: -+* MV_OK - The fragment is successfully passed to HW for processing. -+* MV_TERMINATE - Means, that HW finished its work on this packet and no more -+* interrupts will be generated for this request. -+* Function mvCesaReadyGet() must be called to complete request -+* processing and get request result. -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaFragReqProcess(MV_CESA_REQ* pReq, MV_U8 frag) -+{ -+ int i, copySize, cryptoDataSize, macDataSize, sid; -+ int cryptoIvOffset, digestOffset; -+ MV_U32 config; -+ MV_CESA_COMMAND* pCmd = pReq->pCmd; -+ MV_CESA_SA* pSA; -+ MV_CESA_MBUF* pMbuf; -+ MV_DMA_DESC* pDmaDesc = pReq->dma[frag].pDmaFirst; -+ MV_U8* pSramBuf = cesaSramVirtPtr->buf; -+ int macTotalLen = 0; -+ int fixOffset, cryptoOffset, macOffset; -+ -+ cesaStats.fragCount++; -+ -+ sid = pReq->pCmd->sessionId; -+ -+ pSA = &pCesaSAD[sid]; -+ -+ cryptoIvOffset = digestOffset = 0; -+ i = macDataSize = 0; -+ cryptoDataSize = 0; -+ -+ /* First fragment processing */ -+ if(pReq->fragMode == MV_CESA_FRAG_FIRST) -+ { -+ /* pReq->frags monitors processing of fragmented request between fragments */ -+ pReq->frags.bufOffset = 0; -+ pReq->frags.cryptoSize = 0; -+ pReq->frags.macSize = 0; -+ -+ config = pSA->config | (MV_CESA_FRAG_FIRST << MV_CESA_FRAG_MODE_OFFSET); -+ -+ /* fixOffset can be not equal to zero only for FIRST fragment */ -+ fixOffset = pReq->fixOffset; -+ /* For FIRST fragment crypto and mac offsets are taken from pCmd */ -+ cryptoOffset = pCmd->cryptoOffset; -+ macOffset = pCmd->macOffset; -+ -+ copySize = sizeof(cesaSramVirtPtr->buf) - pReq->fixOffset; -+ -+ /* Find fragment size: Must meet all requirements for CRYPTO and MAC -+ * cryptoDataSize - size of data will be encrypted/decrypted in this fragment -+ * macDataSize - size of data will be signed/verified in this fragment -+ * copySize - size of data will be copied from srcMbuf to SRAM and -+ * back to dstMbuf for this fragment -+ */ -+ mvCesaFragSizeFind(pSA, pReq, cryptoOffset, macOffset, -+ ©Size, &cryptoDataSize, &macDataSize); -+ -+ if( (pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET)) -+ { -+ /* CryptoIV special processing */ -+ if( (pSA->config & MV_CESA_CRYPTO_MODE_MASK) == -+ (MV_CESA_CRYPTO_CBC << MV_CESA_CRYPTO_MODE_BIT) ) -+ { -+ /* In CBC mode for encode direction when IV from user */ -+ if( (pCmd->ivFromUser) && -+ ((pSA->config & MV_CESA_DIRECTION_MASK) == -+ (MV_CESA_DIR_ENCODE << MV_CESA_DIRECTION_BIT)) ) -+ { -+ -+ /* For Crypto Encode in CBC mode HW always takes IV from SRAM IVPointer, -+ * (not from IVBufPointer). So when ivFromUser==1, we should copy IV from user place -+ * in the buffer to SRAM IVPointer -+ */ -+ i += mvCesaDmaCopyPrepare(pCmd->pSrc, cesaSramVirtPtr->cryptoIV, &pDmaDesc[i], -+ MV_FALSE, pCmd->ivOffset, pSA->cryptoIvSize, pCmd->skipFlush); -+ } -+ -+ /* Special processing when IV is not located in the first fragment */ -+ if(pCmd->ivOffset > (copySize - pSA->cryptoIvSize)) -+ { -+ /* Prepare dummy place for cryptoIV in SRAM */ -+ cryptoIvOffset = cesaSramVirtPtr->tempCryptoIV - mvCesaSramAddrGet(); -+ -+ /* For Decryption: Copy IV value from pCmd->ivOffset to Special SRAM place */ -+ if((pSA->config & MV_CESA_DIRECTION_MASK) == -+ (MV_CESA_DIR_DECODE << MV_CESA_DIRECTION_BIT)) -+ { -+ i += mvCesaDmaCopyPrepare(pCmd->pSrc, cesaSramVirtPtr->tempCryptoIV, &pDmaDesc[i], -+ MV_FALSE, pCmd->ivOffset, pSA->cryptoIvSize, pCmd->skipFlush); -+ } -+ else -+ { -+ /* For Encryption when IV is NOT from User: */ -+ /* Copy IV from SRAM to buffer (pCmd->ivOffset) */ -+ if(pCmd->ivFromUser == 0) -+ { -+ /* copy IV value from cryptoIV to Buffer (pCmd->ivOffset) */ -+ i += mvCesaDmaCopyPrepare(pCmd->pSrc, cesaSramVirtPtr->cryptoIV, &pDmaDesc[i], -+ MV_TRUE, pCmd->ivOffset, pSA->cryptoIvSize, pCmd->skipFlush); -+ } -+ } -+ } -+ else -+ { -+ cryptoIvOffset = pCmd->ivOffset; -+ } -+ } -+ } -+ -+ if( (pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ /* MAC digest special processing on Decode direction */ -+ if((pSA->config & MV_CESA_DIRECTION_MASK) == -+ (MV_CESA_DIR_DECODE << MV_CESA_DIRECTION_BIT)) -+ { -+ /* Save digest from pCmd->digestOffset */ -+ mvCesaCopyFromMbuf(pReq->frags.orgDigest, -+ pCmd->pSrc, pCmd->digestOffset, pSA->digestSize); -+ -+ /* If pCmd->digestOffset is not located on the first */ -+ if(pCmd->digestOffset > (copySize - pSA->digestSize)) -+ { -+ MV_U8 digestZero[MV_CESA_MAX_DIGEST_SIZE]; -+ -+ /* Set zeros to pCmd->digestOffset (DRAM) */ -+ memset(digestZero, 0, MV_CESA_MAX_DIGEST_SIZE); -+ mvCesaCopyToMbuf(digestZero, pCmd->pSrc, pCmd->digestOffset, pSA->digestSize); -+ -+ /* Prepare dummy place for digest in SRAM */ -+ digestOffset = cesaSramVirtPtr->tempDigest - mvCesaSramAddrGet(); -+ } -+ else -+ { -+ digestOffset = pCmd->digestOffset; -+ } -+ } -+ } -+ /* Update SA in SRAM */ -+ if(cesaLastSid != sid) -+ { -+ mvCesaSramSaUpdate(sid, &pDmaDesc[i]); -+ i++; -+ } -+ -+ pReq->fragMode = MV_CESA_FRAG_MIDDLE; -+ } -+ else -+ { -+ /* Continue fragment */ -+ fixOffset = 0; -+ cryptoOffset = 0; -+ macOffset = 0; -+ if( (pCmd->pSrc->mbufSize - pReq->frags.bufOffset) <= sizeof(cesaSramVirtPtr->buf)) -+ { -+ /* Last fragment */ -+ config = pSA->config | (MV_CESA_FRAG_LAST << MV_CESA_FRAG_MODE_OFFSET); -+ pReq->fragMode = MV_CESA_FRAG_LAST; -+ copySize = pCmd->pSrc->mbufSize - pReq->frags.bufOffset; -+ -+ if( (pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ macDataSize = pCmd->macLength - pReq->frags.macSize; -+ -+ /* If pCmd->digestOffset is not located on last fragment */ -+ if(pCmd->digestOffset < pReq->frags.bufOffset) -+ { -+ /* Prepare dummy place for digest in SRAM */ -+ digestOffset = cesaSramVirtPtr->tempDigest - mvCesaSramAddrGet(); -+ } -+ else -+ { -+ digestOffset = pCmd->digestOffset - pReq->frags.bufOffset; -+ } -+ pReq->frags.newDigestOffset = digestOffset; -+ macTotalLen = pCmd->macLength; -+ -+ /* HW can't calculate the Digest correctly for fragmented packets -+ * in the following cases: -+ * - MV88F5182 || -+ * - MV88F5181L when total macLength more that 16 Kbytes || -+ * - total macLength more that 64 Kbytes -+ */ -+ if( (mvCtrlModelGet() == MV_5182_DEV_ID) || -+ ( (mvCtrlModelGet() == MV_5181_DEV_ID) && -+ (mvCtrlRevGet() >= MV_5181L_A0_REV) && -+ (pCmd->macLength >= (1 << 14)) ) ) -+ { -+ return MV_TERMINATE; -+ } -+ } -+ if( (pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ cryptoDataSize = pCmd->cryptoLength - pReq->frags.cryptoSize; -+ } -+ -+ /* cryptoIvOffset - don't care */ -+ } -+ else -+ { -+ /* WA for MV88F5182 SHA1 and MD5 fragmentation mode */ -+ if( (mvCtrlModelGet() == MV_5182_DEV_ID) && -+ (((pSA->config & MV_CESA_MAC_MODE_MASK) == -+ (MV_CESA_MAC_MD5 << MV_CESA_MAC_MODE_OFFSET)) || -+ ((pSA->config & MV_CESA_MAC_MODE_MASK) == -+ (MV_CESA_MAC_SHA1 << MV_CESA_MAC_MODE_OFFSET))) ) -+ { -+ pReq->frags.newDigestOffset = cesaSramVirtPtr->tempDigest - mvCesaSramAddrGet(); -+ pReq->fragMode = MV_CESA_FRAG_LAST; -+ -+ return MV_TERMINATE; -+ } -+ /* Middle fragment */ -+ config = pSA->config | (MV_CESA_FRAG_MIDDLE << MV_CESA_FRAG_MODE_OFFSET); -+ copySize = sizeof(cesaSramVirtPtr->buf); -+ /* digestOffset and cryptoIvOffset - don't care */ -+ -+ /* Find fragment size */ -+ mvCesaFragSizeFind(pSA, pReq, cryptoOffset, macOffset, -+ ©Size, &cryptoDataSize, &macDataSize); -+ } -+ } -+ /********* Prepare DMA descriptors to copy from pSrc to SRAM *********/ -+ pMbuf = pCmd->pSrc; -+ i += mvCesaDmaCopyPrepare(pMbuf, pSramBuf + fixOffset, &pDmaDesc[i], -+ MV_FALSE, pReq->frags.bufOffset, copySize, pCmd->skipFlush); -+ -+ /* Prepare CESA descriptor to copy from DRAM to SRAM by DMA */ -+ mvCesaSramDescrBuild(config, frag, -+ cryptoOffset + fixOffset, cryptoIvOffset + fixOffset, -+ cryptoDataSize, macOffset + fixOffset, -+ digestOffset + fixOffset, macDataSize, macTotalLen, -+ pReq, &pDmaDesc[i]); -+ i++; -+ -+ /* Add special descriptor Ownership for CPU */ -+ pDmaDesc[i].byteCnt = 0; -+ pDmaDesc[i].phySrcAdd = 0; -+ pDmaDesc[i].phyDestAdd = 0; -+ i++; -+ -+ /********* Prepare DMA descriptors to copy from SRAM to pDst *********/ -+ pMbuf = pCmd->pDst; -+ i += mvCesaDmaCopyPrepare(pMbuf, pSramBuf + fixOffset, &pDmaDesc[i], -+ MV_TRUE, pReq->frags.bufOffset, copySize, pCmd->skipFlush); -+ -+ /* Next field of Last DMA descriptor must be NULL */ -+ pDmaDesc[i-1].phyNextDescPtr = 0; -+ pReq->dma[frag].pDmaLast = &pDmaDesc[i-1]; -+ mvOsCacheFlush(NULL, pReq->dma[frag].pDmaFirst, -+ i*sizeof(MV_DMA_DESC)); -+ -+ /*mvCesaDebugDescriptor(&cesaSramVirtPtr->desc[frag]);*/ -+ -+ pReq->frags.bufOffset += copySize; -+ pReq->frags.cryptoSize += cryptoDataSize; -+ pReq->frags.macSize += macDataSize; -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvCesaReqProcess - Process regular (Non-fragmented) request -+* -+* DESCRIPTION: -+* This function processes the whole (not fragmented) request -+* -+* INPUT: -+* MV_CESA_REQ* pReq - Pointer to the request in the request queue. -+* -+* RETURN: -+* MV_OK - The request is successfully passed to HW for processing. -+* Other - Failure. The request will not be processed -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaReqProcess(MV_CESA_REQ* pReq) -+{ -+ MV_CESA_MBUF *pMbuf; -+ MV_DMA_DESC *pDmaDesc; -+ MV_U8 *pSramBuf; -+ int sid, i, fixOffset; -+ MV_CESA_SA *pSA; -+ MV_CESA_COMMAND *pCmd = pReq->pCmd; -+ -+ cesaStats.procCount++; -+ -+ sid = pCmd->sessionId; -+ pSA = &pCesaSAD[sid]; -+ pDmaDesc = pReq->dma[0].pDmaFirst; -+ pSramBuf = cesaSramVirtPtr->buf; -+ fixOffset = pReq->fixOffset; -+ -+/* -+ mvOsPrintf("mvCesaReqProcess: sid=%d, pSA=%p, pDmaDesc=%p, pSramBuf=%p\n", -+ sid, pSA, pDmaDesc, pSramBuf); -+*/ -+ i = 0; -+ -+ /* Crypto IV Special processing in CBC mode for Encryption direction */ -+ if( ((pSA->config & MV_CESA_OPERATION_MASK) != (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET)) && -+ ((pSA->config & MV_CESA_CRYPTO_MODE_MASK) == (MV_CESA_CRYPTO_CBC << MV_CESA_CRYPTO_MODE_BIT)) && -+ ((pSA->config & MV_CESA_DIRECTION_MASK) == (MV_CESA_DIR_ENCODE << MV_CESA_DIRECTION_BIT)) && -+ (pCmd->ivFromUser) ) -+ { -+ /* For Crypto Encode in CBC mode HW always takes IV from SRAM IVPointer, -+ * (not from IVBufPointer). So when ivFromUser==1, we should copy IV from user place -+ * in the buffer to SRAM IVPointer -+ */ -+ i += mvCesaDmaCopyPrepare(pCmd->pSrc, cesaSramVirtPtr->cryptoIV, &pDmaDesc[i], -+ MV_FALSE, pCmd->ivOffset, pSA->cryptoIvSize, pCmd->skipFlush); -+ } -+ -+ /* Update SA in SRAM */ -+ if(cesaLastSid != sid) -+ { -+ mvCesaSramSaUpdate(sid, &pDmaDesc[i]); -+ i++; -+ } -+ -+ /********* Prepare DMA descriptors to copy from pSrc to SRAM *********/ -+ pMbuf = pCmd->pSrc; -+ i += mvCesaDmaCopyPrepare(pMbuf, pSramBuf + fixOffset, &pDmaDesc[i], -+ MV_FALSE, 0, pMbuf->mbufSize, pCmd->skipFlush); -+ -+ /* Prepare Security Accelerator descriptor to SRAM words 0 - 7 */ -+ mvCesaSramDescrBuild(pSA->config, 0, pCmd->cryptoOffset + fixOffset, -+ pCmd->ivOffset + fixOffset, pCmd->cryptoLength, -+ pCmd->macOffset + fixOffset, pCmd->digestOffset + fixOffset, -+ pCmd->macLength, pCmd->macLength, pReq, &pDmaDesc[i]); -+ i++; -+ -+ /* Add special descriptor Ownership for CPU */ -+ pDmaDesc[i].byteCnt = 0; -+ pDmaDesc[i].phySrcAdd = 0; -+ pDmaDesc[i].phyDestAdd = 0; -+ i++; -+ -+ /********* Prepare DMA descriptors to copy from SRAM to pDst *********/ -+ pMbuf = pCmd->pDst; -+ i += mvCesaDmaCopyPrepare(pMbuf, pSramBuf + fixOffset, &pDmaDesc[i], -+ MV_TRUE, 0, pMbuf->mbufSize, pCmd->skipFlush); -+ -+ /* Next field of Last DMA descriptor must be NULL */ -+ pDmaDesc[i-1].phyNextDescPtr = 0; -+ pReq->dma[0].pDmaLast = &pDmaDesc[i-1]; -+ mvOsCacheFlush(NULL, pReq->dma[0].pDmaFirst, i*sizeof(MV_DMA_DESC)); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvCesaSramDescrBuild - Set CESA descriptor in SRAM -+* -+* DESCRIPTION: -+* This function builds CESA descriptor in SRAM from all Command parameters -+* -+* -+* INPUT: -+* int chan - CESA channel uses the descriptor -+* MV_U32 config - 32 bits of WORD_0 in CESA descriptor structure -+* int cryptoOffset - Offset from the beginning of SRAM buffer where -+* data for encryption/decription is started. -+* int ivOffset - Offset of crypto IV from the SRAM base. Valid only -+* for first fragment. -+* int cryptoLength - Size (in bytes) of data for encryption/descryption -+* operation on this fragment. -+* int macOffset - Offset from the beginning of SRAM buffer where -+* data for Authentication is started -+* int digestOffset - Offset from the beginning of SRAM buffer where -+* digest is located. Valid for first and last fragments. -+* int macLength - Size (in bytes) of data for Authentication -+* operation on this fragment. -+* int macTotalLen - Toatl size (in bytes) of data for Authentication -+* operation on the whole request (packet). Valid for -+* last fragment only. -+* -+* RETURN: None -+* -+*******************************************************************************/ -+static void mvCesaSramDescrBuild(MV_U32 config, int frag, -+ int cryptoOffset, int ivOffset, int cryptoLength, -+ int macOffset, int digestOffset, int macLength, -+ int macTotalLen, MV_CESA_REQ* pReq, MV_DMA_DESC* pDmaDesc) -+{ -+ MV_CESA_DESC* pCesaDesc = &pReq->pCesaDesc[frag]; -+ MV_CESA_DESC* pSramDesc = pSramDesc = &cesaSramVirtPtr->desc; -+ MV_U16 sramBufOffset = (MV_U16)((MV_U8*)cesaSramVirtPtr->buf - mvCesaSramAddrGet()); -+ -+ pCesaDesc->config = MV_32BIT_LE(config); -+ -+ if( (config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ /* word 1 */ -+ pCesaDesc->cryptoSrcOffset = MV_16BIT_LE(sramBufOffset + cryptoOffset); -+ pCesaDesc->cryptoDstOffset = MV_16BIT_LE(sramBufOffset + cryptoOffset); -+ /* word 2 */ -+ pCesaDesc->cryptoDataLen = MV_16BIT_LE(cryptoLength); -+ /* word 3 */ -+ pCesaDesc->cryptoKeyOffset = MV_16BIT_LE((MV_U16)(cesaSramVirtPtr->sramSA.cryptoKey - -+ mvCesaSramAddrGet())); -+ /* word 4 */ -+ pCesaDesc->cryptoIvOffset = MV_16BIT_LE((MV_U16)(cesaSramVirtPtr->cryptoIV - -+ mvCesaSramAddrGet())); -+ pCesaDesc->cryptoIvBufOffset = MV_16BIT_LE(sramBufOffset + ivOffset); -+ } -+ -+ if( (config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ /* word 5 */ -+ pCesaDesc->macSrcOffset = MV_16BIT_LE(sramBufOffset + macOffset); -+ pCesaDesc->macTotalLen = MV_16BIT_LE(macTotalLen); -+ -+ /* word 6 */ -+ pCesaDesc->macDigestOffset = MV_16BIT_LE(sramBufOffset + digestOffset); -+ pCesaDesc->macDataLen = MV_16BIT_LE(macLength); -+ -+ /* word 7 */ -+ pCesaDesc->macInnerIvOffset = MV_16BIT_LE((MV_U16)(cesaSramVirtPtr->sramSA.macInnerIV - -+ mvCesaSramAddrGet())); -+ pCesaDesc->macOuterIvOffset = MV_16BIT_LE((MV_U16)(cesaSramVirtPtr->sramSA.macOuterIV - -+ mvCesaSramAddrGet())); -+ } -+ /* Prepare DMA descriptor to CESA descriptor from DRAM to SRAM */ -+ pDmaDesc->phySrcAdd = MV_32BIT_LE(mvCesaVirtToPhys(&pReq->cesaDescBuf, pCesaDesc)); -+ pDmaDesc->phyDestAdd = MV_32BIT_LE(mvCesaSramVirtToPhys(NULL, (MV_U8*)pSramDesc)); -+ pDmaDesc->byteCnt = MV_32BIT_LE(sizeof(MV_CESA_DESC) | BIT31); -+ -+ /* flush Source buffer */ -+ mvOsCacheFlush(NULL, pCesaDesc, sizeof(MV_CESA_DESC)); -+} -+ -+/******************************************************************************* -+* mvCesaSramSaUpdate - Move required SA information to SRAM if needed. -+* -+* DESCRIPTION: -+* Copy to SRAM values of the required SA. -+* -+* -+* INPUT: -+* short sid - Session ID needs SRAM Cache update -+* MV_DMA_DESC *pDmaDesc - Pointer to DMA descriptor used to -+* copy SA values from DRAM to SRAM. -+* -+* RETURN: -+* MV_OK - Cache entry for this SA copied to SRAM. -+* MV_NO_CHANGE - Cache entry for this SA already exist in SRAM -+* -+*******************************************************************************/ -+static INLINE void mvCesaSramSaUpdate(short sid, MV_DMA_DESC *pDmaDesc) -+{ -+ MV_CESA_SA *pSA = &pCesaSAD[sid]; -+ -+ /* Prepare DMA descriptor to Copy CACHE_SA from SA database in DRAM to SRAM */ -+ pDmaDesc->byteCnt = MV_32BIT_LE(sizeof(MV_CESA_SRAM_SA) | BIT31); -+ pDmaDesc->phySrcAdd = MV_32BIT_LE(mvCesaVirtToPhys(&cesaSramSaBuf, pSA->pSramSA)); -+ pDmaDesc->phyDestAdd = -+ MV_32BIT_LE(mvCesaSramVirtToPhys(NULL, (MV_U8*)&cesaSramVirtPtr->sramSA)); -+ -+ /* Source buffer is already flushed during OpenSession*/ -+ /*mvOsCacheFlush(NULL, &pSA->sramSA, sizeof(MV_CESA_SRAM_SA));*/ -+} -+ -+/******************************************************************************* -+* mvCesaDmaCopyPrepare - prepare DMA descriptor list to copy data presented by -+* Mbuf structure from DRAM to SRAM -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_MBUF* pMbuf - pointer to Mbuf structure contains request -+* data in DRAM -+* MV_U8* pSramBuf - pointer to buffer in SRAM where data should -+* be copied to. -+* MV_DMA_DESC* pDmaDesc - pointer to first DMA descriptor for this copy. -+* The function set number of DMA descriptors needed -+* to copy the copySize bytes from Mbuf. -+* MV_BOOL isToMbuf - Copy direction. -+* MV_TRUE means copy from SRAM buffer to Mbuf in DRAM. -+* MV_FALSE means copy from Mbuf in DRAM to SRAM buffer. -+* int offset - Offset in the Mbuf structure that copy should be -+* started from. -+* int copySize - Size of data should be copied. -+* -+* RETURN: -+* int - number of DMA descriptors used for the copy. -+* -+*******************************************************************************/ -+#ifndef MV_NETBSD -+static INLINE int mvCesaDmaCopyPrepare(MV_CESA_MBUF* pMbuf, MV_U8* pSramBuf, -+ MV_DMA_DESC* pDmaDesc, MV_BOOL isToMbuf, -+ int offset, int copySize, MV_BOOL skipFlush) -+{ -+ int bufOffset, bufSize, size, frag, i; -+ MV_U8* pBuf; -+ -+ i = 0; -+ -+ /* Calculate start place for copy: fragment number and offset in the fragment */ -+ frag = mvCesaMbufOffset(pMbuf, offset, &bufOffset); -+ bufSize = pMbuf->pFrags[frag].bufSize - bufOffset; -+ pBuf = pMbuf->pFrags[frag].bufVirtPtr + bufOffset; -+ -+ /* Size accumulate total copy size */ -+ size = 0; -+ -+ /* Create DMA lists to copy mBuf from pSrc to SRAM */ -+ while(size < copySize) -+ { -+ /* Find copy size for each DMA descriptor */ -+ bufSize = MV_MIN(bufSize, (copySize - size)); -+ pDmaDesc[i].byteCnt = MV_32BIT_LE(bufSize | BIT31); -+ if(isToMbuf) -+ { -+ pDmaDesc[i].phyDestAdd = MV_32BIT_LE(mvOsIoVirtToPhy(NULL, pBuf)); -+ pDmaDesc[i].phySrcAdd = -+ MV_32BIT_LE(mvCesaSramVirtToPhys(NULL, (pSramBuf + size))); -+ /* invalidate the buffer */ -+ if(skipFlush == MV_FALSE) -+ mvOsCacheInvalidate(NULL, pBuf, bufSize); -+ } -+ else -+ { -+ pDmaDesc[i].phySrcAdd = MV_32BIT_LE(mvOsIoVirtToPhy(NULL, pBuf)); -+ pDmaDesc[i].phyDestAdd = -+ MV_32BIT_LE(mvCesaSramVirtToPhys(NULL, (pSramBuf + size))); -+ /* flush the buffer */ -+ if(skipFlush == MV_FALSE) -+ mvOsCacheFlush(NULL, pBuf, bufSize); -+ } -+ -+ /* Count number of used DMA descriptors */ -+ i++; -+ size += bufSize; -+ -+ /* go to next fragment in the Mbuf */ -+ frag++; -+ pBuf = pMbuf->pFrags[frag].bufVirtPtr; -+ bufSize = pMbuf->pFrags[frag].bufSize; -+ } -+ return i; -+} -+#else /* MV_NETBSD */ -+static int mvCesaDmaCopyPrepare(MV_CESA_MBUF* pMbuf, MV_U8* pSramBuf, -+ MV_DMA_DESC* pDmaDesc, MV_BOOL isToMbuf, -+ int offset, int copySize, MV_BOOL skipFlush) -+{ -+ int bufOffset, bufSize, thisSize, size, frag, i; -+ MV_ULONG bufPhys, sramPhys; -+ MV_U8* pBuf; -+ -+ /* -+ * Calculate start place for copy: fragment number and offset in -+ * the fragment -+ */ -+ frag = mvCesaMbufOffset(pMbuf, offset, &bufOffset); -+ -+ /* -+ * Get SRAM physical address only once. We can update it in-place -+ * as we build the descriptor chain. -+ */ -+ sramPhys = mvCesaSramVirtToPhys(NULL, pSramBuf); -+ -+ /* -+ * 'size' accumulates total copy size, 'i' counts desccriptors. -+ */ -+ size = i = 0; -+ -+ /* Create DMA lists to copy mBuf from pSrc to SRAM */ -+ while (size < copySize) { -+ /* -+ * Calculate # of bytes to copy from the current fragment, -+ * and the pointer to the start of data -+ */ -+ bufSize = pMbuf->pFrags[frag].bufSize - bufOffset; -+ pBuf = pMbuf->pFrags[frag].bufVirtPtr + bufOffset; -+ bufOffset = 0; /* First frag may be non-zero */ -+ frag++; -+ -+ /* -+ * As long as there is data in the current fragment... -+ */ -+ while (bufSize > 0) { -+ /* -+ * Ensure we don't cross an MMU page boundary. -+ * XXX: This is NetBSD-specific, but it is a -+ * quick and dirty way to fix the problem. -+ * A true HAL would rely on the OS-specific -+ * driver to do this... -+ */ -+ thisSize = PAGE_SIZE - -+ (((MV_ULONG)pBuf) & (PAGE_SIZE - 1)); -+ thisSize = MV_MIN(bufSize, thisSize); -+ /* -+ * Make sure we don't copy more than requested -+ */ -+ if (thisSize > (copySize - size)) { -+ thisSize = copySize - size; -+ bufSize = 0; -+ } -+ -+ /* -+ * Physicall address of this fragment -+ */ -+ bufPhys = MV_32BIT_LE(mvOsIoVirtToPhy(NULL, pBuf)); -+ -+ /* -+ * Set up the descriptor -+ */ -+ pDmaDesc[i].byteCnt = MV_32BIT_LE(thisSize | BIT31); -+ if(isToMbuf) { -+ pDmaDesc[i].phyDestAdd = bufPhys; -+ pDmaDesc[i].phySrcAdd = MV_32BIT_LE(sramPhys); -+ /* invalidate the buffer */ -+ if(skipFlush == MV_FALSE) -+ mvOsCacheInvalidate(NULL, pBuf, thisSize); -+ } else { -+ pDmaDesc[i].phySrcAdd = bufPhys; -+ pDmaDesc[i].phyDestAdd = MV_32BIT_LE(sramPhys); -+ /* flush the buffer */ -+ if(skipFlush == MV_FALSE) -+ mvOsCacheFlush(NULL, pBuf, thisSize); -+ } -+ -+ pDmaDesc[i].phyNextDescPtr = -+ MV_32BIT_LE(mvOsIoVirtToPhy(NULL,(&pDmaDesc[i+1]))); -+ -+ /* flush the DMA desc */ -+ mvOsCacheFlush(NULL, &pDmaDesc[i], sizeof(MV_DMA_DESC)); -+ -+ /* Update state */ -+ bufSize -= thisSize; -+ sramPhys += thisSize; -+ pBuf += thisSize; -+ size += thisSize; -+ i++; -+ } -+ } -+ -+ return i; -+} -+#endif /* MV_NETBSD */ -+/******************************************************************************* -+* mvCesaHmacIvGet - Calculate Inner and Outter values from HMAC key -+* -+* DESCRIPTION: -+* This function calculate Inner and Outer values used for HMAC algorithm. -+* This operation allows improve performance fro the whole HMAC processing. -+* -+* INPUT: -+* MV_CESA_MAC_MODE macMode - Authentication mode: HMAC_MD5 or HMAC_SHA1. -+* unsigned char key[] - Pointer to HMAC key. -+* int keyLength - Size of HMAC key (maximum 64 bytes) -+* -+* OUTPUT: -+* unsigned char innerIV[] - HASH(key^inner) -+* unsigned char outerIV[] - HASH(key^outter) -+* -+* RETURN: None -+* -+*******************************************************************************/ -+static void mvCesaHmacIvGet(MV_CESA_MAC_MODE macMode, unsigned char key[], int keyLength, -+ unsigned char innerIV[], unsigned char outerIV[]) -+{ -+ unsigned char inner[MV_CESA_MAX_MAC_KEY_LENGTH]; -+ unsigned char outer[MV_CESA_MAX_MAC_KEY_LENGTH]; -+ int i, digestSize = 0; -+#if defined(MV_CPU_LE) || defined(MV_PPC) -+ MV_U32 swapped32, val32, *pVal32; -+#endif -+ for(i=0; i<keyLength; i++) -+ { -+ inner[i] = 0x36 ^ key[i]; -+ outer[i] = 0x5c ^ key[i]; -+ } -+ -+ for(i=keyLength; i<MV_CESA_MAX_MAC_KEY_LENGTH; i++) -+ { -+ inner[i] = 0x36; -+ outer[i] = 0x5c; -+ } -+ if(macMode == MV_CESA_MAC_HMAC_MD5) -+ { -+ MV_MD5_CONTEXT ctx; -+ -+ mvMD5Init(&ctx); -+ mvMD5Update(&ctx, inner, MV_CESA_MAX_MAC_KEY_LENGTH); -+ -+ memcpy(innerIV, ctx.buf, MV_CESA_MD5_DIGEST_SIZE); -+ memset(&ctx, 0, sizeof(ctx)); -+ -+ mvMD5Init(&ctx); -+ mvMD5Update(&ctx, outer, MV_CESA_MAX_MAC_KEY_LENGTH); -+ memcpy(outerIV, ctx.buf, MV_CESA_MD5_DIGEST_SIZE); -+ memset(&ctx, 0, sizeof(ctx)); -+ digestSize = MV_CESA_MD5_DIGEST_SIZE; -+ } -+ else if(macMode == MV_CESA_MAC_HMAC_SHA1) -+ { -+ MV_SHA1_CTX ctx; -+ -+ mvSHA1Init(&ctx); -+ mvSHA1Update(&ctx, inner, MV_CESA_MAX_MAC_KEY_LENGTH); -+ memcpy(innerIV, ctx.state, MV_CESA_SHA1_DIGEST_SIZE); -+ memset(&ctx, 0, sizeof(ctx)); -+ -+ mvSHA1Init(&ctx); -+ mvSHA1Update(&ctx, outer, MV_CESA_MAX_MAC_KEY_LENGTH); -+ memcpy(outerIV, ctx.state, MV_CESA_SHA1_DIGEST_SIZE); -+ memset(&ctx, 0, sizeof(ctx)); -+ digestSize = MV_CESA_SHA1_DIGEST_SIZE; -+ } -+ else -+ { -+ mvOsPrintf("hmacGetIV: Unexpected macMode %d\n", macMode); -+ } -+#if defined(MV_CPU_LE) || defined(MV_PPC) -+ /* 32 bits Swap of Inner and Outer values */ -+ pVal32 = (MV_U32*)innerIV; -+ for(i=0; i<digestSize/4; i++) -+ { -+ val32 = *pVal32; -+ swapped32 = MV_BYTE_SWAP_32BIT(val32); -+ *pVal32 = swapped32; -+ pVal32++; -+ } -+ pVal32 = (MV_U32*)outerIV; -+ for(i=0; i<digestSize/4; i++) -+ { -+ val32 = *pVal32; -+ swapped32 = MV_BYTE_SWAP_32BIT(val32); -+ *pVal32 = swapped32; -+ pVal32++; -+ } -+#endif /* defined(MV_CPU_LE) || defined(MV_PPC) */ -+} -+ -+ -+/******************************************************************************* -+* mvCesaFragSha1Complete - Complete SHA1 authentication started by HW using SW -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_MBUF* pMbuf - Pointer to Mbuf structure where data -+* for SHA1 is placed. -+* int offset - Offset in the Mbuf structure where -+* unprocessed data for SHA1 is started. -+* MV_U8* pOuterIV - Pointer to OUTER for this session. -+* If pOuterIV==NULL - MAC mode is HASH_SHA1 -+* If pOuterIV!=NULL - MAC mode is HMAC_SHA1 -+* int macLeftSize - Size of unprocessed data for SHA1. -+* int macTotalSize - Total size of data for SHA1 in the -+* request (processed + unprocessed) -+* -+* OUTPUT: -+* MV_U8* pDigest - Pointer to place where calculated Digest will -+* be stored. -+* -+* RETURN: None -+* -+*******************************************************************************/ -+static void mvCesaFragSha1Complete(MV_CESA_MBUF* pMbuf, int offset, -+ MV_U8* pOuterIV, int macLeftSize, -+ int macTotalSize, MV_U8* pDigest) -+{ -+ MV_SHA1_CTX ctx; -+ MV_U8 *pData; -+ int i, frag, fragOffset, size; -+ -+ /* Read temporary Digest from HW */ -+ for(i=0; i<MV_CESA_SHA1_DIGEST_SIZE/4; i++) -+ { -+ ctx.state[i] = MV_REG_READ(MV_CESA_AUTH_INIT_VAL_DIGEST_REG(i)); -+ } -+ /* Initialize MV_SHA1_CTX structure */ -+ memset(ctx.buffer, 0, 64); -+ /* Set count[0] in bits. 32 bits is enough for 512 MBytes */ -+ /* so count[1] is always 0 */ -+ ctx.count[0] = ((macTotalSize - macLeftSize) * 8); -+ ctx.count[1] = 0; -+ -+ /* If HMAC - add size of Inner block (64 bytes) ro count[0] */ -+ if(pOuterIV != NULL) -+ ctx.count[0] += (64 * 8); -+ -+ /* Get place of unprocessed data in the Mbuf structure */ -+ frag = mvCesaMbufOffset(pMbuf, offset, &fragOffset); -+ if(frag == MV_INVALID) -+ { -+ mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset); -+ return; -+ } -+ -+ pData = pMbuf->pFrags[frag].bufVirtPtr + fragOffset; -+ size = pMbuf->pFrags[frag].bufSize - fragOffset; -+ -+ /* Complete Inner part */ -+ while(macLeftSize > 0) -+ { -+ if(macLeftSize <= size) -+ { -+ mvSHA1Update(&ctx, pData, macLeftSize); -+ break; -+ } -+ mvSHA1Update(&ctx, pData, size); -+ macLeftSize -= size; -+ frag++; -+ pData = pMbuf->pFrags[frag].bufVirtPtr; -+ size = pMbuf->pFrags[frag].bufSize; -+ } -+ mvSHA1Final(pDigest, &ctx); -+/* -+ mvOsPrintf("mvCesaFragSha1Complete: pOuterIV=%p, macLeftSize=%d, macTotalSize=%d\n", -+ pOuterIV, macLeftSize, macTotalSize); -+ mvDebugMemDump(pDigest, MV_CESA_SHA1_DIGEST_SIZE, 1); -+*/ -+ -+ if(pOuterIV != NULL) -+ { -+ /* If HMAC - Complete Outer part */ -+ for(i=0; i<MV_CESA_SHA1_DIGEST_SIZE/4; i++) -+ { -+#if defined(MV_CPU_LE) || defined(MV_ARM) -+ ctx.state[i] = MV_BYTE_SWAP_32BIT(((MV_U32*)pOuterIV)[i]); -+#else -+ ctx.state[i] = ((MV_U32*)pOuterIV)[i]; -+#endif -+ } -+ memset(ctx.buffer, 0, 64); -+ -+ ctx.count[0] = 64*8; -+ ctx.count[1] = 0; -+ mvSHA1Update(&ctx, pDigest, MV_CESA_SHA1_DIGEST_SIZE); -+ mvSHA1Final(pDigest, &ctx); -+ } -+} -+ -+/******************************************************************************* -+* mvCesaFragMd5Complete - Complete MD5 authentication started by HW using SW -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_MBUF* pMbuf - Pointer to Mbuf structure where data -+* for SHA1 is placed. -+* int offset - Offset in the Mbuf structure where -+* unprocessed data for MD5 is started. -+* MV_U8* pOuterIV - Pointer to OUTER for this session. -+* If pOuterIV==NULL - MAC mode is HASH_MD5 -+* If pOuterIV!=NULL - MAC mode is HMAC_MD5 -+* int macLeftSize - Size of unprocessed data for MD5. -+* int macTotalSize - Total size of data for MD5 in the -+* request (processed + unprocessed) -+* -+* OUTPUT: -+* MV_U8* pDigest - Pointer to place where calculated Digest will -+* be stored. -+* -+* RETURN: None -+* -+*******************************************************************************/ -+static void mvCesaFragMd5Complete(MV_CESA_MBUF* pMbuf, int offset, -+ MV_U8* pOuterIV, int macLeftSize, -+ int macTotalSize, MV_U8* pDigest) -+{ -+ MV_MD5_CONTEXT ctx; -+ MV_U8 *pData; -+ int i, frag, fragOffset, size; -+ -+ /* Read temporary Digest from HW */ -+ for(i=0; i<MV_CESA_MD5_DIGEST_SIZE/4; i++) -+ { -+ ctx.buf[i] = MV_REG_READ(MV_CESA_AUTH_INIT_VAL_DIGEST_REG(i)); -+ } -+ memset(ctx.in, 0, 64); -+ -+ /* Set count[0] in bits. 32 bits is enough for 512 MBytes */ -+ /* so count[1] is always 0 */ -+ ctx.bits[0] = ((macTotalSize - macLeftSize) * 8); -+ ctx.bits[1] = 0; -+ -+ /* If HMAC - add size of Inner block (64 bytes) ro count[0] */ -+ if(pOuterIV != NULL) -+ ctx.bits[0] += (64 * 8); -+ -+ frag = mvCesaMbufOffset(pMbuf, offset, &fragOffset); -+ if(frag == MV_INVALID) -+ { -+ mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset); -+ return; -+ } -+ -+ pData = pMbuf->pFrags[frag].bufVirtPtr + fragOffset; -+ size = pMbuf->pFrags[frag].bufSize - fragOffset; -+ -+ /* Complete Inner part */ -+ while(macLeftSize > 0) -+ { -+ if(macLeftSize <= size) -+ { -+ mvMD5Update(&ctx, pData, macLeftSize); -+ break; -+ } -+ mvMD5Update(&ctx, pData, size); -+ macLeftSize -= size; -+ frag++; -+ pData = pMbuf->pFrags[frag].bufVirtPtr; -+ size = pMbuf->pFrags[frag].bufSize; -+ } -+ mvMD5Final(pDigest, &ctx); -+ -+/* -+ mvOsPrintf("mvCesaFragMd5Complete: pOuterIV=%p, macLeftSize=%d, macTotalSize=%d\n", -+ pOuterIV, macLeftSize, macTotalSize); -+ mvDebugMemDump(pDigest, MV_CESA_MD5_DIGEST_SIZE, 1); -+*/ -+ if(pOuterIV != NULL) -+ { -+ /* Complete Outer part */ -+ for(i=0; i<MV_CESA_MD5_DIGEST_SIZE/4; i++) -+ { -+#if defined(MV_CPU_LE) || defined(MV_ARM) -+ ctx.buf[i] = MV_BYTE_SWAP_32BIT(((MV_U32*)pOuterIV)[i]); -+#else -+ ctx.buf[i] = ((MV_U32*)pOuterIV)[i]; -+#endif -+ } -+ memset(ctx.in, 0, 64); -+ -+ ctx.bits[0] = 64*8; -+ ctx.bits[1] = 0; -+ mvMD5Update(&ctx, pDigest, MV_CESA_MD5_DIGEST_SIZE); -+ mvMD5Final(pDigest, &ctx); -+ } -+} -+ -+/******************************************************************************* -+* mvCesaFragAuthComplete - -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_REQ* pReq, -+* MV_CESA_SA* pSA, -+* int macDataSize -+* -+* RETURN: -+* MV_STATUS -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaFragAuthComplete(MV_CESA_REQ* pReq, MV_CESA_SA* pSA, -+ int macDataSize) -+{ -+ MV_CESA_COMMAND* pCmd = pReq->pCmd; -+ MV_U8* pDigest; -+ MV_CESA_MAC_MODE macMode; -+ MV_U8* pOuterIV = NULL; -+ -+ /* Copy data from Source fragment to Destination */ -+ if(pCmd->pSrc != pCmd->pDst) -+ { -+ mvCesaMbufCopy(pCmd->pDst, pReq->frags.bufOffset, -+ pCmd->pSrc, pReq->frags.bufOffset, macDataSize); -+ } -+ -+/* -+ mvCesaCopyFromMbuf(cesaSramVirtPtr->buf[0], pCmd->pSrc, pReq->frags.bufOffset, macDataSize); -+ mvCesaCopyToMbuf(cesaSramVirtPtr->buf[0], pCmd->pDst, pReq->frags.bufOffset, macDataSize); -+*/ -+ pDigest = (mvCesaSramAddrGet() + pReq->frags.newDigestOffset); -+ -+ macMode = (pSA->config & MV_CESA_MAC_MODE_MASK) >> MV_CESA_MAC_MODE_OFFSET; -+/* -+ mvOsPrintf("macDataSize=%d, macLength=%d, digestOffset=%d, macMode=%d\n", -+ macDataSize, pCmd->macLength, pCmd->digestOffset, macMode); -+*/ -+ switch(macMode) -+ { -+ case MV_CESA_MAC_HMAC_MD5: -+ pOuterIV = pSA->pSramSA->macOuterIV; -+ -+ case MV_CESA_MAC_MD5: -+ mvCesaFragMd5Complete(pCmd->pDst, pReq->frags.bufOffset, pOuterIV, -+ macDataSize, pCmd->macLength, pDigest); -+ break; -+ -+ case MV_CESA_MAC_HMAC_SHA1: -+ pOuterIV = pSA->pSramSA->macOuterIV; -+ -+ case MV_CESA_MAC_SHA1: -+ mvCesaFragSha1Complete(pCmd->pDst, pReq->frags.bufOffset, pOuterIV, -+ macDataSize, pCmd->macLength, pDigest); -+ break; -+ -+ default: -+ mvOsPrintf("mvCesaFragAuthComplete: Unexpected macMode %d\n", macMode); -+ return MV_BAD_PARAM; -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaCtrModeInit - -+* -+* DESCRIPTION: -+* -+* -+* INPUT: NONE -+* -+* -+* RETURN: -+* MV_CESA_COMMAND* -+* -+*******************************************************************************/ -+static MV_CESA_COMMAND* mvCesaCtrModeInit(void) -+{ -+ MV_CESA_MBUF *pMbuf; -+ MV_U8 *pBuf; -+ MV_CESA_COMMAND *pCmd; -+ -+ pBuf = mvOsMalloc(sizeof(MV_CESA_COMMAND) + -+ sizeof(MV_CESA_MBUF) + sizeof(MV_BUF_INFO) + 100); -+ if(pBuf == NULL) -+ { -+ mvOsPrintf("mvCesaSessionOpen: Can't allocate %u bytes for CTR Mode\n", -+ sizeof(MV_CESA_COMMAND) + sizeof(MV_CESA_MBUF) + sizeof(MV_BUF_INFO) ); -+ return NULL; -+ } -+ pCmd = (MV_CESA_COMMAND*)pBuf; -+ pBuf += sizeof(MV_CESA_COMMAND); -+ -+ pMbuf = (MV_CESA_MBUF*)pBuf; -+ pBuf += sizeof(MV_CESA_MBUF); -+ -+ pMbuf->pFrags = (MV_BUF_INFO*)pBuf; -+ -+ pMbuf->numFrags = 1; -+ pCmd->pSrc = pMbuf; -+ pCmd->pDst = pMbuf; -+/* -+ mvOsPrintf("CtrModeInit: pCmd=%p, pSrc=%p, pDst=%p, pFrags=%p\n", -+ pCmd, pCmd->pSrc, pCmd->pDst, -+ pMbuf->pFrags); -+*/ -+ return pCmd; -+} -+ -+/******************************************************************************* -+* mvCesaCtrModePrepare - -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_COMMAND *pCtrModeCmd, MV_CESA_COMMAND *pCmd -+* -+* RETURN: -+* MV_STATUS -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaCtrModePrepare(MV_CESA_COMMAND *pCtrModeCmd, MV_CESA_COMMAND *pCmd) -+{ -+ MV_CESA_MBUF *pMbuf; -+ MV_U8 *pBuf, *pIV; -+ MV_U32 counter, *pCounter; -+ int cryptoSize = MV_ALIGN_UP(pCmd->cryptoLength, MV_CESA_AES_BLOCK_SIZE); -+/* -+ mvOsPrintf("CtrModePrepare: pCmd=%p, pCtrSrc=%p, pCtrDst=%p, pOrgCmd=%p, pOrgSrc=%p, pOrgDst=%p\n", -+ pCmd, pCmd->pSrc, pCmd->pDst, -+ pCtrModeCmd, pCtrModeCmd->pSrc, pCtrModeCmd->pDst); -+*/ -+ pMbuf = pCtrModeCmd->pSrc; -+ -+ /* Allocate buffer for Key stream */ -+ pBuf = mvOsIoCachedMalloc(cesaOsHandle,cryptoSize, -+ &pMbuf->pFrags[0].bufPhysAddr, -+ &pMbuf->pFrags[0].memHandle); -+ if(pBuf == NULL) -+ { -+ mvOsPrintf("mvCesaCtrModePrepare: Can't allocate %d bytes\n", cryptoSize); -+ return MV_OUT_OF_CPU_MEM; -+ } -+ memset(pBuf, 0, cryptoSize); -+ mvOsCacheFlush(NULL, pBuf, cryptoSize); -+ -+ pMbuf->pFrags[0].bufVirtPtr = pBuf; -+ pMbuf->mbufSize = cryptoSize; -+ pMbuf->pFrags[0].bufSize = cryptoSize; -+ -+ pCtrModeCmd->pReqPrv = pCmd->pReqPrv; -+ pCtrModeCmd->sessionId = pCmd->sessionId; -+ -+ /* ivFromUser and ivOffset are don't care */ -+ pCtrModeCmd->cryptoOffset = 0; -+ pCtrModeCmd->cryptoLength = cryptoSize; -+ -+ /* digestOffset, macOffset and macLength are don't care */ -+ -+ mvCesaCopyFromMbuf(pBuf, pCmd->pSrc, pCmd->ivOffset, MV_CESA_AES_BLOCK_SIZE); -+ pCounter = (MV_U32*)(pBuf + (MV_CESA_AES_BLOCK_SIZE - sizeof(counter))); -+ counter = *pCounter; -+ counter = MV_32BIT_BE(counter); -+ pIV = pBuf; -+ cryptoSize -= MV_CESA_AES_BLOCK_SIZE; -+ -+ /* fill key stream */ -+ while(cryptoSize > 0) -+ { -+ pBuf += MV_CESA_AES_BLOCK_SIZE; -+ memcpy(pBuf, pIV, MV_CESA_AES_BLOCK_SIZE - sizeof(counter)); -+ pCounter = (MV_U32*)(pBuf + (MV_CESA_AES_BLOCK_SIZE - sizeof(counter))); -+ counter++; -+ *pCounter = MV_32BIT_BE(counter); -+ cryptoSize -= MV_CESA_AES_BLOCK_SIZE; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaCtrModeComplete - -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_COMMAND *pOrgCmd, MV_CESA_COMMAND *pCmd -+* -+* RETURN: -+* MV_STATUS -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaCtrModeComplete(MV_CESA_COMMAND *pOrgCmd, MV_CESA_COMMAND *pCmd) -+{ -+ int srcFrag, dstFrag, srcOffset, dstOffset, keyOffset, srcSize, dstSize; -+ int cryptoSize = pCmd->cryptoLength; -+ MV_U8 *pSrc, *pDst, *pKey; -+ MV_STATUS status = MV_OK; -+/* -+ mvOsPrintf("CtrModeComplete: pCmd=%p, pCtrSrc=%p, pCtrDst=%p, pOrgCmd=%p, pOrgSrc=%p, pOrgDst=%p\n", -+ pCmd, pCmd->pSrc, pCmd->pDst, -+ pOrgCmd, pOrgCmd->pSrc, pOrgCmd->pDst); -+*/ -+ /* XOR source data with key stream to destination data */ -+ pKey = pCmd->pDst->pFrags[0].bufVirtPtr; -+ keyOffset = 0; -+ -+ if( (pOrgCmd->pSrc != pOrgCmd->pDst) && -+ (pOrgCmd->cryptoOffset > 0) ) -+ { -+ /* Copy Prefix from source buffer to destination buffer */ -+ -+ status = mvCesaMbufCopy(pOrgCmd->pDst, 0, -+ pOrgCmd->pSrc, 0, pOrgCmd->cryptoOffset); -+/* -+ status = mvCesaCopyFromMbuf(tempBuf, pOrgCmd->pSrc, -+ 0, pOrgCmd->cryptoOffset); -+ status = mvCesaCopyToMbuf(tempBuf, pOrgCmd->pDst, -+ 0, pOrgCmd->cryptoOffset); -+*/ -+ } -+ -+ srcFrag = mvCesaMbufOffset(pOrgCmd->pSrc, pOrgCmd->cryptoOffset, &srcOffset); -+ pSrc = pOrgCmd->pSrc->pFrags[srcFrag].bufVirtPtr; -+ srcSize = pOrgCmd->pSrc->pFrags[srcFrag].bufSize; -+ -+ dstFrag = mvCesaMbufOffset(pOrgCmd->pDst, pOrgCmd->cryptoOffset, &dstOffset); -+ pDst = pOrgCmd->pDst->pFrags[dstFrag].bufVirtPtr; -+ dstSize = pOrgCmd->pDst->pFrags[dstFrag].bufSize; -+ -+ while(cryptoSize > 0) -+ { -+ pDst[dstOffset] = (pSrc[srcOffset] ^ pKey[keyOffset]); -+ -+ cryptoSize--; -+ dstOffset++; -+ srcOffset++; -+ keyOffset++; -+ -+ if(srcOffset >= srcSize) -+ { -+ srcFrag++; -+ srcOffset = 0; -+ pSrc = pOrgCmd->pSrc->pFrags[srcFrag].bufVirtPtr; -+ srcSize = pOrgCmd->pSrc->pFrags[srcFrag].bufSize; -+ } -+ -+ if(dstOffset >= dstSize) -+ { -+ dstFrag++; -+ dstOffset = 0; -+ pDst = pOrgCmd->pDst->pFrags[dstFrag].bufVirtPtr; -+ dstSize = pOrgCmd->pDst->pFrags[dstFrag].bufSize; -+ } -+ } -+ -+ if(pOrgCmd->pSrc != pOrgCmd->pDst) -+ { -+ /* Copy Suffix from source buffer to destination buffer */ -+ srcOffset = pOrgCmd->cryptoOffset + pOrgCmd->cryptoLength; -+ -+ if( (pOrgCmd->pDst->mbufSize - srcOffset) > 0) -+ { -+ status = mvCesaMbufCopy(pOrgCmd->pDst, srcOffset, -+ pOrgCmd->pSrc, srcOffset, -+ pOrgCmd->pDst->mbufSize - srcOffset); -+ } -+ -+/* -+ status = mvCesaCopyFromMbuf(tempBuf, pOrgCmd->pSrc, -+ srcOffset, pOrgCmd->pSrc->mbufSize - srcOffset); -+ status = mvCesaCopyToMbuf(tempBuf, pOrgCmd->pDst, -+ srcOffset, pOrgCmd->pDst->mbufSize - srcOffset); -+*/ -+ } -+ -+ /* Free buffer used for Key stream */ -+ mvOsIoCachedFree(cesaOsHandle,pCmd->pDst->pFrags[0].bufSize, -+ pCmd->pDst->pFrags[0].bufPhysAddr, -+ pCmd->pDst->pFrags[0].bufVirtPtr, -+ pCmd->pDst->pFrags[0].memHandle); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaCtrModeFinish - -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_COMMAND* pCmd -+* -+* RETURN: -+* MV_STATUS -+* -+*******************************************************************************/ -+static void mvCesaCtrModeFinish(MV_CESA_COMMAND* pCmd) -+{ -+ mvOsFree(pCmd); -+} -+ -+/******************************************************************************* -+* mvCesaParamCheck - -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd, MV_U8* pFixOffset -+* -+* RETURN: -+* MV_STATUS -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaParamCheck(MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd, -+ MV_U8* pFixOffset) -+{ -+ MV_U8 fixOffset = 0xFF; -+ -+ /* Check AUTH operation parameters */ -+ if( ((pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET)) ) -+ { -+ /* MAC offset should be at least 4 byte aligned */ -+ if( MV_IS_NOT_ALIGN(pCmd->macOffset, 4) ) -+ { -+ mvOsPrintf("mvCesaAction: macOffset %d must be 4 byte aligned\n", -+ pCmd->macOffset); -+ return MV_BAD_PARAM; -+ } -+ /* Digest offset must be 4 byte aligned */ -+ if( MV_IS_NOT_ALIGN(pCmd->digestOffset, 4) ) -+ { -+ mvOsPrintf("mvCesaAction: digestOffset %d must be 4 byte aligned\n", -+ pCmd->digestOffset); -+ return MV_BAD_PARAM; -+ } -+ /* In addition all offsets should be the same alignment: 8 or 4 */ -+ if(fixOffset == 0xFF) -+ { -+ fixOffset = (pCmd->macOffset % 8); -+ } -+ else -+ { -+ if( (pCmd->macOffset % 8) != fixOffset) -+ { -+ mvOsPrintf("mvCesaAction: macOffset %d mod 8 must be equal %d\n", -+ pCmd->macOffset, fixOffset); -+ return MV_BAD_PARAM; -+ } -+ } -+ if( (pCmd->digestOffset % 8) != fixOffset) -+ { -+ mvOsPrintf("mvCesaAction: digestOffset %d mod 8 must be equal %d\n", -+ pCmd->digestOffset, fixOffset); -+ return MV_BAD_PARAM; -+ } -+ } -+ /* Check CRYPTO operation parameters */ -+ if( ((pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET)) ) -+ { -+ /* CryptoOffset should be at least 4 byte aligned */ -+ if( MV_IS_NOT_ALIGN(pCmd->cryptoOffset, 4) ) -+ { -+ mvOsPrintf("CesaAction: cryptoOffset=%d must be 4 byte aligned\n", -+ pCmd->cryptoOffset); -+ return MV_BAD_PARAM; -+ } -+ /* cryptoLength should be the whole number of blocks */ -+ if( MV_IS_NOT_ALIGN(pCmd->cryptoLength, pSA->cryptoBlockSize) ) -+ { -+ mvOsPrintf("mvCesaAction: cryptoLength=%d must be %d byte aligned\n", -+ pCmd->cryptoLength, pSA->cryptoBlockSize); -+ return MV_BAD_PARAM; -+ } -+ if(fixOffset == 0xFF) -+ { -+ fixOffset = (pCmd->cryptoOffset % 8); -+ } -+ else -+ { -+ /* In addition all offsets should be the same alignment: 8 or 4 */ -+ if( (pCmd->cryptoOffset % 8) != fixOffset) -+ { -+ mvOsPrintf("mvCesaAction: cryptoOffset %d mod 8 must be equal %d \n", -+ pCmd->cryptoOffset, fixOffset); -+ return MV_BAD_PARAM; -+ } -+ } -+ -+ /* check for CBC mode */ -+ if(pSA->cryptoIvSize > 0) -+ { -+ /* cryptoIV must not be part of CryptoLength */ -+ if( ((pCmd->ivOffset + pSA->cryptoIvSize) > pCmd->cryptoOffset) && -+ (pCmd->ivOffset < (pCmd->cryptoOffset + pCmd->cryptoLength)) ) -+ { -+ mvOsPrintf("mvCesaFragParamCheck: cryptoIvOffset (%d) is part of cryptoLength (%d+%d)\n", -+ pCmd->ivOffset, pCmd->macOffset, pCmd->macLength); -+ return MV_BAD_PARAM; -+ } -+ -+ /* ivOffset must be 4 byte aligned */ -+ if( MV_IS_NOT_ALIGN(pCmd->ivOffset, 4) ) -+ { -+ mvOsPrintf("CesaAction: ivOffset=%d must be 4 byte aligned\n", -+ pCmd->ivOffset); -+ return MV_BAD_PARAM; -+ } -+ /* In addition all offsets should be the same alignment: 8 or 4 */ -+ if( (pCmd->ivOffset % 8) != fixOffset) -+ { -+ mvOsPrintf("mvCesaAction: ivOffset %d mod 8 must be %d\n", -+ pCmd->ivOffset, fixOffset); -+ return MV_BAD_PARAM; -+ } -+ } -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaFragParamCheck - -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd -+* -+* RETURN: -+* MV_STATUS -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaFragParamCheck(MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd) -+{ -+ int offset; -+ -+ if( ((pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET)) ) -+ { -+ /* macOffset must be less that SRAM buffer size */ -+ if(pCmd->macOffset > (sizeof(cesaSramVirtPtr->buf) - MV_CESA_AUTH_BLOCK_SIZE)) -+ { -+ mvOsPrintf("mvCesaFragParamCheck: macOffset is too large (%d)\n", -+ pCmd->macOffset); -+ return MV_BAD_PARAM; -+ } -+ /* macOffset+macSize must be more than mbufSize - SRAM buffer size */ -+ if( ((pCmd->macOffset + pCmd->macLength) > pCmd->pSrc->mbufSize) || -+ ((pCmd->pSrc->mbufSize - (pCmd->macOffset + pCmd->macLength)) >= -+ sizeof(cesaSramVirtPtr->buf)) ) -+ { -+ mvOsPrintf("mvCesaFragParamCheck: macLength is too large (%d), mbufSize=%d\n", -+ pCmd->macLength, pCmd->pSrc->mbufSize); -+ return MV_BAD_PARAM; -+ } -+ } -+ -+ if( ((pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET)) ) -+ { -+ /* cryptoOffset must be less that SRAM buffer size */ -+ /* 4 for possible fixOffset */ -+ if( (pCmd->cryptoOffset + 4) > (sizeof(cesaSramVirtPtr->buf) - pSA->cryptoBlockSize)) -+ { -+ mvOsPrintf("mvCesaFragParamCheck: cryptoOffset is too large (%d)\n", -+ pCmd->cryptoOffset); -+ return MV_BAD_PARAM; -+ } -+ -+ /* cryptoOffset+cryptoSize must be more than mbufSize - SRAM buffer size */ -+ if( ((pCmd->cryptoOffset + pCmd->cryptoLength) > pCmd->pSrc->mbufSize) || -+ ((pCmd->pSrc->mbufSize - (pCmd->cryptoOffset + pCmd->cryptoLength)) >= -+ (sizeof(cesaSramVirtPtr->buf) - pSA->cryptoBlockSize)) ) -+ { -+ mvOsPrintf("mvCesaFragParamCheck: cryptoLength is too large (%d), mbufSize=%d\n", -+ pCmd->cryptoLength, pCmd->pSrc->mbufSize); -+ return MV_BAD_PARAM; -+ } -+ } -+ -+ /* When MAC_THEN_CRYPTO or CRYPTO_THEN_MAC */ -+ if( ((pSA->config & MV_CESA_OPERATION_MASK) == -+ (MV_CESA_MAC_THEN_CRYPTO << MV_CESA_OPERATION_OFFSET)) || -+ ((pSA->config & MV_CESA_OPERATION_MASK) == -+ (MV_CESA_CRYPTO_THEN_MAC << MV_CESA_OPERATION_OFFSET)) ) -+ { -+ if( (mvCtrlModelGet() == MV_5182_DEV_ID) || -+ ( (mvCtrlModelGet() == MV_5181_DEV_ID) && -+ (mvCtrlRevGet() >= MV_5181L_A0_REV) && -+ (pCmd->macLength >= (1 << 14)) ) ) -+ { -+ return MV_NOT_ALLOWED; -+ } -+ -+ /* abs(cryptoOffset-macOffset) must be aligned cryptoBlockSize */ -+ if(pCmd->cryptoOffset > pCmd->macOffset) -+ { -+ offset = pCmd->cryptoOffset - pCmd->macOffset; -+ } -+ else -+ { -+ offset = pCmd->macOffset - pCmd->cryptoOffset; -+ } -+ -+ if( MV_IS_NOT_ALIGN(offset, pSA->cryptoBlockSize) ) -+ { -+/* -+ mvOsPrintf("mvCesaFragParamCheck: (cryptoOffset - macOffset) must be %d byte aligned\n", -+ pSA->cryptoBlockSize); -+*/ -+ return MV_NOT_ALLOWED; -+ } -+ /* Digest must not be part of CryptoLength */ -+ if( ((pCmd->digestOffset + pSA->digestSize) > pCmd->cryptoOffset) && -+ (pCmd->digestOffset < (pCmd->cryptoOffset + pCmd->cryptoLength)) ) -+ { -+/* -+ mvOsPrintf("mvCesaFragParamCheck: digestOffset (%d) is part of cryptoLength (%d+%d)\n", -+ pCmd->digestOffset, pCmd->cryptoOffset, pCmd->cryptoLength); -+*/ -+ return MV_NOT_ALLOWED; -+ } -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCesaFragSizeFind - -+* -+* DESCRIPTION: -+* -+* -+* INPUT: -+* MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd, -+* int cryptoOffset, int macOffset, -+* -+* OUTPUT: -+* int* pCopySize, int* pCryptoDataSize, int* pMacDataSize -+* -+* RETURN: -+* MV_STATUS -+* -+*******************************************************************************/ -+static void mvCesaFragSizeFind(MV_CESA_SA* pSA, MV_CESA_REQ* pReq, -+ int cryptoOffset, int macOffset, -+ int* pCopySize, int* pCryptoDataSize, int* pMacDataSize) -+{ -+ MV_CESA_COMMAND *pCmd = pReq->pCmd; -+ int cryptoDataSize, macDataSize, copySize; -+ -+ cryptoDataSize = macDataSize = 0; -+ copySize = *pCopySize; -+ -+ if( (pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ cryptoDataSize = MV_MIN( (copySize - cryptoOffset), -+ (pCmd->cryptoLength - (pReq->frags.cryptoSize + 1)) ); -+ -+ /* cryptoSize for each fragment must be the whole number of blocksSize */ -+ if( MV_IS_NOT_ALIGN(cryptoDataSize, pSA->cryptoBlockSize) ) -+ { -+ cryptoDataSize = MV_ALIGN_DOWN(cryptoDataSize, pSA->cryptoBlockSize); -+ copySize = cryptoOffset + cryptoDataSize; -+ } -+ } -+ if( (pSA->config & MV_CESA_OPERATION_MASK) != -+ (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) ) -+ { -+ macDataSize = MV_MIN( (copySize - macOffset), -+ (pCmd->macLength - (pReq->frags.macSize + 1))); -+ -+ /* macSize for each fragment (except last) must be the whole number of blocksSize */ -+ if( MV_IS_NOT_ALIGN(macDataSize, MV_CESA_AUTH_BLOCK_SIZE) ) -+ { -+ macDataSize = MV_ALIGN_DOWN(macDataSize, MV_CESA_AUTH_BLOCK_SIZE); -+ copySize = macOffset + macDataSize; -+ } -+ cryptoDataSize = copySize - cryptoOffset; -+ } -+ *pCopySize = copySize; -+ -+ if(pCryptoDataSize != NULL) -+ *pCryptoDataSize = cryptoDataSize; -+ -+ if(pMacDataSize != NULL) -+ *pMacDataSize = macDataSize; -+} -diff --git a/crypto/ocf/kirkwood/cesa/mvCesa.h b/crypto/ocf/kirkwood/cesa/mvCesa.h -new file mode 100644 -index 0000000..6898699 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvCesa.h -@@ -0,0 +1,412 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+/******************************************************************************* -+* mvCesa.h - Header File for Cryptographic Engines and Security Accelerator -+* -+* DESCRIPTION: -+* This header file contains macros typedefs and function declaration for -+* the Marvell Cryptographic Engines and Security Accelerator. -+* -+*******************************************************************************/ -+ -+#ifndef __mvCesa_h__ -+#define __mvCesa_h__ -+ -+#include "mvOs.h" -+#include "mvCommon.h" -+#include "mvDebug.h" -+ -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+ -+#include "cesa/mvMD5.h" -+#include "cesa/mvSHA1.h" -+ -+#include "cesa/mvCesa.h" -+#include "cesa/AES/mvAes.h" -+#include "mvSysHwConfig.h" -+ -+#ifdef MV_INCLUDE_IDMA -+#include "idma/mvIdma.h" -+#include "idma/mvIdmaRegs.h" -+#else -+/* Redefine MV_DMA_DESC structure */ -+typedef struct _mvDmaDesc -+{ -+ MV_U32 byteCnt; /* The total number of bytes to transfer */ -+ MV_U32 phySrcAdd; /* The physical source address */ -+ MV_U32 phyDestAdd; /* The physical destination address */ -+ MV_U32 phyNextDescPtr; /* If we are using chain mode DMA transfer, */ -+ /* then this pointer should point to the */ -+ /* physical address of the next descriptor, */ -+ /* otherwise it should be NULL. */ -+}MV_DMA_DESC; -+#endif /* MV_INCLUDE_IDMA */ -+ -+#include "cesa/mvCesaRegs.h" -+ -+#define MV_CESA_AUTH_BLOCK_SIZE 64 /* bytes */ -+ -+#define MV_CESA_MD5_DIGEST_SIZE 16 /* bytes */ -+#define MV_CESA_SHA1_DIGEST_SIZE 20 /* bytes */ -+ -+#define MV_CESA_MAX_DIGEST_SIZE MV_CESA_SHA1_DIGEST_SIZE -+ -+#define MV_CESA_DES_KEY_LENGTH 8 /* bytes = 64 bits */ -+#define MV_CESA_3DES_KEY_LENGTH 24 /* bytes = 192 bits */ -+#define MV_CESA_AES_128_KEY_LENGTH 16 /* bytes = 128 bits */ -+#define MV_CESA_AES_192_KEY_LENGTH 24 /* bytes = 192 bits */ -+#define MV_CESA_AES_256_KEY_LENGTH 32 /* bytes = 256 bits */ -+ -+#define MV_CESA_MAX_CRYPTO_KEY_LENGTH MV_CESA_AES_256_KEY_LENGTH -+ -+#define MV_CESA_DES_BLOCK_SIZE 8 /* bytes = 64 bits */ -+#define MV_CESA_3DES_BLOCK_SIZE 8 /* bytes = 64 bits */ -+ -+#define MV_CESA_AES_BLOCK_SIZE 16 /* bytes = 128 bits */ -+ -+#define MV_CESA_MAX_IV_LENGTH MV_CESA_AES_BLOCK_SIZE -+ -+#define MV_CESA_MAX_MAC_KEY_LENGTH 64 /* bytes */ -+ -+typedef struct -+{ -+ MV_U8 cryptoKey[MV_CESA_MAX_CRYPTO_KEY_LENGTH]; -+ MV_U8 macKey[MV_CESA_MAX_MAC_KEY_LENGTH]; -+ MV_CESA_OPERATION operation; -+ MV_CESA_DIRECTION direction; -+ MV_CESA_CRYPTO_ALG cryptoAlgorithm; -+ MV_CESA_CRYPTO_MODE cryptoMode; -+ MV_U8 cryptoKeyLength; -+ MV_CESA_MAC_MODE macMode; -+ MV_U8 macKeyLength; -+ MV_U8 digestSize; -+ -+} MV_CESA_OPEN_SESSION; -+ -+typedef struct -+{ -+ MV_BUF_INFO *pFrags; -+ MV_U16 numFrags; -+ MV_U16 mbufSize; -+ -+} MV_CESA_MBUF; -+ -+typedef struct -+{ -+ void* pReqPrv; /* instead of reqId */ -+ MV_U32 retCode; -+ MV_16 sessionId; -+ -+} MV_CESA_RESULT; -+ -+typedef void (*MV_CESA_CALLBACK) (MV_CESA_RESULT* pResult); -+ -+ -+typedef struct -+{ -+ void* pReqPrv; /* instead of reqId */ -+ MV_CESA_MBUF* pSrc; -+ MV_CESA_MBUF* pDst; -+ MV_CESA_CALLBACK* pFuncCB; -+ MV_16 sessionId; -+ MV_U16 ivFromUser; -+ MV_U16 ivOffset; -+ MV_U16 cryptoOffset; -+ MV_U16 cryptoLength; -+ MV_U16 digestOffset; -+ MV_U16 macOffset; -+ MV_U16 macLength; -+ MV_BOOL skipFlush; -+} MV_CESA_COMMAND; -+ -+ -+ -+MV_STATUS mvCesaHalInit (int numOfSession, int queueDepth, char* pSramBase, MV_U32 cryptEngBase, void *osHandle); -+MV_STATUS mvCesaFinish (void); -+MV_STATUS mvCesaSessionOpen(MV_CESA_OPEN_SESSION *pSession, short* pSid); -+MV_STATUS mvCesaSessionClose(short sid); -+MV_STATUS mvCesaCryptoIvSet(MV_U8* pIV, int ivSize); -+ -+MV_STATUS mvCesaAction (MV_CESA_COMMAND* pCmd); -+ -+MV_U32 mvCesaInProcessGet(void); -+MV_STATUS mvCesaReadyDispatch(void); -+MV_STATUS mvCesaReadyGet(MV_CESA_RESULT* pResult); -+MV_BOOL mvCesaIsReady(void); -+ -+int mvCesaMbufOffset(MV_CESA_MBUF* pMbuf, int offset, int* pBufOffset); -+MV_STATUS mvCesaCopyFromMbuf(MV_U8* pDst, MV_CESA_MBUF* pSrcMbuf, -+ int offset, int size); -+MV_STATUS mvCesaCopyToMbuf(MV_U8* pSrc, MV_CESA_MBUF* pDstMbuf, -+ int offset, int size); -+MV_STATUS mvCesaMbufCopy(MV_CESA_MBUF* pMbufDst, int dstMbufOffset, -+ MV_CESA_MBUF* pMbufSrc, int srcMbufOffset, int size); -+ -+/********** Debug functions ********/ -+ -+void mvCesaDebugMbuf(const char* str, MV_CESA_MBUF *pMbuf, int offset, int size); -+void mvCesaDebugSA(short sid, int mode); -+void mvCesaDebugStats(void); -+void mvCesaDebugStatsClear(void); -+void mvCesaDebugRegs(void); -+void mvCesaDebugStatus(void); -+void mvCesaDebugQueue(int mode); -+void mvCesaDebugSram(int mode); -+void mvCesaDebugSAD(int mode); -+ -+ -+/******** CESA Private definitions ********/ -+#if (MV_CESA_VERSION >= 2) -+#if (MV_CACHE_COHERENCY == MV_CACHE_COHER_SW) -+#define MV_CESA_TDMA_CTRL_VALUE MV_CESA_TDMA_DST_BURST_MASK(MV_CESA_TDMA_BURST_128B) \ -+ | MV_CESA_TDMA_SRC_BURST_MASK(MV_CESA_TDMA_BURST_128B) \ -+ | MV_CESA_TDMA_OUTSTAND_READ_EN_MASK \ -+ | MV_CESA_TDMA_NO_BYTE_SWAP_MASK \ -+ | MV_CESA_TDMA_ENABLE_MASK -+#else -+#define MV_CESA_TDMA_CTRL_VALUE MV_CESA_TDMA_DST_BURST_MASK(MV_CESA_TDMA_BURST_32B) \ -+ | MV_CESA_TDMA_SRC_BURST_MASK(MV_CESA_TDMA_BURST_128B) \ -+ /*| MV_CESA_TDMA_OUTSTAND_READ_EN_MASK */\ -+ | MV_CESA_TDMA_ENABLE_MASK -+ -+#endif -+#else -+#define MV_CESA_IDMA_CTRL_LOW_VALUE ICCLR_DST_BURST_LIM_128BYTE \ -+ | ICCLR_SRC_BURST_LIM_128BYTE \ -+ | ICCLR_INT_MODE_MASK \ -+ | ICCLR_BLOCK_MODE \ -+ | ICCLR_CHAN_ENABLE \ -+ | ICCLR_DESC_MODE_16M -+#endif /* MV_CESA_VERSION >= 2 */ -+ -+#define MV_CESA_MAX_PKT_SIZE (64 * 1024) -+#define MV_CESA_MAX_MBUF_FRAGS 20 -+ -+#define MV_CESA_MAX_REQ_FRAGS ( (MV_CESA_MAX_PKT_SIZE / MV_CESA_MAX_BUF_SIZE) + 1) -+ -+#define MV_CESA_MAX_DMA_DESC (MV_CESA_MAX_MBUF_FRAGS*2 + 5) -+ -+#define MAX_CESA_CHAIN_LENGTH 20 -+ -+typedef enum -+{ -+ MV_CESA_IDLE = 0, -+ MV_CESA_PENDING, -+ MV_CESA_PROCESS, -+ MV_CESA_READY, -+#if (MV_CESA_VERSION >= 3) -+ MV_CESA_CHAIN, -+#endif -+} MV_CESA_STATE; -+ -+ -+/* Session database */ -+ -+/* Map of Key materials of the session in SRAM. -+ * Each field must be 8 byte aligned -+ * Total size: 32 + 24 + 24 = 80 bytes -+ */ -+typedef struct -+{ -+ MV_U8 cryptoKey[MV_CESA_MAX_CRYPTO_KEY_LENGTH]; -+ MV_U8 macInnerIV[MV_CESA_MAX_DIGEST_SIZE]; -+ MV_U8 reservedInner[4]; -+ MV_U8 macOuterIV[MV_CESA_MAX_DIGEST_SIZE]; -+ MV_U8 reservedOuter[4]; -+ -+} MV_CESA_SRAM_SA; -+ -+typedef struct -+{ -+ MV_CESA_SRAM_SA* pSramSA; -+ MV_U32 config; -+ MV_U8 cryptoKeyLength; -+ MV_U8 cryptoIvSize; -+ MV_U8 cryptoBlockSize; -+ MV_U8 digestSize; -+ MV_U8 macKeyLength; -+ MV_U8 valid; -+ MV_U8 ctrMode; -+ MV_U32 count; -+ -+} MV_CESA_SA; -+ -+/* DMA list management */ -+typedef struct -+{ -+ MV_DMA_DESC* pDmaFirst; -+ MV_DMA_DESC* pDmaLast; -+ -+} MV_CESA_DMA; -+ -+ -+typedef struct -+{ -+ MV_U8 numFrag; -+ MV_U8 nextFrag; -+ int bufOffset; -+ int cryptoSize; -+ int macSize; -+ int newDigestOffset; -+ MV_U8 orgDigest[MV_CESA_MAX_DIGEST_SIZE]; -+ -+} MV_CESA_FRAGS; -+ -+/* Request queue */ -+typedef struct -+{ -+ MV_U8 state; -+ MV_U8 fragMode; -+ MV_U8 fixOffset; -+ MV_CESA_COMMAND* pCmd; -+ MV_CESA_COMMAND* pOrgCmd; -+ MV_BUF_INFO dmaDescBuf; -+ MV_CESA_DMA dma[MV_CESA_MAX_REQ_FRAGS]; -+ MV_BUF_INFO cesaDescBuf; -+ MV_CESA_DESC* pCesaDesc; -+ MV_CESA_FRAGS frags; -+ -+ -+} MV_CESA_REQ; -+ -+ -+/* SRAM map */ -+/* Total SRAM size calculation */ -+/* SRAM size = -+ * MV_CESA_MAX_BUF_SIZE + -+ * sizeof(MV_CESA_DESC) + -+ * MV_CESA_MAX_IV_LENGTH + -+ * MV_CESA_MAX_IV_LENGTH + -+ * MV_CESA_MAX_DIGEST_SIZE + -+ * sizeof(MV_CESA_SRAM_SA) -+ * = 1600 + 32 + 16 + 16 + 24 + 80 + 280 (reserved) = 2048 bytes -+ * = 3200 + 32 + 16 + 16 + 24 + 80 + 728 (reserved) = 4096 bytes -+ */ -+typedef struct -+{ -+ MV_U8 buf[MV_CESA_MAX_BUF_SIZE]; -+ MV_CESA_DESC desc; -+ MV_U8 cryptoIV[MV_CESA_MAX_IV_LENGTH]; -+ MV_U8 tempCryptoIV[MV_CESA_MAX_IV_LENGTH]; -+ MV_U8 tempDigest[MV_CESA_MAX_DIGEST_SIZE+4]; -+ MV_CESA_SRAM_SA sramSA; -+ -+} MV_CESA_SRAM_MAP; -+ -+ -+typedef struct -+{ -+ MV_U32 openedCount; -+ MV_U32 closedCount; -+ MV_U32 fragCount; -+ MV_U32 reqCount; -+ MV_U32 maxReqCount; -+ MV_U32 procCount; -+ MV_U32 readyCount; -+ MV_U32 notReadyCount; -+ MV_U32 startCount; -+#if (MV_CESA_VERSION >= 3) -+ MV_U32 maxChainUsage; -+#endif -+ -+} MV_CESA_STATS; -+ -+ -+/* External variables */ -+ -+extern MV_CESA_STATS cesaStats; -+extern MV_CESA_FRAGS cesaFrags; -+ -+extern MV_BUF_INFO cesaSramSaBuf; -+ -+extern MV_CESA_SA* pCesaSAD; -+extern MV_U16 cesaMaxSA; -+ -+extern MV_CESA_REQ* pCesaReqFirst; -+extern MV_CESA_REQ* pCesaReqLast; -+extern MV_CESA_REQ* pCesaReqEmpty; -+extern MV_CESA_REQ* pCesaReqProcess; -+extern int cesaQueueDepth; -+extern int cesaReqResources; -+#if (MV_CESA_VERSION>= 3) -+extern MV_U32 cesaChainLength; -+#endif -+ -+extern MV_CESA_SRAM_MAP* cesaSramVirtPtr; -+extern MV_U32 cesaSramPhysAddr; -+ -+static INLINE MV_ULONG mvCesaVirtToPhys(MV_BUF_INFO* pBufInfo, void* pVirt) -+{ -+ return (pBufInfo->bufPhysAddr + ((MV_U8*)pVirt - pBufInfo->bufVirtPtr)); -+} -+ -+/* Additional DEBUG functions */ -+void mvCesaDebugSramSA(MV_CESA_SRAM_SA* pSramSA, int mode); -+void mvCesaDebugCmd(MV_CESA_COMMAND* pCmd, int mode); -+void mvCesaDebugDescriptor(MV_CESA_DESC* pDesc); -+ -+ -+ -+#endif /* __mvCesa_h__ */ -diff --git a/crypto/ocf/kirkwood/cesa/mvCesaDebug.c b/crypto/ocf/kirkwood/cesa/mvCesaDebug.c -new file mode 100644 -index 0000000..0b7cb48 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvCesaDebug.c -@@ -0,0 +1,484 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvOs.h" -+#include "mvDebug.h" -+ -+#include "cesa/mvMD5.h" -+#include "cesa/mvSHA1.h" -+ -+#include "cesa/mvCesa.h" -+#include "cesa/mvCesaRegs.h" -+#include "cesa/AES/mvAes.h" -+ -+static const char* mvCesaDebugStateStr(MV_CESA_STATE state) -+{ -+ switch(state) -+ { -+ case MV_CESA_IDLE: -+ return "Idle"; -+ -+ case MV_CESA_PENDING: -+ return "Pend"; -+ -+ case MV_CESA_PROCESS: -+ return "Proc"; -+ -+ case MV_CESA_READY: -+ return "Ready"; -+ -+ default: -+ break; -+ } -+ return "Unknown"; -+} -+ -+static const char* mvCesaDebugOperStr(MV_CESA_OPERATION oper) -+{ -+ switch(oper) -+ { -+ case MV_CESA_MAC_ONLY: -+ return "MacOnly"; -+ -+ case MV_CESA_CRYPTO_ONLY: -+ return "CryptoOnly"; -+ -+ case MV_CESA_MAC_THEN_CRYPTO: -+ return "MacCrypto"; -+ -+ case MV_CESA_CRYPTO_THEN_MAC: -+ return "CryptoMac"; -+ -+ default: -+ break; -+ } -+ return "Null"; -+} -+ -+static const char* mvCesaDebugCryptoAlgStr(MV_CESA_CRYPTO_ALG cryptoAlg) -+{ -+ switch(cryptoAlg) -+ { -+ case MV_CESA_CRYPTO_DES: -+ return "DES"; -+ -+ case MV_CESA_CRYPTO_3DES: -+ return "3DES"; -+ -+ case MV_CESA_CRYPTO_AES: -+ return "AES"; -+ -+ default: -+ break; -+ } -+ return "Null"; -+} -+ -+static const char* mvCesaDebugMacModeStr(MV_CESA_MAC_MODE macMode) -+{ -+ switch(macMode) -+ { -+ case MV_CESA_MAC_MD5: -+ return "MD5"; -+ -+ case MV_CESA_MAC_SHA1: -+ return "SHA1"; -+ -+ case MV_CESA_MAC_HMAC_MD5: -+ return "HMAC-MD5"; -+ -+ case MV_CESA_MAC_HMAC_SHA1: -+ return "HMAC_SHA1"; -+ -+ default: -+ break; -+ } -+ return "Null"; -+} -+ -+void mvCesaDebugCmd(MV_CESA_COMMAND* pCmd, int mode) -+{ -+ mvOsPrintf("pCmd=%p, pReqPrv=%p, pSrc=%p, pDst=%p, pCB=%p, sid=%d\n", -+ pCmd, pCmd->pReqPrv, pCmd->pSrc, pCmd->pDst, -+ pCmd->pFuncCB, pCmd->sessionId); -+ mvOsPrintf("isUser=%d, ivOffs=%d, crOffs=%d, crLen=%d, digest=%d, macOffs=%d, macLen=%d\n", -+ pCmd->ivFromUser, pCmd->ivOffset, pCmd->cryptoOffset, pCmd->cryptoLength, -+ pCmd->digestOffset, pCmd->macOffset, pCmd->macLength); -+} -+ -+/* no need to use in tool */ -+void mvCesaDebugMbuf(const char* str, MV_CESA_MBUF *pMbuf, int offset, int size) -+{ -+ int frag, len, fragOffset; -+ -+ if(str != NULL) -+ mvOsPrintf("%s: pMbuf=%p, numFrags=%d, mbufSize=%d\n", -+ str, pMbuf, pMbuf->numFrags, pMbuf->mbufSize); -+ -+ frag = mvCesaMbufOffset(pMbuf, offset, &fragOffset); -+ if(frag == MV_INVALID) -+ { -+ mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset); -+ return; -+ } -+ -+ for(; frag<pMbuf->numFrags; frag++) -+ { -+ mvOsPrintf("#%2d. bufVirt=%p, bufSize=%d\n", -+ frag, pMbuf->pFrags[frag].bufVirtPtr, -+ pMbuf->pFrags[frag].bufSize); -+ if(size > 0) -+ { -+ len = MV_MIN(pMbuf->pFrags[frag].bufSize, size); -+ mvDebugMemDump(pMbuf->pFrags[frag].bufVirtPtr+fragOffset, len, 1); -+ size -= len; -+ fragOffset = 0; -+ } -+ } -+} -+ -+void mvCesaDebugRegs(void) -+{ -+ mvOsPrintf("\t CESA Registers:\n"); -+ -+ mvOsPrintf("MV_CESA_CMD_REG : 0x%X = 0x%08x\n", -+ MV_CESA_CMD_REG, -+ MV_REG_READ( MV_CESA_CMD_REG ) ); -+ -+ mvOsPrintf("MV_CESA_CHAN_DESC_OFFSET_REG : 0x%X = 0x%08x\n", -+ MV_CESA_CHAN_DESC_OFFSET_REG, -+ MV_REG_READ(MV_CESA_CHAN_DESC_OFFSET_REG) ); -+ -+ mvOsPrintf("MV_CESA_CFG_REG : 0x%X = 0x%08x\n", -+ MV_CESA_CFG_REG, -+ MV_REG_READ( MV_CESA_CFG_REG ) ); -+ -+ mvOsPrintf("MV_CESA_STATUS_REG : 0x%X = 0x%08x\n", -+ MV_CESA_STATUS_REG, -+ MV_REG_READ( MV_CESA_STATUS_REG ) ); -+ -+ mvOsPrintf("MV_CESA_ISR_CAUSE_REG : 0x%X = 0x%08x\n", -+ MV_CESA_ISR_CAUSE_REG, -+ MV_REG_READ( MV_CESA_ISR_CAUSE_REG ) ); -+ -+ mvOsPrintf("MV_CESA_ISR_MASK_REG : 0x%X = 0x%08x\n", -+ MV_CESA_ISR_MASK_REG, -+ MV_REG_READ( MV_CESA_ISR_MASK_REG ) ); -+#if (MV_CESA_VERSION >= 2) -+ mvOsPrintf("MV_CESA_TDMA_CTRL_REG : 0x%X = 0x%08x\n", -+ MV_CESA_TDMA_CTRL_REG, -+ MV_REG_READ( MV_CESA_TDMA_CTRL_REG ) ); -+ -+ mvOsPrintf("MV_CESA_TDMA_BYTE_COUNT_REG : 0x%X = 0x%08x\n", -+ MV_CESA_TDMA_BYTE_COUNT_REG, -+ MV_REG_READ( MV_CESA_TDMA_BYTE_COUNT_REG ) ); -+ -+ mvOsPrintf("MV_CESA_TDMA_SRC_ADDR_REG : 0x%X = 0x%08x\n", -+ MV_CESA_TDMA_SRC_ADDR_REG, -+ MV_REG_READ( MV_CESA_TDMA_SRC_ADDR_REG ) ); -+ -+ mvOsPrintf("MV_CESA_TDMA_DST_ADDR_REG : 0x%X = 0x%08x\n", -+ MV_CESA_TDMA_DST_ADDR_REG, -+ MV_REG_READ( MV_CESA_TDMA_DST_ADDR_REG ) ); -+ -+ mvOsPrintf("MV_CESA_TDMA_NEXT_DESC_PTR_REG : 0x%X = 0x%08x\n", -+ MV_CESA_TDMA_NEXT_DESC_PTR_REG, -+ MV_REG_READ( MV_CESA_TDMA_NEXT_DESC_PTR_REG ) ); -+ -+ mvOsPrintf("MV_CESA_TDMA_CURR_DESC_PTR_REG : 0x%X = 0x%08x\n", -+ MV_CESA_TDMA_CURR_DESC_PTR_REG, -+ MV_REG_READ( MV_CESA_TDMA_CURR_DESC_PTR_REG ) ); -+ -+ mvOsPrintf("MV_CESA_TDMA_ERROR_CAUSE_REG : 0x%X = 0x%08x\n", -+ MV_CESA_TDMA_ERROR_CAUSE_REG, -+ MV_REG_READ( MV_CESA_TDMA_ERROR_CAUSE_REG ) ); -+ -+ mvOsPrintf("MV_CESA_TDMA_ERROR_MASK_REG : 0x%X = 0x%08x\n", -+ MV_CESA_TDMA_ERROR_MASK_REG, -+ MV_REG_READ( MV_CESA_TDMA_ERROR_CAUSE_REG ) ); -+ -+#endif -+} -+ -+void mvCesaDebugStatus(void) -+{ -+ mvOsPrintf("\n\t CESA Status\n\n"); -+ -+ mvOsPrintf("pReqQ=%p, qDepth=%d, reqSize=%ld bytes, qRes=%d, ", -+ pCesaReqFirst, cesaQueueDepth, sizeof(MV_CESA_REQ), -+ cesaReqResources); -+#if (MV_CESA_VERSION >= 3) -+ mvOsPrintf("chainLength=%u\n",cesaChainLength); -+#else -+ mvOsPrintf("\n"); -+#endif -+ -+ mvOsPrintf("pSAD=%p, maxSA=%d, sizeSA=%ld bytes\n", -+ pCesaSAD, cesaMaxSA, sizeof(MV_CESA_SA)); -+ -+ mvOsPrintf("\n"); -+ -+ mvCesaDebugRegs(); -+ mvCesaDebugStats(); -+ mvCesaDebugStatsClear(); -+} -+ -+void mvCesaDebugDescriptor(MV_CESA_DESC* pDesc) -+{ -+ mvOsPrintf("config=0x%08x, crSrcOffs=0x%04x, crDstOffs=0x%04x\n", -+ pDesc->config, pDesc->cryptoSrcOffset, pDesc->cryptoDstOffset); -+ -+ mvOsPrintf("crLen=0x%04x, crKeyOffs=0x%04x, ivOffs=0x%04x, ivBufOffs=0x%04x\n", -+ pDesc->cryptoDataLen, pDesc->cryptoKeyOffset, -+ pDesc->cryptoIvOffset, pDesc->cryptoIvBufOffset); -+ -+ mvOsPrintf("macSrc=0x%04x, digest=0x%04x, macLen=0x%04x, inIv=0x%04x, outIv=0x%04x\n", -+ pDesc->macSrcOffset, pDesc->macDigestOffset, pDesc->macDataLen, -+ pDesc->macInnerIvOffset, pDesc->macOuterIvOffset); -+} -+ -+void mvCesaDebugQueue(int mode) -+{ -+ mvOsPrintf("\n\t CESA Request Queue:\n\n"); -+ -+ mvOsPrintf("pFirstReq=%p, pLastReq=%p, qDepth=%d, reqSize=%ld bytes\n", -+ pCesaReqFirst, pCesaReqLast, cesaQueueDepth, sizeof(MV_CESA_REQ)); -+ -+ mvOsPrintf("pEmpty=%p, pProcess=%p, qResources=%d\n", -+ pCesaReqEmpty, pCesaReqProcess, -+ cesaReqResources); -+ -+ if(mode != 0) -+ { -+ int count = 0; -+ MV_CESA_REQ* pReq = pCesaReqFirst; -+ -+ for(count=0; count<cesaQueueDepth; count++) -+ { -+ /* Print out requsts */ -+ mvOsPrintf("%02d. pReq=%p, state=%s, frag=0x%x, pCmd=%p, pDma=%p, pDesc=%p\n", -+ count, pReq, mvCesaDebugStateStr(pReq->state), -+ pReq->fragMode, pReq->pCmd, pReq->dma[0].pDmaFirst, &pReq->pCesaDesc[0]); -+ if(pReq->fragMode != MV_CESA_FRAG_NONE) -+ { -+ int frag; -+ -+ mvOsPrintf("pFrags=%p, num=%d, next=%d, bufOffset=%d, cryptoSize=%d, macSize=%d\n", -+ &pReq->frags, pReq->frags.numFrag, pReq->frags.nextFrag, -+ pReq->frags.bufOffset, pReq->frags.cryptoSize, pReq->frags.macSize); -+ for(frag=0; frag<pReq->frags.numFrag; frag++) -+ { -+ mvOsPrintf("#%d: pDmaFirst=%p, pDesc=%p\n", frag, -+ pReq->dma[frag].pDmaFirst, &pReq->pCesaDesc[frag]); -+ } -+ } -+ if(mode > 1) -+ { -+ /* Print out Command */ -+ mvCesaDebugCmd(pReq->pCmd, mode); -+ -+ /* Print out Descriptor */ -+ mvCesaDebugDescriptor(&pReq->pCesaDesc[0]); -+ } -+ pReq++; -+ } -+ } -+} -+ -+ -+void mvCesaDebugSramSA(MV_CESA_SRAM_SA* pSramSA, int mode) -+{ -+ if(pSramSA == NULL) -+ { -+ mvOsPrintf("cesaSramSA: Unexpected pSramSA=%p\n", pSramSA); -+ return; -+ } -+ mvOsPrintf("pSramSA=%p, sizeSramSA=%ld bytes\n", -+ pSramSA, sizeof(MV_CESA_SRAM_SA)); -+ -+ if(mode != 0) -+ { -+ mvOsPrintf("cryptoKey=%p, maxCryptoKey=%d bytes\n", -+ pSramSA->cryptoKey, MV_CESA_MAX_CRYPTO_KEY_LENGTH); -+ mvDebugMemDump(pSramSA->cryptoKey, MV_CESA_MAX_CRYPTO_KEY_LENGTH, 1); -+ -+ mvOsPrintf("macInnerIV=%p, maxInnerIV=%d bytes\n", -+ pSramSA->macInnerIV, MV_CESA_MAX_DIGEST_SIZE); -+ mvDebugMemDump(pSramSA->macInnerIV, MV_CESA_MAX_DIGEST_SIZE, 1); -+ -+ mvOsPrintf("macOuterIV=%p, maxOuterIV=%d bytes\n", -+ pSramSA->macOuterIV, MV_CESA_MAX_DIGEST_SIZE); -+ mvDebugMemDump(pSramSA->macOuterIV, MV_CESA_MAX_DIGEST_SIZE, 1); -+ } -+} -+ -+void mvCesaDebugSA(short sid, int mode) -+{ -+ MV_CESA_OPERATION oper; -+ MV_CESA_DIRECTION dir; -+ MV_CESA_CRYPTO_ALG cryptoAlg; -+ MV_CESA_CRYPTO_MODE cryptoMode; -+ MV_CESA_MAC_MODE macMode; -+ MV_CESA_SA* pSA = &pCesaSAD[sid]; -+ -+ if( (pSA->valid) || ((pSA->count != 0) && (mode > 0)) || (mode >= 2) ) -+ { -+ mvOsPrintf("\n\nCESA SA Entry #%d (%p) - %s (count=%d)\n", -+ sid, pSA, -+ pSA->valid ? "Valid" : "Invalid", pSA->count); -+ -+ oper = (pSA->config & MV_CESA_OPERATION_MASK) >> MV_CESA_OPERATION_OFFSET; -+ dir = (pSA->config & MV_CESA_DIRECTION_MASK) >> MV_CESA_DIRECTION_BIT; -+ mvOsPrintf("%s - %s ", mvCesaDebugOperStr(oper), -+ (dir == MV_CESA_DIR_ENCODE) ? "Encode" : "Decode"); -+ if(oper != MV_CESA_MAC_ONLY) -+ { -+ cryptoAlg = (pSA->config & MV_CESA_CRYPTO_ALG_MASK) >> MV_CESA_CRYPTO_ALG_OFFSET; -+ cryptoMode = (pSA->config & MV_CESA_CRYPTO_MODE_MASK) >> MV_CESA_CRYPTO_MODE_BIT; -+ mvOsPrintf("- %s - %s ", mvCesaDebugCryptoAlgStr(cryptoAlg), -+ (cryptoMode == MV_CESA_CRYPTO_ECB) ? "ECB" : "CBC"); -+ } -+ if(oper != MV_CESA_CRYPTO_ONLY) -+ { -+ macMode = (pSA->config & MV_CESA_MAC_MODE_MASK) >> MV_CESA_MAC_MODE_OFFSET; -+ mvOsPrintf("- %s ", mvCesaDebugMacModeStr(macMode)); -+ } -+ mvOsPrintf("\n"); -+ -+ if(mode > 0) -+ { -+ mvOsPrintf("config=0x%08x, cryptoKeySize=%d, digestSize=%d\n", -+ pCesaSAD[sid].config, pCesaSAD[sid].cryptoKeyLength, -+ pCesaSAD[sid].digestSize); -+ -+ mvCesaDebugSramSA(pCesaSAD[sid].pSramSA, mode); -+ } -+ } -+} -+ -+ -+/**/ -+void mvCesaDebugSram(int mode) -+{ -+ mvOsPrintf("\n\t SRAM contents: size=%ld, pVirt=%p\n\n", -+ sizeof(MV_CESA_SRAM_MAP), cesaSramVirtPtr); -+ -+ mvOsPrintf("\n\t Sram buffer: size=%d, pVirt=%p\n", -+ MV_CESA_MAX_BUF_SIZE, cesaSramVirtPtr->buf); -+ if(mode != 0) -+ mvDebugMemDump(cesaSramVirtPtr->buf, 64, 1); -+ -+ mvOsPrintf("\n"); -+ mvOsPrintf("\n\t Sram descriptor: size=%ld, pVirt=%p\n", -+ sizeof(MV_CESA_DESC), &cesaSramVirtPtr->desc); -+ if(mode != 0) -+ { -+ mvOsPrintf("\n"); -+ mvCesaDebugDescriptor(&cesaSramVirtPtr->desc); -+ } -+ mvOsPrintf("\n\t Sram IV: size=%d, pVirt=%p\n", -+ MV_CESA_MAX_IV_LENGTH, &cesaSramVirtPtr->cryptoIV); -+ if(mode != 0) -+ { -+ mvOsPrintf("\n"); -+ mvDebugMemDump(cesaSramVirtPtr->cryptoIV, MV_CESA_MAX_IV_LENGTH, 1); -+ } -+ mvOsPrintf("\n"); -+ mvCesaDebugSramSA(&cesaSramVirtPtr->sramSA, 0); -+} -+ -+void mvCesaDebugSAD(int mode) -+{ -+ int sid; -+ -+ mvOsPrintf("\n\t Cesa SAD status: pSAD=%p, maxSA=%d\n", -+ pCesaSAD, cesaMaxSA); -+ -+ for(sid=0; sid<cesaMaxSA; sid++) -+ { -+ mvCesaDebugSA(sid, mode); -+ } -+} -+ -+void mvCesaDebugStats(void) -+{ -+ mvOsPrintf("\n\t Cesa Statistics\n"); -+ -+ mvOsPrintf("Opened=%u, Closed=%u\n", -+ cesaStats.openedCount, cesaStats.closedCount); -+ mvOsPrintf("Req=%u, maxReq=%u, frags=%u, start=%u\n", -+ cesaStats.reqCount, cesaStats.maxReqCount, -+ cesaStats.fragCount, cesaStats.startCount); -+#if (MV_CESA_VERSION >= 3) -+ mvOsPrintf("maxChainUsage=%u\n",cesaStats.maxChainUsage); -+#endif -+ mvOsPrintf("\n"); -+ mvOsPrintf("proc=%u, ready=%u, notReady=%u\n", -+ cesaStats.procCount, cesaStats.readyCount, cesaStats.notReadyCount); -+} -+ -+void mvCesaDebugStatsClear(void) -+{ -+ memset(&cesaStats, 0, sizeof(cesaStats)); -+} -diff --git a/crypto/ocf/kirkwood/cesa/mvCesaRegs.h b/crypto/ocf/kirkwood/cesa/mvCesaRegs.h -new file mode 100644 -index 0000000..c6eecae ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvCesaRegs.h -@@ -0,0 +1,357 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __mvCesaRegs_h__ -+#define __mvCesaRegs_h__ -+ -+#include "mvTypes.h" -+ -+typedef struct -+{ -+ /* word 0 */ -+ MV_U32 config; -+ /* word 1 */ -+ MV_U16 cryptoSrcOffset; -+ MV_U16 cryptoDstOffset; -+ /* word 2 */ -+ MV_U16 cryptoDataLen; -+ MV_U16 reserved1; -+ /* word 3 */ -+ MV_U16 cryptoKeyOffset; -+ MV_U16 reserved2; -+ /* word 4 */ -+ MV_U16 cryptoIvOffset; -+ MV_U16 cryptoIvBufOffset; -+ /* word 5 */ -+ MV_U16 macSrcOffset; -+ MV_U16 macTotalLen; -+ /* word 6 */ -+ MV_U16 macDigestOffset; -+ MV_U16 macDataLen; -+ /* word 7 */ -+ MV_U16 macInnerIvOffset; -+ MV_U16 macOuterIvOffset; -+ -+} MV_CESA_DESC; -+ -+/* operation */ -+typedef enum -+{ -+ MV_CESA_MAC_ONLY = 0, -+ MV_CESA_CRYPTO_ONLY = 1, -+ MV_CESA_MAC_THEN_CRYPTO = 2, -+ MV_CESA_CRYPTO_THEN_MAC = 3, -+ -+ MV_CESA_MAX_OPERATION -+ -+} MV_CESA_OPERATION; -+ -+#define MV_CESA_OPERATION_OFFSET 0 -+#define MV_CESA_OPERATION_MASK (0x3 << MV_CESA_OPERATION_OFFSET) -+ -+/* mac algorithm */ -+typedef enum -+{ -+ MV_CESA_MAC_NULL = 0, -+ MV_CESA_MAC_MD5 = 4, -+ MV_CESA_MAC_SHA1 = 5, -+ MV_CESA_MAC_HMAC_MD5 = 6, -+ MV_CESA_MAC_HMAC_SHA1 = 7, -+ -+} MV_CESA_MAC_MODE; -+ -+#define MV_CESA_MAC_MODE_OFFSET 4 -+#define MV_CESA_MAC_MODE_MASK (0x7 << MV_CESA_MAC_MODE_OFFSET) -+ -+typedef enum -+{ -+ MV_CESA_MAC_DIGEST_FULL = 0, -+ MV_CESA_MAC_DIGEST_96B = 1, -+ -+} MV_CESA_MAC_DIGEST_SIZE; -+ -+#define MV_CESA_MAC_DIGEST_SIZE_BIT 7 -+#define MV_CESA_MAC_DIGEST_SIZE_MASK (1 << MV_CESA_MAC_DIGEST_SIZE_BIT) -+ -+ -+typedef enum -+{ -+ MV_CESA_CRYPTO_NULL = 0, -+ MV_CESA_CRYPTO_DES = 1, -+ MV_CESA_CRYPTO_3DES = 2, -+ MV_CESA_CRYPTO_AES = 3, -+ -+} MV_CESA_CRYPTO_ALG; -+ -+#define MV_CESA_CRYPTO_ALG_OFFSET 8 -+#define MV_CESA_CRYPTO_ALG_MASK (0x3 << MV_CESA_CRYPTO_ALG_OFFSET) -+ -+ -+/* direction */ -+typedef enum -+{ -+ MV_CESA_DIR_ENCODE = 0, -+ MV_CESA_DIR_DECODE = 1, -+ -+} MV_CESA_DIRECTION; -+ -+#define MV_CESA_DIRECTION_BIT 12 -+#define MV_CESA_DIRECTION_MASK (1 << MV_CESA_DIRECTION_BIT) -+ -+/* crypto IV mode */ -+typedef enum -+{ -+ MV_CESA_CRYPTO_ECB = 0, -+ MV_CESA_CRYPTO_CBC = 1, -+ -+ /* NO HW Support */ -+ MV_CESA_CRYPTO_CTR = 10, -+ -+} MV_CESA_CRYPTO_MODE; -+ -+#define MV_CESA_CRYPTO_MODE_BIT 16 -+#define MV_CESA_CRYPTO_MODE_MASK (1 << MV_CESA_CRYPTO_MODE_BIT) -+ -+/* 3DES mode */ -+typedef enum -+{ -+ MV_CESA_CRYPTO_3DES_EEE = 0, -+ MV_CESA_CRYPTO_3DES_EDE = 1, -+ -+} MV_CESA_CRYPTO_3DES_MODE; -+ -+#define MV_CESA_CRYPTO_3DES_MODE_BIT 20 -+#define MV_CESA_CRYPTO_3DES_MODE_MASK (1 << MV_CESA_CRYPTO_3DES_MODE_BIT) -+ -+ -+/* AES Key Length */ -+typedef enum -+{ -+ MV_CESA_CRYPTO_AES_KEY_128 = 0, -+ MV_CESA_CRYPTO_AES_KEY_192 = 1, -+ MV_CESA_CRYPTO_AES_KEY_256 = 2, -+ -+} MV_CESA_CRYPTO_AES_KEY_LEN; -+ -+#define MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET 24 -+#define MV_CESA_CRYPTO_AES_KEY_LEN_MASK (0x3 << MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET) -+ -+/* Fragmentation mode */ -+typedef enum -+{ -+ MV_CESA_FRAG_NONE = 0, -+ MV_CESA_FRAG_FIRST = 1, -+ MV_CESA_FRAG_LAST = 2, -+ MV_CESA_FRAG_MIDDLE = 3, -+ -+} MV_CESA_FRAG_MODE; -+ -+#define MV_CESA_FRAG_MODE_OFFSET 30 -+#define MV_CESA_FRAG_MODE_MASK (0x3 << MV_CESA_FRAG_MODE_OFFSET) -+/*---------------------------------------------------------------------------*/ -+ -+/********** Security Accelerator Command Register **************/ -+#define MV_CESA_CMD_REG (MV_CESA_REG_BASE + 0xE00) -+ -+#define MV_CESA_CMD_CHAN_ENABLE_BIT 0 -+#define MV_CESA_CMD_CHAN_ENABLE_MASK (1 << MV_CESA_CMD_CHAN_ENABLE_BIT) -+ -+#define MV_CESA_CMD_CHAN_DISABLE_BIT 2 -+#define MV_CESA_CMD_CHAN_DISABLE_MASK (1 << MV_CESA_CMD_CHAN_DISABLE_BIT) -+ -+/********** Security Accelerator Descriptor Pointers Register **********/ -+#define MV_CESA_CHAN_DESC_OFFSET_REG (MV_CESA_REG_BASE + 0xE04) -+ -+/********** Security Accelerator Configuration Register **********/ -+#define MV_CESA_CFG_REG (MV_CESA_REG_BASE + 0xE08) -+ -+#define MV_CESA_CFG_STOP_DIGEST_ERR_BIT 0 -+#define MV_CESA_CFG_STOP_DIGEST_ERR_MASK (1 << MV_CESA_CFG_STOP_DIGEST_ERR_BIT) -+ -+#define MV_CESA_CFG_WAIT_DMA_BIT 7 -+#define MV_CESA_CFG_WAIT_DMA_MASK (1 << MV_CESA_CFG_WAIT_DMA_BIT) -+ -+#define MV_CESA_CFG_ACT_DMA_BIT 9 -+#define MV_CESA_CFG_ACT_DMA_MASK (1 << MV_CESA_CFG_ACT_DMA_BIT) -+ -+#define MV_CESA_CFG_CHAIN_MODE_BIT 11 -+#define MV_CESA_CFG_CHAIN_MODE_MASK (1 << MV_CESA_CFG_CHAIN_MODE_BIT) -+ -+/********** Security Accelerator Status Register ***********/ -+#define MV_CESA_STATUS_REG (MV_CESA_REG_BASE + 0xE0C) -+ -+#define MV_CESA_STATUS_ACTIVE_BIT 0 -+#define MV_CESA_STATUS_ACTIVE_MASK (1 << MV_CESA_STATUS_ACTIVE_BIT) -+ -+#define MV_CESA_STATUS_DIGEST_ERR_BIT 8 -+#define MV_CESA_STATUS_DIGEST_ERR_MASK (1 << MV_CESA_STATUS_DIGEST_ERR_BIT) -+ -+ -+/* Cryptographic Engines and Security Accelerator Interrupt Cause Register */ -+#define MV_CESA_ISR_CAUSE_REG (MV_CESA_REG_BASE + 0xE20) -+ -+/* Cryptographic Engines and Security Accelerator Interrupt Mask Register */ -+#define MV_CESA_ISR_MASK_REG (MV_CESA_REG_BASE + 0xE24) -+ -+#define MV_CESA_CAUSE_AUTH_MASK (1 << 0) -+#define MV_CESA_CAUSE_DES_MASK (1 << 1) -+#define MV_CESA_CAUSE_AES_ENCR_MASK (1 << 2) -+#define MV_CESA_CAUSE_AES_DECR_MASK (1 << 3) -+#define MV_CESA_CAUSE_DES_ALL_MASK (1 << 4) -+ -+#define MV_CESA_CAUSE_ACC_BIT 5 -+#define MV_CESA_CAUSE_ACC_MASK (1 << MV_CESA_CAUSE_ACC_BIT) -+ -+#define MV_CESA_CAUSE_ACC_DMA_BIT 7 -+#define MV_CESA_CAUSE_ACC_DMA_MASK (1 << MV_CESA_CAUSE_ACC_DMA_BIT) -+#define MV_CESA_CAUSE_ACC_DMA_ALL_MASK (3 << MV_CESA_CAUSE_ACC_DMA_BIT) -+ -+#define MV_CESA_CAUSE_DMA_COMPL_BIT 9 -+#define MV_CESA_CAUSE_DMA_COMPL_MASK (1 << MV_CESA_CAUSE_DMA_COMPL_BIT) -+ -+#define MV_CESA_CAUSE_DMA_OWN_ERR_BIT 10 -+#define MV_CESA_CAUSE_DMA_OWN_ERR_MASK (1 < MV_CESA_CAUSE_DMA_OWN_ERR_BIT) -+ -+#define MV_CESA_CAUSE_DMA_CHAIN_PKT_BIT 11 -+#define MV_CESA_CAUSE_DMA_CHAIN_PKT_MASK (1 < MV_CESA_CAUSE_DMA_CHAIN_PKT_BIT) -+ -+ -+#define MV_CESA_AUTH_DATA_IN_REG (MV_CESA_REG_BASE + 0xd38) -+#define MV_CESA_AUTH_BIT_COUNT_LOW_REG (MV_CESA_REG_BASE + 0xd20) -+#define MV_CESA_AUTH_BIT_COUNT_HIGH_REG (MV_CESA_REG_BASE + 0xd24) -+ -+#define MV_CESA_AUTH_INIT_VAL_DIGEST_REG(i) (MV_CESA_REG_BASE + 0xd00 + (i<<2)) -+ -+#define MV_CESA_AUTH_INIT_VAL_DIGEST_A_REG (MV_CESA_REG_BASE + 0xd00) -+#define MV_CESA_AUTH_INIT_VAL_DIGEST_B_REG (MV_CESA_REG_BASE + 0xd04) -+#define MV_CESA_AUTH_INIT_VAL_DIGEST_C_REG (MV_CESA_REG_BASE + 0xd08) -+#define MV_CESA_AUTH_INIT_VAL_DIGEST_D_REG (MV_CESA_REG_BASE + 0xd0c) -+#define MV_CESA_AUTH_INIT_VAL_DIGEST_E_REG (MV_CESA_REG_BASE + 0xd10) -+#define MV_CESA_AUTH_COMMAND_REG (MV_CESA_REG_BASE + 0xd18) -+ -+#define MV_CESA_AUTH_ALGORITHM_BIT 0 -+#define MV_CESA_AUTH_ALGORITHM_MD5 (0<<AUTH_ALGORITHM_BIT) -+#define MV_CESA_AUTH_ALGORITHM_SHA1 (1<<AUTH_ALGORITHM_BIT) -+ -+#define MV_CESA_AUTH_IV_MODE_BIT 1 -+#define MV_CESA_AUTH_IV_MODE_INIT (0<<AUTH_IV_MODE_BIT) -+#define MV_CESA_AUTH_IV_MODE_CONTINUE (1<<AUTH_IV_MODE_BIT) -+ -+#define MV_CESA_AUTH_DATA_BYTE_SWAP_BIT 2 -+#define MV_CESA_AUTH_DATA_BYTE_SWAP_MASK (1<<AUTH_DATA_BYTE_SWAP_BIT) -+ -+ -+#define MV_CESA_AUTH_IV_BYTE_SWAP_BIT 4 -+#define MV_CESA_AUTH_IV_BYTE_SWAP_MASK (1<<AUTH_IV_BYTE_SWAP_BIT) -+ -+#define MV_CESA_AUTH_TERMINATION_BIT 31 -+#define MV_CESA_AUTH_TERMINATION_MASK (1<<AUTH_TERMINATION_BIT) -+ -+ -+/*************** TDMA Control Register ************************************************/ -+#define MV_CESA_TDMA_CTRL_REG (MV_CESA_TDMA_REG_BASE + 0x840) -+ -+#define MV_CESA_TDMA_BURST_32B 3 -+#define MV_CESA_TDMA_BURST_128B 4 -+ -+#define MV_CESA_TDMA_DST_BURST_OFFSET 0 -+#define MV_CESA_TDMA_DST_BURST_ALL_MASK (0x7<<MV_CESA_TDMA_DST_BURST_OFFSET) -+#define MV_CESA_TDMA_DST_BURST_MASK(burst) ((burst)<<MV_CESA_TDMA_DST_BURST_OFFSET) -+ -+#define MV_CESA_TDMA_OUTSTAND_READ_EN_BIT 4 -+#define MV_CESA_TDMA_OUTSTAND_READ_EN_MASK (1<<MV_CESA_TDMA_OUTSTAND_READ_EN_BIT) -+ -+#define MV_CESA_TDMA_SRC_BURST_OFFSET 6 -+#define MV_CESA_TDMA_SRC_BURST_ALL_MASK (0x7<<MV_CESA_TDMA_SRC_BURST_OFFSET) -+#define MV_CESA_TDMA_SRC_BURST_MASK(burst) ((burst)<<MV_CESA_TDMA_SRC_BURST_OFFSET) -+ -+#define MV_CESA_TDMA_CHAIN_MODE_BIT 9 -+#define MV_CESA_TDMA_NON_CHAIN_MODE_MASK (1<<MV_CESA_TDMA_CHAIN_MODE_BIT) -+ -+#define MV_CESA_TDMA_BYTE_SWAP_BIT 11 -+#define MV_CESA_TDMA_BYTE_SWAP_MASK (0 << MV_CESA_TDMA_BYTE_SWAP_BIT) -+#define MV_CESA_TDMA_NO_BYTE_SWAP_MASK (1 << MV_CESA_TDMA_BYTE_SWAP_BIT) -+ -+#define MV_CESA_TDMA_ENABLE_BIT 12 -+#define MV_CESA_TDMA_ENABLE_MASK (1<<MV_CESA_TDMA_ENABLE_BIT) -+ -+#define MV_CESA_TDMA_FETCH_NEXT_DESC_BIT 13 -+#define MV_CESA_TDMA_FETCH_NEXT_DESC_MASK (1<<MV_CESA_TDMA_FETCH_NEXT_DESC_BIT) -+ -+#define MV_CESA_TDMA_CHAN_ACTIVE_BIT 14 -+#define MV_CESA_TDMA_CHAN_ACTIVE_MASK (1<<MV_CESA_TDMA_CHAN_ACTIVE_BIT) -+/*------------------------------------------------------------------------------------*/ -+ -+#define MV_CESA_TDMA_BYTE_COUNT_REG (MV_CESA_TDMA_REG_BASE + 0x800) -+#define MV_CESA_TDMA_SRC_ADDR_REG (MV_CESA_TDMA_REG_BASE + 0x810) -+#define MV_CESA_TDMA_DST_ADDR_REG (MV_CESA_TDMA_REG_BASE + 0x820) -+#define MV_CESA_TDMA_NEXT_DESC_PTR_REG (MV_CESA_TDMA_REG_BASE + 0x830) -+#define MV_CESA_TDMA_CURR_DESC_PTR_REG (MV_CESA_TDMA_REG_BASE + 0x870) -+ -+#define MV_CESA_TDMA_ERROR_CAUSE_REG (MV_CESA_TDMA_REG_BASE + 0x8C0) -+#define MV_CESA_TDMA_ERROR_MASK_REG (MV_CESA_TDMA_REG_BASE + 0x8C4) -+ -+ -+#endif /* __mvCesaRegs_h__ */ -+ -diff --git a/crypto/ocf/kirkwood/cesa/mvCesaTest.c b/crypto/ocf/kirkwood/cesa/mvCesaTest.c -new file mode 100644 -index 0000000..694f780 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvCesaTest.c -@@ -0,0 +1,3096 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvOs.h" -+ -+#if defined(MV_VXWORKS) -+ -+#include "sysLib.h" -+#include "logLib.h" -+#include "tickLib.h" -+#include "intLib.h" -+#include "config.h" -+ -+ -+SEM_ID cesaSemId = NULL; -+SEM_ID cesaWaitSemId = NULL; -+ -+#define CESA_TEST_LOCK(flags) flags = intLock() -+#define CESA_TEST_UNLOCK(flags) intUnlock(flags) -+ -+#define CESA_TEST_WAIT_INIT() cesaWaitSemId = semBCreate(SEM_Q_PRIORITY, SEM_EMPTY) -+#define CESA_TEST_WAKE_UP() semGive(cesaWaitSemId) -+#define CESA_TEST_WAIT(cond, ms) semTake(cesaWaitSemId, (sysClkRateGet()*ms)/1000) -+ -+#define CESA_TEST_TICK_GET() tickGet() -+#define CESA_TEST_TICK_TO_MS(tick) (((tick)*1000)/sysClkRateGet()) -+ -+#elif defined(MV_LINUX) -+ -+#include <linux/wait.h> -+wait_queue_head_t cesaTest_waitq; -+spinlock_t cesaLock; -+ -+#define CESA_TEST_LOCK(flags) spin_lock_irqsave( &cesaLock, flags) -+#define CESA_TEST_UNLOCK(flags) spin_unlock_irqrestore( &cesaLock, flags); -+ -+#define CESA_TEST_WAIT_INIT() init_waitqueue_head(&cesaTest_waitq) -+#define CESA_TEST_WAKE_UP() wake_up(&cesaTest_waitq) -+#define CESA_TEST_WAIT(cond, ms) wait_event_timeout(cesaTest_waitq, (cond), msecs_to_jiffies(ms)) -+ -+#define CESA_TEST_TICK_GET() jiffies -+#define CESA_TEST_TICK_TO_MS(tick) jiffies_to_msecs(tick) -+ -+#elif defined(MV_NETBSD) -+ -+#include <sys/param.h> -+#include <sys/kernel.h> -+static int cesaLock; -+ -+#define CESA_TEST_LOCK(flags) flags = splnet() -+#define CESA_TEST_UNLOCK(flags) splx(flags) -+ -+#define CESA_TEST_WAIT_INIT() /* nothing */ -+#define CESA_TEST_WAKE_UP() wakeup(&cesaLock) -+#define CESA_TEST_WAIT(cond, ms) \ -+do { \ -+ while (!(cond)) \ -+ tsleep(&cesaLock, PWAIT, "cesatest",mstohz(ms)); \ -+} while (/*CONSTCOND*/0) -+ -+#define CESA_TEST_TICK_GET() hardclock_ticks -+#define CESA_TEST_TICK_TO_MS(tick) ((1000/hz)*(tick)) -+ -+#define request_irq(i,h,t,n,a) \ -+ !mv_intr_establish((i),IPL_NET,(int(*)(void *))(h),(a)) -+ -+#else -+#error "Only Linux, VxWorks, or NetBSD OS are supported" -+#endif -+ -+#include "mvDebug.h" -+ -+#include "mvSysHwConfig.h" -+#include "boardEnv/mvBoardEnvLib.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "cntmr/mvCntmr.h" -+#include "cesa/mvCesa.h" -+#include "cesa/mvCesaRegs.h" -+#include "cesa/mvMD5.h" -+#include "cesa/mvSHA1.h" -+ -+#if defined(CONFIG_MV646xx) -+#include "marvell_pic.h" -+#endif -+ -+#define MV_CESA_USE_TIMER_ID 0 -+#define CESA_DEF_BUF_SIZE 1500 -+#define CESA_DEF_BUF_NUM 1 -+#define CESA_DEF_SESSION_NUM 32 -+ -+#define CESA_DEF_ITER_NUM 100 -+ -+#define CESA_DEF_REQ_SIZE 256 -+ -+ -+/* CESA Tests Debug */ -+#undef CESA_TEST_DEBUG -+ -+#ifdef CESA_TEST_DEBUG -+ -+# define CESA_TEST_DEBUG_PRINT(msg) mvOsPrintf msg -+# define CESA_TEST_DEBUG_CODE(code) code -+ -+typedef struct -+{ -+ int type; /* 0 - isrEmpty, 1 - cesaReadyGet, 2 - cesaAction */ -+ MV_U32 timeStamp; -+ MV_U32 cause; -+ MV_U32 realCause; -+ MV_U32 dmaCause; -+ int resources; -+ MV_CESA_REQ* pReqReady; -+ MV_CESA_REQ* pReqEmpty; -+ MV_CESA_REQ* pReqProcess; -+} MV_CESA_TEST_TRACE; -+ -+#define MV_CESA_TEST_TRACE_SIZE 25 -+ -+static int cesaTestTraceIdx = 0; -+static MV_CESA_TEST_TRACE cesaTestTrace[MV_CESA_TEST_TRACE_SIZE]; -+ -+static void cesaTestTraceAdd(int type, MV_U32 cause) -+{ -+ cesaTestTrace[cesaTestTraceIdx].type = type; -+ cesaTestTrace[cesaTestTraceIdx].cause = cause; -+ cesaTestTrace[cesaTestTraceIdx].realCause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG); -+ cesaTestTrace[cesaTestTraceIdx].dmaCause = MV_REG_READ(IDMA_CAUSE_REG); -+ cesaTestTrace[cesaTestTraceIdx].resources = cesaReqResources; -+ cesaTestTrace[cesaTestTraceIdx].pReqReady = pCesaReqReady; -+ cesaTestTrace[cesaTestTraceIdx].pReqEmpty = pCesaReqEmpty; -+ cesaTestTrace[cesaTestTraceIdx].pReqProcess = pCesaReqProcess; -+ cesaTestTrace[cesaTestTraceIdx].timeStamp = mvCntmrRead(MV_CESA_USE_TIMER_ID); -+ cesaTestTraceIdx++; -+ if(cesaTestTraceIdx == MV_CESA_TEST_TRACE_SIZE) -+ cesaTestTraceIdx = 0; -+} -+ -+#else -+ -+# define CESA_TEST_DEBUG_PRINT(msg) -+# define CESA_TEST_DEBUG_CODE(code) -+ -+#endif /* CESA_TEST_DEBUG */ -+ -+int cesaExpReqId=0; -+int cesaCbIter=0; -+ -+int cesaIdx; -+int cesaIteration; -+int cesaRateSize; -+int cesaReqSize; -+unsigned long cesaTaskId; -+int cesaBufNum; -+int cesaBufSize; -+int cesaCheckOffset; -+int cesaCheckSize; -+int cesaCheckMode; -+int cesaTestIdx; -+int cesaCaseIdx; -+ -+ -+MV_U32 cesaTestIsrCount = 0; -+MV_U32 cesaTestIsrMissCount = 0; -+ -+MV_U32 cesaCryptoError = 0; -+MV_U32 cesaReqIdError = 0; -+MV_U32 cesaError = 0; -+ -+char* cesaHexBuffer = NULL; -+ -+char* cesaBinBuffer = NULL; -+char* cesaExpBinBuffer = NULL; -+ -+char* cesaInputHexStr = NULL; -+char* cesaOutputHexStr = NULL; -+ -+MV_BUF_INFO cesaReqBufs[CESA_DEF_REQ_SIZE]; -+ -+MV_CESA_COMMAND* cesaCmdRing; -+MV_CESA_RESULT cesaResult; -+ -+int cesaTestFull = 0; -+ -+MV_BOOL cesaIsReady = MV_FALSE; -+MV_U32 cesaCycles = 0; -+MV_U32 cesaBeginTicks = 0; -+MV_U32 cesaEndTicks = 0; -+MV_U32 cesaRate = 0; -+MV_U32 cesaRateAfterDot = 0; -+ -+void *cesaTestOSHandle = NULL; -+ -+enum -+{ -+ CESA_FAST_CHECK_MODE = 0, -+ CESA_FULL_CHECK_MODE, -+ CESA_NULL_CHECK_MODE, -+ CESA_SHOW_CHECK_MODE, -+ CESA_SW_SHOW_CHECK_MODE, -+ CESA_SW_NULL_CHECK_MODE, -+ -+ CESA_MAX_CHECK_MODE -+}; -+ -+enum -+{ -+ DES_TEST_TYPE = 0, -+ TRIPLE_DES_TEST_TYPE = 1, -+ AES_TEST_TYPE = 2, -+ MD5_TEST_TYPE = 3, -+ SHA_TEST_TYPE = 4, -+ COMBINED_TEST_TYPE = 5, -+ -+ MAX_TEST_TYPE -+}; -+ -+/* Tests data base */ -+typedef struct -+{ -+ short sid; -+ char cryptoAlgorithm; /* DES/3DES/AES */ -+ char cryptoMode; /* ECB or CBC */ -+ char macAlgorithm; /* MD5 / SHA1 */ -+ char operation; /* CRYPTO/HMAC/CRYPTO+HMAC/HMAC+CRYPTO */ -+ char direction; /* ENCODE(SIGN)/DECODE(VERIFY) */ -+ unsigned char* pCryptoKey; -+ int cryptoKeySize; -+ unsigned char* pMacKey; -+ int macKeySize; -+ const char* name; -+ -+} MV_CESA_TEST_SESSION; -+ -+typedef struct -+{ -+ MV_CESA_TEST_SESSION* pSessions; -+ int numSessions; -+ -+} MV_CESA_TEST_DB_ENTRY; -+ -+typedef struct -+{ -+ char* plainHexStr; -+ char* cipherHexStr; -+ unsigned char* pCryptoIV; -+ int cryptoLength; -+ int macLength; -+ int digestOffset; -+ -+} MV_CESA_TEST_CASE; -+ -+typedef struct -+{ -+ int size; -+ const char* outputHexStr; -+ -+} MV_CESA_SIZE_TEST; -+ -+static unsigned char cryptoKey1[] = {0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, -+ 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, -+ 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef}; -+ -+static unsigned char cryptoKey7[] = {0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef}; -+static unsigned char iv1[] = {0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef}; -+ -+ -+static unsigned char cryptoKey2[] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, -+ 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F}; -+ -+static unsigned char cryptoKey3[] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, -+ 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, -+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17}; -+ -+static unsigned char cryptoKey4[] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, -+ 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, -+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, -+ 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f}; -+ -+static unsigned char cryptoKey5[] = {0x56, 0xe4, 0x7a, 0x38, 0xc5, 0x59, 0x89, 0x74, -+ 0xbc, 0x46, 0x90, 0x3d, 0xba, 0x29, 0x03, 0x49}; -+ -+ -+static unsigned char key3des1[] = {0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF, -+ 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF, 0x01, -+ 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF, 0x01, 0x23}; -+ -+/* Input ASCII string: The quick brown fox jump */ -+static char plain3des1[] = "54686520717566636B2062726F776E20666F78206A756D70"; -+static char cipher3des1[] = "A826FD8CE53B855FCCE21C8112256FE668D5C05DD9B6B900"; -+ -+static unsigned char key3des2[] = {0x62, 0x7f, 0x46, 0x0e, 0x08, 0x10, 0x4a, 0x10, -+ 0x43, 0xcd, 0x26, 0x5d, 0x58, 0x40, 0xea, 0xf1, -+ 0x31, 0x3e, 0xdf, 0x97, 0xdf, 0x2a, 0x8a, 0x8c}; -+ -+static unsigned char iv3des2[] = {0x8e, 0x29, 0xf7, 0x5e, 0xa7, 0x7e, 0x54, 0x75}; -+ -+static char plain3des2[] = "326a494cd33fe756"; -+ -+static char cipher3desCbc2[] = "8e29f75ea77e5475" -+ "b22b8d66de970692"; -+ -+static unsigned char key3des3[] = {0x37, 0xae, 0x5e, 0xbf, 0x46, 0xdf, 0xf2, 0xdc, -+ 0x07, 0x54, 0xb9, 0x4f, 0x31, 0xcb, 0xb3, 0x85, -+ 0x5e, 0x7f, 0xd3, 0x6d, 0xc8, 0x70, 0xbf, 0xae}; -+ -+static unsigned char iv3des3[] = {0x3d, 0x1d, 0xe3, 0xcc, 0x13, 0x2e, 0x3b, 0x65}; -+ -+static char plain3des3[] = "84401f78fe6c10876d8ea23094ea5309"; -+ -+static char cipher3desCbc3[] = "3d1de3cc132e3b65" -+ "7b1f7c7e3b1c948ebd04a75ffba7d2f5"; -+ -+static unsigned char iv5[] = {0x8c, 0xe8, 0x2e, 0xef, 0xbe, 0xa0, 0xda, 0x3c, -+ 0x44, 0x69, 0x9e, 0xd7, 0xdb, 0x51, 0xb7, 0xd9}; -+ -+static unsigned char aesCtrKey[] = {0x76, 0x91, 0xBE, 0x03, 0x5E, 0x50, 0x20, 0xA8, -+ 0xAC, 0x6E, 0x61, 0x85, 0x29, 0xF9, 0xA0, 0xDC}; -+ -+static unsigned char mdKey1[] = {0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, -+ 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b}; -+ -+static unsigned char mdKey2[] = {0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, -+ 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa}; -+ -+static unsigned char shaKey1[] = {0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, -+ 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, -+ 0x0b, 0x0b, 0x0b, 0x0b}; -+ -+static unsigned char shaKey2[] = {0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, -+ 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, -+ 0xaa, 0xaa, 0xaa, 0xaa}; -+ -+static unsigned char mdKey4[] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10}; -+ -+static unsigned char shaKey4[] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, -+ 0x11, 0x12, 0x13, 0x14}; -+ -+ -+static MV_CESA_TEST_SESSION desTestSessions[] = -+{ -+/*000*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey7, sizeof(cryptoKey7)/sizeof(cryptoKey7[0]), -+ NULL, 0, -+ "DES ECB encode", -+ }, -+/*001*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_DECODE, -+ cryptoKey7, sizeof(cryptoKey7)/sizeof(cryptoKey7[0]), -+ NULL, 0, -+ "DES ECB decode", -+ }, -+/*002*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey7, sizeof(cryptoKey7)/sizeof(cryptoKey7[0]), -+ NULL, 0, -+ "DES CBC encode" -+ }, -+/*003*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_DECODE, -+ cryptoKey7, sizeof(cryptoKey7)/sizeof(cryptoKey7[0]), -+ NULL, 0, -+ "DES CBC decode" -+ }, -+/*004*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, NULL, 0, -+ "NULL Crypto Algorithm encode" -+ }, -+}; -+ -+ -+static MV_CESA_TEST_SESSION tripleDesTestSessions[] = -+{ -+/*100*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ NULL, 0, -+ "3DES ECB encode", -+ }, -+/*101*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_DECODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ NULL, 0, -+ "3DES ECB decode", -+ }, -+/*102*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ NULL, 0, -+ "3DES CBC encode" -+ }, -+/*103*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_DECODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ NULL, 0, -+ "3DES CBC decode" -+ }, -+/*104*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ key3des1, sizeof(key3des1), -+ NULL, 0, -+ "3DES ECB encode" -+ }, -+/*105*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ key3des2, sizeof(key3des2), -+ NULL, 0, -+ "3DES ECB encode" -+ }, -+/*106*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ key3des3, sizeof(key3des3), -+ NULL, 0, -+ "3DES ECB encode" -+ }, -+}; -+ -+ -+static MV_CESA_TEST_SESSION aesTestSessions[] = -+{ -+/*200*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey2, sizeof(cryptoKey2)/sizeof(cryptoKey2[0]), -+ NULL, 0, -+ "AES-128 ECB encode" -+ }, -+/*201*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_DECODE, -+ cryptoKey2, sizeof(cryptoKey2)/sizeof(cryptoKey2[0]), -+ NULL, 0, -+ "AES-128 ECB decode" -+ }, -+/*202*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey5, sizeof(cryptoKey5)/sizeof(cryptoKey5[0]), -+ NULL, 0, -+ "AES-128 CBC encode" -+ }, -+/*203*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_DECODE, -+ cryptoKey5, sizeof(cryptoKey5)/sizeof(cryptoKey5[0]), -+ NULL, 0, -+ "AES-128 CBC decode" -+ }, -+/*204*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey3, sizeof(cryptoKey3)/sizeof(cryptoKey3[0]), -+ NULL, 0, -+ "AES-192 ECB encode" -+ }, -+/*205*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_DECODE, -+ cryptoKey3, sizeof(cryptoKey3)/sizeof(cryptoKey3[0]), -+ NULL, 0, -+ "AES-192 ECB decode" -+ }, -+/*206*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey4, sizeof(cryptoKey4)/sizeof(cryptoKey4[0]), -+ NULL, 0, -+ "AES-256 ECB encode" -+ }, -+/*207*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_DECODE, -+ cryptoKey4, sizeof(cryptoKey4)/sizeof(cryptoKey4[0]), -+ NULL, 0, -+ "AES-256 ECB decode" -+ }, -+/*208*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CTR, -+ MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY, -+ MV_CESA_DIR_ENCODE, -+ aesCtrKey, sizeof(aesCtrKey)/sizeof(aesCtrKey[0]), -+ NULL, 0, -+ "AES-128 CTR encode" -+ }, -+}; -+ -+ -+static MV_CESA_TEST_SESSION md5TestSessions[] = -+{ -+/*300*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, -+ mdKey1, sizeof(mdKey1), -+ "HMAC-MD5 Generate Signature" -+ }, -+/*301*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_DECODE, -+ NULL, 0, -+ mdKey1, sizeof(mdKey1), -+ "HMAC-MD5 Verify Signature" -+ }, -+/*302*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, -+ mdKey2, sizeof(mdKey2), -+ "HMAC-MD5 Generate Signature" -+ }, -+/*303*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_DECODE, -+ NULL, 0, -+ mdKey2, sizeof(mdKey2), -+ "HMAC-MD5 Verify Signature" -+ }, -+/*304*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, -+ mdKey4, sizeof(mdKey4), -+ "HMAC-MD5 Generate Signature" -+ }, -+/*305*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_MD5, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, -+ NULL, 0, -+ "HASH-MD5 Generate Signature" -+ }, -+}; -+ -+ -+static MV_CESA_TEST_SESSION shaTestSessions[] = -+{ -+/*400*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, -+ shaKey1, sizeof(shaKey1), -+ "HMAC-SHA1 Generate Signature" -+ }, -+/*401*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_DECODE, -+ NULL, 0, -+ shaKey1, sizeof(shaKey1), -+ "HMAC-SHA1 Verify Signature" -+ }, -+/*402*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, -+ shaKey2, sizeof(shaKey2), -+ "HMAC-SHA1 Generate Signature" -+ }, -+/*403*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_DECODE, -+ NULL, 0, -+ shaKey2, sizeof(shaKey2), -+ "HMAC-SHA1 Verify Signature" -+ }, -+/*404*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, -+ shaKey4, sizeof(shaKey4), -+ "HMAC-SHA1 Generate Signature" -+ }, -+/*405*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_SHA1, MV_CESA_MAC_ONLY, -+ MV_CESA_DIR_ENCODE, -+ NULL, 0, -+ NULL, 0, -+ "HASH-SHA1 Generate Signature" -+ }, -+}; -+ -+static MV_CESA_TEST_SESSION combinedTestSessions[] = -+{ -+/*500*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_CRYPTO_THEN_MAC, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey1, MV_CESA_DES_KEY_LENGTH, -+ mdKey4, sizeof(mdKey4), -+ "DES + MD5 encode" -+ }, -+/*501*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_CRYPTO_THEN_MAC, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey1, MV_CESA_DES_KEY_LENGTH, -+ shaKey4, sizeof(shaKey4), -+ "DES + SHA1 encode" -+ }, -+/*502*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_CRYPTO_THEN_MAC, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ mdKey4, sizeof(mdKey4), -+ "3DES + MD5 encode" -+ }, -+/*503*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_CRYPTO_THEN_MAC, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ shaKey4, sizeof(shaKey4), -+ "3DES + SHA1 encode" -+ }, -+/*504*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_CRYPTO_THEN_MAC, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ mdKey4, sizeof(mdKey4), -+ "3DES CBC + MD5 encode" -+ }, -+/*505*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_CRYPTO_THEN_MAC, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ shaKey4, sizeof(shaKey4), -+ "3DES CBC + SHA1 encode" -+ }, -+/*506*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_CRYPTO_THEN_MAC, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey5, sizeof(cryptoKey5)/sizeof(cryptoKey5[0]), -+ mdKey4, sizeof(mdKey4), -+ "AES-128 CBC + MD5 encode" -+ }, -+/*507*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CBC, -+ MV_CESA_MAC_HMAC_SHA1, MV_CESA_CRYPTO_THEN_MAC, -+ MV_CESA_DIR_ENCODE, -+ cryptoKey5, sizeof(cryptoKey5)/sizeof(cryptoKey5[0]), -+ shaKey4, sizeof(shaKey4), -+ "AES-128 CBC + SHA1 encode" -+ }, -+/*508*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB, -+ MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_THEN_CRYPTO, -+ MV_CESA_DIR_DECODE, -+ cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]), -+ mdKey4, sizeof(mdKey4), -+ "HMAC-MD5 + 3DES decode" -+ }, -+}; -+ -+ -+static MV_CESA_TEST_DB_ENTRY cesaTestsDB[MAX_TEST_TYPE+1] = -+{ -+ { desTestSessions, sizeof(desTestSessions)/sizeof(desTestSessions[0]) }, -+ { tripleDesTestSessions, sizeof(tripleDesTestSessions)/sizeof(tripleDesTestSessions[0]) }, -+ { aesTestSessions, sizeof(aesTestSessions)/sizeof(aesTestSessions[0]) }, -+ { md5TestSessions, sizeof(md5TestSessions)/sizeof(md5TestSessions[0]) }, -+ { shaTestSessions, sizeof(shaTestSessions)/sizeof(shaTestSessions[0]) }, -+ { combinedTestSessions, sizeof(combinedTestSessions)/sizeof(combinedTestSessions[0]) }, -+ { NULL, 0 } -+}; -+ -+ -+char cesaNullPlainHexText[] = "000000000000000000000000000000000000000000000000"; -+ -+char cesaPlainAsciiText[] = "Now is the time for all "; -+char cesaPlainHexEbc[] = "4e6f77206973207468652074696d6520666f7220616c6c20"; -+char cesaCipherHexEcb[] = "3fa40e8a984d48156a271787ab8883f9893d51ec4b563b53"; -+char cesaPlainHexCbc[] = "1234567890abcdef4e6f77206973207468652074696d6520666f7220616c6c20"; -+char cesaCipherHexCbc[] = "1234567890abcdefe5c7cdde872bf27c43e934008c389c0f683788499a7c05f6"; -+ -+char cesaAesPlainHexEcb[] = "000102030405060708090a0b0c0d0e0f"; -+char cesaAes128cipherHexEcb[] = "0a940bb5416ef045f1c39458c653ea5a"; -+char cesaAes192cipherHexEcb[] = "0060bffe46834bb8da5cf9a61ff220ae"; -+char cesaAes256cipherHexEcb[] = "5a6e045708fb7196f02e553d02c3a692"; -+ -+char cesaAsciiStr1[] = "Hi There"; -+char cesaDataHexStr1[] = "4869205468657265"; -+char cesaHmacMd5digestHex1[] = "9294727a3638bb1c13f48ef8158bfc9d"; -+char cesaHmacSha1digestHex1[] = "b617318655057264e28bc0b6fb378c8ef146be00"; -+char cesaDataAndMd5digest1[] = "48692054686572659294727a3638bb1c13f48ef8158bfc9d"; -+char cesaDataAndSha1digest1[] = "4869205468657265b617318655057264e28bc0b6fb378c8ef146be00"; -+ -+char cesaAesPlainText[] = "a0a1a2a3a4a5a6a7a8a9aaabacadaeaf" -+ "b0b1b2b3b4b5b6b7b8b9babbbcbdbebf" -+ "c0c1c2c3c4c5c6c7c8c9cacbcccdcecf" -+ "d0d1d2d3d4d5d6d7d8d9dadbdcdddedf"; -+ -+char cesaAes128CipherCbc[] = "c30e32ffedc0774e6aff6af0869f71aa" -+ "0f3af07a9a31a9c684db207eb0ef8e4e" -+ "35907aa632c3ffdf868bb7b29d3d46ad" -+ "83ce9f9a102ee99d49a53e87f4c3da55"; -+ -+char cesaAesIvPlainText[] = "8ce82eefbea0da3c44699ed7db51b7d9" -+ "a0a1a2a3a4a5a6a7a8a9aaabacadaeaf" -+ "b0b1b2b3b4b5b6b7b8b9babbbcbdbebf" -+ "c0c1c2c3c4c5c6c7c8c9cacbcccdcecf" -+ "d0d1d2d3d4d5d6d7d8d9dadbdcdddedf"; -+ -+char cesaAes128IvCipherCbc[] = "8ce82eefbea0da3c44699ed7db51b7d9" -+ "c30e32ffedc0774e6aff6af0869f71aa" -+ "0f3af07a9a31a9c684db207eb0ef8e4e" -+ "35907aa632c3ffdf868bb7b29d3d46ad" -+ "83ce9f9a102ee99d49a53e87f4c3da55"; -+ -+char cesaAesCtrPlain[] = "00E0017B27777F3F4A1786F000000001" -+ "000102030405060708090A0B0C0D0E0F" -+ "101112131415161718191A1B1C1D1E1F" -+ "20212223"; -+ -+char cesaAesCtrCipher[] = "00E0017B27777F3F4A1786F000000001" -+ "C1CF48A89F2FFDD9CF4652E9EFDB72D7" -+ "4540A42BDE6D7836D59A5CEAAEF31053" -+ "25B2072F"; -+ -+ -+ -+/* Input cesaHmacHex3 is '0xdd' repeated 50 times */ -+char cesaHmacMd5digestHex3[] = "56be34521d144c88dbb8c733f0e8b3f6"; -+char cesaHmacSha1digestHex3[] = "125d7342b9ac11cd91a39af48aa17b4f63f175d3"; -+char cesaDataHexStr3[50*2+1] = ""; -+char cesaDataAndMd5digest3[sizeof(cesaDataHexStr3)+sizeof(cesaHmacMd5digestHex3)+8*2+1] = ""; -+char cesaDataAndSha1digest3[sizeof(cesaDataHexStr3)+sizeof(cesaHmacSha1digestHex3)+8*2+1] = ""; -+ -+/* Ascii string is "abc" */ -+char hashHexStr3[] = "616263"; -+char hashMd5digest3[] = "900150983cd24fb0d6963f7d28e17f72"; -+char hashSha1digest3[] = "a9993e364706816aba3e25717850c26c9cd0d89d"; -+ -+char hashHexStr80[] = "31323334353637383930" -+ "31323334353637383930" -+ "31323334353637383930" -+ "31323334353637383930" -+ "31323334353637383930" -+ "31323334353637383930" -+ "31323334353637383930" -+ "31323334353637383930"; -+ -+char hashMd5digest80[] = "57edf4a22be3c955ac49da2e2107b67a"; -+ -+char tripleDesThenMd5digest80[] = "b7726a03aad490bd6c5a452a89a1b271"; -+char tripleDesThenSha1digest80[] = "b2ddeaca91030eab5b95a234ef2c0f6e738ff883"; -+ -+char cbc3desThenMd5digest80[] = "6f463057e1a90e0e91ae505b527bcec0"; -+char cbc3desThenSha1digest80[] = "1b002ed050be743aa98860cf35659646bb8efcc0"; -+ -+char cbcAes128ThenMd5digest80[] = "6b6e863ac5a71d15e3e9b1c86c9ba05f"; -+char cbcAes128ThenSha1digest80[] = "13558472d1fc1c90dffec6e5136c7203452d509b"; -+ -+ -+static MV_CESA_TEST_CASE cesaTestCases[] = -+{ -+ /* plainHexStr cipherHexStr IV crypto mac digest */ -+ /* Length Length Offset */ -+ /*0*/ { NULL, NULL, NULL, 0, 0, -1 }, -+ /*1*/ { cesaPlainHexEbc, cesaCipherHexEcb, NULL, 24, 0, -1 }, -+ /*2*/ { cesaPlainHexCbc, cesaCipherHexCbc, NULL, 24, 0, -1 }, -+ /*3*/ { cesaAesPlainHexEcb, cesaAes128cipherHexEcb, NULL, 16, 0, -1 }, -+ /*4*/ { cesaAesPlainHexEcb, cesaAes192cipherHexEcb, NULL, 16, 0, -1 }, -+ /*5*/ { cesaAesPlainHexEcb, cesaAes256cipherHexEcb, NULL, 16, 0, -1 }, -+ /*6*/ { cesaDataHexStr1, cesaHmacMd5digestHex1, NULL, 0, 8, -1 }, -+ /*7*/ { NULL, cesaDataAndMd5digest1, NULL, 0, 8, -1 }, -+ /*8*/ { cesaDataHexStr3, cesaHmacMd5digestHex3, NULL, 0, 50, -1 }, -+ /*9*/ { NULL, cesaDataAndMd5digest3, NULL, 0, 50, -1 }, -+/*10*/ { cesaAesPlainText, cesaAes128IvCipherCbc, iv5, 64, 0, -1 }, -+/*11*/ { cesaDataHexStr1, cesaHmacSha1digestHex1, NULL, 0, 8, -1 }, -+/*12*/ { NULL, cesaDataAndSha1digest1, NULL, 0, 8, -1 }, -+/*13*/ { cesaDataHexStr3, cesaHmacSha1digestHex3, NULL, 0, 50, -1 }, -+/*14*/ { NULL, cesaDataAndSha1digest3, NULL, 0, 50, -1 }, -+/*15*/ { hashHexStr3, hashMd5digest3, NULL, 0, 3, -1 }, -+/*16*/ { hashHexStr3, hashSha1digest3, NULL, 0, 3, -1 }, -+/*17*/ { hashHexStr80, tripleDesThenMd5digest80, NULL, 80, 80, -1 }, -+/*18*/ { hashHexStr80, tripleDesThenSha1digest80, NULL, 80, 80, -1 }, -+/*19*/ { hashHexStr80, cbc3desThenMd5digest80, iv1, 80, 80, -1 }, -+/*20*/ { hashHexStr80, cbc3desThenSha1digest80, iv1, 80, 80, -1 }, -+/*21*/ { hashHexStr80, cbcAes128ThenMd5digest80, iv5, 80, 80, -1 }, -+/*22*/ { hashHexStr80, cbcAes128ThenSha1digest80, iv5, 80, 80, -1 }, -+/*23*/ { cesaAesCtrPlain, cesaAesCtrCipher, NULL, 36, 0, -1 }, -+/*24*/ { cesaAesIvPlainText, cesaAes128IvCipherCbc, NULL, 64, 0, -1 }, -+/*25*/ { plain3des1, cipher3des1, NULL, 0, 0, -1 }, -+/*26*/ { plain3des2, cipher3desCbc2, iv3des2,0, 0, -1 }, -+/*27*/ { plain3des3, cipher3desCbc3, iv3des3,0, 0, -1 }, -+}; -+ -+ -+/* Key = 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, -+ * 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa -+ * Input 0xdd repeated "size" times -+ */ -+static MV_CESA_SIZE_TEST mdMultiSizeTest302[] = -+{ -+ { 80, "7a031a640c14a4872814930b1ef3a5b2" }, -+ { 512, "5488e6c5a14dc72a79f28312ca5b939b" }, -+ { 1000, "d00814f586a8b78a05724239d2531821" }, -+ { 1001, "bf07df7b7f49d3f5b5ecacd4e9e63281" }, -+ { 1002, "1ed4a1a802e87817a819d4e37bb4d0f7" }, -+ { 1003, "5972ab64a4f265ee371dac2f2f137f90" }, -+ { 1004, "71f95e7ec3aa7df2548e90898abdb28e" }, -+ { 1005, "e082790b4857fcfc266e92e59e608814" }, -+ { 1006, "9500f02fd8ac7fde8b10e4fece9a920d" }, -+ { 1336, "e42edcce57d0b75b01aa09d71427948b" }, -+ { 1344, "bb5454ada0deb49ba0a97ffd60f57071" }, -+ { 1399, "0f44d793e744b24d53f44f295082ee8c" }, -+ { 1400, "359de8a03a9b707928c6c60e0e8d79f1" }, -+ { 1401, "e913858b484cbe2b384099ea88d8855b" }, -+ { 1402, "d9848a164af53620e0540c1d7d87629e" }, -+ { 1403, "0c9ee1c2c9ef45e9b625c26cbaf3e822" }, -+ { 1404, "12edd4f609416e3c936170360561b064" }, -+ { 1405, "7fc912718a05446395345009132bf562" }, -+ { 1406, "882f17425e579ff0d85a91a59f308aa0" }, -+ { 1407, "005cae408630a2fb5db82ad9db7e59da" }, -+ { 1408, "64655f8b404b3fea7a3e3e609bc5088f" }, -+ { 1409, "4a145284a7f74e01b6bb1a0ec6a0dd80" }, -+ { 2048, "67caf64475650732def374ebb8bde3fd" }, -+ { 2049, "6c84f11f472825f7e6cd125c2981884b" }, -+ { 2050, "8999586754a73a99efbe4dbad2816d41" }, -+ { 2051, "ba6946b610e098d286bc81091659dfff" }, -+ { 2052, "d0afa01c92d4d13def2b024f36faed83" }, -+ { 3072, "61d8beac61806afa2585d74a9a0e6974" }, -+ { 3074, "f6501a28dcc24d1e4770505c51a87ed3" }, -+ { 3075, "ea4a6929be67e33e61ff475369248b73" }, -+ { 4048, "aa8c4d68f282a07e7385acdfa69f4bed" }, -+ { 4052, "afb5ed2c0e1d430ea59e59ed5ed6b18a" }, -+ { 4058, "9e8553f9bdd43aebe0bd729f0e600c99" }, -+ { 6144, "f628f3e5d183fe5cdd3a5abee39cf872" }, -+ { 6150, "89a3efcea9a2f25f919168ad4a1fd292" }, -+ { 6400, "cdd176b7fb747873efa4da5e32bdf88f" }, -+ { 6528, "b1d707b027354aca152c45ee559ccd3f" }, -+ { 8192, "c600ea4429ac47f9941f09182166e51a" }, -+ {16384, "16e8754bfbeb4c649218422792267a37" }, -+ {18432, "0fd0607521b0aa8b52219cfbe215f63e" }, -+ { 0, NULL }, -+}; -+ -+/* Key = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ * 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ */ -+static MV_CESA_SIZE_TEST mdMultiSizeTest304[] = -+{ -+ { 80, "a456c4723fee6068530af5a2afa71627" }, -+ { 512, "f85c2a2344f5de68b432208ad13e5794" }, -+ { 1000, "35464d6821fd4a293a41eb84e274c8c5" }, -+ { 1001, "c08eedbdce60cceb54bc2d732bb32c8b" }, -+ { 1002, "5664f71800c011cc311cb6943339c1b8" }, -+ { 1003, "779c723b044c585dc7802b13e8501bdc" }, -+ { 1004, "55e500766a2c307bc5c5fdd15e4cacd4" }, -+ { 1005, "d5f978954f5c38529d1679d2b714f068" }, -+ { 1006, "cd3efc827ce628b7281b72172693abf9" }, -+ { 1336, "6f04479910785878ae6335b8d1e87edf" }, -+ { 1344, "b6d27b50c2bce1ba2a8e1b5cc4324368" }, -+ { 1399, "65f70a1d4c86e5eaeb0704c8a7816795" }, -+ { 1400, "3394b5adc4cb3ff98843ca260a44a88a" }, -+ { 1401, "3a06f3582033a66a4e57e0603ce94e74" }, -+ { 1402, "e4d97f5ed51edc48abfa46eeb5c31752" }, -+ { 1403, "3d05e40b080ee3bedf293cb87b7140e7" }, -+ { 1404, "8cf294fc3cd153ab18dccb2a52cbf244" }, -+ { 1405, "d1487bd42f6edd9b4dab316631159221" }, -+ { 1406, "0527123b6bf6936cf5d369dc18c6c70f" }, -+ { 1407, "3224a06639db70212a0cd1ae1fcc570a" }, -+ { 1408, "a9e13335612c0356f5e2c27086e86c43" }, -+ { 1409, "a86d1f37d1ed8a3552e9a4f04dceea98" }, -+ { 2048, "396905c9b961cd0f6152abfb69c4449c" }, -+ { 2049, "49f39bff85d9dcf059fadb89efc4a70f" }, -+ { 2050, "3a2b4823bc4d0415656550226a63e34a" }, -+ { 2051, "dec60580d406c782540f398ad0bcc7e0" }, -+ { 2052, "32f76610a14310309eb748fe025081bf" }, -+ { 3072, "45edc1a42bf9d708a621076b63b774da" }, -+ { 3074, "9be1b333fe7c0c9f835fb369dc45f778" }, -+ { 3075, "8c06fcac7bd0e7b7a17fd6508c09a549" }, -+ { 4048, "0ddaef848184bf0ad98507a10f1e90e4" }, -+ { 4052, "81976bcaeb274223983996c137875cb8" }, -+ { 4058, "0b0a7a1c82bc7cbc64d8b7cd2dc2bb22" }, -+ { 6144, "1c24056f52725ede2dff0d7f9fc9855f" }, -+ { 6150, "b7f4b65681c4e43ee68ca466ca9ca4ec" }, -+ { 6400, "443bbaab9f7331ddd4bf11b659cd43c8" }, -+ { 6528, "216f44f23047cfee03a7a64f88f9a995" }, -+ { 8192, "ac7a993b2cad54879dba1bde63e39097" }, -+ { 8320, "55ed7be9682d6c0025b3221a62088d08" }, -+ {16384, "c6c722087653b62007aea668277175e5" }, -+ {18432, "f1faca8e907872c809e14ffbd85792d6" }, -+ { 0, NULL }, -+}; -+ -+/* HASH-MD5 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ * repeated "size" times -+ */ -+static MV_CESA_SIZE_TEST mdMultiSizeTest305[] = -+{ -+ { 80, "57edf4a22be3c955ac49da2e2107b67a" }, -+ { 512, "c729ae8f0736cc377a9767a660eaa04e" }, -+ { 1000, "f1257a8659eb92d36fe14c6bf3852a6a" }, -+ { 1001, "f8a46fe8ea04fdc8c7de0e84042d3878" }, -+ { 1002, "da188dd67bff87d58aa3c02af2d0cc0f" }, -+ { 1003, "961753017feee04c9b93a8e51658a829" }, -+ { 1004, "dd68c4338608dcc87807a711636bf2af" }, -+ { 1005, "e338d567d3ce66bf69ada29658a8759b" }, -+ { 1006, "443c9811e8b92599b0b149e8d7ec700a" }, -+ { 1336, "89a98511706008ba4cbd0b4a24fa5646" }, -+ { 1344, "335a919805f370b9e402a62c6fe01739" }, -+ { 1399, "5d18d0eddcd84212fe28d812b5e80e3b" }, -+ { 1400, "6b695c240d2dffd0dffc99459ca76db6" }, -+ { 1401, "49590f61298a76719bc93a57a30136f5" }, -+ { 1402, "94c2999fa3ef1910a683d69b2b8476f2" }, -+ { 1403, "37073a02ab00ecba2645c57c228860db" }, -+ { 1404, "1bcd06994fce28b624f0c5fdc2dcdd2b" }, -+ { 1405, "11b93671a64c95079e8cf9e7cddc8b3d" }, -+ { 1406, "4b6695772a4c66313fa4871017d05f36" }, -+ { 1407, "d1539b97fbfda1c075624e958de19c5b" }, -+ { 1408, "b801b9b69920907cd018e8063092ede9" }, -+ { 1409, "b765f1406cfe78e238273ed01bbcaf7e" }, -+ { 2048, "1d7e2c64ac29e2b3fb4c272844ed31f5" }, -+ { 2049, "71d38fac49c6b1f4478d8d88447bcdd0" }, -+ { 2050, "141c34a5592b1bebfa731e0b23d0cdba" }, -+ { 2051, "c5e1853f21c59f5d6039bd13d4b380d8" }, -+ { 2052, "dd44a0d128b63d4b5cccd967906472d7" }, -+ { 3072, "37d158e33b21390822739d13db7b87fe" }, -+ { 3074, "aef3b209d01d39d0597fe03634bbf441" }, -+ { 3075, "335ffb428eabf210bada96d74d5a4012" }, -+ { 4048, "2434c2b43d798d2819487a886261fc64" }, -+ { 4052, "ac2fa84a8a33065b2e92e36432e861f8" }, -+ { 4058, "856781f85616c341c3533d090c1e1e84" }, -+ { 6144, "e5d134c652c18bf19833e115f7a82e9b" }, -+ { 6150, "a09a353be7795fac2401dac5601872e6" }, -+ { 6400, "08b9033ac6a1821398f50af75a2dbc83" }, -+ { 6528, "3d47aa193a8540c091e7e02f779e6751" }, -+ { 8192, "d3164e710c0626f6f395b38f20141cb7" }, -+ { 8320, "b727589d9183ff4e8491dd24466974a3" }, -+ {16384, "3f54d970793d2274d5b20d10a69938ac" }, -+ {18432, "f558511dcf81985b7a1bb57fad970531" }, -+ { 0, NULL }, -+}; -+ -+ -+/* Key = 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, -+ * 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa -+ * 0xaa, 0xaa, 0xaa, 0xaa -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ */ -+static MV_CESA_SIZE_TEST shaMultiSizeTest402[] = -+{ -+ { 80, "e812f370e659705a1649940d1f78cd7af18affd3" }, -+ { 512, "e547f886b2c15d995ed76a8a924cb408c8080f66" }, -+ { 1000, "239443194409f1a5342ecde1a092c8f3a3ed790a" }, -+ { 1001, "f278ab9a102850a9f48dc4e9e6822afe2d0c52b5" }, -+ { 1002, "8bcc667df5ab6ece988b3af361d09747c77f4e72" }, -+ { 1003, "0fae6046c7dc1d3e356b25af836f6077a363f338" }, -+ { 1004, "0ea48401cc92ae6bc92ae76685269cb0167fbe1a" }, -+ { 1005, "ecbcd7c879b295bafcd8766cbeac58cc371e31d1" }, -+ { 1006, "eb4a4a3d07d1e9a15e6f1ab8a9c47f243e27324c" }, -+ { 1336, "f5950ee1d77c10e9011d2149699c9366fe52529c" }, -+ { 1344, "b04263604a63c351b0b3b9cf1785b4bdba6c8838" }, -+ { 1399, "8cb1cff61d5b784045974a2fc69386e3b8d24218" }, -+ { 1400, "9bb2f3fcbeddb2b90f0be797cd647334a2816d51" }, -+ { 1401, "23ae462a7a0cb440f7445791079a5d75a535dd33" }, -+ { 1402, "832974b524a4d3f9cc2f45a3cabf5ccef65cd2aa" }, -+ { 1403, "d1c683742fe404c3c20d5704a5430e7832a7ec95" }, -+ { 1404, "867c79042e64f310628e219d8b85594cd0c7adc3" }, -+ { 1405, "c9d81d49d13d94358f56ccfd61af02b36c69f7c3" }, -+ { 1406, "0df43daab2786172f9b8d07d61f14a070cf1287a" }, -+ { 1407, "0fd8f3ad7f169534b274d4c66bbddd89f759e391" }, -+ { 1408, "3987511182b18473a564436003139b808fa46343" }, -+ { 1409, "ef667e063c9e9f539a8987a8d0bd3066ee85d901" }, -+ { 2048, "921109c99f3fedaca21727156d5f2b4460175327" }, -+ { 2049, "47188600dd165eb45f27c27196d3c46f4f042c1b" }, -+ { 2050, "8831939904009338de10e7fa670847041387807d" }, -+ { 2051, "2f8ebb5db2997d614e767be1050366f3641e7520" }, -+ { 2052, "669e51cd730dae158d3bef8adba075bd95a0d011" }, -+ { 3072, "cfee66cfd83abc8451af3c96c6b35a41cc6c55f5" }, -+ { 3074, "216ea26f02976a261b7d21a4dd3085157bedfabd" }, -+ { 3075, "bd612ebba021fd8e012b14c3bd60c8c5161fabc0" }, -+ { 4048, "c2564c1fdf2d5e9d7dde7aace2643428e90662e8" }, -+ { 4052, "91ce61fe924b445dfe7b5a1dcd10a27caec16df6" }, -+ { 4058, "db2a9be5ee8124f091c7ebd699266c5de223c164" }, -+ { 6144, "855109903feae2ba3a7a05a326b8a171116eb368" }, -+ { 6150, "37520bb3a668294d9c7b073e7e3daf8fee248a78" }, -+ { 6400, "60a353c841b6d2b1a05890349dad2fa33c7536b7" }, -+ { 6528, "9e53a43a69bb42d7c8522ca8bd632e421d5edb36" }, -+ { 8192, "a918cb0da862eaea0a33ee0efea50243e6b4927c" }, -+ { 8320, "29a5dcf55d1db29cd113fcf0572ae414f1c71329" }, -+ {16384, "6fb27966138e0c8d5a0d65ace817ebd53633cee1" }, -+ {18432, "ca09900d891c7c9ae2a559b10f63a217003341c1" }, -+ { 0, NULL }, -+}; -+ -+/* Key = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ * 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 -+ * 0x11, 0x12, 0x13, 0x14 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ */ -+static MV_CESA_SIZE_TEST shaMultiSizeTest404[] = -+{ -+ { 80, "beaf20a34b06a87558d156c0949bc3957d40222e" }, -+ { 512, "3353955358d886bc2940a3c7f337ff7dafb59c7b" }, -+ { 1000, "8737a542c5e9b2b6244b757ebb69d5bd602a829f" }, -+ { 1001, "fd9e7582d8a5d3c9fe3b923e4e6a41b07a1eb4d4" }, -+ { 1002, "a146d14a6fc3c274ff600568f4d75b977989e00d" }, -+ { 1003, "be22601bbc027ddef2dec97d30b3dc424fd803c5" }, -+ { 1004, "3e71fe99b2fe2b7bfdf4dbf0c7f3da25d7ea35e7" }, -+ { 1005, "2c422735d7295408fddd76f5e8a83a2a8da13df3" }, -+ { 1006, "6d875319049314b61855101a647b9ba3313428e6" }, -+ { 1336, "c1631ea80bad9dc43a180712461b65a0598c711c" }, -+ { 1344, "816069bf91d34581005746e2e0283d0f9c7b7605" }, -+ { 1399, "4e139866dc61cfcb8b67ca2ebd637b3a538593af" }, -+ { 1400, "ff2a0f8dd2b02c5417910f6f55d33a78e081a723" }, -+ { 1401, "ab00c12be62336964cbce31ae97fe2a0002984d5" }, -+ { 1402, "61349e7f999f3a1acc56c3e9a5060a9c4a7b05b6" }, -+ { 1403, "3edbc0f61e435bc1317fa27d840076093fb79353" }, -+ { 1404, "d052c6dfdbe63d45dab23ef9893e2aa4636aca1e" }, -+ { 1405, "0cc16b7388d67bf0add15a31e6e6c753cfae4987" }, -+ { 1406, "c96ba7eaad74253c38c22101b558d2850b1d1b90" }, -+ { 1407, "3445428a40d2c6556e7c55797ad8d323b61a48d9" }, -+ { 1408, "8d6444f937a09317c89834187b8ea9b8d3a8c56b" }, -+ { 1409, "c700acd3ecd19014ea2bdb4d42510c467e088475" }, -+ { 2048, "ee27d2a0cb77470c2f496212dfd68b5bb7b04e4b" }, -+ { 2049, "683762d7a02983b26a6d046e6451d9cd82c25932" }, -+ { 2050, "0fd20f1d55a9ee18363c2a6fd54aa13aee69992f" }, -+ { 2051, "86c267d8cc4bc8d59090e4f8b303da960fd228b7" }, -+ { 2052, "452395ae05b3ec503eea34f86fc0832485ad97c1" }, -+ { 3072, "75198e3cfd0b9bcff2dabdf8e38e6fdaa33ca49a" }, -+ { 3074, "4e24785ef080141ce4aab4675986d9acea624d7c" }, -+ { 3075, "3a20c5978dd637ec0e809bf84f0d9ccf30bc65bf" }, -+ { 4048, "3c32da256be7a7554922bf5fed51b0d2d09e59ad" }, -+ { 4052, "fff898426ea16e54325ae391a32c6c9bce4c23c0" }, -+ { 4058, "c800b9e562e1c91e1310116341a3c91d37f848ec" }, -+ { 6144, "d91d509d0cc4376c2d05bf9a5097717a373530e6" }, -+ { 6150, "d957030e0f13c5df07d9eec298542d8f94a07f12" }, -+ { 6400, "bb745313c3d7dc17b3f955e5534ad500a1082613" }, -+ { 6528, "77905f80d9ca82080bbb3e5654896dabfcfd1bdb" }, -+ { 8192, "5237fd9a81830c974396f99f32047586612ff3c0" }, -+ { 8320, "57668e28d5f2dba0839518a11db0f6af3d7e08bf" }, -+ {16384, "62e093fde467f0748087beea32e9af97d5c61241" }, -+ {18432, "845fb33130c7d6ea554fd5aacb9c50cf7ccb5929" }, -+ { 0, NULL }, -+}; -+ -+/* HASH-SHA1 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ * repeated "size" times -+ */ -+static MV_CESA_SIZE_TEST shaMultiSizeTest405[] = -+{ -+ { 80, "50abf5706a150990a08b2c5ea40fa0e585554732" }, -+ { 512, "f14516a08948fa27917a974d219741a697ba0087" }, -+ { 1000, "0bd18c378d5788817eb4f1e5dc07d867efa5cbf4" }, -+ { 1001, "ca29b85c35db1b8aef83c977893a11159d1b7aa2" }, -+ { 1002, "d83bc973eaaedb8a31437994dabbb3304b0be086" }, -+ { 1003, "2cf7bbef0acd6c00536b5c58ca470df9a3a90b6c" }, -+ { 1004, "e4375d09b1223385a8a393066f8209acfd936a80" }, -+ { 1005, "1029b38043e027745d019ce1d2d68e3d8b9d8f99" }, -+ { 1006, "deea16dcebbd8ac137e2b984deb639b9fb5e9680" }, -+ { 1336, "ea031b065fff63dcfb6a41956e4777520cdbc55d" }, -+ { 1344, "b52096c6445e6c0a8355995c70dc36ae186c863c" }, -+ { 1399, "cde2f6f8379870db4b32cf17471dc828a8dbff2b" }, -+ { 1400, "e53ff664064bc09fe5054c650806bd42d8179518" }, -+ { 1401, "d1156db5ddafcace64cdb510ff0d4af9b9a8ad64" }, -+ { 1402, "34ede0e9a909dd84a2ae291539105c0507b958e1" }, -+ { 1403, "a772ca3536da77e6ad3251e4f9e1234a4d7b87c0" }, -+ { 1404, "29740fd2b04e7a8bfd32242db6233156ad699948" }, -+ { 1405, "65b17397495b70ce4865dad93bf991b74c97cce1" }, -+ { 1406, "a7ee89cd0754061fdb91af7ea6abad2c69d542e3" }, -+ { 1407, "3eebf82f7420188e23d328b7ce93580b279a5715" }, -+ { 1408, "e08d3363a8b9a490dfb3a4c453452b8f114deeec" }, -+ { 1409, "95d74df739181a4ff30b8c39e28793a36598e924" }, -+ { 2048, "aa40262509c2abf84aab0197f83187fc90056d91" }, -+ { 2049, "7dec28ef105bc313bade8d9a7cdeac58b99de5ea" }, -+ { 2050, "d2e30f77ec81197de20f56588a156094ecb88450" }, -+ { 2051, "6b22ccc874833e96551a39da0c0edcaa0d969d92" }, -+ { 2052, "f843141e57875cd669af58744bc60aa9ea59549c" }, -+ { 3072, "09c5fedeaa62c132e673cc3c608a00142273d086" }, -+ { 3074, "b09e95eea9c7b1b007a58accec488301901a7f3d" }, -+ { 3075, "e6226b77b4ada287a8c9bbcf4ed71eec5ce632dc" }, -+ { 4048, "e99394894f855821951ddddf5bfc628547435f5c" }, -+ { 4052, "32d2f1af38be9cfba6cd03d55a254d0b3e1eb382" }, -+ { 4058, "d906552a4f2aca3a22e1fecccbcd183d7289d0ef" }, -+ { 6144, "2e7f62d35a860988e1224dc0543204af19316041" }, -+ { 6150, "d6b89698ee133df46fec9d552fadc328aa5a1b51" }, -+ { 6400, "dff50e90c46853988fa3a4b4ce5dda6945aae976" }, -+ { 6528, "9e63ec0430b96db02d38bc78357a2f63de2ab7f8" }, -+ { 8192, "971eb71ed60394d5ab5abb12e88420bdd41b5992" }, -+ { 8320, "91606a31b46afeaac965cecf87297e791b211013" }, -+ {16384, "547f830a5ec1f5f170ce818f156b1002cabc7569" }, -+ {18432, "f16f272787f3b8d539652e4dc315af6ab4fda0ef" }, -+ { 0, NULL }, -+}; -+ -+/* CryptoKey = 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef; -+ * MacKey = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ * 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ * Note: only sizes aligned to 3DES block size (8 bytes) allowed -+ */ -+static MV_CESA_SIZE_TEST tripleDesMdMultiSizeTest502[] = -+{ -+ { 64, "9586962a2aaaef28803dec2e17807a7f" }, -+ { 80, "b7726a03aad490bd6c5a452a89a1b271" }, -+ { 352, "f1ed9563aecc3c0d2766eb2bed3b4e4c" }, -+ { 512, "0f9decb11ab40fe86f4d4d9397bc020e" }, -+ { 1000, "3ba69deac12cab8ff9dff7dbd9669927" }, -+ { 1336, "6cf47bf1e80e03e2c1d0945bc50d37d2" }, -+ { 1344, "4be388dab21ceb3fa1b8d302e9b821f7" }, -+ { 1400, "a58b79fb21dd9bfc6ec93e3b99fb0ef1" }, -+ { 1408, "8bc97379fc2ac3237effcdd4f7a86528" }, -+ { 2048, "1339f03ab3076f25a20bc4cba16eb5bf" }, -+ { 3072, "731204d2d90c4b36ae41f5e1fb874288" }, -+ { 4048, "c028d998cfda5642547b7e1ed5ea16e4" }, -+ { 6144, "b1b19cd910cc51bd22992f1e59f1e068" }, -+ { 6400, "44e4613496ba622deb0e7cb768135a2f" }, -+ { 6528, "3b06b0a86f8db9cd67f9448dfcf10549" }, -+ { 8192, "d581780b7163138a0f412be681457d82" }, -+ {16384, "03b8ac05527faaf1bed03df149c65ccf" }, -+ {18432, "677c8a86a41dab6c5d81b85b8fb10ff6" }, -+ { 0, NULL }, -+}; -+ -+ -+/* CryptoKey = 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef; -+ * MacKey = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ * 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 -+ * 0x11, 0x12, 0x13, 0x14 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ * Note: only sizes aligned to 3DES block size (8 bytes) allowed -+ */ -+static MV_CESA_SIZE_TEST tripleDesShaMultiSizeTest503[] = -+{ -+ { 64, "44a1e9bcbfc1429630d9ea68b7a48b0427a684f2" }, -+ { 80, "b2ddeaca91030eab5b95a234ef2c0f6e738ff883" }, -+ { 352, "4b91864c7ff629bdff75d9726421f76705452aaf" }, -+ { 512, "6dd37faceeb2aa98ba74f4242ed6734a4d546af5" }, -+ { 1000, "463661c30300be512a9df40904f0757cde5f1141" }, -+ { 1336, "b931f831d9034fe59c65176400b039fe9c1f44a5" }, -+ { 1344, "af8866b1cd4a4887d6185bfe72470ffdfb3648e1" }, -+ { 1400, "49c6caf07296d5e31d2504d088bc5b20c3ee7cdb" }, -+ { 1408, "fcae8deedbc6ebf0763575dc7e9de075b448a0f4" }, -+ { 2048, "edece5012146c1faa0dd10f50b183ba5d2af58ac" }, -+ { 3072, "5b83625adb43a488b8d64fecf39bb766818547b7" }, -+ { 4048, "d2c533678d26c970293af60f14c8279dc708bfc9" }, -+ { 6144, "b8f67af4f991b08b725f969b049ebf813bfacc5c" }, -+ { 6400, "d9a6c7f746ac7a60ef2edbed2841cf851c25cfb0" }, -+ { 6528, "376792b8c8d18161d15579fb7829e6e3a27e9946" }, -+ { 8192, "d890eabdca195b34ef8724b28360cffa92ae5655" }, -+ {16384, "a167ee52639ec7bf19aee9c6e8f76667c14134b9" }, -+ {18432, "e4396ab56f67296b220985a12078f4a0e365d2cc" }, -+ { 0, NULL }, -+}; -+ -+/* CryptoKey = 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef -+ * IV = 0x12345678, 0x90abcdef -+ * MacKey = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ * 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ * Note: only sizes aligned to 3DES block size (8 bytes) allowed -+ */ -+static MV_CESA_SIZE_TEST cbc3desMdMultiSizeTest504[] = -+{ -+ { 64, "8d10e00802460ede0058c139ba48bd2d" }, -+ { 80, "6f463057e1a90e0e91ae505b527bcec0" }, -+ { 352, "4938d48bdf86aece2c6851e7c6079788" }, -+ { 512, "516705d59f3cf810ebf2a13a23a7d42e" }, -+ { 1000, "a5a000ee5c830e67ddc6a2d2e5644b31" }, -+ { 1336, "44af60087b74ed07950088efbe3b126a" }, -+ { 1344, "1f5b39e0577920af731dabbfcf6dfc2a" }, -+ { 1400, "6804ea640e29b9cd39e08bc37dbce734" }, -+ { 1408, "4fb436624b02516fc9d1535466574bf9" }, -+ { 2048, "c909b0985c423d8d86719f701e9e83db" }, -+ { 3072, "cfe0bc34ef97213ee3d3f8b10122db21" }, -+ { 4048, "03ea10b5ae4ddeb20aed6af373082ed1" }, -+ { 6144, "b9a0ff4f87fc14b3c2dc6f0ed0998fdf" }, -+ { 6400, "6995f85d9d4985dd99e974ec7dda9dd6" }, -+ { 6528, "bbbb548ce2fa3d58467f6a6a5168a0e6" }, -+ { 8192, "afe101fbe745bb449ae4f50d10801456" }, -+ {16384, "9741706d0b1c923340c4660ff97cacdf" }, -+ {18432, "b0217becb73cb8f61fd79c7ce9d023fb" }, -+ { 0, NULL }, -+}; -+ -+ -+/* CryptoKey = 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef; -+ * IV = 0x12345678, 0x90abcdef -+ * MacKey = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ * 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 -+ * 0x11, 0x12, 0x13, 0x14 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ * Note: only sizes aligned to 3DES block size (8 bytes) allowed -+ */ -+static MV_CESA_SIZE_TEST cbc3desShaMultiSizeTest505[] = -+{ -+ { 64, "409187e5bdb0be4a7754ca3747f7433dc4f01b98" }, -+ { 80, "1b002ed050be743aa98860cf35659646bb8efcc0" }, -+ { 352, "6cbf7ebe50fa4fa6eecc19eca23f9eae553ccfff" }, -+ { 512, "cfb5253fb4bf72b743320c30c7e48c54965853b0" }, -+ { 1000, "95e04e1ca2937e7c5a9aba9e42d2bcdb8a7af21f" }, -+ { 1336, "3b5c1f5eee5837ebf67b83ae01405542d77a6627" }, -+ { 1344, "2b3d42ab25615437f98a1ee310b81d07a02badc2" }, -+ { 1400, "7f8687df7c1af44e4baf3c934b6cca5ab6bc993e" }, -+ { 1408, "473a581c5f04f7527d50793c845471ac87e86430" }, -+ { 2048, "e41d20cae7ebe34e6e828ed62b1e5734019037bb" }, -+ { 3072, "275664afd7a561d804e6b0d204e53939cde653ae" }, -+ { 4048, "0d220cc5b34aeeb46bbbd637dde6290b5a8285a3" }, -+ { 6144, "cb393ddcc8b1c206060625b7d822ef9839e67bc5" }, -+ { 6400, "dd3317e2a627fc04800f74a4b05bfda00fab0347" }, -+ { 6528, "8a74c3b2441ab3f5a7e08895cc432566219a7c41" }, -+ { 8192, "b8e6ef3a549ed0e005bd5b8b1a5fe6689e9711a7" }, -+ {16384, "55f59404008276cdac0e2ba0d193af2d40eac5ce" }, -+ {18432, "86ae6c4fc72369a54cce39938e2d0296cd9c6ec5" }, -+ { 0, NULL }, -+}; -+ -+ -+/* CryptoKey = 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef -+ * IV = 0x12345678, 0x90abcdef -+ * MacKey = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ * 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ * Note: only sizes aligned to AES block size (16 bytes) allowed -+ */ -+static MV_CESA_SIZE_TEST cbcAes128md5multiSizeTest506[] = -+{ -+ { 16, "7ca4c2ba866751598720c5c4aa0d6786" }, -+ { 64, "7dba7fb988e80da609b1fea7254bced8" }, -+ { 80, "6b6e863ac5a71d15e3e9b1c86c9ba05f" }, -+ { 352, "a1ceb9c2e3021002400d525187a9f38c" }, -+ { 512, "596c055c1c55db748379223164075641" }, -+ { 1008, "f920989c02f3b3603f53c99d89492377" }, -+ { 1344, "2e496b73759d77ed32ea222dbd2e7b41" }, -+ { 1408, "7178c046b3a8d772efdb6a71c4991ea4" }, -+ { 2048, "a917f0099c69eb94079a8421714b6aad" }, -+ { 3072, "693cd5033d7f5391d3c958519fa9e934" }, -+ { 4048, "139dca91bcff65b3c40771749052906b" }, -+ { 6144, "428d9cef6df4fb70a6e9b6bbe4819e55" }, -+ { 6400, "9c0b909e76daa811e12b1fc17000a0c4" }, -+ { 6528, "ad876f6297186a7be1f1b907ed860eda" }, -+ { 8192, "479cbbaca37dd3191ea1f3e8134a0ef4" }, -+ {16384, "60fda559c74f91df538100c9842f2f15" }, -+ {18432, "4a3eb1cba1fa45f3981270953f720c42" }, -+ { 0, NULL }, -+}; -+ -+ -+/* CryptoKey = 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef, -+ * 0x01234567, 0x89abcdef; -+ * IV = 0x12345678, 0x90abcdef -+ * MacKey = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, -+ * 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 -+ * 0x11, 0x12, 0x13, 0x14 -+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890") -+ * Note: only sizes aligned to AES block size (16 bytes) allowed -+ */ -+static MV_CESA_SIZE_TEST cbcAes128sha1multiSizeTest507[] = -+{ -+ { 16, "9aa8dc1c45f0946daf78057fa978759c625c1fee" }, -+ { 64, "9f588fc1ede851e5f8b20256abc9979465ae2189" }, -+ { 80, "13558472d1fc1c90dffec6e5136c7203452d509b" }, -+ { 352, "6b93518e006cfaa1f7adb24615e7291fb0a27e06" }, -+ { 512, "096874951a77fbbf333e49d80c096ee2016e09bd" }, -+ { 1008, "696fc203c2e4b5ae0ec5d1db3f623c490bc6dbac" }, -+ { 1344, "79bf77509935ccd3528caaac6a5eb6481f74029b" }, -+ { 1408, "627f9462b95fc188e8cfa7eec15119bdc5d4fcf1" }, -+ { 2048, "3d50d0c005feba92fe41502d609fced9c882b4d1" }, -+ { 3072, "758807e5b983e3a91c06fb218fe0f73f77111e94" }, -+ { 4048, "ca90e85242e33f005da3504416a52098d0d31fb2" }, -+ { 6144, "8044c1d4fd06642dfc46990b4f18b61ef1e972cf" }, -+ { 6400, "166f1f4ea57409f04feba9fb1e39af0e00bd6f43" }, -+ { 6528, "0389016a39485d6e330f8b4215ddf718b404f7e9" }, -+ { 8192, "6df7ee2a8b61d6f7f860ce8dbf778f0c2a5b508b" }, -+ {16384, "a70a6d8dfa1f91ded621c3dbaed34162bc48783f" }, -+ {18432, "8dfad627922ce15df1eed10bdbed49244efa57db" }, -+ { 0, NULL }, -+}; -+ -+ -+void cesaTestPrintStatus(void); -+ -+ -+/*------------------------- LOCAL FUNCTIONs ---------------------------------*/ -+MV_STATUS testCmd(int sid, int iter, MV_CESA_COMMAND* pCmd, -+ MV_CESA_TEST_SESSION* pTestSession, MV_U8* pIV, int ivSize); -+MV_STATUS testClose(int idx); -+MV_STATUS testOpen(int idx); -+void close_session(int sid); -+void cesaTestCheckReady(const MV_CESA_RESULT *r); -+void cesaCheckReady(MV_CESA_RESULT* r); -+void printTestResults(int idx, MV_STATUS status, int checkMode); -+void cesaLastResult(void); -+void cesaTestPrintReq(int req, int offset, int size); -+ -+void cesaTestPrintStatus(void); -+void cesaTestPrintSession(int idx); -+void sizeTest(int testIdx, int iter, int checkMode); -+void multiTest(int iter, int reqSize, int checkMode); -+void oneTest(int testIdx, int caseIdx,int iter, int reqSize, int checkMode); -+void multiSizeTest(int idx, int iter, int checkMode, char* inputData); -+void cesaTest(int iter, int reqSize, int checkMode); -+void cesaOneTest(int testIdx, int caseIdx,int iter, int reqSize, int checkMode); -+void combiTest(int iter, int reqSize, int checkMode); -+void shaTest(int iter, int reqSize, int checkMode); -+void mdTest(int iter, int reqSize, int checkMode); -+void aesTest(int iter, int reqSize, int checkMode); -+void tripleDesTest(int iter, int reqSize, int checkMode); -+void desTest(int iter, int reqSize, int checkMode); -+void cesaTestStop(void); -+MV_STATUS testRun(int idx, int caseIdx, int iter,int reqSize, int checkMode); -+void cesaTestStart(int bufNum, int bufSize); -+ -+ -+static MV_U32 getRate(MV_U32* remainder) -+{ -+ MV_U32 kBits, milliSec, rate; -+ -+ milliSec = 0; -+ if( (cesaEndTicks - cesaBeginTicks) > 0) -+ { -+ milliSec = CESA_TEST_TICK_TO_MS(cesaEndTicks - cesaBeginTicks); -+ } -+ if(milliSec == 0) -+ { -+ if(remainder != NULL) -+ *remainder = 0; -+ return 0; -+ } -+ -+ kBits = (cesaIteration*cesaRateSize*8)/1000; -+ rate = kBits/milliSec; -+ if(remainder != NULL) -+ *remainder = ((kBits % milliSec)*10)/milliSec; -+ -+ return rate; -+} -+ -+static char* extractMbuf(MV_CESA_MBUF *pMbuf, -+ int offset, int size, char* hexStr) -+{ -+ mvCesaCopyFromMbuf((MV_U8*)cesaBinBuffer, pMbuf, offset, size); -+ mvBinToHex((const MV_U8*)cesaBinBuffer, hexStr, size); -+ -+ return hexStr; -+} -+ -+static MV_BOOL cesaCheckMbuf(MV_CESA_MBUF *pMbuf, -+ const char* hexString, int offset, -+ int checkSize) -+{ -+ MV_BOOL isFailed = MV_FALSE; -+ MV_STATUS status; -+ int size = strlen(hexString)/2; -+ int checkedSize = 0; -+/* -+ mvOsPrintf("cesaCheckMbuf: pMbuf=%p, offset=%d, checkSize=%d, mBufSize=%d\n", -+ pMbuf, offset, checkSize, pMbuf->mbufSize); -+*/ -+ if(pMbuf->mbufSize < (checkSize + offset)) -+ { -+ mvOsPrintf("checkSize (%d) is too large: offset=%d, mbufSize=%d\n", -+ checkSize, offset, pMbuf->mbufSize); -+ return MV_TRUE; -+ } -+ status = mvCesaCopyFromMbuf((MV_U8*)cesaBinBuffer, pMbuf, offset, checkSize); -+ if(status != MV_OK) -+ { -+ mvOsPrintf("CesaTest: Can't copy %d bytes from Mbuf=%p to checkBuf=%p\n", -+ checkSize, pMbuf, cesaBinBuffer); -+ return MV_TRUE; -+ } -+/* -+ mvDebugMemDump(cesaBinBuffer, size, 1); -+*/ -+ mvHexToBin(hexString, (MV_U8*)cesaExpBinBuffer, size); -+ -+ /* Compare buffers */ -+ while(checkSize > checkedSize) -+ { -+ size = MV_MIN(size, (checkSize - checkedSize)); -+ if(memcmp(cesaExpBinBuffer, &cesaBinBuffer[checkedSize], size) != 0) -+ { -+ mvOsPrintf("CheckMbuf failed: checkSize=%d, size=%d, checkedSize=%d\n", -+ checkSize, size, checkedSize); -+ mvDebugMemDump(&cesaBinBuffer[checkedSize], size, 1); -+ mvDebugMemDump(cesaExpBinBuffer, size, 1); -+ -+ isFailed = MV_TRUE; -+ break; -+ } -+ checkedSize += size; -+ } -+ -+ return isFailed; -+} -+ -+static MV_STATUS cesaSetMbuf(MV_CESA_MBUF *pMbuf, -+ const char* hexString, -+ int offset, int reqSize) -+{ -+ MV_STATUS status = MV_OK; -+ int copySize, size = strlen(hexString)/2; -+ -+ mvHexToBin(hexString, (MV_U8*)cesaBinBuffer, size); -+ -+ copySize = 0; -+ while(reqSize > copySize) -+ { -+ size = MV_MIN(size, (reqSize - copySize)); -+ -+ status = mvCesaCopyToMbuf((MV_U8*)cesaBinBuffer, pMbuf, offset+copySize, size); -+ if(status != MV_OK) -+ { -+ mvOsPrintf("cesaSetMbuf Error: Copy %d of %d bytes to MBuf\n", -+ copySize, reqSize); -+ break; -+ } -+ copySize += size; -+ } -+ pMbuf->mbufSize = offset+copySize; -+ return status; -+} -+ -+static MV_CESA_TEST_SESSION* getTestSessionDb(int idx, int* pTestIdx) -+{ -+ int testIdx, dbIdx = idx/100; -+ -+ if(dbIdx > MAX_TEST_TYPE) -+ { -+ mvOsPrintf("Wrong index %d - No such test type\n", idx); -+ return NULL; -+ } -+ testIdx = idx % 100; -+ -+ if(testIdx >= cesaTestsDB[dbIdx].numSessions) -+ { -+ mvOsPrintf("Wrong index %d - No such test\n", idx); -+ return NULL; -+ } -+ if(pTestIdx != NULL) -+ *pTestIdx = testIdx; -+ -+ return cesaTestsDB[dbIdx].pSessions; -+} -+ -+/* Debug */ -+void cesaTestPrintReq(int req, int offset, int size) -+{ -+ MV_CESA_MBUF* pMbuf; -+ -+ mvOsPrintf("cesaTestPrintReq: req=%d, offset=%d, size=%d\n", -+ req, offset, size); -+ mvDebugMemDump(cesaCmdRing, 128, 4); -+ -+ pMbuf = cesaCmdRing[req].pSrc; -+ mvCesaDebugMbuf("src", pMbuf, offset,size); -+ pMbuf = cesaCmdRing[req].pDst; -+ mvCesaDebugMbuf("dst", pMbuf, offset, size); -+ -+ cesaTestPrintStatus(); -+} -+ -+void cesaLastResult(void) -+{ -+ mvOsPrintf("Last Result: ReqId = %d, SessionId = %d, rc = (%d)\n", -+ (MV_U32)cesaResult.pReqPrv, cesaResult.sessionId, -+ cesaResult.retCode); -+} -+ -+void printTestResults(int idx, MV_STATUS status, int checkMode) -+{ -+ int testIdx; -+ MV_CESA_TEST_SESSION* pTestSessions = getTestSessionDb(idx, &testIdx); -+ -+ if(pTestSessions == NULL) -+ return; -+ -+ mvOsPrintf("%-35s %4dx%-4d : ", pTestSessions[testIdx].name, -+ cesaIteration, cesaReqSize); -+ if( (status == MV_OK) && -+ (cesaCryptoError == 0) && -+ (cesaError == 0) && -+ (cesaReqIdError == 0) ) -+ { -+ mvOsPrintf("Passed, Rate=%3u.%u Mbps (%5u cpp)\n", -+ cesaRate, cesaRateAfterDot, cesaEndTicks - cesaBeginTicks); -+ } -+ else -+ { -+ mvOsPrintf("Failed, Status = 0x%x\n", status); -+ if(cesaCryptoError > 0) -+ mvOsPrintf("cryptoError : %d\n", cesaCryptoError); -+ if(cesaReqIdError > 0) -+ mvOsPrintf("reqIdError : %d\n", cesaReqIdError); -+ if(cesaError > 0) -+ mvOsPrintf("cesaError : %d\n", cesaError); -+ } -+ if(cesaTestIsrMissCount > 0) -+ mvOsPrintf("cesaIsrMissed : %d\n", cesaTestIsrMissCount); -+} -+ -+void cesaCheckReady(MV_CESA_RESULT* r) -+{ -+ int reqId; -+ MV_CESA_MBUF *pMbuf; -+ MV_BOOL isFailed; -+ -+ cesaResult = *r; -+ reqId = (int)cesaResult.pReqPrv; -+ pMbuf = cesaCmdRing[reqId].pDst; -+ -+/* -+ mvOsPrintf("cesaCheckReady: reqId=%d, checkOffset=%d, checkSize=%d\n", -+ reqId, cesaCheckOffset, cesaCheckSize); -+*/ -+ /* Check expected reqId */ -+ if(reqId != cesaExpReqId) -+ { -+ cesaReqIdError++; -+/* -+ mvOsPrintf("CESA reqId Error: cbIter=%d (%d), reqId=%d, expReqId=%d\n", -+ cesaCbIter, cesaIteration, reqId, cesaExpReqId); -+*/ -+ } -+ else -+ { -+ if( (cesaCheckMode == CESA_FULL_CHECK_MODE) || -+ (cesaCheckMode == CESA_FAST_CHECK_MODE) ) -+ { -+ if(cesaResult.retCode != MV_OK) -+ { -+ cesaError++; -+ -+ mvOsPrintf("CESA Error: cbIter=%d (%d), reqId=%d, rc=%d\n", -+ cesaCbIter, cesaIteration, reqId, cesaResult.retCode); -+ } -+ else -+ { -+ if( (cesaCheckSize > 0) && (cesaOutputHexStr != NULL) ) -+ { -+ /* Check expected output */ -+ -+ isFailed = cesaCheckMbuf(pMbuf, cesaOutputHexStr, cesaCheckOffset, cesaCheckSize); -+ if(isFailed) -+ { -+ mvOsPrintf("CESA Crypto Error: cbIter=%d (%d), reqId=%d\n", -+ cesaCbIter, cesaIteration, reqId); -+ -+ CESA_TEST_DEBUG_PRINT(("Error: reqId=%d, reqSize=%d, checkOffset=%d, checkSize=%d\n", -+ reqId, cesaReqSize, cesaCheckOffset, cesaCheckSize)); -+ -+ CESA_TEST_DEBUG_PRINT(("Output str: %s\n", cesaOutputHexStr)); -+ -+ CESA_TEST_DEBUG_CODE( mvCesaDebugMbuf("error", pMbuf, 0, cesaCheckOffset+cesaCheckSize) ); -+ -+ cesaCryptoError++; -+ } -+ } -+ } -+ } -+ } -+ if(cesaCheckMode == CESA_SHOW_CHECK_MODE) -+ { -+ extractMbuf(pMbuf, cesaCheckOffset, cesaCheckSize, cesaHexBuffer); -+ mvOsPrintf("%4d, %s\n", cesaCheckOffset, cesaHexBuffer); -+ } -+ -+ cesaCbIter++; -+ if(cesaCbIter >= cesaIteration) -+ { -+ cesaCbIter = 0; -+ cesaExpReqId = 0; -+ cesaIsReady = MV_TRUE; -+ -+ cesaEndTicks = CESA_TEST_TICK_GET(); -+ cesaRate = getRate(&cesaRateAfterDot); -+ } -+ else -+ { -+ cesaExpReqId = reqId + 1; -+ if(cesaExpReqId == CESA_DEF_REQ_SIZE) -+ cesaExpReqId = 0; -+ } -+} -+ -+ -+#ifdef MV_NETBSD -+static int cesaTestReadyIsr(void *arg) -+#else -+#ifdef __KERNEL__ -+static irqreturn_t cesaTestReadyIsr( int irq , void *dev_id) -+#endif -+#ifdef MV_VXWORKS -+void cesaTestReadyIsr(void) -+#endif -+#endif -+{ -+ MV_U32 cause; -+ MV_STATUS status; -+ MV_CESA_RESULT result; -+ -+ cesaTestIsrCount++; -+ /* Clear cause register */ -+ cause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG); -+ if( (cause & MV_CESA_CAUSE_ACC_DMA_ALL_MASK) == 0) -+ { -+ mvOsPrintf("cesaTestReadyIsr: cause=0x%x\n", cause); -+#ifdef MV_NETBSD -+ return 0; -+#else -+#ifdef __KERNEL__ -+ return 1; -+#else -+ return; -+#endif -+#endif -+ } -+ -+ MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0); -+ -+ while(MV_TRUE) -+ { -+ /* Get Ready requests */ -+ status = mvCesaReadyGet(&result); -+ if(status == MV_OK) -+ cesaCheckReady(&result); -+ -+ break; -+ } -+ if( (cesaTestFull == 1) && (status != MV_BUSY) ) -+ { -+ cesaTestFull = 0; -+ CESA_TEST_WAKE_UP(); -+ } -+ -+#ifdef __KERNEL__ -+ return 1; -+#endif -+} -+ -+void -+cesaTestCheckReady(const MV_CESA_RESULT *r) -+{ -+ MV_CESA_RESULT result = *r; -+ -+ cesaCheckReady(&result); -+ -+ if (cesaTestFull == 1) { -+ cesaTestFull = 0; -+ CESA_TEST_WAKE_UP(); -+ } -+} -+ -+static INLINE int open_session(MV_CESA_OPEN_SESSION* pOs) -+{ -+ MV_U16 sid; -+ MV_STATUS status; -+ -+ status = mvCesaSessionOpen(pOs, (short*)&sid); -+ if(status != MV_OK) -+ { -+ mvOsPrintf("CesaTest: Can't open new session - status = 0x%x\n", -+ status); -+ return -1; -+ } -+ -+ return (int)sid; -+} -+ -+void close_session(int sid) -+{ -+ MV_STATUS status; -+ -+ status = mvCesaSessionClose(sid); -+ if(status != MV_OK) -+ { -+ mvOsPrintf("CesaTest: Can't close session %d - status = 0x%x\n", -+ sid, status); -+ } -+} -+ -+MV_STATUS testOpen(int idx) -+{ -+ MV_CESA_OPEN_SESSION os; -+ int sid, i, testIdx; -+ MV_CESA_TEST_SESSION* pTestSession; -+ MV_U16 digestSize = 0; -+ -+ pTestSession = getTestSessionDb(idx, &testIdx); -+ if(pTestSession == NULL) -+ { -+ mvOsPrintf("Test %d is not exist\n", idx); -+ return MV_BAD_PARAM; -+ } -+ pTestSession = &pTestSession[testIdx]; -+ -+ if(pTestSession->sid != -1) -+ { -+ mvOsPrintf("Session for test %d already created: sid=%d\n", -+ idx, pTestSession->sid); -+ return MV_OK; -+ } -+ -+ os.cryptoAlgorithm = pTestSession->cryptoAlgorithm; -+ os.macMode = pTestSession->macAlgorithm; -+ switch(os.macMode) -+ { -+ case MV_CESA_MAC_MD5: -+ case MV_CESA_MAC_HMAC_MD5: -+ digestSize = MV_CESA_MD5_DIGEST_SIZE; -+ break; -+ -+ case MV_CESA_MAC_SHA1: -+ case MV_CESA_MAC_HMAC_SHA1: -+ digestSize = MV_CESA_SHA1_DIGEST_SIZE; -+ break; -+ -+ case MV_CESA_MAC_NULL: -+ digestSize = 0; -+ } -+ os.cryptoMode = pTestSession->cryptoMode; -+ os.direction = pTestSession->direction; -+ os.operation = pTestSession->operation; -+ -+ for(i=0; i<pTestSession->cryptoKeySize; i++) -+ os.cryptoKey[i] = pTestSession->pCryptoKey[i]; -+ -+ os.cryptoKeyLength = pTestSession->cryptoKeySize; -+ -+ for(i=0; i<pTestSession->macKeySize; i++) -+ os.macKey[i] = pTestSession->pMacKey[i]; -+ -+ os.macKeyLength = pTestSession->macKeySize; -+ os.digestSize = digestSize; -+ -+ sid = open_session(&os); -+ if(sid == -1) -+ { -+ mvOsPrintf("Can't open session for test %d: rc=0x%x\n", -+ idx, cesaResult.retCode); -+ return cesaResult.retCode; -+ } -+ CESA_TEST_DEBUG_PRINT(("Opened session: sid = %d\n", sid)); -+ pTestSession->sid = sid; -+ return MV_OK; -+} -+ -+MV_STATUS testClose(int idx) -+{ -+ int testIdx; -+ MV_CESA_TEST_SESSION* pTestSession; -+ -+ pTestSession = getTestSessionDb(idx, &testIdx); -+ if(pTestSession == NULL) -+ { -+ mvOsPrintf("Test %d is not exist\n", idx); -+ return MV_BAD_PARAM; -+ } -+ pTestSession = &pTestSession[testIdx]; -+ -+ if(pTestSession->sid == -1) -+ { -+ mvOsPrintf("Test session %d is not opened\n", idx); -+ return MV_NO_SUCH; -+ } -+ -+ close_session(pTestSession->sid); -+ pTestSession->sid = -1; -+ -+ return MV_OK; -+} -+ -+MV_STATUS testCmd(int sid, int iter, MV_CESA_COMMAND* pCmd, -+ MV_CESA_TEST_SESSION* pTestSession, MV_U8* pIV, int ivSize) -+{ -+ int cmdReqId = 0; -+ int i; -+ MV_STATUS rc = MV_OK; -+ char ivZeroHex[] = "0000"; -+ -+ if(iter == 0) -+ iter = CESA_DEF_ITER_NUM; -+ -+ if(pCmd == NULL) -+ { -+ mvOsPrintf("testCmd failed: pCmd=NULL\n"); -+ return MV_BAD_PARAM; -+ } -+ pCmd->sessionId = sid; -+ -+ cesaCryptoError = 0; -+ cesaReqIdError = 0; -+ cesaError = 0; -+ cesaTestIsrMissCount = 0; -+ cesaIsReady = MV_FALSE; -+ cesaIteration = iter; -+ -+ if(cesaInputHexStr == NULL) -+ cesaInputHexStr = cesaPlainHexEbc; -+ -+ for(i=0; i<CESA_DEF_REQ_SIZE; i++) -+ { -+ pCmd->pSrc = (MV_CESA_MBUF*)(cesaCmdRing[i].pSrc); -+ if(pIV != NULL) -+ { -+ /* If IV from SA - set IV in Source buffer to zeros */ -+ cesaSetMbuf(pCmd->pSrc, ivZeroHex, 0, pCmd->cryptoOffset); -+ cesaSetMbuf(pCmd->pSrc, cesaInputHexStr, pCmd->cryptoOffset, -+ (cesaReqSize - pCmd->cryptoOffset)); -+ } -+ else -+ { -+ cesaSetMbuf(pCmd->pSrc, cesaInputHexStr, 0, cesaReqSize); -+ } -+ pCmd->pDst = (MV_CESA_MBUF*)(cesaCmdRing[i].pDst); -+ cesaSetMbuf(pCmd->pDst, cesaNullPlainHexText, 0, cesaReqSize); -+ -+ memcpy(&cesaCmdRing[i], pCmd, sizeof(*pCmd)); -+ } -+ -+ if(cesaCheckMode == CESA_SW_SHOW_CHECK_MODE) -+ { -+ MV_U8 pDigest[MV_CESA_MAX_DIGEST_SIZE]; -+ -+ if(pTestSession->macAlgorithm == MV_CESA_MAC_MD5) -+ { -+ mvMD5(pCmd->pSrc->pFrags[0].bufVirtPtr, pCmd->macLength, pDigest); -+ mvOsPrintf("SW HASH_MD5: reqSize=%d, macLength=%d\n", -+ cesaReqSize, pCmd->macLength); -+ mvDebugMemDump(pDigest, MV_CESA_MD5_DIGEST_SIZE, 1); -+ return MV_OK; -+ } -+ if(pTestSession->macAlgorithm == MV_CESA_MAC_SHA1) -+ { -+ mvSHA1(pCmd->pSrc->pFrags[0].bufVirtPtr, pCmd->macLength, pDigest); -+ mvOsPrintf("SW HASH_SHA1: reqSize=%d, macLength=%d\n", -+ cesaReqSize, pCmd->macLength); -+ mvDebugMemDump(pDigest, MV_CESA_SHA1_DIGEST_SIZE, 1); -+ return MV_OK; -+ } -+ } -+ -+ cesaBeginTicks = CESA_TEST_TICK_GET(); -+ CESA_TEST_DEBUG_CODE( memset(cesaTestTrace, 0, sizeof(cesaTestTrace)); -+ cesaTestTraceIdx = 0; -+ ); -+ -+ if(cesaCheckMode == CESA_SW_NULL_CHECK_MODE) -+ { -+ volatile MV_U8 pDigest[MV_CESA_MAX_DIGEST_SIZE]; -+ -+ for(i=0; i<iter; i++) -+ { -+ if(pTestSession->macAlgorithm == MV_CESA_MAC_MD5) -+ { -+ mvMD5(pCmd->pSrc->pFrags[0].bufVirtPtr, pCmd->macLength, (unsigned char*)pDigest); -+ } -+ if(pTestSession->macAlgorithm == MV_CESA_MAC_SHA1) -+ { -+ mvSHA1(pCmd->pSrc->pFrags[0].bufVirtPtr, pCmd->macLength, (MV_U8 *)pDigest); -+ } -+ } -+ cesaEndTicks = CESA_TEST_TICK_GET(); -+ cesaRate = getRate(&cesaRateAfterDot); -+ cesaIsReady = MV_TRUE; -+ -+ return MV_OK; -+ } -+ -+ /*cesaTestIsrCount = 0;*/ -+ /*mvCesaDebugStatsClear();*/ -+ -+#ifndef MV_NETBSD -+ MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0); -+#endif -+ -+ for(i=0; i<iter; i++) -+ { -+ unsigned long flags; -+ -+ pCmd = &cesaCmdRing[cmdReqId]; -+ pCmd->pReqPrv = (void*)cmdReqId; -+ -+ CESA_TEST_LOCK(flags); -+ -+ rc = mvCesaAction(pCmd); -+ if(rc == MV_NO_RESOURCE) -+ cesaTestFull = 1; -+ -+ CESA_TEST_UNLOCK(flags); -+ -+ if(rc == MV_NO_RESOURCE) -+ { -+ CESA_TEST_LOCK(flags); -+ CESA_TEST_WAIT( (cesaTestFull == 0), 100); -+ CESA_TEST_UNLOCK(flags); -+ if(cesaTestFull == 1) -+ { -+ mvOsPrintf("CESA Test timeout: i=%d, iter=%d, cesaTestFull=%d\n", -+ i, iter, cesaTestFull); -+ cesaTestFull = 0; -+ return MV_TIMEOUT; -+ } -+ -+ CESA_TEST_LOCK(flags); -+ -+ rc = mvCesaAction(pCmd); -+ -+ CESA_TEST_UNLOCK(flags); -+ } -+ if( (rc != MV_OK) && (rc != MV_NO_MORE) ) -+ { -+ mvOsPrintf("mvCesaAction failed: rc=%d\n", rc); -+ return rc; -+ } -+ -+ cmdReqId++; -+ if(cmdReqId >= CESA_DEF_REQ_SIZE) -+ cmdReqId = 0; -+ -+#ifdef MV_LINUX -+ /* Reschedule each 16 requests */ -+ if( (i & 0xF) == 0) -+ schedule(); -+#endif -+ } -+ return MV_OK; -+} -+ -+void cesaTestStart(int bufNum, int bufSize) -+{ -+ int i, j, idx; -+ MV_CESA_MBUF *pMbufSrc, *pMbufDst; -+ MV_BUF_INFO *pFragsSrc, *pFragsDst; -+ char *pBuf; -+#ifndef MV_NETBSD -+ int numOfSessions, queueDepth; -+ char *pSram; -+ MV_STATUS status; -+ MV_CPU_DEC_WIN addrDecWin; -+#endif -+ -+ cesaCmdRing = mvOsMalloc(sizeof(MV_CESA_COMMAND) * CESA_DEF_REQ_SIZE); -+ if(cesaCmdRing == NULL) -+ { -+ mvOsPrintf("testStart: Can't allocate %ld bytes of memory\n", -+ sizeof(MV_CESA_COMMAND) * CESA_DEF_REQ_SIZE); -+ return; -+ } -+ memset(cesaCmdRing, 0, sizeof(MV_CESA_COMMAND) * CESA_DEF_REQ_SIZE); -+ -+ if(bufNum == 0) -+ bufNum = CESA_DEF_BUF_NUM; -+ -+ if(bufSize == 0) -+ bufSize = CESA_DEF_BUF_SIZE; -+ -+ cesaBufNum = bufNum; -+ cesaBufSize = bufSize; -+ mvOsPrintf("CESA test started: bufNum = %d, bufSize = %d\n", -+ bufNum, bufSize); -+ -+ cesaHexBuffer = mvOsMalloc(2*bufNum*bufSize); -+ if(cesaHexBuffer == NULL) -+ { -+ mvOsPrintf("testStart: Can't malloc %d bytes for cesaHexBuffer.\n", -+ 2*bufNum*bufSize); -+ return; -+ } -+ memset(cesaHexBuffer, 0, (2*bufNum*bufSize)); -+ -+ cesaBinBuffer = mvOsMalloc(bufNum*bufSize); -+ if(cesaBinBuffer == NULL) -+ { -+ mvOsPrintf("testStart: Can't malloc %d bytes for cesaBinBuffer\n", -+ bufNum*bufSize); -+ return; -+ } -+ memset(cesaBinBuffer, 0, (bufNum*bufSize)); -+ -+ cesaExpBinBuffer = mvOsMalloc(bufNum*bufSize); -+ if(cesaExpBinBuffer == NULL) -+ { -+ mvOsPrintf("testStart: Can't malloc %d bytes for cesaExpBinBuffer\n", -+ bufNum*bufSize); -+ return; -+ } -+ memset(cesaExpBinBuffer, 0, (bufNum*bufSize)); -+ -+ CESA_TEST_WAIT_INIT(); -+ -+ pMbufSrc = mvOsMalloc(sizeof(MV_CESA_MBUF) * CESA_DEF_REQ_SIZE); -+ pFragsSrc = mvOsMalloc(sizeof(MV_BUF_INFO) * bufNum * CESA_DEF_REQ_SIZE); -+ -+ pMbufDst = mvOsMalloc(sizeof(MV_CESA_MBUF) * CESA_DEF_REQ_SIZE); -+ pFragsDst = mvOsMalloc(sizeof(MV_BUF_INFO) * bufNum * CESA_DEF_REQ_SIZE); -+ -+ if( (pMbufSrc == NULL) || (pFragsSrc == NULL) || -+ (pMbufDst == NULL) || (pFragsDst == NULL) ) -+ { -+ mvOsPrintf("testStart: Can't malloc Src and Dst pMbuf and pFrags structures.\n"); -+ /* !!!! Dima cesaTestCleanup();*/ -+ return; -+ } -+ -+ memset(pMbufSrc, 0, sizeof(MV_CESA_MBUF) * CESA_DEF_REQ_SIZE); -+ memset(pFragsSrc, 0, sizeof(MV_BUF_INFO) * bufNum * CESA_DEF_REQ_SIZE); -+ -+ memset(pMbufDst, 0, sizeof(MV_CESA_MBUF) * CESA_DEF_REQ_SIZE); -+ memset(pFragsDst, 0, sizeof(MV_BUF_INFO) * bufNum * CESA_DEF_REQ_SIZE); -+ -+ mvOsPrintf("Cesa Test Start: pMbufSrc=%p, pFragsSrc=%p, pMbufDst=%p, pFragsDst=%p\n", -+ pMbufSrc, pFragsSrc, pMbufDst, pFragsDst); -+ -+ idx = 0; -+ for(i=0; i<CESA_DEF_REQ_SIZE; i++) -+ { -+ pBuf = mvOsIoCachedMalloc(cesaTestOSHandle,bufSize * bufNum * 2, -+ &cesaReqBufs[i].bufPhysAddr, -+ &cesaReqBufs[i].memHandle); -+ if(pBuf == NULL) -+ { -+ mvOsPrintf("testStart: Can't malloc %d bytes for pBuf\n", -+ bufSize * bufNum * 2); -+ return; -+ } -+ -+ memset(pBuf, 0, bufSize * bufNum * 2); -+ mvOsCacheFlush(cesaTestOSHandle,pBuf, bufSize * bufNum * 2); -+ if(pBuf == NULL) -+ { -+ mvOsPrintf("cesaTestStart: Can't allocate %d bytes for req_%d buffers\n", -+ bufSize * bufNum * 2, i); -+ return; -+ } -+ -+ cesaReqBufs[i].bufVirtPtr = (MV_U8*)pBuf; -+ cesaReqBufs[i].bufSize = bufSize * bufNum * 2; -+ -+ cesaCmdRing[i].pSrc = &pMbufSrc[i]; -+ cesaCmdRing[i].pSrc->pFrags = &pFragsSrc[idx]; -+ cesaCmdRing[i].pSrc->numFrags = bufNum; -+ cesaCmdRing[i].pSrc->mbufSize = 0; -+ -+ cesaCmdRing[i].pDst = &pMbufDst[i]; -+ cesaCmdRing[i].pDst->pFrags = &pFragsDst[idx]; -+ cesaCmdRing[i].pDst->numFrags = bufNum; -+ cesaCmdRing[i].pDst->mbufSize = 0; -+ -+ for(j=0; j<bufNum; j++) -+ { -+ cesaCmdRing[i].pSrc->pFrags[j].bufVirtPtr = (MV_U8*)pBuf; -+ cesaCmdRing[i].pSrc->pFrags[j].bufSize = bufSize; -+ pBuf += bufSize; -+ cesaCmdRing[i].pDst->pFrags[j].bufVirtPtr = (MV_U8*)pBuf; -+ cesaCmdRing[i].pDst->pFrags[j].bufSize = bufSize; -+ pBuf += bufSize; -+ } -+ idx += bufNum; -+ } -+ -+#ifndef MV_NETBSD -+ if (mvCpuIfTargetWinGet(CRYPT_ENG, &addrDecWin) == MV_OK) -+ pSram = (char*)addrDecWin.addrWin.baseLow; -+ else -+ { -+ mvOsPrintf("mvCesaInit: ERR. mvCpuIfTargetWinGet failed\n"); -+ return; -+ } -+ -+#ifdef MV_CESA_NO_SRAM -+ pSram = mvOsMalloc(4*1024+8); -+ if(pSram == NULL) -+ { -+ mvOsPrintf("CesaTest: can't allocate %d bytes for SRAM simulation\n", -+ 4*1024+8); -+ /* !!!! Dima cesaTestCleanup();*/ -+ return; -+ } -+ pSram = (MV_U8*)MV_ALIGN_UP((MV_U32)pSram, 8); -+#endif /* MV_CESA_NO_SRAM */ -+ -+ numOfSessions = CESA_DEF_SESSION_NUM; -+ queueDepth = CESA_DEF_REQ_SIZE - MV_CESA_MAX_CHAN; -+ -+ status = mvCesaInit(numOfSessions, queueDepth, pSram, NULL); -+ if(status != MV_OK) -+ { -+ mvOsPrintf("mvCesaInit is Failed: status = 0x%x\n", status); -+ /* !!!! Dima cesaTestCleanup();*/ -+ return; -+ } -+#endif /* !MV_NETBSD */ -+ -+ /* Prepare data for tests */ -+ for(i=0; i<50; i++) -+ strcat((char*)cesaDataHexStr3, "dd"); -+ -+ strcpy((char*)cesaDataAndMd5digest3, cesaDataHexStr3); -+ strcpy((char*)cesaDataAndSha1digest3, cesaDataHexStr3); -+ -+ /* Digest must be 8 byte aligned */ -+ for(; i<56; i++) -+ { -+ strcat((char*)cesaDataAndMd5digest3, "00"); -+ strcat((char*)cesaDataAndSha1digest3, "00"); -+ } -+ strcat((char*)cesaDataAndMd5digest3, cesaHmacMd5digestHex3); -+ strcat((char*)cesaDataAndSha1digest3, cesaHmacSha1digestHex3); -+ -+#ifndef MV_NETBSD -+ MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0); -+ MV_REG_WRITE( MV_CESA_ISR_MASK_REG, MV_CESA_CAUSE_ACC_DMA_MASK); -+#endif -+ -+#ifdef MV_VXWORKS -+ { -+ MV_STATUS status; -+ -+ status = intConnect((VOIDFUNCPTR *)INT_LVL_CESA, cesaTestReadyIsr, (int)NULL); -+ if (status != OK) -+ { -+ mvOsPrintf("CESA: Can't connect CESA (%d) interrupt, status=0x%x \n", -+ INT_LVL_CESA, status); -+ /* !!!! Dima cesaTestCleanup();*/ -+ return; -+ } -+ cesaSemId = semMCreate(SEM_Q_PRIORITY | SEM_INVERSION_SAFE | SEM_DELETE_SAFE); -+ if(cesaSemId == NULL) -+ { -+ mvOsPrintf("cesaTestStart: Can't create semaphore\n"); -+ return; -+ } -+ intEnable(INT_LVL_CESA); -+ } -+#endif /* MV_VXWORKS */ -+ -+#if !defined(MV_NETBSD) && defined(__KERNEL__) -+ if( request_irq(CESA_IRQ, cesaTestReadyIsr, (SA_INTERRUPT) , "cesa_test", NULL ) ) -+ { -+ mvOsPrintf( "cannot assign irq\n" ); -+ /* !!!! Dima cesaTestCleanup();*/ -+ return; -+ } -+ spin_lock_init( &cesaLock ); -+#endif -+} -+ -+MV_STATUS testRun(int idx, int caseIdx, int iter, -+ int reqSize, int checkMode) -+{ -+ int testIdx, count, sid, digestSize; -+ int blockSize; -+ MV_CESA_TEST_SESSION* pTestSession; -+ MV_CESA_COMMAND cmd; -+ MV_STATUS status; -+ -+ memset(&cmd, 0, sizeof(cmd)); -+ -+ pTestSession = getTestSessionDb(idx, &testIdx); -+ if(pTestSession == NULL) -+ { -+ mvOsPrintf("Test %d is not exist\n", idx); -+ return MV_BAD_PARAM; -+ } -+ pTestSession = &pTestSession[testIdx]; -+ -+ sid = pTestSession->sid; -+ if(sid == -1) -+ { -+ mvOsPrintf("Test %d is not opened\n", idx); -+ return MV_BAD_STATE; -+ } -+ switch(pTestSession->cryptoAlgorithm) -+ { -+ case MV_CESA_CRYPTO_DES: -+ case MV_CESA_CRYPTO_3DES: -+ blockSize = MV_CESA_DES_BLOCK_SIZE; -+ break; -+ -+ case MV_CESA_CRYPTO_AES: -+ blockSize = MV_CESA_AES_BLOCK_SIZE; -+ break; -+ -+ case MV_CESA_CRYPTO_NULL: -+ blockSize = 0; -+ break; -+ -+ default: -+ mvOsPrintf("cesaTestRun: Bad CryptoAlgorithm=%d\n", -+ pTestSession->cryptoAlgorithm); -+ return MV_BAD_PARAM; -+ } -+ switch(pTestSession->macAlgorithm) -+ { -+ case MV_CESA_MAC_MD5: -+ case MV_CESA_MAC_HMAC_MD5: -+ digestSize = MV_CESA_MD5_DIGEST_SIZE; -+ break; -+ -+ case MV_CESA_MAC_SHA1: -+ case MV_CESA_MAC_HMAC_SHA1: -+ digestSize = MV_CESA_SHA1_DIGEST_SIZE; -+ break; -+ default: -+ digestSize = 0; -+ } -+ -+ if(iter == 0) -+ iter = CESA_DEF_ITER_NUM; -+ -+ if(pTestSession->direction == MV_CESA_DIR_ENCODE) -+ { -+ cesaOutputHexStr = cesaTestCases[caseIdx].cipherHexStr; -+ cesaInputHexStr = cesaTestCases[caseIdx].plainHexStr; -+ } -+ else -+ { -+ cesaOutputHexStr = cesaTestCases[caseIdx].plainHexStr; -+ cesaInputHexStr = cesaTestCases[caseIdx].cipherHexStr; -+ } -+ -+ cmd.sessionId = sid; -+ if(checkMode == CESA_FAST_CHECK_MODE) -+ { -+ cmd.cryptoLength = cesaTestCases[caseIdx].cryptoLength; -+ cmd.macLength = cesaTestCases[caseIdx].macLength; -+ } -+ else -+ { -+ cmd.cryptoLength = reqSize; -+ cmd.macLength = reqSize; -+ } -+ cesaRateSize = cmd.cryptoLength; -+ cesaReqSize = cmd.cryptoLength; -+ cmd.cryptoOffset = 0; -+ if(pTestSession->operation != MV_CESA_MAC_ONLY) -+ { -+ if( (pTestSession->cryptoMode == MV_CESA_CRYPTO_CBC) || -+ (pTestSession->cryptoMode == MV_CESA_CRYPTO_CTR) ) -+ { -+ cmd.ivOffset = 0; -+ cmd.cryptoOffset = blockSize; -+ if(cesaTestCases[caseIdx].pCryptoIV == NULL) -+ { -+ cmd.ivFromUser = 1; -+ } -+ else -+ { -+ cmd.ivFromUser = 0; -+ mvCesaCryptoIvSet(cesaTestCases[caseIdx].pCryptoIV, blockSize); -+ } -+ cesaReqSize = cmd.cryptoOffset + cmd.cryptoLength; -+ } -+ } -+ -+/* -+ mvOsPrintf("ivFromUser=%d, cryptoLength=%d, cesaReqSize=%d, cryptoOffset=%d\n", -+ cmd.ivFromUser, cmd.cryptoLength, cesaReqSize, cmd.cryptoOffset); -+*/ -+ if(pTestSession->operation != MV_CESA_CRYPTO_ONLY) -+ { -+ cmd.macOffset = cmd.cryptoOffset; -+ -+ if(cesaTestCases[caseIdx].digestOffset == -1) -+ { -+ cmd.digestOffset = cmd.macOffset + cmd.macLength; -+ cmd.digestOffset = MV_ALIGN_UP(cmd.digestOffset, 8); -+ } -+ else -+ { -+ cmd.digestOffset = cesaTestCases[caseIdx].digestOffset; -+ } -+ if( (cmd.digestOffset + digestSize) > cesaReqSize) -+ cesaReqSize = cmd.digestOffset + digestSize; -+ } -+ -+ cesaCheckMode = checkMode; -+ -+ if(checkMode == CESA_NULL_CHECK_MODE) -+ { -+ cesaCheckSize = 0; -+ cesaCheckOffset = 0; -+ } -+ else -+ { -+ if(pTestSession->operation == MV_CESA_CRYPTO_ONLY) -+ { -+ cesaCheckOffset = 0; -+ cesaCheckSize = cmd.cryptoLength; -+ } -+ else -+ { -+ cesaCheckSize = digestSize; -+ cesaCheckOffset = cmd.digestOffset; -+ } -+ } -+/* -+ mvOsPrintf("reqSize=%d, checkSize=%d, checkOffset=%d, checkMode=%d\n", -+ cesaReqSize, cesaCheckSize, cesaCheckOffset, cesaCheckMode); -+ -+ mvOsPrintf("blockSize=%d, ivOffset=%d, ivFromUser=%d, crOffset=%d, crLength=%d\n", -+ blockSize, cmd.ivOffset, cmd.ivFromUser, -+ cmd.cryptoOffset, cmd.cryptoLength); -+ -+ mvOsPrintf("macOffset=%d, digestOffset=%d, macLength=%d\n", -+ cmd.macOffset, cmd.digestOffset, cmd.macLength); -+*/ -+ status = testCmd(sid, iter, &cmd, pTestSession, -+ cesaTestCases[caseIdx].pCryptoIV, blockSize); -+ -+ if(status != MV_OK) -+ return status; -+ -+ /* Wait when all callbacks is received */ -+ count = 0; -+ while(cesaIsReady == MV_FALSE) -+ { -+ mvOsSleep(10); -+ count++; -+ if(count > 100) -+ { -+ mvOsPrintf("testRun: Timeout occured\n"); -+ return MV_TIMEOUT; -+ } -+ } -+ -+ return MV_OK; -+} -+ -+ -+void cesaTestStop(void) -+{ -+ MV_CESA_MBUF *pMbufSrc, *pMbufDst; -+ MV_BUF_INFO *pFragsSrc, *pFragsDst; -+ int i; -+ -+ /* Release all allocated memories */ -+ pMbufSrc = (MV_CESA_MBUF*)(cesaCmdRing[0].pSrc); -+ pFragsSrc = cesaCmdRing[0].pSrc->pFrags; -+ -+ pMbufDst = (MV_CESA_MBUF*)(cesaCmdRing[0].pDst); -+ pFragsDst = cesaCmdRing[0].pDst->pFrags; -+ -+ mvOsFree(pMbufSrc); -+ mvOsFree(pMbufDst); -+ mvOsFree(pFragsSrc); -+ mvOsFree(pFragsDst); -+ -+ for(i=0; i<CESA_DEF_REQ_SIZE; i++) -+ { -+ mvOsIoCachedFree(cesaTestOSHandle,cesaReqBufs[i].bufSize, -+ cesaReqBufs[i].bufPhysAddr,cesaReqBufs[i].bufVirtPtr, -+ cesaReqBufs[i].memHandle); -+ } -+ cesaDataHexStr3[0] = '\0'; -+} -+ -+void desTest(int iter, int reqSize, int checkMode) -+{ -+ int mode, i; -+ MV_STATUS status; -+ -+ mode = checkMode; -+ if(checkMode == CESA_FULL_CHECK_MODE) -+ mode = CESA_FAST_CHECK_MODE; -+ i = iter; -+ if(mode != CESA_NULL_CHECK_MODE) -+ i = 1; -+ -+ testOpen(0); -+ testOpen(1); -+ testOpen(2); -+ testOpen(3); -+ -+/* DES / ECB mode / Encrypt only */ -+ status = testRun(0, 1, iter, reqSize, checkMode); -+ printTestResults(0, status, checkMode); -+ -+/* DES / ECB mode / Decrypt only */ -+ status = testRun(1, 1, iter, reqSize, checkMode); -+ printTestResults(1, status, checkMode); -+ -+/* DES / CBC mode / Encrypt only */ -+ status = testRun(2, 2, i, reqSize, mode); -+ printTestResults(2, status, mode); -+ -+/* DES / CBC mode / Decrypt only */ -+ status = testRun(3, 2, iter, reqSize, mode); -+ printTestResults(3, status, mode); -+ -+ testClose(0); -+ testClose(1); -+ testClose(2); -+ testClose(3); -+} -+ -+void tripleDesTest(int iter, int reqSize, int checkMode) -+{ -+ int mode, i; -+ MV_STATUS status; -+ -+ mode = checkMode; -+ if(checkMode == CESA_FULL_CHECK_MODE) -+ mode = CESA_FAST_CHECK_MODE; -+ i = iter; -+ if(mode != CESA_NULL_CHECK_MODE) -+ i = 1; -+ -+ testOpen(100); -+ testOpen(101); -+ testOpen(102); -+ testOpen(103); -+ -+/* 3DES / ECB mode / Encrypt only */ -+ status = testRun(100, 1, iter, reqSize, checkMode); -+ printTestResults(100, status, checkMode); -+ -+/* 3DES / ECB mode / Decrypt only */ -+ status = testRun(101, 1, iter, reqSize, checkMode); -+ printTestResults(101, status, checkMode); -+ -+/* 3DES / CBC mode / Encrypt only */ -+ status = testRun(102, 2, i, reqSize, mode); -+ printTestResults(102, status, mode); -+ -+/* 3DES / CBC mode / Decrypt only */ -+ status = testRun(103, 2, iter, reqSize, mode); -+ printTestResults(103, status, mode); -+ -+ testClose(100); -+ testClose(101); -+ testClose(102); -+ testClose(103); -+} -+ -+void aesTest(int iter, int reqSize, int checkMode) -+{ -+ MV_STATUS status; -+ int mode, i; -+ -+ mode = checkMode; -+ if(checkMode == CESA_FULL_CHECK_MODE) -+ mode = CESA_FAST_CHECK_MODE; -+ -+ i = iter; -+ if(mode != CESA_NULL_CHECK_MODE) -+ i = 1; -+ -+ testOpen(200); -+ testOpen(201); -+ testOpen(202); -+ testOpen(203); -+ testOpen(204); -+ testOpen(205); -+ testOpen(206); -+ testOpen(207); -+ testOpen(208); -+ -+/* AES-128 Encode ECB mode */ -+ status = testRun(200, 3, iter, reqSize, checkMode); -+ printTestResults(200, status, checkMode); -+ -+/* AES-128 Decode ECB mode */ -+ status = testRun(201, 3, iter, reqSize, checkMode); -+ printTestResults(201, status, checkMode); -+ -+/* AES-128 Encode CBC mode (IV from SA) */ -+ status = testRun(202, 10, i, reqSize, mode); -+ printTestResults(202, status, mode); -+ -+/* AES-128 Encode CBC mode (IV from User) */ -+ status = testRun(202, 24, i, reqSize, mode); -+ printTestResults(202, status, mode); -+ -+/* AES-128 Decode CBC mode */ -+ status = testRun(203, 24, iter, reqSize, mode); -+ printTestResults(203, status, checkMode); -+ -+/* AES-192 Encode ECB mode */ -+ status = testRun(204, 4, iter, reqSize, checkMode); -+ printTestResults(204, status, checkMode); -+ -+/* AES-192 Decode ECB mode */ -+ status = testRun(205, 4, iter, reqSize, checkMode); -+ printTestResults(205, status, checkMode); -+ -+/* AES-256 Encode ECB mode */ -+ status = testRun(206, 5, iter, reqSize, checkMode); -+ printTestResults(206, status, checkMode); -+ -+/* AES-256 Decode ECB mode */ -+ status = testRun(207, 5, iter, reqSize, checkMode); -+ printTestResults(207, status, checkMode); -+ -+#if defined(MV_LINUX) -+/* AES-128 Encode CTR mode */ -+ status = testRun(208, 23, iter, reqSize, mode); -+ printTestResults(208, status, checkMode); -+#endif -+ testClose(200); -+ testClose(201); -+ testClose(202); -+ testClose(203); -+ testClose(204); -+ testClose(205); -+ testClose(206); -+ testClose(207); -+ testClose(208); -+} -+ -+ -+void mdTest(int iter, int reqSize, int checkMode) -+{ -+ int mode; -+ MV_STATUS status; -+ -+ if(iter == 0) -+ iter = CESA_DEF_ITER_NUM; -+ -+ mode = checkMode; -+ if(checkMode == CESA_FULL_CHECK_MODE) -+ mode = CESA_FAST_CHECK_MODE; -+ -+ testOpen(300); -+ testOpen(301); -+ testOpen(302); -+ testOpen(303); -+ testOpen(305); -+ -+/* HMAC-MD5 Generate signature test */ -+ status = testRun(300, 6, iter, reqSize, mode); -+ printTestResults(300, status, checkMode); -+ -+/* HMAC-MD5 Verify Signature test */ -+ status = testRun(301, 7, iter, reqSize, mode); -+ printTestResults(301, status, checkMode); -+ -+/* HMAC-MD5 Generate signature test */ -+ status = testRun(302, 8, iter, reqSize, mode); -+ printTestResults(302, status, checkMode); -+ -+/* HMAC-MD5 Verify Signature test */ -+ status = testRun(303, 9, iter, reqSize, mode); -+ printTestResults(303, status, checkMode); -+ -+/* HASH-MD5 Generate signature test */ -+ status = testRun(305, 15, iter, reqSize, mode); -+ printTestResults(305, status, checkMode); -+ -+ testClose(300); -+ testClose(301); -+ testClose(302); -+ testClose(303); -+ testClose(305); -+} -+ -+void shaTest(int iter, int reqSize, int checkMode) -+{ -+ int mode; -+ MV_STATUS status; -+ -+ if(iter == 0) -+ iter = CESA_DEF_ITER_NUM; -+ -+ mode = checkMode; -+ if(checkMode == CESA_FULL_CHECK_MODE) -+ mode = CESA_FAST_CHECK_MODE; -+ -+ testOpen(400); -+ testOpen(401); -+ testOpen(402); -+ testOpen(403); -+ testOpen(405); -+ -+/* HMAC-SHA1 Generate signature test */ -+ status = testRun(400, 11, iter, reqSize, mode); -+ printTestResults(400, status, checkMode); -+ -+/* HMAC-SHA1 Verify Signature test */ -+ status = testRun(401, 12, iter, reqSize, mode); -+ printTestResults(401, status, checkMode); -+ -+/* HMAC-SHA1 Generate signature test */ -+ status = testRun(402, 13, iter, reqSize, mode); -+ printTestResults(402, status, checkMode); -+ -+/* HMAC-SHA1 Verify Signature test */ -+ status = testRun(403, 14, iter, reqSize, mode); -+ printTestResults(403, status, checkMode); -+ -+/* HMAC-SHA1 Generate signature test */ -+ status = testRun(405, 16, iter, reqSize, mode); -+ printTestResults(405, status, checkMode); -+ -+ testClose(400); -+ testClose(401); -+ testClose(402); -+ testClose(403); -+ testClose(405); -+} -+ -+void combiTest(int iter, int reqSize, int checkMode) -+{ -+ MV_STATUS status; -+ int mode, i; -+ -+ mode = checkMode; -+ if(checkMode == CESA_FULL_CHECK_MODE) -+ mode = CESA_FAST_CHECK_MODE; -+ -+ if(iter == 0) -+ iter = CESA_DEF_ITER_NUM; -+ -+ i = iter; -+ if(mode != CESA_NULL_CHECK_MODE) -+ i = 1; -+ -+ testOpen(500); -+ testOpen(501); -+ testOpen(502); -+ testOpen(503); -+ testOpen(504); -+ testOpen(505); -+ testOpen(506); -+ testOpen(507); -+ -+/* DES ECB + MD5 encode test */ -+ status = testRun(500, 17, iter, reqSize, mode); -+ printTestResults(500, status, mode); -+ -+/* DES ECB + SHA1 encode test */ -+ status = testRun(501, 18, iter, reqSize, mode); -+ printTestResults(501, status, mode); -+ -+/* 3DES ECB + MD5 encode test */ -+ status = testRun(502, 17, iter, reqSize, mode); -+ printTestResults(502, status, mode); -+ -+/* 3DES ECB + SHA1 encode test */ -+ status = testRun(503, 18, iter, reqSize, mode); -+ printTestResults(503, status, mode); -+ -+/* 3DES CBC + MD5 encode test */ -+ status = testRun(504, 19, i, reqSize, mode); -+ printTestResults(504, status, mode); -+ -+/* 3DES CBC + SHA1 encode test */ -+ status = testRun(505, 20, i, reqSize, mode); -+ printTestResults(505, status, mode); -+ -+/* AES-128 CBC + MD5 encode test */ -+ status = testRun(506, 21, i, reqSize, mode); -+ printTestResults(506, status, mode); -+ -+/* AES-128 CBC + SHA1 encode test */ -+ status = testRun(507, 22, i, reqSize, mode); -+ printTestResults(507, status, mode); -+ -+ testClose(500); -+ testClose(501); -+ testClose(502); -+ testClose(503); -+ testClose(504); -+ testClose(505); -+ testClose(506); -+ testClose(507); -+} -+ -+void cesaOneTest(int testIdx, int caseIdx, -+ int iter, int reqSize, int checkMode) -+{ -+ MV_STATUS status; -+ -+ if(iter == 0) -+ iter = CESA_DEF_ITER_NUM; -+ -+ mvOsPrintf("test=%d, case=%d, size=%d, iter=%d\n", -+ testIdx, caseIdx, reqSize, iter); -+ -+ status = testOpen(testIdx); -+ -+ status = testRun(testIdx, caseIdx, iter, reqSize, checkMode); -+ printTestResults(testIdx, status, checkMode); -+ status = testClose(testIdx); -+ -+} -+ -+void cesaTest(int iter, int reqSize, int checkMode) -+{ -+ if(iter == 0) -+ iter = CESA_DEF_ITER_NUM; -+ -+ mvOsPrintf("%d iteration\n", iter); -+ mvOsPrintf("%d size\n\n", reqSize); -+ -+/* DES tests */ -+ desTest(iter, reqSize, checkMode); -+ -+/* 3DES tests */ -+ tripleDesTest(iter, reqSize, checkMode); -+ -+/* AES tests */ -+ aesTest(iter, reqSize, checkMode); -+ -+/* MD5 tests */ -+ mdTest(iter, reqSize, checkMode); -+ -+/* SHA-1 tests */ -+ shaTest(iter, reqSize, checkMode); -+} -+ -+void multiSizeTest(int idx, int iter, int checkMode, char* inputData) -+{ -+ MV_STATUS status; -+ int i; -+ MV_CESA_SIZE_TEST* pMultiTest; -+ -+ if( testOpen(idx) != MV_OK) -+ return; -+ -+ if(iter == 0) -+ iter = CESA_DEF_ITER_NUM; -+ -+ if(checkMode == CESA_SHOW_CHECK_MODE) -+ { -+ iter = 1; -+ } -+ else -+ checkMode = CESA_FULL_CHECK_MODE; -+ -+ cesaTestCases[0].plainHexStr = inputData; -+ cesaTestCases[0].pCryptoIV = NULL; -+ -+ switch(idx) -+ { -+ case 302: -+ pMultiTest = mdMultiSizeTest302; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = cesaDataHexStr3; -+ break; -+ -+ case 304: -+ pMultiTest = mdMultiSizeTest304; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 305: -+ pMultiTest = mdMultiSizeTest305; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 402: -+ pMultiTest = shaMultiSizeTest402; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 404: -+ pMultiTest = shaMultiSizeTest404; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 405: -+ pMultiTest = shaMultiSizeTest405; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 502: -+ pMultiTest = tripleDesMdMultiSizeTest502; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 503: -+ pMultiTest = tripleDesShaMultiSizeTest503; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 504: -+ iter = 1; -+ pMultiTest = cbc3desMdMultiSizeTest504; -+ cesaTestCases[0].pCryptoIV = iv1; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 505: -+ iter = 1; -+ pMultiTest = cbc3desShaMultiSizeTest505; -+ cesaTestCases[0].pCryptoIV = iv1; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 506: -+ iter = 1; -+ pMultiTest = cbcAes128md5multiSizeTest506; -+ cesaTestCases[0].pCryptoIV = iv5; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ case 507: -+ iter = 1; -+ pMultiTest = cbcAes128sha1multiSizeTest507; -+ cesaTestCases[0].pCryptoIV = iv5; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ break; -+ -+ default: -+ iter = 1; -+ checkMode = CESA_SHOW_CHECK_MODE; -+ pMultiTest = mdMultiSizeTest302; -+ if(inputData == NULL) -+ cesaTestCases[0].plainHexStr = hashHexStr80; -+ } -+ i = 0; -+ while(pMultiTest[i].outputHexStr != NULL) -+ { -+ cesaTestCases[0].cipherHexStr = (char *)pMultiTest[i].outputHexStr; -+ status = testRun(idx, 0, iter, pMultiTest[i].size, -+ checkMode); -+ if(checkMode != CESA_SHOW_CHECK_MODE) -+ { -+ cesaReqSize = pMultiTest[i].size; -+ printTestResults(idx, status, checkMode); -+ } -+ if(status != MV_OK) -+ break; -+ i++; -+ } -+ testClose(idx); -+/* -+ mvCesaDebugStatus(); -+ cesaTestPrintStatus(); -+*/ -+} -+ -+void open_session_test(int idx, int caseIdx, int iter) -+{ -+ int reqIdError, cryptoError, openErrors, i; -+ int openErrDisp[100]; -+ MV_STATUS status; -+ -+ memset(openErrDisp, 0, sizeof(openErrDisp)); -+ openErrors = 0; -+ reqIdError = 0; -+ cryptoError = 0; -+ for(i=0; i<iter; i++) -+ { -+ status = testOpen(idx); -+ if(status != MV_OK) -+ { -+ openErrors++; -+ openErrDisp[status]++; -+ } -+ else -+ { -+ testRun(idx, caseIdx, 1, 0, CESA_FAST_CHECK_MODE); -+ if(cesaCryptoError > 0) -+ cryptoError++; -+ if(cesaReqIdError > 0) -+ reqIdError++; -+ -+ testClose(idx); -+ } -+ } -+ if(cryptoError > 0) -+ mvOsPrintf("cryptoError : %d\n", cryptoError); -+ if(reqIdError > 0) -+ mvOsPrintf("reqIdError : %d\n", reqIdError); -+ -+ if(openErrors > 0) -+ { -+ mvOsPrintf("Open Errors = %d\n", openErrors); -+ for(i=0; i<100; i++) -+ { -+ if(openErrDisp[i] != 0) -+ mvOsPrintf("Error %d - occurs %d times\n", i, openErrDisp[i]); -+ } -+ } -+} -+ -+ -+void loopback_test(int idx, int iter, int size, char* pPlainData) -+{ -+} -+ -+ -+#if defined(MV_VXWORKS) -+int testMode = 0; -+unsigned __TASKCONV cesaTask(void* args) -+{ -+ int reqSize = cesaReqSize; -+ -+ if(testMode == 0) -+ { -+ cesaOneTest(cesaTestIdx, cesaCaseIdx, cesaIteration, -+ reqSize, cesaCheckMode); -+ } -+ else -+ { -+ if(testMode == 1) -+ { -+ cesaTest(cesaIteration, reqSize, cesaCheckMode); -+ combiTest(cesaIteration, reqSize, cesaCheckMode); -+ } -+ else -+ { -+ multiSizeTest(cesaIdx, cesaIteration, cesaCheckMode, NULL); -+ } -+ } -+ return 0; -+} -+ -+void oneTest(int testIdx, int caseIdx, -+ int iter, int reqSize, int checkMode) -+{ -+ long rc; -+ -+ cesaIteration = iter; -+ cesaReqSize = cesaRateSize = reqSize; -+ cesaCheckMode = checkMode; -+ testMode = 0; -+ cesaTestIdx = testIdx; -+ cesaCaseIdx = caseIdx; -+ rc = mvOsTaskCreate("CESA_T", 100, 4*1024, cesaTask, NULL, &cesaTaskId); -+ if (rc != MV_OK) -+ { -+ mvOsPrintf("hMW: Can't create CESA multiCmd test task, rc = %ld\n", rc); -+ } -+} -+ -+void multiTest(int iter, int reqSize, int checkMode) -+{ -+ long rc; -+ -+ cesaIteration = iter; -+ cesaCheckMode = checkMode; -+ cesaReqSize = reqSize; -+ testMode = 1; -+ rc = mvOsTaskCreate("CESA_T", 100, 4*1024, cesaTask, NULL, &cesaTaskId); -+ if (rc != MV_OK) -+ { -+ mvOsPrintf("hMW: Can't create CESA multiCmd test task, rc = %ld\n", rc); -+ } -+} -+ -+void sizeTest(int testIdx, int iter, int checkMode) -+{ -+ long rc; -+ -+ cesaIteration = iter; -+ cesaCheckMode = checkMode; -+ testMode = 2; -+ cesaIdx = testIdx; -+ rc = mvOsTaskCreate("CESA_T", 100, 4*1024, cesaTask, NULL, &cesaTaskId); -+ if (rc != MV_OK) -+ { -+ mvOsPrintf("hMW: Can't create CESA test task, rc = %ld\n", rc); -+ } -+} -+ -+#endif /* MV_VXWORKS */ -+ -+extern void mvCesaDebugSA(short sid, int mode); -+void cesaTestPrintSession(int idx) -+{ -+ int testIdx; -+ MV_CESA_TEST_SESSION* pTestSession; -+ -+ pTestSession = getTestSessionDb(idx, &testIdx); -+ if(pTestSession == NULL) -+ { -+ mvOsPrintf("Test %d is not exist\n", idx); -+ return; -+ } -+ pTestSession = &pTestSession[testIdx]; -+ -+ if(pTestSession->sid == -1) -+ { -+ mvOsPrintf("Test session %d is not opened\n", idx); -+ return; -+ } -+ -+ mvCesaDebugSA(pTestSession->sid, 1); -+} -+ -+void cesaTestPrintStatus(void) -+{ -+ mvOsPrintf("\n\t Cesa Test Status\n\n"); -+ -+ mvOsPrintf("isrCount=%d\n", -+ cesaTestIsrCount); -+ -+#ifdef CESA_TEST_DEBUG -+ { -+ int i, j; -+ j = cesaTestTraceIdx; -+ mvOsPrintf("No Type Cause rCause iCause Res Time pReady pProc pEmpty\n"); -+ for(i=0; i<MV_CESA_TEST_TRACE_SIZE; i++) -+ { -+ mvOsPrintf("%02d. %d 0x%04x 0x%04x 0x%04x 0x%02x 0x%02x %02d 0x%06x %p %p %p\n", -+ j, cesaTestTrace[j].type, cesaTestTrace[j].cause, cesaTestTrace[j].realCause, -+ cesaTestTrace[j].dmaCause, cesaTestTrace[j].resources, cesaTestTrace[j].timeStamp, -+ cesaTestTrace[j].pReqReady, cesaTestTrace[j].pReqProcess, cesaTestTrace[j].pReqEmpty); -+ j++; -+ if(j == MV_CESA_TEST_TRACE_SIZE) -+ j = 0; -+ } -+ } -+#endif /* CESA_TEST_DEBUG */ -+} -diff --git a/crypto/ocf/kirkwood/cesa/mvLru.c b/crypto/ocf/kirkwood/cesa/mvLru.c -new file mode 100644 -index 0000000..4b5f877 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvLru.c -@@ -0,0 +1,158 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvOs.h" -+#include "mvLru.h" -+/* LRU Cache support */ -+ -+ -+/* Init LRU cache database */ -+MV_LRU_CACHE* mvLruCacheInit(int numOfEntries) -+{ -+ int i; -+ MV_LRU_CACHE* pLruCache; -+ -+ pLruCache = mvOsMalloc(sizeof(MV_LRU_CACHE)); -+ if(pLruCache == NULL) -+ { -+ return NULL; -+ } -+ memset(pLruCache, 0, sizeof(MV_LRU_CACHE)); -+ -+ pLruCache->table = mvOsMalloc(numOfEntries*sizeof(MV_LRU_ENTRY)); -+ if(pLruCache->table == NULL) -+ { -+ mvOsFree(pLruCache); -+ return NULL; -+ } -+ memset(pLruCache->table, 0, numOfEntries*sizeof(MV_LRU_ENTRY)); -+ pLruCache->tableSize = numOfEntries; -+ -+ for(i=0; i<numOfEntries; i++) -+ { -+ pLruCache->table[i].next = i+1; -+ pLruCache->table[i].prev = i-1; -+ } -+ pLruCache->least = 0; -+ pLruCache->most = numOfEntries-1; -+ -+ return pLruCache; -+} -+ -+void mvLruCacheFinish(MV_LRU_CACHE* pLruCache) -+{ -+ mvOsFree(pLruCache->table); -+ mvOsFree(pLruCache); -+} -+ -+/* Update LRU cache database after using cache Index */ -+void mvLruCacheIdxUpdate(MV_LRU_CACHE* pLruHndl, int cacheIdx) -+{ -+ int prev, next; -+ -+ if(cacheIdx == pLruHndl->most) -+ return; -+ -+ next = pLruHndl->table[cacheIdx].next; -+ if(cacheIdx == pLruHndl->least) -+ { -+ pLruHndl->least = next; -+ } -+ else -+ { -+ prev = pLruHndl->table[cacheIdx].prev; -+ -+ pLruHndl->table[next].prev = prev; -+ pLruHndl->table[prev].next = next; -+ } -+ -+ pLruHndl->table[pLruHndl->most].next = cacheIdx; -+ pLruHndl->table[cacheIdx].prev = pLruHndl->most; -+ pLruHndl->most = cacheIdx; -+} -+ -+/* Delete LRU cache entry */ -+void mvLruCacheIdxDelete(MV_LRU_CACHE* pLruHndl, int cacheIdx) -+{ -+ int prev, next; -+ -+ if(cacheIdx == pLruHndl->least) -+ return; -+ -+ prev = pLruHndl->table[cacheIdx].prev; -+ if(cacheIdx == pLruHndl->most) -+ { -+ pLruHndl->most = prev; -+ } -+ else -+ { -+ next = pLruHndl->table[cacheIdx].next; -+ -+ pLruHndl->table[next].prev = prev; -+ pLruHndl->table[prev].next = next; -+ } -+ pLruHndl->table[pLruHndl->least].prev = cacheIdx; -+ pLruHndl->table[cacheIdx].next = pLruHndl->least; -+ pLruHndl->least = cacheIdx; -+} -diff --git a/crypto/ocf/kirkwood/cesa/mvLru.h b/crypto/ocf/kirkwood/cesa/mvLru.h -new file mode 100644 -index 0000000..39d2f89 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvLru.h -@@ -0,0 +1,112 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+/******************************************************************************* -+* mvLru.h - Header File for Least Recently Used Cache algorithm -+* -+* DESCRIPTION: -+* This header file contains macros typedefs and function declaration for -+* the Least Recently Used Cache algorithm. -+* -+*******************************************************************************/ -+ -+#ifndef __mvLru_h__ -+#define __mvLru_h__ -+ -+ -+typedef struct -+{ -+ int next; -+ int prev; -+} MV_LRU_ENTRY; -+ -+typedef struct -+{ -+ int least; -+ int most; -+ MV_LRU_ENTRY* table; -+ int tableSize; -+ -+}MV_LRU_CACHE; -+ -+ -+/* Find Cache index for replacement LRU */ -+static INLINE int mvLruCacheIdxFind(MV_LRU_CACHE* pLruHndl) -+{ -+ return pLruHndl->least; -+} -+ -+/* Init LRU cache module */ -+MV_LRU_CACHE* mvLruCacheInit(int numOfEntries); -+ -+/* Finish LRU cache module */ -+void mvLruCacheFinish(MV_LRU_CACHE* pLruHndl); -+ -+/* Update LRU cache database after using cache Index */ -+void mvLruCacheIdxUpdate(MV_LRU_CACHE* pLruHndl, int cacheIdx); -+ -+/* Delete LRU cache entry */ -+void mvLruCacheIdxDelete(MV_LRU_CACHE* pLruHndl, int cacheIdx); -+ -+ -+#endif /* __mvLru_h__ */ -diff --git a/crypto/ocf/kirkwood/cesa/mvMD5.c b/crypto/ocf/kirkwood/cesa/mvMD5.c -new file mode 100644 -index 0000000..b012976 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvMD5.c -@@ -0,0 +1,349 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvOs.h" -+#include "mvMD5.h" -+ -+static void mvMD5Transform(MV_U32 buf[4], MV_U32 const in[MV_MD5_MAC_LEN]); -+ -+#ifdef MV_CPU_LE -+#define mvByteReverse(buf, len) /* Nothing */ -+#else -+static void mvByteReverse(unsigned char *buf, unsigned longs); -+ -+/* -+ * Note: this code is harmless on little-endian machines. -+ */ -+static void mvByteReverse(unsigned char *buf, unsigned longs) -+{ -+ MV_U32 t; -+ -+ do -+ { -+ t = (MV_U32) ((unsigned) buf[3] << 8 | buf[2]) << 16 | -+ ((unsigned) buf[1] << 8 | buf[0]); -+ *(MV_U32 *) buf = t; -+ buf += 4; -+ } while (--longs); -+} -+#endif -+ -+/* -+ * Start MD5 accumulation. Set bit count to 0 and buffer to mysterious -+ * initialization constants. -+ */ -+void mvMD5Init(MV_MD5_CONTEXT *ctx) -+{ -+ ctx->buf[0] = 0x67452301; -+ ctx->buf[1] = 0xefcdab89; -+ ctx->buf[2] = 0x98badcfe; -+ ctx->buf[3] = 0x10325476; -+ -+ ctx->bits[0] = 0; -+ ctx->bits[1] = 0; -+} -+ -+/* -+ * Update context to reflect the concatenation of another buffer full -+ * of bytes. -+ */ -+void mvMD5Update(MV_MD5_CONTEXT *ctx, unsigned char const *buf, unsigned len) -+{ -+ MV_U32 t; -+ -+ /* Update bitcount */ -+ -+ t = ctx->bits[0]; -+ if ((ctx->bits[0] = t + ((MV_U32) len << 3)) < t) -+ ctx->bits[1]++; /* Carry from low to high */ -+ ctx->bits[1] += len >> 29; -+ -+ t = (t >> 3) & 0x3f; /* Bytes already in shsInfo->data */ -+ -+ /* Handle any leading odd-sized chunks */ -+ -+ if (t) -+ { -+ unsigned char *p = (unsigned char *) ctx->in + t; -+ -+ t = 64 - t; -+ if (len < t) -+ { -+ memcpy(p, buf, len); -+ return; -+ } -+ memcpy(p, buf, t); -+ mvByteReverse(ctx->in, MV_MD5_MAC_LEN); -+ mvMD5Transform(ctx->buf, (MV_U32 *) ctx->in); -+ buf += t; -+ len -= t; -+ } -+ /* Process data in 64-byte chunks */ -+ -+ while (len >= 64) -+ { -+ memcpy(ctx->in, buf, 64); -+ mvByteReverse(ctx->in, MV_MD5_MAC_LEN); -+ mvMD5Transform(ctx->buf, (MV_U32 *) ctx->in); -+ buf += 64; -+ len -= 64; -+ } -+ -+ /* Handle any remaining bytes of data. */ -+ -+ memcpy(ctx->in, buf, len); -+} -+ -+/* -+ * Final wrapup - pad to 64-byte boundary with the bit pattern -+ * 1 0* (64-bit count of bits processed, MSB-first) -+ */ -+void mvMD5Final(unsigned char digest[MV_MD5_MAC_LEN], MV_MD5_CONTEXT *ctx) -+{ -+ unsigned count; -+ unsigned char *p; -+ -+ /* Compute number of bytes mod 64 */ -+ count = (ctx->bits[0] >> 3) & 0x3F; -+ -+ /* Set the first char of padding to 0x80. This is safe since there is -+ always at least one byte free */ -+ p = ctx->in + count; -+ *p++ = 0x80; -+ -+ /* Bytes of padding needed to make 64 bytes */ -+ count = 64 - 1 - count; -+ -+ /* Pad out to 56 mod 64 */ -+ if (count < 8) -+ { -+ /* Two lots of padding: Pad the first block to 64 bytes */ -+ memset(p, 0, count); -+ mvByteReverse(ctx->in, MV_MD5_MAC_LEN); -+ mvMD5Transform(ctx->buf, (MV_U32 *) ctx->in); -+ -+ /* Now fill the next block with 56 bytes */ -+ memset(ctx->in, 0, 56); -+ } -+ else -+ { -+ /* Pad block to 56 bytes */ -+ memset(p, 0, count - 8); -+ } -+ mvByteReverse(ctx->in, 14); -+ -+ /* Append length in bits and transform */ -+ ((MV_U32 *) ctx->in)[14] = ctx->bits[0]; -+ ((MV_U32 *) ctx->in)[15] = ctx->bits[1]; -+ -+ mvMD5Transform(ctx->buf, (MV_U32 *) ctx->in); -+ mvByteReverse((unsigned char *) ctx->buf, 4); -+ memcpy(digest, ctx->buf, MV_MD5_MAC_LEN); -+ memset(ctx, 0, sizeof(ctx)); /* In case it's sensitive */ -+} -+ -+/* The four core functions - F1 is optimized somewhat */ -+ -+/* #define F1(x, y, z) (x & y | ~x & z) */ -+#define F1(x, y, z) (z ^ (x & (y ^ z))) -+#define F2(x, y, z) F1(z, x, y) -+#define F3(x, y, z) (x ^ y ^ z) -+#define F4(x, y, z) (y ^ (x | ~z)) -+ -+/* This is the central step in the MD5 algorithm. */ -+#define MD5STEP(f, w, x, y, z, data, s) \ -+ ( w += f(x, y, z) + data, w = w<<s | w>>(32-s), w += x ) -+ -+/* -+ * The core of the MD5 algorithm, this alters an existing MD5 hash to -+ * reflect the addition of 16 longwords of new data. MD5Update blocks -+ * the data and converts bytes into longwords for this routine. -+ */ -+static void mvMD5Transform(MV_U32 buf[4], MV_U32 const in[MV_MD5_MAC_LEN]) -+{ -+ register MV_U32 a, b, c, d; -+ -+ a = buf[0]; -+ b = buf[1]; -+ c = buf[2]; -+ d = buf[3]; -+ -+ MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7); -+ MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12); -+ MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17); -+ MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22); -+ MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7); -+ MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12); -+ MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17); -+ MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22); -+ MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7); -+ MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12); -+ MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17); -+ MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22); -+ MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7); -+ MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12); -+ MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17); -+ MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22); -+ -+ MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5); -+ MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9); -+ MD5STEP(F2, c, d, a, b, in[11] + 0x265e5a51, 14); -+ MD5STEP(F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20); -+ MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5); -+ MD5STEP(F2, d, a, b, c, in[10] + 0x02441453, 9); -+ MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14); -+ MD5STEP(F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20); -+ MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5); -+ MD5STEP(F2, d, a, b, c, in[14] + 0xc33707d6, 9); -+ MD5STEP(F2, c, d, a, b, in[3] + 0xf4d50d87, 14); -+ MD5STEP(F2, b, c, d, a, in[8] + 0x455a14ed, 20); -+ MD5STEP(F2, a, b, c, d, in[13] + 0xa9e3e905, 5); -+ MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9); -+ MD5STEP(F2, c, d, a, b, in[7] + 0x676f02d9, 14); -+ MD5STEP(F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20); -+ -+ MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4); -+ MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11); -+ MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16); -+ MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23); -+ MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4); -+ MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11); -+ MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16); -+ MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23); -+ MD5STEP(F3, a, b, c, d, in[13] + 0x289b7ec6, 4); -+ MD5STEP(F3, d, a, b, c, in[0] + 0xeaa127fa, 11); -+ MD5STEP(F3, c, d, a, b, in[3] + 0xd4ef3085, 16); -+ MD5STEP(F3, b, c, d, a, in[6] + 0x04881d05, 23); -+ MD5STEP(F3, a, b, c, d, in[9] + 0xd9d4d039, 4); -+ MD5STEP(F3, d, a, b, c, in[12] + 0xe6db99e5, 11); -+ MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16); -+ MD5STEP(F3, b, c, d, a, in[2] + 0xc4ac5665, 23); -+ -+ MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6); -+ MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10); -+ MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15); -+ MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21); -+ MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6); -+ MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10); -+ MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15); -+ MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21); -+ MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6); -+ MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10); -+ MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15); -+ MD5STEP(F4, b, c, d, a, in[13] + 0x4e0811a1, 21); -+ MD5STEP(F4, a, b, c, d, in[4] + 0xf7537e82, 6); -+ MD5STEP(F4, d, a, b, c, in[11] + 0xbd3af235, 10); -+ MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15); -+ MD5STEP(F4, b, c, d, a, in[9] + 0xeb86d391, 21); -+ -+ buf[0] += a; -+ buf[1] += b; -+ buf[2] += c; -+ buf[3] += d; -+} -+ -+void mvMD5(unsigned char const *buf, unsigned len, unsigned char* digest) -+{ -+ MV_MD5_CONTEXT ctx; -+ -+ mvMD5Init(&ctx); -+ mvMD5Update(&ctx, buf, len); -+ mvMD5Final(digest, &ctx); -+} -+ -+ -+void mvHmacMd5(unsigned char const* text, int text_len, -+ unsigned char const* key, int key_len, -+ unsigned char* digest) -+{ -+ int i; -+ MV_MD5_CONTEXT ctx; -+ unsigned char k_ipad[64+1]; /* inner padding - key XORd with ipad */ -+ unsigned char k_opad[64+1]; /* outer padding - key XORd with opad */ -+ -+ /* start out by storing key in pads */ -+ memset(k_ipad, 0, 64); -+ memcpy(k_ipad, key, key_len); -+ memset(k_opad, 0, 64); -+ memcpy(k_opad, key, key_len); -+ -+ /* XOR key with ipad and opad values */ -+ for (i=0; i<64; i++) -+ { -+ k_ipad[i] ^= 0x36; -+ k_opad[i] ^= 0x5c; -+ } -+ -+ /* perform inner MD5 */ -+ mvMD5Init(&ctx); /* init ctx for 1st pass */ -+ mvMD5Update(&ctx, k_ipad, 64); /* start with inner pad */ -+ mvMD5Update(&ctx, text, text_len); /* then text of datagram */ -+ mvMD5Final(digest, &ctx); /* finish up 1st pass */ -+ -+ /* perform outer MD5 */ -+ mvMD5Init(&ctx); /* init ctx for 2nd pass */ -+ mvMD5Update(&ctx, k_opad, 64); /* start with outer pad */ -+ mvMD5Update(&ctx, digest, 16); /* then results of 1st hash */ -+ mvMD5Final(digest, &ctx); /* finish up 2nd pass */ -+} -diff --git a/crypto/ocf/kirkwood/cesa/mvMD5.h b/crypto/ocf/kirkwood/cesa/mvMD5.h -new file mode 100644 -index 0000000..d20281e ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvMD5.h -@@ -0,0 +1,93 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __mvMD5_h__ -+#define __mvMD5_h__ -+ -+#include "mvMD5.h" -+ -+#define MV_MD5_MAC_LEN 16 -+ -+ -+typedef struct -+{ -+ MV_U32 buf[4]; -+ MV_U32 bits[2]; -+ MV_U8 in[64]; -+ -+} MV_MD5_CONTEXT; -+ -+void mvMD5Init(MV_MD5_CONTEXT *context); -+void mvMD5Update(MV_MD5_CONTEXT *context, unsigned char const *buf, -+ unsigned len); -+void mvMD5Final(unsigned char digest[16], MV_MD5_CONTEXT *context); -+ -+void mvMD5(unsigned char const *buf, unsigned len, unsigned char* digest); -+ -+void mvHmacMd5(unsigned char const* text, int text_len, -+ unsigned char const* key, int key_len, -+ unsigned char* digest); -+ -+ -+#endif /* __mvMD5_h__ */ -diff --git a/crypto/ocf/kirkwood/cesa/mvSHA1.c b/crypto/ocf/kirkwood/cesa/mvSHA1.c -new file mode 100644 -index 0000000..6342985 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvSHA1.c -@@ -0,0 +1,239 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvOs.h" -+#include "mvSHA1.h" -+ -+#define SHA1HANDSOFF -+ -+typedef union -+{ -+ MV_U8 c[64]; -+ MV_U32 l[16]; -+ -+} CHAR64LONG16; -+ -+static void mvSHA1Transform(MV_U32 state[5], const MV_U8 *buffer); -+ -+#define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) -+ -+ -+#ifdef MV_CPU_LE -+#define blk0(i) (block->l[i] = (rol(block->l[i], 24) & 0xFF00FF00) | \ -+ (rol(block->l[i], 8) & 0x00FF00FF)) -+#else -+#define blk0(i) block->l[i] -+#endif -+#define blk(i) (block->l[i & 15] = rol(block->l[(i + 13) & 15] ^ \ -+ block->l[(i + 8) & 15] ^ block->l[(i + 2) & 15] ^ block->l[i & 15], 1)) -+ -+/* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ -+#define R0(v,w,x,y,z,i) \ -+ z += ((w & (x ^ y)) ^ y) + blk0(i) + 0x5A827999 + rol(v, 5); \ -+ w = rol(w, 30); -+#define R1(v,w,x,y,z,i) \ -+ z += ((w & (x ^ y)) ^ y) + blk(i) + 0x5A827999 + rol(v, 5); \ -+ w = rol(w, 30); -+#define R2(v,w,x,y,z,i) \ -+ z += (w ^ x ^ y) + blk(i) + 0x6ED9EBA1 + rol(v, 5); w = rol(w, 30); -+#define R3(v,w,x,y,z,i) \ -+ z += (((w | x) & y) | (w & x)) + blk(i) + 0x8F1BBCDC + rol(v, 5); \ -+ w = rol(w, 30); -+#define R4(v,w,x,y,z,i) \ -+ z += (w ^ x ^ y) + blk(i) + 0xCA62C1D6 + rol(v, 5); \ -+ w=rol(w, 30); -+ -+/* Hash a single 512-bit block. This is the core of the algorithm. */ -+static void mvSHA1Transform(MV_U32 state[5], const MV_U8 *buffer) -+{ -+ MV_U32 a, b, c, d, e; -+ CHAR64LONG16* block; -+ -+#ifdef SHA1HANDSOFF -+ static MV_U32 workspace[16]; -+ -+ block = (CHAR64LONG16 *) workspace; -+ memcpy(block, buffer, 64); -+#else -+ block = (CHAR64LONG16 *) buffer; -+#endif -+ /* Copy context->state[] to working vars */ -+ a = state[0]; -+ b = state[1]; -+ c = state[2]; -+ d = state[3]; -+ e = state[4]; -+ /* 4 rounds of 20 operations each. Loop unrolled. */ -+ R0(a,b,c,d,e, 0); R0(e,a,b,c,d, 1); R0(d,e,a,b,c, 2); R0(c,d,e,a,b, 3); -+ R0(b,c,d,e,a, 4); R0(a,b,c,d,e, 5); R0(e,a,b,c,d, 6); R0(d,e,a,b,c, 7); -+ R0(c,d,e,a,b, 8); R0(b,c,d,e,a, 9); R0(a,b,c,d,e,10); R0(e,a,b,c,d,11); -+ R0(d,e,a,b,c,12); R0(c,d,e,a,b,13); R0(b,c,d,e,a,14); R0(a,b,c,d,e,15); -+ R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); -+ R2(a,b,c,d,e,20); R2(e,a,b,c,d,21); R2(d,e,a,b,c,22); R2(c,d,e,a,b,23); -+ R2(b,c,d,e,a,24); R2(a,b,c,d,e,25); R2(e,a,b,c,d,26); R2(d,e,a,b,c,27); -+ R2(c,d,e,a,b,28); R2(b,c,d,e,a,29); R2(a,b,c,d,e,30); R2(e,a,b,c,d,31); -+ R2(d,e,a,b,c,32); R2(c,d,e,a,b,33); R2(b,c,d,e,a,34); R2(a,b,c,d,e,35); -+ R2(e,a,b,c,d,36); R2(d,e,a,b,c,37); R2(c,d,e,a,b,38); R2(b,c,d,e,a,39); -+ R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43); -+ R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3(e,a,b,c,d,46); R3(d,e,a,b,c,47); -+ R3(c,d,e,a,b,48); R3(b,c,d,e,a,49); R3(a,b,c,d,e,50); R3(e,a,b,c,d,51); -+ R3(d,e,a,b,c,52); R3(c,d,e,a,b,53); R3(b,c,d,e,a,54); R3(a,b,c,d,e,55); -+ R3(e,a,b,c,d,56); R3(d,e,a,b,c,57); R3(c,d,e,a,b,58); R3(b,c,d,e,a,59); -+ R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); -+ R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); -+ R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); -+ R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); -+ R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); -+ /* Add the working vars back into context.state[] */ -+ state[0] += a; -+ state[1] += b; -+ state[2] += c; -+ state[3] += d; -+ state[4] += e; -+ /* Wipe variables */ -+ a = b = c = d = e = 0; -+} -+ -+void mvSHA1Init(MV_SHA1_CTX* context) -+{ -+ /* SHA1 initialization constants */ -+ context->state[0] = 0x67452301; -+ context->state[1] = 0xEFCDAB89; -+ context->state[2] = 0x98BADCFE; -+ context->state[3] = 0x10325476; -+ context->state[4] = 0xC3D2E1F0; -+ context->count[0] = context->count[1] = 0; -+} -+ -+ -+/* Run your data through this. */ -+void mvSHA1Update(MV_SHA1_CTX *context, MV_U8 const *data, -+ unsigned int len) -+{ -+ MV_U32 i, j; -+ -+ j = (context->count[0] >> 3) & 63; -+ if ((context->count[0] += len << 3) < (len << 3)) -+ context->count[1]++; -+ context->count[1] += (len >> 29); -+ if ((j + len) > 63) -+ { -+ memcpy(&context->buffer[j], data, (i = 64-j)); -+ mvSHA1Transform(context->state, context->buffer); -+ for ( ; i + 63 < len; i += 64) -+ { -+ mvSHA1Transform(context->state, &data[i]); -+ } -+ j = 0; -+ } -+ else -+ { -+ i = 0; -+ } -+ memcpy(&context->buffer[j], &data[i], len - i); -+} -+ -+void mvSHA1Final(MV_U8* digest, MV_SHA1_CTX* context) -+{ -+ MV_U32 i; -+ MV_U8 finalcount[8]; -+ -+ for (i = 0; i < 8; i++) -+ { -+ finalcount[i] = (unsigned char)((context->count[(i >= 4 ? 0 : 1)] >> -+ ((3-(i & 3)) * 8) ) & 255); /* Endian independent */ -+ } -+ mvSHA1Update(context, (const unsigned char *) "\200", 1); -+ while ((context->count[0] & 504) != 448) -+ { -+ mvSHA1Update(context, (const unsigned char *) "\0", 1); -+ } -+ mvSHA1Update(context, finalcount, 8); /* Should cause a mvSHA1Transform() -+ */ -+ for (i = 0; i < 20; i++) -+ { -+ digest[i] = (unsigned char) -+ ((context->state[i >> 2] >> ((3 - (i & 3)) * 8)) & 255); -+ } -+ /* Wipe variables */ -+ i = 0; -+ memset(context->buffer, 0, 64); -+ memset(context->state, 0, 20); -+ memset(context->count, 0, 8); -+ memset(finalcount, 0, 8); -+ -+#ifdef SHA1HANDSOFF /* make SHA1Transform overwrite it's own static vars */ -+ mvSHA1Transform(context->state, context->buffer); -+#endif -+} -+ -+ -+void mvSHA1(MV_U8 const *buf, unsigned int len, MV_U8* digest) -+{ -+ MV_SHA1_CTX ctx; -+ -+ mvSHA1Init(&ctx); -+ mvSHA1Update(&ctx, buf, len); -+ mvSHA1Final(digest, &ctx); -+} -diff --git a/crypto/ocf/kirkwood/cesa/mvSHA1.h b/crypto/ocf/kirkwood/cesa/mvSHA1.h -new file mode 100644 -index 0000000..1914f47 ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa/mvSHA1.h -@@ -0,0 +1,88 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __mvSHA1_h__ -+#define __mvSHA1_h__ -+ -+#include "mvSHA1.h" -+ -+#define MV_SHA1_MAC_LEN 20 -+ -+ -+typedef struct -+{ -+ MV_U32 state[5]; -+ MV_U32 count[2]; -+ MV_U8 buffer[64]; -+ -+} MV_SHA1_CTX; -+ -+void mvSHA1Init(MV_SHA1_CTX *context); -+void mvSHA1Update(MV_SHA1_CTX *context, MV_U8 const *buf, unsigned int len); -+void mvSHA1Final(MV_U8* digest, MV_SHA1_CTX *context); -+ -+void mvSHA1(MV_U8 const *buf, unsigned int len, MV_U8* digest); -+ -+ -+#endif /* __mvSHA1_h__ */ -diff --git a/crypto/ocf/kirkwood/cesa_ocf_drv.c b/crypto/ocf/kirkwood/cesa_ocf_drv.c -new file mode 100644 -index 0000000..c056b1f ---- /dev/null -+++ b/crypto/ocf/kirkwood/cesa_ocf_drv.c -@@ -0,0 +1,1296 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+*******************************************************************************/ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/sched.h> -+#include <linux/wait.h> -+#include <linux/crypto.h> -+#include <linux/mm.h> -+#include <linux/skbuff.h> -+#include <linux/random.h> -+#include <linux/platform_device.h> -+#include <asm/scatterlist.h> -+#include <linux/spinlock.h> -+#include "ctrlEnv/sys/mvSysCesa.h" -+#include "cesa/mvCesa.h" /* moved here before cryptodev.h due to include dependencies */ -+#include <cryptodev.h> -+#include <uio.h> -+#include <plat/mv_cesa.h> -+#include <linux/mbus.h> -+#include "mvDebug.h" -+ -+#include "cesa/mvMD5.h" -+#include "cesa/mvSHA1.h" -+ -+#include "cesa/mvCesaRegs.h" -+#include "cesa/AES/mvAes.h" -+#include "cesa/mvLru.h" -+ -+#undef RT_DEBUG -+#ifdef RT_DEBUG -+static int debug = 1; -+module_param(debug, int, 1); -+MODULE_PARM_DESC(debug, "Enable debug"); -+#undef dprintk -+#define dprintk(a...) if (debug) { printk(a); } else -+#else -+static int debug = 0; -+#undef dprintk -+#define dprintk(a...) -+#endif -+ -+ -+/* TDMA Regs */ -+#define WINDOW_BASE(i) 0xA00 + (i << 3) -+#define WINDOW_CTRL(i) 0xA04 + (i << 3) -+ -+/* interrupt handling */ -+#undef CESA_OCF_POLLING -+#undef CESA_OCF_TASKLET -+ -+#if defined(CESA_OCF_POLLING) && defined(CESA_OCF_TASKLET) -+#error "don't use both tasklet and polling mode" -+#endif -+ -+extern int cesaReqResources; -+/* support for spliting action into 2 actions */ -+#define CESA_OCF_SPLIT -+ -+/* general defines */ -+#define CESA_OCF_MAX_SES 128 -+#define CESA_Q_SIZE 64 -+ -+ -+/* data structures */ -+struct cesa_ocf_data { -+ int cipher_alg; -+ int auth_alg; -+ int encrypt_tn_auth; -+#define auth_tn_decrypt encrypt_tn_auth -+ int ivlen; -+ int digestlen; -+ short sid_encrypt; -+ short sid_decrypt; -+ /* fragment workaround sessions */ -+ short frag_wa_encrypt; -+ short frag_wa_decrypt; -+ short frag_wa_auth; -+}; -+ -+/* CESA device data */ -+struct cesa_dev { -+ void __iomem *sram; -+ void __iomem *reg; -+ struct mv_cesa_platform_data *plat_data; -+ int irq; -+}; -+ -+#define DIGEST_BUF_SIZE 32 -+struct cesa_ocf_process { -+ MV_CESA_COMMAND cesa_cmd; -+ MV_CESA_MBUF cesa_mbuf; -+ MV_BUF_INFO cesa_bufs[MV_CESA_MAX_MBUF_FRAGS]; -+ char digest[DIGEST_BUF_SIZE]; -+ int digest_len; -+ struct cryptop *crp; -+ int need_cb; -+}; -+ -+/* global variables */ -+static int32_t cesa_ocf_id = -1; -+static struct cesa_ocf_data *cesa_ocf_sessions[CESA_OCF_MAX_SES]; -+static spinlock_t cesa_lock; -+static struct cesa_dev cesa_device; -+ -+/* static APIs */ -+static int cesa_ocf_process (device_t, struct cryptop *, int); -+static int cesa_ocf_newsession (device_t, u_int32_t *, struct cryptoini *); -+static int cesa_ocf_freesession (device_t, u_int64_t); -+static void cesa_callback (unsigned long); -+static irqreturn_t cesa_interrupt_handler (int, void *); -+#ifdef CESA_OCF_POLLING -+static void cesa_interrupt_polling(void); -+#endif -+#ifdef CESA_OCF_TASKLET -+static struct tasklet_struct cesa_ocf_tasklet; -+#endif -+ -+static struct timeval tt_start; -+static struct timeval tt_end; -+ -+/* -+ * dummy device structure -+ */ -+ -+static struct { -+ softc_device_decl sc_dev; -+} mv_cesa_dev; -+ -+static device_method_t mv_cesa_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, cesa_ocf_newsession), -+ DEVMETHOD(cryptodev_freesession,cesa_ocf_freesession), -+ DEVMETHOD(cryptodev_process, cesa_ocf_process), -+ DEVMETHOD(cryptodev_kprocess, NULL), -+}; -+ -+ -+ -+/* Add debug Trace */ -+#undef CESA_OCF_TRACE_DEBUG -+#ifdef CESA_OCF_TRACE_DEBUG -+ -+#define MV_CESA_USE_TIMER_ID 0 -+ -+typedef struct -+{ -+ int type; /* 0 - isrEmpty, 1 - cesaReadyGet, 2 - cesaAction */ -+ MV_U32 timeStamp; -+ MV_U32 cause; -+ MV_U32 realCause; -+ MV_U32 dmaCause; -+ int resources; -+ MV_CESA_REQ* pReqReady; -+ MV_CESA_REQ* pReqEmpty; -+ MV_CESA_REQ* pReqProcess; -+} MV_CESA_TEST_TRACE; -+ -+#define MV_CESA_TEST_TRACE_SIZE 50 -+ -+static int cesaTestTraceIdx = 0; -+static MV_CESA_TEST_TRACE cesaTestTrace[MV_CESA_TEST_TRACE_SIZE]; -+ -+static void cesaTestTraceAdd(int type) -+{ -+ cesaTestTrace[cesaTestTraceIdx].type = type; -+ cesaTestTrace[cesaTestTraceIdx].realCause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG); -+ //cesaTestTrace[cesaTestTraceIdx].idmaCause = MV_REG_READ(IDMA_CAUSE_REG); -+ cesaTestTrace[cesaTestTraceIdx].resources = cesaReqResources; -+ cesaTestTrace[cesaTestTraceIdx].pReqReady = pCesaReqReady; -+ cesaTestTrace[cesaTestTraceIdx].pReqEmpty = pCesaReqEmpty; -+ cesaTestTrace[cesaTestTraceIdx].pReqProcess = pCesaReqProcess; -+ cesaTestTrace[cesaTestTraceIdx].timeStamp = mvCntmrRead(MV_CESA_USE_TIMER_ID); -+ cesaTestTraceIdx++; -+ if(cesaTestTraceIdx == MV_CESA_TEST_TRACE_SIZE) -+ cesaTestTraceIdx = 0; -+} -+ -+#else /* CESA_OCF_TRACE_DEBUG */ -+ -+#define cesaTestTraceAdd(x) -+ -+#endif /* CESA_OCF_TRACE_DEBUG */ -+ -+unsigned int -+get_usec(unsigned int start) -+{ -+ if(start) { -+ do_gettimeofday (&tt_start); -+ return 0; -+ } -+ else { -+ do_gettimeofday (&tt_end); -+ tt_end.tv_sec -= tt_start.tv_sec; -+ tt_end.tv_usec -= tt_start.tv_usec; -+ if (tt_end.tv_usec < 0) { -+ tt_end.tv_usec += 1000 * 1000; -+ tt_end.tv_sec -= 1; -+ } -+ } -+ printk("time taken is %d\n", (unsigned int)(tt_end.tv_usec + tt_end.tv_sec * 1000000)); -+ return (tt_end.tv_usec + tt_end.tv_sec * 1000000); -+} -+ -+#ifdef RT_DEBUG -+/* -+ * check that the crp action match the current session -+ */ -+static int -+ocf_check_action(struct cryptop *crp, struct cesa_ocf_data *cesa_ocf_cur_ses) { -+ int count = 0; -+ int encrypt = 0, decrypt = 0, auth = 0; -+ struct cryptodesc *crd; -+ -+ /* Go through crypto descriptors, processing as we go */ -+ for (crd = crp->crp_desc; crd; crd = crd->crd_next, count++) { -+ if(count > 2) { -+ printk("%s,%d: session mode is not supported.\n", __FILE__, __LINE__); -+ return 1; -+ } -+ -+ /* Encryption /Decryption */ -+ if(crd->crd_alg == cesa_ocf_cur_ses->cipher_alg) { -+ /* check that the action is compatible with session */ -+ if(encrypt || decrypt) { -+ printk("%s,%d: session mode is not supported.\n", __FILE__, __LINE__); -+ return 1; -+ } -+ -+ if(crd->crd_flags & CRD_F_ENCRYPT) { /* encrypt */ -+ if( (count == 2) && (cesa_ocf_cur_ses->encrypt_tn_auth) ) { -+ printk("%s,%d: sequence isn't supported by this session.\n", __FILE__, __LINE__); -+ return 1; -+ } -+ encrypt++; -+ } -+ else { /* decrypt */ -+ if( (count == 2) && !(cesa_ocf_cur_ses->auth_tn_decrypt) ) { -+ printk("%s,%d: sequence isn't supported by this session.\n", __FILE__, __LINE__); -+ return 1; -+ } -+ decrypt++; -+ } -+ -+ } -+ /* Authentication */ -+ else if(crd->crd_alg == cesa_ocf_cur_ses->auth_alg) { -+ /* check that the action is compatible with session */ -+ if(auth) { -+ printk("%s,%d: session mode is not supported.\n", __FILE__, __LINE__); -+ return 1; -+ } -+ if( (count == 2) && (decrypt) && (cesa_ocf_cur_ses->auth_tn_decrypt)) { -+ printk("%s,%d: sequence isn't supported by this session.\n", __FILE__, __LINE__); -+ return 1; -+ } -+ if( (count == 2) && (encrypt) && !(cesa_ocf_cur_ses->encrypt_tn_auth)) { -+ printk("%s,%d: sequence isn't supported by this session.\n", __FILE__, __LINE__); -+ return 1; -+ } -+ auth++; -+ } -+ else { -+ printk("%s,%d: Alg isn't supported by this session.\n", __FILE__, __LINE__); -+ return 1; -+ } -+ } -+ return 0; -+ -+} -+#endif -+ -+/* -+ * Process a request. -+ */ -+static int -+cesa_ocf_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ struct cesa_ocf_process *cesa_ocf_cmd = NULL; -+ struct cesa_ocf_process *cesa_ocf_cmd_wa = NULL; -+ MV_CESA_COMMAND *cesa_cmd; -+ struct cryptodesc *crd; -+ struct cesa_ocf_data *cesa_ocf_cur_ses; -+ int sid = 0, temp_len = 0, i; -+ int encrypt = 0, decrypt = 0, auth = 0; -+ int status; -+ struct sk_buff *skb = NULL; -+ struct uio *uiop = NULL; -+ unsigned char *ivp; -+ MV_BUF_INFO *p_buf_info; -+ MV_CESA_MBUF *p_mbuf_info; -+ unsigned long flags; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ if( cesaReqResources <= 1 ) { -+ dprintk("%s,%d: ERESTART\n", __FILE__, __LINE__); -+ return ERESTART; -+ } -+ -+#ifdef RT_DEBUG -+ /* Sanity check */ -+ if (crp == NULL) { -+ printk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ if (crp->crp_desc == NULL || crp->crp_buf == NULL ) { -+ printk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ crp->crp_etype = EINVAL; -+ return EINVAL; -+ } -+ -+ sid = crp->crp_sid & 0xffffffff; -+ if ((sid >= CESA_OCF_MAX_SES) || (cesa_ocf_sessions[sid] == NULL)) { -+ crp->crp_etype = ENOENT; -+ printk("%s,%d: ENOENT session %d \n", __FILE__, __LINE__, sid); -+ return EINVAL; -+ } -+#endif -+ -+ sid = crp->crp_sid & 0xffffffff; -+ crp->crp_etype = 0; -+ cesa_ocf_cur_ses = cesa_ocf_sessions[sid]; -+ -+#ifdef RT_DEBUG -+ if(ocf_check_action(crp, cesa_ocf_cur_ses)){ -+ goto p_error; -+ } -+#endif -+ -+ /* malloc a new cesa process */ -+ cesa_ocf_cmd = kmalloc(sizeof(struct cesa_ocf_process), GFP_ATOMIC); -+ -+ if (cesa_ocf_cmd == NULL) { -+ printk("%s,%d: ENOBUFS \n", __FILE__, __LINE__); -+ goto p_error; -+ } -+ memset(cesa_ocf_cmd, 0, sizeof(struct cesa_ocf_process)); -+ -+ /* init cesa_process */ -+ cesa_ocf_cmd->crp = crp; -+ /* always call callback */ -+ cesa_ocf_cmd->need_cb = 1; -+ -+ /* init cesa_cmd for usage of the HALs */ -+ cesa_cmd = &cesa_ocf_cmd->cesa_cmd; -+ cesa_cmd->pReqPrv = (void *)cesa_ocf_cmd; -+ cesa_cmd->sessionId = cesa_ocf_cur_ses->sid_encrypt; /* defualt use encrypt */ -+ -+ /* prepare src buffer */ -+ /* we send the entire buffer to the HAL, even if only part of it should be encrypt/auth. */ -+ /* if not using seesions for both encrypt and auth, then it will be wiser to to copy only */ -+ /* from skip to crd_len. */ -+ p_buf_info = cesa_ocf_cmd->cesa_bufs; -+ p_mbuf_info = &cesa_ocf_cmd->cesa_mbuf; -+ -+ p_buf_info += 2; /* save 2 first buffers for IV and digest - -+ we won't append them to the end since, they -+ might be places in an unaligned addresses. */ -+ -+ p_mbuf_info->pFrags = p_buf_info; -+ temp_len = 0; -+ -+ /* handle SKB */ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ -+ dprintk("%s,%d: handle SKB.\n", __FILE__, __LINE__); -+ skb = (struct sk_buff *) crp->crp_buf; -+ -+ if (skb_shinfo(skb)->nr_frags >= (MV_CESA_MAX_MBUF_FRAGS - 1)) { -+ printk("%s,%d: %d nr_frags > MV_CESA_MAX_MBUF_FRAGS", __FILE__, __LINE__, skb_shinfo(skb)->nr_frags); -+ goto p_error; -+ } -+ -+ p_mbuf_info->mbufSize = skb->len; -+ temp_len = skb->len; -+ /* first skb fragment */ -+ p_buf_info->bufSize = skb_headlen(skb); -+ p_buf_info->bufVirtPtr = skb->data; -+ p_buf_info++; -+ -+ /* now handle all other skb fragments */ -+ for ( i = 0; i < skb_shinfo(skb)->nr_frags; i++ ) { -+ skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; -+ p_buf_info->bufSize = frag->size; -+ p_buf_info->bufVirtPtr = page_address(frag->page) + frag->page_offset; -+ p_buf_info++; -+ } -+ p_mbuf_info->numFrags = skb_shinfo(skb)->nr_frags + 1; -+ } -+ /* handle UIO */ -+ else if(crp->crp_flags & CRYPTO_F_IOV) { -+ -+ dprintk("%s,%d: handle UIO.\n", __FILE__, __LINE__); -+ uiop = (struct uio *) crp->crp_buf; -+ -+ if (uiop->uio_iovcnt > (MV_CESA_MAX_MBUF_FRAGS - 1)) { -+ printk("%s,%d: %d uio_iovcnt > MV_CESA_MAX_MBUF_FRAGS \n", __FILE__, __LINE__, uiop->uio_iovcnt); -+ goto p_error; -+ } -+ -+ p_mbuf_info->mbufSize = crp->crp_ilen; -+ p_mbuf_info->numFrags = uiop->uio_iovcnt; -+ for(i = 0; i < uiop->uio_iovcnt; i++) { -+ p_buf_info->bufVirtPtr = uiop->uio_iov[i].iov_base; -+ p_buf_info->bufSize = uiop->uio_iov[i].iov_len; -+ temp_len += p_buf_info->bufSize; -+ dprintk("%s,%d: buf %x-> addr %x, size %x \n" -+ , __FILE__, __LINE__, i, (unsigned int)p_buf_info->bufVirtPtr, p_buf_info->bufSize); -+ p_buf_info++; -+ } -+ -+ } -+ /* handle CONTIG */ -+ else { -+ dprintk("%s,%d: handle CONTIG.\n", __FILE__, __LINE__); -+ p_mbuf_info->numFrags = 1; -+ p_mbuf_info->mbufSize = crp->crp_ilen; -+ p_buf_info->bufVirtPtr = crp->crp_buf; -+ p_buf_info->bufSize = crp->crp_ilen; -+ temp_len = crp->crp_ilen; -+ p_buf_info++; -+ } -+ -+ /* Support up to 64K why? cause! */ -+ if(crp->crp_ilen > 64*1024) { -+ printk("%s,%d: buf too big %x \n", __FILE__, __LINE__, crp->crp_ilen); -+ goto p_error; -+ } -+ -+ if( temp_len != crp->crp_ilen ) { -+ printk("%s,%d: warning size don't match.(%x %x) \n", __FILE__, __LINE__, temp_len, crp->crp_ilen); -+ } -+ -+ cesa_cmd->pSrc = p_mbuf_info; -+ cesa_cmd->pDst = p_mbuf_info; -+ -+ /* restore p_buf_info to point to first available buf */ -+ p_buf_info = cesa_ocf_cmd->cesa_bufs; -+ p_buf_info += 1; -+ -+ -+ /* Go through crypto descriptors, processing as we go */ -+ for (crd = crp->crp_desc; crd; crd = crd->crd_next) { -+ -+ /* Encryption /Decryption */ -+ if(crd->crd_alg == cesa_ocf_cur_ses->cipher_alg) { -+ -+ dprintk("%s,%d: cipher", __FILE__, __LINE__); -+ -+ cesa_cmd->cryptoOffset = crd->crd_skip; -+ cesa_cmd->cryptoLength = crd->crd_len; -+ -+ if(crd->crd_flags & CRD_F_ENCRYPT) { /* encrypt */ -+ dprintk(" encrypt \n"); -+ encrypt++; -+ -+ /* handle IV */ -+ if (crd->crd_flags & CRD_F_IV_EXPLICIT) { /* IV from USER */ -+ dprintk("%s,%d: IV from USER (offset %x) \n", __FILE__, __LINE__, crd->crd_inject); -+ cesa_cmd->ivFromUser = 1; -+ ivp = crd->crd_iv; -+ -+ /* -+ * do we have to copy the IV back to the buffer ? -+ */ -+ if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) { -+ dprintk("%s,%d: copy the IV back to the buffer\n", __FILE__, __LINE__); -+ cesa_cmd->ivOffset = crd->crd_inject; -+ crypto_copy_bits_back(crp->crp_buf, crd->crd_inject, ivp, cesa_ocf_cur_ses->ivlen); -+ } -+ else { -+ dprintk("%s,%d: don't copy the IV back to the buffer \n", __FILE__, __LINE__); -+ p_mbuf_info->numFrags++; -+ p_mbuf_info->mbufSize += cesa_ocf_cur_ses->ivlen; -+ p_mbuf_info->pFrags = p_buf_info; -+ -+ p_buf_info->bufVirtPtr = ivp; -+ p_buf_info->bufSize = cesa_ocf_cur_ses->ivlen; -+ p_buf_info--; -+ -+ /* offsets */ -+ cesa_cmd->ivOffset = 0; -+ cesa_cmd->cryptoOffset += cesa_ocf_cur_ses->ivlen; -+ if(auth) { -+ cesa_cmd->macOffset += cesa_ocf_cur_ses->ivlen; -+ cesa_cmd->digestOffset += cesa_ocf_cur_ses->ivlen; -+ } -+ } -+ } -+ else { /* random IV */ -+ dprintk("%s,%d: random IV \n", __FILE__, __LINE__); -+ cesa_cmd->ivFromUser = 0; -+ -+ /* -+ * do we have to copy the IV back to the buffer ? -+ */ -+ /* in this mode the HAL will always copy the IV */ -+ /* given by the session to the ivOffset */ -+ if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) { -+ cesa_cmd->ivOffset = crd->crd_inject; -+ } -+ else { -+ /* if IV isn't copy, then how will the user know which IV did we use??? */ -+ printk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ goto p_error; -+ } -+ } -+ } -+ else { /* decrypt */ -+ dprintk(" decrypt \n"); -+ decrypt++; -+ cesa_cmd->sessionId = cesa_ocf_cur_ses->sid_decrypt; -+ -+ /* handle IV */ -+ if (crd->crd_flags & CRD_F_IV_EXPLICIT) { -+ dprintk("%s,%d: IV from USER \n", __FILE__, __LINE__); -+ /* append the IV buf to the mbuf */ -+ cesa_cmd->ivFromUser = 1; -+ p_mbuf_info->numFrags++; -+ p_mbuf_info->mbufSize += cesa_ocf_cur_ses->ivlen; -+ p_mbuf_info->pFrags = p_buf_info; -+ -+ p_buf_info->bufVirtPtr = crd->crd_iv; -+ p_buf_info->bufSize = cesa_ocf_cur_ses->ivlen; -+ p_buf_info--; -+ -+ /* offsets */ -+ cesa_cmd->ivOffset = 0; -+ cesa_cmd->cryptoOffset += cesa_ocf_cur_ses->ivlen; -+ if(auth) { -+ cesa_cmd->macOffset += cesa_ocf_cur_ses->ivlen; -+ cesa_cmd->digestOffset += cesa_ocf_cur_ses->ivlen; -+ } -+ } -+ else { -+ dprintk("%s,%d: IV inside the buffer \n", __FILE__, __LINE__); -+ cesa_cmd->ivFromUser = 0; -+ cesa_cmd->ivOffset = crd->crd_inject; -+ } -+ } -+ -+ } -+ /* Authentication */ -+ else if(crd->crd_alg == cesa_ocf_cur_ses->auth_alg) { -+ dprintk("%s,%d: Authentication \n", __FILE__, __LINE__); -+ auth++; -+ cesa_cmd->macOffset = crd->crd_skip; -+ cesa_cmd->macLength = crd->crd_len; -+ -+ /* digest + mac */ -+ cesa_cmd->digestOffset = crd->crd_inject; -+ } -+ else { -+ printk("%s,%d: Alg isn't supported by this session.\n", __FILE__, __LINE__); -+ goto p_error; -+ } -+ } -+ -+ dprintk("\n"); -+ dprintk("%s,%d: Sending Action: \n", __FILE__, __LINE__); -+ dprintk("%s,%d: IV from user: %d. IV offset %x \n", __FILE__, __LINE__, cesa_cmd->ivFromUser, cesa_cmd->ivOffset); -+ dprintk("%s,%d: crypt offset %x len %x \n", __FILE__, __LINE__, cesa_cmd->cryptoOffset, cesa_cmd->cryptoLength); -+ dprintk("%s,%d: Auth offset %x len %x \n", __FILE__, __LINE__, cesa_cmd->macOffset, cesa_cmd->macLength); -+ dprintk("%s,%d: set digest in offset %x . \n", __FILE__, __LINE__, cesa_cmd->digestOffset); -+ if(debug) { -+ mvCesaDebugMbuf("SRC BUFFER", cesa_cmd->pSrc, 0, cesa_cmd->pSrc->mbufSize); -+ } -+ -+ -+ /* send action to HAL */ -+ spin_lock_irqsave(&cesa_lock, flags); -+ status = mvCesaAction(cesa_cmd); -+ spin_unlock_irqrestore(&cesa_lock, flags); -+ -+ /* action not allowed */ -+ if(status == MV_NOT_ALLOWED) { -+#ifdef CESA_OCF_SPLIT -+ /* if both encrypt and auth try to split */ -+ if(auth && (encrypt || decrypt)) { -+ MV_CESA_COMMAND *cesa_cmd_wa; -+ -+ /* malloc a new cesa process and init it */ -+ cesa_ocf_cmd_wa = kmalloc(sizeof(struct cesa_ocf_process), GFP_ATOMIC); -+ -+ if (cesa_ocf_cmd_wa == NULL) { -+ printk("%s,%d: ENOBUFS \n", __FILE__, __LINE__); -+ goto p_error; -+ } -+ memcpy(cesa_ocf_cmd_wa, cesa_ocf_cmd, sizeof(struct cesa_ocf_process)); -+ cesa_cmd_wa = &cesa_ocf_cmd_wa->cesa_cmd; -+ cesa_cmd_wa->pReqPrv = (void *)cesa_ocf_cmd_wa; -+ cesa_ocf_cmd_wa->need_cb = 0; -+ -+ /* break requests to two operation, first operation completion won't call callback */ -+ if((decrypt) && (cesa_ocf_cur_ses->auth_tn_decrypt)) { -+ cesa_cmd_wa->sessionId = cesa_ocf_cur_ses->frag_wa_auth; -+ cesa_cmd->sessionId = cesa_ocf_cur_ses->frag_wa_decrypt; -+ } -+ else if((decrypt) && !(cesa_ocf_cur_ses->auth_tn_decrypt)) { -+ cesa_cmd_wa->sessionId = cesa_ocf_cur_ses->frag_wa_decrypt; -+ cesa_cmd->sessionId = cesa_ocf_cur_ses->frag_wa_auth; -+ } -+ else if((encrypt) && (cesa_ocf_cur_ses->encrypt_tn_auth)) { -+ cesa_cmd_wa->sessionId = cesa_ocf_cur_ses->frag_wa_encrypt; -+ cesa_cmd->sessionId = cesa_ocf_cur_ses->frag_wa_auth; -+ } -+ else if((encrypt) && !(cesa_ocf_cur_ses->encrypt_tn_auth)){ -+ cesa_cmd_wa->sessionId = cesa_ocf_cur_ses->frag_wa_auth; -+ cesa_cmd->sessionId = cesa_ocf_cur_ses->frag_wa_encrypt; -+ } -+ else { -+ printk("%s,%d: Unsupporterd fragment wa mode \n", __FILE__, __LINE__); -+ goto p_error; -+ } -+ -+ /* send the 2 actions to the HAL */ -+ spin_lock_irqsave(&cesa_lock, flags); -+ status = mvCesaAction(cesa_cmd_wa); -+ spin_unlock_irqrestore(&cesa_lock, flags); -+ -+ if((status != MV_NO_MORE) && (status != MV_OK)) { -+ printk("%s,%d: cesa action failed, status = 0x%x\n", __FILE__, __LINE__, status); -+ goto p_error; -+ } -+ spin_lock_irqsave(&cesa_lock, flags); -+ status = mvCesaAction(cesa_cmd); -+ spin_unlock_irqrestore(&cesa_lock, flags); -+ -+ } -+ /* action not allowed and can't split */ -+ else -+#endif -+ { -+ goto p_error; -+ } -+ } -+ -+ /* Hal Q is full, send again. This should never happen */ -+ if(status == MV_NO_RESOURCE) { -+ printk("%s,%d: cesa no more resources \n", __FILE__, __LINE__); -+ if(cesa_ocf_cmd) -+ kfree(cesa_ocf_cmd); -+ if(cesa_ocf_cmd_wa) -+ kfree(cesa_ocf_cmd_wa); -+ return ERESTART; -+ } -+ else if((status != MV_NO_MORE) && (status != MV_OK)) { -+ printk("%s,%d: cesa action failed, status = 0x%x\n", __FILE__, __LINE__, status); -+ goto p_error; -+ } -+ -+ -+#ifdef CESA_OCF_POLLING -+ cesa_interrupt_polling(); -+#endif -+ cesaTestTraceAdd(5); -+ -+ return 0; -+p_error: -+ crp->crp_etype = EINVAL; -+ if(cesa_ocf_cmd) -+ kfree(cesa_ocf_cmd); -+ if(cesa_ocf_cmd_wa) -+ kfree(cesa_ocf_cmd_wa); -+ return EINVAL; -+} -+ -+/* -+ * cesa callback. -+ */ -+static void -+cesa_callback(unsigned long dummy) -+{ -+ struct cesa_ocf_process *cesa_ocf_cmd = NULL; -+ struct cryptop *crp = NULL; -+ MV_CESA_RESULT result[MV_CESA_MAX_CHAN]; -+ int res_idx = 0,i; -+ MV_STATUS status; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+#ifdef CESA_OCF_TASKLET -+ disable_irq(cesa_device.irq); -+#endif -+ while(MV_TRUE) { -+ -+ /* Get Ready requests */ -+ spin_lock(&cesa_lock); -+ status = mvCesaReadyGet(&result[res_idx]); -+ spin_unlock(&cesa_lock); -+ -+ cesaTestTraceAdd(2); -+ -+ if(status != MV_OK) { -+#ifdef CESA_OCF_POLLING -+ if(status == MV_BUSY) { /* Fragment */ -+ cesa_interrupt_polling(); -+ return; -+ } -+#endif -+ break; -+ } -+ res_idx++; -+ break; -+ } -+ -+ for(i = 0; i < res_idx; i++) { -+ -+ if(!result[i].pReqPrv) { -+ printk("%s,%d: warning private is NULL\n", __FILE__, __LINE__); -+ break; -+ } -+ -+ cesa_ocf_cmd = result[i].pReqPrv; -+ crp = cesa_ocf_cmd->crp; -+ -+ // ignore HMAC error. -+ //if(result->retCode) -+ // crp->crp_etype = EIO; -+ -+#if defined(CESA_OCF_POLLING) -+ if(!cesa_ocf_cmd->need_cb){ -+ cesa_interrupt_polling(); -+ } -+#endif -+ if(cesa_ocf_cmd->need_cb) { -+ if(debug) { -+ mvCesaDebugMbuf("DST BUFFER", cesa_ocf_cmd->cesa_cmd.pDst, 0, cesa_ocf_cmd->cesa_cmd.pDst->mbufSize); -+ } -+ crypto_done(crp); -+ } -+ kfree(cesa_ocf_cmd); -+ } -+#ifdef CESA_OCF_TASKLET -+ enable_irq(cesa_device.irq); -+#endif -+ -+ cesaTestTraceAdd(3); -+ -+ return; -+} -+ -+#ifdef CESA_OCF_POLLING -+static void -+cesa_interrupt_polling(void) -+{ -+ u32 cause; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ /* Read cause register */ -+ do { -+ cause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG); -+ cause &= MV_CESA_CAUSE_ACC_DMA_ALL_MASK; -+ -+ } while (cause == 0); -+ -+ /* clear interrupts */ -+ MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0); -+ -+ cesa_callback(0); -+ -+ return; -+} -+ -+#endif -+ -+/* -+ * cesa Interrupt polling routine. -+ */ -+static irqreturn_t -+cesa_interrupt_handler(int irq, void *arg) -+{ -+ u32 cause; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ cesaTestTraceAdd(0); -+ -+ /* Read cause register */ -+ cause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG); -+ -+ if( (cause & MV_CESA_CAUSE_ACC_DMA_ALL_MASK) == 0) -+ { -+ /* Empty interrupt */ -+ dprintk("%s,%d: cesaTestReadyIsr: cause=0x%x\n", __FILE__, __LINE__, cause); -+ return IRQ_HANDLED; -+ } -+ -+ /* clear interrupts */ -+ MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0); -+ -+ cesaTestTraceAdd(1); -+#ifdef CESA_OCF_TASKLET -+ tasklet_hi_schedule(&cesa_ocf_tasklet); -+#else -+ cesa_callback(0); -+#endif -+ return IRQ_HANDLED; -+} -+ -+/* -+ * Open a session. -+ */ -+static int -+/*cesa_ocf_newsession(void *arg, u_int32_t *sid, struct cryptoini *cri)*/ -+cesa_ocf_newsession(device_t dev, u_int32_t *sid, struct cryptoini *cri) -+{ -+ u32 status = 0, i; -+ u32 count = 0, auth = 0, encrypt =0; -+ struct cesa_ocf_data *cesa_ocf_cur_ses; -+ MV_CESA_OPEN_SESSION cesa_session; -+ MV_CESA_OPEN_SESSION *cesa_ses = &cesa_session; -+ -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid == NULL || cri == NULL) { -+ printk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ /* leave first empty like in other implementations */ -+ for (i = 1; i < CESA_OCF_MAX_SES; i++) { -+ if (cesa_ocf_sessions[i] == NULL) -+ break; -+ } -+ -+ if(i >= CESA_OCF_MAX_SES) { -+ printk("%s,%d: no more sessions \n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ cesa_ocf_sessions[i] = (struct cesa_ocf_data *) kmalloc(sizeof(struct cesa_ocf_data), GFP_ATOMIC); -+ if (cesa_ocf_sessions[i] == NULL) { -+ cesa_ocf_freesession(NULL, i); -+ printk("%s,%d: ENOBUFS \n", __FILE__, __LINE__); -+ return ENOBUFS; -+ } -+ dprintk("%s,%d: new session %d \n", __FILE__, __LINE__, i); -+ -+ *sid = i; -+ cesa_ocf_cur_ses = cesa_ocf_sessions[i]; -+ memset(cesa_ocf_cur_ses, 0, sizeof(struct cesa_ocf_data)); -+ cesa_ocf_cur_ses->sid_encrypt = -1; -+ cesa_ocf_cur_ses->sid_decrypt = -1; -+ cesa_ocf_cur_ses->frag_wa_encrypt = -1; -+ cesa_ocf_cur_ses->frag_wa_decrypt = -1; -+ cesa_ocf_cur_ses->frag_wa_auth = -1; -+ -+ /* init the session */ -+ memset(cesa_ses, 0, sizeof(MV_CESA_OPEN_SESSION)); -+ count = 1; -+ while (cri) { -+ if(count > 2) { -+ printk("%s,%d: don't support more then 2 operations\n", __FILE__, __LINE__); -+ goto error; -+ } -+ switch (cri->cri_alg) { -+ case CRYPTO_AES_CBC: -+ dprintk("%s,%d: (%d) AES CBC \n", __FILE__, __LINE__, count); -+ cesa_ocf_cur_ses->cipher_alg = cri->cri_alg; -+ cesa_ocf_cur_ses->ivlen = MV_CESA_AES_BLOCK_SIZE; -+ cesa_ses->cryptoAlgorithm = MV_CESA_CRYPTO_AES; -+ cesa_ses->cryptoMode = MV_CESA_CRYPTO_CBC; -+ if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) { -+ printk("%s,%d: CRYPTO key too long.\n", __FILE__, __LINE__); -+ goto error; -+ } -+ memcpy(cesa_ses->cryptoKey, cri->cri_key, cri->cri_klen/8); -+ dprintk("%s,%d: key length %d \n", __FILE__, __LINE__, cri->cri_klen/8); -+ cesa_ses->cryptoKeyLength = cri->cri_klen/8; -+ encrypt += count; -+ break; -+ case CRYPTO_3DES_CBC: -+ dprintk("%s,%d: (%d) 3DES CBC \n", __FILE__, __LINE__, count); -+ cesa_ocf_cur_ses->cipher_alg = cri->cri_alg; -+ cesa_ocf_cur_ses->ivlen = MV_CESA_3DES_BLOCK_SIZE; -+ cesa_ses->cryptoAlgorithm = MV_CESA_CRYPTO_3DES; -+ cesa_ses->cryptoMode = MV_CESA_CRYPTO_CBC; -+ if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) { -+ printk("%s,%d: CRYPTO key too long.\n", __FILE__, __LINE__); -+ goto error; -+ } -+ memcpy(cesa_ses->cryptoKey, cri->cri_key, cri->cri_klen/8); -+ cesa_ses->cryptoKeyLength = cri->cri_klen/8; -+ encrypt += count; -+ break; -+ case CRYPTO_DES_CBC: -+ dprintk("%s,%d: (%d) DES CBC \n", __FILE__, __LINE__, count); -+ cesa_ocf_cur_ses->cipher_alg = cri->cri_alg; -+ cesa_ocf_cur_ses->ivlen = MV_CESA_DES_BLOCK_SIZE; -+ cesa_ses->cryptoAlgorithm = MV_CESA_CRYPTO_DES; -+ cesa_ses->cryptoMode = MV_CESA_CRYPTO_CBC; -+ if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) { -+ printk("%s,%d: CRYPTO key too long.\n", __FILE__, __LINE__); -+ goto error; -+ } -+ memcpy(cesa_ses->cryptoKey, cri->cri_key, cri->cri_klen/8); -+ cesa_ses->cryptoKeyLength = cri->cri_klen/8; -+ encrypt += count; -+ break; -+ case CRYPTO_MD5: -+ case CRYPTO_MD5_HMAC: -+ dprintk("%s,%d: (%d) %sMD5 CBC \n", __FILE__, __LINE__, count, (cri->cri_alg != CRYPTO_MD5)? "H-":" "); -+ cesa_ocf_cur_ses->auth_alg = cri->cri_alg; -+ cesa_ocf_cur_ses->digestlen = (cri->cri_alg == CRYPTO_MD5)? MV_CESA_MD5_DIGEST_SIZE : 12; -+ cesa_ses->macMode = (cri->cri_alg == CRYPTO_MD5)? MV_CESA_MAC_MD5 : MV_CESA_MAC_HMAC_MD5; -+ if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) { -+ printk("%s,%d: MAC key too long. \n", __FILE__, __LINE__); -+ goto error; -+ } -+ cesa_ses->macKeyLength = cri->cri_klen/8; -+ memcpy(cesa_ses->macKey, cri->cri_key, cri->cri_klen/8); -+ cesa_ses->digestSize = cesa_ocf_cur_ses->digestlen; -+ auth += count; -+ break; -+ case CRYPTO_SHA1: -+ case CRYPTO_SHA1_HMAC: -+ dprintk("%s,%d: (%d) %sSHA1 CBC \n", __FILE__, __LINE__, count, (cri->cri_alg != CRYPTO_SHA1)? "H-":" "); -+ cesa_ocf_cur_ses->auth_alg = cri->cri_alg; -+ cesa_ocf_cur_ses->digestlen = (cri->cri_alg == CRYPTO_SHA1)? MV_CESA_SHA1_DIGEST_SIZE : 12; -+ cesa_ses->macMode = (cri->cri_alg == CRYPTO_SHA1)? MV_CESA_MAC_SHA1 : MV_CESA_MAC_HMAC_SHA1; -+ if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) { -+ printk("%s,%d: MAC key too long. \n", __FILE__, __LINE__); -+ goto error; -+ } -+ cesa_ses->macKeyLength = cri->cri_klen/8; -+ memcpy(cesa_ses->macKey, cri->cri_key, cri->cri_klen/8); -+ cesa_ses->digestSize = cesa_ocf_cur_ses->digestlen; -+ auth += count; -+ break; -+ default: -+ printk("%s,%d: unknown algo 0x%x\n", __FILE__, __LINE__, cri->cri_alg); -+ goto error; -+ } -+ cri = cri->cri_next; -+ count++; -+ } -+ -+ if((encrypt > 2) || (auth > 2)) { -+ printk("%s,%d: session mode is not supported.\n", __FILE__, __LINE__); -+ goto error; -+ } -+ /* create new sessions in HAL */ -+ if(encrypt) { -+ cesa_ses->operation = MV_CESA_CRYPTO_ONLY; -+ /* encrypt session */ -+ if(auth == 1) { -+ cesa_ses->operation = MV_CESA_MAC_THEN_CRYPTO; -+ } -+ else if(auth == 2) { -+ cesa_ses->operation = MV_CESA_CRYPTO_THEN_MAC; -+ cesa_ocf_cur_ses->encrypt_tn_auth = 1; -+ } -+ else { -+ cesa_ses->operation = MV_CESA_CRYPTO_ONLY; -+ } -+ cesa_ses->direction = MV_CESA_DIR_ENCODE; -+ status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->sid_encrypt); -+ if(status != MV_OK) { -+ printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status); -+ goto error; -+ } -+ /* decrypt session */ -+ if( cesa_ses->operation == MV_CESA_MAC_THEN_CRYPTO ) { -+ cesa_ses->operation = MV_CESA_CRYPTO_THEN_MAC; -+ } -+ else if( cesa_ses->operation == MV_CESA_CRYPTO_THEN_MAC ) { -+ cesa_ses->operation = MV_CESA_MAC_THEN_CRYPTO; -+ } -+ cesa_ses->direction = MV_CESA_DIR_DECODE; -+ status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->sid_decrypt); -+ if(status != MV_OK) { -+ printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status); -+ goto error; -+ } -+ -+ /* preapre one action sessions for case we will need to split an action */ -+#ifdef CESA_OCF_SPLIT -+ if(( cesa_ses->operation == MV_CESA_MAC_THEN_CRYPTO ) || -+ ( cesa_ses->operation == MV_CESA_CRYPTO_THEN_MAC )) { -+ /* open one session for encode and one for decode */ -+ cesa_ses->operation = MV_CESA_CRYPTO_ONLY; -+ cesa_ses->direction = MV_CESA_DIR_ENCODE; -+ status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->frag_wa_encrypt); -+ if(status != MV_OK) { -+ printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status); -+ goto error; -+ } -+ -+ cesa_ses->direction = MV_CESA_DIR_DECODE; -+ status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->frag_wa_decrypt); -+ if(status != MV_OK) { -+ printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status); -+ goto error; -+ } -+ /* open one session for auth */ -+ cesa_ses->operation = MV_CESA_MAC_ONLY; -+ cesa_ses->direction = MV_CESA_DIR_ENCODE; -+ status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->frag_wa_auth); -+ if(status != MV_OK) { -+ printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status); -+ goto error; -+ } -+ } -+#endif -+ } -+ else { /* only auth */ -+ cesa_ses->operation = MV_CESA_MAC_ONLY; -+ cesa_ses->direction = MV_CESA_DIR_ENCODE; -+ status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->sid_encrypt); -+ if(status != MV_OK) { -+ printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status); -+ goto error; -+ } -+ } -+ -+ return 0; -+error: -+ cesa_ocf_freesession(NULL, *sid); -+ return EINVAL; -+ -+} -+ -+ -+/* -+ * Free a session. -+ */ -+static int -+cesa_ocf_freesession(device_t dev, u_int64_t tid) -+{ -+ struct cesa_ocf_data *cesa_ocf_cur_ses; -+ u_int32_t sid = CRYPTO_SESID2LID(tid); -+ //unsigned long flags; -+ -+ dprintk("%s() %d \n", __FUNCTION__, sid); -+ if ( (sid >= CESA_OCF_MAX_SES) || (cesa_ocf_sessions[sid] == NULL) ) { -+ printk("%s,%d: EINVAL can't free session %d \n", __FILE__, __LINE__, sid); -+ return(EINVAL); -+ } -+ -+ /* Silently accept and return */ -+ if (sid == 0) -+ return(0); -+ -+ /* release session from HAL */ -+ cesa_ocf_cur_ses = cesa_ocf_sessions[sid]; -+ if (cesa_ocf_cur_ses->sid_encrypt != -1) { -+ mvCesaSessionClose(cesa_ocf_cur_ses->sid_encrypt); -+ } -+ if (cesa_ocf_cur_ses->sid_decrypt != -1) { -+ mvCesaSessionClose(cesa_ocf_cur_ses->sid_decrypt); -+ } -+ if (cesa_ocf_cur_ses->frag_wa_encrypt != -1) { -+ mvCesaSessionClose(cesa_ocf_cur_ses->frag_wa_encrypt); -+ } -+ if (cesa_ocf_cur_ses->frag_wa_decrypt != -1) { -+ mvCesaSessionClose(cesa_ocf_cur_ses->frag_wa_decrypt); -+ } -+ if (cesa_ocf_cur_ses->frag_wa_auth != -1) { -+ mvCesaSessionClose(cesa_ocf_cur_ses->frag_wa_auth); -+ } -+ -+ kfree(cesa_ocf_cur_ses); -+ cesa_ocf_sessions[sid] = NULL; -+ -+ return 0; -+} -+ -+ -+/* TDMA Window setup */ -+ -+static void __init -+setup_tdma_mbus_windows(struct cesa_dev *dev) -+{ -+ int i; -+ -+ for (i = 0; i < 4; i++) { -+ writel(0, dev->reg + WINDOW_BASE(i)); -+ writel(0, dev->reg + WINDOW_CTRL(i)); -+ } -+ -+ for (i = 0; i < dev->plat_data->dram->num_cs; i++) { -+ struct mbus_dram_window *cs = dev->plat_data->dram->cs + i; -+ writel( -+ ((cs->size - 1) & 0xffff0000) | -+ (cs->mbus_attr << 8) | -+ (dev->plat_data->dram->mbus_dram_target_id << 4) | 1, -+ dev->reg + WINDOW_CTRL(i) -+ ); -+ writel(cs->base, dev->reg + WINDOW_BASE(i)); -+ } -+} -+ -+/* -+ * our driver startup and shutdown routines -+ */ -+static int -+mv_cesa_ocf_init(struct platform_device *pdev) -+{ -+#if defined(CONFIG_MV78200) || defined(CONFIG_MV632X) -+ if (MV_FALSE == mvSocUnitIsMappedToThisCpu(CESA)) -+ { -+ dprintk("CESA is not mapped to this CPU\n"); -+ return -ENODEV; -+ } -+#endif -+ -+ dprintk("%s\n", __FUNCTION__); -+ memset(&mv_cesa_dev, 0, sizeof(mv_cesa_dev)); -+ softc_device_init(&mv_cesa_dev, "MV CESA", 0, mv_cesa_methods); -+ cesa_ocf_id = crypto_get_driverid(softc_get_device(&mv_cesa_dev),CRYPTOCAP_F_HARDWARE); -+ -+ if (cesa_ocf_id < 0) -+ panic("MV CESA crypto device cannot initialize!"); -+ -+ dprintk("%s,%d: cesa ocf device id is %d \n", __FILE__, __LINE__, cesa_ocf_id); -+ -+ /* CESA unit is auto power on off */ -+#if 0 -+ if (MV_FALSE == mvCtrlPwrClckGet(CESA_UNIT_ID,0)) -+ { -+ printk("\nWarning CESA %d is Powered Off\n",0); -+ return EINVAL; -+ } -+#endif -+ -+ memset(&cesa_device, 0, sizeof(struct cesa_dev)); -+ /* Get the IRQ, and crypto memory regions */ -+ { -+ struct resource *res; -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); -+ -+ if (!res) -+ return -ENXIO; -+ -+ cesa_device.sram = ioremap(res->start, res->end - res->start + 1); -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); -+ -+ if (!res) { -+ iounmap(cesa_device.sram); -+ return -ENXIO; -+ } -+ cesa_device.reg = ioremap(res->start, res->end - res->start + 1); -+ cesa_device.irq = platform_get_irq(pdev, 0); -+ cesa_device.plat_data = pdev->dev.platform_data; -+ setup_tdma_mbus_windows(&cesa_device); -+ -+ } -+ -+ -+ if( MV_OK != mvCesaInit(CESA_OCF_MAX_SES*5, CESA_Q_SIZE, cesa_device.reg, -+ NULL) ) { -+ printk("%s,%d: mvCesaInit Failed. \n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ /* clear and unmask Int */ -+ MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0); -+#ifndef CESA_OCF_POLLING -+ MV_REG_WRITE( MV_CESA_ISR_MASK_REG, MV_CESA_CAUSE_ACC_DMA_MASK); -+#endif -+#ifdef CESA_OCF_TASKLET -+ tasklet_init(&cesa_ocf_tasklet, cesa_callback, (unsigned int) 0); -+#endif -+ /* register interrupt */ -+ if( request_irq( cesa_device.irq, cesa_interrupt_handler, -+ (IRQF_DISABLED) , "cesa", &cesa_ocf_id) < 0) { -+ printk("%s,%d: cannot assign irq %x\n", __FILE__, __LINE__, cesa_device.reg); -+ return EINVAL; -+ } -+ -+ -+ memset(cesa_ocf_sessions, 0, sizeof(struct cesa_ocf_data *) * CESA_OCF_MAX_SES); -+ -+#define REGISTER(alg) \ -+ crypto_register(cesa_ocf_id, alg, 0,0) -+ REGISTER(CRYPTO_AES_CBC); -+ REGISTER(CRYPTO_DES_CBC); -+ REGISTER(CRYPTO_3DES_CBC); -+ REGISTER(CRYPTO_MD5); -+ REGISTER(CRYPTO_MD5_HMAC); -+ REGISTER(CRYPTO_SHA1); -+ REGISTER(CRYPTO_SHA1_HMAC); -+#undef REGISTER -+ -+ return 0; -+} -+ -+static void -+mv_cesa_ocf_exit(struct platform_device *pdev) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ crypto_unregister_all(cesa_ocf_id); -+ cesa_ocf_id = -1; -+ iounmap(cesa_device.reg); -+ iounmap(cesa_device.sram); -+ free_irq(cesa_device.irq, NULL); -+ -+ /* mask and clear Int */ -+ MV_REG_WRITE( MV_CESA_ISR_MASK_REG, 0); -+ MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0); -+ -+ -+ if( MV_OK != mvCesaFinish() ) { -+ printk("%s,%d: mvCesaFinish Failed. \n", __FILE__, __LINE__); -+ return; -+ } -+} -+ -+ -+void cesa_ocf_debug(void) -+{ -+ -+#ifdef CESA_OCF_TRACE_DEBUG -+ { -+ int i, j; -+ j = cesaTestTraceIdx; -+ mvOsPrintf("No Type rCause iCause Proc Isr Res Time pReady pProc pEmpty\n"); -+ for(i=0; i<MV_CESA_TEST_TRACE_SIZE; i++) -+ { -+ mvOsPrintf("%02d. %d 0x%04x 0x%04x 0x%02x 0x%02x %02d 0x%06x %p %p %p\n", -+ j, cesaTestTrace[j].type, cesaTestTrace[j].realCause, -+ cesaTestTrace[j].idmaCause, -+ cesaTestTrace[j].resources, cesaTestTrace[j].timeStamp, -+ cesaTestTrace[j].pReqReady, cesaTestTrace[j].pReqProcess, cesaTestTrace[j].pReqEmpty); -+ j++; -+ if(j == MV_CESA_TEST_TRACE_SIZE) -+ j = 0; -+ } -+ } -+#endif -+ -+} -+ -+static struct platform_driver marvell_cesa = { -+ .probe = mv_cesa_ocf_init, -+ .remove = mv_cesa_ocf_exit, -+ .driver = { -+ .owner = THIS_MODULE, -+ .name = "mv_crypto", -+ }, -+}; -+ -+MODULE_ALIAS("platform:mv_crypto"); -+ -+static int __init mv_cesa_init(void) -+{ -+ return platform_driver_register(&marvell_cesa); -+} -+ -+module_init(mv_cesa_init); -+ -+static void __exit mv_cesa_exit(void) -+{ -+ platform_driver_unregister(&marvell_cesa); -+} -+ -+module_exit(mv_cesa_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Ronen Shitrit"); -+MODULE_DESCRIPTION("OCF module for Orion CESA crypto"); -diff --git a/crypto/ocf/kirkwood/mvHal/common/mv802_3.h b/crypto/ocf/kirkwood/mvHal/common/mv802_3.h -new file mode 100644 -index 0000000..b03cdbd ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mv802_3.h -@@ -0,0 +1,213 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmv802_3h -+#define __INCmv802_3h -+ -+ -+/* includes */ -+#include "mvTypes.h" -+ -+/* Defines */ -+#define MV_MAX_ETH_DATA 1500 -+ -+/* 802.3 types */ -+#define MV_IP_TYPE 0x0800 -+#define MV_IP_ARP_TYPE 0x0806 -+#define MV_APPLE_TALK_ARP_TYPE 0x80F3 -+#define MV_NOVELL_IPX_TYPE 0x8137 -+#define MV_EAPOL_TYPE 0x888e -+ -+ -+ -+/* Encapsulation header for RFC1042 and Ethernet_tunnel */ -+ -+#define MV_RFC1042_SNAP_HEADER {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00} -+ -+#define MV_ETH_SNAP_LSB 0xF8 -+ -+ -+#define MV_MAC_ADDR_SIZE (6) -+#define MV_MAC_STR_SIZE (20) -+#define MV_VLAN_HLEN (4) -+ -+/* This macro checks for a multicast mac address */ -+#define MV_IS_MULTICAST_MAC(mac) (((mac)[0] & 0x1) == 1) -+ -+ -+/* This macro checks for an broadcast mac address */ -+#define MV_IS_BROADCAST_MAC(mac) \ -+ (((mac)[0] == 0xFF) && \ -+ ((mac)[1] == 0xFF) && \ -+ ((mac)[2] == 0xFF) && \ -+ ((mac)[3] == 0xFF) && \ -+ ((mac)[4] == 0xFF) && \ -+ ((mac)[5] == 0xFF)) -+ -+ -+/* Typedefs */ -+typedef struct -+{ -+ MV_U8 pDA[MV_MAC_ADDR_SIZE]; -+ MV_U8 pSA[MV_MAC_ADDR_SIZE]; -+ MV_U16 typeOrLen; -+ -+} MV_802_3_HEADER; -+ -+enum { -+ MV_IP_PROTO_NULL = 0, /* Dummy protocol for TCP */ -+ MV_IP_PROTO_ICMP = 1, /* Internet Control Message Protocol */ -+ MV_IP_PROTO_IGMP = 2, /* Internet Group Management Protocol */ -+ MV_IP_PROTO_IPIP = 4, /* IPIP tunnels (older KA9Q tunnels use 94) */ -+ MV_IP_PROTO_TCP = 6, /* Transmission Control Protocol */ -+ MV_IP_PROTO_EGP = 8, /* Exterior Gateway Protocol */ -+ MV_IP_PROTO_PUP = 12, /* PUP protocol */ -+ MV_IP_PROTO_UDP = 17, /* User Datagram Protocol */ -+ MV_IP_PROTO_IDP = 22, /* XNS IDP protocol */ -+ MV_IP_PROTO_DCCP = 33, /* Datagram Congestion Control Protocol */ -+ MV_IP_PROTO_IPV6 = 41, /* IPv6-in-IPv4 tunnelling */ -+ MV_IP_PROTO_RSVP = 46, /* RSVP protocol */ -+ MV_IP_PROTO_GRE = 47, /* Cisco GRE tunnels (rfc 1701,1702) */ -+ MV_IP_PROTO_ESP = 50, /* Encapsulation Security Payload protocol */ -+ MV_IP_PROTO_AH = 51, /* Authentication Header protocol */ -+ MV_IP_PROTO_BEETPH = 94, /* IP option pseudo header for BEET */ -+ MV_IP_PROTO_PIM = 103, -+ MV_IP_PROTO_COMP = 108, /* Compression Header protocol */ -+ MV_IP_PROTO_ZERO_HOP = 114, /* Any 0 hop protocol (IANA) */ -+ MV_IP_PROTO_SCTP = 132, /* Stream Control Transport Protocol */ -+ MV_IP_PROTO_UDPLITE = 136, /* UDP-Lite (RFC 3828) */ -+ -+ MV_IP_PROTO_RAW = 255, /* Raw IP packets */ -+ MV_IP_PROTO_MAX -+}; -+ -+typedef struct -+{ -+ MV_U8 version; -+ MV_U8 tos; -+ MV_U16 totalLength; -+ MV_U16 identifier; -+ MV_U16 fragmentCtrl; -+ MV_U8 ttl; -+ MV_U8 protocol; -+ MV_U16 checksum; -+ MV_U32 srcIP; -+ MV_U32 dstIP; -+ -+} MV_IP_HEADER; -+ -+typedef struct -+{ -+ MV_U32 spi; -+ MV_U32 seqNum; -+} MV_ESP_HEADER; -+ -+#define MV_ICMP_ECHOREPLY 0 /* Echo Reply */ -+#define MV_ICMP_DEST_UNREACH 3 /* Destination Unreachable */ -+#define MV_ICMP_SOURCE_QUENCH 4 /* Source Quench */ -+#define MV_ICMP_REDIRECT 5 /* Redirect (change route) */ -+#define MV_ICMP_ECHO 8 /* Echo Request */ -+#define MV_ICMP_TIME_EXCEEDED 11 /* Time Exceeded */ -+#define MV_ICMP_PARAMETERPROB 12 /* Parameter Problem */ -+#define MV_ICMP_TIMESTAMP 13 /* Timestamp Request */ -+#define MV_ICMP_TIMESTAMPREPLY 14 /* Timestamp Reply */ -+#define MV_ICMP_INFO_REQUEST 15 /* Information Request */ -+#define MV_ICMP_INFO_REPLY 16 /* Information Reply */ -+#define MV_ICMP_ADDRESS 17 /* Address Mask Request */ -+#define MV_ICMP_ADDRESSREPLY 18 /* Address Mask Reply */ -+ -+typedef struct -+{ -+ MV_U8 type; -+ MV_U8 code; -+ MV_U16 checksum; -+ MV_U16 id; -+ MV_U16 sequence; -+ -+} MV_ICMP_ECHO_HEADER; -+ -+typedef struct -+{ -+ MV_U16 source; -+ MV_U16 dest; -+ MV_U32 seq; -+ MV_U32 ack_seq; -+ MV_U16 flags; -+ MV_U16 window; -+ MV_U16 chksum; -+ MV_U16 urg_offset; -+ -+} MV_TCP_HEADER; -+ -+typedef struct -+{ -+ MV_U16 source; -+ MV_U16 dest; -+ MV_U16 len; -+ MV_U16 check; -+ -+} MV_UDP_HEADER; -+ -+#endif /* __INCmv802_3h */ -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvCommon.c b/crypto/ocf/kirkwood/mvHal/common/mvCommon.c -new file mode 100644 -index 0000000..ecb41a8 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvCommon.c -@@ -0,0 +1,277 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvOs.h" -+#include "mv802_3.h" -+#include "mvCommon.h" -+ -+ -+/******************************************************************************* -+* mvMacStrToHex - Convert MAC format string to hex. -+* -+* DESCRIPTION: -+* This function convert MAC format string to hex. -+* -+* INPUT: -+* macStr - MAC address string. Fornat of address string is -+* uu:vv:ww:xx:yy:zz, where ":" can be any delimiter. -+* -+* OUTPUT: -+* macHex - MAC in hex format. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvMacStrToHex(const char* macStr, MV_U8* macHex) -+{ -+ int i; -+ char tmp[3]; -+ -+ for(i = 0; i < MV_MAC_ADDR_SIZE; i++) -+ { -+ tmp[0] = macStr[(i * 3) + 0]; -+ tmp[1] = macStr[(i * 3) + 1]; -+ tmp[2] = '\0'; -+ macHex[i] = (MV_U8) (strtol(tmp, NULL, 16)); -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvMacHexToStr - Convert MAC in hex format to string format. -+* -+* DESCRIPTION: -+* This function convert MAC in hex format to string format. -+* -+* INPUT: -+* macHex - MAC in hex format. -+* -+* OUTPUT: -+* macStr - MAC address string. String format is uu:vv:ww:xx:yy:zz. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvMacHexToStr(MV_U8* macHex, char* macStr) -+{ -+ int i; -+ -+ for(i = 0; i < MV_MAC_ADDR_SIZE; i++) -+ { -+ mvOsSPrintf(&macStr[i * 3], "%02x:", macHex[i]); -+ } -+ macStr[(i * 3) - 1] = '\0'; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSizePrint - Print the given size with size unit description. -+* -+* DESCRIPTION: -+* This function print the given size with size unit description. -+* FOr example when size paramter is 0x180000, the function prints: -+* "size 1MB+500KB" -+* -+* INPUT: -+* size - Size in bytes. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvSizePrint(MV_U32 size) -+{ -+ mvOsOutput("size "); -+ -+ if(size >= _1G) -+ { -+ mvOsOutput("%3dGB ", size / _1G); -+ size %= _1G; -+ if(size) -+ mvOsOutput("+"); -+ } -+ if(size >= _1M ) -+ { -+ mvOsOutput("%3dMB ", size / _1M); -+ size %= _1M; -+ if(size) -+ mvOsOutput("+"); -+ } -+ if(size >= _1K) -+ { -+ mvOsOutput("%3dKB ", size / _1K); -+ size %= _1K; -+ if(size) -+ mvOsOutput("+"); -+ } -+ if(size > 0) -+ { -+ mvOsOutput("%3dB ", size); -+ } -+} -+ -+/******************************************************************************* -+* mvHexToBin - Convert hex to binary -+* -+* DESCRIPTION: -+* This function Convert hex to binary. -+* -+* INPUT: -+* pHexStr - hex buffer pointer. -+* size - Size to convert. -+* -+* OUTPUT: -+* pBin - Binary buffer pointer. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvHexToBin(const char* pHexStr, MV_U8* pBin, int size) -+{ -+ int j, i; -+ char tmp[3]; -+ MV_U8 byte; -+ -+ for(j=0, i=0; j<size; j++, i+=2) -+ { -+ tmp[0] = pHexStr[i]; -+ tmp[1] = pHexStr[i+1]; -+ tmp[2] = '\0'; -+ byte = (MV_U8) (strtol(tmp, NULL, 16) & 0xFF); -+ pBin[j] = byte; -+ } -+} -+ -+void mvAsciiToHex(const char* asciiStr, char* hexStr) -+{ -+ int i=0; -+ -+ while(asciiStr[i] != 0) -+ { -+ mvOsSPrintf(&hexStr[i*2], "%02x", asciiStr[i]); -+ i++; -+ } -+ hexStr[i*2] = 0; -+} -+ -+ -+void mvBinToHex(const MV_U8* bin, char* hexStr, int size) -+{ -+ int i; -+ -+ for(i=0; i<size; i++) -+ { -+ mvOsSPrintf(&hexStr[i*2], "%02x", bin[i]); -+ } -+ hexStr[i*2] = '\0'; -+} -+ -+void mvBinToAscii(const MV_U8* bin, char* asciiStr, int size) -+{ -+ int i; -+ -+ for(i=0; i<size; i++) -+ { -+ mvOsSPrintf(&asciiStr[i*2], "%c", bin[i]); -+ } -+ asciiStr[i*2] = '\0'; -+} -+ -+/******************************************************************************* -+* mvLog2 - -+* -+* DESCRIPTION: -+* Calculate the Log2 of a given number. -+* -+* INPUT: -+* num - A number to calculate the Log2 for. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Log 2 of the input number, or 0xFFFFFFFF if input is 0. -+* -+*******************************************************************************/ -+MV_U32 mvLog2(MV_U32 num) -+{ -+ MV_U32 result = 0; -+ if(num == 0) -+ return 0xFFFFFFFF; -+ while(num != 1) -+ { -+ num = num >> 1; -+ result++; -+ } -+ return result; -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvCommon.h b/crypto/ocf/kirkwood/mvHal/common/mvCommon.h -new file mode 100644 -index 0000000..5caf47c ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvCommon.h -@@ -0,0 +1,308 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+ -+#ifndef __INCmvCommonh -+#define __INCmvCommonh -+ -+#include "mvTypes.h" -+ -+/* Swap tool */ -+ -+/* 16bit nibble swap. For example 0x1234 -> 0x2143 */ -+#define MV_NIBBLE_SWAP_16BIT(X) (((X&0xf) << 4) | \ -+ ((X&0xf0) >> 4) | \ -+ ((X&0xf00) << 4) | \ -+ ((X&0xf000) >> 4)) -+ -+/* 32bit nibble swap. For example 0x12345678 -> 0x21436587 */ -+#define MV_NIBBLE_SWAP_32BIT(X) (((X&0xf) << 4) | \ -+ ((X&0xf0) >> 4) | \ -+ ((X&0xf00) << 4) | \ -+ ((X&0xf000) >> 4) | \ -+ ((X&0xf0000) << 4) | \ -+ ((X&0xf00000) >> 4) | \ -+ ((X&0xf000000) << 4) | \ -+ ((X&0xf0000000) >> 4)) -+ -+/* 16bit byte swap. For example 0x1122 -> 0x2211 */ -+#define MV_BYTE_SWAP_16BIT(X) ((((X)&0xff)<<8) | (((X)&0xff00)>>8)) -+ -+/* 32bit byte swap. For example 0x11223344 -> 0x44332211 */ -+#define MV_BYTE_SWAP_32BIT(X) ((((X)&0xff)<<24) | \ -+ (((X)&0xff00)<<8) | \ -+ (((X)&0xff0000)>>8) | \ -+ (((X)&0xff000000)>>24)) -+ -+/* 64bit byte swap. For example 0x11223344.55667788 -> 0x88776655.44332211 */ -+#define MV_BYTE_SWAP_64BIT(X) ((l64) ((((X)&0xffULL)<<56) | \ -+ (((X)&0xff00ULL)<<40) | \ -+ (((X)&0xff0000ULL)<<24) | \ -+ (((X)&0xff000000ULL)<<8) | \ -+ (((X)&0xff00000000ULL)>>8) | \ -+ (((X)&0xff0000000000ULL)>>24) | \ -+ (((X)&0xff000000000000ULL)>>40) | \ -+ (((X)&0xff00000000000000ULL)>>56))) -+ -+/* Endianess macros. */ -+#if defined(MV_CPU_LE) -+ #define MV_16BIT_LE(X) (X) -+ #define MV_32BIT_LE(X) (X) -+ #define MV_64BIT_LE(X) (X) -+ #define MV_16BIT_BE(X) MV_BYTE_SWAP_16BIT(X) -+ #define MV_32BIT_BE(X) MV_BYTE_SWAP_32BIT(X) -+ #define MV_64BIT_BE(X) MV_BYTE_SWAP_64BIT(X) -+#elif defined(MV_CPU_BE) -+ #define MV_16BIT_LE(X) MV_BYTE_SWAP_16BIT(X) -+ #define MV_32BIT_LE(X) MV_BYTE_SWAP_32BIT(X) -+ #define MV_64BIT_LE(X) MV_BYTE_SWAP_64BIT(X) -+ #define MV_16BIT_BE(X) (X) -+ #define MV_32BIT_BE(X) (X) -+ #define MV_64BIT_BE(X) (X) -+#else -+ #error "CPU endianess isn't defined!\n" -+#endif -+ -+ -+/* Bit field definitions */ -+#define NO_BIT 0x00000000 -+#define BIT0 0x00000001 -+#define BIT1 0x00000002 -+#define BIT2 0x00000004 -+#define BIT3 0x00000008 -+#define BIT4 0x00000010 -+#define BIT5 0x00000020 -+#define BIT6 0x00000040 -+#define BIT7 0x00000080 -+#define BIT8 0x00000100 -+#define BIT9 0x00000200 -+#define BIT10 0x00000400 -+#define BIT11 0x00000800 -+#define BIT12 0x00001000 -+#define BIT13 0x00002000 -+#define BIT14 0x00004000 -+#define BIT15 0x00008000 -+#define BIT16 0x00010000 -+#define BIT17 0x00020000 -+#define BIT18 0x00040000 -+#define BIT19 0x00080000 -+#define BIT20 0x00100000 -+#define BIT21 0x00200000 -+#define BIT22 0x00400000 -+#define BIT23 0x00800000 -+#define BIT24 0x01000000 -+#define BIT25 0x02000000 -+#define BIT26 0x04000000 -+#define BIT27 0x08000000 -+#define BIT28 0x10000000 -+#define BIT29 0x20000000 -+#define BIT30 0x40000000 -+#define BIT31 0x80000000 -+ -+/* Handy sizes */ -+#define _1K 0x00000400 -+#define _2K 0x00000800 -+#define _4K 0x00001000 -+#define _8K 0x00002000 -+#define _16K 0x00004000 -+#define _32K 0x00008000 -+#define _64K 0x00010000 -+#define _128K 0x00020000 -+#define _256K 0x00040000 -+#define _512K 0x00080000 -+ -+#define _1M 0x00100000 -+#define _2M 0x00200000 -+#define _4M 0x00400000 -+#define _8M 0x00800000 -+#define _16M 0x01000000 -+#define _32M 0x02000000 -+#define _64M 0x04000000 -+#define _128M 0x08000000 -+#define _256M 0x10000000 -+#define _512M 0x20000000 -+ -+#define _1G 0x40000000 -+#define _2G 0x80000000 -+ -+/* Tclock and Sys clock define */ -+#define _100MHz 100000000 -+#define _125MHz 125000000 -+#define _133MHz 133333334 -+#define _150MHz 150000000 -+#define _160MHz 160000000 -+#define _166MHz 166666667 -+#define _175MHz 175000000 -+#define _178MHz 178000000 -+#define _183MHz 183333334 -+#define _187MHz 187000000 -+#define _192MHz 192000000 -+#define _194MHz 194000000 -+#define _200MHz 200000000 -+#define _233MHz 233333334 -+#define _250MHz 250000000 -+#define _266MHz 266666667 -+#define _300MHz 300000000 -+ -+/* For better address window table readability */ -+#define EN MV_TRUE -+#define DIS MV_FALSE -+#define N_A -1 /* Not applicable */ -+ -+/* Cache configuration options for memory (DRAM, SRAM, ... ) */ -+ -+/* Memory uncached, HW or SW cache coherency is not needed */ -+#define MV_UNCACHED 0 -+/* Memory cached, HW cache coherency supported in WriteThrough mode */ -+#define MV_CACHE_COHER_HW_WT 1 -+/* Memory cached, HW cache coherency supported in WriteBack mode */ -+#define MV_CACHE_COHER_HW_WB 2 -+/* Memory cached, No HW cache coherency, Cache coherency must be in SW */ -+#define MV_CACHE_COHER_SW 3 -+ -+ -+/* Macro for testing aligment. Positive if number is NOT aligned */ -+#define MV_IS_NOT_ALIGN(number, align) ((number) & ((align) - 1)) -+ -+/* Macro for alignment up. For example, MV_ALIGN_UP(0x0330, 0x20) = 0x0340 */ -+#define MV_ALIGN_UP(number, align) \ -+(((number) & ((align) - 1)) ? (((number) + (align)) & ~((align)-1)) : (number)) -+ -+/* Macro for alignment down. For example, MV_ALIGN_UP(0x0330, 0x20) = 0x0320 */ -+#define MV_ALIGN_DOWN(number, align) ((number) & ~((align)-1)) -+ -+/* This macro returns absolute value */ -+#define MV_ABS(number) (((int)(number) < 0) ? -(int)(number) : (int)(number)) -+ -+ -+/* Bit fields manipulation macros */ -+ -+/* An integer word which its 'x' bit is set */ -+#define MV_BIT_MASK(bitNum) (1 << (bitNum) ) -+ -+/* Checks wheter bit 'x' in integer word is set */ -+#define MV_BIT_CHECK(word, bitNum) ( (word) & MV_BIT_MASK(bitNum) ) -+ -+/* Clear (reset) bit 'x' in integer word (RMW - Read-Modify-Write) */ -+#define MV_BIT_CLEAR(word, bitNum) ( (word) &= ~(MV_BIT_MASK(bitNum)) ) -+ -+/* Set bit 'x' in integer word (RMW) */ -+#define MV_BIT_SET(word, bitNum) ( (word) |= MV_BIT_MASK(bitNum) ) -+ -+/* Invert bit 'x' in integer word (RMW) */ -+#define MV_BIT_INV(word, bitNum) ( (word) ^= MV_BIT_MASK(bitNum) ) -+ -+/* Get the min between 'a' or 'b' */ -+#define MV_MIN(a,b) (((a) < (b)) ? (a) : (b)) -+ -+/* Get the max between 'a' or 'b' */ -+#define MV_MAX(a,b) (((a) < (b)) ? (b) : (a)) -+ -+/* Temporary */ -+#define mvOsDivide(num, div) \ -+({ \ -+ int i=0, rem=(num); \ -+ \ -+ while(rem >= (div)) \ -+ { \ -+ rem -= (div); \ -+ i++; \ -+ } \ -+ (i); \ -+}) -+ -+/* Temporary */ -+#define mvOsReminder(num, div) \ -+({ \ -+ int rem = (num); \ -+ \ -+ while(rem >= (div)) \ -+ rem -= (div); \ -+ (rem); \ -+}) -+ -+#define MV_IP_QUAD(ipAddr) ((ipAddr >> 24) & 0xFF), ((ipAddr >> 16) & 0xFF), \ -+ ((ipAddr >> 8) & 0xFF), ((ipAddr >> 0) & 0xFF) -+ -+#define MV_IS_POWER_OF_2(num) ((num != 0) && ((num & (num - 1)) == 0)) -+ -+#ifndef MV_ASMLANGUAGE -+/* mvCommon API list */ -+ -+MV_VOID mvHexToBin(const char* pHexStr, MV_U8* pBin, int size); -+void mvAsciiToHex(const char* asciiStr, char* hexStr); -+void mvBinToHex(const MV_U8* bin, char* hexStr, int size); -+void mvBinToAscii(const MV_U8* bin, char* asciiStr, int size); -+ -+MV_STATUS mvMacStrToHex(const char* macStr, MV_U8* macHex); -+MV_STATUS mvMacHexToStr(MV_U8* macHex, char* macStr); -+void mvSizePrint(MV_U32); -+ -+MV_U32 mvLog2(MV_U32 num); -+ -+#endif /* MV_ASMLANGUAGE */ -+ -+ -+#endif /* __INCmvCommonh */ -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvDebug.c b/crypto/ocf/kirkwood/mvHal/common/mvDebug.c -new file mode 100644 -index 0000000..d98a9e4 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvDebug.c -@@ -0,0 +1,326 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+ -+/* includes */ -+#include "mvOs.h" -+#include "mv802_3.h" -+#include "mvCommon.h" -+#include "mvDebug.h" -+ -+/* Global variables effect on behave MV_DEBUG_PRINT and MV_DEBUG_CODE macros -+ * mvDebug - map of bits (one for each module) bit=1 means enable -+ * debug code and messages for this module -+ * mvModuleDebug - array of 32 bits varables one for each module -+ */ -+MV_U32 mvDebug = 0; -+MV_U32 mvDebugModules[MV_MODULE_MAX]; -+ -+/* Init mvModuleDebug array to default values */ -+void mvDebugInit(void) -+{ -+ int bit; -+ -+ mvDebug = 0; -+ for(bit=0; bit<MV_MODULE_MAX; bit++) -+ { -+ mvDebugModules[bit] = MV_DEBUG_FLAG_ERR | MV_DEBUG_FLAG_STATS; -+ mvDebug |= MV_BIT_MASK(bit); -+ } -+} -+ -+void mvDebugModuleEnable(MV_MODULE_ID module, MV_BOOL isEnable) -+{ -+ if (isEnable) -+ { -+ MV_BIT_SET(mvDebug, module); -+ } -+ else -+ MV_BIT_CLEAR(mvDebug, module); -+} -+ -+void mvDebugModuleSetFlags(MV_MODULE_ID module, MV_U32 flags) -+{ -+ mvDebugModules[module] |= flags; -+} -+ -+void mvDebugModuleClearFlags(MV_MODULE_ID module, MV_U32 flags) -+{ -+ mvDebugModules[module] &= ~flags; -+} -+ -+/* Dump memory in specific format: -+ * address: X1X1X1X1 X2X2X2X2 ... X8X8X8X8 -+ */ -+void mvDebugMemDump(void* addr, int size, int access) -+{ -+ int i, j; -+ MV_U32 memAddr = (MV_U32)addr; -+ -+ if(access == 0) -+ access = 1; -+ -+ if( (access != 4) && (access != 2) && (access != 1) ) -+ { -+ mvOsPrintf("%d wrong access size. Access must be 1 or 2 or 4\n", -+ access); -+ return; -+ } -+ memAddr = MV_ALIGN_DOWN( (unsigned int)addr, 4); -+ size = MV_ALIGN_UP(size, 4); -+ addr = (void*)MV_ALIGN_DOWN( (unsigned int)addr, access); -+ while(size > 0) -+ { -+ mvOsPrintf("%08x: ", memAddr); -+ i = 0; -+ /* 32 bytes in the line */ -+ while(i < 32) -+ { -+ if(memAddr >= (MV_U32)addr) -+ { -+ switch(access) -+ { -+ case 1: -+ if( memAddr == CPU_PHY_MEM(memAddr) ) -+ { -+ mvOsPrintf("%02x ", MV_MEMIO8_READ(memAddr)); -+ } -+ else -+ { -+ mvOsPrintf("%02x ", *((MV_U8*)memAddr)); -+ } -+ break; -+ -+ case 2: -+ if( memAddr == CPU_PHY_MEM(memAddr) ) -+ { -+ mvOsPrintf("%04x ", MV_MEMIO16_READ(memAddr)); -+ } -+ else -+ { -+ mvOsPrintf("%04x ", *((MV_U16*)memAddr)); -+ } -+ break; -+ -+ case 4: -+ if( memAddr == CPU_PHY_MEM(memAddr) ) -+ { -+ mvOsPrintf("%08x ", MV_MEMIO32_READ(memAddr)); -+ } -+ else -+ { -+ mvOsPrintf("%08x ", *((MV_U32*)memAddr)); -+ } -+ break; -+ } -+ } -+ else -+ { -+ for(j=0; j<(access*2+1); j++) -+ mvOsPrintf(" "); -+ } -+ i += access; -+ memAddr += access; -+ size -= access; -+ if(size <= 0) -+ break; -+ } -+ mvOsPrintf("\n"); -+ } -+} -+ -+void mvDebugPrintBufInfo(BUF_INFO* pBufInfo, int size, int access) -+{ -+ if(pBufInfo == NULL) -+ { -+ mvOsPrintf("\n!!! pBufInfo = NULL\n"); -+ return; -+ } -+ mvOsPrintf("\n*** pBufInfo=0x%x, cmdSts=0x%08x, pBuf=0x%x, bufSize=%d\n", -+ (unsigned int)pBufInfo, -+ (unsigned int)pBufInfo->cmdSts, -+ (unsigned int)pBufInfo->pBuff, -+ (unsigned int)pBufInfo->bufSize); -+ mvOsPrintf("pData=0x%x, byteCnt=%d, pNext=0x%x, uInfo1=0x%x, uInfo2=0x%x\n", -+ (unsigned int)pBufInfo->pData, -+ (unsigned int)pBufInfo->byteCnt, -+ (unsigned int)pBufInfo->pNextBufInfo, -+ (unsigned int)pBufInfo->userInfo1, -+ (unsigned int)pBufInfo->userInfo2); -+ if(pBufInfo->pData != NULL) -+ { -+ if(size > pBufInfo->byteCnt) -+ size = pBufInfo->byteCnt; -+ mvDebugMemDump(pBufInfo->pData, size, access); -+ } -+} -+ -+void mvDebugPrintPktInfo(MV_PKT_INFO* pPktInfo, int size, int access) -+{ -+ int frag, len; -+ -+ if(pPktInfo == NULL) -+ { -+ mvOsPrintf("\n!!! pPktInfo = NULL\n"); -+ return; -+ } -+ mvOsPrintf("\npPkt=%p, stat=0x%08x, numFr=%d, size=%d, pFr=%p, osInfo=0x%lx\n", -+ pPktInfo, pPktInfo->status, pPktInfo->numFrags, pPktInfo->pktSize, -+ pPktInfo->pFrags, pPktInfo->osInfo); -+ -+ for(frag=0; frag<pPktInfo->numFrags; frag++) -+ { -+ mvOsPrintf("#%2d. bufVirt=%p, bufSize=%d\n", -+ frag, pPktInfo->pFrags[frag].bufVirtPtr, -+ pPktInfo->pFrags[frag].bufSize); -+ if(size > 0) -+ { -+ len = MV_MIN((int)pPktInfo->pFrags[frag].bufSize, size); -+ mvDebugMemDump(pPktInfo->pFrags[frag].bufVirtPtr, len, access); -+ size -= len; -+ } -+ } -+ -+} -+ -+void mvDebugPrintIpAddr(MV_U32 ipAddr) -+{ -+ mvOsPrintf("%d.%d.%d.%d", ((ipAddr >> 24) & 0xFF), ((ipAddr >> 16) & 0xFF), -+ ((ipAddr >> 8) & 0xFF), ((ipAddr >> 0) & 0xFF)); -+} -+ -+void mvDebugPrintMacAddr(const MV_U8* pMacAddr) -+{ -+ int i; -+ -+ mvOsPrintf("%02x", (unsigned int)pMacAddr[0]); -+ for(i=1; i<MV_MAC_ADDR_SIZE; i++) -+ { -+ mvOsPrintf(":%02x", pMacAddr[i]); -+ } -+ /* mvOsPrintf("\n");*/ -+} -+ -+ -+/******* There are three functions deals with MV_DEBUG_TIMES structure ********/ -+ -+/* Reset MV_DEBUG_TIMES entry */ -+void mvDebugResetTimeEntry(MV_DEBUG_TIMES* pTimeEntry, int count, char* pName) -+{ -+ pTimeEntry->begin = 0; -+ pTimeEntry->count = count; -+ pTimeEntry->end = 0; -+ pTimeEntry->left = pTimeEntry->count; -+ pTimeEntry->total = 0; -+ pTimeEntry->min = 0xFFFFFFFF; -+ pTimeEntry->max = 0x0; -+ strncpy(pTimeEntry->name, pName, sizeof(pTimeEntry->name)-1); -+ pTimeEntry->name[sizeof(pTimeEntry->name)-1] = '\0'; -+} -+ -+/* Print out MV_DEBUG_TIMES entry */ -+void mvDebugPrintTimeEntry(MV_DEBUG_TIMES* pTimeEntry, MV_BOOL isTitle) -+{ -+ int num; -+ -+ if(isTitle == MV_TRUE) -+ mvOsPrintf("Event NumOfEvents TotalTime Average Min Max\n"); -+ -+ num = pTimeEntry->count-pTimeEntry->left; -+ if(num > 0) -+ { -+ mvOsPrintf("%-11s %6u 0x%08lx %6lu %6lu %6lu\n", -+ pTimeEntry->name, num, pTimeEntry->total, pTimeEntry->total/num, -+ pTimeEntry->min, pTimeEntry->max); -+ } -+} -+ -+/* Update MV_DEBUG_TIMES entry */ -+void mvDebugUpdateTimeEntry(MV_DEBUG_TIMES* pTimeEntry) -+{ -+ MV_U32 delta; -+ -+ if(pTimeEntry->left > 0) -+ { -+ if(pTimeEntry->end <= pTimeEntry->begin) -+ { -+ delta = pTimeEntry->begin - pTimeEntry->end; -+ } -+ else -+ { -+ delta = ((MV_U32)0x10000 - pTimeEntry->end) + pTimeEntry->begin; -+ } -+ pTimeEntry->total += delta; -+ -+ if(delta < pTimeEntry->min) -+ pTimeEntry->min = delta; -+ -+ if(delta > pTimeEntry->max) -+ pTimeEntry->max = delta; -+ -+ pTimeEntry->left--; -+ } -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvDebug.h b/crypto/ocf/kirkwood/mvHal/common/mvDebug.h -new file mode 100644 -index 0000000..ed07a1f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvDebug.h -@@ -0,0 +1,178 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+ -+#ifndef __INCmvDebugh -+#define __INCmvDebugh -+ -+/* includes */ -+#include "mvTypes.h" -+ -+typedef enum -+{ -+ MV_MODULE_INVALID = -1, -+ MV_MODULE_ETH = 0, -+ MV_MODULE_IDMA, -+ MV_MODULE_XOR, -+ MV_MODULE_TWASI, -+ MV_MODULE_MGI, -+ MV_MODULE_USB, -+ MV_MODULE_CESA, -+ -+ MV_MODULE_MAX -+}MV_MODULE_ID; -+ -+/* Define generic flags useful for most of modules */ -+#define MV_DEBUG_FLAG_ALL (0) -+#define MV_DEBUG_FLAG_INIT (1 << 0) -+#define MV_DEBUG_FLAG_RX (1 << 1) -+#define MV_DEBUG_FLAG_TX (1 << 2) -+#define MV_DEBUG_FLAG_ERR (1 << 3) -+#define MV_DEBUG_FLAG_TRACE (1 << 4) -+#define MV_DEBUG_FLAG_DUMP (1 << 5) -+#define MV_DEBUG_FLAG_CACHE (1 << 6) -+#define MV_DEBUG_FLAG_IOCTL (1 << 7) -+#define MV_DEBUG_FLAG_STATS (1 << 8) -+ -+extern MV_U32 mvDebug; -+extern MV_U32 mvDebugModules[MV_MODULE_MAX]; -+ -+#ifdef MV_DEBUG -+# define MV_DEBUG_PRINT(module, flags, msg) mvOsPrintf msg -+# define MV_DEBUG_CODE(module, flags, code) code -+#elif defined(MV_RT_DEBUG) -+# define MV_DEBUG_PRINT(module, flags, msg) \ -+ if( (mvDebug & (1<<(module))) && \ -+ ((mvDebugModules[(module)] & (flags)) == (flags)) ) \ -+ mvOsPrintf msg -+# define MV_DEBUG_CODE(module, flags, code) \ -+ if( (mvDebug & (1<<(module))) && \ -+ ((mvDebugModules[(module)] & (flags)) == (flags)) ) \ -+ code -+#else -+# define MV_DEBUG_PRINT(module, flags, msg) -+# define MV_DEBUG_CODE(module, flags, code) -+#endif -+ -+ -+ -+/* typedefs */ -+ -+/* time measurement structure used to check how much time pass between -+ * two points -+ */ -+typedef struct { -+ char name[20]; /* name of the entry */ -+ unsigned long begin; /* time measured on begin point */ -+ unsigned long end; /* time measured on end point */ -+ unsigned long total; /* Accumulated time */ -+ unsigned long left; /* The rest measurement actions */ -+ unsigned long count; /* Maximum measurement actions */ -+ unsigned long min; /* Minimum time from begin to end */ -+ unsigned long max; /* Maximum time from begin to end */ -+} MV_DEBUG_TIMES; -+ -+ -+/* mvDebug.h API list */ -+ -+/****** Error Recording ******/ -+ -+/* Dump memory in specific format: -+ * address: X1X1X1X1 X2X2X2X2 ... X8X8X8X8 -+ */ -+void mvDebugMemDump(void* addr, int size, int access); -+ -+void mvDebugPrintBufInfo(BUF_INFO* pBufInfo, int size, int access); -+ -+void mvDebugPrintPktInfo(MV_PKT_INFO* pPktInfo, int size, int access); -+ -+void mvDebugPrintIpAddr(MV_U32 ipAddr); -+ -+void mvDebugPrintMacAddr(const MV_U8* pMacAddr); -+ -+/**** There are three functions deals with MV_DEBUG_TIMES structure ****/ -+ -+/* Reset MV_DEBUG_TIMES entry */ -+void mvDebugResetTimeEntry(MV_DEBUG_TIMES* pTimeEntry, int count, char* name); -+ -+/* Update MV_DEBUG_TIMES entry */ -+void mvDebugUpdateTimeEntry(MV_DEBUG_TIMES* pTimeEntry); -+ -+/* Print out MV_DEBUG_TIMES entry */ -+void mvDebugPrintTimeEntry(MV_DEBUG_TIMES* pTimeEntry, MV_BOOL isTitle); -+ -+ -+/******** General ***********/ -+ -+/* Change value of mvDebugPrint global variable */ -+ -+void mvDebugInit(void); -+void mvDebugModuleEnable(MV_MODULE_ID module, MV_BOOL isEnable); -+void mvDebugModuleSetFlags(MV_MODULE_ID module, MV_U32 flags); -+void mvDebugModuleClearFlags(MV_MODULE_ID module, MV_U32 flags); -+ -+ -+#endif /* __INCmvDebug.h */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvDeviceId.h b/crypto/ocf/kirkwood/mvHal/common/mvDeviceId.h -new file mode 100644 -index 0000000..2e0c04f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvDeviceId.h -@@ -0,0 +1,225 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvDeviceIdh -+#define __INCmvDeviceIdh -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* defines */ -+#define MARVELL_VEN_ID 0x11ab -+ -+/* Disco-3 */ -+#define MV64460_DEV_ID 0x6480 -+#define MV64460B_DEV_ID 0x6485 -+#define MV64430_DEV_ID 0x6420 -+ -+/* Disco-5 */ -+#define MV64560_DEV_ID 0x6450 -+ -+/* Disco-6 */ -+#define MV64660_DEV_ID 0x6460 -+ -+/* Orion */ -+#define MV_1181_DEV_ID 0x1181 -+#define MV_5181_DEV_ID 0x5181 -+#define MV_5281_DEV_ID 0x5281 -+#define MV_5182_DEV_ID 0x5182 -+#define MV_8660_DEV_ID 0x8660 -+#define MV_5180_DEV_ID 0x5180 -+#define MV_5082_DEV_ID 0x5082 -+#define MV_1281_DEV_ID 0x1281 -+#define MV_6082_DEV_ID 0x6082 -+#define MV_6183_DEV_ID 0x6183 -+#define MV_6183L_DEV_ID 0x6083 -+ -+#define MV_5281_D0_REV 0x4 -+#define MV_5281_D0_ID ((MV_5281_DEV_ID << 16) | MV_5281_D0_REV) -+#define MV_5281_D0_NAME "88F5281 D0" -+ -+#define MV_5281_D1_REV 0x5 -+#define MV_5281_D1_ID ((MV_5281_DEV_ID << 16) | MV_5281_D1_REV) -+#define MV_5281_D1_NAME "88F5281 D1" -+ -+#define MV_5281_D2_REV 0x6 -+#define MV_5281_D2_ID ((MV_5281_DEV_ID << 16) | MV_5281_D2_REV) -+#define MV_5281_D2_NAME "88F5281 D2" -+ -+ -+#define MV_5181L_A0_REV 0x8 /* need for PCIE Er */ -+#define MV_5181_A1_REV 0x1 /* for USB Er ..*/ -+#define MV_5181_B0_REV 0x2 -+#define MV_5181_B1_REV 0x3 -+#define MV_5182_A1_REV 0x1 -+#define MV_5180N_B1_REV 0x3 -+#define MV_5181L_A0_ID ((MV_5181_DEV_ID << 16) | MV_5181L_A0_REV) -+ -+ -+ -+/* kw */ -+#define MV_6281_DEV_ID 0x6281 -+#define MV_6192_DEV_ID 0x6192 -+#define MV_6190_DEV_ID 0x6190 -+#define MV_6180_DEV_ID 0x6180 -+ -+#define MV_6281_A0_REV 0x2 -+#define MV_6281_A0_ID ((MV_6281_DEV_ID << 16) | MV_6281_A0_REV) -+#define MV_6281_A0_NAME "88F6281 A0" -+ -+#define MV_6192_A0_REV 0x2 -+#define MV_6192_A0_ID ((MV_6192_DEV_ID << 16) | MV_6192_A0_REV) -+#define MV_6192_A0_NAME "88F6192 A0" -+ -+#define MV_6190_A0_REV 0x2 -+#define MV_6190_A0_ID ((MV_6190_DEV_ID << 16) | MV_6190_A0_REV) -+#define MV_6190_A0_NAME "88F6190 A0" -+ -+#define MV_6180_A0_REV 0x2 -+#define MV_6180_A0_ID ((MV_6180_DEV_ID << 16) | MV_6180_A0_REV) -+#define MV_6180_A0_NAME "88F6180 A0" -+ -+#define MV_6281_A1_REV 0x3 -+#define MV_6281_A1_ID ((MV_6281_DEV_ID << 16) | MV_6281_A1_REV) -+#define MV_6281_A1_NAME "88F6281 A1" -+ -+#define MV_6192_A1_REV 0x3 -+#define MV_6192_A1_ID ((MV_6192_DEV_ID << 16) | MV_6192_A1_REV) -+#define MV_6192_A1_NAME "88F6192 A1" -+ -+#define MV_6190_A1_REV 0x3 -+#define MV_6190_A1_ID ((MV_6190_DEV_ID << 16) | MV_6190_A1_REV) -+#define MV_6190_A1_NAME "88F6190 A1" -+ -+#define MV_6180_A1_REV 0x3 -+#define MV_6180_A1_ID ((MV_6180_DEV_ID << 16) | MV_6180_A1_REV) -+#define MV_6180_A1_NAME "88F6180 A1" -+ -+#define MV_88F6XXX_A0_REV 0x2 -+#define MV_88F6XXX_A1_REV 0x3 -+/* Disco-Duo */ -+#define MV_78XX0_ZY_DEV_ID 0x6381 -+#define MV_78XX0_ZY_NAME "MV78X00" -+ -+#define MV_78XX0_Z0_REV 0x1 -+#define MV_78XX0_Z0_ID ((MV_78XX0_ZY_DEV_ID << 16) | MV_78XX0_Z0_REV) -+#define MV_78XX0_Z0_NAME "78X00 Z0" -+ -+#define MV_78XX0_Y0_REV 0x2 -+#define MV_78XX0_Y0_ID ((MV_78XX0_ZY_DEV_ID << 16) | MV_78XX0_Y0_REV) -+#define MV_78XX0_Y0_NAME "78X00 Y0" -+ -+#define MV_78XX0_DEV_ID 0x7800 -+#define MV_78XX0_NAME "MV78X00" -+ -+#define MV_76100_DEV_ID 0x7610 -+#define MV_78200_DEV_ID 0x7820 -+#define MV_78100_DEV_ID 0x7810 -+#define MV_78XX0_A0_REV 0x1 -+#define MV_78XX0_A1_REV 0x2 -+ -+#define MV_76100_NAME "MV76100" -+#define MV_78100_NAME "MV78100" -+#define MV_78200_NAME "MV78200" -+ -+#define MV_76100_A0_ID ((MV_76100_DEV_ID << 16) | MV_78XX0_A0_REV) -+#define MV_78100_A0_ID ((MV_78100_DEV_ID << 16) | MV_78XX0_A0_REV) -+#define MV_78200_A0_ID ((MV_78200_DEV_ID << 16) | MV_78XX0_A0_REV) -+ -+#define MV_76100_A1_ID ((MV_76100_DEV_ID << 16) | MV_78XX0_A1_REV) -+#define MV_78100_A1_ID ((MV_78100_DEV_ID << 16) | MV_78XX0_A1_REV) -+#define MV_78200_A1_ID ((MV_78200_DEV_ID << 16) | MV_78XX0_A1_REV) -+ -+#define MV_76100_A0_NAME "MV76100 A0" -+#define MV_78100_A0_NAME "MV78100 A0" -+#define MV_78200_A0_NAME "MV78200 A0" -+#define MV_78XX0_A0_NAME "MV78XX0 A0" -+ -+#define MV_76100_A1_NAME "MV76100 A1" -+#define MV_78100_A1_NAME "MV78100 A1" -+#define MV_78200_A1_NAME "MV78200 A1" -+#define MV_78XX0_A1_NAME "MV78XX0 A1" -+ -+/*MV88F632X family*/ -+#define MV_6321_DEV_ID 0x6321 -+#define MV_6322_DEV_ID 0x6322 -+#define MV_6323_DEV_ID 0x6323 -+ -+#define MV_6321_NAME "88F6321" -+#define MV_6322_NAME "88F6322" -+#define MV_6323_NAME "88F6323" -+ -+#define MV_632X_A1_REV 0x2 -+ -+#define MV_6321_A1_ID ((MV_6321_DEV_ID << 16) | MV_632X_A1_REV) -+#define MV_6322_A1_ID ((MV_6322_DEV_ID << 16) | MV_632X_A1_REV) -+#define MV_6323_A1_ID ((MV_6323_DEV_ID << 16) | MV_632X_A1_REV) -+ -+#define MV_6321_A1_NAME "88F6321 A1" -+#define MV_6322_A1_NAME "88F6322 A1" -+#define MV_6323_A1_NAME "88F6323 A1" -+ -+ -+#endif /* __INCmvDeviceIdh */ -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvHalVer.h b/crypto/ocf/kirkwood/mvHal/common/mvHalVer.h -new file mode 100644 -index 0000000..1849198 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvHalVer.h -@@ -0,0 +1,73 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvHalVerh -+#define __INCmvHalVerh -+ -+/* Defines */ -+#define MV_HAL_VERSION "FEROCEON_HAL_3_1_7" -+#define MV_RELEASE_BASELINE "SoCandControllers_FEROCEON_RELEASE_7_9_2009_KW_4_3_4_DD_2_1_4_6183_1_1_4" -+ -+#endif /* __INCmvHalVerh */ -\ No newline at end of file -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvStack.c b/crypto/ocf/kirkwood/mvHal/common/mvStack.c -new file mode 100644 -index 0000000..7ba48ea ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvStack.c -@@ -0,0 +1,100 @@ -+/******************************************************************************* -+* Copyright 2003, Marvell Semiconductor Israel LTD. * -+* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL. * -+* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT * -+* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE * -+* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL. * -+* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED, * -+* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE. * -+* * -+* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, * -+* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL * -+* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K. * -+* (MJKK), MARVELL SEMICONDUCTOR ISRAEL LTD (MSIL). * -+******************************************************************************** -+* mvQueue.c -+* -+* FILENAME: $Workfile: mvStack.c $ -+* REVISION: $Revision: 1.1 $ -+* LAST UPDATE: $Modtime: $ -+* -+* DESCRIPTION: -+* This file implements simple Stack LIFO functionality. -+*******************************************************************************/ -+ -+/* includes */ -+#include "mvOs.h" -+#include "mvTypes.h" -+#include "mvDebug.h" -+#include "mvStack.h" -+ -+/* defines */ -+ -+ -+/* Public functions */ -+ -+ -+/* Purpose: Create new stack -+ * Inputs: -+ * - MV_U32 noOfElements - maximum number of elements in the stack. -+ * Each element 4 bytes size -+ * Return: void* - pointer to created stack. -+ */ -+void* mvStackCreate(int numOfElements) -+{ -+ MV_STACK* pStack; -+ MV_U32* pStackElements; -+ -+ pStack = (MV_STACK*)mvOsMalloc(sizeof(MV_STACK)); -+ pStackElements = (MV_U32*)mvOsMalloc(numOfElements*sizeof(MV_U32)); -+ if( (pStack == NULL) || (pStackElements == NULL) ) -+ { -+ mvOsPrintf("mvStack: Can't create new stack\n"); -+ return NULL; -+ } -+ memset(pStackElements, 0, numOfElements*sizeof(MV_U32)); -+ pStack->numOfElements = numOfElements; -+ pStack->stackIdx = 0; -+ pStack->stackElements = pStackElements; -+ -+ return pStack; -+} -+ -+/* Purpose: Delete existing stack -+ * Inputs: -+ * - void* stackHndl - Stack handle as returned by "mvStackCreate()" function -+ * -+ * Return: MV_STATUS MV_NOT_FOUND - Failure. StackHandle is not valid. -+ * MV_OK - Success. -+ */ -+MV_STATUS mvStackDelete(void* stackHndl) -+{ -+ MV_STACK* pStack = (MV_STACK*)stackHndl; -+ -+ if( (pStack == NULL) || (pStack->stackElements == NULL) ) -+ return MV_NOT_FOUND; -+ -+ mvOsFree(pStack->stackElements); -+ mvOsFree(pStack); -+ -+ return MV_OK; -+} -+ -+ -+/* PrintOut status of the stack */ -+void mvStackStatus(void* stackHndl, MV_BOOL isPrintElements) -+{ -+ int i; -+ MV_STACK* pStack = (MV_STACK*)stackHndl; -+ -+ mvOsPrintf("StackHandle=%p, pElements=%p, numElements=%d, stackIdx=%d\n", -+ stackHndl, pStack->stackElements, pStack->numOfElements, -+ pStack->stackIdx); -+ if(isPrintElements == MV_TRUE) -+ { -+ for(i=0; i<pStack->stackIdx; i++) -+ { -+ mvOsPrintf("%3d. Value=0x%x\n", i, pStack->stackElements[i]); -+ } -+ } -+} -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvStack.h b/crypto/ocf/kirkwood/mvHal/common/mvStack.h -new file mode 100644 -index 0000000..7e33d91 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvStack.h -@@ -0,0 +1,140 @@ -+/******************************************************************************* -+* Copyright 2003, Marvell Semiconductor Israel LTD. * -+* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL. * -+* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT * -+* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE * -+* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL. * -+* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED, * -+* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE. * -+* * -+* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, * -+* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL * -+* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K. * -+* (MJKK), MARVELL SEMICONDUCTOR ISRAEL LTD (MSIL). * -+******************************************************************************** -+* mvStack.h - Header File for : -+* -+* FILENAME: $Workfile: mvStack.h $ -+* REVISION: $Revision: 1.1 $ -+* LAST UPDATE: $Modtime: $ -+* -+* DESCRIPTION: -+* This file defines simple Stack (LIFO) functionality. -+* -+*******************************************************************************/ -+ -+#ifndef __mvStack_h__ -+#define __mvStack_h__ -+ -+ -+/* includes */ -+#include "mvTypes.h" -+ -+ -+/* defines */ -+ -+ -+/* typedefs */ -+/* Data structure describes general purpose Stack */ -+typedef struct -+{ -+ int stackIdx; -+ int numOfElements; -+ MV_U32* stackElements; -+} MV_STACK; -+ -+static INLINE MV_BOOL mvStackIsFull(void* stackHndl) -+{ -+ MV_STACK* pStack = (MV_STACK*)stackHndl; -+ -+ if(pStack->stackIdx == pStack->numOfElements) -+ return MV_TRUE; -+ -+ return MV_FALSE; -+} -+ -+static INLINE MV_BOOL mvStackIsEmpty(void* stackHndl) -+{ -+ MV_STACK* pStack = (MV_STACK*)stackHndl; -+ -+ if(pStack->stackIdx == 0) -+ return MV_TRUE; -+ -+ return MV_FALSE; -+} -+/* Purpose: Push new element to stack -+ * Inputs: -+ * - void* stackHndl - Stack handle as returned by "mvStackCreate()" function. -+ * - MV_U32 value - New element. -+ * -+ * Return: MV_STATUS MV_FULL - Failure. Stack is full. -+ * MV_OK - Success. Element is put to stack. -+ */ -+static INLINE void mvStackPush(void* stackHndl, MV_U32 value) -+{ -+ MV_STACK* pStack = (MV_STACK*)stackHndl; -+ -+#ifdef MV_RT_DEBUG -+ if(pStack->stackIdx == pStack->numOfElements) -+ { -+ mvOsPrintf("mvStackPush: Stack is FULL\n"); -+ return; -+ } -+#endif /* MV_RT_DEBUG */ -+ -+ pStack->stackElements[pStack->stackIdx] = value; -+ pStack->stackIdx++; -+} -+ -+/* Purpose: Pop element from the top of stack and copy it to "pValue" -+ * Inputs: -+ * - void* stackHndl - Stack handle as returned by "mvStackCreate()" function. -+ * - MV_U32 value - Element in the top of stack. -+ * -+ * Return: MV_STATUS MV_EMPTY - Failure. Stack is empty. -+ * MV_OK - Success. Element is removed from the stack and -+ * copied to pValue argument -+ */ -+static INLINE MV_U32 mvStackPop(void* stackHndl) -+{ -+ MV_STACK* pStack = (MV_STACK*)stackHndl; -+ -+#ifdef MV_RT_DEBUG -+ if(pStack->stackIdx == 0) -+ { -+ mvOsPrintf("mvStackPop: Stack is EMPTY\n"); -+ return 0; -+ } -+#endif /* MV_RT_DEBUG */ -+ -+ pStack->stackIdx--; -+ return pStack->stackElements[pStack->stackIdx]; -+} -+ -+static INLINE int mvStackIndex(void* stackHndl) -+{ -+ MV_STACK* pStack = (MV_STACK*)stackHndl; -+ -+ return pStack->stackIdx; -+} -+ -+static INLINE int mvStackFreeElements(void* stackHndl) -+{ -+ MV_STACK* pStack = (MV_STACK*)stackHndl; -+ -+ return (pStack->numOfElements - pStack->stackIdx); -+} -+ -+/* mvStack.h API list */ -+ -+/* Create new Stack */ -+void* mvStackCreate(int numOfElements); -+ -+/* Delete existing stack */ -+MV_STATUS mvStackDelete(void* stackHndl); -+ -+/* Print status of the stack */ -+void mvStackStatus(void* stackHndl, MV_BOOL isPrintElements); -+ -+#endif /* __mvStack_h__ */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/common/mvTypes.h b/crypto/ocf/kirkwood/mvHal/common/mvTypes.h -new file mode 100644 -index 0000000..1538a24 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/common/mvTypes.h -@@ -0,0 +1,245 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvTypesh -+#define __INCmvTypesh -+ -+/* Defines */ -+ -+/* The following is a list of Marvell status */ -+#define MV_ERROR (-1) -+#define MV_OK (0x00) /* Operation succeeded */ -+#define MV_FAIL (0x01) /* Operation failed */ -+#define MV_BAD_VALUE (0x02) /* Illegal value (general) */ -+#define MV_OUT_OF_RANGE (0x03) /* The value is out of range */ -+#define MV_BAD_PARAM (0x04) /* Illegal parameter in function called */ -+#define MV_BAD_PTR (0x05) /* Illegal pointer value */ -+#define MV_BAD_SIZE (0x06) /* Illegal size */ -+#define MV_BAD_STATE (0x07) /* Illegal state of state machine */ -+#define MV_SET_ERROR (0x08) /* Set operation failed */ -+#define MV_GET_ERROR (0x09) /* Get operation failed */ -+#define MV_CREATE_ERROR (0x0A) /* Fail while creating an item */ -+#define MV_NOT_FOUND (0x0B) /* Item not found */ -+#define MV_NO_MORE (0x0C) /* No more items found */ -+#define MV_NO_SUCH (0x0D) /* No such item */ -+#define MV_TIMEOUT (0x0E) /* Time Out */ -+#define MV_NO_CHANGE (0x0F) /* Parameter(s) is already in this value */ -+#define MV_NOT_SUPPORTED (0x10) /* This request is not support */ -+#define MV_NOT_IMPLEMENTED (0x11) /* Request supported but not implemented */ -+#define MV_NOT_INITIALIZED (0x12) /* The item is not initialized */ -+#define MV_NO_RESOURCE (0x13) /* Resource not available (memory ...) */ -+#define MV_FULL (0x14) /* Item is full (Queue or table etc...) */ -+#define MV_EMPTY (0x15) /* Item is empty (Queue or table etc...) */ -+#define MV_INIT_ERROR (0x16) /* Error occured while INIT process */ -+#define MV_HW_ERROR (0x17) /* Hardware error */ -+#define MV_TX_ERROR (0x18) /* Transmit operation not succeeded */ -+#define MV_RX_ERROR (0x19) /* Recieve operation not succeeded */ -+#define MV_NOT_READY (0x1A) /* The other side is not ready yet */ -+#define MV_ALREADY_EXIST (0x1B) /* Tried to create existing item */ -+#define MV_OUT_OF_CPU_MEM (0x1C) /* Cpu memory allocation failed. */ -+#define MV_NOT_STARTED (0x1D) /* Not started yet */ -+#define MV_BUSY (0x1E) /* Item is busy. */ -+#define MV_TERMINATE (0x1F) /* Item terminates it's work. */ -+#define MV_NOT_ALIGNED (0x20) /* Wrong alignment */ -+#define MV_NOT_ALLOWED (0x21) /* Operation NOT allowed */ -+#define MV_WRITE_PROTECT (0x22) /* Write protected */ -+ -+ -+#define MV_INVALID (int)(-1) -+ -+#define MV_FALSE 0 -+#define MV_TRUE (!(MV_FALSE)) -+ -+ -+#ifndef NULL -+#define NULL ((void*)0) -+#endif -+ -+ -+#ifndef MV_ASMLANGUAGE -+/* typedefs */ -+ -+typedef char MV_8; -+typedef unsigned char MV_U8; -+ -+typedef int MV_32; -+typedef unsigned int MV_U32; -+ -+typedef short MV_16; -+typedef unsigned short MV_U16; -+ -+#ifdef MV_PPC64 -+typedef long MV_64; -+typedef unsigned long MV_U64; -+#else -+typedef long long MV_64; -+typedef unsigned long long MV_U64; -+#endif -+ -+typedef long MV_LONG; /* 32/64 */ -+typedef unsigned long MV_ULONG; /* 32/64 */ -+ -+typedef int MV_STATUS; -+typedef int MV_BOOL; -+typedef void MV_VOID; -+typedef float MV_FLOAT; -+ -+typedef int (*MV_FUNCPTR) (void); /* ptr to function returning int */ -+typedef void (*MV_VOIDFUNCPTR) (void); /* ptr to function returning void */ -+typedef double (*MV_DBLFUNCPTR) (void); /* ptr to function returning double*/ -+typedef float (*MV_FLTFUNCPTR) (void); /* ptr to function returning float */ -+ -+typedef MV_U32 MV_KHZ; -+typedef MV_U32 MV_MHZ; -+typedef MV_U32 MV_HZ; -+ -+ -+/* This enumerator describes the set of commands that can be applied on */ -+/* an engine (e.g. IDMA, XOR). Appling a comman depends on the current */ -+/* status (see MV_STATE enumerator) */ -+/* Start can be applied only when status is IDLE */ -+/* Stop can be applied only when status is IDLE, ACTIVE or PAUSED */ -+/* Pause can be applied only when status is ACTIVE */ -+/* Restart can be applied only when status is PAUSED */ -+typedef enum _mvCommand -+{ -+ MV_START, /* Start */ -+ MV_STOP, /* Stop */ -+ MV_PAUSE, /* Pause */ -+ MV_RESTART /* Restart */ -+} MV_COMMAND; -+ -+/* This enumerator describes the set of state conditions. */ -+/* Moving from one state to other is stricted. */ -+typedef enum _mvState -+{ -+ MV_IDLE, -+ MV_ACTIVE, -+ MV_PAUSED, -+ MV_UNDEFINED_STATE -+} MV_STATE; -+ -+ -+/* This structure describes address space window. Window base can be */ -+/* 64 bit, window size up to 4GB */ -+typedef struct _mvAddrWin -+{ -+ MV_U32 baseLow; /* 32bit base low */ -+ MV_U32 baseHigh; /* 32bit base high */ -+ MV_U32 size; /* 32bit size */ -+}MV_ADDR_WIN; -+ -+/* This binary enumerator describes protection attribute status */ -+typedef enum _mvProtRight -+{ -+ ALLOWED, /* Protection attribute allowed */ -+ FORBIDDEN /* Protection attribute forbidden */ -+}MV_PROT_RIGHT; -+ -+/* Unified struct for Rx and Tx packet operations. The user is required to */ -+/* be familier only with Tx/Rx descriptor command status. */ -+typedef struct _bufInfo -+{ -+ MV_U32 cmdSts; /* Tx/Rx command status */ -+ MV_U16 byteCnt; /* Size of valid data in the buffer */ -+ MV_U16 bufSize; /* Total size of the buffer */ -+ MV_U8 *pBuff; /* Pointer to Buffer */ -+ MV_U8 *pData; /* Pointer to data in the Buffer */ -+ MV_U32 userInfo1; /* Tx/Rx attached user information 1 */ -+ MV_U32 userInfo2; /* Tx/Rx attached user information 2 */ -+ struct _bufInfo *pNextBufInfo; /* Next buffer in packet */ -+} BUF_INFO; -+ -+/* This structure contains information describing one of buffers -+ * (fragments) they are built Ethernet packet. -+ */ -+typedef struct -+{ -+ MV_U8* bufVirtPtr; -+ MV_ULONG bufPhysAddr; -+ MV_U32 bufSize; -+ MV_U32 dataSize; -+ MV_U32 memHandle; -+ MV_32 bufAddrShift; -+} MV_BUF_INFO; -+ -+/* This structure contains information describing Ethernet packet. -+ * The packet can be divided for few buffers (fragments) -+ */ -+typedef struct -+{ -+ MV_ULONG osInfo; -+ MV_BUF_INFO *pFrags; -+ MV_U32 status; -+ MV_U16 pktSize; -+ MV_U16 numFrags; -+ MV_U32 ownerId; -+ MV_U32 fragIP; -+} MV_PKT_INFO; -+ -+#endif /* MV_ASMLANGUAGE */ -+ -+#endif /* __INCmvTypesh */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/dbg-trace.c b/crypto/ocf/kirkwood/mvHal/dbg-trace.c -new file mode 100644 -index 0000000..6576d35 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/dbg-trace.c -@@ -0,0 +1,110 @@ -+#include <linux/kernel.h> -+#include <linux/slab.h> -+#include <linux/time.h> -+#include "dbg-trace.h" -+ -+#define TRACE_ARR_LEN 800 -+#define STR_LEN 128 -+struct trace { -+ struct timeval tv; -+ char str[STR_LEN]; -+ unsigned int callback_val1; -+ unsigned int callback_val2; -+ char valid; -+}; -+static unsigned int (*trc_callback1) (unsigned char) = NULL; -+static unsigned int (*trc_callback2) (unsigned char) = NULL; -+static unsigned char trc_param1 = 0; -+static unsigned char trc_param2 = 0; -+struct trace *trc_arr; -+static int trc_index; -+static int trc_active = 0; -+ -+void TRC_START() -+{ -+ trc_active = 1; -+} -+ -+void TRC_STOP() -+{ -+ trc_active = 0; -+} -+ -+void TRC_INIT(void *callback1, void *callback2, unsigned char callback1_param, unsigned char callback2_param) -+{ -+ printk("Marvell debug tracing is on\n"); -+ trc_arr = (struct trace *)kmalloc(TRACE_ARR_LEN*sizeof(struct trace),GFP_KERNEL); -+ if(trc_arr == NULL) -+ { -+ printk("Can't allocate Debug Trace buffer\n"); -+ return; -+ } -+ memset(trc_arr,0,TRACE_ARR_LEN*sizeof(struct trace)); -+ trc_index = 0; -+ trc_callback1 = callback1; -+ trc_callback2 = callback2; -+ trc_param1 = callback1_param; -+ trc_param2 = callback2_param; -+} -+void TRC_REC(char *fmt,...) -+{ -+ va_list args; -+ struct trace *trc = &trc_arr[trc_index]; -+ -+ if(trc_active == 0) -+ return; -+ -+ do_gettimeofday(&trc->tv); -+ if(trc_callback1) -+ trc->callback_val1 = trc_callback1(trc_param1); -+ if(trc_callback2) -+ trc->callback_val2 = trc_callback2(trc_param2); -+ va_start(args, fmt); -+ vsprintf(trc->str,fmt,args); -+ va_end(args); -+ trc->valid = 1; -+ if((++trc_index) == TRACE_ARR_LEN) { -+ trc_index = 0; -+ } -+} -+void TRC_OUTPUT(void) -+{ -+ int i,j; -+ struct trace *p; -+ printk("\n\nTrace %d items\n",TRACE_ARR_LEN); -+ for(i=0,j=trc_index; i<TRACE_ARR_LEN; i++,j++) { -+ if(j == TRACE_ARR_LEN) -+ j = 0; -+ p = &trc_arr[j]; -+ if(p->valid) { -+ unsigned long uoffs; -+ struct trace *plast; -+ if(p == &trc_arr[0]) -+ plast = &trc_arr[TRACE_ARR_LEN-1]; -+ else -+ plast = p-1; -+ if(p->tv.tv_sec == ((plast)->tv.tv_sec)) -+ uoffs = (p->tv.tv_usec - ((plast)->tv.tv_usec)); -+ else -+ uoffs = (1000000 - ((plast)->tv.tv_usec)) + -+ ((p->tv.tv_sec - ((plast)->tv.tv_sec) - 1) * 1000000) + -+ p->tv.tv_usec; -+ printk("%03d: [+%ld usec]", j, (unsigned long)uoffs); -+ if(trc_callback1) -+ printk("[%u]",p->callback_val1); -+ if(trc_callback2) -+ printk("[%u]",p->callback_val2); -+ printk(": %s",p->str); -+ } -+ p->valid = 0; -+ } -+ memset(trc_arr,0,TRACE_ARR_LEN*sizeof(struct trace)); -+ trc_index = 0; -+} -+void TRC_RELEASE(void) -+{ -+ kfree(trc_arr); -+ trc_index = 0; -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/dbg-trace.h b/crypto/ocf/kirkwood/mvHal/dbg-trace.h -new file mode 100644 -index 0000000..e3dd480 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/dbg-trace.h -@@ -0,0 +1,24 @@ -+ -+#ifndef _MV_DBG_TRCE_H_ -+#define _MV_DBG_TRCE_H_ -+ -+#ifdef CONFIG_MV_DBG_TRACE -+void TRC_INIT(void *callback1, void *callback2, -+ unsigned char callback1_param, unsigned char callback2_param); -+void TRC_REC(char *fmt,...); -+void TRC_OUTPUT(void); -+void TRC_RELEASE(void); -+void TRC_START(void); -+void TRC_STOP(void); -+ -+#else -+#define TRC_INIT(x1,x2,x3,x4) -+#define TRC_REC(X...) -+#define TRC_OUTPUT() -+#define TRC_RELEASE() -+#define TRC_START() -+#define TRC_STOP() -+#endif -+ -+ -+#endif -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvLib.c b/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvLib.c -new file mode 100644 -index 0000000..8a6ba2c ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvLib.c -@@ -0,0 +1,2513 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "boardEnv/mvBoardEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "cpu/mvCpu.h" -+#include "cntmr/mvCntmr.h" -+#include "gpp/mvGpp.h" -+#include "twsi/mvTwsi.h" -+#include "pex/mvPex.h" -+#include "device/mvDevice.h" -+#include "eth/gbe/mvEthRegs.h" -+ -+/* defines */ -+/* #define MV_DEBUG */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+extern MV_CPU_ARM_CLK _cpuARMDDRCLK[]; -+ -+#define CODE_IN_ROM MV_FALSE -+#define CODE_IN_RAM MV_TRUE -+ -+extern MV_BOARD_INFO* boardInfoTbl[]; -+#define BOARD_INFO(boardId) boardInfoTbl[boardId - BOARD_ID_BASE] -+ -+/* Locals */ -+static MV_DEV_CS_INFO* boardGetDevEntry(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); -+ -+MV_U32 tClkRate = -1; -+ -+ -+/******************************************************************************* -+* mvBoardEnvInit - Init board -+* -+* DESCRIPTION: -+* In this function the board environment take care of device bank -+* initialization. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvBoardEnvInit(MV_VOID) -+{ -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardEnvInit:Board unknown.\n"); -+ return; -+ -+ } -+ -+ /* Set GPP Out value */ -+ MV_REG_WRITE(GPP_DATA_OUT_REG(0), BOARD_INFO(boardId)->gppOutValLow); -+ MV_REG_WRITE(GPP_DATA_OUT_REG(1), BOARD_INFO(boardId)->gppOutValHigh); -+ -+ /* set GPP polarity */ -+ mvGppPolaritySet(0, 0xFFFFFFFF, BOARD_INFO(boardId)->gppPolarityValLow); -+ mvGppPolaritySet(1, 0xFFFFFFFF, BOARD_INFO(boardId)->gppPolarityValHigh); -+ -+ /* Workaround for Erratum FE-MISC-70*/ -+ if(mvCtrlRevGet()==MV_88F6XXX_A0_REV) -+ { -+ BOARD_INFO(boardId)->gppOutEnValLow &= 0xfffffffd; -+ BOARD_INFO(boardId)->gppOutEnValLow |= (BOARD_INFO(boardId)->gppOutEnValHigh) & 0x00000002; -+ } /*End of WA*/ -+ -+ /* Set GPP Out Enable*/ -+ mvGppTypeSet(0, 0xFFFFFFFF, BOARD_INFO(boardId)->gppOutEnValLow); -+ mvGppTypeSet(1, 0xFFFFFFFF, BOARD_INFO(boardId)->gppOutEnValHigh); -+ -+ /* Nand CE */ -+ MV_REG_BIT_SET(NAND_CTRL_REG, NAND_ACTCEBOOT_BIT); -+} -+ -+/******************************************************************************* -+* mvBoardModelGet - Get Board model -+* -+* DESCRIPTION: -+* This function returns 16bit describing board model. -+* Board model is constructed of one byte major and minor numbers in the -+* following manner: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* String describing board model. -+* -+*******************************************************************************/ -+MV_U16 mvBoardModelGet(MV_VOID) -+{ -+ return (mvBoardIdGet() >> 16); -+} -+ -+/******************************************************************************* -+* mbBoardRevlGet - Get Board revision -+* -+* DESCRIPTION: -+* This function returns a 32bit describing the board revision. -+* Board revision is constructed of 4bytes. 2bytes describes major number -+* and the other 2bytes describes minor munber. -+* For example for board revision 3.4 the function will return -+* 0x00030004. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* String describing board model. -+* -+*******************************************************************************/ -+MV_U16 mvBoardRevGet(MV_VOID) -+{ -+ return (mvBoardIdGet() & 0xFFFF); -+} -+ -+/******************************************************************************* -+* mvBoardNameGet - Get Board name -+* -+* DESCRIPTION: -+* This function returns a string describing the board model and revision. -+* String is extracted from board I2C EEPROM. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* pNameBuff - Buffer to contain board name string. Minimum size 32 chars. -+* -+* RETURN: -+* -+* MV_ERROR if informantion can not be read. -+*******************************************************************************/ -+MV_STATUS mvBoardNameGet(char *pNameBuff) -+{ -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsSPrintf (pNameBuff, "Board unknown.\n"); -+ return MV_ERROR; -+ -+ } -+ -+ mvOsSPrintf (pNameBuff, "%s",BOARD_INFO(boardId)->boardName); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvBoardIsPortInSgmii - -+* -+* DESCRIPTION: -+* This routine returns MV_TRUE for port number works in SGMII or MV_FALSE -+* For all other options. -+* -+* INPUT: -+* ethPortNum - Ethernet port number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE - port in SGMII. -+* MV_FALSE - other. -+* -+*******************************************************************************/ -+MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum) -+{ -+ MV_BOOL ethPortSgmiiSupport[BOARD_ETH_PORT_NUM] = MV_ETH_PORT_SGMII; -+ -+ if(ethPortNum >= BOARD_ETH_PORT_NUM) -+ { -+ mvOsPrintf ("Invalid portNo=%d\n", ethPortNum); -+ return MV_FALSE; -+ } -+ return ethPortSgmiiSupport[ethPortNum]; -+} -+ -+/******************************************************************************* -+* mvBoardIsPortInGmii - -+* -+* DESCRIPTION: -+* This routine returns MV_TRUE for port number works in GMII or MV_FALSE -+* For all other options. -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE - port in GMII. -+* MV_FALSE - other. -+* -+*******************************************************************************/ -+MV_BOOL mvBoardIsPortInGmii(MV_VOID) -+{ -+ MV_U32 devClassId, devClass = 0; -+ if (mvBoardMppGroupTypeGet(devClass) == MV_BOARD_AUTO) -+ { -+ /* Get MPP module ID */ -+ devClassId = mvBoarModuleTypeGet(devClass); -+ if (MV_BOARD_MODULE_GMII_ID == devClassId) -+ return MV_TRUE; -+ } -+ else if (mvBoardMppGroupTypeGet(devClass) == MV_BOARD_GMII) -+ return MV_TRUE; -+ -+ return MV_FALSE; -+} -+/******************************************************************************* -+* mvBoardPhyAddrGet - Get the phy address -+* -+* DESCRIPTION: -+* This routine returns the Phy address of a given ethernet port. -+* -+* INPUT: -+* ethPortNum - Ethernet port number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit describing Phy address, -1 if the port number is wrong. -+* -+*******************************************************************************/ -+MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum) -+{ -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardPhyAddrGet: Board unknown.\n"); -+ return MV_ERROR; -+ } -+ -+ return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardEthSmiAddr; -+} -+ -+/******************************************************************************* -+* mvBoardMacSpeedGet - Get the Mac speed -+* -+* DESCRIPTION: -+* This routine returns the Mac speed if pre define of a given ethernet port. -+* -+* INPUT: -+* ethPortNum - Ethernet port number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BOARD_MAC_SPEED, -1 if the port number is wrong. -+* -+*******************************************************************************/ -+MV_BOARD_MAC_SPEED mvBoardMacSpeedGet(MV_U32 ethPortNum) -+{ -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardMacSpeedGet: Board unknown.\n"); -+ return MV_ERROR; -+ } -+ -+ return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardMacSpeed; -+} -+ -+/******************************************************************************* -+* mvBoardLinkStatusIrqGet - Get the IRQ number for the link status indication -+* -+* DESCRIPTION: -+* This routine returns the IRQ number for the link status indication. -+* -+* INPUT: -+* ethPortNum - Ethernet port number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* the number of the IRQ for the link status indication, -1 if the port -+* number is wrong or if not relevant. -+* -+*******************************************************************************/ -+MV_32 mvBoardLinkStatusIrqGet(MV_U32 ethPortNum) -+{ -+ MV_U32 boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardLinkStatusIrqGet: Board unknown.\n"); -+ return MV_ERROR; -+ } -+ -+ return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].linkStatusIrq; -+} -+ -+/******************************************************************************* -+* mvBoardSwitchPortGet - Get the mapping between the board connector and the -+* Ethernet Switch port -+* -+* DESCRIPTION: -+* This routine returns the matching Switch port. -+* -+* INPUT: -+* ethPortNum - Ethernet port number. -+* boardPortNum - logical number of the connector on the board -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* the matching Switch port, -1 if the port number is wrong or if not relevant. -+* -+*******************************************************************************/ -+MV_32 mvBoardSwitchPortGet(MV_U32 ethPortNum, MV_U8 boardPortNum) -+{ -+ MV_U32 boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardSwitchPortGet: Board unknown.\n"); -+ return MV_ERROR; -+ } -+ if (boardPortNum >= BOARD_ETH_SWITCH_PORT_NUM) -+ { -+ mvOsPrintf("mvBoardSwitchPortGet: Illegal board port number.\n"); -+ return MV_ERROR; -+ } -+ -+ return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].qdPort[boardPortNum]; -+} -+ -+/******************************************************************************* -+* mvBoardSwitchCpuPortGet - Get the the Ethernet Switch CPU port -+* -+* DESCRIPTION: -+* This routine returns the Switch CPU port. -+* -+* INPUT: -+* ethPortNum - Ethernet port number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* the Switch CPU port, -1 if the port number is wrong or if not relevant. -+* -+*******************************************************************************/ -+MV_32 mvBoardSwitchCpuPortGet(MV_U32 ethPortNum) -+{ -+ MV_U32 boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardSwitchCpuPortGet: Board unknown.\n"); -+ return MV_ERROR; -+ } -+ -+ return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].qdCpuPort; -+} -+ -+/******************************************************************************* -+* mvBoardIsSwitchConnected - Get switch connection status -+* DESCRIPTION: -+* This routine returns port's connection status -+* -+* INPUT: -+* ethPortNum - Ethernet port number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 1 - if ethPortNum is connected to switch, 0 otherwise -+* -+*******************************************************************************/ -+MV_32 mvBoardIsSwitchConnected(MV_U32 ethPortNum) -+{ -+ MV_U32 boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardIsSwitchConnected: Board unknown.\n"); -+ return MV_ERROR; -+ } -+ -+ if(ethPortNum >= BOARD_INFO(boardId)->numBoardMacInfo) -+ { -+ mvOsPrintf("mvBoardIsSwitchConnected: Illegal port number(%u)\n", ethPortNum); -+ return MV_ERROR; -+ } -+ -+ if((MV_32)(BOARD_INFO(boardId)->pSwitchInfo)) -+ return (MV_32)(BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].switchOnPort == ethPortNum); -+ else -+ return 0; -+} -+/******************************************************************************* -+* mvBoardSmiScanModeGet - Get Switch SMI scan mode -+* -+* DESCRIPTION: -+* This routine returns Switch SMI scan mode. -+* -+* INPUT: -+* ethPortNum - Ethernet port number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 1 for SMI_MANUAL_MODE, -1 if the port number is wrong or if not relevant. -+* -+*******************************************************************************/ -+MV_32 mvBoardSmiScanModeGet(MV_U32 ethPortNum) -+{ -+ MV_U32 boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardSmiScanModeGet: Board unknown.\n"); -+ return MV_ERROR; -+ } -+ -+ return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].smiScanMode; -+} -+/******************************************************************************* -+* mvBoardSpecInitGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: Return MV_TRUE and parameters in case board need spesific phy init, -+* otherwise return MV_FALSE. -+* -+* -+*******************************************************************************/ -+ -+MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data) -+{ -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* mvBoardTclkGet - Get the board Tclk (Controller clock) -+* -+* DESCRIPTION: -+* This routine extract the controller core clock. -+* This function uses the controller counters to make identification. -+* Note: In order to avoid interference, make sure task context switch -+* and interrupts will not occure during this function operation -+* -+* INPUT: -+* countNum - Counter number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit clock cycles in Hertz. -+* -+*******************************************************************************/ -+MV_U32 mvBoardTclkGet(MV_VOID) -+{ -+ if(mvCtrlModelGet()==MV_6281_DEV_ID) -+ { -+#if defined(TCLK_AUTO_DETECT) -+ MV_U32 tmpTClkRate = MV_BOARD_TCLK_166MHZ; -+ -+ tmpTClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ tmpTClkRate &= MSAR_TCLCK_MASK; -+ -+ switch (tmpTClkRate) -+ { -+ case MSAR_TCLCK_166: -+ return MV_BOARD_TCLK_166MHZ; -+ break; -+ case MSAR_TCLCK_200: -+ return MV_BOARD_TCLK_200MHZ; -+ break; -+ } -+#else -+ return MV_BOARD_TCLK_200MHZ; -+#endif -+ } -+ -+ return MV_BOARD_TCLK_166MHZ; -+ -+} -+/******************************************************************************* -+* mvBoardSysClkGet - Get the board SysClk (CPU bus clock) -+* -+* DESCRIPTION: -+* This routine extract the CPU bus clock. -+* -+* INPUT: -+* countNum - Counter number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit clock cycles in Hertz. -+* -+*******************************************************************************/ -+static MV_U32 mvBoard6180SysClkGet(MV_VOID) -+{ -+ MV_U32 sysClkRate=0; -+ MV_CPU_ARM_CLK _cpu6180_ddr_l2_CLK[] = MV_CPU6180_DDR_L2_CLCK_TBL; -+ -+ sysClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ sysClkRate = sysClkRate & MSAR_CPUCLCK_MASK_6180; -+ sysClkRate = sysClkRate >> MSAR_CPUCLCK_OFFS_6180; -+ -+ sysClkRate = _cpu6180_ddr_l2_CLK[sysClkRate].ddrClk; -+ -+ return sysClkRate; -+ -+} -+ -+MV_U32 mvBoardSysClkGet(MV_VOID) -+{ -+#ifdef SYSCLK_AUTO_DETECT -+ MV_U32 sysClkRate, tmp, pClkRate, indexDdrRtio; -+ MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL; -+ MV_U32 ddrRtio[][2] = MV_DDR_CLCK_RTIO_TBL; -+ -+ if(mvCtrlModelGet() == MV_6180_DEV_ID) -+ return mvBoard6180SysClkGet(); -+ -+ tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ pClkRate = MSAR_CPUCLCK_EXTRACT(tmp); -+ pClkRate = cpuCLK[pClkRate]; -+ -+ indexDdrRtio = tmp & MSAR_DDRCLCK_RTIO_MASK; -+ indexDdrRtio = indexDdrRtio >> MSAR_DDRCLCK_RTIO_OFFS; -+ if(ddrRtio[indexDdrRtio][0] != 0) -+ sysClkRate = ((pClkRate * ddrRtio[indexDdrRtio][1]) / ddrRtio[indexDdrRtio][0]); -+ else -+ sysClkRate = 0; -+ return sysClkRate; -+#else -+ return MV_BOARD_DEFAULT_SYSCLK; -+#endif -+} -+ -+ -+/******************************************************************************* -+* mvBoardPexBridgeIntPinGet - Get PEX to PCI bridge interrupt pin number -+* -+* DESCRIPTION: -+* Multi-ported PCI Express bridges that is implemented on the board -+* collapse interrupts across multiple conventional PCI/PCI-X buses. -+* A dual-headed PCI Express bridge would map (or "swizzle") the -+* interrupts per the following table (in accordance with the respective -+* logical PCI/PCI-X bridge's Device Number), collapse the INTA#-INTD# -+* signals from its two logical PCI/PCI-X bridges, collapse the -+* INTA#-INTD# signals from any internal sources, and convert the -+* signals to in-band PCI Express messages. 10 -+* This function returns the upstream interrupt as it was converted by -+* the bridge, according to board configuration and the following table: -+* PCI dev num -+* Interrupt pin 7, 8, 9 -+* A -> A D C -+* B -> B A D -+* C -> C B A -+* D -> D C B -+* -+* -+* INPUT: -+* devNum - PCI/PCIX device number. -+* intPin - PCI Int pin -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Int pin connected to the Interrupt controller -+* -+*******************************************************************************/ -+MV_U32 mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin) -+{ -+ MV_U32 realIntPin = ((intPin + (3 - (devNum % 4))) %4 ); -+ -+ if (realIntPin == 0) return 4; -+ else return realIntPin; -+ -+} -+ -+/******************************************************************************* -+* mvBoardDebugLedNumGet - Get number of debug Leds -+* -+* DESCRIPTION: -+* INPUT: -+* boardId -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_U32 mvBoardDebugLedNumGet(MV_U32 boardId) -+{ -+ return BOARD_INFO(boardId)->activeLedsNumber; -+} -+ -+/******************************************************************************* -+* mvBoardDebugLeg - Set the board debug Leds -+* -+* DESCRIPTION: turn on/off status leds. -+* Note: assume MPP leds are part of group 0 only. -+* -+* INPUT: -+* hexNum - Number to be displied in hex by Leds. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvBoardDebugLed(MV_U32 hexNum) -+{ -+ MV_U32 val = 0,totalMask, currentBitMask = 1,i; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (BOARD_INFO(boardId)->pLedGppPin == NULL) -+ return; -+ -+ totalMask = (1 << BOARD_INFO(boardId)->activeLedsNumber) -1; -+ hexNum &= totalMask; -+ totalMask = 0; -+ -+ for (i = 0 ; i < BOARD_INFO(boardId)->activeLedsNumber ; i++) -+ { -+ if (hexNum & currentBitMask) -+ { -+ val |= (1 << BOARD_INFO(boardId)->pLedGppPin[i]); -+ } -+ -+ totalMask |= (1 << BOARD_INFO(boardId)->pLedGppPin[i]); -+ -+ currentBitMask = (currentBitMask << 1); -+ } -+ -+ if (BOARD_INFO(boardId)->ledsPolarity) -+ { -+ mvGppValueSet(0, totalMask, val); -+ } -+ else -+ { -+ mvGppValueSet(0, totalMask, ~val); -+ } -+} -+ -+ -+/******************************************************************************* -+* mvBoarGpioPinGet - mvBoarGpioPinGet -+* -+* DESCRIPTION: -+* -+* INPUT: -+* class - MV_BOARD_GPP_CLASS enum. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* GPIO pin number. The function return -1 for bad parameters. -+* -+*******************************************************************************/ -+MV_32 mvBoarGpioPinNumGet(MV_BOARD_GPP_CLASS class, MV_U32 index) -+{ -+ MV_U32 boardId, i; -+ MV_U32 indexFound = 0; -+ -+ boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardRTCGpioPinGet:Board unknown.\n"); -+ return MV_ERROR; -+ -+ } -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardGppInfo; i++) -+ if (BOARD_INFO(boardId)->pBoardGppInfo[i].devClass == class) { -+ if (indexFound == index) -+ return (MV_U32)BOARD_INFO(boardId)->pBoardGppInfo[i].gppPinNum; -+ else -+ indexFound++; -+ -+ } -+ -+ return MV_ERROR; -+} -+ -+ -+/******************************************************************************* -+* mvBoardRTCGpioPinGet - mvBoardRTCGpioPinGet -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* GPIO pin number. The function return -1 for bad parameters. -+* -+*******************************************************************************/ -+MV_32 mvBoardRTCGpioPinGet(MV_VOID) -+{ -+ return mvBoarGpioPinNumGet(BOARD_GPP_RTC, 0); -+} -+ -+ -+/******************************************************************************* -+* mvBoardReset - mvBoardReset -+* -+* DESCRIPTION: -+* Reset the board -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None -+* -+*******************************************************************************/ -+MV_VOID mvBoardReset(MV_VOID) -+{ -+ MV_32 resetPin; -+ -+ /* Get gpp reset pin if define */ -+ resetPin = mvBoardResetGpioPinGet(); -+ if (resetPin != MV_ERROR) -+ { -+ MV_REG_BIT_RESET( GPP_DATA_OUT_REG(0) ,(1 << resetPin)); -+ MV_REG_BIT_RESET( GPP_DATA_OUT_EN_REG(0) ,(1 << resetPin)); -+ -+ } -+ else -+ { -+ /* No gpp reset pin was found, try to reset ussing -+ system reset out */ -+ MV_REG_BIT_SET( CPU_RSTOUTN_MASK_REG , BIT2); -+ MV_REG_BIT_SET( CPU_SYS_SOFT_RST_REG , BIT0); -+ } -+} -+ -+/******************************************************************************* -+* mvBoardResetGpioPinGet - mvBoardResetGpioPinGet -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* GPIO pin number. The function return -1 for bad parameters. -+* -+*******************************************************************************/ -+MV_32 mvBoardResetGpioPinGet(MV_VOID) -+{ -+ return mvBoarGpioPinNumGet(BOARD_GPP_RESET, 0); -+} -+/******************************************************************************* -+* mvBoardSDIOGpioPinGet - mvBoardSDIOGpioPinGet -+* -+* DESCRIPTION: -+* used for hotswap detection -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* GPIO pin number. The function return -1 for bad parameters. -+* -+*******************************************************************************/ -+MV_32 mvBoardSDIOGpioPinGet(MV_VOID) -+{ -+ return mvBoarGpioPinNumGet(BOARD_GPP_SDIO_DETECT, 0); -+} -+ -+/******************************************************************************* -+* mvBoardUSBVbusGpioPinGet - return Vbus input GPP -+* -+* DESCRIPTION: -+* -+* INPUT: -+* int devNo. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* GPIO pin number. The function return -1 for bad parameters. -+* -+*******************************************************************************/ -+MV_32 mvBoardUSBVbusGpioPinGet(MV_32 devId) -+{ -+ return mvBoarGpioPinNumGet(BOARD_GPP_USB_VBUS, devId); -+} -+ -+/******************************************************************************* -+* mvBoardUSBVbusEnGpioPinGet - return Vbus Enable output GPP -+* -+* DESCRIPTION: -+* -+* INPUT: -+* int devNo. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* GPIO pin number. The function return -1 for bad parameters. -+* -+*******************************************************************************/ -+MV_32 mvBoardUSBVbusEnGpioPinGet(MV_32 devId) -+{ -+ return mvBoarGpioPinNumGet(BOARD_GPP_USB_VBUS_EN, devId); -+} -+ -+ -+/******************************************************************************* -+* mvBoardGpioIntMaskGet - Get GPIO mask for interrupt pins -+* -+* DESCRIPTION: -+* This function returns a 32-bit mask of GPP pins that connected to -+* interrupt generating sources on board. -+* For example if UART channel A is hardwired to GPP pin 8 and -+* UART channel B is hardwired to GPP pin 4 the fuinction will return -+* the value 0x000000110 -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* See description. The function return -1 if board is not identified. -+* -+*******************************************************************************/ -+MV_32 mvBoardGpioIntMaskLowGet(MV_VOID) -+{ -+ MV_U32 boardId; -+ -+ boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardGpioIntMaskGet:Board unknown.\n"); -+ return MV_ERROR; -+ -+ } -+ -+ return BOARD_INFO(boardId)->intsGppMaskLow; -+} -+MV_32 mvBoardGpioIntMaskHighGet(MV_VOID) -+{ -+ MV_U32 boardId; -+ -+ boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardGpioIntMaskGet:Board unknown.\n"); -+ return MV_ERROR; -+ -+ } -+ -+ return BOARD_INFO(boardId)->intsGppMaskHigh; -+} -+ -+ -+/******************************************************************************* -+* mvBoardMppGet - Get board dependent MPP register value -+* -+* DESCRIPTION: -+* MPP settings are derived from board design. -+* MPP group consist of 8 MPPs. An MPP group represent MPP -+* control register. -+* This function retrieves board dependend MPP register value. -+* -+* INPUT: -+* mppGroupNum - MPP group number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit value describing MPP control register value. -+* -+*******************************************************************************/ -+MV_32 mvBoardMppGet(MV_U32 mppGroupNum) -+{ -+ MV_U32 boardId; -+ -+ boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardMppGet:Board unknown.\n"); -+ return MV_ERROR; -+ -+ } -+ -+ return BOARD_INFO(boardId)->pBoardMppConfigValue[0].mppGroup[mppGroupNum]; -+} -+ -+ -+/******************************************************************************* -+* mvBoardMppGroupId - If MPP group type is AUTO then identify it using twsi -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_VOID mvBoardMppGroupIdUpdate(MV_VOID) -+{ -+ -+ MV_BOARD_MPP_GROUP_CLASS devClass; -+ MV_BOARD_MODULE_ID_CLASS devClassId; -+ MV_BOARD_MPP_TYPE_CLASS mppGroupType; -+ MV_U32 devId; -+ MV_U32 maxMppGrp = 1; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ maxMppGrp = MV_6281_MPP_MAX_MODULE; -+ break; -+ case MV_6192_DEV_ID: -+ maxMppGrp = MV_6192_MPP_MAX_MODULE; -+ break; -+ case MV_6190_DEV_ID: -+ maxMppGrp = MV_6190_MPP_MAX_MODULE; -+ break; -+ case MV_6180_DEV_ID: -+ maxMppGrp = MV_6180_MPP_MAX_MODULE; -+ break; -+ } -+ -+ for (devClass = 0; devClass < maxMppGrp; devClass++) -+ { -+ /* If MPP group can be defined by the module connected to it */ -+ if (mvBoardMppGroupTypeGet(devClass) == MV_BOARD_AUTO) -+ { -+ /* Get MPP module ID */ -+ devClassId = mvBoarModuleTypeGet(devClass); -+ if (MV_ERROR != devClassId) -+ { -+ switch(devClassId) -+ { -+ case MV_BOARD_MODULE_TDM_ID: -+ case MV_BOARD_MODULE_TDM_5CHAN_ID: -+ mppGroupType = MV_BOARD_TDM; -+ break; -+ case MV_BOARD_MODULE_AUDIO_ID: -+ mppGroupType = MV_BOARD_AUDIO; -+ break; -+ case MV_BOARD_MODULE_RGMII_ID: -+ mppGroupType = MV_BOARD_RGMII; -+ break; -+ case MV_BOARD_MODULE_GMII_ID: -+ mppGroupType = MV_BOARD_GMII; -+ break; -+ case MV_BOARD_MODULE_TS_ID: -+ mppGroupType = MV_BOARD_TS; -+ break; -+ case MV_BOARD_MODULE_MII_ID: -+ mppGroupType = MV_BOARD_MII; -+ break; -+ default: -+ mppGroupType = MV_BOARD_OTHER; -+ break; -+ } -+ } -+ else -+ /* The module bay is empty */ -+ mppGroupType = MV_BOARD_OTHER; -+ -+ /* Update MPP group type */ -+ mvBoardMppGroupTypeSet(devClass, mppGroupType); -+ } -+ -+ /* Update MPP output voltage for RGMII 1.8V. Set port to GMII for GMII module */ -+ if ((mvBoardMppGroupTypeGet(devClass) == MV_BOARD_RGMII)) -+ MV_REG_BIT_SET(MPP_OUTPUT_DRIVE_REG,MPP_1_8_RGMII1_OUTPUT_DRIVE | MPP_1_8_RGMII0_OUTPUT_DRIVE); -+ else -+ { -+ if ((mvBoardMppGroupTypeGet(devClass) == MV_BOARD_GMII)) -+ { -+ MV_REG_BIT_RESET(MPP_OUTPUT_DRIVE_REG, BIT7 | BIT15); -+ MV_REG_BIT_RESET(ETH_PORT_SERIAL_CTRL_1_REG(0),BIT3); -+ MV_REG_BIT_RESET(ETH_PORT_SERIAL_CTRL_1_REG(1),BIT3); -+ } -+ else if ((mvBoardMppGroupTypeGet(devClass) == MV_BOARD_MII)) -+ { -+ /* Assumption that the MDC & MDIO should be 3.3V */ -+ MV_REG_BIT_RESET(MPP_OUTPUT_DRIVE_REG, BIT7 | BIT15); -+ /* Assumption that only ETH1 can be MII when using modules on DB */ -+ MV_REG_BIT_RESET(ETH_PORT_SERIAL_CTRL_1_REG(1),BIT3); -+ } -+ } -+ } -+} -+ -+/******************************************************************************* -+* mvBoardMppGroupTypeGet -+* -+* DESCRIPTION: -+* -+* INPUT: -+* mppGroupClass - MPP group number 0 for MPP[35:20] or 1 for MPP[49:36]. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_BOARD_MPP_TYPE_CLASS mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass) -+{ -+ MV_U32 boardId; -+ -+ boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardMppGet:Board unknown.\n"); -+ return MV_ERROR; -+ -+ } -+ -+ if (mppGroupClass == MV_BOARD_MPP_GROUP_1) -+ return BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup1; -+ else -+ return BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup2; -+} -+ -+/******************************************************************************* -+* mvBoardMppGroupTypeSet -+* -+* DESCRIPTION: -+* -+* INPUT: -+* mppGroupClass - MPP group number 0 for MPP[35:20] or 1 for MPP[49:36]. -+* mppGroupType - MPP group type for MPP[35:20] or for MPP[49:36]. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_VOID mvBoardMppGroupTypeSet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass, -+ MV_BOARD_MPP_TYPE_CLASS mppGroupType) -+{ -+ MV_U32 boardId; -+ -+ boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardMppGet:Board unknown.\n"); -+ } -+ -+ if (mppGroupClass == MV_BOARD_MPP_GROUP_1) -+ BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup1 = mppGroupType; -+ else -+ BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup2 = mppGroupType; -+ -+} -+ -+/******************************************************************************* -+* mvBoardMppMuxSet - Update MPP mux -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_VOID mvBoardMppMuxSet(MV_VOID) -+{ -+ -+ MV_BOARD_MPP_GROUP_CLASS devClass; -+ MV_BOARD_MPP_TYPE_CLASS mppGroupType; -+ MV_U32 devId; -+ MV_U8 muxVal = 0xf; -+ MV_U32 maxMppGrp = 1; -+ MV_TWSI_SLAVE twsiSlave; -+ MV_TWSI_ADDR slave; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ maxMppGrp = MV_6281_MPP_MAX_MODULE; -+ break; -+ case MV_6192_DEV_ID: -+ maxMppGrp = MV_6192_MPP_MAX_MODULE; -+ break; -+ case MV_6190_DEV_ID: -+ maxMppGrp = MV_6190_MPP_MAX_MODULE; -+ break; -+ case MV_6180_DEV_ID: -+ maxMppGrp = MV_6180_MPP_MAX_MODULE; -+ break; -+ } -+ -+ for (devClass = 0; devClass < maxMppGrp; devClass++) -+ { -+ mppGroupType = mvBoardMppGroupTypeGet(devClass); -+ -+ switch(mppGroupType) -+ { -+ case MV_BOARD_TDM: -+ muxVal &= ~(devClass ? (0x2 << (devClass * 2)):0x0); -+ break; -+ case MV_BOARD_AUDIO: -+ muxVal &= ~(devClass ? 0x7 : 0x0); /*old Z0 value 0xd:0x0*/ -+ break; -+ case MV_BOARD_TS: -+ muxVal &= ~(devClass ? (0x2 << (devClass * 2)):0x0); -+ break; -+ default: -+ muxVal |= (devClass ? 0xf : 0); -+ break; -+ } -+ } -+ -+ /* TWSI init */ -+ slave.type = ADDR7_BIT; -+ slave.address = 0; -+ mvTwsiInit(0, TWSI_SPEED, mvBoardTclkGet(), &slave, 0); -+ -+ /* Read MPP module ID */ -+ DB(mvOsPrintf("Board: twsi exp set\n")); -+ twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(MV_BOARD_MUX_I2C_ADDR_ENTRY); -+ twsiSlave.slaveAddr.type = mvBoardTwsiExpAddrTypeGet(MV_BOARD_MUX_I2C_ADDR_ENTRY); -+ twsiSlave.validOffset = MV_TRUE; -+ /* Offset is the first command after the address which indicate the register number to be read -+ in next operation */ -+ twsiSlave.offset = 2; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ -+ -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &muxVal, 1) ) -+ { -+ DB(mvOsPrintf("Board: twsi exp out val fail\n")); -+ return; -+ } -+ DB(mvOsPrintf("Board: twsi exp out val succeded\n")); -+ -+ /* Change twsi exp to output */ -+ twsiSlave.offset = 6; -+ muxVal = 0; -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &muxVal, 1) ) -+ { -+ DB(mvOsPrintf("Board: twsi exp change to out fail\n")); -+ return; -+ } -+ DB(mvOsPrintf("Board: twsi exp change to out succeded\n")); -+ -+} -+ -+/******************************************************************************* -+* mvBoardTdmMppSet - set MPPs in TDM module -+* -+* DESCRIPTION: -+* -+* INPUT: type of second telephony device -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_VOID mvBoardTdmMppSet(MV_32 chType) -+{ -+ -+ MV_BOARD_MPP_GROUP_CLASS devClass; -+ MV_BOARD_MPP_TYPE_CLASS mppGroupType; -+ MV_U32 devId; -+ MV_U8 muxVal = 1; -+ MV_U8 muxValMask = 1; -+ MV_U8 twsiVal; -+ MV_U32 maxMppGrp = 1; -+ MV_TWSI_SLAVE twsiSlave; -+ MV_TWSI_ADDR slave; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ maxMppGrp = MV_6281_MPP_MAX_MODULE; -+ break; -+ case MV_6192_DEV_ID: -+ maxMppGrp = MV_6192_MPP_MAX_MODULE; -+ break; -+ case MV_6190_DEV_ID: -+ maxMppGrp = MV_6190_MPP_MAX_MODULE; -+ break; -+ case MV_6180_DEV_ID: -+ maxMppGrp = MV_6180_MPP_MAX_MODULE; -+ break; -+ } -+ -+ for (devClass = 0; devClass < maxMppGrp; devClass++) -+ { -+ mppGroupType = mvBoardMppGroupTypeGet(devClass); -+ if(mppGroupType == MV_BOARD_TDM) -+ break; -+ } -+ -+ if(devClass == maxMppGrp) -+ return; /* TDM module not found */ -+ -+ /* TWSI init */ -+ slave.type = ADDR7_BIT; -+ slave.address = 0; -+ mvTwsiInit(0, TWSI_SPEED, mvBoardTclkGet(), &slave, 0); -+ -+ /* Read MPP module ID */ -+ DB(mvOsPrintf("Board: twsi exp set\n")); -+ twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(devClass); -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ /* Offset is the first command after the address which indicate the register number to be read -+ in next operation */ -+ twsiSlave.offset = 3; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ if(mvBoardIdGet() == RD_88F6281A_ID) -+ { -+ muxVal = 0xc; -+ muxValMask = 0xf3; -+ } -+ -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ muxVal = (twsiVal & muxValMask) | muxVal; -+ -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &muxVal, 1) ) -+ { -+ mvOsPrintf("Board: twsi exp out val fail\n"); -+ return; -+ } -+ DB(mvOsPrintf("Board: twsi exp out val succeded\n")); -+ -+ /* Change twsi exp to output */ -+ twsiSlave.offset = 7; -+ muxVal = 0xfe; -+ if(mvBoardIdGet() == RD_88F6281A_ID) -+ muxVal = 0xf3; -+ -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ muxVal = (twsiVal & muxVal); -+ -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &muxVal, 1) ) -+ { -+ mvOsPrintf("Board: twsi exp change to out fail\n"); -+ return; -+ } -+ DB(mvOsPrintf("Board: twsi exp change to out succeded\n")); -+ /* reset the line to 0 */ -+ twsiSlave.offset = 3; -+ muxVal = 0; -+ muxValMask = 1; -+ -+ if(mvBoardIdGet() == RD_88F6281A_ID) { -+ muxVal = 0x0; -+ muxValMask = 0xf3; -+ } -+ -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ muxVal = (twsiVal & muxValMask) | muxVal; -+ -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &muxVal, 1) ) -+ { -+ mvOsPrintf("Board: twsi exp out val fail\n"); -+ return; -+ } -+ DB(mvOsPrintf("Board: twsi exp out val succeded\n")); -+ -+ mvOsDelay(20); -+ -+ /* set the line to 1 */ -+ twsiSlave.offset = 3; -+ muxVal = 1; -+ muxValMask = 1; -+ -+ if(mvBoardIdGet() == RD_88F6281A_ID) -+ { -+ muxVal = 0xc; -+ muxValMask = 0xf3; -+ if(chType) /* FXS - issue reset properly */ -+ { -+ MV_REG_BIT_SET(GPP_DATA_OUT_REG(1), MV_GPP12); -+ mvOsDelay(50); -+ MV_REG_BIT_RESET(GPP_DATA_OUT_REG(1), MV_GPP12); -+ } -+ else /* FXO - issue reset via TDM_CODEC_RST*/ -+ { -+ /* change MPP44 type to TDM_CODEC_RST(0x2) */ -+ MV_REG_WRITE(MPP_CONTROL_REG5, ((MV_REG_READ(MPP_CONTROL_REG5) & 0xFFF0FFFF) | BIT17)); -+ } -+ } -+ -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ muxVal = (twsiVal & muxValMask) | muxVal; -+ -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &muxVal, 1) ) -+ { -+ mvOsPrintf("Board: twsi exp out val fail\n"); -+ return; -+ } -+ -+ /* TBD - 5 channels */ -+#if defined(MV_TDM_5CHANNELS) -+ /* change MPP38 type to GPIO(0x0) & polarity for TDM_STROBE */ -+ MV_REG_WRITE(MPP_CONTROL_REG4, (MV_REG_READ(MPP_CONTROL_REG4) & 0xF0FFFFFF)); -+ mvGppPolaritySet(1, MV_GPP6, 0); -+ -+ twsiSlave.offset = 6; -+ twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(2); -+ -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ muxVal = (twsiVal & ~BIT2); -+ -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &muxVal, 1) ) -+ { -+ mvOsPrintf("Board: twsi exp change to out fail\n"); -+ return; -+ } -+ -+ -+ twsiSlave.offset = 2; -+ -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ muxVal = (twsiVal & ~BIT2); -+ -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &muxVal, 1) ) -+ { -+ mvOsPrintf("Board: twsi exp change to out fail\n"); -+ return; -+ } -+#endif -+ DB(mvOsPrintf("Board: twsi exp out val succeded\n")); -+ -+ -+} -+/******************************************************************************* -+* mvBoardVoiceConnModeGet - return SLIC/DAA connection & interrupt modes -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+ -+MV_VOID mvBoardVoiceConnModeGet(MV_32* connMode, MV_32* irqMode) -+{ -+ switch(mvBoardIdGet()) -+ { -+ case RD_88F6281A_ID: -+ *connMode = DAISY_CHAIN_MODE; -+ *irqMode = INTERRUPT_TO_TDM; -+ break; -+ case DB_88F6281A_BP_ID: -+ *connMode = DUAL_CHIP_SELECT_MODE; -+ *irqMode = INTERRUPT_TO_TDM; -+ break; -+ case RD_88F6192A_ID: -+ *connMode = DUAL_CHIP_SELECT_MODE; -+ *irqMode = INTERRUPT_TO_TDM; -+ break; -+ case DB_88F6192A_BP_ID: -+ *connMode = DUAL_CHIP_SELECT_MODE; -+ *irqMode = INTERRUPT_TO_TDM; -+ break; -+ default: -+ *connMode = *irqMode = -1; -+ mvOsPrintf("mvBoardVoiceAssembleModeGet: TDM not supported(boardId=0x%x)\n",mvBoardIdGet()); -+ } -+ return; -+ -+} -+ -+/******************************************************************************* -+* mvBoardMppModuleTypePrint - print module detect -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_VOID mvBoardMppModuleTypePrint(MV_VOID) -+{ -+ -+ MV_BOARD_MPP_GROUP_CLASS devClass; -+ MV_BOARD_MPP_TYPE_CLASS mppGroupType; -+ MV_U32 devId; -+ MV_U32 maxMppGrp = 1; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ maxMppGrp = MV_6281_MPP_MAX_MODULE; -+ break; -+ case MV_6192_DEV_ID: -+ maxMppGrp = MV_6192_MPP_MAX_MODULE; -+ break; -+ case MV_6190_DEV_ID: -+ maxMppGrp = MV_6190_MPP_MAX_MODULE; -+ break; -+ case MV_6180_DEV_ID: -+ maxMppGrp = MV_6180_MPP_MAX_MODULE; -+ break; -+ } -+ -+ for (devClass = 0; devClass < maxMppGrp; devClass++) -+ { -+ mppGroupType = mvBoardMppGroupTypeGet(devClass); -+ -+ switch(mppGroupType) -+ { -+ case MV_BOARD_TDM: -+ if(devId != MV_6190_DEV_ID) -+ mvOsPrintf("Module %d is TDM\n", devClass); -+ break; -+ case MV_BOARD_AUDIO: -+ if(devId != MV_6190_DEV_ID) -+ mvOsPrintf("Module %d is AUDIO\n", devClass); -+ break; -+ case MV_BOARD_RGMII: -+ if(devId != MV_6190_DEV_ID) -+ mvOsPrintf("Module %d is RGMII\n", devClass); -+ break; -+ case MV_BOARD_GMII: -+ if(devId != MV_6190_DEV_ID) -+ mvOsPrintf("Module %d is GMII\n", devClass); -+ break; -+ case MV_BOARD_TS: -+ if(devId != MV_6190_DEV_ID) -+ mvOsPrintf("Module %d is TS\n", devClass); -+ break; -+ default: -+ break; -+ } -+ } -+} -+ -+/* Board devices API managments */ -+ -+/******************************************************************************* -+* mvBoardGetDeviceNumber - Get number of device of some type on the board -+* -+* DESCRIPTION: -+* -+* INPUT: -+* devType - The device type ( Flash,RTC , etc .. ) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* If the device is found on the board the then the functions returns the -+* number of those devices else the function returns 0 -+* -+* -+*******************************************************************************/ -+MV_32 mvBoardGetDevicesNumber(MV_BOARD_DEV_CLASS devClass) -+{ -+ MV_U32 foundIndex=0,devNum; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("mvBoardGetDeviceNumber:Board unknown.\n"); -+ return 0xFFFFFFFF; -+ -+ } -+ -+ for (devNum = START_DEV_CS; devNum < BOARD_INFO(boardId)->numBoardDeviceIf; devNum++) -+ { -+ if (BOARD_INFO(boardId)->pDevCsInfo[devNum].devClass == devClass) -+ { -+ foundIndex++; -+ } -+ } -+ -+ return foundIndex; -+ -+} -+ -+/******************************************************************************* -+* mvBoardGetDeviceBaseAddr - Get base address of a device existing on the board -+* -+* DESCRIPTION: -+* -+* INPUT: -+* devIndex - The device sequential number on the board -+* devType - The device type ( Flash,RTC , etc .. ) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* If the device is found on the board the then the functions returns the -+* Base address else the function returns 0xffffffff -+* -+* -+*******************************************************************************/ -+MV_32 mvBoardGetDeviceBaseAddr(MV_32 devNum, MV_BOARD_DEV_CLASS devClass) -+{ -+ MV_DEV_CS_INFO* devEntry; -+ devEntry = boardGetDevEntry(devNum,devClass); -+ if (devEntry != NULL) -+ { -+ return mvCpuIfTargetWinBaseLowGet(DEV_TO_TARGET(devEntry->deviceCS)); -+ -+ } -+ -+ return 0xFFFFFFFF; -+} -+ -+/******************************************************************************* -+* mvBoardGetDeviceBusWidth - Get Bus width of a device existing on the board -+* -+* DESCRIPTION: -+* -+* INPUT: -+* devIndex - The device sequential number on the board -+* devType - The device type ( Flash,RTC , etc .. ) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* If the device is found on the board the then the functions returns the -+* Bus width else the function returns 0xffffffff -+* -+* -+*******************************************************************************/ -+MV_32 mvBoardGetDeviceBusWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass) -+{ -+ MV_DEV_CS_INFO* devEntry; -+ -+ devEntry = boardGetDevEntry(devNum,devClass); -+ if (devEntry != NULL) -+ { -+ return 8; -+ } -+ -+ return 0xFFFFFFFF; -+ -+} -+ -+/******************************************************************************* -+* mvBoardGetDeviceWidth - Get dev width of a device existing on the board -+* -+* DESCRIPTION: -+* -+* INPUT: -+* devIndex - The device sequential number on the board -+* devType - The device type ( Flash,RTC , etc .. ) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* If the device is found on the board the then the functions returns the -+* dev width else the function returns 0xffffffff -+* -+* -+*******************************************************************************/ -+MV_32 mvBoardGetDeviceWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass) -+{ -+ MV_DEV_CS_INFO* devEntry; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("Board unknown.\n"); -+ return 0xFFFFFFFF; -+ } -+ -+ devEntry = boardGetDevEntry(devNum,devClass); -+ if (devEntry != NULL) -+ return devEntry->devWidth; -+ -+ return MV_ERROR; -+ -+} -+ -+/******************************************************************************* -+* mvBoardGetDeviceWinSize - Get the window size of a device existing on the board -+* -+* DESCRIPTION: -+* -+* INPUT: -+* devIndex - The device sequential number on the board -+* devType - The device type ( Flash,RTC , etc .. ) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* If the device is found on the board the then the functions returns the -+* window size else the function returns 0xffffffff -+* -+* -+*******************************************************************************/ -+MV_32 mvBoardGetDeviceWinSize(MV_32 devNum, MV_BOARD_DEV_CLASS devClass) -+{ -+ MV_DEV_CS_INFO* devEntry; -+ MV_U32 boardId = mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("Board unknown.\n"); -+ return 0xFFFFFFFF; -+ } -+ -+ devEntry = boardGetDevEntry(devNum,devClass); -+ if (devEntry != NULL) -+ { -+ return mvCpuIfTargetWinSizeGet(DEV_TO_TARGET(devEntry->deviceCS)); -+ } -+ -+ return 0xFFFFFFFF; -+} -+ -+ -+/******************************************************************************* -+* boardGetDevEntry - returns the entry pointer of a device on the board -+* -+* DESCRIPTION: -+* -+* INPUT: -+* devIndex - The device sequential number on the board -+* devType - The device type ( Flash,RTC , etc .. ) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* If the device is found on the board the then the functions returns the -+* dev number else the function returns 0x0 -+* -+* -+*******************************************************************************/ -+static MV_DEV_CS_INFO* boardGetDevEntry(MV_32 devNum, MV_BOARD_DEV_CLASS devClass) -+{ -+ MV_U32 foundIndex=0,devIndex; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("boardGetDevEntry: Board unknown.\n"); -+ return NULL; -+ -+ } -+ -+ for (devIndex = START_DEV_CS; devIndex < BOARD_INFO(boardId)->numBoardDeviceIf; devIndex++) -+ { -+ /* TBR */ -+ /*if (BOARD_INFO(boardId)->pDevCsInfo[devIndex].deviceCS == MV_BOOTDEVICE_INDEX) -+ continue;*/ -+ -+ if (BOARD_INFO(boardId)->pDevCsInfo[devIndex].devClass == devClass) -+ { -+ if (foundIndex == devNum) -+ { -+ return &(BOARD_INFO(boardId)->pDevCsInfo[devIndex]); -+ } -+ foundIndex++; -+ } -+ } -+ -+ /* device not found */ -+ return NULL; -+} -+ -+/* Get device CS number */ -+ -+MV_U32 boardGetDevCSNum(MV_32 devNum, MV_BOARD_DEV_CLASS devClass) -+{ -+ MV_DEV_CS_INFO* devEntry; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) -+ { -+ mvOsPrintf("Board unknown.\n"); -+ return 0xFFFFFFFF; -+ -+ } -+ -+ -+ devEntry = boardGetDevEntry(devNum,devClass); -+ if (devEntry != NULL) -+ return devEntry->deviceCS; -+ -+ return 0xFFFFFFFF; -+ -+} -+ -+/******************************************************************************* -+* mvBoardRtcTwsiAddrTypeGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_U8 mvBoardRtcTwsiAddrTypeGet() -+{ -+ int i; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++) -+ if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_TWSI_RTC) -+ return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType; -+ return (MV_ERROR); -+} -+ -+/******************************************************************************* -+* mvBoardRtcTwsiAddrGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_U8 mvBoardRtcTwsiAddrGet() -+{ -+ int i; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++) -+ if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_TWSI_RTC) -+ return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr; -+ return (0xFF); -+} -+ -+/******************************************************************************* -+* mvBoardA2DTwsiAddrTypeGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_U8 mvBoardA2DTwsiAddrTypeGet() -+{ -+ int i; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++) -+ if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_TWSI_AUDIO_DEC) -+ return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType; -+ return (MV_ERROR); -+} -+ -+/******************************************************************************* -+* mvBoardA2DTwsiAddrGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_U8 mvBoardA2DTwsiAddrGet() -+{ -+ int i; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++) -+ if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_TWSI_AUDIO_DEC) -+ return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr; -+ return (0xFF); -+} -+ -+/******************************************************************************* -+* mvBoardTwsiExpAddrTypeGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_U8 mvBoardTwsiExpAddrTypeGet(MV_U32 index) -+{ -+ int i; -+ MV_U32 indexFound = 0; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++) -+ if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_EXP) -+ { -+ if (indexFound == index) -+ return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType; -+ else -+ indexFound++; -+ } -+ -+ return (MV_ERROR); -+} -+ -+/******************************************************************************* -+* mvBoardTwsiExpAddrGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_U8 mvBoardTwsiExpAddrGet(MV_U32 index) -+{ -+ int i; -+ MV_U32 indexFound = 0; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++) -+ if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_EXP) -+ { -+ if (indexFound == index) -+ return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr; -+ else -+ indexFound++; -+ } -+ -+ return (0xFF); -+} -+ -+ -+/******************************************************************************* -+* mvBoardTwsiSatRAddrTypeGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_U8 mvBoardTwsiSatRAddrTypeGet(MV_U32 index) -+{ -+ int i; -+ MV_U32 indexFound = 0; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++) -+ if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_SATR) -+ { -+ if (indexFound == index) -+ return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType; -+ else -+ indexFound++; -+ } -+ -+ return (MV_ERROR); -+} -+ -+/******************************************************************************* -+* mvBoardTwsiSatRAddrGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_U8 mvBoardTwsiSatRAddrGet(MV_U32 index) -+{ -+ int i; -+ MV_U32 indexFound = 0; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++) -+ if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_SATR) -+ { -+ if (indexFound == index) -+ return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr; -+ else -+ indexFound++; -+ } -+ -+ return (0xFF); -+} -+ -+/******************************************************************************* -+* mvBoardNandWidthGet - -+* -+* DESCRIPTION: Get the width of the first NAND device in byte. -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: 1, 2, 4 or MV_ERROR -+* -+* -+*******************************************************************************/ -+/* */ -+MV_32 mvBoardNandWidthGet(void) -+{ -+ MV_U32 devNum; -+ MV_U32 devWidth; -+ MV_U32 boardId= mvBoardIdGet(); -+ -+ for (devNum = START_DEV_CS; devNum < BOARD_INFO(boardId)->numBoardDeviceIf; devNum++) -+ { -+ devWidth = mvBoardGetDeviceWidth(devNum, BOARD_DEV_NAND_FLASH); -+ if (devWidth != MV_ERROR) -+ return (devWidth / 8); -+ } -+ -+ /* NAND wasn't found */ -+ return MV_ERROR; -+} -+ -+MV_U32 gBoardId = -1; -+ -+/******************************************************************************* -+* mvBoardIdGet - Get Board model -+* -+* DESCRIPTION: -+* This function returns board ID. -+* Board ID is 32bit word constructed of board model (16bit) and -+* board revision (16bit) in the following way: 0xMMMMRRRR. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit board ID number, '-1' if board is undefined. -+* -+*******************************************************************************/ -+MV_U32 mvBoardIdGet(MV_VOID) -+{ -+ MV_U32 tmpBoardId = -1; -+ -+ if(gBoardId == -1) -+ { -+ #if defined(DB_88F6281A) -+ tmpBoardId = DB_88F6281A_BP_ID; -+ #elif defined(RD_88F6281A) -+ tmpBoardId = RD_88F6281A_ID; -+ #elif defined(DB_88F6192A) -+ tmpBoardId = DB_88F6192A_BP_ID; -+ #elif defined(DB_88F6190A) -+ tmpBoardId = DB_88F6190A_BP_ID; -+ #elif defined(RD_88F6192A) -+ tmpBoardId = RD_88F6192A_ID; -+ #elif defined(RD_88F6190A) -+ tmpBoardId = RD_88F6190A_ID; -+ #elif defined(DB_88F6180A) -+ tmpBoardId = DB_88F6180A_BP_ID; -+ #elif defined(RD_88F6281A_PCAC) -+ tmpBoardId = RD_88F6281A_PCAC_ID; -+ #elif defined(RD_88F6281A_SHEEVA_PLUG) -+ tmpBoardId = SHEEVA_PLUG_ID; -+ #elif defined(DB_CUSTOMER) -+ tmpBoardId = DB_CUSTOMER_ID; -+ #endif -+ gBoardId = tmpBoardId; -+ } -+ -+ return gBoardId; -+} -+ -+ -+/******************************************************************************* -+* mvBoarModuleTypeGet - mvBoarModuleTypeGet -+* -+* DESCRIPTION: -+* -+* INPUT: -+* group num - MV_BOARD_MPP_GROUP_CLASS enum -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* module num - MV_BOARD_MODULE_CLASS enum -+* -+*******************************************************************************/ -+MV_BOARD_MODULE_ID_CLASS mvBoarModuleTypeGet(MV_BOARD_MPP_GROUP_CLASS devClass) -+{ -+ MV_TWSI_SLAVE twsiSlave; -+ MV_TWSI_ADDR slave; -+ MV_U8 data; -+ -+ /* TWSI init */ -+ slave.type = ADDR7_BIT; -+ slave.address = 0; -+ mvTwsiInit(0, TWSI_SPEED, mvBoardTclkGet(), &slave, 0); -+ -+ /* Read MPP module ID */ -+ DB(mvOsPrintf("Board: Read MPP module ID\n")); -+ twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(devClass); -+ twsiSlave.slaveAddr.type = mvBoardTwsiExpAddrTypeGet(devClass); -+ twsiSlave.validOffset = MV_TRUE; -+ /* Offset is the first command after the address which indicate the register number to be read -+ in next operation */ -+ twsiSlave.offset = 0; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ -+ -+ if( MV_OK != mvTwsiRead (0, &twsiSlave, &data, 1) ) -+ { -+ DB(mvOsPrintf("Board: Read MPP module ID fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: Read MPP module ID succeded\n")); -+ -+ return data; -+} -+ -+/******************************************************************************* -+* mvBoarTwsiSatRGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* device num - one of three devices -+* reg num - 0 or 1 -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* reg value -+* -+*******************************************************************************/ -+MV_U8 mvBoarTwsiSatRGet(MV_U8 devNum, MV_U8 regNum) -+{ -+ MV_TWSI_SLAVE twsiSlave; -+ MV_TWSI_ADDR slave; -+ MV_U8 data; -+ -+ /* TWSI init */ -+ slave.type = ADDR7_BIT; -+ slave.address = 0; -+ mvTwsiInit(0, TWSI_SPEED, mvBoardTclkGet(), &slave, 0); -+ -+ /* Read MPP module ID */ -+ DB(mvOsPrintf("Board: Read S@R device read\n")); -+ twsiSlave.slaveAddr.address = mvBoardTwsiSatRAddrGet(devNum); -+ twsiSlave.slaveAddr.type = mvBoardTwsiSatRAddrTypeGet(devNum); -+ twsiSlave.validOffset = MV_TRUE; -+ /* Use offset as command */ -+ twsiSlave.offset = regNum; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ if( MV_OK != mvTwsiRead (0, &twsiSlave, &data, 1) ) -+ { -+ DB(mvOsPrintf("Board: Read S@R fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: Read S@R succeded\n")); -+ -+ return data; -+} -+ -+/******************************************************************************* -+* mvBoarTwsiSatRSet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* devNum - one of three devices -+* regNum - 0 or 1 -+* regVal - value -+* -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* reg value -+* -+*******************************************************************************/ -+MV_STATUS mvBoarTwsiSatRSet(MV_U8 devNum, MV_U8 regNum, MV_U8 regVal) -+{ -+ MV_TWSI_SLAVE twsiSlave; -+ MV_TWSI_ADDR slave; -+ -+ /* TWSI init */ -+ slave.type = ADDR7_BIT; -+ slave.address = 0; -+ mvTwsiInit(0, TWSI_SPEED, mvBoardTclkGet(), &slave, 0); -+ -+ /* Read MPP module ID */ -+ twsiSlave.slaveAddr.address = mvBoardTwsiSatRAddrGet(devNum); -+ twsiSlave.slaveAddr.type = mvBoardTwsiSatRAddrTypeGet(devNum); -+ twsiSlave.validOffset = MV_TRUE; -+ DB(mvOsPrintf("Board: Write S@R device addr %x, type %x, data %x\n", twsiSlave.slaveAddr.address,\ -+ twsiSlave.slaveAddr.type, regVal)); -+ /* Use offset as command */ -+ twsiSlave.offset = regNum; -+ twsiSlave.moreThen256 = MV_FALSE; -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, ®Val, 1) ) -+ { -+ DB(mvOsPrintf("Board: Write S@R fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: Write S@R succeded\n")); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvBoardSlicGpioPinGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* -+*******************************************************************************/ -+MV_32 mvBoardSlicGpioPinGet(MV_U32 slicNum) -+{ -+ MV_U32 boardId; -+ boardId = mvBoardIdGet(); -+ -+ switch (boardId) -+ { -+ case DB_88F6281A_BP_ID: -+ case RD_88F6281A_ID: -+ default: -+ return MV_ERROR; -+ break; -+ -+ } -+} -+ -+/******************************************************************************* -+* mvBoardFanPowerControl - Turn on/off the fan power control on the RD-6281A -+* -+* DESCRIPTION: -+* -+* INPUT: -+* mode - MV_TRUE = on ; MV_FALSE = off -+* -+* OUTPUT: -+* MV_STATUS - MV_OK , MV_ERROR. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_STATUS mvBoardFanPowerControl(MV_BOOL mode) -+{ -+ -+ MV_U8 val = 1, twsiVal; -+ MV_TWSI_SLAVE twsiSlave; -+ MV_TWSI_ADDR slave; -+ -+ if(mvBoardIdGet() != RD_88F6281A_ID) -+ return MV_ERROR; -+ -+ /* TWSI init */ -+ slave.type = ADDR7_BIT; -+ slave.address = 0; -+ mvTwsiInit(0, TWSI_SPEED, mvBoardTclkGet(), &slave, 0); -+ -+ /* Read MPP module ID */ -+ DB(mvOsPrintf("Board: twsi exp set\n")); -+ twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(1); -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ /* Offset is the first command after the address which indicate the register number to be read -+ in next operation */ -+ twsiSlave.offset = 3; -+ twsiSlave.moreThen256 = MV_FALSE; -+ if(mode == MV_TRUE) -+ val = 0x1; -+ else -+ val = 0; -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ val = (twsiVal & 0xfe) | val; -+ -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &val, 1) ) -+ { -+ DB(mvOsPrintf("Board: twsi exp out val fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: twsi exp out val succeded\n")); -+ -+ /* Change twsi exp to output */ -+ twsiSlave.offset = 7; -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ val = (twsiVal & 0xfe); -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &val, 1) ) -+ { -+ DB(mvOsPrintf("Board: twsi exp change to out fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: twsi exp change to out succeded\n")); -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvBoardHDDPowerControl - Turn on/off the HDD power control on the RD-6281A -+* -+* DESCRIPTION: -+* -+* INPUT: -+* mode - MV_TRUE = on ; MV_FALSE = off -+* -+* OUTPUT: -+* MV_STATUS - MV_OK , MV_ERROR. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_STATUS mvBoardHDDPowerControl(MV_BOOL mode) -+{ -+ -+ MV_U8 val = 1, twsiVal; -+ MV_TWSI_SLAVE twsiSlave; -+ MV_TWSI_ADDR slave; -+ -+ if(mvBoardIdGet() != RD_88F6281A_ID) -+ return MV_ERROR; -+ -+ /* TWSI init */ -+ slave.type = ADDR7_BIT; -+ slave.address = 0; -+ mvTwsiInit(0, TWSI_SPEED, mvBoardTclkGet(), &slave, 0); -+ -+ /* Read MPP module ID */ -+ DB(mvOsPrintf("Board: twsi exp set\n")); -+ twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(1); -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ /* Offset is the first command after the address which indicate the register number to be read -+ in next operation */ -+ twsiSlave.offset = 3; -+ twsiSlave.moreThen256 = MV_FALSE; -+ if(mode == MV_TRUE) -+ val = 0x2; -+ else -+ val = 0; -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ val = (twsiVal & 0xfd) | val; -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &val, 1) ) -+ { -+ DB(mvOsPrintf("Board: twsi exp out val fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: twsi exp out val succeded\n")); -+ -+ /* Change twsi exp to output */ -+ twsiSlave.offset = 7; -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ val = (twsiVal & 0xfd); -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &val, 1) ) -+ { -+ DB(mvOsPrintf("Board: twsi exp change to out fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: twsi exp change to out succeded\n")); -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvBoardSDioWPControl - Turn on/off the SDIO WP on the RD-6281A -+* -+* DESCRIPTION: -+* -+* INPUT: -+* mode - MV_TRUE = on ; MV_FALSE = off -+* -+* OUTPUT: -+* MV_STATUS - MV_OK , MV_ERROR. -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_STATUS mvBoardSDioWPControl(MV_BOOL mode) -+{ -+ -+ MV_U8 val = 1, twsiVal; -+ MV_TWSI_SLAVE twsiSlave; -+ MV_TWSI_ADDR slave; -+ -+ if(mvBoardIdGet() != RD_88F6281A_ID) -+ return MV_ERROR; -+ -+ /* TWSI init */ -+ slave.type = ADDR7_BIT; -+ slave.address = 0; -+ mvTwsiInit(0, TWSI_SPEED, mvBoardTclkGet(), &slave, 0); -+ -+ /* Read MPP module ID */ -+ DB(mvOsPrintf("Board: twsi exp set\n")); -+ twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(0); -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ /* Offset is the first command after the address which indicate the register number to be read -+ in next operation */ -+ twsiSlave.offset = 3; -+ twsiSlave.moreThen256 = MV_FALSE; -+ if(mode == MV_TRUE) -+ val = 0x10; -+ else -+ val = 0; -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ val = (twsiVal & 0xef) | val; -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &val, 1) ) -+ { -+ DB(mvOsPrintf("Board: twsi exp out val fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: twsi exp out val succeded\n")); -+ -+ /* Change twsi exp to output */ -+ twsiSlave.offset = 7; -+ mvTwsiRead(0, &twsiSlave, &twsiVal, 1); -+ val = (twsiVal & 0xef); -+ if( MV_OK != mvTwsiWrite (0, &twsiSlave, &val, 1) ) -+ { -+ DB(mvOsPrintf("Board: twsi exp change to out fail\n")); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Board: twsi exp change to out succeded\n")); -+ return MV_OK; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvLib.h b/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvLib.h -new file mode 100644 -index 0000000..522493d ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvLib.h -@@ -0,0 +1,376 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#ifndef __INCmvBoardEnvLibh -+#define __INCmvBoardEnvLibh -+ -+/* defines */ -+/* The below constant macros defines the board I2C EEPROM data offsets */ -+ -+ -+ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "mvSysHwConfig.h" -+#include "boardEnv/mvBoardEnvSpec.h" -+ -+ -+/* DUART stuff for Tclk detection only */ -+#define DUART_BAUD_RATE 115200 -+#define MAX_CLOCK_MARGINE 5000000 /* Maximum detected clock margine */ -+ -+/* Voice devices assembly modes */ -+#define DAISY_CHAIN_MODE 1 -+#define DUAL_CHIP_SELECT_MODE 0 -+#define INTERRUPT_TO_MPP 1 -+#define INTERRUPT_TO_TDM 0 -+ -+ -+#define BOARD_ETH_PORT_NUM MV_ETH_MAX_PORTS -+#define BOARD_ETH_SWITCH_PORT_NUM 5 -+ -+#define MV_BOARD_MAX_USB_IF 1 -+#define MV_BOARD_MAX_MPP 7 -+#define MV_BOARD_NAME_LEN 0x20 -+ -+typedef struct _boardData -+{ -+ MV_U32 magic; -+ MV_U16 boardId; -+ MV_U8 boardVer; -+ MV_U8 boardRev; -+ MV_U32 reserved1; -+ MV_U32 reserved2; -+ -+}BOARD_DATA; -+ -+typedef enum _devBoardMppGroupClass -+{ -+ MV_BOARD_MPP_GROUP_1, -+ MV_BOARD_MPP_GROUP_2, -+ MV_BOARD_MAX_MPP_GROUP -+}MV_BOARD_MPP_GROUP_CLASS; -+ -+typedef enum _devBoardMppTypeClass -+{ -+ MV_BOARD_AUTO, -+ MV_BOARD_TDM, -+ MV_BOARD_AUDIO, -+ MV_BOARD_RGMII, -+ MV_BOARD_GMII, -+ MV_BOARD_TS, -+ MV_BOARD_MII, -+ MV_BOARD_OTHER -+}MV_BOARD_MPP_TYPE_CLASS; -+ -+typedef enum _devBoardModuleIdClass -+{ -+ MV_BOARD_MODULE_TDM_ID = 1, -+ MV_BOARD_MODULE_AUDIO_ID, -+ MV_BOARD_MODULE_RGMII_ID, -+ MV_BOARD_MODULE_GMII_ID, -+ MV_BOARD_MODULE_TS_ID, -+ MV_BOARD_MODULE_MII_ID, -+ MV_BOARD_MODULE_TDM_5CHAN_ID, -+ MV_BOARD_MODULE_OTHER_ID -+}MV_BOARD_MODULE_ID_CLASS; -+ -+typedef struct _boardMppTypeInfo -+{ -+ MV_BOARD_MPP_TYPE_CLASS boardMppGroup1; -+ MV_BOARD_MPP_TYPE_CLASS boardMppGroup2; -+ -+}MV_BOARD_MPP_TYPE_INFO; -+ -+ -+typedef enum _devBoardClass -+{ -+ BOARD_DEV_NOR_FLASH, -+ BOARD_DEV_NAND_FLASH, -+ BOARD_DEV_SEVEN_SEG, -+ BOARD_DEV_FPGA, -+ BOARD_DEV_SRAM, -+ BOARD_DEV_SPI_FLASH, -+ BOARD_DEV_OTHER, -+}MV_BOARD_DEV_CLASS; -+ -+typedef enum _devTwsiBoardClass -+{ -+ BOARD_TWSI_RTC, -+ BOARD_DEV_TWSI_EXP, -+ BOARD_DEV_TWSI_SATR, -+ BOARD_TWSI_AUDIO_DEC, -+ BOARD_TWSI_OTHER -+}MV_BOARD_TWSI_CLASS; -+ -+typedef enum _devGppBoardClass -+{ -+ BOARD_GPP_RTC, -+ BOARD_GPP_MV_SWITCH, -+ BOARD_GPP_USB_VBUS, -+ BOARD_GPP_USB_VBUS_EN, -+ BOARD_GPP_USB_OC, -+ BOARD_GPP_USB_HOST_DEVICE, -+ BOARD_GPP_REF_CLCK, -+ BOARD_GPP_VOIP_SLIC, -+ BOARD_GPP_LIFELINE, -+ BOARD_GPP_BUTTON, -+ BOARD_GPP_TS_BUTTON_C, -+ BOARD_GPP_TS_BUTTON_U, -+ BOARD_GPP_TS_BUTTON_D, -+ BOARD_GPP_TS_BUTTON_L, -+ BOARD_GPP_TS_BUTTON_R, -+ BOARD_GPP_POWER_BUTTON, -+ BOARD_GPP_RESTOR_BUTTON, -+ BOARD_GPP_WPS_BUTTON, -+ BOARD_GPP_HDD0_POWER, -+ BOARD_GPP_HDD1_POWER, -+ BOARD_GPP_FAN_POWER, -+ BOARD_GPP_RESET, -+ BOARD_GPP_POWER_ON_LED, -+ BOARD_GPP_HDD_POWER, -+ BOARD_GPP_SDIO_POWER, -+ BOARD_GPP_SDIO_DETECT, -+ BOARD_GPP_SDIO_WP, -+ BOARD_GPP_SWITCH_PHY_INT, -+ BOARD_GPP_TSU_DIRCTION, -+ BOARD_GPP_OTHER -+}MV_BOARD_GPP_CLASS; -+ -+ -+typedef struct _devCsInfo -+{ -+ MV_U8 deviceCS; -+ MV_U32 params; -+ MV_U32 devClass; /* MV_BOARD_DEV_CLASS */ -+ MV_U8 devWidth; -+ -+}MV_DEV_CS_INFO; -+ -+ -+#define MV_BOARD_PHY_FORCE_10MB 0x0 -+#define MV_BOARD_PHY_FORCE_100MB 0x1 -+#define MV_BOARD_PHY_FORCE_1000MB 0x2 -+#define MV_BOARD_PHY_SPEED_AUTO 0x3 -+ -+typedef struct _boardSwitchInfo -+{ -+ MV_32 linkStatusIrq; -+ MV_32 qdPort[BOARD_ETH_SWITCH_PORT_NUM]; -+ MV_32 qdCpuPort; -+ MV_32 smiScanMode; /* 1 for SMI_MANUAL_MODE, 0 otherwise */ -+ MV_32 switchOnPort; -+ -+}MV_BOARD_SWITCH_INFO; -+ -+typedef struct _boardLedInfo -+{ -+ MV_U8 activeLedsNumber; -+ MV_U8 ledsPolarity; /* '0' or '1' to turn on led */ -+ MV_U8* gppPinNum; /* Pointer to GPP values */ -+ -+}MV_BOARD_LED_INFO; -+ -+typedef struct _boardGppInfo -+{ -+ MV_BOARD_GPP_CLASS devClass; -+ MV_U8 gppPinNum; -+ -+}MV_BOARD_GPP_INFO; -+ -+ -+typedef struct _boardTwsiInfo -+{ -+ MV_BOARD_TWSI_CLASS devClass; -+ MV_U8 twsiDevAddr; -+ MV_U8 twsiDevAddrType; -+ -+}MV_BOARD_TWSI_INFO; -+ -+ -+typedef enum _boardMacSpeed -+{ -+ BOARD_MAC_SPEED_10M, -+ BOARD_MAC_SPEED_100M, -+ BOARD_MAC_SPEED_1000M, -+ BOARD_MAC_SPEED_AUTO, -+ -+}MV_BOARD_MAC_SPEED; -+ -+typedef struct _boardMacInfo -+{ -+ MV_BOARD_MAC_SPEED boardMacSpeed; -+ MV_U8 boardEthSmiAddr; -+ -+}MV_BOARD_MAC_INFO; -+ -+typedef struct _boardMppInfo -+{ -+ MV_U32 mppGroup[MV_BOARD_MAX_MPP]; -+ -+}MV_BOARD_MPP_INFO; -+ -+typedef struct _boardInfo -+{ -+ char boardName[MV_BOARD_NAME_LEN]; -+ MV_U8 numBoardMppTypeValue; -+ MV_BOARD_MPP_TYPE_INFO* pBoardMppTypeValue; -+ MV_U8 numBoardMppConfigValue; -+ MV_BOARD_MPP_INFO* pBoardMppConfigValue; -+ MV_U32 intsGppMaskLow; -+ MV_U32 intsGppMaskHigh; -+ MV_U8 numBoardDeviceIf; -+ MV_DEV_CS_INFO* pDevCsInfo; -+ MV_U8 numBoardTwsiDev; -+ MV_BOARD_TWSI_INFO* pBoardTwsiDev; -+ MV_U8 numBoardMacInfo; -+ MV_BOARD_MAC_INFO* pBoardMacInfo; -+ MV_U8 numBoardGppInfo; -+ MV_BOARD_GPP_INFO* pBoardGppInfo; -+ MV_U8 activeLedsNumber; -+ MV_U8* pLedGppPin; -+ MV_U8 ledsPolarity; /* '0' or '1' to turn on led */ -+ /* GPP values */ -+ MV_U32 gppOutEnValLow; -+ MV_U32 gppOutEnValHigh; -+ MV_U32 gppOutValLow; -+ MV_U32 gppOutValHigh; -+ MV_U32 gppPolarityValLow; -+ MV_U32 gppPolarityValHigh; -+ -+ /* Switch Configuration */ -+ MV_BOARD_SWITCH_INFO* pSwitchInfo; -+}MV_BOARD_INFO; -+ -+ -+ -+MV_VOID mvBoardEnvInit(MV_VOID); -+MV_U32 mvBoardIdGet(MV_VOID); -+MV_U16 mvBoardModelGet(MV_VOID); -+MV_U16 mvBoardRevGet(MV_VOID); -+MV_STATUS mvBoardNameGet(char *pNameBuff); -+MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum); -+MV_BOARD_MAC_SPEED mvBoardMacSpeedGet(MV_U32 ethPortNum); -+MV_32 mvBoardLinkStatusIrqGet(MV_U32 ethPortNum); -+MV_32 mvBoardSwitchPortGet(MV_U32 ethPortNum, MV_U8 boardPortNum); -+MV_32 mvBoardSwitchCpuPortGet(MV_U32 ethPortNum); -+MV_32 mvBoardIsSwitchConnected(MV_U32 ethPortNum); -+MV_32 mvBoardSmiScanModeGet(MV_U32 ethPortNum); -+MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum); -+MV_BOOL mvBoardIsPortInGmii(MV_VOID); -+MV_U32 mvBoardTclkGet(MV_VOID); -+MV_U32 mvBoardSysClkGet(MV_VOID); -+MV_U32 mvBoardDebugLedNumGet(MV_U32 boardId); -+MV_VOID mvBoardDebugLed(MV_U32 hexNum); -+MV_32 mvBoardMppGet(MV_U32 mppGroupNum); -+ -+MV_U8 mvBoardRtcTwsiAddrTypeGet(MV_VOID); -+MV_U8 mvBoardRtcTwsiAddrGet(MV_VOID); -+ -+MV_U8 mvBoardA2DTwsiAddrTypeGet(MV_VOID); -+MV_U8 mvBoardA2DTwsiAddrGet(MV_VOID); -+ -+MV_U8 mvBoardTwsiExpAddrGet(MV_U32 index); -+MV_U8 mvBoardTwsiSatRAddrTypeGet(MV_U32 index); -+MV_U8 mvBoardTwsiSatRAddrGet(MV_U32 index); -+MV_U8 mvBoardTwsiExpAddrTypeGet(MV_U32 index); -+MV_BOARD_MODULE_ID_CLASS mvBoarModuleTypeGet(MV_BOARD_MPP_GROUP_CLASS devClass); -+MV_BOARD_MPP_TYPE_CLASS mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass); -+MV_VOID mvBoardMppGroupTypeSet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass, -+ MV_BOARD_MPP_TYPE_CLASS mppGroupType); -+MV_VOID mvBoardMppGroupIdUpdate(MV_VOID); -+MV_VOID mvBoardMppMuxSet(MV_VOID); -+MV_VOID mvBoardTdmMppSet(MV_32 chType); -+MV_VOID mvBoardVoiceConnModeGet(MV_32* connMode, MV_32* irqMode); -+ -+MV_VOID mvBoardMppModuleTypePrint(MV_VOID); -+MV_VOID mvBoardReset(MV_VOID); -+MV_U8 mvBoarTwsiSatRGet(MV_U8 devNum, MV_U8 regNum); -+MV_STATUS mvBoarTwsiSatRSet(MV_U8 devNum, MV_U8 regNum, MV_U8 regVal); -+MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data); -+/* Board devices API managments */ -+MV_32 mvBoardGetDevicesNumber(MV_BOARD_DEV_CLASS devClass); -+MV_32 mvBoardGetDeviceBaseAddr(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); -+MV_32 mvBoardGetDeviceBusWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); -+MV_32 mvBoardGetDeviceWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); -+MV_32 mvBoardGetDeviceWinSize(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); -+MV_U32 boardGetDevCSNum(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); -+ -+/* Gpio Pin Connections API */ -+MV_32 mvBoardUSBVbusGpioPinGet(int devId); -+MV_32 mvBoardUSBVbusEnGpioPinGet(int devId); -+MV_U32 mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin); -+ -+MV_32 mvBoardResetGpioPinGet(MV_VOID); -+MV_32 mvBoardRTCGpioPinGet(MV_VOID); -+MV_32 mvBoardGpioIntMaskLowGet(MV_VOID); -+MV_32 mvBoardGpioIntMaskHighGet(MV_VOID); -+MV_32 mvBoardSlicGpioPinGet(MV_U32 slicNum); -+ -+MV_32 mvBoardSDIOGpioPinGet(MV_VOID); -+MV_STATUS mvBoardSDioWPControl(MV_BOOL mode); -+MV_32 mvBoarGpioPinNumGet(MV_BOARD_GPP_CLASS class, MV_U32 index); -+ -+MV_32 mvBoardNandWidthGet(void); -+MV_STATUS mvBoardFanPowerControl(MV_BOOL mode); -+MV_STATUS mvBoardHDDPowerControl(MV_BOOL mode); -+#endif /* __INCmvBoardEnvLibh */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvSpec.c b/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvSpec.c -new file mode 100644 -index 0000000..54508c0 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvSpec.c -@@ -0,0 +1,848 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#include "mvCommon.h" -+#include "mvBoardEnvLib.h" -+#include "mvBoardEnvSpec.h" -+#include "twsi/mvTwsi.h" -+ -+#define DB_88F6281A_BOARD_PCI_IF_NUM 0x0 -+#define DB_88F6281A_BOARD_TWSI_DEF_NUM 0x7 -+#define DB_88F6281A_BOARD_MAC_INFO_NUM 0x2 -+#define DB_88F6281A_BOARD_GPP_INFO_NUM 0x3 -+#define DB_88F6281A_BOARD_MPP_CONFIG_NUM 0x1 -+#define DB_88F6281A_BOARD_MPP_GROUP_TYPE_NUM 0x1 -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ #define DB_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x1 -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ #define DB_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x2 -+#else -+ #define DB_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x1 -+#endif -+#define DB_88F6281A_BOARD_DEBUG_LED_NUM 0x0 -+ -+ -+MV_BOARD_TWSI_INFO db88f6281AInfoBoardTwsiDev[] = -+ /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */ -+ { -+ {BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_SATR, 0x4D, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_SATR, 0x4E, ADDR7_BIT}, -+ {BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT} -+ }; -+ -+MV_BOARD_MAC_INFO db88f6281AInfoBoardMacInfo[] = -+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ -+ { -+ {BOARD_MAC_SPEED_AUTO, 0x8}, -+ {BOARD_MAC_SPEED_AUTO, 0x9} -+ }; -+ -+MV_BOARD_MPP_TYPE_INFO db88f6281AInfoBoardMppTypeInfo[] = -+ /* {{MV_BOARD_MPP_TYPE_CLASS boardMppGroup1, -+ MV_BOARD_MPP_TYPE_CLASS boardMppGroup2}} */ -+ {{MV_BOARD_AUTO, MV_BOARD_AUTO} -+ }; -+ -+MV_BOARD_GPP_INFO db88f6281AInfoBoardGppInfo[] = -+ /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */ -+ { -+ {BOARD_GPP_TSU_DIRCTION, 33} -+ /*muxed with TDM/Audio module via IOexpender -+ {BOARD_GPP_SDIO_DETECT, 38}, -+ {BOARD_GPP_USB_VBUS, 49}*/ -+ }; -+ -+MV_DEV_CS_INFO db88f6281AInfoBoardDeCsInfo[] = -+ /*{deviceCS, params, devType, devWidth}*/ -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */ -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ { -+ {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */ -+ {1, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */ -+ }; -+#else -+ {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */ -+#endif -+ -+MV_BOARD_MPP_INFO db88f6281AInfoBoardMppConfigValue[] = -+ {{{ -+ DB_88F6281A_MPP0_7, -+ DB_88F6281A_MPP8_15, -+ DB_88F6281A_MPP16_23, -+ DB_88F6281A_MPP24_31, -+ DB_88F6281A_MPP32_39, -+ DB_88F6281A_MPP40_47, -+ DB_88F6281A_MPP48_55 -+ }}}; -+ -+ -+MV_BOARD_INFO db88f6281AInfo = { -+ "DB-88F6281A-BP", /* boardName[MAX_BOARD_NAME_LEN] */ -+ DB_88F6281A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */ -+ db88f6281AInfoBoardMppTypeInfo, -+ DB_88F6281A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ db88f6281AInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ 0, /* intsGppMaskHigh */ -+ DB_88F6281A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ db88f6281AInfoBoardDeCsInfo, -+ DB_88F6281A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ db88f6281AInfoBoardTwsiDev, -+ DB_88F6281A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ db88f6281AInfoBoardMacInfo, -+ DB_88F6281A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ db88f6281AInfoBoardGppInfo, -+ DB_88F6281A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ NULL, -+ 0, /* ledsPolarity */ -+ DB_88F6281A_OE_LOW, /* gppOutEnLow */ -+ DB_88F6281A_OE_HIGH, /* gppOutEnHigh */ -+ DB_88F6281A_OE_VAL_LOW, /* gppOutValLow */ -+ DB_88F6281A_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ BIT6, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+ -+#define RD_88F6281A_BOARD_PCI_IF_NUM 0x0 -+#define RD_88F6281A_BOARD_TWSI_DEF_NUM 0x2 -+#define RD_88F6281A_BOARD_MAC_INFO_NUM 0x2 -+#define RD_88F6281A_BOARD_GPP_INFO_NUM 0x5 -+#define RD_88F6281A_BOARD_MPP_GROUP_TYPE_NUM 0x1 -+#define RD_88F6281A_BOARD_MPP_CONFIG_NUM 0x1 -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ #define RD_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x1 -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ #define RD_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x2 -+#else -+ #define RD_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x1 -+#endif -+#define RD_88F6281A_BOARD_DEBUG_LED_NUM 0x0 -+ -+MV_BOARD_MAC_INFO rd88f6281AInfoBoardMacInfo[] = -+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ -+ {{BOARD_MAC_SPEED_1000M, 0xa}, -+ {BOARD_MAC_SPEED_AUTO, 0xb} -+ }; -+ -+MV_BOARD_SWITCH_INFO rd88f6281AInfoBoardSwitchInfo[] = -+ /* MV_32 linkStatusIrq, {MV_32 qdPort0, MV_32 qdPort1, MV_32 qdPort2, MV_32 qdPort3, MV_32 qdPort4}, -+ MV_32 qdCpuPort, MV_32 smiScanMode, MV_32 switchOnPort} */ -+ {{38, {0, 1, 2, 3, -1}, 5, 2, 0}, -+ {-1, {-1}, -1, -1, -1}}; -+ -+MV_BOARD_TWSI_INFO rd88f6281AInfoBoardTwsiDev[] = -+ /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */ -+ { -+ {BOARD_DEV_TWSI_EXP, 0xFF, ADDR7_BIT}, /* dummy entry to align with modules indexes */ -+ {BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT} -+ }; -+ -+MV_BOARD_MPP_TYPE_INFO rd88f6281AInfoBoardMppTypeInfo[] = -+ {{MV_BOARD_RGMII, MV_BOARD_TDM} -+ }; -+ -+MV_DEV_CS_INFO rd88f6281AInfoBoardDeCsInfo[] = -+ /*{deviceCS, params, devType, devWidth}*/ -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */ -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ { -+ {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */ -+ {1, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */ -+ }; -+#else -+ {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */ -+#endif -+ -+MV_BOARD_GPP_INFO rd88f6281AInfoBoardGppInfo[] = -+ /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */ -+ {{BOARD_GPP_SDIO_DETECT, 28}, -+ {BOARD_GPP_USB_OC, 29}, -+ {BOARD_GPP_WPS_BUTTON, 35}, -+ {BOARD_GPP_MV_SWITCH, 38}, -+ {BOARD_GPP_USB_VBUS, 49} -+ }; -+ -+MV_BOARD_MPP_INFO rd88f6281AInfoBoardMppConfigValue[] = -+ {{{ -+ RD_88F6281A_MPP0_7, -+ RD_88F6281A_MPP8_15, -+ RD_88F6281A_MPP16_23, -+ RD_88F6281A_MPP24_31, -+ RD_88F6281A_MPP32_39, -+ RD_88F6281A_MPP40_47, -+ RD_88F6281A_MPP48_55 -+ }}}; -+ -+MV_BOARD_INFO rd88f6281AInfo = { -+ "RD-88F6281A", /* boardName[MAX_BOARD_NAME_LEN] */ -+ RD_88F6281A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */ -+ rd88f6281AInfoBoardMppTypeInfo, -+ RD_88F6281A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ rd88f6281AInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ (1 << 3), /* intsGppMaskHigh */ -+ RD_88F6281A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ rd88f6281AInfoBoardDeCsInfo, -+ RD_88F6281A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ rd88f6281AInfoBoardTwsiDev, -+ RD_88F6281A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ rd88f6281AInfoBoardMacInfo, -+ RD_88F6281A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ rd88f6281AInfoBoardGppInfo, -+ RD_88F6281A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ NULL, -+ 0, /* ledsPolarity */ -+ RD_88F6281A_OE_LOW, /* gppOutEnLow */ -+ RD_88F6281A_OE_HIGH, /* gppOutEnHigh */ -+ RD_88F6281A_OE_VAL_LOW, /* gppOutValLow */ -+ RD_88F6281A_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ BIT6, /* gppPolarityValHigh */ -+ rd88f6281AInfoBoardSwitchInfo /* pSwitchInfo */ -+}; -+ -+ -+#define DB_88F6192A_BOARD_PCI_IF_NUM 0x0 -+#define DB_88F6192A_BOARD_TWSI_DEF_NUM 0x7 -+#define DB_88F6192A_BOARD_MAC_INFO_NUM 0x2 -+#define DB_88F6192A_BOARD_GPP_INFO_NUM 0x3 -+#define DB_88F6192A_BOARD_MPP_GROUP_TYPE_NUM 0x1 -+#define DB_88F6192A_BOARD_MPP_CONFIG_NUM 0x1 -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ #define DB_88F6192A_BOARD_DEVICE_CONFIG_NUM 0x1 -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ #define DB_88F6192A_BOARD_DEVICE_CONFIG_NUM 0x2 -+#else -+ #define DB_88F6192A_BOARD_DEVICE_CONFIG_NUM 0x1 -+#endif -+#define DB_88F6192A_BOARD_DEBUG_LED_NUM 0x0 -+ -+MV_BOARD_TWSI_INFO db88f6192AInfoBoardTwsiDev[] = -+ /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */ -+ { -+ {BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_SATR, 0x4D, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_SATR, 0x4E, ADDR7_BIT}, -+ {BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT} -+ }; -+ -+MV_BOARD_MAC_INFO db88f6192AInfoBoardMacInfo[] = -+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ -+ { -+ {BOARD_MAC_SPEED_AUTO, 0x8}, -+ {BOARD_MAC_SPEED_AUTO, 0x9} -+ }; -+ -+MV_BOARD_MPP_TYPE_INFO db88f6192AInfoBoardMppTypeInfo[] = -+ /* {{MV_BOARD_MPP_TYPE_CLASS boardMppGroup1, -+ MV_BOARD_MPP_TYPE_CLASS boardMppGroup2}} */ -+ {{MV_BOARD_AUTO, MV_BOARD_OTHER} -+ }; -+ -+MV_DEV_CS_INFO db88f6192AInfoBoardDeCsInfo[] = -+ /*{deviceCS, params, devType, devWidth}*/ -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */ -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ { -+ {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */ -+ {1, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */ -+ }; -+#else -+ {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */ -+#endif -+ -+MV_BOARD_GPP_INFO db88f6192AInfoBoardGppInfo[] = -+ /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */ -+ { -+ {BOARD_GPP_SDIO_WP, 20}, -+ {BOARD_GPP_USB_VBUS, 22}, -+ {BOARD_GPP_SDIO_DETECT, 23}, -+ }; -+ -+MV_BOARD_MPP_INFO db88f6192AInfoBoardMppConfigValue[] = -+ {{{ -+ DB_88F6192A_MPP0_7, -+ DB_88F6192A_MPP8_15, -+ DB_88F6192A_MPP16_23, -+ DB_88F6192A_MPP24_31, -+ DB_88F6192A_MPP32_35 -+ }}}; -+ -+MV_BOARD_INFO db88f6192AInfo = { -+ "DB-88F6192A-BP", /* boardName[MAX_BOARD_NAME_LEN] */ -+ DB_88F6192A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */ -+ db88f6192AInfoBoardMppTypeInfo, -+ DB_88F6192A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ db88f6192AInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ (1 << 3), /* intsGppMaskHigh */ -+ DB_88F6192A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ db88f6192AInfoBoardDeCsInfo, -+ DB_88F6192A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ db88f6192AInfoBoardTwsiDev, -+ DB_88F6192A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ db88f6192AInfoBoardMacInfo, -+ DB_88F6192A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ db88f6192AInfoBoardGppInfo, -+ DB_88F6192A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ NULL, -+ 0, /* ledsPolarity */ -+ DB_88F6192A_OE_LOW, /* gppOutEnLow */ -+ DB_88F6192A_OE_HIGH, /* gppOutEnHigh */ -+ DB_88F6192A_OE_VAL_LOW, /* gppOutValLow */ -+ DB_88F6192A_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ 0, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+#define DB_88F6190A_BOARD_MAC_INFO_NUM 0x1 -+ -+MV_BOARD_INFO db88f6190AInfo = { -+ "DB-88F6190A-BP", /* boardName[MAX_BOARD_NAME_LEN] */ -+ DB_88F6192A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */ -+ db88f6192AInfoBoardMppTypeInfo, -+ DB_88F6192A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ db88f6192AInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ (1 << 3), /* intsGppMaskHigh */ -+ DB_88F6192A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ db88f6192AInfoBoardDeCsInfo, -+ DB_88F6192A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ db88f6192AInfoBoardTwsiDev, -+ DB_88F6190A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ db88f6192AInfoBoardMacInfo, -+ DB_88F6192A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ db88f6192AInfoBoardGppInfo, -+ DB_88F6192A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ NULL, -+ 0, /* ledsPolarity */ -+ DB_88F6192A_OE_LOW, /* gppOutEnLow */ -+ DB_88F6192A_OE_HIGH, /* gppOutEnHigh */ -+ DB_88F6192A_OE_VAL_LOW, /* gppOutValLow */ -+ DB_88F6192A_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ 0, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+#define RD_88F6192A_BOARD_PCI_IF_NUM 0x0 -+#define RD_88F6192A_BOARD_TWSI_DEF_NUM 0x0 -+#define RD_88F6192A_BOARD_MAC_INFO_NUM 0x1 -+#define RD_88F6192A_BOARD_GPP_INFO_NUM 0xE -+#define RD_88F6192A_BOARD_MPP_GROUP_TYPE_NUM 0x1 -+#define RD_88F6192A_BOARD_MPP_CONFIG_NUM 0x1 -+#define RD_88F6192A_BOARD_DEVICE_CONFIG_NUM 0x1 -+#define RD_88F6192A_BOARD_DEBUG_LED_NUM 0x3 -+ -+MV_U8 rd88f6192AInfoBoardDebugLedIf[] = -+ {17, 28, 29}; -+ -+MV_BOARD_MAC_INFO rd88f6192AInfoBoardMacInfo[] = -+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ -+ {{BOARD_MAC_SPEED_AUTO, 0x8} -+ }; -+ -+MV_BOARD_MPP_TYPE_INFO rd88f6192AInfoBoardMppTypeInfo[] = -+ /* {{MV_BOARD_MPP_TYPE_CLASS boardMppGroup1, -+ MV_BOARD_MPP_TYPE_CLASS boardMppGroup2}} */ -+ {{MV_BOARD_OTHER, MV_BOARD_OTHER} -+ }; -+ -+MV_DEV_CS_INFO rd88f6192AInfoBoardDeCsInfo[] = -+ /*{deviceCS, params, devType, devWidth}*/ -+ {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */ -+ -+MV_BOARD_GPP_INFO rd88f6192AInfoBoardGppInfo[] = -+ /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */ -+ { -+ {BOARD_GPP_USB_VBUS_EN, 10}, -+ {BOARD_GPP_USB_HOST_DEVICE, 11}, -+ {BOARD_GPP_RESET, 14}, -+ {BOARD_GPP_POWER_ON_LED, 15}, -+ {BOARD_GPP_HDD_POWER, 16}, -+ {BOARD_GPP_WPS_BUTTON, 24}, -+ {BOARD_GPP_TS_BUTTON_C, 25}, -+ {BOARD_GPP_USB_VBUS, 26}, -+ {BOARD_GPP_USB_OC, 27}, -+ {BOARD_GPP_TS_BUTTON_U, 30}, -+ {BOARD_GPP_TS_BUTTON_R, 31}, -+ {BOARD_GPP_TS_BUTTON_L, 32}, -+ {BOARD_GPP_TS_BUTTON_D, 34}, -+ {BOARD_GPP_FAN_POWER, 35} -+ }; -+ -+MV_BOARD_MPP_INFO rd88f6192AInfoBoardMppConfigValue[] = -+ {{{ -+ RD_88F6192A_MPP0_7, -+ RD_88F6192A_MPP8_15, -+ RD_88F6192A_MPP16_23, -+ RD_88F6192A_MPP24_31, -+ RD_88F6192A_MPP32_35 -+ }}}; -+ -+MV_BOARD_INFO rd88f6192AInfo = { -+ "RD-88F6192A-NAS", /* boardName[MAX_BOARD_NAME_LEN] */ -+ RD_88F6192A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */ -+ rd88f6192AInfoBoardMppTypeInfo, -+ RD_88F6192A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ rd88f6192AInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ (1 << 3), /* intsGppMaskHigh */ -+ RD_88F6192A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ rd88f6192AInfoBoardDeCsInfo, -+ RD_88F6192A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ NULL, -+ RD_88F6192A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ rd88f6192AInfoBoardMacInfo, -+ RD_88F6192A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ rd88f6192AInfoBoardGppInfo, -+ RD_88F6192A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ rd88f6192AInfoBoardDebugLedIf, -+ 0, /* ledsPolarity */ -+ RD_88F6192A_OE_LOW, /* gppOutEnLow */ -+ RD_88F6192A_OE_HIGH, /* gppOutEnHigh */ -+ RD_88F6192A_OE_VAL_LOW, /* gppOutValLow */ -+ RD_88F6192A_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ 0, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+MV_BOARD_INFO rd88f6190AInfo = { -+ "RD-88F6190A-NAS", /* boardName[MAX_BOARD_NAME_LEN] */ -+ RD_88F6192A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */ -+ rd88f6192AInfoBoardMppTypeInfo, -+ RD_88F6192A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ rd88f6192AInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ (1 << 3), /* intsGppMaskHigh */ -+ RD_88F6192A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ rd88f6192AInfoBoardDeCsInfo, -+ RD_88F6192A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ NULL, -+ RD_88F6192A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ rd88f6192AInfoBoardMacInfo, -+ RD_88F6192A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ rd88f6192AInfoBoardGppInfo, -+ RD_88F6192A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ rd88f6192AInfoBoardDebugLedIf, -+ 0, /* ledsPolarity */ -+ RD_88F6192A_OE_LOW, /* gppOutEnLow */ -+ RD_88F6192A_OE_HIGH, /* gppOutEnHigh */ -+ RD_88F6192A_OE_VAL_LOW, /* gppOutValLow */ -+ RD_88F6192A_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ 0, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+#define DB_88F6180A_BOARD_PCI_IF_NUM 0x0 -+#define DB_88F6180A_BOARD_TWSI_DEF_NUM 0x5 -+#define DB_88F6180A_BOARD_MAC_INFO_NUM 0x1 -+#define DB_88F6180A_BOARD_GPP_INFO_NUM 0x0 -+#define DB_88F6180A_BOARD_MPP_GROUP_TYPE_NUM 0x2 -+#define DB_88F6180A_BOARD_MPP_CONFIG_NUM 0x1 -+#define DB_88F6180A_BOARD_DEVICE_CONFIG_NUM 0x1 -+#define DB_88F6180A_BOARD_DEBUG_LED_NUM 0x0 -+ -+MV_BOARD_TWSI_INFO db88f6180AInfoBoardTwsiDev[] = -+ /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */ -+ { -+ {BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT}, -+ {BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT}, -+ {BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT} -+ }; -+ -+MV_BOARD_MAC_INFO db88f6180AInfoBoardMacInfo[] = -+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ -+ {{BOARD_MAC_SPEED_AUTO, 0x8} -+ }; -+ -+MV_BOARD_GPP_INFO db88f6180AInfoBoardGppInfo[] = -+ /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */ -+ { -+ /* Muxed with TDM/Audio module via IOexpender -+ {BOARD_GPP_USB_VBUS, 6} */ -+ }; -+ -+MV_BOARD_MPP_TYPE_INFO db88f6180AInfoBoardMppTypeInfo[] = -+ /* {{MV_BOARD_MPP_TYPE_CLASS boardMppGroup1, -+ MV_BOARD_MPP_TYPE_CLASS boardMppGroup2}} */ -+ {{MV_BOARD_OTHER, MV_BOARD_AUTO} -+ }; -+ -+MV_DEV_CS_INFO db88f6180AInfoBoardDeCsInfo[] = -+ /*{deviceCS, params, devType, devWidth}*/ -+#if defined(MV_NAND_BOOT) -+ {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */ -+#else -+ {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */ -+#endif -+ -+MV_BOARD_MPP_INFO db88f6180AInfoBoardMppConfigValue[] = -+ {{{ -+ DB_88F6180A_MPP0_7, -+ DB_88F6180A_MPP8_15, -+ DB_88F6180A_MPP16_23, -+ DB_88F6180A_MPP24_31, -+ DB_88F6180A_MPP32_39, -+ DB_88F6180A_MPP40_44 -+ }}}; -+ -+MV_BOARD_INFO db88f6180AInfo = { -+ "DB-88F6180A-BP", /* boardName[MAX_BOARD_NAME_LEN] */ -+ DB_88F6180A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */ -+ db88f6180AInfoBoardMppTypeInfo, -+ DB_88F6180A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ db88f6180AInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ 0, /* intsGppMaskHigh */ -+ DB_88F6180A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ db88f6180AInfoBoardDeCsInfo, -+ DB_88F6180A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ db88f6180AInfoBoardTwsiDev, -+ DB_88F6180A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ db88f6180AInfoBoardMacInfo, -+ DB_88F6180A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ NULL, -+ DB_88F6180A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ NULL, -+ 0, /* ledsPolarity */ -+ DB_88F6180A_OE_LOW, /* gppOutEnLow */ -+ DB_88F6180A_OE_HIGH, /* gppOutEnHigh */ -+ DB_88F6180A_OE_VAL_LOW, /* gppOutValLow */ -+ DB_88F6180A_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ 0, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+ -+#define RD_88F6281A_PCAC_BOARD_PCI_IF_NUM 0x0 -+#define RD_88F6281A_PCAC_BOARD_TWSI_DEF_NUM 0x1 -+#define RD_88F6281A_PCAC_BOARD_MAC_INFO_NUM 0x1 -+#define RD_88F6281A_PCAC_BOARD_GPP_INFO_NUM 0x0 -+#define RD_88F6281A_PCAC_BOARD_MPP_GROUP_TYPE_NUM 0x1 -+#define RD_88F6281A_PCAC_BOARD_MPP_CONFIG_NUM 0x1 -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ #define RD_88F6281A_PCAC_BOARD_DEVICE_CONFIG_NUM 0x1 -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ #define RD_88F6281A_PCAC_BOARD_DEVICE_CONFIG_NUM 0x2 -+#else -+ #define RD_88F6281A_PCAC_BOARD_DEVICE_CONFIG_NUM 0x1 -+#endif -+#define RD_88F6281A_PCAC_BOARD_DEBUG_LED_NUM 0x4 -+ -+MV_U8 rd88f6281APcacInfoBoardDebugLedIf[] = -+ {38, 39, 40, 41}; -+ -+MV_BOARD_MAC_INFO rd88f6281APcacInfoBoardMacInfo[] = -+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ -+ {{BOARD_MAC_SPEED_AUTO, 0x8} -+ }; -+ -+MV_BOARD_TWSI_INFO rd88f6281APcacInfoBoardTwsiDev[] = -+ /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */ -+ { -+ {BOARD_TWSI_OTHER, 0xa7, ADDR7_BIT} -+ }; -+ -+MV_BOARD_MPP_TYPE_INFO rd88f6281APcacInfoBoardMppTypeInfo[] = -+ {{MV_BOARD_OTHER, MV_BOARD_OTHER} -+ }; -+ -+MV_DEV_CS_INFO rd88f6281APcacInfoBoardDeCsInfo[] = -+ /*{deviceCS, params, devType, devWidth}*/ -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */ -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ { -+ {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */ -+ {1, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */ -+ }; -+#else -+ {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */ -+#endif -+ -+MV_BOARD_MPP_INFO rd88f6281APcacInfoBoardMppConfigValue[] = -+ {{{ -+ RD_88F6281A_PCAC_MPP0_7, -+ RD_88F6281A_PCAC_MPP8_15, -+ RD_88F6281A_PCAC_MPP16_23, -+ RD_88F6281A_PCAC_MPP24_31, -+ RD_88F6281A_PCAC_MPP32_39, -+ RD_88F6281A_PCAC_MPP40_47, -+ RD_88F6281A_PCAC_MPP48_55 -+ }}}; -+ -+MV_BOARD_INFO rd88f6281APcacInfo = { -+ "RD-88F6281A-PCAC", /* boardName[MAX_BOARD_NAME_LEN] */ -+ RD_88F6281A_PCAC_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */ -+ rd88f6281APcacInfoBoardMppTypeInfo, -+ RD_88F6281A_PCAC_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ rd88f6281APcacInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ (1 << 3), /* intsGppMaskHigh */ -+ RD_88F6281A_PCAC_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ rd88f6281APcacInfoBoardDeCsInfo, -+ RD_88F6281A_PCAC_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ rd88f6281APcacInfoBoardTwsiDev, -+ RD_88F6281A_PCAC_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ rd88f6281APcacInfoBoardMacInfo, -+ RD_88F6281A_PCAC_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ 0, -+ RD_88F6281A_PCAC_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ NULL, -+ 0, /* ledsPolarity */ -+ RD_88F6281A_PCAC_OE_LOW, /* gppOutEnLow */ -+ RD_88F6281A_PCAC_OE_HIGH, /* gppOutEnHigh */ -+ RD_88F6281A_PCAC_OE_VAL_LOW, /* gppOutValLow */ -+ RD_88F6281A_PCAC_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ 0, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+ -+/* 6281 Sheeva Plug*/ -+ -+#define SHEEVA_PLUG_BOARD_PCI_IF_NUM 0x0 -+#define SHEEVA_PLUG_BOARD_TWSI_DEF_NUM 0x0 -+#define SHEEVA_PLUG_BOARD_MAC_INFO_NUM 0x1 -+#define SHEEVA_PLUG_BOARD_GPP_INFO_NUM 0x0 -+#define SHEEVA_PLUG_BOARD_MPP_GROUP_TYPE_NUN 0x1 -+#define SHEEVA_PLUG_BOARD_MPP_CONFIG_NUM 0x1 -+#define SHEEVA_PLUG_BOARD_DEVICE_CONFIG_NUM 0x1 -+#define SHEEVA_PLUG_BOARD_DEBUG_LED_NUM 0x1 -+ -+MV_U8 sheevaPlugInfoBoardDebugLedIf[] = -+ {49}; -+ -+MV_BOARD_MAC_INFO sheevaPlugInfoBoardMacInfo[] = -+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ -+ {{BOARD_MAC_SPEED_AUTO, 0x0}}; -+ -+MV_BOARD_TWSI_INFO sheevaPlugInfoBoardTwsiDev[] = -+ /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */ -+ {{BOARD_TWSI_OTHER, 0x0, ADDR7_BIT}}; -+ -+MV_BOARD_MPP_TYPE_INFO sheevaPlugInfoBoardMppTypeInfo[] = -+ {{MV_BOARD_OTHER, MV_BOARD_OTHER} -+ }; -+ -+MV_DEV_CS_INFO sheevaPlugInfoBoardDeCsInfo[] = -+ /*{deviceCS, params, devType, devWidth}*/ -+ {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */ -+ -+MV_BOARD_MPP_INFO sheevaPlugInfoBoardMppConfigValue[] = -+ {{{ -+ RD_SHEEVA_PLUG_MPP0_7, -+ RD_SHEEVA_PLUG_MPP8_15, -+ RD_SHEEVA_PLUG_MPP16_23, -+ RD_SHEEVA_PLUG_MPP24_31, -+ RD_SHEEVA_PLUG_MPP32_39, -+ RD_SHEEVA_PLUG_MPP40_47, -+ RD_SHEEVA_PLUG_MPP48_55 -+ }}}; -+ -+MV_BOARD_INFO sheevaPlugInfo = { -+ "SHEEVA PLUG", /* boardName[MAX_BOARD_NAME_LEN] */ -+ SHEEVA_PLUG_BOARD_MPP_GROUP_TYPE_NUN, /* numBoardMppGroupType */ -+ sheevaPlugInfoBoardMppTypeInfo, -+ SHEEVA_PLUG_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ sheevaPlugInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ 0, /* intsGppMaskHigh */ -+ SHEEVA_PLUG_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ sheevaPlugInfoBoardDeCsInfo, -+ SHEEVA_PLUG_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ sheevaPlugInfoBoardTwsiDev, -+ SHEEVA_PLUG_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ sheevaPlugInfoBoardMacInfo, -+ SHEEVA_PLUG_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ 0, -+ SHEEVA_PLUG_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ sheevaPlugInfoBoardDebugLedIf, -+ 0, /* ledsPolarity */ -+ RD_SHEEVA_PLUG_OE_LOW, /* gppOutEnLow */ -+ RD_SHEEVA_PLUG_OE_HIGH, /* gppOutEnHigh */ -+ RD_SHEEVA_PLUG_OE_VAL_LOW, /* gppOutValLow */ -+ RD_SHEEVA_PLUG_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ 0, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+/* Customer specific board place holder*/ -+ -+#define DB_CUSTOMER_BOARD_PCI_IF_NUM 0x0 -+#define DB_CUSTOMER_BOARD_TWSI_DEF_NUM 0x0 -+#define DB_CUSTOMER_BOARD_MAC_INFO_NUM 0x0 -+#define DB_CUSTOMER_BOARD_GPP_INFO_NUM 0x0 -+#define DB_CUSTOMER_BOARD_MPP_GROUP_TYPE_NUN 0x0 -+#define DB_CUSTOMER_BOARD_MPP_CONFIG_NUM 0x0 -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ #define DB_CUSTOMER_BOARD_DEVICE_CONFIG_NUM 0x0 -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ #define DB_CUSTOMER_BOARD_DEVICE_CONFIG_NUM 0x0 -+#else -+ #define DB_CUSTOMER_BOARD_DEVICE_CONFIG_NUM 0x0 -+#endif -+#define DB_CUSTOMER_BOARD_DEBUG_LED_NUM 0x0 -+ -+MV_U8 dbCustomerInfoBoardDebugLedIf[] = -+ {0}; -+ -+MV_BOARD_MAC_INFO dbCustomerInfoBoardMacInfo[] = -+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ -+ {{BOARD_MAC_SPEED_AUTO, 0x0}}; -+ -+MV_BOARD_TWSI_INFO dbCustomerInfoBoardTwsiDev[] = -+ /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */ -+ {{BOARD_TWSI_OTHER, 0x0, ADDR7_BIT}}; -+ -+MV_BOARD_MPP_TYPE_INFO dbCustomerInfoBoardMppTypeInfo[] = -+ {{MV_BOARD_OTHER, MV_BOARD_OTHER} -+ }; -+ -+MV_DEV_CS_INFO dbCustomerInfoBoardDeCsInfo[] = -+ /*{deviceCS, params, devType, devWidth}*/ -+#if defined(MV_NAND) && defined(MV_NAND_BOOT) -+ {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */ -+#elif defined(MV_NAND) && defined(MV_SPI_BOOT) -+ { -+ {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */ -+ {2, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */ -+ }; -+#else -+ {{2, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */ -+#endif -+ -+MV_BOARD_MPP_INFO dbCustomerInfoBoardMppConfigValue[] = -+ {{{ -+ DB_CUSTOMER_MPP0_7, -+ DB_CUSTOMER_MPP8_15, -+ DB_CUSTOMER_MPP16_23, -+ DB_CUSTOMER_MPP24_31, -+ DB_CUSTOMER_MPP32_39, -+ DB_CUSTOMER_MPP40_47, -+ DB_CUSTOMER_MPP48_55 -+ }}}; -+ -+MV_BOARD_INFO dbCustomerInfo = { -+ "DB-CUSTOMER", /* boardName[MAX_BOARD_NAME_LEN] */ -+ DB_CUSTOMER_BOARD_MPP_GROUP_TYPE_NUN, /* numBoardMppGroupType */ -+ dbCustomerInfoBoardMppTypeInfo, -+ DB_CUSTOMER_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */ -+ dbCustomerInfoBoardMppConfigValue, -+ 0, /* intsGppMaskLow */ -+ 0, /* intsGppMaskHigh */ -+ DB_CUSTOMER_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */ -+ dbCustomerInfoBoardDeCsInfo, -+ DB_CUSTOMER_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */ -+ dbCustomerInfoBoardTwsiDev, -+ DB_CUSTOMER_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */ -+ dbCustomerInfoBoardMacInfo, -+ DB_CUSTOMER_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */ -+ 0, -+ DB_CUSTOMER_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */ -+ NULL, -+ 0, /* ledsPolarity */ -+ DB_CUSTOMER_OE_LOW, /* gppOutEnLow */ -+ DB_CUSTOMER_OE_HIGH, /* gppOutEnHigh */ -+ DB_CUSTOMER_OE_VAL_LOW, /* gppOutValLow */ -+ DB_CUSTOMER_OE_VAL_HIGH, /* gppOutValHigh */ -+ 0, /* gppPolarityValLow */ -+ 0, /* gppPolarityValHigh */ -+ NULL /* pSwitchInfo */ -+}; -+ -+MV_BOARD_INFO* boardInfoTbl[] = { -+ &db88f6281AInfo, -+ &rd88f6281AInfo, -+ &db88f6192AInfo, -+ &rd88f6192AInfo, -+ &db88f6180AInfo, -+ &db88f6190AInfo, -+ &rd88f6190AInfo, -+ &rd88f6281APcacInfo, -+ &dbCustomerInfo, -+ &sheevaPlugInfo -+ }; -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvSpec.h b/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvSpec.h -new file mode 100644 -index 0000000..b11dafb ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/mvBoardEnvSpec.h -@@ -0,0 +1,262 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvBoardEnvSpech -+#define __INCmvBoardEnvSpech -+ -+#include "mvSysHwConfig.h" -+ -+ -+/* For future use */ -+#define BD_ID_DATA_START_OFFS 0x0 -+#define BD_DETECT_SEQ_OFFS 0x0 -+#define BD_SYS_NUM_OFFS 0x4 -+#define BD_NAME_OFFS 0x8 -+ -+/* I2C bus addresses */ -+#define MV_BOARD_CTRL_I2C_ADDR 0x0 /* Controller slave addr */ -+#define MV_BOARD_CTRL_I2C_ADDR_TYPE ADDR7_BIT -+#define MV_BOARD_DIMM0_I2C_ADDR 0x56 -+#define MV_BOARD_DIMM0_I2C_ADDR_TYPE ADDR7_BIT -+#define MV_BOARD_DIMM1_I2C_ADDR 0x54 -+#define MV_BOARD_DIMM1_I2C_ADDR_TYPE ADDR7_BIT -+#define MV_BOARD_EEPROM_I2C_ADDR 0x51 -+#define MV_BOARD_EEPROM_I2C_ADDR_TYPE ADDR7_BIT -+#define MV_BOARD_MAIN_EEPROM_I2C_ADDR 0x50 -+#define MV_BOARD_MAIN_EEPROM_I2C_ADDR_TYPE ADDR7_BIT -+#define MV_BOARD_MUX_I2C_ADDR_ENTRY 0x2 -+#define MV_BOARD_DIMM_I2C_CHANNEL 0x0 -+ -+#define BOOT_FLASH_INDEX 0 -+#define MAIN_FLASH_INDEX 1 -+ -+#define BOARD_ETH_START_PORT_NUM 0 -+ -+/* Supported clocks */ -+#define MV_BOARD_TCLK_100MHZ 100000000 -+#define MV_BOARD_TCLK_125MHZ 125000000 -+#define MV_BOARD_TCLK_133MHZ 133333333 -+#define MV_BOARD_TCLK_150MHZ 150000000 -+#define MV_BOARD_TCLK_166MHZ 166666667 -+#define MV_BOARD_TCLK_200MHZ 200000000 -+ -+#define MV_BOARD_SYSCLK_100MHZ 100000000 -+#define MV_BOARD_SYSCLK_125MHZ 125000000 -+#define MV_BOARD_SYSCLK_133MHZ 133333333 -+#define MV_BOARD_SYSCLK_150MHZ 150000000 -+#define MV_BOARD_SYSCLK_166MHZ 166666667 -+#define MV_BOARD_SYSCLK_200MHZ 200000000 -+#define MV_BOARD_SYSCLK_233MHZ 233333333 -+#define MV_BOARD_SYSCLK_250MHZ 250000000 -+#define MV_BOARD_SYSCLK_267MHZ 266666667 -+#define MV_BOARD_SYSCLK_300MHZ 300000000 -+#define MV_BOARD_SYSCLK_333MHZ 333333334 -+#define MV_BOARD_SYSCLK_400MHZ 400000000 -+ -+#define MV_BOARD_REFCLK_25MHZ 25000000 -+ -+/* Board specific */ -+/* =============================== */ -+ -+/* boards ID numbers */ -+ -+#define BOARD_ID_BASE 0x0 -+ -+/* New board ID numbers */ -+#define DB_88F6281A_BP_ID (BOARD_ID_BASE) -+#define DB_88F6281_BP_MLL_ID 1680 -+#define RD_88F6281A_ID (BOARD_ID_BASE+0x1) -+#define RD_88F6281_MLL_ID 1682 -+#define DB_88F6192A_BP_ID (BOARD_ID_BASE+0x2) -+#define RD_88F6192A_ID (BOARD_ID_BASE+0x3) -+#define RD_88F6192_MLL_ID 1681 -+#define DB_88F6180A_BP_ID (BOARD_ID_BASE+0x4) -+#define DB_88F6190A_BP_ID (BOARD_ID_BASE+0x5) -+#define RD_88F6190A_ID (BOARD_ID_BASE+0x6) -+#define RD_88F6281A_PCAC_ID (BOARD_ID_BASE+0x7) -+#define DB_CUSTOMER_ID (BOARD_ID_BASE+0x8) -+#define SHEEVA_PLUG_ID (BOARD_ID_BASE+0x9) -+#define MV_MAX_BOARD_ID (SHEEVA_PLUG_ID + 1) -+ -+/* DB-88F6281A-BP */ -+#if defined(MV_NAND) -+ #define DB_88F6281A_MPP0_7 0x21111111 -+#else -+ #define DB_88F6281A_MPP0_7 0x21112220 -+#endif -+#define DB_88F6281A_MPP8_15 0x11113311 -+#define DB_88F6281A_MPP16_23 0x00551111 -+#define DB_88F6281A_MPP24_31 0x00000000 -+#define DB_88F6281A_MPP32_39 0x00000000 -+#define DB_88F6281A_MPP40_47 0x00000000 -+#define DB_88F6281A_MPP48_55 0x00000000 -+#define DB_88F6281A_OE_LOW 0x0 -+#if defined(MV_TDM_5CHANNELS) -+ #define DB_88F6281A_OE_HIGH (BIT6) -+#else -+#define DB_88F6281A_OE_HIGH 0x0 -+#endif -+#define DB_88F6281A_OE_VAL_LOW 0x0 -+#define DB_88F6281A_OE_VAL_HIGH 0x0 -+ -+/* RD-88F6281A */ -+#if defined(MV_NAND) -+ #define RD_88F6281A_MPP0_7 0x21111111 -+#else -+ #define RD_88F6281A_MPP0_7 0x21112220 -+#endif -+#define RD_88F6281A_MPP8_15 0x11113311 -+#define RD_88F6281A_MPP16_23 0x33331111 -+#define RD_88F6281A_MPP24_31 0x33003333 -+#define RD_88F6281A_MPP32_39 0x20440533 -+#define RD_88F6281A_MPP40_47 0x22202222 -+#define RD_88F6281A_MPP48_55 0x00000002 -+#define RD_88F6281A_OE_LOW (BIT28 | BIT29) -+#define RD_88F6281A_OE_HIGH (BIT3 | BIT6 | BIT17) -+#define RD_88F6281A_OE_VAL_LOW 0x0 -+#define RD_88F6281A_OE_VAL_HIGH 0x0 -+ -+/* DB-88F6192A-BP */ -+#if defined(MV_NAND) -+ #define DB_88F6192A_MPP0_7 0x21111111 -+#else -+ #define DB_88F6192A_MPP0_7 0x21112220 -+#endif -+#define DB_88F6192A_MPP8_15 0x11113311 -+#define DB_88F6192A_MPP16_23 0x00501111 -+#define DB_88F6192A_MPP24_31 0x00000000 -+#define DB_88F6192A_MPP32_35 0x00000000 -+#define DB_88F6192A_OE_LOW (BIT22 | BIT23) -+#define DB_88F6192A_OE_HIGH 0x0 -+#define DB_88F6192A_OE_VAL_LOW 0x0 -+#define DB_88F6192A_OE_VAL_HIGH 0x0 -+ -+/* RD-88F6192A */ -+#define RD_88F6192A_MPP0_7 0x01222222 -+#define RD_88F6192A_MPP8_15 0x00000011 -+#define RD_88F6192A_MPP16_23 0x05550000 -+#define RD_88F6192A_MPP24_31 0x0 -+#define RD_88F6192A_MPP32_35 0x0 -+#define RD_88F6192A_OE_LOW (BIT11 | BIT14 | BIT24 | BIT25 | BIT26 | BIT27 | BIT30 | BIT31) -+#define RD_88F6192A_OE_HIGH (BIT0 | BIT2) -+#define RD_88F6192A_OE_VAL_LOW 0x18400 -+#define RD_88F6192A_OE_VAL_HIGH 0x8 -+ -+/* DB-88F6180A-BP */ -+#if defined(MV_NAND) -+ #define DB_88F6180A_MPP0_7 0x21111111 -+#else -+ #define DB_88F6180A_MPP0_7 0x01112222 -+#endif -+#define DB_88F6180A_MPP8_15 0x11113311 -+#define DB_88F6180A_MPP16_23 0x00001111 -+#define DB_88F6180A_MPP24_31 0x0 -+#define DB_88F6180A_MPP32_39 0x4444c000 -+#define DB_88F6180A_MPP40_44 0x00044444 -+#define DB_88F6180A_OE_LOW 0x0 -+#define DB_88F6180A_OE_HIGH 0x0 -+#define DB_88F6180A_OE_VAL_LOW 0x0 -+#define DB_88F6180A_OE_VAL_HIGH 0x0 -+ -+/* RD-88F6281A_PCAC */ -+#define RD_88F6281A_PCAC_MPP0_7 0x21111111 -+#define RD_88F6281A_PCAC_MPP8_15 0x00003311 -+#define RD_88F6281A_PCAC_MPP16_23 0x00001100 -+#define RD_88F6281A_PCAC_MPP24_31 0x00000000 -+#define RD_88F6281A_PCAC_MPP32_39 0x00000000 -+#define RD_88F6281A_PCAC_MPP40_47 0x00000000 -+#define RD_88F6281A_PCAC_MPP48_55 0x00000000 -+#define RD_88F6281A_PCAC_OE_LOW 0x0 -+#define RD_88F6281A_PCAC_OE_HIGH 0x0 -+#define RD_88F6281A_PCAC_OE_VAL_LOW 0x0 -+#define RD_88F6281A_PCAC_OE_VAL_HIGH 0x0 -+ -+/* SHEEVA PLUG */ -+#define RD_SHEEVA_PLUG_MPP0_7 0x01111111 -+#define RD_SHEEVA_PLUG_MPP8_15 0x11113322 -+#define RD_SHEEVA_PLUG_MPP16_23 0x00001111 -+#define RD_SHEEVA_PLUG_MPP24_31 0x00100000 -+#define RD_SHEEVA_PLUG_MPP32_39 0x00000000 -+#define RD_SHEEVA_PLUG_MPP40_47 0x00000000 -+#define RD_SHEEVA_PLUG_MPP48_55 0x00000000 -+#define RD_SHEEVA_PLUG_OE_LOW 0x0 -+#define RD_SHEEVA_PLUG_OE_HIGH 0x0 -+#define RD_SHEEVA_PLUG_OE_VAL_LOW (BIT29) -+#define RD_SHEEVA_PLUG_OE_VAL_HIGH ((~(BIT17 | BIT16 | BIT15)) | BIT14) -+ -+/* DB-CUSTOMER */ -+#define DB_CUSTOMER_MPP0_7 0x21111111 -+#define DB_CUSTOMER_MPP8_15 0x00003311 -+#define DB_CUSTOMER_MPP16_23 0x00001100 -+#define DB_CUSTOMER_MPP24_31 0x00000000 -+#define DB_CUSTOMER_MPP32_39 0x00000000 -+#define DB_CUSTOMER_MPP40_47 0x00000000 -+#define DB_CUSTOMER_MPP48_55 0x00000000 -+#define DB_CUSTOMER_OE_LOW 0x0 -+#define DB_CUSTOMER_OE_HIGH (~((BIT6) | (BIT7) | (BIT8) | (BIT9))) -+#define DB_CUSTOMER_OE_VAL_LOW 0x0 -+#define DB_CUSTOMER_OE_VAL_HIGH 0x0 -+ -+#endif /* __INCmvBoardEnvSpech */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.c b/crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.c -new file mode 100644 -index 0000000..9e39354 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.c -@@ -0,0 +1,320 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#include "cpu/mvCpu.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvRegs.h" -+#include "ctrlEnv/sys/mvCpuIfRegs.h" -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+/* locals */ -+ -+/******************************************************************************* -+* mvCpuPclkGet - Get the CPU pClk (pipe clock) -+* -+* DESCRIPTION: -+* This routine extract the CPU core clock. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit clock cycles in MHertz. -+* -+*******************************************************************************/ -+/* 6180 have different clk reset sampling */ -+ -+static MV_U32 mvCpu6180PclkGet(MV_VOID) -+{ -+ MV_U32 tmpPClkRate=0; -+ MV_CPU_ARM_CLK cpu6180_ddr_l2_CLK[] = MV_CPU6180_DDR_L2_CLCK_TBL; -+ -+ tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ tmpPClkRate = tmpPClkRate & MSAR_CPUCLCK_MASK_6180; -+ tmpPClkRate = tmpPClkRate >> MSAR_CPUCLCK_OFFS_6180; -+ -+ tmpPClkRate = cpu6180_ddr_l2_CLK[tmpPClkRate].cpuClk; -+ -+ return tmpPClkRate; -+} -+ -+ -+MV_U32 mvCpuPclkGet(MV_VOID) -+{ -+#if defined(PCLCK_AUTO_DETECT) -+ MV_U32 tmpPClkRate=0; -+ MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL; -+ -+ if(mvCtrlModelGet() == MV_6180_DEV_ID) -+ return mvCpu6180PclkGet(); -+ -+ tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ tmpPClkRate = MSAR_CPUCLCK_EXTRACT(tmpPClkRate); -+ tmpPClkRate = cpuCLK[tmpPClkRate]; -+ -+ return tmpPClkRate; -+#else -+ return MV_DEFAULT_PCLK -+#endif -+} -+ -+/******************************************************************************* -+* mvCpuL2ClkGet - Get the CPU L2 (CPU bus clock) -+* -+* DESCRIPTION: -+* This routine extract the CPU L2 clock. -+* -+* RETURN: -+* 32bit clock cycles in Hertz. -+* -+*******************************************************************************/ -+static MV_U32 mvCpu6180L2ClkGet(MV_VOID) -+{ -+ MV_U32 L2ClkRate=0; -+ MV_CPU_ARM_CLK _cpu6180_ddr_l2_CLK[] = MV_CPU6180_DDR_L2_CLCK_TBL; -+ -+ L2ClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ L2ClkRate = L2ClkRate & MSAR_CPUCLCK_MASK_6180; -+ L2ClkRate = L2ClkRate >> MSAR_CPUCLCK_OFFS_6180; -+ -+ L2ClkRate = _cpu6180_ddr_l2_CLK[L2ClkRate].l2Clk; -+ -+ return L2ClkRate; -+ -+} -+ -+MV_U32 mvCpuL2ClkGet(MV_VOID) -+{ -+#ifdef L2CLK_AUTO_DETECT -+ MV_U32 L2ClkRate, tmp, pClkRate, indexL2Rtio; -+ MV_U32 L2Rtio[][2] = MV_L2_CLCK_RTIO_TBL; -+ -+ if(mvCtrlModelGet() == MV_6180_DEV_ID) -+ return mvCpu6180L2ClkGet(); -+ -+ pClkRate = mvCpuPclkGet(); -+ -+ tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ indexL2Rtio = MSAR_L2CLCK_EXTRACT(tmp); -+ -+ L2ClkRate = ((pClkRate * L2Rtio[indexL2Rtio][1]) / L2Rtio[indexL2Rtio][0]); -+ -+ return L2ClkRate; -+#else -+ return MV_BOARD_DEFAULT_L2CLK; -+#endif -+} -+ -+ -+/******************************************************************************* -+* mvCpuNameGet - Get CPU name -+* -+* DESCRIPTION: -+* This function returns a string describing the CPU model and revision. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* pNameBuff - Buffer to contain board name string. Minimum size 32 chars. -+* -+* RETURN: -+* None. -+*******************************************************************************/ -+MV_VOID mvCpuNameGet(char *pNameBuff) -+{ -+ MV_U32 cpuModel; -+ -+ cpuModel = mvOsCpuPartGet(); -+ -+ /* The CPU module is indicated in the Processor Version Register (PVR) */ -+ switch(cpuModel) -+ { -+ case CPU_PART_MRVL131: -+ mvOsSPrintf(pNameBuff, "%s (Rev %d)", "Marvell Feroceon",mvOsCpuRevGet()); -+ break; -+ case CPU_PART_ARM926: -+ mvOsSPrintf(pNameBuff, "%s (Rev %d)", "ARM926",mvOsCpuRevGet()); -+ break; -+ case CPU_PART_ARM946: -+ mvOsSPrintf(pNameBuff, "%s (Rev %d)", "ARM946",mvOsCpuRevGet()); -+ break; -+ default: -+ mvOsSPrintf(pNameBuff,"??? (0x%04x) (Rev %d)",cpuModel,mvOsCpuRevGet()); -+ break; -+ } /* switch */ -+ -+ return; -+} -+ -+ -+#define MV_PROC_STR_SIZE 50 -+ -+static void mvCpuIfGetL2EccMode(MV_8 *buf) -+{ -+ MV_U32 regVal = MV_REG_READ(CPU_L2_CONFIG_REG); -+ if (regVal & BIT2) -+ mvOsSPrintf(buf, "L2 ECC Enabled"); -+ else -+ mvOsSPrintf(buf, "L2 ECC Disabled"); -+} -+ -+static void mvCpuIfGetL2Mode(MV_8 *buf) -+{ -+ MV_U32 regVal = 0; -+ __asm volatile ("mrc p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */ -+ if (regVal & BIT22) -+ mvOsSPrintf(buf, "L2 Enabled"); -+ else -+ mvOsSPrintf(buf, "L2 Disabled"); -+} -+ -+static void mvCpuIfGetL2PrefetchMode(MV_8 *buf) -+{ -+ MV_U32 regVal = 0; -+ __asm volatile ("mrc p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */ -+ if (regVal & BIT24) -+ mvOsSPrintf(buf, "L2 Prefetch Disabled"); -+ else -+ mvOsSPrintf(buf, "L2 Prefetch Enabled"); -+} -+ -+static void mvCpuIfGetWriteAllocMode(MV_8 *buf) -+{ -+ MV_U32 regVal = 0; -+ __asm volatile ("mrc p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */ -+ if (regVal & BIT28) -+ mvOsSPrintf(buf, "Write Allocate Enabled"); -+ else -+ mvOsSPrintf(buf, "Write Allocate Disabled"); -+} -+ -+static void mvCpuIfGetCpuStreamMode(MV_8 *buf) -+{ -+ MV_U32 regVal = 0; -+ __asm volatile ("mrc p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */ -+ if (regVal & BIT29) -+ mvOsSPrintf(buf, "CPU Streaming Enabled"); -+ else -+ mvOsSPrintf(buf, "CPU Streaming Disabled"); -+} -+ -+static void mvCpuIfPrintCpuRegs(void) -+{ -+ MV_U32 regVal = 0; -+ -+ __asm volatile ("mrc p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */ -+ mvOsPrintf("Extra Feature Reg = 0x%x\n",regVal); -+ -+ __asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (regVal)); /* Read Control register */ -+ mvOsPrintf("Control Reg = 0x%x\n",regVal); -+ -+ __asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r" (regVal)); /* Read ID Code register */ -+ mvOsPrintf("ID Code Reg = 0x%x\n",regVal); -+ -+ __asm volatile ("mrc p15, 0, %0, c0, c0, 1" : "=r" (regVal)); /* Read Cache Type register */ -+ mvOsPrintf("Cache Type Reg = 0x%x\n",regVal); -+ -+} -+ -+MV_U32 mvCpuIfPrintSystemConfig(MV_8 *buffer, MV_U32 index) -+{ -+ MV_U32 count = 0; -+ -+ MV_8 L2_ECC_str[MV_PROC_STR_SIZE]; -+ MV_8 L2_En_str[MV_PROC_STR_SIZE]; -+ MV_8 L2_Prefetch_str[MV_PROC_STR_SIZE]; -+ MV_8 Write_Alloc_str[MV_PROC_STR_SIZE]; -+ MV_8 Cpu_Stream_str[MV_PROC_STR_SIZE]; -+ -+ mvCpuIfGetL2Mode(L2_En_str); -+ mvCpuIfGetL2EccMode(L2_ECC_str); -+ mvCpuIfGetL2PrefetchMode(L2_Prefetch_str); -+ mvCpuIfGetWriteAllocMode(Write_Alloc_str); -+ mvCpuIfGetCpuStreamMode(Cpu_Stream_str); -+ mvCpuIfPrintCpuRegs(); -+ -+ count += mvOsSPrintf(buffer + count + index, "%s\n", L2_En_str); -+ count += mvOsSPrintf(buffer + count + index, "%s\n", L2_ECC_str); -+ count += mvOsSPrintf(buffer + count + index, "%s\n", L2_Prefetch_str); -+ count += mvOsSPrintf(buffer + count + index, "%s\n", Write_Alloc_str); -+ count += mvOsSPrintf(buffer + count + index, "%s\n", Cpu_Stream_str); -+ return count; -+} -+ -+MV_U32 whoAmI(MV_VOID) -+{ -+ return 0; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.h b/crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.h -new file mode 100644 -index 0000000..dd3a70e ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/cpu/mvCpu.h -@@ -0,0 +1,99 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvCpuh -+#define __INCmvCpuh -+ -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+ -+/* defines */ -+#define CPU_PART_MRVL131 0x131 -+#define CPU_PART_ARM926 0x926 -+#define CPU_PART_ARM946 0x946 -+#define MV_CPU_ARM_CLK_ELM_SIZE 12 -+#define MV_CPU_ARM_CLK_RATIO_OFF 8 -+#define MV_CPU_ARM_CLK_DDR_OFF 4 -+ -+#ifndef MV_ASMLANGUAGE -+typedef struct _mvCpuArmClk -+{ -+ MV_U32 cpuClk; /* CPU clock in MHz */ -+ MV_U32 ddrClk; /* DDR clock in MHz */ -+ MV_U32 l2Clk; /* CPU DDR clock ratio */ -+ -+}MV_CPU_ARM_CLK; -+ -+MV_U32 mvCpuPclkGet(MV_VOID); -+MV_VOID mvCpuNameGet(char *pNameBuff); -+MV_U32 mvCpuL2ClkGet(MV_VOID); -+MV_U32 mvCpuIfPrintSystemConfig(MV_8 *buffer, MV_U32 index); -+MV_U32 whoAmI(MV_VOID); -+ -+#endif /* MV_ASMLANGUAGE */ -+ -+ -+#endif /* __INCmvCpuh */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.c -new file mode 100644 -index 0000000..2e6226b ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.c -@@ -0,0 +1,296 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+/******************************************************************************* -+* mvCtrlEnvAddrDec.h - Marvell controller address decode library -+* -+* DESCRIPTION: -+* -+* DEPENDENCIES: -+* None. -+* -+*******************************************************************************/ -+ -+/* includes */ -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+#include "ctrlEnv/sys/mvAhbToMbusRegs.h" -+#include "ddr2/mvDramIfRegs.h" -+#include "pex/mvPexRegs.h" -+ -+#define MV_DEBUG -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+/* Default Attributes array */ -+MV_TARGET_ATTRIB mvTargetDefaultsArray[] = TARGETS_DEF_ARRAY; -+extern MV_TARGET *sampleAtResetTargetArray; -+/* Dram\AHBToMbus\PEX share regsiter */ -+ -+#define CTRL_DEC_BASE_OFFS 16 -+#define CTRL_DEC_BASE_MASK (0xffff << CTRL_DEC_BASE_OFFS) -+#define CTRL_DEC_BASE_ALIGNMENT 0x10000 -+ -+#define CTRL_DEC_SIZE_OFFS 16 -+#define CTRL_DEC_SIZE_MASK (0xffff << CTRL_DEC_SIZE_OFFS) -+#define CTRL_DEC_SIZE_ALIGNMENT 0x10000 -+ -+#define CTRL_DEC_WIN_EN BIT0 -+ -+ -+ -+/******************************************************************************* -+* mvCtrlAddrDecToReg - Get address decode register format values -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_STATUS mvCtrlAddrDecToReg(MV_ADDR_WIN *pAddrDecWin, MV_DEC_REGS *pAddrDecRegs) -+{ -+ -+ MV_U32 baseToReg=0 , sizeToReg=0; -+ -+ /* BaseLow[31:16] => base register [31:16] */ -+ baseToReg = pAddrDecWin->baseLow & CTRL_DEC_BASE_MASK; -+ -+ /* Write to address decode Base Address Register */ -+ pAddrDecRegs->baseReg &= ~CTRL_DEC_BASE_MASK; -+ pAddrDecRegs->baseReg |= baseToReg; -+ -+ /* Get size register value according to window size */ -+ sizeToReg = ctrlSizeToReg(pAddrDecWin->size, CTRL_DEC_SIZE_ALIGNMENT); -+ -+ /* Size parameter validity check. */ -+ if (-1 == sizeToReg) -+ { -+ return MV_BAD_PARAM; -+ } -+ -+ /* set size */ -+ pAddrDecRegs->sizeReg &= ~CTRL_DEC_SIZE_MASK; -+ pAddrDecRegs->sizeReg |= (sizeToReg << CTRL_DEC_SIZE_OFFS); -+ -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvCtrlRegToAddrDec - Extract address decode struct from registers. -+* -+* DESCRIPTION: -+* This function extract address decode struct from address decode -+* registers given as parameters. -+* -+* INPUT: -+* pAddrDecRegs - Address decode register struct. -+* -+* OUTPUT: -+* pAddrDecWin - Target window data structure. -+* -+* RETURN: -+* MV_BAD_PARAM if address decode registers data is invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvCtrlRegToAddrDec(MV_DEC_REGS *pAddrDecRegs, MV_ADDR_WIN *pAddrDecWin) -+{ -+ MV_U32 sizeRegVal; -+ -+ sizeRegVal = (pAddrDecRegs->sizeReg & CTRL_DEC_SIZE_MASK) >> -+ CTRL_DEC_SIZE_OFFS; -+ -+ pAddrDecWin->size = ctrlRegToSize(sizeRegVal, CTRL_DEC_SIZE_ALIGNMENT); -+ -+ -+ /* Extract base address */ -+ /* Base register [31:16] ==> baseLow[31:16] */ -+ pAddrDecWin->baseLow = pAddrDecRegs->baseReg & CTRL_DEC_BASE_MASK; -+ -+ pAddrDecWin->baseHigh = 0; -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvCtrlAttribGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+* -+*******************************************************************************/ -+ -+MV_STATUS mvCtrlAttribGet(MV_TARGET target, -+ MV_TARGET_ATTRIB *targetAttrib) -+{ -+ -+ targetAttrib->attrib = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].attrib; -+ targetAttrib->targetId = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId; -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvCtrlGetAttrib - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_TARGET mvCtrlTargetGet(MV_TARGET_ATTRIB *targetAttrib) -+{ -+ MV_TARGET target; -+ MV_TARGET x; -+ for (target = SDRAM_CS0; target < MAX_TARGETS ; target ++) -+ { -+ x = MV_CHANGE_BOOT_CS(target); -+ if ((mvTargetDefaultsArray[x].attrib == targetAttrib->attrib) && -+ (mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId == targetAttrib->targetId)) -+ { -+ /* found it */ -+ break; -+ } -+ } -+ -+ return target; -+} -+ -+MV_STATUS mvCtrlAddrDecToParams(MV_DEC_WIN *pAddrDecWin, -+ MV_DEC_WIN_PARAMS *pWinParam) -+{ -+ MV_U32 baseToReg=0, sizeToReg=0; -+ -+ /* BaseLow[31:16] => base register [31:16] */ -+ baseToReg = pAddrDecWin->addrWin.baseLow & CTRL_DEC_BASE_MASK; -+ -+ /* Write to address decode Base Address Register */ -+ pWinParam->baseAddr &= ~CTRL_DEC_BASE_MASK; -+ pWinParam->baseAddr |= baseToReg; -+ -+ /* Get size register value according to window size */ -+ sizeToReg = ctrlSizeToReg(pAddrDecWin->addrWin.size, CTRL_DEC_SIZE_ALIGNMENT); -+ -+ /* Size parameter validity check. */ -+ if (-1 == sizeToReg) -+ { -+ mvOsPrintf("mvCtrlAddrDecToParams: ERR. ctrlSizeToReg failed.\n"); -+ return MV_BAD_PARAM; -+ } -+ pWinParam->size = sizeToReg; -+ -+ pWinParam->attrib = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(pAddrDecWin->target)].attrib; -+ pWinParam->targetId = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(pAddrDecWin->target)].targetId; -+ -+ return MV_OK; -+} -+ -+MV_STATUS mvCtrlParamsToAddrDec(MV_DEC_WIN_PARAMS *pWinParam, -+ MV_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttrib; -+ -+ pAddrDecWin->addrWin.baseLow = pWinParam->baseAddr; -+ -+ /* Upper 32bit address base is supported under PCI High Address remap */ -+ pAddrDecWin->addrWin.baseHigh = 0; -+ -+ /* Prepare sizeReg to ctrlRegToSize function */ -+ pAddrDecWin->addrWin.size = ctrlRegToSize(pWinParam->size, CTRL_DEC_SIZE_ALIGNMENT); -+ -+ if (-1 == pAddrDecWin->addrWin.size) -+ { -+ DB(mvOsPrintf("mvCtrlParamsToAddrDec: ERR. ctrlRegToSize failed.\n")); -+ return MV_BAD_PARAM; -+ } -+ targetAttrib.targetId = pWinParam->targetId; -+ targetAttrib.attrib = pWinParam->attrib; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ return MV_OK; -+} -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.h -new file mode 100644 -index 0000000..fcb5a31 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.h -@@ -0,0 +1,203 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvCtrlEnvAddrDech -+#define __INCmvCtrlEnvAddrDech -+ -+/* includes */ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvRegs.h" -+ -+ -+/* defines */ -+/* DUnit attributes */ -+#define ATMWCR_WIN_DUNIT_CS0_OFFS 0 -+#define ATMWCR_WIN_DUNIT_CS0_MASK BIT0 -+#define ATMWCR_WIN_DUNIT_CS0_REQ (0 << ATMWCR_WIN_DUNIT_CS0_OFFS) -+ -+#define ATMWCR_WIN_DUNIT_CS1_OFFS 1 -+#define ATMWCR_WIN_DUNIT_CS1_MASK BIT1 -+#define ATMWCR_WIN_DUNIT_CS1_REQ (0 << ATMWCR_WIN_DUNIT_CS1_OFFS) -+ -+#define ATMWCR_WIN_DUNIT_CS2_OFFS 2 -+#define ATMWCR_WIN_DUNIT_CS2_MASK BIT2 -+#define ATMWCR_WIN_DUNIT_CS2_REQ (0 << ATMWCR_WIN_DUNIT_CS2_OFFS) -+ -+#define ATMWCR_WIN_DUNIT_CS3_OFFS 3 -+#define ATMWCR_WIN_DUNIT_CS3_MASK BIT3 -+#define ATMWCR_WIN_DUNIT_CS3_REQ (0 << ATMWCR_WIN_DUNIT_CS3_OFFS) -+ -+/* RUnit (Device) attributes */ -+#define ATMWCR_WIN_RUNIT_DEVCS0_OFFS 0 -+#define ATMWCR_WIN_RUNIT_DEVCS0_MASK BIT0 -+#define ATMWCR_WIN_RUNIT_DEVCS0_REQ (0 << ATMWCR_WIN_RUNIT_DEVCS0_OFFS) -+ -+#define ATMWCR_WIN_RUNIT_DEVCS1_OFFS 1 -+#define ATMWCR_WIN_RUNIT_DEVCS1_MASK BIT1 -+#define ATMWCR_WIN_RUNIT_DEVCS1_REQ (0 << ATMWCR_WIN_RUNIT_DEVCS1_OFFS) -+ -+#define ATMWCR_WIN_RUNIT_DEVCS2_OFFS 2 -+#define ATMWCR_WIN_RUNIT_DEVCS2_MASK BIT2 -+#define ATMWCR_WIN_RUNIT_DEVCS2_REQ (0 << ATMWCR_WIN_RUNIT_DEVCS2_OFFS) -+ -+#define ATMWCR_WIN_RUNIT_BOOTCS_OFFS 4 -+#define ATMWCR_WIN_RUNIT_BOOTCS_MASK BIT4 -+#define ATMWCR_WIN_RUNIT_BOOTCS_REQ (0 << ATMWCR_WIN_RUNIT_BOOTCS_OFFS) -+ -+/* LMaster (PCI) attributes */ -+#define ATMWCR_WIN_LUNIT_BYTE_SWP_OFFS 0 -+#define ATMWCR_WIN_LUNIT_BYTE_SWP_MASK BIT0 -+#define ATMWCR_WIN_LUNIT_BYTE_SWP (0 << ATMWCR_WIN_LUNIT_BYTE_SWP_OFFS) -+#define ATMWCR_WIN_LUNIT_BYTE_NO_SWP (1 << ATMWCR_WIN_LUNIT_BYTE_SWP_OFFS) -+ -+ -+#define ATMWCR_WIN_LUNIT_WORD_SWP_OFFS 1 -+#define ATMWCR_WIN_LUNIT_WORD_SWP_MASK BIT1 -+#define ATMWCR_WIN_LUNIT_WORD_SWP (0 << ATMWCR_WIN_LUNIT_WORD_SWP_OFFS) -+#define ATMWCR_WIN_LUNIT_WORD_NO_SWP (1 << ATMWCR_WIN_LUNIT_WORD_SWP_OFFS) -+ -+#define ATMWCR_WIN_LUNIT_NO_SNOOP BIT2 -+ -+#define ATMWCR_WIN_LUNIT_TYPE_OFFS 3 -+#define ATMWCR_WIN_LUNIT_TYPE_MASK BIT3 -+#define ATMWCR_WIN_LUNIT_TYPE_IO (0 << ATMWCR_WIN_LUNIT_TYPE_OFFS) -+#define ATMWCR_WIN_LUNIT_TYPE_MEM (1 << ATMWCR_WIN_LUNIT_TYPE_OFFS) -+ -+#define ATMWCR_WIN_LUNIT_FORCE64_OFFS 4 -+#define ATMWCR_WIN_LUNIT_FORCE64_MASK BIT4 -+#define ATMWCR_WIN_LUNIT_FORCE64 (0 << ATMWCR_WIN_LUNIT_FORCE64_OFFS) -+ -+#define ATMWCR_WIN_LUNIT_ORDERING_OFFS 6 -+#define ATMWCR_WIN_LUNIT_ORDERING_MASK BIT6 -+#define ATMWCR_WIN_LUNIT_ORDERING (1 << ATMWCR_WIN_LUNIT_FORCE64_OFFS) -+ -+/* PEX Attributes */ -+#define ATMWCR_WIN_PEX_TYPE_OFFS 3 -+#define ATMWCR_WIN_PEX_TYPE_MASK BIT3 -+#define ATMWCR_WIN_PEX_TYPE_IO (0 << ATMWCR_WIN_PEX_TYPE_OFFS) -+#define ATMWCR_WIN_PEX_TYPE_MEM (1 << ATMWCR_WIN_PEX_TYPE_OFFS) -+ -+/* typedefs */ -+ -+/* Unsupported attributes for address decode: */ -+/* 2) PCI0/1_REQ64n control */ -+ -+typedef struct _mvDecRegs -+{ -+ MV_U32 baseReg; -+ MV_U32 baseRegHigh; -+ MV_U32 sizeReg; -+ -+}MV_DEC_REGS; -+ -+typedef struct _mvTargetAttrib -+{ -+ MV_U8 attrib; /* chip select attributes */ -+ MV_TARGET_ID targetId; /* Target Id of this MV_TARGET */ -+ -+}MV_TARGET_ATTRIB; -+ -+ -+/* This structure describes address decode window */ -+typedef struct _mvDecWin -+{ -+ MV_TARGET target; /* Target for addr decode window */ -+ MV_ADDR_WIN addrWin; /* Address window of target */ -+ MV_BOOL enable; /* Window enable/disable */ -+}MV_DEC_WIN; -+ -+typedef struct _mvDecWinParams -+{ -+ MV_TARGET_ID targetId; /* Target ID field */ -+ MV_U8 attrib; /* Attribute field */ -+ MV_U32 baseAddr; /* Base address in register format */ -+ MV_U32 size; /* Size in register format */ -+}MV_DEC_WIN_PARAMS; -+ -+ -+/* mvCtrlEnvAddrDec API list */ -+ -+MV_STATUS mvCtrlAddrDecToReg(MV_ADDR_WIN *pAddrDecWin, -+ MV_DEC_REGS *pAddrDecRegs); -+ -+MV_STATUS mvCtrlRegToAddrDec(MV_DEC_REGS *pAddrDecRegs, -+ MV_ADDR_WIN *pAddrDecWin); -+ -+MV_STATUS mvCtrlAttribGet(MV_TARGET target, -+ MV_TARGET_ATTRIB *targetAttrib); -+ -+MV_TARGET mvCtrlTargetGet(MV_TARGET_ATTRIB *targetAttrib); -+ -+ -+MV_STATUS mvCtrlAddrDecToParams(MV_DEC_WIN *pAddrDecWin, -+ MV_DEC_WIN_PARAMS *pWinParam); -+ -+MV_STATUS mvCtrlParamsToAddrDec(MV_DEC_WIN_PARAMS *pWinParam, -+ MV_DEC_WIN *pAddrDecWin); -+ -+ -+ -+ -+#endif /* __INCmvCtrlEnvAddrDech */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAsm.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAsm.h -new file mode 100644 -index 0000000..14a5ac4 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAsm.h -@@ -0,0 +1,98 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvCtrlEnvAsmh -+#define __INCmvCtrlEnvAsmh -+#include "pex/mvPexRegs.h" -+ -+#define CHIP_BOND_REG 0x10034 -+#define PCKG_OPT_MASK_AS #3 -+#define PXCCARI_REVID_MASK_AS #PXCCARI_REVID_MASK -+ -+/* Read device ID into toReg bits 15:0 from 0xd0000000 */ -+/* defines */ -+#define MV_DV_CTRL_MODEL_GET_ASM(toReg, tmpReg) \ -+ MV_DV_REG_READ_ASM(toReg, tmpReg, CHIP_BOND_REG);\ -+ and toReg, toReg, PCKG_OPT_MASK_AS /* Mask for package ID */ -+ -+/* Read device ID into toReg bits 15:0 from 0xf1000000*/ -+#define MV_CTRL_MODEL_GET_ASM(toReg, tmpReg) \ -+ MV_REG_READ_ASM(toReg, tmpReg, CHIP_BOND_REG);\ -+ and toReg, toReg, PCKG_OPT_MASK_AS /* Mask for package ID */ -+ -+/* Read Revision into toReg bits 7:0 0xd0000000*/ -+#define MV_DV_CTRL_REV_GET_ASM(toReg, tmpReg) \ -+ /* Read device revision */ \ -+ MV_DV_REG_READ_ASM(toReg, tmpReg, PEX_CFG_DIRECT_ACCESS(0,PEX_CLASS_CODE_AND_REVISION_ID));\ -+ and toReg, toReg, PXCCARI_REVID_MASK_AS /* Mask for calss ID */ -+ -+/* Read Revision into toReg bits 7:0 0xf1000000*/ -+#define MV_CTRL_REV_GET_ASM(toReg, tmpReg) \ -+ /* Read device revision */ \ -+ MV_REG_READ_ASM(toReg, tmpReg, PEX_CFG_DIRECT_ACCESS(0,PEX_CLASS_CODE_AND_REVISION_ID));\ -+ and toReg, toReg, PXCCARI_REVID_MASK_AS /* Mask for calss ID */ -+ -+ -+#endif /* __INCmvCtrlEnvAsmh */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.c -new file mode 100644 -index 0000000..fa097a2 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.c -@@ -0,0 +1,1825 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+/* includes */ -+#include "mvCommon.h" -+#include "mvCtrlEnvLib.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+#if defined(MV_INCLUDE_PEX) -+#include "pex/mvPex.h" -+#include "ctrlEnv/sys/mvSysPex.h" -+#endif -+ -+#if defined(MV_INCLUDE_GIG_ETH) -+#include "ctrlEnv/sys/mvSysGbe.h" -+#endif -+ -+#if defined(MV_INCLUDE_XOR) -+#include "ctrlEnv/sys/mvSysXor.h" -+#endif -+ -+#if defined(MV_INCLUDE_SATA) -+#include "ctrlEnv/sys/mvSysSata.h" -+#endif -+ -+#if defined(MV_INCLUDE_USB) -+#include "ctrlEnv/sys/mvSysUsb.h" -+#endif -+ -+#if defined(MV_INCLUDE_AUDIO) -+#include "ctrlEnv/sys/mvSysAudio.h" -+#endif -+ -+#if defined(MV_INCLUDE_CESA) -+#include "ctrlEnv/sys/mvSysCesa.h" -+#endif -+ -+#if defined(MV_INCLUDE_TS) -+#include "ctrlEnv/sys/mvSysTs.h" -+#endif -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+/******************************************************************************* -+* mvCtrlEnvInit - Initialize Marvell controller environment. -+* -+* DESCRIPTION: -+* This function get environment information and initialize controller -+* internal/external environment. For example -+* 1) MPP settings according to board MPP macros. -+* NOTE: It is the user responsibility to shut down all DMA channels -+* in device and disable controller sub units interrupts during -+* boot process. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvCtrlEnvInit(MV_VOID) -+{ -+ MV_U32 mppGroup; -+ MV_U32 devId; -+ MV_U32 boardId; -+ MV_U32 i; -+ MV_U32 maxMppGrp = 1; -+ MV_U32 mppVal = 0; -+ MV_U32 bootVal = 0; -+ MV_U32 mppGroupType = 0; -+ MV_U32 mppGroup1[][3] = MPP_GROUP_1_TYPE; -+ MV_U32 mppGroup2[][3] = MPP_GROUP_2_TYPE; -+ -+ devId = mvCtrlModelGet(); -+ boardId= mvBoardIdGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ maxMppGrp = MV_6281_MPP_MAX_GROUP; -+ break; -+ case MV_6192_DEV_ID: -+ maxMppGrp = MV_6192_MPP_MAX_GROUP; -+ break; -+ case MV_6190_DEV_ID: -+ maxMppGrp = MV_6190_MPP_MAX_GROUP; -+ break; -+ case MV_6180_DEV_ID: -+ maxMppGrp = MV_6180_MPP_MAX_GROUP; -+ break; -+ } -+ -+ /* MPP Init */ -+ /* We split mpp init to 3 phases: -+ * 1. We init mpp[19:0] from the board info. mpp[23:20] will be over write -+ * in phase 2. -+ * 2. We detect the mpp group type and according the mpp values [35:20]. -+ * 3. We detect the mpp group type and according the mpp values [49:36]. -+ */ -+ /* Mpp phase 1 mpp[19:0] */ -+ /* Read MPP group from board level and assign to MPP register */ -+ for (mppGroup = 0; mppGroup < 3; mppGroup++) -+ { -+ mppVal = mvBoardMppGet(mppGroup); -+ if (mppGroup == 0) -+ { -+ bootVal = MV_REG_READ(mvCtrlMppRegGet(mppGroup)); -+ if (mvCtrlIsBootFromSPI()) -+ { -+ mppVal &= ~0xffff; -+ bootVal &= 0xffff; -+ mppVal |= bootVal; -+ } -+ else if (mvCtrlIsBootFromSPIUseNAND()) -+ { -+ mppVal &= ~0xf0000000; -+ bootVal &= 0xf0000000; -+ mppVal |= bootVal; -+ } -+ else if (mvCtrlIsBootFromNAND()) -+ { -+ mppVal &= ~0xffffff; -+ bootVal &= 0xffffff; -+ mppVal |= bootVal; -+ } -+ } -+ -+ if (mppGroup == 2) -+ { -+ bootVal = MV_REG_READ(mvCtrlMppRegGet(mppGroup)); -+ if (mvCtrlIsBootFromNAND()) -+ { -+ mppVal &= ~0xff00; -+ bootVal &= 0xff00; -+ mppVal |= bootVal; -+ } -+ } -+ -+ MV_REG_WRITE(mvCtrlMppRegGet(mppGroup), mppVal); -+ } -+ -+ /* Identify MPPs group */ -+ mvBoardMppGroupIdUpdate(); -+ -+ /* Update MPPs mux relevent only on Marvell DB */ -+ if ((boardId == DB_88F6281A_BP_ID) || -+ (boardId == DB_88F6180A_BP_ID)) -+ mvBoardMppMuxSet(); -+ -+ mppGroupType = mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_1); -+ -+ /* Mpp phase 2 */ -+ /* Read MPP group from board level and assign to MPP register */ -+ if (devId != MV_6180_DEV_ID) -+ { -+ i = 0; -+ for (mppGroup = 2; mppGroup < 5; mppGroup++) -+ { -+ if ((mppGroupType == MV_BOARD_OTHER) || -+ (boardId == RD_88F6281A_ID) || -+ (boardId == RD_88F6192A_ID) || -+ (boardId == RD_88F6190A_ID) || -+ (boardId == RD_88F6281A_PCAC_ID) || -+ (boardId == SHEEVA_PLUG_ID)) -+ mppVal = mvBoardMppGet(mppGroup); -+ else -+ { -+ mppVal = mppGroup1[mppGroupType][i]; -+ i++; -+ } -+ -+ /* Group 2 is shared mpp[23:16] */ -+ if (mppGroup == 2) -+ { -+ bootVal = MV_REG_READ(mvCtrlMppRegGet(mppGroup)); -+ mppVal &= ~0xffff; -+ bootVal &= 0xffff; -+ mppVal |= bootVal; -+ } -+ -+ MV_REG_WRITE(mvCtrlMppRegGet(mppGroup), mppVal); -+ } -+ } -+ -+ if ((devId == MV_6192_DEV_ID) || (devId == MV_6190_DEV_ID)) -+ return MV_OK; -+ -+ /* Mpp phase 3 */ -+ mppGroupType = mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_2); -+ /* Read MPP group from board level and assign to MPP register */ -+ i = 0; -+ for (mppGroup = 4; mppGroup < 7; mppGroup++) -+ { -+ if ((mppGroupType == MV_BOARD_OTHER) || -+ (boardId == RD_88F6281A_ID) || -+ (boardId == RD_88F6281A_PCAC_ID) || -+ (boardId == SHEEVA_PLUG_ID)) -+ mppVal = mvBoardMppGet(mppGroup); -+ else -+ { -+ mppVal = mppGroup2[mppGroupType][i]; -+ i++; -+ } -+ -+ /* Group 4 is shared mpp[35:32] */ -+ if (mppGroup == 4) -+ { -+ bootVal = MV_REG_READ(mvCtrlMppRegGet(mppGroup)); -+ mppVal &= ~0xffff; -+ bootVal &= 0xffff; -+ mppVal |= bootVal; -+ } -+ -+ MV_REG_WRITE(mvCtrlMppRegGet(mppGroup), mppVal); -+ } -+ /* Update SSCG configuration register*/ -+ if(mvBoardIdGet() == DB_88F6281A_BP_ID || mvBoardIdGet() == DB_88F6192A_BP_ID || -+ mvBoardIdGet() == DB_88F6190A_BP_ID || mvBoardIdGet() == DB_88F6180A_BP_ID) -+ MV_REG_WRITE(0x100d8, 0x53); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCtrlMppRegGet - return reg address of mpp group -+* -+* DESCRIPTION: -+* -+* INPUT: -+* mppGroup - MPP group. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_U32 - Register address. -+* -+*******************************************************************************/ -+MV_U32 mvCtrlMppRegGet(MV_U32 mppGroup) -+{ -+ MV_U32 ret; -+ -+ switch(mppGroup){ -+ case (0): ret = MPP_CONTROL_REG0; -+ break; -+ case (1): ret = MPP_CONTROL_REG1; -+ break; -+ case (2): ret = MPP_CONTROL_REG2; -+ break; -+ case (3): ret = MPP_CONTROL_REG3; -+ break; -+ case (4): ret = MPP_CONTROL_REG4; -+ break; -+ case (5): ret = MPP_CONTROL_REG5; -+ break; -+ case (6): ret = MPP_CONTROL_REG6; -+ break; -+ default: ret = MPP_CONTROL_REG0; -+ break; -+ } -+ return ret; -+} -+#if defined(MV_INCLUDE_PEX) -+/******************************************************************************* -+* mvCtrlPexMaxIfGet - Get Marvell controller number of PEX interfaces. -+* -+* DESCRIPTION: -+* This function returns Marvell controller number of PEX interfaces. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Marvell controller number of PEX interfaces. If controller -+* ID is undefined the function returns '0'. -+* -+*******************************************************************************/ -+MV_U32 mvCtrlPexMaxIfGet(MV_VOID) -+{ -+ -+ return MV_PEX_MAX_IF; -+} -+#endif -+ -+#if defined(MV_INCLUDE_GIG_ETH) -+/******************************************************************************* -+* mvCtrlEthMaxPortGet - Get Marvell controller number of etherent ports. -+* -+* DESCRIPTION: -+* This function returns Marvell controller number of etherent port. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Marvell controller number of etherent port. -+* -+*******************************************************************************/ -+MV_U32 mvCtrlEthMaxPortGet(MV_VOID) -+{ -+ MV_U32 devId; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ return MV_6281_ETH_MAX_PORTS; -+ break; -+ case MV_6192_DEV_ID: -+ return MV_6192_ETH_MAX_PORTS; -+ break; -+ case MV_6190_DEV_ID: -+ return MV_6190_ETH_MAX_PORTS; -+ break; -+ case MV_6180_DEV_ID: -+ return MV_6180_ETH_MAX_PORTS; -+ break; -+ } -+ return 0; -+ -+} -+#endif -+ -+#if defined(MV_INCLUDE_XOR) -+/******************************************************************************* -+* mvCtrlXorMaxChanGet - Get Marvell controller number of XOR channels. -+* -+* DESCRIPTION: -+* This function returns Marvell controller number of XOR channels. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Marvell controller number of XOR channels. -+* -+*******************************************************************************/ -+MV_U32 mvCtrlXorMaxChanGet(MV_VOID) -+{ -+ return MV_XOR_MAX_CHAN; -+} -+#endif -+ -+#if defined(MV_INCLUDE_USB) -+/******************************************************************************* -+* mvCtrlUsbHostMaxGet - Get number of Marvell Usb controllers -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* returns number of Marvell USB controllers. -+* -+*******************************************************************************/ -+MV_U32 mvCtrlUsbMaxGet(void) -+{ -+ return MV_USB_MAX_PORTS; -+} -+#endif -+ -+ -+#if defined(MV_INCLUDE_NAND) -+/******************************************************************************* -+* mvCtrlNandSupport - Return if this controller has integrated NAND flash support -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if NAND is supported and MV_FALSE otherwise -+* -+*******************************************************************************/ -+MV_U32 mvCtrlNandSupport(MV_VOID) -+{ -+ MV_U32 devId; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ return MV_6281_NAND; -+ break; -+ case MV_6192_DEV_ID: -+ return MV_6192_NAND; -+ break; -+ case MV_6190_DEV_ID: -+ return MV_6190_NAND; -+ break; -+ case MV_6180_DEV_ID: -+ return MV_6180_NAND; -+ break; -+ } -+ return 0; -+ -+} -+#endif -+ -+#if defined(MV_INCLUDE_SDIO) -+/******************************************************************************* -+* mvCtrlSdioSupport - Return if this controller has integrated SDIO flash support -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if SDIO is supported and MV_FALSE otherwise -+* -+*******************************************************************************/ -+MV_U32 mvCtrlSdioSupport(MV_VOID) -+{ -+ MV_U32 devId; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ return MV_6281_SDIO; -+ break; -+ case MV_6192_DEV_ID: -+ return MV_6192_SDIO; -+ break; -+ case MV_6190_DEV_ID: -+ return MV_6190_SDIO; -+ break; -+ case MV_6180_DEV_ID: -+ return MV_6180_SDIO; -+ break; -+ } -+ return 0; -+ -+} -+#endif -+ -+#if defined(MV_INCLUDE_TS) -+/******************************************************************************* -+* mvCtrlTsSupport - Return if this controller has integrated TS flash support -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if TS is supported and MV_FALSE otherwise -+* -+*******************************************************************************/ -+MV_U32 mvCtrlTsSupport(MV_VOID) -+{ -+ MV_U32 devId; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ return MV_6281_TS; -+ break; -+ case MV_6192_DEV_ID: -+ return MV_6192_TS; -+ break; -+ case MV_6190_DEV_ID: -+ return MV_6190_TS; -+ break; -+ case MV_6180_DEV_ID: -+ return MV_6180_TS; -+ break; -+ } -+ return 0; -+} -+#endif -+ -+#if defined(MV_INCLUDE_AUDIO) -+/******************************************************************************* -+* mvCtrlAudioSupport - Return if this controller has integrated AUDIO flash support -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if AUDIO is supported and MV_FALSE otherwise -+* -+*******************************************************************************/ -+MV_U32 mvCtrlAudioSupport(MV_VOID) -+{ -+ MV_U32 devId; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ return MV_6281_AUDIO; -+ break; -+ case MV_6192_DEV_ID: -+ return MV_6192_AUDIO; -+ break; -+ case MV_6190_DEV_ID: -+ return MV_6190_AUDIO; -+ break; -+ case MV_6180_DEV_ID: -+ return MV_6180_AUDIO; -+ break; -+ } -+ return 0; -+ -+} -+#endif -+ -+#if defined(MV_INCLUDE_TDM) -+/******************************************************************************* -+* mvCtrlTdmSupport - Return if this controller has integrated TDM flash support -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if TDM is supported and MV_FALSE otherwise -+* -+*******************************************************************************/ -+MV_U32 mvCtrlTdmSupport(MV_VOID) -+{ -+ MV_U32 devId; -+ -+ devId = mvCtrlModelGet(); -+ -+ switch(devId){ -+ case MV_6281_DEV_ID: -+ return MV_6281_TDM; -+ break; -+ case MV_6192_DEV_ID: -+ return MV_6192_TDM; -+ break; -+ case MV_6190_DEV_ID: -+ return MV_6190_TDM; -+ break; -+ case MV_6180_DEV_ID: -+ return MV_6180_TDM; -+ break; -+ } -+ return 0; -+ -+} -+#endif -+ -+/******************************************************************************* -+* mvCtrlModelGet - Get Marvell controller device model (Id) -+* -+* DESCRIPTION: -+* This function returns 16bit describing the device model (ID) as defined -+* in PCI Device and Vendor ID configuration register offset 0x0. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 16bit desscribing Marvell controller ID -+* -+*******************************************************************************/ -+MV_U16 mvCtrlModelGet(MV_VOID) -+{ -+ MV_U32 devId; -+ -+ devId = MV_REG_READ(CHIP_BOND_REG); -+ devId &= PCKG_OPT_MASK; -+ -+ switch(devId){ -+ case 2: -+ return MV_6281_DEV_ID; -+ break; -+ case 1: -+ if (((MV_REG_READ(PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID))& 0xffff0000) >> 16) -+ == MV_6190_DEV_ID) -+ return MV_6190_DEV_ID; -+ else -+ return MV_6192_DEV_ID; -+ break; -+ case 0: -+ return MV_6180_DEV_ID; -+ break; -+ } -+ -+ return 0; -+} -+/******************************************************************************* -+* mvCtrlRevGet - Get Marvell controller device revision number -+* -+* DESCRIPTION: -+* This function returns 8bit describing the device revision as defined -+* in PCI Express Class Code and Revision ID Register. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 8bit desscribing Marvell controller revision number -+* -+*******************************************************************************/ -+MV_U8 mvCtrlRevGet(MV_VOID) -+{ -+ MV_U8 revNum; -+#if defined(MV_INCLUDE_CLK_PWR_CNTRL) -+ /* Check pex power state */ -+ MV_U32 pexPower; -+ pexPower = mvCtrlPwrClckGet(PEX_UNIT_ID,0); -+ if (pexPower == MV_FALSE) -+ mvCtrlPwrClckSet(PEX_UNIT_ID, 0, MV_TRUE); -+#endif -+ revNum = (MV_U8)MV_REG_READ(PEX_CFG_DIRECT_ACCESS(0,PCI_CLASS_CODE_AND_REVISION_ID)); -+#if defined(MV_INCLUDE_CLK_PWR_CNTRL) -+ /* Return to power off state */ -+ if (pexPower == MV_FALSE) -+ mvCtrlPwrClckSet(PEX_UNIT_ID, 0, MV_FALSE); -+#endif -+ return ((revNum & PCCRIR_REVID_MASK) >> PCCRIR_REVID_OFFS); -+} -+ -+/******************************************************************************* -+* mvCtrlNameGet - Get Marvell controller name -+* -+* DESCRIPTION: -+* This function returns a string describing the device model and revision. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* pNameBuff - Buffer to contain device name string. Minimum size 30 chars. -+* -+* RETURN: -+* -+* MV_ERROR if informantion can not be read. -+*******************************************************************************/ -+MV_STATUS mvCtrlNameGet(char *pNameBuff) -+{ -+ mvOsSPrintf (pNameBuff, "%s%x Rev %d", SOC_NAME_PREFIX, -+ mvCtrlModelGet(), mvCtrlRevGet()); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCtrlModelRevGet - Get Controller Model (Device ID) and Revision -+* -+* DESCRIPTION: -+* This function returns 32bit value describing both Device ID and Revision -+* as defined in PCI Express Device and Vendor ID Register and device revision -+* as defined in PCI Express Class Code and Revision ID Register. -+ -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit describing both controller device ID and revision number -+* -+*******************************************************************************/ -+MV_U32 mvCtrlModelRevGet(MV_VOID) -+{ -+ return ((mvCtrlModelGet() << 16) | mvCtrlRevGet()); -+} -+ -+/******************************************************************************* -+* mvCtrlModelRevNameGet - Get Marvell controller name -+* -+* DESCRIPTION: -+* This function returns a string describing the device model and revision. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* pNameBuff - Buffer to contain device name string. Minimum size 30 chars. -+* -+* RETURN: -+* -+* MV_ERROR if informantion can not be read. -+*******************************************************************************/ -+ -+MV_STATUS mvCtrlModelRevNameGet(char *pNameBuff) -+{ -+ -+ switch (mvCtrlModelRevGet()) -+ { -+ case MV_6281_A0_ID: -+ mvOsSPrintf (pNameBuff, "%s",MV_6281_A0_NAME); -+ break; -+ case MV_6192_A0_ID: -+ mvOsSPrintf (pNameBuff, "%s",MV_6192_A0_NAME); -+ break; -+ case MV_6180_A0_ID: -+ mvOsSPrintf (pNameBuff, "%s",MV_6180_A0_NAME); -+ break; -+ case MV_6190_A0_ID: -+ mvOsSPrintf (pNameBuff, "%s",MV_6190_A0_NAME); -+ break; -+ case MV_6281_A1_ID: -+ mvOsSPrintf (pNameBuff, "%s",MV_6281_A1_NAME); -+ break; -+ case MV_6192_A1_ID: -+ mvOsSPrintf (pNameBuff, "%s",MV_6192_A1_NAME); -+ break; -+ case MV_6180_A1_ID: -+ mvOsSPrintf (pNameBuff, "%s",MV_6180_A1_NAME); -+ break; -+ case MV_6190_A1_ID: -+ mvOsSPrintf (pNameBuff, "%s",MV_6190_A1_NAME); -+ break; -+ default: -+ mvCtrlNameGet(pNameBuff); -+ break; -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* ctrlWinOverlapTest - Test address windows for overlaping. -+* -+* DESCRIPTION: -+* This function checks the given two address windows for overlaping. -+* -+* INPUT: -+* pAddrWin1 - Address window 1. -+* pAddrWin2 - Address window 2. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* MV_TRUE if address window overlaps, MV_FALSE otherwise. -+*******************************************************************************/ -+MV_STATUS ctrlWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2) -+{ -+ MV_U32 winBase1, winBase2; -+ MV_U32 winTop1, winTop2; -+ -+ /* check if we have overflow than 4G*/ -+ if (((0xffffffff - pAddrWin1->baseLow) < pAddrWin1->size-1)|| -+ ((0xffffffff - pAddrWin2->baseLow) < pAddrWin2->size-1)) -+ { -+ return MV_TRUE; -+ } -+ -+ winBase1 = pAddrWin1->baseLow; -+ winBase2 = pAddrWin2->baseLow; -+ winTop1 = winBase1 + pAddrWin1->size-1; -+ winTop2 = winBase2 + pAddrWin2->size-1; -+ -+ -+ if (((winBase1 <= winTop2 ) && ( winTop2 <= winTop1)) || -+ ((winBase1 <= winBase2) && (winBase2 <= winTop1))) -+ { -+ return MV_TRUE; -+ } -+ else -+ { -+ return MV_FALSE; -+ } -+} -+ -+/******************************************************************************* -+* ctrlWinWithinWinTest - Test address windows for overlaping. -+* -+* DESCRIPTION: -+* This function checks the given win1 boundries is within -+* win2 boundries. -+* -+* INPUT: -+* pAddrWin1 - Address window 1. -+* pAddrWin2 - Address window 2. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+* MV_TRUE if found win1 inside win2, MV_FALSE otherwise. -+*******************************************************************************/ -+MV_STATUS ctrlWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2) -+{ -+ MV_U32 winBase1, winBase2; -+ MV_U32 winTop1, winTop2; -+ -+ winBase1 = pAddrWin1->baseLow; -+ winBase2 = pAddrWin2->baseLow; -+ winTop1 = winBase1 + pAddrWin1->size -1; -+ winTop2 = winBase2 + pAddrWin2->size -1; -+ -+ if (((winBase1 >= winBase2 ) && ( winBase1 <= winTop2)) || -+ ((winTop1 >= winBase2) && (winTop1 <= winTop2))) -+ { -+ return MV_TRUE; -+ } -+ else -+ { -+ return MV_FALSE; -+ } -+} -+ -+static const char* cntrlName[] = TARGETS_NAME_ARRAY; -+ -+/******************************************************************************* -+* mvCtrlTargetNameGet - Get Marvell controller target name -+* -+* DESCRIPTION: -+* This function convert the trget enumeration to string. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Target name (const MV_8 *) -+*******************************************************************************/ -+const MV_8* mvCtrlTargetNameGet( MV_TARGET target ) -+{ -+ -+ if (target >= MAX_TARGETS) -+ { -+ return "target unknown"; -+ } -+ -+ return cntrlName[target]; -+} -+ -+/******************************************************************************* -+* mvCtrlAddrDecShow - Print the Controller units address decode map. -+* -+* DESCRIPTION: -+* This function the Controller units address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvCtrlAddrDecShow(MV_VOID) -+{ -+ mvCpuIfAddDecShow(); -+ mvAhbToMbusAddDecShow(); -+#if defined(MV_INCLUDE_PEX) -+ mvPexAddrDecShow(); -+#endif -+#if defined(MV_INCLUDE_USB) -+ mvUsbAddrDecShow(); -+#endif -+#if defined(MV_INCLUDE_GIG_ETH) -+ mvEthAddrDecShow(); -+#endif -+#if defined(MV_INCLUDE_XOR) -+ mvXorAddrDecShow(); -+#endif -+#if defined(MV_INCLUDE_SATA) -+ mvSataAddrDecShow(); -+#endif -+#if defined(MV_INCLUDE_AUDIO) -+ mvAudioAddrDecShow(); -+#endif -+#if defined(MV_INCLUDE_TS) -+ mvTsuAddrDecShow(); -+#endif -+} -+ -+/******************************************************************************* -+* ctrlSizeToReg - Extract size value for register assignment. -+* -+* DESCRIPTION: -+* Address decode size parameter must be programed from LSB to MSB as -+* sequence of 1's followed by sequence of 0's. The number of 1's -+* specifies the size of the window in 64 KB granularity (e.g. a -+* value of 0x00ff specifies 256x64k = 16 MB). -+* This function extract the size value from the size parameter according -+* to given aligment paramter. For example for size 0x1000000 (16MB) and -+* aligment 0x10000 (64KB) the function will return 0x00FF. -+* -+* INPUT: -+* size - Size. -+* alignment - Size alignment. Note that alignment must be power of 2! -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit describing size register value correspond to size parameter. -+* If value is '-1' size parameter or aligment are invalid. -+*******************************************************************************/ -+MV_U32 ctrlSizeToReg(MV_U32 size, MV_U32 alignment) -+{ -+ MV_U32 retVal; -+ -+ /* Check size parameter alignment */ -+ if ((0 == size) || (MV_IS_NOT_ALIGN(size, alignment))) -+ { -+ DB(mvOsPrintf("ctrlSizeToReg: ERR. Size is zero or not aligned.\n")); -+ return -1; -+ } -+ -+ /* Take out the "alignment" portion out of the size parameter */ -+ alignment--; /* Now the alignmet is a sequance of '1' (e.g. 0xffff) */ -+ /* and size is 0x1000000 (16MB) for example */ -+ while(alignment & 1) /* Check that alignmet LSB is set */ -+ { -+ size = (size >> 1); /* If LSB is set, move 'size' one bit to right */ -+ alignment = (alignment >> 1); -+ } -+ -+ /* If after the alignment first '0' was met we still have '1' in */ -+ /* it then aligment is invalid (not power of 2) */ -+ if (alignment) -+ { -+ DB(mvOsPrintf("ctrlSizeToReg: ERR. Alignment parameter 0x%x invalid.\n", -+ (MV_U32)alignment)); -+ return -1; -+ } -+ -+ /* Now the size is shifted right according to aligment: 0x0100 */ -+ size--; /* Now the size is a sequance of '1': 0x00ff */ -+ -+ retVal = size ; -+ -+ /* Check that LSB to MSB is sequence of 1's followed by sequence of 0's */ -+ while(size & 1) /* Check that LSB is set */ -+ { -+ size = (size >> 1); /* If LSB is set, move one bit to the right */ -+ } -+ -+ if (size) /* Sequance of 1's is over. Check that we have no other 1's */ -+ { -+ DB(mvOsPrintf("ctrlSizeToReg: ERR. Size parameter 0x%x invalid.\n", -+ size)); -+ return -1; -+ } -+ -+ return retVal; -+ -+} -+ -+/******************************************************************************* -+* ctrlRegToSize - Extract size value from register value. -+* -+* DESCRIPTION: -+* This function extract a size value from the register size parameter -+* according to given aligment paramter. For example for register size -+* value 0xff and aligment 0x10000 the function will return 0x01000000. -+* -+* INPUT: -+* regSize - Size as in register format. See ctrlSizeToReg. -+* alignment - Size alignment. Note that alignment must be power of 2! -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit describing size. -+* If value is '-1' size parameter or aligment are invalid. -+*******************************************************************************/ -+MV_U32 ctrlRegToSize(MV_U32 regSize, MV_U32 alignment) -+{ -+ MV_U32 temp; -+ -+ /* Check that LSB to MSB is sequence of 1's followed by sequence of 0's */ -+ temp = regSize; /* Now the size is a sequance of '1': 0x00ff */ -+ -+ while(temp & 1) /* Check that LSB is set */ -+ { -+ temp = (temp >> 1); /* If LSB is set, move one bit to the right */ -+ } -+ -+ if (temp) /* Sequance of 1's is over. Check that we have no other 1's */ -+ { -+ DB(mvOsPrintf("ctrlRegToSize: ERR. Size parameter 0x%x invalid.\n", -+ regSize)); -+ return -1; -+ } -+ -+ -+ /* Check that aligment is a power of two */ -+ temp = alignment - 1;/* Now the alignmet is a sequance of '1' (0xffff) */ -+ -+ while(temp & 1) /* Check that alignmet LSB is set */ -+ { -+ temp = (temp >> 1); /* If LSB is set, move 'size' one bit to right */ -+ } -+ -+ /* If after the 'temp' first '0' was met we still have '1' in 'temp' */ -+ /* then 'temp' is invalid (not power of 2) */ -+ if (temp) -+ { -+ DB(mvOsPrintf("ctrlSizeToReg: ERR. Alignment parameter 0x%x invalid.\n", -+ alignment)); -+ return -1; -+ } -+ -+ regSize++; /* Now the size is 0x0100 */ -+ -+ /* Add in the "alignment" portion to the register size parameter */ -+ alignment--; /* Now the alignmet is a sequance of '1' (e.g. 0xffff) */ -+ -+ while(alignment & 1) /* Check that alignmet LSB is set */ -+ { -+ regSize = (regSize << 1); /* LSB is set, move 'size' one bit left */ -+ alignment = (alignment >> 1); -+ } -+ -+ return regSize; -+} -+ -+ -+/******************************************************************************* -+* ctrlSizeRegRoundUp - Round up given size -+* -+* DESCRIPTION: -+* This function round up a given size to a size that fits the -+* restrictions of size format given an aligment parameter. -+* to given aligment paramter. For example for size parameter 0xa1000 and -+* aligment 0x1000 the function will return 0xFF000. -+* -+* INPUT: -+* size - Size. -+* alignment - Size alignment. Note that alignment must be power of 2! -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit describing size value correspond to size in register. -+*******************************************************************************/ -+MV_U32 ctrlSizeRegRoundUp(MV_U32 size, MV_U32 alignment) -+{ -+ MV_U32 msbBit = 0; -+ MV_U32 retSize; -+ -+ /* Check if size parameter is already comply with restriction */ -+ if (!(-1 == ctrlSizeToReg(size, alignment))) -+ { -+ return size; -+ } -+ -+ while(size) -+ { -+ size = (size >> 1); -+ msbBit++; -+ } -+ -+ retSize = (1 << msbBit); -+ -+ if (retSize < alignment) -+ { -+ return alignment; -+ } -+ else -+ { -+ return retSize; -+ } -+} -+/******************************************************************************* -+* mvCtrlSysRstLengthCounterGet - Return number of milliseconds the reset button -+* was pressed and clear counter -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: number of milliseconds the reset button was pressed -+*******************************************************************************/ -+MV_U32 mvCtrlSysRstLengthCounterGet(MV_VOID) -+{ -+ static volatile MV_U32 Count = 0; -+ -+ if(!Count) { -+ Count = (MV_REG_READ(SYSRST_LENGTH_COUNTER_REG) & SLCR_COUNT_MASK); -+ Count = (Count / (MV_BOARD_REFCLK_25MHZ / 1000)); -+ /* clear counter for next boot */ -+ MV_REG_BIT_SET(SYSRST_LENGTH_COUNTER_REG, SLCR_CLR_MASK); -+ } -+ -+ DB(mvOsPrintf("mvCtrlSysRstLengthCounterGet: Reset button was pressed for %u milliseconds\n", Count)); -+ -+ return Count; -+} -+ -+MV_BOOL mvCtrlIsBootFromSPI(MV_VOID) -+{ -+ MV_U32 satr = 0; -+ satr = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ if(mvCtrlModelGet() == MV_6180_DEV_ID) -+ { -+ if (MSAR_BOOT_MODE_6180(satr) == MSAR_BOOT_SPI_WITH_BOOTROM_6180) -+ return MV_TRUE; -+ else -+ return MV_FALSE; -+ } -+ satr = satr & MSAR_BOOT_MODE_MASK; -+ if (satr == MSAR_BOOT_SPI_WITH_BOOTROM) -+ return MV_TRUE; -+ else -+ return MV_FALSE; -+} -+ -+MV_BOOL mvCtrlIsBootFromSPIUseNAND(MV_VOID) -+{ -+ MV_U32 satr = 0; -+ if(mvCtrlModelGet() == MV_6180_DEV_ID) -+ return MV_FALSE; -+ satr = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ satr = satr & MSAR_BOOT_MODE_MASK; -+ -+ if (satr == MSAR_BOOT_SPI_USE_NAND_WITH_BOOTROM) -+ return MV_TRUE; -+ else -+ return MV_FALSE; -+} -+ -+MV_BOOL mvCtrlIsBootFromNAND(MV_VOID) -+{ -+ MV_U32 satr = 0; -+ satr = MV_REG_READ(MPP_SAMPLE_AT_RESET); -+ if(mvCtrlModelGet() == MV_6180_DEV_ID) -+ { -+ if (MSAR_BOOT_MODE_6180(satr) == MSAR_BOOT_NAND_WITH_BOOTROM_6180) -+ return MV_TRUE; -+ else -+ return MV_FALSE; -+ } -+ satr = satr & MSAR_BOOT_MODE_MASK; -+ if ((satr == MSAR_BOOT_NAND_WITH_BOOTROM)) -+ return MV_TRUE; -+ else -+ return MV_FALSE; -+} -+ -+#if defined(MV_INCLUDE_CLK_PWR_CNTRL) -+/******************************************************************************* -+* mvCtrlPwrSaveOn - Set Power save mode -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+*******************************************************************************/ -+MV_VOID mvCtrlPwrSaveOn(MV_VOID) -+{ -+ unsigned long old,temp; -+ /* Disable int */ -+ __asm__ __volatile__("mrs %0, cpsr\n" -+ "orr %1, %0, #0xc0\n" -+ "msr cpsr_c, %1" -+ : "=r" (old), "=r" (temp) -+ : -+ : "memory"); -+ -+ /* Set SoC in power save */ -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, BIT11); -+ /* Wait for int */ -+ __asm__ __volatile__("mcr p15, 0, r0, c7, c0, 4"); -+ -+ /* Enabled int */ -+ __asm__ __volatile__("msr cpsr_c, %0" -+ : -+ : "r" (old) -+ : "memory"); -+} -+ -+ -+ -+/******************************************************************************* -+* mvCtrlPwrSaveOff - Go out of power save mode -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+*******************************************************************************/ -+MV_VOID mvCtrlPwrSaveOff(MV_VOID) -+{ -+ unsigned long old,temp; -+ /* Disable int */ -+ __asm__ __volatile__("mrs %0, cpsr\n" -+ "orr %1, %0, #0xc0\n" -+ "msr cpsr_c, %1" -+ : "=r" (old), "=r" (temp) -+ : -+ : "memory"); -+ -+ /* Set SoC in power save */ -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, BIT11); -+ /* Wait for int */ -+ __asm__ __volatile__("mcr p15, 0, r0, c7, c0, 4"); -+ -+ /* Enabled int */ -+ __asm__ __volatile__("msr cpsr_c, %0" -+ : -+ : "r" (old) -+ : "memory"); -+} -+ -+/******************************************************************************* -+* mvCtrlPwrClckSet - Set Power State for specific Unit -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+*******************************************************************************/ -+MV_VOID mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable) -+{ -+ switch (unitId) -+ { -+#if defined(MV_INCLUDE_PEX) -+ case PEX_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_PEXSTOPCLOCK_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_PEXSTOPCLOCK_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_GIG_ETH) -+ case ETH_GIG_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_GESTOPCLOCK_MASK(index)); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_GESTOPCLOCK_MASK(index)); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_INTEG_SATA) -+ case SATA_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_SATASTOPCLOCK_MASK(index)); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_SATASTOPCLOCK_MASK(index)); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_CESA) -+ case CESA_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_SESTOPCLOCK_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_SESTOPCLOCK_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_USB) -+ case USB_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_USBSTOPCLOCK_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_USBSTOPCLOCK_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_AUDIO) -+ case AUDIO_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_AUDIOSTOPCLOCK_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_AUDIOSTOPCLOCK_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_TS) -+ case TS_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_TSSTOPCLOCK_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_TSSTOPCLOCK_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_SDIO) -+ case SDIO_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_SDIOSTOPCLOCK_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_SDIOSTOPCLOCK_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_TDM) -+ case TDM_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_TDMSTOPCLOCK_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_TDMSTOPCLOCK_MASK); -+ } -+ break; -+#endif -+ -+ default: -+ -+ break; -+ -+ } -+} -+ -+/******************************************************************************* -+* mvCtrlPwrClckGet - Get Power State of specific Unit -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+******************************************************************************/ -+MV_BOOL mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index) -+{ -+ MV_U32 reg = MV_REG_READ(POWER_MNG_CTRL_REG); -+ MV_BOOL state = MV_TRUE; -+ -+ switch (unitId) -+ { -+#if defined(MV_INCLUDE_PEX) -+ case PEX_UNIT_ID: -+ if ((reg & PMC_PEXSTOPCLOCK_MASK) == PMC_PEXSTOPCLOCK_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ -+ break; -+#endif -+#if defined(MV_INCLUDE_GIG_ETH) -+ case ETH_GIG_UNIT_ID: -+ if ((reg & PMC_GESTOPCLOCK_MASK(index)) == PMC_GESTOPCLOCK_STOP(index)) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_SATA) -+ case SATA_UNIT_ID: -+ if ((reg & PMC_SATASTOPCLOCK_MASK(index)) == PMC_SATASTOPCLOCK_STOP(index)) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_CESA) -+ case CESA_UNIT_ID: -+ if ((reg & PMC_SESTOPCLOCK_MASK) == PMC_SESTOPCLOCK_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_USB) -+ case USB_UNIT_ID: -+ if ((reg & PMC_USBSTOPCLOCK_MASK) == PMC_USBSTOPCLOCK_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_AUDIO) -+ case AUDIO_UNIT_ID: -+ if ((reg & PMC_AUDIOSTOPCLOCK_MASK) == PMC_AUDIOSTOPCLOCK_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_TS) -+ case TS_UNIT_ID: -+ if ((reg & PMC_TSSTOPCLOCK_MASK) == PMC_TSSTOPCLOCK_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_SDIO) -+ case SDIO_UNIT_ID: -+ if ((reg & PMC_SDIOSTOPCLOCK_MASK)== PMC_SDIOSTOPCLOCK_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_TDM) -+ case TDM_UNIT_ID: -+ if ((reg & PMC_TDMSTOPCLOCK_MASK) == PMC_TDMSTOPCLOCK_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+ -+ default: -+ state = MV_TRUE; -+ break; -+ } -+ -+ -+ return state; -+} -+/******************************************************************************* -+* mvCtrlPwrMemSet - Set Power State for memory on specific Unit -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+*******************************************************************************/ -+MV_VOID mvCtrlPwrMemSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable) -+{ -+ switch (unitId) -+ { -+#if defined(MV_INCLUDE_PEX) -+ case PEX_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_PEXSTOPMEM_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_PEXSTOPMEM_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_GIG_ETH) -+ case ETH_GIG_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_GESTOPMEM_MASK(index)); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_GESTOPMEM_MASK(index)); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_INTEG_SATA) -+ case SATA_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_SATASTOPMEM_MASK(index)); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_SATASTOPMEM_MASK(index)); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_CESA) -+ case CESA_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_SESTOPMEM_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_SESTOPMEM_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_USB) -+ case USB_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_USBSTOPMEM_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_USBSTOPMEM_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_AUDIO) -+ case AUDIO_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_AUDIOSTOPMEM_MASK); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_AUDIOSTOPMEM_MASK); -+ } -+ break; -+#endif -+#if defined(MV_INCLUDE_XOR) -+ case XOR_UNIT_ID: -+ if (enable == MV_FALSE) -+ { -+ MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_XORSTOPMEM_MASK(index)); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_XORSTOPMEM_MASK(index)); -+ } -+ break; -+#endif -+ default: -+ -+ break; -+ -+ } -+} -+ -+/******************************************************************************* -+* mvCtrlPwrMemGet - Get Power State of memory on specific Unit -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+******************************************************************************/ -+MV_BOOL mvCtrlPwrMemGet(MV_UNIT_ID unitId, MV_U32 index) -+{ -+ MV_U32 reg = MV_REG_READ(POWER_MNG_MEM_CTRL_REG); -+ MV_BOOL state = MV_TRUE; -+ -+ switch (unitId) -+ { -+#if defined(MV_INCLUDE_PEX) -+ case PEX_UNIT_ID: -+ if ((reg & PMC_PEXSTOPMEM_MASK) == PMC_PEXSTOPMEM_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ -+ break; -+#endif -+#if defined(MV_INCLUDE_GIG_ETH) -+ case ETH_GIG_UNIT_ID: -+ if ((reg & PMC_GESTOPMEM_MASK(index)) == PMC_GESTOPMEM_STOP(index)) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_SATA) -+ case SATA_UNIT_ID: -+ if ((reg & PMC_SATASTOPMEM_MASK(index)) == PMC_SATASTOPMEM_STOP(index)) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_CESA) -+ case CESA_UNIT_ID: -+ if ((reg & PMC_SESTOPMEM_MASK) == PMC_SESTOPMEM_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_USB) -+ case USB_UNIT_ID: -+ if ((reg & PMC_USBSTOPMEM_MASK) == PMC_USBSTOPMEM_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_AUDIO) -+ case AUDIO_UNIT_ID: -+ if ((reg & PMC_AUDIOSTOPMEM_MASK) == PMC_AUDIOSTOPMEM_STOP) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+#if defined(MV_INCLUDE_XOR) -+ case XOR_UNIT_ID: -+ if ((reg & PMC_XORSTOPMEM_MASK(index)) == PMC_XORSTOPMEM_STOP(index)) -+ { -+ state = MV_FALSE; -+ } -+ else state = MV_TRUE; -+ break; -+#endif -+ -+ default: -+ state = MV_TRUE; -+ break; -+ } -+ -+ -+ return state; -+} -+#else -+MV_VOID mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable) {return;} -+MV_BOOL mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index) {return MV_TRUE;} -+#endif /* #if defined(MV_INCLUDE_CLK_PWR_CNTRL) */ -+ -+ -+/******************************************************************************* -+* mvMPPConfigToSPI - Change MPP[3:0] configuration to SPI mode -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+******************************************************************************/ -+MV_VOID mvMPPConfigToSPI(MV_VOID) -+{ -+ MV_U32 mppVal = 0; -+ MV_U32 bootVal = 0; -+ -+ if(!mvCtrlIsBootFromSPIUseNAND()) -+ return; -+ mppVal = 0x00002220; /* Set MPP [3:1] to SPI mode */ -+ bootVal = MV_REG_READ(mvCtrlMppRegGet(0)); -+ bootVal &= 0xffff000f; -+ mppVal |= bootVal; -+ -+ MV_REG_WRITE(mvCtrlMppRegGet(0), mppVal); -+} -+ -+ -+/******************************************************************************* -+* mvMPPConfigToDefault - Change MPP[7:0] configuration to default configuration -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+******************************************************************************/ -+MV_VOID mvMPPConfigToDefault(MV_VOID) -+{ -+ MV_U32 mppVal = 0; -+ MV_U32 bootVal = 0; -+ -+ if(!mvCtrlIsBootFromSPIUseNAND()) -+ return; -+ mppVal = mvBoardMppGet(0); -+ bootVal = MV_REG_READ(mvCtrlMppRegGet(0)); -+ mppVal &= ~0xffff000f; -+ bootVal &= 0xffff000f; -+ mppVal |= bootVal; -+ -+ MV_REG_WRITE(mvCtrlMppRegGet(0), mppVal); -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.h -new file mode 100644 -index 0000000..0f8d2b4 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvLib.h -@@ -0,0 +1,185 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvCtrlEnvLibh -+#define __INCmvCtrlEnvLibh -+ -+/* includes */ -+#include "mvSysHwConfig.h" -+#include "mvCommon.h" -+#include "mvTypes.h" -+#include "mvOs.h" -+#include "boardEnv/mvBoardEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+#include "ctrlEnv/mvCtrlEnvRegs.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+ -+/* typedefs */ -+ -+/* This enumerator describes the possible HW cache coherency policies the */ -+/* controllers supports. */ -+typedef enum _mvCachePolicy -+{ -+ NO_COHERENCY, /* No HW cache coherency support */ -+ WT_COHERENCY, /* HW cache coherency supported in Write Through policy */ -+ WB_COHERENCY /* HW cache coherency supported in Write Back policy */ -+}MV_CACHE_POLICY; -+ -+ -+/* The swapping is referred to a 64-bit words (as this is the controller */ -+/* internal data path width). This enumerator describes the possible */ -+/* data swap types. Below is an example of the data 0x0011223344556677 */ -+typedef enum _mvSwapType -+{ -+ MV_BYTE_SWAP, /* Byte Swap 77 66 55 44 33 22 11 00 */ -+ MV_NO_SWAP, /* No swapping 00 11 22 33 44 55 66 77 */ -+ MV_BYTE_WORD_SWAP, /* Both byte and word swap 33 22 11 00 77 66 55 44 */ -+ MV_WORD_SWAP, /* Word swap 44 55 66 77 00 11 22 33 */ -+ SWAP_TYPE_MAX /* Delimiter for this enumerator */ -+}MV_SWAP_TYPE; -+ -+/* This structure describes access rights for Access protection windows */ -+/* that can be found in IDMA, XOR, Ethernet and MPSC units. */ -+/* Note that the permission enumerator coresponds to its register format. */ -+/* For example, Read only premission is presented as "1" in register field. */ -+typedef enum _mvAccessRights -+{ -+ NO_ACCESS_ALLOWED = 0, /* No access allowed */ -+ READ_ONLY = 1, /* Read only permission */ -+ ACC_RESERVED = 2, /* Reserved access right */ -+ FULL_ACCESS = 3, /* Read and Write permission */ -+ MAX_ACC_RIGHTS -+}MV_ACCESS_RIGHTS; -+ -+ -+/* mcspLib.h API list */ -+ -+MV_STATUS mvCtrlEnvInit(MV_VOID); -+MV_U32 mvCtrlMppRegGet(MV_U32 mppGroup); -+ -+#if defined(MV_INCLUDE_PEX) -+MV_U32 mvCtrlPexMaxIfGet(MV_VOID); -+#else -+#define mvCtrlPexMaxIfGet() (0) -+#endif -+ -+#define mvCtrlPciIfMaxIfGet() (0) -+ -+#if defined(MV_INCLUDE_GIG_ETH) -+MV_U32 mvCtrlEthMaxPortGet(MV_VOID); -+#endif -+#if defined(MV_INCLUDE_XOR) -+MV_U32 mvCtrlXorMaxChanGet(MV_VOID); -+#endif -+#if defined(MV_INCLUDE_USB) -+MV_U32 mvCtrlUsbMaxGet(MV_VOID); -+#endif -+#if defined(MV_INCLUDE_NAND) -+MV_U32 mvCtrlNandSupport(MV_VOID); -+#endif -+#if defined(MV_INCLUDE_SDIO) -+MV_U32 mvCtrlSdioSupport(MV_VOID); -+#endif -+#if defined(MV_INCLUDE_TS) -+MV_U32 mvCtrlTsSupport(MV_VOID); -+#endif -+#if defined(MV_INCLUDE_AUDIO) -+MV_U32 mvCtrlAudioSupport(MV_VOID); -+#endif -+#if defined(MV_INCLUDE_TDM) -+MV_U32 mvCtrlTdmSupport(MV_VOID); -+#endif -+ -+MV_U16 mvCtrlModelGet(MV_VOID); -+MV_U8 mvCtrlRevGet(MV_VOID); -+MV_STATUS mvCtrlNameGet(char *pNameBuff); -+MV_U32 mvCtrlModelRevGet(MV_VOID); -+MV_STATUS mvCtrlModelRevNameGet(char *pNameBuff); -+MV_VOID mvCtrlAddrDecShow(MV_VOID); -+const MV_8* mvCtrlTargetNameGet(MV_TARGET target); -+MV_U32 ctrlSizeToReg(MV_U32 size, MV_U32 alignment); -+MV_U32 ctrlRegToSize(MV_U32 regSize, MV_U32 alignment); -+MV_U32 ctrlSizeRegRoundUp(MV_U32 size, MV_U32 alignment); -+MV_U32 mvCtrlSysRstLengthCounterGet(MV_VOID); -+MV_STATUS ctrlWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2); -+MV_STATUS ctrlWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2); -+ -+MV_VOID mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable); -+MV_BOOL mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index); -+MV_VOID mvCtrlPwrMemSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable); -+MV_BOOL mvCtrlIsBootFromSPI(MV_VOID); -+MV_BOOL mvCtrlIsBootFromSPIUseNAND(MV_VOID); -+MV_BOOL mvCtrlIsBootFromNAND(MV_VOID); -+#if defined(MV_INCLUDE_CLK_PWR_CNTRL) -+MV_VOID mvCtrlPwrSaveOn(MV_VOID); -+MV_VOID mvCtrlPwrSaveOff(MV_VOID); -+#endif -+MV_BOOL mvCtrlPwrMemGet(MV_UNIT_ID unitId, MV_U32 index); -+MV_VOID mvMPPConfigToSPI(MV_VOID); -+MV_VOID mvMPPConfigToDefault(MV_VOID); -+ -+ -+#endif /* __INCmvCtrlEnvLibh */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvRegs.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvRegs.h -new file mode 100644 -index 0000000..b889e24 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvRegs.h -@@ -0,0 +1,419 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvCtrlEnvRegsh -+#define __INCmvCtrlEnvRegsh -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* CV Support */ -+#define PEX0_MEM0 PEX0_MEM -+#define PCI0_MEM0 PEX0_MEM -+ -+/* Controller revision info */ -+#define PCI_CLASS_CODE_AND_REVISION_ID 0x008 -+#define PCCRIR_REVID_OFFS 0 /* Revision ID */ -+#define PCCRIR_REVID_MASK (0xff << PCCRIR_REVID_OFFS) -+ -+/* Controler environment registers offsets */ -+ -+/* Power Managment Control */ -+#define POWER_MNG_MEM_CTRL_REG 0x20118 -+ -+#define PMC_GESTOPMEM_OFFS(port) ((port)? 13 : 0) -+#define PMC_GESTOPMEM_MASK(port) (1 << PMC_GESTOPMEM_OFFS(port)) -+#define PMC_GESTOPMEM_EN(port) (0 << PMC_GESTOPMEM_OFFS(port)) -+#define PMC_GESTOPMEM_STOP(port) (1 << PMC_GESTOPMEM_OFFS(port)) -+ -+#define PMC_PEXSTOPMEM_OFFS 1 -+#define PMC_PEXSTOPMEM_MASK (1 << PMC_PEXSTOPMEM_OFFS) -+#define PMC_PEXSTOPMEM_EN (0 << PMC_PEXSTOPMEM_OFFS) -+#define PMC_PEXSTOPMEM_STOP (1 << PMC_PEXSTOPMEM_OFFS) -+ -+#define PMC_USBSTOPMEM_OFFS 2 -+#define PMC_USBSTOPMEM_MASK (1 << PMC_USBSTOPMEM_OFFS) -+#define PMC_USBSTOPMEM_EN (0 << PMC_USBSTOPMEM_OFFS) -+#define PMC_USBSTOPMEM_STOP (1 << PMC_USBSTOPMEM_OFFS) -+ -+#define PMC_DUNITSTOPMEM_OFFS 3 -+#define PMC_DUNITSTOPMEM_MASK (1 << PMC_DUNITSTOPMEM_OFFS) -+#define PMC_DUNITSTOPMEM_EN (0 << PMC_DUNITSTOPMEM_OFFS) -+#define PMC_DUNITSTOPMEM_STOP (1 << PMC_DUNITSTOPMEM_OFFS) -+ -+#define PMC_RUNITSTOPMEM_OFFS 4 -+#define PMC_RUNITSTOPMEM_MASK (1 << PMC_RUNITSTOPMEM_OFFS) -+#define PMC_RUNITSTOPMEM_EN (0 << PMC_RUNITSTOPMEM_OFFS) -+#define PMC_RUNITSTOPMEM_STOP (1 << PMC_RUNITSTOPMEM_OFFS) -+ -+#define PMC_XORSTOPMEM_OFFS(port) (5+(port*2)) -+#define PMC_XORSTOPMEM_MASK(port) (1 << PMC_XORSTOPMEM_OFFS(port)) -+#define PMC_XORSTOPMEM_EN(port) (0 << PMC_XORSTOPMEM_OFFS(port)) -+#define PMC_XORSTOPMEM_STOP(port) (1 << PMC_XORSTOPMEM_OFFS(port)) -+ -+#define PMC_SATASTOPMEM_OFFS(port) (6+(port*5)) -+#define PMC_SATASTOPMEM_MASK(port) (1 << PMC_SATASTOPMEM_OFFS(port)) -+#define PMC_SATASTOPMEM_EN(port) (0 << PMC_SATASTOPMEM_OFFS(port)) -+#define PMC_SATASTOPMEM_STOP(port) (1 << PMC_SATASTOPMEM_OFFS(port)) -+ -+#define PMC_SESTOPMEM_OFFS 8 -+#define PMC_SESTOPMEM_MASK (1 << PMC_SESTOPMEM_OFFS) -+#define PMC_SESTOPMEM_EN (0 << PMC_SESTOPMEM_OFFS) -+#define PMC_SESTOPMEM_STOP (1 << PMC_SESTOPMEM_OFFS) -+ -+#define PMC_AUDIOSTOPMEM_OFFS 9 -+#define PMC_AUDIOSTOPMEM_MASK (1 << PMC_AUDIOSTOPMEM_OFFS) -+#define PMC_AUDIOSTOPMEM_EN (0 << PMC_AUDIOSTOPMEM_OFFS) -+#define PMC_AUDIOSTOPMEM_STOP (1 << PMC_AUDIOSTOPMEM_OFFS) -+ -+#define POWER_MNG_CTRL_REG 0x2011C -+ -+#define PMC_GESTOPCLOCK_OFFS(port) ((port)? 19 : 0) -+#define PMC_GESTOPCLOCK_MASK(port) (1 << PMC_GESTOPCLOCK_OFFS(port)) -+#define PMC_GESTOPCLOCK_EN(port) (1 << PMC_GESTOPCLOCK_OFFS(port)) -+#define PMC_GESTOPCLOCK_STOP(port) (0 << PMC_GESTOPCLOCK_OFFS(port)) -+ -+#define PMC_PEXPHYSTOPCLOCK_OFFS 1 -+#define PMC_PEXPHYSTOPCLOCK_MASK (1 << PMC_PEXPHYSTOPCLOCK_OFFS) -+#define PMC_PEXPHYSTOPCLOCK_EN (1 << PMC_PEXPHYSTOPCLOCK_OFFS) -+#define PMC_PEXPHYSTOPCLOCK_STOP (0 << PMC_PEXPHYSTOPCLOCK_OFFS) -+ -+#define PMC_PEXSTOPCLOCK_OFFS 2 -+#define PMC_PEXSTOPCLOCK_MASK (1 << PMC_PEXSTOPCLOCK_OFFS) -+#define PMC_PEXSTOPCLOCK_EN (1 << PMC_PEXSTOPCLOCK_OFFS) -+#define PMC_PEXSTOPCLOCK_STOP (0 << PMC_PEXSTOPCLOCK_OFFS) -+ -+#define PMC_USBSTOPCLOCK_OFFS 3 -+#define PMC_USBSTOPCLOCK_MASK (1 << PMC_USBSTOPCLOCK_OFFS) -+#define PMC_USBSTOPCLOCK_EN (1 << PMC_USBSTOPCLOCK_OFFS) -+#define PMC_USBSTOPCLOCK_STOP (0 << PMC_USBSTOPCLOCK_OFFS) -+ -+#define PMC_SDIOSTOPCLOCK_OFFS 4 -+#define PMC_SDIOSTOPCLOCK_MASK (1 << PMC_SDIOSTOPCLOCK_OFFS) -+#define PMC_SDIOSTOPCLOCK_EN (1 << PMC_SDIOSTOPCLOCK_OFFS) -+#define PMC_SDIOSTOPCLOCK_STOP (0 << PMC_SDIOSTOPCLOCK_OFFS) -+ -+#define PMC_TSSTOPCLOCK_OFFS 5 -+#define PMC_TSSTOPCLOCK_MASK (1 << PMC_TSSTOPCLOCK_OFFS) -+#define PMC_TSSTOPCLOCK_EN (1 << PMC_TSSTOPCLOCK_OFFS) -+#define PMC_TSSTOPCLOCK_STOP (0 << PMC_TSSTOPCLOCK_OFFS) -+ -+#define PMC_AUDIOSTOPCLOCK_OFFS 9 -+#define PMC_AUDIOSTOPCLOCK_MASK (1 << PMC_AUDIOSTOPCLOCK_OFFS) -+#define PMC_AUDIOSTOPCLOCK_EN (1 << PMC_AUDIOSTOPCLOCK_OFFS) -+#define PMC_AUDIOSTOPCLOCK_STOP (0 << PMC_AUDIOSTOPCLOCK_OFFS) -+ -+#define PMC_POWERSAVE_OFFS 11 -+#define PMC_POWERSAVE_MASK (1 << PMC_POWERSAVE_OFFS) -+#define PMC_POWERSAVE_EN (1 << PMC_POWERSAVE_OFFS) -+#define PMC_POWERSAVE_STOP (0 << PMC_POWERSAVE_OFFS) -+ -+ -+ -+ -+#define PMC_SATASTOPCLOCK_OFFS(port) (14+(port)) -+#define PMC_SATASTOPCLOCK_MASK(port) (1 << PMC_SATASTOPCLOCK_OFFS(port)) -+#define PMC_SATASTOPCLOCK_EN(port) (1 << PMC_SATASTOPCLOCK_OFFS(port)) -+#define PMC_SATASTOPCLOCK_STOP(port) (0 << PMC_SATASTOPCLOCK_OFFS(port)) -+ -+#define PMC_SESTOPCLOCK_OFFS 17 -+#define PMC_SESTOPCLOCK_MASK (1 << PMC_SESTOPCLOCK_OFFS) -+#define PMC_SESTOPCLOCK_EN (1 << PMC_SESTOPCLOCK_OFFS) -+#define PMC_SESTOPCLOCK_STOP (0 << PMC_SESTOPCLOCK_OFFS) -+ -+#define PMC_TDMSTOPCLOCK_OFFS 20 -+#define PMC_TDMSTOPCLOCK_MASK (1 << PMC_TDMSTOPCLOCK_OFFS) -+#define PMC_TDMSTOPCLOCK_EN (1 << PMC_TDMSTOPCLOCK_OFFS) -+#define PMC_TDMSTOPCLOCK_STOP (0 << PMC_TDMSTOPCLOCK_OFFS) -+ -+ -+/* Controler environment registers offsets */ -+#define MPP_CONTROL_REG0 0x10000 -+#define MPP_CONTROL_REG1 0x10004 -+#define MPP_CONTROL_REG2 0x10008 -+#define MPP_CONTROL_REG3 0x1000C -+#define MPP_CONTROL_REG4 0x10010 -+#define MPP_CONTROL_REG5 0x10014 -+#define MPP_CONTROL_REG6 0x10018 -+#define MPP_SAMPLE_AT_RESET 0x10030 -+#define CHIP_BOND_REG 0x10034 -+#define SYSRST_LENGTH_COUNTER_REG 0x10050 -+#define SLCR_COUNT_OFFS 0 -+#define SLCR_COUNT_MASK (0x1FFFFFFF << SLCR_COUNT_OFFS) -+#define SLCR_CLR_OFFS 31 -+#define SLCR_CLR_MASK (1 << SLCR_CLR_OFFS) -+#define PCKG_OPT_MASK 0x3 -+#define MPP_OUTPUT_DRIVE_REG 0x100E0 -+#define MPP_RGMII0_OUTPUT_DRIVE_OFFS 7 -+#define MPP_3_3_RGMII0_OUTPUT_DRIVE (0x0 << MPP_RGMII0_OUTPUT_DRIVE_OFFS) -+#define MPP_1_8_RGMII0_OUTPUT_DRIVE (0x1 << MPP_RGMII0_OUTPUT_DRIVE_OFFS) -+#define MPP_RGMII1_OUTPUT_DRIVE_OFFS 15 -+#define MPP_3_3_RGMII1_OUTPUT_DRIVE (0x0 << MPP_RGMII1_OUTPUT_DRIVE_OFFS) -+#define MPP_1_8_RGMII1_OUTPUT_DRIVE (0x1 << MPP_RGMII1_OUTPUT_DRIVE_OFFS) -+ -+#define MSAR_BOOT_MODE_OFFS 12 -+#define MSAR_BOOT_MODE_MASK (0x7 << MSAR_BOOT_MODE_OFFS) -+#define MSAR_BOOT_NAND_WITH_BOOTROM (0x5 << MSAR_BOOT_MODE_OFFS) -+#define MSAR_BOOT_SPI_WITH_BOOTROM (0x4 << MSAR_BOOT_MODE_OFFS) -+#define MSAR_BOOT_SPI_USE_NAND_WITH_BOOTROM (0x2 << MSAR_BOOT_MODE_OFFS) -+ -+#define MSAR_BOOT_MODE_6180(X) (((X & 0x3000) >> 12) | \ -+ ((X & 0x2) << 1)) -+#define MSAR_BOOT_SPI_WITH_BOOTROM_6180 0x1 -+#define MSAR_BOOT_NAND_WITH_BOOTROM_6180 0x5 -+ -+#define MSAR_TCLCK_OFFS 21 -+#define MSAR_TCLCK_MASK (0x1 << MSAR_TCLCK_OFFS) -+#define MSAR_TCLCK_166 (0x1 << MSAR_TCLCK_OFFS) -+#define MSAR_TCLCK_200 (0x0 << MSAR_TCLCK_OFFS) -+ -+ -+#define MSAR_CPUCLCK_EXTRACT(X) (((X & 0x2) >> 1) | ((X & 0x400000) >> 21) | \ -+ ((X & 0x18) >> 1)) -+ -+#define MSAR_CPUCLCK_OFFS_6180 2 -+#define MSAR_CPUCLCK_MASK_6180 (0x7 << MSAR_CPUCLCK_OFFS_6180) -+ -+#define MSAR_DDRCLCK_RTIO_OFFS 5 -+#define MSAR_DDRCLCK_RTIO_MASK (0xF << MSAR_DDRCLCK_RTIO_OFFS) -+ -+#define MSAR_L2CLCK_EXTRACT(X) (((X & 0x600) >> 9) | ((X & 0x80000) >> 17)) -+ -+#ifndef MV_ASMLANGUAGE -+/* CPU clock for 6281,6192 0->Resereved */ -+#define MV_CPU_CLCK_TBL { 0, 0, 0, 0, \ -+ 600000000, 0, 800000000, 1000000000, \ -+ 0, 1200000000, 0, 0, \ -+ 1500000000, 0, 0, 0} -+ -+/* DDR clock RATIO for 6281,6192 {0,0}->Reserved */ -+#define MV_DDR_CLCK_RTIO_TBL {\ -+ {0, 0}, {0, 0}, {2, 1}, {0, 0}, \ -+ {3, 1}, {0, 0}, {4, 1}, {9, 2}, \ -+ {5, 1}, {6, 1}, {0, 0}, {0, 0}, \ -+ {0, 0}, {0, 0}, {0, 0}, {0, 0} \ -+} -+ -+/* L2 clock RATIO for 6281,6192 {1,1}->Reserved */ -+#define MV_L2_CLCK_RTIO_TBL {\ -+ {0, 0}, {2, 1}, {0, 0}, {3, 1}, \ -+ {0, 0}, {0, 0}, {0, 0}, {0, 0} \ -+} -+ -+/* 6180 have different clk reset sampling */ -+/* ARM CPU, DDR, L2 clock for 6180 {0,0,0}->Reserved */ -+#define MV_CPU6180_DDR_L2_CLCK_TBL { \ -+ {0, 0, 0 },\ -+ {0, 0, 0 },\ -+ {0, 0, 0 },\ -+ {0, 0, 0 },\ -+ {0, 0, 0 },\ -+ {600000000, 200000000, 300000000 },\ -+ {800000000, 200000000, 400000000 },\ -+ {0, 0, 0 }\ -+} -+ -+ -+ -+/* These macros help units to identify a target Mbus Arbiter group */ -+#define MV_TARGET_IS_DRAM(target) \ -+ ((target >= SDRAM_CS0) && (target <= SDRAM_CS3)) -+ -+#define MV_TARGET_IS_PEX0(target) \ -+ ((target >= PEX0_MEM) && (target <= PEX0_IO)) -+ -+#define MV_TARGET_IS_PEX1(target) 0 -+ -+#define MV_TARGET_IS_PEX(target) (MV_TARGET_IS_PEX0(target) || MV_TARGET_IS_PEX1(target)) -+ -+#define MV_TARGET_IS_DEVICE(target) \ -+ ((target >= DEVICE_CS0) && (target <= DEVICE_CS3)) -+ -+#define MV_PCI_DRAM_BAR_TO_DRAM_TARGET(bar) 0 -+ -+#define MV_TARGET_IS_AS_BOOT(target) ((target) == (sampleAtResetTargetArray[ \ -+ (mvCtrlModelGet() == MV_6180_DEV_ID)? MSAR_BOOT_MODE_6180 \ -+ (MV_REG_READ(MPP_SAMPLE_AT_RESET)):((MV_REG_READ(MPP_SAMPLE_AT_RESET)\ -+ & MSAR_BOOT_MODE_MASK) >> MSAR_BOOT_MODE_OFFS)])) -+ -+ -+#define MV_CHANGE_BOOT_CS(target) (((target) == DEV_BOOCS)?\ -+ sampleAtResetTargetArray[(mvCtrlModelGet() == MV_6180_DEV_ID)? \ -+ MSAR_BOOT_MODE_6180(MV_REG_READ(MPP_SAMPLE_AT_RESET)): \ -+ ((MV_REG_READ(MPP_SAMPLE_AT_RESET) & MSAR_BOOT_MODE_MASK)\ -+ >> MSAR_BOOT_MODE_OFFS)]:(target)) -+ -+#define TCLK_TO_COUNTER_RATIO 1 /* counters running in Tclk */ -+ -+#define BOOT_TARGETS_NAME_ARRAY { \ -+ TBL_TERM, \ -+ TBL_TERM, \ -+ BOOT_ROM_CS, \ -+ TBL_TERM, \ -+ BOOT_ROM_CS, \ -+ BOOT_ROM_CS, \ -+ TBL_TERM, \ -+ TBL_TERM \ -+} -+ -+#define BOOT_TARGETS_NAME_ARRAY_6180 { \ -+ TBL_TERM, \ -+ BOOT_ROM_CS, \ -+ TBL_TERM, \ -+ TBL_TERM, \ -+ TBL_TERM, \ -+ BOOT_ROM_CS, \ -+ TBL_TERM, \ -+ TBL_TERM \ -+} -+ -+ -+/* For old competability */ -+#define DEVICE_CS0 NFLASH_CS -+#define DEVICE_CS1 SPI_CS -+#define DEVICE_CS2 BOOT_ROM_CS -+#define DEVICE_CS3 DEV_BOOCS -+#define MV_BOOTDEVICE_INDEX 0 -+ -+#define START_DEV_CS DEV_CS0 -+#define DEV_TO_TARGET(dev) ((dev) + DEVICE_CS0) -+ -+#define PCI_IF0_MEM0 PEX0_MEM -+#define PCI_IF0_IO PEX0_IO -+ -+ -+/* This enumerator defines the Marvell controller target ID */ -+typedef enum _mvTargetId -+{ -+ DRAM_TARGET_ID = 0 , /* Port 0 -> DRAM interface */ -+ DEV_TARGET_ID = 1, /* Port 1 -> Nand/SPI */ -+ PEX0_TARGET_ID = 4 , /* Port 4 -> PCI Express0 */ -+ CRYPT_TARGET_ID = 3 , /* Port 3 --> Crypto Engine */ -+ SAGE_TARGET_ID = 12 , /* Port 12 -> SAGE Unit */ -+ MAX_TARGETS_ID -+}MV_TARGET_ID; -+ -+ -+/* This enumerator described the possible Controller paripheral targets. */ -+/* Controller peripherals are designated memory/IO address spaces that the */ -+/* controller can access. They are also refered as "targets" */ -+typedef enum _mvTarget -+{ -+ TBL_TERM = -1, /* none valid target, used as targets list terminator*/ -+ SDRAM_CS0, /* SDRAM chip select 0 */ -+ SDRAM_CS1, /* SDRAM chip select 1 */ -+ SDRAM_CS2, /* SDRAM chip select 2 */ -+ SDRAM_CS3, /* SDRAM chip select 3 */ -+ PEX0_MEM, /* PCI Express 0 Memory */ -+ PEX0_IO, /* PCI Express 0 IO */ -+ INTER_REGS, /* Internal registers */ -+ NFLASH_CS, /* NFLASH_CS */ -+ SPI_CS, /* SPI_CS */ -+ BOOT_ROM_CS, /* BOOT_ROM_CS */ -+ DEV_BOOCS, /* DEV_BOOCS */ -+ CRYPT_ENG, /* Crypto Engine */ -+#ifdef MV_INCLUDE_SAGE -+ SAGE_UNIT, /* SAGE Unit */ -+#endif -+ MAX_TARGETS -+ -+}MV_TARGET; -+ -+#define TARGETS_DEF_ARRAY { \ -+ {0x0E, DRAM_TARGET_ID }, /* SDRAM_CS0 */ \ -+ {0x0D, DRAM_TARGET_ID }, /* SDRAM_CS1 */ \ -+ {0x0B, DRAM_TARGET_ID }, /* SDRAM_CS0 */ \ -+ {0x07, DRAM_TARGET_ID }, /* SDRAM_CS1 */ \ -+ {0xE8, PEX0_TARGET_ID }, /* PEX0_MEM */ \ -+ {0xE0, PEX0_TARGET_ID }, /* PEX0_IO */ \ -+ {0xFF, 0xFF }, /* INTER_REGS */ \ -+ {0x2F, DEV_TARGET_ID }, /* NFLASH_CS */ \ -+ {0x1E, DEV_TARGET_ID }, /* SPI_CS */ \ -+ {0x1D, DEV_TARGET_ID }, /* BOOT_ROM_CS */ \ -+ {0x1E, DEV_TARGET_ID }, /* DEV_BOOCS */ \ -+ {0x01, CRYPT_TARGET_ID}, /* CRYPT_ENG */ \ -+ {0x00, SAGE_TARGET_ID } \ -+} -+ -+ -+#define TARGETS_NAME_ARRAY { \ -+ "SDRAM_CS0", /* SDRAM_CS0 */ \ -+ "SDRAM_CS1", /* SDRAM_CS1 */ \ -+ "SDRAM_CS2", /* SDRAM_CS2 */ \ -+ "SDRAM_CS3", /* SDRAM_CS3 */ \ -+ "PEX0_MEM", /* PEX0_MEM */ \ -+ "PEX0_IO", /* PEX0_IO */ \ -+ "INTER_REGS", /* INTER_REGS */ \ -+ "NFLASH_CS", /* NFLASH_CS */ \ -+ "SPI_CS", /* SPI_CS */ \ -+ "BOOT_ROM_CS", /* BOOT_ROM_CS */ \ -+ "DEV_BOOTCS", /* DEV_BOOCS */ \ -+ "CRYPT_ENG", /* CRYPT_ENG */ \ -+ "SAGE_UNIT" /* SAGE_UNIT */ \ -+} -+#endif /* MV_ASMLANGUAGE */ -+ -+ -+#endif -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvSpec.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvSpec.h -new file mode 100644 -index 0000000..12d2066 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvSpec.h -@@ -0,0 +1,257 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvCtrlEnvSpech -+#define __INCmvCtrlEnvSpech -+ -+#include "mvDeviceId.h" -+#include "mvSysHwConfig.h" -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+#define MV_ARM_SOC -+#define SOC_NAME_PREFIX "MV88F" -+ -+ -+/* units base and port numbers */ -+#ifdef MV_ASMLANGUAGE -+#define XOR_UNIT_BASE(unit) 0x60800 -+#else -+#define MV_XOR_REG_BASE 0x60000 -+#define XOR_UNIT_BASE(unit) ((unit)? 0x60900:0x60800) -+#endif -+ -+#define TDM_REG_BASE 0xD0000 -+#define USB_REG_BASE(dev) 0x50000 -+#define AUDIO_REG_BASE 0xA0000 -+#define SATA_REG_BASE 0x80000 -+#define MV_CESA_REG_BASE 0x3D000 -+#define MV_CESA_TDMA_REG_BASE 0x30000 -+#define MV_SDIO_REG_BASE 0x90000 -+#define MV_ETH_REG_BASE(port) (((port) == 0) ? 0x72000 : 0x76000) -+#define MV_UART_CHAN_BASE(chanNum) (0x12000 + (chanNum * 0x100)) -+#define DRAM_BASE 0x0 -+#define CNTMR_BASE 0x20300 -+#define TWSI_SLAVE_BASE(chanNum) 0x11000 -+#define PEX_IF_BASE(pexIf) 0x40000 -+#define MPP_REG_BASE 0x10000 -+#define TSU_GLOBAL_REG_BASE 0xB4000 -+#define MAX_AHB_TO_MBUS_REG_BASE 0x20000 -+ -+#define INTER_REGS_SIZE _1M -+/* This define describes the TWSI interrupt bit and location */ -+#define TWSI_CPU_MAIN_INT_CAUSE_REG 0x20200 -+#define TWSI0_CPU_MAIN_INT_BIT (1<<29) -+#define TWSI_SPEED 100000 -+ -+#define MV_GPP_MAX_GROUP 2 -+#define MV_CNTMR_MAX_COUNTER 2 -+#define MV_UART_MAX_CHAN 2 -+#define MV_XOR_MAX_UNIT 2 -+#define MV_XOR_MAX_CHAN 4 /* total channels for all units together*/ -+#define MV_XOR_MAX_CHAN_PER_UNIT 2 /* channels for units */ -+#define MV_SATA_MAX_CHAN 2 -+ -+#define MV_6281_MPP_MAX_MODULE 2 -+#define MV_6192_MPP_MAX_MODULE 1 -+#define MV_6190_MPP_MAX_MODULE 1 -+#define MV_6180_MPP_MAX_MODULE 2 -+#define MV_6281_MPP_MAX_GROUP 7 -+#define MV_6192_MPP_MAX_GROUP 4 -+#define MV_6190_MPP_MAX_GROUP 4 -+#define MV_6180_MPP_MAX_GROUP 3 -+ -+#define MV_DRAM_MAX_CS 4 -+ -+/* This define describes the maximum number of supported PCI\PCIX Interfaces*/ -+#define MV_PCI_MAX_IF 0 -+#define MV_PCI_START_IF 0 -+ -+/* This define describes the maximum number of supported PEX Interfaces */ -+#define MV_INCLUDE_PEX0 -+#define MV_DISABLE_PEX_DEVICE_BAR -+#define MV_PEX_MAX_IF 1 -+#define MV_PEX_START_IF MV_PCI_MAX_IF -+ -+/* This define describes the maximum number of supported PCI Interfaces */ -+#define MV_PCI_IF_MAX_IF (MV_PEX_MAX_IF+MV_PCI_MAX_IF) -+ -+#define MV_ETH_MAX_PORTS 2 -+#define MV_6281_ETH_MAX_PORTS 2 -+#define MV_6192_ETH_MAX_PORTS 2 -+#define MV_6190_ETH_MAX_PORTS 1 -+#define MV_6180_ETH_MAX_PORTS 1 -+ -+#define MV_IDMA_MAX_CHAN 0 -+ -+#define MV_USB_MAX_PORTS 1 -+ -+#define MV_USB_VERSION 1 -+ -+ -+#define MV_6281_NAND 1 -+#define MV_6192_NAND 1 -+#define MV_6190_NAND 1 -+#define MV_6180_NAND 0 -+ -+#define MV_6281_SDIO 1 -+#define MV_6192_SDIO 1 -+#define MV_6190_SDIO 1 -+#define MV_6180_SDIO 1 -+ -+#define MV_6281_TS 1 -+#define MV_6192_TS 1 -+#define MV_6190_TS 0 -+#define MV_6180_TS 0 -+ -+#define MV_6281_AUDIO 1 -+#define MV_6192_AUDIO 1 -+#define MV_6190_AUDIO 0 -+#define MV_6180_AUDIO 1 -+ -+#define MV_6281_TDM 1 -+#define MV_6192_TDM 1 -+#define MV_6190_TDM 0 -+#define MV_6180_TDM 0 -+ -+#define MV_DEVICE_MAX_CS 4 -+ -+/* Others */ -+#define PEX_HOST_BUS_NUM(pciIf) (pciIf) -+#define PEX_HOST_DEV_NUM(pciIf) 0 -+ -+#define PCI_IO(pciIf) (PEX0_IO) -+#define PCI_MEM(pciIf, memNum) (PEX0_MEM0) -+/* CESA version #2: One channel, 2KB SRAM, TDMA */ -+#if defined(MV_CESA_CHAIN_MODE_SUPPORT) -+ #define MV_CESA_VERSION 3 -+#else -+#define MV_CESA_VERSION 2 -+#endif -+#define MV_CESA_SRAM_SIZE 2*1024 -+/* This define describes the maximum number of supported Ethernet ports */ -+#define MV_ETH_VERSION 4 -+#define MV_ETH_MAX_RXQ 8 -+#define MV_ETH_MAX_TXQ 8 -+#define MV_ETH_PORT_SGMII { MV_FALSE, MV_FALSE } -+/* This define describes the the support of USB */ -+#define MV_USB_VERSION 1 -+ -+#define MV_INCLUDE_SDRAM_CS0 -+#define MV_INCLUDE_SDRAM_CS1 -+#define MV_INCLUDE_SDRAM_CS2 -+#define MV_INCLUDE_SDRAM_CS3 -+ -+#define MV_INCLUDE_DEVICE_CS0 -+#define MV_INCLUDE_DEVICE_CS1 -+#define MV_INCLUDE_DEVICE_CS2 -+#define MV_INCLUDE_DEVICE_CS3 -+ -+#define MPP_GROUP_1_TYPE {\ -+ {0, 0, 0}, /* Reserved for AUTO */ \ -+ {0x22220000, 0x22222222, 0x2222}, /* TDM */ \ -+ {0x44440000, 0x00044444, 0x0000}, /* AUDIO */ \ -+ {0x33330000, 0x33003333, 0x0033}, /* RGMII */ \ -+ {0x33330000, 0x03333333, 0x0033}, /* GMII */ \ -+ {0x11110000, 0x11111111, 0x0001}, /* TS */ \ -+ {0x33330000, 0x33333333, 0x3333} /* MII */ \ -+} -+ -+#define MPP_GROUP_2_TYPE {\ -+ {0, 0, 0}, /* Reserved for AUTO */ \ -+ {0x22220000, 0x22222222, 0x22}, /* TDM */ \ -+ {0x44440000, 0x00044444, 0x0}, /* AUDIO */ \ -+ {0, 0, 0}, /* N_A */ \ -+ {0, 0, 0}, /* N_A */ \ -+ {0x11110000, 0x11111111, 0x01} /* TS */ \ -+} -+ -+#ifndef MV_ASMLANGUAGE -+ -+/* This enumerator defines the Marvell Units ID */ -+typedef enum _mvUnitId -+{ -+ DRAM_UNIT_ID, -+ PEX_UNIT_ID, -+ ETH_GIG_UNIT_ID, -+ USB_UNIT_ID, -+ IDMA_UNIT_ID, -+ XOR_UNIT_ID, -+ SATA_UNIT_ID, -+ TDM_UNIT_ID, -+ UART_UNIT_ID, -+ CESA_UNIT_ID, -+ SPI_UNIT_ID, -+ AUDIO_UNIT_ID, -+ SDIO_UNIT_ID, -+ TS_UNIT_ID, -+ MAX_UNITS_ID -+ -+}MV_UNIT_ID; -+ -+#endif -+ -+#endif /* __INCmvCtrlEnvSpech */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.c -new file mode 100644 -index 0000000..d22c4fc ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.c -@@ -0,0 +1,1048 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+/* includes */ -+#include "ctrlEnv/sys/mvAhbToMbus.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+#undef MV_DEBUG -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+/* typedefs */ -+ -+ -+/* CPU address remap registers offsets are inconsecutive. This struct */ -+/* describes address remap register offsets */ -+typedef struct _ahbToMbusRemapRegOffs -+{ -+ MV_U32 lowRegOffs; /* Low 32-bit remap register offset */ -+ MV_U32 highRegOffs; /* High 32 bit remap register offset */ -+}AHB_TO_MBUS_REMAP_REG_OFFS; -+ -+/* locals */ -+static MV_STATUS ahbToMbusRemapRegOffsGet (MV_U32 winNum, -+ AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs); -+ -+/******************************************************************************* -+* mvAhbToMbusInit - Initialize Ahb To Mbus Address Map ! -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK laways. -+* -+*******************************************************************************/ -+MV_STATUS mvAhbToMbusInit(void) -+{ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvAhbToMbusWinSet - Set CPU-to-peripheral winNum address window -+* -+* DESCRIPTION: -+* This function sets -+* address window, also known as address decode window. -+* A new address decode window is set for specified winNum address window. -+* If address decode window parameter structure enables the window, -+* the routine will also enable the winNum window, allowing CPU to access -+* the winNum window. -+* -+* INPUT: -+* winNum - Windows number. -+* pAddrDecWin - CPU winNum window data structure. -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_OK if CPU winNum window was set correctly, MV_ERROR in case of -+* address window overlapps with other active CPU winNum window or -+* trying to assign 36bit base address while CPU does not support that. -+* The function returns MV_NOT_SUPPORTED, if the winNum is unsupported. -+* -+*******************************************************************************/ -+MV_STATUS mvAhbToMbusWinSet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttribs; -+ MV_DEC_REGS decRegs; -+ -+ /* Parameter checking */ -+ if (winNum >= MAX_AHB_TO_MBUS_WINS) -+ { -+ mvOsPrintf("mvAhbToMbusWinSet: ERR. Invalid winNum %d\n", winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ -+ /* read base register*/ -+ if (winNum != MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum)); -+ } -+ else -+ { -+ decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_INTEREG_REG); -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvAhbToMbusWinSet:Error setting AHB to MBUS window %d to "\ -+ "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, -+ mvCtrlTargetNameGet(pAddrDecWin->target), -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ /* read control register*/ -+ if (winNum != MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ decRegs.sizeReg = MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum)); -+ } -+ -+ if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs)) -+ { -+ mvOsPrintf("mvAhbToMbusWinSet:mvCtrlAddrDecToReg Failed\n"); -+ return MV_ERROR; -+ } -+ -+ /* enable\Disable */ -+ if (MV_TRUE == pAddrDecWin->enable) -+ { -+ decRegs.sizeReg |= ATMWCR_WIN_ENABLE; -+ } -+ else -+ { -+ decRegs.sizeReg &= ~ATMWCR_WIN_ENABLE; -+ } -+ -+ mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs); -+ -+ /* set attributes */ -+ decRegs.sizeReg &= ~ATMWCR_WIN_ATTR_MASK; -+ decRegs.sizeReg |= targetAttribs.attrib << ATMWCR_WIN_ATTR_OFFS; -+ /* set target ID */ -+ decRegs.sizeReg &= ~ATMWCR_WIN_TARGET_MASK; -+ decRegs.sizeReg |= targetAttribs.targetId << ATMWCR_WIN_TARGET_OFFS; -+ -+#if !defined(MV_RUN_FROM_FLASH) -+ /* To be on the safe side we disable the window before writing the */ -+ /* new values. */ -+ if (winNum != MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ mvAhbToMbusWinEnable(winNum,MV_FALSE); -+ } -+#endif -+ -+ /* 3) Write to address decode Base Address Register */ -+ if (winNum != MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_BASE_REG(winNum), decRegs.baseReg); -+ } -+ else -+ { -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_INTEREG_REG, decRegs.baseReg); -+ } -+ -+ -+ /* Internal register space have no size */ -+ /* register. Do not perform size register assigment for those targets */ -+ if (winNum != MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ /* Write to address decode Size Register */ -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), decRegs.sizeReg); -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvAhbToMbusWinGet - Get CPU-to-peripheral winNum address window -+* -+* DESCRIPTION: -+* Get the CPU peripheral winNum address window. -+* -+* INPUT: -+* winNum - Peripheral winNum enumerator -+* -+* OUTPUT: -+* pAddrDecWin - CPU winNum window information data structure. -+* -+* RETURN: -+* MV_OK if winNum exist, MV_ERROR otherwise. -+* -+*******************************************************************************/ -+MV_STATUS mvAhbToMbusWinGet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin) -+{ -+ MV_DEC_REGS decRegs; -+ MV_TARGET_ATTRIB targetAttrib; -+ -+ -+ /* Parameter checking */ -+ if (winNum >= MAX_AHB_TO_MBUS_WINS) -+ { -+ mvOsPrintf("mvAhbToMbusWinGet: ERR. Invalid winNum %d\n", winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ -+ /* Internal register space size have no size register*/ -+ if (winNum != MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ decRegs.sizeReg = MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum)); -+ } -+ else -+ { -+ decRegs.sizeReg = 0; -+ } -+ -+ -+ /* Read base and size */ -+ if (winNum != MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum)); -+ } -+ else -+ { -+ decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_INTEREG_REG); -+ } -+ -+ -+ -+ if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin))) -+ { -+ mvOsPrintf("mvAhbToMbusWinGet: mvCtrlRegToAddrDec Failed \n"); -+ return MV_ERROR; -+ } -+ -+ if (winNum == MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ pAddrDecWin->addrWin.size = INTER_REGS_SIZE; -+ pAddrDecWin->target = INTER_REGS; -+ pAddrDecWin->enable = MV_TRUE; -+ -+ return MV_OK; -+ } -+ -+ -+ if (decRegs.sizeReg & ATMWCR_WIN_ENABLE) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ -+ } -+ -+ -+ -+ if (-1 == pAddrDecWin->addrWin.size) -+ { -+ return MV_ERROR; -+ } -+ -+ /* attrib and targetId */ -+ targetAttrib.attrib = (decRegs.sizeReg & ATMWCR_WIN_ATTR_MASK) >> -+ ATMWCR_WIN_ATTR_OFFS; -+ targetAttrib.targetId = (decRegs.sizeReg & ATMWCR_WIN_TARGET_MASK) >> -+ ATMWCR_WIN_TARGET_OFFS; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvAhbToMbusWinTargetGet - Get Window number associated with target -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_U32 mvAhbToMbusWinTargetGet(MV_TARGET target) -+{ -+ MV_AHB_TO_MBUS_DEC_WIN decWin; -+ MV_U32 winNum; -+ -+ /* Check parameters */ -+ if (target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetGet: target %d is Illigal\n", target); -+ return 0xffffffff; -+ } -+ -+ if (INTER_REGS == target) -+ { -+ return MV_AHB_TO_MBUS_INTREG_WIN; -+ } -+ -+ for (winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS ; winNum++) -+ { -+ if (winNum == MV_AHB_TO_MBUS_INTREG_WIN) -+ continue; -+ -+ if (mvAhbToMbusWinGet(winNum,&decWin) != MV_OK) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetGet: mvAhbToMbusWinGet fail\n"); -+ return 0xffffffff; -+ -+ } -+ -+ if (decWin.enable == MV_TRUE) -+ { -+ if (decWin.target == target) -+ { -+ return winNum; -+ } -+ -+ } -+ -+ } -+ -+ return 0xFFFFFFFF; -+ -+ -+} -+ -+/******************************************************************************* -+* mvAhbToMbusWinAvailGet - Get First Available window number. -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_U32 mvAhbToMbusWinAvailGet(MV_VOID) -+{ -+ MV_AHB_TO_MBUS_DEC_WIN decWin; -+ MV_U32 winNum; -+ -+ for (winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS ; winNum++) -+ { -+ if (winNum == MV_AHB_TO_MBUS_INTREG_WIN) -+ continue; -+ -+ if (mvAhbToMbusWinGet(winNum,&decWin) != MV_OK) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetGet: mvAhbToMbusWinGet fail\n"); -+ return 0xffffffff; -+ -+ } -+ -+ if (decWin.enable == MV_FALSE) -+ { -+ return winNum; -+ } -+ -+ } -+ -+ return 0xFFFFFFFF; -+} -+ -+ -+/******************************************************************************* -+* mvAhbToMbusWinEnable - Enable/disable a CPU address decode window -+* -+* DESCRIPTION: -+* This function enable/disable a CPU address decode window. -+* if parameter 'enable' == MV_TRUE the routine will enable the -+* window, thus enabling CPU accesses (before enabling the window it is -+* tested for overlapping). Otherwise, the window will be disabled. -+* -+* INPUT: -+* winNum - Peripheral winNum enumerator. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_ERROR if protection window number was wrong, or the window -+* overlapps other winNum window. -+* -+*******************************************************************************/ -+MV_STATUS mvAhbToMbusWinEnable(MV_U32 winNum, MV_BOOL enable) -+{ -+ -+ /* Parameter checking */ -+ if (winNum >= MAX_AHB_TO_MBUS_WINS) -+ { -+ mvOsPrintf("mvAhbToMbusWinEnable: ERR. Invalid winNum %d\n", winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ /* Internal registers bar can't be disable or enabled */ -+ if (winNum == MV_AHB_TO_MBUS_INTREG_WIN) -+ { -+ return (enable ? MV_OK : MV_ERROR); -+ } -+ -+ if (enable == MV_TRUE) -+ { -+ /* enable the window */ -+ MV_REG_BIT_SET(AHB_TO_MBUS_WIN_CTRL_REG(winNum), ATMWCR_WIN_ENABLE); -+ } -+ else -+ { /* Disable address decode winNum window */ -+ MV_REG_BIT_RESET(AHB_TO_MBUS_WIN_CTRL_REG(winNum), ATMWCR_WIN_ENABLE); -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvAhbToMbusWinRemap - Set CPU remap register for address windows. -+* -+* DESCRIPTION: -+* After a CPU address hits one of PCI address decode windows there is an -+* option to remap the address to a different one. For example, CPU -+* executes a read from PCI winNum window address 0x1200.0000. This -+* can be modified so the address on the PCI bus would be 0x1400.0000 -+* Using the PCI address remap mechanism. -+* -+* INPUT: -+* winNum - Peripheral winNum enumerator. Must be a PCI winNum. -+* pAddrDecWin - CPU winNum window information data structure. -+* Note that caller has to fill in the base field only. The -+* size field is ignored. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if winNum is not a PCI one, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_U32 mvAhbToMbusWinRemap(MV_U32 winNum, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 baseAddr; -+ AHB_TO_MBUS_REMAP_REG_OFFS remapRegOffs; -+ -+ MV_U32 effectiveBaseAddress=0, -+ baseAddrValue=0,windowSizeValue=0; -+ -+ -+ /* Get registers offsets of given winNum */ -+ if (MV_NO_SUCH == ahbToMbusRemapRegOffsGet(winNum, &remapRegOffs)) -+ { -+ return 0xffffffff; -+ } -+ -+ /* 1) Set address remap low */ -+ baseAddr = pAddrWin->baseLow; -+ -+ /* Check base address aligment */ -+ /* -+ if (MV_IS_NOT_ALIGN(baseAddr, ATMWRLR_REMAP_LOW_ALIGNMENT)) -+ { -+ mvOsPrintf("mvAhbToMbusPciRemap: Warning. Target base 0x%x unaligned\n", -+ baseAddr); -+ return MV_ERROR; -+ } -+ */ -+ -+ /* BaseLow[31:16] => base register [31:16] */ -+ baseAddr = baseAddr & ATMWRLR_REMAP_LOW_MASK; -+ -+ MV_REG_WRITE(remapRegOffs.lowRegOffs, baseAddr); -+ -+ MV_REG_WRITE(remapRegOffs.highRegOffs, pAddrWin->baseHigh); -+ -+ -+ baseAddrValue = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum)); -+ windowSizeValue = MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum)); -+ -+ baseAddrValue &= ATMWBR_BASE_MASK; -+ windowSizeValue &=ATMWCR_WIN_SIZE_MASK; -+ -+ /* Start calculating the effective Base Address */ -+ effectiveBaseAddress = baseAddrValue ; -+ -+ /* The effective base address will be combined from the chopped (if any) -+ remap value (according to the size value and remap mechanism) and the -+ window's base address */ -+ effectiveBaseAddress |= (((windowSizeValue) | 0xffff) & pAddrWin->baseLow); -+ /* If the effectiveBaseAddress exceed the window boundaries return an -+ invalid value. */ -+ -+ if (effectiveBaseAddress > (baseAddrValue + (windowSizeValue | 0xffff))) -+ { -+ mvOsPrintf("mvAhbToMbusPciRemap: Error\n"); -+ return 0xffffffff; -+ } -+ -+ return effectiveBaseAddress; -+ -+ -+} -+/******************************************************************************* -+* mvAhbToMbusWinTargetSwap - Swap AhbToMbus windows between targets -+* -+* DESCRIPTION: -+* -+* INPUT: -+* target1 - CPU Interface target 1 -+* target2 - CPU Interface target 2 -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if targets are illigal, or if one of the targets is not -+* associated to a valid window . -+* MV_OK otherwise. -+* -+*******************************************************************************/ -+ -+ -+MV_STATUS mvAhbToMbusWinTargetSwap(MV_TARGET target1,MV_TARGET target2) -+{ -+ MV_U32 winNum1,winNum2; -+ MV_AHB_TO_MBUS_DEC_WIN winDec1,winDec2,winDecTemp; -+ AHB_TO_MBUS_REMAP_REG_OFFS remapRegs1,remapRegs2; -+ MV_U32 remapBaseLow1=0,remapBaseLow2=0; -+ MV_U32 remapBaseHigh1=0,remapBaseHigh2=0; -+ -+ -+ /* Check parameters */ -+ if (target1 >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d is Illigal\n", target1); -+ return MV_ERROR; -+ } -+ -+ if (target2 >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d is Illigal\n", target1); -+ return MV_ERROR; -+ } -+ -+ -+ /* get window associated with this target */ -+ winNum1 = mvAhbToMbusWinTargetGet(target1); -+ -+ if (winNum1 == 0xffffffff) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d has illigal win %d\n", -+ target1,winNum1); -+ return MV_ERROR; -+ -+ } -+ -+ /* get window associated with this target */ -+ winNum2 = mvAhbToMbusWinTargetGet(target2); -+ -+ if (winNum2 == 0xffffffff) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d has illigal win %d\n", -+ target2,winNum2); -+ return MV_ERROR; -+ -+ } -+ -+ /* now Get original values of both Windows */ -+ if (MV_OK != mvAhbToMbusWinGet(winNum1,&winDec1)) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetSwap: mvAhbToMbusWinGet failed win %d\n", -+ winNum1); -+ return MV_ERROR; -+ -+ } -+ if (MV_OK != mvAhbToMbusWinGet(winNum2,&winDec2)) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetSwap: mvAhbToMbusWinGet failed win %d\n", -+ winNum2); -+ return MV_ERROR; -+ -+ } -+ -+ -+ /* disable both windows */ -+ if (MV_OK != mvAhbToMbusWinEnable(winNum1,MV_FALSE)) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetSwap: failed to enable window %d\n", -+ winNum1); -+ return MV_ERROR; -+ -+ } -+ if (MV_OK != mvAhbToMbusWinEnable(winNum2,MV_FALSE)) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetSwap: failed to enable windo %d\n", -+ winNum2); -+ return MV_ERROR; -+ -+ } -+ -+ -+ /* now swap targets */ -+ -+ /* first save winDec2 values */ -+ winDecTemp.addrWin.baseHigh = winDec2.addrWin.baseHigh; -+ winDecTemp.addrWin.baseLow = winDec2.addrWin.baseLow; -+ winDecTemp.addrWin.size = winDec2.addrWin.size; -+ winDecTemp.enable = winDec2.enable; -+ winDecTemp.target = winDec2.target; -+ -+ /* winDec2 = winDec1 */ -+ winDec2.addrWin.baseHigh = winDec1.addrWin.baseHigh; -+ winDec2.addrWin.baseLow = winDec1.addrWin.baseLow; -+ winDec2.addrWin.size = winDec1.addrWin.size; -+ winDec2.enable = winDec1.enable; -+ winDec2.target = winDec1.target; -+ -+ -+ /* winDec1 = winDecTemp */ -+ winDec1.addrWin.baseHigh = winDecTemp.addrWin.baseHigh; -+ winDec1.addrWin.baseLow = winDecTemp.addrWin.baseLow; -+ winDec1.addrWin.size = winDecTemp.addrWin.size; -+ winDec1.enable = winDecTemp.enable; -+ winDec1.target = winDecTemp.target; -+ -+ -+ /* now set the new values */ -+ -+ -+ mvAhbToMbusWinSet(winNum1,&winDec1); -+ mvAhbToMbusWinSet(winNum2,&winDec2); -+ -+ -+ -+ -+ -+ /* now we will treat the remap windows if exist */ -+ -+ -+ /* now check if one or both windows has a remap window -+ as well after the swap ! */ -+ -+ /* if a window had a remap value differnt than the base value -+ before the swap , then after the swap the remap value will be -+ equal to the base value unless both windows has a remap windows*/ -+ -+ /* first get old values */ -+ if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum1,&remapRegs1)) -+ { -+ remapBaseLow1 = MV_REG_READ(remapRegs1.lowRegOffs); -+ remapBaseHigh1 = MV_REG_READ(remapRegs1.highRegOffs); -+ -+ } -+ if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2)) -+ { -+ remapBaseLow2 = MV_REG_READ(remapRegs2.lowRegOffs); -+ remapBaseHigh2 = MV_REG_READ(remapRegs2.highRegOffs); -+ -+ -+ } -+ -+ /* now do the swap */ -+ if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum1,&remapRegs1)) -+ { -+ if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2)) -+ { -+ /* Two windows has a remap !!! so swap */ -+ -+ MV_REG_WRITE(remapRegs2.highRegOffs,remapBaseHigh1); -+ MV_REG_WRITE(remapRegs2.lowRegOffs,remapBaseLow1); -+ -+ MV_REG_WRITE(remapRegs1.highRegOffs,remapBaseHigh2); -+ MV_REG_WRITE(remapRegs1.lowRegOffs,remapBaseLow2); -+ -+ -+ -+ } -+ else -+ { -+ /* remap == base */ -+ MV_REG_WRITE(remapRegs1.highRegOffs,winDec1.addrWin.baseHigh); -+ MV_REG_WRITE(remapRegs1.lowRegOffs,winDec1.addrWin.baseLow); -+ -+ } -+ -+ } -+ else if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2)) -+ { -+ /* remap == base */ -+ MV_REG_WRITE(remapRegs2.highRegOffs,winDec2.addrWin.baseHigh); -+ MV_REG_WRITE(remapRegs2.lowRegOffs,winDec2.addrWin.baseLow); -+ -+ } -+ -+ -+ -+ return MV_OK; -+ -+ -+} -+ -+ -+ -+#if defined(MV_88F1181) -+ -+/******************************************************************************* -+* mvAhbToMbusXbarCtrlSet - Set The CPU master Xbar arbitration. -+* -+* DESCRIPTION: -+* This function sets CPU Mbus Arbiter -+* -+* INPUT: -+* pPizzaArbArray - A priority Structure describing 16 "pizza slices". At -+* each clock cycle, the crossbar arbiter samples all -+* requests and gives the bus to the next agent according -+* to the "pizza". -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_ERROR if paramers to function invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvMbusArbSet(MV_MBUS_ARB_TARGET *pPizzaArbArray) -+{ -+ MV_U32 sliceNum; -+ MV_U32 xbarCtrl = 0; -+ MV_MBUS_ARB_TARGET xbarTarget; -+ -+ /* 1) Set crossbar control low register */ -+ for (sliceNum = 0; sliceNum < MRLR_SLICE_NUM; sliceNum++) -+ { -+ xbarTarget = pPizzaArbArray[sliceNum]; -+ -+ /* sliceNum parameter check */ -+ if (xbarTarget > MAX_MBUS_ARB_TARGETS) -+ { -+ mvOsPrintf("mvAhbToMbusXbarCtrlSet: ERR. Can't set Target %d\n", -+ xbarTarget); -+ return MV_ERROR; -+ } -+ xbarCtrl |= (xbarTarget << MRLR_LOW_ARB_OFFS(sliceNum)); -+ } -+ /* Write to crossbar control low register */ -+ MV_REG_WRITE(MBUS_ARBITER_LOW_REG, xbarCtrl); -+ -+ xbarCtrl = 0; -+ -+ /* 2) Set crossbar control high register */ -+ for (sliceNum = MRLR_SLICE_NUM; -+ sliceNum < MRLR_SLICE_NUM+MRHR_SLICE_NUM; -+ sliceNum++) -+ { -+ -+ xbarTarget = pPizzaArbArray[sliceNum]; -+ -+ /* sliceNum parameter check */ -+ if (xbarTarget > MAX_MBUS_ARB_TARGETS) -+ { -+ mvOsPrintf("mvAhbToMbusXbarCtrlSet: ERR. Can't set Target %d\n", -+ xbarTarget); -+ return MV_ERROR; -+ } -+ xbarCtrl |= (xbarTarget << MRHR_HIGH_ARB_OFFS(sliceNum)); -+ } -+ /* Write to crossbar control high register */ -+ MV_REG_WRITE(MBUS_ARBITER_HIGH_REG, xbarCtrl); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvMbusArbCtrlSet - Set MBus Arbiter control register -+* -+* DESCRIPTION: -+* -+* INPUT: -+* ctrl - pointer to MV_MBUS_ARB_CTRL register -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_ERROR if paramers to function invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvMbusArbCtrlSet(MV_MBUS_ARB_CTRL *ctrl) -+{ -+ -+ if (ctrl->highPrio == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(MBUS_ARBITER_CTRL_REG, MACR_ARB_ARM_TOP); -+ } -+ else -+ { -+ MV_REG_BIT_SET(MBUS_ARBITER_CTRL_REG, MACR_ARB_ARM_TOP); -+ } -+ -+ if (ctrl->fixedRoundRobin == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(MBUS_ARBITER_CTRL_REG, MACR_ARB_TARGET_FIXED); -+ } -+ else -+ { -+ MV_REG_BIT_SET(MBUS_ARBITER_CTRL_REG, MACR_ARB_TARGET_FIXED); -+ } -+ -+ if (ctrl->starvEn == MV_FALSE) -+ { -+ MV_REG_BIT_RESET(MBUS_ARBITER_CTRL_REG, MACR_ARB_REQ_CTRL_EN); -+ } -+ else -+ { -+ MV_REG_BIT_SET(MBUS_ARBITER_CTRL_REG, MACR_ARB_REQ_CTRL_EN); -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvMbusArbCtrlGet - Get MBus Arbiter control register -+* -+* DESCRIPTION: -+* -+* INPUT: -+* ctrl - pointer to MV_MBUS_ARB_CTRL register -+* -+* OUTPUT: -+* ctrl - pointer to MV_MBUS_ARB_CTRL register -+* -+* RETURN: -+* MV_ERROR if paramers to function invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvMbusArbCtrlGet(MV_MBUS_ARB_CTRL *ctrl) -+{ -+ -+ MV_U32 ctrlReg = MV_REG_READ(MBUS_ARBITER_CTRL_REG); -+ -+ if (ctrlReg & MACR_ARB_ARM_TOP) -+ { -+ ctrl->highPrio = MV_TRUE; -+ } -+ else -+ { -+ ctrl->highPrio = MV_FALSE; -+ } -+ -+ if (ctrlReg & MACR_ARB_TARGET_FIXED) -+ { -+ ctrl->fixedRoundRobin = MV_TRUE; -+ } -+ else -+ { -+ ctrl->fixedRoundRobin = MV_FALSE; -+ } -+ -+ if (ctrlReg & MACR_ARB_REQ_CTRL_EN) -+ { -+ ctrl->starvEn = MV_TRUE; -+ } -+ else -+ { -+ ctrl->starvEn = MV_FALSE; -+ } -+ -+ -+ return MV_OK; -+} -+ -+#endif /* #if defined(MV_88F1181) */ -+ -+ -+ -+/******************************************************************************* -+* ahbToMbusRemapRegOffsGet - Get CPU address remap register offsets -+* -+* DESCRIPTION: -+* CPU to PCI address remap registers offsets are inconsecutive. -+* This function returns PCI address remap registers offsets. -+* -+* INPUT: -+* winNum - Address decode window number. See MV_U32 enumerator. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if winNum is not a PCI one. -+* -+*******************************************************************************/ -+static MV_STATUS ahbToMbusRemapRegOffsGet(MV_U32 winNum, -+ AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs) -+{ -+ switch (winNum) -+ { -+ case 0: -+ case 1: -+ pRemapRegs->lowRegOffs = AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum); -+ pRemapRegs->highRegOffs = AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum); -+ break; -+ case 2: -+ case 3: -+ if((mvCtrlModelGet() == MV_5281_DEV_ID) || -+ (mvCtrlModelGet() == MV_1281_DEV_ID) || -+ (mvCtrlModelGet() == MV_6183_DEV_ID) || -+ (mvCtrlModelGet() == MV_6183L_DEV_ID)) -+ { -+ pRemapRegs->lowRegOffs = AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum); -+ pRemapRegs->highRegOffs = AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum); -+ break; -+ } -+ else -+ { -+ pRemapRegs->lowRegOffs = 0; -+ pRemapRegs->highRegOffs = 0; -+ -+ DB(mvOsPrintf("ahbToMbusRemapRegOffsGet: ERR. Invalid winNum %d\n", -+ winNum)); -+ return MV_NO_SUCH; -+ } -+ default: -+ { -+ pRemapRegs->lowRegOffs = 0; -+ pRemapRegs->highRegOffs = 0; -+ -+ DB(mvOsPrintf("ahbToMbusRemapRegOffsGet: ERR. Invalid winNum %d\n", -+ winNum)); -+ return MV_NO_SUCH; -+ } -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvAhbToMbusAddDecShow - Print the AHB to MBus bridge address decode map. -+* -+* DESCRIPTION: -+* This function print the CPU address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvAhbToMbusAddDecShow(MV_VOID) -+{ -+ MV_AHB_TO_MBUS_DEC_WIN win; -+ MV_U32 winNum; -+ mvOsOutput( "\n" ); -+ mvOsOutput( "AHB To MBUS Bridge:\n" ); -+ mvOsOutput( "-------------------\n" ); -+ -+ for( winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS; winNum++ ) -+ { -+ memset( &win, 0, sizeof(MV_AHB_TO_MBUS_DEC_WIN) ); -+ -+ mvOsOutput( "win%d - ", winNum ); -+ -+ if( mvAhbToMbusWinGet( winNum, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ mvOsOutput( "%s base %08x, ", -+ mvCtrlTargetNameGet(win.target), win.addrWin.baseLow ); -+ mvOsOutput( "...." ); -+ mvSizePrint( win.addrWin.size ); -+ -+ mvOsOutput( "\n" ); -+ -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+ -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.h -new file mode 100644 -index 0000000..a1d93b7 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbus.h -@@ -0,0 +1,130 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvAhbToMbush -+#define __INCmvAhbToMbush -+ -+/* includes */ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/sys/mvAhbToMbusRegs.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+/* defines */ -+ -+#if defined(MV_88F1181) -+/* This enumerator defines the Marvell controller possible MBUS arbiter */ -+/* target ports. It is used to define crossbar priority scheame (pizza) */ -+typedef enum _mvMBusArbTargetId -+{ -+ DRAM_MBUS_ARB_TARGET = 0, /* Port 0 -> DRAM interface */ -+ TWSI_MBUS_ARB_TARGET = 1, /* Port 1 -> TWSI */ -+ ARM_MBUS_ARB_TARGET = 2, /* Port 2 -> ARM */ -+ PEX1_MBUS_ARB_TARGET = 3, /* Port 3 -> PCI Express 1 */ -+ PEX0_MBUS_ARB_TARGET = 4, /* Port 4 -> PCI Express0 */ -+ MAX_MBUS_ARB_TARGETS -+}MV_MBUS_ARB_TARGET; -+ -+typedef struct _mvMBusArbCtrl -+{ -+ MV_BOOL starvEn; -+ MV_BOOL highPrio; -+ MV_BOOL fixedRoundRobin; -+ -+}MV_MBUS_ARB_CTRL; -+ -+#endif /* #if defined(MV_88F1181) */ -+ -+typedef struct _mvAhbtoMbusDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+}MV_AHB_TO_MBUS_DEC_WIN; -+ -+/* mvAhbToMbus.h API list */ -+ -+MV_STATUS mvAhbToMbusInit(MV_VOID); -+MV_STATUS mvAhbToMbusWinSet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin); -+MV_STATUS mvAhbToMbusWinGet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin); -+MV_STATUS mvAhbToMbusWinEnable(MV_U32 winNum,MV_BOOL enable); -+MV_U32 mvAhbToMbusWinRemap(MV_U32 winNum, MV_ADDR_WIN *pAddrDecWin); -+MV_U32 mvAhbToMbusWinTargetGet(MV_TARGET target); -+MV_U32 mvAhbToMbusWinAvailGet(MV_VOID); -+MV_STATUS mvAhbToMbusWinTargetSwap(MV_TARGET target1,MV_TARGET target2); -+ -+#if defined(MV_88F1181) -+ -+MV_STATUS mvMbusArbSet(MV_MBUS_ARB_TARGET *pPizzaArbArray); -+MV_STATUS mvMbusArbCtrlSet(MV_MBUS_ARB_CTRL *ctrl); -+MV_STATUS mvMbusArbCtrlGet(MV_MBUS_ARB_CTRL *ctrl); -+ -+#endif /* #if defined(MV_88F1181) */ -+ -+ -+MV_VOID mvAhbToMbusAddDecShow(MV_VOID); -+ -+ -+#endif /* __INCmvAhbToMbush */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbusRegs.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbusRegs.h -new file mode 100644 -index 0000000..c5682e8 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvAhbToMbusRegs.h -@@ -0,0 +1,143 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvAhbToMbusRegsh -+#define __INCmvAhbToMbusRegsh -+ -+/******************************/ -+/* ARM Address Map Registers */ -+/******************************/ -+ -+#define MAX_AHB_TO_MBUS_WINS 9 -+#define MV_AHB_TO_MBUS_INTREG_WIN 8 -+ -+ -+#define AHB_TO_MBUS_WIN_CTRL_REG(winNum) (0x20000 + (winNum)*0x10) -+#define AHB_TO_MBUS_WIN_BASE_REG(winNum) (0x20004 + (winNum)*0x10) -+#define AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum) (0x20008 + (winNum)*0x10) -+#define AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum) (0x2000C + (winNum)*0x10) -+#define AHB_TO_MBUS_WIN_INTEREG_REG 0x20080 -+ -+/* Window Control Register */ -+/* AHB_TO_MBUS_WIN_CTRL_REG (ATMWCR)*/ -+#define ATMWCR_WIN_ENABLE BIT0 /* Window Enable */ -+ -+#define ATMWCR_WIN_TARGET_OFFS 4 /* The target interface associated -+ with this window*/ -+#define ATMWCR_WIN_TARGET_MASK (0xf << ATMWCR_WIN_TARGET_OFFS) -+ -+#define ATMWCR_WIN_ATTR_OFFS 8 /* The target interface attributes -+ Associated with this window */ -+#define ATMWCR_WIN_ATTR_MASK (0xff << ATMWCR_WIN_ATTR_OFFS) -+ -+ -+/* -+Used with the Base register to set the address window size and location -+Must be programed from LSB to MSB as sequence of 1’s followed -+by sequence of 0’s. The number of 1’s specifies the size of the window -+in 64 KB granularity (e.g. a value of 0x00FF specifies 256 = 16 MB). -+ -+NOTE: A value of 0x0 specifies 64KB size. -+*/ -+#define ATMWCR_WIN_SIZE_OFFS 16 /* Window Size */ -+#define ATMWCR_WIN_SIZE_MASK (0xffff << ATMWCR_WIN_SIZE_OFFS) -+#define ATMWCR_WIN_SIZE_ALIGNMENT 0x10000 -+ -+/* Window Base Register */ -+/* AHB_TO_MBUS_WIN_BASE_REG (ATMWBR) */ -+ -+/* -+Used with the size field to set the address window size and location. -+Corresponds to transaction address[31:16] -+*/ -+#define ATMWBR_BASE_OFFS 16 /* Base Address */ -+#define ATMWBR_BASE_MASK (0xffff << ATMWBR_BASE_OFFS) -+#define ATMWBR_BASE_ALIGNMENT 0x10000 -+ -+/* Window Remap Low Register */ -+/* AHB_TO_MBUS_WIN_REMAP_LOW_REG (ATMWRLR) */ -+ -+/* -+Used with the size field to specifies address bits[31:0] to be driven to -+the target interface.: -+target_addr[31:16] = (addr[31:16] & size[15:0]) | (remap[31:16] & ~size[15:0]) -+*/ -+#define ATMWRLR_REMAP_LOW_OFFS 16 /* Remap Address */ -+#define ATMWRLR_REMAP_LOW_MASK (0xffff << ATMWRLR_REMAP_LOW_OFFS) -+#define ATMWRLR_REMAP_LOW_ALIGNMENT 0x10000 -+ -+/* Window Remap High Register */ -+/* AHB_TO_MBUS_WIN_REMAP_HIGH_REG (ATMWRHR) */ -+ -+/* -+Specifies address bits[63:32] to be driven to the target interface. -+target_addr[63:32] = (RemapHigh[31:0] -+*/ -+#define ATMWRHR_REMAP_HIGH_OFFS 0 /* Remap Address */ -+#define ATMWRHR_REMAP_HIGH_MASK (0xffffffff << ATMWRHR_REMAP_HIGH_OFFS) -+ -+ -+#endif /* __INCmvAhbToMbusRegsh */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.c -new file mode 100644 -index 0000000..396f003 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.c -@@ -0,0 +1,1036 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+/* includes */ -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "ctrlEnv/sys/mvAhbToMbusRegs.h" -+#include "cpu/mvCpu.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "mvSysHwConfig.h" -+#include "mvSysDram.h" -+ -+/*#define MV_DEBUG*/ -+/* defines */ -+ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+/* locals */ -+/* static functions */ -+static MV_BOOL cpuTargetWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin); -+ -+MV_TARGET * sampleAtResetTargetArray; -+MV_TARGET sampleAtResetTargetArrayP[] = BOOT_TARGETS_NAME_ARRAY; -+MV_TARGET sampleAtResetTargetArray6180P[] = BOOT_TARGETS_NAME_ARRAY_6180; -+/******************************************************************************* -+* mvCpuIfInit - Initialize Controller CPU interface -+* -+* DESCRIPTION: -+* This function initialize Controller CPU interface: -+* 1. Set CPU interface configuration registers. -+* 2. Set CPU master Pizza arbiter control according to static -+* configuration described in configuration file. -+* 3. Opens CPU address decode windows. DRAM windows are assumed to be -+* already set (auto detection). -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvCpuIfInit(MV_CPU_DEC_WIN *cpuAddrWinMap) -+{ -+ MV_U32 regVal; -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; -+ -+ if (cpuAddrWinMap == NULL) -+ { -+ DB(mvOsPrintf("mvCpuIfInit:ERR. cpuAddrWinMap == NULL\n")); -+ return MV_ERROR; -+ } -+ -+ /*Initialize the boot target array according to device type*/ -+ if(mvCtrlModelGet() == MV_6180_DEV_ID) -+ sampleAtResetTargetArray = sampleAtResetTargetArray6180P; -+ else -+ sampleAtResetTargetArray = sampleAtResetTargetArrayP; -+ -+ /* Set ARM Configuration register */ -+ regVal = MV_REG_READ(CPU_CONFIG_REG); -+ regVal &= ~CPU_CONFIG_DEFAULT_MASK; -+ regVal |= CPU_CONFIG_DEFAULT; -+ MV_REG_WRITE(CPU_CONFIG_REG,regVal); -+ -+ /* First disable all CPU target windows */ -+ for (target = 0; cpuAddrWinMap[target].enable != TBL_TERM; target++) -+ { -+ if ((MV_TARGET_IS_DRAM(target))||(target == INTER_REGS)) -+ { -+ continue; -+ } -+ -+#if defined(MV_MEM_OVER_PCI_WA) || defined(MV_UART_OVER_PCI_WA) -+ /* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */ -+ if (MV_TARGET_IS_PCI(target)) -+ { -+ continue; -+ } -+#endif -+ -+#if defined(MV_MEM_OVER_PEX_WA) || defined(MV_UART_OVER_PEX_WA) -+ /* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */ -+ if (MV_TARGET_IS_PEX(target)) -+ { -+ continue; -+ } -+#endif -+#if defined(MV_RUN_FROM_FLASH) -+ /* Don't disable the boot device. */ -+ if (target == DEV_BOOCS) -+ { -+ continue; -+ } -+#endif /* MV_RUN_FROM_FLASH */ -+ mvCpuIfTargetWinEnable(MV_CHANGE_BOOT_CS(target),MV_FALSE); -+ } -+ -+#if defined(MV_RUN_FROM_FLASH) -+ /* Resize the bootcs windows before other windows, because this */ -+ /* window is enabled and will cause an overlap if not resized. */ -+ target = DEV_BOOCS; -+ -+ if (MV_OK != mvCpuIfTargetWinSet(target, &cpuAddrWinMap[target])) -+ { -+ DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinSet fail\n")); -+ return MV_ERROR; -+ } -+ -+ addrWin.baseLow = cpuAddrWinMap[target].addrWin.baseLow; -+ addrWin.baseHigh = cpuAddrWinMap[target].addrWin.baseHigh; -+ if (0xffffffff == mvAhbToMbusWinRemap(cpuAddrWinMap[target].winNum ,&addrWin)) -+ { -+ DB(mvOsPrintf("mvCpuIfInit:WARN. mvAhbToMbusWinRemap can't remap winNum=%d\n", -+ cpuAddrWinMap[target].winNum)); -+ } -+ -+#endif /* MV_RUN_FROM_FLASH */ -+ -+ /* Go through all targets in user table until table terminator */ -+ for (target = 0; cpuAddrWinMap[target].enable != TBL_TERM; target++) -+ { -+ -+#if defined(MV_RUN_FROM_FLASH) -+ if (target == DEV_BOOCS) -+ { -+ continue; -+ } -+#endif /* MV_RUN_FROM_FLASH */ -+ -+ /* if DRAM auto sizing is used do not initialized DRAM target windows, */ -+ /* assuming this already has been done earlier. */ -+#ifdef MV_DRAM_AUTO_SIZE -+ if (MV_TARGET_IS_DRAM(target)) -+ { -+ continue; -+ } -+#endif -+ -+#if defined(MV_MEM_OVER_PCI_WA) || defined(MV_UART_OVER_PCI_WA) -+ /* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */ -+ if (MV_TARGET_IS_PCI(target)) -+ { -+ continue; -+ } -+#endif -+ -+#if defined(MV_MEM_OVER_PEX_WA) || defined(MV_UART_OVER_PEX_WA) -+ /* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */ -+ if (MV_TARGET_IS_PEX(target)) -+ { -+ continue; -+ } -+#endif -+ /* If the target attribute is the same as the boot device attribute */ -+ /* then it's stays disable */ -+ if (MV_TARGET_IS_AS_BOOT(target)) -+ { -+ continue; -+ } -+ -+ if((0 == cpuAddrWinMap[target].addrWin.size) || -+ (DIS == cpuAddrWinMap[target].enable)) -+ -+ { -+ if (MV_OK != mvCpuIfTargetWinEnable(target, MV_FALSE)) -+ { -+ DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinEnable fail\n")); -+ return MV_ERROR; -+ } -+ -+ } -+ else -+ { -+ if (MV_OK != mvCpuIfTargetWinSet(target, &cpuAddrWinMap[target])) -+ { -+ DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinSet fail\n")); -+ return MV_ERROR; -+ } -+ -+ addrWin.baseLow = cpuAddrWinMap[target].addrWin.baseLow; -+ addrWin.baseHigh = cpuAddrWinMap[target].addrWin.baseHigh; -+ if (0xffffffff == mvAhbToMbusWinRemap(cpuAddrWinMap[target].winNum ,&addrWin)) -+ { -+ DB(mvOsPrintf("mvCpuIfInit:WARN. mvAhbToMbusWinRemap can't remap winNum=%d\n", -+ cpuAddrWinMap[target].winNum)); -+ } -+ -+ -+ } -+ } -+ -+ return MV_OK; -+ -+ -+} -+ -+ -+/******************************************************************************* -+* mvCpuIfTargetWinSet - Set CPU-to-peripheral target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI0_MEM0) -+* address window, also known as address decode window. -+* A new address decode window is set for specified target address window. -+* If address decode window parameter structure enables the window, -+* the routine will also enable the target window, allowing CPU to access -+* the target window. -+* -+* INPUT: -+* target - Peripheral target enumerator. -+* pAddrDecWin - CPU target window data structure. -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_OK if CPU target window was set correctly, MV_ERROR in case of -+* address window overlapps with other active CPU target window or -+* trying to assign 36bit base address while CPU does not support that. -+* The function returns MV_NOT_SUPPORTED, if the target is unsupported. -+* -+*******************************************************************************/ -+MV_STATUS mvCpuIfTargetWinSet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin) -+{ -+ MV_AHB_TO_MBUS_DEC_WIN decWin; -+ MV_U32 existingWinNum; -+ MV_DRAM_DEC_WIN addrDecWin; -+ -+ target = MV_CHANGE_BOOT_CS(target); -+ -+ /* Check parameters */ -+ if (target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvCpuIfTargetWinSet: target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ /* 2) Check if the requested window overlaps with current windows */ -+ if (MV_TRUE == cpuTargetWinOverlap(target, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("mvCpuIfTargetWinSet: ERR. Target %d overlap\n", target); -+ return MV_BAD_PARAM; -+ } -+ -+ if (MV_TARGET_IS_DRAM(target)) -+ { -+ /* copy relevant data to MV_DRAM_DEC_WIN structure */ -+ addrDecWin.addrWin.baseHigh = pAddrDecWin->addrWin.baseHigh; -+ addrDecWin.addrWin.baseLow = pAddrDecWin->addrWin.baseLow; -+ addrDecWin.addrWin.size = pAddrDecWin->addrWin.size; -+ addrDecWin.enable = pAddrDecWin->enable; -+ -+ -+ if (mvDramIfWinSet(target,&addrDecWin) != MV_OK); -+ { -+ mvOsPrintf("mvCpuIfTargetWinSet: mvDramIfWinSet Failed\n"); -+ return MV_ERROR; -+ } -+ -+ } -+ else -+ { -+ /* copy relevant data to MV_AHB_TO_MBUS_DEC_WIN structure */ -+ decWin.addrWin.baseLow = pAddrDecWin->addrWin.baseLow; -+ decWin.addrWin.baseHigh = pAddrDecWin->addrWin.baseHigh; -+ decWin.addrWin.size = pAddrDecWin->addrWin.size; -+ decWin.enable = pAddrDecWin->enable; -+ decWin.target = target; -+ -+ existingWinNum = mvAhbToMbusWinTargetGet(target); -+ -+ /* check if there is already another Window configured -+ for this target */ -+ if ((existingWinNum < MAX_AHB_TO_MBUS_WINS )&& -+ (existingWinNum != pAddrDecWin->winNum)) -+ { -+ /* if we want to enable the new winow number -+ passed by the user , then the old one should -+ be disabled */ -+ if (MV_TRUE == pAddrDecWin->enable) -+ { -+ /* be sure it is disabled */ -+ mvAhbToMbusWinEnable(existingWinNum , MV_FALSE); -+ } -+ } -+ -+ if (mvAhbToMbusWinSet(pAddrDecWin->winNum,&decWin) != MV_OK) -+ { -+ mvOsPrintf("mvCpuIfTargetWinSet: mvAhbToMbusWinSet Failed\n"); -+ return MV_ERROR; -+ } -+ -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCpuIfTargetWinGet - Get CPU-to-peripheral target address window -+* -+* DESCRIPTION: -+* Get the CPU peripheral target address window. -+* -+* INPUT: -+* target - Peripheral target enumerator -+* -+* OUTPUT: -+* pAddrDecWin - CPU target window information data structure. -+* -+* RETURN: -+* MV_OK if target exist, MV_ERROR otherwise. -+* -+*******************************************************************************/ -+MV_STATUS mvCpuIfTargetWinGet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin) -+{ -+ -+ MV_U32 winNum=0xffffffff; -+ MV_AHB_TO_MBUS_DEC_WIN decWin; -+ MV_DRAM_DEC_WIN addrDecWin; -+ -+ target = MV_CHANGE_BOOT_CS(target); -+ -+ /* Check parameters */ -+ if (target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvCpuIfTargetWinGet: target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ if (MV_TARGET_IS_DRAM(target)) -+ { -+ if (mvDramIfWinGet(target,&addrDecWin) != MV_OK) -+ { -+ mvOsPrintf("mvCpuIfTargetWinGet: Failed to get window target %d\n", -+ target); -+ return MV_ERROR; -+ } -+ -+ /* copy relevant data to MV_CPU_DEC_WIN structure */ -+ pAddrDecWin->addrWin.baseLow = addrDecWin.addrWin.baseLow; -+ pAddrDecWin->addrWin.baseHigh = addrDecWin.addrWin.baseHigh; -+ pAddrDecWin->addrWin.size = addrDecWin.addrWin.size; -+ pAddrDecWin->enable = addrDecWin.enable; -+ pAddrDecWin->winNum = 0xffffffff; -+ -+ } -+ else -+ { -+ /* get the Window number associated with this target */ -+ -+ winNum = mvAhbToMbusWinTargetGet(target); -+ if (winNum >= MAX_AHB_TO_MBUS_WINS) -+ { -+ return MV_NO_SUCH; -+ -+ } -+ -+ if (mvAhbToMbusWinGet(winNum , &decWin) != MV_OK) -+ { -+ mvOsPrintf("%s: mvAhbToMbusWinGet Failed at winNum = %d\n", -+ __FUNCTION__, winNum); -+ return MV_ERROR; -+ -+ } -+ -+ /* copy relevant data to MV_CPU_DEC_WIN structure */ -+ pAddrDecWin->addrWin.baseLow = decWin.addrWin.baseLow; -+ pAddrDecWin->addrWin.baseHigh = decWin.addrWin.baseHigh; -+ pAddrDecWin->addrWin.size = decWin.addrWin.size; -+ pAddrDecWin->enable = decWin.enable; -+ pAddrDecWin->winNum = winNum; -+ -+ } -+ -+ -+ -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvCpuIfTargetWinEnable - Enable/disable a CPU address decode window -+* -+* DESCRIPTION: -+* This function enable/disable a CPU address decode window. -+* if parameter 'enable' == MV_TRUE the routine will enable the -+* window, thus enabling CPU accesses (before enabling the window it is -+* tested for overlapping). Otherwise, the window will be disabled. -+* -+* INPUT: -+* target - Peripheral target enumerator. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_ERROR if protection window number was wrong, or the window -+* overlapps other target window. -+* -+*******************************************************************************/ -+MV_STATUS mvCpuIfTargetWinEnable(MV_TARGET target,MV_BOOL enable) -+{ -+ MV_U32 winNum, temp; -+ MV_CPU_DEC_WIN addrDecWin; -+ -+ target = MV_CHANGE_BOOT_CS(target); -+ -+ /* Check parameters */ -+ if (target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvCpuIfTargetWinEnable: target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ /* get the window and check if it exist */ -+ temp = mvCpuIfTargetWinGet(target, &addrDecWin); -+ if (MV_NO_SUCH == temp) -+ { -+ return (enable? MV_ERROR: MV_OK); -+ } -+ else if( MV_OK != temp) -+ { -+ mvOsPrintf("%s: ERR. Getting target %d failed.\n",__FUNCTION__, target); -+ return MV_ERROR; -+ } -+ -+ -+ /* check overlap */ -+ -+ if (MV_TRUE == enable) -+ { -+ if (MV_TRUE == cpuTargetWinOverlap(target, &addrDecWin.addrWin)) -+ { -+ DB(mvOsPrintf("%s: ERR. Target %d overlap\n",__FUNCTION__, target)); -+ return MV_ERROR; -+ } -+ -+ } -+ -+ -+ if (MV_TARGET_IS_DRAM(target)) -+ { -+ if (mvDramIfWinEnable(target , enable) != MV_OK) -+ { -+ mvOsPrintf("mvCpuIfTargetWinGet: mvDramIfWinEnable Failed at \n"); -+ return MV_ERROR; -+ -+ } -+ -+ } -+ else -+ { -+ /* get the Window number associated with this target */ -+ -+ winNum = mvAhbToMbusWinTargetGet(target); -+ -+ if (winNum >= MAX_AHB_TO_MBUS_WINS) -+ { -+ return (enable? MV_ERROR: MV_OK); -+ } -+ -+ if (mvAhbToMbusWinEnable(winNum , enable) != MV_OK) -+ { -+ mvOsPrintf("mvCpuIfTargetWinGet: Failed to enable window = %d\n", -+ winNum); -+ return MV_ERROR; -+ -+ } -+ -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvCpuIfTargetWinSizeGet - Get CPU target address window size -+* -+* DESCRIPTION: -+* Get the size of CPU-to-peripheral target window. -+* -+* INPUT: -+* target - Peripheral target enumerator -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit size. Function also returns '0' if window is closed. -+* Function returns 0xFFFFFFFF in case of an error. -+* -+*******************************************************************************/ -+MV_U32 mvCpuIfTargetWinSizeGet(MV_TARGET target) -+{ -+ MV_CPU_DEC_WIN addrDecWin; -+ -+ target = MV_CHANGE_BOOT_CS(target); -+ -+ /* Check parameters */ -+ if (target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvCpuIfTargetWinSizeGet: target %d is Illigal\n", target); -+ return 0; -+ } -+ -+ /* Get the winNum window */ -+ if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin)) -+ { -+ mvOsPrintf("mvCpuIfTargetWinSizeGet:ERR. Getting target %d failed.\n", -+ target); -+ return 0; -+ } -+ -+ /* Check if window is enabled */ -+ if (addrDecWin.enable == MV_TRUE) -+ { -+ return (addrDecWin.addrWin.size); -+ } -+ else -+ { -+ return 0; /* Window disabled. return 0 */ -+ } -+} -+ -+/******************************************************************************* -+* mvCpuIfTargetWinBaseLowGet - Get CPU target address window base low -+* -+* DESCRIPTION: -+* CPU-to-peripheral target address window base is constructed of -+* two parts: Low and high. -+* This function gets the CPU peripheral target low base address. -+* -+* INPUT: -+* target - Peripheral target enumerator -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit low base address. -+* -+*******************************************************************************/ -+MV_U32 mvCpuIfTargetWinBaseLowGet(MV_TARGET target) -+{ -+ MV_CPU_DEC_WIN addrDecWin; -+ -+ target = MV_CHANGE_BOOT_CS(target); -+ -+ /* Check parameters */ -+ if (target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvCpuIfTargetWinBaseLowGet: target %d is Illigal\n", target); -+ return 0xffffffff; -+ } -+ -+ /* Get the target window */ -+ if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin)) -+ { -+ mvOsPrintf("mvCpuIfTargetWinBaseLowGet:ERR. Getting target %d failed.\n", -+ target); -+ return 0xffffffff; -+ } -+ -+ if (MV_FALSE == addrDecWin.enable) -+ { -+ return 0xffffffff; -+ } -+ return (addrDecWin.addrWin.baseLow); -+} -+ -+/******************************************************************************* -+* mvCpuIfTargetWinBaseHighGet - Get CPU target address window base high -+* -+* DESCRIPTION: -+* CPU-to-peripheral target address window base is constructed of -+* two parts: Low and high. -+* This function gets the CPU peripheral target high base address. -+* -+* INPUT: -+* target - Peripheral target enumerator -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit high base address. -+* -+*******************************************************************************/ -+MV_U32 mvCpuIfTargetWinBaseHighGet(MV_TARGET target) -+{ -+ MV_CPU_DEC_WIN addrDecWin; -+ -+ target = MV_CHANGE_BOOT_CS(target); -+ -+ /* Check parameters */ -+ if (target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvCpuIfTargetWinBaseLowGet: target %d is Illigal\n", target); -+ return 0xffffffff; -+ } -+ -+ /* Get the target window */ -+ if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin)) -+ { -+ mvOsPrintf("mvCpuIfTargetWinBaseHighGet:ERR. Getting target %d failed.\n", -+ target); -+ return 0xffffffff; -+ } -+ -+ if (MV_FALSE == addrDecWin.enable) -+ { -+ return 0; -+ } -+ -+ return (addrDecWin.addrWin.baseHigh); -+} -+ -+#if defined(MV_INCLUDE_PEX) -+/******************************************************************************* -+* mvCpuIfPexRemap - Set CPU remap register for address windows. -+* -+* DESCRIPTION: -+* -+* INPUT: -+* pexTarget - Peripheral target enumerator. Must be a PEX target. -+* pAddrDecWin - CPU target window information data structure. -+* Note that caller has to fill in the base field only. The -+* size field is ignored. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if target is not a PEX one, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_U32 mvCpuIfPexRemap(MV_TARGET pexTarget, MV_ADDR_WIN *pAddrDecWin) -+{ -+ MV_U32 winNum; -+ -+ /* Check parameters */ -+ -+ if (mvCtrlPexMaxIfGet() > 1) -+ { -+ if ((!MV_TARGET_IS_PEX1(pexTarget))&&(!MV_TARGET_IS_PEX0(pexTarget))) -+ { -+ mvOsPrintf("mvCpuIfPexRemap: target %d is Illigal\n",pexTarget); -+ return 0xffffffff; -+ } -+ -+ } -+ else -+ { -+ if (!MV_TARGET_IS_PEX0(pexTarget)) -+ { -+ mvOsPrintf("mvCpuIfPexRemap: target %d is Illigal\n",pexTarget); -+ return 0xffffffff; -+ } -+ -+ } -+ -+ /* get the Window number associated with this target */ -+ winNum = mvAhbToMbusWinTargetGet(pexTarget); -+ -+ if (winNum >= MAX_AHB_TO_MBUS_WINS) -+ { -+ mvOsPrintf("mvCpuIfPexRemap: mvAhbToMbusWinTargetGet Failed\n"); -+ return 0xffffffff; -+ -+ } -+ -+ return mvAhbToMbusWinRemap(winNum , pAddrDecWin); -+} -+ -+#endif -+ -+#if defined(MV_INCLUDE_PCI) -+/******************************************************************************* -+* mvCpuIfPciRemap - Set CPU remap register for address windows. -+* -+* DESCRIPTION: -+* -+* INPUT: -+* pciTarget - Peripheral target enumerator. Must be a PCI target. -+* pAddrDecWin - CPU target window information data structure. -+* Note that caller has to fill in the base field only. The -+* size field is ignored. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if target is not a PCI one, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_U32 mvCpuIfPciRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin) -+{ -+ MV_U32 winNum; -+ -+ /* Check parameters */ -+ if (!MV_TARGET_IS_PCI(pciTarget)) -+ { -+ mvOsPrintf("mvCpuIfPciRemap: target %d is Illigal\n",pciTarget); -+ return 0xffffffff; -+ } -+ -+ /* get the Window number associated with this target */ -+ winNum = mvAhbToMbusWinTargetGet(pciTarget); -+ -+ if (winNum >= MAX_AHB_TO_MBUS_WINS) -+ { -+ mvOsPrintf("mvCpuIfPciRemap: mvAhbToMbusWinTargetGet Failed\n"); -+ return 0xffffffff; -+ -+ } -+ -+ return mvAhbToMbusWinRemap(winNum , pAddrDecWin); -+} -+#endif /* MV_INCLUDE_PCI */ -+ -+ -+/******************************************************************************* -+* mvCpuIfPciIfRemap - Set CPU remap register for address windows. -+* -+* DESCRIPTION: -+* -+* INPUT: -+* pciTarget - Peripheral target enumerator. Must be a PCI target. -+* pAddrDecWin - CPU target window information data structure. -+* Note that caller has to fill in the base field only. The -+* size field is ignored. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if target is not a PCI one, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_U32 mvCpuIfPciIfRemap(MV_TARGET pciIfTarget, MV_ADDR_WIN *pAddrDecWin) -+{ -+#if defined(MV_INCLUDE_PEX) -+ if (MV_TARGET_IS_PEX(pciIfTarget)) -+ { -+ return mvCpuIfPexRemap(pciIfTarget,pAddrDecWin); -+ } -+#endif -+#if defined(MV_INCLUDE_PCI) -+ -+ if (MV_TARGET_IS_PCI(pciIfTarget)) -+ { -+ return mvCpuIfPciRemap(pciIfTarget,pAddrDecWin); -+ } -+#endif -+ return 0; -+} -+ -+ -+ -+/******************************************************************************* -+* mvCpuIfTargetOfBaseAddressGet - Get the target according to base address -+* -+* DESCRIPTION: -+* -+* INPUT: -+* baseAddress - base address to be checked -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* the target number that baseAddress belongs to or MAX_TARGETS is not -+* found -+* -+*******************************************************************************/ -+ -+MV_TARGET mvCpuIfTargetOfBaseAddressGet(MV_U32 baseAddress) -+{ -+ MV_CPU_DEC_WIN win; -+ MV_U32 target; -+ -+ for( target = 0; target < MAX_TARGETS; target++ ) -+ { -+ if( mvCpuIfTargetWinGet( target, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ if ((baseAddress >= win.addrWin.baseLow) && -+ (baseAddress < win.addrWin.baseLow + win.addrWin.size)) break; -+ } -+ } -+ else return MAX_TARGETS; -+ -+ } -+ -+ return target; -+} -+/******************************************************************************* -+* cpuTargetWinOverlap - Detect CPU address decode windows overlapping -+* -+* DESCRIPTION: -+* An unpredicted behaviur is expected in case CPU address decode -+* windows overlapps. -+* This function detects CPU address decode windows overlapping of a -+* specified target. The function does not check the target itself for -+* overlapping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* target - Peripheral target enumerator. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlaps current address -+* decode map, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+static MV_BOOL cpuTargetWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 targetNum; -+ MV_CPU_DEC_WIN addrDecWin; -+ MV_STATUS status; -+ -+ -+ for(targetNum = 0; targetNum < MAX_TARGETS; targetNum++) -+ { -+#if defined(MV_RUN_FROM_FLASH) -+ if(MV_TARGET_IS_AS_BOOT(target)) -+ { -+ if (MV_CHANGE_BOOT_CS(targetNum) == target) -+ continue; -+ } -+#endif /* MV_RUN_FROM_FLASH */ -+ -+ /* don't check our target or illegal targets */ -+ if (targetNum == target) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ status = mvCpuIfTargetWinGet(targetNum, &addrDecWin); -+ if(MV_NO_SUCH == status) -+ { -+ continue; -+ } -+ if(MV_OK != status) -+ { -+ DB(mvOsPrintf("cpuTargetWinOverlap: ERR. TargetWinGet failed\n")); -+ return MV_TRUE; -+ } -+ -+ /* Do not check disabled windows */ -+ if (MV_FALSE == addrDecWin.enable) -+ { -+ continue; -+ } -+ -+ if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin)) -+ { -+ DB(mvOsPrintf( -+ "cpuTargetWinOverlap: Required target %d overlap current %d\n", -+ target, targetNum)); -+ return MV_TRUE; -+ } -+ } -+ -+ return MV_FALSE; -+ -+} -+ -+/******************************************************************************* -+* mvCpuIfAddDecShow - Print the CPU address decode map. -+* -+* DESCRIPTION: -+* This function print the CPU address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvCpuIfAddDecShow(MV_VOID) -+{ -+ MV_CPU_DEC_WIN win; -+ MV_U32 target; -+ mvOsOutput( "\n" ); -+ mvOsOutput( "CPU Interface\n" ); -+ mvOsOutput( "-------------\n" ); -+ -+ for( target = 0; target < MAX_TARGETS; target++ ) -+ { -+ -+ memset( &win, 0, sizeof(MV_CPU_DEC_WIN) ); -+ -+ mvOsOutput( "%s ",mvCtrlTargetNameGet(target)); -+ mvOsOutput( "...." ); -+ -+ if( mvCpuIfTargetWinGet( target, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ mvOsOutput( "base %08x, ", win.addrWin.baseLow ); -+ mvSizePrint( win.addrWin.size ); -+ mvOsOutput( "\n" ); -+ -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ else if( mvCpuIfTargetWinGet( target, &win ) == MV_NO_SUCH ) -+ { -+ mvOsOutput( "no such\n" ); -+ } -+ } -+} -+ -+/******************************************************************************* -+* mvCpuIfEnablePex - Enable PCI Express. -+* -+* DESCRIPTION: -+* This function Enable PCI Express. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* pexType - MV_PEX_ROOT_COMPLEX - root complex device -+* MV_PEX_END_POINT - end point device -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+#if defined(MV_INCLUDE_PEX) -+MV_VOID mvCpuIfEnablePex(MV_U32 pexIf, MV_PEX_TYPE pexType) -+{ -+ /* Set pex mode incase S@R not exist */ -+ if( pexType == MV_PEX_END_POINT) -+ { -+ MV_REG_BIT_RESET(PEX_CTRL_REG(pexIf),PXCR_DEV_TYPE_CTRL_MASK); -+ /* Change pex mode in capability reg */ -+ MV_REG_BIT_RESET(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_CAPABILITY_REG), BIT22); -+ MV_REG_BIT_SET(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_CAPABILITY_REG), BIT20); -+ -+ } -+ else -+ { -+ MV_REG_BIT_SET(PEX_CTRL_REG(pexIf),PXCR_DEV_TYPE_CTRL_MASK); -+ } -+ -+ /* CPU config register Pex enable */ -+ MV_REG_BIT_SET(CPU_CTRL_STAT_REG,CCSR_PCI_ACCESS_MASK); -+} -+#endif -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.h -new file mode 100644 -index 0000000..5755a40 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIf.h -@@ -0,0 +1,120 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvCpuIfh -+#define __INCmvCpuIfh -+ -+/* includes */ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/sys/mvCpuIfRegs.h" -+#include "ctrlEnv/sys/mvAhbToMbus.h" -+#include "ddr2/mvDramIf.h" -+#include "ctrlEnv/sys/mvSysDram.h" -+#if defined(MV_INCLUDE_PEX) -+#include "pex/mvPex.h" -+#endif -+ -+/* defines */ -+ -+/* typedefs */ -+/* This structure describes CPU interface address decode window */ -+typedef struct _mvCpuIfDecWin -+{ -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_U32 winNum; /* Window Number in the AHB To Mbus bridge */ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+}MV_CPU_DEC_WIN; -+ -+ -+ -+/* mvCpuIfLib.h API list */ -+ -+/* mvCpuIfLib.h API list */ -+ -+MV_STATUS mvCpuIfInit(MV_CPU_DEC_WIN *cpuAddrWinMap); -+MV_STATUS mvCpuIfTargetWinSet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin); -+MV_STATUS mvCpuIfTargetWinGet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin); -+MV_STATUS mvCpuIfTargetWinEnable(MV_TARGET target,MV_BOOL enable); -+MV_U32 mvCpuIfTargetWinSizeGet(MV_TARGET target); -+MV_U32 mvCpuIfTargetWinBaseLowGet(MV_TARGET target); -+MV_U32 mvCpuIfTargetWinBaseHighGet(MV_TARGET target); -+MV_TARGET mvCpuIfTargetOfBaseAddressGet(MV_U32 baseAddress); -+#if defined(MV_INCLUDE_PEX) -+MV_U32 mvCpuIfPexRemap(MV_TARGET pexTarget, MV_ADDR_WIN *pAddrDecWin); -+MV_VOID mvCpuIfEnablePex(MV_U32 pexIf, MV_PEX_TYPE pexType); -+#endif -+#if defined(MV_INCLUDE_PCI) -+MV_U32 mvCpuIfPciRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin); -+#endif -+MV_U32 mvCpuIfPciIfRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin); -+ -+MV_VOID mvCpuIfAddDecShow(MV_VOID); -+ -+#if defined(MV88F6281) -+MV_STATUS mvCpuIfBridgeReorderWAInit(void); -+#endif -+ -+#endif /* __INCmvCpuIfh */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIfRegs.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIfRegs.h -new file mode 100644 -index 0000000..58c04c0 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvCpuIfRegs.h -@@ -0,0 +1,304 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvCpuIfRegsh -+#define __INCmvCpuIfRegsh -+ -+/****************************************/ -+/* ARM Control and Status Registers Map */ -+/****************************************/ -+ -+#define CPU_CONFIG_REG 0x20100 -+#define CPU_CTRL_STAT_REG 0x20104 -+#define CPU_RSTOUTN_MASK_REG 0x20108 -+#define CPU_SYS_SOFT_RST_REG 0x2010C -+#define CPU_AHB_MBUS_CAUSE_INT_REG 0x20110 -+#define CPU_AHB_MBUS_MASK_INT_REG 0x20114 -+#define CPU_FTDLL_CONFIG_REG 0x20120 -+#define CPU_L2_CONFIG_REG 0x20128 -+ -+ -+ -+/* ARM Configuration register */ -+/* CPU_CONFIG_REG (CCR) */ -+ -+ -+/* Reset vector location */ -+#define CCR_VEC_INIT_LOC_OFFS 1 -+#define CCR_VEC_INIT_LOC_MASK BIT1 -+/* reset at 0x00000000 */ -+#define CCR_VEC_INIT_LOC_0000 (0 << CCR_VEC_INIT_LOC_OFFS) -+/* reset at 0xFFFF0000 */ -+#define CCR_VEC_INIT_LOC_FF00 (1 << CCR_VEC_INIT_LOC_OFFS) -+ -+ -+#define CCR_AHB_ERROR_PROP_OFFS 2 -+#define CCR_AHB_ERROR_PROP_MASK BIT2 -+/* Erros are not propogated to AHB */ -+#define CCR_AHB_ERROR_PROP_NO_INDICATE (0 << CCR_AHB_ERROR_PROP_OFFS) -+/* Erros are propogated to AHB */ -+#define CCR_AHB_ERROR_PROP_INDICATE (1 << CCR_AHB_ERROR_PROP_OFFS) -+ -+ -+#define CCR_ENDIAN_INIT_OFFS 3 -+#define CCR_ENDIAN_INIT_MASK BIT3 -+#define CCR_ENDIAN_INIT_LITTLE (0 << CCR_ENDIAN_INIT_OFFS) -+#define CCR_ENDIAN_INIT_BIG (1 << CCR_ENDIAN_INIT_OFFS) -+ -+ -+#define CCR_INCR_EN_OFFS 4 -+#define CCR_INCR_EN_MASK BIT4 -+#define CCR_INCR_EN BIT4 -+ -+ -+#define CCR_NCB_BLOCKING_OFFS 5 -+#define CCR_NCB_BLOCKING_MASK (1 << CCR_NCB_BLOCKING_OFFS) -+#define CCR_NCB_BLOCKING_NON (0 << CCR_NCB_BLOCKING_OFFS) -+#define CCR_NCB_BLOCKING_EN (1 << CCR_NCB_BLOCKING_OFFS) -+ -+#define CCR_CPU_2_MBUSL_TICK_DRV_OFFS 8 -+#define CCR_CPU_2_MBUSL_TICK_DRV_MASK (0xF << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) -+#define CCR_CPU_2_MBUSL_TICK_SMPL_OFFS 12 -+#define CCR_CPU_2_MBUSL_TICK_SMPL_MASK (0xF << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS) -+#define CCR_ICACH_PREF_BUF_ENABLE BIT16 -+#define CCR_DCACH_PREF_BUF_ENABLE BIT17 -+ -+/* Ratio options for CPU to DDR for 6281/6192/6190 */ -+#define CPU_2_DDR_CLK_1x3 4 -+#define CPU_2_DDR_CLK_1x4 6 -+ -+/* Ratio options for CPU to DDR for 6281 only */ -+#define CPU_2_DDR_CLK_2x9 7 -+#define CPU_2_DDR_CLK_1x5 8 -+#define CPU_2_DDR_CLK_1x6 9 -+ -+/* Ratio options for CPU to DDR for 6180 only */ -+#define CPU_2_DDR_CLK_1x3_1 0x5 -+#define CPU_2_DDR_CLK_1x4_1 0x6 -+ -+/* Default values for CPU to Mbus-L DDR Interface Tick Driver and */ -+/* CPU to Mbus-L Tick Sample fields in CPU config register */ -+ -+#define TICK_DRV_1x1 0 -+#define TICK_DRV_1x2 0 -+#define TICK_DRV_1x3 1 -+#define TICK_DRV_1x4 2 -+#define TICK_SMPL_1x1 0 -+#define TICK_SMPL_1x2 1 -+#define TICK_SMPL_1x3 0 -+#define TICK_SMPL_1x4 0 -+ -+#define CPU_2_MBUSL_DDR_CLK_1x2 \ -+ ((TICK_DRV_1x2 << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | \ -+ (TICK_SMPL_1x2 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS)) -+#define CPU_2_MBUSL_DDR_CLK_1x3 \ -+ ((TICK_DRV_1x3 << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | \ -+ (TICK_SMPL_1x3 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS)) -+#define CPU_2_MBUSL_DDR_CLK_1x4 \ -+ ((TICK_DRV_1x4 << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | \ -+ (TICK_SMPL_1x4 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS)) -+ -+/* ARM Control and Status register */ -+/* CPU_CTRL_STAT_REG (CCSR) */ -+ -+ -+/* -+This is used to block PCI express\PCI from access Socrates/Feroceon GP -+while ARM boot is still in progress -+*/ -+ -+#define CCSR_PCI_ACCESS_OFFS 0 -+#define CCSR_PCI_ACCESS_MASK BIT0 -+#define CCSR_PCI_ACCESS_ENABLE (0 << CCSR_PCI_ACCESS_OFFS) -+#define CCSR_PCI_ACCESS_DISBALE (1 << CCSR_PCI_ACCESS_OFFS) -+ -+#define CCSR_ARM_RESET BIT1 -+#define CCSR_SELF_INT BIT2 -+#define CCSR_BIG_ENDIAN BIT15 -+ -+ -+/* RSTOUTn Mask Register */ -+/* CPU_RSTOUTN_MASK_REG (CRMR) */ -+ -+#define CRMR_PEX_RST_OUT_OFFS 0 -+#define CRMR_PEX_RST_OUT_MASK BIT0 -+#define CRMR_PEX_RST_OUT_ENABLE (1 << CRMR_PEX_RST_OUT_OFFS) -+#define CRMR_PEX_RST_OUT_DISABLE (0 << CRMR_PEX_RST_OUT_OFFS) -+ -+#define CRMR_WD_RST_OUT_OFFS 1 -+#define CRMR_WD_RST_OUT_MASK BIT1 -+#define CRMR_WD_RST_OUT_ENABLE (1 << CRMR_WD_RST_OUT_OFFS) -+#define CRMR_WD_RST_OUT_DISBALE (0 << CRMR_WD_RST_OUT_OFFS) -+ -+#define CRMR_SOFT_RST_OUT_OFFS 2 -+#define CRMR_SOFT_RST_OUT_MASK BIT2 -+#define CRMR_SOFT_RST_OUT_ENABLE (1 << CRMR_SOFT_RST_OUT_OFFS) -+#define CRMR_SOFT_RST_OUT_DISBALE (0 << CRMR_SOFT_RST_OUT_OFFS) -+ -+/* System Software Reset Register */ -+/* CPU_SYS_SOFT_RST_REG (CSSRR) */ -+ -+#define CSSRR_SYSTEM_SOFT_RST BIT0 -+ -+/* AHB to Mbus Bridge Interrupt Cause Register*/ -+/* CPU_AHB_MBUS_CAUSE_INT_REG (CAMCIR) */ -+ -+#define CAMCIR_ARM_SELF_INT BIT0 -+#define CAMCIR_ARM_TIMER0_INT_REQ BIT1 -+#define CAMCIR_ARM_TIMER1_INT_REQ BIT2 -+#define CAMCIR_ARM_WD_TIMER_INT_REQ BIT3 -+ -+ -+/* AHB to Mbus Bridge Interrupt Mask Register*/ -+/* CPU_AHB_MBUS_MASK_INT_REG (CAMMIR) */ -+ -+#define CAMCIR_ARM_SELF_INT_OFFS 0 -+#define CAMCIR_ARM_SELF_INT_MASK BIT0 -+#define CAMCIR_ARM_SELF_INT_EN (1 << CAMCIR_ARM_SELF_INT_OFFS) -+#define CAMCIR_ARM_SELF_INT_DIS (0 << CAMCIR_ARM_SELF_INT_OFFS) -+ -+ -+#define CAMCIR_ARM_TIMER0_INT_REQ_OFFS 1 -+#define CAMCIR_ARM_TIMER0_INT_REQ_MASK BIT1 -+#define CAMCIR_ARM_TIMER0_INT_REQ_EN (1 << CAMCIR_ARM_TIMER0_INT_REQ_OFFS) -+#define CAMCIR_ARM_TIMER0_INT_REQ_DIS (0 << CAMCIR_ARM_TIMER0_INT_REQ_OFFS) -+ -+#define CAMCIR_ARM_TIMER1_INT_REQ_OFFS 2 -+#define CAMCIR_ARM_TIMER1_INT_REQ_MASK BIT2 -+#define CAMCIR_ARM_TIMER1_INT_REQ_EN (1 << CAMCIR_ARM_TIMER1_INT_REQ_OFFS) -+#define CAMCIR_ARM_TIMER1_INT_REQ_DIS (0 << CAMCIR_ARM_TIMER1_INT_REQ_OFFS) -+ -+#define CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS 3 -+#define CAMCIR_ARM_WD_TIMER_INT_REQ_MASK BIT3 -+#define CAMCIR_ARM_WD_TIMER_INT_REQ_EN (1 << CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS) -+#define CAMCIR_ARM_WD_TIMER_INT_REQ_DIS (0 << CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS) -+ -+/* CPU FTDLL Config register (CFCR) fields */ -+#define CFCR_FTDLL_ICACHE_TAG_OFFS 0 -+#define CFCR_FTDLL_ICACHE_TAG_MASK (0x7F << CFCR_FTDLL_ICACHE_TAG_OFFS) -+#define CFCR_FTDLL_DCACHE_TAG_OFFS 8 -+#define CFCR_FTDLL_DCACHE_TAG_MASK (0x7F << CFCR_FTDLL_DCACHE_TAG_OFFS) -+#define CFCR_FTDLL_OVERWRITE_ENABLE (1 << 15) -+/* For Orion 2 D2 only */ -+#define CFCR_MRVL_CPU_ID_OFFS 16 -+#define CFCR_MRVL_CPU_ID_MASK (0x1 << CFCR_MRVL_CPU_ID_OFFS) -+#define CFCR_ARM_CPU_ID (0x0 << CFCR_MRVL_CPU_ID_OFFS) -+#define CFCR_MRVL_CPU_ID (0x1 << CFCR_MRVL_CPU_ID_OFFS) -+#define CFCR_VFP_SUB_ARC_NUM_OFFS 7 -+#define CFCR_VFP_SUB_ARC_NUM_MASK (0x1 << CFCR_VFP_SUB_ARC_NUM_OFFS) -+#define CFCR_VFP_SUB_ARC_NUM_1 (0x0 << CFCR_VFP_SUB_ARC_NUM_OFFS) -+#define CFCR_VFP_SUB_ARC_NUM_2 (0x1 << CFCR_VFP_SUB_ARC_NUM_OFFS) -+ -+/* CPU_L2_CONFIG_REG fields */ -+#ifdef MV_CPU_LE -+#define CL2CR_L2_ECC_EN_OFFS 2 -+#define CL2CR_L2_WT_MODE_OFFS 4 -+#else -+#define CL2CR_L2_ECC_EN_OFFS 26 -+#define CL2CR_L2_WT_MODE_OFFS 28 -+#endif -+ -+#define CL2CR_L2_ECC_EN_MASK (1 << CL2CR_L2_ECC_EN_OFFS) -+#define CL2CR_L2_WT_MODE_MASK (1 << CL2CR_L2_WT_MODE_OFFS) -+ -+/*******************************************/ -+/* Main Interrupt Controller Registers Map */ -+/*******************************************/ -+ -+#define CPU_MAIN_INT_CAUSE_REG 0x20200 -+#define CPU_MAIN_IRQ_MASK_REG 0x20204 -+#define CPU_MAIN_FIQ_MASK_REG 0x20208 -+#define CPU_ENPOINT_MASK_REG 0x2020C -+#define CPU_MAIN_INT_CAUSE_HIGH_REG 0x20210 -+#define CPU_MAIN_IRQ_MASK_HIGH_REG 0x20214 -+#define CPU_MAIN_FIQ_MASK_HIGH_REG 0x20218 -+#define CPU_ENPOINT_MASK_HIGH_REG 0x2021C -+ -+ -+/*******************************************/ -+/* ARM Doorbell Registers Map */ -+/*******************************************/ -+ -+#define CPU_HOST_TO_ARM_DRBL_REG 0x20400 -+#define CPU_HOST_TO_ARM_MASK_REG 0x20404 -+#define CPU_ARM_TO_HOST_DRBL_REG 0x20408 -+#define CPU_ARM_TO_HOST_MASK_REG 0x2040C -+ -+ -+ -+/* CPU control register map */ -+/* Set bits means value is about to change according to new value */ -+#define CPU_CONFIG_DEFAULT_MASK (CCR_VEC_INIT_LOC_MASK | CCR_AHB_ERROR_PROP_MASK) -+ -+#define CPU_CONFIG_DEFAULT (CCR_VEC_INIT_LOC_FF00) -+ -+/* CPU Control and status defaults */ -+#define CPU_CTRL_STAT_DEFAULT_MASK (CCSR_PCI_ACCESS_MASK) -+ -+ -+#define CPU_CTRL_STAT_DEFAULT (CCSR_PCI_ACCESS_ENABLE) -+ -+#endif /* __INCmvCpuIfRegsh */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysAudio.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysAudio.c -new file mode 100644 -index 0000000..8475956 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysAudio.c -@@ -0,0 +1,324 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#include "mvSysAudio.h" -+ -+/******************************************************************************* -+* mvAudioWinSet - Set AUDIO target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window, also known as address decode window. -+* After setting this target window, the AUDIO will be able to access the -+* target within the address window. -+* -+* INPUT: -+* winNum - AUDIO target address decode window number. -+* pAddrDecWin - AUDIO target window data structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if address window overlapps with other address decode windows. -+* MV_BAD_PARAM if base address is invalid parameter or target is -+* unknown. -+* -+*******************************************************************************/ -+MV_STATUS mvAudioWinSet(MV_U32 winNum, MV_AUDIO_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttribs; -+ MV_DEC_REGS decRegs; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_AUDIO_MAX_ADDR_DECODE_WIN) -+ { -+ mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvAudioWinSet:Error setting AUDIO window %d to "\ -+ "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, -+ mvCtrlTargetNameGet(pAddrDecWin->target), -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ decRegs.baseReg = 0; -+ decRegs.sizeReg = 0; -+ -+ if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs)) -+ { -+ mvOsPrintf("%s: mvCtrlAddrDecToReg Failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ mvCtrlAttribGet(pAddrDecWin->target, &targetAttribs); -+ -+ /* set attributes */ -+ decRegs.sizeReg &= ~MV_AUDIO_WIN_ATTR_MASK; -+ decRegs.sizeReg |= (targetAttribs.attrib << MV_AUDIO_WIN_ATTR_OFFSET); -+ -+ /* set target ID */ -+ decRegs.sizeReg &= ~MV_AUDIO_WIN_TARGET_MASK; -+ decRegs.sizeReg |= (targetAttribs.targetId << MV_AUDIO_WIN_TARGET_OFFSET); -+ -+ if (pAddrDecWin->enable == MV_TRUE) -+ { -+ decRegs.sizeReg |= MV_AUDIO_WIN_ENABLE_MASK; -+ } -+ else -+ { -+ decRegs.sizeReg &= ~MV_AUDIO_WIN_ENABLE_MASK; -+ } -+ -+ MV_REG_WRITE( MV_AUDIO_WIN_CTRL_REG(winNum), decRegs.sizeReg); -+ MV_REG_WRITE( MV_AUDIO_WIN_BASE_REG(winNum), decRegs.baseReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvAudioWinGet - Get AUDIO peripheral target address window. -+* -+* DESCRIPTION: -+* Get AUDIO peripheral target address window. -+* -+* INPUT: -+* winNum - AUDIO target address decode window number. -+* -+* OUTPUT: -+* pAddrDecWin - AUDIO target window data structure. -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvAudioWinGet(MV_U32 winNum, MV_AUDIO_DEC_WIN *pAddrDecWin) -+{ -+ MV_DEC_REGS decRegs; -+ MV_TARGET_ATTRIB targetAttrib; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_AUDIO_MAX_ADDR_DECODE_WIN) -+ { -+ mvOsPrintf("%s : ERR. Invalid winNum %d\n", -+ __FUNCTION__, winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ decRegs.baseReg = MV_REG_READ( MV_AUDIO_WIN_BASE_REG(winNum) ); -+ decRegs.sizeReg = MV_REG_READ( MV_AUDIO_WIN_CTRL_REG(winNum) ); -+ -+ if (MV_OK != mvCtrlRegToAddrDec(&decRegs, &pAddrDecWin->addrWin) ) -+ { -+ mvOsPrintf("%s: mvCtrlRegToAddrDec Failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* attrib and targetId */ -+ targetAttrib.attrib = (decRegs.sizeReg & MV_AUDIO_WIN_ATTR_MASK) >> -+ MV_AUDIO_WIN_ATTR_OFFSET; -+ targetAttrib.targetId = (decRegs.sizeReg & MV_AUDIO_WIN_TARGET_MASK) >> -+ MV_AUDIO_WIN_TARGET_OFFSET; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ /* Check if window is enabled */ -+ if(decRegs.sizeReg & MV_AUDIO_WIN_ENABLE_MASK) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ } -+ return MV_OK; -+} -+/******************************************************************************* -+* mvAudioAddrDecShow - Print the AUDIO address decode map. -+* -+* DESCRIPTION: -+* This function print the AUDIO address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvAudioAddrDecShow(MV_VOID) -+{ -+ -+ MV_AUDIO_DEC_WIN win; -+ int i; -+ -+ if (MV_FALSE == mvCtrlPwrClckGet(AUDIO_UNIT_ID, 0)) -+ return; -+ -+ -+ mvOsOutput( "\n" ); -+ mvOsOutput( "AUDIO:\n" ); -+ mvOsOutput( "----\n" ); -+ -+ for( i = 0; i < MV_AUDIO_MAX_ADDR_DECODE_WIN; i++ ) -+ { -+ memset( &win, 0, sizeof(MV_AUDIO_DEC_WIN) ); -+ -+ mvOsOutput( "win%d - ", i ); -+ -+ if( mvAudioWinGet( i, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ mvOsOutput( "%s base %08x, ", -+ mvCtrlTargetNameGet(win.target), win.addrWin.baseLow ); -+ mvOsOutput( "...." ); -+ -+ mvSizePrint( win.addrWin.size ); -+ -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+} -+ -+ -+/******************************************************************************* -+* mvAudioWinInit - Initialize the integrated AUDIO target address window. -+* -+* DESCRIPTION: -+* Initialize the AUDIO peripheral target address window. -+* -+* INPUT: -+* -+* -+* OUTPUT: -+* -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvAudioInit(MV_VOID) -+{ -+ int winNum; -+ MV_AUDIO_DEC_WIN audioWin; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ MV_U32 status; -+ -+ mvAudioHalInit(); -+ -+ /* Initiate Audio address decode */ -+ -+ /* First disable all address decode windows */ -+ for(winNum = 0; winNum < MV_AUDIO_MAX_ADDR_DECODE_WIN; winNum++) -+ { -+ MV_U32 regVal = MV_REG_READ(MV_AUDIO_WIN_CTRL_REG(winNum)); -+ regVal &= ~MV_AUDIO_WIN_ENABLE_MASK; -+ MV_REG_WRITE(MV_AUDIO_WIN_CTRL_REG(winNum), regVal); -+ } -+ -+ for(winNum = 0; winNum < MV_AUDIO_MAX_ADDR_DECODE_WIN; winNum++) -+ { -+ -+ /* We will set the Window to DRAM_CS0 in default */ -+ /* first get attributes from CPU If */ -+ status = mvCpuIfTargetWinGet(SDRAM_CS0, -+ &cpuAddrDecWin); -+ -+ if (MV_OK != status) -+ { -+ mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ audioWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ audioWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ audioWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ audioWin.enable = MV_TRUE; -+ audioWin.target = SDRAM_CS0; -+ -+ if(MV_OK != mvAudioWinSet(winNum, &audioWin)) -+ { -+ return MV_ERROR; -+ } -+ } -+ } -+ -+ return MV_OK; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysAudio.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysAudio.h -new file mode 100644 -index 0000000..7e078ff ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysAudio.h -@@ -0,0 +1,123 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#ifndef __INCMVSysAudioH -+#define __INCMVSysAudioH -+ -+#include "mvCommon.h" -+#include "audio/mvAudio.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+/***********************************/ -+/* Audio Address Decoding registers*/ -+/***********************************/ -+ -+#define MV_AUDIO_MAX_ADDR_DECODE_WIN 2 -+#define MV_AUDIO_RECORD_WIN_NUM 0 -+#define MV_AUDIO_PLAYBACK_WIN_NUM 1 -+ -+#define MV_AUDIO_WIN_CTRL_REG(win) (AUDIO_REG_BASE + 0xA04 + ((win)<<3)) -+#define MV_AUDIO_WIN_BASE_REG(win) (AUDIO_REG_BASE + 0xA00 + ((win)<<3)) -+ -+#define MV_AUDIO_RECORD_WIN_CTRL_REG MV_AUDIO_WIN_CTRL_REG(MV_AUDIO_RECORD_WIN_NUM) -+#define MV_AUDIO_RECORD_WIN_BASE_REG MV_AUDIO_WIN_BASE_REG(MV_AUDIO_RECORD_WIN_NUM) -+#define MV_AUDIO_PLAYBACK_WIN_CTRL_REG MV_AUDIO_WIN_CTRL_REG(MV_AUDIO_PLAYBACK_WIN_NUM) -+#define MV_AUDIO_PLAYBACK_WIN_BASE_REG MV_AUDIO_WIN_BASE_REG(MV_AUDIO_PLAYBACK_WIN_NUM) -+ -+ -+/* BITs in Windows 0-3 Control and Base Registers */ -+#define MV_AUDIO_WIN_ENABLE_BIT 0 -+#define MV_AUDIO_WIN_ENABLE_MASK (1<<MV_AUDIO_WIN_ENABLE_BIT) -+ -+#define MV_AUDIO_WIN_TARGET_OFFSET 4 -+#define MV_AUDIO_WIN_TARGET_MASK (0xF<<MV_AUDIO_WIN_TARGET_OFFSET) -+ -+#define MV_AUDIO_WIN_ATTR_OFFSET 8 -+#define MV_AUDIO_WIN_ATTR_MASK (0xFF<<MV_AUDIO_WIN_ATTR_OFFSET) -+ -+#define MV_AUDIO_WIN_SIZE_OFFSET 16 -+#define MV_AUDIO_WIN_SIZE_MASK (0xFFFF<<MV_AUDIO_WIN_SIZE_OFFSET) -+ -+#define MV_AUDIO_WIN_BASE_OFFSET 16 -+#define MV_AUDIO_WIN_BASE_MASK (0xFFFF<<MV_AUDIO_WIN_BASE_OFFSET) -+ -+ -+typedef struct _mvAudioDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+} MV_AUDIO_DEC_WIN; -+ -+ -+MV_STATUS mvAudioInit(MV_VOID); -+MV_STATUS mvAudioWinGet(MV_U32 winNum, MV_AUDIO_DEC_WIN *pAddrDecWin); -+MV_STATUS mvAudioWinSet(MV_U32 winNum, MV_AUDIO_DEC_WIN *pAddrDecWin); -+MV_STATUS mvAudioWinInit(MV_VOID); -+MV_VOID mvAudioAddrDecShow(MV_VOID); -+ -+ -+#endif -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysCesa.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysCesa.c -new file mode 100644 -index 0000000..9b50bae ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysCesa.c -@@ -0,0 +1,382 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvSysCesa.h" -+ -+#if (MV_CESA_VERSION >= 2) -+MV_TARGET tdmaAddrDecPrioTable[] = -+{ -+#if defined(MV_INCLUDE_SDRAM_CS0) -+ SDRAM_CS0, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS1) -+ SDRAM_CS1, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS2) -+ SDRAM_CS2, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS3) -+ SDRAM_CS3, -+#endif -+#if defined(MV_INCLUDE_PEX) -+ PEX0_MEM, -+#endif -+ -+ TBL_TERM -+}; -+ -+/******************************************************************************* -+* mvCesaWinGet - Get TDMA target address window. -+* -+* DESCRIPTION: -+* Get TDMA target address window. -+* -+* INPUT: -+* winNum - TDMA target address decode window number. -+* -+* OUTPUT: -+* pDecWin - TDMA target window data structure. -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaWinGet(MV_U32 winNum, MV_DEC_WIN *pDecWin) -+{ -+ MV_DEC_WIN_PARAMS winParam; -+ MV_U32 sizeReg, baseReg; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_CESA_TDMA_ADDR_DEC_WIN) -+ { -+ mvOsPrintf("%s : ERR. Invalid winNum %d\n", -+ __FUNCTION__, winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ baseReg = MV_REG_READ( MV_CESA_TDMA_BASE_ADDR_REG(winNum) ); -+ sizeReg = MV_REG_READ( MV_CESA_TDMA_WIN_CTRL_REG(winNum) ); -+ -+ /* Check if window is enabled */ -+ if(sizeReg & MV_CESA_TDMA_WIN_ENABLE_MASK) -+ { -+ pDecWin->enable = MV_TRUE; -+ -+ /* Extract window parameters from registers */ -+ winParam.targetId = (sizeReg & MV_CESA_TDMA_WIN_TARGET_MASK) >> MV_CESA_TDMA_WIN_TARGET_OFFSET; -+ winParam.attrib = (sizeReg & MV_CESA_TDMA_WIN_ATTR_MASK) >> MV_CESA_TDMA_WIN_ATTR_OFFSET; -+ winParam.size = (sizeReg & MV_CESA_TDMA_WIN_SIZE_MASK) >> MV_CESA_TDMA_WIN_SIZE_OFFSET; -+ winParam.baseAddr = (baseReg & MV_CESA_TDMA_WIN_BASE_MASK); -+ -+ /* Translate the decode window parameters to address decode struct */ -+ if (MV_OK != mvCtrlParamsToAddrDec(&winParam, pDecWin)) -+ { -+ mvOsPrintf("Failed to translate register parameters to CESA address" \ -+ " decode window structure\n"); -+ return MV_ERROR; -+ } -+ } -+ else -+ { -+ pDecWin->enable = MV_FALSE; -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* cesaWinOverlapDetect - Detect CESA TDMA address windows overlapping -+* -+* DESCRIPTION: -+* An unpredicted behaviur is expected in case TDMA address decode -+* windows overlapps. -+* This function detects TDMA address decode windows overlapping of a -+* specified window. The function does not check the window itself for -+* overlapping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* winNum - address decode window number. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE - if the given address window overlap current address -+* decode map, -+* MV_FALSE - otherwise, MV_ERROR if reading invalid data -+* from registers. -+* -+*******************************************************************************/ -+static MV_STATUS cesaWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 winNumIndex; -+ MV_DEC_WIN addrDecWin; -+ -+ for(winNumIndex=0; winNumIndex<MV_CESA_TDMA_ADDR_DEC_WIN; winNumIndex++) -+ { -+ /* Do not check window itself */ -+ if (winNumIndex == winNum) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvCesaWinGet(winNumIndex, &addrDecWin)) -+ { -+ mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* Do not check disabled windows */ -+ if(addrDecWin.enable == MV_FALSE) -+ { -+ continue; -+ } -+ -+ if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin))) -+ { -+ return MV_TRUE; -+ } -+ } -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* mvCesaTdmaWinSet - Set CESA TDMA target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window, also known as address decode window. -+* After setting this target window, the CESA TDMA will be able to access the -+* target within the address window. -+* -+* INPUT: -+* winNum - CESA TDMA target address decode window number. -+* pAddrDecWin - CESA TDMA target window data structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR - if address window overlapps with other address decode windows. -+* MV_BAD_PARAM - if base address is invalid parameter or target is -+* unknown. -+* -+*******************************************************************************/ -+static MV_STATUS mvCesaTdmaWinSet(MV_U32 winNum, MV_DEC_WIN *pDecWin) -+{ -+ MV_DEC_WIN_PARAMS winParams; -+ MV_U32 sizeReg, baseReg; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_CESA_TDMA_ADDR_DEC_WIN) -+ { -+ mvOsPrintf("mvCesaTdmaWinSet: ERR. Invalid win num %d\n",winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlapps with current windows */ -+ if (MV_TRUE == cesaWinOverlapDetect(winNum, &pDecWin->addrWin)) -+ { -+ mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum); -+ return MV_ERROR; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pDecWin->addrWin.baseLow, pDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvCesaTdmaWinSet: Error setting CESA TDMA window %d to "\ -+ "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, -+ mvCtrlTargetNameGet(pDecWin->target), -+ pDecWin->addrWin.baseLow, -+ pDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ if(MV_OK != mvCtrlAddrDecToParams(pDecWin, &winParams)) -+ { -+ mvOsPrintf("%s: mvCtrlAddrDecToParams Failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* set Size, Attributes and TargetID */ -+ sizeReg = (((winParams.targetId << MV_CESA_TDMA_WIN_TARGET_OFFSET) & MV_CESA_TDMA_WIN_TARGET_MASK) | -+ ((winParams.attrib << MV_CESA_TDMA_WIN_ATTR_OFFSET) & MV_CESA_TDMA_WIN_ATTR_MASK) | -+ ((winParams.size << MV_CESA_TDMA_WIN_SIZE_OFFSET) & MV_CESA_TDMA_WIN_SIZE_MASK)); -+ -+ if (pDecWin->enable == MV_TRUE) -+ { -+ sizeReg |= MV_CESA_TDMA_WIN_ENABLE_MASK; -+ } -+ else -+ { -+ sizeReg &= ~MV_CESA_TDMA_WIN_ENABLE_MASK; -+ } -+ -+ /* Update Base value */ -+ baseReg = (winParams.baseAddr & MV_CESA_TDMA_WIN_BASE_MASK); -+ -+ MV_REG_WRITE( MV_CESA_TDMA_WIN_CTRL_REG(winNum), sizeReg); -+ MV_REG_WRITE( MV_CESA_TDMA_BASE_ADDR_REG(winNum), baseReg); -+ -+ return MV_OK; -+} -+ -+ -+static MV_STATUS mvCesaTdmaAddrDecInit (void) -+{ -+ MV_U32 winNum; -+ MV_STATUS status; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ MV_DEC_WIN cesaWin; -+ MV_U32 winPrioIndex = 0; -+ -+ /* First disable all address decode windows */ -+ for(winNum=0; winNum<MV_CESA_TDMA_ADDR_DEC_WIN; winNum++) -+ { -+ MV_REG_BIT_RESET(MV_CESA_TDMA_WIN_CTRL_REG(winNum), MV_CESA_TDMA_WIN_ENABLE_MASK); -+ } -+ -+ /* Go through all windows in user table until table terminator */ -+ winNum = 0; -+ while( (tdmaAddrDecPrioTable[winPrioIndex] != TBL_TERM) && -+ (winNum < MV_CESA_TDMA_ADDR_DEC_WIN) ) { -+ -+ /* first get attributes from CPU If */ -+ status = mvCpuIfTargetWinGet(tdmaAddrDecPrioTable[winPrioIndex], -+ &cpuAddrDecWin); -+ if(MV_NO_SUCH == status){ -+ winPrioIndex++; -+ continue; -+ } -+ -+ if (MV_OK != status) -+ { -+ mvOsPrintf("cesaInit: TargetWinGet failed. winNum=%d, winIdx=%d, target=%d, status=0x%x\n", -+ winNum, winPrioIndex, tdmaAddrDecPrioTable[winPrioIndex], status); -+ return MV_ERROR; -+ } -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ cesaWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ cesaWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ cesaWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ cesaWin.enable = MV_TRUE; -+ cesaWin.target = tdmaAddrDecPrioTable[winPrioIndex]; -+ -+#if defined(MV646xx) -+ /* Get the default attributes for that target window */ -+ mvCtrlDefAttribGet(cesaWin.target, &cesaWin.addrWinAttr); -+#endif /* MV646xx */ -+ -+ if(MV_OK != mvCesaTdmaWinSet(winNum, &cesaWin)) -+ { -+ mvOsPrintf("mvCesaTdmaWinSet FAILED: winNum=%d\n", -+ winNum); -+ return MV_ERROR; -+ } -+ winNum++; -+ } -+ winPrioIndex++; -+ } -+ return MV_OK; -+} -+#endif /* MV_CESA_VERSION >= 2 */ -+ -+ -+ -+ -+MV_STATUS mvCesaInit (int numOfSession, int queueDepth, char* pSramBase, void *osHandle) -+{ -+ MV_U32 cesaCryptEngBase; -+ MV_CPU_DEC_WIN addrDecWin; -+ -+ if(sizeof(MV_CESA_SRAM_MAP) > MV_CESA_SRAM_SIZE) -+ { -+ mvOsPrintf("mvCesaInit: Wrong SRAM map - %ld > %d\n", -+ sizeof(MV_CESA_SRAM_MAP), MV_CESA_SRAM_SIZE); -+ return MV_FAIL; -+ } -+#if 0 -+ if (mvCpuIfTargetWinGet(CRYPT_ENG, &addrDecWin) == MV_OK) -+ cesaCryptEngBase = addrDecWin.addrWin.baseLow; -+ else -+ { -+ mvOsPrintf("mvCesaInit: ERR. mvCpuIfTargetWinGet failed\n"); -+ return MV_ERROR; -+ } -+#else -+ cesaCryptEngBase = (MV_U32)pSramBase; -+#endif -+ -+#if 0 /* Already done in the platform init */ -+#if (MV_CESA_VERSION >= 2) -+ mvCesaTdmaAddrDecInit(); -+#endif /* MV_CESA_VERSION >= 2 */ -+#endif -+ return mvCesaHalInit(numOfSession, queueDepth, pSramBase, cesaCryptEngBase, -+ osHandle); -+ -+} -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysCesa.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysCesa.h -new file mode 100644 -index 0000000..9bc3fee ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysCesa.h -@@ -0,0 +1,100 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __mvSysCesa_h__ -+#define __mvSysCesa_h__ -+ -+ -+#include "mvCommon.h" -+#include "cesa/mvCesa.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+/***************************** TDMA Registers *************************************/ -+ -+#define MV_CESA_TDMA_ADDR_DEC_WIN 4 -+ -+#define MV_CESA_TDMA_BASE_ADDR_REG(win) (MV_CESA_TDMA_REG_BASE + 0xa00 + (win<<3)) -+ -+#define MV_CESA_TDMA_WIN_CTRL_REG(win) (MV_CESA_TDMA_REG_BASE + 0xa04 + (win<<3)) -+ -+#define MV_CESA_TDMA_WIN_ENABLE_BIT 0 -+#define MV_CESA_TDMA_WIN_ENABLE_MASK (1 << MV_CESA_TDMA_WIN_ENABLE_BIT) -+ -+#define MV_CESA_TDMA_WIN_TARGET_OFFSET 4 -+#define MV_CESA_TDMA_WIN_TARGET_MASK (0xf << MV_CESA_TDMA_WIN_TARGET_OFFSET) -+ -+#define MV_CESA_TDMA_WIN_ATTR_OFFSET 8 -+#define MV_CESA_TDMA_WIN_ATTR_MASK (0xff << MV_CESA_TDMA_WIN_ATTR_OFFSET) -+ -+#define MV_CESA_TDMA_WIN_SIZE_OFFSET 16 -+#define MV_CESA_TDMA_WIN_SIZE_MASK (0xFFFF << MV_CESA_TDMA_WIN_SIZE_OFFSET) -+ -+#define MV_CESA_TDMA_WIN_BASE_OFFSET 16 -+#define MV_CESA_TDMA_WIN_BASE_MASK (0xFFFF << MV_CESA_TDMA_WIN_BASE_OFFSET) -+ -+ -+MV_STATUS mvCesaInit (int numOfSession, int queueDepth, char* pSramBase, void *osHandle); -+ -+#endif -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysDram.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysDram.c -new file mode 100644 -index 0000000..7df47b3 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysDram.c -@@ -0,0 +1,348 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+/* includes */ -+ -+#include "ddr2/mvDramIf.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "ctrlEnv/sys/mvSysDram.h" -+ -+/* #define MV_DEBUG */ -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin); -+ -+/******************************************************************************* -+* mvDramIfWinSet - Set DRAM interface address decode window -+* -+* DESCRIPTION: -+* This function sets DRAM interface address decode window. -+* -+* INPUT: -+* target - System target. Use only SDRAM targets. -+* pAddrDecWin - SDRAM address window structure. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK -+* otherwise. -+*******************************************************************************/ -+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin) -+{ -+ MV_U32 baseReg=0,sizeReg=0; -+ MV_U32 baseToReg=0 , sizeToReg=0; -+ -+ /* Check parameters */ -+ if (!MV_TARGET_IS_DRAM(target)) -+ { -+ mvOsPrintf("mvDramIfWinSet: target %d is not SDRAM\n", target); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlaps with current enabled windows */ -+ if (MV_TRUE == sdramIfWinOverlap(target, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("mvDramIfWinSet: ERR. Target %d overlaps\n", target); -+ return MV_BAD_PARAM; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvDramIfWinSet:Error setting DRAM interface window %d."\ -+ "\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ target, -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ /* read base register*/ -+ baseReg = MV_REG_READ(SDRAM_BASE_ADDR_REG(0,target)); -+ -+ /* read size register */ -+ sizeReg = MV_REG_READ(SDRAM_SIZE_REG(0,target)); -+ -+ /* BaseLow[31:16] => base register [31:16] */ -+ baseToReg = pAddrDecWin->addrWin.baseLow & SCBAR_BASE_MASK; -+ -+ /* Write to address decode Base Address Register */ -+ baseReg &= ~SCBAR_BASE_MASK; -+ baseReg |= baseToReg; -+ -+ /* Translate the given window size to register format */ -+ sizeToReg = ctrlSizeToReg(pAddrDecWin->addrWin.size, SCSR_SIZE_ALIGNMENT); -+ -+ /* Size parameter validity check. */ -+ if (-1 == sizeToReg) -+ { -+ mvOsPrintf("mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n",target); -+ return MV_BAD_PARAM; -+ } -+ -+ /* set size */ -+ sizeReg &= ~SCSR_SIZE_MASK; -+ /* Size is located at upper 16 bits */ -+ sizeReg |= (sizeToReg << SCSR_SIZE_OFFS); -+ -+ /* enable/Disable */ -+ if (MV_TRUE == pAddrDecWin->enable) -+ { -+ sizeReg |= SCSR_WIN_EN; -+ } -+ else -+ { -+ sizeReg &= ~SCSR_WIN_EN; -+ } -+ -+ /* 3) Write to address decode Base Address Register */ -+ MV_REG_WRITE(SDRAM_BASE_ADDR_REG(0,target), baseReg); -+ -+ /* Write to address decode Size Register */ -+ MV_REG_WRITE(SDRAM_SIZE_REG(0,target), sizeReg); -+ -+ return MV_OK; -+} -+/******************************************************************************* -+* mvDramIfWinGet - Get DRAM interface address decode window -+* -+* DESCRIPTION: -+* This function gets DRAM interface address decode window. -+* -+* INPUT: -+* target - System target. Use only SDRAM targets. -+* -+* OUTPUT: -+* pAddrDecWin - SDRAM address window structure. -+* -+* RETURN: -+* MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK -+* otherwise. -+*******************************************************************************/ -+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin) -+{ -+ MV_U32 baseReg,sizeReg; -+ MV_U32 sizeRegVal; -+ /* Check parameters */ -+ if (!MV_TARGET_IS_DRAM(target)) -+ { -+ mvOsPrintf("mvDramIfWinGet: target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ /* Read base and size registers */ -+ sizeReg = MV_REG_READ(SDRAM_SIZE_REG(0,target)); -+ baseReg = MV_REG_READ(SDRAM_BASE_ADDR_REG(0,target)); -+ -+ sizeRegVal = (sizeReg & SCSR_SIZE_MASK) >> SCSR_SIZE_OFFS; -+ -+ pAddrDecWin->addrWin.size = ctrlRegToSize(sizeRegVal, -+ SCSR_SIZE_ALIGNMENT); -+ -+ /* Check if ctrlRegToSize returned OK */ -+ if (-1 == pAddrDecWin->addrWin.size) -+ { -+ mvOsPrintf("mvDramIfWinGet: size of target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ /* Extract base address */ -+ /* Base register [31:16] ==> baseLow[31:16] */ -+ pAddrDecWin->addrWin.baseLow = baseReg & SCBAR_BASE_MASK; -+ -+ pAddrDecWin->addrWin.baseHigh = 0; -+ -+ -+ if (sizeReg & SCSR_WIN_EN) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ } -+ -+ return MV_OK; -+} -+/******************************************************************************* -+* mvDramIfWinEnable - Enable/Disable SDRAM address decode window -+* -+* DESCRIPTION: -+* This function enable/Disable SDRAM address decode window. -+* -+* INPUT: -+* target - System target. Use only SDRAM targets. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR in case function parameter are invalid, MV_OK otherewise. -+* -+*******************************************************************************/ -+MV_STATUS mvDramIfWinEnable(MV_TARGET target, MV_BOOL enable) -+{ -+ MV_DRAM_DEC_WIN addrDecWin; -+ -+ /* Check parameters */ -+ if (!MV_TARGET_IS_DRAM(target)) -+ { -+ mvOsPrintf("mvDramIfWinEnable: target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ if (enable == MV_TRUE) -+ { /* First check for overlap with other enabled windows */ -+ if (MV_OK != mvDramIfWinGet(target, &addrDecWin)) -+ { -+ mvOsPrintf("mvDramIfWinEnable:ERR. Getting target %d failed.\n", -+ target); -+ return MV_ERROR; -+ } -+ /* Check for overlapping */ -+ if (MV_FALSE == sdramIfWinOverlap(target, &(addrDecWin.addrWin))) -+ { -+ /* No Overlap. Enable address decode winNum window */ -+ MV_REG_BIT_SET(SDRAM_SIZE_REG(0,target), SCSR_WIN_EN); -+ } -+ else -+ { /* Overlap detected */ -+ mvOsPrintf("mvDramIfWinEnable: ERR. Target %d overlap detect\n", -+ target); -+ return MV_ERROR; -+ } -+ } -+ else -+ { /* Disable address decode winNum window */ -+ MV_REG_BIT_RESET(SDRAM_SIZE_REG(0, target), SCSR_WIN_EN); -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* sdramIfWinOverlap - Check if an address window overlap an SDRAM address window -+* -+* DESCRIPTION: -+* This function scan each SDRAM address decode window to test if it -+* overlapps the given address windoow -+* -+* INPUT: -+* target - SDRAM target where the function skips checking. -+* pAddrDecWin - The tested address window for overlapping with -+* SDRAM windows. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlaps any enabled address -+* decode map, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_TARGET targetNum; -+ MV_DRAM_DEC_WIN addrDecWin; -+ -+ for(targetNum = SDRAM_CS0; targetNum < MV_DRAM_MAX_CS ; targetNum++) -+ { -+ /* don't check our winNum or illegal targets */ -+ if (targetNum == target) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvDramIfWinGet(targetNum, &addrDecWin)) -+ { -+ mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n"); -+ return MV_ERROR; -+ } -+ -+ /* Do not check disabled windows */ -+ if (MV_FALSE == addrDecWin.enable) -+ { -+ continue; -+ } -+ -+ if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin)) -+ { -+ mvOsPrintf( -+ "sdramIfWinOverlap: Required target %d overlap winNum %d\n", -+ target, targetNum); -+ return MV_TRUE; -+ } -+ } -+ -+ return MV_FALSE; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysDram.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysDram.h -new file mode 100644 -index 0000000..f16b947 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysDram.h -@@ -0,0 +1,80 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __sysDram -+#define __sysDram -+ -+/* This structure describes CPU interface address decode window */ -+typedef struct _mvDramIfDecWin -+{ -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+}MV_DRAM_DEC_WIN; -+ -+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin); -+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin); -+MV_STATUS mvDramIfWinEnable(MV_TARGET target, MV_BOOL enable); -+ -+#endif -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysGbe.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysGbe.c -new file mode 100644 -index 0000000..663acd3 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysGbe.c -@@ -0,0 +1,658 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#include "ctrlEnv/sys/mvSysGbe.h" -+ -+ -+ -+typedef struct _mvEthDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+}MV_ETH_DEC_WIN; -+ -+MV_TARGET ethAddrDecPrioTap[] = -+{ -+#if defined(MV_INCLUDE_SDRAM_CS0) -+ SDRAM_CS0, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS1) -+ SDRAM_CS1, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS2) -+ SDRAM_CS2, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS3) -+ SDRAM_CS3, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS0) -+ DEVICE_CS0, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS1) -+ DEVICE_CS1, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS2) -+ DEVICE_CS2, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS3) -+ DEVICE_CS3, -+#endif -+#if defined(MV_INCLUDE_PEX) -+ PEX0_IO, -+#endif -+ TBL_TERM -+}; -+ -+static MV_STATUS ethWinOverlapDetect(int port, MV_U32 winNum, MV_ADDR_WIN *pAddrWin); -+static MV_STATUS mvEthWinSet(int port, MV_U32 winNum, MV_ETH_DEC_WIN *pAddrDecWin); -+static MV_STATUS mvEthWinGet(int port, MV_U32 winNum, MV_ETH_DEC_WIN *pAddrDecWin); -+ -+ -+/******************************************************************************* -+* mvEthWinInit - Initialize ETH address decode windows -+* -+* DESCRIPTION: -+* This function initialize ETH window decode unit. It set the -+* default address decode windows of the unit. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if setting fail. -+*******************************************************************************/ -+/* Configure EthDrv memory map registes. */ -+MV_STATUS mvEthWinInit (int port) -+{ -+ MV_U32 winNum, status, winPrioIndex=0, i, regVal=0; -+ MV_ETH_DEC_WIN ethWin; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ static MV_U32 accessProtReg = 0; -+ -+#if (MV_ETH_VERSION <= 1) -+ static MV_BOOL isFirst = MV_TRUE; -+ -+ if(isFirst == MV_FALSE) -+ { -+ MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), accessProtReg); -+ return MV_OK; -+ } -+ isFirst = MV_FALSE; -+#endif /* MV_GIGA_ETH_VERSION */ -+ -+ /* Initiate Ethernet address decode */ -+ -+ /* First disable all address decode windows */ -+ for(winNum=0; winNum<ETH_MAX_DECODE_WIN; winNum++) -+ { -+ regVal |= MV_BIT_MASK(winNum); -+ } -+ MV_REG_WRITE(ETH_BASE_ADDR_ENABLE_REG(port), regVal); -+ -+ /* Go through all windows in user table until table terminator */ -+ for (winNum=0; ((ethAddrDecPrioTap[winPrioIndex] != TBL_TERM) && -+ (winNum < ETH_MAX_DECODE_WIN)); ) -+ { -+ /* first get attributes from CPU If */ -+ status = mvCpuIfTargetWinGet(ethAddrDecPrioTap[winPrioIndex], -+ &cpuAddrDecWin); -+ -+ if(MV_NO_SUCH == status) -+ { -+ winPrioIndex++; -+ continue; -+ } -+ if (MV_OK != status) -+ { -+ mvOsPrintf("mvEthWinInit: ERR. mvCpuIfTargetWinGet failed\n"); -+ return MV_ERROR; -+ } -+ -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ ethWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ ethWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ ethWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ ethWin.enable = MV_TRUE; -+ ethWin.target = ethAddrDecPrioTap[winPrioIndex]; -+ -+ if(MV_OK != mvEthWinSet(port, winNum, ðWin)) -+ { -+ mvOsPrintf("mvEthWinInit: ERR. mvEthWinSet failed winNum=%d\n", -+ winNum); -+ return MV_ERROR; -+ } -+ winNum++; -+ } -+ winPrioIndex ++; -+ } -+ -+ /* set full access to all windows. */ -+ for(i=0; i<winNum; i++) -+ { -+ accessProtReg |= (FULL_ACCESS << (i*2)); -+ } -+ MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), accessProtReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthWinSet - Set ETH target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window, also known as address decode window. -+* After setting this target window, the ETH will be able to access the -+* target within the address window. -+* -+* INPUT: -+* winNum - ETH to target address decode window number. -+* pAddrDecWin - ETH target window data structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if address window overlapps with other address decode windows. -+* MV_BAD_PARAM if base address is invalid parameter or target is -+* unknown. -+* -+*******************************************************************************/ -+MV_STATUS mvEthWinSet(int port, MV_U32 winNum, MV_ETH_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttribs; -+ MV_DEC_REGS decRegs; -+ -+ /* Parameter checking */ -+ if (winNum >= ETH_MAX_DECODE_WIN) -+ { -+ mvOsPrintf("mvEthWinSet: ERR. Invalid win num %d\n",winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlapps with current windows */ -+ if (MV_TRUE == ethWinOverlapDetect(port, winNum, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("mvEthWinSet: ERR. Window %d overlap\n", winNum); -+ return MV_ERROR; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvEthWinSet: Error setting Ethernet window %d to "\ -+ "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, -+ mvCtrlTargetNameGet(pAddrDecWin->target), -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ -+ decRegs.baseReg = MV_REG_READ(ETH_WIN_BASE_REG(port, winNum)); -+ decRegs.sizeReg = MV_REG_READ(ETH_WIN_SIZE_REG(port, winNum)); -+ -+ if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs)) -+ { -+ mvOsPrintf("mvEthWinSet:mvCtrlAddrDecToReg Failed\n"); -+ return MV_ERROR; -+ } -+ -+ mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs); -+ -+ /* set attributes */ -+ decRegs.baseReg &= ~ETH_WIN_ATTR_MASK; -+ decRegs.baseReg |= targetAttribs.attrib << ETH_WIN_ATTR_OFFS; -+ /* set target ID */ -+ decRegs.baseReg &= ~ETH_WIN_TARGET_MASK; -+ decRegs.baseReg |= targetAttribs.targetId << ETH_WIN_TARGET_OFFS; -+ -+ /* for the safe side we disable the window before writing the new -+ values */ -+ mvEthWinEnable(port, winNum, MV_FALSE); -+ MV_REG_WRITE(ETH_WIN_BASE_REG(port, winNum), decRegs.baseReg); -+ -+ /* Write to address decode Size Register */ -+ MV_REG_WRITE(ETH_WIN_SIZE_REG(port, winNum), decRegs.sizeReg); -+ -+ /* Enable address decode target window */ -+ if (pAddrDecWin->enable == MV_TRUE) -+ { -+ mvEthWinEnable(port, winNum, MV_TRUE); -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvETHWinGet - Get dma peripheral target address window. -+* -+* DESCRIPTION: -+* Get ETH peripheral target address window. -+* -+* INPUT: -+* winNum - ETH to target address decode window number. -+* -+* OUTPUT: -+* pAddrDecWin - ETH target window data structure. -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvEthWinGet(int port, MV_U32 winNum, MV_ETH_DEC_WIN *pAddrDecWin) -+{ -+ MV_DEC_REGS decRegs; -+ MV_TARGET_ATTRIB targetAttrib; -+ -+ /* Parameter checking */ -+ if (winNum >= ETH_MAX_DECODE_WIN) -+ { -+ mvOsPrintf("mvEthWinGet: ERR. Invalid winNum %d\n", winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ decRegs.baseReg = MV_REG_READ(ETH_WIN_BASE_REG(port, winNum)); -+ decRegs.sizeReg = MV_REG_READ(ETH_WIN_SIZE_REG(port, winNum)); -+ -+ if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin))) -+ { -+ mvOsPrintf("mvAhbToMbusWinGet: mvCtrlRegToAddrDec Failed \n"); -+ return MV_ERROR; -+ } -+ -+ /* attrib and targetId */ -+ targetAttrib.attrib = -+ (decRegs.baseReg & ETH_WIN_ATTR_MASK) >> ETH_WIN_ATTR_OFFS; -+ targetAttrib.targetId = -+ (decRegs.baseReg & ETH_WIN_TARGET_MASK) >> ETH_WIN_TARGET_OFFS; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ /* Check if window is enabled */ -+ if (~(MV_REG_READ(ETH_BASE_ADDR_ENABLE_REG(port))) & (1 << winNum) ) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthWinEnable - Enable/disable a ETH to target address window -+* -+* DESCRIPTION: -+* This function enable/disable a ETH to target address window. -+* According to parameter 'enable' the routine will enable the -+* window, thus enabling ETH accesses (before enabling the window it is -+* tested for overlapping). Otherwise, the window will be disabled. -+* -+* INPUT: -+* winNum - ETH to target address decode window number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_ERROR if decode window number was wrong or enabled window overlapps. -+* -+*******************************************************************************/ -+MV_STATUS mvEthWinEnable(int port, MV_U32 winNum,MV_BOOL enable) -+{ -+ MV_ETH_DEC_WIN addrDecWin; -+ -+ /* Parameter checking */ -+ if (winNum >= ETH_MAX_DECODE_WIN) -+ { -+ mvOsPrintf("mvEthTargetWinEnable:ERR. Invalid winNum%d\n",winNum); -+ return MV_ERROR; -+ } -+ -+ if (enable == MV_TRUE) -+ { /* First check for overlap with other enabled windows */ -+ /* Get current window */ -+ if (MV_OK != mvEthWinGet(port, winNum, &addrDecWin)) -+ { -+ mvOsPrintf("mvEthTargetWinEnable:ERR. targetWinGet fail\n"); -+ return MV_ERROR; -+ } -+ /* Check for overlapping */ -+ if (MV_FALSE == ethWinOverlapDetect(port, winNum, &(addrDecWin.addrWin))) -+ { -+ /* No Overlap. Enable address decode target window */ -+ MV_REG_BIT_RESET(ETH_BASE_ADDR_ENABLE_REG(port), (1 << winNum)); -+ } -+ else -+ { /* Overlap detected */ -+ mvOsPrintf("mvEthTargetWinEnable:ERR. Overlap detected\n"); -+ return MV_ERROR; -+ } -+ } -+ else -+ { /* Disable address decode target window */ -+ MV_REG_BIT_SET(ETH_BASE_ADDR_ENABLE_REG(port), (1 << winNum)); -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthWinTargetGet - Get Window number associated with target -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+* window number -+* -+*******************************************************************************/ -+MV_U32 mvEthWinTargetGet(int port, MV_TARGET target) -+{ -+ MV_ETH_DEC_WIN decWin; -+ MV_U32 winNum; -+ -+ /* Check parameters */ -+ if (target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetGet: target %d is Illigal\n", target); -+ return 0xffffffff; -+ } -+ -+ for (winNum=0; winNum<ETH_MAX_DECODE_WIN; winNum++) -+ { -+ if (mvEthWinGet(port, winNum,&decWin) != MV_OK) -+ { -+ mvOsPrintf("mvAhbToMbusWinTargetGet: window returned error\n"); -+ return 0xffffffff; -+ } -+ -+ if (decWin.enable == MV_TRUE) -+ { -+ if (decWin.target == target) -+ { -+ return winNum; -+ } -+ } -+ } -+ return 0xFFFFFFFF; -+} -+ -+/******************************************************************************* -+* mvEthProtWinSet - Set access protection of Ethernet to target window. -+* -+* DESCRIPTION: -+* Each Ethernet port can be configured with access attributes for each -+* of the Ethenret to target windows (address decode windows). This -+* function sets access attributes to a given window for the given channel. -+* -+* INPUTS: -+* ethPort - ETH channel number. See MV_ETH_CHANNEL enumerator. -+* winNum - IETH to target address decode window number. -+* access - IETH access rights. See MV_ACCESS_RIGHTS enumerator. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR in case window number is invalid or access right reserved. -+* -+*******************************************************************************/ -+MV_STATUS mvEthProtWinSet(MV_U32 portNo, MV_U32 winNum, MV_ACCESS_RIGHTS access) -+{ -+ MV_U32 protReg; -+ -+ /* Parameter checking */ -+ if(portNo >= mvCtrlEthMaxPortGet()) -+ { -+ mvOsPrintf("mvEthProtWinSet:ERR. Invalid port number %d\n", portNo); -+ return MV_ERROR; -+ } -+ -+ if (winNum >= ETH_MAX_DECODE_WIN) -+ { -+ mvOsPrintf("mvEthProtWinSet:ERR. Invalid winNum%d\n",winNum); -+ return MV_ERROR; -+ } -+ -+ if((access == ACC_RESERVED) || (access >= MAX_ACC_RIGHTS)) -+ { -+ mvOsPrintf("mvEthProtWinSet:ERR. Inv access param %d\n", access); -+ return MV_ERROR; -+ } -+ /* Read current protection register */ -+ protReg = MV_REG_READ(ETH_ACCESS_PROTECT_REG(portNo)); -+ -+ /* Clear protection window field */ -+ protReg &= ~(ETH_PROT_WIN_MASK(winNum)); -+ -+ /* Set new protection field value */ -+ protReg |= (access << (ETH_PROT_WIN_OFFS(winNum))); -+ -+ /* Write protection register back */ -+ MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(portNo), protReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* ethWinOverlapDetect - Detect ETH address windows overlapping -+* -+* DESCRIPTION: -+* An unpredicted behaviur is expected in case ETH address decode -+* windows overlapps. -+* This function detects ETH address decode windows overlapping of a -+* specified window. The function does not check the window itself for -+* overlapping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* winNum - address decode window number. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data -+* from registers. -+* -+*******************************************************************************/ -+static MV_STATUS ethWinOverlapDetect(int port, MV_U32 winNum, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 baseAddrEnableReg; -+ MV_U32 winNumIndex; -+ MV_ETH_DEC_WIN addrDecWin; -+ -+ /* Read base address enable register. Do not check disabled windows */ -+ baseAddrEnableReg = MV_REG_READ(ETH_BASE_ADDR_ENABLE_REG(port)); -+ -+ for (winNumIndex=0; winNumIndex<ETH_MAX_DECODE_WIN; winNumIndex++) -+ { -+ /* Do not check window itself */ -+ if (winNumIndex == winNum) -+ { -+ continue; -+ } -+ -+ /* Do not check disabled windows */ -+ if (baseAddrEnableReg & (1 << winNumIndex)) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvEthWinGet(port, winNumIndex, &addrDecWin)) -+ { -+ mvOsPrintf("ethWinOverlapDetect: ERR. TargetWinGet failed\n"); -+ return MV_ERROR; -+ } -+/* -+ mvOsPrintf("ethWinOverlapDetect:\n -+ winNumIndex =%d baseHigh =0x%x baseLow=0x%x size=0x%x enable=0x%x\n", -+ winNumIndex, -+ addrDecWin.addrWin.baseHigh, -+ addrDecWin.addrWin.baseLow, -+ addrDecWin.addrWin.size, -+ addrDecWin.enable); -+*/ -+ if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin))) -+ { -+ return MV_TRUE; -+ } -+ } -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* mvEthAddrDecShow - Print the Etherent address decode map. -+* -+* DESCRIPTION: -+* This function print the Etherent address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+void mvEthPortAddrDecShow(int port) -+{ -+ MV_ETH_DEC_WIN win; -+ int i; -+ -+ mvOsOutput( "\n" ); -+ mvOsOutput( "ETH %d:\n", port ); -+ mvOsOutput( "----\n" ); -+ -+ for( i = 0; i < ETH_MAX_DECODE_WIN; i++ ) -+ { -+ memset( &win, 0, sizeof(ETH_MAX_DECODE_WIN) ); -+ -+ mvOsOutput( "win%d - ", i ); -+ -+ if( mvEthWinGet(port, i, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ mvOsOutput( "%s base %08x, ", -+ mvCtrlTargetNameGet(win.target), win.addrWin.baseLow ); -+ mvOsOutput( "...." ); -+ mvSizePrint( win.addrWin.size ); -+ -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+ return; -+} -+ -+void mvEthAddrDecShow(void) -+{ -+ int port; -+ -+ for(port=0; port<mvCtrlEthMaxPortGet(); port++) -+ { -+ if (MV_FALSE == mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port)) continue; -+ -+ mvEthPortAddrDecShow(port); -+ } -+} -+ -+ -+void mvEthInit(void) -+{ -+ MV_U32 port; -+ -+ /* Power down all existing ports */ -+ for(port=0; port<mvCtrlEthMaxPortGet(); port++) -+ { -+ if (MV_FALSE == mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port)) -+ continue; -+ -+ mvEthPortPowerUp(port); -+ mvEthWinInit(port); -+ } -+ mvEthHalInit(); -+} -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysGbe.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysGbe.h -new file mode 100644 -index 0000000..aac5517 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysGbe.h -@@ -0,0 +1,113 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSysGbeh -+#define __INCmvSysGbeh -+ -+#include "mvCommon.h" -+#include "eth/mvEth.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+#define ETH_WIN_BASE_REG(port, win) (MV_ETH_REG_BASE(port) + 0x200 + ((win)<<3)) -+#define ETH_WIN_SIZE_REG(port, win) (MV_ETH_REG_BASE(port) + 0x204 + ((win)<<3)) -+#define ETH_WIN_REMAP_REG(port, win) (MV_ETH_REG_BASE(port) + 0x280 + ((win)<<2)) -+#define ETH_BASE_ADDR_ENABLE_REG(port) (MV_ETH_REG_BASE(port) + 0x290) -+#define ETH_ACCESS_PROTECT_REG(port) (MV_ETH_REG_BASE(port) + 0x294) -+ -+/**** Address decode parameters ****/ -+ -+/* Ethernet Base Address Register bits */ -+#define ETH_MAX_DECODE_WIN 6 -+#define ETH_MAX_HIGH_ADDR_REMAP_WIN 4 -+ -+/* Ethernet Port Access Protect (EPAP) register */ -+ -+/* The target associated with this window*/ -+#define ETH_WIN_TARGET_OFFS 0 -+#define ETH_WIN_TARGET_MASK (0xf << ETH_WIN_TARGET_OFFS) -+/* The target attributes Associated with window */ -+#define ETH_WIN_ATTR_OFFS 8 -+#define ETH_WIN_ATTR_MASK (0xff << ETH_WIN_ATTR_OFFS) -+ -+/* Ethernet Port Access Protect Register (EPAPR) */ -+#define ETH_PROT_NO_ACCESS NO_ACCESS_ALLOWED -+#define ETH_PROT_READ_ONLY READ_ONLY -+#define ETH_PROT_FULL_ACCESS FULL_ACCESS -+#define ETH_PROT_WIN_OFFS(winNum) (2 * (winNum)) -+#define ETH_PROT_WIN_MASK(winNum) (0x3 << ETH_PROT_WIN_OFFS(winNum)) -+ -+MV_STATUS mvEthWinInit (int port); -+MV_STATUS mvEthWinEnable(int port, MV_U32 winNum, MV_BOOL enable); -+MV_U32 mvEthWinTargetGet(int port, MV_TARGET target); -+MV_STATUS mvEthProtWinSet(MV_U32 portNo, MV_U32 winNum, MV_ACCESS_RIGHTS -+ access); -+ -+void mvEthPortAddrDecShow(int port); -+ -+MV_VOID mvEthAddrDecShow(MV_VOID); -+ -+void mvEthInit(void); -+ -+#endif -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.c -new file mode 100644 -index 0000000..9576acb ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.c -@@ -0,0 +1,1697 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "ctrlEnv/sys/mvSysPex.h" -+ -+/* this structure describes the mapping between a Pex Window and a CPU target*/ -+typedef struct _pexWinToTarget -+{ -+ MV_TARGET target; -+ MV_BOOL enable; -+ -+}PEX_WIN_TO_TARGET; -+ -+/* this array is a priority array that define How Pex windows should be -+configured , We have only 6 Pex Windows that can be configured , but we -+have maximum of 9 CPU target windows ! the following array is a priority -+array where the lowest index has the highest priotiy and the highest -+index has the lowest priority of being cnfigured */ -+ -+MV_U32 pexDevBarPrioTable[] = -+{ -+#if defined(MV_INCLUDE_DEVICE_CS0) -+ DEVICE_CS0, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS1) -+ DEVICE_CS1, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS2) -+ DEVICE_CS2, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS3) -+ DEVICE_CS3, -+#endif -+/* -+#if defined(MV_INCLUDE_DEVICE_CS4) -+ DEVICE_CS4, -+#endif -+*/ -+ TBL_TERM -+}; -+ -+ -+/* PEX Wins registers offsets are inconsecutive. This struct describes WIN */ -+/* register offsets and its function where its is located. */ -+/* Also, PEX address remap registers offsets are inconsecutive. This struct */ -+/* describes address remap register offsets */ -+typedef struct _pexWinRegInfo -+{ -+ MV_U32 baseLowRegOffs; -+ MV_U32 baseHighRegOffs; -+ MV_U32 sizeRegOffs; -+ MV_U32 remapLowRegOffs; -+ MV_U32 remapHighRegOffs; -+ -+}PEX_WIN_REG_INFO; -+ -+static MV_STATUS pexWinOverlapDetect(MV_U32 pexIf, MV_U32 winNum, -+ MV_ADDR_WIN *pAddrWin); -+static MV_STATUS pexWinRegInfoGet(MV_U32 pexIf, MV_U32 winNum, -+ PEX_WIN_REG_INFO *pWinRegInfo); -+ -+static MV_STATUS pexBarIsValid(MV_U32 baseLow, MV_U32 size); -+ -+static MV_BOOL pexIsWinWithinBar(MV_U32 pexIf,MV_ADDR_WIN *pAddrWin); -+static MV_BOOL pexBarOverlapDetect(MV_U32 pexIf,MV_U32 barNum, -+ MV_ADDR_WIN *pAddrWin); -+const MV_8* pexBarNameGet( MV_U32 bar ); -+ -+ -+/******************************************************************************* -+* mvPexInit - Initialize PEX interfaces -+* -+* DESCRIPTION: -+* -+* This function is responsible of intialization of the Pex Interface , It -+* configure the Pex Bars and Windows in the following manner: -+* -+* Assumptions : -+* Bar0 is always internal registers bar -+* Bar1 is always the DRAM bar -+* Bar2 is always the Device bar -+* -+* 1) Sets the Internal registers bar base by obtaining the base from -+* the CPU Interface -+* 2) Sets the DRAM bar base and size by getting the base and size from -+* the CPU Interface when the size is the sum of all enabled DRAM -+* chip selects and the base is the base of CS0 . -+* 3) Sets the Device bar base and size by getting these values from the -+* CPU Interface when the base is the base of the lowest base of the -+* Device chip selects, and the -+* -+* -+* INPUT: -+* -+* pexIf - PEX interface number. -+* -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK if function success otherwise MV_ERROR or MV_BAD_PARAM -+* -+*******************************************************************************/ -+MV_STATUS mvPexInit(MV_U32 pexIf, MV_PEX_TYPE pexType) -+{ -+ MV_U32 bar; -+ MV_U32 winNum; -+ MV_PEX_BAR pexBar; -+ MV_PEX_DEC_WIN pexWin; -+ MV_CPU_DEC_WIN addrDecWin; -+ MV_TARGET target; -+ MV_U32 pexCurrWin=0; -+ MV_U32 status; -+ /* default and exapntion rom -+ are always configured */ -+ -+#ifndef MV_DISABLE_PEX_DEVICE_BAR -+ MV_U32 winIndex; -+ MV_U32 maxBase=0, sizeOfMaxBase=0; -+ MV_U32 pexStartWindow; -+#endif -+ -+ /* Parameter checking */ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexInit: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Enabled CPU access to PCI-Express */ -+ mvCpuIfEnablePex(pexIf, pexType); -+ -+ /* Start with bars */ -+ /* First disable all PEX bars*/ -+ for (bar = 0; bar < PEX_MAX_BARS; bar++) -+ { -+ if (PEX_INTER_REGS_BAR != bar) -+ { -+ if (MV_OK != mvPexBarEnable(pexIf, bar, MV_FALSE)) -+ { -+ mvOsPrintf("mvPexInit:mvPexBarEnable bar =%d failed \n",bar); -+ return MV_ERROR; -+ } -+ -+ } -+ -+ } -+ -+ /* and disable all PEX target windows */ -+ for (winNum = 0; winNum < PEX_MAX_TARGET_WIN - 2; winNum++) -+ { -+ if (MV_OK != mvPexTargetWinEnable(pexIf, winNum, MV_FALSE)) -+ { -+ mvOsPrintf("mvPexInit:mvPexTargetWinEnable winNum =%d failed \n", -+ winNum); -+ return MV_ERROR; -+ -+ } -+ } -+ -+ /* Now, go through all bars*/ -+ -+ -+ -+/******************************************************************************/ -+/* Internal registers bar */ -+/******************************************************************************/ -+ bar = PEX_INTER_REGS_BAR; -+ -+ /* we only open the bar , no need to open windows for this bar */ -+ -+ /* first get the CS attribute from the CPU Interface */ -+ if (MV_OK !=mvCpuIfTargetWinGet(INTER_REGS,&addrDecWin)) -+ { -+ mvOsPrintf("mvPexInit: ERR. mvCpuIfTargetWinGet failed target =%d\n",INTER_REGS); -+ return MV_ERROR; -+ } -+ -+ pexBar.addrWin.baseHigh = addrDecWin.addrWin.baseHigh; -+ pexBar.addrWin.baseLow = addrDecWin.addrWin.baseLow; -+ pexBar.addrWin.size = addrDecWin.addrWin.size; -+ pexBar.enable = MV_TRUE; -+ -+ if (MV_OK != mvPexBarSet(pexIf, bar, &pexBar)) -+ { -+ mvOsPrintf("mvPexInit: ERR. mvPexBarSet %d failed\n", bar); -+ return MV_ERROR; -+ } -+ -+/******************************************************************************/ -+/* DRAM bar */ -+/******************************************************************************/ -+ -+ bar = PEX_DRAM_BAR; -+ -+ pexBar.addrWin.size = 0; -+ -+ for (target = SDRAM_CS0;target < MV_DRAM_MAX_CS; target++ ) -+ { -+ -+ status = mvCpuIfTargetWinGet(target,&addrDecWin); -+ -+ if((MV_NO_SUCH == status)&&(target != SDRAM_CS0)) -+ { -+ continue; -+ } -+ -+ /* first get attributes from CPU If */ -+ if (MV_OK != status) -+ { -+ mvOsPrintf("mvPexInit: ERR. mvCpuIfTargetWinGet failed target =%d\n",target); -+ return MV_ERROR; -+ } -+ if (addrDecWin.enable == MV_TRUE) -+ { -+ /* the base is the base of DRAM CS0 always */ -+ if (SDRAM_CS0 == target ) -+ { -+ pexBar.addrWin.baseHigh = addrDecWin.addrWin.baseHigh; -+ pexBar.addrWin.baseLow = addrDecWin.addrWin.baseLow; -+ -+ } -+ -+ /* increment the bar size to be the sum of the size of all -+ DRAM chips selecs */ -+ pexBar.addrWin.size += addrDecWin.addrWin.size; -+ -+ /* set a Pex window for this target ! -+ DRAM CS always will have a Pex Window , and is not a -+ part of the priority table */ -+ pexWin.addrWin.baseHigh = addrDecWin.addrWin.baseHigh; -+ pexWin.addrWin.baseLow = addrDecWin.addrWin.baseLow; -+ pexWin.addrWin.size = addrDecWin.addrWin.size; -+ -+ /* we disable the windows at first because we are not -+ sure that it is witihin bar boundries */ -+ pexWin.enable =MV_FALSE; -+ pexWin.target = target; -+ pexWin.targetBar = bar; -+ -+ if (MV_OK != mvPexTargetWinSet(pexIf,pexCurrWin++,&pexWin)) -+ { -+ mvOsPrintf("mvPexInit: ERR. mvPexTargetWinSet failed\n"); -+ return MV_ERROR; -+ } -+ } -+ } -+ -+ /* check if the size of the bar is illeggal */ -+ if (-1 == ctrlSizeToReg(pexBar.addrWin.size, PXBCR_BAR_SIZE_ALIGNMENT)) -+ { -+ /* try to get a good size */ -+ pexBar.addrWin.size = ctrlSizeRegRoundUp(pexBar.addrWin.size, -+ PXBCR_BAR_SIZE_ALIGNMENT); -+ } -+ -+ /* check if the size and base are valid */ -+ if (MV_TRUE == pexBarOverlapDetect(pexIf,bar,&pexBar.addrWin)) -+ { -+ mvOsPrintf("mvPexInit:Warning :Bar %d size is illigal\n",bar); -+ mvOsPrintf("it will be disabled\n"); -+ mvOsPrintf("please check Pex and CPU windows configuration\n"); -+ } -+ else -+ { -+ pexBar.enable = MV_TRUE; -+ -+ /* configure the bar */ -+ if (MV_OK != mvPexBarSet(pexIf, bar, &pexBar)) -+ { -+ mvOsPrintf("mvPexInit: ERR. mvPexBarSet %d failed\n", bar); -+ return MV_ERROR; -+ } -+ -+ /* after the bar was configured then we enable the Pex windows*/ -+ for (winNum = 0;winNum < pexCurrWin ;winNum++) -+ { -+ if (MV_OK != mvPexTargetWinEnable(pexIf, winNum, MV_TRUE)) -+ { -+ mvOsPrintf("mvPexInit: Can't enable window =%d\n",winNum); -+ return MV_ERROR; -+ } -+ -+ } -+ } -+ -+/******************************************************************************/ -+/* DEVICE bar */ -+/******************************************************************************/ -+ -+/* Open the Device BAR for non linux only */ -+#ifndef MV_DISABLE_PEX_DEVICE_BAR -+ -+ /* then device bar*/ -+ bar = PEX_DEVICE_BAR; -+ -+ /* save the starting window */ -+ pexStartWindow = pexCurrWin; -+ pexBar.addrWin.size = 0; -+ pexBar.addrWin.baseLow = 0xffffffff; -+ pexBar.addrWin.baseHigh = 0; -+ maxBase = 0; -+ -+ for (target = DEV_TO_TARGET(START_DEV_CS);target < DEV_TO_TARGET(MV_DEV_MAX_CS); target++ ) -+ { -+ status = mvCpuIfTargetWinGet(target,&addrDecWin); -+ -+ if (MV_NO_SUCH == status) -+ { -+ continue; -+ } -+ -+ if (MV_OK != status) -+ { -+ mvOsPrintf("mvPexInit: ERR. mvCpuIfTargetWinGet failed target =%d\n",target); -+ return MV_ERROR; -+ } -+ -+ if (addrDecWin.enable == MV_TRUE) -+ { -+ /* get the minimum base */ -+ if (addrDecWin.addrWin.baseLow < pexBar.addrWin.baseLow) -+ { -+ pexBar.addrWin.baseLow = addrDecWin.addrWin.baseLow; -+ } -+ -+ /* get the maximum base */ -+ if (addrDecWin.addrWin.baseLow > maxBase) -+ { -+ maxBase = addrDecWin.addrWin.baseLow; -+ sizeOfMaxBase = addrDecWin.addrWin.size; -+ } -+ -+ /* search in the priority table for this target */ -+ for (winIndex = 0; pexDevBarPrioTable[winIndex] != TBL_TERM; -+ winIndex++) -+ { -+ if (pexDevBarPrioTable[winIndex] != target) -+ { -+ continue; -+ } -+ else if (pexDevBarPrioTable[winIndex] == target) -+ { -+ /*found it */ -+ -+ /* if the index of this target in the prio table is valid -+ then we set the Pex window for this target, a valid index is -+ an index that is lower than the number of the windows that -+ was not configured yet */ -+ -+ /* we subtract 2 always because the default and expantion -+ rom windows are always configured */ -+ if ( pexCurrWin < PEX_MAX_TARGET_WIN - 2) -+ { -+ /* set a Pex window for this target ! */ -+ pexWin.addrWin.baseHigh = addrDecWin.addrWin.baseHigh; -+ pexWin.addrWin.baseLow = addrDecWin.addrWin.baseLow; -+ pexWin.addrWin.size = addrDecWin.addrWin.size; -+ -+ /* we disable the windows at first because we are not -+ sure that it is witihin bar boundries */ -+ pexWin.enable = MV_FALSE; -+ pexWin.target = target; -+ pexWin.targetBar = bar; -+ -+ if (MV_OK != mvPexTargetWinSet(pexIf,pexCurrWin++, -+ &pexWin)) -+ { -+ mvOsPrintf("mvPexInit: ERR. Window Set failed\n"); -+ return MV_ERROR; -+ } -+ } -+ } -+ } -+ } -+ } -+ -+ pexBar.addrWin.size = maxBase - pexBar.addrWin.baseLow + sizeOfMaxBase; -+ pexBar.enable = MV_TRUE; -+ -+ /* check if the size of the bar is illegal */ -+ if (-1 == ctrlSizeToReg(pexBar.addrWin.size, PXBCR_BAR_SIZE_ALIGNMENT)) -+ { -+ /* try to get a good size */ -+ pexBar.addrWin.size = ctrlSizeRegRoundUp(pexBar.addrWin.size, -+ PXBCR_BAR_SIZE_ALIGNMENT); -+ } -+ -+ /* check if the size and base are valid */ -+ if (MV_TRUE == pexBarOverlapDetect(pexIf,bar,&pexBar.addrWin)) -+ { -+ mvOsPrintf("mvPexInit:Warning :Bar %d size is illigal\n",bar); -+ mvOsPrintf("it will be disabled\n"); -+ mvOsPrintf("please check Pex and CPU windows configuration\n"); -+ } -+ else -+ { -+ if (MV_OK != mvPexBarSet(pexIf, bar, &pexBar)) -+ { -+ mvOsPrintf("mvPexInit: ERR. mvPexBarSet %d failed\n", bar); -+ return MV_ERROR; -+ } -+ -+ /* now enable the windows */ -+ for (winNum = pexStartWindow; winNum < pexCurrWin ; winNum++) -+ { -+ if (MV_OK != mvPexTargetWinEnable(pexIf, winNum, MV_TRUE)) -+ { -+ mvOsPrintf("mvPexInit:mvPexTargetWinEnable winNum =%d failed \n", -+ winNum); -+ return MV_ERROR; -+ } -+ } -+ } -+ -+#endif -+ -+ return mvPexHalInit(pexIf, pexType); -+ -+} -+ -+/******************************************************************************* -+* mvPexTargetWinSet - Set PEX to peripheral target address window BAR -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_OK if PEX BAR target window was set correctly, -+* MV_BAD_PARAM on bad params -+* MV_ERROR otherwise -+* (e.g. address window overlapps with other active PEX target window). -+* -+*******************************************************************************/ -+MV_STATUS mvPexTargetWinSet(MV_U32 pexIf, MV_U32 winNum, -+ MV_PEX_DEC_WIN *pAddrDecWin) -+{ -+ -+ MV_DEC_REGS decRegs; -+ PEX_WIN_REG_INFO winRegInfo; -+ MV_TARGET_ATTRIB targetAttribs; -+ -+ /* Parameter checking */ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexTargetWinSet: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ -+ if (winNum >= PEX_MAX_TARGET_WIN) -+ { -+ mvOsPrintf("mvPexTargetWinSet: ERR. Invalid PEX winNum %d\n", winNum); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ /* get the pex Window registers offsets */ -+ pexWinRegInfoGet(pexIf,winNum,&winRegInfo); -+ -+ -+ if (MV_TRUE == pAddrDecWin->enable) -+ { -+ -+ /* 2) Check if the requested window overlaps with current windows */ -+ if (MV_TRUE == pexWinOverlapDetect(pexIf,winNum, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("mvPexTargetWinSet: ERR. Target %d overlap\n", winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* 2) Check if the requested window overlaps with current windows */ -+ if (MV_FALSE == pexIsWinWithinBar(pexIf,&pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("mvPexTargetWinSet: Win %d should be in bar boundries\n", -+ winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ } -+ -+ -+ -+ /* read base register*/ -+ -+ if (winRegInfo.baseLowRegOffs) -+ { -+ decRegs.baseReg = MV_REG_READ(winRegInfo.baseLowRegOffs); -+ } -+ else -+ { -+ decRegs.baseReg = 0; -+ } -+ -+ if (winRegInfo.sizeRegOffs) -+ { -+ decRegs.sizeReg = MV_REG_READ(winRegInfo.sizeRegOffs); -+ } -+ else -+ { -+ decRegs.sizeReg =0; -+ } -+ -+ if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs)) -+ { -+ mvOsPrintf("mvPexTargetWinSet:mvCtrlAddrDecToReg Failed\n"); -+ return MV_ERROR; -+ } -+ -+ /* enable\Disable */ -+ if (MV_TRUE == pAddrDecWin->enable) -+ { -+ decRegs.sizeReg |= PXWCR_WIN_EN; -+ } -+ else -+ { -+ decRegs.sizeReg &= ~PXWCR_WIN_EN; -+ } -+ -+ -+ /* clear bit location */ -+ decRegs.sizeReg &= ~PXWCR_WIN_BAR_MAP_MASK; -+ -+ /* set bar Mapping */ -+ if (pAddrDecWin->targetBar == 1) -+ { -+ decRegs.sizeReg |= PXWCR_WIN_BAR_MAP_BAR1; -+ } -+ else if (pAddrDecWin->targetBar == 2) -+ { -+ decRegs.sizeReg |= PXWCR_WIN_BAR_MAP_BAR2; -+ } -+ -+ mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs); -+ -+ /* set attributes */ -+ decRegs.sizeReg &= ~PXWCR_ATTRIB_MASK; -+ decRegs.sizeReg |= targetAttribs.attrib << PXWCR_ATTRIB_OFFS; -+ /* set target ID */ -+ decRegs.sizeReg &= ~PXWCR_TARGET_MASK; -+ decRegs.sizeReg |= targetAttribs.targetId << PXWCR_TARGET_OFFS; -+ -+ -+ /* 3) Write to address decode Base Address Register */ -+ -+ if (winRegInfo.baseLowRegOffs) -+ { -+ MV_REG_WRITE(winRegInfo.baseLowRegOffs, decRegs.baseReg); -+ } -+ -+ /* write size reg */ -+ if (winRegInfo.sizeRegOffs) -+ { -+ if ((MV_PEX_WIN_DEFAULT == winNum)|| -+ (MV_PEX_WIN_EXP_ROM == winNum)) -+ { -+ /* clear size because there is no size field*/ -+ decRegs.sizeReg &= ~PXWCR_SIZE_MASK; -+ -+ /* clear enable because there is no enable field*/ -+ decRegs.sizeReg &= ~PXWCR_WIN_EN; -+ -+ } -+ -+ MV_REG_WRITE(winRegInfo.sizeRegOffs, decRegs.sizeReg); -+ } -+ -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvPexTargetWinGet - Get PEX to peripheral target address window -+* -+* DESCRIPTION: -+* Get the PEX to peripheral target address window BAR. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* bar - BAR to be accessed by slave. -+* -+* OUTPUT: -+* pAddrBarWin - PEX target window information data structure. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexTargetWinGet(MV_U32 pexIf, MV_U32 winNum, -+ MV_PEX_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttrib; -+ MV_DEC_REGS decRegs; -+ -+ PEX_WIN_REG_INFO winRegInfo; -+ -+ /* Parameter checking */ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexTargetWinGet: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ -+ if (winNum >= PEX_MAX_TARGET_WIN) -+ { -+ mvOsPrintf("mvPexTargetWinGet: ERR. Invalid PEX winNum %d\n", winNum); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ /* get the pex Window registers offsets */ -+ pexWinRegInfoGet(pexIf,winNum,&winRegInfo); -+ -+ /* read base register*/ -+ if (winRegInfo.baseLowRegOffs) -+ { -+ decRegs.baseReg = MV_REG_READ(winRegInfo.baseLowRegOffs); -+ } -+ else -+ { -+ decRegs.baseReg = 0; -+ } -+ -+ /* read size reg */ -+ if (winRegInfo.sizeRegOffs) -+ { -+ decRegs.sizeReg = MV_REG_READ(winRegInfo.sizeRegOffs); -+ } -+ else -+ { -+ decRegs.sizeReg =0; -+ } -+ -+ if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin))) -+ { -+ mvOsPrintf("mvPexTargetWinGet: mvCtrlRegToAddrDec Failed \n"); -+ return MV_ERROR; -+ -+ } -+ -+ if (decRegs.sizeReg & PXWCR_WIN_EN) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ -+ } -+ -+ -+ #if 0 -+ if (-1 == pAddrDecWin->addrWin.size) -+ { -+ return MV_ERROR; -+ } -+ #endif -+ -+ -+ /* get target bar */ -+ if ((decRegs.sizeReg & PXWCR_WIN_BAR_MAP_MASK) == PXWCR_WIN_BAR_MAP_BAR1 ) -+ { -+ pAddrDecWin->targetBar = 1; -+ } -+ else if ((decRegs.sizeReg & PXWCR_WIN_BAR_MAP_MASK) == -+ PXWCR_WIN_BAR_MAP_BAR2 ) -+ { -+ pAddrDecWin->targetBar = 2; -+ } -+ -+ /* attrib and targetId */ -+ pAddrDecWin->attrib = (decRegs.sizeReg & PXWCR_ATTRIB_MASK) >> -+ PXWCR_ATTRIB_OFFS; -+ pAddrDecWin->targetId = (decRegs.sizeReg & PXWCR_TARGET_MASK) >> -+ PXWCR_TARGET_OFFS; -+ -+ targetAttrib.attrib = pAddrDecWin->attrib; -+ targetAttrib.targetId = pAddrDecWin->targetId; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ return MV_OK; -+ -+} -+ -+ -+/******************************************************************************* -+* mvPexTargetWinEnable - Enable/disable a PEX BAR window -+* -+* DESCRIPTION: -+* This function enable/disable a PEX BAR window. -+* if parameter 'enable' == MV_TRUE the routine will enable the -+* window, thus enabling PEX accesses for that BAR (before enabling the -+* window it is tested for overlapping). Otherwise, the window will -+* be disabled. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* bar - BAR to be accessed by slave. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexTargetWinEnable(MV_U32 pexIf,MV_U32 winNum, MV_BOOL enable) -+{ -+ PEX_WIN_REG_INFO winRegInfo; -+ MV_PEX_DEC_WIN addrDecWin; -+ -+ /* Parameter checking */ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexTargetWinEnable: ERR. Invalid PEX If %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ -+ if (winNum >= PEX_MAX_TARGET_WIN) -+ { -+ mvOsPrintf("mvPexTargetWinEnable ERR. Invalid PEX winNum %d\n", winNum); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ -+ /* get the pex Window registers offsets */ -+ pexWinRegInfoGet(pexIf,winNum,&winRegInfo); -+ -+ -+ /* if the address windows is disabled , we only disable the appropriare -+ pex window and ignore other settings */ -+ -+ if (MV_FALSE == enable) -+ { -+ -+ /* this is not relevant to default and expantion rom -+ windows */ -+ if (winRegInfo.sizeRegOffs) -+ { -+ if ((MV_PEX_WIN_DEFAULT != winNum)&& -+ (MV_PEX_WIN_EXP_ROM != winNum)) -+ { -+ MV_REG_BIT_RESET(winRegInfo.sizeRegOffs, PXWCR_WIN_EN); -+ } -+ } -+ -+ } -+ else -+ { -+ if (MV_OK != mvPexTargetWinGet(pexIf,winNum, &addrDecWin)) -+ { -+ mvOsPrintf("mvPexTargetWinEnable: mvPexTargetWinGet Failed\n"); -+ return MV_ERROR; -+ } -+ -+ /* Check if the requested window overlaps with current windows */ -+ if (MV_TRUE == pexWinOverlapDetect(pexIf,winNum, &addrDecWin.addrWin)) -+ { -+ mvOsPrintf("mvPexTargetWinEnable: ERR. Target %d overlap\n", winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ if (MV_FALSE == pexIsWinWithinBar(pexIf,&addrDecWin.addrWin)) -+ { -+ mvOsPrintf("mvPexTargetWinEnable: Win %d should be in bar boundries\n", -+ winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ -+ /* this is not relevant to default and expantion rom -+ windows */ -+ if (winRegInfo.sizeRegOffs) -+ { -+ if ((MV_PEX_WIN_DEFAULT != winNum)&& -+ (MV_PEX_WIN_EXP_ROM != winNum)) -+ { -+ MV_REG_BIT_SET(winRegInfo.sizeRegOffs, PXWCR_WIN_EN); -+ } -+ } -+ -+ -+ } -+ -+ return MV_OK; -+ -+} -+ -+ -+ -+/******************************************************************************* -+* mvPexTargetWinRemap - Set PEX to target address window remap. -+* -+* DESCRIPTION: -+* The PEX interface supports remap of the BAR original address window. -+* For each BAR it is possible to define a remap address. For example -+* an address 0x12345678 that hits BAR 0x10 (SDRAM CS[0]) will be modified -+* according to remap register but will also be targeted to the -+* SDRAM CS[0]. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* bar - Peripheral target enumerator accessed by slave. -+* pAddrWin - Address window to be checked. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexTargetWinRemap(MV_U32 pexIf, MV_U32 winNum, -+ MV_PEX_REMAP_WIN *pAddrWin) -+{ -+ -+ PEX_WIN_REG_INFO winRegInfo; -+ -+ /* Parameter checking */ -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexTargetWinRemap: ERR. Invalid PEX interface num %d\n", -+ pexIf); -+ return MV_BAD_PARAM; -+ } -+ if (MV_PEX_WIN_DEFAULT == winNum) -+ { -+ mvOsPrintf("mvPexTargetWinRemap: ERR. Invalid PEX win num %d\n", -+ winNum); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ if (MV_IS_NOT_ALIGN(pAddrWin->addrWin.baseLow, PXWRR_REMAP_ALIGNMENT)) -+ { -+ mvOsPrintf("mvPexTargetWinRemap: Error remap PEX interface %d win %d."\ -+ "\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ pexIf, -+ winNum, -+ pAddrWin->addrWin.baseLow, -+ pAddrWin->addrWin.size); -+ -+ return MV_ERROR; -+ } -+ -+ pexWinRegInfoGet(pexIf, winNum, &winRegInfo); -+ -+ /* Set remap low register value */ -+ MV_REG_WRITE(winRegInfo.remapLowRegOffs, pAddrWin->addrWin.baseLow); -+ -+ /* Skip base high settings if the BAR has only base low (32-bit) */ -+ if (0 != winRegInfo.remapHighRegOffs) -+ { -+ MV_REG_WRITE(winRegInfo.remapHighRegOffs, pAddrWin->addrWin.baseHigh); -+ } -+ -+ -+ if (pAddrWin->enable == MV_TRUE) -+ { -+ MV_REG_BIT_SET(winRegInfo.remapLowRegOffs,PXWRR_REMAP_EN); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(winRegInfo.remapLowRegOffs,PXWRR_REMAP_EN); -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvPexTargetWinRemapEnable - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+ -+MV_STATUS mvPexTargetWinRemapEnable(MV_U32 pexIf, MV_U32 winNum, -+ MV_BOOL enable) -+{ -+ PEX_WIN_REG_INFO winRegInfo; -+ -+ /* Parameter checking */ -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexTargetWinRemap: ERR. Invalid PEX interface num %d\n", -+ pexIf); -+ return MV_BAD_PARAM; -+ } -+ if (MV_PEX_WIN_DEFAULT == winNum) -+ { -+ mvOsPrintf("mvPexTargetWinRemap: ERR. Invalid PEX win num %d\n", -+ winNum); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ -+ pexWinRegInfoGet(pexIf, winNum, &winRegInfo); -+ -+ if (enable == MV_TRUE) -+ { -+ MV_REG_BIT_SET(winRegInfo.remapLowRegOffs,PXWRR_REMAP_EN); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(winRegInfo.remapLowRegOffs,PXWRR_REMAP_EN); -+ } -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvPexBarSet - Set PEX bar address and size -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexBarSet(MV_U32 pexIf, -+ MV_U32 barNum, -+ MV_PEX_BAR *pAddrWin) -+{ -+ MV_U32 regBaseLow; -+ MV_U32 regSize,sizeToReg; -+ -+ -+ /* check parameters */ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexBarSet: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ -+ if(barNum >= PEX_MAX_BARS) -+ { -+ mvOsPrintf("mvPexBarSet: ERR. Invalid bar number %d\n", barNum); -+ return MV_BAD_PARAM; -+ } -+ -+ -+ if (pAddrWin->addrWin.size == 0) -+ { -+ mvOsPrintf("mvPexBarSet: Size zero is Illigal\n" ); -+ return MV_BAD_PARAM; -+ } -+ -+ -+ /* Check if the window complies with PEX spec */ -+ if (MV_TRUE != pexBarIsValid(pAddrWin->addrWin.baseLow, -+ pAddrWin->addrWin.size)) -+ { -+ mvOsPrintf("mvPexBarSet: ERR. Target %d window invalid\n", barNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* 2) Check if the requested bar overlaps with current bars */ -+ if (MV_TRUE == pexBarOverlapDetect(pexIf,barNum, &pAddrWin->addrWin)) -+ { -+ mvOsPrintf("mvPexBarSet: ERR. Target %d overlap\n", barNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Get size register value according to window size */ -+ sizeToReg = ctrlSizeToReg(pAddrWin->addrWin.size, PXBCR_BAR_SIZE_ALIGNMENT); -+ -+ /* Read bar size */ -+ if (PEX_INTER_REGS_BAR != barNum) /* internal registers have no size */ -+ { -+ regSize = MV_REG_READ(PEX_BAR_CTRL_REG(pexIf,barNum)); -+ -+ /* Size parameter validity check. */ -+ if (-1 == sizeToReg) -+ { -+ mvOsPrintf("mvPexBarSet: ERR. Target BAR %d size invalid.\n",barNum); -+ return MV_BAD_PARAM; -+ } -+ -+ regSize &= ~PXBCR_BAR_SIZE_MASK; -+ regSize |= (sizeToReg << PXBCR_BAR_SIZE_OFFS) ; -+ -+ MV_REG_WRITE(PEX_BAR_CTRL_REG(pexIf,barNum),regSize); -+ -+ } -+ -+ /* set size */ -+ -+ -+ -+ /* Read base address low */ -+ regBaseLow = MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf, -+ PEX_MV_BAR_BASE(barNum))); -+ -+ /* clear current base */ -+ if (PEX_INTER_REGS_BAR == barNum) -+ { -+ regBaseLow &= ~PXBIR_BASE_MASK; -+ regBaseLow |= (pAddrWin->addrWin.baseLow & PXBIR_BASE_MASK); -+ } -+ else -+ { -+ regBaseLow &= ~PXBR_BASE_MASK; -+ regBaseLow |= (pAddrWin->addrWin.baseLow & PXBR_BASE_MASK); -+ } -+ -+ /* if we had a previous value that contain the bar type (MeM\IO), we want to -+ restore it */ -+ regBaseLow |= PEX_BAR_DEFAULT_ATTRIB; -+ -+ -+ -+ /* write base low */ -+ MV_REG_WRITE(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_MV_BAR_BASE(barNum)), -+ regBaseLow); -+ -+ if (pAddrWin->addrWin.baseHigh != 0) -+ { -+ /* Read base address high */ -+ MV_REG_WRITE(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_MV_BAR_BASE_HIGH(barNum)), -+ pAddrWin->addrWin.baseHigh); -+ -+ } -+ -+ /* lastly enable the Bar */ -+ if (pAddrWin->enable == MV_TRUE) -+ { -+ if (PEX_INTER_REGS_BAR != barNum) /* internal registers -+ are enabled always */ -+ { -+ MV_REG_BIT_SET(PEX_BAR_CTRL_REG(pexIf,barNum),PXBCR_BAR_EN); -+ } -+ } -+ else if (MV_FALSE == pAddrWin->enable) -+ { -+ if (PEX_INTER_REGS_BAR != barNum) /* internal registers -+ are enabled always */ -+ { -+ MV_REG_BIT_RESET(PEX_BAR_CTRL_REG(pexIf,barNum),PXBCR_BAR_EN); -+ } -+ -+ } -+ -+ -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPexBarGet - Get PEX bar address and size -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+ -+MV_STATUS mvPexBarGet(MV_U32 pexIf, -+ MV_U32 barNum, -+ MV_PEX_BAR *pAddrWin) -+{ -+ /* check parameters */ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexBarGet: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ -+ if(barNum >= PEX_MAX_BARS) -+ { -+ mvOsPrintf("mvPexBarGet: ERR. Invalid bar number %d\n", barNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* read base low */ -+ pAddrWin->addrWin.baseLow = -+ MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_MV_BAR_BASE(barNum))); -+ -+ -+ if (PEX_INTER_REGS_BAR == barNum) -+ { -+ pAddrWin->addrWin.baseLow &= PXBIR_BASE_MASK; -+ } -+ else -+ { -+ pAddrWin->addrWin.baseLow &= PXBR_BASE_MASK; -+ } -+ -+ -+ /* read base high */ -+ pAddrWin->addrWin.baseHigh = -+ MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_MV_BAR_BASE_HIGH(barNum))); -+ -+ -+ /* Read bar size */ -+ if (PEX_INTER_REGS_BAR != barNum) /* internal registers have no size */ -+ { -+ pAddrWin->addrWin.size = MV_REG_READ(PEX_BAR_CTRL_REG(pexIf,barNum)); -+ -+ /* check if enable or not */ -+ if (pAddrWin->addrWin.size & PXBCR_BAR_EN) -+ { -+ pAddrWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrWin->enable = MV_FALSE; -+ } -+ -+ /* now get the size */ -+ pAddrWin->addrWin.size &= PXBCR_BAR_SIZE_MASK; -+ pAddrWin->addrWin.size >>= PXBCR_BAR_SIZE_OFFS; -+ -+ pAddrWin->addrWin.size = ctrlRegToSize(pAddrWin->addrWin.size, -+ PXBCR_BAR_SIZE_ALIGNMENT); -+ -+ } -+ else /* PEX_INTER_REGS_BAR */ -+ { -+ pAddrWin->addrWin.size = INTER_REGS_SIZE; -+ pAddrWin->enable = MV_TRUE; -+ } -+ -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvPexBarEnable - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+ -+ -+MV_STATUS mvPexBarEnable(MV_U32 pexIf, MV_U32 barNum, MV_BOOL enable) -+{ -+ -+ MV_PEX_BAR pexBar; -+ -+ /* check parameters */ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexBarEnable: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ -+ -+ if(barNum >= PEX_MAX_BARS) -+ { -+ mvOsPrintf("mvPexBarEnable: ERR. Invalid bar number %d\n", barNum); -+ return MV_BAD_PARAM; -+ } -+ -+ if (PEX_INTER_REGS_BAR == barNum) -+ { -+ if (MV_TRUE == enable) -+ { -+ return MV_OK; -+ } -+ else -+ { -+ return MV_ERROR; -+ } -+ } -+ -+ -+ if (MV_FALSE == enable) -+ { -+ /* disable bar and quit */ -+ MV_REG_BIT_RESET(PEX_BAR_CTRL_REG(pexIf,barNum),PXBCR_BAR_EN); -+ return MV_OK; -+ } -+ -+ /* else */ -+ -+ if (mvPexBarGet(pexIf,barNum,&pexBar) != MV_OK) -+ { -+ mvOsPrintf("mvPexBarEnable: mvPexBarGet Failed\n"); -+ return MV_ERROR; -+ -+ } -+ -+ if (MV_TRUE == pexBar.enable) -+ { -+ /* it is already enabled !!! */ -+ return MV_OK; -+ } -+ -+ /* else enable the bar*/ -+ -+ pexBar.enable = MV_TRUE; -+ -+ if (mvPexBarSet(pexIf,barNum,&pexBar) != MV_OK) -+ { -+ mvOsPrintf("mvPexBarEnable: mvPexBarSet Failed\n"); -+ return MV_ERROR; -+ -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* pexWinOverlapDetect - Detect address windows overlapping -+* -+* DESCRIPTION: -+* This function detects address window overlapping of a given address -+* window in PEX BARs. -+* -+* INPUT: -+* pAddrWin - Address window to be checked. -+* bar - BAR to be accessed by slave. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+static MV_BOOL pexWinOverlapDetect(MV_U32 pexIf, -+ MV_U32 winNum, -+ MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 win; -+ MV_PEX_DEC_WIN addrDecWin; -+ -+ -+ for(win = 0; win < PEX_MAX_TARGET_WIN -2 ; win++) -+ { -+ /* don't check our target or illegal targets */ -+ if (winNum == win) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvPexTargetWinGet(pexIf, win, &addrDecWin)) -+ { -+ mvOsPrintf("pexWinOverlapDetect: ERR. TargetWinGet failed win=%x\n", -+ win); -+ return MV_ERROR; -+ } -+ -+ /* Do not check disabled windows */ -+ if (MV_FALSE == addrDecWin.enable) -+ { -+ continue; -+ } -+ -+ -+ if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin)) -+ { -+ mvOsPrintf("pexWinOverlapDetect: winNum %d overlap current %d\n", -+ winNum, win); -+ return MV_TRUE; -+ } -+ } -+ -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* pexIsWinWithinBar - Detect if address is within PEX bar boundries -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+static MV_BOOL pexIsWinWithinBar(MV_U32 pexIf, -+ MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 bar; -+ MV_PEX_BAR addrDecWin; -+ -+ for(bar = 0; bar < PEX_MAX_BARS; bar++) -+ { -+ -+ /* Get window parameters */ -+ if (MV_OK != mvPexBarGet(pexIf, bar, &addrDecWin)) -+ { -+ mvOsPrintf("pexIsWinWithinBar: ERR. mvPexBarGet failed\n"); -+ return MV_ERROR; -+ } -+ -+ /* Do not check disabled bars */ -+ if (MV_FALSE == addrDecWin.enable) -+ { -+ continue; -+ } -+ -+ -+ if(MV_TRUE == ctrlWinWithinWinTest(pAddrWin, &addrDecWin.addrWin)) -+ { -+ return MV_TRUE; -+ } -+ } -+ -+ return MV_FALSE; -+ -+} -+ -+/******************************************************************************* -+* pexBarOverlapDetect - Detect address windows overlapping -+* -+* DESCRIPTION: -+* This function detects address window overlapping of a given address -+* window in PEX BARs. -+* -+* INPUT: -+* pAddrWin - Address window to be checked. -+* bar - BAR to be accessed by slave. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+static MV_BOOL pexBarOverlapDetect(MV_U32 pexIf, -+ MV_U32 barNum, -+ MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 bar; -+ MV_PEX_BAR barDecWin; -+ -+ -+ for(bar = 0; bar < PEX_MAX_BARS; bar++) -+ { -+ /* don't check our target or illegal targets */ -+ if (barNum == bar) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvPexBarGet(pexIf, bar, &barDecWin)) -+ { -+ mvOsPrintf("pexBarOverlapDetect: ERR. TargetWinGet failed\n"); -+ return MV_ERROR; -+ } -+ -+ /* don'nt check disabled bars */ -+ if (barDecWin.enable == MV_FALSE) -+ { -+ continue; -+ } -+ -+ -+ if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &barDecWin.addrWin)) -+ { -+ mvOsPrintf("pexBarOverlapDetect: winNum %d overlap current %d\n", -+ barNum, bar); -+ return MV_TRUE; -+ } -+ } -+ -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* pexBarIsValid - Check if the given address window is valid -+* -+* DESCRIPTION: -+* PEX spec restrict BAR base to be aligned to BAR size. -+* This function checks if the given address window is valid. -+* -+* INPUT: -+* baseLow - 32bit low base address. -+* size - Window size. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the address window is valid, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+static MV_STATUS pexBarIsValid(MV_U32 baseLow, MV_U32 size) -+{ -+ -+ /* PCI spec restrict BAR base to be aligned to BAR size */ -+ if(MV_IS_NOT_ALIGN(baseLow, size)) -+ { -+ return MV_ERROR; -+ } -+ else -+ { -+ return MV_TRUE; -+ } -+ -+ return MV_TRUE; -+} -+ -+/******************************************************************************* -+* pexBarRegInfoGet - Get BAR register information -+* -+* DESCRIPTION: -+* PEX BARs registers offsets are inconsecutive. -+* This function gets a PEX BAR register information like register offsets -+* and function location of the BAR. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* bar - The PEX BAR in question. -+* -+* OUTPUT: -+* pBarRegInfo - BAR register info struct. -+* -+* RETURN: -+* MV_BAD_PARAM when bad parameters ,MV_ERROR on error ,othewise MV_OK -+* -+*******************************************************************************/ -+static MV_STATUS pexWinRegInfoGet(MV_U32 pexIf, -+ MV_U32 winNum, -+ PEX_WIN_REG_INFO *pWinRegInfo) -+{ -+ -+ if ((winNum >= 0)&&(winNum <=3)) -+ { -+ pWinRegInfo->baseLowRegOffs = PEX_WIN0_3_BASE_REG(pexIf,winNum); -+ pWinRegInfo->baseHighRegOffs = 0; -+ pWinRegInfo->sizeRegOffs = PEX_WIN0_3_CTRL_REG(pexIf,winNum); -+ pWinRegInfo->remapLowRegOffs = PEX_WIN0_3_REMAP_REG(pexIf,winNum); -+ pWinRegInfo->remapHighRegOffs = 0; -+ } -+ else if ((winNum >= 4)&&(winNum <=5)) -+ { -+ pWinRegInfo->baseLowRegOffs = PEX_WIN4_5_BASE_REG(pexIf,winNum); -+ pWinRegInfo->baseHighRegOffs = 0; -+ pWinRegInfo->sizeRegOffs = PEX_WIN4_5_CTRL_REG(pexIf,winNum); -+ pWinRegInfo->remapLowRegOffs = PEX_WIN4_5_REMAP_REG(pexIf,winNum); -+ pWinRegInfo->remapHighRegOffs = PEX_WIN4_5_REMAP_HIGH_REG(pexIf,winNum); -+ -+ } -+ else if (MV_PEX_WIN_DEFAULT == winNum) -+ { -+ pWinRegInfo->baseLowRegOffs = 0; -+ pWinRegInfo->baseHighRegOffs = 0; -+ pWinRegInfo->sizeRegOffs = PEX_WIN_DEFAULT_CTRL_REG(pexIf); -+ pWinRegInfo->remapLowRegOffs = 0; -+ pWinRegInfo->remapHighRegOffs = 0; -+ } -+ else if (MV_PEX_WIN_EXP_ROM == winNum) -+ { -+ pWinRegInfo->baseLowRegOffs = 0; -+ pWinRegInfo->baseHighRegOffs = 0; -+ pWinRegInfo->sizeRegOffs = PEX_WIN_EXP_ROM_CTRL_REG(pexIf); -+ pWinRegInfo->remapLowRegOffs = PEX_WIN_EXP_ROM_REMAP_REG(pexIf); -+ pWinRegInfo->remapHighRegOffs = 0; -+ -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* pexBarNameGet - Get the string name of PEX BAR. -+* -+* DESCRIPTION: -+* This function get the string name of PEX BAR. -+* -+* INPUT: -+* bar - PEX bar number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* pointer to the string name of PEX BAR. -+* -+*******************************************************************************/ -+const MV_8* pexBarNameGet( MV_U32 bar ) -+{ -+ switch( bar ) -+ { -+ case PEX_INTER_REGS_BAR: -+ return "Internal Regs Bar0...."; -+ case PEX_DRAM_BAR: -+ return "DRAM Bar1............."; -+ case PEX_DEVICE_BAR: -+ return "Devices Bar2.........."; -+ default: -+ return "Bar unknown"; -+ } -+} -+/******************************************************************************* -+* mvPexAddrDecShow - Print the PEX address decode map (BARs and windows). -+* -+* DESCRIPTION: -+* This function print the PEX address decode map (BARs and windows). -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvPexAddrDecShow(MV_VOID) -+{ -+ MV_PEX_BAR pexBar; -+ MV_PEX_DEC_WIN win; -+ MV_U32 pexIf; -+ MV_U32 bar,winNum; -+ -+ for( pexIf = 0; pexIf < mvCtrlPexMaxIfGet(); pexIf++ ) -+ { -+ if (MV_FALSE == mvCtrlPwrClckGet(PEX_UNIT_ID, pexIf)) continue; -+ mvOsOutput( "\n" ); -+ mvOsOutput( "PEX%d:\n", pexIf ); -+ mvOsOutput( "-----\n" ); -+ -+ mvOsOutput( "\nPex Bars \n\n"); -+ -+ for( bar = 0; bar < PEX_MAX_BARS; bar++ ) -+ { -+ memset( &pexBar, 0, sizeof(MV_PEX_BAR) ); -+ -+ mvOsOutput( "%s ", pexBarNameGet(bar) ); -+ -+ if( mvPexBarGet( pexIf, bar, &pexBar ) == MV_OK ) -+ { -+ if( pexBar.enable ) -+ { -+ mvOsOutput( "base %08x, ", pexBar.addrWin.baseLow ); -+ mvSizePrint( pexBar.addrWin.size ); -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+ mvOsOutput( "\nPex Decode Windows\n\n"); -+ -+ for( winNum = 0; winNum < PEX_MAX_TARGET_WIN - 2; winNum++) -+ { -+ memset( &win, 0,sizeof(MV_PEX_DEC_WIN) ); -+ -+ mvOsOutput( "win%d - ", winNum ); -+ -+ if ( mvPexTargetWinGet(pexIf,winNum,&win) == MV_OK) -+ { -+ if (win.enable) -+ { -+ mvOsOutput( "%s base %08x, ", -+ mvCtrlTargetNameGet(win.target), win.addrWin.baseLow ); -+ mvOsOutput( "...." ); -+ mvSizePrint( win.addrWin.size ); -+ -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ -+ -+ } -+ } -+ -+ memset( &win, 0,sizeof(MV_PEX_DEC_WIN) ); -+ -+ mvOsOutput( "default win - " ); -+ -+ if ( mvPexTargetWinGet(pexIf, MV_PEX_WIN_DEFAULT, &win) == MV_OK) -+ { -+ mvOsOutput( "%s ", -+ mvCtrlTargetNameGet(win.target) ); -+ mvOsOutput( "\n" ); -+ } -+ memset( &win, 0,sizeof(MV_PEX_DEC_WIN) ); -+ -+ mvOsOutput( "Expansion ROM - " ); -+ -+ if ( mvPexTargetWinGet(pexIf, MV_PEX_WIN_EXP_ROM, &win) == MV_OK) -+ { -+ mvOsOutput( "%s ", -+ mvCtrlTargetNameGet(win.target) ); -+ mvOsOutput( "\n" ); -+ } -+ -+ } -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.h -new file mode 100644 -index 0000000..c1555f6 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.h -@@ -0,0 +1,348 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCSysPEXH -+#define __INCSysPEXH -+ -+#include "mvCommon.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+/* 4KB granularity */ -+#define MINIMUM_WINDOW_SIZE 0x1000 -+#define MINIMUM_BAR_SIZE 0x1000 -+#define MINIMUM_BAR_SIZE_MASK 0xFFFFF000 -+#define BAR_SIZE_OFFS 12 -+#define BAR_SIZE_MASK (0xFFFFF << BAR_SIZE_OFFS) -+ -+ -+ -+#define MV_PEX_WIN_DEFAULT 6 -+#define MV_PEX_WIN_EXP_ROM 7 -+#define PEX_MAX_TARGET_WIN 8 -+ -+ -+#define PEX_MAX_BARS 3 -+#define PEX_INTER_REGS_BAR 0 -+#define PEX_DRAM_BAR 1 -+#define PEX_DEVICE_BAR 2 -+ -+/*************************************/ -+/* PCI Express BAR Control Registers */ -+/*************************************/ -+#define PEX_BAR_CTRL_REG(pexIf,bar) (0x41804 + (bar-1)*4- (pexIf)*0x10000) -+#define PEX_EXP_ROM_BAR_CTRL_REG(pexIf) (0x4180C - (pexIf)*0x10000) -+ -+ -+/* PCI Express BAR Control Register */ -+/* PEX_BAR_CTRL_REG (PXBCR) */ -+ -+#define PXBCR_BAR_EN BIT0 -+#define PXBCR_BAR_SIZE_OFFS 16 -+#define PXBCR_BAR_SIZE_MASK (0xffff << PXBCR_BAR_SIZE_OFFS) -+#define PXBCR_BAR_SIZE_ALIGNMENT 0x10000 -+ -+ -+ -+/* PCI Express Expansion ROM BAR Control Register */ -+/* PEX_EXP_ROM_BAR_CTRL_REG (PXERBCR) */ -+ -+#define PXERBCR_EXPROM_EN BIT0 -+#define PXERBCR_EXPROMSZ_OFFS 19 -+#define PXERBCR_EXPROMSZ_MASK (0xf << PXERBCR_EXPROMSZ_OFFS) -+#define PXERBCR_EXPROMSZ_512KB (0x0 << PXERBCR_EXPROMSZ_OFFS) -+#define PXERBCR_EXPROMSZ_1024KB (0x1 << PXERBCR_EXPROMSZ_OFFS) -+#define PXERBCR_EXPROMSZ_2048KB (0x3 << PXERBCR_EXPROMSZ_OFFS) -+#define PXERBCR_EXPROMSZ_4096KB (0x7 << PXERBCR_EXPROMSZ_OFFS) -+ -+/************************************************/ -+/* PCI Express Address Window Control Registers */ -+/************************************************/ -+#define PEX_WIN0_3_CTRL_REG(pexIf,winNum) \ -+ (0x41820 + (winNum) * 0x10 - (pexIf) * 0x10000) -+#define PEX_WIN0_3_BASE_REG(pexIf,winNum) \ -+ (0x41824 + (winNum) * 0x10 - (pexIf) * 0x10000) -+#define PEX_WIN0_3_REMAP_REG(pexIf,winNum) \ -+ (0x4182C + (winNum) * 0x10 - (pexIf) * 0x10000) -+#define PEX_WIN4_5_CTRL_REG(pexIf,winNum) \ -+ (0x41860 + (winNum - 4) * 0x20 - (pexIf) * 0x10000) -+#define PEX_WIN4_5_BASE_REG(pexIf,winNum) \ -+ (0x41864 + (winNum - 4) * 0x20 - (pexIf) * 0x10000) -+#define PEX_WIN4_5_REMAP_REG(pexIf,winNum) \ -+ (0x4186C + (winNum - 4) * 0x20 - (pexIf) * 0x10000) -+#define PEX_WIN4_5_REMAP_HIGH_REG(pexIf,winNum) \ -+ (0x41870 + (winNum - 4) * 0x20 - (pexIf) * 0x10000) -+ -+#define PEX_WIN_DEFAULT_CTRL_REG(pexIf) (0x418B0 - (pexIf) * 0x10000) -+#define PEX_WIN_EXP_ROM_CTRL_REG(pexIf) (0x418C0 - (pexIf) * 0x10000) -+#define PEX_WIN_EXP_ROM_REMAP_REG(pexIf) (0x418C4 - (pexIf) * 0x10000) -+ -+/* PCI Express Window Control Register */ -+/* PEX_WIN_CTRL_REG (PXWCR) */ -+ -+#define PXWCR_WIN_EN BIT0 /* Window Enable.*/ -+ -+#define PXWCR_WIN_BAR_MAP_OFFS 1 /* Mapping to BAR.*/ -+#define PXWCR_WIN_BAR_MAP_MASK BIT1 -+#define PXWCR_WIN_BAR_MAP_BAR1 (0 << PXWCR_WIN_BAR_MAP_OFFS) -+#define PXWCR_WIN_BAR_MAP_BAR2 (1 << PXWCR_WIN_BAR_MAP_OFFS) -+ -+#define PXWCR_TARGET_OFFS 4 /*Unit ID */ -+#define PXWCR_TARGET_MASK (0xf << PXWCR_TARGET_OFFS) -+ -+#define PXWCR_ATTRIB_OFFS 8 /* target attributes */ -+#define PXWCR_ATTRIB_MASK (0xff << PXWCR_ATTRIB_OFFS) -+ -+#define PXWCR_SIZE_OFFS 16 /* size */ -+#define PXWCR_SIZE_MASK (0xffff << PXWCR_SIZE_OFFS) -+#define PXWCR_SIZE_ALIGNMENT 0x10000 -+ -+/* PCI Express Window Base Register */ -+/* PEX_WIN_BASE_REG (PXWBR)*/ -+ -+#define PXWBR_BASE_OFFS 16 /* address[31:16] */ -+#define PXWBR_BASE_MASK (0xffff << PXWBR_BASE_OFFS) -+#define PXWBR_BASE_ALIGNMENT 0x10000 -+ -+/* PCI Express Window Remap Register */ -+/* PEX_WIN_REMAP_REG (PXWRR)*/ -+ -+#define PXWRR_REMAP_EN BIT0 -+#define PXWRR_REMAP_OFFS 16 -+#define PXWRR_REMAP_MASK (0xffff << PXWRR_REMAP_OFFS) -+#define PXWRR_REMAP_ALIGNMENT 0x10000 -+ -+/* PCI Express Window Remap (High) Register */ -+/* PEX_WIN_REMAP_HIGH_REG (PXWRHR)*/ -+ -+#define PXWRHR_REMAP_HIGH_OFFS 0 -+#define PXWRHR_REMAP_HIGH_MASK (0xffffffff << PXWRHR_REMAP_HIGH_OFFS) -+ -+/* PCI Express Default Window Control Register */ -+/* PEX_WIN_DEFAULT_CTRL_REG (PXWDCR) */ -+ -+#define PXWDCR_TARGET_OFFS 4 /*Unit ID */ -+#define PXWDCR_TARGET_MASK (0xf << PXWDCR_TARGET_OFFS) -+#define PXWDCR_ATTRIB_OFFS 8 /* target attributes */ -+#define PXWDCR_ATTRIB_MASK (0xff << PXWDCR_ATTRIB_OFFS) -+ -+/* PCI Express Expansion ROM Window Control Register */ -+/* PEX_WIN_EXP_ROM_CTRL_REG (PXWERCR)*/ -+ -+#define PXWERCR_TARGET_OFFS 4 /*Unit ID */ -+#define PXWERCR_TARGET_MASK (0xf << PXWERCR_TARGET_OFFS) -+#define PXWERCR_ATTRIB_OFFS 8 /* target attributes */ -+#define PXWERCR_ATTRIB_MASK (0xff << PXWERCR_ATTRIB_OFFS) -+ -+/* PCI Express Expansion ROM Window Remap Register */ -+/* PEX_WIN_EXP_ROM_REMAP_REG (PXWERRR)*/ -+ -+#define PXWERRR_REMAP_EN BIT0 -+#define PXWERRR_REMAP_OFFS 16 -+#define PXWERRR_REMAP_MASK (0xffff << PXWERRR_REMAP_OFFS) -+#define PXWERRR_REMAP_ALIGNMENT 0x10000 -+ -+ -+ -+/*PEX_MEMORY_BAR_BASE_ADDR(barNum) (PXMBBA)*/ -+/* PCI Express BAR0 Internal Register*/ -+/*PEX BAR0_INTER_REG (PXBIR)*/ -+ -+#define PXBIR_IOSPACE BIT0 /* Memory Space Indicator */ -+ -+#define PXBIR_TYPE_OFFS 1 /* BAR Type/Init Val. */ -+#define PXBIR_TYPE_MASK (0x3 << PXBIR_TYPE_OFFS) -+#define PXBIR_TYPE_32BIT_ADDR (0x0 << PXBIR_TYPE_OFFS) -+#define PXBIR_TYPE_64BIT_ADDR (0x2 << PXBIR_TYPE_OFFS) -+ -+#define PXBIR_PREFETCH_EN BIT3 /* Prefetch Enable */ -+ -+#define PXBIR_BASE_OFFS 20 /* Base address. Address bits [31:20] */ -+#define PXBIR_BASE_MASK (0xfff << PXBIR_BASE_OFFS) -+#define PXBIR_BASE_ALIGNMET (1 << PXBIR_BASE_OFFS) -+ -+ -+/* PCI Express BAR0 Internal (High) Register*/ -+/*PEX BAR0_INTER_REG_HIGH (PXBIRH)*/ -+ -+#define PXBIRH_BASE_OFFS 0 /* Base address. Bits [63:32] */ -+#define PXBIRH_BASE_MASK (0xffffffff << PBBHR_BASE_OFFS) -+ -+ -+#define PEX_BAR_DEFAULT_ATTRIB 0xc /* Memory - Prefetch - 64 bit address */ -+#define PEX_BAR0_DEFAULT_ATTRIB PEX_BAR_DEFAULT_ATTRIB -+#define PEX_BAR1_DEFAULT_ATTRIB PEX_BAR_DEFAULT_ATTRIB -+#define PEX_BAR2_DEFAULT_ATTRIB PEX_BAR_DEFAULT_ATTRIB -+ -+ -+/* PCI Express BAR1 Register */ -+/* PCI Express BAR2 Register*/ -+/*PEX BAR1_REG (PXBR)*/ -+/*PEX BAR2_REG (PXBR)*/ -+ -+#define PXBR_IOSPACE BIT0 /* Memory Space Indicator */ -+ -+#define PXBR_TYPE_OFFS 1 /* BAR Type/Init Val. */ -+#define PXBR_TYPE_MASK (0x3 << PXBR_TYPE_OFFS) -+#define PXBR_TYPE_32BIT_ADDR (0x0 << PXBR_TYPE_OFFS) -+#define PXBR_TYPE_64BIT_ADDR (0x2 << PXBR_TYPE_OFFS) -+ -+#define PXBR_PREFETCH_EN BIT3 /* Prefetch Enable */ -+ -+#define PXBR_BASE_OFFS 16 /* Base address. Address bits [31:16] */ -+#define PXBR_BASE_MASK (0xffff << PXBR_BASE_OFFS) -+#define PXBR_BASE_ALIGNMET (1 << PXBR_BASE_OFFS) -+ -+ -+/* PCI Express BAR1 (High) Register*/ -+/* PCI Express BAR2 (High) Register*/ -+/*PEX BAR1_REG_HIGH (PXBRH)*/ -+/*PEX BAR2_REG_HIGH (PXBRH)*/ -+ -+#define PXBRH_BASE_OFFS 0 /* Base address. Address bits [63:32] */ -+#define PXBRH_BASE_MASK (0xffffffff << PXBRH_BASE_OFFS) -+ -+/* PCI Express Expansion ROM BAR Register*/ -+/*PEX_EXPANSION_ROM_BASE_ADDR_REG (PXERBAR)*/ -+ -+#define PXERBAR_EXPROMEN BIT0 /* Expansion ROM Enable */ -+ -+#define PXERBAR_BASE_512K_OFFS 19 /* Expansion ROM Base Address */ -+#define PXERBAR_BASE_512K_MASK (0x1fff << PXERBAR_BASE_512K_OFFS) -+ -+#define PXERBAR_BASE_1MB_OFFS 20 /* Expansion ROM Base Address */ -+#define PXERBAR_BASE_1MB_MASK (0xfff << PXERBAR_BASE_1MB_OFFS) -+ -+#define PXERBAR_BASE_2MB_OFFS 21 /* Expansion ROM Base Address */ -+#define PXERBAR_BASE_2MB_MASK (0x7ff << PXERBAR_BASE_2MB_OFFS) -+ -+#define PXERBAR_BASE_4MB_OFFS 22 /* Expansion ROM Base Address */ -+#define PXERBAR_BASE_4MB_MASK (0x3ff << PXERBAR_BASE_4MB_OFFS) -+ -+/* PEX Bar attributes */ -+typedef struct _mvPexBar -+{ -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+}MV_PEX_BAR; -+ -+/* PEX Remap Window attributes */ -+typedef struct _mvPexRemapWin -+{ -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+}MV_PEX_REMAP_WIN; -+ -+/* PEX Remap Window attributes */ -+typedef struct _mvPexDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_U32 targetBar; -+ MV_U8 attrib; /* chip select attributes */ -+ MV_TARGET_ID targetId; /* Target Id of this MV_TARGET */ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+}MV_PEX_DEC_WIN; -+ -+/* Global Functions prototypes */ -+/* mvPexHalInit - Initialize PEX interfaces*/ -+MV_STATUS mvPexInit(MV_U32 pexIf, MV_PEX_TYPE pexType); -+ -+ -+/* mvPexTargetWinSet - Set PEX to peripheral target address window BAR*/ -+MV_STATUS mvPexTargetWinSet(MV_U32 pexIf, MV_U32 winNum, -+ MV_PEX_DEC_WIN *pAddrDecWin); -+ -+/* mvPexTargetWinGet - Get PEX to peripheral target address window*/ -+MV_STATUS mvPexTargetWinGet(MV_U32 pexIf, MV_U32 winNum, -+ MV_PEX_DEC_WIN *pAddrDecWin); -+ -+/* mvPexTargetWinEnable - Enable/disable a PEX BAR window*/ -+MV_STATUS mvPexTargetWinEnable(MV_U32 pexIf,MV_U32 winNum, MV_BOOL enable); -+ -+/* mvPexTargetWinRemap - Set PEX to target address window remap.*/ -+MV_STATUS mvPexTargetWinRemap(MV_U32 pexIf, MV_U32 winNum, -+ MV_PEX_REMAP_WIN *pAddrWin); -+ -+/* mvPexTargetWinRemapEnable -enable\disable a PEX Window remap.*/ -+MV_STATUS mvPexTargetWinRemapEnable(MV_U32 pexIf, MV_U32 winNum, -+ MV_BOOL enable); -+ -+/* mvPexBarSet - Set PEX bar address and size */ -+MV_STATUS mvPexBarSet(MV_U32 pexIf, MV_U32 barNum, MV_PEX_BAR *addrWin); -+ -+/* mvPexBarGet - Get PEX bar address and size */ -+MV_STATUS mvPexBarGet(MV_U32 pexIf, MV_U32 barNum, MV_PEX_BAR *addrWin); -+ -+/* mvPexBarEnable - enable\disable a PEX bar*/ -+MV_STATUS mvPexBarEnable(MV_U32 pexIf, MV_U32 barNum, MV_BOOL enable); -+ -+/* mvPexAddrDecShow - Display address decode windows attributes */ -+MV_VOID mvPexAddrDecShow(MV_VOID); -+ -+#endif -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSata.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSata.c -new file mode 100644 -index 0000000..4c0485f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSata.c -@@ -0,0 +1,430 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#include "mvTypes.h" -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "cpu/mvCpu.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "sata/CoreDriver/mvRegs.h" -+#include "ctrlEnv/sys/mvSysSata.h" -+ -+MV_TARGET sataAddrDecPrioTab[] = -+{ -+#if defined(MV_INCLUDE_SDRAM_CS0) -+ SDRAM_CS0, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS1) -+ SDRAM_CS1, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS2) -+ SDRAM_CS2, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS3) -+ SDRAM_CS3, -+#endif -+#if defined(MV_INCLUDE_PEX) -+ PEX0_MEM, -+#endif -+ TBL_TERM -+}; -+ -+ -+/******************************************************************************* -+* sataWinOverlapDetect - Detect SATA address windows overlapping -+* -+* DESCRIPTION: -+* An unpredicted behaviur is expected in case SATA address decode -+* windows overlapps. -+* This function detects SATA address decode windows overlapping of a -+* specified window. The function does not check the window itself for -+* overlapping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* winNum - address decode window number. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data -+* from registers. -+* -+*******************************************************************************/ -+static MV_STATUS sataWinOverlapDetect(int dev, MV_U32 winNum, -+ MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 winNumIndex; -+ MV_SATA_DEC_WIN addrDecWin; -+ -+ for(winNumIndex=0; winNumIndex<MV_SATA_MAX_ADDR_DECODE_WIN; winNumIndex++) -+ { -+ /* Do not check window itself */ -+ if (winNumIndex == winNum) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvSataWinGet(dev, winNumIndex, &addrDecWin)) -+ { -+ mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* Do not check disabled windows */ -+ if(addrDecWin.enable == MV_FALSE) -+ { -+ continue; -+ } -+ -+ if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin))) -+ { -+ return MV_TRUE; -+ } -+ } -+ return MV_FALSE; -+} -+ -+ -+/******************************************************************************* -+* mvSataWinSet - Set SATA target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window, also known as address decode window. -+* After setting this target window, the SATA will be able to access the -+* target within the address window. -+* -+* INPUT: -+* winNum - SATA target address decode window number. -+* pAddrDecWin - SATA target window data structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if address window overlapps with other address decode windows. -+* MV_BAD_PARAM if base address is invalid parameter or target is -+* unknown. -+* -+*******************************************************************************/ -+MV_STATUS mvSataWinSet(int dev, MV_U32 winNum, MV_SATA_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttribs; -+ MV_DEC_REGS decRegs; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_SATA_MAX_ADDR_DECODE_WIN) -+ { -+ mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlapps with current windows */ -+ if (MV_TRUE == sataWinOverlapDetect(dev, winNum, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum); -+ return MV_ERROR; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvSataWinSet:Error setting SATA window %d to "\ -+ "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, -+ mvCtrlTargetNameGet(pAddrDecWin->target), -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ decRegs.baseReg = 0; -+ decRegs.sizeReg = 0; -+ -+ if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs)) -+ { -+ mvOsPrintf("%s: mvCtrlAddrDecToReg Failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ mvCtrlAttribGet(pAddrDecWin->target, &targetAttribs); -+ -+ /* set attributes */ -+ decRegs.sizeReg &= ~MV_SATA_WIN_ATTR_MASK; -+ decRegs.sizeReg |= (targetAttribs.attrib << MV_SATA_WIN_ATTR_OFFSET); -+ -+ /* set target ID */ -+ decRegs.sizeReg &= ~MV_SATA_WIN_TARGET_MASK; -+ decRegs.sizeReg |= (targetAttribs.targetId << MV_SATA_WIN_TARGET_OFFSET); -+ -+ if (pAddrDecWin->enable == MV_TRUE) -+ { -+ decRegs.sizeReg |= MV_SATA_WIN_ENABLE_MASK; -+ } -+ else -+ { -+ decRegs.sizeReg &= ~MV_SATA_WIN_ENABLE_MASK; -+ } -+ -+ MV_REG_WRITE( MV_SATA_WIN_CTRL_REG(dev, winNum), decRegs.sizeReg); -+ MV_REG_WRITE( MV_SATA_WIN_BASE_REG(dev, winNum), decRegs.baseReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSataWinGet - Get SATA peripheral target address window. -+* -+* DESCRIPTION: -+* Get SATA peripheral target address window. -+* -+* INPUT: -+* winNum - SATA target address decode window number. -+* -+* OUTPUT: -+* pAddrDecWin - SATA target window data structure. -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvSataWinGet(int dev, MV_U32 winNum, MV_SATA_DEC_WIN *pAddrDecWin) -+{ -+ MV_DEC_REGS decRegs; -+ MV_TARGET_ATTRIB targetAttrib; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_SATA_MAX_ADDR_DECODE_WIN) -+ { -+ mvOsPrintf("%s (dev=%d): ERR. Invalid winNum %d\n", -+ __FUNCTION__, dev, winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ decRegs.baseReg = MV_REG_READ( MV_SATA_WIN_BASE_REG(dev, winNum) ); -+ decRegs.sizeReg = MV_REG_READ( MV_SATA_WIN_CTRL_REG(dev, winNum) ); -+ -+ if (MV_OK != mvCtrlRegToAddrDec(&decRegs, &pAddrDecWin->addrWin) ) -+ { -+ mvOsPrintf("%s: mvCtrlRegToAddrDec Failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* attrib and targetId */ -+ targetAttrib.attrib = (decRegs.sizeReg & MV_SATA_WIN_ATTR_MASK) >> -+ MV_SATA_WIN_ATTR_OFFSET; -+ targetAttrib.targetId = (decRegs.sizeReg & MV_SATA_WIN_TARGET_MASK) >> -+ MV_SATA_WIN_TARGET_OFFSET; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ /* Check if window is enabled */ -+ if(decRegs.sizeReg & MV_SATA_WIN_ENABLE_MASK) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ } -+ return MV_OK; -+} -+/******************************************************************************* -+* mvSataAddrDecShow - Print the SATA address decode map. -+* -+* DESCRIPTION: -+* This function print the SATA address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvSataAddrDecShow(MV_VOID) -+{ -+ -+ MV_SATA_DEC_WIN win; -+ int i,j; -+ -+ -+ -+ for( j = 0; j < MV_SATA_MAX_CHAN; j++ ) -+ { -+ if (MV_FALSE == mvCtrlPwrClckGet(SATA_UNIT_ID, j)) -+ return; -+ -+ mvOsOutput( "\n" ); -+ mvOsOutput( "SATA %d:\n", j ); -+ mvOsOutput( "----\n" ); -+ -+ for( i = 0; i < MV_SATA_MAX_ADDR_DECODE_WIN; i++ ) -+ { -+ memset( &win, 0, sizeof(MV_SATA_DEC_WIN) ); -+ -+ mvOsOutput( "win%d - ", i ); -+ -+ if( mvSataWinGet(j, i, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ mvOsOutput( "%s base %08x, ", -+ mvCtrlTargetNameGet(win.target), win.addrWin.baseLow ); -+ mvOsOutput( "...." ); -+ -+ mvSizePrint( win.addrWin.size ); -+ -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+ } -+} -+ -+ -+/******************************************************************************* -+* mvSataWinInit - Initialize the integrated SATA target address window. -+* -+* DESCRIPTION: -+* Initialize the SATA peripheral target address window. -+* -+* INPUT: -+* -+* -+* OUTPUT: -+* -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvSataWinInit(MV_VOID) -+{ -+ int winNum; -+ MV_SATA_DEC_WIN sataWin; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ MV_U32 status, winPrioIndex = 0; -+ -+ /* Initiate Sata address decode */ -+ -+ /* First disable all address decode windows */ -+ for(winNum = 0; winNum < MV_SATA_MAX_ADDR_DECODE_WIN; winNum++) -+ { -+ MV_U32 regVal = MV_REG_READ(MV_SATA_WIN_CTRL_REG(0, winNum)); -+ regVal &= ~MV_SATA_WIN_ENABLE_MASK; -+ MV_REG_WRITE(MV_SATA_WIN_CTRL_REG(0, winNum), regVal); -+ } -+ -+ winNum = 0; -+ while( (sataAddrDecPrioTab[winPrioIndex] != TBL_TERM) && -+ (winNum < MV_SATA_MAX_ADDR_DECODE_WIN) ) -+ { -+ /* first get attributes from CPU If */ -+ status = mvCpuIfTargetWinGet(sataAddrDecPrioTab[winPrioIndex], -+ &cpuAddrDecWin); -+ -+ if(MV_NO_SUCH == status) -+ { -+ winPrioIndex++; -+ continue; -+ } -+ if (MV_OK != status) -+ { -+ mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ sataWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ sataWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ sataWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ sataWin.enable = MV_TRUE; -+ sataWin.target = sataAddrDecPrioTab[winPrioIndex]; -+ -+ if(MV_OK != mvSataWinSet(0/*dev*/, winNum, &sataWin)) -+ { -+ return MV_ERROR; -+ } -+ winNum++; -+ } -+ winPrioIndex++; -+ } -+ return MV_OK; -+} -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSata.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSata.h -new file mode 100644 -index 0000000..e401992 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSata.h -@@ -0,0 +1,128 @@ -+ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#ifndef __INCMVSysSataAddrDech -+#define __INCMVSysSataAddrDech -+ -+#include "mvCommon.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+typedef struct _mvSataDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+} MV_SATA_DEC_WIN; -+ -+ -+#define MV_SATA_MAX_ADDR_DECODE_WIN 4 -+ -+#define MV_SATA_WIN_CTRL_REG(dev, win) (SATA_REG_BASE + 0x30 + ((win)<<4)) -+#define MV_SATA_WIN_BASE_REG(dev, win) (SATA_REG_BASE + 0x34 + ((win)<<4)) -+ -+/* BITs in Bridge Interrupt Cause and Mask registers */ -+#define MV_SATA_ADDR_DECODE_ERROR_BIT 0 -+#define MV_SATA_ADDR_DECODE_ERROR_MASK (1<<MV_SATA_ADDR_DECODE_ERROR_BIT) -+ -+/* BITs in Windows 0-3 Control and Base Registers */ -+#define MV_SATA_WIN_ENABLE_BIT 0 -+#define MV_SATA_WIN_ENABLE_MASK (1<<MV_SATA_WIN_ENABLE_BIT) -+ -+#define MV_SATA_WIN_TARGET_OFFSET 4 -+#define MV_SATA_WIN_TARGET_MASK (0xF<<MV_SATA_WIN_TARGET_OFFSET) -+ -+#define MV_SATA_WIN_ATTR_OFFSET 8 -+#define MV_SATA_WIN_ATTR_MASK (0xFF<<MV_SATA_WIN_ATTR_OFFSET) -+ -+#define MV_SATA_WIN_SIZE_OFFSET 16 -+#define MV_SATA_WIN_SIZE_MASK (0xFFFF<<MV_SATA_WIN_SIZE_OFFSET) -+ -+#define MV_SATA_WIN_BASE_OFFSET 16 -+#define MV_SATA_WIN_BASE_MASK (0xFFFF<<MV_SATA_WIN_BASE_OFFSET) -+ -+MV_STATUS mvSataWinGet(int dev, MV_U32 winNum, MV_SATA_DEC_WIN *pAddrDecWin); -+MV_STATUS mvSataWinSet(int dev, MV_U32 winNum, MV_SATA_DEC_WIN *pAddrDecWin); -+MV_STATUS mvSataWinByTargetGet(MV_TARGET target, MV_SATA_DEC_WIN *pAddrDecWin); -+MV_STATUS mvSataWinInit(MV_VOID); -+MV_VOID mvSataAddrDecShow(MV_VOID); -+ -+ -+#ifdef __cplusplus -+} -+#endif -+ -+ -+#endif -+ -+ -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.c -new file mode 100644 -index 0000000..682f6f1 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.c -@@ -0,0 +1,427 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#include "mvTypes.h" -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "cpu/mvCpu.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "mvRegs.h" -+#include "ctrlEnv/sys/mvSysSdmmc.h" -+ -+MV_TARGET sdmmcAddrDecPrioTab[] = -+{ -+#if defined(MV_INCLUDE_SDRAM_CS0) -+ SDRAM_CS0, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS1) -+ SDRAM_CS1, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS2) -+ SDRAM_CS2, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS3) -+ SDRAM_CS3, -+#endif -+#if defined(MV_INCLUDE_PEX) -+ PEX0_MEM, -+#endif -+ TBL_TERM -+}; -+ -+ -+/******************************************************************************* -+* sdmmcWinOverlapDetect - Detect SDMMC address windows overlapping -+* -+* DESCRIPTION: -+* An unpredicted behaviur is expected in case SDMMC address decode -+* windows overlapps. -+* This function detects SDMMC address decode windows overlapping of a -+* specified window. The function does not check the window itself for -+* overlapping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* winNum - address decode window number. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data -+* from registers. -+* -+*******************************************************************************/ -+static MV_STATUS sdmmcWinOverlapDetect(int dev, MV_U32 winNum, -+ MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 winNumIndex; -+ MV_SDMMC_DEC_WIN addrDecWin; -+ -+ for(winNumIndex=0; winNumIndex<MV_SDMMC_MAX_ADDR_DECODE_WIN; winNumIndex++) -+ { -+ /* Do not check window itself */ -+ if (winNumIndex == winNum) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvSdmmcWinGet(dev, winNumIndex, &addrDecWin)) -+ { -+ mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* Do not check disabled windows */ -+ if(addrDecWin.enable == MV_FALSE) -+ { -+ continue; -+ } -+ -+ if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin))) -+ { -+ return MV_TRUE; -+ } -+ } -+ return MV_FALSE; -+} -+ -+ -+/******************************************************************************* -+* mvSdmmcWinSet - Set SDMMC target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window, also known as address decode window. -+* After setting this target window, the SDMMC will be able to access the -+* target within the address window. -+* -+* INPUT: -+* winNum - SDMMC target address decode window number. -+* pAddrDecWin - SDMMC target window data structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if address window overlapps with other address decode windows. -+* MV_BAD_PARAM if base address is invalid parameter or target is -+* unknown. -+* -+*******************************************************************************/ -+MV_STATUS mvSdmmcWinSet(int dev, MV_U32 winNum, MV_SDMMC_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttribs; -+ MV_DEC_REGS decRegs; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_SDMMC_MAX_ADDR_DECODE_WIN) -+ { -+ mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlapps with current windows */ -+ if (MV_TRUE == sdmmcWinOverlapDetect(dev, winNum, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum); -+ return MV_ERROR; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvSdmmcWinSet:Error setting SDMMC window %d to "\ -+ "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, -+ mvCtrlTargetNameGet(pAddrDecWin->target), -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ decRegs.baseReg = 0; -+ decRegs.sizeReg = 0; -+ -+ if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs)) -+ { -+ mvOsPrintf("%s: mvCtrlAddrDecToReg Failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ mvCtrlAttribGet(pAddrDecWin->target, &targetAttribs); -+ -+ /* set attributes */ -+ decRegs.sizeReg &= ~MV_SDMMC_WIN_ATTR_MASK; -+ decRegs.sizeReg |= (targetAttribs.attrib << MV_SDMMC_WIN_ATTR_OFFSET); -+ -+ /* set target ID */ -+ decRegs.sizeReg &= ~MV_SDMMC_WIN_TARGET_MASK; -+ decRegs.sizeReg |= (targetAttribs.targetId << MV_SDMMC_WIN_TARGET_OFFSET); -+ -+ if (pAddrDecWin->enable == MV_TRUE) -+ { -+ decRegs.sizeReg |= MV_SDMMC_WIN_ENABLE_MASK; -+ } -+ else -+ { -+ decRegs.sizeReg &= ~MV_SDMMC_WIN_ENABLE_MASK; -+ } -+ -+ MV_REG_WRITE( MV_SDMMC_WIN_CTRL_REG(dev, winNum), decRegs.sizeReg); -+ MV_REG_WRITE( MV_SDMMC_WIN_BASE_REG(dev, winNum), decRegs.baseReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSdmmcWinGet - Get SDMMC peripheral target address window. -+* -+* DESCRIPTION: -+* Get SDMMC peripheral target address window. -+* -+* INPUT: -+* winNum - SDMMC target address decode window number. -+*d -+* OUTPUT: -+* pAddrDecWin - SDMMC target window data structure. -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvSdmmcWinGet(int dev, MV_U32 winNum, MV_SDMMC_DEC_WIN *pAddrDecWin) -+{ -+ MV_DEC_REGS decRegs; -+ MV_TARGET_ATTRIB targetAttrib; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_SDMMC_MAX_ADDR_DECODE_WIN) -+ { -+ mvOsPrintf("%s (dev=%d): ERR. Invalid winNum %d\n", -+ __FUNCTION__, dev, winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ decRegs.baseReg = MV_REG_READ( MV_SDMMC_WIN_BASE_REG(dev, winNum) ); -+ decRegs.sizeReg = MV_REG_READ( MV_SDMMC_WIN_CTRL_REG(dev, winNum) ); -+ -+ if (MV_OK != mvCtrlRegToAddrDec(&decRegs, &pAddrDecWin->addrWin) ) -+ { -+ mvOsPrintf("%s: mvCtrlRegToAddrDec Failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* attrib and targetId */ -+ targetAttrib.attrib = (decRegs.sizeReg & MV_SDMMC_WIN_ATTR_MASK) >> -+ MV_SDMMC_WIN_ATTR_OFFSET; -+ targetAttrib.targetId = (decRegs.sizeReg & MV_SDMMC_WIN_TARGET_MASK) >> -+ MV_SDMMC_WIN_TARGET_OFFSET; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ /* Check if window is enabled */ -+ if(decRegs.sizeReg & MV_SDMMC_WIN_ENABLE_MASK) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ } -+ return MV_OK; -+} -+/******************************************************************************* -+* mvSdmmcAddrDecShow - Print the SDMMC address decode map. -+* -+* DESCRIPTION: -+* This function print the SDMMC address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvSdmmcAddrDecShow(MV_VOID) -+{ -+ -+ MV_SDMMC_DEC_WIN win; -+ int i,j=0; -+ -+ -+ -+ if (MV_FALSE == mvCtrlPwrClckGet(SDIO_UNIT_ID, 0)) -+ return; -+ -+ mvOsOutput( "\n" ); -+ mvOsOutput( "SDMMC %d:\n", j ); -+ mvOsOutput( "----\n" ); -+ -+ for( i = 0; i < MV_SDMMC_MAX_ADDR_DECODE_WIN; i++ ) -+ { -+ memset( &win, 0, sizeof(MV_SDMMC_DEC_WIN) ); -+ -+ mvOsOutput( "win%d - ", i ); -+ -+ if( mvSdmmcWinGet(j, i, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ mvOsOutput( "%s base %08x, ", -+ mvCtrlTargetNameGet(win.target), win.addrWin.baseLow ); -+ mvOsOutput( "...." ); -+ -+ mvSizePrint( win.addrWin.size ); -+ -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+} -+ -+ -+/******************************************************************************* -+* mvSdmmcWinInit - Initialize the integrated SDMMC target address window. -+* -+* DESCRIPTION: -+* Initialize the SDMMC peripheral target address window. -+* -+* INPUT: -+* -+* -+* OUTPUT: -+* -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvSdmmcWinInit(MV_VOID) -+{ -+ int winNum; -+ MV_SDMMC_DEC_WIN sdmmcWin; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ MV_U32 status, winPrioIndex = 0; -+ -+ /* Initiate Sdmmc address decode */ -+ -+ /* First disable all address decode windows */ -+ for(winNum = 0; winNum < MV_SDMMC_MAX_ADDR_DECODE_WIN; winNum++) -+ { -+ MV_U32 regVal = MV_REG_READ(MV_SDMMC_WIN_CTRL_REG(0, winNum)); -+ regVal &= ~MV_SDMMC_WIN_ENABLE_MASK; -+ MV_REG_WRITE(MV_SDMMC_WIN_CTRL_REG(0, winNum), regVal); -+ } -+ -+ winNum = 0; -+ while( (sdmmcAddrDecPrioTab[winPrioIndex] != TBL_TERM) && -+ (winNum < MV_SDMMC_MAX_ADDR_DECODE_WIN) ) -+ { -+ /* first get attributes from CPU If */ -+ status = mvCpuIfTargetWinGet(sdmmcAddrDecPrioTab[winPrioIndex], -+ &cpuAddrDecWin); -+ -+ if(MV_NO_SUCH == status) -+ { -+ winPrioIndex++; -+ continue; -+ } -+ if (MV_OK != status) -+ { -+ mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ sdmmcWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ sdmmcWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ sdmmcWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ sdmmcWin.enable = MV_TRUE; -+ sdmmcWin.target = sdmmcAddrDecPrioTab[winPrioIndex]; -+ -+ if(MV_OK != mvSdmmcWinSet(0/*dev*/, winNum, &sdmmcWin)) -+ { -+ return MV_ERROR; -+ } -+ winNum++; -+ } -+ winPrioIndex++; -+ } -+ return MV_OK; -+} -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.h -new file mode 100644 -index 0000000..f8357c1 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysSdmmc.h -@@ -0,0 +1,125 @@ -+ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#ifndef __INCMVSysSdmmcAddrDech -+#define __INCMVSysSdmmcAddrDech -+ -+#include "mvCommon.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+typedef struct _mvSdmmcDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+} MV_SDMMC_DEC_WIN; -+ -+ -+#define MV_SDMMC_MAX_ADDR_DECODE_WIN 4 -+ -+#define MV_SDMMC_WIN_CTRL_REG(dev, win) (MV_SDIO_REG_BASE + 0x108 + ((win)<<3)) -+#define MV_SDMMC_WIN_BASE_REG(dev, win) (MV_SDIO_REG_BASE + 0x10c + ((win)<<3)) -+ -+ -+/* BITs in Windows 0-3 Control and Base Registers */ -+#define MV_SDMMC_WIN_ENABLE_BIT 0 -+#define MV_SDMMC_WIN_ENABLE_MASK (1<<MV_SDMMC_WIN_ENABLE_BIT) -+ -+#define MV_SDMMC_WIN_TARGET_OFFSET 4 -+#define MV_SDMMC_WIN_TARGET_MASK (0xF<<MV_SDMMC_WIN_TARGET_OFFSET) -+ -+#define MV_SDMMC_WIN_ATTR_OFFSET 8 -+#define MV_SDMMC_WIN_ATTR_MASK (0xFF<<MV_SDMMC_WIN_ATTR_OFFSET) -+ -+#define MV_SDMMC_WIN_SIZE_OFFSET 16 -+#define MV_SDMMC_WIN_SIZE_MASK (0xFFFF<<MV_SDMMC_WIN_SIZE_OFFSET) -+ -+#define MV_SDMMC_WIN_BASE_OFFSET 16 -+#define MV_SDMMC_WIN_BASE_MASK (0xFFFF<<MV_SDMMC_WIN_BASE_OFFSET) -+ -+MV_STATUS mvSdmmcWinGet(int dev, MV_U32 winNum, MV_SDMMC_DEC_WIN *pAddrDecWin); -+MV_STATUS mvSdmmcWinSet(int dev, MV_U32 winNum, MV_SDMMC_DEC_WIN *pAddrDecWin); -+MV_STATUS mvSdmmcWinByTargetGet(MV_TARGET target, MV_SDMMC_DEC_WIN *pAddrDecWin); -+MV_STATUS mvSdmmcWinInit(MV_VOID); -+MV_VOID mvSdmmcAddrDecShow(MV_VOID); -+ -+ -+#ifdef __cplusplus -+} -+#endif -+ -+ -+#endif -+ -+ -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTdm.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTdm.c -new file mode 100644 -index 0000000..159d79f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTdm.c -@@ -0,0 +1,462 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvSysTdm.h" -+ -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+static MV_TARGET tdmAddrDecPrioTap[] = -+{ -+ PEX0_MEM, -+ SDRAM_CS0, -+ SDRAM_CS1, -+ SDRAM_CS2, -+ SDRAM_CS3, -+ DEVICE_CS0, -+ DEVICE_CS1, -+ DEVICE_CS2, -+ DEV_BOOCS, -+ PEX0_IO, -+ TBL_TERM -+}; -+ -+static MV_STATUS tdmWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin); -+ -+/******************************************************************************* -+* mvTdmWinInit - Initialize TDM address decode windows -+* -+* DESCRIPTION: -+* This function initialize TDM window decode unit. It set the -+* default address decode -+* windows of the unit. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if setting fail. -+*******************************************************************************/ -+ -+MV_STATUS mvTdmWinInit(void) -+{ -+ MV_U32 winNum; -+ MV_U32 winPrioIndex = 0; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ MV_TDM_DEC_WIN tdmWin; -+ MV_STATUS status; -+ -+ /*Disable all windows*/ -+ for (winNum = 0; winNum < TDM_MBUS_MAX_WIN; winNum++) -+ { -+ mvTdmWinEnable(winNum, MV_FALSE); -+ } -+ -+ for (winNum = 0; ((tdmAddrDecPrioTap[winPrioIndex] != TBL_TERM) && -+ (winNum < TDM_MBUS_MAX_WIN)); ) -+ { -+ status = mvCpuIfTargetWinGet(tdmAddrDecPrioTap[winPrioIndex], -+ &cpuAddrDecWin); -+ if (MV_NO_SUCH == status) -+ { -+ winPrioIndex++; -+ continue; -+ } -+ if (MV_OK != status) -+ { -+ mvOsPrintf("mvTdmInit: ERR. mvCpuIfTargetWinGet failed\n"); -+ return MV_ERROR; -+ } -+ -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ tdmWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ tdmWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ tdmWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ tdmWin.enable = MV_TRUE; -+ tdmWin.target = tdmAddrDecPrioTap[winPrioIndex]; -+ if (MV_OK != mvTdmWinSet(winNum, &tdmWin)) -+ { -+ return MV_ERROR; -+ } -+ winNum++; -+ } -+ winPrioIndex++; -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvTdmWinSet - Set TDM target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window, also known as address decode window. -+* After setting this target window, the TDM will be able to access the -+* target within the address window. -+* -+* INPUT: -+* winNum - TDM to target address decode window number. -+* pAddrDecWin - TDM target window data structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if address window overlapps with other address decode windows. -+* MV_BAD_PARAM if base address is invalid parameter or target is -+* unknown. -+* -+*******************************************************************************/ -+ -+MV_STATUS mvTdmWinSet(MV_U32 winNum, MV_TDM_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttribs; -+ MV_DEC_REGS decRegs; -+ MV_U32 ctrlReg = 0; -+ -+ /* Parameter checking */ -+ if (winNum >= TDM_MBUS_MAX_WIN) -+ { -+ mvOsPrintf("mvTdmWinSet: ERR. Invalid win num %d\n",winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlapps with current windows */ -+ if (MV_TRUE == tdmWinOverlapDetect(winNum, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("mvTdmWinSet: ERR. Window %d overlap\n", winNum); -+ return MV_ERROR; -+ } -+ -+ /* check if address is aligned to the size */ -+ if (MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvTdmWinSet: Error setting TDM window %d to "\ -+ "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, -+ mvCtrlTargetNameGet(pAddrDecWin->target), -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ decRegs.baseReg = MV_REG_READ(TDM_WIN_BASE_REG(winNum)); -+ decRegs.sizeReg = (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_SIZE_MASK) >> TDM_WIN_SIZE_OFFS; -+ -+ if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs)) -+ { -+ mvOsPrintf("mvTdmWinSet: mvCtrlAddrDecToReg Failed\n"); -+ return MV_ERROR; -+ } -+ -+ mvCtrlAttribGet(pAddrDecWin->target, &targetAttribs); -+ -+ /* for the safe side we disable the window before writing the new -+ values */ -+ mvTdmWinEnable(winNum, MV_FALSE); -+ -+ ctrlReg |= (targetAttribs.attrib << TDM_WIN_ATTRIB_OFFS); -+ ctrlReg |= (targetAttribs.targetId << TDM_WIN_TARGET_OFFS); -+ ctrlReg |= (decRegs.sizeReg & TDM_WIN_SIZE_MASK); -+ -+ /* Write to address base and control registers */ -+ MV_REG_WRITE(TDM_WIN_BASE_REG(winNum), decRegs.baseReg); -+ MV_REG_WRITE(TDM_WIN_CTRL_REG(winNum), ctrlReg); -+ /* Enable address decode target window */ -+ if (pAddrDecWin->enable == MV_TRUE) -+ { -+ mvTdmWinEnable(winNum, MV_TRUE); -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvTdmWinGet - Get peripheral target address window. -+* -+* DESCRIPTION: -+* Get TDM peripheral target address window. -+* -+* INPUT: -+* winNum - TDM to target address decode window number. -+* -+* OUTPUT: -+* pAddrDecWin - TDM target window data structure. -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+ -+MV_STATUS mvTdmWinGet(MV_U32 winNum, MV_TDM_DEC_WIN *pAddrDecWin) -+{ -+ -+ MV_DEC_REGS decRegs; -+ MV_TARGET_ATTRIB targetAttrib; -+ -+ /* Parameter checking */ -+ if (winNum >= TDM_MBUS_MAX_WIN) -+ { -+ mvOsPrintf("mvTdmWinGet: ERR. Invalid winNum %d\n", winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ decRegs.baseReg = MV_REG_READ(TDM_WIN_BASE_REG(winNum)); -+ decRegs.sizeReg = (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_SIZE_MASK) >> TDM_WIN_SIZE_OFFS; -+ -+ if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin))) -+ { -+ mvOsPrintf("mvTdmWinGet: mvCtrlRegToAddrDec Failed \n"); -+ return MV_ERROR; -+ } -+ -+ /* attrib and targetId */ -+ targetAttrib.attrib = -+ (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_ATTRIB_MASK) >> TDM_WIN_ATTRIB_OFFS; -+ targetAttrib.targetId = -+ (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_TARGET_MASK) >> TDM_WIN_TARGET_OFFS; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ /* Check if window is enabled */ -+ if (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_ENABLE_MASK) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvTdmWinEnable - Enable/disable a TDM to target address window -+* -+* DESCRIPTION: -+* This function enable/disable a TDM to target address window. -+* According to parameter 'enable' the routine will enable the -+* window, thus enabling TDM accesses (before enabling the window it is -+* tested for overlapping). Otherwise, the window will be disabled. -+* -+* INPUT: -+* winNum - TDM to target address decode window number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_ERROR if decode window number was wrong or enabled window overlapps. -+* -+*******************************************************************************/ -+MV_STATUS mvTdmWinEnable(int winNum, MV_BOOL enable) -+{ -+ MV_TDM_DEC_WIN addrDecWin; -+ -+ if (MV_TRUE == enable) -+ { -+ if (winNum >= TDM_MBUS_MAX_WIN) -+ { -+ mvOsPrintf("mvTdmWinEnable:ERR. Invalid winNum%d\n",winNum); -+ return MV_ERROR; -+ } -+ -+ /* First check for overlap with other enabled windows */ -+ /* Get current window */ -+ if (MV_OK != mvTdmWinGet(winNum, &addrDecWin)) -+ { -+ mvOsPrintf("mvTdmWinEnable:ERR. targetWinGet fail\n"); -+ return MV_ERROR; -+ } -+ /* Check for overlapping */ -+ if (MV_FALSE == tdmWinOverlapDetect(winNum, &(addrDecWin.addrWin))) -+ { -+ /* No Overlap. Enable address decode target window */ -+ MV_REG_BIT_SET(TDM_WIN_CTRL_REG(winNum), TDM_WIN_ENABLE_MASK); -+ } -+ else -+ { /* Overlap detected */ -+ mvOsPrintf("mvTdmWinEnable:ERR. Overlap detected\n"); -+ return MV_ERROR; -+ } -+ } -+ else -+ { -+ MV_REG_BIT_RESET(TDM_WIN_CTRL_REG(winNum), TDM_WIN_ENABLE_MASK); -+ } -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* tdmWinOverlapDetect - Detect TDM address windows overlapping -+* -+* DESCRIPTION: -+* An unpredicted behaviour is expected in case TDM address decode -+* windows overlapps. -+* This function detects TDM address decode windows overlapping of a -+* specified window. The function does not check the window itself for -+* overlapping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* winNum - address decode window number. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data -+* from registers. -+* -+*******************************************************************************/ -+static MV_STATUS tdmWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 winNumIndex; -+ MV_TDM_DEC_WIN addrDecWin; -+ -+ for (winNumIndex = 0; winNumIndex < TDM_MBUS_MAX_WIN; winNumIndex++) -+ { -+ /* Do not check window itself */ -+ if (winNumIndex == winNum) -+ { -+ continue; -+ } -+ /* Do not check disabled windows */ -+ if (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_ENABLE_MASK) -+ { -+ /* Get window parameters */ -+ if (MV_OK != mvTdmWinGet(winNumIndex, &addrDecWin)) -+ { -+ DB(mvOsPrintf("dmaWinOverlapDetect: ERR. TargetWinGet failed\n")); -+ return MV_ERROR; -+ } -+ -+ if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin))) -+ { -+ return MV_TRUE; -+ } -+ } -+ } -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* mvTdmAddrDecShow - Print the TDM address decode map. -+* -+* DESCRIPTION: -+* This function print the TDM address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvTdmAddrDecShow(MV_VOID) -+{ -+ MV_TDM_DEC_WIN win; -+ int i; -+ -+ mvOsOutput( "\n" ); -+ mvOsOutput( "TDM:\n" ); -+ mvOsOutput( "----\n" ); -+ -+ for( i = 0; i < TDM_MBUS_MAX_WIN; i++ ) -+ { -+ memset( &win, 0, sizeof(MV_TDM_DEC_WIN) ); -+ -+ mvOsOutput( "win%d - ", i ); -+ -+ if (mvTdmWinGet(i, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ mvOsOutput( "%s base %08x, ", -+ mvCtrlTargetNameGet(win.target), win.addrWin.baseLow); -+ mvOsOutput( "...." ); -+ mvSizePrint( win.addrWin.size ); -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTdm.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTdm.h -new file mode 100644 -index 0000000..3603095 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTdm.h -@@ -0,0 +1,106 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSysTdmh -+#define __INCmvSysTdmh -+ -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+typedef struct _mvTdmDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+} MV_TDM_DEC_WIN; -+ -+MV_STATUS mvTdmWinInit(MV_VOID); -+MV_STATUS mvTdmWinSet(MV_U32 winNum, MV_TDM_DEC_WIN *pAddrDecWin); -+MV_STATUS mvTdmWinGet(MV_U32 winNum, MV_TDM_DEC_WIN *pAddrDecWin); -+MV_STATUS mvTdmWinEnable(int winNum, MV_BOOL enable); -+MV_VOID mvTdmAddrDecShow(MV_VOID); -+ -+ -+#define TDM_MBUS_MAX_WIN 4 -+#define TDM_WIN_CTRL_REG(win) ((TDM_REG_BASE + 0x4030) + (win<<4)) -+#define TDM_WIN_BASE_REG(win) ((TDM_REG_BASE +0x4034) + (win<<4)) -+ -+/* TDM_WIN_CTRL_REG bits */ -+#define TDM_WIN_ENABLE_OFFS 0 -+#define TDM_WIN_ENABLE_MASK (1<<TDM_WIN_ENABLE_OFFS) -+#define TDM_WIN_ENABLE 1 -+#define TDM_WIN_TARGET_OFFS 4 -+#define TDM_WIN_TARGET_MASK (0xf<<TDM_WIN_TARGET_OFFS) -+#define TDM_WIN_ATTRIB_OFFS 8 -+#define TDM_WIN_ATTRIB_MASK (0xff<<TDM_WIN_ATTRIB_OFFS) -+#define TDM_WIN_SIZE_OFFS 16 -+#define TDM_WIN_SIZE_MASK (0xffff<<TDM_WIN_SIZE_OFFS) -+ -+/* TDM_WIN_BASE_REG bits */ -+#define TDM_BASE_OFFS 16 -+#define TDM_BASE_MASK (0xffff<<TDM_BASE_OFFS) -+ -+#endif /*__INCmvSysTdmh*/ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.c -new file mode 100644 -index 0000000..8cd0018 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.c -@@ -0,0 +1,591 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#include "ctrlEnv/sys/mvSysTs.h" -+ -+ -+typedef struct _mvTsuDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+}MV_TSU_DEC_WIN; -+ -+ -+MV_TARGET tsuAddrDecPrioTap[] = -+{ -+#if defined(MV_INCLUDE_PEX) -+ PEX0_MEM, -+#endif -+#if defined(MV_INCLUDE_PCI) -+ PCI0_MEM, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS0) -+ SDRAM_CS0, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS1) -+ SDRAM_CS1, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS2) -+ SDRAM_CS2, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS3) -+ SDRAM_CS3, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS0) -+ DEVICE_CS0, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS1) -+ DEVICE_CS1, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS2) -+ DEVICE_CS2, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS3) -+ DEVICE_CS3, -+#endif -+#if defined(MV_INCLUDE_PEX) -+ PEX0_IO, -+#endif -+#if defined(MV_INCLUDE_PCI) -+ PCI0_IO, -+#endif -+ TBL_TERM -+}; -+ -+static MV_STATUS tsuWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin); -+static MV_STATUS mvTsuWinSet(MV_U32 winNum, MV_TSU_DEC_WIN *pAddrDecWin); -+static MV_STATUS mvTsuWinGet(MV_U32 winNum, MV_TSU_DEC_WIN *pAddrDecWin); -+MV_STATUS mvTsuWinEnable(MV_U32 winNum,MV_BOOL enable); -+ -+/******************************************************************************* -+* mvTsuWinInit -+* -+* DESCRIPTION: -+* Initialize the TSU unit address decode windows. -+* -+* INPUT: -+* None. -+* OUTPUT: -+* None. -+* RETURN: -+* MV_OK - on success, -+* -+*******************************************************************************/ -+MV_STATUS mvTsuWinInit(void) -+{ -+ MV_U32 winNum, status, winPrioIndex=0; -+ MV_TSU_DEC_WIN tsuWin; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ -+ /* First disable all address decode windows */ -+ for(winNum = 0; winNum < TSU_MAX_DECODE_WIN; winNum++) -+ { -+ MV_REG_BIT_RESET(MV_TSU_WIN_CTRL_REG(winNum), -+ TSU_WIN_CTRL_EN_MASK); -+ } -+ -+ /* Go through all windows in user table until table terminator */ -+ for(winNum = 0; ((tsuAddrDecPrioTap[winPrioIndex] != TBL_TERM) && -+ (winNum < TSU_MAX_DECODE_WIN));) -+ { -+ /* first get attributes from CPU If */ -+ status = mvCpuIfTargetWinGet(tsuAddrDecPrioTap[winPrioIndex], -+ &cpuAddrDecWin); -+ -+ if(MV_NO_SUCH == status) -+ { -+ winPrioIndex++; -+ continue; -+ } -+ if(MV_OK != status) -+ { -+ mvOsPrintf("mvTsuWinInit: ERR. mvCpuIfTargetWinGet failed\n"); -+ return MV_ERROR; -+ } -+ -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ tsuWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ tsuWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ tsuWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ tsuWin.enable = MV_TRUE; -+ tsuWin.target = tsuAddrDecPrioTap[winPrioIndex]; -+ -+ if(MV_OK != mvTsuWinSet(winNum, &tsuWin)) -+ { -+ mvOsPrintf("mvTsuWinInit: ERR. mvTsuWinSet failed winNum=%d\n", -+ winNum); -+ return MV_ERROR; -+ } -+ winNum++; -+ } -+ winPrioIndex ++; -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvTsuWinSet -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window, also known as address decode window. -+* After setting this target window, the TSU will be able to access the -+* target within the address window. -+* -+* INPUT: -+* winNum - TSU to target address decode window number. -+* pAddrDecWin - TSU target window data structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR - if address window overlapps with other address decode -+* windows. -+* MV_BAD_PARAM - if base address is invalid parameter or target is -+* unknown. -+* -+*******************************************************************************/ -+MV_STATUS mvTsuWinSet(MV_U32 winNum, MV_TSU_DEC_WIN *pAddrDecWin) -+{ -+ MV_TARGET_ATTRIB targetAttribs; -+ MV_DEC_REGS decRegs; -+ -+ /* Parameter checking */ -+ if(winNum >= TSU_MAX_DECODE_WIN) -+ { -+ mvOsPrintf("mvTsuWinSet: ERR. Invalid win num %d\n",winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlapps with current windows */ -+ if(MV_TRUE == tsuWinOverlapDetect(winNum, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("mvTsuWinSet: ERR. Window %d overlap\n", winNum); -+ return MV_ERROR; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow,pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvTsuWinSet: Error setting TSU window %d to target " -+ "%s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, mvCtrlTargetNameGet(pAddrDecWin->target), -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ decRegs.baseReg = MV_REG_READ(MV_TSU_WIN_BASE_REG(winNum)); -+ decRegs.sizeReg = MV_REG_READ(MV_TSU_WIN_CTRL_REG(winNum)); -+ -+ if(MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs)) -+ { -+ mvOsPrintf("mvTsuWinSet: mvCtrlAddrDecToReg Failed\n"); -+ return MV_ERROR; -+ } -+ -+ mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs); -+ -+ /* set attributes */ -+ decRegs.sizeReg &= ~TSU_WIN_CTRL_ATTR_MASK; -+ decRegs.sizeReg |= targetAttribs.attrib << TSU_WIN_CTRL_ATTR_OFFS; -+ /* set target ID */ -+ decRegs.sizeReg &= ~TSU_WIN_CTRL_TARGET_MASK; -+ decRegs.sizeReg |= targetAttribs.targetId << TSU_WIN_CTRL_TARGET_OFFS; -+ -+ /* for the safe side we disable the window before writing the new */ -+ /* values */ -+ mvTsuWinEnable(winNum, MV_FALSE); -+ MV_REG_WRITE(MV_TSU_WIN_CTRL_REG(winNum),decRegs.sizeReg); -+ -+ /* Write to address decode Size Register */ -+ MV_REG_WRITE(MV_TSU_WIN_BASE_REG(winNum), decRegs.baseReg); -+ -+ /* Enable address decode target window */ -+ if(pAddrDecWin->enable == MV_TRUE) -+ { -+ mvTsuWinEnable(winNum,MV_TRUE); -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvTsuWinGet -+* -+* DESCRIPTION: -+* Get TSU peripheral target address window. -+* -+* INPUT: -+* winNum - TSU to target address decode window number. -+* -+* OUTPUT: -+* pAddrDecWin - TSU target window data structure. -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvTsuWinGet(MV_U32 winNum, MV_TSU_DEC_WIN *pAddrDecWin) -+{ -+ MV_DEC_REGS decRegs; -+ MV_TARGET_ATTRIB targetAttrib; -+ -+ /* Parameter checking */ -+ if(winNum >= TSU_MAX_DECODE_WIN) -+ { -+ mvOsPrintf("mvTsuWinGet: ERR. Invalid winNum %d\n", winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ decRegs.baseReg = MV_REG_READ(MV_TSU_WIN_BASE_REG(winNum)); -+ decRegs.sizeReg = MV_REG_READ(MV_TSU_WIN_CTRL_REG(winNum)); -+ -+ if(MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin))) -+ { -+ mvOsPrintf("mvTsuWinGet: mvCtrlRegToAddrDec Failed \n"); -+ return MV_ERROR; -+ } -+ -+ /* attrib and targetId */ -+ targetAttrib.attrib = -+ (decRegs.sizeReg & TSU_WIN_CTRL_ATTR_MASK) >> TSU_WIN_CTRL_ATTR_OFFS; -+ targetAttrib.targetId = -+ (decRegs.sizeReg & TSU_WIN_CTRL_TARGET_MASK) >> TSU_WIN_CTRL_TARGET_OFFS; -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ /* Check if window is enabled */ -+ if((MV_REG_READ(MV_TSU_WIN_CTRL_REG(winNum)) & TSU_WIN_CTRL_EN_MASK)) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvTsuWinEnable -+* -+* DESCRIPTION: -+* This function enable/disable a TSU to target address window. -+* According to parameter 'enable' the routine will enable the -+* window, thus enabling TSU accesses (before enabling the window it is -+* tested for overlapping). Otherwise, the window will be disabled. -+* -+* INPUT: -+* winNum - TSU to target address decode window number. -+* enable - Enable / disable parameter. -+* -+* OUTPUT: -+* N/A -+* -+* RETURN: -+* MV_ERROR if decode window number was wrong or enabled window overlapps. -+* -+*******************************************************************************/ -+MV_STATUS mvTsuWinEnable(MV_U32 winNum,MV_BOOL enable) -+{ -+ MV_TSU_DEC_WIN addrDecWin; -+ -+ /* Parameter checking */ -+ if(winNum >= TSU_MAX_DECODE_WIN) -+ { -+ mvOsPrintf("mvTsuWinEnable: ERR. Invalid winNum%d\n",winNum); -+ return MV_ERROR; -+ } -+ -+ if(enable == MV_TRUE) -+ { -+ /* First check for overlap with other enabled windows */ -+ /* Get current window. */ -+ if(MV_OK != mvTsuWinGet(winNum,&addrDecWin)) -+ { -+ mvOsPrintf("mvTsuWinEnable: ERR. targetWinGet fail\n"); -+ return MV_ERROR; -+ } -+ /* Check for overlapping. */ -+ if(MV_FALSE == tsuWinOverlapDetect(winNum,&(addrDecWin.addrWin))) -+ { -+ /* No Overlap. Enable address decode target window */ -+ MV_REG_BIT_SET(MV_TSU_WIN_CTRL_REG(winNum), -+ TSU_WIN_CTRL_EN_MASK); -+ } -+ else -+ { -+ /* Overlap detected */ -+ mvOsPrintf("mvTsuWinEnable: ERR. Overlap detected\n"); -+ return MV_ERROR; -+ } -+ } -+ else -+ { -+ /* Disable address decode target window */ -+ MV_REG_BIT_RESET(MV_TSU_WIN_CTRL_REG(winNum), -+ TSU_WIN_CTRL_EN_MASK); -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvTsuWinTargetGet -+* -+* DESCRIPTION: -+* Get Window number associated with target -+* -+* INPUT: -+* target - Target ID to get the window number for. -+* OUTPUT: -+* -+* RETURN: -+* window number or 0xFFFFFFFF on error. -+* -+*******************************************************************************/ -+MV_U32 mvTsuWinTargetGet(MV_TARGET target) -+{ -+ MV_TSU_DEC_WIN decWin; -+ MV_U32 winNum; -+ -+ /* Check parameters */ -+ if(target >= MAX_TARGETS) -+ { -+ mvOsPrintf("mvTsuWinTargetGet: target %d is Illigal\n", target); -+ return 0xffffffff; -+ } -+ -+ for(winNum = 0; winNum < TSU_MAX_DECODE_WIN; winNum++) -+ { -+ if(mvTsuWinGet(winNum,&decWin) != MV_OK) -+ { -+ mvOsPrintf("mvTsuWinGet: window returned error\n"); -+ return 0xffffffff; -+ } -+ -+ if (decWin.enable == MV_TRUE) -+ { -+ if(decWin.target == target) -+ { -+ return winNum; -+ } -+ } -+ } -+ return 0xFFFFFFFF; -+} -+ -+ -+/******************************************************************************* -+* tsuWinOverlapDetect -+* -+* DESCRIPTION: -+* Detect TSU address windows overlapping -+* An unpredicted behaviur is expected in case TSU address decode -+* windows overlapps. -+* This function detects TSU address decode windows overlapping of a -+* specified window. The function does not check the window itself for -+* overlapping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* winNum - address decode window number. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data -+* from registers. -+* -+*******************************************************************************/ -+static MV_STATUS tsuWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 ctrlReg; -+ MV_U32 winNumIndex; -+ MV_TSU_DEC_WIN addrDecWin; -+ -+ for(winNumIndex = 0; winNumIndex < TSU_MAX_DECODE_WIN; winNumIndex++) -+ { -+ /* Do not check window itself */ -+ if(winNumIndex == winNum) -+ { -+ continue; -+ } -+ -+ /* Do not check disabled windows */ -+ ctrlReg = MV_REG_READ(MV_TSU_WIN_CTRL_REG(winNumIndex)); -+ if((ctrlReg & TSU_WIN_CTRL_EN_MASK) == 0) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvTsuWinGet(winNumIndex, &addrDecWin)) -+ { -+ mvOsPrintf("tsuWinOverlapDetect: ERR. mvTsuWinGet failed\n"); -+ return MV_ERROR; -+ } -+ -+ if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin))) -+ { -+ return MV_TRUE; -+ } -+ } -+ return MV_FALSE; -+} -+ -+ -+/******************************************************************************* -+* mvTsuAddrDecShow -+* -+* DESCRIPTION: -+* Print the TSU address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+void mvTsuAddrDecShow(void) -+{ -+ MV_TSU_DEC_WIN win; -+ int i; -+ -+ if (MV_FALSE == mvCtrlPwrClckGet(TS_UNIT_ID, 0)) -+ return; -+ -+ mvOsOutput( "\n" ); -+ mvOsOutput( "TSU:\n"); -+ mvOsOutput( "----\n" ); -+ -+ for(i = 0; i < TSU_MAX_DECODE_WIN; i++) -+ { -+ memset(&win, 0, sizeof(TSU_MAX_DECODE_WIN)); -+ mvOsOutput( "win%d - ", i ); -+ -+ if(mvTsuWinGet(i, &win ) == MV_OK ) -+ { -+ if(win.enable == MV_TRUE) -+ { -+ mvOsOutput("%s base %08x, ", -+ mvCtrlTargetNameGet(win.target), -+ win.addrWin.baseLow); -+ mvOsOutput( "...." ); -+ mvSizePrint(win.addrWin.size ); -+ mvOsOutput( "\n" ); -+ } -+ else -+ { -+ mvOsOutput( "disable\n" ); -+ } -+ } -+ } -+ return; -+} -+ -+ -+/******************************************************************************* -+* mvTsuInit -+* -+* DESCRIPTION: -+* Initialize the TSU unit, and get unit out of reset. -+* -+* INPUT: -+* coreClock - The core clock at which the TSU should operate. -+* mode - The mode on configure the unit into (serial/parallel). -+* memHandle - Memory handle used for memory allocations. -+* OUTPUT: -+* None. -+* RETURN: -+* MV_OK - on success, -+* -+*******************************************************************************/ -+MV_STATUS mvTsuInit(MV_TSU_CORE_CLOCK coreClock, MV_TSU_PORTS_MODE mode, -+ void *osHandle) -+{ -+ MV_STATUS status; -+ -+ status = mvTsuWinInit(); -+ if(status == MV_OK) -+ status = mvTsuHalInit(coreClock,mode,osHandle); -+ -+ return status; -+} -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.h -new file mode 100644 -index 0000000..1478b09 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysTs.h -@@ -0,0 +1,110 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSysTsh -+#define __INCmvSysTsh -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* includes */ -+#include "ts/mvTsu.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+#define TSU_MAX_DECODE_WIN 4 -+ -+ -+/*******************************************/ -+/* TSU Windows Registers */ -+/*******************************************/ -+#define MV_TSU_WIN_CTRL_REG(win) (TSU_GLOBAL_REG_BASE +0x30 + 0x10 * win) -+#define MV_TSU_WIN_BASE_REG(win) (TSU_GLOBAL_REG_BASE +0x34 + 0x10 * win) -+ -+/* TSU windows control register. */ -+#define TSU_WIN_CTRL_EN_MASK (0x1 << 0) -+#define TSU_WIN_CTRL_TARGET_OFFS 4 -+#define TSU_WIN_CTRL_TARGET_MASK (0xF << TSU_WIN_CTRL_TARGET_OFFS) -+#define TSU_WIN_CTRL_ATTR_OFFS 8 -+#define TSU_WIN_CTRL_ATTR_MASK (0xFF << TSU_WIN_CTRL_ATTR_OFFS) -+#define TSU_WIN_CTRL_SIZE_OFFS 16 -+#define TSU_WIN_CTRL_SIZE_MASK (0xFFFF << TSU_WIN_CTRL_SIZE_OFFS) -+ -+/* TSU windows base register. */ -+#define TSU_WIN_BASE_OFFS 16 -+#define TSU_WIN_BASE_MASK (0xFFFF << TSU_WIN_BASE_OFFS) -+ -+MV_STATUS mvTsuWinInit(void); -+ -+void mvTsuAddrDecShow(void); -+MV_STATUS mvTsuInit(MV_TSU_CORE_CLOCK coreClock, MV_TSU_PORTS_MODE mode, -+ void *osHandle); -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* __INCmvTsh */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysUsb.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysUsb.c -new file mode 100644 -index 0000000..195b5e1 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysUsb.c -@@ -0,0 +1,497 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "ctrlEnv/sys/mvSysUsb.h" -+ -+MV_TARGET usbAddrDecPrioTab[] = -+{ -+#if defined(MV_INCLUDE_SDRAM_CS0) -+ SDRAM_CS0, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS1) -+ SDRAM_CS1, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS2) -+ SDRAM_CS2, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS3) -+ SDRAM_CS3, -+#endif -+#if defined(MV_INCLUDE_CESA) && defined(USB_UNDERRUN_WA) -+ CRYPT_ENG, -+#endif -+#if defined(MV_INCLUDE_PEX) -+ PEX0_MEM, -+#endif -+ TBL_TERM -+}; -+ -+ -+ -+MV_STATUS mvUsbInit(int dev, MV_BOOL isHost) -+{ -+ MV_STATUS status; -+ -+ status = mvUsbWinInit(dev); -+ if(status != MV_OK) -+ return status; -+ -+ return mvUsbHalInit(dev, isHost); -+} -+ -+ -+/******************************************************************************* -+* usbWinOverlapDetect - Detect USB address windows overlapping -+* -+* DESCRIPTION: -+* An unpredicted behaviur is expected in case USB address decode -+* windows overlapps. -+* This function detects USB address decode windows overlapping of a -+* specified window. The function does not check the window itself for -+* overlapping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* winNum - address decode window number. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data -+* from registers. -+* -+*******************************************************************************/ -+static MV_STATUS usbWinOverlapDetect(int dev, MV_U32 winNum, -+ MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 winNumIndex; -+ MV_DEC_WIN addrDecWin; -+ -+ for(winNumIndex=0; winNumIndex<MV_USB_MAX_ADDR_DECODE_WIN; winNumIndex++) -+ { -+ /* Do not check window itself */ -+ if (winNumIndex == winNum) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvUsbWinGet(dev, winNumIndex, &addrDecWin)) -+ { -+ mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* Do not check disabled windows */ -+ if(addrDecWin.enable == MV_FALSE) -+ { -+ continue; -+ } -+ -+ if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin))) -+ { -+ return MV_TRUE; -+ } -+ } -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* mvUsbWinSet - Set USB target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window, also known as address decode window. -+* After setting this target window, the USB will be able to access the -+* target within the address window. -+* -+* INPUT: -+* winNum - USB target address decode window number. -+* pAddrDecWin - USB target window data structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR if address window overlapps with other address decode windows. -+* MV_BAD_PARAM if base address is invalid parameter or target is -+* unknown. -+* -+*******************************************************************************/ -+MV_STATUS mvUsbWinSet(int dev, MV_U32 winNum, MV_DEC_WIN *pDecWin) -+{ -+ MV_DEC_WIN_PARAMS winParams; -+ MV_U32 sizeReg, baseReg; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_USB_MAX_ADDR_DECODE_WIN) -+ { -+ mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlapps with current windows */ -+ if (MV_TRUE == usbWinOverlapDetect(dev, winNum, &pDecWin->addrWin)) -+ { -+ mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum); -+ return MV_ERROR; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pDecWin->addrWin.baseLow, pDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvUsbWinSet:Error setting USB window %d to "\ -+ "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ winNum, -+ mvCtrlTargetNameGet(pDecWin->target), -+ pDecWin->addrWin.baseLow, -+ pDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ if(MV_OK != mvCtrlAddrDecToParams(pDecWin, &winParams)) -+ { -+ mvOsPrintf("%s: mvCtrlAddrDecToParams Failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* set Size, Attributes and TargetID */ -+ sizeReg = (((winParams.targetId << MV_USB_WIN_TARGET_OFFSET) & MV_USB_WIN_TARGET_MASK) | -+ ((winParams.attrib << MV_USB_WIN_ATTR_OFFSET) & MV_USB_WIN_ATTR_MASK) | -+ ((winParams.size << MV_USB_WIN_SIZE_OFFSET) & MV_USB_WIN_SIZE_MASK)); -+ -+#if defined(MV645xx) || defined(MV646xx) -+ /* If window is DRAM with HW cache coherency, make sure bit2 is set */ -+ sizeReg &= ~MV_USB_WIN_BURST_WR_LIMIT_MASK; -+ -+ if((MV_TARGET_IS_DRAM(pDecWin->target)) && -+ (pDecWin->addrWinAttr.cachePolicy != NO_COHERENCY)) -+ { -+ sizeReg |= MV_USB_WIN_BURST_WR_32BIT_LIMIT; -+ } -+ else -+ { -+ sizeReg |= MV_USB_WIN_BURST_WR_NO_LIMIT; -+ } -+#endif /* MV645xx || MV646xx */ -+ -+ if (pDecWin->enable == MV_TRUE) -+ { -+ sizeReg |= MV_USB_WIN_ENABLE_MASK; -+ } -+ else -+ { -+ sizeReg &= ~MV_USB_WIN_ENABLE_MASK; -+ } -+ -+ /* Update Base value */ -+ baseReg = (winParams.baseAddr & MV_USB_WIN_BASE_MASK); -+ -+ MV_REG_WRITE( MV_USB_WIN_CTRL_REG(dev, winNum), sizeReg); -+ MV_REG_WRITE( MV_USB_WIN_BASE_REG(dev, winNum), baseReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvUsbWinGet - Get USB peripheral target address window. -+* -+* DESCRIPTION: -+* Get USB peripheral target address window. -+* -+* INPUT: -+* winNum - USB target address decode window number. -+* -+* OUTPUT: -+* pDecWin - USB target window data structure. -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvUsbWinGet(int dev, MV_U32 winNum, MV_DEC_WIN *pDecWin) -+{ -+ MV_DEC_WIN_PARAMS winParam; -+ MV_U32 sizeReg, baseReg; -+ -+ /* Parameter checking */ -+ if (winNum >= MV_USB_MAX_ADDR_DECODE_WIN) -+ { -+ mvOsPrintf("%s (dev=%d): ERR. Invalid winNum %d\n", -+ __FUNCTION__, dev, winNum); -+ return MV_NOT_SUPPORTED; -+ } -+ -+ baseReg = MV_REG_READ( MV_USB_WIN_BASE_REG(dev, winNum) ); -+ sizeReg = MV_REG_READ( MV_USB_WIN_CTRL_REG(dev, winNum) ); -+ -+ /* Check if window is enabled */ -+ if(sizeReg & MV_USB_WIN_ENABLE_MASK) -+ { -+ pDecWin->enable = MV_TRUE; -+ -+ /* Extract window parameters from registers */ -+ winParam.targetId = (sizeReg & MV_USB_WIN_TARGET_MASK) >> MV_USB_WIN_TARGET_OFFSET; -+ winParam.attrib = (sizeReg & MV_USB_WIN_ATTR_MASK) >> MV_USB_WIN_ATTR_OFFSET; -+ winParam.size = (sizeReg & MV_USB_WIN_SIZE_MASK) >> MV_USB_WIN_SIZE_OFFSET; -+ winParam.baseAddr = (baseReg & MV_USB_WIN_BASE_MASK); -+ -+ /* Translate the decode window parameters to address decode struct */ -+ if (MV_OK != mvCtrlParamsToAddrDec(&winParam, pDecWin)) -+ { -+ mvOsPrintf("Failed to translate register parameters to USB address" \ -+ " decode window structure\n"); -+ return MV_ERROR; -+ } -+ } -+ else -+ { -+ pDecWin->enable = MV_FALSE; -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvUsbWinInit - -+* -+* INPUT: -+* -+* OUTPUT: -+* -+* RETURN: -+* MV_ERROR if register parameters are invalid. -+* -+*******************************************************************************/ -+MV_STATUS mvUsbWinInit(int dev) -+{ -+ MV_STATUS status; -+ MV_DEC_WIN usbWin; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ int winNum; -+ MV_U32 winPrioIndex = 0; -+ -+ /* First disable all address decode windows */ -+ for(winNum = 0; winNum < MV_USB_MAX_ADDR_DECODE_WIN; winNum++) -+ { -+ MV_REG_BIT_RESET(MV_USB_WIN_CTRL_REG(dev, winNum), MV_USB_WIN_ENABLE_MASK); -+ } -+ -+ /* Go through all windows in user table until table terminator */ -+ winNum = 0; -+ while( (usbAddrDecPrioTab[winPrioIndex] != TBL_TERM) && -+ (winNum < MV_USB_MAX_ADDR_DECODE_WIN) ) -+ { -+ /* first get attributes from CPU If */ -+ status = mvCpuIfTargetWinGet(usbAddrDecPrioTab[winPrioIndex], -+ &cpuAddrDecWin); -+ -+ if(MV_NO_SUCH == status) -+ { -+ winPrioIndex++; -+ continue; -+ } -+ if (MV_OK != status) -+ { -+ mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ usbWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ usbWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ usbWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ usbWin.enable = MV_TRUE; -+ usbWin.target = usbAddrDecPrioTab[winPrioIndex]; -+ -+#if defined(MV645xx) || defined(MV646xx) -+ /* Get the default attributes for that target window */ -+ mvCtrlDefAttribGet(usbWin.target, &usbWin.addrWinAttr); -+#endif /* MV645xx || MV646xx */ -+ -+ if(MV_OK != mvUsbWinSet(dev, winNum, &usbWin)) -+ { -+ return MV_ERROR; -+ } -+ winNum++; -+ } -+ winPrioIndex++; -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvUsbAddrDecShow - Print the USB address decode map. -+* -+* DESCRIPTION: -+* This function print the USB address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvUsbAddrDecShow(MV_VOID) -+{ -+ MV_DEC_WIN addrDecWin; -+ int i, winNum; -+ -+ mvOsOutput( "\n" ); -+ mvOsOutput( "USB:\n" ); -+ mvOsOutput( "----\n" ); -+ -+ for(i=0; i<mvCtrlUsbMaxGet(); i++) -+ { -+ mvOsOutput( "Device %d:\n", i); -+ -+ for(winNum = 0; winNum < MV_USB_MAX_ADDR_DECODE_WIN; winNum++) -+ { -+ memset(&addrDecWin, 0, sizeof(MV_DEC_WIN) ); -+ -+ mvOsOutput( "win%d - ", winNum ); -+ -+ if( mvUsbWinGet(i, winNum, &addrDecWin ) == MV_OK ) -+ { -+ if( addrDecWin.enable ) -+ { -+ mvOsOutput( "%s base %08x, ", -+ mvCtrlTargetNameGet(addrDecWin.target), addrDecWin.addrWin.baseLow ); -+ -+ mvSizePrint( addrDecWin.addrWin.size ); -+ -+#if defined(MV645xx) || defined(MV646xx) -+ switch( addrDecWin.addrWinAttr.swapType) -+ { -+ case MV_BYTE_SWAP: -+ mvOsOutput( "BYTE_SWAP, " ); -+ break; -+ case MV_NO_SWAP: -+ mvOsOutput( "NO_SWAP , " ); -+ break; -+ case MV_BYTE_WORD_SWAP: -+ mvOsOutput( "BYTE_WORD_SWAP, " ); -+ break; -+ case MV_WORD_SWAP: -+ mvOsOutput( "WORD_SWAP, " ); -+ break; -+ default: -+ mvOsOutput( "SWAP N/A , " ); -+ } -+ -+ switch( addrDecWin.addrWinAttr.cachePolicy ) -+ { -+ case NO_COHERENCY: -+ mvOsOutput( "NO_COHERENCY , " ); -+ break; -+ case WT_COHERENCY: -+ mvOsOutput( "WT_COHERENCY , " ); -+ break; -+ case WB_COHERENCY: -+ mvOsOutput( "WB_COHERENCY , " ); -+ break; -+ default: -+ mvOsOutput( "COHERENCY N/A, " ); -+ } -+ -+ switch( addrDecWin.addrWinAttr.pcixNoSnoop ) -+ { -+ case 0: -+ mvOsOutput( "PCI-X NS inactive, " ); -+ break; -+ case 1: -+ mvOsOutput( "PCI-X NS active , " ); -+ break; -+ default: -+ mvOsOutput( "PCI-X NS N/A , " ); -+ } -+ -+ switch( addrDecWin.addrWinAttr.p2pReq64 ) -+ { -+ case 0: -+ mvOsOutput( "REQ64 force" ); -+ break; -+ case 1: -+ mvOsOutput( "REQ64 detect" ); -+ break; -+ default: -+ mvOsOutput( "REQ64 N/A" ); -+ } -+#endif /* MV645xx || MV646xx */ -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+ } -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysUsb.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysUsb.h -new file mode 100644 -index 0000000..b712900 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysUsb.h -@@ -0,0 +1,125 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSysUsbh -+#define __INCmvSysUsbh -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* includes */ -+#include "usb/mvUsb.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+#define MV_USB_MAX_ADDR_DECODE_WIN 4 -+ -+/*******************************************/ -+/* USB Bridge Registers */ -+/*******************************************/ -+#define MV_USB_BRIDGE_CTRL_REG(dev) (USB_REG_BASE(dev) + 0x300) -+ -+#define MV_USB_WIN_CTRL_REG(dev, win) (USB_REG_BASE(dev) + 0x320 + ((win)<<4)) -+#define MV_USB_WIN_BASE_REG(dev, win) (USB_REG_BASE(dev) + 0x324 + ((win)<<4)) -+ -+/* BITs in Windows 0-3 Control and Base Registers */ -+#define MV_USB_WIN_ENABLE_BIT 0 -+#define MV_USB_WIN_ENABLE_MASK (1 << MV_USB_WIN_ENABLE_BIT) -+ -+#define MV_USB_WIN_BURST_WR_LIMIT_BIT 1 -+#define MV_USB_WIN_BURST_WR_LIMIT_MASK (1 << MV_USB_WIN_BURST_WR_LIMIT_BIT) -+#define MV_USB_WIN_BURST_WR_NO_LIMIT (0 << MV_USB_WIN_BURST_WR_LIMIT_BIT) -+#define MV_USB_WIN_BURST_WR_32BIT_LIMIT (1 << MV_USB_WIN_BURST_WR_LIMIT_BIT) -+ -+#define MV_USB_WIN_TARGET_OFFSET 4 -+#define MV_USB_WIN_TARGET_MASK (0xF << MV_USB_WIN_TARGET_OFFSET) -+ -+#define MV_USB_WIN_ATTR_OFFSET 8 -+#define MV_USB_WIN_ATTR_MASK (0xFF << MV_USB_WIN_ATTR_OFFSET) -+ -+#define MV_USB_WIN_SIZE_OFFSET 16 -+#define MV_USB_WIN_SIZE_MASK (0xFFFF << MV_USB_WIN_SIZE_OFFSET) -+ -+#define MV_USB_WIN_BASE_OFFSET 16 -+#define MV_USB_WIN_BASE_MASK (0xFFFF << MV_USB_WIN_BASE_OFFSET) -+ -+ -+#define MV_USB_BRIDGE_IPG_REG(dev) (USB_REG_BASE(dev) + 0x360) -+ -+ -+MV_STATUS mvUsbInit(int dev, MV_BOOL isHost); -+ -+MV_STATUS mvUsbWinInit(int dev); -+MV_STATUS mvUsbWinSet(int dev, MV_U32 winNum, MV_DEC_WIN *pAddrWin); -+MV_STATUS mvUsbWinGet(int dev, MV_U32 winNum, MV_DEC_WIN *pAddrWin); -+ -+void mvUsbAddrDecShow(void); -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* __INCmvUsbh */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysXor.c b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysXor.c -new file mode 100644 -index 0000000..1e1da8f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysXor.c -@@ -0,0 +1,662 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "xor/mvXor.h" -+#include "mvSysXor.h" -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+ -+static MV_STATUS xorWinOverlapDetect(MV_U32 unit,MV_U32 winNum, MV_ADDR_WIN *pAddrWin); -+ -+MV_TARGET xorAddrDecPrioTap[] = -+{ -+#if defined(MV_INCLUDE_DEVICE_CS0) -+ DEVICE_CS0, -+#endif -+#if defined(MV_INCLUDE_PEX) -+ PEX0_MEM, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS0) -+ SDRAM_CS0, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS1) -+ SDRAM_CS1, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS2) -+ SDRAM_CS2, -+#endif -+#if defined(MV_INCLUDE_SDRAM_CS3) -+ SDRAM_CS3, -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS1) -+ DEVICE_CS1, -+#endif -+#if defined(MV_INCLUDE_CESA) -+ CRYPT_ENG, -+#endif -+ TBL_TERM -+}; -+static MV_STATUS mvXorInitWinsUnit (MV_U32 unit) -+{ -+ MV_U32 winNum; -+ MV_XOR_DEC_WIN addrDecWin; -+ MV_CPU_DEC_WIN cpuAddrDecWin; -+ MV_U32 status; -+ MV_U32 winPrioIndex=0; -+ -+ /* Initiate XOR address decode */ -+ -+ /* First disable all address decode windows */ -+ for(winNum = 0; winNum < XOR_MAX_ADDR_DEC_WIN; winNum++) -+ { -+ mvXorTargetWinEnable(unit,winNum, MV_FALSE); -+ } -+ -+ /* Go through all windows in user table until table terminator */ -+ for (winNum = 0; ((xorAddrDecPrioTap[winPrioIndex] != TBL_TERM) && -+ (winNum < XOR_MAX_ADDR_DEC_WIN));) -+ { -+ /* first get attributes from CPU If */ -+ status = mvCpuIfTargetWinGet(xorAddrDecPrioTap[winPrioIndex], -+ &cpuAddrDecWin); -+ -+ if(MV_NO_SUCH == status) -+ { -+ winPrioIndex++; -+ continue; -+ } -+ if (MV_OK != status) -+ { -+ mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ -+ if (cpuAddrDecWin.enable == MV_TRUE) -+ { -+ -+ addrDecWin.target = xorAddrDecPrioTap[winPrioIndex]; -+ addrDecWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow; -+ addrDecWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; -+ addrDecWin.addrWin.size = cpuAddrDecWin.addrWin.size; -+ addrDecWin.enable = MV_TRUE; -+ -+ if (MV_OK != mvXorTargetWinSet(unit,winNum, &addrDecWin)) -+ { -+ DB(mvOsPrintf("mvXorInit: ERR. mvDmaTargetWinSet failed\n")); -+ return MV_ERROR; -+ } -+ winNum++; -+ } -+ winPrioIndex++; -+ -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvXorInit - Initialize XOR engine -+* -+* DESCRIPTION: -+* This function initialize XOR unit. It set the default address decode -+* windows of the unit. -+* Note that if the address window is disabled in xorAddrDecMap, the -+* window parameters will be set but the window will remain disabled. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise. -+*******************************************************************************/ -+MV_STATUS mvXorInit (MV_VOID) -+{ -+ MV_U32 i; -+ -+ /* Initiate XOR address decode */ -+ for(i = 0; i < MV_XOR_MAX_UNIT; i++) -+ mvXorInitWinsUnit(i); -+ -+ mvXorHalInit(MV_XOR_MAX_CHAN); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvXorTargetWinSet - Set XOR target address window -+* -+* DESCRIPTION: -+* This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) -+* address window. After setting this target window, the XOR will be -+* able to access the target within the address window. -+* -+* INPUT: -+* winNum - One of the possible XOR memory decode windows. -+* target - Peripheral target enumerator. -+* base - Window base address. -+* size - Window size. -+* enable - Window enable/disable. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_STATUS mvXorTargetWinSet(MV_U32 unit, MV_U32 winNum, MV_XOR_DEC_WIN *pAddrDecWin) -+{ -+ MV_DEC_REGS xorDecRegs; -+ MV_TARGET_ATTRIB targetAttribs; -+ MV_U32 chan; -+ -+ /* Parameter checking */ -+ if (winNum >= XOR_MAX_ADDR_DEC_WIN) -+ { -+ DB(mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum)); -+ return MV_BAD_PARAM; -+ } -+ if (pAddrDecWin == NULL) -+ { -+ DB(mvOsPrintf("%s: ERR. pAddrDecWin is NULL pointer\n", __FUNCTION__ )); -+ return MV_BAD_PTR; -+ } -+ /* Check if the requested window overlaps with current windows */ -+ if (MV_TRUE == xorWinOverlapDetect(unit, winNum, &pAddrDecWin->addrWin)) -+ { -+ DB(mvOsPrintf("%s: ERR. Window %d overlap\n",__FUNCTION__,winNum)); -+ return MV_ERROR; -+ } -+ -+ xorDecRegs.baseReg = MV_REG_READ(XOR_BASE_ADDR_REG(unit,winNum)); -+ xorDecRegs.sizeReg = MV_REG_READ(XOR_SIZE_MASK_REG(unit,winNum)); -+ -+ /* Get Base Address and size registers values */ -+ if(MV_OK != mvCtrlAddrDecToReg(&pAddrDecWin->addrWin, &xorDecRegs)) -+ { -+ DB(mvOsPrintf("%s: ERR. Invalid addr dec window\n",__FUNCTION__)); -+ return MV_BAD_PARAM; -+ } -+ -+ -+ mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs); -+ -+ /* set attributes */ -+ xorDecRegs.baseReg &= ~XEBARX_ATTR_MASK; -+ xorDecRegs.baseReg |= targetAttribs.attrib << XEBARX_ATTR_OFFS; -+ /* set target ID */ -+ xorDecRegs.baseReg &= ~XEBARX_TARGET_MASK; -+ xorDecRegs.baseReg |= targetAttribs.targetId << XEBARX_TARGET_OFFS; -+ -+ -+ /* Write to address decode Base Address Register */ -+ MV_REG_WRITE(XOR_BASE_ADDR_REG(unit,winNum), xorDecRegs.baseReg); -+ -+ /* Write to Size Register */ -+ MV_REG_WRITE(XOR_SIZE_MASK_REG(unit,winNum), xorDecRegs.sizeReg); -+ -+ for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) -+ { -+ if (pAddrDecWin->enable) -+ { -+ MV_REG_BIT_SET(XOR_WINDOW_CTRL_REG(unit,chan), -+ XEXWCR_WIN_EN_MASK(winNum)); -+ } -+ else -+ { -+ MV_REG_BIT_RESET(XOR_WINDOW_CTRL_REG(unit,chan), -+ XEXWCR_WIN_EN_MASK(winNum)); -+ } -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvXorTargetWinGet - Get xor peripheral target address window. -+* -+* DESCRIPTION: -+* Get xor peripheral target address window. -+* -+* INPUT: -+* winNum - One of the possible XOR memory decode windows. -+* -+* OUTPUT: -+* base - Window base address. -+* size - Window size. -+* enable - window enable/disable. -+* -+* RETURN: -+* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_STATUS mvXorTargetWinGet(MV_U32 unit,MV_U32 winNum, MV_XOR_DEC_WIN *pAddrDecWin) -+{ -+ MV_DEC_REGS xorDecRegs; -+ MV_TARGET_ATTRIB targetAttrib; -+ MV_U32 chan=0,chanWinEn; -+ -+ /* Parameter checking */ -+ if (winNum >= XOR_MAX_ADDR_DEC_WIN) -+ { -+ DB(mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__ , winNum)); -+ return MV_ERROR; -+ } -+ -+ if (NULL == pAddrDecWin) -+ { -+ DB(mvOsPrintf("%s: ERR. pAddrDecWin is NULL pointer\n", __FUNCTION__ )); -+ return MV_BAD_PTR; -+ } -+ -+ chanWinEn = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,0)) & XEXWCR_WIN_EN_MASK(winNum); -+ -+ for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) /* we should scan here all channels per unit */ -+ { -+ /* Check if enable bit is equal for all channels */ -+ if ((MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan)) & -+ XEXWCR_WIN_EN_MASK(winNum)) != chanWinEn) -+ { -+ mvOsPrintf("%s: ERR. Window enable field must be equal in " -+ "all channels(chan=%d)\n",__FUNCTION__, chan); -+ return MV_ERROR; -+ } -+ } -+ -+ -+ -+ xorDecRegs.baseReg = MV_REG_READ(XOR_BASE_ADDR_REG(unit,winNum)); -+ xorDecRegs.sizeReg = MV_REG_READ(XOR_SIZE_MASK_REG(unit,winNum)); -+ -+ if (MV_OK != mvCtrlRegToAddrDec(&xorDecRegs, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("%s: ERR. mvCtrlRegToAddrDec failed\n", __FUNCTION__); -+ return MV_ERROR; -+ } -+ -+ /* attrib and targetId */ -+ targetAttrib.attrib = -+ (xorDecRegs.baseReg & XEBARX_ATTR_MASK) >> XEBARX_ATTR_OFFS; -+ targetAttrib.targetId = -+ (xorDecRegs.baseReg & XEBARX_TARGET_MASK) >> XEBARX_TARGET_OFFS; -+ -+ -+ pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib); -+ -+ if(chanWinEn) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else pAddrDecWin->enable = MV_FALSE; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvXorTargetWinEnable - Enable/disable a Xor address decode window -+* -+* DESCRIPTION: -+* This function enable/disable a XOR address decode window. -+* if parameter 'enable' == MV_TRUE the routine will enable the -+* window, thus enabling XOR accesses (before enabling the window it is -+* tested for overlapping). Otherwise, the window will be disabled. -+* -+* INPUT: -+* winNum - Decode window number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_STATUS mvXorTargetWinEnable(MV_U32 unit,MV_U32 winNum, MV_BOOL enable) -+{ -+ MV_XOR_DEC_WIN addrDecWin; -+ MV_U32 chan; -+ -+ /* Parameter checking */ -+ if (winNum >= XOR_MAX_ADDR_DEC_WIN) -+ { -+ DB(mvOsPrintf("%s: ERR. Invalid winNum%d\n", __FUNCTION__, winNum)); -+ return MV_ERROR; -+ } -+ -+ if (enable == MV_TRUE) -+ { -+ /* Get current window */ -+ if (MV_OK != mvXorTargetWinGet(unit,winNum, &addrDecWin)) -+ { -+ DB(mvOsPrintf("%s: ERR. targetWinGet fail\n", __FUNCTION__)); -+ return MV_ERROR; -+ } -+ -+ /* Check for overlapping */ -+ if (MV_TRUE == xorWinOverlapDetect(unit,winNum, &(addrDecWin.addrWin))) -+ { -+ /* Overlap detected */ -+ DB(mvOsPrintf("%s: ERR. Overlap detected\n", __FUNCTION__)); -+ return MV_ERROR; -+ } -+ -+ /* No Overlap. Enable address decode target window */ -+ for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) -+ { -+ MV_REG_BIT_SET(XOR_WINDOW_CTRL_REG(unit,chan), -+ XEXWCR_WIN_EN_MASK(winNum)); -+ } -+ -+ } -+ else -+ { -+ /* Disable address decode target window */ -+ -+ for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) -+ { -+ MV_REG_BIT_RESET(XOR_WINDOW_CTRL_REG(unit,chan), -+ XEXWCR_WIN_EN_MASK(winNum)); -+ } -+ -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvXorSetProtWinSet - Configure access attributes of a XOR engine -+* to one of the XOR memory windows. -+* -+* DESCRIPTION: -+* Each engine can be configured with access attributes for each of the -+* memory spaces. This function sets access attributes -+* to a given window for the given engine -+* -+* INPUTS: -+* chan - One of the possible engines. -+* winNum - One of the possible XOR memory spaces. -+* access - Protection access rights. -+* write - Write rights. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_STATUS mvXorProtWinSet (MV_U32 unit,MV_U32 chan, MV_U32 winNum, MV_BOOL access, -+ MV_BOOL write) -+{ -+ MV_U32 temp; -+ -+ /* Parameter checking */ -+ if (chan >= MV_XOR_MAX_CHAN_PER_UNIT) -+ { -+ DB(mvOsPrintf("%s: ERR. Invalid chan num %d\n", __FUNCTION__ , chan)); -+ return MV_BAD_PARAM; -+ } -+ if (winNum >= XOR_MAX_ADDR_DEC_WIN) -+ { -+ DB(mvOsPrintf("%s: ERR. Invalid win num %d\n", __FUNCTION__, winNum)); -+ return MV_BAD_PARAM; -+ } -+ -+ temp = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan)) & -+ (~XEXWCR_WIN_ACC_MASK(winNum)); -+ -+ /* if access is disable */ -+ if (!access) -+ { -+ /* disable access */ -+ temp |= XEXWCR_WIN_ACC_NO_ACC(winNum); -+ } -+ /* if access is enable */ -+ else -+ { -+ /* if write is enable */ -+ if (write) -+ { -+ /* enable write */ -+ temp |= XEXWCR_WIN_ACC_RW(winNum); -+ } -+ /* if write is disable */ -+ else -+ { -+ /* disable write */ -+ temp |= XEXWCR_WIN_ACC_RO(winNum); -+ } -+ } -+ MV_REG_WRITE(XOR_WINDOW_CTRL_REG(unit,chan),temp); -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvXorPciRemap - Set XOR remap register for PCI address windows. -+* -+* DESCRIPTION: -+* only Windows 0-3 can be remapped. -+* -+* INPUT: -+* winNum - window number -+* pAddrDecWin - pointer to address space window structure -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_STATUS mvXorPciRemap(MV_U32 unit,MV_U32 winNum, MV_U32 addrHigh) -+{ -+ /* Parameter checking */ -+ if (winNum >= XOR_MAX_REMAP_WIN) -+ { -+ DB(mvOsPrintf("%s: ERR. Invalid win num %d\n", __FUNCTION__, winNum)); -+ return MV_BAD_PARAM; -+ } -+ -+ MV_REG_WRITE(XOR_HIGH_ADDR_REMAP_REG(unit,winNum), addrHigh); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* xorWinOverlapDetect - Detect XOR address windows overlaping -+* -+* DESCRIPTION: -+* An unpredicted behaviour is expected in case XOR address decode -+* windows overlaps. -+* This function detects XOR address decode windows overlaping of a -+* specified window. The function does not check the window itself for -+* overlaping. The function also skipps disabled address decode windows. -+* -+* INPUT: -+* winNum - address decode window number. -+* pAddrDecWin - An address decode window struct. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlap current address -+* decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data -+* from registers. -+* -+*******************************************************************************/ -+static MV_STATUS xorWinOverlapDetect(MV_U32 unit,MV_U32 winNum, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_U32 baseAddrEnableReg; -+ MV_U32 winNumIndex,chan; -+ MV_XOR_DEC_WIN addrDecWin; -+ -+ if (pAddrWin == NULL) -+ { -+ DB(mvOsPrintf("%s: ERR. pAddrWin is NULL pointer\n", __FUNCTION__ )); -+ return MV_BAD_PTR; -+ } -+ -+ for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) -+ { -+ /* Read base address enable register. Do not check disabled windows */ -+ baseAddrEnableReg = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan)); -+ -+ for (winNumIndex = 0; winNumIndex < XOR_MAX_ADDR_DEC_WIN; winNumIndex++) -+ { -+ /* Do not check window itself */ -+ if (winNumIndex == winNum) -+ { -+ continue; -+ } -+ -+ /* Do not check disabled windows */ -+ if ((baseAddrEnableReg & XEXWCR_WIN_EN_MASK(winNumIndex)) == 0) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvXorTargetWinGet(unit,winNumIndex, &addrDecWin)) -+ { -+ DB(mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__ )); -+ return MV_ERROR; -+ } -+ -+ if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin))) -+ { -+ return MV_TRUE; -+ } -+ } -+ } -+ -+ return MV_FALSE; -+} -+ -+static MV_VOID mvXorAddrDecShowUnit(MV_U32 unit) -+{ -+ MV_XOR_DEC_WIN win; -+ int i; -+ -+ mvOsOutput( "\n" ); -+ mvOsOutput( "XOR %d:\n", unit ); -+ mvOsOutput( "----\n" ); -+ -+ for( i = 0; i < XOR_MAX_ADDR_DEC_WIN; i++ ) -+ { -+ memset( &win, 0, sizeof(MV_XOR_DEC_WIN) ); -+ -+ mvOsOutput( "win%d - ", i ); -+ -+ if( mvXorTargetWinGet(unit, i, &win ) == MV_OK ) -+ { -+ if( win.enable ) -+ { -+ mvOsOutput( "%s base %x, ", -+ mvCtrlTargetNameGet(win.target), win.addrWin.baseLow ); -+ -+ mvSizePrint( win.addrWin.size ); -+ -+ mvOsOutput( "\n" ); -+ } -+ else -+ mvOsOutput( "disable\n" ); -+ } -+ } -+} -+ -+/******************************************************************************* -+* mvXorAddrDecShow - Print the XOR address decode map. -+* -+* DESCRIPTION: -+* This function print the XOR address decode map. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID mvXorAddrDecShow(MV_VOID) -+{ -+ int i; -+ -+ for( i = 0; i < MV_XOR_MAX_UNIT; i++ ) -+ mvXorAddrDecShowUnit(i); -+ -+} -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysXor.h b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysXor.h -new file mode 100644 -index 0000000..0a7be8f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysXor.h -@@ -0,0 +1,140 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCMVSysXorh -+#define __INCMVSysXorh -+ -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+#define XOR_MAX_ADDR_DEC_WIN 8 /* Maximum address decode windows */ -+#define XOR_MAX_REMAP_WIN 4 /* Maximum address arbiter windows */ -+ -+/* XOR Engine Address Decoding Register Map */ -+#define XOR_WINDOW_CTRL_REG(unit,chan) (XOR_UNIT_BASE(unit)+(0x240 + ((chan) * 4))) -+#define XOR_BASE_ADDR_REG(unit,winNum) (XOR_UNIT_BASE(unit)+(0x250 + ((winNum) * 4))) -+#define XOR_SIZE_MASK_REG(unit,winNum) (XOR_UNIT_BASE(unit)+(0x270 + ((winNum) * 4))) -+#define XOR_HIGH_ADDR_REMAP_REG(unit,winNum) (XOR_UNIT_BASE(unit)+(0x290 + ((winNum) * 4))) -+ -+/* XOR Engine [0..1] Window Control Registers (XExWCR) */ -+#define XEXWCR_WIN_EN_OFFS(winNum) (winNum) -+#define XEXWCR_WIN_EN_MASK(winNum) (1 << (XEXWCR_WIN_EN_OFFS(winNum))) -+#define XEXWCR_WIN_EN_ENABLE(winNum) (1 << (XEXWCR_WIN_EN_OFFS(winNum))) -+#define XEXWCR_WIN_EN_DISABLE(winNum) (0 << (XEXWCR_WIN_EN_OFFS(winNum))) -+ -+#define XEXWCR_WIN_ACC_OFFS(winNum) ((2 * winNum) + 16) -+#define XEXWCR_WIN_ACC_MASK(winNum) (3 << (XEXWCR_WIN_ACC_OFFS(winNum))) -+#define XEXWCR_WIN_ACC_NO_ACC(winNum) (0 << (XEXWCR_WIN_ACC_OFFS(winNum))) -+#define XEXWCR_WIN_ACC_RO(winNum) (1 << (XEXWCR_WIN_ACC_OFFS(winNum))) -+#define XEXWCR_WIN_ACC_RW(winNum) (3 << (XEXWCR_WIN_ACC_OFFS(winNum))) -+ -+/* XOR Engine Base Address Registers (XEBARx) */ -+#define XEBARX_TARGET_OFFS (0) -+#define XEBARX_TARGET_MASK (0xF << XEBARX_TARGET_OFFS) -+#define XEBARX_ATTR_OFFS (8) -+#define XEBARX_ATTR_MASK (0xFF << XEBARX_ATTR_OFFS) -+#define XEBARX_BASE_OFFS (16) -+#define XEBARX_BASE_MASK (0xFFFF << XEBARX_BASE_OFFS) -+ -+/* XOR Engine Size Mask Registers (XESMRx) */ -+#define XESMRX_SIZE_MASK_OFFS (16) -+#define XESMRX_SIZE_MASK_MASK (0xFFFF << XESMRX_SIZE_MASK_OFFS) -+ -+/* XOR Engine High Address Remap Register (XEHARRx1) */ -+#define XEHARRX_REMAP_OFFS (0) -+#define XEHARRX_REMAP_MASK (0xFFFFFFFF << XEHARRX_REMAP_OFFS) -+ -+typedef struct _mvXorDecWin -+{ -+ MV_TARGET target; -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+ -+}MV_XOR_DEC_WIN; -+ -+MV_STATUS mvXorInit (MV_VOID); -+MV_STATUS mvXorTargetWinSet(MV_U32 unit, MV_U32 winNum, -+ MV_XOR_DEC_WIN *pAddrDecWin); -+MV_STATUS mvXorTargetWinGet(MV_U32 unit, MV_U32 winNum, -+ MV_XOR_DEC_WIN *pAddrDecWin); -+MV_STATUS mvXorTargetWinEnable(MV_U32 unit, -+ MV_U32 winNum, MV_BOOL enable); -+MV_STATUS mvXorProtWinSet (MV_U32 unit,MV_U32 chan, MV_U32 winNum, MV_BOOL access, -+ MV_BOOL write); -+MV_STATUS mvXorPciRemap(MV_U32 unit, MV_U32 winNum, MV_U32 addrHigh); -+ -+MV_VOID mvXorAddrDecShow(MV_VOID); -+ -+#ifdef __cplusplus -+} -+#endif -+ -+#endif -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDevice.c b/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDevice.c -new file mode 100644 -index 0000000..a327944 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDevice.c -@@ -0,0 +1,75 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "device/mvDevice.h" -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDevice.h b/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDevice.h -new file mode 100644 -index 0000000..a8a382b ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDevice.h -@@ -0,0 +1,74 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvDeviceH -+#define __INCmvDeviceH -+ -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+#include "device/mvDeviceRegs.h" -+ -+ -+#endif /* #ifndef __INCmvDeviceH */ -diff --git a/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDeviceRegs.h b/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDeviceRegs.h -new file mode 100644 -index 0000000..599dfe3 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/kw_family/device/mvDeviceRegs.h -@@ -0,0 +1,101 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvDeviceRegsH -+#define __INCmvDeviceRegsH -+ -+#ifndef MV_ASMLANGUAGE -+#include "ctrlEnv/mvCtrlEnvLib.h" -+/* This enumerator describes the Marvell controller possible devices that */ -+/* can be connected to its device interface. */ -+typedef enum _mvDevice -+{ -+#if defined(MV_INCLUDE_DEVICE_CS0) -+ DEV_CS0 = 0, /* Device connected to dev CS[0] */ -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS1) -+ DEV_CS1 = 1, /* Device connected to dev CS[1] */ -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS2) -+ DEV_CS2 = 2, /* Device connected to dev CS[2] */ -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS3) -+ DEV_CS3 = 3, /* Device connected to dev CS[2] */ -+#endif -+#if defined(MV_INCLUDE_DEVICE_CS4) -+ DEV_CS4 = 4, /* Device connected to BOOT dev */ -+#endif -+ MV_DEV_MAX_CS = MV_DEVICE_MAX_CS -+}MV_DEVICE; -+ -+ -+#endif /* MV_ASMLANGUAGE */ -+ -+ -+#define NAND_CTRL_REG 0x10470 -+ -+#define NAND_ACTCEBOOT_BIT BIT1 -+ -+ -+#endif /* #ifndef __INCmvDeviceRegsH */ -diff --git a/crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.c b/crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.c -new file mode 100644 -index 0000000..749b885 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.c -@@ -0,0 +1,211 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+*******************************************************************************/ -+/******************************************************************************* -+* mvOsCpuArchLib.c - Marvell CPU architecture library -+* -+* DESCRIPTION: -+* This library introduce Marvell API for OS dependent CPU architecture -+* APIs. This library introduce single CPU architecture services APKI -+* cross OS. -+* -+* DEPENDENCIES: -+* None. -+* -+*******************************************************************************/ -+ -+/* includes */ -+#include <asm/processor.h> -+#include "mvOs.h" -+ -+static MV_U32 read_p15_c0 (void); -+ -+/* defines */ -+#define ARM_ID_REVISION_OFFS 0 -+#define ARM_ID_REVISION_MASK (0xf << ARM_ID_REVISION_OFFS) -+ -+#define ARM_ID_PART_NUM_OFFS 4 -+#define ARM_ID_PART_NUM_MASK (0xfff << ARM_ID_PART_NUM_OFFS) -+ -+#define ARM_ID_ARCH_OFFS 16 -+#define ARM_ID_ARCH_MASK (0xf << ARM_ID_ARCH_OFFS) -+ -+#define ARM_ID_VAR_OFFS 20 -+#define ARM_ID_VAR_MASK (0xf << ARM_ID_VAR_OFFS) -+ -+#define ARM_ID_ASCII_OFFS 24 -+#define ARM_ID_ASCII_MASK (0xff << ARM_ID_ASCII_OFFS) -+ -+ -+ -+void* mvOsIoCachedMalloc( void* osHandle, MV_U32 size, MV_ULONG* pPhyAddr, -+ MV_U32 *memHandle) -+{ -+ void *p = kmalloc( size, GFP_KERNEL ); -+ *pPhyAddr = pci_map_single( osHandle, p, 0, PCI_DMA_BIDIRECTIONAL ); -+ return p; -+} -+void* mvOsIoUncachedMalloc( void* osHandle, MV_U32 size, MV_ULONG* pPhyAddr, -+ MV_U32 *memHandle) -+{ -+ return pci_alloc_consistent( osHandle, size, (dma_addr_t *)pPhyAddr ); -+} -+ -+void mvOsIoUncachedFree( void* osHandle, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr, -+ MV_U32 memHandle) -+{ -+ return pci_free_consistent( osHandle, size, pVirtAddr, (dma_addr_t)phyAddr ); -+} -+ -+void mvOsIoCachedFree( void* osHandle, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr, -+ MV_U32 memHandle ) -+{ -+ return kfree( pVirtAddr ); -+} -+ -+int mvOsRand(void) -+{ -+ int rand; -+ get_random_bytes(&rand, sizeof(rand) ); -+ return rand; -+} -+ -+/******************************************************************************* -+* mvOsCpuVerGet() - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit CPU Revision -+* -+*******************************************************************************/ -+MV_U32 mvOsCpuRevGet( MV_VOID ) -+{ -+ return ((read_p15_c0() & ARM_ID_REVISION_MASK ) >> ARM_ID_REVISION_OFFS); -+} -+/******************************************************************************* -+* mvOsCpuPartGet() - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit CPU Part number -+* -+*******************************************************************************/ -+MV_U32 mvOsCpuPartGet( MV_VOID ) -+{ -+ return ((read_p15_c0() & ARM_ID_PART_NUM_MASK ) >> ARM_ID_PART_NUM_OFFS); -+} -+/******************************************************************************* -+* mvOsCpuArchGet() - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit CPU Architicture number -+* -+*******************************************************************************/ -+MV_U32 mvOsCpuArchGet( MV_VOID ) -+{ -+ return ((read_p15_c0() & ARM_ID_ARCH_MASK ) >> ARM_ID_ARCH_OFFS); -+} -+/******************************************************************************* -+* mvOsCpuVarGet() - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit CPU Variant number -+* -+*******************************************************************************/ -+MV_U32 mvOsCpuVarGet( MV_VOID ) -+{ -+ return ((read_p15_c0() & ARM_ID_VAR_MASK ) >> ARM_ID_VAR_OFFS); -+} -+/******************************************************************************* -+* mvOsCpuAsciiGet() - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit CPU Variant number -+* -+*******************************************************************************/ -+MV_U32 mvOsCpuAsciiGet( MV_VOID ) -+{ -+ return ((read_p15_c0() & ARM_ID_ASCII_MASK ) >> ARM_ID_ASCII_OFFS); -+} -+ -+ -+ -+/* -+static unsigned long read_p15_c0 (void) -+*/ -+/* read co-processor 15, register #0 (ID register) */ -+static MV_U32 read_p15_c0 (void) -+{ -+ MV_U32 value; -+ -+ __asm__ __volatile__( -+ "mrc p15, 0, %0, c0, c0, 0 @ read control reg\n" -+ : "=r" (value) -+ : -+ : "memory"); -+ -+ return value; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.h b/crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.h -new file mode 100644 -index 0000000..9122a52 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/linux_oss/mvOs.h -@@ -0,0 +1,423 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+*******************************************************************************/ -+#ifndef _MV_OS_LNX_H_ -+#define _MV_OS_LNX_H_ -+ -+ -+#ifdef __KERNEL__ -+/* for kernel space */ -+#include <linux/autoconf.h> -+#include <linux/interrupt.h> -+#include <linux/stddef.h> -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/errno.h> -+#include <linux/reboot.h> -+#include <linux/pci.h> -+#include <linux/kdev_t.h> -+#include <linux/major.h> -+#include <linux/blkdev.h> -+#include <linux/console.h> -+#include <linux/delay.h> -+#include <linux/seq_file.h> -+#include <linux/string.h> -+#include <linux/slab.h> -+#include <linux/kernel.h> -+#include <linux/string.h> -+#include <linux/slab.h> -+#include <linux/mm.h> -+ -+#include <asm/system.h> -+#include <asm/pgtable.h> -+#include <asm/page.h> -+#include <asm/hardirq.h> -+#include <asm/dma.h> -+#include <asm/io.h> -+ -+#include <linux/random.h> -+ -+#include "dbg-trace.h" -+ -+extern void mv_early_printk(char *fmt,...); -+ -+#define MV_ASM __asm__ __volatile__ -+#define INLINE inline -+#define MV_TRC_REC TRC_REC -+#define mvOsPrintf printk -+#define mvOsEarlyPrintf mv_early_printk -+#define mvOsOutput printk -+#define mvOsSPrintf sprintf -+#define mvOsMalloc(_size_) kmalloc(_size_,GFP_ATOMIC) -+#define mvOsFree kfree -+#define mvOsMemcpy memcpy -+#define mvOsSleep(_mils_) mdelay(_mils_) -+#define mvOsTaskLock() -+#define mvOsTaskUnlock() -+#define strtol simple_strtoul -+#define mvOsDelay(x) mdelay(x) -+#define mvOsUDelay(x) udelay(x) -+#define mvCopyFromOs copy_from_user -+#define mvCopyToOs copy_to_user -+ -+ -+#include "mvTypes.h" -+#include "mvCommon.h" -+ -+#ifdef MV_NDEBUG -+#define mvOsAssert(cond) -+#else -+#define mvOsAssert(cond) { do { if(!(cond)) { BUG(); } }while(0); } -+#endif /* MV_NDEBUG */ -+ -+#else /* __KERNEL__ */ -+ -+/* for user space applications */ -+#include <stdlib.h> -+#include <stdio.h> -+#include <assert.h> -+#include <string.h> -+ -+#define INLINE inline -+#define mvOsPrintf printf -+#define mvOsOutput printf -+#define mvOsMalloc(_size_) malloc(_size_) -+#define mvOsFree free -+#define mvOsAssert(cond) assert(cond) -+ -+#endif /* __KERNEL__ */ -+#define mvOsIoVirtToPhy(pDev, pVirtAddr) \ -+ pci_map_single( (pDev), (pVirtAddr), 0, PCI_DMA_BIDIRECTIONAL ) -+ -+#define mvOsCacheClear(pDev, p, size ) \ -+ pci_map_single( (pDev), (p), (size), PCI_DMA_BIDIRECTIONAL) -+ -+#define mvOsCacheFlush(pDev, p, size ) \ -+ pci_map_single( (pDev), (p), (size), PCI_DMA_TODEVICE) -+ -+#define mvOsCacheInvalidate(pDev, p, size) \ -+ pci_map_single( (pDev), (p), (size), PCI_DMA_FROMDEVICE ) -+ -+#define mvOsCacheUnmap(pDev, phys, size) \ -+ pci_unmap_single( (pDev), (dma_addr_t)(phys), (size), PCI_DMA_FROMDEVICE ) -+ -+ -+#define CPU_PHY_MEM(x) (MV_U32)x -+#define CPU_MEMIO_CACHED_ADDR(x) (void*)x -+#define CPU_MEMIO_UNCACHED_ADDR(x) (void*)x -+ -+ -+/* CPU architecture dependent 32, 16, 8 bit read/write IO addresses */ -+#define MV_MEMIO32_WRITE(addr, data) \ -+ ((*((volatile unsigned int*)(addr))) = ((unsigned int)(data))) -+ -+#define MV_MEMIO32_READ(addr) \ -+ ((*((volatile unsigned int*)(addr)))) -+ -+#define MV_MEMIO16_WRITE(addr, data) \ -+ ((*((volatile unsigned short*)(addr))) = ((unsigned short)(data))) -+ -+#define MV_MEMIO16_READ(addr) \ -+ ((*((volatile unsigned short*)(addr)))) -+ -+#define MV_MEMIO8_WRITE(addr, data) \ -+ ((*((volatile unsigned char*)(addr))) = ((unsigned char)(data))) -+ -+#define MV_MEMIO8_READ(addr) \ -+ ((*((volatile unsigned char*)(addr)))) -+ -+ -+/* No Fast Swap implementation (in assembler) for ARM */ -+#define MV_32BIT_LE_FAST(val) MV_32BIT_LE(val) -+#define MV_16BIT_LE_FAST(val) MV_16BIT_LE(val) -+#define MV_32BIT_BE_FAST(val) MV_32BIT_BE(val) -+#define MV_16BIT_BE_FAST(val) MV_16BIT_BE(val) -+ -+/* 32 and 16 bit read/write in big/little endian mode */ -+ -+/* 16bit write in little endian mode */ -+#define MV_MEMIO_LE16_WRITE(addr, data) \ -+ MV_MEMIO16_WRITE(addr, MV_16BIT_LE_FAST(data)) -+ -+/* 16bit read in little endian mode */ -+static __inline MV_U16 MV_MEMIO_LE16_READ(MV_U32 addr) -+{ -+ MV_U16 data; -+ -+ data= (MV_U16)MV_MEMIO16_READ(addr); -+ -+ return (MV_U16)MV_16BIT_LE_FAST(data); -+} -+ -+/* 32bit write in little endian mode */ -+#define MV_MEMIO_LE32_WRITE(addr, data) \ -+ MV_MEMIO32_WRITE(addr, MV_32BIT_LE_FAST(data)) -+ -+/* 32bit read in little endian mode */ -+static __inline MV_U32 MV_MEMIO_LE32_READ(MV_U32 addr) -+{ -+ MV_U32 data; -+ -+ data= (MV_U32)MV_MEMIO32_READ(addr); -+ -+ return (MV_U32)MV_32BIT_LE_FAST(data); -+} -+ -+static __inline void mvOsBCopy(char* srcAddr, char* dstAddr, int byteCount) -+{ -+ while(byteCount != 0) -+ { -+ *dstAddr = *srcAddr; -+ dstAddr++; -+ srcAddr++; -+ byteCount--; -+ } -+} -+ -+static INLINE MV_U64 mvOsDivMod64(MV_U64 divided, MV_U64 divisor, MV_U64* modulu) -+{ -+ MV_U64 division = 0; -+ -+ if(divisor == 1) -+ return divided; -+ -+ while(divided >= divisor) -+ { -+ division++; -+ divided -= divisor; -+ } -+ if (modulu != NULL) -+ *modulu = divided; -+ -+ return division; -+} -+ -+#if defined(MV_BRIDGE_SYNC_REORDER) -+extern MV_U32 *mvUncachedParam; -+ -+static __inline void mvOsBridgeReorderWA(void) -+{ -+ volatile MV_U32 val = 0; -+ -+ val = mvUncachedParam[0]; -+} -+#endif -+ -+ -+/* Flash APIs */ -+#define MV_FL_8_READ MV_MEMIO8_READ -+#define MV_FL_16_READ MV_MEMIO_LE16_READ -+#define MV_FL_32_READ MV_MEMIO_LE32_READ -+#define MV_FL_8_DATA_READ MV_MEMIO8_READ -+#define MV_FL_16_DATA_READ MV_MEMIO16_READ -+#define MV_FL_32_DATA_READ MV_MEMIO32_READ -+#define MV_FL_8_WRITE MV_MEMIO8_WRITE -+#define MV_FL_16_WRITE MV_MEMIO_LE16_WRITE -+#define MV_FL_32_WRITE MV_MEMIO_LE32_WRITE -+#define MV_FL_8_DATA_WRITE MV_MEMIO8_WRITE -+#define MV_FL_16_DATA_WRITE MV_MEMIO16_WRITE -+#define MV_FL_32_DATA_WRITE MV_MEMIO32_WRITE -+ -+ -+/* CPU cache information */ -+#define CPU_I_CACHE_LINE_SIZE 32 /* 2do: replace 32 with linux core macro */ -+#define CPU_D_CACHE_LINE_SIZE 32 /* 2do: replace 32 with linux core macro */ -+ -+#ifdef CONFIG_L2_CACHE_ENABLE -+/* Data cache flush one line */ -+#define mvOsCacheLineFlushInv(handle, addr) \ -+{ \ -+ __asm__ __volatile__ ("mcr p15, 0, %0, c7, c14, 1" : : "r" (addr));\ -+ __asm__ __volatile__ ("mcr p15, 1, %0, c15, c10, 1" : : "r" (addr));\ -+ __asm__ __volatile__ ("mcr p15, 0, r0, c7, c10, 4"); \ -+} -+ -+#else -+ -+/* Data cache flush one line */ -+#define mvOsCacheLineFlushInv(handle, addr) \ -+{ \ -+ __asm__ __volatile__ ("mcr p15, 0, %0, c7, c14, 1" : : "r" (addr));\ -+ __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (addr)); \ -+} -+#endif -+ -+#ifdef CONFIG_L2_CACHE_ENABLE -+#define mvOsCacheLineInv(handle,addr) \ -+{ \ -+ __asm__ __volatile__ ("mcr p15, 0, %0, c7, c6, 1" : : "r" (addr)); \ -+ __asm__ __volatile__ ("mcr p15, 1, %0, c15, c11, 1" : : "r" (addr)); \ -+} -+#else -+#define mvOsCacheLineInv(handle,addr) \ -+{ \ -+ __asm__ __volatile__ ("mcr p15, 0, %0, c7, c6, 1" : : "r" (addr)); \ -+} -+#endif -+ -+#ifdef CONFIG_L2_CACHE_ENABLE -+/* Data cache flush one line */ -+#define mvOsCacheLineFlush(handle, addr) \ -+{ \ -+ __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 1" : : "r" (addr));\ -+ __asm__ __volatile__ ("mcr p15, 1, %0, c15, c9, 1" : : "r" (addr));\ -+ __asm__ __volatile__ ("mcr p15, 0, r0, c7, c10, 4"); \ -+} -+ -+#else -+/* Data cache flush one line */ -+#define mvOsCacheLineFlush(handle, addr) \ -+{ \ -+ __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 1" : : "r" (addr));\ -+ __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (addr)); \ -+} -+#endif -+ -+static __inline void mvOsPrefetch(const void *ptr) -+{ -+#ifdef CONFIG_USE_DSP -+ __asm__ __volatile__( -+ "pld\t%0" -+ : -+ : "o" (*(char *)ptr) -+ : "cc"); -+#else -+ return; -+#endif -+} -+ -+ -+/* Flush CPU pipe */ -+#define CPU_PIPE_FLUSH -+ -+ -+ -+ -+ -+/* register manipulations */ -+ -+/****************************************************************************** -+* This debug function enable the write of each register that u-boot access to -+* to an array in the DRAM, the function record only MV_REG_WRITE access. -+* The function could not be operate when booting from flash. -+* In order to print the array we use the printreg command. -+******************************************************************************/ -+/* #define REG_DEBUG */ -+#if defined(REG_DEBUG) -+extern int reg_arry[2048][2]; -+extern int reg_arry_index; -+#endif -+ -+/* Marvell controller register read/write macros */ -+#define MV_REG_VALUE(offset) \ -+ (MV_MEMIO32_READ((INTER_REGS_BASE | (offset)))) -+ -+#define MV_REG_READ(offset) \ -+ (MV_MEMIO_LE32_READ(INTER_REGS_BASE | (offset))) -+ -+#if defined(REG_DEBUG) -+#define MV_REG_WRITE(offset, val) \ -+ MV_MEMIO_LE32_WRITE((INTER_REGS_BASE | (offset)), (val)); \ -+ { \ -+ reg_arry[reg_arry_index][0] = (INTER_REGS_BASE | (offset));\ -+ reg_arry[reg_arry_index][1] = (val);\ -+ reg_arry_index++;\ -+ } -+#else -+#define MV_REG_WRITE(offset, val) \ -+ MV_MEMIO_LE32_WRITE((INTER_REGS_BASE | (offset)), (val)); -+#endif -+ -+#define MV_REG_BYTE_READ(offset) \ -+ (MV_MEMIO8_READ((INTER_REGS_BASE | (offset)))) -+ -+#if defined(REG_DEBUG) -+#define MV_REG_BYTE_WRITE(offset, val) \ -+ MV_MEMIO8_WRITE((INTER_REGS_BASE | (offset)), (val)); \ -+ { \ -+ reg_arry[reg_arry_index][0] = (INTER_REGS_BASE | (offset));\ -+ reg_arry[reg_arry_index][1] = (val);\ -+ reg_arry_index++;\ -+ } -+#else -+#define MV_REG_BYTE_WRITE(offset, val) \ -+ MV_MEMIO8_WRITE((INTER_REGS_BASE | (offset)), (val)) -+#endif -+ -+#if defined(REG_DEBUG) -+#define MV_REG_BIT_SET(offset, bitMask) \ -+ (MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \ -+ (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)) | \ -+ MV_32BIT_LE_FAST(bitMask)))); \ -+ { \ -+ reg_arry[reg_arry_index][0] = (INTER_REGS_BASE | (offset));\ -+ reg_arry[reg_arry_index][1] = (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)));\ -+ reg_arry_index++;\ -+ } -+#else -+#define MV_REG_BIT_SET(offset, bitMask) \ -+ (MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \ -+ (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)) | \ -+ MV_32BIT_LE_FAST(bitMask)))) -+#endif -+ -+#if defined(REG_DEBUG) -+#define MV_REG_BIT_RESET(offset,bitMask) \ -+ (MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \ -+ (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)) & \ -+ MV_32BIT_LE_FAST(~bitMask)))); \ -+ { \ -+ reg_arry[reg_arry_index][0] = (INTER_REGS_BASE | (offset));\ -+ reg_arry[reg_arry_index][1] = (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)));\ -+ reg_arry_index++;\ -+ } -+#else -+#define MV_REG_BIT_RESET(offset,bitMask) \ -+ (MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \ -+ (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)) & \ -+ MV_32BIT_LE_FAST(~bitMask)))) -+#endif -+ -+ -+ -+/* ARM architecture APIs */ -+MV_U32 mvOsCpuRevGet (MV_VOID); -+MV_U32 mvOsCpuPartGet (MV_VOID); -+MV_U32 mvOsCpuArchGet (MV_VOID); -+MV_U32 mvOsCpuVarGet (MV_VOID); -+MV_U32 mvOsCpuAsciiGet (MV_VOID); -+ -+/* Other APIs */ -+void* mvOsIoCachedMalloc( void* osHandle, MV_U32 size, MV_ULONG* pPhyAddr, MV_U32 *memHandle); -+void* mvOsIoUncachedMalloc( void* osHandle, MV_U32 size, MV_ULONG* pPhyAddr, MV_U32 *memHandle ); -+void mvOsIoUncachedFree( void* osHandle, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr, MV_U32 memHandle ); -+void mvOsIoCachedFree( void* osHandle, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr, MV_U32 memHandle ); -+int mvOsRand(void); -+ -+#endif /* _MV_OS_LNX_H_ */ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/linux_oss/mvOsSata.h b/crypto/ocf/kirkwood/mvHal/linux_oss/mvOsSata.h -new file mode 100644 -index 0000000..170481a ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/linux_oss/mvOsSata.h -@@ -0,0 +1,158 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+*******************************************************************************/ -+/******************************************************************************* -+* mvOsLinux.h - O.S. interface header file for Linux -+* -+* DESCRIPTION: -+* This header file contains OS dependent definition under Linux -+* -+* DEPENDENCIES: -+* Linux kernel header files. -+* -+* FILE REVISION NUMBER: -+* $Revision: 1.1 $ -+*******************************************************************************/ -+ -+#ifndef __INCmvOsLinuxh -+#define __INCmvOsLinuxh -+ -+/* Includes */ -+#include <linux/autoconf.h> -+#include <linux/module.h> -+#include <linux/types.h> -+#include <linux/string.h> -+#include <linux/kernel.h> -+#include <linux/timer.h> -+#include <linux/mm.h> -+#include <linux/interrupt.h> -+#include <linux/major.h> -+#include <linux/errno.h> -+#include <linux/genhd.h> -+#include <linux/slab.h> -+#include <linux/delay.h> -+#include <linux/ide.h> -+#include <linux/pci.h> -+ -+#include <asm/byteorder.h> -+#include <asm/irq.h> -+#include <asm/uaccess.h> -+#include <asm/io.h> -+#include "mvOs.h" -+ -+ -+/* Definitions */ -+#define MV_DEFAULT_QUEUE_DEPTH 2 -+#define MV_SATA_SUPPORT_EDMA_SINGLE_DATA_REGION -+#define MV_SATA_SUPPORT_GEN2E_128_QUEUE_LEN -+ -+#ifdef CONFIG_MV88F6082 -+ #define MV_SATA_OVERRIDE_SW_QUEUE_SIZE -+ #define MV_SATA_REQUESTED_SW_QUEUE_SIZE 2 -+ #undef MV_SATA_SUPPORT_GEN2E_128_QUEUE_LEN -+#endif -+ -+/* System dependent macro for flushing CPU write cache */ -+#if defined (MV_BRIDGE_SYNC_REORDER) -+#define MV_CPU_WRITE_BUFFER_FLUSH() do { \ -+ wmb(); \ -+ mvOsBridgeReorderWA(); \ -+ } while (0) -+#else -+#define MV_CPU_WRITE_BUFFER_FLUSH() wmb() -+#endif /* CONFIG_MV78XX0 */ -+ -+/* System dependent little endian from / to CPU conversions */ -+#define MV_CPU_TO_LE16(x) cpu_to_le16(x) -+#define MV_CPU_TO_LE32(x) cpu_to_le32(x) -+ -+#define MV_LE16_TO_CPU(x) le16_to_cpu(x) -+#define MV_LE32_TO_CPU(x) le32_to_cpu(x) -+ -+#ifdef __BIG_ENDIAN_BITFIELD -+#define MV_BIG_ENDIAN_BITFIELD -+#endif -+ -+/* System dependent register read / write in byte/word/dword variants */ -+#define MV_REG_WRITE_BYTE(base, offset, val) writeb(val, base + offset) -+#define MV_REG_WRITE_WORD(base, offset, val) writew(val, base + offset) -+#define MV_REG_WRITE_DWORD(base, offset, val) writel(val, base + offset) -+#define MV_REG_READ_BYTE(base, offset) readb(base + offset) -+#define MV_REG_READ_WORD(base, offset) readw(base + offset) -+#define MV_REG_READ_DWORD(base, offset) readl(base + offset) -+ -+ -+/* Typedefs */ -+ -+/* System dependant typedefs */ -+typedef void *MV_VOID_PTR; -+typedef u32 *MV_U32_PTR; -+typedef u16 *MV_U16_PTR; -+typedef u8 *MV_U8_PTR; -+typedef char *MV_CHAR_PTR; -+typedef void *MV_BUS_ADDR_T; -+typedef unsigned long MV_CPU_FLAGS; -+ -+ -+/* Structures */ -+/* System dependent structure */ -+typedef struct mvOsSemaphore -+{ -+ int notUsed; -+} MV_OS_SEMAPHORE; -+ -+ -+/* Functions (User implemented)*/ -+ -+/* Semaphore init, take and release */ -+#define mvOsSemInit(x) MV_TRUE -+#define mvOsSemTake(x) -+#define mvOsSemRelease(x) -+ -+/* Interrupt masking and unmasking functions */ -+MV_CPU_FLAGS mvOsSaveFlagsAndMaskCPUInterrupts(MV_VOID); -+MV_VOID mvOsRestoreFlags(MV_CPU_FLAGS); -+ -+/* Delay function in micro seconds resolution */ -+void mvMicroSecondsDelay(MV_VOID_PTR, MV_U32); -+ -+/* Typedefs */ -+typedef enum mvBoolean -+{ -+ MV_SFALSE, MV_STRUE -+} MV_BOOLEAN; -+ -+/* System logging function */ -+#include "mvLog.h" -+/* Enable READ/WRITE Long SCSI command only when driver is compiled for debugging */ -+#ifdef MV_LOGGER -+#define MV_SATA_SUPPORT_READ_WRITE_LONG -+#endif -+ -+#define MV_IAL_LOG_ID 3 -+ -+#endif /* __INCmvOsLinuxh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mvSysHwConfig.h b/crypto/ocf/kirkwood/mvHal/mvSysHwConfig.h -new file mode 100644 -index 0000000..8352290 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mvSysHwConfig.h -@@ -0,0 +1,375 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+ -+*******************************************************************************/ -+/******************************************************************************* -+* mvSysHwCfg.h - Marvell system HW configuration file -+* -+* DESCRIPTION: -+* None. -+* -+* DEPENDENCIES: -+* None. -+* -+*******************************************************************************/ -+ -+#ifndef __INCmvSysHwConfigh -+#define __INCmvSysHwConfigh -+ -+#include "../../../../include/linux/autoconf.h" -+ -+#define CONFIG_MARVELL 1 -+ -+/* includes */ -+#define _1K 0x00000400 -+#define _4K 0x00001000 -+#define _8K 0x00002000 -+#define _16K 0x00004000 -+#define _32K 0x00008000 -+#define _64K 0x00010000 -+#define _128K 0x00020000 -+#define _256K 0x00040000 -+#define _512K 0x00080000 -+ -+#define _1M 0x00100000 -+#define _2M 0x00200000 -+#define _4M 0x00400000 -+#define _8M 0x00800000 -+#define _16M 0x01000000 -+#define _32M 0x02000000 -+#define _64M 0x04000000 -+#define _128M 0x08000000 -+#define _256M 0x10000000 -+#define _512M 0x20000000 -+ -+#define _1G 0x40000000 -+#define _2G 0x80000000 -+ -+/****************************************/ -+/* Soc supporeted Units definitions */ -+/****************************************/ -+ -+#ifdef CONFIG_MV_INCLUDE_PEX -+#define MV_INCLUDE_PEX -+#endif -+#ifdef CONFIG_MV_INCLUDE_TWSI -+#define MV_INCLUDE_TWSI -+#endif -+#ifdef CONFIG_MV_INCLUDE_CESA -+#define MV_INCLUDE_CESA -+#endif -+#ifdef CONFIG_MV_INCLUDE_GIG_ETH -+#define MV_INCLUDE_GIG_ETH -+#endif -+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA -+#define MV_INCLUDE_INTEG_SATA -+#define MV_INCLUDE_SATA -+#endif -+#ifdef CONFIG_MV_INCLUDE_USB -+#define MV_INCLUDE_USB -+#define MV_USB_VOLTAGE_FIX -+#endif -+#ifdef CONFIG_MV_INCLUDE_NAND -+#define MV_INCLUDE_NAND -+#endif -+#ifdef CONFIG_MV_INCLUDE_TDM -+#define MV_INCLUDE_TDM -+#endif -+#ifdef CONFIG_MV_INCLUDE_XOR -+#define MV_INCLUDE_XOR -+#endif -+#ifdef CONFIG_MV_INCLUDE_TWSI -+#define MV_INCLUDE_TWSI -+#endif -+#ifdef CONFIG_MV_INCLUDE_UART -+#define MV_INCLUDE_UART -+#endif -+#ifdef CONFIG_MV_INCLUDE_SPI -+#define MV_INCLUDE_SPI -+#endif -+#ifdef CONFIG_MV_INCLUDE_SFLASH_MTD -+#define MV_INCLUDE_SFLASH_MTD -+#endif -+#ifdef CONFIG_MV_INCLUDE_AUDIO -+#define MV_INCLUDE_AUDIO -+#endif -+#ifdef CONFIG_MV_INCLUDE_TS -+#define MV_INCLUDE_TS -+#endif -+#ifdef CONFIG_MV_INCLUDE_SDIO -+#define MV_INCLUDE_SDIO -+#endif -+ -+ -+/* NAND flash stuff */ -+#ifdef CONFIG_MV_NAND_BOOT -+#define MV_NAND_BOOT -+#endif -+#ifdef CONFIG_MV_NAND -+#define MV_NAND -+#endif -+ -+/* SPI flash stuff */ -+#ifdef CONFIG_MV_SPI_BOOT -+#define MV_SPI_BOOT -+#endif -+ -+ -+/****************************************************************/ -+/************* General configuration ********************/ -+/****************************************************************/ -+ -+/* Enable Clock Power Control */ -+#define MV_INCLUDE_CLK_PWR_CNTRL -+ -+/* Disable the DEVICE BAR in the PEX */ -+#define MV_DISABLE_PEX_DEVICE_BAR -+ -+/* Allow the usage of early printings during initialization */ -+#define MV_INCLUDE_EARLY_PRINTK -+ -+/****************************************************************/ -+/************* NFP configuration ********************************/ -+/****************************************************************/ -+#define MV_NFP_SEC_Q_SIZE 64 -+#define MV_NFP_SEC_REQ_Q_SIZE 1000 -+ -+ -+ -+/****************************************************************/ -+/************* CESA configuration ********************/ -+/****************************************************************/ -+ -+#ifdef MV_INCLUDE_CESA -+ -+#define MV_CESA_MAX_CHAN 4 -+ -+/* Use 2K of SRAM */ -+#define MV_CESA_MAX_BUF_SIZE 1600 -+ -+#endif /* MV_INCLUDE_CESA */ -+ -+#if defined(CONFIG_MV_INCLUDE_GIG_ETH) -+ -+#ifdef CONFIG_MV_NFP_STATS -+#define MV_FP_STATISTICS -+#else -+#undef MV_FP_STATISTICS -+#endif -+/* Default configuration for SKB_REUSE: 0 - Disabled, 1 - Enabled */ -+#define MV_ETH_SKB_REUSE_DEFAULT 1 -+/* Default configuration for TX_EN workaround: 0 - Disabled, 1 - Enabled */ -+#define MV_ETH_TX_EN_DEFAULT 0 -+ -+/* un-comment if you want to perform tx_done from within the poll function */ -+/* #define ETH_TX_DONE_ISR */ -+ -+/* put descriptors in uncached memory */ -+/* #define ETH_DESCR_UNCACHED */ -+ -+/* Descriptors location: DRAM/internal-SRAM */ -+#define ETH_DESCR_IN_SDRAM -+#undef ETH_DESCR_IN_SRAM /* No integrated SRAM in 88Fxx81 devices */ -+ -+#if defined(ETH_DESCR_IN_SRAM) -+#if defined(ETH_DESCR_UNCACHED) -+ #define ETH_DESCR_CONFIG_STR "Uncached descriptors in integrated SRAM" -+#else -+ #define ETH_DESCR_CONFIG_STR "Cached descriptors in integrated SRAM" -+#endif -+#elif defined(ETH_DESCR_IN_SDRAM) -+#if defined(ETH_DESCR_UNCACHED) -+ #define ETH_DESCR_CONFIG_STR "Uncached descriptors in DRAM" -+#else -+ #define ETH_DESCR_CONFIG_STR "Cached descriptors in DRAM" -+#endif -+#else -+ #error "Ethernet descriptors location undefined" -+#endif /* ETH_DESCR_IN_SRAM or ETH_DESCR_IN_SDRAM*/ -+ -+/* SW Sync-Barrier: not relevant for 88fxx81*/ -+/* Reasnable to define this macro when descriptors in SRAM and buffers in DRAM */ -+/* In RX the CPU theoretically might see himself as the descriptor owner, */ -+/* although the buffer hadn't been written to DRAM yet. Performance cost. */ -+/* #define INCLUDE_SYNC_BARR */ -+ -+/* Buffers cache coherency method (buffers in DRAM) */ -+#ifndef MV_CACHE_COHER_SW -+/* Taken from mvCommon.h */ -+/* Memory uncached, HW or SW cache coherency is not needed */ -+#define MV_UNCACHED 0 -+/* Memory cached, HW cache coherency supported in WriteThrough mode */ -+#define MV_CACHE_COHER_HW_WT 1 -+/* Memory cached, HW cache coherency supported in WriteBack mode */ -+#define MV_CACHE_COHER_HW_WB 2 -+/* Memory cached, No HW cache coherency, Cache coherency must be in SW */ -+#define MV_CACHE_COHER_SW 3 -+ -+#endif -+ -+/* DRAM cache coherency configuration */ -+#define MV_CACHE_COHERENCY MV_CACHE_COHER_SW -+ -+ -+#define ETHER_DRAM_COHER MV_CACHE_COHER_SW /* No HW coherency in 88Fxx81 devices */ -+ -+#if (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WB) -+ #define ETH_SDRAM_CONFIG_STR "DRAM HW cache coherency (write-back)" -+#elif (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WT) -+ #define ETH_SDRAM_CONFIG_STR "DRAM HW cache coherency (write-through)" -+#elif (ETHER_DRAM_COHER == MV_CACHE_COHER_SW) -+ #define ETH_SDRAM_CONFIG_STR "DRAM SW cache-coherency" -+#elif (ETHER_DRAM_COHER == MV_UNCACHED) -+# define ETH_SDRAM_CONFIG_STR "DRAM uncached" -+#else -+ #error "Ethernet-DRAM undefined" -+#endif /* ETHER_DRAM_COHER */ -+ -+ -+/****************************************************************/ -+/************* Ethernet driver configuration ********************/ -+/****************************************************************/ -+ -+/* port's default queueus */ -+#define ETH_DEF_TXQ 0 -+#define ETH_DEF_RXQ 0 -+ -+#define MV_ETH_RX_Q_NUM CONFIG_MV_ETH_RX_Q_NUM -+#define MV_ETH_TX_Q_NUM CONFIG_MV_ETH_TX_Q_NUM -+ -+/* interrupt coalescing setting */ -+#define ETH_TX_COAL 200 -+#define ETH_RX_COAL 200 -+ -+/* Checksum offloading */ -+#define TX_CSUM_OFFLOAD -+#define RX_CSUM_OFFLOAD -+ -+#endif /* CONFIG_MV_INCLUDE_GIG_ETH */ -+ -+/****************************************************************/ -+/*************** Telephony configuration ************************/ -+/****************************************************************/ -+#if defined(CONFIG_MV_TDM_LINEAR_MODE) -+ #define MV_TDM_LINEAR_MODE -+#elif defined(CONFIG_MV_TDM_ULAW_MODE) -+ #define MV_TDM_ULAW_MODE -+#endif -+ -+#if defined(CONFIG_MV_TDM_5CHANNELS) -+ #define MV_TDM_5CHANNELS -+#endif -+ -+#if defined(CONFIG_MV_TDM_USE_EXTERNAL_PCLK_SOURCE) -+ #define MV_TDM_USE_EXTERNAL_PCLK_SOURCE -+#endif -+ -+/* We use the following registers to store DRAM interface pre configuration */ -+/* auto-detection results */ -+/* IMPORTANT: We are using mask register for that purpose. Before writing */ -+/* to units mask register, make sure main maks register is set to disable */ -+/* all interrupts. */ -+#define DRAM_BUF_REG0 0x30810 /* sdram bank 0 size */ -+#define DRAM_BUF_REG1 0x30820 /* sdram config */ -+#define DRAM_BUF_REG2 0x30830 /* sdram mode */ -+#define DRAM_BUF_REG3 0x308c4 /* dunit control low */ -+#define DRAM_BUF_REG4 0x60a90 /* sdram address control */ -+#define DRAM_BUF_REG5 0x60a94 /* sdram timing control low */ -+#define DRAM_BUF_REG6 0x60a98 /* sdram timing control high */ -+#define DRAM_BUF_REG7 0x60a9c /* sdram ODT control low */ -+#define DRAM_BUF_REG8 0x60b90 /* sdram ODT control high */ -+#define DRAM_BUF_REG9 0x60b94 /* sdram Dunit ODT control */ -+#define DRAM_BUF_REG10 0x60b98 /* sdram Extended Mode */ -+#define DRAM_BUF_REG11 0x60b9c /* sdram Ddr2 Time Low Reg */ -+#define DRAM_BUF_REG12 0x60a00 /* sdram Ddr2 Time High Reg */ -+#define DRAM_BUF_REG13 0x60a04 /* dunit Ctrl High */ -+#define DRAM_BUF_REG14 0x60b00 /* sdram second DIMM exist */ -+ -+/* Following the pre-configuration registers default values restored after */ -+/* auto-detection is done */ -+#define DRAM_BUF_REG_DV 0 -+ -+/* System Mapping */ -+#define SDRAM_CS0_BASE 0x00000000 -+#define SDRAM_CS0_SIZE _256M -+ -+#define SDRAM_CS1_BASE 0x10000000 -+#define SDRAM_CS1_SIZE _256M -+ -+#define SDRAM_CS2_BASE 0x20000000 -+#define SDRAM_CS2_SIZE _256M -+ -+#define SDRAM_CS3_BASE 0x30000000 -+#define SDRAM_CS3_SIZE _256M -+ -+/* PEX */ -+#define PEX0_MEM_BASE 0xe8000000 -+#define PEX0_MEM_SIZE _128M -+ -+#define PEX0_IO_BASE 0xf2000000 -+#define PEX0_IO_SIZE _1M -+ -+/* Device Chip Selects */ -+#define NFLASH_CS_BASE 0xfa000000 -+#define NFLASH_CS_SIZE _2M -+ -+#define SPI_CS_BASE 0xf4000000 -+#define SPI_CS_SIZE _16M -+ -+#define CRYPT_ENG_BASE 0xf0000000 -+#define CRYPT_ENG_SIZE _2M -+ -+#define BOOTDEV_CS_BASE 0xff800000 -+#define BOOTDEV_CS_SIZE _8M -+ -+/* CS2 - BOOTROM */ -+#define DEVICE_CS2_BASE 0xff900000 -+#define DEVICE_CS2_SIZE _1M -+ -+/* PEX Work arround */ -+/* the target we will use for the workarround */ -+#define PEX_CONFIG_RW_WA_TARGET PEX0_MEM -+/*a flag that indicates if we are going to use the -+size and base of the target we using for the workarround -+window */ -+#define PEX_CONFIG_RW_WA_USE_ORIGINAL_WIN_VALUES 1 -+/* if the above flag is 0 then the following values -+will be used for the workarround window base and size, -+otherwise the following defines will be ignored */ -+#define PEX_CONFIG_RW_WA_BASE 0xF3000000 -+#define PEX_CONFIG_RW_WA_SIZE _16M -+ -+/* Internal registers: size is defined in Controllerenvironment */ -+#define INTER_REGS_BASE 0xFEE00000 -+ -+/* DRAM detection stuff */ -+#define MV_DRAM_AUTO_SIZE -+ -+/* Board clock detection */ -+#define TCLK_AUTO_DETECT /* Use Tclk auto detection */ -+#define SYSCLK_AUTO_DETECT /* Use SysClk auto detection */ -+#define PCLCK_AUTO_DETECT /* Use PClk auto detection */ -+#define L2CLK_AUTO_DETECT /* Use L2Clk auto detection */ -+ -+/* PEX-PCI\PCI-PCI Bridge*/ -+#define PCI0_IF_PTP 0 /* Bridge exist on pciIf0*/ -+ -+ -+ -+#endif /* __INCmvSysHwConfigh */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.c b/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.c -new file mode 100644 -index 0000000..6be5ea8 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.c -@@ -0,0 +1,376 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvCntmr.h" -+#include "cpu/mvCpu.h" -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+extern unsigned int whoAmI(void); -+ -+/******************************************************************************* -+* mvCntmrLoad - -+* -+* DESCRIPTION: -+* Load an init Value to a given counter/timer -+* -+* INPUT: -+* countNum - counter number -+* value - value to be loaded -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM on bad parameters , MV_ERROR on error ,MV_OK on sucess -+*******************************************************************************/ -+MV_STATUS mvCntmrLoad(MV_U32 countNum, MV_U32 value) -+{ -+ if (countNum >= MV_CNTMR_MAX_COUNTER ) -+ { -+ -+ mvOsPrintf(("mvCntmrLoad: Err. Illigal counter number \n")); -+ return MV_BAD_PARAM;; -+ -+ } -+ -+ MV_REG_WRITE(CNTMR_RELOAD_REG(countNum),value); -+ MV_REG_WRITE(CNTMR_VAL_REG(countNum),value); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCntmrRead - -+* -+* DESCRIPTION: -+* Returns the value of the given Counter/Timer -+* -+* INPUT: -+* countNum - counter number -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_U32 counter value -+*******************************************************************************/ -+MV_U32 mvCntmrRead(MV_U32 countNum) -+{ -+ return MV_REG_READ(CNTMR_VAL_REG(countNum)); -+} -+ -+/******************************************************************************* -+* mvCntmrWrite - -+* -+* DESCRIPTION: -+* Returns the value of the given Counter/Timer -+* -+* INPUT: -+* countNum - counter number -+* countVal - value to write -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None -+*******************************************************************************/ -+void mvCntmrWrite(MV_U32 countNum,MV_U32 countVal) -+{ -+ MV_REG_WRITE(CNTMR_VAL_REG(countNum),countVal); -+} -+ -+/******************************************************************************* -+* mvCntmrCtrlSet - -+* -+* DESCRIPTION: -+* Set the Control to a given counter/timer -+* -+* INPUT: -+* countNum - counter number -+* pCtrl - pointer to MV_CNTMR_CTRL structure -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM on bad parameters , MV_ERROR on error ,MV_OK on sucess -+*******************************************************************************/ -+MV_STATUS mvCntmrCtrlSet(MV_U32 countNum, MV_CNTMR_CTRL *pCtrl) -+{ -+ MV_U32 cntmrCtrl; -+ -+ if (countNum >= MV_CNTMR_MAX_COUNTER ) -+ { -+ -+ DB(mvOsPrintf(("mvCntmrCtrlSet: Err. Illigal counter number \n"))); -+ return MV_BAD_PARAM;; -+ -+ } -+ -+ /* read control register */ -+ cntmrCtrl = MV_REG_READ(CNTMR_CTRL_REG); -+ -+ -+ if (pCtrl->enable) /* enable counter\timer */ -+ { -+ cntmrCtrl |= CTCR_ARM_TIMER_EN(countNum); -+ } -+ else /* disable counter\timer */ -+ { -+ cntmrCtrl &= ~CTCR_ARM_TIMER_EN(countNum); -+ } -+ -+ if ( pCtrl->autoEnable ) /* Auto mode */ -+ { -+ cntmrCtrl |= CTCR_ARM_TIMER_AUTO_EN(countNum); -+ -+ } -+ else /* no auto mode */ -+ { -+ cntmrCtrl &= ~CTCR_ARM_TIMER_AUTO_EN(countNum); -+ } -+ -+ MV_REG_WRITE(CNTMR_CTRL_REG,cntmrCtrl); -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvCntmrCtrlGet - -+* -+* DESCRIPTION: -+* Get the Control value of a given counter/timer -+* -+* INPUT: -+* countNum - counter number -+* pCtrl - pointer to MV_CNTMR_CTRL structure -+* -+* OUTPUT: -+* Counter\Timer control value -+* -+* RETURN: -+* MV_BAD_PARAM on bad parameters , MV_ERROR on error ,MV_OK on sucess -+*******************************************************************************/ -+MV_STATUS mvCntmrCtrlGet(MV_U32 countNum, MV_CNTMR_CTRL *pCtrl) -+{ -+ MV_U32 cntmrCtrl; -+ -+ if (countNum >= MV_CNTMR_MAX_COUNTER ) -+ { -+ DB(mvOsPrintf(("mvCntmrCtrlGet: Err. Illigal counter number \n"))); -+ return MV_BAD_PARAM;; -+ } -+ -+ /* read control register */ -+ cntmrCtrl = MV_REG_READ(CNTMR_CTRL_REG); -+ -+ /* enable counter\timer */ -+ if (cntmrCtrl & CTCR_ARM_TIMER_EN(countNum)) -+ { -+ pCtrl->enable = MV_TRUE; -+ } -+ else -+ { -+ pCtrl->enable = MV_FALSE; -+ } -+ -+ /* counter mode */ -+ if (cntmrCtrl & CTCR_ARM_TIMER_AUTO_EN(countNum)) -+ { -+ pCtrl->autoEnable = MV_TRUE; -+ } -+ else -+ { -+ pCtrl->autoEnable = MV_FALSE; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCntmrEnable - -+* -+* DESCRIPTION: -+* Set the Enable-Bit to logic '1' ==> starting the counter -+* -+* INPUT: -+* countNum - counter number -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM on bad parameters , MV_ERROR on error ,MV_OK on sucess -+*******************************************************************************/ -+MV_STATUS mvCntmrEnable(MV_U32 countNum) -+{ -+ MV_U32 cntmrCtrl; -+ -+ if (countNum >= MV_CNTMR_MAX_COUNTER ) -+ { -+ -+ DB(mvOsPrintf(("mvCntmrEnable: Err. Illigal counter number \n"))); -+ return MV_BAD_PARAM;; -+ -+ } -+ -+ /* read control register */ -+ cntmrCtrl = MV_REG_READ(CNTMR_CTRL_REG); -+ -+ /* enable counter\timer */ -+ cntmrCtrl |= CTCR_ARM_TIMER_EN(countNum); -+ -+ -+ MV_REG_WRITE(CNTMR_CTRL_REG,cntmrCtrl); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCntmrDisable - -+* -+* DESCRIPTION: -+* Stop the counter/timer running, and returns its Value -+* -+* INPUT: -+* countNum - counter number -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_U32 counter\timer value -+*******************************************************************************/ -+MV_STATUS mvCntmrDisable(MV_U32 countNum) -+{ -+ MV_U32 cntmrCtrl; -+ -+ if (countNum >= MV_CNTMR_MAX_COUNTER ) -+ { -+ -+ DB(mvOsPrintf(("mvCntmrDisable: Err. Illigal counter number \n"))); -+ return MV_BAD_PARAM;; -+ -+ } -+ -+ /* read control register */ -+ cntmrCtrl = MV_REG_READ(CNTMR_CTRL_REG); -+ -+ /* disable counter\timer */ -+ cntmrCtrl &= ~CTCR_ARM_TIMER_EN(countNum); -+ -+ MV_REG_WRITE(CNTMR_CTRL_REG,cntmrCtrl); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvCntmrStart - -+* -+* DESCRIPTION: -+* Combined all the sub-operations above to one function: Load,setMode,Enable -+* -+* INPUT: -+* countNum - counter number -+* value - value of the counter\timer to be set -+* pCtrl - pointer to MV_CNTMR_CTRL structure -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM on bad parameters , MV_ERROR on error ,MV_OK on sucess -+*******************************************************************************/ -+MV_STATUS mvCntmrStart(MV_U32 countNum, MV_U32 value, -+ MV_CNTMR_CTRL *pCtrl) -+{ -+ -+ if (countNum >= MV_CNTMR_MAX_COUNTER ) -+ { -+ -+ mvOsPrintf(("mvCntmrDisable: Err. Illigal counter number \n")); -+ return MV_BAD_PARAM;; -+ -+ } -+ -+ /* load value onto counter\timer */ -+ mvCntmrLoad(countNum,value); -+ -+ /* set the counter to load in the first time */ -+ mvCntmrWrite(countNum,value); -+ -+ /* set control for timer \ cunter and enable */ -+ mvCntmrCtrlSet(countNum,pCtrl); -+ -+ return MV_OK; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.h b/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.h -new file mode 100644 -index 0000000..b4b1a9d ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmr.h -@@ -0,0 +1,121 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvTmrWtdgh -+#define __INCmvTmrWtdgh -+ -+/* includes */ -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "cntmr/mvCntmrRegs.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+ -+ -+/* This enumerator describe counters\watchdog numbers */ -+typedef enum _mvCntmrID -+{ -+ TIMER0 = 0, -+ TIMER1, -+ WATCHDOG, -+ TIMER2, -+ TIMER3, -+}MV_CNTMR_ID; -+ -+ -+/* Counter / Timer control structure */ -+typedef struct _mvCntmrCtrl -+{ -+ MV_BOOL enable; /* enable */ -+ MV_BOOL autoEnable; /* counter/Timer */ -+}MV_CNTMR_CTRL; -+ -+ -+/* Functions */ -+ -+/* Load an init Value to a given counter/timer */ -+MV_STATUS mvCntmrLoad(MV_U32 countNum, MV_U32 value); -+ -+/* Returns the value of the given Counter/Timer */ -+MV_U32 mvCntmrRead(MV_U32 countNum); -+ -+/* Write a value of the given Counter/Timer */ -+void mvCntmrWrite(MV_U32 countNum,MV_U32 countVal); -+ -+/* Set the Control to a given counter/timer */ -+MV_STATUS mvCntmrCtrlSet(MV_U32 countNum, MV_CNTMR_CTRL *pCtrl); -+ -+/* Get the value of a given counter/timer */ -+MV_STATUS mvCntmrCtrlGet(MV_U32 countNum, MV_CNTMR_CTRL *pCtrl); -+ -+/* Set the Enable-Bit to logic '1' ==> starting the counter. */ -+MV_STATUS mvCntmrEnable(MV_U32 countNum); -+ -+/* Stop the counter/timer running, and returns its Value. */ -+MV_STATUS mvCntmrDisable(MV_U32 countNum); -+ -+/* Combined all the sub-operations above to one function: Load,setMode,Enable */ -+MV_STATUS mvCntmrStart(MV_U32 countNum, MV_U32 value, -+ MV_CNTMR_CTRL *pCtrl); -+ -+#endif /* __INCmvTmrWtdgh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmrRegs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmrRegs.h -new file mode 100644 -index 0000000..1cd9041 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/cntmr/mvCntmrRegs.h -@@ -0,0 +1,121 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvTmrwtdgRegsh -+#define __INCmvTmrwtdgRegsh -+ -+/*******************************************/ -+/* ARM Timers Registers Map */ -+/*******************************************/ -+ -+#define CNTMR_RELOAD_REG(tmrNum) (CNTMR_BASE + 0x10 + (tmrNum)*8 + \ -+ (((tmrNum) <= 3)?0:8)) -+#define CNTMR_VAL_REG(tmrNum) (CNTMR_BASE + 0x14 + (tmrNum)*8 + \ -+ (((tmrNum) <= 3)?0:8)) -+#define CNTMR_CTRL_REG (CNTMR_BASE) -+ -+/*For MV78XX0*/ -+#define CNTMR_CAUSE_REG (CPU_AHB_MBUS_CAUSE_INT_REG(whoAmI())) -+#define CNTMR_MASK_REG (CPU_AHB_MBUS_MASK_INT_REG(whoAmI())) -+ -+/* ARM Timers Registers Map */ -+/*******************************************/ -+ -+ -+/* ARM Timers Control Register */ -+/* CPU_TIMERS_CTRL_REG (CTCR) */ -+ -+#define TIMER0_NUM 0 -+#define TIMER1_NUM 1 -+#define WATCHDOG_NUM 2 -+#define TIMER2_NUM 3 -+#define TIMER3_NUM 4 -+ -+#define CTCR_ARM_TIMER_EN_OFFS(cntr) (cntr * 2) -+#define CTCR_ARM_TIMER_EN_MASK(cntr) (1 << CTCR_ARM_TIMER_EN_OFFS) -+#define CTCR_ARM_TIMER_EN(cntr) (1 << CTCR_ARM_TIMER_EN_OFFS(cntr)) -+#define CTCR_ARM_TIMER_DIS(cntr) (0 << CTCR_ARM_TIMER_EN_OFFS(cntr)) -+ -+#define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) -+#define CTCR_ARM_TIMER_AUTO_MASK(cntr) BIT1 -+#define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr)) -+#define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr)) -+ -+ -+/* ARM Timer\Watchdog Reload Register */ -+/* CNTMR_RELOAD_REG (TRR) */ -+ -+#define TRG_ARM_TIMER_REL_OFFS 0 -+#define TRG_ARM_TIMER_REL_MASK 0xffffffff -+ -+/* ARM Timer\Watchdog Register */ -+/* CNTMR_VAL_REG (TVRG) */ -+ -+#define TVR_ARM_TIMER_OFFS 0 -+#define TVR_ARM_TIMER_MASK 0xffffffff -+#define TVR_ARM_TIMER_MAX 0xffffffff -+ -+ -+ -+#endif /* __INCmvTmrwtdgRegsh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.c b/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.c -new file mode 100644 -index 0000000..03d6d09 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.c -@@ -0,0 +1,207 @@ -+/* -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+ -+#include "mvOs.h" -+#include "mvCpuCntrs.h" -+ -+ -+const static MV_CPU_CNTRS_OPS mvCpuCntrsOpsTbl[MV_CPU_CNTRS_NUM][MV_CPU_CNTRS_OPS_NUM] = -+{ -+ /*0*/ -+ { -+ MV_CPU_CNTRS_CYCLES, MV_CPU_CNTRS_DCACHE_READ_HIT, MV_CPU_CNTRS_DCACHE_READ_MISS, -+ MV_CPU_CNTRS_DCACHE_WRITE_HIT, MV_CPU_CNTRS_DCACHE_WRITE_MISS, MV_CPU_CNTRS_INSTRUCTIONS, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, -+ MV_CPU_CNTRS_MMU_READ_LATENCY, MV_CPU_CNTRS_ICACHE_READ_LATENCY, MV_CPU_CNTRS_WB_WRITE_LATENCY, -+ MV_CPU_CNTRS_LDM_STM_HOLD, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, -+ MV_CPU_CNTRS_DATA_WRITE_ACCESS, MV_CPU_CNTRS_DATA_READ_ACCESS, MV_CPU_CNTRS_INVALID, -+ MV_CPU_CNTRS_BRANCH_PREDICT_COUNT, -+ }, -+ /*1*/ -+ { -+ MV_CPU_CNTRS_CYCLES, MV_CPU_CNTRS_ICACHE_READ_MISS, MV_CPU_CNTRS_DCACHE_READ_MISS, -+ MV_CPU_CNTRS_DCACHE_WRITE_MISS, MV_CPU_CNTRS_ITLB_MISS, MV_CPU_CNTRS_SINGLE_ISSUE, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_BRANCH_RETIRED, MV_CPU_CNTRS_INVALID, -+ MV_CPU_CNTRS_MMU_READ_BEAT, MV_CPU_CNTRS_ICACHE_READ_LATENCY, MV_CPU_CNTRS_WB_WRITE_BEAT, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_IS_HOLD, MV_CPU_CNTRS_DATA_READ_ACCESS, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, -+ MV_CPU_CNTRS_INVALID, -+ }, -+ /*2*/ -+ { -+ MV_CPU_CNTRS_CYCLES, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_DCACHE_ACCESS, -+ MV_CPU_CNTRS_DTLB_MISS, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_BRANCH_PREDICT_MISS, MV_CPU_CNTRS_WB_WRITE_BEAT, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_DCACHE_READ_LATENCY, MV_CPU_CNTRS_DCACHE_WRITE_LATENCY, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_BIU_SIMULT_ACCESS, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, -+ MV_CPU_CNTRS_INVALID, -+ }, -+ /*3*/ -+ { -+ MV_CPU_CNTRS_CYCLES, MV_CPU_CNTRS_DCACHE_READ_MISS, MV_CPU_CNTRS_DCACHE_WRITE_MISS, -+ MV_CPU_CNTRS_TLB_MISS, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_BRANCH_TAKEN, MV_CPU_CNTRS_WB_FULL_CYCLES, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_DCACHE_READ_BEAT, MV_CPU_CNTRS_DCACHE_WRITE_BEAT, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_BIU_ANY_ACCESS, -+ MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_INVALID, MV_CPU_CNTRS_DATA_WRITE_ACCESS, -+ MV_CPU_CNTRS_INVALID, -+ } -+}; -+ -+MV_CPU_CNTRS_ENTRY mvCpuCntrsTbl[MV_CPU_CNTRS_NUM]; -+ -+MV_CPU_CNTRS_EVENT* mvCpuCntrsEventTbl[128]; -+ -+void mvCpuCntrsReset(void) -+{ -+ MV_U32 reg = 0; -+ -+ MV_ASM ("mcr p15, 0, %0, c15, c13, 0" : : "r" (reg)); -+ MV_ASM ("mcr p15, 0, %0, c15, c13, 1" : : "r" (reg)); -+ MV_ASM ("mcr p15, 0, %0, c15, c13, 2" : : "r" (reg)); -+ MV_ASM ("mcr p15, 0, %0, c15, c13, 3" : : "r" (reg)); -+ MV_ASM ("mcr p15, 0, %0, c15, c13, 4" : : "r" (reg)); -+ MV_ASM ("mcr p15, 0, %0, c15, c13, 5" : : "r" (reg)); -+ MV_ASM ("mcr p15, 0, %0, c15, c13, 6" : : "r" (reg)); -+ MV_ASM ("mcr p15, 0, %0, c15, c13, 7" : : "r" (reg)); -+} -+ -+void program_counter(int counter, int op) -+{ -+ MV_U32 reg = (1 << op) | 0x1; /*enable*/ -+ -+ switch(counter) -+ { -+ case 0: -+ __asm__ __volatile__ ("mcr p15, 0, %0, c15, c12, 0" : : "r" (reg)); -+ return; -+ -+ case 1: -+ __asm__ __volatile__ ("mcr p15, 0, %0, c15, c12, 1" : : "r" (reg)); -+ return; -+ -+ case 2: -+ __asm__ __volatile__ ("mcr p15, 0, %0, c15, c12, 2" : : "r" (reg)); -+ return; -+ -+ case 3: -+ __asm__ __volatile__ ("mcr p15, 0, %0, c15, c12, 3" : : "r" (reg)); -+ return; -+ -+ default: -+ mvOsPrintf("error in program_counter: bad counter number (%d)\n", counter); -+ } -+ return; -+} -+ -+void mvCpuCntrsEventClear(MV_CPU_CNTRS_EVENT* pEvent) -+{ -+ int i; -+ -+ for(i=0; i<MV_CPU_CNTRS_NUM; i++) -+ { -+ pEvent->counters_sum[i] = 0; -+ } -+ pEvent->num_of_measurements = 0; -+} -+ -+ -+MV_CPU_CNTRS_EVENT* mvCpuCntrsEventCreate(char* name, MV_U32 print_threshold) -+{ -+ int i; -+ MV_CPU_CNTRS_EVENT* event = mvOsMalloc(sizeof(MV_CPU_CNTRS_EVENT)); -+ -+ if(event) -+ { -+ strncpy(event->name, name, sizeof(event->name)); -+ event->num_of_measurements = 0; -+ event->avg_sample_count = print_threshold; -+ for(i=0; i<MV_CPU_CNTRS_NUM; i++) -+ { -+ event->counters_before[i] = 0; -+ event->counters_after[i] = 0; -+ event->counters_sum[i] = 0; -+ } -+ } -+ return event; -+} -+ -+void mvCpuCntrsEventDelete(MV_CPU_CNTRS_EVENT* event) -+{ -+ if(event != NULL) -+ mvOsFree(event); -+} -+ -+ -+MV_STATUS mvCpuCntrsProgram(int counter, MV_CPU_CNTRS_OPS op, -+ char* name, MV_U32 overhead) -+{ -+ int i; -+ -+ /* Find required operations */ -+ for(i=0; i<MV_CPU_CNTRS_OPS_NUM; i++) -+ { -+ if( mvCpuCntrsOpsTbl[counter][i] == op) -+ { -+ strncpy(mvCpuCntrsTbl[counter].name, name, sizeof(mvCpuCntrsTbl[counter].name)); -+ mvCpuCntrsTbl[counter].operation = op; -+ mvCpuCntrsTbl[counter].opIdx = i+1; -+ mvCpuCntrsTbl[counter].overhead = overhead; -+ program_counter(counter, mvCpuCntrsTbl[counter].opIdx); -+ mvOsPrintf("Counter=%d, opIdx=%d, overhead=%d\n", -+ counter, mvCpuCntrsTbl[counter].opIdx, mvCpuCntrsTbl[counter].overhead); -+ return MV_OK; -+ } -+ } -+ return MV_NOT_FOUND; -+} -+ -+void mvCpuCntrsShow(MV_CPU_CNTRS_EVENT* pEvent) -+{ -+ int i; -+ MV_U64 counters_avg; -+ -+ if(pEvent->num_of_measurements < pEvent->avg_sample_count) -+ return; -+ -+ mvOsPrintf("%16s: ", pEvent->name); -+ for(i=0; i<MV_CPU_CNTRS_NUM; i++) -+ { -+ counters_avg = mvOsDivMod64(pEvent->counters_sum[i], -+ pEvent->num_of_measurements, NULL); -+ if(counters_avg >= mvCpuCntrsTbl[i].overhead) -+ counters_avg -= mvCpuCntrsTbl[i].overhead; -+ else -+ counters_avg = 0; -+ -+ mvOsPrintf("%s=%5llu, ", mvCpuCntrsTbl[i].name, counters_avg); -+ } -+ mvOsPrintf("\n"); -+ mvCpuCntrsEventClear(pEvent); -+ mvCpuCntrsReset(); -+} -+ -+void mvCpuCntrsStatus(void) -+{ -+ int i; -+ -+ for(i=0; i<MV_CPU_CNTRS_NUM; i++) -+ { -+ mvOsPrintf("#%d: %s, overhead=%d\n", -+ i, mvCpuCntrsTbl[i].name, mvCpuCntrsTbl[i].overhead); -+ } -+} -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.h -new file mode 100644 -index 0000000..0b4998c ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuCntrs.h -@@ -0,0 +1,213 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+*******************************************************************************/ -+#ifndef __mvCpuCntrs_h__ -+#define __mvCpuCntrs_h__ -+ -+#include "mvTypes.h" -+#include "mvOs.h" -+ -+ -+#define MV_CPU_CNTRS_NUM 4 -+#define MV_CPU_CNTRS_OPS_NUM 32 -+ -+typedef enum -+{ -+ MV_CPU_CNTRS_INVALID = 0, -+ MV_CPU_CNTRS_CYCLES, -+ MV_CPU_CNTRS_ICACHE_READ_MISS, -+ MV_CPU_CNTRS_DCACHE_ACCESS, -+ MV_CPU_CNTRS_DCACHE_READ_MISS, -+ MV_CPU_CNTRS_DCACHE_READ_HIT, -+ MV_CPU_CNTRS_DCACHE_WRITE_MISS, -+ MV_CPU_CNTRS_DCACHE_WRITE_HIT, -+ MV_CPU_CNTRS_DTLB_MISS, -+ MV_CPU_CNTRS_TLB_MISS, -+ MV_CPU_CNTRS_ITLB_MISS, -+ MV_CPU_CNTRS_INSTRUCTIONS, -+ MV_CPU_CNTRS_SINGLE_ISSUE, -+ MV_CPU_CNTRS_MMU_READ_LATENCY, -+ MV_CPU_CNTRS_MMU_READ_BEAT, -+ MV_CPU_CNTRS_BRANCH_RETIRED, -+ MV_CPU_CNTRS_BRANCH_TAKEN, -+ MV_CPU_CNTRS_BRANCH_PREDICT_MISS, -+ MV_CPU_CNTRS_BRANCH_PREDICT_COUNT, -+ MV_CPU_CNTRS_WB_FULL_CYCLES, -+ MV_CPU_CNTRS_WB_WRITE_LATENCY, -+ MV_CPU_CNTRS_WB_WRITE_BEAT, -+ MV_CPU_CNTRS_ICACHE_READ_LATENCY, -+ MV_CPU_CNTRS_ICACHE_READ_BEAT, -+ MV_CPU_CNTRS_DCACHE_READ_LATENCY, -+ MV_CPU_CNTRS_DCACHE_READ_BEAT, -+ MV_CPU_CNTRS_DCACHE_WRITE_LATENCY, -+ MV_CPU_CNTRS_DCACHE_WRITE_BEAT, -+ MV_CPU_CNTRS_LDM_STM_HOLD, -+ MV_CPU_CNTRS_IS_HOLD, -+ MV_CPU_CNTRS_DATA_WRITE_ACCESS, -+ MV_CPU_CNTRS_DATA_READ_ACCESS, -+ MV_CPU_CNTRS_BIU_SIMULT_ACCESS, -+ MV_CPU_CNTRS_BIU_ANY_ACCESS, -+ -+} MV_CPU_CNTRS_OPS; -+ -+typedef struct -+{ -+ char name[16]; -+ MV_CPU_CNTRS_OPS operation; -+ int opIdx; -+ MV_U32 overhead; -+ -+} MV_CPU_CNTRS_ENTRY; -+ -+ -+typedef struct -+{ -+ char name[16]; -+ MV_U32 num_of_measurements; -+ MV_U32 avg_sample_count; -+ MV_U64 counters_before[MV_CPU_CNTRS_NUM]; -+ MV_U64 counters_after[MV_CPU_CNTRS_NUM]; -+ MV_U64 counters_sum[MV_CPU_CNTRS_NUM]; -+ -+} MV_CPU_CNTRS_EVENT; -+ -+extern MV_CPU_CNTRS_ENTRY mvCpuCntrsTbl[MV_CPU_CNTRS_NUM]; -+ -+ -+MV_STATUS mvCpuCntrsProgram(int counter, MV_CPU_CNTRS_OPS op, -+ char* name, MV_U32 overhead); -+void mvCpuCntrsInit(void); -+MV_CPU_CNTRS_EVENT* mvCpuCntrsEventCreate(char* name, MV_U32 print_threshold); -+void mvCpuCntrsEventDelete(MV_CPU_CNTRS_EVENT* event); -+void mvCpuCntrsReset(void); -+void mvCpuCntrsShow(MV_CPU_CNTRS_EVENT* pEvent); -+void mvCpuCntrsEventClear(MV_CPU_CNTRS_EVENT* pEvent); -+ -+/* internal */ -+void program_counter(int counter, int op); -+ -+static INLINE MV_U64 mvCpuCntrsRead(const int counter) -+{ -+ MV_U32 low = 0, high = 0; -+ MV_U32 ll = 0; -+ -+ switch(counter) -+ { -+ case 0: -+ MV_ASM ("mcr p15, 0, %0, c15, c12, 0" : : "r" (ll)); -+ MV_ASM ("mrc p15, 0, %0, c15, c13, 0" : "=r" (low)); -+ MV_ASM ("mrc p15, 0, %0, c15, c13, 1" : "=r" (high)); -+ break; -+ -+ case 1: -+ MV_ASM ("mcr p15, 0, %0, c15, c12, 1" : : "r" (ll)); -+ MV_ASM ("mrc p15, 0, %0, c15, c13, 2" : "=r" (low)); -+ MV_ASM ("mrc p15, 0, %0, c15, c13, 3" : "=r" (high)); -+ break; -+ -+ case 2: -+ MV_ASM ("mcr p15, 0, %0, c15, c12, 2" : : "r" (ll)); -+ MV_ASM ("mrc p15, 0, %0, c15, c13, 4" : "=r" (low)); -+ MV_ASM ("mrc p15, 0, %0, c15, c13, 5" : "=r" (high)); -+ break; -+ -+ case 3: -+ MV_ASM ("mcr p15, 0, %0, c15, c12, 3" : : "r" (ll)); -+ MV_ASM ("mrc p15, 0, %0, c15, c13, 6" : "=r" (low)); -+ MV_ASM ("mrc p15, 0, %0, c15, c13, 7" : "=r" (high)); -+ break; -+ -+ default: -+ mvOsPrintf("mv_cpu_cntrs_read: bad counter number (%d)\n", counter); -+ } -+ program_counter(counter, mvCpuCntrsTbl[counter].opIdx); -+ return (((MV_U64)high << 32 ) | low); -+ -+} -+ -+ -+static INLINE void mvCpuCntrsReadBefore(MV_CPU_CNTRS_EVENT* pEvent) -+{ -+#if 0 -+ int i; -+ -+ /* order is important - we want to measure the cycle count last here! */ -+ for(i=0; i<MV_CPU_CNTRS_NUM; i++) -+ pEvent->counters_before[i] = mvCpuCntrsRead(i); -+#else -+ pEvent->counters_before[1] = mvCpuCntrsRead(1); -+ pEvent->counters_before[3] = mvCpuCntrsRead(3); -+ pEvent->counters_before[0] = mvCpuCntrsRead(0); -+ pEvent->counters_before[2] = mvCpuCntrsRead(2); -+#endif -+} -+ -+static INLINE void mvCpuCntrsReadAfter(MV_CPU_CNTRS_EVENT* pEvent) -+{ -+ int i; -+ -+#if 0 -+ /* order is important - we want to measure the cycle count first here! */ -+ for(i=0; i<MV_CPU_CNTRS_NUM; i++) -+ pEvent->counters_after[i] = mvCpuCntrsRead(i); -+#else -+ pEvent->counters_after[2] = mvCpuCntrsRead(2); -+ pEvent->counters_after[0] = mvCpuCntrsRead(0); -+ pEvent->counters_after[3] = mvCpuCntrsRead(3); -+ pEvent->counters_after[1] = mvCpuCntrsRead(1); -+#endif -+ -+ for(i=0; i<MV_CPU_CNTRS_NUM; i++) -+ { -+ pEvent->counters_sum[i] += (pEvent->counters_after[i] - pEvent->counters_before[i]); -+ } -+ pEvent->num_of_measurements++; -+} -+ -+ -+#ifdef CONFIG_MV_CPU_PERF_CNTRS -+ -+#define MV_CPU_CNTRS_READ(counter) mvCpuCntrsRead(counter) -+ -+#define MV_CPU_CNTRS_START(event) mvCpuCntrsReadBefore(event) -+ -+#define MV_CPU_CNTRS_STOP(event) mvCpuCntrsReadAfter(event) -+ -+#define MV_CPU_CNTRS_SHOW(event) mvCpuCntrsShow(event) -+ -+#else -+ -+#define MV_CPU_CNTRS_READ(counter) -+#define MV_CPU_CNTRS_START(event) -+#define MV_CPU_CNTRS_STOP(event) -+#define MV_CPU_CNTRS_SHOW(event) -+ -+#endif /* CONFIG_MV_CPU_PERF_CNTRS */ -+ -+ -+#endif /* __mvCpuCntrs_h__ */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.c b/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.c -new file mode 100644 -index 0000000..2401002 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.c -@@ -0,0 +1,143 @@ -+/* -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+ -+#include "mvOs.h" -+#include "mvCpuL2Cntrs.h" -+ -+ -+ -+MV_CPU_L2_CNTRS_ENTRY mvCpuL2CntrsTbl[MV_CPU_L2_CNTRS_NUM]; -+ -+MV_CPU_L2_CNTRS_EVENT* mvCpuL2CntrsEventTbl[128]; -+ -+void mvCpuL2CntrsReset(void) -+{ -+ MV_U32 reg = 0; -+ -+ MV_ASM ("mcr p15, 6, %0, c15, c13, 0" : : "r" (reg)); -+ MV_ASM ("mcr p15, 6, %0, c15, c13, 1" : : "r" (reg)); -+ MV_ASM ("mcr p15, 6, %0, c15, c13, 2" : : "r" (reg)); -+ MV_ASM ("mcr p15, 6, %0, c15, c13, 3" : : "r" (reg)); -+} -+ -+static void mvCpuL2CntrConfig(int counter, int op) -+{ -+ MV_U32 reg = (1 << op) | 0x1; /*enable*/ -+ -+ switch(counter) -+ { -+ case 0: -+ MV_ASM ("mcr p15, 6, %0, c15, c12, 0" : : "r" (reg)); -+ return; -+ -+ case 1: -+ MV_ASM ("mcr p15, 6, %0, c15, c12, 1" : : "r" (reg)); -+ return; -+ -+ default: -+ mvOsPrintf("mvCpuL2CntrConfig: bad counter number (%d)\n", counter); -+ } -+ return; -+} -+ -+void mvCpuL2CntrsEventClear(MV_CPU_L2_CNTRS_EVENT* pEvent) -+{ -+ int i; -+ -+ for(i=0; i<MV_CPU_L2_CNTRS_NUM; i++) -+ { -+ pEvent->counters_sum[i] = 0; -+ } -+ pEvent->num_of_measurements = 0; -+} -+ -+ -+MV_CPU_L2_CNTRS_EVENT* mvCpuL2CntrsEventCreate(char* name, MV_U32 print_threshold) -+{ -+ int i; -+ MV_CPU_L2_CNTRS_EVENT* event = mvOsMalloc(sizeof(MV_CPU_L2_CNTRS_EVENT)); -+ -+ if(event) -+ { -+ strncpy(event->name, name, sizeof(event->name)); -+ event->num_of_measurements = 0; -+ event->avg_sample_count = print_threshold; -+ for(i=0; i<MV_CPU_L2_CNTRS_NUM; i++) -+ { -+ event->counters_before[i] = 0; -+ event->counters_after[i] = 0; -+ event->counters_sum[i] = 0; -+ } -+ } -+ return event; -+} -+ -+void mvCpuL2CntrsEventDelete(MV_CPU_L2_CNTRS_EVENT* event) -+{ -+ if(event != NULL) -+ mvOsFree(event); -+} -+ -+ -+MV_STATUS mvCpuL2CntrsProgram(int counter, MV_CPU_L2_CNTRS_OPS op, -+ char* name, MV_U32 overhead) -+{ -+ strncpy(mvCpuL2CntrsTbl[counter].name, name, sizeof(mvCpuL2CntrsTbl[counter].name)); -+ mvCpuL2CntrsTbl[counter].operation = op; -+ mvCpuL2CntrsTbl[counter].opIdx = op; -+ mvCpuL2CntrsTbl[counter].overhead = overhead; -+ mvCpuL2CntrConfig(counter, op); -+ mvOsPrintf("CPU L2 Counter %d: operation=%d, overhead=%d\n", -+ counter, op, overhead); -+ return MV_OK; -+} -+ -+void mvCpuL2CntrsShow(MV_CPU_L2_CNTRS_EVENT* pEvent) -+{ -+ int i; -+ MV_U64 counters_avg; -+ -+ if(pEvent->num_of_measurements < pEvent->avg_sample_count) -+ return; -+ -+ mvOsPrintf("%16s: ", pEvent->name); -+ for(i=0; i<MV_CPU_L2_CNTRS_NUM; i++) -+ { -+ counters_avg = mvOsDivMod64(pEvent->counters_sum[i], -+ pEvent->num_of_measurements, NULL); -+ -+ if(counters_avg >= mvCpuL2CntrsTbl[i].overhead) -+ counters_avg -= mvCpuL2CntrsTbl[i].overhead; -+ else -+ counters_avg = 0; -+ -+ mvOsPrintf("%s=%5llu, ", mvCpuL2CntrsTbl[i].name, counters_avg); -+ } -+ mvOsPrintf("\n"); -+ mvCpuL2CntrsEventClear(pEvent); -+ mvCpuL2CntrsReset(); -+} -+ -+void mvCpuL2CntrsStatus(void) -+{ -+ int i; -+ -+ for(i=0; i<MV_CPU_L2_CNTRS_NUM; i++) -+ { -+ mvOsPrintf("#%d: %s, overhead=%d\n", -+ i, mvCpuL2CntrsTbl[i].name, mvCpuL2CntrsTbl[i].overhead); -+ } -+} -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.h -new file mode 100644 -index 0000000..ad6a36f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/cpu/mvCpuL2Cntrs.h -@@ -0,0 +1,151 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+*******************************************************************************/ -+#ifndef __mvCpuL2Cntrs_h__ -+#define __mvCpuL2Cntrs_h__ -+ -+#include "mvTypes.h" -+#include "mvOs.h" -+ -+ -+#define MV_CPU_L2_CNTRS_NUM 2 -+ -+typedef enum -+{ -+ MV_CPU_L2_CNTRS_ENABLE = 0, -+ MV_CPU_L2_CNTRS_DATA_REQ, -+ MV_CPU_L2_CNTRS_DATA_MISS_REQ, -+ MV_CPU_L2_CNTRS_INST_REQ, -+ MV_CPU_L2_CNTRS_INST_MISS_REQ, -+ MV_CPU_L2_CNTRS_DATA_READ_REQ, -+ MV_CPU_L2_CNTRS_DATA_READ_MISS_REQ, -+ MV_CPU_L2_CNTRS_DATA_WRITE_REQ, -+ MV_CPU_L2_CNTRS_DATA_WRITE_MISS_REQ, -+ MV_CPU_L2_CNTRS_RESERVED, -+ MV_CPU_L2_CNTRS_DIRTY_EVICT_REQ, -+ MV_CPU_L2_CNTRS_EVICT_BUFF_STALL, -+ MV_CPU_L2_CNTRS_ACTIVE_CYCLES, -+ -+} MV_CPU_L2_CNTRS_OPS; -+ -+typedef struct -+{ -+ char name[16]; -+ MV_CPU_L2_CNTRS_OPS operation; -+ int opIdx; -+ MV_U32 overhead; -+ -+} MV_CPU_L2_CNTRS_ENTRY; -+ -+ -+typedef struct -+{ -+ char name[16]; -+ MV_U32 num_of_measurements; -+ MV_U32 avg_sample_count; -+ MV_U64 counters_before[MV_CPU_L2_CNTRS_NUM]; -+ MV_U64 counters_after[MV_CPU_L2_CNTRS_NUM]; -+ MV_U64 counters_sum[MV_CPU_L2_CNTRS_NUM]; -+ -+} MV_CPU_L2_CNTRS_EVENT; -+ -+ -+MV_STATUS mvCpuL2CntrsProgram(int counter, MV_CPU_L2_CNTRS_OPS op, -+ char* name, MV_U32 overhead); -+void mvCpuL2CntrsInit(void); -+MV_CPU_L2_CNTRS_EVENT* mvCpuL2CntrsEventCreate(char* name, MV_U32 print_threshold); -+void mvCpuL2CntrsEventDelete(MV_CPU_L2_CNTRS_EVENT* event); -+void mvCpuL2CntrsReset(void); -+void mvCpuL2CntrsShow(MV_CPU_L2_CNTRS_EVENT* pEvent); -+void mvCpuL2CntrsEventClear(MV_CPU_L2_CNTRS_EVENT* pEvent); -+ -+static INLINE MV_U64 mvCpuL2CntrsRead(const int counter) -+{ -+ MV_U32 low = 0, high = 0; -+ -+ switch(counter) -+ { -+ case 0: -+ MV_ASM ("mrc p15, 6, %0, c15, c13, 0" : "=r" (low)); -+ MV_ASM ("mrc p15, 6, %0, c15, c13, 1" : "=r" (high)); -+ break; -+ -+ case 1: -+ MV_ASM ("mrc p15, 6, %0, c15, c13, 2" : "=r" (low)); -+ MV_ASM ("mrc p15, 6, %0, c15, c13, 3" : "=r" (high)); -+ break; -+ -+ default: -+ mvOsPrintf("mvCpuL2CntrsRead: bad counter number (%d)\n", counter); -+ } -+ return (((MV_U64)high << 32 ) | low); -+ -+} -+ -+static INLINE void mvCpuL2CntrsReadBefore(MV_CPU_L2_CNTRS_EVENT* pEvent) -+{ -+ int i; -+ -+ for(i=0; i<MV_CPU_L2_CNTRS_NUM; i++) -+ pEvent->counters_before[i] = mvCpuL2CntrsRead(i); -+} -+ -+static INLINE void mvCpuL2CntrsReadAfter(MV_CPU_L2_CNTRS_EVENT* pEvent) -+{ -+ int i; -+ -+ for(i=0; i<MV_CPU_L2_CNTRS_NUM; i++) -+ { -+ pEvent->counters_after[i] = mvCpuL2CntrsRead(i); -+ pEvent->counters_sum[i] += (pEvent->counters_after[i] - pEvent->counters_before[i]); -+ } -+ pEvent->num_of_measurements++; -+} -+ -+ -+#ifdef CONFIG_MV_CPU_L2_PERF_CNTRS -+ -+#define MV_CPU_L2_CNTRS_READ(counter) mvCpuL2CntrsRead(counter) -+ -+#define MV_CPU_L2_CNTRS_START(event) mvCpuL2CntrsReadBefore(event) -+ -+#define MV_CPU_L2_CNTRS_STOP(event) mvCpuL2CntrsReadAfter(event) -+ -+#define MV_CPU_L2_CNTRS_SHOW(event) mvCpuL2CntrsShow(event) -+ -+#else -+ -+#define MV_CPU_L2_CNTRS_READ(counter) -+#define MV_CPU_L2_CNTRS_START(event) -+#define MV_CPU_L2_CNTRS_STOP(event) -+#define MV_CPU_L2_CNTRS_SHOW(event) -+ -+#endif /* CONFIG_MV_CPU_L2_PERF_CNTRS */ -+ -+ -+#endif /* __mvCpuL2Cntrs_h__ */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.c b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.c -new file mode 100644 -index 0000000..5c6db90 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.c -@@ -0,0 +1,1479 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "ddr1_2/mvDram.h" -+#include "boardEnv/mvBoardEnvLib.h" -+ -+#undef MV_DEBUG -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, -+ MV_DRAM_BANK_INFO *pBankInfo); -+static MV_U32 cas2ps(MV_U8 spd_byte); -+/******************************************************************************* -+* mvDramBankGet - Get the DRAM bank paramters. -+* -+* DESCRIPTION: -+* This function retrieves DRAM bank parameters as described in -+* DRAM_BANK_INFO struct to the controller DRAM unit. In case the board -+* has its DRAM on DIMMs it will use its EEPROM to extract SPD data -+* from it. Otherwise, if the DRAM is soldered on board, the function -+* should insert its bank information into MV_DRAM_BANK_INFO struct. -+* -+* INPUT: -+* bankNum - Board DRAM bank number. -+* -+* OUTPUT: -+* pBankInfo - DRAM bank information struct. -+* -+* RETURN: -+* MV_FAIL - Bank parameters could not be read. -+* -+*******************************************************************************/ -+MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo) -+{ -+ MV_DIMM_INFO dimmInfo; -+ -+ DB(mvOsPrintf("Dram: mvDramBankInfoGet bank %d\n", bankNum)); -+ /* zero pBankInfo structure */ -+ memset(pBankInfo, 0, sizeof(*pBankInfo)); -+ -+ if((NULL == pBankInfo) || (bankNum >= MV_DRAM_MAX_CS )) -+ { -+ DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); -+ return MV_BAD_PARAM; -+ } -+ if( MV_OK != dimmSpdGet((MV_U32)(bankNum/2), &dimmInfo)) -+ { -+ DB(mvOsPrintf("Dram: ERR dimmSpdGet failed to get dimm info \n")); -+ return MV_FAIL; -+ } -+ if((dimmInfo.numOfModuleBanks == 1) && ((bankNum % 2) == 1)) -+ { -+ DB(mvOsPrintf("Dram: ERR dimmSpdGet. Can't find DIMM bank 2 \n")); -+ return MV_FAIL; -+ } -+ -+ /* convert Dimm info to Bank info */ -+ cpyDimm2BankInfo(&dimmInfo, pBankInfo); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* cpyDimm2BankInfo - Convert a Dimm info struct into a bank info struct. -+* -+* DESCRIPTION: -+* Convert a Dimm info struct into a bank info struct. -+* -+* INPUT: -+* pDimmInfo - DIMM information structure. -+* -+* OUTPUT: -+* pBankInfo - DRAM bank information struct. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, -+ MV_DRAM_BANK_INFO *pBankInfo) -+{ -+ pBankInfo->memoryType = pDimmInfo->memoryType; -+ -+ /* DIMM dimensions */ -+ pBankInfo->numOfRowAddr = pDimmInfo->numOfRowAddr; -+ pBankInfo->numOfColAddr = pDimmInfo->numOfColAddr; -+ pBankInfo->dataWidth = pDimmInfo->dataWidth; -+ pBankInfo->errorCheckType = pDimmInfo->errorCheckType; -+ pBankInfo->sdramWidth = pDimmInfo->sdramWidth; -+ pBankInfo->errorCheckDataWidth = pDimmInfo->errorCheckDataWidth; -+ pBankInfo->numOfBanksOnEachDevice = pDimmInfo->numOfBanksOnEachDevice; -+ pBankInfo->suportedCasLatencies = pDimmInfo->suportedCasLatencies; -+ pBankInfo->refreshInterval = pDimmInfo->refreshInterval; -+ -+ /* DIMM timing parameters */ -+ pBankInfo->minCycleTimeAtMaxCasLatPs = pDimmInfo->minCycleTimeAtMaxCasLatPs; -+ pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps = -+ pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps; -+ pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps = -+ pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps; -+ -+ pBankInfo->minRowPrechargeTime = pDimmInfo->minRowPrechargeTime; -+ pBankInfo->minRowActiveToRowActive = pDimmInfo->minRowActiveToRowActive; -+ pBankInfo->minRasToCasDelay = pDimmInfo->minRasToCasDelay; -+ pBankInfo->minRasPulseWidth = pDimmInfo->minRasPulseWidth; -+ pBankInfo->minWriteRecoveryTime = pDimmInfo->minWriteRecoveryTime; -+ pBankInfo->minWriteToReadCmdDelay = pDimmInfo->minWriteToReadCmdDelay; -+ pBankInfo->minReadToPrechCmdDelay = pDimmInfo->minReadToPrechCmdDelay; -+ pBankInfo->minRefreshToActiveCmd = pDimmInfo->minRefreshToActiveCmd; -+ -+ /* Parameters calculated from the extracted DIMM information */ -+ pBankInfo->size = pDimmInfo->size/pDimmInfo->numOfModuleBanks; -+ pBankInfo->deviceDensity = pDimmInfo->deviceDensity; -+ pBankInfo->numberOfDevices = pDimmInfo->numberOfDevices / -+ pDimmInfo->numOfModuleBanks; -+ -+ /* DIMM attributes (MV_TRUE for yes) */ -+ -+ if ((pDimmInfo->memoryType == MEM_TYPE_SDRAM) || -+ (pDimmInfo->memoryType == MEM_TYPE_DDR1) ) -+ { -+ if (pDimmInfo->dimmAttributes & BIT1) -+ pBankInfo->registeredAddrAndControlInputs = MV_TRUE; -+ else -+ pBankInfo->registeredAddrAndControlInputs = MV_FALSE; -+ } -+ else /* pDimmInfo->memoryType == MEM_TYPE_DDR2 */ -+ { -+ if (pDimmInfo->dimmTypeInfo & (BIT0 | BIT4)) -+ pBankInfo->registeredAddrAndControlInputs = MV_TRUE; -+ else -+ pBankInfo->registeredAddrAndControlInputs = MV_FALSE; -+ } -+ -+ return; -+} -+ -+/******************************************************************************* -+* dimmSpdCpy - Cpy SPD parameters from dimm 0 to dimm 1. -+* -+* DESCRIPTION: -+* Read the DIMM SPD parameters from dimm 0 into dimm 1 SPD. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+MV_STATUS dimmSpdCpy(MV_VOID) -+{ -+ MV_U32 i; -+ MV_U32 spdChecksum; -+ -+ MV_TWSI_SLAVE twsiSlave; -+ MV_U8 data[SPD_SIZE]; -+ -+ /* zero dimmInfo structure */ -+ memset(data, 0, SPD_SIZE); -+ -+ /* read the dimm eeprom */ -+ DB(mvOsPrintf("DRAM: Read Dimm eeprom\n")); -+ twsiSlave.slaveAddr.address = MV_BOARD_DIMM0_I2C_ADDR; -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ twsiSlave.offset = 0; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ if( MV_OK != mvTwsiRead (MV_BOARD_DIMM_I2C_CHANNEL, -+ &twsiSlave, data, SPD_SIZE) ) -+ { -+ DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum 0\n")); -+ return MV_FAIL; -+ } -+ DB(puts("DRAM: Reading dimm info succeded.\n")); -+ -+ /* calculate SPD checksum */ -+ spdChecksum = 0; -+ -+ for(i = 0 ; i <= 62 ; i++) -+ { -+ spdChecksum += data[i]; -+ } -+ -+ if ((spdChecksum & 0xff) != data[63]) -+ { -+ DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n", -+ (MV_U32)(spdChecksum & 0xff), data[63])); -+ } -+ else -+ { -+ DB(mvOsPrintf("DRAM: SPD Checksum ok!\n")); -+ } -+ -+ /* copy the SPD content 1:1 into the DIMM 1 SPD */ -+ twsiSlave.slaveAddr.address = MV_BOARD_DIMM1_I2C_ADDR; -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ twsiSlave.offset = 0; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ for(i = 0 ; i < SPD_SIZE ; i++) -+ { -+ twsiSlave.offset = i; -+ if( MV_OK != mvTwsiWrite (MV_BOARD_DIMM_I2C_CHANNEL, -+ &twsiSlave, &data[i], 1) ) -+ { -+ mvOsPrintf("DRAM: ERR. no DIMM in dimmNum 1 byte %d \n",i); -+ return MV_FAIL; -+ } -+ mvOsDelay(5); -+ } -+ -+ DB(puts("DRAM: Reading dimm info succeded.\n")); -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* dimmSpdGet - Get the SPD parameters. -+* -+* DESCRIPTION: -+* Read the DIMM SPD parameters into given struct parameter. -+* -+* INPUT: -+* dimmNum - DIMM number. See MV_BOARD_DIMM_NUM enumerator. -+* -+* OUTPUT: -+* pDimmInfo - DIMM information structure. -+* -+* RETURN: -+* MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo) -+{ -+ MV_U32 i; -+ MV_U32 density = 1; -+ MV_U32 spdChecksum; -+ -+ MV_TWSI_SLAVE twsiSlave; -+ MV_U8 data[SPD_SIZE]; -+ -+ if((NULL == pDimmInfo)|| (dimmNum >= MAX_DIMM_NUM)) -+ { -+ DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); -+ return MV_BAD_PARAM; -+ } -+ -+ /* zero dimmInfo structure */ -+ memset(data, 0, SPD_SIZE); -+ -+ /* read the dimm eeprom */ -+ DB(mvOsPrintf("DRAM: Read Dimm eeprom\n")); -+ twsiSlave.slaveAddr.address = (dimmNum == 0) ? -+ MV_BOARD_DIMM0_I2C_ADDR : MV_BOARD_DIMM1_I2C_ADDR; -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ twsiSlave.offset = 0; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ if( MV_OK != mvTwsiRead (MV_BOARD_DIMM_I2C_CHANNEL, -+ &twsiSlave, data, SPD_SIZE) ) -+ { -+ DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum %d \n", dimmNum)); -+ return MV_FAIL; -+ } -+ DB(puts("DRAM: Reading dimm info succeded.\n")); -+ -+ /* calculate SPD checksum */ -+ spdChecksum = 0; -+ -+ for(i = 0 ; i <= 62 ; i++) -+ { -+ spdChecksum += data[i]; -+ } -+ -+ if ((spdChecksum & 0xff) != data[63]) -+ { -+ DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n", -+ (MV_U32)(spdChecksum & 0xff), data[63])); -+ } -+ else -+ { -+ DB(mvOsPrintf("DRAM: SPD Checksum ok!\n")); -+ } -+ -+ /* copy the SPD content 1:1 into the dimmInfo structure*/ -+ for(i = 0 ; i < SPD_SIZE ; i++) -+ { -+ pDimmInfo->spdRawData[i] = data[i]; -+ DB(mvOsPrintf("SPD-EEPROM Byte %3d = %3x (%3d)\n",i, data[i], data[i])); -+ } -+ -+ DB(mvOsPrintf("DRAM SPD Information:\n")); -+ -+ /* Memory type (DDR / SDRAM) */ -+ switch (data[DIMM_MEM_TYPE]) -+ { -+ case (DIMM_MEM_TYPE_SDRAM): -+ pDimmInfo->memoryType = MEM_TYPE_SDRAM; -+ DB(mvOsPrintf("DRAM Memeory type SDRAM\n")); -+ break; -+ case (DIMM_MEM_TYPE_DDR1): -+ pDimmInfo->memoryType = MEM_TYPE_DDR1; -+ DB(mvOsPrintf("DRAM Memeory type DDR1\n")); -+ break; -+ case (DIMM_MEM_TYPE_DDR2): -+ pDimmInfo->memoryType = MEM_TYPE_DDR2; -+ DB(mvOsPrintf("DRAM Memeory type DDR2\n")); -+ break; -+ default: -+ mvOsPrintf("ERROR: Undefined memory type!\n"); -+ return MV_ERROR; -+ } -+ -+ -+ /* Number Of Row Addresses */ -+ pDimmInfo->numOfRowAddr = data[DIMM_ROW_NUM]; -+ DB(mvOsPrintf("DRAM numOfRowAddr[3] %d\n",pDimmInfo->numOfRowAddr)); -+ -+ /* Number Of Column Addresses */ -+ pDimmInfo->numOfColAddr = data[DIMM_COL_NUM]; -+ DB(mvOsPrintf("DRAM numOfColAddr[4] %d\n",pDimmInfo->numOfColAddr)); -+ -+ /* Number Of Module Banks */ -+ pDimmInfo->numOfModuleBanks = data[DIMM_MODULE_BANK_NUM]; -+ DB(mvOsPrintf("DRAM numOfModuleBanks[5] 0x%x\n", -+ pDimmInfo->numOfModuleBanks)); -+ -+ /* Number of module banks encoded differently for DDR2 */ -+ if (pDimmInfo->memoryType == MEM_TYPE_DDR2) -+ pDimmInfo->numOfModuleBanks = (pDimmInfo->numOfModuleBanks & 0x7)+1; -+ -+ /* Data Width */ -+ pDimmInfo->dataWidth = data[DIMM_DATA_WIDTH]; -+ DB(mvOsPrintf("DRAM dataWidth[6] 0x%x\n", pDimmInfo->dataWidth)); -+ -+ /* Minimum Cycle Time At Max CasLatancy */ -+ pDimmInfo->minCycleTimeAtMaxCasLatPs = cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS]); -+ -+ /* Error Check Type */ -+ pDimmInfo->errorCheckType = data[DIMM_ERR_CHECK_TYPE]; -+ DB(mvOsPrintf("DRAM errorCheckType[11] 0x%x\n", -+ pDimmInfo->errorCheckType)); -+ -+ /* Refresh Interval */ -+ pDimmInfo->refreshInterval = data[DIMM_REFRESH_INTERVAL]; -+ DB(mvOsPrintf("DRAM refreshInterval[12] 0x%x\n", -+ pDimmInfo->refreshInterval)); -+ -+ /* Sdram Width */ -+ pDimmInfo->sdramWidth = data[DIMM_SDRAM_WIDTH]; -+ DB(mvOsPrintf("DRAM sdramWidth[13] 0x%x\n",pDimmInfo->sdramWidth)); -+ -+ /* Error Check Data Width */ -+ pDimmInfo->errorCheckDataWidth = data[DIMM_ERR_CHECK_DATA_WIDTH]; -+ DB(mvOsPrintf("DRAM errorCheckDataWidth[14] 0x%x\n", -+ pDimmInfo->errorCheckDataWidth)); -+ -+ /* Burst Length Supported */ -+ /* SDRAM/DDR1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ burst length = * Page | TBD | TBD | TBD | 8 | 4 | 2 | 1 * -+ *********************************************************/ -+ /* DDR2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ burst length = * Page | TBD | TBD | TBD | 8 | 4 | TBD | TBD * -+ *********************************************************/ -+ -+ pDimmInfo->burstLengthSupported = data[DIMM_BURST_LEN_SUP]; -+ DB(mvOsPrintf("DRAM burstLengthSupported[16] 0x%x\n", -+ pDimmInfo->burstLengthSupported)); -+ -+ /* Number Of Banks On Each Device */ -+ pDimmInfo->numOfBanksOnEachDevice = data[DIMM_DEV_BANK_NUM]; -+ DB(mvOsPrintf("DRAM numOfBanksOnEachDevice[17] 0x%x\n", -+ pDimmInfo->numOfBanksOnEachDevice)); -+ -+ /* Suported Cas Latencies */ -+ -+ /* SDRAM: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 * -+ ********************************************************/ -+ -+ /* DDR 1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 4 | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 * -+ *********************************************************/ -+ -+ /* DDR 2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | TBD | 5 | 4 | 3 | 2 | TBD | TBD * -+ *********************************************************/ -+ -+ pDimmInfo->suportedCasLatencies = data[DIMM_SUP_CAL]; -+ DB(mvOsPrintf("DRAM suportedCasLatencies[18] 0x%x\n", -+ pDimmInfo->suportedCasLatencies)); -+ -+ /* For DDR2 only, get the DIMM type information */ -+ if (pDimmInfo->memoryType == MEM_TYPE_DDR2) -+ { -+ pDimmInfo->dimmTypeInfo = data[DIMM_DDR2_TYPE_INFORMATION]; -+ DB(mvOsPrintf("DRAM dimmTypeInfo[20] (DDR2) 0x%x\n", -+ pDimmInfo->dimmTypeInfo)); -+ } -+ -+ /* SDRAM Modules Attributes */ -+ pDimmInfo->dimmAttributes = data[DIMM_BUF_ADDR_CONT_IN]; -+ DB(mvOsPrintf("DRAM dimmAttributes[21] 0x%x\n", -+ pDimmInfo->dimmAttributes)); -+ -+ /* Minimum Cycle Time At Max CasLatancy Minus 1*/ -+ pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps = -+ cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS1]); -+ -+ /* Minimum Cycle Time At Max CasLatancy Minus 2*/ -+ pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps = -+ cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS2]); -+ -+ pDimmInfo->minRowPrechargeTime = data[DIMM_MIN_ROW_PRECHARGE_TIME]; -+ DB(mvOsPrintf("DRAM minRowPrechargeTime[27] 0x%x\n", -+ pDimmInfo->minRowPrechargeTime)); -+ pDimmInfo->minRowActiveToRowActive = data[DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE]; -+ DB(mvOsPrintf("DRAM minRowActiveToRowActive[28] 0x%x\n", -+ pDimmInfo->minRowActiveToRowActive)); -+ pDimmInfo->minRasToCasDelay = data[DIMM_MIN_RAS_TO_CAS_DELAY]; -+ DB(mvOsPrintf("DRAM minRasToCasDelay[29] 0x%x\n", -+ pDimmInfo->minRasToCasDelay)); -+ pDimmInfo->minRasPulseWidth = data[DIMM_MIN_RAS_PULSE_WIDTH]; -+ DB(mvOsPrintf("DRAM minRasPulseWidth[30] 0x%x\n", -+ pDimmInfo->minRasPulseWidth)); -+ -+ /* DIMM Bank Density */ -+ pDimmInfo->dimmBankDensity = data[DIMM_BANK_DENSITY]; -+ DB(mvOsPrintf("DRAM dimmBankDensity[31] 0x%x\n", -+ pDimmInfo->dimmBankDensity)); -+ -+ /* Only DDR2 includes Write Recovery Time field. Other SDRAM ignore */ -+ pDimmInfo->minWriteRecoveryTime = data[DIMM_MIN_WRITE_RECOVERY_TIME]; -+ DB(mvOsPrintf("DRAM minWriteRecoveryTime[36] 0x%x\n", -+ pDimmInfo->minWriteRecoveryTime)); -+ -+ /* Only DDR2 includes Internal Write To Read Command Delay field. */ -+ pDimmInfo->minWriteToReadCmdDelay = data[DIMM_MIN_WRITE_TO_READ_CMD_DELAY]; -+ DB(mvOsPrintf("DRAM minWriteToReadCmdDelay[37] 0x%x\n", -+ pDimmInfo->minWriteToReadCmdDelay)); -+ -+ /* Only DDR2 includes Internal Read To Precharge Command Delay field. */ -+ pDimmInfo->minReadToPrechCmdDelay = data[DIMM_MIN_READ_TO_PRECH_CMD_DELAY]; -+ DB(mvOsPrintf("DRAM minReadToPrechCmdDelay[38] 0x%x\n", -+ pDimmInfo->minReadToPrechCmdDelay)); -+ -+ /* Only DDR2 includes Minimum Refresh to Activate/Refresh Command field */ -+ pDimmInfo->minRefreshToActiveCmd = data[DIMM_MIN_REFRESH_TO_ACTIVATE_CMD]; -+ DB(mvOsPrintf("DRAM minRefreshToActiveCmd[42] 0x%x\n", -+ pDimmInfo->minRefreshToActiveCmd)); -+ -+ /* calculating the sdram density. Representing device density from */ -+ /* bit 20 to allow representation of 4GB and above. */ -+ /* For example, if density is 512Mbit 0x20000000, will be represent in */ -+ /* deviceDensity by 0x20000000 >> 16 --> 0x00000200. Another example */ -+ /* is density 8GB 0x200000000 >> 16 --> 0x00002000. */ -+ density = (1 << ((pDimmInfo->numOfRowAddr + pDimmInfo->numOfColAddr) - 20)); -+ pDimmInfo->deviceDensity = density * -+ pDimmInfo->numOfBanksOnEachDevice * -+ pDimmInfo->sdramWidth; -+ DB(mvOsPrintf("DRAM deviceDensity %d\n",pDimmInfo->deviceDensity)); -+ -+ /* Number of devices includeing Error correction */ -+ pDimmInfo->numberOfDevices = (pDimmInfo->dataWidth/pDimmInfo->sdramWidth) * -+ pDimmInfo->numOfModuleBanks; -+ DB(mvOsPrintf("DRAM numberOfDevices %d\n", -+ pDimmInfo->numberOfDevices)); -+ -+ pDimmInfo->size = 0; -+ -+ /* Note that pDimmInfo->size is in MB units */ -+ if (pDimmInfo->memoryType == MEM_TYPE_SDRAM) -+ { -+ if (pDimmInfo->dimmBankDensity & BIT0) -+ pDimmInfo->size += 1024; /* Equal to 1GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT1) -+ pDimmInfo->size += 8; /* Equal to 8MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT2) -+ pDimmInfo->size += 16; /* Equal to 16MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT3) -+ pDimmInfo->size += 32; /* Equal to 32MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT4) -+ pDimmInfo->size += 64; /* Equal to 64MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT5) -+ pDimmInfo->size += 128; /* Equal to 128MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT6) -+ pDimmInfo->size += 256; /* Equal to 256MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT7) -+ pDimmInfo->size += 512; /* Equal to 512MB */ -+ } -+ else if (pDimmInfo->memoryType == MEM_TYPE_DDR1) -+ { -+ if (pDimmInfo->dimmBankDensity & BIT0) -+ pDimmInfo->size += 1024; /* Equal to 1GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT1) -+ pDimmInfo->size += 2048; /* Equal to 2GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT2) -+ pDimmInfo->size += 16; /* Equal to 16MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT3) -+ pDimmInfo->size += 32; /* Equal to 32MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT4) -+ pDimmInfo->size += 64; /* Equal to 64MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT5) -+ pDimmInfo->size += 128; /* Equal to 128MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT6) -+ pDimmInfo->size += 256; /* Equal to 256MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT7) -+ pDimmInfo->size += 512; /* Equal to 512MB */ -+ } -+ else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ -+ { -+ if (pDimmInfo->dimmBankDensity & BIT0) -+ pDimmInfo->size += 1024; /* Equal to 1GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT1) -+ pDimmInfo->size += 2048; /* Equal to 2GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT2) -+ pDimmInfo->size += 4096; /* Equal to 4GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT3) -+ pDimmInfo->size += 8192; /* Equal to 8GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT4) -+ pDimmInfo->size += 16384; /* Equal to 16GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT5) -+ pDimmInfo->size += 128; /* Equal to 128MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT6) -+ pDimmInfo->size += 256; /* Equal to 256MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT7) -+ pDimmInfo->size += 512; /* Equal to 512MB */ -+ } -+ -+ pDimmInfo->size *= pDimmInfo->numOfModuleBanks; -+ -+ DB(mvOsPrintf("Dram: dimm size %dMB \n",pDimmInfo->size)); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* dimmSpdPrint - Print the SPD parameters. -+* -+* DESCRIPTION: -+* Print the Dimm SPD parameters. -+* -+* INPUT: -+* pDimmInfo - DIMM information structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID dimmSpdPrint(MV_U32 dimmNum) -+{ -+ MV_DIMM_INFO dimmInfo; -+ MV_U32 i, temp = 0; -+ MV_U32 k, maskLeftOfPoint = 0, maskRightOfPoint = 0; -+ MV_U32 rightOfPoint = 0,leftOfPoint = 0, div, time_tmp, shift; -+ MV_U32 busClkPs; -+ MV_U8 trp_clocks=0, trcd_clocks, tras_clocks, trrd_clocks, -+ temp_buf[40], *spdRawData; -+ -+ busClkPs = 1000000000 / (mvBoardSysClkGet() / 100); /* in 10 ps units */ -+ -+ spdRawData = dimmInfo.spdRawData; -+ -+ if(MV_OK != dimmSpdGet(dimmNum, &dimmInfo)) -+ { -+ mvOsOutput("ERROR: Could not read SPD information!\n"); -+ return; -+ } -+ -+ /* find Manufactura of Dimm Module */ -+ mvOsOutput("\nManufacturer's JEDEC ID Code: "); -+ for(i = 0 ; i < DIMM_MODULE_MANU_SIZE ; i++) -+ { -+ mvOsOutput("%x",spdRawData[DIMM_MODULE_MANU_OFFS + i]); -+ } -+ mvOsOutput("\n"); -+ -+ /* Manufacturer's Specific Data */ -+ for(i = 0 ; i < DIMM_MODULE_ID_SIZE ; i++) -+ { -+ temp_buf[i] = spdRawData[DIMM_MODULE_ID_OFFS + i]; -+ } -+ mvOsOutput("Manufacturer's Specific Data: %s\n", temp_buf); -+ -+ /* Module Part Number */ -+ for(i = 0 ; i < DIMM_MODULE_VEN_SIZE ; i++) -+ { -+ temp_buf[i] = spdRawData[DIMM_MODULE_VEN_OFFS + i]; -+ } -+ mvOsOutput("Module Part Number: %s\n", temp_buf); -+ -+ /* Module Serial Number */ -+ for(i = 0; i < sizeof(MV_U32); i++) -+ { -+ temp |= spdRawData[95+i] << 8*i; -+ } -+ mvOsOutput("DIMM Serial No. %ld (%lx)\n", (long)temp, -+ (long)temp); -+ -+ /* find Manufac-Data of Dimm Module */ -+ mvOsOutput("Manufactoring Date: Year 20%d%d/ ww %d%d\n", -+ ((spdRawData[93] & 0xf0) >> 4), (spdRawData[93] & 0xf), -+ ((spdRawData[94] & 0xf0) >> 4), (spdRawData[94] & 0xf)); -+ /* find modul_revision of Dimm Module */ -+ mvOsOutput("Module Revision: %d.%d\n", -+ spdRawData[91], spdRawData[92]); -+ -+ /* find manufac_place of Dimm Module */ -+ mvOsOutput("manufac_place: %d\n", spdRawData[72]); -+ -+ /* go over the first 35 I2C data bytes */ -+ for(i = 2 ; i <= 35 ; i++) -+ switch(i) -+ { -+ case 2: /* Memory type (DDR1/2 / SDRAM) */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ mvOsOutput("Dram Type is: SDRAM\n"); -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ mvOsOutput("Dram Type is: SDRAM DDR1\n"); -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR2) -+ mvOsOutput("Dram Type is: SDRAM DDR2\n"); -+ else -+ mvOsOutput("Dram Type unknown\n"); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 3: /* Number Of Row Addresses */ -+ mvOsOutput("Module Number of row addresses: %d\n", -+ dimmInfo.numOfRowAddr); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 4: /* Number Of Column Addresses */ -+ mvOsOutput("Module Number of col addresses: %d\n", -+ dimmInfo.numOfColAddr); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 5: /* Number Of Module Banks */ -+ mvOsOutput("Number of Banks on Mod.: %d\n", -+ dimmInfo.numOfModuleBanks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 6: /* Data Width */ -+ mvOsOutput("Module Data Width: %d bit\n", -+ dimmInfo.dataWidth); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 8: /* Voltage Interface */ -+ switch(spdRawData[i]) -+ { -+ case 0x0: -+ mvOsOutput("Module is TTL_5V_TOLERANT\n"); -+ break; -+ case 0x1: -+ mvOsOutput("Module is LVTTL\n"); -+ break; -+ case 0x2: -+ mvOsOutput("Module is HSTL_1_5V\n"); -+ break; -+ case 0x3: -+ mvOsOutput("Module is SSTL_3_3V\n"); -+ break; -+ case 0x4: -+ mvOsOutput("Module is SSTL_2_5V\n"); -+ break; -+ case 0x5: -+ if (dimmInfo.memoryType != MEM_TYPE_SDRAM) -+ { -+ mvOsOutput("Module is SSTL_1_8V\n"); -+ break; -+ } -+ default: -+ mvOsOutput("Module is VOLTAGE_UNKNOWN\n"); -+ break; -+ } -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 9: /* Minimum Cycle Time At Max CasLatancy */ -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ rightOfPoint = (spdRawData[i] & 0x0f) * 10; -+ -+ /* DDR2 addition of right of point */ -+ if ((spdRawData[i] & 0x0f) == 0xA) -+ { -+ rightOfPoint = 25; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xB) -+ { -+ rightOfPoint = 33; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xC) -+ { -+ rightOfPoint = 66; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xD) -+ { -+ rightOfPoint = 75; -+ } -+ mvOsOutput("Minimum Cycle Time At Max CL: %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 10: /* Clock To Data Out */ -+ div = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 10:100; -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / div; -+ rightOfPoint = time_tmp % div; -+ mvOsOutput("Clock To Data Out: %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 11: /* Error Check Type */ -+ mvOsOutput("Error Check Type (0=NONE): %d\n", -+ dimmInfo.errorCheckType); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 12: /* Refresh Interval */ -+ mvOsOutput("Refresh Rate: %x\n", -+ dimmInfo.refreshInterval); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 13: /* Sdram Width */ -+ mvOsOutput("Sdram Width: %d bits\n", -+ dimmInfo.sdramWidth); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 14: /* Error Check Data Width */ -+ mvOsOutput("Error Check Data Width: %d bits\n", -+ dimmInfo.errorCheckDataWidth); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 15: /* Minimum Clock Delay is unsupported */ -+ if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) || -+ (dimmInfo.memoryType == MEM_TYPE_DDR1)) -+ { -+ mvOsOutput("Minimum Clk Delay back to back: %d\n", -+ spdRawData[i]); -+ } -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 16: /* Burst Length Supported */ -+ /* SDRAM/DDR1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ burst length = * Page | TBD | TBD | TBD | 8 | 4 | 2 | 1 * -+ *********************************************************/ -+ /* DDR2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ burst length = * Page | TBD | TBD | TBD | 8 | 4 | TBD | TBD * -+ *********************************************************/ -+ mvOsOutput("Burst Length Supported: "); -+ if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) || -+ (dimmInfo.memoryType == MEM_TYPE_DDR1)) -+ { -+ if (dimmInfo.burstLengthSupported & BIT0) -+ mvOsOutput("1, "); -+ if (dimmInfo.burstLengthSupported & BIT1) -+ mvOsOutput("2, "); -+ } -+ if (dimmInfo.burstLengthSupported & BIT2) -+ mvOsOutput("4, "); -+ if (dimmInfo.burstLengthSupported & BIT3) -+ mvOsOutput("8, "); -+ -+ mvOsOutput(" Bit \n"); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 17: /* Number Of Banks On Each Device */ -+ mvOsOutput("Number Of Banks On Each Chip: %d\n", -+ dimmInfo.numOfBanksOnEachDevice); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 18: /* Suported Cas Latencies */ -+ -+ /* SDRAM: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 * -+ ********************************************************/ -+ -+ /* DDR 1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 4 | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 * -+ *********************************************************/ -+ -+ /* DDR 2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | TBD | 5 | 4 | 3 | 2 | TBD | TBD * -+ *********************************************************/ -+ -+ mvOsOutput("Suported Cas Latencies: (CL) "); -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ for (k = 0; k <=7; k++) -+ { -+ if (dimmInfo.suportedCasLatencies & (1 << k)) -+ mvOsOutput("%d, ", k+1); -+ } -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ { -+ if (dimmInfo.suportedCasLatencies & BIT0) -+ mvOsOutput("1, "); -+ if (dimmInfo.suportedCasLatencies & BIT1) -+ mvOsOutput("1.5, "); -+ if (dimmInfo.suportedCasLatencies & BIT2) -+ mvOsOutput("2, "); -+ if (dimmInfo.suportedCasLatencies & BIT3) -+ mvOsOutput("2.5, "); -+ if (dimmInfo.suportedCasLatencies & BIT4) -+ mvOsOutput("3, "); -+ if (dimmInfo.suportedCasLatencies & BIT5) -+ mvOsOutput("3.5, "); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR2) -+ { -+ if (dimmInfo.suportedCasLatencies & BIT2) -+ mvOsOutput("2, "); -+ if (dimmInfo.suportedCasLatencies & BIT3) -+ mvOsOutput("3, "); -+ if (dimmInfo.suportedCasLatencies & BIT4) -+ mvOsOutput("4, "); -+ if (dimmInfo.suportedCasLatencies & BIT5) -+ mvOsOutput("5, "); -+ } -+ else -+ mvOsOutput("?.?, "); -+ mvOsOutput("\n"); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 20: /* DDR2 DIMM type info */ -+ if (dimmInfo.memoryType == MEM_TYPE_DDR2) -+ { -+ if (dimmInfo.dimmTypeInfo & (BIT0 | BIT4)) -+ mvOsOutput("Registered DIMM (RDIMM)\n"); -+ else if (dimmInfo.dimmTypeInfo & (BIT1 | BIT5)) -+ mvOsOutput("Unbuffered DIMM (UDIMM)\n"); -+ else -+ mvOsOutput("Unknown DIMM type.\n"); -+ } -+ -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 21: /* SDRAM Modules Attributes */ -+ mvOsOutput("\nModule Attributes (SPD Byte 21): \n"); -+ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ if (dimmInfo.dimmAttributes & BIT0) -+ mvOsOutput(" Buffered Addr/Control Input: Yes\n"); -+ else -+ mvOsOutput(" Buffered Addr/Control Input: No\n"); -+ -+ if (dimmInfo.dimmAttributes & BIT1) -+ mvOsOutput(" Registered Addr/Control Input: Yes\n"); -+ else -+ mvOsOutput(" Registered Addr/Control Input: No\n"); -+ -+ if (dimmInfo.dimmAttributes & BIT2) -+ mvOsOutput(" On-Card PLL (clock): Yes \n"); -+ else -+ mvOsOutput(" On-Card PLL (clock): No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT3) -+ mvOsOutput(" Bufferd DQMB Input: Yes \n"); -+ else -+ mvOsOutput(" Bufferd DQMB Inputs: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT4) -+ mvOsOutput(" Registered DQMB Inputs: Yes \n"); -+ else -+ mvOsOutput(" Registered DQMB Inputs: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT5) -+ mvOsOutput(" Differential Clock Input: Yes \n"); -+ else -+ mvOsOutput(" Differential Clock Input: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT6) -+ mvOsOutput(" redundant Row Addressing: Yes \n"); -+ else -+ mvOsOutput(" redundant Row Addressing: No \n"); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ { -+ if (dimmInfo.dimmAttributes & BIT0) -+ mvOsOutput(" Buffered Addr/Control Input: Yes\n"); -+ else -+ mvOsOutput(" Buffered Addr/Control Input: No\n"); -+ -+ if (dimmInfo.dimmAttributes & BIT1) -+ mvOsOutput(" Registered Addr/Control Input: Yes\n"); -+ else -+ mvOsOutput(" Registered Addr/Control Input: No\n"); -+ -+ if (dimmInfo.dimmAttributes & BIT2) -+ mvOsOutput(" On-Card PLL (clock): Yes \n"); -+ else -+ mvOsOutput(" On-Card PLL (clock): No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT3) -+ mvOsOutput(" FET Switch On-Card Enabled: Yes \n"); -+ else -+ mvOsOutput(" FET Switch On-Card Enabled: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT4) -+ mvOsOutput(" FET Switch External Enabled: Yes \n"); -+ else -+ mvOsOutput(" FET Switch External Enabled: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT5) -+ mvOsOutput(" Differential Clock Input: Yes \n"); -+ else -+ mvOsOutput(" Differential Clock Input: No \n"); -+ } -+ else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ -+ { -+ mvOsOutput(" Number of Active Registers on the DIMM: %d\n", -+ (dimmInfo.dimmAttributes & 0x3) + 1); -+ -+ mvOsOutput(" Number of PLLs on the DIMM: %d\n", -+ ((dimmInfo.dimmAttributes) >> 2) & 0x3); -+ -+ if (dimmInfo.dimmAttributes & BIT4) -+ mvOsOutput(" FET Switch External Enabled: Yes \n"); -+ else -+ mvOsOutput(" FET Switch External Enabled: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT6) -+ mvOsOutput(" Analysis probe installed: Yes \n"); -+ else -+ mvOsOutput(" Analysis probe installed: No \n"); -+ } -+ -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 22: /* Suported AutoPreCharge */ -+ mvOsOutput("\nModul Attributes (SPD Byte 22): \n"); -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ if ( spdRawData[i] & BIT0 ) -+ mvOsOutput(" Early Ras Precharge: Yes \n"); -+ else -+ mvOsOutput(" Early Ras Precharge: No \n"); -+ -+ if ( spdRawData[i] & BIT1 ) -+ mvOsOutput(" AutoPreCharge: Yes \n"); -+ else -+ mvOsOutput(" AutoPreCharge: No \n"); -+ -+ if ( spdRawData[i] & BIT2 ) -+ mvOsOutput(" Precharge All: Yes \n"); -+ else -+ mvOsOutput(" Precharge All: No \n"); -+ -+ if ( spdRawData[i] & BIT3 ) -+ mvOsOutput(" Write 1/ReadBurst: Yes \n"); -+ else -+ mvOsOutput(" Write 1/ReadBurst: No \n"); -+ -+ if ( spdRawData[i] & BIT4 ) -+ mvOsOutput(" lower VCC tolerance: 5%%\n"); -+ else -+ mvOsOutput(" lower VCC tolerance: 10%%\n"); -+ -+ if ( spdRawData[i] & BIT5 ) -+ mvOsOutput(" upper VCC tolerance: 5%%\n"); -+ else -+ mvOsOutput(" upper VCC tolerance: 10%%\n"); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ { -+ if ( spdRawData[i] & BIT0 ) -+ mvOsOutput(" Supports Weak Driver: Yes \n"); -+ else -+ mvOsOutput(" Supports Weak Driver: No \n"); -+ -+ if ( !(spdRawData[i] & BIT4) ) -+ mvOsOutput(" lower VCC tolerance: 0.2V\n"); -+ -+ if ( !(spdRawData[i] & BIT5) ) -+ mvOsOutput(" upper VCC tolerance: 0.2V\n"); -+ -+ if ( spdRawData[i] & BIT6 ) -+ mvOsOutput(" Concurrent Auto Preharge: Yes \n"); -+ else -+ mvOsOutput(" Concurrent Auto Preharge: No \n"); -+ -+ if ( spdRawData[i] & BIT7 ) -+ mvOsOutput(" Supports Fast AP: Yes \n"); -+ else -+ mvOsOutput(" Supports Fast AP: No \n"); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR2) -+ { -+ if ( spdRawData[i] & BIT0 ) -+ mvOsOutput(" Supports Weak Driver: Yes \n"); -+ else -+ mvOsOutput(" Supports Weak Driver: No \n"); -+ } -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 23: -+ /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */ -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ rightOfPoint = (spdRawData[i] & 0x0f) * 10; -+ -+ /* DDR2 addition of right of point */ -+ if ((spdRawData[i] & 0x0f) == 0xA) -+ { -+ rightOfPoint = 25; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xB) -+ { -+ rightOfPoint = 33; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xC) -+ { -+ rightOfPoint = 66; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xD) -+ { -+ rightOfPoint = 75; -+ } -+ -+ mvOsOutput("Minimum Cycle Time At 2nd highest CasLatancy" -+ "(0 = Not supported): %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint ); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 24: /* Clock To Data Out 2nd highest Cas Latency Value*/ -+ div = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 10:100; -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / div; -+ rightOfPoint = time_tmp % div; -+ mvOsOutput("Clock To Data Out (2nd CL value): %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 25: -+ /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ leftOfPoint = (spdRawData[i] & 0xfc) >> 2; -+ rightOfPoint = (spdRawData[i] & 0x3) * 25; -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ rightOfPoint = (spdRawData[i] & 0x0f) * 10; -+ -+ /* DDR2 addition of right of point */ -+ if ((spdRawData[i] & 0x0f) == 0xA) -+ { -+ rightOfPoint = 25; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xB) -+ { -+ rightOfPoint = 33; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xC) -+ { -+ rightOfPoint = 66; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xD) -+ { -+ rightOfPoint = 75; -+ } -+ } -+ mvOsOutput("Minimum Cycle Time At 3rd highest CasLatancy" -+ "(0 = Not supported): %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint ); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 26: /* Clock To Data Out 3rd highest Cas Latency Value*/ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ leftOfPoint = (spdRawData[i] & 0xfc) >> 2; -+ rightOfPoint = (spdRawData[i] & 0x3) * 25; -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = 0; -+ rightOfPoint = time_tmp; -+ } -+ mvOsOutput("Clock To Data Out (3rd CL value): %d.%2d[ns]\n", -+ leftOfPoint, rightOfPoint ); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 27: /* Minimum Row Precharge Time */ -+ shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; -+ maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0xff : 0xfc; -+ maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0x00 : 0x03; -+ leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); -+ rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; -+ temp = ((leftOfPoint*100) + rightOfPoint);/* in 10ps Intervals*/ -+ trp_clocks = (temp + (busClkPs-1)) / busClkPs; -+ mvOsOutput("Minimum Row Precharge Time [ns]: %d.%d = " -+ "in Clk cycles %d\n", -+ leftOfPoint, rightOfPoint, trp_clocks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 28: /* Minimum Row Active to Row Active Time */ -+ shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; -+ maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0xff : 0xfc; -+ maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0x00 : 0x03; -+ leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); -+ rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; -+ temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/ -+ trrd_clocks = (temp + (busClkPs-1)) / busClkPs; -+ mvOsOutput("Minimum Row Active -To- Row Active Delay [ns]: " -+ "%d.%d = in Clk cycles %d\n", -+ leftOfPoint, rightOfPoint, trp_clocks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 29: /* Minimum Ras-To-Cas Delay */ -+ shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; -+ maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0xff : 0xfc; -+ maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0x00 : 0x03; -+ leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); -+ rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; -+ temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/ -+ trcd_clocks = (temp + (busClkPs-1) )/ busClkPs; -+ mvOsOutput("Minimum Ras-To-Cas Delay [ns]: %d.%d = " -+ "in Clk cycles %d\n", -+ leftOfPoint, rightOfPoint, trp_clocks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 30: /* Minimum Ras Pulse Width */ -+ tras_clocks = (cas2ps(spdRawData[i])+(busClkPs-1)) / busClkPs; -+ mvOsOutput("Minimum Ras Pulse Width [ns]: %d = " -+ "in Clk cycles %d\n", spdRawData[i], tras_clocks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 31: /* Module Bank Density */ -+ mvOsOutput("Module Bank Density (more than 1= Multisize-Module):"); -+ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ if (dimmInfo.dimmBankDensity & BIT0) -+ mvOsOutput("1GB, "); -+ if (dimmInfo.dimmBankDensity & BIT1) -+ mvOsOutput("8MB, "); -+ if (dimmInfo.dimmBankDensity & BIT2) -+ mvOsOutput("16MB, "); -+ if (dimmInfo.dimmBankDensity & BIT3) -+ mvOsOutput("32MB, "); -+ if (dimmInfo.dimmBankDensity & BIT4) -+ mvOsOutput("64MB, "); -+ if (dimmInfo.dimmBankDensity & BIT5) -+ mvOsOutput("128MB, "); -+ if (dimmInfo.dimmBankDensity & BIT6) -+ mvOsOutput("256MB, "); -+ if (dimmInfo.dimmBankDensity & BIT7) -+ mvOsOutput("512MB, "); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ { -+ if (dimmInfo.dimmBankDensity & BIT0) -+ mvOsOutput("1GB, "); -+ if (dimmInfo.dimmBankDensity & BIT1) -+ mvOsOutput("2GB, "); -+ if (dimmInfo.dimmBankDensity & BIT2) -+ mvOsOutput("16MB, "); -+ if (dimmInfo.dimmBankDensity & BIT3) -+ mvOsOutput("32MB, "); -+ if (dimmInfo.dimmBankDensity & BIT4) -+ mvOsOutput("64MB, "); -+ if (dimmInfo.dimmBankDensity & BIT5) -+ mvOsOutput("128MB, "); -+ if (dimmInfo.dimmBankDensity & BIT6) -+ mvOsOutput("256MB, "); -+ if (dimmInfo.dimmBankDensity & BIT7) -+ mvOsOutput("512MB, "); -+ } -+ else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ -+ { -+ if (dimmInfo.dimmBankDensity & BIT0) -+ mvOsOutput("1GB, "); -+ if (dimmInfo.dimmBankDensity & BIT1) -+ mvOsOutput("2GB, "); -+ if (dimmInfo.dimmBankDensity & BIT2) -+ mvOsOutput("4GB, "); -+ if (dimmInfo.dimmBankDensity & BIT3) -+ mvOsOutput("8GB, "); -+ if (dimmInfo.dimmBankDensity & BIT4) -+ mvOsOutput("16GB, "); -+ if (dimmInfo.dimmBankDensity & BIT5) -+ mvOsOutput("128MB, "); -+ if (dimmInfo.dimmBankDensity & BIT6) -+ mvOsOutput("256MB, "); -+ if (dimmInfo.dimmBankDensity & BIT7) -+ mvOsOutput("512MB, "); -+ } -+ mvOsOutput("\n"); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 32: /* Address And Command Setup Time (measured in ns/1000) */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ rightOfPoint = (spdRawData[i] & 0x0f); -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ if(leftOfPoint > 7) -+ { -+ leftOfPoint *= -1; -+ } -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / 100; -+ rightOfPoint = time_tmp % 100; -+ } -+ mvOsOutput("Address And Command Setup Time [ns]: %d.%d\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 33: /* Address And Command Hold Time */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ rightOfPoint = (spdRawData[i] & 0x0f); -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ if(leftOfPoint > 7) -+ { -+ leftOfPoint *= -1; -+ } -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / 100; -+ rightOfPoint = time_tmp % 100; -+ } -+ mvOsOutput("Address And Command Hold Time [ns]: %d.%d\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 34: /* Data Input Setup Time */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ rightOfPoint = (spdRawData[i] & 0x0f); -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ if(leftOfPoint > 7) -+ { -+ leftOfPoint *= -1; -+ } -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / 100; -+ rightOfPoint = time_tmp % 100; -+ } -+ mvOsOutput("Data Input Setup Time [ns]: %d.%d\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 35: /* Data Input Hold Time */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ rightOfPoint = (spdRawData[i] & 0x0f); -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ if(leftOfPoint > 7) -+ { -+ leftOfPoint *= -1; -+ } -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / 100; -+ rightOfPoint = time_tmp % 100; -+ } -+ mvOsOutput("Data Input Hold Time [ns]: %d.%d\n\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 36: /* Relevant for DDR2 only: Write Recovery Time */ -+ leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> 2); -+ rightOfPoint = (spdRawData[i] & maskRightOfPoint) * 25; -+ mvOsOutput("Write Recovery Time [ns]: %d.%d\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ } -+ -+} -+ -+ -+/* -+ * translate ns.ns/10 coding of SPD timing values -+ * into ps unit values -+ */ -+/******************************************************************************* -+* cas2ps - Translate x.y ns parameter to pico-seconds values -+* -+* DESCRIPTION: -+* This function translates x.y nano seconds to its value in pico seconds. -+* For example 3.75ns will return 3750. -+* -+* INPUT: -+* spd_byte - DIMM SPD byte. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* value in pico seconds. -+* -+*******************************************************************************/ -+static MV_U32 cas2ps(MV_U8 spd_byte) -+{ -+ MV_U32 ns, ns10; -+ -+ /* isolate upper nibble */ -+ ns = (spd_byte >> 4) & 0x0F; -+ /* isolate lower nibble */ -+ ns10 = (spd_byte & 0x0F); -+ -+ if( ns10 < 10 ) { -+ ns10 *= 10; -+ } -+ else if( ns10 == 10 ) -+ ns10 = 25; -+ else if( ns10 == 11 ) -+ ns10 = 33; -+ else if( ns10 == 12 ) -+ ns10 = 66; -+ else if( ns10 == 13 ) -+ ns10 = 75; -+ else -+ { -+ mvOsOutput("cas2ps Err. unsupported cycle time.\n"); -+ } -+ -+ return (ns*1000 + ns10*10); -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.h -new file mode 100644 -index 0000000..6e79d1e ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDram.h -@@ -0,0 +1,191 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvDram -+#define __INCmvDram -+ -+#include "ddr1_2/mvDramIf.h" -+#include "twsi/mvTwsi.h" -+ -+#define MAX_DIMM_NUM 2 -+#define SPD_SIZE 128 -+ -+/* Dimm spd offsets */ -+#define DIMM_MEM_TYPE 2 -+#define DIMM_ROW_NUM 3 -+#define DIMM_COL_NUM 4 -+#define DIMM_MODULE_BANK_NUM 5 -+#define DIMM_DATA_WIDTH 6 -+#define DIMM_VOLT_IF 8 -+#define DIMM_MIN_CC_AT_MAX_CAS 9 -+#define DIMM_ERR_CHECK_TYPE 11 -+#define DIMM_REFRESH_INTERVAL 12 -+#define DIMM_SDRAM_WIDTH 13 -+#define DIMM_ERR_CHECK_DATA_WIDTH 14 -+#define DIMM_MIN_CLK_DEL 15 -+#define DIMM_BURST_LEN_SUP 16 -+#define DIMM_DEV_BANK_NUM 17 -+#define DIMM_SUP_CAL 18 -+#define DIMM_DDR2_TYPE_INFORMATION 20 /* DDR2 only */ -+#define DIMM_BUF_ADDR_CONT_IN 21 -+#define DIMM_MIN_CC_AT_MAX_CAS_MINUS1 23 -+#define DIMM_MIN_CC_AT_MAX_CAS_MINUS2 25 -+#define DIMM_MIN_ROW_PRECHARGE_TIME 27 -+#define DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE 28 -+#define DIMM_MIN_RAS_TO_CAS_DELAY 29 -+#define DIMM_MIN_RAS_PULSE_WIDTH 30 -+#define DIMM_BANK_DENSITY 31 -+#define DIMM_MIN_WRITE_RECOVERY_TIME 36 -+#define DIMM_MIN_WRITE_TO_READ_CMD_DELAY 37 -+#define DIMM_MIN_READ_TO_PRECH_CMD_DELAY 38 -+#define DIMM_MIN_REFRESH_TO_ACTIVATE_CMD 42 -+ -+/* Dimm Memory Type values */ -+#define DIMM_MEM_TYPE_SDRAM 0x4 -+#define DIMM_MEM_TYPE_DDR1 0x7 -+#define DIMM_MEM_TYPE_DDR2 0x8 -+ -+#define DIMM_MODULE_MANU_OFFS 64 -+#define DIMM_MODULE_MANU_SIZE 8 -+#define DIMM_MODULE_VEN_OFFS 73 -+#define DIMM_MODULE_VEN_SIZE 25 -+#define DIMM_MODULE_ID_OFFS 99 -+#define DIMM_MODULE_ID_SIZE 18 -+ -+/* enumeration for voltage levels. */ -+typedef enum _mvDimmVoltageIf -+{ -+ TTL_5V_TOLERANT, -+ LVTTL, -+ HSTL_1_5V, -+ SSTL_3_3V, -+ SSTL_2_5V, -+ VOLTAGE_UNKNOWN, -+} MV_DIMM_VOLTAGE_IF; -+ -+ -+/* enumaration for SDRAM CAS Latencies. */ -+typedef enum _mvDimmSdramCas -+{ -+ SD_CL_1 =1, -+ SD_CL_2, -+ SD_CL_3, -+ SD_CL_4, -+ SD_CL_5, -+ SD_CL_6, -+ SD_CL_7, -+ SD_FAULT -+}MV_DIMM_SDRAM_CAS; -+ -+ -+/* DIMM information structure */ -+typedef struct _mvDimmInfo -+{ -+ MV_MEMORY_TYPE memoryType; /* DDR or SDRAM */ -+ -+ MV_U8 spdRawData[SPD_SIZE]; /* Content of SPD-EEPROM copied 1:1 */ -+ -+ /* DIMM dimensions */ -+ MV_U32 numOfRowAddr; -+ MV_U32 numOfColAddr; -+ MV_U32 numOfModuleBanks; -+ MV_U32 dataWidth; -+ MV_U32 errorCheckType; /* ECC , PARITY..*/ -+ MV_U32 sdramWidth; /* 4,8,16 or 32 */ -+ MV_U32 errorCheckDataWidth; /* 0 - no, 1 - Yes */ -+ MV_U32 burstLengthSupported; -+ MV_U32 numOfBanksOnEachDevice; -+ MV_U32 suportedCasLatencies; -+ MV_U32 refreshInterval; -+ MV_U32 dimmBankDensity; -+ MV_U32 dimmTypeInfo; /* DDR2 only */ -+ MV_U32 dimmAttributes; -+ -+ /* DIMM timing parameters */ -+ MV_U32 minCycleTimeAtMaxCasLatPs; -+ MV_U32 minCycleTimeAtMaxCasLatMinus1Ps; -+ MV_U32 minCycleTimeAtMaxCasLatMinus2Ps; -+ MV_U32 minRowPrechargeTime; -+ MV_U32 minRowActiveToRowActive; -+ MV_U32 minRasToCasDelay; -+ MV_U32 minRasPulseWidth; -+ MV_U32 minWriteRecoveryTime; /* DDR2 only */ -+ MV_U32 minWriteToReadCmdDelay; /* DDR2 only */ -+ MV_U32 minReadToPrechCmdDelay; /* DDR2 only */ -+ MV_U32 minRefreshToActiveCmd; /* DDR2 only */ -+ -+ /* Parameters calculated from the extracted DIMM information */ -+ MV_U32 size; /* 16,64,128,256 or 512 MByte in MB units */ -+ MV_U32 deviceDensity; /* 16,64,128,256 or 512 Mbit in MB units */ -+ MV_U32 numberOfDevices; -+ -+} MV_DIMM_INFO; -+ -+ -+MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo); -+MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo); -+MV_VOID dimmSpdPrint(MV_U32 dimmNum); -+MV_STATUS dimmSpdCpy(MV_VOID); -+ -+#endif /* __INCmvDram */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.c b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.c -new file mode 100644 -index 0000000..c44dabe ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.c -@@ -0,0 +1,1599 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+/* includes */ -+#include "ddr1_2/mvDramIf.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+ -+ -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+/* DRAM bank presence encoding */ -+#define BANK_PRESENT_CS0 0x1 -+#define BANK_PRESENT_CS0_CS1 0x3 -+#define BANK_PRESENT_CS0_CS2 0x5 -+#define BANK_PRESENT_CS0_CS1_CS2 0x7 -+#define BANK_PRESENT_CS0_CS2_CS3 0xd -+#define BANK_PRESENT_CS0_CS2_CS3_CS4 0xf -+ -+/* locals */ -+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin); -+#if defined(MV_INC_BOARD_DDIM) -+static void sdramDDr2OdtConfig(MV_DRAM_BANK_INFO *pBankInfo); -+static MV_U32 dunitCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas); -+static MV_U32 sdramModeRegCalc(MV_U32 minCas); -+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo); -+static MV_U32 sdramAddrCtrlRegCalc(MV_DRAM_BANK_INFO *pBankInfo); -+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk); -+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk, -+ MV_U32 forcedCl); -+static MV_U32 sdramTimeCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, -+ MV_U32 minCas, MV_U32 busClk); -+static MV_U32 sdramTimeCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, -+ MV_U32 busClk); -+ -+/******************************************************************************* -+* mvDramIfDetect - Prepare DRAM interface configuration values. -+* -+* DESCRIPTION: -+* This function implements the full DRAM detection and timing -+* configuration for best system performance. -+* Since this routine runs from a ROM device (Boot Flash), its stack -+* resides on RAM, that might be the system DRAM. Changing DRAM -+* configuration values while keeping vital data in DRAM is risky. That -+* is why the function does not preform the configuration setting but -+* prepare those in predefined 32bit registers (in this case IDMA -+* registers are used) for other routine to perform the settings. -+* The function will call for board DRAM SPD information for each DRAM -+* chip select. The function will then analyze those SPD parameters of -+* all DRAM banks in order to decide on DRAM configuration compatible -+* for all DRAM banks. -+* The function will set the CPU DRAM address decode registers. -+* Note: This routine prepares values that will overide configuration of -+* mvDramBasicAsmInit(). -+* -+* INPUT: -+* forcedCl - Forced CAL Latency. If equal to zero, do not force. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvDramIfDetect(MV_U32 forcedCl) -+{ -+ MV_U32 retVal = MV_OK; /* return value */ -+ MV_DRAM_BANK_INFO bankInfo[MV_DRAM_MAX_CS]; -+ MV_U32 busClk, size, base = 0, i, temp, deviceW, dimmW; -+ MV_U8 minCas; -+ MV_DRAM_DEC_WIN dramDecWin; -+ -+ dramDecWin.addrWin.baseHigh = 0; -+ -+ busClk = mvBoardSysClkGet(); -+ -+ if (0 == busClk) -+ { -+ mvOsPrintf("Dram: ERR. Can't detect system clock! \n"); -+ return MV_ERROR; -+ } -+ -+ /* Close DRAM banks except bank 0 (in case code is excecuting from it...) */ -+#if defined(MV_INCLUDE_SDRAM_CS1) -+ for(i= SDRAM_CS1; i < MV_DRAM_MAX_CS; i++) -+ mvCpuIfTargetWinEnable(i, MV_FALSE); -+#endif -+ -+ /* we will use bank 0 as the representative of the all the DRAM banks, */ -+ /* since bank 0 must exist. */ -+ for(i = 0; i < MV_DRAM_MAX_CS; i++) -+ { -+ /* if Bank exist */ -+ if(MV_OK == mvDramBankInfoGet(i, &bankInfo[i])) -+ { -+ /* check it isn't SDRAM */ -+ if(bankInfo[i].memoryType == MEM_TYPE_SDRAM) -+ { -+ mvOsPrintf("Dram: ERR. SDRAM type not supported !!!\n"); -+ return MV_ERROR; -+ } -+ /* All banks must support registry in order to activate it */ -+ if(bankInfo[i].registeredAddrAndControlInputs != -+ bankInfo[0].registeredAddrAndControlInputs) -+ { -+ mvOsPrintf("Dram: ERR. different Registered settings !!!\n"); -+ return MV_ERROR; -+ } -+ -+ /* Init the CPU window decode */ -+ /* Note that the size in Bank info is in MB units */ -+ /* Note that the Dimm width might be different then the device DRAM width */ -+ temp = MV_REG_READ(SDRAM_CONFIG_REG); -+ -+ deviceW = ((temp & SDRAM_DWIDTH_MASK) == SDRAM_DWIDTH_16BIT )? 16 : 32; -+ dimmW = bankInfo[0].dataWidth - (bankInfo[0].dataWidth % 16); -+ size = ((bankInfo[i].size << 20) / (dimmW/deviceW)); -+ -+ /* We can not change DRAM window settings while excecuting */ -+ /* code from it. That is why we skip the DRAM CS[0], saving */ -+ /* it to the ROM configuration routine */ -+ if(i == SDRAM_CS0) -+ { -+ MV_U32 sizeToReg; -+ -+ /* Translate the given window size to register format */ -+ sizeToReg = ctrlSizeToReg(size, SCSR_SIZE_ALIGNMENT); -+ -+ /* Size parameter validity check. */ -+ if (-1 == sizeToReg) -+ { -+ mvOsPrintf("mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n" -+ ,i); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Size is located at upper 16 bits */ -+ sizeToReg <<= SCSR_SIZE_OFFS; -+ -+ /* enable it */ -+ sizeToReg |= SCSR_WIN_EN; -+ -+ MV_REG_WRITE(DRAM_BUF_REG0, sizeToReg); -+ } -+ else -+ { -+ dramDecWin.addrWin.baseLow = base; -+ dramDecWin.addrWin.size = size; -+ dramDecWin.enable = MV_TRUE; -+ -+ if (MV_OK != mvDramIfWinSet(SDRAM_CS0 + i, &dramDecWin)) -+ { -+ mvOsPrintf("Dram: ERR. Fail to set bank %d!!!\n", -+ SDRAM_CS0 + i); -+ return MV_ERROR; -+ } -+ } -+ -+ base += size; -+ -+ /* update the suportedCasLatencies mask */ -+ bankInfo[0].suportedCasLatencies &= bankInfo[i].suportedCasLatencies; -+ -+ } -+ else -+ { -+ if( i == 0 ) /* bank 0 doesn't exist */ -+ { -+ mvOsPrintf("Dram: ERR. Fail to detect bank 0 !!!\n"); -+ return MV_ERROR; -+ } -+ else -+ { -+ DB(mvOsPrintf("Dram: Could not find bank %d\n", i)); -+ bankInfo[i].size = 0; /* Mark this bank as non exist */ -+ } -+ } -+ } -+ -+ /* calculate minimum CAS */ -+ minCas = minCasCalc(&bankInfo[0], busClk, forcedCl); -+ if (0 == minCas) -+ { -+ mvOsOutput("Dram: Warn: Could not find CAS compatible to SysClk %dMhz\n", -+ (busClk / 1000000)); -+ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ minCas = DDR2_CL_4; /* Continue with this CAS */ -+ mvOsPrintf("Set default CAS latency 4\n"); -+ } -+ else -+ { -+ minCas = DDR1_CL_3; /* Continue with this CAS */ -+ mvOsPrintf("Set default CAS latency 3\n"); -+ } -+ } -+ -+ /* calc SDRAM_CONFIG_REG and save it to temp register */ -+ temp = sdramConfigRegCalc(&bankInfo[0], busClk); -+ if(-1 == temp) -+ { -+ mvOsPrintf("Dram: ERR. sdramConfigRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG1, temp); -+ -+ /* calc SDRAM_MODE_REG and save it to temp register */ -+ temp = sdramModeRegCalc(minCas); -+ if(-1 == temp) -+ { -+ mvOsPrintf("Dram: ERR. sdramModeRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG2, temp); -+ -+ /* calc SDRAM_EXTENDED_MODE_REG and save it to temp register */ -+ temp = sdramExtModeRegCalc(&bankInfo[0]); -+ if(-1 == temp) -+ { -+ mvOsPrintf("Dram: ERR. sdramModeRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG10, temp); -+ -+ /* calc D_UNIT_CONTROL_LOW and save it to temp register */ -+ temp = dunitCtrlLowRegCalc(&bankInfo[0], minCas); -+ if(-1 == temp) -+ { -+ mvOsPrintf("Dram: ERR. dunitCtrlLowRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG3, temp); -+ -+ /* calc SDRAM_ADDR_CTRL_REG and save it to temp register */ -+ temp = sdramAddrCtrlRegCalc(&bankInfo[0]); -+ if(-1 == temp) -+ { -+ mvOsPrintf("Dram: ERR. sdramAddrCtrlRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG4, temp); -+ -+ /* calc SDRAM_TIMING_CTRL_LOW_REG and save it to temp register */ -+ temp = sdramTimeCtrlLowRegCalc(&bankInfo[0], minCas, busClk); -+ if(-1 == temp) -+ { -+ mvOsPrintf("Dram: ERR. sdramTimeCtrlLowRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG5, temp); -+ -+ /* calc SDRAM_TIMING_CTRL_HIGH_REG and save it to temp register */ -+ temp = sdramTimeCtrlHighRegCalc(&bankInfo[0], busClk); -+ if(-1 == temp) -+ { -+ mvOsPrintf("Dram: ERR. sdramTimeCtrlHighRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG6, temp); -+ -+ /* Config DDR2 On Die Termination (ODT) registers */ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ sdramDDr2OdtConfig(bankInfo); -+ } -+ -+ /* Note that DDR SDRAM Address/Control and Data pad calibration */ -+ /* settings is done in mvSdramIfConfig.s */ -+ -+ return retVal; -+} -+ -+/******************************************************************************* -+* minCasCalc - Calculate the Minimum CAS latency which can be used. -+* -+* DESCRIPTION: -+* Calculate the minimum CAS latency that can be used, base on the DRAM -+* parameters and the SDRAM bus Clock freq. -+* -+* INPUT: -+* busClk - the DRAM bus Clock. -+* pBankInfo - bank info parameters. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* The minimum CAS Latency. The function returns 0 if max CAS latency -+* supported by banks is incompatible with system bus clock frequancy. -+* -+*******************************************************************************/ -+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk, -+ MV_U32 forcedCl) -+{ -+ MV_U32 count = 1, j; -+ MV_U32 busClkPs = 1000000000 / (busClk / 1000); /* in ps units */ -+ MV_U32 startBit, stopBit; -+ -+ /* DDR 1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 4 | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 * -+ *********************************************************/ -+ -+ /* DDR 2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | TBD | 5 | 4 | 3 | 2 | TBD | TBD * -+ *********************************************************/ -+ -+ -+ /* If we are asked to use the forced CAL */ -+ if (forcedCl) -+ { -+ mvOsPrintf("DRAM: Using forced CL %d.%d\n", (forcedCl / 10), -+ (forcedCl % 10)); -+ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ if (forcedCl == 30) -+ pBankInfo->suportedCasLatencies = 0x08; -+ else if (forcedCl == 40) -+ pBankInfo->suportedCasLatencies = 0x10; -+ else -+ { -+ mvOsPrintf("Forced CL %d.%d not supported. Set default CL 4\n", -+ (forcedCl / 10), (forcedCl % 10)); -+ pBankInfo->suportedCasLatencies = 0x10; -+ } -+ } -+ else -+ { -+ if (forcedCl == 15) -+ pBankInfo->suportedCasLatencies = 0x02; -+ else if (forcedCl == 20) -+ pBankInfo->suportedCasLatencies = 0x04; -+ else if (forcedCl == 25) -+ pBankInfo->suportedCasLatencies = 0x08; -+ else if (forcedCl == 30) -+ pBankInfo->suportedCasLatencies = 0x10; -+ else if (forcedCl == 40) -+ pBankInfo->suportedCasLatencies = 0x40; -+ else -+ { -+ mvOsPrintf("Forced CL %d.%d not supported. Set default CL 3\n", -+ (forcedCl / 10), (forcedCl % 10)); -+ pBankInfo->suportedCasLatencies = 0x10; -+ } -+ } -+ -+ return pBankInfo->suportedCasLatencies; -+ } -+ -+ /* go over the supported cas mask from Max Cas down and check if the */ -+ /* SysClk stands in its time requirments. */ -+ -+ -+ DB(mvOsPrintf("Dram: minCasCalc supported mask = %x busClkPs = %x \n", -+ pBankInfo->suportedCasLatencies,busClkPs )); -+ for(j = 7; j > 0; j--) -+ { -+ if((pBankInfo->suportedCasLatencies >> j) & BIT0 ) -+ { -+ /* Reset the bits for CL incompatible for the sysClk */ -+ switch (count) -+ { -+ case 1: -+ if (pBankInfo->minCycleTimeAtMaxCasLatPs > busClkPs) -+ pBankInfo->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ case 2: -+ if (pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps > busClkPs) -+ pBankInfo->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ case 3: -+ if (pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps > busClkPs) -+ pBankInfo->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ default: -+ pBankInfo->suportedCasLatencies &= ~(BIT0 << j); -+ break; -+ } -+ } -+ } -+ -+ DB(mvOsPrintf("Dram: minCasCalc support = %x (after SysCC calc)\n", -+ pBankInfo->suportedCasLatencies )); -+ -+ /* SDRAM DDR1 controller supports CL 1.5 to 3.5 */ -+ /* SDRAM DDR2 controller supports CL 3 to 5 */ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ startBit = 3; /* DDR2 support CL start with CL3 (bit 3) */ -+ stopBit = 5; /* DDR2 support CL stops with CL5 (bit 5) */ -+ } -+ else -+ { -+ startBit = 1; /* DDR1 support CL start with CL1.5 (bit 3) */ -+ stopBit = 4; /* DDR1 support CL stops with CL3 (bit 4) */ -+ } -+ -+ for(j = startBit; j <= stopBit ; j++) -+ { -+ if((pBankInfo->suportedCasLatencies >> j) & BIT0 ) -+ { -+ DB(mvOsPrintf("Dram: minCasCalc choose CAS %x \n",(BIT0 << j))); -+ return (BIT0 << j); -+ } -+ } -+ -+ return 0; -+} -+ -+/******************************************************************************* -+* sdramConfigRegCalc - Calculate sdram config register -+* -+* DESCRIPTION: Calculate sdram config register optimized value based -+* on the bank info parameters. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram config reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk) -+{ -+ MV_U32 sdramConfig = 0; -+ MV_U32 refreshPeriod; -+ -+ busClk /= 1000000; /* we work with busClk in MHz */ -+ -+ sdramConfig = MV_REG_READ(SDRAM_CONFIG_REG); -+ -+ /* figure out the memory refresh internal */ -+ switch (pBankInfo->refreshInterval & 0xf) -+ { -+ case 0x0: /* refresh period is 15.625 usec */ -+ refreshPeriod = 15625; -+ break; -+ case 0x1: /* refresh period is 3.9 usec */ -+ refreshPeriod = 3900; -+ break; -+ case 0x2: /* refresh period is 7.8 usec */ -+ refreshPeriod = 7800; -+ break; -+ case 0x3: /* refresh period is 31.3 usec */ -+ refreshPeriod = 31300; -+ break; -+ case 0x4: /* refresh period is 62.5 usec */ -+ refreshPeriod = 62500; -+ break; -+ case 0x5: /* refresh period is 125 usec */ -+ refreshPeriod = 125000; -+ break; -+ default: /* refresh period undefined */ -+ mvOsPrintf("Dram: ERR. DRAM refresh period is unknown!\n"); -+ return -1; -+ } -+ -+ /* Now the refreshPeriod is in register format value */ -+ refreshPeriod = (busClk * refreshPeriod) / 1000; -+ -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc calculated refresh interval %0x\n", -+ refreshPeriod)); -+ -+ /* make sure the refresh value is only 14 bits */ -+ if(refreshPeriod > SDRAM_REFRESH_MAX) -+ { -+ refreshPeriod = SDRAM_REFRESH_MAX; -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc adjusted refresh interval %0x\n", -+ refreshPeriod)); -+ } -+ -+ /* Clear the refresh field */ -+ sdramConfig &= ~SDRAM_REFRESH_MASK; -+ -+ /* Set new value to refresh field */ -+ sdramConfig |= (refreshPeriod & SDRAM_REFRESH_MASK); -+ -+ /* registered DRAM ? */ -+ if ( pBankInfo->registeredAddrAndControlInputs ) -+ { -+ /* it's registered DRAM, so set the reg. DRAM bit */ -+ sdramConfig |= SDRAM_REGISTERED; -+ mvOsPrintf("DRAM Attribute: Registered address and control inputs.\n"); -+ } -+ -+ /* set DDR SDRAM devices configuration */ -+ sdramConfig &= ~SDRAM_DCFG_MASK; /* Clear Dcfg field */ -+ -+ switch (pBankInfo->sdramWidth) -+ { -+ case 8: /* memory is x8 */ -+ sdramConfig |= SDRAM_DCFG_X8_DEV; -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc SDRAM device width x8\n")); -+ break; -+ case 16: -+ sdramConfig |= SDRAM_DCFG_X16_DEV; -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc SDRAM device width x16\n")); -+ break; -+ default: /* memory width unsupported */ -+ mvOsPrintf("Dram: ERR. DRAM chip width is unknown!\n"); -+ return -1; -+ } -+ -+ /* Set static default settings */ -+ sdramConfig |= SDRAM_CONFIG_DV; -+ -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc set sdramConfig to 0x%x\n", -+ sdramConfig)); -+ -+ return sdramConfig; -+} -+ -+/******************************************************************************* -+* sdramModeRegCalc - Calculate sdram mode register -+* -+* DESCRIPTION: Calculate sdram mode register optimized value based -+* on the bank info parameters and the minCas. -+* -+* INPUT: -+* minCas - minimum CAS supported. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram mode reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramModeRegCalc(MV_U32 minCas) -+{ -+ MV_U32 sdramMode; -+ -+ sdramMode = MV_REG_READ(SDRAM_MODE_REG); -+ -+ /* Clear CAS Latency field */ -+ sdramMode &= ~SDRAM_CL_MASK; -+ -+ mvOsPrintf("DRAM CAS Latency "); -+ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ switch (minCas) -+ { -+ case DDR2_CL_3: -+ sdramMode |= SDRAM_DDR2_CL_3; -+ mvOsPrintf("3.\n"); -+ break; -+ case DDR2_CL_4: -+ sdramMode |= SDRAM_DDR2_CL_4; -+ mvOsPrintf("4.\n"); -+ break; -+ case DDR2_CL_5: -+ sdramMode |= SDRAM_DDR2_CL_5; -+ mvOsPrintf("5.\n"); -+ break; -+ default: -+ mvOsPrintf("\nsdramModeRegCalc ERROR: Max. CL out of range\n"); -+ return -1; -+ } -+ sdramMode |= DDR2_MODE_REG_DV; -+ } -+ else /* DDR1 */ -+ { -+ switch (minCas) -+ { -+ case DDR1_CL_1_5: -+ sdramMode |= SDRAM_DDR1_CL_1_5; -+ mvOsPrintf("1.5\n"); -+ break; -+ case DDR1_CL_2: -+ sdramMode |= SDRAM_DDR1_CL_2; -+ mvOsPrintf("2\n"); -+ break; -+ case DDR1_CL_2_5: -+ sdramMode |= SDRAM_DDR1_CL_2_5; -+ mvOsPrintf("2.5\n"); -+ break; -+ case DDR1_CL_3: -+ sdramMode |= SDRAM_DDR1_CL_3; -+ mvOsPrintf("3\n"); -+ break; -+ case DDR1_CL_4: -+ sdramMode |= SDRAM_DDR1_CL_4; -+ mvOsPrintf("4\n"); -+ break; -+ default: -+ mvOsPrintf("\nsdramModeRegCalc ERROR: Max. CL out of range\n"); -+ return -1; -+ } -+ sdramMode |= DDR1_MODE_REG_DV; -+ } -+ -+ DB(mvOsPrintf("nsdramModeRegCalc register 0x%x\n", sdramMode )); -+ -+ return sdramMode; -+} -+ -+/******************************************************************************* -+* sdramExtModeRegCalc - Calculate sdram Extended mode register -+* -+* DESCRIPTION: -+* Return sdram Extended mode register value based -+* on the bank info parameters and bank presence. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram Extended mode reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo) -+{ -+ MV_U32 populateBanks = 0; -+ int bankNum; -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ /* Represent the populate banks in binary form */ -+ for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ if (0 != pBankInfo[bankNum].size) -+ { -+ populateBanks |= (1 << bankNum); -+ } -+ } -+ -+ switch(populateBanks) -+ { -+ case(BANK_PRESENT_CS0): -+ return DDR_SDRAM_EXT_MODE_CS0_DV; -+ -+ case(BANK_PRESENT_CS0_CS1): -+ return DDR_SDRAM_EXT_MODE_CS0_DV; -+ -+ case(BANK_PRESENT_CS0_CS2): -+ return DDR_SDRAM_EXT_MODE_CS0_CS2_DV; -+ -+ case(BANK_PRESENT_CS0_CS1_CS2): -+ return DDR_SDRAM_EXT_MODE_CS0_CS2_DV; -+ -+ case(BANK_PRESENT_CS0_CS2_CS3): -+ return DDR_SDRAM_EXT_MODE_CS0_CS2_DV; -+ -+ case(BANK_PRESENT_CS0_CS2_CS3_CS4): -+ return DDR_SDRAM_EXT_MODE_CS0_CS2_DV; -+ -+ default: -+ mvOsPrintf("sdramExtModeRegCalc: Invalid DRAM bank presence\n"); -+ return -1; -+ } -+ } -+ return 0; -+} -+ -+/******************************************************************************* -+* dunitCtrlLowRegCalc - Calculate sdram dunit control low register -+* -+* DESCRIPTION: Calculate sdram dunit control low register optimized value based -+* on the bank info parameters and the minCas. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* minCas - minimum CAS supported. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram dunit control low reg value. -+* -+*******************************************************************************/ -+static MV_U32 dunitCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas) -+{ -+ MV_U32 dunitCtrlLow; -+ -+ dunitCtrlLow = MV_REG_READ(SDRAM_DUNIT_CTRL_REG); -+ -+ /* Clear StBurstDel field */ -+ dunitCtrlLow &= ~SDRAM_ST_BURST_DEL_MASK; -+ -+#ifdef MV_88W8660 -+ /* Clear address/control output timing field */ -+ dunitCtrlLow &= ~SDRAM_CTRL_POS_RISE; -+#endif /* MV_88W8660 */ -+ -+ DB(mvOsPrintf("Dram: dunitCtrlLowRegCalc\n")); -+ -+ /* For proper sample of read data set the Dunit Control register's */ -+ /* stBurstDel bits [27:24] */ -+ /********-********-********-********-********-********* -+ * CL=1.5 | CL=2 | CL=2.5 | CL=3 | CL=4 | CL=5 * -+ *********-********-********-********-********-********* -+Not Reg. * 0011 | 0011 | 0100 | 0100 | 0101 | TBD * -+ *********-********-********-********-********-********* -+Registered * 0100 | 0100 | 0101 | 0101 | 0110 | TBD * -+ *********-********-********-********-********-*********/ -+ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ switch (minCas) -+ { -+ case DDR2_CL_3: -+ /* registerd DDR SDRAM? */ -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS; -+ else -+ dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS; -+ break; -+ case DDR2_CL_4: -+ /* registerd DDR SDRAM? */ -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ dunitCtrlLow |= 0x6 << SDRAM_ST_BURST_DEL_OFFS; -+ else -+ dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS; -+ break; -+ default: -+ mvOsPrintf("Dram: dunitCtrlLowRegCalc Max. CL out of range %d\n", -+ minCas); -+ return -1; -+ } -+ } -+ else /* DDR1 */ -+ { -+ switch (minCas) -+ { -+ case DDR1_CL_1_5: -+ /* registerd DDR SDRAM? */ -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS; -+ else -+ dunitCtrlLow |= 0x3 << SDRAM_ST_BURST_DEL_OFFS; -+ break; -+ case DDR1_CL_2: -+ /* registerd DDR SDRAM? */ -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS; -+ else -+ dunitCtrlLow |= 0x3 << SDRAM_ST_BURST_DEL_OFFS; -+ break; -+ case DDR1_CL_2_5: -+ /* registerd DDR SDRAM? */ -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS; -+ else -+ dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS; -+ break; -+ case DDR1_CL_3: -+ /* registerd DDR SDRAM? */ -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS; -+ else -+ dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS; -+ break; -+ case DDR1_CL_4: -+ /* registerd DDR SDRAM? */ -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ dunitCtrlLow |= 0x6 << SDRAM_ST_BURST_DEL_OFFS; -+ else -+ dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS; -+ break; -+ default: -+ mvOsPrintf("Dram: dunitCtrlLowRegCalc Max. CL out of range %d\n", -+ minCas); -+ return -1; -+ } -+ -+ } -+ DB(mvOsPrintf("Dram: Reg dunit control low = %x\n", dunitCtrlLow )); -+ -+ return dunitCtrlLow; -+} -+ -+/******************************************************************************* -+* sdramAddrCtrlRegCalc - Calculate sdram address control register -+* -+* DESCRIPTION: Calculate sdram address control register optimized value based -+* on the bank info parameters and the minCas. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram address control reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramAddrCtrlRegCalc(MV_DRAM_BANK_INFO *pBankInfo) -+{ -+ MV_U32 addrCtrl = 0; -+ -+ /* Set Address Control register static configuration bits */ -+ addrCtrl = MV_REG_READ(SDRAM_ADDR_CTRL_REG); -+ -+ /* Set address control default value */ -+ addrCtrl |= SDRAM_ADDR_CTRL_DV; -+ -+ /* Clear DSize field */ -+ addrCtrl &= ~SDRAM_DSIZE_MASK; -+ -+ /* Note that density is in MB units */ -+ switch (pBankInfo->deviceDensity) -+ { -+ case 128: /* 128 Mbit */ -+ DB(mvOsPrintf("DRAM Device Density 128Mbit\n")); -+ addrCtrl |= SDRAM_DSIZE_128Mb; -+ break; -+ case 256: /* 256 Mbit */ -+ DB(mvOsPrintf("DRAM Device Density 256Mbit\n")); -+ addrCtrl |= SDRAM_DSIZE_256Mb; -+ break; -+ case 512: /* 512 Mbit */ -+ DB(mvOsPrintf("DRAM Device Density 512Mbit\n")); -+ addrCtrl |= SDRAM_DSIZE_512Mb; -+ break; -+ default: -+ mvOsPrintf("Dram: sdramAddrCtrl unsupported RAM-Device size %d\n", -+ pBankInfo->deviceDensity); -+ return -1; -+ } -+ -+ /* SDRAM address control */ -+ DB(mvOsPrintf("Dram: setting sdram address control with: %x \n", addrCtrl)); -+ -+ return addrCtrl; -+} -+ -+/******************************************************************************* -+* sdramTimeCtrlLowRegCalc - Calculate sdram timing control low register -+* -+* DESCRIPTION: -+* This function calculates sdram timing control low register -+* optimized value based on the bank info parameters and the minCas. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* busClk - Bus clock -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram timinf control low reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramTimeCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, -+ MV_U32 minCas, MV_U32 busClk) -+{ -+ MV_U32 tRp = 0; -+ MV_U32 tRrd = 0; -+ MV_U32 tRcd = 0; -+ MV_U32 tRas = 0; -+ MV_U32 tWr = 0; -+ MV_U32 tWtr = 0; -+ MV_U32 tRtp = 0; -+ -+ MV_U32 bankNum; -+ -+ busClk = busClk / 1000000; /* In MHz */ -+ -+ /* Scan all DRAM banks to find maximum timing values */ -+ for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ tRp = MV_MAX(tRp, pBankInfo[bankNum].minRowPrechargeTime); -+ tRrd = MV_MAX(tRrd, pBankInfo[bankNum].minRowActiveToRowActive); -+ tRcd = MV_MAX(tRcd, pBankInfo[bankNum].minRasToCasDelay); -+ tRas = MV_MAX(tRas, pBankInfo[bankNum].minRasPulseWidth); -+ } -+ -+ /* Extract timing (in ns) from SPD value. We ignore the tenth ns part. */ -+ /* by shifting the data two bits right. */ -+ tRp = tRp >> 2; /* For example 0x50 -> 20ns */ -+ tRrd = tRrd >> 2; -+ tRcd = tRcd >> 2; -+ -+ /* Extract clock cycles from time parameter. We need to round up */ -+ tRp = ((busClk * tRp) / 1000) + (((busClk * tRp) % 1000) ? 1 : 0); -+ /* Micron work around for 133MHz */ -+ if (busClk == 133) -+ tRp += 1; -+ DB(mvOsPrintf("Dram Timing Low: tRp = %d ", tRp)); -+ tRrd = ((busClk * tRrd) / 1000) + (((busClk * tRrd) % 1000) ? 1 : 0); -+ /* JEDEC min reqeirments tRrd = 2 */ -+ if (tRrd < 2) -+ tRrd = 2; -+ DB(mvOsPrintf("tRrd = %d ", tRrd)); -+ tRcd = ((busClk * tRcd) / 1000) + (((busClk * tRcd) % 1000) ? 1 : 0); -+ DB(mvOsPrintf("tRcd = %d ", tRcd)); -+ tRas = ((busClk * tRas) / 1000) + (((busClk * tRas) % 1000) ? 1 : 0); -+ DB(mvOsPrintf("tRas = %d ", tRas)); -+ -+ /* tWr and tWtr is different for DDR1 and DDR2. tRtp is only for DDR2 */ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ /* Scan all DRAM banks to find maximum timing values */ -+ for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ tWr = MV_MAX(tWr, pBankInfo[bankNum].minWriteRecoveryTime); -+ tWtr = MV_MAX(tWtr, pBankInfo[bankNum].minWriteToReadCmdDelay); -+ tRtp = MV_MAX(tRtp, pBankInfo[bankNum].minReadToPrechCmdDelay); -+ } -+ -+ /* Extract timing (in ns) from SPD value. We ignore the tenth ns */ -+ /* part by shifting the data two bits right. */ -+ tWr = tWr >> 2; /* For example 0x50 -> 20ns */ -+ tWtr = tWtr >> 2; -+ tRtp = tRtp >> 2; -+ -+ /* Extract clock cycles from time parameter. We need to round up */ -+ tWr = ((busClk * tWr) / 1000) + (((busClk * tWr) % 1000) ? 1 : 0); -+ DB(mvOsPrintf("tWr = %d ", tWr)); -+ tWtr = ((busClk * tWtr) / 1000) + (((busClk * tWtr) % 1000) ? 1 : 0); -+ /* JEDEC min reqeirments tWtr = 2 */ -+ if (tWtr < 2) -+ tWtr = 2; -+ DB(mvOsPrintf("tWtr = %d ", tWtr)); -+ tRtp = ((busClk * tRtp) / 1000) + (((busClk * tRtp) % 1000) ? 1 : 0); -+ /* JEDEC min reqeirments tRtp = 2 */ -+ if (tRtp < 2) -+ tRtp = 2; -+ DB(mvOsPrintf("tRtp = %d ", tRtp)); -+ } -+ else -+ { -+ tWr = ((busClk*SDRAM_TWR) / 1000) + (((busClk*SDRAM_TWR) % 1000)?1:0); -+ -+ if ((200 == busClk) || ((100 == busClk) && (DDR1_CL_1_5 == minCas))) -+ { -+ tWtr = 2; -+ } -+ else -+ { -+ tWtr = 1; -+ } -+ -+ tRtp = 2; /* Must be set to 0x1 (two cycles) when using DDR1 */ -+ } -+ -+ DB(mvOsPrintf("tWtr = %d\n", tWtr)); -+ -+ /* Note: value of 0 in register means one cycle, 1 means two and so on */ -+ return (((tRp - 1) << SDRAM_TRP_OFFS) | -+ ((tRrd - 1) << SDRAM_TRRD_OFFS) | -+ ((tRcd - 1) << SDRAM_TRCD_OFFS) | -+ ((tRas - 1) << SDRAM_TRAS_OFFS) | -+ ((tWr - 1) << SDRAM_TWR_OFFS) | -+ ((tWtr - 1) << SDRAM_TWTR_OFFS) | -+ ((tRtp - 1) << SDRAM_TRTP_OFFS)); -+} -+ -+/******************************************************************************* -+* sdramTimeCtrlHighRegCalc - Calculate sdram timing control high register -+* -+* DESCRIPTION: -+* This function calculates sdram timing control high register -+* optimized value based on the bank info parameters and the bus clock. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* busClk - Bus clock -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram timinf control high reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramTimeCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, -+ MV_U32 busClk) -+{ -+ MV_U32 tRfc; -+ MV_U32 timeNs = 0; -+ int bankNum; -+ MV_U32 sdramTw2wCyc = 0; -+ -+ busClk = busClk / 1000000; /* In MHz */ -+ -+ /* tRfc is different for DDR1 and DDR2. */ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2) -+ { -+ MV_U32 bankNum; -+ -+ /* Scan all DRAM banks to find maximum timing values */ -+ for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ timeNs = MV_MAX(timeNs, pBankInfo[bankNum].minRefreshToActiveCmd); -+ } -+ else -+ { -+ if (pBankInfo[0].deviceDensity == _1G) -+ { -+ timeNs = SDRAM_TRFC_1G; -+ } -+ else -+ { -+ if (200 == busClk) -+ { -+ timeNs = SDRAM_TRFC_64_512M_AT_200MHZ; -+ } -+ else -+ { -+ timeNs = SDRAM_TRFC_64_512M; -+ } -+ } -+ } -+ -+ tRfc = ((busClk * timeNs) / 1000) + (((busClk * timeNs) % 1000) ? 1 : 0); -+ -+ DB(mvOsPrintf("Dram Timing High: tRfc = %d\n", tRfc)); -+ -+ -+ /* Represent the populate banks in binary form */ -+ for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ if (0 != pBankInfo[bankNum].size) -+ sdramTw2wCyc++; -+ } -+ -+ /* If we have more the 1 bank then we need the TW2W in 1 for ODT switch */ -+ if (sdramTw2wCyc > 1) -+ sdramTw2wCyc = 1; -+ else -+ sdramTw2wCyc = 0; -+ -+ /* Note: value of 0 in register means one cycle, 1 means two and so on */ -+ return ((((tRfc - 1) & SDRAM_TRFC_MASK) << SDRAM_TRFC_OFFS) | -+ ((SDRAM_TR2R_CYC - 1) << SDRAM_TR2R_OFFS) | -+ ((SDRAM_TR2WW2R_CYC - 1) << SDRAM_TR2W_W2R_OFFS) | -+ (((tRfc - 1) >> 4) << SDRAM_TRFC_EXT_OFFS) | -+ (sdramTw2wCyc << SDRAM_TW2W_OFFS)); -+ -+} -+ -+/******************************************************************************* -+* sdramDDr2OdtConfig - Set DRAM DDR2 On Die Termination registers. -+* -+* DESCRIPTION: -+* This function config DDR2 On Die Termination (ODT) registers. -+* ODT configuration is done according to DIMM presence: -+* -+* Presence Ctrl Low Ctrl High Dunit Ctrl Ext Mode -+* CS0 0x84210000 0x00000000 0x0000780F 0x00000440 -+* CS0+CS1 0x84210000 0x00000000 0x0000780F 0x00000440 -+* CS0+CS2 0x030C030C 0x00000000 0x0000740F 0x00000404 -+* CS0+CS1+CS2 0x030C030C 0x00000000 0x0000740F 0x00000404 -+* CS0+CS2+CS3 0x030C030C 0x00000000 0x0000740F 0x00000404 -+* CS0+CS1+CS2+CS3 0x030C030C 0x00000000 0x0000740F 0x00000404 -+* -+* INPUT: -+* pBankInfo - bank info parameters. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* None -+*******************************************************************************/ -+static void sdramDDr2OdtConfig(MV_DRAM_BANK_INFO *pBankInfo) -+{ -+ MV_U32 populateBanks = 0; -+ MV_U32 odtCtrlLow, odtCtrlHigh, dunitOdtCtrl; -+ int bankNum; -+ -+ /* Represent the populate banks in binary form */ -+ for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ if (0 != pBankInfo[bankNum].size) -+ { -+ populateBanks |= (1 << bankNum); -+ } -+ } -+ -+ switch(populateBanks) -+ { -+ case(BANK_PRESENT_CS0): -+ odtCtrlLow = DDR2_ODT_CTRL_LOW_CS0_DV; -+ odtCtrlHigh = DDR2_ODT_CTRL_HIGH_CS0_DV; -+ dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_DV; -+ break; -+ case(BANK_PRESENT_CS0_CS1): -+ odtCtrlLow = DDR2_ODT_CTRL_LOW_CS0_DV; -+ odtCtrlHigh = DDR2_ODT_CTRL_HIGH_CS0_DV; -+ dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_DV; -+ break; -+ case(BANK_PRESENT_CS0_CS2): -+ odtCtrlLow = DDR2_ODT_CTRL_LOW_CS0_CS2_DV; -+ odtCtrlHigh = DDR2_ODT_CTRL_HIGH_CS0_CS2_DV; -+ dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV; -+ break; -+ case(BANK_PRESENT_CS0_CS1_CS2): -+ odtCtrlLow = DDR2_ODT_CTRL_LOW_CS0_CS2_DV; -+ odtCtrlHigh = DDR2_ODT_CTRL_HIGH_CS0_CS2_DV; -+ dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV; -+ break; -+ case(BANK_PRESENT_CS0_CS2_CS3): -+ odtCtrlLow = DDR2_ODT_CTRL_LOW_CS0_CS2_DV; -+ odtCtrlHigh = DDR2_ODT_CTRL_HIGH_CS0_CS2_DV; -+ dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV; -+ break; -+ case(BANK_PRESENT_CS0_CS2_CS3_CS4): -+ odtCtrlLow = DDR2_ODT_CTRL_LOW_CS0_CS2_DV; -+ odtCtrlHigh = DDR2_ODT_CTRL_HIGH_CS0_CS2_DV; -+ dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV; -+ break; -+ default: -+ mvOsPrintf("sdramDDr2OdtConfig: Invalid DRAM bank presence\n"); -+ return; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG7, odtCtrlLow); -+ MV_REG_WRITE(DRAM_BUF_REG8, odtCtrlHigh); -+ MV_REG_WRITE(DRAM_BUF_REG9, dunitOdtCtrl); -+ return; -+} -+#endif /* defined(MV_INC_BOARD_DDIM) */ -+ -+/******************************************************************************* -+* mvDramIfWinSet - Set DRAM interface address decode window -+* -+* DESCRIPTION: -+* This function sets DRAM interface address decode window. -+* -+* INPUT: -+* target - System target. Use only SDRAM targets. -+* pAddrDecWin - SDRAM address window structure. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK -+* otherwise. -+*******************************************************************************/ -+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin) -+{ -+ MV_U32 baseReg=0,sizeReg=0; -+ MV_U32 baseToReg=0 , sizeToReg=0; -+ -+ /* Check parameters */ -+ if (!MV_TARGET_IS_DRAM(target)) -+ { -+ mvOsPrintf("mvDramIfWinSet: target %d is not SDRAM\n", target); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the requested window overlaps with current enabled windows */ -+ if (MV_TRUE == sdramIfWinOverlap(target, &pAddrDecWin->addrWin)) -+ { -+ mvOsPrintf("mvDramIfWinSet: ERR. Target %d overlaps\n", target); -+ return MV_BAD_PARAM; -+ } -+ -+ /* check if address is aligned to the size */ -+ if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) -+ { -+ mvOsPrintf("mvDramIfWinSet:Error setting DRAM interface window %d."\ -+ "\nAddress 0x%08x is unaligned to size 0x%x.\n", -+ target, -+ pAddrDecWin->addrWin.baseLow, -+ pAddrDecWin->addrWin.size); -+ return MV_ERROR; -+ } -+ -+ /* read base register*/ -+ baseReg = MV_REG_READ(SDRAM_BASE_ADDR_REG(target)); -+ -+ /* read size register */ -+ sizeReg = MV_REG_READ(SDRAM_SIZE_REG(target)); -+ -+ /* BaseLow[31:16] => base register [31:16] */ -+ baseToReg = pAddrDecWin->addrWin.baseLow & SCBAR_BASE_MASK; -+ -+ /* Write to address decode Base Address Register */ -+ baseReg &= ~SCBAR_BASE_MASK; -+ baseReg |= baseToReg; -+ -+ /* Translate the given window size to register format */ -+ sizeToReg = ctrlSizeToReg(pAddrDecWin->addrWin.size, SCSR_SIZE_ALIGNMENT); -+ -+ /* Size parameter validity check. */ -+ if (-1 == sizeToReg) -+ { -+ mvOsPrintf("mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n",target); -+ return MV_BAD_PARAM; -+ } -+ -+ /* set size */ -+ sizeReg &= ~SCSR_SIZE_MASK; -+ /* Size is located at upper 16 bits */ -+ sizeReg |= (sizeToReg << SCSR_SIZE_OFFS); -+ -+ /* enable/Disable */ -+ if (MV_TRUE == pAddrDecWin->enable) -+ { -+ sizeReg |= SCSR_WIN_EN; -+ } -+ else -+ { -+ sizeReg &= ~SCSR_WIN_EN; -+ } -+ -+ /* 3) Write to address decode Base Address Register */ -+ MV_REG_WRITE(SDRAM_BASE_ADDR_REG(target), baseReg); -+ -+ /* Write to address decode Size Register */ -+ MV_REG_WRITE(SDRAM_SIZE_REG(target), sizeReg); -+ -+ return MV_OK; -+} -+/******************************************************************************* -+* mvDramIfWinGet - Get DRAM interface address decode window -+* -+* DESCRIPTION: -+* This function gets DRAM interface address decode window. -+* -+* INPUT: -+* target - System target. Use only SDRAM targets. -+* -+* OUTPUT: -+* pAddrDecWin - SDRAM address window structure. -+* -+* RETURN: -+* MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK -+* otherwise. -+*******************************************************************************/ -+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin) -+{ -+ MV_U32 baseReg,sizeReg; -+ MV_U32 sizeRegVal; -+ -+ /* Check parameters */ -+ if (!MV_TARGET_IS_DRAM(target)) -+ { -+ mvOsPrintf("mvDramIfWinGet: target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ /* Read base and size registers */ -+ sizeReg = MV_REG_READ(SDRAM_SIZE_REG(target)); -+ baseReg = MV_REG_READ(SDRAM_BASE_ADDR_REG(target)); -+ -+ sizeRegVal = (sizeReg & SCSR_SIZE_MASK) >> SCSR_SIZE_OFFS; -+ -+ pAddrDecWin->addrWin.size = ctrlRegToSize(sizeRegVal, -+ SCSR_SIZE_ALIGNMENT); -+ -+ /* Check if ctrlRegToSize returned OK */ -+ if (-1 == pAddrDecWin->addrWin.size) -+ { -+ mvOsPrintf("mvDramIfWinGet: size of target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ /* Extract base address */ -+ /* Base register [31:16] ==> baseLow[31:16] */ -+ pAddrDecWin->addrWin.baseLow = baseReg & SCBAR_BASE_MASK; -+ -+ pAddrDecWin->addrWin.baseHigh = 0; -+ -+ -+ if (sizeReg & SCSR_WIN_EN) -+ { -+ pAddrDecWin->enable = MV_TRUE; -+ } -+ else -+ { -+ pAddrDecWin->enable = MV_FALSE; -+ } -+ -+ return MV_OK; -+} -+/******************************************************************************* -+* mvDramIfWinEnable - Enable/Disable SDRAM address decode window -+* -+* DESCRIPTION: -+* This function enable/Disable SDRAM address decode window. -+* -+* INPUT: -+* target - System target. Use only SDRAM targets. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_ERROR in case function parameter are invalid, MV_OK otherewise. -+* -+*******************************************************************************/ -+MV_STATUS mvDramIfWinEnable(MV_TARGET target,MV_BOOL enable) -+{ -+ MV_DRAM_DEC_WIN addrDecWin; -+ -+ /* Check parameters */ -+ if (!MV_TARGET_IS_DRAM(target)) -+ { -+ mvOsPrintf("mvDramIfWinEnable: target %d is Illigal\n", target); -+ return MV_ERROR; -+ } -+ -+ if (enable == MV_TRUE) -+ { /* First check for overlap with other enabled windows */ -+ if (MV_OK != mvDramIfWinGet(target, &addrDecWin)) -+ { -+ mvOsPrintf("mvDramIfWinEnable:ERR. Getting target %d failed.\n", -+ target); -+ return MV_ERROR; -+ } -+ /* Check for overlapping */ -+ if (MV_FALSE == sdramIfWinOverlap(target, &(addrDecWin.addrWin))) -+ { -+ /* No Overlap. Enable address decode winNum window */ -+ MV_REG_BIT_SET(SDRAM_SIZE_REG(target), SCSR_WIN_EN); -+ } -+ else -+ { /* Overlap detected */ -+ mvOsPrintf("mvDramIfWinEnable: ERR. Target %d overlap detect\n", -+ target); -+ return MV_ERROR; -+ } -+ } -+ else -+ { /* Disable address decode winNum window */ -+ MV_REG_BIT_RESET(SDRAM_SIZE_REG(target), SCSR_WIN_EN); -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* sdramIfWinOverlap - Check if an address window overlap an SDRAM address window -+* -+* DESCRIPTION: -+* This function scan each SDRAM address decode window to test if it -+* overlapps the given address windoow -+* -+* INPUT: -+* target - SDRAM target where the function skips checking. -+* pAddrDecWin - The tested address window for overlapping with -+* SDRAM windows. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if the given address window overlaps any enabled address -+* decode map, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin) -+{ -+ MV_TARGET targetNum; -+ MV_DRAM_DEC_WIN addrDecWin; -+ -+ for(targetNum = SDRAM_CS0; targetNum < MV_DRAM_MAX_CS ; targetNum++) -+ { -+ /* don't check our winNum or illegal targets */ -+ if (targetNum == target) -+ { -+ continue; -+ } -+ -+ /* Get window parameters */ -+ if (MV_OK != mvDramIfWinGet(targetNum, &addrDecWin)) -+ { -+ mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n"); -+ return MV_ERROR; -+ } -+ -+ /* Do not check disabled windows */ -+ if (MV_FALSE == addrDecWin.enable) -+ { -+ continue; -+ } -+ -+ if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin)) -+ { -+ mvOsPrintf( -+ "sdramIfWinOverlap: Required target %d overlap winNum %d\n", -+ target, targetNum); -+ return MV_TRUE; -+ } -+ } -+ -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* mvDramIfBankSizeGet - Get DRAM interface bank size. -+* -+* DESCRIPTION: -+* This function returns the size of a given DRAM bank. -+* -+* INPUT: -+* bankNum - Bank number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* DRAM bank size. If bank is disabled the function return '0'. In case -+* or paramter is invalid, the function returns -1. -+* -+*******************************************************************************/ -+MV_32 mvDramIfBankSizeGet(MV_U32 bankNum) -+{ -+ MV_DRAM_DEC_WIN addrDecWin; -+ -+ /* Check parameters */ -+ if (!MV_TARGET_IS_DRAM(bankNum)) -+ { -+ mvOsPrintf("mvDramIfBankBaseGet: bankNum %d is invalid\n", bankNum); -+ return -1; -+ } -+ /* Get window parameters */ -+ if (MV_OK != mvDramIfWinGet(bankNum, &addrDecWin)) -+ { -+ mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n"); -+ return -1; -+ } -+ -+ if (MV_TRUE == addrDecWin.enable) -+ { -+ return addrDecWin.addrWin.size; -+ } -+ else -+ { -+ return 0; -+ } -+} -+ -+ -+/******************************************************************************* -+* mvDramIfSizeGet - Get DRAM interface total size. -+* -+* DESCRIPTION: -+* This function get the DRAM total size. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* DRAM total size. In case or paramter is invalid, the function -+* returns -1. -+* -+*******************************************************************************/ -+MV_32 mvDramIfSizeGet(MV_VOID) -+{ -+ MV_U32 totalSize = 0, bankSize = 0, bankNum; -+ -+ for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ bankSize = mvDramIfBankSizeGet(bankNum); -+ -+ if (-1 == bankSize) -+ { -+ mvOsPrintf("Dram: mvDramIfSizeGet error with bank %d \n",bankNum); -+ return -1; -+ } -+ else -+ { -+ totalSize += bankSize; -+ } -+ } -+ -+ DB(mvOsPrintf("Dram: Total DRAM size is 0x%x \n",totalSize)); -+ -+ return totalSize; -+} -+ -+/******************************************************************************* -+* mvDramIfBankBaseGet - Get DRAM interface bank base. -+* -+* DESCRIPTION: -+* This function returns the 32 bit base address of a given DRAM bank. -+* -+* INPUT: -+* bankNum - Bank number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* DRAM bank size. If bank is disabled or paramter is invalid, the -+* function returns -1. -+* -+*******************************************************************************/ -+MV_32 mvDramIfBankBaseGet(MV_U32 bankNum) -+{ -+ MV_DRAM_DEC_WIN addrDecWin; -+ -+ /* Check parameters */ -+ if (!MV_TARGET_IS_DRAM(bankNum)) -+ { -+ mvOsPrintf("mvDramIfBankBaseGet: bankNum %d is invalid\n", bankNum); -+ return -1; -+ } -+ /* Get window parameters */ -+ if (MV_OK != mvDramIfWinGet(bankNum, &addrDecWin)) -+ { -+ mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n"); -+ return -1; -+ } -+ -+ if (MV_TRUE == addrDecWin.enable) -+ { -+ return addrDecWin.addrWin.baseLow; -+ } -+ else -+ { -+ return -1; -+ } -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.h -new file mode 100644 -index 0000000..8ae67e7 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIf.h -@@ -0,0 +1,179 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvDramIfh -+#define __INCmvDramIfh -+ -+/* includes */ -+#include "ddr1_2/mvDramIfRegs.h" -+#include "ddr1_2/mvDramIfConfig.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+ -+/* defines */ -+/* DRAM Timing parameters */ -+#define SDRAM_TWR 15 /* ns tWr */ -+#define SDRAM_TRFC_64_512M_AT_200MHZ 70 /* ns tRfc for dens 64-512 @ 200MHz */ -+#define SDRAM_TRFC_64_512M 75 /* ns tRfc for dens 64-512 */ -+#define SDRAM_TRFC_1G 120 /* ns tRfc for dens 1GB */ -+#define SDRAM_TR2R_CYC 1 /* cycle for tR2r */ -+#define SDRAM_TR2WW2R_CYC 1 /* cycle for tR2wW2r */ -+ -+/* typedefs */ -+ -+/* enumeration for memory types */ -+typedef enum _mvMemoryType -+{ -+ MEM_TYPE_SDRAM, -+ MEM_TYPE_DDR1, -+ MEM_TYPE_DDR2 -+}MV_MEMORY_TYPE; -+ -+/* enumeration for DDR1 supported CAS Latencies */ -+typedef enum _mvDimmDdr1Cas -+{ -+ DDR1_CL_1_5 = 0x02, -+ DDR1_CL_2 = 0x04, -+ DDR1_CL_2_5 = 0x08, -+ DDR1_CL_3 = 0x10, -+ DDR1_CL_4 = 0x40, -+ DDR1_CL_FAULT -+} MV_DIMM_DDR1_CAS; -+ -+/* enumeration for DDR2 supported CAS Latencies */ -+typedef enum _mvDimmDdr2Cas -+{ -+ DDR2_CL_3 = 0x08, -+ DDR2_CL_4 = 0x10, -+ DDR2_CL_5 = 0x20, -+ DDR2_CL_FAULT -+} MV_DIMM_DDR2_CAS; -+ -+ -+typedef struct _mvDramBankInfo -+{ -+ MV_MEMORY_TYPE memoryType; /* DDR1, DDR2 or SDRAM */ -+ -+ /* DIMM dimensions */ -+ MV_U32 numOfRowAddr; -+ MV_U32 numOfColAddr; -+ MV_U32 dataWidth; -+ MV_U32 errorCheckType; /* ECC , PARITY..*/ -+ MV_U32 sdramWidth; /* 4,8,16 or 32 */ -+ MV_U32 errorCheckDataWidth; /* 0 - no, 1 - Yes */ -+ MV_U32 burstLengthSupported; -+ MV_U32 numOfBanksOnEachDevice; -+ MV_U32 suportedCasLatencies; -+ MV_U32 refreshInterval; -+ -+ /* DIMM timing parameters */ -+ MV_U32 minCycleTimeAtMaxCasLatPs; -+ MV_U32 minCycleTimeAtMaxCasLatMinus1Ps; -+ MV_U32 minCycleTimeAtMaxCasLatMinus2Ps; -+ MV_U32 minRowPrechargeTime; -+ MV_U32 minRowActiveToRowActive; -+ MV_U32 minRasToCasDelay; -+ MV_U32 minRasPulseWidth; -+ MV_U32 minWriteRecoveryTime; /* DDR2 only */ -+ MV_U32 minWriteToReadCmdDelay; /* DDR2 only */ -+ MV_U32 minReadToPrechCmdDelay; /* DDR2 only */ -+ MV_U32 minRefreshToActiveCmd; /* DDR2 only */ -+ -+ /* Parameters calculated from the extracted DIMM information */ -+ MV_U32 size; -+ MV_U32 deviceDensity; /* 16,64,128,256 or 512 Mbit */ -+ MV_U32 numberOfDevices; -+ -+ /* DIMM attributes (MV_TRUE for yes) */ -+ MV_BOOL registeredAddrAndControlInputs; -+ -+}MV_DRAM_BANK_INFO; -+ -+/* This structure describes CPU interface address decode window */ -+typedef struct _mvDramIfDecWin -+{ -+ MV_ADDR_WIN addrWin; /* An address window*/ -+ MV_BOOL enable; /* Address decode window is enabled/disabled */ -+}MV_DRAM_DEC_WIN; -+ -+#include "ddr1_2/mvDram.h" -+ -+/* mvDramIf.h API list */ -+MV_VOID mvDramIfBasicAsmInit(MV_VOID); -+MV_STATUS mvDramIfDetect(MV_U32 forcedCl); -+MV_VOID _mvDramIfConfig(MV_VOID); -+ -+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin); -+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin); -+MV_STATUS mvDramIfWinEnable(MV_TARGET target,MV_BOOL enable); -+MV_32 mvDramIfBankSizeGet(MV_U32 bankNum); -+MV_32 mvDramIfBankBaseGet(MV_U32 bankNum); -+MV_32 mvDramIfSizeGet(MV_VOID); -+ -+#if 0 -+MV_STATUS mvDramIfMbusCtrlSet(MV_XBAR_TARGET *pPizzaArbArray); -+MV_STATUS mvDramIfMbusToutSet(MV_U32 timeout, MV_BOOL enable); -+#endif -+ -+#endif /* __INCmvDramIfh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfConfig.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfConfig.h -new file mode 100644 -index 0000000..049595e ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfConfig.h -@@ -0,0 +1,192 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvDramIfConfigh -+#define __INCmvDramIfConfigh -+ -+/* includes */ -+ -+/* defines */ -+ -+/* registers defaults values */ -+ -+#define SDRAM_CONFIG_DV \ -+ (SDRAM_PERR_WRITE | \ -+ SDRAM_SRMODE | \ -+ SDRAM_SRCLK_GATED) -+ -+#define SDRAM_DUNIT_CTRL_LOW_DV \ -+ (SDRAM_CTRL_POS_RISE | \ -+ SDRAM_CLK1DRV_NORMAL | \ -+ SDRAM_LOCKEN_ENABLE) -+ -+#define SDRAM_ADDR_CTRL_DV 0 -+ -+#define SDRAM_TIMING_CTRL_LOW_REG_DV \ -+ ((0x2 << SDRAM_TRCD_OFFS) | \ -+ (0x2 << SDRAM_TRP_OFFS) | \ -+ (0x1 << SDRAM_TWR_OFFS) | \ -+ (0x0 << SDRAM_TWTR_OFFS) | \ -+ (0x5 << SDRAM_TRAS_OFFS) | \ -+ (0x1 << SDRAM_TRRD_OFFS)) -+/* TRFC 0x27, TW2W 0x1 */ -+#define SDRAM_TIMING_CTRL_HIGH_REG_DV (( 0x7 << SDRAM_TRFC_OFFS ) |\ -+ ( 0x2 << SDRAM_TRFC_EXT_OFFS) |\ -+ ( 0x1 << SDRAM_TW2W_OFFS)) -+ -+#define SDRAM_OPEN_PAGES_CTRL_REG_DV SDRAM_OPEN_PAGE_EN -+ -+/* DDR2 ODT default register values */ -+ -+/* Presence Ctrl Low Ctrl High Dunit Ctrl Ext Mode */ -+/* CS0 0x84210000 0x00000000 0x0000780F 0x00000440 */ -+/* CS0+CS1 0x84210000 0x00000000 0x0000780F 0x00000440 */ -+/* CS0+CS2 0x030C030C 0x00000000 0x0000740F 0x00000404 */ -+/* CS0+CS1+CS2 0x030C030C 0x00000000 0x0000740F 0x00000404 */ -+/* CS0+CS2+CS3 0x030C030C 0x00000000 0x0000740F 0x00000404 */ -+/* CS0+CS1+CS2+CS3 0x030C030C 0x00000000 0x0000740F 0x00000404 */ -+ -+#define DDR2_ODT_CTRL_LOW_CS0_DV 0x84210000 -+#define DDR2_ODT_CTRL_HIGH_CS0_DV 0x00000000 -+#define DDR2_DUNIT_ODT_CTRL_CS0_DV 0x0000780F -+#define DDR_SDRAM_EXT_MODE_CS0_DV 0x00000440 -+ -+#define DDR2_ODT_CTRL_LOW_CS0_CS2_DV 0x030C030C -+#define DDR2_ODT_CTRL_HIGH_CS0_CS2_DV 0x00000000 -+#define DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV 0x0000740F -+#define DDR_SDRAM_EXT_MODE_CS0_CS2_DV 0x00000404 -+ -+ -+/* DDR SDRAM Adderss/Control and Data Pads Calibration default values */ -+#define DDR1_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV \ -+ (1 << SDRAM_PRE_DRIVER_STRENGTH_OFFS) -+#define DDR2_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV \ -+ (3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS) -+ -+ -+#define DDR1_DATA_PAD_STRENGTH_TYPICAL_DV \ -+ (1 << SDRAM_PRE_DRIVER_STRENGTH_OFFS) -+#define DDR2_DATA_PAD_STRENGTH_TYPICAL_DV \ -+ (3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS) -+ -+/* DDR SDRAM Mode Register default value */ -+#define DDR1_MODE_REG_DV 0x00000000 -+#define DDR2_MODE_REG_DV 0x00000400 -+ -+/* DDR SDRAM Timing parameter default values */ -+#define DDR1_TIMING_LOW_DV 0x11602220 -+#define DDR1_TIMING_HIGH_DV 0x0000000d -+ -+#define DDR2_TIMING_LOW_DV 0x11812220 -+#define DDR2_TIMING_HIGH_DV 0x0000030f -+ -+/* For Guideline (GL# MEM-4) DQS Reference Delay Tuning */ -+#define FTDLL_DDR1_166MHZ ((0x1 << 0) | \ -+ (0x7F<< 12) | \ -+ (0x1 << 22)) -+ -+#define FTDLL_DDR1_133MHZ FTDLL_DDR1_166MHZ -+ -+#define FTDLL_DDR1_200MHZ ((0x1 << 0) | \ -+ (0x1 << 12) | \ -+ (0x3 << 14) | \ -+ (0x1 << 18) | \ -+ (0x1 << 22)) -+ -+ -+#define FTDLL_DDR2_166MHZ ((0x1 << 0) | \ -+ (0x1 << 12) | \ -+ (0x1 << 14) | \ -+ (0x1 << 16) | \ -+ (0x1 << 19) | \ -+ (0xF << 20)) -+ -+#define FTDLL_DDR2_133MHZ FTDLL_DDR2_166MHZ -+ -+#define FTDLL_DDR2_200MHZ ((0x1 << 0) | \ -+ (0x1 << 12) | \ -+ (0x1 << 14) | \ -+ (0x1 << 16) | \ -+ (0x1 << 19) | \ -+ (0xF << 20)) -+ -+#define FTDLL_DDR2_250MHZ 0x445001 -+ -+/* Orion 1 B1 and above */ -+#define FTDLL_DDR1_166MHZ_5181_B1 0x45D001 -+ -+/* Orion nas */ -+#define FTDLL_DDR2_166MHZ_5182 0x597001 -+ -+/* Orion 2 D0 and above */ -+#define FTDLL_DDR1_166MHZ_5281_D0 0x8D0001 -+#define FTDLL_DDR1_200MHZ_5281_D0 0x8D0001 -+#define FTDLL_DDR2_166MHZ_5281_D0 0x485001 -+#define FTDLL_DDR2_200MHZ_5281_D0 0x485001 -+#define FTDLL_DDR2_250MHZ_5281_D0 0x445001 -+#define FTDLL_DDR2_200MHZ_5281_D1 0x995001 -+#define FTDLL_DDR2_250MHZ_5281_D1 0x984801 -+ -+#endif /* __INCmvDramIfh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfRegs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfRegs.h -new file mode 100644 -index 0000000..f4a2726 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/mvDramIfRegs.h -@@ -0,0 +1,306 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvDramIfRegsh -+#define __INCmvDramIfRegsh -+ -+ -+/* DDR SDRAM Controller Address Decode Registers */ -+/* SDRAM CSn Base Address Register (SCBAR) */ -+#define SDRAM_BASE_ADDR_REG(csNum) (0x1500 + (csNum * 8)) -+#define SCBAR_BASE_OFFS 16 -+#define SCBAR_BASE_MASK (0xffff << SCBAR_BASE_OFFS) -+#define SCBAR_BASE_ALIGNMENT 0x10000 -+ -+/* SDRAM CSn Size Register (SCSR) */ -+#define SDRAM_SIZE_REG(csNum) (0x1504 + (csNum * 8)) -+#define SCSR_WIN_EN BIT0 -+#define SCSR_SIZE_OFFS 16 -+#define SCSR_SIZE_MASK (0xffff << SCSR_SIZE_OFFS) -+#define SCSR_SIZE_ALIGNMENT 0x10000 -+ -+/* configuration register */ -+#define SDRAM_CONFIG_REG 0x1400 -+#define SDRAM_REFRESH_OFFS 0 -+#define SDRAM_REFRESH_MAX 0x3000 -+#define SDRAM_REFRESH_MASK (SDRAM_REFRESH_MAX << SDRAM_REFRESH_OFFS) -+#define SDRAM_DWIDTH_OFFS 14 -+#define SDRAM_DWIDTH_MASK (3 << SDRAM_DWIDTH_OFFS) -+#define SDRAM_DWIDTH_16BIT (1 << SDRAM_DWIDTH_OFFS) -+#define SDRAM_DWIDTH_32BIT (2 << SDRAM_DWIDTH_OFFS) -+#define SDRAM_DTYPE_OFFS 16 -+#define SDRAM_DTYPE_MASK (1 << SDRAM_DTYPE_OFFS) -+#define SDRAM_DTYPE_DDR1 (0 << SDRAM_DTYPE_OFFS) -+#define SDRAM_DTYPE_DDR2 (1 << SDRAM_DTYPE_OFFS) -+#define SDRAM_REGISTERED (1 << 17) -+#define SDRAM_PERR_OFFS 18 -+#define SDRAM_PERR_MASK (1 << SDRAM_PERR_OFFS) -+#define SDRAM_PERR_NO_WRITE (0 << SDRAM_PERR_OFFS) -+#define SDRAM_PERR_WRITE (1 << SDRAM_PERR_OFFS) -+#define SDRAM_DCFG_OFFS 20 -+#define SDRAM_DCFG_MASK (0x3 << SDRAM_DCFG_OFFS) -+#define SDRAM_DCFG_X16_DEV (1 << SDRAM_DCFG_OFFS) -+#define SDRAM_DCFG_X8_DEV (2 << SDRAM_DCFG_OFFS) -+#define SDRAM_SRMODE (1 << 24) -+#define SDRAM_SRCLK_OFFS 25 -+#define SDRAM_SRCLK_MASK (1 << SDRAM_SRCLK_OFFS) -+#define SDRAM_SRCLK_KEPT (0 << SDRAM_SRCLK_OFFS) -+#define SDRAM_SRCLK_GATED (1 << SDRAM_SRCLK_OFFS) -+#define SDRAM_CATTH_OFFS 26 -+#define SDRAM_CATTHR_EN (1 << SDRAM_CATTH_OFFS) -+ -+ -+/* dunit control register */ -+#define SDRAM_DUNIT_CTRL_REG 0x1404 -+#define SDRAM_CTRL_POS_OFFS 6 -+#define SDRAM_CTRL_POS_FALL (0 << SDRAM_CTRL_POS_OFFS) -+#define SDRAM_CTRL_POS_RISE (1 << SDRAM_CTRL_POS_OFFS) -+#define SDRAM_CLK1DRV_OFFS 12 -+#define SDRAM_CLK1DRV_MASK (1 << SDRAM_CLK1DRV_OFFS) -+#define SDRAM_CLK1DRV_HIGH_Z (0 << SDRAM_CLK1DRV_OFFS) -+#define SDRAM_CLK1DRV_NORMAL (1 << SDRAM_CLK1DRV_OFFS) -+#define SDRAM_LOCKEN_OFFS 18 -+#define SDRAM_LOCKEN_MASK (1 << SDRAM_LOCKEN_OFFS) -+#define SDRAM_LOCKEN_DISABLE (0 << SDRAM_LOCKEN_OFFS) -+#define SDRAM_LOCKEN_ENABLE (1 << SDRAM_LOCKEN_OFFS) -+#define SDRAM_ST_BURST_DEL_OFFS 24 -+#define SDRAM_ST_BURST_DEL_MAX 0xf -+#define SDRAM_ST_BURST_DEL_MASK (SDRAM_ST_BURST_DEL_MAX<<SDRAM_ST_BURST_DEL_OFFS) -+ -+/* sdram timing control low register */ -+#define SDRAM_TIMING_CTRL_LOW_REG 0x1408 -+#define SDRAM_TRCD_OFFS 4 -+#define SDRAM_TRCD_MASK (0xF << SDRAM_TRCD_OFFS) -+#define SDRAM_TRP_OFFS 8 -+#define SDRAM_TRP_MASK (0xF << SDRAM_TRP_OFFS) -+#define SDRAM_TWR_OFFS 12 -+#define SDRAM_TWR_MASK (0xF << SDRAM_TWR_OFFS) -+#define SDRAM_TWTR_OFFS 16 -+#define SDRAM_TWTR_MASK (0xF << SDRAM_TWTR_OFFS) -+#define SDRAM_TRAS_OFFS 20 -+#define SDRAM_TRAS_MASK (0xF << SDRAM_TRAS_OFFS) -+#define SDRAM_TRRD_OFFS 24 -+#define SDRAM_TRRD_MASK (0xF << SDRAM_TRRD_OFFS) -+#define SDRAM_TRTP_OFFS 28 -+#define SDRAM_TRTP_MASK (0xF << SDRAM_TRTP_OFFS) -+ -+/* sdram timing control high register */ -+#define SDRAM_TIMING_CTRL_HIGH_REG 0x140c -+#define SDRAM_TRFC_OFFS 0 -+#define SDRAM_TRFC_MASK (0xF << SDRAM_TRFC_OFFS) -+#define SDRAM_TR2R_OFFS 4 -+#define SDRAM_TR2R_MASK (0x3 << SDRAM_TR2R_OFFS) -+#define SDRAM_TR2W_W2R_OFFS 6 -+#define SDRAM_TR2W_W2R_MASK (0x3 << SDRAM_TR2W_W2R_OFFS) -+#define SDRAM_TRFC_EXT_OFFS 8 -+#define SDRAM_TRFC_EXT_MASK (0x1 << SDRAM_TRFC_EXT_OFFS) -+#define SDRAM_TW2W_OFFS 10 -+#define SDRAM_TW2W_MASK (0x1 << SDRAM_TW2W_OFFS) -+ -+/* address control register */ -+#define SDRAM_ADDR_CTRL_REG 0x1410 -+#define SDRAM_DSIZE_OFFS 4 -+#define SDRAM_DSIZE_MASK (0x3 << SDRAM_DSIZE_OFFS) -+#define SDRAM_DSIZE_128Mb (0x0 << SDRAM_DSIZE_OFFS) -+#define SDRAM_DSIZE_256Mb (0x1 << SDRAM_DSIZE_OFFS) -+#define SDRAM_DSIZE_512Mb (0x2 << SDRAM_DSIZE_OFFS) -+ -+/* SDRAM Open Pages Control registers */ -+#define SDRAM_OPEN_PAGE_CTRL_REG 0x1414 -+#define SDRAM_OPEN_PAGE_EN (0 << 0) -+#define SDRAM_OPEN_PAGE_DIS (1 << 0) -+ -+/* sdram opertion register */ -+#define SDRAM_OPERATION_REG 0x1418 -+#define SDRAM_CMD_OFFS 0 -+#define SDRAM_CMD_MASK (0x7 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_NORMAL (0x0 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_PRECHARGE_ALL (0x1 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_REFRESH_ALL (0x2 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_REG_SET_CMD (0x3 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_EXT_MODE_SET (0x4 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_NOP (0x5 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_SLF_RFRSH (0x7 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_EMRS2_CMD (0x8 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_EMRS3_CMD (0x9 << SDRAM_CMD_OFFS) -+ -+/* sdram mode register */ -+#define SDRAM_MODE_REG 0x141c -+#define SDRAM_BURST_LEN_OFFS 0 -+#define SDRAM_BURST_LEN_MASK (0x7 << SDRAM_BURST_LEN_OFFS) -+#define SDRAM_BURST_LEN_4 (0x2 << SDRAM_BURST_LEN_OFFS) -+#define SDRAM_CL_OFFS 4 -+#define SDRAM_CL_MASK (0x7 << SDRAM_CL_OFFS) -+#define SDRAM_DDR1_CL_2 (0x2 << SDRAM_CL_OFFS) -+#define SDRAM_DDR1_CL_3 (0x3 << SDRAM_CL_OFFS) -+#define SDRAM_DDR1_CL_4 (0x4 << SDRAM_CL_OFFS) -+#define SDRAM_DDR1_CL_1_5 (0x5 << SDRAM_CL_OFFS) -+#define SDRAM_DDR1_CL_2_5 (0x6 << SDRAM_CL_OFFS) -+#define SDRAM_DDR2_CL_3 (0x3 << SDRAM_CL_OFFS) -+#define SDRAM_DDR2_CL_4 (0x4 << SDRAM_CL_OFFS) -+#define SDRAM_DDR2_CL_5 (0x5 << SDRAM_CL_OFFS) -+#define SDRAM_TM_OFFS 7 -+#define SDRAM_TM_MASK (1 << SDRAM_TM_OFFS) -+#define SDRAM_TM_NORMAL (0 << SDRAM_TM_OFFS) -+#define SDRAM_TM_TEST_MODE (1 << SDRAM_TM_OFFS) -+#define SDRAM_DLL_OFFS 8 -+#define SDRAM_DLL_MASK (1 << SDRAM_DLL_OFFS) -+#define SDRAM_DLL_NORMAL (0 << SDRAM_DLL_OFFS) -+#define SDRAM_DLL_RESET (1 << SDRAM_DLL_OFFS) -+#define SDRAM_WR_OFFS 11 -+#define SDRAM_WR_MAX 7 -+#define SDRAM_WR_MASK (SDRAM_WR_MAX << SDRAM_WR_OFFS) -+#define SDRAM_PD_OFFS 12 -+#define SDRAM_PD_MASK (1 << SDRAM_PD_OFFS) -+#define SDRAM_PD_FAST_EXIT (0 << SDRAM_PD_OFFS) -+#define SDRAM_PD_SLOW_EXIT (1 << SDRAM_PD_OFFS) -+ -+/* DDR SDRAM Extended Mode register (DSEMR) */ -+#define SDRAM_EXTENDED_MODE_REG 0x1420 -+#define DSEMR_DLL_ENABLE (1 << 0) -+#define DSEMR_DS_OFFS 1 -+#define DSEMR_DS_MASK (1 << DSEMR_DS_OFFS) -+#define DSEMR_DS_NORMAL (0 << DSEMR_DS_OFFS) -+#define DSEMR_DS_REDUCED (1 << DSEMR_DS_OFFS) -+#define DSEMR_RTT0_OFFS 2 -+#define DSEMR_RTT1_OFFS 6 -+#define DSEMR_RTT_ODT_DISABLE ((0 << DSEMR_RTT0_OFFS)||(0 << DSEMR_RTT1_OFFS)) -+#define DSEMR_RTT_ODT_75_OHM ((1 << DSEMR_RTT0_OFFS)||(0 << DSEMR_RTT1_OFFS)) -+#define DSEMR_RTT_ODT_150_OHM ((0 << DSEMR_RTT0_OFFS)||(1 << DSEMR_RTT1_OFFS)) -+#define DSEMR_OCD_OFFS 7 -+#define DSEMR_OCD_MASK (0x7 << DSEMR_OCD_OFFS) -+#define DSEMR_OCD_EXIT_CALIB (0 << DSEMR_OCD_OFFS) -+#define DSEMR_OCD_DRIVE1 (1 << DSEMR_OCD_OFFS) -+#define DSEMR_OCD_DRIVE0 (2 << DSEMR_OCD_OFFS) -+#define DSEMR_OCD_ADJUST_MODE (4 << DSEMR_OCD_OFFS) -+#define DSEMR_OCD_CALIB_DEFAULT (7 << DSEMR_OCD_OFFS) -+#define DSEMR_DQS_OFFS 10 -+#define DSEMR_DQS_MASK (1 << DSEMR_DQS_OFFS) -+#define DSEMR_DQS_DIFFERENTIAL (0 << DSEMR_DQS_OFFS) -+#define DSEMR_DQS_SINGLE_ENDED (0 << DSEMR_DQS_OFFS) -+#define DSEMR_RDQS_ENABLE (1 << 11) -+#define DSEMR_QOFF_OUTPUT_BUFF_EN (1 << 12) -+ -+/* DDR SDRAM Operation Control Register */ -+#define SDRAM_OPERATION_CTRL_REG 0x142c -+ -+/* Dunit FTDLL Configuration Register */ -+#define SDRAM_FTDLL_CONFIG_REG 0x1484 -+ -+/* Pads Calibration register */ -+#define SDRAM_ADDR_CTRL_PADS_CAL_REG 0x14c0 -+#define SDRAM_DATA_PADS_CAL_REG 0x14c4 -+#define SDRAM_DRVN_OFFS 0 -+#define SDRAM_DRVN_MASK (0x3F << SDRAM_DRVN_OFFS) -+#define SDRAM_DRVP_OFFS 6 -+#define SDRAM_DRVP_MASK (0x3F << SDRAM_DRVP_OFFS) -+#define SDRAM_PRE_DRIVER_STRENGTH_OFFS 12 -+#define SDRAM_PRE_DRIVER_STRENGTH_MASK (3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS) -+#define SDRAM_TUNE_EN BIT16 -+#define SDRAM_LOCK_OFFS 17 -+#define SDRAM_LOCK_MAKS (0x1F << SDRAM_LOCK_OFFS) -+#define SDRAM_LOCKN_OFFS 17 -+#define SDRAM_LOCKN_MAKS (0x3F << SDRAM_LOCKN_OFFS) -+#define SDRAM_LOCKP_OFFS 23 -+#define SDRAM_LOCKP_MAKS (0x3F << SDRAM_LOCKP_OFFS) -+#define SDRAM_WR_EN (1 << 31) -+ -+/* DDR2 SDRAM ODT Control (Low) Register (DSOCLR) */ -+#define DDR2_SDRAM_ODT_CTRL_LOW_REG 0x1494 -+#define DSOCLR_ODT_RD_OFFS(odtNum) (odtNum * 4) -+#define DSOCLR_ODT_RD_MASK(odtNum) (0xf << DSOCLR_ODT_RD_OFFS(odtNum)) -+#define DSOCLR_ODT_RD(odtNum, bank) ((1 << bank) << DSOCLR_ODT_RD_OFFS(odtNum)) -+#define DSOCLR_ODT_WR_OFFS(odtNum) (16 + (odtNum * 4)) -+#define DSOCLR_ODT_WR_MASK(odtNum) (0xf << DSOCLR_ODT_WR_OFFS(odtNum)) -+#define DSOCLR_ODT_WD(odtNum, bank) ((1 << bank) << DSOCLR_ODT_WR_OFFS(odtNum)) -+ -+/* DDR2 SDRAM ODT Control (High) Register (DSOCHR) */ -+#define DDR2_SDRAM_ODT_CTRL_HIGH_REG 0x1498 -+/* Optional control values to DSOCHR_ODT_EN macro */ -+#define DDR2_ODT_CTRL_DUNIT 0 -+#define DDR2_ODT_CTRL_NEVER 1 -+#define DDR2_ODT_CTRL_ALWAYS 3 -+#define DSOCHR_ODT_EN_OFFS(odtNum) (odtNum * 2) -+#define DSOCHR_ODT_EN_MASK(odtNum) (0x3 << DSOCHR_ODT_EN_OFFS(odtNum)) -+#define DSOCHR_ODT_EN(odtNum, ctrl) ((1 << ctrl) << DSOCHR_ODT_RD_OFFS(odtNum)) -+ -+/* DDR2 Dunit ODT Control Register (DDOCR)*/ -+#define DDR2_DUNIT_ODT_CONTROL_REG 0x149c -+#define DDOCR_ODT_RD_OFFS 0 -+#define DDOCR_ODT_RD_MASK (0xf << DDOCR_ODT_RD_OFFS) -+#define DDOCR_ODT_RD(bank) ((1 << bank) << DDOCR_ODT_RD_OFFS) -+#define DDOCR_ODT_WR_OFFS 4 -+#define DDOCR_ODT_WR_MASK (0xf << DDOCR_ODT_WR_OFFS) -+#define DDOCR_ODT_WR(bank) ((1 << bank) << DDOCR_ODT_WR_OFFS) -+#define DSOCR_ODT_EN_OFFS 8 -+#define DSOCR_ODT_EN_MASK (0x3 << DSOCR_ODT_EN_OFFS) -+#define DSOCR_ODT_EN(ctrl) ((1 << ctrl) << DSOCR_ODT_EN_OFFS) -+#define DSOCR_ODT_SEL_OFFS 10 -+#define DSOCR_ODT_SEL_MASK (0x3 << DSOCR_ODT_SEL_OFFS) -+ -+/* DDR SDRAM Initialization Control Register (DSICR) */ -+#define DDR_SDRAM_INIT_CTRL_REG 0x1480 -+#define DSICR_INIT_EN (1 << 0) -+ -+#endif /* __INCmvDramIfRegsh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.c b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.c -new file mode 100644 -index 0000000..8c9ce24 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.c -@@ -0,0 +1,1855 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+/* includes */ -+#include "ddr2/mvDramIf.h" -+#include "ctrlEnv/sys/mvCpuIf.h" -+ -+#include "ddr2/mvDramIfStaticInit.h" -+ -+/* #define MV_DEBUG */ -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+/* DRAM bank presence encoding */ -+#define BANK_PRESENT_CS0 0x1 -+#define BANK_PRESENT_CS0_CS1 0x3 -+#define BANK_PRESENT_CS0_CS2 0x5 -+#define BANK_PRESENT_CS0_CS1_CS2 0x7 -+#define BANK_PRESENT_CS0_CS2_CS3 0xd -+#define BANK_PRESENT_CS0_CS2_CS3_CS4 0xf -+ -+/* locals */ -+#ifndef MV_STATIC_DRAM_ON_BOARD -+static void sdramDDr2OdtConfig(MV_DRAM_BANK_INFO *pBankInfo); -+static MV_U32 dunitCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk, MV_STATUS TTmode ); -+static MV_U32 dunitCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk); -+static MV_U32 sdramModeRegCalc(MV_U32 minCas); -+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk); -+static MV_U32 sdramAddrCtrlRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_DRAM_BANK_INFO *pBankInfoDIMM1); -+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_DRAM_BANK_INFO *pBankInfo2, MV_U32 busClk); -+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo,MV_DRAM_BANK_INFO *pBankInfo2, MV_U32 busClk, MV_U32 forcedCl); -+static MV_U32 sdramTimeCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk); -+static MV_U32 sdramTimeCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk); -+static MV_U32 sdramDdr2TimeLoRegCalc(MV_U32 minCas); -+static MV_U32 sdramDdr2TimeHiRegCalc(MV_U32 minCas); -+#endif -+MV_32 DRAM_CS_Order[MV_DRAM_MAX_CS] = {N_A -+ -+#ifdef MV_INCLUDE_SDRAM_CS1 -+ ,N_A -+#endif -+#ifdef MV_INCLUDE_SDRAM_CS2 -+ ,N_A -+#endif -+#ifdef MV_INCLUDE_SDRAM_CS3 -+ ,N_A -+#endif -+ }; -+/* Get DRAM size of CS num */ -+MV_U32 mvDramCsSizeGet(MV_U32 csNum) -+{ -+ MV_DRAM_BANK_INFO bankInfo; -+ MV_U32 size, deviceW, dimmW; -+#ifdef MV78XX0 -+ MV_U32 temp; -+#endif -+ -+ if(MV_OK == mvDramBankInfoGet(csNum, &bankInfo)) -+ { -+ if (0 == bankInfo.size) -+ return 0; -+ -+ /* Note that the Dimm width might be different then the device DRAM width */ -+#ifdef MV78XX0 -+ temp = MV_REG_READ(SDRAM_CONFIG_REG); -+ deviceW = ((temp & SDRAM_DWIDTH_MASK) == SDRAM_DWIDTH_32BIT )? 32 : 64; -+#else -+ deviceW = 16 /* KW family */; -+#endif -+ dimmW = bankInfo.dataWidth - (bankInfo.dataWidth % 16); -+ size = ((bankInfo.size << 20) / (dimmW/deviceW)); -+ return size; -+ } -+ else -+ return 0; -+} -+/******************************************************************************* -+* mvDramIfDetect - Prepare DRAM interface configuration values. -+* -+* DESCRIPTION: -+* This function implements the full DRAM detection and timing -+* configuration for best system performance. -+* Since this routine runs from a ROM device (Boot Flash), its stack -+* resides on RAM, that might be the system DRAM. Changing DRAM -+* configuration values while keeping vital data in DRAM is risky. That -+* is why the function does not preform the configuration setting but -+* prepare those in predefined 32bit registers (in this case IDMA -+* registers are used) for other routine to perform the settings. -+* The function will call for board DRAM SPD information for each DRAM -+* chip select. The function will then analyze those SPD parameters of -+* all DRAM banks in order to decide on DRAM configuration compatible -+* for all DRAM banks. -+* The function will set the CPU DRAM address decode registers. -+* Note: This routine prepares values that will overide configuration of -+* mvDramBasicAsmInit(). -+* -+* INPUT: -+* forcedCl - Forced CAL Latency. If equal to zero, do not force. -+* eccDisable - Force down the ECC. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvDramIfDetect(MV_U32 forcedCl, MV_BOOL eccDisable) -+{ -+ MV_32 MV_DRAM_CS_order[MV_DRAM_MAX_CS] = { -+ SDRAM_CS0 -+#ifdef MV_INCLUDE_SDRAM_CS1 -+ ,SDRAM_CS1 -+#endif -+#ifdef MV_INCLUDE_SDRAM_CS2 -+ ,SDRAM_CS2 -+#endif -+#ifdef MV_INCLUDE_SDRAM_CS3 -+ ,SDRAM_CS3 -+#endif -+ }; -+ MV_U32 busClk, deviceW, dimmW; -+ MV_U32 numOfAllDevices = 0; -+ MV_STATUS TTMode; -+#ifndef MV_STATIC_DRAM_ON_BOARD -+ MV_DRAM_BANK_INFO bankInfo[MV_DRAM_MAX_CS]; -+ MV_U32 size, base = 0, i, j, temp, busClkPs; -+ MV_U8 minCas; -+ MV_CPU_DEC_WIN dramDecWin; -+ dramDecWin.addrWin.baseHigh = 0; -+#endif -+ -+ busClk = mvBoardSysClkGet(); -+ -+ if (0 == busClk) -+ { -+ mvOsPrintf("Dram: ERR. Can't detect system clock! \n"); -+ return MV_ERROR; -+ } -+ -+#ifndef MV_STATIC_DRAM_ON_BOARD -+ -+ busClkPs = 1000000000 / (busClk / 1000); /* in ps units */ -+ /* we will use bank 0 as the representative of the all the DRAM banks, */ -+ /* since bank 0 must exist. */ -+ for(i = 0; i < MV_DRAM_MAX_CS; i++) -+ { -+ /* if Bank exist */ -+ if(MV_OK == mvDramBankInfoGet(i, &bankInfo[i])) -+ { -+ DB(mvOsPrintf("Dram: Find bank %d\n", i)); -+ /* check it isn't SDRAM */ -+ if(bankInfo[i].memoryType != MEM_TYPE_DDR2) -+ { -+ mvOsOutput("Dram: ERR. SDRAM type not supported !!!\n"); -+ return MV_ERROR; -+ } -+ -+ /* All banks must support the Mclk freqency */ -+ if(bankInfo[i].minCycleTimeAtMaxCasLatPs > busClkPs) -+ { -+ mvOsOutput("Dram: ERR. Bank %d doesn't support memory clock!!!\n", i); -+ return MV_ERROR; -+ } -+ -+ /* All banks must support registry in order to activate it */ -+ if(bankInfo[i].registeredAddrAndControlInputs != -+ bankInfo[0].registeredAddrAndControlInputs) -+ { -+ mvOsOutput("Dram: ERR. different Registered settings !!!\n"); -+ return MV_ERROR; -+ } -+ -+ /* All banks must support same ECC mode */ -+ if(bankInfo[i].errorCheckType != -+ bankInfo[0].errorCheckType) -+ { -+ mvOsOutput("Dram: ERR. different ECC settings !!!\n"); -+ return MV_ERROR; -+ } -+ -+ } -+ else -+ { -+ if( i == 0 ) /* bank 0 doesn't exist */ -+ { -+ mvOsOutput("Dram: ERR. Fail to detect bank 0 !!!\n"); -+ return MV_ERROR; -+ } -+ else -+ { -+ DB(mvOsPrintf("Dram: Could not find bank %d\n", i)); -+ bankInfo[i].size = 0; /* Mark this bank as non exist */ -+ } -+ } -+ } -+ -+#ifdef MV_INCLUDE_SDRAM_CS2 -+ if (bankInfo[SDRAM_CS0].size < bankInfo[SDRAM_CS2].size) -+ { -+ MV_DRAM_CS_order[0] = SDRAM_CS2; -+ MV_DRAM_CS_order[1] = SDRAM_CS3; -+ MV_DRAM_CS_order[2] = SDRAM_CS0; -+ MV_DRAM_CS_order[3] = SDRAM_CS1; -+ DRAM_CS_Order[0] = SDRAM_CS2; -+ DRAM_CS_Order[1] = SDRAM_CS3; -+ DRAM_CS_Order[2] = SDRAM_CS0; -+ DRAM_CS_Order[3] = SDRAM_CS1; -+ -+ } -+ else -+#endif -+ { -+ MV_DRAM_CS_order[0] = SDRAM_CS0; -+ MV_DRAM_CS_order[1] = SDRAM_CS1; -+ DRAM_CS_Order[0] = SDRAM_CS0; -+ DRAM_CS_Order[1] = SDRAM_CS1; -+#ifdef MV_INCLUDE_SDRAM_CS2 -+ MV_DRAM_CS_order[2] = SDRAM_CS2; -+ MV_DRAM_CS_order[3] = SDRAM_CS3; -+ DRAM_CS_Order[2] = SDRAM_CS2; -+ DRAM_CS_Order[3] = SDRAM_CS3; -+#endif -+ } -+ -+ for(j = 0; j < MV_DRAM_MAX_CS; j++) -+ { -+ i = MV_DRAM_CS_order[j]; -+ -+ if (0 == bankInfo[i].size) -+ continue; -+ -+ /* Init the CPU window decode */ -+ /* Note that the Dimm width might be different then the device DRAM width */ -+#ifdef MV78XX0 -+ temp = MV_REG_READ(SDRAM_CONFIG_REG); -+ deviceW = ((temp & SDRAM_DWIDTH_MASK) == SDRAM_DWIDTH_32BIT )? 32 : 64; -+#else -+ deviceW = 16 /* KW family */; -+#endif -+ dimmW = bankInfo[0].dataWidth - (bankInfo[0].dataWidth % 16); -+ size = ((bankInfo[i].size << 20) / (dimmW/deviceW)); -+ -+ /* We can not change DRAM window settings while excecuting */ -+ /* code from it. That is why we skip the DRAM CS[0], saving */ -+ /* it to the ROM configuration routine */ -+ -+ numOfAllDevices += bankInfo[i].numberOfDevices; -+ if (i == MV_DRAM_CS_order[0]) -+ { -+ MV_U32 sizeToReg; -+ /* Translate the given window size to register format */ -+ sizeToReg = ctrlSizeToReg(size, SCSR_SIZE_ALIGNMENT); -+ /* Size parameter validity check. */ -+ if (-1 == sizeToReg) -+ { -+ mvOsOutput("DRAM: mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n" -+ ,i); -+ return MV_BAD_PARAM; -+ } -+ -+ DB(mvOsPrintf("Dram: Bank 0 Size - %x\n",sizeToReg);) -+ sizeToReg = (sizeToReg << SCSR_SIZE_OFFS); -+ sizeToReg |= SCSR_WIN_EN; -+ MV_REG_WRITE(DRAM_BUF_REG0, sizeToReg); -+ } -+ else -+ { -+ dramDecWin.addrWin.baseLow = base; -+ dramDecWin.addrWin.size = size; -+ dramDecWin.enable = MV_TRUE; -+ DB(mvOsPrintf("Dram: Enable window %d base 0x%x, size=0x%x\n",i, base, size)); -+ -+ /* Check if the DRAM size is more then 3GByte */ -+ if (base < 0xC0000000) -+ { -+ DB(mvOsPrintf("Dram: Enable window %d base 0x%x, size=0x%x\n",i, base, size)); -+ if (MV_OK != mvCpuIfTargetWinSet(i, &dramDecWin)) -+ { -+ mvOsPrintf("Dram: ERR. Fail to set bank %d!!!\n", SDRAM_CS0 + i); -+ return MV_ERROR; -+ } -+ } -+ } -+ -+ base += size; -+ -+ /* update the suportedCasLatencies mask */ -+ bankInfo[0].suportedCasLatencies &= bankInfo[i].suportedCasLatencies; -+ } -+ -+ /* calculate minimum CAS */ -+ minCas = minCasCalc(&bankInfo[0], &bankInfo[2], busClk, forcedCl); -+ if (0 == minCas) -+ { -+ mvOsOutput("Dram: Warn: Could not find CAS compatible to SysClk %dMhz\n", -+ (busClk / 1000000)); -+ -+ minCas = DDR2_CL_4; /* Continue with this CAS */ -+ mvOsOutput("Set default CAS latency 4\n"); -+ } -+ -+ /* calc SDRAM_CONFIG_REG and save it to temp register */ -+ temp = sdramConfigRegCalc(&bankInfo[0],&bankInfo[2], busClk); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. sdramConfigRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ -+ /* check if ECC is enabled by the user */ -+ if(eccDisable) -+ { -+ /* turn off ECC*/ -+ temp &= ~BIT18; -+ } -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG1, temp); -+ -+ /* calc SDRAM_MODE_REG and save it to temp register */ -+ temp = sdramModeRegCalc(minCas); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. sdramModeRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: sdramModeRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG2, temp); -+ -+ /* calc SDRAM_EXTENDED_MODE_REG and save it to temp register */ -+ temp = sdramExtModeRegCalc(&bankInfo[0], busClk); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. sdramExtModeRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: sdramExtModeRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG10, temp); -+ -+ /* calc D_UNIT_CONTROL_LOW and save it to temp register */ -+ TTMode = MV_FALSE; -+ DB(mvOsPrintf("Dram: numOfAllDevices = %x\n",numOfAllDevices);) -+ if( (numOfAllDevices > 9) && (bankInfo[0].registeredAddrAndControlInputs == MV_FALSE) ) -+ { -+ if ( ( (numOfAllDevices > 9) && (busClk > MV_BOARD_SYSCLK_200MHZ) ) || -+ (numOfAllDevices > 18) ) -+ { -+ mvOsOutput("Enable 2T "); -+ TTMode = MV_TRUE; -+ } -+ } -+ -+ temp = dunitCtrlLowRegCalc(&bankInfo[0], minCas, busClk, TTMode ); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. dunitCtrlLowRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: dunitCtrlLowRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG3, temp); -+ -+ /* calc D_UNIT_CONTROL_HIGH and save it to temp register */ -+ temp = dunitCtrlHighRegCalc(&bankInfo[0], busClk); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. dunitCtrlHighRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: dunitCtrlHighRegCalc - %x\n",temp);) -+ /* check if ECC is enabled by the user */ -+ if(eccDisable) -+ { -+ /* turn off sample stage if no ecc */ -+ temp &= ~SDRAM__D2P_EN;; -+ } -+ MV_REG_WRITE(DRAM_BUF_REG13, temp); -+ -+ /* calc SDRAM_ADDR_CTRL_REG and save it to temp register */ -+ temp = sdramAddrCtrlRegCalc(&bankInfo[0],&bankInfo[2]); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. sdramAddrCtrlRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: sdramAddrCtrlRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG4, temp); -+ -+ /* calc SDRAM_TIMING_CTRL_LOW_REG and save it to temp register */ -+ temp = sdramTimeCtrlLowRegCalc(&bankInfo[0], minCas, busClk); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. sdramTimeCtrlLowRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: sdramTimeCtrlLowRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG5, temp); -+ -+ /* calc SDRAM_TIMING_CTRL_HIGH_REG and save it to temp register */ -+ temp = sdramTimeCtrlHighRegCalc(&bankInfo[0], busClk); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. sdramTimeCtrlHighRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: sdramTimeCtrlHighRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG6, temp); -+ -+ sdramDDr2OdtConfig(bankInfo); -+ -+ /* calc DDR2_SDRAM_TIMING_LOW_REG and save it to temp register */ -+ temp = sdramDdr2TimeLoRegCalc(minCas); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. sdramDdr2TimeLoRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: sdramDdr2TimeLoRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG11, temp); -+ -+ /* calc DDR2_SDRAM_TIMING_HIGH_REG and save it to temp register */ -+ temp = sdramDdr2TimeHiRegCalc(minCas); -+ if(-1 == temp) -+ { -+ mvOsOutput("Dram: ERR. sdramDdr2TimeHiRegCalc failed !!!\n"); -+ return MV_ERROR; -+ } -+ DB(mvOsPrintf("Dram: sdramDdr2TimeHiRegCalc - %x\n",temp);) -+ MV_REG_WRITE(DRAM_BUF_REG12, temp); -+#endif -+ -+ /* Note that DDR SDRAM Address/Control and Data pad calibration */ -+ /* settings is done in mvSdramIfConfig.s */ -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvDramIfBankBaseGet - Get DRAM interface bank base. -+* -+* DESCRIPTION: -+* This function returns the 32 bit base address of a given DRAM bank. -+* -+* INPUT: -+* bankNum - Bank number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* DRAM bank size. If bank is disabled or paramter is invalid, the -+* function returns -1. -+* -+*******************************************************************************/ -+MV_U32 mvDramIfBankBaseGet(MV_U32 bankNum) -+{ -+ DB(mvOsPrintf("Dram: mvDramIfBankBaseGet Bank %d base addr is %x \n", -+ bankNum, mvCpuIfTargetWinBaseLowGet(SDRAM_CS0 + bankNum))); -+ return mvCpuIfTargetWinBaseLowGet(SDRAM_CS0 + bankNum); -+} -+ -+/******************************************************************************* -+* mvDramIfBankSizeGet - Get DRAM interface bank size. -+* -+* DESCRIPTION: -+* This function returns the size of a given DRAM bank. -+* -+* INPUT: -+* bankNum - Bank number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* DRAM bank size. If bank is disabled the function return '0'. In case -+* or paramter is invalid, the function returns -1. -+* -+*******************************************************************************/ -+MV_U32 mvDramIfBankSizeGet(MV_U32 bankNum) -+{ -+ DB(mvOsPrintf("Dram: mvDramIfBankSizeGet Bank %d size is %x \n", -+ bankNum, mvCpuIfTargetWinSizeGet(SDRAM_CS0 + bankNum))); -+ return mvCpuIfTargetWinSizeGet(SDRAM_CS0 + bankNum); -+} -+ -+ -+/******************************************************************************* -+* mvDramIfSizeGet - Get DRAM interface total size. -+* -+* DESCRIPTION: -+* This function get the DRAM total size. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* DRAM total size. In case or paramter is invalid, the function -+* returns -1. -+* -+*******************************************************************************/ -+MV_U32 mvDramIfSizeGet(MV_VOID) -+{ -+ MV_U32 size = 0, i; -+ -+ for(i = 0; i < MV_DRAM_MAX_CS; i++) -+ size += mvDramIfBankSizeGet(i); -+ -+ DB(mvOsPrintf("Dram: mvDramIfSizeGet size is %x \n",size)); -+ return size; -+} -+ -+/******************************************************************************* -+* mvDramIfSingleBitErrThresholdSet - Set single bit ECC threshold. -+* -+* DESCRIPTION: -+* The ECC single bit error threshold is the number of single bit -+* errors to happen before the Dunit generates an interrupt. -+* This function set single bit ECC threshold. -+* -+* INPUT: -+* threshold - threshold. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM if threshold is to big, MV_OK otherwise. -+* -+*******************************************************************************/ -+MV_STATUS mvDramIfSingleBitErrThresholdSet(MV_U32 threshold) -+{ -+ MV_U32 regVal; -+ -+ if (threshold > SECR_THRECC_MAX) -+ { -+ return MV_BAD_PARAM; -+ } -+ -+ regVal = MV_REG_READ(SDRAM_ECC_CONTROL_REG); -+ regVal &= ~SECR_THRECC_MASK; -+ regVal |= ((SECR_THRECC(threshold) & SECR_THRECC_MASK)); -+ MV_REG_WRITE(SDRAM_ECC_CONTROL_REG, regVal); -+ -+ return MV_OK; -+} -+ -+#ifndef MV_STATIC_DRAM_ON_BOARD -+/******************************************************************************* -+* minCasCalc - Calculate the Minimum CAS latency which can be used. -+* -+* DESCRIPTION: -+* Calculate the minimum CAS latency that can be used, base on the DRAM -+* parameters and the SDRAM bus Clock freq. -+* -+* INPUT: -+* busClk - the DRAM bus Clock. -+* pBankInfo - bank info parameters. -+* forcedCl - Forced CAS Latency multiplied by 10. If equal to zero, do not force. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* The minimum CAS Latency. The function returns 0 if max CAS latency -+* supported by banks is incompatible with system bus clock frequancy. -+* -+*******************************************************************************/ -+ -+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo,MV_DRAM_BANK_INFO *pBankInfo2, MV_U32 busClk, MV_U32 forcedCl) -+{ -+ MV_U32 count = 1, j; -+ MV_U32 busClkPs = 1000000000 / (busClk / 1000); /* in ps units */ -+ MV_U32 startBit, stopBit; -+ MV_U32 minCas0 = 0, minCas2 = 0; -+ -+ -+ /* DDR 2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | TBD | 5 | 4 | 3 | 2 | TBD | TBD * -+ Disco VI= * TBD | TBD | 5 | 4 | 3 | TBD | TBD | TBD * -+ Disco Duo= * TBD | 6 | 5 | 4 | 3 | TBD | TBD | TBD * -+ *********************************************************/ -+ -+ -+ /* If we are asked to use the forced CAL we change the suported CAL to be forcedCl only */ -+ if (forcedCl) -+ { -+ mvOsOutput("DRAM: Using forced CL %d.%d\n", (forcedCl / 10), (forcedCl % 10)); -+ -+ if (forcedCl == 30) -+ pBankInfo->suportedCasLatencies = 0x08; -+ else if (forcedCl == 40) -+ pBankInfo->suportedCasLatencies = 0x10; -+ else if (forcedCl == 50) -+ pBankInfo->suportedCasLatencies = 0x20; -+ else if (forcedCl == 60) -+ pBankInfo->suportedCasLatencies = 0x40; -+ else -+ { -+ mvOsPrintf("Forced CL %d.%d not supported. Set default CL 4\n", -+ (forcedCl / 10), (forcedCl % 10)); -+ pBankInfo->suportedCasLatencies = 0x10; -+ } -+ -+ return pBankInfo->suportedCasLatencies; -+ } -+ -+ /* go over the supported cas mask from Max Cas down and check if the */ -+ /* SysClk stands in its time requirments. */ -+ -+ DB(mvOsPrintf("Dram: minCasCalc supported mask = %x busClkPs = %x \n", -+ pBankInfo->suportedCasLatencies,busClkPs )); -+ count = 1; -+ for(j = 7; j > 0; j--) -+ { -+ if((pBankInfo->suportedCasLatencies >> j) & BIT0 ) -+ { -+ /* Reset the bits for CL incompatible for the sysClk */ -+ switch (count) -+ { -+ case 1: -+ if (pBankInfo->minCycleTimeAtMaxCasLatPs > busClkPs) -+ pBankInfo->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ case 2: -+ if (pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps > busClkPs) -+ pBankInfo->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ case 3: -+ if (pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps > busClkPs) -+ pBankInfo->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ default: -+ pBankInfo->suportedCasLatencies &= ~(BIT0 << j); -+ break; -+ } -+ } -+ } -+ -+ DB(mvOsPrintf("Dram: minCasCalc support = %x (after SysCC calc)\n", -+ pBankInfo->suportedCasLatencies )); -+ -+ count = 1; -+ DB(mvOsPrintf("Dram2: minCasCalc supported mask = %x busClkPs = %x \n", -+ pBankInfo2->suportedCasLatencies,busClkPs )); -+ for(j = 7; j > 0; j--) -+ { -+ if((pBankInfo2->suportedCasLatencies >> j) & BIT0 ) -+ { -+ /* Reset the bits for CL incompatible for the sysClk */ -+ switch (count) -+ { -+ case 1: -+ if (pBankInfo2->minCycleTimeAtMaxCasLatPs > busClkPs) -+ pBankInfo2->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ case 2: -+ if (pBankInfo2->minCycleTimeAtMaxCasLatMinus1Ps > busClkPs) -+ pBankInfo2->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ case 3: -+ if (pBankInfo2->minCycleTimeAtMaxCasLatMinus2Ps > busClkPs) -+ pBankInfo2->suportedCasLatencies &= ~(BIT0 << j); -+ count++; -+ break; -+ default: -+ pBankInfo2->suportedCasLatencies &= ~(BIT0 << j); -+ break; -+ } -+ } -+ } -+ -+ DB(mvOsPrintf("Dram2: minCasCalc support = %x (after SysCC calc)\n", -+ pBankInfo2->suportedCasLatencies )); -+ -+ startBit = 3; /* DDR2 support CL start with CL3 (bit 3) */ -+ stopBit = 6; /* DDR2 support CL stops with CL6 (bit 6) */ -+ -+ for(j = startBit; j <= stopBit ; j++) -+ { -+ if((pBankInfo->suportedCasLatencies >> j) & BIT0 ) -+ { -+ DB(mvOsPrintf("Dram: minCasCalc choose CAS %x \n",(BIT0 << j))); -+ minCas0 = (BIT0 << j); -+ break; -+ } -+ } -+ -+ for(j = startBit; j <= stopBit ; j++) -+ { -+ if((pBankInfo2->suportedCasLatencies >> j) & BIT0 ) -+ { -+ DB(mvOsPrintf("Dram: minCasCalc choose CAS %x \n",(BIT0 << j))); -+ minCas2 = (BIT0 << j); -+ break; -+ } -+ } -+ -+ if (minCas2 > minCas0) -+ return minCas2; -+ else -+ return minCas0; -+ -+ return 0; -+} -+ -+/******************************************************************************* -+* sdramConfigRegCalc - Calculate sdram config register -+* -+* DESCRIPTION: Calculate sdram config register optimized value based -+* on the bank info parameters. -+* -+* INPUT: -+* busClk - the DRAM bus Clock. -+* pBankInfo - sdram bank parameters -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram config reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo,MV_DRAM_BANK_INFO *pBankInfo2, MV_U32 busClk) -+{ -+ MV_U32 sdramConfig = 0; -+ MV_U32 refreshPeriod; -+ -+ busClk /= 1000000; /* we work with busClk in MHz */ -+ -+ sdramConfig = MV_REG_READ(SDRAM_CONFIG_REG); -+ -+ /* figure out the memory refresh internal */ -+ switch (pBankInfo->refreshInterval & 0xf) -+ { -+ case 0x0: /* refresh period is 15.625 usec */ -+ refreshPeriod = 15625; -+ break; -+ case 0x1: /* refresh period is 3.9 usec */ -+ refreshPeriod = 3900; -+ break; -+ case 0x2: /* refresh period is 7.8 usec */ -+ refreshPeriod = 7800; -+ break; -+ case 0x3: /* refresh period is 31.3 usec */ -+ refreshPeriod = 31300; -+ break; -+ case 0x4: /* refresh period is 62.5 usec */ -+ refreshPeriod = 62500; -+ break; -+ case 0x5: /* refresh period is 125 usec */ -+ refreshPeriod = 125000; -+ break; -+ default: /* refresh period undefined */ -+ mvOsPrintf("Dram: ERR. DRAM refresh period is unknown!\n"); -+ return -1; -+ } -+ -+ /* Now the refreshPeriod is in register format value */ -+ refreshPeriod = (busClk * refreshPeriod) / 1000; -+ -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc calculated refresh interval %0x\n", -+ refreshPeriod)); -+ -+ /* make sure the refresh value is only 14 bits */ -+ if(refreshPeriod > SDRAM_REFRESH_MAX) -+ { -+ refreshPeriod = SDRAM_REFRESH_MAX; -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc adjusted refresh interval %0x\n", -+ refreshPeriod)); -+ } -+ -+ /* Clear the refresh field */ -+ sdramConfig &= ~SDRAM_REFRESH_MASK; -+ -+ /* Set new value to refresh field */ -+ sdramConfig |= (refreshPeriod & SDRAM_REFRESH_MASK); -+ -+ /* registered DRAM ? */ -+ if ( pBankInfo->registeredAddrAndControlInputs ) -+ { -+ /* it's registered DRAM, so set the reg. DRAM bit */ -+ sdramConfig |= SDRAM_REGISTERED; -+ DB(mvOsPrintf("DRAM Attribute: Registered address and control inputs.\n");) -+ } -+ -+ /* ECC and IERR support */ -+ sdramConfig &= ~SDRAM_ECC_MASK; /* Clear ECC field */ -+ sdramConfig &= ~SDRAM_IERR_MASK; /* Clear IErr field */ -+ -+ if ( pBankInfo->errorCheckType ) -+ { -+ sdramConfig |= SDRAM_ECC_EN; -+ sdramConfig |= SDRAM_IERR_REPORTE; -+ DB(mvOsPrintf("Dram: mvDramIfDetect Enabling ECC\n")); -+ } -+ else -+ { -+ sdramConfig |= SDRAM_ECC_DIS; -+ sdramConfig |= SDRAM_IERR_IGNORE; -+ DB(mvOsPrintf("Dram: mvDramIfDetect Disabling ECC!\n")); -+ } -+ /* Set static default settings */ -+ sdramConfig |= SDRAM_CONFIG_DV; -+ -+ DB(mvOsPrintf("Dram: sdramConfigRegCalc set sdramConfig to 0x%x\n", -+ sdramConfig)); -+ -+ return sdramConfig; -+} -+ -+/******************************************************************************* -+* sdramModeRegCalc - Calculate sdram mode register -+* -+* DESCRIPTION: Calculate sdram mode register optimized value based -+* on the bank info parameters and the minCas. -+* -+* INPUT: -+* minCas - minimum CAS supported. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram mode reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramModeRegCalc(MV_U32 minCas) -+{ -+ MV_U32 sdramMode; -+ -+ sdramMode = MV_REG_READ(SDRAM_MODE_REG); -+ -+ /* Clear CAS Latency field */ -+ sdramMode &= ~SDRAM_CL_MASK; -+ -+ DB(mvOsPrintf("DRAM CAS Latency ");) -+ -+ switch (minCas) -+ { -+ case DDR2_CL_3: -+ sdramMode |= SDRAM_DDR2_CL_3; -+ DB(mvOsPrintf("3.\n");) -+ break; -+ case DDR2_CL_4: -+ sdramMode |= SDRAM_DDR2_CL_4; -+ DB(mvOsPrintf("4.\n");) -+ break; -+ case DDR2_CL_5: -+ sdramMode |= SDRAM_DDR2_CL_5; -+ DB(mvOsPrintf("5.\n");) -+ break; -+ case DDR2_CL_6: -+ sdramMode |= SDRAM_DDR2_CL_6; -+ DB(mvOsPrintf("6.\n");) -+ break; -+ default: -+ mvOsOutput("\nsdramModeRegCalc ERROR: Max. CL out of range\n"); -+ return -1; -+ } -+ -+ DB(mvOsPrintf("\nsdramModeRegCalc register 0x%x\n", sdramMode )); -+ -+ return sdramMode; -+} -+/******************************************************************************* -+* sdramExtModeRegCalc - Calculate sdram Extended mode register -+* -+* DESCRIPTION: -+* Return sdram Extended mode register value based -+* on the bank info parameters and bank presence. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* busClk - DRAM frequency -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram Extended mode reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk) -+{ -+ MV_U32 populateBanks = 0; -+ int bankNum; -+ -+ /* Represent the populate banks in binary form */ -+ for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ if (0 != pBankInfo[bankNum].size) -+ { -+ populateBanks |= (1 << bankNum); -+ } -+ } -+ -+ switch(populateBanks) -+ { -+ case(BANK_PRESENT_CS0): -+ case(BANK_PRESENT_CS0_CS1): -+ return DDR_SDRAM_EXT_MODE_CS0_CS1_DV; -+ -+ case(BANK_PRESENT_CS0_CS2): -+ case(BANK_PRESENT_CS0_CS1_CS2): -+ case(BANK_PRESENT_CS0_CS2_CS3): -+ case(BANK_PRESENT_CS0_CS2_CS3_CS4): -+ if (busClk >= MV_BOARD_SYSCLK_267MHZ) -+ return DDR_SDRAM_EXT_MODE_FAST_CS0_CS1_CS2_CS3_DV; -+ else -+ return DDR_SDRAM_EXT_MODE_CS0_CS1_CS2_CS3_DV; -+ -+ default: -+ mvOsOutput("sdramExtModeRegCalc: Invalid DRAM bank presence\n"); -+ return -1; -+ } -+ return 0; -+} -+ -+/******************************************************************************* -+* dunitCtrlLowRegCalc - Calculate sdram dunit control low register -+* -+* DESCRIPTION: Calculate sdram dunit control low register optimized value based -+* on the bank info parameters and the minCas. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* minCas - minimum CAS supported. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram dunit control low reg value. -+* -+*******************************************************************************/ -+static MV_U32 dunitCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk, MV_STATUS TTMode) -+{ -+ MV_U32 dunitCtrlLow, cl; -+ MV_U32 sbOutR[4]={3,5,7,9} ; -+ MV_U32 sbOutU[4]={1,3,5,7} ; -+ -+ dunitCtrlLow = MV_REG_READ(SDRAM_DUNIT_CTRL_REG); -+ -+ DB(mvOsPrintf("Dram: dunitCtrlLowRegCalc\n")); -+ -+ /* Clear StBurstOutDel field */ -+ dunitCtrlLow &= ~SDRAM_SB_OUT_MASK; -+ -+ /* Clear StBurstInDel field */ -+ dunitCtrlLow &= ~SDRAM_SB_IN_MASK; -+ -+ /* Clear CtrlPos field */ -+ dunitCtrlLow &= ~SDRAM_CTRL_POS_MASK; -+ -+ /* Clear 2T field */ -+ dunitCtrlLow &= ~SDRAM_2T_MASK; -+ if (TTMode == MV_TRUE) -+ { -+ dunitCtrlLow |= SDRAM_2T_MODE; -+ } -+ -+ /* For proper sample of read data set the Dunit Control register's */ -+ /* stBurstInDel bits [27:24] */ -+ /* 200MHz - 267MHz None reg = CL + 1 */ -+ /* 200MHz - 267MHz reg = CL + 2 */ -+ /* > 267MHz None reg = CL + 2 */ -+ /* > 267MHz reg = CL + 3 */ -+ -+ /* For proper sample of read data set the Dunit Control register's */ -+ /* stBurstOutDel bits [23:20] */ -+ /********-********-********-********- -+ * CL=3 | CL=4 | CL=5 | CL=6 | -+ *********-********-********-********- -+ Not Reg. * 0001 | 0011 | 0101 | 0111 | -+ *********-********-********-********- -+ Registered * 0011 | 0101 | 0111 | 1001 | -+ *********-********-********-********/ -+ -+ /* Set Dunit Control low default value */ -+ dunitCtrlLow |= SDRAM_DUNIT_CTRL_LOW_DDR2_DV; -+ -+ switch (minCas) -+ { -+ case DDR2_CL_3: cl = 3; break; -+ case DDR2_CL_4: cl = 4; break; -+ case DDR2_CL_5: cl = 5; break; -+ case DDR2_CL_6: cl = 6; break; -+ default: -+ mvOsOutput("Dram: dunitCtrlLowRegCalc Max. CL out of range %d\n", minCas); -+ return -1; -+ } -+ -+ /* registerd DDR SDRAM? */ -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ { -+ dunitCtrlLow |= (sbOutR[cl-3]) << SDRAM_SB_OUT_DEL_OFFS; -+ } -+ else -+ { -+ dunitCtrlLow |= (sbOutU[cl-3]) << SDRAM_SB_OUT_DEL_OFFS; -+ } -+ -+ DB(mvOsPrintf("\n\ndunitCtrlLowRegCalc: CL = %d, frequencies=%d\n", cl, busClk)); -+ -+ if (busClk <= MV_BOARD_SYSCLK_267MHZ) -+ { -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ cl = cl + 2; -+ else -+ cl = cl + 1; -+ } -+ else -+ { -+ if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) -+ cl = cl + 3; -+ else -+ cl = cl + 2; -+ } -+ -+ DB(mvOsPrintf("dunitCtrlLowRegCalc: SDRAM_SB_IN_DEL_OFFS = %d \n", cl)); -+ dunitCtrlLow |= cl << SDRAM_SB_IN_DEL_OFFS; -+ -+ DB(mvOsPrintf("Dram: Reg dunit control low = %x\n", dunitCtrlLow )); -+ -+ return dunitCtrlLow; -+} -+ -+/******************************************************************************* -+* dunitCtrlHighRegCalc - Calculate sdram dunit control high register -+* -+* DESCRIPTION: Calculate sdram dunit control high register optimized value based -+* on the bus clock. -+* -+* INPUT: -+* busClk - DRAM frequency. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram dunit control high reg value. -+* -+*******************************************************************************/ -+static MV_U32 dunitCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk) -+{ -+ MV_U32 dunitCtrlHigh; -+ dunitCtrlHigh = MV_REG_READ(SDRAM_DUNIT_CTRL_HI_REG); -+ if(busClk > MV_BOARD_SYSCLK_300MHZ) -+ dunitCtrlHigh |= SDRAM__P2D_EN; -+ else -+ dunitCtrlHigh &= ~SDRAM__P2D_EN; -+ -+ if(busClk > MV_BOARD_SYSCLK_267MHZ) -+ dunitCtrlHigh |= (SDRAM__WR_MESH_DELAY_EN | SDRAM__PUP_ZERO_SKEW_EN | SDRAM__ADD_HALF_FCC_EN); -+ -+ /* If ECC support we turn on D2P sample */ -+ dunitCtrlHigh &= ~SDRAM__D2P_EN; /* Clear D2P bit */ -+ if (( pBankInfo->errorCheckType ) && (busClk > MV_BOARD_SYSCLK_267MHZ)) -+ dunitCtrlHigh |= SDRAM__D2P_EN; -+ -+ return dunitCtrlHigh; -+} -+ -+/******************************************************************************* -+* sdramAddrCtrlRegCalc - Calculate sdram address control register -+* -+* DESCRIPTION: Calculate sdram address control register optimized value based -+* on the bank info parameters and the minCas. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram address control reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramAddrCtrlRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_DRAM_BANK_INFO *pBankInfoDIMM1) -+{ -+ MV_U32 addrCtrl = 0; -+ -+ if (pBankInfoDIMM1->size) -+ { -+ switch (pBankInfoDIMM1->sdramWidth) -+ { -+ case 4: /* memory is x4 */ -+ mvOsOutput("sdramAddrCtrlRegCalc: Error - x4 not supported!\n"); -+ return -1; -+ break; -+ case 8: /* memory is x8 */ -+ addrCtrl |= SDRAM_ADDRSEL_X8(2) | SDRAM_ADDRSEL_X8(3); -+ DB(mvOsPrintf("sdramAddrCtrlRegCalc: sdramAddrCtrlRegCalc SDRAM device DIMM2 width x8\n")); -+ break; -+ case 16: -+ addrCtrl |= SDRAM_ADDRSEL_X16(2) | SDRAM_ADDRSEL_X16(3); -+ DB(mvOsPrintf("sdramAddrCtrlRegCalc: sdramAddrCtrlRegCalc SDRAM device DIMM2 width x16\n")); -+ break; -+ default: /* memory width unsupported */ -+ mvOsOutput("sdramAddrCtrlRegCalc: ERR. DRAM chip width is unknown!\n"); -+ return -1; -+ } -+ } -+ -+ switch (pBankInfo->sdramWidth) -+ { -+ case 4: /* memory is x4 */ -+ mvOsOutput("sdramAddrCtrlRegCalc: Error - x4 not supported!\n"); -+ return -1; -+ break; -+ case 8: /* memory is x8 */ -+ addrCtrl |= SDRAM_ADDRSEL_X8(0) | SDRAM_ADDRSEL_X8(1); -+ DB(mvOsPrintf("sdramAddrCtrlRegCalc: sdramAddrCtrlRegCalc SDRAM device width x8\n")); -+ break; -+ case 16: -+ addrCtrl |= SDRAM_ADDRSEL_X16(0) | SDRAM_ADDRSEL_X16(1); -+ DB(mvOsPrintf("sdramAddrCtrlRegCalc: sdramAddrCtrlRegCalc SDRAM device width x16\n")); -+ break; -+ default: /* memory width unsupported */ -+ mvOsOutput("sdramAddrCtrlRegCalc: ERR. DRAM chip width is unknown!\n"); -+ return -1; -+ } -+ -+ /* Note that density is in MB units */ -+ switch (pBankInfo->deviceDensity) -+ { -+ case 256: /* 256 Mbit */ -+ DB(mvOsPrintf("DRAM Device Density 256Mbit\n")); -+ addrCtrl |= SDRAM_DSIZE_256Mb(0) | SDRAM_DSIZE_256Mb(1); -+ break; -+ case 512: /* 512 Mbit */ -+ DB(mvOsPrintf("DRAM Device Density 512Mbit\n")); -+ addrCtrl |= SDRAM_DSIZE_512Mb(0) | SDRAM_DSIZE_512Mb(1); -+ break; -+ case 1024: /* 1 Gbit */ -+ DB(mvOsPrintf("DRAM Device Density 1Gbit\n")); -+ addrCtrl |= SDRAM_DSIZE_1Gb(0) | SDRAM_DSIZE_1Gb(1); -+ break; -+ case 2048: /* 2 Gbit */ -+ DB(mvOsPrintf("DRAM Device Density 2Gbit\n")); -+ addrCtrl |= SDRAM_DSIZE_2Gb(0) | SDRAM_DSIZE_2Gb(1); -+ break; -+ default: -+ mvOsOutput("Dram: sdramAddrCtrl unsupported RAM-Device size %d\n", -+ pBankInfo->deviceDensity); -+ return -1; -+ } -+ -+ if (pBankInfoDIMM1->size) -+ { -+ switch (pBankInfoDIMM1->deviceDensity) -+ { -+ case 256: /* 256 Mbit */ -+ DB(mvOsPrintf("DIMM2: DRAM Device Density 256Mbit\n")); -+ addrCtrl |= SDRAM_DSIZE_256Mb(2) | SDRAM_DSIZE_256Mb(3); -+ break; -+ case 512: /* 512 Mbit */ -+ DB(mvOsPrintf("DIMM2: DRAM Device Density 512Mbit\n")); -+ addrCtrl |= SDRAM_DSIZE_512Mb(2) | SDRAM_DSIZE_512Mb(3); -+ break; -+ case 1024: /* 1 Gbit */ -+ DB(mvOsPrintf("DIMM2: DRAM Device Density 1Gbit\n")); -+ addrCtrl |= SDRAM_DSIZE_1Gb(2) | SDRAM_DSIZE_1Gb(3); -+ break; -+ case 2048: /* 2 Gbit */ -+ DB(mvOsPrintf("DIMM2: DRAM Device Density 2Gbit\n")); -+ addrCtrl |= SDRAM_DSIZE_2Gb(2) | SDRAM_DSIZE_2Gb(3); -+ break; -+ default: -+ mvOsOutput("DIMM2: Dram: sdramAddrCtrl unsupported RAM-Device size %d\n", -+ pBankInfoDIMM1->deviceDensity); -+ return -1; -+ } -+ } -+ /* SDRAM address control */ -+ DB(mvOsPrintf("Dram: setting sdram address control with: %x \n", addrCtrl)); -+ -+ return addrCtrl; -+} -+ -+/******************************************************************************* -+* sdramTimeCtrlLowRegCalc - Calculate sdram timing control low register -+* -+* DESCRIPTION: -+* This function calculates sdram timing control low register -+* optimized value based on the bank info parameters and the minCas. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* minCas - minimum CAS supported. -+* busClk - Bus clock -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram timing control low reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramTimeCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk) -+{ -+ MV_U32 tRp = 0; -+ MV_U32 tRrd = 0; -+ MV_U32 tRcd = 0; -+ MV_U32 tRas = 0; -+ MV_U32 tWr = 0; -+ MV_U32 tWtr = 0; -+ MV_U32 tRtp = 0; -+ MV_U32 timeCtrlLow = 0; -+ -+ MV_U32 bankNum; -+ -+ busClk = busClk / 1000000; /* In MHz */ -+ -+ /* Scan all DRAM banks to find maximum timing values */ -+ for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ tRp = MV_MAX(tRp, pBankInfo[bankNum].minRowPrechargeTime); -+ tRrd = MV_MAX(tRrd, pBankInfo[bankNum].minRowActiveToRowActive); -+ tRcd = MV_MAX(tRcd, pBankInfo[bankNum].minRasToCasDelay); -+ tRas = MV_MAX(tRas, pBankInfo[bankNum].minRasPulseWidth); -+ } -+ -+ /* Extract timing (in ns) from SPD value. We ignore the tenth ns part. */ -+ /* by shifting the data two bits right. */ -+ tRp = tRp >> 2; /* For example 0x50 -> 20ns */ -+ tRrd = tRrd >> 2; -+ tRcd = tRcd >> 2; -+ -+ /* Extract clock cycles from time parameter. We need to round up */ -+ tRp = ((busClk * tRp) / 1000) + (((busClk * tRp) % 1000) ? 1 : 0); -+ DB(mvOsPrintf("Dram Timing Low: tRp = %d ", tRp)); -+ tRrd = ((busClk * tRrd) / 1000) + (((busClk * tRrd) % 1000) ? 1 : 0); -+ /* JEDEC min reqeirments tRrd = 2 */ -+ if (tRrd < 2) -+ tRrd = 2; -+ DB(mvOsPrintf("tRrd = %d ", tRrd)); -+ tRcd = ((busClk * tRcd) / 1000) + (((busClk * tRcd) % 1000) ? 1 : 0); -+ DB(mvOsPrintf("tRcd = %d ", tRcd)); -+ tRas = ((busClk * tRas) / 1000) + (((busClk * tRas) % 1000) ? 1 : 0); -+ DB(mvOsPrintf("tRas = %d ", tRas)); -+ -+ /* tWr and tWtr is different for DDR1 and DDR2. tRtp is only for DDR2 */ -+ /* Scan all DRAM banks to find maximum timing values */ -+ for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ tWr = MV_MAX(tWr, pBankInfo[bankNum].minWriteRecoveryTime); -+ tWtr = MV_MAX(tWtr, pBankInfo[bankNum].minWriteToReadCmdDelay); -+ tRtp = MV_MAX(tRtp, pBankInfo[bankNum].minReadToPrechCmdDelay); -+ } -+ -+ /* Extract timing (in ns) from SPD value. We ignore the tenth ns */ -+ /* part by shifting the data two bits right. */ -+ tWr = tWr >> 2; /* For example 0x50 -> 20ns */ -+ tWtr = tWtr >> 2; -+ tRtp = tRtp >> 2; -+ /* Extract clock cycles from time parameter. We need to round up */ -+ tWr = ((busClk * tWr) / 1000) + (((busClk * tWr) % 1000) ? 1 : 0); -+ DB(mvOsPrintf("tWr = %d ", tWr)); -+ tWtr = ((busClk * tWtr) / 1000) + (((busClk * tWtr) % 1000) ? 1 : 0); -+ /* JEDEC min reqeirments tWtr = 2 */ -+ if (tWtr < 2) -+ tWtr = 2; -+ DB(mvOsPrintf("tWtr = %d ", tWtr)); -+ tRtp = ((busClk * tRtp) / 1000) + (((busClk * tRtp) % 1000) ? 1 : 0); -+ /* JEDEC min reqeirments tRtp = 2 */ -+ if (tRtp < 2) -+ tRtp = 2; -+ DB(mvOsPrintf("tRtp = %d ", tRtp)); -+ -+ /* Note: value of 0 in register means one cycle, 1 means two and so on */ -+ timeCtrlLow = (((tRp - 1) << SDRAM_TRP_OFFS) | -+ ((tRrd - 1) << SDRAM_TRRD_OFFS) | -+ ((tRcd - 1) << SDRAM_TRCD_OFFS) | -+ (((tRas - 1) << SDRAM_TRAS_OFFS) & SDRAM_TRAS_MASK)| -+ ((tWr - 1) << SDRAM_TWR_OFFS) | -+ ((tWtr - 1) << SDRAM_TWTR_OFFS) | -+ ((tRtp - 1) << SDRAM_TRTP_OFFS)); -+ -+ /* Check extended tRas bit */ -+ if ((tRas - 1) & BIT4) -+ timeCtrlLow |= (1 << SDRAM_EXT_TRAS_OFFS); -+ -+ return timeCtrlLow; -+} -+ -+/******************************************************************************* -+* sdramTimeCtrlHighRegCalc - Calculate sdram timing control high register -+* -+* DESCRIPTION: -+* This function calculates sdram timing control high register -+* optimized value based on the bank info parameters and the bus clock. -+* -+* INPUT: -+* pBankInfo - sdram bank parameters -+* busClk - Bus clock -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* sdram timing control high reg value. -+* -+*******************************************************************************/ -+static MV_U32 sdramTimeCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk) -+{ -+ MV_U32 tRfc; -+ MV_U32 timingHigh; -+ MV_U32 timeNs = 0; -+ MV_U32 bankNum; -+ -+ busClk = busClk / 1000000; /* In MHz */ -+ -+ /* Set DDR timing high register static configuration bits */ -+ timingHigh = MV_REG_READ(SDRAM_TIMING_CTRL_HIGH_REG); -+ -+ /* Set DDR timing high register default value */ -+ timingHigh |= SDRAM_TIMING_CTRL_HIGH_REG_DV; -+ -+ /* Clear tRfc field */ -+ timingHigh &= ~SDRAM_TRFC_MASK; -+ -+ /* Scan all DRAM banks to find maximum timing values */ -+ for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ timeNs = MV_MAX(timeNs, pBankInfo[bankNum].minRefreshToActiveCmd); -+ DB(mvOsPrintf("Dram: Timing High: minRefreshToActiveCmd = %d\n", -+ pBankInfo[bankNum].minRefreshToActiveCmd)); -+ } -+ if(busClk >= 333 && mvCtrlModelGet() == MV_78XX0_A1_REV) -+ { -+ timingHigh |= 0x1 << SDRAM_TR2W_W2R_OFFS; -+ } -+ -+ tRfc = ((busClk * timeNs) / 1000) + (((busClk * timeNs) % 1000) ? 1 : 0); -+ /* Note: value of 0 in register means one cycle, 1 means two and so on */ -+ DB(mvOsPrintf("Dram: Timing High: tRfc = %d\n", tRfc)); -+ timingHigh |= (((tRfc - 1) & SDRAM_TRFC_MASK) << SDRAM_TRFC_OFFS); -+ DB(mvOsPrintf("Dram: Timing High: tRfc = %d\n", tRfc)); -+ -+ /* SDRAM timing high */ -+ DB(mvOsPrintf("Dram: setting timing high with: %x \n", timingHigh)); -+ -+ return timingHigh; -+} -+/******************************************************************************* -+* sdramDDr2OdtConfig - Set DRAM DDR2 On Die Termination registers. -+* -+* DESCRIPTION: -+* This function config DDR2 On Die Termination (ODT) registers. -+* -+* INPUT: -+* pBankInfo - bank info parameters. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* None -+*******************************************************************************/ -+static void sdramDDr2OdtConfig(MV_DRAM_BANK_INFO *pBankInfo) -+{ -+ MV_U32 populateBanks = 0; -+ MV_U32 odtCtrlLow, odtCtrlHigh, dunitOdtCtrl; -+ int bankNum; -+ -+ /* Represent the populate banks in binary form */ -+ for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++) -+ { -+ if (0 != pBankInfo[bankNum].size) -+ { -+ populateBanks |= (1 << bankNum); -+ } -+ } -+ -+ switch(populateBanks) -+ { -+ case(BANK_PRESENT_CS0): -+ case(BANK_PRESENT_CS0_CS1): -+ odtCtrlLow = DDR2_ODT_CTRL_LOW_CS0_CS1_DV; -+ odtCtrlHigh = DDR2_ODT_CTRL_HIGH_CS0_CS1_DV; -+ dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS1_DV; -+ break; -+ case(BANK_PRESENT_CS0_CS2): -+ case(BANK_PRESENT_CS0_CS1_CS2): -+ case(BANK_PRESENT_CS0_CS2_CS3): -+ case(BANK_PRESENT_CS0_CS2_CS3_CS4): -+ odtCtrlLow = DDR2_ODT_CTRL_LOW_CS0_CS1_CS2_CS3_DV; -+ odtCtrlHigh = DDR2_ODT_CTRL_HIGH_CS0_CS1_CS2_CS3_DV; -+ dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS1_CS2_CS3_DV; -+ break; -+ default: -+ DB(mvOsPrintf("sdramDDr2OdtConfig: Invalid DRAM bank presence\n")); -+ return; -+ } -+ /* DDR2 SDRAM ODT ctrl low */ -+ DB(mvOsPrintf("Dram: DDR2 setting ODT ctrl low with: %x \n", odtCtrlLow)); -+ MV_REG_WRITE(DRAM_BUF_REG7, odtCtrlLow); -+ -+ /* DDR2 SDRAM ODT ctrl high */ -+ DB(mvOsPrintf("Dram: DDR2 setting ODT ctrl high with: %x \n", odtCtrlHigh)); -+ MV_REG_WRITE(DRAM_BUF_REG8, odtCtrlHigh); -+ -+ /* DDR2 DUNIT ODT ctrl */ -+ if ( ((mvCtrlModelGet() == MV_78XX0_DEV_ID) && (mvCtrlRevGet() == MV_78XX0_Y0_REV)) || -+ (mvCtrlModelGet() == MV_76100_DEV_ID) || -+ (mvCtrlModelGet() == MV_78100_DEV_ID) || -+ (mvCtrlModelGet() == MV_78200_DEV_ID) ) -+ dunitOdtCtrl &= ~(BIT9|BIT8); /* Clear ODT always on */ -+ -+ DB(mvOsPrintf("DUNIT: DDR2 setting ODT ctrl with: %x \n", dunitOdtCtrl)); -+ MV_REG_WRITE(DRAM_BUF_REG9, dunitOdtCtrl); -+ return; -+} -+/******************************************************************************* -+* sdramDdr2TimeLoRegCalc - Set DDR2 DRAM Timing Low registers. -+* -+* DESCRIPTION: -+* This function config DDR2 DRAM Timing low registers. -+* -+* INPUT: -+* minCas - minimum CAS supported. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* DDR2 sdram timing low reg value. -+*******************************************************************************/ -+static MV_U32 sdramDdr2TimeLoRegCalc(MV_U32 minCas) -+{ -+ MV_U8 cl = -1; -+ MV_U32 ddr2TimeLoReg; -+ -+ /* read and clear the feilds we are going to set */ -+ ddr2TimeLoReg = MV_REG_READ(SDRAM_DDR2_TIMING_LO_REG); -+ ddr2TimeLoReg &= ~(SD2TLR_TODT_ON_RD_MASK | -+ SD2TLR_TODT_OFF_RD_MASK | -+ SD2TLR_TODT_ON_CTRL_RD_MASK | -+ SD2TLR_TODT_OFF_CTRL_RD_MASK); -+ -+ if( minCas == DDR2_CL_3 ) -+ { -+ cl = 3; -+ } -+ else if( minCas == DDR2_CL_4 ) -+ { -+ cl = 4; -+ } -+ else if( minCas == DDR2_CL_5 ) -+ { -+ cl = 5; -+ } -+ else if( minCas == DDR2_CL_6 ) -+ { -+ cl = 6; -+ } -+ else -+ { -+ DB(mvOsPrintf("sdramDdr2TimeLoRegCalc: CAS latency %d unsupported. using CAS latency 4\n", -+ minCas)); -+ cl = 4; -+ } -+ -+ ddr2TimeLoReg |= ((cl-3) << SD2TLR_TODT_ON_RD_OFFS); -+ ddr2TimeLoReg |= ( cl << SD2TLR_TODT_OFF_RD_OFFS); -+ ddr2TimeLoReg |= ( cl << SD2TLR_TODT_ON_CTRL_RD_OFFS); -+ ddr2TimeLoReg |= ((cl+3) << SD2TLR_TODT_OFF_CTRL_RD_OFFS); -+ -+ /* DDR2 SDRAM timing low */ -+ DB(mvOsPrintf("Dram: DDR2 setting timing low with: %x \n", ddr2TimeLoReg)); -+ -+ return ddr2TimeLoReg; -+} -+ -+/******************************************************************************* -+* sdramDdr2TimeHiRegCalc - Set DDR2 DRAM Timing High registers. -+* -+* DESCRIPTION: -+* This function config DDR2 DRAM Timing high registers. -+* -+* INPUT: -+* minCas - minimum CAS supported. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* DDR2 sdram timing high reg value. -+*******************************************************************************/ -+static MV_U32 sdramDdr2TimeHiRegCalc(MV_U32 minCas) -+{ -+ MV_U8 cl = -1; -+ MV_U32 ddr2TimeHiReg; -+ -+ /* read and clear the feilds we are going to set */ -+ ddr2TimeHiReg = MV_REG_READ(SDRAM_DDR2_TIMING_HI_REG); -+ ddr2TimeHiReg &= ~(SD2THR_TODT_ON_WR_MASK | -+ SD2THR_TODT_OFF_WR_MASK | -+ SD2THR_TODT_ON_CTRL_WR_MASK | -+ SD2THR_TODT_OFF_CTRL_WR_MASK); -+ -+ if( minCas == DDR2_CL_3 ) -+ { -+ cl = 3; -+ } -+ else if( minCas == DDR2_CL_4 ) -+ { -+ cl = 4; -+ } -+ else if( minCas == DDR2_CL_5 ) -+ { -+ cl = 5; -+ } -+ else if( minCas == DDR2_CL_6 ) -+ { -+ cl = 6; -+ } -+ else -+ { -+ mvOsOutput("sdramDdr2TimeHiRegCalc: CAS latency %d unsupported. using CAS latency 4\n", -+ minCas); -+ cl = 4; -+ } -+ -+ ddr2TimeHiReg |= ((cl-3) << SD2THR_TODT_ON_WR_OFFS); -+ ddr2TimeHiReg |= ( cl << SD2THR_TODT_OFF_WR_OFFS); -+ ddr2TimeHiReg |= ( cl << SD2THR_TODT_ON_CTRL_WR_OFFS); -+ ddr2TimeHiReg |= ((cl+3) << SD2THR_TODT_OFF_CTRL_WR_OFFS); -+ -+ /* DDR2 SDRAM timin high */ -+ DB(mvOsPrintf("Dram: DDR2 setting timing high with: %x \n", ddr2TimeHiReg)); -+ -+ return ddr2TimeHiReg; -+} -+#endif -+ -+/******************************************************************************* -+* mvDramIfCalGet - Get CAS Latency -+* -+* DESCRIPTION: -+* This function get the CAS Latency. -+* -+* INPUT: -+* None -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* CAS latency times 10 (to avoid using floating point). -+* -+*******************************************************************************/ -+MV_U32 mvDramIfCalGet(void) -+{ -+ MV_U32 sdramCasLat, casLatMask; -+ -+ casLatMask = (MV_REG_READ(SDRAM_MODE_REG) & SDRAM_CL_MASK); -+ -+ switch (casLatMask) -+ { -+ case SDRAM_DDR2_CL_3: -+ sdramCasLat = 30; -+ break; -+ case SDRAM_DDR2_CL_4: -+ sdramCasLat = 40; -+ break; -+ case SDRAM_DDR2_CL_5: -+ sdramCasLat = 50; -+ break; -+ case SDRAM_DDR2_CL_6: -+ sdramCasLat = 60; -+ break; -+ default: -+ mvOsOutput("mvDramIfCalGet: Err, unknown DDR2 CAL\n"); -+ return -1; -+ } -+ -+ return sdramCasLat; -+} -+ -+ -+/******************************************************************************* -+* mvDramIfSelfRefreshSet - Put the dram in self refresh mode - -+* -+* DESCRIPTION: -+* add support in power management. -+* -+* -+* INPUT: -+* None -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* None -+* -+*******************************************************************************/ -+ -+MV_VOID mvDramIfSelfRefreshSet() -+{ -+ MV_U32 operReg; -+ -+ operReg = MV_REG_READ(SDRAM_OPERATION_REG); -+ MV_REG_WRITE(SDRAM_OPERATION_REG ,operReg |SDRAM_CMD_SLF_RFRSH); -+ /* Read until register is reset to 0 */ -+ while(MV_REG_READ(SDRAM_OPERATION_REG)); -+} -+/******************************************************************************* -+* mvDramIfDimGetSPDversion - return DIMM SPD version. -+* -+* DESCRIPTION: -+* This function prints the DRAM controller information. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+static void mvDramIfDimGetSPDversion(MV_U32 *pMajor, MV_U32 *pMinor, MV_U32 bankNum) -+{ -+ MV_DIMM_INFO dimmInfo; -+ if (bankNum >= MV_DRAM_MAX_CS ) -+ { -+ DB(mvOsPrintf("Dram: mvDramIfDimGetSPDversion bad params \n")); -+ return ; -+ } -+ memset(&dimmInfo,0,sizeof(dimmInfo)); -+ if ( MV_OK != dimmSpdGet((MV_U32)(bankNum/2), &dimmInfo)) -+ { -+ DB(mvOsPrintf("Dram: ERR dimmSpdGet failed to get dimm info \n")); -+ return ; -+ } -+ *pMajor = dimmInfo.spdRawData[DIMM_SPD_VERSION]/10; -+ *pMinor = dimmInfo.spdRawData[DIMM_SPD_VERSION]%10; -+} -+/******************************************************************************* -+* mvDramIfShow - Show DRAM controller information. -+* -+* DESCRIPTION: -+* This function prints the DRAM controller information. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+void mvDramIfShow(void) -+{ -+ int i, sdramCasLat, sdramCsSize; -+ MV_U32 Major=0, Minor=0; -+ -+ mvOsOutput("DRAM Controller info:\n"); -+ -+ mvOsOutput("Total DRAM "); -+ mvSizePrint(mvDramIfSizeGet()); -+ mvOsOutput("\n"); -+ -+ for(i = 0; i < MV_DRAM_MAX_CS; i++) -+ { -+ sdramCsSize = mvDramIfBankSizeGet(i); -+ if (sdramCsSize) -+ { -+ if (0 == (i & 1)) -+ { -+ mvDramIfDimGetSPDversion(&Major, &Minor,i); -+ mvOsOutput("DIMM %d version %d.%d\n", i/2, Major, Minor); -+ } -+ mvOsOutput("\tDRAM CS[%d] ", i); -+ mvSizePrint(sdramCsSize); -+ mvOsOutput("\n"); -+ } -+ } -+ sdramCasLat = mvDramIfCalGet(); -+ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_ECC_EN) -+ { -+ mvOsOutput("ECC enabled, "); -+ } -+ else -+ { -+ mvOsOutput("ECC Disabled, "); -+ } -+ -+ if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_REGISTERED) -+ { -+ mvOsOutput("Registered DIMM\n"); -+ } -+ else -+ { -+ mvOsOutput("Non registered DIMM\n"); -+ } -+ -+ mvOsOutput("Configured CAS Latency %d.%d\n", sdramCasLat/10, sdramCasLat%10); -+} -+/******************************************************************************* -+* mvDramIfGetFirstCS - find the DRAM bank on the lower address -+* -+* -+* DESCRIPTION: -+* This function return the fisrt CS on address 0 -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* SDRAM_CS0 or SDRAM_CS2 -+* -+*******************************************************************************/ -+MV_U32 mvDramIfGetFirstCS(void) -+{ -+ MV_DRAM_BANK_INFO bankInfo[MV_DRAM_MAX_CS]; -+ -+ if (DRAM_CS_Order[0] == N_A) -+ { -+ mvDramBankInfoGet(SDRAM_CS0, &bankInfo[SDRAM_CS0]); -+#ifdef MV_INCLUDE_SDRAM_CS2 -+ mvDramBankInfoGet(SDRAM_CS2, &bankInfo[SDRAM_CS2]); -+#endif -+ -+#ifdef MV_INCLUDE_SDRAM_CS2 -+ if (bankInfo[SDRAM_CS0].size < bankInfo[SDRAM_CS2].size) -+ { -+ DRAM_CS_Order[0] = SDRAM_CS2; -+ DRAM_CS_Order[1] = SDRAM_CS3; -+ DRAM_CS_Order[2] = SDRAM_CS0; -+ DRAM_CS_Order[3] = SDRAM_CS1; -+ -+ return SDRAM_CS2; -+ } -+#endif -+ DRAM_CS_Order[0] = SDRAM_CS0; -+ DRAM_CS_Order[1] = SDRAM_CS1; -+#ifdef MV_INCLUDE_SDRAM_CS2 -+ DRAM_CS_Order[2] = SDRAM_CS2; -+ DRAM_CS_Order[3] = SDRAM_CS3; -+#endif -+ return SDRAM_CS0; -+ } -+ return DRAM_CS_Order[0]; -+} -+/******************************************************************************* -+* mvDramIfGetCSorder - -+* -+* -+* DESCRIPTION: -+* This function return the fisrt CS on address 0 -+* -+* INPUT: -+* CS number. -+* -+* OUTPUT: -+* CS order. -+* -+* RETURN: -+* SDRAM_CS0 or SDRAM_CS2 -+* -+* NOTE: mvDramIfGetFirstCS must be caled before this subroutine -+*******************************************************************************/ -+MV_U32 mvDramIfGetCSorder(MV_U32 csOrder ) -+{ -+ return DRAM_CS_Order[csOrder]; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.h -new file mode 100644 -index 0000000..b7b596c ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIf.h -@@ -0,0 +1,172 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvDramIfh -+#define __INCmvDramIfh -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* includes */ -+#include "ddr2/mvDramIfRegs.h" -+#include "ddr2/mvDramIfConfig.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+ -+/* defines */ -+/* DRAM Timing parameters */ -+#define SDRAM_TWR 15 /* ns tWr */ -+#define SDRAM_TRFC_64_512M_AT_200MHZ 70 /* ns tRfc for dens 64-512 @ 200MHz */ -+#define SDRAM_TRFC_64_512M 75 /* ns tRfc for dens 64-512 */ -+#define SDRAM_TRFC_1G 120 /* ns tRfc for dens 1GB */ -+#define SDRAM_TR2R_CYC 1 /* cycle for tR2r */ -+ -+#define CAL_AUTO_DETECT 0 /* Do not force CAS latancy (mvDramIfDetect) */ -+#define ECC_DISABLE 1 /* Force ECC to Disable */ -+#define ECC_ENABLE 0 /* Force ECC to ENABLE */ -+/* typedefs */ -+ -+/* enumeration for memory types */ -+typedef enum _mvMemoryType -+{ -+ MEM_TYPE_SDRAM, -+ MEM_TYPE_DDR1, -+ MEM_TYPE_DDR2 -+}MV_MEMORY_TYPE; -+ -+/* enumeration for DDR2 supported CAS Latencies */ -+typedef enum _mvDimmDdr2Cas -+{ -+ DDR2_CL_3 = 0x08, -+ DDR2_CL_4 = 0x10, -+ DDR2_CL_5 = 0x20, -+ DDR2_CL_6 = 0x40, -+ DDR2_CL_FAULT -+} MV_DIMM_DDR2_CAS; -+ -+ -+typedef struct _mvDramBankInfo -+{ -+ MV_MEMORY_TYPE memoryType; /* DDR1, DDR2 or SDRAM */ -+ -+ /* DIMM dimensions */ -+ MV_U32 numOfRowAddr; -+ MV_U32 numOfColAddr; -+ MV_U32 dataWidth; -+ MV_U32 errorCheckType; /* ECC , PARITY..*/ -+ MV_U32 sdramWidth; /* 4,8,16 or 32 */ -+ MV_U32 errorCheckDataWidth; /* 0 - no, 1 - Yes */ -+ MV_U32 burstLengthSupported; -+ MV_U32 numOfBanksOnEachDevice; -+ MV_U32 suportedCasLatencies; -+ MV_U32 refreshInterval; -+ -+ /* DIMM timing parameters */ -+ MV_U32 minCycleTimeAtMaxCasLatPs; -+ MV_U32 minCycleTimeAtMaxCasLatMinus1Ps; -+ MV_U32 minCycleTimeAtMaxCasLatMinus2Ps; -+ MV_U32 minRowPrechargeTime; -+ MV_U32 minRowActiveToRowActive; -+ MV_U32 minRasToCasDelay; -+ MV_U32 minRasPulseWidth; -+ MV_U32 minWriteRecoveryTime; /* DDR2 only */ -+ MV_U32 minWriteToReadCmdDelay; /* DDR2 only */ -+ MV_U32 minReadToPrechCmdDelay; /* DDR2 only */ -+ MV_U32 minRefreshToActiveCmd; /* DDR2 only */ -+ -+ /* Parameters calculated from the extracted DIMM information */ -+ MV_U32 size; -+ MV_U32 deviceDensity; /* 16,64,128,256 or 512 Mbit */ -+ MV_U32 numberOfDevices; -+ -+ /* DIMM attributes (MV_TRUE for yes) */ -+ MV_BOOL registeredAddrAndControlInputs; -+ MV_BOOL registeredDQMBinputs; -+ -+}MV_DRAM_BANK_INFO; -+ -+#include "ddr2/spd/mvSpd.h" -+ -+/* mvDramIf.h API list */ -+MV_VOID mvDramIfBasicAsmInit(MV_VOID); -+MV_STATUS mvDramIfDetect(MV_U32 forcedCl, MV_BOOL eccDisable); -+MV_VOID _mvDramIfConfig(int entryNum); -+ -+MV_U32 mvDramIfBankSizeGet(MV_U32 bankNum); -+MV_U32 mvDramIfBankBaseGet(MV_U32 bankNum); -+MV_U32 mvDramIfSizeGet(MV_VOID); -+MV_U32 mvDramIfCalGet(void); -+MV_STATUS mvDramIfSingleBitErrThresholdSet(MV_U32 threshold); -+MV_VOID mvDramIfSelfRefreshSet(void); -+void mvDramIfShow(void); -+MV_U32 mvDramIfGetFirstCS(void); -+MV_U32 mvDramIfGetCSorder(MV_U32 csOrder ); -+MV_U32 mvDramCsSizeGet(MV_U32 csNum); -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* __INCmvDramIfh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfConfig.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfConfig.h -new file mode 100644 -index 0000000..b008c23 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfConfig.h -@@ -0,0 +1,157 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvDramIfConfigh -+#define __INCmvDramIfConfigh -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* includes */ -+ -+/* defines */ -+ -+/* registers defaults values */ -+ -+#define SDRAM_CONFIG_DV (SDRAM_SRMODE_DRAM | BIT25 | BIT30) -+ -+#define SDRAM_DUNIT_CTRL_LOW_DDR2_DV \ -+ (SDRAM_SRCLK_KEPT | \ -+ SDRAM_CLK1DRV_NORMAL | \ -+ (BIT28 | BIT29)) -+ -+#define SDRAM_ADDR_CTRL_DV 2 -+ -+#define SDRAM_TIMING_CTRL_LOW_REG_DV \ -+ ((0x2 << SDRAM_TRCD_OFFS) | \ -+ (0x2 << SDRAM_TRP_OFFS) | \ -+ (0x1 << SDRAM_TWR_OFFS) | \ -+ (0x0 << SDRAM_TWTR_OFFS) | \ -+ (0x5 << SDRAM_TRAS_OFFS) | \ -+ (0x1 << SDRAM_TRRD_OFFS)) -+ -+/* Note: value of 0 in register means one cycle, 1 means two and so on */ -+#define SDRAM_TIMING_CTRL_HIGH_REG_DV \ -+ ((0x0 << SDRAM_TR2R_OFFS) | \ -+ (0x0 << SDRAM_TR2W_W2R_OFFS) | \ -+ (0x1 << SDRAM_TW2W_OFFS)) -+ -+#define SDRAM_OPEN_PAGES_CTRL_REG_DV SDRAM_OPEN_PAGE_EN -+ -+/* Presence Ctrl Low Ctrl High Dunit Ctrl Ext Mode */ -+/* CS0 0x84210000 0x00000000 0x0000780F 0x00000440 */ -+/* CS0+CS1 0x84210000 0x00000000 0x0000780F 0x00000440 */ -+/* CS0+CS2 0x030C030C 0x00000000 0x0000740F 0x00000404 */ -+/* CS0+CS1+CS2 0x030C030C 0x00000000 0x0000740F 0x00000404 */ -+/* CS0+CS2+CS3 0x030C030C 0x00000000 0x0000740F 0x00000404 */ -+/* CS0+CS1+CS2+CS3 0x030C030C 0x00000000 0x0000740F 0x00000404 */ -+ -+#define DDR2_ODT_CTRL_LOW_CS0_CS1_DV 0x84210000 -+#define DDR2_ODT_CTRL_HIGH_CS0_CS1_DV 0x00000000 -+#define DDR2_DUNIT_ODT_CTRL_CS0_CS1_DV 0x0000E80F -+#ifdef MV78XX0 -+#define DDR_SDRAM_EXT_MODE_CS0_CS1_DV 0x00000040 -+#else -+#define DDR_SDRAM_EXT_MODE_CS0_CS1_DV 0x00000440 -+#endif -+ -+#define DDR2_ODT_CTRL_LOW_CS0_CS1_CS2_CS3_DV 0x030C030C -+#define DDR2_ODT_CTRL_HIGH_CS0_CS1_CS2_CS3_DV 0x00000000 -+#define DDR2_DUNIT_ODT_CTRL_CS0_CS1_CS2_CS3_DV 0x0000F40F -+#ifdef MV78XX0 -+#define DDR_SDRAM_EXT_MODE_CS0_CS1_CS2_CS3_DV 0x00000004 -+#define DDR_SDRAM_EXT_MODE_FAST_CS0_CS1_CS2_CS3_DV 0x00000044 -+#else -+#define DDR_SDRAM_EXT_MODE_CS0_CS1_CS2_CS3_DV 0x00000404 -+#define DDR_SDRAM_EXT_MODE_FAST_CS0_CS1_CS2_CS3_DV 0x00000444 -+#endif -+ -+/* DDR SDRAM Adderss/Control and Data Pads Calibration default values */ -+#define DDR2_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV \ -+ (3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS) -+ -+#define DDR2_DATA_PAD_STRENGTH_TYPICAL_DV \ -+ (3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS) -+ -+/* DDR SDRAM Mode Register default value */ -+#define DDR2_MODE_REG_DV (SDRAM_BURST_LEN_4 | SDRAM_WR_3_CYC) -+/* DDR SDRAM Timing parameter default values */ -+#define SDRAM_TIMING_CTRL_LOW_REG_DEFAULT 0x33136552 -+#define SDRAM_TRFC_DEFAULT_VALUE 0x34 -+#define SDRAM_TRFC_DEFAULT SDRAM_TRFC_DEFAULT_VALUE -+#define SDRAM_TW2W_DEFALT (0x1 << SDRAM_TW2W_OFFS) -+ -+#define SDRAM_TIMING_CTRL_HIGH_REG_DEFAULT (SDRAM_TRFC_DEFAULT | SDRAM_TW2W_DEFALT) -+ -+#define SDRAM_FTDLL_REG_DEFAULT_LEFT 0x88C800 -+#define SDRAM_FTDLL_REG_DEFAULT_RIGHT 0x88C800 -+#define SDRAM_FTDLL_REG_DEFAULT_UP 0x88C800 -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* __INCmvDramIfh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfRegs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfRegs.h -new file mode 100644 -index 0000000..c2458a6 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfRegs.h -@@ -0,0 +1,423 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvDramIfRegsh -+#define __INCmvDramIfRegsh -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* DDR SDRAM Controller Address Decode Registers */ -+ /* SDRAM CSn Base Address Register (SCBAR) */ -+#define SDRAM_BASE_ADDR_REG(cpu,csNum) (0x1500 + ((csNum) * 8) + ((cpu) * 0x70)) -+#define SCBAR_BASE_OFFS 16 -+#define SCBAR_BASE_MASK (0xffff << SCBAR_BASE_OFFS) -+#define SCBAR_BASE_ALIGNMENT 0x10000 -+ -+/* SDRAM CSn Size Register (SCSR) */ -+#define SDRAM_SIZE_REG(cpu,csNum) (0x1504 + ((csNum) * 8) + ((cpu) * 0x70)) -+#define SCSR_SIZE_OFFS 24 -+#define SCSR_SIZE_MASK (0xff << SCSR_SIZE_OFFS) -+#define SCSR_SIZE_ALIGNMENT 0x1000000 -+#define SCSR_WIN_EN BIT0 -+ -+/* configuration register */ -+#define SDRAM_CONFIG_REG (DRAM_BASE + 0x1400) -+#define SDRAM_REFRESH_OFFS 0 -+#define SDRAM_REFRESH_MAX 0x3FFF -+#define SDRAM_REFRESH_MASK (SDRAM_REFRESH_MAX << SDRAM_REFRESH_OFFS) -+#define SDRAM_DWIDTH_OFFS 15 -+#define SDRAM_DWIDTH_MASK (1 << SDRAM_DWIDTH_OFFS) -+#define SDRAM_DWIDTH_32BIT (0 << SDRAM_DWIDTH_OFFS) -+#define SDRAM_DWIDTH_64BIT (1 << SDRAM_DWIDTH_OFFS) -+#define SDRAM_REGISTERED (1 << 17) -+#define SDRAM_ECC_OFFS 18 -+#define SDRAM_ECC_MASK (1 << SDRAM_ECC_OFFS) -+#define SDRAM_ECC_DIS (0 << SDRAM_ECC_OFFS) -+#define SDRAM_ECC_EN (1 << SDRAM_ECC_OFFS) -+#define SDRAM_IERR_OFFS 19 -+#define SDRAM_IERR_MASK (1 << SDRAM_IERR_OFFS) -+#define SDRAM_IERR_REPORTE (0 << SDRAM_IERR_OFFS) -+#define SDRAM_IERR_IGNORE (1 << SDRAM_IERR_OFFS) -+#define SDRAM_SRMODE_OFFS 24 -+#define SDRAM_SRMODE_MASK (1 << SDRAM_SRMODE_OFFS) -+#define SDRAM_SRMODE_POWER (0 << SDRAM_SRMODE_OFFS) -+#define SDRAM_SRMODE_DRAM (1 << SDRAM_SRMODE_OFFS) -+ -+/* dunit control low register */ -+#define SDRAM_DUNIT_CTRL_REG (DRAM_BASE + 0x1404) -+#define SDRAM_2T_OFFS 4 -+#define SDRAM_2T_MASK (1 << SDRAM_2T_OFFS) -+#define SDRAM_2T_MODE (1 << SDRAM_2T_OFFS) -+ -+#define SDRAM_SRCLK_OFFS 5 -+#define SDRAM_SRCLK_MASK (1 << SDRAM_SRCLK_OFFS) -+#define SDRAM_SRCLK_KEPT (0 << SDRAM_SRCLK_OFFS) -+#define SDRAM_SRCLK_GATED (1 << SDRAM_SRCLK_OFFS) -+#define SDRAM_CTRL_POS_OFFS 6 -+#define SDRAM_CTRL_POS_MASK (1 << SDRAM_CTRL_POS_OFFS) -+#define SDRAM_CTRL_POS_FALL (0 << SDRAM_CTRL_POS_OFFS) -+#define SDRAM_CTRL_POS_RISE (1 << SDRAM_CTRL_POS_OFFS) -+#define SDRAM_CLK1DRV_OFFS 12 -+#define SDRAM_CLK1DRV_MASK (1 << SDRAM_CLK1DRV_OFFS) -+#define SDRAM_CLK1DRV_HIGH_Z (0 << SDRAM_CLK1DRV_OFFS) -+#define SDRAM_CLK1DRV_NORMAL (1 << SDRAM_CLK1DRV_OFFS) -+#define SDRAM_CLK2DRV_OFFS 13 -+#define SDRAM_CLK2DRV_MASK (1 << SDRAM_CLK2DRV_OFFS) -+#define SDRAM_CLK2DRV_HIGH_Z (0 << SDRAM_CLK2DRV_OFFS) -+#define SDRAM_CLK2DRV_NORMAL (1 << SDRAM_CLK2DRV_OFFS) -+#define SDRAM_SB_OUT_DEL_OFFS 20 -+#define SDRAM_SB_OUT_DEL_MAX 0xf -+#define SDRAM_SB_OUT_MASK (SDRAM_SB_OUT_DEL_MAX<<SDRAM_SB_OUT_DEL_OFFS) -+#define SDRAM_SB_IN_DEL_OFFS 24 -+#define SDRAM_SB_IN_DEL_MAX 0xf -+#define SDRAM_SB_IN_MASK (SDRAM_SB_IN_DEL_MAX<<SDRAM_SB_IN_DEL_OFFS) -+ -+/* dunit control hight register */ -+#define SDRAM_DUNIT_CTRL_HI_REG (DRAM_BASE + 0x1424) -+#define SDRAM__D2P_OFFS 7 -+#define SDRAM__D2P_EN (1 << SDRAM__D2P_OFFS) -+#define SDRAM__P2D_OFFS 8 -+#define SDRAM__P2D_EN (1 << SDRAM__P2D_OFFS) -+#define SDRAM__ADD_HALF_FCC_OFFS 9 -+#define SDRAM__ADD_HALF_FCC_EN (1 << SDRAM__ADD_HALF_FCC_OFFS) -+#define SDRAM__PUP_ZERO_SKEW_OFFS 10 -+#define SDRAM__PUP_ZERO_SKEW_EN (1 << SDRAM__PUP_ZERO_SKEW_OFFS) -+#define SDRAM__WR_MESH_DELAY_OFFS 11 -+#define SDRAM__WR_MESH_DELAY_EN (1 << SDRAM__WR_MESH_DELAY_OFFS) -+ -+/* sdram timing control low register */ -+#define SDRAM_TIMING_CTRL_LOW_REG (DRAM_BASE + 0x1408) -+#define SDRAM_TRCD_OFFS 4 -+#define SDRAM_TRCD_MASK (0xF << SDRAM_TRCD_OFFS) -+#define SDRAM_TRP_OFFS 8 -+#define SDRAM_TRP_MASK (0xF << SDRAM_TRP_OFFS) -+#define SDRAM_TWR_OFFS 12 -+#define SDRAM_TWR_MASK (0xF << SDRAM_TWR_OFFS) -+#define SDRAM_TWTR_OFFS 16 -+#define SDRAM_TWTR_MASK (0xF << SDRAM_TWTR_OFFS) -+#define SDRAM_TRAS_OFFS 0 -+#define SDRAM_TRAS_MASK (0xF << SDRAM_TRAS_OFFS) -+#define SDRAM_EXT_TRAS_OFFS 20 -+#define SDRAM_EXT_TRAS_MASK (0x1 << SDRAM_EXT_TRAS_OFFS) -+#define SDRAM_TRRD_OFFS 24 -+#define SDRAM_TRRD_MASK (0xF << SDRAM_TRRD_OFFS) -+#define SDRAM_TRTP_OFFS 28 -+#define SDRAM_TRTP_MASK (0xF << SDRAM_TRTP_OFFS) -+#define SDRAM_TRTP_DDR1 (0x1 << SDRAM_TRTP_OFFS) -+ -+/* sdram timing control high register */ -+#define SDRAM_TIMING_CTRL_HIGH_REG (DRAM_BASE + 0x140c) -+#define SDRAM_TRFC_OFFS 0 -+#define SDRAM_TRFC_MASK (0x3F << SDRAM_TRFC_OFFS) -+#define SDRAM_TR2R_OFFS 7 -+#define SDRAM_TR2R_MASK (0x3 << SDRAM_TR2R_OFFS) -+#define SDRAM_TR2W_W2R_OFFS 9 -+#define SDRAM_TR2W_W2R_MASK (0x3 << SDRAM_TR2W_W2R_OFFS) -+#define SDRAM_TW2W_OFFS 11 -+#define SDRAM_TW2W_MASK (0x3 << SDRAM_TW2W_OFFS) -+ -+/* sdram DDR2 timing low register (SD2TLR) */ -+#define SDRAM_DDR2_TIMING_LO_REG (DRAM_BASE + 0x1428) -+#define SD2TLR_TODT_ON_RD_OFFS 4 -+#define SD2TLR_TODT_ON_RD_MASK (0xF << SD2TLR_TODT_ON_RD_OFFS) -+#define SD2TLR_TODT_OFF_RD_OFFS 8 -+#define SD2TLR_TODT_OFF_RD_MASK (0xF << SD2TLR_TODT_OFF_RD_OFFS) -+#define SD2TLR_TODT_ON_CTRL_RD_OFFS 12 -+#define SD2TLR_TODT_ON_CTRL_RD_MASK (0xF << SD2TLR_TODT_ON_CTRL_RD_OFFS) -+#define SD2TLR_TODT_OFF_CTRL_RD_OFFS 16 -+#define SD2TLR_TODT_OFF_CTRL_RD_MASK (0xF << SD2TLR_TODT_OFF_CTRL_RD_OFFS) -+ -+/* sdram DDR2 timing high register (SD2TLR) */ -+#define SDRAM_DDR2_TIMING_HI_REG (DRAM_BASE + 0x147C) -+#define SD2THR_TODT_ON_WR_OFFS 0 -+#define SD2THR_TODT_ON_WR_MASK (0xF << SD2THR_TODT_ON_WR_OFFS) -+#define SD2THR_TODT_OFF_WR_OFFS 4 -+#define SD2THR_TODT_OFF_WR_MASK (0xF << SD2THR_TODT_OFF_WR_OFFS) -+#define SD2THR_TODT_ON_CTRL_WR_OFFS 8 -+#define SD2THR_TODT_ON_CTRL_WR_MASK (0xF << SD2THR_TODT_ON_CTRL_WR_OFFS) -+#define SD2THR_TODT_OFF_CTRL_WR_OFFS 12 -+#define SD2THR_TODT_OFF_CTRL_WR_MASK (0xF << SD2THR_TODT_OFF_CTRL_WR_OFFS) -+ -+/* address control register */ -+#define SDRAM_ADDR_CTRL_REG (DRAM_BASE + 0x1410) -+#define SDRAM_ADDRSEL_OFFS(cs) (4 * (cs)) -+#define SDRAM_ADDRSEL_MASK(cs) (0x3 << SDRAM_ADDRSEL_OFFS(cs)) -+#define SDRAM_ADDRSEL_X8(cs) (0x0 << SDRAM_ADDRSEL_OFFS(cs)) -+#define SDRAM_ADDRSEL_X16(cs) (0x1 << SDRAM_ADDRSEL_OFFS(cs)) -+#define SDRAM_DSIZE_OFFS(cs) (2 + 4 * (cs)) -+#define SDRAM_DSIZE_MASK(cs) (0x3 << SDRAM_DSIZE_OFFS(cs)) -+#define SDRAM_DSIZE_256Mb(cs) (0x1 << SDRAM_DSIZE_OFFS(cs)) -+#define SDRAM_DSIZE_512Mb(cs) (0x2 << SDRAM_DSIZE_OFFS(cs)) -+#define SDRAM_DSIZE_1Gb(cs) (0x3 << SDRAM_DSIZE_OFFS(cs)) -+#define SDRAM_DSIZE_2Gb(cs) (0x0 << SDRAM_DSIZE_OFFS(cs)) -+ -+/* SDRAM Open Pages Control registers */ -+#define SDRAM_OPEN_PAGE_CTRL_REG (DRAM_BASE + 0x1414) -+#define SDRAM_OPEN_PAGE_EN (0 << 0) -+#define SDRAM_OPEN_PAGE_DIS (1 << 0) -+ -+/* sdram opertion register */ -+#define SDRAM_OPERATION_REG (DRAM_BASE + 0x1418) -+#define SDRAM_CMD_OFFS 0 -+#define SDRAM_CMD_MASK (0xF << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_NORMAL (0x0 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_PRECHARGE_ALL (0x1 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_REFRESH_ALL (0x2 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_REG_SET_CMD (0x3 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_EXT_MODE_SET (0x4 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_NOP (0x5 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_SLF_RFRSH (0x7 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_EMRS2_CMD (0x8 << SDRAM_CMD_OFFS) -+#define SDRAM_CMD_EMRS3_CMD (0x9 << SDRAM_CMD_OFFS) -+ -+/* sdram mode register */ -+#define SDRAM_MODE_REG (DRAM_BASE + 0x141c) -+#define SDRAM_BURST_LEN_OFFS 0 -+#define SDRAM_BURST_LEN_MASK (0x7 << SDRAM_BURST_LEN_OFFS) -+#define SDRAM_BURST_LEN_4 (0x2 << SDRAM_BURST_LEN_OFFS) -+#define SDRAM_CL_OFFS 4 -+#define SDRAM_CL_MASK (0x7 << SDRAM_CL_OFFS) -+#define SDRAM_DDR2_CL_3 (0x3 << SDRAM_CL_OFFS) -+#define SDRAM_DDR2_CL_4 (0x4 << SDRAM_CL_OFFS) -+#define SDRAM_DDR2_CL_5 (0x5 << SDRAM_CL_OFFS) -+#define SDRAM_DDR2_CL_6 (0x6 << SDRAM_CL_OFFS) -+ -+#define SDRAM_TM_OFFS 7 -+#define SDRAM_TM_MASK (1 << SDRAM_TM_OFFS) -+#define SDRAM_TM_NORMAL (0 << SDRAM_TM_OFFS) -+#define SDRAM_TM_TEST_MODE (1 << SDRAM_TM_OFFS) -+#define SDRAM_DLL_OFFS 8 -+#define SDRAM_DLL_MASK (1 << SDRAM_DLL_OFFS) -+#define SDRAM_DLL_NORMAL (0 << SDRAM_DLL_OFFS) -+#define SDRAM_DLL_RESET (1 << SDRAM_DLL_OFFS) -+#define SDRAM_WR_OFFS 9 -+#define SDRAM_WR_MAX 7 -+#define SDRAM_WR_MASK (SDRAM_WR_MAX << SDRAM_WR_OFFS) -+#define SDRAM_WR_2_CYC (1 << SDRAM_WR_OFFS) -+#define SDRAM_WR_3_CYC (2 << SDRAM_WR_OFFS) -+#define SDRAM_WR_4_CYC (3 << SDRAM_WR_OFFS) -+#define SDRAM_WR_5_CYC (4 << SDRAM_WR_OFFS) -+#define SDRAM_WR_6_CYC (5 << SDRAM_WR_OFFS) -+#define SDRAM_PD_OFFS 12 -+#define SDRAM_PD_MASK (1 << SDRAM_PD_OFFS) -+#define SDRAM_PD_FAST_EXIT (0 << SDRAM_PD_OFFS) -+#define SDRAM_PD_SLOW_EXIT (1 << SDRAM_PD_OFFS) -+ -+/* DDR SDRAM Extended Mode register (DSEMR) */ -+#define SDRAM_EXTENDED_MODE_REG (DRAM_BASE + 0x1420) -+#define DSEMR_DLL_ENABLE 0 -+#define DSEMR_DLL_DISABLE 1 -+#define DSEMR_DS_OFFS 1 -+#define DSEMR_DS_MASK (1 << DSEMR_DS_OFFS) -+#define DSEMR_DS_NORMAL (0 << DSEMR_DS_OFFS) -+#define DSEMR_DS_REDUCED (1 << DSEMR_DS_OFFS) -+#define DSEMR_QOFF_OUTPUT_BUFF_EN (0 << 12) -+#define DSEMR_RTT0_OFFS 2 -+#define DSEMR_RTT1_OFFS 6 -+#define DSEMR_RTT_ODT_DISABLE ((0 << DSEMR_RTT0_OFFS)||(0 << DSEMR_RTT1_OFFS)) -+#define DSEMR_RTT_ODT_75_OHM ((1 << DSEMR_RTT0_OFFS)||(0 << DSEMR_RTT1_OFFS)) -+#define DSEMR_RTT_ODT_150_OHM ((0 << DSEMR_RTT0_OFFS)||(1 << DSEMR_RTT1_OFFS)) -+#define DSEMR_RTT_ODT_50_OHM ((1 << DSEMR_RTT0_OFFS)||(1 << DSEMR_RTT1_OFFS)) -+#define DSEMR_DQS_OFFS 10 -+#define DSEMR_DQS_MASK (1 << DSEMR_DQS_OFFS) -+#define DSEMR_DQS_DIFFERENTIAL (0 << DSEMR_DQS_OFFS) -+#define DSEMR_DQS_SINGLE_ENDED (1 << DSEMR_DQS_OFFS) -+#define DSEMR_RDQS_ENABLE (1 << 11) -+#define DSEMR_QOFF_OUTPUT_BUFF_EN (0 << 12) -+#define DSEMR_QOFF_OUTPUT_BUFF_DIS (1 << 12) -+ -+/* DDR SDRAM Operation Control Register */ -+#define SDRAM_OPERATION_CTRL_REG (DRAM_BASE + 0x142c) -+ -+/* Dunit FTDLL Configuration Register */ -+#define SDRAM_FTDLL_CONFIG_LEFT_REG (DRAM_BASE + 0x1484) -+#define SDRAM_FTDLL_CONFIG_RIGHT_REG (DRAM_BASE + 0x161C) -+#define SDRAM_FTDLL_CONFIG_UP_REG (DRAM_BASE + 0x1620) -+ -+/* Pads Calibration register */ -+#define SDRAM_ADDR_CTRL_PADS_CAL_REG (DRAM_BASE + 0x14c0) -+#define SDRAM_DATA_PADS_CAL_REG (DRAM_BASE + 0x14c4) -+#define SDRAM_DRVN_OFFS 0 -+#define SDRAM_DRVN_MASK (0x3F << SDRAM_DRVN_OFFS) -+#define SDRAM_DRVP_OFFS 6 -+#define SDRAM_DRVP_MASK (0x3F << SDRAM_DRVP_OFFS) -+#define SDRAM_PRE_DRIVER_STRENGTH_OFFS 12 -+#define SDRAM_PRE_DRIVER_STRENGTH_MASK (3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS) -+#define SDRAM_TUNE_EN BIT16 -+#define SDRAM_LOCKN_OFFS 17 -+#define SDRAM_LOCKN_MAKS (0x3F << SDRAM_LOCKN_OFFS) -+#define SDRAM_LOCKP_OFFS 23 -+#define SDRAM_LOCKP_MAKS (0x3F << SDRAM_LOCKP_OFFS) -+#define SDRAM_WR_EN (1 << 31) -+ -+/* DDR2 SDRAM ODT Control (Low) Register (DSOCLR) */ -+#define DDR2_SDRAM_ODT_CTRL_LOW_REG (DRAM_BASE + 0x1494) -+#define DSOCLR_ODT_RD_OFFS(odtNum) (odtNum * 4) -+#define DSOCLR_ODT_RD_MASK(odtNum) (0xf << DSOCLR_ODT_RD_OFFS(odtNum)) -+#define DSOCLR_ODT_RD(odtNum, bank) ((1 << bank) << DSOCLR_ODT_RD_OFFS(odtNum)) -+#define DSOCLR_ODT_WR_OFFS(odtNum) (16 + (odtNum * 4)) -+#define DSOCLR_ODT_WR_MASK(odtNum) (0xf << DSOCLR_ODT_WR_OFFS(odtNum)) -+#define DSOCLR_ODT_WR(odtNum, bank) ((1 << bank) << DSOCLR_ODT_WR_OFFS(odtNum)) -+ -+/* DDR2 SDRAM ODT Control (High) Register (DSOCHR) */ -+#define DDR2_SDRAM_ODT_CTRL_HIGH_REG (DRAM_BASE + 0x1498) -+/* Optional control values to DSOCHR_ODT_EN macro */ -+#define DDR2_ODT_CTRL_DUNIT 0 -+#define DDR2_ODT_CTRL_NEVER 1 -+#define DDR2_ODT_CTRL_ALWAYS 3 -+#define DSOCHR_ODT_EN_OFFS(odtNum) (odtNum * 2) -+#define DSOCHR_ODT_EN_MASK(odtNum) (0x3 << DSOCHR_ODT_EN_OFFS(odtNum)) -+#define DSOCHR_ODT_EN(odtNum, ctrl) (ctrl << DSOCHR_ODT_EN_OFFS(odtNum)) -+ -+/* DDR2 Dunit ODT Control Register (DDOCR)*/ -+#define DDR2_DUNIT_ODT_CONTROL_REG (DRAM_BASE + 0x149c) -+#define DDOCR_ODT_RD_OFFS 0 -+#define DDOCR_ODT_RD_MASK (0xf << DDOCR_ODT_RD_OFFS) -+#define DDOCR_ODT_RD(bank) ((1 << bank) << DDOCR_ODT_RD_OFFS) -+#define DDOCR_ODT_WR_OFFS 4 -+#define DDOCR_ODT_WR_MASK (0xf << DDOCR_ODT_WR_OFFS) -+#define DDOCR_ODT_WR(bank) ((1 << bank) << DDOCR_ODT_WR_OFFS) -+#define DSOCR_ODT_EN_OFFS 8 -+#define DSOCR_ODT_EN_MASK (0x3 << DSOCR_ODT_EN_OFFS) -+/* For ctrl parameters see DDR2 SDRAM ODT Control (High) Register (0x1498) above. */ -+#define DSOCR_ODT_EN(ctrl) (ctrl << DSOCR_ODT_EN_OFFS) -+#define DSOCR_ODT_SEL_DISABLE 0 -+#define DSOCR_ODT_SEL_75_OHM 2 -+#define DSOCR_ODT_SEL_150_OHM 1 -+#define DSOCR_ODT_SEL_50_OHM 3 -+#define DSOCR_DQ_ODT_SEL_OFFS 10 -+#define DSOCR_DQ_ODT_SEL_MASK (0x3 << DSOCR_DQ_ODT_SEL_OFFS) -+#define DSOCR_DQ_ODT_SEL(odtSel) (odtSel << DSOCR_DQ_ODT_SEL_OFFS) -+#define DSOCR_ST_ODT_SEL_OFFS 12 -+#define DSOCR_ST_ODT_SEL_MASK (0x3 << DSOCR_ST_ODT_SEL_OFFS) -+#define DSOCR_ST_ODT_SEL(odtSel) (odtSel << DSOCR_ST_ODT_SEL_OFFS) -+#define DSOCR_ST_ODT_EN (1 << 14) -+ -+/* DDR SDRAM Initialization Control Register (DSICR) */ -+#define DDR_SDRAM_INIT_CTRL_REG (DRAM_BASE + 0x1480) -+#define DSICR_INIT_EN (1 << 0) -+#define DSICR_T200_SET (1 << 8) -+ -+/* sdram extended mode2 register (SEM2R) */ -+#define SDRAM_EXTENDED_MODE2_REG (DRAM_BASE + 0x148C) -+#define SEM2R_EMRS2_DDR2_OFFS 0 -+#define SEM2R_EMRS2_DDR2_MASK (0x7FFF << SEM2R_EMRS2_DDR2_OFFS) -+ -+/* sdram extended mode3 register (SEM3R) */ -+#define SDRAM_EXTENDED_MODE3_REG (DRAM_BASE + 0x1490) -+#define SEM3R_EMRS3_DDR2_OFFS 0 -+#define SEM3R_EMRS3_DDR2_MASK (0x7FFF << SEM3R_EMRS3_DDR2_OFFS) -+ -+/* sdram error registers */ -+#define SDRAM_ERROR_CAUSE_REG (DRAM_BASE + 0x14d0) -+#define SDRAM_ERROR_MASK_REG (DRAM_BASE + 0x14d4) -+#define SDRAM_ERROR_DATA_LOW_REG (DRAM_BASE + 0x1444) -+#define SDRAM_ERROR_DATA_HIGH_REG (DRAM_BASE + 0x1440) -+#define SDRAM_ERROR_ADDR_REG (DRAM_BASE + 0x1450) -+#define SDRAM_ERROR_ECC_REG (DRAM_BASE + 0x1448) -+#define SDRAM_CALC_ECC_REG (DRAM_BASE + 0x144c) -+#define SDRAM_ECC_CONTROL_REG (DRAM_BASE + 0x1454) -+#define SDRAM_SINGLE_BIT_ERR_CNTR_REG (DRAM_BASE + 0x1458) -+#define SDRAM_DOUBLE_BIT_ERR_CNTR_REG (DRAM_BASE + 0x145c) -+ -+/* SDRAM Error Cause Register (SECR) */ -+#define SECR_SINGLE_BIT_ERR BIT0 -+#define SECR_DOUBLE_BIT_ERR BIT1 -+#define SECR_DATA_PATH_PARITY_ERR BIT2 -+/* SDRAM Error Address Register (SEAR) */ -+#define SEAR_ERR_TYPE_OFFS 0 -+#define SEAR_ERR_TYPE_MASK (1 << SEAR_ERR_TYPE_OFFS) -+#define SEAR_ERR_TYPE_SINGLE 0 -+#define SEAR_ERR_TYPE_DOUBLE (1 << SEAR_ERR_TYPE_OFFS) -+#define SEAR_ERR_CS_OFFS 1 -+#define SEAR_ERR_CS_MASK (3 << SEAR_ERR_CS_OFFS) -+#define SEAR_ERR_CS(csNum) (csNum << SEAR_ERR_CS_OFFS) -+#define SEAR_ERR_ADDR_OFFS 3 -+#define SEAR_ERR_ADDR_MASK (0x1FFFFFFF << SEAR_ERR_ADDR_OFFS) -+ -+/* SDRAM ECC Control Register (SECR) */ -+#define SECR_FORCEECC_OFFS 0 -+#define SECR_FORCEECC_MASK (0xFF << SECR_FORCEECC_OFFS) -+#define SECR_FORCEEN_OFFS 8 -+#define SECR_FORCEEN_MASK (1 << SECR_FORCEEN_OFFS) -+#define SECR_ECC_CALC_MASK (0 << SECR_FORCEEN_OFFS) -+#define SECR_ECC_USER_MASK (1 << SECR_FORCEEN_OFFS) -+#define SECR_PERRPROP_EN BIT9 -+#define SECR_CNTMODE_OFFS 10 -+#define SECR_CNTMODE_MASK (1 << SECR_CNTMODE_OFFS) -+#define SECR_ALL_IN_CS0 (0 << SECR_CNTMODE_OFFS) -+#define SECR_NORMAL_COUNTER (1 << SECR_CNTMODE_OFFS) -+#define SECR_THRECC_OFFS 16 -+#define SECR_THRECC_MAX 0xFF -+#define SECR_THRECC_MASK (SECR_THRECC_MAX << SECR_THRECC_OFFS) -+#define SECR_THRECC(threshold) (threshold << SECR_THRECC_OFFS) -+ -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* __INCmvDramIfRegsh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfStaticInit.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfStaticInit.h -new file mode 100644 -index 0000000..5b3ed85 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/mvDramIfStaticInit.h -@@ -0,0 +1,179 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvDramIfStaticInith -+#define __INCmvDramIfStaticInith -+ -+#ifdef MV_STATIC_DRAM_ON_BOARD -+#define STATIC_DRAM_BANK_1 -+#undef STATIC_DRAM_BANK_2 -+#undef STATIC_DRAM_BANK_3 -+#undef STATIC_DRAM_BANK_4 -+ -+ -+#ifdef MV_DIMM_TS256MLQ72V5U -+#define STATIC_DRAM_BANK_2 -+#define STATIC_DRAM_BANK_3 -+#undef STATIC_DRAM_BANK_4 -+ -+#define STATIC_SDRAM_CONFIG_REG 0x4724481A /* offset 0x1400 - DMA reg-0xf1000814 */ -+#define STATIC_SDRAM_DUNIT_CTRL_REG 0x37707450 /* offset 0x1404 - DMA reg-0xf100081c */ -+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG 0x11A13330 /* offset 0x1408 - DMA reg-0xf1000824 */ -+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG 0x00000601 /* offset 0x140c - DMA reg-0xf1000828 */ -+#define STATIC_SDRAM_ADDR_CTRL_REG 0x00001CB2 /* offset 0x1410 - DMA reg-0xf1000820 */ -+#define STATIC_SDRAM_MODE_REG 0x00000642 /* offset 0x141c - DMA reg-0xf1000818 */ -+#define STATIC_SDRAM_ODT_CTRL_LOW 0x030C030C /* 0x1494 */ -+#define STATIC_SDRAM_ODT_CTRL_HI 0x00000000 /* 0x1498 */ -+#define STATIC_SDRAM_DUNIT_ODT_CTRL 0x0000740F /* 0x149c */ -+#define STATIC_SDRAM_EXT_MODE 0x00000404 /* 0x1420 */ -+#define STATIC_SDRAM_DDR2_TIMING_LO 0x00074410 /* 0x1428 */ -+#define STATIC_SDRAM_DDR2_TIMING_HI 0x00007441 /* 0x147C */ -+ -+#define STATIC_SDRAM_RANK0_SIZE_DIMM0 0x3FFF /* size bank0 dimm0 - DMA reg-0xf1000810 */ -+#define STATIC_SDRAM_RANK1_SIZE_DIMM0 0x3FFF /* size bank1 dimm0 */ -+#define STATIC_SDRAM_RANK0_SIZE_DIMM1 0x3FFF /* size bank0 dimm1 */ -+#define STATIC_SDRAM_RANK1_SIZE_DIMM1 0x0 /* size bank1 dimm1 */ -+ -+#endif /* TS256MLQ72V5U */ -+ -+ -+#ifdef MV_MT9VDDT3272AG -+/* one DIMM 256M */ -+#define STATIC_SDRAM_CONFIG_REG 0x5820040d /* offset 0x1400 - DMA reg-0xf1000814 */ -+#define STATIC_SDRAM_DUNIT_CTRL_REG 0xC4000540 /* offset 0x1404 - DMA reg-0xf100081c */ -+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG 0x01602220 /* offset 0x1408 - DMA reg-0xf1000824 */ -+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG 0x0000000b /* offset 0x140c - DMA reg-0xf1000828 */ -+#define STATIC_SDRAM_ADDR_CTRL_REG 0x00000012 /* offset 0x1410 - DMA reg-0xf1000820 */ -+#define STATIC_SDRAM_MODE_REG 0x00000062 /* offset 0x141c - DMA reg-0xf1000818 */ -+#define STATIC_SDRAM_RANK0_SIZE_DIMM0 0x0fff /* size bank0 dimm0 - DMA reg-0xf1000810 */ -+#define STATIC_SDRAM_RANK0_SIZE_DIMM1 0x0 /* size bank0 dimm1 */ -+ -+#endif /* MV_MT9VDDT3272AG */ -+ -+ -+ -+#ifdef MV_D27RB12P -+/* -+Two DIMM 512M + ECC enabled, Registered DIMM CAS Latency 2.5 -+*/ -+ -+#define STATIC_SDRAM_CONFIG_REG 0x6826081E /* offset 0x1400 - DMA reg-0xf1000814 */ -+#define STATIC_SDRAM_DUNIT_CTRL_REG 0xC5000540 /* offset 0x1404 - DMA reg-0xf100081c */ -+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG 0x01501220 /* offset 0x1408 - DMA reg-0xf1000824 */ -+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG 0x00000009 /* offset 0x140c - DMA reg-0xf1000828 */ -+#define STATIC_SDRAM_ADDR_CTRL_REG 0x00000012 /* offset 0x1410 - DMA reg-0xf1000820 */ -+#define STATIC_SDRAM_MODE_REG 0x00000062 /* offset 0x141c - DMA reg-0xf1000818 */ -+#define STATIC_SDRAM_RANK0_SIZE_DIMM0 0x0FFF /* size bank0 dimm0 - DMA reg-0xf1000810 */ -+#define STATIC_SDRAM_RANK0_SIZE_DIMM1 0x0FFF /* size bank0 dimm1 */ -+ -+#define STATIC_DRAM_BANK_2 -+ -+#define STATIC_DRAM_BANK_3 -+#define STATIC_DRAM_BANK_4 -+ -+#endif /* mv_D27RB12P */ -+ -+#ifdef RD_MV645XX -+ -+#define STATIC_MEM_TYPE MEM_TYPE_DDR2 -+#define STATIC_DIMM_INFO_BANK0_SIZE 256 -+/* DDR2 boards 256 MB*/ -+ -+#define STATIC_SDRAM_RANK0_SIZE_DIMM0 0x00000fff /* size bank0 dimm0 - DMA reg-0xf1000810 */ -+#define STATIC_SDRAM_CONFIG_REG 0x07190618 -+#define STATIC_SDRAM_MODE_REG 0x00000432 -+#define STATIC_SDRAM_DUNIT_CTRL_REG 0xf4a03440 -+#define STATIC_SDRAM_ADDR_CTRL_REG 0x00000022 -+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG 0x11712220 -+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG 0x00000504 -+#define STATIC_SDRAM_ODT_CTRL_LOW 0x84210000 -+#define STATIC_SDRAM_ODT_CTRL_HI 0x00000000 -+#define STATIC_SDRAM_DUNIT_ODT_CTRL 0x0000780f -+#define STATIC_SDRAM_EXT_MODE 0x00000440 -+#define STATIC_SDRAM_DDR2_TIMING_LO 0x00063300 -+#define STATIC_SDRAM_DDR2_TIMING_HI 0x00006330 -+#endif /* RD_MV645XX */ -+ -+#if MV_DIMM_M3783354CZ3_CE6 -+ -+#define STATIC_SDRAM_RANK0_SIZE_DIMM0 0x00000FFF /* 0x2010 size bank0 dimm0 - DMA reg-0xf1000810 */ -+#define STATIC_SDRAM_CONFIG_REG 0x07190618 /* 0x1400 */ -+#define STATIC_SDRAM_MODE_REG 0x00000432 /* 0x141c */ -+#define STATIC_SDRAM_DUNIT_CTRL_REG 0xf4a03440 /* 0x1404 */ -+#define STATIC_SDRAM_ADDR_CTRL_REG 0x00000022 /* 0x1410 */ -+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG 0x11712220 /* 0x1408 */ -+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG 0x00000504 /* 0x140c */ -+#define STATIC_SDRAM_ODT_CTRL_LOW 0x84210000 /* 0x1494 */ -+#define STATIC_SDRAM_ODT_CTRL_HI 0x00000000 /* 0x1498 */ -+#define STATIC_SDRAM_DUNIT_ODT_CTRL 0x0000780f /* 0x149c */ -+#define STATIC_SDRAM_EXT_MODE 0x00000440 /* 0x1420 */ -+#define STATIC_SDRAM_DDR2_TIMING_LO 0x00063300 /* 0x1428 */ -+#define STATIC_SDRAM_DDR2_TIMING_HI 0x00006330 /* 0x147C */ -+ -+#endif /* MV_DIMM_M3783354CZ3_CE6 */ -+ -+#endif /* MV_STATIC_DRAM_ON_BOARD */ -+#endif /* __INCmvDramIfStaticInith */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.c b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.c -new file mode 100644 -index 0000000..dcc8fdf ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.c -@@ -0,0 +1,1474 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "ddr2/spd/mvSpd.h" -+#include "boardEnv/mvBoardEnvLib.h" -+ -+/* #define MV_DEBUG */ -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, -+ MV_DRAM_BANK_INFO *pBankInfo); -+static MV_U32 cas2ps(MV_U8 spd_byte); -+/******************************************************************************* -+* mvDramBankGet - Get the DRAM bank paramters. -+* -+* DESCRIPTION: -+* This function retrieves DRAM bank parameters as described in -+* DRAM_BANK_INFO struct to the controller DRAM unit. In case the board -+* has its DRAM on DIMMs it will use its EEPROM to extract SPD data -+* from it. Otherwise, if the DRAM is soldered on board, the function -+* should insert its bank information into MV_DRAM_BANK_INFO struct. -+* -+* INPUT: -+* bankNum - Board DRAM bank number. -+* -+* OUTPUT: -+* pBankInfo - DRAM bank information struct. -+* -+* RETURN: -+* MV_FAIL - Bank parameters could not be read. -+* -+*******************************************************************************/ -+MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo) -+{ -+ MV_DIMM_INFO dimmInfo; -+ -+ DB(mvOsPrintf("Dram: mvDramBankInfoGet bank %d\n", bankNum)); -+ /* zero pBankInfo structure */ -+ -+ if((NULL == pBankInfo) || (bankNum >= MV_DRAM_MAX_CS )) -+ { -+ DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); -+ return MV_BAD_PARAM; -+ } -+ memset(pBankInfo, 0, sizeof(*pBankInfo)); -+ -+ if ( MV_OK != dimmSpdGet((MV_U32)(bankNum/2), &dimmInfo)) -+ { -+ DB(mvOsPrintf("Dram: ERR dimmSpdGet failed to get dimm info \n")); -+ return MV_FAIL; -+ } -+ if ((dimmInfo.numOfModuleBanks == 1) && ((bankNum % 2) == 1)) -+ { -+ DB(mvOsPrintf("Dram: ERR dimmSpdGet. Can't find DIMM bank 2 \n")); -+ return MV_FAIL; -+ } -+ /* convert Dimm info to Bank info */ -+ cpyDimm2BankInfo(&dimmInfo, pBankInfo); -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* cpyDimm2BankInfo - Convert a Dimm info struct into a bank info struct. -+* -+* DESCRIPTION: -+* Convert a Dimm info struct into a bank info struct. -+* -+* INPUT: -+* pDimmInfo - DIMM information structure. -+* -+* OUTPUT: -+* pBankInfo - DRAM bank information struct. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, -+ MV_DRAM_BANK_INFO *pBankInfo) -+{ -+ pBankInfo->memoryType = pDimmInfo->memoryType; -+ -+ /* DIMM dimensions */ -+ pBankInfo->numOfRowAddr = pDimmInfo->numOfRowAddr; -+ pBankInfo->numOfColAddr = pDimmInfo->numOfColAddr; -+ pBankInfo->dataWidth = pDimmInfo->dataWidth; -+ pBankInfo->errorCheckType = pDimmInfo->errorCheckType; -+ pBankInfo->sdramWidth = pDimmInfo->sdramWidth; -+ pBankInfo->errorCheckDataWidth = pDimmInfo->errorCheckDataWidth; -+ pBankInfo->numOfBanksOnEachDevice = pDimmInfo->numOfBanksOnEachDevice; -+ pBankInfo->suportedCasLatencies = pDimmInfo->suportedCasLatencies; -+ pBankInfo->refreshInterval = pDimmInfo->refreshInterval; -+ -+ /* DIMM timing parameters */ -+ pBankInfo->minCycleTimeAtMaxCasLatPs = pDimmInfo->minCycleTimeAtMaxCasLatPs; -+ pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps = -+ pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps; -+ pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps = -+ pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps; -+ -+ pBankInfo->minRowPrechargeTime = pDimmInfo->minRowPrechargeTime; -+ pBankInfo->minRowActiveToRowActive = pDimmInfo->minRowActiveToRowActive; -+ pBankInfo->minRasToCasDelay = pDimmInfo->minRasToCasDelay; -+ pBankInfo->minRasPulseWidth = pDimmInfo->minRasPulseWidth; -+ pBankInfo->minWriteRecoveryTime = pDimmInfo->minWriteRecoveryTime; -+ pBankInfo->minWriteToReadCmdDelay = pDimmInfo->minWriteToReadCmdDelay; -+ pBankInfo->minReadToPrechCmdDelay = pDimmInfo->minReadToPrechCmdDelay; -+ pBankInfo->minRefreshToActiveCmd = pDimmInfo->minRefreshToActiveCmd; -+ -+ /* Parameters calculated from the extracted DIMM information */ -+ pBankInfo->size = pDimmInfo->size/pDimmInfo->numOfModuleBanks; -+ pBankInfo->deviceDensity = pDimmInfo->deviceDensity; -+ pBankInfo->numberOfDevices = pDimmInfo->numberOfDevices / -+ pDimmInfo->numOfModuleBanks; -+ -+ /* DIMM attributes (MV_TRUE for yes) */ -+ -+ if ((pDimmInfo->memoryType == MEM_TYPE_SDRAM) || -+ (pDimmInfo->memoryType == MEM_TYPE_DDR1) ) -+ { -+ if (pDimmInfo->dimmAttributes & BIT1) -+ pBankInfo->registeredAddrAndControlInputs = MV_TRUE; -+ else -+ pBankInfo->registeredAddrAndControlInputs = MV_FALSE; -+ } -+ else /* pDimmInfo->memoryType == MEM_TYPE_DDR2 */ -+ { -+ if (pDimmInfo->dimmTypeInfo & (BIT0 | BIT4)) -+ pBankInfo->registeredAddrAndControlInputs = MV_TRUE; -+ else -+ pBankInfo->registeredAddrAndControlInputs = MV_FALSE; -+ } -+ -+ return; -+} -+/******************************************************************************* -+* dimmSpdCpy - Cpy SPD parameters from dimm 0 to dimm 1. -+* -+* DESCRIPTION: -+* Read the DIMM SPD parameters from dimm 0 into dimm 1 SPD. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+MV_STATUS dimmSpdCpy(MV_VOID) -+{ -+ MV_U32 i; -+ MV_U32 spdChecksum; -+ -+ MV_TWSI_SLAVE twsiSlave; -+ MV_U8 data[SPD_SIZE]; -+ -+ /* zero dimmInfo structure */ -+ memset(data, 0, SPD_SIZE); -+ -+ /* read the dimm eeprom */ -+ DB(mvOsPrintf("DRAM: Read Dimm eeprom\n")); -+ twsiSlave.slaveAddr.address = MV_BOARD_DIMM0_I2C_ADDR; -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ twsiSlave.offset = 0; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ if( MV_OK != mvTwsiRead (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, data, SPD_SIZE) ) -+ { -+ DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum 0\n")); -+ return MV_FAIL; -+ } -+ DB(puts("DRAM: Reading dimm info succeded.\n")); -+ -+ /* calculate SPD checksum */ -+ spdChecksum = 0; -+ -+ for(i = 0 ; i <= 62 ; i++) -+ { -+ spdChecksum += data[i]; -+ } -+ -+ if ((spdChecksum & 0xff) != data[63]) -+ { -+ DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n", -+ (MV_U32)(spdChecksum & 0xff), data[63])); -+ } -+ else -+ { -+ DB(mvOsPrintf("DRAM: SPD Checksum ok!\n")); -+ } -+ -+ /* copy the SPD content 1:1 into the DIMM 1 SPD */ -+ twsiSlave.slaveAddr.address = MV_BOARD_DIMM1_I2C_ADDR; -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ twsiSlave.offset = 0; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ for(i = 0 ; i < SPD_SIZE ; i++) -+ { -+ twsiSlave.offset = i; -+ if( MV_OK != mvTwsiWrite (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &data[i], 1) ) -+ { -+ mvOsPrintf("DRAM: ERR. no DIMM in dimmNum 1 byte %d \n",i); -+ return MV_FAIL; -+ } -+ mvOsDelay(5); -+ } -+ -+ DB(puts("DRAM: Reading dimm info succeded.\n")); -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* dimmSpdGet - Get the SPD parameters. -+* -+* DESCRIPTION: -+* Read the DIMM SPD parameters into given struct parameter. -+* -+* INPUT: -+* dimmNum - DIMM number. See MV_BOARD_DIMM_NUM enumerator. -+* -+* OUTPUT: -+* pDimmInfo - DIMM information structure. -+* -+* RETURN: -+* MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo) -+{ -+ MV_U32 i; -+ MV_U32 density = 1; -+ MV_U32 spdChecksum; -+ -+ MV_TWSI_SLAVE twsiSlave; -+ MV_U8 data[SPD_SIZE]; -+ -+ if((NULL == pDimmInfo)|| (dimmNum >= MAX_DIMM_NUM)) -+ { -+ DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); -+ return MV_BAD_PARAM; -+ } -+ -+ /* zero dimmInfo structure */ -+ memset(data, 0, SPD_SIZE); -+ -+ /* read the dimm eeprom */ -+ DB(mvOsPrintf("DRAM: Read Dimm eeprom\n")); -+ twsiSlave.slaveAddr.address = (dimmNum == 0) ? -+ MV_BOARD_DIMM0_I2C_ADDR : MV_BOARD_DIMM1_I2C_ADDR; -+ twsiSlave.slaveAddr.type = ADDR7_BIT; -+ twsiSlave.validOffset = MV_TRUE; -+ twsiSlave.offset = 0; -+ twsiSlave.moreThen256 = MV_FALSE; -+ -+ if( MV_OK != mvTwsiRead (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, data, SPD_SIZE) ) -+ { -+ DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum %d \n", dimmNum)); -+ return MV_FAIL; -+ } -+ DB(puts("DRAM: Reading dimm info succeded.\n")); -+ -+ /* calculate SPD checksum */ -+ spdChecksum = 0; -+ -+ for(i = 0 ; i <= 62 ; i++) -+ { -+ spdChecksum += data[i]; -+ } -+ -+ if ((spdChecksum & 0xff) != data[63]) -+ { -+ DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n", -+ (MV_U32)(spdChecksum & 0xff), data[63])); -+ } -+ else -+ { -+ DB(mvOsPrintf("DRAM: SPD Checksum ok!\n")); -+ } -+ -+ /* copy the SPD content 1:1 into the dimmInfo structure*/ -+ for(i = 0 ; i < SPD_SIZE ; i++) -+ { -+ pDimmInfo->spdRawData[i] = data[i]; -+ DB(mvOsPrintf("SPD-EEPROM Byte %3d = %3x (%3d)\n",i, data[i], data[i])); -+ } -+ -+ DB(mvOsPrintf("DRAM SPD Information:\n")); -+ -+ /* Memory type (DDR / SDRAM) */ -+ switch (data[DIMM_MEM_TYPE]) -+ { -+ case (DIMM_MEM_TYPE_SDRAM): -+ pDimmInfo->memoryType = MEM_TYPE_SDRAM; -+ DB(mvOsPrintf("DRAM Memeory type SDRAM\n")); -+ break; -+ case (DIMM_MEM_TYPE_DDR1): -+ pDimmInfo->memoryType = MEM_TYPE_DDR1; -+ DB(mvOsPrintf("DRAM Memeory type DDR1\n")); -+ break; -+ case (DIMM_MEM_TYPE_DDR2): -+ pDimmInfo->memoryType = MEM_TYPE_DDR2; -+ DB(mvOsPrintf("DRAM Memeory type DDR2\n")); -+ break; -+ default: -+ mvOsPrintf("ERROR: Undefined memory type!\n"); -+ return MV_ERROR; -+ } -+ -+ -+ /* Number Of Row Addresses */ -+ pDimmInfo->numOfRowAddr = data[DIMM_ROW_NUM]; -+ DB(mvOsPrintf("DRAM numOfRowAddr[3] %d\n",pDimmInfo->numOfRowAddr)); -+ -+ /* Number Of Column Addresses */ -+ pDimmInfo->numOfColAddr = data[DIMM_COL_NUM]; -+ DB(mvOsPrintf("DRAM numOfColAddr[4] %d\n",pDimmInfo->numOfColAddr)); -+ -+ /* Number Of Module Banks */ -+ pDimmInfo->numOfModuleBanks = data[DIMM_MODULE_BANK_NUM]; -+ DB(mvOsPrintf("DRAM numOfModuleBanks[5] 0x%x\n", -+ pDimmInfo->numOfModuleBanks)); -+ -+ /* Number of module banks encoded differently for DDR2 */ -+ if (pDimmInfo->memoryType == MEM_TYPE_DDR2) -+ pDimmInfo->numOfModuleBanks = (pDimmInfo->numOfModuleBanks & 0x7)+1; -+ -+ /* Data Width */ -+ pDimmInfo->dataWidth = data[DIMM_DATA_WIDTH]; -+ DB(mvOsPrintf("DRAM dataWidth[6] 0x%x\n", pDimmInfo->dataWidth)); -+ -+ /* Minimum Cycle Time At Max CasLatancy */ -+ pDimmInfo->minCycleTimeAtMaxCasLatPs = cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS]); -+ -+ /* Error Check Type */ -+ pDimmInfo->errorCheckType = data[DIMM_ERR_CHECK_TYPE]; -+ DB(mvOsPrintf("DRAM errorCheckType[11] 0x%x\n", -+ pDimmInfo->errorCheckType)); -+ -+ /* Refresh Interval */ -+ pDimmInfo->refreshInterval = data[DIMM_REFRESH_INTERVAL]; -+ DB(mvOsPrintf("DRAM refreshInterval[12] 0x%x\n", -+ pDimmInfo->refreshInterval)); -+ -+ /* Sdram Width */ -+ pDimmInfo->sdramWidth = data[DIMM_SDRAM_WIDTH]; -+ DB(mvOsPrintf("DRAM sdramWidth[13] 0x%x\n",pDimmInfo->sdramWidth)); -+ -+ /* Error Check Data Width */ -+ pDimmInfo->errorCheckDataWidth = data[DIMM_ERR_CHECK_DATA_WIDTH]; -+ DB(mvOsPrintf("DRAM errorCheckDataWidth[14] 0x%x\n", -+ pDimmInfo->errorCheckDataWidth)); -+ -+ /* Burst Length Supported */ -+ /* SDRAM/DDR1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ burst length = * Page | TBD | TBD | TBD | 8 | 4 | 2 | 1 * -+ *********************************************************/ -+ /* DDR2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ burst length = * Page | TBD | TBD | TBD | 8 | 4 | TBD | TBD * -+ *********************************************************/ -+ -+ pDimmInfo->burstLengthSupported = data[DIMM_BURST_LEN_SUP]; -+ DB(mvOsPrintf("DRAM burstLengthSupported[16] 0x%x\n", -+ pDimmInfo->burstLengthSupported)); -+ -+ /* Number Of Banks On Each Device */ -+ pDimmInfo->numOfBanksOnEachDevice = data[DIMM_DEV_BANK_NUM]; -+ DB(mvOsPrintf("DRAM numOfBanksOnEachDevice[17] 0x%x\n", -+ pDimmInfo->numOfBanksOnEachDevice)); -+ -+ /* Suported Cas Latencies */ -+ -+ /* SDRAM: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 * -+ ********************************************************/ -+ -+ /* DDR 1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 4 | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 * -+ *********************************************************/ -+ -+ /* DDR 2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | TBD | 5 | 4 | 3 | 2 | TBD | TBD * -+ *********************************************************/ -+ -+ pDimmInfo->suportedCasLatencies = data[DIMM_SUP_CAL]; -+ DB(mvOsPrintf("DRAM suportedCasLatencies[18] 0x%x\n", -+ pDimmInfo->suportedCasLatencies)); -+ -+ /* For DDR2 only, get the DIMM type information */ -+ if (pDimmInfo->memoryType == MEM_TYPE_DDR2) -+ { -+ pDimmInfo->dimmTypeInfo = data[DIMM_DDR2_TYPE_INFORMATION]; -+ DB(mvOsPrintf("DRAM dimmTypeInfo[20] (DDR2) 0x%x\n", -+ pDimmInfo->dimmTypeInfo)); -+ } -+ -+ /* SDRAM Modules Attributes */ -+ pDimmInfo->dimmAttributes = data[DIMM_BUF_ADDR_CONT_IN]; -+ DB(mvOsPrintf("DRAM dimmAttributes[21] 0x%x\n", -+ pDimmInfo->dimmAttributes)); -+ -+ /* Minimum Cycle Time At Max CasLatancy Minus 1*/ -+ pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps = -+ cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS1]); -+ -+ /* Minimum Cycle Time At Max CasLatancy Minus 2*/ -+ pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps = -+ cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS2]); -+ -+ pDimmInfo->minRowPrechargeTime = data[DIMM_MIN_ROW_PRECHARGE_TIME]; -+ DB(mvOsPrintf("DRAM minRowPrechargeTime[27] 0x%x\n", -+ pDimmInfo->minRowPrechargeTime)); -+ pDimmInfo->minRowActiveToRowActive = data[DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE]; -+ DB(mvOsPrintf("DRAM minRowActiveToRowActive[28] 0x%x\n", -+ pDimmInfo->minRowActiveToRowActive)); -+ pDimmInfo->minRasToCasDelay = data[DIMM_MIN_RAS_TO_CAS_DELAY]; -+ DB(mvOsPrintf("DRAM minRasToCasDelay[29] 0x%x\n", -+ pDimmInfo->minRasToCasDelay)); -+ pDimmInfo->minRasPulseWidth = data[DIMM_MIN_RAS_PULSE_WIDTH]; -+ DB(mvOsPrintf("DRAM minRasPulseWidth[30] 0x%x\n", -+ pDimmInfo->minRasPulseWidth)); -+ -+ /* DIMM Bank Density */ -+ pDimmInfo->dimmBankDensity = data[DIMM_BANK_DENSITY]; -+ DB(mvOsPrintf("DRAM dimmBankDensity[31] 0x%x\n", -+ pDimmInfo->dimmBankDensity)); -+ -+ /* Only DDR2 includes Write Recovery Time field. Other SDRAM ignore */ -+ pDimmInfo->minWriteRecoveryTime = data[DIMM_MIN_WRITE_RECOVERY_TIME]; -+ DB(mvOsPrintf("DRAM minWriteRecoveryTime[36] 0x%x\n", -+ pDimmInfo->minWriteRecoveryTime)); -+ -+ /* Only DDR2 includes Internal Write To Read Command Delay field. */ -+ pDimmInfo->minWriteToReadCmdDelay = data[DIMM_MIN_WRITE_TO_READ_CMD_DELAY]; -+ DB(mvOsPrintf("DRAM minWriteToReadCmdDelay[37] 0x%x\n", -+ pDimmInfo->minWriteToReadCmdDelay)); -+ -+ /* Only DDR2 includes Internal Read To Precharge Command Delay field. */ -+ pDimmInfo->minReadToPrechCmdDelay = data[DIMM_MIN_READ_TO_PRECH_CMD_DELAY]; -+ DB(mvOsPrintf("DRAM minReadToPrechCmdDelay[38] 0x%x\n", -+ pDimmInfo->minReadToPrechCmdDelay)); -+ -+ /* Only DDR2 includes Minimum Refresh to Activate/Refresh Command field */ -+ pDimmInfo->minRefreshToActiveCmd = data[DIMM_MIN_REFRESH_TO_ACTIVATE_CMD]; -+ DB(mvOsPrintf("DRAM minRefreshToActiveCmd[42] 0x%x\n", -+ pDimmInfo->minRefreshToActiveCmd)); -+ -+ /* calculating the sdram density. Representing device density from */ -+ /* bit 20 to allow representation of 4GB and above. */ -+ /* For example, if density is 512Mbit 0x20000000, will be represent in */ -+ /* deviceDensity by 0x20000000 >> 16 --> 0x00000200. Another example */ -+ /* is density 8GB 0x200000000 >> 16 --> 0x00002000. */ -+ density = (1 << ((pDimmInfo->numOfRowAddr + pDimmInfo->numOfColAddr) - 20)); -+ pDimmInfo->deviceDensity = density * -+ pDimmInfo->numOfBanksOnEachDevice * -+ pDimmInfo->sdramWidth; -+ DB(mvOsPrintf("DRAM deviceDensity %d\n",pDimmInfo->deviceDensity)); -+ -+ /* Number of devices includeing Error correction */ -+ pDimmInfo->numberOfDevices = (pDimmInfo->dataWidth/pDimmInfo->sdramWidth) * -+ pDimmInfo->numOfModuleBanks; -+ DB(mvOsPrintf("DRAM numberOfDevices %d\n", -+ pDimmInfo->numberOfDevices)); -+ -+ pDimmInfo->size = 0; -+ -+ /* Note that pDimmInfo->size is in MB units */ -+ if (pDimmInfo->memoryType == MEM_TYPE_SDRAM) -+ { -+ if (pDimmInfo->dimmBankDensity & BIT0) -+ pDimmInfo->size += 1024; /* Equal to 1GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT1) -+ pDimmInfo->size += 8; /* Equal to 8MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT2) -+ pDimmInfo->size += 16; /* Equal to 16MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT3) -+ pDimmInfo->size += 32; /* Equal to 32MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT4) -+ pDimmInfo->size += 64; /* Equal to 64MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT5) -+ pDimmInfo->size += 128; /* Equal to 128MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT6) -+ pDimmInfo->size += 256; /* Equal to 256MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT7) -+ pDimmInfo->size += 512; /* Equal to 512MB */ -+ } -+ else if (pDimmInfo->memoryType == MEM_TYPE_DDR1) -+ { -+ if (pDimmInfo->dimmBankDensity & BIT0) -+ pDimmInfo->size += 1024; /* Equal to 1GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT1) -+ pDimmInfo->size += 2048; /* Equal to 2GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT2) -+ pDimmInfo->size += 16; /* Equal to 16MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT3) -+ pDimmInfo->size += 32; /* Equal to 32MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT4) -+ pDimmInfo->size += 64; /* Equal to 64MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT5) -+ pDimmInfo->size += 128; /* Equal to 128MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT6) -+ pDimmInfo->size += 256; /* Equal to 256MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT7) -+ pDimmInfo->size += 512; /* Equal to 512MB */ -+ } -+ else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ -+ { -+ if (pDimmInfo->dimmBankDensity & BIT0) -+ pDimmInfo->size += 1024; /* Equal to 1GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT1) -+ pDimmInfo->size += 2048; /* Equal to 2GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT2) -+ pDimmInfo->size += 4096; /* Equal to 4GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT3) -+ pDimmInfo->size += 8192; /* Equal to 8GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT4) -+ pDimmInfo->size += 16384; /* Equal to 16GB */ -+ else if (pDimmInfo->dimmBankDensity & BIT5) -+ pDimmInfo->size += 128; /* Equal to 128MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT6) -+ pDimmInfo->size += 256; /* Equal to 256MB */ -+ else if (pDimmInfo->dimmBankDensity & BIT7) -+ pDimmInfo->size += 512; /* Equal to 512MB */ -+ } -+ -+ pDimmInfo->size *= pDimmInfo->numOfModuleBanks; -+ -+ DB(mvOsPrintf("Dram: dimm size %dMB \n",pDimmInfo->size)); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* dimmSpdPrint - Print the SPD parameters. -+* -+* DESCRIPTION: -+* Print the Dimm SPD parameters. -+* -+* INPUT: -+* pDimmInfo - DIMM information structure. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_VOID dimmSpdPrint(MV_U32 dimmNum) -+{ -+ MV_DIMM_INFO dimmInfo; -+ MV_U32 i, temp = 0; -+ MV_U32 k, maskLeftOfPoint = 0, maskRightOfPoint = 0; -+ MV_U32 rightOfPoint = 0,leftOfPoint = 0, div, time_tmp, shift; -+ MV_U32 busClkPs; -+ MV_U8 trp_clocks=0, trcd_clocks, tras_clocks, trrd_clocks, -+ temp_buf[40], *spdRawData; -+ -+ busClkPs = 1000000000 / (mvBoardSysClkGet() / 100); /* in 10 ps units */ -+ -+ spdRawData = dimmInfo.spdRawData; -+ -+ if(MV_OK != dimmSpdGet(dimmNum, &dimmInfo)) -+ { -+ mvOsOutput("ERROR: Could not read SPD information!\n"); -+ return; -+ } -+ -+ /* find Manufactura of Dimm Module */ -+ mvOsOutput("\nManufacturer's JEDEC ID Code: "); -+ for(i = 0 ; i < DIMM_MODULE_MANU_SIZE ; i++) -+ { -+ mvOsOutput("%x",spdRawData[DIMM_MODULE_MANU_OFFS + i]); -+ } -+ mvOsOutput("\n"); -+ -+ /* Manufacturer's Specific Data */ -+ for(i = 0 ; i < DIMM_MODULE_ID_SIZE ; i++) -+ { -+ temp_buf[i] = spdRawData[DIMM_MODULE_ID_OFFS + i]; -+ } -+ mvOsOutput("Manufacturer's Specific Data: %s\n", temp_buf); -+ -+ /* Module Part Number */ -+ for(i = 0 ; i < DIMM_MODULE_VEN_SIZE ; i++) -+ { -+ temp_buf[i] = spdRawData[DIMM_MODULE_VEN_OFFS + i]; -+ } -+ mvOsOutput("Module Part Number: %s\n", temp_buf); -+ -+ /* Module Serial Number */ -+ for(i = 0; i < sizeof(MV_U32); i++) -+ { -+ temp |= spdRawData[95+i] << 8*i; -+ } -+ mvOsOutput("DIMM Serial No. %ld (%lx)\n", (long)temp, -+ (long)temp); -+ -+ /* find Manufac-Data of Dimm Module */ -+ mvOsOutput("Manufactoring Date: Year 20%d%d/ ww %d%d\n", -+ ((spdRawData[93] & 0xf0) >> 4), (spdRawData[93] & 0xf), -+ ((spdRawData[94] & 0xf0) >> 4), (spdRawData[94] & 0xf)); -+ /* find modul_revision of Dimm Module */ -+ mvOsOutput("Module Revision: %d.%d\n", -+ spdRawData[62]/10, spdRawData[62]%10); -+ -+ /* find manufac_place of Dimm Module */ -+ mvOsOutput("manufac_place: %d\n", spdRawData[72]); -+ -+ /* go over the first 35 I2C data bytes */ -+ for(i = 2 ; i <= 35 ; i++) -+ switch(i) -+ { -+ case 2: /* Memory type (DDR1/2 / SDRAM) */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ mvOsOutput("Dram Type is: SDRAM\n"); -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ mvOsOutput("Dram Type is: SDRAM DDR1\n"); -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR2) -+ mvOsOutput("Dram Type is: SDRAM DDR2\n"); -+ else -+ mvOsOutput("Dram Type unknown\n"); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 3: /* Number Of Row Addresses */ -+ mvOsOutput("Module Number of row addresses: %d\n", -+ dimmInfo.numOfRowAddr); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 4: /* Number Of Column Addresses */ -+ mvOsOutput("Module Number of col addresses: %d\n", -+ dimmInfo.numOfColAddr); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 5: /* Number Of Module Banks */ -+ mvOsOutput("Number of Banks on Mod.: %d\n", -+ dimmInfo.numOfModuleBanks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 6: /* Data Width */ -+ mvOsOutput("Module Data Width: %d bit\n", -+ dimmInfo.dataWidth); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 8: /* Voltage Interface */ -+ switch(spdRawData[i]) -+ { -+ case 0x0: -+ mvOsOutput("Module is TTL_5V_TOLERANT\n"); -+ break; -+ case 0x1: -+ mvOsOutput("Module is LVTTL\n"); -+ break; -+ case 0x2: -+ mvOsOutput("Module is HSTL_1_5V\n"); -+ break; -+ case 0x3: -+ mvOsOutput("Module is SSTL_3_3V\n"); -+ break; -+ case 0x4: -+ mvOsOutput("Module is SSTL_2_5V\n"); -+ break; -+ case 0x5: -+ if (dimmInfo.memoryType != MEM_TYPE_SDRAM) -+ { -+ mvOsOutput("Module is SSTL_1_8V\n"); -+ break; -+ } -+ default: -+ mvOsOutput("Module is VOLTAGE_UNKNOWN\n"); -+ break; -+ } -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 9: /* Minimum Cycle Time At Max CasLatancy */ -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ rightOfPoint = (spdRawData[i] & 0x0f) * 10; -+ -+ /* DDR2 addition of right of point */ -+ if ((spdRawData[i] & 0x0f) == 0xA) -+ { -+ rightOfPoint = 25; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xB) -+ { -+ rightOfPoint = 33; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xC) -+ { -+ rightOfPoint = 66; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xD) -+ { -+ rightOfPoint = 75; -+ } -+ mvOsOutput("Minimum Cycle Time At Max CL: %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 10: /* Clock To Data Out */ -+ div = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 10:100; -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / div; -+ rightOfPoint = time_tmp % div; -+ mvOsOutput("Clock To Data Out: %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 11: /* Error Check Type */ -+ mvOsOutput("Error Check Type (0=NONE): %d\n", -+ dimmInfo.errorCheckType); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 12: /* Refresh Interval */ -+ mvOsOutput("Refresh Rate: %x\n", -+ dimmInfo.refreshInterval); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 13: /* Sdram Width */ -+ mvOsOutput("Sdram Width: %d bits\n", -+ dimmInfo.sdramWidth); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 14: /* Error Check Data Width */ -+ mvOsOutput("Error Check Data Width: %d bits\n", -+ dimmInfo.errorCheckDataWidth); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 15: /* Minimum Clock Delay is unsupported */ -+ if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) || -+ (dimmInfo.memoryType == MEM_TYPE_DDR1)) -+ { -+ mvOsOutput("Minimum Clk Delay back to back: %d\n", -+ spdRawData[i]); -+ } -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 16: /* Burst Length Supported */ -+ /* SDRAM/DDR1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ burst length = * Page | TBD | TBD | TBD | 8 | 4 | 2 | 1 * -+ *********************************************************/ -+ /* DDR2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ burst length = * Page | TBD | TBD | TBD | 8 | 4 | TBD | TBD * -+ *********************************************************/ -+ mvOsOutput("Burst Length Supported: "); -+ if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) || -+ (dimmInfo.memoryType == MEM_TYPE_DDR1)) -+ { -+ if (dimmInfo.burstLengthSupported & BIT0) -+ mvOsOutput("1, "); -+ if (dimmInfo.burstLengthSupported & BIT1) -+ mvOsOutput("2, "); -+ } -+ if (dimmInfo.burstLengthSupported & BIT2) -+ mvOsOutput("4, "); -+ if (dimmInfo.burstLengthSupported & BIT3) -+ mvOsOutput("8, "); -+ -+ mvOsOutput(" Bit \n"); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 17: /* Number Of Banks On Each Device */ -+ mvOsOutput("Number Of Banks On Each Chip: %d\n", -+ dimmInfo.numOfBanksOnEachDevice); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 18: /* Suported Cas Latencies */ -+ -+ /* SDRAM: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 * -+ ********************************************************/ -+ -+ /* DDR 1: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | 4 | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 * -+ *********************************************************/ -+ -+ /* DDR 2: -+ *******-******-******-******-******-******-******-******* -+ * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * -+ *******-******-******-******-******-******-******-******* -+ CAS = * TBD | TBD | 5 | 4 | 3 | 2 | TBD | TBD * -+ *********************************************************/ -+ -+ mvOsOutput("Suported Cas Latencies: (CL) "); -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ for (k = 0; k <=7; k++) -+ { -+ if (dimmInfo.suportedCasLatencies & (1 << k)) -+ mvOsOutput("%d, ", k+1); -+ } -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ { -+ if (dimmInfo.suportedCasLatencies & BIT0) -+ mvOsOutput("1, "); -+ if (dimmInfo.suportedCasLatencies & BIT1) -+ mvOsOutput("1.5, "); -+ if (dimmInfo.suportedCasLatencies & BIT2) -+ mvOsOutput("2, "); -+ if (dimmInfo.suportedCasLatencies & BIT3) -+ mvOsOutput("2.5, "); -+ if (dimmInfo.suportedCasLatencies & BIT4) -+ mvOsOutput("3, "); -+ if (dimmInfo.suportedCasLatencies & BIT5) -+ mvOsOutput("3.5, "); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR2) -+ { -+ if (dimmInfo.suportedCasLatencies & BIT2) -+ mvOsOutput("2, "); -+ if (dimmInfo.suportedCasLatencies & BIT3) -+ mvOsOutput("3, "); -+ if (dimmInfo.suportedCasLatencies & BIT4) -+ mvOsOutput("4, "); -+ if (dimmInfo.suportedCasLatencies & BIT5) -+ mvOsOutput("5, "); -+ } -+ else -+ mvOsOutput("?.?, "); -+ mvOsOutput("\n"); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 20: /* DDR2 DIMM type info */ -+ if (dimmInfo.memoryType == MEM_TYPE_DDR2) -+ { -+ if (dimmInfo.dimmTypeInfo & (BIT0 | BIT4)) -+ mvOsOutput("Registered DIMM (RDIMM)\n"); -+ else if (dimmInfo.dimmTypeInfo & (BIT1 | BIT5)) -+ mvOsOutput("Unbuffered DIMM (UDIMM)\n"); -+ else -+ mvOsOutput("Unknown DIMM type.\n"); -+ } -+ -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 21: /* SDRAM Modules Attributes */ -+ mvOsOutput("\nModule Attributes (SPD Byte 21): \n"); -+ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ if (dimmInfo.dimmAttributes & BIT0) -+ mvOsOutput(" Buffered Addr/Control Input: Yes\n"); -+ else -+ mvOsOutput(" Buffered Addr/Control Input: No\n"); -+ -+ if (dimmInfo.dimmAttributes & BIT1) -+ mvOsOutput(" Registered Addr/Control Input: Yes\n"); -+ else -+ mvOsOutput(" Registered Addr/Control Input: No\n"); -+ -+ if (dimmInfo.dimmAttributes & BIT2) -+ mvOsOutput(" On-Card PLL (clock): Yes \n"); -+ else -+ mvOsOutput(" On-Card PLL (clock): No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT3) -+ mvOsOutput(" Bufferd DQMB Input: Yes \n"); -+ else -+ mvOsOutput(" Bufferd DQMB Inputs: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT4) -+ mvOsOutput(" Registered DQMB Inputs: Yes \n"); -+ else -+ mvOsOutput(" Registered DQMB Inputs: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT5) -+ mvOsOutput(" Differential Clock Input: Yes \n"); -+ else -+ mvOsOutput(" Differential Clock Input: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT6) -+ mvOsOutput(" redundant Row Addressing: Yes \n"); -+ else -+ mvOsOutput(" redundant Row Addressing: No \n"); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ { -+ if (dimmInfo.dimmAttributes & BIT0) -+ mvOsOutput(" Buffered Addr/Control Input: Yes\n"); -+ else -+ mvOsOutput(" Buffered Addr/Control Input: No\n"); -+ -+ if (dimmInfo.dimmAttributes & BIT1) -+ mvOsOutput(" Registered Addr/Control Input: Yes\n"); -+ else -+ mvOsOutput(" Registered Addr/Control Input: No\n"); -+ -+ if (dimmInfo.dimmAttributes & BIT2) -+ mvOsOutput(" On-Card PLL (clock): Yes \n"); -+ else -+ mvOsOutput(" On-Card PLL (clock): No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT3) -+ mvOsOutput(" FET Switch On-Card Enabled: Yes \n"); -+ else -+ mvOsOutput(" FET Switch On-Card Enabled: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT4) -+ mvOsOutput(" FET Switch External Enabled: Yes \n"); -+ else -+ mvOsOutput(" FET Switch External Enabled: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT5) -+ mvOsOutput(" Differential Clock Input: Yes \n"); -+ else -+ mvOsOutput(" Differential Clock Input: No \n"); -+ } -+ else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ -+ { -+ mvOsOutput(" Number of Active Registers on the DIMM: %d\n", -+ (dimmInfo.dimmAttributes & 0x3) + 1); -+ -+ mvOsOutput(" Number of PLLs on the DIMM: %d\n", -+ ((dimmInfo.dimmAttributes) >> 2) & 0x3); -+ -+ if (dimmInfo.dimmAttributes & BIT4) -+ mvOsOutput(" FET Switch External Enabled: Yes \n"); -+ else -+ mvOsOutput(" FET Switch External Enabled: No \n"); -+ -+ if (dimmInfo.dimmAttributes & BIT6) -+ mvOsOutput(" Analysis probe installed: Yes \n"); -+ else -+ mvOsOutput(" Analysis probe installed: No \n"); -+ } -+ -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 22: /* Suported AutoPreCharge */ -+ mvOsOutput("\nModul Attributes (SPD Byte 22): \n"); -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ if ( spdRawData[i] & BIT0 ) -+ mvOsOutput(" Early Ras Precharge: Yes \n"); -+ else -+ mvOsOutput(" Early Ras Precharge: No \n"); -+ -+ if ( spdRawData[i] & BIT1 ) -+ mvOsOutput(" AutoPreCharge: Yes \n"); -+ else -+ mvOsOutput(" AutoPreCharge: No \n"); -+ -+ if ( spdRawData[i] & BIT2 ) -+ mvOsOutput(" Precharge All: Yes \n"); -+ else -+ mvOsOutput(" Precharge All: No \n"); -+ -+ if ( spdRawData[i] & BIT3 ) -+ mvOsOutput(" Write 1/ReadBurst: Yes \n"); -+ else -+ mvOsOutput(" Write 1/ReadBurst: No \n"); -+ -+ if ( spdRawData[i] & BIT4 ) -+ mvOsOutput(" lower VCC tolerance: 5%%\n"); -+ else -+ mvOsOutput(" lower VCC tolerance: 10%%\n"); -+ -+ if ( spdRawData[i] & BIT5 ) -+ mvOsOutput(" upper VCC tolerance: 5%%\n"); -+ else -+ mvOsOutput(" upper VCC tolerance: 10%%\n"); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ { -+ if ( spdRawData[i] & BIT0 ) -+ mvOsOutput(" Supports Weak Driver: Yes \n"); -+ else -+ mvOsOutput(" Supports Weak Driver: No \n"); -+ -+ if ( !(spdRawData[i] & BIT4) ) -+ mvOsOutput(" lower VCC tolerance: 0.2V\n"); -+ -+ if ( !(spdRawData[i] & BIT5) ) -+ mvOsOutput(" upper VCC tolerance: 0.2V\n"); -+ -+ if ( spdRawData[i] & BIT6 ) -+ mvOsOutput(" Concurrent Auto Preharge: Yes \n"); -+ else -+ mvOsOutput(" Concurrent Auto Preharge: No \n"); -+ -+ if ( spdRawData[i] & BIT7 ) -+ mvOsOutput(" Supports Fast AP: Yes \n"); -+ else -+ mvOsOutput(" Supports Fast AP: No \n"); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR2) -+ { -+ if ( spdRawData[i] & BIT0 ) -+ mvOsOutput(" Supports Weak Driver: Yes \n"); -+ else -+ mvOsOutput(" Supports Weak Driver: No \n"); -+ } -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 23: -+ /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */ -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ rightOfPoint = (spdRawData[i] & 0x0f) * 10; -+ -+ /* DDR2 addition of right of point */ -+ if ((spdRawData[i] & 0x0f) == 0xA) -+ { -+ rightOfPoint = 25; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xB) -+ { -+ rightOfPoint = 33; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xC) -+ { -+ rightOfPoint = 66; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xD) -+ { -+ rightOfPoint = 75; -+ } -+ -+ mvOsOutput("Minimum Cycle Time At 2nd highest CasLatancy" -+ "(0 = Not supported): %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint ); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 24: /* Clock To Data Out 2nd highest Cas Latency Value*/ -+ div = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 10:100; -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / div; -+ rightOfPoint = time_tmp % div; -+ mvOsOutput("Clock To Data Out (2nd CL value): %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 25: -+ /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ leftOfPoint = (spdRawData[i] & 0xfc) >> 2; -+ rightOfPoint = (spdRawData[i] & 0x3) * 25; -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ rightOfPoint = (spdRawData[i] & 0x0f) * 10; -+ -+ /* DDR2 addition of right of point */ -+ if ((spdRawData[i] & 0x0f) == 0xA) -+ { -+ rightOfPoint = 25; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xB) -+ { -+ rightOfPoint = 33; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xC) -+ { -+ rightOfPoint = 66; -+ } -+ if ((spdRawData[i] & 0x0f) == 0xD) -+ { -+ rightOfPoint = 75; -+ } -+ } -+ mvOsOutput("Minimum Cycle Time At 3rd highest CasLatancy" -+ "(0 = Not supported): %d.%d [ns]\n", -+ leftOfPoint, rightOfPoint ); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 26: /* Clock To Data Out 3rd highest Cas Latency Value*/ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ leftOfPoint = (spdRawData[i] & 0xfc) >> 2; -+ rightOfPoint = (spdRawData[i] & 0x3) * 25; -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = 0; -+ rightOfPoint = time_tmp; -+ } -+ mvOsOutput("Clock To Data Out (3rd CL value): %d.%2d[ns]\n", -+ leftOfPoint, rightOfPoint ); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 27: /* Minimum Row Precharge Time */ -+ shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; -+ maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0xff : 0xfc; -+ maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0x00 : 0x03; -+ leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); -+ rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; -+ temp = ((leftOfPoint*100) + rightOfPoint);/* in 10ps Intervals*/ -+ trp_clocks = (temp + (busClkPs-1)) / busClkPs; -+ mvOsOutput("Minimum Row Precharge Time [ns]: %d.%d = " -+ "in Clk cycles %d\n", -+ leftOfPoint, rightOfPoint, trp_clocks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 28: /* Minimum Row Active to Row Active Time */ -+ shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; -+ maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0xff : 0xfc; -+ maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0x00 : 0x03; -+ leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); -+ rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; -+ temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/ -+ trrd_clocks = (temp + (busClkPs-1)) / busClkPs; -+ mvOsOutput("Minimum Row Active -To- Row Active Delay [ns]: " -+ "%d.%d = in Clk cycles %d\n", -+ leftOfPoint, rightOfPoint, trp_clocks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 29: /* Minimum Ras-To-Cas Delay */ -+ shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2; -+ maskLeftOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0xff : 0xfc; -+ maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? -+ 0x00 : 0x03; -+ leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift); -+ rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25; -+ temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/ -+ trcd_clocks = (temp + (busClkPs-1) )/ busClkPs; -+ mvOsOutput("Minimum Ras-To-Cas Delay [ns]: %d.%d = " -+ "in Clk cycles %d\n", -+ leftOfPoint, rightOfPoint, trp_clocks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 30: /* Minimum Ras Pulse Width */ -+ tras_clocks = (cas2ps(spdRawData[i])+(busClkPs-1)) / busClkPs; -+ mvOsOutput("Minimum Ras Pulse Width [ns]: %d = " -+ "in Clk cycles %d\n", spdRawData[i], tras_clocks); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 31: /* Module Bank Density */ -+ mvOsOutput("Module Bank Density (more than 1= Multisize-Module):"); -+ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ if (dimmInfo.dimmBankDensity & BIT0) -+ mvOsOutput("1GB, "); -+ if (dimmInfo.dimmBankDensity & BIT1) -+ mvOsOutput("8MB, "); -+ if (dimmInfo.dimmBankDensity & BIT2) -+ mvOsOutput("16MB, "); -+ if (dimmInfo.dimmBankDensity & BIT3) -+ mvOsOutput("32MB, "); -+ if (dimmInfo.dimmBankDensity & BIT4) -+ mvOsOutput("64MB, "); -+ if (dimmInfo.dimmBankDensity & BIT5) -+ mvOsOutput("128MB, "); -+ if (dimmInfo.dimmBankDensity & BIT6) -+ mvOsOutput("256MB, "); -+ if (dimmInfo.dimmBankDensity & BIT7) -+ mvOsOutput("512MB, "); -+ } -+ else if (dimmInfo.memoryType == MEM_TYPE_DDR1) -+ { -+ if (dimmInfo.dimmBankDensity & BIT0) -+ mvOsOutput("1GB, "); -+ if (dimmInfo.dimmBankDensity & BIT1) -+ mvOsOutput("2GB, "); -+ if (dimmInfo.dimmBankDensity & BIT2) -+ mvOsOutput("16MB, "); -+ if (dimmInfo.dimmBankDensity & BIT3) -+ mvOsOutput("32MB, "); -+ if (dimmInfo.dimmBankDensity & BIT4) -+ mvOsOutput("64MB, "); -+ if (dimmInfo.dimmBankDensity & BIT5) -+ mvOsOutput("128MB, "); -+ if (dimmInfo.dimmBankDensity & BIT6) -+ mvOsOutput("256MB, "); -+ if (dimmInfo.dimmBankDensity & BIT7) -+ mvOsOutput("512MB, "); -+ } -+ else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */ -+ { -+ if (dimmInfo.dimmBankDensity & BIT0) -+ mvOsOutput("1GB, "); -+ if (dimmInfo.dimmBankDensity & BIT1) -+ mvOsOutput("2GB, "); -+ if (dimmInfo.dimmBankDensity & BIT2) -+ mvOsOutput("4GB, "); -+ if (dimmInfo.dimmBankDensity & BIT3) -+ mvOsOutput("8GB, "); -+ if (dimmInfo.dimmBankDensity & BIT4) -+ mvOsOutput("16GB, "); -+ if (dimmInfo.dimmBankDensity & BIT5) -+ mvOsOutput("128MB, "); -+ if (dimmInfo.dimmBankDensity & BIT6) -+ mvOsOutput("256MB, "); -+ if (dimmInfo.dimmBankDensity & BIT7) -+ mvOsOutput("512MB, "); -+ } -+ mvOsOutput("\n"); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 32: /* Address And Command Setup Time (measured in ns/1000) */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ rightOfPoint = (spdRawData[i] & 0x0f); -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ if(leftOfPoint > 7) -+ { -+ leftOfPoint *= -1; -+ } -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / 100; -+ rightOfPoint = time_tmp % 100; -+ } -+ mvOsOutput("Address And Command Setup Time [ns]: %d.%d\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 33: /* Address And Command Hold Time */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ rightOfPoint = (spdRawData[i] & 0x0f); -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ if(leftOfPoint > 7) -+ { -+ leftOfPoint *= -1; -+ } -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / 100; -+ rightOfPoint = time_tmp % 100; -+ } -+ mvOsOutput("Address And Command Hold Time [ns]: %d.%d\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 34: /* Data Input Setup Time */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ rightOfPoint = (spdRawData[i] & 0x0f); -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ if(leftOfPoint > 7) -+ { -+ leftOfPoint *= -1; -+ } -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / 100; -+ rightOfPoint = time_tmp % 100; -+ } -+ mvOsOutput("Data Input Setup Time [ns]: %d.%d\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 35: /* Data Input Hold Time */ -+ if (dimmInfo.memoryType == MEM_TYPE_SDRAM) -+ { -+ rightOfPoint = (spdRawData[i] & 0x0f); -+ leftOfPoint = (spdRawData[i] & 0xf0) >> 4; -+ if(leftOfPoint > 7) -+ { -+ leftOfPoint *= -1; -+ } -+ } -+ else /* DDR1 or DDR2 */ -+ { -+ time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + -+ ((spdRawData[i] & 0x0f)); -+ leftOfPoint = time_tmp / 100; -+ rightOfPoint = time_tmp % 100; -+ } -+ mvOsOutput("Data Input Hold Time [ns]: %d.%d\n\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ -+ case 36: /* Relevant for DDR2 only: Write Recovery Time */ -+ leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> 2); -+ rightOfPoint = (spdRawData[i] & maskRightOfPoint) * 25; -+ mvOsOutput("Write Recovery Time [ns]: %d.%d\n", -+ leftOfPoint, rightOfPoint); -+ break; -+/*----------------------------------------------------------------------------*/ -+ } -+ -+} -+ -+ -+/* -+ * translate ns.ns/10 coding of SPD timing values -+ * into ps unit values -+ */ -+/******************************************************************************* -+* cas2ps - Translate x.y ns parameter to pico-seconds values -+* -+* DESCRIPTION: -+* This function translates x.y nano seconds to its value in pico seconds. -+* For example 3.75ns will return 3750. -+* -+* INPUT: -+* spd_byte - DIMM SPD byte. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* value in pico seconds. -+* -+*******************************************************************************/ -+static MV_U32 cas2ps(MV_U8 spd_byte) -+{ -+ MV_U32 ns, ns10; -+ -+ /* isolate upper nibble */ -+ ns = (spd_byte >> 4) & 0x0F; -+ /* isolate lower nibble */ -+ ns10 = (spd_byte & 0x0F); -+ -+ if( ns10 < 10 ) { -+ ns10 *= 10; -+ } -+ else if( ns10 == 10 ) -+ ns10 = 25; -+ else if( ns10 == 11 ) -+ ns10 = 33; -+ else if( ns10 == 12 ) -+ ns10 = 66; -+ else if( ns10 == 13 ) -+ ns10 = 75; -+ else -+ { -+ mvOsOutput("cas2ps Err. unsupported cycle time.\n"); -+ } -+ -+ return (ns*1000 + ns10*10); -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.h b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.h -new file mode 100644 -index 0000000..ae692ef ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/mvSpd.h -@@ -0,0 +1,192 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvDram -+#define __INCmvDram -+ -+#include "ddr2/mvDramIf.h" -+#include "twsi/mvTwsi.h" -+ -+#define MAX_DIMM_NUM 2 -+#define SPD_SIZE 128 -+ -+/* Dimm spd offsets */ -+#define DIMM_MEM_TYPE 2 -+#define DIMM_ROW_NUM 3 -+#define DIMM_COL_NUM 4 -+#define DIMM_MODULE_BANK_NUM 5 -+#define DIMM_DATA_WIDTH 6 -+#define DIMM_VOLT_IF 8 -+#define DIMM_MIN_CC_AT_MAX_CAS 9 -+#define DIMM_ERR_CHECK_TYPE 11 -+#define DIMM_REFRESH_INTERVAL 12 -+#define DIMM_SDRAM_WIDTH 13 -+#define DIMM_ERR_CHECK_DATA_WIDTH 14 -+#define DIMM_MIN_CLK_DEL 15 -+#define DIMM_BURST_LEN_SUP 16 -+#define DIMM_DEV_BANK_NUM 17 -+#define DIMM_SUP_CAL 18 -+#define DIMM_DDR2_TYPE_INFORMATION 20 /* DDR2 only */ -+#define DIMM_BUF_ADDR_CONT_IN 21 -+#define DIMM_MIN_CC_AT_MAX_CAS_MINUS1 23 -+#define DIMM_MIN_CC_AT_MAX_CAS_MINUS2 25 -+#define DIMM_MIN_ROW_PRECHARGE_TIME 27 -+#define DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE 28 -+#define DIMM_MIN_RAS_TO_CAS_DELAY 29 -+#define DIMM_MIN_RAS_PULSE_WIDTH 30 -+#define DIMM_BANK_DENSITY 31 -+#define DIMM_MIN_WRITE_RECOVERY_TIME 36 -+#define DIMM_MIN_WRITE_TO_READ_CMD_DELAY 37 -+#define DIMM_MIN_READ_TO_PRECH_CMD_DELAY 38 -+#define DIMM_MIN_REFRESH_TO_ACTIVATE_CMD 42 -+#define DIMM_SPD_VERSION 62 -+ -+/* Dimm Memory Type values */ -+#define DIMM_MEM_TYPE_SDRAM 0x4 -+#define DIMM_MEM_TYPE_DDR1 0x7 -+#define DIMM_MEM_TYPE_DDR2 0x8 -+ -+#define DIMM_MODULE_MANU_OFFS 64 -+#define DIMM_MODULE_MANU_SIZE 8 -+#define DIMM_MODULE_VEN_OFFS 73 -+#define DIMM_MODULE_VEN_SIZE 25 -+#define DIMM_MODULE_ID_OFFS 99 -+#define DIMM_MODULE_ID_SIZE 18 -+ -+/* enumeration for voltage levels. */ -+typedef enum _mvDimmVoltageIf -+{ -+ TTL_5V_TOLERANT, -+ LVTTL, -+ HSTL_1_5V, -+ SSTL_3_3V, -+ SSTL_2_5V, -+ VOLTAGE_UNKNOWN, -+} MV_DIMM_VOLTAGE_IF; -+ -+ -+/* enumaration for SDRAM CAS Latencies. */ -+typedef enum _mvDimmSdramCas -+{ -+ SD_CL_1 =1, -+ SD_CL_2, -+ SD_CL_3, -+ SD_CL_4, -+ SD_CL_5, -+ SD_CL_6, -+ SD_CL_7, -+ SD_FAULT -+}MV_DIMM_SDRAM_CAS; -+ -+ -+/* DIMM information structure */ -+typedef struct _mvDimmInfo -+{ -+ MV_MEMORY_TYPE memoryType; /* DDR or SDRAM */ -+ -+ MV_U8 spdRawData[SPD_SIZE]; /* Content of SPD-EEPROM copied 1:1 */ -+ -+ /* DIMM dimensions */ -+ MV_U32 numOfRowAddr; -+ MV_U32 numOfColAddr; -+ MV_U32 numOfModuleBanks; -+ MV_U32 dataWidth; -+ MV_U32 errorCheckType; /* ECC , PARITY..*/ -+ MV_U32 sdramWidth; /* 4,8,16 or 32 */ -+ MV_U32 errorCheckDataWidth; /* 0 - no, 1 - Yes */ -+ MV_U32 burstLengthSupported; -+ MV_U32 numOfBanksOnEachDevice; -+ MV_U32 suportedCasLatencies; -+ MV_U32 refreshInterval; -+ MV_U32 dimmBankDensity; -+ MV_U32 dimmTypeInfo; /* DDR2 only */ -+ MV_U32 dimmAttributes; -+ -+ /* DIMM timing parameters */ -+ MV_U32 minCycleTimeAtMaxCasLatPs; -+ MV_U32 minCycleTimeAtMaxCasLatMinus1Ps; -+ MV_U32 minCycleTimeAtMaxCasLatMinus2Ps; -+ MV_U32 minRowPrechargeTime; -+ MV_U32 minRowActiveToRowActive; -+ MV_U32 minRasToCasDelay; -+ MV_U32 minRasPulseWidth; -+ MV_U32 minWriteRecoveryTime; /* DDR2 only */ -+ MV_U32 minWriteToReadCmdDelay; /* DDR2 only */ -+ MV_U32 minReadToPrechCmdDelay; /* DDR2 only */ -+ MV_U32 minRefreshToActiveCmd; /* DDR2 only */ -+ -+ /* Parameters calculated from the extracted DIMM information */ -+ MV_U32 size; /* 16,64,128,256 or 512 MByte in MB units */ -+ MV_U32 deviceDensity; /* 16,64,128,256 or 512 Mbit in MB units */ -+ MV_U32 numberOfDevices; -+ -+} MV_DIMM_INFO; -+ -+ -+MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo); -+MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo); -+MV_VOID dimmSpdPrint(MV_U32 dimmNum); -+MV_STATUS dimmSpdCpy(MV_VOID); -+ -+#endif /* __INCmvDram */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEth.c b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEth.c -new file mode 100644 -index 0000000..2acd82b ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEth.c -@@ -0,0 +1,2952 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+/******************************************************************************* -+* mvEth.c - Marvell's Gigabit Ethernet controller low level driver -+* -+* DESCRIPTION: -+* This file introduce OS independent APIs to Marvell's Gigabit Ethernet -+* controller. This Gigabit Ethernet Controller driver API controls -+* 1) Operations (i.e. port Init, Finish, Up, Down, PhyReset etc'). -+* 2) Data flow (i.e. port Send, Receive etc'). -+* 3) MAC Filtering functions (ethSetMcastAddr, ethSetRxFilterMode, etc.) -+* 4) MIB counters support (ethReadMibCounter) -+* 5) Debug functions (ethPortRegs, ethPortCounters, ethPortQueues, etc.) -+* Each Gigabit Ethernet port is controlled via ETH_PORT_CTRL struct. -+* This struct includes configuration information as well as driver -+* internal data needed for its operations. -+* -+* Supported Features: -+* - OS independent. All required OS services are implemented via external -+* OS dependent components (like osLayer or ethOsg) -+* - The user is free from Rx/Tx queue managing. -+* - Simple Gigabit Ethernet port operation API. -+* - Simple Gigabit Ethernet port data flow API. -+* - Data flow and operation API support per queue functionality. -+* - Support cached descriptors for better performance. -+* - PHY access and control API. -+* - Port Configuration API. -+* - Full control over Special and Other Multicast MAC tables. -+* -+*******************************************************************************/ -+/* includes */ -+#include "mvTypes.h" -+#include "mv802_3.h" -+#include "mvDebug.h" -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "eth-phy/mvEthPhy.h" -+#include "eth/mvEth.h" -+#include "eth/gbe/mvEthGbe.h" -+#include "cpu/mvCpu.h" -+ -+#ifdef INCLUDE_SYNC_BARR -+#include "sys/mvCpuIf.h" -+#endif -+ -+#ifdef MV_RT_DEBUG -+# define ETH_DEBUG -+#endif -+ -+ -+/* locals */ -+MV_BOOL ethDescInSram; -+MV_BOOL ethDescSwCoher; -+ -+/* This array holds the control structure of each port */ -+ETH_PORT_CTRL* ethPortCtrl[MV_ETH_MAX_PORTS]; -+ -+/* Ethernet Port Local routines */ -+ -+static void ethInitRxDescRing(ETH_PORT_CTRL* pPortCtrl, int queue); -+ -+static void ethInitTxDescRing(ETH_PORT_CTRL* pPortCtrl, int queue); -+ -+static void ethSetUcastTable(int portNo, int queue); -+ -+static MV_BOOL ethSetUcastAddr (int ethPortNum, MV_U8 lastNibble, int queue); -+static MV_BOOL ethSetSpecialMcastAddr(int ethPortNum, MV_U8 lastByte, int queue); -+static MV_BOOL ethSetOtherMcastAddr(int ethPortNum, MV_U8 crc8, int queue); -+ -+static void ethFreeDescrMemory(ETH_PORT_CTRL* pEthPortCtrl, MV_BUF_INFO* pDescBuf); -+static MV_U8* ethAllocDescrMemory(ETH_PORT_CTRL* pEthPortCtrl, int size, -+ MV_ULONG* pPhysAddr, MV_U32 *memHandle); -+ -+static MV_U32 mvEthMruGet(MV_U32 maxRxPktSize); -+ -+static void mvEthPortSgmiiConfig(int port); -+ -+ -+ -+/******************************************************************************/ -+/* EthDrv Initialization functions */ -+/******************************************************************************/ -+ -+/******************************************************************************* -+* mvEthHalInit - Initialize the Giga Ethernet unit -+* -+* DESCRIPTION: -+* This function initialize the Giga Ethernet unit. -+* 1) Configure Address decode windows of the unit -+* 2) Set registers to HW default values. -+* 3) Clear and Disable interrupts -+* -+* INPUT: NONE -+* -+* RETURN: NONE -+* -+* NOTE: this function is called once in the boot process. -+*******************************************************************************/ -+void mvEthHalInit(void) -+{ -+ int port; -+ -+ /* Init static data structures */ -+ for (port=0; port<MV_ETH_MAX_PORTS; port++) -+ { -+ ethPortCtrl[port] = NULL; -+ } -+ /* Power down all existing ports */ -+ for(port=0; port<mvCtrlEthMaxPortGet(); port++) -+ { -+ -+#if defined (MV78200) -+ /* Skip ports mapped to another CPU*/ -+ if (MV_FALSE == mvSocUnitIsMappedToThisCpu(GIGA0+port)) -+ { -+ continue; -+ } -+#endif -+ -+ /* Skip power down ports */ -+ if (MV_FALSE == mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port)) continue; -+ -+ /* Disable Giga Ethernet Unit interrupts */ -+ MV_REG_WRITE(ETH_UNIT_INTR_MASK_REG(port), 0); -+ -+ /* Clear ETH_UNIT_INTR_CAUSE_REG register */ -+ MV_REG_WRITE(ETH_UNIT_INTR_CAUSE_REG(port), 0); -+ -+ } -+ -+ mvEthMemAttrGet(ðDescInSram, ðDescSwCoher); -+ -+#if defined(ETH_DESCR_IN_SRAM) -+ if(ethDescInSram == MV_FALSE) -+ { -+ mvOsPrintf("ethDrv: WARNING! Descriptors will be allocated in DRAM instead of SRAM.\n"); -+ } -+#endif /* ETH_DESCR_IN_SRAM */ -+} -+ -+/******************************************************************************* -+* mvEthMemAttrGet - Define properties (SRAM/DRAM, SW_COHER / HW_COHER / UNCACHED) -+* of of memory location for RX and TX descriptors. -+* -+* DESCRIPTION: -+* This function allocates memory for RX and TX descriptors. -+* - If ETH_DESCR_IN_SRAM defined, allocate from SRAM memory. -+* - If ETH_DESCR_IN_SDRAM defined, allocate from SDRAM memory. -+* -+* INPUT: -+* MV_BOOL* pIsSram - place of descriptors: -+* MV_TRUE - in SRAM -+* MV_FALSE - in DRAM -+* MV_BOOL* pIsSwCoher - cache coherency of descriptors: -+* MV_TRUE - driver is responsible for cache coherency -+* MV_FALSE - driver is not responsible for cache coherency -+* -+* RETURN: -+* -+*******************************************************************************/ -+void mvEthMemAttrGet(MV_BOOL* pIsSram, MV_BOOL* pIsSwCoher) -+{ -+ MV_BOOL isSram, isSwCoher; -+ -+ isSram = MV_FALSE; -+#if (ETHER_DRAM_COHER == MV_CACHE_COHER_SW) -+ isSwCoher = MV_TRUE; -+#else -+ isSwCoher = MV_FALSE; -+#endif -+ -+#if defined(ETH_DESCR_IN_SRAM) -+ if( mvCtrlSramSizeGet() > 0) -+ { -+ isSram = MV_TRUE; -+ #if (INTEG_SRAM_COHER == MV_CACHE_COHER_SW) -+ isSwCoher = MV_TRUE; -+ #else -+ isSwCoher = MV_FALSE; -+ #endif -+ } -+#endif /* ETH_DESCR_IN_SRAM */ -+ -+ if(pIsSram != NULL) -+ *pIsSram = isSram; -+ -+ if(pIsSwCoher != NULL) -+ *pIsSwCoher = isSwCoher; -+} -+ -+ -+ -+/******************************************************************************/ -+/* Port Initialization functions */ -+/******************************************************************************/ -+ -+/******************************************************************************* -+* mvEthPortInit - Initialize the Ethernet port driver -+* -+* DESCRIPTION: -+* This function initialize the ethernet port. -+* 1) Allocate and initialize internal port Control structure. -+* 2) Create RX and TX descriptor rings for default RX and TX queues -+* 3) Disable RX and TX operations, clear cause registers and -+* mask all interrupts. -+* 4) Set all registers to default values and clean all MAC tables. -+* -+* INPUT: -+* int portNo - Ethernet port number -+* ETH_PORT_INIT *pEthPortInit - Ethernet port init structure -+* -+* RETURN: -+* void* - ethernet port handler, that should be passed to the most other -+* functions dealing with this port. -+* -+* NOTE: This function is called once per port when loading the eth module. -+*******************************************************************************/ -+void* mvEthPortInit(int portNo, MV_ETH_PORT_INIT *pEthPortInit) -+{ -+ int queue, descSize; -+ ETH_PORT_CTRL* pPortCtrl; -+ -+ /* Check validity of parameters */ -+ if( (portNo >= (int)mvCtrlEthMaxPortGet()) || -+ (pEthPortInit->rxDefQ >= MV_ETH_RX_Q_NUM) || -+ (pEthPortInit->maxRxPktSize < 1518) ) -+ { -+ mvOsPrintf("EthPort #%d: Bad initialization parameters\n", portNo); -+ return NULL; -+ } -+ if( (pEthPortInit->rxDescrNum[pEthPortInit->rxDefQ]) == 0) -+ { -+ mvOsPrintf("EthPort #%d: rxDefQ (%d) must be created\n", -+ portNo, pEthPortInit->rxDefQ); -+ return NULL; -+ } -+ -+ pPortCtrl = (ETH_PORT_CTRL*)mvOsMalloc( sizeof(ETH_PORT_CTRL) ); -+ if(pPortCtrl == NULL) -+ { -+ mvOsPrintf("EthDrv: Can't allocate %dB for port #%d control structure!\n", -+ (int)sizeof(ETH_PORT_CTRL), portNo); -+ return NULL; -+ } -+ -+ memset(pPortCtrl, 0, sizeof(ETH_PORT_CTRL) ); -+ ethPortCtrl[portNo] = pPortCtrl; -+ -+ pPortCtrl->portState = MV_UNDEFINED_STATE; -+ -+ pPortCtrl->portNo = portNo; -+ -+ pPortCtrl->osHandle = pEthPortInit->osHandle; -+ -+ /* Copy Configuration parameters */ -+ pPortCtrl->portConfig.maxRxPktSize = pEthPortInit->maxRxPktSize; -+ pPortCtrl->portConfig.rxDefQ = pEthPortInit->rxDefQ; -+ pPortCtrl->portConfig.ejpMode = 0; -+ -+ for( queue=0; queue<MV_ETH_RX_Q_NUM; queue++ ) -+ { -+ pPortCtrl->rxQueueConfig[queue].descrNum = pEthPortInit->rxDescrNum[queue]; -+ } -+ for( queue=0; queue<MV_ETH_TX_Q_NUM; queue++ ) -+ { -+ pPortCtrl->txQueueConfig[queue].descrNum = pEthPortInit->txDescrNum[queue]; -+ } -+ -+ mvEthPortDisable(pPortCtrl); -+ -+ /* Set the board information regarding PHY address */ -+ mvEthPhyAddrSet(pPortCtrl, mvBoardPhyAddrGet(portNo) ); -+ -+ /* Create all requested RX queues */ -+ for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++) -+ { -+ if(pPortCtrl->rxQueueConfig[queue].descrNum == 0) -+ continue; -+ -+ /* Allocate memory for RX descriptors */ -+ descSize = ((pPortCtrl->rxQueueConfig[queue].descrNum * ETH_RX_DESC_ALIGNED_SIZE) + -+ CPU_D_CACHE_LINE_SIZE); -+ -+ pPortCtrl->rxQueue[queue].descBuf.bufVirtPtr = -+ ethAllocDescrMemory(pPortCtrl, descSize, -+ &pPortCtrl->rxQueue[queue].descBuf.bufPhysAddr, -+ &pPortCtrl->rxQueue[queue].descBuf.memHandle); -+ pPortCtrl->rxQueue[queue].descBuf.bufSize = descSize; -+ if(pPortCtrl->rxQueue[queue].descBuf.bufVirtPtr == NULL) -+ { -+ mvOsPrintf("EthPort #%d, rxQ=%d: Can't allocate %d bytes in %s for %d RX descr\n", -+ pPortCtrl->portNo, queue, descSize, -+ ethDescInSram ? "SRAM" : "DRAM", -+ pPortCtrl->rxQueueConfig[queue].descrNum); -+ return NULL; -+ } -+ -+ ethInitRxDescRing(pPortCtrl, queue); -+ } -+ /* Create TX queues */ -+ for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++) -+ { -+ if(pPortCtrl->txQueueConfig[queue].descrNum == 0) -+ continue; -+ -+ /* Allocate memory for TX descriptors */ -+ descSize = ((pPortCtrl->txQueueConfig[queue].descrNum * ETH_TX_DESC_ALIGNED_SIZE) + -+ CPU_D_CACHE_LINE_SIZE); -+ -+ pPortCtrl->txQueue[queue].descBuf.bufVirtPtr = -+ ethAllocDescrMemory(pPortCtrl, descSize, -+ &pPortCtrl->txQueue[queue].descBuf.bufPhysAddr, -+ &pPortCtrl->txQueue[queue].descBuf.memHandle); -+ pPortCtrl->txQueue[queue].descBuf.bufSize = descSize; -+ if(pPortCtrl->txQueue[queue].descBuf.bufVirtPtr == NULL) -+ { -+ mvOsPrintf("EthPort #%d, txQ=%d: Can't allocate %d bytes in %s for %d TX descr\n", -+ pPortCtrl->portNo, queue, descSize, ethDescInSram ? "SRAM" : "DRAM", -+ pPortCtrl->txQueueConfig[queue].descrNum); -+ return NULL; -+ } -+ -+ ethInitTxDescRing(pPortCtrl, queue); -+ } -+ mvEthDefaultsSet(pPortCtrl); -+ -+ pPortCtrl->portState = MV_IDLE; -+ return pPortCtrl; -+} -+ -+/******************************************************************************* -+* ethPortFinish - Finish the Ethernet port driver -+* -+* DESCRIPTION: -+* This function finish the ethernet port. -+* 1) Down ethernet port if needed. -+* 2) Delete RX and TX descriptor rings for all created RX and TX queues -+* 3) Free internal port Control structure. -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet port handler -+* -+* RETURN: NONE. -+* -+*******************************************************************************/ -+void mvEthPortFinish(void* pPortHndl) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ int queue, portNo = pPortCtrl->portNo; -+ -+ if(pPortCtrl->portState == MV_ACTIVE) -+ { -+ mvOsPrintf("ethPort #%d: Warning !!! Finish port in Active state\n", -+ portNo); -+ mvEthPortDisable(pPortHndl); -+ } -+ -+ /* Free all allocated RX queues */ -+ for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++) -+ { -+ ethFreeDescrMemory(pPortCtrl, &pPortCtrl->rxQueue[queue].descBuf); -+ } -+ -+ /* Free all allocated TX queues */ -+ for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++) -+ { -+ ethFreeDescrMemory(pPortCtrl, &pPortCtrl->txQueue[queue].descBuf); -+ } -+ -+ /* Free port control structure */ -+ mvOsFree(pPortCtrl); -+ -+ ethPortCtrl[portNo] = NULL; -+} -+ -+/******************************************************************************* -+* mvEthDefaultsSet - Set defaults to the ethernet port -+* -+* DESCRIPTION: -+* This function set default values to the ethernet port. -+* 1) Clear Cause registers and Mask all interrupts -+* 2) Clear all MAC tables -+* 3) Set defaults to all registers -+* 4) Reset all created RX and TX descriptors ring -+* 5) Reset PHY -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet port handler -+* -+* RETURN: MV_STATUS -+* MV_OK - Success, Others - Failure -+* NOTE: -+* This function update all the port configuration except those set -+* Initialy by the OsGlue by MV_ETH_PORT_INIT. -+* This function can be called after portDown to return the port setting -+* to defaults. -+*******************************************************************************/ -+MV_STATUS mvEthDefaultsSet(void* pPortHndl) -+{ -+ int ethPortNo, queue; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ MV_U32 txPrio; -+ MV_U32 portCfgReg, portCfgExtReg, portSerialCtrlReg, portSerialCtrl1Reg, portSdmaCfgReg; -+ MV_BOARD_MAC_SPEED boardMacCfg; -+ -+ ethPortNo = pPortCtrl->portNo; -+ -+ /* Clear Cause registers */ -+ MV_REG_WRITE(ETH_INTR_CAUSE_REG(ethPortNo),0); -+ MV_REG_WRITE(ETH_INTR_CAUSE_EXT_REG(ethPortNo),0); -+ -+ /* Mask all interrupts */ -+ MV_REG_WRITE(ETH_INTR_MASK_REG(ethPortNo),0); -+ MV_REG_WRITE(ETH_INTR_MASK_EXT_REG(ethPortNo),0); -+ -+ portCfgReg = PORT_CONFIG_VALUE; -+ portCfgExtReg = PORT_CONFIG_EXTEND_VALUE; -+ -+ boardMacCfg = mvBoardMacSpeedGet(ethPortNo); -+ -+ if(boardMacCfg == BOARD_MAC_SPEED_100M) -+ { -+ portSerialCtrlReg = PORT_SERIAL_CONTROL_100MB_FORCE_VALUE; -+ } -+ else if(boardMacCfg == BOARD_MAC_SPEED_1000M) -+ { -+ portSerialCtrlReg = PORT_SERIAL_CONTROL_1000MB_FORCE_VALUE; -+ } -+ else -+ { -+ portSerialCtrlReg = PORT_SERIAL_CONTROL_VALUE; -+ } -+ -+ /* build PORT_SDMA_CONFIG_REG */ -+ portSdmaCfgReg = ETH_TX_INTR_COAL_MASK(0); -+ portSdmaCfgReg |= ETH_TX_BURST_SIZE_MASK(ETH_BURST_SIZE_16_64BIT_VALUE); -+ -+#if ( (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WB) || \ -+ (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WT) ) -+ /* some devices have restricted RX burst size when using HW coherency */ -+ portSdmaCfgReg |= ETH_RX_BURST_SIZE_MASK(ETH_BURST_SIZE_4_64BIT_VALUE); -+#else -+ portSdmaCfgReg |= ETH_RX_BURST_SIZE_MASK(ETH_BURST_SIZE_16_64BIT_VALUE); -+#endif -+ -+#if defined(MV_CPU_BE) -+ /* big endian */ -+# if defined(MV_ARM) -+ portSdmaCfgReg |= (ETH_RX_NO_DATA_SWAP_MASK | -+ ETH_TX_NO_DATA_SWAP_MASK | -+ ETH_DESC_SWAP_MASK); -+# elif defined(MV_PPC) -+ portSdmaCfgReg |= (ETH_RX_DATA_SWAP_MASK | -+ ETH_TX_DATA_SWAP_MASK | -+ ETH_NO_DESC_SWAP_MASK); -+# else -+# error "Giga Ethernet Swap policy is not defined for the CPU_ARCH" -+# endif /* MV_ARM / MV_PPC */ -+ -+#else /* MV_CPU_LE */ -+ /* little endian */ -+ portSdmaCfgReg |= (ETH_RX_NO_DATA_SWAP_MASK | -+ ETH_TX_NO_DATA_SWAP_MASK | -+ ETH_NO_DESC_SWAP_MASK); -+#endif /* MV_CPU_BE / MV_CPU_LE */ -+ -+ pPortCtrl->portRxQueueCmdReg = 0; -+ pPortCtrl->portTxQueueCmdReg = 0; -+ -+#if (MV_ETH_VERSION >= 4) -+ if(pPortCtrl->portConfig.ejpMode == MV_TRUE) -+ { -+ MV_REG_WRITE(ETH_TXQ_CMD_1_REG(ethPortNo), ETH_TX_EJP_ENABLE_MASK); -+ } -+ else -+ { -+ MV_REG_WRITE(ETH_TXQ_CMD_1_REG(ethPortNo), 0) -+ } -+#endif /* (MV_ETH_VERSION >= 4) */ -+ -+ ethSetUcastTable(ethPortNo, -1); -+ mvEthSetSpecialMcastTable(ethPortNo, -1); -+ mvEthSetOtherMcastTable(ethPortNo, -1); -+ -+ portSerialCtrlReg &= ~ETH_MAX_RX_PACKET_SIZE_MASK; -+ -+ portSerialCtrlReg |= mvEthMruGet(pPortCtrl->portConfig.maxRxPktSize); -+ -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNo), portSerialCtrlReg); -+ -+ /* Update value of PortConfig register accordingly with all RxQueue types */ -+ pPortCtrl->portConfig.rxArpQ = pPortCtrl->portConfig.rxDefQ; -+ pPortCtrl->portConfig.rxBpduQ = pPortCtrl->portConfig.rxDefQ; -+ pPortCtrl->portConfig.rxTcpQ = pPortCtrl->portConfig.rxDefQ; -+ pPortCtrl->portConfig.rxUdpQ = pPortCtrl->portConfig.rxDefQ; -+ -+ portCfgReg &= ~ETH_DEF_RX_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_QUEUE_MASK(pPortCtrl->portConfig.rxDefQ); -+ -+ portCfgReg &= ~ETH_DEF_RX_ARP_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_ARP_QUEUE_MASK(pPortCtrl->portConfig.rxArpQ); -+ -+ portCfgReg &= ~ETH_DEF_RX_BPDU_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_BPDU_QUEUE_MASK(pPortCtrl->portConfig.rxBpduQ); -+ -+ portCfgReg &= ~ETH_DEF_RX_TCP_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_TCP_QUEUE_MASK(pPortCtrl->portConfig.rxTcpQ); -+ -+ portCfgReg &= ~ETH_DEF_RX_UDP_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_UDP_QUEUE_MASK(pPortCtrl->portConfig.rxUdpQ); -+ -+ /* Assignment of Tx CTRP of given queue */ -+ txPrio = 0; -+ -+ for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++) -+ { -+ pQueueCtrl = &pPortCtrl->txQueue[queue]; -+ -+ if(pQueueCtrl->pFirstDescr != NULL) -+ { -+ ethResetTxDescRing(pPortCtrl, queue); -+ -+ MV_REG_WRITE(ETH_TXQ_TOKEN_COUNT_REG(ethPortNo, queue), -+ 0x3fffffff); -+ MV_REG_WRITE(ETH_TXQ_TOKEN_CFG_REG(ethPortNo, queue), -+ 0x03ffffff); -+ } -+ else -+ { -+ MV_REG_WRITE(ETH_TXQ_TOKEN_COUNT_REG(ethPortNo, queue), 0x0); -+ MV_REG_WRITE(ETH_TXQ_TOKEN_CFG_REG(ethPortNo, queue), 0x0); -+ } -+ } -+ -+ /* Assignment of Rx CRDP of given queue */ -+ for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++) -+ { -+ ethResetRxDescRing(pPortCtrl, queue); -+ } -+ -+ /* Allow receiving packes with odd number of preamble nibbles */ -+ portSerialCtrl1Reg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(ethPortNo)); -+ portSerialCtrl1Reg |= ETH_EN_MII_ODD_PRE_MASK; -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(ethPortNo), portSerialCtrl1Reg); -+ -+ /* Assign port configuration and command. */ -+ MV_REG_WRITE(ETH_PORT_CONFIG_REG(ethPortNo), portCfgReg); -+ -+ MV_REG_WRITE(ETH_PORT_CONFIG_EXTEND_REG(ethPortNo), portCfgExtReg); -+ -+ /* Assign port SDMA configuration */ -+ MV_REG_WRITE(ETH_SDMA_CONFIG_REG(ethPortNo), portSdmaCfgReg); -+ -+ /* Turn off the port/queue bandwidth limitation */ -+ MV_REG_WRITE(ETH_MAX_TRANSMIT_UNIT_REG(ethPortNo), 0x0); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* ethPortUp - Start the Ethernet port RX and TX activity. -+* -+* DESCRIPTION: -+* This routine start Rx and Tx activity: -+* -+* Note: Each Rx and Tx queue descriptor's list must be initialized prior -+* to calling this function (use etherInitTxDescRing for Tx queues and -+* etherInitRxDescRing for Rx queues). -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet port handler -+* -+* RETURN: MV_STATUS -+* MV_OK - Success, Others - Failure. -+* -+* NOTE : used for port link up. -+*******************************************************************************/ -+MV_STATUS mvEthPortUp(void* pEthPortHndl) -+{ -+ int ethPortNo; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ -+ ethPortNo = pPortCtrl->portNo; -+ -+ if( (pPortCtrl->portState != MV_ACTIVE) && -+ (pPortCtrl->portState != MV_PAUSED) ) -+ { -+ mvOsPrintf("ethDrv port%d: Unexpected port state %d\n", -+ ethPortNo, pPortCtrl->portState); -+ return MV_BAD_STATE; -+ } -+ -+ ethPortNo = pPortCtrl->portNo; -+ -+ /* Enable port RX. */ -+ MV_REG_WRITE(ETH_RX_QUEUE_COMMAND_REG(ethPortNo), pPortCtrl->portRxQueueCmdReg); -+ -+ /* Enable port TX. */ -+ MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(ethPortNo)) = pPortCtrl->portTxQueueCmdReg; -+ -+ pPortCtrl->portState = MV_ACTIVE; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* ethPortDown - Stop the Ethernet port activity. -+* -+* DESCRIPTION: -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet port handler -+* -+* RETURN: MV_STATUS -+* MV_OK - Success, Others - Failure. -+* -+* NOTE : used for port link down. -+*******************************************************************************/ -+MV_STATUS mvEthPortDown(void* pEthPortHndl) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ int ethPortNum = pPortCtrl->portNo; -+ unsigned int regData; -+ volatile int uDelay, mDelay; -+ -+ /* Stop Rx port activity. Check port Rx activity. */ -+ regData = (MV_REG_READ(ETH_RX_QUEUE_COMMAND_REG(ethPortNum))) & ETH_RXQ_ENABLE_MASK; -+ if(regData != 0) -+ { -+ /* Issue stop command for active channels only */ -+ MV_REG_WRITE(ETH_RX_QUEUE_COMMAND_REG(ethPortNum), (regData << ETH_RXQ_DISABLE_OFFSET)); -+ } -+ -+ /* Stop Tx port activity. Check port Tx activity. */ -+ regData = (MV_REG_READ(ETH_TX_QUEUE_COMMAND_REG(ethPortNum))) & ETH_TXQ_ENABLE_MASK; -+ if(regData != 0) -+ { -+ /* Issue stop command for active channels only */ -+ MV_REG_WRITE(ETH_TX_QUEUE_COMMAND_REG(ethPortNum), -+ (regData << ETH_TXQ_DISABLE_OFFSET) ); -+ } -+ -+ /* Force link down */ -+/* -+ regData = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(ethPortNum)); -+ regData &= ~(ETH_DO_NOT_FORCE_LINK_FAIL_MASK); -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNum), regData); -+*/ -+ /* Wait for all Rx activity to terminate. */ -+ mDelay = 0; -+ do -+ { -+ if(mDelay >= RX_DISABLE_TIMEOUT_MSEC) -+ { -+ mvOsPrintf("ethPort_%d: TIMEOUT for RX stopped !!! rxQueueCmd - 0x08%x\n", -+ ethPortNum, regData); -+ break; -+ } -+ mvOsDelay(1); -+ mDelay++; -+ -+ /* Check port RX Command register that all Rx queues are stopped */ -+ regData = MV_REG_READ(ETH_RX_QUEUE_COMMAND_REG(ethPortNum)); -+ } -+ while(regData & 0xFF); -+ -+ /* Wait for all Tx activity to terminate. */ -+ mDelay = 0; -+ do -+ { -+ if(mDelay >= TX_DISABLE_TIMEOUT_MSEC) -+ { -+ mvOsPrintf("ethPort_%d: TIMEOUT for TX stoped !!! txQueueCmd - 0x08%x\n", -+ ethPortNum, regData); -+ break; -+ } -+ mvOsDelay(1); -+ mDelay++; -+ -+ /* Check port TX Command register that all Tx queues are stopped */ -+ regData = MV_REG_READ(ETH_TX_QUEUE_COMMAND_REG(ethPortNum)); -+ } -+ while(regData & 0xFF); -+ -+ /* Double check to Verify that TX FIFO is Empty */ -+ mDelay = 0; -+ while(MV_TRUE) -+ { -+ do -+ { -+ if(mDelay >= TX_FIFO_EMPTY_TIMEOUT_MSEC) -+ { -+ mvOsPrintf("\n ethPort_%d: TIMEOUT for TX FIFO empty !!! portStatus - 0x08%x\n", -+ ethPortNum, regData); -+ break; -+ } -+ mvOsDelay(1); -+ mDelay++; -+ -+ regData = MV_REG_READ(ETH_PORT_STATUS_REG(ethPortNum)); -+ } -+ while( ((regData & ETH_TX_FIFO_EMPTY_MASK) == 0) || -+ ((regData & ETH_TX_IN_PROGRESS_MASK) != 0) ); -+ -+ if(mDelay >= TX_FIFO_EMPTY_TIMEOUT_MSEC) -+ break; -+ -+ /* Double check */ -+ regData = MV_REG_READ(ETH_PORT_STATUS_REG(ethPortNum)); -+ if( ((regData & ETH_TX_FIFO_EMPTY_MASK) != 0) && -+ ((regData & ETH_TX_IN_PROGRESS_MASK) == 0) ) -+ { -+ break; -+ } -+ else -+ mvOsPrintf("ethPort_%d: TX FIFO Empty double check failed. %d msec, portStatus=0x%x\n", -+ ethPortNum, mDelay, regData); -+ } -+ -+ /* Do NOT force link down */ -+/* -+ regData = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(ethPortNum)); -+ regData |= (ETH_DO_NOT_FORCE_LINK_FAIL_MASK); -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNum), regData); -+*/ -+ /* Wait about 2500 tclk cycles */ -+ uDelay = (PORT_DISABLE_WAIT_TCLOCKS/(mvBoardTclkGet()/1000000)); -+ mvOsUDelay(uDelay); -+ -+ pPortCtrl->portState = MV_PAUSED; -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* ethPortEnable - Enable the Ethernet port and Start RX and TX. -+* -+* DESCRIPTION: -+* This routine enable the Ethernet port and Rx and Tx activity: -+* -+* Note: Each Rx and Tx queue descriptor's list must be initialized prior -+* to calling this function (use etherInitTxDescRing for Tx queues and -+* etherInitRxDescRing for Rx queues). -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet port handler -+* -+* RETURN: MV_STATUS -+* MV_OK - Success, Others - Failure. -+* -+* NOTE: main usage is to enable the port after ifconfig up. -+*******************************************************************************/ -+MV_STATUS mvEthPortEnable(void* pEthPortHndl) -+{ -+ int ethPortNo; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ MV_U32 portSerialCtrlReg; -+ -+ ethPortNo = pPortCtrl->portNo; -+ -+ /* Enable port */ -+ portSerialCtrlReg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(ethPortNo)); -+ portSerialCtrlReg |= (ETH_DO_NOT_FORCE_LINK_FAIL_MASK | ETH_PORT_ENABLE_MASK); -+ -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNo), portSerialCtrlReg); -+ -+ mvEthMibCountersClear(pEthPortHndl); -+ -+ pPortCtrl->portState = MV_PAUSED; -+ -+ /* If Link is UP, Start RX and TX traffic */ -+ if( MV_REG_READ( ETH_PORT_STATUS_REG(ethPortNo) ) & ETH_LINK_UP_MASK) -+ return( mvEthPortUp(pEthPortHndl) ); -+ -+ return MV_NOT_READY; -+} -+ -+ -+/******************************************************************************* -+* mvEthPortDisable - Stop RX and TX activities and Disable the Ethernet port. -+* -+* DESCRIPTION: -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet port handler -+* -+* RETURN: MV_STATUS -+* MV_OK - Success, Others - Failure. -+* -+* NOTE: main usage is to disable the port after ifconfig down. -+*******************************************************************************/ -+MV_STATUS mvEthPortDisable(void* pEthPortHndl) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ int ethPortNum = pPortCtrl->portNo; -+ unsigned int regData; -+ volatile int mvDelay; -+ -+ if(pPortCtrl->portState == MV_ACTIVE) -+ { -+ /* Stop RX and TX activities */ -+ mvEthPortDown(pEthPortHndl); -+ } -+ -+ /* Reset the Enable bit in the Serial Control Register */ -+ regData = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(ethPortNum)); -+ regData &= ~(ETH_PORT_ENABLE_MASK); -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNum), regData); -+ -+ /* Wait about 2500 tclk cycles */ -+ mvDelay = (PORT_DISABLE_WAIT_TCLOCKS*(mvCpuPclkGet()/mvBoardTclkGet())); -+ for(mvDelay; mvDelay>0; mvDelay--); -+ -+ pPortCtrl->portState = MV_IDLE; -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthPortForceTxDone - Get next buffer from TX queue in spite of buffer ownership. -+* -+* DESCRIPTION: -+* This routine used to free buffers attached to the Tx ring and should -+* be called only when Giga Ethernet port is Down -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet Port handler. -+* int txQueue - Number of TX queue. -+* -+* OUTPUT: -+* MV_PKT_INFO *pPktInfo - Pointer to packet was sent. -+* -+* RETURN: -+* MV_EMPTY - There is no more buffers in this queue. -+* MV_OK - Buffer detached from the queue and pPktInfo structure -+* filled with relevant information. -+* -+*******************************************************************************/ -+MV_PKT_INFO* mvEthPortForceTxDone(void* pEthPortHndl, int txQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ MV_PKT_INFO* pPktInfo; -+ ETH_TX_DESC* pTxDesc; -+ int port = pPortCtrl->portNo; -+ -+ pQueueCtrl = &pPortCtrl->txQueue[txQueue]; -+ -+ while( (pQueueCtrl->pUsedDescr != pQueueCtrl->pCurrentDescr) || -+ (pQueueCtrl->resource == 0) ) -+ { -+ /* Free next descriptor */ -+ pQueueCtrl->resource++; -+ pTxDesc = (ETH_TX_DESC*)pQueueCtrl->pUsedDescr; -+ -+ /* pPktInfo is available only in descriptors which are last descriptors */ -+ pPktInfo = (MV_PKT_INFO*)pTxDesc->returnInfo; -+ if (pPktInfo) -+ pPktInfo->status = pTxDesc->cmdSts; -+ -+ pTxDesc->cmdSts = 0x0; -+ pTxDesc->returnInfo = 0x0; -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pTxDesc); -+ -+ pQueueCtrl->pUsedDescr = TX_NEXT_DESC_PTR(pTxDesc, pQueueCtrl); -+ -+ if (pPktInfo) -+ if (pPktInfo->status & ETH_TX_LAST_DESC_MASK) -+ return pPktInfo; -+ } -+ MV_REG_WRITE( ETH_TX_CUR_DESC_PTR_REG(port, txQueue), -+ (MV_U32)ethDescVirtToPhy(pQueueCtrl, pQueueCtrl->pCurrentDescr) ); -+ return NULL; -+} -+ -+ -+ -+/******************************************************************************* -+* mvEthPortForceRx - Get next buffer from RX queue in spite of buffer ownership. -+* -+* DESCRIPTION: -+* This routine used to free buffers attached to the Rx ring and should -+* be called only when Giga Ethernet port is Down -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet Port handler. -+* int rxQueue - Number of Rx queue. -+* -+* OUTPUT: -+* MV_PKT_INFO *pPktInfo - Pointer to received packet. -+* -+* RETURN: -+* MV_EMPTY - There is no more buffers in this queue. -+* MV_OK - Buffer detached from the queue and pBufInfo structure -+* filled with relevant information. -+* -+*******************************************************************************/ -+MV_PKT_INFO* mvEthPortForceRx(void* pEthPortHndl, int rxQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ ETH_RX_DESC* pRxDesc; -+ MV_PKT_INFO* pPktInfo; -+ int port = pPortCtrl->portNo; -+ -+ pQueueCtrl = &pPortCtrl->rxQueue[rxQueue]; -+ -+ if(pQueueCtrl->resource == 0) -+ { -+ MV_REG_WRITE( ETH_RX_CUR_DESC_PTR_REG(port, rxQueue), -+ (MV_U32)ethDescVirtToPhy(pQueueCtrl, pQueueCtrl->pCurrentDescr) ); -+ -+ return NULL; -+ } -+ /* Free next descriptor */ -+ pQueueCtrl->resource--; -+ pRxDesc = (ETH_RX_DESC*)pQueueCtrl->pCurrentDescr; -+ pPktInfo = (MV_PKT_INFO*)pRxDesc->returnInfo; -+ -+ pPktInfo->status = pRxDesc->cmdSts; -+ pRxDesc->cmdSts = 0x0; -+ pRxDesc->returnInfo = 0x0; -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pRxDesc); -+ -+ pQueueCtrl->pCurrentDescr = RX_NEXT_DESC_PTR(pRxDesc, pQueueCtrl); -+ return pPktInfo; -+} -+ -+ -+/******************************************************************************/ -+/* Port Configuration functions */ -+/******************************************************************************/ -+/******************************************************************************* -+* mvEthMruGet - Get MRU configuration for Max Rx packet size. -+* -+* INPUT: -+* MV_U32 maxRxPktSize - max packet size. -+* -+* RETURN: MV_U32 - MRU configuration. -+* -+*******************************************************************************/ -+static MV_U32 mvEthMruGet(MV_U32 maxRxPktSize) -+{ -+ MV_U32 portSerialCtrlReg = 0; -+ -+ if(maxRxPktSize > 9192) -+ portSerialCtrlReg |= ETH_MAX_RX_PACKET_9700BYTE; -+ else if(maxRxPktSize > 9022) -+ portSerialCtrlReg |= ETH_MAX_RX_PACKET_9192BYTE; -+ else if(maxRxPktSize > 1552) -+ portSerialCtrlReg |= ETH_MAX_RX_PACKET_9022BYTE; -+ else if(maxRxPktSize > 1522) -+ portSerialCtrlReg |= ETH_MAX_RX_PACKET_1552BYTE; -+ else if(maxRxPktSize > 1518) -+ portSerialCtrlReg |= ETH_MAX_RX_PACKET_1522BYTE; -+ else -+ portSerialCtrlReg |= ETH_MAX_RX_PACKET_1518BYTE; -+ -+ return portSerialCtrlReg; -+} -+ -+/******************************************************************************* -+* mvEthRxCoalSet - Sets coalescing interrupt mechanism on RX path -+* -+* DESCRIPTION: -+* This routine sets the RX coalescing interrupt mechanism parameter. -+* This parameter is a timeout counter, that counts in 64 tClk -+* chunks, that when timeout event occurs a maskable interrupt occurs. -+* The parameter is calculated using the tCLK frequency of the -+* MV-64xxx chip, and the required number is in micro seconds. -+* -+* INPUT: -+* void* pPortHndl - Ethernet Port handler. -+* MV_U32 uSec - Number of micro seconds between -+* RX interrupts -+* -+* RETURN: -+* None. -+* -+* COMMENT: -+* 1 sec - TCLK_RATE clocks -+* 1 uSec - TCLK_RATE / 1,000,000 clocks -+* -+* Register Value for N micro seconds - ((N * ( (TCLK_RATE / 1,000,000)) / 64) -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_U32 mvEthRxCoalSet (void* pPortHndl, MV_U32 uSec) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ MV_U32 coal = ((uSec * (mvBoardTclkGet() / 1000000)) / 64); -+ MV_U32 portSdmaCfgReg; -+ -+ portSdmaCfgReg = MV_REG_READ(ETH_SDMA_CONFIG_REG(pPortCtrl->portNo)); -+ portSdmaCfgReg &= ~ETH_RX_INTR_COAL_ALL_MASK; -+ -+ portSdmaCfgReg |= ETH_RX_INTR_COAL_MASK(coal); -+ -+#if (MV_ETH_VERSION >= 2) -+ /* Set additional bit if needed ETH_RX_INTR_COAL_MSB_BIT (25) */ -+ if(ETH_RX_INTR_COAL_MASK(coal) > ETH_RX_INTR_COAL_ALL_MASK) -+ portSdmaCfgReg |= ETH_RX_INTR_COAL_MSB_MASK; -+#endif /* MV_ETH_VERSION >= 2 */ -+ -+ MV_REG_WRITE (ETH_SDMA_CONFIG_REG(pPortCtrl->portNo), portSdmaCfgReg); -+ return coal; -+} -+ -+/******************************************************************************* -+* mvEthTxCoalSet - Sets coalescing interrupt mechanism on TX path -+* -+* DESCRIPTION: -+* This routine sets the TX coalescing interrupt mechanism parameter. -+* This parameter is a timeout counter, that counts in 64 tClk -+* chunks, that when timeout event occurs a maskable interrupt -+* occurs. -+* The parameter is calculated using the tCLK frequency of the -+* MV-64xxx chip, and the required number is in micro seconds. -+* -+* INPUT: -+* void* pPortHndl - Ethernet Port handler. -+* MV_U32 uSec - Number of micro seconds between -+* RX interrupts -+* -+* RETURN: -+* None. -+* -+* COMMENT: -+* 1 sec - TCLK_RATE clocks -+* 1 uSec - TCLK_RATE / 1,000,000 clocks -+* -+* Register Value for N micro seconds - ((N * ( (TCLK_RATE / 1,000,000)) / 64) -+* -+*******************************************************************************/ -+MV_U32 mvEthTxCoalSet(void* pPortHndl, MV_U32 uSec) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ MV_U32 coal = ((uSec * (mvBoardTclkGet() / 1000000)) / 64); -+ MV_U32 regVal; -+ -+ regVal = MV_REG_READ(ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo)); -+ regVal &= ~ETH_TX_INTR_COAL_ALL_MASK; -+ regVal |= ETH_TX_INTR_COAL_MASK(coal); -+ -+ /* Set TX Coalescing mechanism */ -+ MV_REG_WRITE (ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo), regVal); -+ return coal; -+} -+ -+/******************************************************************************* -+* mvEthCoalGet - Gets RX and TX coalescing values in micro seconds -+* -+* DESCRIPTION: -+* This routine gets the RX and TX coalescing interrupt values. -+* The parameter is calculated using the tCLK frequency of the -+* MV-64xxx chip, and the returned numbers are in micro seconds. -+* -+* INPUTs: -+* void* pPortHndl - Ethernet Port handler. -+* -+* OUTPUTs: -+* MV_U32* pRxCoal - Number of micro seconds between RX interrupts -+* MV_U32* pTxCoal - Number of micro seconds between TX interrupts -+* -+* RETURN: -+* MV_STATUS MV_OK - success -+* Others - failure. -+* -+* COMMENT: -+* 1 sec - TCLK_RATE clocks -+* 1 uSec - TCLK_RATE / 1,000,000 clocks -+* -+* Register Value for N micro seconds - ((N * ( (TCLK_RATE / 1,000,000)) / 64) -+* -+*******************************************************************************/ -+MV_STATUS mvEthCoalGet(void* pPortHndl, MV_U32* pRxCoal, MV_U32* pTxCoal) -+{ -+ MV_U32 regVal, coal, usec; -+ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ -+ /* get TX Coalescing */ -+ regVal = MV_REG_READ (ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo)); -+ coal = ((regVal & ETH_TX_INTR_COAL_ALL_MASK) >> ETH_TX_INTR_COAL_OFFSET); -+ -+ usec = (coal * 64) / (mvBoardTclkGet() / 1000000); -+ if(pTxCoal != NULL) -+ *pTxCoal = usec; -+ -+ /* Get RX Coalescing */ -+ regVal = MV_REG_READ(ETH_SDMA_CONFIG_REG(pPortCtrl->portNo)); -+ coal = ((regVal & ETH_RX_INTR_COAL_ALL_MASK) >> ETH_RX_INTR_COAL_OFFSET); -+ -+#if (MV_ETH_VERSION >= 2) -+ if(regVal & ETH_RX_INTR_COAL_MSB_MASK) -+ { -+ /* Add MSB */ -+ coal |= (ETH_RX_INTR_COAL_ALL_MASK + 1); -+ } -+#endif /* MV_ETH_VERSION >= 2 */ -+ -+ usec = (coal * 64) / (mvBoardTclkGet() / 1000000); -+ if(pRxCoal != NULL) -+ *pRxCoal = usec; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthMaxRxSizeSet - -+* -+* DESCRIPTION: -+* Change maximum receive size of the port. This configuration will take place -+* after next call of ethPortSetDefaults() function. -+* -+* INPUT: -+* -+* RETURN: -+*******************************************************************************/ -+MV_STATUS mvEthMaxRxSizeSet(void* pPortHndl, int maxRxSize) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ MV_U32 portSerialCtrlReg; -+ -+ if((maxRxSize < 1518) || (maxRxSize & ~ETH_RX_BUFFER_MASK)) -+ return MV_BAD_PARAM; -+ -+ pPortCtrl->portConfig.maxRxPktSize = maxRxSize; -+ -+ portSerialCtrlReg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(pPortCtrl->portNo)); -+ portSerialCtrlReg &= ~ETH_MAX_RX_PACKET_SIZE_MASK; -+ portSerialCtrlReg |= mvEthMruGet(pPortCtrl->portConfig.maxRxPktSize); -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(pPortCtrl->portNo), portSerialCtrlReg); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************/ -+/* MAC Filtering functions */ -+/******************************************************************************/ -+ -+/******************************************************************************* -+* mvEthRxFilterModeSet - Configure Fitering mode of Ethernet port -+* -+* DESCRIPTION: -+* This routine used to free buffers attached to the Rx ring and should -+* be called only when Giga Ethernet port is Down -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet Port handler. -+* MV_BOOL isPromisc - Promiscous mode -+* MV_TRUE - accept all Broadcast, Multicast -+* and Unicast packets -+* MV_FALSE - accept all Broadcast, -+* specially added Multicast and -+* single Unicast packets -+* -+* RETURN: MV_STATUS MV_OK - Success, Other - Failure -+* -+*******************************************************************************/ -+MV_STATUS mvEthRxFilterModeSet(void* pEthPortHndl, MV_BOOL isPromisc) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ int queue; -+ MV_U32 portCfgReg; -+ -+ portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo)); -+ /* Set / Clear UPM bit in port configuration register */ -+ if(isPromisc) -+ { -+ /* Accept all multicast packets to RX default queue */ -+ queue = pPortCtrl->portConfig.rxDefQ; -+ portCfgReg |= ETH_UNICAST_PROMISCUOUS_MODE_MASK; -+ memset(pPortCtrl->mcastCount, 1, sizeof(pPortCtrl->mcastCount)); -+ MV_REG_WRITE(ETH_MAC_ADDR_LOW_REG(pPortCtrl->portNo),0xFFFF); -+ MV_REG_WRITE(ETH_MAC_ADDR_HIGH_REG(pPortCtrl->portNo),0xFFFFFFFF); -+ } -+ else -+ { -+ /* Reject all Multicast addresses */ -+ queue = -1; -+ portCfgReg &= ~ETH_UNICAST_PROMISCUOUS_MODE_MASK; -+ /* Clear all mcastCount */ -+ memset(pPortCtrl->mcastCount, 0, sizeof(pPortCtrl->mcastCount)); -+ } -+ MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg); -+ -+ /* Set Special Multicast and Other Multicast tables */ -+ mvEthSetSpecialMcastTable(pPortCtrl->portNo, queue); -+ mvEthSetOtherMcastTable(pPortCtrl->portNo, queue); -+ ethSetUcastTable(pPortCtrl->portNo, queue); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthMacAddrSet - This function Set the port Unicast address. -+* -+* DESCRIPTION: -+* This function Set the port Ethernet MAC address. This address -+* will be used to send Pause frames if enabled. Packets with this -+* address will be accepted and dispatched to default RX queue -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet port handler. -+* char* pAddr - Address to be set -+* -+* RETURN: MV_STATUS -+* MV_OK - Success, Other - Faulure -+* -+*******************************************************************************/ -+MV_STATUS mvEthMacAddrSet(void* pPortHndl, unsigned char *pAddr, int queue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ unsigned int macH; -+ unsigned int macL; -+ -+ if(queue >= MV_ETH_RX_Q_NUM) -+ { -+ mvOsPrintf("ethDrv: RX queue #%d is out of range\n", queue); -+ return MV_BAD_PARAM; -+ } -+ -+ if(queue != -1) -+ { -+ macL = (pAddr[4] << 8) | (pAddr[5]); -+ macH = (pAddr[0] << 24)| (pAddr[1] << 16) | -+ (pAddr[2] << 8) | (pAddr[3] << 0); -+ -+ MV_REG_WRITE(ETH_MAC_ADDR_LOW_REG(pPortCtrl->portNo), macL); -+ MV_REG_WRITE(ETH_MAC_ADDR_HIGH_REG(pPortCtrl->portNo), macH); -+ } -+ -+ /* Accept frames of this address */ -+ ethSetUcastAddr(pPortCtrl->portNo, pAddr[5], queue); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthMacAddrGet - This function returns the port Unicast address. -+* -+* DESCRIPTION: -+* This function returns the port Ethernet MAC address. -+* -+* INPUT: -+* int portNo - Ethernet port number. -+* char* pAddr - Pointer where address will be written to -+* -+* RETURN: MV_STATUS -+* MV_OK - Success, Other - Faulure -+* -+*******************************************************************************/ -+MV_STATUS mvEthMacAddrGet(int portNo, unsigned char *pAddr) -+{ -+ unsigned int macH; -+ unsigned int macL; -+ -+ if(pAddr == NULL) -+ { -+ mvOsPrintf("mvEthMacAddrGet: NULL pointer.\n"); -+ return MV_BAD_PARAM; -+ } -+ -+ macH = MV_REG_READ(ETH_MAC_ADDR_HIGH_REG(portNo)); -+ macL = MV_REG_READ(ETH_MAC_ADDR_LOW_REG(portNo)); -+ pAddr[0] = (macH >> 24) & 0xff; -+ pAddr[1] = (macH >> 16) & 0xff; -+ pAddr[2] = (macH >> 8) & 0xff; -+ pAddr[3] = macH & 0xff; -+ pAddr[4] = (macL >> 8) & 0xff; -+ pAddr[5] = macL & 0xff; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthMcastCrc8Get - Calculate CRC8 of MAC address. -+* -+* DESCRIPTION: -+* -+* INPUT: -+* MV_U8* pAddr - Address to calculate CRC-8 -+* -+* RETURN: MV_U8 - CRC-8 of this MAC address -+* -+*******************************************************************************/ -+MV_U8 mvEthMcastCrc8Get(MV_U8* pAddr) -+{ -+ unsigned int macH; -+ unsigned int macL; -+ int macArray[48]; -+ int crc[8]; -+ int i; -+ unsigned char crcResult = 0; -+ -+ /* Calculate CRC-8 out of the given address */ -+ macH = (pAddr[0] << 8) | (pAddr[1]); -+ macL = (pAddr[2] << 24)| (pAddr[3] << 16) | -+ (pAddr[4] << 8) | (pAddr[5] << 0); -+ -+ for(i=0; i<32; i++) -+ macArray[i] = (macL >> i) & 0x1; -+ -+ for(i=32; i<48; i++) -+ macArray[i] = (macH >> (i - 32)) & 0x1; -+ -+ crc[0] = macArray[45] ^ macArray[43] ^ macArray[40] ^ macArray[39] ^ -+ macArray[35] ^ macArray[34] ^ macArray[31] ^ macArray[30] ^ -+ macArray[28] ^ macArray[23] ^ macArray[21] ^ macArray[19] ^ -+ macArray[18] ^ macArray[16] ^ macArray[14] ^ macArray[12] ^ -+ macArray[8] ^ macArray[7] ^ macArray[6] ^ macArray[0]; -+ -+ crc[1] = macArray[46] ^ macArray[45] ^ macArray[44] ^ macArray[43] ^ -+ macArray[41] ^ macArray[39] ^ macArray[36] ^ macArray[34] ^ -+ macArray[32] ^ macArray[30] ^ macArray[29] ^ macArray[28] ^ -+ macArray[24] ^ macArray[23] ^ macArray[22] ^ macArray[21] ^ -+ macArray[20] ^ macArray[18] ^ macArray[17] ^ macArray[16] ^ -+ macArray[15] ^ macArray[14] ^ macArray[13] ^ macArray[12] ^ -+ macArray[9] ^ macArray[6] ^ macArray[1] ^ macArray[0]; -+ -+ crc[2] = macArray[47] ^ macArray[46] ^ macArray[44] ^ macArray[43] ^ -+ macArray[42] ^ macArray[39] ^ macArray[37] ^ macArray[34] ^ -+ macArray[33] ^ macArray[29] ^ macArray[28] ^ macArray[25] ^ -+ macArray[24] ^ macArray[22] ^ macArray[17] ^ macArray[15] ^ -+ macArray[13] ^ macArray[12] ^ macArray[10] ^ macArray[8] ^ -+ macArray[6] ^ macArray[2] ^ macArray[1] ^ macArray[0]; -+ -+ crc[3] = macArray[47] ^ macArray[45] ^ macArray[44] ^ macArray[43] ^ -+ macArray[40] ^ macArray[38] ^ macArray[35] ^ macArray[34] ^ -+ macArray[30] ^ macArray[29] ^ macArray[26] ^ macArray[25] ^ -+ macArray[23] ^ macArray[18] ^ macArray[16] ^ macArray[14] ^ -+ macArray[13] ^ macArray[11] ^ macArray[9] ^ macArray[7] ^ -+ macArray[3] ^ macArray[2] ^ macArray[1]; -+ -+ crc[4] = macArray[46] ^ macArray[45] ^ macArray[44] ^ macArray[41] ^ -+ macArray[39] ^ macArray[36] ^ macArray[35] ^ macArray[31] ^ -+ macArray[30] ^ macArray[27] ^ macArray[26] ^ macArray[24] ^ -+ macArray[19] ^ macArray[17] ^ macArray[15] ^ macArray[14] ^ -+ macArray[12] ^ macArray[10] ^ macArray[8] ^ macArray[4] ^ -+ macArray[3] ^ macArray[2]; -+ -+ crc[5] = macArray[47] ^ macArray[46] ^ macArray[45] ^ macArray[42] ^ -+ macArray[40] ^ macArray[37] ^ macArray[36] ^ macArray[32] ^ -+ macArray[31] ^ macArray[28] ^ macArray[27] ^ macArray[25] ^ -+ macArray[20] ^ macArray[18] ^ macArray[16] ^ macArray[15] ^ -+ macArray[13] ^ macArray[11] ^ macArray[9] ^ macArray[5] ^ -+ macArray[4] ^ macArray[3]; -+ -+ crc[6] = macArray[47] ^ macArray[46] ^ macArray[43] ^ macArray[41] ^ -+ macArray[38] ^ macArray[37] ^ macArray[33] ^ macArray[32] ^ -+ macArray[29] ^ macArray[28] ^ macArray[26] ^ macArray[21] ^ -+ macArray[19] ^ macArray[17] ^ macArray[16] ^ macArray[14] ^ -+ macArray[12] ^ macArray[10] ^ macArray[6] ^ macArray[5] ^ -+ macArray[4]; -+ -+ crc[7] = macArray[47] ^ macArray[44] ^ macArray[42] ^ macArray[39] ^ -+ macArray[38] ^ macArray[34] ^ macArray[33] ^ macArray[30] ^ -+ macArray[29] ^ macArray[27] ^ macArray[22] ^ macArray[20] ^ -+ macArray[18] ^ macArray[17] ^ macArray[15] ^ macArray[13] ^ -+ macArray[11] ^ macArray[7] ^ macArray[6] ^ macArray[5]; -+ -+ for(i=0; i<8; i++) -+ crcResult = crcResult | (crc[i] << i); -+ -+ return crcResult; -+} -+/******************************************************************************* -+* mvEthMcastAddrSet - Multicast address settings. -+* -+* DESCRIPTION: -+* This API controls the MV device MAC multicast support. -+* The MV device supports multicast using two tables: -+* 1) Special Multicast Table for MAC addresses of the form -+* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0xFF). -+* The MAC DA[7:0] bits are used as a pointer to the Special Multicast -+* Table entries in the DA-Filter table. -+* In this case, the function calls ethPortSmcAddr() routine to set the -+* Special Multicast Table. -+* 2) Other Multicast Table for multicast of another type. A CRC-8bit -+* is used as an index to the Other Multicast Table entries in the -+* DA-Filter table. -+* In this case, the function calculates the CRC-8bit value and calls -+* ethPortOmcAddr() routine to set the Other Multicast Table. -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet port handler. -+* MV_U8* pAddr - Address to be set -+* int queue - RX queue to capture all packets with this -+* Multicast MAC address. -+* -1 means delete this Multicast address. -+* -+* RETURN: MV_STATUS -+* MV_TRUE - Success, Other - Failure -+* -+*******************************************************************************/ -+MV_STATUS mvEthMcastAddrSet(void* pPortHndl, MV_U8 *pAddr, int queue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ unsigned char crcResult = 0; -+ -+ if(queue >= MV_ETH_RX_Q_NUM) -+ { -+ mvOsPrintf("ethPort %d: RX queue #%d is out of range\n", -+ pPortCtrl->portNo, queue); -+ return MV_BAD_PARAM; -+ } -+ -+ if((pAddr[0] == 0x01) && -+ (pAddr[1] == 0x00) && -+ (pAddr[2] == 0x5E) && -+ (pAddr[3] == 0x00) && -+ (pAddr[4] == 0x00)) -+ { -+ ethSetSpecialMcastAddr(pPortCtrl->portNo, pAddr[5], queue); -+ } -+ else -+ { -+ crcResult = mvEthMcastCrc8Get(pAddr); -+ -+ /* Check Add counter for this CRC value */ -+ if(queue == -1) -+ { -+ if(pPortCtrl->mcastCount[crcResult] == 0) -+ { -+ mvOsPrintf("ethPort #%d: No valid Mcast for crc8=0x%02x\n", -+ pPortCtrl->portNo, (unsigned)crcResult); -+ return MV_NO_SUCH; -+ } -+ -+ pPortCtrl->mcastCount[crcResult]--; -+ if(pPortCtrl->mcastCount[crcResult] != 0) -+ { -+ mvOsPrintf("ethPort #%d: After delete there are %d valid Mcast for crc8=0x%02x\n", -+ pPortCtrl->portNo, pPortCtrl->mcastCount[crcResult], -+ (unsigned)crcResult); -+ return MV_NO_CHANGE; -+ } -+ } -+ else -+ { -+ pPortCtrl->mcastCount[crcResult]++; -+ if(pPortCtrl->mcastCount[crcResult] > 1) -+ { -+ mvOsPrintf("ethPort #%d: Valid Mcast for crc8=0x%02x already exists\n", -+ pPortCtrl->portNo, (unsigned)crcResult); -+ return MV_NO_CHANGE; -+ } -+ } -+ ethSetOtherMcastAddr(pPortCtrl->portNo, crcResult, queue); -+ } -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* ethSetUcastTable - Unicast address settings. -+* -+* DESCRIPTION: -+* Set all entries in the Unicast MAC Table queue==-1 means reject all -+* INPUT: -+* -+* RETURN: -+* -+*******************************************************************************/ -+static void ethSetUcastTable(int portNo, int queue) -+{ -+ int offset; -+ MV_U32 regValue; -+ -+ if(queue == -1) -+ { -+ regValue = 0; -+ } -+ else -+ { -+ regValue = (((0x01 | (queue<<1)) << 0) | -+ ((0x01 | (queue<<1)) << 8) | -+ ((0x01 | (queue<<1)) << 16) | -+ ((0x01 | (queue<<1)) << 24)); -+ } -+ -+ for (offset=0; offset<=0xC; offset+=4) -+ MV_REG_WRITE((ETH_DA_FILTER_UCAST_BASE(portNo) + offset), regValue); -+} -+ -+/******************************************************************************* -+* mvEthSetSpecialMcastTable - Special Multicast address settings. -+* -+* DESCRIPTION: -+* Set all entries to the Special Multicast MAC Table. queue==-1 means reject all -+* INPUT: -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_VOID mvEthSetSpecialMcastTable(int portNo, int queue) -+{ -+ int offset; -+ MV_U32 regValue; -+ -+ if(queue == -1) -+ { -+ regValue = 0; -+ } -+ else -+ { -+ regValue = (((0x01 | (queue<<1)) << 0) | -+ ((0x01 | (queue<<1)) << 8) | -+ ((0x01 | (queue<<1)) << 16) | -+ ((0x01 | (queue<<1)) << 24)); -+ } -+ -+ for (offset=0; offset<=0xFC; offset+=4) -+ { -+ MV_REG_WRITE((ETH_DA_FILTER_SPEC_MCAST_BASE(portNo) + -+ offset), regValue); -+ } -+} -+ -+/******************************************************************************* -+* mvEthSetOtherMcastTable - Other Multicast address settings. -+* -+* DESCRIPTION: -+* Set all entries to the Other Multicast MAC Table. queue==-1 means reject all -+* INPUT: -+* -+* RETURN: -+* -+*******************************************************************************/ -+MV_VOID mvEthSetOtherMcastTable(int portNo, int queue) -+{ -+ int offset; -+ MV_U32 regValue; -+ -+ if(queue == -1) -+ { -+ regValue = 0; -+ } -+ else -+ { -+ regValue = (((0x01 | (queue<<1)) << 0) | -+ ((0x01 | (queue<<1)) << 8) | -+ ((0x01 | (queue<<1)) << 16) | -+ ((0x01 | (queue<<1)) << 24)); -+ } -+ -+ for (offset=0; offset<=0xFC; offset+=4) -+ { -+ MV_REG_WRITE((ETH_DA_FILTER_OTH_MCAST_BASE(portNo) + -+ offset), regValue); -+ } -+} -+ -+/******************************************************************************* -+* ethSetUcastAddr - This function Set the port unicast address table -+* -+* DESCRIPTION: -+* This function locates the proper entry in the Unicast table for the -+* specified MAC nibble and sets its properties according to function -+* parameters. -+* -+* INPUT: -+* int ethPortNum - Port number. -+* MV_U8 lastNibble - Unicast MAC Address last nibble. -+* int queue - Rx queue number for this MAC address. -+* value "-1" means remove address -+* -+* OUTPUT: -+* This function add/removes MAC addresses from the port unicast address -+* table. -+* -+* RETURN: -+* MV_TRUE is output succeeded. -+* MV_FALSE if option parameter is invalid. -+* -+*******************************************************************************/ -+static MV_BOOL ethSetUcastAddr(int portNo, MV_U8 lastNibble, int queue) -+{ -+ unsigned int unicastReg; -+ unsigned int tblOffset; -+ unsigned int regOffset; -+ -+ /* Locate the Unicast table entry */ -+ lastNibble = (0xf & lastNibble); -+ tblOffset = (lastNibble / 4) * 4; /* Register offset from unicast table base*/ -+ regOffset = lastNibble % 4; /* Entry offset within the above register */ -+ -+ -+ unicastReg = MV_REG_READ( (ETH_DA_FILTER_UCAST_BASE(portNo) + -+ tblOffset)); -+ -+ -+ if(queue == -1) -+ { -+ /* Clear accepts frame bit at specified unicast DA table entry */ -+ unicastReg &= ~(0xFF << (8*regOffset)); -+ } -+ else -+ { -+ unicastReg &= ~(0xFF << (8*regOffset)); -+ unicastReg |= ((0x01 | (queue<<1)) << (8*regOffset)); -+ } -+ MV_REG_WRITE( (ETH_DA_FILTER_UCAST_BASE(portNo) + tblOffset), -+ unicastReg); -+ -+ return MV_TRUE; -+} -+ -+/******************************************************************************* -+* ethSetSpecialMcastAddr - Special Multicast address settings. -+* -+* DESCRIPTION: -+* This routine controls the MV device special MAC multicast support. -+* The Special Multicast Table for MAC addresses supports MAC of the form -+* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0xFF). -+* The MAC DA[7:0] bits are used as a pointer to the Special Multicast -+* Table entries in the DA-Filter table. -+* This function set the Special Multicast Table appropriate entry -+* according to the argument given. -+* -+* INPUT: -+* int ethPortNum Port number. -+* unsigned char mcByte Multicast addr last byte (MAC DA[7:0] bits). -+* int queue Rx queue number for this MAC address. -+* int option 0 = Add, 1 = remove address. -+* -+* OUTPUT: -+* See description. -+* -+* RETURN: -+* MV_TRUE is output succeeded. -+* MV_FALSE if option parameter is invalid. -+* -+*******************************************************************************/ -+static MV_BOOL ethSetSpecialMcastAddr(int ethPortNum, MV_U8 lastByte, int queue) -+{ -+ unsigned int smcTableReg; -+ unsigned int tblOffset; -+ unsigned int regOffset; -+ -+ /* Locate the SMC table entry */ -+ tblOffset = (lastByte / 4); /* Register offset from SMC table base */ -+ regOffset = lastByte % 4; /* Entry offset within the above register */ -+ -+ smcTableReg = MV_REG_READ((ETH_DA_FILTER_SPEC_MCAST_BASE(ethPortNum) + tblOffset*4)); -+ -+ if(queue == -1) -+ { -+ /* Clear accepts frame bit at specified Special DA table entry */ -+ smcTableReg &= ~(0xFF << (8 * regOffset)); -+ } -+ else -+ { -+ smcTableReg &= ~(0xFF << (8 * regOffset)); -+ smcTableReg |= ((0x01 | (queue<<1)) << (8 * regOffset)); -+ } -+ MV_REG_WRITE((ETH_DA_FILTER_SPEC_MCAST_BASE(ethPortNum) + -+ tblOffset*4), smcTableReg); -+ -+ return MV_TRUE; -+} -+ -+/******************************************************************************* -+* ethSetOtherMcastAddr - Multicast address settings. -+* -+* DESCRIPTION: -+* This routine controls the MV device Other MAC multicast support. -+* The Other Multicast Table is used for multicast of another type. -+* A CRC-8bit is used as an index to the Other Multicast Table entries -+* in the DA-Filter table. -+* The function gets the CRC-8bit value from the calling routine and -+* set the Other Multicast Table appropriate entry according to the -+* CRC-8 argument given. -+* -+* INPUT: -+* int ethPortNum Port number. -+* MV_U8 crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1). -+* int queue Rx queue number for this MAC address. -+* -+* OUTPUT: -+* See description. -+* -+* RETURN: -+* MV_TRUE is output succeeded. -+* MV_FALSE if option parameter is invalid. -+* -+*******************************************************************************/ -+static MV_BOOL ethSetOtherMcastAddr(int ethPortNum, MV_U8 crc8, int queue) -+{ -+ unsigned int omcTableReg; -+ unsigned int tblOffset; -+ unsigned int regOffset; -+ -+ /* Locate the OMC table entry */ -+ tblOffset = (crc8 / 4) * 4; /* Register offset from OMC table base */ -+ regOffset = crc8 % 4; /* Entry offset within the above register */ -+ -+ omcTableReg = MV_REG_READ( -+ (ETH_DA_FILTER_OTH_MCAST_BASE(ethPortNum) + tblOffset)); -+ -+ if(queue == -1) -+ { -+ /* Clear accepts frame bit at specified Other DA table entry */ -+ omcTableReg &= ~(0xFF << (8 * regOffset)); -+ } -+ else -+ { -+ omcTableReg &= ~(0xFF << (8 * regOffset)); -+ omcTableReg |= ((0x01 | (queue<<1)) << (8 * regOffset)); -+ } -+ -+ MV_REG_WRITE((ETH_DA_FILTER_OTH_MCAST_BASE(ethPortNum) + tblOffset), -+ omcTableReg); -+ -+ return MV_TRUE; -+} -+ -+ -+/******************************************************************************/ -+/* MIB Counters functions */ -+/******************************************************************************/ -+ -+ -+/******************************************************************************* -+* mvEthMibCounterRead - Read a MIB counter -+* -+* DESCRIPTION: -+* This function reads a MIB counter of a specific ethernet port. -+* NOTE - Read from ETH_MIB_GOOD_OCTETS_RECEIVED_LOW or -+* ETH_MIB_GOOD_OCTETS_SENT_LOW counters will return 64 bits value, -+* so pHigh32 pointer should not be NULL in this case. -+* -+* INPUT: -+* int ethPortNum - Ethernet Port number. -+* unsigned int mibOffset - MIB counter offset. -+* -+* OUTPUT: -+* MV_U32* pHigh32 - pointer to place where 32 most significant bits -+* of the counter will be stored. -+* -+* RETURN: -+* 32 low sgnificant bits of MIB counter value. -+* -+*******************************************************************************/ -+MV_U32 mvEthMibCounterRead(void* pPortHandle, unsigned int mibOffset, -+ MV_U32* pHigh32) -+{ -+ int portNo; -+ MV_U32 valLow32, valHigh32; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ -+ portNo = pPortCtrl->portNo; -+ -+ valLow32 = MV_REG_READ(ETH_MIB_COUNTERS_BASE(portNo) + mibOffset); -+ -+ /* Implement FEr ETH. Erroneous Value when Reading the Upper 32-bits */ -+ /* of a 64-bit MIB Counter. */ -+ if( (mibOffset == ETH_MIB_GOOD_OCTETS_RECEIVED_LOW) || -+ (mibOffset == ETH_MIB_GOOD_OCTETS_SENT_LOW) ) -+ { -+ valHigh32 = MV_REG_READ(ETH_MIB_COUNTERS_BASE(portNo) + mibOffset + 4); -+ if(pHigh32 != NULL) -+ *pHigh32 = valHigh32; -+ } -+ return valLow32; -+} -+ -+/******************************************************************************* -+* mvEthMibCountersClear - Clear all MIB counters -+* -+* DESCRIPTION: -+* This function clears all MIB counters -+* -+* INPUT: -+* int ethPortNum - Ethernet Port number. -+* -+* -+* RETURN: void -+* -+*******************************************************************************/ -+void mvEthMibCountersClear(void* pPortHandle) -+{ -+ int i, portNo; -+ unsigned int dummy; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ -+ portNo = pPortCtrl->portNo; -+ -+ /* Perform dummy reads from MIB counters */ -+ for(i=ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i<ETH_MIB_LATE_COLLISION; i+=4) -+ dummy = MV_REG_READ((ETH_MIB_COUNTERS_BASE(portNo) + i)); -+} -+ -+ -+/******************************************************************************/ -+/* RX Dispatching configuration routines */ -+/******************************************************************************/ -+ -+int mvEthTosToRxqGet(void* pPortHandle, int tos) -+{ -+ MV_U32 regValue; -+ int regIdx, regOffs, rxq; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ -+ if(tos > 0xFF) -+ { -+ mvOsPrintf("eth_%d: tos=0x%x is out of range\n", pPortCtrl->portNo, tos); -+ return -1; -+ } -+ regIdx = mvOsDivide(tos>>2, 10); -+ regOffs = mvOsReminder(tos>>2, 10); -+ -+ regValue = MV_REG_READ(ETH_DIFF_SERV_PRIO_REG(pPortCtrl->portNo, regIdx) ); -+ rxq = (regValue >> (regOffs*3)); -+ rxq &= 0x7; -+ -+ return rxq; -+} -+ -+/******************************************************************************* -+* mvEthTosToRxqSet - Map packets with special TOS value to special RX queue -+* -+* DESCRIPTION: -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* int tos - TOS value in the IP header of the packet -+* int rxq - RX Queue for packets with the configured TOS value -+* Negative value (-1) means no special processing for these packets, -+* so they will be processed as regular packets. -+* -+* RETURN: MV_STATUS -+*******************************************************************************/ -+MV_STATUS mvEthTosToRxqSet(void* pPortHandle, int tos, int rxq) -+{ -+ MV_U32 regValue; -+ int regIdx, regOffs; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ -+ if( (rxq < 0) || (rxq >= MV_ETH_RX_Q_NUM) ) -+ { -+ mvOsPrintf("eth_%d: RX queue #%d is out of range\n", pPortCtrl->portNo, rxq); -+ return MV_BAD_PARAM; -+ } -+ if(tos > 0xFF) -+ { -+ mvOsPrintf("eth_%d: tos=0x%x is out of range\n", pPortCtrl->portNo, tos); -+ return MV_BAD_PARAM; -+ } -+ regIdx = mvOsDivide(tos>>2, 10); -+ regOffs = mvOsReminder(tos>>2, 10); -+ -+ regValue = MV_REG_READ(ETH_DIFF_SERV_PRIO_REG(pPortCtrl->portNo, regIdx) ); -+ regValue &= ~(0x7 << (regOffs*3)); -+ regValue |= (rxq << (regOffs*3)); -+ -+ MV_REG_WRITE(ETH_DIFF_SERV_PRIO_REG(pPortCtrl->portNo, regIdx), regValue); -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthVlanPrioRxQueue - Configure RX queue to capture VLAN tagged packets with -+* special priority bits [0-2] -+* -+* DESCRIPTION: -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* int bpduQueue - Special queue to capture VLAN tagged packets with special -+* priority. -+* Negative value (-1) means no special processing for these packets, -+* so they will be processed as regular packets. -+* -+* RETURN: MV_STATUS -+* MV_OK - Success -+* MV_FAIL - Failed. -+* -+*******************************************************************************/ -+MV_STATUS mvEthVlanPrioRxQueue(void* pPortHandle, int vlanPrio, int vlanPrioQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ MV_U32 vlanPrioReg; -+ -+ if(vlanPrioQueue >= MV_ETH_RX_Q_NUM) -+ { -+ mvOsPrintf("ethDrv: RX queue #%d is out of range\n", vlanPrioQueue); -+ return MV_BAD_PARAM; -+ } -+ if(vlanPrio >= 8) -+ { -+ mvOsPrintf("ethDrv: vlanPrio=%d is out of range\n", vlanPrio); -+ return MV_BAD_PARAM; -+ } -+ -+ vlanPrioReg = MV_REG_READ(ETH_VLAN_TAG_TO_PRIO_REG(pPortCtrl->portNo)); -+ vlanPrioReg &= ~(0x7 << (vlanPrio*3)); -+ vlanPrioReg |= (vlanPrioQueue << (vlanPrio*3)); -+ MV_REG_WRITE(ETH_VLAN_TAG_TO_PRIO_REG(pPortCtrl->portNo), vlanPrioReg); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvEthBpduRxQueue - Configure RX queue to capture BPDU packets. -+* -+* DESCRIPTION: -+* This function defines processing of BPDU packets. -+* BPDU packets can be accepted and captured to one of RX queues -+* or can be processing as regular Multicast packets. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* int bpduQueue - Special queue to capture BPDU packets (DA is equal to -+* 01-80-C2-00-00-00 through 01-80-C2-00-00-FF, -+* except for the Flow-Control Pause packets). -+* Negative value (-1) means no special processing for BPDU, -+* packets so they will be processed as regular Multicast packets. -+* -+* RETURN: MV_STATUS -+* MV_OK - Success -+* MV_FAIL - Failed. -+* -+*******************************************************************************/ -+MV_STATUS mvEthBpduRxQueue(void* pPortHandle, int bpduQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ MV_U32 portCfgReg; -+ MV_U32 portCfgExtReg; -+ -+ if(bpduQueue >= MV_ETH_RX_Q_NUM) -+ { -+ mvOsPrintf("ethDrv: RX queue #%d is out of range\n", bpduQueue); -+ return MV_BAD_PARAM; -+ } -+ -+ portCfgExtReg = MV_REG_READ(ETH_PORT_CONFIG_EXTEND_REG(pPortCtrl->portNo)); -+ -+ portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo)); -+ if(bpduQueue >= 0) -+ { -+ pPortCtrl->portConfig.rxBpduQ = bpduQueue; -+ -+ portCfgReg &= ~ETH_DEF_RX_BPDU_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_BPDU_QUEUE_MASK(pPortCtrl->portConfig.rxBpduQ); -+ -+ MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg); -+ -+ portCfgExtReg |= ETH_CAPTURE_SPAN_BPDU_ENABLE_MASK; -+ } -+ else -+ { -+ pPortCtrl->portConfig.rxBpduQ = -1; -+ /* no special processing for BPDU packets */ -+ portCfgExtReg &= (~ETH_CAPTURE_SPAN_BPDU_ENABLE_MASK); -+ } -+ -+ MV_REG_WRITE(ETH_PORT_CONFIG_EXTEND_REG(pPortCtrl->portNo), portCfgExtReg); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvEthArpRxQueue - Configure RX queue to capture ARP packets. -+* -+* DESCRIPTION: -+* This function defines processing of ARP (type=0x0806) packets. -+* ARP packets can be accepted and captured to one of RX queues -+* or can be processed as other Broadcast packets. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* int arpQueue - Special queue to capture ARP packets (type=0x806). -+* Negative value (-1) means discard ARP packets -+* -+* RETURN: MV_STATUS -+* MV_OK - Success -+* MV_FAIL - Failed. -+* -+*******************************************************************************/ -+MV_STATUS mvEthArpRxQueue(void* pPortHandle, int arpQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ MV_U32 portCfgReg; -+ -+ if(arpQueue >= MV_ETH_RX_Q_NUM) -+ { -+ mvOsPrintf("ethDrv: RX queue #%d is out of range\n", arpQueue); -+ return MV_BAD_PARAM; -+ } -+ -+ portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo)); -+ -+ if(arpQueue >= 0) -+ { -+ pPortCtrl->portConfig.rxArpQ = arpQueue; -+ portCfgReg &= ~ETH_DEF_RX_ARP_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_ARP_QUEUE_MASK(pPortCtrl->portConfig.rxArpQ); -+ -+ portCfgReg &= (~ETH_REJECT_ARP_BCAST_MASK); -+ } -+ else -+ { -+ pPortCtrl->portConfig.rxArpQ = -1; -+ portCfgReg |= ETH_REJECT_ARP_BCAST_MASK; -+ } -+ -+ MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvEthTcpRxQueue - Configure RX queue to capture TCP packets. -+* -+* DESCRIPTION: -+* This function defines processing of TCP packets. -+* TCP packets can be accepted and captured to one of RX queues -+* or can be processed as regular Unicast packets. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* int tcpQueue - Special queue to capture TCP packets. Value "-1" -+* means no special processing for TCP packets, -+* so they will be processed as regular -+* -+* RETURN: MV_STATUS -+* MV_OK - Success -+* MV_FAIL - Failed. -+* -+*******************************************************************************/ -+MV_STATUS mvEthTcpRxQueue(void* pPortHandle, int tcpQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ MV_U32 portCfgReg; -+ -+ if(tcpQueue >= MV_ETH_RX_Q_NUM) -+ { -+ mvOsPrintf("ethDrv: RX queue #%d is out of range\n", tcpQueue); -+ return MV_BAD_PARAM; -+ } -+ portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo)); -+ -+ if(tcpQueue >= 0) -+ { -+ pPortCtrl->portConfig.rxTcpQ = tcpQueue; -+ portCfgReg &= ~ETH_DEF_RX_TCP_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_TCP_QUEUE_MASK(pPortCtrl->portConfig.rxTcpQ); -+ -+ portCfgReg |= ETH_CAPTURE_TCP_FRAMES_ENABLE_MASK; -+ } -+ else -+ { -+ pPortCtrl->portConfig.rxTcpQ = -1; -+ portCfgReg &= (~ETH_CAPTURE_TCP_FRAMES_ENABLE_MASK); -+ } -+ -+ MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvEthUdpRxQueue - Configure RX queue to capture UDP packets. -+* -+* DESCRIPTION: -+* This function defines processing of UDP packets. -+* TCP packets can be accepted and captured to one of RX queues -+* or can be processed as regular Unicast packets. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* int udpQueue - Special queue to capture UDP packets. Value "-1" -+* means no special processing for UDP packets, -+* so they will be processed as regular -+* -+* RETURN: MV_STATUS -+* MV_OK - Success -+* MV_FAIL - Failed. -+* -+*******************************************************************************/ -+MV_STATUS mvEthUdpRxQueue(void* pPortHandle, int udpQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ MV_U32 portCfgReg; -+ -+ if(udpQueue >= MV_ETH_RX_Q_NUM) -+ { -+ mvOsPrintf("ethDrv: RX queue #%d is out of range\n", udpQueue); -+ return MV_BAD_PARAM; -+ } -+ -+ portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo)); -+ -+ if(udpQueue >= 0) -+ { -+ pPortCtrl->portConfig.rxUdpQ = udpQueue; -+ portCfgReg &= ~ETH_DEF_RX_UDP_QUEUE_ALL_MASK; -+ portCfgReg |= ETH_DEF_RX_UDP_QUEUE_MASK(pPortCtrl->portConfig.rxUdpQ); -+ -+ portCfgReg |= ETH_CAPTURE_UDP_FRAMES_ENABLE_MASK; -+ } -+ else -+ { -+ pPortCtrl->portConfig.rxUdpQ = -1; -+ portCfgReg &= ~ETH_CAPTURE_UDP_FRAMES_ENABLE_MASK; -+ } -+ -+ MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************/ -+/* Speed, Duplex, FlowControl routines */ -+/******************************************************************************/ -+ -+/******************************************************************************* -+* mvEthSpeedDuplexSet - Set Speed and Duplex of the port. -+* -+* DESCRIPTION: -+* This function configure the port to work with desirable Duplex and Speed. -+* Changing of these parameters are allowed only when port is disabled. -+* This function disable the port if was enabled, change duplex and speed -+* and, enable the port back if needed. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* ETH_PORT_SPEED speed - Speed of the port. -+* ETH_PORT_SPEED duplex - Duplex of the port. -+* -+* RETURN: MV_STATUS -+* MV_OK - Success -+* MV_OUT_OF_RANGE - Failed. Port is out of valid range -+* MV_NOT_FOUND - Failed. Port is not initialized. -+* MV_BAD_PARAM - Input parameters (speed/duplex) in conflict. -+* MV_BAD_VALUE - Value of one of input parameters (speed, duplex) -+* is not valid -+* -+*******************************************************************************/ -+MV_STATUS mvEthSpeedDuplexSet(void* pPortHandle, MV_ETH_PORT_SPEED speed, -+ MV_ETH_PORT_DUPLEX duplex) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ int port = pPortCtrl->portNo; -+ MV_U32 portSerialCtrlReg; -+ -+ if( (port < 0) || (port >= (int)mvCtrlEthMaxPortGet()) ) -+ return MV_OUT_OF_RANGE; -+ -+ pPortCtrl = ethPortCtrl[port]; -+ if(pPortCtrl == NULL) -+ return MV_NOT_FOUND; -+ -+ /* Check validity */ -+ if( (speed == MV_ETH_SPEED_1000) && (duplex == MV_ETH_DUPLEX_HALF) ) -+ return MV_BAD_PARAM; -+ -+ portSerialCtrlReg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(port)); -+ /* Set Speed */ -+ switch(speed) -+ { -+ case MV_ETH_SPEED_AN: -+ portSerialCtrlReg &= ~ETH_DISABLE_SPEED_AUTO_NEG_MASK; -+ break; -+ -+ case MV_ETH_SPEED_10: -+ portSerialCtrlReg |= ETH_DISABLE_SPEED_AUTO_NEG_MASK; -+ portSerialCtrlReg &= ~ETH_SET_GMII_SPEED_1000_MASK; -+ portSerialCtrlReg &= ~ETH_SET_MII_SPEED_100_MASK; -+ break; -+ -+ case MV_ETH_SPEED_100: -+ portSerialCtrlReg |= ETH_DISABLE_SPEED_AUTO_NEG_MASK; -+ portSerialCtrlReg &= ~ETH_SET_GMII_SPEED_1000_MASK; -+ portSerialCtrlReg |= ETH_SET_MII_SPEED_100_MASK; -+ break; -+ -+ case MV_ETH_SPEED_1000: -+ portSerialCtrlReg |= ETH_DISABLE_SPEED_AUTO_NEG_MASK; -+ portSerialCtrlReg |= ETH_SET_GMII_SPEED_1000_MASK; -+ break; -+ -+ default: -+ mvOsPrintf("ethDrv: Unexpected Speed value %d\n", speed); -+ return MV_BAD_VALUE; -+ } -+ /* Set duplex */ -+ switch(duplex) -+ { -+ case MV_ETH_DUPLEX_AN: -+ portSerialCtrlReg &= ~ETH_DISABLE_DUPLEX_AUTO_NEG_MASK; -+ break; -+ -+ case MV_ETH_DUPLEX_HALF: -+ portSerialCtrlReg |= ETH_DISABLE_DUPLEX_AUTO_NEG_MASK; -+ portSerialCtrlReg &= ~ETH_SET_FULL_DUPLEX_MASK; -+ break; -+ -+ case MV_ETH_DUPLEX_FULL: -+ portSerialCtrlReg |= ETH_DISABLE_DUPLEX_AUTO_NEG_MASK; -+ portSerialCtrlReg |= ETH_SET_FULL_DUPLEX_MASK; -+ break; -+ -+ default: -+ mvOsPrintf("ethDrv: Unexpected Duplex value %d\n", duplex); -+ return MV_BAD_VALUE; -+ } -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(port), portSerialCtrlReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthFlowCtrlSet - Set Flow Control of the port. -+* -+* DESCRIPTION: -+* This function configure the port to work with desirable Duplex and -+* Speed. Changing of these parameters are allowed only when port is -+* disabled. This function disable the port if was enabled, change -+* duplex and speed and, enable the port back if needed. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* MV_ETH_PORT_FC flowControl - Flow control of the port. -+* -+* RETURN: MV_STATUS -+* MV_OK - Success -+* MV_OUT_OF_RANGE - Failed. Port is out of valid range -+* MV_NOT_FOUND - Failed. Port is not initialized. -+* MV_BAD_VALUE - Value flowControl parameters is not valid -+* -+*******************************************************************************/ -+MV_STATUS mvEthFlowCtrlSet(void* pPortHandle, MV_ETH_PORT_FC flowControl) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ int port = pPortCtrl->portNo; -+ MV_U32 portSerialCtrlReg; -+ -+ if( (port < 0) || (port >= (int)mvCtrlEthMaxPortGet() ) ) -+ return MV_OUT_OF_RANGE; -+ -+ pPortCtrl = ethPortCtrl[port]; -+ if(pPortCtrl == NULL) -+ return MV_NOT_FOUND; -+ -+ portSerialCtrlReg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(port)); -+ switch(flowControl) -+ { -+ case MV_ETH_FC_AN_ADV_DIS: -+ portSerialCtrlReg &= ~ETH_DISABLE_FC_AUTO_NEG_MASK; -+ portSerialCtrlReg &= ~ETH_ADVERTISE_SYM_FC_MASK; -+ break; -+ -+ case MV_ETH_FC_AN_ADV_SYM: -+ portSerialCtrlReg &= ~ETH_DISABLE_FC_AUTO_NEG_MASK; -+ portSerialCtrlReg |= ETH_ADVERTISE_SYM_FC_MASK; -+ break; -+ -+ case MV_ETH_FC_DISABLE: -+ portSerialCtrlReg |= ETH_DISABLE_FC_AUTO_NEG_MASK; -+ portSerialCtrlReg &= ~ETH_SET_FLOW_CTRL_MASK; -+ break; -+ -+ case MV_ETH_FC_ENABLE: -+ portSerialCtrlReg |= ETH_DISABLE_FC_AUTO_NEG_MASK; -+ portSerialCtrlReg |= ETH_SET_FLOW_CTRL_MASK; -+ break; -+ -+ default: -+ mvOsPrintf("ethDrv: Unexpected FlowControl value %d\n", flowControl); -+ return MV_BAD_VALUE; -+ } -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(port), portSerialCtrlReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthHeaderModeSet - Set port header mode. -+* -+* DESCRIPTION: -+* This function configures the port to work in Marvell-Header mode. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* MV_ETH_HEADER_MODE headerMode - The header mode to set the port in. -+* -+* RETURN: MV_STATUS -+* MV_OK - Success -+* MV_NOT_SUPPORTED- Feature not supported. -+* MV_OUT_OF_RANGE - Failed. Port is out of valid range -+* MV_NOT_FOUND - Failed. Port is not initialized. -+* MV_BAD_VALUE - Value of headerMode or numRxQueue parameter is not valid. -+* -+*******************************************************************************/ -+MV_STATUS mvEthHeaderModeSet(void* pPortHandle, MV_ETH_HEADER_MODE headerMode) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ int port = pPortCtrl->portNo; -+ MV_U32 mvHeaderReg; -+ MV_U32 numRxQ = MV_ETH_RX_Q_NUM; -+ -+ if((port < 0) || (port >= mvCtrlEthMaxPortGet())) -+ return MV_OUT_OF_RANGE; -+ -+ pPortCtrl = ethPortCtrl[port]; -+ if(pPortCtrl == NULL) -+ return MV_NOT_FOUND; -+ -+ mvHeaderReg = MV_REG_READ(ETH_PORT_MARVELL_HEADER_REG(port)); -+ /* Disable header mode. */ -+ mvHeaderReg &= ~ETH_MVHDR_EN_MASK; -+ -+ if(headerMode != MV_ETH_DISABLE_HEADER_MODE) -+ { -+ /* Enable Header mode. */ -+ mvHeaderReg |= ETH_MVHDR_EN_MASK; -+ -+ /* Clear DA-Prefix & MHMask fields.*/ -+ mvHeaderReg &= ~(ETH_MVHDR_DAPREFIX_MASK | ETH_MVHDR_MHMASK_MASK); -+ -+ if(numRxQ > 1) -+ { -+ switch (headerMode) -+ { -+ case(MV_ETH_ENABLE_HEADER_MODE_PRI_2_1): -+ mvHeaderReg |= ETH_MVHDR_DAPREFIX_PRI_1_2; -+ break; -+ case(MV_ETH_ENABLE_HEADER_MODE_PRI_DBNUM): -+ mvHeaderReg |= ETH_MVHDR_DAPREFIX_DBNUM_PRI; -+ break; -+ case(MV_ETH_ENABLE_HEADER_MODE_PRI_SPID): -+ mvHeaderReg |= ETH_MVHDR_DAPREFIX_SPID_PRI; -+ break; -+ default: -+ break; -+ } -+ -+ switch (numRxQ) -+ { -+ case (4): -+ mvHeaderReg |= ETH_MVHDR_MHMASK_4_QUEUE; -+ break; -+ case (8): -+ mvHeaderReg |= ETH_MVHDR_MHMASK_8_QUEUE; -+ break; -+ default: -+ break; -+ } -+ } -+ } -+ -+ MV_REG_WRITE(ETH_PORT_MARVELL_HEADER_REG(port), mvHeaderReg); -+ -+ return MV_OK; -+} -+ -+#if (MV_ETH_VERSION >= 4) -+/******************************************************************************* -+* mvEthEjpModeSet - Enable / Disable EJP policy for TX. -+* -+* DESCRIPTION: -+* This function -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* MV_BOOL TRUE - enable EJP mode -+* FALSE - disable EJP mode -+* -+* OUTPUT: MV_STATUS -+* MV_OK - Success -+* Other - Failure -+* -+* RETURN: None. -+* -+*******************************************************************************/ -+MV_STATUS mvEthEjpModeSet(void* pPortHandle, int mode) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ int port = pPortCtrl->portNo; -+ -+ if((port < 0) || (port >= mvCtrlEthMaxPortGet())) -+ return MV_OUT_OF_RANGE; -+ -+ pPortCtrl = ethPortCtrl[port]; -+ if(pPortCtrl == NULL) -+ return MV_NOT_FOUND; -+ -+ pPortCtrl->portConfig.ejpMode = mode; -+ if(mode) -+ { -+ /* EJP enabled */ -+ MV_REG_WRITE(ETH_TXQ_CMD_1_REG(port), ETH_TX_EJP_ENABLE_MASK); -+ } -+ else -+ { -+ /* EJP disabled */ -+ MV_REG_WRITE(ETH_TXQ_CMD_1_REG(port), 0); -+ } -+ mvOsPrintf("eth_%d: EJP %s - ETH_TXQ_CMD_1_REG: 0x%x = 0x%08x\n", -+ port, mode ? "Enabled" : "Disabled", ETH_TXQ_CMD_1_REG(port), -+ MV_REG_READ(ETH_TXQ_CMD_1_REG(port))); -+ -+ return MV_OK; -+} -+#endif /* MV_ETH_VERSION >= 4 */ -+ -+/******************************************************************************* -+* mvEthStatusGet - Get major properties of the port . -+* -+* DESCRIPTION: -+* This function get major properties of the port (link, speed, duplex, -+* flowControl, etc) and return them using the single structure. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* -+* OUTPUT: -+* MV_ETH_PORT_STATUS* pStatus - Pointer to structure, were port status -+* will be placed. -+* -+* RETURN: None. -+* -+*******************************************************************************/ -+void mvEthStatusGet(void* pPortHandle, MV_ETH_PORT_STATUS* pStatus) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ int port = pPortCtrl->portNo; -+ -+ MV_U32 regValue; -+ -+ regValue = MV_REG_READ( ETH_PORT_STATUS_REG(port) ); -+ -+ if(regValue & ETH_GMII_SPEED_1000_MASK) -+ pStatus->speed = MV_ETH_SPEED_1000; -+ else if(regValue & ETH_MII_SPEED_100_MASK) -+ pStatus->speed = MV_ETH_SPEED_100; -+ else -+ pStatus->speed = MV_ETH_SPEED_10; -+ -+ if(regValue & ETH_LINK_UP_MASK) -+ pStatus->isLinkUp = MV_TRUE; -+ else -+ pStatus->isLinkUp = MV_FALSE; -+ -+ if(regValue & ETH_FULL_DUPLEX_MASK) -+ pStatus->duplex = MV_ETH_DUPLEX_FULL; -+ else -+ pStatus->duplex = MV_ETH_DUPLEX_HALF; -+ -+ -+ if(regValue & ETH_ENABLE_RCV_FLOW_CTRL_MASK) -+ pStatus->flowControl = MV_ETH_FC_ENABLE; -+ else -+ pStatus->flowControl = MV_ETH_FC_DISABLE; -+} -+ -+ -+/******************************************************************************/ -+/* PHY Control Functions */ -+/******************************************************************************/ -+ -+ -+/******************************************************************************* -+* mvEthPhyAddrSet - Set the ethernet port PHY address. -+* -+* DESCRIPTION: -+* This routine set the ethernet port PHY address according to given -+* parameter. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* int phyAddr - PHY address -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+void mvEthPhyAddrSet(void* pPortHandle, int phyAddr) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ int port = pPortCtrl->portNo; -+ unsigned int regData; -+ -+ regData = MV_REG_READ(ETH_PHY_ADDR_REG(port)); -+ -+ regData &= ~ETH_PHY_ADDR_MASK; -+ regData |= phyAddr; -+ -+ MV_REG_WRITE(ETH_PHY_ADDR_REG(port), regData); -+ -+ return; -+} -+ -+/******************************************************************************* -+* mvEthPhyAddrGet - Get the ethernet port PHY address. -+* -+* DESCRIPTION: -+* This routine returns the given ethernet port PHY address. -+* -+* INPUT: -+* void* pPortHandle - Pointer to port specific handler; -+* -+* -+* RETURN: int - PHY address. -+* -+*******************************************************************************/ -+int mvEthPhyAddrGet(void* pPortHandle) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHandle; -+ int port = pPortCtrl->portNo; -+ unsigned int regData; -+ -+ regData = MV_REG_READ(ETH_PHY_ADDR_REG(port)); -+ -+ return ((regData >> (5 * port)) & 0x1f); -+} -+ -+/******************************************************************************/ -+/* Descriptor handling Functions */ -+/******************************************************************************/ -+ -+/******************************************************************************* -+* etherInitRxDescRing - Curve a Rx chain desc list and buffer in memory. -+* -+* DESCRIPTION: -+* This function prepares a Rx chained list of descriptors and packet -+* buffers in a form of a ring. The routine must be called after port -+* initialization routine and before port start routine. -+* The Ethernet SDMA engine uses CPU bus addresses to access the various -+* devices in the system (i.e. DRAM). This function uses the ethernet -+* struct 'virtual to physical' routine (set by the user) to set the ring -+* with physical addresses. -+* -+* INPUT: -+* ETH_QUEUE_CTRL *pEthPortCtrl Ethernet Port Control srtuct. -+* int rxQueue Number of Rx queue. -+* int rxDescNum Number of Rx descriptors -+* MV_U8* rxDescBaseAddr Rx descriptors memory area base addr. -+* -+* OUTPUT: -+* The routine updates the Ethernet port control struct with information -+* regarding the Rx descriptors and buffers. -+* -+* RETURN: None -+* -+*******************************************************************************/ -+static void ethInitRxDescRing(ETH_PORT_CTRL* pPortCtrl, int queue) -+{ -+ ETH_RX_DESC *pRxDescBase, *pRxDesc, *pRxPrevDesc; -+ int ix, rxDescNum = pPortCtrl->rxQueueConfig[queue].descrNum; -+ ETH_QUEUE_CTRL *pQueueCtrl = &pPortCtrl->rxQueue[queue]; -+ -+ /* Make sure descriptor address is cache line size aligned */ -+ pRxDescBase = (ETH_RX_DESC*)MV_ALIGN_UP((MV_ULONG)pQueueCtrl->descBuf.bufVirtPtr, -+ CPU_D_CACHE_LINE_SIZE); -+ -+ pRxDesc = (ETH_RX_DESC*)pRxDescBase; -+ pRxPrevDesc = pRxDesc; -+ -+ /* initialize the Rx descriptors ring */ -+ for (ix=0; ix<rxDescNum; ix++) -+ { -+ pRxDesc->bufSize = 0x0; -+ pRxDesc->byteCnt = 0x0; -+ pRxDesc->cmdSts = ETH_BUFFER_OWNED_BY_HOST; -+ pRxDesc->bufPtr = 0x0; -+ pRxDesc->returnInfo = 0x0; -+ pRxPrevDesc = pRxDesc; -+ if(ix == (rxDescNum-1)) -+ { -+ /* Closing Rx descriptors ring */ -+ pRxPrevDesc->nextDescPtr = (MV_U32)ethDescVirtToPhy(pQueueCtrl, (void*)pRxDescBase); -+ } -+ else -+ { -+ pRxDesc = (ETH_RX_DESC*)((MV_ULONG)pRxDesc + ETH_RX_DESC_ALIGNED_SIZE); -+ pRxPrevDesc->nextDescPtr = (MV_U32)ethDescVirtToPhy(pQueueCtrl, (void*)pRxDesc); -+ } -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pRxPrevDesc); -+ } -+ -+ pQueueCtrl->pCurrentDescr = pRxDescBase; -+ pQueueCtrl->pUsedDescr = pRxDescBase; -+ -+ pQueueCtrl->pFirstDescr = pRxDescBase; -+ pQueueCtrl->pLastDescr = pRxDesc; -+ pQueueCtrl->resource = 0; -+} -+ -+void ethResetRxDescRing(void* pPortHndl, int queue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->rxQueue[queue]; -+ ETH_RX_DESC* pRxDesc = (ETH_RX_DESC*)pQueueCtrl->pFirstDescr; -+ -+ pQueueCtrl->resource = 0; -+ if(pQueueCtrl->pFirstDescr != NULL) -+ { -+ while(MV_TRUE) -+ { -+ pRxDesc->bufSize = 0x0; -+ pRxDesc->byteCnt = 0x0; -+ pRxDesc->cmdSts = ETH_BUFFER_OWNED_BY_HOST; -+ pRxDesc->bufPtr = 0x0; -+ pRxDesc->returnInfo = 0x0; -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pRxDesc); -+ if( (void*)pRxDesc == pQueueCtrl->pLastDescr) -+ break; -+ pRxDesc = RX_NEXT_DESC_PTR(pRxDesc, pQueueCtrl); -+ } -+ pQueueCtrl->pCurrentDescr = pQueueCtrl->pFirstDescr; -+ pQueueCtrl->pUsedDescr = pQueueCtrl->pFirstDescr; -+ -+ /* Update RX Command register */ -+ pPortCtrl->portRxQueueCmdReg |= (1 << queue); -+ -+ /* update HW */ -+ MV_REG_WRITE( ETH_RX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue), -+ (MV_U32)ethDescVirtToPhy(pQueueCtrl, pQueueCtrl->pCurrentDescr) ); -+ } -+ else -+ { -+ /* Update RX Command register */ -+ pPortCtrl->portRxQueueCmdReg &= ~(1 << queue); -+ -+ /* update HW */ -+ MV_REG_WRITE( ETH_RX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue), 0); -+ } -+} -+ -+/******************************************************************************* -+* etherInitTxDescRing - Curve a Tx chain desc list and buffer in memory. -+* -+* DESCRIPTION: -+* This function prepares a Tx chained list of descriptors and packet -+* buffers in a form of a ring. The routine must be called after port -+* initialization routine and before port start routine. -+* The Ethernet SDMA engine uses CPU bus addresses to access the various -+* devices in the system (i.e. DRAM). This function uses the ethernet -+* struct 'virtual to physical' routine (set by the user) to set the ring -+* with physical addresses. -+* -+* INPUT: -+* ETH_PORT_CTRL *pEthPortCtrl Ethernet Port Control srtuct. -+* int txQueue Number of Tx queue. -+* int txDescNum Number of Tx descriptors -+* int txBuffSize Size of Tx buffer -+* MV_U8* pTxDescBase Tx descriptors memory area base addr. -+* -+* OUTPUT: -+* The routine updates the Ethernet port control struct with information -+* regarding the Tx descriptors and buffers. -+* -+* RETURN: None. -+* -+*******************************************************************************/ -+static void ethInitTxDescRing(ETH_PORT_CTRL* pPortCtrl, int queue) -+{ -+ ETH_TX_DESC *pTxDescBase, *pTxDesc, *pTxPrevDesc; -+ int ix, txDescNum = pPortCtrl->txQueueConfig[queue].descrNum; -+ ETH_QUEUE_CTRL *pQueueCtrl = &pPortCtrl->txQueue[queue]; -+ -+ /* Make sure descriptor address is cache line size aligned */ -+ pTxDescBase = (ETH_TX_DESC*)MV_ALIGN_UP((MV_ULONG)pQueueCtrl->descBuf.bufVirtPtr, -+ CPU_D_CACHE_LINE_SIZE); -+ -+ pTxDesc = (ETH_TX_DESC*)pTxDescBase; -+ pTxPrevDesc = pTxDesc; -+ -+ /* initialize the Tx descriptors ring */ -+ for (ix=0; ix<txDescNum; ix++) -+ { -+ pTxDesc->byteCnt = 0x0000; -+ pTxDesc->L4iChk = 0x0000; -+ pTxDesc->cmdSts = ETH_BUFFER_OWNED_BY_HOST; -+ pTxDesc->bufPtr = 0x0; -+ pTxDesc->returnInfo = 0x0; -+ -+ pTxPrevDesc = pTxDesc; -+ -+ if(ix == (txDescNum-1)) -+ { -+ /* Closing Tx descriptors ring */ -+ pTxPrevDesc->nextDescPtr = (MV_U32)ethDescVirtToPhy(pQueueCtrl, (void*)pTxDescBase); -+ } -+ else -+ { -+ pTxDesc = (ETH_TX_DESC*)((MV_ULONG)pTxDesc + ETH_TX_DESC_ALIGNED_SIZE); -+ pTxPrevDesc->nextDescPtr = (MV_U32)ethDescVirtToPhy(pQueueCtrl, (void*)pTxDesc); -+ } -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pTxPrevDesc); -+ } -+ -+ pQueueCtrl->pCurrentDescr = pTxDescBase; -+ pQueueCtrl->pUsedDescr = pTxDescBase; -+ -+ pQueueCtrl->pFirstDescr = pTxDescBase; -+ pQueueCtrl->pLastDescr = pTxDesc; -+ /* Leave one TX descriptor out of use */ -+ pQueueCtrl->resource = txDescNum - 1; -+} -+ -+void ethResetTxDescRing(void* pPortHndl, int queue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->txQueue[queue]; -+ ETH_TX_DESC* pTxDesc = (ETH_TX_DESC*)pQueueCtrl->pFirstDescr; -+ -+ pQueueCtrl->resource = 0; -+ if(pQueueCtrl->pFirstDescr != NULL) -+ { -+ while(MV_TRUE) -+ { -+ pTxDesc->byteCnt = 0x0000; -+ pTxDesc->L4iChk = 0x0000; -+ pTxDesc->cmdSts = ETH_BUFFER_OWNED_BY_HOST; -+ pTxDesc->bufPtr = 0x0; -+ pTxDesc->returnInfo = 0x0; -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pTxDesc); -+ pQueueCtrl->resource++; -+ if( (void*)pTxDesc == pQueueCtrl->pLastDescr) -+ break; -+ pTxDesc = TX_NEXT_DESC_PTR(pTxDesc, pQueueCtrl); -+ } -+ /* Leave one TX descriptor out of use */ -+ pQueueCtrl->resource--; -+ pQueueCtrl->pCurrentDescr = pQueueCtrl->pFirstDescr; -+ pQueueCtrl->pUsedDescr = pQueueCtrl->pFirstDescr; -+ -+ /* Update TX Command register */ -+ pPortCtrl->portTxQueueCmdReg |= MV_32BIT_LE_FAST(1 << queue); -+ /* update HW */ -+ MV_REG_WRITE( ETH_TX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue), -+ (MV_U32)ethDescVirtToPhy(pQueueCtrl, pQueueCtrl->pCurrentDescr) ); -+ } -+ else -+ { -+ /* Update TX Command register */ -+ pPortCtrl->portTxQueueCmdReg &= MV_32BIT_LE_FAST(~(1 << queue)); -+ /* update HW */ -+ MV_REG_WRITE( ETH_TX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue), 0 ); -+ } -+} -+ -+/******************************************************************************* -+* ethAllocDescrMemory - Free memory allocated for RX and TX descriptors. -+* -+* DESCRIPTION: -+* This function allocates memory for RX and TX descriptors. -+* - If ETH_DESCR_IN_SRAM defined, allocate memory from SRAM. -+* - If ETH_DESCR_IN_SDRAM defined, allocate memory in SDRAM. -+* -+* INPUT: -+* int size - size of memory should be allocated. -+* -+* RETURN: None -+* -+*******************************************************************************/ -+static MV_U8* ethAllocDescrMemory(ETH_PORT_CTRL* pPortCtrl, int descSize, -+ MV_ULONG* pPhysAddr, MV_U32 *memHandle) -+{ -+ MV_U8* pVirt; -+ -+#if defined(ETH_DESCR_IN_SRAM) -+ if(ethDescInSram == MV_TRUE) -+ pVirt = (char*)mvSramMalloc(descSize, pPhysAddr); -+ else -+#endif /* ETH_DESCR_IN_SRAM */ -+ { -+#ifdef ETH_DESCR_UNCACHED -+ pVirt = (MV_U8*)mvOsIoUncachedMalloc(pPortCtrl->osHandle, descSize, -+ pPhysAddr,memHandle); -+#else -+ pVirt = (MV_U8*)mvOsIoCachedMalloc(pPortCtrl->osHandle, descSize, -+ pPhysAddr, memHandle); -+#endif /* ETH_DESCR_UNCACHED */ -+ } -+ memset(pVirt, 0, descSize); -+ -+ return pVirt; -+} -+ -+/******************************************************************************* -+* ethFreeDescrMemory - Free memory allocated for RX and TX descriptors. -+* -+* DESCRIPTION: -+* This function frees memory allocated for RX and TX descriptors. -+* - If ETH_DESCR_IN_SRAM defined, free memory using gtSramFree() function. -+* - If ETH_DESCR_IN_SDRAM defined, free memory using mvOsFree() function. -+* -+* INPUT: -+* void* pVirtAddr - virtual pointer to memory allocated for RX and TX -+* desriptors. -+* -+* RETURN: None -+* -+*******************************************************************************/ -+void ethFreeDescrMemory(ETH_PORT_CTRL* pPortCtrl, MV_BUF_INFO* pDescBuf) -+{ -+ if( (pDescBuf == NULL) || (pDescBuf->bufVirtPtr == NULL) ) -+ return; -+ -+#if defined(ETH_DESCR_IN_SRAM) -+ if( ethDescInSram ) -+ { -+ mvSramFree(pDescBuf->bufSize, pDescBuf->bufPhysAddr, pDescBuf->bufVirtPtr); -+ return; -+ } -+#endif /* ETH_DESCR_IN_SRAM */ -+ -+#ifdef ETH_DESCR_UNCACHED -+ mvOsIoUncachedFree(pPortCtrl->osHandle, pDescBuf->bufSize, pDescBuf->bufPhysAddr, -+ pDescBuf->bufVirtPtr,pDescBuf->memHandle); -+#else -+ mvOsIoCachedFree(pPortCtrl->osHandle, pDescBuf->bufSize, pDescBuf->bufPhysAddr, -+ pDescBuf->bufVirtPtr,pDescBuf->memHandle); -+#endif /* ETH_DESCR_UNCACHED */ -+} -+ -+/******************************************************************************/ -+/* Other Functions */ -+/******************************************************************************/ -+ -+void mvEthPortPowerUp(int port) -+{ -+ MV_U32 regVal; -+ -+ /* MAC Cause register should be cleared */ -+ MV_REG_WRITE(ETH_UNIT_INTR_CAUSE_REG(port), 0); -+ -+ if (mvBoardIsPortInSgmii(port)) -+ mvEthPortSgmiiConfig(port); -+ -+ /* Cancel Port Reset */ -+ regVal = MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port)); -+ regVal &= (~ETH_PORT_RESET_MASK); -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(port), regVal); -+ while( (MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port)) & ETH_PORT_RESET_MASK) != 0); -+} -+ -+void mvEthPortPowerDown(int port) -+{ -+ MV_U32 regVal; -+ -+ /* Port must be DISABLED */ -+ regVal = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(port)); -+ if( (regVal & ETH_PORT_ENABLE_MASK) != 0) -+ { -+ mvOsPrintf("ethPort #%d: PowerDown - port must be Disabled (PSC=0x%x)\n", -+ port, regVal); -+ return; -+ } -+ -+ /* Port Reset (Read after write the register as a precaution) */ -+ regVal = MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port)); -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(port), regVal | ETH_PORT_RESET_MASK); -+ while((MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port)) & ETH_PORT_RESET_MASK) == 0); -+} -+ -+static void mvEthPortSgmiiConfig(int port) -+{ -+ MV_U32 regVal; -+ -+ regVal = MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port)); -+ -+ regVal |= (ETH_SGMII_MODE_MASK /*| ETH_INBAND_AUTO_NEG_ENABLE_MASK */); -+ regVal &= (~ETH_INBAND_AUTO_NEG_BYPASS_MASK); -+ -+ MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(port), regVal); -+} -+ -+ -+ -+ -+ -+ -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.c b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.c -new file mode 100644 -index 0000000..62edcb5 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.c -@@ -0,0 +1,748 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+/******************************************************************************* -+* mvEthDebug.c - Source file for user friendly debug functions -+* -+* DESCRIPTION: -+* -+* DEPENDENCIES: -+* None. -+* -+*******************************************************************************/ -+ -+#include "mvOs.h" -+#include "mvCommon.h" -+#include "mvTypes.h" -+#include "mv802_3.h" -+#include "mvDebug.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "eth-phy/mvEthPhy.h" -+#include "eth/mvEth.h" -+#include "eth/gbe/mvEthDebug.h" -+ -+/* #define mvOsPrintf printf */ -+ -+void mvEthPortShow(void* pHndl); -+void mvEthQueuesShow(void* pHndl, int rxQueue, int txQueue, int mode); -+ -+/******************************************************************************/ -+/* Debug functions */ -+/******************************************************************************/ -+void ethRxCoal(int port, int usec) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthRxCoalSet(pHndl, usec); -+ } -+} -+ -+void ethTxCoal(int port, int usec) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthTxCoalSet(pHndl, usec); -+ } -+} -+ -+#if (MV_ETH_VERSION >= 4) -+void ethEjpModeSet(int port, int mode) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthEjpModeSet(pHndl, mode); -+ } -+} -+#endif /* (MV_ETH_VERSION >= 4) */ -+ -+void ethBpduRxQ(int port, int bpduQueue) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthBpduRxQueue(pHndl, bpduQueue); -+ } -+} -+ -+void ethArpRxQ(int port, int arpQueue) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthArpRxQueue(pHndl, arpQueue); -+ } -+} -+ -+void ethTcpRxQ(int port, int tcpQueue) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthTcpRxQueue(pHndl, tcpQueue); -+ } -+} -+ -+void ethUdpRxQ(int port, int udpQueue) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthUdpRxQueue(pHndl, udpQueue); -+ } -+} -+ -+void ethTxPolicyRegs(int port) -+{ -+ int queue; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)mvEthPortHndlGet(port); -+ -+ if(pPortCtrl == NULL) -+ { -+ return; -+ } -+ mvOsPrintf("Port #%d TX Policy: EJP=%d, TXQs: ", -+ port, pPortCtrl->portConfig.ejpMode); -+ for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++) -+ { -+ if(pPortCtrl->txQueueConfig[queue].descrNum > 0) -+ mvOsPrintf("%d, ", queue); -+ } -+ mvOsPrintf("\n"); -+ -+ mvOsPrintf("\n\t TX policy Port #%d configuration registers\n", port); -+ -+ mvOsPrintf("ETH_TX_QUEUE_COMMAND_REG : 0x%X = 0x%08x\n", -+ ETH_TX_QUEUE_COMMAND_REG(port), -+ MV_REG_READ( ETH_TX_QUEUE_COMMAND_REG(port) ) ); -+ -+ mvOsPrintf("ETH_TX_FIXED_PRIO_CFG_REG : 0x%X = 0x%08x\n", -+ ETH_TX_FIXED_PRIO_CFG_REG(port), -+ MV_REG_READ( ETH_TX_FIXED_PRIO_CFG_REG(port) ) ); -+ -+ mvOsPrintf("ETH_TX_TOKEN_RATE_CFG_REG : 0x%X = 0x%08x\n", -+ ETH_TX_TOKEN_RATE_CFG_REG(port), -+ MV_REG_READ( ETH_TX_TOKEN_RATE_CFG_REG(port) ) ); -+ -+ mvOsPrintf("ETH_MAX_TRANSMIT_UNIT_REG : 0x%X = 0x%08x\n", -+ ETH_MAX_TRANSMIT_UNIT_REG(port), -+ MV_REG_READ( ETH_MAX_TRANSMIT_UNIT_REG(port) ) ); -+ -+ mvOsPrintf("ETH_TX_TOKEN_BUCKET_SIZE_REG : 0x%X = 0x%08x\n", -+ ETH_TX_TOKEN_BUCKET_SIZE_REG(port), -+ MV_REG_READ( ETH_TX_TOKEN_BUCKET_SIZE_REG(port) ) ); -+ -+ mvOsPrintf("ETH_TX_TOKEN_BUCKET_COUNT_REG : 0x%X = 0x%08x\n", -+ ETH_TX_TOKEN_BUCKET_COUNT_REG(port), -+ MV_REG_READ( ETH_TX_TOKEN_BUCKET_COUNT_REG(port) ) ); -+ -+ for(queue=0; queue<MV_ETH_MAX_TXQ; queue++) -+ { -+ mvOsPrintf("\n\t TX policy Port #%d, Queue #%d configuration registers\n", port, queue); -+ -+ mvOsPrintf("ETH_TXQ_TOKEN_COUNT_REG : 0x%X = 0x%08x\n", -+ ETH_TXQ_TOKEN_COUNT_REG(port, queue), -+ MV_REG_READ( ETH_TXQ_TOKEN_COUNT_REG(port, queue) ) ); -+ -+ mvOsPrintf("ETH_TXQ_TOKEN_CFG_REG : 0x%X = 0x%08x\n", -+ ETH_TXQ_TOKEN_CFG_REG(port, queue), -+ MV_REG_READ( ETH_TXQ_TOKEN_CFG_REG(port, queue) ) ); -+ -+ mvOsPrintf("ETH_TXQ_ARBITER_CFG_REG : 0x%X = 0x%08x\n", -+ ETH_TXQ_ARBITER_CFG_REG(port, queue), -+ MV_REG_READ( ETH_TXQ_ARBITER_CFG_REG(port, queue) ) ); -+ } -+ mvOsPrintf("\n"); -+} -+ -+/* Print important registers of Ethernet port */ -+void ethPortRegs(int port) -+{ -+ mvOsPrintf("\n\t ethGiga #%d port Registers:\n", port); -+ -+ mvOsPrintf("ETH_PORT_STATUS_REG : 0x%X = 0x%08x\n", -+ ETH_PORT_STATUS_REG(port), -+ MV_REG_READ( ETH_PORT_STATUS_REG(port) ) ); -+ -+ mvOsPrintf("ETH_PORT_SERIAL_CTRL_REG : 0x%X = 0x%08x\n", -+ ETH_PORT_SERIAL_CTRL_REG(port), -+ MV_REG_READ( ETH_PORT_SERIAL_CTRL_REG(port) ) ); -+ -+ mvOsPrintf("ETH_PORT_CONFIG_REG : 0x%X = 0x%08x\n", -+ ETH_PORT_CONFIG_REG(port), -+ MV_REG_READ( ETH_PORT_CONFIG_REG(port) ) ); -+ -+ mvOsPrintf("ETH_PORT_CONFIG_EXTEND_REG : 0x%X = 0x%08x\n", -+ ETH_PORT_CONFIG_EXTEND_REG(port), -+ MV_REG_READ( ETH_PORT_CONFIG_EXTEND_REG(port) ) ); -+ -+ mvOsPrintf("ETH_SDMA_CONFIG_REG : 0x%X = 0x%08x\n", -+ ETH_SDMA_CONFIG_REG(port), -+ MV_REG_READ( ETH_SDMA_CONFIG_REG(port) ) ); -+ -+ mvOsPrintf("ETH_TX_FIFO_URGENT_THRESH_REG : 0x%X = 0x%08x\n", -+ ETH_TX_FIFO_URGENT_THRESH_REG(port), -+ MV_REG_READ( ETH_TX_FIFO_URGENT_THRESH_REG(port) ) ); -+ -+ mvOsPrintf("ETH_RX_QUEUE_COMMAND_REG : 0x%X = 0x%08x\n", -+ ETH_RX_QUEUE_COMMAND_REG(port), -+ MV_REG_READ( ETH_RX_QUEUE_COMMAND_REG(port) ) ); -+ -+ mvOsPrintf("ETH_TX_QUEUE_COMMAND_REG : 0x%X = 0x%08x\n", -+ ETH_TX_QUEUE_COMMAND_REG(port), -+ MV_REG_READ( ETH_TX_QUEUE_COMMAND_REG(port) ) ); -+ -+ mvOsPrintf("ETH_INTR_CAUSE_REG : 0x%X = 0x%08x\n", -+ ETH_INTR_CAUSE_REG(port), -+ MV_REG_READ( ETH_INTR_CAUSE_REG(port) ) ); -+ -+ mvOsPrintf("ETH_INTR_EXTEND_CAUSE_REG : 0x%X = 0x%08x\n", -+ ETH_INTR_CAUSE_EXT_REG(port), -+ MV_REG_READ( ETH_INTR_CAUSE_EXT_REG(port) ) ); -+ -+ mvOsPrintf("ETH_INTR_MASK_REG : 0x%X = 0x%08x\n", -+ ETH_INTR_MASK_REG(port), -+ MV_REG_READ( ETH_INTR_MASK_REG(port) ) ); -+ -+ mvOsPrintf("ETH_INTR_EXTEND_MASK_REG : 0x%X = 0x%08x\n", -+ ETH_INTR_MASK_EXT_REG(port), -+ MV_REG_READ( ETH_INTR_MASK_EXT_REG(port) ) ); -+ -+ mvOsPrintf("ETH_RX_DESCR_STAT_CMD_REG : 0x%X = 0x%08x\n", -+ ETH_RX_DESCR_STAT_CMD_REG(port, 0), -+ MV_REG_READ( ETH_RX_DESCR_STAT_CMD_REG(port, 0) ) ); -+ -+ mvOsPrintf("ETH_RX_BYTE_COUNT_REG : 0x%X = 0x%08x\n", -+ ETH_RX_BYTE_COUNT_REG(port, 0), -+ MV_REG_READ( ETH_RX_BYTE_COUNT_REG(port, 0) ) ); -+ -+ mvOsPrintf("ETH_RX_BUF_PTR_REG : 0x%X = 0x%08x\n", -+ ETH_RX_BUF_PTR_REG(port, 0), -+ MV_REG_READ( ETH_RX_BUF_PTR_REG(port, 0) ) ); -+ -+ mvOsPrintf("ETH_RX_CUR_DESC_PTR_REG : 0x%X = 0x%08x\n", -+ ETH_RX_CUR_DESC_PTR_REG(port, 0), -+ MV_REG_READ( ETH_RX_CUR_DESC_PTR_REG(port, 0) ) ); -+} -+ -+ -+/* Print Giga Ethernet UNIT registers */ -+void ethRegs(int port) -+{ -+ mvOsPrintf("ETH_PHY_ADDR_REG : 0x%X = 0x%08x\n", -+ ETH_PHY_ADDR_REG(port), -+ MV_REG_READ(ETH_PHY_ADDR_REG(port)) ); -+ -+ mvOsPrintf("ETH_UNIT_INTR_CAUSE_REG : 0x%X = 0x%08x\n", -+ ETH_UNIT_INTR_CAUSE_REG(port), -+ MV_REG_READ( ETH_UNIT_INTR_CAUSE_REG(port)) ); -+ -+ mvOsPrintf("ETH_UNIT_INTR_MASK_REG : 0x%X = 0x%08x\n", -+ ETH_UNIT_INTR_MASK_REG(port), -+ MV_REG_READ( ETH_UNIT_INTR_MASK_REG(port)) ); -+ -+ mvOsPrintf("ETH_UNIT_ERROR_ADDR_REG : 0x%X = 0x%08x\n", -+ ETH_UNIT_ERROR_ADDR_REG(port), -+ MV_REG_READ(ETH_UNIT_ERROR_ADDR_REG(port)) ); -+ -+ mvOsPrintf("ETH_UNIT_INT_ADDR_ERROR_REG : 0x%X = 0x%08x\n", -+ ETH_UNIT_INT_ADDR_ERROR_REG(port), -+ MV_REG_READ(ETH_UNIT_INT_ADDR_ERROR_REG(port)) ); -+ -+} -+ -+/******************************************************************************/ -+/* MIB Counters functions */ -+/******************************************************************************/ -+ -+/******************************************************************************* -+* ethClearMibCounters - Clear all MIB counters -+* -+* DESCRIPTION: -+* This function clears all MIB counters of a specific ethernet port. -+* A read from the MIB counter will reset the counter. -+* -+* INPUT: -+* int port - Ethernet Port number. -+* -+* RETURN: None -+* -+*******************************************************************************/ -+void ethClearCounters(int port) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ mvEthMibCountersClear(pHndl); -+ -+ return; -+} -+ -+ -+/* Print counters of the Ethernet port */ -+void ethPortCounters(int port) -+{ -+ MV_U32 regValue, regValHigh; -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl == NULL) -+ return; -+ -+ mvOsPrintf("\n\t Port #%d MIB Counters\n\n", port); -+ -+ mvOsPrintf("GoodFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_FRAMES_RECEIVED, NULL)); -+ mvOsPrintf("BadFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_BAD_FRAMES_RECEIVED, NULL)); -+ mvOsPrintf("BroadcastFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_BROADCAST_FRAMES_RECEIVED, NULL)); -+ mvOsPrintf("MulticastFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_MULTICAST_FRAMES_RECEIVED, NULL)); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW, -+ ®ValHigh); -+ mvOsPrintf("GoodOctetsReceived = 0x%08x%08x\n", -+ regValHigh, regValue); -+ -+ mvOsPrintf("\n"); -+ mvOsPrintf("GoodFramesSent = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_FRAMES_SENT, NULL)); -+ mvOsPrintf("BroadcastFramesSent = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_BROADCAST_FRAMES_SENT, NULL)); -+ mvOsPrintf("MulticastFramesSent = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_MULTICAST_FRAMES_SENT, NULL)); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_OCTETS_SENT_LOW, -+ ®ValHigh); -+ mvOsPrintf("GoodOctetsSent = 0x%08x%08x\n", regValHigh, regValue); -+ -+ -+ mvOsPrintf("\n\t FC Control Counters\n"); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_UNREC_MAC_CONTROL_RECEIVED, NULL); -+ mvOsPrintf("UnrecogMacControlReceived = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_FC_RECEIVED, NULL); -+ mvOsPrintf("GoodFCFramesReceived = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_BAD_FC_RECEIVED, NULL); -+ mvOsPrintf("BadFCFramesReceived = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_FC_SENT, NULL); -+ mvOsPrintf("FCFramesSent = %u\n", regValue); -+ -+ -+ mvOsPrintf("\n\t RX Errors\n"); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_BAD_OCTETS_RECEIVED, NULL); -+ mvOsPrintf("BadOctetsReceived = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_UNDERSIZE_RECEIVED, NULL); -+ mvOsPrintf("UndersizeFramesReceived = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_FRAGMENTS_RECEIVED, NULL); -+ mvOsPrintf("FragmentsReceived = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_OVERSIZE_RECEIVED, NULL); -+ mvOsPrintf("OversizeFramesReceived = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_JABBER_RECEIVED, NULL); -+ mvOsPrintf("JabbersReceived = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_MAC_RECEIVE_ERROR, NULL); -+ mvOsPrintf("MacReceiveErrors = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_BAD_CRC_EVENT, NULL); -+ mvOsPrintf("BadCrcReceived = %u\n", regValue); -+ -+ mvOsPrintf("\n\t TX Errors\n"); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_INTERNAL_MAC_TRANSMIT_ERR, NULL); -+ mvOsPrintf("TxMacErrors = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_EXCESSIVE_COLLISION, NULL); -+ mvOsPrintf("TxExcessiveCollisions = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_COLLISION, NULL); -+ mvOsPrintf("TxCollisions = %u\n", regValue); -+ -+ regValue = mvEthMibCounterRead(pHndl, ETH_MIB_LATE_COLLISION, NULL); -+ mvOsPrintf("TxLateCollisions = %u\n", regValue); -+ -+ -+ mvOsPrintf("\n"); -+ regValue = MV_REG_READ( ETH_RX_DISCARD_PKTS_CNTR_REG(port)); -+ mvOsPrintf("Rx Discard packets counter = %u\n", regValue); -+ -+ regValue = MV_REG_READ(ETH_RX_OVERRUN_PKTS_CNTR_REG(port)); -+ mvOsPrintf("Rx Overrun packets counter = %u\n", regValue); -+} -+ -+/* Print RMON counters of the Ethernet port */ -+void ethPortRmonCounters(int port) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl == NULL) -+ return; -+ -+ mvOsPrintf("\n\t Port #%d RMON MIB Counters\n\n", port); -+ -+ mvOsPrintf("64 ByteFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_64_OCTETS, NULL)); -+ mvOsPrintf("65...127 ByteFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_65_TO_127_OCTETS, NULL)); -+ mvOsPrintf("128...255 ByteFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_128_TO_255_OCTETS, NULL)); -+ mvOsPrintf("256...511 ByteFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_256_TO_511_OCTETS, NULL)); -+ mvOsPrintf("512...1023 ByteFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_512_TO_1023_OCTETS, NULL)); -+ mvOsPrintf("1024...Max ByteFramesReceived = %u\n", -+ mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_1024_TO_MAX_OCTETS, NULL)); -+} -+ -+/* Print port information */ -+void ethPortStatus(int port) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthPortShow(pHndl); -+ } -+} -+ -+/* Print port queues information */ -+void ethPortQueues(int port, int rxQueue, int txQueue, int mode) -+{ -+ void* pHndl; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvEthQueuesShow(pHndl, rxQueue, txQueue, mode); -+ } -+} -+ -+void ethUcastSet(int port, char* macStr, int queue) -+{ -+ void* pHndl; -+ MV_U8 macAddr[MV_MAC_ADDR_SIZE]; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvMacStrToHex(macStr, macAddr); -+ mvEthMacAddrSet(pHndl, macAddr, queue); -+ } -+} -+ -+ -+void ethPortUcastShow(int port) -+{ -+ MV_U32 unicastReg, macL, macH; -+ int i, j; -+ -+ macL = MV_REG_READ(ETH_MAC_ADDR_LOW_REG(port)); -+ macH = MV_REG_READ(ETH_MAC_ADDR_HIGH_REG(port)); -+ -+ mvOsPrintf("\n\t Port #%d Unicast MAC table: %02x:%02x:%02x:%02x:%02x:%02x\n\n", -+ port, ((macH >> 24) & 0xff), ((macH >> 16) & 0xff), -+ ((macH >> 8) & 0xff), (macH & 0xff), -+ ((macL >> 8) & 0xff), (macL & 0xff) ); -+ -+ for (i=0; i<4; i++) -+ { -+ unicastReg = MV_REG_READ( (ETH_DA_FILTER_UCAST_BASE(port) + i*4)); -+ for(j=0; j<4; j++) -+ { -+ MV_U8 macEntry = (unicastReg >> (8*j)) & 0xFF; -+ -+ mvOsPrintf("%X: %8s, Q = %d\n", i*4+j, -+ (macEntry & BIT0) ? "Accept" : "Reject", (macEntry >> 1) & 0x7); -+ } -+ } -+} -+ -+void ethMcastAdd(int port, char* macStr, int queue) -+{ -+ void* pHndl; -+ MV_U8 macAddr[MV_MAC_ADDR_SIZE]; -+ -+ pHndl = mvEthPortHndlGet(port); -+ if(pHndl != NULL) -+ { -+ mvMacStrToHex(macStr, macAddr); -+ mvEthMcastAddrSet(pHndl, macAddr, queue); -+ } -+} -+ -+void ethPortMcast(int port) -+{ -+ int tblIdx, regIdx; -+ MV_U32 regVal; -+ -+ mvOsPrintf("\n\t Port #%d Special (IP) Multicast table: 01:00:5E:00:00:XX\n\n", -+ port); -+ -+ for(tblIdx=0; tblIdx<(256/4); tblIdx++) -+ { -+ regVal = MV_REG_READ((ETH_DA_FILTER_SPEC_MCAST_BASE(port) + tblIdx*4)); -+ for(regIdx=0; regIdx<4; regIdx++) -+ { -+ if((regVal & (0x01 << (regIdx*8))) != 0) -+ { -+ mvOsPrintf("0x%02X: Accepted, rxQ = %d\n", -+ tblIdx*4+regIdx, ((regVal >> (regIdx*8+1)) & 0x07)); -+ } -+ } -+ } -+ mvOsPrintf("\n\t Port #%d Other Multicast table\n\n", port); -+ for(tblIdx=0; tblIdx<(256/4); tblIdx++) -+ { -+ regVal = MV_REG_READ((ETH_DA_FILTER_OTH_MCAST_BASE(port) + tblIdx*4)); -+ for(regIdx=0; regIdx<4; regIdx++) -+ { -+ if((regVal & (0x01 << (regIdx*8))) != 0) -+ { -+ mvOsPrintf("Crc8=0x%02X: Accepted, rxQ = %d\n", -+ tblIdx*4+regIdx, ((regVal >> (regIdx*8+1)) & 0x07)); -+ } -+ } -+ } -+} -+ -+ -+/* Print status of Ethernet port */ -+void mvEthPortShow(void* pHndl) -+{ -+ MV_U32 regValue, rxCoal, txCoal; -+ int speed, queue, port; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pHndl; -+ -+ port = pPortCtrl->portNo; -+ -+ regValue = MV_REG_READ( ETH_PORT_STATUS_REG(port) ); -+ -+ mvOsPrintf("\n\t ethGiga #%d port Status: 0x%04x = 0x%08x\n\n", -+ port, ETH_PORT_STATUS_REG(port), regValue); -+ -+ mvOsPrintf("descInSram=%d, descSwCoher=%d\n", -+ ethDescInSram, ethDescSwCoher); -+ -+ if(regValue & ETH_GMII_SPEED_1000_MASK) -+ speed = 1000; -+ else if(regValue & ETH_MII_SPEED_100_MASK) -+ speed = 100; -+ else -+ speed = 10; -+ -+ mvEthCoalGet(pPortCtrl, &rxCoal, &txCoal); -+ -+ /* Link, Speed, Duplex, FlowControl */ -+ mvOsPrintf("Link=%s, Speed=%d, Duplex=%s, RxFlowControl=%s", -+ (regValue & ETH_LINK_UP_MASK) ? "UP" : "DOWN", -+ speed, -+ (regValue & ETH_FULL_DUPLEX_MASK) ? "FULL" : "HALF", -+ (regValue & ETH_ENABLE_RCV_FLOW_CTRL_MASK) ? "ENABLE" : "DISABLE"); -+ -+ mvOsPrintf("\n"); -+ -+ mvOsPrintf("RxCoal = %d usec, TxCoal = %d usec\n", -+ rxCoal, txCoal); -+ -+ mvOsPrintf("rxDefQ=%d, arpQ=%d, bpduQ=%d, tcpQ=%d, udpQ=%d\n\n", -+ pPortCtrl->portConfig.rxDefQ, pPortCtrl->portConfig.rxArpQ, -+ pPortCtrl->portConfig.rxBpduQ, -+ pPortCtrl->portConfig.rxTcpQ, pPortCtrl->portConfig.rxUdpQ); -+ -+ /* Print all RX and TX queues */ -+ for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++) -+ { -+ mvOsPrintf("RX Queue #%d: base=0x%lx, free=%d\n", -+ queue, (MV_ULONG)pPortCtrl->rxQueue[queue].pFirstDescr, -+ mvEthRxResourceGet(pPortCtrl, queue) ); -+ } -+ mvOsPrintf("\n"); -+ for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++) -+ { -+ mvOsPrintf("TX Queue #%d: base=0x%lx, free=%d\n", -+ queue, (MV_ULONG)pPortCtrl->txQueue[queue].pFirstDescr, -+ mvEthTxResourceGet(pPortCtrl, queue) ); -+ } -+} -+ -+/* Print RX and TX queue of the Ethernet port */ -+void mvEthQueuesShow(void* pHndl, int rxQueue, int txQueue, int mode) -+{ -+ ETH_PORT_CTRL *pPortCtrl = (ETH_PORT_CTRL*)pHndl; -+ ETH_QUEUE_CTRL *pQueueCtrl; -+ MV_U32 regValue; -+ ETH_RX_DESC *pRxDescr; -+ ETH_TX_DESC *pTxDescr; -+ int i, port = pPortCtrl->portNo; -+ -+ if( (rxQueue >=0) && (rxQueue < MV_ETH_RX_Q_NUM) ) -+ { -+ pQueueCtrl = &(pPortCtrl->rxQueue[rxQueue]); -+ mvOsPrintf("Port #%d, RX Queue #%d\n\n", port, rxQueue); -+ -+ mvOsPrintf("CURR_RX_DESC_PTR : 0x%X = 0x%08x\n", -+ ETH_RX_CUR_DESC_PTR_REG(port, rxQueue), -+ MV_REG_READ( ETH_RX_CUR_DESC_PTR_REG(port, rxQueue))); -+ -+ -+ if(pQueueCtrl->pFirstDescr != NULL) -+ { -+ mvOsPrintf("pFirstDescr=0x%lx, pLastDescr=0x%lx, numOfResources=%d\n", -+ (MV_ULONG)pQueueCtrl->pFirstDescr, (MV_ULONG)pQueueCtrl->pLastDescr, -+ pQueueCtrl->resource); -+ mvOsPrintf("pCurrDescr: 0x%lx, pUsedDescr: 0x%lx\n", -+ (MV_ULONG)pQueueCtrl->pCurrentDescr, -+ (MV_ULONG)pQueueCtrl->pUsedDescr); -+ -+ if(mode == 1) -+ { -+ pRxDescr = (ETH_RX_DESC*)pQueueCtrl->pFirstDescr; -+ i = 0; -+ do -+ { -+ mvOsPrintf("%3d. desc=%08x (%08x), cmd=%08x, data=%4d, buf=%4d, buf=%08x, pkt=%lx, os=%lx\n", -+ i, (MV_U32)pRxDescr, (MV_U32)ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pRxDescr), -+ pRxDescr->cmdSts, pRxDescr->byteCnt, (MV_U32)pRxDescr->bufSize, -+ (unsigned int)pRxDescr->bufPtr, (MV_ULONG)pRxDescr->returnInfo, -+ ((MV_PKT_INFO*)pRxDescr->returnInfo)->osInfo); -+ -+ ETH_DESCR_INV(pPortCtrl, pRxDescr); -+ pRxDescr = RX_NEXT_DESC_PTR(pRxDescr, pQueueCtrl); -+ i++; -+ } while (pRxDescr != pQueueCtrl->pFirstDescr); -+ } -+ } -+ else -+ mvOsPrintf("RX Queue #%d is NOT CREATED\n", rxQueue); -+ } -+ -+ if( (txQueue >=0) && (txQueue < MV_ETH_TX_Q_NUM) ) -+ { -+ pQueueCtrl = &(pPortCtrl->txQueue[txQueue]); -+ mvOsPrintf("Port #%d, TX Queue #%d\n\n", port, txQueue); -+ -+ regValue = MV_REG_READ( ETH_TX_CUR_DESC_PTR_REG(port, txQueue)); -+ mvOsPrintf("CURR_TX_DESC_PTR : 0x%X = 0x%08x\n", -+ ETH_TX_CUR_DESC_PTR_REG(port, txQueue), regValue); -+ -+ if(pQueueCtrl->pFirstDescr != NULL) -+ { -+ mvOsPrintf("pFirstDescr=0x%lx, pLastDescr=0x%lx, numOfResources=%d\n", -+ (MV_ULONG)pQueueCtrl->pFirstDescr, -+ (MV_ULONG)pQueueCtrl->pLastDescr, -+ pQueueCtrl->resource); -+ mvOsPrintf("pCurrDescr: 0x%lx, pUsedDescr: 0x%lx\n", -+ (MV_ULONG)pQueueCtrl->pCurrentDescr, -+ (MV_ULONG)pQueueCtrl->pUsedDescr); -+ -+ if(mode == 1) -+ { -+ pTxDescr = (ETH_TX_DESC*)pQueueCtrl->pFirstDescr; -+ i = 0; -+ do -+ { -+ mvOsPrintf("%3d. desc=%08x (%08x), cmd=%08x, data=%4d, buf=%08x, pkt=%lx, os=%lx\n", -+ i, (MV_U32)pTxDescr, (MV_U32)ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pTxDescr), -+ pTxDescr->cmdSts, pTxDescr->byteCnt, -+ (MV_U32)pTxDescr->bufPtr, (MV_ULONG)pTxDescr->returnInfo, -+ pTxDescr->returnInfo ? (((MV_PKT_INFO*)pTxDescr->returnInfo)->osInfo) : 0x0); -+ -+ ETH_DESCR_INV(pPortCtrl, pTxDescr); -+ pTxDescr = TX_NEXT_DESC_PTR(pTxDescr, pQueueCtrl); -+ i++; -+ } while (pTxDescr != pQueueCtrl->pFirstDescr); -+ } -+ } -+ else -+ mvOsPrintf("TX Queue #%d is NOT CREATED\n", txQueue); -+ } -+} -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.h b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.h -new file mode 100644 -index 0000000..b772a74 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthDebug.h -@@ -0,0 +1,146 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#ifndef __MV_ETH_DEBUG_H__ -+#define __MV_ETH_DEBUG_H__ -+ -+#if 0 -+/* -+ ** Externs -+ */ -+void ethBpduRxQ(int port, int bpduQueue); -+void ethArpRxQ(int port, int bpduQueue); -+void ethTcpRxQ(int port, int bpduQueue); -+void ethUdpRxQ(int port, int bpduQueue); -+void ethMcastAdd(int port, char* macStr, int queue); -+ -+#ifdef INCLUDE_MULTI_QUEUE -+void ethRxPolicy( int port); -+void ethTxPolicy( int port); -+void ethTxPolDA(int port, char* macStr, int txQ, char* headerHexStr); -+void ethRxPolMode(int port, MV_ETH_PRIO_MODE prioMode); -+void ethRxPolQ(int port, int rxQueue, int rxQuota); -+#endif /* INCLUDE_MULTI_QUEUE */ -+ -+void print_egiga_stat(void *sc, unsigned int port); -+void ethPortStatus (int port); -+void ethPortQueues( int port, int rxQueue, int txQueue, int mode); -+void ethPortMcast(int port); -+void ethPortRegs(int port); -+void ethPortCounters(int port); -+void ethPortRmonCounters(int port); -+void ethRxCoal(int port, int usec); -+void ethTxCoal(int port, int usec); -+ -+void ethRegs(int port); -+void ethClearCounters(int port); -+void ethUcastSet(int port, char* macStr, int queue); -+void ethPortUcastShow(int port); -+ -+#ifdef CONFIG_MV_ETH_HEADER -+void run_com_header(const char *buffer); -+#endif -+ -+#ifdef INCLUDE_MULTI_QUEUE -+void ethRxPolMode(int port, MV_ETH_PRIO_MODE prioMode); -+void ethRxPolQ(int port, int queue, int quota); -+void ethRxPolicy(int port); -+void ethTxPolDef(int port, int txQ, char* headerHexStr); -+void ethTxPolDA(int port, char* macStr, int txQ, char* headerHexStr); -+void ethTxPolicy(int port); -+#endif /* INCLUDE_MULTI_QUEUE */ -+ -+#if (MV_ETH_VERSION >= 4) -+void ethEjpModeSet(int port, int mode) -+#endif -+#endif /* 0 */ -+ -+ -+ -+ -+void ethRxCoal(int port, int usec); -+void ethTxCoal(int port, int usec); -+#if (MV_ETH_VERSION >= 4) -+void ethEjpModeSet(int port, int mode); -+#endif /* (MV_ETH_VERSION >= 4) */ -+ -+void ethBpduRxQ(int port, int bpduQueue); -+void ethArpRxQ(int port, int arpQueue); -+void ethTcpRxQ(int port, int tcpQueue); -+void ethUdpRxQ(int port, int udpQueue); -+void ethTxPolicyRegs(int port); -+void ethPortRegs(int port); -+void ethRegs(int port); -+void ethClearCounters(int port); -+void ethPortCounters(int port); -+void ethPortRmonCounters(int port); -+void ethPortStatus(int port); -+void ethPortQueues(int port, int rxQueue, int txQueue, int mode); -+void ethUcastSet(int port, char* macStr, int queue); -+void ethPortUcastShow(int port); -+void ethMcastAdd(int port, char* macStr, int queue); -+void ethPortMcast(int port); -+void mvEthPortShow(void* pHndl); -+void mvEthQueuesShow(void* pHndl, int rxQueue, int txQueue, int mode); -+ -+#endif -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthGbe.h b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthGbe.h -new file mode 100644 -index 0000000..83ad6ad ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthGbe.h -@@ -0,0 +1,751 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+/******************************************************************************* -+* mvEth.h - Header File for : Marvell Gigabit Ethernet Controller -+* -+* DESCRIPTION: -+* This header file contains macros typedefs and function declaration specific to -+* the Marvell Gigabit Ethernet Controller. -+* -+* DEPENDENCIES: -+* None. -+* -+*******************************************************************************/ -+ -+#ifndef __mvEthGbe_h__ -+#define __mvEthGbe_h__ -+ -+extern MV_BOOL ethDescInSram; -+extern MV_BOOL ethDescSwCoher; -+extern ETH_PORT_CTRL* ethPortCtrl[]; -+ -+static INLINE MV_ULONG ethDescVirtToPhy(ETH_QUEUE_CTRL* pQueueCtrl, MV_U8* pDesc) -+{ -+#if defined (ETH_DESCR_IN_SRAM) -+ if( ethDescInSram ) -+ return mvSramVirtToPhy(pDesc); -+ else -+#endif /* ETH_DESCR_IN_SRAM */ -+ return (pQueueCtrl->descBuf.bufPhysAddr + (pDesc - pQueueCtrl->descBuf.bufVirtPtr)); -+} -+/* Return port handler */ -+#define mvEthPortHndlGet(port) ethPortCtrl[port] -+ -+/* Used as WA for HW/SW race on TX */ -+static INLINE int mvEthPortTxEnable(void* pPortHndl, int queue, int max_deep) -+{ -+ int deep = 0; -+ MV_U32 txCurrReg, txEnReg; -+ ETH_TX_DESC* pTxLastDesc; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ -+ txEnReg = MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)); -+ if( (txEnReg & MV_32BIT_LE_FAST(ETH_TXQ_ENABLE_MASK)) == 0) -+ { -+ MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg; -+ return 0; -+ } -+ -+ pQueueCtrl = &pPortCtrl->txQueue[queue]; -+ pTxLastDesc = pQueueCtrl->pCurrentDescr; -+ txCurrReg = MV_REG_READ(ETH_TX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue)); -+ if(ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pTxLastDesc) == txCurrReg) -+ { -+ /* All descriptors are processed, no chance for race */ -+ return 0; -+ } -+ -+ /* Check distance betwee HW and SW location: */ -+ /* If distance between HW and SW pointers is less than max_deep descriptors */ -+ /* Race condition is possible, so wait end of TX and restart TXQ */ -+ while(deep < max_deep) -+ { -+ pTxLastDesc = TX_PREV_DESC_PTR(pTxLastDesc, pQueueCtrl); -+ if(ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pTxLastDesc) == txCurrReg) -+ { -+ int count = 0; -+ -+ while( (txEnReg & MV_32BIT_LE_FAST(ETH_TXQ_ENABLE_MASK)) != 0) -+ { -+ count++; -+ if(count > 10000) -+ { -+ mvOsPrintf("mvEthPortTxEnable: timeout - TXQ_CMD=0x%08x\n", -+ MV_REG_READ(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) ); -+ break; -+ } -+ txEnReg = MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)); -+ } -+ -+ MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg; -+ return count; -+ } -+ deep++; -+ } -+ /* Distance between HW and SW pointers is more than max_deep descriptors, */ -+ /* So NO race condition - do nothing */ -+ return -1; -+} -+ -+ -+/* defines */ -+#define ETH_CSUM_MIN_BYTE_COUNT 72 -+ -+/* Tailgate and Kirwood have only 2K TX FIFO */ -+#if (MV_ETH_VERSION == 2) || (MV_ETH_VERSION == 4) -+#define ETH_CSUM_MAX_BYTE_COUNT 1600 -+#else -+#define ETH_CSUM_MAX_BYTE_COUNT 9*1024 -+#endif /* MV_ETH_VERSION */ -+ -+#define ETH_MV_HEADER_SIZE 2 -+#define ETH_MV_TX_EN -+ -+/* An offest in Tx descriptors to store data for buffers less than 8 Bytes */ -+#define MIN_TX_BUFF_LOAD 8 -+#define TX_BUF_OFFSET_IN_DESC (ETH_TX_DESC_ALIGNED_SIZE - MIN_TX_BUFF_LOAD) -+ -+/* Default port configuration value */ -+#define PORT_CONFIG_VALUE \ -+ ETH_DEF_RX_QUEUE_MASK(0) | \ -+ ETH_DEF_RX_ARP_QUEUE_MASK(0) | \ -+ ETH_DEF_RX_TCP_QUEUE_MASK(0) | \ -+ ETH_DEF_RX_UDP_QUEUE_MASK(0) | \ -+ ETH_DEF_RX_BPDU_QUEUE_MASK(0) | \ -+ ETH_RX_CHECKSUM_WITH_PSEUDO_HDR -+ -+/* Default port extend configuration value */ -+#define PORT_CONFIG_EXTEND_VALUE 0 -+ -+#define PORT_SERIAL_CONTROL_VALUE \ -+ ETH_DISABLE_FC_AUTO_NEG_MASK | \ -+ BIT9 | \ -+ ETH_DO_NOT_FORCE_LINK_FAIL_MASK | \ -+ ETH_MAX_RX_PACKET_1552BYTE | \ -+ ETH_SET_FULL_DUPLEX_MASK -+ -+#define PORT_SERIAL_CONTROL_100MB_FORCE_VALUE \ -+ ETH_FORCE_LINK_PASS_MASK | \ -+ ETH_DISABLE_DUPLEX_AUTO_NEG_MASK | \ -+ ETH_DISABLE_FC_AUTO_NEG_MASK | \ -+ BIT9 | \ -+ ETH_DO_NOT_FORCE_LINK_FAIL_MASK | \ -+ ETH_DISABLE_SPEED_AUTO_NEG_MASK | \ -+ ETH_SET_FULL_DUPLEX_MASK | \ -+ ETH_SET_MII_SPEED_100_MASK | \ -+ ETH_MAX_RX_PACKET_1552BYTE -+ -+ -+#define PORT_SERIAL_CONTROL_1000MB_FORCE_VALUE \ -+ ETH_FORCE_LINK_PASS_MASK | \ -+ ETH_DISABLE_DUPLEX_AUTO_NEG_MASK | \ -+ ETH_DISABLE_FC_AUTO_NEG_MASK | \ -+ BIT9 | \ -+ ETH_DO_NOT_FORCE_LINK_FAIL_MASK | \ -+ ETH_DISABLE_SPEED_AUTO_NEG_MASK | \ -+ ETH_SET_FULL_DUPLEX_MASK | \ -+ ETH_SET_GMII_SPEED_1000_MASK | \ -+ ETH_MAX_RX_PACKET_1552BYTE -+ -+#define PORT_SERIAL_CONTROL_SGMII_IBAN_VALUE \ -+ ETH_DISABLE_FC_AUTO_NEG_MASK | \ -+ BIT9 | \ -+ ETH_IN_BAND_AN_EN_MASK | \ -+ ETH_DO_NOT_FORCE_LINK_FAIL_MASK | \ -+ ETH_MAX_RX_PACKET_1552BYTE -+ -+/* Function headers: */ -+MV_VOID mvEthSetSpecialMcastTable(int portNo, int queue); -+MV_STATUS mvEthArpRxQueue(void* pPortHandle, int arpQueue); -+MV_STATUS mvEthUdpRxQueue(void* pPortHandle, int udpQueue); -+MV_STATUS mvEthTcpRxQueue(void* pPortHandle, int tcpQueue); -+MV_STATUS mvEthMacAddrGet(int portNo, unsigned char *pAddr); -+MV_VOID mvEthSetOtherMcastTable(int portNo, int queue); -+MV_STATUS mvEthHeaderModeSet(void* pPortHandle, MV_ETH_HEADER_MODE headerMode); -+/* Interrupt Coalesting functions */ -+MV_U32 mvEthRxCoalSet(void* pPortHndl, MV_U32 uSec); -+MV_U32 mvEthTxCoalSet(void* pPortHndl, MV_U32 uSec); -+MV_STATUS mvEthCoalGet(void* pPortHndl, MV_U32* pRxCoal, MV_U32* pTxCoal); -+ -+/******************************************************************************/ -+/* Data Flow functions */ -+/******************************************************************************/ -+static INLINE void mvEthPortTxRestart(void* pPortHndl) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ -+ MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg; -+} -+ -+/* Get number of Free resources in specific TX queue */ -+static INLINE int mvEthTxResourceGet(void* pPortHndl, int txQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ -+ return (pPortCtrl->txQueue[txQueue].resource); -+} -+ -+/* Get number of Free resources in specific RX queue */ -+static INLINE int mvEthRxResourceGet(void* pPortHndl, int rxQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ -+ return (pPortCtrl->rxQueue[rxQueue].resource); -+} -+ -+static INLINE int mvEthTxQueueIsFull(void* pPortHndl, int txQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ -+ if(pPortCtrl->txQueue[txQueue].resource == 0) -+ return MV_TRUE; -+ -+ return MV_FALSE; -+} -+ -+/* Get number of Free resources in specific RX queue */ -+static INLINE int mvEthRxQueueIsFull(void* pPortHndl, int rxQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->rxQueue[rxQueue]; -+ -+ if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) && -+ (pQueueCtrl->resource != 0) ) -+ return MV_TRUE; -+ -+ return MV_FALSE; -+} -+ -+static INLINE int mvEthTxQueueIsEmpty(void* pPortHndl, int txQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->txQueue[txQueue]; -+ -+ if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) && -+ (pQueueCtrl->resource != 0) ) -+ { -+ return MV_TRUE; -+ } -+ return MV_FALSE; -+} -+ -+/* Get number of Free resources in specific RX queue */ -+static INLINE int mvEthRxQueueIsEmpty(void* pPortHndl, int rxQueue) -+{ -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl; -+ -+ if(pPortCtrl->rxQueue[rxQueue].resource == 0) -+ return MV_TRUE; -+ -+ return MV_FALSE; -+} -+ -+/******************************************************************************* -+* mvEthPortTx - Send an Ethernet packet -+* -+* DESCRIPTION: -+* This routine send a given packet described by pPktInfo parameter. -+* Single buffer only. -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet Port handler. -+* int txQueue - Number of Tx queue. -+* MV_PKT_INFO *pPktInfo - User packet to send. -+* -+* RETURN: -+* MV_NO_RESOURCE - No enough resources to send this packet. -+* MV_ERROR - Unexpected Fatal error. -+* MV_OK - Packet send successfully. -+* -+*******************************************************************************/ -+static INLINE MV_STATUS mvEthPortTx(void* pEthPortHndl, int txQueue, MV_PKT_INFO* pPktInfo) -+{ -+ ETH_TX_DESC* pTxCurrDesc; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ int portNo; -+ MV_BUF_INFO* pBufInfo = pPktInfo->pFrags; -+ -+#ifdef ETH_DEBUG -+ if(pPortCtrl->portState != MV_ACTIVE) -+ return MV_BAD_STATE; -+#endif /* ETH_DEBUG */ -+ -+ portNo = pPortCtrl->portNo; -+ pQueueCtrl = &pPortCtrl->txQueue[txQueue]; -+ -+ /* Get the Tx Desc ring indexes */ -+ pTxCurrDesc = pQueueCtrl->pCurrentDescr; -+ -+ /* Check if there is enough resources to send the packet */ -+ if(pQueueCtrl->resource == 0) -+ return MV_NO_RESOURCE; -+ -+ pTxCurrDesc->byteCnt = pBufInfo->dataSize; -+ -+ /* Flash Buffer */ -+ if(pPktInfo->pktSize != 0) -+ { -+#ifdef MV_NETBSD -+ pTxCurrDesc->bufPtr = pBufInfo->bufPhysAddr; -+ ETH_PACKET_CACHE_FLUSH(pBufInfo->bufVirtPtr, pPktInfo->pktSize); -+#else -+ pTxCurrDesc->bufPtr = ETH_PACKET_CACHE_FLUSH(pBufInfo->bufVirtPtr, pPktInfo->pktSize); -+#endif -+ pPktInfo->pktSize = 0; -+ } -+ else -+ pTxCurrDesc->bufPtr = pBufInfo->bufPhysAddr; -+ -+ pTxCurrDesc->returnInfo = (MV_ULONG)pPktInfo; -+ -+ /* There is only one buffer in the packet */ -+ /* The OSG might set some bits for checksum offload, so add them to first descriptor */ -+ pTxCurrDesc->cmdSts = pPktInfo->status | -+ ETH_BUFFER_OWNED_BY_DMA | -+ ETH_TX_GENERATE_CRC_MASK | -+ ETH_TX_ENABLE_INTERRUPT_MASK | -+ ETH_TX_ZERO_PADDING_MASK | -+ ETH_TX_FIRST_DESC_MASK | -+ ETH_TX_LAST_DESC_MASK; -+ -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc); -+ -+ pQueueCtrl->resource--; -+ pQueueCtrl->pCurrentDescr = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl); -+ -+ /* Apply send command */ -+ MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(portNo)) = pPortCtrl->portTxQueueCmdReg; -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvEthPortSgTx - Send an Ethernet packet -+* -+* DESCRIPTION: -+* This routine send a given packet described by pBufInfo parameter. It -+* supports transmitting of a packet spaned over multiple buffers. -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet Port handler. -+* int txQueue - Number of Tx queue. -+* MV_PKT_INFO *pPktInfo - User packet to send. -+* -+* RETURN: -+* MV_NO_RESOURCE - No enough resources to send this packet. -+* MV_ERROR - Unexpected Fatal error. -+* MV_OK - Packet send successfully. -+* -+*******************************************************************************/ -+static INLINE MV_STATUS mvEthPortSgTx(void* pEthPortHndl, int txQueue, MV_PKT_INFO* pPktInfo) -+{ -+ ETH_TX_DESC* pTxFirstDesc; -+ ETH_TX_DESC* pTxCurrDesc; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ int portNo, bufCount; -+ MV_BUF_INFO* pBufInfo = pPktInfo->pFrags; -+ MV_U8* pTxBuf; -+ -+#ifdef ETH_DEBUG -+ if(pPortCtrl->portState != MV_ACTIVE) -+ return MV_BAD_STATE; -+#endif /* ETH_DEBUG */ -+ -+ portNo = pPortCtrl->portNo; -+ pQueueCtrl = &pPortCtrl->txQueue[txQueue]; -+ -+ /* Get the Tx Desc ring indexes */ -+ pTxCurrDesc = pQueueCtrl->pCurrentDescr; -+ -+ /* Check if there is enough resources to send the packet */ -+ if(pQueueCtrl->resource < pPktInfo->numFrags) -+ return MV_NO_RESOURCE; -+ -+ /* Remember first desc */ -+ pTxFirstDesc = pTxCurrDesc; -+ -+ bufCount = 0; -+ while(MV_TRUE) -+ { -+ if(pBufInfo[bufCount].dataSize <= MIN_TX_BUFF_LOAD) -+ { -+ /* Buffers with a payload smaller than MIN_TX_BUFF_LOAD (8 bytes) must be aligned */ -+ /* to 64-bit boundary. Two options here: */ -+ /* 1) Usually, copy the payload to the reserved 8 bytes inside descriptor. */ -+ /* 2) In the Half duplex workaround, the reserved 8 bytes inside descriptor are used */ -+ /* as a pointer to the aligned buffer, copy the small payload to this buffer. */ -+ pTxBuf = ((MV_U8*)pTxCurrDesc)+TX_BUF_OFFSET_IN_DESC; -+ mvOsBCopy(pBufInfo[bufCount].bufVirtPtr, pTxBuf, pBufInfo[bufCount].dataSize); -+ pTxCurrDesc->bufPtr = ethDescVirtToPhy(pQueueCtrl, pTxBuf); -+ } -+ else -+ { -+ /* Flash Buffer */ -+#ifdef MV_NETBSD -+ pTxCurrDesc->bufPtr = pBufInfo[bufCount].bufPhysAddr; -+ ETH_PACKET_CACHE_FLUSH(pBufInfo[bufCount].bufVirtPtr, pBufInfo[bufCount].dataSize); -+#else -+ pTxCurrDesc->bufPtr = ETH_PACKET_CACHE_FLUSH(pBufInfo[bufCount].bufVirtPtr, pBufInfo[bufCount].dataSize); -+#endif -+ } -+ -+ pTxCurrDesc->byteCnt = pBufInfo[bufCount].dataSize; -+ bufCount++; -+ -+ if(bufCount >= pPktInfo->numFrags) -+ break; -+ -+ if(bufCount > 1) -+ { -+ /* There is middle buffer of the packet Not First and Not Last */ -+ pTxCurrDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA; -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc); -+ } -+ /* Go to next descriptor and next buffer */ -+ pTxCurrDesc = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl); -+ } -+ /* Set last desc with DMA ownership and interrupt enable. */ -+ pTxCurrDesc->returnInfo = (MV_ULONG)pPktInfo; -+ if(bufCount == 1) -+ { -+ /* There is only one buffer in the packet */ -+ /* The OSG might set some bits for checksum offload, so add them to first descriptor */ -+ pTxCurrDesc->cmdSts = pPktInfo->status | -+ ETH_BUFFER_OWNED_BY_DMA | -+ ETH_TX_GENERATE_CRC_MASK | -+ ETH_TX_ENABLE_INTERRUPT_MASK | -+ ETH_TX_ZERO_PADDING_MASK | -+ ETH_TX_FIRST_DESC_MASK | -+ ETH_TX_LAST_DESC_MASK; -+ -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc); -+ } -+ else -+ { -+ /* Last but not First */ -+ pTxCurrDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA | -+ ETH_TX_ENABLE_INTERRUPT_MASK | -+ ETH_TX_ZERO_PADDING_MASK | -+ ETH_TX_LAST_DESC_MASK; -+ -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc); -+ -+ /* Update First when more than one buffer in the packet */ -+ /* The OSG might set some bits for checksum offload, so add them to first descriptor */ -+ pTxFirstDesc->cmdSts = pPktInfo->status | -+ ETH_BUFFER_OWNED_BY_DMA | -+ ETH_TX_GENERATE_CRC_MASK | -+ ETH_TX_FIRST_DESC_MASK; -+ -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pTxFirstDesc); -+ } -+ /* Update txQueue state */ -+ pQueueCtrl->resource -= bufCount; -+ pQueueCtrl->pCurrentDescr = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl); -+ -+ /* Apply send command */ -+ MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(portNo)) = pPortCtrl->portTxQueueCmdReg; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvEthPortTxDone - Free all used Tx descriptors and mBlks. -+* -+* DESCRIPTION: -+* This routine returns the transmitted packet information to the caller. -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet Port handler. -+* int txQueue - Number of Tx queue. -+* -+* OUTPUT: -+* MV_PKT_INFO *pPktInfo - Pointer to packet was sent. -+* -+* RETURN: -+* MV_NOT_FOUND - No transmitted packets to return. Transmit in progress. -+* MV_EMPTY - No transmitted packets to return. TX Queue is empty. -+* MV_ERROR - Unexpected Fatal error. -+* MV_OK - There is transmitted packet in the queue, -+* 'pPktInfo' filled with relevant information. -+* -+*******************************************************************************/ -+static INLINE MV_PKT_INFO* mvEthPortTxDone(void* pEthPortHndl, int txQueue) -+{ -+ ETH_TX_DESC* pTxCurrDesc; -+ ETH_TX_DESC* pTxUsedDesc; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ MV_PKT_INFO* pPktInfo; -+ MV_U32 commandStatus; -+ -+ pQueueCtrl = &pPortCtrl->txQueue[txQueue]; -+ -+ pTxUsedDesc = pQueueCtrl->pUsedDescr; -+ pTxCurrDesc = pQueueCtrl->pCurrentDescr; -+ -+ while(MV_TRUE) -+ { -+ /* No more used descriptors */ -+ commandStatus = pTxUsedDesc->cmdSts; -+ if (commandStatus & (ETH_BUFFER_OWNED_BY_DMA)) -+ { -+ ETH_DESCR_INV(pPortCtrl, pTxUsedDesc); -+ return NULL; -+ } -+ if( (pTxUsedDesc == pTxCurrDesc) && -+ (pQueueCtrl->resource != 0) ) -+ { -+ return NULL; -+ } -+ pQueueCtrl->resource++; -+ pQueueCtrl->pUsedDescr = TX_NEXT_DESC_PTR(pTxUsedDesc, pQueueCtrl); -+ if(commandStatus & (ETH_TX_LAST_DESC_MASK)) -+ { -+ pPktInfo = (MV_PKT_INFO*)pTxUsedDesc->returnInfo; -+ pPktInfo->status = commandStatus; -+ return pPktInfo; -+ } -+ pTxUsedDesc = pQueueCtrl->pUsedDescr; -+ } -+} -+ -+/******************************************************************************* -+* mvEthPortRx - Get new received packets from Rx queue. -+* -+* DESCRIPTION: -+* This routine returns the received data to the caller. There is no -+* data copying during routine operation. All information is returned -+* using pointer to packet information struct passed from the caller. -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet Port handler. -+* int rxQueue - Number of Rx queue. -+* -+* OUTPUT: -+* MV_PKT_INFO *pPktInfo - Pointer to received packet. -+* -+* RETURN: -+* MV_NO_RESOURCE - No free resources in RX queue. -+* MV_ERROR - Unexpected Fatal error. -+* MV_OK - New packet received and 'pBufInfo' structure filled -+* with relevant information. -+* -+*******************************************************************************/ -+static INLINE MV_PKT_INFO* mvEthPortRx(void* pEthPortHndl, int rxQueue) -+{ -+ ETH_RX_DESC *pRxCurrDesc; -+ MV_U32 commandStatus; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ MV_PKT_INFO* pPktInfo; -+ -+ pQueueCtrl = &(pPortCtrl->rxQueue[rxQueue]); -+ -+ /* Check resources */ -+ if(pQueueCtrl->resource == 0) -+ { -+ mvOsPrintf("ethPortRx: no more resources\n"); -+ return NULL; -+ } -+ while(MV_TRUE) -+ { -+ /* Get the Rx Desc ring 'curr and 'used' indexes */ -+ pRxCurrDesc = pQueueCtrl->pCurrentDescr; -+ -+ commandStatus = pRxCurrDesc->cmdSts; -+ if (commandStatus & (ETH_BUFFER_OWNED_BY_DMA)) -+ { -+ /* Nothing to receive... */ -+ ETH_DESCR_INV(pPortCtrl, pRxCurrDesc); -+ return NULL; -+ } -+ -+ /* Valid RX only if FIRST and LAST bits are set */ -+ if( (commandStatus & (ETH_RX_LAST_DESC_MASK | ETH_RX_FIRST_DESC_MASK)) == -+ (ETH_RX_LAST_DESC_MASK | ETH_RX_FIRST_DESC_MASK) ) -+ { -+ pPktInfo = (MV_PKT_INFO*)pRxCurrDesc->returnInfo; -+ pPktInfo->pFrags->dataSize = pRxCurrDesc->byteCnt - 4; -+ pPktInfo->status = commandStatus; -+ pPktInfo->fragIP = pRxCurrDesc->bufSize & ETH_RX_IP_FRAGMENTED_FRAME_MASK; -+ -+ pQueueCtrl->resource--; -+ /* Update 'curr' in data structure */ -+ pQueueCtrl->pCurrentDescr = RX_NEXT_DESC_PTR(pRxCurrDesc, pQueueCtrl); -+ -+#ifdef INCLUDE_SYNC_BARR -+ mvCpuIfSyncBarr(DRAM_TARGET); -+#endif -+ return pPktInfo; -+ } -+ else -+ { -+ ETH_RX_DESC* pRxUsedDesc = pQueueCtrl->pUsedDescr; -+ -+#ifdef ETH_DEBUG -+ mvOsPrintf("ethDrv: Unexpected Jumbo frame: " -+ "status=0x%08x, byteCnt=%d, pData=0x%x\n", -+ commandStatus, pRxCurrDesc->byteCnt, pRxCurrDesc->bufPtr); -+#endif /* ETH_DEBUG */ -+ -+ /* move buffer from pCurrentDescr position to pUsedDescr position */ -+ pRxUsedDesc->bufPtr = pRxCurrDesc->bufPtr; -+ pRxUsedDesc->returnInfo = pRxCurrDesc->returnInfo; -+ pRxUsedDesc->bufSize = pRxCurrDesc->bufSize & ETH_RX_BUFFER_MASK; -+ -+ /* Return the descriptor to DMA ownership */ -+ pRxUsedDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA | -+ ETH_RX_ENABLE_INTERRUPT_MASK; -+ -+ /* Flush descriptor and CPU pipe */ -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pRxUsedDesc); -+ -+ /* Move the used descriptor pointer to the next descriptor */ -+ pQueueCtrl->pUsedDescr = RX_NEXT_DESC_PTR(pRxUsedDesc, pQueueCtrl); -+ pQueueCtrl->pCurrentDescr = RX_NEXT_DESC_PTR(pRxCurrDesc, pQueueCtrl); -+ } -+ } -+} -+ -+/******************************************************************************* -+* mvEthPortRxDone - Returns a Rx buffer back to the Rx ring. -+* -+* DESCRIPTION: -+* This routine returns a Rx buffer back to the Rx ring. -+* -+* INPUT: -+* void* pEthPortHndl - Ethernet Port handler. -+* int rxQueue - Number of Rx queue. -+* MV_PKT_INFO *pPktInfo - Pointer to received packet. -+* -+* RETURN: -+* MV_ERROR - Unexpected Fatal error. -+* MV_OUT_OF_RANGE - RX queue is already FULL, so this buffer can't be -+* returned to this queue. -+* MV_FULL - Buffer returned successfully and RX queue became full. -+* More buffers should not be returned at the time. -+* MV_OK - Buffer returned successfully and there are more free -+* places in the queue. -+* -+*******************************************************************************/ -+static INLINE MV_STATUS mvEthPortRxDone(void* pEthPortHndl, int rxQueue, MV_PKT_INFO *pPktInfo) -+{ -+ ETH_RX_DESC* pRxUsedDesc; -+ ETH_QUEUE_CTRL* pQueueCtrl; -+ ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl; -+ -+ pQueueCtrl = &pPortCtrl->rxQueue[rxQueue]; -+ -+ /* Get 'used' Rx descriptor */ -+ pRxUsedDesc = pQueueCtrl->pUsedDescr; -+ -+ /* Check that ring is not FULL */ -+ if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) && -+ (pQueueCtrl->resource != 0) ) -+ { -+ mvOsPrintf("%s %d: out of range Error resource=%d, curr=%p, used=%p\n", -+ __FUNCTION__, pPortCtrl->portNo, pQueueCtrl->resource, -+ pQueueCtrl->pCurrentDescr, pQueueCtrl->pUsedDescr); -+ return MV_OUT_OF_RANGE; -+ } -+ -+ pRxUsedDesc->bufPtr = pPktInfo->pFrags->bufPhysAddr; -+ pRxUsedDesc->returnInfo = (MV_ULONG)pPktInfo; -+ pRxUsedDesc->bufSize = pPktInfo->pFrags->bufSize & ETH_RX_BUFFER_MASK; -+ -+ /* Invalidate data buffer accordingly with pktSize */ -+ if(pPktInfo->pktSize != 0) -+ { -+ ETH_PACKET_CACHE_INVALIDATE(pPktInfo->pFrags->bufVirtPtr, pPktInfo->pktSize); -+ pPktInfo->pktSize = 0; -+ } -+ -+ /* Return the descriptor to DMA ownership */ -+ pRxUsedDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT_MASK; -+ -+ /* Flush descriptor and CPU pipe */ -+ ETH_DESCR_FLUSH_INV(pPortCtrl, pRxUsedDesc); -+ -+ pQueueCtrl->resource++; -+ -+ /* Move the used descriptor pointer to the next descriptor */ -+ pQueueCtrl->pUsedDescr = RX_NEXT_DESC_PTR(pRxUsedDesc, pQueueCtrl); -+ -+ /* If ring became Full return MV_FULL */ -+ if(pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) -+ return MV_FULL; -+ -+ return MV_OK; -+} -+ -+ -+#endif /* __mvEthGbe_h__ */ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthRegs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthRegs.h -new file mode 100644 -index 0000000..0f57ee7 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/mvEthRegs.h -@@ -0,0 +1,700 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCmvEthRegsh -+#define __INCmvEthRegsh -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+ -+/****************************************/ -+/* Ethernet Unit Registers */ -+/****************************************/ -+#define ETH_REG_BASE MV_ETH_REG_BASE -+ -+#define ETH_PHY_ADDR_REG(port) (ETH_REG_BASE(port) + 0x000) -+#define ETH_SMI_REG(port) (ETH_REG_BASE(port) + 0x004) -+#define ETH_UNIT_DEF_ADDR_REG(port) (ETH_REG_BASE(port) + 0x008) -+#define ETH_UNIT_DEF_ID_REG(port) (ETH_REG_BASE(port) + 0x00c) -+#define ETH_UNIT_RESERVED(port) (ETH_REG_BASE(port) + 0x014) -+#define ETH_UNIT_INTR_CAUSE_REG(port) (ETH_REG_BASE(port) + 0x080) -+#define ETH_UNIT_INTR_MASK_REG(port) (ETH_REG_BASE(port) + 0x084) -+ -+ -+#define ETH_UNIT_ERROR_ADDR_REG(port) (ETH_REG_BASE(port) + 0x094) -+#define ETH_UNIT_INT_ADDR_ERROR_REG(port) (ETH_REG_BASE(port) + 0x098) -+#define ETH_UNIT_CONTROL_REG(port) (ETH_REG_BASE(port) + 0x0B0) -+ -+#define ETH_PORT_CONFIG_REG(port) (ETH_REG_BASE(port) + 0x400) -+#define ETH_PORT_CONFIG_EXTEND_REG(port) (ETH_REG_BASE(port) + 0x404) -+#define ETH_MII_SERIAL_PARAM_REG(port) (ETH_REG_BASE(port) + 0x408) -+#define ETH_GMII_SERIAL_PARAM_REG(port) (ETH_REG_BASE(port) + 0x40c) -+#define ETH_VLAN_ETHER_TYPE_REG(port) (ETH_REG_BASE(port) + 0x410) -+#define ETH_MAC_ADDR_LOW_REG(port) (ETH_REG_BASE(port) + 0x414) -+#define ETH_MAC_ADDR_HIGH_REG(port) (ETH_REG_BASE(port) + 0x418) -+#define ETH_SDMA_CONFIG_REG(port) (ETH_REG_BASE(port) + 0x41c) -+#define ETH_DIFF_SERV_PRIO_REG(port, code) (ETH_REG_BASE(port) + 0x420 + ((code)<<2)) -+#define ETH_PORT_SERIAL_CTRL_REG(port) (ETH_REG_BASE(port) + 0x43c) -+#define ETH_VLAN_TAG_TO_PRIO_REG(port) (ETH_REG_BASE(port) + 0x440) -+#define ETH_PORT_STATUS_REG(port) (ETH_REG_BASE(port) + 0x444) -+ -+#define ETH_RX_QUEUE_COMMAND_REG(port) (ETH_REG_BASE(port) + 0x680) -+#define ETH_TX_QUEUE_COMMAND_REG(port) (ETH_REG_BASE(port) + 0x448) -+ -+#define ETH_PORT_SERIAL_CTRL_1_REG(port) (ETH_REG_BASE(port) + 0x44c) -+#define ETH_PORT_STATUS_1_REG(port) (ETH_REG_BASE(port) + 0x450) -+#define ETH_PORT_MARVELL_HEADER_REG(port) (ETH_REG_BASE(port) + 0x454) -+#define ETH_PORT_FIFO_PARAMS_REG(port) (ETH_REG_BASE(port) + 0x458) -+#define ETH_MAX_TOKEN_BUCKET_SIZE_REG(port) (ETH_REG_BASE(port) + 0x45c) -+#define ETH_INTR_CAUSE_REG(port) (ETH_REG_BASE(port) + 0x460) -+#define ETH_INTR_CAUSE_EXT_REG(port) (ETH_REG_BASE(port) + 0x464) -+#define ETH_INTR_MASK_REG(port) (ETH_REG_BASE(port) + 0x468) -+#define ETH_INTR_MASK_EXT_REG(port) (ETH_REG_BASE(port) + 0x46c) -+#define ETH_TX_FIFO_URGENT_THRESH_REG(port) (ETH_REG_BASE(port) + 0x474) -+#define ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (ETH_REG_BASE(port) + 0x47c) -+#define ETH_RX_DISCARD_PKTS_CNTR_REG(port) (ETH_REG_BASE(port) + 0x484) -+#define ETH_RX_OVERRUN_PKTS_CNTR_REG(port) (ETH_REG_BASE(port) + 0x488) -+#define ETH_INTERNAL_ADDR_ERROR_REG(port) (ETH_REG_BASE(port) + 0x494) -+#define ETH_TX_FIXED_PRIO_CFG_REG(port) (ETH_REG_BASE(port) + 0x4dc) -+#define ETH_TX_TOKEN_RATE_CFG_REG(port) (ETH_REG_BASE(port) + 0x4e0) -+#define ETH_TX_QUEUE_COMMAND1_REG(port) (ETH_REG_BASE(port) + 0x4e4) -+#define ETH_MAX_TRANSMIT_UNIT_REG(port) (ETH_REG_BASE(port) + 0x4e8) -+#define ETH_TX_TOKEN_BUCKET_SIZE_REG(port) (ETH_REG_BASE(port) + 0x4ec) -+#define ETH_TX_TOKEN_BUCKET_COUNT_REG(port) (ETH_REG_BASE(port) + 0x780) -+#define ETH_RX_DESCR_STAT_CMD_REG(port, q) (ETH_REG_BASE(port) + 0x600 + ((q)<<4)) -+#define ETH_RX_BYTE_COUNT_REG(port, q) (ETH_REG_BASE(port) + 0x604 + ((q)<<4)) -+#define ETH_RX_BUF_PTR_REG(port, q) (ETH_REG_BASE(port) + 0x608 + ((q)<<4)) -+#define ETH_RX_CUR_DESC_PTR_REG(port, q) (ETH_REG_BASE(port) + 0x60c + ((q)<<4)) -+#define ETH_TX_CUR_DESC_PTR_REG(port, q) (ETH_REG_BASE(port) + 0x6c0 + ((q)<<2)) -+ -+#define ETH_TXQ_TOKEN_COUNT_REG(port, q) (ETH_REG_BASE(port) + 0x700 + ((q)<<4)) -+#define ETH_TXQ_TOKEN_CFG_REG(port, q) (ETH_REG_BASE(port) + 0x704 + ((q)<<4)) -+#define ETH_TXQ_ARBITER_CFG_REG(port, q) (ETH_REG_BASE(port) + 0x708 + ((q)<<4)) -+ -+#if (MV_ETH_VERSION >= 4) -+#define ETH_TXQ_CMD_1_REG(port) (ETH_REG_BASE(port) + 0x4E4) -+#define ETH_EJP_TX_HI_IPG_REG(port) (ETH_REG_BASE(port) + 0x7A8) -+#define ETH_EJP_TX_LO_IPG_REG(port) (ETH_REG_BASE(port) + 0x7B8) -+#define ETH_EJP_HI_TKN_LO_PKT_REG(port) (ETH_REG_BASE(port) + 0x7C0) -+#define ETH_EJP_HI_TKN_ASYNC_PKT_REG(port) (ETH_REG_BASE(port) + 0x7C4) -+#define ETH_EJP_LO_TKN_ASYNC_PKT_REG(port) (ETH_REG_BASE(port) + 0x7C8) -+#define ETH_EJP_TX_SPEED_REG(port) (ETH_REG_BASE(port) + 0x7D0) -+#endif /* MV_ETH_VERSION >= 4 */ -+ -+#define ETH_MIB_COUNTERS_BASE(port) (ETH_REG_BASE(port) + 0x1000) -+#define ETH_DA_FILTER_SPEC_MCAST_BASE(port) (ETH_REG_BASE(port) + 0x1400) -+#define ETH_DA_FILTER_OTH_MCAST_BASE(port) (ETH_REG_BASE(port) + 0x1500) -+#define ETH_DA_FILTER_UCAST_BASE(port) (ETH_REG_BASE(port) + 0x1600) -+ -+/* Phy address register definitions */ -+#define ETH_PHY_ADDR_OFFS 0 -+#define ETH_PHY_ADDR_MASK (0x1f <<ETH_PHY_ADDR_OFFS) -+ -+/* MIB Counters register definitions */ -+#define ETH_MIB_GOOD_OCTETS_RECEIVED_LOW 0x0 -+#define ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH 0x4 -+#define ETH_MIB_BAD_OCTETS_RECEIVED 0x8 -+#define ETH_MIB_INTERNAL_MAC_TRANSMIT_ERR 0xc -+#define ETH_MIB_GOOD_FRAMES_RECEIVED 0x10 -+#define ETH_MIB_BAD_FRAMES_RECEIVED 0x14 -+#define ETH_MIB_BROADCAST_FRAMES_RECEIVED 0x18 -+#define ETH_MIB_MULTICAST_FRAMES_RECEIVED 0x1c -+#define ETH_MIB_FRAMES_64_OCTETS 0x20 -+#define ETH_MIB_FRAMES_65_TO_127_OCTETS 0x24 -+#define ETH_MIB_FRAMES_128_TO_255_OCTETS 0x28 -+#define ETH_MIB_FRAMES_256_TO_511_OCTETS 0x2c -+#define ETH_MIB_FRAMES_512_TO_1023_OCTETS 0x30 -+#define ETH_MIB_FRAMES_1024_TO_MAX_OCTETS 0x34 -+#define ETH_MIB_GOOD_OCTETS_SENT_LOW 0x38 -+#define ETH_MIB_GOOD_OCTETS_SENT_HIGH 0x3c -+#define ETH_MIB_GOOD_FRAMES_SENT 0x40 -+#define ETH_MIB_EXCESSIVE_COLLISION 0x44 -+#define ETH_MIB_MULTICAST_FRAMES_SENT 0x48 -+#define ETH_MIB_BROADCAST_FRAMES_SENT 0x4c -+#define ETH_MIB_UNREC_MAC_CONTROL_RECEIVED 0x50 -+#define ETH_MIB_FC_SENT 0x54 -+#define ETH_MIB_GOOD_FC_RECEIVED 0x58 -+#define ETH_MIB_BAD_FC_RECEIVED 0x5c -+#define ETH_MIB_UNDERSIZE_RECEIVED 0x60 -+#define ETH_MIB_FRAGMENTS_RECEIVED 0x64 -+#define ETH_MIB_OVERSIZE_RECEIVED 0x68 -+#define ETH_MIB_JABBER_RECEIVED 0x6c -+#define ETH_MIB_MAC_RECEIVE_ERROR 0x70 -+#define ETH_MIB_BAD_CRC_EVENT 0x74 -+#define ETH_MIB_COLLISION 0x78 -+#define ETH_MIB_LATE_COLLISION 0x7c -+ -+ -+/****************************************/ -+/* Ethernet Unit Register BITs */ -+/****************************************/ -+ -+#define ETH_RXQ_ENABLE_OFFSET 0 -+#define ETH_RXQ_ENABLE_MASK (0x000000FF << ETH_RXQ_ENABLE_OFFSET) -+ -+#define ETH_RXQ_DISABLE_OFFSET 8 -+#define ETH_RXQ_DISABLE_MASK (0x000000FF << ETH_RXQ_DISABLE_OFFSET) -+ -+/***** BITs of Transmit Queue Command (TQC) register *****/ -+#define ETH_TXQ_ENABLE_OFFSET 0 -+#define ETH_TXQ_ENABLE_MASK (0x000000FF << ETH_TXQ_ENABLE_OFFSET) -+ -+#define ETH_TXQ_DISABLE_OFFSET 8 -+#define ETH_TXQ_DISABLE_MASK (0x000000FF << ETH_TXQ_DISABLE_OFFSET) -+ -+#if (MV_ETH_VERSION >= 4) -+#define ETH_TX_EJP_RESET_BIT 0 -+#define ETH_TX_EJP_RESET_MASK (1 << ETH_TX_EJP_RESET_BIT) -+ -+#define ETH_TX_EJP_ENABLE_BIT 2 -+#define ETH_TX_EJP_ENABLE_MASK (1 << ETH_TX_EJP_ENABLE_BIT) -+ -+#define ETH_TX_LEGACY_WRR_BIT 3 -+#define ETH_TX_LEGACY_WRR_MASK (1 << ETH_TX_LEGACY_WRR_BIT) -+#endif /* (MV_ETH_VERSION >= 4) */ -+ -+/***** BITs of Ethernet Port Status reg (PSR) *****/ -+#define ETH_LINK_UP_BIT 1 -+#define ETH_LINK_UP_MASK (1<<ETH_LINK_UP_BIT) -+ -+#define ETH_FULL_DUPLEX_BIT 2 -+#define ETH_FULL_DUPLEX_MASK (1<<ETH_FULL_DUPLEX_BIT) -+ -+#define ETH_ENABLE_RCV_FLOW_CTRL_BIT 3 -+#define ETH_ENABLE_RCV_FLOW_CTRL_MASK (1<<ETH_ENABLE_RCV_FLOW_CTRL_BIT) -+ -+#define ETH_GMII_SPEED_1000_BIT 4 -+#define ETH_GMII_SPEED_1000_MASK (1<<ETH_GMII_SPEED_1000_BIT) -+ -+#define ETH_MII_SPEED_100_BIT 5 -+#define ETH_MII_SPEED_100_MASK (1<<ETH_MII_SPEED_100_BIT) -+ -+#define ETH_TX_IN_PROGRESS_BIT 7 -+#define ETH_TX_IN_PROGRESS_MASK (1<<ETH_TX_IN_PROGRESS_BIT) -+ -+#define ETH_TX_FIFO_EMPTY_BIT 10 -+#define ETH_TX_FIFO_EMPTY_MASK (1<<ETH_TX_FIFO_EMPTY_BIT) -+ -+/***** BITs of Ethernet Port Status 1 reg (PS1R) *****/ -+#define ETH_AUTO_NEG_DONE_BIT 4 -+#define ETH_AUTO_NEG_DONE_MASK (1<<ETH_AUTO_NEG_DONE_BIT) -+ -+#define ETH_SERDES_PLL_LOCKED_BIT 6 -+#define ETH_SERDES_PLL_LOCKED_MASK (1<<ETH_SERDES_PLL_LOCKED_BIT) -+ -+/***** BITs of Port Configuration reg (PxCR) *****/ -+#define ETH_UNICAST_PROMISCUOUS_MODE_BIT 0 -+#define ETH_UNICAST_PROMISCUOUS_MODE_MASK (1<<ETH_UNICAST_PROMISCUOUS_MODE_BIT) -+ -+#define ETH_DEF_RX_QUEUE_OFFSET 1 -+#define ETH_DEF_RX_QUEUE_ALL_MASK (0x7<<ETH_DEF_RX_QUEUE_OFFSET) -+#define ETH_DEF_RX_QUEUE_MASK(queue) ((queue)<<ETH_DEF_RX_QUEUE_OFFSET) -+ -+#define ETH_DEF_RX_ARP_QUEUE_OFFSET 4 -+#define ETH_DEF_RX_ARP_QUEUE_ALL_MASK (0x7<<ETH_DEF_RX_ARP_QUEUE_OFFSET) -+#define ETH_DEF_RX_ARP_QUEUE_MASK(queue) ((queue)<<ETH_DEF_RX_ARP_QUEUE_OFFSET) -+ -+#define ETH_REJECT_NOT_IP_ARP_BCAST_BIT 7 -+#define ETH_REJECT_NOT_IP_ARP_BCAST_MASK (1<<ETH_REJECT_NOT_IP_ARP_BCAST_BIT) -+ -+#define ETH_REJECT_IP_BCAST_BIT 8 -+#define ETH_REJECT_IP_BCAST_MASK (1<<ETH_REJECT_IP_BCAST_BIT) -+ -+#define ETH_REJECT_ARP_BCAST_BIT 9 -+#define ETH_REJECT_ARP_BCAST_MASK (1<<ETH_REJECT_ARP_BCAST_BIT) -+ -+#define ETH_TX_NO_SET_ERROR_SUMMARY_BIT 12 -+#define ETH_TX_NO_SET_ERROR_SUMMARY_MASK (1<<ETH_TX_NO_SET_ERROR_SUMMARY_BIT) -+ -+#define ETH_CAPTURE_TCP_FRAMES_ENABLE_BIT 14 -+#define ETH_CAPTURE_TCP_FRAMES_ENABLE_MASK (1<<ETH_CAPTURE_TCP_FRAMES_ENABLE_BIT) -+ -+#define ETH_CAPTURE_UDP_FRAMES_ENABLE_BIT 15 -+#define ETH_CAPTURE_UDP_FRAMES_ENABLE_MASK (1<<ETH_CAPTURE_UDP_FRAMES_ENABLE_BIT) -+ -+#define ETH_DEF_RX_TCP_QUEUE_OFFSET 16 -+#define ETH_DEF_RX_TCP_QUEUE_ALL_MASK (0x7<<ETH_DEF_RX_TCP_QUEUE_OFFSET) -+#define ETH_DEF_RX_TCP_QUEUE_MASK(queue) ((queue)<<ETH_DEF_RX_TCP_QUEUE_OFFSET) -+ -+#define ETH_DEF_RX_UDP_QUEUE_OFFSET 19 -+#define ETH_DEF_RX_UDP_QUEUE_ALL_MASK (0x7<<ETH_DEF_RX_UDP_QUEUE_OFFSET) -+#define ETH_DEF_RX_UDP_QUEUE_MASK(queue) ((queue)<<ETH_DEF_RX_UDP_QUEUE_OFFSET) -+ -+#define ETH_DEF_RX_BPDU_QUEUE_OFFSET 22 -+#define ETH_DEF_RX_BPDU_QUEUE_ALL_MASK (0x7<<ETH_DEF_RX_BPDU_QUEUE_OFFSET) -+#define ETH_DEF_RX_BPDU_QUEUE_MASK(queue) ((queue)<<ETH_DEF_RX_BPDU_QUEUE_OFFSET) -+ -+#define ETH_RX_CHECKSUM_MODE_OFFSET 25 -+#define ETH_RX_CHECKSUM_NO_PSEUDO_HDR (0<<ETH_RX_CHECKSUM_MODE_OFFSET) -+#define ETH_RX_CHECKSUM_WITH_PSEUDO_HDR (1<<ETH_RX_CHECKSUM_MODE_OFFSET) -+ -+/***** BITs of Port Configuration Extend reg (PxCXR) *****/ -+#define ETH_CAPTURE_SPAN_BPDU_ENABLE_BIT 1 -+#define ETH_CAPTURE_SPAN_BPDU_ENABLE_MASK (1<<ETH_CAPTURE_SPAN_BPDU_ENABLE_BIT) -+ -+#define ETH_TX_DISABLE_GEN_CRC_BIT 3 -+#define ETH_TX_DISABLE_GEN_CRC_MASK (1<<ETH_TX_DISABLE_GEN_CRC_BIT) -+ -+/***** BITs of Tx/Rx queue command reg (RQCR/TQCR) *****/ -+#define ETH_QUEUE_ENABLE_OFFSET 0 -+#define ETH_QUEUE_ENABLE_ALL_MASK (0xFF<<ETH_QUEUE_ENABLE_OFFSET) -+#define ETH_QUEUE_ENABLE_MASK(queue) (1<<((queue)+ETH_QUEUE_ENABLE_OFFSET)) -+ -+#define ETH_QUEUE_DISABLE_OFFSET 8 -+#define ETH_QUEUE_DISABLE_ALL_MASK (0xFF<<ETH_QUEUE_DISABLE_OFFSET) -+#define ETH_QUEUE_DISABLE_MASK(queue) (1<<((queue)+ETH_QUEUE_DISABLE_OFFSET)) -+ -+ -+/***** BITs of Port Sdma Configuration reg (SDCR) *****/ -+#define ETH_RX_FRAME_INTERRUPT_BIT 0 -+#define ETH_RX_FRAME_INTERRUPT_MASK (1<<ETH_RX_FRAME_INTERRUPT_BIT) -+ -+#define ETH_BURST_SIZE_1_64BIT_VALUE 0 -+#define ETH_BURST_SIZE_2_64BIT_VALUE 1 -+#define ETH_BURST_SIZE_4_64BIT_VALUE 2 -+#define ETH_BURST_SIZE_8_64BIT_VALUE 3 -+#define ETH_BURST_SIZE_16_64BIT_VALUE 4 -+ -+#define ETH_RX_BURST_SIZE_OFFSET 1 -+#define ETH_RX_BURST_SIZE_ALL_MASK (0x7<<ETH_RX_BURST_SIZE_OFFSET) -+#define ETH_RX_BURST_SIZE_MASK(burst) ((burst)<<ETH_RX_BURST_SIZE_OFFSET) -+ -+#define ETH_RX_NO_DATA_SWAP_BIT 4 -+#define ETH_RX_NO_DATA_SWAP_MASK (1<<ETH_RX_NO_DATA_SWAP_BIT) -+#define ETH_RX_DATA_SWAP_MASK (0<<ETH_RX_NO_DATA_SWAP_BIT) -+ -+#define ETH_TX_NO_DATA_SWAP_BIT 5 -+#define ETH_TX_NO_DATA_SWAP_MASK (1<<ETH_TX_NO_DATA_SWAP_BIT) -+#define ETH_TX_DATA_SWAP_MASK (0<<ETH_TX_NO_DATA_SWAP_BIT) -+ -+#define ETH_DESC_SWAP_BIT 6 -+#define ETH_DESC_SWAP_MASK (1<<ETH_DESC_SWAP_BIT) -+#define ETH_NO_DESC_SWAP_MASK (0<<ETH_DESC_SWAP_BIT) -+ -+#define ETH_RX_INTR_COAL_OFFSET 7 -+#define ETH_RX_INTR_COAL_ALL_MASK (0x3fff<<ETH_RX_INTR_COAL_OFFSET) -+#define ETH_RX_INTR_COAL_MASK(value) (((value)<<ETH_RX_INTR_COAL_OFFSET) \ -+ & ETH_RX_INTR_COAL_ALL_MASK) -+ -+#define ETH_TX_BURST_SIZE_OFFSET 22 -+#define ETH_TX_BURST_SIZE_ALL_MASK (0x7<<ETH_TX_BURST_SIZE_OFFSET) -+#define ETH_TX_BURST_SIZE_MASK(burst) ((burst)<<ETH_TX_BURST_SIZE_OFFSET) -+ -+#define ETH_RX_INTR_COAL_MSB_BIT 25 -+#define ETH_RX_INTR_COAL_MSB_MASK (1<<ETH_RX_INTR_COAL_MSB_BIT) -+ -+/* BITs Port #x Tx FIFO Urgent Threshold (PxTFUT) */ -+#define ETH_TX_INTR_COAL_OFFSET 4 -+#define ETH_TX_INTR_COAL_ALL_MASK (0x3fff << ETH_TX_INTR_COAL_OFFSET) -+#define ETH_TX_INTR_COAL_MASK(value) (((value) << ETH_TX_INTR_COAL_OFFSET) \ -+ & ETH_TX_INTR_COAL_ALL_MASK) -+ -+/* BITs of Port Serial Control reg (PSCR) */ -+#define ETH_PORT_ENABLE_BIT 0 -+#define ETH_PORT_ENABLE_MASK (1<<ETH_PORT_ENABLE_BIT) -+ -+#define ETH_FORCE_LINK_PASS_BIT 1 -+#define ETH_FORCE_LINK_PASS_MASK (1<<ETH_FORCE_LINK_PASS_BIT) -+ -+#define ETH_DISABLE_DUPLEX_AUTO_NEG_BIT 2 -+#define ETH_DISABLE_DUPLEX_AUTO_NEG_MASK (1<<ETH_DISABLE_DUPLEX_AUTO_NEG_BIT) -+ -+#define ETH_DISABLE_FC_AUTO_NEG_BIT 3 -+#define ETH_DISABLE_FC_AUTO_NEG_MASK (1<<ETH_DISABLE_FC_AUTO_NEG_BIT) -+ -+#define ETH_ADVERTISE_SYM_FC_BIT 4 -+#define ETH_ADVERTISE_SYM_FC_MASK (1<<ETH_ADVERTISE_SYM_FC_BIT) -+ -+#define ETH_TX_FC_MODE_OFFSET 5 -+#define ETH_TX_FC_MODE_MASK (3<<ETH_TX_FC_MODE_OFFSET) -+#define ETH_TX_FC_NO_PAUSE (0<<ETH_TX_FC_MODE_OFFSET) -+#define ETH_TX_FC_SEND_PAUSE (1<<ETH_TX_FC_MODE_OFFSET) -+ -+#define ETH_TX_BP_MODE_OFFSET 7 -+#define ETH_TX_BP_MODE_MASK (3<<ETH_TX_BP_MODE_OFFSET) -+#define ETH_TX_BP_NO_JAM (0<<ETH_TX_BP_MODE_OFFSET) -+#define ETH_TX_BP_SEND_JAM (1<<ETH_TX_BP_MODE_OFFSET) -+ -+#define ETH_DO_NOT_FORCE_LINK_FAIL_BIT 10 -+#define ETH_DO_NOT_FORCE_LINK_FAIL_MASK (1<<ETH_DO_NOT_FORCE_LINK_FAIL_BIT) -+ -+#define ETH_RETRANSMIT_FOREVER_BIT 11 -+#define ETH_RETRANSMIT_FOREVER_MASK (1<<ETH_RETRANSMIT_FOREVER_BIT) -+ -+#define ETH_DISABLE_SPEED_AUTO_NEG_BIT 13 -+#define ETH_DISABLE_SPEED_AUTO_NEG_MASK (1<<ETH_DISABLE_SPEED_AUTO_NEG_BIT) -+ -+#define ETH_DTE_ADVERT_BIT 14 -+#define ETH_DTE_ADVERT_MASK (1<<ETH_DTE_ADVERT_BIT) -+ -+#define ETH_MII_PHY_MODE_BIT 15 -+#define ETH_MII_PHY_MODE_MAC (0<<ETH_MII_PHY_MODE_BIT) -+#define ETH_MII_PHY_MODE_PHY (1<<ETH_MII_PHY_MODE_BIT) -+ -+#define ETH_MII_SOURCE_SYNCH_BIT 16 -+#define ETH_MII_STANDARD_SYNCH (0<<ETH_MII_SOURCE_SYNCH_BIT) -+#define ETH_MII_400Mbps_SYNCH (1<<ETH_MII_SOURCE_CLK_BIT) -+ -+#define ETH_MAX_RX_PACKET_SIZE_OFFSET 17 -+#define ETH_MAX_RX_PACKET_SIZE_MASK (7<<ETH_MAX_RX_PACKET_SIZE_OFFSET) -+#define ETH_MAX_RX_PACKET_1518BYTE (0<<ETH_MAX_RX_PACKET_SIZE_OFFSET) -+#define ETH_MAX_RX_PACKET_1522BYTE (1<<ETH_MAX_RX_PACKET_SIZE_OFFSET) -+#define ETH_MAX_RX_PACKET_1552BYTE (2<<ETH_MAX_RX_PACKET_SIZE_OFFSET) -+#define ETH_MAX_RX_PACKET_9022BYTE (3<<ETH_MAX_RX_PACKET_SIZE_OFFSET) -+#define ETH_MAX_RX_PACKET_9192BYTE (4<<ETH_MAX_RX_PACKET_SIZE_OFFSET) -+#define ETH_MAX_RX_PACKET_9700BYTE (5<<ETH_MAX_RX_PACKET_SIZE_OFFSET) -+ -+#define ETH_SET_FULL_DUPLEX_BIT 21 -+#define ETH_SET_FULL_DUPLEX_MASK (1<<ETH_SET_FULL_DUPLEX_BIT) -+ -+#define ETH_SET_FLOW_CTRL_BIT 22 -+#define ETH_SET_FLOW_CTRL_MASK (1<<ETH_SET_FLOW_CTRL_BIT) -+ -+#define ETH_SET_GMII_SPEED_1000_BIT 23 -+#define ETH_SET_GMII_SPEED_1000_MASK (1<<ETH_SET_GMII_SPEED_1000_BIT) -+ -+#define ETH_SET_MII_SPEED_100_BIT 24 -+#define ETH_SET_MII_SPEED_100_MASK (1<<ETH_SET_MII_SPEED_100_BIT) -+ -+/* BITs of Port Serial Control 1 reg (PSC1R) */ -+#define ETH_PSC_ENABLE_BIT 2 -+#define ETH_PSC_ENABLE_MASK (1<<ETH_PSC_ENABLE_BIT) -+ -+#define ETH_RGMII_ENABLE_BIT 3 -+#define ETH_RGMII_ENABLE_MASK (1<<ETH_RGMII_ENABLE_BIT) -+ -+#define ETH_PORT_RESET_BIT 4 -+#define ETH_PORT_RESET_MASK (1<<ETH_PORT_RESET_BIT) -+ -+#define ETH_INBAND_AUTO_NEG_ENABLE_BIT 6 -+#define ETH_INBAND_AUTO_NEG_ENABLE_MASK (1<<ETH_INBAND_AUTO_NEG_ENABLE_BIT) -+ -+#define ETH_INBAND_AUTO_NEG_BYPASS_BIT 7 -+#define ETH_INBAND_AUTO_NEG_BYPASS_MASK (1<<ETH_INBAND_AUTO_NEG_BYPASS_BIT) -+ -+#define ETH_INBAND_AUTO_NEG_START_BIT 8 -+#define ETH_INBAND_AUTO_NEG_START_MASK (1<<ETH_INBAND_AUTO_NEG_START_BIT) -+ -+#define ETH_PORT_TYPE_BIT 11 -+#define ETH_PORT_TYPE_1000BasedX_MASK (1<<ETH_PORT_TYPE_BIT) -+ -+#define ETH_SGMII_MODE_BIT 12 -+#define ETH_1000BaseX_MODE_MASK (0<<ETH_SGMII_MODE_BIT) -+#define ETH_SGMII_MODE_MASK (1<<ETH_SGMII_MODE_BIT) -+ -+#define ETH_MGMII_MODE_BIT 13 -+ -+#define ETH_EN_MII_ODD_PRE_BIT 22 -+#define ETH_EN_MII_ODD_PRE_MASK (1<<ETH_EN_MII_ODD_PRE_BIT) -+ -+/* BITs of SDMA Descriptor Command/Status field */ -+#if defined(MV_CPU_BE) -+typedef struct _ethRxDesc -+{ -+ MV_U16 byteCnt ; /* Descriptor buffer byte count */ -+ MV_U16 bufSize ; /* Buffer size */ -+ MV_U32 cmdSts ; /* Descriptor command status */ -+ MV_U32 nextDescPtr; /* Next descriptor pointer */ -+ MV_U32 bufPtr ; /* Descriptor buffer pointer */ -+ MV_ULONG returnInfo ; /* User resource return information */ -+} ETH_RX_DESC; -+ -+typedef struct _ethTxDesc -+{ -+ MV_U16 byteCnt ; /* Descriptor buffer byte count */ -+ MV_U16 L4iChk ; /* CPU provided TCP Checksum */ -+ MV_U32 cmdSts ; /* Descriptor command status */ -+ MV_U32 nextDescPtr; /* Next descriptor pointer */ -+ MV_U32 bufPtr ; /* Descriptor buffer pointer */ -+ MV_ULONG returnInfo ; /* User resource return information */ -+ MV_U8* alignBufPtr; /* Pointer to 8 byte aligned buffer */ -+} ETH_TX_DESC; -+ -+#elif defined(MV_CPU_LE) -+ -+typedef struct _ethRxDesc -+{ -+ MV_U32 cmdSts ; /* Descriptor command status */ -+ MV_U16 bufSize ; /* Buffer size */ -+ MV_U16 byteCnt ; /* Descriptor buffer byte count */ -+ MV_U32 bufPtr ; /* Descriptor buffer pointer */ -+ MV_U32 nextDescPtr; /* Next descriptor pointer */ -+ MV_ULONG returnInfo ; /* User resource return information */ -+} ETH_RX_DESC; -+ -+typedef struct _ethTxDesc -+{ -+ MV_U32 cmdSts ; /* Descriptor command status */ -+ MV_U16 L4iChk ; /* CPU provided TCP Checksum */ -+ MV_U16 byteCnt ; /* Descriptor buffer byte count */ -+ MV_U32 bufPtr ; /* Descriptor buffer pointer */ -+ MV_U32 nextDescPtr; /* Next descriptor pointer */ -+ MV_ULONG returnInfo ; /* User resource return information */ -+ MV_U8* alignBufPtr; /* Pointer to 32 byte aligned buffer */ -+} ETH_TX_DESC; -+ -+#else -+#error "MV_CPU_BE or MV_CPU_LE must be defined" -+#endif /* MV_CPU_BE || MV_CPU_LE */ -+ -+/* Buffer offset from buffer pointer */ -+#define ETH_RX_BUF_OFFSET 0x2 -+ -+ -+/* Tx & Rx descriptor bits */ -+#define ETH_ERROR_SUMMARY_BIT 0 -+#define ETH_ERROR_SUMMARY_MASK (1<<ETH_ERROR_SUMMARY_BIT) -+ -+#define ETH_BUFFER_OWNER_BIT 31 -+#define ETH_BUFFER_OWNED_BY_DMA (1<<ETH_BUFFER_OWNER_BIT) -+#define ETH_BUFFER_OWNED_BY_HOST (0<<ETH_BUFFER_OWNER_BIT) -+ -+/* Tx descriptor bits */ -+#define ETH_TX_ERROR_CODE_OFFSET 1 -+#define ETH_TX_ERROR_CODE_MASK (3<<ETH_TX_ERROR_CODE_OFFSET) -+#define ETH_TX_LATE_COLLISION_ERROR (0<<ETH_TX_ERROR_CODE_OFFSET) -+#define ETH_TX_UNDERRUN_ERROR (1<<ETH_TX_ERROR_CODE_OFFSET) -+#define ETH_TX_EXCESSIVE_COLLISION_ERROR (2<<ETH_TX_ERROR_CODE_OFFSET) -+ -+#define ETH_TX_LLC_SNAP_FORMAT_BIT 9 -+#define ETH_TX_LLC_SNAP_FORMAT_MASK (1<<ETH_TX_LLC_SNAP_FORMAT_BIT) -+ -+#define ETH_TX_IP_FRAG_BIT 10 -+#define ETH_TX_IP_FRAG_MASK (1<<ETH_TX_IP_FRAG_BIT) -+#define ETH_TX_IP_FRAG (0<<ETH_TX_IP_FRAG_BIT) -+#define ETH_TX_IP_NO_FRAG (1<<ETH_TX_IP_FRAG_BIT) -+ -+#define ETH_TX_IP_HEADER_LEN_OFFSET 11 -+#define ETH_TX_IP_HEADER_LEN_ALL_MASK (0xF<<ETH_TX_IP_HEADER_LEN_OFFSET) -+#define ETH_TX_IP_HEADER_LEN_MASK(len) ((len)<<ETH_TX_IP_HEADER_LEN_OFFSET) -+ -+#define ETH_TX_VLAN_TAGGED_FRAME_BIT 15 -+#define ETH_TX_VLAN_TAGGED_FRAME_MASK (1<<ETH_TX_VLAN_TAGGED_FRAME_BIT) -+ -+#define ETH_TX_L4_TYPE_BIT 16 -+#define ETH_TX_L4_TCP_TYPE (0<<ETH_TX_L4_TYPE_BIT) -+#define ETH_TX_L4_UDP_TYPE (1<<ETH_TX_L4_TYPE_BIT) -+ -+#define ETH_TX_GENERATE_L4_CHKSUM_BIT 17 -+#define ETH_TX_GENERATE_L4_CHKSUM_MASK (1<<ETH_TX_GENERATE_L4_CHKSUM_BIT) -+ -+#define ETH_TX_GENERATE_IP_CHKSUM_BIT 18 -+#define ETH_TX_GENERATE_IP_CHKSUM_MASK (1<<ETH_TX_GENERATE_IP_CHKSUM_BIT) -+ -+#define ETH_TX_ZERO_PADDING_BIT 19 -+#define ETH_TX_ZERO_PADDING_MASK (1<<ETH_TX_ZERO_PADDING_BIT) -+ -+#define ETH_TX_LAST_DESC_BIT 20 -+#define ETH_TX_LAST_DESC_MASK (1<<ETH_TX_LAST_DESC_BIT) -+ -+#define ETH_TX_FIRST_DESC_BIT 21 -+#define ETH_TX_FIRST_DESC_MASK (1<<ETH_TX_FIRST_DESC_BIT) -+ -+#define ETH_TX_GENERATE_CRC_BIT 22 -+#define ETH_TX_GENERATE_CRC_MASK (1<<ETH_TX_GENERATE_CRC_BIT) -+ -+#define ETH_TX_ENABLE_INTERRUPT_BIT 23 -+#define ETH_TX_ENABLE_INTERRUPT_MASK (1<<ETH_TX_ENABLE_INTERRUPT_BIT) -+ -+#define ETH_TX_AUTO_MODE_BIT 30 -+#define ETH_TX_AUTO_MODE_MASK (1<<ETH_TX_AUTO_MODE_BIT) -+ -+ -+/* Rx descriptor bits */ -+#define ETH_RX_ERROR_CODE_OFFSET 1 -+#define ETH_RX_ERROR_CODE_MASK (3<<ETH_RX_ERROR_CODE_OFFSET) -+#define ETH_RX_CRC_ERROR (0<<ETH_RX_ERROR_CODE_OFFSET) -+#define ETH_RX_OVERRUN_ERROR (1<<ETH_RX_ERROR_CODE_OFFSET) -+#define ETH_RX_MAX_FRAME_LEN_ERROR (2<<ETH_RX_ERROR_CODE_OFFSET) -+#define ETH_RX_RESOURCE_ERROR (3<<ETH_RX_ERROR_CODE_OFFSET) -+ -+#define ETH_RX_L4_CHECKSUM_OFFSET 3 -+#define ETH_RX_L4_CHECKSUM_MASK (0xffff<<ETH_RX_L4_CHECKSUM_OFFSET) -+ -+#define ETH_RX_VLAN_TAGGED_FRAME_BIT 19 -+#define ETH_RX_VLAN_TAGGED_FRAME_MASK (1<<ETH_RX_VLAN_TAGGED_FRAME_BIT) -+ -+#define ETH_RX_BPDU_FRAME_BIT 20 -+#define ETH_RX_BPDU_FRAME_MASK (1<<ETH_RX_BPDU_FRAME_BIT) -+ -+#define ETH_RX_L4_TYPE_OFFSET 21 -+#define ETH_RX_L4_TYPE_MASK (3<<ETH_RX_L4_TYPE_OFFSET) -+#define ETH_RX_L4_TCP_TYPE (0<<ETH_RX_L4_TYPE_OFFSET) -+#define ETH_RX_L4_UDP_TYPE (1<<ETH_RX_L4_TYPE_OFFSET) -+#define ETH_RX_L4_OTHER_TYPE (2<<ETH_RX_L4_TYPE_OFFSET) -+ -+#define ETH_RX_NOT_LLC_SNAP_FORMAT_BIT 23 -+#define ETH_RX_NOT_LLC_SNAP_FORMAT_MASK (1<<ETH_RX_NOT_LLC_SNAP_FORMAT_BIT) -+ -+#define ETH_RX_IP_FRAME_TYPE_BIT 24 -+#define ETH_RX_IP_FRAME_TYPE_MASK (1<<ETH_RX_IP_FRAME_TYPE_BIT) -+ -+#define ETH_RX_IP_HEADER_OK_BIT 25 -+#define ETH_RX_IP_HEADER_OK_MASK (1<<ETH_RX_IP_HEADER_OK_BIT) -+ -+#define ETH_RX_LAST_DESC_BIT 26 -+#define ETH_RX_LAST_DESC_MASK (1<<ETH_RX_LAST_DESC_BIT) -+ -+#define ETH_RX_FIRST_DESC_BIT 27 -+#define ETH_RX_FIRST_DESC_MASK (1<<ETH_RX_FIRST_DESC_BIT) -+ -+#define ETH_RX_UNKNOWN_DA_BIT 28 -+#define ETH_RX_UNKNOWN_DA_MASK (1<<ETH_RX_UNKNOWN_DA_BIT) -+ -+#define ETH_RX_ENABLE_INTERRUPT_BIT 29 -+#define ETH_RX_ENABLE_INTERRUPT_MASK (1<<ETH_RX_ENABLE_INTERRUPT_BIT) -+ -+#define ETH_RX_L4_CHECKSUM_OK_BIT 30 -+#define ETH_RX_L4_CHECKSUM_OK_MASK (1<<ETH_RX_L4_CHECKSUM_OK_BIT) -+ -+/* Rx descriptor bufSize field */ -+#define ETH_RX_IP_FRAGMENTED_FRAME_BIT 2 -+#define ETH_RX_IP_FRAGMENTED_FRAME_MASK (1<<ETH_RX_IP_FRAGMENTED_FRAME_BIT) -+ -+#define ETH_RX_BUFFER_MASK 0xFFF8 -+ -+ -+/* Ethernet Cause Register BITs */ -+#define ETH_CAUSE_RX_READY_SUM_BIT 0 -+#define ETH_CAUSE_EXTEND_BIT 1 -+ -+#define ETH_CAUSE_RX_READY_OFFSET 2 -+#define ETH_CAUSE_RX_READY_BIT(queue) (ETH_CAUSE_RX_READY_OFFSET + (queue)) -+#define ETH_CAUSE_RX_READY_MASK(queue) (1 << (ETH_CAUSE_RX_READY_BIT(queue))) -+ -+#define ETH_CAUSE_RX_ERROR_SUM_BIT 10 -+#define ETH_CAUSE_RX_ERROR_OFFSET 11 -+#define ETH_CAUSE_RX_ERROR_BIT(queue) (ETH_CAUSE_RX_ERROR_OFFSET + (queue)) -+#define ETH_CAUSE_RX_ERROR_MASK(queue) (1 << (ETH_CAUSE_RX_ERROR_BIT(queue))) -+ -+#define ETH_CAUSE_TX_END_BIT 19 -+#define ETH_CAUSE_SUM_BIT 31 -+ -+/* Ethernet Cause Extended Register BITs */ -+#define ETH_CAUSE_TX_BUF_OFFSET 0 -+#define ETH_CAUSE_TX_BUF_BIT(queue) (ETH_CAUSE_TX_BUF_OFFSET + (queue)) -+#define ETH_CAUSE_TX_BUF_MASK(queue) (1 << (ETH_CAUSE_TX_BUF_BIT(queue))) -+ -+#define ETH_CAUSE_TX_ERROR_OFFSET 8 -+#define ETH_CAUSE_TX_ERROR_BIT(queue) (ETH_CAUSE_TX_ERROR_OFFSET + (queue)) -+#define ETH_CAUSE_TX_ERROR_MASK(queue) (1 << (ETH_CAUSE_TX_ERROR_BIT(queue))) -+ -+#define ETH_CAUSE_PHY_STATUS_CHANGE_BIT 16 -+#define ETH_CAUSE_RX_OVERRUN_BIT 18 -+#define ETH_CAUSE_TX_UNDERRUN_BIT 19 -+#define ETH_CAUSE_LINK_STATE_CHANGE_BIT 20 -+#define ETH_CAUSE_INTERNAL_ADDR_ERR_BIT 23 -+#define ETH_CAUSE_EXTEND_SUM_BIT 31 -+ -+/* Marvell Header Register */ -+/* Marvell Header register bits */ -+#define ETH_MVHDR_EN_BIT 0 -+#define ETH_MVHDR_EN_MASK (1 << ETH_MVHDR_EN_BIT) -+ -+#define ETH_MVHDR_DAPREFIX_BIT 1 -+#define ETH_MVHDR_DAPREFIX_MASK (0x3 << ETH_MVHDR_DAPREFIX_BIT) -+#define ETH_MVHDR_DAPREFIX_PRI_1_2 (0x1 << ETH_MVHDR_DAPREFIX_BIT) -+#define ETH_MVHDR_DAPREFIX_DBNUM_PRI (0x2 << ETH_MVHDR_DAPREFIX_BIT) -+#define ETH_MVHDR_DAPREFIX_SPID_PRI (0x3 << ETH_MVHDR_DAPREFIX_BIT) -+ -+#define ETH_MVHDR_MHMASK_BIT 8 -+#define ETH_MVHDR_MHMASK_MASK (0x3 << ETH_MVHDR_MHMASK_BIT) -+#define ETH_MVHDR_MHMASK_8_QUEUE (0x0 << ETH_MVHDR_MHMASK_BIT) -+#define ETH_MVHDR_MHMASK_4_QUEUE (0x1 << ETH_MVHDR_MHMASK_BIT) -+#define ETH_MVHDR_MHMASK_2_QUEUE (0x3 << ETH_MVHDR_MHMASK_BIT) -+ -+ -+/* Relevant for 6183 ONLY */ -+#define ETH_UNIT_PORTS_PADS_CALIB_0_REG (MV_ETH_REG_BASE(0) + 0x0A0) -+#define ETH_UNIT_PORTS_PADS_CALIB_1_REG (MV_ETH_REG_BASE(0) + 0x0A4) -+#define ETH_UNIT_PORTS_PADS_CALIB_2_REG (MV_ETH_REG_BASE(0) + 0x0A8) -+/* Ethernet Unit Ports Pads Calibration_REG (ETH_UNIT_PORTS_PADS_CALIB_x_REG) */ -+#define ETH_ETHERNET_PAD_CLIB_DRVN_OFFS 0 -+#define ETH_ETHERNET_PAD_CLIB_DRVN_MASK (0x1F << ETH_ETHERNET_PAD_CLIB_DRVN_OFFS) -+ -+#define ETH_ETHERNET_PAD_CLIB_DRVP_OFFS 5 -+#define ETH_ETHERNET_PAD_CLIB_DRVP_MASK (0x1F << ETH_ETHERNET_PAD_CLIB_DRVP_OFFS) -+ -+#define ETH_ETHERNET_PAD_CLIB_TUNEEN_OFFS 16 -+#define ETH_ETHERNET_PAD_CLIB_TUNEEN_MASK (0x1 << ETH_ETHERNET_PAD_CLIB_TUNEEN_OFFS) -+ -+#define ETH_ETHERNET_PAD_CLIB_LOCKN_OFFS 17 -+#define ETH_ETHERNET_PAD_CLIB_LOCKN_MASK (0x1F << ETH_ETHERNET_PAD_CLIB_LOCKN_OFFS) -+ -+#define ETH_ETHERNET_PAD_CLIB_OFFST_OFFS 24 -+#define ETH_ETHERNET_PAD_CLIB_OFFST_MASK (0x1F << ETH_ETHERNET_PAD_CLIB_OFFST_OFFS) -+ -+#define ETH_ETHERNET_PAD_CLIB_WR_EN_OFFS 31 -+#define ETH_ETHERNET_PAD_CLIB_WR_EN_MASK (0x1 << ETH_ETHERNET_PAD_CLIB_WR_EN_OFFS) -+ -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* __INCmvEthRegsh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/eth/mvEth.h b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/mvEth.h -new file mode 100644 -index 0000000..30f2a40 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/eth/mvEth.h -@@ -0,0 +1,356 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+/******************************************************************************* -+* mvEth.h - Header File for : Ethernet Controller -+* -+* DESCRIPTION: -+* This header file contains macros typedefs and function declaration for -+* Marvell Gigabit Ethernet Controllers. -+* -+* DEPENDENCIES: -+* None. -+* -+*******************************************************************************/ -+ -+#ifndef __mvEth_h__ -+#define __mvEth_h__ -+ -+/* includes */ -+#include "mvTypes.h" -+#include "mv802_3.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+#include "eth/gbe/mvEthRegs.h" -+#include "mvSysHwConfig.h" -+ -+/* defines */ -+ -+#define MV_ETH_EXTRA_FRAGS_NUM 2 -+ -+ -+typedef enum -+{ -+ MV_ETH_SPEED_AN, -+ MV_ETH_SPEED_10, -+ MV_ETH_SPEED_100, -+ MV_ETH_SPEED_1000 -+ -+} MV_ETH_PORT_SPEED; -+ -+typedef enum -+{ -+ MV_ETH_DUPLEX_AN, -+ MV_ETH_DUPLEX_HALF, -+ MV_ETH_DUPLEX_FULL -+ -+} MV_ETH_PORT_DUPLEX; -+ -+typedef enum -+{ -+ MV_ETH_FC_AN_ADV_DIS, -+ MV_ETH_FC_AN_ADV_SYM, -+ MV_ETH_FC_DISABLE, -+ MV_ETH_FC_ENABLE -+ -+} MV_ETH_PORT_FC; -+ -+typedef enum -+{ -+ MV_ETH_PRIO_FIXED = 0, /* Fixed priority mode */ -+ MV_ETH_PRIO_WRR = 1 /* Weighted round robin priority mode */ -+} MV_ETH_PRIO_MODE; -+ -+/* Ethernet port specific infomation */ -+typedef struct -+{ -+ int maxRxPktSize; -+ int rxDefQ; -+ int rxBpduQ; -+ int rxArpQ; -+ int rxTcpQ; -+ int rxUdpQ; -+ int ejpMode; -+} MV_ETH_PORT_CFG; -+ -+typedef struct -+{ -+ int descrNum; -+} MV_ETH_RX_Q_CFG; -+ -+typedef struct -+{ -+ int descrNum; -+ MV_ETH_PRIO_MODE prioMode; -+ int quota; -+} MV_ETH_TX_Q_CFG; -+ -+typedef struct -+{ -+ int maxRxPktSize; -+ int rxDefQ; -+ int txDescrNum[MV_ETH_TX_Q_NUM]; -+ int rxDescrNum[MV_ETH_RX_Q_NUM]; -+ void *osHandle; -+} MV_ETH_PORT_INIT; -+ -+typedef struct -+{ -+ MV_BOOL isLinkUp; -+ MV_ETH_PORT_SPEED speed; -+ MV_ETH_PORT_DUPLEX duplex; -+ MV_ETH_PORT_FC flowControl; -+ -+} MV_ETH_PORT_STATUS; -+ -+typedef enum -+{ -+ MV_ETH_DISABLE_HEADER_MODE = 0, -+ MV_ETH_ENABLE_HEADER_MODE_PRI_2_1 = 1, -+ MV_ETH_ENABLE_HEADER_MODE_PRI_DBNUM = 2, -+ MV_ETH_ENABLE_HEADER_MODE_PRI_SPID = 3 -+} MV_ETH_HEADER_MODE; -+ -+ -+/* ethernet.h API list */ -+void mvEthHalInit(void); -+void mvEthMemAttrGet(MV_BOOL* pIsSram, MV_BOOL* pIsSwCoher); -+ -+/* Port Initalization routines */ -+void* mvEthPortInit (int port, MV_ETH_PORT_INIT *pPortInit); -+void ethResetTxDescRing(void* pPortHndl, int queue); -+void ethResetRxDescRing(void* pPortHndl, int queue); -+ -+void* mvEthPortHndlGet(int port); -+ -+void mvEthPortFinish(void* pEthPortHndl); -+MV_STATUS mvEthPortDown(void* pEthPortHndl); -+MV_STATUS mvEthPortDisable(void* pEthPortHndl); -+MV_STATUS mvEthPortUp(void* pEthPortHndl); -+MV_STATUS mvEthPortEnable(void* pEthPortHndl); -+ -+/* Port data flow routines */ -+MV_PKT_INFO *mvEthPortForceTxDone(void* pEthPortHndl, int txQueue); -+MV_PKT_INFO *mvEthPortForceRx(void* pEthPortHndl, int rxQueue); -+ -+/* Port Configuration routines */ -+MV_STATUS mvEthDefaultsSet(void* pEthPortHndl); -+MV_STATUS mvEthMaxRxSizeSet(void* pPortHndl, int maxRxSize); -+ -+/* Port RX MAC Filtering control routines */ -+MV_U8 mvEthMcastCrc8Get(MV_U8* pAddr); -+MV_STATUS mvEthRxFilterModeSet(void* pPortHndl, MV_BOOL isPromisc); -+MV_STATUS mvEthMacAddrSet(void* pPortHandle, MV_U8* pMacAddr, int queue); -+MV_STATUS mvEthMcastAddrSet(void* pPortHandle, MV_U8 *pAddr, int queue); -+ -+/* MIB Counters APIs */ -+MV_U32 mvEthMibCounterRead(void* pPortHndl, unsigned int mibOffset, -+ MV_U32* pHigh32); -+void mvEthMibCountersClear(void* pPortHandle); -+ -+/* TX Scheduling configuration routines */ -+MV_STATUS mvEthTxQueueConfig(void* pPortHandle, int txQueue, -+ MV_ETH_PRIO_MODE txPrioMode, int txQuota); -+ -+/* RX Dispatching configuration routines */ -+MV_STATUS mvEthBpduRxQueue(void* pPortHandle, int bpduQueue); -+MV_STATUS mvEthVlanPrioRxQueue(void* pPortHandle, int vlanPrio, int vlanPrioQueue); -+MV_STATUS mvEthTosToRxqSet(void* pPortHandle, int tos, int rxq); -+int mvEthTosToRxqGet(void* pPortHandle, int tos); -+ -+/* Speed, Duplex, FlowControl routines */ -+MV_STATUS mvEthSpeedDuplexSet(void* pPortHandle, MV_ETH_PORT_SPEED speed, -+ MV_ETH_PORT_DUPLEX duplex); -+ -+MV_STATUS mvEthFlowCtrlSet(void* pPortHandle, MV_ETH_PORT_FC flowControl); -+ -+#if (MV_ETH_VERSION >= 4) -+MV_STATUS mvEthEjpModeSet(void* pPortHandle, int mode); -+#endif /* (MV_ETH_VERSION >= 4) */ -+ -+void mvEthStatusGet(void* pPortHandle, MV_ETH_PORT_STATUS* pStatus); -+ -+/* Marvell Header control */ -+MV_STATUS mvEthHeaderModeSet(void* pPortHandle, MV_ETH_HEADER_MODE headerMode); -+ -+/* PHY routines */ -+void mvEthPhyAddrSet(void* pPortHandle, int phyAddr); -+int mvEthPhyAddrGet(void* pPortHandle); -+ -+/* Power management routines */ -+void mvEthPortPowerDown(int port); -+void mvEthPortPowerUp(int port); -+ -+/******************** ETH PRIVATE ************************/ -+ -+/*#define UNCACHED_TX_BUFFERS*/ -+/*#define UNCACHED_RX_BUFFERS*/ -+ -+ -+/* Port attributes */ -+/* Size of a Tx/Rx descriptor used in chain list data structure */ -+#define ETH_RX_DESC_ALIGNED_SIZE 32 -+#define ETH_TX_DESC_ALIGNED_SIZE 32 -+ -+#define TX_DISABLE_TIMEOUT_MSEC 1000 -+#define RX_DISABLE_TIMEOUT_MSEC 1000 -+#define TX_FIFO_EMPTY_TIMEOUT_MSEC 10000 -+#define PORT_DISABLE_WAIT_TCLOCKS 5000 -+ -+/* Macros that save access to desc in order to find next desc pointer */ -+#define RX_NEXT_DESC_PTR(pRxDescr, pQueueCtrl) \ -+ ((pRxDescr) == (pQueueCtrl)->pLastDescr) ? \ -+ (ETH_RX_DESC*)((pQueueCtrl)->pFirstDescr) : \ -+ (ETH_RX_DESC*)(((MV_ULONG)(pRxDescr)) + ETH_RX_DESC_ALIGNED_SIZE) -+ -+#define TX_NEXT_DESC_PTR(pTxDescr, pQueueCtrl) \ -+ ((pTxDescr) == (pQueueCtrl)->pLastDescr) ? \ -+ (ETH_TX_DESC*)((pQueueCtrl)->pFirstDescr) : \ -+ (ETH_TX_DESC*)(((MV_ULONG)(pTxDescr)) + ETH_TX_DESC_ALIGNED_SIZE) -+ -+#define RX_PREV_DESC_PTR(pRxDescr, pQueueCtrl) \ -+ ((pRxDescr) == (pQueueCtrl)->pFirstDescr) ? \ -+ (ETH_RX_DESC*)((pQueueCtrl)->pLastDescr) : \ -+ (ETH_RX_DESC*)(((MV_ULONG)(pRxDescr)) - ETH_RX_DESC_ALIGNED_SIZE) -+ -+#define TX_PREV_DESC_PTR(pTxDescr, pQueueCtrl) \ -+ ((pTxDescr) == (pQueueCtrl)->pFirstDescr) ? \ -+ (ETH_TX_DESC*)((pQueueCtrl)->pLastDescr) : \ -+ (ETH_TX_DESC*)(((MV_ULONG)(pTxDescr)) - ETH_TX_DESC_ALIGNED_SIZE) -+ -+ -+/* Queue specific information */ -+typedef struct -+{ -+ void* pFirstDescr; -+ void* pLastDescr; -+ void* pCurrentDescr; -+ void* pUsedDescr; -+ int resource; -+ MV_BUF_INFO descBuf; -+} ETH_QUEUE_CTRL; -+ -+ -+/* Ethernet port specific infomation */ -+typedef struct _ethPortCtrl -+{ -+ int portNo; -+ ETH_QUEUE_CTRL rxQueue[MV_ETH_RX_Q_NUM]; /* Rx ring resource */ -+ ETH_QUEUE_CTRL txQueue[MV_ETH_TX_Q_NUM]; /* Tx ring resource */ -+ -+ MV_ETH_PORT_CFG portConfig; -+ MV_ETH_RX_Q_CFG rxQueueConfig[MV_ETH_RX_Q_NUM]; -+ MV_ETH_TX_Q_CFG txQueueConfig[MV_ETH_TX_Q_NUM]; -+ -+ /* Register images - For DP */ -+ MV_U32 portTxQueueCmdReg; /* Port active Tx queues summary */ -+ MV_U32 portRxQueueCmdReg; /* Port active Rx queues summary */ -+ -+ MV_STATE portState; -+ -+ MV_U8 mcastCount[256]; -+ MV_U32* hashPtr; -+ void *osHandle; -+} ETH_PORT_CTRL; -+ -+/************** MACROs ****************/ -+ -+/* MACROs to Flush / Invalidate TX / RX Buffers */ -+#if (ETHER_DRAM_COHER == MV_CACHE_COHER_SW) && !defined(UNCACHED_TX_BUFFERS) -+# define ETH_PACKET_CACHE_FLUSH(pAddr, size) \ -+ mvOsCacheClear(NULL, (pAddr), (size)); \ -+ /*CPU_PIPE_FLUSH;*/ -+#else -+# define ETH_PACKET_CACHE_FLUSH(pAddr, size) \ -+ mvOsIoVirtToPhy(NULL, (pAddr)); -+#endif /* ETHER_DRAM_COHER == MV_CACHE_COHER_SW */ -+ -+#if ( (ETHER_DRAM_COHER == MV_CACHE_COHER_SW) && !defined(UNCACHED_RX_BUFFERS) ) -+# define ETH_PACKET_CACHE_INVALIDATE(pAddr, size) \ -+ mvOsCacheInvalidate (NULL, (pAddr), (size)); \ -+ /*CPU_PIPE_FLUSH;*/ -+#else -+# define ETH_PACKET_CACHE_INVALIDATE(pAddr, size) -+#endif /* ETHER_DRAM_COHER == MV_CACHE_COHER_SW && !UNCACHED_RX_BUFFERS */ -+ -+#ifdef ETH_DESCR_UNCACHED -+ -+#define ETH_DESCR_FLUSH_INV(pPortCtrl, pDescr) -+#define ETH_DESCR_INV(pPortCtrl, pDescr) -+ -+#else -+ -+#define ETH_DESCR_FLUSH_INV(pPortCtrl, pDescr) \ -+ mvOsCacheLineFlushInv(pPortCtrl->osHandle, (MV_ULONG)(pDescr)) -+ -+#define ETH_DESCR_INV(pPortCtrl, pDescr) \ -+ mvOsCacheLineInv(pPortCtrl->osHandle, (MV_ULONG)(pDescr)) -+ -+#endif /* ETH_DESCR_UNCACHED */ -+ -+#include "eth/gbe/mvEthGbe.h" -+ -+#endif /* __mvEth_h__ */ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.c b/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.c -new file mode 100644 -index 0000000..d7a5132 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.c -@@ -0,0 +1,362 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "gpp/mvGpp.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+static MV_VOID gppRegSet(MV_U32 group, MV_U32 regOffs,MV_U32 mask,MV_U32 value); -+ -+/******************************************************************************* -+* mvGppTypeSet - Enable a GPP (OUT) pin -+* -+* DESCRIPTION: -+* -+* INPUT: -+* group - GPP group number -+* mask - 32bit mask value. Each set bit in the mask means that the type -+* of corresponding GPP will be set. Other GPPs are ignored. -+* value - 32bit value that describes GPP type per pin. -+* -+* OUTPUT: -+* None. -+* -+* EXAMPLE: -+* Set GPP8 to input and GPP15 to output. -+* mvGppTypeSet(0, (GPP8 | GPP15), -+* ((MV_GPP_IN & GPP8) | (MV_GPP_OUT & GPP15)) ); -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvGppTypeSet(MV_U32 group, MV_U32 mask, MV_U32 value) -+{ -+ if (group >= MV_GPP_MAX_GROUP) -+ { -+ DB(mvOsPrintf("mvGppTypeSet: ERR. invalid group number \n")); -+ return MV_BAD_PARAM; -+ } -+ -+ gppRegSet(group, GPP_DATA_OUT_EN_REG(group), mask, value); -+ -+ /* Workaround for Erratum FE-MISC-70*/ -+ if(mvCtrlRevGet()==MV_88F6XXX_A0_REV && (group == 1)) -+ { -+ mask &= 0x2; -+ gppRegSet(0, GPP_DATA_OUT_EN_REG(0), mask, value); -+ } /*End of WA*/ -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvGppBlinkEn - Set a GPP (IN) Pin list to blink every ~100ms -+* -+* DESCRIPTION: -+* -+* INPUT: -+* group - GPP group number -+* mask - 32bit mask value. Each set bit in the mask means that the type -+* of corresponding GPP will be set. Other GPPs are ignored. -+* value - 32bit value that describes GPP blink per pin. -+* -+* OUTPUT: -+* None. -+* -+* EXAMPLE: -+* Set GPP8 to be static and GPP15 to be blinking. -+* mvGppBlinkEn(0, (GPP8 | GPP15), -+* ((MV_GPP_OUT_STATIC & GPP8) | (MV_GPP_OUT_BLINK & GPP15)) ); -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvGppBlinkEn(MV_U32 group, MV_U32 mask, MV_U32 value) -+{ -+ if (group >= MV_GPP_MAX_GROUP) -+ { -+ DB(mvOsPrintf("mvGppBlinkEn: ERR. invalid group number \n")); -+ return MV_BAD_PARAM; -+ } -+ -+ gppRegSet(group, GPP_BLINK_EN_REG(group), mask, value); -+ -+ return MV_OK; -+ -+} -+/******************************************************************************* -+* mvGppPolaritySet - Set a GPP (IN) Pin list Polarity mode -+* -+* DESCRIPTION: -+* -+* INPUT: -+* group - GPP group number -+* mask - 32bit mask value. Each set bit in the mask means that the type -+* of corresponding GPP will be set. Other GPPs are ignored. -+* value - 32bit value that describes GPP polarity per pin. -+* -+* OUTPUT: -+* None. -+* -+* EXAMPLE: -+* Set GPP8 to the actual pin value and GPP15 to be inverted. -+* mvGppPolaritySet(0, (GPP8 | GPP15), -+* ((MV_GPP_IN_ORIGIN & GPP8) | (MV_GPP_IN_INVERT & GPP15)) ); -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvGppPolaritySet(MV_U32 group, MV_U32 mask, MV_U32 value) -+{ -+ if (group >= MV_GPP_MAX_GROUP) -+ { -+ DB(mvOsPrintf("mvGppPolaritySet: ERR. invalid group number \n")); -+ return MV_BAD_PARAM; -+ } -+ -+ gppRegSet(group, GPP_DATA_IN_POL_REG(group), mask, value); -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvGppPolarityGet - Get a value of relevant bits from GPP Polarity register. -+* -+* DESCRIPTION: -+* -+* INPUT: -+* group - GPP group number -+* mask - 32bit mask value. Each set bit in the mask means that the -+* returned value is valid for it. -+* -+* OUTPUT: -+* None. -+* -+* EXAMPLE: -+* Get GPP8 and GPP15 value. -+* mvGppPolarityGet(0, (GPP8 | GPP15)); -+* -+* RETURN: -+* 32bit value that describes GPP polatity mode per pin. -+* -+*******************************************************************************/ -+MV_U32 mvGppPolarityGet(MV_U32 group, MV_U32 mask) -+{ -+ MV_U32 regVal; -+ -+ if (group >= MV_GPP_MAX_GROUP) -+ { -+ DB(mvOsPrintf("mvGppActiveSet: Error invalid group number \n")); -+ return MV_ERROR; -+ } -+ regVal = MV_REG_READ(GPP_DATA_IN_POL_REG(group)); -+ -+ return (regVal & mask); -+} -+ -+/******************************************************************************* -+* mvGppValueGet - Get a GPP Pin list value. -+* -+* DESCRIPTION: -+* This function get GPP value. -+* -+* INPUT: -+* group - GPP group number -+* mask - 32bit mask value. Each set bit in the mask means that the -+* returned value is valid for it. -+* -+* OUTPUT: -+* None. -+* -+* EXAMPLE: -+* Get GPP8 and GPP15 value. -+* mvGppValueGet(0, (GPP8 | GPP15)); -+* -+* RETURN: -+* 32bit value that describes GPP activity mode per pin. -+* -+*******************************************************************************/ -+MV_U32 mvGppValueGet(MV_U32 group, MV_U32 mask) -+{ -+ MV_U32 gppData; -+ -+ gppData = MV_REG_READ(GPP_DATA_IN_REG(group)); -+ -+ gppData &= mask; -+ -+ return gppData; -+ -+} -+ -+/******************************************************************************* -+* mvGppValueSet - Set a GPP Pin list value. -+* -+* DESCRIPTION: -+* This function set value for given GPP pin list. -+* -+* INPUT: -+* group - GPP group number -+* mask - 32bit mask value. Each set bit in the mask means that the -+* value of corresponding GPP will be set accordingly. Other GPP -+* are not affected. -+* value - 32bit value that describes GPP value per pin. -+* -+* OUTPUT: -+* None. -+* -+* EXAMPLE: -+* Set GPP8 value of '0' and GPP15 value of '1'. -+* mvGppActiveSet(0, (GPP8 | GPP15), ((0 & GPP8) | (GPP15)) ); -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvGppValueSet (MV_U32 group, MV_U32 mask, MV_U32 value) -+{ -+ MV_U32 outEnable, tmp; -+ MV_U32 i; -+ -+ if (group >= MV_GPP_MAX_GROUP) -+ { -+ DB(mvOsPrintf("mvGppValueSet: Error invalid group number \n")); -+ return MV_BAD_PARAM; -+ } -+ -+ /* verify that the gpp pin is configured as output */ -+ /* Note that in the register out enabled -> bit = '0'. */ -+ outEnable = ~MV_REG_READ(GPP_DATA_OUT_EN_REG(group)); -+ -+ /* Workaround for Erratum FE-MISC-70*/ -+ if(mvCtrlRevGet()==MV_88F6XXX_A0_REV && (group == 1)) -+ { -+ tmp = ~MV_REG_READ(GPP_DATA_OUT_EN_REG(0)); -+ outEnable &= 0xfffffffd; -+ outEnable |= (tmp & 0x2); -+ } /*End of WA*/ -+ -+ for (i = 0 ; i < 32 ;i++) -+ { -+ if (((mask & (1 << i)) & (outEnable & (1 << i))) != (mask & (1 << i))) -+ { -+ mvOsPrintf("mvGppValueSet: Err. An attempt to set output "\ -+ "value to GPP %d in input mode.\n", i); -+ return MV_ERROR; -+ } -+ } -+ -+ gppRegSet(group, GPP_DATA_OUT_REG(group), mask, value); -+ -+ return MV_OK; -+ -+} -+/******************************************************************************* -+* gppRegSet - Set a specific GPP pin on a specific GPP register -+* -+* DESCRIPTION: -+* This function set a specific GPP pin on a specific GPP register -+* -+* INPUT: -+* regOffs - GPP Register offset -+* group - GPP group number -+* mask - 32bit mask value. Each set bit in the mask means that the -+* value of corresponding GPP will be set accordingly. Other GPP -+* are not affected. -+* value - 32bit value that describes GPP value per pin. -+* -+* OUTPUT: -+* None. -+* -+* EXAMPLE: -+* Set GPP8 value of '0' and GPP15 value of '1'. -+* mvGppActiveSet(0, (GPP8 | GPP15), ((0 & GPP8) | (1 & GPP15)) ); -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+static MV_VOID gppRegSet (MV_U32 group, MV_U32 regOffs,MV_U32 mask,MV_U32 value) -+{ -+ MV_U32 gppData; -+ -+ gppData = MV_REG_READ(regOffs); -+ -+ gppData &= ~mask; -+ -+ gppData |= (value & mask); -+ -+ MV_REG_WRITE(regOffs, gppData); -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.h b/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.h -new file mode 100644 -index 0000000..801472d ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGpp.h -@@ -0,0 +1,118 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvGppH -+#define __INCmvGppH -+ -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+#include "gpp/mvGppRegs.h" -+ -+/* These macros describes the GPP type. Each of the GPPs pins can */ -+/* be assigned to act as a general purpose input or output pin. */ -+#define MV_GPP_IN 0xFFFFFFFF /* GPP input */ -+#define MV_GPP_OUT 0 /* GPP output */ -+ -+ -+/* These macros describes the GPP Out Enable. */ -+#define MV_GPP_OUT_DIS 0xFFFFFFFF /* Out pin disabled*/ -+#define MV_GPP_OUT_EN 0 /* Out pin enabled*/ -+ -+/* These macros describes the GPP Out Blinking. */ -+/* When set and the corresponding bit in GPIO Data Out Enable Control */ -+/* Register is enabled, the GPIO pin blinks every ~100 ms (a period of */ -+/* 2^24 TCLK clocks). */ -+#define MV_GPP_OUT_BLINK 0xFFFFFFFF /* Out pin blinking*/ -+#define MV_GPP_OUT_STATIC 0 /* Out pin static*/ -+ -+ -+/* These macros describes the GPP Polarity. */ -+/* When set to 1 GPIO Data In Register reflects the inverted value of the */ -+/* corresponding pin. */ -+ -+#define MV_GPP_IN_INVERT 0xFFFFFFFF /* Inverted value is got*/ -+#define MV_GPP_IN_ORIGIN 0 /* original value is got*/ -+ -+/* mvGppTypeSet - Set PP pin mode (IN or OUT) */ -+MV_STATUS mvGppTypeSet(MV_U32 group, MV_U32 mask, MV_U32 value); -+ -+/* mvGppBlinkEn - Set a GPP (IN) Pin list to blink every ~100ms */ -+MV_STATUS mvGppBlinkEn(MV_U32 group, MV_U32 mask, MV_U32 value); -+ -+/* mvGppPolaritySet - Set a GPP (IN) Pin list Polarity mode. */ -+MV_STATUS mvGppPolaritySet(MV_U32 group, MV_U32 mask, MV_U32 value); -+ -+/* mvGppPolarityGet - Get the Polarity of a GPP Pin */ -+MV_U32 mvGppPolarityGet(MV_U32 group, MV_U32 mask); -+ -+/* mvGppValueGet - Get a GPP Pin list value.*/ -+MV_U32 mvGppValueGet(MV_U32 group, MV_U32 mask); -+ -+ -+/* mvGppValueSet - Set a GPP Pin list value. */ -+MV_STATUS mvGppValueSet (MV_U32 group, MV_U32 mask, MV_U32 value); -+ -+#endif /* #ifndef __INCmvGppH */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGppRegs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGppRegs.h -new file mode 100644 -index 0000000..14b199f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/mvGppRegs.h -@@ -0,0 +1,116 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvGppRegsH -+#define __INCmvGppRegsH -+ -+#define MV_GPP0 BIT0 -+#define MV_GPP1 BIT1 -+#define MV_GPP2 BIT2 -+#define MV_GPP3 BIT3 -+#define MV_GPP4 BIT4 -+#define MV_GPP5 BIT5 -+#define MV_GPP6 BIT6 -+#define MV_GPP7 BIT7 -+#define MV_GPP8 BIT8 -+#define MV_GPP9 BIT9 -+#define MV_GPP10 BIT10 -+#define MV_GPP11 BIT11 -+#define MV_GPP12 BIT12 -+#define MV_GPP13 BIT13 -+#define MV_GPP14 BIT14 -+#define MV_GPP15 BIT15 -+#define MV_GPP16 BIT16 -+#define MV_GPP17 BIT17 -+#define MV_GPP18 BIT18 -+#define MV_GPP19 BIT19 -+#define MV_GPP20 BIT20 -+#define MV_GPP21 BIT21 -+#define MV_GPP22 BIT22 -+#define MV_GPP23 BIT23 -+#define MV_GPP24 BIT24 -+#define MV_GPP25 BIT25 -+#define MV_GPP26 BIT26 -+#define MV_GPP27 BIT27 -+#define MV_GPP28 BIT28 -+#define MV_GPP29 BIT29 -+#define MV_GPP30 BIT30 -+#define MV_GPP31 BIT31 -+ -+ -+/* registers offsets */ -+ -+#define GPP_DATA_OUT_REG(grp) ((grp == 0) ? 0x10100 : 0x10140) -+#define GPP_DATA_OUT_EN_REG(grp) ((grp == 0) ? 0x10104 : 0x10144) -+#define GPP_BLINK_EN_REG(grp) ((grp == 0) ? 0x10108 : 0x10148) -+#define GPP_DATA_IN_POL_REG(grp) ((grp == 0) ? 0x1010C : 0x1014c) -+#define GPP_DATA_IN_REG(grp) ((grp == 0) ? 0x10110 : 0x10150) -+#define GPP_INT_CAUSE_REG(grp) ((grp == 0) ? 0x10114 : 0x10154) -+#define GPP_INT_MASK_REG(grp) ((grp == 0) ? 0x10118 : 0x10158) -+#define GPP_INT_LVL_REG(grp) ((grp == 0) ? 0x1011c : 0x1015c) -+ -+#define GPP_DATA_OUT_SET_REG 0x10120 -+#define GPP_DATA_OUT_CLEAR_REG 0x10124 -+ -+#endif /* #ifndef __INCmvGppRegsH */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.c b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.c -new file mode 100644 -index 0000000..5ee430c ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.c -@@ -0,0 +1,669 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvPciIf.h" -+#include "ctrlEnv/sys/mvSysPex.h" -+ -+#if defined(MV_INCLUDE_PCI) -+#include "ctrlEnv/sys/mvSysPci.h" -+#endif -+ -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+ -+/******************************************************************************* -+* mvPciInit - Initialize PCI interfaces -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK if function success otherwise MV_ERROR or MV_BAD_PARAM -+* -+*******************************************************************************/ -+ -+ -+MV_STATUS mvPciIfInit(MV_U32 pciIf, PCI_IF_MODE pciIfmode) -+{ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ -+ MV_PCI_MOD pciMod; -+ -+ if (PCI_IF_MODE_HOST == pciIfmode) -+ { -+ pciMod = MV_PCI_MOD_HOST; -+ } -+ else if (PCI_IF_MODE_DEVICE == pciIfmode) -+ { -+ pciMod = MV_PCI_MOD_DEVICE; -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Bus %d mode %d neither host nor device!\n", -+ __FUNCTION__, pciIf, pciIfmode); -+ return MV_FAIL; -+ } -+ -+ return mvPciInit(pciIf - MV_PCI_START_IF, pciMod); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ -+ MV_PEX_TYPE pexType; -+ -+ if (PCI_IF_MODE_HOST == pciIfmode) -+ { -+ pexType = MV_PEX_ROOT_COMPLEX; -+ } -+ else if (PCI_IF_MODE_DEVICE == pciIfmode) -+ { -+ pexType = MV_PEX_END_POINT; -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Bus %d type %d neither root complex nor" \ -+ " end point\n", __FUNCTION__, pciIf, pciIfmode); -+ return MV_FAIL; -+ } -+ return mvPexInit(pciIf - MV_PEX_START_IF, pexType); -+ -+ #else -+ return MV_OK; -+ #endif -+ -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return MV_FAIL; -+ -+} -+ -+/* PCI configuration space read write */ -+ -+/******************************************************************************* -+* mvPciConfigRead - Read from configuration space -+* -+* DESCRIPTION: -+* This function performs a 32 bit read from PCI configuration space. -+* It supports both type 0 and type 1 of Configuration Transactions -+* (local and over bridge). In order to read from local bus segment, use -+* bus number retrieved from mvPciLocalBusNumGet(). Other bus numbers -+* will result configuration transaction of type 1 (over bridge). -+* -+* INPUT: -+* pciIf - PCI interface number. -+* bus - PCI segment bus number. -+* dev - PCI device number. -+* func - Function number. -+* regOffs - Register offset. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit register data, 0xffffffff on error -+* -+*******************************************************************************/ -+MV_U32 mvPciIfConfigRead (MV_U32 pciIf, MV_U32 bus, MV_U32 dev, MV_U32 func, -+ MV_U32 regOff) -+{ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ return mvPciConfigRead(pciIf - MV_PCI_START_IF, -+ bus, -+ dev, -+ func, -+ regOff); -+ #else -+ return 0xffffffff; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ return mvPexConfigRead(pciIf - MV_PEX_START_IF, -+ bus, -+ dev, -+ func, -+ regOff); -+ #else -+ return 0xffffffff; -+ #endif -+ -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return 0; -+ -+} -+ -+/******************************************************************************* -+* mvPciConfigWrite - Write to configuration space -+* -+* DESCRIPTION: -+* This function performs a 32 bit write to PCI configuration space. -+* It supports both type 0 and type 1 of Configuration Transactions -+* (local and over bridge). In order to write to local bus segment, use -+* bus number retrieved from mvPciLocalBusNumGet(). Other bus numbers -+* will result configuration transaction of type 1 (over bridge). -+* -+* INPUT: -+* pciIf - PCI interface number. -+* bus - PCI segment bus number. -+* dev - PCI device number. -+* func - Function number. -+* regOffs - Register offset. -+* data - 32bit data. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciIfConfigWrite(MV_U32 pciIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data) -+{ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ return mvPciConfigWrite(pciIf - MV_PCI_START_IF, -+ bus, -+ dev, -+ func, -+ regOff, -+ data); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ return mvPexConfigWrite(pciIf - MV_PEX_START_IF, -+ bus, -+ dev, -+ func, -+ regOff, -+ data); -+ #else -+ return MV_OK; -+ #endif -+ -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return MV_FAIL; -+ -+} -+ -+/******************************************************************************* -+* mvPciMasterEnable - Enable/disale PCI interface master transactions. -+* -+* DESCRIPTION: -+* This function performs read modified write to PCI command status -+* (offset 0x4) to set/reset bit 2. After this bit is set, the PCI -+* master is allowed to gain ownership on the bus, otherwise it is -+* incapable to do so. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciIfMasterEnable(MV_U32 pciIf, MV_BOOL enable) -+{ -+ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ return mvPciMasterEnable(pciIf - MV_PCI_START_IF, -+ enable); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ return mvPexMasterEnable(pciIf - MV_PEX_START_IF, -+ enable); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return MV_FAIL; -+ -+} -+ -+ -+/******************************************************************************* -+* mvPciSlaveEnable - Enable/disale PCI interface slave transactions. -+* -+* DESCRIPTION: -+* This function performs read modified write to PCI command status -+* (offset 0x4) to set/reset bit 0 and 1. After those bits are set, -+* the PCI slave is allowed to respond to PCI IO space access (bit 0) -+* and PCI memory space access (bit 1). -+* -+* INPUT: -+* pciIf - PCI interface number. -+* dev - PCI device number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciIfSlaveEnable(MV_U32 pciIf,MV_U32 bus, MV_U32 dev, MV_BOOL enable) -+{ -+ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ return mvPciSlaveEnable(pciIf - MV_PCI_START_IF,bus,dev, -+ enable); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ return mvPexSlaveEnable(pciIf - MV_PEX_START_IF,bus,dev, -+ enable); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return MV_FAIL; -+ -+} -+ -+/******************************************************************************* -+* mvPciLocalBusNumSet - Set PCI interface local bus number. -+* -+* DESCRIPTION: -+* This function sets given PCI interface its local bus number. -+* Note: In case the PCI interface is PCI-X, the information is read-only. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* busNum - Bus number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_NOT_ALLOWED in case PCI interface is PCI-X. -+* MV_BAD_PARAM on bad parameters , -+* otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciIfLocalBusNumSet(MV_U32 pciIf, MV_U32 busNum) -+{ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ return mvPciLocalBusNumSet(pciIf - MV_PCI_START_IF, -+ busNum); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ return mvPexLocalBusNumSet(pciIf - MV_PEX_START_IF, -+ busNum); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return MV_FAIL; -+ -+} -+ -+/******************************************************************************* -+* mvPciLocalBusNumGet - Get PCI interface local bus number. -+* -+* DESCRIPTION: -+* This function gets the local bus number of a given PCI interface. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Local bus number.0xffffffff on Error -+* -+*******************************************************************************/ -+MV_U32 mvPciIfLocalBusNumGet(MV_U32 pciIf) -+{ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ return mvPciLocalBusNumGet(pciIf - MV_PCI_START_IF); -+ #else -+ return 0xFFFFFFFF; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ return mvPexLocalBusNumGet(pciIf - MV_PEX_START_IF); -+ #else -+ return 0xFFFFFFFF; -+ #endif -+ -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n",__FUNCTION__, pciIf); -+ } -+ -+ return 0; -+ -+} -+ -+ -+/******************************************************************************* -+* mvPciLocalDevNumSet - Set PCI interface local device number. -+* -+* DESCRIPTION: -+* This function sets given PCI interface its local device number. -+* Note: In case the PCI interface is PCI-X, the information is read-only. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* devNum - Device number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_NOT_ALLOWED in case PCI interface is PCI-X. MV_BAD_PARAM on bad parameters , -+* otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciIfLocalDevNumSet(MV_U32 pciIf, MV_U32 devNum) -+{ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ return mvPciLocalDevNumSet(pciIf - MV_PCI_START_IF, -+ devNum); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ return mvPexLocalDevNumSet(pciIf - MV_PEX_START_IF, -+ devNum); -+ #else -+ return MV_OK; -+ #endif -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return MV_FAIL; -+ -+} -+ -+/******************************************************************************* -+* mvPciLocalDevNumGet - Get PCI interface local device number. -+* -+* DESCRIPTION: -+* This function gets the local device number of a given PCI interface. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Local device number. 0xffffffff on Error -+* -+*******************************************************************************/ -+MV_U32 mvPciIfLocalDevNumGet(MV_U32 pciIf) -+{ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PCI) -+ return mvPciLocalDevNumGet(pciIf - MV_PCI_START_IF); -+ #else -+ return 0xFFFFFFFF; -+ #endif -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ #if defined(MV_INCLUDE_PEX) -+ return mvPexLocalDevNumGet(pciIf - MV_PEX_START_IF); -+ #else -+ return 0xFFFFFFFF; -+ #endif -+ -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return 0; -+ -+} -+ -+/******************************************************************************* -+* mvPciIfTypeGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+ -+PCI_IF_TYPE mvPciIfTypeGet(MV_U32 pciIf) -+{ -+ -+ if ((pciIf >= MV_PCI_START_IF)&&(pciIf < MV_PCI_MAX_IF + MV_PCI_START_IF)) -+ { -+ return PCI_IF_TYPE_CONVEN_PCIX; -+ } -+ else if ((pciIf >= MV_PEX_START_IF) && -+ (pciIf < MV_PEX_MAX_IF + MV_PEX_START_IF)) -+ { -+ return PCI_IF_TYPE_PEX; -+ -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return 0xffffffff; -+ -+} -+ -+/******************************************************************************* -+* mvPciIfTypeGet - -+* -+* DESCRIPTION: -+* -+* INPUT: -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* -+*******************************************************************************/ -+ -+MV_U32 mvPciRealIfNumGet(MV_U32 pciIf) -+{ -+ -+ PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); -+ -+ if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) -+ { -+ return (pciIf - MV_PCI_START_IF); -+ } -+ else if (PCI_IF_TYPE_PEX == pciIfType) -+ { -+ return (pciIf - MV_PEX_START_IF); -+ -+ } -+ else -+ { -+ mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); -+ } -+ -+ return 0xffffffff; -+ -+} -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.h b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.h -new file mode 100644 -index 0000000..5f7caaa ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.h -@@ -0,0 +1,134 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCPCIIFH -+#define __INCPCIIFH -+ -+#include "mvSysHwConfig.h" -+#include "pci-if/mvPciIfRegs.h" -+#if defined(MV_INCLUDE_PEX) -+#include "pex/mvPex.h" -+#endif -+#if defined(MV_INCLUDE_PCI) -+#include "pci/mvPci.h" -+#endif -+#include "ctrlEnv/mvCtrlEnvLib.h" -+#include "ctrlEnv/mvCtrlEnvAddrDec.h" -+ -+typedef enum _mvPCIIfType -+{ -+ PCI_IF_TYPE_CONVEN_PCIX, -+ PCI_IF_TYPE_PEX -+ -+}PCI_IF_TYPE; -+ -+typedef enum _mvPCIIfMode -+{ -+ PCI_IF_MODE_HOST, -+ PCI_IF_MODE_DEVICE -+}PCI_IF_MODE; -+ -+ -+/* Global Functions prototypes */ -+ -+/* mvPciIfInit - Initialize PCI interfaces*/ -+MV_STATUS mvPciIfInit(MV_U32 pciIf, PCI_IF_MODE pciIfmode); -+ -+/* mvPciIfConfigRead - Read from configuration space */ -+MV_U32 mvPciIfConfigRead (MV_U32 pciIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func,MV_U32 regOff); -+ -+/* mvPciIfConfigWrite - Write to configuration space */ -+MV_STATUS mvPciIfConfigWrite(MV_U32 pciIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data); -+ -+/* mvPciIfMasterEnable - Enable/disale PCI interface master transactions.*/ -+MV_STATUS mvPciIfMasterEnable(MV_U32 pciIf, MV_BOOL enable); -+ -+/* mvPciIfSlaveEnable - Enable/disale PCI interface slave transactions.*/ -+MV_STATUS mvPciIfSlaveEnable(MV_U32 pciIf,MV_U32 bus, MV_U32 dev, -+ MV_BOOL enable); -+ -+/* mvPciIfLocalBusNumSet - Set PCI interface local bus number.*/ -+MV_STATUS mvPciIfLocalBusNumSet(MV_U32 pciIf, MV_U32 busNum); -+ -+/* mvPciIfLocalBusNumGet - Get PCI interface local bus number.*/ -+MV_U32 mvPciIfLocalBusNumGet(MV_U32 pciIf); -+ -+/* mvPciIfLocalDevNumSet - Set PCI interface local device number.*/ -+MV_STATUS mvPciIfLocalDevNumSet(MV_U32 pciIf, MV_U32 devNum); -+ -+/* mvPciIfLocalDevNumGet - Get PCI interface local device number.*/ -+MV_U32 mvPciIfLocalDevNumGet(MV_U32 pciIf); -+ -+/* mvPciIfTypeGet - Get PCI If type*/ -+PCI_IF_TYPE mvPciIfTypeGet(MV_U32 pciIf); -+ -+MV_U32 mvPciRealIfNumGet(MV_U32 pciIf); -+ -+/* mvPciIfAddrDecShow - Display address decode windows attributes */ -+MV_VOID mvPciIfAddrDecShow(MV_VOID); -+ -+#endif /* #ifndef __INCPCIIFH */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIfRegs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIfRegs.h -new file mode 100644 -index 0000000..754e837 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIfRegs.h -@@ -0,0 +1,245 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCPCIIFREGSH -+#define __INCPCIIFREGSH -+ -+ -+/* defines */ -+#define MAX_PCI_DEVICES 32 -+#define MAX_PCI_FUNCS 8 -+#define MAX_PCI_BUSSES 128 -+ -+/***************************************/ -+/* PCI Configuration registers */ -+/***************************************/ -+ -+/*********************************************/ -+/* PCI Configuration, Function 0, Registers */ -+/*********************************************/ -+ -+ -+/* Standard registers */ -+#define PCI_DEVICE_AND_VENDOR_ID 0x000 -+#define PCI_STATUS_AND_COMMAND 0x004 -+#define PCI_CLASS_CODE_AND_REVISION_ID 0x008 -+#define PCI_BIST_HDR_TYPE_LAT_TMR_CACHE_LINE 0x00C -+#define PCI_MEMORY_BAR_BASE_ADDR(barNum) (0x010 + ((barNum) << 2)) -+#define PCI_SUBSYS_ID_AND_SUBSYS_VENDOR_ID 0x02C -+#define PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030 -+#define PCI_CAPABILTY_LIST_POINTER 0x034 -+#define PCI_INTERRUPT_PIN_AND_LINE 0x03C -+ -+ -+/* PCI Device and Vendor ID Register (PDVIR) */ -+#define PDVIR_VEN_ID_OFFS 0 /* Vendor ID */ -+#define PDVIR_VEN_ID_MASK (0xffff << PDVIR_VEN_ID_OFFS) -+ -+#define PDVIR_DEV_ID_OFFS 16 /* Device ID */ -+#define PDVIR_DEV_ID_MASK (0xffff << PDVIR_DEV_ID_OFFS) -+ -+/* PCI Status and Command Register (PSCR) */ -+#define PSCR_IO_EN BIT0 /* IO Enable */ -+#define PSCR_MEM_EN BIT1 /* Memory Enable */ -+#define PSCR_MASTER_EN BIT2 /* Master Enable */ -+#define PSCR_SPECIAL_EN BIT3 /* Special Cycle Enable */ -+#define PSCR_MEM_WRI_INV BIT4 /* Memory Write and Invalidate Enable */ -+#define PSCR_VGA BIT5 /* VGA Palette Snoops */ -+#define PSCR_PERR_EN BIT6 /* Parity Errors Respond Enable */ -+#define PSCR_ADDR_STEP BIT7 /* Address Stepping Enable (Wait Cycle En)*/ -+#define PSCR_SERR_EN BIT8 /* Ability to assert SERR# line */ -+#define PSCR_FAST_BTB_EN BIT9 /* generate fast back-to-back transactions*/ -+#define PSCR_CAP_LIST BIT20 /* Capability List Support */ -+#define PSCR_66MHZ_EN BIT21 /* 66 MHz Capable */ -+#define PSCR_UDF_EN BIT22 /* User definable features */ -+#define PSCR_TAR_FAST_BB BIT23 /* fast back-to-back transactions capable */ -+#define PSCR_DATA_PERR BIT24 /* Data Parity reported */ -+ -+#define PSCR_DEVSEL_TIM_OFFS 25 /* DEVSEL timing */ -+#define PSCR_DEVSEL_TIM_MASK (0x3 << PSCR_DEVSEL_TIM_OFFS) -+#define PSCR_DEVSEL_TIM_FAST (0x0 << PSCR_DEVSEL_TIM_OFFS) -+#define PSCR_DEVSEL_TIM_MED (0x1 << PSCR_DEVSEL_TIM_OFFS) -+#define PSCR_DEVSEL_TIM_SLOW (0x2 << PSCR_DEVSEL_TIM_OFFS) -+ -+#define PSCR_SLAVE_TABORT BIT27 /* Signalled Target Abort */ -+#define PSCR_MASTER_TABORT BIT28 /* Recieved Target Abort */ -+#define PSCR_MABORT BIT29 /* Recieved Master Abort */ -+#define PSCR_SYSERR BIT30 /* Signalled system error */ -+#define PSCR_DET_PARERR BIT31 /* Detect Parity Error */ -+ -+/* PCI configuration register offset=0x08 fields -+ (PCI_CLASS_CODE_AND_REVISION_ID)(PCCRI) */ -+ -+#define PCCRIR_REVID_OFFS 0 /* Revision ID */ -+#define PCCRIR_REVID_MASK (0xff << PCCRIR_REVID_OFFS) -+ -+#define PCCRIR_FULL_CLASS_OFFS 8 /* Full Class Code */ -+#define PCCRIR_FULL_CLASS_MASK (0xffffff << PCCRIR_FULL_CLASS_OFFS) -+ -+#define PCCRIR_PROGIF_OFFS 8 /* Prog .I/F*/ -+#define PCCRIR_PROGIF_MASK (0xff << PCCRIR_PROGIF_OFFS) -+ -+#define PCCRIR_SUB_CLASS_OFFS 16 /* Sub Class*/ -+#define PCCRIR_SUB_CLASS_MASK (0xff << PCCRIR_SUB_CLASS_OFFS) -+ -+#define PCCRIR_BASE_CLASS_OFFS 24 /* Base Class*/ -+#define PCCRIR_BASE_CLASS_MASK (0xff << PCCRIR_BASE_CLASS_OFFS) -+ -+/* PCI configuration register offset=0x0C fields -+ (PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE)(PBHTLTCL) */ -+ -+#define PBHTLTCLR_CACHELINE_OFFS 0 /* Specifies the cache line size */ -+#define PBHTLTCLR_CACHELINE_MASK (0xff << PBHTLTCLR_CACHELINE_OFFS) -+ -+#define PBHTLTCLR_LATTIMER_OFFS 8 /* latency timer */ -+#define PBHTLTCLR_LATTIMER_MASK (0xff << PBHTLTCLR_LATTIMER_OFFS) -+ -+#define PBHTLTCLR_HEADTYPE_FULL_OFFS 16 /* Full Header Type */ -+#define PBHTLTCLR_HEADTYPE_FULL_MASK (0xff << PBHTLTCLR_HEADTYPE_FULL_OFFS) -+ -+#define PBHTLTCLR_MULTI_FUNC BIT23 /* Multi/Single function */ -+ -+#define PBHTLTCLR_HEADER_OFFS 16 /* Header type */ -+#define PBHTLTCLR_HEADER_MASK (0x7f << PBHTLTCLR_HEADER_OFFS) -+#define PBHTLTCLR_HEADER_STANDARD (0x0 << PBHTLTCLR_HEADER_OFFS) -+#define PBHTLTCLR_HEADER_PCI2PCI_BRIDGE (0x1 << PBHTLTCLR_HEADER_OFFS) -+ -+ -+#define PBHTLTCLR_BISTCOMP_OFFS 24 /* BIST Completion Code */ -+#define PBHTLTCLR_BISTCOMP_MASK (0xf << PBHTLTCLR_BISTCOMP_OFFS) -+ -+#define PBHTLTCLR_BISTACT BIT30 /* BIST Activate bit */ -+#define PBHTLTCLR_BISTCAP BIT31 /* BIST Capable Bit */ -+ -+ -+/* PCI Bar Base Low Register (PBBLR) */ -+#define PBBLR_IOSPACE BIT0 /* Memory Space Indicator */ -+ -+#define PBBLR_TYPE_OFFS 1 /* BAR Type/Init Val. */ -+#define PBBLR_TYPE_MASK (0x3 << PBBLR_TYPE_OFFS) -+#define PBBLR_TYPE_32BIT_ADDR (0x0 << PBBLR_TYPE_OFFS) -+#define PBBLR_TYPE_64BIT_ADDR (0x2 << PBBLR_TYPE_OFFS) -+ -+#define PBBLR_PREFETCH_EN BIT3 /* Prefetch Enable */ -+ -+ -+#define PBBLR_MEM_BASE_OFFS 4 /* Memory Bar Base address. Corresponds to -+ address bits [31:4] */ -+#define PBBLR_MEM_BASE_MASK (0xfffffff << PBBLR_MEM_BASE_OFFS) -+ -+#define PBBLR_IO_BASE_OFFS 2 /* IO Bar Base address. Corresponds to -+ address bits [31:2] */ -+#define PBBLR_IO_BASE_MASK (0x3fffffff << PBBLR_IO_BASE_OFFS) -+ -+ -+#define PBBLR_BASE_OFFS 12 /* Base address. Address bits [31:12] */ -+#define PBBLR_BASE_MASK (0xfffff << PBBLR_BASE_OFFS) -+#define PBBLR_BASE_ALIGNMET (1 << PBBLR_BASE_OFFS) -+ -+ -+/* PCI Bar Base High Fegister (PBBHR) */ -+#define PBBHR_BASE_OFFS 0 /* Base address. Address bits [31:12] */ -+#define PBBHR_BASE_MASK (0xffffffff << PBBHR_BASE_OFFS) -+ -+ -+/* PCI configuration register offset=0x2C fields -+ (PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID)(PSISVI) */ -+ -+#define PSISVIR_VENID_OFFS 0 /* Subsystem Manufacturer Vendor ID Number */ -+#define PSISVIR_VENID_MASK (0xffff << PSISVIR_VENID_OFFS) -+ -+#define PSISVIR_DEVID_OFFS 16 /* Subsystem Device ID Number */ -+#define PSISVIR_DEVID_MASK (0xffff << PSISVIR_DEVID_OFFS) -+ -+/* PCI configuration register offset=0x30 fields -+ (PCI_EXPANSION_ROM_BASE_ADDR_REG)(PERBA) */ -+ -+#define PERBAR_EXPROMEN BIT0 /* Expansion ROM Enable */ -+ -+#define PERBAR_BASE_OFFS 12 /* Expansion ROM Base Address */ -+#define PERBAR_BASE_MASK (0xfffff << PERBAR_BASE_OFFS) -+ -+/* PCI configuration register offset=0x34 fields -+ (PCI_CAPABILTY_LIST_POINTER)(PCLP) */ -+ -+#define PCLPR_CAPPTR_OFFS 0 /* Capability List Pointer */ -+#define PCLPR_CAPPTR_MASK (0xff << PCLPR_CAPPTR_OFFS) -+ -+/* PCI configuration register offset=0x3C fields -+ (PCI_INTERRUPT_PIN_AND_LINE)(PIPL) */ -+ -+#define PIPLR_INTLINE_OFFS 0 /* Interrupt line (IRQ) */ -+#define PIPLR_INTLINE_MASK (0xff << PIPLR_INTLINE_OFFS) -+ -+#define PIPLR_INTPIN_OFFS 8 /* interrupt pin (A,B,C,D) */ -+#define PIPLR_INTPIN_MASK (0xff << PIPLR_INTPIN_OFFS) -+ -+#define PIPLR_MINGRANT_OFFS 16 /* Minimum Grant on 250 nano seconds units */ -+#define PIPLR_MINGRANT_MASK (0xff << PIPLR_MINGRANT_OFFS) -+ -+#define PIPLR_MAXLATEN_OFFS 24 /* Maximum latency on 250 nano seconds units */ -+#define PIPLR_MAXLATEN_MASK (0xff << PIPLR_MAXLATEN_OFFS) -+ -+#endif /* #ifndef __INCPCIIFREGSH */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.c b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.c -new file mode 100644 -index 0000000..6de1b0c ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.c -@@ -0,0 +1,1006 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+/* includes */ -+#include "mvPciUtils.h" -+ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+ -+/* #define MV_DEBUG */ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+ #define mvOsPrintf printf -+#else -+ #define DB(x) -+#endif -+ -+/* -+This module only support scanning of Header type 00h of pci devices -+There is no suppotr for Header type 01h of pci devices ( PCI bridges ) -+*/ -+ -+ -+static MV_STATUS pciDetectDevice(MV_U32 pciIf, -+ MV_U32 bus, -+ MV_U32 dev, -+ MV_U32 func, -+ MV_PCI_DEVICE *pPciAgent); -+ -+static MV_U32 pciDetectDeviceBars(MV_U32 pciIf, -+ MV_U32 bus, -+ MV_U32 dev, -+ MV_U32 func, -+ MV_PCI_DEVICE *pPciAgent); -+ -+ -+ -+ -+ -+ -+/******************************************************************************* -+* mvPciScan - Scan a PCI interface bus -+* -+* DESCRIPTION: -+* Performs a full scan on a PCI interface and returns all possible details -+* on the agents found on the bus. -+* -+* INPUT: -+* pciIf - PCI Interface -+* pPciAgents - Pointer to an Array of the pci agents to be detected -+* pPciAgentsNum - pPciAgents array maximum number of elements -+* -+* OUTPUT: -+* pPciAgents - Array of the pci agents detected on the bus -+* pPciAgentsNum - Number of pci agents detected on the bus -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+ -+MV_STATUS mvPciScan(MV_U32 pciIf, -+ MV_PCI_DEVICE *pPciAgents, -+ MV_U32 *pPciAgentsNum) -+{ -+ -+ MV_U32 devIndex,funcIndex=0,busIndex=0,detectedDevNum=0; -+ MV_U32 localBus=mvPciIfLocalBusNumGet(pciIf); -+ MV_PCI_DEVICE *pPciDevice; -+ MV_PCI_DEVICE *pMainDevice; -+ -+ DB(mvOsPrintf("mvPciScan: PCI interface num %d\n", pciIf)); -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPexMaxIfGet()) -+ { -+ DB(mvOsPrintf("mvPciScan: ERR. Invalid PCI interface num %d\n", pciIf)); -+ return MV_BAD_PARAM; -+ } -+ if (NULL == pPciAgents) -+ { -+ DB(mvOsPrintf("mvPciScan: ERR. pPciAgents=NULL \n")); -+ return MV_BAD_PARAM; -+ } -+ if (NULL == pPciAgentsNum) -+ { -+ DB(mvOsPrintf("mvPciScan: ERR. pPciAgentsNum=NULL \n")); -+ return MV_BAD_PARAM; -+ } -+ -+ -+ DB(mvOsPrintf("mvPciScan: PCI interface num %d mvPciMasterEnable\n", pciIf)); -+ /* Master enable the MV PCI master */ -+ if (MV_OK != mvPciIfMasterEnable(pciIf,MV_TRUE)) -+ { -+ DB(mvOsPrintf("mvPciScan: ERR. mvPciMasterEnable failed \n")); -+ return MV_ERROR; -+ -+ } -+ -+ DB(mvOsPrintf("mvPciScan: PCI interface num scan%d\n", pciIf)); -+ -+ /* go through all busses */ -+ for (busIndex=localBus ; busIndex < MAX_PCI_BUSSES ; busIndex++) -+ { -+ /* go through all possible devices on the local bus */ -+ for (devIndex=0 ; devIndex < MAX_PCI_DEVICES ; devIndex++) -+ { -+ /* always start with function equal to zero */ -+ funcIndex=0; -+ -+ pPciDevice=&pPciAgents[detectedDevNum]; -+ DB(mvOsPrintf("mvPciScan: PCI interface num scan%d:%d\n", busIndex, devIndex)); -+ -+ if (MV_ERROR == pciDetectDevice(pciIf, -+ busIndex, -+ devIndex, -+ funcIndex, -+ pPciDevice)) -+ { -+ /* no device detected , try the next address */ -+ continue; -+ } -+ -+ /* We are here ! means we have detected a device*/ -+ /* always we start with only one function per device */ -+ pMainDevice = pPciDevice; -+ pPciDevice->funtionsNum = 1; -+ -+ -+ /* move on */ -+ detectedDevNum++; -+ -+ -+ /* check if we have no more room for a new device */ -+ if (detectedDevNum == *pPciAgentsNum) -+ { -+ DB(mvOsPrintf("mvPciScan: ERR. array passed too small \n")); -+ return MV_ERROR; -+ } -+ -+ /* check the detected device if it is a multi functional device then -+ scan all device functions*/ -+ if (pPciDevice->isMultiFunction == MV_TRUE) -+ { -+ /* start with function number 1 because we have already detected -+ function 0 */ -+ for (funcIndex=1; funcIndex<MAX_PCI_FUNCS ; funcIndex++) -+ { -+ pPciDevice=&pPciAgents[detectedDevNum]; -+ -+ if (MV_ERROR == pciDetectDevice(pciIf, -+ busIndex, -+ devIndex, -+ funcIndex, -+ pPciDevice)) -+ { -+ /* no device detected means no more functions !*/ -+ continue; -+ } -+ /* We are here ! means we have detected a device */ -+ -+ /* move on */ -+ pMainDevice->funtionsNum++; -+ detectedDevNum++; -+ -+ /* check if we have no more room for a new device */ -+ if (detectedDevNum == *pPciAgentsNum) -+ { -+ DB(mvOsPrintf("mvPciScan: ERR. Array too small\n")); -+ return MV_ERROR; -+ } -+ -+ -+ } -+ } -+ -+ } -+ -+ } -+ -+ /* return the number of devices actually detected on the bus ! */ -+ *pPciAgentsNum = detectedDevNum; -+ -+ return MV_OK; -+ -+} -+ -+ -+/******************************************************************************* -+* pciDetectDevice - Detect a pci device parameters -+* -+* DESCRIPTION: -+* This function detect if a pci agent exist on certain address ! -+* and if exists then it fills all possible information on the -+* agent -+* -+* INPUT: -+* pciIf - PCI Interface -+* bus - Bus number -+* dev - Device number -+* func - Function number -+* -+* -+* -+* OUTPUT: -+* pPciAgent - pointer to the pci agent filled with its information -+* -+* RETURN: -+* MV_ERROR if no device , MV_OK otherwise -+* -+*******************************************************************************/ -+ -+static MV_STATUS pciDetectDevice(MV_U32 pciIf, -+ MV_U32 bus, -+ MV_U32 dev, -+ MV_U32 func, -+ MV_PCI_DEVICE *pPciAgent) -+{ -+ MV_U32 pciData; -+ -+ /* no Parameters checking ! because it is static function and it is assumed -+ that all parameters were checked in the calling function */ -+ -+ -+ /* Try read the PCI Vendor ID and Device ID */ -+ -+ /* We will scan only ourselves and the PCI slots that exist on the -+ board, because we may have a case that we have one slot that has -+ a Cardbus connector, and because CardBus answers all IDsels we want -+ to scan only this slot and ourseleves. -+ -+ */ -+ #if defined(MV_INCLUDE_PCI) -+ if ((PCI_IF_TYPE_CONVEN_PCIX == mvPciIfTypeGet(pciIf)) && -+ (DB_88F5181_DDR1_PRPMC != mvBoardIdGet()) && -+ (DB_88F5181_DDR1_PEXPCI != mvBoardIdGet()) && -+ (DB_88F5181_DDR1_MNG != mvBoardIdGet())) -+ { -+ -+ if (mvBoardIsOurPciSlot(bus, dev) == MV_FALSE) -+ { -+ return MV_ERROR; -+ } -+ } -+ #endif /* defined(MV_INCLUDE_PCI) */ -+ -+ pciData = mvPciIfConfigRead(pciIf, bus,dev,func, PCI_DEVICE_AND_VENDOR_ID); -+ -+ if (PCI_ERROR_CODE == pciData) -+ { -+ /* no device exist */ -+ return MV_ERROR; -+ } -+ -+ /* we are here ! means a device is detected */ -+ -+ /* fill basic information */ -+ pPciAgent->busNumber=bus; -+ pPciAgent->deviceNum=dev; -+ pPciAgent->function=func; -+ -+ /* Fill the PCI Vendor ID and Device ID */ -+ -+ pPciAgent->venID = (pciData & PDVIR_VEN_ID_MASK) >> PDVIR_VEN_ID_OFFS; -+ pPciAgent->deviceID = (pciData & PDVIR_DEV_ID_MASK) >> PDVIR_DEV_ID_OFFS; -+ -+ /* Read Status and command */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_STATUS_AND_COMMAND); -+ -+ -+ /* Fill related Status and Command information*/ -+ -+ if (pciData & PSCR_TAR_FAST_BB) -+ { -+ pPciAgent->isFastB2BCapable = MV_TRUE; -+ } -+ else -+ { -+ pPciAgent->isFastB2BCapable = MV_FALSE; -+ } -+ -+ if (pciData & PSCR_CAP_LIST) -+ { -+ pPciAgent->isCapListSupport=MV_TRUE; -+ } -+ else -+ { -+ pPciAgent->isCapListSupport=MV_FALSE; -+ } -+ -+ if (pciData & PSCR_66MHZ_EN) -+ { -+ pPciAgent->is66MHZCapable=MV_TRUE; -+ } -+ else -+ { -+ pPciAgent->is66MHZCapable=MV_FALSE; -+ } -+ -+ /* Read Class Code and Revision */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_CLASS_CODE_AND_REVISION_ID); -+ -+ -+ pPciAgent->baseClassCode = -+ (pciData & PCCRIR_BASE_CLASS_MASK) >> PCCRIR_BASE_CLASS_OFFS; -+ -+ pPciAgent->subClassCode = -+ (pciData & PCCRIR_SUB_CLASS_MASK) >> PCCRIR_SUB_CLASS_OFFS; -+ -+ pPciAgent->progIf = -+ (pciData & PCCRIR_PROGIF_MASK) >> PCCRIR_PROGIF_OFFS; -+ -+ pPciAgent->revisionID = -+ (pciData & PCCRIR_REVID_MASK) >> PCCRIR_REVID_OFFS; -+ -+ /* Read PCI_BIST_HDR_TYPE_LAT_TMR_CACHE_LINE */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_BIST_HDR_TYPE_LAT_TMR_CACHE_LINE); -+ -+ -+ -+ pPciAgent->pciCacheLine= -+ (pciData & PBHTLTCLR_CACHELINE_MASK ) >> PBHTLTCLR_CACHELINE_OFFS; -+ pPciAgent->pciLatencyTimer= -+ (pciData & PBHTLTCLR_LATTIMER_MASK) >> PBHTLTCLR_LATTIMER_OFFS; -+ -+ switch (pciData & PBHTLTCLR_HEADER_MASK) -+ { -+ case PBHTLTCLR_HEADER_STANDARD: -+ -+ pPciAgent->pciHeader=MV_PCI_STANDARD; -+ break; -+ case PBHTLTCLR_HEADER_PCI2PCI_BRIDGE: -+ -+ pPciAgent->pciHeader=MV_PCI_PCI2PCI_BRIDGE; -+ break; -+ -+ } -+ -+ if (pciData & PBHTLTCLR_MULTI_FUNC) -+ { -+ pPciAgent->isMultiFunction=MV_TRUE; -+ } -+ else -+ { -+ pPciAgent->isMultiFunction=MV_FALSE; -+ } -+ -+ if (pciData & PBHTLTCLR_BISTCAP) -+ { -+ pPciAgent->isBISTCapable=MV_TRUE; -+ } -+ else -+ { -+ pPciAgent->isBISTCapable=MV_FALSE; -+ } -+ -+ -+ /* read this device pci bars */ -+ -+ pciDetectDeviceBars(pciIf, -+ bus,dev,func, -+ pPciAgent); -+ -+ -+ /* check if we are bridge*/ -+ if ((pPciAgent->baseClassCode == PCI_BRIDGE_CLASS)&& -+ (pPciAgent->subClassCode == P2P_BRIDGE_SUB_CLASS_CODE)) -+ { -+ -+ /* Read P2P_BUSSES_NUM */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ P2P_BUSSES_NUM); -+ -+ pPciAgent->p2pPrimBusNum = -+ (pciData & PBM_PRIME_BUS_NUM_MASK) >> PBM_PRIME_BUS_NUM_OFFS; -+ -+ pPciAgent->p2pSecBusNum = -+ (pciData & PBM_SEC_BUS_NUM_MASK) >> PBM_SEC_BUS_NUM_OFFS; -+ -+ pPciAgent->p2pSubBusNum = -+ (pciData & PBM_SUB_BUS_NUM_MASK) >> PBM_SUB_BUS_NUM_OFFS; -+ -+ pPciAgent->p2pSecLatencyTimer = -+ (pciData & PBM_SEC_LAT_TMR_MASK) >> PBM_SEC_LAT_TMR_OFFS; -+ -+ /* Read P2P_IO_BASE_LIMIT_SEC_STATUS */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ P2P_IO_BASE_LIMIT_SEC_STATUS); -+ -+ pPciAgent->p2pSecStatus = -+ (pciData & PIBLSS_SEC_STATUS_MASK) >> PIBLSS_SEC_STATUS_OFFS; -+ -+ -+ pPciAgent->p2pIObase = -+ (pciData & PIBLSS_IO_BASE_MASK) << PIBLSS_IO_LIMIT_OFFS; -+ -+ /* clear low address (should be zero)*/ -+ pPciAgent->p2pIObase &= PIBLSS_HIGH_ADDR_MASK; -+ -+ pPciAgent->p2pIOLimit = -+ (pciData & PIBLSS_IO_LIMIT_MASK); -+ -+ /* fill low address with 0xfff */ -+ pPciAgent->p2pIOLimit |= PIBLSS_LOW_ADDR_MASK; -+ -+ -+ switch ((pciData & PIBLSS_ADD_CAP_MASK) >> PIBLSS_ADD_CAP_OFFS) -+ { -+ case PIBLSS_ADD_CAP_16BIT: -+ -+ pPciAgent->bIO32 = MV_FALSE; -+ -+ break; -+ case PIBLSS_ADD_CAP_32BIT: -+ -+ pPciAgent->bIO32 = MV_TRUE; -+ -+ /* Read P2P_IO_BASE_LIMIT_UPPER_16 */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ P2P_IO_BASE_LIMIT_UPPER_16); -+ -+ pPciAgent->p2pIObase |= -+ (pciData & PRBU_IO_UPP_BASE_MASK) << PRBU_IO_UPP_LIMIT_OFFS; -+ -+ -+ pPciAgent->p2pIOLimit |= -+ (pciData & PRBU_IO_UPP_LIMIT_MASK); -+ -+ break; -+ -+ } -+ -+ -+ /* Read P2P_MEM_BASE_LIMIT */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ P2P_MEM_BASE_LIMIT); -+ -+ pPciAgent->p2pMemBase = -+ (pciData & PMBL_MEM_BASE_MASK) << PMBL_MEM_LIMIT_OFFS; -+ -+ /* clear low address */ -+ pPciAgent->p2pMemBase &= PMBL_HIGH_ADDR_MASK; -+ -+ pPciAgent->p2pMemLimit = -+ (pciData & PMBL_MEM_LIMIT_MASK); -+ -+ /* add 0xfffff */ -+ pPciAgent->p2pMemLimit |= PMBL_LOW_ADDR_MASK; -+ -+ -+ /* Read P2P_PREF_MEM_BASE_LIMIT */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ P2P_PREF_MEM_BASE_LIMIT); -+ -+ -+ pPciAgent->p2pPrefMemBase = -+ (pciData & PRMBL_PREF_MEM_BASE_MASK) << PRMBL_PREF_MEM_LIMIT_OFFS; -+ -+ /* get high address only */ -+ pPciAgent->p2pPrefMemBase &= PRMBL_HIGH_ADDR_MASK; -+ -+ -+ -+ pPciAgent->p2pPrefMemLimit = -+ (pciData & PRMBL_PREF_MEM_LIMIT_MASK); -+ -+ /* add 0xfffff */ -+ pPciAgent->p2pPrefMemLimit |= PRMBL_LOW_ADDR_MASK; -+ -+ switch (pciData & PRMBL_ADD_CAP_MASK) -+ { -+ case PRMBL_ADD_CAP_32BIT: -+ -+ pPciAgent->bPrefMem64 = MV_FALSE; -+ -+ /* Read P2P_PREF_BASE_UPPER_32 */ -+ pPciAgent->p2pPrefBaseUpper32Bits = 0; -+ -+ /* Read P2P_PREF_LIMIT_UPPER_32 */ -+ pPciAgent->p2pPrefLimitUpper32Bits = 0; -+ -+ break; -+ case PRMBL_ADD_CAP_64BIT: -+ -+ pPciAgent->bPrefMem64 = MV_TRUE; -+ -+ /* Read P2P_PREF_BASE_UPPER_32 */ -+ pPciAgent->p2pPrefBaseUpper32Bits = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ P2P_PREF_BASE_UPPER_32); -+ -+ /* Read P2P_PREF_LIMIT_UPPER_32 */ -+ pPciAgent->p2pPrefLimitUpper32Bits = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ P2P_PREF_LIMIT_UPPER_32); -+ -+ break; -+ -+ } -+ -+ } -+ else /* no bridge */ -+ { -+ /* Read PCI_SUBSYS_ID_AND_SUBSYS_VENDOR_ID */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_SUBSYS_ID_AND_SUBSYS_VENDOR_ID); -+ -+ -+ pPciAgent->subSysVenID = -+ (pciData & PSISVIR_VENID_MASK) >> PSISVIR_VENID_OFFS; -+ pPciAgent->subSysID = -+ (pciData & PSISVIR_DEVID_MASK) >> PSISVIR_DEVID_OFFS; -+ -+ -+ /* Read PCI_EXPANSION_ROM_BASE_ADDR_REG */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_EXPANSION_ROM_BASE_ADDR_REG); -+ -+ -+ if (pciData & PERBAR_EXPROMEN) -+ { -+ pPciAgent->isExpRom = MV_TRUE; -+ } -+ else -+ { -+ pPciAgent->isExpRom = MV_FALSE; -+ } -+ -+ pPciAgent->expRomAddr = -+ (pciData & PERBAR_BASE_MASK) >> PERBAR_BASE_OFFS; -+ -+ } -+ -+ -+ if (MV_TRUE == pPciAgent->isCapListSupport) -+ { -+ /* Read PCI_CAPABILTY_LIST_POINTER */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_CAPABILTY_LIST_POINTER); -+ -+ pPciAgent->capListPointer = -+ (pciData & PCLPR_CAPPTR_MASK) >> PCLPR_CAPPTR_OFFS; -+ -+ } -+ -+ /* Read PCI_INTERRUPT_PIN_AND_LINE */ -+ pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_INTERRUPT_PIN_AND_LINE); -+ -+ -+ pPciAgent->irqLine= -+ (pciData & PIPLR_INTLINE_MASK) >> PIPLR_INTLINE_OFFS; -+ -+ pPciAgent->intPin= -+ (MV_PCI_INT_PIN)(pciData & PIPLR_INTPIN_MASK) >> PIPLR_INTPIN_OFFS; -+ -+ pPciAgent->minGrant= -+ (pciData & PIPLR_MINGRANT_MASK) >> PIPLR_MINGRANT_OFFS; -+ pPciAgent->maxLatency= -+ (pciData & PIPLR_MAXLATEN_MASK) >> PIPLR_MAXLATEN_OFFS; -+ -+ mvPciClassNameGet(pPciAgent->baseClassCode, -+ (MV_8 *)pPciAgent->type); -+ -+ return MV_OK; -+ -+ -+} -+ -+/******************************************************************************* -+* pciDetectDeviceBars - Detect a pci device bars -+* -+* DESCRIPTION: -+* This function detects all pci agent bars -+* -+* INPUT: -+* pciIf - PCI Interface -+* bus - Bus number -+* dev - Device number -+* func - Function number -+* -+* -+* -+* OUTPUT: -+* pPciAgent - pointer to the pci agent filled with its information -+* -+* RETURN: -+* detected bars number -+* -+*******************************************************************************/ -+static MV_U32 pciDetectDeviceBars(MV_U32 pciIf, -+ MV_U32 bus, -+ MV_U32 dev, -+ MV_U32 func, -+ MV_PCI_DEVICE *pPciAgent) -+{ -+ MV_U32 pciData,barIndex,detectedBar=0; -+ MV_U32 tmpBaseHigh=0,tmpBaseLow=0; -+ MV_U32 pciMaxBars=0; -+ -+ pPciAgent->barsNum=0; -+ -+ /* check if we are bridge*/ -+ if ((pPciAgent->baseClassCode == PCI_BRIDGE_CLASS)&& -+ (pPciAgent->subClassCode == P2P_BRIDGE_SUB_CLASS_CODE)) -+ { -+ pciMaxBars = 2; -+ } -+ else /* no bridge */ -+ { -+ pciMaxBars = 6; -+ } -+ -+ /* read this device pci bars */ -+ for (barIndex = 0 ; barIndex < pciMaxBars ; barIndex++ ) -+ { -+ /* Read PCI_MEMORY_BAR_BASE_ADDR */ -+ tmpBaseLow = pciData = mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex)); -+ -+ pPciAgent->pciBar[detectedBar].barOffset = -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex); -+ -+ /* check if the bar is 32bit or 64bit bar */ -+ switch (pciData & PBBLR_TYPE_MASK) -+ { -+ case PBBLR_TYPE_32BIT_ADDR: -+ pPciAgent->pciBar[detectedBar].barType = PCI_32BIT_BAR; -+ break; -+ case PBBLR_TYPE_64BIT_ADDR: -+ pPciAgent->pciBar[detectedBar].barType = PCI_64BIT_BAR; -+ break; -+ -+ } -+ -+ /* check if it is memory or IO bar */ -+ if (pciData & PBBLR_IOSPACE) -+ { -+ pPciAgent->pciBar[detectedBar].barMapping=PCI_IO_BAR; -+ } -+ else -+ { -+ pPciAgent->pciBar[detectedBar].barMapping=PCI_MEMORY_BAR; -+ } -+ -+ /* if it is memory bar then check if it is prefetchable */ -+ if (PCI_MEMORY_BAR == pPciAgent->pciBar[detectedBar].barMapping) -+ { -+ if (pciData & PBBLR_PREFETCH_EN) -+ { -+ pPciAgent->pciBar[detectedBar].isPrefetchable = MV_TRUE; -+ } -+ else -+ { -+ pPciAgent->pciBar[detectedBar].isPrefetchable = MV_FALSE; -+ } -+ -+ pPciAgent->pciBar[detectedBar].barBaseLow = -+ pciData & PBBLR_MEM_BASE_MASK; -+ -+ -+ } -+ else /* IO Bar */ -+ { -+ pPciAgent->pciBar[detectedBar].barBaseLow = -+ pciData & PBBLR_IO_BASE_MASK; -+ -+ } -+ -+ pPciAgent->pciBar[detectedBar].barBaseHigh=0; -+ -+ if (PCI_64BIT_BAR == pPciAgent->pciBar[detectedBar].barType) -+ { -+ barIndex++; -+ -+ tmpBaseHigh = pPciAgent->pciBar[detectedBar].barBaseHigh = -+ mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex)); -+ -+ -+ } -+ -+ /* calculating full base address (64bit) */ -+ pPciAgent->pciBar[detectedBar].barBaseAddr = -+ (MV_U64)pPciAgent->pciBar[detectedBar].barBaseHigh; -+ -+ pPciAgent->pciBar[detectedBar].barBaseAddr <<= 32; -+ -+ pPciAgent->pciBar[detectedBar].barBaseAddr |= -+ (MV_U64)pPciAgent->pciBar[detectedBar].barBaseLow; -+ -+ -+ -+ /* get the sizes of the the bar */ -+ -+ pPciAgent->pciBar[detectedBar].barSizeHigh=0; -+ -+ if ((PCI_64BIT_BAR == pPciAgent->pciBar[detectedBar].barType) && -+ (PCI_MEMORY_BAR == pPciAgent->pciBar[detectedBar].barMapping)) -+ -+ { -+ /* write oxffffffff to the bar to get the size */ -+ /* start with sizelow ( original value was saved in tmpBaseLow ) */ -+ mvPciIfConfigWrite(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex-1), -+ 0xffffffff); -+ -+ /* read size */ -+ pPciAgent->pciBar[detectedBar].barSizeLow = -+ mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex-1)); -+ -+ -+ -+ /* restore original value */ -+ mvPciIfConfigWrite(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex-1), -+ tmpBaseLow); -+ -+ -+ /* now do the same for BaseHigh */ -+ -+ /* write oxffffffff to the bar to get the size */ -+ mvPciIfConfigWrite(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex), -+ 0xffffffff); -+ -+ /* read size */ -+ pPciAgent->pciBar[detectedBar].barSizeHigh = -+ mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex)); -+ -+ /* restore original value */ -+ mvPciIfConfigWrite(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex), -+ tmpBaseHigh); -+ -+ if ((0 == pPciAgent->pciBar[detectedBar].barSizeLow)&& -+ (0 == pPciAgent->pciBar[detectedBar].barSizeHigh)) -+ { -+ /* this bar is not applicable for this device, -+ ignore all previous settings and check the next bar*/ -+ -+ /* we though this was a 64bit bar , and it seems this -+ was wrong ! so decrement barIndex */ -+ barIndex--; -+ continue; -+ } -+ -+ /* calculate the full 64 bit size */ -+ -+ if (0 != pPciAgent->pciBar[detectedBar].barSizeHigh) -+ { -+ pPciAgent->pciBar[detectedBar].barSizeLow &= PBBLR_MEM_BASE_MASK; -+ -+ pPciAgent->pciBar[detectedBar].barSizeLow = -+ ~pPciAgent->pciBar[detectedBar].barSizeLow + 1; -+ -+ pPciAgent->pciBar[detectedBar].barSizeHigh = 0; -+ -+ } -+ else -+ { -+ -+ pPciAgent->pciBar[detectedBar].barSizeLow &= PBBLR_MEM_BASE_MASK; -+ -+ pPciAgent->pciBar[detectedBar].barSizeLow = -+ ~pPciAgent->pciBar[detectedBar].barSizeLow + 1; -+ -+ pPciAgent->pciBar[detectedBar].barSizeHigh = 0; -+ -+ } -+ -+ -+ -+ } -+ else /* 32bit bar */ -+ { -+ /* write oxffffffff to the bar to get the size */ -+ mvPciIfConfigWrite(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex), -+ 0xffffffff); -+ -+ /* read size */ -+ pPciAgent->pciBar[detectedBar].barSizeLow = -+ mvPciIfConfigRead(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex)); -+ -+ if (0 == pPciAgent->pciBar[detectedBar].barSizeLow) -+ { -+ /* this bar is not applicable for this device, -+ ignore all previous settings and check the next bar*/ -+ continue; -+ } -+ -+ -+ /* restore original value */ -+ mvPciIfConfigWrite(pciIf, -+ bus,dev,func, -+ PCI_MEMORY_BAR_BASE_ADDR(barIndex), -+ tmpBaseLow); -+ -+ /* calculate size low */ -+ -+ if (PCI_MEMORY_BAR == pPciAgent->pciBar[detectedBar].barMapping) -+ { -+ pPciAgent->pciBar[detectedBar].barSizeLow &= PBBLR_MEM_BASE_MASK; -+ } -+ else -+ { -+ pPciAgent->pciBar[detectedBar].barSizeLow &= PBBLR_IO_BASE_MASK; -+ } -+ -+ pPciAgent->pciBar[detectedBar].barSizeLow = -+ ~pPciAgent->pciBar[detectedBar].barSizeLow + 1; -+ -+ pPciAgent->pciBar[detectedBar].barSizeHigh = 0; -+ pPciAgent->pciBar[detectedBar].barSize = -+ (MV_U64)pPciAgent->pciBar[detectedBar].barSizeLow; -+ -+ -+ } -+ -+ /* we are here ! this means we have already detected a bar for -+ this device , now move on */ -+ -+ detectedBar++; -+ pPciAgent->barsNum++; -+ } -+ -+ return detectedBar; -+} -+ -+ -+/******************************************************************************* -+* mvPciClassNameGet - get PCI class name -+* -+* DESCRIPTION: -+* This function returns the PCI class name -+* -+* INPUT: -+* baseClassCode - Base Class Code. -+* -+* OUTPUT: -+* pType - the class name -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciClassNameGet(MV_U32 baseClassCode, MV_8 *pType) -+{ -+ -+ switch(baseClassCode) -+ { -+ case 0x0: -+ strcpy(pType,"Old generation device"); -+ break; -+ case 0x1: -+ strcpy(pType,"Mass storage controller"); -+ break; -+ case 0x2: -+ strcpy(pType,"Network controller"); -+ break; -+ case 0x3: -+ strcpy(pType,"Display controller"); -+ break; -+ case 0x4: -+ strcpy(pType,"Multimedia device"); -+ break; -+ case 0x5: -+ strcpy(pType,"Memory controller"); -+ break; -+ case 0x6: -+ strcpy(pType,"Bridge Device"); -+ break; -+ case 0x7: -+ strcpy(pType,"Simple Communication controllers"); -+ break; -+ case 0x8: -+ strcpy(pType,"Base system peripherals"); -+ break; -+ case 0x9: -+ strcpy(pType,"Input Devices"); -+ break; -+ case 0xa: -+ strcpy(pType,"Docking stations"); -+ break; -+ case 0xb: -+ strcpy(pType,"Processors"); -+ break; -+ case 0xc: -+ strcpy(pType,"Serial bus controllers"); -+ break; -+ case 0xd: -+ strcpy(pType,"Wireless controllers"); -+ break; -+ case 0xe: -+ strcpy(pType,"Intelligent I/O controllers"); -+ break; -+ case 0xf: -+ strcpy(pType,"Satellite communication controllers"); -+ break; -+ case 0x10: -+ strcpy(pType,"Encryption/Decryption controllers"); -+ break; -+ case 0x11: -+ strcpy(pType,"Data acquisition and signal processing controllers"); -+ break; -+ default: -+ strcpy(pType,"Unknown device"); -+ break; -+ } -+ -+ return MV_OK; -+ -+} -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.h b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.h -new file mode 100644 -index 0000000..444f53c ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.h -@@ -0,0 +1,323 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvPciUtilsh -+#define __INCmvPciUtilsh -+ -+/* -+This module only support scanning of Header type 00h of pci devices -+There is no suppotr for Header type 01h of pci devices ( PCI bridges ) -+*/ -+ -+/* includes */ -+#include "mvSysHwConfig.h" -+#include "pci-if/mvPciIf.h" -+#include "pci/mvPciRegs.h" -+ -+ -+ -+/* PCI base address low bar mask */ -+#define PCI_ERROR_CODE 0xffffffff -+ -+#define PCI_BRIDGE_CLASS 0x6 -+#define P2P_BRIDGE_SUB_CLASS_CODE 0x4 -+ -+ -+#define P2P_BUSSES_NUM 0x18 -+#define P2P_IO_BASE_LIMIT_SEC_STATUS 0x1C -+#define P2P_MEM_BASE_LIMIT 0x20 -+#define P2P_PREF_MEM_BASE_LIMIT 0x24 -+#define P2P_PREF_BASE_UPPER_32 0x28 -+#define P2P_PREF_LIMIT_UPPER_32 0x2C -+#define P2P_IO_BASE_LIMIT_UPPER_16 0x30 -+#define P2P_EXP_ROM 0x38 -+ -+/* P2P_BUSSES_NUM (PBM) */ -+ -+#define PBM_PRIME_BUS_NUM_OFFS 0 -+#define PBM_PRIME_BUS_NUM_MASK (0xff << PBM_PRIME_BUS_NUM_OFFS) -+ -+#define PBM_SEC_BUS_NUM_OFFS 8 -+#define PBM_SEC_BUS_NUM_MASK (0xff << PBM_SEC_BUS_NUM_OFFS) -+ -+#define PBM_SUB_BUS_NUM_OFFS 16 -+#define PBM_SUB_BUS_NUM_MASK (0xff << PBM_SUB_BUS_NUM_OFFS) -+ -+#define PBM_SEC_LAT_TMR_OFFS 24 -+#define PBM_SEC_LAT_TMR_MASK (0xff << PBM_SEC_LAT_TMR_OFFS) -+ -+/* P2P_IO_BASE_LIMIT_SEC_STATUS (PIBLSS) */ -+ -+#define PIBLSS_IO_BASE_OFFS 0 -+#define PIBLSS_IO_BASE_MASK (0xff << PIBLSS_IO_BASE_OFFS) -+ -+#define PIBLSS_ADD_CAP_OFFS 0 -+#define PIBLSS_ADD_CAP_MASK (0x3 << PIBLSS_ADD_CAP_OFFS) -+#define PIBLSS_ADD_CAP_16BIT (0x0 << PIBLSS_ADD_CAP_OFFS) -+#define PIBLSS_ADD_CAP_32BIT (0x1 << PIBLSS_ADD_CAP_OFFS) -+ -+#define PIBLSS_LOW_ADDR_OFFS 0 -+#define PIBLSS_LOW_ADDR_MASK (0xFFF << PIBLSS_LOW_ADDR_OFFS) -+ -+#define PIBLSS_HIGH_ADDR_OFFS 12 -+#define PIBLSS_HIGH_ADDR_MASK (0xF << PIBLSS_HIGH_ADDR_OFFS) -+ -+#define PIBLSS_IO_LIMIT_OFFS 8 -+#define PIBLSS_IO_LIMIT_MASK (0xff << PIBLSS_IO_LIMIT_OFFS) -+ -+#define PIBLSS_SEC_STATUS_OFFS 16 -+#define PIBLSS_SEC_STATUS_MASK (0xffff << PIBLSS_SEC_STATUS_OFFS) -+ -+ -+/* P2P_MEM_BASE_LIMIT (PMBL)*/ -+ -+#define PMBL_MEM_BASE_OFFS 0 -+#define PMBL_MEM_BASE_MASK (0xffff << PMBL_MEM_BASE_OFFS) -+ -+#define PMBL_MEM_LIMIT_OFFS 16 -+#define PMBL_MEM_LIMIT_MASK (0xffff << PMBL_MEM_LIMIT_OFFS) -+ -+ -+#define PMBL_LOW_ADDR_OFFS 0 -+#define PMBL_LOW_ADDR_MASK (0xFFFFF << PMBL_LOW_ADDR_OFFS) -+ -+#define PMBL_HIGH_ADDR_OFFS 20 -+#define PMBL_HIGH_ADDR_MASK (0xFFF << PMBL_HIGH_ADDR_OFFS) -+ -+ -+/* P2P_PREF_MEM_BASE_LIMIT (PRMBL) */ -+ -+#define PRMBL_PREF_MEM_BASE_OFFS 0 -+#define PRMBL_PREF_MEM_BASE_MASK (0xffff << PRMBL_PREF_MEM_BASE_OFFS) -+ -+#define PRMBL_PREF_MEM_LIMIT_OFFS 16 -+#define PRMBL_PREF_MEM_LIMIT_MASK (0xffff<<PRMBL_PREF_MEM_LIMIT_OFFS) -+ -+#define PRMBL_LOW_ADDR_OFFS 0 -+#define PRMBL_LOW_ADDR_MASK (0xFFFFF << PRMBL_LOW_ADDR_OFFS) -+ -+#define PRMBL_HIGH_ADDR_OFFS 20 -+#define PRMBL_HIGH_ADDR_MASK (0xFFF << PRMBL_HIGH_ADDR_OFFS) -+ -+#define PRMBL_ADD_CAP_OFFS 0 -+#define PRMBL_ADD_CAP_MASK (0xf << PRMBL_ADD_CAP_OFFS) -+#define PRMBL_ADD_CAP_32BIT (0x0 << PRMBL_ADD_CAP_OFFS) -+#define PRMBL_ADD_CAP_64BIT (0x1 << PRMBL_ADD_CAP_OFFS) -+ -+/* P2P_IO_BASE_LIMIT_UPPER_16 (PIBLU) */ -+ -+#define PRBU_IO_UPP_BASE_OFFS 0 -+#define PRBU_IO_UPP_BASE_MASK (0xffff << PRBU_IO_UPP_BASE_OFFS) -+ -+#define PRBU_IO_UPP_LIMIT_OFFS 16 -+#define PRBU_IO_UPP_LIMIT_MASK (0xffff << PRBU_IO_UPP_LIMIT_OFFS) -+ -+ -+/* typedefs */ -+ -+typedef enum _mvPciBarMapping -+{ -+ PCI_MEMORY_BAR, -+ PCI_IO_BAR, -+ PCI_NO_MAPPING -+}MV_PCI_BAR_MAPPING; -+ -+typedef enum _mvPciBarType -+{ -+ PCI_32BIT_BAR, -+ PCI_64BIT_BAR -+}MV_PCI_BAR_TYPE; -+ -+typedef enum _mvPciIntPin -+{ -+ MV_PCI_INTA = 1, -+ MV_PCI_INTB = 2, -+ MV_PCI_INTC = 3, -+ MV_PCI_INTD = 4 -+}MV_PCI_INT_PIN; -+ -+typedef enum _mvPciHeader -+{ -+ MV_PCI_STANDARD, -+ MV_PCI_PCI2PCI_BRIDGE -+ -+}MV_PCI_HEADER; -+ -+ -+/* BAR structure */ -+typedef struct _pciBar -+{ -+ MV_U32 barOffset; -+ MV_U32 barBaseLow; -+ MV_U32 barBaseHigh; -+ MV_U32 barSizeLow; -+ MV_U32 barSizeHigh; -+ /* The 'barBaseAddr' is a 64-bit variable -+ that will contain the TOTAL base address -+ value achived by combining both the 'barBaseLow' -+ and the 'barBaseHigh' parameters as follows: -+ -+ BIT: 63 31 0 -+ | | | -+ barBaseHigh barBaseLow */ -+ MV_U64 barBaseAddr; -+ /* The 'barSize' is a 64-bit variable -+ that will contain the TOTAL size achived -+ by combining both the 'barSizeLow' and -+ the 'barSizeHigh' parameters as follows: -+ -+ BIT: 63 31 0 -+ | | | -+ barSizeHigh barSizeLow -+ -+ NOTE: The total size described above -+ is AFTER the size calculation as -+ described in PCI spec rev2.2 */ -+ MV_U64 barSize; -+ MV_BOOL isPrefetchable; -+ MV_PCI_BAR_TYPE barType; -+ MV_PCI_BAR_MAPPING barMapping; -+ -+ -+} PCI_BAR; -+ -+/* Device information structure */ -+typedef struct _mvPciDevice -+{ -+ /* Device specific information */ -+ MV_U32 busNumber; /* Pci agent bus number */ -+ MV_U32 deviceNum; /* Pci agent device number */ -+ MV_U32 function; /* Pci agent function number */ -+ -+ MV_U32 venID; /* Pci agent Vendor ID */ -+ MV_U32 deviceID; /* Pci agent Device ID */ -+ -+ MV_BOOL isFastB2BCapable; /* Capability of Fast Back to Back -+ transactions */ -+ MV_BOOL isCapListSupport; /* Support of Capability list */ -+ MV_BOOL is66MHZCapable; /* 66MHZ support */ -+ -+ MV_U32 baseClassCode; /* Pci agent base Class Code */ -+ MV_U32 subClassCode; /* Pci agent sub Class Code */ -+ MV_U32 progIf; /* Pci agent Programing interface */ -+ MV_U32 revisionID; -+ -+ PCI_BAR pciBar[6]; /* Pci agent bar list */ -+ -+ MV_U32 p2pPrimBusNum; /* P2P Primary Bus number*/ -+ MV_U32 p2pSecBusNum; /* P2P Secondary Bus Number*/ -+ MV_U32 p2pSubBusNum; /* P2P Subordinate bus Number */ -+ MV_U32 p2pSecLatencyTimer; /* P2P Econdary Latency Timer*/ -+ MV_U32 p2pIObase; /* P2P IO Base */ -+ MV_U32 p2pIOLimit; /* P2P IO Linit */ -+ MV_BOOL bIO32; -+ MV_U32 p2pSecStatus; /* P2P Secondary Status */ -+ MV_U32 p2pMemBase; /* P2P Memory Space */ -+ MV_U32 p2pMemLimit; /* P2P Memory Limit*/ -+ MV_U32 p2pPrefMemBase; /* P2P Prefetchable Mem Base*/ -+ MV_U32 p2pPrefMemLimit; /* P2P Prefetchable Memory Limit*/ -+ MV_BOOL bPrefMem64; -+ MV_U32 p2pPrefBaseUpper32Bits;/* P2P Prefetchable upper 32 bits*/ -+ MV_U32 p2pPrefLimitUpper32Bits;/* P2P prefetchable limit upper 32*/ -+ -+ -+ MV_U32 pciCacheLine; /* Pci agent cache line */ -+ MV_U32 pciLatencyTimer; /* Pci agent Latency timer */ -+ MV_PCI_HEADER pciHeader; /* Pci agent header type*/ -+ MV_BOOL isMultiFunction; /* Multi function support */ -+ MV_BOOL isBISTCapable; /* Self test capable */ -+ -+ MV_U32 subSysID; /* Sub System ID */ -+ MV_U32 subSysVenID; /* Sub System Vendor ID */ -+ -+ MV_BOOL isExpRom; /* Expantion Rom support */ -+ MV_U32 expRomAddr; /* Expantion Rom pointer */ -+ -+ MV_U32 capListPointer; /* Capability list pointer */ -+ -+ MV_U32 irqLine; /* IRQ line */ -+ MV_PCI_INT_PIN intPin; /* Interrupt pin */ -+ MV_U32 minGrant; /* Minimum grant*/ -+ MV_U32 maxLatency; /* Maximum latency*/ -+ -+ MV_U32 funtionsNum; /* pci agent total functions number */ -+ -+ MV_U32 barsNum; -+ MV_U8 type[60]; /* class name of the pci agent */ -+ -+ -+} MV_PCI_DEVICE; -+ -+/* PCI gloabl functions */ -+MV_STATUS mvPciClassNameGet(MV_U32 classCode, MV_8 *pType); -+ -+ -+/* Performs a full scan on both PCIs and returns all possible details on the -+ agents found on the bus. */ -+MV_STATUS mvPciScan(MV_U32 pciIf, -+ MV_PCI_DEVICE *pPciAgents, -+ MV_U32 *pPciAgentsNum); -+ -+ -+#endif /* #ifndef __INCmvPciUtilsh */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.c b/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.c -new file mode 100644 -index 0000000..5430f51 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.c -@@ -0,0 +1,1047 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#include "pci/mvPci.h" -+ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+ -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+ -+ -+MV_VOID mvPciHalInit(MV_U32 pciIf, MV_PCI_MOD pciIfmod) -+{ -+ if (MV_PCI_MOD_HOST == pciIfmod) -+ { -+ -+ mvPciLocalBusNumSet(pciIf, PCI_HOST_BUS_NUM(pciIf)); -+ mvPciLocalDevNumSet(pciIf, PCI_HOST_DEV_NUM(pciIf)); -+ -+ /* Local device master Enable */ -+ mvPciMasterEnable(pciIf, MV_TRUE); -+ -+ /* Local device slave Enable */ -+ mvPciSlaveEnable(pciIf, mvPciLocalBusNumGet(pciIf), -+ mvPciLocalDevNumGet(pciIf), MV_TRUE); -+ } -+ /* enable CPU-2-PCI ordering */ -+ MV_REG_BIT_SET(PCI_CMD_REG(0), PCR_CPU_TO_PCI_ORDER_EN); -+} -+ -+/******************************************************************************* -+* mvPciCommandSet - Set PCI comman register value. -+* -+* DESCRIPTION: -+* This function sets a given PCI interface with its command register -+* value. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* command - 32bit value to be written to comamnd register. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM if pciIf is not in range otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciCommandSet(MV_U32 pciIf, MV_U32 command) -+{ -+ MV_U32 locBusNum, locDevNum, regVal; -+ -+ locBusNum = mvPciLocalBusNumGet(pciIf); -+ locDevNum = mvPciLocalDevNumGet(pciIf); -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciCommandSet: ERR. Invalid PCI IF num %d\n", pciIf); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Set command register */ -+ MV_REG_WRITE(PCI_CMD_REG(pciIf), command); -+ -+ /* Upodate device max outstanding split tarnsaction */ -+ if ((command & PCR_CPU_TO_PCI_ORDER_EN) && -+ (command & PCR_PCI_TO_CPU_ORDER_EN)) -+ { -+ /* Read PCI-X command register */ -+ regVal = mvPciConfigRead (pciIf, locBusNum, locDevNum, 0, PCIX_COMMAND); -+ -+ /* clear bits 22:20 */ -+ regVal &= 0xff8fffff; -+ -+ /* set reset value */ -+ regVal |= (0x3 << 20); -+ -+ /* Write back the value */ -+ mvPciConfigWrite (pciIf, locBusNum, locDevNum, 0, PCIX_COMMAND, regVal); -+ } -+ -+ return MV_OK; -+ -+ -+} -+ -+ -+/******************************************************************************* -+* mvPciModeGet - Get PCI interface mode. -+* -+* DESCRIPTION: -+* This function returns the given PCI interface mode. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* -+* OUTPUT: -+* pPciMode - Pointer to PCI mode structure. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciModeGet(MV_U32 pciIf, MV_PCI_MODE *pPciMode) -+{ -+ MV_U32 pciMode; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciModeGet: ERR. Invalid PCI interface %d\n", pciIf); -+ return MV_BAD_PARAM; -+ } -+ if (NULL == pPciMode) -+ { -+ mvOsPrintf("mvPciModeGet: ERR. pPciMode = NULL \n"); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Read pci mode register */ -+ pciMode = MV_REG_READ(PCI_MODE_REG(pciIf)); -+ -+ switch (pciMode & PMR_PCI_MODE_MASK) -+ { -+ case PMR_PCI_MODE_CONV: -+ pPciMode->pciType = MV_PCI_CONV; -+ -+ if (MV_REG_READ(PCI_DLL_CTRL_REG(pciIf)) & PDC_DLL_EN) -+ { -+ pPciMode->pciSpeed = 66000000; /* 66MHZ */ -+ } -+ else -+ { -+ pPciMode->pciSpeed = 33000000; /* 33MHZ */ -+ } -+ -+ break; -+ -+ case PMR_PCI_MODE_PCIX_66MHZ: -+ pPciMode->pciType = MV_PCIX; -+ pPciMode->pciSpeed = 66000000; /* 66MHZ */ -+ break; -+ -+ case PMR_PCI_MODE_PCIX_100MHZ: -+ pPciMode->pciType = MV_PCIX; -+ pPciMode->pciSpeed = 100000000; /* 100MHZ */ -+ break; -+ -+ case PMR_PCI_MODE_PCIX_133MHZ: -+ pPciMode->pciType = MV_PCIX; -+ pPciMode->pciSpeed = 133000000; /* 133MHZ */ -+ break; -+ -+ default: -+ { -+ mvOsPrintf("mvPciModeGet: ERR. Non existing mode !!\n"); -+ return MV_ERROR; -+ } -+ } -+ -+ switch (pciMode & PMR_PCI_64_MASK) -+ { -+ case PMR_PCI_64_64BIT: -+ pPciMode->pciWidth = MV_PCI_64; -+ break; -+ -+ case PMR_PCI_64_32BIT: -+ pPciMode->pciWidth = MV_PCI_32; -+ break; -+ -+ default: -+ { -+ mvOsPrintf("mvPciModeGet: ERR. Non existing mode !!\n"); -+ return MV_ERROR; -+ } -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvPciRetrySet - Set PCI retry counters -+* -+* DESCRIPTION: -+* This function specifies the number of times the PCI controller -+* retries a transaction before it quits. -+* Applies to the PCI Master when acting as a requester. -+* Applies to the PCI slave when acting as a completer (PCI-X mode). -+* A 0x00 value means a "retry forever". -+* -+* INPUT: -+* pciIf - PCI interface number. -+* counter - Number of times PCI controller retry. Use counter value -+* up to PRR_RETRY_CNTR_MAX. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciRetrySet(MV_U32 pciIf, MV_U32 counter) -+{ -+ MV_U32 pciRetry; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciRetrySet: ERR. Invalid PCI interface %d\n", pciIf); -+ return MV_BAD_PARAM; -+ } -+ -+ if (counter >= PRR_RETRY_CNTR_MAX) -+ { -+ mvOsPrintf("mvPciRetrySet: ERR. Invalid counter: %d\n", counter); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ /* Reading PCI retry register */ -+ pciRetry = MV_REG_READ(PCI_RETRY_REG(pciIf)); -+ -+ pciRetry &= ~PRR_RETRY_CNTR_MASK; -+ -+ pciRetry |= (counter << PRR_RETRY_CNTR_OFFS); -+ -+ /* write new value */ -+ MV_REG_WRITE(PCI_RETRY_REG(pciIf), pciRetry); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPciDiscardTimerSet - Set PCI discard timer -+* -+* DESCRIPTION: -+* This function set PCI discard timer. -+* In conventional PCI mode: -+* Specifies the number of PCLK cycles the PCI slave keeps a non-accessed -+* read buffers (non-completed delayed read) before invalidate the buffer. -+* Set to '0' to disable the timer. The PCI slave waits for delayed -+* read completion forever. -+* In PCI-X mode: -+* Specifies the number of PCLK cycles the PCI master waits for split -+* completion transaction, before it invalidates the pre-allocated read -+* buffer. -+* Set to '0' to disable the timer. The PCI master waits for split -+* completion forever. -+* NOTE: Must be set to a number greater than MV_PCI_MAX_DISCARD_CLK, -+* unless using the "wait for ever" setting 0x0. -+* NOTE: Must not be updated while there are pending read requests. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* pClkCycles - Number of PCI clock cycles. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciDiscardTimerSet(MV_U32 pciIf, MV_U32 pClkCycles) -+{ -+ MV_U32 pciDiscardTimer; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciDiscardTimerSet: ERR. Invalid PCI interface %d\n", -+ pciIf); -+ return MV_BAD_PARAM; -+ } -+ -+ if (pClkCycles >= PDTR_TIMER_MIN) -+ { -+ mvOsPrintf("mvPciDiscardTimerSet: ERR. Invalid Clk value: %d\n", -+ pClkCycles); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ /* Read PCI Discard Timer */ -+ pciDiscardTimer = MV_REG_READ(PCI_DISCARD_TIMER_REG(pciIf)); -+ -+ pciDiscardTimer &= ~PDTR_TIMER_MASK; -+ -+ pciDiscardTimer |= (pClkCycles << PDTR_TIMER_OFFS); -+ -+ /* Write new value */ -+ MV_REG_WRITE(PCI_DISCARD_TIMER_REG(pciIf), pciDiscardTimer); -+ -+ return MV_OK; -+ -+} -+ -+/* PCI Arbiter routines */ -+ -+/******************************************************************************* -+* mvPciArbEnable - PCI arbiter enable/disable -+* -+* DESCRIPTION: -+* This fuction enable/disables a given PCI interface arbiter. -+* NOTE: Arbiter setting can not be changed while in work. It should only -+* be set once. -+* INPUT: -+* pciIf - PCI interface number. -+* enable - Enable/disable parameter. If enable = MV_TRUE then enable. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvPciArbEnable(MV_U32 pciIf, MV_BOOL enable) -+{ -+ MV_U32 regVal; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciArbEnable: ERR. Invalid PCI interface %d\n", pciIf); -+ return MV_ERROR; -+ } -+ -+ /* Set PCI Arbiter Control register according to default configuration */ -+ regVal = MV_REG_READ(PCI_ARBITER_CTRL_REG(pciIf)); -+ -+ /* Make sure arbiter disabled before changing its values */ -+ MV_REG_BIT_RESET(PCI_ARBITER_CTRL_REG(pciIf), PACR_ARB_ENABLE); -+ -+ regVal &= ~PCI_ARBITER_CTRL_DEFAULT_MASK; -+ -+ regVal |= PCI_ARBITER_CTRL_DEFAULT; /* Set default configuration */ -+ -+ if (MV_TRUE == enable) -+ { -+ regVal |= PACR_ARB_ENABLE; -+ } -+ else -+ { -+ regVal &= ~PACR_ARB_ENABLE; -+ } -+ -+ /* Write to register */ -+ MV_REG_WRITE(PCI_ARBITER_CTRL_REG(pciIf), regVal); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPciArbParkDis - Disable arbiter parking on agent -+* -+* DESCRIPTION: -+* This function disables the PCI arbiter from parking on the given agent -+* list. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* pciAgentMask - When a bit in the mask is set to '1', parking on -+* the associated PCI master is disabled. Mask bit -+* refers to bit 0 - 6. For example disable parking on PCI -+* agent 3 set pciAgentMask 0x4 (bit 3 is set). -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+MV_STATUS mvPciArbParkDis(MV_U32 pciIf, MV_U32 pciAgentMask) -+{ -+ MV_U32 pciArbiterCtrl; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciArbParkDis: ERR. Invalid PCI interface %d\n", pciIf); -+ return MV_ERROR; -+ } -+ -+ /* Reading Arbiter Control register */ -+ pciArbiterCtrl = MV_REG_READ(PCI_ARBITER_CTRL_REG(pciIf)); -+ -+ /* Arbiter must be disabled before changing parking */ -+ MV_REG_BIT_RESET(PCI_ARBITER_CTRL_REG(pciIf), PACR_ARB_ENABLE); -+ -+ /* do the change */ -+ pciArbiterCtrl &= ~PACR_PARK_DIS_MASK; -+ pciArbiterCtrl |= (pciAgentMask << PACR_PARK_DIS_OFFS); -+ -+ /* writing new value ( if th earbiter was enabled before the change */ -+ /* here it will be reenabled */ -+ MV_REG_WRITE(PCI_ARBITER_CTRL_REG(pciIf), pciArbiterCtrl); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPciArbBrokDetectSet - Set PCI arbiter broken detection -+* -+* DESCRIPTION: -+* This function sets the maximum number of cycles that the arbiter -+* waits for a PCI master to respond to its grant assertion. If a -+* PCI agent fails to respond within this time, the PCI arbiter aborts -+* the transaction and performs a new arbitration cycle. -+* NOTE: Value must be greater than '1' for conventional PCI and -+* greater than '5' for PCI-X. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* pClkCycles - Number of PCI clock cycles. If equal to '0' the broken -+* master detection is disabled. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciArbBrokDetectSet(MV_U32 pciIf, MV_U32 pClkCycles) -+{ -+ MV_U32 pciArbiterCtrl; -+ MV_U32 pciMode; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciArbBrokDetectSet: ERR. Invalid PCI interface %d\n", -+ pciIf); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Checking PCI mode and if pClkCycles is legal value */ -+ pciMode = MV_REG_READ(PCI_MODE_REG(pciIf)); -+ pciMode &= PMR_PCI_MODE_MASK; -+ -+ if (PMR_PCI_MODE_CONV == pciMode) -+ { -+ if (pClkCycles < PACR_BROKEN_VAL_CONV_MIN) -+ return MV_ERROR; -+ } -+ else -+ { -+ if (pClkCycles < PACR_BROKEN_VAL_PCIX_MIN) -+ return MV_ERROR; -+ } -+ -+ pClkCycles <<= PACR_BROKEN_VAL_OFFS; -+ -+ /* Reading Arbiter Control register */ -+ pciArbiterCtrl = MV_REG_READ(PCI_ARBITER_CTRL_REG(pciIf)); -+ pciArbiterCtrl &= ~PACR_BROKEN_VAL_MASK; -+ pciArbiterCtrl |= pClkCycles; -+ -+ /* Arbiter must be disabled before changing broken detection */ -+ MV_REG_BIT_RESET(PCI_ARBITER_CTRL_REG(pciIf), PACR_ARB_ENABLE); -+ -+ /* writing new value ( if th earbiter was enabled before the change */ -+ /* here it will be reenabled */ -+ -+ MV_REG_WRITE(PCI_ARBITER_CTRL_REG(pciIf), pciArbiterCtrl); -+ -+ return MV_OK; -+} -+ -+/* PCI configuration space read write */ -+ -+/******************************************************************************* -+* mvPciConfigRead - Read from configuration space -+* -+* DESCRIPTION: -+* This function performs a 32 bit read from PCI configuration space. -+* It supports both type 0 and type 1 of Configuration Transactions -+* (local and over bridge). In order to read from local bus segment, use -+* bus number retrieved from mvPciLocalBusNumGet(). Other bus numbers -+* will result configuration transaction of type 1 (over bridge). -+* -+* INPUT: -+* pciIf - PCI interface number. -+* bus - PCI segment bus number. -+* dev - PCI device number. -+* func - Function number. -+* regOffs - Register offset. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit register data, 0xffffffff on error -+* -+*******************************************************************************/ -+MV_U32 mvPciConfigRead (MV_U32 pciIf, MV_U32 bus, MV_U32 dev, MV_U32 func, -+ MV_U32 regOff) -+{ -+ MV_U32 pciData = 0; -+ -+ /* Parameter checking */ -+ if (PCI_DEFAULT_IF != pciIf) -+ { -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciConfigRead: ERR. Invalid PCI interface %d\n",pciIf); -+ return 0xFFFFFFFF; -+ } -+ } -+ -+ if (dev >= MAX_PCI_DEVICES) -+ { -+ DB(mvOsPrintf("mvPciConfigRead: ERR. device number illigal %d\n", dev)); -+ return 0xFFFFFFFF; -+ } -+ -+ if (func >= MAX_PCI_FUNCS) -+ { -+ DB(mvOsPrintf("mvPciConfigRead: ERR. function number illigal %d\n", func)); -+ return 0xFFFFFFFF; -+ } -+ -+ if (bus >= MAX_PCI_BUSSES) -+ { -+ DB(mvOsPrintf("mvPciConfigRead: ERR. bus number illigal %d\n", bus)); -+ return MV_ERROR; -+ } -+ -+ -+ /* Creating PCI address to be passed */ -+ pciData |= (bus << PCAR_BUS_NUM_OFFS); -+ pciData |= (dev << PCAR_DEVICE_NUM_OFFS); -+ pciData |= (func << PCAR_FUNC_NUM_OFFS); -+ pciData |= (regOff & PCAR_REG_NUM_MASK); -+ -+ pciData |= PCAR_CONFIG_EN; -+ -+ /* Write the address to the PCI configuration address register */ -+ MV_REG_WRITE(PCI_CONFIG_ADDR_REG(pciIf), pciData); -+ -+ /* In order to let the PCI controller absorbed the address of the read */ -+ /* transaction we perform a validity check that the address was written */ -+ if(pciData != MV_REG_READ(PCI_CONFIG_ADDR_REG(pciIf))) -+ { -+ return MV_ERROR; -+ } -+ /* Read the Data returned in the PCI Data register */ -+ pciData = MV_REG_READ(PCI_CONFIG_DATA_REG(pciIf)); -+ -+ return pciData; -+} -+ -+/******************************************************************************* -+* mvPciConfigWrite - Write to configuration space -+* -+* DESCRIPTION: -+* This function performs a 32 bit write to PCI configuration space. -+* It supports both type 0 and type 1 of Configuration Transactions -+* (local and over bridge). In order to write to local bus segment, use -+* bus number retrieved from mvPciLocalBusNumGet(). Other bus numbers -+* will result configuration transaction of type 1 (over bridge). -+* -+* INPUT: -+* pciIf - PCI interface number. -+* bus - PCI segment bus number. -+* dev - PCI device number. -+* func - Function number. -+* regOffs - Register offset. -+* data - 32bit data. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciConfigWrite(MV_U32 pciIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data) -+{ -+ MV_U32 pciData = 0; -+ -+ /* Parameter checking */ -+ if (PCI_DEFAULT_IF != pciIf) -+ { -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciConfigWrite: ERR. Invalid PCI interface %d\n", -+ pciIf); -+ return 0xFFFFFFFF; -+ } -+ } -+ -+ if (dev >= MAX_PCI_DEVICES) -+ { -+ mvOsPrintf("mvPciConfigWrite: ERR. device number illigal %d\n",dev); -+ return MV_BAD_PARAM; -+ } -+ -+ if (func >= MAX_PCI_FUNCS) -+ { -+ mvOsPrintf("mvPciConfigWrite: ERR. function number illigal %d\n", func); -+ return MV_ERROR; -+ } -+ -+ if (bus >= MAX_PCI_BUSSES) -+ { -+ mvOsPrintf("mvPciConfigWrite: ERR. bus number illigal %d\n", bus); -+ return MV_ERROR; -+ } -+ -+ /* Creating PCI address to be passed */ -+ pciData |= (bus << PCAR_BUS_NUM_OFFS); -+ pciData |= (dev << PCAR_DEVICE_NUM_OFFS); -+ pciData |= (func << PCAR_FUNC_NUM_OFFS); -+ pciData |= (regOff & PCAR_REG_NUM_MASK); -+ -+ pciData |= PCAR_CONFIG_EN; -+ -+ /* Write the address to the PCI configuration address register */ -+ MV_REG_WRITE(PCI_CONFIG_ADDR_REG(pciIf), pciData); -+ -+ /* In order to let the PCI controller absorbed the address of the read */ -+ /* transaction we perform a validity check that the address was written */ -+ if(pciData != MV_REG_READ(PCI_CONFIG_ADDR_REG(pciIf))) -+ { -+ return MV_ERROR; -+ } -+ -+ /* Write the Data passed to the PCI Data register */ -+ MV_REG_WRITE(PCI_CONFIG_DATA_REG(pciIf), data); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvPciMasterEnable - Enable/disale PCI interface master transactions. -+* -+* DESCRIPTION: -+* This function performs read modified write to PCI command status -+* (offset 0x4) to set/reset bit 2. After this bit is set, the PCI -+* master is allowed to gain ownership on the bus, otherwise it is -+* incapable to do so. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciMasterEnable(MV_U32 pciIf, MV_BOOL enable) -+{ -+ MV_U32 pciCommandStatus; -+ MV_U32 RegOffs; -+ MV_U32 localBus; -+ MV_U32 localDev; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciMasterEnable: ERR. Invalid PCI interface %d\n", pciIf); -+ return MV_ERROR; -+ } -+ -+ localBus = mvPciLocalBusNumGet(pciIf); -+ localDev = mvPciLocalDevNumGet(pciIf); -+ -+ RegOffs = PCI_STATUS_AND_COMMAND; -+ -+ pciCommandStatus = mvPciConfigRead(pciIf, localBus, localDev, 0, RegOffs); -+ -+ if (MV_TRUE == enable) -+ { -+ pciCommandStatus |= PSCR_MASTER_EN; -+ } -+ else -+ { -+ pciCommandStatus &= ~PSCR_MASTER_EN; -+ } -+ -+ mvPciConfigWrite(pciIf, localBus, localDev, 0, RegOffs, pciCommandStatus); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPciSlaveEnable - Enable/disale PCI interface slave transactions. -+* -+* DESCRIPTION: -+* This function performs read modified write to PCI command status -+* (offset 0x4) to set/reset bit 0 and 1. After those bits are set, -+* the PCI slave is allowed to respond to PCI IO space access (bit 0) -+* and PCI memory space access (bit 1). -+* -+* INPUT: -+* pciIf - PCI interface number. -+* dev - PCI device number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciSlaveEnable(MV_U32 pciIf, MV_U32 bus, MV_U32 dev, MV_BOOL enable) -+{ -+ MV_U32 pciCommandStatus; -+ MV_U32 RegOffs; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciSlaveEnable: ERR. Invalid PCI interface %d\n", pciIf); -+ return MV_BAD_PARAM; -+ } -+ if (dev >= MAX_PCI_DEVICES) -+ { -+ mvOsPrintf("mvPciLocalDevNumSet: ERR. device number illigal %d\n", dev); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ RegOffs = PCI_STATUS_AND_COMMAND; -+ -+ pciCommandStatus=mvPciConfigRead(pciIf, bus, dev, 0, RegOffs); -+ -+ if (MV_TRUE == enable) -+ { -+ pciCommandStatus |= (PSCR_IO_EN | PSCR_MEM_EN); -+ } -+ else -+ { -+ pciCommandStatus &= ~(PSCR_IO_EN | PSCR_MEM_EN); -+ } -+ -+ mvPciConfigWrite(pciIf, bus, dev, 0, RegOffs, pciCommandStatus); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvPciLocalBusNumSet - Set PCI interface local bus number. -+* -+* DESCRIPTION: -+* This function sets given PCI interface its local bus number. -+* Note: In case the PCI interface is PCI-X, the information is read-only. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* busNum - Bus number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_NOT_ALLOWED in case PCI interface is PCI-X. -+* MV_BAD_PARAM on bad parameters , -+* otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciLocalBusNumSet(MV_U32 pciIf, MV_U32 busNum) -+{ -+ MV_U32 pciP2PConfig; -+ MV_PCI_MODE pciMode; -+ MV_U32 localBus; -+ MV_U32 localDev; -+ -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciLocalBusNumSet: ERR. Invalid PCI interface %d\n",pciIf); -+ return MV_BAD_PARAM; -+ } -+ if (busNum >= MAX_PCI_BUSSES) -+ { -+ mvOsPrintf("mvPciLocalBusNumSet: ERR. bus number illigal %d\n", busNum); -+ return MV_ERROR; -+ -+ } -+ -+ localBus = mvPciLocalBusNumGet(pciIf); -+ localDev = mvPciLocalDevNumGet(pciIf); -+ -+ -+ /* PCI interface mode */ -+ mvPciModeGet(pciIf, &pciMode); -+ -+ /* if PCI type is PCI-X then it is not allowed to change the dev number */ -+ if (MV_PCIX == pciMode.pciType) -+ { -+ pciP2PConfig = mvPciConfigRead(pciIf, localBus, localDev, 0, PCIX_STATUS ); -+ -+ pciP2PConfig &= ~PXS_BN_MASK; -+ -+ pciP2PConfig |= (busNum << PXS_BN_OFFS) & PXS_BN_MASK; -+ -+ mvPciConfigWrite(pciIf, localBus, localDev, 0, PCIX_STATUS,pciP2PConfig ); -+ -+ } -+ else -+ { -+ pciP2PConfig = MV_REG_READ(PCI_P2P_CONFIG_REG(pciIf)); -+ -+ pciP2PConfig &= ~PPCR_BUS_NUM_MASK; -+ -+ pciP2PConfig |= (busNum << PPCR_BUS_NUM_OFFS) & PPCR_BUS_NUM_MASK; -+ -+ MV_REG_WRITE(PCI_P2P_CONFIG_REG(pciIf), pciP2PConfig); -+ -+ } -+ -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPciLocalBusNumGet - Get PCI interface local bus number. -+* -+* DESCRIPTION: -+* This function gets the local bus number of a given PCI interface. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Local bus number.0xffffffff on Error -+* -+*******************************************************************************/ -+MV_U32 mvPciLocalBusNumGet(MV_U32 pciIf) -+{ -+ MV_U32 pciP2PConfig; -+ -+ /* Parameter checking */ -+ if (PCI_DEFAULT_IF != pciIf) -+ { -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciLocalBusNumGet: ERR. Invalid PCI interface %d\n", -+ pciIf); -+ return 0xFFFFFFFF; -+ } -+ } -+ -+ pciP2PConfig = MV_REG_READ(PCI_P2P_CONFIG_REG(pciIf)); -+ pciP2PConfig &= PPCR_BUS_NUM_MASK; -+ return (pciP2PConfig >> PPCR_BUS_NUM_OFFS); -+} -+ -+ -+/******************************************************************************* -+* mvPciLocalDevNumSet - Set PCI interface local device number. -+* -+* DESCRIPTION: -+* This function sets given PCI interface its local device number. -+* Note: In case the PCI interface is PCI-X, the information is read-only. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* devNum - Device number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_NOT_ALLOWED in case PCI interface is PCI-X. MV_BAD_PARAM on bad parameters , -+* otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPciLocalDevNumSet(MV_U32 pciIf, MV_U32 devNum) -+{ -+ MV_U32 pciP2PConfig; -+ MV_PCI_MODE pciMode; -+ MV_U32 localBus; -+ MV_U32 localDev; -+ -+ /* Parameter checking */ -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciLocalDevNumSet: ERR. Invalid PCI interface %d\n",pciIf); -+ return MV_BAD_PARAM; -+ } -+ if (devNum >= MAX_PCI_DEVICES) -+ { -+ mvOsPrintf("mvPciLocalDevNumSet: ERR. device number illigal %d\n", -+ devNum); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ localBus = mvPciLocalBusNumGet(pciIf); -+ localDev = mvPciLocalDevNumGet(pciIf); -+ -+ /* PCI interface mode */ -+ mvPciModeGet(pciIf, &pciMode); -+ -+ /* if PCI type is PCIX then it is not allowed to change the dev number */ -+ if (MV_PCIX == pciMode.pciType) -+ { -+ pciP2PConfig = mvPciConfigRead(pciIf, localBus, localDev, 0, PCIX_STATUS ); -+ -+ pciP2PConfig &= ~PXS_DN_MASK; -+ -+ pciP2PConfig |= (devNum << PXS_DN_OFFS) & PXS_DN_MASK; -+ -+ mvPciConfigWrite(pciIf,localBus, localDev, 0, PCIX_STATUS,pciP2PConfig ); -+ } -+ else -+ { -+ pciP2PConfig = MV_REG_READ(PCI_P2P_CONFIG_REG(pciIf)); -+ -+ pciP2PConfig &= ~PPCR_DEV_NUM_MASK; -+ -+ pciP2PConfig |= (devNum << PPCR_DEV_NUM_OFFS) & PPCR_DEV_NUM_MASK; -+ -+ MV_REG_WRITE(PCI_P2P_CONFIG_REG(pciIf), pciP2PConfig); -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvPciLocalDevNumGet - Get PCI interface local device number. -+* -+* DESCRIPTION: -+* This function gets the local device number of a given PCI interface. -+* -+* INPUT: -+* pciIf - PCI interface number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Local device number. 0xffffffff on Error -+* -+*******************************************************************************/ -+MV_U32 mvPciLocalDevNumGet(MV_U32 pciIf) -+{ -+ MV_U32 pciP2PConfig; -+ -+ /* Parameter checking */ -+ -+ if (PCI_DEFAULT_IF != pciIf) -+ { -+ if (pciIf >= mvCtrlPciMaxIfGet()) -+ { -+ mvOsPrintf("mvPciLocalDevNumGet: ERR. Invalid PCI interface %d\n", -+ pciIf); -+ return 0xFFFFFFFF; -+ } -+ } -+ -+ pciP2PConfig = MV_REG_READ(PCI_P2P_CONFIG_REG(pciIf)); -+ -+ pciP2PConfig &= PPCR_DEV_NUM_MASK; -+ -+ return (pciP2PConfig >> PPCR_DEV_NUM_OFFS); -+} -+ -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.h b/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.h -new file mode 100644 -index 0000000..3c521db ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPci.h -@@ -0,0 +1,185 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#ifndef __INCPCIH -+#define __INCPCIH -+ -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+#include "pci/mvPciRegs.h" -+ -+ -+/* NOTE not supported in this driver: -+ -+ Built In Self Test (BIST) -+ Vital Product Data (VPD) -+ Message Signaled Interrupt (MSI) -+ Power Management -+ Compact PCI Hot Swap -+ Header retarget -+ -+Registers not supported: -+1) PCI DLL Status and Control (PCI0 0x1D20, PCI1 0x1DA0) -+2) PCI/MPP Pads Calibration (CI0/MPP[31:16] 0x1D1C, PCI1/MPP[15:0] 0X1D9C) -+*/ -+ -+/* defines */ -+/* The number of supported PCI interfaces depend on Marvell controller */ -+/* device number. This device number ID is located on the PCI unit */ -+/* configuration header. This creates a loop where calling PCI */ -+/* configuration read/write routine results a call to get PCI configuration */ -+/* information etc. This macro defines a default PCI interface. This PCI */ -+/* interface is sure to exist. */ -+#define PCI_DEFAULT_IF 0 -+ -+ -+/* typedefs */ -+/* The Marvell controller supports both conventional PCI and PCI-X. */ -+/* This enumeration describes the PCI type. */ -+typedef enum _mvPciType -+{ -+ MV_PCI_CONV, /* Conventional PCI */ -+ MV_PCIX /* PCI-X */ -+}MV_PCI_TYPE; -+ -+typedef enum _mvPciMod -+{ -+ MV_PCI_MOD_HOST, -+ MV_PCI_MOD_DEVICE -+}MV_PCI_MOD; -+ -+ -+/* The Marvell controller supports both PCI width of 32 and 64 bit. */ -+/* This enumerator describes PCI width */ -+typedef enum _mvPciWidth -+{ -+ MV_PCI_32, /* PCI width 32bit */ -+ MV_PCI_64 /* PCI width 64bit */ -+}MV_PCI_WIDTH; -+ -+/* This structure describes the PCI unit configured type, speed and width. */ -+typedef struct _mvPciMode -+{ -+ MV_PCI_TYPE pciType; /* PCI type */ -+ MV_U32 pciSpeed; /* Assuming PCI base clock on board is 33MHz */ -+ MV_PCI_WIDTH pciWidth; /* PCI bus width */ -+}MV_PCI_MODE; -+ -+/* mvPciInit - Initialize PCI interfaces*/ -+MV_VOID mvPciHalInit(MV_U32 pciIf, MV_PCI_MOD pciIfmod); -+ -+/* mvPciCommandSet - Set PCI comman register value.*/ -+MV_STATUS mvPciCommandSet(MV_U32 pciIf, MV_U32 command); -+ -+/* mvPciModeGet - Get PCI interface mode.*/ -+MV_STATUS mvPciModeGet(MV_U32 pciIf, MV_PCI_MODE *pPciMode); -+ -+/* mvPciRetrySet - Set PCI retry counters*/ -+MV_STATUS mvPciRetrySet(MV_U32 pciIf, MV_U32 counter); -+ -+/* mvPciDiscardTimerSet - Set PCI discard timer*/ -+MV_STATUS mvPciDiscardTimerSet(MV_U32 pciIf, MV_U32 pClkCycles); -+ -+/* mvPciArbEnable - PCI arbiter enable/disable*/ -+MV_STATUS mvPciArbEnable(MV_U32 pciIf, MV_BOOL enable); -+ -+/* mvPciArbParkDis - Disable arbiter parking on agent */ -+MV_STATUS mvPciArbParkDis(MV_U32 pciIf, MV_U32 pciAgentMask); -+ -+/* mvPciArbBrokDetectSet - Set PCI arbiter broken detection */ -+MV_STATUS mvPciArbBrokDetectSet(MV_U32 pciIf, MV_U32 pClkCycles); -+ -+/* mvPciConfigRead - Read from configuration space */ -+MV_U32 mvPciConfigRead (MV_U32 pciIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func,MV_U32 regOff); -+ -+/* mvPciConfigWrite - Write to configuration space */ -+MV_STATUS mvPciConfigWrite(MV_U32 pciIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data); -+ -+/* mvPciMasterEnable - Enable/disale PCI interface master transactions.*/ -+MV_STATUS mvPciMasterEnable(MV_U32 pciIf, MV_BOOL enable); -+ -+/* mvPciSlaveEnable - Enable/disale PCI interface slave transactions.*/ -+MV_STATUS mvPciSlaveEnable(MV_U32 pciIf, MV_U32 bus, MV_U32 dev,MV_BOOL enable); -+ -+/* mvPciLocalBusNumSet - Set PCI interface local bus number.*/ -+MV_STATUS mvPciLocalBusNumSet(MV_U32 pciIf, MV_U32 busNum); -+ -+/* mvPciLocalBusNumGet - Get PCI interface local bus number.*/ -+MV_U32 mvPciLocalBusNumGet(MV_U32 pciIf); -+ -+/* mvPciLocalDevNumSet - Set PCI interface local device number.*/ -+MV_STATUS mvPciLocalDevNumSet(MV_U32 pciIf, MV_U32 devNum); -+ -+/* mvPciLocalDevNumGet - Get PCI interface local device number.*/ -+MV_U32 mvPciLocalDevNumGet(MV_U32 pciIf); -+ -+ -+#endif /* #ifndef __INCPCIH */ -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPciRegs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPciRegs.h -new file mode 100644 -index 0000000..9ae555f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pci/mvPciRegs.h -@@ -0,0 +1,411 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCPCIREGSH -+#define __INCPCIREGSH -+ -+ -+#include "pci-if/mvPciIfRegs.h" -+/* defines */ -+#define MAX_PCI_DEVICES 32 -+#define MAX_PCI_FUNCS 8 -+#define MAX_PCI_BUSSES 128 -+ -+/* enumerators */ -+ -+/* This enumerator described the possible PCI slave targets. */ -+/* PCI slave targets are designated memory/IO address spaces that the */ -+/* PCI slave targets can access. They are also refered as "targets" */ -+/* this enumeratoe order is determined by the content of : -+ PCI_BASE_ADDR_ENABLE_REG */ -+ -+ -+/* registers offsetes defines */ -+ -+ -+ -+/*************************/ -+/* PCI control registers */ -+/*************************/ -+/* maen : should add new registers */ -+#define PCI_CMD_REG(pciIf) (0x30c00 + ((pciIf) * 0x80)) -+#define PCI_MODE_REG(pciIf) (0x30d00 + ((pciIf) * 0x80)) -+#define PCI_RETRY_REG(pciIf) (0x30c04 + ((pciIf) * 0x80)) -+#define PCI_DISCARD_TIMER_REG(pciIf) (0x30d04 + ((pciIf) * 0x80)) -+#define PCI_ARBITER_CTRL_REG(pciIf) (0x31d00 + ((pciIf) * 0x80)) -+#define PCI_P2P_CONFIG_REG(pciIf) (0x31d14 + ((pciIf) * 0x80)) -+#define PCI_ACCESS_CTRL_BASEL_REG(pciIf, targetWin) \ -+ (0x31e00 + ((pciIf) * 0x80) + ((targetWin) * 0x10)) -+#define PCI_ACCESS_CTRL_BASEH_REG(pciIf, targetWin) \ -+ (0x31e04 + ((pciIf) * 0x80) + ((targetWin) * 0x10)) -+#define PCI_ACCESS_CTRL_SIZE_REG(pciIf, targetWin) \ -+ (0x31e08 + ((pciIf) * 0x80) + ((targetWin) * 0x10)) -+ -+#define PCI_DLL_CTRL_REG(pciIf) (0x31d20 + ((pciIf) * 0x80)) -+ -+/* PCI Dll Control (PDC)*/ -+#define PDC_DLL_EN BIT0 -+ -+ -+/* PCI Command Register (PCR) */ -+#define PCR_MASTER_BYTE_SWAP_EN BIT0 -+#define PCR_MASTER_WR_COMBINE_EN BIT4 -+#define PCR_MASTER_RD_COMBINE_EN BIT5 -+#define PCR_MASTER_WR_TRIG_WHOLE BIT6 -+#define PCR_MASTER_RD_TRIG_WHOLE BIT7 -+#define PCR_MASTER_MEM_RD_LINE_EN BIT8 -+#define PCR_MASTER_MEM_RD_MULT_EN BIT9 -+#define PCR_MASTER_WORD_SWAP_EN BIT10 -+#define PCR_SLAVE_WORD_SWAP_EN BIT11 -+#define PCR_NS_ACCORDING_RCV_TRANS BIT14 -+#define PCR_MASTER_PCIX_REQ64N_EN BIT15 -+#define PCR_SLAVE_BYTE_SWAP_EN BIT16 -+#define PCR_MASTER_DAC_EN BIT17 -+#define PCR_MASTER_M64_ALLIGN BIT18 -+#define PCR_ERRORS_PROPAGATION_EN BIT19 -+#define PCR_SLAVE_SWAP_ENABLE BIT20 -+#define PCR_MASTER_SWAP_ENABLE BIT21 -+#define PCR_MASTER_INT_SWAP_EN BIT22 -+#define PCR_LOOP_BACK_ENABLE BIT23 -+#define PCR_SLAVE_INTREG_SWAP_OFFS 24 -+#define PCR_SLAVE_INTREG_SWAP_MASK 0x3 -+#define PCR_SLAVE_INTREG_BYTE_SWAP \ -+ (MV_BYTE_SWAP << PCR_SLAVE_INT_REG_SWAP_MASK) -+#define PCR_SLAVE_INTREG_NO_SWAP \ -+ (MV_NO_SWAP << PCR_SLAVE_INT_REG_SWAP_MASK) -+#define PCR_SLAVE_INTREG_BYTE_WORD \ -+ (MV_BYTE_WORD_SWAP << PCR_SLAVE_INT_REG_SWAP_MASK) -+#define PCR_SLAVE_INTREG_WORD_SWAP \ -+ (MV_WORD_SWAP << PCR_SLAVE_INT_REG_SWAP_MASK) -+#define PCR_RESET_REASSERTION_EN BIT26 -+#define PCR_PCI_TO_CPU_REG_ORDER_EN BIT28 -+#define PCR_CPU_TO_PCI_ORDER_EN BIT29 -+#define PCR_PCI_TO_CPU_ORDER_EN BIT30 -+ -+/* PCI Mode Register (PMR) */ -+#define PMR_PCI_ID_OFFS 0 /* PCI Interface ID */ -+#define PMR_PCI_ID_MASK (0x1 << PMR_PCI_ID_OFFS) -+#define PMR_PCI_ID_PCI(pciNum) ((pciNum) << PCI_MODE_PCIID_OFFS) -+ -+#define PMR_PCI_64_OFFS 2 /* 64-bit PCI Interface */ -+#define PMR_PCI_64_MASK (0x1 << PMR_PCI_64_OFFS) -+#define PMR_PCI_64_64BIT (0x1 << PMR_PCI_64_OFFS) -+#define PMR_PCI_64_32BIT (0x0 << PMR_PCI_64_OFFS) -+ -+#define PMR_PCI_MODE_OFFS 4 /* PCI interface mode of operation */ -+#define PMR_PCI_MODE_MASK (0x3 << PMR_PCI_MODE_OFFS) -+#define PMR_PCI_MODE_CONV (0x0 << PMR_PCI_MODE_OFFS) -+#define PMR_PCI_MODE_PCIX_66MHZ (0x1 << PMR_PCI_MODE_OFFS) -+#define PMR_PCI_MODE_PCIX_100MHZ (0x2 << PMR_PCI_MODE_OFFS) -+#define PMR_PCI_MODE_PCIX_133MHZ (0x3 << PMR_PCI_MODE_OFFS) -+ -+#define PMR_EXP_ROM_SUPPORT BIT8 /* Expansion ROM Active */ -+ -+#define PMR_PCI_RESET_OFFS 31 /* PCI Interface Reset Indication */ -+#define PMR_PCI_RESET_MASK (0x1 << PMR_PCI_RESET_OFFS) -+#define PMR_PCI_RESET_PCIXRST (0x0 << PMR_PCI_RESET_OFFS) -+ -+ -+/* PCI Retry Register (PRR) */ -+#define PRR_RETRY_CNTR_OFFS 16 /* Retry Counter */ -+#define PRR_RETRY_CNTR_MAX 0xff -+#define PRR_RETRY_CNTR_MASK (PRR_RETRY_CNTR_MAX << PRR_RETRY_CNTR_OFFS) -+ -+ -+/* PCI Discard Timer Register (PDTR) */ -+#define PDTR_TIMER_OFFS 0 /* Timer */ -+#define PDTR_TIMER_MAX 0xffff -+#define PDTR_TIMER_MIN 0x7F -+#define PDTR_TIMER_MASK (PDTR_TIMER_MAX << PDTR_TIMER_OFFS) -+ -+ -+/* PCI Arbiter Control Register (PACR) */ -+#define PACR_BROKEN_DETECT_EN BIT1 /* Broken Detection Enable */ -+ -+#define PACR_BROKEN_VAL_OFFS 3 /* Broken Value */ -+#define PACR_BROKEN_VAL_MASK (0xf << PACR_BROKEN_VAL_OFFS) -+#define PACR_BROKEN_VAL_CONV_MIN 0x2 -+#define PACR_BROKEN_VAL_PCIX_MIN 0x6 -+ -+#define PACR_PARK_DIS_OFFS 14 /* Parking Disable */ -+#define PACR_PARK_DIS_MAX_AGENT 0x3f -+#define PACR_PARK_DIS_MASK (PACR_PARK_DIS_MAX_AGENT<<PACR_PARK_DIS_OFFS) -+#define PACR_PARK_DIS(agent) ((1 << (agent)) << PACR_PARK_DIS_OFFS) -+ -+#define PACR_ARB_ENABLE BIT31 /* Enable Internal Arbiter */ -+ -+ -+/* PCI P2P Configuration Register (PPCR) */ -+#define PPCR_2ND_BUS_L_OFFS 0 /* 2nd PCI Interface Bus Range Lower */ -+#define PPCR_2ND_BUS_L_MASK (0xff << PPCR_2ND_BUS_L_OFFS) -+ -+#define PPCR_2ND_BUS_H_OFFS 8 /* 2nd PCI Interface Bus Range Upper */ -+#define PPCR_2ND_BUS_H_MASK (0xff << PPCR_2ND_BUS_H_OFFS) -+ -+#define PPCR_BUS_NUM_OFFS 16 /* The PCI interface's Bus number */ -+#define PPCR_BUS_NUM_MASK (0xff << PPCR_BUS_NUM_OFFS) -+ -+#define PPCR_DEV_NUM_OFFS 24 /* The PCI interface’s Device number */ -+#define PPCR_DEV_NUM_MASK (0xff << PPCR_DEV_NUM_OFFS) -+ -+ -+/* PCI Access Control Base Low Register (PACBLR) */ -+#define PACBLR_EN BIT0 /* Access control window enable */ -+ -+#define PACBLR_ACCPROT BIT4 /* Access Protect */ -+#define PACBLR_WRPROT BIT5 /* Write Protect */ -+ -+#define PACBLR_PCISWAP_OFFS 6 /* PCI slave Data Swap Control */ -+#define PACBLR_PCISWAP_MASK (0x3 << PACBLR_PCISWAP_OFFS) -+#define PACBLR_PCISWAP_BYTE (0x0 << PACBLR_PCISWAP_OFFS) -+#define PACBLR_PCISWAP_NO_SWAP (0x1 << PACBLR_PCISWAP_OFFS) -+#define PACBLR_PCISWAP_BYTE_WORD (0x2 << PACBLR_PCISWAP_OFFS) -+#define PACBLR_PCISWAP_WORD (0x3 << PACBLR_PCISWAP_OFFS) -+ -+#define PACBLR_RDMBURST_OFFS 8 /* Read Max Burst */ -+#define PACBLR_RDMBURST_MASK (0x3 << PACBLR_RDMBURST_OFFS) -+#define PACBLR_RDMBURST_32BYTE (0x0 << PACBLR_RDMBURST_OFFS) -+#define PACBLR_RDMBURST_64BYTE (0x1 << PACBLR_RDMBURST_OFFS) -+#define PACBLR_RDMBURST_128BYTE (0x2 << PACBLR_RDMBURST_OFFS) -+ -+#define PACBLR_RDSIZE_OFFS 10 /* Typical PCI read transaction Size. */ -+#define PACBLR_RDSIZE_MASK (0x3 << PACBLR_RDSIZE_OFFS) -+#define PACBLR_RDSIZE_32BYTE (0x0 << PACBLR_RDSIZE_OFFS) -+#define PACBLR_RDSIZE_64BYTE (0x1 << PACBLR_RDSIZE_OFFS) -+#define PACBLR_RDSIZE_128BYTE (0x2 << PACBLR_RDSIZE_OFFS) -+#define PACBLR_RDSIZE_256BYTE (0x3 << PACBLR_RDSIZE_OFFS) -+ -+#define PACBLR_BASE_L_OFFS 12 /* Corresponds to address bits [31:12] */ -+#define PACBLR_BASE_L_MASK (0xfffff << PACBLR_BASE_L_OFFS) -+#define PACBLR_BASE_L_ALIGNMENT (1 << PACBLR_BASE_L_OFFS) -+#define PACBLR_BASE_ALIGN_UP(base) \ -+ ((base+PACBLR_BASE_L_ALIGNMENT)&PACBLR_BASE_L_MASK) -+#define PACBLR_BASE_ALIGN_DOWN(base) (base & PACBLR_BASE_L_MASK) -+ -+ -+/* PCI Access Control Base High Register (PACBHR) */ -+#define PACBHR_BASE_H_OFFS 0 /* Corresponds to address bits [63:32] */ -+#define PACBHR_CTRL_BASE_H_MASK (0xffffffff << PACBHR_BASE_H_OFFS) -+ -+/* PCI Access Control Size Register (PACSR) */ -+#define PACSR_WRMBURST_OFFS 8 /* Write Max Burst */ -+#define PACSR_WRMBURST_MASK (0x3 << PACSR_WRMBURST_OFFS) -+#define PACSR_WRMBURST_32BYTE (0x0 << PACSR_WRMBURST_OFFS) -+#define PACSR_WRMBURST_64BYTE (0x1 << PACSR_WRMBURST_OFFS) -+#define PACSR_WRMBURST_128BYTE (0x2 << PACSR_WRMBURST_OFFS) -+ -+#define PACSR_PCI_ORDERING BIT11 /* PCI Ordering required */ -+ -+#define PACSR_SIZE_OFFS 12 /* PCI access window size */ -+#define PACSR_SIZE_MASK (0xfffff << PACSR_SIZE_OFFS) -+#define PACSR_SIZE_ALIGNMENT (1 << PACSR_SIZE_OFFS) -+#define PACSR_SIZE_ALIGN_UP(size) \ -+ ((size+PACSR_SIZE_ALIGNMENT)&PACSR_SIZE_MASK) -+#define PACSR_SIZE_ALIGN_DOWN(size) (size & PACSR_SIZE_MASK) -+ -+ -+/***************************************/ -+/* PCI Configuration Access Registers */ -+/***************************************/ -+ -+#define PCI_CONFIG_ADDR_REG(pciIf) (0x30C78 - ((pciIf) * 0x80) ) -+#define PCI_CONFIG_DATA_REG(pciIf) (0x30C7C - ((pciIf) * 0x80) ) -+#define PCI_INT_ACK_REG(pciIf) (0x30C34 + ((pciIf) * 0x80) ) -+ -+/* PCI Configuration Address Register (PCAR) */ -+#define PCAR_REG_NUM_OFFS 2 -+#define PCAR_REG_NUM_MASK (0x3F << PCAR_REG_NUM_OFFS) -+ -+#define PCAR_FUNC_NUM_OFFS 8 -+#define PCAR_FUNC_NUM_MASK (0x7 << PCAR_FUNC_NUM_OFFS) -+ -+#define PCAR_DEVICE_NUM_OFFS 11 -+#define PCAR_DEVICE_NUM_MASK (0x1F << PCAR_DEVICE_NUM_OFFS) -+ -+#define PCAR_BUS_NUM_OFFS 16 -+#define PCAR_BUS_NUM_MASK (0xFF << PCAR_BUS_NUM_OFFS) -+ -+#define PCAR_CONFIG_EN BIT31 -+ -+ -+/***************************************/ -+/* PCI Configuration registers */ -+/***************************************/ -+ -+/*********************************************/ -+/* PCI Configuration, Function 0, Registers */ -+/*********************************************/ -+ -+/* Marvell Specific */ -+#define PCI_SCS0_BASE_ADDR_LOW 0x010 -+#define PCI_SCS0_BASE_ADDR_HIGH 0x014 -+#define PCI_SCS1_BASE_ADDR_LOW 0x018 -+#define PCI_SCS1_BASE_ADDR_HIGH 0x01C -+#define PCI_INTER_REG_MEM_MAPPED_BASE_ADDR_L 0x020 -+#define PCI_INTER_REG_MEM_MAPPED_BASE_ADDR_H 0x024 -+ -+/* capability list */ -+#define PCI_POWER_MNG_CAPABILITY 0x040 -+#define PCI_POWER_MNG_STATUS_CONTROL 0x044 -+#define PCI_VPD_ADDRESS_REG 0x048 -+#define PCI_VPD_DATA_REG 0x04c -+#define PCI_MSI_MESSAGE_CONTROL 0x050 -+#define PCI_MSI_MESSAGE_ADDR 0x054 -+#define PCI_MSI_MESSAGE_UPPER_ADDR 0x058 -+#define PCI_MSI_MESSAGE_DATA 0x05c -+#define PCIX_COMMAND 0x060 -+#define PCIX_STATUS 0x064 -+#define PCI_COMPACT_PCI_HOT_SWAP 0x068 -+ -+ -+/*********************************************/ -+/* PCI Configuration, Function 1, Registers */ -+/*********************************************/ -+ -+#define PCI_SCS2_BASE_ADDR_LOW 0x10 -+#define PCI_SCS2_BASE_ADDR_HIGH 0x14 -+#define PCI_SCS3_BASE_ADDR_LOW 0x18 -+#define PCI_SCS3_BASE_ADDR_HIGH 0x1c -+ -+ -+/***********************************************/ -+/* PCI Configuration, Function 2, Registers */ -+/***********************************************/ -+ -+#define PCI_DEVCS0_BASE_ADDR_LOW 0x10 -+#define PCI_DEVCS0_BASE_ADDR_HIGH 0x14 -+#define PCI_DEVCS1_BASE_ADDR_LOW 0x18 -+#define PCI_DEVCS1_BASE_ADDR_HIGH 0x1c -+#define PCI_DEVCS2_BASE_ADDR_LOW 0x20 -+#define PCI_DEVCS2_BASE_ADDR_HIGH 0x24 -+ -+/***********************************************/ -+/* PCI Configuration, Function 3, Registers */ -+/***********************************************/ -+ -+#define PCI_BOOTCS_BASE_ADDR_LOW 0x18 -+#define PCI_BOOTCS_BASE_ADDR_HIGH 0x1c -+ -+/***********************************************/ -+/* PCI Configuration, Function 4, Registers */ -+/***********************************************/ -+ -+#define PCI_P2P_MEM0_BASE_ADDR_LOW 0x10 -+#define PCI_P2P_MEM0_BASE_ADDR_HIGH 0x14 -+#define PCI_P2P_IO_BASE_ADDR 0x20 -+#define PCI_INTER_REGS_IO_MAPPED_BASE_ADDR 0x24 -+ -+/* PCIX_STATUS register fields (PXS) */ -+ -+#define PXS_FN_OFFS 0 /* Description Number */ -+#define PXS_FN_MASK (0x7 << PXS_FN_OFFS) -+ -+#define PXS_DN_OFFS 3 /* Device Number */ -+#define PXS_DN_MASK (0x1f << PXS_DN_OFFS) -+ -+#define PXS_BN_OFFS 8 /* Bus Number */ -+#define PXS_BN_MASK (0xff << PXS_BN_OFFS) -+ -+ -+/* PCI Error Report Register Map */ -+#define PCI_SERRN_MASK_REG(pciIf) (0x30c28 + (pciIf * 0x80)) -+#define PCI_CAUSE_REG(pciIf) (0x31d58 + (pciIf * 0x80)) -+#define PCI_MASK_REG(pciIf) (0x31d5C + (pciIf * 0x80)) -+#define PCI_ERROR_ADDR_LOW_REG(pciIf) (0x31d40 + (pciIf * 0x80)) -+#define PCI_ERROR_ADDR_HIGH_REG(pciIf) (0x31d44 + (pciIf * 0x80)) -+#define PCI_ERROR_ATTRIBUTE_REG(pciIf) (0x31d48 + (pciIf * 0x80)) -+#define PCI_ERROR_COMMAND_REG(pciIf) (0x31d50 + (pciIf * 0x80)) -+ -+/* PCI Interrupt Cause Register (PICR) */ -+#define PICR_ERR_SEL_OFFS 27 -+#define PICR_ERR_SEL_MASK (0x1f << PICR_ERR_SEL_OFFS) -+ -+/* PCI Error Command Register (PECR) */ -+#define PECR_ERR_CMD_OFFS 0 -+#define PECR_ERR_CMD_MASK (0xf << PECR_ERR_CMD_OFFS) -+#define PECR_DAC BIT4 -+ -+ -+/* defaults */ -+/* Set bits means value is about to change according to new value */ -+#define PCI_COMMAND_DEFAULT_MASK 0xffffdff1 -+#define PCI_COMMAND_DEFAULT \ -+ (PCR_MASTER_WR_TRIG_WHOLE | \ -+ PCR_MASTER_RD_TRIG_WHOLE | \ -+ PCR_MASTER_MEM_RD_LINE_EN | \ -+ PCR_MASTER_MEM_RD_MULT_EN | \ -+ PCR_NS_ACCORDING_RCV_TRANS | \ -+ PCR_MASTER_PCIX_REQ64N_EN | \ -+ PCR_MASTER_DAC_EN | \ -+ PCR_MASTER_M64_ALLIGN | \ -+ PCR_ERRORS_PROPAGATION_EN) -+ -+ -+#define PCI_ARBITER_CTRL_DEFAULT_MASK 0x801fc07a -+#define PCI_ARBITER_CTRL_DEFAULT \ -+ (PACR_BROKEN_VAL_PCIX_MIN << PACR_BROKEN_VAL_OFFS) -+ -+ -+#endif /* #ifndef __INCPCIREGSH */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.c b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.c -new file mode 100644 -index 0000000..709bb49 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.c -@@ -0,0 +1,1143 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "pex/mvPex.h" -+ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+ -+/* defines */ -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+MV_STATUS mvPexHalInit(MV_U32 pexIf, MV_PEX_TYPE pexType) -+{ -+ MV_PEX_MODE pexMode; -+ MV_U32 regVal; -+ MV_U32 status; -+ -+ /* First implement Guideline (GL# PCI Express-2) Wrong Default Value */ -+ /* to Transmitter Output Current (TXAMP) Relevant for: 88F5181-A1/B0/B1 */ -+ /* and 88F5281-B0 and above, 88F5182, 88F5082, 88F5181L, 88F6082/L */ -+ -+ if ((mvCtrlModelGet() != MV_1281_DEV_ID) && -+ (mvCtrlModelGet() != MV_6281_DEV_ID) && -+ (mvCtrlModelGet() != MV_6192_DEV_ID) && -+ (mvCtrlModelGet() != MV_6190_DEV_ID) && -+ (mvCtrlModelGet() != MV_6180_DEV_ID) && -+ (mvCtrlModelGet() != MV_6183_DEV_ID) && -+ (mvCtrlModelGet() != MV_6183L_DEV_ID) && -+ (mvCtrlModelGet() != MV_78100_DEV_ID) && -+ (mvCtrlModelGet() != MV_78200_DEV_ID) && -+ (mvCtrlModelGet() != MV_76100_DEV_ID) && -+ (mvCtrlModelGet() != MV_78XX0_DEV_ID)) -+ { -+ -+ /* Read current value of TXAMP */ -+ MV_REG_WRITE(0x41b00, 0x80820000); /* Write the read command */ -+ -+ regVal = MV_REG_READ(0x41b00); /* Extract the data */ -+ -+ /* Prepare new data for write */ -+ regVal &= ~0x7; /* Clear bits [2:0] */ -+ regVal |= 0x4; /* Set the new value */ -+ regVal &= ~0x80000000; /* Set "write" command */ -+ MV_REG_WRITE(0x41b00, regVal); /* Write the write command */ -+ -+ } -+ else -+ { -+ /* Implement 1.0V termination GL for 88F1281 device only */ -+ /* BIT0 - Common mode feedback */ -+ /* BIT3 - TxBuf, extra drive for 1.0V termination */ -+ if (mvCtrlModelGet() == MV_1281_DEV_ID) -+ { -+ MV_REG_WRITE(0x41b00, 0x80860000); /* Write the read command */ -+ regVal = MV_REG_READ(0x41b00); /* Extract the data */ -+ regVal |= (BIT0 | BIT3); -+ regVal &= ~0x80000000; /* Set "write" command */ -+ MV_REG_WRITE(0x41b00, regVal); /* Write the write command */ -+ -+ MV_REG_WRITE(0x31b00, 0x80860000); /* Write the read command */ -+ regVal = MV_REG_READ(0x31b00); /* Extract the data */ -+ regVal |= (BIT0 | BIT3); -+ regVal &= ~0x80000000; /* Set "write" command */ -+ MV_REG_WRITE(0x31b00, regVal); /* Write the write command */ -+ } -+ } -+ -+ if( mvPexModeGet(pexIf, &pexMode) != MV_OK) -+ { -+ mvOsPrintf("PEX init ERR. mvPexModeGet failed (pexType=%d)\n",pexMode.pexType); -+ return MV_ERROR; -+ } -+ -+ /* Check that required PEX type is the one set in reset time */ -+ if (pexType != pexMode.pexType) -+ { -+ /* No Link. Shut down the Phy */ -+ mvPexPowerDown(pexIf); -+ mvOsPrintf("PEX init ERR. PEX type sampled mismatch (%d,%d)\n",pexType,pexMode.pexType); -+ return MV_ERROR; -+ } -+ -+ if (MV_PEX_ROOT_COMPLEX == pexType) -+ { -+ mvPexLocalBusNumSet(pexIf, PEX_HOST_BUS_NUM(pexIf)); -+ mvPexLocalDevNumSet(pexIf, PEX_HOST_DEV_NUM(pexIf)); -+ -+ /* Local device master Enable */ -+ mvPexMasterEnable(pexIf, MV_TRUE); -+ -+ /* Local device slave Enable */ -+ mvPexSlaveEnable(pexIf, mvPexLocalBusNumGet(pexIf), -+ mvPexLocalDevNumGet(pexIf), MV_TRUE); -+ /* Interrupt disable */ -+ status = MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf, PEX_STATUS_AND_COMMAND)); -+ status |= PXSAC_INT_DIS; -+ MV_REG_WRITE(PEX_CFG_DIRECT_ACCESS(pexIf, PEX_STATUS_AND_COMMAND), status); -+ } -+ -+ /* now wait 500 ms to be sure the link is valid (spec compliant) */ -+ mvOsDelay(500); -+ /* Check if we have link */ -+ if (MV_REG_READ(PEX_STATUS_REG(pexIf)) & PXSR_DL_DOWN) -+ { -+ mvOsPrintf("PEX%d interface detected no Link.\n",pexIf); -+ return MV_NO_SUCH; -+ } -+ -+ if (MV_PEX_WITDH_X1 == pexMode.pexWidth) -+ { -+ mvOsPrintf("PEX%d interface detected Link X1\n",pexIf); -+ } -+ else -+ { -+ mvOsPrintf("PEX%d interface detected Link X4\n",pexIf); -+ } -+ -+#ifdef PCIE_VIRTUAL_BRIDGE_SUPPORT -+ mvPexVrtBrgInit(pexIf); -+#endif -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvPexModeGet - Get Pex Mode -+* -+* DESCRIPTION: -+* -+* INPUT: -+* pexIf - PEX interface number. -+* -+* OUTPUT: -+* pexMode - Pex mode structure -+* -+* RETURN: -+* MV_OK on success , MV_ERROR otherwise -+* -+*******************************************************************************/ -+MV_U32 mvPexModeGet(MV_U32 pexIf,MV_PEX_MODE *pexMode) -+{ -+ MV_U32 pexData; -+ -+ /* Parameter checking */ -+ if (PEX_DEFAULT_IF != pexIf) -+ { -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexModeGet: ERR. Invalid PEX interface %d\n",pexIf); -+ return MV_ERROR; -+ } -+ } -+ -+ pexData = MV_REG_READ(PEX_CTRL_REG(pexIf)); -+ -+ switch (pexData & PXCR_DEV_TYPE_CTRL_MASK) -+ { -+ case PXCR_DEV_TYPE_CTRL_CMPLX: -+ pexMode->pexType = MV_PEX_ROOT_COMPLEX; -+ break; -+ case PXCR_DEV_TYPE_CTRL_POINT: -+ pexMode->pexType = MV_PEX_END_POINT; -+ break; -+ -+ } -+ -+ /* Check if we have link */ -+ if (MV_REG_READ(PEX_STATUS_REG(pexIf)) & PXSR_DL_DOWN) -+ { -+ pexMode->pexLinkUp = MV_FALSE; -+ -+ /* If there is no link, the auto negotiation data is worthless */ -+ pexMode->pexWidth = MV_PEX_WITDH_INVALID; -+ } -+ else -+ { -+ pexMode->pexLinkUp = MV_TRUE; -+ -+ /* We have link. The link width is now valid */ -+ pexData = MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf, PEX_LINK_CTRL_STAT_REG)); -+ pexMode->pexWidth = ((pexData & PXLCSR_NEG_LNK_WDTH_MASK) >> -+ PXLCSR_NEG_LNK_WDTH_OFFS); -+ } -+ -+ return MV_OK; -+} -+ -+ -+/* PEX configuration space read write */ -+ -+/******************************************************************************* -+* mvPexConfigRead - Read from configuration space -+* -+* DESCRIPTION: -+* This function performs a 32 bit read from PEX configuration space. -+* It supports both type 0 and type 1 of Configuration Transactions -+* (local and over bridge). In order to read from local bus segment, use -+* bus number retrieved from mvPexLocalBusNumGet(). Other bus numbers -+* will result configuration transaction of type 1 (over bridge). -+* -+* INPUT: -+* pexIf - PEX interface number. -+* bus - PEX segment bus number. -+* dev - PEX device number. -+* func - Function number. -+* regOffs - Register offset. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* 32bit register data, 0xffffffff on error -+* -+*******************************************************************************/ -+MV_U32 mvPexConfigRead (MV_U32 pexIf, MV_U32 bus, MV_U32 dev, MV_U32 func, -+ MV_U32 regOff) -+{ -+#if defined(PCIE_VIRTUAL_BRIDGE_SUPPORT) -+ return mvPexVrtBrgConfigRead (pexIf, bus, dev, func, regOff); -+} -+ -+MV_U32 mvPexHwConfigRead (MV_U32 pexIf, MV_U32 bus, MV_U32 dev, MV_U32 func, -+ MV_U32 regOff) -+{ -+#endif -+ MV_U32 pexData = 0; -+ MV_U32 localDev,localBus; -+ -+ /* Parameter checking */ -+ if (PEX_DEFAULT_IF != pexIf) -+ { -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexConfigRead: ERR. Invalid PEX interface %d\n",pexIf); -+ return 0xFFFFFFFF; -+ } -+ } -+ -+ if (dev >= MAX_PEX_DEVICES) -+ { -+ DB(mvOsPrintf("mvPexConfigRead: ERR. device number illigal %d\n", dev)); -+ return 0xFFFFFFFF; -+ } -+ -+ if (func >= MAX_PEX_FUNCS) -+ { -+ DB(mvOsPrintf("mvPexConfigRead: ERR. function num illigal %d\n", func)); -+ return 0xFFFFFFFF; -+ } -+ -+ if (bus >= MAX_PEX_BUSSES) -+ { -+ DB(mvOsPrintf("mvPexConfigRead: ERR. bus number illigal %d\n", bus)); -+ return MV_ERROR; -+ } -+ -+ DB(mvOsPrintf("mvPexConfigRead: pexIf %d, bus %d, dev %d, func %d, regOff 0x%x\n", -+ pexIf, bus, dev, func, regOff)); -+ -+ localDev = mvPexLocalDevNumGet(pexIf); -+ localBus = mvPexLocalBusNumGet(pexIf); -+ -+ /* Speed up the process. In case on no link, return MV_ERROR */ -+ if ((dev != localDev) || (bus != localBus)) -+ { -+ pexData = MV_REG_READ(PEX_STATUS_REG(pexIf)); -+ -+ if ((pexData & PXSR_DL_DOWN)) -+ { -+ return MV_ERROR; -+ } -+ } -+ -+ /* in PCI Express we have only one device number */ -+ /* and this number is the first number we encounter -+ else that the localDev*/ -+ /* spec pex define return on config read/write on any device */ -+ if (bus == localBus) -+ { -+ if (localDev == 0) -+ { -+ /* if local dev is 0 then the first number we encounter -+ after 0 is 1 */ -+ if ((dev != 1)&&(dev != localDev)) -+ { -+ return MV_ERROR; -+ } -+ } -+ else -+ { -+ /* if local dev is not 0 then the first number we encounter -+ is 0 */ -+ -+ if ((dev != 0)&&(dev != localDev)) -+ { -+ return MV_ERROR; -+ } -+ } -+ if(func != 0 ) /* i.e bridge */ -+ { -+ return MV_ERROR; -+ } -+ } -+ -+ -+ /* Creating PEX address to be passed */ -+ pexData = (bus << PXCAR_BUS_NUM_OFFS); -+ pexData |= (dev << PXCAR_DEVICE_NUM_OFFS); -+ pexData |= (func << PXCAR_FUNC_NUM_OFFS); -+ pexData |= (regOff & PXCAR_REG_NUM_MASK); /* lgacy register space */ -+ /* extended register space */ -+ pexData |=(((regOff & PXCAR_REAL_EXT_REG_NUM_MASK) >> -+ PXCAR_REAL_EXT_REG_NUM_OFFS) << PXCAR_EXT_REG_NUM_OFFS); -+ -+ pexData |= PXCAR_CONFIG_EN; -+ -+ /* Write the address to the PEX configuration address register */ -+ MV_REG_WRITE(PEX_CFG_ADDR_REG(pexIf), pexData); -+ -+ DB(mvOsPrintf("mvPexConfigRead:address pexData=%x ",pexData)); -+ -+ -+ /* In order to let the PEX controller absorbed the address of the read */ -+ /* transaction we perform a validity check that the address was written */ -+ if(pexData != MV_REG_READ(PEX_CFG_ADDR_REG(pexIf))) -+ { -+ return MV_ERROR; -+ } -+ -+ /* cleaning Master Abort */ -+ MV_REG_BIT_SET(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_STATUS_AND_COMMAND), -+ PXSAC_MABORT); -+#if 0 -+ /* Guideline (GL# PCI Express-1) Erroneous Read Data on Configuration */ -+ /* This guideline is relevant for all devices except of the following devices: -+ 88F5281-BO and above, 88F5181L-A0 and above, 88F1281 A0 and above -+ 88F6183 A0 and above, 88F6183L */ -+ if ( ( (dev != localDev) || (bus != localBus) ) && -+ ( -+ !(MV_5281_DEV_ID == mvCtrlModelGet())&& -+ !((MV_5181_DEV_ID == mvCtrlModelGet())&& (mvCtrlRevGet() >= MV_5181L_A0_REV))&& -+ !(MV_1281_DEV_ID == mvCtrlModelGet())&& -+ !(MV_6183_DEV_ID == mvCtrlModelGet())&& -+ !(MV_6183L_DEV_ID == mvCtrlModelGet())&& -+ !(MV_6281_DEV_ID == mvCtrlModelGet())&& -+ !(MV_6192_DEV_ID == mvCtrlModelGet())&& -+ !(MV_6190_DEV_ID == mvCtrlModelGet())&& -+ !(MV_6180_DEV_ID == mvCtrlModelGet())&& -+ !(MV_78XX0_DEV_ID == mvCtrlModelGet()) -+ )) -+ { -+ -+ /* PCI-Express configuration read work-around */ -+ -+ /* we will use one of the Punit (AHBToMbus) windows to access the xbar -+ and read the data from there */ -+ /* -+ Need to configure the 2 free Punit (AHB to MBus bridge) -+ address decoding windows: -+ Configure the flash Window to handle Configuration space requests -+ for PEX0/1: -+ 1. write 0x7931/0x7941 to the flash window and the size, -+ 79-xbar attr (pci cfg), 3/4-xbar target (pex0/1), 1-WinEn -+ 2. write base to flash window -+ -+ Configuration transactions from the CPU should write/read the data -+ to/from address of the form: -+ addr[31:28] = 0x5 (for PEX0) or 0x6 (for PEX1) -+ addr[27:24] = extended register number -+ addr[23:16] = bus number -+ addr[15:11] = device number -+ addr[10:8] = function number -+ addr[7:0] = register number -+ */ -+ -+ #include "ctrlEnv/sys/mvAhbToMbus.h" -+ { -+ MV_U32 winNum; -+ MV_AHB_TO_MBUS_DEC_WIN originWin; -+ MV_U32 pciAddr=0; -+ MV_U32 remapLow=0,remapHigh=0; -+ -+ /* -+ We will use DEV_CS2\Flash window for this workarround -+ */ -+ -+ winNum = mvAhbToMbusWinTargetGet(PEX_CONFIG_RW_WA_TARGET); -+ -+ /* save remap values if exist */ -+ if ((1 == winNum)||(0 == winNum)) -+ { -+ remapLow = MV_REG_READ(AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum)); -+ remapHigh = MV_REG_READ(AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum)); -+ -+ } -+ -+ -+ /* save the original window values */ -+ mvAhbToMbusWinGet(winNum,&originWin); -+ -+ if (PEX_CONFIG_RW_WA_USE_ORIGINAL_WIN_VALUES) -+ { -+ /* set the window as xbar window */ -+ if (pexIf) -+ { -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), -+ (0x7931 | (((originWin.addrWin.size >> 16)-1) ) << 16)); -+ } -+ else -+ { -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), -+ (0x7941 | (((originWin.addrWin.size >> 16)-1) ) << 16)); -+ } -+ -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_BASE_REG(winNum), -+ originWin.addrWin.baseLow); -+ -+ /*pciAddr = originWin.addrWin.baseLow;*/ -+ pciAddr = (MV_U32)CPU_MEMIO_UNCACHED_ADDR( -+ (MV_U32)originWin.addrWin.baseLow); -+ -+ } -+ else -+ { -+ /* set the window as xbar window */ -+ if (pexIf) -+ { -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), -+ (0x7931 | (((PEX_CONFIG_RW_WA_SIZE >> 16)-1) ) << 16)); -+ } -+ else -+ { -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), -+ (0x7941 | (((PEX_CONFIG_RW_WA_SIZE >> 16)-1) ) << 16)); -+ } -+ -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_BASE_REG(winNum), -+ PEX_CONFIG_RW_WA_BASE); -+ -+ pciAddr = (MV_U32)CPU_MEMIO_UNCACHED_ADDR(PEX_CONFIG_RW_WA_BASE); -+ } -+ -+ -+ /* remap should be as base */ -+ if ((1 == winNum)||(0 == winNum)) -+ { -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum),pciAddr); -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum),0); -+ -+ } -+ -+ /* extended register space */ -+ pciAddr |= (bus << 16); -+ pciAddr |= (dev << 11); -+ pciAddr |= (func << 8); -+ pciAddr |= (regOff & PXCAR_REG_NUM_MASK); /* lgacy register space */ -+ -+ pexData = *(MV_U32*)pciAddr; -+ pexData = MV_32BIT_LE(pexData); /* Data always in LE */ -+ -+ /* restore the original window values */ -+ mvAhbToMbusWinSet(winNum,&originWin); -+ -+ /* restore original remap values*/ -+ if ((1 == winNum)||(0 == winNum)) -+ { -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum),remapLow); -+ MV_REG_WRITE(AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum),remapHigh); -+ -+ } -+ } -+ } -+ else -+#endif -+ { -+ /* Read the Data returned in the PEX Data register */ -+ pexData = MV_REG_READ(PEX_CFG_DATA_REG(pexIf)); -+ -+ } -+ -+ DB(mvOsPrintf("mvPexConfigRead: got : %x \n",pexData)); -+ -+ return pexData; -+ -+} -+ -+/******************************************************************************* -+* mvPexConfigWrite - Write to configuration space -+* -+* DESCRIPTION: -+* This function performs a 32 bit write to PEX configuration space. -+* It supports both type 0 and type 1 of Configuration Transactions -+* (local and over bridge). In order to write to local bus segment, use -+* bus number retrieved from mvPexLocalBusNumGet(). Other bus numbers -+* will result configuration transaction of type 1 (over bridge). -+* -+* INPUT: -+* pexIf - PEX interface number. -+* bus - PEX segment bus number. -+* dev - PEX device number. -+* func - Function number. -+* regOffs - Register offset. -+* data - 32bit data. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexConfigWrite(MV_U32 pexIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data) -+{ -+#if defined(PCIE_VIRTUAL_BRIDGE_SUPPORT) -+ return mvPexVrtBrgConfigWrite (pexIf, bus, dev, func, regOff, data); -+} -+ -+MV_STATUS mvPexHwConfigWrite(MV_U32 pexIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data) -+{ -+#endif -+ MV_U32 pexData = 0; -+ MV_U32 localDev,localBus; -+ -+ /* Parameter checking */ -+ if (PEX_DEFAULT_IF != pexIf) -+ { -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexConfigWrite: ERR. Invalid PEX interface %d\n", -+ pexIf); -+ return MV_ERROR; -+ } -+ } -+ -+ if (dev >= MAX_PEX_DEVICES) -+ { -+ mvOsPrintf("mvPexConfigWrite: ERR. device number illigal %d\n",dev); -+ return MV_BAD_PARAM; -+ } -+ -+ if (func >= MAX_PEX_FUNCS) -+ { -+ mvOsPrintf("mvPexConfigWrite: ERR. function number illigal %d\n", func); -+ return MV_ERROR; -+ } -+ -+ if (bus >= MAX_PEX_BUSSES) -+ { -+ mvOsPrintf("mvPexConfigWrite: ERR. bus number illigal %d\n", bus); -+ return MV_ERROR; -+ } -+ -+ -+ -+ localDev = mvPexLocalDevNumGet(pexIf); -+ localBus = mvPexLocalBusNumGet(pexIf); -+ -+ -+ /* in PCI Express we have only one device number other than ourselves*/ -+ /* and this number is the first number we encounter -+ else than the localDev that can be any valid dev number*/ -+ /* pex spec define return on config read/write on any device */ -+ if (bus == localBus) -+ { -+ -+ if (localDev == 0) -+ { -+ /* if local dev is 0 then the first number we encounter -+ after 0 is 1 */ -+ if ((dev != 1)&&(dev != localDev)) -+ { -+ return MV_ERROR; -+ } -+ -+ } -+ else -+ { -+ /* if local dev is not 0 then the first number we encounter -+ is 0 */ -+ -+ if ((dev != 0)&&(dev != localDev)) -+ { -+ return MV_ERROR; -+ } -+ } -+ -+ -+ } -+ -+ /* if we are not accessing ourselves , then check the link */ -+ if ((dev != localDev) || (bus != localBus) ) -+ { -+ /* workarround */ -+ /* when no link return MV_ERROR */ -+ -+ pexData = MV_REG_READ(PEX_STATUS_REG(pexIf)); -+ -+ if ((pexData & PXSR_DL_DOWN)) -+ { -+ return MV_ERROR; -+ } -+ -+ } -+ -+ pexData =0; -+ -+ /* Creating PEX address to be passed */ -+ pexData |= (bus << PXCAR_BUS_NUM_OFFS); -+ pexData |= (dev << PXCAR_DEVICE_NUM_OFFS); -+ pexData |= (func << PXCAR_FUNC_NUM_OFFS); -+ pexData |= (regOff & PXCAR_REG_NUM_MASK); /* lgacy register space */ -+ /* extended register space */ -+ pexData |=(((regOff & PXCAR_REAL_EXT_REG_NUM_MASK) >> -+ PXCAR_REAL_EXT_REG_NUM_OFFS) << PXCAR_EXT_REG_NUM_OFFS); -+ pexData |= PXCAR_CONFIG_EN; -+ -+ DB(mvOsPrintf("mvPexConfigWrite: If=%x bus=%x func=%x dev=%x regOff=%x data=%x \n", -+ pexIf,bus,func,dev,regOff,data,pexData) ); -+ -+ /* Write the address to the PEX configuration address register */ -+ MV_REG_WRITE(PEX_CFG_ADDR_REG(pexIf), pexData); -+ -+ /* Clear CPU pipe. Important where CPU can perform OOO execution */ -+ CPU_PIPE_FLUSH; -+ -+ /* In order to let the PEX controller absorbed the address of the read */ -+ /* transaction we perform a validity check that the address was written */ -+ if(pexData != MV_REG_READ(PEX_CFG_ADDR_REG(pexIf))) -+ { -+ return MV_ERROR; -+ } -+ -+ /* Write the Data passed to the PEX Data register */ -+ MV_REG_WRITE(PEX_CFG_DATA_REG(pexIf), data); -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvPexMasterEnable - Enable/disale PEX interface master transactions. -+* -+* DESCRIPTION: -+* This function performs read modified write to PEX command status -+* (offset 0x4) to set/reset bit 2. After this bit is set, the PEX -+* master is allowed to gain ownership on the bus, otherwise it is -+* incapable to do so. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexMasterEnable(MV_U32 pexIf, MV_BOOL enable) -+{ -+ MV_U32 pexCommandStatus; -+ MV_U32 localBus; -+ MV_U32 localDev; -+ -+ /* Parameter checking */ -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexMasterEnable: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_ERROR; -+ } -+ -+ localBus = mvPexLocalBusNumGet(pexIf); -+ localDev = mvPexLocalDevNumGet(pexIf); -+ -+ pexCommandStatus = MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf, -+ PEX_STATUS_AND_COMMAND)); -+ -+ -+ if (MV_TRUE == enable) -+ { -+ pexCommandStatus |= PXSAC_MASTER_EN; -+ } -+ else -+ { -+ pexCommandStatus &= ~PXSAC_MASTER_EN; -+ } -+ -+ -+ MV_REG_WRITE(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_STATUS_AND_COMMAND), -+ pexCommandStatus); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPexSlaveEnable - Enable/disale PEX interface slave transactions. -+* -+* DESCRIPTION: -+* This function performs read modified write to PEX command status -+* (offset 0x4) to set/reset bit 0 and 1. After those bits are set, -+* the PEX slave is allowed to respond to PEX IO space access (bit 0) -+* and PEX memory space access (bit 1). -+* -+* INPUT: -+* pexIf - PEX interface number. -+* dev - PEX device number. -+* enable - Enable/disable parameter. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexSlaveEnable(MV_U32 pexIf, MV_U32 bus,MV_U32 dev, MV_BOOL enable) -+{ -+ MV_U32 pexCommandStatus; -+ MV_U32 RegOffs; -+ -+ /* Parameter checking */ -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexSlaveEnable: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ if (dev >= MAX_PEX_DEVICES) -+ { -+ mvOsPrintf("mvPexLocalDevNumSet: ERR. device number illigal %d\n", dev); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ -+ RegOffs = PEX_STATUS_AND_COMMAND; -+ -+ pexCommandStatus = mvPexConfigRead(pexIf, bus, dev, 0, RegOffs); -+ -+ if (MV_TRUE == enable) -+ { -+ pexCommandStatus |= (PXSAC_IO_EN | PXSAC_MEM_EN); -+ } -+ else -+ { -+ pexCommandStatus &= ~(PXSAC_IO_EN | PXSAC_MEM_EN); -+ } -+ -+ mvPexConfigWrite(pexIf, bus, dev, 0, RegOffs, pexCommandStatus); -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvPexLocalBusNumSet - Set PEX interface local bus number. -+* -+* DESCRIPTION: -+* This function sets given PEX interface its local bus number. -+* Note: In case the PEX interface is PEX-X, the information is read-only. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* busNum - Bus number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_NOT_ALLOWED in case PEX interface is PEX-X. -+* MV_BAD_PARAM on bad parameters , -+* otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexLocalBusNumSet(MV_U32 pexIf, MV_U32 busNum) -+{ -+ MV_U32 pexStatus; -+ MV_U32 localBus; -+ MV_U32 localDev; -+ -+ -+ /* Parameter checking */ -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexLocalBusNumSet: ERR. Invalid PEX interface %d\n",pexIf); -+ return MV_BAD_PARAM; -+ } -+ if (busNum >= MAX_PEX_BUSSES) -+ { -+ mvOsPrintf("mvPexLocalBusNumSet: ERR. bus number illigal %d\n", busNum); -+ return MV_ERROR; -+ -+ } -+ -+ localBus = mvPexLocalBusNumGet(pexIf); -+ localDev = mvPexLocalDevNumGet(pexIf); -+ -+ -+ -+ pexStatus = MV_REG_READ(PEX_STATUS_REG(pexIf)); -+ -+ pexStatus &= ~PXSR_PEX_BUS_NUM_MASK; -+ -+ pexStatus |= (busNum << PXSR_PEX_BUS_NUM_OFFS) & PXSR_PEX_BUS_NUM_MASK; -+ -+ MV_REG_WRITE(PEX_STATUS_REG(pexIf), pexStatus); -+ -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPexLocalBusNumGet - Get PEX interface local bus number. -+* -+* DESCRIPTION: -+* This function gets the local bus number of a given PEX interface. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Local bus number.0xffffffff on Error -+* -+*******************************************************************************/ -+MV_U32 mvPexLocalBusNumGet(MV_U32 pexIf) -+{ -+ MV_U32 pexStatus; -+ -+ /* Parameter checking */ -+ if (PEX_DEFAULT_IF != pexIf) -+ { -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexLocalBusNumGet: ERR. Invalid PEX interface %d\n",pexIf); -+ return 0xFFFFFFFF; -+ } -+ } -+ -+ -+ pexStatus = MV_REG_READ(PEX_STATUS_REG(pexIf)); -+ -+ pexStatus &= PXSR_PEX_BUS_NUM_MASK; -+ -+ return (pexStatus >> PXSR_PEX_BUS_NUM_OFFS); -+ -+} -+ -+ -+/******************************************************************************* -+* mvPexLocalDevNumSet - Set PEX interface local device number. -+* -+* DESCRIPTION: -+* This function sets given PEX interface its local device number. -+* Note: In case the PEX interface is PEX-X, the information is read-only. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* devNum - Device number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_NOT_ALLOWED in case PEX interface is PEX-X. -+* MV_BAD_PARAM on bad parameters , -+* otherwise MV_OK -+* -+*******************************************************************************/ -+MV_STATUS mvPexLocalDevNumSet(MV_U32 pexIf, MV_U32 devNum) -+{ -+ MV_U32 pexStatus; -+ MV_U32 localBus; -+ MV_U32 localDev; -+ -+ /* Parameter checking */ -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexLocalDevNumSet: ERR. Invalid PEX interface %d\n",pexIf); -+ return MV_BAD_PARAM; -+ } -+ if (devNum >= MAX_PEX_DEVICES) -+ { -+ mvOsPrintf("mvPexLocalDevNumSet: ERR. device number illigal %d\n", -+ devNum); -+ return MV_BAD_PARAM; -+ -+ } -+ -+ localBus = mvPexLocalBusNumGet(pexIf); -+ localDev = mvPexLocalDevNumGet(pexIf); -+ -+ -+ pexStatus = MV_REG_READ(PEX_STATUS_REG(pexIf)); -+ -+ pexStatus &= ~PXSR_PEX_DEV_NUM_MASK; -+ -+ pexStatus |= (devNum << PXSR_PEX_DEV_NUM_OFFS) & PXSR_PEX_DEV_NUM_MASK; -+ -+ MV_REG_WRITE(PEX_STATUS_REG(pexIf), pexStatus); -+ -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvPexLocalDevNumGet - Get PEX interface local device number. -+* -+* DESCRIPTION: -+* This function gets the local device number of a given PEX interface. -+* -+* INPUT: -+* pexIf - PEX interface number. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Local device number. 0xffffffff on Error -+* -+*******************************************************************************/ -+MV_U32 mvPexLocalDevNumGet(MV_U32 pexIf) -+{ -+ MV_U32 pexStatus; -+ -+ /* Parameter checking */ -+ -+ if (PEX_DEFAULT_IF != pexIf) -+ { -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexLocalDevNumGet: ERR. Invalid PEX interface %d\n", -+ pexIf); -+ return 0xFFFFFFFF; -+ } -+ } -+ -+ pexStatus = MV_REG_READ(PEX_STATUS_REG(pexIf)); -+ -+ pexStatus &= PXSR_PEX_DEV_NUM_MASK; -+ -+ return (pexStatus >> PXSR_PEX_DEV_NUM_OFFS); -+} -+ -+MV_VOID mvPexPhyRegRead(MV_U32 pexIf, MV_U32 regOffset, MV_U16 *value) -+{ -+ -+ MV_U32 regAddr; -+ if (pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexPhyRegRead: ERR. Invalid PEX interface %d\n", pexIf); -+ return; -+ } -+ regAddr = (BIT31 | ((regOffset & 0x3fff) << 16)); -+ MV_REG_WRITE(PEX_PHY_ACCESS_REG(pexIf), regAddr); -+ *value = MV_REG_READ(PEX_PHY_ACCESS_REG(pexIf)); -+} -+ -+ -+MV_VOID mvPexPhyRegWrite(MV_U32 pexIf, MV_U32 regOffset, MV_U16 value) -+{ -+ -+ MV_U32 regAddr; -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexPhyRegWrite: ERR. Invalid PEX interface %d\n", pexIf); -+ return; -+ } -+ regAddr = (((regOffset & 0x3fff) << 16) | value); -+ MV_REG_WRITE(PEX_PHY_ACCESS_REG(pexIf), regAddr); -+} -+ -+/******************************************************************************* -+* mvPexActiveStateLinkPMEnable -+* -+* DESCRIPTION: -+* Enable Active Link State Power Management -+* -+* INPUT: -+* pexIf - PEX interface number. -+* enable - MV_TRUE to enable ASPM, MV_FALSE to disable. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* MV_OK on success , MV_ERROR otherwise -+* -+*******************************************************************************/ -+MV_STATUS mvPexActiveStateLinkPMEnable(MV_U32 pexIf, MV_BOOL enable) -+{ -+ MV_U32 reg; -+ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexActiveStateLinkPMEnable: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_ERROR; -+ } -+ -+ reg = MV_REG_READ(PEX_PWR_MNG_EXT_REG(pexIf)) & ~PXPMER_L1_ASPM_EN_MASK; -+ if(enable == MV_TRUE) -+ reg |= PXPMER_L1_ASPM_EN_MASK; -+ MV_REG_WRITE(PEX_PWR_MNG_EXT_REG(pexIf), reg); -+ -+ /* Enable / Disable L0/1 entry */ -+ reg = MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf, PEX_LINK_CTRL_STAT_REG)) -+ & ~PXLCSR_ASPM_CNT_MASK; -+ if(enable == MV_TRUE) -+ reg |= PXLCSR_ASPM_CNT_L0S_L1S_ENT_SUPP; -+ MV_REG_WRITE(PEX_CFG_DIRECT_ACCESS(pexIf, PEX_LINK_CTRL_STAT_REG), reg); -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvPexForceX1 -+* -+* DESCRIPTION: -+* shut down lanes 1-3 if recognize that attached to an x1 end-point -+* INPUT: -+* pexIf - PEX interface number. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* MV_OK on success , MV_ERROR otherwise -+* -+*******************************************************************************/ -+MV_U32 mvPexForceX1(MV_U32 pexIf) -+{ -+ MV_U32 regData = 0; -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexForceX1: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_BAD_PARAM; -+ } -+ -+ regData = MV_REG_READ(PEX_CTRL_REG(pexIf)) & ~(PXCR_CONF_LINK_MASK) ; -+ regData |= PXCR_CONF_LINK_X1; -+ -+ MV_REG_WRITE(PEX_CTRL_REG(pexIf), regData); -+ return MV_OK; -+} -+ -+MV_BOOL mvPexIsPowerUp(MV_U32 pexIf) -+{ -+ if(pexIf >= mvCtrlPexMaxIfGet()) -+ { -+ mvOsPrintf("mvPexIsPowerUp: ERR. Invalid PEX interface %d\n", pexIf); -+ return MV_FALSE; -+ } -+ return mvCtrlPwrClckGet(PEX_UNIT_ID, pexIf); -+} -+ -+ -+MV_VOID mvPexPowerDown(MV_U32 pexIf) -+{ -+ if ( (mvCtrlModelGet() == MV_78XX0_DEV_ID) || -+ (mvCtrlModelGet() == MV_76100_DEV_ID) || -+ (mvCtrlModelGet() == MV_78100_DEV_ID) || -+ (mvCtrlModelGet() == MV_78200_DEV_ID) ) -+ { -+ mvCtrlPwrClckSet(PEX_UNIT_ID, pexIf, MV_FALSE); -+ } -+ else -+ { -+ MV_REG_WRITE((0x41B00 -(pexIf)*0x10000), 0x20800087); -+ } -+} -+ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.h b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.h -new file mode 100644 -index 0000000..e84fdf9 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPex.h -@@ -0,0 +1,168 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCPEXH -+#define __INCPEXH -+ -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "pex/mvPexRegs.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+ -+ -+ -+/* NOTE not supported in this driver:*/ -+ -+ -+/* defines */ -+/* The number of supported PEX interfaces depend on Marvell controller */ -+/* device number. This device number ID is located on the PEX unit */ -+/* configuration header. This creates a loop where calling PEX */ -+/* configuration read/write routine results a call to get PEX configuration */ -+/* information etc. This macro defines a default PEX interface. This PEX */ -+/* interface is sure to exist. */ -+#define PEX_DEFAULT_IF 0 -+ -+ -+/* typedefs */ -+/* The Marvell controller supports both root complex and end point devices */ -+/* This enumeration describes the PEX type. */ -+typedef enum _mvPexType -+{ -+ MV_PEX_ROOT_COMPLEX, /* root complex device */ -+ MV_PEX_END_POINT /* end point device */ -+}MV_PEX_TYPE; -+ -+typedef enum _mvPexWidth -+{ -+ MV_PEX_WITDH_X1 = 1, -+ MV_PEX_WITDH_X2, -+ MV_PEX_WITDH_X3, -+ MV_PEX_WITDH_X4, -+ MV_PEX_WITDH_INVALID -+}MV_PEX_WIDTH; -+ -+/* PEX Bar attributes */ -+typedef struct _mvPexMode -+{ -+ MV_PEX_TYPE pexType; -+ MV_PEX_WIDTH pexWidth; -+ MV_BOOL pexLinkUp; -+}MV_PEX_MODE; -+ -+ -+ -+/* Global Functions prototypes */ -+/* mvPexInit - Initialize PEX interfaces*/ -+MV_STATUS mvPexHalInit(MV_U32 pexIf, MV_PEX_TYPE pexType); -+ -+/* mvPexModeGet - Get Pex If mode */ -+MV_U32 mvPexModeGet(MV_U32 pexIf,MV_PEX_MODE *pexMode); -+ -+/* mvPexConfigRead - Read from configuration space */ -+MV_U32 mvPexConfigRead (MV_U32 pexIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func,MV_U32 regOff); -+ -+/* mvPexConfigWrite - Write to configuration space */ -+MV_STATUS mvPexConfigWrite(MV_U32 pexIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data); -+ -+/* mvPexMasterEnable - Enable/disale PEX interface master transactions.*/ -+MV_STATUS mvPexMasterEnable(MV_U32 pexIf, MV_BOOL enable); -+ -+/* mvPexSlaveEnable - Enable/disale PEX interface slave transactions.*/ -+MV_STATUS mvPexSlaveEnable(MV_U32 pexIf, MV_U32 bus,MV_U32 dev, MV_BOOL enable); -+ -+/* mvPexLocalBusNumSet - Set PEX interface local bus number.*/ -+MV_STATUS mvPexLocalBusNumSet(MV_U32 pexIf, MV_U32 busNum); -+ -+/* mvPexLocalBusNumGet - Get PEX interface local bus number.*/ -+MV_U32 mvPexLocalBusNumGet(MV_U32 pexIf); -+ -+/* mvPexLocalDevNumSet - Set PEX interface local device number.*/ -+MV_STATUS mvPexLocalDevNumSet(MV_U32 pexIf, MV_U32 devNum); -+ -+/* mvPexLocalDevNumGet - Get PEX interface local device number.*/ -+MV_U32 mvPexLocalDevNumGet(MV_U32 pexIf); -+/* mvPexForceX1 - Force PEX interface to X1 mode. */ -+MV_U32 mvPexForceX1(MV_U32 pexIf); -+ -+/* mvPexIsPowerUp - Is PEX interface Power up? */ -+MV_BOOL mvPexIsPowerUp(MV_U32 pexIf); -+ -+/* mvPexPowerDown - Power Down */ -+MV_VOID mvPexPowerDown(MV_U32 pexIf); -+ -+/* mvPexPowerUp - Power Up */ -+MV_VOID mvPexPowerUp(MV_U32 pexIf); -+ -+/* mvPexPhyRegRead - Pex phy read */ -+MV_VOID mvPexPhyRegRead(MV_U32 pexIf, MV_U32 regOffset, MV_U16 *value); -+ -+/* mvPexPhyRegWrite - Pex phy write */ -+MV_VOID mvPexPhyRegWrite(MV_U32 pexIf, MV_U32 regOffset, MV_U16 value); -+ -+MV_STATUS mvPexActiveStateLinkPMEnable(MV_U32 pexIf, MV_BOOL enable); -+ -+#endif /* #ifndef __INCPEXH */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPexRegs.h b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPexRegs.h -new file mode 100644 -index 0000000..ea19e2f ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvPexRegs.h -@@ -0,0 +1,751 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCPEXREGSH -+#define __INCPEXREGSH -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* defines */ -+#define MAX_PEX_DEVICES 32 -+#define MAX_PEX_FUNCS 8 -+#define MAX_PEX_BUSSES 256 -+ -+ -+ -+/*********************************************************/ -+/* PCI Express Configuration Cycles Generation Registers */ -+/*********************************************************/ -+ -+#define PEX_CFG_ADDR_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x18F8) -+#define PEX_CFG_DATA_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x18FC) -+#define PEX_PHY_ACCESS_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1B00) -+/* PCI Express Configuration Address Register */ -+/* PEX_CFG_ADDR_REG (PXCAR)*/ -+ -+#define PXCAR_REG_NUM_OFFS 2 -+#define PXCAR_REG_NUM_MAX 0x3F -+#define PXCAR_REG_NUM_MASK (PXCAR_REG_NUM_MAX << PXCAR_REG_NUM_OFFS) -+#define PXCAR_FUNC_NUM_OFFS 8 -+#define PXCAR_FUNC_NUM_MAX 0x7 -+#define PXCAR_FUNC_NUM_MASK (PXCAR_FUNC_NUM_MAX << PXCAR_FUNC_NUM_OFFS) -+#define PXCAR_DEVICE_NUM_OFFS 11 -+#define PXCAR_DEVICE_NUM_MAX 0x1F -+#define PXCAR_DEVICE_NUM_MASK (PXCAR_DEVICE_NUM_MAX << PXCAR_DEVICE_NUM_OFFS) -+#define PXCAR_BUS_NUM_OFFS 16 -+#define PXCAR_BUS_NUM_MAX 0xFF -+#define PXCAR_BUS_NUM_MASK (PXCAR_BUS_NUM_MAX << PXCAR_BUS_NUM_OFFS) -+#define PXCAR_EXT_REG_NUM_OFFS 24 -+#define PXCAR_EXT_REG_NUM_MAX 0xF -+ -+/* in pci express register address is now the legacy register address (8 bits) -+with the new extended register address (more 4 bits) , below is the mask of -+the upper 4 bits of the full register address */ -+ -+#define PXCAR_REAL_EXT_REG_NUM_OFFS 8 -+#define PXCAR_EXT_REG_NUM_MASK (PXCAR_EXT_REG_NUM_MAX << PXCAR_EXT_REG_NUM_OFFS) -+#define PXCAR_CONFIG_EN BIT31 -+ -+#define PXCAR_REAL_EXT_REG_NUM_OFFS 8 -+#define PXCAR_REAL_EXT_REG_NUM_MASK (0xF << PXCAR_REAL_EXT_REG_NUM_OFFS) -+ -+/* The traditional PCI spec defined 6-bit field to describe register offset.*/ -+/* The new PCI Express extend the register offset by an extra 4-bits. */ -+/* The below macro assign 10-bit register offset into the apprpreate */ -+/* fields in the CFG_ADDR_REG */ -+#define PXCAR_REG_OFFS_SET(regOffs) \ -+ ( (regOff & PXCAR_REG_NUM_MASK) | \ -+ ( ((regOff & PXCAR_REAL_EXT_REG_NUM_MASK) >> PXCAR_REAL_EXT_REG_NUM_OFFS) << PXCAR_EXT_REG_NUM_OFFS) ) -+ -+/***********************************/ -+/* PCI Express Interrupt registers */ -+/***********************************/ -+#define PEX_CAUSE_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1900) -+#define PEX_MASK_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1910) -+ -+#define PXICR_TX_REQ_IN_DLDOWN_ERR BIT0 /* Transmit request while field */ -+ /* <DLDown> of the PCI Express */ -+/* PCI Express Interrupt Cause */ -+/* PEX_INT_CAUSE_REG (PXICR)*/ -+/* PEX_INT_MASK_REG*/ -+/* -+NOTE:All bits except bits[27:24] are Read/Write Clear only. A cause bit sets -+upon an error event occurrence. A write of 0 clears the bit. A write of 1 has -+no affect. Bits[24:27} are set and cleared upon reception of interrupt -+emulation messages. -+ -+Mask bit per cause bit. If a bit is set to 1, the corresponding event is -+enabled. Mask does not affect setting of the Interrupt Cause register bits; -+it only affects the assertion of the interrupt .*/ -+ -+ -+#define PXICR_MDIS_CAUSE BIT1 /* Attempt to generate PCI transaction -+ while master is disabled */ -+#define PXICR_ERR_WRTO_REG_CAUSE BIT3 /* Erroneous write attempt to -+ PCI Express internal register*/ -+#define PXICR_HIT_DFLT_WIN_ERR BIT4 /* Hit Default Window Error */ -+#define PXICR_RX_RAM_PAR_ERR BIT6 /* Rx RAM Parity Error */ -+#define PXICR_TX_RAM_PAR_ERR BIT7 /* Tx RAM Parity Error */ -+#define PXICR_COR_ERR_DET BIT8 /* Correctable Error Detected*/ -+#define PXICR_NF_ERR_DET BIT9 /* Non-Fatal Error Detected*/ -+#define PXICR_FERR_DET BIT10 /* Fatal Error Detected*/ -+#define PXICR_DSTATE_CHANGE BIT11 /* Dstate Change Indication*/ -+#define PXICR_BIST BIT12 /* PCI-Express BIST activated*/ -+#define PXICR_FLW_CTRL_PROT BIT14 /* Flow Control Protocol Error */ -+ -+#define PXICR_RCV_UR_CA_ERR BIT15 /* Received UR or CA status. */ -+#define PXICR_RCV_ERR_FATAL BIT16 /* Received ERR_FATAL message.*/ -+#define PXICR_RCV_ERR_NON_FATAL BIT17 /* Received ERR_NONFATAL message*/ -+#define PXICR_RCV_ERR_COR BIT18 /* Received ERR_COR message.*/ -+#define PXICR_RCV_CRS BIT19 /* Received CRS completion status*/ -+#define PXICR_SLV_HOT_RESET BIT20 /* Received Hot Reset Indication*/ -+#define PXICR_SLV_DIS_LINK BIT21 /* Slave Disable Link Indication*/ -+#define PXICR_SLV_LB BIT22 /* Slave Loopback Indication*/ -+#define PXICR_LINK_FAIL BIT23 /* Link Failure indication.*/ -+#define PXICR_RCV_INTA BIT24 /* IntA status.*/ -+#define PXICR_RCV_INTB BIT25 /* IntB status.*/ -+#define PXICR_RCV_INTC BIT26 /* IntC status.*/ -+#define PXICR_RCV_INTD BIT27 /* IntD status.*/ -+#define PXICR_RCV_PM_PME BIT28 /* Received PM_PME message. */ -+ -+ -+/********************************************/ -+/* PCI Express Control and Status Registers */ -+/********************************************/ -+#define PEX_CTRL_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1A00) -+#define PEX_STATUS_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1A04) -+#define PEX_COMPLT_TMEOUT_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1A10) -+#define PEX_PWR_MNG_EXT_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1A18) -+#define PEX_FLOW_CTRL_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1A20) -+#define PEX_ACK_TMR_4X_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1A30) -+#define PEX_ACK_TMR_1X_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1A40) -+#define PEX_TL_CTRL_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1AB0) -+ -+ -+#define PEX_RAM_PARITY_CTRL_REG(pexIf) ((PEX_IF_BASE(pexIf)) + 0x1A50) -+/* PCI Express Control Register */ -+/* PEX_CTRL_REG (PXCR) */ -+ -+#define PXCR_CONF_LINK_OFFS 0 -+#define PXCR_CONF_LINK_MASK (1 << PXCR_CONF_LINK_OFFS) -+#define PXCR_CONF_LINK_X4 (0 << PXCR_CONF_LINK_OFFS) -+#define PXCR_CONF_LINK_X1 (1 << PXCR_CONF_LINK_OFFS) -+#define PXCR_DEV_TYPE_CTRL_OFFS 1 /*PCI ExpressDevice Type Control*/ -+#define PXCR_DEV_TYPE_CTRL_MASK BIT1 -+#define PXCR_DEV_TYPE_CTRL_CMPLX (1 << PXCR_DEV_TYPE_CTRL_OFFS) -+#define PXCR_DEV_TYPE_CTRL_POINT (0 << PXCR_DEV_TYPE_CTRL_OFFS) -+#define PXCR_CFG_MAP_TO_MEM_EN BIT2 /* Configuration Header Mapping -+ to Memory Space Enable */ -+ -+#define PXCR_CFG_MAP_TO_MEM_EN BIT2 /* Configuration Header Mapping -+ to Memory Space Enable*/ -+ -+#define PXCR_RSRV1_OFFS 5 -+#define PXCR_RSRV1_MASK (0x7 << PXCR_RSRV1_OFFS) -+#define PXCR_RSRV1_VAL (0x0 << PXCR_RSRV1_OFFS) -+ -+#define PXCR_CONF_MAX_OUTSTND_OFFS 8 /*Maximum outstanding NP requests as a master*/ -+#define PXCR_CONF_MAX_OUTSTND_MASK (0x3 << PXCR_CONF_MAX_OUTSTND_OFFS) -+ -+ -+#define PXCR_CONF_NFTS_OFFS 16 /*number of FTS Ordered-Sets*/ -+#define PXCR_CONF_NFTS_MASK (0xff << PXCR_CONF_NFTS_OFFS) -+ -+#define PXCR_CONF_MSTR_HOT_RESET BIT24 /*Master Hot-Reset.*/ -+#define PXCR_CONF_MSTR_LB BIT26 /* Master Loopback */ -+#define PXCR_CONF_MSTR_DIS_SCRMB BIT27 /* Master Disable Scrambling*/ -+#define PXCR_CONF_DIRECT_DIS_SCRMB BIT28 /* Direct Disable Scrambling*/ -+ -+/* PCI Express Status Register */ -+/* PEX_STATUS_REG (PXSR) */ -+ -+#define PXSR_DL_DOWN BIT0 /* DL_Down indication.*/ -+ -+#define PXSR_PEX_BUS_NUM_OFFS 8 /* Bus Number Indication */ -+#define PXSR_PEX_BUS_NUM_MASK (0xff << PXSR_PEX_BUS_NUM_OFFS) -+ -+#define PXSR_PEX_DEV_NUM_OFFS 16 /* Device Number Indication */ -+#define PXSR_PEX_DEV_NUM_MASK (0x1f << PXSR_PEX_DEV_NUM_OFFS) -+ -+#define PXSR_PEX_SLV_HOT_RESET BIT24 /* Slave Hot Reset Indication*/ -+#define PXSR_PEX_SLV_DIS_LINK BIT25 /* Slave Disable Link Indication*/ -+#define PXSR_PEX_SLV_LB BIT26 /* Slave Loopback Indication*/ -+#define PXSR_PEX_SLV_DIS_SCRMB BIT27 /* Slave Disable Scrambling Indication*/ -+ -+ -+/* PCI Express Completion Timeout Register */ -+/* PEX_COMPLT_TMEOUT_REG (PXCTR)*/ -+ -+#define PXCTR_CMP_TO_THRSHLD_OFFS 0 /* Completion Timeout Threshold */ -+#define PXCTR_CMP_TO_THRSHLD_MASK (0xffff << PXCTR_CMP_TO_THRSHLD_OFFS) -+ -+/* PCI Express Power Management Extended Register */ -+/* PEX_PWR_MNG_EXT_REG (PXPMER) */ -+ -+#define PXPMER_L1_ASPM_EN_OFFS 1 -+#define PXPMER_L1_ASPM_EN_MASK (0x1 << PXPMER_L1_ASPM_EN_OFFS) -+ -+/* PCI Express Flow Control Register */ -+/* PEX_FLOW_CTRL_REG (PXFCR)*/ -+ -+#define PXFCR_PH_INIT_FC_OFFS 0 /*Posted Headers Flow Control Credit -+ Initial Value.*/ -+#define PXFCR_PH_INIT_FC_MASK (0xff << PXFCR_PH_INIT_FC_OFFS) -+ -+ -+#define PXFCR_NPH_INIT_FC_OFFS 8 /* Classified Non-Posted Headers -+ Flow Control Credit Initial Value*/ -+#define PXFCR_NPH_INIT_FC_MASK (0xff << PXFCR_NPH_INIT_FC_OFFS) -+ -+#define PXFCR_CH_INIT_FC_OFFS 16 /* Completion Headers Flow Control -+ Credit Initial Value Infinite*/ -+ -+#define PXFCR_CH_INIT_FC_MASK (0xff << PXFCR_CH_INIT_FC_OFFS) -+ -+#define PXFCR_FC_UPDATE_TO_OFFS 24 /* Flow Control Update Timeout */ -+#define PXFCR_FC_UPDATE_TO_MASK (0xff << PXFCR_FC_UPDATE_TO_OFFS) -+ -+/* PCI Express Acknowledge Timers (4X) Register */ -+/* PEX_ACK_TMR_4X_REG (PXAT4R) */ -+#define PXAT1R_ACK_LAT_TOX4_OFFS 0 /* Ack Latency Timer Timeout Value */ -+#define PXAT1R_ACK_LAT_TOX4_MASK (0xffff << PXAT4R_ACK_LAT_TOX1_OFFS) -+#define PXAT1R_ACK_RPLY_TOX4_OFFS 16 /* Ack Replay Timer Timeout Value */ -+#define PXAT1R_ACK_RPLY_TOX4_MASK (0xffff << PXAT1R_ACK_RPLY_TOX1_OFFS) -+ -+/* PCI Express Acknowledge Timers (1X) Register */ -+/* PEX_ACK_TMR_1X_REG (PXAT1R) */ -+ -+#define PXAT1R_ACK_LAT_TOX1_OFFS 0 /* Acknowledge Latency Timer Timeout -+ Value for 1X Link*/ -+#define PXAT1R_ACK_LAT_TOX1_MASK (0xffff << PXAT1R_ACK_LAT_TOX1_OFFS) -+ -+#define PXAT1R_ACK_RPLY_TOX1_OFFS 16 /* Acknowledge Replay Timer Timeout -+ Value for 1X*/ -+#define PXAT1R_ACK_RPLY_TOX1_MASK (0xffff << PXAT1R_ACK_RPLY_TOX1_OFFS) -+ -+ -+/* PCI Express TL Control Register */ -+/* PEX_TL_CTRL_REG (PXTCR) */ -+ -+#define PXTCR_TX_CMP_BUFF_NO_OFFS 8 /*Number of completion buffers in Tx*/ -+#define PXTCR_TX_CMP_BUFF_NO_MASK (0xf << PXTCR_TX_CMP_BUFF_NO_OFFS) -+ -+/* PCI Express Debug MAC Control Register */ -+/* PEX_DEBUG_MAC_CTRL_REG (PXDMCR) */ -+ -+#define PXDMCR_LINKUP BIT4 -+ -+ -+ -+/**********************************************/ -+/* PCI Express Configuration Header Registers */ -+/**********************************************/ -+#define PEX_CFG_DIRECT_ACCESS(pexIf,cfgReg) ((PEX_IF_BASE(pexIf)) + (cfgReg)) -+ -+#define PEX_DEVICE_AND_VENDOR_ID 0x000 -+#define PEX_STATUS_AND_COMMAND 0x004 -+#define PEX_CLASS_CODE_AND_REVISION_ID 0x008 -+#define PEX_BIST_HDR_TYPE_LAT_TMR_CACHE_LINE 0x00C -+#define PEX_MEMORY_BAR_BASE_ADDR(barNum) (0x010 + ((barNum) << 2)) -+#define PEX_MV_BAR_BASE(barNum) (0x010 + (barNum) * 8) -+#define PEX_MV_BAR_BASE_HIGH(barNum) (0x014 + (barNum) * 8) -+#define PEX_BAR0_INTER_REG 0x010 -+#define PEX_BAR0_INTER_REG_HIGH 0x014 -+#define PEX_BAR1_REG 0x018 -+#define PEX_BAR1_REG_HIGH 0x01C -+#define PEX_BAR2_REG 0x020 -+#define PEX_BAR2_REG_HIGH 0x024 -+ -+#define PEX_SUBSYS_ID_AND_SUBSYS_VENDOR_ID 0x02C -+#define PEX_EXPANSION_ROM_BASE_ADDR_REG 0x030 -+#define PEX_CAPABILTY_LIST_POINTER 0x034 -+#define PEX_INTERRUPT_PIN_AND_LINE 0x03C -+ -+/* capability list */ -+#define PEX_POWER_MNG_CAPABILITY 0x040 -+#define PEX_POWER_MNG_STATUS_CONTROL 0x044 -+ -+#define PEX_MSI_MESSAGE_CONTROL 0x050 -+#define PEX_MSI_MESSAGE_ADDR 0x054 -+#define PEX_MSI_MESSAGE_HIGH_ADDR 0x058 -+#define PEX_MSI_MESSAGE_DATA 0x05C -+ -+#define PEX_CAPABILITY_REG 0x60 -+#define PEX_DEV_CAPABILITY_REG 0x64 -+#define PEX_DEV_CTRL_STAT_REG 0x68 -+#define PEX_LINK_CAPABILITY_REG 0x6C -+#define PEX_LINK_CTRL_STAT_REG 0x70 -+ -+#define PEX_ADV_ERR_RPRT_HDR_TRGT_REG 0x100 -+#define PEX_UNCORRECT_ERR_STAT_REG 0x104 -+#define PEX_UNCORRECT_ERR_MASK_REG 0x108 -+#define PEX_UNCORRECT_ERR_SERVITY_REG 0x10C -+#define PEX_CORRECT_ERR_STAT_REG 0x110 -+#define PEX_CORRECT_ERR_MASK_REG 0x114 -+#define PEX_ADV_ERR_CAPABILITY_CTRL_REG 0x118 -+#define PEX_HDR_LOG_FIRST_DWORD_REG 0x11C -+#define PEX_HDR_LOG_SECOND_DWORD_REG 0x120 -+#define PEX_HDR_LOG_THIRD_DWORD_REG 0x124 -+#define PEX_HDR_LOG_FOURTH_DWORD_REG 0x128 -+ -+ -+ -+/* PCI Express Device and Vendor ID Register*/ -+/*PEX_DEVICE_AND_VENDOR_ID (PXDAVI)*/ -+ -+#define PXDAVI_VEN_ID_OFFS 0 /* Vendor ID */ -+#define PXDAVI_VEN_ID_MASK (0xffff << PXDAVI_VEN_ID_OFFS) -+ -+#define PXDAVI_DEV_ID_OFFS 16 /* Device ID */ -+#define PXDAVI_DEV_ID_MASK (0xffff << PXDAVI_DEV_ID_OFFS) -+ -+ -+/* PCI Express Command and Status Register*/ -+/*PEX_STATUS_AND_COMMAND (PXSAC)*/ -+ -+#define PXSAC_IO_EN BIT0 /* IO Enable */ -+#define PXSAC_MEM_EN BIT1 /* Memory Enable */ -+#define PXSAC_MASTER_EN BIT2 /* Master Enable */ -+#define PXSAC_PERR_EN BIT6 /* Parity Errors Respond Enable */ -+#define PXSAC_SERR_EN BIT8 /* Ability to assert SERR# line */ -+#define PXSAC_INT_DIS BIT10 /* Interrupt Disable */ -+#define PXSAC_INT_STAT BIT19 /* Interrupt Status */ -+#define PXSAC_CAP_LIST BIT20 /* Capability List Support */ -+#define PXSAC_MAS_DATA_PERR BIT24 /* Master Data Parity Error */ -+#define PXSAC_SLAVE_TABORT BIT27 /* Signalled Target Abort */ -+#define PXSAC_RT_ABORT BIT28 /* Recieved Target Abort */ -+#define PXSAC_MABORT BIT29 /* Recieved Master Abort */ -+#define PXSAC_SYSERR BIT30 /* Signalled system error */ -+#define PXSAC_DET_PARERR BIT31 /* Detect Parity Error */ -+ -+ -+/* PCI Express Class Code and Revision ID Register*/ -+/*PEX_CLASS_CODE_AND_REVISION_ID (PXCCARI)*/ -+ -+#define PXCCARI_REVID_OFFS 0 /* Revision ID */ -+#define PXCCARI_REVID_MASK (0xff << PXCCARI_REVID_OFFS) -+ -+#define PXCCARI_FULL_CLASS_OFFS 8 /* Full Class Code */ -+#define PXCCARI_FULL_CLASS_MASK (0xffffff << PXCCARI_FULL_CLASS_OFFS) -+ -+#define PXCCARI_PROGIF_OFFS 8 /* Prog .I/F*/ -+#define PXCCARI_PROGIF_MASK (0xff << PXCCARI_PROGIF_OFFS) -+ -+#define PXCCARI_SUB_CLASS_OFFS 16 /* Sub Class*/ -+#define PXCCARI_SUB_CLASS_MASK (0xff << PXCCARI_SUB_CLASS_OFFS) -+ -+#define PXCCARI_BASE_CLASS_OFFS 24 /* Base Class*/ -+#define PXCCARI_BASE_CLASS_MASK (0xff << PXCCARI_BASE_CLASS_OFFS) -+ -+ -+/* PCI Express BIST, Header Type and Cache Line Size Register*/ -+/*PEX_BIST_HDR_TYPE_LAT_TMR_CACHE_LINE (PXBHTLTCL)*/ -+ -+#define PXBHTLTCL_CACHELINE_OFFS 0 /* Specifies the cache line size */ -+#define PXBHTLTCL_CACHELINE_MASK (0xff << PXBHTLTCL_CACHELINE_OFFS) -+ -+#define PXBHTLTCL_HEADTYPE_FULL_OFFS 16 /* Full Header Type */ -+#define PXBHTLTCL_HEADTYPE_FULL_MASK (0xff << PXBHTLTCL_HEADTYPE_FULL_OFFS) -+ -+#define PXBHTLTCL_MULTI_FUNC BIT23 /* Multi/Single function */ -+ -+#define PXBHTLTCL_HEADER_OFFS 16 /* Header type */ -+#define PXBHTLTCL_HEADER_MASK (0x7f << PXBHTLTCL_HEADER_OFFS) -+#define PXBHTLTCL_HEADER_STANDARD (0x0 << PXBHTLTCL_HEADER_OFFS) -+#define PXBHTLTCL_HEADER_PCI2PCI_BRIDGE (0x1 << PXBHTLTCL_HEADER_OFFS) -+ -+ -+#define PXBHTLTCL_BISTCOMP_OFFS 24 /* BIST Completion Code */ -+#define PXBHTLTCL_BISTCOMP_MASK (0xf << PXBHTLTCL_BISTCOMP_OFFS) -+ -+#define PXBHTLTCL_BISTACT BIT30 /* BIST Activate bit */ -+#define PXBHTLTCL_BISTCAP BIT31 /* BIST Capable Bit */ -+#define PXBHTLTCL_BISTCAP_OFFS 31 -+#define PXBHTLTCL_BISTCAP_MASK BIT31 -+#define PXBHTLTCL_BISTCAP_VAL 0 -+ -+ -+/* PCI Express Subsystem Device and Vendor ID */ -+/*PEX_SUBSYS_ID_AND_SUBSYS_VENDOR_ID (PXSIASVI)*/ -+ -+#define PXSIASVI_VENID_OFFS 0 /* Subsystem Manufacturer Vendor ID Number */ -+#define PXSIASVI_VENID_MASK (0xffff << PXSIASVI_VENID_OFFS) -+ -+#define PXSIASVI_DEVID_OFFS 16 /* Subsystem Device ID Number */ -+#define PXSIASVI_DEVID_MASK (0xffff << PXSIASVI_DEVID_OFFS) -+ -+ -+/* PCI Express Capability List Pointer Register*/ -+/*PEX_CAPABILTY_LIST_POINTER (PXCLP)*/ -+ -+#define PXCLP_CAPPTR_OFFS 0 /* Capability List Pointer */ -+#define PXCLP_CAPPTR_MASK (0xff << PXCLP_CAPPTR_OFFS) -+ -+/* PCI Express Interrupt Pin and Line Register */ -+/*PEX_INTERRUPT_PIN_AND_LINE (PXIPAL)*/ -+ -+#define PXIPAL_INTLINE_OFFS 0 /* Interrupt line (IRQ) */ -+#define PXIPAL_INTLINE_MASK (0xff << PXIPAL_INTLINE_OFFS) -+ -+#define PXIPAL_INTPIN_OFFS 8 /* interrupt pin (A,B,C,D) */ -+#define PXIPAL_INTPIN_MASK (0xff << PXIPAL_INTPIN_OFFS) -+ -+ -+/* PCI Express Power Management Capability Header Register*/ -+/*PEX_POWER_MNG_CAPABILITY (PXPMC)*/ -+ -+#define PXPMC_CAP_ID_OFFS 0 /* Capability ID */ -+#define PXPMC_CAP_ID_MASK (0xff << PXPMC_CAP_ID_OFFS) -+ -+#define PXPMC_NEXT_PTR_OFFS 8 /* Next Item Pointer */ -+#define PXPMC_NEXT_PTR_MASK (0xff << PXPMC_NEXT_PTR_OFFS) -+ -+#define PXPMC_PMC_VER_OFFS 16 /* PCI Power Management Capability Version*/ -+#define PXPMC_PMC_VER_MASK (0x7 << PXPMC_PMC_VER_OFFS) -+ -+#define PXPMC_DSI BIT21/* Device Specific Initialization */ -+ -+#define PXPMC_AUX_CUR_OFFS 22 /* Auxiliary Current Requirements */ -+#define PXPMC_AUX_CUR_MASK (0x7 << PXPMC_AUX_CUR_OFFS) -+ -+#define PXPMC_D1_SUP BIT25 /* D1 Power Management support*/ -+ -+#define PXPMC_D2_SUP BIT26 /* D2 Power Management support*/ -+ -+#define PXPMC_PME_SUP_OFFS 27 /* PM Event generation support*/ -+#define PXPMC_PME_SUP_MASK (0x1f << PXPMC_PME_SUP_OFFS) -+ -+/* PCI Express Power Management Control and Status Register*/ -+/*PEX_POWER_MNG_STATUS_CONTROL (PXPMSC)*/ -+ -+#define PXPMSC_PM_STATE_OFFS 0 /* Power State */ -+#define PXPMSC_PM_STATE_MASK (0x3 << PXPMSC_PM_STATE_OFFS) -+#define PXPMSC_PM_STATE_D0 (0x0 << PXPMSC_PM_STATE_OFFS) -+#define PXPMSC_PM_STATE_D1 (0x1 << PXPMSC_PM_STATE_OFFS) -+#define PXPMSC_PM_STATE_D2 (0x2 << PXPMSC_PM_STATE_OFFS) -+#define PXPMSC_PM_STATE_D3 (0x3 << PXPMSC_PM_STATE_OFFS) -+ -+#define PXPMSC_PME_EN BIT8/* PM_PME Message Generation Enable */ -+ -+#define PXPMSC_PM_DATA_SEL_OFFS 9 /* Data Select*/ -+#define PXPMSC_PM_DATA_SEL_MASK (0xf << PXPMSC_PM_DATA_SEL_OFFS) -+ -+#define PXPMSC_PM_DATA_SCALE_OFFS 13 /* Data Scale */ -+#define PXPMSC_PM_DATA_SCALE_MASK (0x3 << PXPMSC_PM_DATA_SCALE_OFFS) -+ -+#define PXPMSC_PME_STAT BIT15/* PME Status */ -+ -+#define PXPMSC_PM_DATA_OFFS 24 /* State Data */ -+#define PXPMSC_PM_DATA_MASK (0xff << PXPMSC_PM_DATA_OFFS) -+ -+ -+/* PCI Express MSI Message Control Register*/ -+/*PEX_MSI_MESSAGE_CONTROL (PXMMC)*/ -+ -+#define PXMMC_CAP_ID_OFFS 0 /* Capability ID */ -+#define PXMMC_CAP_ID_MASK (0xff << PXMMC_CAP_ID_OFFS) -+ -+#define PXMMC_NEXT_PTR_OFFS 8 /* Next Item Pointer */ -+#define PXMMC_NEXT_PTR_MASK (0xff << PXMMC_NEXT_PTR_OFFS) -+ -+#define PXMMC_MSI_EN BIT18 /* MSI Enable */ -+ -+#define PXMMC_MULTI_CAP_OFFS 17 /* Multiple Message Capable */ -+#define PXMMC_MULTI_CAP_MASK (0x7 << PXMMC_MULTI_CAP_OFFS) -+ -+#define PXMMC_MULTI_EN_OFFS 20 /* Multiple Messages Enable */ -+#define PXMMC_MULTI_EN_MASK (0x7 << PXMMC_MULTI_EN_OFFS) -+ -+#define PXMMC_ADDR64 BIT23 /* 64-bit Addressing Capable */ -+ -+ -+/* PCI Express MSI Message Address Register*/ -+/*PEX_MSI_MESSAGE_ADDR (PXMMA)*/ -+ -+#define PXMMA_MSI_ADDR_OFFS 2 /* Message Address corresponds to -+ Address[31:2] of the MSI MWr TLP*/ -+#define PXMMA_MSI_ADDR_MASK (0x3fffffff << PXMMA_MSI_ADDR_OFFS) -+ -+ -+/* PCI Express MSI Message Address (High) Register */ -+/*PEX_MSI_MESSAGE_HIGH_ADDR (PXMMHA)*/ -+ -+#define PXMMA_MSI_ADDR_H_OFFS 0 /* Message Upper Address corresponds to -+ Address[63:32] of the MSI MWr TLP*/ -+#define PXMMA_MSI_ADDR_H_MASK (0xffffffff << PXMMA_MSI_ADDR_H_OFFS ) -+ -+ -+/* PCI Express MSI Message Data Register*/ -+/*PEX_MSI_MESSAGE_DATA (PXMMD)*/ -+ -+#define PXMMD_MSI_DATA_OFFS 0 /* Message Data */ -+#define PXMMD_MSI_DATA_MASK (0xffff << PXMMD_MSI_DATA_OFFS ) -+ -+ -+/* PCI Express Capability Register*/ -+/*PEX_CAPABILITY_REG (PXCR)*/ -+ -+#define PXCR_CAP_ID_OFFS 0 /* Capability ID*/ -+#define PXCR_CAP_ID_MASK (0xff << PXCR_CAP_ID_OFFS) -+ -+#define PXCR_NEXT_PTR_OFFS 8 /* Next Item Pointer*/ -+#define PXCR_NEXT_PTR_MASK (0xff << PXCR_NEXT_PTR_OFFS) -+ -+#define PXCR_CAP_VER_OFFS 16 /* Capability Version*/ -+#define PXCR_CAP_VER_MASK (0xf << PXCR_CAP_VER_OFFS) -+ -+#define PXCR_DEV_TYPE_OFFS 20 /* Device/Port Type*/ -+#define PXCR_DEV_TYPE_MASK (0xf << PXCR_DEV_TYPE_OFFS) -+ -+#define PXCR_SLOT_IMP BIT24 /* Slot Implemented*/ -+ -+#define PXCR_INT_MSG_NUM_OFFS 25 /* Interrupt Message Number*/ -+#define PXCR_INT_MSG_NUM_MASK (0x1f << PXCR_INT_MSG_NUM_OFFS) -+ -+ -+/* PCI Express Device Capabilities Register */ -+/*PEX_DEV_CAPABILITY_REG (PXDCR)*/ -+ -+#define PXDCR_MAX_PLD_SIZE_SUP_OFFS 0 /* Maximum Payload Size Supported*/ -+#define PXDCR_MAX_PLD_SIZE_SUP_MASK (0x7 << PXDCR_MAX_PLD_SIZE_SUP_OFFS) -+ -+#define PXDCR_EP_L0S_ACC_LAT_OFFS 6/* Endpoint L0s Acceptable Latency*/ -+#define PXDCR_EP_L0S_ACC_LAT_MASK (0x7 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+#define PXDCR_EP_L0S_ACC_LAT_64NS_LESS (0x0 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+#define PXDCR_EP_L0S_ACC_LAT_64NS_128NS (0x1 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+#define PXDCR_EP_L0S_ACC_LAT_128NS_256NS (0x2 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+#define PXDCR_EP_L0S_ACC_LAT_256NS_512NS (0x3 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+#define PXDCR_EP_L0S_ACC_LAT_512NS_1US (0x4 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+#define PXDCR_EP_L0S_ACC_LAT_1US_2US (0x5 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+#define PXDCR_EP_L0S_ACC_LAT_2US_4US (0x6 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+#define PXDCR_EP_L0S_ACC_LAT_4US_MORE (0x7 << PXDCR_EP_L0S_ACC_LAT_OFFS) -+ -+#define PXDCR_EP_L1_ACC_LAT_OFFS 9 /* Endpoint L1 Acceptable Latency*/ -+#define PXDCR_EP_L1_ACC_LAT_MASK (0x7 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXDCR_EP_L1_ACC_LAT_64NS_LESS (0x0 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXDCR_EP_L1_ACC_LAT_64NS_128NS (0x1 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXDCR_EP_L1_ACC_LAT_128NS_256NS (0x2 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXDCR_EP_L1_ACC_LAT_256NS_512NS (0x3 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXDCR_EP_L1_ACC_LAT_512NS_1US (0x4 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXDCR_EP_L1_ACC_LAT_1US_2US (0x5 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXDCR_EP_L1_ACC_LAT_2US_4US (0x6 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXDCR_EP_L1_ACC_LAT_4US_MORE (0x7 << PXDCR_EP_L1_ACC_LAT_OFFS) -+ -+ -+#define PXDCR_ATT_BUT_PRS_OFFS 12 /* Attention Button Present*/ -+#define PXDCR_ATT_BUT_PRS_MASK BIT12 -+#define PXDCR_ATT_BUT_PRS_IMPLEMENTED BIT12 -+ -+#define PXDCR_ATT_IND_PRS_OFFS 13 /* Attention Indicator Present*/ -+#define PXDCR_ATT_IND_PRS_MASK BIT13 -+#define PXDCR_ATT_IND_PRS_IMPLEMENTED BIT13 -+ -+#define PXDCR_PWR_IND_PRS_OFFS 14/* Power Indicator Present*/ -+#define PXDCR_PWR_IND_PRS_MASK BIT14 -+#define PXDCR_PWR_IND_PRS_IMPLEMENTED BIT14 -+ -+#define PXDCR_CAP_SPL_VAL_OFFS 18 /*Captured Slot Power Limit -+ Value*/ -+#define PXDCR_CAP_SPL_VAL_MASK (0xff << PXDCR_CAP_SPL_VAL_OFFS) -+ -+#define PXDCR_CAP_SP_LSCL_OFFS 26 /* Captured Slot Power Limit -+ Scale */ -+#define PXDCR_CAP_SP_LSCL_MASK (0x3 << PXDCR_CAP_SP_LSCL_OFFS) -+ -+/* PCI Express Device Control Status Register */ -+/*PEX_DEV_CTRL_STAT_REG (PXDCSR)*/ -+ -+#define PXDCSR_COR_ERR_REP_EN BIT0 /* Correctable Error Reporting Enable*/ -+#define PXDCSR_NF_ERR_REP_EN BIT1 /* Non-Fatal Error Reporting Enable*/ -+#define PXDCSR_F_ERR_REP_EN BIT2 /* Fatal Error Reporting Enable*/ -+#define PXDCSR_UR_REP_EN BIT3 /* Unsupported Request (UR) -+ Reporting Enable*/ -+#define PXDCSR_EN_RO BIT4 /* Enable Relaxed Ordering*/ -+ -+#define PXDCSR_MAX_PLD_SZ_OFFS 5 /* Maximum Payload Size*/ -+#define PXDCSR_MAX_PLD_SZ_MASK (0x7 << PXDCSR_MAX_PLD_SZ_OFFS) -+#define PXDCSR_MAX_PLD_SZ_128B (0x0 << PXDCSR_MAX_PLD_SZ_OFFS) -+#define PXDCSR_EN_NS BIT11 /* Enable No Snoop*/ -+ -+#define PXDCSR_MAX_RD_RQ_SZ_OFFS 12 /* Maximum Read Request Size*/ -+#define PXDCSR_MAX_RD_RQ_SZ_MASK (0x7 << PXDCSR_MAX_RD_RQ_SZ_OFFS) -+#define PXDCSR_MAX_RD_RQ_SZ_128B (0x0 << PXDCSR_MAX_RD_RQ_SZ_OFFS) -+#define PXDCSR_MAX_RD_RQ_SZ_256B (0x1 << PXDCSR_MAX_RD_RQ_SZ_OFFS) -+#define PXDCSR_MAX_RD_RQ_SZ_512B (0x2 << PXDCSR_MAX_RD_RQ_SZ_OFFS) -+#define PXDCSR_MAX_RD_RQ_SZ_1KB (0x3 << PXDCSR_MAX_RD_RQ_SZ_OFFS) -+#define PXDCSR_MAX_RD_RQ_SZ_2KB (0x4 << PXDCSR_MAX_RD_RQ_SZ_OFFS) -+#define PXDCSR_MAX_RD_RQ_SZ_4KB (0x5 << PXDCSR_MAX_RD_RQ_SZ_OFFS) -+ -+#define PXDCSR_COR_ERR_DET BIT16 /* Correctable Error Detected*/ -+#define PXDCSR_NF_ERR_DET BIT17 /* Non-Fatal Error Detected.*/ -+#define PXDCSR_F_ERR_DET BIT18 /* Fatal Error Detected.*/ -+#define PXDCSR_UR_DET BIT19 /* Unsupported Request Detected */ -+#define PXDCSR_AUX_PWR_DET BIT20 /* Reserved*/ -+ -+#define PXDCSR_TRANS_PEND_OFFS 21 /* Transactions Pending*/ -+#define PXDCSR_TRANS_PEND_MASK BIT21 -+#define PXDCSR_TRANS_PEND_NOT_COMPLETED (0x1 << PXDCSR_TRANS_PEND_OFFS) -+ -+ -+/* PCI Express Link Capabilities Register*/ -+/*PEX_LINK_CAPABILITY_REG (PXLCR)*/ -+ -+#define PXLCR_MAX_LINK_SPD_OFFS 0 /* Maximum Link Speed*/ -+#define PXLCR_MAX_LINK_SPD_MASK (0xf << PXLCR_MAX_LINK_SPD_OFFS) -+ -+#define PXLCR_MAX_LNK_WDTH_OFFS 3 /* Maximum Link Width*/ -+#define PXLCR_MAX_LNK_WDTH_MASK (0x3f << PXLCR_MAX_LNK_WDTH_OFFS) -+ -+#define PXLCR_ASPM_SUP_OFFS 10 /* Active State Link PM Support*/ -+#define PXLCR_ASPM_SUP_MASK (0x3 << PXLCR_ASPM_SUP_OFFS) -+ -+#define PXLCR_L0S_EXT_LAT_OFFS 12 /* L0s Exit Latency*/ -+#define PXLCR_L0S_EXT_LAT_MASK (0x7 << PXLCR_L0S_EXT_LAT_OFFS) -+#define PXLCR_L0S_EXT_LAT_64NS_LESS (0x0 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXLCR_L0S_EXT_LAT_64NS_128NS (0x1 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXLCR_L0S_EXT_LAT_128NS_256NS (0x2 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXLCR_L0S_EXT_LAT_256NS_512NS (0x3 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXLCR_L0S_EXT_LAT_512NS_1US (0x4 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXLCR_L0S_EXT_LAT_1US_2US (0x5 << PXDCR_EP_L1_ACC_LAT_OFFS) -+#define PXLCR_L0S_EXT_LAT_2US_4US (0x6 << PXDCR_EP_L1_ACC_LAT_OFFS) -+ -+#define PXLCR_POR_TNUM_OFFS 24 /* Port Number */ -+#define PXLCR_POR_TNUM_MASK (0xff << PXLCR_POR_TNUM_OFFS) -+ -+/* PCI Express Link Control Status Register */ -+/*PEX_LINK_CTRL_STAT_REG (PXLCSR)*/ -+ -+#define PXLCSR_ASPM_CNT_OFFS 0 /* Active State Link PM Control */ -+#define PXLCSR_ASPM_CNT_MASK (0x3 << PXLCSR_ASPM_CNT_OFFS) -+#define PXLCSR_ASPM_CNT_DISABLED (0x0 << PXLCSR_ASPM_CNT_OFFS) -+#define PXLCSR_ASPM_CNT_L0S_ENT_SUPP (0x1 << PXLCSR_ASPM_CNT_OFFS) -+#define PXLCSR_ASPM_CNT_L1S_ENT_SUPP (0x2 << PXLCSR_ASPM_CNT_OFFS) -+#define PXLCSR_ASPM_CNT_L0S_L1S_ENT_SUPP (0x3 << PXLCSR_ASPM_CNT_OFFS) -+ -+#define PXLCSR_RCB_OFFS 3 /* Read Completion Boundary */ -+#define PXLCSR_RCB_MASK BIT3 -+#define PXLCSR_RCB_64B (0 << PXLCSR_RCB_OFFS) -+#define PXLCSR_RCB_128B (1 << PXLCSR_RCB_OFFS) -+ -+#define PXLCSR_LNK_DIS BIT4 /* Link Disable */ -+#define PXLCSR_RETRN_LNK BIT5 /* Retrain Link */ -+#define PXLCSR_CMN_CLK_CFG BIT6 /* Common Clock Configuration */ -+#define PXLCSR_EXTD_SNC BIT7 /* Extended Sync */ -+ -+#define PXLCSR_LNK_SPD_OFFS 16 /* Link Speed */ -+#define PXLCSR_LNK_SPD_MASK (0xf << PXLCSR_LNK_SPD_OFFS) -+ -+#define PXLCSR_NEG_LNK_WDTH_OFFS 20 /* Negotiated Link Width */ -+#define PXLCSR_NEG_LNK_WDTH_MASK (0x3f << PXLCSR_NEG_LNK_WDTH_OFFS) -+#define PXLCSR_NEG_LNK_WDTH_X1 (0x1 << PXLCSR_NEG_LNK_WDTH_OFFS) -+ -+#define PXLCSR_LNK_TRN BIT27 /* Link Training */ -+ -+#define PXLCSR_SLT_CLK_CFG_OFFS 28 /* Slot Clock Configuration */ -+#define PXLCSR_SLT_CLK_CFG_MASK BIT28 -+#define PXLCSR_SLT_CLK_CFG_INDPNT (0x0 << PXLCSR_SLT_CLK_CFG_OFFS) -+#define PXLCSR_SLT_CLK_CFG_REF (0x1 << PXLCSR_SLT_CLK_CFG_OFFS) -+ -+/* PCI Express Advanced Error Report Header Register */ -+/*PEX_ADV_ERR_RPRT_HDR_TRGT_REG (PXAERHTR)*/ -+ -+/* PCI Express Uncorrectable Error Status Register*/ -+/*PEX_UNCORRECT_ERR_STAT_REG (PXUESR)*/ -+ -+/* PCI Express Uncorrectable Error Mask Register */ -+/*PEX_UNCORRECT_ERR_MASK_REG (PXUEMR)*/ -+ -+/* PCI Express Uncorrectable Error Severity Register */ -+/*PEX_UNCORRECT_ERR_SERVITY_REG (PXUESR)*/ -+ -+/* PCI Express Correctable Error Status Register */ -+/*PEX_CORRECT_ERR_STAT_REG (PXCESR)*/ -+ -+/* PCI Express Correctable Error Mask Register */ -+/*PEX_CORRECT_ERR_MASK_REG (PXCEMR)*/ -+ -+/* PCI Express Advanced Error Capability and Control Register*/ -+/*PEX_ADV_ERR_CAPABILITY_CTRL_REG (PXAECCR)*/ -+ -+/* PCI Express Header Log First DWORD Register*/ -+/*PEX_HDR_LOG_FIRST_DWORD_REG (PXHLFDR)*/ -+ -+/* PCI Express Header Log Second DWORD Register*/ -+/*PEX_HDR_LOG_SECOND_DWORD_REG (PXHLSDR)*/ -+ -+/* PCI Express Header Log Third DWORD Register*/ -+/*PEX_HDR_LOG_THIRD_DWORD_REG (PXHLTDR)*/ -+ -+/* PCI Express Header Log Fourth DWORD Register*/ -+/*PEX_HDR_LOG_FOURTH_DWORD_REG (PXHLFDR)*/ -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* #ifndef __INCPEXREGSH */ -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.c b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.c -new file mode 100644 -index 0000000..59d0383 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.c -@@ -0,0 +1,313 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "mvPex.h" -+ -+//#define MV_DEBUG -+/* defines */ -+#ifdef MV_DEBUG -+ #define DB(x) x -+#else -+ #define DB(x) -+#endif -+ -+/* locals */ -+typedef struct -+{ -+ MV_U32 data; -+ MV_U32 mask; -+}PEX_HEADER_DATA; -+ -+/* local function forwad decleration */ -+MV_U32 mvPexHwConfigRead (MV_U32 pexIf, MV_U32 bus, MV_U32 dev, MV_U32 func, -+ MV_U32 regOff); -+MV_STATUS mvPexHwConfigWrite(MV_U32 pexIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data); -+void resetPexConfig(MV_U32 pexIf, MV_U32 bus, MV_U32 dev); -+ -+ -+PEX_HEADER_DATA configHdr[16] = -+{ -+{0x888811ab, 0x00000000}, /*[device ID, vendor ID] */ -+{0x00100007, 0x0000ffff}, /*[status register, command register] */ -+{0x0604000e, 0x00000000}, /*[programming interface, sub class code, class code, revision ID] */ -+{0x00010008, 0x00000000}, /*[BIST, header type, latency time, cache line] */ -+{0x00000000, 0x00000000}, /*[base address 0] */ -+{0x00000000, 0x00000000}, /*[base address 1] */ -+{0x00000000, 0x00ffffff}, /*[secondary latency timersubordinate bus number, secondary bus number, primary bus number] */ -+{0x0000f101, 0x00000000}, /*[secondary status ,IO limit, IO base] */ -+{0x9ff0a000, 0x00000000}, /*[memory limit, memory base] */ -+{0x0001fff1, 0x00000000}, /*[prefetch memory limit, prefetch memory base] */ -+{0xffffffff, 0x00000000}, /*[prefetch memory base upper] */ -+{0x00000000, 0x00000000}, /*[prefetch memory limit upper] */ -+{0xeffff000, 0x00000000}, /*[IO limit upper 16 bits, IO base upper 16 bits] */ -+{0x00000000, 0x00000000}, /*[reserved, capability pointer] */ -+{0x00000000, 0x00000000}, /*[expansion ROM base address] */ -+{0x00000000, 0x000000FF}, /*[bridge control, interrupt pin, interrupt line] */ -+}; -+ -+ -+#define HEADER_WRITE(data, offset) configHdr[offset/4].data = ((configHdr[offset/4].data & ~configHdr[offset/4].mask) | \ -+ (data & configHdr[offset/4].mask)) -+#define HEADER_READ(offset) configHdr[offset/4].data -+ -+/******************************************************************************* -+* mvVrtBrgPexInit - Initialize PEX interfaces -+* -+* DESCRIPTION: -+* -+* This function is responsible of intialization of the Pex Interface , It -+* configure the Pex Bars and Windows in the following manner: -+* -+* Assumptions : -+* Bar0 is always internal registers bar -+* Bar1 is always the DRAM bar -+* Bar2 is always the Device bar -+* -+* 1) Sets the Internal registers bar base by obtaining the base from -+* the CPU Interface -+* 2) Sets the DRAM bar base and size by getting the base and size from -+* the CPU Interface when the size is the sum of all enabled DRAM -+* chip selects and the base is the base of CS0 . -+* 3) Sets the Device bar base and size by getting these values from the -+* CPU Interface when the base is the base of the lowest base of the -+* Device chip selects, and the -+* -+* -+* INPUT: -+* -+* pexIf - PEX interface number. -+* -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK if function success otherwise MV_ERROR or MV_BAD_PARAM -+* -+*******************************************************************************/ -+MV_STATUS mvPexVrtBrgInit(MV_U32 pexIf) -+{ -+ /* reset PEX tree to recover previous U-boot/Boot configurations */ -+ MV_U32 localBus = mvPexLocalBusNumGet(pexIf); -+ -+ -+ resetPexConfig(pexIf, localBus, 1); -+ return MV_OK; -+} -+ -+ -+MV_U32 mvPexVrtBrgConfigRead (MV_U32 pexIf, MV_U32 bus, MV_U32 dev, MV_U32 func, -+ MV_U32 regOff) -+{ -+ -+ MV_U32 localBus = mvPexLocalBusNumGet(pexIf); -+ MV_U32 localDev = mvPexLocalDevNumGet(pexIf); -+ MV_U32 val; -+ if(bus == localBus) -+ { -+ if(dev > 1) -+ { -+/* on the local device allow only device #0 & #1 */ -+ return 0xffffffff; -+ } -+ else -+ if (dev == localDev) -+ { -+ /* read the memory controller registers */ -+ return mvPexHwConfigRead (pexIf, bus, dev, func, regOff); -+ } -+ else -+ { -+ /* access the virtual brg header */ -+ return HEADER_READ(regOff); -+ } -+ } -+ else -+ if(bus == (localBus + 1)) -+ { -+ /* access the device behind the virtual bridge */ -+ if((dev == localDev) || (dev > 1)) -+ { -+ return 0xffffffff; -+ } -+ else -+ { -+ /* access the device behind the virtual bridge, in this case -+ * change the bus number to the local bus number in order to -+ * generate type 0 config cycle -+ */ -+ mvPexLocalBusNumSet(pexIf, bus); -+ mvPexLocalDevNumSet(pexIf, 1); -+ val = mvPexHwConfigRead (pexIf, bus, 0, func, regOff); -+ mvPexLocalBusNumSet(pexIf, localBus); -+ mvPexLocalDevNumSet(pexIf, localDev); -+ return val; -+ } -+ } -+ /* for all other devices use the HW function to get the -+ * requested registers -+ */ -+ mvPexLocalDevNumSet(pexIf, 1); -+ val = mvPexHwConfigRead (pexIf, bus, dev, func, regOff); -+ mvPexLocalDevNumSet(pexIf, localDev); -+ return val; -+} -+ -+ -+MV_STATUS mvPexVrtBrgConfigWrite(MV_U32 pexIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data) -+{ -+ MV_U32 localBus = mvPexLocalBusNumGet(pexIf); -+ MV_U32 localDev = mvPexLocalDevNumGet(pexIf); -+ MV_STATUS status; -+ -+ if(bus == localBus) -+ { -+ if(dev > 1) -+ { -+ /* on the local device allow only device #0 & #1 */ -+ return MV_ERROR; -+ } -+ else -+ if (dev == localDev) -+ { -+ /* read the memory controller registers */ -+ return mvPexHwConfigWrite (pexIf, bus, dev, func, regOff, data); -+ } -+ else -+ { -+ /* access the virtual brg header */ -+ HEADER_WRITE(data, regOff); -+ return MV_OK; -+ } -+ } -+ else -+ if(bus == (localBus + 1)) -+ { -+ /* access the device behind the virtual bridge */ -+ if((dev == localDev) || (dev > 1)) -+ { -+ return MV_ERROR; -+ } -+ else -+ { -+ /* access the device behind the virtual bridge, in this case -+ * change the bus number to the local bus number in order to -+ * generate type 0 config cycle -+ */ -+ //return mvPexHwConfigWrite (pexIf, localBus, dev, func, regOff, data); -+ mvPexLocalBusNumSet(pexIf, bus); -+ mvPexLocalDevNumSet(pexIf, 1); -+ status = mvPexHwConfigWrite (pexIf, bus, 0, func, regOff, data); -+ mvPexLocalBusNumSet(pexIf, localBus); -+ mvPexLocalDevNumSet(pexIf, localDev); -+ return status; -+ -+ } -+ } -+ /* for all other devices use the HW function to get the -+ * requested registers -+ */ -+ mvPexLocalDevNumSet(pexIf, 1); -+ status = mvPexHwConfigWrite (pexIf, bus, dev, func, regOff, data); -+ mvPexLocalDevNumSet(pexIf, localDev); -+ return status; -+} -+ -+ -+ -+ -+void resetPexConfig(MV_U32 pexIf, MV_U32 bus, MV_U32 dev) -+{ -+ MV_U32 tData; -+ MV_U32 i; -+ -+ /* restore the PEX configuration to initialization state */ -+ /* in case PEX P2P call recursive and reset config */ -+ tData = mvPexHwConfigRead (pexIf, bus, dev, 0x0, 0x0); -+ if(tData != 0xffffffff) -+ { -+ /* agent had been found - check whether P2P */ -+ tData = mvPexHwConfigRead (pexIf, bus, dev, 0x0, 0x8); -+ if((tData & 0xffff0000) == 0x06040000) -+ {/* P2P */ -+ /* get the sec bus and the subordinate */ -+ MV_U32 secBus; -+ tData = mvPexHwConfigRead (pexIf, bus, dev, 0x0, 0x18); -+ secBus = ((tData >> 8) & 0xff); -+ /* now scan on sec bus */ -+ for(i = 0;i < 0xff;i++) -+ { -+ resetPexConfig(pexIf, secBus, i); -+ } -+ /* now reset this device */ -+ DB(mvOsPrintf("Reset bus %d dev %d\n", bus, dev)); -+ mvPexHwConfigWrite(pexIf, bus, dev, 0x0, 0x18, 0x0); -+ DB(mvOsPrintf("Reset bus %d dev %d\n", bus, dev)); -+ } -+ } -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.h b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.h -new file mode 100644 -index 0000000..0741713 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/pex/mvVrtBrgPex.h -@@ -0,0 +1,82 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCVRTBRGPEXH -+#define __INCVRTBRGPEXH -+ -+ -+/* Global Functions prototypes */ -+/* mvPexInit - Initialize PEX interfaces*/ -+MV_STATUS mvPexVrtBrgInit(MV_U32 pexIf); -+ -+/* mvPexConfigRead - Read from configuration space */ -+MV_U32 mvPexVrtBrgConfigRead (MV_U32 pexIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func,MV_U32 regOff); -+ -+/* mvPexConfigWrite - Write to configuration space */ -+MV_STATUS mvPexVrtBrgConfigWrite(MV_U32 pexIf, MV_U32 bus, MV_U32 dev, -+ MV_U32 func, MV_U32 regOff, MV_U32 data); -+ -+ -+#endif /* #ifndef __INCPEXH */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.c b/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.c -new file mode 100644 -index 0000000..2643699 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.c -@@ -0,0 +1,1522 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#include "mvOs.h" -+#include "sflash/mvSFlash.h" -+#include "sflash/mvSFlashSpec.h" -+#include "spi/mvSpi.h" -+#include "spi/mvSpiCmnd.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+ -+/*#define MV_DEBUG*/ -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+/* Globals */ -+static MV_SFLASH_DEVICE_PARAMS sflash[] = { -+ /* ST M25P32 SPI flash, 4MB, 64 sectors of 64K each */ -+ { -+ MV_M25P_WREN_CMND_OPCD, -+ MV_M25P_WRDI_CMND_OPCD, -+ MV_M25P_RDID_CMND_OPCD, -+ MV_M25P_RDSR_CMND_OPCD, -+ MV_M25P_WRSR_CMND_OPCD, -+ MV_M25P_READ_CMND_OPCD, -+ MV_M25P_FAST_RD_CMND_OPCD, -+ MV_M25P_PP_CMND_OPCD, -+ MV_M25P_SE_CMND_OPCD, -+ MV_M25P_BE_CMND_OPCD, -+ MV_M25P_RES_CMND_OPCD, -+ MV_SFLASH_NO_SPECIFIC_OPCD, /* power save not supported */ -+ MV_M25P32_SECTOR_SIZE, -+ MV_M25P32_SECTOR_NUMBER, -+ MV_M25P_PAGE_SIZE, -+ "ST M25P32", -+ MV_M25PXXX_ST_MANF_ID, -+ MV_M25P32_DEVICE_ID, -+ MV_M25P32_MAX_SPI_FREQ, -+ MV_M25P32_MAX_FAST_SPI_FREQ, -+ MV_M25P32_FAST_READ_DUMMY_BYTES -+ }, -+ /* ST M25P64 SPI flash, 8MB, 128 sectors of 64K each */ -+ { -+ MV_M25P_WREN_CMND_OPCD, -+ MV_M25P_WRDI_CMND_OPCD, -+ MV_M25P_RDID_CMND_OPCD, -+ MV_M25P_RDSR_CMND_OPCD, -+ MV_M25P_WRSR_CMND_OPCD, -+ MV_M25P_READ_CMND_OPCD, -+ MV_M25P_FAST_RD_CMND_OPCD, -+ MV_M25P_PP_CMND_OPCD, -+ MV_M25P_SE_CMND_OPCD, -+ MV_M25P_BE_CMND_OPCD, -+ MV_M25P_RES_CMND_OPCD, -+ MV_SFLASH_NO_SPECIFIC_OPCD, /* power save not supported */ -+ MV_M25P64_SECTOR_SIZE, -+ MV_M25P64_SECTOR_NUMBER, -+ MV_M25P_PAGE_SIZE, -+ "ST M25P64", -+ MV_M25PXXX_ST_MANF_ID, -+ MV_M25P64_DEVICE_ID, -+ MV_M25P64_MAX_SPI_FREQ, -+ MV_M25P64_MAX_FAST_SPI_FREQ, -+ MV_M25P64_FAST_READ_DUMMY_BYTES -+ }, -+ /* ST M25P128 SPI flash, 16MB, 64 sectors of 256K each */ -+ { -+ MV_M25P_WREN_CMND_OPCD, -+ MV_M25P_WRDI_CMND_OPCD, -+ MV_M25P_RDID_CMND_OPCD, -+ MV_M25P_RDSR_CMND_OPCD, -+ MV_M25P_WRSR_CMND_OPCD, -+ MV_M25P_READ_CMND_OPCD, -+ MV_M25P_FAST_RD_CMND_OPCD, -+ MV_M25P_PP_CMND_OPCD, -+ MV_M25P_SE_CMND_OPCD, -+ MV_M25P_BE_CMND_OPCD, -+ MV_M25P_RES_CMND_OPCD, -+ MV_SFLASH_NO_SPECIFIC_OPCD, /* power save not supported */ -+ MV_M25P128_SECTOR_SIZE, -+ MV_M25P128_SECTOR_NUMBER, -+ MV_M25P_PAGE_SIZE, -+ "ST M25P128", -+ MV_M25PXXX_ST_MANF_ID, -+ MV_M25P128_DEVICE_ID, -+ MV_M25P128_MAX_SPI_FREQ, -+ MV_M25P128_MAX_FAST_SPI_FREQ, -+ MV_M25P128_FAST_READ_DUMMY_BYTES -+ }, -+ /* Macronix MXIC MX25L6405 SPI flash, 8MB, 128 sectors of 64K each */ -+ { -+ MV_MX25L_WREN_CMND_OPCD, -+ MV_MX25L_WRDI_CMND_OPCD, -+ MV_MX25L_RDID_CMND_OPCD, -+ MV_MX25L_RDSR_CMND_OPCD, -+ MV_MX25L_WRSR_CMND_OPCD, -+ MV_MX25L_READ_CMND_OPCD, -+ MV_MX25L_FAST_RD_CMND_OPCD, -+ MV_MX25L_PP_CMND_OPCD, -+ MV_MX25L_SE_CMND_OPCD, -+ MV_MX25L_BE_CMND_OPCD, -+ MV_MX25L_RES_CMND_OPCD, -+ MV_MX25L_DP_CMND_OPCD, -+ MV_MX25L6405_SECTOR_SIZE, -+ MV_MX25L6405_SECTOR_NUMBER, -+ MV_MXIC_PAGE_SIZE, -+ "MXIC MX25L6405", -+ MV_MXIC_MANF_ID, -+ MV_MX25L6405_DEVICE_ID, -+ MV_MX25L6405_MAX_SPI_FREQ, -+ MV_MX25L6405_MAX_FAST_SPI_FREQ, -+ MV_MX25L6405_FAST_READ_DUMMY_BYTES -+ }, -+ /* SPANSION S25FL128P SPI flash, 16MB, 64 sectors of 256K each */ -+ { -+ MV_S25FL_WREN_CMND_OPCD, -+ MV_S25FL_WRDI_CMND_OPCD, -+ MV_S25FL_RDID_CMND_OPCD, -+ MV_S25FL_RDSR_CMND_OPCD, -+ MV_S25FL_WRSR_CMND_OPCD, -+ MV_S25FL_READ_CMND_OPCD, -+ MV_S25FL_FAST_RD_CMND_OPCD, -+ MV_S25FL_PP_CMND_OPCD, -+ MV_S25FL_SE_CMND_OPCD, -+ MV_S25FL_BE_CMND_OPCD, -+ MV_S25FL_RES_CMND_OPCD, -+ MV_S25FL_DP_CMND_OPCD, -+ MV_S25FL128_SECTOR_SIZE, -+ MV_S25FL128_SECTOR_NUMBER, -+ MV_S25FL_PAGE_SIZE, -+ "SPANSION S25FL128", -+ MV_SPANSION_MANF_ID, -+ MV_S25FL128_DEVICE_ID, -+ MV_S25FL128_MAX_SPI_FREQ, -+ MV_M25P128_MAX_FAST_SPI_FREQ, -+ MV_M25P128_FAST_READ_DUMMY_BYTES -+ } -+}; -+ -+/* Static Functions */ -+static MV_STATUS mvWriteEnable (MV_SFLASH_INFO * pFlinfo); -+static MV_STATUS mvStatusRegGet (MV_SFLASH_INFO * pFlinfo, MV_U8 * pStatReg); -+static MV_STATUS mvStatusRegSet (MV_SFLASH_INFO * pFlinfo, MV_U8 sr); -+static MV_STATUS mvWaitOnWipClear(MV_SFLASH_INFO * pFlinfo); -+static MV_STATUS mvSFlashPageWr (MV_SFLASH_INFO * pFlinfo, MV_U32 offset, \ -+ MV_U8* pPageBuff, MV_U32 buffSize); -+static MV_STATUS mvSFlashWithDefaultsIdGet (MV_SFLASH_INFO * pFlinfo, \ -+ MV_U8* manId, MV_U16* devId); -+ -+/******************************************************************************* -+* mvWriteEnable - serialize the write enable sequence -+* -+* DESCRIPTION: -+* transmit the sequence for write enable -+* -+********************************************************************************/ -+static MV_STATUS mvWriteEnable(MV_SFLASH_INFO * pFlinfo) -+{ -+ MV_U8 cmd[MV_SFLASH_WREN_CMND_LENGTH]; -+ -+ -+ cmd[0] = sflash[pFlinfo->index].opcdWREN; -+ -+ return mvSpiWriteThenRead(cmd, MV_SFLASH_WREN_CMND_LENGTH, NULL, 0, 0); -+} -+ -+/******************************************************************************* -+* mvStatusRegGet - Retrieve the value of the status register -+* -+* DESCRIPTION: -+* perform the RDSR sequence to get the 8bit status register -+* -+********************************************************************************/ -+static MV_STATUS mvStatusRegGet(MV_SFLASH_INFO * pFlinfo, MV_U8 * pStatReg) -+{ -+ MV_STATUS ret; -+ MV_U8 cmd[MV_SFLASH_RDSR_CMND_LENGTH]; -+ MV_U8 sr[MV_SFLASH_RDSR_REPLY_LENGTH]; -+ -+ -+ -+ -+ cmd[0] = sflash[pFlinfo->index].opcdRDSR; -+ -+ if ((ret = mvSpiWriteThenRead(cmd, MV_SFLASH_RDSR_CMND_LENGTH, sr, -+ MV_SFLASH_RDSR_REPLY_LENGTH,0)) != MV_OK) -+ return ret; -+ -+ *pStatReg = sr[0]; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvWaitOnWipClear - Block waiting for the WIP (write in progress) to be cleared -+* -+* DESCRIPTION: -+* Block waiting for the WIP (write in progress) to be cleared -+* -+********************************************************************************/ -+static MV_STATUS mvWaitOnWipClear(MV_SFLASH_INFO * pFlinfo) -+{ -+ MV_STATUS ret; -+ MV_U32 i; -+ MV_U8 stat; -+ -+ for (i=0; i<MV_SFLASH_MAX_WAIT_LOOP; i++) -+ { -+ if ((ret = mvStatusRegGet(pFlinfo, &stat)) != MV_OK) -+ return ret; -+ -+ if ((stat & MV_SFLASH_STATUS_REG_WIP_MASK) == 0) -+ return MV_OK; -+ } -+ -+ DB(mvOsPrintf("%s WARNING: Write Timeout!\n", __FUNCTION__);) -+ return MV_TIMEOUT; -+} -+ -+/******************************************************************************* -+* mvWaitOnChipEraseDone - Block waiting for the WIP (write in progress) to be -+* cleared after a chip erase command which is supposed -+* to take about 2:30 minutes -+* -+* DESCRIPTION: -+* Block waiting for the WIP (write in progress) to be cleared -+* -+********************************************************************************/ -+static MV_STATUS mvWaitOnChipEraseDone(MV_SFLASH_INFO * pFlinfo) -+{ -+ MV_STATUS ret; -+ MV_U32 i; -+ MV_U8 stat; -+ -+ for (i=0; i<MV_SFLASH_CHIP_ERASE_MAX_WAIT_LOOP; i++) -+ { -+ if ((ret = mvStatusRegGet(pFlinfo, &stat)) != MV_OK) -+ return ret; -+ -+ if ((stat & MV_SFLASH_STATUS_REG_WIP_MASK) == 0) -+ return MV_OK; -+ } -+ -+ DB(mvOsPrintf("%s WARNING: Write Timeout!\n", __FUNCTION__);) -+ return MV_TIMEOUT; -+} -+ -+/******************************************************************************* -+* mvStatusRegSet - Set the value of the 8bit status register -+* -+* DESCRIPTION: -+* Set the value of the 8bit status register -+* -+********************************************************************************/ -+static MV_STATUS mvStatusRegSet(MV_SFLASH_INFO * pFlinfo, MV_U8 sr) -+{ -+ MV_STATUS ret; -+ MV_U8 cmd[MV_SFLASH_WRSR_CMND_LENGTH]; -+ -+ -+ /* Issue the Write enable command prior the WRSR command */ -+ if ((ret = mvWriteEnable(pFlinfo)) != MV_OK) -+ return ret; -+ -+ /* Write the SR with the new values */ -+ cmd[0] = sflash[pFlinfo->index].opcdWRSR; -+ cmd[1] = sr; -+ -+ if ((ret = mvSpiWriteThenRead(cmd, MV_SFLASH_WRSR_CMND_LENGTH, NULL, 0, 0)) != MV_OK) -+ return ret; -+ -+ if ((ret = mvWaitOnWipClear(pFlinfo)) != MV_OK) -+ return ret; -+ -+ mvOsDelay(1); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSFlashPageWr - Write up to 256 Bytes in the same page -+* -+* DESCRIPTION: -+* Write a buffer up to the page size in length provided that the whole address -+* range is within the same page (alligned to page bounderies) -+* -+*******************************************************************************/ -+static MV_STATUS mvSFlashPageWr (MV_SFLASH_INFO * pFlinfo, MV_U32 offset, -+ MV_U8* pPageBuff, MV_U32 buffSize) -+{ -+ MV_STATUS ret; -+ MV_U8 cmd[MV_SFLASH_PP_CMND_LENGTH]; -+ -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invalid parameter device index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* check that we do not cross the page bounderies */ -+ if (((offset & (sflash[pFlinfo->index].pageSize - 1)) + buffSize) > -+ sflash[pFlinfo->index].pageSize) -+ { -+ DB(mvOsPrintf("%s WARNING: Page allignment problem!\n", __FUNCTION__);) -+ return MV_OUT_OF_RANGE; -+ } -+ -+ /* Issue the Write enable command prior the page program command */ -+ if ((ret = mvWriteEnable(pFlinfo)) != MV_OK) -+ return ret; -+ -+ cmd[0] = sflash[pFlinfo->index].opcdPP; -+ cmd[1] = ((offset >> 16) & 0xFF); -+ cmd[2] = ((offset >> 8) & 0xFF); -+ cmd[3] = (offset & 0xFF); -+ -+ if ((ret = mvSpiWriteThenWrite(cmd, MV_SFLASH_PP_CMND_LENGTH, pPageBuff, buffSize)) != MV_OK) -+ return ret; -+ -+ if ((ret = mvWaitOnWipClear(pFlinfo)) != MV_OK) -+ return ret; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSFlashWithDefaultsIdGet - Try to read the manufacturer and Device IDs from -+* the device using the default RDID opcode and the default WREN opcode. -+* -+* DESCRIPTION: -+* This is used to detect a generic device that uses the default opcodes -+* for the WREN and RDID. -+* -+********************************************************************************/ -+static MV_STATUS mvSFlashWithDefaultsIdGet (MV_SFLASH_INFO * pFlinfo, MV_U8* manId, MV_U16* devId) -+{ -+ MV_STATUS ret; -+ MV_U8 cmdRDID[MV_SFLASH_RDID_CMND_LENGTH]; -+ MV_U8 id[MV_SFLASH_RDID_REPLY_LENGTH]; -+ -+ -+ -+ /* Use the default RDID opcode to read the IDs */ -+ cmdRDID[0] = MV_SFLASH_DEFAULT_RDID_OPCD; /* unknown model try default */ -+ if ((ret = mvSpiWriteThenRead(cmdRDID, MV_SFLASH_RDID_CMND_LENGTH, id, MV_SFLASH_RDID_REPLY_LENGTH, 0)) != MV_OK) -+ return ret; -+ -+ *manId = id[0]; -+ *devId = 0; -+ *devId |= (id[1] << 8); -+ *devId |= id[2]; -+ -+ return MV_OK; -+} -+ -+/* -+##################################################################################### -+##################################################################################### -+*/ -+ -+/******************************************************************************* -+* mvSFlashInit - Initialize the serial flash device -+* -+* DESCRIPTION: -+* Perform the neccessary initialization and configuration -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* pFlinfo->baseAddr: base address in fast mode. -+* pFlinfo->index: Index of the flash in the sflash tabel. If the SPI -+* flash device does not support read Id command with -+* the standard opcode, then the user should supply this -+* as an input to skip the autodetection process!!!! -+* -+* OUTPUT: -+* pFlinfo: pointer to the Flash information structure after detection -+* pFlinfo->manufacturerId: Manufacturer ID -+* pFlinfo->deviceId: Device ID -+* pFlinfo->sectorSize: size of the sector (all sectors are the same). -+* pFlinfo->sectorNumber: number of sectors. -+* pFlinfo->pageSize: size of the page. -+* pFlinfo->index: Index of the detected flash in the sflash tabel -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashInit (MV_SFLASH_INFO * pFlinfo) -+{ -+ MV_STATUS ret; -+ MV_U8 manf; -+ MV_U16 dev; -+ MV_U32 indx; -+ MV_BOOL detectFlag = MV_FALSE; -+ -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Initialize the SPI interface with low frequency to make sure that the read ID succeeds */ -+ if ((ret = mvSpiInit(MV_SFLASH_BASIC_SPI_FREQ)) != MV_OK) -+ { -+ mvOsPrintf("%s ERROR: Failed to initialize the SPI interface!\n", __FUNCTION__); -+ return ret; -+ } -+ -+ /* First try to read the Manufacturer and Device IDs */ -+ if ((ret = mvSFlashIdGet(pFlinfo, &manf, &dev)) != MV_OK) -+ { -+ mvOsPrintf("%s ERROR: Failed to get the SFlash ID!\n", __FUNCTION__); -+ return ret; -+ } -+ -+ /* loop over the whole table and look for the appropriate SFLASH */ -+ for (indx=0; indx<MV_ARRAY_SIZE(sflash); indx++) -+ { -+ if ((manf == sflash[indx].manufacturerId) && (dev == sflash[indx].deviceId)) -+ { -+ pFlinfo->manufacturerId = manf; -+ pFlinfo->deviceId = dev; -+ pFlinfo->index = indx; -+ detectFlag = MV_TRUE; -+ } -+ } -+ -+ if(!detectFlag) -+ { -+ mvOsPrintf("%s ERROR: Unknown SPI flash device!\n", __FUNCTION__); -+ return MV_FAIL; -+ } -+ -+ /* fill the info based on the model detected */ -+ pFlinfo->sectorSize = sflash[pFlinfo->index].sectorSize; -+ pFlinfo->sectorNumber = sflash[pFlinfo->index].sectorNumber; -+ pFlinfo->pageSize = sflash[pFlinfo->index].pageSize; -+ -+ /* Set the SPI frequency to the MAX allowed for the device for best performance */ -+ if ((ret = mvSpiBaudRateSet(sflash[pFlinfo->index].spiMaxFreq)) != MV_OK) -+ { -+ mvOsPrintf("%s ERROR: Failed to set the SPI frequency!\n", __FUNCTION__); -+ return ret; -+ } -+ -+ /* As default lock the SR */ -+ if ((ret = mvSFlashStatRegLock(pFlinfo, MV_TRUE)) != MV_OK) -+ return ret; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSFlashSectorErase - Erasse a single sector of the serial flash -+* -+* DESCRIPTION: -+* Issue the erase sector command and address -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* secNumber: sector Number to erase (0 -> (sectorNumber-1)) -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashSectorErase (MV_SFLASH_INFO * pFlinfo, MV_U32 secNumber) -+{ -+ MV_STATUS ret; -+ MV_U8 cmd[MV_SFLASH_SE_CMND_LENGTH]; -+ -+ MV_U32 secAddr = (secNumber * pFlinfo->sectorSize); -+#if 0 -+ MV_U32 i; -+ MV_U32 * pW = (MV_U32*) (secAddr + pFlinfo->baseAddr); -+ MV_U32 erasedWord = 0xFFFFFFFF; -+ MV_U32 wordsPerSector = (pFlinfo->sectorSize / sizeof(MV_U32)); -+ MV_BOOL eraseNeeded = MV_FALSE; -+#endif -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* check that the sector number is valid */ -+ if (secNumber >= pFlinfo->sectorNumber) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter sector number!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* we don't want to access SPI in direct mode from in-direct API, -+ becasue of timing issue between CS asserts. */ -+#if 0 -+ /* First compare to FF and check if erase is needed */ -+ for (i=0; i<wordsPerSector; i++) -+ { -+ if (memcmp(pW, &erasedWord, sizeof(MV_U32)) != 0) -+ { -+ eraseNeeded = MV_TRUE; -+ break; -+ } -+ -+ ++pW; -+ } -+ if (!eraseNeeded) -+ return MV_OK; -+#endif -+ -+ cmd[0] = sflash[pFlinfo->index].opcdSE; -+ cmd[1] = ((secAddr >> 16) & 0xFF); -+ cmd[2] = ((secAddr >> 8) & 0xFF); -+ cmd[3] = (secAddr & 0xFF); -+ -+ /* Issue the Write enable command prior the sector erase command */ -+ if ((ret = mvWriteEnable(pFlinfo)) != MV_OK) -+ return ret; -+ -+ if ((ret = mvSpiWriteThenWrite(cmd, MV_SFLASH_SE_CMND_LENGTH, NULL, 0)) != MV_OK) -+ return ret; -+ -+ if ((ret = mvWaitOnWipClear(pFlinfo)) != MV_OK) -+ return ret; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSFlashChipErase - Erasse the whole serial flash -+* -+* DESCRIPTION: -+* Issue the bulk (chip) erase command -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashChipErase (MV_SFLASH_INFO * pFlinfo) -+{ -+ MV_STATUS ret; -+ MV_U8 cmd[MV_SFLASH_BE_CMND_LENGTH]; -+ -+ -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ cmd[0] = sflash[pFlinfo->index].opcdBE; -+ -+ /* Issue the Write enable command prior the Bulk erase command */ -+ if ((ret = mvWriteEnable(pFlinfo)) != MV_OK) -+ return ret; -+ -+ if ((ret = mvSpiWriteThenWrite(cmd, MV_SFLASH_BE_CMND_LENGTH, NULL, 0)) != MV_OK) -+ return ret; -+ -+ if ((ret = mvWaitOnChipEraseDone(pFlinfo)) != MV_OK) -+ return ret; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSFlashBlockRd - Read from the serial flash -+* -+* DESCRIPTION: -+* Issue the read command and address then perfom the needed read -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* offset: byte offset with the flash to start reading from -+* pReadBuff: pointer to the buffer to read the data in -+* buffSize: size of the buffer to read. -+* -+* OUTPUT: -+* pReadBuff: pointer to the buffer containing the read data -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashBlockRd (MV_SFLASH_INFO * pFlinfo, MV_U32 offset, -+ MV_U8* pReadBuff, MV_U32 buffSize) -+{ -+ MV_U8 cmd[MV_SFLASH_READ_CMND_LENGTH]; -+ -+ -+ /* check for NULL pointer */ -+ if ((pFlinfo == NULL) || (pReadBuff == NULL)) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ cmd[0] = sflash[pFlinfo->index].opcdREAD; -+ cmd[1] = ((offset >> 16) & 0xFF); -+ cmd[2] = ((offset >> 8) & 0xFF); -+ cmd[3] = (offset & 0xFF); -+ -+ return mvSpiWriteThenRead(cmd, MV_SFLASH_READ_CMND_LENGTH, pReadBuff, buffSize, 0); -+} -+ -+/******************************************************************************* -+* mvSFlashFastBlockRd - Fast read from the serial flash -+* -+* DESCRIPTION: -+* Issue the fast read command and address then perfom the needed read -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* offset: byte offset with the flash to start reading from -+* pReadBuff: pointer to the buffer to read the data in -+* buffSize: size of the buffer to read. -+* -+* OUTPUT: -+* pReadBuff: pointer to the buffer containing the read data -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashFastBlockRd (MV_SFLASH_INFO * pFlinfo, MV_U32 offset, -+ MV_U8* pReadBuff, MV_U32 buffSize) -+{ -+ MV_U8 cmd[MV_SFLASH_READ_CMND_LENGTH]; -+ MV_STATUS ret; -+ -+ /* check for NULL pointer */ -+ if ((pFlinfo == NULL) || (pReadBuff == NULL)) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* Set the SPI frequency to the MAX allowed for fast-read operations */ -+ mvOsPrintf("Setting freq to %d.\n",sflash[pFlinfo->index].spiMaxFastFreq); -+ if ((ret = mvSpiBaudRateSet(sflash[pFlinfo->index].spiMaxFastFreq)) != MV_OK) -+ { -+ mvOsPrintf("%s ERROR: Failed to set the SPI fast frequency!\n", __FUNCTION__); -+ return ret; -+ } -+ -+ cmd[0] = sflash[pFlinfo->index].opcdFSTRD; -+ cmd[1] = ((offset >> 16) & 0xFF); -+ cmd[2] = ((offset >> 8) & 0xFF); -+ cmd[3] = (offset & 0xFF); -+ -+ -+ ret = mvSpiWriteThenRead(cmd, MV_SFLASH_READ_CMND_LENGTH, pReadBuff, buffSize, -+ sflash[pFlinfo->index].spiFastRdDummyBytes); -+ -+ /* Reset the SPI frequency to the MAX allowed for the device for best performance */ -+ if ((ret = mvSpiBaudRateSet(sflash[pFlinfo->index].spiMaxFreq)) != MV_OK) -+ { -+ mvOsPrintf("%s ERROR: Failed to set the SPI frequency!\n", __FUNCTION__); -+ return ret; -+ } -+ -+ return ret; -+} -+ -+ -+/******************************************************************************* -+* mvSFlashBlockWr - Write a buffer with any size -+* -+* DESCRIPTION: -+* write regardless of the page boundaries and size limit per Page -+* program command -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* offset: byte offset within the flash region -+* pWriteBuff: pointer to the buffer holding the data to program -+* buffSize: size of the buffer to write -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashBlockWr (MV_SFLASH_INFO * pFlinfo, MV_U32 offset, -+ MV_U8* pWriteBuff, MV_U32 buffSize) -+{ -+ MV_STATUS ret; -+ MV_U32 data2write = buffSize; -+ MV_U32 preAllOffset = (offset & MV_SFLASH_PAGE_ALLIGN_MASK(MV_M25P_PAGE_SIZE)); -+ MV_U32 preAllSz = (preAllOffset ? (MV_M25P_PAGE_SIZE - preAllOffset) : 0); -+ MV_U32 writeOffset = offset; -+ -+ /* check for NULL pointer */ -+#ifndef CONFIG_MARVELL -+ if(NULL == pWriteBuff) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+#endif -+ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* check that the buffer size does not exceed the flash size */ -+ if ((offset + buffSize) > mvSFlashSizeGet(pFlinfo)) -+ { -+ DB(mvOsPrintf("%s WARNING: Write exceeds flash size!\n", __FUNCTION__);) -+ return MV_OUT_OF_RANGE; -+ } -+ -+ /* check if the total block size is less than the first chunk remainder */ -+ if (data2write < preAllSz) -+ preAllSz = data2write; -+ -+ /* check if programing does not start at a 64byte alligned offset */ -+ if (preAllSz) -+ { -+ if ((ret = mvSFlashPageWr(pFlinfo, writeOffset, pWriteBuff, preAllSz)) != MV_OK) -+ return ret; -+ -+ /* increment pointers and counters */ -+ writeOffset += preAllSz; -+ data2write -= preAllSz; -+ pWriteBuff += preAllSz; -+ } -+ -+ /* program the data that fits in complete page chunks */ -+ while (data2write >= sflash[pFlinfo->index].pageSize) -+ { -+ if ((ret = mvSFlashPageWr(pFlinfo, writeOffset, pWriteBuff, sflash[pFlinfo->index].pageSize)) != MV_OK) -+ return ret; -+ -+ /* increment pointers and counters */ -+ writeOffset += sflash[pFlinfo->index].pageSize; -+ data2write -= sflash[pFlinfo->index].pageSize; -+ pWriteBuff += sflash[pFlinfo->index].pageSize; -+ } -+ -+ /* program the last partial chunk */ -+ if (data2write) -+ { -+ if ((ret = mvSFlashPageWr(pFlinfo, writeOffset, pWriteBuff, data2write)) != MV_OK) -+ return ret; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSFlashIdGet - Get the manufacturer and device IDs. -+* -+* DESCRIPTION: -+* Get the Manufacturer and device IDs from the serial flash through -+* writing the RDID command then reading 3 bytes of data. In case that -+* this command was called for the first time in order to detect the -+* manufacturer and device IDs, then the default RDID opcode will be used -+* unless the device index is indicated by the user (in case the SPI flash -+* does not use the default RDID opcode). -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* pManId: pointer to the 8bit variable to hold the manufacturing ID -+* pDevId: pointer to the 16bit variable to hold the device ID -+* -+* OUTPUT: -+* pManId: pointer to the 8bit variable holding the manufacturing ID -+* pDevId: pointer to the 16bit variable holding the device ID -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashIdGet (MV_SFLASH_INFO * pFlinfo, MV_U8* pManId, MV_U16* pDevId) -+{ -+ MV_STATUS ret; -+ MV_U8 cmd[MV_SFLASH_RDID_CMND_LENGTH]; -+ MV_U8 id[MV_SFLASH_RDID_REPLY_LENGTH]; -+ -+ -+ -+ /* check for NULL pointer */ -+ if ((pFlinfo == NULL) || (pManId == NULL) || (pDevId == NULL)) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ return mvSFlashWithDefaultsIdGet(pFlinfo, pManId, pDevId); -+ else -+ cmd[0] = sflash[pFlinfo->index].opcdRDID; -+ -+ if ((ret = mvSpiWriteThenRead(cmd, MV_SFLASH_RDID_CMND_LENGTH, id, MV_SFLASH_RDID_REPLY_LENGTH, 0)) != MV_OK) -+ return ret; -+ -+ *pManId = id[0]; -+ *pDevId = 0; -+ *pDevId |= (id[1] << 8); -+ *pDevId |= id[2]; -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSFlashWpRegionSet - Set the Write-Protected region -+* -+* DESCRIPTION: -+* Set the Write-Protected region -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* wpRegion: which region will be protected -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashWpRegionSet (MV_SFLASH_INFO * pFlinfo, MV_SFLASH_WP_REGION wpRegion) -+{ -+ MV_U8 wpMask; -+ -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check if the chip is an ST flash; then WP supports only 3 bits */ -+ if (pFlinfo->manufacturerId == MV_M25PXXX_ST_MANF_ID) -+ { -+ switch (wpRegion) -+ { -+ case MV_WP_NONE: -+ wpMask = MV_M25P_STATUS_BP_NONE; -+ break; -+ -+ case MV_WP_UPR_1OF128: -+ DB(mvOsPrintf("%s WARNING: Invaild option for this flash chip!\n", __FUNCTION__);) -+ return MV_NOT_SUPPORTED; -+ -+ case MV_WP_UPR_1OF64: -+ wpMask = MV_M25P_STATUS_BP_1_OF_64; -+ break; -+ -+ case MV_WP_UPR_1OF32: -+ wpMask = MV_M25P_STATUS_BP_1_OF_32; -+ break; -+ -+ case MV_WP_UPR_1OF16: -+ wpMask = MV_M25P_STATUS_BP_1_OF_16; -+ break; -+ -+ case MV_WP_UPR_1OF8: -+ wpMask = MV_M25P_STATUS_BP_1_OF_8; -+ break; -+ -+ case MV_WP_UPR_1OF4: -+ wpMask = MV_M25P_STATUS_BP_1_OF_4; -+ break; -+ -+ case MV_WP_UPR_1OF2: -+ wpMask = MV_M25P_STATUS_BP_1_OF_2; -+ break; -+ -+ case MV_WP_ALL: -+ wpMask = MV_M25P_STATUS_BP_ALL; -+ break; -+ -+ default: -+ DB(mvOsPrintf("%s WARNING: Invaild parameter WP region!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ } -+ /* check if the manufacturer is MXIC then the WP is 4bits */ -+ else if (pFlinfo->manufacturerId == MV_MXIC_MANF_ID) -+ { -+ switch (wpRegion) -+ { -+ case MV_WP_NONE: -+ wpMask = MV_MX25L_STATUS_BP_NONE; -+ break; -+ -+ case MV_WP_UPR_1OF128: -+ wpMask = MV_MX25L_STATUS_BP_1_OF_128; -+ break; -+ -+ case MV_WP_UPR_1OF64: -+ wpMask = MV_MX25L_STATUS_BP_1_OF_64; -+ break; -+ -+ case MV_WP_UPR_1OF32: -+ wpMask = MV_MX25L_STATUS_BP_1_OF_32; -+ break; -+ -+ case MV_WP_UPR_1OF16: -+ wpMask = MV_MX25L_STATUS_BP_1_OF_16; -+ break; -+ -+ case MV_WP_UPR_1OF8: -+ wpMask = MV_MX25L_STATUS_BP_1_OF_8; -+ break; -+ -+ case MV_WP_UPR_1OF4: -+ wpMask = MV_MX25L_STATUS_BP_1_OF_4; -+ break; -+ -+ case MV_WP_UPR_1OF2: -+ wpMask = MV_MX25L_STATUS_BP_1_OF_2; -+ break; -+ -+ case MV_WP_ALL: -+ wpMask = MV_MX25L_STATUS_BP_ALL; -+ break; -+ -+ default: -+ DB(mvOsPrintf("%s WARNING: Invaild parameter WP region!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ } -+ /* check if the manufacturer is SPANSION then the WP is 4bits */ -+ else if (pFlinfo->manufacturerId == MV_SPANSION_MANF_ID) -+ { -+ switch (wpRegion) -+ { -+ case MV_WP_NONE: -+ wpMask = MV_S25FL_STATUS_BP_NONE; -+ break; -+ -+ case MV_WP_UPR_1OF128: -+ DB(mvOsPrintf("%s WARNING: Invaild option for this flash chip!\n", __FUNCTION__);) -+ return MV_NOT_SUPPORTED; -+ -+ case MV_WP_UPR_1OF64: -+ wpMask = MV_S25FL_STATUS_BP_1_OF_64; -+ break; -+ -+ case MV_WP_UPR_1OF32: -+ wpMask = MV_S25FL_STATUS_BP_1_OF_32; -+ break; -+ -+ case MV_WP_UPR_1OF16: -+ wpMask = MV_S25FL_STATUS_BP_1_OF_16; -+ break; -+ -+ case MV_WP_UPR_1OF8: -+ wpMask = MV_S25FL_STATUS_BP_1_OF_8; -+ break; -+ -+ case MV_WP_UPR_1OF4: -+ wpMask = MV_S25FL_STATUS_BP_1_OF_4; -+ break; -+ -+ case MV_WP_UPR_1OF2: -+ wpMask = MV_S25FL_STATUS_BP_1_OF_2; -+ break; -+ -+ case MV_WP_ALL: -+ wpMask = MV_S25FL_STATUS_BP_ALL; -+ break; -+ -+ -+ default: -+ DB(mvOsPrintf("%s WARNING: Invaild parameter WP region!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ } -+ else -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter Manufacturer ID!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* Verify that the SRWD bit is always set - register is s/w locked */ -+ wpMask |= MV_SFLASH_STATUS_REG_SRWD_MASK; -+ -+ return mvStatusRegSet(pFlinfo, wpMask); -+} -+ -+/******************************************************************************* -+* mvSFlashWpRegionGet - Get the Write-Protected region configured -+* -+* DESCRIPTION: -+* Get from the chip the Write-Protected region configured -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* pWpRegion: pointer to the variable to return the WP region in -+* -+* OUTPUT: -+* wpRegion: pointer to the variable holding the WP region configured -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashWpRegionGet (MV_SFLASH_INFO * pFlinfo, MV_SFLASH_WP_REGION * pWpRegion) -+{ -+ MV_STATUS ret; -+ MV_U8 reg; -+ -+ /* check for NULL pointer */ -+ if ((pFlinfo == NULL) || (pWpRegion == NULL)) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ if ((ret = mvStatusRegGet(pFlinfo, ®)) != MV_OK) -+ return ret; -+ -+ /* Check if the chip is an ST flash; then WP supports only 3 bits */ -+ if (pFlinfo->manufacturerId == MV_M25PXXX_ST_MANF_ID) -+ { -+ switch ((reg & MV_M25P_STATUS_REG_WP_MASK)) -+ { -+ case MV_M25P_STATUS_BP_NONE: -+ *pWpRegion = MV_WP_NONE; -+ break; -+ -+ case MV_M25P_STATUS_BP_1_OF_64: -+ *pWpRegion = MV_WP_UPR_1OF64; -+ break; -+ -+ case MV_M25P_STATUS_BP_1_OF_32: -+ *pWpRegion = MV_WP_UPR_1OF32; -+ break; -+ -+ case MV_M25P_STATUS_BP_1_OF_16: -+ *pWpRegion = MV_WP_UPR_1OF16; -+ break; -+ -+ case MV_M25P_STATUS_BP_1_OF_8: -+ *pWpRegion = MV_WP_UPR_1OF8; -+ break; -+ -+ case MV_M25P_STATUS_BP_1_OF_4: -+ *pWpRegion = MV_WP_UPR_1OF4; -+ break; -+ -+ case MV_M25P_STATUS_BP_1_OF_2: -+ *pWpRegion = MV_WP_UPR_1OF2; -+ break; -+ -+ case MV_M25P_STATUS_BP_ALL: -+ *pWpRegion = MV_WP_ALL; -+ break; -+ -+ default: -+ DB(mvOsPrintf("%s WARNING: Unidentified WP region in h/w!\n", __FUNCTION__);) -+ return MV_BAD_VALUE; -+ } -+ } -+ /* check if the manufacturer is MXIC then the WP is 4bits */ -+ else if (pFlinfo->manufacturerId == MV_MXIC_MANF_ID) -+ { -+ switch ((reg & MV_MX25L_STATUS_REG_WP_MASK)) -+ { -+ case MV_MX25L_STATUS_BP_NONE: -+ *pWpRegion = MV_WP_NONE; -+ break; -+ -+ case MV_MX25L_STATUS_BP_1_OF_128: -+ *pWpRegion = MV_WP_UPR_1OF128; -+ break; -+ -+ case MV_MX25L_STATUS_BP_1_OF_64: -+ *pWpRegion = MV_WP_UPR_1OF64; -+ break; -+ -+ case MV_MX25L_STATUS_BP_1_OF_32: -+ *pWpRegion = MV_WP_UPR_1OF32; -+ break; -+ -+ case MV_MX25L_STATUS_BP_1_OF_16: -+ *pWpRegion = MV_WP_UPR_1OF16; -+ break; -+ -+ case MV_MX25L_STATUS_BP_1_OF_8: -+ *pWpRegion = MV_WP_UPR_1OF8; -+ break; -+ -+ case MV_MX25L_STATUS_BP_1_OF_4: -+ *pWpRegion = MV_WP_UPR_1OF4; -+ break; -+ -+ case MV_MX25L_STATUS_BP_1_OF_2: -+ *pWpRegion = MV_WP_UPR_1OF2; -+ break; -+ -+ case MV_MX25L_STATUS_BP_ALL: -+ *pWpRegion = MV_WP_ALL; -+ break; -+ -+ default: -+ DB(mvOsPrintf("%s WARNING: Unidentified WP region in h/w!\n", __FUNCTION__);) -+ return MV_BAD_VALUE; -+ } -+ } -+ /* Check if the chip is an SPANSION flash; then WP supports only 3 bits */ -+ else if (pFlinfo->manufacturerId == MV_SPANSION_MANF_ID) -+ { -+ switch ((reg & MV_S25FL_STATUS_REG_WP_MASK)) -+ { -+ case MV_S25FL_STATUS_BP_NONE: -+ *pWpRegion = MV_WP_NONE; -+ break; -+ -+ case MV_S25FL_STATUS_BP_1_OF_64: -+ *pWpRegion = MV_WP_UPR_1OF64; -+ break; -+ -+ case MV_S25FL_STATUS_BP_1_OF_32: -+ *pWpRegion = MV_WP_UPR_1OF32; -+ break; -+ -+ case MV_S25FL_STATUS_BP_1_OF_16: -+ *pWpRegion = MV_WP_UPR_1OF16; -+ break; -+ -+ case MV_S25FL_STATUS_BP_1_OF_8: -+ *pWpRegion = MV_WP_UPR_1OF8; -+ break; -+ -+ case MV_S25FL_STATUS_BP_1_OF_4: -+ *pWpRegion = MV_WP_UPR_1OF4; -+ break; -+ -+ case MV_S25FL_STATUS_BP_1_OF_2: -+ *pWpRegion = MV_WP_UPR_1OF2; -+ break; -+ -+ case MV_S25FL_STATUS_BP_ALL: -+ *pWpRegion = MV_WP_ALL; -+ break; -+ -+ default: -+ DB(mvOsPrintf("%s WARNING: Unidentified WP region in h/w!\n", __FUNCTION__);) -+ return MV_BAD_VALUE; -+ } -+ } -+ else -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter Manufacturer ID!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSFlashStatRegLock - Lock the status register for writing - W/Vpp -+* pin should be low to take effect -+* -+* DESCRIPTION: -+* Lock the access to the Status Register for writing. This will -+* cause the flash to enter the hardware protection mode if the W/Vpp -+* is low. If the W/Vpp is hi, the chip will be in soft protection mode, but -+* the register will continue to be writable if WREN sequence was used. -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* srLock: enable/disable (MV_TRUE/MV_FALSE) status registor lock mechanism -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashStatRegLock (MV_SFLASH_INFO * pFlinfo, MV_BOOL srLock) -+{ -+ MV_STATUS ret; -+ MV_U8 reg; -+ -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ if ((ret = mvStatusRegGet(pFlinfo, ®)) != MV_OK) -+ return ret; -+ -+ if (srLock) -+ reg |= MV_SFLASH_STATUS_REG_SRWD_MASK; -+ else -+ reg &= ~MV_SFLASH_STATUS_REG_SRWD_MASK; -+ -+ return mvStatusRegSet(pFlinfo, reg); -+} -+ -+/******************************************************************************* -+* mvSFlashSizeGet - Get the size of the SPI flash -+* -+* DESCRIPTION: -+* based on the sector number and size of each sector calculate the total -+* size of the flash memory. -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Size of the flash in bytes. -+* -+* -+*******************************************************************************/ -+MV_U32 mvSFlashSizeGet (MV_SFLASH_INFO * pFlinfo) -+{ -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return 0; -+ } -+ -+ return (pFlinfo->sectorSize * pFlinfo->sectorNumber); -+} -+ -+/******************************************************************************* -+* mvSFlashPowerSaveEnter - Cause the falsh device to go into power save mode -+* -+* DESCRIPTION: -+* Enter a special power save mode. -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Size of the flash in bytes. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashPowerSaveEnter(MV_SFLASH_INFO * pFlinfo) -+{ -+ MV_STATUS ret; -+ MV_U8 cmd[MV_SFLASH_DP_CMND_LENGTH]; -+ -+ -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return 0; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* check that power save mode is supported in the specific device */ -+ if (sflash[pFlinfo->index].opcdPwrSave == MV_SFLASH_NO_SPECIFIC_OPCD) -+ { -+ DB(mvOsPrintf("%s WARNING: Power save not supported for this device!\n", __FUNCTION__);) -+ return MV_NOT_SUPPORTED; -+ } -+ -+ cmd[0] = sflash[pFlinfo->index].opcdPwrSave; -+ -+ if ((ret = mvSpiWriteThenWrite(cmd, MV_SFLASH_DP_CMND_LENGTH, NULL, 0)) != MV_OK) -+ return ret; -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvSFlashPowerSaveExit - Cause the falsh device to exit the power save mode -+* -+* DESCRIPTION: -+* Exit the deep power save mode. -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Size of the flash in bytes. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSFlashPowerSaveExit (MV_SFLASH_INFO * pFlinfo) -+{ -+ MV_STATUS ret; -+ MV_U8 cmd[MV_SFLASH_RES_CMND_LENGTH]; -+ -+ -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return 0; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return MV_BAD_PARAM; -+ } -+ -+ /* check that power save mode is supported in the specific device */ -+ if (sflash[pFlinfo->index].opcdRES == MV_SFLASH_NO_SPECIFIC_OPCD) -+ { -+ DB(mvOsPrintf("%s WARNING: Read Electronic Signature not supported for this device!\n", __FUNCTION__);) -+ return MV_NOT_SUPPORTED; -+ } -+ -+ cmd[0] = sflash[pFlinfo->index].opcdRES; -+ -+ if ((ret = mvSpiWriteThenWrite(cmd, MV_SFLASH_RES_CMND_LENGTH, NULL, 0)) != MV_OK) -+ return ret; -+ -+ /* add the delay needed for the device to wake up */ -+ mvOsDelay(MV_MXIC_DP_EXIT_DELAY); /* 30 ms */ -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvSFlashModelGet - Retreive the string with the device manufacturer and model -+* -+* DESCRIPTION: -+* Retreive the string with the device manufacturer and model -+* -+* INPUT: -+* pFlinfo: pointer to the Flash information structure -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* pointer to the string indicating the device manufacturer and model -+* -+* -+*******************************************************************************/ -+const MV_8 * mvSFlashModelGet (MV_SFLASH_INFO * pFlinfo) -+{ -+ static const MV_8 * unknModel = (const MV_8 *)"Unknown"; -+ -+ /* check for NULL pointer */ -+ if (pFlinfo == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return 0; -+ } -+ -+ /* Protection - check if the model was detected */ -+ if (pFlinfo->index >= MV_ARRAY_SIZE(sflash)) -+ { -+ DB(mvOsPrintf("%s WARNING: Invaild parameter index!\n", __FUNCTION__);) -+ return unknModel; -+ } -+ -+ return sflash[pFlinfo->index].deviceModel; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.h b/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.h -new file mode 100644 -index 0000000..5bb160b ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlash.h -@@ -0,0 +1,166 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSFlashH -+#define __INCmvSFlashH -+ -+#include "mvTypes.h" -+ -+/* MCAROS */ -+#define MV_SFLASH_PAGE_ALLIGN_MASK(pgSz) (pgSz-1) -+#define MV_ARRAY_SIZE(a) ((sizeof(a)) / (sizeof(a[0]))) -+ -+/* Constants */ -+#define MV_INVALID_DEVICE_NUMBER 0xFFFFFFFF -+/* 10 MHz is the minimum possible SPI frequency when tclk is set 200MHz*/ -+#define MV_SFLASH_BASIC_SPI_FREQ 10000000 -+/* enumerations */ -+typedef enum -+{ -+ MV_WP_NONE, /* Unprotect the whole chip */ -+ MV_WP_UPR_1OF128, /* Write protect the upper 1/128 part */ -+ MV_WP_UPR_1OF64, /* Write protect the upper 1/64 part */ -+ MV_WP_UPR_1OF32, /* Write protect the upper 1/32 part */ -+ MV_WP_UPR_1OF16, /* Write protect the upper 1/16 part */ -+ MV_WP_UPR_1OF8, /* Write protect the upper 1/8 part */ -+ MV_WP_UPR_1OF4, /* Write protect the upper 1/4 part */ -+ MV_WP_UPR_1OF2, /* Write protect the upper 1/2 part */ -+ MV_WP_ALL /* Write protect the whole chip */ -+} MV_SFLASH_WP_REGION; -+ -+/* Type Definitions */ -+typedef struct -+{ -+ MV_U8 opcdWREN; /* Write enable opcode */ -+ MV_U8 opcdWRDI; /* Write disable opcode */ -+ MV_U8 opcdRDID; /* Read ID opcode */ -+ MV_U8 opcdRDSR; /* Read Status Register opcode */ -+ MV_U8 opcdWRSR; /* Write Status register opcode */ -+ MV_U8 opcdREAD; /* Read opcode */ -+ MV_U8 opcdFSTRD; /* Fast Read opcode */ -+ MV_U8 opcdPP; /* Page program opcode */ -+ MV_U8 opcdSE; /* Sector erase opcode */ -+ MV_U8 opcdBE; /* Bulk erase opcode */ -+ MV_U8 opcdRES; /* Read electronic signature */ -+ MV_U8 opcdPwrSave; /* Go into power save mode */ -+ MV_U32 sectorSize; /* Size of each sector */ -+ MV_U32 sectorNumber; /* Number of sectors */ -+ MV_U32 pageSize; /* size of each page */ -+ const char * deviceModel; /* string with the device model */ -+ MV_U32 manufacturerId; /* The manufacturer ID */ -+ MV_U32 deviceId; /* Device ID */ -+ MV_U32 spiMaxFreq; /* The MAX frequency that can be used with the device */ -+ MV_U32 spiMaxFastFreq; /* The MAX frequency that can be used with the device for fast reads */ -+ MV_U32 spiFastRdDummyBytes; /* Number of dumy bytes to read before real data when working in fast read mode. */ -+} MV_SFLASH_DEVICE_PARAMS; -+ -+typedef struct -+{ -+ MV_U32 baseAddr; /* Flash Base Address used in fast mode */ -+ MV_U8 manufacturerId; /* Manufacturer ID */ -+ MV_U16 deviceId; /* Device ID */ -+ MV_U32 sectorSize; /* Size of each sector - all the same */ -+ MV_U32 sectorNumber; /* Number of sectors */ -+ MV_U32 pageSize; /* Page size - affect allignment */ -+ MV_U32 index; /* index of the device in the sflash table (internal parameter) */ -+} MV_SFLASH_INFO; -+ -+/* Function Prototypes */ -+/* Init */ -+MV_STATUS mvSFlashInit (MV_SFLASH_INFO * pFlinfo); -+ -+/* erase */ -+MV_STATUS mvSFlashSectorErase (MV_SFLASH_INFO * pFlinfo, MV_U32 secNumber); -+MV_STATUS mvSFlashChipErase (MV_SFLASH_INFO * pFlinfo); -+ -+/* Read */ -+MV_STATUS mvSFlashBlockRd (MV_SFLASH_INFO * pFlinfo, MV_U32 offset, -+ MV_U8* pReadBuff, MV_U32 buffSize); -+MV_STATUS mvSFlashFastBlockRd (MV_SFLASH_INFO * pFlinfo, MV_U32 offset, -+ MV_U8* pReadBuff, MV_U32 buffSize); -+ -+/* write regardless of the page boundaries and size limit per Page program command */ -+MV_STATUS mvSFlashBlockWr (MV_SFLASH_INFO * pFlinfo, MV_U32 offset, -+ MV_U8* pWriteBuff, MV_U32 buffSize); -+/* Get IDs */ -+MV_STATUS mvSFlashIdGet (MV_SFLASH_INFO * pFlinfo, MV_U8* pManId, MV_U16* pDevId); -+ -+/* Set and Get the Write Protection region - if the Status register is not locked */ -+MV_STATUS mvSFlashWpRegionSet (MV_SFLASH_INFO * pFlinfo, MV_SFLASH_WP_REGION wpRegion); -+MV_STATUS mvSFlashWpRegionGet (MV_SFLASH_INFO * pFlinfo, MV_SFLASH_WP_REGION * pWpRegion); -+ -+/* Lock the status register for writing - W/Vpp pin should be low to take effect */ -+MV_STATUS mvSFlashStatRegLock (MV_SFLASH_INFO * pFlinfo, MV_BOOL srLock); -+ -+/* Get the regions sizes */ -+MV_U32 mvSFlashSizeGet (MV_SFLASH_INFO * pFlinfo); -+ -+/* Cause the falsh device to go into power save mode */ -+MV_STATUS mvSFlashPowerSaveEnter(MV_SFLASH_INFO * pFlinfo); -+MV_STATUS mvSFlashPowerSaveExit (MV_SFLASH_INFO * pFlinfo); -+ -+/* Retreive the string with the device manufacturer and model */ -+const MV_8 * mvSFlashModelGet (MV_SFLASH_INFO * pFlinfo); -+ -+#endif /* __INCmvSFlashH */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlashSpec.h b/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlashSpec.h -new file mode 100644 -index 0000000..cef4255 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/sflash/mvSFlashSpec.h -@@ -0,0 +1,233 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSFlashSpecH -+#define __INCmvSFlashSpecH -+ -+/* Constants */ -+#define MV_SFLASH_READ_CMND_LENGTH 4 /* 1B opcode + 3B address */ -+#define MV_SFLASH_SE_CMND_LENGTH 4 /* 1B opcode + 3B address */ -+#define MV_SFLASH_BE_CMND_LENGTH 1 /* 1B opcode */ -+#define MV_SFLASH_PP_CMND_LENGTH 4 /* 1B opcode + 3B address */ -+#define MV_SFLASH_WREN_CMND_LENGTH 1 /* 1B opcode */ -+#define MV_SFLASH_WRDI_CMND_LENGTH 1 /* 1B opcode */ -+#define MV_SFLASH_RDID_CMND_LENGTH 1 /* 1B opcode */ -+#define MV_SFLASH_RDID_REPLY_LENGTH 3 /* 1B manf ID and 2B device ID */ -+#define MV_SFLASH_RDSR_CMND_LENGTH 1 /* 1B opcode */ -+#define MV_SFLASH_RDSR_REPLY_LENGTH 1 /* 1B status */ -+#define MV_SFLASH_WRSR_CMND_LENGTH 2 /* 1B opcode + 1B status value */ -+#define MV_SFLASH_DP_CMND_LENGTH 1 /* 1B opcode */ -+#define MV_SFLASH_RES_CMND_LENGTH 1 /* 1B opcode */ -+ -+/* Status Register Bit Masks */ -+#define MV_SFLASH_STATUS_REG_WIP_OFFSET 0 /* bit 0; write in progress */ -+#define MV_SFLASH_STATUS_REG_WP_OFFSET 2 /* bit 2-4; write protect option */ -+#define MV_SFLASH_STATUS_REG_SRWD_OFFSET 7 /* bit 7; lock status register write */ -+#define MV_SFLASH_STATUS_REG_WIP_MASK (0x1 << MV_SFLASH_STATUS_REG_WIP_OFFSET) -+#define MV_SFLASH_STATUS_REG_SRWD_MASK (0x1 << MV_SFLASH_STATUS_REG_SRWD_OFFSET) -+ -+#define MV_SFLASH_MAX_WAIT_LOOP 1000000 -+#define MV_SFLASH_CHIP_ERASE_MAX_WAIT_LOOP 0x50000000 -+ -+#define MV_SFLASH_DEFAULT_RDID_OPCD 0x9F /* Default Read ID */ -+#define MV_SFLASH_DEFAULT_WREN_OPCD 0x06 /* Default Write Enable */ -+#define MV_SFLASH_NO_SPECIFIC_OPCD 0x00 -+ -+/********************************/ -+/* ST M25Pxxx Device Specific */ -+/********************************/ -+ -+/* Manufacturer IDs and Device IDs for SFLASHs supported by the driver */ -+#define MV_M25PXXX_ST_MANF_ID 0x20 -+#define MV_M25P32_DEVICE_ID 0x2016 -+#define MV_M25P32_MAX_SPI_FREQ 20000000 /* 20MHz */ -+#define MV_M25P32_MAX_FAST_SPI_FREQ 50000000 /* 50MHz */ -+#define MV_M25P32_FAST_READ_DUMMY_BYTES 1 -+#define MV_M25P64_DEVICE_ID 0x2017 -+#define MV_M25P64_MAX_SPI_FREQ 20000000 /* 20MHz */ -+#define MV_M25P64_MAX_FAST_SPI_FREQ 50000000 /* 50MHz */ -+#define MV_M25P64_FAST_READ_DUMMY_BYTES 1 -+#define MV_M25P128_DEVICE_ID 0x2018 -+#define MV_M25P128_MAX_SPI_FREQ 20000000 /* 20MHz */ -+#define MV_M25P128_MAX_FAST_SPI_FREQ 50000000 /* 50MHz */ -+#define MV_M25P128_FAST_READ_DUMMY_BYTES 1 -+ -+ -+/* Sector Sizes and population per device model*/ -+#define MV_M25P32_SECTOR_SIZE 0x10000 /* 64K */ -+#define MV_M25P64_SECTOR_SIZE 0x10000 /* 64K */ -+#define MV_M25P128_SECTOR_SIZE 0x40000 /* 256K */ -+#define MV_M25P32_SECTOR_NUMBER 64 -+#define MV_M25P64_SECTOR_NUMBER 128 -+#define MV_M25P128_SECTOR_NUMBER 64 -+#define MV_M25P_PAGE_SIZE 0x100 /* 256 byte */ -+ -+#define MV_M25P_WREN_CMND_OPCD 0x06 /* Write Enable */ -+#define MV_M25P_WRDI_CMND_OPCD 0x04 /* Write Disable */ -+#define MV_M25P_RDID_CMND_OPCD 0x9F /* Read ID */ -+#define MV_M25P_RDSR_CMND_OPCD 0x05 /* Read Status Register */ -+#define MV_M25P_WRSR_CMND_OPCD 0x01 /* Write Status Register */ -+#define MV_M25P_READ_CMND_OPCD 0x03 /* Sequential Read */ -+#define MV_M25P_FAST_RD_CMND_OPCD 0x0B /* Fast Read */ -+#define MV_M25P_PP_CMND_OPCD 0x02 /* Page Program */ -+#define MV_M25P_SE_CMND_OPCD 0xD8 /* Sector Erase */ -+#define MV_M25P_BE_CMND_OPCD 0xC7 /* Bulk Erase */ -+#define MV_M25P_RES_CMND_OPCD 0xAB /* Read Electronic Signature */ -+ -+/* Status Register Write Protect Bit Masks - 3bits */ -+#define MV_M25P_STATUS_REG_WP_MASK (0x07 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_M25P_STATUS_BP_NONE (0x00 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_M25P_STATUS_BP_1_OF_64 (0x01 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_M25P_STATUS_BP_1_OF_32 (0x02 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_M25P_STATUS_BP_1_OF_16 (0x03 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_M25P_STATUS_BP_1_OF_8 (0x04 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_M25P_STATUS_BP_1_OF_4 (0x05 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_M25P_STATUS_BP_1_OF_2 (0x06 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_M25P_STATUS_BP_ALL (0x07 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+ -+/************************************/ -+/* MXIC MX25L6405 Device Specific */ -+/************************************/ -+ -+/* Manufacturer IDs and Device IDs for SFLASHs supported by the driver */ -+#define MV_MXIC_MANF_ID 0xC2 -+#define MV_MX25L6405_DEVICE_ID 0x2017 -+#define MV_MX25L6405_MAX_SPI_FREQ 20000000 /* 20MHz */ -+#define MV_MX25L6405_MAX_FAST_SPI_FREQ 50000000 /* 50MHz */ -+#define MV_MX25L6405_FAST_READ_DUMMY_BYTES 1 -+#define MV_MXIC_DP_EXIT_DELAY 30 /* 30 ms */ -+ -+/* Sector Sizes and population per device model*/ -+#define MV_MX25L6405_SECTOR_SIZE 0x10000 /* 64K */ -+#define MV_MX25L6405_SECTOR_NUMBER 128 -+#define MV_MXIC_PAGE_SIZE 0x100 /* 256 byte */ -+ -+#define MV_MX25L_WREN_CMND_OPCD 0x06 /* Write Enable */ -+#define MV_MX25L_WRDI_CMND_OPCD 0x04 /* Write Disable */ -+#define MV_MX25L_RDID_CMND_OPCD 0x9F /* Read ID */ -+#define MV_MX25L_RDSR_CMND_OPCD 0x05 /* Read Status Register */ -+#define MV_MX25L_WRSR_CMND_OPCD 0x01 /* Write Status Register */ -+#define MV_MX25L_READ_CMND_OPCD 0x03 /* Sequential Read */ -+#define MV_MX25L_FAST_RD_CMND_OPCD 0x0B /* Fast Read */ -+#define MV_MX25L_PP_CMND_OPCD 0x02 /* Page Program */ -+#define MV_MX25L_SE_CMND_OPCD 0xD8 /* Sector Erase */ -+#define MV_MX25L_BE_CMND_OPCD 0xC7 /* Bulk Erase */ -+#define MV_MX25L_DP_CMND_OPCD 0xB9 /* Deep Power Down */ -+#define MV_MX25L_RES_CMND_OPCD 0xAB /* Read Electronic Signature */ -+ -+/* Status Register Write Protect Bit Masks - 4bits */ -+#define MV_MX25L_STATUS_REG_WP_MASK (0x0F << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_NONE (0x00 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_1_OF_128 (0x01 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_1_OF_64 (0x02 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_1_OF_32 (0x03 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_1_OF_16 (0x04 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_1_OF_8 (0x05 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_1_OF_4 (0x06 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_1_OF_2 (0x07 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_MX25L_STATUS_BP_ALL (0x0F << MV_SFLASH_STATUS_REG_WP_OFFSET) -+ -+/************************************/ -+/* SPANSION S25FL128P Device Specific */ -+/************************************/ -+ -+/* Manufacturer IDs and Device IDs for SFLASHs supported by the driver */ -+#define MV_SPANSION_MANF_ID 0x01 -+#define MV_S25FL128_DEVICE_ID 0x2018 -+#define MV_S25FL128_MAX_SPI_FREQ 33000000 /* 33MHz */ -+#define MV_S25FL128_MAX_FAST_SPI_FREQ 104000000 /* 104MHz */ -+#define MV_S25FL128_FAST_READ_DUMMY_BYTES 1 -+ -+/* Sector Sizes and population per device model*/ -+#define MV_S25FL128_SECTOR_SIZE 0x40000 /* 256K */ -+#define MV_S25FL128_SECTOR_NUMBER 64 -+#define MV_S25FL_PAGE_SIZE 0x100 /* 256 byte */ -+ -+#define MV_S25FL_WREN_CMND_OPCD 0x06 /* Write Enable */ -+#define MV_S25FL_WRDI_CMND_OPCD 0x04 /* Write Disable */ -+#define MV_S25FL_RDID_CMND_OPCD 0x9F /* Read ID */ -+#define MV_S25FL_RDSR_CMND_OPCD 0x05 /* Read Status Register */ -+#define MV_S25FL_WRSR_CMND_OPCD 0x01 /* Write Status Register */ -+#define MV_S25FL_READ_CMND_OPCD 0x03 /* Sequential Read */ -+#define MV_S25FL_FAST_RD_CMND_OPCD 0x0B /* Fast Read */ -+#define MV_S25FL_PP_CMND_OPCD 0x02 /* Page Program */ -+#define MV_S25FL_SE_CMND_OPCD 0xD8 /* Sector Erase */ -+#define MV_S25FL_BE_CMND_OPCD 0xC7 /* Bulk Erase */ -+#define MV_S25FL_DP_CMND_OPCD 0xB9 /* Deep Power Down */ -+#define MV_S25FL_RES_CMND_OPCD 0xAB /* Read Electronic Signature */ -+ -+/* Status Register Write Protect Bit Masks - 4bits */ -+#define MV_S25FL_STATUS_REG_WP_MASK (0x0F << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_NONE (0x00 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_1_OF_128 (0x01 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_1_OF_64 (0x02 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_1_OF_32 (0x03 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_1_OF_16 (0x04 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_1_OF_8 (0x05 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_1_OF_4 (0x06 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_1_OF_2 (0x07 << MV_SFLASH_STATUS_REG_WP_OFFSET) -+#define MV_S25FL_STATUS_BP_ALL (0x0F << MV_SFLASH_STATUS_REG_WP_OFFSET) -+ -+#endif /* __INCmvSFlashSpecH */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.c b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.c -new file mode 100644 -index 0000000..efdd6ae ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.c -@@ -0,0 +1,576 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "spi/mvSpi.h" -+#include "spi/mvSpiSpec.h" -+ -+#include "ctrlEnv/mvCtrlEnvLib.h" -+ -+/* #define MV_DEBUG */ -+#ifdef MV_DEBUG -+#define DB(x) x -+#define mvOsPrintf printf -+#else -+#define DB(x) -+#endif -+ -+ -+/******************************************************************************* -+* mvSpi16bitDataTxRx - Transmt and receive data -+* -+* DESCRIPTION: -+* Tx data and block waiting for data to be transmitted -+* -+********************************************************************************/ -+static MV_STATUS mvSpi16bitDataTxRx (MV_U16 txData, MV_U16 * pRxData) -+{ -+ MV_U32 i; -+ MV_BOOL ready = MV_FALSE; -+ -+ /* First clear the bit in the interrupt cause register */ -+ MV_REG_WRITE(MV_SPI_INT_CAUSE_REG, 0x0); -+ -+ /* Transmit data */ -+ MV_REG_WRITE(MV_SPI_DATA_OUT_REG, MV_16BIT_LE(txData)); -+ -+ /* wait with timeout for memory ready */ -+ for (i=0; i<MV_SPI_WAIT_RDY_MAX_LOOP; i++) -+ { -+ if (MV_REG_READ(MV_SPI_INT_CAUSE_REG)) -+ { -+ ready = MV_TRUE; -+ break; -+ } -+#ifdef MV_SPI_SLEEP_ON_WAIT -+ mvOsSleep(1); -+#endif /* MV_SPI_SLEEP_ON_WAIT */ -+ } -+ -+ if (!ready) -+ return MV_TIMEOUT; -+ -+ /* check that the RX data is needed */ -+ if (pRxData) -+ { -+ if ((MV_U32)pRxData & 0x1) /* check if address is not alligned to 16bit */ -+ { -+#if defined(MV_CPU_LE) -+ /* perform the data write to the buffer in two stages with 8bit each */ -+ MV_U8 * bptr = (MV_U8*)pRxData; -+ MV_U16 data = MV_16BIT_LE(MV_REG_READ(MV_SPI_DATA_IN_REG)); -+ *bptr = (data & 0xFF); -+ ++bptr; -+ *bptr = ((data >> 8) & 0xFF); -+ -+#elif defined(MV_CPU_BE) -+ -+ /* perform the data write to the buffer in two stages with 8bit each */ -+ MV_U8 * bptr = (MV_U8 *)pRxData; -+ MV_U16 data = MV_16BIT_LE(MV_REG_READ(MV_SPI_DATA_IN_REG)); -+ *bptr = ((data >> 8) & 0xFF); -+ ++bptr; -+ *bptr = (data & 0xFF); -+ -+#else -+ #error "CPU endianess isn't defined!\n" -+#endif -+ -+ } -+ else -+ *pRxData = MV_16BIT_LE(MV_REG_READ(MV_SPI_DATA_IN_REG)); -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvSpi8bitDataTxRx - Transmt and receive data (8bits) -+* -+* DESCRIPTION: -+* Tx data and block waiting for data to be transmitted -+* -+********************************************************************************/ -+static MV_STATUS mvSpi8bitDataTxRx (MV_U8 txData, MV_U8 * pRxData) -+{ -+ MV_U32 i; -+ MV_BOOL ready = MV_FALSE; -+ -+ /* First clear the bit in the interrupt cause register */ -+ MV_REG_WRITE(MV_SPI_INT_CAUSE_REG, 0x0); -+ -+ /* Transmit data */ -+ MV_REG_WRITE(MV_SPI_DATA_OUT_REG, txData); -+ -+ /* wait with timeout for memory ready */ -+ for (i=0; i<MV_SPI_WAIT_RDY_MAX_LOOP; i++) -+ { -+ if (MV_REG_READ(MV_SPI_INT_CAUSE_REG)) -+ { -+ ready = MV_TRUE; -+ break; -+ } -+#ifdef MV_SPI_SLEEP_ON_WAIT -+ mvOsSleep(1); -+#endif /* MV_SPI_SLEEP_ON_WAIT */ -+ } -+ -+ if (!ready) -+ return MV_TIMEOUT; -+ -+ /* check that the RX data is needed */ -+ if (pRxData) -+ *pRxData = MV_REG_READ(MV_SPI_DATA_IN_REG); -+ -+ return MV_OK; -+} -+ -+/* -+##################################################################################### -+##################################################################################### -+*/ -+ -+/******************************************************************************* -+* mvSpiInit - Initialize the SPI controller -+* -+* DESCRIPTION: -+* Perform the neccessary initialization in order to be able to send an -+* receive over the SPI interface. -+* -+* INPUT: -+* serialBaudRate: Baud rate (SPI clock frequency) -+* use16BitMode: Whether to use 2bytes (MV_TRUE) or 1bytes (MV_FALSE) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSpiInit (MV_U32 serialBaudRate) -+{ -+ MV_STATUS ret; -+ -+ /* Set the serial clock */ -+ if ((ret = mvSpiBaudRateSet(serialBaudRate)) != MV_OK) -+ return ret; -+ -+ /* For devices in which the SPI is muxed on the MPP with other interfaces*/ -+ mvMPPConfigToSPI(); -+ -+ /* Configure the default SPI mode to be 16bit */ -+ MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK); -+ -+ /* Fix ac timing on SPI in 6183, 6183L and 78x00 only */ -+ if ( (mvCtrlModelGet() == MV_6183_DEV_ID) || -+ (mvCtrlModelGet() == MV_6183L_DEV_ID) || -+ (mvCtrlModelGet() == MV_78100_DEV_ID) || -+ (mvCtrlModelGet() == MV_78200_DEV_ID) || -+ (mvCtrlModelGet() == MV_76100_DEV_ID)) -+ MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, BIT14); -+ -+ /* Verify that the CS is deasserted */ -+ mvSpiCsDeassert(); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSpiBaudRateSet - Set the Frequency of the SPI clock -+* -+* DESCRIPTION: -+* Set the Prescale bits to adapt to the requested baud rate (the clock -+* used for thr SPI). -+* -+* INPUT: -+* serialBaudRate: Baud rate (SPI clock frequency) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSpiBaudRateSet (MV_U32 serialBaudRate) -+{ -+ MV_U8 i; -+ /* MV_U8 preScale[32] = {1, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -+ 2, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30}; -+ */ -+ MV_U8 preScale[14] = { 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30}; -+ MV_U8 bestPrescaleIndx = 100; -+ MV_U32 minBaudOffset = 0xFFFFFFFF; -+ MV_U32 cpuClk = mvBoardTclkGet(); /*mvCpuPclkGet();*/ -+ MV_U32 tempReg; -+ -+ /* Find the best prescale configuration - less or equal */ -+ for (i=0; i<14; i++) -+ { -+ /* check for higher - irrelevent */ -+ if ((cpuClk / preScale[i]) > serialBaudRate) -+ continue; -+ -+ /* check for exact fit */ -+ if ((cpuClk / preScale[i]) == serialBaudRate) -+ { -+ bestPrescaleIndx = i; -+ break; -+ } -+ -+ /* check if this is better than the previous one */ -+ if ((serialBaudRate - (cpuClk / preScale[i])) < minBaudOffset) -+ { -+ minBaudOffset = (serialBaudRate - (cpuClk / preScale[i])); -+ bestPrescaleIndx = i; -+ } -+ } -+ -+ if (bestPrescaleIndx > 14) -+ { -+ mvOsPrintf("%s ERROR: SPI baud rate prescale error!\n", __FUNCTION__); -+ return MV_OUT_OF_RANGE; -+ } -+ -+ /* configure the Prescale */ -+ tempReg = MV_REG_READ(MV_SPI_IF_CONFIG_REG); -+ tempReg = ((tempReg & ~MV_SPI_CLK_PRESCALE_MASK) | (bestPrescaleIndx + 0x12)); -+ MV_REG_WRITE(MV_SPI_IF_CONFIG_REG, tempReg); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSpiCsAssert - Assert the Chip Select pin indicating a new transfer -+* -+* DESCRIPTION: -+* Assert The chip select - used to select an external SPI device -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Success or Error code. -+* -+********************************************************************************/ -+MV_VOID mvSpiCsAssert(MV_VOID) -+{ -+ /* For devices in which the SPI is muxed on the MPP with other interfaces*/ -+ mvMPPConfigToSPI(); -+ mvOsUDelay(1); -+ MV_REG_BIT_SET(MV_SPI_IF_CTRL_REG, MV_SPI_CS_ENABLE_MASK); -+} -+ -+/******************************************************************************* -+* mvSpiCsDeassert - DeAssert the Chip Select pin indicating the end of a -+* SPI transfer sequence -+* -+* DESCRIPTION: -+* DeAssert the chip select pin -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Success or Error code. -+* -+********************************************************************************/ -+MV_VOID mvSpiCsDeassert(MV_VOID) -+{ -+ MV_REG_BIT_RESET(MV_SPI_IF_CTRL_REG, MV_SPI_CS_ENABLE_MASK); -+ -+ /* For devices in which the SPI is muxed on the MPP with other interfaces*/ -+ mvMPPConfigToDefault(); -+} -+ -+/******************************************************************************* -+* mvSpiRead - Read a buffer over the SPI interface -+* -+* DESCRIPTION: -+* Receive (read) a buffer over the SPI interface in 16bit chunks. If the -+* buffer size is odd, then the last chunk will be 8bits. Chip select is not -+* handled at this level. -+* -+* INPUT: -+* pRxBuff: Pointer to the buffer to hold the received data -+* buffSize: length of the pRxBuff -+* -+* OUTPUT: -+* pRxBuff: Pointer to the buffer with the received data -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSpiRead (MV_U8* pRxBuff, MV_U32 buffSize) -+{ -+ MV_STATUS ret; -+ MV_U32 bytesLeft = buffSize; -+ MV_U16* rxPtr = (MV_U16*)pRxBuff; -+ -+ /* check for null parameters */ -+ if (pRxBuff == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check that the buffer pointer and the buffer size are 16bit aligned */ -+ if ((((MV_U32)buffSize & 1) == 0) && (((MV_U32)pRxBuff & 1) == 0)) -+ { -+ /* Verify that the SPI mode is in 16bit mode */ -+ MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK); -+ -+ /* TX/RX as long we have complete 16bit chunks */ -+ while (bytesLeft >= MV_SPI_16_BIT_CHUNK_SIZE) -+ { -+ /* Transmitted and wait for the transfer to be completed */ -+ if ((ret = mvSpi16bitDataTxRx(MV_SPI_DUMMY_WRITE_16BITS, rxPtr)) != MV_OK) -+ return ret; -+ -+ /* increment the pointers */ -+ rxPtr++; -+ bytesLeft -= MV_SPI_16_BIT_CHUNK_SIZE; -+ } -+ -+ } -+ else -+ { -+ /* Verify that the SPI mode is in 8bit mode */ -+ MV_REG_BIT_RESET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK); -+ -+ /* TX/RX in 8bit chanks */ -+ while (bytesLeft > 0) -+ { -+ /* Transmitted and wait for the transfer to be completed */ -+ if ((ret = mvSpi8bitDataTxRx(MV_SPI_DUMMY_WRITE_8BITS, pRxBuff)) != MV_OK) -+ return ret; -+ /* increment the pointers */ -+ pRxBuff++; -+ bytesLeft--; -+ } -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvSpiWrite - Transmit a buffer over the SPI interface -+* -+* DESCRIPTION: -+* Transmit a buffer over the SPI interface in 16bit chunks. If the -+* buffer size is odd, then the last chunk will be 8bits. No chip select -+* action is taken. -+* -+* INPUT: -+* pTxBuff: Pointer to the buffer holding the TX data -+* buffSize: length of the pTxBuff -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSpiWrite(MV_U8* pTxBuff, MV_U32 buffSize) -+{ -+ MV_STATUS ret; -+ MV_U32 bytesLeft = buffSize; -+ MV_U16* txPtr = (MV_U16*)pTxBuff; -+ -+ /* check for null parameters */ -+ if (pTxBuff == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check that the buffer pointer and the buffer size are 16bit aligned */ -+ if ((((MV_U32)buffSize & 1) == 0) && (((MV_U32)pTxBuff & 1) == 0)) -+ { -+ /* Verify that the SPI mode is in 16bit mode */ -+ MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK); -+ -+ /* TX/RX as long we have complete 16bit chunks */ -+ while (bytesLeft >= MV_SPI_16_BIT_CHUNK_SIZE) -+ { -+ /* Transmitted and wait for the transfer to be completed */ -+ if ((ret = mvSpi16bitDataTxRx(*txPtr, NULL)) != MV_OK) -+ return ret; -+ -+ /* increment the pointers */ -+ txPtr++; -+ bytesLeft -= MV_SPI_16_BIT_CHUNK_SIZE; -+ } -+ } -+ else -+ { -+ -+ /* Verify that the SPI mode is in 8bit mode */ -+ MV_REG_BIT_RESET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK); -+ -+ /* TX/RX in 8bit chanks */ -+ while (bytesLeft > 0) -+ { -+ /* Transmitted and wait for the transfer to be completed */ -+ if ((ret = mvSpi8bitDataTxRx(*pTxBuff, NULL)) != MV_OK) -+ return ret; -+ -+ /* increment the pointers */ -+ pTxBuff++; -+ bytesLeft--; -+ } -+ } -+ -+ return MV_OK; -+} -+ -+ -+/******************************************************************************* -+* mvSpiReadWrite - Read and Write a buffer simultanuosely -+* -+* DESCRIPTION: -+* Transmit and receive a buffer over the SPI in 16bit chunks. If the -+* buffer size is odd, then the last chunk will be 8bits. The SPI chip -+* select is not handled implicitely. -+* -+* INPUT: -+* pRxBuff: Pointer to the buffer to write the RX info in -+* pTxBuff: Pointer to the buffer holding the TX info -+* buffSize: length of both the pTxBuff and pRxBuff -+* -+* OUTPUT: -+* pRxBuff: Pointer of the buffer holding the RX data -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSpiReadWrite(MV_U8* pRxBuff, MV_U8* pTxBuff, MV_U32 buffSize) -+{ -+ MV_STATUS ret; -+ MV_U32 bytesLeft = buffSize; -+ MV_U16* txPtr = (MV_U16*)pTxBuff; -+ MV_U16* rxPtr = (MV_U16*)pRxBuff; -+ -+ /* check for null parameters */ -+ if ((pRxBuff == NULL) || (pTxBuff == NULL)) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* Check that the buffer pointer and the buffer size are 16bit aligned */ -+ if ((((MV_U32)buffSize & 1) == 0) && (((MV_U32)pTxBuff & 1) == 0) && (((MV_U32)pRxBuff & 1) == 0)) -+ { -+ /* Verify that the SPI mode is in 16bit mode */ -+ MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK); -+ -+ /* TX/RX as long we have complete 16bit chunks */ -+ while (bytesLeft >= MV_SPI_16_BIT_CHUNK_SIZE) -+ { -+ /* Transmitted and wait for the transfer to be completed */ -+ if ((ret = mvSpi16bitDataTxRx(*txPtr, rxPtr)) != MV_OK) -+ return ret; -+ -+ /* increment the pointers */ -+ txPtr++; -+ rxPtr++; -+ bytesLeft -= MV_SPI_16_BIT_CHUNK_SIZE; -+ } -+ } -+ else -+ { -+ /* Verify that the SPI mode is in 8bit mode */ -+ MV_REG_BIT_RESET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK); -+ -+ /* TX/RX in 8bit chanks */ -+ while (bytesLeft > 0) -+ { -+ /* Transmitted and wait for the transfer to be completed */ -+ if ( (ret = mvSpi8bitDataTxRx(*pTxBuff, pRxBuff) ) != MV_OK) -+ return ret; -+ pRxBuff++; -+ pTxBuff++; -+ bytesLeft--; -+ } -+ } -+ -+ return MV_OK; -+} -+ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.h b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.h -new file mode 100644 -index 0000000..c3db297 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpi.h -@@ -0,0 +1,94 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSpihH -+#define __INCmvSpihH -+ -+#include "mvCommon.h" -+#include "mvOs.h" -+#include "ctrlEnv/mvCtrlEnvSpec.h" -+ -+/* Function Prototypes */ -+/* Init */ -+MV_STATUS mvSpiInit (MV_U32 serialBaudRate); -+ -+/* Set the Frequency of the Spi clock */ -+MV_STATUS mvSpiBaudRateSet(MV_U32 serialBaudRate); -+ -+/* Assert the SPI chip select */ -+MV_VOID mvSpiCsAssert (MV_VOID); -+ -+/* De-assert the SPI chip select */ -+MV_VOID mvSpiCsDeassert (MV_VOID); -+ -+/* Simultanuous Read and write */ -+MV_STATUS mvSpiReadWrite (MV_U8* pRxBuff, MV_U8* pTxBuff, MV_U32 buffSize); -+ -+/* serialize a buffer on the TX line - Rx is ignored */ -+MV_STATUS mvSpiWrite (MV_U8* pTxBuff, MV_U32 buffSize); -+ -+/* read from the RX line by writing dummy values to the TX line */ -+MV_STATUS mvSpiRead (MV_U8* pRxBuff, MV_U32 buffSize); -+ -+#endif /* __INCmvSpihH */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.c b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.c -new file mode 100644 -index 0000000..a5d5a64 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.c -@@ -0,0 +1,249 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#include "spi/mvSpi.h" -+#include "spi/mvSpiSpec.h" -+ -+/*#define MV_DEBUG*/ -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+ -+/******************************************************************************* -+* mvSpiReadAndWrite - Read and Write a buffer simultanuousely -+* -+* DESCRIPTION: -+* Transmit and receive a buffer over the SPI in 16bit chunks. If the -+* buffer size is odd, then the last chunk will be 8bits. -+* -+* INPUT: -+* pRxBuff: Pointer to the buffer to write the RX info in -+* pTxBuff: Pointer to the buffer holding the TX info -+* buffSize: length of both the pTxBuff and pRxBuff -+* -+* OUTPUT: -+* pRxBuff: Pointer of the buffer holding the RX data -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSpiReadAndWrite(MV_U8* pRxBuff, MV_U8* pTxBuff, MV_U32 buffSize) -+{ -+ MV_STATUS ret; -+ -+ /* check for null parameters */ -+ if ((pRxBuff == NULL) || (pTxBuff == NULL) || (buffSize == 0)) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* First assert the chip select */ -+ mvSpiCsAssert(); -+ -+ ret = mvSpiReadWrite(pRxBuff, pTxBuff, buffSize); -+ -+ /* Finally deassert the chip select */ -+ mvSpiCsDeassert(); -+ -+ return ret; -+} -+ -+/******************************************************************************* -+* mvSpiWriteThenWrite - Serialize a command followed by the data over the TX line -+* -+* DESCRIPTION: -+* Assert the chip select line. Transmit the command buffer followed by -+* the data buffer. Then deassert the CS line. -+* -+* INPUT: -+* pCmndBuff: Pointer to the command buffer to transmit -+* cmndSize: length of the command size -+* pTxDataBuff: Pointer to the data buffer to transmit -+* txDataSize: length of the data buffer -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSpiWriteThenWrite (MV_U8* pCmndBuff, MV_U32 cmndSize, MV_U8* pTxDataBuff, -+ MV_U32 txDataSize) -+{ -+ MV_STATUS ret = MV_OK, tempRet; -+ -+ /* check for null parameters */ -+#ifndef CONFIG_MARVELL -+ if(NULL == pTxDataBuff) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+#endif -+ -+ if (pCmndBuff == NULL) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* First assert the chip select */ -+ mvSpiCsAssert(); -+ -+ /* first write the command */ -+ if ((cmndSize) && (pCmndBuff != NULL)) -+ { -+ if ((tempRet = mvSpiWrite(pCmndBuff, cmndSize)) != MV_OK) -+ ret = tempRet; -+ } -+ -+ /* Then write the data buffer */ -+#ifndef CONFIG_MARVELL -+ if (txDataSize) -+#else -+ if ((txDataSize) && (pTxDataBuff != NULL)) -+#endif -+ { -+ if ((tempRet = mvSpiWrite(pTxDataBuff, txDataSize)) != MV_OK) -+ ret = tempRet; -+ } -+ -+ /* Finally deassert the chip select */ -+ mvSpiCsDeassert(); -+ -+ return ret; -+} -+ -+/******************************************************************************* -+* mvSpiWriteThenRead - Serialize a command then read a data buffer -+* -+* DESCRIPTION: -+* Assert the chip select line. Transmit the command buffer then read -+* the data buffer. Then deassert the CS line. -+* -+* INPUT: -+* pCmndBuff: Pointer to the command buffer to transmit -+* cmndSize: length of the command size -+* pRxDataBuff: Pointer to the buffer to read the data in -+* txDataSize: length of the data buffer -+* -+* OUTPUT: -+* pRxDataBuff: Pointer to the buffer holding the data -+* -+* RETURN: -+* Success or Error code. -+* -+* -+*******************************************************************************/ -+MV_STATUS mvSpiWriteThenRead (MV_U8* pCmndBuff, MV_U32 cmndSize, MV_U8* pRxDataBuff, -+ MV_U32 rxDataSize,MV_U32 dummyBytesToRead) -+{ -+ MV_STATUS ret = MV_OK, tempRet; -+ MV_U8 dummyByte; -+ -+ /* check for null parameters */ -+ if ((pCmndBuff == NULL) && (pRxDataBuff == NULL)) -+ { -+ mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__); -+ return MV_BAD_PARAM; -+ } -+ -+ /* First assert the chip select */ -+ mvSpiCsAssert(); -+ -+ /* first write the command */ -+ if ((cmndSize) && (pCmndBuff != NULL)) -+ { -+ if ((tempRet = mvSpiWrite(pCmndBuff, cmndSize)) != MV_OK) -+ ret = tempRet; -+ } -+ -+ /* Read dummy bytes before real data. */ -+ while(dummyBytesToRead) -+ { -+ mvSpiRead(&dummyByte,1); -+ dummyBytesToRead--; -+ } -+ -+ /* Then write the data buffer */ -+ if ((rxDataSize) && (pRxDataBuff != NULL)) -+ { -+ if ((tempRet = mvSpiRead(pRxDataBuff, rxDataSize)) != MV_OK) -+ ret = tempRet; -+ } -+ -+ /* Finally deassert the chip select */ -+ mvSpiCsDeassert(); -+ -+ return ret; -+} -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.h b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.h -new file mode 100644 -index 0000000..329e26b ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiCmnd.h -@@ -0,0 +1,82 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSpiCmndhH -+#define __INCmvSpiCmndhH -+ -+#include "mvTypes.h" -+ -+/* Function Prototypes */ -+ -+/* Simultanuous Read and write */ -+MV_STATUS mvSpiReadAndWrite (MV_U8* pRxBuff, MV_U8* pTxBuff, MV_U32 buffSize); -+ -+/* write command - write a command and then write data */ -+MV_STATUS mvSpiWriteThenWrite (MV_U8* pCmndBuff, MV_U32 cmndSize, MV_U8* pTxDataBuff, MV_U32 txDataSize); -+ -+/* read command - write a command and then read data by writing dummy data */ -+MV_STATUS mvSpiWriteThenRead (MV_U8* pCmndBuff, MV_U32 cmndSize, MV_U8* pRxDataBuff, -+ MV_U32 rxDataSize,MV_U32 dummyBytesToRead); -+ -+#endif /* __INCmvSpiCmndhH */ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiSpec.h b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiSpec.h -new file mode 100644 -index 0000000..e943787 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/spi/mvSpiSpec.h -@@ -0,0 +1,98 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+#ifndef __INCmvSpiSpecH -+#define __INCmvSpiSpecH -+ -+/* Constants */ -+#define MV_SPI_WAIT_RDY_MAX_LOOP 100000 -+#define MV_SPI_16_BIT_CHUNK_SIZE 2 -+#define MV_SPI_DUMMY_WRITE_16BITS 0xFFFF -+#define MV_SPI_DUMMY_WRITE_8BITS 0xFF -+ -+/* Marvell Flash Device Controller Registers */ -+#define MV_SPI_CTRLR_OFST 0x10600 -+#define MV_SPI_IF_CTRL_REG (MV_SPI_CTRLR_OFST + 0x00) -+#define MV_SPI_IF_CONFIG_REG (MV_SPI_CTRLR_OFST + 0x04) -+#define MV_SPI_DATA_OUT_REG (MV_SPI_CTRLR_OFST + 0x08) -+#define MV_SPI_DATA_IN_REG (MV_SPI_CTRLR_OFST + 0x0c) -+#define MV_SPI_INT_CAUSE_REG (MV_SPI_CTRLR_OFST + 0x10) -+#define MV_SPI_INT_CAUSE_MASK_REG (MV_SPI_CTRLR_OFST + 0x14) -+ -+/* Serial Memory Interface Control Register Masks */ -+#define MV_SPI_CS_ENABLE_OFFSET 0 /* bit 0 */ -+#define MV_SPI_MEMORY_READY_OFFSET 1 /* bit 1 */ -+#define MV_SPI_CS_ENABLE_MASK (0x1 << MV_SPI_CS_ENABLE_OFFSET) -+#define MV_SPI_MEMORY_READY_MASK (0x1 << MV_SPI_MEMORY_READY_OFFSET) -+ -+/* Serial Memory Interface Configuration Register Masks */ -+#define MV_SPI_CLK_PRESCALE_OFFSET 0 /* bit 0-4 */ -+#define MV_SPI_BYTE_LENGTH_OFFSET 5 /* bit 5 */ -+#define MV_SPI_ADDRESS_BURST_LENGTH_OFFSET 8 /* bit 8-9 */ -+#define MV_SPI_CLK_PRESCALE_MASK (0x1F << MV_SPI_CLK_PRESCALE_OFFSET) -+#define MV_SPI_BYTE_LENGTH_MASK (0x1 << MV_SPI_BYTE_LENGTH_OFFSET) -+#define MV_SPI_ADDRESS_BURST_LENGTH_MASK (0x3 << MV_SPI_ADDRESS_BURST_LENGTH_OFFSET) -+ -+#endif /* __INCmvSpiSpecH */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.c b/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.c -new file mode 100644 -index 0000000..12d27b3 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.c -@@ -0,0 +1,1023 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+ -+ -+#include "mvTwsi.h" -+#include "mvTwsiSpec.h" -+#include "cpu/mvCpu.h" -+ -+ -+/*#define MV_DEBUG*/ -+#ifdef MV_DEBUG -+#define DB(x) x -+#else -+#define DB(x) -+#endif -+ -+static MV_VOID twsiIntFlgClr(MV_U8 chanNum); -+static MV_BOOL twsiMainIntGet(MV_U8 chanNum); -+static MV_VOID twsiAckBitSet(MV_U8 chanNum); -+static MV_U32 twsiStsGet(MV_U8 chanNum); -+static MV_VOID twsiReset(MV_U8 chanNum); -+static MV_STATUS twsiAddr7BitSet(MV_U8 chanNum, MV_U32 deviceAddress,MV_TWSI_CMD command); -+static MV_STATUS twsiAddr10BitSet(MV_U8 chanNum, MV_U32 deviceAddress,MV_TWSI_CMD command); -+static MV_STATUS twsiDataTransmit(MV_U8 chanNum, MV_U8 *pBlock, MV_U32 blockSize); -+static MV_STATUS twsiDataReceive(MV_U8 chanNum, MV_U8 *pBlock, MV_U32 blockSize); -+static MV_STATUS twsiTargetOffsSet(MV_U8 chanNum, MV_U32 offset,MV_BOOL moreThen256); -+ -+ -+static MV_BOOL twsiTimeoutChk(MV_U32 timeout, const MV_8 *pString) -+{ -+ if(timeout >= TWSI_TIMEOUT_VALUE) -+ { -+ DB(mvOsPrintf("%s",pString)); -+ return MV_TRUE; -+ } -+ return MV_FALSE; -+ -+} -+/******************************************************************************* -+* mvTwsiStartBitSet - Set start bit on the bus -+* -+* DESCRIPTION: -+* This routine sets the start bit on the TWSI bus. -+* The routine first checks for interrupt flag condition, then it sets -+* the start bit in the TWSI Control register. -+* If the interrupt flag condition check previously was set, the function -+* will clear it. -+* The function then wait for the start bit to be cleared by the HW. -+* Then it waits for the interrupt flag to be set and eventually, the -+* TWSI status is checked to be 0x8 or 0x10(repeated start bit). -+* -+* INPUT: -+* chanNum - TWSI channel. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK is start bit was set successfuly on the bus. -+* MV_FAIL if interrupt flag was set before setting start bit. -+* -+*******************************************************************************/ -+MV_STATUS mvTwsiStartBitSet(MV_U8 chanNum) -+{ -+ MV_BOOL isIntFlag = MV_FALSE; -+ MV_U32 timeout, temp; -+ -+ DB(mvOsPrintf("TWSI: mvTwsiStartBitSet \n")); -+ /* check Int flag */ -+ if(twsiMainIntGet(chanNum)) -+ isIntFlag = MV_TRUE; -+ /* set start Bit */ -+ temp = MV_REG_READ(TWSI_CONTROL_REG(chanNum)); -+ MV_REG_WRITE(TWSI_CONTROL_REG(chanNum), temp | TWSI_CONTROL_START_BIT); -+ -+ /* in case that the int flag was set before i.e. repeated start bit */ -+ if(isIntFlag){ -+ DB(mvOsPrintf("TWSI: mvTwsiStartBitSet repeated start Bit\n")); -+ twsiIntFlgClr(chanNum); -+ } -+ -+ /* wait for interrupt */ -+ timeout = 0; -+ while(!twsiMainIntGet(chanNum) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: mvTwsiStartBitSet ERROR - Start Clear bit TimeOut .\n")) -+ return MV_TIMEOUT; -+ -+ -+ /* check that start bit went down */ -+ if((MV_REG_READ(TWSI_CONTROL_REG(chanNum)) & TWSI_CONTROL_START_BIT) != 0) -+ { -+ mvOsPrintf("TWSI: mvTwsiStartBitSet ERROR - start bit didn't went down\n"); -+ return MV_FAIL; -+ } -+ -+ /* check the status */ -+ temp = twsiStsGet(chanNum); -+ if(( temp != TWSI_START_CON_TRA ) && ( temp != TWSI_REPEATED_START_CON_TRA )) -+ { -+ mvOsPrintf("TWSI: mvTwsiStartBitSet ERROR - status %x after Set Start Bit. \n",temp); -+ return MV_FAIL; -+ } -+ -+ return MV_OK; -+ -+} -+ -+/******************************************************************************* -+* mvTwsiStopBitSet - Set stop bit on the bus -+* -+* DESCRIPTION: -+* This routine set the stop bit on the TWSI bus. -+* The function then wait for the stop bit to be cleared by the HW. -+* Finally the function checks for status of 0xF8. -+* -+* INPUT: -+* chanNum - TWSI channel -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE is stop bit was set successfuly on the bus. -+* -+*******************************************************************************/ -+MV_STATUS mvTwsiStopBitSet(MV_U8 chanNum) -+{ -+ MV_U32 timeout, temp; -+ -+ /* Generate stop bit */ -+ temp = MV_REG_READ(TWSI_CONTROL_REG(chanNum)); -+ MV_REG_WRITE(TWSI_CONTROL_REG(chanNum), temp | TWSI_CONTROL_STOP_BIT); -+ -+ twsiIntFlgClr(chanNum); -+ -+ /* wait for stop bit to come down */ -+ timeout = 0; -+ while( ((MV_REG_READ(TWSI_CONTROL_REG(chanNum)) & TWSI_CONTROL_STOP_BIT) != 0) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: mvTwsiStopBitSet ERROR - Stop bit TimeOut .\n")) -+ return MV_TIMEOUT; -+ -+ /* check that the stop bit went down */ -+ if((MV_REG_READ(TWSI_CONTROL_REG(chanNum)) & TWSI_CONTROL_STOP_BIT) != 0) -+ { -+ mvOsPrintf("TWSI: mvTwsiStopBitSet ERROR - stop bit didn't went down. \n"); -+ return MV_FAIL; -+ } -+ -+ /* check the status */ -+ temp = twsiStsGet(chanNum); -+ if( temp != TWSI_NO_REL_STS_INT_FLAG_IS_KEPT_0){ -+ mvOsPrintf("TWSI: mvTwsiStopBitSet ERROR - status %x after Stop Bit. \n", temp); -+ return MV_FAIL; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* twsiMainIntGet - Get twsi bit from main Interrupt cause. -+* -+* DESCRIPTION: -+* This routine returns the twsi interrupt flag value. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_TRUE is interrupt flag is set, MV_FALSE otherwise. -+* -+*******************************************************************************/ -+static MV_BOOL twsiMainIntGet(MV_U8 chanNum) -+{ -+ MV_U32 temp; -+ -+ /* get the int flag bit */ -+ -+ temp = MV_REG_READ(TWSI_CPU_MAIN_INT_CAUSE_REG); -+ if (temp & (TWSI0_CPU_MAIN_INT_BIT << chanNum)) -+ return MV_TRUE; -+ -+ return MV_FALSE; -+} -+/******************************************************************************* -+* twsiIntFlgClr - Clear Interrupt flag. -+* -+* DESCRIPTION: -+* This routine clears the interrupt flag. It does NOT poll the interrupt -+* to make sure the clear. After clearing the interrupt, it waits for at -+* least 1 miliseconds. -+* -+* INPUT: -+* chanNum - TWSI channel -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+static MV_VOID twsiIntFlgClr(MV_U8 chanNum) -+{ -+ MV_U32 temp; -+ -+ /* wait for 1 mili to prevent TWSI register write after write problems */ -+ mvOsDelay(1); -+ /* clear the int flag bit */ -+ temp = MV_REG_READ(TWSI_CONTROL_REG(chanNum)); -+ MV_REG_WRITE(TWSI_CONTROL_REG(chanNum),temp & ~(TWSI_CONTROL_INT_FLAG_SET)); -+ -+ /* wait for 1 mili sec for the clear to take effect */ -+ mvOsDelay(1); -+ -+ return; -+} -+ -+ -+/******************************************************************************* -+* twsiAckBitSet - Set acknowledge bit on the bus -+* -+* DESCRIPTION: -+* This routine set the acknowledge bit on the TWSI bus. -+* -+* INPUT: -+* None. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None. -+* -+*******************************************************************************/ -+static MV_VOID twsiAckBitSet(MV_U8 chanNum) -+{ -+ MV_U32 temp; -+ -+ /*Set the Ack bit */ -+ temp = MV_REG_READ(TWSI_CONTROL_REG(chanNum)); -+ MV_REG_WRITE(TWSI_CONTROL_REG(chanNum), temp | TWSI_CONTROL_ACK); -+ -+ /* Add delay of 1ms */ -+ mvOsDelay(1); -+ return; -+} -+ -+ -+/******************************************************************************* -+* twsiInit - Initialize TWSI interface -+* -+* DESCRIPTION: -+* This routine: -+* -Reset the TWSI. -+* -Initialize the TWSI clock baud rate according to given frequancy -+* parameter based on Tclk frequancy and enables TWSI slave. -+* -Set the ack bit. -+* -Assign the TWSI slave address according to the TWSI address Type. -+* -+* -+* INPUT: -+* chanNum - TWSI channel -+* frequancy - TWSI frequancy in KHz. (up to 100KHZ) -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* Actual frequancy. -+* -+*******************************************************************************/ -+MV_U32 mvTwsiInit(MV_U8 chanNum, MV_HZ frequancy, MV_U32 Tclk, MV_TWSI_ADDR *pTwsiAddr, MV_BOOL generalCallEnable) -+{ -+ MV_U32 n,m,freq,margin,minMargin = 0xffffffff; -+ MV_U32 power; -+ MV_U32 actualFreq = 0,actualN = 0,actualM = 0,val; -+ -+ if(frequancy > 100000) -+ { -+ mvOsPrintf("Warning TWSI frequancy is too high, please use up tp 100Khz. \n"); -+ } -+ -+ DB(mvOsPrintf("TWSI: mvTwsiInit - Tclk = %d freq = %d\n",Tclk,frequancy)); -+ /* Calucalte N and M for the TWSI clock baud rate */ -+ for(n = 0 ; n < 8 ; n++) -+ { -+ for(m = 0 ; m < 16 ; m++) -+ { -+ power = 2 << n; /* power = 2^(n+1) */ -+ freq = Tclk/(10*(m+1)*power); -+ margin = MV_ABS(frequancy - freq); -+ if(margin < minMargin) -+ { -+ minMargin = margin; -+ actualFreq = freq; -+ actualN = n; -+ actualM = m; -+ } -+ } -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiInit - actN %d actM %d actFreq %d\n",actualN , actualM, actualFreq)); -+ /* Reset the TWSI logic */ -+ twsiReset(chanNum); -+ -+ /* Set the baud rate */ -+ val = ((actualM<< TWSI_BAUD_RATE_M_OFFS) | actualN << TWSI_BAUD_RATE_N_OFFS); -+ MV_REG_WRITE(TWSI_STATUS_BAUDE_RATE_REG(chanNum),val); -+ -+ /* Enable the TWSI and slave */ -+ MV_REG_WRITE(TWSI_CONTROL_REG(chanNum), TWSI_CONTROL_ENA | TWSI_CONTROL_ACK); -+ -+ /* set the TWSI slave address */ -+ if( pTwsiAddr->type == ADDR10_BIT )/* 10 Bit deviceAddress */ -+ { -+ /* writing the 2 most significant bits of the 10 bit address*/ -+ val = ((pTwsiAddr->address & TWSI_SLAVE_ADDR_10BIT_MASK) >> TWSI_SLAVE_ADDR_10BIT_OFFS ); -+ /* bits 7:3 must be 0x11110 */ -+ val |= TWSI_SLAVE_ADDR_10BIT_CONST; -+ /* set GCE bit */ -+ if(generalCallEnable) -+ val |= TWSI_SLAVE_ADDR_GCE_ENA; -+ /* write slave address */ -+ MV_REG_WRITE(TWSI_SLAVE_ADDR_REG(chanNum),val); -+ -+ /* writing the 8 least significant bits of the 10 bit address*/ -+ val = (pTwsiAddr->address << TWSI_EXTENDED_SLAVE_OFFS) & TWSI_EXTENDED_SLAVE_MASK; -+ MV_REG_WRITE(TWSI_EXTENDED_SLAVE_ADDR_REG(chanNum), val); -+ } -+ else /*7 bit address*/ -+ { -+ /* set the 7 Bits address */ -+ MV_REG_WRITE(TWSI_EXTENDED_SLAVE_ADDR_REG(chanNum),0x0); -+ val = (pTwsiAddr->address << TWSI_SLAVE_ADDR_7BIT_OFFS) & TWSI_SLAVE_ADDR_7BIT_MASK; -+ MV_REG_WRITE(TWSI_SLAVE_ADDR_REG(chanNum), val); -+ } -+ -+ /* unmask twsi int */ -+ val = MV_REG_READ(TWSI_CONTROL_REG(chanNum)); -+ MV_REG_WRITE(TWSI_CONTROL_REG(chanNum), val | TWSI_CONTROL_INT_ENA); -+ /* Add delay of 1ms */ -+ mvOsDelay(1); -+ -+ return actualFreq; -+} -+ -+ -+/******************************************************************************* -+* twsiStsGet - Get the TWSI status value. -+* -+* DESCRIPTION: -+* This routine returns the TWSI status value. -+* -+* INPUT: -+* chanNum - TWSI channel -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_U32 - the TWSI status. -+* -+*******************************************************************************/ -+static MV_U32 twsiStsGet(MV_U8 chanNum) -+{ -+ return MV_REG_READ(TWSI_STATUS_BAUDE_RATE_REG(chanNum)); -+ -+} -+ -+/******************************************************************************* -+* twsiReset - Reset the TWSI. -+* -+* DESCRIPTION: -+* Resets the TWSI logic and sets all TWSI registers to their reset values. -+* -+* INPUT: -+* chanNum - TWSI channel -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* None -+* -+*******************************************************************************/ -+static MV_VOID twsiReset(MV_U8 chanNum) -+{ -+ /* Reset the TWSI logic */ -+ MV_REG_WRITE(TWSI_SOFT_RESET_REG(chanNum),0); -+ -+ /* wait for 2 mili sec */ -+ mvOsDelay(2); -+ -+ return; -+} -+ -+ -+ -+ -+/******************************* POLICY ****************************************/ -+ -+ -+ -+/******************************************************************************* -+* mvTwsiAddrSet - Set address on TWSI bus. -+* -+* DESCRIPTION: -+* This function Set address (7 or 10 Bit address) on the Twsi Bus. -+* -+* INPUT: -+* chanNum - TWSI channel -+* pTwsiAddr - twsi address. -+* command - read / write . -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK - if setting the address completed succesfully. -+* MV_FAIL otherwmise. -+* -+*******************************************************************************/ -+MV_STATUS mvTwsiAddrSet(MV_U8 chanNum, MV_TWSI_ADDR *pTwsiAddr, MV_TWSI_CMD command) -+{ -+ DB(mvOsPrintf("TWSI: mvTwsiAddr7BitSet addr %x , type %d, cmd is %s\n",pTwsiAddr->address,\ -+ pTwsiAddr->type, ((command==MV_TWSI_WRITE)?"Write":"Read") )); -+ /* 10 Bit address */ -+ if(pTwsiAddr->type == ADDR10_BIT) -+ { -+ return twsiAddr10BitSet(chanNum, pTwsiAddr->address,command); -+ } -+ /* 7 Bit address */ -+ else -+ { -+ return twsiAddr7BitSet(chanNum, pTwsiAddr->address,command); -+ } -+ -+} -+ -+/******************************************************************************* -+* twsiAddr10BitSet - Set 10 Bit address on TWSI bus. -+* -+* DESCRIPTION: -+* There are two address phases: -+* 1) Write '11110' to data register bits [7:3] and 10-bit address MSB -+* (bits [9:8]) to data register bits [2:1] plus a write(0) or read(1) bit -+* to the Data register. Then it clears interrupt flag which drive -+* the address on the TWSI bus. The function then waits for interrupt -+* flag to be active and status 0x18 (write) or 0x40 (read) to be set. -+* 2) write the rest of 10-bit address to data register and clears -+* interrupt flag which drive the address on the TWSI bus. The -+* function then waits for interrupt flag to be active and status -+* 0xD0 (write) or 0xE0 (read) to be set. -+* -+* INPUT: -+* chanNum - TWSI channel -+* deviceAddress - twsi address. -+* command - read / write . -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK - if setting the address completed succesfully. -+* MV_FAIL otherwmise. -+* -+*******************************************************************************/ -+static MV_STATUS twsiAddr10BitSet(MV_U8 chanNum, MV_U32 deviceAddress,MV_TWSI_CMD command) -+{ -+ MV_U32 val,timeout; -+ -+ /* writing the 2 most significant bits of the 10 bit address*/ -+ val = ((deviceAddress & TWSI_DATA_ADDR_10BIT_MASK) >> TWSI_DATA_ADDR_10BIT_OFFS ); -+ /* bits 7:3 must be 0x11110 */ -+ val |= TWSI_DATA_ADDR_10BIT_CONST; -+ /* set command */ -+ val |= command; -+ MV_REG_WRITE(TWSI_DATA_REG(chanNum), val); -+ /* WA add a delay */ -+ mvOsDelay(1); -+ -+ /* clear Int flag */ -+ twsiIntFlgClr(chanNum); -+ -+ /* wait for Int to be Set */ -+ timeout = 0; -+ while( !twsiMainIntGet(chanNum) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: twsiAddr10BitSet ERROR - 1st addr (10Bit) Int TimeOut.\n")) -+ return MV_TIMEOUT; -+ -+ /* check the status */ -+ val = twsiStsGet(chanNum); -+ if(( (val != TWSI_AD_PLS_RD_BIT_TRA_ACK_REC) && (command == MV_TWSI_READ ) ) || -+ ( (val != TWSI_AD_PLS_WR_BIT_TRA_ACK_REC) && (command == MV_TWSI_WRITE) )) -+ { -+ mvOsPrintf("TWSI: twsiAddr10BitSet ERROR - status %x 1st addr (10 Bit) in %s mode.\n"\ -+ ,val, ((command==MV_TWSI_WRITE)?"Write":"Read") ); -+ return MV_FAIL; -+ } -+ -+ /* set 8 LSB of the address */ -+ val = (deviceAddress << TWSI_DATA_ADDR_7BIT_OFFS) & TWSI_DATA_ADDR_7BIT_MASK; -+ MV_REG_WRITE(TWSI_DATA_REG(chanNum), val); -+ -+ /* clear Int flag */ -+ twsiIntFlgClr(chanNum); -+ -+ /* wait for Int to be Set */ -+ timeout = 0; -+ while( !twsiMainIntGet(chanNum) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: twsiAddr10BitSet ERROR - 2nd (10 Bit) Int TimOut.\n")) -+ return MV_TIMEOUT; -+ -+ /* check the status */ -+ val = twsiStsGet(chanNum); -+ if(( (val != TWSI_SEC_AD_PLS_RD_BIT_TRA_ACK_REC) && (command == MV_TWSI_READ ) ) || -+ ( (val != TWSI_SEC_AD_PLS_WR_BIT_TRA_ACK_REC) && (command == MV_TWSI_WRITE) )) -+ { -+ mvOsPrintf("TWSI: twsiAddr10BitSet ERROR - status %x 2nd addr(10 Bit) in %s mode.\n"\ -+ ,val, ((command==MV_TWSI_WRITE)?"Write":"Read") ); -+ return MV_FAIL; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* twsiAddr7BitSet - Set 7 Bit address on TWSI bus. -+* -+* DESCRIPTION: -+* This function writes 7 bit address plus a write or read bit to the -+* Data register. Then it clears interrupt flag which drive the address on -+* the TWSI bus. The function then waits for interrupt flag to be active -+* and status 0x18 (write) or 0x40 (read) to be set. -+* -+* INPUT: -+* chanNum - TWSI channel -+* deviceAddress - twsi address. -+* command - read / write . -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK - if setting the address completed succesfully. -+* MV_FAIL otherwmise. -+* -+*******************************************************************************/ -+static MV_STATUS twsiAddr7BitSet(MV_U8 chanNum, MV_U32 deviceAddress,MV_TWSI_CMD command) -+{ -+ MV_U32 val,timeout; -+ -+ /* set the address */ -+ val = (deviceAddress << TWSI_DATA_ADDR_7BIT_OFFS) & TWSI_DATA_ADDR_7BIT_MASK; -+ /* set command */ -+ val |= command; -+ MV_REG_WRITE(TWSI_DATA_REG(chanNum), val); -+ /* WA add a delay */ -+ mvOsDelay(1); -+ -+ /* clear Int flag */ -+ twsiIntFlgClr(chanNum); -+ -+ /* wait for Int to be Set */ -+ timeout = 0; -+ while( !twsiMainIntGet(chanNum) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: twsiAddr7BitSet ERROR - Addr (7 Bit) int TimeOut.\n")) -+ return MV_TIMEOUT; -+ -+ /* check the status */ -+ val = twsiStsGet(chanNum); -+ if(( (val != TWSI_AD_PLS_RD_BIT_TRA_ACK_REC) && (command == MV_TWSI_READ ) ) || -+ ( (val != TWSI_AD_PLS_WR_BIT_TRA_ACK_REC) && (command == MV_TWSI_WRITE) )) -+ { -+ /* only in debug, since in boot we try to read the SPD of both DRAM, and we don't -+ want error messeges in case DIMM doesn't exist. */ -+ DB(mvOsPrintf("TWSI: twsiAddr7BitSet ERROR - status %x addr (7 Bit) in %s mode.\n"\ -+ ,val,((command==MV_TWSI_WRITE)?"Write":"Read") )); -+ return MV_FAIL; -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* twsiDataWrite - Trnasmit a data block over TWSI bus. -+* -+* DESCRIPTION: -+* This function writes a given data block to TWSI bus in 8 bit granularity. -+* first The function waits for interrupt flag to be active then -+* For each 8-bit data: -+* The function writes data to data register. It then clears -+* interrupt flag which drives the data on the TWSI bus. -+* The function then waits for interrupt flag to be active and status -+* 0x28 to be set. -+* -+* -+* INPUT: -+* chanNum - TWSI channel -+* pBlock - Data block. -+* blockSize - number of chars in pBlock. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK - if transmiting the block completed succesfully, -+* MV_BAD_PARAM - if pBlock is NULL, -+* MV_FAIL otherwmise. -+* -+*******************************************************************************/ -+static MV_STATUS twsiDataTransmit(MV_U8 chanNum, MV_U8 *pBlock, MV_U32 blockSize) -+{ -+ MV_U32 timeout, temp, blockSizeWr = blockSize; -+ -+ if(NULL == pBlock) -+ return MV_BAD_PARAM; -+ -+ /* wait for Int to be Set */ -+ timeout = 0; -+ while( !twsiMainIntGet(chanNum) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: twsiDataTransmit ERROR - Read Data Int TimeOut.\n")) -+ return MV_TIMEOUT; -+ -+ while(blockSizeWr) -+ { -+ /* write the data*/ -+ MV_REG_WRITE(TWSI_DATA_REG(chanNum),(MV_U32)*pBlock); -+ DB(mvOsPrintf("TWSI: twsiDataTransmit place = %d write %x \n",\ -+ blockSize - blockSizeWr, *pBlock)); -+ pBlock++; -+ blockSizeWr--; -+ -+ twsiIntFlgClr(chanNum); -+ -+ /* wait for Int to be Set */ -+ timeout = 0; -+ while( !twsiMainIntGet(chanNum) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: twsiDataTransmit ERROR - Read Data Int TimeOut.\n")) -+ return MV_TIMEOUT; -+ -+ /* check the status */ -+ temp = twsiStsGet(chanNum); -+ if(temp != TWSI_M_TRAN_DATA_BYTE_ACK_REC) -+ { -+ mvOsPrintf("TWSI: twsiDataTransmit ERROR - status %x in write trans\n",temp); -+ return MV_FAIL; -+ } -+ -+ } -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* twsiDataReceive - Receive data block from TWSI bus. -+* -+* DESCRIPTION: -+* This function receive data block from TWSI bus in 8bit granularity -+* into pBlock buffer. -+* first The function waits for interrupt flag to be active then -+* For each 8-bit data: -+* It clears the interrupt flag which allows the next data to be -+* received from TWSI bus. -+* The function waits for interrupt flag to be active, -+* and status reg is 0x50. -+* Then the function reads data from data register, and copies it to -+* the given buffer. -+* -+* INPUT: -+* chanNum - TWSI channel -+* blockSize - number of bytes to read. -+* -+* OUTPUT: -+* pBlock - Data block. -+* -+* RETURN: -+* MV_OK - if receive transaction completed succesfully, -+* MV_BAD_PARAM - if pBlock is NULL, -+* MV_FAIL otherwmise. -+* -+*******************************************************************************/ -+static MV_STATUS twsiDataReceive(MV_U8 chanNum, MV_U8 *pBlock, MV_U32 blockSize) -+{ -+ MV_U32 timeout, temp, blockSizeRd = blockSize; -+ if(NULL == pBlock) -+ return MV_BAD_PARAM; -+ -+ /* wait for Int to be Set */ -+ timeout = 0; -+ while( !twsiMainIntGet(chanNum) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: twsiDataReceive ERROR - Read Data int Time out .\n")) -+ return MV_TIMEOUT; -+ -+ while(blockSizeRd) -+ { -+ if(blockSizeRd == 1) -+ { -+ /* clear ack and Int flag */ -+ temp = MV_REG_READ(TWSI_CONTROL_REG(chanNum)); -+ temp &= ~(TWSI_CONTROL_ACK); -+ MV_REG_WRITE(TWSI_CONTROL_REG(chanNum), temp); -+ } -+ twsiIntFlgClr(chanNum); -+ /* wait for Int to be Set */ -+ timeout = 0; -+ while( (!twsiMainIntGet(chanNum)) && (timeout++ < TWSI_TIMEOUT_VALUE)); -+ -+ /* check for timeout */ -+ if(MV_TRUE == twsiTimeoutChk(timeout,"TWSI: twsiDataReceive ERROR - Read Data Int Time out .\n")) -+ return MV_TIMEOUT; -+ -+ /* check the status */ -+ temp = twsiStsGet(chanNum); -+ if((temp != TWSI_M_REC_RD_DATA_ACK_TRA) && (blockSizeRd !=1)) -+ { -+ mvOsPrintf("TWSI: twsiDataReceive ERROR - status %x in read trans \n",temp); -+ return MV_FAIL; -+ } -+ else if((temp != TWSI_M_REC_RD_DATA_ACK_NOT_TRA) && (blockSizeRd ==1)) -+ { -+ mvOsPrintf("TWSI: twsiDataReceive ERROR - status %x in Rd Terminate\n",temp); -+ return MV_FAIL; -+ } -+ -+ /* read the data*/ -+ *pBlock = (MV_U8)MV_REG_READ(TWSI_DATA_REG(chanNum)); -+ DB(mvOsPrintf("TWSI: twsiDataReceive place %d read %x \n",\ -+ blockSize - blockSizeRd,*pBlock)); -+ pBlock++; -+ blockSizeRd--; -+ } -+ -+ return MV_OK; -+} -+ -+ -+ -+/******************************************************************************* -+* twsiTargetOffsSet - Set TWST target offset on TWSI bus. -+* -+* DESCRIPTION: -+* The function support TWSI targets that have inside address space (for -+* example EEPROMs). The function: -+* 1) Convert the given offset into pBlock and size. -+* in case the offset should be set to a TWSI slave which support -+* more then 256 bytes offset, the offset setting will be done -+* in 2 transactions. -+* 2) Use twsiDataTransmit to place those on the bus. -+* -+* INPUT: -+* chanNum - TWSI channel -+* offset - offset to be set on the EEPROM device. -+* moreThen256 - whether the EEPROM device support more then 256 byte offset. -+* -+* OUTPUT: -+* None. -+* -+* RETURN: -+* MV_OK - if setting the offset completed succesfully. -+* MV_FAIL otherwmise. -+* -+*******************************************************************************/ -+static MV_STATUS twsiTargetOffsSet(MV_U8 chanNum, MV_U32 offset, MV_BOOL moreThen256) -+{ -+ MV_U8 offBlock[2]; -+ MV_U32 offSize; -+ -+ if(moreThen256 == MV_TRUE) -+ { -+ offBlock[0] = (offset >> 8) & 0xff; -+ offBlock[1] = offset & 0xff; -+ offSize = 2; -+ } -+ else -+ { -+ offBlock[0] = offset & 0xff; -+ offSize = 1; -+ } -+ DB(mvOsPrintf("TWSI: twsiTargetOffsSet offSize = %x addr1 = %x addr2 = %x\n",\ -+ offSize,offBlock[0],offBlock[1])); -+ return twsiDataTransmit(chanNum, offBlock, offSize); -+ -+} -+ -+/******************************************************************************* -+* mvTwsiRead - Read data block from a TWSI Slave. -+* -+* DESCRIPTION: -+* The function calls the following functions: -+* -) mvTwsiStartBitSet(); -+* if(EEPROM device) -+* -) mvTwsiAddrSet(w); -+* -) twsiTargetOffsSet(); -+* -) mvTwsiStartBitSet(); -+* -) mvTwsiAddrSet(r); -+* -) twsiDataReceive(); -+* -) mvTwsiStopBitSet(); -+* -+* INPUT: -+* chanNum - TWSI channel -+* pTwsiSlave - Twsi Slave structure. -+* blockSize - number of bytes to read. -+* -+* OUTPUT: -+* pBlock - Data block. -+* -+* RETURN: -+* MV_OK - if EEPROM read transaction completed succesfully, -+* MV_BAD_PARAM - if pBlock is NULL, -+* MV_FAIL otherwmise. -+* -+*******************************************************************************/ -+MV_STATUS mvTwsiRead(MV_U8 chanNum, MV_TWSI_SLAVE *pTwsiSlave, MV_U8 *pBlock, MV_U32 blockSize) -+{ -+ if((NULL == pBlock) || (NULL == pTwsiSlave)) -+ return MV_BAD_PARAM; -+ if(MV_OK != mvTwsiStartBitSet(chanNum)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ -+ DB(mvOsPrintf("TWSI: mvTwsiEepromRead after mvTwsiStartBitSet\n")); -+ -+ /* in case offset exsist (i.e. eeprom ) */ -+ if(MV_TRUE == pTwsiSlave->validOffset) -+ { -+ if(MV_OK != mvTwsiAddrSet(chanNum, &(pTwsiSlave->slaveAddr), MV_TWSI_WRITE)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiEepromRead after mvTwsiAddrSet\n")); -+ if(MV_OK != twsiTargetOffsSet(chanNum, pTwsiSlave->offset, pTwsiSlave->moreThen256)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiEepromRead after twsiTargetOffsSet\n")); -+ if(MV_OK != mvTwsiStartBitSet(chanNum)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiEepromRead after mvTwsiStartBitSet\n")); -+ } -+ if(MV_OK != mvTwsiAddrSet(chanNum, &(pTwsiSlave->slaveAddr), MV_TWSI_READ)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiEepromRead after mvTwsiAddrSet\n")); -+ if(MV_OK != twsiDataReceive(chanNum, pBlock, blockSize)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiEepromRead after twsiDataReceive\n")); -+ -+ if(MV_OK != mvTwsiStopBitSet(chanNum)) -+ { -+ return MV_FAIL; -+ } -+ -+ twsiAckBitSet(chanNum); -+ -+ DB(mvOsPrintf("TWSI: mvTwsiEepromRead after mvTwsiStopBitSet\n")); -+ -+ return MV_OK; -+} -+ -+/******************************************************************************* -+* mvTwsiWrite - Write data block to a TWSI Slave. -+* -+* DESCRIPTION: -+* The function calls the following functions: -+* -) mvTwsiStartBitSet(); -+* -) mvTwsiAddrSet(); -+* -)if(EEPROM device) -+* -) twsiTargetOffsSet(); -+* -) twsiDataTransmit(); -+* -) mvTwsiStopBitSet(); -+* -+* INPUT: -+* chanNum - TWSI channel -+* eepromAddress - eeprom address. -+* blockSize - number of bytes to write. -+* pBlock - Data block. -+* -+* OUTPUT: -+* None -+* -+* RETURN: -+* MV_OK - if EEPROM read transaction completed succesfully. -+* MV_BAD_PARAM - if pBlock is NULL, -+* MV_FAIL otherwmise. -+* -+* NOTE: Part of the EEPROM, required that the offset will be aligned to the -+* max write burst supported. -+*******************************************************************************/ -+MV_STATUS mvTwsiWrite(MV_U8 chanNum, MV_TWSI_SLAVE *pTwsiSlave, MV_U8 *pBlock, MV_U32 blockSize) -+{ -+ if((NULL == pBlock) || (NULL == pTwsiSlave)) -+ return MV_BAD_PARAM; -+ -+ if(MV_OK != mvTwsiStartBitSet(chanNum)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ -+ DB(mvOsPrintf("TWSI: mvTwsiEepromWrite after mvTwsiStartBitSet\n")); -+ if(MV_OK != mvTwsiAddrSet(chanNum, &(pTwsiSlave->slaveAddr), MV_TWSI_WRITE)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI :mvTwsiEepromWrite after mvTwsiAddrSet\n")); -+ -+ /* in case offset exsist (i.e. eeprom ) */ -+ if(MV_TRUE == pTwsiSlave->validOffset) -+ { -+ if(MV_OK != twsiTargetOffsSet(chanNum, pTwsiSlave->offset, pTwsiSlave->moreThen256)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiEepromWrite after twsiTargetOffsSet\n")); -+ } -+ if(MV_OK != twsiDataTransmit(chanNum, pBlock, blockSize)) -+ { -+ mvTwsiStopBitSet(chanNum); -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiEepromWrite after twsiDataTransmit\n")); -+ if(MV_OK != mvTwsiStopBitSet(chanNum)) -+ { -+ return MV_FAIL; -+ } -+ DB(mvOsPrintf("TWSI: mvTwsiEepromWrite after mvTwsiStopBitSet\n")); -+ -+ return MV_OK; -+} -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.h b/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.h -new file mode 100644 -index 0000000..c3eddd1 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsi.h -@@ -0,0 +1,121 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+#ifndef __INCmvTwsiH -+#define __INCmvTwsiH -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* need to update this includes */ -+#include "twsi/mvTwsiSpec.h" -+#include "ctrlEnv/mvCtrlEnvLib.h" -+ -+ -+/* The TWSI interface supports both 7-bit and 10-bit addressing. */ -+/* This enumerator describes addressing type. */ -+typedef enum _mvTwsiAddrType -+{ -+ ADDR7_BIT, /* 7 bit address */ -+ ADDR10_BIT /* 10 bit address */ -+}MV_TWSI_ADDR_TYPE; -+ -+/* This structure describes TWSI address. */ -+typedef struct _mvTwsiAddr -+{ -+ MV_U32 address; /* address */ -+ MV_TWSI_ADDR_TYPE type; /* Address type */ -+}MV_TWSI_ADDR; -+ -+/* This structure describes a TWSI slave. */ -+typedef struct _mvTwsiSlave -+{ -+ MV_TWSI_ADDR slaveAddr; -+ MV_BOOL validOffset; /* whether the slave has offset (i.e. Eeprom etc.) */ -+ MV_U32 offset; /* offset in the slave. */ -+ MV_BOOL moreThen256; /* whether the ofset is bigger then 256 */ -+}MV_TWSI_SLAVE; -+ -+/* This enumerator describes TWSI protocol commands. */ -+typedef enum _mvTwsiCmd -+{ -+ MV_TWSI_WRITE, /* TWSI write command - 0 according to spec */ -+ MV_TWSI_READ /* TWSI read command - 1 according to spec */ -+}MV_TWSI_CMD; -+ -+MV_STATUS mvTwsiStartBitSet(MV_U8 chanNum); -+MV_STATUS mvTwsiStopBitSet(MV_U8 chanNum); -+MV_STATUS mvTwsiAddrSet(MV_U8 chanNum, MV_TWSI_ADDR *twsiAddr, MV_TWSI_CMD command); -+ -+MV_U32 mvTwsiInit(MV_U8 chanNum, MV_KHZ frequancy, MV_U32 Tclk, MV_TWSI_ADDR *twsiAddr, MV_BOOL generalCallEnable); -+MV_STATUS mvTwsiRead (MV_U8 chanNum, MV_TWSI_SLAVE *twsiSlave, MV_U8 *pBlock, MV_U32 blockSize); -+MV_STATUS mvTwsiWrite(MV_U8 chanNum, MV_TWSI_SLAVE *twsiSlave, MV_U8 *pBlock, MV_U32 blockSize); -+ -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* __INCmvTwsiH */ -+ -diff --git a/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsiSpec.h b/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsiSpec.h -new file mode 100644 -index 0000000..ebb6db7 ---- /dev/null -+++ b/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/mvTwsiSpec.h -@@ -0,0 +1,160 @@ -+/******************************************************************************* -+Copyright (C) Marvell International Ltd. and its affiliates -+ -+This software file (the "File") is owned and distributed by Marvell -+International Ltd. and/or its affiliates ("Marvell") under the following -+alternative licensing terms. Once you have made an election to distribute the -+File under one of the following license alternatives, please (i) delete this -+introductory statement regarding license alternatives, (ii) delete the two -+license alternatives that you have not elected to use and (iii) preserve the -+Marvell copyright notice above. -+ -+******************************************************************************** -+Marvell Commercial License Option -+ -+If you received this File from Marvell and you have entered into a commercial -+license agreement (a "Commercial License") with Marvell, the File is licensed -+to you under the terms of the applicable Commercial License. -+ -+******************************************************************************** -+Marvell GPL License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File in accordance with the terms and conditions of the General -+Public License Version 2, June 1991 (the "GPL License"), a copy of which is -+available along with the File in the license.txt file or by writing to the Free -+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. -+ -+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -+DISCLAIMED. The GPL License provides additional details about this warranty -+disclaimer. -+******************************************************************************** -+Marvell BSD License Option -+ -+If you received this File from Marvell, you may opt to use, redistribute and/or -+modify this File under the following licensing terms. -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+ * Redistributions of source code must retain the above copyright notice, -+ this list of conditions and the following disclaimer. -+ -+ * Redistributions in binary form must reproduce the above copyright -+ notice, this list of conditions and the following disclaimer in the -+ documentation and/or other materials provided with the distribution. -+ -+ * Neither the name of Marvell nor the names of its contributors may be -+ used to endorse or promote products derived from this software without -+ specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -+*******************************************************************************/ -+/****************************************/ -+/* TWSI Registers */ -+/****************************************/ -+#ifndef __INCmvTwsiSpech -+#define __INCmvTwsiSpech -+ -+#ifdef __cplusplus -+extern "C" { -+#endif /* __cplusplus */ -+ -+/* defines */ -+#define TWSI_SLAVE_ADDR_REG(chanNum) (TWSI_SLAVE_BASE(chanNum)+ 0x00) -+ -+#define TWSI_SLAVE_ADDR_GCE_ENA BIT0 -+#define TWSI_SLAVE_ADDR_7BIT_OFFS 0x1 -+#define TWSI_SLAVE_ADDR_7BIT_MASK (0xFF << TWSI_SLAVE_ADDR_7BIT_OFFS) -+#define TWSI_SLAVE_ADDR_10BIT_OFFS 0x7 -+#define TWSI_SLAVE_ADDR_10BIT_MASK 0x300 -+#define TWSI_SLAVE_ADDR_10BIT_CONST 0xF0 -+ -+ -+#define TWSI_EXTENDED_SLAVE_ADDR_REG(chanNum) (TWSI_SLAVE_BASE(chanNum) + 0x10) -+#define TWSI_EXTENDED_SLAVE_OFFS 0 -+#define TWSI_EXTENDED_SLAVE_MASK (0xFF << TWSI_EXTENDED_SLAVE_OFFS) -+ -+ -+#define TWSI_DATA_REG(chanNum) (TWSI_SLAVE_BASE(chanNum) + 0x04) -+#define TWSI_DATA_COMMAND_OFFS 0x0 -+#define TWSI_DATA_COMMAND_MASK (0x1 << TWSI_DATA_COMMAND_OFFS) -+#define TWSI_DATA_COMMAND_WR (0x1 << TWSI_DATA_COMMAND_OFFS) -+#define TWSI_DATA_COMMAND_RD (0x0 << TWSI_DATA_COMMAND_OFFS) -+#define TWSI_DATA_ADDR_7BIT_OFFS 0x1 -+#define TWSI_DATA_ADDR_7BIT_MASK (0xFF << TWSI_DATA_ADDR_7BIT_OFFS) -+#define TWSI_DATA_ADDR_10BIT_OFFS 0x7 -+#define TWSI_DATA_ADDR_10BIT_MASK 0x300 -+#define TWSI_DATA_ADDR_10BIT_CONST 0xF0 -+ -+ -+#define TWSI_CONTROL_REG(chanNum) (TWSI_SLAVE_BASE(chanNum) + 0x08) -+#define TWSI_CONTROL_ACK BIT2 -+#define TWSI_CONTROL_INT_FLAG_SET BIT3 -+#define TWSI_CONTROL_STOP_BIT BIT4 -+#define TWSI_CONTROL_START_BIT BIT5 -+#define TWSI_CONTROL_ENA BIT6 -+#define TWSI_CONTROL_INT_ENA BIT7 -+ -+ -+#define TWSI_STATUS_BAUDE_RATE_REG(chanNum) (TWSI_SLAVE_BASE(chanNum) + 0x0c) -+#define TWSI_BAUD_RATE_N_OFFS 0 -+#define TWSI_BAUD_RATE_N_MASK (0x7 << TWSI_BAUD_RATE_N_OFFS) -+#define TWSI_BAUD_RATE_M_OFFS 3 -+#define TWSI_BAUD_RATE_M_MASK (0xF << TWSI_BAUD_RATE_M_OFFS) -+ -+#define TWSI_SOFT_RESET_REG(chanNum) (TWSI_SLAVE_BASE(chanNum) + 0x1c) -+ -+/* defines */ -+#define TWSI_TIMEOUT_VALUE 0x500 -+ -+/* TWSI status codes */ -+#define TWSI_BUS_ERROR 0x00 -+#define TWSI_START_CON_TRA 0x08 -+#define TWSI_REPEATED_START_CON_TRA 0x10 -+#define TWSI_AD_PLS_WR_BIT_TRA_ACK_REC 0x18 -+#define TWSI_AD_PLS_WR_BIT_TRA_ACK_NOT_REC 0x20 -+#define TWSI_M_TRAN_DATA_BYTE_ACK_REC 0x28 -+#define TWSI_M_TRAN_DATA_BYTE_ACK_NOT_REC 0x30 -+#define TWSI_M_LOST_ARB_DUR_AD_OR_DATA_TRA 0x38 -+#define TWSI_AD_PLS_RD_BIT_TRA_ACK_REC 0x40 -+#define TWSI_AD_PLS_RD_BIT_TRA_ACK_NOT_REC 0x48 -+#define TWSI_M_REC_RD_DATA_ACK_TRA 0x50 -+#define TWSI_M_REC_RD_DATA_ACK_NOT_TRA 0x58 -+#define TWSI_SLA_REC_AD_PLS_WR_BIT_ACK_TRA 0x60 -+#define TWSI_M_LOST_ARB_DUR_AD_TRA_AD_IS_TRGT_TO_SLA_ACK_TRA_W 0x68 -+#define TWSI_GNL_CALL_REC_ACK_TRA 0x70 -+#define TWSI_M_LOST_ARB_DUR_AD_TRA_GNL_CALL_AD_REC_ACK_TRA 0x78 -+#define TWSI_SLA_REC_WR_DATA_AF_REC_SLA_AD_ACK_TRAN 0x80 -+#define TWSI_SLA_REC_WR_DATA_AF_REC_SLA_AD_ACK_NOT_TRAN 0x88 -+#define TWSI_SLA_REC_WR_DATA_AF_REC_GNL_CALL_ACK_TRAN 0x90 -+#define TWSI_SLA_REC_WR_DATA_AF_REC_GNL_CALL_ACK_NOT_TRAN 0x98 -+#define TWSI_SLA_REC_STOP_OR_REPEATED_STRT_CON 0xA0 -+#define TWSI_SLA_REC_AD_PLS_RD_BIT_ACK_TRA 0xA8 -+#define TWSI_M_LOST_ARB_DUR_AD_TRA_AD_IS_TRGT_TO_SLA_ACK_TRA_R 0xB0 -+#define TWSI_SLA_TRA_RD_DATA_ACK_REC 0xB8 -+#define TWSI_SLA_TRA_RD_DATA_ACK_NOT_REC 0xC0 -+#define TWSI_SLA_TRA_LAST_RD_DATA_ACK_REC 0xC8 -+#define TWSI_SEC_AD_PLS_WR_BIT_TRA_ACK_REC 0xD0 -+#define TWSI_SEC_AD_PLS_WR_BIT_TRA_ACK_NOT_REC 0xD8 -+#define TWSI_SEC_AD_PLS_RD_BIT_TRA_ACK_REC 0xE0 -+#define TWSI_SEC_AD_PLS_RD_BIT_TRA_ACK_NOT_REC 0xE8 -+#define TWSI_NO_REL_STS_INT_FLAG_IS_KEPT_0 0xF8 -+ -+ -+#ifdef __cplusplus -+} -+#endif /* __cplusplus */ -+ -+#endif /* __INCmvTwsiSpech */ -diff --git a/crypto/ocf/ocf-bench.c b/crypto/ocf/ocf-bench.c -new file mode 100644 -index 0000000..d325231 ---- /dev/null -+++ b/crypto/ocf/ocf-bench.c -@@ -0,0 +1,436 @@ -+/* -+ * A loadable module that benchmarks the OCF crypto speed from kernel space. -+ * -+ * Copyright (C) 2004-2010 David McCullough <david_mccullough@mcafee.com> -+ * -+ * LICENSE TERMS -+ * -+ * The free distribution and use of this software in both source and binary -+ * form is allowed (with or without changes) provided that: -+ * -+ * 1. distributions of this source code include the above copyright -+ * notice, this list of conditions and the following disclaimer; -+ * -+ * 2. distributions in binary form include the above copyright -+ * notice, this list of conditions and the following disclaimer -+ * in the documentation and/or other associated materials; -+ * -+ * 3. the copyright holder's name is not used to endorse products -+ * built using this software without specific written permission. -+ * -+ * ALTERNATIVELY, provided that this notice is retained in full, this product -+ * may be distributed under the terms of the GNU General Public License (GPL), -+ * in which case the provisions of the GPL apply INSTEAD OF those given above. -+ * -+ * DISCLAIMER -+ * -+ * This software is provided 'as is' with no explicit or implied warranties -+ * in respect of its properties, including, but not limited to, correctness -+ * and/or fitness for purpose. -+ */ -+ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/wait.h> -+#include <linux/sched.h> -+#include <linux/spinlock.h> -+#include <linux/version.h> -+#include <linux/interrupt.h> -+#include <cryptodev.h> -+ -+#ifdef I_HAVE_AN_XSCALE_WITH_INTEL_SDK -+#define BENCH_IXP_ACCESS_LIB 1 -+#endif -+#ifdef BENCH_IXP_ACCESS_LIB -+#include <IxTypes.h> -+#include <IxOsBuffMgt.h> -+#include <IxNpeDl.h> -+#include <IxCryptoAcc.h> -+#include <IxQMgr.h> -+#include <IxOsServices.h> -+#include <IxOsCacheMMU.h> -+#endif -+ -+/* -+ * support for access lib version 1.4 -+ */ -+#ifndef IX_MBUF_PRIV -+#define IX_MBUF_PRIV(x) ((x)->priv) -+#endif -+ -+/* -+ * the number of simultaneously active requests -+ */ -+static int request_q_len = 20; -+module_param(request_q_len, int, 0); -+MODULE_PARM_DESC(request_q_len, "Number of outstanding requests"); -+/* -+ * how many requests we want to have processed -+ */ -+static int request_num = 1024; -+module_param(request_num, int, 0); -+MODULE_PARM_DESC(request_num, "run for at least this many requests"); -+/* -+ * the size of each request -+ */ -+static int request_size = 1500; -+module_param(request_size, int, 0); -+MODULE_PARM_DESC(request_size, "size of each request"); -+ -+/* -+ * a structure for each request -+ */ -+typedef struct { -+ struct work_struct work; -+#ifdef BENCH_IXP_ACCESS_LIB -+ IX_MBUF mbuf; -+#endif -+ unsigned char *buffer; -+} request_t; -+ -+static request_t *requests; -+ -+static int outstanding; -+static int total; -+ -+/*************************************************************************/ -+/* -+ * OCF benchmark routines -+ */ -+ -+static uint64_t ocf_cryptoid; -+static int ocf_init(void); -+static int ocf_cb(struct cryptop *crp); -+static void ocf_request(void *arg); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+static void ocf_request_wq(struct work_struct *work); -+#endif -+ -+static int -+ocf_init(void) -+{ -+ int error; -+ struct cryptoini crie, cria; -+ struct cryptodesc crda, crde; -+ -+ memset(&crie, 0, sizeof(crie)); -+ memset(&cria, 0, sizeof(cria)); -+ memset(&crde, 0, sizeof(crde)); -+ memset(&crda, 0, sizeof(crda)); -+ -+ cria.cri_alg = CRYPTO_SHA1_HMAC; -+ cria.cri_klen = 20 * 8; -+ cria.cri_key = "0123456789abcdefghij"; -+ -+ crie.cri_alg = CRYPTO_3DES_CBC; -+ crie.cri_klen = 24 * 8; -+ crie.cri_key = "0123456789abcdefghijklmn"; -+ -+ crie.cri_next = &cria; -+ -+ error = crypto_newsession(&ocf_cryptoid, &crie, 0); -+ if (error) { -+ printk("crypto_newsession failed %d\n", error); -+ return -1; -+ } -+ return 0; -+} -+ -+static int -+ocf_cb(struct cryptop *crp) -+{ -+ request_t *r = (request_t *) crp->crp_opaque; -+ -+ if (crp->crp_etype) -+ printk("Error in OCF processing: %d\n", crp->crp_etype); -+ total++; -+ crypto_freereq(crp); -+ crp = NULL; -+ -+ if (total > request_num) { -+ outstanding--; -+ return 0; -+ } -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+ INIT_WORK(&r->work, ocf_request_wq); -+#else -+ INIT_WORK(&r->work, ocf_request, r); -+#endif -+ schedule_work(&r->work); -+ return 0; -+} -+ -+ -+static void -+ocf_request(void *arg) -+{ -+ request_t *r = arg; -+ struct cryptop *crp = crypto_getreq(2); -+ struct cryptodesc *crde, *crda; -+ -+ if (!crp) { -+ outstanding--; -+ return; -+ } -+ -+ crde = crp->crp_desc; -+ crda = crde->crd_next; -+ -+ crda->crd_skip = 0; -+ crda->crd_flags = 0; -+ crda->crd_len = request_size; -+ crda->crd_inject = request_size; -+ crda->crd_alg = CRYPTO_SHA1_HMAC; -+ crda->crd_key = "0123456789abcdefghij"; -+ crda->crd_klen = 20 * 8; -+ -+ crde->crd_skip = 0; -+ crde->crd_flags = CRD_F_IV_EXPLICIT | CRD_F_ENCRYPT; -+ crde->crd_len = request_size; -+ crde->crd_inject = request_size; -+ crde->crd_alg = CRYPTO_3DES_CBC; -+ crde->crd_key = "0123456789abcdefghijklmn"; -+ crde->crd_klen = 24 * 8; -+ -+ crp->crp_ilen = request_size + 64; -+ crp->crp_flags = CRYPTO_F_CBIMM; -+ crp->crp_buf = (caddr_t) r->buffer; -+ crp->crp_callback = ocf_cb; -+ crp->crp_sid = ocf_cryptoid; -+ crp->crp_opaque = (caddr_t) r; -+ crypto_dispatch(crp); -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+static void -+ocf_request_wq(struct work_struct *work) -+{ -+ request_t *r = container_of(work, request_t, work); -+ ocf_request(r); -+} -+#endif -+ -+/*************************************************************************/ -+#ifdef BENCH_IXP_ACCESS_LIB -+/*************************************************************************/ -+/* -+ * CryptoAcc benchmark routines -+ */ -+ -+static IxCryptoAccCtx ixp_ctx; -+static UINT32 ixp_ctx_id; -+static IX_MBUF ixp_pri; -+static IX_MBUF ixp_sec; -+static int ixp_registered = 0; -+ -+static void ixp_register_cb(UINT32 ctx_id, IX_MBUF *bufp, -+ IxCryptoAccStatus status); -+static void ixp_perform_cb(UINT32 ctx_id, IX_MBUF *sbufp, IX_MBUF *dbufp, -+ IxCryptoAccStatus status); -+static void ixp_request(void *arg); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+static void ixp_request_wq(struct work_struct *work); -+#endif -+ -+static int -+ixp_init(void) -+{ -+ IxCryptoAccStatus status; -+ -+ ixp_ctx.cipherCtx.cipherAlgo = IX_CRYPTO_ACC_CIPHER_3DES; -+ ixp_ctx.cipherCtx.cipherMode = IX_CRYPTO_ACC_MODE_CBC; -+ ixp_ctx.cipherCtx.cipherKeyLen = 24; -+ ixp_ctx.cipherCtx.cipherBlockLen = IX_CRYPTO_ACC_DES_BLOCK_64; -+ ixp_ctx.cipherCtx.cipherInitialVectorLen = IX_CRYPTO_ACC_DES_IV_64; -+ memcpy(ixp_ctx.cipherCtx.key.cipherKey, "0123456789abcdefghijklmn", 24); -+ -+ ixp_ctx.authCtx.authAlgo = IX_CRYPTO_ACC_AUTH_SHA1; -+ ixp_ctx.authCtx.authDigestLen = 12; -+ ixp_ctx.authCtx.aadLen = 0; -+ ixp_ctx.authCtx.authKeyLen = 20; -+ memcpy(ixp_ctx.authCtx.key.authKey, "0123456789abcdefghij", 20); -+ -+ ixp_ctx.useDifferentSrcAndDestMbufs = 0; -+ ixp_ctx.operation = IX_CRYPTO_ACC_OP_ENCRYPT_AUTH ; -+ -+ IX_MBUF_MLEN(&ixp_pri) = IX_MBUF_PKT_LEN(&ixp_pri) = 128; -+ IX_MBUF_MDATA(&ixp_pri) = (unsigned char *) kmalloc(128, SLAB_ATOMIC); -+ IX_MBUF_MLEN(&ixp_sec) = IX_MBUF_PKT_LEN(&ixp_sec) = 128; -+ IX_MBUF_MDATA(&ixp_sec) = (unsigned char *) kmalloc(128, SLAB_ATOMIC); -+ -+ status = ixCryptoAccCtxRegister(&ixp_ctx, &ixp_pri, &ixp_sec, -+ ixp_register_cb, ixp_perform_cb, &ixp_ctx_id); -+ -+ if (IX_CRYPTO_ACC_STATUS_SUCCESS == status) { -+ while (!ixp_registered) -+ schedule(); -+ return ixp_registered < 0 ? -1 : 0; -+ } -+ -+ printk("ixp: ixCryptoAccCtxRegister failed %d\n", status); -+ return -1; -+} -+ -+static void -+ixp_register_cb(UINT32 ctx_id, IX_MBUF *bufp, IxCryptoAccStatus status) -+{ -+ if (bufp) { -+ IX_MBUF_MLEN(bufp) = IX_MBUF_PKT_LEN(bufp) = 0; -+ kfree(IX_MBUF_MDATA(bufp)); -+ IX_MBUF_MDATA(bufp) = NULL; -+ } -+ -+ if (IX_CRYPTO_ACC_STATUS_WAIT == status) -+ return; -+ if (IX_CRYPTO_ACC_STATUS_SUCCESS == status) -+ ixp_registered = 1; -+ else -+ ixp_registered = -1; -+} -+ -+static void -+ixp_perform_cb( -+ UINT32 ctx_id, -+ IX_MBUF *sbufp, -+ IX_MBUF *dbufp, -+ IxCryptoAccStatus status) -+{ -+ request_t *r = NULL; -+ -+ total++; -+ if (total > request_num) { -+ outstanding--; -+ return; -+ } -+ -+ if (!sbufp || !(r = IX_MBUF_PRIV(sbufp))) { -+ printk("crappo %p %p\n", sbufp, r); -+ outstanding--; -+ return; -+ } -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+ INIT_WORK(&r->work, ixp_request_wq); -+#else -+ INIT_WORK(&r->work, ixp_request, r); -+#endif -+ schedule_work(&r->work); -+} -+ -+static void -+ixp_request(void *arg) -+{ -+ request_t *r = arg; -+ IxCryptoAccStatus status; -+ -+ memset(&r->mbuf, 0, sizeof(r->mbuf)); -+ IX_MBUF_MLEN(&r->mbuf) = IX_MBUF_PKT_LEN(&r->mbuf) = request_size + 64; -+ IX_MBUF_MDATA(&r->mbuf) = r->buffer; -+ IX_MBUF_PRIV(&r->mbuf) = r; -+ status = ixCryptoAccAuthCryptPerform(ixp_ctx_id, &r->mbuf, NULL, -+ 0, request_size, 0, request_size, request_size, r->buffer); -+ if (IX_CRYPTO_ACC_STATUS_SUCCESS != status) { -+ printk("status1 = %d\n", status); -+ outstanding--; -+ return; -+ } -+ return; -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) -+static void -+ixp_request_wq(struct work_struct *work) -+{ -+ request_t *r = container_of(work, request_t, work); -+ ixp_request(r); -+} -+#endif -+ -+/*************************************************************************/ -+#endif /* BENCH_IXP_ACCESS_LIB */ -+/*************************************************************************/ -+ -+int -+ocfbench_init(void) -+{ -+ int i, jstart, jstop; -+ -+ printk("Crypto Speed tests\n"); -+ -+ requests = kmalloc(sizeof(request_t) * request_q_len, GFP_KERNEL); -+ if (!requests) { -+ printk("malloc failed\n"); -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < request_q_len; i++) { -+ /* +64 for return data */ -+ requests[i].buffer = kmalloc(request_size + 128, GFP_DMA); -+ if (!requests[i].buffer) { -+ printk("malloc failed\n"); -+ return -EINVAL; -+ } -+ memset(requests[i].buffer, '0' + i, request_size + 128); -+ } -+ -+ /* -+ * OCF benchmark -+ */ -+ printk("OCF: testing ...\n"); -+ ocf_init(); -+ total = outstanding = 0; -+ jstart = jiffies; -+ for (i = 0; i < request_q_len; i++) { -+ outstanding++; -+ ocf_request(&requests[i]); -+ } -+ while (outstanding > 0) -+ schedule(); -+ jstop = jiffies; -+ -+ printk("OCF: %d requests of %d bytes in %d jiffies\n", total, request_size, -+ jstop - jstart); -+ -+#ifdef BENCH_IXP_ACCESS_LIB -+ /* -+ * IXP benchmark -+ */ -+ printk("IXP: testing ...\n"); -+ ixp_init(); -+ total = outstanding = 0; -+ jstart = jiffies; -+ for (i = 0; i < request_q_len; i++) { -+ outstanding++; -+ ixp_request(&requests[i]); -+ } -+ while (outstanding > 0) -+ schedule(); -+ jstop = jiffies; -+ -+ printk("IXP: %d requests of %d bytes in %d jiffies\n", total, request_size, -+ jstop - jstart); -+#endif /* BENCH_IXP_ACCESS_LIB */ -+ -+ for (i = 0; i < request_q_len; i++) -+ kfree(requests[i].buffer); -+ kfree(requests); -+ return -EINVAL; /* always fail to load so it can be re-run quickly ;-) */ -+} -+ -+static void __exit ocfbench_exit(void) -+{ -+} -+ -+module_init(ocfbench_init); -+module_exit(ocfbench_exit); -+ -+MODULE_LICENSE("BSD"); -+MODULE_AUTHOR("David McCullough <david_mccullough@mcafee.com>"); -+MODULE_DESCRIPTION("Benchmark various in-kernel crypto speeds"); -diff --git a/crypto/ocf/ocf-compat.h b/crypto/ocf/ocf-compat.h -new file mode 100644 -index 0000000..212f971 ---- /dev/null -+++ b/crypto/ocf/ocf-compat.h -@@ -0,0 +1,294 @@ -+#ifndef _BSD_COMPAT_H_ -+#define _BSD_COMPAT_H_ 1 -+/****************************************************************************/ -+/* -+ * Provide compat routines for older linux kernels and BSD kernels -+ * -+ * Written by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2010 David McCullough <david_mccullough@mcafee.com> -+ * -+ * LICENSE TERMS -+ * -+ * The free distribution and use of this software in both source and binary -+ * form is allowed (with or without changes) provided that: -+ * -+ * 1. distributions of this source code include the above copyright -+ * notice, this list of conditions and the following disclaimer; -+ * -+ * 2. distributions in binary form include the above copyright -+ * notice, this list of conditions and the following disclaimer -+ * in the documentation and/or other associated materials; -+ * -+ * 3. the copyright holder's name is not used to endorse products -+ * built using this software without specific written permission. -+ * -+ * ALTERNATIVELY, provided that this notice is retained in full, this file -+ * may be distributed under the terms of the GNU General Public License (GPL), -+ * in which case the provisions of the GPL apply INSTEAD OF those given above. -+ * -+ * DISCLAIMER -+ * -+ * This software is provided 'as is' with no explicit or implied warranties -+ * in respect of its properties, including, but not limited to, correctness -+ * and/or fitness for purpose. -+ */ -+/****************************************************************************/ -+#ifdef __KERNEL__ -+/* -+ * fake some BSD driver interface stuff specifically for OCF use -+ */ -+ -+typedef struct ocf_device *device_t; -+ -+typedef struct { -+ int (*cryptodev_newsession)(device_t dev, u_int32_t *sidp, struct cryptoini *cri); -+ int (*cryptodev_freesession)(device_t dev, u_int64_t tid); -+ int (*cryptodev_process)(device_t dev, struct cryptop *crp, int hint); -+ int (*cryptodev_kprocess)(device_t dev, struct cryptkop *krp, int hint); -+} device_method_t; -+#define DEVMETHOD(id, func) id: func -+ -+struct ocf_device { -+ char name[32]; /* the driver name */ -+ char nameunit[32]; /* the driver name + HW instance */ -+ int unit; -+ device_method_t methods; -+ void *softc; -+}; -+ -+#define CRYPTODEV_NEWSESSION(dev, sid, cri) \ -+ ((*(dev)->methods.cryptodev_newsession)(dev,sid,cri)) -+#define CRYPTODEV_FREESESSION(dev, sid) \ -+ ((*(dev)->methods.cryptodev_freesession)(dev, sid)) -+#define CRYPTODEV_PROCESS(dev, crp, hint) \ -+ ((*(dev)->methods.cryptodev_process)(dev, crp, hint)) -+#define CRYPTODEV_KPROCESS(dev, krp, hint) \ -+ ((*(dev)->methods.cryptodev_kprocess)(dev, krp, hint)) -+ -+#define device_get_name(dev) ((dev)->name) -+#define device_get_nameunit(dev) ((dev)->nameunit) -+#define device_get_unit(dev) ((dev)->unit) -+#define device_get_softc(dev) ((dev)->softc) -+ -+#define softc_device_decl \ -+ struct ocf_device _device; \ -+ device_t -+ -+#define softc_device_init(_sc, _name, _unit, _methods) \ -+ if (1) {\ -+ strncpy((_sc)->_device.name, _name, sizeof((_sc)->_device.name) - 1); \ -+ snprintf((_sc)->_device.nameunit, sizeof((_sc)->_device.name), "%s%d", _name, _unit); \ -+ (_sc)->_device.unit = _unit; \ -+ (_sc)->_device.methods = _methods; \ -+ (_sc)->_device.softc = (void *) _sc; \ -+ *(device_t *)((softc_get_device(_sc))+1) = &(_sc)->_device; \ -+ } else -+ -+#define softc_get_device(_sc) (&(_sc)->_device) -+ -+/* -+ * iomem support for 2.4 and 2.6 kernels -+ */ -+#include <linux/version.h> -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+#define ocf_iomem_t unsigned long -+ -+/* -+ * implement simple workqueue like support for older kernels -+ */ -+ -+#include <linux/tqueue.h> -+ -+#define work_struct tq_struct -+ -+#define INIT_WORK(wp, fp, ap) \ -+ do { \ -+ (wp)->sync = 0; \ -+ (wp)->routine = (fp); \ -+ (wp)->data = (ap); \ -+ } while (0) -+ -+#define schedule_work(wp) \ -+ do { \ -+ queue_task((wp), &tq_immediate); \ -+ mark_bh(IMMEDIATE_BH); \ -+ } while (0) -+ -+#define flush_scheduled_work() run_task_queue(&tq_immediate) -+ -+#else -+#define ocf_iomem_t void __iomem * -+ -+#include <linux/workqueue.h> -+ -+#endif -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) -+#include <linux/fdtable.h> -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) -+#define files_fdtable(files) (files) -+#endif -+ -+#ifdef MODULE_PARM -+#undef module_param /* just in case */ -+#define module_param(a,b,c) MODULE_PARM(a,"i") -+#endif -+ -+#define bzero(s,l) memset(s,0,l) -+#define bcopy(s,d,l) memcpy(d,s,l) -+#define bcmp(x, y, l) memcmp(x,y,l) -+ -+#define MIN(x,y) ((x) < (y) ? (x) : (y)) -+ -+#define device_printf(dev, a...) ({ \ -+ printk("%s: ", device_get_nameunit(dev)); printk(a); \ -+ }) -+ -+#undef printf -+#define printf(fmt...) printk(fmt) -+ -+#define KASSERT(c,p) if (!(c)) { printk p ; } else -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+#define ocf_daemonize(str) \ -+ daemonize(); \ -+ spin_lock_irq(¤t->sigmask_lock); \ -+ sigemptyset(¤t->blocked); \ -+ recalc_sigpending(current); \ -+ spin_unlock_irq(¤t->sigmask_lock); \ -+ sprintf(current->comm, str); -+#else -+#define ocf_daemonize(str) daemonize(str); -+#endif -+ -+#define TAILQ_INSERT_TAIL(q,d,m) list_add_tail(&(d)->m, (q)) -+#define TAILQ_EMPTY(q) list_empty(q) -+#define TAILQ_FOREACH(v, q, m) list_for_each_entry(v, q, m) -+ -+#define read_random(p,l) get_random_bytes(p,l) -+ -+#define DELAY(x) ((x) > 2000 ? mdelay((x)/1000) : udelay(x)) -+#define strtoul simple_strtoul -+ -+#define pci_get_vendor(dev) ((dev)->vendor) -+#define pci_get_device(dev) ((dev)->device) -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+#define pci_set_consistent_dma_mask(dev, mask) (0) -+#endif -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) -+#define pci_dma_sync_single_for_cpu pci_dma_sync_single -+#endif -+ -+#ifndef DMA_32BIT_MASK -+#define DMA_32BIT_MASK 0x00000000ffffffffULL -+#endif -+ -+#ifndef htole32 -+#define htole32(x) cpu_to_le32(x) -+#endif -+#ifndef htobe32 -+#define htobe32(x) cpu_to_be32(x) -+#endif -+#ifndef htole16 -+#define htole16(x) cpu_to_le16(x) -+#endif -+#ifndef htobe16 -+#define htobe16(x) cpu_to_be16(x) -+#endif -+ -+/* older kernels don't have these */ -+ -+#include <asm/irq.h> -+#if !defined(IRQ_NONE) && !defined(IRQ_RETVAL) -+#define IRQ_NONE -+#define IRQ_HANDLED -+#define IRQ_WAKE_THREAD -+#define IRQ_RETVAL -+#define irqreturn_t void -+typedef irqreturn_t (*irq_handler_t)(int irq, void *arg, struct pt_regs *regs); -+#endif -+#ifndef IRQF_SHARED -+#define IRQF_SHARED SA_SHIRQ -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) -+# define strlcpy(dest,src,len) \ -+ ({strncpy(dest,src,(len)-1); ((char *)dest)[(len)-1] = '\0'; }) -+#endif -+ -+#ifndef MAX_ERRNO -+#define MAX_ERRNO 4095 -+#endif -+#ifndef IS_ERR_VALUE -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,5) -+#include <linux/err.h> -+#endif -+#ifndef IS_ERR_VALUE -+#define IS_ERR_VALUE(x) ((unsigned long)(x) >= (unsigned long)-MAX_ERRNO) -+#endif -+#endif -+ -+/* -+ * common debug for all -+ */ -+#if 1 -+#define dprintk(a...) do { if (debug) printk(a); } while(0) -+#else -+#define dprintk(a...) -+#endif -+ -+#ifndef SLAB_ATOMIC -+/* Changed in 2.6.20, must use GFP_ATOMIC now */ -+#define SLAB_ATOMIC GFP_ATOMIC -+#endif -+ -+/* -+ * need some additional support for older kernels */ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,2) -+#define pci_register_driver_compat(driver, rc) \ -+ do { \ -+ if ((rc) > 0) { \ -+ (rc) = 0; \ -+ } else if (rc == 0) { \ -+ (rc) = -ENODEV; \ -+ } else { \ -+ pci_unregister_driver(driver); \ -+ } \ -+ } while (0) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) -+#define pci_register_driver_compat(driver,rc) ((rc) = (rc) < 0 ? (rc) : 0) -+#else -+#define pci_register_driver_compat(driver,rc) -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) -+ -+#include <linux/mm.h> -+#include <asm/scatterlist.h> -+ -+static inline void sg_set_page(struct scatterlist *sg, struct page *page, -+ unsigned int len, unsigned int offset) -+{ -+ sg->page = page; -+ sg->offset = offset; -+ sg->length = len; -+} -+ -+static inline void *sg_virt(struct scatterlist *sg) -+{ -+ return page_address(sg->page) + sg->offset; -+} -+ -+#define sg_init_table(sg, n) -+ -+#endif -+ -+#ifndef late_initcall -+#define late_initcall(init) module_init(init) -+#endif -+ -+#endif /* __KERNEL__ */ -+ -+/****************************************************************************/ -+#endif /* _BSD_COMPAT_H_ */ -diff --git a/crypto/ocf/ocfnull/Makefile b/crypto/ocf/ocfnull/Makefile -new file mode 100644 -index 0000000..044bcac ---- /dev/null -+++ b/crypto/ocf/ocfnull/Makefile -@@ -0,0 +1,12 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+obj-$(CONFIG_OCF_OCFNULL) += ocfnull.o -+ -+obj ?= . -+EXTRA_CFLAGS += -I$(obj)/.. -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/ocfnull/ocfnull.c b/crypto/ocf/ocfnull/ocfnull.c -new file mode 100644 -index 0000000..3df150d ---- /dev/null -+++ b/crypto/ocf/ocfnull/ocfnull.c -@@ -0,0 +1,203 @@ -+/* -+ * An OCF module for determining the cost of crypto versus the cost of -+ * IPSec processing outside of OCF. This modules gives us the effect of -+ * zero cost encryption, of course you will need to run it at both ends -+ * since it does no crypto at all. -+ * -+ * Written by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * -+ * LICENSE TERMS -+ * -+ * The free distribution and use of this software in both source and binary -+ * form is allowed (with or without changes) provided that: -+ * -+ * 1. distributions of this source code include the above copyright -+ * notice, this list of conditions and the following disclaimer; -+ * -+ * 2. distributions in binary form include the above copyright -+ * notice, this list of conditions and the following disclaimer -+ * in the documentation and/or other associated materials; -+ * -+ * 3. the copyright holder's name is not used to endorse products -+ * built using this software without specific written permission. -+ * -+ * ALTERNATIVELY, provided that this notice is retained in full, this product -+ * may be distributed under the terms of the GNU General Public License (GPL), -+ * in which case the provisions of the GPL apply INSTEAD OF those given above. -+ * -+ * DISCLAIMER -+ * -+ * This software is provided 'as is' with no explicit or implied warranties -+ * in respect of its properties, including, but not limited to, correctness -+ * and/or fitness for purpose. -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/sched.h> -+#include <linux/wait.h> -+#include <linux/crypto.h> -+#include <linux/interrupt.h> -+ -+#include <cryptodev.h> -+#include <uio.h> -+ -+static int32_t null_id = -1; -+static u_int32_t null_sesnum = 0; -+ -+static int null_process(device_t, struct cryptop *, int); -+static int null_newsession(device_t, u_int32_t *, struct cryptoini *); -+static int null_freesession(device_t, u_int64_t); -+ -+#define debug ocfnull_debug -+int ocfnull_debug = 0; -+module_param(ocfnull_debug, int, 0644); -+MODULE_PARM_DESC(ocfnull_debug, "Enable debug"); -+ -+/* -+ * dummy device structure -+ */ -+ -+static struct { -+ softc_device_decl sc_dev; -+} nulldev; -+ -+static device_method_t null_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, null_newsession), -+ DEVMETHOD(cryptodev_freesession,null_freesession), -+ DEVMETHOD(cryptodev_process, null_process), -+}; -+ -+/* -+ * Generate a new software session. -+ */ -+static int -+null_newsession(device_t arg, u_int32_t *sid, struct cryptoini *cri) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid == NULL || cri == NULL) { -+ dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ if (null_sesnum == 0) -+ null_sesnum++; -+ *sid = null_sesnum++; -+ return 0; -+} -+ -+ -+/* -+ * Free a session. -+ */ -+static int -+null_freesession(device_t arg, u_int64_t tid) -+{ -+ u_int32_t sid = CRYPTO_SESID2LID(tid); -+ -+ dprintk("%s()\n", __FUNCTION__); -+ if (sid > null_sesnum) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ /* Silently accept and return */ -+ if (sid == 0) -+ return 0; -+ return 0; -+} -+ -+ -+/* -+ * Process a request. -+ */ -+static int -+null_process(device_t arg, struct cryptop *crp, int hint) -+{ -+ unsigned int lid; -+ -+ dprintk("%s()\n", __FUNCTION__); -+ -+ /* Sanity check */ -+ if (crp == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ -+ crp->crp_etype = 0; -+ -+ if (crp->crp_desc == NULL || crp->crp_buf == NULL) { -+ dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__); -+ crp->crp_etype = EINVAL; -+ goto done; -+ } -+ -+ /* -+ * find the session we are using -+ */ -+ -+ lid = crp->crp_sid & 0xffffffff; -+ if (lid >= null_sesnum || lid == 0) { -+ crp->crp_etype = ENOENT; -+ dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__); -+ goto done; -+ } -+ -+done: -+ crypto_done(crp); -+ return 0; -+} -+ -+ -+/* -+ * our driver startup and shutdown routines -+ */ -+ -+static int -+null_init(void) -+{ -+ dprintk("%s(%p)\n", __FUNCTION__, null_init); -+ -+ memset(&nulldev, 0, sizeof(nulldev)); -+ softc_device_init(&nulldev, "ocfnull", 0, null_methods); -+ -+ null_id = crypto_get_driverid(softc_get_device(&nulldev), -+ CRYPTOCAP_F_HARDWARE); -+ if (null_id < 0) -+ panic("ocfnull: crypto device cannot initialize!"); -+ -+#define REGISTER(alg) \ -+ crypto_register(null_id,alg,0,0) -+ REGISTER(CRYPTO_DES_CBC); -+ REGISTER(CRYPTO_3DES_CBC); -+ REGISTER(CRYPTO_RIJNDAEL128_CBC); -+ REGISTER(CRYPTO_MD5); -+ REGISTER(CRYPTO_SHA1); -+ REGISTER(CRYPTO_MD5_HMAC); -+ REGISTER(CRYPTO_SHA1_HMAC); -+#undef REGISTER -+ -+ return 0; -+} -+ -+static void -+null_exit(void) -+{ -+ dprintk("%s()\n", __FUNCTION__); -+ crypto_unregister_all(null_id); -+ null_id = -1; -+} -+ -+module_init(null_init); -+module_exit(null_exit); -+ -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_AUTHOR("David McCullough <david_mccullough@mcafee.com>"); -+MODULE_DESCRIPTION("ocfnull - claims a lot but does nothing"); -diff --git a/crypto/ocf/pasemi/Makefile b/crypto/ocf/pasemi/Makefile -new file mode 100644 -index 0000000..b0a3980 ---- /dev/null -+++ b/crypto/ocf/pasemi/Makefile -@@ -0,0 +1,12 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+obj-$(CONFIG_OCF_PASEMI) += pasemi.o -+ -+obj ?= . -+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/ -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/pasemi/pasemi.c b/crypto/ocf/pasemi/pasemi.c -new file mode 100644 -index 0000000..c3bb931 ---- /dev/null -+++ b/crypto/ocf/pasemi/pasemi.c -@@ -0,0 +1,1009 @@ -+/* -+ * Copyright (C) 2007 PA Semi, Inc -+ * -+ * Driver for the PA Semi PWRficient DMA Crypto Engine -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/timer.h> -+#include <linux/random.h> -+#include <linux/skbuff.h> -+#include <asm/scatterlist.h> -+#include <linux/moduleparam.h> -+#include <linux/pci.h> -+#include <cryptodev.h> -+#include <uio.h> -+#include "pasemi_fnu.h" -+ -+#define DRV_NAME "pasemi" -+ -+#define TIMER_INTERVAL 1000 -+ -+static void __devexit pasemi_dma_remove(struct pci_dev *pdev); -+static struct pasdma_status volatile * dma_status; -+ -+static int debug; -+module_param(debug, int, 0644); -+MODULE_PARM_DESC(debug, "Enable debug"); -+ -+static void pasemi_desc_start(struct pasemi_desc *desc, u64 hdr) -+{ -+ desc->postop = 0; -+ desc->quad[0] = hdr; -+ desc->quad_cnt = 1; -+ desc->size = 1; -+} -+ -+static void pasemi_desc_build(struct pasemi_desc *desc, u64 val) -+{ -+ desc->quad[desc->quad_cnt++] = val; -+ desc->size = (desc->quad_cnt + 1) / 2; -+} -+ -+static void pasemi_desc_hdr(struct pasemi_desc *desc, u64 hdr) -+{ -+ desc->quad[0] |= hdr; -+} -+ -+static int pasemi_desc_size(struct pasemi_desc *desc) -+{ -+ return desc->size; -+} -+ -+static void pasemi_ring_add_desc( -+ struct pasemi_fnu_txring *ring, -+ struct pasemi_desc *desc, -+ struct cryptop *crp) { -+ int i; -+ int ring_index = 2 * (ring->next_to_fill & (TX_RING_SIZE-1)); -+ -+ TX_DESC_INFO(ring, ring->next_to_fill).desc_size = desc->size; -+ TX_DESC_INFO(ring, ring->next_to_fill).desc_postop = desc->postop; -+ TX_DESC_INFO(ring, ring->next_to_fill).cf_crp = crp; -+ -+ for (i = 0; i < desc->quad_cnt; i += 2) { -+ ring_index = 2 * (ring->next_to_fill & (TX_RING_SIZE-1)); -+ ring->desc[ring_index] = desc->quad[i]; -+ ring->desc[ring_index + 1] = desc->quad[i + 1]; -+ ring->next_to_fill++; -+ } -+ -+ if (desc->quad_cnt & 1) -+ ring->desc[ring_index + 1] = 0; -+} -+ -+static void pasemi_ring_incr(struct pasemi_softc *sc, int chan_index, int incr) -+{ -+ out_le32(sc->dma_regs + PAS_DMA_TXCHAN_INCR(sc->base_chan + chan_index), -+ incr); -+} -+ -+/* -+ * Generate a new software session. -+ */ -+static int -+pasemi_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri) -+{ -+ struct cryptoini *c, *encini = NULL, *macini = NULL; -+ struct pasemi_softc *sc = device_get_softc(dev); -+ struct pasemi_session *ses = NULL, **sespp; -+ int sesn, blksz = 0; -+ u64 ccmd = 0; -+ unsigned long flags; -+ struct pasemi_desc init_desc; -+ struct pasemi_fnu_txring *txring; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ if (sidp == NULL || cri == NULL || sc == NULL) { -+ DPRINTF("%s,%d - EINVAL\n", __FILE__, __LINE__); -+ return -EINVAL; -+ } -+ for (c = cri; c != NULL; c = c->cri_next) { -+ if (ALG_IS_SIG(c->cri_alg)) { -+ if (macini) -+ return -EINVAL; -+ macini = c; -+ } else if (ALG_IS_CIPHER(c->cri_alg)) { -+ if (encini) -+ return -EINVAL; -+ encini = c; -+ } else { -+ DPRINTF("UNKNOWN c->cri_alg %d\n", c->cri_alg); -+ return -EINVAL; -+ } -+ } -+ if (encini == NULL && macini == NULL) -+ return -EINVAL; -+ if (encini) { -+ /* validate key length */ -+ switch (encini->cri_alg) { -+ case CRYPTO_DES_CBC: -+ if (encini->cri_klen != 64) -+ return -EINVAL; -+ ccmd = DMA_CALGO_DES; -+ break; -+ case CRYPTO_3DES_CBC: -+ if (encini->cri_klen != 192) -+ return -EINVAL; -+ ccmd = DMA_CALGO_3DES; -+ break; -+ case CRYPTO_AES_CBC: -+ if (encini->cri_klen != 128 && -+ encini->cri_klen != 192 && -+ encini->cri_klen != 256) -+ return -EINVAL; -+ ccmd = DMA_CALGO_AES; -+ break; -+ case CRYPTO_ARC4: -+ if (encini->cri_klen != 128) -+ return -EINVAL; -+ ccmd = DMA_CALGO_ARC; -+ break; -+ default: -+ DPRINTF("UNKNOWN encini->cri_alg %d\n", -+ encini->cri_alg); -+ return -EINVAL; -+ } -+ } -+ -+ if (macini) { -+ switch (macini->cri_alg) { -+ case CRYPTO_MD5: -+ case CRYPTO_MD5_HMAC: -+ blksz = 16; -+ break; -+ case CRYPTO_SHA1: -+ case CRYPTO_SHA1_HMAC: -+ blksz = 20; -+ break; -+ default: -+ DPRINTF("UNKNOWN macini->cri_alg %d\n", -+ macini->cri_alg); -+ return -EINVAL; -+ } -+ if (((macini->cri_klen + 7) / 8) > blksz) { -+ DPRINTF("key length %d bigger than blksize %d not supported\n", -+ ((macini->cri_klen + 7) / 8), blksz); -+ return -EINVAL; -+ } -+ } -+ -+ for (sesn = 0; sesn < sc->sc_nsessions; sesn++) { -+ if (sc->sc_sessions[sesn] == NULL) { -+ sc->sc_sessions[sesn] = (struct pasemi_session *) -+ kzalloc(sizeof(struct pasemi_session), GFP_ATOMIC); -+ ses = sc->sc_sessions[sesn]; -+ break; -+ } else if (sc->sc_sessions[sesn]->used == 0) { -+ ses = sc->sc_sessions[sesn]; -+ break; -+ } -+ } -+ -+ if (ses == NULL) { -+ sespp = (struct pasemi_session **) -+ kzalloc(sc->sc_nsessions * 2 * -+ sizeof(struct pasemi_session *), GFP_ATOMIC); -+ if (sespp == NULL) -+ return -ENOMEM; -+ memcpy(sespp, sc->sc_sessions, -+ sc->sc_nsessions * sizeof(struct pasemi_session *)); -+ kfree(sc->sc_sessions); -+ sc->sc_sessions = sespp; -+ sesn = sc->sc_nsessions; -+ ses = sc->sc_sessions[sesn] = (struct pasemi_session *) -+ kzalloc(sizeof(struct pasemi_session), GFP_ATOMIC); -+ if (ses == NULL) -+ return -ENOMEM; -+ sc->sc_nsessions *= 2; -+ } -+ -+ ses->used = 1; -+ -+ ses->dma_addr = pci_map_single(sc->dma_pdev, (void *) ses->civ, -+ sizeof(struct pasemi_session), DMA_TO_DEVICE); -+ -+ /* enter the channel scheduler */ -+ spin_lock_irqsave(&sc->sc_chnlock, flags); -+ -+ /* ARC4 has to be processed by the even channel */ -+ if (encini && (encini->cri_alg == CRYPTO_ARC4)) -+ ses->chan = sc->sc_lastchn & ~1; -+ else -+ ses->chan = sc->sc_lastchn; -+ sc->sc_lastchn = (sc->sc_lastchn + 1) % sc->sc_num_channels; -+ -+ spin_unlock_irqrestore(&sc->sc_chnlock, flags); -+ -+ txring = &sc->tx[ses->chan]; -+ -+ if (encini) { -+ ses->ccmd = ccmd; -+ -+ /* get an IV */ -+ /* XXX may read fewer than requested */ -+ get_random_bytes(ses->civ, sizeof(ses->civ)); -+ -+ ses->keysz = (encini->cri_klen - 63) / 64; -+ memcpy(ses->key, encini->cri_key, (ses->keysz + 1) * 8); -+ -+ pasemi_desc_start(&init_desc, -+ XCT_CTRL_HDR(ses->chan, (encini && macini) ? 0x68 : 0x40, DMA_FN_CIV0)); -+ pasemi_desc_build(&init_desc, -+ XCT_FUN_SRC_PTR((encini && macini) ? 0x68 : 0x40, ses->dma_addr)); -+ } -+ if (macini) { -+ if (macini->cri_alg == CRYPTO_MD5_HMAC || -+ macini->cri_alg == CRYPTO_SHA1_HMAC) -+ memcpy(ses->hkey, macini->cri_key, blksz); -+ else { -+ /* Load initialization constants(RFC 1321, 3174) */ -+ ses->hiv[0] = 0x67452301efcdab89ULL; -+ ses->hiv[1] = 0x98badcfe10325476ULL; -+ ses->hiv[2] = 0xc3d2e1f000000000ULL; -+ } -+ ses->hseq = 0ULL; -+ } -+ -+ spin_lock_irqsave(&txring->fill_lock, flags); -+ -+ if (((txring->next_to_fill + pasemi_desc_size(&init_desc)) - -+ txring->next_to_clean) > TX_RING_SIZE) { -+ spin_unlock_irqrestore(&txring->fill_lock, flags); -+ return ERESTART; -+ } -+ -+ if (encini) { -+ pasemi_ring_add_desc(txring, &init_desc, NULL); -+ pasemi_ring_incr(sc, ses->chan, -+ pasemi_desc_size(&init_desc)); -+ } -+ -+ txring->sesn = sesn; -+ spin_unlock_irqrestore(&txring->fill_lock, flags); -+ -+ *sidp = PASEMI_SID(sesn); -+ return 0; -+} -+ -+/* -+ * Deallocate a session. -+ */ -+static int -+pasemi_freesession(device_t dev, u_int64_t tid) -+{ -+ struct pasemi_softc *sc = device_get_softc(dev); -+ int session; -+ u_int32_t sid = ((u_int32_t) tid) & 0xffffffff; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (sc == NULL) -+ return -EINVAL; -+ session = PASEMI_SESSION(sid); -+ if (session >= sc->sc_nsessions || !sc->sc_sessions[session]) -+ return -EINVAL; -+ -+ pci_unmap_single(sc->dma_pdev, -+ sc->sc_sessions[session]->dma_addr, -+ sizeof(struct pasemi_session), DMA_TO_DEVICE); -+ memset(sc->sc_sessions[session], 0, -+ sizeof(struct pasemi_session)); -+ -+ return 0; -+} -+ -+static int -+pasemi_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ -+ int err = 0, ivsize, srclen = 0, reinit = 0, reinit_size = 0, chsel; -+ struct pasemi_softc *sc = device_get_softc(dev); -+ struct cryptodesc *crd1, *crd2, *maccrd, *enccrd; -+ caddr_t ivp; -+ struct pasemi_desc init_desc, work_desc; -+ struct pasemi_session *ses; -+ struct sk_buff *skb; -+ struct uio *uiop; -+ unsigned long flags; -+ struct pasemi_fnu_txring *txring; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (crp == NULL || crp->crp_callback == NULL || sc == NULL) -+ return -EINVAL; -+ -+ crp->crp_etype = 0; -+ if (PASEMI_SESSION(crp->crp_sid) >= sc->sc_nsessions) -+ return -EINVAL; -+ -+ ses = sc->sc_sessions[PASEMI_SESSION(crp->crp_sid)]; -+ -+ crd1 = crp->crp_desc; -+ if (crd1 == NULL) { -+ err = -EINVAL; -+ goto errout; -+ } -+ crd2 = crd1->crd_next; -+ -+ if (ALG_IS_SIG(crd1->crd_alg)) { -+ maccrd = crd1; -+ if (crd2 == NULL) -+ enccrd = NULL; -+ else if (ALG_IS_CIPHER(crd2->crd_alg) && -+ (crd2->crd_flags & CRD_F_ENCRYPT) == 0) -+ enccrd = crd2; -+ else -+ goto erralg; -+ } else if (ALG_IS_CIPHER(crd1->crd_alg)) { -+ enccrd = crd1; -+ if (crd2 == NULL) -+ maccrd = NULL; -+ else if (ALG_IS_SIG(crd2->crd_alg) && -+ (crd1->crd_flags & CRD_F_ENCRYPT)) -+ maccrd = crd2; -+ else -+ goto erralg; -+ } else -+ goto erralg; -+ -+ chsel = ses->chan; -+ -+ txring = &sc->tx[chsel]; -+ -+ if (enccrd && !maccrd) { -+ if (enccrd->crd_alg == CRYPTO_ARC4) -+ reinit = 1; -+ reinit_size = 0x40; -+ srclen = crp->crp_ilen; -+ -+ pasemi_desc_start(&work_desc, XCT_FUN_O | XCT_FUN_I -+ | XCT_FUN_FUN(chsel)); -+ if (enccrd->crd_flags & CRD_F_ENCRYPT) -+ pasemi_desc_hdr(&work_desc, XCT_FUN_CRM_ENC); -+ else -+ pasemi_desc_hdr(&work_desc, XCT_FUN_CRM_DEC); -+ } else if (enccrd && maccrd) { -+ if (enccrd->crd_alg == CRYPTO_ARC4) -+ reinit = 1; -+ reinit_size = 0x68; -+ -+ if (enccrd->crd_flags & CRD_F_ENCRYPT) { -+ /* Encrypt -> Authenticate */ -+ pasemi_desc_start(&work_desc, XCT_FUN_O | XCT_FUN_I | XCT_FUN_CRM_ENC_SIG -+ | XCT_FUN_A | XCT_FUN_FUN(chsel)); -+ srclen = maccrd->crd_skip + maccrd->crd_len; -+ } else { -+ /* Authenticate -> Decrypt */ -+ pasemi_desc_start(&work_desc, XCT_FUN_O | XCT_FUN_I | XCT_FUN_CRM_SIG_DEC -+ | XCT_FUN_24BRES | XCT_FUN_FUN(chsel)); -+ pasemi_desc_build(&work_desc, 0); -+ pasemi_desc_build(&work_desc, 0); -+ pasemi_desc_build(&work_desc, 0); -+ work_desc.postop = PASEMI_CHECK_SIG; -+ srclen = crp->crp_ilen; -+ } -+ -+ pasemi_desc_hdr(&work_desc, XCT_FUN_SHL(maccrd->crd_skip / 4)); -+ pasemi_desc_hdr(&work_desc, XCT_FUN_CHL(enccrd->crd_skip - maccrd->crd_skip)); -+ } else if (!enccrd && maccrd) { -+ srclen = maccrd->crd_len; -+ -+ pasemi_desc_start(&init_desc, -+ XCT_CTRL_HDR(chsel, 0x58, DMA_FN_HKEY0)); -+ pasemi_desc_build(&init_desc, -+ XCT_FUN_SRC_PTR(0x58, ((struct pasemi_session *)ses->dma_addr)->hkey)); -+ -+ pasemi_desc_start(&work_desc, XCT_FUN_O | XCT_FUN_I | XCT_FUN_CRM_SIG -+ | XCT_FUN_A | XCT_FUN_FUN(chsel)); -+ } -+ -+ if (enccrd) { -+ switch (enccrd->crd_alg) { -+ case CRYPTO_3DES_CBC: -+ pasemi_desc_hdr(&work_desc, XCT_FUN_ALG_3DES | -+ XCT_FUN_BCM_CBC); -+ ivsize = sizeof(u64); -+ break; -+ case CRYPTO_DES_CBC: -+ pasemi_desc_hdr(&work_desc, XCT_FUN_ALG_DES | -+ XCT_FUN_BCM_CBC); -+ ivsize = sizeof(u64); -+ break; -+ case CRYPTO_AES_CBC: -+ pasemi_desc_hdr(&work_desc, XCT_FUN_ALG_AES | -+ XCT_FUN_BCM_CBC); -+ ivsize = 2 * sizeof(u64); -+ break; -+ case CRYPTO_ARC4: -+ pasemi_desc_hdr(&work_desc, XCT_FUN_ALG_ARC); -+ ivsize = 0; -+ break; -+ default: -+ printk(DRV_NAME ": unimplemented enccrd->crd_alg %d\n", -+ enccrd->crd_alg); -+ err = -EINVAL; -+ goto errout; -+ } -+ -+ ivp = (ivsize == sizeof(u64)) ? (caddr_t) &ses->civ[1] : (caddr_t) &ses->civ[0]; -+ if (enccrd->crd_flags & CRD_F_ENCRYPT) { -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) -+ memcpy(ivp, enccrd->crd_iv, ivsize); -+ /* If IV is not present in the buffer already, it has to be copied there */ -+ if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0) -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ enccrd->crd_inject, ivsize, ivp); -+ } else { -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) -+ /* IV is provided expicitly in descriptor */ -+ memcpy(ivp, enccrd->crd_iv, ivsize); -+ else -+ /* IV is provided in the packet */ -+ crypto_copydata(crp->crp_flags, crp->crp_buf, -+ enccrd->crd_inject, ivsize, -+ ivp); -+ } -+ } -+ -+ if (maccrd) { -+ switch (maccrd->crd_alg) { -+ case CRYPTO_MD5: -+ pasemi_desc_hdr(&work_desc, XCT_FUN_SIG_MD5 | -+ XCT_FUN_HSZ((crp->crp_ilen - maccrd->crd_inject) / 4)); -+ break; -+ case CRYPTO_SHA1: -+ pasemi_desc_hdr(&work_desc, XCT_FUN_SIG_SHA1 | -+ XCT_FUN_HSZ((crp->crp_ilen - maccrd->crd_inject) / 4)); -+ break; -+ case CRYPTO_MD5_HMAC: -+ pasemi_desc_hdr(&work_desc, XCT_FUN_SIG_HMAC_MD5 | -+ XCT_FUN_HSZ((crp->crp_ilen - maccrd->crd_inject) / 4)); -+ break; -+ case CRYPTO_SHA1_HMAC: -+ pasemi_desc_hdr(&work_desc, XCT_FUN_SIG_HMAC_SHA1 | -+ XCT_FUN_HSZ((crp->crp_ilen - maccrd->crd_inject) / 4)); -+ break; -+ default: -+ printk(DRV_NAME ": unimplemented maccrd->crd_alg %d\n", -+ maccrd->crd_alg); -+ err = -EINVAL; -+ goto errout; -+ } -+ } -+ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ /* using SKB buffers */ -+ skb = (struct sk_buff *)crp->crp_buf; -+ if (skb_shinfo(skb)->nr_frags) { -+ printk(DRV_NAME ": skb frags unimplemented\n"); -+ err = -EINVAL; -+ goto errout; -+ } -+ pasemi_desc_build( -+ &work_desc, -+ XCT_FUN_DST_PTR(skb->len, pci_map_single( -+ sc->dma_pdev, skb->data, -+ skb->len, DMA_TO_DEVICE))); -+ pasemi_desc_build( -+ &work_desc, -+ XCT_FUN_SRC_PTR( -+ srclen, pci_map_single( -+ sc->dma_pdev, skb->data, -+ srclen, DMA_TO_DEVICE))); -+ pasemi_desc_hdr(&work_desc, XCT_FUN_LLEN(srclen)); -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ /* using IOV buffers */ -+ uiop = (struct uio *)crp->crp_buf; -+ if (uiop->uio_iovcnt > 1) { -+ printk(DRV_NAME ": iov frags unimplemented\n"); -+ err = -EINVAL; -+ goto errout; -+ } -+ -+ /* crp_olen is never set; always use crp_ilen */ -+ pasemi_desc_build( -+ &work_desc, -+ XCT_FUN_DST_PTR(crp->crp_ilen, pci_map_single( -+ sc->dma_pdev, -+ uiop->uio_iov->iov_base, -+ crp->crp_ilen, DMA_TO_DEVICE))); -+ pasemi_desc_hdr(&work_desc, XCT_FUN_LLEN(srclen)); -+ -+ pasemi_desc_build( -+ &work_desc, -+ XCT_FUN_SRC_PTR(srclen, pci_map_single( -+ sc->dma_pdev, -+ uiop->uio_iov->iov_base, -+ srclen, DMA_TO_DEVICE))); -+ } else { -+ /* using contig buffers */ -+ pasemi_desc_build( -+ &work_desc, -+ XCT_FUN_DST_PTR(crp->crp_ilen, pci_map_single( -+ sc->dma_pdev, -+ crp->crp_buf, -+ crp->crp_ilen, DMA_TO_DEVICE))); -+ pasemi_desc_build( -+ &work_desc, -+ XCT_FUN_SRC_PTR(srclen, pci_map_single( -+ sc->dma_pdev, -+ crp->crp_buf, srclen, -+ DMA_TO_DEVICE))); -+ pasemi_desc_hdr(&work_desc, XCT_FUN_LLEN(srclen)); -+ } -+ -+ spin_lock_irqsave(&txring->fill_lock, flags); -+ -+ if (txring->sesn != PASEMI_SESSION(crp->crp_sid)) { -+ txring->sesn = PASEMI_SESSION(crp->crp_sid); -+ reinit = 1; -+ } -+ -+ if (enccrd) { -+ pasemi_desc_start(&init_desc, -+ XCT_CTRL_HDR(chsel, reinit ? reinit_size : 0x10, DMA_FN_CIV0)); -+ pasemi_desc_build(&init_desc, -+ XCT_FUN_SRC_PTR(reinit ? reinit_size : 0x10, ses->dma_addr)); -+ } -+ -+ if (((txring->next_to_fill + pasemi_desc_size(&init_desc) + -+ pasemi_desc_size(&work_desc)) - -+ txring->next_to_clean) > TX_RING_SIZE) { -+ spin_unlock_irqrestore(&txring->fill_lock, flags); -+ err = ERESTART; -+ goto errout; -+ } -+ -+ pasemi_ring_add_desc(txring, &init_desc, NULL); -+ pasemi_ring_add_desc(txring, &work_desc, crp); -+ -+ pasemi_ring_incr(sc, chsel, -+ pasemi_desc_size(&init_desc) + -+ pasemi_desc_size(&work_desc)); -+ -+ spin_unlock_irqrestore(&txring->fill_lock, flags); -+ -+ mod_timer(&txring->crypto_timer, jiffies + TIMER_INTERVAL); -+ -+ return 0; -+ -+erralg: -+ printk(DRV_NAME ": unsupported algorithm or algorithm order alg1 %d alg2 %d\n", -+ crd1->crd_alg, crd2->crd_alg); -+ err = -EINVAL; -+ -+errout: -+ if (err != ERESTART) { -+ crp->crp_etype = err; -+ crypto_done(crp); -+ } -+ return err; -+} -+ -+static int pasemi_clean_tx(struct pasemi_softc *sc, int chan) -+{ -+ int i, j, ring_idx; -+ struct pasemi_fnu_txring *ring = &sc->tx[chan]; -+ u16 delta_cnt; -+ int flags, loops = 10; -+ int desc_size; -+ struct cryptop *crp; -+ -+ spin_lock_irqsave(&ring->clean_lock, flags); -+ -+ while ((delta_cnt = (dma_status->tx_sta[sc->base_chan + chan] -+ & PAS_STATUS_PCNT_M) - ring->total_pktcnt) -+ && loops--) { -+ -+ for (i = 0; i < delta_cnt; i++) { -+ desc_size = TX_DESC_INFO(ring, ring->next_to_clean).desc_size; -+ crp = TX_DESC_INFO(ring, ring->next_to_clean).cf_crp; -+ if (crp) { -+ ring_idx = 2 * (ring->next_to_clean & (TX_RING_SIZE-1)); -+ if (TX_DESC_INFO(ring, ring->next_to_clean).desc_postop & PASEMI_CHECK_SIG) { -+ /* Need to make sure signature matched, -+ * if not - return error */ -+ if (!(ring->desc[ring_idx + 1] & (1ULL << 63))) -+ crp->crp_etype = -EINVAL; -+ } -+ crypto_done(TX_DESC_INFO(ring, -+ ring->next_to_clean).cf_crp); -+ TX_DESC_INFO(ring, ring->next_to_clean).cf_crp = NULL; -+ pci_unmap_single( -+ sc->dma_pdev, -+ XCT_PTR_ADDR_LEN(ring->desc[ring_idx + 1]), -+ PCI_DMA_TODEVICE); -+ -+ ring->desc[ring_idx] = ring->desc[ring_idx + 1] = 0; -+ -+ ring->next_to_clean++; -+ for (j = 1; j < desc_size; j++) { -+ ring_idx = 2 * -+ (ring->next_to_clean & -+ (TX_RING_SIZE-1)); -+ pci_unmap_single( -+ sc->dma_pdev, -+ XCT_PTR_ADDR_LEN(ring->desc[ring_idx]), -+ PCI_DMA_TODEVICE); -+ if (ring->desc[ring_idx + 1]) -+ pci_unmap_single( -+ sc->dma_pdev, -+ XCT_PTR_ADDR_LEN( -+ ring->desc[ -+ ring_idx + 1]), -+ PCI_DMA_TODEVICE); -+ ring->desc[ring_idx] = -+ ring->desc[ring_idx + 1] = 0; -+ ring->next_to_clean++; -+ } -+ } else { -+ for (j = 0; j < desc_size; j++) { -+ ring_idx = 2 * (ring->next_to_clean & (TX_RING_SIZE-1)); -+ ring->desc[ring_idx] = -+ ring->desc[ring_idx + 1] = 0; -+ ring->next_to_clean++; -+ } -+ } -+ } -+ -+ ring->total_pktcnt += delta_cnt; -+ } -+ spin_unlock_irqrestore(&ring->clean_lock, flags); -+ -+ return 0; -+} -+ -+static void sweepup_tx(struct pasemi_softc *sc) -+{ -+ int i; -+ -+ for (i = 0; i < sc->sc_num_channels; i++) -+ pasemi_clean_tx(sc, i); -+} -+ -+static irqreturn_t pasemi_intr(int irq, void *arg, struct pt_regs *regs) -+{ -+ struct pasemi_softc *sc = arg; -+ unsigned int reg; -+ int chan = irq - sc->base_irq; -+ int chan_index = sc->base_chan + chan; -+ u64 stat = dma_status->tx_sta[chan_index]; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (!(stat & PAS_STATUS_CAUSE_M)) -+ return IRQ_NONE; -+ -+ pasemi_clean_tx(sc, chan); -+ -+ stat = dma_status->tx_sta[chan_index]; -+ -+ reg = PAS_IOB_DMA_TXCH_RESET_PINTC | -+ PAS_IOB_DMA_TXCH_RESET_PCNT(sc->tx[chan].total_pktcnt); -+ -+ if (stat & PAS_STATUS_SOFT) -+ reg |= PAS_IOB_DMA_RXCH_RESET_SINTC; -+ -+ out_le32(sc->iob_regs + PAS_IOB_DMA_TXCH_RESET(chan_index), reg); -+ -+ -+ return IRQ_HANDLED; -+} -+ -+static int pasemi_dma_setup_tx_resources(struct pasemi_softc *sc, int chan) -+{ -+ u32 val; -+ int chan_index = chan + sc->base_chan; -+ int ret; -+ struct pasemi_fnu_txring *ring; -+ -+ ring = &sc->tx[chan]; -+ -+ spin_lock_init(&ring->fill_lock); -+ spin_lock_init(&ring->clean_lock); -+ -+ ring->desc_info = kzalloc(sizeof(struct pasemi_desc_info) * -+ TX_RING_SIZE, GFP_KERNEL); -+ if (!ring->desc_info) -+ return -ENOMEM; -+ -+ /* Allocate descriptors */ -+ ring->desc = dma_alloc_coherent(&sc->dma_pdev->dev, -+ TX_RING_SIZE * -+ 2 * sizeof(u64), -+ &ring->dma, GFP_KERNEL); -+ if (!ring->desc) -+ return -ENOMEM; -+ -+ memset((void *) ring->desc, 0, TX_RING_SIZE * 2 * sizeof(u64)); -+ -+ out_le32(sc->iob_regs + PAS_IOB_DMA_TXCH_RESET(chan_index), 0x30); -+ -+ ring->total_pktcnt = 0; -+ -+ out_le32(sc->dma_regs + PAS_DMA_TXCHAN_BASEL(chan_index), -+ PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma)); -+ -+ val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32); -+ val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2); -+ -+ out_le32(sc->dma_regs + PAS_DMA_TXCHAN_BASEU(chan_index), val); -+ -+ out_le32(sc->dma_regs + PAS_DMA_TXCHAN_CFG(chan_index), -+ PAS_DMA_TXCHAN_CFG_TY_FUNC | -+ PAS_DMA_TXCHAN_CFG_TATTR(chan) | -+ PAS_DMA_TXCHAN_CFG_WT(2)); -+ -+ /* enable tx channel */ -+ out_le32(sc->dma_regs + -+ PAS_DMA_TXCHAN_TCMDSTA(chan_index), -+ PAS_DMA_TXCHAN_TCMDSTA_EN); -+ -+ out_le32(sc->iob_regs + PAS_IOB_DMA_TXCH_CFG(chan_index), -+ PAS_IOB_DMA_TXCH_CFG_CNTTH(1000)); -+ -+ ring->next_to_fill = 0; -+ ring->next_to_clean = 0; -+ -+ snprintf(ring->irq_name, sizeof(ring->irq_name), -+ "%s%d", "crypto", chan); -+ -+ ring->irq = irq_create_mapping(NULL, sc->base_irq + chan); -+ ret = request_irq(ring->irq, (irq_handler_t) -+ pasemi_intr, IRQF_DISABLED, ring->irq_name, sc); -+ if (ret) { -+ printk(KERN_ERR DRV_NAME ": failed to hook irq %d ret %d\n", -+ ring->irq, ret); -+ ring->irq = -1; -+ return ret; -+ } -+ -+ setup_timer(&ring->crypto_timer, (void *) sweepup_tx, (unsigned long) sc); -+ -+ return 0; -+} -+ -+static device_method_t pasemi_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, pasemi_newsession), -+ DEVMETHOD(cryptodev_freesession, pasemi_freesession), -+ DEVMETHOD(cryptodev_process, pasemi_process), -+}; -+ -+/* Set up the crypto device structure, private data, -+ * and anything else we need before we start */ -+ -+static int __devinit -+pasemi_dma_probe(struct pci_dev *pdev, const struct pci_device_id *ent) -+{ -+ struct pasemi_softc *sc; -+ int ret, i; -+ -+ DPRINTF(KERN_ERR "%s()\n", __FUNCTION__); -+ -+ sc = kzalloc(sizeof(*sc), GFP_KERNEL); -+ if (!sc) -+ return -ENOMEM; -+ -+ softc_device_init(sc, DRV_NAME, 1, pasemi_methods); -+ -+ pci_set_drvdata(pdev, sc); -+ -+ spin_lock_init(&sc->sc_chnlock); -+ -+ sc->sc_sessions = (struct pasemi_session **) -+ kzalloc(PASEMI_INITIAL_SESSIONS * -+ sizeof(struct pasemi_session *), GFP_ATOMIC); -+ if (sc->sc_sessions == NULL) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ sc->sc_nsessions = PASEMI_INITIAL_SESSIONS; -+ sc->sc_lastchn = 0; -+ sc->base_irq = pdev->irq + 6; -+ sc->base_chan = 6; -+ sc->sc_cid = -1; -+ sc->dma_pdev = pdev; -+ -+ sc->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL); -+ if (!sc->iob_pdev) { -+ dev_err(&pdev->dev, "Can't find I/O Bridge\n"); -+ ret = -ENODEV; -+ goto out; -+ } -+ -+ /* This is hardcoded and ugly, but we have some firmware versions -+ * who don't provide the register space in the device tree. Luckily -+ * they are at well-known locations so we can just do the math here. -+ */ -+ sc->dma_regs = -+ ioremap(0xe0000000 + (sc->dma_pdev->devfn << 12), 0x2000); -+ sc->iob_regs = -+ ioremap(0xe0000000 + (sc->iob_pdev->devfn << 12), 0x2000); -+ if (!sc->dma_regs || !sc->iob_regs) { -+ dev_err(&pdev->dev, "Can't map registers\n"); -+ ret = -ENODEV; -+ goto out; -+ } -+ -+ dma_status = __ioremap(0xfd800000, 0x1000, 0); -+ if (!dma_status) { -+ ret = -ENODEV; -+ dev_err(&pdev->dev, "Can't map dmastatus space\n"); -+ goto out; -+ } -+ -+ sc->tx = (struct pasemi_fnu_txring *) -+ kzalloc(sizeof(struct pasemi_fnu_txring) -+ * 8, GFP_KERNEL); -+ if (!sc->tx) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ /* Initialize the h/w */ -+ out_le32(sc->dma_regs + PAS_DMA_COM_CFG, -+ (in_le32(sc->dma_regs + PAS_DMA_COM_CFG) | -+ PAS_DMA_COM_CFG_FWF)); -+ out_le32(sc->dma_regs + PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN); -+ -+ for (i = 0; i < PASEMI_FNU_CHANNELS; i++) { -+ sc->sc_num_channels++; -+ ret = pasemi_dma_setup_tx_resources(sc, i); -+ if (ret) -+ goto out; -+ } -+ -+ sc->sc_cid = crypto_get_driverid(softc_get_device(sc), -+ CRYPTOCAP_F_HARDWARE); -+ if (sc->sc_cid < 0) { -+ printk(KERN_ERR DRV_NAME ": could not get crypto driver id\n"); -+ ret = -ENXIO; -+ goto out; -+ } -+ -+ /* register algorithms with the framework */ -+ printk(DRV_NAME ":"); -+ -+ crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_ARC4, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0); -+ -+ return 0; -+ -+out: -+ pasemi_dma_remove(pdev); -+ return ret; -+} -+ -+#define MAX_RETRIES 5000 -+ -+static void pasemi_free_tx_resources(struct pasemi_softc *sc, int chan) -+{ -+ struct pasemi_fnu_txring *ring = &sc->tx[chan]; -+ int chan_index = chan + sc->base_chan; -+ int retries; -+ u32 stat; -+ -+ /* Stop the channel */ -+ out_le32(sc->dma_regs + -+ PAS_DMA_TXCHAN_TCMDSTA(chan_index), -+ PAS_DMA_TXCHAN_TCMDSTA_ST); -+ -+ for (retries = 0; retries < MAX_RETRIES; retries++) { -+ stat = in_le32(sc->dma_regs + -+ PAS_DMA_TXCHAN_TCMDSTA(chan_index)); -+ if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)) -+ break; -+ cond_resched(); -+ } -+ -+ if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT) -+ dev_err(&sc->dma_pdev->dev, "Failed to stop tx channel %d\n", -+ chan_index); -+ -+ /* Disable the channel */ -+ out_le32(sc->dma_regs + -+ PAS_DMA_TXCHAN_TCMDSTA(chan_index), -+ 0); -+ -+ if (ring->desc_info) -+ kfree((void *) ring->desc_info); -+ if (ring->desc) -+ dma_free_coherent(&sc->dma_pdev->dev, -+ TX_RING_SIZE * -+ 2 * sizeof(u64), -+ (void *) ring->desc, ring->dma); -+ if (ring->irq != -1) -+ free_irq(ring->irq, sc); -+ -+ del_timer(&ring->crypto_timer); -+} -+ -+static void __devexit pasemi_dma_remove(struct pci_dev *pdev) -+{ -+ struct pasemi_softc *sc = pci_get_drvdata(pdev); -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (sc->sc_cid >= 0) { -+ crypto_unregister_all(sc->sc_cid); -+ } -+ -+ if (sc->tx) { -+ for (i = 0; i < sc->sc_num_channels; i++) -+ pasemi_free_tx_resources(sc, i); -+ -+ kfree(sc->tx); -+ } -+ if (sc->sc_sessions) { -+ for (i = 0; i < sc->sc_nsessions; i++) -+ kfree(sc->sc_sessions[i]); -+ kfree(sc->sc_sessions); -+ } -+ if (sc->iob_pdev) -+ pci_dev_put(sc->iob_pdev); -+ if (sc->dma_regs) -+ iounmap(sc->dma_regs); -+ if (sc->iob_regs) -+ iounmap(sc->iob_regs); -+ kfree(sc); -+} -+ -+static struct pci_device_id pasemi_dma_pci_tbl[] = { -+ { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa007) }, -+}; -+ -+MODULE_DEVICE_TABLE(pci, pasemi_dma_pci_tbl); -+ -+static struct pci_driver pasemi_dma_driver = { -+ .name = "pasemi_dma", -+ .id_table = pasemi_dma_pci_tbl, -+ .probe = pasemi_dma_probe, -+ .remove = __devexit_p(pasemi_dma_remove), -+}; -+ -+static void __exit pasemi_dma_cleanup_module(void) -+{ -+ pci_unregister_driver(&pasemi_dma_driver); -+ __iounmap(dma_status); -+ dma_status = NULL; -+} -+ -+int pasemi_dma_init_module(void) -+{ -+ return pci_register_driver(&pasemi_dma_driver); -+} -+ -+module_init(pasemi_dma_init_module); -+module_exit(pasemi_dma_cleanup_module); -+ -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_AUTHOR("Egor Martovetsky egor@pasemi.com"); -+MODULE_DESCRIPTION("OCF driver for PA Semi PWRficient DMA Crypto Engine"); -diff --git a/crypto/ocf/pasemi/pasemi_fnu.h b/crypto/ocf/pasemi/pasemi_fnu.h -new file mode 100644 -index 0000000..1a0dcc8 ---- /dev/null -+++ b/crypto/ocf/pasemi/pasemi_fnu.h -@@ -0,0 +1,410 @@ -+/* -+ * Copyright (C) 2007 PA Semi, Inc -+ * -+ * Driver for the PA Semi PWRficient DMA Crypto Engine, soft state and -+ * hardware register layouts. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+ -+#ifndef PASEMI_FNU_H -+#define PASEMI_FNU_H -+ -+#include <linux/spinlock.h> -+ -+#define PASEMI_SESSION(sid) ((sid) & 0xffffffff) -+#define PASEMI_SID(sesn) ((sesn) & 0xffffffff) -+#define DPRINTF(a...) if (debug) { printk(DRV_NAME ": " a); } -+ -+/* Must be a power of two */ -+#define RX_RING_SIZE 512 -+#define TX_RING_SIZE 512 -+#define TX_DESC(ring, num) ((ring)->desc[2 * (num & (TX_RING_SIZE-1))]) -+#define TX_DESC_INFO(ring, num) ((ring)->desc_info[(num) & (TX_RING_SIZE-1)]) -+#define MAX_DESC_SIZE 8 -+#define PASEMI_INITIAL_SESSIONS 10 -+#define PASEMI_FNU_CHANNELS 8 -+ -+/* DMA descriptor */ -+struct pasemi_desc { -+ u64 quad[2*MAX_DESC_SIZE]; -+ int quad_cnt; -+ int size; -+ int postop; -+}; -+ -+/* -+ * Holds per descriptor data -+ */ -+struct pasemi_desc_info { -+ int desc_size; -+ int desc_postop; -+#define PASEMI_CHECK_SIG 0x1 -+ -+ struct cryptop *cf_crp; -+}; -+ -+/* -+ * Holds per channel data -+ */ -+struct pasemi_fnu_txring { -+ volatile u64 *desc; -+ volatile struct -+ pasemi_desc_info *desc_info; -+ dma_addr_t dma; -+ struct timer_list crypto_timer; -+ spinlock_t fill_lock; -+ spinlock_t clean_lock; -+ unsigned int next_to_fill; -+ unsigned int next_to_clean; -+ u16 total_pktcnt; -+ int irq; -+ int sesn; -+ char irq_name[10]; -+}; -+ -+/* -+ * Holds data specific to a single pasemi device. -+ */ -+struct pasemi_softc { -+ softc_device_decl sc_cdev; -+ struct pci_dev *dma_pdev; /* device backpointer */ -+ struct pci_dev *iob_pdev; /* device backpointer */ -+ void __iomem *dma_regs; -+ void __iomem *iob_regs; -+ int base_irq; -+ int base_chan; -+ int32_t sc_cid; /* crypto tag */ -+ int sc_nsessions; -+ struct pasemi_session **sc_sessions; -+ int sc_num_channels;/* number of crypto channels */ -+ -+ /* pointer to the array of txring datastructures, one txring per channel */ -+ struct pasemi_fnu_txring *tx; -+ -+ /* -+ * mutual exclusion for the channel scheduler -+ */ -+ spinlock_t sc_chnlock; -+ /* last channel used, for now use round-robin to allocate channels */ -+ int sc_lastchn; -+}; -+ -+struct pasemi_session { -+ u64 civ[2]; -+ u64 keysz; -+ u64 key[4]; -+ u64 ccmd; -+ u64 hkey[4]; -+ u64 hseq; -+ u64 giv[2]; -+ u64 hiv[4]; -+ -+ int used; -+ dma_addr_t dma_addr; -+ int chan; -+}; -+ -+/* status register layout in IOB region, at 0xfd800000 */ -+struct pasdma_status { -+ u64 rx_sta[64]; -+ u64 tx_sta[20]; -+}; -+ -+#define ALG_IS_CIPHER(alg) ((alg == CRYPTO_DES_CBC) || \ -+ (alg == CRYPTO_3DES_CBC) || \ -+ (alg == CRYPTO_AES_CBC) || \ -+ (alg == CRYPTO_ARC4) || \ -+ (alg == CRYPTO_NULL_CBC)) -+ -+#define ALG_IS_SIG(alg) ((alg == CRYPTO_MD5) || \ -+ (alg == CRYPTO_MD5_HMAC) || \ -+ (alg == CRYPTO_SHA1) || \ -+ (alg == CRYPTO_SHA1_HMAC) || \ -+ (alg == CRYPTO_NULL_HMAC)) -+ -+enum { -+ PAS_DMA_COM_TXCMD = 0x100, /* Transmit Command Register */ -+ PAS_DMA_COM_TXSTA = 0x104, /* Transmit Status Register */ -+ PAS_DMA_COM_RXCMD = 0x108, /* Receive Command Register */ -+ PAS_DMA_COM_RXSTA = 0x10c, /* Receive Status Register */ -+ PAS_DMA_COM_CFG = 0x114, /* DMA Configuration Register */ -+}; -+ -+/* All these registers live in the PCI configuration space for the DMA PCI -+ * device. Use the normal PCI config access functions for them. -+ */ -+ -+#define PAS_DMA_COM_CFG_FWF 0x18000000 -+ -+#define PAS_DMA_COM_TXCMD_EN 0x00000001 /* enable */ -+#define PAS_DMA_COM_TXSTA_ACT 0x00000001 /* active */ -+#define PAS_DMA_COM_RXCMD_EN 0x00000001 /* enable */ -+#define PAS_DMA_COM_RXSTA_ACT 0x00000001 /* active */ -+ -+#define _PAS_DMA_TXCHAN_STRIDE 0x20 /* Size per channel */ -+#define _PAS_DMA_TXCHAN_TCMDSTA 0x300 /* Command / Status */ -+#define _PAS_DMA_TXCHAN_CFG 0x304 /* Configuration */ -+#define _PAS_DMA_TXCHAN_DSCRBU 0x308 /* Descriptor BU Allocation */ -+#define _PAS_DMA_TXCHAN_INCR 0x310 /* Descriptor increment */ -+#define _PAS_DMA_TXCHAN_CNT 0x314 /* Descriptor count/offset */ -+#define _PAS_DMA_TXCHAN_BASEL 0x318 /* Descriptor ring base (low) */ -+#define _PAS_DMA_TXCHAN_BASEU 0x31c /* (high) */ -+#define PAS_DMA_TXCHAN_TCMDSTA(c) (0x300+(c)*_PAS_DMA_TXCHAN_STRIDE) -+#define PAS_DMA_TXCHAN_TCMDSTA_EN 0x00000001 /* Enabled */ -+#define PAS_DMA_TXCHAN_TCMDSTA_ST 0x00000002 /* Stop interface */ -+#define PAS_DMA_TXCHAN_TCMDSTA_ACT 0x00010000 /* Active */ -+#define PAS_DMA_TXCHAN_CFG(c) (0x304+(c)*_PAS_DMA_TXCHAN_STRIDE) -+#define PAS_DMA_TXCHAN_CFG_TY_FUNC 0x00000002 /* Type = interface */ -+#define PAS_DMA_TXCHAN_CFG_TY_IFACE 0x00000000 /* Type = interface */ -+#define PAS_DMA_TXCHAN_CFG_TATTR_M 0x0000003c -+#define PAS_DMA_TXCHAN_CFG_TATTR_S 2 -+#define PAS_DMA_TXCHAN_CFG_TATTR(x) (((x) << PAS_DMA_TXCHAN_CFG_TATTR_S) & \ -+ PAS_DMA_TXCHAN_CFG_TATTR_M) -+#define PAS_DMA_TXCHAN_CFG_WT_M 0x000001c0 -+#define PAS_DMA_TXCHAN_CFG_WT_S 6 -+#define PAS_DMA_TXCHAN_CFG_WT(x) (((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \ -+ PAS_DMA_TXCHAN_CFG_WT_M) -+#define PAS_DMA_TXCHAN_CFG_LPSQ_FAST 0x00000400 -+#define PAS_DMA_TXCHAN_CFG_LPDQ_FAST 0x00000800 -+#define PAS_DMA_TXCHAN_CFG_CF 0x00001000 /* Clean first line */ -+#define PAS_DMA_TXCHAN_CFG_CL 0x00002000 /* Clean last line */ -+#define PAS_DMA_TXCHAN_CFG_UP 0x00004000 /* update tx descr when sent */ -+#define PAS_DMA_TXCHAN_INCR(c) (0x310+(c)*_PAS_DMA_TXCHAN_STRIDE) -+#define PAS_DMA_TXCHAN_BASEL(c) (0x318+(c)*_PAS_DMA_TXCHAN_STRIDE) -+#define PAS_DMA_TXCHAN_BASEL_BRBL_M 0xffffffc0 -+#define PAS_DMA_TXCHAN_BASEL_BRBL_S 0 -+#define PAS_DMA_TXCHAN_BASEL_BRBL(x) (((x) << PAS_DMA_TXCHAN_BASEL_BRBL_S) & \ -+ PAS_DMA_TXCHAN_BASEL_BRBL_M) -+#define PAS_DMA_TXCHAN_BASEU(c) (0x31c+(c)*_PAS_DMA_TXCHAN_STRIDE) -+#define PAS_DMA_TXCHAN_BASEU_BRBH_M 0x00000fff -+#define PAS_DMA_TXCHAN_BASEU_BRBH_S 0 -+#define PAS_DMA_TXCHAN_BASEU_BRBH(x) (((x) << PAS_DMA_TXCHAN_BASEU_BRBH_S) & \ -+ PAS_DMA_TXCHAN_BASEU_BRBH_M) -+/* # of cache lines worth of buffer ring */ -+#define PAS_DMA_TXCHAN_BASEU_SIZ_M 0x3fff0000 -+#define PAS_DMA_TXCHAN_BASEU_SIZ_S 16 /* 0 = 16K */ -+#define PAS_DMA_TXCHAN_BASEU_SIZ(x) (((x) << PAS_DMA_TXCHAN_BASEU_SIZ_S) & \ -+ PAS_DMA_TXCHAN_BASEU_SIZ_M) -+ -+#define PAS_STATUS_PCNT_M 0x000000000000ffffull -+#define PAS_STATUS_PCNT_S 0 -+#define PAS_STATUS_DCNT_M 0x00000000ffff0000ull -+#define PAS_STATUS_DCNT_S 16 -+#define PAS_STATUS_BPCNT_M 0x0000ffff00000000ull -+#define PAS_STATUS_BPCNT_S 32 -+#define PAS_STATUS_CAUSE_M 0xf000000000000000ull -+#define PAS_STATUS_TIMER 0x1000000000000000ull -+#define PAS_STATUS_ERROR 0x2000000000000000ull -+#define PAS_STATUS_SOFT 0x4000000000000000ull -+#define PAS_STATUS_INT 0x8000000000000000ull -+ -+#define PAS_IOB_DMA_RXCH_CFG(i) (0x1100 + (i)*4) -+#define PAS_IOB_DMA_RXCH_CFG_CNTTH_M 0x00000fff -+#define PAS_IOB_DMA_RXCH_CFG_CNTTH_S 0 -+#define PAS_IOB_DMA_RXCH_CFG_CNTTH(x) (((x) << PAS_IOB_DMA_RXCH_CFG_CNTTH_S) & \ -+ PAS_IOB_DMA_RXCH_CFG_CNTTH_M) -+#define PAS_IOB_DMA_TXCH_CFG(i) (0x1200 + (i)*4) -+#define PAS_IOB_DMA_TXCH_CFG_CNTTH_M 0x00000fff -+#define PAS_IOB_DMA_TXCH_CFG_CNTTH_S 0 -+#define PAS_IOB_DMA_TXCH_CFG_CNTTH(x) (((x) << PAS_IOB_DMA_TXCH_CFG_CNTTH_S) & \ -+ PAS_IOB_DMA_TXCH_CFG_CNTTH_M) -+#define PAS_IOB_DMA_RXCH_STAT(i) (0x1300 + (i)*4) -+#define PAS_IOB_DMA_RXCH_STAT_INTGEN 0x00001000 -+#define PAS_IOB_DMA_RXCH_STAT_CNTDEL_M 0x00000fff -+#define PAS_IOB_DMA_RXCH_STAT_CNTDEL_S 0 -+#define PAS_IOB_DMA_RXCH_STAT_CNTDEL(x) (((x) << PAS_IOB_DMA_RXCH_STAT_CNTDEL_S) &\ -+ PAS_IOB_DMA_RXCH_STAT_CNTDEL_M) -+#define PAS_IOB_DMA_TXCH_STAT(i) (0x1400 + (i)*4) -+#define PAS_IOB_DMA_TXCH_STAT_INTGEN 0x00001000 -+#define PAS_IOB_DMA_TXCH_STAT_CNTDEL_M 0x00000fff -+#define PAS_IOB_DMA_TXCH_STAT_CNTDEL_S 0 -+#define PAS_IOB_DMA_TXCH_STAT_CNTDEL(x) (((x) << PAS_IOB_DMA_TXCH_STAT_CNTDEL_S) &\ -+ PAS_IOB_DMA_TXCH_STAT_CNTDEL_M) -+#define PAS_IOB_DMA_RXCH_RESET(i) (0x1500 + (i)*4) -+#define PAS_IOB_DMA_RXCH_RESET_PCNT_M 0xffff0000 -+#define PAS_IOB_DMA_RXCH_RESET_PCNT_S 16 -+#define PAS_IOB_DMA_RXCH_RESET_PCNT(x) (((x) << PAS_IOB_DMA_RXCH_RESET_PCNT_S) & \ -+ PAS_IOB_DMA_RXCH_RESET_PCNT_M) -+#define PAS_IOB_DMA_RXCH_RESET_PCNTRST 0x00000020 -+#define PAS_IOB_DMA_RXCH_RESET_DCNTRST 0x00000010 -+#define PAS_IOB_DMA_RXCH_RESET_TINTC 0x00000008 -+#define PAS_IOB_DMA_RXCH_RESET_DINTC 0x00000004 -+#define PAS_IOB_DMA_RXCH_RESET_SINTC 0x00000002 -+#define PAS_IOB_DMA_RXCH_RESET_PINTC 0x00000001 -+#define PAS_IOB_DMA_TXCH_RESET(i) (0x1600 + (i)*4) -+#define PAS_IOB_DMA_TXCH_RESET_PCNT_M 0xffff0000 -+#define PAS_IOB_DMA_TXCH_RESET_PCNT_S 16 -+#define PAS_IOB_DMA_TXCH_RESET_PCNT(x) (((x) << PAS_IOB_DMA_TXCH_RESET_PCNT_S) & \ -+ PAS_IOB_DMA_TXCH_RESET_PCNT_M) -+#define PAS_IOB_DMA_TXCH_RESET_PCNTRST 0x00000020 -+#define PAS_IOB_DMA_TXCH_RESET_DCNTRST 0x00000010 -+#define PAS_IOB_DMA_TXCH_RESET_TINTC 0x00000008 -+#define PAS_IOB_DMA_TXCH_RESET_DINTC 0x00000004 -+#define PAS_IOB_DMA_TXCH_RESET_SINTC 0x00000002 -+#define PAS_IOB_DMA_TXCH_RESET_PINTC 0x00000001 -+ -+#define PAS_IOB_DMA_COM_TIMEOUTCFG 0x1700 -+#define PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_M 0x00ffffff -+#define PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_S 0 -+#define PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(x) (((x) << PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_S) & \ -+ PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_M) -+ -+/* Transmit descriptor fields */ -+#define XCT_MACTX_T 0x8000000000000000ull -+#define XCT_MACTX_ST 0x4000000000000000ull -+#define XCT_MACTX_NORES 0x0000000000000000ull -+#define XCT_MACTX_8BRES 0x1000000000000000ull -+#define XCT_MACTX_24BRES 0x2000000000000000ull -+#define XCT_MACTX_40BRES 0x3000000000000000ull -+#define XCT_MACTX_I 0x0800000000000000ull -+#define XCT_MACTX_O 0x0400000000000000ull -+#define XCT_MACTX_E 0x0200000000000000ull -+#define XCT_MACTX_VLAN_M 0x0180000000000000ull -+#define XCT_MACTX_VLAN_NOP 0x0000000000000000ull -+#define XCT_MACTX_VLAN_REMOVE 0x0080000000000000ull -+#define XCT_MACTX_VLAN_INSERT 0x0100000000000000ull -+#define XCT_MACTX_VLAN_REPLACE 0x0180000000000000ull -+#define XCT_MACTX_CRC_M 0x0060000000000000ull -+#define XCT_MACTX_CRC_NOP 0x0000000000000000ull -+#define XCT_MACTX_CRC_INSERT 0x0020000000000000ull -+#define XCT_MACTX_CRC_PAD 0x0040000000000000ull -+#define XCT_MACTX_CRC_REPLACE 0x0060000000000000ull -+#define XCT_MACTX_SS 0x0010000000000000ull -+#define XCT_MACTX_LLEN_M 0x00007fff00000000ull -+#define XCT_MACTX_LLEN_S 32ull -+#define XCT_MACTX_LLEN(x) ((((long)(x)) << XCT_MACTX_LLEN_S) & \ -+ XCT_MACTX_LLEN_M) -+#define XCT_MACTX_IPH_M 0x00000000f8000000ull -+#define XCT_MACTX_IPH_S 27ull -+#define XCT_MACTX_IPH(x) ((((long)(x)) << XCT_MACTX_IPH_S) & \ -+ XCT_MACTX_IPH_M) -+#define XCT_MACTX_IPO_M 0x0000000007c00000ull -+#define XCT_MACTX_IPO_S 22ull -+#define XCT_MACTX_IPO(x) ((((long)(x)) << XCT_MACTX_IPO_S) & \ -+ XCT_MACTX_IPO_M) -+#define XCT_MACTX_CSUM_M 0x0000000000000060ull -+#define XCT_MACTX_CSUM_NOP 0x0000000000000000ull -+#define XCT_MACTX_CSUM_TCP 0x0000000000000040ull -+#define XCT_MACTX_CSUM_UDP 0x0000000000000060ull -+#define XCT_MACTX_V6 0x0000000000000010ull -+#define XCT_MACTX_C 0x0000000000000004ull -+#define XCT_MACTX_AL2 0x0000000000000002ull -+ -+#define XCT_PTR_T 0x8000000000000000ull -+#define XCT_PTR_LEN_M 0x7ffff00000000000ull -+#define XCT_PTR_LEN_S 44 -+#define XCT_PTR_LEN(x) ((((long)(x)) << XCT_PTR_LEN_S) & \ -+ XCT_PTR_LEN_M) -+#define XCT_PTR_ADDR_M 0x00000fffffffffffull -+#define XCT_PTR_ADDR_S 0 -+#define XCT_PTR_ADDR(x) ((((long)(x)) << XCT_PTR_ADDR_S) & \ -+ XCT_PTR_ADDR_M) -+ -+/* Function descriptor fields */ -+#define XCT_FUN_T 0x8000000000000000ull -+#define XCT_FUN_ST 0x4000000000000000ull -+#define XCT_FUN_NORES 0x0000000000000000ull -+#define XCT_FUN_8BRES 0x1000000000000000ull -+#define XCT_FUN_24BRES 0x2000000000000000ull -+#define XCT_FUN_40BRES 0x3000000000000000ull -+#define XCT_FUN_I 0x0800000000000000ull -+#define XCT_FUN_O 0x0400000000000000ull -+#define XCT_FUN_E 0x0200000000000000ull -+#define XCT_FUN_FUN_S 54 -+#define XCT_FUN_FUN_M 0x01c0000000000000ull -+#define XCT_FUN_FUN(num) ((((long)(num)) << XCT_FUN_FUN_S) & \ -+ XCT_FUN_FUN_M) -+#define XCT_FUN_CRM_NOP 0x0000000000000000ull -+#define XCT_FUN_CRM_SIG 0x0008000000000000ull -+#define XCT_FUN_CRM_ENC 0x0010000000000000ull -+#define XCT_FUN_CRM_DEC 0x0018000000000000ull -+#define XCT_FUN_CRM_SIG_ENC 0x0020000000000000ull -+#define XCT_FUN_CRM_ENC_SIG 0x0028000000000000ull -+#define XCT_FUN_CRM_SIG_DEC 0x0030000000000000ull -+#define XCT_FUN_CRM_DEC_SIG 0x0038000000000000ull -+#define XCT_FUN_LLEN_M 0x0007ffff00000000ull -+#define XCT_FUN_LLEN_S 32ULL -+#define XCT_FUN_LLEN(x) ((((long)(x)) << XCT_FUN_LLEN_S) & \ -+ XCT_FUN_LLEN_M) -+#define XCT_FUN_SHL_M 0x00000000f8000000ull -+#define XCT_FUN_SHL_S 27ull -+#define XCT_FUN_SHL(x) ((((long)(x)) << XCT_FUN_SHL_S) & \ -+ XCT_FUN_SHL_M) -+#define XCT_FUN_CHL_M 0x0000000007c00000ull -+#define XCT_FUN_CHL_S 22ull -+#define XCT_FUN_CHL(x) ((((long)(x)) << XCT_FUN_CHL_S) & \ -+ XCT_FUN_CHL_M) -+#define XCT_FUN_HSZ_M 0x00000000003c0000ull -+#define XCT_FUN_HSZ_S 18ull -+#define XCT_FUN_HSZ(x) ((((long)(x)) << XCT_FUN_HSZ_S) & \ -+ XCT_FUN_HSZ_M) -+#define XCT_FUN_ALG_DES 0x0000000000000000ull -+#define XCT_FUN_ALG_3DES 0x0000000000008000ull -+#define XCT_FUN_ALG_AES 0x0000000000010000ull -+#define XCT_FUN_ALG_ARC 0x0000000000018000ull -+#define XCT_FUN_ALG_KASUMI 0x0000000000020000ull -+#define XCT_FUN_BCM_ECB 0x0000000000000000ull -+#define XCT_FUN_BCM_CBC 0x0000000000001000ull -+#define XCT_FUN_BCM_CFB 0x0000000000002000ull -+#define XCT_FUN_BCM_OFB 0x0000000000003000ull -+#define XCT_FUN_BCM_CNT 0x0000000000003800ull -+#define XCT_FUN_BCM_KAS_F8 0x0000000000002800ull -+#define XCT_FUN_BCM_KAS_F9 0x0000000000001800ull -+#define XCT_FUN_BCP_NO_PAD 0x0000000000000000ull -+#define XCT_FUN_BCP_ZRO 0x0000000000000200ull -+#define XCT_FUN_BCP_PL 0x0000000000000400ull -+#define XCT_FUN_BCP_INCR 0x0000000000000600ull -+#define XCT_FUN_SIG_MD5 (0ull << 4) -+#define XCT_FUN_SIG_SHA1 (2ull << 4) -+#define XCT_FUN_SIG_HMAC_MD5 (8ull << 4) -+#define XCT_FUN_SIG_HMAC_SHA1 (10ull << 4) -+#define XCT_FUN_A 0x0000000000000008ull -+#define XCT_FUN_C 0x0000000000000004ull -+#define XCT_FUN_AL2 0x0000000000000002ull -+#define XCT_FUN_SE 0x0000000000000001ull -+ -+#define XCT_FUN_SRC_PTR(len, addr) (XCT_PTR_LEN(len) | XCT_PTR_ADDR(addr)) -+#define XCT_FUN_DST_PTR(len, addr) (XCT_FUN_SRC_PTR(len, addr) | \ -+ 0x8000000000000000ull) -+ -+#define XCT_CTRL_HDR_FUN_NUM_M 0x01c0000000000000ull -+#define XCT_CTRL_HDR_FUN_NUM_S 54 -+#define XCT_CTRL_HDR_LEN_M 0x0007ffff00000000ull -+#define XCT_CTRL_HDR_LEN_S 32 -+#define XCT_CTRL_HDR_REG_M 0x00000000000000ffull -+#define XCT_CTRL_HDR_REG_S 0 -+ -+#define XCT_CTRL_HDR(funcN,len,reg) (0x9400000000000000ull | \ -+ ((((long)(funcN)) << XCT_CTRL_HDR_FUN_NUM_S) \ -+ & XCT_CTRL_HDR_FUN_NUM_M) | \ -+ ((((long)(len)) << \ -+ XCT_CTRL_HDR_LEN_S) & XCT_CTRL_HDR_LEN_M) | \ -+ ((((long)(reg)) << \ -+ XCT_CTRL_HDR_REG_S) & XCT_CTRL_HDR_REG_M)) -+ -+/* Function config command options */ -+#define DMA_CALGO_DES 0x00 -+#define DMA_CALGO_3DES 0x01 -+#define DMA_CALGO_AES 0x02 -+#define DMA_CALGO_ARC 0x03 -+ -+#define DMA_FN_CIV0 0x02 -+#define DMA_FN_CIV1 0x03 -+#define DMA_FN_HKEY0 0x0a -+ -+#define XCT_PTR_ADDR_LEN(ptr) ((ptr) & XCT_PTR_ADDR_M), \ -+ (((ptr) & XCT_PTR_LEN_M) >> XCT_PTR_LEN_S) -+ -+#endif /* PASEMI_FNU_H */ -diff --git a/crypto/ocf/random.c b/crypto/ocf/random.c -new file mode 100644 -index 0000000..b5d97e1 ---- /dev/null -+++ b/crypto/ocf/random.c -@@ -0,0 +1,322 @@ -+/* -+ * A system independant way of adding entropy to the kernels pool -+ * this way the drivers can focus on the real work and we can take -+ * care of pushing it to the appropriate place in the kernel. -+ * -+ * This should be fast and callable from timers/interrupts -+ * -+ * Written by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * -+ * LICENSE TERMS -+ * -+ * The free distribution and use of this software in both source and binary -+ * form is allowed (with or without changes) provided that: -+ * -+ * 1. distributions of this source code include the above copyright -+ * notice, this list of conditions and the following disclaimer; -+ * -+ * 2. distributions in binary form include the above copyright -+ * notice, this list of conditions and the following disclaimer -+ * in the documentation and/or other associated materials; -+ * -+ * 3. the copyright holder's name is not used to endorse products -+ * built using this software without specific written permission. -+ * -+ * ALTERNATIVELY, provided that this notice is retained in full, this product -+ * may be distributed under the terms of the GNU General Public License (GPL), -+ * in which case the provisions of the GPL apply INSTEAD OF those given above. -+ * -+ * DISCLAIMER -+ * -+ * This software is provided 'as is' with no explicit or implied warranties -+ * in respect of its properties, including, but not limited to, correctness -+ * and/or fitness for purpose. -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/wait.h> -+#include <linux/sched.h> -+#include <linux/spinlock.h> -+#include <linux/version.h> -+#include <linux/unistd.h> -+#include <linux/poll.h> -+#include <linux/random.h> -+#include <cryptodev.h> -+ -+#ifdef CONFIG_OCF_FIPS -+#include "rndtest.h" -+#endif -+ -+#ifndef HAS_RANDOM_INPUT_WAIT -+#error "Please do not enable OCF_RANDOMHARVEST unless you have applied patches" -+#endif -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) -+#include <linux/sched.h> -+#define kill_proc(p,s,v) send_sig(s,find_task_by_vpid(p),0) -+#endif -+ -+/* -+ * a hack to access the debug levels from the crypto driver -+ */ -+extern int crypto_debug; -+#define debug crypto_debug -+ -+/* -+ * a list of all registered random providers -+ */ -+static LIST_HEAD(random_ops); -+static int started = 0; -+static int initted = 0; -+ -+struct random_op { -+ struct list_head random_list; -+ u_int32_t driverid; -+ int (*read_random)(void *arg, u_int32_t *buf, int len); -+ void *arg; -+}; -+ -+static int random_proc(void *arg); -+ -+static pid_t randomproc = (pid_t) -1; -+static spinlock_t random_lock; -+ -+/* -+ * just init the spin locks -+ */ -+static int -+crypto_random_init(void) -+{ -+ spin_lock_init(&random_lock); -+ initted = 1; -+ return(0); -+} -+ -+/* -+ * Add the given random reader to our list (if not present) -+ * and start the thread (if not already started) -+ * -+ * we have to assume that driver id is ok for now -+ */ -+int -+crypto_rregister( -+ u_int32_t driverid, -+ int (*read_random)(void *arg, u_int32_t *buf, int len), -+ void *arg) -+{ -+ unsigned long flags; -+ int ret = 0; -+ struct random_op *rops, *tmp; -+ -+ dprintk("%s,%d: %s(0x%x, %p, %p)\n", __FILE__, __LINE__, -+ __FUNCTION__, driverid, read_random, arg); -+ -+ if (!initted) -+ crypto_random_init(); -+ -+#if 0 -+ struct cryptocap *cap; -+ -+ cap = crypto_checkdriver(driverid); -+ if (!cap) -+ return EINVAL; -+#endif -+ -+ list_for_each_entry_safe(rops, tmp, &random_ops, random_list) { -+ if (rops->driverid == driverid && rops->read_random == read_random) -+ return EEXIST; -+ } -+ -+ rops = (struct random_op *) kmalloc(sizeof(*rops), GFP_KERNEL); -+ if (!rops) -+ return ENOMEM; -+ -+ rops->driverid = driverid; -+ rops->read_random = read_random; -+ rops->arg = arg; -+ -+ spin_lock_irqsave(&random_lock, flags); -+ list_add_tail(&rops->random_list, &random_ops); -+ if (!started) { -+ randomproc = kernel_thread(random_proc, NULL, CLONE_FS|CLONE_FILES); -+ if (randomproc < 0) { -+ ret = randomproc; -+ printk("crypto: crypto_rregister cannot start random thread; " -+ "error %d", ret); -+ } else -+ started = 1; -+ } -+ spin_unlock_irqrestore(&random_lock, flags); -+ -+ return ret; -+} -+EXPORT_SYMBOL(crypto_rregister); -+ -+int -+crypto_runregister_all(u_int32_t driverid) -+{ -+ struct random_op *rops, *tmp; -+ unsigned long flags; -+ -+ dprintk("%s,%d: %s(0x%x)\n", __FILE__, __LINE__, __FUNCTION__, driverid); -+ -+ list_for_each_entry_safe(rops, tmp, &random_ops, random_list) { -+ if (rops->driverid == driverid) { -+ list_del(&rops->random_list); -+ kfree(rops); -+ } -+ } -+ -+ spin_lock_irqsave(&random_lock, flags); -+ if (list_empty(&random_ops) && started) -+ kill_proc(randomproc, SIGKILL, 1); -+ spin_unlock_irqrestore(&random_lock, flags); -+ return(0); -+} -+EXPORT_SYMBOL(crypto_runregister_all); -+ -+/* -+ * while we can add entropy to random.c continue to read random data from -+ * the drivers and push it to random. -+ */ -+static int -+random_proc(void *arg) -+{ -+ int n; -+ int wantcnt; -+ int bufcnt = 0; -+ int retval = 0; -+ int *buf = NULL; -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ daemonize(); -+ spin_lock_irq(¤t->sigmask_lock); -+ sigemptyset(¤t->blocked); -+ recalc_sigpending(current); -+ spin_unlock_irq(¤t->sigmask_lock); -+ sprintf(current->comm, "ocf-random"); -+#else -+ daemonize("ocf-random"); -+ allow_signal(SIGKILL); -+#endif -+ -+ (void) get_fs(); -+ set_fs(get_ds()); -+ -+#ifdef CONFIG_OCF_FIPS -+#define NUM_INT (RNDTEST_NBYTES/sizeof(int)) -+#else -+#define NUM_INT 32 -+#endif -+ -+ /* -+ * some devices can transferr their RNG data direct into memory, -+ * so make sure it is device friendly -+ */ -+ buf = kmalloc(NUM_INT * sizeof(int), GFP_DMA); -+ if (NULL == buf) { -+ printk("crypto: RNG could not allocate memory\n"); -+ retval = -ENOMEM; -+ goto bad_alloc; -+ } -+ -+ wantcnt = NUM_INT; /* start by adding some entropy */ -+ -+ /* -+ * its possible due to errors or driver removal that we no longer -+ * have anything to do, if so exit or we will consume all the CPU -+ * doing nothing -+ */ -+ while (!list_empty(&random_ops)) { -+ struct random_op *rops, *tmp; -+ -+#ifdef CONFIG_OCF_FIPS -+ if (wantcnt) -+ wantcnt = NUM_INT; /* FIPs mode can do 20000 bits or none */ -+#endif -+ -+ /* see if we can get enough entropy to make the world -+ * a better place. -+ */ -+ while (bufcnt < wantcnt && bufcnt < NUM_INT) { -+ list_for_each_entry_safe(rops, tmp, &random_ops, random_list) { -+ -+ n = (*rops->read_random)(rops->arg, &buf[bufcnt], -+ NUM_INT - bufcnt); -+ -+ /* on failure remove the random number generator */ -+ if (n == -1) { -+ list_del(&rops->random_list); -+ printk("crypto: RNG (driverid=0x%x) failed, disabling\n", -+ rops->driverid); -+ kfree(rops); -+ } else if (n > 0) -+ bufcnt += n; -+ } -+ /* give up CPU for a bit, just in case as this is a loop */ -+ schedule(); -+ } -+ -+ -+#ifdef CONFIG_OCF_FIPS -+ if (bufcnt > 0 && rndtest_buf((unsigned char *) &buf[0])) { -+ dprintk("crypto: buffer had fips errors, discarding\n"); -+ bufcnt = 0; -+ } -+#endif -+ -+ /* -+ * if we have a certified buffer, we can send some data -+ * to /dev/random and move along -+ */ -+ if (bufcnt > 0) { -+ /* add what we have */ -+ random_input_words(buf, bufcnt, bufcnt*sizeof(int)*8); -+ bufcnt = 0; -+ } -+ -+ /* give up CPU for a bit so we don't hog while filling */ -+ schedule(); -+ -+ /* wait for needing more */ -+ wantcnt = random_input_wait(); -+ -+ if (wantcnt <= 0) -+ wantcnt = 0; /* try to get some info again */ -+ else -+ /* round up to one word or we can loop forever */ -+ wantcnt = (wantcnt + (sizeof(int)*8)) / (sizeof(int)*8); -+ if (wantcnt > NUM_INT) { -+ wantcnt = NUM_INT; -+ } -+ -+ if (signal_pending(current)) { -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ spin_lock_irq(¤t->sigmask_lock); -+#endif -+ flush_signals(current); -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ spin_unlock_irq(¤t->sigmask_lock); -+#endif -+ } -+ } -+ -+ kfree(buf); -+ -+bad_alloc: -+ spin_lock_irq(&random_lock); -+ randomproc = (pid_t) -1; -+ started = 0; -+ spin_unlock_irq(&random_lock); -+ -+ return retval; -+} -+ -diff --git a/crypto/ocf/rndtest.c b/crypto/ocf/rndtest.c -new file mode 100644 -index 0000000..b31e1a6 ---- /dev/null -+++ b/crypto/ocf/rndtest.c -@@ -0,0 +1,300 @@ -+/* $OpenBSD$ */ -+ -+/* -+ * OCF/Linux port done by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * The license and original author are listed below. -+ * -+ * Copyright (c) 2002 Jason L. Wright (jason@thought.net) -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. All advertising materials mentioning features or use of this software -+ * must display the following acknowledgement: -+ * This product includes software developed by Jason L. Wright -+ * 4. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -+ * POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/list.h> -+#include <linux/wait.h> -+#include <linux/time.h> -+#include <linux/version.h> -+#include <linux/unistd.h> -+#include <linux/kernel.h> -+#include <linux/string.h> -+#include <linux/time.h> -+#include <cryptodev.h> -+#include "rndtest.h" -+ -+static struct rndtest_stats rndstats; -+ -+static void rndtest_test(struct rndtest_state *); -+ -+/* The tests themselves */ -+static int rndtest_monobit(struct rndtest_state *); -+static int rndtest_runs(struct rndtest_state *); -+static int rndtest_longruns(struct rndtest_state *); -+static int rndtest_chi_4(struct rndtest_state *); -+ -+static int rndtest_runs_check(struct rndtest_state *, int, int *); -+static void rndtest_runs_record(struct rndtest_state *, int, int *); -+ -+static const struct rndtest_testfunc { -+ int (*test)(struct rndtest_state *); -+} rndtest_funcs[] = { -+ { rndtest_monobit }, -+ { rndtest_runs }, -+ { rndtest_chi_4 }, -+ { rndtest_longruns }, -+}; -+ -+#define RNDTEST_NTESTS (sizeof(rndtest_funcs)/sizeof(rndtest_funcs[0])) -+ -+static void -+rndtest_test(struct rndtest_state *rsp) -+{ -+ int i, rv = 0; -+ -+ rndstats.rst_tests++; -+ for (i = 0; i < RNDTEST_NTESTS; i++) -+ rv |= (*rndtest_funcs[i].test)(rsp); -+ rsp->rs_discard = (rv != 0); -+} -+ -+ -+extern int crypto_debug; -+#define rndtest_verbose 2 -+#define rndtest_report(rsp, failure, fmt, a...) \ -+ { if (failure || crypto_debug) { printk("rng_test: " fmt "\n", a); } else; } -+ -+#define RNDTEST_MONOBIT_MINONES 9725 -+#define RNDTEST_MONOBIT_MAXONES 10275 -+ -+static int -+rndtest_monobit(struct rndtest_state *rsp) -+{ -+ int i, ones = 0, j; -+ u_int8_t r; -+ -+ for (i = 0; i < RNDTEST_NBYTES; i++) { -+ r = rsp->rs_buf[i]; -+ for (j = 0; j < 8; j++, r <<= 1) -+ if (r & 0x80) -+ ones++; -+ } -+ if (ones > RNDTEST_MONOBIT_MINONES && -+ ones < RNDTEST_MONOBIT_MAXONES) { -+ if (rndtest_verbose > 1) -+ rndtest_report(rsp, 0, "monobit pass (%d < %d < %d)", -+ RNDTEST_MONOBIT_MINONES, ones, -+ RNDTEST_MONOBIT_MAXONES); -+ return (0); -+ } else { -+ if (rndtest_verbose) -+ rndtest_report(rsp, 1, -+ "monobit failed (%d ones)", ones); -+ rndstats.rst_monobit++; -+ return (-1); -+ } -+} -+ -+#define RNDTEST_RUNS_NINTERVAL 6 -+ -+static const struct rndtest_runs_tabs { -+ u_int16_t min, max; -+} rndtest_runs_tab[] = { -+ { 2343, 2657 }, -+ { 1135, 1365 }, -+ { 542, 708 }, -+ { 251, 373 }, -+ { 111, 201 }, -+ { 111, 201 }, -+}; -+ -+static int -+rndtest_runs(struct rndtest_state *rsp) -+{ -+ int i, j, ones, zeros, rv = 0; -+ int onei[RNDTEST_RUNS_NINTERVAL], zeroi[RNDTEST_RUNS_NINTERVAL]; -+ u_int8_t c; -+ -+ bzero(onei, sizeof(onei)); -+ bzero(zeroi, sizeof(zeroi)); -+ ones = zeros = 0; -+ for (i = 0; i < RNDTEST_NBYTES; i++) { -+ c = rsp->rs_buf[i]; -+ for (j = 0; j < 8; j++, c <<= 1) { -+ if (c & 0x80) { -+ ones++; -+ rndtest_runs_record(rsp, zeros, zeroi); -+ zeros = 0; -+ } else { -+ zeros++; -+ rndtest_runs_record(rsp, ones, onei); -+ ones = 0; -+ } -+ } -+ } -+ rndtest_runs_record(rsp, ones, onei); -+ rndtest_runs_record(rsp, zeros, zeroi); -+ -+ rv |= rndtest_runs_check(rsp, 0, zeroi); -+ rv |= rndtest_runs_check(rsp, 1, onei); -+ -+ if (rv) -+ rndstats.rst_runs++; -+ -+ return (rv); -+} -+ -+static void -+rndtest_runs_record(struct rndtest_state *rsp, int len, int *intrv) -+{ -+ if (len == 0) -+ return; -+ if (len > RNDTEST_RUNS_NINTERVAL) -+ len = RNDTEST_RUNS_NINTERVAL; -+ len -= 1; -+ intrv[len]++; -+} -+ -+static int -+rndtest_runs_check(struct rndtest_state *rsp, int val, int *src) -+{ -+ int i, rv = 0; -+ -+ for (i = 0; i < RNDTEST_RUNS_NINTERVAL; i++) { -+ if (src[i] < rndtest_runs_tab[i].min || -+ src[i] > rndtest_runs_tab[i].max) { -+ rndtest_report(rsp, 1, -+ "%s interval %d failed (%d, %d-%d)", -+ val ? "ones" : "zeros", -+ i + 1, src[i], rndtest_runs_tab[i].min, -+ rndtest_runs_tab[i].max); -+ rv = -1; -+ } else { -+ rndtest_report(rsp, 0, -+ "runs pass %s interval %d (%d < %d < %d)", -+ val ? "ones" : "zeros", -+ i + 1, rndtest_runs_tab[i].min, src[i], -+ rndtest_runs_tab[i].max); -+ } -+ } -+ return (rv); -+} -+ -+static int -+rndtest_longruns(struct rndtest_state *rsp) -+{ -+ int i, j, ones = 0, zeros = 0, maxones = 0, maxzeros = 0; -+ u_int8_t c; -+ -+ for (i = 0; i < RNDTEST_NBYTES; i++) { -+ c = rsp->rs_buf[i]; -+ for (j = 0; j < 8; j++, c <<= 1) { -+ if (c & 0x80) { -+ zeros = 0; -+ ones++; -+ if (ones > maxones) -+ maxones = ones; -+ } else { -+ ones = 0; -+ zeros++; -+ if (zeros > maxzeros) -+ maxzeros = zeros; -+ } -+ } -+ } -+ -+ if (maxones < 26 && maxzeros < 26) { -+ rndtest_report(rsp, 0, "longruns pass (%d ones, %d zeros)", -+ maxones, maxzeros); -+ return (0); -+ } else { -+ rndtest_report(rsp, 1, "longruns fail (%d ones, %d zeros)", -+ maxones, maxzeros); -+ rndstats.rst_longruns++; -+ return (-1); -+ } -+} -+ -+/* -+ * chi^2 test over 4 bits: (this is called the poker test in FIPS 140-2, -+ * but it is really the chi^2 test over 4 bits (the poker test as described -+ * by Knuth vol 2 is something different, and I take him as authoritative -+ * on nomenclature over NIST). -+ */ -+#define RNDTEST_CHI4_K 16 -+#define RNDTEST_CHI4_K_MASK (RNDTEST_CHI4_K - 1) -+ -+/* -+ * The unnormalized values are used so that we don't have to worry about -+ * fractional precision. The "real" value is found by: -+ * (V - 1562500) * (16 / 5000) = Vn (where V is the unnormalized value) -+ */ -+#define RNDTEST_CHI4_VMIN 1563181 /* 2.1792 */ -+#define RNDTEST_CHI4_VMAX 1576929 /* 46.1728 */ -+ -+static int -+rndtest_chi_4(struct rndtest_state *rsp) -+{ -+ unsigned int freq[RNDTEST_CHI4_K], i, sum; -+ -+ for (i = 0; i < RNDTEST_CHI4_K; i++) -+ freq[i] = 0; -+ -+ /* Get number of occurances of each 4 bit pattern */ -+ for (i = 0; i < RNDTEST_NBYTES; i++) { -+ freq[(rsp->rs_buf[i] >> 4) & RNDTEST_CHI4_K_MASK]++; -+ freq[(rsp->rs_buf[i] >> 0) & RNDTEST_CHI4_K_MASK]++; -+ } -+ -+ for (i = 0, sum = 0; i < RNDTEST_CHI4_K; i++) -+ sum += freq[i] * freq[i]; -+ -+ if (sum >= 1563181 && sum <= 1576929) { -+ rndtest_report(rsp, 0, "chi^2(4): pass (sum %u)", sum); -+ return (0); -+ } else { -+ rndtest_report(rsp, 1, "chi^2(4): failed (sum %u)", sum); -+ rndstats.rst_chi++; -+ return (-1); -+ } -+} -+ -+int -+rndtest_buf(unsigned char *buf) -+{ -+ struct rndtest_state rsp; -+ -+ memset(&rsp, 0, sizeof(rsp)); -+ rsp.rs_buf = buf; -+ rndtest_test(&rsp); -+ return(rsp.rs_discard); -+} -+ -diff --git a/crypto/ocf/rndtest.h b/crypto/ocf/rndtest.h -new file mode 100644 -index 0000000..e9d8ec8 ---- /dev/null -+++ b/crypto/ocf/rndtest.h -@@ -0,0 +1,54 @@ -+/* $FreeBSD: src/sys/dev/rndtest/rndtest.h,v 1.1 2003/03/11 22:54:44 sam Exp $ */ -+/* $OpenBSD$ */ -+ -+/* -+ * Copyright (c) 2002 Jason L. Wright (jason@thought.net) -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. All advertising materials mentioning features or use of this software -+ * must display the following acknowledgement: -+ * This product includes software developed by Jason L. Wright -+ * 4. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -+ * POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+ -+/* Some of the tests depend on these values */ -+#define RNDTEST_NBYTES 2500 -+#define RNDTEST_NBITS (8 * RNDTEST_NBYTES) -+ -+struct rndtest_state { -+ int rs_discard; /* discard/accept random data */ -+ u_int8_t *rs_buf; -+}; -+ -+struct rndtest_stats { -+ u_int32_t rst_discard; /* number of bytes discarded */ -+ u_int32_t rst_tests; /* number of test runs */ -+ u_int32_t rst_monobit; /* monobit test failures */ -+ u_int32_t rst_runs; /* 0/1 runs failures */ -+ u_int32_t rst_longruns; /* longruns failures */ -+ u_int32_t rst_chi; /* chi^2 failures */ -+}; -+ -+extern int rndtest_buf(unsigned char *buf); -diff --git a/crypto/ocf/safe/Makefile b/crypto/ocf/safe/Makefile -new file mode 100644 -index 0000000..9a36b08 ---- /dev/null -+++ b/crypto/ocf/safe/Makefile -@@ -0,0 +1,12 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+obj-$(CONFIG_OCF_SAFE) += safe.o -+ -+obj ?= . -+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/ -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/safe/md5.c b/crypto/ocf/safe/md5.c -new file mode 100644 -index 0000000..fa10789 ---- /dev/null -+++ b/crypto/ocf/safe/md5.c -@@ -0,0 +1,308 @@ -+/* $KAME: md5.c,v 1.5 2000/11/08 06:13:08 itojun Exp $ */ -+/* -+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. Neither the name of the project nor the names of its contributors -+ * may be used to endorse or promote products derived from this software -+ * without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND -+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE -+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -+ * SUCH DAMAGE. -+ */ -+ -+#if 0 -+#include <sys/cdefs.h> -+__FBSDID("$FreeBSD: src/sys/crypto/md5.c,v 1.9 2004/01/27 19:49:19 des Exp $"); -+ -+#include <sys/types.h> -+#include <sys/cdefs.h> -+#include <sys/time.h> -+#include <sys/systm.h> -+#include <crypto/md5.h> -+#endif -+ -+#define SHIFT(X, s) (((X) << (s)) | ((X) >> (32 - (s)))) -+ -+#define F(X, Y, Z) (((X) & (Y)) | ((~X) & (Z))) -+#define G(X, Y, Z) (((X) & (Z)) | ((Y) & (~Z))) -+#define H(X, Y, Z) ((X) ^ (Y) ^ (Z)) -+#define I(X, Y, Z) ((Y) ^ ((X) | (~Z))) -+ -+#define ROUND1(a, b, c, d, k, s, i) { \ -+ (a) = (a) + F((b), (c), (d)) + X[(k)] + T[(i)]; \ -+ (a) = SHIFT((a), (s)); \ -+ (a) = (b) + (a); \ -+} -+ -+#define ROUND2(a, b, c, d, k, s, i) { \ -+ (a) = (a) + G((b), (c), (d)) + X[(k)] + T[(i)]; \ -+ (a) = SHIFT((a), (s)); \ -+ (a) = (b) + (a); \ -+} -+ -+#define ROUND3(a, b, c, d, k, s, i) { \ -+ (a) = (a) + H((b), (c), (d)) + X[(k)] + T[(i)]; \ -+ (a) = SHIFT((a), (s)); \ -+ (a) = (b) + (a); \ -+} -+ -+#define ROUND4(a, b, c, d, k, s, i) { \ -+ (a) = (a) + I((b), (c), (d)) + X[(k)] + T[(i)]; \ -+ (a) = SHIFT((a), (s)); \ -+ (a) = (b) + (a); \ -+} -+ -+#define Sa 7 -+#define Sb 12 -+#define Sc 17 -+#define Sd 22 -+ -+#define Se 5 -+#define Sf 9 -+#define Sg 14 -+#define Sh 20 -+ -+#define Si 4 -+#define Sj 11 -+#define Sk 16 -+#define Sl 23 -+ -+#define Sm 6 -+#define Sn 10 -+#define So 15 -+#define Sp 21 -+ -+#define MD5_A0 0x67452301 -+#define MD5_B0 0xefcdab89 -+#define MD5_C0 0x98badcfe -+#define MD5_D0 0x10325476 -+ -+/* Integer part of 4294967296 times abs(sin(i)), where i is in radians. */ -+static const u_int32_t T[65] = { -+ 0, -+ 0xd76aa478, 0xe8c7b756, 0x242070db, 0xc1bdceee, -+ 0xf57c0faf, 0x4787c62a, 0xa8304613, 0xfd469501, -+ 0x698098d8, 0x8b44f7af, 0xffff5bb1, 0x895cd7be, -+ 0x6b901122, 0xfd987193, 0xa679438e, 0x49b40821, -+ -+ 0xf61e2562, 0xc040b340, 0x265e5a51, 0xe9b6c7aa, -+ 0xd62f105d, 0x2441453, 0xd8a1e681, 0xe7d3fbc8, -+ 0x21e1cde6, 0xc33707d6, 0xf4d50d87, 0x455a14ed, -+ 0xa9e3e905, 0xfcefa3f8, 0x676f02d9, 0x8d2a4c8a, -+ -+ 0xfffa3942, 0x8771f681, 0x6d9d6122, 0xfde5380c, -+ 0xa4beea44, 0x4bdecfa9, 0xf6bb4b60, 0xbebfbc70, -+ 0x289b7ec6, 0xeaa127fa, 0xd4ef3085, 0x4881d05, -+ 0xd9d4d039, 0xe6db99e5, 0x1fa27cf8, 0xc4ac5665, -+ -+ 0xf4292244, 0x432aff97, 0xab9423a7, 0xfc93a039, -+ 0x655b59c3, 0x8f0ccc92, 0xffeff47d, 0x85845dd1, -+ 0x6fa87e4f, 0xfe2ce6e0, 0xa3014314, 0x4e0811a1, -+ 0xf7537e82, 0xbd3af235, 0x2ad7d2bb, 0xeb86d391, -+}; -+ -+static const u_int8_t md5_paddat[MD5_BUFLEN] = { -+ 0x80, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, -+}; -+ -+static void md5_calc(u_int8_t *, md5_ctxt *); -+ -+void md5_init(ctxt) -+ md5_ctxt *ctxt; -+{ -+ ctxt->md5_n = 0; -+ ctxt->md5_i = 0; -+ ctxt->md5_sta = MD5_A0; -+ ctxt->md5_stb = MD5_B0; -+ ctxt->md5_stc = MD5_C0; -+ ctxt->md5_std = MD5_D0; -+ bzero(ctxt->md5_buf, sizeof(ctxt->md5_buf)); -+} -+ -+void md5_loop(ctxt, input, len) -+ md5_ctxt *ctxt; -+ u_int8_t *input; -+ u_int len; /* number of bytes */ -+{ -+ u_int gap, i; -+ -+ ctxt->md5_n += len * 8; /* byte to bit */ -+ gap = MD5_BUFLEN - ctxt->md5_i; -+ -+ if (len >= gap) { -+ bcopy((void *)input, (void *)(ctxt->md5_buf + ctxt->md5_i), -+ gap); -+ md5_calc(ctxt->md5_buf, ctxt); -+ -+ for (i = gap; i + MD5_BUFLEN <= len; i += MD5_BUFLEN) { -+ md5_calc((u_int8_t *)(input + i), ctxt); -+ } -+ -+ ctxt->md5_i = len - i; -+ bcopy((void *)(input + i), (void *)ctxt->md5_buf, ctxt->md5_i); -+ } else { -+ bcopy((void *)input, (void *)(ctxt->md5_buf + ctxt->md5_i), -+ len); -+ ctxt->md5_i += len; -+ } -+} -+ -+void md5_pad(ctxt) -+ md5_ctxt *ctxt; -+{ -+ u_int gap; -+ -+ /* Don't count up padding. Keep md5_n. */ -+ gap = MD5_BUFLEN - ctxt->md5_i; -+ if (gap > 8) { -+ bcopy(md5_paddat, -+ (void *)(ctxt->md5_buf + ctxt->md5_i), -+ gap - sizeof(ctxt->md5_n)); -+ } else { -+ /* including gap == 8 */ -+ bcopy(md5_paddat, (void *)(ctxt->md5_buf + ctxt->md5_i), -+ gap); -+ md5_calc(ctxt->md5_buf, ctxt); -+ bcopy((md5_paddat + gap), -+ (void *)ctxt->md5_buf, -+ MD5_BUFLEN - sizeof(ctxt->md5_n)); -+ } -+ -+ /* 8 byte word */ -+#if BYTE_ORDER == LITTLE_ENDIAN -+ bcopy(&ctxt->md5_n8[0], &ctxt->md5_buf[56], 8); -+#endif -+#if BYTE_ORDER == BIG_ENDIAN -+ ctxt->md5_buf[56] = ctxt->md5_n8[7]; -+ ctxt->md5_buf[57] = ctxt->md5_n8[6]; -+ ctxt->md5_buf[58] = ctxt->md5_n8[5]; -+ ctxt->md5_buf[59] = ctxt->md5_n8[4]; -+ ctxt->md5_buf[60] = ctxt->md5_n8[3]; -+ ctxt->md5_buf[61] = ctxt->md5_n8[2]; -+ ctxt->md5_buf[62] = ctxt->md5_n8[1]; -+ ctxt->md5_buf[63] = ctxt->md5_n8[0]; -+#endif -+ -+ md5_calc(ctxt->md5_buf, ctxt); -+} -+ -+void md5_result(digest, ctxt) -+ u_int8_t *digest; -+ md5_ctxt *ctxt; -+{ -+ /* 4 byte words */ -+#if BYTE_ORDER == LITTLE_ENDIAN -+ bcopy(&ctxt->md5_st8[0], digest, 16); -+#endif -+#if BYTE_ORDER == BIG_ENDIAN -+ digest[ 0] = ctxt->md5_st8[ 3]; digest[ 1] = ctxt->md5_st8[ 2]; -+ digest[ 2] = ctxt->md5_st8[ 1]; digest[ 3] = ctxt->md5_st8[ 0]; -+ digest[ 4] = ctxt->md5_st8[ 7]; digest[ 5] = ctxt->md5_st8[ 6]; -+ digest[ 6] = ctxt->md5_st8[ 5]; digest[ 7] = ctxt->md5_st8[ 4]; -+ digest[ 8] = ctxt->md5_st8[11]; digest[ 9] = ctxt->md5_st8[10]; -+ digest[10] = ctxt->md5_st8[ 9]; digest[11] = ctxt->md5_st8[ 8]; -+ digest[12] = ctxt->md5_st8[15]; digest[13] = ctxt->md5_st8[14]; -+ digest[14] = ctxt->md5_st8[13]; digest[15] = ctxt->md5_st8[12]; -+#endif -+} -+ -+static void md5_calc(b64, ctxt) -+ u_int8_t *b64; -+ md5_ctxt *ctxt; -+{ -+ u_int32_t A = ctxt->md5_sta; -+ u_int32_t B = ctxt->md5_stb; -+ u_int32_t C = ctxt->md5_stc; -+ u_int32_t D = ctxt->md5_std; -+#if BYTE_ORDER == LITTLE_ENDIAN -+ u_int32_t *X = (u_int32_t *)b64; -+#endif -+#if BYTE_ORDER == BIG_ENDIAN -+ /* 4 byte words */ -+ /* what a brute force but fast! */ -+ u_int32_t X[16]; -+ u_int8_t *y = (u_int8_t *)X; -+ y[ 0] = b64[ 3]; y[ 1] = b64[ 2]; y[ 2] = b64[ 1]; y[ 3] = b64[ 0]; -+ y[ 4] = b64[ 7]; y[ 5] = b64[ 6]; y[ 6] = b64[ 5]; y[ 7] = b64[ 4]; -+ y[ 8] = b64[11]; y[ 9] = b64[10]; y[10] = b64[ 9]; y[11] = b64[ 8]; -+ y[12] = b64[15]; y[13] = b64[14]; y[14] = b64[13]; y[15] = b64[12]; -+ y[16] = b64[19]; y[17] = b64[18]; y[18] = b64[17]; y[19] = b64[16]; -+ y[20] = b64[23]; y[21] = b64[22]; y[22] = b64[21]; y[23] = b64[20]; -+ y[24] = b64[27]; y[25] = b64[26]; y[26] = b64[25]; y[27] = b64[24]; -+ y[28] = b64[31]; y[29] = b64[30]; y[30] = b64[29]; y[31] = b64[28]; -+ y[32] = b64[35]; y[33] = b64[34]; y[34] = b64[33]; y[35] = b64[32]; -+ y[36] = b64[39]; y[37] = b64[38]; y[38] = b64[37]; y[39] = b64[36]; -+ y[40] = b64[43]; y[41] = b64[42]; y[42] = b64[41]; y[43] = b64[40]; -+ y[44] = b64[47]; y[45] = b64[46]; y[46] = b64[45]; y[47] = b64[44]; -+ y[48] = b64[51]; y[49] = b64[50]; y[50] = b64[49]; y[51] = b64[48]; -+ y[52] = b64[55]; y[53] = b64[54]; y[54] = b64[53]; y[55] = b64[52]; -+ y[56] = b64[59]; y[57] = b64[58]; y[58] = b64[57]; y[59] = b64[56]; -+ y[60] = b64[63]; y[61] = b64[62]; y[62] = b64[61]; y[63] = b64[60]; -+#endif -+ -+ ROUND1(A, B, C, D, 0, Sa, 1); ROUND1(D, A, B, C, 1, Sb, 2); -+ ROUND1(C, D, A, B, 2, Sc, 3); ROUND1(B, C, D, A, 3, Sd, 4); -+ ROUND1(A, B, C, D, 4, Sa, 5); ROUND1(D, A, B, C, 5, Sb, 6); -+ ROUND1(C, D, A, B, 6, Sc, 7); ROUND1(B, C, D, A, 7, Sd, 8); -+ ROUND1(A, B, C, D, 8, Sa, 9); ROUND1(D, A, B, C, 9, Sb, 10); -+ ROUND1(C, D, A, B, 10, Sc, 11); ROUND1(B, C, D, A, 11, Sd, 12); -+ ROUND1(A, B, C, D, 12, Sa, 13); ROUND1(D, A, B, C, 13, Sb, 14); -+ ROUND1(C, D, A, B, 14, Sc, 15); ROUND1(B, C, D, A, 15, Sd, 16); -+ -+ ROUND2(A, B, C, D, 1, Se, 17); ROUND2(D, A, B, C, 6, Sf, 18); -+ ROUND2(C, D, A, B, 11, Sg, 19); ROUND2(B, C, D, A, 0, Sh, 20); -+ ROUND2(A, B, C, D, 5, Se, 21); ROUND2(D, A, B, C, 10, Sf, 22); -+ ROUND2(C, D, A, B, 15, Sg, 23); ROUND2(B, C, D, A, 4, Sh, 24); -+ ROUND2(A, B, C, D, 9, Se, 25); ROUND2(D, A, B, C, 14, Sf, 26); -+ ROUND2(C, D, A, B, 3, Sg, 27); ROUND2(B, C, D, A, 8, Sh, 28); -+ ROUND2(A, B, C, D, 13, Se, 29); ROUND2(D, A, B, C, 2, Sf, 30); -+ ROUND2(C, D, A, B, 7, Sg, 31); ROUND2(B, C, D, A, 12, Sh, 32); -+ -+ ROUND3(A, B, C, D, 5, Si, 33); ROUND3(D, A, B, C, 8, Sj, 34); -+ ROUND3(C, D, A, B, 11, Sk, 35); ROUND3(B, C, D, A, 14, Sl, 36); -+ ROUND3(A, B, C, D, 1, Si, 37); ROUND3(D, A, B, C, 4, Sj, 38); -+ ROUND3(C, D, A, B, 7, Sk, 39); ROUND3(B, C, D, A, 10, Sl, 40); -+ ROUND3(A, B, C, D, 13, Si, 41); ROUND3(D, A, B, C, 0, Sj, 42); -+ ROUND3(C, D, A, B, 3, Sk, 43); ROUND3(B, C, D, A, 6, Sl, 44); -+ ROUND3(A, B, C, D, 9, Si, 45); ROUND3(D, A, B, C, 12, Sj, 46); -+ ROUND3(C, D, A, B, 15, Sk, 47); ROUND3(B, C, D, A, 2, Sl, 48); -+ -+ ROUND4(A, B, C, D, 0, Sm, 49); ROUND4(D, A, B, C, 7, Sn, 50); -+ ROUND4(C, D, A, B, 14, So, 51); ROUND4(B, C, D, A, 5, Sp, 52); -+ ROUND4(A, B, C, D, 12, Sm, 53); ROUND4(D, A, B, C, 3, Sn, 54); -+ ROUND4(C, D, A, B, 10, So, 55); ROUND4(B, C, D, A, 1, Sp, 56); -+ ROUND4(A, B, C, D, 8, Sm, 57); ROUND4(D, A, B, C, 15, Sn, 58); -+ ROUND4(C, D, A, B, 6, So, 59); ROUND4(B, C, D, A, 13, Sp, 60); -+ ROUND4(A, B, C, D, 4, Sm, 61); ROUND4(D, A, B, C, 11, Sn, 62); -+ ROUND4(C, D, A, B, 2, So, 63); ROUND4(B, C, D, A, 9, Sp, 64); -+ -+ ctxt->md5_sta += A; -+ ctxt->md5_stb += B; -+ ctxt->md5_stc += C; -+ ctxt->md5_std += D; -+} -diff --git a/crypto/ocf/safe/md5.h b/crypto/ocf/safe/md5.h -new file mode 100644 -index 0000000..690f5bf ---- /dev/null -+++ b/crypto/ocf/safe/md5.h -@@ -0,0 +1,76 @@ -+/* $FreeBSD: src/sys/crypto/md5.h,v 1.4 2002/03/20 05:13:50 alfred Exp $ */ -+/* $KAME: md5.h,v 1.4 2000/03/27 04:36:22 sumikawa Exp $ */ -+ -+/* -+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. Neither the name of the project nor the names of its contributors -+ * may be used to endorse or promote products derived from this software -+ * without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND -+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE -+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -+ * SUCH DAMAGE. -+ */ -+ -+#ifndef _NETINET6_MD5_H_ -+#define _NETINET6_MD5_H_ -+ -+#define MD5_BUFLEN 64 -+ -+typedef struct { -+ union { -+ u_int32_t md5_state32[4]; -+ u_int8_t md5_state8[16]; -+ } md5_st; -+ -+#define md5_sta md5_st.md5_state32[0] -+#define md5_stb md5_st.md5_state32[1] -+#define md5_stc md5_st.md5_state32[2] -+#define md5_std md5_st.md5_state32[3] -+#define md5_st8 md5_st.md5_state8 -+ -+ union { -+ u_int64_t md5_count64; -+ u_int8_t md5_count8[8]; -+ } md5_count; -+#define md5_n md5_count.md5_count64 -+#define md5_n8 md5_count.md5_count8 -+ -+ u_int md5_i; -+ u_int8_t md5_buf[MD5_BUFLEN]; -+} md5_ctxt; -+ -+extern void md5_init(md5_ctxt *); -+extern void md5_loop(md5_ctxt *, u_int8_t *, u_int); -+extern void md5_pad(md5_ctxt *); -+extern void md5_result(u_int8_t *, md5_ctxt *); -+ -+/* compatibility */ -+#define MD5_CTX md5_ctxt -+#define MD5Init(x) md5_init((x)) -+#define MD5Update(x, y, z) md5_loop((x), (y), (z)) -+#define MD5Final(x, y) \ -+do { \ -+ md5_pad((y)); \ -+ md5_result((x), (y)); \ -+} while (0) -+ -+#endif /* ! _NETINET6_MD5_H_*/ -diff --git a/crypto/ocf/safe/safe.c b/crypto/ocf/safe/safe.c -new file mode 100644 -index 0000000..87984f7 ---- /dev/null -+++ b/crypto/ocf/safe/safe.c -@@ -0,0 +1,2288 @@ -+/*- -+ * Linux port done by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2004-2010 David McCullough -+ * The license and original author are listed below. -+ * -+ * Copyright (c) 2003 Sam Leffler, Errno Consulting -+ * Copyright (c) 2003 Global Technology Associates, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -+ * SUCH DAMAGE. -+ * -+__FBSDID("$FreeBSD: src/sys/dev/safe/safe.c,v 1.18 2007/03/21 03:42:50 sam Exp $"); -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/slab.h> -+#include <linux/wait.h> -+#include <linux/sched.h> -+#include <linux/pci.h> -+#include <linux/delay.h> -+#include <linux/interrupt.h> -+#include <linux/spinlock.h> -+#include <linux/random.h> -+#include <linux/version.h> -+#include <linux/skbuff.h> -+#include <asm/io.h> -+ -+/* -+ * SafeNet SafeXcel-1141 hardware crypto accelerator -+ */ -+ -+#include <cryptodev.h> -+#include <uio.h> -+#include <safe/safereg.h> -+#include <safe/safevar.h> -+ -+#if 1 -+#define DPRINTF(a) do { \ -+ if (debug) { \ -+ printk("%s: ", sc ? \ -+ device_get_nameunit(sc->sc_dev) : "safe"); \ -+ printk a; \ -+ } \ -+ } while (0) -+#else -+#define DPRINTF(a) -+#endif -+ -+/* -+ * until we find a cleaner way, include the BSD md5/sha1 code -+ * here -+ */ -+#define HMAC_HACK 1 -+#ifdef HMAC_HACK -+#define LITTLE_ENDIAN 1234 -+#define BIG_ENDIAN 4321 -+#ifdef __LITTLE_ENDIAN -+#define BYTE_ORDER LITTLE_ENDIAN -+#endif -+#ifdef __BIG_ENDIAN -+#define BYTE_ORDER BIG_ENDIAN -+#endif -+#include <safe/md5.h> -+#include <safe/md5.c> -+#include <safe/sha1.h> -+#include <safe/sha1.c> -+ -+u_int8_t hmac_ipad_buffer[64] = { -+ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, -+ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, -+ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, -+ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, -+ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, -+ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, -+ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, -+ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36 -+}; -+ -+u_int8_t hmac_opad_buffer[64] = { -+ 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, -+ 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, -+ 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, -+ 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, -+ 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, -+ 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, -+ 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, -+ 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C -+}; -+#endif /* HMAC_HACK */ -+ -+/* add proc entry for this */ -+struct safe_stats safestats; -+ -+#define debug safe_debug -+int safe_debug = 0; -+module_param(safe_debug, int, 0644); -+MODULE_PARM_DESC(safe_debug, "Enable debug"); -+ -+static void safe_callback(struct safe_softc *, struct safe_ringentry *); -+static void safe_feed(struct safe_softc *, struct safe_ringentry *); -+#if defined(CONFIG_OCF_RANDOMHARVEST) && !defined(SAFE_NO_RNG) -+static void safe_rng_init(struct safe_softc *); -+int safe_rngbufsize = 8; /* 32 bytes each read */ -+module_param(safe_rngbufsize, int, 0644); -+MODULE_PARM_DESC(safe_rngbufsize, "RNG polling buffer size (32-bit words)"); -+int safe_rngmaxalarm = 8; /* max alarms before reset */ -+module_param(safe_rngmaxalarm, int, 0644); -+MODULE_PARM_DESC(safe_rngmaxalarm, "RNG max alarms before reset"); -+#endif /* SAFE_NO_RNG */ -+ -+static void safe_totalreset(struct safe_softc *sc); -+static int safe_dmamap_aligned(struct safe_softc *sc, const struct safe_operand *op); -+static int safe_dmamap_uniform(struct safe_softc *sc, const struct safe_operand *op); -+static int safe_free_entry(struct safe_softc *sc, struct safe_ringentry *re); -+static int safe_kprocess(device_t dev, struct cryptkop *krp, int hint); -+static int safe_kstart(struct safe_softc *sc); -+static int safe_ksigbits(struct safe_softc *sc, struct crparam *cr); -+static void safe_kfeed(struct safe_softc *sc); -+static void safe_kpoll(unsigned long arg); -+static void safe_kload_reg(struct safe_softc *sc, u_int32_t off, -+ u_int32_t len, struct crparam *n); -+ -+static int safe_newsession(device_t, u_int32_t *, struct cryptoini *); -+static int safe_freesession(device_t, u_int64_t); -+static int safe_process(device_t, struct cryptop *, int); -+ -+static device_method_t safe_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, safe_newsession), -+ DEVMETHOD(cryptodev_freesession,safe_freesession), -+ DEVMETHOD(cryptodev_process, safe_process), -+ DEVMETHOD(cryptodev_kprocess, safe_kprocess), -+}; -+ -+#define READ_REG(sc,r) readl((sc)->sc_base_addr + (r)) -+#define WRITE_REG(sc,r,val) writel((val), (sc)->sc_base_addr + (r)) -+ -+#define SAFE_MAX_CHIPS 8 -+static struct safe_softc *safe_chip_idx[SAFE_MAX_CHIPS]; -+ -+/* -+ * split our buffers up into safe DMAable byte fragments to avoid lockup -+ * bug in 1141 HW on rev 1.0. -+ */ -+ -+static int -+pci_map_linear( -+ struct safe_softc *sc, -+ struct safe_operand *buf, -+ void *addr, -+ int len) -+{ -+ dma_addr_t tmp; -+ int chunk, tlen = len; -+ -+ tmp = pci_map_single(sc->sc_pcidev, addr, len, PCI_DMA_BIDIRECTIONAL); -+ -+ buf->mapsize += len; -+ while (len > 0) { -+ chunk = (len > sc->sc_max_dsize) ? sc->sc_max_dsize : len; -+ buf->segs[buf->nsegs].ds_addr = tmp; -+ buf->segs[buf->nsegs].ds_len = chunk; -+ buf->segs[buf->nsegs].ds_tlen = tlen; -+ buf->nsegs++; -+ tmp += chunk; -+ len -= chunk; -+ tlen = 0; -+ } -+ return 0; -+} -+ -+/* -+ * map in a given uio buffer (great on some arches :-) -+ */ -+ -+static int -+pci_map_uio(struct safe_softc *sc, struct safe_operand *buf, struct uio *uio) -+{ -+ struct iovec *iov = uio->uio_iov; -+ int n; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ buf->mapsize = 0; -+ buf->nsegs = 0; -+ -+ for (n = 0; n < uio->uio_iovcnt; n++) { -+ pci_map_linear(sc, buf, iov->iov_base, iov->iov_len); -+ iov++; -+ } -+ -+ /* identify this buffer by the first segment */ -+ buf->map = (void *) buf->segs[0].ds_addr; -+ return(0); -+} -+ -+/* -+ * map in a given sk_buff -+ */ -+ -+static int -+pci_map_skb(struct safe_softc *sc,struct safe_operand *buf,struct sk_buff *skb) -+{ -+ int i; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ buf->mapsize = 0; -+ buf->nsegs = 0; -+ -+ pci_map_linear(sc, buf, skb->data, skb_headlen(skb)); -+ -+ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { -+ pci_map_linear(sc, buf, -+ page_address(skb_shinfo(skb)->frags[i].page) + -+ skb_shinfo(skb)->frags[i].page_offset, -+ skb_shinfo(skb)->frags[i].size); -+ } -+ -+ /* identify this buffer by the first segment */ -+ buf->map = (void *) buf->segs[0].ds_addr; -+ return(0); -+} -+ -+ -+#if 0 /* not needed at this time */ -+static void -+pci_sync_operand(struct safe_softc *sc, struct safe_operand *buf) -+{ -+ int i; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ for (i = 0; i < buf->nsegs; i++) -+ pci_dma_sync_single_for_cpu(sc->sc_pcidev, buf->segs[i].ds_addr, -+ buf->segs[i].ds_len, PCI_DMA_BIDIRECTIONAL); -+} -+#endif -+ -+static void -+pci_unmap_operand(struct safe_softc *sc, struct safe_operand *buf) -+{ -+ int i; -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ for (i = 0; i < buf->nsegs; i++) { -+ if (buf->segs[i].ds_tlen) { -+ DPRINTF(("%s - unmap %d 0x%x %d\n", __FUNCTION__, i, buf->segs[i].ds_addr, buf->segs[i].ds_tlen)); -+ pci_unmap_single(sc->sc_pcidev, buf->segs[i].ds_addr, -+ buf->segs[i].ds_tlen, PCI_DMA_BIDIRECTIONAL); -+ DPRINTF(("%s - unmap %d 0x%x %d done\n", __FUNCTION__, i, buf->segs[i].ds_addr, buf->segs[i].ds_tlen)); -+ } -+ buf->segs[i].ds_addr = 0; -+ buf->segs[i].ds_len = 0; -+ buf->segs[i].ds_tlen = 0; -+ } -+ buf->nsegs = 0; -+ buf->mapsize = 0; -+ buf->map = 0; -+} -+ -+ -+/* -+ * SafeXcel Interrupt routine -+ */ -+static irqreturn_t -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19) -+safe_intr(int irq, void *arg) -+#else -+safe_intr(int irq, void *arg, struct pt_regs *regs) -+#endif -+{ -+ struct safe_softc *sc = arg; -+ int stat; -+ unsigned long flags; -+ -+ stat = READ_REG(sc, SAFE_HM_STAT); -+ -+ DPRINTF(("%s(stat=0x%x)\n", __FUNCTION__, stat)); -+ -+ if (stat == 0) /* shared irq, not for us */ -+ return IRQ_NONE; -+ -+ WRITE_REG(sc, SAFE_HI_CLR, stat); /* IACK */ -+ -+ if ((stat & SAFE_INT_PE_DDONE)) { -+ /* -+ * Descriptor(s) done; scan the ring and -+ * process completed operations. -+ */ -+ spin_lock_irqsave(&sc->sc_ringmtx, flags); -+ while (sc->sc_back != sc->sc_front) { -+ struct safe_ringentry *re = sc->sc_back; -+ -+#ifdef SAFE_DEBUG -+ if (debug) { -+ safe_dump_ringstate(sc, __func__); -+ safe_dump_request(sc, __func__, re); -+ } -+#endif -+ /* -+ * safe_process marks ring entries that were allocated -+ * but not used with a csr of zero. This insures the -+ * ring front pointer never needs to be set backwards -+ * in the event that an entry is allocated but not used -+ * because of a setup error. -+ */ -+ DPRINTF(("%s re->re_desc.d_csr=0x%x\n", __FUNCTION__, re->re_desc.d_csr)); -+ if (re->re_desc.d_csr != 0) { -+ if (!SAFE_PE_CSR_IS_DONE(re->re_desc.d_csr)) { -+ DPRINTF(("%s !CSR_IS_DONE\n", __FUNCTION__)); -+ break; -+ } -+ if (!SAFE_PE_LEN_IS_DONE(re->re_desc.d_len)) { -+ DPRINTF(("%s !LEN_IS_DONE\n", __FUNCTION__)); -+ break; -+ } -+ sc->sc_nqchip--; -+ safe_callback(sc, re); -+ } -+ if (++(sc->sc_back) == sc->sc_ringtop) -+ sc->sc_back = sc->sc_ring; -+ } -+ spin_unlock_irqrestore(&sc->sc_ringmtx, flags); -+ } -+ -+ /* -+ * Check to see if we got any DMA Error -+ */ -+ if (stat & SAFE_INT_PE_ERROR) { -+ printk("%s: dmaerr dmastat %08x\n", device_get_nameunit(sc->sc_dev), -+ (int)READ_REG(sc, SAFE_PE_DMASTAT)); -+ safestats.st_dmaerr++; -+ safe_totalreset(sc); -+#if 0 -+ safe_feed(sc); -+#endif -+ } -+ -+ if (sc->sc_needwakeup) { /* XXX check high watermark */ -+ int wakeup = sc->sc_needwakeup & (CRYPTO_SYMQ|CRYPTO_ASYMQ); -+ DPRINTF(("%s: wakeup crypto %x\n", __func__, -+ sc->sc_needwakeup)); -+ sc->sc_needwakeup &= ~wakeup; -+ crypto_unblock(sc->sc_cid, wakeup); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+/* -+ * safe_feed() - post a request to chip -+ */ -+static void -+safe_feed(struct safe_softc *sc, struct safe_ringentry *re) -+{ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+#ifdef SAFE_DEBUG -+ if (debug) { -+ safe_dump_ringstate(sc, __func__); -+ safe_dump_request(sc, __func__, re); -+ } -+#endif -+ sc->sc_nqchip++; -+ if (sc->sc_nqchip > safestats.st_maxqchip) -+ safestats.st_maxqchip = sc->sc_nqchip; -+ /* poke h/w to check descriptor ring, any value can be written */ -+ WRITE_REG(sc, SAFE_HI_RD_DESCR, 0); -+} -+ -+#define N(a) (sizeof(a) / sizeof (a[0])) -+static void -+safe_setup_enckey(struct safe_session *ses, caddr_t key) -+{ -+ int i; -+ -+ bcopy(key, ses->ses_key, ses->ses_klen / 8); -+ -+ /* PE is little-endian, insure proper byte order */ -+ for (i = 0; i < N(ses->ses_key); i++) -+ ses->ses_key[i] = htole32(ses->ses_key[i]); -+} -+ -+static void -+safe_setup_mackey(struct safe_session *ses, int algo, caddr_t key, int klen) -+{ -+#ifdef HMAC_HACK -+ MD5_CTX md5ctx; -+ SHA1_CTX sha1ctx; -+ int i; -+ -+ -+ for (i = 0; i < klen; i++) -+ key[i] ^= HMAC_IPAD_VAL; -+ -+ if (algo == CRYPTO_MD5_HMAC) { -+ MD5Init(&md5ctx); -+ MD5Update(&md5ctx, key, klen); -+ MD5Update(&md5ctx, hmac_ipad_buffer, MD5_HMAC_BLOCK_LEN - klen); -+ bcopy(md5ctx.md5_st8, ses->ses_hminner, sizeof(md5ctx.md5_st8)); -+ } else { -+ SHA1Init(&sha1ctx); -+ SHA1Update(&sha1ctx, key, klen); -+ SHA1Update(&sha1ctx, hmac_ipad_buffer, -+ SHA1_HMAC_BLOCK_LEN - klen); -+ bcopy(sha1ctx.h.b32, ses->ses_hminner, sizeof(sha1ctx.h.b32)); -+ } -+ -+ for (i = 0; i < klen; i++) -+ key[i] ^= (HMAC_IPAD_VAL ^ HMAC_OPAD_VAL); -+ -+ if (algo == CRYPTO_MD5_HMAC) { -+ MD5Init(&md5ctx); -+ MD5Update(&md5ctx, key, klen); -+ MD5Update(&md5ctx, hmac_opad_buffer, MD5_HMAC_BLOCK_LEN - klen); -+ bcopy(md5ctx.md5_st8, ses->ses_hmouter, sizeof(md5ctx.md5_st8)); -+ } else { -+ SHA1Init(&sha1ctx); -+ SHA1Update(&sha1ctx, key, klen); -+ SHA1Update(&sha1ctx, hmac_opad_buffer, -+ SHA1_HMAC_BLOCK_LEN - klen); -+ bcopy(sha1ctx.h.b32, ses->ses_hmouter, sizeof(sha1ctx.h.b32)); -+ } -+ -+ for (i = 0; i < klen; i++) -+ key[i] ^= HMAC_OPAD_VAL; -+ -+#if 0 -+ /* -+ * this code prevents SHA working on a BE host, -+ * so it is obviously wrong. I think the byte -+ * swap setup we do with the chip fixes this for us -+ */ -+ -+ /* PE is little-endian, insure proper byte order */ -+ for (i = 0; i < N(ses->ses_hminner); i++) { -+ ses->ses_hminner[i] = htole32(ses->ses_hminner[i]); -+ ses->ses_hmouter[i] = htole32(ses->ses_hmouter[i]); -+ } -+#endif -+#else /* HMAC_HACK */ -+ printk("safe: md5/sha not implemented\n"); -+#endif /* HMAC_HACK */ -+} -+#undef N -+ -+/* -+ * Allocate a new 'session' and return an encoded session id. 'sidp' -+ * contains our registration id, and should contain an encoded session -+ * id on successful allocation. -+ */ -+static int -+safe_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri) -+{ -+ struct safe_softc *sc = device_get_softc(dev); -+ struct cryptoini *c, *encini = NULL, *macini = NULL; -+ struct safe_session *ses = NULL; -+ int sesn; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (sidp == NULL || cri == NULL || sc == NULL) -+ return (EINVAL); -+ -+ for (c = cri; c != NULL; c = c->cri_next) { -+ if (c->cri_alg == CRYPTO_MD5_HMAC || -+ c->cri_alg == CRYPTO_SHA1_HMAC || -+ c->cri_alg == CRYPTO_NULL_HMAC) { -+ if (macini) -+ return (EINVAL); -+ macini = c; -+ } else if (c->cri_alg == CRYPTO_DES_CBC || -+ c->cri_alg == CRYPTO_3DES_CBC || -+ c->cri_alg == CRYPTO_AES_CBC || -+ c->cri_alg == CRYPTO_NULL_CBC) { -+ if (encini) -+ return (EINVAL); -+ encini = c; -+ } else -+ return (EINVAL); -+ } -+ if (encini == NULL && macini == NULL) -+ return (EINVAL); -+ if (encini) { /* validate key length */ -+ switch (encini->cri_alg) { -+ case CRYPTO_DES_CBC: -+ if (encini->cri_klen != 64) -+ return (EINVAL); -+ break; -+ case CRYPTO_3DES_CBC: -+ if (encini->cri_klen != 192) -+ return (EINVAL); -+ break; -+ case CRYPTO_AES_CBC: -+ if (encini->cri_klen != 128 && -+ encini->cri_klen != 192 && -+ encini->cri_klen != 256) -+ return (EINVAL); -+ break; -+ } -+ } -+ -+ if (sc->sc_sessions == NULL) { -+ ses = sc->sc_sessions = (struct safe_session *) -+ kmalloc(sizeof(struct safe_session), SLAB_ATOMIC); -+ if (ses == NULL) -+ return (ENOMEM); -+ memset(ses, 0, sizeof(struct safe_session)); -+ sesn = 0; -+ sc->sc_nsessions = 1; -+ } else { -+ for (sesn = 0; sesn < sc->sc_nsessions; sesn++) { -+ if (sc->sc_sessions[sesn].ses_used == 0) { -+ ses = &sc->sc_sessions[sesn]; -+ break; -+ } -+ } -+ -+ if (ses == NULL) { -+ sesn = sc->sc_nsessions; -+ ses = (struct safe_session *) -+ kmalloc((sesn + 1) * sizeof(struct safe_session), SLAB_ATOMIC); -+ if (ses == NULL) -+ return (ENOMEM); -+ memset(ses, 0, (sesn + 1) * sizeof(struct safe_session)); -+ bcopy(sc->sc_sessions, ses, sesn * -+ sizeof(struct safe_session)); -+ bzero(sc->sc_sessions, sesn * -+ sizeof(struct safe_session)); -+ kfree(sc->sc_sessions); -+ sc->sc_sessions = ses; -+ ses = &sc->sc_sessions[sesn]; -+ sc->sc_nsessions++; -+ } -+ } -+ -+ bzero(ses, sizeof(struct safe_session)); -+ ses->ses_used = 1; -+ -+ if (encini) { -+ /* get an IV */ -+ /* XXX may read fewer than requested */ -+ read_random(ses->ses_iv, sizeof(ses->ses_iv)); -+ -+ ses->ses_klen = encini->cri_klen; -+ if (encini->cri_key != NULL) -+ safe_setup_enckey(ses, encini->cri_key); -+ } -+ -+ if (macini) { -+ ses->ses_mlen = macini->cri_mlen; -+ if (ses->ses_mlen == 0) { -+ if (macini->cri_alg == CRYPTO_MD5_HMAC) -+ ses->ses_mlen = MD5_HASH_LEN; -+ else -+ ses->ses_mlen = SHA1_HASH_LEN; -+ } -+ -+ if (macini->cri_key != NULL) { -+ safe_setup_mackey(ses, macini->cri_alg, macini->cri_key, -+ macini->cri_klen / 8); -+ } -+ } -+ -+ *sidp = SAFE_SID(device_get_unit(sc->sc_dev), sesn); -+ return (0); -+} -+ -+/* -+ * Deallocate a session. -+ */ -+static int -+safe_freesession(device_t dev, u_int64_t tid) -+{ -+ struct safe_softc *sc = device_get_softc(dev); -+ int session, ret; -+ u_int32_t sid = ((u_int32_t) tid) & 0xffffffff; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (sc == NULL) -+ return (EINVAL); -+ -+ session = SAFE_SESSION(sid); -+ if (session < sc->sc_nsessions) { -+ bzero(&sc->sc_sessions[session], sizeof(sc->sc_sessions[session])); -+ ret = 0; -+ } else -+ ret = EINVAL; -+ return (ret); -+} -+ -+ -+static int -+safe_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ struct safe_softc *sc = device_get_softc(dev); -+ int err = 0, i, nicealign, uniform; -+ struct cryptodesc *crd1, *crd2, *maccrd, *enccrd; -+ int bypass, oplen, ivsize; -+ caddr_t iv; -+ int16_t coffset; -+ struct safe_session *ses; -+ struct safe_ringentry *re; -+ struct safe_sarec *sa; -+ struct safe_pdesc *pd; -+ u_int32_t cmd0, cmd1, staterec; -+ unsigned long flags; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (crp == NULL || crp->crp_callback == NULL || sc == NULL) { -+ safestats.st_invalid++; -+ return (EINVAL); -+ } -+ if (SAFE_SESSION(crp->crp_sid) >= sc->sc_nsessions) { -+ safestats.st_badsession++; -+ return (EINVAL); -+ } -+ -+ spin_lock_irqsave(&sc->sc_ringmtx, flags); -+ if (sc->sc_front == sc->sc_back && sc->sc_nqchip != 0) { -+ safestats.st_ringfull++; -+ sc->sc_needwakeup |= CRYPTO_SYMQ; -+ spin_unlock_irqrestore(&sc->sc_ringmtx, flags); -+ return (ERESTART); -+ } -+ re = sc->sc_front; -+ -+ staterec = re->re_sa.sa_staterec; /* save */ -+ /* NB: zero everything but the PE descriptor */ -+ bzero(&re->re_sa, sizeof(struct safe_ringentry) - sizeof(re->re_desc)); -+ re->re_sa.sa_staterec = staterec; /* restore */ -+ -+ re->re_crp = crp; -+ re->re_sesn = SAFE_SESSION(crp->crp_sid); -+ -+ re->re_src.nsegs = 0; -+ re->re_dst.nsegs = 0; -+ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ re->re_src_skb = (struct sk_buff *)crp->crp_buf; -+ re->re_dst_skb = (struct sk_buff *)crp->crp_buf; -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ re->re_src_io = (struct uio *)crp->crp_buf; -+ re->re_dst_io = (struct uio *)crp->crp_buf; -+ } else { -+ safestats.st_badflags++; -+ err = EINVAL; -+ goto errout; /* XXX we don't handle contiguous blocks! */ -+ } -+ -+ sa = &re->re_sa; -+ ses = &sc->sc_sessions[re->re_sesn]; -+ -+ crd1 = crp->crp_desc; -+ if (crd1 == NULL) { -+ safestats.st_nodesc++; -+ err = EINVAL; -+ goto errout; -+ } -+ crd2 = crd1->crd_next; -+ -+ cmd0 = SAFE_SA_CMD0_BASIC; /* basic group operation */ -+ cmd1 = 0; -+ if (crd2 == NULL) { -+ if (crd1->crd_alg == CRYPTO_MD5_HMAC || -+ crd1->crd_alg == CRYPTO_SHA1_HMAC || -+ crd1->crd_alg == CRYPTO_NULL_HMAC) { -+ maccrd = crd1; -+ enccrd = NULL; -+ cmd0 |= SAFE_SA_CMD0_OP_HASH; -+ } else if (crd1->crd_alg == CRYPTO_DES_CBC || -+ crd1->crd_alg == CRYPTO_3DES_CBC || -+ crd1->crd_alg == CRYPTO_AES_CBC || -+ crd1->crd_alg == CRYPTO_NULL_CBC) { -+ maccrd = NULL; -+ enccrd = crd1; -+ cmd0 |= SAFE_SA_CMD0_OP_CRYPT; -+ } else { -+ safestats.st_badalg++; -+ err = EINVAL; -+ goto errout; -+ } -+ } else { -+ if ((crd1->crd_alg == CRYPTO_MD5_HMAC || -+ crd1->crd_alg == CRYPTO_SHA1_HMAC || -+ crd1->crd_alg == CRYPTO_NULL_HMAC) && -+ (crd2->crd_alg == CRYPTO_DES_CBC || -+ crd2->crd_alg == CRYPTO_3DES_CBC || -+ crd2->crd_alg == CRYPTO_AES_CBC || -+ crd2->crd_alg == CRYPTO_NULL_CBC) && -+ ((crd2->crd_flags & CRD_F_ENCRYPT) == 0)) { -+ maccrd = crd1; -+ enccrd = crd2; -+ } else if ((crd1->crd_alg == CRYPTO_DES_CBC || -+ crd1->crd_alg == CRYPTO_3DES_CBC || -+ crd1->crd_alg == CRYPTO_AES_CBC || -+ crd1->crd_alg == CRYPTO_NULL_CBC) && -+ (crd2->crd_alg == CRYPTO_MD5_HMAC || -+ crd2->crd_alg == CRYPTO_SHA1_HMAC || -+ crd2->crd_alg == CRYPTO_NULL_HMAC) && -+ (crd1->crd_flags & CRD_F_ENCRYPT)) { -+ enccrd = crd1; -+ maccrd = crd2; -+ } else { -+ safestats.st_badalg++; -+ err = EINVAL; -+ goto errout; -+ } -+ cmd0 |= SAFE_SA_CMD0_OP_BOTH; -+ } -+ -+ if (enccrd) { -+ if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) -+ safe_setup_enckey(ses, enccrd->crd_key); -+ -+ if (enccrd->crd_alg == CRYPTO_DES_CBC) { -+ cmd0 |= SAFE_SA_CMD0_DES; -+ cmd1 |= SAFE_SA_CMD1_CBC; -+ ivsize = 2*sizeof(u_int32_t); -+ } else if (enccrd->crd_alg == CRYPTO_3DES_CBC) { -+ cmd0 |= SAFE_SA_CMD0_3DES; -+ cmd1 |= SAFE_SA_CMD1_CBC; -+ ivsize = 2*sizeof(u_int32_t); -+ } else if (enccrd->crd_alg == CRYPTO_AES_CBC) { -+ cmd0 |= SAFE_SA_CMD0_AES; -+ cmd1 |= SAFE_SA_CMD1_CBC; -+ if (ses->ses_klen == 128) -+ cmd1 |= SAFE_SA_CMD1_AES128; -+ else if (ses->ses_klen == 192) -+ cmd1 |= SAFE_SA_CMD1_AES192; -+ else -+ cmd1 |= SAFE_SA_CMD1_AES256; -+ ivsize = 4*sizeof(u_int32_t); -+ } else { -+ cmd0 |= SAFE_SA_CMD0_CRYPT_NULL; -+ ivsize = 0; -+ } -+ -+ /* -+ * Setup encrypt/decrypt state. When using basic ops -+ * we can't use an inline IV because hash/crypt offset -+ * must be from the end of the IV to the start of the -+ * crypt data and this leaves out the preceding header -+ * from the hash calculation. Instead we place the IV -+ * in the state record and set the hash/crypt offset to -+ * copy both the header+IV. -+ */ -+ if (enccrd->crd_flags & CRD_F_ENCRYPT) { -+ cmd0 |= SAFE_SA_CMD0_OUTBOUND; -+ -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) -+ iv = enccrd->crd_iv; -+ else -+ iv = (caddr_t) ses->ses_iv; -+ if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0) { -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ enccrd->crd_inject, ivsize, iv); -+ } -+ bcopy(iv, re->re_sastate.sa_saved_iv, ivsize); -+ /* make iv LE */ -+ for (i = 0; i < ivsize/sizeof(re->re_sastate.sa_saved_iv[0]); i++) -+ re->re_sastate.sa_saved_iv[i] = -+ cpu_to_le32(re->re_sastate.sa_saved_iv[i]); -+ cmd0 |= SAFE_SA_CMD0_IVLD_STATE | SAFE_SA_CMD0_SAVEIV; -+ re->re_flags |= SAFE_QFLAGS_COPYOUTIV; -+ } else { -+ cmd0 |= SAFE_SA_CMD0_INBOUND; -+ -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) { -+ bcopy(enccrd->crd_iv, -+ re->re_sastate.sa_saved_iv, ivsize); -+ } else { -+ crypto_copydata(crp->crp_flags, crp->crp_buf, -+ enccrd->crd_inject, ivsize, -+ (caddr_t)re->re_sastate.sa_saved_iv); -+ } -+ /* make iv LE */ -+ for (i = 0; i < ivsize/sizeof(re->re_sastate.sa_saved_iv[0]); i++) -+ re->re_sastate.sa_saved_iv[i] = -+ cpu_to_le32(re->re_sastate.sa_saved_iv[i]); -+ cmd0 |= SAFE_SA_CMD0_IVLD_STATE; -+ } -+ /* -+ * For basic encryption use the zero pad algorithm. -+ * This pads results to an 8-byte boundary and -+ * suppresses padding verification for inbound (i.e. -+ * decrypt) operations. -+ * -+ * NB: Not sure if the 8-byte pad boundary is a problem. -+ */ -+ cmd0 |= SAFE_SA_CMD0_PAD_ZERO; -+ -+ /* XXX assert key bufs have the same size */ -+ bcopy(ses->ses_key, sa->sa_key, sizeof(sa->sa_key)); -+ } -+ -+ if (maccrd) { -+ if (maccrd->crd_flags & CRD_F_KEY_EXPLICIT) { -+ safe_setup_mackey(ses, maccrd->crd_alg, -+ maccrd->crd_key, maccrd->crd_klen / 8); -+ } -+ -+ if (maccrd->crd_alg == CRYPTO_MD5_HMAC) { -+ cmd0 |= SAFE_SA_CMD0_MD5; -+ cmd1 |= SAFE_SA_CMD1_HMAC; /* NB: enable HMAC */ -+ } else if (maccrd->crd_alg == CRYPTO_SHA1_HMAC) { -+ cmd0 |= SAFE_SA_CMD0_SHA1; -+ cmd1 |= SAFE_SA_CMD1_HMAC; /* NB: enable HMAC */ -+ } else { -+ cmd0 |= SAFE_SA_CMD0_HASH_NULL; -+ } -+ /* -+ * Digest data is loaded from the SA and the hash -+ * result is saved to the state block where we -+ * retrieve it for return to the caller. -+ */ -+ /* XXX assert digest bufs have the same size */ -+ bcopy(ses->ses_hminner, sa->sa_indigest, -+ sizeof(sa->sa_indigest)); -+ bcopy(ses->ses_hmouter, sa->sa_outdigest, -+ sizeof(sa->sa_outdigest)); -+ -+ cmd0 |= SAFE_SA_CMD0_HSLD_SA | SAFE_SA_CMD0_SAVEHASH; -+ re->re_flags |= SAFE_QFLAGS_COPYOUTICV; -+ } -+ -+ if (enccrd && maccrd) { -+ /* -+ * The offset from hash data to the start of -+ * crypt data is the difference in the skips. -+ */ -+ bypass = maccrd->crd_skip; -+ coffset = enccrd->crd_skip - maccrd->crd_skip; -+ if (coffset < 0) { -+ DPRINTF(("%s: hash does not precede crypt; " -+ "mac skip %u enc skip %u\n", -+ __func__, maccrd->crd_skip, enccrd->crd_skip)); -+ safestats.st_skipmismatch++; -+ err = EINVAL; -+ goto errout; -+ } -+ oplen = enccrd->crd_skip + enccrd->crd_len; -+ if (maccrd->crd_skip + maccrd->crd_len != oplen) { -+ DPRINTF(("%s: hash amount %u != crypt amount %u\n", -+ __func__, maccrd->crd_skip + maccrd->crd_len, -+ oplen)); -+ safestats.st_lenmismatch++; -+ err = EINVAL; -+ goto errout; -+ } -+#ifdef SAFE_DEBUG -+ if (debug) { -+ printf("mac: skip %d, len %d, inject %d\n", -+ maccrd->crd_skip, maccrd->crd_len, -+ maccrd->crd_inject); -+ printf("enc: skip %d, len %d, inject %d\n", -+ enccrd->crd_skip, enccrd->crd_len, -+ enccrd->crd_inject); -+ printf("bypass %d coffset %d oplen %d\n", -+ bypass, coffset, oplen); -+ } -+#endif -+ if (coffset & 3) { /* offset must be 32-bit aligned */ -+ DPRINTF(("%s: coffset %u misaligned\n", -+ __func__, coffset)); -+ safestats.st_coffmisaligned++; -+ err = EINVAL; -+ goto errout; -+ } -+ coffset >>= 2; -+ if (coffset > 255) { /* offset must be <256 dwords */ -+ DPRINTF(("%s: coffset %u too big\n", -+ __func__, coffset)); -+ safestats.st_cofftoobig++; -+ err = EINVAL; -+ goto errout; -+ } -+ /* -+ * Tell the hardware to copy the header to the output. -+ * The header is defined as the data from the end of -+ * the bypass to the start of data to be encrypted. -+ * Typically this is the inline IV. Note that you need -+ * to do this even if src+dst are the same; it appears -+ * that w/o this bit the crypted data is written -+ * immediately after the bypass data. -+ */ -+ cmd1 |= SAFE_SA_CMD1_HDRCOPY; -+ /* -+ * Disable IP header mutable bit handling. This is -+ * needed to get correct HMAC calculations. -+ */ -+ cmd1 |= SAFE_SA_CMD1_MUTABLE; -+ } else { -+ if (enccrd) { -+ bypass = enccrd->crd_skip; -+ oplen = bypass + enccrd->crd_len; -+ } else { -+ bypass = maccrd->crd_skip; -+ oplen = bypass + maccrd->crd_len; -+ } -+ coffset = 0; -+ } -+ /* XXX verify multiple of 4 when using s/g */ -+ if (bypass > 96) { /* bypass offset must be <= 96 bytes */ -+ DPRINTF(("%s: bypass %u too big\n", __func__, bypass)); -+ safestats.st_bypasstoobig++; -+ err = EINVAL; -+ goto errout; -+ } -+ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ if (pci_map_skb(sc, &re->re_src, re->re_src_skb)) { -+ safestats.st_noload++; -+ err = ENOMEM; -+ goto errout; -+ } -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ if (pci_map_uio(sc, &re->re_src, re->re_src_io)) { -+ safestats.st_noload++; -+ err = ENOMEM; -+ goto errout; -+ } -+ } -+ nicealign = safe_dmamap_aligned(sc, &re->re_src); -+ uniform = safe_dmamap_uniform(sc, &re->re_src); -+ -+ DPRINTF(("src nicealign %u uniform %u nsegs %u\n", -+ nicealign, uniform, re->re_src.nsegs)); -+ if (re->re_src.nsegs > 1) { -+ re->re_desc.d_src = sc->sc_spalloc.dma_paddr + -+ ((caddr_t) sc->sc_spfree - (caddr_t) sc->sc_spring); -+ for (i = 0; i < re->re_src_nsegs; i++) { -+ /* NB: no need to check if there's space */ -+ pd = sc->sc_spfree; -+ if (++(sc->sc_spfree) == sc->sc_springtop) -+ sc->sc_spfree = sc->sc_spring; -+ -+ KASSERT((pd->pd_flags&3) == 0 || -+ (pd->pd_flags&3) == SAFE_PD_DONE, -+ ("bogus source particle descriptor; flags %x", -+ pd->pd_flags)); -+ pd->pd_addr = re->re_src_segs[i].ds_addr; -+ pd->pd_size = re->re_src_segs[i].ds_len; -+ pd->pd_flags = SAFE_PD_READY; -+ } -+ cmd0 |= SAFE_SA_CMD0_IGATHER; -+ } else { -+ /* -+ * No need for gather, reference the operand directly. -+ */ -+ re->re_desc.d_src = re->re_src_segs[0].ds_addr; -+ } -+ -+ if (enccrd == NULL && maccrd != NULL) { -+ /* -+ * Hash op; no destination needed. -+ */ -+ } else { -+ if (crp->crp_flags & (CRYPTO_F_IOV|CRYPTO_F_SKBUF)) { -+ if (!nicealign) { -+ safestats.st_iovmisaligned++; -+ err = EINVAL; -+ goto errout; -+ } -+ if (uniform != 1) { -+ device_printf(sc->sc_dev, "!uniform source\n"); -+ if (!uniform) { -+ /* -+ * There's no way to handle the DMA -+ * requirements with this uio. We -+ * could create a separate DMA area for -+ * the result and then copy it back, -+ * but for now we just bail and return -+ * an error. Note that uio requests -+ * > SAFE_MAX_DSIZE are handled because -+ * the DMA map and segment list for the -+ * destination wil result in a -+ * destination particle list that does -+ * the necessary scatter DMA. -+ */ -+ safestats.st_iovnotuniform++; -+ err = EINVAL; -+ goto errout; -+ } -+ } else -+ re->re_dst = re->re_src; -+ } else { -+ safestats.st_badflags++; -+ err = EINVAL; -+ goto errout; -+ } -+ -+ if (re->re_dst.nsegs > 1) { -+ re->re_desc.d_dst = sc->sc_dpalloc.dma_paddr + -+ ((caddr_t) sc->sc_dpfree - (caddr_t) sc->sc_dpring); -+ for (i = 0; i < re->re_dst_nsegs; i++) { -+ pd = sc->sc_dpfree; -+ KASSERT((pd->pd_flags&3) == 0 || -+ (pd->pd_flags&3) == SAFE_PD_DONE, -+ ("bogus dest particle descriptor; flags %x", -+ pd->pd_flags)); -+ if (++(sc->sc_dpfree) == sc->sc_dpringtop) -+ sc->sc_dpfree = sc->sc_dpring; -+ pd->pd_addr = re->re_dst_segs[i].ds_addr; -+ pd->pd_flags = SAFE_PD_READY; -+ } -+ cmd0 |= SAFE_SA_CMD0_OSCATTER; -+ } else { -+ /* -+ * No need for scatter, reference the operand directly. -+ */ -+ re->re_desc.d_dst = re->re_dst_segs[0].ds_addr; -+ } -+ } -+ -+ /* -+ * All done with setup; fillin the SA command words -+ * and the packet engine descriptor. The operation -+ * is now ready for submission to the hardware. -+ */ -+ sa->sa_cmd0 = cmd0 | SAFE_SA_CMD0_IPCI | SAFE_SA_CMD0_OPCI; -+ sa->sa_cmd1 = cmd1 -+ | (coffset << SAFE_SA_CMD1_OFFSET_S) -+ | SAFE_SA_CMD1_SAREV1 /* Rev 1 SA data structure */ -+ | SAFE_SA_CMD1_SRPCI -+ ; -+ /* -+ * NB: the order of writes is important here. In case the -+ * chip is scanning the ring because of an outstanding request -+ * it might nab this one too. In that case we need to make -+ * sure the setup is complete before we write the length -+ * field of the descriptor as it signals the descriptor is -+ * ready for processing. -+ */ -+ re->re_desc.d_csr = SAFE_PE_CSR_READY | SAFE_PE_CSR_SAPCI; -+ if (maccrd) -+ re->re_desc.d_csr |= SAFE_PE_CSR_LOADSA | SAFE_PE_CSR_HASHFINAL; -+ wmb(); -+ re->re_desc.d_len = oplen -+ | SAFE_PE_LEN_READY -+ | (bypass << SAFE_PE_LEN_BYPASS_S) -+ ; -+ -+ safestats.st_ipackets++; -+ safestats.st_ibytes += oplen; -+ -+ if (++(sc->sc_front) == sc->sc_ringtop) -+ sc->sc_front = sc->sc_ring; -+ -+ /* XXX honor batching */ -+ safe_feed(sc, re); -+ spin_unlock_irqrestore(&sc->sc_ringmtx, flags); -+ return (0); -+ -+errout: -+ if (re->re_src.map != re->re_dst.map) -+ pci_unmap_operand(sc, &re->re_dst); -+ if (re->re_src.map) -+ pci_unmap_operand(sc, &re->re_src); -+ spin_unlock_irqrestore(&sc->sc_ringmtx, flags); -+ if (err != ERESTART) { -+ crp->crp_etype = err; -+ crypto_done(crp); -+ } else { -+ sc->sc_needwakeup |= CRYPTO_SYMQ; -+ } -+ return (err); -+} -+ -+static void -+safe_callback(struct safe_softc *sc, struct safe_ringentry *re) -+{ -+ struct cryptop *crp = (struct cryptop *)re->re_crp; -+ struct cryptodesc *crd; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ safestats.st_opackets++; -+ safestats.st_obytes += re->re_dst.mapsize; -+ -+ if (re->re_desc.d_csr & SAFE_PE_CSR_STATUS) { -+ device_printf(sc->sc_dev, "csr 0x%x cmd0 0x%x cmd1 0x%x\n", -+ re->re_desc.d_csr, -+ re->re_sa.sa_cmd0, re->re_sa.sa_cmd1); -+ safestats.st_peoperr++; -+ crp->crp_etype = EIO; /* something more meaningful? */ -+ } -+ -+ if (re->re_dst.map != NULL && re->re_dst.map != re->re_src.map) -+ pci_unmap_operand(sc, &re->re_dst); -+ pci_unmap_operand(sc, &re->re_src); -+ -+ /* -+ * If result was written to a differet mbuf chain, swap -+ * it in as the return value and reclaim the original. -+ */ -+ if ((crp->crp_flags & CRYPTO_F_SKBUF) && re->re_src_skb != re->re_dst_skb) { -+ device_printf(sc->sc_dev, "no CRYPTO_F_SKBUF swapping support\n"); -+ /* kfree_skb(skb) */ -+ /* crp->crp_buf = (caddr_t)re->re_dst_skb */ -+ return; -+ } -+ -+ if (re->re_flags & SAFE_QFLAGS_COPYOUTIV) { -+ /* copy out IV for future use */ -+ for (crd = crp->crp_desc; crd; crd = crd->crd_next) { -+ int i; -+ int ivsize; -+ -+ if (crd->crd_alg == CRYPTO_DES_CBC || -+ crd->crd_alg == CRYPTO_3DES_CBC) { -+ ivsize = 2*sizeof(u_int32_t); -+ } else if (crd->crd_alg == CRYPTO_AES_CBC) { -+ ivsize = 4*sizeof(u_int32_t); -+ } else -+ continue; -+ crypto_copydata(crp->crp_flags, crp->crp_buf, -+ crd->crd_skip + crd->crd_len - ivsize, ivsize, -+ (caddr_t)sc->sc_sessions[re->re_sesn].ses_iv); -+ for (i = 0; -+ i < ivsize/sizeof(sc->sc_sessions[re->re_sesn].ses_iv[0]); -+ i++) -+ sc->sc_sessions[re->re_sesn].ses_iv[i] = -+ cpu_to_le32(sc->sc_sessions[re->re_sesn].ses_iv[i]); -+ break; -+ } -+ } -+ -+ if (re->re_flags & SAFE_QFLAGS_COPYOUTICV) { -+ /* copy out ICV result */ -+ for (crd = crp->crp_desc; crd; crd = crd->crd_next) { -+ if (!(crd->crd_alg == CRYPTO_MD5_HMAC || -+ crd->crd_alg == CRYPTO_SHA1_HMAC || -+ crd->crd_alg == CRYPTO_NULL_HMAC)) -+ continue; -+ if (crd->crd_alg == CRYPTO_SHA1_HMAC) { -+ /* -+ * SHA-1 ICV's are byte-swapped; fix 'em up -+ * before copy them to their destination. -+ */ -+ re->re_sastate.sa_saved_indigest[0] = -+ cpu_to_be32(re->re_sastate.sa_saved_indigest[0]); -+ re->re_sastate.sa_saved_indigest[1] = -+ cpu_to_be32(re->re_sastate.sa_saved_indigest[1]); -+ re->re_sastate.sa_saved_indigest[2] = -+ cpu_to_be32(re->re_sastate.sa_saved_indigest[2]); -+ } else { -+ re->re_sastate.sa_saved_indigest[0] = -+ cpu_to_le32(re->re_sastate.sa_saved_indigest[0]); -+ re->re_sastate.sa_saved_indigest[1] = -+ cpu_to_le32(re->re_sastate.sa_saved_indigest[1]); -+ re->re_sastate.sa_saved_indigest[2] = -+ cpu_to_le32(re->re_sastate.sa_saved_indigest[2]); -+ } -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ crd->crd_inject, -+ sc->sc_sessions[re->re_sesn].ses_mlen, -+ (caddr_t)re->re_sastate.sa_saved_indigest); -+ break; -+ } -+ } -+ crypto_done(crp); -+} -+ -+ -+#if defined(CONFIG_OCF_RANDOMHARVEST) && !defined(SAFE_NO_RNG) -+#define SAFE_RNG_MAXWAIT 1000 -+ -+static void -+safe_rng_init(struct safe_softc *sc) -+{ -+ u_int32_t w, v; -+ int i; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ WRITE_REG(sc, SAFE_RNG_CTRL, 0); -+ /* use default value according to the manual */ -+ WRITE_REG(sc, SAFE_RNG_CNFG, 0x834); /* magic from SafeNet */ -+ WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0); -+ -+ /* -+ * There is a bug in rev 1.0 of the 1140 that when the RNG -+ * is brought out of reset the ready status flag does not -+ * work until the RNG has finished its internal initialization. -+ * -+ * So in order to determine the device is through its -+ * initialization we must read the data register, using the -+ * status reg in the read in case it is initialized. Then read -+ * the data register until it changes from the first read. -+ * Once it changes read the data register until it changes -+ * again. At this time the RNG is considered initialized. -+ * This could take between 750ms - 1000ms in time. -+ */ -+ i = 0; -+ w = READ_REG(sc, SAFE_RNG_OUT); -+ do { -+ v = READ_REG(sc, SAFE_RNG_OUT); -+ if (v != w) { -+ w = v; -+ break; -+ } -+ DELAY(10); -+ } while (++i < SAFE_RNG_MAXWAIT); -+ -+ /* Wait Until data changes again */ -+ i = 0; -+ do { -+ v = READ_REG(sc, SAFE_RNG_OUT); -+ if (v != w) -+ break; -+ DELAY(10); -+ } while (++i < SAFE_RNG_MAXWAIT); -+} -+ -+static __inline void -+safe_rng_disable_short_cycle(struct safe_softc *sc) -+{ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ WRITE_REG(sc, SAFE_RNG_CTRL, -+ READ_REG(sc, SAFE_RNG_CTRL) &~ SAFE_RNG_CTRL_SHORTEN); -+} -+ -+static __inline void -+safe_rng_enable_short_cycle(struct safe_softc *sc) -+{ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ WRITE_REG(sc, SAFE_RNG_CTRL, -+ READ_REG(sc, SAFE_RNG_CTRL) | SAFE_RNG_CTRL_SHORTEN); -+} -+ -+static __inline u_int32_t -+safe_rng_read(struct safe_softc *sc) -+{ -+ int i; -+ -+ i = 0; -+ while (READ_REG(sc, SAFE_RNG_STAT) != 0 && ++i < SAFE_RNG_MAXWAIT) -+ ; -+ return READ_REG(sc, SAFE_RNG_OUT); -+} -+ -+static int -+safe_read_random(void *arg, u_int32_t *buf, int maxwords) -+{ -+ struct safe_softc *sc = (struct safe_softc *) arg; -+ int i, rc; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ safestats.st_rng++; -+ /* -+ * Fetch the next block of data. -+ */ -+ if (maxwords > safe_rngbufsize) -+ maxwords = safe_rngbufsize; -+ if (maxwords > SAFE_RNG_MAXBUFSIZ) -+ maxwords = SAFE_RNG_MAXBUFSIZ; -+retry: -+ /* read as much as we can */ -+ for (rc = 0; rc < maxwords; rc++) { -+ if (READ_REG(sc, SAFE_RNG_STAT) != 0) -+ break; -+ buf[rc] = READ_REG(sc, SAFE_RNG_OUT); -+ } -+ if (rc == 0) -+ return 0; -+ /* -+ * Check the comparator alarm count and reset the h/w if -+ * it exceeds our threshold. This guards against the -+ * hardware oscillators resonating with external signals. -+ */ -+ if (READ_REG(sc, SAFE_RNG_ALM_CNT) > safe_rngmaxalarm) { -+ u_int32_t freq_inc, w; -+ -+ DPRINTF(("%s: alarm count %u exceeds threshold %u\n", __func__, -+ (unsigned)READ_REG(sc, SAFE_RNG_ALM_CNT), safe_rngmaxalarm)); -+ safestats.st_rngalarm++; -+ safe_rng_enable_short_cycle(sc); -+ freq_inc = 18; -+ for (i = 0; i < 64; i++) { -+ w = READ_REG(sc, SAFE_RNG_CNFG); -+ freq_inc = ((w + freq_inc) & 0x3fL); -+ w = ((w & ~0x3fL) | freq_inc); -+ WRITE_REG(sc, SAFE_RNG_CNFG, w); -+ -+ WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0); -+ -+ (void) safe_rng_read(sc); -+ DELAY(25); -+ -+ if (READ_REG(sc, SAFE_RNG_ALM_CNT) == 0) { -+ safe_rng_disable_short_cycle(sc); -+ goto retry; -+ } -+ freq_inc = 1; -+ } -+ safe_rng_disable_short_cycle(sc); -+ } else -+ WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0); -+ -+ return(rc); -+} -+#endif /* defined(CONFIG_OCF_RANDOMHARVEST) && !defined(SAFE_NO_RNG) */ -+ -+ -+/* -+ * Resets the board. Values in the regesters are left as is -+ * from the reset (i.e. initial values are assigned elsewhere). -+ */ -+static void -+safe_reset_board(struct safe_softc *sc) -+{ -+ u_int32_t v; -+ /* -+ * Reset the device. The manual says no delay -+ * is needed between marking and clearing reset. -+ */ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ v = READ_REG(sc, SAFE_PE_DMACFG) &~ -+ (SAFE_PE_DMACFG_PERESET | SAFE_PE_DMACFG_PDRRESET | -+ SAFE_PE_DMACFG_SGRESET); -+ WRITE_REG(sc, SAFE_PE_DMACFG, v -+ | SAFE_PE_DMACFG_PERESET -+ | SAFE_PE_DMACFG_PDRRESET -+ | SAFE_PE_DMACFG_SGRESET); -+ WRITE_REG(sc, SAFE_PE_DMACFG, v); -+} -+ -+/* -+ * Initialize registers we need to touch only once. -+ */ -+static void -+safe_init_board(struct safe_softc *sc) -+{ -+ u_int32_t v, dwords; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ v = READ_REG(sc, SAFE_PE_DMACFG); -+ v &=~ ( SAFE_PE_DMACFG_PEMODE -+ | SAFE_PE_DMACFG_FSENA /* failsafe enable */ -+ | SAFE_PE_DMACFG_GPRPCI /* gather ring on PCI */ -+ | SAFE_PE_DMACFG_SPRPCI /* scatter ring on PCI */ -+ | SAFE_PE_DMACFG_ESDESC /* endian-swap descriptors */ -+ | SAFE_PE_DMACFG_ESPDESC /* endian-swap part. desc's */ -+ | SAFE_PE_DMACFG_ESSA /* endian-swap SA's */ -+ | SAFE_PE_DMACFG_ESPACKET /* swap the packet data */ -+ ); -+ v |= SAFE_PE_DMACFG_FSENA /* failsafe enable */ -+ | SAFE_PE_DMACFG_GPRPCI /* gather ring on PCI */ -+ | SAFE_PE_DMACFG_SPRPCI /* scatter ring on PCI */ -+ | SAFE_PE_DMACFG_ESDESC /* endian-swap descriptors */ -+ | SAFE_PE_DMACFG_ESPDESC /* endian-swap part. desc's */ -+ | SAFE_PE_DMACFG_ESSA /* endian-swap SA's */ -+#if 0 -+ | SAFE_PE_DMACFG_ESPACKET /* swap the packet data */ -+#endif -+ ; -+ WRITE_REG(sc, SAFE_PE_DMACFG, v); -+ -+#ifdef __BIG_ENDIAN -+ /* tell the safenet that we are 4321 and not 1234 */ -+ WRITE_REG(sc, SAFE_ENDIAN, 0xe4e41b1b); -+#endif -+ -+ if (sc->sc_chiprev == SAFE_REV(1,0)) { -+ /* -+ * Avoid large PCI DMA transfers. Rev 1.0 has a bug where -+ * "target mode transfers" done while the chip is DMA'ing -+ * >1020 bytes cause the hardware to lockup. To avoid this -+ * we reduce the max PCI transfer size and use small source -+ * particle descriptors (<= 256 bytes). -+ */ -+ WRITE_REG(sc, SAFE_DMA_CFG, 256); -+ device_printf(sc->sc_dev, -+ "Reduce max DMA size to %u words for rev %u.%u WAR\n", -+ (unsigned) ((READ_REG(sc, SAFE_DMA_CFG)>>2) & 0xff), -+ (unsigned) SAFE_REV_MAJ(sc->sc_chiprev), -+ (unsigned) SAFE_REV_MIN(sc->sc_chiprev)); -+ sc->sc_max_dsize = 256; -+ } else { -+ sc->sc_max_dsize = SAFE_MAX_DSIZE; -+ } -+ -+ /* NB: operands+results are overlaid */ -+ WRITE_REG(sc, SAFE_PE_PDRBASE, sc->sc_ringalloc.dma_paddr); -+ WRITE_REG(sc, SAFE_PE_RDRBASE, sc->sc_ringalloc.dma_paddr); -+ /* -+ * Configure ring entry size and number of items in the ring. -+ */ -+ KASSERT((sizeof(struct safe_ringentry) % sizeof(u_int32_t)) == 0, -+ ("PE ring entry not 32-bit aligned!")); -+ dwords = sizeof(struct safe_ringentry) / sizeof(u_int32_t); -+ WRITE_REG(sc, SAFE_PE_RINGCFG, -+ (dwords << SAFE_PE_RINGCFG_OFFSET_S) | SAFE_MAX_NQUEUE); -+ WRITE_REG(sc, SAFE_PE_RINGPOLL, 0); /* disable polling */ -+ -+ WRITE_REG(sc, SAFE_PE_GRNGBASE, sc->sc_spalloc.dma_paddr); -+ WRITE_REG(sc, SAFE_PE_SRNGBASE, sc->sc_dpalloc.dma_paddr); -+ WRITE_REG(sc, SAFE_PE_PARTSIZE, -+ (SAFE_TOTAL_DPART<<16) | SAFE_TOTAL_SPART); -+ /* -+ * NB: destination particles are fixed size. We use -+ * an mbuf cluster and require all results go to -+ * clusters or smaller. -+ */ -+ WRITE_REG(sc, SAFE_PE_PARTCFG, sc->sc_max_dsize); -+ -+ /* it's now safe to enable PE mode, do it */ -+ WRITE_REG(sc, SAFE_PE_DMACFG, v | SAFE_PE_DMACFG_PEMODE); -+ -+ /* -+ * Configure hardware to use level-triggered interrupts and -+ * to interrupt after each descriptor is processed. -+ */ -+ WRITE_REG(sc, SAFE_HI_CFG, SAFE_HI_CFG_LEVEL); -+ WRITE_REG(sc, SAFE_HI_CLR, 0xffffffff); -+ WRITE_REG(sc, SAFE_HI_DESC_CNT, 1); -+ WRITE_REG(sc, SAFE_HI_MASK, SAFE_INT_PE_DDONE | SAFE_INT_PE_ERROR); -+} -+ -+ -+/* -+ * Clean up after a chip crash. -+ * It is assumed that the caller in splimp() -+ */ -+static void -+safe_cleanchip(struct safe_softc *sc) -+{ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (sc->sc_nqchip != 0) { -+ struct safe_ringentry *re = sc->sc_back; -+ -+ while (re != sc->sc_front) { -+ if (re->re_desc.d_csr != 0) -+ safe_free_entry(sc, re); -+ if (++re == sc->sc_ringtop) -+ re = sc->sc_ring; -+ } -+ sc->sc_back = re; -+ sc->sc_nqchip = 0; -+ } -+} -+ -+/* -+ * free a safe_q -+ * It is assumed that the caller is within splimp(). -+ */ -+static int -+safe_free_entry(struct safe_softc *sc, struct safe_ringentry *re) -+{ -+ struct cryptop *crp; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ /* -+ * Free header MCR -+ */ -+ if ((re->re_dst_skb != NULL) && (re->re_src_skb != re->re_dst_skb)) -+#ifdef NOTYET -+ m_freem(re->re_dst_m); -+#else -+ printk("%s,%d: SKB not supported\n", __FILE__, __LINE__); -+#endif -+ -+ crp = (struct cryptop *)re->re_crp; -+ -+ re->re_desc.d_csr = 0; -+ -+ crp->crp_etype = EFAULT; -+ crypto_done(crp); -+ return(0); -+} -+ -+/* -+ * Routine to reset the chip and clean up. -+ * It is assumed that the caller is in splimp() -+ */ -+static void -+safe_totalreset(struct safe_softc *sc) -+{ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ safe_reset_board(sc); -+ safe_init_board(sc); -+ safe_cleanchip(sc); -+} -+ -+/* -+ * Is the operand suitable aligned for direct DMA. Each -+ * segment must be aligned on a 32-bit boundary and all -+ * but the last segment must be a multiple of 4 bytes. -+ */ -+static int -+safe_dmamap_aligned(struct safe_softc *sc, const struct safe_operand *op) -+{ -+ int i; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ for (i = 0; i < op->nsegs; i++) { -+ if (op->segs[i].ds_addr & 3) -+ return (0); -+ if (i != (op->nsegs - 1) && (op->segs[i].ds_len & 3)) -+ return (0); -+ } -+ return (1); -+} -+ -+/* -+ * Is the operand suitable for direct DMA as the destination -+ * of an operation. The hardware requires that each ``particle'' -+ * but the last in an operation result have the same size. We -+ * fix that size at SAFE_MAX_DSIZE bytes. This routine returns -+ * 0 if some segment is not a multiple of of this size, 1 if all -+ * segments are exactly this size, or 2 if segments are at worst -+ * a multple of this size. -+ */ -+static int -+safe_dmamap_uniform(struct safe_softc *sc, const struct safe_operand *op) -+{ -+ int result = 1; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (op->nsegs > 0) { -+ int i; -+ -+ for (i = 0; i < op->nsegs-1; i++) { -+ if (op->segs[i].ds_len % sc->sc_max_dsize) -+ return (0); -+ if (op->segs[i].ds_len != sc->sc_max_dsize) -+ result = 2; -+ } -+ } -+ return (result); -+} -+ -+static int -+safe_kprocess(device_t dev, struct cryptkop *krp, int hint) -+{ -+ struct safe_softc *sc = device_get_softc(dev); -+ struct safe_pkq *q; -+ unsigned long flags; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (sc == NULL) { -+ krp->krp_status = EINVAL; -+ goto err; -+ } -+ -+ if (krp->krp_op != CRK_MOD_EXP) { -+ krp->krp_status = EOPNOTSUPP; -+ goto err; -+ } -+ -+ q = (struct safe_pkq *) kmalloc(sizeof(*q), GFP_KERNEL); -+ if (q == NULL) { -+ krp->krp_status = ENOMEM; -+ goto err; -+ } -+ memset(q, 0, sizeof(*q)); -+ q->pkq_krp = krp; -+ INIT_LIST_HEAD(&q->pkq_list); -+ -+ spin_lock_irqsave(&sc->sc_pkmtx, flags); -+ list_add_tail(&q->pkq_list, &sc->sc_pkq); -+ safe_kfeed(sc); -+ spin_unlock_irqrestore(&sc->sc_pkmtx, flags); -+ return (0); -+ -+err: -+ crypto_kdone(krp); -+ return (0); -+} -+ -+#define SAFE_CRK_PARAM_BASE 0 -+#define SAFE_CRK_PARAM_EXP 1 -+#define SAFE_CRK_PARAM_MOD 2 -+ -+static int -+safe_kstart(struct safe_softc *sc) -+{ -+ struct cryptkop *krp = sc->sc_pkq_cur->pkq_krp; -+ int exp_bits, mod_bits, base_bits; -+ u_int32_t op, a_off, b_off, c_off, d_off; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (krp->krp_iparams < 3 || krp->krp_oparams != 1) { -+ krp->krp_status = EINVAL; -+ return (1); -+ } -+ -+ base_bits = safe_ksigbits(sc, &krp->krp_param[SAFE_CRK_PARAM_BASE]); -+ if (base_bits > 2048) -+ goto too_big; -+ if (base_bits <= 0) /* 5. base not zero */ -+ goto too_small; -+ -+ exp_bits = safe_ksigbits(sc, &krp->krp_param[SAFE_CRK_PARAM_EXP]); -+ if (exp_bits > 2048) -+ goto too_big; -+ if (exp_bits <= 0) /* 1. exponent word length > 0 */ -+ goto too_small; /* 4. exponent not zero */ -+ -+ mod_bits = safe_ksigbits(sc, &krp->krp_param[SAFE_CRK_PARAM_MOD]); -+ if (mod_bits > 2048) -+ goto too_big; -+ if (mod_bits <= 32) /* 2. modulus word length > 1 */ -+ goto too_small; /* 8. MSW of modulus != zero */ -+ if (mod_bits < exp_bits) /* 3 modulus len >= exponent len */ -+ goto too_small; -+ if ((krp->krp_param[SAFE_CRK_PARAM_MOD].crp_p[0] & 1) == 0) -+ goto bad_domain; /* 6. modulus is odd */ -+ if (mod_bits > krp->krp_param[krp->krp_iparams].crp_nbits) -+ goto too_small; /* make sure result will fit */ -+ -+ /* 7. modulus > base */ -+ if (mod_bits < base_bits) -+ goto too_small; -+ if (mod_bits == base_bits) { -+ u_int8_t *basep, *modp; -+ int i; -+ -+ basep = krp->krp_param[SAFE_CRK_PARAM_BASE].crp_p + -+ ((base_bits + 7) / 8) - 1; -+ modp = krp->krp_param[SAFE_CRK_PARAM_MOD].crp_p + -+ ((mod_bits + 7) / 8) - 1; -+ -+ for (i = 0; i < (mod_bits + 7) / 8; i++, basep--, modp--) { -+ if (*modp < *basep) -+ goto too_small; -+ if (*modp > *basep) -+ break; -+ } -+ } -+ -+ /* And on the 9th step, he rested. */ -+ -+ WRITE_REG(sc, SAFE_PK_A_LEN, (exp_bits + 31) / 32); -+ WRITE_REG(sc, SAFE_PK_B_LEN, (mod_bits + 31) / 32); -+ if (mod_bits > 1024) { -+ op = SAFE_PK_FUNC_EXP4; -+ a_off = 0x000; -+ b_off = 0x100; -+ c_off = 0x200; -+ d_off = 0x300; -+ } else { -+ op = SAFE_PK_FUNC_EXP16; -+ a_off = 0x000; -+ b_off = 0x080; -+ c_off = 0x100; -+ d_off = 0x180; -+ } -+ sc->sc_pk_reslen = b_off - a_off; -+ sc->sc_pk_resoff = d_off; -+ -+ /* A is exponent, B is modulus, C is base, D is result */ -+ safe_kload_reg(sc, a_off, b_off - a_off, -+ &krp->krp_param[SAFE_CRK_PARAM_EXP]); -+ WRITE_REG(sc, SAFE_PK_A_ADDR, a_off >> 2); -+ safe_kload_reg(sc, b_off, b_off - a_off, -+ &krp->krp_param[SAFE_CRK_PARAM_MOD]); -+ WRITE_REG(sc, SAFE_PK_B_ADDR, b_off >> 2); -+ safe_kload_reg(sc, c_off, b_off - a_off, -+ &krp->krp_param[SAFE_CRK_PARAM_BASE]); -+ WRITE_REG(sc, SAFE_PK_C_ADDR, c_off >> 2); -+ WRITE_REG(sc, SAFE_PK_D_ADDR, d_off >> 2); -+ -+ WRITE_REG(sc, SAFE_PK_FUNC, op | SAFE_PK_FUNC_RUN); -+ -+ return (0); -+ -+too_big: -+ krp->krp_status = E2BIG; -+ return (1); -+too_small: -+ krp->krp_status = ERANGE; -+ return (1); -+bad_domain: -+ krp->krp_status = EDOM; -+ return (1); -+} -+ -+static int -+safe_ksigbits(struct safe_softc *sc, struct crparam *cr) -+{ -+ u_int plen = (cr->crp_nbits + 7) / 8; -+ int i, sig = plen * 8; -+ u_int8_t c, *p = cr->crp_p; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ for (i = plen - 1; i >= 0; i--) { -+ c = p[i]; -+ if (c != 0) { -+ while ((c & 0x80) == 0) { -+ sig--; -+ c <<= 1; -+ } -+ break; -+ } -+ sig -= 8; -+ } -+ return (sig); -+} -+ -+static void -+safe_kfeed(struct safe_softc *sc) -+{ -+ struct safe_pkq *q, *tmp; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (list_empty(&sc->sc_pkq) && sc->sc_pkq_cur == NULL) -+ return; -+ if (sc->sc_pkq_cur != NULL) -+ return; -+ list_for_each_entry_safe(q, tmp, &sc->sc_pkq, pkq_list) { -+ sc->sc_pkq_cur = q; -+ list_del(&q->pkq_list); -+ if (safe_kstart(sc) != 0) { -+ crypto_kdone(q->pkq_krp); -+ kfree(q); -+ sc->sc_pkq_cur = NULL; -+ } else { -+ /* op started, start polling */ -+ mod_timer(&sc->sc_pkto, jiffies + 1); -+ break; -+ } -+ } -+} -+ -+static void -+safe_kpoll(unsigned long arg) -+{ -+ struct safe_softc *sc = NULL; -+ struct safe_pkq *q; -+ struct crparam *res; -+ int i; -+ u_int32_t buf[64]; -+ unsigned long flags; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (arg >= SAFE_MAX_CHIPS) -+ return; -+ sc = safe_chip_idx[arg]; -+ if (!sc) { -+ DPRINTF(("%s() - bad callback\n", __FUNCTION__)); -+ return; -+ } -+ -+ spin_lock_irqsave(&sc->sc_pkmtx, flags); -+ if (sc->sc_pkq_cur == NULL) -+ goto out; -+ if (READ_REG(sc, SAFE_PK_FUNC) & SAFE_PK_FUNC_RUN) { -+ /* still running, check back later */ -+ mod_timer(&sc->sc_pkto, jiffies + 1); -+ goto out; -+ } -+ -+ q = sc->sc_pkq_cur; -+ res = &q->pkq_krp->krp_param[q->pkq_krp->krp_iparams]; -+ bzero(buf, sizeof(buf)); -+ bzero(res->crp_p, (res->crp_nbits + 7) / 8); -+ for (i = 0; i < sc->sc_pk_reslen >> 2; i++) -+ buf[i] = le32_to_cpu(READ_REG(sc, SAFE_PK_RAM_START + -+ sc->sc_pk_resoff + (i << 2))); -+ bcopy(buf, res->crp_p, (res->crp_nbits + 7) / 8); -+ /* -+ * reduce the bits that need copying if possible -+ */ -+ res->crp_nbits = min(res->crp_nbits,sc->sc_pk_reslen * 8); -+ res->crp_nbits = safe_ksigbits(sc, res); -+ -+ for (i = SAFE_PK_RAM_START; i < SAFE_PK_RAM_END; i += 4) -+ WRITE_REG(sc, i, 0); -+ -+ crypto_kdone(q->pkq_krp); -+ kfree(q); -+ sc->sc_pkq_cur = NULL; -+ -+ safe_kfeed(sc); -+out: -+ spin_unlock_irqrestore(&sc->sc_pkmtx, flags); -+} -+ -+static void -+safe_kload_reg(struct safe_softc *sc, u_int32_t off, u_int32_t len, -+ struct crparam *n) -+{ -+ u_int32_t buf[64], i; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ bzero(buf, sizeof(buf)); -+ bcopy(n->crp_p, buf, (n->crp_nbits + 7) / 8); -+ -+ for (i = 0; i < len >> 2; i++) -+ WRITE_REG(sc, SAFE_PK_RAM_START + off + (i << 2), -+ cpu_to_le32(buf[i])); -+} -+ -+#ifdef SAFE_DEBUG -+static void -+safe_dump_dmastatus(struct safe_softc *sc, const char *tag) -+{ -+ printf("%s: ENDIAN 0x%x SRC 0x%x DST 0x%x STAT 0x%x\n" -+ , tag -+ , READ_REG(sc, SAFE_DMA_ENDIAN) -+ , READ_REG(sc, SAFE_DMA_SRCADDR) -+ , READ_REG(sc, SAFE_DMA_DSTADDR) -+ , READ_REG(sc, SAFE_DMA_STAT) -+ ); -+} -+ -+static void -+safe_dump_intrstate(struct safe_softc *sc, const char *tag) -+{ -+ printf("%s: HI_CFG 0x%x HI_MASK 0x%x HI_DESC_CNT 0x%x HU_STAT 0x%x HM_STAT 0x%x\n" -+ , tag -+ , READ_REG(sc, SAFE_HI_CFG) -+ , READ_REG(sc, SAFE_HI_MASK) -+ , READ_REG(sc, SAFE_HI_DESC_CNT) -+ , READ_REG(sc, SAFE_HU_STAT) -+ , READ_REG(sc, SAFE_HM_STAT) -+ ); -+} -+ -+static void -+safe_dump_ringstate(struct safe_softc *sc, const char *tag) -+{ -+ u_int32_t estat = READ_REG(sc, SAFE_PE_ERNGSTAT); -+ -+ /* NB: assume caller has lock on ring */ -+ printf("%s: ERNGSTAT %x (next %u) back %lu front %lu\n", -+ tag, -+ estat, (estat >> SAFE_PE_ERNGSTAT_NEXT_S), -+ (unsigned long)(sc->sc_back - sc->sc_ring), -+ (unsigned long)(sc->sc_front - sc->sc_ring)); -+} -+ -+static void -+safe_dump_request(struct safe_softc *sc, const char* tag, struct safe_ringentry *re) -+{ -+ int ix, nsegs; -+ -+ ix = re - sc->sc_ring; -+ printf("%s: %p (%u): csr %x src %x dst %x sa %x len %x\n" -+ , tag -+ , re, ix -+ , re->re_desc.d_csr -+ , re->re_desc.d_src -+ , re->re_desc.d_dst -+ , re->re_desc.d_sa -+ , re->re_desc.d_len -+ ); -+ if (re->re_src.nsegs > 1) { -+ ix = (re->re_desc.d_src - sc->sc_spalloc.dma_paddr) / -+ sizeof(struct safe_pdesc); -+ for (nsegs = re->re_src.nsegs; nsegs; nsegs--) { -+ printf(" spd[%u] %p: %p size %u flags %x" -+ , ix, &sc->sc_spring[ix] -+ , (caddr_t)(uintptr_t) sc->sc_spring[ix].pd_addr -+ , sc->sc_spring[ix].pd_size -+ , sc->sc_spring[ix].pd_flags -+ ); -+ if (sc->sc_spring[ix].pd_size == 0) -+ printf(" (zero!)"); -+ printf("\n"); -+ if (++ix == SAFE_TOTAL_SPART) -+ ix = 0; -+ } -+ } -+ if (re->re_dst.nsegs > 1) { -+ ix = (re->re_desc.d_dst - sc->sc_dpalloc.dma_paddr) / -+ sizeof(struct safe_pdesc); -+ for (nsegs = re->re_dst.nsegs; nsegs; nsegs--) { -+ printf(" dpd[%u] %p: %p flags %x\n" -+ , ix, &sc->sc_dpring[ix] -+ , (caddr_t)(uintptr_t) sc->sc_dpring[ix].pd_addr -+ , sc->sc_dpring[ix].pd_flags -+ ); -+ if (++ix == SAFE_TOTAL_DPART) -+ ix = 0; -+ } -+ } -+ printf("sa: cmd0 %08x cmd1 %08x staterec %x\n", -+ re->re_sa.sa_cmd0, re->re_sa.sa_cmd1, re->re_sa.sa_staterec); -+ printf("sa: key %x %x %x %x %x %x %x %x\n" -+ , re->re_sa.sa_key[0] -+ , re->re_sa.sa_key[1] -+ , re->re_sa.sa_key[2] -+ , re->re_sa.sa_key[3] -+ , re->re_sa.sa_key[4] -+ , re->re_sa.sa_key[5] -+ , re->re_sa.sa_key[6] -+ , re->re_sa.sa_key[7] -+ ); -+ printf("sa: indigest %x %x %x %x %x\n" -+ , re->re_sa.sa_indigest[0] -+ , re->re_sa.sa_indigest[1] -+ , re->re_sa.sa_indigest[2] -+ , re->re_sa.sa_indigest[3] -+ , re->re_sa.sa_indigest[4] -+ ); -+ printf("sa: outdigest %x %x %x %x %x\n" -+ , re->re_sa.sa_outdigest[0] -+ , re->re_sa.sa_outdigest[1] -+ , re->re_sa.sa_outdigest[2] -+ , re->re_sa.sa_outdigest[3] -+ , re->re_sa.sa_outdigest[4] -+ ); -+ printf("sr: iv %x %x %x %x\n" -+ , re->re_sastate.sa_saved_iv[0] -+ , re->re_sastate.sa_saved_iv[1] -+ , re->re_sastate.sa_saved_iv[2] -+ , re->re_sastate.sa_saved_iv[3] -+ ); -+ printf("sr: hashbc %u indigest %x %x %x %x %x\n" -+ , re->re_sastate.sa_saved_hashbc -+ , re->re_sastate.sa_saved_indigest[0] -+ , re->re_sastate.sa_saved_indigest[1] -+ , re->re_sastate.sa_saved_indigest[2] -+ , re->re_sastate.sa_saved_indigest[3] -+ , re->re_sastate.sa_saved_indigest[4] -+ ); -+} -+ -+static void -+safe_dump_ring(struct safe_softc *sc, const char *tag) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&sc->sc_ringmtx, flags); -+ printf("\nSafeNet Ring State:\n"); -+ safe_dump_intrstate(sc, tag); -+ safe_dump_dmastatus(sc, tag); -+ safe_dump_ringstate(sc, tag); -+ if (sc->sc_nqchip) { -+ struct safe_ringentry *re = sc->sc_back; -+ do { -+ safe_dump_request(sc, tag, re); -+ if (++re == sc->sc_ringtop) -+ re = sc->sc_ring; -+ } while (re != sc->sc_front); -+ } -+ spin_unlock_irqrestore(&sc->sc_ringmtx, flags); -+} -+#endif /* SAFE_DEBUG */ -+ -+ -+static int safe_probe(struct pci_dev *dev, const struct pci_device_id *ent) -+{ -+ struct safe_softc *sc = NULL; -+ u32 mem_start, mem_len, cmd; -+ int i, rc, devinfo; -+ dma_addr_t raddr; -+ static int num_chips = 0; -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ if (pci_enable_device(dev) < 0) -+ return(-ENODEV); -+ -+ if (!dev->irq) { -+ printk("safe: found device with no IRQ assigned. check BIOS settings!"); -+ pci_disable_device(dev); -+ return(-ENODEV); -+ } -+ -+ if (pci_set_mwi(dev)) { -+ printk("safe: pci_set_mwi failed!"); -+ return(-ENODEV); -+ } -+ -+ sc = (struct safe_softc *) kmalloc(sizeof(*sc), GFP_KERNEL); -+ if (!sc) -+ return(-ENOMEM); -+ memset(sc, 0, sizeof(*sc)); -+ -+ softc_device_init(sc, "safe", num_chips, safe_methods); -+ -+ sc->sc_irq = -1; -+ sc->sc_cid = -1; -+ sc->sc_pcidev = dev; -+ if (num_chips < SAFE_MAX_CHIPS) { -+ safe_chip_idx[device_get_unit(sc->sc_dev)] = sc; -+ num_chips++; -+ } -+ -+ INIT_LIST_HEAD(&sc->sc_pkq); -+ spin_lock_init(&sc->sc_pkmtx); -+ -+ pci_set_drvdata(sc->sc_pcidev, sc); -+ -+ /* we read its hardware registers as memory */ -+ mem_start = pci_resource_start(sc->sc_pcidev, 0); -+ mem_len = pci_resource_len(sc->sc_pcidev, 0); -+ -+ sc->sc_base_addr = (ocf_iomem_t) ioremap(mem_start, mem_len); -+ if (!sc->sc_base_addr) { -+ device_printf(sc->sc_dev, "failed to ioremap 0x%x-0x%x\n", -+ mem_start, mem_start + mem_len - 1); -+ goto out; -+ } -+ -+ /* fix up the bus size */ -+ if (pci_set_dma_mask(sc->sc_pcidev, DMA_32BIT_MASK)) { -+ device_printf(sc->sc_dev, "No usable DMA configuration, aborting.\n"); -+ goto out; -+ } -+ if (pci_set_consistent_dma_mask(sc->sc_pcidev, DMA_32BIT_MASK)) { -+ device_printf(sc->sc_dev, "No usable consistent DMA configuration, aborting.\n"); -+ goto out; -+ } -+ -+ pci_set_master(sc->sc_pcidev); -+ -+ pci_read_config_dword(sc->sc_pcidev, PCI_COMMAND, &cmd); -+ -+ if (!(cmd & PCI_COMMAND_MEMORY)) { -+ device_printf(sc->sc_dev, "failed to enable memory mapping\n"); -+ goto out; -+ } -+ -+ if (!(cmd & PCI_COMMAND_MASTER)) { -+ device_printf(sc->sc_dev, "failed to enable bus mastering\n"); -+ goto out; -+ } -+ -+ rc = request_irq(dev->irq, safe_intr, IRQF_SHARED, "safe", sc); -+ if (rc) { -+ device_printf(sc->sc_dev, "failed to hook irq %d\n", sc->sc_irq); -+ goto out; -+ } -+ sc->sc_irq = dev->irq; -+ -+ sc->sc_chiprev = READ_REG(sc, SAFE_DEVINFO) & -+ (SAFE_DEVINFO_REV_MAJ | SAFE_DEVINFO_REV_MIN); -+ -+ /* -+ * Allocate packet engine descriptors. -+ */ -+ sc->sc_ringalloc.dma_vaddr = pci_alloc_consistent(sc->sc_pcidev, -+ SAFE_MAX_NQUEUE * sizeof (struct safe_ringentry), -+ &sc->sc_ringalloc.dma_paddr); -+ if (!sc->sc_ringalloc.dma_vaddr) { -+ device_printf(sc->sc_dev, "cannot allocate PE descriptor ring\n"); -+ goto out; -+ } -+ -+ /* -+ * Hookup the static portion of all our data structures. -+ */ -+ sc->sc_ring = (struct safe_ringentry *) sc->sc_ringalloc.dma_vaddr; -+ sc->sc_ringtop = sc->sc_ring + SAFE_MAX_NQUEUE; -+ sc->sc_front = sc->sc_ring; -+ sc->sc_back = sc->sc_ring; -+ raddr = sc->sc_ringalloc.dma_paddr; -+ bzero(sc->sc_ring, SAFE_MAX_NQUEUE * sizeof(struct safe_ringentry)); -+ for (i = 0; i < SAFE_MAX_NQUEUE; i++) { -+ struct safe_ringentry *re = &sc->sc_ring[i]; -+ -+ re->re_desc.d_sa = raddr + -+ offsetof(struct safe_ringentry, re_sa); -+ re->re_sa.sa_staterec = raddr + -+ offsetof(struct safe_ringentry, re_sastate); -+ -+ raddr += sizeof (struct safe_ringentry); -+ } -+ spin_lock_init(&sc->sc_ringmtx); -+ -+ /* -+ * Allocate scatter and gather particle descriptors. -+ */ -+ sc->sc_spalloc.dma_vaddr = pci_alloc_consistent(sc->sc_pcidev, -+ SAFE_TOTAL_SPART * sizeof (struct safe_pdesc), -+ &sc->sc_spalloc.dma_paddr); -+ if (!sc->sc_spalloc.dma_vaddr) { -+ device_printf(sc->sc_dev, "cannot allocate source particle descriptor ring\n"); -+ goto out; -+ } -+ sc->sc_spring = (struct safe_pdesc *) sc->sc_spalloc.dma_vaddr; -+ sc->sc_springtop = sc->sc_spring + SAFE_TOTAL_SPART; -+ sc->sc_spfree = sc->sc_spring; -+ bzero(sc->sc_spring, SAFE_TOTAL_SPART * sizeof(struct safe_pdesc)); -+ -+ sc->sc_dpalloc.dma_vaddr = pci_alloc_consistent(sc->sc_pcidev, -+ SAFE_TOTAL_DPART * sizeof (struct safe_pdesc), -+ &sc->sc_dpalloc.dma_paddr); -+ if (!sc->sc_dpalloc.dma_vaddr) { -+ device_printf(sc->sc_dev, "cannot allocate destination particle descriptor ring\n"); -+ goto out; -+ } -+ sc->sc_dpring = (struct safe_pdesc *) sc->sc_dpalloc.dma_vaddr; -+ sc->sc_dpringtop = sc->sc_dpring + SAFE_TOTAL_DPART; -+ sc->sc_dpfree = sc->sc_dpring; -+ bzero(sc->sc_dpring, SAFE_TOTAL_DPART * sizeof(struct safe_pdesc)); -+ -+ sc->sc_cid = crypto_get_driverid(softc_get_device(sc), CRYPTOCAP_F_HARDWARE); -+ if (sc->sc_cid < 0) { -+ device_printf(sc->sc_dev, "could not get crypto driver id\n"); -+ goto out; -+ } -+ -+ printf("%s:", device_get_nameunit(sc->sc_dev)); -+ -+ devinfo = READ_REG(sc, SAFE_DEVINFO); -+ if (devinfo & SAFE_DEVINFO_RNG) { -+ sc->sc_flags |= SAFE_FLAGS_RNG; -+ printf(" rng"); -+ } -+ if (devinfo & SAFE_DEVINFO_PKEY) { -+ printf(" key"); -+ sc->sc_flags |= SAFE_FLAGS_KEY; -+ crypto_kregister(sc->sc_cid, CRK_MOD_EXP, 0); -+#if 0 -+ crypto_kregister(sc->sc_cid, CRK_MOD_EXP_CRT, 0); -+#endif -+ init_timer(&sc->sc_pkto); -+ sc->sc_pkto.function = safe_kpoll; -+ sc->sc_pkto.data = (unsigned long) device_get_unit(sc->sc_dev); -+ } -+ if (devinfo & SAFE_DEVINFO_DES) { -+ printf(" des/3des"); -+ crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0); -+ } -+ if (devinfo & SAFE_DEVINFO_AES) { -+ printf(" aes"); -+ crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0); -+ } -+ if (devinfo & SAFE_DEVINFO_MD5) { -+ printf(" md5"); -+ crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0); -+ } -+ if (devinfo & SAFE_DEVINFO_SHA1) { -+ printf(" sha1"); -+ crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0); -+ } -+ printf(" null"); -+ crypto_register(sc->sc_cid, CRYPTO_NULL_CBC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_NULL_HMAC, 0, 0); -+ /* XXX other supported algorithms */ -+ printf("\n"); -+ -+ safe_reset_board(sc); /* reset h/w */ -+ safe_init_board(sc); /* init h/w */ -+ -+#if defined(CONFIG_OCF_RANDOMHARVEST) && !defined(SAFE_NO_RNG) -+ if (sc->sc_flags & SAFE_FLAGS_RNG) { -+ safe_rng_init(sc); -+ crypto_rregister(sc->sc_cid, safe_read_random, sc); -+ } -+#endif /* SAFE_NO_RNG */ -+ -+ return (0); -+ -+out: -+ if (sc->sc_cid >= 0) -+ crypto_unregister_all(sc->sc_cid); -+ if (sc->sc_irq != -1) -+ free_irq(sc->sc_irq, sc); -+ if (sc->sc_ringalloc.dma_vaddr) -+ pci_free_consistent(sc->sc_pcidev, -+ SAFE_MAX_NQUEUE * sizeof (struct safe_ringentry), -+ sc->sc_ringalloc.dma_vaddr, sc->sc_ringalloc.dma_paddr); -+ if (sc->sc_spalloc.dma_vaddr) -+ pci_free_consistent(sc->sc_pcidev, -+ SAFE_TOTAL_DPART * sizeof (struct safe_pdesc), -+ sc->sc_spalloc.dma_vaddr, sc->sc_spalloc.dma_paddr); -+ if (sc->sc_dpalloc.dma_vaddr) -+ pci_free_consistent(sc->sc_pcidev, -+ SAFE_TOTAL_DPART * sizeof (struct safe_pdesc), -+ sc->sc_dpalloc.dma_vaddr, sc->sc_dpalloc.dma_paddr); -+ kfree(sc); -+ return(-ENODEV); -+} -+ -+static void safe_remove(struct pci_dev *dev) -+{ -+ struct safe_softc *sc = pci_get_drvdata(dev); -+ -+ DPRINTF(("%s()\n", __FUNCTION__)); -+ -+ /* XXX wait/abort active ops */ -+ -+ WRITE_REG(sc, SAFE_HI_MASK, 0); /* disable interrupts */ -+ -+ del_timer_sync(&sc->sc_pkto); -+ -+ crypto_unregister_all(sc->sc_cid); -+ -+ safe_cleanchip(sc); -+ -+ if (sc->sc_irq != -1) -+ free_irq(sc->sc_irq, sc); -+ if (sc->sc_ringalloc.dma_vaddr) -+ pci_free_consistent(sc->sc_pcidev, -+ SAFE_MAX_NQUEUE * sizeof (struct safe_ringentry), -+ sc->sc_ringalloc.dma_vaddr, sc->sc_ringalloc.dma_paddr); -+ if (sc->sc_spalloc.dma_vaddr) -+ pci_free_consistent(sc->sc_pcidev, -+ SAFE_TOTAL_DPART * sizeof (struct safe_pdesc), -+ sc->sc_spalloc.dma_vaddr, sc->sc_spalloc.dma_paddr); -+ if (sc->sc_dpalloc.dma_vaddr) -+ pci_free_consistent(sc->sc_pcidev, -+ SAFE_TOTAL_DPART * sizeof (struct safe_pdesc), -+ sc->sc_dpalloc.dma_vaddr, sc->sc_dpalloc.dma_paddr); -+ sc->sc_irq = -1; -+ sc->sc_ringalloc.dma_vaddr = NULL; -+ sc->sc_spalloc.dma_vaddr = NULL; -+ sc->sc_dpalloc.dma_vaddr = NULL; -+} -+ -+static struct pci_device_id safe_pci_tbl[] = { -+ { PCI_VENDOR_SAFENET, PCI_PRODUCT_SAFEXCEL, -+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(pci, safe_pci_tbl); -+ -+static struct pci_driver safe_driver = { -+ .name = "safe", -+ .id_table = safe_pci_tbl, -+ .probe = safe_probe, -+ .remove = safe_remove, -+ /* add PM stuff here one day */ -+}; -+ -+static int __init safe_init (void) -+{ -+ struct safe_softc *sc = NULL; -+ int rc; -+ -+ DPRINTF(("%s(%p)\n", __FUNCTION__, safe_init)); -+ -+ rc = pci_register_driver(&safe_driver); -+ pci_register_driver_compat(&safe_driver, rc); -+ -+ return rc; -+} -+ -+static void __exit safe_exit (void) -+{ -+ pci_unregister_driver(&safe_driver); -+} -+ -+module_init(safe_init); -+module_exit(safe_exit); -+ -+MODULE_LICENSE("BSD"); -+MODULE_AUTHOR("David McCullough <david_mccullough@mcafee.com>"); -+MODULE_DESCRIPTION("OCF driver for safenet PCI crypto devices"); -diff --git a/crypto/ocf/safe/safereg.h b/crypto/ocf/safe/safereg.h -new file mode 100644 -index 0000000..d3461f9 ---- /dev/null -+++ b/crypto/ocf/safe/safereg.h -@@ -0,0 +1,421 @@ -+/*- -+ * Copyright (c) 2003 Sam Leffler, Errno Consulting -+ * Copyright (c) 2003 Global Technology Associates, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -+ * SUCH DAMAGE. -+ * -+ * $FreeBSD: src/sys/dev/safe/safereg.h,v 1.1 2003/07/21 21:46:07 sam Exp $ -+ */ -+#ifndef _SAFE_SAFEREG_H_ -+#define _SAFE_SAFEREG_H_ -+ -+/* -+ * Register definitions for SafeNet SafeXcel-1141 crypto device. -+ * Definitions from revision 1.3 (Nov 6 2002) of the User's Manual. -+ */ -+ -+#define BS_BAR 0x10 /* DMA base address register */ -+#define BS_TRDY_TIMEOUT 0x40 /* TRDY timeout */ -+#define BS_RETRY_TIMEOUT 0x41 /* DMA retry timeout */ -+ -+#define PCI_VENDOR_SAFENET 0x16ae /* SafeNet, Inc. */ -+ -+/* SafeNet */ -+#define PCI_PRODUCT_SAFEXCEL 0x1141 /* 1141 */ -+ -+#define SAFE_PE_CSR 0x0000 /* Packet Enginge Ctrl/Status */ -+#define SAFE_PE_SRC 0x0004 /* Packet Engine Source */ -+#define SAFE_PE_DST 0x0008 /* Packet Engine Destination */ -+#define SAFE_PE_SA 0x000c /* Packet Engine SA */ -+#define SAFE_PE_LEN 0x0010 /* Packet Engine Length */ -+#define SAFE_PE_DMACFG 0x0040 /* Packet Engine DMA Configuration */ -+#define SAFE_PE_DMASTAT 0x0044 /* Packet Engine DMA Status */ -+#define SAFE_PE_PDRBASE 0x0048 /* Packet Engine Descriptor Ring Base */ -+#define SAFE_PE_RDRBASE 0x004c /* Packet Engine Result Ring Base */ -+#define SAFE_PE_RINGCFG 0x0050 /* Packet Engine Ring Configuration */ -+#define SAFE_PE_RINGPOLL 0x0054 /* Packet Engine Ring Poll */ -+#define SAFE_PE_IRNGSTAT 0x0058 /* Packet Engine Internal Ring Status */ -+#define SAFE_PE_ERNGSTAT 0x005c /* Packet Engine External Ring Status */ -+#define SAFE_PE_IOTHRESH 0x0060 /* Packet Engine I/O Threshold */ -+#define SAFE_PE_GRNGBASE 0x0064 /* Packet Engine Gather Ring Base */ -+#define SAFE_PE_SRNGBASE 0x0068 /* Packet Engine Scatter Ring Base */ -+#define SAFE_PE_PARTSIZE 0x006c /* Packet Engine Particlar Ring Size */ -+#define SAFE_PE_PARTCFG 0x0070 /* Packet Engine Particle Ring Config */ -+#define SAFE_CRYPTO_CTRL 0x0080 /* Crypto Control */ -+#define SAFE_DEVID 0x0084 /* Device ID */ -+#define SAFE_DEVINFO 0x0088 /* Device Info */ -+#define SAFE_HU_STAT 0x00a0 /* Host Unmasked Status */ -+#define SAFE_HM_STAT 0x00a4 /* Host Masked Status (read-only) */ -+#define SAFE_HI_CLR 0x00a4 /* Host Clear Interrupt (write-only) */ -+#define SAFE_HI_MASK 0x00a8 /* Host Mask Control */ -+#define SAFE_HI_CFG 0x00ac /* Interrupt Configuration */ -+#define SAFE_HI_RD_DESCR 0x00b4 /* Force Descriptor Read */ -+#define SAFE_HI_DESC_CNT 0x00b8 /* Host Descriptor Done Count */ -+#define SAFE_DMA_ENDIAN 0x00c0 /* Master Endian Status */ -+#define SAFE_DMA_SRCADDR 0x00c4 /* DMA Source Address Status */ -+#define SAFE_DMA_DSTADDR 0x00c8 /* DMA Destination Address Status */ -+#define SAFE_DMA_STAT 0x00cc /* DMA Current Status */ -+#define SAFE_DMA_CFG 0x00d4 /* DMA Configuration/Status */ -+#define SAFE_ENDIAN 0x00e0 /* Endian Configuration */ -+#define SAFE_PK_A_ADDR 0x0800 /* Public Key A Address */ -+#define SAFE_PK_B_ADDR 0x0804 /* Public Key B Address */ -+#define SAFE_PK_C_ADDR 0x0808 /* Public Key C Address */ -+#define SAFE_PK_D_ADDR 0x080c /* Public Key D Address */ -+#define SAFE_PK_A_LEN 0x0810 /* Public Key A Length */ -+#define SAFE_PK_B_LEN 0x0814 /* Public Key B Length */ -+#define SAFE_PK_SHIFT 0x0818 /* Public Key Shift */ -+#define SAFE_PK_FUNC 0x081c /* Public Key Function */ -+#define SAFE_PK_RAM_START 0x1000 /* Public Key RAM start address */ -+#define SAFE_PK_RAM_END 0x1fff /* Public Key RAM end address */ -+ -+#define SAFE_RNG_OUT 0x0100 /* RNG Output */ -+#define SAFE_RNG_STAT 0x0104 /* RNG Status */ -+#define SAFE_RNG_CTRL 0x0108 /* RNG Control */ -+#define SAFE_RNG_A 0x010c /* RNG A */ -+#define SAFE_RNG_B 0x0110 /* RNG B */ -+#define SAFE_RNG_X_LO 0x0114 /* RNG X [31:0] */ -+#define SAFE_RNG_X_MID 0x0118 /* RNG X [63:32] */ -+#define SAFE_RNG_X_HI 0x011c /* RNG X [80:64] */ -+#define SAFE_RNG_X_CNTR 0x0120 /* RNG Counter */ -+#define SAFE_RNG_ALM_CNT 0x0124 /* RNG Alarm Count */ -+#define SAFE_RNG_CNFG 0x0128 /* RNG Configuration */ -+#define SAFE_RNG_LFSR1_LO 0x012c /* RNG LFSR1 [31:0] */ -+#define SAFE_RNG_LFSR1_HI 0x0130 /* RNG LFSR1 [47:32] */ -+#define SAFE_RNG_LFSR2_LO 0x0134 /* RNG LFSR1 [31:0] */ -+#define SAFE_RNG_LFSR2_HI 0x0138 /* RNG LFSR1 [47:32] */ -+ -+#define SAFE_PE_CSR_READY 0x00000001 /* ready for processing */ -+#define SAFE_PE_CSR_DONE 0x00000002 /* h/w completed processing */ -+#define SAFE_PE_CSR_LOADSA 0x00000004 /* load SA digests */ -+#define SAFE_PE_CSR_HASHFINAL 0x00000010 /* do hash pad & write result */ -+#define SAFE_PE_CSR_SABUSID 0x000000c0 /* bus id for SA */ -+#define SAFE_PE_CSR_SAPCI 0x00000040 /* PCI bus id for SA */ -+#define SAFE_PE_CSR_NXTHDR 0x0000ff00 /* next hdr value for IPsec */ -+#define SAFE_PE_CSR_FPAD 0x0000ff00 /* fixed pad for basic ops */ -+#define SAFE_PE_CSR_STATUS 0x00ff0000 /* operation result status */ -+#define SAFE_PE_CSR_AUTH_FAIL 0x00010000 /* ICV mismatch (inbound) */ -+#define SAFE_PE_CSR_PAD_FAIL 0x00020000 /* pad verify fail (inbound) */ -+#define SAFE_PE_CSR_SEQ_FAIL 0x00040000 /* sequence number (inbound) */ -+#define SAFE_PE_CSR_XERROR 0x00080000 /* extended error follows */ -+#define SAFE_PE_CSR_XECODE 0x00f00000 /* extended error code */ -+#define SAFE_PE_CSR_XECODE_S 20 -+#define SAFE_PE_CSR_XECODE_BADCMD 0 /* invalid command */ -+#define SAFE_PE_CSR_XECODE_BADALG 1 /* invalid algorithm */ -+#define SAFE_PE_CSR_XECODE_ALGDIS 2 /* algorithm disabled */ -+#define SAFE_PE_CSR_XECODE_ZEROLEN 3 /* zero packet length */ -+#define SAFE_PE_CSR_XECODE_DMAERR 4 /* bus DMA error */ -+#define SAFE_PE_CSR_XECODE_PIPEABORT 5 /* secondary bus DMA error */ -+#define SAFE_PE_CSR_XECODE_BADSPI 6 /* IPsec SPI mismatch */ -+#define SAFE_PE_CSR_XECODE_TIMEOUT 10 /* failsafe timeout */ -+#define SAFE_PE_CSR_PAD 0xff000000 /* ESP padding control/status */ -+#define SAFE_PE_CSR_PAD_MIN 0x00000000 /* minimum IPsec padding */ -+#define SAFE_PE_CSR_PAD_16 0x08000000 /* pad to 16-byte boundary */ -+#define SAFE_PE_CSR_PAD_32 0x10000000 /* pad to 32-byte boundary */ -+#define SAFE_PE_CSR_PAD_64 0x20000000 /* pad to 64-byte boundary */ -+#define SAFE_PE_CSR_PAD_128 0x40000000 /* pad to 128-byte boundary */ -+#define SAFE_PE_CSR_PAD_256 0x80000000 /* pad to 256-byte boundary */ -+ -+/* -+ * Check the CSR to see if the PE has returned ownership to -+ * the host. Note that before processing a descriptor this -+ * must be done followed by a check of the SAFE_PE_LEN register -+ * status bits to avoid premature processing of a descriptor -+ * on its way back to the host. -+ */ -+#define SAFE_PE_CSR_IS_DONE(_csr) \ -+ (((_csr) & (SAFE_PE_CSR_READY | SAFE_PE_CSR_DONE)) == SAFE_PE_CSR_DONE) -+ -+#define SAFE_PE_LEN_LENGTH 0x000fffff /* total length (bytes) */ -+#define SAFE_PE_LEN_READY 0x00400000 /* ready for processing */ -+#define SAFE_PE_LEN_DONE 0x00800000 /* h/w completed processing */ -+#define SAFE_PE_LEN_BYPASS 0xff000000 /* bypass offset (bytes) */ -+#define SAFE_PE_LEN_BYPASS_S 24 -+ -+#define SAFE_PE_LEN_IS_DONE(_len) \ -+ (((_len) & (SAFE_PE_LEN_READY | SAFE_PE_LEN_DONE)) == SAFE_PE_LEN_DONE) -+ -+/* NB: these apply to HU_STAT, HM_STAT, HI_CLR, and HI_MASK */ -+#define SAFE_INT_PE_CDONE 0x00000002 /* PE context done */ -+#define SAFE_INT_PE_DDONE 0x00000008 /* PE descriptor done */ -+#define SAFE_INT_PE_ERROR 0x00000010 /* PE error */ -+#define SAFE_INT_PE_ODONE 0x00000020 /* PE operation done */ -+ -+#define SAFE_HI_CFG_PULSE 0x00000001 /* use pulse interrupt */ -+#define SAFE_HI_CFG_LEVEL 0x00000000 /* use level interrupt */ -+#define SAFE_HI_CFG_AUTOCLR 0x00000002 /* auto-clear pulse interrupt */ -+ -+#define SAFE_ENDIAN_PASS 0x000000e4 /* straight pass-thru */ -+#define SAFE_ENDIAN_SWAB 0x0000001b /* swap bytes in 32-bit word */ -+ -+#define SAFE_PE_DMACFG_PERESET 0x00000001 /* reset packet engine */ -+#define SAFE_PE_DMACFG_PDRRESET 0x00000002 /* reset PDR counters/ptrs */ -+#define SAFE_PE_DMACFG_SGRESET 0x00000004 /* reset scatter/gather cache */ -+#define SAFE_PE_DMACFG_FSENA 0x00000008 /* enable failsafe reset */ -+#define SAFE_PE_DMACFG_PEMODE 0x00000100 /* packet engine mode */ -+#define SAFE_PE_DMACFG_SAPREC 0x00000200 /* SA precedes packet */ -+#define SAFE_PE_DMACFG_PKFOLL 0x00000400 /* packet follows descriptor */ -+#define SAFE_PE_DMACFG_GPRBID 0x00003000 /* gather particle ring busid */ -+#define SAFE_PE_DMACFG_GPRPCI 0x00001000 /* PCI gather particle ring */ -+#define SAFE_PE_DMACFG_SPRBID 0x0000c000 /* scatter part. ring busid */ -+#define SAFE_PE_DMACFG_SPRPCI 0x00004000 /* PCI scatter part. ring */ -+#define SAFE_PE_DMACFG_ESDESC 0x00010000 /* endian swap descriptors */ -+#define SAFE_PE_DMACFG_ESSA 0x00020000 /* endian swap SA data */ -+#define SAFE_PE_DMACFG_ESPACKET 0x00040000 /* endian swap packet data */ -+#define SAFE_PE_DMACFG_ESPDESC 0x00080000 /* endian swap particle desc. */ -+#define SAFE_PE_DMACFG_NOPDRUP 0x00100000 /* supp. PDR ownership update */ -+#define SAFE_PD_EDMACFG_PCIMODE 0x01000000 /* PCI target mode */ -+ -+#define SAFE_PE_DMASTAT_PEIDONE 0x00000001 /* PE core input done */ -+#define SAFE_PE_DMASTAT_PEODONE 0x00000002 /* PE core output done */ -+#define SAFE_PE_DMASTAT_ENCDONE 0x00000004 /* encryption done */ -+#define SAFE_PE_DMASTAT_IHDONE 0x00000008 /* inner hash done */ -+#define SAFE_PE_DMASTAT_OHDONE 0x00000010 /* outer hash (HMAC) done */ -+#define SAFE_PE_DMASTAT_PADFLT 0x00000020 /* crypto pad fault */ -+#define SAFE_PE_DMASTAT_ICVFLT 0x00000040 /* ICV fault */ -+#define SAFE_PE_DMASTAT_SPIMIS 0x00000080 /* SPI mismatch */ -+#define SAFE_PE_DMASTAT_CRYPTO 0x00000100 /* crypto engine timeout */ -+#define SAFE_PE_DMASTAT_CQACT 0x00000200 /* command queue active */ -+#define SAFE_PE_DMASTAT_IRACT 0x00000400 /* input request active */ -+#define SAFE_PE_DMASTAT_ORACT 0x00000800 /* output request active */ -+#define SAFE_PE_DMASTAT_PEISIZE 0x003ff000 /* PE input size:32-bit words */ -+#define SAFE_PE_DMASTAT_PEOSIZE 0xffc00000 /* PE out. size:32-bit words */ -+ -+#define SAFE_PE_RINGCFG_SIZE 0x000003ff /* ring size (descriptors) */ -+#define SAFE_PE_RINGCFG_OFFSET 0xffff0000 /* offset btw desc's (dwords) */ -+#define SAFE_PE_RINGCFG_OFFSET_S 16 -+ -+#define SAFE_PE_RINGPOLL_POLL 0x00000fff /* polling frequency/divisor */ -+#define SAFE_PE_RINGPOLL_RETRY 0x03ff0000 /* polling frequency/divisor */ -+#define SAFE_PE_RINGPOLL_CONT 0x80000000 /* continuously poll */ -+ -+#define SAFE_PE_IRNGSTAT_CQAVAIL 0x00000001 /* command queue available */ -+ -+#define SAFE_PE_ERNGSTAT_NEXT 0x03ff0000 /* index of next packet desc. */ -+#define SAFE_PE_ERNGSTAT_NEXT_S 16 -+ -+#define SAFE_PE_IOTHRESH_INPUT 0x000003ff /* input threshold (dwords) */ -+#define SAFE_PE_IOTHRESH_OUTPUT 0x03ff0000 /* output threshold (dwords) */ -+ -+#define SAFE_PE_PARTCFG_SIZE 0x0000ffff /* scatter particle size */ -+#define SAFE_PE_PARTCFG_GBURST 0x00030000 /* gather particle burst */ -+#define SAFE_PE_PARTCFG_GBURST_2 0x00000000 -+#define SAFE_PE_PARTCFG_GBURST_4 0x00010000 -+#define SAFE_PE_PARTCFG_GBURST_8 0x00020000 -+#define SAFE_PE_PARTCFG_GBURST_16 0x00030000 -+#define SAFE_PE_PARTCFG_SBURST 0x000c0000 /* scatter particle burst */ -+#define SAFE_PE_PARTCFG_SBURST_2 0x00000000 -+#define SAFE_PE_PARTCFG_SBURST_4 0x00040000 -+#define SAFE_PE_PARTCFG_SBURST_8 0x00080000 -+#define SAFE_PE_PARTCFG_SBURST_16 0x000c0000 -+ -+#define SAFE_PE_PARTSIZE_SCAT 0xffff0000 /* scatter particle ring size */ -+#define SAFE_PE_PARTSIZE_GATH 0x0000ffff /* gather particle ring size */ -+ -+#define SAFE_CRYPTO_CTRL_3DES 0x00000001 /* enable 3DES support */ -+#define SAFE_CRYPTO_CTRL_PKEY 0x00010000 /* enable public key support */ -+#define SAFE_CRYPTO_CTRL_RNG 0x00020000 /* enable RNG support */ -+ -+#define SAFE_DEVINFO_REV_MIN 0x0000000f /* minor rev for chip */ -+#define SAFE_DEVINFO_REV_MAJ 0x000000f0 /* major rev for chip */ -+#define SAFE_DEVINFO_REV_MAJ_S 4 -+#define SAFE_DEVINFO_DES 0x00000100 /* DES/3DES support present */ -+#define SAFE_DEVINFO_ARC4 0x00000200 /* ARC4 support present */ -+#define SAFE_DEVINFO_AES 0x00000400 /* AES support present */ -+#define SAFE_DEVINFO_MD5 0x00001000 /* MD5 support present */ -+#define SAFE_DEVINFO_SHA1 0x00002000 /* SHA-1 support present */ -+#define SAFE_DEVINFO_RIPEMD 0x00004000 /* RIPEMD support present */ -+#define SAFE_DEVINFO_DEFLATE 0x00010000 /* Deflate support present */ -+#define SAFE_DEVINFO_SARAM 0x00100000 /* on-chip SA RAM present */ -+#define SAFE_DEVINFO_EMIBUS 0x00200000 /* EMI bus present */ -+#define SAFE_DEVINFO_PKEY 0x00400000 /* public key support present */ -+#define SAFE_DEVINFO_RNG 0x00800000 /* RNG present */ -+ -+#define SAFE_REV(_maj, _min) (((_maj) << SAFE_DEVINFO_REV_MAJ_S) | (_min)) -+#define SAFE_REV_MAJ(_chiprev) \ -+ (((_chiprev) & SAFE_DEVINFO_REV_MAJ) >> SAFE_DEVINFO_REV_MAJ_S) -+#define SAFE_REV_MIN(_chiprev) ((_chiprev) & SAFE_DEVINFO_REV_MIN) -+ -+#define SAFE_PK_FUNC_MULT 0x00000001 /* Multiply function */ -+#define SAFE_PK_FUNC_SQUARE 0x00000004 /* Square function */ -+#define SAFE_PK_FUNC_ADD 0x00000010 /* Add function */ -+#define SAFE_PK_FUNC_SUB 0x00000020 /* Subtract function */ -+#define SAFE_PK_FUNC_LSHIFT 0x00000040 /* Left-shift function */ -+#define SAFE_PK_FUNC_RSHIFT 0x00000080 /* Right-shift function */ -+#define SAFE_PK_FUNC_DIV 0x00000100 /* Divide function */ -+#define SAFE_PK_FUNC_CMP 0x00000400 /* Compare function */ -+#define SAFE_PK_FUNC_COPY 0x00000800 /* Copy function */ -+#define SAFE_PK_FUNC_EXP16 0x00002000 /* Exponentiate (4-bit ACT) */ -+#define SAFE_PK_FUNC_EXP4 0x00004000 /* Exponentiate (2-bit ACT) */ -+#define SAFE_PK_FUNC_RUN 0x00008000 /* start/status */ -+ -+#define SAFE_RNG_STAT_BUSY 0x00000001 /* busy, data not valid */ -+ -+#define SAFE_RNG_CTRL_PRE_LFSR 0x00000001 /* enable output pre-LFSR */ -+#define SAFE_RNG_CTRL_TST_MODE 0x00000002 /* enable test mode */ -+#define SAFE_RNG_CTRL_TST_RUN 0x00000004 /* start test state machine */ -+#define SAFE_RNG_CTRL_ENA_RING1 0x00000008 /* test entropy oscillator #1 */ -+#define SAFE_RNG_CTRL_ENA_RING2 0x00000010 /* test entropy oscillator #2 */ -+#define SAFE_RNG_CTRL_DIS_ALARM 0x00000020 /* disable RNG alarm reports */ -+#define SAFE_RNG_CTRL_TST_CLOCK 0x00000040 /* enable test clock */ -+#define SAFE_RNG_CTRL_SHORTEN 0x00000080 /* shorten state timers */ -+#define SAFE_RNG_CTRL_TST_ALARM 0x00000100 /* simulate alarm state */ -+#define SAFE_RNG_CTRL_RST_LFSR 0x00000200 /* reset LFSR */ -+ -+/* -+ * Packet engine descriptor. Note that d_csr is a copy of the -+ * SAFE_PE_CSR register and all definitions apply, and d_len -+ * is a copy of the SAFE_PE_LEN register and all definitions apply. -+ * d_src and d_len may point directly to contiguous data or to a -+ * list of ``particle descriptors'' when using scatter/gather i/o. -+ */ -+struct safe_desc { -+ u_int32_t d_csr; /* per-packet control/status */ -+ u_int32_t d_src; /* source address */ -+ u_int32_t d_dst; /* destination address */ -+ u_int32_t d_sa; /* SA address */ -+ u_int32_t d_len; /* length, bypass, status */ -+}; -+ -+/* -+ * Scatter/Gather particle descriptor. -+ * -+ * NB: scatter descriptors do not specify a size; this is fixed -+ * by the setting of the SAFE_PE_PARTCFG register. -+ */ -+struct safe_pdesc { -+ u_int32_t pd_addr; /* particle address */ -+#ifdef __BIG_ENDIAN -+ u_int16_t pd_flags; /* control word */ -+ u_int16_t pd_size; /* particle size (bytes) */ -+#else -+ u_int16_t pd_flags; /* control word */ -+ u_int16_t pd_size; /* particle size (bytes) */ -+#endif -+}; -+ -+#define SAFE_PD_READY 0x0001 /* ready for processing */ -+#define SAFE_PD_DONE 0x0002 /* h/w completed processing */ -+ -+/* -+ * Security Association (SA) Record (Rev 1). One of these is -+ * required for each operation processed by the packet engine. -+ */ -+struct safe_sarec { -+ u_int32_t sa_cmd0; -+ u_int32_t sa_cmd1; -+ u_int32_t sa_resv0; -+ u_int32_t sa_resv1; -+ u_int32_t sa_key[8]; /* DES/3DES/AES key */ -+ u_int32_t sa_indigest[5]; /* inner digest */ -+ u_int32_t sa_outdigest[5]; /* outer digest */ -+ u_int32_t sa_spi; /* SPI */ -+ u_int32_t sa_seqnum; /* sequence number */ -+ u_int32_t sa_seqmask[2]; /* sequence number mask */ -+ u_int32_t sa_resv2; -+ u_int32_t sa_staterec; /* address of state record */ -+ u_int32_t sa_resv3[2]; -+ u_int32_t sa_samgmt0; /* SA management field 0 */ -+ u_int32_t sa_samgmt1; /* SA management field 0 */ -+}; -+ -+#define SAFE_SA_CMD0_OP 0x00000007 /* operation code */ -+#define SAFE_SA_CMD0_OP_CRYPT 0x00000000 /* encrypt/decrypt (basic) */ -+#define SAFE_SA_CMD0_OP_BOTH 0x00000001 /* encrypt-hash/hash-decrypto */ -+#define SAFE_SA_CMD0_OP_HASH 0x00000003 /* hash (outbound-only) */ -+#define SAFE_SA_CMD0_OP_ESP 0x00000000 /* ESP in/out (proto) */ -+#define SAFE_SA_CMD0_OP_AH 0x00000001 /* AH in/out (proto) */ -+#define SAFE_SA_CMD0_INBOUND 0x00000008 /* inbound operation */ -+#define SAFE_SA_CMD0_OUTBOUND 0x00000000 /* outbound operation */ -+#define SAFE_SA_CMD0_GROUP 0x00000030 /* operation group */ -+#define SAFE_SA_CMD0_BASIC 0x00000000 /* basic operation */ -+#define SAFE_SA_CMD0_PROTO 0x00000010 /* protocol/packet operation */ -+#define SAFE_SA_CMD0_BUNDLE 0x00000020 /* bundled operation (resvd) */ -+#define SAFE_SA_CMD0_PAD 0x000000c0 /* crypto pad method */ -+#define SAFE_SA_CMD0_PAD_IPSEC 0x00000000 /* IPsec padding */ -+#define SAFE_SA_CMD0_PAD_PKCS7 0x00000040 /* PKCS#7 padding */ -+#define SAFE_SA_CMD0_PAD_CONS 0x00000080 /* constant padding */ -+#define SAFE_SA_CMD0_PAD_ZERO 0x000000c0 /* zero padding */ -+#define SAFE_SA_CMD0_CRYPT_ALG 0x00000f00 /* symmetric crypto algorithm */ -+#define SAFE_SA_CMD0_DES 0x00000000 /* DES crypto algorithm */ -+#define SAFE_SA_CMD0_3DES 0x00000100 /* 3DES crypto algorithm */ -+#define SAFE_SA_CMD0_AES 0x00000300 /* AES crypto algorithm */ -+#define SAFE_SA_CMD0_CRYPT_NULL 0x00000f00 /* null crypto algorithm */ -+#define SAFE_SA_CMD0_HASH_ALG 0x0000f000 /* hash algorithm */ -+#define SAFE_SA_CMD0_MD5 0x00000000 /* MD5 hash algorithm */ -+#define SAFE_SA_CMD0_SHA1 0x00001000 /* SHA-1 hash algorithm */ -+#define SAFE_SA_CMD0_HASH_NULL 0x0000f000 /* null hash algorithm */ -+#define SAFE_SA_CMD0_HDR_PROC 0x00080000 /* header processing */ -+#define SAFE_SA_CMD0_IBUSID 0x00300000 /* input bus id */ -+#define SAFE_SA_CMD0_IPCI 0x00100000 /* PCI input bus id */ -+#define SAFE_SA_CMD0_OBUSID 0x00c00000 /* output bus id */ -+#define SAFE_SA_CMD0_OPCI 0x00400000 /* PCI output bus id */ -+#define SAFE_SA_CMD0_IVLD 0x03000000 /* IV loading */ -+#define SAFE_SA_CMD0_IVLD_NONE 0x00000000 /* IV no load (reuse) */ -+#define SAFE_SA_CMD0_IVLD_IBUF 0x01000000 /* IV load from input buffer */ -+#define SAFE_SA_CMD0_IVLD_STATE 0x02000000 /* IV load from state */ -+#define SAFE_SA_CMD0_HSLD 0x0c000000 /* hash state loading */ -+#define SAFE_SA_CMD0_HSLD_SA 0x00000000 /* hash state load from SA */ -+#define SAFE_SA_CMD0_HSLD_STATE 0x08000000 /* hash state load from state */ -+#define SAFE_SA_CMD0_HSLD_NONE 0x0c000000 /* hash state no load */ -+#define SAFE_SA_CMD0_SAVEIV 0x10000000 /* save IV */ -+#define SAFE_SA_CMD0_SAVEHASH 0x20000000 /* save hash state */ -+#define SAFE_SA_CMD0_IGATHER 0x40000000 /* input gather */ -+#define SAFE_SA_CMD0_OSCATTER 0x80000000 /* output scatter */ -+ -+#define SAFE_SA_CMD1_HDRCOPY 0x00000002 /* copy header to output */ -+#define SAFE_SA_CMD1_PAYCOPY 0x00000004 /* copy payload to output */ -+#define SAFE_SA_CMD1_PADCOPY 0x00000008 /* copy pad to output */ -+#define SAFE_SA_CMD1_IPV4 0x00000000 /* IPv4 protocol */ -+#define SAFE_SA_CMD1_IPV6 0x00000010 /* IPv6 protocol */ -+#define SAFE_SA_CMD1_MUTABLE 0x00000020 /* mutable bit processing */ -+#define SAFE_SA_CMD1_SRBUSID 0x000000c0 /* state record bus id */ -+#define SAFE_SA_CMD1_SRPCI 0x00000040 /* state record from PCI */ -+#define SAFE_SA_CMD1_CRMODE 0x00000300 /* crypto mode */ -+#define SAFE_SA_CMD1_ECB 0x00000000 /* ECB crypto mode */ -+#define SAFE_SA_CMD1_CBC 0x00000100 /* CBC crypto mode */ -+#define SAFE_SA_CMD1_OFB 0x00000200 /* OFB crypto mode */ -+#define SAFE_SA_CMD1_CFB 0x00000300 /* CFB crypto mode */ -+#define SAFE_SA_CMD1_CRFEEDBACK 0x00000c00 /* crypto feedback mode */ -+#define SAFE_SA_CMD1_64BIT 0x00000000 /* 64-bit crypto feedback */ -+#define SAFE_SA_CMD1_8BIT 0x00000400 /* 8-bit crypto feedback */ -+#define SAFE_SA_CMD1_1BIT 0x00000800 /* 1-bit crypto feedback */ -+#define SAFE_SA_CMD1_128BIT 0x00000c00 /* 128-bit crypto feedback */ -+#define SAFE_SA_CMD1_OPTIONS 0x00001000 /* HMAC/options mutable bit */ -+#define SAFE_SA_CMD1_HMAC SAFE_SA_CMD1_OPTIONS -+#define SAFE_SA_CMD1_SAREV1 0x00008000 /* SA Revision 1 */ -+#define SAFE_SA_CMD1_OFFSET 0x00ff0000 /* hash/crypto offset(dwords) */ -+#define SAFE_SA_CMD1_OFFSET_S 16 -+#define SAFE_SA_CMD1_AESKEYLEN 0x0f000000 /* AES key length */ -+#define SAFE_SA_CMD1_AES128 0x02000000 /* 128-bit AES key */ -+#define SAFE_SA_CMD1_AES192 0x03000000 /* 192-bit AES key */ -+#define SAFE_SA_CMD1_AES256 0x04000000 /* 256-bit AES key */ -+ -+/* -+ * Security Associate State Record (Rev 1). -+ */ -+struct safe_sastate { -+ u_int32_t sa_saved_iv[4]; /* saved IV (DES/3DES/AES) */ -+ u_int32_t sa_saved_hashbc; /* saved hash byte count */ -+ u_int32_t sa_saved_indigest[5]; /* saved inner digest */ -+}; -+#endif /* _SAFE_SAFEREG_H_ */ -diff --git a/crypto/ocf/safe/safevar.h b/crypto/ocf/safe/safevar.h -new file mode 100644 -index 0000000..9039a5d ---- /dev/null -+++ b/crypto/ocf/safe/safevar.h -@@ -0,0 +1,230 @@ -+/*- -+ * The linux port of this code done by David McCullough -+ * Copyright (C) 2004-2010 David McCullough <david_mccullough@mcafee.com> -+ * The license and original author are listed below. -+ * -+ * Copyright (c) 2003 Sam Leffler, Errno Consulting -+ * Copyright (c) 2003 Global Technology Associates, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -+ * SUCH DAMAGE. -+ * -+ * $FreeBSD: src/sys/dev/safe/safevar.h,v 1.2 2006/05/17 18:34:26 pjd Exp $ -+ */ -+#ifndef _SAFE_SAFEVAR_H_ -+#define _SAFE_SAFEVAR_H_ -+ -+/* Maximum queue length */ -+#ifndef SAFE_MAX_NQUEUE -+#define SAFE_MAX_NQUEUE 60 -+#endif -+ -+#define SAFE_MAX_PART 64 /* Maximum scatter/gather depth */ -+#define SAFE_DMA_BOUNDARY 0 /* No boundary for source DMA ops */ -+#define SAFE_MAX_DSIZE 2048 /* MCLBYTES Fixed scatter particle size */ -+#define SAFE_MAX_SSIZE 0x0ffff /* Maximum gather particle size */ -+#define SAFE_MAX_DMA 0xfffff /* Maximum PE operand size (20 bits) */ -+/* total src+dst particle descriptors */ -+#define SAFE_TOTAL_DPART (SAFE_MAX_NQUEUE * SAFE_MAX_PART) -+#define SAFE_TOTAL_SPART (SAFE_MAX_NQUEUE * SAFE_MAX_PART) -+ -+#define SAFE_RNG_MAXBUFSIZ 128 /* 32-bit words */ -+ -+#define SAFE_CARD(sid) (((sid) & 0xf0000000) >> 28) -+#define SAFE_SESSION(sid) ( (sid) & 0x0fffffff) -+#define SAFE_SID(crd, sesn) (((crd) << 28) | ((sesn) & 0x0fffffff)) -+ -+#define SAFE_DEF_RTY 0xff /* PCI Retry Timeout */ -+#define SAFE_DEF_TOUT 0xff /* PCI TRDY Timeout */ -+#define SAFE_DEF_CACHELINE 0x01 /* Cache Line setting */ -+ -+#ifdef __KERNEL__ -+/* -+ * State associated with the allocation of each chunk -+ * of memory setup for DMA. -+ */ -+struct safe_dma_alloc { -+ dma_addr_t dma_paddr; -+ void *dma_vaddr; -+}; -+ -+/* -+ * Cryptographic operand state. One of these exists for each -+ * source and destination operand passed in from the crypto -+ * subsystem. When possible source and destination operands -+ * refer to the same memory. More often they are distinct. -+ * We track the virtual address of each operand as well as -+ * where each is mapped for DMA. -+ */ -+struct safe_operand { -+ union { -+ struct sk_buff *skb; -+ struct uio *io; -+ } u; -+ void *map; -+ int mapsize; /* total number of bytes in segs */ -+ struct { -+ dma_addr_t ds_addr; -+ int ds_len; -+ int ds_tlen; -+ } segs[SAFE_MAX_PART]; -+ int nsegs; -+}; -+ -+/* -+ * Packet engine ring entry and cryptographic operation state. -+ * The packet engine requires a ring of descriptors that contain -+ * pointers to various cryptographic state. However the ring -+ * configuration register allows you to specify an arbitrary size -+ * for ring entries. We use this feature to collect most of the -+ * state for each cryptographic request into one spot. Other than -+ * ring entries only the ``particle descriptors'' (scatter/gather -+ * lists) and the actual operand data are kept separate. The -+ * particle descriptors must also be organized in rings. The -+ * operand data can be located aribtrarily (modulo alignment constraints). -+ * -+ * Note that the descriptor ring is mapped onto the PCI bus so -+ * the hardware can DMA data. This means the entire ring must be -+ * contiguous. -+ */ -+struct safe_ringentry { -+ struct safe_desc re_desc; /* command descriptor */ -+ struct safe_sarec re_sa; /* SA record */ -+ struct safe_sastate re_sastate; /* SA state record */ -+ -+ struct cryptop *re_crp; /* crypto operation */ -+ -+ struct safe_operand re_src; /* source operand */ -+ struct safe_operand re_dst; /* destination operand */ -+ -+ int re_sesn; /* crypto session ID */ -+ int re_flags; -+#define SAFE_QFLAGS_COPYOUTIV 0x1 /* copy back on completion */ -+#define SAFE_QFLAGS_COPYOUTICV 0x2 /* copy back on completion */ -+}; -+ -+#define re_src_skb re_src.u.skb -+#define re_src_io re_src.u.io -+#define re_src_map re_src.map -+#define re_src_nsegs re_src.nsegs -+#define re_src_segs re_src.segs -+#define re_src_mapsize re_src.mapsize -+ -+#define re_dst_skb re_dst.u.skb -+#define re_dst_io re_dst.u.io -+#define re_dst_map re_dst.map -+#define re_dst_nsegs re_dst.nsegs -+#define re_dst_segs re_dst.segs -+#define re_dst_mapsize re_dst.mapsize -+ -+struct rndstate_test; -+ -+struct safe_session { -+ u_int32_t ses_used; -+ u_int32_t ses_klen; /* key length in bits */ -+ u_int32_t ses_key[8]; /* DES/3DES/AES key */ -+ u_int32_t ses_mlen; /* hmac length in bytes */ -+ u_int32_t ses_hminner[5]; /* hmac inner state */ -+ u_int32_t ses_hmouter[5]; /* hmac outer state */ -+ u_int32_t ses_iv[4]; /* DES/3DES/AES iv */ -+}; -+ -+struct safe_pkq { -+ struct list_head pkq_list; -+ struct cryptkop *pkq_krp; -+}; -+ -+struct safe_softc { -+ softc_device_decl sc_dev; -+ u32 sc_irq; -+ -+ struct pci_dev *sc_pcidev; -+ ocf_iomem_t sc_base_addr; -+ -+ u_int sc_chiprev; /* major/minor chip revision */ -+ int sc_flags; /* device specific flags */ -+#define SAFE_FLAGS_KEY 0x01 /* has key accelerator */ -+#define SAFE_FLAGS_RNG 0x02 /* hardware rng */ -+ int sc_suspended; -+ int sc_needwakeup; /* notify crypto layer */ -+ int32_t sc_cid; /* crypto tag */ -+ -+ struct safe_dma_alloc sc_ringalloc; /* PE ring allocation state */ -+ struct safe_ringentry *sc_ring; /* PE ring */ -+ struct safe_ringentry *sc_ringtop; /* PE ring top */ -+ struct safe_ringentry *sc_front; /* next free entry */ -+ struct safe_ringentry *sc_back; /* next pending entry */ -+ int sc_nqchip; /* # passed to chip */ -+ spinlock_t sc_ringmtx; /* PE ring lock */ -+ struct safe_pdesc *sc_spring; /* src particle ring */ -+ struct safe_pdesc *sc_springtop; /* src particle ring top */ -+ struct safe_pdesc *sc_spfree; /* next free src particle */ -+ struct safe_dma_alloc sc_spalloc; /* src particle ring state */ -+ struct safe_pdesc *sc_dpring; /* dest particle ring */ -+ struct safe_pdesc *sc_dpringtop; /* dest particle ring top */ -+ struct safe_pdesc *sc_dpfree; /* next free dest particle */ -+ struct safe_dma_alloc sc_dpalloc; /* dst particle ring state */ -+ int sc_nsessions; /* # of sessions */ -+ struct safe_session *sc_sessions; /* sessions */ -+ -+ struct timer_list sc_pkto; /* PK polling */ -+ spinlock_t sc_pkmtx; /* PK lock */ -+ struct list_head sc_pkq; /* queue of PK requests */ -+ struct safe_pkq *sc_pkq_cur; /* current processing request */ -+ u_int32_t sc_pk_reslen, sc_pk_resoff; -+ -+ int sc_max_dsize; /* maximum safe DMA size */ -+}; -+#endif /* __KERNEL__ */ -+ -+struct safe_stats { -+ u_int64_t st_ibytes; -+ u_int64_t st_obytes; -+ u_int32_t st_ipackets; -+ u_int32_t st_opackets; -+ u_int32_t st_invalid; /* invalid argument */ -+ u_int32_t st_badsession; /* invalid session id */ -+ u_int32_t st_badflags; /* flags indicate !(mbuf | uio) */ -+ u_int32_t st_nodesc; /* op submitted w/o descriptors */ -+ u_int32_t st_badalg; /* unsupported algorithm */ -+ u_int32_t st_ringfull; /* PE descriptor ring full */ -+ u_int32_t st_peoperr; /* PE marked error */ -+ u_int32_t st_dmaerr; /* PE DMA error */ -+ u_int32_t st_bypasstoobig; /* bypass > 96 bytes */ -+ u_int32_t st_skipmismatch; /* enc part begins before auth part */ -+ u_int32_t st_lenmismatch; /* enc length different auth length */ -+ u_int32_t st_coffmisaligned; /* crypto offset not 32-bit aligned */ -+ u_int32_t st_cofftoobig; /* crypto offset > 255 words */ -+ u_int32_t st_iovmisaligned; /* iov op not aligned */ -+ u_int32_t st_iovnotuniform; /* iov op not suitable */ -+ u_int32_t st_unaligned; /* unaligned src caused copy */ -+ u_int32_t st_notuniform; /* non-uniform src caused copy */ -+ u_int32_t st_nomap; /* bus_dmamap_create failed */ -+ u_int32_t st_noload; /* bus_dmamap_load_* failed */ -+ u_int32_t st_nombuf; /* MGET* failed */ -+ u_int32_t st_nomcl; /* MCLGET* failed */ -+ u_int32_t st_maxqchip; /* max mcr1 ops out for processing */ -+ u_int32_t st_rng; /* RNG requests */ -+ u_int32_t st_rngalarm; /* RNG alarm requests */ -+ u_int32_t st_noicvcopy; /* ICV data copies suppressed */ -+}; -+#endif /* _SAFE_SAFEVAR_H_ */ -diff --git a/crypto/ocf/safe/sha1.c b/crypto/ocf/safe/sha1.c -new file mode 100644 -index 0000000..4e360e2 ---- /dev/null -+++ b/crypto/ocf/safe/sha1.c -@@ -0,0 +1,279 @@ -+/* $KAME: sha1.c,v 1.5 2000/11/08 06:13:08 itojun Exp $ */ -+/* -+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. Neither the name of the project nor the names of its contributors -+ * may be used to endorse or promote products derived from this software -+ * without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND -+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE -+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -+ * SUCH DAMAGE. -+ */ -+ -+/* -+ * FIPS pub 180-1: Secure Hash Algorithm (SHA-1) -+ * based on: http://csrc.nist.gov/fips/fip180-1.txt -+ * implemented by Jun-ichiro itojun Itoh <itojun@itojun.org> -+ */ -+ -+#if 0 -+#include <sys/cdefs.h> -+__FBSDID("$FreeBSD: src/sys/crypto/sha1.c,v 1.9 2003/06/10 21:36:57 obrien Exp $"); -+ -+#include <sys/types.h> -+#include <sys/cdefs.h> -+#include <sys/time.h> -+#include <sys/systm.h> -+ -+#include <crypto/sha1.h> -+#endif -+ -+/* sanity check */ -+#if BYTE_ORDER != BIG_ENDIAN -+# if BYTE_ORDER != LITTLE_ENDIAN -+# define unsupported 1 -+# endif -+#endif -+ -+#ifndef unsupported -+ -+/* constant table */ -+static u_int32_t _K[] = { 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6 }; -+#define K(t) _K[(t) / 20] -+ -+#define F0(b, c, d) (((b) & (c)) | ((~(b)) & (d))) -+#define F1(b, c, d) (((b) ^ (c)) ^ (d)) -+#define F2(b, c, d) (((b) & (c)) | ((b) & (d)) | ((c) & (d))) -+#define F3(b, c, d) (((b) ^ (c)) ^ (d)) -+ -+#define S(n, x) (((x) << (n)) | ((x) >> (32 - n))) -+ -+#undef H -+#define H(n) (ctxt->h.b32[(n)]) -+#define COUNT (ctxt->count) -+#define BCOUNT (ctxt->c.b64[0] / 8) -+#define W(n) (ctxt->m.b32[(n)]) -+ -+#define PUTBYTE(x) { \ -+ ctxt->m.b8[(COUNT % 64)] = (x); \ -+ COUNT++; \ -+ COUNT %= 64; \ -+ ctxt->c.b64[0] += 8; \ -+ if (COUNT % 64 == 0) \ -+ sha1_step(ctxt); \ -+ } -+ -+#define PUTPAD(x) { \ -+ ctxt->m.b8[(COUNT % 64)] = (x); \ -+ COUNT++; \ -+ COUNT %= 64; \ -+ if (COUNT % 64 == 0) \ -+ sha1_step(ctxt); \ -+ } -+ -+static void sha1_step(struct sha1_ctxt *); -+ -+static void -+sha1_step(ctxt) -+ struct sha1_ctxt *ctxt; -+{ -+ u_int32_t a, b, c, d, e; -+ size_t t, s; -+ u_int32_t tmp; -+ -+#if BYTE_ORDER == LITTLE_ENDIAN -+ struct sha1_ctxt tctxt; -+ bcopy(&ctxt->m.b8[0], &tctxt.m.b8[0], 64); -+ ctxt->m.b8[0] = tctxt.m.b8[3]; ctxt->m.b8[1] = tctxt.m.b8[2]; -+ ctxt->m.b8[2] = tctxt.m.b8[1]; ctxt->m.b8[3] = tctxt.m.b8[0]; -+ ctxt->m.b8[4] = tctxt.m.b8[7]; ctxt->m.b8[5] = tctxt.m.b8[6]; -+ ctxt->m.b8[6] = tctxt.m.b8[5]; ctxt->m.b8[7] = tctxt.m.b8[4]; -+ ctxt->m.b8[8] = tctxt.m.b8[11]; ctxt->m.b8[9] = tctxt.m.b8[10]; -+ ctxt->m.b8[10] = tctxt.m.b8[9]; ctxt->m.b8[11] = tctxt.m.b8[8]; -+ ctxt->m.b8[12] = tctxt.m.b8[15]; ctxt->m.b8[13] = tctxt.m.b8[14]; -+ ctxt->m.b8[14] = tctxt.m.b8[13]; ctxt->m.b8[15] = tctxt.m.b8[12]; -+ ctxt->m.b8[16] = tctxt.m.b8[19]; ctxt->m.b8[17] = tctxt.m.b8[18]; -+ ctxt->m.b8[18] = tctxt.m.b8[17]; ctxt->m.b8[19] = tctxt.m.b8[16]; -+ ctxt->m.b8[20] = tctxt.m.b8[23]; ctxt->m.b8[21] = tctxt.m.b8[22]; -+ ctxt->m.b8[22] = tctxt.m.b8[21]; ctxt->m.b8[23] = tctxt.m.b8[20]; -+ ctxt->m.b8[24] = tctxt.m.b8[27]; ctxt->m.b8[25] = tctxt.m.b8[26]; -+ ctxt->m.b8[26] = tctxt.m.b8[25]; ctxt->m.b8[27] = tctxt.m.b8[24]; -+ ctxt->m.b8[28] = tctxt.m.b8[31]; ctxt->m.b8[29] = tctxt.m.b8[30]; -+ ctxt->m.b8[30] = tctxt.m.b8[29]; ctxt->m.b8[31] = tctxt.m.b8[28]; -+ ctxt->m.b8[32] = tctxt.m.b8[35]; ctxt->m.b8[33] = tctxt.m.b8[34]; -+ ctxt->m.b8[34] = tctxt.m.b8[33]; ctxt->m.b8[35] = tctxt.m.b8[32]; -+ ctxt->m.b8[36] = tctxt.m.b8[39]; ctxt->m.b8[37] = tctxt.m.b8[38]; -+ ctxt->m.b8[38] = tctxt.m.b8[37]; ctxt->m.b8[39] = tctxt.m.b8[36]; -+ ctxt->m.b8[40] = tctxt.m.b8[43]; ctxt->m.b8[41] = tctxt.m.b8[42]; -+ ctxt->m.b8[42] = tctxt.m.b8[41]; ctxt->m.b8[43] = tctxt.m.b8[40]; -+ ctxt->m.b8[44] = tctxt.m.b8[47]; ctxt->m.b8[45] = tctxt.m.b8[46]; -+ ctxt->m.b8[46] = tctxt.m.b8[45]; ctxt->m.b8[47] = tctxt.m.b8[44]; -+ ctxt->m.b8[48] = tctxt.m.b8[51]; ctxt->m.b8[49] = tctxt.m.b8[50]; -+ ctxt->m.b8[50] = tctxt.m.b8[49]; ctxt->m.b8[51] = tctxt.m.b8[48]; -+ ctxt->m.b8[52] = tctxt.m.b8[55]; ctxt->m.b8[53] = tctxt.m.b8[54]; -+ ctxt->m.b8[54] = tctxt.m.b8[53]; ctxt->m.b8[55] = tctxt.m.b8[52]; -+ ctxt->m.b8[56] = tctxt.m.b8[59]; ctxt->m.b8[57] = tctxt.m.b8[58]; -+ ctxt->m.b8[58] = tctxt.m.b8[57]; ctxt->m.b8[59] = tctxt.m.b8[56]; -+ ctxt->m.b8[60] = tctxt.m.b8[63]; ctxt->m.b8[61] = tctxt.m.b8[62]; -+ ctxt->m.b8[62] = tctxt.m.b8[61]; ctxt->m.b8[63] = tctxt.m.b8[60]; -+#endif -+ -+ a = H(0); b = H(1); c = H(2); d = H(3); e = H(4); -+ -+ for (t = 0; t < 20; t++) { -+ s = t & 0x0f; -+ if (t >= 16) { -+ W(s) = S(1, W((s+13) & 0x0f) ^ W((s+8) & 0x0f) ^ W((s+2) & 0x0f) ^ W(s)); -+ } -+ tmp = S(5, a) + F0(b, c, d) + e + W(s) + K(t); -+ e = d; d = c; c = S(30, b); b = a; a = tmp; -+ } -+ for (t = 20; t < 40; t++) { -+ s = t & 0x0f; -+ W(s) = S(1, W((s+13) & 0x0f) ^ W((s+8) & 0x0f) ^ W((s+2) & 0x0f) ^ W(s)); -+ tmp = S(5, a) + F1(b, c, d) + e + W(s) + K(t); -+ e = d; d = c; c = S(30, b); b = a; a = tmp; -+ } -+ for (t = 40; t < 60; t++) { -+ s = t & 0x0f; -+ W(s) = S(1, W((s+13) & 0x0f) ^ W((s+8) & 0x0f) ^ W((s+2) & 0x0f) ^ W(s)); -+ tmp = S(5, a) + F2(b, c, d) + e + W(s) + K(t); -+ e = d; d = c; c = S(30, b); b = a; a = tmp; -+ } -+ for (t = 60; t < 80; t++) { -+ s = t & 0x0f; -+ W(s) = S(1, W((s+13) & 0x0f) ^ W((s+8) & 0x0f) ^ W((s+2) & 0x0f) ^ W(s)); -+ tmp = S(5, a) + F3(b, c, d) + e + W(s) + K(t); -+ e = d; d = c; c = S(30, b); b = a; a = tmp; -+ } -+ -+ H(0) = H(0) + a; -+ H(1) = H(1) + b; -+ H(2) = H(2) + c; -+ H(3) = H(3) + d; -+ H(4) = H(4) + e; -+ -+ bzero(&ctxt->m.b8[0], 64); -+} -+ -+/*------------------------------------------------------------*/ -+ -+void -+sha1_init(ctxt) -+ struct sha1_ctxt *ctxt; -+{ -+ bzero(ctxt, sizeof(struct sha1_ctxt)); -+ H(0) = 0x67452301; -+ H(1) = 0xefcdab89; -+ H(2) = 0x98badcfe; -+ H(3) = 0x10325476; -+ H(4) = 0xc3d2e1f0; -+} -+ -+void -+sha1_pad(ctxt) -+ struct sha1_ctxt *ctxt; -+{ -+ size_t padlen; /*pad length in bytes*/ -+ size_t padstart; -+ -+ PUTPAD(0x80); -+ -+ padstart = COUNT % 64; -+ padlen = 64 - padstart; -+ if (padlen < 8) { -+ bzero(&ctxt->m.b8[padstart], padlen); -+ COUNT += padlen; -+ COUNT %= 64; -+ sha1_step(ctxt); -+ padstart = COUNT % 64; /* should be 0 */ -+ padlen = 64 - padstart; /* should be 64 */ -+ } -+ bzero(&ctxt->m.b8[padstart], padlen - 8); -+ COUNT += (padlen - 8); -+ COUNT %= 64; -+#if BYTE_ORDER == BIG_ENDIAN -+ PUTPAD(ctxt->c.b8[0]); PUTPAD(ctxt->c.b8[1]); -+ PUTPAD(ctxt->c.b8[2]); PUTPAD(ctxt->c.b8[3]); -+ PUTPAD(ctxt->c.b8[4]); PUTPAD(ctxt->c.b8[5]); -+ PUTPAD(ctxt->c.b8[6]); PUTPAD(ctxt->c.b8[7]); -+#else -+ PUTPAD(ctxt->c.b8[7]); PUTPAD(ctxt->c.b8[6]); -+ PUTPAD(ctxt->c.b8[5]); PUTPAD(ctxt->c.b8[4]); -+ PUTPAD(ctxt->c.b8[3]); PUTPAD(ctxt->c.b8[2]); -+ PUTPAD(ctxt->c.b8[1]); PUTPAD(ctxt->c.b8[0]); -+#endif -+} -+ -+void -+sha1_loop(ctxt, input, len) -+ struct sha1_ctxt *ctxt; -+ const u_int8_t *input; -+ size_t len; -+{ -+ size_t gaplen; -+ size_t gapstart; -+ size_t off; -+ size_t copysiz; -+ -+ off = 0; -+ -+ while (off < len) { -+ gapstart = COUNT % 64; -+ gaplen = 64 - gapstart; -+ -+ copysiz = (gaplen < len - off) ? gaplen : len - off; -+ bcopy(&input[off], &ctxt->m.b8[gapstart], copysiz); -+ COUNT += copysiz; -+ COUNT %= 64; -+ ctxt->c.b64[0] += copysiz * 8; -+ if (COUNT % 64 == 0) -+ sha1_step(ctxt); -+ off += copysiz; -+ } -+} -+ -+void -+sha1_result(ctxt, digest0) -+ struct sha1_ctxt *ctxt; -+ caddr_t digest0; -+{ -+ u_int8_t *digest; -+ -+ digest = (u_int8_t *)digest0; -+ sha1_pad(ctxt); -+#if BYTE_ORDER == BIG_ENDIAN -+ bcopy(&ctxt->h.b8[0], digest, 20); -+#else -+ digest[0] = ctxt->h.b8[3]; digest[1] = ctxt->h.b8[2]; -+ digest[2] = ctxt->h.b8[1]; digest[3] = ctxt->h.b8[0]; -+ digest[4] = ctxt->h.b8[7]; digest[5] = ctxt->h.b8[6]; -+ digest[6] = ctxt->h.b8[5]; digest[7] = ctxt->h.b8[4]; -+ digest[8] = ctxt->h.b8[11]; digest[9] = ctxt->h.b8[10]; -+ digest[10] = ctxt->h.b8[9]; digest[11] = ctxt->h.b8[8]; -+ digest[12] = ctxt->h.b8[15]; digest[13] = ctxt->h.b8[14]; -+ digest[14] = ctxt->h.b8[13]; digest[15] = ctxt->h.b8[12]; -+ digest[16] = ctxt->h.b8[19]; digest[17] = ctxt->h.b8[18]; -+ digest[18] = ctxt->h.b8[17]; digest[19] = ctxt->h.b8[16]; -+#endif -+} -+ -+#endif /*unsupported*/ -diff --git a/crypto/ocf/safe/sha1.h b/crypto/ocf/safe/sha1.h -new file mode 100644 -index 0000000..0e19d90 ---- /dev/null -+++ b/crypto/ocf/safe/sha1.h -@@ -0,0 +1,72 @@ -+/* $FreeBSD: src/sys/crypto/sha1.h,v 1.8 2002/03/20 05:13:50 alfred Exp $ */ -+/* $KAME: sha1.h,v 1.5 2000/03/27 04:36:23 sumikawa Exp $ */ -+ -+/* -+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. Neither the name of the project nor the names of its contributors -+ * may be used to endorse or promote products derived from this software -+ * without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND -+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE -+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -+ * SUCH DAMAGE. -+ */ -+/* -+ * FIPS pub 180-1: Secure Hash Algorithm (SHA-1) -+ * based on: http://csrc.nist.gov/fips/fip180-1.txt -+ * implemented by Jun-ichiro itojun Itoh <itojun@itojun.org> -+ */ -+ -+#ifndef _NETINET6_SHA1_H_ -+#define _NETINET6_SHA1_H_ -+ -+struct sha1_ctxt { -+ union { -+ u_int8_t b8[20]; -+ u_int32_t b32[5]; -+ } h; -+ union { -+ u_int8_t b8[8]; -+ u_int64_t b64[1]; -+ } c; -+ union { -+ u_int8_t b8[64]; -+ u_int32_t b32[16]; -+ } m; -+ u_int8_t count; -+}; -+ -+#ifdef __KERNEL__ -+extern void sha1_init(struct sha1_ctxt *); -+extern void sha1_pad(struct sha1_ctxt *); -+extern void sha1_loop(struct sha1_ctxt *, const u_int8_t *, size_t); -+extern void sha1_result(struct sha1_ctxt *, caddr_t); -+ -+/* compatibilty with other SHA1 source codes */ -+typedef struct sha1_ctxt SHA1_CTX; -+#define SHA1Init(x) sha1_init((x)) -+#define SHA1Update(x, y, z) sha1_loop((x), (y), (z)) -+#define SHA1Final(x, y) sha1_result((y), (x)) -+#endif /* __KERNEL__ */ -+ -+#define SHA1_RESULTLEN (160/8) -+ -+#endif /*_NETINET6_SHA1_H_*/ -diff --git a/crypto/ocf/talitos/Makefile b/crypto/ocf/talitos/Makefile -new file mode 100644 -index 0000000..2591b8a ---- /dev/null -+++ b/crypto/ocf/talitos/Makefile -@@ -0,0 +1,12 @@ -+# for SGlinux builds -+-include $(ROOTDIR)/modules/.config -+ -+obj-$(CONFIG_OCF_TALITOS) += talitos.o -+ -+obj ?= . -+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/ -+ -+ifdef TOPDIR -+-include $(TOPDIR)/Rules.make -+endif -+ -diff --git a/crypto/ocf/talitos/talitos.c b/crypto/ocf/talitos/talitos.c -new file mode 100644 -index 0000000..0cef3bd ---- /dev/null -+++ b/crypto/ocf/talitos/talitos.c -@@ -0,0 +1,1359 @@ -+/* -+ * crypto/ocf/talitos/talitos.c -+ * -+ * An OCF-Linux module that uses Freescale's SEC to do the crypto. -+ * Based on crypto/ocf/hifn and crypto/ocf/safe OCF drivers -+ * -+ * Copyright (c) 2006 Freescale Semiconductor, Inc. -+ * -+ * This code written by Kim A. B. Phillips <kim.phillips@freescale.com> -+ * some code copied from files with the following: -+ * Copyright (C) 2004-2007 David McCullough <david_mccullough@mcafee.com> -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * --------------------------------------------------------------------------- -+ * -+ * NOTES: -+ * -+ * The Freescale SEC (also known as 'talitos') resides on the -+ * internal bus, and runs asynchronous to the processor core. It has -+ * a wide gamut of cryptographic acceleration features, including single- -+ * pass IPsec (also known as algorithm chaining). To properly utilize -+ * all of the SEC's performance enhancing features, further reworking -+ * of higher level code (framework, applications) will be necessary. -+ * -+ * The following table shows which SEC version is present in which devices: -+ * -+ * Devices SEC version -+ * -+ * 8272, 8248 SEC 1.0 -+ * 885, 875 SEC 1.2 -+ * 8555E, 8541E SEC 2.0 -+ * 8349E SEC 2.01 -+ * 8548E SEC 2.1 -+ * -+ * The following table shows the features offered by each SEC version: -+ * -+ * Max. chan- -+ * version Bus I/F Clock nels DEU AESU AFEU MDEU PKEU RNG KEU -+ * -+ * SEC 1.0 internal 64b 100MHz 4 1 1 1 1 1 1 0 -+ * SEC 1.2 internal 32b 66MHz 1 1 1 0 1 0 0 0 -+ * SEC 2.0 internal 64b 166MHz 4 1 1 1 1 1 1 0 -+ * SEC 2.01 internal 64b 166MHz 4 1 1 1 1 1 1 0 -+ * SEC 2.1 internal 64b 333MHz 4 1 1 1 1 1 1 1 -+ * -+ * Each execution unit in the SEC has two modes of execution; channel and -+ * slave/debug. This driver employs the channel infrastructure in the -+ * device for convenience. Only the RNG is directly accessed due to the -+ * convenience of its random fifo pool. The relationship between the -+ * channels and execution units is depicted in the following diagram: -+ * -+ * ------- ------------ -+ * ---| ch0 |---| | -+ * ------- | | -+ * | |------+-------+-------+-------+------------ -+ * ------- | | | | | | | -+ * ---| ch1 |---| | | | | | | -+ * ------- | | ------ ------ ------ ------ ------ -+ * |controller| |DEU | |AESU| |MDEU| |PKEU| ... |RNG | -+ * ------- | | ------ ------ ------ ------ ------ -+ * ---| ch2 |---| | | | | | | -+ * ------- | | | | | | | -+ * | |------+-------+-------+-------+------------ -+ * ------- | | -+ * ---| ch3 |---| | -+ * ------- ------------ -+ * -+ * Channel ch0 may drive an aes operation to the aes unit (AESU), -+ * and, at the same time, ch1 may drive a message digest operation -+ * to the mdeu. Each channel has an input descriptor FIFO, and the -+ * FIFO can contain, e.g. on the 8541E, up to 24 entries, before a -+ * a buffer overrun error is triggered. The controller is responsible -+ * for fetching the data from descriptor pointers, and passing the -+ * data to the appropriate EUs. The controller also writes the -+ * cryptographic operation's result to memory. The SEC notifies -+ * completion by triggering an interrupt and/or setting the 1st byte -+ * of the hdr field to 0xff. -+ * -+ * TODO: -+ * o support more algorithms -+ * o support more versions of the SEC -+ * o add support for linux 2.4 -+ * o scatter-gather (sg) support -+ * o add support for public key ops (PKEU) -+ * o add statistics -+ */ -+ -+#ifndef AUTOCONF_INCLUDED -+#include <linux/config.h> -+#endif -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/spinlock.h> -+#include <linux/random.h> -+#include <linux/skbuff.h> -+#include <asm/scatterlist.h> -+#include <linux/dma-mapping.h> /* dma_map_single() */ -+#include <linux/moduleparam.h> -+ -+#include <linux/version.h> -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15) -+#include <linux/platform_device.h> -+#endif -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19) -+#include <linux/of_platform.h> -+#endif -+ -+#include <cryptodev.h> -+#include <uio.h> -+ -+#define DRV_NAME "talitos" -+ -+#include "talitos_dev.h" -+#include "talitos_soft.h" -+ -+#define read_random(p,l) get_random_bytes(p,l) -+ -+const char talitos_driver_name[] = "Talitos OCF"; -+const char talitos_driver_version[] = "0.2"; -+ -+static int talitos_newsession(device_t dev, u_int32_t *sidp, -+ struct cryptoini *cri); -+static int talitos_freesession(device_t dev, u_int64_t tid); -+static int talitos_process(device_t dev, struct cryptop *crp, int hint); -+static void dump_talitos_status(struct talitos_softc *sc); -+static int talitos_submit(struct talitos_softc *sc, struct talitos_desc *td, -+ int chsel); -+static void talitos_doneprocessing(struct talitos_softc *sc); -+static void talitos_init_device(struct talitos_softc *sc); -+static void talitos_reset_device_master(struct talitos_softc *sc); -+static void talitos_reset_device(struct talitos_softc *sc); -+static void talitos_errorprocessing(struct talitos_softc *sc); -+#ifdef CONFIG_PPC_MERGE -+static int talitos_probe(struct of_device *ofdev, const struct of_device_id *match); -+static int talitos_remove(struct of_device *ofdev); -+#else -+static int talitos_probe(struct platform_device *pdev); -+static int talitos_remove(struct platform_device *pdev); -+#endif -+#ifdef CONFIG_OCF_RANDOMHARVEST -+static int talitos_read_random(void *arg, u_int32_t *buf, int maxwords); -+static void talitos_rng_init(struct talitos_softc *sc); -+#endif -+ -+static device_method_t talitos_methods = { -+ /* crypto device methods */ -+ DEVMETHOD(cryptodev_newsession, talitos_newsession), -+ DEVMETHOD(cryptodev_freesession,talitos_freesession), -+ DEVMETHOD(cryptodev_process, talitos_process), -+}; -+ -+#define debug talitos_debug -+int talitos_debug = 0; -+module_param(talitos_debug, int, 0644); -+MODULE_PARM_DESC(talitos_debug, "Enable debug"); -+ -+static inline void talitos_write(volatile unsigned *addr, u32 val) -+{ -+ out_be32(addr, val); -+} -+ -+static inline u32 talitos_read(volatile unsigned *addr) -+{ -+ u32 val; -+ val = in_be32(addr); -+ return val; -+} -+ -+static void dump_talitos_status(struct talitos_softc *sc) -+{ -+ unsigned int v, v_hi, i, *ptr; -+ v = talitos_read(sc->sc_base_addr + TALITOS_MCR); -+ v_hi = talitos_read(sc->sc_base_addr + TALITOS_MCR_HI); -+ printk(KERN_INFO "%s: MCR 0x%08x_%08x\n", -+ device_get_nameunit(sc->sc_cdev), v, v_hi); -+ v = talitos_read(sc->sc_base_addr + TALITOS_IMR); -+ v_hi = talitos_read(sc->sc_base_addr + TALITOS_IMR_HI); -+ printk(KERN_INFO "%s: IMR 0x%08x_%08x\n", -+ device_get_nameunit(sc->sc_cdev), v, v_hi); -+ v = talitos_read(sc->sc_base_addr + TALITOS_ISR); -+ v_hi = talitos_read(sc->sc_base_addr + TALITOS_ISR_HI); -+ printk(KERN_INFO "%s: ISR 0x%08x_%08x\n", -+ device_get_nameunit(sc->sc_cdev), v, v_hi); -+ for (i = 0; i < sc->sc_num_channels; i++) { -+ v = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + -+ TALITOS_CH_CDPR); -+ v_hi = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + -+ TALITOS_CH_CDPR_HI); -+ printk(KERN_INFO "%s: CDPR ch%d 0x%08x_%08x\n", -+ device_get_nameunit(sc->sc_cdev), i, v, v_hi); -+ } -+ for (i = 0; i < sc->sc_num_channels; i++) { -+ v = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + -+ TALITOS_CH_CCPSR); -+ v_hi = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + -+ TALITOS_CH_CCPSR_HI); -+ printk(KERN_INFO "%s: CCPSR ch%d 0x%08x_%08x\n", -+ device_get_nameunit(sc->sc_cdev), i, v, v_hi); -+ } -+ ptr = sc->sc_base_addr + TALITOS_CH_DESCBUF; -+ for (i = 0; i < 16; i++) { -+ v = talitos_read(ptr++); v_hi = talitos_read(ptr++); -+ printk(KERN_INFO "%s: DESCBUF ch0 0x%08x_%08x (tdp%02d)\n", -+ device_get_nameunit(sc->sc_cdev), v, v_hi, i); -+ } -+ return; -+} -+ -+ -+#ifdef CONFIG_OCF_RANDOMHARVEST -+/* -+ * pull random numbers off the RNG FIFO, not exceeding amount available -+ */ -+static int -+talitos_read_random(void *arg, u_int32_t *buf, int maxwords) -+{ -+ struct talitos_softc *sc = (struct talitos_softc *) arg; -+ int rc; -+ u_int32_t v; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ /* check for things like FIFO underflow */ -+ v = talitos_read(sc->sc_base_addr + TALITOS_RNGISR_HI); -+ if (unlikely(v)) { -+ printk(KERN_ERR "%s: RNGISR_HI error %08x\n", -+ device_get_nameunit(sc->sc_cdev), v); -+ return 0; -+ } -+ /* -+ * OFL is number of available 64-bit words, -+ * shift and convert to a 32-bit word count -+ */ -+ v = talitos_read(sc->sc_base_addr + TALITOS_RNGSR_HI); -+ v = (v & TALITOS_RNGSR_HI_OFL) >> (16 - 1); -+ if (maxwords > v) -+ maxwords = v; -+ for (rc = 0; rc < maxwords; rc++) { -+ buf[rc] = talitos_read(sc->sc_base_addr + -+ TALITOS_RNG_FIFO + rc*sizeof(u_int32_t)); -+ } -+ if (maxwords & 1) { -+ /* -+ * RNG will complain with an AE in the RNGISR -+ * if we don't complete the pairs of 32-bit reads -+ * to its 64-bit register based FIFO -+ */ -+ v = talitos_read(sc->sc_base_addr + -+ TALITOS_RNG_FIFO + rc*sizeof(u_int32_t)); -+ } -+ -+ return rc; -+} -+ -+static void -+talitos_rng_init(struct talitos_softc *sc) -+{ -+ u_int32_t v; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ /* reset RNG EU */ -+ v = talitos_read(sc->sc_base_addr + TALITOS_RNGRCR_HI); -+ v |= TALITOS_RNGRCR_HI_SR; -+ talitos_write(sc->sc_base_addr + TALITOS_RNGRCR_HI, v); -+ while ((talitos_read(sc->sc_base_addr + TALITOS_RNGSR_HI) -+ & TALITOS_RNGSR_HI_RD) == 0) -+ cpu_relax(); -+ /* -+ * we tell the RNG to start filling the RNG FIFO -+ * by writing the RNGDSR -+ */ -+ v = talitos_read(sc->sc_base_addr + TALITOS_RNGDSR_HI); -+ talitos_write(sc->sc_base_addr + TALITOS_RNGDSR_HI, v); -+ /* -+ * 64 bits of data will be pushed onto the FIFO every -+ * 256 SEC cycles until the FIFO is full. The RNG then -+ * attempts to keep the FIFO full. -+ */ -+ v = talitos_read(sc->sc_base_addr + TALITOS_RNGISR_HI); -+ if (v) { -+ printk(KERN_ERR "%s: RNGISR_HI error %08x\n", -+ device_get_nameunit(sc->sc_cdev), v); -+ return; -+ } -+ /* -+ * n.b. we need to add a FIPS test here - if the RNG is going -+ * to fail, it's going to fail at reset time -+ */ -+ return; -+} -+#endif /* CONFIG_OCF_RANDOMHARVEST */ -+ -+/* -+ * Generate a new software session. -+ */ -+static int -+talitos_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri) -+{ -+ struct cryptoini *c, *encini = NULL, *macini = NULL; -+ struct talitos_softc *sc = device_get_softc(dev); -+ struct talitos_session *ses = NULL; -+ int sesn; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ if (sidp == NULL || cri == NULL || sc == NULL) { -+ DPRINTF("%s,%d - EINVAL\n", __FILE__, __LINE__); -+ return EINVAL; -+ } -+ for (c = cri; c != NULL; c = c->cri_next) { -+ if (c->cri_alg == CRYPTO_MD5 || -+ c->cri_alg == CRYPTO_MD5_HMAC || -+ c->cri_alg == CRYPTO_SHA1 || -+ c->cri_alg == CRYPTO_SHA1_HMAC || -+ c->cri_alg == CRYPTO_NULL_HMAC) { -+ if (macini) -+ return EINVAL; -+ macini = c; -+ } else if (c->cri_alg == CRYPTO_DES_CBC || -+ c->cri_alg == CRYPTO_3DES_CBC || -+ c->cri_alg == CRYPTO_AES_CBC || -+ c->cri_alg == CRYPTO_NULL_CBC) { -+ if (encini) -+ return EINVAL; -+ encini = c; -+ } else { -+ DPRINTF("UNKNOWN c->cri_alg %d\n", encini->cri_alg); -+ return EINVAL; -+ } -+ } -+ if (encini == NULL && macini == NULL) -+ return EINVAL; -+ if (encini) { -+ /* validate key length */ -+ switch (encini->cri_alg) { -+ case CRYPTO_DES_CBC: -+ if (encini->cri_klen != 64) -+ return EINVAL; -+ break; -+ case CRYPTO_3DES_CBC: -+ if (encini->cri_klen != 192) { -+ return EINVAL; -+ } -+ break; -+ case CRYPTO_AES_CBC: -+ if (encini->cri_klen != 128 && -+ encini->cri_klen != 192 && -+ encini->cri_klen != 256) -+ return EINVAL; -+ break; -+ default: -+ DPRINTF("UNKNOWN encini->cri_alg %d\n", -+ encini->cri_alg); -+ return EINVAL; -+ } -+ } -+ -+ if (sc->sc_sessions == NULL) { -+ ses = sc->sc_sessions = (struct talitos_session *) -+ kmalloc(sizeof(struct talitos_session), SLAB_ATOMIC); -+ if (ses == NULL) -+ return ENOMEM; -+ memset(ses, 0, sizeof(struct talitos_session)); -+ sesn = 0; -+ sc->sc_nsessions = 1; -+ } else { -+ for (sesn = 0; sesn < sc->sc_nsessions; sesn++) { -+ if (sc->sc_sessions[sesn].ses_used == 0) { -+ ses = &sc->sc_sessions[sesn]; -+ break; -+ } -+ } -+ -+ if (ses == NULL) { -+ /* allocating session */ -+ sesn = sc->sc_nsessions; -+ ses = (struct talitos_session *) kmalloc( -+ (sesn + 1) * sizeof(struct talitos_session), -+ SLAB_ATOMIC); -+ if (ses == NULL) -+ return ENOMEM; -+ memset(ses, 0, -+ (sesn + 1) * sizeof(struct talitos_session)); -+ memcpy(ses, sc->sc_sessions, -+ sesn * sizeof(struct talitos_session)); -+ memset(sc->sc_sessions, 0, -+ sesn * sizeof(struct talitos_session)); -+ kfree(sc->sc_sessions); -+ sc->sc_sessions = ses; -+ ses = &sc->sc_sessions[sesn]; -+ sc->sc_nsessions++; -+ } -+ } -+ -+ ses->ses_used = 1; -+ -+ if (encini) { -+ /* get an IV */ -+ /* XXX may read fewer than requested */ -+ read_random(ses->ses_iv, sizeof(ses->ses_iv)); -+ -+ ses->ses_klen = (encini->cri_klen + 7) / 8; -+ memcpy(ses->ses_key, encini->cri_key, ses->ses_klen); -+ if (macini) { -+ /* doing hash on top of cipher */ -+ ses->ses_hmac_len = (macini->cri_klen + 7) / 8; -+ memcpy(ses->ses_hmac, macini->cri_key, -+ ses->ses_hmac_len); -+ } -+ } else if (macini) { -+ /* doing hash */ -+ ses->ses_klen = (macini->cri_klen + 7) / 8; -+ memcpy(ses->ses_key, macini->cri_key, ses->ses_klen); -+ } -+ -+ /* back compat way of determining MSC result len */ -+ if (macini) { -+ ses->ses_mlen = macini->cri_mlen; -+ if (ses->ses_mlen == 0) { -+ if (macini->cri_alg == CRYPTO_MD5_HMAC) -+ ses->ses_mlen = MD5_HASH_LEN; -+ else -+ ses->ses_mlen = SHA1_HASH_LEN; -+ } -+ } -+ -+ /* really should make up a template td here, -+ * and only fill things like i/o and direction in process() */ -+ -+ /* assign session ID */ -+ *sidp = TALITOS_SID(sc->sc_num, sesn); -+ return 0; -+} -+ -+/* -+ * Deallocate a session. -+ */ -+static int -+talitos_freesession(device_t dev, u_int64_t tid) -+{ -+ struct talitos_softc *sc = device_get_softc(dev); -+ int session, ret; -+ u_int32_t sid = ((u_int32_t) tid) & 0xffffffff; -+ -+ if (sc == NULL) -+ return EINVAL; -+ session = TALITOS_SESSION(sid); -+ if (session < sc->sc_nsessions) { -+ memset(&sc->sc_sessions[session], 0, -+ sizeof(sc->sc_sessions[session])); -+ ret = 0; -+ } else -+ ret = EINVAL; -+ return ret; -+} -+ -+/* -+ * launch device processing - it will come back with done notification -+ * in the form of an interrupt and/or HDR_DONE_BITS in header -+ */ -+static int -+talitos_submit( -+ struct talitos_softc *sc, -+ struct talitos_desc *td, -+ int chsel) -+{ -+ u_int32_t v; -+ -+ v = dma_map_single(NULL, td, sizeof(*td), DMA_TO_DEVICE); -+ talitos_write(sc->sc_base_addr + -+ chsel*TALITOS_CH_OFFSET + TALITOS_CH_FF, 0); -+ talitos_write(sc->sc_base_addr + -+ chsel*TALITOS_CH_OFFSET + TALITOS_CH_FF_HI, v); -+ return 0; -+} -+ -+static int -+talitos_process(device_t dev, struct cryptop *crp, int hint) -+{ -+ int i, err = 0, ivsize; -+ struct talitos_softc *sc = device_get_softc(dev); -+ struct cryptodesc *crd1, *crd2, *maccrd, *enccrd; -+ caddr_t iv; -+ struct talitos_session *ses; -+ struct talitos_desc *td; -+ unsigned long flags; -+ /* descriptor mappings */ -+ int hmac_key, hmac_data, cipher_iv, cipher_key, -+ in_fifo, out_fifo, cipher_iv_out; -+ static int chsel = -1; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ if (crp == NULL || crp->crp_callback == NULL || sc == NULL) { -+ return EINVAL; -+ } -+ crp->crp_etype = 0; -+ if (TALITOS_SESSION(crp->crp_sid) >= sc->sc_nsessions) { -+ return EINVAL; -+ } -+ -+ ses = &sc->sc_sessions[TALITOS_SESSION(crp->crp_sid)]; -+ -+ /* enter the channel scheduler */ -+ spin_lock_irqsave(&sc->sc_chnfifolock[sc->sc_num_channels], flags); -+ -+ /* reuse channel that already had/has requests for the required EU */ -+ for (i = 0; i < sc->sc_num_channels; i++) { -+ if (sc->sc_chnlastalg[i] == crp->crp_desc->crd_alg) -+ break; -+ } -+ if (i == sc->sc_num_channels) { -+ /* -+ * haven't seen this algo the last sc_num_channels or more -+ * use round robin in this case -+ * nb: sc->sc_num_channels must be power of 2 -+ */ -+ chsel = (chsel + 1) & (sc->sc_num_channels - 1); -+ } else { -+ /* -+ * matches channel with same target execution unit; -+ * use same channel in this case -+ */ -+ chsel = i; -+ } -+ sc->sc_chnlastalg[chsel] = crp->crp_desc->crd_alg; -+ -+ /* release the channel scheduler lock */ -+ spin_unlock_irqrestore(&sc->sc_chnfifolock[sc->sc_num_channels], flags); -+ -+ /* acquire the selected channel fifo lock */ -+ spin_lock_irqsave(&sc->sc_chnfifolock[chsel], flags); -+ -+ /* find and reserve next available descriptor-cryptop pair */ -+ for (i = 0; i < sc->sc_chfifo_len; i++) { -+ if (sc->sc_chnfifo[chsel][i].cf_desc.hdr == 0) { -+ /* -+ * ensure correct descriptor formation by -+ * avoiding inadvertently setting "optional" entries -+ * e.g. not using "optional" dptr2 for MD/HMAC descs -+ */ -+ memset(&sc->sc_chnfifo[chsel][i].cf_desc, -+ 0, sizeof(*td)); -+ /* reserve it with done notification request bit */ -+ sc->sc_chnfifo[chsel][i].cf_desc.hdr |= -+ TALITOS_DONE_NOTIFY; -+ break; -+ } -+ } -+ spin_unlock_irqrestore(&sc->sc_chnfifolock[chsel], flags); -+ -+ if (i == sc->sc_chfifo_len) { -+ /* fifo full */ -+ err = ERESTART; -+ goto errout; -+ } -+ -+ td = &sc->sc_chnfifo[chsel][i].cf_desc; -+ sc->sc_chnfifo[chsel][i].cf_crp = crp; -+ -+ crd1 = crp->crp_desc; -+ if (crd1 == NULL) { -+ err = EINVAL; -+ goto errout; -+ } -+ crd2 = crd1->crd_next; -+ /* prevent compiler warning */ -+ hmac_key = 0; -+ hmac_data = 0; -+ if (crd2 == NULL) { -+ td->hdr |= TD_TYPE_COMMON_NONSNOOP_NO_AFEU; -+ /* assign descriptor dword ptr mappings for this desc. type */ -+ cipher_iv = 1; -+ cipher_key = 2; -+ in_fifo = 3; -+ cipher_iv_out = 5; -+ if (crd1->crd_alg == CRYPTO_MD5_HMAC || -+ crd1->crd_alg == CRYPTO_SHA1_HMAC || -+ crd1->crd_alg == CRYPTO_SHA1 || -+ crd1->crd_alg == CRYPTO_MD5) { -+ out_fifo = 5; -+ maccrd = crd1; -+ enccrd = NULL; -+ } else if (crd1->crd_alg == CRYPTO_DES_CBC || -+ crd1->crd_alg == CRYPTO_3DES_CBC || -+ crd1->crd_alg == CRYPTO_AES_CBC || -+ crd1->crd_alg == CRYPTO_ARC4) { -+ out_fifo = 4; -+ maccrd = NULL; -+ enccrd = crd1; -+ } else { -+ DPRINTF("UNKNOWN crd1->crd_alg %d\n", crd1->crd_alg); -+ err = EINVAL; -+ goto errout; -+ } -+ } else { -+ if (sc->sc_desc_types & TALITOS_HAS_DT_IPSEC_ESP) { -+ td->hdr |= TD_TYPE_IPSEC_ESP; -+ } else { -+ DPRINTF("unimplemented: multiple descriptor ipsec\n"); -+ err = EINVAL; -+ goto errout; -+ } -+ /* assign descriptor dword ptr mappings for this desc. type */ -+ hmac_key = 0; -+ hmac_data = 1; -+ cipher_iv = 2; -+ cipher_key = 3; -+ in_fifo = 4; -+ out_fifo = 5; -+ cipher_iv_out = 6; -+ if ((crd1->crd_alg == CRYPTO_MD5_HMAC || -+ crd1->crd_alg == CRYPTO_SHA1_HMAC || -+ crd1->crd_alg == CRYPTO_MD5 || -+ crd1->crd_alg == CRYPTO_SHA1) && -+ (crd2->crd_alg == CRYPTO_DES_CBC || -+ crd2->crd_alg == CRYPTO_3DES_CBC || -+ crd2->crd_alg == CRYPTO_AES_CBC || -+ crd2->crd_alg == CRYPTO_ARC4) && -+ ((crd2->crd_flags & CRD_F_ENCRYPT) == 0)) { -+ maccrd = crd1; -+ enccrd = crd2; -+ } else if ((crd1->crd_alg == CRYPTO_DES_CBC || -+ crd1->crd_alg == CRYPTO_ARC4 || -+ crd1->crd_alg == CRYPTO_3DES_CBC || -+ crd1->crd_alg == CRYPTO_AES_CBC) && -+ (crd2->crd_alg == CRYPTO_MD5_HMAC || -+ crd2->crd_alg == CRYPTO_SHA1_HMAC || -+ crd2->crd_alg == CRYPTO_MD5 || -+ crd2->crd_alg == CRYPTO_SHA1) && -+ (crd1->crd_flags & CRD_F_ENCRYPT)) { -+ enccrd = crd1; -+ maccrd = crd2; -+ } else { -+ /* We cannot order the SEC as requested */ -+ printk("%s: cannot do the order\n", -+ device_get_nameunit(sc->sc_cdev)); -+ err = EINVAL; -+ goto errout; -+ } -+ } -+ /* assign in_fifo and out_fifo based on input/output struct type */ -+ if (crp->crp_flags & CRYPTO_F_SKBUF) { -+ /* using SKB buffers */ -+ struct sk_buff *skb = (struct sk_buff *)crp->crp_buf; -+ if (skb_shinfo(skb)->nr_frags) { -+ printk("%s: skb frags unimplemented\n", -+ device_get_nameunit(sc->sc_cdev)); -+ err = EINVAL; -+ goto errout; -+ } -+ td->ptr[in_fifo].ptr = dma_map_single(NULL, skb->data, -+ skb->len, DMA_TO_DEVICE); -+ td->ptr[in_fifo].len = skb->len; -+ td->ptr[out_fifo].ptr = dma_map_single(NULL, skb->data, -+ skb->len, DMA_TO_DEVICE); -+ td->ptr[out_fifo].len = skb->len; -+ td->ptr[hmac_data].ptr = dma_map_single(NULL, skb->data, -+ skb->len, DMA_TO_DEVICE); -+ } else if (crp->crp_flags & CRYPTO_F_IOV) { -+ /* using IOV buffers */ -+ struct uio *uiop = (struct uio *)crp->crp_buf; -+ if (uiop->uio_iovcnt > 1) { -+ printk("%s: iov frags unimplemented\n", -+ device_get_nameunit(sc->sc_cdev)); -+ err = EINVAL; -+ goto errout; -+ } -+ td->ptr[in_fifo].ptr = dma_map_single(NULL, -+ uiop->uio_iov->iov_base, crp->crp_ilen, DMA_TO_DEVICE); -+ td->ptr[in_fifo].len = crp->crp_ilen; -+ /* crp_olen is never set; always use crp_ilen */ -+ td->ptr[out_fifo].ptr = dma_map_single(NULL, -+ uiop->uio_iov->iov_base, -+ crp->crp_ilen, DMA_TO_DEVICE); -+ td->ptr[out_fifo].len = crp->crp_ilen; -+ } else { -+ /* using contig buffers */ -+ td->ptr[in_fifo].ptr = dma_map_single(NULL, -+ crp->crp_buf, crp->crp_ilen, DMA_TO_DEVICE); -+ td->ptr[in_fifo].len = crp->crp_ilen; -+ td->ptr[out_fifo].ptr = dma_map_single(NULL, -+ crp->crp_buf, crp->crp_ilen, DMA_TO_DEVICE); -+ td->ptr[out_fifo].len = crp->crp_ilen; -+ } -+ if (enccrd) { -+ switch (enccrd->crd_alg) { -+ case CRYPTO_3DES_CBC: -+ td->hdr |= TALITOS_MODE0_DEU_3DES; -+ /* FALLTHROUGH */ -+ case CRYPTO_DES_CBC: -+ td->hdr |= TALITOS_SEL0_DEU -+ | TALITOS_MODE0_DEU_CBC; -+ if (enccrd->crd_flags & CRD_F_ENCRYPT) -+ td->hdr |= TALITOS_MODE0_DEU_ENC; -+ ivsize = 2*sizeof(u_int32_t); -+ DPRINTF("%cDES ses %d ch %d len %d\n", -+ (td->hdr & TALITOS_MODE0_DEU_3DES)?'3':'1', -+ (u32)TALITOS_SESSION(crp->crp_sid), -+ chsel, td->ptr[in_fifo].len); -+ break; -+ case CRYPTO_AES_CBC: -+ td->hdr |= TALITOS_SEL0_AESU -+ | TALITOS_MODE0_AESU_CBC; -+ if (enccrd->crd_flags & CRD_F_ENCRYPT) -+ td->hdr |= TALITOS_MODE0_AESU_ENC; -+ ivsize = 4*sizeof(u_int32_t); -+ DPRINTF("AES ses %d ch %d len %d\n", -+ (u32)TALITOS_SESSION(crp->crp_sid), -+ chsel, td->ptr[in_fifo].len); -+ break; -+ default: -+ printk("%s: unimplemented enccrd->crd_alg %d\n", -+ device_get_nameunit(sc->sc_cdev), enccrd->crd_alg); -+ err = EINVAL; -+ goto errout; -+ } -+ /* -+ * Setup encrypt/decrypt state. When using basic ops -+ * we can't use an inline IV because hash/crypt offset -+ * must be from the end of the IV to the start of the -+ * crypt data and this leaves out the preceding header -+ * from the hash calculation. Instead we place the IV -+ * in the state record and set the hash/crypt offset to -+ * copy both the header+IV. -+ */ -+ if (enccrd->crd_flags & CRD_F_ENCRYPT) { -+ td->hdr |= TALITOS_DIR_OUTBOUND; -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) -+ iv = enccrd->crd_iv; -+ else -+ iv = (caddr_t) ses->ses_iv; -+ if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0) { -+ crypto_copyback(crp->crp_flags, crp->crp_buf, -+ enccrd->crd_inject, ivsize, iv); -+ } -+ } else { -+ td->hdr |= TALITOS_DIR_INBOUND; -+ if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) { -+ iv = enccrd->crd_iv; -+ bcopy(enccrd->crd_iv, iv, ivsize); -+ } else { -+ iv = (caddr_t) ses->ses_iv; -+ crypto_copydata(crp->crp_flags, crp->crp_buf, -+ enccrd->crd_inject, ivsize, iv); -+ } -+ } -+ td->ptr[cipher_iv].ptr = dma_map_single(NULL, iv, ivsize, -+ DMA_TO_DEVICE); -+ td->ptr[cipher_iv].len = ivsize; -+ /* -+ * we don't need the cipher iv out length/pointer -+ * field to do ESP IPsec. Therefore we set the len field as 0, -+ * which tells the SEC not to do anything with this len/ptr -+ * field. Previously, when length/pointer as pointing to iv, -+ * it gave us corruption of packets. -+ */ -+ td->ptr[cipher_iv_out].len = 0; -+ } -+ if (enccrd && maccrd) { -+ /* this is ipsec only for now */ -+ td->hdr |= TALITOS_SEL1_MDEU -+ | TALITOS_MODE1_MDEU_INIT -+ | TALITOS_MODE1_MDEU_PAD; -+ switch (maccrd->crd_alg) { -+ case CRYPTO_MD5: -+ td->hdr |= TALITOS_MODE1_MDEU_MD5; -+ break; -+ case CRYPTO_MD5_HMAC: -+ td->hdr |= TALITOS_MODE1_MDEU_MD5_HMAC; -+ break; -+ case CRYPTO_SHA1: -+ td->hdr |= TALITOS_MODE1_MDEU_SHA1; -+ break; -+ case CRYPTO_SHA1_HMAC: -+ td->hdr |= TALITOS_MODE1_MDEU_SHA1_HMAC; -+ break; -+ default: -+ /* We cannot order the SEC as requested */ -+ printk("%s: cannot do the order\n", -+ device_get_nameunit(sc->sc_cdev)); -+ err = EINVAL; -+ goto errout; -+ } -+ if ((maccrd->crd_alg == CRYPTO_MD5_HMAC) || -+ (maccrd->crd_alg == CRYPTO_SHA1_HMAC)) { -+ /* -+ * The offset from hash data to the start of -+ * crypt data is the difference in the skips. -+ */ -+ /* ipsec only for now */ -+ td->ptr[hmac_key].ptr = dma_map_single(NULL, -+ ses->ses_hmac, ses->ses_hmac_len, DMA_TO_DEVICE); -+ td->ptr[hmac_key].len = ses->ses_hmac_len; -+ td->ptr[in_fifo].ptr += enccrd->crd_skip; -+ td->ptr[in_fifo].len = enccrd->crd_len; -+ td->ptr[out_fifo].ptr += enccrd->crd_skip; -+ td->ptr[out_fifo].len = enccrd->crd_len; -+ /* bytes of HMAC to postpend to ciphertext */ -+ td->ptr[out_fifo].extent = ses->ses_mlen; -+ td->ptr[hmac_data].ptr += maccrd->crd_skip; -+ td->ptr[hmac_data].len = enccrd->crd_skip - maccrd->crd_skip; -+ } -+ if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) { -+ printk("%s: CRD_F_KEY_EXPLICIT unimplemented\n", -+ device_get_nameunit(sc->sc_cdev)); -+ } -+ } -+ if (!enccrd && maccrd) { -+ /* single MD5 or SHA */ -+ td->hdr |= TALITOS_SEL0_MDEU -+ | TALITOS_MODE0_MDEU_INIT -+ | TALITOS_MODE0_MDEU_PAD; -+ switch (maccrd->crd_alg) { -+ case CRYPTO_MD5: -+ td->hdr |= TALITOS_MODE0_MDEU_MD5; -+ DPRINTF("MD5 ses %d ch %d len %d\n", -+ (u32)TALITOS_SESSION(crp->crp_sid), -+ chsel, td->ptr[in_fifo].len); -+ break; -+ case CRYPTO_MD5_HMAC: -+ td->hdr |= TALITOS_MODE0_MDEU_MD5_HMAC; -+ break; -+ case CRYPTO_SHA1: -+ td->hdr |= TALITOS_MODE0_MDEU_SHA1; -+ DPRINTF("SHA1 ses %d ch %d len %d\n", -+ (u32)TALITOS_SESSION(crp->crp_sid), -+ chsel, td->ptr[in_fifo].len); -+ break; -+ case CRYPTO_SHA1_HMAC: -+ td->hdr |= TALITOS_MODE0_MDEU_SHA1_HMAC; -+ break; -+ default: -+ /* We cannot order the SEC as requested */ -+ DPRINTF("cannot do the order\n"); -+ err = EINVAL; -+ goto errout; -+ } -+ -+ if (crp->crp_flags & CRYPTO_F_IOV) -+ td->ptr[out_fifo].ptr += maccrd->crd_inject; -+ -+ if ((maccrd->crd_alg == CRYPTO_MD5_HMAC) || -+ (maccrd->crd_alg == CRYPTO_SHA1_HMAC)) { -+ td->ptr[hmac_key].ptr = dma_map_single(NULL, -+ ses->ses_hmac, ses->ses_hmac_len, -+ DMA_TO_DEVICE); -+ td->ptr[hmac_key].len = ses->ses_hmac_len; -+ } -+ } -+ else { -+ /* using process key (session data has duplicate) */ -+ td->ptr[cipher_key].ptr = dma_map_single(NULL, -+ enccrd->crd_key, (enccrd->crd_klen + 7) / 8, -+ DMA_TO_DEVICE); -+ td->ptr[cipher_key].len = (enccrd->crd_klen + 7) / 8; -+ } -+ /* descriptor complete - GO! */ -+ return talitos_submit(sc, td, chsel); -+ -+errout: -+ if (err != ERESTART) { -+ crp->crp_etype = err; -+ crypto_done(crp); -+ } -+ return err; -+} -+ -+/* go through all channels descriptors, notifying OCF what has -+ * _and_hasn't_ successfully completed and reset the device -+ * (otherwise it's up to decoding desc hdrs!) -+ */ -+static void talitos_errorprocessing(struct talitos_softc *sc) -+{ -+ unsigned long flags; -+ int i, j; -+ -+ /* disable further scheduling until under control */ -+ spin_lock_irqsave(&sc->sc_chnfifolock[sc->sc_num_channels], flags); -+ -+ if (debug) dump_talitos_status(sc); -+ /* go through descriptors, try and salvage those successfully done, -+ * and EIO those that weren't -+ */ -+ for (i = 0; i < sc->sc_num_channels; i++) { -+ spin_lock_irqsave(&sc->sc_chnfifolock[i], flags); -+ for (j = 0; j < sc->sc_chfifo_len; j++) { -+ if (sc->sc_chnfifo[i][j].cf_desc.hdr) { -+ if ((sc->sc_chnfifo[i][j].cf_desc.hdr -+ & TALITOS_HDR_DONE_BITS) -+ != TALITOS_HDR_DONE_BITS) { -+ /* this one didn't finish */ -+ /* signify in crp->etype */ -+ sc->sc_chnfifo[i][j].cf_crp->crp_etype -+ = EIO; -+ } -+ } else -+ continue; /* free entry */ -+ /* either way, notify ocf */ -+ crypto_done(sc->sc_chnfifo[i][j].cf_crp); -+ /* and tag it available again -+ * -+ * memset to ensure correct descriptor formation by -+ * avoiding inadvertently setting "optional" entries -+ * e.g. not using "optional" dptr2 MD/HMAC processing -+ */ -+ memset(&sc->sc_chnfifo[i][j].cf_desc, -+ 0, sizeof(struct talitos_desc)); -+ } -+ spin_unlock_irqrestore(&sc->sc_chnfifolock[i], flags); -+ } -+ /* reset and initialize the SEC h/w device */ -+ talitos_reset_device(sc); -+ talitos_init_device(sc); -+#ifdef CONFIG_OCF_RANDOMHARVEST -+ if (sc->sc_exec_units & TALITOS_HAS_EU_RNG) -+ talitos_rng_init(sc); -+#endif -+ -+ /* Okay. Stand by. */ -+ spin_unlock_irqrestore(&sc->sc_chnfifolock[sc->sc_num_channels], flags); -+ -+ return; -+} -+ -+/* go through all channels descriptors, notifying OCF what's been done */ -+static void talitos_doneprocessing(struct talitos_softc *sc) -+{ -+ unsigned long flags; -+ int i, j; -+ -+ /* go through descriptors looking for done bits */ -+ for (i = 0; i < sc->sc_num_channels; i++) { -+ spin_lock_irqsave(&sc->sc_chnfifolock[i], flags); -+ for (j = 0; j < sc->sc_chfifo_len; j++) { -+ /* descriptor has done bits set? */ -+ if ((sc->sc_chnfifo[i][j].cf_desc.hdr -+ & TALITOS_HDR_DONE_BITS) -+ == TALITOS_HDR_DONE_BITS) { -+ /* notify ocf */ -+ crypto_done(sc->sc_chnfifo[i][j].cf_crp); -+ /* and tag it available again -+ * -+ * memset to ensure correct descriptor formation by -+ * avoiding inadvertently setting "optional" entries -+ * e.g. not using "optional" dptr2 MD/HMAC processing -+ */ -+ memset(&sc->sc_chnfifo[i][j].cf_desc, -+ 0, sizeof(struct talitos_desc)); -+ } -+ } -+ spin_unlock_irqrestore(&sc->sc_chnfifolock[i], flags); -+ } -+ return; -+} -+ -+static irqreturn_t -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19) -+talitos_intr(int irq, void *arg) -+#else -+talitos_intr(int irq, void *arg, struct pt_regs *regs) -+#endif -+{ -+ struct talitos_softc *sc = arg; -+ u_int32_t v, v_hi; -+ -+ /* ack */ -+ v = talitos_read(sc->sc_base_addr + TALITOS_ISR); -+ v_hi = talitos_read(sc->sc_base_addr + TALITOS_ISR_HI); -+ talitos_write(sc->sc_base_addr + TALITOS_ICR, v); -+ talitos_write(sc->sc_base_addr + TALITOS_ICR_HI, v_hi); -+ -+ if (unlikely(v & TALITOS_ISR_ERROR)) { -+ /* Okay, Houston, we've had a problem here. */ -+ printk(KERN_DEBUG "%s: got error interrupt - ISR 0x%08x_%08x\n", -+ device_get_nameunit(sc->sc_cdev), v, v_hi); -+ talitos_errorprocessing(sc); -+ } else -+ if (likely(v & TALITOS_ISR_DONE)) { -+ talitos_doneprocessing(sc); -+ } -+ return IRQ_HANDLED; -+} -+ -+/* -+ * Initialize registers we need to touch only once. -+ */ -+static void -+talitos_init_device(struct talitos_softc *sc) -+{ -+ u_int32_t v; -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ /* init all channels */ -+ for (i = 0; i < sc->sc_num_channels; i++) { -+ v = talitos_read(sc->sc_base_addr + -+ i*TALITOS_CH_OFFSET + TALITOS_CH_CCCR_HI); -+ v |= TALITOS_CH_CCCR_HI_CDWE -+ | TALITOS_CH_CCCR_HI_CDIE; /* invoke interrupt if done */ -+ talitos_write(sc->sc_base_addr + -+ i*TALITOS_CH_OFFSET + TALITOS_CH_CCCR_HI, v); -+ } -+ /* enable all interrupts */ -+ v = talitos_read(sc->sc_base_addr + TALITOS_IMR); -+ v |= TALITOS_IMR_ALL; -+ talitos_write(sc->sc_base_addr + TALITOS_IMR, v); -+ v = talitos_read(sc->sc_base_addr + TALITOS_IMR_HI); -+ v |= TALITOS_IMR_HI_ERRONLY; -+ talitos_write(sc->sc_base_addr + TALITOS_IMR_HI, v); -+ return; -+} -+ -+/* -+ * set the master reset bit on the device. -+ */ -+static void -+talitos_reset_device_master(struct talitos_softc *sc) -+{ -+ u_int32_t v; -+ -+ /* Reset the device by writing 1 to MCR:SWR and waiting 'til cleared */ -+ v = talitos_read(sc->sc_base_addr + TALITOS_MCR); -+ talitos_write(sc->sc_base_addr + TALITOS_MCR, v | TALITOS_MCR_SWR); -+ -+ while (talitos_read(sc->sc_base_addr + TALITOS_MCR) & TALITOS_MCR_SWR) -+ cpu_relax(); -+ -+ return; -+} -+ -+/* -+ * Resets the device. Values in the registers are left as is -+ * from the reset (i.e. initial values are assigned elsewhere). -+ */ -+static void -+talitos_reset_device(struct talitos_softc *sc) -+{ -+ u_int32_t v; -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ /* -+ * Master reset -+ * errata documentation: warning: certain SEC interrupts -+ * are not fully cleared by writing the MCR:SWR bit, -+ * set bit twice to completely reset -+ */ -+ talitos_reset_device_master(sc); /* once */ -+ talitos_reset_device_master(sc); /* and once again */ -+ -+ /* reset all channels */ -+ for (i = 0; i < sc->sc_num_channels; i++) { -+ v = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + -+ TALITOS_CH_CCCR); -+ talitos_write(sc->sc_base_addr + i*TALITOS_CH_OFFSET + -+ TALITOS_CH_CCCR, v | TALITOS_CH_CCCR_RESET); -+ } -+} -+ -+/* Set up the crypto device structure, private data, -+ * and anything else we need before we start */ -+#ifdef CONFIG_PPC_MERGE -+static int talitos_probe(struct of_device *ofdev, const struct of_device_id *match) -+#else -+static int talitos_probe(struct platform_device *pdev) -+#endif -+{ -+ struct talitos_softc *sc = NULL; -+ struct resource *r; -+#ifdef CONFIG_PPC_MERGE -+ struct device *device = &ofdev->dev; -+ struct device_node *np = ofdev->node; -+ const unsigned int *prop; -+ int err; -+ struct resource res; -+#endif -+ static int num_chips = 0; -+ int rc; -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ -+ sc = (struct talitos_softc *) kmalloc(sizeof(*sc), GFP_KERNEL); -+ if (!sc) -+ return -ENOMEM; -+ memset(sc, 0, sizeof(*sc)); -+ -+ softc_device_init(sc, DRV_NAME, num_chips, talitos_methods); -+ -+ sc->sc_irq = -1; -+ sc->sc_cid = -1; -+#ifndef CONFIG_PPC_MERGE -+ sc->sc_dev = pdev; -+#endif -+ sc->sc_num = num_chips++; -+ -+#ifdef CONFIG_PPC_MERGE -+ dev_set_drvdata(device, sc); -+#else -+ platform_set_drvdata(sc->sc_dev, sc); -+#endif -+ -+ /* get the irq line */ -+#ifdef CONFIG_PPC_MERGE -+ err = of_address_to_resource(np, 0, &res); -+ if (err) -+ return -EINVAL; -+ r = &res; -+ -+ sc->sc_irq = irq_of_parse_and_map(np, 0); -+#else -+ /* get a pointer to the register memory */ -+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ -+ sc->sc_irq = platform_get_irq(pdev, 0); -+#endif -+ rc = request_irq(sc->sc_irq, talitos_intr, 0, -+ device_get_nameunit(sc->sc_cdev), sc); -+ if (rc) { -+ printk(KERN_ERR "%s: failed to hook irq %d\n", -+ device_get_nameunit(sc->sc_cdev), sc->sc_irq); -+ sc->sc_irq = -1; -+ goto out; -+ } -+ -+ sc->sc_base_addr = (ocf_iomem_t) ioremap(r->start, (r->end - r->start)); -+ if (!sc->sc_base_addr) { -+ printk(KERN_ERR "%s: failed to ioremap\n", -+ device_get_nameunit(sc->sc_cdev)); -+ goto out; -+ } -+ -+ /* figure out our SEC's properties and capabilities */ -+ sc->sc_chiprev = (u64)talitos_read(sc->sc_base_addr + TALITOS_ID) << 32 -+ | talitos_read(sc->sc_base_addr + TALITOS_ID_HI); -+ DPRINTF("sec id 0x%llx\n", sc->sc_chiprev); -+ -+#ifdef CONFIG_PPC_MERGE -+ /* get SEC properties from device tree, defaulting to SEC 2.0 */ -+ -+ prop = of_get_property(np, "num-channels", NULL); -+ sc->sc_num_channels = prop ? *prop : TALITOS_NCHANNELS_SEC_2_0; -+ -+ prop = of_get_property(np, "channel-fifo-len", NULL); -+ sc->sc_chfifo_len = prop ? *prop : TALITOS_CHFIFOLEN_SEC_2_0; -+ -+ prop = of_get_property(np, "exec-units-mask", NULL); -+ sc->sc_exec_units = prop ? *prop : TALITOS_HAS_EUS_SEC_2_0; -+ -+ prop = of_get_property(np, "descriptor-types-mask", NULL); -+ sc->sc_desc_types = prop ? *prop : TALITOS_HAS_DESCTYPES_SEC_2_0; -+#else -+ /* bulk should go away with openfirmware flat device tree support */ -+ if (sc->sc_chiprev & TALITOS_ID_SEC_2_0) { -+ sc->sc_num_channels = TALITOS_NCHANNELS_SEC_2_0; -+ sc->sc_chfifo_len = TALITOS_CHFIFOLEN_SEC_2_0; -+ sc->sc_exec_units = TALITOS_HAS_EUS_SEC_2_0; -+ sc->sc_desc_types = TALITOS_HAS_DESCTYPES_SEC_2_0; -+ } else { -+ printk(KERN_ERR "%s: failed to id device\n", -+ device_get_nameunit(sc->sc_cdev)); -+ goto out; -+ } -+#endif -+ -+ /* + 1 is for the meta-channel lock used by the channel scheduler */ -+ sc->sc_chnfifolock = (spinlock_t *) kmalloc( -+ (sc->sc_num_channels + 1) * sizeof(spinlock_t), GFP_KERNEL); -+ if (!sc->sc_chnfifolock) -+ goto out; -+ for (i = 0; i < sc->sc_num_channels + 1; i++) { -+ spin_lock_init(&sc->sc_chnfifolock[i]); -+ } -+ -+ sc->sc_chnlastalg = (int *) kmalloc( -+ sc->sc_num_channels * sizeof(int), GFP_KERNEL); -+ if (!sc->sc_chnlastalg) -+ goto out; -+ memset(sc->sc_chnlastalg, 0, sc->sc_num_channels * sizeof(int)); -+ -+ sc->sc_chnfifo = (struct desc_cryptop_pair **) kmalloc( -+ sc->sc_num_channels * sizeof(struct desc_cryptop_pair *), -+ GFP_KERNEL); -+ if (!sc->sc_chnfifo) -+ goto out; -+ for (i = 0; i < sc->sc_num_channels; i++) { -+ sc->sc_chnfifo[i] = (struct desc_cryptop_pair *) kmalloc( -+ sc->sc_chfifo_len * sizeof(struct desc_cryptop_pair), -+ GFP_KERNEL); -+ if (!sc->sc_chnfifo[i]) -+ goto out; -+ memset(sc->sc_chnfifo[i], 0, -+ sc->sc_chfifo_len * sizeof(struct desc_cryptop_pair)); -+ } -+ -+ /* reset and initialize the SEC h/w device */ -+ talitos_reset_device(sc); -+ talitos_init_device(sc); -+ -+ sc->sc_cid = crypto_get_driverid(softc_get_device(sc),CRYPTOCAP_F_HARDWARE); -+ if (sc->sc_cid < 0) { -+ printk(KERN_ERR "%s: could not get crypto driver id\n", -+ device_get_nameunit(sc->sc_cdev)); -+ goto out; -+ } -+ -+ /* register algorithms with the framework */ -+ printk("%s:", device_get_nameunit(sc->sc_cdev)); -+ -+ if (sc->sc_exec_units & TALITOS_HAS_EU_RNG) { -+ printk(" rng"); -+#ifdef CONFIG_OCF_RANDOMHARVEST -+ talitos_rng_init(sc); -+ crypto_rregister(sc->sc_cid, talitos_read_random, sc); -+#endif -+ } -+ if (sc->sc_exec_units & TALITOS_HAS_EU_DEU) { -+ printk(" des/3des"); -+ crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0); -+ crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0); -+ } -+ if (sc->sc_exec_units & TALITOS_HAS_EU_AESU) { -+ printk(" aes"); -+ crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0); -+ } -+ if (sc->sc_exec_units & TALITOS_HAS_EU_MDEU) { -+ printk(" md5"); -+ crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0); -+ /* HMAC support only with IPsec for now */ -+ crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0); -+ printk(" sha1"); -+ crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0); -+ /* HMAC support only with IPsec for now */ -+ crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0); -+ } -+ printk("\n"); -+ return 0; -+ -+out: -+#ifndef CONFIG_PPC_MERGE -+ talitos_remove(pdev); -+#endif -+ return -ENOMEM; -+} -+ -+#ifdef CONFIG_PPC_MERGE -+static int talitos_remove(struct of_device *ofdev) -+#else -+static int talitos_remove(struct platform_device *pdev) -+#endif -+{ -+#ifdef CONFIG_PPC_MERGE -+ struct talitos_softc *sc = dev_get_drvdata(&ofdev->dev); -+#else -+ struct talitos_softc *sc = platform_get_drvdata(pdev); -+#endif -+ int i; -+ -+ DPRINTF("%s()\n", __FUNCTION__); -+ if (sc->sc_cid >= 0) -+ crypto_unregister_all(sc->sc_cid); -+ if (sc->sc_chnfifo) { -+ for (i = 0; i < sc->sc_num_channels; i++) -+ if (sc->sc_chnfifo[i]) -+ kfree(sc->sc_chnfifo[i]); -+ kfree(sc->sc_chnfifo); -+ } -+ if (sc->sc_chnlastalg) -+ kfree(sc->sc_chnlastalg); -+ if (sc->sc_chnfifolock) -+ kfree(sc->sc_chnfifolock); -+ if (sc->sc_irq != -1) -+ free_irq(sc->sc_irq, sc); -+ if (sc->sc_base_addr) -+ iounmap((void *) sc->sc_base_addr); -+ kfree(sc); -+ return 0; -+} -+ -+#ifdef CONFIG_PPC_MERGE -+static struct of_device_id talitos_match[] = { -+ { -+ .type = "crypto", -+ .compatible = "talitos", -+ }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(of, talitos_match); -+ -+static struct of_platform_driver talitos_driver = { -+ .name = DRV_NAME, -+ .match_table = talitos_match, -+ .probe = talitos_probe, -+ .remove = talitos_remove, -+}; -+ -+static int __init talitos_init(void) -+{ -+ return of_register_platform_driver(&talitos_driver); -+} -+ -+static void __exit talitos_exit(void) -+{ -+ of_unregister_platform_driver(&talitos_driver); -+} -+#else -+/* Structure for a platform device driver */ -+static struct platform_driver talitos_driver = { -+ .probe = talitos_probe, -+ .remove = talitos_remove, -+ .driver = { -+ .name = "fsl-sec2", -+ } -+}; -+ -+static int __init talitos_init(void) -+{ -+ return platform_driver_register(&talitos_driver); -+} -+ -+static void __exit talitos_exit(void) -+{ -+ platform_driver_unregister(&talitos_driver); -+} -+#endif -+ -+module_init(talitos_init); -+module_exit(talitos_exit); -+ -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_AUTHOR("kim.phillips@freescale.com"); -+MODULE_DESCRIPTION("OCF driver for Freescale SEC (talitos)"); -diff --git a/crypto/ocf/talitos/talitos_dev.h b/crypto/ocf/talitos/talitos_dev.h -new file mode 100644 -index 0000000..86bb57c ---- /dev/null -+++ b/crypto/ocf/talitos/talitos_dev.h -@@ -0,0 +1,277 @@ -+/* -+ * Freescale SEC (talitos) device dependent data structures -+ * -+ * Copyright (c) 2006 Freescale Semiconductor, Inc. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ */ -+ -+/* device ID register values */ -+#define TALITOS_ID_SEC_2_0 0x40 -+#define TALITOS_ID_SEC_2_1 0x40 /* cross ref with IP block revision reg */ -+ -+/* -+ * following num_channels, channel-fifo-depth, exec-unit-mask, and -+ * descriptor-types-mask are for forward-compatibility with openfirmware -+ * flat device trees -+ */ -+ -+/* -+ * num_channels : the number of channels available in each SEC version. -+ */ -+ -+/* n.b. this driver requires these values be a power of 2 */ -+#define TALITOS_NCHANNELS_SEC_1_0 4 -+#define TALITOS_NCHANNELS_SEC_1_2 1 -+#define TALITOS_NCHANNELS_SEC_2_0 4 -+#define TALITOS_NCHANNELS_SEC_2_01 4 -+#define TALITOS_NCHANNELS_SEC_2_1 4 -+#define TALITOS_NCHANNELS_SEC_2_4 4 -+ -+/* -+ * channel-fifo-depth : The number of descriptor -+ * pointers a channel fetch fifo can hold. -+ */ -+#define TALITOS_CHFIFOLEN_SEC_1_0 1 -+#define TALITOS_CHFIFOLEN_SEC_1_2 1 -+#define TALITOS_CHFIFOLEN_SEC_2_0 24 -+#define TALITOS_CHFIFOLEN_SEC_2_01 24 -+#define TALITOS_CHFIFOLEN_SEC_2_1 24 -+#define TALITOS_CHFIFOLEN_SEC_2_4 24 -+ -+/* -+ * exec-unit-mask : The bitmask representing what Execution Units (EUs) -+ * are available. EU information should be encoded following the SEC's -+ * EU_SEL0 bitfield documentation, i.e. as follows: -+ * -+ * bit 31 = set if SEC permits no-EU selection (should be always set) -+ * bit 30 = set if SEC has the ARC4 EU (AFEU) -+ * bit 29 = set if SEC has the des/3des EU (DEU) -+ * bit 28 = set if SEC has the message digest EU (MDEU) -+ * bit 27 = set if SEC has the random number generator EU (RNG) -+ * bit 26 = set if SEC has the public key EU (PKEU) -+ * bit 25 = set if SEC has the aes EU (AESU) -+ * bit 24 = set if SEC has the Kasumi EU (KEU) -+ * -+ */ -+#define TALITOS_HAS_EU_NONE (1<<0) -+#define TALITOS_HAS_EU_AFEU (1<<1) -+#define TALITOS_HAS_EU_DEU (1<<2) -+#define TALITOS_HAS_EU_MDEU (1<<3) -+#define TALITOS_HAS_EU_RNG (1<<4) -+#define TALITOS_HAS_EU_PKEU (1<<5) -+#define TALITOS_HAS_EU_AESU (1<<6) -+#define TALITOS_HAS_EU_KEU (1<<7) -+ -+/* the corresponding masks for each SEC version */ -+#define TALITOS_HAS_EUS_SEC_1_0 0x7f -+#define TALITOS_HAS_EUS_SEC_1_2 0x4d -+#define TALITOS_HAS_EUS_SEC_2_0 0x7f -+#define TALITOS_HAS_EUS_SEC_2_01 0x7f -+#define TALITOS_HAS_EUS_SEC_2_1 0xff -+#define TALITOS_HAS_EUS_SEC_2_4 0x7f -+ -+/* -+ * descriptor-types-mask : The bitmask representing what descriptors -+ * are available. Descriptor type information should be encoded -+ * following the SEC's Descriptor Header Dword DESC_TYPE field -+ * documentation, i.e. as follows: -+ * -+ * bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type -+ * bit 1 = set if SEC supports the ipsec_esp descriptor type -+ * bit 2 = set if SEC supports the common_nonsnoop desc. type -+ * bit 3 = set if SEC supports the 802.11i AES ccmp desc. type -+ * bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type -+ * bit 5 = set if SEC supports the srtp descriptor type -+ * bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type -+ * bit 7 = set if SEC supports the pkeu_assemble descriptor type -+ * bit 8 = set if SEC supports the aesu_key_expand_output desc.type -+ * bit 9 = set if SEC supports the pkeu_ptmul descriptor type -+ * bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type -+ * bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type -+ * -+ * ..and so on and so forth. -+ */ -+#define TALITOS_HAS_DT_AESU_CTR_NONSNOOP (1<<0) -+#define TALITOS_HAS_DT_IPSEC_ESP (1<<1) -+#define TALITOS_HAS_DT_COMMON_NONSNOOP (1<<2) -+ -+/* the corresponding masks for each SEC version */ -+#define TALITOS_HAS_DESCTYPES_SEC_2_0 0x01010ebf -+#define TALITOS_HAS_DESCTYPES_SEC_2_1 0x012b0ebf -+ -+/* -+ * a TALITOS_xxx_HI address points to the low data bits (32-63) of the register -+ */ -+ -+/* global register offset addresses */ -+#define TALITOS_ID 0x1020 -+#define TALITOS_ID_HI 0x1024 -+#define TALITOS_MCR 0x1030 /* master control register */ -+#define TALITOS_MCR_HI 0x1038 /* master control register */ -+#define TALITOS_MCR_SWR 0x1 -+#define TALITOS_IMR 0x1008 /* interrupt mask register */ -+#define TALITOS_IMR_ALL 0x00010fff /* enable all interrupts mask */ -+#define TALITOS_IMR_ERRONLY 0x00010aaa /* enable error interrupts */ -+#define TALITOS_IMR_HI 0x100C /* interrupt mask register */ -+#define TALITOS_IMR_HI_ALL 0x00323333 /* enable all interrupts mask */ -+#define TALITOS_IMR_HI_ERRONLY 0x00222222 /* enable error interrupts */ -+#define TALITOS_ISR 0x1010 /* interrupt status register */ -+#define TALITOS_ISR_ERROR 0x00010faa /* errors mask */ -+#define TALITOS_ISR_DONE 0x00000055 /* channel(s) done mask */ -+#define TALITOS_ISR_HI 0x1014 /* interrupt status register */ -+#define TALITOS_ICR 0x1018 /* interrupt clear register */ -+#define TALITOS_ICR_HI 0x101C /* interrupt clear register */ -+ -+/* channel register address stride */ -+#define TALITOS_CH_OFFSET 0x100 -+ -+/* channel register offset addresses and bits */ -+#define TALITOS_CH_CCCR 0x1108 /* Crypto-Channel Config Register */ -+#define TALITOS_CH_CCCR_RESET 0x1 /* Channel Reset bit */ -+#define TALITOS_CH_CCCR_HI 0x110c /* Crypto-Channel Config Register */ -+#define TALITOS_CH_CCCR_HI_CDWE 0x10 /* Channel done writeback enable bit */ -+#define TALITOS_CH_CCCR_HI_NT 0x4 /* Notification type bit */ -+#define TALITOS_CH_CCCR_HI_CDIE 0x2 /* Channel Done Interrupt Enable bit */ -+#define TALITOS_CH_CCPSR 0x1110 /* Crypto-Channel Pointer Status Reg */ -+#define TALITOS_CH_CCPSR_HI 0x1114 /* Crypto-Channel Pointer Status Reg */ -+#define TALITOS_CH_FF 0x1148 /* Fetch FIFO */ -+#define TALITOS_CH_FF_HI 0x114c /* Fetch FIFO's FETCH_ADRS */ -+#define TALITOS_CH_CDPR 0x1140 /* Crypto-Channel Pointer Status Reg */ -+#define TALITOS_CH_CDPR_HI 0x1144 /* Crypto-Channel Pointer Status Reg */ -+#define TALITOS_CH_DESCBUF 0x1180 /* (thru 11bf) Crypto-Channel -+ * Descriptor Buffer (debug) */ -+ -+/* execution unit register offset addresses and bits */ -+#define TALITOS_DEUSR 0x2028 /* DEU status register */ -+#define TALITOS_DEUSR_HI 0x202c /* DEU status register */ -+#define TALITOS_DEUISR 0x2030 /* DEU interrupt status register */ -+#define TALITOS_DEUISR_HI 0x2034 /* DEU interrupt status register */ -+#define TALITOS_DEUICR 0x2038 /* DEU interrupt control register */ -+#define TALITOS_DEUICR_HI 0x203c /* DEU interrupt control register */ -+#define TALITOS_AESUISR 0x4030 /* AESU interrupt status register */ -+#define TALITOS_AESUISR_HI 0x4034 /* AESU interrupt status register */ -+#define TALITOS_AESUICR 0x4038 /* AESU interrupt control register */ -+#define TALITOS_AESUICR_HI 0x403c /* AESU interrupt control register */ -+#define TALITOS_MDEUISR 0x6030 /* MDEU interrupt status register */ -+#define TALITOS_MDEUISR_HI 0x6034 /* MDEU interrupt status register */ -+#define TALITOS_RNGSR 0xa028 /* RNG status register */ -+#define TALITOS_RNGSR_HI 0xa02c /* RNG status register */ -+#define TALITOS_RNGSR_HI_RD 0x1 /* RNG Reset done */ -+#define TALITOS_RNGSR_HI_OFL 0xff0000/* number of dwords in RNG output FIFO*/ -+#define TALITOS_RNGDSR 0xa010 /* RNG data size register */ -+#define TALITOS_RNGDSR_HI 0xa014 /* RNG data size register */ -+#define TALITOS_RNG_FIFO 0xa800 /* RNG FIFO - pool of random numbers */ -+#define TALITOS_RNGISR 0xa030 /* RNG Interrupt status register */ -+#define TALITOS_RNGISR_HI 0xa034 /* RNG Interrupt status register */ -+#define TALITOS_RNGRCR 0xa018 /* RNG Reset control register */ -+#define TALITOS_RNGRCR_HI 0xa01c /* RNG Reset control register */ -+#define TALITOS_RNGRCR_HI_SR 0x1 /* RNG RNGRCR:Software Reset */ -+ -+/* descriptor pointer entry */ -+struct talitos_desc_ptr { -+ u16 len; /* length */ -+ u8 extent; /* jump (to s/g link table) and extent */ -+ u8 res; /* reserved */ -+ u32 ptr; /* pointer */ -+}; -+ -+/* descriptor */ -+struct talitos_desc { -+ u32 hdr; /* header */ -+ u32 res; /* reserved */ -+ struct talitos_desc_ptr ptr[7]; /* ptr/len pair array */ -+}; -+ -+/* talitos descriptor header (hdr) bits */ -+ -+/* primary execution unit select */ -+#define TALITOS_SEL0_AFEU 0x10000000 -+#define TALITOS_SEL0_DEU 0x20000000 -+#define TALITOS_SEL0_MDEU 0x30000000 -+#define TALITOS_SEL0_RNG 0x40000000 -+#define TALITOS_SEL0_PKEU 0x50000000 -+#define TALITOS_SEL0_AESU 0x60000000 -+ -+/* primary execution unit mode (MODE0) and derivatives */ -+#define TALITOS_MODE0_AESU_CBC 0x00200000 -+#define TALITOS_MODE0_AESU_ENC 0x00100000 -+#define TALITOS_MODE0_DEU_CBC 0x00400000 -+#define TALITOS_MODE0_DEU_3DES 0x00200000 -+#define TALITOS_MODE0_DEU_ENC 0x00100000 -+#define TALITOS_MODE0_MDEU_INIT 0x01000000 /* init starting regs */ -+#define TALITOS_MODE0_MDEU_HMAC 0x00800000 -+#define TALITOS_MODE0_MDEU_PAD 0x00400000 /* PD */ -+#define TALITOS_MODE0_MDEU_MD5 0x00200000 -+#define TALITOS_MODE0_MDEU_SHA256 0x00100000 -+#define TALITOS_MODE0_MDEU_SHA1 0x00000000 /* SHA-160 */ -+#define TALITOS_MODE0_MDEU_MD5_HMAC \ -+ (TALITOS_MODE0_MDEU_MD5 | TALITOS_MODE0_MDEU_HMAC) -+#define TALITOS_MODE0_MDEU_SHA256_HMAC \ -+ (TALITOS_MODE0_MDEU_SHA256 | TALITOS_MODE0_MDEU_HMAC) -+#define TALITOS_MODE0_MDEU_SHA1_HMAC \ -+ (TALITOS_MODE0_MDEU_SHA1 | TALITOS_MODE0_MDEU_HMAC) -+ -+/* secondary execution unit select (SEL1) */ -+/* it's MDEU or nothing */ -+#define TALITOS_SEL1_MDEU 0x00030000 -+ -+/* secondary execution unit mode (MODE1) and derivatives */ -+#define TALITOS_MODE1_MDEU_INIT 0x00001000 /* init starting regs */ -+#define TALITOS_MODE1_MDEU_HMAC 0x00000800 -+#define TALITOS_MODE1_MDEU_PAD 0x00000400 /* PD */ -+#define TALITOS_MODE1_MDEU_MD5 0x00000200 -+#define TALITOS_MODE1_MDEU_SHA256 0x00000100 -+#define TALITOS_MODE1_MDEU_SHA1 0x00000000 /* SHA-160 */ -+#define TALITOS_MODE1_MDEU_MD5_HMAC \ -+ (TALITOS_MODE1_MDEU_MD5 | TALITOS_MODE1_MDEU_HMAC) -+#define TALITOS_MODE1_MDEU_SHA256_HMAC \ -+ (TALITOS_MODE1_MDEU_SHA256 | TALITOS_MODE1_MDEU_HMAC) -+#define TALITOS_MODE1_MDEU_SHA1_HMAC \ -+ (TALITOS_MODE1_MDEU_SHA1 | TALITOS_MODE1_MDEU_HMAC) -+ -+/* direction of overall data flow (DIR) */ -+#define TALITOS_DIR_OUTBOUND 0x00000000 -+#define TALITOS_DIR_INBOUND 0x00000002 -+ -+/* done notification (DN) */ -+#define TALITOS_DONE_NOTIFY 0x00000001 -+ -+/* descriptor types */ -+/* odd numbers here are valid on SEC2 and greater only (e.g. ipsec_esp) */ -+#define TD_TYPE_AESU_CTR_NONSNOOP (0 << 3) -+#define TD_TYPE_IPSEC_ESP (1 << 3) -+#define TD_TYPE_COMMON_NONSNOOP_NO_AFEU (2 << 3) -+#define TD_TYPE_HMAC_SNOOP_NO_AFEU (4 << 3) -+ -+#define TALITOS_HDR_DONE_BITS 0xff000000 -+ -+#define DPRINTF(a...) do { \ -+ if (debug) { \ -+ printk("%s: ", sc ? \ -+ device_get_nameunit(sc->sc_cdev) : "talitos"); \ -+ printk(a); \ -+ } \ -+ } while (0) -diff --git a/crypto/ocf/talitos/talitos_soft.h b/crypto/ocf/talitos/talitos_soft.h -new file mode 100644 -index 0000000..79efdbd ---- /dev/null -+++ b/crypto/ocf/talitos/talitos_soft.h -@@ -0,0 +1,77 @@ -+/* -+ * Freescale SEC data structures for integration with ocf-linux -+ * -+ * Copyright (c) 2006 Freescale Semiconductor, Inc. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The name of the author may not be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+/* -+ * paired descriptor and associated crypto operation -+ */ -+struct desc_cryptop_pair { -+ struct talitos_desc cf_desc; /* descriptor ptr */ -+ struct cryptop *cf_crp; /* cryptop ptr */ -+}; -+ -+/* -+ * Holds data specific to a single talitos device. -+ */ -+struct talitos_softc { -+ softc_device_decl sc_cdev; -+ struct platform_device *sc_dev; /* device backpointer */ -+ ocf_iomem_t sc_base_addr; -+ int sc_irq; -+ int sc_num; /* if we have multiple chips */ -+ int32_t sc_cid; /* crypto tag */ -+ u64 sc_chiprev; /* major/minor chip revision */ -+ int sc_nsessions; -+ struct talitos_session *sc_sessions; -+ int sc_num_channels;/* number of crypto channels */ -+ int sc_chfifo_len; /* channel fetch fifo len */ -+ int sc_exec_units; /* execution units mask */ -+ int sc_desc_types; /* descriptor types mask */ -+ /* -+ * mutual exclusion for intra-channel resources, e.g. fetch fifos -+ * the last entry is a meta-channel lock used by the channel scheduler -+ */ -+ spinlock_t *sc_chnfifolock; -+ /* sc_chnlastalgo contains last algorithm for that channel */ -+ int *sc_chnlastalg; -+ /* sc_chnfifo holds pending descriptor--crypto operation pairs */ -+ struct desc_cryptop_pair **sc_chnfifo; -+}; -+ -+struct talitos_session { -+ u_int32_t ses_used; -+ u_int32_t ses_klen; /* key length in bits */ -+ u_int32_t ses_key[8]; /* DES/3DES/AES key */ -+ u_int32_t ses_hmac[5]; /* hmac inner state */ -+ u_int32_t ses_hmac_len; /* hmac length */ -+ u_int32_t ses_iv[4]; /* DES/3DES/AES iv */ -+ u_int32_t ses_mlen; /* desired hash result len (12=ipsec or 16) */ -+}; -+ -+#define TALITOS_SESSION(sid) ((sid) & 0x0fffffff) -+#define TALITOS_SID(crd, sesn) (((crd) << 28) | ((sesn) & 0x0fffffff)) -diff --git a/crypto/ocf/uio.h b/crypto/ocf/uio.h -new file mode 100644 -index 0000000..03a6249 ---- /dev/null -+++ b/crypto/ocf/uio.h -@@ -0,0 +1,54 @@ -+#ifndef _OCF_UIO_H_ -+#define _OCF_UIO_H_ -+ -+#include <linux/uio.h> -+ -+/* -+ * The linux uio.h doesn't have all we need. To be fully api compatible -+ * with the BSD cryptodev, we need to keep this around. Perhaps this can -+ * be moved back into the linux/uio.h -+ * -+ * Linux port done by David McCullough <david_mccullough@mcafee.com> -+ * Copyright (C) 2006-2010 David McCullough -+ * Copyright (C) 2004-2005 Intel Corporation. -+ * -+ * LICENSE TERMS -+ * -+ * The free distribution and use of this software in both source and binary -+ * form is allowed (with or without changes) provided that: -+ * -+ * 1. distributions of this source code include the above copyright -+ * notice, this list of conditions and the following disclaimer; -+ * -+ * 2. distributions in binary form include the above copyright -+ * notice, this list of conditions and the following disclaimer -+ * in the documentation and/or other associated materials; -+ * -+ * 3. the copyright holder's name is not used to endorse products -+ * built using this software without specific written permission. -+ * -+ * ALTERNATIVELY, provided that this notice is retained in full, this product -+ * may be distributed under the terms of the GNU General Public License (GPL), -+ * in which case the provisions of the GPL apply INSTEAD OF those given above. -+ * -+ * DISCLAIMER -+ * -+ * This software is provided 'as is' with no explicit or implied warranties -+ * in respect of its properties, including, but not limited to, correctness -+ * and/or fitness for purpose. -+ * --------------------------------------------------------------------------- -+ */ -+ -+struct uio { -+ struct iovec *uio_iov; -+ int uio_iovcnt; -+ off_t uio_offset; -+ int uio_resid; -+#if 0 -+ enum uio_seg uio_segflg; -+ enum uio_rw uio_rw; -+ struct thread *uio_td; -+#endif -+}; -+ -+#endif -diff --git a/drivers/char/random.c b/drivers/char/random.c -index 8258982..6509c94 100644 ---- a/drivers/char/random.c -+++ b/drivers/char/random.c -@@ -129,6 +129,9 @@ - * unsigned int value); - * void add_interrupt_randomness(int irq); - * -+ * void random_input_words(__u32 *buf, size_t wordcount, int ent_count) -+ * int random_input_wait(void); -+ * - * add_input_randomness() uses the input layer interrupt timing, as well as - * the event type information from the hardware. - * -@@ -140,6 +143,13 @@ - * a better measure, since the timing of the disk interrupts are more - * unpredictable. - * -+ * random_input_words() just provides a raw block of entropy to the input -+ * pool, such as from a hardware entropy generator. -+ * -+ * random_input_wait() suspends the caller until such time as the -+ * entropy pool falls below the write threshold, and returns a count of how -+ * much entropy (in bits) is needed to sustain the pool. -+ * - * All of these routines try to estimate how many bits of randomness a - * particular randomness source. They do this by keeping track of the - * first and second order deltas of the event timings. -@@ -714,6 +724,61 @@ void add_disk_randomness(struct gendisk *disk) - } - #endif - -+/* -+ * random_input_words - add bulk entropy to pool -+ * -+ * @buf: buffer to add -+ * @wordcount: number of __u32 words to add -+ * @ent_count: total amount of entropy (in bits) to credit -+ * -+ * this provides bulk input of entropy to the input pool -+ * -+ */ -+void random_input_words(__u32 *buf, size_t wordcount, int ent_count) -+{ -+ mix_pool_bytes(&input_pool, buf, wordcount*4); -+ -+ credit_entropy_bits(&input_pool, ent_count); -+ -+ DEBUG_ENT("crediting %d bits => %d\n", -+ ent_count, input_pool.entropy_count); -+ /* -+ * Wake up waiting processes if we have enough -+ * entropy. -+ */ -+ if (input_pool.entropy_count >= random_read_wakeup_thresh) -+ wake_up_interruptible(&random_read_wait); -+} -+EXPORT_SYMBOL(random_input_words); -+ -+/* -+ * random_input_wait - wait until random needs entropy -+ * -+ * this function sleeps until the /dev/random subsystem actually -+ * needs more entropy, and then return the amount of entropy -+ * that it would be nice to have added to the system. -+ */ -+int random_input_wait(void) -+{ -+ int count; -+ -+ wait_event_interruptible(random_write_wait, -+ input_pool.entropy_count < random_write_wakeup_thresh); -+ -+ count = random_write_wakeup_thresh - input_pool.entropy_count; -+ -+ /* likely we got woken up due to a signal */ -+ if (count <= 0) count = random_read_wakeup_thresh; -+ -+ DEBUG_ENT("requesting %d bits from input_wait()er %d<%d\n", -+ count, -+ input_pool.entropy_count, random_write_wakeup_thresh); -+ -+ return count; -+} -+EXPORT_SYMBOL(random_input_wait); -+ -+ - #define EXTRACT_SIZE 10 - - /********************************************************************* -diff --git a/fs/fcntl.c b/fs/fcntl.c -index 2cf93ec..1b6d2bb 100644 ---- a/fs/fcntl.c -+++ b/fs/fcntl.c -@@ -141,6 +141,7 @@ SYSCALL_DEFINE1(dup, unsigned int, fildes) - } - return ret; - } -+EXPORT_SYMBOL(sys_dup); - - #define SETFL_MASK (O_APPEND | O_NONBLOCK | O_NDELAY | O_DIRECT | O_NOATIME) - -diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h -index adaf3c1..e961a9a 100644 ---- a/include/linux/miscdevice.h -+++ b/include/linux/miscdevice.h -@@ -12,6 +12,7 @@ - #define APOLLO_MOUSE_MINOR 7 - #define PC110PAD_MINOR 9 - /*#define ADB_MOUSE_MINOR 10 FIXME OBSOLETE */ -+#define CRYPTODEV_MINOR 70 /* /dev/crypto */ - #define WATCHDOG_MINOR 130 /* Watchdog timer */ - #define TEMP_MINOR 131 /* Temperature Sensor */ - #define RTC_MINOR 135 -diff --git a/include/linux/random.h b/include/linux/random.h -index 25d02fe..b59ec10 100644 ---- a/include/linux/random.h -+++ b/include/linux/random.h -@@ -9,6 +9,7 @@ - - #include <linux/types.h> - #include <linux/ioctl.h> -+#include <linux/types.h> /* for __u32 in user space */ - #include <linux/irqnr.h> - - /* ioctl()'s for the random number generator */ -@@ -34,6 +35,30 @@ - /* Clear the entropy pool and associated counters. (Superuser only.) */ - #define RNDCLEARPOOL _IO( 'R', 0x06 ) - -+#ifdef CONFIG_FIPS_RNG -+ -+/* Size of seed value - equal to AES blocksize */ -+#define AES_BLOCK_SIZE_BYTES 16 -+#define SEED_SIZE_BYTES AES_BLOCK_SIZE_BYTES -+/* Size of AES key */ -+#define KEY_SIZE_BYTES 16 -+ -+/* ioctl() structure used by FIPS 140-2 Tests */ -+struct rand_fips_test { -+ unsigned char key[KEY_SIZE_BYTES]; /* Input */ -+ unsigned char datetime[SEED_SIZE_BYTES]; /* Input */ -+ unsigned char seed[SEED_SIZE_BYTES]; /* Input */ -+ unsigned char result[SEED_SIZE_BYTES]; /* Output */ -+}; -+ -+/* FIPS 140-2 RNG Variable Seed Test. (Superuser only.) */ -+#define RNDFIPSVST _IOWR('R', 0x10, struct rand_fips_test) -+ -+/* FIPS 140-2 RNG Monte Carlo Test. (Superuser only.) */ -+#define RNDFIPSMCT _IOWR('R', 0x11, struct rand_fips_test) -+ -+#endif /* #ifdef CONFIG_FIPS_RNG */ -+ - struct rand_pool_info { - int entropy_count; - int buf_size; -@@ -50,6 +75,10 @@ extern void add_input_randomness(unsigned int type, unsigned int code, - unsigned int value); - extern void add_interrupt_randomness(int irq); - -+extern void random_input_words(__u32 *buf, size_t wordcount, int ent_count); -+extern int random_input_wait(void); -+#define HAS_RANDOM_INPUT_WAIT 1 -+ - extern void get_random_bytes(void *buf, int nbytes); - void generate_random_uuid(unsigned char uuid_out[16]); - -diff --git a/kernel/pid.c b/kernel/pid.c -index d3f722d..e041b52 100644 ---- a/kernel/pid.c -+++ b/kernel/pid.c -@@ -387,6 +387,7 @@ struct task_struct *find_task_by_vpid(pid_t vnr) - { - return find_task_by_pid_ns(vnr, current->nsproxy->pid_ns); - } -+EXPORT_SYMBOL(find_task_by_vpid); - - struct pid *get_task_pid(struct task_struct *task, enum pid_type type) - { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Revert-omap3-beagle-Fix-compile-time-errors.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Revert-omap3-beagle-Fix-compile-time-errors.patch deleted file mode 100644 index abcf45b..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-Revert-omap3-beagle-Fix-compile-time-errors.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 09b6266a567b22e07200973312ffb8f43e7f7d43 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Fri, 30 Apr 2010 11:12:24 +0200 -Subject: [PATCH 01/45] Revert "omap3: beagle: Fix compile-time errors" - -This commit clashes with the other beagle patches we apply on top - -This reverts commit da5b291cba631d303cb137fa6a620c494d828197. ---- - arch/arm/mach-omap2/board-omap3beagle.c | 34 ++---------------------------- - 1 files changed, 3 insertions(+), 31 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index c5da58e..330fb25 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -56,22 +56,6 @@ - - #define NAND_BLOCK_SIZE SZ_128K - --#ifdef CONFIG_PM --static struct omap_opp * _omap35x_mpu_rate_table = omap35x_mpu_rate_table; --static struct omap_opp * _omap37x_mpu_rate_table = omap37x_mpu_rate_table; --static struct omap_opp * _omap35x_dsp_rate_table = omap35x_dsp_rate_table; --static struct omap_opp * _omap37x_dsp_rate_table = omap37x_dsp_rate_table; --static struct omap_opp * _omap35x_l3_rate_table = omap35x_l3_rate_table; --static struct omap_opp * _omap37x_l3_rate_table = omap37x_l3_rate_table; --#else /* CONFIG_PM */ --static struct omap_opp * _omap35x_mpu_rate_table = NULL; --static struct omap_opp * _omap37x_mpu_rate_table = NULL; --static struct omap_opp * _omap35x_dsp_rate_table = NULL; --static struct omap_opp * _omap37x_dsp_rate_table = NULL; --static struct omap_opp * _omap35x_l3_rate_table = NULL; --static struct omap_opp * _omap37x_l3_rate_table = NULL; --#endif /* CONFIG_PM */ -- - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -377,21 +361,9 @@ static void __init omap3_beagle_init_irq(void) - { - omap_board_config = omap3_beagle_config; - omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); -- -- if (cpu_is_omap3630()) { -- omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -- mt46h32m32lf6_sdrc_params, -- _omap37x_mpu_rate_table, -- _omap37x_dsp_rate_table, -- _omap37x_l3_rate_table); -- } else { -- omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -- mt46h32m32lf6_sdrc_params, -- _omap35x_mpu_rate_table, -- _omap35x_dsp_rate_table, -- _omap35x_l3_rate_table); -- } -- -+ omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -+ mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table, -+ omap3_dsp_rate_table, omap3_l3_rate_table); - omap_init_irq(); - #ifdef CONFIG_OMAP_32K_TIMER - omap2_gp_clockevent_set_gptimer(12); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch deleted file mode 100644 index 37d5fb9..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 787c524fc478068d18eef72f43074b47722e50b0 Mon Sep 17 00:00:00 2001 -From: Greg KH <gregkh@suse.de> -Date: Thu, 5 Aug 2010 13:53:35 -0700 -Subject: [PATCH] cgroupfs: create /sys/fs/cgroup to mount cgroupfs on - -We really shouldn't be asking userspace to create new root filesystems. -So follow along with all of the other in-kernel filesystems, and provide -a mount point in sysfs. - -For cgroupfs, this should be in /sys/fs/cgroup/ This change provides -that mount point when the cgroup filesystem is registered in the kernel. - -Acked-by: Paul Menage <menage@google.com> -Acked-by: Dhaval Giani <dhaval.giani@gmail.com> -Cc: Li Zefan <lizf@cn.fujitsu.com> -Cc: Lennart Poettering <lennart@poettering.net> -Cc: Kay Sievers <kay.sievers@vrfy.org> -Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> ---- - kernel/cgroup.c | 13 ++++++++++++- - 1 files changed, 12 insertions(+), 1 deletions(-) - -diff --git a/kernel/cgroup.c b/kernel/cgroup.c -index 0249f4b..db21dd8 100644 ---- a/kernel/cgroup.c -+++ b/kernel/cgroup.c -@@ -1472,6 +1472,8 @@ static struct file_system_type cgroup_fs_type = { - .kill_sb = cgroup_kill_sb, - }; - -+static struct kobject *cgroup_kobj; -+ - static inline struct cgroup *__d_cgrp(struct dentry *dentry) - { - return dentry->d_fsdata; -@@ -3283,9 +3285,18 @@ int __init cgroup_init(void) - hhead = css_set_hash(init_css_set.subsys); - hlist_add_head(&init_css_set.hlist, hhead); - BUG_ON(!init_root_id(&rootnode)); -+ -+ cgroup_kobj = kobject_create_and_add("cgroup", fs_kobj); -+ if (!cgroup_kobj) { -+ err = -ENOMEM; -+ goto out; -+ } -+ - err = register_filesystem(&cgroup_fs_type); -- if (err < 0) -+ if (err < 0) { -+ kobject_put(cgroup_kobj); - goto out; -+ } - - proc_create("cgroups", 0, NULL, &proc_cgroupstats_operations); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0002-OMAP3-craneboard-add-support-for-TinCanTools-Trainer.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0002-OMAP3-craneboard-add-support-for-TinCanTools-Trainer.patch deleted file mode 100644 index 4b1f109..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0002-OMAP3-craneboard-add-support-for-TinCanTools-Trainer.patch +++ /dev/null @@ -1,55 +0,0 @@ -From ba5fd3ed4031a826309ab26045d27dbef88de418 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 19 Jan 2011 16:36:09 +0100 -Subject: [PATCH 2/2] OMAP3: craneboard: add support for TinCanTools Trainer expansion board - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-am3517crane.c | 31 +++++++++++++++++++++++++++++++ - 1 files changed, 31 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c -index 300a79d..cbe2174 100644 ---- a/arch/arm/mach-omap2/board-am3517crane.c -+++ b/arch/arm/mach-omap2/board-am3517crane.c -@@ -747,6 +747,37 @@ static void __init am3517_crane_init(void) - am3517crane_flash_init(); - usb_musb_init(); - -+ if(!strcmp(expansionboard_name, "trainer")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); -+ gpio_request(130, "sysfs"); -+ gpio_export(130, 1); -+ gpio_request(131, "sysfs"); -+ gpio_export(131, 1); -+ gpio_request(132, "sysfs"); -+ gpio_export(132, 1); -+ gpio_request(133, "sysfs"); -+ gpio_export(133, 1); -+ gpio_request(134, "sysfs"); -+ gpio_export(134, 1); -+ gpio_request(135, "sysfs"); -+ gpio_export(135, 1); -+ gpio_request(136, "sysfs"); -+ gpio_export(136, 1); -+ gpio_request(137, "sysfs"); -+ gpio_export(137, 1); -+ gpio_request(138, "sysfs"); -+ gpio_export(138, 1); -+ gpio_request(139, "sysfs"); -+ gpio_export(139, 1); -+ gpio_request(140, "sysfs"); -+ gpio_export(140, 1); -+ gpio_request(141, "sysfs"); -+ gpio_export(141, 1); -+ gpio_request(162, "sysfs"); -+ gpio_export(162, 1); -+ } -+ - /* Configure GPIO for EHCI port */ - omap_mux_init_gpio(35, OMAP_PIN_OUTPUT); - gpio_request(35, "usb_ehci_enable"); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0002-board-omap3touchbook-make-it-build-against-TI-linux-.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0002-board-omap3touchbook-make-it-build-against-TI-linux-.patch deleted file mode 100644 index c695b71..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0002-board-omap3touchbook-make-it-build-against-TI-linux-.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 5e84443afe149d9f503b63b1c87f23b807fe9e46 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <k-kooi@ti.com> -Date: Sat, 30 Jan 2010 15:49:15 +0100 -Subject: [PATCH 02/45] board-omap3touchbook: make it build against TI linux-omap 2.6.32-PSP - ---- - arch/arm/mach-omap2/board-omap3touchbook.c | 11 +++++++++-- - 1 files changed, 9 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index fe3d22c..fc3e03c 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -21,6 +21,7 @@ - #include <linux/io.h> - #include <linux/leds.h> - #include <linux/gpio.h> -+#include <linux/irq.h> - #include <linux/input.h> - #include <linux/gpio_keys.h> - -@@ -48,12 +49,18 @@ - #include <plat/nand.h> - #include <plat/usb.h> - #include <plat/timer-gp.h> -+#include <plat/clock.h> -+#include <plat/omap-pm.h> - - #include "mux.h" - #include "mmc-twl4030.h" - -+#include "pm.h" -+#include "omap3-opp.h" -+ - #include <asm/setup.h> - -+ - #define GPMC_CS0_BASE 0x60 - #define GPMC_CS_SIZE 0x30 - -@@ -78,7 +85,6 @@ static struct mtd_partition omap3touchbook_nand_partitions[] = { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ - .size = 15 * NAND_BLOCK_SIZE, -- .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot Env", -@@ -440,7 +446,8 @@ static void __init omap3_touchbook_init_irq(void) - omap_board_config = omap3_touchbook_config; - omap_board_config_size = ARRAY_SIZE(omap3_touchbook_config); - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -- mt46h32m32lf6_sdrc_params); -+ mt46h32m32lf6_sdrc_params, omap35x_mpu_rate_table, -+ omap35x_dsp_rate_table, omap35x_l3_rate_table); - omap_init_irq(); - #ifdef CONFIG_OMAP_32K_TIMER - omap2_gp_clockevent_set_gptimer(12); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0003-ARM-OMAP-add-support-for-TCT-Zippy-to-Beagle-board-f.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0003-ARM-OMAP-add-support-for-TCT-Zippy-to-Beagle-board-f.patch deleted file mode 100644 index 07ade0a..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0003-ARM-OMAP-add-support-for-TCT-Zippy-to-Beagle-board-f.patch +++ /dev/null @@ -1,135 +0,0 @@ -From aeef52fa662c9a6d85b11474359fb9504fc1cf49 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <sakoman@gmail.com> -Date: Tue, 15 Dec 2009 15:34:29 -0800 -Subject: [PATCH 03/45] ARM: OMAP: add support for TCT Zippy to Beagle board file - -Signed-off-by: Steve Sakoman <sakoman@gmail.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 74 +++++++++++++++++++++++++++++- - 1 files changed, 71 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 330fb25..ddfb9c0 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -21,6 +21,7 @@ - #include <linux/io.h> - #include <linux/leds.h> - #include <linux/gpio.h> -+#include <linux/irq.h> - #include <linux/input.h> - #include <linux/gpio_keys.h> - -@@ -56,6 +57,49 @@ - - #define NAND_BLOCK_SIZE SZ_128K - -+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) -+ -+#include <plat/mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 -+ -+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3beagle_spi_board_info[] __initdata = { -+ { -+ .modalias = "enc28j60", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 20000000, -+ .controller_data = &enc28j60_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_enc28j60_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); -+ omap3beagle_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); -+ set_irq_type(omap3beagle_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_spi_board_info, -+ ARRAY_SIZE(omap3beagle_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_enc28j60_init(void) { return; } -+#endif -+ -+ - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -118,6 +162,14 @@ static struct twl4030_hsmmc_info mmc[] = { - .wires = 8, - .gpio_wp = 29, - }, -+ { -+ .mmc = 2, -+ .wires = 4, -+ .gpio_wp = 141, -+ .gpio_cd = 162, -+ .transceiver = true, -+ .ocr_mask = 0x00100000, /* 3.3V */ -+ }, - {} /* Terminator */ - }; - -@@ -281,7 +333,7 @@ static struct twl4030_platform_data beagle_twldata = { - .vpll2 = &beagle_vpll2, - }; - --static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = { -+static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = { - { - I2C_BOARD_INFO("twl4030", 0x48), - .flags = I2C_CLIENT_WAKE, -@@ -290,10 +342,24 @@ static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = { - }, - }; - -+#if defined(CONFIG_RTC_DRV_DS1307) || \ -+ defined(CONFIG_RTC_DRV_DS1307_MODULE) -+ -+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { -+ { -+ I2C_BOARD_INFO("ds1307", 0x68), -+ }, -+}; -+#else -+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {}; -+#endif -+ - static int __init omap3_beagle_i2c_init(void) - { -- omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo, -- ARRAY_SIZE(beagle_i2c_boardinfo)); -+ omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo, -+ ARRAY_SIZE(beagle_i2c1_boardinfo)); -+ omap_register_i2c_bus(2, 400, beagle_i2c2_boardinfo, -+ ARRAY_SIZE(beagle_i2c2_boardinfo)); - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ - omap_register_i2c_bus(3, 100, NULL, 0); -@@ -448,6 +514,8 @@ static void __init omap3_beagle_init(void) - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_direction_output(170, true); - -+ omap3beagle_enc28j60_init(); -+ - usb_musb_init(); - usb_ehci_init(&ehci_pdata); - omap3beagle_flash_init(); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0004-ARM-OMAP-Make-beagle-u-boot-partition-writable.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0004-ARM-OMAP-Make-beagle-u-boot-partition-writable.patch deleted file mode 100644 index 46a46e7..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0004-ARM-OMAP-Make-beagle-u-boot-partition-writable.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 701bababc8f9e458e01bdb512199ce175110fe19 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 12:40:24 -0800 -Subject: [PATCH 04/45] ARM: OMAP: Make beagle u-boot partition writable - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 1 - - 1 files changed, 0 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index ddfb9c0..9f72c7a 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -112,7 +112,6 @@ static struct mtd_partition omap3beagle_nand_partitions[] = { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ - .size = 15 * NAND_BLOCK_SIZE, -- .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot Env", --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0005-board-omap3-beagle-add-DSS2-support.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0005-board-omap3-beagle-add-DSS2-support.patch deleted file mode 100644 index e337a4f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0005-board-omap3-beagle-add-DSS2-support.patch +++ /dev/null @@ -1,200 +0,0 @@ -From 818b8bbfb472de23b10aec58acd55eb31fafe0b9 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 10 Feb 2010 15:07:36 +0100 -Subject: [PATCH 05/45] board-omap3-beagle: add DSS2 support - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 130 ++++++++++++++++++++++++------- - 1 files changed, 103 insertions(+), 27 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 9f72c7a..3b7f6ec 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -40,6 +40,7 @@ - - #include <plat/board.h> - #include <plat/common.h> -+#include <plat/display.h> - #include <plat/gpmc.h> - #include <plat/nand.h> - #include <plat/usb.h> -@@ -153,6 +154,105 @@ static struct platform_device omap3beagle_nand_device = { - .resource = &omap3beagle_nand_resource, - }; - -+/* DSS */ -+ -+static int beagle_enable_dvi(struct omap_dss_device *dssdev) -+{ -+ if (dssdev->reset_gpio != -1) -+ gpio_set_value(dssdev->reset_gpio, 1); -+ -+ return 0; -+} -+ -+static void beagle_disable_dvi(struct omap_dss_device *dssdev) -+{ -+ if (dssdev->reset_gpio != -1) -+ gpio_set_value(dssdev->reset_gpio, 0); -+} -+ -+static struct omap_dss_device beagle_dvi_device = { -+ .type = OMAP_DISPLAY_TYPE_DPI, -+ .name = "dvi", -+ .driver_name = "generic_panel", -+ .phy.dpi.data_lines = 24, -+ .reset_gpio = 170, -+ .platform_enable = beagle_enable_dvi, -+ .platform_disable = beagle_disable_dvi, -+}; -+ -+static int beagle_panel_enable_tv(struct omap_dss_device *dssdev) -+{ -+#define ENABLE_VDAC_DEDICATED 0x03 -+#define ENABLE_VDAC_DEV_GRP 0x20 -+ -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ ENABLE_VDAC_DEDICATED, -+ TWL4030_VDAC_DEDICATED); -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP); -+ -+ return 0; -+} -+ -+static void beagle_panel_disable_tv(struct omap_dss_device *dssdev) -+{ -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, -+ TWL4030_VDAC_DEDICATED); -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, -+ TWL4030_VDAC_DEV_GRP); -+} -+ -+static struct omap_dss_device beagle_tv_device = { -+ .name = "tv", -+ .driver_name = "venc", -+ .type = OMAP_DISPLAY_TYPE_VENC, -+ .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, -+ .platform_enable = beagle_panel_enable_tv, -+ .platform_disable = beagle_panel_disable_tv, -+}; -+ -+static struct omap_dss_device *beagle_dss_devices[] = { -+ &beagle_dvi_device, -+ &beagle_tv_device, -+}; -+ -+static struct omap_dss_board_info beagle_dss_data = { -+ .num_devices = ARRAY_SIZE(beagle_dss_devices), -+ .devices = beagle_dss_devices, -+ .default_device = &beagle_dvi_device, -+}; -+ -+static struct platform_device beagle_dss_device = { -+ .name = "omapdss", -+ .id = -1, -+ .dev = { -+ .platform_data = &beagle_dss_data, -+ }, -+}; -+ -+static struct regulator_consumer_supply beagle_vdac_supply = { -+ .supply = "vdda_dac", -+ .dev = &beagle_dss_device.dev, -+}; -+ -+static struct regulator_consumer_supply beagle_vdvi_supply = { -+ .supply = "vdds_dsi", -+ .dev = &beagle_dss_device.dev, -+}; -+ -+static void __init beagle_display_init(void) -+{ -+ int r; -+ -+ r = gpio_request(beagle_dvi_device.reset_gpio, "DVI reset"); -+ if (r < 0) { -+ printk(KERN_ERR "Unable to get DVI reset GPIO\n"); -+ return; -+ } -+ -+ gpio_direction_output(beagle_dvi_device.reset_gpio, 0); -+} -+ - #include "sdram-micron-mt46h32m32lf-6.h" - - static struct twl4030_hsmmc_info mmc[] = { -@@ -172,15 +272,6 @@ static struct twl4030_hsmmc_info mmc[] = { - {} /* Terminator */ - }; - --static struct platform_device omap3_beagle_lcd_device = { -- .name = "omap3beagle_lcd", -- .id = -1, --}; -- --static struct omap_lcd_config omap3_beagle_lcd_config __initdata = { -- .ctrl_name = "internal", --}; -- - static struct regulator_consumer_supply beagle_vmmc1_supply = { - .supply = "vmmc", - }; -@@ -236,16 +327,6 @@ static struct twl4030_gpio_platform_data beagle_gpio_data = { - .setup = beagle_twl_gpio_setup, - }; - --static struct regulator_consumer_supply beagle_vdac_supply = { -- .supply = "vdac", -- .dev = &omap3_beagle_lcd_device.dev, --}; -- --static struct regulator_consumer_supply beagle_vdvi_supply = { -- .supply = "vdvi", -- .dev = &omap3_beagle_lcd_device.dev, --}; -- - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ - static struct regulator_init_data beagle_vmmc1 = { - .constraints = { -@@ -418,14 +499,8 @@ static struct platform_device keys_gpio = { - }, - }; - --static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { -- { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, --}; -- - static void __init omap3_beagle_init_irq(void) - { -- omap_board_config = omap3_beagle_config; -- omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table, - omap3_dsp_rate_table, omap3_l3_rate_table); -@@ -437,9 +512,9 @@ static void __init omap3_beagle_init_irq(void) - } - - static struct platform_device *omap3_beagle_devices[] __initdata = { -- &omap3_beagle_lcd_device, - &leds_gpio, - &keys_gpio, -+ &beagle_dss_device, - }; - - static void __init omap3beagle_flash_init(void) -@@ -522,8 +597,9 @@ static void __init omap3_beagle_init(void) - /* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); - omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); --} - -+ beagle_display_init(); -+} - static void __init omap3_beagle_map_io(void) - { - omap2_set_globals_343x(); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0006-board-omap3beagle-prepare-for-DM3730-based-Beagleboa.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0006-board-omap3beagle-prepare-for-DM3730-based-Beagleboa.patch deleted file mode 100644 index 2b32660..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0006-board-omap3beagle-prepare-for-DM3730-based-Beagleboa.patch +++ /dev/null @@ -1,103 +0,0 @@ -From e36c63f1fe13a60bdf6e9b3dd46ad969d6fe418d Mon Sep 17 00:00:00 2001 -From: Koen Kooi <k-kooi@ti.com> -Date: Wed, 27 Jan 2010 21:57:13 +0100 -Subject: [PATCH 06/45] board-omap3beagle: prepare for DM3730 based BeagleboardXM - -* OPP changes copy/pasted from board-omap3evm.c - * EHCI changes copy/pasted from Steve Kipisz' 2.6.33rcX work - * turn on power to camera on boot and add some comments ---- - arch/arm/mach-omap2/board-omap3beagle.c | 62 +++++++++++++++++++++++++++---- - 1 files changed, 54 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 3b7f6ec..429dacb 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -53,6 +53,23 @@ - #include "pm.h" - #include "omap3-opp.h" - -+#ifdef CONFIG_PM -+static struct omap_opp * _omap35x_mpu_rate_table = omap35x_mpu_rate_table; -+static struct omap_opp * _omap37x_mpu_rate_table = omap37x_mpu_rate_table; -+static struct omap_opp * _omap35x_dsp_rate_table = omap35x_dsp_rate_table; -+static struct omap_opp * _omap37x_dsp_rate_table = omap37x_dsp_rate_table; -+static struct omap_opp * _omap35x_l3_rate_table = omap35x_l3_rate_table; -+static struct omap_opp * _omap37x_l3_rate_table = omap37x_l3_rate_table; -+#else /* CONFIG_PM */ -+static struct omap_opp * _omap35x_mpu_rate_table = NULL; -+static struct omap_opp * _omap37x_mpu_rate_table = NULL; -+static struct omap_opp * _omap35x_dsp_rate_table = NULL; -+static struct omap_opp * _omap37x_dsp_rate_table = NULL; -+static struct omap_opp * _omap35x_l3_rate_table = NULL; -+static struct omap_opp * _omap37x_l3_rate_table = NULL; -+#endif /* CONFIG_PM */ -+ -+ - #define GPMC_CS0_BASE 0x60 - #define GPMC_CS_SIZE 0x30 - -@@ -303,12 +320,28 @@ static int beagle_twl_gpio_setup(struct device *dev, - * power switch and overcurrent detect - */ - -- gpio_request(gpio + 1, "EHCI_nOC"); -- gpio_direction_input(gpio + 1); -+ if (cpu_is_omap3630()) { -+ /* Power on DVI, Serial and PWR led */ -+ gpio_request(gpio + 1, "nDVI_PWR_EN"); -+ gpio_direction_output(gpio + 1, 0); -+ -+ /* Power on camera interface */ -+ gpio_request(gpio + 2, "CAM_EN"); -+ gpio_direction_output(gpio + 2, 1); -+ -+ /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ -+ gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); -+ gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); -+ } -+ else { -+ gpio_request(gpio + 1, "EHCI_nOC"); -+ gpio_direction_input(gpio + 1); -+ -+ /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ -+ gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); -+ gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); -+ } - -- /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ -- gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); -- gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; -@@ -501,9 +534,22 @@ static struct platform_device keys_gpio = { - - static void __init omap3_beagle_init_irq(void) - { -- omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -- mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table, -- omap3_dsp_rate_table, omap3_l3_rate_table); -+ if (cpu_is_omap3630()) -+ { -+ omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -+ NULL, -+ _omap37x_mpu_rate_table, -+ _omap37x_dsp_rate_table, -+ _omap37x_l3_rate_table); -+ } -+ else -+ { -+ omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -+ NULL, -+ _omap35x_mpu_rate_table, -+ _omap35x_dsp_rate_table, -+ _omap35x_l3_rate_table); -+ } - omap_init_irq(); - #ifdef CONFIG_OMAP_32K_TIMER - omap2_gp_clockevent_set_gptimer(12); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0007-ARM-OMAP-beagleboard-Add-infrastructure-to-do-fixups.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0007-ARM-OMAP-beagleboard-Add-infrastructure-to-do-fixups.patch deleted file mode 100644 index 86e6a70..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0007-ARM-OMAP-beagleboard-Add-infrastructure-to-do-fixups.patch +++ /dev/null @@ -1,172 +0,0 @@ -From 25ae9895ed107a6fe9d9c4345f21bbdaee4ccde6 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Mon, 3 May 2010 14:41:29 +0200 -Subject: [PATCH 07/45] ARM: OMAP: beagleboard: Add infrastructure to do fixups based on expansionboard name passed by u-boot - -And add support for zippy2 ---- - arch/arm/mach-omap2/board-omap3beagle.c | 88 +++++++++++++++++++++++++++---- - 1 files changed, 78 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 429dacb..ac96551 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -75,6 +75,8 @@ static struct omap_opp * _omap37x_l3_rate_table = NULL; - - #define NAND_BLOCK_SIZE SZ_128K - -+char expansionboard_name[16]; -+ - #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) - - #include <plat/mcspi.h> -@@ -87,7 +89,7 @@ static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { - .single_channel = 1, /* 0: slave, 1: master */ - }; - --static struct spi_board_info omap3beagle_spi_board_info[] __initdata = { -+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = { - { - .modalias = "enc28j60", - .bus_num = 4, -@@ -102,21 +104,62 @@ static void __init omap3beagle_enc28j60_init(void) - if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) && - (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { - gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); -- omap3beagle_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); -- set_irq_type(omap3beagle_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ omap3beagle_zippy_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); -+ set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); - } else { - printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n"); - return; - } - -- spi_register_board_info(omap3beagle_spi_board_info, -- ARRAY_SIZE(omap3beagle_spi_board_info)); -+ spi_register_board_info(omap3beagle_zippy_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); - } - - #else - static inline void __init omap3beagle_enc28j60_init(void) { return; } - #endif - -+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) -+ -+#include <plat/mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 -+ -+static struct omap2_mcspi_device_config ks8851_spi_chip_info = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = { -+ { -+ .modalias = "ks8851", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 36000000, -+ .controller_data = &ks8851_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_ks8851_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); -+ omap3beagle_zippy2_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); -+ set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy2_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_ks8851_init(void) { return; } -+#endif - - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ -@@ -281,8 +324,6 @@ static struct twl4030_hsmmc_info mmc[] = { - { - .mmc = 2, - .wires = 4, -- .gpio_wp = 141, -- .gpio_cd = 162, - .transceiver = true, - .ocr_mask = 0x00100000, /* 3.3V */ - }, -@@ -601,7 +642,7 @@ static void __init omap3beagle_flash_init(void) - } - } - --static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { -+static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { - - .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, - .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, -@@ -621,6 +662,15 @@ static struct omap_board_mux board_mux[] __initdata = { - #define board_mux NULL - #endif - -+static int __init expansionboard_setup(char *str) -+{ -+ if (!str) -+ return -EINVAL; -+ strncpy(expansionboard_name, str, 16); -+ printk(KERN_INFO "Beagle expansionboard: %s\n", expansionboard_name); -+ return 0; -+} -+ - static void __init omap3_beagle_init(void) - { - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); -@@ -634,8 +684,24 @@ static void __init omap3_beagle_init(void) - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_direction_output(170, true); - -- omap3beagle_enc28j60_init(); -- -+ if(!strcmp(expansionboard_name, "zippy")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n"); -+ omap3beagle_enc28j60_init(); -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); -+ mmc[1].gpio_wp = 141; -+ mmc[1].gpio_cd = 162; -+ } -+ -+ if(!strcmp(expansionboard_name, "zippy2")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n"); -+ omap3beagle_ks8851_init(); -+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); -+ mmc[1].gpio_wp = 141; -+ mmc[1].gpio_cd = 162; -+ } -+ - usb_musb_init(); - usb_ehci_init(&ehci_pdata); - omap3beagle_flash_init(); -@@ -652,6 +718,8 @@ static void __init omap3_beagle_map_io(void) - omap2_map_common_io(); - } - -+early_param("buddy", expansionboard_setup); -+ - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ - .phys_io = 0x48000000, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0008-ARM-OMAP-beagleboard-pre-export-GPIOs-to-userspace-w.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0008-ARM-OMAP-beagleboard-pre-export-GPIOs-to-userspace-w.patch deleted file mode 100644 index 88ca739..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0008-ARM-OMAP-beagleboard-pre-export-GPIOs-to-userspace-w.patch +++ /dev/null @@ -1,57 +0,0 @@ -From bf88487c59994b71cc57687915de0dc207a74b6b Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Mon, 3 May 2010 21:38:34 +0200 -Subject: [PATCH 08/45] ARM: OMAP: beagleboard: pre-export GPIOs to userspace when using a Tincantools trainerboard - -This really needs a for loop, patches welcome ---- - arch/arm/mach-omap2/board-omap3beagle.c | 33 ++++++++++++++++++++++++++++++- - 1 files changed, 32 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index ac96551..c9af202 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -701,7 +701,38 @@ static void __init omap3_beagle_init(void) - mmc[1].gpio_wp = 141; - mmc[1].gpio_cd = 162; - } -- -+ -+ if(!strcmp(expansionboard_name, "trainer")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); -+ gpio_request(130, "sysfs"); -+ gpio_export(130, 1); -+ gpio_request(131, "sysfs"); -+ gpio_export(131, 1); -+ gpio_request(132, "sysfs"); -+ gpio_export(132, 1); -+ gpio_request(133, "sysfs"); -+ gpio_export(133, 1); -+ gpio_request(134, "sysfs"); -+ gpio_export(134, 1); -+ gpio_request(135, "sysfs"); -+ gpio_export(135, 1); -+ gpio_request(136, "sysfs"); -+ gpio_export(136, 1); -+ gpio_request(137, "sysfs"); -+ gpio_export(137, 1); -+ gpio_request(138, "sysfs"); -+ gpio_export(138, 1); -+ gpio_request(139, "sysfs"); -+ gpio_export(139, 1); -+ gpio_request(140, "sysfs"); -+ gpio_export(140, 1); -+ gpio_request(141, "sysfs"); -+ gpio_export(141, 1); -+ gpio_request(162, "sysfs"); -+ gpio_export(162, 1); -+ } -+ - usb_musb_init(); - usb_ehci_init(&ehci_pdata); - omap3beagle_flash_init(); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0009-ARM-OMAP-beagleboard-initialize-ds1307-and-eeprom-on.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0009-ARM-OMAP-beagleboard-initialize-ds1307-and-eeprom-on.patch deleted file mode 100644 index 4079bcc..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0009-ARM-OMAP-beagleboard-initialize-ds1307-and-eeprom-on.patch +++ /dev/null @@ -1,76 +0,0 @@ -From f957bb53ba0c0056efd2c10d446ed9cfd6bd62ca Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Mon, 3 May 2010 22:31:34 +0200 -Subject: [PATCH 09/45] ARM: OMAP: beagleboard: initialize ds1307 and eeprom only for zippy and zippy2 - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 39 +++++++++++++++++++++++++++--- - 1 files changed, 35 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index c9af202..b3c8cb7 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -496,24 +496,55 @@ static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = { - }, - }; - -+ -+#if defined(CONFIG_EEPROM_AT24) || defined(CONFIG_EEPROM_AT24_MODULE) -+#include <linux/i2c/at24.h> -+ -+static struct at24_platform_data m24c01 = { -+ .byte_len = SZ_1K / 8, -+ .page_size = 16, -+}; -+ - #if defined(CONFIG_RTC_DRV_DS1307) || \ - defined(CONFIG_RTC_DRV_DS1307_MODULE) - --static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { -+static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = { - { - I2C_BOARD_INFO("ds1307", 0x68), - }, -+ { -+ I2C_BOARD_INFO("24c01", 0x50), -+ .platform_data = &m24c01, -+ }, - }; - #else --static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {}; -+static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = { -+ { -+ I2C_BOARD_INFO("24c01", 0x50), -+ .platform_data = &m24c01, -+ }, -+}; -+#endif -+#else -+static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {}; - #endif - -+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {}; -+ - static int __init omap3_beagle_i2c_init(void) - { - omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo, - ARRAY_SIZE(beagle_i2c1_boardinfo)); -- omap_register_i2c_bus(2, 400, beagle_i2c2_boardinfo, -- ARRAY_SIZE(beagle_i2c2_boardinfo)); -+ if(!strcmp(expansionboard_name, "zippy") || !strcmp(expansionboard_name, "zippy2")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: registering i2c2 bus for zippy/zippy2\n"); -+ omap_register_i2c_bus(2, 400, beagle_zippy_i2c2_boardinfo, -+ ARRAY_SIZE(beagle_zippy_i2c2_boardinfo)); -+ } else -+ { -+ omap_register_i2c_bus(2, 400, beagle_i2c2_boardinfo, -+ ARRAY_SIZE(beagle_i2c2_boardinfo)); -+ } - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ - omap_register_i2c_bus(3, 100, NULL, 0); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0010-ARM-OMAP-update-beagleboard-defconfig.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0010-ARM-OMAP-update-beagleboard-defconfig.patch deleted file mode 100644 index aea1ae2..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0010-ARM-OMAP-update-beagleboard-defconfig.patch +++ /dev/null @@ -1,3323 +0,0 @@ -From b552461dec414a8e8705a226de2e6ef6d5931db9 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Tue, 27 Apr 2010 10:51:15 +0200 -Subject: [PATCH 10/45] ARM: OMAP: update beagleboard defconfig - ---- - arch/arm/configs/omap3_beagle_defconfig | 2514 +++++++++++++++++++++++++------ - 1 files changed, 2088 insertions(+), 426 deletions(-) - -diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig -index 9cfae37..adb4f8c 100644 ---- a/arch/arm/configs/omap3_beagle_defconfig -+++ b/arch/arm/configs/omap3_beagle_defconfig -@@ -1,15 +1,13 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.27-rc8 --# Wed Oct 1 17:14:22 2008 -+# Linux kernel version: 2.6.32 -+# Mon Apr 26 16:59:04 2010 - # - CONFIG_ARM=y - CONFIG_SYS_SUPPORTS_APM_EMULATION=y - CONFIG_GENERIC_GPIO=y - CONFIG_GENERIC_TIME=y - CONFIG_GENERIC_CLOCKEVENTS=y --CONFIG_MMU=y --# CONFIG_NO_IOPORT is not set - CONFIG_GENERIC_HARDIRQS=y - CONFIG_STACKTRACE_SUPPORT=y - CONFIG_HAVE_LATENCYTOP_SUPPORT=y -@@ -18,134 +16,183 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y - CONFIG_HARDIRQS_SW_RESEND=y - CONFIG_GENERIC_IRQ_PROBE=y - CONFIG_RWSEM_GENERIC_SPINLOCK=y --# CONFIG_ARCH_HAS_ILOG2_U32 is not set --# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_ARCH_HAS_CPUFREQ=y - CONFIG_GENERIC_HWEIGHT=y - CONFIG_GENERIC_CALIBRATE_DELAY=y --CONFIG_ARCH_SUPPORTS_AOUT=y --CONFIG_ZONE_DMA=y - CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -+CONFIG_OPROFILE_ARMV7=y - CONFIG_VECTORS_BASE=0xffff0000 - CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+CONFIG_CONSTRUCTORS=y - - # - # General setup - # - CONFIG_EXPERIMENTAL=y - CONFIG_BROKEN_ON_SMP=y -+CONFIG_LOCK_KERNEL=y - CONFIG_INIT_ENV_ARG_LIMIT=32 - CONFIG_LOCALVERSION="" --CONFIG_LOCALVERSION_AUTO=y -+# CONFIG_LOCALVERSION_AUTO is not set - CONFIG_SWAP=y - CONFIG_SYSVIPC=y - CONFIG_SYSVIPC_SYSCTL=y - # CONFIG_POSIX_MQUEUE is not set - CONFIG_BSD_PROCESS_ACCT=y - # CONFIG_BSD_PROCESS_ACCT_V3 is not set --# CONFIG_TASKSTATS is not set -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y - # CONFIG_AUDIT is not set --# CONFIG_IKCONFIG is not set --CONFIG_LOG_BUF_SHIFT=14 --# CONFIG_CGROUPS is not set -+ -+# -+# RCU Subsystem -+# -+CONFIG_TREE_RCU=y -+# CONFIG_TREE_PREEMPT_RCU is not set -+# CONFIG_TINY_RCU is not set -+# CONFIG_RCU_TRACE is not set -+CONFIG_RCU_FANOUT=32 -+# CONFIG_RCU_FANOUT_EXACT is not set -+# CONFIG_TREE_RCU_TRACE is not set -+CONFIG_IKCONFIG=y -+CONFIG_IKCONFIG_PROC=y -+CONFIG_LOG_BUF_SHIFT=16 - CONFIG_GROUP_SCHED=y - CONFIG_FAIR_GROUP_SCHED=y - # CONFIG_RT_GROUP_SCHED is not set - CONFIG_USER_SCHED=y - # CONFIG_CGROUP_SCHED is not set --# CONFIG_SYSFS_DEPRECATED=y is not set --# CONFIG_SYSFS_DEPRECATED_V2=y is not set -+# CONFIG_CGROUPS is not set -+# CONFIG_SYSFS_DEPRECATED_V2 is not set - # CONFIG_RELAY is not set - # CONFIG_NAMESPACES is not set - CONFIG_BLK_DEV_INITRD=y - CONFIG_INITRAMFS_SOURCE="" -+CONFIG_RD_GZIP=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set - CONFIG_CC_OPTIMIZE_FOR_SIZE=y - CONFIG_SYSCTL=y -+CONFIG_ANON_INODES=y - CONFIG_EMBEDDED=y - CONFIG_UID16=y - # CONFIG_SYSCTL_SYSCALL is not set - CONFIG_KALLSYMS=y - # CONFIG_KALLSYMS_ALL is not set --CONFIG_KALLSYMS_EXTRA_PASS=y -+# CONFIG_KALLSYMS_EXTRA_PASS is not set - CONFIG_HOTPLUG=y - CONFIG_PRINTK=y - CONFIG_BUG=y --CONFIG_ELF_CORE=y --CONFIG_COMPAT_BRK=y -+# CONFIG_ELF_CORE is not set - CONFIG_BASE_FULL=y - CONFIG_FUTEX=y --CONFIG_ANON_INODES=y - CONFIG_EPOLL=y - CONFIG_SIGNALFD=y - CONFIG_TIMERFD=y - CONFIG_EVENTFD=y - CONFIG_SHMEM=y -+CONFIG_AIO=y -+ -+# -+# Kernel Performance Events And Counters -+# - CONFIG_VM_EVENT_COUNTERS=y -+# CONFIG_COMPAT_BRK is not set - CONFIG_SLAB=y - # CONFIG_SLUB is not set - # CONFIG_SLOB is not set --# CONFIG_PROFILING is not set --# CONFIG_MARKERS is not set -+CONFIG_PROFILING=y -+CONFIG_TRACEPOINTS=y -+CONFIG_OPROFILE=y - CONFIG_HAVE_OPROFILE=y - # CONFIG_KPROBES is not set --# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set --# CONFIG_HAVE_IOREMAP_PROT is not set - CONFIG_HAVE_KPROBES=y - CONFIG_HAVE_KRETPROBES=y --# CONFIG_HAVE_ARCH_TRACEHOOK is not set --# CONFIG_HAVE_DMA_ATTRS is not set --# CONFIG_USE_GENERIC_SMP_HELPERS is not set - CONFIG_HAVE_CLK=y --CONFIG_PROC_PAGE_MONITOR=y -+ -+# -+# GCOV-based kernel profiling -+# -+# CONFIG_GCOV_KERNEL is not set -+CONFIG_SLOW_WORK=y -+# CONFIG_SLOW_WORK_DEBUG is not set - CONFIG_HAVE_GENERIC_DMA_COHERENT=y - CONFIG_SLABINFO=y - CONFIG_RT_MUTEXES=y --# CONFIG_TINY_SHMEM is not set - CONFIG_BASE_SMALL=0 - CONFIG_MODULES=y --# CONFIG_MODULE_FORCE_LOAD is not set -+CONFIG_MODULE_FORCE_LOAD=y - CONFIG_MODULE_UNLOAD=y --# CONFIG_MODULE_FORCE_UNLOAD is not set -+CONFIG_MODULE_FORCE_UNLOAD=y - CONFIG_MODVERSIONS=y - CONFIG_MODULE_SRCVERSION_ALL=y --CONFIG_KMOD=y - CONFIG_BLOCK=y --# CONFIG_LBD is not set --# CONFIG_BLK_DEV_IO_TRACE is not set --# CONFIG_LSF is not set --# CONFIG_BLK_DEV_BSG is not set -+CONFIG_LBDAF=y -+CONFIG_BLK_DEV_BSG=y - # CONFIG_BLK_DEV_INTEGRITY is not set - - # - # IO Schedulers - # - CONFIG_IOSCHED_NOOP=y --CONFIG_IOSCHED_AS=y - CONFIG_IOSCHED_DEADLINE=y - CONFIG_IOSCHED_CFQ=y --CONFIG_DEFAULT_AS=y - # CONFIG_DEFAULT_DEADLINE is not set --# CONFIG_DEFAULT_CFQ is not set -+CONFIG_DEFAULT_CFQ=y - # CONFIG_DEFAULT_NOOP is not set --CONFIG_DEFAULT_IOSCHED="anticipatory" --CONFIG_CLASSIC_RCU=y -+CONFIG_DEFAULT_IOSCHED="cfq" -+# CONFIG_INLINE_SPIN_TRYLOCK is not set -+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -+# CONFIG_INLINE_SPIN_LOCK is not set -+# CONFIG_INLINE_SPIN_LOCK_BH is not set -+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_SPIN_UNLOCK is not set -+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -+# CONFIG_INLINE_READ_TRYLOCK is not set -+# CONFIG_INLINE_READ_LOCK is not set -+# CONFIG_INLINE_READ_LOCK_BH is not set -+# CONFIG_INLINE_READ_LOCK_IRQ is not set -+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_READ_UNLOCK is not set -+# CONFIG_INLINE_READ_UNLOCK_BH is not set -+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -+# CONFIG_INLINE_WRITE_TRYLOCK is not set -+# CONFIG_INLINE_WRITE_LOCK is not set -+# CONFIG_INLINE_WRITE_LOCK_BH is not set -+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_WRITE_UNLOCK is not set -+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -+# CONFIG_MUTEX_SPIN_ON_OWNER is not set - CONFIG_FREEZER=y - - # - # System Type - # -+CONFIG_MMU=y - # CONFIG_ARCH_AAEC2000 is not set - # CONFIG_ARCH_INTEGRATOR is not set - # CONFIG_ARCH_REALVIEW is not set - # CONFIG_ARCH_VERSATILE is not set - # CONFIG_ARCH_AT91 is not set --# CONFIG_ARCH_CLPS7500 is not set - # CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_GEMINI is not set - # CONFIG_ARCH_EBSA110 is not set - # CONFIG_ARCH_EP93XX is not set - # CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_MXC is not set -+# CONFIG_ARCH_STMP3XXX is not set - # CONFIG_ARCH_NETX is not set - # CONFIG_ARCH_H720X is not set --# CONFIG_ARCH_IMX is not set -+# CONFIG_ARCH_NOMADIK is not set - # CONFIG_ARCH_IOP13XX is not set - # CONFIG_ARCH_IOP32X is not set - # CONFIG_ARCH_IOP33X is not set -@@ -153,23 +200,30 @@ CONFIG_FREEZER=y - # CONFIG_ARCH_IXP2000 is not set - # CONFIG_ARCH_IXP4XX is not set - # CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_DOVE is not set - # CONFIG_ARCH_KIRKWOOD is not set --# CONFIG_ARCH_KS8695 is not set --# CONFIG_ARCH_NS9XXX is not set - # CONFIG_ARCH_LOKI is not set - # CONFIG_ARCH_MV78XX0 is not set --# CONFIG_ARCH_MXC is not set - # CONFIG_ARCH_ORION5X is not set -+# CONFIG_ARCH_MMP is not set -+# CONFIG_ARCH_KS8695 is not set -+# CONFIG_ARCH_NS9XXX is not set -+# CONFIG_ARCH_W90X900 is not set - # CONFIG_ARCH_PNX4008 is not set - # CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_MSM is not set - # CONFIG_ARCH_RPC is not set - # CONFIG_ARCH_SA1100 is not set - # CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_S3C64XX is not set -+# CONFIG_ARCH_S5PC1XX is not set - # CONFIG_ARCH_SHARK is not set - # CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_U300 is not set - # CONFIG_ARCH_DAVINCI is not set - CONFIG_ARCH_OMAP=y --# CONFIG_ARCH_MSM7X00A is not set -+# CONFIG_ARCH_BCMRING is not set -+# CONFIG_ARCH_U8500 is not set - - # - # TI OMAP Implementations -@@ -178,37 +232,55 @@ CONFIG_ARCH_OMAP_OTG=y - # CONFIG_ARCH_OMAP1 is not set - # CONFIG_ARCH_OMAP2 is not set - CONFIG_ARCH_OMAP3=y -+# CONFIG_ARCH_OMAP4 is not set - - # - # OMAP Feature Selections - # --# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set --# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set --# CONFIG_OMAP_RESET_CLOCKS is not set -+CONFIG_OMAP_SMARTREFLEX=y -+# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -+CONFIG_OMAP_RESET_CLOCKS=y - # CONFIG_OMAP_MUX is not set --# CONFIG_OMAP_MCBSP is not set -+CONFIG_OMAP_MCBSP=y -+CONFIG_OMAP_MBOX_FWK=m -+CONFIG_OMAP_IOMMU=y - # CONFIG_OMAP_MPU_TIMER is not set - CONFIG_OMAP_32K_TIMER=y -+# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -+# CONFIG_OMAP3_DEBOBS is not set - CONFIG_OMAP_32K_TIMER_HZ=128 - CONFIG_OMAP_DM_TIMER=y - # CONFIG_OMAP_LL_DEBUG_UART1 is not set - # CONFIG_OMAP_LL_DEBUG_UART2 is not set - CONFIG_OMAP_LL_DEBUG_UART3=y -+# CONFIG_OMAP_LL_DEBUG_NONE is not set -+# CONFIG_OMAP_PM_NONE is not set -+# CONFIG_OMAP_PM_NOOP is not set -+CONFIG_OMAP_PM_SRF=y - CONFIG_ARCH_OMAP34XX=y - CONFIG_ARCH_OMAP3430=y -+CONFIG_OMAP_PACKAGE_CBB=y - - # - # OMAP Board Type - # - CONFIG_MACH_OMAP3_BEAGLE=y -- --# --# Boot options --# -- --# --# Power management --# -+# CONFIG_MACH_OMAP_LDP is not set -+# CONFIG_MACH_OVERO is not set -+CONFIG_MACH_OMAP3EVM=y -+CONFIG_PMIC_TWL4030=y -+# CONFIG_MACH_OMAP3517EVM is not set -+# CONFIG_MACH_OMAP3_PANDORA is not set -+# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -+# CONFIG_MACH_OMAP_3430SDP is not set -+# CONFIG_MACH_NOKIA_RX51 is not set -+# CONFIG_MACH_OMAP_ZOOM2 is not set -+# CONFIG_MACH_OMAP_ZOOM3 is not set -+# CONFIG_MACH_CM_T35 is not set -+# CONFIG_MACH_IGEP0020 is not set -+# CONFIG_MACH_OMAP_3630SDP is not set -+# CONFIG_OMAP3_EMU is not set -+# CONFIG_OMAP3_SDRC_AC_TIMING is not set - - # - # Processor Type -@@ -218,7 +290,7 @@ CONFIG_CPU_32v6K=y - CONFIG_CPU_V7=y - CONFIG_CPU_32v7=y - CONFIG_CPU_ABRT_EV7=y --CONFIG_CPU_PABRT_IFAR=y -+CONFIG_CPU_PABRT_V7=y - CONFIG_CPU_CACHE_V7=y - CONFIG_CPU_CACHE_VIPT=y - CONFIG_CPU_COPY_V6=y -@@ -231,12 +303,17 @@ CONFIG_CPU_CP15_MMU=y - # Processor Features - # - CONFIG_ARM_THUMB=y --# CONFIG_ARM_THUMBEE is not set -+CONFIG_ARM_THUMBEE=y - # CONFIG_CPU_ICACHE_DISABLE is not set - # CONFIG_CPU_DCACHE_DISABLE is not set - # CONFIG_CPU_BPREDICT_DISABLE is not set - CONFIG_HAS_TLS_REG=y --# CONFIG_OUTER_CACHE is not set -+CONFIG_ARM_L1_CACHE_SHIFT=6 -+CONFIG_USER_L2_PLE=y -+CONFIG_USER_PMON=y -+# CONFIG_ARM_ERRATA_430973 is not set -+# CONFIG_ARM_ERRATA_458693 is not set -+# CONFIG_ARM_ERRATA_460075 is not set - CONFIG_COMMON_CLKDEV=y - - # -@@ -257,42 +334,63 @@ CONFIG_VMSPLIT_3G=y - # CONFIG_VMSPLIT_2G is not set - # CONFIG_VMSPLIT_1G is not set - CONFIG_PAGE_OFFSET=0xC0000000 --# CONFIG_PREEMPT is not set -+# CONFIG_PREEMPT_NONE is not set -+# CONFIG_PREEMPT_VOLUNTARY is not set -+CONFIG_PREEMPT=y - CONFIG_HZ=128 -+# CONFIG_THUMB2_KERNEL is not set - CONFIG_AEABI=y --CONFIG_OABI_COMPAT=y --CONFIG_ARCH_FLATMEM_HAS_HOLES=y --# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+# CONFIG_OABI_COMPAT is not set -+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -+# CONFIG_HIGHMEM is not set - CONFIG_SELECT_MEMORY_MODEL=y - CONFIG_FLATMEM_MANUAL=y - # CONFIG_DISCONTIGMEM_MANUAL is not set - # CONFIG_SPARSEMEM_MANUAL is not set - CONFIG_FLATMEM=y - CONFIG_FLAT_NODE_MEM_MAP=y --# CONFIG_SPARSEMEM_STATIC is not set --# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set - CONFIG_PAGEFLAGS_EXTENDED=y - CONFIG_SPLIT_PTLOCK_CPUS=4 --# CONFIG_RESOURCES_64BIT is not set --CONFIG_ZONE_DMA_FLAG=1 --CONFIG_BOUNCE=y -+# CONFIG_PHYS_ADDR_T_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 - CONFIG_VIRT_TO_BUS=y --# CONFIG_LEDS is not set -+# CONFIG_KSM is not set -+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -+CONFIG_LEDS=y - CONFIG_ALIGNMENT_TRAP=y -+# CONFIG_UACCESS_WITH_MEMCPY is not set -+CONFIG_CPU_V7_SYSFS=y - - # - # Boot options - # - CONFIG_ZBOOT_ROM_TEXT=0x0 - CONFIG_ZBOOT_ROM_BSS=0x0 --CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" -+CONFIG_CMDLINE=" debug " - # CONFIG_XIP_KERNEL is not set --# CONFIG_KEXEC is not set -+CONFIG_KEXEC=y -+CONFIG_ATAGS_PROC=y - - # - # CPU Power Management - # --# CONFIG_CPU_FREQ is not set -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+CONFIG_CPU_FREQ_DEBUG=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_STAT_DETAILS=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y - # CONFIG_CPU_IDLE is not set - - # -@@ -302,29 +400,30 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.16 - # - # At least one emulation must be selected - # --CONFIG_FPE_NWFPE=y --# CONFIG_FPE_NWFPE_XP is not set --# CONFIG_FPE_FASTFPE is not set - CONFIG_VFP=y - CONFIG_VFPv3=y --# CONFIG_NEON is not set -+CONFIG_NEON=y - - # - # Userspace binary formats - # - CONFIG_BINFMT_ELF=y --# CONFIG_BINFMT_AOUT is not set -+CONFIG_HAVE_AOUT=y -+CONFIG_BINFMT_AOUT=m - CONFIG_BINFMT_MISC=y - - # - # Power management options - # - CONFIG_PM=y --# CONFIG_PM_DEBUG is not set -+CONFIG_PM_DEBUG=y -+# CONFIG_PM_VERBOSE is not set -+CONFIG_CAN_PM_TRACE=y - CONFIG_PM_SLEEP=y - CONFIG_SUSPEND=y - CONFIG_SUSPEND_FREEZER=y - # CONFIG_APM_EMULATION is not set -+CONFIG_PM_RUNTIME=y - CONFIG_ARCH_SUSPEND_POSSIBLE=y - CONFIG_NET=y - -@@ -332,13 +431,14 @@ CONFIG_NET=y - # Networking options - # - CONFIG_PACKET=y --# CONFIG_PACKET_MMAP is not set -+CONFIG_PACKET_MMAP=y - CONFIG_UNIX=y - CONFIG_XFRM=y - # CONFIG_XFRM_USER is not set - # CONFIG_XFRM_SUB_POLICY is not set - # CONFIG_XFRM_MIGRATE is not set - # CONFIG_XFRM_STATISTICS is not set -+CONFIG_XFRM_IPCOMP=m - CONFIG_NET_KEY=y - # CONFIG_NET_KEY_MIGRATE is not set - CONFIG_INET=y -@@ -349,63 +449,462 @@ CONFIG_IP_PNP=y - CONFIG_IP_PNP_DHCP=y - CONFIG_IP_PNP_BOOTP=y - CONFIG_IP_PNP_RARP=y --# CONFIG_NET_IPIP is not set --# CONFIG_NET_IPGRE is not set -+CONFIG_NET_IPIP=m -+CONFIG_NET_IPGRE=m - # CONFIG_ARPD is not set - # CONFIG_SYN_COOKIES is not set --# CONFIG_INET_AH is not set --# CONFIG_INET_ESP is not set --# CONFIG_INET_IPCOMP is not set --# CONFIG_INET_XFRM_TUNNEL is not set --# CONFIG_INET_TUNNEL is not set -+CONFIG_INET_AH=m -+CONFIG_INET_ESP=m -+CONFIG_INET_IPCOMP=m -+CONFIG_INET_XFRM_TUNNEL=m -+CONFIG_INET_TUNNEL=m - CONFIG_INET_XFRM_MODE_TRANSPORT=y - CONFIG_INET_XFRM_MODE_TUNNEL=y - CONFIG_INET_XFRM_MODE_BEET=y --# CONFIG_INET_LRO is not set --CONFIG_INET_DIAG=y --CONFIG_INET_TCP_DIAG=y --# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_INET_LRO=y -+CONFIG_INET_DIAG=m -+CONFIG_INET_TCP_DIAG=m -+CONFIG_TCP_CONG_ADVANCED=y -+CONFIG_TCP_CONG_BIC=m - CONFIG_TCP_CONG_CUBIC=y -+CONFIG_TCP_CONG_WESTWOOD=m -+CONFIG_TCP_CONG_HTCP=m -+CONFIG_TCP_CONG_HSTCP=m -+CONFIG_TCP_CONG_HYBLA=m -+CONFIG_TCP_CONG_VEGAS=m -+CONFIG_TCP_CONG_SCALABLE=m -+CONFIG_TCP_CONG_LP=m -+CONFIG_TCP_CONG_VENO=m -+CONFIG_TCP_CONG_YEAH=m -+CONFIG_TCP_CONG_ILLINOIS=m -+# CONFIG_DEFAULT_BIC is not set -+CONFIG_DEFAULT_CUBIC=y -+# CONFIG_DEFAULT_HTCP is not set -+# CONFIG_DEFAULT_VEGAS is not set -+# CONFIG_DEFAULT_WESTWOOD is not set -+# CONFIG_DEFAULT_RENO is not set - CONFIG_DEFAULT_TCP_CONG="cubic" - # CONFIG_TCP_MD5SIG is not set --# CONFIG_IPV6 is not set -+CONFIG_IPV6=m -+# CONFIG_IPV6_PRIVACY is not set -+# CONFIG_IPV6_ROUTER_PREF is not set -+# CONFIG_IPV6_OPTIMISTIC_DAD is not set -+CONFIG_INET6_AH=m -+CONFIG_INET6_ESP=m -+CONFIG_INET6_IPCOMP=m -+CONFIG_IPV6_MIP6=m -+CONFIG_INET6_XFRM_TUNNEL=m -+CONFIG_INET6_TUNNEL=m -+CONFIG_INET6_XFRM_MODE_TRANSPORT=m -+CONFIG_INET6_XFRM_MODE_TUNNEL=m -+CONFIG_INET6_XFRM_MODE_BEET=m -+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -+CONFIG_IPV6_SIT=m -+# CONFIG_IPV6_SIT_6RD is not set -+CONFIG_IPV6_NDISC_NODETYPE=y -+CONFIG_IPV6_TUNNEL=m -+CONFIG_IPV6_MULTIPLE_TABLES=y -+CONFIG_IPV6_SUBTREES=y -+CONFIG_IPV6_MROUTE=y -+# CONFIG_IPV6_PIMSM_V2 is not set - # CONFIG_NETWORK_SECMARK is not set --# CONFIG_NETFILTER is not set --# CONFIG_IP_DCCP is not set --# CONFIG_IP_SCTP is not set --# CONFIG_TIPC is not set --# CONFIG_ATM is not set --# CONFIG_BRIDGE is not set --# CONFIG_VLAN_8021Q is not set -+CONFIG_NETFILTER=y -+# CONFIG_NETFILTER_DEBUG is not set -+CONFIG_NETFILTER_ADVANCED=y -+CONFIG_BRIDGE_NETFILTER=y -+ -+# -+# Core Netfilter Configuration -+# -+CONFIG_NETFILTER_NETLINK=m -+CONFIG_NETFILTER_NETLINK_QUEUE=m -+CONFIG_NETFILTER_NETLINK_LOG=m -+CONFIG_NF_CONNTRACK=m -+CONFIG_NF_CT_ACCT=y -+CONFIG_NF_CONNTRACK_MARK=y -+CONFIG_NF_CONNTRACK_EVENTS=y -+CONFIG_NF_CT_PROTO_DCCP=m -+CONFIG_NF_CT_PROTO_GRE=m -+CONFIG_NF_CT_PROTO_SCTP=m -+CONFIG_NF_CT_PROTO_UDPLITE=m -+CONFIG_NF_CONNTRACK_AMANDA=m -+CONFIG_NF_CONNTRACK_FTP=m -+CONFIG_NF_CONNTRACK_H323=m -+CONFIG_NF_CONNTRACK_IRC=m -+CONFIG_NF_CONNTRACK_NETBIOS_NS=m -+CONFIG_NF_CONNTRACK_PPTP=m -+CONFIG_NF_CONNTRACK_SANE=m -+CONFIG_NF_CONNTRACK_SIP=m -+CONFIG_NF_CONNTRACK_TFTP=m -+CONFIG_NF_CT_NETLINK=m -+# CONFIG_NETFILTER_TPROXY is not set -+CONFIG_NETFILTER_XTABLES=m -+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -+CONFIG_NETFILTER_XT_TARGET_HL=m -+# CONFIG_NETFILTER_XT_TARGET_LED is not set -+CONFIG_NETFILTER_XT_TARGET_MARK=m -+CONFIG_NETFILTER_XT_TARGET_NFLOG=m -+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -+CONFIG_NETFILTER_XT_TARGET_RATEEST=m -+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -+CONFIG_NETFILTER_XT_MATCH_COMMENT=m -+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -+CONFIG_NETFILTER_XT_MATCH_DCCP=m -+CONFIG_NETFILTER_XT_MATCH_DSCP=m -+CONFIG_NETFILTER_XT_MATCH_ESP=m -+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -+CONFIG_NETFILTER_XT_MATCH_HELPER=m -+CONFIG_NETFILTER_XT_MATCH_HL=m -+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -+CONFIG_NETFILTER_XT_MATCH_LENGTH=m -+CONFIG_NETFILTER_XT_MATCH_LIMIT=m -+CONFIG_NETFILTER_XT_MATCH_MAC=m -+CONFIG_NETFILTER_XT_MATCH_MARK=m -+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -+CONFIG_NETFILTER_XT_MATCH_OWNER=m -+CONFIG_NETFILTER_XT_MATCH_POLICY=m -+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -+CONFIG_NETFILTER_XT_MATCH_QUOTA=m -+CONFIG_NETFILTER_XT_MATCH_RATEEST=m -+CONFIG_NETFILTER_XT_MATCH_REALM=m -+CONFIG_NETFILTER_XT_MATCH_RECENT=m -+# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -+CONFIG_NETFILTER_XT_MATCH_SCTP=m -+CONFIG_NETFILTER_XT_MATCH_STATE=m -+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -+CONFIG_NETFILTER_XT_MATCH_STRING=m -+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -+CONFIG_NETFILTER_XT_MATCH_TIME=m -+CONFIG_NETFILTER_XT_MATCH_U32=m -+# CONFIG_NETFILTER_XT_MATCH_OSF is not set -+CONFIG_IP_VS=m -+CONFIG_IP_VS_IPV6=y -+CONFIG_IP_VS_DEBUG=y -+CONFIG_IP_VS_TAB_BITS=12 -+ -+# -+# IPVS transport protocol load balancing support -+# -+CONFIG_IP_VS_PROTO_TCP=y -+CONFIG_IP_VS_PROTO_UDP=y -+CONFIG_IP_VS_PROTO_AH_ESP=y -+CONFIG_IP_VS_PROTO_ESP=y -+CONFIG_IP_VS_PROTO_AH=y -+ -+# -+# IPVS scheduler -+# -+CONFIG_IP_VS_RR=m -+CONFIG_IP_VS_WRR=m -+CONFIG_IP_VS_LC=m -+CONFIG_IP_VS_WLC=m -+CONFIG_IP_VS_LBLC=m -+CONFIG_IP_VS_LBLCR=m -+CONFIG_IP_VS_DH=m -+CONFIG_IP_VS_SH=m -+CONFIG_IP_VS_SED=m -+CONFIG_IP_VS_NQ=m -+ -+# -+# IPVS application helper -+# -+CONFIG_IP_VS_FTP=m -+ -+# -+# IP: Netfilter Configuration -+# -+CONFIG_NF_DEFRAG_IPV4=m -+CONFIG_NF_CONNTRACK_IPV4=m -+CONFIG_NF_CONNTRACK_PROC_COMPAT=y -+CONFIG_IP_NF_QUEUE=m -+CONFIG_IP_NF_IPTABLES=m -+CONFIG_IP_NF_MATCH_ADDRTYPE=m -+CONFIG_IP_NF_MATCH_AH=m -+CONFIG_IP_NF_MATCH_ECN=m -+CONFIG_IP_NF_MATCH_TTL=m -+CONFIG_IP_NF_FILTER=m -+CONFIG_IP_NF_TARGET_REJECT=m -+CONFIG_IP_NF_TARGET_LOG=m -+CONFIG_IP_NF_TARGET_ULOG=m -+CONFIG_NF_NAT=m -+CONFIG_NF_NAT_NEEDED=y -+CONFIG_IP_NF_TARGET_MASQUERADE=m -+CONFIG_IP_NF_TARGET_NETMAP=m -+CONFIG_IP_NF_TARGET_REDIRECT=m -+CONFIG_NF_NAT_SNMP_BASIC=m -+CONFIG_NF_NAT_PROTO_DCCP=m -+CONFIG_NF_NAT_PROTO_GRE=m -+CONFIG_NF_NAT_PROTO_UDPLITE=m -+CONFIG_NF_NAT_PROTO_SCTP=m -+CONFIG_NF_NAT_FTP=m -+CONFIG_NF_NAT_IRC=m -+CONFIG_NF_NAT_TFTP=m -+CONFIG_NF_NAT_AMANDA=m -+CONFIG_NF_NAT_PPTP=m -+CONFIG_NF_NAT_H323=m -+CONFIG_NF_NAT_SIP=m -+CONFIG_IP_NF_MANGLE=m -+CONFIG_IP_NF_TARGET_CLUSTERIP=m -+CONFIG_IP_NF_TARGET_ECN=m -+CONFIG_IP_NF_TARGET_TTL=m -+CONFIG_IP_NF_RAW=m -+CONFIG_IP_NF_ARPTABLES=m -+CONFIG_IP_NF_ARPFILTER=m -+CONFIG_IP_NF_ARP_MANGLE=m -+ -+# -+# IPv6: Netfilter Configuration -+# -+CONFIG_NF_CONNTRACK_IPV6=m -+CONFIG_IP6_NF_QUEUE=m -+CONFIG_IP6_NF_IPTABLES=m -+CONFIG_IP6_NF_MATCH_AH=m -+CONFIG_IP6_NF_MATCH_EUI64=m -+CONFIG_IP6_NF_MATCH_FRAG=m -+CONFIG_IP6_NF_MATCH_OPTS=m -+CONFIG_IP6_NF_MATCH_HL=m -+CONFIG_IP6_NF_MATCH_IPV6HEADER=m -+CONFIG_IP6_NF_MATCH_MH=m -+CONFIG_IP6_NF_MATCH_RT=m -+CONFIG_IP6_NF_TARGET_HL=m -+CONFIG_IP6_NF_TARGET_LOG=m -+CONFIG_IP6_NF_FILTER=m -+CONFIG_IP6_NF_TARGET_REJECT=m -+CONFIG_IP6_NF_MANGLE=m -+CONFIG_IP6_NF_RAW=m -+# CONFIG_BRIDGE_NF_EBTABLES is not set -+CONFIG_IP_DCCP=m -+CONFIG_INET_DCCP_DIAG=m -+ -+# -+# DCCP CCIDs Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_DCCP_CCID2_DEBUG is not set -+CONFIG_IP_DCCP_CCID3=y -+# CONFIG_IP_DCCP_CCID3_DEBUG is not set -+CONFIG_IP_DCCP_CCID3_RTO=100 -+CONFIG_IP_DCCP_TFRC_LIB=y -+ -+# -+# DCCP Kernel Hacking -+# -+# CONFIG_IP_DCCP_DEBUG is not set -+CONFIG_IP_SCTP=m -+# CONFIG_SCTP_DBG_MSG is not set -+# CONFIG_SCTP_DBG_OBJCNT is not set -+# CONFIG_SCTP_HMAC_NONE is not set -+# CONFIG_SCTP_HMAC_SHA1 is not set -+CONFIG_SCTP_HMAC_MD5=y -+# CONFIG_RDS is not set -+CONFIG_TIPC=m -+# CONFIG_TIPC_ADVANCED is not set -+# CONFIG_TIPC_DEBUG is not set -+CONFIG_ATM=m -+CONFIG_ATM_CLIP=m -+# CONFIG_ATM_CLIP_NO_ICMP is not set -+CONFIG_ATM_LANE=m -+CONFIG_ATM_MPOA=m -+CONFIG_ATM_BR2684=m -+# CONFIG_ATM_BR2684_IPFILTER is not set -+CONFIG_STP=m -+CONFIG_GARP=m -+CONFIG_BRIDGE=m -+# CONFIG_NET_DSA is not set -+CONFIG_VLAN_8021Q=m -+CONFIG_VLAN_8021Q_GVRP=y - # CONFIG_DECNET is not set -+CONFIG_LLC=m - # CONFIG_LLC2 is not set - # CONFIG_IPX is not set - # CONFIG_ATALK is not set - # CONFIG_X25 is not set - # CONFIG_LAPB is not set - # CONFIG_ECONET is not set --# CONFIG_WAN_ROUTER is not set --# CONFIG_NET_SCHED is not set -+CONFIG_WAN_ROUTER=m -+# CONFIG_PHONET is not set -+# CONFIG_IEEE802154 is not set -+CONFIG_NET_SCHED=y -+ -+# -+# Queueing/Scheduling -+# -+CONFIG_NET_SCH_CBQ=m -+CONFIG_NET_SCH_HTB=m -+CONFIG_NET_SCH_HFSC=m -+CONFIG_NET_SCH_ATM=m -+CONFIG_NET_SCH_PRIO=m -+CONFIG_NET_SCH_MULTIQ=m -+CONFIG_NET_SCH_RED=m -+CONFIG_NET_SCH_SFQ=m -+CONFIG_NET_SCH_TEQL=m -+CONFIG_NET_SCH_TBF=m -+CONFIG_NET_SCH_GRED=m -+CONFIG_NET_SCH_DSMARK=m -+CONFIG_NET_SCH_NETEM=m -+CONFIG_NET_SCH_DRR=m -+ -+# -+# Classification -+# -+CONFIG_NET_CLS=y -+CONFIG_NET_CLS_BASIC=m -+CONFIG_NET_CLS_TCINDEX=m -+CONFIG_NET_CLS_ROUTE4=m -+CONFIG_NET_CLS_ROUTE=y -+CONFIG_NET_CLS_FW=m -+CONFIG_NET_CLS_U32=m -+CONFIG_CLS_U32_PERF=y -+CONFIG_CLS_U32_MARK=y -+CONFIG_NET_CLS_RSVP=m -+CONFIG_NET_CLS_RSVP6=m -+CONFIG_NET_CLS_FLOW=m -+# CONFIG_NET_EMATCH is not set -+# CONFIG_NET_CLS_ACT is not set -+CONFIG_NET_CLS_IND=y -+CONFIG_NET_SCH_FIFO=y -+# CONFIG_DCB is not set - - # - # Network testing - # - # CONFIG_NET_PKTGEN is not set -+# CONFIG_NET_DROP_MONITOR is not set - # CONFIG_HAMRADIO is not set --# CONFIG_CAN is not set --# CONFIG_IRDA is not set --# CONFIG_BT is not set --# CONFIG_AF_RXRPC is not set -- --# --# Wireless --# --# CONFIG_CFG80211 is not set --# CONFIG_WIRELESS_EXT is not set --# CONFIG_MAC80211 is not set --# CONFIG_IEEE80211 is not set --# CONFIG_RFKILL is not set --# CONFIG_NET_9P is not set -+CONFIG_CAN=m -+CONFIG_CAN_RAW=m -+CONFIG_CAN_BCM=m -+ -+# -+# CAN Device Drivers -+# -+CONFIG_CAN_VCAN=m -+# CONFIG_CAN_DEV is not set -+# CONFIG_CAN_DEBUG_DEVICES is not set -+CONFIG_IRDA=m -+ -+# -+# IrDA protocols -+# -+CONFIG_IRLAN=m -+CONFIG_IRNET=m -+CONFIG_IRCOMM=m -+CONFIG_IRDA_ULTRA=y -+ -+# -+# IrDA options -+# -+CONFIG_IRDA_CACHE_LAST_LSAP=y -+CONFIG_IRDA_FAST_RR=y -+CONFIG_IRDA_DEBUG=y -+ -+# -+# Infrared-port device drivers -+# -+ -+# -+# SIR device drivers -+# -+CONFIG_IRTTY_SIR=m -+ -+# -+# Dongle support -+# -+CONFIG_DONGLE=y -+CONFIG_ESI_DONGLE=m -+CONFIG_ACTISYS_DONGLE=m -+CONFIG_TEKRAM_DONGLE=m -+CONFIG_TOIM3232_DONGLE=m -+CONFIG_LITELINK_DONGLE=m -+CONFIG_MA600_DONGLE=m -+CONFIG_GIRBIL_DONGLE=m -+CONFIG_MCP2120_DONGLE=m -+CONFIG_OLD_BELKIN_DONGLE=m -+# CONFIG_ACT200L_DONGLE is not set -+CONFIG_KINGSUN_DONGLE=m -+CONFIG_KSDAZZLE_DONGLE=m -+CONFIG_KS959_DONGLE=m -+ -+# -+# FIR device drivers -+# -+CONFIG_USB_IRDA=m -+CONFIG_SIGMATEL_FIR=m -+CONFIG_MCS_FIR=m -+CONFIG_BT=m -+CONFIG_BT_L2CAP=m -+CONFIG_BT_SCO=m -+CONFIG_BT_RFCOMM=m -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=m -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=m -+ -+# -+# Bluetooth device drivers -+# -+CONFIG_BT_HCIBTUSB=m -+CONFIG_BT_HCIBTSDIO=m -+CONFIG_BT_HCIUART=m -+CONFIG_BT_HCIUART_H4=y -+CONFIG_BT_HCIUART_BCSP=y -+CONFIG_BT_HCIUART_LL=y -+CONFIG_BT_HCIBCM203X=m -+CONFIG_BT_HCIBPA10X=m -+CONFIG_BT_HCIBFUSB=m -+# CONFIG_BT_HCIVHCI is not set -+# CONFIG_BT_MRVL is not set -+CONFIG_AF_RXRPC=m -+# CONFIG_AF_RXRPC_DEBUG is not set -+# CONFIG_RXKAD is not set -+CONFIG_FIB_RULES=y -+CONFIG_WIRELESS=y -+CONFIG_WIRELESS_EXT=y -+CONFIG_WEXT_CORE=y -+CONFIG_WEXT_PROC=y -+CONFIG_WEXT_SPY=y -+CONFIG_WEXT_PRIV=y -+CONFIG_CFG80211=m -+# CONFIG_NL80211_TESTMODE is not set -+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -+# CONFIG_CFG80211_REG_DEBUG is not set -+CONFIG_CFG80211_DEFAULT_PS=y -+# CONFIG_CFG80211_DEBUGFS is not set -+CONFIG_WIRELESS_OLD_REGULATORY=y -+CONFIG_CFG80211_WEXT=y -+CONFIG_WIRELESS_EXT_SYSFS=y -+CONFIG_LIB80211=y -+CONFIG_LIB80211_CRYPT_WEP=m -+CONFIG_LIB80211_CRYPT_CCMP=m -+CONFIG_LIB80211_CRYPT_TKIP=m -+# CONFIG_LIB80211_DEBUG is not set -+CONFIG_MAC80211=m -+CONFIG_MAC80211_RC_PID=y -+# CONFIG_MAC80211_RC_MINSTREL is not set -+CONFIG_MAC80211_RC_DEFAULT_PID=y -+# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set -+CONFIG_MAC80211_RC_DEFAULT="pid" -+# CONFIG_MAC80211_MESH is not set -+CONFIG_MAC80211_LEDS=y -+# CONFIG_MAC80211_DEBUGFS is not set -+# CONFIG_MAC80211_DEBUG_MENU is not set -+CONFIG_WIMAX=m -+CONFIG_WIMAX_DEBUG_LEVEL=8 -+CONFIG_RFKILL=m -+CONFIG_RFKILL_LEDS=y -+CONFIG_RFKILL_INPUT=y -+CONFIG_NET_9P=m -+# CONFIG_NET_9P_DEBUG is not set - - # - # Device Drivers -@@ -414,17 +913,22 @@ CONFIG_DEFAULT_TCP_CONG="cubic" - # - # Generic Driver Options - # --CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+CONFIG_UEVENT_HELPER_PATH="" -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y - CONFIG_STANDALONE=y - CONFIG_PREVENT_FIRMWARE_BUILD=y --# CONFIG_FW_LOADER is not set -+CONFIG_FW_LOADER=y -+CONFIG_FIRMWARE_IN_KERNEL=y -+CONFIG_EXTRA_FIRMWARE="" - # CONFIG_DEBUG_DRIVER is not set - # CONFIG_DEBUG_DEVRES is not set - # CONFIG_SYS_HYPERVISOR is not set - # CONFIG_CONNECTOR is not set - CONFIG_MTD=y - # CONFIG_MTD_DEBUG is not set --# CONFIG_MTD_CONCAT is not set -+# CONFIG_MTD_TESTS is not set -+CONFIG_MTD_CONCAT=y - CONFIG_MTD_PARTITIONS=y - # CONFIG_MTD_REDBOOT_PARTS is not set - # CONFIG_MTD_CMDLINE_PARTS is not set -@@ -472,6 +976,9 @@ CONFIG_MTD_CFI_I2=y - # - # Self-contained MTD device drivers - # -+# CONFIG_MTD_DATAFLASH is not set -+# CONFIG_MTD_M25P80 is not set -+# CONFIG_MTD_SST25L is not set - # CONFIG_MTD_SLRAM is not set - # CONFIG_MTD_PHRAM is not set - # CONFIG_MTD_MTDRAM is not set -@@ -487,38 +994,82 @@ CONFIG_MTD_NAND=y - # CONFIG_MTD_NAND_VERIFY_WRITE is not set - # CONFIG_MTD_NAND_ECC_SMC is not set - # CONFIG_MTD_NAND_MUSEUM_IDS is not set -+# CONFIG_MTD_NAND_GPIO is not set -+CONFIG_MTD_NAND_OMAP2=y -+CONFIG_MTD_NAND_OMAP_PREFETCH=y -+# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set - CONFIG_MTD_NAND_IDS=y - # CONFIG_MTD_NAND_DISKONCHIP is not set - # CONFIG_MTD_NAND_NANDSIM is not set --# CONFIG_MTD_NAND_PLATFORM is not set -+CONFIG_MTD_NAND_PLATFORM=y - # CONFIG_MTD_ALAUDA is not set - # CONFIG_MTD_ONENAND is not set - - # -+# LPDDR flash memory drivers -+# -+# CONFIG_MTD_LPDDR is not set -+ -+# - # UBI - Unsorted block images - # --# CONFIG_MTD_UBI is not set -+CONFIG_MTD_UBI=y -+CONFIG_MTD_UBI_WL_THRESHOLD=4096 -+CONFIG_MTD_UBI_BEB_RESERVE=1 -+# CONFIG_MTD_UBI_GLUEBI is not set -+ -+# -+# UBI debugging options -+# -+# CONFIG_MTD_UBI_DEBUG is not set - # CONFIG_PARPORT is not set - CONFIG_BLK_DEV=y - # CONFIG_BLK_DEV_COW_COMMON is not set - CONFIG_BLK_DEV_LOOP=y --# CONFIG_BLK_DEV_CRYPTOLOOP is not set -+CONFIG_BLK_DEV_CRYPTOLOOP=m -+ -+# -+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -+# - # CONFIG_BLK_DEV_NBD is not set - # CONFIG_BLK_DEV_UB is not set - CONFIG_BLK_DEV_RAM=y - CONFIG_BLK_DEV_RAM_COUNT=16 - CONFIG_BLK_DEV_RAM_SIZE=16384 - # CONFIG_BLK_DEV_XIP is not set --# CONFIG_CDROM_PKTCDVD is not set -+CONFIG_CDROM_PKTCDVD=m -+CONFIG_CDROM_PKTCDVD_BUFFERS=8 -+# CONFIG_CDROM_PKTCDVD_WCACHE is not set - # CONFIG_ATA_OVER_ETH is not set --# CONFIG_MISC_DEVICES is not set -+# CONFIG_MG_DISK is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_AD525X_DPOT is not set -+# CONFIG_ICS932S401 is not set -+# CONFIG_ENCLOSURE_SERVICES is not set -+CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -+# CONFIG_ISL29003 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_TI_DAC7512 is not set -+# CONFIG_C2PORT is not set -+ -+# -+# EEPROM support -+# -+# CONFIG_EEPROM_AT24 is not set -+# CONFIG_EEPROM_AT25 is not set -+# CONFIG_EEPROM_LEGACY is not set -+# CONFIG_EEPROM_MAX6875 is not set -+CONFIG_EEPROM_93CX6=y -+CONFIG_IWMC3200TOP=m -+# CONFIG_IWMC3200TOP_DEBUG is not set -+# CONFIG_IWMC3200TOP_DEBUGFS is not set - CONFIG_HAVE_IDE=y - # CONFIG_IDE is not set - - # - # SCSI device support - # --# CONFIG_RAID_ATTRS is not set -+CONFIG_RAID_ATTRS=m - CONFIG_SCSI=y - CONFIG_SCSI_DMA=y - # CONFIG_SCSI_TGT is not set -@@ -531,14 +1082,11 @@ CONFIG_SCSI_PROC_FS=y - CONFIG_BLK_DEV_SD=y - # CONFIG_CHR_DEV_ST is not set - # CONFIG_CHR_DEV_OSST is not set --# CONFIG_BLK_DEV_SR is not set --# CONFIG_CHR_DEV_SG is not set --# CONFIG_CHR_DEV_SCH is not set -- --# --# Some SCSI devices (e.g. CD jukebox) support multiple LUNs --# --# CONFIG_SCSI_MULTI_LUN is not set -+CONFIG_BLK_DEV_SR=y -+CONFIG_BLK_DEV_SR_VENDOR=y -+CONFIG_CHR_DEV_SG=y -+CONFIG_CHR_DEV_SCH=m -+CONFIG_SCSI_MULTI_LUN=y - # CONFIG_SCSI_CONSTANTS is not set - # CONFIG_SCSI_LOGGING is not set - # CONFIG_SCSI_SCAN_ASYNC is not set -@@ -549,78 +1097,277 @@ CONFIG_SCSI_WAIT_SCAN=m - # - # CONFIG_SCSI_SPI_ATTRS is not set - # CONFIG_SCSI_FC_ATTRS is not set --# CONFIG_SCSI_ISCSI_ATTRS is not set -+CONFIG_SCSI_ISCSI_ATTRS=m -+# CONFIG_SCSI_SAS_ATTRS is not set - # CONFIG_SCSI_SAS_LIBSAS is not set - # CONFIG_SCSI_SRP_ATTRS is not set - CONFIG_SCSI_LOWLEVEL=y --# CONFIG_ISCSI_TCP is not set -+CONFIG_ISCSI_TCP=m -+# CONFIG_LIBFC is not set -+# CONFIG_LIBFCOE is not set - # CONFIG_SCSI_DEBUG is not set - # CONFIG_SCSI_DH is not set -+# CONFIG_SCSI_OSD_INITIATOR is not set - # CONFIG_ATA is not set --# CONFIG_MD is not set -+CONFIG_MD=y -+CONFIG_BLK_DEV_MD=m -+CONFIG_MD_LINEAR=m -+CONFIG_MD_RAID0=m -+CONFIG_MD_RAID1=m -+CONFIG_MD_RAID10=m -+CONFIG_MD_RAID456=m -+CONFIG_MD_RAID6_PQ=m -+# CONFIG_ASYNC_RAID6_TEST is not set -+CONFIG_MD_MULTIPATH=m -+CONFIG_MD_FAULTY=m -+CONFIG_BLK_DEV_DM=m -+# CONFIG_DM_DEBUG is not set -+CONFIG_DM_CRYPT=m -+CONFIG_DM_SNAPSHOT=m -+CONFIG_DM_MIRROR=m -+# CONFIG_DM_LOG_USERSPACE is not set -+CONFIG_DM_ZERO=m -+CONFIG_DM_MULTIPATH=m -+# CONFIG_DM_MULTIPATH_QL is not set -+# CONFIG_DM_MULTIPATH_ST is not set -+CONFIG_DM_DELAY=m -+# CONFIG_DM_UEVENT is not set - CONFIG_NETDEVICES=y --# CONFIG_DUMMY is not set --# CONFIG_BONDING is not set --# CONFIG_MACVLAN is not set --# CONFIG_EQUALIZER is not set --# CONFIG_TUN is not set --# CONFIG_VETH is not set --# CONFIG_NET_ETHERNET is not set -+CONFIG_DUMMY=m -+CONFIG_BONDING=m -+CONFIG_MACVLAN=m -+CONFIG_EQUALIZER=m -+CONFIG_TUN=m -+CONFIG_VETH=m -+CONFIG_PHYLIB=y -+ -+# -+# MII PHY device drivers -+# -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+# CONFIG_LXT_PHY is not set -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_ICPLUS_PHY is not set -+# CONFIG_REALTEK_PHY is not set -+# CONFIG_NATIONAL_PHY is not set -+# CONFIG_STE10XP is not set -+# CONFIG_LSI_ET1011C_PHY is not set -+# CONFIG_FIXED_PHY is not set -+# CONFIG_MDIO_BITBANG is not set -+CONFIG_NET_ETHERNET=y -+CONFIG_MII=y -+# CONFIG_AX88796 is not set -+# CONFIG_SMC91X is not set -+# CONFIG_TI_DAVINCI_EMAC is not set -+# CONFIG_DM9000 is not set -+CONFIG_ENC28J60=y -+# CONFIG_ENC28J60_WRITEVERIFY is not set -+# CONFIG_ETHOC is not set -+CONFIG_SMC911X=y -+CONFIG_SMSC911X=y -+# CONFIG_DNET is not set -+# CONFIG_IBM_NEW_EMAC_ZMII is not set -+# CONFIG_IBM_NEW_EMAC_RGMII is not set -+# CONFIG_IBM_NEW_EMAC_TAH is not set -+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -+# CONFIG_B44 is not set -+# CONFIG_KS8842 is not set -+CONFIG_KS8851=y -+# CONFIG_KS8851_MLL is not set - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set -- --# --# Wireless LAN --# --# CONFIG_WLAN_PRE80211 is not set --# CONFIG_WLAN_80211 is not set --# CONFIG_IWLWIFI_LEDS is not set -+CONFIG_WLAN=y -+# CONFIG_LIBERTAS_THINFIRM is not set -+CONFIG_AT76C50X_USB=m -+CONFIG_USB_ZD1201=m -+CONFIG_USB_NET_RNDIS_WLAN=m -+CONFIG_RTL8187=m -+CONFIG_RTL8187_LEDS=y -+# CONFIG_MAC80211_HWSIM is not set -+# CONFIG_ATH_COMMON is not set -+CONFIG_B43=m -+# CONFIG_B43_SDIO is not set -+CONFIG_B43_PHY_LP=y -+CONFIG_B43_LEDS=y -+CONFIG_B43_HWRNG=y -+# CONFIG_B43_DEBUG is not set -+# CONFIG_B43LEGACY is not set -+CONFIG_HOSTAP=m -+CONFIG_HOSTAP_FIRMWARE=y -+CONFIG_HOSTAP_FIRMWARE_NVRAM=y -+# CONFIG_IWM is not set -+CONFIG_LIBERTAS=m -+CONFIG_LIBERTAS_USB=m -+# CONFIG_LIBERTAS_SDIO is not set -+# CONFIG_LIBERTAS_SPI is not set -+# CONFIG_LIBERTAS_DEBUG is not set -+CONFIG_P54_COMMON=m -+CONFIG_P54_USB=m -+# CONFIG_P54_SPI is not set -+CONFIG_P54_LEDS=y -+CONFIG_RT2X00=m -+CONFIG_RT2500USB=m -+CONFIG_RT73USB=m -+# CONFIG_RT2800USB is not set -+CONFIG_RT2X00_LIB_USB=m -+CONFIG_RT2X00_LIB=m -+CONFIG_RT2X00_LIB_FIRMWARE=y -+CONFIG_RT2X00_LIB_CRYPTO=y -+CONFIG_RT2X00_LIB_LEDS=y -+# CONFIG_RT2X00_DEBUG is not set -+CONFIG_WL12XX=m -+CONFIG_WL1251=m -+CONFIG_WL1251_SPI=m -+CONFIG_WL1251_SDIO=m -+CONFIG_WL1271=m -+CONFIG_ZD1211RW=m -+# CONFIG_ZD1211RW_DEBUG is not set -+ -+# -+# WiMAX Wireless Broadband devices -+# -+CONFIG_WIMAX_I2400M=m -+CONFIG_WIMAX_I2400M_USB=m -+CONFIG_WIMAX_I2400M_SDIO=m -+CONFIG_WIMAX_IWMC3200_SDIO=y -+CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - - # - # USB Network Adapters - # --# CONFIG_USB_CATC is not set --# CONFIG_USB_KAWETH is not set --# CONFIG_USB_PEGASUS is not set --# CONFIG_USB_RTL8150 is not set --# CONFIG_USB_USBNET is not set -+CONFIG_USB_CATC=y -+CONFIG_USB_KAWETH=y -+CONFIG_USB_PEGASUS=y -+CONFIG_USB_RTL8150=y -+CONFIG_USB_USBNET=y -+CONFIG_USB_NET_AX8817X=y -+CONFIG_USB_NET_CDCETHER=y -+CONFIG_USB_NET_CDC_EEM=y -+CONFIG_USB_NET_DM9601=y -+CONFIG_USB_NET_SMSC95XX=y -+CONFIG_USB_NET_GL620A=y -+CONFIG_USB_NET_NET1080=y -+CONFIG_USB_NET_PLUSB=y -+CONFIG_USB_NET_MCS7830=y -+CONFIG_USB_NET_RNDIS_HOST=y -+CONFIG_USB_NET_CDC_SUBSET=y -+CONFIG_USB_ALI_M5632=y -+CONFIG_USB_AN2720=y -+CONFIG_USB_BELKIN=y -+CONFIG_USB_ARMLINUX=y -+CONFIG_USB_EPSON2888=y -+CONFIG_USB_KC2190=y -+CONFIG_USB_NET_ZAURUS=y -+CONFIG_USB_HSO=m -+CONFIG_USB_NET_INT51X1=m - # CONFIG_WAN is not set --# CONFIG_PPP is not set -+CONFIG_ATM_DRIVERS=y -+# CONFIG_ATM_DUMMY is not set -+# CONFIG_ATM_TCP is not set -+CONFIG_PPP=m -+CONFIG_PPP_MULTILINK=y -+CONFIG_PPP_FILTER=y -+CONFIG_PPP_ASYNC=m -+CONFIG_PPP_SYNC_TTY=m -+CONFIG_PPP_DEFLATE=m -+CONFIG_PPP_BSDCOMP=m -+CONFIG_PPP_MPPE=m -+CONFIG_PPPOE=m -+# CONFIG_PPPOATM is not set -+CONFIG_PPPOL2TP=m - # CONFIG_SLIP is not set --# CONFIG_NETCONSOLE is not set --# CONFIG_NETPOLL is not set --# CONFIG_NET_POLL_CONTROLLER is not set -+CONFIG_SLHC=m -+CONFIG_NETCONSOLE=m -+CONFIG_NETCONSOLE_DYNAMIC=y -+CONFIG_NETPOLL=y -+CONFIG_NETPOLL_TRAP=y -+CONFIG_NET_POLL_CONTROLLER=y - # CONFIG_ISDN is not set -+# CONFIG_PHONE is not set - - # - # Input device support - # - CONFIG_INPUT=y --# CONFIG_INPUT_FF_MEMLESS is not set --# CONFIG_INPUT_POLLDEV is not set -+CONFIG_INPUT_FF_MEMLESS=y -+CONFIG_INPUT_POLLDEV=y -+# CONFIG_INPUT_SPARSEKMAP is not set - - # - # Userland interfaces - # --# CONFIG_INPUT_MOUSEDEV is not set -+CONFIG_INPUT_MOUSEDEV=y -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 - # CONFIG_INPUT_JOYDEV is not set --# CONFIG_INPUT_EVDEV is not set -+CONFIG_INPUT_EVDEV=y - # CONFIG_INPUT_EVBUG is not set - - # - # Input Device Drivers - # --# CONFIG_INPUT_KEYBOARD is not set --# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ADP5588 is not set -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_QT2160 is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+# CONFIG_KEYBOARD_TCA6416 is not set -+# CONFIG_KEYBOARD_MATRIX is not set -+# CONFIG_KEYBOARD_LM8323 is not set -+# CONFIG_KEYBOARD_MAX7359 is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_OPENCORES is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_TWL4030 is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+CONFIG_INPUT_MOUSE=y -+CONFIG_MOUSE_PS2=y -+CONFIG_MOUSE_PS2_ALPS=y -+CONFIG_MOUSE_PS2_LOGIPS2PP=y -+CONFIG_MOUSE_PS2_SYNAPTICS=y -+CONFIG_MOUSE_PS2_TRACKPOINT=y -+# CONFIG_MOUSE_PS2_ELANTECH is not set -+# CONFIG_MOUSE_PS2_SENTELIC is not set -+# CONFIG_MOUSE_PS2_TOUCHKIT is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_APPLETOUCH is not set -+# CONFIG_MOUSE_BCM5974 is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+# CONFIG_MOUSE_GPIO is not set -+# CONFIG_MOUSE_SYNAPTICS_I2C is not set - # CONFIG_INPUT_JOYSTICK is not set - # CONFIG_INPUT_TABLET is not set - # CONFIG_INPUT_TOUCHSCREEN is not set --# CONFIG_INPUT_MISC is not set -+CONFIG_INPUT_MISC=y -+# CONFIG_INPUT_ATI_REMOTE is not set -+# CONFIG_INPUT_ATI_REMOTE2 is not set -+# CONFIG_INPUT_KEYSPAN_REMOTE is not set -+# CONFIG_INPUT_POWERMATE is not set -+# CONFIG_INPUT_YEALINK is not set -+# CONFIG_INPUT_CM109 is not set -+CONFIG_INPUT_TWL4030_PWRBUTTON=y -+CONFIG_INPUT_UINPUT=y -+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set - - # - # Hardware I/O ports - # --# CONFIG_SERIO is not set -+CONFIG_SERIO=y -+CONFIG_SERIO_SERPORT=y -+CONFIG_SERIO_LIBPS2=y -+# CONFIG_SERIO_RAW is not set -+# CONFIG_SERIO_ALTERA_PS2 is not set - # CONFIG_GAMEPORT is not set - - # -@@ -630,7 +1377,7 @@ CONFIG_VT=y - CONFIG_CONSOLE_TRANSLATIONS=y - CONFIG_VT_CONSOLE=y - CONFIG_HW_CONSOLE=y --# CONFIG_VT_HW_CONSOLE_BINDING is not set -+CONFIG_VT_HW_CONSOLE_BINDING=y - CONFIG_DEVKMEM=y - # CONFIG_SERIAL_NONSTANDARD is not set - -@@ -650,18 +1397,21 @@ CONFIG_SERIAL_8250_RSA=y - # - # Non-8250 serial port support - # -+# CONFIG_SERIAL_MAX3100 is not set - CONFIG_SERIAL_CORE=y - CONFIG_SERIAL_CORE_CONSOLE=y - CONFIG_UNIX98_PTYS=y -+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set - # CONFIG_LEGACY_PTYS is not set - # CONFIG_IPMI_HANDLER is not set - CONFIG_HW_RANDOM=y --# CONFIG_NVRAM is not set -+# CONFIG_HW_RANDOM_TIMERIOMEM is not set - # CONFIG_R3964 is not set - # CONFIG_RAW_DRIVER is not set - # CONFIG_TCG_TPM is not set - CONFIG_I2C=y - CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_COMPAT=y - CONFIG_I2C_CHARDEV=y - CONFIG_I2C_HELPER_AUTO=y - -@@ -672,6 +1422,7 @@ CONFIG_I2C_HELPER_AUTO=y - # - # I2C system bus drivers (mostly embedded / system-on-chip) - # -+# CONFIG_I2C_DESIGNWARE is not set - # CONFIG_I2C_GPIO is not set - # CONFIG_I2C_OCORES is not set - CONFIG_I2C_OMAP=y -@@ -693,26 +1444,41 @@ CONFIG_I2C_OMAP=y - # - # Miscellaneous I2C Chip support - # --# CONFIG_DS1682 is not set --# CONFIG_EEPROM_AT24 is not set --# CONFIG_EEPROM_LEGACY is not set --# CONFIG_SENSORS_PCF8574 is not set --# CONFIG_PCF8575 is not set --# CONFIG_SENSORS_PCA9539 is not set --# CONFIG_SENSORS_PCF8591 is not set --# CONFIG_ISP1301_OMAP is not set --# CONFIG_TPS65010 is not set --# CONFIG_SENSORS_MAX6875 is not set - # CONFIG_SENSORS_TSL2550 is not set - # CONFIG_I2C_DEBUG_CORE is not set - # CONFIG_I2C_DEBUG_ALGO is not set - # CONFIG_I2C_DEBUG_BUS is not set - # CONFIG_I2C_DEBUG_CHIP is not set --# CONFIG_SPI is not set -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+# CONFIG_SPI_BITBANG is not set -+# CONFIG_SPI_GPIO is not set -+CONFIG_SPI_OMAP24XX=y -+# CONFIG_SPI_XILINX is not set -+ -+# -+# SPI Protocol Masters -+# -+CONFIG_SPI_SPIDEV=y -+# CONFIG_SPI_TLE62X0 is not set -+ -+# -+# PPS support -+# -+# CONFIG_PPS is not set - CONFIG_ARCH_REQUIRE_GPIOLIB=y - CONFIG_GPIOLIB=y - # CONFIG_DEBUG_GPIO is not set --# CONFIG_GPIO_SYSFS is not set -+CONFIG_GPIO_SYSFS=y -+ -+# -+# Memory mapped GPIO expanders: -+# - - # - # I2C GPIO expanders: -@@ -729,49 +1495,469 @@ CONFIG_GPIO_TWL4030=y - # - # SPI GPIO expanders: - # -+# CONFIG_GPIO_MAX7301 is not set -+# CONFIG_GPIO_MCP23S08 is not set -+# CONFIG_GPIO_MC33880 is not set -+ -+# -+# AC97 GPIO expanders: -+# - # CONFIG_W1 is not set --# CONFIG_POWER_SUPPLY is not set --# CONFIG_HWMON is not set --# CONFIG_THERMAL is not set --# CONFIG_THERMAL_HWMON is not set --# CONFIG_WATCHDOG is not set -+CONFIG_POWER_SUPPLY=m -+# CONFIG_POWER_SUPPLY_DEBUG is not set -+# CONFIG_PDA_POWER is not set -+# CONFIG_BATTERY_DS2760 is not set -+# CONFIG_BATTERY_DS2782 is not set -+# CONFIG_BATTERY_BQ27x00 is not set -+# CONFIG_BATTERY_MAX17040 is not set -+CONFIG_HWMON=y -+# CONFIG_HWMON_VID is not set -+# CONFIG_HWMON_DEBUG_CHIP is not set -+ -+# -+# Native drivers -+# -+# CONFIG_SENSORS_AD7414 is not set -+# CONFIG_SENSORS_AD7418 is not set -+# CONFIG_SENSORS_ADCXX is not set -+# CONFIG_SENSORS_ADM1021 is not set -+# CONFIG_SENSORS_ADM1025 is not set -+# CONFIG_SENSORS_ADM1026 is not set -+# CONFIG_SENSORS_ADM1029 is not set -+# CONFIG_SENSORS_ADM1031 is not set -+# CONFIG_SENSORS_ADM9240 is not set -+# CONFIG_SENSORS_ADT7462 is not set -+# CONFIG_SENSORS_ADT7470 is not set -+# CONFIG_SENSORS_ADT7473 is not set -+# CONFIG_SENSORS_ADT7475 is not set -+# CONFIG_SENSORS_ATXP1 is not set -+# CONFIG_SENSORS_DS1621 is not set -+# CONFIG_SENSORS_F71805F is not set -+# CONFIG_SENSORS_F71882FG is not set -+# CONFIG_SENSORS_F75375S is not set -+# CONFIG_SENSORS_G760A is not set -+# CONFIG_SENSORS_GL518SM is not set -+# CONFIG_SENSORS_GL520SM is not set -+# CONFIG_SENSORS_IT87 is not set -+# CONFIG_SENSORS_LM63 is not set -+# CONFIG_SENSORS_LM70 is not set -+# CONFIG_SENSORS_LM73 is not set -+# CONFIG_SENSORS_LM75 is not set -+# CONFIG_SENSORS_LM77 is not set -+# CONFIG_SENSORS_LM78 is not set -+# CONFIG_SENSORS_LM80 is not set -+# CONFIG_SENSORS_LM83 is not set -+# CONFIG_SENSORS_LM85 is not set -+# CONFIG_SENSORS_LM87 is not set -+# CONFIG_SENSORS_LM90 is not set -+# CONFIG_SENSORS_LM92 is not set -+# CONFIG_SENSORS_LM93 is not set -+# CONFIG_SENSORS_LTC4215 is not set -+# CONFIG_SENSORS_LTC4245 is not set -+# CONFIG_SENSORS_LM95241 is not set -+# CONFIG_SENSORS_MAX1111 is not set -+# CONFIG_SENSORS_MAX1619 is not set -+# CONFIG_SENSORS_MAX6650 is not set -+# CONFIG_SENSORS_PC87360 is not set -+# CONFIG_SENSORS_PC87427 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_SHT15 is not set -+# CONFIG_SENSORS_DME1737 is not set -+# CONFIG_SENSORS_SMSC47M1 is not set -+# CONFIG_SENSORS_SMSC47M192 is not set -+# CONFIG_SENSORS_SMSC47B397 is not set -+# CONFIG_SENSORS_ADS7828 is not set -+# CONFIG_SENSORS_THMC50 is not set -+# CONFIG_SENSORS_TMP401 is not set -+# CONFIG_SENSORS_TMP421 is not set -+# CONFIG_SENSORS_VT1211 is not set -+# CONFIG_SENSORS_W83781D is not set -+# CONFIG_SENSORS_W83791D is not set -+# CONFIG_SENSORS_W83792D is not set -+# CONFIG_SENSORS_W83793 is not set -+# CONFIG_SENSORS_W83L785TS is not set -+# CONFIG_SENSORS_W83L786NG is not set -+# CONFIG_SENSORS_W83627HF is not set -+# CONFIG_SENSORS_W83627EHF is not set -+# CONFIG_SENSORS_LIS3_SPI is not set -+CONFIG_THERMAL=y -+CONFIG_THERMAL_HWMON=y -+CONFIG_WATCHDOG=y -+CONFIG_WATCHDOG_NOWAYOUT=y -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_OMAP_WATCHDOG=y -+# CONFIG_TWL4030_WATCHDOG is not set -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+CONFIG_SSB_POSSIBLE=y - - # - # Sonics Silicon Backplane - # --CONFIG_SSB_POSSIBLE=y --# CONFIG_SSB is not set -+CONFIG_SSB=y -+CONFIG_SSB_SDIOHOST_POSSIBLE=y -+# CONFIG_SSB_SDIOHOST is not set -+# CONFIG_SSB_SILENT is not set -+# CONFIG_SSB_DEBUG is not set - - # - # Multifunction device drivers - # --# CONFIG_MFD_CORE is not set -+CONFIG_MFD_CORE=y - # CONFIG_MFD_SM501 is not set -+# CONFIG_MFD_ASIC3 is not set - # CONFIG_HTC_EGPIO is not set - # CONFIG_HTC_PASIC3 is not set -+# CONFIG_TPS65010 is not set - CONFIG_TWL4030_CORE=y --# CONFIG_UCB1400_CORE is not set -+CONFIG_TWL4030_POWER=y -+CONFIG_TWL4030_CODEC=y -+# CONFIG_TWL4030_MADC is not set - # CONFIG_MFD_TMIO is not set - # CONFIG_MFD_T7L66XB is not set - # CONFIG_MFD_TC6387XB is not set - # CONFIG_MFD_TC6393XB is not set -- --# --# Multimedia devices --# -+# CONFIG_PMIC_DA903X is not set -+# CONFIG_PMIC_ADP5520 is not set -+# CONFIG_MFD_WM8400 is not set -+# CONFIG_MFD_WM831X is not set -+# CONFIG_MFD_WM8350_I2C is not set -+# CONFIG_MFD_PCF50633 is not set -+# CONFIG_MFD_MC13783 is not set -+# CONFIG_AB3100_CORE is not set -+# CONFIG_EZX_PCAP is not set -+# CONFIG_MFD_88PM8607 is not set -+# CONFIG_AB4500_CORE is not set -+CONFIG_REGULATOR=y -+# CONFIG_REGULATOR_DEBUG is not set -+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -+# CONFIG_REGULATOR_BQ24022 is not set -+# CONFIG_REGULATOR_MAX1586 is not set -+CONFIG_REGULATOR_TWL4030=y -+# CONFIG_REGULATOR_LP3971 is not set -+# CONFIG_REGULATOR_TPS65023 is not set -+# CONFIG_REGULATOR_TPS6507X is not set -+CONFIG_MEDIA_SUPPORT=y - - # - # Multimedia core support - # --# CONFIG_VIDEO_DEV is not set --# CONFIG_DVB_CORE is not set --# CONFIG_VIDEO_MEDIA is not set -+CONFIG_VIDEO_DEV=y -+CONFIG_VIDEO_V4L2_COMMON=y -+CONFIG_VIDEO_ALLOW_V4L1=y -+CONFIG_VIDEO_V4L1_COMPAT=y -+CONFIG_DVB_CORE=m -+CONFIG_VIDEO_MEDIA=m - - # - # Multimedia drivers - # --CONFIG_DAB=y --# CONFIG_USB_DABUSB is not set -+CONFIG_MEDIA_ATTACH=y -+CONFIG_MEDIA_TUNER=m -+CONFIG_MEDIA_TUNER_CUSTOMISE=y -+CONFIG_MEDIA_TUNER_SIMPLE=m -+CONFIG_MEDIA_TUNER_TDA8290=m -+CONFIG_MEDIA_TUNER_TDA827X=m -+CONFIG_MEDIA_TUNER_TDA18271=m -+CONFIG_MEDIA_TUNER_TDA9887=m -+CONFIG_MEDIA_TUNER_TEA5761=m -+CONFIG_MEDIA_TUNER_TEA5767=m -+CONFIG_MEDIA_TUNER_MT20XX=m -+CONFIG_MEDIA_TUNER_MT2060=m -+CONFIG_MEDIA_TUNER_MT2266=m -+CONFIG_MEDIA_TUNER_MT2131=m -+CONFIG_MEDIA_TUNER_QT1010=m -+CONFIG_MEDIA_TUNER_XC2028=m -+CONFIG_MEDIA_TUNER_XC5000=m -+CONFIG_MEDIA_TUNER_MXL5005S=m -+CONFIG_MEDIA_TUNER_MXL5007T=m -+CONFIG_MEDIA_TUNER_MC44S803=m -+CONFIG_MEDIA_TUNER_MAX2165=m -+CONFIG_VIDEO_V4L2=y -+CONFIG_VIDEO_V4L1=y -+CONFIG_VIDEOBUF_GEN=y -+CONFIG_VIDEOBUF_DMA_SG=y -+CONFIG_VIDEOBUF_VMALLOC=m -+CONFIG_VIDEOBUF_DMA_CONTIG=y -+CONFIG_VIDEOBUF_DVB=m -+CONFIG_VIDEO_IR=m -+CONFIG_VIDEO_TVEEPROM=m -+CONFIG_VIDEO_TUNER=m -+CONFIG_VIDEO_CAPTURE_DRIVERS=y -+# CONFIG_VIDEO_ADV_DEBUG is not set -+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -+CONFIG_VIDEO_IR_I2C=m -+ -+# -+# Encoders/decoders and other helper chips -+# -+ -+# -+# Audio decoders -+# -+# CONFIG_VIDEO_TVAUDIO is not set -+# CONFIG_VIDEO_TDA7432 is not set -+# CONFIG_VIDEO_TDA9840 is not set -+# CONFIG_VIDEO_TDA9875 is not set -+# CONFIG_VIDEO_TEA6415C is not set -+# CONFIG_VIDEO_TEA6420 is not set -+CONFIG_VIDEO_MSP3400=m -+# CONFIG_VIDEO_CS5345 is not set -+CONFIG_VIDEO_CS53L32A=m -+# CONFIG_VIDEO_M52790 is not set -+# CONFIG_VIDEO_TLV320AIC23B is not set -+CONFIG_VIDEO_WM8775=m -+# CONFIG_VIDEO_WM8739 is not set -+# CONFIG_VIDEO_VP27SMPX is not set -+ -+# -+# RDS decoders -+# -+# CONFIG_VIDEO_SAA6588 is not set -+ -+# -+# Video decoders -+# -+# CONFIG_VIDEO_ADV7180 is not set -+# CONFIG_VIDEO_BT819 is not set -+# CONFIG_VIDEO_BT856 is not set -+# CONFIG_VIDEO_BT866 is not set -+# CONFIG_VIDEO_KS0127 is not set -+# CONFIG_VIDEO_OV7670 is not set -+CONFIG_VIDEO_MT9V011=m -+# CONFIG_VIDEO_TCM825X is not set -+CONFIG_VIDEO_MT9P012=m -+# CONFIG_VIDEO_MT9T111 is not set -+# CONFIG_VIDEO_DW9710 is not set -+# CONFIG_VIDEO_OV3640 is not set -+# CONFIG_VIDEO_IMX046 is not set -+# CONFIG_VIDEO_LV8093 is not set -+# CONFIG_VIDEO_SAA7110 is not set -+CONFIG_VIDEO_SAA711X=m -+# CONFIG_VIDEO_SAA717X is not set -+# CONFIG_VIDEO_SAA7191 is not set -+# CONFIG_VIDEO_TVP514X is not set -+# CONFIG_VIDEO_TVP5150 is not set -+# CONFIG_VIDEO_VPX3220 is not set -+ -+# -+# Video and audio decoders -+# -+CONFIG_VIDEO_CX25840=m -+ -+# -+# MPEG video encoders -+# -+CONFIG_VIDEO_CX2341X=m -+ -+# -+# Video encoders -+# -+# CONFIG_VIDEO_SAA7127 is not set -+# CONFIG_VIDEO_SAA7185 is not set -+# CONFIG_VIDEO_ADV7170 is not set -+# CONFIG_VIDEO_ADV7175 is not set -+# CONFIG_VIDEO_THS7303 is not set -+# CONFIG_VIDEO_ADV7343 is not set -+ -+# -+# Video improvement chips -+# -+# CONFIG_VIDEO_UPD64031A is not set -+# CONFIG_VIDEO_UPD64083 is not set -+CONFIG_VIDEO_VIVI=m -+# CONFIG_VIDEO_CPIA is not set -+# CONFIG_VIDEO_CPIA2 is not set -+# CONFIG_VIDEO_SAA5246A is not set -+# CONFIG_VIDEO_SAA5249 is not set -+# CONFIG_VIDEO_AU0828 is not set -+CONFIG_TI_MEDIA=y -+CONFIG_VIDEO_VPSS_SYSTEM=y -+CONFIG_VIDEO_VPFE_CAPTURE=y -+# CONFIG_VIDEO_DM6446_CCDC is not set -+# CONFIG_VIDEO_DM355_CCDC is not set -+CONFIG_VIDEO_OMAP2_VOUT=y -+CONFIG_VIDEO_OMAP3=y -+CONFIG_VIDEO_OMAP3_ISP=y -+CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER=y -+CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -+# CONFIG_SOC_CAMERA is not set -+CONFIG_V4L_USB_DRIVERS=y -+CONFIG_USB_VIDEO_CLASS=m -+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -+CONFIG_USB_GSPCA=m -+CONFIG_USB_M5602=m -+CONFIG_USB_STV06XX=m -+# CONFIG_USB_GL860 is not set -+CONFIG_USB_GSPCA_CONEX=m -+CONFIG_USB_GSPCA_ETOMS=m -+CONFIG_USB_GSPCA_FINEPIX=m -+# CONFIG_USB_GSPCA_JEILINJ is not set -+CONFIG_USB_GSPCA_MARS=m -+# CONFIG_USB_GSPCA_MR97310A is not set -+CONFIG_USB_GSPCA_OV519=m -+CONFIG_USB_GSPCA_OV534=m -+CONFIG_USB_GSPCA_PAC207=m -+# CONFIG_USB_GSPCA_PAC7302 is not set -+CONFIG_USB_GSPCA_PAC7311=m -+# CONFIG_USB_GSPCA_SN9C20X is not set -+CONFIG_USB_GSPCA_SONIXB=m -+CONFIG_USB_GSPCA_SONIXJ=m -+CONFIG_USB_GSPCA_SPCA500=m -+CONFIG_USB_GSPCA_SPCA501=m -+CONFIG_USB_GSPCA_SPCA505=m -+CONFIG_USB_GSPCA_SPCA506=m -+CONFIG_USB_GSPCA_SPCA508=m -+CONFIG_USB_GSPCA_SPCA561=m -+# CONFIG_USB_GSPCA_SQ905 is not set -+# CONFIG_USB_GSPCA_SQ905C is not set -+CONFIG_USB_GSPCA_STK014=m -+# CONFIG_USB_GSPCA_STV0680 is not set -+CONFIG_USB_GSPCA_SUNPLUS=m -+CONFIG_USB_GSPCA_T613=m -+CONFIG_USB_GSPCA_TV8532=m -+CONFIG_USB_GSPCA_VC032X=m -+CONFIG_USB_GSPCA_ZC3XX=m -+CONFIG_VIDEO_PVRUSB2=m -+CONFIG_VIDEO_PVRUSB2_SYSFS=y -+CONFIG_VIDEO_PVRUSB2_DVB=y -+# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -+CONFIG_VIDEO_HDPVR=m -+CONFIG_VIDEO_EM28XX=m -+CONFIG_VIDEO_EM28XX_ALSA=m -+CONFIG_VIDEO_EM28XX_DVB=m -+CONFIG_VIDEO_CX231XX=m -+# CONFIG_VIDEO_CX231XX_ALSA is not set -+CONFIG_VIDEO_CX231XX_DVB=m -+CONFIG_VIDEO_USBVISION=m -+CONFIG_VIDEO_USBVIDEO=m -+CONFIG_USB_VICAM=m -+CONFIG_USB_IBMCAM=m -+CONFIG_USB_KONICAWC=m -+CONFIG_USB_QUICKCAM_MESSENGER=m -+CONFIG_USB_ET61X251=m -+CONFIG_VIDEO_OVCAMCHIP=m -+CONFIG_USB_W9968CF=m -+CONFIG_USB_OV511=m -+CONFIG_USB_SE401=m -+CONFIG_USB_SN9C102=m -+CONFIG_USB_STV680=m -+CONFIG_USB_ZC0301=m -+CONFIG_USB_PWC=m -+# CONFIG_USB_PWC_DEBUG is not set -+CONFIG_USB_PWC_INPUT_EVDEV=y -+CONFIG_USB_ZR364XX=m -+CONFIG_USB_STKWEBCAM=m -+CONFIG_USB_S2255=m -+CONFIG_RADIO_ADAPTERS=y -+# CONFIG_I2C_SI4713 is not set -+# CONFIG_RADIO_SI4713 is not set -+# CONFIG_USB_DSBR is not set -+# CONFIG_RADIO_SI470X is not set -+# CONFIG_USB_MR800 is not set -+# CONFIG_RADIO_TEA5764 is not set -+# CONFIG_RADIO_TEF6862 is not set -+CONFIG_DVB_MAX_ADAPTERS=8 -+CONFIG_DVB_DYNAMIC_MINORS=y -+CONFIG_DVB_CAPTURE_DRIVERS=y -+# CONFIG_TTPCI_EEPROM is not set -+ -+# -+# Supported USB Adapters -+# -+CONFIG_DVB_USB=m -+# CONFIG_DVB_USB_DEBUG is not set -+CONFIG_DVB_USB_A800=m -+CONFIG_DVB_USB_DIBUSB_MB=m -+# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -+CONFIG_DVB_USB_DIBUSB_MC=m -+CONFIG_DVB_USB_DIB0700=m -+CONFIG_DVB_USB_UMT_010=m -+CONFIG_DVB_USB_CXUSB=m -+CONFIG_DVB_USB_M920X=m -+CONFIG_DVB_USB_GL861=m -+CONFIG_DVB_USB_AU6610=m -+CONFIG_DVB_USB_DIGITV=m -+CONFIG_DVB_USB_VP7045=m -+CONFIG_DVB_USB_VP702X=m -+CONFIG_DVB_USB_GP8PSK=m -+CONFIG_DVB_USB_NOVA_T_USB2=m -+CONFIG_DVB_USB_TTUSB2=m -+CONFIG_DVB_USB_DTT200U=m -+CONFIG_DVB_USB_OPERA1=m -+CONFIG_DVB_USB_AF9005=m -+CONFIG_DVB_USB_AF9005_REMOTE=m -+CONFIG_DVB_USB_DW2102=m -+CONFIG_DVB_USB_CINERGY_T2=m -+CONFIG_DVB_USB_ANYSEE=m -+CONFIG_DVB_USB_DTV5100=m -+CONFIG_DVB_USB_AF9015=m -+# CONFIG_DVB_USB_CE6230 is not set -+# CONFIG_DVB_USB_FRIIO is not set -+# CONFIG_DVB_USB_EC168 is not set -+# CONFIG_SMS_SIANO_MDTV is not set -+ -+# -+# Supported FlexCopII (B2C2) Adapters -+# -+CONFIG_DVB_B2C2_FLEXCOP=m -+CONFIG_DVB_B2C2_FLEXCOP_USB=m -+# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set -+ -+# -+# Supported DVB Frontends -+# -+# CONFIG_DVB_FE_CUSTOMISE is not set -+CONFIG_DVB_CX24123=m -+CONFIG_DVB_MT312=m -+CONFIG_DVB_ZL10039=m -+CONFIG_DVB_S5H1420=m -+CONFIG_DVB_STV0288=m -+CONFIG_DVB_STB6000=m -+CONFIG_DVB_STV0299=m -+CONFIG_DVB_TDA10086=m -+CONFIG_DVB_TUNER_ITD1000=m -+CONFIG_DVB_TUNER_CX24113=m -+CONFIG_DVB_TDA826X=m -+CONFIG_DVB_CX24116=m -+CONFIG_DVB_SI21XX=m -+CONFIG_DVB_CX22702=m -+CONFIG_DVB_TDA1004X=m -+CONFIG_DVB_NXT6000=m -+CONFIG_DVB_MT352=m -+CONFIG_DVB_ZL10353=m -+CONFIG_DVB_DIB3000MB=m -+CONFIG_DVB_DIB3000MC=m -+CONFIG_DVB_DIB7000M=m -+CONFIG_DVB_DIB7000P=m -+CONFIG_DVB_TDA10048=m -+CONFIG_DVB_AF9013=m -+CONFIG_DVB_TDA10021=m -+CONFIG_DVB_TDA10023=m -+CONFIG_DVB_STV0297=m -+CONFIG_DVB_NXT200X=m -+CONFIG_DVB_BCM3510=m -+CONFIG_DVB_LGDT330X=m -+CONFIG_DVB_LGDT3305=m -+CONFIG_DVB_S5H1409=m -+CONFIG_DVB_S5H1411=m -+CONFIG_DVB_DIB8000=m -+CONFIG_DVB_PLL=m -+CONFIG_DVB_TUNER_DIB0070=m -+CONFIG_DVB_LNBP21=m -+CONFIG_DVB_ISL6421=m -+CONFIG_DVB_LGS8GL5=m -+# CONFIG_DAB is not set - - # - # Graphics support -@@ -781,6 +1967,7 @@ CONFIG_DAB=y - CONFIG_FB=y - # CONFIG_FIRMWARE_EDID is not set - # CONFIG_FB_DDC is not set -+# CONFIG_FB_BOOT_VESA_SUPPORT is not set - CONFIG_FB_CFB_FILLRECT=y - CONFIG_FB_CFB_COPYAREA=y - CONFIG_FB_CFB_IMAGEBLIT=y -@@ -793,24 +1980,57 @@ CONFIG_FB_CFB_IMAGEBLIT=y - # CONFIG_FB_SVGALIB is not set - # CONFIG_FB_MACMODES is not set - # CONFIG_FB_BACKLIGHT is not set --# CONFIG_FB_MODE_HELPERS is not set -+CONFIG_FB_MODE_HELPERS=y - # CONFIG_FB_TILEBLITTING is not set - - # - # Frame buffer hardware drivers - # - # CONFIG_FB_S1D13XXX is not set -+# CONFIG_FB_TMIO is not set - # CONFIG_FB_VIRTUAL is not set --CONFIG_FB_OMAP=y --# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set -+# CONFIG_FB_METRONOME is not set -+# CONFIG_FB_MB862XX is not set -+# CONFIG_FB_BROADSHEET is not set - # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set --CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2 -+CONFIG_OMAP2_VRAM=y -+CONFIG_OMAP2_VRFB=y -+CONFIG_OMAP2_DSS=y -+CONFIG_OMAP2_VRAM_SIZE=14 -+CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -+# CONFIG_OMAP2_DSS_RFBI is not set -+CONFIG_OMAP2_DSS_VENC=y -+CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -+# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -+# CONFIG_OMAP2_DSS_SDI is not set -+CONFIG_OMAP2_DSS_DSI=y -+CONFIG_OMAP2_DSS_USE_DSI_PLL=y -+# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -+CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -+CONFIG_FB_OMAP2=y -+CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -+# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -+CONFIG_FB_OMAP2_NUM_FBS=3 -+ -+# -+# OMAP2/3 Display Device Drivers -+# -+CONFIG_PANEL_GENERIC=y -+# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -+# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -+CONFIG_PANEL_SHARP_LS037V7DW01=y -+# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -+# CONFIG_PANEL_TAAL is not set - # CONFIG_BACKLIGHT_LCD_SUPPORT is not set - - # - # Display device support - # --# CONFIG_DISPLAY_SUPPORT is not set -+CONFIG_DISPLAY_SUPPORT=y -+ -+# -+# Display hardware drivers -+# - - # - # Console display driver support -@@ -820,31 +2040,113 @@ CONFIG_DUMMY_CONSOLE=y - CONFIG_FRAMEBUFFER_CONSOLE=y - # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set - CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y --CONFIG_FONTS=y -+# CONFIG_FONTS is not set - CONFIG_FONT_8x8=y - CONFIG_FONT_8x16=y --# CONFIG_FONT_6x11 is not set --# CONFIG_FONT_7x14 is not set --# CONFIG_FONT_PEARL_8x8 is not set --# CONFIG_FONT_ACORN_8x8 is not set --# CONFIG_FONT_MINI_4x6 is not set --# CONFIG_FONT_SUN8x16 is not set --# CONFIG_FONT_SUN12x22 is not set --# CONFIG_FONT_10x18 is not set --# CONFIG_LOGO is not set -- --# --# Sound --# --# CONFIG_SOUND is not set --# CONFIG_HID_SUPPORT is not set -+CONFIG_LOGO=y -+# CONFIG_LOGO_LINUX_MONO is not set -+# CONFIG_LOGO_LINUX_VGA16 is not set -+CONFIG_LOGO_LINUX_CLUT224=y -+CONFIG_SOUND=y -+CONFIG_SOUND_OSS_CORE=y -+CONFIG_SOUND_OSS_CORE_PRECLAIM=y -+CONFIG_SND=y -+CONFIG_SND_TIMER=y -+CONFIG_SND_PCM=y -+CONFIG_SND_HWDEP=y -+CONFIG_SND_RAWMIDI=y -+CONFIG_SND_JACK=y -+CONFIG_SND_SEQUENCER=m -+# CONFIG_SND_SEQ_DUMMY is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=y -+CONFIG_SND_PCM_OSS=y -+CONFIG_SND_PCM_OSS_PLUGINS=y -+CONFIG_SND_SEQUENCER_OSS=y -+CONFIG_SND_HRTIMER=m -+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+CONFIG_SND_SUPPORT_OLD_API=y -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+CONFIG_SND_RAWMIDI_SEQ=m -+# CONFIG_SND_OPL3_LIB_SEQ is not set -+# CONFIG_SND_OPL4_LIB_SEQ is not set -+# CONFIG_SND_SBAWE_SEQ is not set -+# CONFIG_SND_EMU10K1_SEQ is not set -+CONFIG_SND_DRIVERS=y -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_VIRMIDI is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+# CONFIG_SND_ARM is not set -+CONFIG_SND_SPI=y -+CONFIG_SND_USB=y -+CONFIG_SND_USB_AUDIO=y -+CONFIG_SND_USB_CAIAQ=m -+CONFIG_SND_USB_CAIAQ_INPUT=y -+CONFIG_SND_SOC=y -+CONFIG_SND_OMAP_SOC=y -+CONFIG_SND_OMAP_SOC_MCBSP=y -+# CONFIG_SND_OMAP_SOC_OMAP3EVM is not set -+CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -+CONFIG_SND_SOC_I2C_AND_SPI=y -+# CONFIG_SND_SOC_ALL_CODECS is not set -+CONFIG_SND_SOC_TWL4030=y -+# CONFIG_SOUND_PRIME is not set -+CONFIG_HID_SUPPORT=y -+CONFIG_HID=y -+# CONFIG_HIDRAW is not set -+ -+# -+# USB Input Devices -+# -+CONFIG_USB_HID=y -+# CONFIG_HID_PID is not set -+# CONFIG_USB_HIDDEV is not set -+ -+# -+# Special HID drivers -+# -+CONFIG_HID_A4TECH=y -+CONFIG_HID_APPLE=y -+CONFIG_HID_BELKIN=y -+CONFIG_HID_CHERRY=y -+CONFIG_HID_CHICONY=y -+CONFIG_HID_CYPRESS=y -+# CONFIG_HID_DRAGONRISE is not set -+CONFIG_HID_EZKEY=y -+# CONFIG_HID_KYE is not set -+CONFIG_HID_GYRATION=y -+# CONFIG_HID_TWINHAN is not set -+# CONFIG_HID_KENSINGTON is not set -+CONFIG_HID_LOGITECH=y -+# CONFIG_LOGITECH_FF is not set -+# CONFIG_LOGIRUMBLEPAD2_FF is not set -+CONFIG_HID_MICROSOFT=y -+CONFIG_HID_MONTEREY=y -+CONFIG_HID_NTRIG=y -+CONFIG_HID_PANTHERLORD=y -+# CONFIG_PANTHERLORD_FF is not set -+CONFIG_HID_PETALYNX=y -+CONFIG_HID_SAMSUNG=y -+CONFIG_HID_SONY=y -+CONFIG_HID_SUNPLUS=y -+# CONFIG_HID_GREENASIA is not set -+# CONFIG_HID_SMARTJOYPLUS is not set -+CONFIG_HID_TOPSEED=y -+# CONFIG_HID_THRUSTMASTER is not set -+# CONFIG_HID_WACOM is not set -+# CONFIG_HID_ZEROPLUS is not set - CONFIG_USB_SUPPORT=y - CONFIG_USB_ARCH_HAS_HCD=y - CONFIG_USB_ARCH_HAS_OHCI=y - CONFIG_USB_ARCH_HAS_EHCI=y - CONFIG_USB=y - # CONFIG_USB_DEBUG is not set --# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - - # - # Miscellaneous USB options -@@ -857,18 +2159,25 @@ CONFIG_USB_OTG=y - # CONFIG_USB_OTG_WHITELIST is not set - # CONFIG_USB_OTG_BLACKLIST_HUB is not set - CONFIG_USB_MON=y -+# CONFIG_USB_WUSB is not set -+# CONFIG_USB_WUSB_CBAF is not set - - # - # USB Host Controller Drivers - # --CONFIG_USB_EHCI_HCD=y --CONFIG_USB_EHCI_ROOT_HUB_TT=y - # CONFIG_USB_C67X00_HCD is not set -+CONFIG_USB_EHCI_HCD=y -+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -+CONFIG_USB_EHCI_TT_NEWSCHED=y -+# CONFIG_USB_OXU210HP_HCD is not set - # CONFIG_USB_ISP116X_HCD is not set - # CONFIG_USB_ISP1760_HCD is not set -+# CONFIG_USB_ISP1362_HCD is not set - # CONFIG_USB_OHCI_HCD is not set -+# CONFIG_USB_U132_HCD is not set - # CONFIG_USB_SL811_HCD is not set - # CONFIG_USB_R8A66597_HCD is not set -+# CONFIG_USB_HWA_HCD is not set - CONFIG_USB_MUSB_HDRC=y - CONFIG_USB_MUSB_SOC=y - -@@ -882,24 +2191,39 @@ CONFIG_USB_GADGET_MUSB_HDRC=y - CONFIG_USB_MUSB_HDRC_HCD=y - # CONFIG_MUSB_PIO_ONLY is not set - CONFIG_USB_INVENTRA_DMA=y -+CONFIG_MUSB_USE_SYSTEM_DMA_RX=y - # CONFIG_USB_TI_CPPI_DMA is not set -+# CONFIG_USB_TI_CPPI41_DMA is not set - # CONFIG_USB_MUSB_DEBUG is not set - - # - # USB Device Class drivers - # --# CONFIG_USB_ACM is not set --# CONFIG_USB_PRINTER is not set --# CONFIG_USB_WDM is not set -+CONFIG_USB_ACM=m -+CONFIG_USB_PRINTER=m -+CONFIG_USB_WDM=m -+CONFIG_USB_TMC=m - - # --# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may - # - - # --# may also be needed; see USB_STORAGE Help for more information -+# also be needed; see USB_STORAGE Help for more info - # --# CONFIG_USB_STORAGE is not set -+CONFIG_USB_STORAGE=y -+# CONFIG_USB_STORAGE_DEBUG is not set -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_ISD200 is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_ONETOUCH is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set - # CONFIG_USB_LIBUSUAL is not set - - # -@@ -911,92 +2235,200 @@ CONFIG_USB_INVENTRA_DMA=y - # - # USB port drivers - # --# CONFIG_USB_SERIAL is not set -+CONFIG_USB_SERIAL=m -+CONFIG_USB_EZUSB=y -+CONFIG_USB_SERIAL_GENERIC=y -+CONFIG_USB_SERIAL_AIRCABLE=m -+CONFIG_USB_SERIAL_ARK3116=m -+CONFIG_USB_SERIAL_BELKIN=m -+CONFIG_USB_SERIAL_CH341=m -+CONFIG_USB_SERIAL_WHITEHEAT=m -+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -+# CONFIG_USB_SERIAL_CP210X is not set -+CONFIG_USB_SERIAL_CYPRESS_M8=m -+CONFIG_USB_SERIAL_EMPEG=m -+CONFIG_USB_SERIAL_FTDI_SIO=m -+CONFIG_USB_SERIAL_FUNSOFT=m -+CONFIG_USB_SERIAL_VISOR=m -+CONFIG_USB_SERIAL_IPAQ=m -+CONFIG_USB_SERIAL_IR=m -+CONFIG_USB_SERIAL_EDGEPORT=m -+CONFIG_USB_SERIAL_EDGEPORT_TI=m -+CONFIG_USB_SERIAL_GARMIN=m -+CONFIG_USB_SERIAL_IPW=m -+CONFIG_USB_SERIAL_IUU=m -+CONFIG_USB_SERIAL_KEYSPAN_PDA=m -+CONFIG_USB_SERIAL_KEYSPAN=m -+CONFIG_USB_SERIAL_KEYSPAN_MPR=y -+CONFIG_USB_SERIAL_KEYSPAN_USA28=y -+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -+CONFIG_USB_SERIAL_KEYSPAN_USA19=y -+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -+CONFIG_USB_SERIAL_KLSI=m -+CONFIG_USB_SERIAL_KOBIL_SCT=m -+CONFIG_USB_SERIAL_MCT_U232=m -+CONFIG_USB_SERIAL_MOS7720=m -+CONFIG_USB_SERIAL_MOS7840=m -+CONFIG_USB_SERIAL_MOTOROLA=m -+CONFIG_USB_SERIAL_NAVMAN=m -+CONFIG_USB_SERIAL_PL2303=m -+CONFIG_USB_SERIAL_OTI6858=m -+# CONFIG_USB_SERIAL_QUALCOMM is not set -+CONFIG_USB_SERIAL_SPCP8X5=m -+CONFIG_USB_SERIAL_HP4X=m -+CONFIG_USB_SERIAL_SAFE=m -+# CONFIG_USB_SERIAL_SAFE_PADDED is not set -+CONFIG_USB_SERIAL_SIEMENS_MPI=m -+CONFIG_USB_SERIAL_SIERRAWIRELESS=m -+# CONFIG_USB_SERIAL_SYMBOL is not set -+CONFIG_USB_SERIAL_TI=m -+CONFIG_USB_SERIAL_CYBERJACK=m -+CONFIG_USB_SERIAL_XIRCOM=m -+CONFIG_USB_SERIAL_OPTION=m -+CONFIG_USB_SERIAL_OMNINET=m -+CONFIG_USB_SERIAL_OPTICON=m -+CONFIG_USB_SERIAL_DEBUG=m - - # - # USB Miscellaneous drivers - # --# CONFIG_USB_EMI62 is not set --# CONFIG_USB_EMI26 is not set -+CONFIG_USB_EMI62=m -+CONFIG_USB_EMI26=m - # CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_SEVSEG is not set - # CONFIG_USB_RIO500 is not set --# CONFIG_USB_LEGOTOWER is not set --# CONFIG_USB_LCD is not set --# CONFIG_USB_BERRY_CHARGE is not set --# CONFIG_USB_LED is not set --# CONFIG_USB_CYPRESS_CY7C63 is not set --# CONFIG_USB_CYTHERM is not set --# CONFIG_USB_PHIDGET is not set --# CONFIG_USB_IDMOUSE is not set --# CONFIG_USB_FTDI_ELAN is not set -+CONFIG_USB_LEGOTOWER=m -+CONFIG_USB_LCD=m -+CONFIG_USB_BERRY_CHARGE=m -+CONFIG_USB_LED=m -+CONFIG_USB_CYPRESS_CY7C63=m -+CONFIG_USB_CYTHERM=m -+CONFIG_USB_IDMOUSE=m -+CONFIG_USB_FTDI_ELAN=m - # CONFIG_USB_APPLEDISPLAY is not set --# CONFIG_USB_LD is not set --# CONFIG_USB_TRANCEVIBRATOR is not set -+CONFIG_USB_SISUSBVGA=m -+CONFIG_USB_SISUSBVGA_CON=y -+CONFIG_USB_LD=m -+CONFIG_USB_TRANCEVIBRATOR=m - # CONFIG_USB_IOWARRIOR is not set --# CONFIG_USB_TEST is not set -+CONFIG_USB_TEST=m - # CONFIG_USB_ISIGHTFW is not set -+CONFIG_USB_VST=m -+CONFIG_USB_ATM=m -+CONFIG_USB_SPEEDTOUCH=m -+CONFIG_USB_CXACRU=m -+CONFIG_USB_UEAGLEATM=m -+CONFIG_USB_XUSBATM=m - CONFIG_USB_GADGET=y - # CONFIG_USB_GADGET_DEBUG is not set - # CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_DEBUG_FS=y -+CONFIG_USB_GADGET_VBUS_DRAW=2 - CONFIG_USB_GADGET_SELECTED=y --# CONFIG_USB_GADGET_AMD5536UDC is not set -+# CONFIG_USB_GADGET_AT91 is not set - # CONFIG_USB_GADGET_ATMEL_USBA is not set - # CONFIG_USB_GADGET_FSL_USB2 is not set --# CONFIG_USB_GADGET_NET2280 is not set --# CONFIG_USB_GADGET_PXA25X is not set --# CONFIG_USB_GADGET_M66592 is not set --# CONFIG_USB_M66592 is not set --# CONFIG_USB_GADGET_PXA27X is not set --# CONFIG_USB_GADGET_GOKU is not set - # CONFIG_USB_GADGET_LH7A40X is not set - # CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_PXA25X is not set -+# CONFIG_USB_GADGET_R8A66597 is not set -+# CONFIG_USB_GADGET_PXA27X is not set -+# CONFIG_USB_GADGET_S3C_HSOTG is not set -+# CONFIG_USB_GADGET_IMX is not set - # CONFIG_USB_GADGET_S3C2410 is not set --# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+# CONFIG_USB_GADGET_FSL_QE is not set -+# CONFIG_USB_GADGET_CI13XXX is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LANGWELL is not set - # CONFIG_USB_GADGET_DUMMY_HCD is not set - CONFIG_USB_GADGET_DUALSPEED=y --# CONFIG_USB_ZERO is not set -+CONFIG_USB_ZERO=m -+CONFIG_USB_ZERO_HNPTEST=y -+# CONFIG_USB_AUDIO is not set - CONFIG_USB_ETH=m - CONFIG_USB_ETH_RNDIS=y --# CONFIG_USB_GADGETFS is not set --# CONFIG_USB_FILE_STORAGE is not set --# CONFIG_USB_G_SERIAL is not set --# CONFIG_USB_MIDI_GADGET is not set --# CONFIG_USB_G_PRINTER is not set --# CONFIG_USB_CDC_COMPOSITE is not set -+# CONFIG_USB_ETH_EEM is not set -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+# CONFIG_USB_MASS_STORAGE is not set -+CONFIG_USB_G_SERIAL=m -+CONFIG_USB_MIDI_GADGET=m -+CONFIG_USB_G_PRINTER=m -+CONFIG_USB_CDC_COMPOSITE=m -+# CONFIG_USB_G_MULTI is not set - - # - # OTG and related infrastructure - # - CONFIG_USB_OTG_UTILS=y --# CONFIG_USB_GPIO_VBUS is not set -+CONFIG_USB_GPIO_VBUS=y -+# CONFIG_ISP1301_OMAP is not set -+# CONFIG_USB_ULPI is not set - CONFIG_TWL4030_USB=y --# CONFIG_NOP_USB_XCEIV is not set -+CONFIG_NOP_USB_XCEIV=y - CONFIG_MMC=y - # CONFIG_MMC_DEBUG is not set --# CONFIG_MMC_UNSAFE_RESUME is not set -+CONFIG_MMC_UNSAFE_RESUME=y - - # --# MMC/SD Card Drivers -+# MMC/SD/SDIO Card Drivers - # - CONFIG_MMC_BLOCK=y - CONFIG_MMC_BLOCK_BOUNCE=y --# CONFIG_SDIO_UART is not set -+CONFIG_SDIO_UART=y - # CONFIG_MMC_TEST is not set - - # --# MMC/SD Host Controller Drivers -+# MMC/SD/SDIO Host Controller Drivers - # - # CONFIG_MMC_SDHCI is not set - # CONFIG_MMC_OMAP is not set - CONFIG_MMC_OMAP_HS=y -+# CONFIG_MMC_AT91 is not set -+# CONFIG_MMC_ATMELMCI is not set -+CONFIG_MMC_SPI=m - # CONFIG_MEMSTICK is not set -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+ -+# -+# LED drivers -+# -+# CONFIG_LEDS_PCA9532 is not set -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_GPIO_PLATFORM=y -+# CONFIG_LEDS_LP3944 is not set -+# CONFIG_LEDS_PCA955X is not set -+# CONFIG_LEDS_DAC124S085 is not set -+# CONFIG_LEDS_BD2802 is not set -+ -+# -+# LED Triggers -+# -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=m -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_BACKLIGHT=m -+# CONFIG_LEDS_TRIGGER_GPIO is not set -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m -+ -+# -+# iptables trigger is under Netfilter config (LED target) -+# - # CONFIG_ACCESSIBILITY is not set --# CONFIG_NEW_LEDS is not set - CONFIG_RTC_LIB=y --CONFIG_RTC_CLASS=y --CONFIG_RTC_HCTOSYS=y --CONFIG_RTC_HCTOSYS_DEVICE="rtc0" --# CONFIG_RTC_DEBUG is not set -+CONFIG_RTC_CLASS=m - - # - # RTC interfaces -@@ -1020,73 +2452,178 @@ CONFIG_RTC_INTF_DEV=y - # CONFIG_RTC_DRV_PCF8563 is not set - # CONFIG_RTC_DRV_PCF8583 is not set - # CONFIG_RTC_DRV_M41T80 is not set -+CONFIG_RTC_DRV_TWL4030=m - # CONFIG_RTC_DRV_S35390A is not set - # CONFIG_RTC_DRV_FM3130 is not set -+# CONFIG_RTC_DRV_RX8581 is not set -+# CONFIG_RTC_DRV_RX8025 is not set - - # - # SPI RTC drivers - # -+# CONFIG_RTC_DRV_M41T94 is not set -+# CONFIG_RTC_DRV_DS1305 is not set -+# CONFIG_RTC_DRV_DS1390 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+# CONFIG_RTC_DRV_R9701 is not set -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_DS3234 is not set -+# CONFIG_RTC_DRV_PCF2123 is not set - - # - # Platform RTC drivers - # - # CONFIG_RTC_DRV_CMOS is not set -+# CONFIG_RTC_DRV_DS1286 is not set - # CONFIG_RTC_DRV_DS1511 is not set - # CONFIG_RTC_DRV_DS1553 is not set - # CONFIG_RTC_DRV_DS1742 is not set - # CONFIG_RTC_DRV_STK17TA8 is not set - # CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T35 is not set - # CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_MSM6242 is not set -+# CONFIG_RTC_DRV_BQ4802 is not set -+# CONFIG_RTC_DRV_RP5C01 is not set - # CONFIG_RTC_DRV_V3020 is not set - - # - # on-CPU RTC drivers - # - # CONFIG_DMADEVICES is not set -+# CONFIG_AUXDISPLAY is not set -+CONFIG_UIO=m -+CONFIG_UIO_PDRV=m -+CONFIG_UIO_PDRV_GENIRQ=m -+# CONFIG_UIO_SMX is not set -+# CONFIG_UIO_SERCOS3 is not set - - # --# Voltage and Current regulators -+# TI VLYNQ - # --CONFIG_REGULATOR=y --# CONFIG_REGULATOR_FIXED_VOLTAGE is not set --# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set --# CONFIG_REGULATOR_BQ24022 is not set --CONFIG_REGULATOR_TWL4030=y --# CONFIG_UIO is not set -+CONFIG_STAGING=y -+# CONFIG_STAGING_EXCLUDE_BUILD is not set -+# CONFIG_USB_IP_COMMON is not set -+CONFIG_W35UND=m -+# CONFIG_PRISM2_USB is not set -+CONFIG_ECHO=m -+CONFIG_OTUS=m -+# CONFIG_COMEDI is not set -+# CONFIG_ASUS_OLED is not set -+# CONFIG_INPUT_MIMIO is not set -+# CONFIG_TRANZPORT is not set -+ -+# -+# Qualcomm MSM Camera And Video -+# -+ -+# -+# Camera Sensor Selection -+# -+# CONFIG_INPUT_GPIO is not set -+# CONFIG_DST is not set -+# CONFIG_POHMELFS is not set -+# CONFIG_PLAN9AUTH is not set -+# CONFIG_LINE6_USB is not set -+# CONFIG_USB_SERIAL_QUATECH2 is not set -+# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -+# CONFIG_VT6656 is not set -+# CONFIG_FB_UDL is not set -+ -+# -+# RAR Register Driver -+# -+# CONFIG_RAR_REGISTER is not set -+# CONFIG_IIO is not set -+# CONFIG_RAMZSWAP is not set -+# CONFIG_BATMAN_ADV is not set -+# CONFIG_STRIP is not set -+ -+# -+# CBUS support -+# -+# CONFIG_CBUS is not set - - # - # File systems - # -+CONFIG_FS_JOURNAL_INFO=y - CONFIG_EXT2_FS=y - # CONFIG_EXT2_FS_XATTR is not set - # CONFIG_EXT2_FS_XIP is not set - CONFIG_EXT3_FS=y -+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set - # CONFIG_EXT3_FS_XATTR is not set --# CONFIG_EXT4DEV_FS is not set -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_XATTR=y -+# CONFIG_EXT4_FS_POSIX_ACL is not set -+# CONFIG_EXT4_FS_SECURITY is not set -+# CONFIG_EXT4_DEBUG is not set - CONFIG_JBD=y --# CONFIG_REISERFS_FS is not set --# CONFIG_JFS_FS is not set --# CONFIG_FS_POSIX_ACL is not set --# CONFIG_XFS_FS is not set --# CONFIG_OCFS2_FS is not set -+# CONFIG_JBD_DEBUG is not set -+CONFIG_JBD2=y -+# CONFIG_JBD2_DEBUG is not set -+CONFIG_FS_MBCACHE=y -+CONFIG_REISERFS_FS=m -+# CONFIG_REISERFS_CHECK is not set -+CONFIG_REISERFS_PROC_INFO=y -+CONFIG_REISERFS_FS_XATTR=y -+# CONFIG_REISERFS_FS_POSIX_ACL is not set -+# CONFIG_REISERFS_FS_SECURITY is not set -+CONFIG_JFS_FS=m -+# CONFIG_JFS_POSIX_ACL is not set -+# CONFIG_JFS_SECURITY is not set -+# CONFIG_JFS_DEBUG is not set -+# CONFIG_JFS_STATISTICS is not set -+CONFIG_FS_POSIX_ACL=y -+CONFIG_XFS_FS=m -+# CONFIG_XFS_QUOTA is not set -+# CONFIG_XFS_POSIX_ACL is not set -+# CONFIG_XFS_RT is not set -+# CONFIG_XFS_DEBUG is not set -+CONFIG_GFS2_FS=m -+# CONFIG_GFS2_FS_LOCKING_DLM is not set -+CONFIG_OCFS2_FS=m -+CONFIG_OCFS2_FS_O2CB=m -+CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -+CONFIG_OCFS2_FS_STATS=y -+CONFIG_OCFS2_DEBUG_MASKLOG=y -+# CONFIG_OCFS2_DEBUG_FS is not set -+# CONFIG_OCFS2_FS_POSIX_ACL is not set -+CONFIG_BTRFS_FS=m -+# CONFIG_BTRFS_FS_POSIX_ACL is not set -+# CONFIG_NILFS2_FS is not set -+CONFIG_FILE_LOCKING=y -+CONFIG_FSNOTIFY=y - CONFIG_DNOTIFY=y - CONFIG_INOTIFY=y - CONFIG_INOTIFY_USER=y - CONFIG_QUOTA=y - # CONFIG_QUOTA_NETLINK_INTERFACE is not set - CONFIG_PRINT_QUOTA_WARNING=y -+CONFIG_QUOTA_TREE=y - # CONFIG_QFMT_V1 is not set - CONFIG_QFMT_V2=y - CONFIG_QUOTACTL=y - # CONFIG_AUTOFS_FS is not set --# CONFIG_AUTOFS4_FS is not set --# CONFIG_FUSE_FS is not set -+CONFIG_AUTOFS4_FS=m -+CONFIG_FUSE_FS=m -+# CONFIG_CUSE is not set -+CONFIG_GENERIC_ACL=y -+ -+# -+# Caches -+# -+# CONFIG_FSCACHE is not set - - # - # CD-ROM/DVD Filesystems - # --# CONFIG_ISO9660_FS is not set --# CONFIG_UDF_FS is not set -+CONFIG_ISO9660_FS=m -+CONFIG_JOLIET=y -+CONFIG_ZISOFS=y -+CONFIG_UDF_FS=m -+CONFIG_UDF_NLS=y - - # - # DOS/FAT/NT Filesystems -@@ -1096,68 +2633,118 @@ CONFIG_MSDOS_FS=y - CONFIG_VFAT_FS=y - CONFIG_FAT_DEFAULT_CODEPAGE=437 - CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" --# CONFIG_NTFS_FS is not set -+CONFIG_NTFS_FS=m -+# CONFIG_NTFS_DEBUG is not set -+CONFIG_NTFS_RW=y - - # - # Pseudo filesystems - # - CONFIG_PROC_FS=y - CONFIG_PROC_SYSCTL=y -+CONFIG_PROC_PAGE_MONITOR=y - CONFIG_SYSFS=y - CONFIG_TMPFS=y --# CONFIG_TMPFS_POSIX_ACL is not set -+CONFIG_TMPFS_POSIX_ACL=y - # CONFIG_HUGETLB_PAGE is not set --# CONFIG_CONFIGFS_FS is not set -- --# --# Miscellaneous filesystems --# --# CONFIG_ADFS_FS is not set --# CONFIG_AFFS_FS is not set --# CONFIG_HFS_FS is not set --# CONFIG_HFSPLUS_FS is not set --# CONFIG_BEFS_FS is not set --# CONFIG_BFS_FS is not set --# CONFIG_EFS_FS is not set -+CONFIG_CONFIGFS_FS=m -+CONFIG_MISC_FILESYSTEMS=y -+CONFIG_ADFS_FS=m -+# CONFIG_ADFS_FS_RW is not set -+CONFIG_AFFS_FS=m -+# CONFIG_ECRYPT_FS is not set -+CONFIG_HFS_FS=m -+CONFIG_HFSPLUS_FS=m -+CONFIG_BEFS_FS=m -+# CONFIG_BEFS_DEBUG is not set -+CONFIG_BFS_FS=m -+CONFIG_EFS_FS=m - CONFIG_JFFS2_FS=y - CONFIG_JFFS2_FS_DEBUG=0 - CONFIG_JFFS2_FS_WRITEBUFFER=y - # CONFIG_JFFS2_FS_WBUF_VERIFY is not set --# CONFIG_JFFS2_SUMMARY is not set --# CONFIG_JFFS2_FS_XATTR is not set --# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_SUMMARY=y -+CONFIG_JFFS2_FS_XATTR=y -+CONFIG_JFFS2_FS_POSIX_ACL=y -+CONFIG_JFFS2_FS_SECURITY=y -+CONFIG_JFFS2_COMPRESSION_OPTIONS=y - CONFIG_JFFS2_ZLIB=y --# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_LZO=y - CONFIG_JFFS2_RTIME=y --# CONFIG_JFFS2_RUBIN is not set --# CONFIG_CRAMFS is not set --# CONFIG_VXFS_FS is not set --# CONFIG_MINIX_FS is not set --# CONFIG_OMFS_FS is not set --# CONFIG_HPFS_FS is not set --# CONFIG_QNX4FS_FS is not set --# CONFIG_ROMFS_FS is not set --# CONFIG_SYSV_FS is not set --# CONFIG_UFS_FS is not set -+CONFIG_JFFS2_RUBIN=y -+# CONFIG_JFFS2_CMODE_NONE is not set -+# CONFIG_JFFS2_CMODE_PRIORITY is not set -+# CONFIG_JFFS2_CMODE_SIZE is not set -+CONFIG_JFFS2_CMODE_FAVOURLZO=y -+CONFIG_UBIFS_FS=y -+CONFIG_UBIFS_FS_XATTR=y -+CONFIG_UBIFS_FS_ADVANCED_COMPR=y -+CONFIG_UBIFS_FS_LZO=y -+CONFIG_UBIFS_FS_ZLIB=y -+# CONFIG_UBIFS_FS_DEBUG is not set -+CONFIG_CRAMFS=m -+CONFIG_SQUASHFS=y -+# CONFIG_SQUASHFS_EMBEDDED is not set -+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -+CONFIG_VXFS_FS=m -+CONFIG_MINIX_FS=m -+CONFIG_OMFS_FS=m -+CONFIG_HPFS_FS=m -+CONFIG_QNX4FS_FS=m -+CONFIG_ROMFS_FS=m -+CONFIG_ROMFS_BACKED_BY_BLOCK=y -+# CONFIG_ROMFS_BACKED_BY_MTD is not set -+# CONFIG_ROMFS_BACKED_BY_BOTH is not set -+CONFIG_ROMFS_ON_BLOCK=y -+CONFIG_SYSV_FS=m -+CONFIG_UFS_FS=m -+# CONFIG_UFS_FS_WRITE is not set -+# CONFIG_UFS_DEBUG is not set - CONFIG_NETWORK_FILESYSTEMS=y - CONFIG_NFS_FS=y - CONFIG_NFS_V3=y - # CONFIG_NFS_V3_ACL is not set - CONFIG_NFS_V4=y -+# CONFIG_NFS_V4_1 is not set - CONFIG_ROOT_NFS=y --# CONFIG_NFSD is not set -+CONFIG_NFSD=m -+CONFIG_NFSD_V2_ACL=y -+CONFIG_NFSD_V3=y -+CONFIG_NFSD_V3_ACL=y -+CONFIG_NFSD_V4=y - CONFIG_LOCKD=y - CONFIG_LOCKD_V4=y -+CONFIG_EXPORTFS=m -+CONFIG_NFS_ACL_SUPPORT=m - CONFIG_NFS_COMMON=y - CONFIG_SUNRPC=y - CONFIG_SUNRPC_GSS=y - CONFIG_RPCSEC_GSS_KRB5=y - # CONFIG_RPCSEC_GSS_SPKM3 is not set --# CONFIG_SMB_FS is not set --# CONFIG_CIFS is not set --# CONFIG_NCP_FS is not set --# CONFIG_CODA_FS is not set --# CONFIG_AFS_FS is not set -+CONFIG_SMB_FS=m -+# CONFIG_SMB_NLS_DEFAULT is not set -+CONFIG_CIFS=m -+CONFIG_CIFS_STATS=y -+CONFIG_CIFS_STATS2=y -+# CONFIG_CIFS_WEAK_PW_HASH is not set -+# CONFIG_CIFS_UPCALL is not set -+# CONFIG_CIFS_XATTR is not set -+# CONFIG_CIFS_DEBUG2 is not set -+# CONFIG_CIFS_DFS_UPCALL is not set -+CONFIG_CIFS_EXPERIMENTAL=y -+CONFIG_NCP_FS=m -+# CONFIG_NCPFS_PACKET_SIGNING is not set -+# CONFIG_NCPFS_IOCTL_LOCKING is not set -+# CONFIG_NCPFS_STRONG is not set -+# CONFIG_NCPFS_NFS_NS is not set -+# CONFIG_NCPFS_OS2_NS is not set -+# CONFIG_NCPFS_SMALLDOS is not set -+# CONFIG_NCPFS_NLS is not set -+# CONFIG_NCPFS_EXTRAS is not set -+CONFIG_CODA_FS=m -+CONFIG_AFS_FS=m -+# CONFIG_AFS_DEBUG is not set -+CONFIG_9P_FS=m - - # - # Partition Types -@@ -1167,82 +2754,90 @@ CONFIG_PARTITION_ADVANCED=y - # CONFIG_OSF_PARTITION is not set - # CONFIG_AMIGA_PARTITION is not set - # CONFIG_ATARI_PARTITION is not set --# CONFIG_MAC_PARTITION is not set -+CONFIG_MAC_PARTITION=y - CONFIG_MSDOS_PARTITION=y --# CONFIG_BSD_DISKLABEL is not set --# CONFIG_MINIX_SUBPARTITION is not set --# CONFIG_SOLARIS_X86_PARTITION is not set -+CONFIG_BSD_DISKLABEL=y -+CONFIG_MINIX_SUBPARTITION=y -+CONFIG_SOLARIS_X86_PARTITION=y - # CONFIG_UNIXWARE_DISKLABEL is not set --# CONFIG_LDM_PARTITION is not set -+CONFIG_LDM_PARTITION=y -+CONFIG_LDM_DEBUG=y - # CONFIG_SGI_PARTITION is not set - # CONFIG_ULTRIX_PARTITION is not set - # CONFIG_SUN_PARTITION is not set - # CONFIG_KARMA_PARTITION is not set --# CONFIG_EFI_PARTITION is not set -+CONFIG_EFI_PARTITION=y - # CONFIG_SYSV68_PARTITION is not set - CONFIG_NLS=y - CONFIG_NLS_DEFAULT="iso8859-1" - CONFIG_NLS_CODEPAGE_437=y --# CONFIG_NLS_CODEPAGE_737 is not set --# CONFIG_NLS_CODEPAGE_775 is not set --# CONFIG_NLS_CODEPAGE_850 is not set --# CONFIG_NLS_CODEPAGE_852 is not set --# CONFIG_NLS_CODEPAGE_855 is not set --# CONFIG_NLS_CODEPAGE_857 is not set --# CONFIG_NLS_CODEPAGE_860 is not set --# CONFIG_NLS_CODEPAGE_861 is not set --# CONFIG_NLS_CODEPAGE_862 is not set --# CONFIG_NLS_CODEPAGE_863 is not set --# CONFIG_NLS_CODEPAGE_864 is not set --# CONFIG_NLS_CODEPAGE_865 is not set --# CONFIG_NLS_CODEPAGE_866 is not set --# CONFIG_NLS_CODEPAGE_869 is not set --# CONFIG_NLS_CODEPAGE_936 is not set --# CONFIG_NLS_CODEPAGE_950 is not set --# CONFIG_NLS_CODEPAGE_932 is not set --# CONFIG_NLS_CODEPAGE_949 is not set --# CONFIG_NLS_CODEPAGE_874 is not set --# CONFIG_NLS_ISO8859_8 is not set --# CONFIG_NLS_CODEPAGE_1250 is not set --# CONFIG_NLS_CODEPAGE_1251 is not set --# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_CODEPAGE_737=m -+CONFIG_NLS_CODEPAGE_775=m -+CONFIG_NLS_CODEPAGE_850=m -+CONFIG_NLS_CODEPAGE_852=m -+CONFIG_NLS_CODEPAGE_855=m -+CONFIG_NLS_CODEPAGE_857=m -+CONFIG_NLS_CODEPAGE_860=m -+CONFIG_NLS_CODEPAGE_861=m -+CONFIG_NLS_CODEPAGE_862=m -+CONFIG_NLS_CODEPAGE_863=m -+CONFIG_NLS_CODEPAGE_864=m -+CONFIG_NLS_CODEPAGE_865=m -+CONFIG_NLS_CODEPAGE_866=m -+CONFIG_NLS_CODEPAGE_869=m -+CONFIG_NLS_CODEPAGE_936=m -+CONFIG_NLS_CODEPAGE_950=m -+CONFIG_NLS_CODEPAGE_932=m -+CONFIG_NLS_CODEPAGE_949=m -+CONFIG_NLS_CODEPAGE_874=m -+CONFIG_NLS_ISO8859_8=m -+CONFIG_NLS_CODEPAGE_1250=m -+CONFIG_NLS_CODEPAGE_1251=m -+CONFIG_NLS_ASCII=m - CONFIG_NLS_ISO8859_1=y --# CONFIG_NLS_ISO8859_2 is not set --# CONFIG_NLS_ISO8859_3 is not set --# CONFIG_NLS_ISO8859_4 is not set --# CONFIG_NLS_ISO8859_5 is not set --# CONFIG_NLS_ISO8859_6 is not set --# CONFIG_NLS_ISO8859_7 is not set --# CONFIG_NLS_ISO8859_9 is not set --# CONFIG_NLS_ISO8859_13 is not set --# CONFIG_NLS_ISO8859_14 is not set --# CONFIG_NLS_ISO8859_15 is not set --# CONFIG_NLS_KOI8_R is not set --# CONFIG_NLS_KOI8_U is not set --# CONFIG_NLS_UTF8 is not set --# CONFIG_DLM is not set -+CONFIG_NLS_ISO8859_2=m -+CONFIG_NLS_ISO8859_3=m -+CONFIG_NLS_ISO8859_4=m -+CONFIG_NLS_ISO8859_5=m -+CONFIG_NLS_ISO8859_6=m -+CONFIG_NLS_ISO8859_7=m -+CONFIG_NLS_ISO8859_9=m -+CONFIG_NLS_ISO8859_13=m -+CONFIG_NLS_ISO8859_14=m -+CONFIG_NLS_ISO8859_15=m -+CONFIG_NLS_KOI8_R=m -+CONFIG_NLS_KOI8_U=m -+CONFIG_NLS_UTF8=y -+CONFIG_DLM=m -+# CONFIG_DLM_DEBUG is not set - - # - # Kernel hacking - # --# CONFIG_PRINTK_TIME is not set -+CONFIG_PRINTK_TIME=y - CONFIG_ENABLE_WARN_DEPRECATED=y - CONFIG_ENABLE_MUST_CHECK=y - CONFIG_FRAME_WARN=1024 - CONFIG_MAGIC_SYSRQ=y -+# CONFIG_STRIP_ASM_SYMS is not set - # CONFIG_UNUSED_SYMBOLS is not set --# CONFIG_DEBUG_FS is not set -+CONFIG_DEBUG_FS=y - # CONFIG_HEADERS_CHECK is not set - CONFIG_DEBUG_KERNEL=y - # CONFIG_DEBUG_SHIRQ is not set - CONFIG_DETECT_SOFTLOCKUP=y - # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set - CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -+CONFIG_DETECT_HUNG_TASK=y -+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 - CONFIG_SCHED_DEBUG=y --# CONFIG_SCHEDSTATS is not set --# CONFIG_TIMER_STATS is not set -+CONFIG_SCHEDSTATS=y -+CONFIG_TIMER_STATS=y - # CONFIG_DEBUG_OBJECTS is not set - # CONFIG_DEBUG_SLAB is not set -+# CONFIG_DEBUG_KMEMLEAK is not set -+CONFIG_DEBUG_PREEMPT=y - # CONFIG_DEBUG_RT_MUTEXES is not set - # CONFIG_RT_MUTEX_TESTER is not set - # CONFIG_DEBUG_SPINLOCK is not set -@@ -1252,137 +2847,204 @@ CONFIG_DEBUG_MUTEXES=y - # CONFIG_LOCK_STAT is not set - # CONFIG_DEBUG_SPINLOCK_SLEEP is not set - # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+CONFIG_STACKTRACE=y - # CONFIG_DEBUG_KOBJECT is not set - # CONFIG_DEBUG_BUGVERBOSE is not set --CONFIG_DEBUG_INFO=y -+# CONFIG_DEBUG_INFO is not set - # CONFIG_DEBUG_VM is not set - # CONFIG_DEBUG_WRITECOUNT is not set - # CONFIG_DEBUG_MEMORY_INIT is not set - # CONFIG_DEBUG_LIST is not set - # CONFIG_DEBUG_SG is not set --CONFIG_FRAME_POINTER=y -+# CONFIG_DEBUG_NOTIFIERS is not set -+# CONFIG_DEBUG_CREDENTIALS is not set - # CONFIG_BOOT_PRINTK_DELAY is not set - # CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_RCU_CPU_STALL_DETECTOR is not set - # CONFIG_BACKTRACE_SELF_TEST is not set -+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set - # CONFIG_FAULT_INJECTION is not set - # CONFIG_LATENCYTOP is not set --CONFIG_HAVE_FTRACE=y --CONFIG_HAVE_DYNAMIC_FTRACE=y --# CONFIG_FTRACE is not set -+# CONFIG_SYSCTL_SYSCALL_CHECK is not set -+# CONFIG_PAGE_POISONING is not set -+CONFIG_NOP_TRACER=y -+CONFIG_HAVE_FUNCTION_TRACER=y -+CONFIG_RING_BUFFER=y -+CONFIG_EVENT_TRACING=y -+CONFIG_CONTEXT_SWITCH_TRACER=y -+CONFIG_RING_BUFFER_ALLOW_SWAP=y -+CONFIG_TRACING=y -+CONFIG_TRACING_SUPPORT=y -+CONFIG_FTRACE=y -+# CONFIG_FUNCTION_TRACER is not set - # CONFIG_IRQSOFF_TRACER is not set -+# CONFIG_PREEMPT_TRACER is not set - # CONFIG_SCHED_TRACER is not set --# CONFIG_CONTEXT_SWITCH_TRACER is not set -+# CONFIG_ENABLE_DEFAULT_TRACERS is not set -+# CONFIG_BOOT_TRACER is not set -+CONFIG_BRANCH_PROFILE_NONE=y -+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -+# CONFIG_PROFILE_ALL_BRANCHES is not set -+# CONFIG_STACK_TRACER is not set -+# CONFIG_KMEMTRACE is not set -+# CONFIG_WORKQUEUE_TRACER is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_RING_BUFFER_BENCHMARK is not set -+# CONFIG_DYNAMIC_DEBUG is not set - # CONFIG_SAMPLES is not set - CONFIG_HAVE_ARCH_KGDB=y - # CONFIG_KGDB is not set -+CONFIG_ARM_UNWIND=y - # CONFIG_DEBUG_USER is not set - # CONFIG_DEBUG_ERRORS is not set - # CONFIG_DEBUG_STACK_USAGE is not set - # CONFIG_DEBUG_LL is not set -+# CONFIG_OC_ETM is not set - - # - # Security options - # --# CONFIG_KEYS is not set -+CONFIG_KEYS=y -+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set - # CONFIG_SECURITY is not set --# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+# CONFIG_SECURITYFS is not set -+# CONFIG_DEFAULT_SECURITY_SELINUX is not set -+# CONFIG_DEFAULT_SECURITY_SMACK is not set -+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -+CONFIG_DEFAULT_SECURITY_DAC=y -+CONFIG_DEFAULT_SECURITY="" -+CONFIG_XOR_BLOCKS=m -+CONFIG_ASYNC_CORE=m -+CONFIG_ASYNC_MEMCPY=m -+CONFIG_ASYNC_XOR=m -+CONFIG_ASYNC_PQ=m -+CONFIG_ASYNC_RAID6_RECOV=m - CONFIG_CRYPTO=y - - # - # Crypto core or helper - # -+CONFIG_CRYPTO_FIPS=y - CONFIG_CRYPTO_ALGAPI=y -+CONFIG_CRYPTO_ALGAPI2=y -+CONFIG_CRYPTO_AEAD=m -+CONFIG_CRYPTO_AEAD2=y - CONFIG_CRYPTO_BLKCIPHER=y -+CONFIG_CRYPTO_BLKCIPHER2=y -+CONFIG_CRYPTO_HASH=y -+CONFIG_CRYPTO_HASH2=y -+CONFIG_CRYPTO_RNG=m -+CONFIG_CRYPTO_RNG2=y -+CONFIG_CRYPTO_PCOMP=y - CONFIG_CRYPTO_MANAGER=y --# CONFIG_CRYPTO_GF128MUL is not set --# CONFIG_CRYPTO_NULL is not set --# CONFIG_CRYPTO_CRYPTD is not set --# CONFIG_CRYPTO_AUTHENC is not set --# CONFIG_CRYPTO_TEST is not set -+CONFIG_CRYPTO_MANAGER2=y -+CONFIG_CRYPTO_GF128MUL=m -+CONFIG_CRYPTO_NULL=m -+CONFIG_CRYPTO_WORKQUEUE=y -+CONFIG_CRYPTO_CRYPTD=m -+CONFIG_CRYPTO_AUTHENC=m -+CONFIG_CRYPTO_TEST=m - - # - # Authenticated Encryption with Associated Data - # --# CONFIG_CRYPTO_CCM is not set --# CONFIG_CRYPTO_GCM is not set --# CONFIG_CRYPTO_SEQIV is not set -+CONFIG_CRYPTO_CCM=m -+CONFIG_CRYPTO_GCM=m -+CONFIG_CRYPTO_SEQIV=m - - # - # Block modes - # - CONFIG_CRYPTO_CBC=y --# CONFIG_CRYPTO_CTR is not set --# CONFIG_CRYPTO_CTS is not set --CONFIG_CRYPTO_ECB=m --# CONFIG_CRYPTO_LRW is not set -+CONFIG_CRYPTO_CTR=m -+CONFIG_CRYPTO_CTS=m -+CONFIG_CRYPTO_ECB=y -+CONFIG_CRYPTO_LRW=m - CONFIG_CRYPTO_PCBC=m --# CONFIG_CRYPTO_XTS is not set -+CONFIG_CRYPTO_XTS=m - - # - # Hash modes - # --# CONFIG_CRYPTO_HMAC is not set --# CONFIG_CRYPTO_XCBC is not set -+CONFIG_CRYPTO_HMAC=m -+CONFIG_CRYPTO_XCBC=m -+# CONFIG_CRYPTO_VMAC is not set - - # - # Digest - # --# CONFIG_CRYPTO_CRC32C is not set --# CONFIG_CRYPTO_MD4 is not set -+CONFIG_CRYPTO_CRC32C=y -+CONFIG_CRYPTO_GHASH=m -+CONFIG_CRYPTO_MD4=m - CONFIG_CRYPTO_MD5=y --# CONFIG_CRYPTO_MICHAEL_MIC is not set --# CONFIG_CRYPTO_RMD128 is not set --# CONFIG_CRYPTO_RMD160 is not set --# CONFIG_CRYPTO_RMD256 is not set --# CONFIG_CRYPTO_RMD320 is not set --# CONFIG_CRYPTO_SHA1 is not set --# CONFIG_CRYPTO_SHA256 is not set --# CONFIG_CRYPTO_SHA512 is not set --# CONFIG_CRYPTO_TGR192 is not set --# CONFIG_CRYPTO_WP512 is not set -+CONFIG_CRYPTO_MICHAEL_MIC=y -+CONFIG_CRYPTO_RMD128=m -+CONFIG_CRYPTO_RMD160=m -+CONFIG_CRYPTO_RMD256=m -+CONFIG_CRYPTO_RMD320=m -+CONFIG_CRYPTO_SHA1=m -+CONFIG_CRYPTO_SHA256=m -+CONFIG_CRYPTO_SHA512=m -+CONFIG_CRYPTO_TGR192=m -+CONFIG_CRYPTO_WP512=m - - # - # Ciphers - # --# CONFIG_CRYPTO_AES is not set --# CONFIG_CRYPTO_ANUBIS is not set --# CONFIG_CRYPTO_ARC4 is not set --# CONFIG_CRYPTO_BLOWFISH is not set --# CONFIG_CRYPTO_CAMELLIA is not set --# CONFIG_CRYPTO_CAST5 is not set --# CONFIG_CRYPTO_CAST6 is not set -+CONFIG_CRYPTO_AES=y -+CONFIG_CRYPTO_ANUBIS=m -+CONFIG_CRYPTO_ARC4=y -+CONFIG_CRYPTO_BLOWFISH=m -+CONFIG_CRYPTO_CAMELLIA=m -+CONFIG_CRYPTO_CAST5=m -+CONFIG_CRYPTO_CAST6=m - CONFIG_CRYPTO_DES=y --# CONFIG_CRYPTO_FCRYPT is not set --# CONFIG_CRYPTO_KHAZAD is not set --# CONFIG_CRYPTO_SALSA20 is not set --# CONFIG_CRYPTO_SEED is not set --# CONFIG_CRYPTO_SERPENT is not set --# CONFIG_CRYPTO_TEA is not set --# CONFIG_CRYPTO_TWOFISH is not set -+CONFIG_CRYPTO_FCRYPT=m -+CONFIG_CRYPTO_KHAZAD=m -+CONFIG_CRYPTO_SALSA20=m -+CONFIG_CRYPTO_SEED=m -+CONFIG_CRYPTO_SERPENT=m -+CONFIG_CRYPTO_TEA=m -+CONFIG_CRYPTO_TWOFISH=m -+CONFIG_CRYPTO_TWOFISH_COMMON=m - - # - # Compression - # --# CONFIG_CRYPTO_DEFLATE is not set --# CONFIG_CRYPTO_LZO is not set -+CONFIG_CRYPTO_DEFLATE=y -+# CONFIG_CRYPTO_ZLIB is not set -+CONFIG_CRYPTO_LZO=y -+ -+# -+# Random Number Generation -+# -+CONFIG_CRYPTO_ANSI_CPRNG=m - CONFIG_CRYPTO_HW=y -+CONFIG_BINARY_PRINTF=y - - # - # Library routines - # - CONFIG_BITREVERSE=y --# CONFIG_GENERIC_FIND_FIRST_BIT is not set --# CONFIG_GENERIC_FIND_NEXT_BIT is not set -+CONFIG_GENERIC_FIND_LAST_BIT=y - CONFIG_CRC_CCITT=y --# CONFIG_CRC16 is not set --# CONFIG_CRC_T10DIF is not set --# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC16=y -+CONFIG_CRC_T10DIF=y -+CONFIG_CRC_ITU_T=y - CONFIG_CRC32=y --# CONFIG_CRC7 is not set -+CONFIG_CRC7=y - CONFIG_LIBCRC32C=y - CONFIG_ZLIB_INFLATE=y - CONFIG_ZLIB_DEFLATE=y --CONFIG_PLIST=y -+CONFIG_LZO_COMPRESS=y -+CONFIG_LZO_DECOMPRESS=y -+CONFIG_DECOMPRESS_GZIP=y -+CONFIG_TEXTSEARCH=y -+CONFIG_TEXTSEARCH_KMP=m -+CONFIG_TEXTSEARCH_BM=m -+CONFIG_TEXTSEARCH_FSM=m - CONFIG_HAS_IOMEM=y - CONFIG_HAS_IOPORT=y - CONFIG_HAS_DMA=y -+CONFIG_NLATTR=y --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0011-ASoC-enable-audio-capture-by-default-for-twl4030.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0011-ASoC-enable-audio-capture-by-default-for-twl4030.patch deleted file mode 100644 index e02a9ab..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0011-ASoC-enable-audio-capture-by-default-for-twl4030.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 3cd85787199204da2faec4b4150302bf2228de48 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 12:45:20 -0800 -Subject: [PATCH 11/45] ASoC: enable audio capture by default for twl4030 - ---- - sound/soc/codecs/twl4030.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c -index 74f0d65..53da465 100644 ---- a/sound/soc/codecs/twl4030.c -+++ b/sound/soc/codecs/twl4030.c -@@ -46,8 +46,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { - 0xc3, /* REG_OPTION (0x2) */ - 0x00, /* REG_UNKNOWN (0x3) */ - 0x00, /* REG_MICBIAS_CTL (0x4) */ -- 0x20, /* REG_ANAMICL (0x5) */ -- 0x00, /* REG_ANAMICR (0x6) */ -+ 0x34, /* REG_ANAMICL (0x5) */ -+ 0x14, /* REG_ANAMICR (0x6) */ - 0x00, /* REG_AVADC_CTL (0x7) */ - 0x00, /* REG_ADCMICSEL (0x8) */ - 0x00, /* REG_DIGMIXING (0x9) */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0012-MTD-NAND-omap2-proper-fix-for-subpage-read-ECC-error.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0012-MTD-NAND-omap2-proper-fix-for-subpage-read-ECC-error.patch deleted file mode 100644 index a8f3d8b..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0012-MTD-NAND-omap2-proper-fix-for-subpage-read-ECC-error.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 7d8868d73fdd95eb928f54f881978590643e50cc Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 31 Dec 2009 07:05:02 -0800 -Subject: [PATCH 12/45] MTD: NAND: omap2: proper fix for subpage read ECC errors - ---- - drivers/mtd/nand/omap2.c | 11 +++++++---- - 1 files changed, 7 insertions(+), 4 deletions(-) - -diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c -index 08c193c..9b185b0 100644 ---- a/drivers/mtd/nand/omap2.c -+++ b/drivers/mtd/nand/omap2.c -@@ -295,11 +295,14 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len) - u32 *p = (u32 *)buf; - - /* take care of subpage reads */ -- for (; len % 4 != 0; ) { -- *buf++ = __raw_readb(info->nand.IO_ADDR_R); -- len--; -+ if (len % 4) { -+ if (info->nand.options & NAND_BUSWIDTH_16) -+ omap_read_buf16(mtd, buf, len % 4); -+ else -+ omap_read_buf8(mtd, buf, len % 4); -+ p = (u32 *) (buf + len % 4); -+ len -= len % 4; - } -- p = (u32 *) buf; - - /* configure and start prefetch transfer */ - ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x0); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0013-OMAP3630-DSS2-Enable-Pre-Multiplied-Alpha-Support.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0013-OMAP3630-DSS2-Enable-Pre-Multiplied-Alpha-Support.patch deleted file mode 100644 index 7f4954a..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0013-OMAP3630-DSS2-Enable-Pre-Multiplied-Alpha-Support.patch +++ /dev/null @@ -1,44 +0,0 @@ -From af96930d2412b4af27407a48e262ce1bb2e32427 Mon Sep 17 00:00:00 2001 -From: Sudeep Basavaraj <sudeep.basavaraj@ti.com> -Date: Tue, 5 Jan 2010 18:58:18 +0530 -Subject: [PATCH 13/45] OMAP3630:DSS2:Enable Pre-Multiplied Alpha Support - -Enables dss to process color formats with pre-mulitplied alpha values. -With this we can have alpha values defined for each pixel -and hence can have different blending values for each pixel. - -Signed-off-by: Sudeep Basavaraj <sudeep.basavaraj@ti.com> -Signed-off-by: Kishore Y <kishore.y@ti.com> ---- - drivers/video/omap2/dss/dispc.c | 8 ++++++++ - 1 files changed, 8 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c -index f7acf87..c6d5fc5 100644 ---- a/drivers/video/omap2/dss/dispc.c -+++ b/drivers/video/omap2/dss/dispc.c -@@ -913,6 +913,11 @@ static void _dispc_set_vid_color_conv(enum omap_plane plane, bool enable) - dispc_write_reg(dispc_reg_att[plane], val); - } - -+static void _dispc_set_alpha_blend_attrs(enum omap_plane plane, bool enable) -+{ -+ REG_FLD_MOD(dispc_reg_att[plane], enable ? 1 : 0, 28, 28); -+} -+ - void dispc_enable_replication(enum omap_plane plane, bool enable) - { - int bit; -@@ -1689,6 +1694,9 @@ static int _dispc_setup_plane(enum omap_plane plane, - - _dispc_set_rotation_attrs(plane, rotation, mirror, color_mode); - -+ if (cpu_is_omap3630() && (plane != OMAP_DSS_VIDEO1)) -+ _dispc_set_alpha_blend_attrs(plane, 1); -+ - if (plane != OMAP_DSS_VIDEO1) - _dispc_setup_global_alpha(plane, global_alpha); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0014-DSS2-add-bootarg-for-selecting-svideo-or-composite-f.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0014-DSS2-add-bootarg-for-selecting-svideo-or-composite-f.patch deleted file mode 100644 index d9554e1..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0014-DSS2-add-bootarg-for-selecting-svideo-or-composite-f.patch +++ /dev/null @@ -1,75 +0,0 @@ -From ba26db491acb2d0ee6ef6e51756e843dfd56a125 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Tue, 19 Jan 2010 21:19:15 -0800 -Subject: [PATCH 14/45] DSS2: add bootarg for selecting svideo or composite for tv output - -also add pal-16 and ntsc-16 omapfb.mode settings for 16bpp ---- - drivers/video/omap2/dss/venc.c | 22 ++++++++++++++++++++++ - drivers/video/omap2/omapfb/omapfb-main.c | 10 +++++++++- - 2 files changed, 31 insertions(+), 1 deletions(-) - -diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c -index 8be116f..fbfc24b 100644 ---- a/drivers/video/omap2/dss/venc.c -+++ b/drivers/video/omap2/dss/venc.c -@@ -87,6 +87,11 @@ - #define VENC_OUTPUT_TEST 0xC8 - #define VENC_DAC_B__DAC_C 0xC8 - -+static char *tv_connection; -+ -+module_param_named(tvcable, tv_connection, charp, 0); -+MODULE_PARM_DESC(tvcable, "TV connection type (svideo, composite)"); -+ - struct venc_config { - u32 f_control; - u32 vidout_ctrl; -@@ -432,6 +437,23 @@ static int venc_panel_probe(struct omap_dss_device *dssdev) - { - dssdev->panel.timings = omap_dss_pal_timings; - -+ /* Allow the TV output to be overriden */ -+ if (tv_connection) { -+ if (strcmp(tv_connection, "svideo") == 0) { -+ printk(KERN_INFO -+ "omapdss: tv output is svideo.\n"); -+ dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO; -+ } else if (strcmp(tv_connection, "composite") == 0) { -+ printk(KERN_INFO -+ "omapdss: tv output is composite.\n"); -+ dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE; -+ } else { -+ printk(KERN_INFO -+ "omapdss: unsupported output type'%s'.\n", -+ tv_connection); -+ } -+ } -+ - return 0; - } - -diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c -index 7f47a34..0fe87e0 100644 ---- a/drivers/video/omap2/omapfb/omapfb-main.c -+++ b/drivers/video/omap2/omapfb/omapfb-main.c -@@ -1988,7 +1988,15 @@ static int omapfb_mode_to_timings(const char *mode_str, - int r; - - #ifdef CONFIG_OMAP2_DSS_VENC -- if (strcmp(mode_str, "pal") == 0) { -+ if (strcmp(mode_str, "pal-16") == 0) { -+ *timings = omap_dss_pal_timings; -+ *bpp = 16; -+ return 0; -+ } else if (strcmp(mode_str, "ntsc-16") == 0) { -+ *timings = omap_dss_ntsc_timings; -+ *bpp = 16; -+ return 0; -+ } else if (strcmp(mode_str, "pal") == 0) { - *timings = omap_dss_pal_timings; - *bpp = 0; - return 0; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0015-ISP-add-some-more-from-Leopard-imaging-patch.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0015-ISP-add-some-more-from-Leopard-imaging-patch.patch deleted file mode 100644 index f8030bb..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0015-ISP-add-some-more-from-Leopard-imaging-patch.patch +++ /dev/null @@ -1,133 +0,0 @@ -From 739ec82561686ad0c5cc8befef3bcd74339d205e Mon Sep 17 00:00:00 2001 -From: Koen Kooi <k-kooi@ti.com> -Date: Thu, 11 Feb 2010 21:34:00 +0100 -Subject: [PATCH 15/45] ISP: add some more from Leopard imaging patch - ---- - drivers/media/video/isp/isppreview.c | 16 ++++++++- - include/media/v4l2-int-device.h | 58 ++++++++++++++++++++++++++++++++++ - 2 files changed, 72 insertions(+), 2 deletions(-) - -diff --git a/drivers/media/video/isp/isppreview.c b/drivers/media/video/isp/isppreview.c -index 5494efc..85ee25d 100644 ---- a/drivers/media/video/isp/isppreview.c -+++ b/drivers/media/video/isp/isppreview.c -@@ -79,13 +79,26 @@ static struct ispprev_rgbtorgb flr_rgb2rgb = { - {0x0000, 0x0000, 0x0000} - }; - -+static struct ispprev_rgbtorgb unity_rgb2rgb = { -+ { /* RGB-RGB Matrix */ -+ {0x0100, 0x0000, 0x0000}, -+ {0x0000, 0x0100, 0x0000}, -+ {0x0000, 0x0000, 0x0100} -+ }, /* RGB Offset */ -+ {0x0000, 0x0000, 0x0000} -+}; -+ - /* Default values in Office Flourescent Light for RGB to YUV Conversion*/ - static struct ispprev_csc flr_prev_csc[] = { - { - { /* CSC Coef Matrix */ -- {66, 129, 25}, -+/* {66, 129, 25}, - {-38, -75, 112}, - {112, -94 , -18} -+*/ -+ {0x04C, 0x098, 0x01C}, -+ {0x3D4, 0x3AC, 0x080}, -+ {0x080, 0x39E, 0x3EC} - }, /* CSC Offset */ - {0x0, 0x0, 0x0} - }, -@@ -107,7 +120,6 @@ static struct ispprev_csc flr_prev_csc[] = { - } - }; - -- - /* Default values in Office Flourescent Light for CFA Gradient*/ - #define FLR_CFA_GRADTHRS_HORZ 0x28 - #define FLR_CFA_GRADTHRS_VERT 0x28 -diff --git a/include/media/v4l2-int-device.h b/include/media/v4l2-int-device.h -index ed32d3f..ce415ec 100644 ---- a/include/media/v4l2-int-device.h -+++ b/include/media/v4l2-int-device.h -@@ -113,6 +113,8 @@ enum v4l2_if_type { - * on certain image sensors. - */ - V4L2_IF_TYPE_BT656, -+ V4L2_IF_TYPE_YCbCr, -+ V4L2_IF_TYPE_RAW, - }; - - enum v4l2_if_type_bt656_mode { -@@ -159,10 +161,66 @@ struct v4l2_if_type_bt656 { - u32 clock_curr; - }; - -+struct v4l2_if_type_ycbcr { -+ /* -+ * 0: Frame begins when vsync is high. -+ * 1: Frame begins when vsync changes from low to high. -+ */ -+ unsigned frame_start_on_rising_vs:1; -+ /* Use Bt synchronisation codes for sync correction. */ -+ unsigned bt_sync_correct:1; -+ /* Swap every two adjacent image data elements. */ -+ unsigned swap:1; -+ /* Inverted latch clock polarity from slave. */ -+ unsigned latch_clk_inv:1; -+ /* Hs polarity. 0 is active high, 1 active low. */ -+ unsigned nobt_hs_inv:1; -+ /* Vs polarity. 0 is active high, 1 active low. */ -+ unsigned nobt_vs_inv:1; -+ /* Minimum accepted bus clock for slave (in Hz). */ -+ u32 clock_min; -+ /* Maximum accepted bus clock for slave. */ -+ u32 clock_max; -+ /* -+ * Current wish of the slave. May only change in response to -+ * ioctls that affect image capture. -+ */ -+ u32 clock_curr; -+}; -+ -+struct v4l2_if_type_raw { -+ /* -+ * 0: Frame begins when vsync is high. -+ * 1: Frame begins when vsync changes from low to high. -+ */ -+ unsigned frame_start_on_rising_vs:1; -+ /* Use Bt synchronisation codes for sync correction. */ -+ unsigned bt_sync_correct:1; -+ /* Swap every two adjacent image data elements. */ -+ unsigned swap:1; -+ /* Inverted latch clock polarity from slave. */ -+ unsigned latch_clk_inv:1; -+ /* Hs polarity. 0 is active high, 1 active low. */ -+ unsigned nobt_hs_inv:1; -+ /* Vs polarity. 0 is active high, 1 active low. */ -+ unsigned nobt_vs_inv:1; -+ /* Minimum accepted bus clock for slave (in Hz). */ -+ u32 clock_min; -+ /* Maximum accepted bus clock for slave. */ -+ u32 clock_max; -+ /* -+ * Current wish of the slave. May only change in response to -+ * ioctls that affect image capture. -+ */ -+ u32 clock_curr; -+}; -+ - struct v4l2_ifparm { - enum v4l2_if_type if_type; - union { - struct v4l2_if_type_bt656 bt656; -+ struct v4l2_if_type_ycbcr ycbcr; -+ struct v4l2_if_type_raw raw; - } u; - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0016-ARM-OMAP-Overo-Add-support-for-second-ethernet-port.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0016-ARM-OMAP-Overo-Add-support-for-second-ethernet-port.patch deleted file mode 100644 index 4b9bd21..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0016-ARM-OMAP-Overo-Add-support-for-second-ethernet-port.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 1fc84dc95abaf51294efa10fe111d65bc0b08483 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <sakoman@gmail.com> -Date: Tue, 15 Dec 2009 14:59:42 -0800 -Subject: [PATCH 16/45] ARM: OMAP: Overo: Add support for second ethernet port - -Signed-off-by: Steve Sakoman <sakoman@gmail.com> ---- - arch/arm/mach-omap2/board-overo.c | 56 +++++++++++++++++++++++++++++++++++-- - 1 files changed, 53 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index e0aebc3..6204b8c 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -63,6 +63,8 @@ - - #define OVERO_SMSC911X_CS 5 - #define OVERO_SMSC911X_GPIO 176 -+#define OVERO_SMSC911X2_CS 4 -+#define OVERO_SMSC911X2_GPIO 65 - - #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ - defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) -@@ -137,6 +139,16 @@ static struct resource overo_smsc911x_resources[] = { - }, - }; - -+static struct resource overo_smsc911x2_resources[] = { -+ { -+ .name = "smsc911x2-memory", -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, -+ }, -+}; -+ - static struct smsc911x_platform_config overo_smsc911x_config = { - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, -@@ -146,7 +158,7 @@ static struct smsc911x_platform_config overo_smsc911x_config = { - - static struct platform_device overo_smsc911x_device = { - .name = "smsc911x", -- .id = -1, -+ .id = 0, - .num_resources = ARRAY_SIZE(overo_smsc911x_resources), - .resource = overo_smsc911x_resources, - .dev = { -@@ -154,9 +166,26 @@ static struct platform_device overo_smsc911x_device = { - }, - }; - -+static struct platform_device overo_smsc911x2_device = { -+ .name = "smsc911x", -+ .id = 1, -+ .num_resources = ARRAY_SIZE(overo_smsc911x2_resources), -+ .resource = overo_smsc911x2_resources, -+ .dev = { -+ .platform_data = &overo_smsc911x_config, -+ }, -+}; -+ -+static struct platform_device *smsc911x_devices[] = { -+ &overo_smsc911x_device, -+ &overo_smsc911x2_device, -+}; -+ - static inline void __init overo_init_smsc911x(void) - { -- unsigned long cs_mem_base; -+ unsigned long cs_mem_base, cs_mem_base2; -+ -+ /* set up first smsc911x chip */ - - if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) { - printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n"); -@@ -177,7 +206,28 @@ static inline void __init overo_init_smsc911x(void) - overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO); - overo_smsc911x_resources[1].end = 0; - -- platform_device_register(&overo_smsc911x_device); -+ /* set up second smsc911x chip */ -+ -+ if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) { -+ printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n"); -+ return; -+ } -+ -+ overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0; -+ overo_smsc911x2_resources[0].end = cs_mem_base2 + 0xff; -+ -+ if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) && -+ (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) { -+ gpio_export(OVERO_SMSC911X2_GPIO, 0); -+ } else { -+ printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n"); -+ return; -+ } -+ -+ overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO); -+ overo_smsc911x2_resources[1].end = 0; -+ -+ platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices)); - } - - #else --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0017-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0017-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch deleted file mode 100644 index 40fbbff..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0017-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch +++ /dev/null @@ -1,29 +0,0 @@ -From f6084470f7861f9cc05faec2a8f8825ec55f7022 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <sakoman@gmail.com> -Date: Tue, 15 Dec 2009 15:17:44 -0800 -Subject: [PATCH 17/45] drivers: net: smsc911x: return ENODEV if device is not found - -Signed-off-by: Steve Sakoman <sakoman@gmail.com> ---- - drivers/net/smsc911x.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c -index 494cd91..2472cb0 100644 ---- a/drivers/net/smsc911x.c -+++ b/drivers/net/smsc911x.c -@@ -2021,8 +2021,10 @@ static int __devinit smsc911x_drv_probe(struct platform_device *pdev) - } - - retval = smsc911x_init(dev); -- if (retval < 0) -+ if (retval < 0) { -+ retval = -ENODEV; - goto out_unmap_io_3; -+ } - - /* configure irq polarity and type before connecting isr */ - if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0018-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0018-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch deleted file mode 100644 index 1ee7f32..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0018-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 56f59d080226a7a6a033e7f20e8a41d1c327e5a1 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <sakoman@gmail.com> -Date: Tue, 15 Dec 2009 15:24:10 -0800 -Subject: [PATCH 18/45] drivers: input: touchscreen: ads7846: return ENODEV if device is not found - -Signed-off-by: Steve Sakoman <sakoman@gmail.com> ---- - drivers/input/touchscreen/ads7846.c | 13 ++++++++++--- - 1 files changed, 10 insertions(+), 3 deletions(-) - -diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c -index e53ac1f..45287ab 100644 ---- a/drivers/input/touchscreen/ads7846.c -+++ b/drivers/input/touchscreen/ads7846.c -@@ -1165,9 +1165,16 @@ static int __devinit ads7846_probe(struct spi_device *spi) - /* take a first sample, leaving nPENIRQ active and vREF off; avoid - * the touchscreen, in case it's not connected. - */ -- (void) ads7846_read12_ser(&spi->dev, -+ err = ads7846_read12_ser(&spi->dev, - READ_12BIT_SER(vaux) | ADS_PD10_ALL_ON); - -+ /* if sample is all 0's or all 1's then there is no device on spi */ -+ if ( (err == 0x000) || (err == 0xfff)) { -+ dev_info(&spi->dev, "no device detected, test read result was 0x%08X\n", err); -+ err = -ENODEV; -+ goto err_free_irq; -+ } -+ - err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group); - if (err) - goto err_remove_hwmon; -@@ -1188,7 +1195,7 @@ static int __devinit ads7846_probe(struct spi_device *spi) - err_free_irq: - free_irq(spi->irq, ts); - err_free_gpio: -- if (ts->gpio_pendown != -1) -+ if (!ts->get_pendown_state && ts->gpio_pendown != -1) - gpio_free(ts->gpio_pendown); - err_cleanup_filter: - if (ts->filter_cleanup) -@@ -1216,7 +1223,7 @@ static int __devexit ads7846_remove(struct spi_device *spi) - /* suspend left the IRQ disabled */ - enable_irq(ts->spi->irq); - -- if (ts->gpio_pendown != -1) -+ if (!ts->get_pendown_state && ts->gpio_pendown != -1) - gpio_free(ts->gpio_pendown); - - if (ts->filter_cleanup) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0019-drivers-mfd-add-twl4030-madc-driver.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0019-drivers-mfd-add-twl4030-madc-driver.patch deleted file mode 100644 index 55c5e19..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0019-drivers-mfd-add-twl4030-madc-driver.patch +++ /dev/null @@ -1,601 +0,0 @@ -From b9270dc07b1b66cce33580bca6276c20f1bf68d2 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Wed, 19 Jan 2011 16:06:42 +0100 -Subject: [PATCH 19/45] drivers: mfd: add twl4030 madc driver - ---- - drivers/mfd/Kconfig | 21 ++ - drivers/mfd/Makefile | 1 + - drivers/mfd/twl4030-madc.c | 536 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 558 insertions(+), 0 deletions(-) - create mode 100644 drivers/mfd/twl4030-madc.c - -diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig -index 306b346..6221146 100644 ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -148,6 +148,27 @@ config TWL4030_CODEC - default n - - -+config TWL4030_MADC -+ tristate "TWL4030 MADC Driver" -+ depends on TWL4030_CORE -+ help -+ The TWL4030 Monitoring ADC driver enables the host -+ processor to monitor analog signals using analog-to-digital -+ conversions on the input source. TWL4030 MADC provides the -+ following features: -+ - Single 10-bit ADC with successive approximation register (SAR) conversion; -+ - Analog multiplexer for 16 inputs; -+ - Seven (of the 16) inputs are freely available; -+ - Battery voltage monitoring; -+ - Concurrent conversion request management; -+ - Interrupt signal to Primary Interrupt Handler; -+ - Averaging feature; -+ - Selective enable/disable of the averaging feature. -+ -+ Say 'y' here to statically link this module into the kernel or 'm' -+ to build it as a dinamically loadable module. The module will be -+ called twl4030-madc.ko -+ - config MFD_TMIO - bool - default n -diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile -index 85dc3a7..44350e7 100644 ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -29,6 +29,7 @@ obj-$(CONFIG_MENELAUS) += menelaus.o - obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o twl6030-irq.o - obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o - obj-$(CONFIG_TWL4030_CODEC) += twl4030-codec.o -+obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o - - obj-$(CONFIG_TPS65910_CORE) += tps65910-core.o - -diff --git a/drivers/mfd/twl4030-madc.c b/drivers/mfd/twl4030-madc.c -new file mode 100644 -index 0000000..7d83ab8 ---- /dev/null -+++ b/drivers/mfd/twl4030-madc.c -@@ -0,0 +1,536 @@ -+/* -+ * TWL4030 MADC module driver -+ * -+ * Copyright (C) 2008 Nokia Corporation -+ * Mikko Ylinen <mikko.k.ylinen@nokia.com> -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA -+ * 02110-1301 USA -+ * -+ */ -+ -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/kernel.h> -+#include <linux/types.h> -+#include <linux/module.h> -+#include <linux/delay.h> -+#include <linux/fs.h> -+#include <linux/platform_device.h> -+#include <linux/miscdevice.h> -+#include <linux/i2c/twl4030.h> -+#include <linux/i2c/twl4030-madc.h> -+ -+#include <asm/uaccess.h> -+ -+#define TWL4030_MADC_PFX "twl4030-madc: " -+ -+struct twl4030_madc_data { -+ struct device *dev; -+ struct mutex lock; -+ struct work_struct ws; -+ struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS]; -+ int imr; -+ int isr; -+}; -+ -+static struct twl4030_madc_data *the_madc; -+ -+static -+const struct twl4030_madc_conversion_method twl4030_conversion_methods[] = { -+ [TWL4030_MADC_RT] = { -+ .sel = TWL4030_MADC_RTSELECT_LSB, -+ .avg = TWL4030_MADC_RTAVERAGE_LSB, -+ .rbase = TWL4030_MADC_RTCH0_LSB, -+ }, -+ [TWL4030_MADC_SW1] = { -+ .sel = TWL4030_MADC_SW1SELECT_LSB, -+ .avg = TWL4030_MADC_SW1AVERAGE_LSB, -+ .rbase = TWL4030_MADC_GPCH0_LSB, -+ .ctrl = TWL4030_MADC_CTRL_SW1, -+ }, -+ [TWL4030_MADC_SW2] = { -+ .sel = TWL4030_MADC_SW2SELECT_LSB, -+ .avg = TWL4030_MADC_SW2AVERAGE_LSB, -+ .rbase = TWL4030_MADC_GPCH0_LSB, -+ .ctrl = TWL4030_MADC_CTRL_SW2, -+ }, -+}; -+ -+static int twl4030_madc_read(struct twl4030_madc_data *madc, u8 reg) -+{ -+ int ret; -+ u8 val; -+ -+ ret = twl4030_i2c_read_u8(TWL4030_MODULE_MADC, &val, reg); -+ if (ret) { -+ dev_dbg(madc->dev, "unable to read register 0x%X\n", reg); -+ return ret; -+ } -+ -+ return val; -+} -+ -+static void twl4030_madc_write(struct twl4030_madc_data *madc, u8 reg, u8 val) -+{ -+ int ret; -+ -+ ret = twl4030_i2c_write_u8(TWL4030_MODULE_MADC, val, reg); -+ if (ret) -+ dev_err(madc->dev, "unable to write register 0x%X\n", reg); -+} -+ -+static int twl4030_madc_channel_raw_read(struct twl4030_madc_data *madc, u8 reg) -+{ -+ u8 msb, lsb; -+ -+ /* For each ADC channel, we have MSB and LSB register pair. MSB address -+ * is always LSB address+1. reg parameter is the addr of LSB register */ -+ msb = twl4030_madc_read(madc, reg + 1); -+ lsb = twl4030_madc_read(madc, reg); -+ -+ return (int)(((msb << 8) | lsb) >> 6); -+} -+ -+static int twl4030_madc_read_channels(struct twl4030_madc_data *madc, -+ u8 reg_base, u16 channels, int *buf) -+{ -+ int count = 0; -+ u8 reg, i; -+ -+ if (unlikely(!buf)) -+ return 0; -+ -+ for (i = 0; i < TWL4030_MADC_MAX_CHANNELS; i++) { -+ if (channels & (1<<i)) { -+ reg = reg_base + 2*i; -+ buf[i] = twl4030_madc_channel_raw_read(madc, reg); -+ count++; -+ } -+ } -+ return count; -+} -+ -+static void twl4030_madc_enable_irq(struct twl4030_madc_data *madc, int id) -+{ -+ u8 val; -+ -+ val = twl4030_madc_read(madc, madc->imr); -+ val &= ~(1 << id); -+ twl4030_madc_write(madc, madc->imr, val); -+} -+ -+static void twl4030_madc_disable_irq(struct twl4030_madc_data *madc, int id) -+{ -+ u8 val; -+ -+ val = twl4030_madc_read(madc, madc->imr); -+ val |= (1 << id); -+ twl4030_madc_write(madc, madc->imr, val); -+} -+ -+static irqreturn_t twl4030_madc_irq_handler(int irq, void *_madc) -+{ -+ struct twl4030_madc_data *madc = _madc; -+ u8 isr_val, imr_val; -+ int i; -+ -+#ifdef CONFIG_LOCKDEP -+ /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which -+ * we don't want and can't tolerate. Although it might be -+ * friendlier not to borrow this thread context... -+ */ -+ local_irq_enable(); -+#endif -+ -+ /* Use COR to ack interrupts since we have no shared IRQs in ISRx */ -+ isr_val = twl4030_madc_read(madc, madc->isr); -+ imr_val = twl4030_madc_read(madc, madc->imr); -+ -+ isr_val &= ~imr_val; -+ -+ for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) { -+ -+ if (!(isr_val & (1<<i))) -+ continue; -+ -+ twl4030_madc_disable_irq(madc, i); -+ madc->requests[i].result_pending = 1; -+ } -+ -+ schedule_work(&madc->ws); -+ -+ return IRQ_HANDLED; -+} -+ -+static void twl4030_madc_work(struct work_struct *ws) -+{ -+ const struct twl4030_madc_conversion_method *method; -+ struct twl4030_madc_data *madc; -+ struct twl4030_madc_request *r; -+ int len, i; -+ -+ madc = container_of(ws, struct twl4030_madc_data, ws); -+ mutex_lock(&madc->lock); -+ -+ for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) { -+ -+ r = &madc->requests[i]; -+ -+ /* No pending results for this method, move to next one */ -+ if (!r->result_pending) -+ continue; -+ -+ method = &twl4030_conversion_methods[r->method]; -+ -+ /* Read results */ -+ len = twl4030_madc_read_channels(madc, method->rbase, -+ r->channels, r->rbuf); -+ -+ /* Return results to caller */ -+ if (r->func_cb != NULL) { -+ r->func_cb(len, r->channels, r->rbuf); -+ r->func_cb = NULL; -+ } -+ -+ /* Free request */ -+ r->result_pending = 0; -+ r->active = 0; -+ } -+ -+ mutex_unlock(&madc->lock); -+} -+ -+static int twl4030_madc_set_irq(struct twl4030_madc_data *madc, -+ struct twl4030_madc_request *req) -+{ -+ struct twl4030_madc_request *p; -+ -+ p = &madc->requests[req->method]; -+ -+ memcpy(p, req, sizeof *req); -+ -+ twl4030_madc_enable_irq(madc, req->method); -+ -+ return 0; -+} -+ -+static inline void twl4030_madc_start_conversion(struct twl4030_madc_data *madc, -+ int conv_method) -+{ -+ const struct twl4030_madc_conversion_method *method; -+ -+ method = &twl4030_conversion_methods[conv_method]; -+ -+ switch (conv_method) { -+ case TWL4030_MADC_SW1: -+ case TWL4030_MADC_SW2: -+ twl4030_madc_write(madc, method->ctrl, TWL4030_MADC_SW_START); -+ break; -+ case TWL4030_MADC_RT: -+ default: -+ break; -+ } -+} -+ -+static int twl4030_madc_wait_conversion_ready( -+ struct twl4030_madc_data *madc, -+ unsigned int timeout_ms, u8 status_reg) -+{ -+ unsigned long timeout; -+ -+ timeout = jiffies + msecs_to_jiffies(timeout_ms); -+ do { -+ u8 reg; -+ -+ reg = twl4030_madc_read(madc, status_reg); -+ if (!(reg & TWL4030_MADC_BUSY) && (reg & TWL4030_MADC_EOC_SW)) -+ return 0; -+ } while (!time_after(jiffies, timeout)); -+ -+ return -EAGAIN; -+} -+ -+int twl4030_madc_conversion(struct twl4030_madc_request *req) -+{ -+ const struct twl4030_madc_conversion_method *method; -+ u8 ch_msb, ch_lsb; -+ int ret; -+ -+ if (unlikely(!req)) -+ return -EINVAL; -+ -+ mutex_lock(&the_madc->lock); -+ -+ /* Do we have a conversion request ongoing */ -+ if (the_madc->requests[req->method].active) { -+ ret = -EBUSY; -+ goto out; -+ } -+ -+ ch_msb = (req->channels >> 8) & 0xff; -+ ch_lsb = req->channels & 0xff; -+ -+ method = &twl4030_conversion_methods[req->method]; -+ -+ /* Select channels to be converted */ -+ twl4030_madc_write(the_madc, method->sel + 1, ch_msb); -+ twl4030_madc_write(the_madc, method->sel, ch_lsb); -+ -+ /* Select averaging for all channels if do_avg is set */ -+ if (req->do_avg) { -+ twl4030_madc_write(the_madc, method->avg + 1, ch_msb); -+ twl4030_madc_write(the_madc, method->avg, ch_lsb); -+ } -+ -+ if ((req->type == TWL4030_MADC_IRQ_ONESHOT) && (req->func_cb != NULL)) { -+ twl4030_madc_set_irq(the_madc, req); -+ twl4030_madc_start_conversion(the_madc, req->method); -+ the_madc->requests[req->method].active = 1; -+ ret = 0; -+ goto out; -+ } -+ -+ /* With RT method we should not be here anymore */ -+ if (req->method == TWL4030_MADC_RT) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ twl4030_madc_start_conversion(the_madc, req->method); -+ the_madc->requests[req->method].active = 1; -+ -+ /* Wait until conversion is ready (ctrl register returns EOC) */ -+ ret = twl4030_madc_wait_conversion_ready(the_madc, 5, method->ctrl); -+ if (ret) { -+ dev_dbg(the_madc->dev, "conversion timeout!\n"); -+ the_madc->requests[req->method].active = 0; -+ goto out; -+ } -+ -+ ret = twl4030_madc_read_channels(the_madc, method->rbase, req->channels, -+ req->rbuf); -+ -+ the_madc->requests[req->method].active = 0; -+ -+out: -+ mutex_unlock(&the_madc->lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL(twl4030_madc_conversion); -+ -+static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc, -+ int chan, int on) -+{ -+ int ret; -+ u8 regval; -+ -+ /* Current generator is only available for ADCIN0 and ADCIN1. NB: -+ * ADCIN1 current generator only works when AC or VBUS is present */ -+ if (chan > 1) -+ return EINVAL; -+ -+ ret = twl4030_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, -+ ®val, TWL4030_BCI_BCICTL1); -+ if (on) -+ regval |= (chan) ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN; -+ else -+ regval &= (chan) ? ~TWL4030_BCI_ITHEN : ~TWL4030_BCI_TYPEN; -+ ret = twl4030_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, -+ regval, TWL4030_BCI_BCICTL1); -+ -+ return ret; -+} -+ -+static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on) -+{ -+ u8 regval; -+ -+ regval = twl4030_madc_read(madc, TWL4030_MADC_CTRL1); -+ if (on) -+ regval |= TWL4030_MADC_MADCON; -+ else -+ regval &= ~TWL4030_MADC_MADCON; -+ twl4030_madc_write(madc, TWL4030_MADC_CTRL1, regval); -+ -+ return 0; -+} -+ -+static long twl4030_madc_ioctl(struct file *filp, unsigned int cmd, -+ unsigned long arg) -+{ -+ struct twl4030_madc_user_parms par; -+ int val, ret; -+ -+ ret = copy_from_user(&par, (void __user *) arg, sizeof(par)); -+ if (ret) { -+ dev_dbg(the_madc->dev, "copy_from_user: %d\n", ret); -+ return -EACCES; -+ } -+ -+ switch (cmd) { -+ case TWL4030_MADC_IOCX_ADC_RAW_READ: { -+ struct twl4030_madc_request req; -+ if (par.channel >= TWL4030_MADC_MAX_CHANNELS) -+ return -EINVAL; -+ -+ req.channels = (1 << par.channel); -+ req.do_avg = par.average; -+ req.method = TWL4030_MADC_SW1; -+ req.func_cb = NULL; -+ -+ val = twl4030_madc_conversion(&req); -+ if (val <= 0) { -+ par.status = -1; -+ } else { -+ par.status = 0; -+ par.result = (u16)req.rbuf[par.channel]; -+ } -+ break; -+ } -+ default: -+ return -EINVAL; -+ } -+ -+ ret = copy_to_user((void __user *) arg, &par, sizeof(par)); -+ if (ret) { -+ dev_dbg(the_madc->dev, "copy_to_user: %d\n", ret); -+ return -EACCES; -+ } -+ -+ return 0; -+} -+ -+static struct file_operations twl4030_madc_fileops = { -+ .owner = THIS_MODULE, -+ .unlocked_ioctl = twl4030_madc_ioctl -+}; -+ -+static struct miscdevice twl4030_madc_device = { -+ .minor = MISC_DYNAMIC_MINOR, -+ .name = "twl4030-madc", -+ .fops = &twl4030_madc_fileops -+}; -+ -+static int __init twl4030_madc_probe(struct platform_device *pdev) -+{ -+ struct twl4030_madc_data *madc; -+ struct twl4030_madc_platform_data *pdata = pdev->dev.platform_data; -+ int ret; -+ u8 regval; -+ -+ madc = kzalloc(sizeof *madc, GFP_KERNEL); -+ if (!madc) -+ return -ENOMEM; -+ -+ if (!pdata) { -+ dev_dbg(&pdev->dev, "platform_data not available\n"); -+ ret = -EINVAL; -+ goto err_pdata; -+ } -+ -+ madc->imr = (pdata->irq_line == 1) ? TWL4030_MADC_IMR1 : TWL4030_MADC_IMR2; -+ madc->isr = (pdata->irq_line == 1) ? TWL4030_MADC_ISR1 : TWL4030_MADC_ISR2; -+ -+ ret = misc_register(&twl4030_madc_device); -+ if (ret) { -+ dev_dbg(&pdev->dev, "could not register misc_device\n"); -+ goto err_misc; -+ } -+ twl4030_madc_set_power(madc, 1); -+ twl4030_madc_set_current_generator(madc, 0, 1); -+ -+ /* Enable ADCIN3 through 6 */ -+ ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, -+ ®val, TWL4030_USB_CARKIT_ANA_CTRL); -+ -+ regval |= TWL4030_USB_SEL_MADC_MCPC; -+ -+ ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, -+ regval, TWL4030_USB_CARKIT_ANA_CTRL); -+ -+ -+ ret = twl4030_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, -+ ®val, TWL4030_BCI_BCICTL1); -+ -+ regval |= TWL4030_BCI_MESBAT; -+ -+ ret = twl4030_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, -+ regval, TWL4030_BCI_BCICTL1); -+ -+ ret = request_irq(platform_get_irq(pdev, 0), twl4030_madc_irq_handler, -+ 0, "twl4030_madc", madc); -+ if (ret) { -+ dev_dbg(&pdev->dev, "could not request irq\n"); -+ goto err_irq; -+ } -+ -+ platform_set_drvdata(pdev, madc); -+ mutex_init(&madc->lock); -+ INIT_WORK(&madc->ws, twl4030_madc_work); -+ -+ the_madc = madc; -+ -+ return 0; -+ -+err_irq: -+ misc_deregister(&twl4030_madc_device); -+ -+err_misc: -+err_pdata: -+ kfree(madc); -+ -+ return ret; -+} -+ -+static int __exit twl4030_madc_remove(struct platform_device *pdev) -+{ -+ struct twl4030_madc_data *madc = platform_get_drvdata(pdev); -+ -+ twl4030_madc_set_power(madc, 0); -+ twl4030_madc_set_current_generator(madc, 0, 0); -+ free_irq(platform_get_irq(pdev, 0), madc); -+ cancel_work_sync(&madc->ws); -+ misc_deregister(&twl4030_madc_device); -+ -+ return 0; -+} -+ -+static struct platform_driver twl4030_madc_driver = { -+ .probe = twl4030_madc_probe, -+ .remove = __exit_p(twl4030_madc_remove), -+ .driver = { -+ .name = "twl4030_madc", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init twl4030_madc_init(void) -+{ -+ return platform_driver_register(&twl4030_madc_driver); -+} -+module_init(twl4030_madc_init); -+ -+static void __exit twl4030_madc_exit(void) -+{ -+ platform_driver_unregister(&twl4030_madc_driver); -+} -+module_exit(twl4030_madc_exit); -+ -+MODULE_ALIAS("platform:twl4030-madc"); -+MODULE_AUTHOR("Nokia Corporation"); -+MODULE_DESCRIPTION("twl4030 ADC driver"); -+MODULE_LICENSE("GPL"); -+ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0020-ARM-OMAP-Add-missing-twl4030-madc-header-file.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0020-ARM-OMAP-Add-missing-twl4030-madc-header-file.patch deleted file mode 100644 index 0e1bdaf..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0020-ARM-OMAP-Add-missing-twl4030-madc-header-file.patch +++ /dev/null @@ -1,149 +0,0 @@ -From b13ea241d699a10e3f5347a90bc3d31329f3601d Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 15:54:58 -0800 -Subject: [PATCH 20/45] ARM: OMAP: Add missing twl4030 madc header file - ---- - include/linux/i2c/twl4030-madc.h | 130 ++++++++++++++++++++++++++++++++++++++ - 1 files changed, 130 insertions(+), 0 deletions(-) - create mode 100644 include/linux/i2c/twl4030-madc.h - -diff --git a/include/linux/i2c/twl4030-madc.h b/include/linux/i2c/twl4030-madc.h -new file mode 100644 -index 0000000..341a665 ---- /dev/null -+++ b/include/linux/i2c/twl4030-madc.h -@@ -0,0 +1,130 @@ -+/* -+ * include/linux/i2c/twl4030-madc.h -+ * -+ * TWL4030 MADC module driver header -+ * -+ * Copyright (C) 2008 Nokia Corporation -+ * Mikko Ylinen <mikko.k.ylinen@nokia.com> -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA -+ * 02110-1301 USA -+ * -+ */ -+ -+#ifndef _TWL4030_MADC_H -+#define _TWL4030_MADC_H -+ -+struct twl4030_madc_conversion_method { -+ u8 sel; -+ u8 avg; -+ u8 rbase; -+ u8 ctrl; -+}; -+ -+#define TWL4030_MADC_MAX_CHANNELS 16 -+ -+struct twl4030_madc_request { -+ u16 channels; -+ u16 do_avg; -+ u16 method; -+ u16 type; -+ int active; -+ int result_pending; -+ int rbuf[TWL4030_MADC_MAX_CHANNELS]; -+ void (*func_cb)(int len, int channels, int *buf); -+}; -+ -+enum conversion_methods { -+ TWL4030_MADC_RT, -+ TWL4030_MADC_SW1, -+ TWL4030_MADC_SW2, -+ TWL4030_MADC_NUM_METHODS -+}; -+ -+enum sample_type { -+ TWL4030_MADC_WAIT, -+ TWL4030_MADC_IRQ_ONESHOT, -+ TWL4030_MADC_IRQ_REARM -+}; -+ -+#define TWL4030_MADC_CTRL1 0x00 -+#define TWL4030_MADC_CTRL2 0x01 -+ -+#define TWL4030_MADC_RTSELECT_LSB 0x02 -+#define TWL4030_MADC_SW1SELECT_LSB 0x06 -+#define TWL4030_MADC_SW2SELECT_LSB 0x0A -+ -+#define TWL4030_MADC_RTAVERAGE_LSB 0x04 -+#define TWL4030_MADC_SW1AVERAGE_LSB 0x08 -+#define TWL4030_MADC_SW2AVERAGE_LSB 0x0C -+ -+#define TWL4030_MADC_CTRL_SW1 0x12 -+#define TWL4030_MADC_CTRL_SW2 0x13 -+ -+#define TWL4030_MADC_RTCH0_LSB 0x17 -+#define TWL4030_MADC_GPCH0_LSB 0x37 -+ -+#define TWL4030_MADC_MADCON (1<<0) /* MADC power on */ -+#define TWL4030_MADC_BUSY (1<<0) /* MADC busy */ -+#define TWL4030_MADC_EOC_SW (1<<1) /* MADC conversion completion */ -+#define TWL4030_MADC_SW_START (1<<5) /* MADC SWx start conversion */ -+ -+#define TWL4030_MADC_ADCIN0 (1<<0) -+#define TWL4030_MADC_ADCIN1 (1<<1) -+#define TWL4030_MADC_ADCIN2 (1<<2) -+#define TWL4030_MADC_ADCIN3 (1<<3) -+#define TWL4030_MADC_ADCIN4 (1<<4) -+#define TWL4030_MADC_ADCIN5 (1<<5) -+#define TWL4030_MADC_ADCIN6 (1<<6) -+#define TWL4030_MADC_ADCIN7 (1<<7) -+#define TWL4030_MADC_ADCIN8 (1<<8) -+#define TWL4030_MADC_ADCIN9 (1<<9) -+#define TWL4030_MADC_ADCIN10 (1<<10) -+#define TWL4030_MADC_ADCIN11 (1<<11) -+#define TWL4030_MADC_ADCIN12 (1<<12) -+#define TWL4030_MADC_ADCIN13 (1<<13) -+#define TWL4030_MADC_ADCIN14 (1<<14) -+#define TWL4030_MADC_ADCIN15 (1<<15) -+ -+/* Fixed channels */ -+#define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1 -+#define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8 -+#define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9 -+#define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10 -+#define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11 -+#define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12 -+ -+/* BCI related - XXX To be moved elsewhere */ -+#define TWL4030_BCI_BCICTL1 0x23 -+#define TWL4030_BCI_MESBAT (1<<1) -+#define TWL4030_BCI_TYPEN (1<<4) -+#define TWL4030_BCI_ITHEN (1<<3) -+ -+/* USB related - XXX To be moved elsewhere */ -+#define TWL4030_USB_CARKIT_ANA_CTRL 0xBB -+#define TWL4030_USB_SEL_MADC_MCPC (1<<3) -+ -+#define TWL4030_MADC_IOC_MAGIC '`' -+#define TWL4030_MADC_IOCX_ADC_RAW_READ _IO(TWL4030_MADC_IOC_MAGIC, 0) -+ -+struct twl4030_madc_user_parms { -+ int channel; -+ int average; -+ int status; -+ u16 result; -+}; -+ -+int twl4030_madc_conversion(struct twl4030_madc_request *conv); -+ -+#endif --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0021-ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0021-ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch deleted file mode 100644 index e1515e1..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0021-ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 6b34060f2a665d94e953a7a9b3d66a79e1736cd6 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 14:27:15 -0800 -Subject: [PATCH 21/45] ARM: OMAP: Add twl4030 madc support to Overo - ---- - arch/arm/mach-omap2/board-overo.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 6204b8c..9c76588 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -390,10 +390,15 @@ static struct twl4030_codec_data overo_codec_data = { - - /* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */ - -+static struct twl4030_madc_platform_data overo_madc_data = { -+ .irq_line = 1, -+}; -+ - static struct twl4030_platform_data overo_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - .gpio = &overo_gpio_data, -+ .madc = &overo_madc_data, - .usb = &overo_usb_data, - .codec = &overo_codec_data, - .vmmc1 = &overo_vmmc1, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0022-ARM-OMAP-Add-twl4030-madc-support-to-Beagle.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0022-ARM-OMAP-Add-twl4030-madc-support-to-Beagle.patch deleted file mode 100644 index 48e777b..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0022-ARM-OMAP-Add-twl4030-madc-support-to-Beagle.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 04101f4527b88fbd540fc89f2a8af06d26030fd1 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 14:32:36 -0800 -Subject: [PATCH 22/45] ARM: OMAP: Add twl4030 madc support to Beagle - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index b3c8cb7..dd830b1 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -473,6 +473,10 @@ static struct twl4030_codec_data beagle_codec_data = { - .audio = &beagle_audio_data, - }; - -+static struct twl4030_madc_platform_data beagle_madc_data = { -+ .irq_line = 1, -+}; -+ - static struct twl4030_platform_data beagle_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, -@@ -481,6 +485,7 @@ static struct twl4030_platform_data beagle_twldata = { - .usb = &beagle_usb_data, - .gpio = &beagle_gpio_data, - .codec = &beagle_codec_data, -+ .madc = &beagle_madc_data, - .vmmc1 = &beagle_vmmc1, - .vsim = &beagle_vsim, - .vdac = &beagle_vdac, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0023-netdev-rt73usb-add-vendor-device-ID-for-Ceiva-Wirele.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0023-netdev-rt73usb-add-vendor-device-ID-for-Ceiva-Wirele.patch deleted file mode 100644 index e5ba1d1..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0023-netdev-rt73usb-add-vendor-device-ID-for-Ceiva-Wirele.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 6c58da582504f23256ec656a03706a1df438f291 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Tue, 19 Jan 2010 20:00:46 -0800 -Subject: [PATCH 23/45] netdev: rt73usb - add vendor/device ID for Ceiva Wireless PartNo 81726-00702 - ---- - drivers/net/wireless/rt2x00/rt73usb.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c -index ced3b6a..719ac0a 100644 ---- a/drivers/net/wireless/rt2x00/rt73usb.c -+++ b/drivers/net/wireless/rt2x00/rt73usb.c -@@ -2357,6 +2357,8 @@ static struct usb_device_id rt73usb_device_table[] = { - { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) }, - { USB_DEVICE(0x0411, 0x0116), USB_DEVICE_DATA(&rt73usb_ops) }, - { USB_DEVICE(0x0411, 0x0119), USB_DEVICE_DATA(&rt73usb_ops) }, -+ /* Ceiva Wireless PartNo 81726-00702 */ -+ { USB_DEVICE(0x178d, 0x02be), USB_DEVICE_DATA(&rt73usb_ops) }, - /* CNet */ - { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) }, - { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) }, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0024-mmc-don-t-display-single-block-read-console-messages.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0024-mmc-don-t-display-single-block-read-console-messages.patch deleted file mode 100644 index 4b4e54f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0024-mmc-don-t-display-single-block-read-console-messages.patch +++ /dev/null @@ -1,28 +0,0 @@ -From b17b11c0f8d56f868da267641486b62e1a44790b Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Mon, 4 Jan 2010 19:20:25 -0800 -Subject: [PATCH 24/45] mmc: don't display single block read console messages - -mmc: don't display single block read console messages ---- - drivers/mmc/card/block.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c -index 85f0e8c..05492e9 100644 ---- a/drivers/mmc/card/block.c -+++ b/drivers/mmc/card/block.c -@@ -338,8 +338,8 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) - if (brq.cmd.error || brq.data.error || brq.stop.error) { - if (brq.data.blocks > 1 && rq_data_dir(req) == READ) { - /* Redo read one sector at a time */ -- printk(KERN_WARNING "%s: retrying using single " -- "block read\n", req->rq_disk->disk_name); -+ /* printk(KERN_WARNING "%s: retrying using single " -+ "block read\n", req->rq_disk->disk_name); */ - disable_multi = 1; - continue; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0025-ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0025-ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch deleted file mode 100644 index 78666fb..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0025-ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 297f577635fe0182e596112c33b213fd22b4efa7 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Sun, 24 Jan 2010 09:33:56 -0800 -Subject: [PATCH 25/45] ARM: OMAP2: mmc-twl4030: move clock input selection prior to vcc test - -otherwise it is not executed on systems that use non-twl regulators ---- - arch/arm/mach-omap2/mmc-twl4030.c | 16 ++++++++-------- - 1 files changed, 8 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c -index 0c3c72d..dbdafb9 100644 ---- a/arch/arm/mach-omap2/mmc-twl4030.c -+++ b/arch/arm/mach-omap2/mmc-twl4030.c -@@ -302,6 +302,14 @@ static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int v - if (c == NULL) - return -ENODEV; - -+ if (mmc->slots[0].internal_clock) { -+ u32 reg; -+ -+ reg = omap_ctrl_readl(control_devconf1_offset); -+ reg |= OMAP2_MMCSDIO2ADPCLKISEL; -+ omap_ctrl_writel(reg, control_devconf1_offset); -+ } -+ - /* If we don't see a Vcc regulator, assume it's a fixed - * voltage always-on regulator. - */ -@@ -322,14 +330,6 @@ static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int v - * chips/cards need an interface voltage rail too. - */ - if (power_on) { -- /* only MMC2 supports a CLKIN */ -- if (mmc->slots[0].internal_clock) { -- u32 reg; -- -- reg = omap_ctrl_readl(control_devconf1_offset); -- reg |= OMAP2_MMCSDIO2ADPCLKISEL; -- omap_ctrl_writel(reg, control_devconf1_offset); -- } - ret = mmc_regulator_set_ocr(c->vcc, vdd); - /* enable interface voltage rail, if needed */ - if (ret == 0 && c->vcc_aux) { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0026-board-overo-add-PM-code-and-sync-with-http-www.sakom.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0026-board-overo-add-PM-code-and-sync-with-http-www.sakom.patch deleted file mode 100644 index 53bfbe0..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0026-board-overo-add-PM-code-and-sync-with-http-www.sakom.patch +++ /dev/null @@ -1,373 +0,0 @@ -From 1f91f7f6dea0268e23d5e3e78b6c8dc5ed245313 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Sun, 14 Feb 2010 12:52:02 +0100 -Subject: [PATCH 26/45] board-overo: add PM code and sync with http://www.sakoman.com/cgi-bin/gitweb.cgi?p=linux-omap-2.6.git;a=shortlog;h=refs/heads/omap3-2.6.32 - ---- - arch/arm/mach-omap2/board-overo.c | 274 ++++++++++++++++++++++++++++++++----- - 1 files changed, 242 insertions(+), 32 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c -index 9c76588..2595f81 100644 ---- a/arch/arm/mach-omap2/board-overo.c -+++ b/arch/arm/mach-omap2/board-overo.c -@@ -28,6 +28,7 @@ - #include <linux/platform_device.h> - #include <linux/i2c/twl.h> - #include <linux/regulator/machine.h> -+#include <linux/spi/spi.h> - - #include <linux/mtd/mtd.h> - #include <linux/mtd/nand.h> -@@ -40,16 +41,24 @@ - - #include <plat/board.h> - #include <plat/common.h> -+#include <plat/display.h> - #include <mach/gpio.h> - #include <plat/gpmc.h> - #include <mach/hardware.h> - #include <plat/nand.h> -+#include <plat/mcspi.h> - #include <plat/usb.h> -- --#include "mux.h" -+#include <plat/clock.h> -+#include <plat/omap-pm.h> -+ - #include "sdram-micron-mt46h32m32lf-6.h" - #include "mmc-twl4030.h" - -+#include "mux.h" -+ -+#include "pm.h" -+#include "omap3-opp.h" -+ - #define OVERO_GPIO_BT_XGATE 15 - #define OVERO_GPIO_W2W_NRESET 16 - #define OVERO_GPIO_PENDOWN 114 -@@ -95,18 +104,6 @@ static struct ads7846_platform_data ads7846_config = { - .keep_vref_on = 1, - }; - --static struct spi_board_info overo_spi_board_info[] __initdata = { -- { -- .modalias = "ads7846", -- .bus_num = 1, -- .chip_select = 0, -- .max_speed_hz = 1500000, -- .controller_data = &ads7846_mcspi_config, -- .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), -- .platform_data = &ads7846_config, -- } --}; -- - static void __init overo_ads7846_init(void) - { - if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) && -@@ -116,9 +113,6 @@ static void __init overo_ads7846_init(void) - printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n"); - return; - } -- -- spi_register_board_info(overo_spi_board_info, -- ARRAY_SIZE(overo_spi_board_info)); - } - - #else -@@ -234,6 +228,169 @@ static inline void __init overo_init_smsc911x(void) - static inline void __init overo_init_smsc911x(void) { return; } - #endif - -+/* DSS */ -+static int lcd_enabled; -+static int dvi_enabled; -+ -+#define OVERO_GPIO_LCD_EN 144 -+#define OVERO_GPIO_LCD_BL 145 -+ -+static void __init overo_display_init(void) -+{ -+ if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) && -+ (gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0)) -+ gpio_export(OVERO_GPIO_LCD_EN, 0); -+ else -+ printk(KERN_ERR "could not obtain gpio for " -+ "OVERO_GPIO_LCD_EN\n"); -+ -+ if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) && -+ (gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0)) -+ gpio_export(OVERO_GPIO_LCD_BL, 0); -+ else -+ printk(KERN_ERR "could not obtain gpio for " -+ "OVERO_GPIO_LCD_BL\n"); -+} -+ -+static int overo_panel_enable_dvi(struct omap_dss_device *dssdev) -+{ -+ if (lcd_enabled) { -+ printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); -+ return -EINVAL; -+ } -+ dvi_enabled = 1; -+ -+ return 0; -+} -+ -+static void overo_panel_disable_dvi(struct omap_dss_device *dssdev) -+{ -+ dvi_enabled = 0; -+} -+ -+static struct omap_dss_device overo_dvi_device = { -+ .type = OMAP_DISPLAY_TYPE_DPI, -+ .name = "dvi", -+ .driver_name = "generic_panel", -+ .phy.dpi.data_lines = 24, -+ .platform_enable = overo_panel_enable_dvi, -+ .platform_disable = overo_panel_disable_dvi, -+}; -+ -+static int overo_panel_enable_tv(struct omap_dss_device *dssdev) -+{ -+#define ENABLE_VDAC_DEDICATED 0x03 -+#define ENABLE_VDAC_DEV_GRP 0x20 -+ -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ ENABLE_VDAC_DEDICATED, -+ TWL4030_VDAC_DEDICATED); -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP); -+ -+ return 0; -+} -+ -+static void overo_panel_disable_tv(struct omap_dss_device *dssdev) -+{ -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, -+ TWL4030_VDAC_DEDICATED); -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, -+ TWL4030_VDAC_DEV_GRP); -+} -+ -+static struct omap_dss_device overo_tv_device = { -+ .name = "tv", -+ .driver_name = "venc", -+ .type = OMAP_DISPLAY_TYPE_VENC, -+ .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, -+ .platform_enable = overo_panel_enable_tv, -+ .platform_disable = overo_panel_disable_tv, -+}; -+ -+static int overo_panel_enable_lcd(struct omap_dss_device *dssdev) -+{ -+ if (dvi_enabled) { -+ printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); -+ return -EINVAL; -+ } -+ -+ gpio_set_value(OVERO_GPIO_LCD_EN, 1); -+ gpio_set_value(OVERO_GPIO_LCD_BL, 1); -+ lcd_enabled = 1; -+ return 0; -+} -+ -+static void overo_panel_disable_lcd(struct omap_dss_device *dssdev) -+{ -+ gpio_set_value(OVERO_GPIO_LCD_EN, 0); -+ gpio_set_value(OVERO_GPIO_LCD_BL, 0); -+ lcd_enabled = 0; -+} -+ -+#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ -+ defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) -+static struct omap_dss_device overo_lcd35_device = { -+ .type = OMAP_DISPLAY_TYPE_DPI, -+ .name = "lcd35", -+ .driver_name = "lgphilips_lb035q02_panel", -+ .phy.dpi.data_lines = 24, -+ .panel.recommended_bpp = 16, -+ .platform_enable = overo_panel_enable_lcd, -+ .platform_disable = overo_panel_disable_lcd, -+}; -+#endif -+ -+#if defined(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C) || \ -+ defined(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C_MODULE) -+static struct omap_dss_device overo_lcd43_device = { -+ .type = OMAP_DISPLAY_TYPE_DPI, -+ .name = "lcd43", -+ .driver_name = "samsung_lte_panel", -+ .phy.dpi.data_lines = 24, -+ .panel.recommended_bpp = 16, -+ .platform_enable = overo_panel_enable_lcd, -+ .platform_disable = overo_panel_disable_lcd, -+}; -+#endif -+ -+static struct omap_dss_device *overo_dss_devices[] = { -+ &overo_dvi_device, -+ &overo_tv_device, -+#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ -+ defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) -+ &overo_lcd35_device, -+#endif -+#if defined(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C) || \ -+ defined(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C_MODULE) -+ &overo_lcd43_device, -+#endif -+}; -+ -+static struct omap_dss_board_info overo_dss_data = { -+ .num_devices = ARRAY_SIZE(overo_dss_devices), -+ .devices = overo_dss_devices, -+ .default_device = &overo_dvi_device, -+}; -+ -+static struct platform_device overo_dss_device = { -+ .name = "omapdss", -+ .id = -1, -+ .dev = { -+ .platform_data = &overo_dss_data, -+ }, -+}; -+ -+static struct regulator_consumer_supply overo_vdda_dac_supply = { -+ .supply = "vdda_dac", -+ .dev = &overo_dss_device.dev, -+}; -+ -+static struct regulator_consumer_supply overo_vdds_dsi_supply = { -+ .supply = "vdds_dsi", -+ .dev = &overo_dss_device.dev, -+}; -+ - static struct mtd_partition overo_nand_partitions[] = { - { - .name = "xloader", -@@ -379,6 +536,37 @@ static struct regulator_init_data overo_vmmc1 = { - .consumer_supplies = &overo_vmmc1_supply, - }; - -+/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ -+static struct regulator_init_data overo_vdac = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &overo_vdda_dac_supply, -+}; -+ -+/* VPLL2 for digital video outputs */ -+static struct regulator_init_data overo_vpll2 = { -+ .constraints = { -+ .name = "VDVI", -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &overo_vdds_dsi_supply, -+}; -+ -+/* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */ -+ - static struct twl4030_codec_audio_data overo_audio_data = { - .audio_mclk = 26000000, - }; -@@ -402,6 +590,8 @@ static struct twl4030_platform_data overo_twldata = { - .usb = &overo_usb_data, - .codec = &overo_codec_data, - .vmmc1 = &overo_vmmc1, -+ .vdac = &overo_vdac, -+ .vpll2 = &overo_vpll2, - }; - - static struct i2c_board_info __initdata overo_i2c_boardinfo[] = { -@@ -422,31 +612,50 @@ static int __init overo_i2c_init(void) - return 0; - } - --static struct platform_device overo_lcd_device = { -- .name = "overo_lcd", -- .id = -1, --}; -- --static struct omap_lcd_config overo_lcd_config __initdata = { -- .ctrl_name = "internal", -+static struct spi_board_info overo_spi_board_info[] __initdata = { -+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ -+ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) -+ { -+ .modalias = "ads7846", -+ .bus_num = 1, -+ .chip_select = 0, -+ .max_speed_hz = 1500000, -+ .controller_data = &ads7846_mcspi_config, -+ .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), -+ .platform_data = &ads7846_config, -+ }, -+#endif -+#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ -+ defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) -+ { -+ .modalias = "lgphilips_lb035q02_panel-spi", -+ .bus_num = 1, -+ .chip_select = 1, -+ .max_speed_hz = 500000, -+ .mode = SPI_MODE_3, -+ }, -+#endif - }; - --static struct omap_board_config_kernel overo_config[] __initdata = { -- { OMAP_TAG_LCD, &overo_lcd_config }, --}; -+static int __init overo_spi_init(void) -+{ -+ overo_ads7846_init(); -+ spi_register_board_info(overo_spi_board_info, -+ ARRAY_SIZE(overo_spi_board_info)); -+ return 0; -+} - - static void __init overo_init_irq(void) - { -- omap_board_config = overo_config; -- omap_board_config_size = ARRAY_SIZE(overo_config); - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -- mt46h32m32lf6_sdrc_params, NULL, NULL, NULL); -+ NULL, omap35x_mpu_rate_table, -+ omap35x_dsp_rate_table, omap35x_l3_rate_table); - omap_init_irq(); - omap_gpio_init(); - } - - static struct platform_device *overo_devices[] __initdata = { -- &overo_lcd_device, -+ &overo_dss_device, - }; - - static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { -@@ -477,8 +686,9 @@ static void __init overo_init(void) - overo_flash_init(); - usb_musb_init(); - usb_ehci_init(&ehci_pdata); -- overo_ads7846_init(); -+ overo_spi_init(); - overo_init_smsc911x(); -+ overo_display_init(); - - /* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0027-twl4030-madc-adjust-for-twl4030-twl-api-changes.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0027-twl4030-madc-adjust-for-twl4030-twl-api-changes.patch deleted file mode 100644 index 1f8fb06..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0027-twl4030-madc-adjust-for-twl4030-twl-api-changes.patch +++ /dev/null @@ -1,85 +0,0 @@ -From e102ffa8fcc1586ed7d4c1390b7b2c7d7d359c40 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Mon, 15 Feb 2010 14:20:51 +0100 -Subject: [PATCH 27/45] twl4030-madc: adjust for twl4030 -> twl api changes - ---- - drivers/mfd/twl4030-madc.c | 18 +++++++++--------- - 1 files changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/mfd/twl4030-madc.c b/drivers/mfd/twl4030-madc.c -index 7d83ab8..de6bdcd 100644 ---- a/drivers/mfd/twl4030-madc.c -+++ b/drivers/mfd/twl4030-madc.c -@@ -29,7 +29,7 @@ - #include <linux/fs.h> - #include <linux/platform_device.h> - #include <linux/miscdevice.h> --#include <linux/i2c/twl4030.h> -+#include <linux/i2c/twl.h> - #include <linux/i2c/twl4030-madc.h> - - #include <asm/uaccess.h> -@@ -73,7 +73,7 @@ static int twl4030_madc_read(struct twl4030_madc_data *madc, u8 reg) - int ret; - u8 val; - -- ret = twl4030_i2c_read_u8(TWL4030_MODULE_MADC, &val, reg); -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, reg); - if (ret) { - dev_dbg(madc->dev, "unable to read register 0x%X\n", reg); - return ret; -@@ -86,7 +86,7 @@ static void twl4030_madc_write(struct twl4030_madc_data *madc, u8 reg, u8 val) - { - int ret; - -- ret = twl4030_i2c_write_u8(TWL4030_MODULE_MADC, val, reg); -+ ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, reg); - if (ret) - dev_err(madc->dev, "unable to write register 0x%X\n", reg); - } -@@ -342,13 +342,13 @@ static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc, - if (chan > 1) - return EINVAL; - -- ret = twl4030_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, - ®val, TWL4030_BCI_BCICTL1); - if (on) - regval |= (chan) ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN; - else - regval &= (chan) ? ~TWL4030_BCI_ITHEN : ~TWL4030_BCI_TYPEN; -- ret = twl4030_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, -+ ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, - regval, TWL4030_BCI_BCICTL1); - - return ret; -@@ -453,21 +453,21 @@ static int __init twl4030_madc_probe(struct platform_device *pdev) - twl4030_madc_set_current_generator(madc, 0, 1); - - /* Enable ADCIN3 through 6 */ -- ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, -+ ret = twl_i2c_read_u8(TWL4030_MODULE_USB, - ®val, TWL4030_USB_CARKIT_ANA_CTRL); - - regval |= TWL4030_USB_SEL_MADC_MCPC; - -- ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, -+ ret = twl_i2c_write_u8(TWL4030_MODULE_USB, - regval, TWL4030_USB_CARKIT_ANA_CTRL); - - -- ret = twl4030_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, - ®val, TWL4030_BCI_BCICTL1); - - regval |= TWL4030_BCI_MESBAT; - -- ret = twl4030_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, -+ ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, - regval, TWL4030_BCI_BCICTL1); - - ret = request_irq(platform_get_irq(pdev, 0), twl4030_madc_irq_handler, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0028-OMAP-DSS2-Re-add-support-for-Samsung-lte430wq-f0c-pa.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0028-OMAP-DSS2-Re-add-support-for-Samsung-lte430wq-f0c-pa.patch deleted file mode 100644 index 58f4701..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0028-OMAP-DSS2-Re-add-support-for-Samsung-lte430wq-f0c-pa.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 5e227dbb55a40c616cca8a2345a159310c729897 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Mon, 15 Feb 2010 14:38:00 +0100 -Subject: [PATCH 28/45] OMAP: DSS2: (Re)add support for Samsung lte430wq-f0c panel - ---- - drivers/video/omap2/displays/Kconfig | 6 + - drivers/video/omap2/displays/Makefile | 1 + - .../omap2/displays/panel-samsung-lte430wq-f0c.c | 113 ++++++++++++++++++++ - 3 files changed, 120 insertions(+), 0 deletions(-) - create mode 100644 drivers/video/omap2/displays/panel-samsung-lte430wq-f0c.c - -diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig -index 4ce47dd..4229a28 100644 ---- a/drivers/video/omap2/displays/Kconfig -+++ b/drivers/video/omap2/displays/Kconfig -@@ -7,6 +7,12 @@ config PANEL_GENERIC - Generic panel driver. - Used for DVI output for Beagle and OMAP3 SDP. - -+config PANEL_SAMSUNG_LTE430WQ_F0C -+ tristate "Samsung LTE430WQ-F0C LCD Panel" -+ depends on OMAP2_DSS -+ help -+ LCD Panel used on Overo Palo43 -+ - config PANEL_SHARP_LS037V7DW01 - tristate "Sharp LS037V7DW01 LCD Panel" - depends on OMAP2_DSS -diff --git a/drivers/video/omap2/displays/Makefile b/drivers/video/omap2/displays/Makefile -index 8f3d0ad..9317445 100644 ---- a/drivers/video/omap2/displays/Makefile -+++ b/drivers/video/omap2/displays/Makefile -@@ -1,4 +1,5 @@ - obj-$(CONFIG_PANEL_GENERIC) += panel-generic.o -+obj-$(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C) += panel-samsung-lte430wq-f0c.o - obj-$(CONFIG_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o - obj-$(CONFIG_PANEL_SHARP_LQ043T1DG01) += panel-sharp-lq043t1dg01.o - -diff --git a/drivers/video/omap2/displays/panel-samsung-lte430wq-f0c.c b/drivers/video/omap2/displays/panel-samsung-lte430wq-f0c.c -new file mode 100644 -index 0000000..3f0477e ---- /dev/null -+++ b/drivers/video/omap2/displays/panel-samsung-lte430wq-f0c.c -@@ -0,0 +1,113 @@ -+/* -+ * LCD panel driver for Samsung LTE430WQ-F0C -+ * -+ * Author: Steve Sakoman <steve@sakoman.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program. If not, see <http://www.gnu.org/licenses/>. -+ */ -+ -+#include <linux/module.h> -+#include <linux/delay.h> -+ -+#include <plat/display.h> -+ -+static struct omap_video_timings samsung_lte_timings = { -+ .x_res = 480, -+ .y_res = 272, -+ -+ .pixel_clock = 9200, -+ -+ .hsw = 41, -+ .hfp = 8, -+ .hbp = 45-41, -+ -+ .vsw = 10, -+ .vfp = 4, -+ .vbp = 12-10, -+}; -+ -+static int samsung_lte_panel_probe(struct omap_dss_device *dssdev) -+{ -+ dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | -+ OMAP_DSS_LCD_IHS; -+ dssdev->panel.timings = samsung_lte_timings; -+ -+ return 0; -+} -+ -+static void samsung_lte_panel_remove(struct omap_dss_device *dssdev) -+{ -+} -+ -+static int samsung_lte_panel_enable(struct omap_dss_device *dssdev) -+{ -+ int r = 0; -+ -+ /* wait couple of vsyncs until enabling the LCD */ -+ msleep(50); -+ -+ if (dssdev->platform_enable) -+ r = dssdev->platform_enable(dssdev); -+ -+ return r; -+} -+ -+static void samsung_lte_panel_disable(struct omap_dss_device *dssdev) -+{ -+ if (dssdev->platform_disable) -+ dssdev->platform_disable(dssdev); -+ -+ /* wait at least 5 vsyncs after disabling the LCD */ -+ -+ msleep(100); -+} -+ -+static int samsung_lte_panel_suspend(struct omap_dss_device *dssdev) -+{ -+ samsung_lte_panel_disable(dssdev); -+ return 0; -+} -+ -+static int samsung_lte_panel_resume(struct omap_dss_device *dssdev) -+{ -+ return samsung_lte_panel_enable(dssdev); -+} -+ -+static struct omap_dss_driver samsung_lte_driver = { -+ .probe = samsung_lte_panel_probe, -+ .remove = samsung_lte_panel_remove, -+ -+ .enable = samsung_lte_panel_enable, -+ .disable = samsung_lte_panel_disable, -+ .suspend = samsung_lte_panel_suspend, -+ .resume = samsung_lte_panel_resume, -+ -+ .driver = { -+ .name = "samsung_lte_panel", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init samsung_lte_panel_drv_init(void) -+{ -+ return omap_dss_register_driver(&samsung_lte_driver); -+} -+ -+static void __exit samsung_lte_panel_drv_exit(void) -+{ -+ omap_dss_unregister_driver(&samsung_lte_driver); -+} -+ -+module_init(samsung_lte_panel_drv_init); -+module_exit(samsung_lte_panel_drv_exit); -+MODULE_LICENSE("GPL"); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0029-OMAP-DSS2-Add-support-for-LG-Philips-LB035Q02-panel.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0029-OMAP-DSS2-Add-support-for-LG-Philips-LB035Q02-panel.patch deleted file mode 100644 index 4f24fdd..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0029-OMAP-DSS2-Add-support-for-LG-Philips-LB035Q02-panel.patch +++ /dev/null @@ -1,254 +0,0 @@ -From e960b2c16c24198a669a7c49e6282333faa74a3e Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 17 Dec 2009 15:05:30 -0800 -Subject: [PATCH 29/45] OMAP: DSS2: Add support for LG Philips LB035Q02 panel - ---- - drivers/video/omap2/displays/Kconfig | 6 + - drivers/video/omap2/displays/Makefile | 1 + - .../omap2/displays/panel-lgphilips-lb035q02.c | 206 ++++++++++++++++++++ - 3 files changed, 213 insertions(+), 0 deletions(-) - create mode 100644 drivers/video/omap2/displays/panel-lgphilips-lb035q02.c - -diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig -index 4229a28..875250a 100644 ---- a/drivers/video/omap2/displays/Kconfig -+++ b/drivers/video/omap2/displays/Kconfig -@@ -7,6 +7,12 @@ config PANEL_GENERIC - Generic panel driver. - Used for DVI output for Beagle and OMAP3 SDP. - -+config PANEL_LGPHILIPS_LB035Q02 -+ tristate "LG.Philips LB035Q02 LCD Panel" -+ depends on OMAP2_DSS -+ help -+ LCD Panel used on Overo Palo35 -+ - config PANEL_SAMSUNG_LTE430WQ_F0C - tristate "Samsung LTE430WQ-F0C LCD Panel" - depends on OMAP2_DSS -diff --git a/drivers/video/omap2/displays/Makefile b/drivers/video/omap2/displays/Makefile -index 9317445..f8e6c52 100644 ---- a/drivers/video/omap2/displays/Makefile -+++ b/drivers/video/omap2/displays/Makefile -@@ -1,4 +1,5 @@ - obj-$(CONFIG_PANEL_GENERIC) += panel-generic.o -+obj-$(CONFIG_PANEL_LGPHILIPS_LB035Q02) += panel-lgphilips-lb035q02.o - obj-$(CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C) += panel-samsung-lte430wq-f0c.o - obj-$(CONFIG_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o - obj-$(CONFIG_PANEL_SHARP_LQ043T1DG01) += panel-sharp-lq043t1dg01.o -diff --git a/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c b/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c -new file mode 100644 -index 0000000..22dc865 ---- /dev/null -+++ b/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c -@@ -0,0 +1,206 @@ -+/* -+ * LCD panel driver for LG.Philips LB035Q02 -+ * -+ * Author: Steve Sakoman <steve@sakoman.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program. If not, see <http://www.gnu.org/licenses/>. -+ */ -+ -+#include <linux/module.h> -+#include <linux/delay.h> -+#include <linux/spi/spi.h> -+ -+#include <plat/display.h> -+ -+static struct spi_device *spidev; -+ -+static struct omap_video_timings lb035q02_timings = { -+ .x_res = 320, -+ .y_res = 240, -+ -+ .pixel_clock = 6500, -+ -+ .hsw = 2, -+ .hfp = 20, -+ .hbp = 68, -+ -+ .vsw = 2, -+ .vfp = 4, -+ .vbp = 18, -+}; -+ -+static int lb035q02_panel_probe(struct omap_dss_device *dssdev) -+{ -+ dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | -+ OMAP_DSS_LCD_IHS; -+ dssdev->panel.timings = lb035q02_timings; -+ -+ return 0; -+} -+ -+static void lb035q02_panel_remove(struct omap_dss_device *dssdev) -+{ -+} -+ -+static int lb035q02_write_reg(u8 reg, u16 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer index_xfer = { -+ .len = 3, -+ .cs_change = 1, -+ }; -+ struct spi_transfer value_xfer = { -+ .len = 3, -+ }; -+ u8 buffer[16]; -+ -+ spi_message_init(&msg); -+ -+ /* register index */ -+ buffer[0] = 0x70; -+ buffer[1] = 0x00; -+ buffer[2] = reg & 0x7f; -+ index_xfer.tx_buf = buffer; -+ spi_message_add_tail(&index_xfer, &msg); -+ -+ /* register value */ -+ buffer[4] = 0x72; -+ buffer[5] = val >> 8; -+ buffer[6] = val; -+ value_xfer.tx_buf = buffer + 4; -+ spi_message_add_tail(&value_xfer, &msg); -+ -+ return spi_sync(spidev, &msg); -+} -+ -+static int lb035q02_panel_enable(struct omap_dss_device *dssdev) -+{ -+ int r = 0; -+ -+ pr_info("lgphilips_lb035q02: panel_enable: 0x%08x\n", spidev); -+ /* wait couple of vsyncs until enabling the LCD */ -+ msleep(50); -+ -+ if (dssdev->platform_enable) -+ r = dssdev->platform_enable(dssdev); -+ -+ /* Panel init sequence from page 28 of the spec */ -+ lb035q02_write_reg(0x01, 0x6300); -+ lb035q02_write_reg(0x02, 0x0200); -+ lb035q02_write_reg(0x03, 0x0177); -+ lb035q02_write_reg(0x04, 0x04c7); -+ lb035q02_write_reg(0x05, 0xffc0); -+ lb035q02_write_reg(0x06, 0xe806); -+ lb035q02_write_reg(0x0a, 0x4008); -+ lb035q02_write_reg(0x0b, 0x0000); -+ lb035q02_write_reg(0x0d, 0x0030); -+ lb035q02_write_reg(0x0e, 0x2800); -+ lb035q02_write_reg(0x0f, 0x0000); -+ lb035q02_write_reg(0x16, 0x9f80); -+ lb035q02_write_reg(0x17, 0x0a0f); -+ lb035q02_write_reg(0x1e, 0x00c1); -+ lb035q02_write_reg(0x30, 0x0300); -+ lb035q02_write_reg(0x31, 0x0007); -+ lb035q02_write_reg(0x32, 0x0000); -+ lb035q02_write_reg(0x33, 0x0000); -+ lb035q02_write_reg(0x34, 0x0707); -+ lb035q02_write_reg(0x35, 0x0004); -+ lb035q02_write_reg(0x36, 0x0302); -+ lb035q02_write_reg(0x37, 0x0202); -+ lb035q02_write_reg(0x3a, 0x0a0d); -+ lb035q02_write_reg(0x3b, 0x0806); -+ -+ return r; -+} -+ -+static void lb035q02_panel_disable(struct omap_dss_device *dssdev) -+{ -+ if (dssdev->platform_disable) -+ dssdev->platform_disable(dssdev); -+ -+ /* wait at least 5 vsyncs after disabling the LCD */ -+ -+ msleep(100); -+} -+ -+static int lb035q02_panel_suspend(struct omap_dss_device *dssdev) -+{ -+ pr_info("lgphilips_lb035q02: panel_suspend\n"); -+ lb035q02_panel_disable(dssdev); -+ return 0; -+} -+ -+static int lb035q02_panel_resume(struct omap_dss_device *dssdev) -+{ -+ pr_info("lgphilips_lb035q02: panel_resume\n"); -+ return lb035q02_panel_enable(dssdev); -+} -+ -+static struct omap_dss_driver lb035q02_driver = { -+ .probe = lb035q02_panel_probe, -+ .remove = lb035q02_panel_remove, -+ -+ .enable = lb035q02_panel_enable, -+ .disable = lb035q02_panel_disable, -+ .suspend = lb035q02_panel_suspend, -+ .resume = lb035q02_panel_resume, -+ -+ .driver = { -+ .name = "lgphilips_lb035q02_panel", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __devinit lb035q02_panel_spi_probe(struct spi_device *spi) -+{ -+ spidev = spi; -+ return 0; -+} -+ -+static int __devexit lb035q02_panel_spi_remove(struct spi_device *spi) -+{ -+ return 0; -+} -+ -+static struct spi_driver lb035q02_spi_driver = { -+ .driver = { -+ .name = "lgphilips_lb035q02_panel-spi", -+ .owner = THIS_MODULE, -+ }, -+ .probe = lb035q02_panel_spi_probe, -+ .remove = __devexit_p (lb035q02_panel_spi_remove), -+}; -+ -+static int __init lb035q02_panel_drv_init(void) -+{ -+ int ret; -+ ret = spi_register_driver(&lb035q02_spi_driver); -+ if (ret != 0) -+ pr_err("lgphilips_lb035q02: Unable to register SPI driver: %d\n", ret); -+ -+ ret = omap_dss_register_driver(&lb035q02_driver); -+ if (ret != 0) -+ pr_err("lgphilips_lb035q02: Unable to register panel driver: %d\n", ret); -+ -+ return ret; -+} -+ -+static void __exit lb035q02_panel_drv_exit(void) -+{ -+ spi_unregister_driver(&lb035q02_spi_driver); -+ omap_dss_unregister_driver(&lb035q02_driver); -+} -+ -+module_init(lb035q02_panel_drv_init); -+module_exit(lb035q02_panel_drv_exit); -+MODULE_LICENSE("GPL"); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0030-Fix-for-bus-width-which-improves-SD-card-s-peformanc.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0030-Fix-for-bus-width-which-improves-SD-card-s-peformanc.patch deleted file mode 100644 index 306389e..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0030-Fix-for-bus-width-which-improves-SD-card-s-peformanc.patch +++ /dev/null @@ -1,32 +0,0 @@ -From ed355dc59a30638b914152d52752d5e0ca06ecbd Mon Sep 17 00:00:00 2001 -From: Kishore Kadiyala <kishore.kadiyala@ti.com> -Date: Wed, 17 Feb 2010 19:34:47 +0530 -Subject: [PATCH 30/45] Fix for bus width which improves SD card's peformance. - -This patch fixes bus width which improves peformance for SD cards. -OMAP-MMC controller's can support maximum bus width of '8'. -when bus width is mentioned as "8" in controller data,the SD -stack will check whether bus width is "4" and if not it will -set bus width to "1" and there by degrading peformance. - -Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> ---- - drivers/mmc/host/omap_hsmmc.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c -index fa94580..9646a75 100644 ---- a/drivers/mmc/host/omap_hsmmc.c -+++ b/drivers/mmc/host/omap_hsmmc.c -@@ -1776,7 +1776,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) - MMC_CAP_WAIT_WHILE_BUSY; - - if (mmc_slot(host).wires >= 8) -- mmc->caps |= MMC_CAP_8_BIT_DATA; -+ mmc->caps |= (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA); - else if (mmc_slot(host).wires >= 4) - mmc->caps |= MMC_CAP_4_BIT_DATA; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0031-ARM-VFP-add-support-to-sync-the-VFP-state-of-the-cur.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0031-ARM-VFP-add-support-to-sync-the-VFP-state-of-the-cur.patch deleted file mode 100644 index 28d9f37..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0031-ARM-VFP-add-support-to-sync-the-VFP-state-of-the-cur.patch +++ /dev/null @@ -1,109 +0,0 @@ -From b366c2810c736d8d544cf261f3354eebaf5e5655 Mon Sep 17 00:00:00 2001 -From: Imre Deak <imre.deak@nokia.com> -Date: Thu, 4 Feb 2010 21:38:02 +0200 -Subject: [PATCH 31/45] ARM: VFP: add support to sync the VFP state of the current thread - -ARM: VFP: add support to sync the VFP state of the current thread - -So far vfp_sync_state worked only for threads other than the current -one. This worked for tracing other threads, but not for PTRACE_TRACEME. -Syncing for the current thread will also be needed by an upcoming patch -adding support for VFP context save / restore around signal handlers. - -For SMP we need get_cpu now, since we have to protect the FPEXC -register, other than this things remained the same for threads other -than the current. - -Signed-off-by: Imre Deak <imre.deak@nokia.com> -Signed-off-by: Bryan Wu <bryan.wu@canonical.com> ---- - arch/arm/vfp/vfpmodule.c | 46 +++++++++++++++++++++++++++++++--------------- - 1 files changed, 31 insertions(+), 15 deletions(-) - -diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c -index aed05bc..f28f45b 100644 ---- a/arch/arm/vfp/vfpmodule.c -+++ b/arch/arm/vfp/vfpmodule.c -@@ -423,12 +423,19 @@ static inline void vfp_pm_init(void) { } - #endif /* CONFIG_PM */ - - /* -- * Synchronise the hardware VFP state of a thread other than current with the -- * saved one. This function is used by the ptrace mechanism. -+ * Synchronise the hardware VFP state of a thread with the saved one. -+ * This function is used by the ptrace mechanism and the signal handler path. - */ --#ifdef CONFIG_SMP - void vfp_sync_state(struct thread_info *thread) - { -+ unsigned int cpu = get_cpu(); -+ u32 fpexc = fmrx(FPEXC); -+ int vfp_enabled; -+ int self; -+ -+ vfp_enabled = fpexc & FPEXC_EN; -+ self = thread == current_thread_info(); -+#ifdef CONFIG_SMP - /* - * On SMP systems, the VFP state is automatically saved at every - * context switch. We mark the thread VFP state as belonging to a -@@ -436,18 +443,22 @@ void vfp_sync_state(struct thread_info *thread) - * needed. - */ - thread->vfpstate.hard.cpu = NR_CPUS; --} --#else --void vfp_sync_state(struct thread_info *thread) --{ -- unsigned int cpu = get_cpu(); -- u32 fpexc = fmrx(FPEXC); -- - /* -- * If VFP is enabled, the previous state was already saved and -- * last_VFP_context updated. -+ * Only the current thread's saved VFP context can be out-of-date. -+ * For others there is nothing else to do, since we already ensured -+ * force loading above. - */ -- if (fpexc & FPEXC_EN) -+ if (!self) -+ goto out; -+#endif -+ /* -+ * If the VFP is enabled only the current thread's saved VFP -+ * context can get out-of-date. For other threads the context -+ * was updated when the current thread started to use the VFP. -+ * This also means that the context will be reloaded next time -+ * the thread uses the VFP, so no need to enforce it. -+ */ -+ if (vfp_enabled && !self) - goto out; - - if (!last_VFP_context[cpu]) -@@ -456,8 +467,14 @@ void vfp_sync_state(struct thread_info *thread) - /* - * Save the last VFP state on this CPU. - */ -- fmxr(FPEXC, fpexc | FPEXC_EN); -+ if (!vfp_enabled) -+ fmxr(FPEXC, fpexc | FPEXC_EN); - vfp_save_state(last_VFP_context[cpu], fpexc); -+ /* -+ * Disable VFP in case it was enabled so that the force reload -+ * can happen. -+ */ -+ fpexc &= ~FPEXC_EN; - fmxr(FPEXC, fpexc); - - /* -@@ -469,7 +486,6 @@ void vfp_sync_state(struct thread_info *thread) - out: - put_cpu(); - } --#endif - - #include <linux/smp.h> - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0032-ARM-VFP-preserve-the-HW-context-when-calling-signal-.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0032-ARM-VFP-preserve-the-HW-context-when-calling-signal-.patch deleted file mode 100644 index f257130..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0032-ARM-VFP-preserve-the-HW-context-when-calling-signal-.patch +++ /dev/null @@ -1,211 +0,0 @@ -From 1be18045f852e78bf78d2042a5210c53d830f81b Mon Sep 17 00:00:00 2001 -From: Imre Deak <imre.deak@nokia.com> -Date: Thu, 4 Feb 2010 21:38:30 +0200 -Subject: [PATCH 32/45] ARM: VFP: preserve the HW context when calling signal handlers - -ARM: VFP: preserve the HW context when calling signal handlers - -Signal handlers can use floating point, so prevent them to corrupt -the main thread's VFP context. So far there were two signal stack -frame formats defined based on the VFP implementation, but the user -struct used for ptrace covers all posibilities, so use it for the -signal stack too. This patch extends the user struct and leaves -its magic number the same, in the hope that user space code does -not depend on its size and can parse the original regs w/o -problems. - -Support to save / restore the exception registers was added by -Will Deacon. - -Signed-off-by: Imre Deak <imre.deak@nokia.com> -Signed-off-by: Will Deacon <will.deacon@arm.com> -Signed-off-by: Bryan Wu <bryan.wu@canonical.com> ---- - arch/arm/include/asm/ucontext.h | 19 +++----- - arch/arm/include/asm/user.h | 3 + - arch/arm/kernel/signal.c | 91 +++++++++++++++++++++++++++++++++++++-- - 3 files changed, 97 insertions(+), 16 deletions(-) - -diff --git a/arch/arm/include/asm/ucontext.h b/arch/arm/include/asm/ucontext.h -index bf65e9f..1c3236b 100644 ---- a/arch/arm/include/asm/ucontext.h -+++ b/arch/arm/include/asm/ucontext.h -@@ -59,23 +59,18 @@ struct iwmmxt_sigframe { - #endif /* CONFIG_IWMMXT */ - - #ifdef CONFIG_VFP --#if __LINUX_ARM_ARCH__ < 6 --/* For ARM pre-v6, we use fstmiax and fldmiax. This adds one extra -- * word after the registers, and a word of padding at the end for -- * alignment. */ - #define VFP_MAGIC 0x56465001 --#define VFP_STORAGE_SIZE 152 --#else --#define VFP_MAGIC 0x56465002 --#define VFP_STORAGE_SIZE 144 --#endif - - struct vfp_sigframe - { - unsigned long magic; - unsigned long size; -- union vfp_state storage; --}; -+ struct user_vfp ufp; -+} __attribute__((__aligned__(8))); -+ -+/* 8 byte for magic and size, 272 byte for ufp */ -+#define VFP_STORAGE_SIZE sizeof(struct vfp_sigframe) -+ - #endif /* CONFIG_VFP */ - - /* -@@ -91,7 +86,7 @@ struct aux_sigframe { - #ifdef CONFIG_IWMMXT - struct iwmmxt_sigframe iwmmxt; - #endif --#if 0 && defined CONFIG_VFP /* Not yet saved. */ -+#ifdef CONFIG_VFP - struct vfp_sigframe vfp; - #endif - /* Something that isn't a valid magic number for any coprocessor. */ -diff --git a/arch/arm/include/asm/user.h b/arch/arm/include/asm/user.h -index df95e05..ea7e44d 100644 ---- a/arch/arm/include/asm/user.h -+++ b/arch/arm/include/asm/user.h -@@ -88,6 +88,9 @@ struct user{ - struct user_vfp { - unsigned long long fpregs[32]; - unsigned long fpscr; -+ unsigned long fpexc; -+ unsigned long fpinst; -+ unsigned long fpinst2; - }; - - #endif /* _ARM_USER_H */ -diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c -index e7714f3..6a36851 100644 ---- a/arch/arm/kernel/signal.c -+++ b/arch/arm/kernel/signal.c -@@ -18,6 +18,7 @@ - #include <asm/cacheflush.h> - #include <asm/ucontext.h> - #include <asm/unistd.h> -+#include <asm/vfp.h> - - #include "ptrace.h" - #include "signal.h" -@@ -175,6 +176,88 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame) - - #endif - -+#ifdef CONFIG_VFP -+ -+static int preserve_vfp_context(struct vfp_sigframe __user *frame) -+{ -+ struct thread_info *thread = current_thread_info(); -+ struct vfp_hard_struct *h = &thread->vfpstate.hard; -+ const unsigned long magic = VFP_MAGIC; -+ const unsigned long size = VFP_STORAGE_SIZE; -+ int err = 0; -+ -+ vfp_sync_state(thread); -+ __put_user_error(magic, &frame->magic, err); -+ __put_user_error(size, &frame->size, err); -+ -+ /* -+ * Copy the floating point registers. There can be unused -+ * registers see asm/hwcap.h for details. -+ */ -+ err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs, -+ sizeof(h->fpregs)); -+ /* -+ * Copy the status and control register. -+ */ -+ __put_user_error(h->fpscr, &frame->ufp.fpscr, err); -+ -+ /* -+ * Copy the exception registers. -+ */ -+ __put_user_error(h->fpexc, &frame->ufp.fpexc, err); -+ __put_user_error(h->fpinst, &frame->ufp.fpinst, err); -+ __put_user_error(h->fpinst2, &frame->ufp.fpinst2, err); -+ -+ return err ? -EFAULT : 0; -+} -+ -+static int restore_vfp_context(struct vfp_sigframe __user *frame) -+{ -+ struct thread_info *thread = current_thread_info(); -+ struct vfp_hard_struct *h = &thread->vfpstate.hard; -+ unsigned long magic; -+ unsigned long size; -+ unsigned long fpexc; -+ int err = 0; -+ -+ vfp_sync_state(thread); -+ __get_user_error(magic, &frame->magic, err); -+ __get_user_error(size, &frame->size, err); -+ -+ if (err) -+ return -EFAULT; -+ if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) -+ return -EINVAL; -+ -+ /* -+ * Copy the floating point registers. There can be unused -+ * registers see asm/hwcap.h for details. -+ */ -+ err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs, -+ sizeof(h->fpregs)); -+ /* -+ * Copy the status and control register. -+ */ -+ __get_user_error(h->fpscr, &frame->ufp.fpscr, err); -+ -+ /* -+ * Sanitise and restore the exception registers. -+ */ -+ __get_user_error(fpexc, &frame->ufp.fpexc, err); -+ /* Ensure the VFP is enabled. */ -+ fpexc |= FPEXC_EN; -+ /* Ensure FPINST2 is invalid and the exception flag is cleared. */ -+ fpexc &= ~(FPEXC_EX | FPEXC_FP2V); -+ h->fpexc = fpexc; -+ -+ __get_user_error(h->fpinst, &frame->ufp.fpinst, err); -+ __get_user_error(h->fpinst2, &frame->ufp.fpinst2, err); -+ -+ return err ? -EFAULT : 0; -+} -+ -+#endif -+ - /* - * Do a signal return; undo the signal stack. These are aligned to 64-bit. - */ -@@ -233,8 +316,8 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf) - err |= restore_iwmmxt_context(&aux->iwmmxt); - #endif - #ifdef CONFIG_VFP --// if (err == 0) --// err |= vfp_restore_state(&sf->aux.vfp); -+ if (err == 0) -+ err |= restore_vfp_context(&aux->vfp); - #endif - - return err; -@@ -348,8 +431,8 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set) - err |= preserve_iwmmxt_context(&aux->iwmmxt); - #endif - #ifdef CONFIG_VFP --// if (err == 0) --// err |= vfp_save_state(&sf->aux.vfp); -+ if (err == 0) -+ err |= preserve_vfp_context(&aux->vfp); - #endif - __put_user_error(0, &aux->end_magic, err); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0033-Switch-SGX-clocks-to-200MHz-on-DM37xx-OMAP36xx.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0033-Switch-SGX-clocks-to-200MHz-on-DM37xx-OMAP36xx.patch deleted file mode 100644 index 5711d39..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0033-Switch-SGX-clocks-to-200MHz-on-DM37xx-OMAP36xx.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 754249937d4ea60207bd85d172240840caa8fa2c Mon Sep 17 00:00:00 2001 -From: Prabindh Sundareson <prabu@ti.com> -Date: Wed, 3 Mar 2010 15:45:35 +0100 -Subject: [PATCH 33/45] Switch SGX clocks to 200MHz on DM37xx/OMAP36xx - ---- - arch/arm/mach-omap2/clock34xx_data.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c -index e3c752f..89e2f61 100644 ---- a/arch/arm/mach-omap2/clock34xx_data.c -+++ b/arch/arm/mach-omap2/clock34xx_data.c -@@ -3325,8 +3325,8 @@ static struct omap_clk omap3xxx_clks[] = { - CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1), - CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1), - CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1), -- CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2 | CK_3517), -- CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2 | CK_3517), -+ CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2 | CK_3517 | CK_36XX), -+ CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2 | CK_3517 | CK_36XX), - CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1), - CLK(NULL, "modem_fck", &modem_fck, CK_343X), - CLK(NULL, "sad2d_ick", &sad2d_ick, CK_343X), --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0034-modedb.c-add-proper-720p60-mode.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0034-modedb.c-add-proper-720p60-mode.patch deleted file mode 100644 index e7d4b25..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0034-modedb.c-add-proper-720p60-mode.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 48fe0d059d9bd5a8486309db26c7780fe3044626 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Mon, 8 Mar 2010 14:38:31 +0100 -Subject: [PATCH 34/45] modedb.c: add proper 720p60 mode - ---- - drivers/video/modedb.c | 4 ++++ - 1 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c -index b32fa2a..f017d57 100644 ---- a/drivers/video/modedb.c -+++ b/drivers/video/modedb.c -@@ -44,6 +44,10 @@ static const struct fb_videomode modedb[] = { - NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, - 0, FB_VMODE_NONINTERLACED - }, { -+ /* 1280x720 @ 60 Hz, 45 kHz hsync, CEA 681-E Format 4 */ -+ "hd720", 60, 1280, 720, 13468, 220, 110, 20, 5, 40, 5, -+ 0, FB_VMODE_NONINTERLACED -+ }, { - /* 800x600 @ 56 Hz, 35.15 kHz hsync */ - NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2, - 0, FB_VMODE_NONINTERLACED --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0035-RTC-add-support-for-backup-battery-recharge.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0035-RTC-add-support-for-backup-battery-recharge.patch deleted file mode 100644 index 6daabaf..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0035-RTC-add-support-for-backup-battery-recharge.patch +++ /dev/null @@ -1,55 +0,0 @@ -From eade32775fc8fc3c25c9bdace1828fe649a31e0a Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Thu, 4 Feb 2010 12:26:22 -0800 -Subject: [PATCH 35/45] RTC: add support for backup battery recharge - ---- - drivers/rtc/rtc-twl.c | 25 +++++++++++++++++++++++++ - 1 files changed, 25 insertions(+), 0 deletions(-) - -diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c -index c6a83a2..2329b5b 100644 ---- a/drivers/rtc/rtc-twl.c -+++ b/drivers/rtc/rtc-twl.c -@@ -30,6 +30,23 @@ - - #include <linux/i2c/twl.h> - -+/* -+ * PM_RECEIVER block register offsets (use TWL4030_MODULE_PM_RECEIVER) -+ */ -+#define REG_BB_CFG 0x12 -+ -+/* PM_RECEIVER BB_CFG bitfields */ -+#define BIT_PM_RECEIVER_BB_CFG_BBCHEN 0x10 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL 0x0C -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_2V5 0x00 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V0 0x04 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 0x08 -+#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3v2 0x0c -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL 0x03 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA 0x00 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_150UA 0x01 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_500UA 0x02 -+#define BIT_PM_RECEIVER_BB_CFG_BBISEL_1MA 0x03 - - /* - * RTC block register offsets (use TWL_MODULE_RTC) -@@ -508,6 +525,14 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) - if (ret < 0) - goto out2; - -+ /* enable backup battery charging */ -+ /* use a conservative 25uA @ 3.1V */ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ BIT_PM_RECEIVER_BB_CFG_BBCHEN | -+ BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 | -+ BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA, -+ REG_BB_CFG); -+ - return ret; - - out2: --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0036-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0036-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch deleted file mode 100644 index 2505f42..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0036-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch +++ /dev/null @@ -1,29 +0,0 @@ -From f4902a8ee1bbc739a60dcd970705c5665e98691f Mon Sep 17 00:00:00 2001 -From: Mans Rullgard <mans@mansr.com> -Date: Mon, 13 Oct 2008 20:32:16 +0100 -Subject: [PATCH 36/45] ARM: Add prompt for CONFIG_ALIGNMENT_TRAP - -This adds a prompt text for CONFIG_ALIGNMENT_TRAP, thus making it -visible in make *config. - -Signed-off-by: Mans Rullgard <mans@mansr.com> ---- - arch/arm/Kconfig | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index 88f628b..f5ded3c 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1224,7 +1224,7 @@ config LEDS_CPU - will overrule the CPU usage LED. - - config ALIGNMENT_TRAP -- bool -+ bool "Enable alignment trap" - depends on CPU_CP15_MMU - default y if !ARCH_EBSA110 - help --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0037-ARM-Print-warning-on-alignment-trap-in-kernel-mode.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0037-ARM-Print-warning-on-alignment-trap-in-kernel-mode.patch deleted file mode 100644 index 9594edd..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0037-ARM-Print-warning-on-alignment-trap-in-kernel-mode.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 310ec494b3c860e657290648821dbc98da9fff90 Mon Sep 17 00:00:00 2001 -From: Mans Rullgard <mans@mansr.com> -Date: Sat, 28 Mar 2009 13:21:55 +0000 -Subject: [PATCH 37/45] ARM: Print warning on alignment trap in kernel mode - -Signed-off-by: Mans Rullgard <mans@mansr.com> ---- - arch/arm/mm/alignment.c | 7 +++++++ - 1 files changed, 7 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c -index b270d62..5e9014b 100644 ---- a/arch/arm/mm/alignment.c -+++ b/arch/arm/mm/alignment.c -@@ -756,6 +756,13 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) - - ai_sys += 1; - -+ printk("Alignment trap in kernel: %s (%d) PC=0x%08lx Instr=0x%0*lx " -+ "Address=0x%08lx FSR 0x%03x\n", current->comm, -+ task_pid_nr(current), instrptr, -+ thumb_mode(regs) ? 4 : 8, -+ thumb_mode(regs) ? tinstr : instr, -+ addr, fsr); -+ - fixup: - - regs->ARM_pc += isize; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0038-ARM-Expose-some-CPU-control-registers-via-sysfs.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0038-ARM-Expose-some-CPU-control-registers-via-sysfs.patch deleted file mode 100644 index 0b19cb7..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0038-ARM-Expose-some-CPU-control-registers-via-sysfs.patch +++ /dev/null @@ -1,202 +0,0 @@ -From 9eeb533964f73b661d23f7b145b96aa5d247e950 Mon Sep 17 00:00:00 2001 -From: Mans Rullgard <mans@mansr.com> -Date: Tue, 10 Nov 2009 00:39:21 +0000 -Subject: [PATCH 38/45] ARM: Expose some CPU control registers via sysfs - -This creates sysfs files under /sys/devices/system/cpu/cpuN -exposing the values of the control register, auxiliary control -register, and L2 cache auxiliary control register. Writing to -the files allows setting the value of bits which are safe to -change at any time. - -Signed-off-by: Mans Rullgard <mans@mansr.com> ---- - arch/arm/Kconfig | 5 ++ - arch/arm/kernel/Makefile | 1 + - arch/arm/kernel/sysfs_v7.c | 146 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 152 insertions(+), 0 deletions(-) - create mode 100644 arch/arm/kernel/sysfs_v7.c - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index f5ded3c..2d370da 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1252,6 +1252,11 @@ config UACCESS_WITH_MEMCPY - However, if the CPU data cache is using a write-allocate mode, - this option is unlikely to provide any performance gain. - -+config CPU_V7_SYSFS -+ bool -+ depends on CPU_V7 && SYSFS -+ default y -+ - endmenu - - menu "Boot options" -diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile -index dd00f74..ee20134 100644 ---- a/arch/arm/kernel/Makefile -+++ b/arch/arm/kernel/Makefile -@@ -38,6 +38,7 @@ obj-$(CONFIG_ARM_THUMBEE) += thumbee.o - obj-$(CONFIG_KGDB) += kgdb.o - obj-$(CONFIG_ARM_UNWIND) += unwind.o - obj-$(CONFIG_HAVE_TCM) += tcm.o -+obj-$(CONFIG_CPU_V7_SYSFS) += sysfs_v7.o - - obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o - AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 -diff --git a/arch/arm/kernel/sysfs_v7.c b/arch/arm/kernel/sysfs_v7.c -new file mode 100644 -index 0000000..c05bf5f ---- /dev/null -+++ b/arch/arm/kernel/sysfs_v7.c -@@ -0,0 +1,146 @@ -+/* -+ * linux/arch/arm/kernel/sysfs.c -+ * -+ * Copyright (C) 2008 Mans Rullgard -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/cpu.h> -+#include <linux/sysdev.h> -+#include <linux/fs.h> -+ -+#define SETBITS(val, bits, new) \ -+ do { \ -+ val &= ~bits; \ -+ val |= new & bits; \ -+ } while (0) -+ -+#define SHOW_REG(name, opc1, crn, crm, opc2) \ -+static ssize_t name##_show(struct sys_device *dev, \ -+ struct sysdev_attribute *attr, \ -+ char *buf) \ -+{ \ -+ unsigned val; \ -+ asm ("mrc p15,"#opc1", %0,"#crn","#crm","#opc2 : "=r"(val)); \ -+ return snprintf(buf, PAGE_SIZE, "%08x\n", val); \ -+} -+ -+#define STORE_REG(name, opc1, crn, crm, opc2, bits) \ -+static ssize_t name##_store(struct sys_device *dev, \ -+ struct sysdev_attribute *attr, \ -+ const char *buf, size_t size) \ -+{ \ -+ char *end; \ -+ unsigned new = simple_strtoul(buf, &end, 0); \ -+ unsigned val; \ -+ \ -+ if (end == buf) \ -+ return -EINVAL; \ -+ \ -+ asm ("mrc p15,"#opc1", %0,"#crn","#crm","#opc2 : "=r"(val)); \ -+ SETBITS(val, bits, new); \ -+ asm ("mcr p15,"#opc1", %0,"#crn","#crm","#opc2 :: "r"(val)); \ -+ \ -+ return end - buf; \ -+} -+ -+#define RD_REG(name, opc1, crn, crm, opc2) \ -+ SHOW_REG(name, opc1, crn, crm, opc2) \ -+ static SYSDEV_ATTR(name, S_IRUGO|S_IWUSR, name##_show, NULL) -+ -+#define RDWR_REG(name, opc1, crn, crm, opc2, bits) \ -+ SHOW_REG(name, opc1, crn, crm, opc2) \ -+ STORE_REG(name, opc1, crn, crm, opc2, bits) \ -+ static SYSDEV_ATTR(name, S_IRUGO|S_IWUSR, name##_show, name##_store) -+ -+RDWR_REG(control, 0, c1, c0, 0, 0x802); -+ -+SHOW_REG(aux_ctl, 0, c1, c0, 1) -+ -+#ifdef CONFIG_ARCH_OMAP34XX -+static ssize_t aux_ctl_store(struct sys_device *dev, -+ struct sysdev_attribute *attr, -+ const char *buf, size_t size) -+{ -+ char *end; -+ unsigned new = simple_strtoul(buf, &end, 0); -+ unsigned val; -+ -+ if (end == buf) -+ return -EINVAL; -+ -+ asm ("mrc p15, 0, %0, c1, c0, 1" : "=r"(val)); -+ SETBITS(val, 0xff8, new); -+ val &= ~2; -+ asm ("mov r0, %0 \n\t" -+ "mov r12, #3 \n\t" -+ "smc #0 \n\t" -+ :: "r"(val) : "r0", "r12"); -+ -+ return end - buf; -+} -+#define AUX_WR S_IWUSR -+#else -+#define aux_ctl_store NULL -+#define AUX_WR 0 -+#endif -+ -+static SYSDEV_ATTR(aux_control, S_IRUGO|AUX_WR, aux_ctl_show, aux_ctl_store); -+ -+SHOW_REG(l2_aux_ctl, 1, c9, c0, 2) -+ -+#ifdef CONFIG_ARCH_OMAP34XX -+static ssize_t l2_aux_ctl_store(struct sys_device *dev, -+ struct sysdev_attribute *attr, -+ const char *buf, size_t size) -+{ -+ char *end; -+ unsigned new = simple_strtoul(buf, &end, 0); -+ unsigned val; -+ -+ if (end == buf) -+ return -EINVAL; -+ -+ asm ("mrc p15, 1, %0, c9, c0, 2" : "=r"(val)); -+ SETBITS(val, 0xbc00000, new); -+ asm ("mov r0, %0 \n\t" -+ "mov r12, #2 \n\t" -+ "smc #0 \n\t" -+ :: "r"(val) : "r0", "r12"); -+ -+ return end - buf; -+} -+#define L2AUX_WR S_IWUSR -+#else -+#define l2_aux_ctl_store NULL -+#define L2AUX_WR 0 -+#endif -+ -+static SYSDEV_ATTR(l2_aux_control, S_IRUGO|L2AUX_WR, -+ l2_aux_ctl_show, l2_aux_ctl_store); -+ -+#define REG_ATTR(sysdev, name) \ -+ do { \ -+ int err = sysfs_create_file(&sysdev->kobj, &name.attr); \ -+ WARN_ON(err != 0); \ -+ } while (0) -+ -+static int __init cpu_sysfs_init(void) -+{ -+ struct sys_device *sysdev; -+ int cpu; -+ -+ for_each_possible_cpu(cpu) { -+ sysdev = get_cpu_sysdev(cpu); -+ REG_ATTR(sysdev, attr_control); -+ REG_ATTR(sysdev, attr_aux_control); -+ REG_ATTR(sysdev, attr_l2_aux_control); -+ } -+ -+ return 0; -+} -+device_initcall(cpu_sysfs_init); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0039-ARM-Add-option-to-allow-userspace-PLE-access.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0039-ARM-Add-option-to-allow-userspace-PLE-access.patch deleted file mode 100644 index f72c477..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0039-ARM-Add-option-to-allow-userspace-PLE-access.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 2f716593e3f11859bf98c997183c47587c2dba76 Mon Sep 17 00:00:00 2001 -From: Mans Rullgard <mans@mansr.com> -Date: Tue, 10 Nov 2009 00:41:54 +0000 -Subject: [PATCH 39/45] ARM: Add option to allow userspace PLE access - -This adds a Kconfig option to allow userspace to access the L2 preload -engine (PLE) found in Cortex-A8. - -Signed-off-by: Mans Rullgard <mans@mansr.com> ---- - arch/arm/kernel/head.S | 4 ++++ - arch/arm/mm/Kconfig | 8 ++++++++ - 2 files changed, 12 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S -index eb62bf9..659ec9e 100644 ---- a/arch/arm/kernel/head.S -+++ b/arch/arm/kernel/head.S -@@ -172,6 +172,10 @@ __enable_mmu: - #ifdef CONFIG_CPU_ICACHE_DISABLE - bic r0, r0, #CR_I - #endif -+#ifdef CONFIG_USER_L2_PLE -+ mov r5, #3 -+ mcr p15, 0, r5, c11, c1, 0 -+#endif - mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ - domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ - domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \ -diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig -index dd4698c..564ff7d 100644 ---- a/arch/arm/mm/Kconfig -+++ b/arch/arm/mm/Kconfig -@@ -785,3 +785,11 @@ config ARM_L1_CACHE_SHIFT - int - default 6 if ARCH_OMAP3 || ARCH_S5PC1XX - default 5 -+ -+config USER_L2_PLE -+ bool "Enable userspace access to the L2 PLE" -+ depends on CPU_V7 -+ default n -+ help -+ Enable userspace access to the L2 preload engine (PLE) available -+ in Cortex-A series ARM processors. --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch deleted file mode 100644 index 5cecd3f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch +++ /dev/null @@ -1,49 +0,0 @@ -From dd1e35157bfd32303aaf87b1ec3f85d8dd1c0014 Mon Sep 17 00:00:00 2001 -From: Mans Rullgard <mans@mansr.com> -Date: Tue, 10 Nov 2009 00:52:56 +0000 -Subject: [PATCH 40/45] ARM: Add option to allow userspace access to performance counters - -This adds an option to allow userspace access to the performance monitor -registers of the Cortex-A8. - -Signed-off-by: Mans Rullgard <mans@mansr.com> ---- - arch/arm/mm/Kconfig | 7 +++++++ - arch/arm/mm/proc-v7.S | 6 ++++++ - 2 files changed, 13 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig -index 564ff7d..fda2e68 100644 ---- a/arch/arm/mm/Kconfig -+++ b/arch/arm/mm/Kconfig -@@ -793,3 +793,10 @@ config USER_L2_PLE - help - Enable userspace access to the L2 preload engine (PLE) available - in Cortex-A series ARM processors. -+ -+config USER_PMON -+ bool "Enable userspace access to performance counters" -+ depends on CPU_V7 -+ default n -+ help -+ Enable userpsace access to the performance monitor registers. -diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S -index 3a28521..fec926a 100644 ---- a/arch/arm/mm/proc-v7.S -+++ b/arch/arm/mm/proc-v7.S -@@ -270,6 +270,12 @@ __v7_setup: - mcr p15, 0, r5, c10, c2, 0 @ write PRRR - mcr p15, 0, r6, c10, c2, 1 @ write NMRR - #endif -+ -+#ifdef CONFIG_USER_PMON -+ mov r0, #1 -+ mcr p15, 0, r0, c9, c14, 0 -+#endif -+ - adr r5, v7_crval - ldmia r5, {r5, r6} - #ifdef CONFIG_CPU_ENDIAN_BE8 --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0041-ARM-Expose-some-PMON-registers-through-sysfs.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0041-ARM-Expose-some-PMON-registers-through-sysfs.patch deleted file mode 100644 index c5ee454..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0041-ARM-Expose-some-PMON-registers-through-sysfs.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 13fdb12b3744ca0eaf00d5339919b17ce933c6d5 Mon Sep 17 00:00:00 2001 -From: Mans Rullgard <mans@mansr.com> -Date: Sat, 28 Mar 2009 13:05:02 +0000 -Subject: [PATCH 41/45] ARM: Expose some PMON registers through sysfs - ---- - arch/arm/kernel/sysfs_v7.c | 11 +++++++++++ - 1 files changed, 11 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/kernel/sysfs_v7.c b/arch/arm/kernel/sysfs_v7.c -index c05bf5f..5ed32fb 100644 ---- a/arch/arm/kernel/sysfs_v7.c -+++ b/arch/arm/kernel/sysfs_v7.c -@@ -123,6 +123,12 @@ static ssize_t l2_aux_ctl_store(struct sys_device *dev, - static SYSDEV_ATTR(l2_aux_control, S_IRUGO|L2AUX_WR, - l2_aux_ctl_show, l2_aux_ctl_store); - -+RDWR_REG(pmon_pmnc, 0, c9, c12, 0, 0x3f) -+RDWR_REG(pmon_cntens, 0, c9, c12, 1, 0x8000000f) -+RDWR_REG(pmon_cntenc, 0, c9, c12, 2, 0x8000000f) -+RDWR_REG(pmon_ccnt, 0, c9, c13, 0, 0xffffffff) -+RDWR_REG(pmon_useren, 0, c9, c14, 0, 1) -+ - #define REG_ATTR(sysdev, name) \ - do { \ - int err = sysfs_create_file(&sysdev->kobj, &name.attr); \ -@@ -139,6 +145,11 @@ static int __init cpu_sysfs_init(void) - REG_ATTR(sysdev, attr_control); - REG_ATTR(sysdev, attr_aux_control); - REG_ATTR(sysdev, attr_l2_aux_control); -+ REG_ATTR(sysdev, attr_pmon_pmnc); -+ REG_ATTR(sysdev, attr_pmon_cntens); -+ REG_ATTR(sysdev, attr_pmon_cntenc); -+ REG_ATTR(sysdev, attr_pmon_ccnt); -+ REG_ATTR(sysdev, attr_pmon_useren); - } - - return 0; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0042-musb-allow-host-io-without-gadget-module.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0042-musb-allow-host-io-without-gadget-module.patch deleted file mode 100644 index 65c12c8..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0042-musb-allow-host-io-without-gadget-module.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 97283f52ea7fbb9b611a65d031c997e4ae44d465 Mon Sep 17 00:00:00 2001 -From: Ajay Kumar Gupta <ajay.gupta@ti.com> -Date: Wed, 14 Apr 2010 16:08:37 +0530 -Subject: [PATCH 42/45] musb: allow host io without gadget module - -Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> ---- - drivers/usb/musb/musb_core.c | 14 +++++++++----- - drivers/usb/musb/musb_gadget.c | 26 -------------------------- - 2 files changed, 9 insertions(+), 31 deletions(-) - -diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c -index 71ec7e8..9988553 100644 ---- a/drivers/usb/musb/musb_core.c -+++ b/drivers/usb/musb/musb_core.c -@@ -2101,10 +2101,12 @@ bad_config: - * (We expect the ID pin to be forcibly grounded!!) - * Otherwise, wait till the gadget driver hooks up. - */ -- if (!is_otg_enabled(musb) && is_host_enabled(musb)) { -- MUSB_HST_MODE(musb); -- musb->xceiv->default_a = 1; -- musb->xceiv->state = OTG_STATE_A_IDLE; -+ if (is_host_enabled(musb)) { -+ if (!is_otg_enabled(musb)) { -+ MUSB_HST_MODE(musb); -+ musb->xceiv->default_a = 1; -+ musb->xceiv->state = OTG_STATE_A_IDLE; -+ } - - status = usb_add_hcd(musb_to_hcd(musb), -1, 0); - -@@ -2115,7 +2117,9 @@ bad_config: - & MUSB_DEVCTL_BDEVICE - ? 'B' : 'A')); - -- } else /* peripheral is enabled */ { -+ } -+ /* peripheral is enabled */ -+ if (is_peripheral_enabled(musb)) { - MUSB_DEV_MODE(musb); - musb->xceiv->default_a = 0; - musb->xceiv->state = OTG_STATE_B_IDLE; -diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c -index 454f6db..d0d1cee 100644 ---- a/drivers/usb/musb/musb_gadget.c -+++ b/drivers/usb/musb/musb_gadget.c -@@ -1768,24 +1768,6 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver) - otg_set_peripheral(musb->xceiv, &musb->g); - - spin_unlock_irqrestore(&musb->lock, flags); -- -- if (is_otg_enabled(musb)) { -- DBG(3, "OTG startup...\n"); -- -- /* REVISIT: funcall to other code, which also -- * handles power budgeting ... this way also -- * ensures HdrcStart is indirectly called. -- */ -- retval = usb_add_hcd(musb_to_hcd(musb), -1, 0); -- if (retval < 0) { -- DBG(1, "add_hcd failed, %d\n", retval); -- spin_lock_irqsave(&musb->lock, flags); -- otg_set_peripheral(musb->xceiv, NULL); -- musb->gadget_driver = NULL; -- musb->g.dev.driver = NULL; -- spin_unlock_irqrestore(&musb->lock, flags); -- } -- } - } - - return retval; -@@ -1881,14 +1863,6 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) - retval = -EINVAL; - spin_unlock_irqrestore(&musb->lock, flags); - -- if (is_otg_enabled(musb) && retval == 0) { -- usb_remove_hcd(musb_to_hcd(musb)); -- /* FIXME we need to be able to register another -- * gadget driver here and have everything work; -- * that currently misbehaves. -- */ -- } -- - return retval; - } - EXPORT_SYMBOL(usb_gadget_unregister_driver); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0043-MTD-silence-ecc-errors-on-mtdblock0.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0043-MTD-silence-ecc-errors-on-mtdblock0.patch deleted file mode 100644 index b80e3d6..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0043-MTD-silence-ecc-errors-on-mtdblock0.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 2379628bcd6c08e472020c78019ce8ea3fce3027 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman <steve@sakoman.com> -Date: Mon, 26 Apr 2010 11:17:26 -0700 -Subject: [PATCH 43/45] MTD: silence ecc errors on mtdblock0 - -mtdblock0 is the x-load partition, which uses hw ecc -this confuses linux, which uses sw ecc -this patch silences ecc error messages when linux peeks into mtdblock0 -* not for upstream submission * ---- - block/blk-core.c | 3 ++- - drivers/mtd/nand/nand_ecc.c | 2 +- - fs/buffer.c | 3 ++- - 3 files changed, 5 insertions(+), 3 deletions(-) - -diff --git a/block/blk-core.c b/block/blk-core.c -index 718897e..c526fde 100644 ---- a/block/blk-core.c -+++ b/block/blk-core.c -@@ -1970,7 +1970,8 @@ bool blk_update_request(struct request *req, int error, unsigned int nr_bytes) - req->errors = 0; - - if (error && (blk_fs_request(req) && !(req->cmd_flags & REQ_QUIET))) { -- printk(KERN_ERR "end_request: I/O error, dev %s, sector %llu\n", -+ if (req->rq_disk && (strcmp(req->rq_disk->disk_name, "mtdblock0") != 0)) -+ printk(KERN_ERR "end_request: I/O error, dev %s, sector %llu\n", - req->rq_disk ? req->rq_disk->disk_name : "?", - (unsigned long long)blk_rq_pos(req)); - } -diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c -index 92320a6..2b86b6d 100644 ---- a/drivers/mtd/nand/nand_ecc.c -+++ b/drivers/mtd/nand/nand_ecc.c -@@ -492,7 +492,7 @@ int __nand_correct_data(unsigned char *buf, - if ((bitsperbyte[b0] + bitsperbyte[b1] + bitsperbyte[b2]) == 1) - return 1; /* error in ecc data; no action needed */ - -- printk(KERN_ERR "uncorrectable error : "); -+// printk(KERN_ERR "uncorrectable error : "); - return -1; - } - EXPORT_SYMBOL(__nand_correct_data); -diff --git a/fs/buffer.c b/fs/buffer.c -index 6fa5302..27b3103 100644 ---- a/fs/buffer.c -+++ b/fs/buffer.c -@@ -114,7 +114,8 @@ static int quiet_error(struct buffer_head *bh) - static void buffer_io_error(struct buffer_head *bh) - { - char b[BDEVNAME_SIZE]; -- printk(KERN_ERR "Buffer I/O error on device %s, logical block %Lu\n", -+ if (strcmp(bdevname(bh->b_bdev, b), "mtdblock0") != 0) -+ printk(KERN_ERR "Buffer I/O error on device %s, logical block %Lu\n", - bdevname(bh->b_bdev, b), - (unsigned long long)bh->b_blocknr); - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0044-ARM-OMAP-beagle-every-known-beagle-except-revB-uses-.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0044-ARM-OMAP-beagle-every-known-beagle-except-revB-uses-.patch deleted file mode 100644 index 5656c35..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0044-ARM-OMAP-beagle-every-known-beagle-except-revB-uses-.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 71886bfebaf13c74a55f11264096286a554e5a3d Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Thu, 13 May 2010 21:43:08 +0200 -Subject: [PATCH 44/45] ARM: OMAP: beagle: every known beagle (except revB) uses 2 chipselects so don't use NULL for the second chipselect timings - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index dd830b1..078e026 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -614,7 +614,7 @@ static void __init omap3_beagle_init_irq(void) - if (cpu_is_omap3630()) - { - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -- NULL, -+ mt46h32m32lf6_sdrc_params, - _omap37x_mpu_rate_table, - _omap37x_dsp_rate_table, - _omap37x_l3_rate_table); -@@ -622,7 +622,7 @@ static void __init omap3_beagle_init_irq(void) - else - { - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, -- NULL, -+ mt46h32m32lf6_sdrc_params, - _omap35x_mpu_rate_table, - _omap35x_dsp_rate_table, - _omap35x_l3_rate_table); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0045-ARM-OMAP-beagle-add-support-for-beagleFPGA-expansion.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0045-ARM-OMAP-beagle-add-support-for-beagleFPGA-expansion.patch deleted file mode 100644 index 2a48a30..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0045-ARM-OMAP-beagle-add-support-for-beagleFPGA-expansion.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 1ebb6f864a831fc8efebe4a7a9f65d07fa31466a Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Sat, 15 May 2010 21:47:32 +0200 -Subject: [PATCH 45/45] ARM: OMAP: beagle: add support for beagleFPGA expansionboard: http://members.cox.net/ebrombaugh1/embedded/beagle/beagle_fpga.html - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 26 ++++++++++++++++++++++++++ - 1 files changed, 26 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 078e026..b313350 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -24,6 +24,7 @@ - #include <linux/irq.h> - #include <linux/input.h> - #include <linux/gpio_keys.h> -+#include <linux/spi/spi.h> - - #include <linux/mtd/mtd.h> - #include <linux/mtd/partitions.h> -@@ -47,6 +48,7 @@ - #include <plat/timer-gp.h> - #include <plat/clock.h> - #include <plat/omap-pm.h> -+#include <plat/mcspi.h> - - #include "mux.h" - #include "mmc-twl4030.h" -@@ -609,6 +611,24 @@ static struct platform_device keys_gpio = { - }, - }; - -+static struct spi_board_info beaglefpga_mcspi_board_info[] = { -+ // spi 4.0 -+ { -+ .modalias = "spidev", -+ .max_speed_hz = 48000000, //48 Mbps -+ .bus_num = 4, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ }, -+}; -+ -+static void __init beaglefpga_init_spi(void) -+{ -+ /* hook the spi ports to the spidev driver */ -+ spi_register_board_info(beaglefpga_mcspi_board_info, -+ ARRAY_SIZE(beaglefpga_mcspi_board_info)); -+} -+ - static void __init omap3_beagle_init_irq(void) - { - if (cpu_is_omap3630()) -@@ -769,6 +789,12 @@ static void __init omap3_beagle_init(void) - gpio_export(162, 1); - } - -+ if(!strcmp(expansionboard_name, "beaglefpga")) -+ { -+ printk(KERN_INFO "Beagle expansionboard: Using McSPI for SPI\n"); -+ beaglefpga_init_spi(); -+ } -+ - usb_musb_init(); - usb_ehci_init(&ehci_pdata); - omap3beagle_flash_init(); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0046-attemp-to-fix-serial-console-corruption-during-cpuid.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0046-attemp-to-fix-serial-console-corruption-during-cpuid.patch deleted file mode 100644 index 11f5226..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0046-attemp-to-fix-serial-console-corruption-during-cpuid.patch +++ /dev/null @@ -1,57 +0,0 @@ -From b0c673e40d40428a9bd05101d15d773cd4f4720c Mon Sep 17 00:00:00 2001 -From: Ranjith Lohithakshan <unknown@ti.com> -Date: Sat, 22 May 2010 18:32:24 +0200 -Subject: [PATCH 46/48] attemp to fix serial console corruption during cpuidle - ---- - arch/arm/mach-omap2/cpuidle34xx.c | 6 +++++- - 1 files changed, 5 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c -index f8aea56..35d1c3e 100644 ---- a/arch/arm/mach-omap2/cpuidle34xx.c -+++ b/arch/arm/mach-omap2/cpuidle34xx.c -@@ -60,7 +60,7 @@ struct omap3_processor_cx { - - struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES]; - struct omap3_processor_cx current_cx_state; --struct powerdomain *mpu_pd, *core_pd; -+struct powerdomain *mpu_pd, *per_pd, *core_pd; - - /* - * The latencies/thresholds for various C states have -@@ -131,6 +131,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev, - local_fiq_disable(); - - pwrdm_set_next_pwrst(mpu_pd, mpu_state); -+ pwrdm_set_next_pwrst(per_pd, mpu_state); - pwrdm_set_next_pwrst(core_pd, core_state); - - if (omap_irq_pending() || need_resched()) -@@ -138,6 +139,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev, - - if (cx->type == OMAP3_STATE_C1) { - pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle); -+ pwrdm_for_each_clkdm(per_pd, _cpuidle_deny_idle); - pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); - } - -@@ -146,6 +148,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev, - - if (cx->type == OMAP3_STATE_C1) { - pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); -+ pwrdm_for_each_clkdm(per_pd, _cpuidle_allow_idle); - pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle); - } - -@@ -425,6 +428,7 @@ int __init omap3_idle_init(void) - struct cpuidle_device *dev; - - mpu_pd = pwrdm_lookup("mpu_pwrdm"); -+ per_pd = pwrdm_lookup("per_pwrdm"); - core_pd = pwrdm_lookup("core_pwrdm"); - - omap_init_power_states(); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0047-clock34xx-only-try-to-idle-IVA-subsys-when-CONFIG_PM.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0047-clock34xx-only-try-to-idle-IVA-subsys-when-CONFIG_PM.patch deleted file mode 100644 index 0db8bf7..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0047-clock34xx-only-try-to-idle-IVA-subsys-when-CONFIG_PM.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 4d5f88fca430ca38a35e60683dc301e80046b05d Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Sun, 23 May 2010 14:47:32 +0200 -Subject: [PATCH 47/48] clock34xx: only try to idle IVA subsys when CONFIG_PM is set - ---- - arch/arm/mach-omap2/clock34xx.c | 5 ++++- - 1 files changed, 4 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c -index 2bb7182..a323f9f 100644 ---- a/arch/arm/mach-omap2/clock34xx.c -+++ b/arch/arm/mach-omap2/clock34xx.c -@@ -407,7 +407,9 @@ void omap3_clk_lock_dpll5(void) - return; - } - -+#ifdef CONFIG_PM - extern void __init omap3_iva_idle(void); -+#endif - - /* - * Initialize IVA to a idle state. This is typically done by the -@@ -425,8 +427,9 @@ static void __init omap2_clk_iva_init_to_idle(void) - prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3); - prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL); - -+#ifdef CONFIG_PM - omap3_iva_idle(); -- -+#endif - } - - /* REVISIT: Move this init stuff out into clock.c */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/0048-HACK-try-to-poweron-stuff-on-xM-rev-A.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/0048-HACK-try-to-poweron-stuff-on-xM-rev-A.patch deleted file mode 100644 index 19a235a..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/0048-HACK-try-to-poweron-stuff-on-xM-rev-A.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 258a962bea2da43df6f70fd264a0e23b65669176 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Tue, 4 May 2010 17:04:27 +0200 -Subject: [PATCH 48/48] HACK: try to poweron stuff on xM rev A - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 14 +++++++------- - 1 files changed, 7 insertions(+), 7 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index b313350..7f0e241 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -237,7 +237,6 @@ static struct omap_dss_device beagle_dvi_device = { - .name = "dvi", - .driver_name = "generic_panel", - .phy.dpi.data_lines = 24, -- .reset_gpio = 170, - .platform_enable = beagle_enable_dvi, - .platform_disable = beagle_disable_dvi, - }; -@@ -364,6 +363,9 @@ static int beagle_twl_gpio_setup(struct device *dev, - */ - - if (cpu_is_omap3630()) { -+ /* DVI reset GPIO is different between revisions */ -+ beagle_dvi_device.reset_gpio = 129; -+ - /* Power on DVI, Serial and PWR led */ - gpio_request(gpio + 1, "nDVI_PWR_EN"); - gpio_direction_output(gpio + 1, 0); -@@ -374,9 +376,12 @@ static int beagle_twl_gpio_setup(struct device *dev, - - /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ - gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); -- gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); -+ gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); - } - else { -+ /* DVI reset GPIO is different between revisions */ -+ beagle_dvi_device.reset_gpio = 170; -+ - gpio_request(gpio + 1, "EHCI_nOC"); - gpio_direction_input(gpio + 1); - -@@ -735,11 +740,6 @@ static void __init omap3_beagle_init(void) - ARRAY_SIZE(omap3_beagle_devices)); - omap_serial_init(); - -- omap_mux_init_gpio(170, OMAP_PIN_INPUT); -- gpio_request(170, "DVI_nPD"); -- /* REVISIT leave DVI powered down until it's needed ... */ -- gpio_direction_output(170, true); -- - if(!strcmp(expansionboard_name, "zippy")) - { - printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n"); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-crane/defconfig b/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-crane/defconfig deleted file mode 100644 index 52ec860..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-crane/defconfig +++ /dev/null @@ -1,2139 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Fri Dec 24 10:51:48 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_COMPAT_BRK=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX=y -# CONFIG_OMAP_MUX_DEBUG is not set -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_MCBSP=y -# CONFIG_OMAP_MBOX_FWK is not set -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_LL_DEBUG_UART1 is not set -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -CONFIG_OMAP_LL_DEBUG_UART3=y -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -CONFIG_OMAP_PM_NOOP=y -# CONFIG_OMAP_PM_SRF is not set -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -# CONFIG_MACH_OMAP3EVM is not set -# CONFIG_MACH_OMAP3517EVM is not set -CONFIG_MACH_CRANEBOARD=y -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_USER_L2_PLE=y -CONFIG_USER_PMON=y -CONFIG_ARM_ERRATA_430973=y -CONFIG_ARM_ERRATA_458693=y -CONFIG_ARM_ERRATA_460075=y -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -# CONFIG_CPU_FREQ is not set -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=y -CONFIG_CAN_RAW=y -CONFIG_CAN_BCM=y - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=y -CONFIG_CAN_DEV=y -CONFIG_CAN_CALC_BITTIMING=y -CONFIG_CAN_TI_HECC=y -# CONFIG_CAN_SJA1000 is not set - -# -# CAN USB interfaces -# -# CONFIG_CAN_EMS_USB is not set -CONFIG_CAN_DEBUG_DEVICES=y -# CONFIG_IRDA is not set -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_WIRELESS_OLD_REGULATORY is not set -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -# CONFIG_MAC80211_RC_PID is not set -CONFIG_MAC80211_RC_MINSTREL=y -# CONFIG_MAC80211_RC_DEFAULT_PID is not set -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -# CONFIG_MTD_NAND_OMAP_PREFETCH is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851_MLL is not set -CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -# CONFIG_AT76C50X_USB is not set -# CONFIG_USB_ZD1201 is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_RTL8187 is not set -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -# CONFIG_HOSTAP is not set -# CONFIG_IWM is not set -# CONFIG_LIBERTAS is not set -# CONFIG_P54_COMMON is not set -# CONFIG_RT2X00 is not set -# CONFIG_WL12XX is not set -# CONFIG_ZD1211RW is not set - -# -# WiMAX Wireless Broadband devices -# -# CONFIG_WIMAX_I2400M_USB is not set -# CONFIG_WIMAX_I2400M_SDIO is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -CONFIG_USB_USBNET=y -# CONFIG_USB_NET_AX8817X is not set -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -# CONFIG_USB_NET_SMSC95XX is not set -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_MCS7830 is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_HSO is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -# CONFIG_I2C_CHARDEV is not set -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -# CONFIG_SPI is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -# CONFIG_TWL4030_CORE is not set -CONFIG_TPS65910_CORE=y -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_MFD_88PM8607 is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=m -CONFIG_VIDEOBUF_DMA_SG=m -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=m -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_VIDEO_HELPER_CHIPS_AUTO=y -CONFIG_VIDEO_IR_I2C=m -CONFIG_VIDEO_MSP3400=m -CONFIG_VIDEO_CS53L32A=m -CONFIG_VIDEO_WM8775=m -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_SAA711X=m -CONFIG_VIDEO_TVP5150=m -CONFIG_VIDEO_CX25840=m -CONFIG_VIDEO_CX2341X=m -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=m -CONFIG_VIDEO_VPSS_SYSTEM=m -CONFIG_VIDEO_VPFE_CAPTURE=m -CONFIG_VIDEO_DM6446_CCDC=m -CONFIG_VIDEO_DM355_CCDC=m -CONFIG_VIDEO_OMAP2_VOUT=m -# CONFIG_VIDEO_OMAP3 is not set -# CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER is not set -# CONFIG_VIDEO_OMAP34XX_ISP_RESIZER is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -CONFIG_USB_GL860=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -CONFIG_USB_GSPCA_JEILINJ=m -CONFIG_USB_GSPCA_MARS=m -CONFIG_USB_GSPCA_MR97310A=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -CONFIG_USB_GSPCA_PAC7302=m -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SN9C20X=m -CONFIG_USB_GSPCA_SN9C20X_EVDEV=y -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SQ905=m -CONFIG_USB_GSPCA_SQ905C=m -CONFIG_USB_GSPCA_STK014=m -CONFIG_USB_GSPCA_STV0680=m -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -# CONFIG_VIDEO_EM28XX_ALSA is not set -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -# CONFIG_RADIO_ADAPTERS is not set -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_EC168=m -CONFIG_SMS_SIANO_MDTV=m - -# -# Siano module components -# -# CONFIG_SMS_USB_DRV is not set -# CONFIG_SMS_SDIO_DRV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GL5=m -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=4 -# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -# CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO is not set -CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE=y -# CONFIG_OMAP2_DSS_SDI is not set -# CONFIG_OMAP2_DSS_DSI is not set -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1 -CONFIG_FB_OMAP2=y -# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=1 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -# CONFIG_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE is not set -# CONFIG_LOGO is not set -CONFIG_SOUND=m -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -CONFIG_SND_DUMMY=m -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_CAIAQ=m -# CONFIG_SND_USB_CAIAQ_INPUT is not set -CONFIG_SND_SOC=m -CONFIG_SND_OMAP_SOC=m -CONFIG_SND_SOC_I2C_AND_SPI=m -# CONFIG_SND_SOC_ALL_CODECS is not set -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=y -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=y -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_BD2802 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=m -CONFIG_LEDS_TRIGGER_BACKLIGHT=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TPS65910=y -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_USB_IP_COMMON is not set -# CONFIG_W35UND is not set -# CONFIG_ECHO is not set -# CONFIG_OTUS is not set -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -# CONFIG_INPUT_MIMIO is not set -# CONFIG_TRANZPORT is not set - -# -# Qualcomm MSM Camera And Video -# - -# -# Camera Sensor Selection -# -# CONFIG_INPUT_GPIO is not set -# CONFIG_DST is not set -# CONFIG_POHMELFS is not set -# CONFIG_PLAN9AUTH is not set -# CONFIG_LINE6_USB is not set -# CONFIG_VT6656 is not set -# CONFIG_FB_UDL is not set - -# -# RAR Register Driver -# -# CONFIG_RAR_REGISTER is not set -# CONFIG_IIO is not set -# CONFIG_RAMZSWAP is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_STRIP is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -# CONFIG_EARLY_PRINTK is not set -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=m -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_HW=y -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=m -CONFIG_CRC_T10DIF=y -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-evm/configs/stock b/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-evm/configs/stock deleted file mode 100644 index 83353e4..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-evm/configs/stock +++ /dev/null @@ -1,2151 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Wed Jul 20 08:54:46 2011 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_COMPAT_BRK=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX=y -# CONFIG_OMAP_MUX_DEBUG is not set -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_MCBSP=y -# CONFIG_OMAP_MBOX_FWK is not set -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_LL_DEBUG_UART1 is not set -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -CONFIG_OMAP_LL_DEBUG_UART3=y -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -CONFIG_OMAP_PM_NOOP=y -# CONFIG_OMAP_PM_SRF is not set -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -# CONFIG_MACH_OMAP3EVM is not set -CONFIG_MACH_OMAP3517EVM=y -# CONFIG_MACH_CRANEBOARD is not set -CONFIG_PMIC_TPS65023=y -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -# CONFIG_USER_L2_PLE is not set -# CONFIG_USER_PMON is not set -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=y -CONFIG_CAN_RAW=y -CONFIG_CAN_BCM=y - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=y -CONFIG_CAN_DEV=y -CONFIG_CAN_CALC_BITTIMING=y -CONFIG_CAN_TI_HECC=y -# CONFIG_CAN_SJA1000 is not set - -# -# CAN USB interfaces -# -# CONFIG_CAN_EMS_USB is not set -CONFIG_CAN_DEBUG_DEVICES=y -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -CONFIG_CONNECTOR=m -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -# CONFIG_MTD_NAND_OMAP_PREFETCH is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_DRBD is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -CONFIG_ASYNC_RAID6_TEST=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_LOG_USERSPACE=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_MULTIPATH_QL=m -CONFIG_DM_MULTIPATH_ST=m -CONFIG_DM_DELAY=m -CONFIG_DM_UEVENT=y -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851_MLL is not set -CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -CONFIG_USB_USBNET=y -# CONFIG_USB_NET_AX8817X is not set -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -# CONFIG_USB_NET_SMSC95XX is not set -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_MCS7830 is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_GPIO is not set -CONFIG_KEYBOARD_TCA6416=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -CONFIG_TOUCHSCREEN_TSC2004=y -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -# CONFIG_I2C_CHARDEV is not set -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -# CONFIG_SPI is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -# CONFIG_GPIO_PCF857X is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TPS65910_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_MFD_88PM8607 is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_LP3971 is not set -CONFIG_REGULATOR_TPS65023=y -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V113 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_MT9P012 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_DW9710 is not set -# CONFIG_VIDEO_OV3640 is not set -# CONFIG_VIDEO_IMX046 is not set -# CONFIG_VIDEO_LV8093 is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=y -CONFIG_VIDEO_VPSS_SYSTEM=y -CONFIG_VIDEO_VPFE_CAPTURE=y -CONFIG_VIDEO_DM6446_CCDC=y -# CONFIG_VIDEO_DM355_CCDC is not set -CONFIG_VIDEO_OMAP2_VOUT=y -# CONFIG_VIDEO_OMAP3 is not set -# CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER is not set -# CONFIG_VIDEO_OMAP34XX_ISP_RESIZER is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -CONFIG_USB_GL860=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -CONFIG_USB_GSPCA_JEILINJ=m -CONFIG_USB_GSPCA_MARS=m -CONFIG_USB_GSPCA_MR97310A=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -CONFIG_USB_GSPCA_PAC7302=m -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SN9C20X=m -CONFIG_USB_GSPCA_SN9C20X_EVDEV=y -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SQ905=m -CONFIG_USB_GSPCA_SQ905C=m -CONFIG_USB_GSPCA_STK014=m -CONFIG_USB_GSPCA_STV0680=m -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -# CONFIG_RADIO_ADAPTERS is not set -CONFIG_DVB_MAX_ADAPTERS=8 -# CONFIG_DVB_DYNAMIC_MINORS is not set -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_EC168=m -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -# CONFIG_DVB_B2C2_FLEXCOP is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_LGS8GL5=m -CONFIG_DAB=y -CONFIG_USB_DABUSB=m - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_UVESA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1 -CONFIG_FB_OMAP2=y -# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=3 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -# CONFIG_PANEL_SHARP_LS037V7DW01 is not set -CONFIG_PANEL_SHARP_LQ043T1DG01=y -# CONFIG_PANEL_TAAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE is not set -# CONFIG_LOGO is not set -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -CONFIG_SND_HRTIMER=m -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_AM3517EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC23=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=y -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=y -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_S35390A=y -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -# CONFIG_EARLY_PRINTK is not set -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_HW=y - -# -# OCF Configuration -# -# CONFIG_OCF_OCF is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -# CONFIG_CRC16 is not set -CONFIG_CRC_T10DIF=y -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-evm/defconfig b/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-evm/defconfig deleted file mode 100644 index 83353e4..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/am3517-evm/defconfig +++ /dev/null @@ -1,2151 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Wed Jul 20 08:54:46 2011 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_COMPAT_BRK=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX=y -# CONFIG_OMAP_MUX_DEBUG is not set -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_MCBSP=y -# CONFIG_OMAP_MBOX_FWK is not set -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_LL_DEBUG_UART1 is not set -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -CONFIG_OMAP_LL_DEBUG_UART3=y -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -CONFIG_OMAP_PM_NOOP=y -# CONFIG_OMAP_PM_SRF is not set -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -# CONFIG_MACH_OMAP3EVM is not set -CONFIG_MACH_OMAP3517EVM=y -# CONFIG_MACH_CRANEBOARD is not set -CONFIG_PMIC_TPS65023=y -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -# CONFIG_USER_L2_PLE is not set -# CONFIG_USER_PMON is not set -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=y -CONFIG_CAN_RAW=y -CONFIG_CAN_BCM=y - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=y -CONFIG_CAN_DEV=y -CONFIG_CAN_CALC_BITTIMING=y -CONFIG_CAN_TI_HECC=y -# CONFIG_CAN_SJA1000 is not set - -# -# CAN USB interfaces -# -# CONFIG_CAN_EMS_USB is not set -CONFIG_CAN_DEBUG_DEVICES=y -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -CONFIG_CONNECTOR=m -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -# CONFIG_MTD_NAND_OMAP_PREFETCH is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_DRBD is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -CONFIG_ASYNC_RAID6_TEST=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_LOG_USERSPACE=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_MULTIPATH_QL=m -CONFIG_DM_MULTIPATH_ST=m -CONFIG_DM_DELAY=m -CONFIG_DM_UEVENT=y -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_TI_DAVINCI_EMAC=y -# CONFIG_DM9000 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851_MLL is not set -CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -CONFIG_USB_USBNET=y -# CONFIG_USB_NET_AX8817X is not set -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -# CONFIG_USB_NET_SMSC95XX is not set -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_MCS7830 is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_GPIO is not set -CONFIG_KEYBOARD_TCA6416=y -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -CONFIG_TOUCHSCREEN_TSC2004=y -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -# CONFIG_I2C_CHARDEV is not set -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -# CONFIG_SPI is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -# CONFIG_GPIO_PCF857X is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TPS65910_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_MFD_88PM8607 is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_LP3971 is not set -CONFIG_REGULATOR_TPS65023=y -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V113 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_MT9P012 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_DW9710 is not set -# CONFIG_VIDEO_OV3640 is not set -# CONFIG_VIDEO_IMX046 is not set -# CONFIG_VIDEO_LV8093 is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=y -CONFIG_VIDEO_VPSS_SYSTEM=y -CONFIG_VIDEO_VPFE_CAPTURE=y -CONFIG_VIDEO_DM6446_CCDC=y -# CONFIG_VIDEO_DM355_CCDC is not set -CONFIG_VIDEO_OMAP2_VOUT=y -# CONFIG_VIDEO_OMAP3 is not set -# CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER is not set -# CONFIG_VIDEO_OMAP34XX_ISP_RESIZER is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -CONFIG_USB_GL860=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -CONFIG_USB_GSPCA_JEILINJ=m -CONFIG_USB_GSPCA_MARS=m -CONFIG_USB_GSPCA_MR97310A=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -CONFIG_USB_GSPCA_PAC7302=m -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SN9C20X=m -CONFIG_USB_GSPCA_SN9C20X_EVDEV=y -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SQ905=m -CONFIG_USB_GSPCA_SQ905C=m -CONFIG_USB_GSPCA_STK014=m -CONFIG_USB_GSPCA_STV0680=m -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -# CONFIG_RADIO_ADAPTERS is not set -CONFIG_DVB_MAX_ADAPTERS=8 -# CONFIG_DVB_DYNAMIC_MINORS is not set -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_EC168=m -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -# CONFIG_DVB_B2C2_FLEXCOP is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_LGS8GL5=m -CONFIG_DAB=y -CONFIG_USB_DABUSB=m - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_UVESA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1 -CONFIG_FB_OMAP2=y -# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=3 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -# CONFIG_PANEL_SHARP_LS037V7DW01 is not set -CONFIG_PANEL_SHARP_LQ043T1DG01=y -# CONFIG_PANEL_TAAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE is not set -# CONFIG_LOGO is not set -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -CONFIG_SND_HRTIMER=m -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_AM3517EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TLV320AIC23=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_TI_CPPI_DMA is not set -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=y -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=y -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_S35390A=y -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -# CONFIG_EARLY_PRINTK is not set -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_HW=y - -# -# OCF Configuration -# -# CONFIG_OCF_OCF is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -# CONFIG_CRC16 is not set -CONFIG_CRC_T10DIF=y -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/am37x-evm/defconfig b/recipes-kernel/linux/linux-omap-psp-2.6.32/am37x-evm/defconfig deleted file mode 100644 index 2578116..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/am37x-evm/defconfig +++ /dev/null @@ -1,2045 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Fri Jul 9 10:08:46 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_OPROFILE_ARMV7=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_COMPAT_BRK=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=m -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX=y -# CONFIG_OMAP_MUX_DEBUG is not set -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_MCBSP=y -# CONFIG_OMAP_MBOX_FWK is not set -CONFIG_OMAP_IOMMU=y -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_DEBOBS is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -CONFIG_OMAP_LL_DEBUG_UART1=y -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -# CONFIG_OMAP_LL_DEBUG_UART3 is not set -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -CONFIG_OMAP_PM_NOOP=y -# CONFIG_OMAP_PM_SRF is not set -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -CONFIG_MACH_OMAP3EVM=y -CONFIG_PMIC_TWL4030=y -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -# CONFIG_USER_L2_PLE is not set -# CONFIG_USER_PMON is not set -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -# CONFIG_CPU_FREQ is not set -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_AMDSTD is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_OMAP_NOR is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -# CONFIG_MTD_NAND_OMAP_PREFETCH is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -# CONFIG_MTD_ONENAND_GENERIC is not set -CONFIG_MTD_ONENAND_OMAP2=y -# CONFIG_MTD_ONENAND_OTP is not set -# CONFIG_MTD_ONENAND_2X_PROGRAM is not set -# CONFIG_MTD_ONENAND_SIM is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_TI_DAVINCI_EMAC is not set -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -CONFIG_SMSC911X=y -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -CONFIG_USB_USBNET=y -# CONFIG_USB_NET_AX8817X is not set -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -# CONFIG_USB_NET_SMSC95XX is not set -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_MCS7830 is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_GPIO is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_XILINX is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -CONFIG_GPIO_TWL4030=y - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TWL4030_CORE=y -# CONFIG_TWL4030_POWER is not set -CONFIG_TWL4030_CODEC=y -# CONFIG_TWL4030_MADC is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=y - -# -# Multimedia drivers -# -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=y -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_MT9P012 is not set -# CONFIG_VIDEO_MT9T111 is not set -# CONFIG_VIDEO_DW9710 is not set -# CONFIG_VIDEO_OV3640 is not set -# CONFIG_VIDEO_IMX046 is not set -# CONFIG_VIDEO_LV8093 is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -CONFIG_TI_MEDIA=y -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -CONFIG_VIDEO_OMAP2_VOUT=y -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_ISP=y -# CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER is not set -CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_IBMCAM is not set -# CONFIG_USB_KONICAWC is not set -# CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set -# CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_USB_OV511 is not set -# CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set -# CONFIG_USB_PWC is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=4 -# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1 -CONFIG_FB_OMAP2=y -# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=1 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -# CONFIG_PANEL_TAAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE is not set -# CONFIG_LOGO is not set -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -# CONFIG_SND_USB_CAIAQ is not set -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OMAP3EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_TI_CPPI41_DMA is not set -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=y -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=y -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -# CONFIG_TWL4030_USB is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TWL4030=y -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -# CONFIG_EARLY_PRINTK is not set -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_HW=y -CONFIG_BINARY_PRINTF=y - -# -# OCF Configuration -# -CONFIG_OCF_OCF=y -CONFIG_OCF_RANDOMHARVEST=y -CONFIG_OCF_FIPS=y -CONFIG_OCF_CRYPTODEV=m -CONFIG_OCF_CRYPTOSOFT=m -# CONFIG_OCF_SAFE is not set -# CONFIG_OCF_IXP4XX is not set -# CONFIG_OCF_HIFN is not set -# CONFIG_OCF_HIFNHIPP is not set -# CONFIG_OCF_TALITOS is not set -# CONFIG_OCF_EP80579 is not set -# CONFIG_OCF_CRYPTOCTEON is not set -# CONFIG_OCF_KIRKWOOD is not set -# CONFIG_OCF_C7108 is not set -# CONFIG_OCF_OCFNULL is not set -# CONFIG_OCF_BENCH is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0001-omap-Beagle-revision-detection.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0001-omap-Beagle-revision-detection.patch deleted file mode 100644 index f29c9a6..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0001-omap-Beagle-revision-detection.patch +++ /dev/null @@ -1,135 +0,0 @@ -From 325afc09116e11e28265b648ef33d8c0306c61f1 Mon Sep 17 00:00:00 2001 -From: Robert Nelson <robertcnelson@gmail.com> -Date: Thu, 23 Sep 2010 18:22:47 -0700 -Subject: [PATCH 01/10] omap: Beagle: revision detection - -Due to the omap3530 ES3.0 Silicon being used on both the -B5/B6 and C1/2/3 Beagle we can't use the cpu_is_omap34xx() -routines to differentiate the Beagle Boards. - -However gpio pins 171,172,173 where setup for this prupose, so -lets use them. - -Changes: -for older U-Boot's, use omap_mux_init_gpio() -keep Beagle Rev in board-omap3beagle.c -gpio_free on gpio request failure - -Tested on Beagle Revisions: B5, C2, C4, and xMA - -Signed-off-by: Robert Nelson <robertcnelson@gmail.com> -Acked-by: Jarkko Nikula <jhnikula@gmail.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 88 +++++++++++++++++++++++++++++++ - 1 files changed, 88 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 2677b41..7ca2b3b 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -175,6 +175,93 @@ static void __init omap3beagle_ks8851_init(void) - static inline void __init omap3beagle_ks8851_init(void) { return; } - #endif - -+/* -+ * OMAP3 Beagle revision -+ * Run time detection of Beagle revision is done by reading GPIO. -+ * GPIO ID - -+ * AXBX = GPIO173, GPIO172, GPIO171: 1 1 1 -+ * C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0 -+ * C4 = GPIO173, GPIO172, GPIO171: 1 0 1 -+ * XM = GPIO173, GPIO172, GPIO171: 0 0 0 -+ */ -+enum { -+ OMAP3BEAGLE_BOARD_UNKN = 0, -+ OMAP3BEAGLE_BOARD_AXBX, -+ OMAP3BEAGLE_BOARD_C1_3, -+ OMAP3BEAGLE_BOARD_C4, -+ OMAP3BEAGLE_BOARD_XM, -+}; -+ -+static u8 omap3_beagle_version; -+ -+static u8 omap3_beagle_get_rev(void) -+{ -+ return omap3_beagle_version; -+} -+ -+static void __init omap3_beagle_init_rev(void) -+{ -+ int ret; -+ u16 beagle_rev = 0; -+ -+ omap_mux_init_gpio(171, OMAP_PIN_INPUT_PULLUP); -+ omap_mux_init_gpio(172, OMAP_PIN_INPUT_PULLUP); -+ omap_mux_init_gpio(173, OMAP_PIN_INPUT_PULLUP); -+ -+ ret = gpio_request(171, "rev_id_0"); -+ if (ret < 0) -+ goto fail0; -+ -+ ret = gpio_request(172, "rev_id_1"); -+ if (ret < 0) -+ goto fail1; -+ -+ ret = gpio_request(173, "rev_id_2"); -+ if (ret < 0) -+ goto fail2; -+ -+ gpio_direction_input(171); -+ gpio_direction_input(172); -+ gpio_direction_input(173); -+ -+ beagle_rev = gpio_get_value(171) | (gpio_get_value(172) << 1) -+ | (gpio_get_value(173) << 2); -+ -+ switch (beagle_rev) { -+ case 7: -+ printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; -+ break; -+ case 6: -+ printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; -+ break; -+ case 5: -+ printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; -+ break; -+ case 0: -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; -+ break; -+ default: -+ printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; -+ } -+ -+ return; -+ -+fail2: -+ gpio_free(172); -+fail1: -+ gpio_free(171); -+fail0: -+ printk(KERN_ERR "Unable to get revision detection GPIO pins\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; -+ -+ return; -+} -+ - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -853,6 +940,7 @@ static int __init cameraboard_setup(char *str) - static void __init omap3_beagle_init(void) - { - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); -+ omap3_beagle_init_rev(); - omap3_beagle_i2c_init(); - - if (cpu_is_omap3630()) { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0002-omap-Beagle-only-Cx-boards-use-pin-23-for-write-prot.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0002-omap-Beagle-only-Cx-boards-use-pin-23-for-write-prot.patch deleted file mode 100644 index f851286..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0002-omap-Beagle-only-Cx-boards-use-pin-23-for-write-prot.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 34d88746a9aa4aedb67e32579e559cbeb91de20f Mon Sep 17 00:00:00 2001 -From: Robert Nelson <robertcnelson@gmail.com> -Date: Thu, 23 Sep 2010 18:22:48 -0700 -Subject: [PATCH 02/10] omap: Beagle: only Cx boards use pin 23 for write protect - -system_rev comes from u-boot and is a constant 0x20, so -Bx boards also fall in this 'if' and will get setup with the -wrong gpio_wp pin. Switch to using the Beagle revision routine -to correcly set pin 23 only for C1/2/3 and C4 Boards. Bx boards -will then use the correct default pin setting. - -Signed-off-by: Robert Nelson <robertcnelson@gmail.com> -Acked-by: Jarkko Nikula <jhnikula@gmail.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 3 ++- - 1 files changed, 2 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 7ca2b3b..beb877c 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -444,7 +444,8 @@ static struct gpio_led gpio_leds[]; - static int beagle_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) - { -- if (system_rev >= 0x20 && system_rev <= 0x34301000) { -+ if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || -+ (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { - omap_mux_init_gpio(23, OMAP_PIN_INPUT); - mmc[0].gpio_wp = 23; - } else { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0003-omap-Beagle-no-gpio_wp-pin-connection-on-xM.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0003-omap-Beagle-no-gpio_wp-pin-connection-on-xM.patch deleted file mode 100644 index d7d3fef..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0003-omap-Beagle-no-gpio_wp-pin-connection-on-xM.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 037ef3add42d61dcd86438dc4b9378f154caa426 Mon Sep 17 00:00:00 2001 -From: Robert Nelson <robertcnelson@gmail.com> -Date: Thu, 23 Sep 2010 18:22:48 -0700 -Subject: [PATCH 03/10] omap: Beagle: no gpio_wp pin connection on xM - -The omap3630 based BeagleBoard xM uses a MicroSD card slot with -no write protection. - -Signed-off-by: Robert Nelson <robertcnelson@gmail.com> -Acked-by: Jarkko Nikula <jhnikula@gmail.com> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index beb877c..247a426 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -444,7 +444,9 @@ static struct gpio_led gpio_leds[]; - static int beagle_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) - { -- if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || -+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ mmc[0].gpio_wp = -EINVAL; -+ } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || - (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { - omap_mux_init_gpio(23, OMAP_PIN_INPUT); - mmc[0].gpio_wp = 23; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0004-omap3-beaglexm-fix-EHCI-power-up-GPIO-dir.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0004-omap3-beaglexm-fix-EHCI-power-up-GPIO-dir.patch deleted file mode 100644 index e646d3e..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0004-omap3-beaglexm-fix-EHCI-power-up-GPIO-dir.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 62db06de896c221cfa2231a53a933d6b3e81d66d Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@beagleboard.org> -Date: Tue, 11 Jan 2011 17:13:35 +0000 -Subject: [PATCH 04/10] omap3: beaglexm: fix EHCI power up GPIO dir - -EHCI enable power pin is inverted (active high) in comparison -to vanilla beagle which is active low. Handle this case conditionally. - -Without this fix, Beagle XM 4 port EHCI will not function and no -networking will be available - -[nm@ti.com: split up, added descriptive changelogs] -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@beagleboard.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 9 +++++++++ - 1 files changed, 9 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 247a426..7cfa2c8 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -487,6 +487,15 @@ static int beagle_twl_gpio_setup(struct device *dev, - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); - } - -+ /* -+ * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active -+ * high / others active low) -+ */ -+ gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); -+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) -+ gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); -+ else -+ gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0005-omap3-beaglexm-fix-DVI-reset-GPIO.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0005-omap3-beaglexm-fix-DVI-reset-GPIO.patch deleted file mode 100644 index 6e6ab41..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0005-omap3-beaglexm-fix-DVI-reset-GPIO.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 3d93d0b8974c867db70cb4a8681615113ac6113d Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@beagleboard.org> -Date: Tue, 11 Jan 2011 17:13:36 +0000 -Subject: [PATCH 05/10] omap3: beaglexm: fix DVI reset GPIO - -GPIO reset line for Beagle XM is different from vanilla beagle -so we populate it as part of gpio update routine. - -This in part fixes the issue of display not functioning on beagle XM -platform. - -[nm@ti.com: split up, added descriptive changelogs] -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@beagleboard.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 8 +++++++- - 1 files changed, 7 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 7cfa2c8..939de5a 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -336,7 +336,7 @@ static struct omap_dss_device beagle_dvi_device = { - .name = "dvi", - .driver_name = "generic_panel", - .phy.dpi.data_lines = 24, -- .reset_gpio = 170, -+ .reset_gpio = -EINVAL, - .platform_enable = beagle_enable_dvi, - .platform_disable = beagle_disable_dvi, - }; -@@ -497,6 +497,12 @@ static int beagle_twl_gpio_setup(struct device *dev, - else - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); - -+ /* DVI reset GPIO is different between beagle revisions */ -+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) -+ beagle_dvi_device.reset_gpio = 129; -+ else -+ beagle_dvi_device.reset_gpio = 170; -+ - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0006-omap3-beaglexm-fix-power-on-of-DVI.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0006-omap3-beaglexm-fix-power-on-of-DVI.patch deleted file mode 100644 index ba74284..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0006-omap3-beaglexm-fix-power-on-of-DVI.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 7ad849e3d54d897614a74ad225392bd243e07d2e Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@beagleboard.org> -Date: Wed, 12 Jan 2011 00:23:29 +0000 -Subject: [PATCH 06/10] omap3: beaglexm: fix power on of DVI - -TFP410 DVI chip is used to provide display out. -This chip is controlled by 2 lines: -LDO which supplies the power is controlled over gpio + 2 -and the enable of the chip itself is done over gpio + 1 -NOTE: the LDO is necessary for LED, serial blocks as well. - -gpio + 1 was used to sense USB overcurrent in vanilla beagle. - -Without this fix, the display would not function as the LDO -remains shut down. - -[nm@ti.com: split up, added descriptive changelogs] -Signed-off-by: Nishanth Menon <nm@ti.com> -Signed-off-by: Koen Kooi <koen@beagleboard.org> -Signed-off-by: Tony Lindgren <tony@atomide.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 40 +++++++++++++++++++++++++++++++ - 1 files changed, 40 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 939de5a..9880c5c 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -444,6 +444,8 @@ static struct gpio_led gpio_leds[]; - static int beagle_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) - { -+ int r; -+ - if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { - mmc[0].gpio_wp = -EINVAL; - } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || -@@ -465,6 +467,17 @@ static int beagle_twl_gpio_setup(struct device *dev, - * power switch and overcurrent detect - */ - -+ if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM) { -+ r = gpio_request(gpio + 1, "EHCI_nOC"); -+ if (!r) { -+ r = gpio_direction_input(gpio + 1); -+ if (r) -+ gpio_free(gpio + 1); -+ } -+ if (r) -+ pr_err("%s: unable to configure EHCI_nOC\n", __func__); -+ } -+ - if (cpu_is_omap3630()) { - /* Power on DVI, Serial and PWR led */ - gpio_request(gpio + 1, "nDVI_PWR_EN"); -@@ -506,6 +519,33 @@ static int beagle_twl_gpio_setup(struct device *dev, - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - -+ /* -+ * gpio + 1 on Xm controls the TFP410's enable line (active low) -+ * gpio + 2 control varies depending on the board rev as follows: -+ * P7/P8 revisions(prototype): Camera EN -+ * A2+ revisions (production): LDO (supplies DVI, serial, led blocks) -+ */ -+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ r = gpio_request(gpio + 1, "nDVI_PWR_EN"); -+ if (!r) { -+ r = gpio_direction_output(gpio + 1, 0); -+ if (r) -+ gpio_free(gpio + 1); -+ } -+ if (r) -+ pr_err("%s: unable to configure nDVI_PWR_EN\n", -+ __func__); -+ r = gpio_request(gpio + 2, "DVI_LDO_EN"); -+ if (!r) { -+ r = gpio_direction_output(gpio + 2, 1); -+ if (r) -+ gpio_free(gpio + 2); -+ } -+ if (r) -+ pr_err("%s: unable to configure DVI_LDO_EN\n", -+ __func__); -+ } -+ - return 0; - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0007-beagleboard-hack-in-support-from-xM-rev-C.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0007-beagleboard-hack-in-support-from-xM-rev-C.patch deleted file mode 100644 index 0181f15..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0007-beagleboard-hack-in-support-from-xM-rev-C.patch +++ /dev/null @@ -1,61 +0,0 @@ -From b241e679f550f38062923eb7800a5c57a41fe95d Mon Sep 17 00:00:00 2001 -From: Jason Kridner <jkridner@beagleboard.org> -Date: Thu, 10 Mar 2011 13:15:38 +0100 -Subject: [PATCH 07/10] beagleboard: hack in support from xM rev C - -Based on patch by Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 20 ++++++++++++++++---- - 1 files changed, 16 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 9880c5c..4bde54b 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -182,7 +182,9 @@ static inline void __init omap3beagle_ks8851_init(void) { return; } - * AXBX = GPIO173, GPIO172, GPIO171: 1 1 1 - * C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0 - * C4 = GPIO173, GPIO172, GPIO171: 1 0 1 -- * XM = GPIO173, GPIO172, GPIO171: 0 0 0 -+ * XMA = GPIO173, GPIO172, GPIO171: 0 0 0 -+ * XMB = GPIO173, GPIO172, GPIO171: 0 0 1 -+ * XMC = GPIO173, GPIO172, GPIO171: 0 1 0 - */ - enum { - OMAP3BEAGLE_BOARD_UNKN = 0, -@@ -190,6 +192,7 @@ enum { - OMAP3BEAGLE_BOARD_C1_3, - OMAP3BEAGLE_BOARD_C4, - OMAP3BEAGLE_BOARD_XM, -+ OMAP3BEAGLE_BOARD_XMC, - }; - - static u8 omap3_beagle_version; -@@ -241,12 +244,21 @@ static void __init omap3_beagle_init_rev(void) - omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; - break; - case 0: -- printk(KERN_INFO "OMAP3 Beagle Rev: xM\n"); -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM A\n"); - omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; - break; -+ case 1: -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM B\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; -+ break; -+ case 2: -+ printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; -+ break; - default: -- printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); -- omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; -+ printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd, " -+ "assuming xM C or newer\n", beagle_rev); -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; - } - - return; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0008-omap3-beagle-cleaned-up-board-revision-conditions.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0008-omap3-beagle-cleaned-up-board-revision-conditions.patch deleted file mode 100644 index 513a101..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard-xmc/0008-omap3-beagle-cleaned-up-board-revision-conditions.patch +++ /dev/null @@ -1,153 +0,0 @@ -From 8bd3ffb5755c49aaffecb20b9bd43f955ac26251 Mon Sep 17 00:00:00 2001 -From: Jason Kridner <jkridner@beagleboard.org> -Date: Wed, 16 Mar 2011 09:21:06 -0500 -Subject: [PATCH 08/10] omap3: beagle: cleaned up board revision conditions - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 70 ++++++++++++++----------------- - 1 files changed, 32 insertions(+), 38 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 4bde54b..664a9c6 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -191,7 +191,7 @@ enum { - OMAP3BEAGLE_BOARD_AXBX, - OMAP3BEAGLE_BOARD_C1_3, - OMAP3BEAGLE_BOARD_C4, -- OMAP3BEAGLE_BOARD_XM, -+ OMAP3BEAGLE_BOARD_XMAB, - OMAP3BEAGLE_BOARD_XMC, - }; - -@@ -245,11 +245,11 @@ static void __init omap3_beagle_init_rev(void) - break; - case 0: - printk(KERN_INFO "OMAP3 Beagle Rev: xM A\n"); -- omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMAB; - break; - case 1: - printk(KERN_INFO "OMAP3 Beagle Rev: xM B\n"); -- omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; -+ omap3_beagle_version = OMAP3BEAGLE_BOARD_XMAB; - break; - case 2: - printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); -@@ -458,13 +458,18 @@ static int beagle_twl_gpio_setup(struct device *dev, - { - int r; - -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ switch(omap3_beagle_get_rev()) -+ { -+ case OMAP3BEAGLE_BOARD_XMAB: -+ case OMAP3BEAGLE_BOARD_XMC: - mmc[0].gpio_wp = -EINVAL; -- } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || -- (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { -+ break; -+ case OMAP3BEAGLE_BOARD_C1_3: -+ case OMAP3BEAGLE_BOARD_C4: - omap_mux_init_gpio(23, OMAP_PIN_INPUT); - mmc[0].gpio_wp = 23; -- } else { -+ break; -+ default: - omap_mux_init_gpio(29, OMAP_PIN_INPUT); - } - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ -@@ -479,7 +484,8 @@ static int beagle_twl_gpio_setup(struct device *dev, - * power switch and overcurrent detect - */ - -- if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM) { -+ if ((omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XMAB) && -+ (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XMC)) { - r = gpio_request(gpio + 1, "EHCI_nOC"); - if (!r) { - r = gpio_direction_input(gpio + 1); -@@ -490,54 +496,41 @@ static int beagle_twl_gpio_setup(struct device *dev, - pr_err("%s: unable to configure EHCI_nOC\n", __func__); - } - -- if (cpu_is_omap3630()) { -- /* Power on DVI, Serial and PWR led */ -- gpio_request(gpio + 1, "nDVI_PWR_EN"); -- gpio_direction_output(gpio + 1, 0); -- -- /* Power on camera interface */ -- gpio_request(gpio + 2, "CAM_EN"); -- gpio_direction_output(gpio + 2, 1); -- -- /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ -- gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); -- gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); -- } -- else { -- gpio_request(gpio + 1, "EHCI_nOC"); -- gpio_direction_input(gpio + 1); -- -- /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ -- gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); -- gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); -- } -- - /* -- * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active -+ * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, xM Ax/Bx active - * high / others active low) - */ - gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) -+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XMAB) - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); - else - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); - - /* DVI reset GPIO is different between beagle revisions */ -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) -- beagle_dvi_device.reset_gpio = 129; -- else -+ switch(omap3_beagle_get_rev()) -+ { -+ case OMAP3BEAGLE_BOARD_AXBX: -+ case OMAP3BEAGLE_BOARD_C1_3: -+ case OMAP3BEAGLE_BOARD_C4: - beagle_dvi_device.reset_gpio = 170; -+ break; -+ case OMAP3BEAGLE_BOARD_XMAB: -+ case OMAP3BEAGLE_BOARD_XMC: -+ default: -+ beagle_dvi_device.reset_gpio = 129; -+ } - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - - /* -- * gpio + 1 on Xm controls the TFP410's enable line (active low) -+ * gpio + 1 on xM controls the TFP410's enable line (active low) - * gpio + 2 control varies depending on the board rev as follows: - * P7/P8 revisions(prototype): Camera EN - * A2+ revisions (production): LDO (supplies DVI, serial, led blocks) - */ -- if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { -+ if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XMAB) || -+ (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XMC)) { - r = gpio_request(gpio + 1, "nDVI_PWR_EN"); - if (!r) { - r = gpio_direction_output(gpio + 1, 0); -@@ -1013,7 +1006,8 @@ static void __init omap3_beagle_init(void) - omap3_beagle_init_rev(); - omap3_beagle_i2c_init(); - -- if (cpu_is_omap3630()) { -+ if ((omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XMAB) && -+ (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XMC)) { - gpio_buttons[0].gpio = 4; - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/configs/cpuidle b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/configs/cpuidle deleted file mode 100644 index 06e3879..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/configs/cpuidle +++ /dev/null @@ -1,3053 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Thu Jul 22 14:16:08 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_OPROFILE_ARMV7=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_SLOW_WORK=y -# CONFIG_SLOW_WORK_DEBUG is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_IOMMU=y -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_DEBOBS is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_LL_DEBUG_UART1 is not set -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -CONFIG_OMAP_LL_DEBUG_UART3=y -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -# CONFIG_OMAP_PM_NOOP is not set -CONFIG_OMAP_PM_SRF=y -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -CONFIG_MACH_OMAP3_BEAGLE=y -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -# CONFIG_MACH_OMAP3EVM is not set -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_USER_L2_PLE=y -CONFIG_USER_PMON=y -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_DEBUG=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -CONFIG_PM_RUNTIME=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -# CONFIG_DEFAULT_BIC is not set -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_HTCP is not set -# CONFIG_DEFAULT_VEGAS is not set -# CONFIG_DEFAULT_WESTWOOD is not set -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CT_ACCT=y -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_CCID3_RTO=100 -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_ROUTE=y -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_OMAP_PREFETCH=y -# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=m -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -# CONFIG_ASYNC_RAID6_TEST is not set -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_TI_DAVINCI_EMAC is not set -# CONFIG_DM9000 is not set -CONFIG_ENC28J60=y -# CONFIG_ENC28J60_WRITEVERIFY is not set -# CONFIG_ETHOC is not set -CONFIG_SMC911X=y -CONFIG_SMSC911X=y -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -CONFIG_KS8851=y -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -CONFIG_B43=m -# CONFIG_B43_SDIO is not set -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -# CONFIG_RT2800USB is not set -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WL12XX=m -CONFIG_WL1251=m -CONFIG_WL1251_SPI=m -CONFIG_WL1251_SDIO=m -CONFIG_WL1271=m -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -CONFIG_WIMAX_IWMC3200_SDIO=y -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=y -CONFIG_USB_KAWETH=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_RTL8150=y -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_PLUSB=y -CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_UINPUT=y -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_XILINX is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -CONFIG_GPIO_TWL4030=y - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7473 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_LIS3_SPI is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_POWER=y -CONFIG_TWL4030_CODEC=y -# CONFIG_TWL4030_MADC is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_MT9V113=m -# CONFIG_VIDEO_TCM825X is not set -CONFIG_VIDEO_MT9P012=m -CONFIG_VIDEO_MT9T112=m -# CONFIG_VIDEO_DW9710 is not set -# CONFIG_VIDEO_OV3640 is not set -# CONFIG_VIDEO_IMX046 is not set -# CONFIG_VIDEO_LV8093 is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=y -CONFIG_VIDEO_VPSS_SYSTEM=y -CONFIG_VIDEO_VPFE_CAPTURE=y -# CONFIG_VIDEO_DM6446_CCDC is not set -# CONFIG_VIDEO_DM355_CCDC is not set -CONFIG_VIDEO_OMAP2_VOUT=y -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_ISP=y -CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER=y -CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_TEF6862 is not set -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GL5=m -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=3 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -# CONFIG_PANEL_TAAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_KYE is not set -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_NTRIG=y -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_TI_CPPI41_DMA is not set -# CONFIG_USB_MUSB_DEBUG is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_BERRY_CHARGE=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_VST=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=480 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -CONFIG_USB_ZERO=m -CONFIG_USB_ZERO_HNPTEST=y -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -# CONFIG_USB_MASS_STORAGE is not set -CONFIG_USB_G_SERIAL=m -CONFIG_USB_MIDI_GADGET=m -CONFIG_USB_G_PRINTER=m -CONFIG_USB_CDC_COMPOSITE=m -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_SPI=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=m - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=m -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TWL4030=m -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -# CONFIG_UIO_SMX is not set -# CONFIG_UIO_SERCOS3 is not set - -# -# TI VLYNQ -# -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_USB_IP_COMMON is not set -CONFIG_W35UND=m -# CONFIG_PRISM2_USB is not set -CONFIG_ECHO=m -CONFIG_OTUS=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -CONFIG_RTL8192SU=m -# CONFIG_INPUT_MIMIO is not set -# CONFIG_TRANZPORT is not set - -# -# Qualcomm MSM Camera And Video -# - -# -# Camera Sensor Selection -# -# CONFIG_INPUT_GPIO is not set -# CONFIG_DST is not set -# CONFIG_POHMELFS is not set -# CONFIG_PLAN9AUTH is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_FB_UDL is not set - -# -# RAR Register Driver -# -# CONFIG_RAR_REGISTER is not set -# CONFIG_IIO is not set -# CONFIG_RAMZSWAP is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_STRIP is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_POSIX_ACL is not set -# CONFIG_XFS_RT is not set -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -# CONFIG_GFS2_FS_LOCKING_DLM is not set -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -# CONFIG_OCFS2_FS_POSIX_ACL is not set -CONFIG_BTRFS_FS=m -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_ACL_SUPPORT=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DFS_UPCALL is not set -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -CONFIG_9P_FS=m - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_HW=y -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/configs/cpuidle-gether b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/configs/cpuidle-gether deleted file mode 100644 index 7261927..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/configs/cpuidle-gether +++ /dev/null @@ -1,3051 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Mon Jul 26 11:37:13 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_OPROFILE_ARMV7=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_SLOW_WORK=y -# CONFIG_SLOW_WORK_DEBUG is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_IOMMU=y -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_DEBOBS is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_LL_DEBUG_UART1 is not set -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -CONFIG_OMAP_LL_DEBUG_UART3=y -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -# CONFIG_OMAP_PM_NOOP is not set -CONFIG_OMAP_PM_SRF=y -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -CONFIG_MACH_OMAP3_BEAGLE=y -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -# CONFIG_MACH_OMAP3EVM is not set -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_USER_L2_PLE=y -CONFIG_USER_PMON=y -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_DEBUG=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -CONFIG_PM_RUNTIME=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -# CONFIG_DEFAULT_BIC is not set -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_HTCP is not set -# CONFIG_DEFAULT_VEGAS is not set -# CONFIG_DEFAULT_WESTWOOD is not set -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CT_ACCT=y -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_CCID3_RTO=100 -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_ROUTE=y -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_OMAP_PREFETCH=y -# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=m -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -# CONFIG_ASYNC_RAID6_TEST is not set -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_TI_DAVINCI_EMAC is not set -# CONFIG_DM9000 is not set -CONFIG_ENC28J60=y -# CONFIG_ENC28J60_WRITEVERIFY is not set -# CONFIG_ETHOC is not set -CONFIG_SMC911X=y -CONFIG_SMSC911X=y -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -CONFIG_KS8851=y -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -CONFIG_B43=m -# CONFIG_B43_SDIO is not set -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -# CONFIG_RT2800USB is not set -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WL12XX=m -CONFIG_WL1251=m -CONFIG_WL1251_SPI=m -CONFIG_WL1251_SDIO=m -CONFIG_WL1271=m -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -CONFIG_WIMAX_IWMC3200_SDIO=y -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=y -CONFIG_USB_KAWETH=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_RTL8150=y -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_PLUSB=y -CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_UINPUT=y -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_XILINX is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -CONFIG_GPIO_TWL4030=y - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7473 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_LIS3_SPI is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_POWER=y -CONFIG_TWL4030_CODEC=y -# CONFIG_TWL4030_MADC is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_MT9V113=m -# CONFIG_VIDEO_TCM825X is not set -CONFIG_VIDEO_MT9P012=m -CONFIG_VIDEO_MT9T112=m -# CONFIG_VIDEO_DW9710 is not set -# CONFIG_VIDEO_OV3640 is not set -# CONFIG_VIDEO_IMX046 is not set -# CONFIG_VIDEO_LV8093 is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=y -CONFIG_VIDEO_VPSS_SYSTEM=y -CONFIG_VIDEO_VPFE_CAPTURE=y -# CONFIG_VIDEO_DM6446_CCDC is not set -# CONFIG_VIDEO_DM355_CCDC is not set -CONFIG_VIDEO_OMAP2_VOUT=y -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_ISP=y -CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER=y -CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_TEF6862 is not set -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GL5=m -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=3 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -# CONFIG_PANEL_TAAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_KYE is not set -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_NTRIG=y -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_TI_CPPI41_DMA is not set -# CONFIG_USB_MUSB_DEBUG is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_BERRY_CHARGE=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_VST=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=480 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=y -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_SPI=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=m - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=m -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TWL4030=m -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -# CONFIG_UIO_SMX is not set -# CONFIG_UIO_SERCOS3 is not set - -# -# TI VLYNQ -# -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_USB_IP_COMMON is not set -CONFIG_W35UND=m -# CONFIG_PRISM2_USB is not set -CONFIG_ECHO=m -CONFIG_OTUS=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -CONFIG_RTL8192SU=m -# CONFIG_INPUT_MIMIO is not set -# CONFIG_TRANZPORT is not set - -# -# Qualcomm MSM Camera And Video -# - -# -# Camera Sensor Selection -# -# CONFIG_INPUT_GPIO is not set -# CONFIG_DST is not set -# CONFIG_POHMELFS is not set -# CONFIG_PLAN9AUTH is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_FB_UDL is not set - -# -# RAR Register Driver -# -# CONFIG_RAR_REGISTER is not set -# CONFIG_IIO is not set -# CONFIG_RAMZSWAP is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_STRIP is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_POSIX_ACL is not set -# CONFIG_XFS_RT is not set -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -# CONFIG_GFS2_FS_LOCKING_DLM is not set -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -# CONFIG_OCFS2_FS_POSIX_ACL is not set -CONFIG_BTRFS_FS=m -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_ACL_SUPPORT=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DFS_UPCALL is not set -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -CONFIG_9P_FS=m - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_HW=y -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/defconfig b/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/defconfig deleted file mode 100644 index 2abbd1a..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/beagleboard/defconfig +++ /dev/null @@ -1,3071 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Sun May 1 17:33:44 2011 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_OPROFILE_ARMV7=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_SLOW_WORK=y -# CONFIG_SLOW_WORK_DEBUG is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_IOMMU=y -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_DEBOBS is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_LL_DEBUG_UART1 is not set -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -CONFIG_OMAP_LL_DEBUG_UART3=y -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -# CONFIG_OMAP_PM_NOOP is not set -CONFIG_OMAP_PM_SRF=y -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -CONFIG_MACH_OMAP3_BEAGLE=y -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -# CONFIG_MACH_OMAP3EVM is not set -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_CRANEBOARD is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_USER_L2_PLE=y -CONFIG_USER_PMON=y -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_DEBUG=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -CONFIG_PM_RUNTIME=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -# CONFIG_DEFAULT_BIC is not set -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_HTCP is not set -# CONFIG_DEFAULT_VEGAS is not set -# CONFIG_DEFAULT_WESTWOOD is not set -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CT_ACCT=y -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_CCID3_RTO=100 -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_ROUTE=y -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_OMAP_PREFETCH=y -# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -CONFIG_EEPROM_AT24=m -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -# CONFIG_ASYNC_RAID6_TEST is not set -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_TI_DAVINCI_EMAC is not set -# CONFIG_DM9000 is not set -CONFIG_ENC28J60=y -# CONFIG_ENC28J60_WRITEVERIFY is not set -# CONFIG_ETHOC is not set -CONFIG_SMC911X=y -CONFIG_SMSC911X=y -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -CONFIG_KS8851=y -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -CONFIG_B43=m -# CONFIG_B43_SDIO is not set -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -# CONFIG_RT2800USB is not set -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WL12XX=m -CONFIG_WL1251=m -CONFIG_WL1251_SPI=m -CONFIG_WL1251_SDIO=m -CONFIG_WL1271=m -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -CONFIG_WIMAX_IWMC3200_SDIO=y -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=y -CONFIG_USB_KAWETH=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_RTL8150=y -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_PLUSB=y -CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_UINPUT=y -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_XILINX is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -CONFIG_GPIO_TWL4030=y - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7473 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_LIS3_SPI is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_POWER=y -# CONFIG_TPS65910_CORE is not set -CONFIG_TWL4030_CODEC=y -# CONFIG_TWL4030_MADC is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DMA_CONTIG=y -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_MT9V113=m -# CONFIG_VIDEO_TCM825X is not set -CONFIG_VIDEO_MT9P012=m -CONFIG_VIDEO_MT9T112=m -# CONFIG_VIDEO_DW9710 is not set -# CONFIG_VIDEO_OV3640 is not set -# CONFIG_VIDEO_IMX046 is not set -# CONFIG_VIDEO_LV8093 is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=y -CONFIG_VIDEO_VPSS_SYSTEM=y -CONFIG_VIDEO_VPFE_CAPTURE=y -# CONFIG_VIDEO_DM6446_CCDC is not set -# CONFIG_VIDEO_DM355_CCDC is not set -CONFIG_VIDEO_OMAP2_VOUT=y -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_ISP=y -CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER=y -CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -CONFIG_SOC_CAMERA=y -# CONFIG_SOC_CAMERA_MT9M001 is not set -# CONFIG_SOC_CAMERA_MT9M111 is not set -CONFIG_SOC_CAMERA_MT9P031=m -# CONFIG_SOC_CAMERA_MT9T031 is not set -# CONFIG_SOC_CAMERA_MT9V022 is not set -# CONFIG_SOC_CAMERA_RJ54N1 is not set -# CONFIG_SOC_CAMERA_TW9910 is not set -# CONFIG_SOC_CAMERA_PLATFORM is not set -# CONFIG_SOC_CAMERA_OV772X is not set -# CONFIG_SOC_CAMERA_OV9640 is not set -# CONFIG_VIDEO_SH_MOBILE_CEU is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_TEF6862 is not set -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GL5=m -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=3 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -# CONFIG_PANEL_TAAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_KYE is not set -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_NTRIG=y -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_TI_CPPI41_DMA is not set -# CONFIG_USB_MUSB_DEBUG is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_BERRY_CHARGE=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_VST=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=480 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -CONFIG_USB_ZERO=m -CONFIG_USB_ZERO_HNPTEST=y -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -# CONFIG_USB_MASS_STORAGE is not set -CONFIG_USB_G_SERIAL=m -CONFIG_USB_MIDI_GADGET=m -CONFIG_USB_G_PRINTER=m -CONFIG_USB_CDC_COMPOSITE=m -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_SPI=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=m - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=m -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TWL4030=m -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -# CONFIG_UIO_SMX is not set -# CONFIG_UIO_SERCOS3 is not set - -# -# TI VLYNQ -# -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_USB_IP_COMMON is not set -CONFIG_W35UND=m -# CONFIG_PRISM2_USB is not set -CONFIG_ECHO=m -CONFIG_OTUS=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -CONFIG_RTL8192SU=m -# CONFIG_INPUT_MIMIO is not set -# CONFIG_TRANZPORT is not set - -# -# Qualcomm MSM Camera And Video -# - -# -# Camera Sensor Selection -# -# CONFIG_INPUT_GPIO is not set -# CONFIG_DST is not set -# CONFIG_POHMELFS is not set -# CONFIG_PLAN9AUTH is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_FB_UDL is not set - -# -# RAR Register Driver -# -# CONFIG_RAR_REGISTER is not set -# CONFIG_IIO is not set -# CONFIG_RAMZSWAP is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_STRIP is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_POSIX_ACL is not set -# CONFIG_XFS_RT is not set -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -# CONFIG_GFS2_FS_LOCKING_DLM is not set -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -# CONFIG_OCFS2_FS_POSIX_ACL is not set -CONFIG_BTRFS_FS=m -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_ACL_SUPPORT=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DFS_UPCALL is not set -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -CONFIG_9P_FS=m - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_HW=y - -# -# OCF Configuration -# -# CONFIG_OCF_OCF is not set -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y 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-0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 -214 -84 -0 diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0001-mt9t111-first-stab-at-merging-sensor-driver-based-on.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0001-mt9t111-first-stab-at-merging-sensor-driver-based-on.patch deleted file mode 100644 index bd4a7f8..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0001-mt9t111-first-stab-at-merging-sensor-driver-based-on.patch +++ /dev/null @@ -1,2394 +0,0 @@ -From 4e23fe54d7f8ecc1c927d225b1b74e6b00e22997 Mon Sep 17 00:00:00 2001 -From: OpenEmbedded User <oe@OE-builder.(none)> -Date: Tue, 9 Feb 2010 17:16:13 +0100 -Subject: [PATCH 01/75] mt9t111: first stab at merging sensor driver based on a patch by Leopard Imaging - ---- - drivers/media/video/Kconfig | 8 + - drivers/media/video/Makefile | 1 + - drivers/media/video/mt9t111.c | 883 ++++++++++++++++++++++++ - drivers/media/video/mt9t111_reg.h | 1364 +++++++++++++++++++++++++++++++++++++ - include/media/mt9t111.h | 79 +++ - 5 files changed, 2335 insertions(+), 0 deletions(-) - create mode 100644 drivers/media/video/mt9t111.c - create mode 100644 drivers/media/video/mt9t111_reg.h - create mode 100644 include/media/mt9t111.h - -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index 41e39a7..f67ed46 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -344,6 +344,14 @@ config VIDEO_MT9P012 - MT9P012 camera. It is currently working with the TI OMAP3 - camera controller. - -+config VIDEO_MT9T111 -+ tristate "Micron MT9T111 raw sensor driver (3MP)" -+ depends on I2C && VIDEO_V4L2 -+ ---help--- -+ This is a Video4Linux2 sensor-level driver for the Micron -+ MT9T111 camera. It is currently working with the TI OMAP3 -+ camera controller. -+ - config VIDEO_DW9710 - tristate "Lens driver for DW9710" - depends on I2C && VIDEO_V4L2 -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index 88e8ec1..31688bf 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -127,6 +127,7 @@ obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o - obj-y += isp/ - obj-$(CONFIG_VIDEO_OMAP3) += omap34xxcam.o - obj-$(CONFIG_VIDEO_MT9P012) += mt9p012.o -+obj-$(CONFIG_VIDEO_MT9T111) += mt9t111.o - obj-$(CONFIG_VIDEO_DW9710) += dw9710.o - obj-$(CONFIG_VIDEO_TPS61059) += tps61059.o - obj-$(CONFIG_VIDEO_OV3640) += ov3640.o -diff --git a/drivers/media/video/mt9t111.c b/drivers/media/video/mt9t111.c -new file mode 100644 -index 0000000..ecc5115 ---- /dev/null -+++ b/drivers/media/video/mt9t111.c -@@ -0,0 +1,883 @@ -+/* -+ * drivers/media/video/mt9t111.c -+ * -+ * mt9t111 sensor driver -+ * -+ * Copyright (C) 2009 Leopard Imaging -+ * -+ * This file is licensed under the terms of the GNU General Public License -+ * version 2. This program is licensed "as is" without any warranty of any -+ * kind, whether express or implied. -+ */ -+ -+#include <linux/i2c.h> -+#include <linux/delay.h> -+#include <media/v4l2-int-device.h> -+ -+#include <media/mt9t111.h> -+#include "mt9t111_reg.h" -+ -+#define USE_RAW // YCbCr mode does not work yet -+//#define COLOR_BAR // Create a Color bar test pattern, Blue, Green, Red, Grey -+ -+#define SENSOR_DETECTED 1 -+#define SENSOR_NOT_DETECTED 0 -+ -+static void mt9t111_loaddefault(struct i2c_client *client); -+ -+/* -+* as a place holder for further development -+*/ -+static void debug_dummy(char *in_msg) -+{ -+ -+} -+ -+/* list of image formats supported by mt9t111 sensor */ -+const static struct v4l2_fmtdesc mt9t111_formats[] = { -+#ifdef USE_RAW -+ { -+ .description = "RAW ", -+ .pixelformat = V4L2_PIX_FMT_SGRBG10, -+ }, -+#else -+ { -+ .description = "YUV 422 ", -+ .pixelformat = V4L2_PIX_FMT_YUYV, -+ }, -+#endif -+}; -+ -+#define NUM_CAPTURE_FORMATS ARRAY_SIZE(mt9t111_formats) -+ -+/* -+ * Array of image sizes supported by MT9T111. These must be ordered from -+ * smallest image size to largest. -+ */ -+const static struct capture_size mt9t111_sizes[] = { -+ { 640, 480 }, -+// { 2048, 1536} -+}; -+ -+#define NUM_CAPTURE_SIZE ARRAY_SIZE(mt9t111_sizes) -+ -+ -+const struct v4l2_fract mt9t111_frameintervals[] = { -+ { .numerator = 1, .denominator = 10 } -+}; -+ -+#define NUM_CAPTURE_FRAMEINTERVALS ARRAY_SIZE(mt9t111_frameintervals) -+ -+/** -+ * struct mt9t111_sensor - main structure for storage of sensor information -+ * @pdata: access functions and data for platform level information -+ * @v4l2_int_device: V4L2 device structure structure -+ * @i2c_client: iic client device structure -+ * @pix: V4L2 pixel format information structure -+ * @timeperframe: time per frame expressed as V4L fraction -+ * @scaler: -+ * @ver: mt9t111 chip version -+ * @fps: frames per second value -+ */ -+struct mt9t111_sensor { -+ const struct mt9t111_platform_data *pdata; -+ struct v4l2_int_device *v4l2_int_device; -+ struct i2c_client *i2c_client; -+ struct v4l2_pix_format pix; -+ struct v4l2_fract timeperframe; -+ int scaler; -+ int ver; -+ int fps; -+ int state; -+}; -+ -+static struct mt9t111_sensor mt9t111 = { -+ .timeperframe = { -+ .numerator = 1, -+ .denominator = 10, -+ }, -+ .state = SENSOR_NOT_DETECTED, -+}; -+ -+/** -+ * mt9t111_read_reg - Read a value from a register in an mt9t111 sensor device -+ * @client: i2c driver client structure -+ * @data_length: length of data to be read -+ * @reg: register address / offset -+ * @val: stores the value that gets read -+ * -+ * Read a value from a register in an mt9t111 sensor device. -+ * The value is returned in 'val'. -+ * Returns zero if successful, or non-zero otherwise. -+ */ -+static int -+mt9t111_read_reg(struct i2c_client *client, u16 reg, u16 *val) -+{ -+ struct i2c_msg msg[1]; -+ u8 data[4]; -+ int err; -+ -+ msg->addr = client->addr; -+ msg->flags = 0; -+ msg->len = 2; -+ msg->buf = data; -+ data[0] = (reg & 0xff00) >> 8; -+ data[1] = (reg & 0x00ff); -+ err = i2c_transfer(client->adapter, msg, 1); -+ if (err >= 0) { -+ msg->flags = I2C_M_RD; -+ msg->len = 2; /* 2 byte read */ -+ err = i2c_transfer(client->adapter, msg, 1); -+ if (err >= 0) { -+ *val = ((data[0] & 0x00ff) << 8) -+ | (data[1] & 0x00ff); -+ return 0; -+ } -+ } -+ return err; -+} -+ -+/** -+ * mt9t111_write_reg - Write a value to a register in an mt9t111 sensor device -+ * @client: i2c driver client structure -+ * @data_length: length of data to be read -+ * @reg: register address / offset -+ * @val: value to be written to specified register -+ * -+ * Write a value to a register in an mt9t111 sensor device. -+ * Returns zero if successful, or non-zero otherwise. -+ */ -+static int -+mt9t111_write_reg(struct i2c_client *client, u16 reg, u16 val) -+{ -+ struct i2c_msg msg[1]; -+ u8 data[20]; -+ int err; -+ -+ msg->addr = client->addr; -+ msg->flags = 0; -+ msg->len = 4; -+ msg->buf = data; -+ data[0] = (u8)((reg & 0xff00) >> 8); -+ data[1] = (u8)(reg & 0x00ff); -+ data[2] = (u8)((val & 0xff00) >> 8); -+ data[3] = (u8)(val & 0x00ff); -+ err = i2c_transfer(client->adapter, msg, 1); -+ -+ return err; -+} -+ -+/** -+ * mt9t111_write_regs - Write registers to an mt9t111 sensor device -+ * @client: i2c driver client structure -+ * @reg_in: pointer to registers to write -+ * @cnt: the number of registers -+ * -+ * Write registers . -+ * Returns zero if successful, or non-zero otherwise. -+ */ -+static int -+mt9t111_write_regs(struct i2c_client *client, mt9t111_regs *reg_in, int cnt) -+{ -+ int err = 0; -+ int i; -+ mt9t111_regs *reg = reg_in; -+ -+ for (i=0;i<cnt;i++) { -+ if (reg->delay_time == 0) { -+ err |= mt9t111_write_reg(client, reg->addr, reg->data); -+ } else if (reg->addr != 0 || reg->data != 0) { -+ err |= mt9t111_write_reg(client, reg->addr, reg->data); -+ mdelay(reg->delay_time); -+ } else -+ mdelay(reg->delay_time); -+ -+ if (err < 0) { -+ dev_warn(&client->dev, "write reg error, addr = 0x%x, data = 0x%x \n", \ -+ reg->addr, reg->data); -+ return err; -+ } -+ reg++; -+ } -+ return err; -+} -+ -+/** -+ * mt9t111_detect - Detect if an mt9t111 is present, and if so which revision -+ * @client: pointer to the i2c client driver structure -+ * -+ * Detect if an mt9t111 is present -+ * Returns a negative error number if no device is detected, or the -+ * non-negative value of the version ID register if a device is detected. -+ */ -+static int -+mt9t111_detect(struct i2c_client *client) -+{ -+ u16 val; -+ -+ /* chip ID is at address 0 */ -+ if (mt9t111_read_reg(client, MT9T111_CHIP_ID, &val) < 0) -+ return -ENODEV; -+ dev_info(&client->dev, "model id detected 0x%x\n", val); -+ -+ if (val != MT9T111_CHIP_ID_VALUE) { -+ dev_warn(&client->dev, "model id mismatch received 0x%x expecting 0x%x\n", -+ val, MT9T111_CHIP_ID_VALUE); -+ -+ return -ENODEV; -+ } -+ -+ return 0; -+ -+} -+ -+/** -+ * mt9t111_configure - Configure the mt9t111 for the specified image mode -+ * @s: pointer to standard V4L2 device structure -+ * -+ * Configure the mt9t111 for a specified image size, pixel format, and frame -+ * period. xclk is the frequency (in Hz) of the xclk input to the mt9t111. -+ * fper is the frame period (in seconds) expressed as a fraction. -+ * Returns zero if successful, or non-zero otherwise. -+ * The actual frame period is returned in fper. -+ */ -+static int mt9t111_configure(struct v4l2_int_device *s) -+{ -+ debug_dummy("debug_dummy -- to set imager mode"); -+ -+ return 0; -+} -+ -+/** -+ * ioctl_enum_framesizes - V4L2 sensor if handler for vidioc_int_enum_framesizes -+ * @s: pointer to standard V4L2 device structure -+ * @frms: pointer to standard V4L2 framesizes enumeration structure -+ * -+ * Returns possible framesizes depending on choosen pixel format -+ **/ -+static int ioctl_enum_framesizes(struct v4l2_int_device *s, -+ struct v4l2_frmsizeenum *frms) -+{ -+ int ifmt; -+ -+ for (ifmt = 0; ifmt < NUM_CAPTURE_FORMATS; ifmt++) { -+ if (frms->pixel_format == mt9t111_formats[ifmt].pixelformat) -+ break; -+ } -+ /* Is requested pixelformat not found on sensor? */ -+ if (ifmt == NUM_CAPTURE_FORMATS) -+ return -EINVAL; -+ -+ /* Do we already reached all discrete framesizes? */ -+ if (frms->index >= NUM_CAPTURE_SIZE) -+ return -EINVAL; -+ -+ frms->type = V4L2_FRMSIZE_TYPE_DISCRETE; -+ frms->discrete.width = mt9t111_sizes[frms->index].width; -+ frms->discrete.height = mt9t111_sizes[frms->index].height; -+ -+ return 0; -+ -+} -+ -+static int ioctl_enum_frameintervals(struct v4l2_int_device *s, -+ struct v4l2_frmivalenum *frmi) -+{ -+ int ifmt; -+ -+printk(KERN_INFO "entering ioctl_enum_frameintervals\n"); -+printk(KERN_INFO "index = %d, pixel_format = 0x%x, width = %d, height = %d\n", -+ frmi->index, frmi->pixel_format, frmi->width, frmi->height); -+printk(KERN_INFO "mt9t111 format = 0x%x\n", mt9t111_formats[0].pixelformat); -+ -+ if (frmi->index >= NUM_CAPTURE_FRAMEINTERVALS) -+ return -EINVAL; -+ -+ for (ifmt = 0; ifmt < NUM_CAPTURE_FORMATS; ifmt++) { -+ if (frmi->pixel_format == mt9t111_formats[ifmt].pixelformat) -+ break; -+ } -+ /* Is requested pixelformat not found on sensor? */ -+ if (ifmt == NUM_CAPTURE_FORMATS) -+ return -EINVAL; -+ -+ frmi->type = V4L2_FRMSIZE_TYPE_DISCRETE; -+ frmi->discrete.numerator = -+ mt9t111_frameintervals[frmi->index].numerator; -+ frmi->discrete.denominator = -+ mt9t111_frameintervals[frmi->index].denominator; -+ return 0; -+} -+ -+/** -+ * ioctl_init - V4L2 sensor interface handler for VIDIOC_INT_INIT -+ * @s: pointer to standard V4L2 device structure -+ * -+ * Initialize the sensor device (call mt9t111_configure()) -+ */ -+static int ioctl_init(struct v4l2_int_device *s) -+{ -+ return 0; -+} -+ -+/** -+ * ioctl_dev_exit - V4L2 sensor interface handler for vidioc_int_dev_exit_num -+ * @s: pointer to standard V4L2 device structure -+ * -+ * Delinitialise the dev. at slave detach. The complement of ioctl_dev_init. -+ */ -+static int ioctl_dev_exit(struct v4l2_int_device *s) -+{ -+ return 0; -+} -+ -+/** -+ * ioctl_dev_init - V4L2 sensor interface handler for vidioc_int_dev_init_num -+ * @s: pointer to standard V4L2 device structure -+ * -+ * Initialise the device when slave attaches to the master. Returns 0 if -+ * mt9t111 device could be found, otherwise returns appropriate error. -+ */ -+static int ioctl_dev_init(struct v4l2_int_device *s) -+{ -+ return 0; -+} -+ -+/** -+ * ioctl_s_power - V4L2 sensor interface handler for vidioc_int_s_power_num -+ * @s: pointer to standard V4L2 device structure -+ * @on: power state to which device is to be set -+ * -+ * Sets devices power state to requrested state, if possible. -+ */ -+static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) -+{ -+ struct mt9t111_sensor *sensor = s->priv; -+ struct i2c_client *c = sensor->i2c_client; -+ int rval; -+ -+ if ((on == V4L2_POWER_STANDBY) && (sensor->state == SENSOR_DETECTED)) -+ debug_dummy("debug_dummy -- put to standby\n"); -+ -+ if (on != V4L2_POWER_ON) -+ debug_dummy("debug_dummy -- stop master clock\n"); -+ else -+ debug_dummy("debug_dummy -- enable clock\n");; -+ -+ rval = sensor->pdata->power_set(on); -+ if (rval < 0) { -+ dev_err(&c->dev, "Unable to set the power state: " "mt9t111" -+ " sensor\n"); -+ //sensor->pdata->set_xclk(0); -+ return rval; -+ } -+ -+ if ((on == V4L2_POWER_ON) && (sensor->state == SENSOR_DETECTED)) -+ mt9t111_configure(s); -+ -+ if ((on == V4L2_POWER_ON) && (sensor->state == SENSOR_NOT_DETECTED)) { -+ rval = mt9t111_detect(c); -+ if (rval < 0) { -+ dev_err(&c->dev, "Unable to detect " "mt9t111" -+ " sensor\n"); -+ sensor->state = SENSOR_NOT_DETECTED; -+ return rval; -+ } -+ mt9t111_loaddefault(c); -+ sensor->state = SENSOR_DETECTED; -+ sensor->ver = rval; -+ pr_info("mt9t111" " chip version 0x%02x detected\n", -+ sensor->ver); -+ } -+ return 0; -+} -+ -+/** -+ * ioctl_g_priv - V4L2 sensor interface handler for vidioc_int_g_priv_num -+ * @s: pointer to standard V4L2 device structure -+ * @p: void pointer to hold sensor's private data address -+ * -+ * Returns device's (sensor's) private data area address in p parameter -+ */ -+static int ioctl_g_priv(struct v4l2_int_device *s, void *p) -+{ -+ struct mt9t111_sensor *sensor = s->priv; -+ -+ return sensor->pdata->priv_data_set(p); -+} -+ -+/** -+ * ioctl_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure -+ * -+ * Configures the sensor to use the input parameters, if possible. If -+ * not possible, reverts to the old parameters and returns the -+ * appropriate error code. -+ */ -+static int ioctl_s_parm(struct v4l2_int_device *s, -+ struct v4l2_streamparm *a) -+{ -+ //TODO: set paramters -+ debug_dummy("debug_dummy -- VIDIOC_S_PARM "); -+ return 0; -+} -+ -+/** -+ * ioctl_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure -+ * -+ * Returns the sensor's video CAPTURE parameters. -+ */ -+static int ioctl_g_parm(struct v4l2_int_device *s, -+ struct v4l2_streamparm *a) -+{ -+ struct mt9t111_sensor *sensor = s->priv; -+ struct v4l2_captureparm *cparm = &a->parm.capture; -+ -+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; -+ -+ memset(a, 0, sizeof(*a)); -+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ -+ cparm->capability = V4L2_CAP_TIMEPERFRAME; -+ cparm->timeperframe = sensor->timeperframe; -+ -+ return 0; -+} -+ -+/** -+ * ioctl_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 v4l2_format structure -+ * -+ * Returns the sensor's current pixel format in the v4l2_format -+ * parameter. -+ */ -+static int ioctl_g_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) -+{ -+ struct mt9t111_sensor *sensor = s->priv; -+ f->fmt.pix = sensor->pix; -+ -+ return 0; -+} -+ -+/** -+ * ioctl_try_fmt_cap - Implement the CAPTURE buffer VIDIOC_TRY_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure -+ * -+ * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This -+ * ioctl is used to negotiate the image capture size and pixel format -+ * without actually making it take effect. -+ */ -+static int ioctl_try_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) -+{ -+ struct v4l2_pix_format *pix = &f->fmt.pix; -+ struct mt9t111_sensor *sensor = s->priv; -+ struct v4l2_pix_format *pix2 = &sensor->pix; -+ -+ pix->width = 640; -+ pix->height = 480; -+#ifdef USE_RAW -+ pix->pixelformat = V4L2_PIX_FMT_SGRBG10; -+ pix->bytesperline = pix->width; -+ pix->colorspace = V4L2_COLORSPACE_SRGB; -+#else -+ pix->pixelformat = V4L2_PIX_FMT_YUYV; -+ pix->bytesperline = pix->width * 2; -+ pix->colorspace = V4L2_COLORSPACE_JPEG; -+#endif -+ pix->field = V4L2_FIELD_NONE; -+ -+ pix->sizeimage = pix->bytesperline * pix->height; -+ pix->priv = 0; -+ *pix2 = *pix; -+ return 0; -+} -+ -+/** -+ * ioctl_s_fmt_cap - V4L2 sensor interface handler for VIDIOC_S_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure -+ * -+ * If the requested format is supported, configures the HW to use that -+ * format, returns error code if format not supported or HW can't be -+ * correctly configured. -+ */ -+static int ioctl_s_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) -+{ -+ struct mt9t111_sensor *sensor = s->priv; -+ struct v4l2_pix_format *pix = &f->fmt.pix; -+ int rval; -+ -+ rval = ioctl_try_fmt_cap(s, f); -+ if (!rval) -+ sensor->pix = *pix; -+ -+ return rval; -+} -+ -+/** -+ * ioctl_enum_fmt_cap - Implement the CAPTURE buffer VIDIOC_ENUM_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @fmt: standard V4L2 VIDIOC_ENUM_FMT ioctl structure -+ * -+ * Implement the VIDIOC_ENUM_FMT ioctl for the CAPTURE buffer type. -+ */ -+static int ioctl_enum_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_fmtdesc *fmt) -+{ -+ int index = fmt->index; -+ enum v4l2_buf_type type = fmt->type; -+ -+ memset(fmt, 0, sizeof(*fmt)); -+ fmt->index = index; -+ fmt->type = type; -+ -+ switch (fmt->type) { -+ case V4L2_BUF_TYPE_VIDEO_CAPTURE: -+ if (index >= NUM_CAPTURE_FORMATS) -+ return -EINVAL; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ fmt->flags = mt9t111_formats[index].flags; -+ strlcpy(fmt->description, mt9t111_formats[index].description, -+ sizeof(fmt->description)); -+ fmt->pixelformat = mt9t111_formats[index].pixelformat; -+ -+ return 0; -+} -+ -+/** -+ * ioctl_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure -+ * -+ * If the requested control is supported, sets the control's current -+ * value in HW (and updates the video_control[] array). Otherwise, -+ * returns -EINVAL if the control is not supported. -+ */ -+static int ioctl_s_ctrl(struct v4l2_int_device *s, -+ struct v4l2_control *vc) -+{ -+ debug_dummy("debug_dummy -- s ctrl\n"); -+ return 0; -+} -+ -+/** -+ * ioctl_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure -+ * -+ * If the requested control is supported, returns the control's current -+ * value from the video_control[] array. Otherwise, returns -EINVAL -+ * if the control is not supported. -+ */ -+static int ioctl_g_ctrl(struct v4l2_int_device *s, -+ struct v4l2_control *vc) -+{ -+ debug_dummy("debug_dummy -- g ctrl\n"); -+ return 0; -+} -+ -+/** -+ * ioctl_queryctrl - V4L2 sensor interface handler for VIDIOC_QUERYCTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @qc: standard V4L2 VIDIOC_QUERYCTRL ioctl structure -+ * -+ * If the requested control is supported, returns the control information -+ * from the video_control[] array. Otherwise, returns -EINVAL if the -+ * control is not supported. -+ */ -+static int ioctl_queryctrl(struct v4l2_int_device *s, -+ struct v4l2_queryctrl *qc) -+{ -+ debug_dummy("debug_dummy -- query ctrl\n"); -+ return-EINVAL; -+} -+ -+/** -+ * ioctl_s_routing - V4L2 decoder interface handler for VIDIOC_S_INPUT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @index: number of the input -+ * -+ * If index is valid, selects the requested input. Otherwise, returns -EINVAL if -+ * the input is not supported or there is no active signal present in the -+ * selected input. -+ */ -+static int ioctl_s_routing(struct v4l2_int_device *s, -+ struct v4l2_routing *route) -+{ -+ return 0; -+} -+ -+/** -+ * ioctl_g_ifparm - V4L2 decoder interface handler for vidioc_int_g_ifparm_num -+ * @s: pointer to standard V4L2 device structure -+ * @p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure -+ * -+ * Gets slave interface parameters. -+ * Calculates the required xclk value to support the requested -+ * clock parameters in p. This value is returned in the p -+ * parameter. -+ */ -+static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) -+{ -+ struct mt9t111_sensor *sensor = s->priv; -+ int rval; -+ -+ if (p == NULL) -+ return -EINVAL; -+ -+ if (NULL == sensor->pdata->ifparm) -+ return -EINVAL; -+ -+ rval = sensor->pdata->ifparm(p); -+ if (rval) { -+ v4l_err(sensor->i2c_client, "g_ifparm.Err[%d]\n", rval); -+ return rval; -+ } -+ -+ p->u.ycbcr.clock_curr = 40*1000000; // temporal value -+ -+ return 0; -+} -+ -+ -+static struct v4l2_int_ioctl_desc mt9t111_ioctl_desc[] = { -+ { .num = vidioc_int_enum_framesizes_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_enum_framesizes }, -+ { .num = vidioc_int_enum_frameintervals_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_enum_frameintervals }, -+ { .num = vidioc_int_dev_init_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_dev_init }, -+ { .num = vidioc_int_dev_exit_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_dev_exit }, -+ { .num = vidioc_int_s_power_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_s_power }, -+ { .num = vidioc_int_g_priv_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_g_priv }, -+ {vidioc_int_g_ifparm_num, -+ .func = (v4l2_int_ioctl_func*) ioctl_g_ifparm}, -+ { .num = vidioc_int_init_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_init }, -+ { .num = vidioc_int_enum_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_enum_fmt_cap }, -+ { .num = vidioc_int_try_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_try_fmt_cap }, -+ { .num = vidioc_int_g_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_g_fmt_cap }, -+ { .num = vidioc_int_s_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_s_fmt_cap }, -+ { .num = vidioc_int_g_parm_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_g_parm }, -+ { .num = vidioc_int_s_parm_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_s_parm }, -+ { .num = vidioc_int_queryctrl_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_queryctrl }, -+ { .num = vidioc_int_g_ctrl_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_g_ctrl }, -+ { .num = vidioc_int_s_ctrl_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_s_ctrl }, -+ {.num = vidioc_int_s_video_routing_num, -+ .func = (v4l2_int_ioctl_func *) ioctl_s_routing}, -+}; -+ -+static void mt9t111_refresh(struct i2c_client *client){ -+ int i; -+ unsigned short value; -+ // MCU_ADDRESS [SEQ_CMD] -- refresh -+ mt9t111_write_reg(client, 0x098E, 0x8400); -+ mt9t111_write_reg(client, 0x0990, 0x0006); -+ for (i=0;i<100;i++){ -+ mt9t111_write_reg(client, 0x098E, 0x8400); -+ mt9t111_read_reg(client,0x0990,&value); -+ if ( value == 0) -+ break; -+ mdelay(5); -+ } -+} -+ -+#ifdef COLOR_BAR -+static void mt9t111_color_bar(struct i2c_client *client) -+{ -+ mt9t111_write_reg(client, 0x3210, 0x01B0); // disable lens correction -+ -+ mt9t111_write_reg(client, 0x098E, 0x6003); -+ mt9t111_write_reg(client, 0x0990, 0x0100); -+ mt9t111_write_reg(client, 0x098E, 0x6025); -+ mt9t111_write_reg(client, 0x0990, 0x0003); -+} -+#endif -+ -+static void mt9t111_bayer_format(struct i2c_client *client) -+{ -+ mt9t111_write_regs(client, bayer_pattern_regs, sizeof(bayer_pattern_regs)/sizeof(mt9t111_regs)); -+} -+ -+static void mt9t111_enable_pll(struct i2c_client *client) -+{ -+ int i; -+ unsigned short value; -+ -+ mt9t111_write_regs(client, pll_regs1, sizeof(pll_regs1)/sizeof(mt9t111_regs)); -+ for (i=0;i<100;i++){ -+ mt9t111_read_reg(client,0x0014,&value); -+ if (( value & 0x8000) != 0) -+ break; -+ mdelay(2); -+ } -+ mt9t111_write_regs(client, pll_regs2, sizeof(pll_regs2)/sizeof(mt9t111_regs)); -+} -+ -+ -+static void mt9t111_loaddefault(struct i2c_client *client) -+{ -+ mt9t111_write_reg(client, 0x001A, 0x0219); -+ mt9t111_write_reg(client, 0x001A, 0x0218); -+ -+ mt9t111_enable_pll(client); -+ mt9t111_write_regs(client, def_regs1, sizeof(def_regs1)/sizeof(mt9t111_regs)); -+ mt9t111_write_regs(client, patch_rev6, sizeof(patch_rev6)/sizeof(mt9t111_regs)); -+ mt9t111_write_regs(client, def_regs2, sizeof(def_regs2)/sizeof(mt9t111_regs)); -+ -+#ifdef USE_RAW -+ mt9t111_bayer_format(client); -+#endif -+ -+#ifdef COLOR_BAR -+ mt9t111_color_bar(client); -+#endif -+ -+ mt9t111_refresh(client); -+} -+ -+static struct v4l2_int_slave mt9t111_slave = { -+ .ioctls = mt9t111_ioctl_desc, -+ .num_ioctls = ARRAY_SIZE(mt9t111_ioctl_desc), -+}; -+ -+static struct v4l2_int_device mt9t111_int_device = { -+ .module = THIS_MODULE, -+ .name = "mt9t111", -+ .priv = &mt9t111, -+ .type = v4l2_int_type_slave, -+ .u = { -+ .slave = &mt9t111_slave, -+ }, -+}; -+ -+/** -+ * mt9t111_probe - sensor driver i2c probe handler -+ * @client: i2c driver client device structure -+ * -+ * Register sensor as an i2c client device and V4L2 -+ * device. -+ */ -+static int -+mt9t111_probe(struct i2c_client *client, const struct i2c_device_id *id) -+{ -+ struct mt9t111_sensor *sensor = &mt9t111; -+ int err; -+ -+ if (i2c_get_clientdata(client)) -+ return -EBUSY; -+ -+ sensor->pdata = client->dev.platform_data; -+ -+ if (!sensor->pdata) { -+ dev_err(&client->dev, "no platform data?\n"); -+ return -ENODEV; -+ } -+ -+ sensor->v4l2_int_device = &mt9t111_int_device; -+ sensor->i2c_client = client; -+ -+ i2c_set_clientdata(client, sensor); -+ -+ sensor->pix.width = 640; -+ sensor->pix.height = 480; -+#ifdef USE_RAW -+ sensor->pix.pixelformat = V4L2_PIX_FMT_SGRBG10; -+#else -+ sensor->pix.pixelformat = V4L2_PIX_FMT_YUYV; -+#endif -+ err = v4l2_int_device_register(sensor->v4l2_int_device); -+ if (err) -+ i2c_set_clientdata(client, NULL); -+ return err; -+} -+ -+/** -+ * mt9t111_remove - sensor driver i2c remove handler -+ * @client: i2c driver client device structure -+ * -+ * Unregister sensor as an i2c client device and V4L2 -+ * device. Complement of mt9t111_probe(). -+ */ -+static int __exit -+mt9t111_remove(struct i2c_client *client) -+{ -+ struct mt9t111_sensor *sensor = i2c_get_clientdata(client); -+ -+ if (!client->adapter) -+ return -ENODEV; /* our client isn't attached */ -+ -+ v4l2_int_device_unregister(sensor->v4l2_int_device); -+ i2c_set_clientdata(client, NULL); -+ -+ return 0; -+} -+ -+static const struct i2c_device_id mt9t111_id[] = { -+ { "mt9t111", 0 }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(i2c, mt9t111_id); -+ -+static struct i2c_driver mt9t111sensor_i2c_driver = { -+ .driver = { -+ .name = "mt9t111", -+ .owner = THIS_MODULE, -+ }, -+ .probe = mt9t111_probe, -+ .remove = __exit_p(mt9t111_remove), -+ .id_table = mt9t111_id, -+}; -+ -+/** -+ * mt9t111sensor_init - sensor driver module_init handler -+ * -+ * Registers driver as an i2c client driver. Returns 0 on success, -+ * error code otherwise. -+ */ -+static int __init mt9t111sensor_init(void) -+{ -+printk(KERN_INFO "entering mt9t111sensor_init\n"); -+ return i2c_add_driver(&mt9t111sensor_i2c_driver); -+} -+module_init(mt9t111sensor_init); -+ -+/** -+ * mt9t111sensor_cleanup - sensor driver module_exit handler -+ * -+ * Unregisters/deletes driver as an i2c client driver. -+ * Complement of mt9t111sensor_init. -+ */ -+static void __exit mt9t111sensor_cleanup(void) -+{ -+ i2c_del_driver(&mt9t111sensor_i2c_driver); -+} -+module_exit(mt9t111sensor_cleanup); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("mt9t111 camera sensor driver"); -diff --git a/drivers/media/video/mt9t111_reg.h b/drivers/media/video/mt9t111_reg.h -new file mode 100644 -index 0000000..e012eeb ---- /dev/null -+++ b/drivers/media/video/mt9t111_reg.h -@@ -0,0 +1,1364 @@ -+/* -+ * drivers/media/video/mt9t111_reg.h -+ * -+ * mt9t111 sensor driver header file -+ * -+ * Copyright (C) 2009 Leopard Imaging -+ * -+ * This file is licensed under the terms of the GNU General Public License -+ * version 2. This program is licensed "as is" without any warranty of any -+ * kind, whether express or implied. -+ */ -+ -+#ifndef MT9T111_REG_H -+#define MT9T111_REG_H -+ -+/* register addr */ -+#define MT9T111_CHIP_ID (0x0000) -+ -+/* register value */ -+#define MT9T111_CHIP_ID_VALUE (0x2680) -+ -+typedef struct { -+ u16 delay_time; -+ u16 addr; -+ u16 data; -+} mt9t111_regs; -+ -+mt9t111_regs patch_rev6[] ={ -+ {0, 0x0982, 0x0}, -+ {0, 0x098A, 0xCE7}, -+ {0, 0x0990, 0x3C3C}, -+ {0, 0x0992, 0x3C3C}, -+ {0, 0x0994, 0x3C5F}, -+ {0, 0x0996, 0x4F30}, -+ {0, 0x0998, 0xED08}, -+ {0, 0x099a, 0xBD61}, -+ {0, 0x099c, 0xD5CE}, -+ {0, 0x099e, 0x4CD}, -+ {0, 0x098A, 0xCF7}, -+ {0, 0x0990, 0x1F17}, -+ {0, 0x0992, 0x211}, -+ {0, 0x0994, 0xCC33}, -+ {0, 0x0996, 0x2E30}, -+ {0, 0x0998, 0xED02}, -+ {0, 0x099a, 0xCCFF}, -+ {0, 0x099c, 0xFDED}, -+ {0, 0x099e, 0xCC}, -+ {0, 0x098A, 0xD07}, -+ {0, 0x0990, 0x2}, -+ {0, 0x0992, 0xBD70}, -+ {0, 0x0994, 0x6D18}, -+ {0, 0x0996, 0xDE1F}, -+ {0, 0x0998, 0x181F}, -+ {0, 0x099a, 0x8E01}, -+ {0, 0x099c, 0x10CC}, -+ {0, 0x099e, 0x3C52}, -+ {0, 0x098A, 0xD17}, -+ {0, 0x0990, 0x30ED}, -+ {0, 0x0992, 0x18}, -+ {0, 0x0994, 0xECA0}, -+ {0, 0x0996, 0xC4FD}, -+ {0, 0x0998, 0xBD70}, -+ {0, 0x099a, 0x2120}, -+ {0, 0x099c, 0x1ECC}, -+ {0, 0x099e, 0x3C52}, -+ {0, 0x098A, 0xD27}, -+ {0, 0x0990, 0x30ED}, -+ {0, 0x0992, 0xDE}, -+ {0, 0x0994, 0x1FEC}, -+ {0, 0x0996, 0xA0BD}, -+ {0, 0x0998, 0x7021}, -+ {0, 0x099a, 0xCC3C}, -+ {0, 0x099c, 0x5230}, -+ {0, 0x099e, 0xED02}, -+ {0, 0x098A, 0xD37}, -+ {0, 0x0990, 0xCCFF}, -+ {0, 0x0992, 0xFCED}, -+ {0, 0x0994, 0xCC}, -+ {0, 0x0996, 0x2}, -+ {0, 0x0998, 0xBD70}, -+ {0, 0x099a, 0x6DFC}, -+ {0, 0x099c, 0x4E1}, -+ {0, 0x099e, 0x1A83}, -+ {0, 0x098A, 0xD47}, -+ {0, 0x0990, 0x1}, -+ {0, 0x0992, 0x2720}, -+ {0, 0x0994, 0x1A83}, -+ {0, 0x0996, 0x4}, -+ {0, 0x0998, 0x271E}, -+ {0, 0x099a, 0x1A83}, -+ {0, 0x099c, 0x8}, -+ {0, 0x099e, 0x271C}, -+ {0, 0x098A, 0xD57}, -+ {0, 0x0990, 0x1A83}, -+ {0, 0x0992, 0x10}, -+ {0, 0x0994, 0x271A}, -+ {0, 0x0996, 0x1A83}, -+ {0, 0x0998, 0x20}, -+ {0, 0x099a, 0x2718}, -+ {0, 0x099c, 0x1A83}, -+ {0, 0x099e, 0x40}, -+ {0, 0x098A, 0xD67}, -+ {0, 0x0990, 0x2716}, -+ {0, 0x0992, 0x2019}, -+ {0, 0x0994, 0xC61E}, -+ {0, 0x0996, 0x2012}, -+ {0, 0x0998, 0xC622}, -+ {0, 0x099a, 0x200E}, -+ {0, 0x099c, 0xC621}, -+ {0, 0x099e, 0x200A}, -+ {0, 0x098A, 0xD77}, -+ {0, 0x0990, 0xC620}, -+ {0, 0x0992, 0x2006}, -+ {0, 0x0994, 0xC62A}, -+ {0, 0x0996, 0x2002}, -+ {0, 0x0998, 0xC62B}, -+ {0, 0x099a, 0x30ED}, -+ {0, 0x099c, 0x8CC}, -+ {0, 0x099e, 0x3400}, -+ {0, 0x098A, 0xD87}, -+ {0, 0x0990, 0x30ED}, -+ {0, 0x0992, 0x34}, -+ {0, 0x0994, 0xBD6F}, -+ {0, 0x0996, 0xD184}, -+ {0, 0x0998, 0x330}, -+ {0, 0x099a, 0xED07}, -+ {0, 0x099c, 0xA60A}, -+ {0, 0x099e, 0x4848}, -+ {0, 0x098A, 0xD97}, -+ {0, 0x0990, 0x5FED}, -+ {0, 0x0992, 0x5EA}, -+ {0, 0x0994, 0x8AA}, -+ {0, 0x0996, 0x731}, -+ {0, 0x0998, 0xBD70}, -+ {0, 0x099a, 0x2130}, -+ {0, 0x099c, 0xC60A}, -+ {0, 0x099e, 0x3A35}, -+ {0, 0x098A, 0xDA7}, -+ {0, 0x0990, 0x3937}, -+ {0, 0x0992, 0x3C3C}, -+ {0, 0x0994, 0x3C34}, -+ {0, 0x0996, 0xDE2F}, -+ {0, 0x0998, 0xEE0E}, -+ {0, 0x099a, 0xAD00}, -+ {0, 0x099c, 0x7D13}, -+ {0, 0x099e, 0xEF27}, -+ {0, 0x098A, 0xDB7}, -+ {0, 0x0990, 0x7CCE}, -+ {0, 0x0992, 0x13E0}, -+ {0, 0x0994, 0x1E05}, -+ {0, 0x0996, 0x1060}, -+ {0, 0x0998, 0xE60E}, -+ {0, 0x099a, 0x4FC3}, -+ {0, 0x099c, 0x13F0}, -+ {0, 0x099e, 0x8FE6}, -+ {0, 0x098A, 0xDC7}, -+ {0, 0x0990, 0x30}, -+ {0, 0x0992, 0xE107}, -+ {0, 0x0994, 0x2216}, -+ {0, 0x0996, 0xF613}, -+ {0, 0x0998, 0xEE4F}, -+ {0, 0x099a, 0xC313}, -+ {0, 0x099c, 0xF38F}, -+ {0, 0x099e, 0xE600}, -+ {0, 0x098A, 0xDD7}, -+ {0, 0x0990, 0x30E1}, -+ {0, 0x0992, 0x725}, -+ {0, 0x0994, 0x7F6}, -+ {0, 0x0996, 0x13EE}, -+ {0, 0x0998, 0xC103}, -+ {0, 0x099a, 0x253C}, -+ {0, 0x099c, 0x7F13}, -+ {0, 0x099e, 0xEEF6}, -+ {0, 0x098A, 0xDE7}, -+ {0, 0x0990, 0x13EF}, -+ {0, 0x0992, 0xE706}, -+ {0, 0x0994, 0xCC13}, -+ {0, 0x0996, 0xF0ED}, -+ {0, 0x0998, 0x4CC}, -+ {0, 0x099a, 0x13F3}, -+ {0, 0x099c, 0x200F}, -+ {0, 0x099e, 0x7C13}, -+ {0, 0x098A, 0xDF7}, -+ {0, 0x0990, 0xEEEC}, -+ {0, 0x0992, 0x4C3}, -+ {0, 0x0994, 0x1}, -+ {0, 0x0996, 0xED04}, -+ {0, 0x0998, 0xEC02}, -+ {0, 0x099a, 0xC300}, -+ {0, 0x099c, 0x1ED}, -+ {0, 0x099e, 0x2F6}, -+ {0, 0x098A, 0xE07}, -+ {0, 0x0990, 0x13EE}, -+ {0, 0x0992, 0xE106}, -+ {0, 0x0994, 0x2412}, -+ {0, 0x0996, 0xEE04}, -+ {0, 0x0998, 0xE600}, -+ {0, 0x099a, 0x30E1}, -+ {0, 0x099c, 0x722}, -+ {0, 0x099e, 0xDFEE}, -+ {0, 0x098A, 0xE17}, -+ {0, 0x0990, 0x2E6}, -+ {0, 0x0992, 0x30}, -+ {0, 0x0994, 0xE107}, -+ {0, 0x0996, 0x25D6}, -+ {0, 0x0998, 0xDE49}, -+ {0, 0x099a, 0xEE08}, -+ {0, 0x099c, 0xAD00}, -+ {0, 0x099e, 0xCC13}, -+ {0, 0x098A, 0xE27}, -+ {0, 0x0990, 0xF630}, -+ {0, 0x0992, 0xED00}, -+ {0, 0x0994, 0xDE2F}, -+ {0, 0x0996, 0xEE10}, -+ {0, 0x0998, 0xCC13}, -+ {0, 0x099a, 0xFAAD}, -+ {0, 0x099c, 0x38}, -+ {0, 0x099e, 0x3838}, -+ {0, 0x098A, 0xE37}, -+ {0, 0x0990, 0x3839}, -+ {0, 0x098A, 0x1000}, -+ {0, 0x0990, 0xCC10}, -+ {0, 0x0992, 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-+ {0, 0x3568, 0x0008}, -+ {0, 0x356A, 0x0004}, -+ {0, 0x356C, 0x0004}, -+ {0, 0x356E, 0x0004}, -+ {0, 0x098E, 0x3C4D}, -+ {0, 0x0990, 0x0DAC}, -+ {0, 0x098E, 0x3C4F}, -+ {0, 0x0990, 0x148A}, -+ {0, 0x098E, 0xC911}, -+ {0, 0x0990, 0x00C8}, -+ {0, 0x098E, 0xC8F4}, -+ {0, 0x0990, 0x0004}, -+ {0, 0x098E, 0xC8F5}, -+ {0, 0x0990, 0x0002}, -+ {0, 0x098E, 0x48F6}, -+ {0, 0x0990, 0x3B4D}, -+ {0, 0x098E, 0x48F8}, -+ {0, 0x0990, 0x6380}, -+ {0, 0x098E, 0x48FA}, -+ {0, 0x0990, 0x9B18}, -+ {0, 0x098E, 0x48FC}, -+ {0, 0x0990, 0x5D51}, -+ {0, 0x098E, 0x48FE}, -+ {0, 0x0990, 0xEDE8}, -+ {0, 0x098E, 0x4900}, -+ {0, 0x0990, 0xE515}, -+ {0, 0x098E, 0x4902}, -+ {0, 0x0990, 0xBFF4}, -+ {0, 0x098E, 0x4904}, -+ {0, 0x0990, 0x001E}, -+ {0, 0x098E, 0x4906}, -+ {0, 0x0990, 0x0026}, -+ {0, 0x098E, 0x4908}, -+ {0, 0x0990, 0x0033}, -+ {0, 0x098E, 0xE84A}, -+ {0, 0x0990, 0x0083}, -+ {0, 0x098E, 0xE84D}, -+ {0, 0x0990, 0x0083}, -+ {0, 0x098E, 0xE84C}, -+ {0, 0x0990, 0x0080}, -+ {0, 0x098E, 0xE84F}, -+ {0, 0x0990, 0x0080}, -+ {0, 0x098E, 0x8400}, -+ {0, 0x0990, 0x0006}, -+ {0, 0x098E, 0x48B0}, -+ {0, 0x0990, 0x0180}, -+ {0, 0x098E, 0x48B2}, -+ {0, 0x0990, 0xFF7A}, -+ {0, 0x098E, 0x48B4}, -+ {0, 0x0990, 0x0018}, -+ {0, 0x098E, 0x48B6}, -+ {0, 0x0990, 0xFFCA}, -+ {0, 0x098E, 0x48B8}, -+ {0, 0x0990, 0x017C}, -+ {0, 0x098E, 0x48BA}, -+ {0, 0x0990, 0xFFCC}, -+ {0, 0x098E, 0x48BC}, -+ {0, 0x0990, 0x000C}, -+ {0, 0x098E, 0x48BE}, -+ {0, 0x0990, 0xFF1F}, -+ {0, 0x098E, 0x48C0}, -+ {0, 0x0990, 0x01E8}, -+ {0, 0x098E, 0x48C2}, -+ {0, 0x0990, 0x0020}, -+ {0, 0x098E, 0x48C4}, -+ {0, 0x0990, 0x0044}, -+ {0, 0x098E, 0x48C6}, -+ {0, 0x0990, 0x0079}, -+ {0, 0x098E, 0x48C8}, -+ {0, 0x0990, 0xFFAD}, -+ {0, 0x098E, 0x48CA}, -+ {0, 0x0990, 0xFFE2}, -+ {0, 0x098E, 0x48CC}, -+ {0, 0x0990, 0x0033}, -+ {0, 0x098E, 0x48CE}, -+ {0, 0x0990, 0x002A}, -+ {0, 0x098E, 0x48D0}, -+ {0, 0x0990, 0xFFAA}, -+ {0, 0x098E, 0x48D2}, -+ {0, 0x0990, 0x0017}, -+ {0, 0x098E, 0x48D4}, -+ {0, 0x0990, 0x004B}, -+ {0, 0x098E, 0x48D6}, -+ {0, 0x0990, 0xFFA5}, -+ {0, 0x098E, 0x48D8}, -+ {0, 0x0990, 0x0015}, -+ {0, 0x098E, 0x48DA}, -+ {0, 0x0990, 0xFFE2}, -+ {0, 0x35A2, 0x0014}, -+ {0, 0x098E, 0xC949}, -+ {0, 0x0990, 0x0024}, -+ {0, 0x35A4, 0x0596}, -+ {0, 0x098E, 0xC94A}, -+ {0, 0x0990, 0x0062}, -+ {0, 0x098E, 0xC948}, -+ {0, 0x0990, 0x0006}, -+ {0, 0x098E, 0xC914}, -+ {0, 0x0990, 0x0000}, -+ {0, 0x098E, 0xC915}, -+ {0, 0x0990, 0x00FF}, -+ {0, 0x098E, 0xE86F}, -+ {0, 0x0990, 0x0060}, -+ {0, 0x098E, 0xE870}, -+ {0, 0x0990, 0x003C}, -+ {0, 0x098E, 0xEC6F}, -+ {0, 0x0990, 0x0060}, -+ {0, 0x098E, 0xEC70}, -+ {0, 0x0990, 0x003C}, -+ {0, 0x098E, 0xE883}, -+ {0, 0x0990, 0x0000}, -+ {0, 0x098E, 0xEC83}, -+ {0, 0x0990, 0x0000}, -+ {0, 0x098E, 0x8400}, -+ {0, 0x0990, 0x0006}, -+ {0, 0x098E, 0xE885}, -+ {0, 0x0990, 0x001E}, -+ {0, 0x098E, 0xE886}, -+ {0, 0x0990, 0x00D8}, -+ {0, 0x098E, 0xEC85}, -+ {0, 0x0990, 0x001E}, -+ {0, 0x098E, 0xEC86}, -+ {0, 0x0990, 0x00D8}, -+ {0, 0x098E, 0xE884}, -+ {0, 0x0990, 0x005C}, -+ {0, 0x098E, 0xEC84}, -+ {0, 0x0990, 0x005C}, -+ {0, 0x098E, 0x490A}, -+ {0, 0x0990, 0x0666}, -+ {0, 0x098E, 0x490C}, -+ {0, 0x0990, 0x0140}, -+ {0, 0x098E, 0x6857}, -+ {0, 0x0990, 0x0014}, -+ {0, 0x098E, 0x685C}, -+ {0, 0x0990, 0x0005}, -+ {0, 0x098E, 0x490E}, -+ {0, 0x0990, 0x00A4}, -+ {0, 0x098E, 0xB43D}, -+ {0, 0x0990, 0x0031}, -+ {0, 0x098E, 0xB43E}, -+ {0, 0x0990, 0x001B}, -+ {0, 0x098E, 0xB43F}, -+ {0, 0x0990, 0x0028}, -+ {0, 0x098E, 0xB440}, -+ {0, 0x0990, 0x0003}, -+ {0, 0x098E, 0xB441}, -+ {0, 0x0990, 0x00CD}, -+ {0, 0x098E, 0xB442}, -+ {0, 0x0990, 0x0064}, -+ {0, 0x098E, 0xB443}, -+ {0, 0x0990, 0x000F}, -+ {0, 0x098E, 0xB444}, -+ {0, 0x0990, 0x0007}, -+ {0, 0x098E, 0x300D}, -+ {0, 0x0990, 0x000F}, -+ {0, 0x098E, 0x3017}, -+ {0, 0x0990, 0x0F0F}, -+ {0, 0x098E, 0x8400}, -+ {0, 0x0990, 0x0006}, -+ {0, 0x098E, 0xE81F}, -+ {0, 0x0990, 0x0020}, -+ {0, 0x098E, 0x68A0}, -+ {0, 0x0990, 0x082E}, -+ {0, 0x098E, 0x6CA0}, -+ {0, 0x0990, 0x082E}, -+ {0, 0x098E, 0x70A0}, -+ {0, 0x0990, 0x082E}, -+ {0, 0x098E, 0x74A0}, -+ {0, 0x0990, 0x082E}, -+ {0, 0x3C52, 0x082E}, -+ {0, 0x098E, 0x488E}, -+ {0, 0x0990, 0x0020}, -+ {0, 0x098E, 0xECAC}, -+ {0, 0x0990, 0x0000} -+}; -+ -+mt9t111_regs def_regs2[] = { -+ {100, 0x0018, 0x0028}, -+ {0, 0x316C, 0x350F}, -+ {0, 0x098E, 0x6817}, -+ {0, 0x0990, 0x000C}, -+ {0, 0x0034, 0x0000} -+}; -+ -+mt9t111_regs pll_regs1[] = { -+ {0, 0x0014, 0x2425}, -+ {0, 0x0014, 0x2425}, -+ {0, 0x0014, 0x2145}, -+ {0, 0x0010, 0x0219}, -+ {0, 0x0012, 0x0090}, -+ {0, 0x002A, 0x79DD}, -+ {0, 0x0014, 0x2545}, -+ {0, 0x0014, 0x2547}, -+ {0, 0x0014, 0x3447}, -+ {0, 0x0014, 0x3047} -+}; -+ -+mt9t111_regs pll_regs2[] = { -+ {0, 0x0014, 0x3046}, -+ {0, 0x0022, 0x01E0}, -+ {0, 0x001E, 0x0707}, -+ {0, 0x3B84, 0x011D} -+}; -+ -+mt9t111_regs bayer_pattern_regs[] = { -+ {0, 0x098E, 0x6807}, -+ {0, 0x0990, 0x0100}, -+ {0, 0x098E, 0x6809}, -+ {0, 0x0990, 0x0000}, -+ {0, 0x098E, 0xE88E}, -+ {0, 0x0990, 0x0000}, -+ {0, 0x098E, 0x6C07}, -+ {0, 0x0990, 0x0100}, -+ {0, 0x098E, 0x6C09}, -+ {0, 0x0990, 0x0000}, -+ {0, 0x098E, 0xEC8E}, -+ {0, 0x0990, 0x0000} -+}; -+ -+#endif -diff --git a/include/media/mt9t111.h b/include/media/mt9t111.h -new file mode 100644 -index 0000000..7acbeed ---- /dev/null -+++ b/include/media/mt9t111.h -@@ -0,0 +1,79 @@ -+/* -+ * include/media/mt9t111.h -+ * -+ * mt9t111 sensor driver -+ * -+ * Copyright (C) 2009 Leopard Imaging -+ * -+ * This file is licensed under the terms of the GNU General Public License -+ * version 2. This program is licensed "as is" without any warranty of any -+ * kind, whether express or implied. -+ */ -+ -+#ifndef MT9T111_H -+#define MT9T111_H -+ -+/********************************* -+ * Defines and Macros and globals -+ ********************************/ -+ -+#ifdef TRUE -+#undef TRUE -+#endif -+ -+#ifdef FALSE -+#undef FALSE -+#endif -+ -+#define TRUE 1 -+#define FALSE 0 -+ -+#ifdef DEBUG -+#undef DEBUG -+#endif -+ -+#ifndef TYPES -+#define TYPES -+#endif -+ -+#define MT9T111_I2C_REGISTERED (1) -+#define MT9T111_I2C_UNREGISTERED (0) -+ -+/*i2c adress for MT9T111*/ -+#define MT9T111_I2C_ADDR (0x78 >>1) -+ -+#define MT9T111_CLK_MAX (75000000) /* 75MHz */ -+#define MT9T111_CLK_MIN (6000000) /* 6Mhz */ -+ -+#define MT9T111_I2C_CONFIG (1) -+#define I2C_ONE_BYTE_TRANSFER (1) -+#define I2C_TWO_BYTE_TRANSFER (2) -+#define I2C_THREE_BYTE_TRANSFER (3) -+#define I2C_FOUR_BYTE_TRANSFER (4) -+#define I2C_TXRX_DATA_MASK (0x00FF) -+#define I2C_TXRX_DATA_MASK_UPPER (0xFF00) -+#define I2C_TXRX_DATA_SHIFT (8) -+ -+struct mt9t111_platform_data { -+ char *master; -+ int (*power_set) (enum v4l2_power on); -+ int (*ifparm) (struct v4l2_ifparm *p); -+ int (*priv_data_set) (void *); -+ /* Interface control params */ -+ bool clk_polarity; -+ bool hs_polarity; -+ bool vs_polarity; -+}; -+ -+/** -+ * struct capture_size - image capture size information -+ * @width: image width in pixels -+ * @height: image height in pixels -+ */ -+struct capture_size { -+ unsigned long width; -+ unsigned long height; -+}; -+ -+#endif /*for ifndef MT9T111 */ -+ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0002-mt9t111-Fix-all-checkpatch-errors.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0002-mt9t111-Fix-all-checkpatch-errors.patch deleted file mode 100644 index 4fa44f0..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0002-mt9t111-Fix-all-checkpatch-errors.patch +++ /dev/null @@ -1,398 +0,0 @@ -From 5609c8fe642a0517bd151ad477fcd05d0abc7dc4 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 11 Jun 2010 13:51:49 -0500 -Subject: [PATCH 02/75] mt9t111: Fix all checkpatch errors - -The code was plagued with checkpatch errors. Fix them! - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t111.c | 153 ++++++++++++++++++++----------------- - drivers/media/video/mt9t111_reg.h | 6 +- - include/media/mt9t111.h | 2 +- - 3 files changed, 87 insertions(+), 74 deletions(-) - -diff --git a/drivers/media/video/mt9t111.c b/drivers/media/video/mt9t111.c -index ecc5115..95e1508 100644 ---- a/drivers/media/video/mt9t111.c -+++ b/drivers/media/video/mt9t111.c -@@ -17,20 +17,21 @@ - #include <media/mt9t111.h> - #include "mt9t111_reg.h" - --#define USE_RAW // YCbCr mode does not work yet --//#define COLOR_BAR // Create a Color bar test pattern, Blue, Green, Red, Grey -+/* YCbCr mode does not work yet */ -+#define USE_RAW -+/* Create a Color bar test pattern, Blue, Green, Red, Grey */ -+/* #define COLOR_BAR */ - - #define SENSOR_DETECTED 1 - #define SENSOR_NOT_DETECTED 0 - - static void mt9t111_loaddefault(struct i2c_client *client); - --/* --* as a place holder for further development --*/ -+/* -+ * as a place holder for further development -+ */ - static void debug_dummy(char *in_msg) - { -- - } - - /* list of image formats supported by mt9t111 sensor */ -@@ -55,8 +56,8 @@ const static struct v4l2_fmtdesc mt9t111_formats[] = { - * smallest image size to largest. - */ - const static struct capture_size mt9t111_sizes[] = { -- { 640, 480 }, --// { 2048, 1536} -+ { 640, 480 }, -+ /* { 2048, 1536} */ - }; - - #define NUM_CAPTURE_SIZE ARRAY_SIZE(mt9t111_sizes) -@@ -120,17 +121,17 @@ mt9t111_read_reg(struct i2c_client *client, u16 reg, u16 *val) - msg->addr = client->addr; - msg->flags = 0; - msg->len = 2; -- msg->buf = data; -+ msg->buf = data; - data[0] = (reg & 0xff00) >> 8; - data[1] = (reg & 0x00ff); - err = i2c_transfer(client->adapter, msg, 1); -- if (err >= 0) { -- msg->flags = I2C_M_RD; -- msg->len = 2; /* 2 byte read */ -- err = i2c_transfer(client->adapter, msg, 1); -- if (err >= 0) { -- *val = ((data[0] & 0x00ff) << 8) -- | (data[1] & 0x00ff); -+ if (err >= 0) { -+ msg->flags = I2C_M_RD; -+ msg->len = 2; /* 2 byte read */ -+ err = i2c_transfer(client->adapter, msg, 1); -+ if (err >= 0) { -+ *val = ((data[0] & 0x00ff) << 8) -+ | (data[1] & 0x00ff); - return 0; - } - } -@@ -159,7 +160,7 @@ mt9t111_write_reg(struct i2c_client *client, u16 reg, u16 val) - msg->len = 4; - msg->buf = data; - data[0] = (u8)((reg & 0xff00) >> 8); -- data[1] = (u8)(reg & 0x00ff); -+ data[1] = (u8)(reg & 0x00ff); - data[2] = (u8)((val & 0xff00) >> 8); - data[3] = (u8)(val & 0x00ff); - err = i2c_transfer(client->adapter, msg, 1); -@@ -171,7 +172,7 @@ mt9t111_write_reg(struct i2c_client *client, u16 reg, u16 val) - * mt9t111_write_regs - Write registers to an mt9t111 sensor device - * @client: i2c driver client structure - * @reg_in: pointer to registers to write -- * @cnt: the number of registers -+ * @cnt: the number of registers - * - * Write registers . - * Returns zero if successful, or non-zero otherwise. -@@ -182,19 +183,21 @@ mt9t111_write_regs(struct i2c_client *client, mt9t111_regs *reg_in, int cnt) - int err = 0; - int i; - mt9t111_regs *reg = reg_in; -- -- for (i=0;i<cnt;i++) { -+ -+ for (i = 0; i < cnt; i++) { - if (reg->delay_time == 0) { - err |= mt9t111_write_reg(client, reg->addr, reg->data); - } else if (reg->addr != 0 || reg->data != 0) { - err |= mt9t111_write_reg(client, reg->addr, reg->data); - mdelay(reg->delay_time); -- } else -+ } else { - mdelay(reg->delay_time); -- -+ } -+ - if (err < 0) { -- dev_warn(&client->dev, "write reg error, addr = 0x%x, data = 0x%x \n", \ -- reg->addr, reg->data); -+ dev_warn(&client->dev, "write reg error, addr = 0x%x," -+ " data = 0x%x \n", -+ reg->addr, reg->data); - return err; - } - reg++; -@@ -219,10 +222,11 @@ mt9t111_detect(struct i2c_client *client) - if (mt9t111_read_reg(client, MT9T111_CHIP_ID, &val) < 0) - return -ENODEV; - dev_info(&client->dev, "model id detected 0x%x\n", val); -- -+ - if (val != MT9T111_CHIP_ID_VALUE) { -- dev_warn(&client->dev, "model id mismatch received 0x%x expecting 0x%x\n", -- val, MT9T111_CHIP_ID_VALUE); -+ dev_warn(&client->dev, "model id mismatch received 0x%x" -+ " expecting 0x%x\n", -+ val, MT9T111_CHIP_ID_VALUE); - - return -ENODEV; - } -@@ -285,14 +289,17 @@ static int ioctl_enum_frameintervals(struct v4l2_int_device *s, - { - int ifmt; - --printk(KERN_INFO "entering ioctl_enum_frameintervals\n"); --printk(KERN_INFO "index = %d, pixel_format = 0x%x, width = %d, height = %d\n", -- frmi->index, frmi->pixel_format, frmi->width, frmi->height); --printk(KERN_INFO "mt9t111 format = 0x%x\n", mt9t111_formats[0].pixelformat); -+ printk(KERN_INFO "entering ioctl_enum_frameintervals\n"); -+ printk(KERN_INFO "index = %d, pixel_format = 0x%x," -+ " width = %d, height = %d\n", -+ frmi->index, frmi->pixel_format, -+ frmi->width, frmi->height); -+ printk(KERN_INFO "mt9t111 format = 0x%x\n", -+ mt9t111_formats[0].pixelformat); - - if (frmi->index >= NUM_CAPTURE_FRAMEINTERVALS) - return -EINVAL; -- -+ - for (ifmt = 0; ifmt < NUM_CAPTURE_FORMATS; ifmt++) { - if (frmi->pixel_format == mt9t111_formats[ifmt].pixelformat) - break; -@@ -368,7 +375,7 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - if (rval < 0) { - dev_err(&c->dev, "Unable to set the power state: " "mt9t111" - " sensor\n"); -- //sensor->pdata->set_xclk(0); -+ /* sensor->pdata->set_xclk(0); */ - return rval; - } - -@@ -418,7 +425,7 @@ static int ioctl_g_priv(struct v4l2_int_device *s, void *p) - static int ioctl_s_parm(struct v4l2_int_device *s, - struct v4l2_streamparm *a) - { -- //TODO: set paramters -+ /* TODO: set paramters */ - debug_dummy("debug_dummy -- VIDIOC_S_PARM "); - return 0; - } -@@ -483,13 +490,13 @@ static int ioctl_try_fmt_cap(struct v4l2_int_device *s, - - pix->width = 640; - pix->height = 480; --#ifdef USE_RAW -+#ifdef USE_RAW - pix->pixelformat = V4L2_PIX_FMT_SGRBG10; -- pix->bytesperline = pix->width; -+ pix->bytesperline = pix->width; - pix->colorspace = V4L2_COLORSPACE_SRGB; - #else - pix->pixelformat = V4L2_PIX_FMT_YUYV; -- pix->bytesperline = pix->width * 2; -+ pix->bytesperline = pix->width * 2; - pix->colorspace = V4L2_COLORSPACE_JPEG; - #endif - pix->field = V4L2_FIELD_NONE; -@@ -585,7 +592,7 @@ static int ioctl_s_ctrl(struct v4l2_int_device *s, - static int ioctl_g_ctrl(struct v4l2_int_device *s, - struct v4l2_control *vc) - { -- debug_dummy("debug_dummy -- g ctrl\n"); -+ debug_dummy("debug_dummy -- g ctrl\n"); - return 0; - } - -@@ -601,8 +608,8 @@ static int ioctl_g_ctrl(struct v4l2_int_device *s, - static int ioctl_queryctrl(struct v4l2_int_device *s, - struct v4l2_queryctrl *qc) - { -- debug_dummy("debug_dummy -- query ctrl\n"); -- return-EINVAL; -+ debug_dummy("debug_dummy -- query ctrl\n"); -+ return -EINVAL; - } - - /** -@@ -647,12 +654,11 @@ static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) - return rval; - } - -- p->u.ycbcr.clock_curr = 40*1000000; // temporal value -+ p->u.ycbcr.clock_curr = 40 * 1000000; /* temporal value */ - - return 0; - } - -- - static struct v4l2_int_ioctl_desc mt9t111_ioctl_desc[] = { - { .num = vidioc_int_enum_framesizes_num, - .func = (v4l2_int_ioctl_func *)ioctl_enum_framesizes }, -@@ -666,8 +672,8 @@ static struct v4l2_int_ioctl_desc mt9t111_ioctl_desc[] = { - .func = (v4l2_int_ioctl_func *)ioctl_s_power }, - { .num = vidioc_int_g_priv_num, - .func = (v4l2_int_ioctl_func *)ioctl_g_priv }, -- {vidioc_int_g_ifparm_num, -- .func = (v4l2_int_ioctl_func*) ioctl_g_ifparm}, -+ { .num = vidioc_int_g_ifparm_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_g_ifparm }, - { .num = vidioc_int_init_num, - .func = (v4l2_int_ioctl_func *)ioctl_init }, - { .num = vidioc_int_enum_fmt_cap_num, -@@ -688,29 +694,30 @@ static struct v4l2_int_ioctl_desc mt9t111_ioctl_desc[] = { - .func = (v4l2_int_ioctl_func *)ioctl_g_ctrl }, - { .num = vidioc_int_s_ctrl_num, - .func = (v4l2_int_ioctl_func *)ioctl_s_ctrl }, -- {.num = vidioc_int_s_video_routing_num, -- .func = (v4l2_int_ioctl_func *) ioctl_s_routing}, -+ { .num = vidioc_int_s_video_routing_num, -+ .func = (v4l2_int_ioctl_func *)ioctl_s_routing }, - }; - --static void mt9t111_refresh(struct i2c_client *client){ -- int i; -- unsigned short value; -- // MCU_ADDRESS [SEQ_CMD] -- refresh -- mt9t111_write_reg(client, 0x098E, 0x8400); -- mt9t111_write_reg(client, 0x0990, 0x0006); -- for (i=0;i<100;i++){ -- mt9t111_write_reg(client, 0x098E, 0x8400); -- mt9t111_read_reg(client,0x0990,&value); -- if ( value == 0) -- break; -- mdelay(5); -+static void mt9t111_refresh(struct i2c_client *client) -+{ -+ int i; -+ unsigned short value; -+ /* MCU_ADDRESS [SEQ_CMD] -- refresh */ -+ mt9t111_write_reg(client, 0x098E, 0x8400); -+ mt9t111_write_reg(client, 0x0990, 0x0006); -+ for (i = 0; i < 100; i++) { -+ mt9t111_write_reg(client, 0x098E, 0x8400); -+ mt9t111_read_reg(client, 0x0990, &value); -+ if (value == 0) -+ break; -+ mdelay(5); - } - } - - #ifdef COLOR_BAR - static void mt9t111_color_bar(struct i2c_client *client) - { -- mt9t111_write_reg(client, 0x3210, 0x01B0); // disable lens correction -+ mt9t111_write_reg(client, 0x3210, 0x01B0); /* disable lens correction */ - - mt9t111_write_reg(client, 0x098E, 0x6003); - mt9t111_write_reg(client, 0x0990, 0x0100); -@@ -721,22 +728,25 @@ static void mt9t111_color_bar(struct i2c_client *client) - - static void mt9t111_bayer_format(struct i2c_client *client) - { -- mt9t111_write_regs(client, bayer_pattern_regs, sizeof(bayer_pattern_regs)/sizeof(mt9t111_regs)); -+ mt9t111_write_regs(client, bayer_pattern_regs, -+ sizeof(bayer_pattern_regs) / sizeof(mt9t111_regs)); - } - - static void mt9t111_enable_pll(struct i2c_client *client) - { - int i; -- unsigned short value; -+ unsigned short value; - -- mt9t111_write_regs(client, pll_regs1, sizeof(pll_regs1)/sizeof(mt9t111_regs)); -- for (i=0;i<100;i++){ -- mt9t111_read_reg(client,0x0014,&value); -- if (( value & 0x8000) != 0) -+ mt9t111_write_regs(client, pll_regs1, -+ sizeof(pll_regs1) / sizeof(mt9t111_regs)); -+ for (i = 0; i < 100; i++) { -+ mt9t111_read_reg(client, 0x0014, &value); -+ if ((value & 0x8000) != 0) - break; - mdelay(2); - } -- mt9t111_write_regs(client, pll_regs2, sizeof(pll_regs2)/sizeof(mt9t111_regs)); -+ mt9t111_write_regs(client, pll_regs2, -+ sizeof(pll_regs2) / sizeof(mt9t111_regs)); - } - - -@@ -746,9 +756,12 @@ static void mt9t111_loaddefault(struct i2c_client *client) - mt9t111_write_reg(client, 0x001A, 0x0218); - - mt9t111_enable_pll(client); -- mt9t111_write_regs(client, def_regs1, sizeof(def_regs1)/sizeof(mt9t111_regs)); -- mt9t111_write_regs(client, patch_rev6, sizeof(patch_rev6)/sizeof(mt9t111_regs)); -- mt9t111_write_regs(client, def_regs2, sizeof(def_regs2)/sizeof(mt9t111_regs)); -+ mt9t111_write_regs(client, def_regs1, -+ sizeof(def_regs1) / sizeof(mt9t111_regs)); -+ mt9t111_write_regs(client, patch_rev6, -+ sizeof(patch_rev6) / sizeof(mt9t111_regs)); -+ mt9t111_write_regs(client, def_regs2, -+ sizeof(def_regs2) / sizeof(mt9t111_regs)); - - #ifdef USE_RAW - mt9t111_bayer_format(client); -@@ -806,7 +819,7 @@ mt9t111_probe(struct i2c_client *client, const struct i2c_device_id *id) - - sensor->pix.width = 640; - sensor->pix.height = 480; --#ifdef USE_RAW -+#ifdef USE_RAW - sensor->pix.pixelformat = V4L2_PIX_FMT_SGRBG10; - #else - sensor->pix.pixelformat = V4L2_PIX_FMT_YUYV; -diff --git a/drivers/media/video/mt9t111_reg.h b/drivers/media/video/mt9t111_reg.h -index e012eeb..e226c37 100644 ---- a/drivers/media/video/mt9t111_reg.h -+++ b/drivers/media/video/mt9t111_reg.h -@@ -25,7 +25,7 @@ typedef struct { - u16 data; - } mt9t111_regs; - --mt9t111_regs patch_rev6[] ={ -+mt9t111_regs patch_rev6[] = { - {0, 0x0982, 0x0}, - {0, 0x098A, 0xCE7}, - {0, 0x0990, 0x3C3C}, -@@ -658,7 +658,7 @@ mt9t111_regs patch_rev6[] ={ - {100, 0x0990, 0x0004} - }; - --mt9t111_regs def_regs1[] ={ -+mt9t111_regs def_regs1[] = { - {0, 0x001A, 0x0218}, - {0, 0x001E, 0x0777}, - {0, 0x3084, 0x2409}, -@@ -1343,7 +1343,7 @@ mt9t111_regs pll_regs2[] = { - {0, 0x0014, 0x3046}, - {0, 0x0022, 0x01E0}, - {0, 0x001E, 0x0707}, -- {0, 0x3B84, 0x011D} -+ {0, 0x3B84, 0x011D} - }; - - mt9t111_regs bayer_pattern_regs[] = { -diff --git a/include/media/mt9t111.h b/include/media/mt9t111.h -index 7acbeed..0a5161a 100644 ---- a/include/media/mt9t111.h -+++ b/include/media/mt9t111.h -@@ -40,7 +40,7 @@ - #define MT9T111_I2C_UNREGISTERED (0) - - /*i2c adress for MT9T111*/ --#define MT9T111_I2C_ADDR (0x78 >>1) -+#define MT9T111_I2C_ADDR (0x78 >> 1) - - #define MT9T111_CLK_MAX (75000000) /* 75MHz */ - #define MT9T111_CLK_MIN (6000000) /* 6Mhz */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0003-mt9t111-Pass-v4l2_int_device-data.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0003-mt9t111-Pass-v4l2_int_device-data.patch deleted file mode 100644 index 0c6b90a..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0003-mt9t111-Pass-v4l2_int_device-data.patch +++ /dev/null @@ -1,40 +0,0 @@ -From bb40914cf9e313d70385e647f956a55df15e717f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 11 Jun 2010 16:17:56 -0500 -Subject: [PATCH 03/75] mt9t111: Pass v4l2_int_device data - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t111.c | 2 +- - include/media/mt9t111.h | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/media/video/mt9t111.c b/drivers/media/video/mt9t111.c -index 95e1508..6a7b2c0 100644 ---- a/drivers/media/video/mt9t111.c -+++ b/drivers/media/video/mt9t111.c -@@ -371,7 +371,7 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - else - debug_dummy("debug_dummy -- enable clock\n");; - -- rval = sensor->pdata->power_set(on); -+ rval = sensor->pdata->power_set(s, on); - if (rval < 0) { - dev_err(&c->dev, "Unable to set the power state: " "mt9t111" - " sensor\n"); -diff --git a/include/media/mt9t111.h b/include/media/mt9t111.h -index 0a5161a..aae3f99 100644 ---- a/include/media/mt9t111.h -+++ b/include/media/mt9t111.h -@@ -56,7 +56,7 @@ - - struct mt9t111_platform_data { - char *master; -- int (*power_set) (enum v4l2_power on); -+ int (*power_set) (struct v4l2_int_device *s, enum v4l2_power on); - int (*ifparm) (struct v4l2_ifparm *p); - int (*priv_data_set) (void *); - /* Interface control params */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0004-omap3beagle-Add-camera-support.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0004-omap3beagle-Add-camera-support.patch deleted file mode 100644 index 511bd93..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0004-omap3beagle-Add-camera-support.patch +++ /dev/null @@ -1,352 +0,0 @@ -From 8b7b00860ac8c558c7156ff676655942027f7f53 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 11 Jun 2010 16:15:58 -0500 -Subject: [PATCH 04/75] omap3beagle: Add camera support - -This is tested with the xM + Leopard imaging module camera, which -has a MT9T111. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/Makefile | 3 +- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 228 ++++++++++++++++++++++++ - arch/arm/mach-omap2/board-omap3beagle-camera.h | 41 +++++ - arch/arm/mach-omap2/board-omap3beagle.c | 25 +++ - 4 files changed, 296 insertions(+), 1 deletions(-) - create mode 100644 arch/arm/mach-omap2/board-omap3beagle-camera.c - create mode 100644 arch/arm/mach-omap2/board-omap3beagle-camera.h - -diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile -index 9042317..a49d436 100644 ---- a/arch/arm/mach-omap2/Makefile -+++ b/arch/arm/mach-omap2/Makefile -@@ -87,7 +87,8 @@ obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o \ - mmc-twl4030.o - obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o - obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o \ -- mmc-twl4030.o -+ mmc-twl4030.o \ -+ board-omap3beagle-camera.o - obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o \ - mmc-twl4030.o \ - board-ldp-camera.o -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -new file mode 100644 -index 0000000..e93437f ---- /dev/null -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -0,0 +1,228 @@ -+/* -+ * Driver for Leopard Module Board used in Beagleboard (xM) -+ * -+ * Copyright (C) 2010 Texas Instruments Inc -+ * Author: Sergio Aguirre <saaguirre@ti.com> -+ * -+ * Based on work done by: -+ * Vaibhav Hiremath <hvaibhav@ti.com> -+ * Anuj Aggarwal <anuj.aggarwal@ti.com> -+ * Sivaraj R <sivaraj@ti.com> -+ * -+ * This package is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include <linux/init.h> -+#include <linux/i2c.h> -+#include <linux/gpio.h> -+#include <linux/mm.h> -+#include <linux/videodev2.h> -+#include <linux/i2c/twl.h> -+#include <linux/delay.h> -+ -+#include <plat/mux.h> -+#include <plat/board.h> -+ -+#include <media/v4l2-int-device.h> -+#include <media/mt9t111.h> -+ -+/* Include V4L2 ISP-Camera driver related header file */ -+#include <../drivers/media/video/omap34xxcam.h> -+#include <../drivers/media/video/isp/ispreg.h> -+ -+#include "mux.h" -+#include "board-omap3beagle-camera.h" -+ -+#define MODULE_NAME "omap3beaglelmb" -+ -+#define MT9T111_I2C_BUSNUM (2) -+ -+#define CAM_USE_XCLKA 1 -+ -+#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+static struct isp_interface_config mt9t111_if_config = { -+ .ccdc_par_ser = ISP_PARLL, -+ .dataline_shift = 0x0, -+ .hsvs_syncdetect = ISPCTRL_SYNC_DETECT_VSRISE, -+ .strobe = 0x0, -+ .prestrobe = 0x0, -+ .shutter = 0x0, -+ .u.par.par_bridge = 0x1, -+ .u.par.par_clk_pol = 0x0, -+}; -+ -+static struct v4l2_ifparm mt9t111_ifparm_s = { -+#if 1 -+ .if_type = V4L2_IF_TYPE_RAW, -+ .u = { -+ .raw = { -+ .frame_start_on_rising_vs = 1, -+ .bt_sync_correct = 0, -+ .swap = 0, -+ .latch_clk_inv = 0, -+ .nobt_hs_inv = 0, /* active high */ -+ .nobt_vs_inv = 0, /* active high */ -+ .clock_min = MT9T111_CLK_MIN, -+ .clock_max = MT9T111_CLK_MAX, -+ }, -+ }, -+#else -+ .if_type = V4L2_IF_TYPE_YCbCr, -+ .u = { -+ .ycbcr = { -+ .frame_start_on_rising_vs = 1, -+ .bt_sync_correct = 0, -+ .swap = 0, -+ .latch_clk_inv = 0, -+ .nobt_hs_inv = 0, /* active high */ -+ .nobt_vs_inv = 0, /* active high */ -+ .clock_min = MT9T111_CLK_MIN, -+ .clock_max = MT9T111_CLK_MAX, -+ }, -+ }, -+#endif -+}; -+ -+/** -+ * @brief mt9t111_ifparm - Returns the mt9t111 interface parameters -+ * -+ * @param p - pointer to v4l2_ifparm structure -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9t111_ifparm(struct v4l2_ifparm *p) -+{ -+ if (p == NULL) -+ return -EINVAL; -+ -+ *p = mt9t111_ifparm_s; -+ return 0; -+} -+ -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+static struct omap34xxcam_hw_config mt9t111_hwc = { -+ .dev_index = 0, -+ .dev_minor = 0, -+ .dev_type = OMAP34XXCAM_SLAVE_SENSOR, -+ .u.sensor.sensor_isp = 1, -+}; -+#endif -+ -+/** -+ * @brief mt9t111_set_prv_data - Returns mt9t111 omap34xx driver private data -+ * -+ * @param priv - pointer to omap34xxcam_hw_config structure -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9t111_set_prv_data(void *priv) -+{ -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+ struct omap34xxcam_hw_config *hwc = priv; -+ -+ if (priv == NULL) -+ return -EINVAL; -+ -+ hwc->u.sensor = mt9t111_hwc.u.sensor; -+ hwc->dev_index = mt9t111_hwc.dev_index; -+ hwc->dev_minor = mt9t111_hwc.dev_minor; -+ hwc->dev_type = mt9t111_hwc.dev_type; -+ return 0; -+#else -+ return -EINVAL; -+#endif -+} -+ -+/** -+ * @brief mt9t111_power_set - Power-on or power-off TVP5146 device -+ * -+ * @param power - enum, Power on/off, resume/standby -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) -+{ -+ struct omap34xxcam_videodev *vdev = s->u.slave->master->priv; -+ -+ switch (power) { -+ case V4L2_POWER_OFF: -+ isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); -+ break; -+ -+ case V4L2_POWER_STANDBY: -+ break; -+ -+ case V4L2_POWER_ON: -+ isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA); -+ -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+ isp_configure_interface(vdev->cam->isp, &mt9t111_if_config); -+#endif -+ break; -+ -+ default: -+ return -ENODEV; -+ break; -+ } -+ return 0; -+} -+ -+static struct mt9t111_platform_data mt9t111_pdata = { -+ .master = "omap34xxcam", -+ .power_set = mt9t111_power_set, -+ .priv_data_set = mt9t111_set_prv_data, -+ .ifparm = mt9t111_ifparm, -+ /* Some interface dependent params */ -+ .clk_polarity = 0, /* data clocked out on falling edge */ -+ .hs_polarity = 1, /* 0 - Active low, 1- Active high */ -+ .vs_polarity = 1, /* 0 - Active low, 1- Active high */ -+}; -+ -+static struct i2c_board_info __initdata mt9t111_i2c_board_info = { -+ I2C_BOARD_INFO("mt9t111", MT9T111_I2C_ADDR), -+ .platform_data = &mt9t111_pdata, -+}; -+ -+#endif /* #ifdef CONFIG_VIDEO_MT9T111 */ -+ -+/** -+ * @brief omap3beaglelmb_init - module init function. Should be called before any -+ * client driver init call -+ * -+ * @return result of operation - 0 is success -+ */ -+int __init omap3beaglelmb_init(void) -+{ -+ int err; -+ -+ /* -+ * Register the I2C devices present in the board to the I2C -+ * framework. -+ * If more I2C devices are added, then each device information should -+ * be registered with I2C using i2c_register_board_info(). -+ */ -+#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+ err = i2c_register_board_info(MT9T111_I2C_BUSNUM, -+ &mt9t111_i2c_board_info, 1); -+ if (err) { -+ printk(KERN_ERR MODULE_NAME \ -+ ": MT9T111 I2C Board Registration failed \n"); -+ return err; -+ } -+#endif -+ printk(KERN_INFO MODULE_NAME ": Driver registration complete \n"); -+ -+ return 0; -+} -+arch_initcall(omap3beaglelmb_init); -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.h b/arch/arm/mach-omap2/board-omap3beagle-camera.h -new file mode 100644 -index 0000000..1026aeb ---- /dev/null -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.h -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (C) 2010 Texas Instruments Inc -+ * Author: Sergio Aguirre <saaguirre@ti.com> -+ * -+ * Based on work done by: -+ * Vaibhav Hiremath <hvaibhav@ti.com> -+ * Anuj Aggarwal <anuj.aggarwal@ti.com> -+ * Sivaraj R <sivaraj@ti.com> -+ * -+ * This package is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#ifndef __BOARD_OMAP3BEAGLE_LMB_H_ -+#define __BOARD_OMAP3BEAGLE_LMB_H_ -+ -+/* mux id to enable/disable signal routing to different peripherals */ -+enum omap3beaglelmb_mux { -+ MUX_TVP5146 = 0, -+ MUX_CAMERA_SENSOR, -+ MUX_EXP_CAMERA_SENSOR, -+ NUM_MUX -+}; -+ -+/* enum to enable or disable mux */ -+enum config_mux { -+ DISABLE_MUX, -+ ENABLE_MUX -+}; -+ -+#endif /* __BOARD_OMAP3BEAGLE_LMB_H_ */ -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index b313350..d6b69a6 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -712,6 +712,31 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { - - #ifdef CONFIG_OMAP_MUX - static struct omap_board_mux board_mux[] __initdata = { -+ /* Camera - Parallel Data */ -+ OMAP3_MUX(CAM_D0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D8, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D9, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D10, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_D11, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ -+ /* Camera - HS/VS signals */ -+ OMAP3_MUX(CAM_HS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ OMAP3_MUX(CAM_VS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), -+ -+ /* Camera - Reset GPIO 98 */ -+ OMAP3_MUX(CAM_FLD, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), -+ -+ /* Camera - XCLK */ -+ OMAP3_MUX(CAM_XCLKA, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), -+ - { .reg_offset = OMAP_MUX_TERMINATOR }, - }; - #else --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0005-TEMP-omap3beagle-camera-Add-defconfig.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0005-TEMP-omap3beagle-camera-Add-defconfig.patch deleted file mode 100644 index b14321b..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0005-TEMP-omap3beagle-camera-Add-defconfig.patch +++ /dev/null @@ -1,3070 +0,0 @@ -From 754e3fe541b0784ed84282b95268fbb9c68d65c5 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 11 Jun 2010 16:18:30 -0500 -Subject: [PATCH 05/75] TEMP: omap3beagle: camera: Add defconfig - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/configs/omap3_beagle_cam_defconfig | 3050 +++++++++++++++++++++++++++ - 1 files changed, 3050 insertions(+), 0 deletions(-) - create mode 100644 arch/arm/configs/omap3_beagle_cam_defconfig - -diff --git a/arch/arm/configs/omap3_beagle_cam_defconfig b/arch/arm/configs/omap3_beagle_cam_defconfig -new file mode 100644 -index 0000000..0ea8300 ---- /dev/null -+++ b/arch/arm/configs/omap3_beagle_cam_defconfig -@@ -0,0 +1,3050 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.32 -+# Fri Jun 11 14:25:23 2010 -+# -+CONFIG_ARM=y -+CONFIG_SYS_SUPPORTS_APM_EMULATION=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_TIME=y -+CONFIG_GENERIC_CLOCKEVENTS=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_HAVE_LATENCYTOP_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_ARCH_HAS_CPUFREQ=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -+CONFIG_OPROFILE_ARMV7=y -+CONFIG_VECTORS_BASE=0xffff0000 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+CONFIG_CONSTRUCTORS=y -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_LOCK_KERNEL=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_SWAP=y -+CONFIG_SYSVIPC=y -+CONFIG_SYSVIPC_SYSCTL=y -+# CONFIG_POSIX_MQUEUE is not set -+CONFIG_BSD_PROCESS_ACCT=y -+# CONFIG_BSD_PROCESS_ACCT_V3 is not set -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+# CONFIG_AUDIT is not set -+ -+# -+# RCU Subsystem -+# -+CONFIG_TREE_RCU=y -+# CONFIG_TREE_PREEMPT_RCU is not set -+# CONFIG_TINY_RCU is not set -+# CONFIG_RCU_TRACE is not set -+CONFIG_RCU_FANOUT=32 -+# CONFIG_RCU_FANOUT_EXACT is not set -+# CONFIG_TREE_RCU_TRACE is not set -+CONFIG_IKCONFIG=y -+CONFIG_IKCONFIG_PROC=y -+CONFIG_LOG_BUF_SHIFT=16 -+CONFIG_GROUP_SCHED=y -+CONFIG_FAIR_GROUP_SCHED=y -+# CONFIG_RT_GROUP_SCHED is not set -+CONFIG_USER_SCHED=y -+# CONFIG_CGROUP_SCHED is not set -+# CONFIG_CGROUPS is not set -+# CONFIG_SYSFS_DEPRECATED_V2 is not set -+# CONFIG_RELAY is not set -+# CONFIG_NAMESPACES is not set -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_RD_GZIP=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_ANON_INODES=y -+CONFIG_EMBEDDED=y -+CONFIG_UID16=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+# CONFIG_ELF_CORE is not set -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_EPOLL=y -+CONFIG_SIGNALFD=y -+CONFIG_TIMERFD=y -+CONFIG_EVENTFD=y -+CONFIG_SHMEM=y -+CONFIG_AIO=y -+ -+# -+# Kernel Performance Events And Counters -+# -+CONFIG_VM_EVENT_COUNTERS=y -+# CONFIG_COMPAT_BRK is not set -+CONFIG_SLAB=y -+# CONFIG_SLUB is not set -+# CONFIG_SLOB is not set -+CONFIG_PROFILING=y -+CONFIG_TRACEPOINTS=y -+CONFIG_OPROFILE=y -+CONFIG_HAVE_OPROFILE=y -+# CONFIG_KPROBES is not set -+CONFIG_HAVE_KPROBES=y -+CONFIG_HAVE_KRETPROBES=y -+CONFIG_HAVE_CLK=y -+ -+# -+# GCOV-based kernel profiling -+# -+# CONFIG_GCOV_KERNEL is not set -+CONFIG_SLOW_WORK=y -+# CONFIG_SLOW_WORK_DEBUG is not set -+CONFIG_HAVE_GENERIC_DMA_COHERENT=y -+CONFIG_SLABINFO=y -+CONFIG_RT_MUTEXES=y -+CONFIG_BASE_SMALL=0 -+CONFIG_MODULES=y -+CONFIG_MODULE_FORCE_LOAD=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODULE_FORCE_UNLOAD=y -+CONFIG_MODVERSIONS=y -+CONFIG_MODULE_SRCVERSION_ALL=y -+CONFIG_BLOCK=y -+CONFIG_LBDAF=y -+CONFIG_BLK_DEV_BSG=y -+# CONFIG_BLK_DEV_INTEGRITY is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+CONFIG_IOSCHED_DEADLINE=y -+CONFIG_IOSCHED_CFQ=y -+# CONFIG_DEFAULT_DEADLINE is not set -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" -+# CONFIG_INLINE_SPIN_TRYLOCK is not set -+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -+# CONFIG_INLINE_SPIN_LOCK is not set -+# CONFIG_INLINE_SPIN_LOCK_BH is not set -+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_SPIN_UNLOCK is not set -+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -+# CONFIG_INLINE_READ_TRYLOCK is not set -+# CONFIG_INLINE_READ_LOCK is not set -+# CONFIG_INLINE_READ_LOCK_BH is not set -+# CONFIG_INLINE_READ_LOCK_IRQ is not set -+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_READ_UNLOCK is not set -+# CONFIG_INLINE_READ_UNLOCK_BH is not set -+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -+# CONFIG_INLINE_WRITE_TRYLOCK is not set -+# CONFIG_INLINE_WRITE_LOCK is not set -+# CONFIG_INLINE_WRITE_LOCK_BH is not set -+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -+# CONFIG_INLINE_WRITE_UNLOCK is not set -+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -+# CONFIG_MUTEX_SPIN_ON_OWNER is not set -+CONFIG_FREEZER=y -+ -+# -+# System Type -+# -+CONFIG_MMU=y -+# CONFIG_ARCH_AAEC2000 is not set -+# CONFIG_ARCH_INTEGRATOR is not set -+# CONFIG_ARCH_REALVIEW is not set -+# CONFIG_ARCH_VERSATILE is not set -+# CONFIG_ARCH_AT91 is not set -+# CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_GEMINI is not set -+# CONFIG_ARCH_EBSA110 is not set -+# CONFIG_ARCH_EP93XX is not set -+# CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_MXC is not set -+# CONFIG_ARCH_STMP3XXX is not set -+# CONFIG_ARCH_NETX is not set -+# CONFIG_ARCH_H720X is not set -+# CONFIG_ARCH_NOMADIK is not set -+# CONFIG_ARCH_IOP13XX is not set -+# CONFIG_ARCH_IOP32X is not set -+# CONFIG_ARCH_IOP33X is not set -+# CONFIG_ARCH_IXP23XX is not set -+# CONFIG_ARCH_IXP2000 is not set -+# CONFIG_ARCH_IXP4XX is not set -+# CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_DOVE is not set -+# CONFIG_ARCH_KIRKWOOD is not set -+# CONFIG_ARCH_LOKI is not set -+# CONFIG_ARCH_MV78XX0 is not set -+# CONFIG_ARCH_ORION5X is not set -+# CONFIG_ARCH_MMP is not set -+# CONFIG_ARCH_KS8695 is not set -+# CONFIG_ARCH_NS9XXX is not set -+# CONFIG_ARCH_W90X900 is not set -+# CONFIG_ARCH_PNX4008 is not set -+# CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_MSM is not set -+# CONFIG_ARCH_RPC is not set -+# CONFIG_ARCH_SA1100 is not set -+# CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_S3C64XX is not set -+# CONFIG_ARCH_S5PC1XX is not set -+# CONFIG_ARCH_SHARK is not set -+# CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_U300 is not set -+# CONFIG_ARCH_DAVINCI is not set -+CONFIG_ARCH_OMAP=y -+# CONFIG_ARCH_BCMRING is not set -+# CONFIG_ARCH_U8500 is not set -+ -+# -+# TI OMAP Implementations -+# -+CONFIG_ARCH_OMAP_OTG=y -+# CONFIG_ARCH_OMAP1 is not set -+# CONFIG_ARCH_OMAP2 is not set -+CONFIG_ARCH_OMAP3=y -+# CONFIG_ARCH_OMAP4 is not set -+ -+# -+# OMAP Feature Selections -+# -+CONFIG_OMAP_SMARTREFLEX=y -+# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -+CONFIG_OMAP_RESET_CLOCKS=y -+# CONFIG_OMAP_MUX is not set -+CONFIG_OMAP_MCBSP=y -+CONFIG_OMAP_MBOX_FWK=m -+CONFIG_OMAP_IOMMU=y -+# CONFIG_OMAP_MPU_TIMER is not set -+CONFIG_OMAP_32K_TIMER=y -+# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -+# CONFIG_OMAP3_DEBOBS is not set -+CONFIG_OMAP_32K_TIMER_HZ=128 -+CONFIG_OMAP_DM_TIMER=y -+# CONFIG_OMAP_LL_DEBUG_UART1 is not set -+# CONFIG_OMAP_LL_DEBUG_UART2 is not set -+CONFIG_OMAP_LL_DEBUG_UART3=y -+# CONFIG_OMAP_LL_DEBUG_NONE is not set -+# CONFIG_OMAP_PM_NONE is not set -+# CONFIG_OMAP_PM_NOOP is not set -+CONFIG_OMAP_PM_SRF=y -+CONFIG_ARCH_OMAP34XX=y -+CONFIG_ARCH_OMAP3430=y -+CONFIG_OMAP_PACKAGE_CBB=y -+ -+# -+# OMAP Board Type -+# -+CONFIG_MACH_OMAP3_BEAGLE=y -+# CONFIG_MACH_OMAP_LDP is not set -+# CONFIG_MACH_OVERO is not set -+CONFIG_MACH_OMAP3EVM=y -+CONFIG_PMIC_TWL4030=y -+# CONFIG_MACH_OMAP3517EVM is not set -+# CONFIG_MACH_OMAP3_PANDORA is not set -+# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -+# CONFIG_MACH_OMAP_3430SDP is not set -+# CONFIG_MACH_NOKIA_RX51 is not set -+# CONFIG_MACH_OMAP_ZOOM2 is not set -+# CONFIG_MACH_OMAP_ZOOM3 is not set -+# CONFIG_MACH_CM_T35 is not set -+# CONFIG_MACH_IGEP0020 is not set -+# CONFIG_MACH_OMAP_3630SDP is not set -+# CONFIG_OMAP3_EMU is not set -+# CONFIG_OMAP3_SDRC_AC_TIMING is not set -+ -+# -+# Processor Type -+# -+CONFIG_CPU_32=y -+CONFIG_CPU_32v6K=y -+CONFIG_CPU_V7=y -+CONFIG_CPU_32v7=y -+CONFIG_CPU_ABRT_EV7=y -+CONFIG_CPU_PABRT_V7=y -+CONFIG_CPU_CACHE_V7=y -+CONFIG_CPU_CACHE_VIPT=y -+CONFIG_CPU_COPY_V6=y -+CONFIG_CPU_TLB_V7=y -+CONFIG_CPU_HAS_ASID=y -+CONFIG_CPU_CP15=y -+CONFIG_CPU_CP15_MMU=y -+ -+# -+# Processor Features -+# -+CONFIG_ARM_THUMB=y -+CONFIG_ARM_THUMBEE=y -+# CONFIG_CPU_ICACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_DISABLE is not set -+# CONFIG_CPU_BPREDICT_DISABLE is not set -+CONFIG_HAS_TLS_REG=y -+CONFIG_ARM_L1_CACHE_SHIFT=6 -+CONFIG_USER_L2_PLE=y -+CONFIG_USER_PMON=y -+# CONFIG_ARM_ERRATA_430973 is not set -+# CONFIG_ARM_ERRATA_458693 is not set -+# CONFIG_ARM_ERRATA_460075 is not set -+CONFIG_COMMON_CLKDEV=y -+ -+# -+# Bus support -+# -+# CONFIG_PCI_SYSCALL is not set -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+# CONFIG_PCCARD is not set -+ -+# -+# Kernel Features -+# -+CONFIG_TICK_ONESHOT=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -+CONFIG_VMSPLIT_3G=y -+# CONFIG_VMSPLIT_2G is not set -+# CONFIG_VMSPLIT_1G is not set -+CONFIG_PAGE_OFFSET=0xC0000000 -+# CONFIG_PREEMPT_NONE is not set -+# CONFIG_PREEMPT_VOLUNTARY is not set -+CONFIG_PREEMPT=y -+CONFIG_HZ=128 -+# CONFIG_THUMB2_KERNEL is not set -+CONFIG_AEABI=y -+# CONFIG_OABI_COMPAT is not set -+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -+# CONFIG_HIGHMEM is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+CONFIG_PAGEFLAGS_EXTENDED=y -+CONFIG_SPLIT_PTLOCK_CPUS=4 -+# CONFIG_PHYS_ADDR_T_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_KSM is not set -+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -+CONFIG_LEDS=y -+CONFIG_ALIGNMENT_TRAP=y -+# CONFIG_UACCESS_WITH_MEMCPY is not set -+CONFIG_CPU_V7_SYSFS=y -+ -+# -+# Boot options -+# -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE=" debug " -+# CONFIG_XIP_KERNEL is not set -+CONFIG_KEXEC=y -+CONFIG_ATAGS_PROC=y -+ -+# -+# CPU Power Management -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+CONFIG_CPU_FREQ_DEBUG=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_STAT_DETAILS=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+# CONFIG_CPU_IDLE is not set -+ -+# -+# Floating point emulation -+# -+ -+# -+# At least one emulation must be selected -+# -+CONFIG_VFP=y -+CONFIG_VFPv3=y -+CONFIG_NEON=y -+ -+# -+# Userspace binary formats -+# -+CONFIG_BINFMT_ELF=y -+CONFIG_HAVE_AOUT=y -+CONFIG_BINFMT_AOUT=m -+CONFIG_BINFMT_MISC=y -+ -+# -+# Power management options -+# -+CONFIG_PM=y -+CONFIG_PM_DEBUG=y -+# CONFIG_PM_VERBOSE is not set -+CONFIG_CAN_PM_TRACE=y -+CONFIG_PM_SLEEP=y -+CONFIG_SUSPEND=y -+CONFIG_SUSPEND_FREEZER=y -+# CONFIG_APM_EMULATION is not set -+CONFIG_PM_RUNTIME=y -+CONFIG_ARCH_SUSPEND_POSSIBLE=y -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+CONFIG_PACKET_MMAP=y -+CONFIG_UNIX=y -+CONFIG_XFRM=y -+# CONFIG_XFRM_USER is not set -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_XFRM_MIGRATE is not set -+# CONFIG_XFRM_STATISTICS is not set -+CONFIG_XFRM_IPCOMP=m -+CONFIG_NET_KEY=y -+# CONFIG_NET_KEY_MIGRATE is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+CONFIG_IP_PNP=y -+CONFIG_IP_PNP_DHCP=y -+CONFIG_IP_PNP_BOOTP=y -+CONFIG_IP_PNP_RARP=y -+CONFIG_NET_IPIP=m -+CONFIG_NET_IPGRE=m -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+CONFIG_INET_AH=m -+CONFIG_INET_ESP=m -+CONFIG_INET_IPCOMP=m -+CONFIG_INET_XFRM_TUNNEL=m -+CONFIG_INET_TUNNEL=m -+CONFIG_INET_XFRM_MODE_TRANSPORT=y -+CONFIG_INET_XFRM_MODE_TUNNEL=y -+CONFIG_INET_XFRM_MODE_BEET=y -+CONFIG_INET_LRO=y -+CONFIG_INET_DIAG=m -+CONFIG_INET_TCP_DIAG=m -+CONFIG_TCP_CONG_ADVANCED=y -+CONFIG_TCP_CONG_BIC=m -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_TCP_CONG_WESTWOOD=m -+CONFIG_TCP_CONG_HTCP=m -+CONFIG_TCP_CONG_HSTCP=m -+CONFIG_TCP_CONG_HYBLA=m -+CONFIG_TCP_CONG_VEGAS=m -+CONFIG_TCP_CONG_SCALABLE=m -+CONFIG_TCP_CONG_LP=m -+CONFIG_TCP_CONG_VENO=m -+CONFIG_TCP_CONG_YEAH=m -+CONFIG_TCP_CONG_ILLINOIS=m -+# CONFIG_DEFAULT_BIC is not set -+CONFIG_DEFAULT_CUBIC=y -+# CONFIG_DEFAULT_HTCP is not set -+# CONFIG_DEFAULT_VEGAS is not set -+# CONFIG_DEFAULT_WESTWOOD is not set -+# CONFIG_DEFAULT_RENO is not set -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+CONFIG_IPV6=m -+# CONFIG_IPV6_PRIVACY is not set -+# CONFIG_IPV6_ROUTER_PREF is not set -+# CONFIG_IPV6_OPTIMISTIC_DAD is not set -+CONFIG_INET6_AH=m -+CONFIG_INET6_ESP=m -+CONFIG_INET6_IPCOMP=m -+CONFIG_IPV6_MIP6=m -+CONFIG_INET6_XFRM_TUNNEL=m -+CONFIG_INET6_TUNNEL=m -+CONFIG_INET6_XFRM_MODE_TRANSPORT=m -+CONFIG_INET6_XFRM_MODE_TUNNEL=m -+CONFIG_INET6_XFRM_MODE_BEET=m -+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -+CONFIG_IPV6_SIT=m -+# CONFIG_IPV6_SIT_6RD is not set -+CONFIG_IPV6_NDISC_NODETYPE=y -+CONFIG_IPV6_TUNNEL=m -+CONFIG_IPV6_MULTIPLE_TABLES=y -+CONFIG_IPV6_SUBTREES=y -+CONFIG_IPV6_MROUTE=y -+# CONFIG_IPV6_PIMSM_V2 is not set -+# CONFIG_NETWORK_SECMARK is not set -+CONFIG_NETFILTER=y -+# CONFIG_NETFILTER_DEBUG is not set -+CONFIG_NETFILTER_ADVANCED=y -+CONFIG_BRIDGE_NETFILTER=y -+ -+# -+# Core Netfilter Configuration -+# -+CONFIG_NETFILTER_NETLINK=m -+CONFIG_NETFILTER_NETLINK_QUEUE=m -+CONFIG_NETFILTER_NETLINK_LOG=m -+CONFIG_NF_CONNTRACK=m -+CONFIG_NF_CT_ACCT=y -+CONFIG_NF_CONNTRACK_MARK=y -+CONFIG_NF_CONNTRACK_EVENTS=y -+CONFIG_NF_CT_PROTO_DCCP=m -+CONFIG_NF_CT_PROTO_GRE=m -+CONFIG_NF_CT_PROTO_SCTP=m -+CONFIG_NF_CT_PROTO_UDPLITE=m -+CONFIG_NF_CONNTRACK_AMANDA=m -+CONFIG_NF_CONNTRACK_FTP=m -+CONFIG_NF_CONNTRACK_H323=m -+CONFIG_NF_CONNTRACK_IRC=m -+CONFIG_NF_CONNTRACK_NETBIOS_NS=m -+CONFIG_NF_CONNTRACK_PPTP=m -+CONFIG_NF_CONNTRACK_SANE=m -+CONFIG_NF_CONNTRACK_SIP=m -+CONFIG_NF_CONNTRACK_TFTP=m -+CONFIG_NF_CT_NETLINK=m -+# CONFIG_NETFILTER_TPROXY is not set -+CONFIG_NETFILTER_XTABLES=m -+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -+CONFIG_NETFILTER_XT_TARGET_HL=m -+# CONFIG_NETFILTER_XT_TARGET_LED is not set -+CONFIG_NETFILTER_XT_TARGET_MARK=m -+CONFIG_NETFILTER_XT_TARGET_NFLOG=m -+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -+CONFIG_NETFILTER_XT_TARGET_RATEEST=m -+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -+CONFIG_NETFILTER_XT_MATCH_COMMENT=m -+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -+CONFIG_NETFILTER_XT_MATCH_DCCP=m -+CONFIG_NETFILTER_XT_MATCH_DSCP=m -+CONFIG_NETFILTER_XT_MATCH_ESP=m -+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -+CONFIG_NETFILTER_XT_MATCH_HELPER=m -+CONFIG_NETFILTER_XT_MATCH_HL=m -+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -+CONFIG_NETFILTER_XT_MATCH_LENGTH=m -+CONFIG_NETFILTER_XT_MATCH_LIMIT=m -+CONFIG_NETFILTER_XT_MATCH_MAC=m -+CONFIG_NETFILTER_XT_MATCH_MARK=m -+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -+CONFIG_NETFILTER_XT_MATCH_OWNER=m -+CONFIG_NETFILTER_XT_MATCH_POLICY=m -+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -+CONFIG_NETFILTER_XT_MATCH_QUOTA=m -+CONFIG_NETFILTER_XT_MATCH_RATEEST=m -+CONFIG_NETFILTER_XT_MATCH_REALM=m -+CONFIG_NETFILTER_XT_MATCH_RECENT=m -+# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -+CONFIG_NETFILTER_XT_MATCH_SCTP=m -+CONFIG_NETFILTER_XT_MATCH_STATE=m -+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -+CONFIG_NETFILTER_XT_MATCH_STRING=m -+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -+CONFIG_NETFILTER_XT_MATCH_TIME=m -+CONFIG_NETFILTER_XT_MATCH_U32=m -+# CONFIG_NETFILTER_XT_MATCH_OSF is not set -+CONFIG_IP_VS=m -+CONFIG_IP_VS_IPV6=y -+CONFIG_IP_VS_DEBUG=y -+CONFIG_IP_VS_TAB_BITS=12 -+ -+# -+# IPVS transport protocol load balancing support -+# -+CONFIG_IP_VS_PROTO_TCP=y -+CONFIG_IP_VS_PROTO_UDP=y -+CONFIG_IP_VS_PROTO_AH_ESP=y -+CONFIG_IP_VS_PROTO_ESP=y -+CONFIG_IP_VS_PROTO_AH=y -+ -+# -+# IPVS scheduler -+# -+CONFIG_IP_VS_RR=m -+CONFIG_IP_VS_WRR=m -+CONFIG_IP_VS_LC=m -+CONFIG_IP_VS_WLC=m -+CONFIG_IP_VS_LBLC=m -+CONFIG_IP_VS_LBLCR=m -+CONFIG_IP_VS_DH=m -+CONFIG_IP_VS_SH=m -+CONFIG_IP_VS_SED=m -+CONFIG_IP_VS_NQ=m -+ -+# -+# IPVS application helper -+# -+CONFIG_IP_VS_FTP=m -+ -+# -+# IP: Netfilter Configuration -+# -+CONFIG_NF_DEFRAG_IPV4=m -+CONFIG_NF_CONNTRACK_IPV4=m -+CONFIG_NF_CONNTRACK_PROC_COMPAT=y -+CONFIG_IP_NF_QUEUE=m -+CONFIG_IP_NF_IPTABLES=m -+CONFIG_IP_NF_MATCH_ADDRTYPE=m -+CONFIG_IP_NF_MATCH_AH=m -+CONFIG_IP_NF_MATCH_ECN=m -+CONFIG_IP_NF_MATCH_TTL=m -+CONFIG_IP_NF_FILTER=m -+CONFIG_IP_NF_TARGET_REJECT=m -+CONFIG_IP_NF_TARGET_LOG=m -+CONFIG_IP_NF_TARGET_ULOG=m -+CONFIG_NF_NAT=m -+CONFIG_NF_NAT_NEEDED=y -+CONFIG_IP_NF_TARGET_MASQUERADE=m -+CONFIG_IP_NF_TARGET_NETMAP=m -+CONFIG_IP_NF_TARGET_REDIRECT=m -+CONFIG_NF_NAT_SNMP_BASIC=m -+CONFIG_NF_NAT_PROTO_DCCP=m -+CONFIG_NF_NAT_PROTO_GRE=m -+CONFIG_NF_NAT_PROTO_UDPLITE=m -+CONFIG_NF_NAT_PROTO_SCTP=m -+CONFIG_NF_NAT_FTP=m -+CONFIG_NF_NAT_IRC=m -+CONFIG_NF_NAT_TFTP=m -+CONFIG_NF_NAT_AMANDA=m -+CONFIG_NF_NAT_PPTP=m -+CONFIG_NF_NAT_H323=m -+CONFIG_NF_NAT_SIP=m -+CONFIG_IP_NF_MANGLE=m -+CONFIG_IP_NF_TARGET_CLUSTERIP=m -+CONFIG_IP_NF_TARGET_ECN=m -+CONFIG_IP_NF_TARGET_TTL=m -+CONFIG_IP_NF_RAW=m -+CONFIG_IP_NF_ARPTABLES=m -+CONFIG_IP_NF_ARPFILTER=m -+CONFIG_IP_NF_ARP_MANGLE=m -+ -+# -+# IPv6: Netfilter Configuration -+# -+CONFIG_NF_CONNTRACK_IPV6=m -+CONFIG_IP6_NF_QUEUE=m -+CONFIG_IP6_NF_IPTABLES=m -+CONFIG_IP6_NF_MATCH_AH=m -+CONFIG_IP6_NF_MATCH_EUI64=m -+CONFIG_IP6_NF_MATCH_FRAG=m -+CONFIG_IP6_NF_MATCH_OPTS=m -+CONFIG_IP6_NF_MATCH_HL=m -+CONFIG_IP6_NF_MATCH_IPV6HEADER=m -+CONFIG_IP6_NF_MATCH_MH=m -+CONFIG_IP6_NF_MATCH_RT=m -+CONFIG_IP6_NF_TARGET_HL=m -+CONFIG_IP6_NF_TARGET_LOG=m -+CONFIG_IP6_NF_FILTER=m -+CONFIG_IP6_NF_TARGET_REJECT=m -+CONFIG_IP6_NF_MANGLE=m -+CONFIG_IP6_NF_RAW=m -+# CONFIG_BRIDGE_NF_EBTABLES is not set -+CONFIG_IP_DCCP=m -+CONFIG_INET_DCCP_DIAG=m -+ -+# -+# DCCP CCIDs Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_DCCP_CCID2_DEBUG is not set -+CONFIG_IP_DCCP_CCID3=y -+# CONFIG_IP_DCCP_CCID3_DEBUG is not set -+CONFIG_IP_DCCP_CCID3_RTO=100 -+CONFIG_IP_DCCP_TFRC_LIB=y -+ -+# -+# DCCP Kernel Hacking -+# -+# CONFIG_IP_DCCP_DEBUG is not set -+CONFIG_IP_SCTP=m -+# CONFIG_SCTP_DBG_MSG is not set -+# CONFIG_SCTP_DBG_OBJCNT is not set -+# CONFIG_SCTP_HMAC_NONE is not set -+# CONFIG_SCTP_HMAC_SHA1 is not set -+CONFIG_SCTP_HMAC_MD5=y -+# CONFIG_RDS is not set -+CONFIG_TIPC=m -+# CONFIG_TIPC_ADVANCED is not set -+# CONFIG_TIPC_DEBUG is not set -+CONFIG_ATM=m -+CONFIG_ATM_CLIP=m -+# CONFIG_ATM_CLIP_NO_ICMP is not set -+CONFIG_ATM_LANE=m -+CONFIG_ATM_MPOA=m -+CONFIG_ATM_BR2684=m -+# CONFIG_ATM_BR2684_IPFILTER is not set -+CONFIG_STP=m -+CONFIG_GARP=m -+CONFIG_BRIDGE=m -+# CONFIG_NET_DSA is not set -+CONFIG_VLAN_8021Q=m -+CONFIG_VLAN_8021Q_GVRP=y -+# CONFIG_DECNET is not set -+CONFIG_LLC=m -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+CONFIG_WAN_ROUTER=m -+# CONFIG_PHONET is not set -+# CONFIG_IEEE802154 is not set -+CONFIG_NET_SCHED=y -+ -+# -+# Queueing/Scheduling -+# -+CONFIG_NET_SCH_CBQ=m -+CONFIG_NET_SCH_HTB=m -+CONFIG_NET_SCH_HFSC=m -+CONFIG_NET_SCH_ATM=m -+CONFIG_NET_SCH_PRIO=m -+CONFIG_NET_SCH_MULTIQ=m -+CONFIG_NET_SCH_RED=m -+CONFIG_NET_SCH_SFQ=m -+CONFIG_NET_SCH_TEQL=m -+CONFIG_NET_SCH_TBF=m -+CONFIG_NET_SCH_GRED=m -+CONFIG_NET_SCH_DSMARK=m -+CONFIG_NET_SCH_NETEM=m -+CONFIG_NET_SCH_DRR=m -+ -+# -+# Classification -+# -+CONFIG_NET_CLS=y -+CONFIG_NET_CLS_BASIC=m -+CONFIG_NET_CLS_TCINDEX=m -+CONFIG_NET_CLS_ROUTE4=m -+CONFIG_NET_CLS_ROUTE=y -+CONFIG_NET_CLS_FW=m -+CONFIG_NET_CLS_U32=m -+CONFIG_CLS_U32_PERF=y -+CONFIG_CLS_U32_MARK=y -+CONFIG_NET_CLS_RSVP=m -+CONFIG_NET_CLS_RSVP6=m -+CONFIG_NET_CLS_FLOW=m -+# CONFIG_NET_EMATCH is not set -+# CONFIG_NET_CLS_ACT is not set -+CONFIG_NET_CLS_IND=y -+CONFIG_NET_SCH_FIFO=y -+# CONFIG_DCB is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_NET_DROP_MONITOR is not set -+# CONFIG_HAMRADIO is not set -+CONFIG_CAN=m -+CONFIG_CAN_RAW=m -+CONFIG_CAN_BCM=m -+ -+# -+# CAN Device Drivers -+# -+CONFIG_CAN_VCAN=m -+# CONFIG_CAN_DEV is not set -+# CONFIG_CAN_DEBUG_DEVICES is not set -+CONFIG_IRDA=m -+ -+# -+# IrDA protocols -+# -+CONFIG_IRLAN=m -+CONFIG_IRNET=m -+CONFIG_IRCOMM=m -+CONFIG_IRDA_ULTRA=y -+ -+# -+# IrDA options -+# -+CONFIG_IRDA_CACHE_LAST_LSAP=y -+CONFIG_IRDA_FAST_RR=y -+CONFIG_IRDA_DEBUG=y -+ -+# -+# Infrared-port device drivers -+# -+ -+# -+# SIR device drivers -+# -+CONFIG_IRTTY_SIR=m -+ -+# -+# Dongle support -+# -+CONFIG_DONGLE=y -+CONFIG_ESI_DONGLE=m -+CONFIG_ACTISYS_DONGLE=m -+CONFIG_TEKRAM_DONGLE=m -+CONFIG_TOIM3232_DONGLE=m -+CONFIG_LITELINK_DONGLE=m -+CONFIG_MA600_DONGLE=m -+CONFIG_GIRBIL_DONGLE=m -+CONFIG_MCP2120_DONGLE=m -+CONFIG_OLD_BELKIN_DONGLE=m -+# CONFIG_ACT200L_DONGLE is not set -+CONFIG_KINGSUN_DONGLE=m -+CONFIG_KSDAZZLE_DONGLE=m -+CONFIG_KS959_DONGLE=m -+ -+# -+# FIR device drivers -+# -+CONFIG_USB_IRDA=m -+CONFIG_SIGMATEL_FIR=m -+CONFIG_MCS_FIR=m -+CONFIG_BT=m -+CONFIG_BT_L2CAP=m -+CONFIG_BT_SCO=m -+CONFIG_BT_RFCOMM=m -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=m -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=m -+ -+# -+# Bluetooth device drivers -+# -+CONFIG_BT_HCIBTUSB=m -+CONFIG_BT_HCIBTSDIO=m -+CONFIG_BT_HCIUART=m -+CONFIG_BT_HCIUART_H4=y -+CONFIG_BT_HCIUART_BCSP=y -+CONFIG_BT_HCIUART_LL=y -+CONFIG_BT_HCIBCM203X=m -+CONFIG_BT_HCIBPA10X=m -+CONFIG_BT_HCIBFUSB=m -+# CONFIG_BT_HCIVHCI is not set -+# CONFIG_BT_MRVL is not set -+CONFIG_AF_RXRPC=m -+# CONFIG_AF_RXRPC_DEBUG is not set -+# CONFIG_RXKAD is not set -+CONFIG_FIB_RULES=y -+CONFIG_WIRELESS=y -+CONFIG_WIRELESS_EXT=y -+CONFIG_WEXT_CORE=y -+CONFIG_WEXT_PROC=y -+CONFIG_WEXT_SPY=y -+CONFIG_WEXT_PRIV=y -+CONFIG_CFG80211=m -+# CONFIG_NL80211_TESTMODE is not set -+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -+# CONFIG_CFG80211_REG_DEBUG is not set -+CONFIG_CFG80211_DEFAULT_PS=y -+# CONFIG_CFG80211_DEBUGFS is not set -+CONFIG_WIRELESS_OLD_REGULATORY=y -+CONFIG_CFG80211_WEXT=y -+CONFIG_WIRELESS_EXT_SYSFS=y -+CONFIG_LIB80211=y -+CONFIG_LIB80211_CRYPT_WEP=m -+CONFIG_LIB80211_CRYPT_CCMP=m -+CONFIG_LIB80211_CRYPT_TKIP=m -+# CONFIG_LIB80211_DEBUG is not set -+CONFIG_MAC80211=m -+CONFIG_MAC80211_RC_PID=y -+# CONFIG_MAC80211_RC_MINSTREL is not set -+CONFIG_MAC80211_RC_DEFAULT_PID=y -+# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set -+CONFIG_MAC80211_RC_DEFAULT="pid" -+# CONFIG_MAC80211_MESH is not set -+CONFIG_MAC80211_LEDS=y -+# CONFIG_MAC80211_DEBUGFS is not set -+# CONFIG_MAC80211_DEBUG_MENU is not set -+CONFIG_WIMAX=m -+CONFIG_WIMAX_DEBUG_LEVEL=8 -+CONFIG_RFKILL=m -+CONFIG_RFKILL_LEDS=y -+CONFIG_RFKILL_INPUT=y -+CONFIG_NET_9P=m -+# CONFIG_NET_9P_DEBUG is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="" -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+CONFIG_STANDALONE=y -+CONFIG_PREVENT_FIRMWARE_BUILD=y -+CONFIG_FW_LOADER=y -+CONFIG_FIRMWARE_IN_KERNEL=y -+CONFIG_EXTRA_FIRMWARE="" -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_DEBUG_DEVRES is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_TESTS is not set -+CONFIG_MTD_CONCAT=y -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+# CONFIG_MTD_CMDLINE_PARTS is not set -+# CONFIG_MTD_AFS_PARTS is not set -+# CONFIG_MTD_AR7_PARTS is not set -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+# CONFIG_MTD_CFI is not set -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_DATAFLASH is not set -+# CONFIG_MTD_M25P80 is not set -+# CONFIG_MTD_SST25L is not set -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+CONFIG_MTD_NAND=y -+# CONFIG_MTD_NAND_VERIFY_WRITE is not set -+# CONFIG_MTD_NAND_ECC_SMC is not set -+# CONFIG_MTD_NAND_MUSEUM_IDS is not set -+# CONFIG_MTD_NAND_GPIO is not set -+CONFIG_MTD_NAND_OMAP2=y -+CONFIG_MTD_NAND_OMAP_PREFETCH=y -+# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set -+CONFIG_MTD_NAND_IDS=y -+# CONFIG_MTD_NAND_DISKONCHIP is not set -+# CONFIG_MTD_NAND_NANDSIM is not set -+CONFIG_MTD_NAND_PLATFORM=y -+# CONFIG_MTD_ALAUDA is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# LPDDR flash memory drivers -+# -+# CONFIG_MTD_LPDDR is not set -+ -+# -+# UBI - Unsorted block images -+# -+CONFIG_MTD_UBI=y -+CONFIG_MTD_UBI_WL_THRESHOLD=4096 -+CONFIG_MTD_UBI_BEB_RESERVE=1 -+# CONFIG_MTD_UBI_GLUEBI is not set -+ -+# -+# UBI debugging options -+# -+# CONFIG_MTD_UBI_DEBUG is not set -+# CONFIG_PARPORT is not set -+CONFIG_BLK_DEV=y -+# CONFIG_BLK_DEV_COW_COMMON is not set -+CONFIG_BLK_DEV_LOOP=y -+CONFIG_BLK_DEV_CRYPTOLOOP=m -+ -+# -+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -+# -+# CONFIG_BLK_DEV_NBD is not set -+# CONFIG_BLK_DEV_UB is not set -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=16384 -+# CONFIG_BLK_DEV_XIP is not set -+CONFIG_CDROM_PKTCDVD=m -+CONFIG_CDROM_PKTCDVD_BUFFERS=8 -+# CONFIG_CDROM_PKTCDVD_WCACHE is not set -+# CONFIG_ATA_OVER_ETH is not set -+# CONFIG_MG_DISK is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_AD525X_DPOT is not set -+# CONFIG_ICS932S401 is not set -+# CONFIG_ENCLOSURE_SERVICES is not set -+CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -+# CONFIG_ISL29003 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_TI_DAC7512 is not set -+# CONFIG_C2PORT is not set -+ -+# -+# EEPROM support -+# -+# CONFIG_EEPROM_AT24 is not set -+# CONFIG_EEPROM_AT25 is not set -+# CONFIG_EEPROM_LEGACY is not set -+# CONFIG_EEPROM_MAX6875 is not set -+CONFIG_EEPROM_93CX6=y -+CONFIG_IWMC3200TOP=m -+# CONFIG_IWMC3200TOP_DEBUG is not set -+# CONFIG_IWMC3200TOP_DEBUGFS is not set -+CONFIG_HAVE_IDE=y -+# CONFIG_IDE is not set -+ -+# -+# SCSI device support -+# -+CONFIG_RAID_ATTRS=m -+CONFIG_SCSI=y -+CONFIG_SCSI_DMA=y -+# CONFIG_SCSI_TGT is not set -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=y -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+CONFIG_BLK_DEV_SR=y -+CONFIG_BLK_DEV_SR_VENDOR=y -+CONFIG_CHR_DEV_SG=y -+CONFIG_CHR_DEV_SCH=m -+CONFIG_SCSI_MULTI_LUN=y -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+# CONFIG_SCSI_SCAN_ASYNC is not set -+CONFIG_SCSI_WAIT_SCAN=m -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+CONFIG_SCSI_ISCSI_ATTRS=m -+# CONFIG_SCSI_SAS_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+# CONFIG_SCSI_SRP_ATTRS is not set -+CONFIG_SCSI_LOWLEVEL=y -+CONFIG_ISCSI_TCP=m -+# CONFIG_LIBFC is not set -+# CONFIG_LIBFCOE is not set -+# CONFIG_SCSI_DEBUG is not set -+# CONFIG_SCSI_DH is not set -+# CONFIG_SCSI_OSD_INITIATOR is not set -+# CONFIG_ATA is not set -+CONFIG_MD=y -+CONFIG_BLK_DEV_MD=m -+CONFIG_MD_LINEAR=m -+CONFIG_MD_RAID0=m -+CONFIG_MD_RAID1=m -+CONFIG_MD_RAID10=m -+CONFIG_MD_RAID456=m -+CONFIG_MD_RAID6_PQ=m -+# CONFIG_ASYNC_RAID6_TEST is not set -+CONFIG_MD_MULTIPATH=m -+CONFIG_MD_FAULTY=m -+CONFIG_BLK_DEV_DM=m -+# CONFIG_DM_DEBUG is not set -+CONFIG_DM_CRYPT=m -+CONFIG_DM_SNAPSHOT=m -+CONFIG_DM_MIRROR=m -+# CONFIG_DM_LOG_USERSPACE is not set -+CONFIG_DM_ZERO=m -+CONFIG_DM_MULTIPATH=m -+# CONFIG_DM_MULTIPATH_QL is not set -+# CONFIG_DM_MULTIPATH_ST is not set -+CONFIG_DM_DELAY=m -+# CONFIG_DM_UEVENT is not set -+CONFIG_NETDEVICES=y -+CONFIG_DUMMY=m -+CONFIG_BONDING=m -+CONFIG_MACVLAN=m -+CONFIG_EQUALIZER=m -+CONFIG_TUN=m -+CONFIG_VETH=m -+CONFIG_PHYLIB=y -+ -+# -+# MII PHY device drivers -+# -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+# CONFIG_LXT_PHY is not set -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_ICPLUS_PHY is not set -+# CONFIG_REALTEK_PHY is not set -+# CONFIG_NATIONAL_PHY is not set -+# CONFIG_STE10XP is not set -+# CONFIG_LSI_ET1011C_PHY is not set -+# CONFIG_FIXED_PHY is not set -+# CONFIG_MDIO_BITBANG is not set -+CONFIG_NET_ETHERNET=y -+CONFIG_MII=y -+# CONFIG_AX88796 is not set -+# CONFIG_SMC91X is not set -+# CONFIG_TI_DAVINCI_EMAC is not set -+# CONFIG_DM9000 is not set -+CONFIG_ENC28J60=y -+# CONFIG_ENC28J60_WRITEVERIFY is not set -+# CONFIG_ETHOC is not set -+CONFIG_SMC911X=y -+CONFIG_SMSC911X=y -+# CONFIG_DNET is not set -+# CONFIG_IBM_NEW_EMAC_ZMII is not set -+# CONFIG_IBM_NEW_EMAC_RGMII is not set -+# CONFIG_IBM_NEW_EMAC_TAH is not set -+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -+# CONFIG_B44 is not set -+# CONFIG_KS8842 is not set -+CONFIG_KS8851=y -+# CONFIG_KS8851_MLL is not set -+# CONFIG_NETDEV_1000 is not set -+# CONFIG_NETDEV_10000 is not set -+CONFIG_WLAN=y -+# CONFIG_LIBERTAS_THINFIRM is not set -+CONFIG_AT76C50X_USB=m -+CONFIG_USB_ZD1201=m -+CONFIG_USB_NET_RNDIS_WLAN=m -+CONFIG_RTL8187=m -+CONFIG_RTL8187_LEDS=y -+# CONFIG_MAC80211_HWSIM is not set -+# CONFIG_ATH_COMMON is not set -+CONFIG_B43=m -+# CONFIG_B43_SDIO is not set -+CONFIG_B43_PHY_LP=y -+CONFIG_B43_LEDS=y -+CONFIG_B43_HWRNG=y -+# CONFIG_B43_DEBUG is not set -+# CONFIG_B43LEGACY is not set -+CONFIG_HOSTAP=m -+CONFIG_HOSTAP_FIRMWARE=y -+CONFIG_HOSTAP_FIRMWARE_NVRAM=y -+# CONFIG_IWM is not set -+CONFIG_LIBERTAS=m -+CONFIG_LIBERTAS_USB=m -+# CONFIG_LIBERTAS_SDIO is not set -+# CONFIG_LIBERTAS_SPI is not set -+# CONFIG_LIBERTAS_DEBUG is not set -+CONFIG_P54_COMMON=m -+CONFIG_P54_USB=m -+# CONFIG_P54_SPI is not set -+CONFIG_P54_LEDS=y -+CONFIG_RT2X00=m -+CONFIG_RT2500USB=m -+CONFIG_RT73USB=m -+# CONFIG_RT2800USB is not set -+CONFIG_RT2X00_LIB_USB=m -+CONFIG_RT2X00_LIB=m -+CONFIG_RT2X00_LIB_FIRMWARE=y -+CONFIG_RT2X00_LIB_CRYPTO=y -+CONFIG_RT2X00_LIB_LEDS=y -+# CONFIG_RT2X00_DEBUG is not set -+CONFIG_WL12XX=m -+CONFIG_WL1251=m -+CONFIG_WL1251_SPI=m -+CONFIG_WL1251_SDIO=m -+CONFIG_WL1271=m -+CONFIG_ZD1211RW=m -+# CONFIG_ZD1211RW_DEBUG is not set -+ -+# -+# WiMAX Wireless Broadband devices -+# -+CONFIG_WIMAX_I2400M=m -+CONFIG_WIMAX_I2400M_USB=m -+CONFIG_WIMAX_I2400M_SDIO=m -+CONFIG_WIMAX_IWMC3200_SDIO=y -+CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 -+ -+# -+# USB Network Adapters -+# -+CONFIG_USB_CATC=y -+CONFIG_USB_KAWETH=y -+CONFIG_USB_PEGASUS=y -+CONFIG_USB_RTL8150=y -+CONFIG_USB_USBNET=y -+CONFIG_USB_NET_AX8817X=y -+CONFIG_USB_NET_CDCETHER=y -+CONFIG_USB_NET_CDC_EEM=y -+CONFIG_USB_NET_DM9601=y -+CONFIG_USB_NET_SMSC95XX=y -+CONFIG_USB_NET_GL620A=y -+CONFIG_USB_NET_NET1080=y -+CONFIG_USB_NET_PLUSB=y -+CONFIG_USB_NET_MCS7830=y -+CONFIG_USB_NET_RNDIS_HOST=y -+CONFIG_USB_NET_CDC_SUBSET=y -+CONFIG_USB_ALI_M5632=y -+CONFIG_USB_AN2720=y -+CONFIG_USB_BELKIN=y -+CONFIG_USB_ARMLINUX=y -+CONFIG_USB_EPSON2888=y -+CONFIG_USB_KC2190=y -+CONFIG_USB_NET_ZAURUS=y -+CONFIG_USB_HSO=m -+CONFIG_USB_NET_INT51X1=m -+# CONFIG_WAN is not set -+CONFIG_ATM_DRIVERS=y -+# CONFIG_ATM_DUMMY is not set -+# CONFIG_ATM_TCP is not set -+CONFIG_PPP=m -+CONFIG_PPP_MULTILINK=y -+CONFIG_PPP_FILTER=y -+CONFIG_PPP_ASYNC=m -+CONFIG_PPP_SYNC_TTY=m -+CONFIG_PPP_DEFLATE=m -+CONFIG_PPP_BSDCOMP=m -+CONFIG_PPP_MPPE=m -+CONFIG_PPPOE=m -+# CONFIG_PPPOATM is not set -+CONFIG_PPPOL2TP=m -+# CONFIG_SLIP is not set -+CONFIG_SLHC=m -+CONFIG_NETCONSOLE=m -+CONFIG_NETCONSOLE_DYNAMIC=y -+CONFIG_NETPOLL=y -+CONFIG_NETPOLL_TRAP=y -+CONFIG_NET_POLL_CONTROLLER=y -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=y -+CONFIG_INPUT_FF_MEMLESS=y -+CONFIG_INPUT_POLLDEV=y -+# CONFIG_INPUT_SPARSEKMAP is not set -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=y -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+CONFIG_INPUT_EVDEV=y -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ADP5588 is not set -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_QT2160 is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+# CONFIG_KEYBOARD_TCA6416 is not set -+# CONFIG_KEYBOARD_MATRIX is not set -+# CONFIG_KEYBOARD_LM8323 is not set -+# CONFIG_KEYBOARD_MAX7359 is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_OPENCORES is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_TWL4030 is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+CONFIG_INPUT_MOUSE=y -+CONFIG_MOUSE_PS2=y -+CONFIG_MOUSE_PS2_ALPS=y -+CONFIG_MOUSE_PS2_LOGIPS2PP=y -+CONFIG_MOUSE_PS2_SYNAPTICS=y -+CONFIG_MOUSE_PS2_TRACKPOINT=y -+# CONFIG_MOUSE_PS2_ELANTECH is not set -+# CONFIG_MOUSE_PS2_SENTELIC is not set -+# CONFIG_MOUSE_PS2_TOUCHKIT is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_APPLETOUCH is not set -+# CONFIG_MOUSE_BCM5974 is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+# CONFIG_MOUSE_GPIO is not set -+# CONFIG_MOUSE_SYNAPTICS_I2C is not set -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+CONFIG_INPUT_MISC=y -+# CONFIG_INPUT_ATI_REMOTE is not set -+# CONFIG_INPUT_ATI_REMOTE2 is not set -+# CONFIG_INPUT_KEYSPAN_REMOTE is not set -+# CONFIG_INPUT_POWERMATE is not set -+# CONFIG_INPUT_YEALINK is not set -+# CONFIG_INPUT_CM109 is not set -+CONFIG_INPUT_TWL4030_PWRBUTTON=y -+CONFIG_INPUT_UINPUT=y -+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -+ -+# -+# Hardware I/O ports -+# -+CONFIG_SERIO=y -+CONFIG_SERIO_SERPORT=y -+CONFIG_SERIO_LIBPS2=y -+# CONFIG_SERIO_RAW is not set -+# CONFIG_SERIO_ALTERA_PS2 is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+CONFIG_VT=y -+CONFIG_CONSOLE_TRANSLATIONS=y -+CONFIG_VT_CONSOLE=y -+CONFIG_HW_CONSOLE=y -+CONFIG_VT_HW_CONSOLE_BINDING=y -+CONFIG_DEVKMEM=y -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+CONFIG_SERIAL_8250=y -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=32 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -+CONFIG_SERIAL_8250_EXTENDED=y -+CONFIG_SERIAL_8250_MANY_PORTS=y -+CONFIG_SERIAL_8250_SHARE_IRQ=y -+CONFIG_SERIAL_8250_DETECT_IRQ=y -+CONFIG_SERIAL_8250_RSA=y -+ -+# -+# Non-8250 serial port support -+# -+# CONFIG_SERIAL_MAX3100 is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+CONFIG_HW_RANDOM=y -+# CONFIG_HW_RANDOM_TIMERIOMEM is not set -+# CONFIG_R3964 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+CONFIG_I2C=y -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_COMPAT=y -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_HELPER_AUTO=y -+ -+# -+# I2C Hardware Bus support -+# -+ -+# -+# I2C system bus drivers (mostly embedded / system-on-chip) -+# -+# CONFIG_I2C_DESIGNWARE is not set -+# CONFIG_I2C_GPIO is not set -+# CONFIG_I2C_OCORES is not set -+CONFIG_I2C_OMAP=y -+# CONFIG_I2C_SIMTEC is not set -+ -+# -+# External I2C/SMBus adapter drivers -+# -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_TINY_USB is not set -+ -+# -+# Other I2C/SMBus bus drivers -+# -+# CONFIG_I2C_PCA_PLATFORM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+# CONFIG_SPI_BITBANG is not set -+# CONFIG_SPI_GPIO is not set -+CONFIG_SPI_OMAP24XX=y -+# CONFIG_SPI_XILINX is not set -+ -+# -+# SPI Protocol Masters -+# -+CONFIG_SPI_SPIDEV=y -+# CONFIG_SPI_TLE62X0 is not set -+ -+# -+# PPS support -+# -+# CONFIG_PPS is not set -+CONFIG_ARCH_REQUIRE_GPIOLIB=y -+CONFIG_GPIOLIB=y -+# CONFIG_DEBUG_GPIO is not set -+CONFIG_GPIO_SYSFS=y -+ -+# -+# Memory mapped GPIO expanders: -+# -+ -+# -+# I2C GPIO expanders: -+# -+# CONFIG_GPIO_MAX732X is not set -+# CONFIG_GPIO_PCA953X is not set -+# CONFIG_GPIO_PCF857X is not set -+CONFIG_GPIO_TWL4030=y -+ -+# -+# PCI GPIO expanders: -+# -+ -+# -+# SPI GPIO expanders: -+# -+# CONFIG_GPIO_MAX7301 is not set -+# CONFIG_GPIO_MCP23S08 is not set -+# CONFIG_GPIO_MC33880 is not set -+ -+# -+# AC97 GPIO expanders: -+# -+# CONFIG_W1 is not set -+CONFIG_POWER_SUPPLY=m -+# CONFIG_POWER_SUPPLY_DEBUG is not set -+# CONFIG_PDA_POWER is not set -+# CONFIG_BATTERY_DS2760 is not set -+# CONFIG_BATTERY_DS2782 is not set -+# CONFIG_BATTERY_BQ27x00 is not set -+# CONFIG_BATTERY_MAX17040 is not set -+CONFIG_HWMON=y -+# CONFIG_HWMON_VID is not set -+# CONFIG_HWMON_DEBUG_CHIP is not set -+ -+# -+# Native drivers -+# -+# CONFIG_SENSORS_AD7414 is not set -+# CONFIG_SENSORS_AD7418 is not set -+# CONFIG_SENSORS_ADCXX is not set -+# CONFIG_SENSORS_ADM1021 is not set -+# CONFIG_SENSORS_ADM1025 is not set -+# CONFIG_SENSORS_ADM1026 is not set -+# CONFIG_SENSORS_ADM1029 is not set -+# CONFIG_SENSORS_ADM1031 is not set -+# CONFIG_SENSORS_ADM9240 is not set -+# CONFIG_SENSORS_ADT7462 is not set -+# CONFIG_SENSORS_ADT7470 is not set -+# CONFIG_SENSORS_ADT7473 is not set -+# CONFIG_SENSORS_ADT7475 is not set -+# CONFIG_SENSORS_ATXP1 is not set -+# CONFIG_SENSORS_DS1621 is not set -+# CONFIG_SENSORS_F71805F is not set -+# CONFIG_SENSORS_F71882FG is not set -+# CONFIG_SENSORS_F75375S is not set -+# CONFIG_SENSORS_G760A is not set -+# CONFIG_SENSORS_GL518SM is not set -+# CONFIG_SENSORS_GL520SM is not set -+# CONFIG_SENSORS_IT87 is not set -+# CONFIG_SENSORS_LM63 is not set -+# CONFIG_SENSORS_LM70 is not set -+# CONFIG_SENSORS_LM73 is not set -+# CONFIG_SENSORS_LM75 is not set -+# CONFIG_SENSORS_LM77 is not set -+# CONFIG_SENSORS_LM78 is not set -+# CONFIG_SENSORS_LM80 is not set -+# CONFIG_SENSORS_LM83 is not set -+# CONFIG_SENSORS_LM85 is not set -+# CONFIG_SENSORS_LM87 is not set -+# CONFIG_SENSORS_LM90 is not set -+# CONFIG_SENSORS_LM92 is not set -+# CONFIG_SENSORS_LM93 is not set -+# CONFIG_SENSORS_LTC4215 is not set -+# CONFIG_SENSORS_LTC4245 is not set -+# CONFIG_SENSORS_LM95241 is not set -+# CONFIG_SENSORS_MAX1111 is not set -+# CONFIG_SENSORS_MAX1619 is not set -+# CONFIG_SENSORS_MAX6650 is not set -+# CONFIG_SENSORS_PC87360 is not set -+# CONFIG_SENSORS_PC87427 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_SHT15 is not set -+# CONFIG_SENSORS_DME1737 is not set -+# CONFIG_SENSORS_SMSC47M1 is not set -+# CONFIG_SENSORS_SMSC47M192 is not set -+# CONFIG_SENSORS_SMSC47B397 is not set -+# CONFIG_SENSORS_ADS7828 is not set -+# CONFIG_SENSORS_THMC50 is not set -+# CONFIG_SENSORS_TMP401 is not set -+# CONFIG_SENSORS_TMP421 is not set -+# CONFIG_SENSORS_VT1211 is not set -+# CONFIG_SENSORS_W83781D is not set -+# CONFIG_SENSORS_W83791D is not set -+# CONFIG_SENSORS_W83792D is not set -+# CONFIG_SENSORS_W83793 is not set -+# CONFIG_SENSORS_W83L785TS is not set -+# CONFIG_SENSORS_W83L786NG is not set -+# CONFIG_SENSORS_W83627HF is not set -+# CONFIG_SENSORS_W83627EHF is not set -+# CONFIG_SENSORS_LIS3_SPI is not set -+CONFIG_THERMAL=y -+CONFIG_THERMAL_HWMON=y -+CONFIG_WATCHDOG=y -+CONFIG_WATCHDOG_NOWAYOUT=y -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_OMAP_WATCHDOG=y -+# CONFIG_TWL4030_WATCHDOG is not set -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+CONFIG_SSB_POSSIBLE=y -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB=y -+CONFIG_SSB_SDIOHOST_POSSIBLE=y -+# CONFIG_SSB_SDIOHOST is not set -+# CONFIG_SSB_SILENT is not set -+# CONFIG_SSB_DEBUG is not set -+ -+# -+# Multifunction device drivers -+# -+CONFIG_MFD_CORE=y -+# CONFIG_MFD_SM501 is not set -+# CONFIG_MFD_ASIC3 is not set -+# CONFIG_HTC_EGPIO is not set -+# CONFIG_HTC_PASIC3 is not set -+# CONFIG_TPS65010 is not set -+CONFIG_TWL4030_CORE=y -+CONFIG_TWL4030_POWER=y -+CONFIG_TWL4030_CODEC=y -+# CONFIG_TWL4030_MADC is not set -+# CONFIG_MFD_TMIO is not set -+# CONFIG_MFD_T7L66XB is not set -+# CONFIG_MFD_TC6387XB is not set -+# CONFIG_MFD_TC6393XB is not set -+# CONFIG_PMIC_DA903X is not set -+# CONFIG_PMIC_ADP5520 is not set -+# CONFIG_MFD_WM8400 is not set -+# CONFIG_MFD_WM831X is not set -+# CONFIG_MFD_WM8350_I2C is not set -+# CONFIG_MFD_PCF50633 is not set -+# CONFIG_MFD_MC13783 is not set -+# CONFIG_AB3100_CORE is not set -+# CONFIG_EZX_PCAP is not set -+# CONFIG_MFD_88PM8607 is not set -+# CONFIG_AB4500_CORE is not set -+CONFIG_REGULATOR=y -+# CONFIG_REGULATOR_DEBUG is not set -+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -+# CONFIG_REGULATOR_BQ24022 is not set -+# CONFIG_REGULATOR_MAX1586 is not set -+CONFIG_REGULATOR_TWL4030=y -+# CONFIG_REGULATOR_LP3971 is not set -+# CONFIG_REGULATOR_TPS65023 is not set -+# CONFIG_REGULATOR_TPS6507X is not set -+CONFIG_MEDIA_SUPPORT=y -+ -+# -+# Multimedia core support -+# -+CONFIG_VIDEO_DEV=y -+CONFIG_VIDEO_V4L2_COMMON=y -+CONFIG_VIDEO_ALLOW_V4L1=y -+CONFIG_VIDEO_V4L1_COMPAT=y -+CONFIG_DVB_CORE=m -+CONFIG_VIDEO_MEDIA=m -+ -+# -+# Multimedia drivers -+# -+CONFIG_MEDIA_ATTACH=y -+CONFIG_MEDIA_TUNER=m -+CONFIG_MEDIA_TUNER_CUSTOMISE=y -+CONFIG_MEDIA_TUNER_SIMPLE=m -+CONFIG_MEDIA_TUNER_TDA8290=m -+CONFIG_MEDIA_TUNER_TDA827X=m -+CONFIG_MEDIA_TUNER_TDA18271=m -+CONFIG_MEDIA_TUNER_TDA9887=m -+CONFIG_MEDIA_TUNER_TEA5761=m -+CONFIG_MEDIA_TUNER_TEA5767=m -+CONFIG_MEDIA_TUNER_MT20XX=m -+CONFIG_MEDIA_TUNER_MT2060=m -+CONFIG_MEDIA_TUNER_MT2266=m -+CONFIG_MEDIA_TUNER_MT2131=m -+CONFIG_MEDIA_TUNER_QT1010=m -+CONFIG_MEDIA_TUNER_XC2028=m -+CONFIG_MEDIA_TUNER_XC5000=m -+CONFIG_MEDIA_TUNER_MXL5005S=m -+CONFIG_MEDIA_TUNER_MXL5007T=m -+CONFIG_MEDIA_TUNER_MC44S803=m -+CONFIG_MEDIA_TUNER_MAX2165=m -+CONFIG_VIDEO_V4L2=y -+CONFIG_VIDEO_V4L1=y -+CONFIG_VIDEOBUF_GEN=y -+CONFIG_VIDEOBUF_DMA_SG=y -+CONFIG_VIDEOBUF_VMALLOC=m -+CONFIG_VIDEOBUF_DMA_CONTIG=y -+CONFIG_VIDEOBUF_DVB=m -+CONFIG_VIDEO_IR=m -+CONFIG_VIDEO_TVEEPROM=m -+CONFIG_VIDEO_TUNER=m -+CONFIG_VIDEO_CAPTURE_DRIVERS=y -+# CONFIG_VIDEO_ADV_DEBUG is not set -+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -+CONFIG_VIDEO_IR_I2C=m -+ -+# -+# Encoders/decoders and other helper chips -+# -+ -+# -+# Audio decoders -+# -+# CONFIG_VIDEO_TVAUDIO is not set -+# CONFIG_VIDEO_TDA7432 is not set -+# CONFIG_VIDEO_TDA9840 is not set -+# CONFIG_VIDEO_TDA9875 is not set -+# CONFIG_VIDEO_TEA6415C is not set -+# CONFIG_VIDEO_TEA6420 is not set -+CONFIG_VIDEO_MSP3400=m -+# CONFIG_VIDEO_CS5345 is not set -+CONFIG_VIDEO_CS53L32A=m -+# CONFIG_VIDEO_M52790 is not set -+# CONFIG_VIDEO_TLV320AIC23B is not set -+CONFIG_VIDEO_WM8775=m -+# CONFIG_VIDEO_WM8739 is not set -+# CONFIG_VIDEO_VP27SMPX is not set -+ -+# -+# RDS decoders -+# -+# CONFIG_VIDEO_SAA6588 is not set -+ -+# -+# Video decoders -+# -+# CONFIG_VIDEO_ADV7180 is not set -+# CONFIG_VIDEO_BT819 is not set -+# CONFIG_VIDEO_BT856 is not set -+# CONFIG_VIDEO_BT866 is not set -+# CONFIG_VIDEO_KS0127 is not set -+# CONFIG_VIDEO_OV7670 is not set -+CONFIG_VIDEO_MT9V011=m -+# CONFIG_VIDEO_TCM825X is not set -+CONFIG_VIDEO_MT9P012=m -+CONFIG_VIDEO_MT9T111=y -+# CONFIG_VIDEO_DW9710 is not set -+# CONFIG_VIDEO_OV3640 is not set -+# CONFIG_VIDEO_IMX046 is not set -+# CONFIG_VIDEO_LV8093 is not set -+# CONFIG_VIDEO_SAA7110 is not set -+CONFIG_VIDEO_SAA711X=m -+# CONFIG_VIDEO_SAA717X is not set -+# CONFIG_VIDEO_SAA7191 is not set -+# CONFIG_VIDEO_TVP514X is not set -+# CONFIG_VIDEO_TVP5150 is not set -+# CONFIG_VIDEO_VPX3220 is not set -+ -+# -+# Video and audio decoders -+# -+CONFIG_VIDEO_CX25840=m -+ -+# -+# MPEG video encoders -+# -+CONFIG_VIDEO_CX2341X=m -+ -+# -+# Video encoders -+# -+# CONFIG_VIDEO_SAA7127 is not set -+# CONFIG_VIDEO_SAA7185 is not set -+# CONFIG_VIDEO_ADV7170 is not set -+# CONFIG_VIDEO_ADV7175 is not set -+# CONFIG_VIDEO_THS7303 is not set -+# CONFIG_VIDEO_ADV7343 is not set -+ -+# -+# Video improvement chips -+# -+# CONFIG_VIDEO_UPD64031A is not set -+# CONFIG_VIDEO_UPD64083 is not set -+CONFIG_VIDEO_VIVI=m -+# CONFIG_VIDEO_CPIA is not set -+# CONFIG_VIDEO_CPIA2 is not set -+# CONFIG_VIDEO_SAA5246A is not set -+# CONFIG_VIDEO_SAA5249 is not set -+# CONFIG_VIDEO_AU0828 is not set -+CONFIG_TI_MEDIA=y -+CONFIG_VIDEO_VPSS_SYSTEM=y -+CONFIG_VIDEO_VPFE_CAPTURE=y -+# CONFIG_VIDEO_DM6446_CCDC is not set -+# CONFIG_VIDEO_DM355_CCDC is not set -+CONFIG_VIDEO_OMAP2_VOUT=y -+CONFIG_VIDEO_OMAP3=y -+CONFIG_VIDEO_OMAP3_ISP=y -+CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER=y -+CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -+# CONFIG_SOC_CAMERA is not set -+CONFIG_V4L_USB_DRIVERS=y -+CONFIG_USB_VIDEO_CLASS=m -+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -+CONFIG_USB_GSPCA=m -+CONFIG_USB_M5602=m -+CONFIG_USB_STV06XX=m -+# CONFIG_USB_GL860 is not set -+CONFIG_USB_GSPCA_CONEX=m -+CONFIG_USB_GSPCA_ETOMS=m -+CONFIG_USB_GSPCA_FINEPIX=m -+# CONFIG_USB_GSPCA_JEILINJ is not set -+CONFIG_USB_GSPCA_MARS=m -+# CONFIG_USB_GSPCA_MR97310A is not set -+CONFIG_USB_GSPCA_OV519=m -+CONFIG_USB_GSPCA_OV534=m -+CONFIG_USB_GSPCA_PAC207=m -+# CONFIG_USB_GSPCA_PAC7302 is not set -+CONFIG_USB_GSPCA_PAC7311=m -+# CONFIG_USB_GSPCA_SN9C20X is not set -+CONFIG_USB_GSPCA_SONIXB=m -+CONFIG_USB_GSPCA_SONIXJ=m -+CONFIG_USB_GSPCA_SPCA500=m -+CONFIG_USB_GSPCA_SPCA501=m -+CONFIG_USB_GSPCA_SPCA505=m -+CONFIG_USB_GSPCA_SPCA506=m -+CONFIG_USB_GSPCA_SPCA508=m -+CONFIG_USB_GSPCA_SPCA561=m -+# CONFIG_USB_GSPCA_SQ905 is not set -+# CONFIG_USB_GSPCA_SQ905C is not set -+CONFIG_USB_GSPCA_STK014=m -+# CONFIG_USB_GSPCA_STV0680 is not set -+CONFIG_USB_GSPCA_SUNPLUS=m -+CONFIG_USB_GSPCA_T613=m -+CONFIG_USB_GSPCA_TV8532=m -+CONFIG_USB_GSPCA_VC032X=m -+CONFIG_USB_GSPCA_ZC3XX=m -+CONFIG_VIDEO_PVRUSB2=m -+CONFIG_VIDEO_PVRUSB2_SYSFS=y -+CONFIG_VIDEO_PVRUSB2_DVB=y -+# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -+CONFIG_VIDEO_HDPVR=m -+CONFIG_VIDEO_EM28XX=m -+CONFIG_VIDEO_EM28XX_ALSA=m -+CONFIG_VIDEO_EM28XX_DVB=m -+CONFIG_VIDEO_CX231XX=m -+# CONFIG_VIDEO_CX231XX_ALSA is not set -+CONFIG_VIDEO_CX231XX_DVB=m -+CONFIG_VIDEO_USBVISION=m -+CONFIG_VIDEO_USBVIDEO=m -+CONFIG_USB_VICAM=m -+CONFIG_USB_IBMCAM=m -+CONFIG_USB_KONICAWC=m -+CONFIG_USB_QUICKCAM_MESSENGER=m -+CONFIG_USB_ET61X251=m -+CONFIG_VIDEO_OVCAMCHIP=m -+CONFIG_USB_W9968CF=m -+CONFIG_USB_OV511=m -+CONFIG_USB_SE401=m -+CONFIG_USB_SN9C102=m -+CONFIG_USB_STV680=m -+CONFIG_USB_ZC0301=m -+CONFIG_USB_PWC=m -+# CONFIG_USB_PWC_DEBUG is not set -+CONFIG_USB_PWC_INPUT_EVDEV=y -+CONFIG_USB_ZR364XX=m -+CONFIG_USB_STKWEBCAM=m -+CONFIG_USB_S2255=m -+CONFIG_RADIO_ADAPTERS=y -+# CONFIG_I2C_SI4713 is not set -+# CONFIG_RADIO_SI4713 is not set -+# CONFIG_USB_DSBR is not set -+# CONFIG_RADIO_SI470X is not set -+# CONFIG_USB_MR800 is not set -+# CONFIG_RADIO_TEA5764 is not set -+# CONFIG_RADIO_TEF6862 is not set -+CONFIG_DVB_MAX_ADAPTERS=8 -+CONFIG_DVB_DYNAMIC_MINORS=y -+CONFIG_DVB_CAPTURE_DRIVERS=y -+# CONFIG_TTPCI_EEPROM is not set -+ -+# -+# Supported USB Adapters -+# -+CONFIG_DVB_USB=m -+# CONFIG_DVB_USB_DEBUG is not set -+CONFIG_DVB_USB_A800=m -+CONFIG_DVB_USB_DIBUSB_MB=m -+# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -+CONFIG_DVB_USB_DIBUSB_MC=m -+CONFIG_DVB_USB_DIB0700=m -+CONFIG_DVB_USB_UMT_010=m -+CONFIG_DVB_USB_CXUSB=m -+CONFIG_DVB_USB_M920X=m -+CONFIG_DVB_USB_GL861=m -+CONFIG_DVB_USB_AU6610=m -+CONFIG_DVB_USB_DIGITV=m -+CONFIG_DVB_USB_VP7045=m -+CONFIG_DVB_USB_VP702X=m -+CONFIG_DVB_USB_GP8PSK=m -+CONFIG_DVB_USB_NOVA_T_USB2=m -+CONFIG_DVB_USB_TTUSB2=m -+CONFIG_DVB_USB_DTT200U=m -+CONFIG_DVB_USB_OPERA1=m -+CONFIG_DVB_USB_AF9005=m -+CONFIG_DVB_USB_AF9005_REMOTE=m -+CONFIG_DVB_USB_DW2102=m -+CONFIG_DVB_USB_CINERGY_T2=m -+CONFIG_DVB_USB_ANYSEE=m -+CONFIG_DVB_USB_DTV5100=m -+CONFIG_DVB_USB_AF9015=m -+# CONFIG_DVB_USB_CE6230 is not set -+# CONFIG_DVB_USB_FRIIO is not set -+# CONFIG_DVB_USB_EC168 is not set -+# CONFIG_SMS_SIANO_MDTV is not set -+ -+# -+# Supported FlexCopII (B2C2) Adapters -+# -+CONFIG_DVB_B2C2_FLEXCOP=m -+CONFIG_DVB_B2C2_FLEXCOP_USB=m -+# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set -+ -+# -+# Supported DVB Frontends -+# -+# CONFIG_DVB_FE_CUSTOMISE is not set -+CONFIG_DVB_CX24123=m -+CONFIG_DVB_MT312=m -+CONFIG_DVB_ZL10039=m -+CONFIG_DVB_S5H1420=m -+CONFIG_DVB_STV0288=m -+CONFIG_DVB_STB6000=m -+CONFIG_DVB_STV0299=m -+CONFIG_DVB_TDA10086=m -+CONFIG_DVB_TUNER_ITD1000=m -+CONFIG_DVB_TUNER_CX24113=m -+CONFIG_DVB_TDA826X=m -+CONFIG_DVB_CX24116=m -+CONFIG_DVB_SI21XX=m -+CONFIG_DVB_CX22702=m -+CONFIG_DVB_TDA1004X=m -+CONFIG_DVB_NXT6000=m -+CONFIG_DVB_MT352=m -+CONFIG_DVB_ZL10353=m -+CONFIG_DVB_DIB3000MB=m -+CONFIG_DVB_DIB3000MC=m -+CONFIG_DVB_DIB7000M=m -+CONFIG_DVB_DIB7000P=m -+CONFIG_DVB_TDA10048=m -+CONFIG_DVB_AF9013=m -+CONFIG_DVB_TDA10021=m -+CONFIG_DVB_TDA10023=m -+CONFIG_DVB_STV0297=m -+CONFIG_DVB_NXT200X=m -+CONFIG_DVB_BCM3510=m -+CONFIG_DVB_LGDT330X=m -+CONFIG_DVB_LGDT3305=m -+CONFIG_DVB_S5H1409=m -+CONFIG_DVB_S5H1411=m -+CONFIG_DVB_DIB8000=m -+CONFIG_DVB_PLL=m -+CONFIG_DVB_TUNER_DIB0070=m -+CONFIG_DVB_LNBP21=m -+CONFIG_DVB_ISL6421=m -+CONFIG_DVB_LGS8GL5=m -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+# CONFIG_FB_BOOT_VESA_SUPPORT is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_FOREIGN_ENDIAN is not set -+# CONFIG_FB_SYS_FOPS is not set -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+CONFIG_FB_MODE_HELPERS=y -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+# CONFIG_FB_TMIO is not set -+# CONFIG_FB_VIRTUAL is not set -+# CONFIG_FB_METRONOME is not set -+# CONFIG_FB_MB862XX is not set -+# CONFIG_FB_BROADSHEET is not set -+# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -+CONFIG_OMAP2_VRAM=y -+CONFIG_OMAP2_VRFB=y -+CONFIG_OMAP2_DSS=y -+CONFIG_OMAP2_VRAM_SIZE=14 -+CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -+# CONFIG_OMAP2_DSS_RFBI is not set -+CONFIG_OMAP2_DSS_VENC=y -+CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -+# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -+# CONFIG_OMAP2_DSS_SDI is not set -+CONFIG_OMAP2_DSS_DSI=y -+CONFIG_OMAP2_DSS_USE_DSI_PLL=y -+# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -+CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -+CONFIG_FB_OMAP2=y -+CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -+# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -+CONFIG_FB_OMAP2_NUM_FBS=3 -+ -+# -+# OMAP2/3 Display Device Drivers -+# -+CONFIG_PANEL_GENERIC=y -+# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -+# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -+CONFIG_PANEL_SHARP_LS037V7DW01=y -+# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -+# CONFIG_PANEL_TAAL is not set -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Display device support -+# -+CONFIG_DISPLAY_SUPPORT=y -+ -+# -+# Display hardware drivers -+# -+ -+# -+# Console display driver support -+# -+# CONFIG_VGA_CONSOLE is not set -+CONFIG_DUMMY_CONSOLE=y -+CONFIG_FRAMEBUFFER_CONSOLE=y -+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -+# CONFIG_FONTS is not set -+CONFIG_FONT_8x8=y -+CONFIG_FONT_8x16=y -+CONFIG_LOGO=y -+# CONFIG_LOGO_LINUX_MONO is not set -+# CONFIG_LOGO_LINUX_VGA16 is not set -+CONFIG_LOGO_LINUX_CLUT224=y -+CONFIG_SOUND=y -+CONFIG_SOUND_OSS_CORE=y -+CONFIG_SOUND_OSS_CORE_PRECLAIM=y -+CONFIG_SND=y -+CONFIG_SND_TIMER=y -+CONFIG_SND_PCM=y -+CONFIG_SND_HWDEP=y -+CONFIG_SND_RAWMIDI=y -+CONFIG_SND_JACK=y -+CONFIG_SND_SEQUENCER=m -+# CONFIG_SND_SEQ_DUMMY is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=y -+CONFIG_SND_PCM_OSS=y -+CONFIG_SND_PCM_OSS_PLUGINS=y -+CONFIG_SND_SEQUENCER_OSS=y -+CONFIG_SND_HRTIMER=m -+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+CONFIG_SND_SUPPORT_OLD_API=y -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+CONFIG_SND_RAWMIDI_SEQ=m -+# CONFIG_SND_OPL3_LIB_SEQ is not set -+# CONFIG_SND_OPL4_LIB_SEQ is not set -+# CONFIG_SND_SBAWE_SEQ is not set -+# CONFIG_SND_EMU10K1_SEQ is not set -+CONFIG_SND_DRIVERS=y -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_VIRMIDI is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+# CONFIG_SND_ARM is not set -+CONFIG_SND_SPI=y -+CONFIG_SND_USB=y -+CONFIG_SND_USB_AUDIO=y -+CONFIG_SND_USB_CAIAQ=m -+CONFIG_SND_USB_CAIAQ_INPUT=y -+CONFIG_SND_SOC=y -+CONFIG_SND_OMAP_SOC=y -+CONFIG_SND_OMAP_SOC_MCBSP=y -+# CONFIG_SND_OMAP_SOC_OMAP3EVM is not set -+CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y -+CONFIG_SND_SOC_I2C_AND_SPI=y -+# CONFIG_SND_SOC_ALL_CODECS is not set -+CONFIG_SND_SOC_TWL4030=y -+# CONFIG_SOUND_PRIME is not set -+CONFIG_HID_SUPPORT=y -+CONFIG_HID=y -+# CONFIG_HIDRAW is not set -+ -+# -+# USB Input Devices -+# -+CONFIG_USB_HID=y -+# CONFIG_HID_PID is not set -+# CONFIG_USB_HIDDEV is not set -+ -+# -+# Special HID drivers -+# -+CONFIG_HID_A4TECH=y -+CONFIG_HID_APPLE=y -+CONFIG_HID_BELKIN=y -+CONFIG_HID_CHERRY=y -+CONFIG_HID_CHICONY=y -+CONFIG_HID_CYPRESS=y -+# CONFIG_HID_DRAGONRISE is not set -+CONFIG_HID_EZKEY=y -+# CONFIG_HID_KYE is not set -+CONFIG_HID_GYRATION=y -+# CONFIG_HID_TWINHAN is not set -+# CONFIG_HID_KENSINGTON is not set -+CONFIG_HID_LOGITECH=y -+# CONFIG_LOGITECH_FF is not set -+# CONFIG_LOGIRUMBLEPAD2_FF is not set -+CONFIG_HID_MICROSOFT=y -+CONFIG_HID_MONTEREY=y -+CONFIG_HID_NTRIG=y -+CONFIG_HID_PANTHERLORD=y -+# CONFIG_PANTHERLORD_FF is not set -+CONFIG_HID_PETALYNX=y -+CONFIG_HID_SAMSUNG=y -+CONFIG_HID_SONY=y -+CONFIG_HID_SUNPLUS=y -+# CONFIG_HID_GREENASIA is not set -+# CONFIG_HID_SMARTJOYPLUS is not set -+CONFIG_HID_TOPSEED=y -+# CONFIG_HID_THRUSTMASTER is not set -+# CONFIG_HID_WACOM is not set -+# CONFIG_HID_ZEROPLUS is not set -+CONFIG_USB_SUPPORT=y -+CONFIG_USB_ARCH_HAS_HCD=y -+CONFIG_USB_ARCH_HAS_OHCI=y -+CONFIG_USB_ARCH_HAS_EHCI=y -+CONFIG_USB=y -+# CONFIG_USB_DEBUG is not set -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+ -+# -+# Miscellaneous USB options -+# -+CONFIG_USB_DEVICEFS=y -+CONFIG_USB_DEVICE_CLASS=y -+# CONFIG_USB_DYNAMIC_MINORS is not set -+CONFIG_USB_SUSPEND=y -+CONFIG_USB_OTG=y -+# CONFIG_USB_OTG_WHITELIST is not set -+# CONFIG_USB_OTG_BLACKLIST_HUB is not set -+CONFIG_USB_MON=y -+# CONFIG_USB_WUSB is not set -+# CONFIG_USB_WUSB_CBAF is not set -+ -+# -+# USB Host Controller Drivers -+# -+# CONFIG_USB_C67X00_HCD is not set -+CONFIG_USB_EHCI_HCD=y -+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -+CONFIG_USB_EHCI_TT_NEWSCHED=y -+# CONFIG_USB_OXU210HP_HCD is not set -+# CONFIG_USB_ISP116X_HCD is not set -+# CONFIG_USB_ISP1760_HCD is not set -+# CONFIG_USB_ISP1362_HCD is not set -+# CONFIG_USB_OHCI_HCD is not set -+# CONFIG_USB_U132_HCD is not set -+# CONFIG_USB_SL811_HCD is not set -+# CONFIG_USB_R8A66597_HCD is not set -+# CONFIG_USB_HWA_HCD is not set -+CONFIG_USB_MUSB_HDRC=y -+CONFIG_USB_MUSB_SOC=y -+ -+# -+# OMAP 343x high speed USB support -+# -+# CONFIG_USB_MUSB_HOST is not set -+# CONFIG_USB_MUSB_PERIPHERAL is not set -+CONFIG_USB_MUSB_OTG=y -+CONFIG_USB_GADGET_MUSB_HDRC=y -+CONFIG_USB_MUSB_HDRC_HCD=y -+# CONFIG_MUSB_PIO_ONLY is not set -+CONFIG_USB_INVENTRA_DMA=y -+CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -+# CONFIG_USB_TI_CPPI_DMA is not set -+# CONFIG_USB_TI_CPPI41_DMA is not set -+# CONFIG_USB_MUSB_DEBUG is not set -+ -+# -+# USB Device Class drivers -+# -+CONFIG_USB_ACM=m -+CONFIG_USB_PRINTER=m -+CONFIG_USB_WDM=m -+CONFIG_USB_TMC=m -+ -+# -+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -+# -+ -+# -+# also be needed; see USB_STORAGE Help for more info -+# -+CONFIG_USB_STORAGE=y -+# CONFIG_USB_STORAGE_DEBUG is not set -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_ISD200 is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_ONETOUCH is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -+# CONFIG_USB_LIBUSUAL is not set -+ -+# -+# USB Imaging devices -+# -+# CONFIG_USB_MDC800 is not set -+# CONFIG_USB_MICROTEK is not set -+ -+# -+# USB port drivers -+# -+CONFIG_USB_SERIAL=m -+CONFIG_USB_EZUSB=y -+CONFIG_USB_SERIAL_GENERIC=y -+CONFIG_USB_SERIAL_AIRCABLE=m -+CONFIG_USB_SERIAL_ARK3116=m -+CONFIG_USB_SERIAL_BELKIN=m -+CONFIG_USB_SERIAL_CH341=m -+CONFIG_USB_SERIAL_WHITEHEAT=m -+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -+# CONFIG_USB_SERIAL_CP210X is not set -+CONFIG_USB_SERIAL_CYPRESS_M8=m -+CONFIG_USB_SERIAL_EMPEG=m -+CONFIG_USB_SERIAL_FTDI_SIO=m -+CONFIG_USB_SERIAL_FUNSOFT=m -+CONFIG_USB_SERIAL_VISOR=m -+CONFIG_USB_SERIAL_IPAQ=m -+CONFIG_USB_SERIAL_IR=m -+CONFIG_USB_SERIAL_EDGEPORT=m -+CONFIG_USB_SERIAL_EDGEPORT_TI=m -+CONFIG_USB_SERIAL_GARMIN=m -+CONFIG_USB_SERIAL_IPW=m -+CONFIG_USB_SERIAL_IUU=m -+CONFIG_USB_SERIAL_KEYSPAN_PDA=m -+CONFIG_USB_SERIAL_KEYSPAN=m -+CONFIG_USB_SERIAL_KEYSPAN_MPR=y -+CONFIG_USB_SERIAL_KEYSPAN_USA28=y -+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -+CONFIG_USB_SERIAL_KEYSPAN_USA19=y -+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -+CONFIG_USB_SERIAL_KLSI=m -+CONFIG_USB_SERIAL_KOBIL_SCT=m -+CONFIG_USB_SERIAL_MCT_U232=m -+CONFIG_USB_SERIAL_MOS7720=m -+CONFIG_USB_SERIAL_MOS7840=m -+CONFIG_USB_SERIAL_MOTOROLA=m -+CONFIG_USB_SERIAL_NAVMAN=m -+CONFIG_USB_SERIAL_PL2303=m -+CONFIG_USB_SERIAL_OTI6858=m -+# CONFIG_USB_SERIAL_QUALCOMM is not set -+CONFIG_USB_SERIAL_SPCP8X5=m -+CONFIG_USB_SERIAL_HP4X=m -+CONFIG_USB_SERIAL_SAFE=m -+# CONFIG_USB_SERIAL_SAFE_PADDED is not set -+CONFIG_USB_SERIAL_SIEMENS_MPI=m -+CONFIG_USB_SERIAL_SIERRAWIRELESS=m -+# CONFIG_USB_SERIAL_SYMBOL is not set -+CONFIG_USB_SERIAL_TI=m -+CONFIG_USB_SERIAL_CYBERJACK=m -+CONFIG_USB_SERIAL_XIRCOM=m -+CONFIG_USB_SERIAL_OPTION=m -+CONFIG_USB_SERIAL_OMNINET=m -+CONFIG_USB_SERIAL_OPTICON=m -+CONFIG_USB_SERIAL_DEBUG=m -+ -+# -+# USB Miscellaneous drivers -+# -+CONFIG_USB_EMI62=m -+CONFIG_USB_EMI26=m -+# CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_SEVSEG is not set -+# CONFIG_USB_RIO500 is not set -+CONFIG_USB_LEGOTOWER=m -+CONFIG_USB_LCD=m -+CONFIG_USB_BERRY_CHARGE=m -+CONFIG_USB_LED=m -+CONFIG_USB_CYPRESS_CY7C63=m -+CONFIG_USB_CYTHERM=m -+CONFIG_USB_IDMOUSE=m -+CONFIG_USB_FTDI_ELAN=m -+# CONFIG_USB_APPLEDISPLAY is not set -+CONFIG_USB_SISUSBVGA=m -+CONFIG_USB_SISUSBVGA_CON=y -+CONFIG_USB_LD=m -+CONFIG_USB_TRANCEVIBRATOR=m -+# CONFIG_USB_IOWARRIOR is not set -+CONFIG_USB_TEST=m -+# CONFIG_USB_ISIGHTFW is not set -+CONFIG_USB_VST=m -+CONFIG_USB_ATM=m -+CONFIG_USB_SPEEDTOUCH=m -+CONFIG_USB_CXACRU=m -+CONFIG_USB_UEAGLEATM=m -+CONFIG_USB_XUSBATM=m -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_DEBUG_FS=y -+CONFIG_USB_GADGET_VBUS_DRAW=2 -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_ATMEL_USBA is not set -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_PXA25X is not set -+# CONFIG_USB_GADGET_R8A66597 is not set -+# CONFIG_USB_GADGET_PXA27X is not set -+# CONFIG_USB_GADGET_S3C_HSOTG is not set -+# CONFIG_USB_GADGET_IMX is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+# CONFIG_USB_GADGET_FSL_QE is not set -+# CONFIG_USB_GADGET_CI13XXX is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LANGWELL is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ZERO_HNPTEST=y -+# CONFIG_USB_AUDIO is not set -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+# CONFIG_USB_ETH_EEM is not set -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+# CONFIG_USB_MASS_STORAGE is not set -+CONFIG_USB_G_SERIAL=m -+CONFIG_USB_MIDI_GADGET=m -+CONFIG_USB_G_PRINTER=m -+CONFIG_USB_CDC_COMPOSITE=m -+# CONFIG_USB_G_MULTI is not set -+ -+# -+# OTG and related infrastructure -+# -+CONFIG_USB_OTG_UTILS=y -+CONFIG_USB_GPIO_VBUS=y -+# CONFIG_ISP1301_OMAP is not set -+# CONFIG_USB_ULPI is not set -+CONFIG_TWL4030_USB=y -+CONFIG_NOP_USB_XCEIV=y -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+CONFIG_MMC_UNSAFE_RESUME=y -+ -+# -+# MMC/SD/SDIO Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+CONFIG_MMC_BLOCK_BOUNCE=y -+CONFIG_SDIO_UART=y -+# CONFIG_MMC_TEST is not set -+ -+# -+# MMC/SD/SDIO Host Controller Drivers -+# -+# CONFIG_MMC_SDHCI is not set -+# CONFIG_MMC_OMAP is not set -+CONFIG_MMC_OMAP_HS=y -+# CONFIG_MMC_AT91 is not set -+# CONFIG_MMC_ATMELMCI is not set -+CONFIG_MMC_SPI=m -+# CONFIG_MEMSTICK is not set -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+ -+# -+# LED drivers -+# -+# CONFIG_LEDS_PCA9532 is not set -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_GPIO_PLATFORM=y -+# CONFIG_LEDS_LP3944 is not set -+# CONFIG_LEDS_PCA955X is not set -+# CONFIG_LEDS_DAC124S085 is not set -+# CONFIG_LEDS_BD2802 is not set -+ -+# -+# LED Triggers -+# -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=m -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_BACKLIGHT=m -+# CONFIG_LEDS_TRIGGER_GPIO is not set -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m -+ -+# -+# iptables trigger is under Netfilter config (LED target) -+# -+# CONFIG_ACCESSIBILITY is not set -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=m -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set -+CONFIG_RTC_DRV_TWL4030=m -+# CONFIG_RTC_DRV_S35390A is not set -+# CONFIG_RTC_DRV_FM3130 is not set -+# CONFIG_RTC_DRV_RX8581 is not set -+# CONFIG_RTC_DRV_RX8025 is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_M41T94 is not set -+# CONFIG_RTC_DRV_DS1305 is not set -+# CONFIG_RTC_DRV_DS1390 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+# CONFIG_RTC_DRV_R9701 is not set -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_DS3234 is not set -+# CONFIG_RTC_DRV_PCF2123 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_CMOS is not set -+# CONFIG_RTC_DRV_DS1286 is not set -+# CONFIG_RTC_DRV_DS1511 is not set -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T35 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_MSM6242 is not set -+# CONFIG_RTC_DRV_BQ4802 is not set -+# CONFIG_RTC_DRV_RP5C01 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+# CONFIG_DMADEVICES is not set -+# CONFIG_AUXDISPLAY is not set -+CONFIG_UIO=m -+CONFIG_UIO_PDRV=m -+CONFIG_UIO_PDRV_GENIRQ=m -+# CONFIG_UIO_SMX is not set -+# CONFIG_UIO_SERCOS3 is not set -+ -+# -+# TI VLYNQ -+# -+CONFIG_STAGING=y -+# CONFIG_STAGING_EXCLUDE_BUILD is not set -+# CONFIG_USB_IP_COMMON is not set -+CONFIG_W35UND=m -+# CONFIG_PRISM2_USB is not set -+CONFIG_ECHO=m -+CONFIG_OTUS=m -+# CONFIG_COMEDI is not set -+# CONFIG_ASUS_OLED is not set -+# CONFIG_INPUT_MIMIO is not set -+# CONFIG_TRANZPORT is not set -+ -+# -+# Qualcomm MSM Camera And Video -+# -+ -+# -+# Camera Sensor Selection -+# -+# CONFIG_INPUT_GPIO is not set -+# CONFIG_DST is not set -+# CONFIG_POHMELFS is not set -+# CONFIG_PLAN9AUTH is not set -+# CONFIG_LINE6_USB is not set -+# CONFIG_USB_SERIAL_QUATECH2 is not set -+# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -+# CONFIG_VT6656 is not set -+# CONFIG_FB_UDL is not set -+ -+# -+# RAR Register Driver -+# -+# CONFIG_RAR_REGISTER is not set -+# CONFIG_IIO is not set -+# CONFIG_RAMZSWAP is not set -+# CONFIG_BATMAN_ADV is not set -+# CONFIG_STRIP is not set -+ -+# -+# CBUS support -+# -+# CONFIG_CBUS is not set -+ -+# -+# File systems -+# -+CONFIG_FS_JOURNAL_INFO=y -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -+# CONFIG_EXT3_FS_XATTR is not set -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_XATTR=y -+# CONFIG_EXT4_FS_POSIX_ACL is not set -+# CONFIG_EXT4_FS_SECURITY is not set -+# CONFIG_EXT4_DEBUG is not set -+CONFIG_JBD=y -+# CONFIG_JBD_DEBUG is not set -+CONFIG_JBD2=y -+# CONFIG_JBD2_DEBUG is not set -+CONFIG_FS_MBCACHE=y -+CONFIG_REISERFS_FS=m -+# CONFIG_REISERFS_CHECK is not set -+CONFIG_REISERFS_PROC_INFO=y -+CONFIG_REISERFS_FS_XATTR=y -+# CONFIG_REISERFS_FS_POSIX_ACL is not set -+# CONFIG_REISERFS_FS_SECURITY is not set -+CONFIG_JFS_FS=m -+# CONFIG_JFS_POSIX_ACL is not set -+# CONFIG_JFS_SECURITY is not set -+# CONFIG_JFS_DEBUG is not set -+# CONFIG_JFS_STATISTICS is not set -+CONFIG_FS_POSIX_ACL=y -+CONFIG_XFS_FS=m -+# CONFIG_XFS_QUOTA is not set -+# CONFIG_XFS_POSIX_ACL is not set -+# CONFIG_XFS_RT is not set -+# CONFIG_XFS_DEBUG is not set -+CONFIG_GFS2_FS=m -+# CONFIG_GFS2_FS_LOCKING_DLM is not set -+CONFIG_OCFS2_FS=m -+CONFIG_OCFS2_FS_O2CB=m -+CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -+CONFIG_OCFS2_FS_STATS=y -+CONFIG_OCFS2_DEBUG_MASKLOG=y -+# CONFIG_OCFS2_DEBUG_FS is not set -+# CONFIG_OCFS2_FS_POSIX_ACL is not set -+CONFIG_BTRFS_FS=m -+# CONFIG_BTRFS_FS_POSIX_ACL is not set -+# CONFIG_NILFS2_FS is not set -+CONFIG_FILE_LOCKING=y -+CONFIG_FSNOTIFY=y -+CONFIG_DNOTIFY=y -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+CONFIG_QUOTA=y -+# CONFIG_QUOTA_NETLINK_INTERFACE is not set -+CONFIG_PRINT_QUOTA_WARNING=y -+CONFIG_QUOTA_TREE=y -+# CONFIG_QFMT_V1 is not set -+CONFIG_QFMT_V2=y -+CONFIG_QUOTACTL=y -+# CONFIG_AUTOFS_FS is not set -+CONFIG_AUTOFS4_FS=m -+CONFIG_FUSE_FS=m -+# CONFIG_CUSE is not set -+CONFIG_GENERIC_ACL=y -+ -+# -+# Caches -+# -+# CONFIG_FSCACHE is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+CONFIG_ISO9660_FS=m -+CONFIG_JOLIET=y -+CONFIG_ZISOFS=y -+CONFIG_UDF_FS=m -+CONFIG_UDF_NLS=y -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+CONFIG_MSDOS_FS=y -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+CONFIG_NTFS_FS=m -+# CONFIG_NTFS_DEBUG is not set -+CONFIG_NTFS_RW=y -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_PROC_PAGE_MONITOR=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+# CONFIG_HUGETLB_PAGE is not set -+CONFIG_CONFIGFS_FS=m -+CONFIG_MISC_FILESYSTEMS=y -+CONFIG_ADFS_FS=m -+# CONFIG_ADFS_FS_RW is not set -+CONFIG_AFFS_FS=m -+# CONFIG_ECRYPT_FS is not set -+CONFIG_HFS_FS=m -+CONFIG_HFSPLUS_FS=m -+CONFIG_BEFS_FS=m -+# CONFIG_BEFS_DEBUG is not set -+CONFIG_BFS_FS=m -+CONFIG_EFS_FS=m -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -+CONFIG_JFFS2_SUMMARY=y -+CONFIG_JFFS2_FS_XATTR=y -+CONFIG_JFFS2_FS_POSIX_ACL=y -+CONFIG_JFFS2_FS_SECURITY=y -+CONFIG_JFFS2_COMPRESSION_OPTIONS=y -+CONFIG_JFFS2_ZLIB=y -+CONFIG_JFFS2_LZO=y -+CONFIG_JFFS2_RTIME=y -+CONFIG_JFFS2_RUBIN=y -+# CONFIG_JFFS2_CMODE_NONE is not set -+# CONFIG_JFFS2_CMODE_PRIORITY is not set -+# CONFIG_JFFS2_CMODE_SIZE is not set -+CONFIG_JFFS2_CMODE_FAVOURLZO=y -+CONFIG_UBIFS_FS=y -+CONFIG_UBIFS_FS_XATTR=y -+CONFIG_UBIFS_FS_ADVANCED_COMPR=y -+CONFIG_UBIFS_FS_LZO=y -+CONFIG_UBIFS_FS_ZLIB=y -+# CONFIG_UBIFS_FS_DEBUG is not set -+CONFIG_CRAMFS=m -+CONFIG_SQUASHFS=y -+# CONFIG_SQUASHFS_EMBEDDED is not set -+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -+CONFIG_VXFS_FS=m -+CONFIG_MINIX_FS=m -+CONFIG_OMFS_FS=m -+CONFIG_HPFS_FS=m -+CONFIG_QNX4FS_FS=m -+CONFIG_ROMFS_FS=m -+CONFIG_ROMFS_BACKED_BY_BLOCK=y -+# CONFIG_ROMFS_BACKED_BY_MTD is not set -+# CONFIG_ROMFS_BACKED_BY_BOTH is not set -+CONFIG_ROMFS_ON_BLOCK=y -+CONFIG_SYSV_FS=m -+CONFIG_UFS_FS=m -+# CONFIG_UFS_FS_WRITE is not set -+# CONFIG_UFS_DEBUG is not set -+CONFIG_NETWORK_FILESYSTEMS=y -+CONFIG_NFS_FS=y -+CONFIG_NFS_V3=y -+# CONFIG_NFS_V3_ACL is not set -+CONFIG_NFS_V4=y -+# CONFIG_NFS_V4_1 is not set -+CONFIG_ROOT_NFS=y -+CONFIG_NFSD=m -+CONFIG_NFSD_V2_ACL=y -+CONFIG_NFSD_V3=y -+CONFIG_NFSD_V3_ACL=y -+CONFIG_NFSD_V4=y -+CONFIG_LOCKD=y -+CONFIG_LOCKD_V4=y -+CONFIG_EXPORTFS=m -+CONFIG_NFS_ACL_SUPPORT=m -+CONFIG_NFS_COMMON=y -+CONFIG_SUNRPC=y -+CONFIG_SUNRPC_GSS=y -+CONFIG_RPCSEC_GSS_KRB5=y -+# CONFIG_RPCSEC_GSS_SPKM3 is not set -+CONFIG_SMB_FS=m -+# CONFIG_SMB_NLS_DEFAULT is not set -+CONFIG_CIFS=m -+CONFIG_CIFS_STATS=y -+CONFIG_CIFS_STATS2=y -+# CONFIG_CIFS_WEAK_PW_HASH is not set -+# CONFIG_CIFS_UPCALL is not set -+# CONFIG_CIFS_XATTR is not set -+# CONFIG_CIFS_DEBUG2 is not set -+# CONFIG_CIFS_DFS_UPCALL is not set -+CONFIG_CIFS_EXPERIMENTAL=y -+CONFIG_NCP_FS=m -+# CONFIG_NCPFS_PACKET_SIGNING is not set -+# CONFIG_NCPFS_IOCTL_LOCKING is not set -+# CONFIG_NCPFS_STRONG is not set -+# CONFIG_NCPFS_NFS_NS is not set -+# CONFIG_NCPFS_OS2_NS is not set -+# CONFIG_NCPFS_SMALLDOS is not set -+# CONFIG_NCPFS_NLS is not set -+# CONFIG_NCPFS_EXTRAS is not set -+CONFIG_CODA_FS=m -+CONFIG_AFS_FS=m -+# CONFIG_AFS_DEBUG is not set -+CONFIG_9P_FS=m -+ -+# -+# Partition Types -+# -+CONFIG_PARTITION_ADVANCED=y -+# CONFIG_ACORN_PARTITION is not set -+# CONFIG_OSF_PARTITION is not set -+# CONFIG_AMIGA_PARTITION is not set -+# CONFIG_ATARI_PARTITION is not set -+CONFIG_MAC_PARTITION=y -+CONFIG_MSDOS_PARTITION=y -+CONFIG_BSD_DISKLABEL=y -+CONFIG_MINIX_SUBPARTITION=y -+CONFIG_SOLARIS_X86_PARTITION=y -+# CONFIG_UNIXWARE_DISKLABEL is not set -+CONFIG_LDM_PARTITION=y -+CONFIG_LDM_DEBUG=y -+# CONFIG_SGI_PARTITION is not set -+# CONFIG_ULTRIX_PARTITION is not set -+# CONFIG_SUN_PARTITION is not set -+# CONFIG_KARMA_PARTITION is not set -+CONFIG_EFI_PARTITION=y -+# CONFIG_SYSV68_PARTITION is not set -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_737=m -+CONFIG_NLS_CODEPAGE_775=m -+CONFIG_NLS_CODEPAGE_850=m -+CONFIG_NLS_CODEPAGE_852=m -+CONFIG_NLS_CODEPAGE_855=m -+CONFIG_NLS_CODEPAGE_857=m -+CONFIG_NLS_CODEPAGE_860=m -+CONFIG_NLS_CODEPAGE_861=m -+CONFIG_NLS_CODEPAGE_862=m -+CONFIG_NLS_CODEPAGE_863=m -+CONFIG_NLS_CODEPAGE_864=m -+CONFIG_NLS_CODEPAGE_865=m -+CONFIG_NLS_CODEPAGE_866=m -+CONFIG_NLS_CODEPAGE_869=m -+CONFIG_NLS_CODEPAGE_936=m -+CONFIG_NLS_CODEPAGE_950=m -+CONFIG_NLS_CODEPAGE_932=m -+CONFIG_NLS_CODEPAGE_949=m -+CONFIG_NLS_CODEPAGE_874=m -+CONFIG_NLS_ISO8859_8=m -+CONFIG_NLS_CODEPAGE_1250=m -+CONFIG_NLS_CODEPAGE_1251=m -+CONFIG_NLS_ASCII=m -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_2=m -+CONFIG_NLS_ISO8859_3=m -+CONFIG_NLS_ISO8859_4=m -+CONFIG_NLS_ISO8859_5=m -+CONFIG_NLS_ISO8859_6=m -+CONFIG_NLS_ISO8859_7=m -+CONFIG_NLS_ISO8859_9=m -+CONFIG_NLS_ISO8859_13=m -+CONFIG_NLS_ISO8859_14=m -+CONFIG_NLS_ISO8859_15=m -+CONFIG_NLS_KOI8_R=m -+CONFIG_NLS_KOI8_U=m -+CONFIG_NLS_UTF8=y -+CONFIG_DLM=m -+# CONFIG_DLM_DEBUG is not set -+ -+# -+# Kernel hacking -+# -+CONFIG_PRINTK_TIME=y -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_FRAME_WARN=1024 -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_STRIP_ASM_SYMS is not set -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_FS=y -+# CONFIG_HEADERS_CHECK is not set -+CONFIG_DEBUG_KERNEL=y -+# CONFIG_DEBUG_SHIRQ is not set -+CONFIG_DETECT_SOFTLOCKUP=y -+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -+CONFIG_DETECT_HUNG_TASK=y -+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -+CONFIG_SCHED_DEBUG=y -+CONFIG_SCHEDSTATS=y -+CONFIG_TIMER_STATS=y -+# CONFIG_DEBUG_OBJECTS is not set -+# CONFIG_DEBUG_SLAB is not set -+# CONFIG_DEBUG_KMEMLEAK is not set -+CONFIG_DEBUG_PREEMPT=y -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+CONFIG_DEBUG_MUTEXES=y -+# CONFIG_DEBUG_LOCK_ALLOC is not set -+# CONFIG_PROVE_LOCKING is not set -+# CONFIG_LOCK_STAT is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+CONFIG_STACKTRACE=y -+# CONFIG_DEBUG_KOBJECT is not set -+# CONFIG_DEBUG_BUGVERBOSE is not set -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_WRITECOUNT is not set -+# CONFIG_DEBUG_MEMORY_INIT is not set -+# CONFIG_DEBUG_LIST is not set -+# CONFIG_DEBUG_SG is not set -+# CONFIG_DEBUG_NOTIFIERS is not set -+# CONFIG_DEBUG_CREDENTIALS is not set -+# CONFIG_BOOT_PRINTK_DELAY is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_RCU_CPU_STALL_DETECTOR is not set -+# CONFIG_BACKTRACE_SELF_TEST is not set -+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -+# CONFIG_FAULT_INJECTION is not set -+# CONFIG_LATENCYTOP is not set -+# CONFIG_SYSCTL_SYSCALL_CHECK is not set -+# CONFIG_PAGE_POISONING is not set -+CONFIG_NOP_TRACER=y -+CONFIG_HAVE_FUNCTION_TRACER=y -+CONFIG_RING_BUFFER=y -+CONFIG_EVENT_TRACING=y -+CONFIG_CONTEXT_SWITCH_TRACER=y -+CONFIG_RING_BUFFER_ALLOW_SWAP=y -+CONFIG_TRACING=y -+CONFIG_TRACING_SUPPORT=y -+CONFIG_FTRACE=y -+# CONFIG_FUNCTION_TRACER is not set -+# CONFIG_IRQSOFF_TRACER is not set -+# CONFIG_PREEMPT_TRACER is not set -+# CONFIG_SCHED_TRACER is not set -+# CONFIG_ENABLE_DEFAULT_TRACERS is not set -+# CONFIG_BOOT_TRACER is not set -+CONFIG_BRANCH_PROFILE_NONE=y -+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -+# CONFIG_PROFILE_ALL_BRANCHES is not set -+# CONFIG_STACK_TRACER is not set -+# CONFIG_KMEMTRACE is not set -+# CONFIG_WORKQUEUE_TRACER is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_RING_BUFFER_BENCHMARK is not set -+# CONFIG_DYNAMIC_DEBUG is not set -+# CONFIG_SAMPLES is not set -+CONFIG_HAVE_ARCH_KGDB=y -+# CONFIG_KGDB is not set -+CONFIG_ARM_UNWIND=y -+# CONFIG_DEBUG_USER is not set -+# CONFIG_DEBUG_ERRORS is not set -+# CONFIG_DEBUG_STACK_USAGE is not set -+# CONFIG_DEBUG_LL is not set -+# CONFIG_OC_ETM is not set -+ -+# -+# Security options -+# -+CONFIG_KEYS=y -+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITYFS is not set -+# CONFIG_DEFAULT_SECURITY_SELINUX is not set -+# CONFIG_DEFAULT_SECURITY_SMACK is not set -+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -+CONFIG_DEFAULT_SECURITY_DAC=y -+CONFIG_DEFAULT_SECURITY="" -+CONFIG_XOR_BLOCKS=m -+CONFIG_ASYNC_CORE=m -+CONFIG_ASYNC_MEMCPY=m -+CONFIG_ASYNC_XOR=m -+CONFIG_ASYNC_PQ=m -+CONFIG_ASYNC_RAID6_RECOV=m -+CONFIG_CRYPTO=y -+ -+# -+# Crypto core or helper -+# -+CONFIG_CRYPTO_FIPS=y -+CONFIG_CRYPTO_ALGAPI=y -+CONFIG_CRYPTO_ALGAPI2=y -+CONFIG_CRYPTO_AEAD=m -+CONFIG_CRYPTO_AEAD2=y -+CONFIG_CRYPTO_BLKCIPHER=y -+CONFIG_CRYPTO_BLKCIPHER2=y -+CONFIG_CRYPTO_HASH=y -+CONFIG_CRYPTO_HASH2=y -+CONFIG_CRYPTO_RNG=m -+CONFIG_CRYPTO_RNG2=y -+CONFIG_CRYPTO_PCOMP=y -+CONFIG_CRYPTO_MANAGER=y -+CONFIG_CRYPTO_MANAGER2=y -+CONFIG_CRYPTO_GF128MUL=m -+CONFIG_CRYPTO_NULL=m -+CONFIG_CRYPTO_WORKQUEUE=y -+CONFIG_CRYPTO_CRYPTD=m -+CONFIG_CRYPTO_AUTHENC=m -+CONFIG_CRYPTO_TEST=m -+ -+# -+# Authenticated Encryption with Associated Data -+# -+CONFIG_CRYPTO_CCM=m -+CONFIG_CRYPTO_GCM=m -+CONFIG_CRYPTO_SEQIV=m -+ -+# -+# Block modes -+# -+CONFIG_CRYPTO_CBC=y -+CONFIG_CRYPTO_CTR=m -+CONFIG_CRYPTO_CTS=m -+CONFIG_CRYPTO_ECB=y -+CONFIG_CRYPTO_LRW=m -+CONFIG_CRYPTO_PCBC=m -+CONFIG_CRYPTO_XTS=m -+ -+# -+# Hash modes -+# -+CONFIG_CRYPTO_HMAC=m -+CONFIG_CRYPTO_XCBC=m -+# CONFIG_CRYPTO_VMAC is not set -+ -+# -+# Digest -+# -+CONFIG_CRYPTO_CRC32C=y -+CONFIG_CRYPTO_GHASH=m -+CONFIG_CRYPTO_MD4=m -+CONFIG_CRYPTO_MD5=y -+CONFIG_CRYPTO_MICHAEL_MIC=y -+CONFIG_CRYPTO_RMD128=m -+CONFIG_CRYPTO_RMD160=m -+CONFIG_CRYPTO_RMD256=m -+CONFIG_CRYPTO_RMD320=m -+CONFIG_CRYPTO_SHA1=m -+CONFIG_CRYPTO_SHA256=m -+CONFIG_CRYPTO_SHA512=m -+CONFIG_CRYPTO_TGR192=m -+CONFIG_CRYPTO_WP512=m -+ -+# -+# Ciphers -+# -+CONFIG_CRYPTO_AES=y -+CONFIG_CRYPTO_ANUBIS=m -+CONFIG_CRYPTO_ARC4=y -+CONFIG_CRYPTO_BLOWFISH=m -+CONFIG_CRYPTO_CAMELLIA=m -+CONFIG_CRYPTO_CAST5=m -+CONFIG_CRYPTO_CAST6=m -+CONFIG_CRYPTO_DES=y -+CONFIG_CRYPTO_FCRYPT=m -+CONFIG_CRYPTO_KHAZAD=m -+CONFIG_CRYPTO_SALSA20=m -+CONFIG_CRYPTO_SEED=m -+CONFIG_CRYPTO_SERPENT=m -+CONFIG_CRYPTO_TEA=m -+CONFIG_CRYPTO_TWOFISH=m -+CONFIG_CRYPTO_TWOFISH_COMMON=m -+ -+# -+# Compression -+# -+CONFIG_CRYPTO_DEFLATE=y -+# CONFIG_CRYPTO_ZLIB is not set -+CONFIG_CRYPTO_LZO=y -+ -+# -+# Random Number Generation -+# -+CONFIG_CRYPTO_ANSI_CPRNG=m -+CONFIG_CRYPTO_HW=y -+CONFIG_BINARY_PRINTF=y -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+CONFIG_GENERIC_FIND_LAST_BIT=y -+CONFIG_CRC_CCITT=y -+CONFIG_CRC16=y -+CONFIG_CRC_T10DIF=y -+CONFIG_CRC_ITU_T=y -+CONFIG_CRC32=y -+CONFIG_CRC7=y -+CONFIG_LIBCRC32C=y -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_LZO_COMPRESS=y -+CONFIG_LZO_DECOMPRESS=y -+CONFIG_DECOMPRESS_GZIP=y -+CONFIG_TEXTSEARCH=y -+CONFIG_TEXTSEARCH_KMP=m -+CONFIG_TEXTSEARCH_BM=m -+CONFIG_TEXTSEARCH_FSM=m -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -+CONFIG_NLATTR=y --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0006-omap3beagle-camera-Add-support-for-regulators.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0006-omap3beagle-camera-Add-support-for-regulators.patch deleted file mode 100644 index 1af4619..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0006-omap3beagle-camera-Add-support-for-regulators.patch +++ /dev/null @@ -1,238 +0,0 @@ -From a8bad5bfa652d2e35575f864da6192d41c85c818 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 11 Jun 2010 16:50:39 -0500 -Subject: [PATCH 06/75] omap3beagle: camera: Add support for regulators - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 92 +++++++++++++++++++++--- - arch/arm/mach-omap2/board-omap3beagle.c | 53 ++++++++++++++ - 2 files changed, 135 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index e93437f..af8581a 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -28,8 +28,9 @@ - #include <linux/gpio.h> - #include <linux/mm.h> - #include <linux/videodev2.h> --#include <linux/i2c/twl.h> -+#include <linux/regulator/consumer.h> - #include <linux/delay.h> -+#include <linux/platform_device.h> - - #include <plat/mux.h> - #include <plat/board.h> -@@ -50,6 +51,11 @@ - - #define CAM_USE_XCLKA 1 - -+static struct regulator *beagle_mt9t111_reg1; -+static struct regulator *beagle_mt9t111_reg2; -+ -+static struct device *beaglecam_dev; -+ - #if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) - static struct isp_interface_config mt9t111_if_config = { - .ccdc_par_ser = ISP_PARLL, -@@ -157,10 +163,13 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - - switch (power) { - case V4L2_POWER_OFF: -+ case V4L2_POWER_STANDBY: - isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); -- break; - -- case V4L2_POWER_STANDBY: -+ if (regulator_is_enabled(beagle_mt9t111_reg1)) -+ regulator_disable(beagle_mt9t111_reg1); -+ if (regulator_is_enabled(beagle_mt9t111_reg2)) -+ regulator_disable(beagle_mt9t111_reg2); - break; - - case V4L2_POWER_ON: -@@ -169,6 +178,12 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) - isp_configure_interface(vdev->cam->isp, &mt9t111_if_config); - #endif -+ -+ /* turn on analog power */ -+ regulator_enable(beagle_mt9t111_reg1); -+ regulator_enable(beagle_mt9t111_reg2); -+ udelay(100); -+ - break; - - default: -@@ -196,16 +211,22 @@ static struct i2c_board_info __initdata mt9t111_i2c_board_info = { - - #endif /* #ifdef CONFIG_VIDEO_MT9T111 */ - --/** -- * @brief omap3beaglelmb_init - module init function. Should be called before any -- * client driver init call -- * -- * @return result of operation - 0 is success -- */ --int __init omap3beaglelmb_init(void) -+ -+static int beagle_cam_probe(struct platform_device *pdev) - { - int err; - -+ beagle_mt9t111_reg1 = regulator_get(beaglecam_dev, "vaux3_1"); -+ if (IS_ERR(beagle_mt9t111_reg1)) { -+ dev_err(beaglecam_dev, "vaux3_1 regulator missing\n"); -+ return PTR_ERR(beagle_mt9t111_reg1); -+ } -+ beagle_mt9t111_reg2 = regulator_get(beaglecam_dev, "vaux4_1"); -+ if (IS_ERR(beagle_mt9t111_reg2)) { -+ dev_err(beaglecam_dev, "vaux4_1 regulator missing\n"); -+ regulator_put(beagle_mt9t111_reg1); -+ return PTR_ERR(beagle_mt9t111_reg2); -+ } - /* - * Register the I2C devices present in the board to the I2C - * framework. -@@ -221,8 +242,59 @@ int __init omap3beaglelmb_init(void) - return err; - } - #endif -+ -+ beaglecam_dev = &pdev->dev; -+ - printk(KERN_INFO MODULE_NAME ": Driver registration complete \n"); - - return 0; - } -+ -+static int beagle_cam_remove(struct platform_device *pdev) -+{ -+ if (regulator_is_enabled(beagle_mt9t111_reg1)) -+ regulator_disable(beagle_mt9t111_reg1); -+ regulator_put(beagle_mt9t111_reg1); -+ if (regulator_is_enabled(beagle_mt9t111_reg2)) -+ regulator_disable(beagle_mt9t111_reg2); -+ regulator_put(beagle_mt9t111_reg2); -+ -+ return 0; -+} -+ -+static int beagle_cam_suspend(struct device *dev) -+{ -+ return 0; -+} -+ -+static int beagle_cam_resume(struct device *dev) -+{ -+ return 0; -+} -+ -+static struct dev_pm_ops beagle_cam_pm_ops = { -+ .suspend = beagle_cam_suspend, -+ .resume = beagle_cam_resume, -+}; -+ -+static struct platform_driver beagle_cam_driver = { -+ .probe = beagle_cam_probe, -+ .remove = beagle_cam_remove, -+ .driver = { -+ .name = "beagle_cam", -+ .pm = &beagle_cam_pm_ops, -+ }, -+}; -+ -+/** -+ * @brief omap3beaglelmb_init - module init function. Should be called before any -+ * client driver init call -+ * -+ * @return result of operation - 0 is success -+ */ -+int __init omap3beaglelmb_init(void) -+{ -+ platform_driver_register(&beagle_cam_driver); -+ return 0; -+} - arch_initcall(omap3beaglelmb_init); -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index d6b69a6..aa16acd 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -403,6 +403,56 @@ static struct twl4030_gpio_platform_data beagle_gpio_data = { - .setup = beagle_twl_gpio_setup, - }; - -+ -+static struct platform_device beagle_cam_device = { -+ .name = "beagle_cam", -+ .id = -1, -+}; -+ -+static struct regulator_consumer_supply beagle_vaux3_supplies[] = { -+ { -+ .supply = "vaux3_1", -+ .dev = &beagle_cam_device.dev, -+ }, -+}; -+ -+static struct regulator_consumer_supply beagle_vaux4_supplies[] = { -+ { -+ .supply = "vaux4_1", -+ .dev = &beagle_cam_device.dev, -+ }, -+}; -+ -+/* VAUX3 for CAM_1V8 */ -+static struct regulator_init_data beagle_vaux3 = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(beagle_vaux3_supplies), -+ .consumer_supplies = beagle_vaux3_supplies, -+}; -+ -+/* VAUX4 for CAM_2V8 */ -+static struct regulator_init_data beagle_vaux4 = { -+ .constraints = { -+ .min_uV = 2800000, -+ .max_uV = 2800000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = ARRAY_SIZE(beagle_vaux4_supplies), -+ .consumer_supplies = beagle_vaux4_supplies, -+}; -+ - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ - static struct regulator_init_data beagle_vmmc1 = { - .constraints = { -@@ -492,6 +542,8 @@ static struct twl4030_platform_data beagle_twldata = { - .vsim = &beagle_vsim, - .vdac = &beagle_vdac, - .vpll2 = &beagle_vpll2, -+ .vaux3 = &beagle_vaux3, -+ .vaux4 = &beagle_vaux4, - }; - - static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = { -@@ -658,6 +710,7 @@ static struct platform_device *omap3_beagle_devices[] __initdata = { - &leds_gpio, - &keys_gpio, - &beagle_dss_device, -+ &beagle_cam_device, - }; - - static void __init omap3beagle_flash_init(void) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0007-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0007-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch deleted file mode 100644 index 76140eb..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0007-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 297b25089d0a06c89101e4f6a3189419be19369f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 11 Jun 2010 16:52:25 -0500 -Subject: [PATCH 07/75] TEMP: omap3beagle: cam: Enable OMAP_MUX - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/configs/omap3_beagle_cam_defconfig | 6 ++++-- - 1 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/configs/omap3_beagle_cam_defconfig b/arch/arm/configs/omap3_beagle_cam_defconfig -index 0ea8300..bcd9418 100644 ---- a/arch/arm/configs/omap3_beagle_cam_defconfig -+++ b/arch/arm/configs/omap3_beagle_cam_defconfig -@@ -1,7 +1,7 @@ - # - # Automatically generated make config: don't edit - # Linux kernel version: 2.6.32 --# Fri Jun 11 14:25:23 2010 -+# Fri Jun 11 16:51:42 2010 - # - CONFIG_ARM=y - CONFIG_SYS_SUPPORTS_APM_EMULATION=y -@@ -240,7 +240,9 @@ CONFIG_ARCH_OMAP3=y - CONFIG_OMAP_SMARTREFLEX=y - # CONFIG_OMAP_SMARTREFLEX_TESTING is not set - CONFIG_OMAP_RESET_CLOCKS=y --# CONFIG_OMAP_MUX is not set -+CONFIG_OMAP_MUX=y -+# CONFIG_OMAP_MUX_DEBUG is not set -+CONFIG_OMAP_MUX_WARNINGS=y - CONFIG_OMAP_MCBSP=y - CONFIG_OMAP_MBOX_FWK=m - CONFIG_OMAP_IOMMU=y --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0008-omap3beagle-camera-Fix-null-pointer-dereference.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0008-omap3beagle-camera-Fix-null-pointer-dereference.patch deleted file mode 100644 index ecc8396..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0008-omap3beagle-camera-Fix-null-pointer-dereference.patch +++ /dev/null @@ -1,54 +0,0 @@ -From c46eeb468f9bb69ca4c82abd1ff07e0f35aaa50f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 11 Jun 2010 17:53:50 -0500 -Subject: [PATCH 08/75] omap3beagle: camera: Fix null pointer dereference - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 12 ++++-------- - 1 files changed, 4 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index af8581a..20174a7 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -54,8 +54,6 @@ - static struct regulator *beagle_mt9t111_reg1; - static struct regulator *beagle_mt9t111_reg2; - --static struct device *beaglecam_dev; -- - #if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) - static struct isp_interface_config mt9t111_if_config = { - .ccdc_par_ser = ISP_PARLL, -@@ -216,14 +214,14 @@ static int beagle_cam_probe(struct platform_device *pdev) - { - int err; - -- beagle_mt9t111_reg1 = regulator_get(beaglecam_dev, "vaux3_1"); -+ beagle_mt9t111_reg1 = regulator_get(&pdev->dev, "vaux3_1"); - if (IS_ERR(beagle_mt9t111_reg1)) { -- dev_err(beaglecam_dev, "vaux3_1 regulator missing\n"); -+ dev_err(&pdev->dev, "vaux3_1 regulator missing\n"); - return PTR_ERR(beagle_mt9t111_reg1); - } -- beagle_mt9t111_reg2 = regulator_get(beaglecam_dev, "vaux4_1"); -+ beagle_mt9t111_reg2 = regulator_get(&pdev->dev, "vaux4_1"); - if (IS_ERR(beagle_mt9t111_reg2)) { -- dev_err(beaglecam_dev, "vaux4_1 regulator missing\n"); -+ dev_err(&pdev->dev, "vaux4_1 regulator missing\n"); - regulator_put(beagle_mt9t111_reg1); - return PTR_ERR(beagle_mt9t111_reg2); - } -@@ -243,8 +241,6 @@ static int beagle_cam_probe(struct platform_device *pdev) - } - #endif - -- beaglecam_dev = &pdev->dev; -- - printk(KERN_INFO MODULE_NAME ": Driver registration complete \n"); - - return 0; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0009-Revert-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0009-Revert-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch deleted file mode 100644 index cfcd236..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0009-Revert-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 4dc4c88bdb1f4be3de42f1cf5e8d5d62b6a2a04e Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Wed, 16 Jun 2010 03:23:57 +0300 -Subject: [PATCH 09/75] Revert "TEMP: omap3beagle: cam: Enable OMAP_MUX" - -This reverts commit 7d5f49845f06feadb9bc97d458d1ce03814ff5f4. - -Reason? - -Kernel panic on MMC partition mount, so probably muxing is broken -somewhere. ---- - arch/arm/configs/omap3_beagle_cam_defconfig | 6 ++---- - 1 files changed, 2 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/configs/omap3_beagle_cam_defconfig b/arch/arm/configs/omap3_beagle_cam_defconfig -index bcd9418..0ea8300 100644 ---- a/arch/arm/configs/omap3_beagle_cam_defconfig -+++ b/arch/arm/configs/omap3_beagle_cam_defconfig -@@ -1,7 +1,7 @@ - # - # Automatically generated make config: don't edit - # Linux kernel version: 2.6.32 --# Fri Jun 11 16:51:42 2010 -+# Fri Jun 11 14:25:23 2010 - # - CONFIG_ARM=y - CONFIG_SYS_SUPPORTS_APM_EMULATION=y -@@ -240,9 +240,7 @@ CONFIG_ARCH_OMAP3=y - CONFIG_OMAP_SMARTREFLEX=y - # CONFIG_OMAP_SMARTREFLEX_TESTING is not set - CONFIG_OMAP_RESET_CLOCKS=y --CONFIG_OMAP_MUX=y --# CONFIG_OMAP_MUX_DEBUG is not set --CONFIG_OMAP_MUX_WARNINGS=y -+# CONFIG_OMAP_MUX is not set - CONFIG_OMAP_MCBSP=y - CONFIG_OMAP_MBOX_FWK=m - CONFIG_OMAP_IOMMU=y --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0010-omap3beagle-camera-Change-arch-late_initcall.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0010-omap3beagle-camera-Change-arch-late_initcall.patch deleted file mode 100644 index c9f2340..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0010-omap3beagle-camera-Change-arch-late_initcall.patch +++ /dev/null @@ -1,25 +0,0 @@ -From e998edf3c99b4f8a16519a2dc968b1841a274b7f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Wed, 16 Jun 2010 04:28:06 +0300 -Subject: [PATCH 10/75] omap3beagle: camera: Change arch -> late_initcall - -This is for ensuring that the regulators are initialized already. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 20174a7..55a113c 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -293,4 +293,4 @@ int __init omap3beaglelmb_init(void) - platform_driver_register(&beagle_cam_driver); - return 0; - } --arch_initcall(omap3beaglelmb_init); -+late_initcall(omap3beaglelmb_init); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0011-omap3beagle-camera-Move-i2c-registration-to-the-main.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0011-omap3beagle-camera-Move-i2c-registration-to-the-main.patch deleted file mode 100644 index 15e647e..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0011-omap3beagle-camera-Move-i2c-registration-to-the-main.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 17c85e1bf42b03f4e764280b8a626853506517e6 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Wed, 16 Jun 2010 04:58:46 +0300 -Subject: [PATCH 11/75] omap3beagle: camera: Move i2c registration to the main board - -This is because the board-omap3beagle-camera.c file now is -late_initcall, and the i2c bus registration needed to be before -i2c host init. - -So, in order to have the i2c init, meanwhile having late_initcall, -this is so far the best solution. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 24 +----------------------- - arch/arm/mach-omap2/board-omap3beagle.c | 12 +++++++++++- - 2 files changed, 12 insertions(+), 24 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 55a113c..1652f15 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -47,8 +47,6 @@ - - #define MODULE_NAME "omap3beaglelmb" - --#define MT9T111_I2C_BUSNUM (2) -- - #define CAM_USE_XCLKA 1 - - static struct regulator *beagle_mt9t111_reg1; -@@ -191,7 +189,7 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - return 0; - } - --static struct mt9t111_platform_data mt9t111_pdata = { -+struct mt9t111_platform_data mt9t111_pdata = { - .master = "omap34xxcam", - .power_set = mt9t111_power_set, - .priv_data_set = mt9t111_set_prv_data, -@@ -202,11 +200,6 @@ static struct mt9t111_platform_data mt9t111_pdata = { - .vs_polarity = 1, /* 0 - Active low, 1- Active high */ - }; - --static struct i2c_board_info __initdata mt9t111_i2c_board_info = { -- I2C_BOARD_INFO("mt9t111", MT9T111_I2C_ADDR), -- .platform_data = &mt9t111_pdata, --}; -- - #endif /* #ifdef CONFIG_VIDEO_MT9T111 */ - - -@@ -225,21 +218,6 @@ static int beagle_cam_probe(struct platform_device *pdev) - regulator_put(beagle_mt9t111_reg1); - return PTR_ERR(beagle_mt9t111_reg2); - } -- /* -- * Register the I2C devices present in the board to the I2C -- * framework. -- * If more I2C devices are added, then each device information should -- * be registered with I2C using i2c_register_board_info(). -- */ --#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -- err = i2c_register_board_info(MT9T111_I2C_BUSNUM, -- &mt9t111_i2c_board_info, 1); -- if (err) { -- printk(KERN_ERR MODULE_NAME \ -- ": MT9T111 I2C Board Registration failed \n"); -- return err; -- } --#endif - - printk(KERN_INFO MODULE_NAME ": Driver registration complete \n"); - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index aa16acd..757d430 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -71,6 +71,11 @@ static struct omap_opp * _omap35x_l3_rate_table = NULL; - static struct omap_opp * _omap37x_l3_rate_table = NULL; - #endif /* CONFIG_PM */ - -+#ifdef CONFIG_VIDEO_MT9T111 -+#include <media/v4l2-int-device.h> -+#include <media/mt9t111.h> -+extern struct mt9t111_platform_data mt9t111_pdata; -+#endif - - #define GPMC_CS0_BASE 0x60 - #define GPMC_CS_SIZE 0x30 -@@ -588,7 +593,12 @@ static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = { - static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {}; - #endif - --static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {}; -+static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { -+ { -+ I2C_BOARD_INFO("mt9t111", MT9T111_I2C_ADDR), -+ .platform_data = &mt9t111_pdata, -+ }, -+}; - - static int __init omap3_beagle_i2c_init(void) - { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0012-ARM-OMAP3-make-camera-code-build-if-MT9T111-is-built.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0012-ARM-OMAP3-make-camera-code-build-if-MT9T111-is-built.patch deleted file mode 100644 index 7edb156..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0012-ARM-OMAP3-make-camera-code-build-if-MT9T111-is-built.patch +++ /dev/null @@ -1,38 +0,0 @@ -From a36ff286ba2355488bd093f001a722d888cf9a8b Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Wed, 16 Jun 2010 09:45:46 +0200 -Subject: [PATCH 12/75] ARM: OMAP3: make camera code build if MT9T111 is built as module or disabled - ---- - arch/arm/mach-omap2/board-omap3beagle.c | 4 +++- - 1 files changed, 3 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 757d430..1e9a868 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -71,7 +71,7 @@ static struct omap_opp * _omap35x_l3_rate_table = NULL; - static struct omap_opp * _omap37x_l3_rate_table = NULL; - #endif /* CONFIG_PM */ - --#ifdef CONFIG_VIDEO_MT9T111 -+#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) - #include <media/v4l2-int-device.h> - #include <media/mt9t111.h> - extern struct mt9t111_platform_data mt9t111_pdata; -@@ -594,10 +594,12 @@ static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {}; - #endif - - static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { -+#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) - { - I2C_BOARD_INFO("mt9t111", MT9T111_I2C_ADDR), - .platform_data = &mt9t111_pdata, - }, -+#endif - }; - - static int __init omap3_beagle_i2c_init(void) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0013-DEBUG-omap3beagle-camera-Force-mode0-in-cam_xclka.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0013-DEBUG-omap3beagle-camera-Force-mode0-in-cam_xclka.patch deleted file mode 100644 index fceb5ed..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0013-DEBUG-omap3beagle-camera-Force-mode0-in-cam_xclka.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 7c09434499a8daa650b934a62d3f651f868e0e70 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Wed, 23 Jun 2010 15:03:24 -0500 -Subject: [PATCH 13/75] DEBUG: omap3beagle: camera: Force mode0 in cam_xclka - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 1652f15..77f9469 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -34,6 +34,7 @@ - - #include <plat/mux.h> - #include <plat/board.h> -+#include <plat/control.h> - - #include <media/v4l2-int-device.h> - #include <media/mt9t111.h> -@@ -160,6 +161,7 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - switch (power) { - case V4L2_POWER_OFF: - case V4L2_POWER_STANDBY: -+ omap_ctrl_writew(0x0, 0x110); /* Control XCLKA output mux */ - isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); - - if (regulator_is_enabled(beagle_mt9t111_reg1)) -@@ -169,6 +171,7 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - break; - - case V4L2_POWER_ON: -+ omap_ctrl_writew(0x0, 0x110); /* Control XCLKA output mux */ - isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA); - - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0014-OMAP3-CLOCK-Add-capability-to-change-rate-of-dpll4_m.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0014-OMAP3-CLOCK-Add-capability-to-change-rate-of-dpll4_m.patch deleted file mode 100644 index 0b4df88..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0014-OMAP3-CLOCK-Add-capability-to-change-rate-of-dpll4_m.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 2841aa647058815680fe3ef969e7fda5e821016f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 4 Feb 2010 18:12:37 -0600 -Subject: [PATCH 14/75] OMAP3: CLOCK: Add capability to change rate of dpll4_m5_ck_3630 - -Add necessary clk_sel definitions to clock framework to allow changing -dpll4_m5_ck_3630 rate. - -Based on patch by Tuukka Toivonen <tuukka.o.toivonen@nokia.com> with subject: - - OMAP3: CLOCK: Add capability to change rate of dpll4_m5_ck - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/clock34xx_data.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c -index 89e2f61..8d101ef 100644 ---- a/arch/arm/mach-omap2/clock34xx_data.c -+++ b/arch/arm/mach-omap2/clock34xx_data.c -@@ -934,6 +934,8 @@ static struct clk dpll4_m5_ck_3630 __initdata = { - .clksel = div32_dpll4_clksel, - .clkdm_name = "dpll4_clkdm", - .recalc = &omap2_clksel_recalc, -+ .set_rate = &omap2_clksel_set_rate, -+ .round_rate = &omap2_clksel_round_rate, - }; - - /* The PWRDN bit is apparently only available on 3430ES2 and above */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0015-Revert-DEBUG-omap3beagle-camera-Force-mode0-in-cam_x.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0015-Revert-DEBUG-omap3beagle-camera-Force-mode0-in-cam_x.patch deleted file mode 100644 index 090043b..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0015-Revert-DEBUG-omap3beagle-camera-Force-mode0-in-cam_x.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 1ae58f6d2ec41a1b7d0cdeca4de4b9d9760195bf Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 24 Jun 2010 14:27:39 -0500 -Subject: [PATCH 15/75] Revert "DEBUG: omap3beagle: camera: Force mode0 in cam_xclka" - -This reverts commit 158e14b3d449dde2c6aa9f8cddb86fbbee2d2cd7. ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 3 --- - 1 files changed, 0 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 77f9469..1652f15 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -34,7 +34,6 @@ - - #include <plat/mux.h> - #include <plat/board.h> --#include <plat/control.h> - - #include <media/v4l2-int-device.h> - #include <media/mt9t111.h> -@@ -161,7 +160,6 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - switch (power) { - case V4L2_POWER_OFF: - case V4L2_POWER_STANDBY: -- omap_ctrl_writew(0x0, 0x110); /* Control XCLKA output mux */ - isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); - - if (regulator_is_enabled(beagle_mt9t111_reg1)) -@@ -171,7 +169,6 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - break; - - case V4L2_POWER_ON: -- omap_ctrl_writew(0x0, 0x110); /* Control XCLKA output mux */ - isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA); - - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0016-omap3beagle-camera-Fix-wrong-XCLKA-selection.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0016-omap3beagle-camera-Fix-wrong-XCLKA-selection.patch deleted file mode 100644 index 68dd1b5..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0016-omap3beagle-camera-Fix-wrong-XCLKA-selection.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 00bfc925651aa2c35a1726f15c028ef106f350ab Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 24 Jun 2010 17:31:49 -0500 -Subject: [PATCH 16/75] omap3beagle: camera: Fix wrong XCLKA selection - -The CAM_USE_XCLKA should have been 0 instead of 1. - -Otherwise it was activating XCLKB instead! - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 1652f15..75c8345 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -47,7 +47,7 @@ - - #define MODULE_NAME "omap3beaglelmb" - --#define CAM_USE_XCLKA 1 -+#define CAM_USE_XCLKA 0 - - static struct regulator *beagle_mt9t111_reg1; - static struct regulator *beagle_mt9t111_reg2; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0017-omap3isp-set-CAM_MCLK-to-172.8-MHz-allows-exact-9.6-.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0017-omap3isp-set-CAM_MCLK-to-172.8-MHz-allows-exact-9.6-.patch deleted file mode 100644 index 78f7296..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0017-omap3isp-set-CAM_MCLK-to-172.8-MHz-allows-exact-9.6-.patch +++ /dev/null @@ -1,91 +0,0 @@ -From fc6044176be3518fee98430ebe36cc144d6feed2 Mon Sep 17 00:00:00 2001 -From: Tuukka Toivonen <tuukka.o.toivonen@nokia.com> -Date: Thu, 2 Jul 2009 16:17:55 +0200 -Subject: [PATCH 17/75] omap3isp: set CAM_MCLK to 172.8 MHz, allows exact 9.6 MHz for camera xclka/b - -Camera cam_xclka and cam_xclkb clocks are generated by dividing -CAM_MCLK with an integer. We want to use 9.6 MHz for cameras, -so CAM_MCLK should be multiple of it. Otherwise the generated -frequency is slightly off due to rounding. - -Signed-off-by: Tuukka Toivonen <tuukka.o.toivonen@nokia.com> ---- - drivers/media/video/isp/isp.c | 14 ++++++++++++++ - drivers/media/video/isp/isp.h | 1 + - drivers/media/video/isp/ispreg.h | 2 +- - 3 files changed, 16 insertions(+), 1 deletions(-) - -diff --git a/drivers/media/video/isp/isp.c b/drivers/media/video/isp/isp.c -index ceed870..9d46c01 100644 ---- a/drivers/media/video/isp/isp.c -+++ b/drivers/media/video/isp/isp.c -@@ -2333,6 +2333,11 @@ static int isp_enable_clocks(struct device *dev) - dev_err(dev, "clk_enable cam_ick failed\n"); - goto out_clk_enable_ick; - } -+ r = clk_set_rate(isp->dpll4_m5_ck, CM_CAM_MCLK_HZ/2); -+ if (r) { -+ dev_err(dev, "clk_set_rate for dpll4_m5_ck failed\n"); -+ goto out_clk_enable_mclk; -+ } - r = clk_enable(isp->cam_mclk); - if (r) { - dev_err(dev, "clk_enable cam_mclk failed\n"); -@@ -2499,6 +2504,7 @@ static int isp_remove(struct platform_device *pdev) - - clk_put(isp->cam_ick); - clk_put(isp->cam_mclk); -+ clk_put(isp->dpll4_m5_ck); - clk_put(isp->csi2_fck); - clk_put(isp->l3_ick); - -@@ -2674,6 +2680,12 @@ static int isp_probe(struct platform_device *pdev) - ret_err = PTR_ERR(isp->cam_mclk); - goto out_clk_get_mclk; - } -+ isp->dpll4_m5_ck = clk_get(&camera_dev, "dpll4_m5_ck"); -+ if (IS_ERR(isp->dpll4_m5_ck)) { -+ dev_err(isp->dev, "clk_get dpll4_m5_ck failed\n"); -+ ret_err = PTR_ERR(isp->dpll4_m5_ck); -+ goto out_clk_get_dpll4_m5_ck; -+ } - isp->csi2_fck = clk_get(&camera_dev, "csi2_96m_fck"); - if (IS_ERR(isp->csi2_fck)) { - dev_err(isp->dev, "clk_get csi2_96m_fck failed\n"); -@@ -2734,6 +2746,8 @@ out_request_irq: - out_clk_get_l3_ick: - clk_put(isp->csi2_fck); - out_clk_get_csi2_fclk: -+ clk_put(isp->dpll4_m5_ck); -+out_clk_get_dpll4_m5_ck: - clk_put(isp->cam_mclk); - out_clk_get_mclk: - clk_put(isp->cam_ick); -diff --git a/drivers/media/video/isp/isp.h b/drivers/media/video/isp/isp.h -index dc85d61..6b100b6 100644 ---- a/drivers/media/video/isp/isp.h -+++ b/drivers/media/video/isp/isp.h -@@ -414,6 +414,7 @@ struct isp_device { - int ref_count; - struct clk *cam_ick; - struct clk *cam_mclk; -+ struct clk *dpll4_m5_ck; - struct clk *csi2_fck; - struct clk *l3_ick; - struct isp_interface_config *config; -diff --git a/drivers/media/video/isp/ispreg.h b/drivers/media/video/isp/ispreg.h -index 676a33d..1240e0e 100644 ---- a/drivers/media/video/isp/ispreg.h -+++ b/drivers/media/video/isp/ispreg.h -@@ -116,7 +116,7 @@ - #define ISP_32B_BOUNDARY_BUF 0xFFFFFFE0 - #define ISP_32B_BOUNDARY_OFFSET 0x0000FFE0 - --#define CM_CAM_MCLK_HZ 216000000 -+#define CM_CAM_MCLK_HZ 172800000 /* Hz */ - - /* ISP Submodules offset */ - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0018-Fix-Moved-MCLK-setting-to-the-board-file.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0018-Fix-Moved-MCLK-setting-to-the-board-file.patch deleted file mode 100644 index a47ee19..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0018-Fix-Moved-MCLK-setting-to-the-board-file.patch +++ /dev/null @@ -1,209 +0,0 @@ -From 6e9a8ed420020b5692b511b3e8a7c2c1325e1ca2 Mon Sep 17 00:00:00 2001 -From: Penda, Naveen <pnaveen@ti.com> -Date: Thu, 22 Oct 2009 06:07:01 +0530 -Subject: [PATCH 18/75] Fix: Moved MCLK setting to the board file - -This patch provides the flexibility to set the MCLK frequency - from the board file - -Signed-off-by: Naveen Penda <pnaveen@ti.com> -Signed-off-by: Curran, Dominic <dcurran@ti.com> ---- - arch/arm/mach-omap2/board-zoom2-camera.c | 10 ++++++ - drivers/media/video/isp/isp.c | 51 +++++++++++++++++++---------- - drivers/media/video/isp/isp.h | 6 +++ - 3 files changed, 49 insertions(+), 18 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-zoom2-camera.c b/arch/arm/mach-omap2/board-zoom2-camera.c -index 1ba2982..8c035c4 100644 ---- a/arch/arm/mach-omap2/board-zoom2-camera.c -+++ b/arch/arm/mach-omap2/board-zoom2-camera.c -@@ -41,6 +41,8 @@ static struct device *zoom2cam_dev; - - #define CAMZOOM2_USE_XCLKB 1 - -+#define ISP_IMX046_MCLK 216000000 -+ - /* Sensor specific GPIO signals */ - #define IMX046_RESET_GPIO 98 - #define IMX046_STANDBY_GPIO 58 -@@ -148,6 +150,7 @@ static struct isp_interface_config imx046_if_config = { - .shutter = 0x0, - .wenlog = ISPCCDC_CFG_WENLOG_AND, - .wait_hs_vs = 2, -+ .cam_mclk = ISP_IMX046_MCLK, - .u.csi.crc = 0x0, - .u.csi.mode = 0x0, - .u.csi.edge = 0x0, -@@ -264,6 +267,8 @@ static int imx046_sensor_power_set(struct v4l2_int_device *s, enum v4l2_power po - #ifdef CONFIG_OMAP_PM_SRF - omap_pm_set_min_bus_tput(vdev->cam->isp, OCP_INITIATOR_AGENT, 0); - #endif -+ if (previous_power != V4L2_POWER_OFF) -+ isp_disable_mclk(isp); - break; - case V4L2_POWER_STANDBY: - printk(KERN_DEBUG "imx046_sensor_power_set(STANDBY)\n"); -@@ -272,9 +277,14 @@ static int imx046_sensor_power_set(struct v4l2_int_device *s, enum v4l2_power po - #ifdef CONFIG_OMAP_PM_SRF - omap_pm_set_min_bus_tput(vdev->cam->isp, OCP_INITIATOR_AGENT, 0); - #endif -+ -+ -+ isp_disable_mclk(isp); -+ - break; - } - -+ - /* Save powerstate to know what was before calling POWER_ON. */ - previous_power = power; - return err; -diff --git a/drivers/media/video/isp/isp.c b/drivers/media/video/isp/isp.c -index 9d46c01..cf68720 100644 ---- a/drivers/media/video/isp/isp.c -+++ b/drivers/media/video/isp/isp.c -@@ -552,7 +552,7 @@ EXPORT_SYMBOL(isp_unset_callback); - * Configures the specified MCLK divisor in the ISP timing control register - * (TCTRL_CTRL) to generate the desired xclk clock value. - * -- * Divisor = CM_CAM_MCLK_HZ / xclk -+ * Divisor = mclk / xclk - * - * Returns the final frequency that is actually being generated - **/ -@@ -560,15 +560,16 @@ u32 isp_set_xclk(struct device *dev, u32 xclk, u8 xclksel) - { - u32 divisor; - u32 currentxclk; -+ struct isp_device *isp = dev_get_drvdata(dev); - -- if (xclk >= CM_CAM_MCLK_HZ) { -+ if (xclk >= isp->mclk) { - divisor = ISPTCTRL_CTRL_DIV_BYPASS; -- currentxclk = CM_CAM_MCLK_HZ; -+ currentxclk = isp->mclk; - } else if (xclk >= 2) { -- divisor = CM_CAM_MCLK_HZ / xclk; -+ divisor = isp->mclk / xclk; - if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS) - divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1; -- currentxclk = CM_CAM_MCLK_HZ / divisor; -+ currentxclk = isp->mclk / divisor; - } else { - divisor = xclk; - currentxclk = 0; -@@ -874,6 +875,8 @@ int isp_configure_interface(struct device *dev, - /* Set sensor specific fields in CCDC and Previewer module. */ - ispccdc_set_wenlog(&isp->isp_ccdc, config->wenlog); - -+ isp->mclk = config->cam_mclk; -+ isp_enable_mclk(dev); - /* FIXME: this should be set in ispccdc_config_vp() */ - fmtcfg = isp_reg_readl(dev, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG); - fmtcfg &= ISPCCDC_FMTCFG_VPIF_FRQ_MASK; -@@ -2333,16 +2336,6 @@ static int isp_enable_clocks(struct device *dev) - dev_err(dev, "clk_enable cam_ick failed\n"); - goto out_clk_enable_ick; - } -- r = clk_set_rate(isp->dpll4_m5_ck, CM_CAM_MCLK_HZ/2); -- if (r) { -- dev_err(dev, "clk_set_rate for dpll4_m5_ck failed\n"); -- goto out_clk_enable_mclk; -- } -- r = clk_enable(isp->cam_mclk); -- if (r) { -- dev_err(dev, "clk_enable cam_mclk failed\n"); -- goto out_clk_enable_mclk; -- } - r = clk_enable(isp->csi2_fck); - if (r) { - dev_err(dev, "clk_enable csi2_fck failed\n"); -@@ -2351,13 +2344,34 @@ static int isp_enable_clocks(struct device *dev) - return 0; - - out_clk_enable_csi2_fclk: -- clk_disable(isp->cam_mclk); --out_clk_enable_mclk: - clk_disable(isp->cam_ick); - out_clk_enable_ick: - return r; - } - -+int isp_enable_mclk(struct device *dev) -+{ -+ struct isp_device *isp = dev_get_drvdata(dev); -+ int r; -+ -+ r = clk_set_rate(isp->dpll4_m5_ck, isp->mclk); -+ if (r) { -+ dev_err(dev, "clk_set_rate for dpll4_m5_ck failed\n"); -+ return r; -+ } -+ r = clk_enable(isp->cam_mclk); -+ if (r) { -+ dev_err(dev, "clk_enable cam_mclk failed\n"); -+ return r; -+ } -+ return 0; -+} -+ -+void isp_disable_mclk(struct isp_device *isp) -+{ -+ clk_disable(isp->cam_mclk); -+} -+ - /** - * isp_disable_clocks - Disable ISP clocks - * @dev: Device pointer specific to the OMAP3 ISP. -@@ -2367,7 +2381,6 @@ static void isp_disable_clocks(struct device *dev) - struct isp_device *isp = dev_get_drvdata(dev); - - clk_disable(isp->cam_ick); -- clk_disable(isp->cam_mclk); - clk_disable(isp->csi2_fck); - } - -@@ -2668,6 +2681,8 @@ static int isp_probe(struct platform_device *pdev) - goto out_free_mmio; - } - -+ isp->mclk = CM_CAM_MCLK_HZ / 2; -+ - isp->cam_ick = clk_get(&camera_dev, "cam_ick"); - if (IS_ERR(isp->cam_ick)) { - dev_err(isp->dev, "clk_get cam_ick failed\n"); -diff --git a/drivers/media/video/isp/isp.h b/drivers/media/video/isp/isp.h -index 6b100b6..85c3fa9 100644 ---- a/drivers/media/video/isp/isp.h -+++ b/drivers/media/video/isp/isp.h -@@ -199,6 +199,7 @@ struct isp_interface_config { - u32 prev_slv; - u32 wenlog; - int wait_hs_vs; -+ u32 cam_mclk; - unsigned int pixelclk; - union { - struct par { -@@ -425,6 +426,7 @@ struct isp_device { - struct isp_irq irq; - struct isp_pipeline pipeline; - u32 interrupts; -+ u32 mclk; - enum isp_running running; - int current_field; - int bt656ifen; -@@ -489,6 +491,10 @@ struct device *isp_get(void); - - int isp_put(void); - -+int isp_enable_mclk(struct device *dev); -+ -+void isp_disable_mclk(struct isp_device *dev); -+ - int isp_queryctrl(struct v4l2_queryctrl *a); - - int isp_querymenu(struct v4l2_querymenu *a); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0019-omap3isp-core-Do-smarter-MCLK-setting.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0019-omap3isp-core-Do-smarter-MCLK-setting.patch deleted file mode 100644 index 53fe621..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0019-omap3isp-core-Do-smarter-MCLK-setting.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 97761e2bdf286662e3c96f5a24fe568cac98fc9b Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Wed, 25 Nov 2009 12:30:46 -0600 -Subject: [PATCH 19/75] omap3isp: core: Do smarter MCLK setting - -Since the ratio between MCLK and DPLL4_M5 could not be 1:1 -(i.e. on 3430 its 2:1), it's necessary to check ratio -between those 2 first. - -This should make MCLK setting more adequate to different -chipsets. - -Tested on Zoom2 (3430 ES3.1) - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/isp/isp.c | 13 ++++++++++++- - 1 files changed, 12 insertions(+), 1 deletions(-) - -diff --git a/drivers/media/video/isp/isp.c b/drivers/media/video/isp/isp.c -index cf68720..29dd005 100644 ---- a/drivers/media/video/isp/isp.c -+++ b/drivers/media/video/isp/isp.c -@@ -2353,8 +2353,19 @@ int isp_enable_mclk(struct device *dev) - { - struct isp_device *isp = dev_get_drvdata(dev); - int r; -+ unsigned long curr_mclk, curr_dpll4_m5, ratio; - -- r = clk_set_rate(isp->dpll4_m5_ck, isp->mclk); -+ /* Check ratio between DPLL4_M5 and CAM_MCLK */ -+ curr_mclk = clk_get_rate(isp->cam_mclk); -+ curr_dpll4_m5 = clk_get_rate(isp->dpll4_m5_ck); -+ -+ /* Protection for potential Zero division, or zero-ratio result */ -+ if (!curr_mclk || !curr_dpll4_m5) -+ BUG(); -+ -+ ratio = curr_mclk / curr_dpll4_m5; -+ -+ r = clk_set_rate(isp->dpll4_m5_ck, isp->mclk / ratio); - if (r) { - dev_err(dev, "clk_set_rate for dpll4_m5_ck failed\n"); - return r; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0020-omap3beagle-camera-set-mclk-for-mt9t111.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0020-omap3beagle-camera-set-mclk-for-mt9t111.patch deleted file mode 100644 index 97423f9..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0020-omap3beagle-camera-set-mclk-for-mt9t111.patch +++ /dev/null @@ -1,36 +0,0 @@ -From b744cbb89e3dd00a3f12d349ec0be604dffb5776 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 24 Jun 2010 16:34:13 -0500 -Subject: [PATCH 20/75] omap3beagle: camera: set mclk for mt9t111 - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 75c8345..529a6be 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -49,6 +49,8 @@ - - #define CAM_USE_XCLKA 0 - -+#define ISP_MT9T111_MCLK 216000000 -+ - static struct regulator *beagle_mt9t111_reg1; - static struct regulator *beagle_mt9t111_reg2; - -@@ -60,6 +62,9 @@ static struct isp_interface_config mt9t111_if_config = { - .strobe = 0x0, - .prestrobe = 0x0, - .shutter = 0x0, -+ .cam_mclk = ISP_MT9T111_MCLK, -+ .wenlog = ISPCCDC_CFG_WENLOG_AND, -+ .wait_hs_vs = 2, - .u.par.par_bridge = 0x1, - .u.par.par_clk_pol = 0x0, - }; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0021-mt9t111-Fix-max-supported-xclk.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0021-mt9t111-Fix-max-supported-xclk.patch deleted file mode 100644 index 731f20e..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0021-mt9t111-Fix-max-supported-xclk.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 3bca76ae1008ba2b2788214a59fd7813c69f9254 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 24 Jun 2010 17:43:23 -0500 -Subject: [PATCH 21/75] mt9t111: Fix max supported xclk - -According to Aptina documentation, the max should be 54 MHz, not 75 MHz. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - include/media/mt9t111.h | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/include/media/mt9t111.h b/include/media/mt9t111.h -index aae3f99..cd34885 100644 ---- a/include/media/mt9t111.h -+++ b/include/media/mt9t111.h -@@ -42,7 +42,7 @@ - /*i2c adress for MT9T111*/ - #define MT9T111_I2C_ADDR (0x78 >> 1) - --#define MT9T111_CLK_MAX (75000000) /* 75MHz */ -+#define MT9T111_CLK_MAX (54000000) /* 54MHz */ - #define MT9T111_CLK_MIN (6000000) /* 6Mhz */ - - #define MT9T111_I2C_CONFIG (1) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0022-omap3beagle-camera-Clarify-regulators-names.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0022-omap3beagle-camera-Clarify-regulators-names.patch deleted file mode 100644 index 8dcb76b..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0022-omap3beagle-camera-Clarify-regulators-names.patch +++ /dev/null @@ -1,103 +0,0 @@ -From db7e3a7af04196e80fe15e2a651440575f9313af Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 24 Jun 2010 17:53:55 -0500 -Subject: [PATCH 22/75] omap3beagle: camera: Clarify regulators names - -Changed: - - beagle_mt9t111_reg1 -> beagle_mt9t111_1_8v - - beagle_mt9t111_reg2 -> beagle_mt9t111_2_8v - -To help clarify sequence. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 42 ++++++++++++------------ - 1 files changed, 21 insertions(+), 21 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 529a6be..6babaf3 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -51,8 +51,8 @@ - - #define ISP_MT9T111_MCLK 216000000 - --static struct regulator *beagle_mt9t111_reg1; --static struct regulator *beagle_mt9t111_reg2; -+static struct regulator *beagle_mt9t111_1_8v; -+static struct regulator *beagle_mt9t111_2_8v; - - #if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) - static struct isp_interface_config mt9t111_if_config = { -@@ -167,10 +167,10 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - case V4L2_POWER_STANDBY: - isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); - -- if (regulator_is_enabled(beagle_mt9t111_reg1)) -- regulator_disable(beagle_mt9t111_reg1); -- if (regulator_is_enabled(beagle_mt9t111_reg2)) -- regulator_disable(beagle_mt9t111_reg2); -+ if (regulator_is_enabled(beagle_mt9t111_1_8v)) -+ regulator_disable(beagle_mt9t111_1_8v); -+ if (regulator_is_enabled(beagle_mt9t111_2_8v)) -+ regulator_disable(beagle_mt9t111_2_8v); - break; - - case V4L2_POWER_ON: -@@ -181,8 +181,8 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - #endif - - /* turn on analog power */ -- regulator_enable(beagle_mt9t111_reg1); -- regulator_enable(beagle_mt9t111_reg2); -+ regulator_enable(beagle_mt9t111_1_8v); -+ regulator_enable(beagle_mt9t111_2_8v); - udelay(100); - - break; -@@ -212,16 +212,16 @@ static int beagle_cam_probe(struct platform_device *pdev) - { - int err; - -- beagle_mt9t111_reg1 = regulator_get(&pdev->dev, "vaux3_1"); -- if (IS_ERR(beagle_mt9t111_reg1)) { -+ beagle_mt9t111_1_8v = regulator_get(&pdev->dev, "vaux3_1"); -+ if (IS_ERR(beagle_mt9t111_1_8v)) { - dev_err(&pdev->dev, "vaux3_1 regulator missing\n"); -- return PTR_ERR(beagle_mt9t111_reg1); -+ return PTR_ERR(beagle_mt9t111_1_8v); - } -- beagle_mt9t111_reg2 = regulator_get(&pdev->dev, "vaux4_1"); -- if (IS_ERR(beagle_mt9t111_reg2)) { -+ beagle_mt9t111_2_8v = regulator_get(&pdev->dev, "vaux4_1"); -+ if (IS_ERR(beagle_mt9t111_2_8v)) { - dev_err(&pdev->dev, "vaux4_1 regulator missing\n"); -- regulator_put(beagle_mt9t111_reg1); -- return PTR_ERR(beagle_mt9t111_reg2); -+ regulator_put(beagle_mt9t111_1_8v); -+ return PTR_ERR(beagle_mt9t111_2_8v); - } - - printk(KERN_INFO MODULE_NAME ": Driver registration complete \n"); -@@ -231,12 +231,12 @@ static int beagle_cam_probe(struct platform_device *pdev) - - static int beagle_cam_remove(struct platform_device *pdev) - { -- if (regulator_is_enabled(beagle_mt9t111_reg1)) -- regulator_disable(beagle_mt9t111_reg1); -- regulator_put(beagle_mt9t111_reg1); -- if (regulator_is_enabled(beagle_mt9t111_reg2)) -- regulator_disable(beagle_mt9t111_reg2); -- regulator_put(beagle_mt9t111_reg2); -+ if (regulator_is_enabled(beagle_mt9t111_1_8v)) -+ regulator_disable(beagle_mt9t111_1_8v); -+ regulator_put(beagle_mt9t111_1_8v); -+ if (regulator_is_enabled(beagle_mt9t111_2_8v)) -+ regulator_disable(beagle_mt9t111_2_8v); -+ regulator_put(beagle_mt9t111_2_8v); - - return 0; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0023-omap3beagle-camera-Fix-powerup-sequence.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0023-omap3beagle-camera-Fix-powerup-sequence.patch deleted file mode 100644 index 052b915..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0023-omap3beagle-camera-Fix-powerup-sequence.patch +++ /dev/null @@ -1,103 +0,0 @@ -From e4f2c3641ccae2cb1614c8fda5ce307170b20921 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 24 Jun 2010 18:21:52 -0500 -Subject: [PATCH 23/75] omap3beagle: camera: Fix powerup sequence - -The powerup sequence was very incomplete. After revisiting the -Aptina developer's guide, the resulting powerup sequence is followed. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 49 ++++++++++++++++++++++-- - 1 files changed, 45 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 6babaf3..792c48d 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -51,6 +51,8 @@ - - #define ISP_MT9T111_MCLK 216000000 - -+#define LEOPARD_RESET_GPIO 98 -+ - static struct regulator *beagle_mt9t111_1_8v; - static struct regulator *beagle_mt9t111_2_8v; - -@@ -174,16 +176,42 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - break; - - case V4L2_POWER_ON: -- isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA); -- - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) - isp_configure_interface(vdev->cam->isp, &mt9t111_if_config); - #endif - -- /* turn on analog power */ -+ /* Set RESET_BAR to 0 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 0); -+ -+ /* turn on VDD */ - regulator_enable(beagle_mt9t111_1_8v); -+ -+ mdelay(1); -+ -+ /* turn on VDD_IO */ - regulator_enable(beagle_mt9t111_2_8v); -- udelay(100); -+ -+ mdelay(50); -+ -+ /* Enable EXTCLK */ -+ isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA); -+ -+ /* -+ * Wait at least 70 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): -+ * ((1000000 * 70) / 6000000) = aprox 12 us. -+ */ -+ -+ udelay(12); -+ -+ /* Set RESET_BAR to 1 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 1); -+ -+ /* -+ * Wait at least 100 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): -+ * ((1000000 * 100) / 6000000) = aprox 17 us. -+ */ -+ -+ udelay(17); - - break; - -@@ -224,6 +252,17 @@ static int beagle_cam_probe(struct platform_device *pdev) - return PTR_ERR(beagle_mt9t111_2_8v); - } - -+ if (gpio_request(LEOPARD_RESET_GPIO, "cam_rst") != 0) { -+ dev_err(&pdev->dev, "Could not request GPIO %d", -+ LEOPARD_RESET_GPIO); -+ regulator_put(beagle_mt9t111_2_8v); -+ regulator_put(beagle_mt9t111_1_8v); -+ return -ENODEV; -+ } -+ -+ /* set to output mode, default value 0 */ -+ gpio_direction_output(LEOPARD_RESET_GPIO, 0); -+ - printk(KERN_INFO MODULE_NAME ": Driver registration complete \n"); - - return 0; -@@ -238,6 +277,8 @@ static int beagle_cam_remove(struct platform_device *pdev) - regulator_disable(beagle_mt9t111_2_8v); - regulator_put(beagle_mt9t111_2_8v); - -+ gpio_free(LEOPARD_RESET_GPIO); -+ - return 0; - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0024-omap3beagle-camera-Change-vaux4-to-1.8v.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0024-omap3beagle-camera-Change-vaux4-to-1.8v.patch deleted file mode 100644 index a0a2e91..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0024-omap3beagle-camera-Change-vaux4-to-1.8v.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 9f31f599f847c7eab995d22a683c8b32aaa5be7f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 25 Jun 2010 11:24:07 -0500 -Subject: [PATCH 24/75] omap3beagle: camera: Change vaux4 to 1.8v - -Both voltage sources seem to need 1.8v. - -After this, sensor is detected :) - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 1e9a868..af9b818 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -446,8 +446,8 @@ static struct regulator_init_data beagle_vaux3 = { - /* VAUX4 for CAM_2V8 */ - static struct regulator_init_data beagle_vaux4 = { - .constraints = { -- .min_uV = 2800000, -- .max_uV = 2800000, -+ .min_uV = 1800000, -+ .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0025-omap3beagle-camera-Rename-regulators-to-match-actual.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0025-omap3beagle-camera-Rename-regulators-to-match-actual.patch deleted file mode 100644 index c32c440..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0025-omap3beagle-camera-Rename-regulators-to-match-actual.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 784407ada9241d907cf08145885410351a7eafc4 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 25 Jun 2010 12:03:59 -0500 -Subject: [PATCH 25/75] omap3beagle: camera: Rename regulators to match actual voltage levels - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 46 ++++++++++++------------ - 1 files changed, 23 insertions(+), 23 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 792c48d..8a4b7bc 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -53,8 +53,8 @@ - - #define LEOPARD_RESET_GPIO 98 - --static struct regulator *beagle_mt9t111_1_8v; --static struct regulator *beagle_mt9t111_2_8v; -+static struct regulator *beagle_mt9t111_1_8v1; -+static struct regulator *beagle_mt9t111_1_8v2; - - #if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) - static struct isp_interface_config mt9t111_if_config = { -@@ -169,10 +169,10 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - case V4L2_POWER_STANDBY: - isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); - -- if (regulator_is_enabled(beagle_mt9t111_1_8v)) -- regulator_disable(beagle_mt9t111_1_8v); -- if (regulator_is_enabled(beagle_mt9t111_2_8v)) -- regulator_disable(beagle_mt9t111_2_8v); -+ if (regulator_is_enabled(beagle_mt9t111_1_8v1)) -+ regulator_disable(beagle_mt9t111_1_8v1); -+ if (regulator_is_enabled(beagle_mt9t111_1_8v2)) -+ regulator_disable(beagle_mt9t111_1_8v2); - break; - - case V4L2_POWER_ON: -@@ -184,12 +184,12 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - gpio_set_value(LEOPARD_RESET_GPIO, 0); - - /* turn on VDD */ -- regulator_enable(beagle_mt9t111_1_8v); -+ regulator_enable(beagle_mt9t111_1_8v1); - - mdelay(1); - - /* turn on VDD_IO */ -- regulator_enable(beagle_mt9t111_2_8v); -+ regulator_enable(beagle_mt9t111_1_8v2); - - mdelay(50); - -@@ -240,23 +240,23 @@ static int beagle_cam_probe(struct platform_device *pdev) - { - int err; - -- beagle_mt9t111_1_8v = regulator_get(&pdev->dev, "vaux3_1"); -- if (IS_ERR(beagle_mt9t111_1_8v)) { -+ beagle_mt9t111_1_8v1 = regulator_get(&pdev->dev, "vaux3_1"); -+ if (IS_ERR(beagle_mt9t111_1_8v1)) { - dev_err(&pdev->dev, "vaux3_1 regulator missing\n"); -- return PTR_ERR(beagle_mt9t111_1_8v); -+ return PTR_ERR(beagle_mt9t111_1_8v1); - } -- beagle_mt9t111_2_8v = regulator_get(&pdev->dev, "vaux4_1"); -- if (IS_ERR(beagle_mt9t111_2_8v)) { -+ beagle_mt9t111_1_8v2 = regulator_get(&pdev->dev, "vaux4_1"); -+ if (IS_ERR(beagle_mt9t111_1_8v2)) { - dev_err(&pdev->dev, "vaux4_1 regulator missing\n"); -- regulator_put(beagle_mt9t111_1_8v); -- return PTR_ERR(beagle_mt9t111_2_8v); -+ regulator_put(beagle_mt9t111_1_8v1); -+ return PTR_ERR(beagle_mt9t111_1_8v2); - } - - if (gpio_request(LEOPARD_RESET_GPIO, "cam_rst") != 0) { - dev_err(&pdev->dev, "Could not request GPIO %d", - LEOPARD_RESET_GPIO); -- regulator_put(beagle_mt9t111_2_8v); -- regulator_put(beagle_mt9t111_1_8v); -+ regulator_put(beagle_mt9t111_1_8v2); -+ regulator_put(beagle_mt9t111_1_8v1); - return -ENODEV; - } - -@@ -270,12 +270,12 @@ static int beagle_cam_probe(struct platform_device *pdev) - - static int beagle_cam_remove(struct platform_device *pdev) - { -- if (regulator_is_enabled(beagle_mt9t111_1_8v)) -- regulator_disable(beagle_mt9t111_1_8v); -- regulator_put(beagle_mt9t111_1_8v); -- if (regulator_is_enabled(beagle_mt9t111_2_8v)) -- regulator_disable(beagle_mt9t111_2_8v); -- regulator_put(beagle_mt9t111_2_8v); -+ if (regulator_is_enabled(beagle_mt9t111_1_8v1)) -+ regulator_disable(beagle_mt9t111_1_8v1); -+ regulator_put(beagle_mt9t111_1_8v1); -+ if (regulator_is_enabled(beagle_mt9t111_1_8v2)) -+ regulator_disable(beagle_mt9t111_1_8v2); -+ regulator_put(beagle_mt9t111_1_8v2); - - gpio_free(LEOPARD_RESET_GPIO); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0026-omap3beagle-camera-Complement-remainig-sensor-hw-con.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0026-omap3beagle-camera-Complement-remainig-sensor-hw-con.patch deleted file mode 100644 index 854d197..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0026-omap3beagle-camera-Complement-remainig-sensor-hw-con.patch +++ /dev/null @@ -1,37 +0,0 @@ -From e14b36353ea3f3d55192cf986310c275ed8cfcc9 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 25 Jun 2010 12:04:48 -0500 -Subject: [PATCH 26/75] omap3beagle: camera: Complement remainig sensor hw config settings - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 6 ++++++ - 1 files changed, 6 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 8a4b7bc..b0148d6 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -57,6 +57,10 @@ static struct regulator *beagle_mt9t111_1_8v1; - static struct regulator *beagle_mt9t111_1_8v2; - - #if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+ -+/* Arbitrary memory handling limit */ -+#define MT9T111_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN(2048 * 1536 * 4) -+ - static struct isp_interface_config mt9t111_if_config = { - .ccdc_par_ser = ISP_PARLL, - .dataline_shift = 0x0, -@@ -125,6 +129,8 @@ static struct omap34xxcam_hw_config mt9t111_hwc = { - .dev_minor = 0, - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, - .u.sensor.sensor_isp = 1, -+ .u.sensor.capture_mem = MT9T111_BIGGEST_FRAME_BYTE_SIZE * 2, -+ .u.sensor.ival_default = { 1, 10 }, - }; - #endif - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0027-mt9t111-Fix-detect-function-retval-and-cleanup-print.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0027-mt9t111-Fix-detect-function-retval-and-cleanup-print.patch deleted file mode 100644 index 4ca56e1..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0027-mt9t111-Fix-detect-function-retval-and-cleanup-print.patch +++ /dev/null @@ -1,48 +0,0 @@ -From db54f40408b0907a6cf314232bbf2b9f12ac0d9d Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 25 Jun 2010 13:43:54 -0500 -Subject: [PATCH 27/75] mt9t111: Fix detect function retval and cleanup prints - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t111.c | 8 +++----- - 1 files changed, 3 insertions(+), 5 deletions(-) - -diff --git a/drivers/media/video/mt9t111.c b/drivers/media/video/mt9t111.c -index 6a7b2c0..08122ff 100644 ---- a/drivers/media/video/mt9t111.c -+++ b/drivers/media/video/mt9t111.c -@@ -221,7 +221,6 @@ mt9t111_detect(struct i2c_client *client) - /* chip ID is at address 0 */ - if (mt9t111_read_reg(client, MT9T111_CHIP_ID, &val) < 0) - return -ENODEV; -- dev_info(&client->dev, "model id detected 0x%x\n", val); - - if (val != MT9T111_CHIP_ID_VALUE) { - dev_warn(&client->dev, "model id mismatch received 0x%x" -@@ -231,7 +230,7 @@ mt9t111_detect(struct i2c_client *client) - return -ENODEV; - } - -- return 0; -+ return (int)val; - - } - -@@ -390,11 +389,10 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - sensor->state = SENSOR_NOT_DETECTED; - return rval; - } -- mt9t111_loaddefault(c); -+ dev_info(&c->dev, "chip version 0x%02x detected\n", rval); - sensor->state = SENSOR_DETECTED; - sensor->ver = rval; -- pr_info("mt9t111" " chip version 0x%02x detected\n", -- sensor->ver); -+ mt9t111_loaddefault(c); - } - return 0; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0028-omap3beagle-camera-Set-padconf-settings-in-cam-init.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0028-omap3beagle-camera-Set-padconf-settings-in-cam-init.patch deleted file mode 100644 index c9dda1a..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0028-omap3beagle-camera-Set-padconf-settings-in-cam-init.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 9d152df885cb6f6874259d93df558e649f62774f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 25 Jun 2010 16:01:00 -0500 -Subject: [PATCH 28/75] omap3beagle: camera: Set padconf settings in cam init - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 35 ++++++++++++++++++++++++ - 1 files changed, 35 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index b0148d6..75471f2 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -34,6 +34,7 @@ - - #include <plat/mux.h> - #include <plat/board.h> -+#include <plat/control.h> - - #include <media/v4l2-int-device.h> - #include <media/mt9t111.h> -@@ -285,6 +286,40 @@ static int beagle_cam_remove(struct platform_device *pdev) - - gpio_free(LEOPARD_RESET_GPIO); - -+ /* MUX init */ -+ omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -+ 0x10C); /* CAM_HS */ -+ omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -+ 0x10E); /* CAM_VS */ -+ omap_ctrl_writew(OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, -+ 0x110); /* CAM_XCLKA */ -+ omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -+ 0x112); /* CAM_PCLK */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x116); /* CAM_D0 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x118); /* CAM_D1 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x11A); /* CAM_D2 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x11C); /* CAM_D3 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x11E); /* CAM_D4 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x120); /* CAM_D5 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x122); /* CAM_D6 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x124); /* CAM_D7 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x126); /* CAM_D8 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x128); /* CAM_D9 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x12A); /* CAM_D10 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x12C); /* CAM_D11 */ -+ - return 0; - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0029-omap3beagle-camera-only-register-camera-driver-for-3.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0029-omap3beagle-camera-only-register-camera-driver-for-3.patch deleted file mode 100644 index d642d6c..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0029-omap3beagle-camera-only-register-camera-driver-for-3.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 7a8fe70470bd026b249f47c0aa37578a97fb2bb3 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Sun, 27 Jun 2010 16:11:39 +0200 -Subject: [PATCH 29/75] omap3beagle: camera: only register camera driver for 36xx based SoCs - -This is a workaround for the bootcrash when used on 35xx based beagleboards. - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 6 ++++-- - 1 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 75471f2..8faa437 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -355,7 +355,9 @@ static struct platform_driver beagle_cam_driver = { - */ - int __init omap3beaglelmb_init(void) - { -- platform_driver_register(&beagle_cam_driver); -- return 0; -+ if (cpu_is_omap3630()) { -+ platform_driver_register(&beagle_cam_driver); -+ } -+ return 0; - } - late_initcall(omap3beaglelmb_init); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0030-WIP-mt9t111-Work-in-progress-for-camera-enablement.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0030-WIP-mt9t111-Work-in-progress-for-camera-enablement.patch deleted file mode 100644 index 11abb8b..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0030-WIP-mt9t111-Work-in-progress-for-camera-enablement.patch +++ /dev/null @@ -1,53 +0,0 @@ -From b310c5ad504443f0d125ca92106f497e14acd8bd Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 25 Jun 2010 16:01:47 -0500 -Subject: [PATCH 30/75] WIP: mt9t111: Work in progress for camera enablement - -This is changing so far: -- Remove useless printk's in enum_frameinterval calls. -- Call mt9t111_loaddefault instead of mt9t111_configure dummy function. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t111.c | 11 +---------- - 1 files changed, 1 insertions(+), 10 deletions(-) - -diff --git a/drivers/media/video/mt9t111.c b/drivers/media/video/mt9t111.c -index 08122ff..10080af 100644 ---- a/drivers/media/video/mt9t111.c -+++ b/drivers/media/video/mt9t111.c -@@ -288,14 +288,6 @@ static int ioctl_enum_frameintervals(struct v4l2_int_device *s, - { - int ifmt; - -- printk(KERN_INFO "entering ioctl_enum_frameintervals\n"); -- printk(KERN_INFO "index = %d, pixel_format = 0x%x," -- " width = %d, height = %d\n", -- frmi->index, frmi->pixel_format, -- frmi->width, frmi->height); -- printk(KERN_INFO "mt9t111 format = 0x%x\n", -- mt9t111_formats[0].pixelformat); -- - if (frmi->index >= NUM_CAPTURE_FRAMEINTERVALS) - return -EINVAL; - -@@ -379,7 +371,7 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - } - - if ((on == V4L2_POWER_ON) && (sensor->state == SENSOR_DETECTED)) -- mt9t111_configure(s); -+ mt9t111_loaddefault(c); - - if ((on == V4L2_POWER_ON) && (sensor->state == SENSOR_NOT_DETECTED)) { - rval = mt9t111_detect(c); -@@ -392,7 +384,6 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - dev_info(&c->dev, "chip version 0x%02x detected\n", rval); - sensor->state = SENSOR_DETECTED; - sensor->ver = rval; -- mt9t111_loaddefault(c); - } - return 0; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch deleted file mode 100644 index f8b4af9..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch +++ /dev/null @@ -1,2441 +0,0 @@ -From 2355a460abc09be0a8c61360792a59056eb09230 Mon Sep 17 00:00:00 2001 -From: Vaibhav Hiremath <hvaibhav@ti.com> -Date: Wed, 7 Jul 2010 11:55:43 +0530 -Subject: [PATCH 31/75] BeagleXM:Cam: Add support for MT9V113 VGA Sensor - -This patch replaces the MT9T111 to MT9V113 sensor. ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 132 ++- - arch/arm/mach-omap2/board-omap3beagle.c | 32 +- - drivers/media/video/Kconfig | 10 + - drivers/media/video/Makefile | 1 + - drivers/media/video/mt9v113.c | 1522 ++++++++++++++++++++++++ - drivers/media/video/mt9v113_regs.h | 294 +++++ - include/media/mt9v113.h | 83 ++ - include/media/v4l2-int-device.h | 27 + - 8 files changed, 2023 insertions(+), 78 deletions(-) - create mode 100644 drivers/media/video/mt9v113.c - create mode 100644 drivers/media/video/mt9v113_regs.h - create mode 100644 include/media/mt9v113.h - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 8faa437..6c06265 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -37,7 +37,7 @@ - #include <plat/control.h> - - #include <media/v4l2-int-device.h> --#include <media/mt9t111.h> -+#include <media/mt9v113.h> - - /* Include V4L2 ISP-Camera driver related header file */ - #include <../drivers/media/video/omap34xxcam.h> -@@ -50,99 +50,99 @@ - - #define CAM_USE_XCLKA 0 - --#define ISP_MT9T111_MCLK 216000000 -+#define ISP_MT9V113_MCLK 216000000 - - #define LEOPARD_RESET_GPIO 98 - --static struct regulator *beagle_mt9t111_1_8v1; --static struct regulator *beagle_mt9t111_1_8v2; -+static struct regulator *beagle_mt9v113_1_8v1; -+static struct regulator *beagle_mt9v113_1_8v2; - --#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+#if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE) - - /* Arbitrary memory handling limit */ --#define MT9T111_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN(2048 * 1536 * 4) -+#define MT9V113_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN(2048 * 1536 * 4) - --static struct isp_interface_config mt9t111_if_config = { -- .ccdc_par_ser = ISP_PARLL, -+static struct isp_interface_config mt9v113_if_config = { -+ .ccdc_par_ser = ISP_PARLL, - .dataline_shift = 0x0, - .hsvs_syncdetect = ISPCTRL_SYNC_DETECT_VSRISE, - .strobe = 0x0, - .prestrobe = 0x0, - .shutter = 0x0, -- .cam_mclk = ISP_MT9T111_MCLK, -+ .cam_mclk = ISP_MT9V113_MCLK, - .wenlog = ISPCCDC_CFG_WENLOG_AND, - .wait_hs_vs = 2, - .u.par.par_bridge = 0x1, - .u.par.par_clk_pol = 0x0, - }; - --static struct v4l2_ifparm mt9t111_ifparm_s = { -+static struct v4l2_ifparm mt9v113_ifparm_s = { - #if 1 -- .if_type = V4L2_IF_TYPE_RAW, -+ .if_type = V4L2_IF_TYPE_RAW, - .u = { -- .raw = { -+ .raw = { - .frame_start_on_rising_vs = 1, - .bt_sync_correct = 0, - .swap = 0, - .latch_clk_inv = 0, - .nobt_hs_inv = 0, /* active high */ - .nobt_vs_inv = 0, /* active high */ -- .clock_min = MT9T111_CLK_MIN, -- .clock_max = MT9T111_CLK_MAX, -+ .clock_min = MT9V113_CLK_MIN, -+ .clock_max = MT9V113_CLK_MAX, - }, - }, --#else -- .if_type = V4L2_IF_TYPE_YCbCr, -+#else -+ .if_type = V4L2_IF_TYPE_YCbCr, - .u = { -- .ycbcr = { -+ .ycbcr = { - .frame_start_on_rising_vs = 1, - .bt_sync_correct = 0, - .swap = 0, - .latch_clk_inv = 0, - .nobt_hs_inv = 0, /* active high */ - .nobt_vs_inv = 0, /* active high */ -- .clock_min = MT9T111_CLK_MIN, -- .clock_max = MT9T111_CLK_MAX, -+ .clock_min = MT9V113_CLK_MIN, -+ .clock_max = MT9V113_CLK_MAX, - }, - }, - #endif - }; - - /** -- * @brief mt9t111_ifparm - Returns the mt9t111 interface parameters -+ * @brief mt9v113_ifparm - Returns the mt9v113 interface parameters - * - * @param p - pointer to v4l2_ifparm structure - * - * @return result of operation - 0 is success - */ --static int mt9t111_ifparm(struct v4l2_ifparm *p) -+static int mt9v113_ifparm(struct v4l2_ifparm *p) - { - if (p == NULL) - return -EINVAL; - -- *p = mt9t111_ifparm_s; -+ *p = mt9v113_ifparm_s; - return 0; - } - - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) --static struct omap34xxcam_hw_config mt9t111_hwc = { -+static struct omap34xxcam_hw_config mt9v113_hwc = { - .dev_index = 0, - .dev_minor = 0, - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, - .u.sensor.sensor_isp = 1, -- .u.sensor.capture_mem = MT9T111_BIGGEST_FRAME_BYTE_SIZE * 2, -+ .u.sensor.capture_mem = MT9V113_BIGGEST_FRAME_BYTE_SIZE * 2, - .u.sensor.ival_default = { 1, 10 }, - }; - #endif - - /** -- * @brief mt9t111_set_prv_data - Returns mt9t111 omap34xx driver private data -+ * @brief mt9v113_set_prv_data - Returns mt9v113 omap34xx driver private data - * - * @param priv - pointer to omap34xxcam_hw_config structure - * - * @return result of operation - 0 is success - */ --static int mt9t111_set_prv_data(void *priv) -+static int mt9v113_set_prv_data(void *priv) - { - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) - struct omap34xxcam_hw_config *hwc = priv; -@@ -150,10 +150,10 @@ static int mt9t111_set_prv_data(void *priv) - if (priv == NULL) - return -EINVAL; - -- hwc->u.sensor = mt9t111_hwc.u.sensor; -- hwc->dev_index = mt9t111_hwc.dev_index; -- hwc->dev_minor = mt9t111_hwc.dev_minor; -- hwc->dev_type = mt9t111_hwc.dev_type; -+ hwc->u.sensor = mt9v113_hwc.u.sensor; -+ hwc->dev_index = mt9v113_hwc.dev_index; -+ hwc->dev_minor = mt9v113_hwc.dev_minor; -+ hwc->dev_type = mt9v113_hwc.dev_type; - return 0; - #else - return -EINVAL; -@@ -161,13 +161,13 @@ static int mt9t111_set_prv_data(void *priv) - } - - /** -- * @brief mt9t111_power_set - Power-on or power-off TVP5146 device -+ * @brief mt9v113_power_set - Power-on or power-off TVP5146 device - * - * @param power - enum, Power on/off, resume/standby - * - * @return result of operation - 0 is success - */ --static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) -+static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - { - struct omap34xxcam_videodev *vdev = s->u.slave->master->priv; - -@@ -176,32 +176,32 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - case V4L2_POWER_STANDBY: - isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); - -- if (regulator_is_enabled(beagle_mt9t111_1_8v1)) -- regulator_disable(beagle_mt9t111_1_8v1); -- if (regulator_is_enabled(beagle_mt9t111_1_8v2)) -- regulator_disable(beagle_mt9t111_1_8v2); -+ if (regulator_is_enabled(beagle_mt9v113_1_8v1)) -+ regulator_disable(beagle_mt9v113_1_8v1); -+ if (regulator_is_enabled(beagle_mt9v113_1_8v2)) -+ regulator_disable(beagle_mt9v113_1_8v2); - break; - - case V4L2_POWER_ON: - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -- isp_configure_interface(vdev->cam->isp, &mt9t111_if_config); -+ isp_configure_interface(vdev->cam->isp, &mt9v113_if_config); - #endif - - /* Set RESET_BAR to 0 */ - gpio_set_value(LEOPARD_RESET_GPIO, 0); - - /* turn on VDD */ -- regulator_enable(beagle_mt9t111_1_8v1); -+ regulator_enable(beagle_mt9v113_1_8v1); - - mdelay(1); - - /* turn on VDD_IO */ -- regulator_enable(beagle_mt9t111_1_8v2); -+ regulator_enable(beagle_mt9v113_1_8v2); - - mdelay(50); - - /* Enable EXTCLK */ -- isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA); -+ isp_set_xclk(vdev->cam->isp, MT9V113_CLK_MIN, CAM_USE_XCLKA); - - /* - * Wait at least 70 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): -@@ -229,44 +229,48 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - return 0; - } - --struct mt9t111_platform_data mt9t111_pdata = { -+struct mt9v113_platform_data mt9v113_pdata = { - .master = "omap34xxcam", -- .power_set = mt9t111_power_set, -- .priv_data_set = mt9t111_set_prv_data, -- .ifparm = mt9t111_ifparm, -+ .power_set = mt9v113_power_set, -+ .priv_data_set = mt9v113_set_prv_data, -+ .ifparm = mt9v113_ifparm, - /* Some interface dependent params */ - .clk_polarity = 0, /* data clocked out on falling edge */ - .hs_polarity = 1, /* 0 - Active low, 1- Active high */ - .vs_polarity = 1, /* 0 - Active low, 1- Active high */ - }; - --#endif /* #ifdef CONFIG_VIDEO_MT9T111 */ -+#endif /* #ifdef CONFIG_VIDEO_MT9V113 */ - - - static int beagle_cam_probe(struct platform_device *pdev) - { - int err; - -- beagle_mt9t111_1_8v1 = regulator_get(&pdev->dev, "vaux3_1"); -- if (IS_ERR(beagle_mt9t111_1_8v1)) { -+ printk("%s:%d\n", __func__, __LINE__); -+ beagle_mt9v113_1_8v1 = regulator_get(&pdev->dev, "vaux3_1"); -+ if (IS_ERR(beagle_mt9v113_1_8v1)) { - dev_err(&pdev->dev, "vaux3_1 regulator missing\n"); -- return PTR_ERR(beagle_mt9t111_1_8v1); -+ return PTR_ERR(beagle_mt9v113_1_8v1); - } -- beagle_mt9t111_1_8v2 = regulator_get(&pdev->dev, "vaux4_1"); -- if (IS_ERR(beagle_mt9t111_1_8v2)) { -+ printk("%s:%d\n", __func__, __LINE__); -+ beagle_mt9v113_1_8v2 = regulator_get(&pdev->dev, "vaux4_1"); -+ if (IS_ERR(beagle_mt9v113_1_8v2)) { - dev_err(&pdev->dev, "vaux4_1 regulator missing\n"); -- regulator_put(beagle_mt9t111_1_8v1); -- return PTR_ERR(beagle_mt9t111_1_8v2); -+ regulator_put(beagle_mt9v113_1_8v1); -+ return PTR_ERR(beagle_mt9v113_1_8v2); - } - -+ printk("%s:%d\n", __func__, __LINE__); - if (gpio_request(LEOPARD_RESET_GPIO, "cam_rst") != 0) { - dev_err(&pdev->dev, "Could not request GPIO %d", - LEOPARD_RESET_GPIO); -- regulator_put(beagle_mt9t111_1_8v2); -- regulator_put(beagle_mt9t111_1_8v1); -+ regulator_put(beagle_mt9v113_1_8v2); -+ regulator_put(beagle_mt9v113_1_8v1); - return -ENODEV; - } - -+ printk("%s:%d\n", __func__, __LINE__); - /* set to output mode, default value 0 */ - gpio_direction_output(LEOPARD_RESET_GPIO, 0); - -@@ -277,12 +281,13 @@ static int beagle_cam_probe(struct platform_device *pdev) - - static int beagle_cam_remove(struct platform_device *pdev) - { -- if (regulator_is_enabled(beagle_mt9t111_1_8v1)) -- regulator_disable(beagle_mt9t111_1_8v1); -- regulator_put(beagle_mt9t111_1_8v1); -- if (regulator_is_enabled(beagle_mt9t111_1_8v2)) -- regulator_disable(beagle_mt9t111_1_8v2); -- regulator_put(beagle_mt9t111_1_8v2); -+ printk("%s:%d\n", __func__, __LINE__); -+ if (regulator_is_enabled(beagle_mt9v113_1_8v1)) -+ regulator_disable(beagle_mt9v113_1_8v1); -+ regulator_put(beagle_mt9v113_1_8v1); -+ if (regulator_is_enabled(beagle_mt9v113_1_8v2)) -+ regulator_disable(beagle_mt9v113_1_8v2); -+ regulator_put(beagle_mt9v113_1_8v2); - - gpio_free(LEOPARD_RESET_GPIO); - -@@ -355,9 +360,12 @@ static struct platform_driver beagle_cam_driver = { - */ - int __init omap3beaglelmb_init(void) - { -+ printk("%s:%d\n", __func__, __LINE__); - if (cpu_is_omap3630()) { -- platform_driver_register(&beagle_cam_driver); -+ printk("%s:%d\n", __func__, __LINE__); -+ platform_driver_register(&beagle_cam_driver); - } -- return 0; -+ printk("%s:%d\n", __func__, __LINE__); -+ return 0; - } - late_initcall(omap3beaglelmb_init); -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index af9b818..d4b0b0a 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -71,10 +71,10 @@ static struct omap_opp * _omap35x_l3_rate_table = NULL; - static struct omap_opp * _omap37x_l3_rate_table = NULL; - #endif /* CONFIG_PM */ - --#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+#if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE) - #include <media/v4l2-int-device.h> --#include <media/mt9t111.h> --extern struct mt9t111_platform_data mt9t111_pdata; -+#include <media/mt9v113.h> -+extern struct mt9v113_platform_data mt9v113_pdata; - #endif - - #define GPMC_CS0_BASE 0x60 -@@ -159,7 +159,7 @@ static void __init omap3beagle_ks8851_init(void) - printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); - return; - } -- -+ - spi_register_board_info(omap3beagle_zippy2_spi_board_info, - ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); - } -@@ -369,9 +369,9 @@ static int beagle_twl_gpio_setup(struct device *dev, - */ - - if (cpu_is_omap3630()) { -- /* Power on DVI, Serial and PWR led */ -+ /* Power on DVI, Serial and PWR led */ - gpio_request(gpio + 1, "nDVI_PWR_EN"); -- gpio_direction_output(gpio + 1, 0); -+ gpio_direction_output(gpio + 1, 0); - - /* Power on camera interface */ - gpio_request(gpio + 2, "CAM_EN"); -@@ -560,7 +560,7 @@ static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = { - }, - }; - -- -+ - #if defined(CONFIG_EEPROM_AT24) || defined(CONFIG_EEPROM_AT24_MODULE) - #include <linux/i2c/at24.h> - -@@ -594,10 +594,10 @@ static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {}; - #endif - - static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { --#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+#if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE) - { -- I2C_BOARD_INFO("mt9t111", MT9T111_I2C_ADDR), -- .platform_data = &mt9t111_pdata, -+ I2C_BOARD_INFO("mt9v113", MT9V113_I2C_ADDR), -+ .platform_data = &mt9v113_pdata, - }, - #endif - }; -@@ -606,7 +606,7 @@ static int __init omap3_beagle_i2c_init(void) - { - omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo, - ARRAY_SIZE(beagle_i2c1_boardinfo)); -- if(!strcmp(expansionboard_name, "zippy") || !strcmp(expansionboard_name, "zippy2")) -+ if(!strcmp(expansionboard_name, "zippy") || !strcmp(expansionboard_name, "zippy2")) - { - printk(KERN_INFO "Beagle expansionboard: registering i2c2 bus for zippy/zippy2\n"); - omap_register_i2c_bus(2, 400, beagle_zippy_i2c2_boardinfo, -@@ -681,7 +681,7 @@ static struct spi_board_info beaglefpga_mcspi_board_info[] = { - .modalias = "spidev", - .max_speed_hz = 48000000, //48 Mbps - .bus_num = 4, -- .chip_select = 0, -+ .chip_select = 0, - .mode = SPI_MODE_1, - }, - }; -@@ -830,7 +830,7 @@ static void __init omap3_beagle_init(void) - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_direction_output(170, true); - -- if(!strcmp(expansionboard_name, "zippy")) -+ if(!strcmp(expansionboard_name, "zippy")) - { - printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n"); - omap3beagle_enc28j60_init(); -@@ -838,8 +838,8 @@ static void __init omap3_beagle_init(void) - mmc[1].gpio_wp = 141; - mmc[1].gpio_cd = 162; - } -- -- if(!strcmp(expansionboard_name, "zippy2")) -+ -+ if(!strcmp(expansionboard_name, "zippy2")) - { - printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n"); - omap3beagle_ks8851_init(); -@@ -880,7 +880,7 @@ static void __init omap3_beagle_init(void) - } - - if(!strcmp(expansionboard_name, "beaglefpga")) -- { -+ { - printk(KERN_INFO "Beagle expansionboard: Using McSPI for SPI\n"); - beaglefpga_init_spi(); - } -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index f67ed46..c14d758 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -329,6 +329,16 @@ config VIDEO_MT9V011 - mt0v011 1.3 Mpixel camera. It currently only works with the - em28xx driver. - -+config VIDEO_MT9V113 -+ tristate "Aptina MT9V113 VGA CMOS IMAGE SENSOR" -+ depends on VIDEO_V4L2 && I2C -+ ---help--- -+ This is a Video4Linux2 sensor-level driver for the Aptina MT9V113 -+ image sensor. -+ -+ To compile this driver as a module, choose M here: the -+ module will be called mt9v113. -+ - config VIDEO_TCM825X - tristate "TCM825x camera sensor support" - depends on I2C && VIDEO_V4L2 -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index 31688bf..763c157 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -75,6 +75,7 @@ obj-$(CONFIG_VIDEO_OV7670) += ov7670.o - obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o - obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o - obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o -+obj-$(CONFIG_VIDEO_MT9V113) += mt9v113.o - - obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o - obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o -diff --git a/drivers/media/video/mt9v113.c b/drivers/media/video/mt9v113.c -new file mode 100644 -index 0000000..755a88a ---- /dev/null -+++ b/drivers/media/video/mt9v113.c -@@ -0,0 +1,1522 @@ -+/* -+ * drivers/media/video/mt9v113.c -+ * -+ * Based on TI TVP5146/47 decoder driver -+ * -+ * -+ * This package is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ */ -+ -+#include <linux/i2c.h> -+#include <linux/delay.h> -+#include <linux/videodev2.h> -+#include <media/v4l2-int-device.h> -+#include <media/mt9v113.h> -+#include <mach/hardware.h> -+#include <linux/io.h> -+ -+#include "mt9v113_regs.h" -+ -+/* Module Name */ -+#define MT9V113_MODULE_NAME "mt9v113" -+ -+/* Private macros for TVP */ -+#define I2C_RETRY_COUNT (5) -+#define LOCK_RETRY_COUNT (5) -+#define LOCK_RETRY_DELAY (200) -+ -+/* Debug functions */ -+static int debug = 1; -+module_param(debug, bool, 0644); -+MODULE_PARM_DESC(debug, "Debug level (0-1)"); -+ -+#define dump_reg(client, reg, val) \ -+ do { \ -+ val = mt9v113_read_reg(client, reg); \ -+ v4l_info(client, "Reg(0x%.2X): 0x%.2X\n", reg, val); \ -+ } while (0) -+ -+/** -+ * enum mt9v113_std - enum for supported standards -+ */ -+enum mt9v113_std { -+ MT9V113_STD_VGA = 0, -+ MT9V113_STD_QVGA, -+ MT9V113_STD_INVALID -+}; -+ -+/** -+ * enum mt9v113_state - enum for different decoder states -+ */ -+enum mt9v113_state { -+ STATE_NOT_DETECTED, -+ STATE_DETECTED -+}; -+ -+/** -+ * struct mt9v113_std_info - Structure to store standard informations -+ * @width: Line width in pixels -+ * @height:Number of active lines -+ * @video_std: Value to write in REG_VIDEO_STD register -+ * @standard: v4l2 standard structure information -+ */ -+struct mt9v113_std_info { -+ unsigned long width; -+ unsigned long height; -+ u8 video_std; -+ struct v4l2_standard standard; -+}; -+ -+/** -+ * struct mt9v113_decoded - decoder object -+ * @v4l2_int_device: Slave handle -+ * @pdata: Board specific -+ * @client: I2C client data -+ * @id: Entry from I2C table -+ * @ver: Chip version -+ * @state: decoder state - detected or not-detected -+ * @pix: Current pixel format -+ * @num_fmts: Number of formats -+ * @fmt_list: Format list -+ * @current_std: Current standard -+ * @num_stds: Number of standards -+ * @std_list: Standards list -+ * @route: input and output routing at chip level -+ */ -+struct mt9v113_decoder { -+ struct v4l2_int_device *v4l2_int_device; -+ const struct mt9v113_platform_data *pdata; -+ struct i2c_client *client; -+ -+ struct i2c_device_id *id; -+ -+ int ver; -+ enum mt9v113_state state; -+ -+ struct v4l2_pix_format pix; -+ int num_fmts; -+ const struct v4l2_fmtdesc *fmt_list; -+ -+ enum mt9v113_std current_std; -+ int num_stds; -+ struct mt9v113_std_info *std_list; -+ -+ struct v4l2_routing route; -+}; -+ -+/* MT9V113 register set for VGA mode */ -+static struct mt9v113_reg mt9v113_vga_reg[] = { -+ {TOK_WRITE, 0x098C, 0x2739}, -+ {TOK_WRITE, 0x0990, 0x0000}, -+ {TOK_WRITE, 0x098C, 0x273B}, -+ {TOK_WRITE, 0x0990, 0x027F}, -+ {TOK_WRITE, 0x098C, 0x273D}, -+ {TOK_WRITE, 0x0990, 0x0000}, -+ {TOK_WRITE, 0x098C, 0x273F}, -+ {TOK_WRITE, 0x0990, 0x01DF}, -+ {TOK_WRITE, 0x098C, 0x2703}, -+ {TOK_WRITE, 0x0990, 0x0280}, -+ {TOK_WRITE, 0x098C, 0x2705}, -+ {TOK_WRITE, 0x0990, 0x01E0}, -+ {TOK_WRITE, 0x098C, 0xA103}, -+ {TOK_WRITE, 0x0990, 0x0005}, -+ {TOK_DELAY, 0, 100}, -+ {TOK_TERM, 0, 0}, -+}; -+ -+/* MT9V113 default register values */ -+static struct mt9v113_reg mt9v113_reg_list[] = { -+ {TOK_WRITE, 0x0018, 0x4028}, -+ {TOK_DELAY, 0, 100}, -+ {TOK_WRITE, 0x001A, 0x0011}, -+ {TOK_WRITE, 0x001A, 0x0010}, -+ {TOK_WRITE, 0x0018, 0x4028}, -+ {TOK_DELAY, 0, 100}, -+ {TOK_WRITE, 0x098C, 0x02F0}, -+ {TOK_WRITE, 0x0990, 0x0000}, -+ {TOK_WRITE, 0x098C, 0x02F2}, -+ {TOK_WRITE, 0x0990, 0x0210}, -+ {TOK_WRITE, 0x098C, 0x02F4}, -+ {TOK_WRITE, 0x0990, 0x001A}, -+ {TOK_WRITE, 0x098C, 0x2145}, -+ {TOK_WRITE, 0x0990, 0x02F4}, -+ {TOK_WRITE, 0x098C, 0xA134}, -+ {TOK_WRITE, 0x0990, 0x0001}, -+ {TOK_WRITE, 0x31E0, 0x0001}, -+ {TOK_WRITE, 0x001A, 0x0210}, -+ {TOK_WRITE, 0x001E, 0x0777}, -+ {TOK_WRITE, 0x0016, 0x42DF}, -+ {TOK_WRITE, 0x0014, 0x2145}, -+ {TOK_WRITE, 0x0014, 0x2145}, -+ {TOK_WRITE, 0x0010, 0x0431}, -+ {TOK_WRITE, 0x0012, 0x0000}, -+ {TOK_WRITE, 0x0014, 0x244B}, -+ {TOK_WRITE, 0x0014, 0x304B}, -+ {TOK_DELAY, 0, 100}, -+ {TOK_WRITE, 0x0014, 0xB04A}, -+ {TOK_WRITE, 0x098C, 0xAB1F}, -+ {TOK_WRITE, 0x0990, 0x00C7}, -+ {TOK_WRITE, 0x098C, 0xAB31}, -+ {TOK_WRITE, 0x0990, 0x001E}, -+ {TOK_WRITE, 0x098C, 0x274F}, -+ {TOK_WRITE, 0x0990, 0x0004}, -+ {TOK_WRITE, 0x098C, 0x2741}, -+ {TOK_WRITE, 0x0990, 0x0004}, -+ {TOK_WRITE, 0x098C, 0xAB20}, -+ {TOK_WRITE, 0x0990, 0x0054}, -+ {TOK_WRITE, 0x098C, 0xAB21}, -+ {TOK_WRITE, 0x0990, 0x0046}, -+ {TOK_WRITE, 0x098C, 0xAB22}, -+ {TOK_WRITE, 0x0990, 0x0002}, -+ {TOK_WRITE, 0x098C, 0xAB24}, -+ {TOK_WRITE, 0x0990, 0x0005}, -+ {TOK_WRITE, 0x098C, 0x2B28}, -+ {TOK_WRITE, 0x0990, 0x170C}, -+ {TOK_WRITE, 0x098C, 0x2B2A}, -+ {TOK_WRITE, 0x0990, 0x3E80}, -+ {TOK_WRITE, 0x3210, 0x09A8}, -+ {TOK_WRITE, 0x098C, 0x2306}, -+ {TOK_WRITE, 0x0990, 0x0315}, -+ {TOK_WRITE, 0x098C, 0x2308}, -+ {TOK_WRITE, 0x0990, 0xFDDC}, -+ {TOK_WRITE, 0x098C, 0x230A}, -+ {TOK_WRITE, 0x0990, 0x003A}, -+ {TOK_WRITE, 0x098C, 0x230C}, -+ {TOK_WRITE, 0x0990, 0xFF58}, -+ {TOK_WRITE, 0x098C, 0x230E}, -+ {TOK_WRITE, 0x0990, 0x02B7}, -+ {TOK_WRITE, 0x098C, 0x2310}, -+ {TOK_WRITE, 0x0990, 0xFF31}, -+ {TOK_WRITE, 0x098C, 0x2312}, -+ {TOK_WRITE, 0x0990, 0xFF4C}, -+ {TOK_WRITE, 0x098C, 0x2314}, -+ {TOK_WRITE, 0x0990, 0xFE4C}, -+ {TOK_WRITE, 0x098C, 0x2316}, -+ {TOK_WRITE, 0x0990, 0x039E}, -+ {TOK_WRITE, 0x098C, 0x2318}, -+ {TOK_WRITE, 0x0990, 0x001C}, -+ {TOK_WRITE, 0x098C, 0x231A}, -+ {TOK_WRITE, 0x0990, 0x0039}, -+ {TOK_WRITE, 0x098C, 0x231C}, -+ {TOK_WRITE, 0x0990, 0x007F}, -+ {TOK_WRITE, 0x098C, 0x231E}, -+ {TOK_WRITE, 0x0990, 0xFF77}, -+ {TOK_WRITE, 0x098C, 0x2320}, -+ {TOK_WRITE, 0x0990, 0x000A}, -+ {TOK_WRITE, 0x098C, 0x2322}, -+ {TOK_WRITE, 0x0990, 0x0020}, -+ {TOK_WRITE, 0x098C, 0x2324}, -+ {TOK_WRITE, 0x0990, 0x001B}, -+ {TOK_WRITE, 0x098C, 0x2326}, -+ {TOK_WRITE, 0x0990, 0xFFC6}, -+ {TOK_WRITE, 0x098C, 0x2328}, -+ {TOK_WRITE, 0x0990, 0x0086}, -+ {TOK_WRITE, 0x098C, 0x232A}, -+ {TOK_WRITE, 0x0990, 0x00B5}, -+ {TOK_WRITE, 0x098C, 0x232C}, -+ {TOK_WRITE, 0x0990, 0xFEC3}, -+ {TOK_WRITE, 0x098C, 0x232E}, -+ {TOK_WRITE, 0x0990, 0x0001}, -+ {TOK_WRITE, 0x098C, 0x2330}, -+ {TOK_WRITE, 0x0990, 0xFFEF}, -+ {TOK_WRITE, 0x098C, 0xA348}, -+ {TOK_WRITE, 0x0990, 0x0008}, -+ {TOK_WRITE, 0x098C, 0xA349}, -+ {TOK_WRITE, 0x0990, 0x0002}, -+ {TOK_WRITE, 0x098C, 0xA34A}, -+ {TOK_WRITE, 0x0990, 0x0090}, -+ {TOK_WRITE, 0x098C, 0xA34B}, -+ {TOK_WRITE, 0x0990, 0x00FF}, -+ {TOK_WRITE, 0x098C, 0xA34C}, -+ {TOK_WRITE, 0x0990, 0x0075}, -+ {TOK_WRITE, 0x098C, 0xA34D}, -+ {TOK_WRITE, 0x0990, 0x00EF}, -+ {TOK_WRITE, 0x098C, 0xA351}, -+ {TOK_WRITE, 0x0990, 0x0000}, -+ {TOK_WRITE, 0x098C, 0xA352}, -+ {TOK_WRITE, 0x0990, 0x007F}, -+ {TOK_WRITE, 0x098C, 0xA354}, -+ {TOK_WRITE, 0x0990, 0x0043}, -+ {TOK_WRITE, 0x098C, 0xA355}, -+ {TOK_WRITE, 0x0990, 0x0001}, -+ {TOK_WRITE, 0x098C, 0xA35D}, -+ {TOK_WRITE, 0x0990, 0x0078}, -+ {TOK_WRITE, 0x098C, 0xA35E}, -+ {TOK_WRITE, 0x0990, 0x0086}, -+ {TOK_WRITE, 0x098C, 0xA35F}, -+ {TOK_WRITE, 0x0990, 0x007E}, -+ {TOK_WRITE, 0x098C, 0xA360}, -+ {TOK_WRITE, 0x0990, 0x0082}, -+ {TOK_WRITE, 0x098C, 0x2361}, -+ {TOK_WRITE, 0x0990, 0x0040}, -+ {TOK_WRITE, 0x098C, 0xA363}, -+ {TOK_WRITE, 0x0990, 0x00D2}, -+ {TOK_WRITE, 0x098C, 0xA364}, -+ {TOK_WRITE, 0x0990, 0x00F6}, -+ {TOK_WRITE, 0x098C, 0xA302}, -+ {TOK_WRITE, 0x0990, 0x0000}, -+ {TOK_WRITE, 0x098C, 0xA303}, -+ {TOK_WRITE, 0x0990, 0x00EF}, -+ {TOK_WRITE, 0x098C, 0xAB20}, -+ {TOK_WRITE, 0x0990, 0x0024}, -+ {TOK_WRITE, 0x098C, 0xA103}, -+ {TOK_WRITE, 0x0990, 0x0006}, -+ {TOK_DELAY, 0, 100}, -+ {TOK_WRITE, 0x098C, 0xA103}, -+ {TOK_WRITE, 0x0990, 0x0005}, -+ {TOK_DELAY, 0, 100}, -+ {TOK_WRITE, 0x098C, 0x222D}, -+ {TOK_WRITE, 0x0990, 0x0088}, -+ {TOK_WRITE, 0x098C, 0xA408}, -+ {TOK_WRITE, 0x0990, 0x0020}, -+ {TOK_WRITE, 0x098C, 0xA409}, -+ {TOK_WRITE, 0x0990, 0x0023}, -+ {TOK_WRITE, 0x098C, 0xA40A}, -+ {TOK_WRITE, 0x0990, 0x0027}, -+ {TOK_WRITE, 0x098C, 0xA40B}, -+ {TOK_WRITE, 0x0990, 0x002A}, -+ {TOK_WRITE, 0x098C, 0x2411}, -+ {TOK_WRITE, 0x0990, 0x0088}, -+ {TOK_WRITE, 0x098C, 0x2413}, -+ {TOK_WRITE, 0x0990, 0x00A4}, -+ {TOK_WRITE, 0x098C, 0x2415}, -+ {TOK_WRITE, 0x0990, 0x0088}, -+ {TOK_WRITE, 0x098C, 0x2417}, -+ {TOK_WRITE, 0x0990, 0x00A4}, -+ {TOK_WRITE, 0x098C, 0xA404}, -+ {TOK_WRITE, 0x0990, 0x0010}, -+ {TOK_WRITE, 0x098C, 0xA40D}, -+ {TOK_WRITE, 0x0990, 0x0002}, -+ {TOK_WRITE, 0x098C, 0xA40E}, -+ {TOK_WRITE, 0x0990, 0x0003}, -+ {TOK_WRITE, 0x098C, 0xA103}, -+ {TOK_WRITE, 0x0990, 0x0006}, -+ {TOK_DELAY, 0, 100}, -+ /* test pattern all white*/ -+ /* {TOK_WRITE, 0x098C, 0xA766}, -+ {TOK_WRITE, 0x0990, 0x0001}, -+ */ -+ {TOK_WRITE, 0x098C, 0xA103}, -+ {TOK_WRITE, 0x0990, 0x0005}, -+ {TOK_DELAY, 0, 100}, -+ {TOK_TERM, 0, 0}, -+}; -+ -+/* List of image formats supported by mt9v113 -+ * Currently we are using 8 bit mode only, but can be -+ * extended to 10/20 bit mode. -+ */ -+static const struct v4l2_fmtdesc mt9v113_fmt_list[] = { -+ { -+ .index = 0, -+ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, -+ .flags = 0, -+ .description = "8-bit UYVY 4:2:2 Format", -+ .pixelformat = V4L2_PIX_FMT_UYVY, -+ }, -+}; -+ -+/* -+ * Supported standards - -+ * -+ * Currently supports two standards only, need to add support for rest of the -+ * modes, like SECAM, etc... -+ */ -+static struct mt9v113_std_info mt9v113_std_list[] = { -+ /* Standard: STD_NTSC_MJ */ -+ [MT9V113_STD_VGA] = { -+ .width = VGA_NUM_ACTIVE_PIXELS, -+ .height = VGA_NUM_ACTIVE_LINES, -+ .video_std = MT9V113_IMAGE_STD_VGA, -+ .standard = { -+ .index = 0, -+ .id = MT9V113_IMAGE_STD_VGA, -+ .name = "VGA", -+ .frameperiod = {1001, 30000}, -+ .framelines = 480 -+ }, -+ /* Standard: STD_PAL_BDGHIN */ -+ }, -+ [MT9V113_STD_QVGA] = { -+ .width = QVGA_NUM_ACTIVE_PIXELS, -+ .height = QVGA_NUM_ACTIVE_LINES, -+ .video_std = MT9V113_IMAGE_STD_QVGA, -+ .standard = { -+ .index = 1, -+ .id = MT9V113_IMAGE_STD_QVGA, -+ .name = "QVGA", -+ .frameperiod = {1001, 30000}, -+ .framelines = 320 -+ }, -+ }, -+ /* Standard: need to add for additional standard */ -+}; -+/* -+ * Control structure for Auto Gain -+ * This is temporary data, will get replaced once -+ * v4l2_ctrl_query_fill supports it. -+ */ -+static const struct v4l2_queryctrl mt9v113_autogain_ctrl = { -+ .id = V4L2_CID_AUTOGAIN, -+ .name = "Gain, Automatic", -+ .type = V4L2_CTRL_TYPE_BOOLEAN, -+ .minimum = 0, -+ .maximum = 1, -+ .step = 1, -+ .default_value = 1, -+}; -+ -+static int mt9v113_read_reg(struct i2c_client *client, unsigned short reg) -+{ -+ int err = 0; -+ struct i2c_msg msg[1]; -+ unsigned char data[2]; -+ unsigned short val = 0; -+ -+ if (!client->adapter) { -+ err = -ENODEV; -+ return err; -+ }else { -+ // TODO: addr should be set up where else -+ msg->addr = MT9V113_I2C_ADDR;//client->addr; -+ msg->flags = 0; -+ msg->len = I2C_TWO_BYTE_TRANSFER; -+ msg->buf = data; -+ data[0] = (reg & I2C_TXRX_DATA_MASK_UPPER) >> -+ I2C_TXRX_DATA_SHIFT; -+ data[1] = (reg & I2C_TXRX_DATA_MASK); -+ err = i2c_transfer(client->adapter, msg, 1); -+ if (err >= 0) { -+ msg->flags = I2C_M_RD; -+ msg->len = I2C_TWO_BYTE_TRANSFER; /* 2 byte read */ -+ err = i2c_transfer(client->adapter, msg, 1); -+ if (err >= 0) { -+ val = ((data[0] & I2C_TXRX_DATA_MASK) -+ << I2C_TXRX_DATA_SHIFT) -+ | (data[1] & I2C_TXRX_DATA_MASK); -+ } -+ } -+ } -+ return (int)(0x0000ffff & val); -+} -+ -+ -+ -+static int mt9v113_write_reg(struct i2c_client *client, unsigned short reg, unsigned short val) -+{ -+ int err = 0; -+ int trycnt = 0; -+ -+ struct i2c_msg msg[1]; -+ unsigned char data[4]; -+ err = -1; -+ -+ v4l_dbg(1, debug, client, -+ "mt9v113_write_reg reg=0x%x, val=0x%x\n", -+ reg,val); -+ -+ while ((err < 0) && (trycnt < I2C_RETRY_COUNT)) { -+ trycnt++; -+ if (!client->adapter) { -+ err = -ENODEV; -+ } else { -+ // TODO: addr should be set up where else -+ msg->addr = MT9V113_I2C_ADDR;//client->addr; -+ msg->flags = 0; -+ msg->len = I2C_FOUR_BYTE_TRANSFER; -+ msg->buf = data; -+ data[0] = (reg & I2C_TXRX_DATA_MASK_UPPER) >> -+ I2C_TXRX_DATA_SHIFT; -+ data[1] = (reg & I2C_TXRX_DATA_MASK); -+ data[2] = (val & I2C_TXRX_DATA_MASK_UPPER) >> -+ I2C_TXRX_DATA_SHIFT; -+ data[3] = (val & I2C_TXRX_DATA_MASK); -+ err = i2c_transfer(client->adapter, msg, 1); -+ } -+ } -+ if (err < 0) { -+ printk(KERN_INFO "\n I2C write failed"); -+ } -+ return err; -+} -+ -+/* configure mux, for DM355 EVM only */ -+#ifndef CONFIG_MACH_DM355_LEOPARD -+static int mt9v113_en_mux(struct i2c_client *client) -+{ -+ int err = 0; -+ int trycnt = 0; -+ /* unsigned short readval = 0;*/ -+ -+ struct i2c_msg msg[1]; -+ unsigned char data[4]; -+ err = -1; -+ printk(KERN_INFO -+ "\n entering mt9v113_en_mux \n"); -+ -+ while ((err < 0) && (trycnt < 5)) { -+ trycnt++; -+ if (!client->adapter) { -+ err = -ENODEV; -+ } else { -+ msg->addr = 0x25; -+ msg->flags = 0; -+ msg->len = I2C_TWO_BYTE_TRANSFER; -+ msg->buf = data; -+ data[0] = (unsigned char)(0x08 & I2C_TXRX_DATA_MASK); -+ data[1] = (unsigned char)(0x80 & I2C_TXRX_DATA_MASK); -+ -+ err = i2c_transfer(client->adapter, msg, 1); -+ if (err < 0) { -+ printk(KERN_INFO -+ "\n ERROR in ECP register write\n"); -+ } -+ } -+ } -+ if (err < 0) { -+ printk(KERN_INFO "\n I2C write failed"); -+ } -+ return err; -+} -+#endif -+ -+/* -+ * mt9v113_write_regs : Initializes a list of registers -+ * if token is TOK_TERM, then entire write operation terminates -+ * if token is TOK_DELAY, then a delay of 'val' msec is introduced -+ * if token is TOK_SKIP, then the register write is skipped -+ * if token is TOK_WRITE, then the register write is performed -+ * -+ * reglist - list of registers to be written -+ * Returns zero if successful, or non-zero otherwise. -+ */ -+static int mt9v113_write_regs(struct i2c_client *client, -+ const struct mt9v113_reg reglist[]) -+{ -+ int err; -+ const struct mt9v113_reg *next = reglist; -+ -+ for (; next->token != TOK_TERM; next++) { -+ if (next->token == TOK_DELAY) { -+ msleep(next->val); -+ continue; -+ } -+ -+ if (next->token == TOK_SKIP) -+ continue; -+ -+ err = mt9v113_write_reg(client, next->reg, next->val); -+ if (err < 0) { -+ v4l_err(client, "Write failed. Err[%d]\n", err); -+ return err; -+ } -+ } -+ return 0; -+} -+ -+/* -+ * mt9v113_get_current_std: -+ * Returns the current standard -+ */ -+static enum mt9v113_std mt9v113_get_current_std(struct mt9v113_decoder -+ *decoder) -+{ -+ return MT9V113_STD_VGA; -+} -+ -+/* -+ * Configure the mt9v113 with the current register settings -+ * Returns zero if successful, or non-zero otherwise. -+ */ -+static int mt9v113_configure(struct mt9v113_decoder *decoder) -+{ -+ int err; -+ -+ /* common register initialization */ -+ err = -+ mt9v113_write_regs(decoder->client, mt9v113_reg_list); -+ if (err) -+ return err; -+ -+// if (debug) -+// mt9v113_reg_dump(decoder); -+ -+ return 0; -+} -+ -+/* -+ * Configure the MT9V113 to VGA mode -+ * Returns zero if successful, or non-zero otherwise. -+ */ -+static int mt9v113_vga_mode(struct mt9v113_decoder *decoder) -+{ -+ int err; -+ -+ err = -+ mt9v113_write_regs(decoder->client, mt9v113_vga_reg); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ -+ -+/* -+ * Detect if an mt9v113 is present, and if so which revision. -+ * A device is considered to be detected if the chip ID (LSB and MSB) -+ * registers match the expected values. -+ * Any value of the rom version register is accepted. -+ * Returns ENODEV error number if no device is detected, or zero -+ * if a device is detected. -+ */ -+static int mt9v113_detect(struct mt9v113_decoder *decoder) -+{ -+ unsigned short val=0; -+ -+#ifndef CONFIG_MACH_DM355_LEOPARD -+// mt9v113_en_mux(decoder->client); -+#endif -+ -+ val = mt9v113_read_reg(decoder->client, REG_CHIP_ID); -+ -+ v4l_dbg(1, debug, decoder->client, -+ "chip id detected 0x%x\n", -+ val); -+ -+ if (MT9V113_CHIP_ID != val) { -+ /* We didn't read the values we expected, so this must not be -+ * MT9V113. -+ */ -+ v4l_err(decoder->client, -+ "chip id mismatch read 0x%x, expecting 0x%x\n", val, MT9V113_CHIP_ID); -+ return -ENODEV; -+ } -+ -+ decoder->ver = val; -+ decoder->state = STATE_DETECTED; -+ -+ v4l_info(decoder->client, -+ "%s found at 0x%x (%s)\n", decoder->client->name, -+ decoder->client->addr << 1, -+ decoder->client->adapter->name); -+ -+ return 0; -+} -+ -+/* -+ * Following are decoder interface functions implemented by -+ * mt9v113 decoder driver. -+ */ -+ -+/** -+ * ioctl_querystd - V4L2 decoder interface handler for VIDIOC_QUERYSTD ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @std_id: standard V4L2 std_id ioctl enum -+ * -+ * Returns the current standard detected by mt9v113. If no active input is -+ * detected, returns -EINVAL -+ */ -+static int ioctl_querystd(struct v4l2_int_device *s, v4l2_std_id *std_id) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ enum mt9v113_std current_std; -+ -+ if (std_id == NULL) -+ return -EINVAL; -+ -+ /* get the current standard */ -+ current_std = mt9v113_get_current_std(decoder); -+ if (current_std == MT9V113_IMAGE_STD_INVALID) -+ return -EINVAL; -+ -+ decoder->current_std = current_std; -+ *std_id = decoder->std_list[current_std].standard.id; -+ -+ v4l_dbg(1, debug, decoder->client, "Current STD: %s", -+ decoder->std_list[current_std].standard.name); -+ return 0; -+} -+ -+/** -+ * ioctl_s_std - V4L2 decoder interface handler for VIDIOC_S_STD ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @std_id: standard V4L2 v4l2_std_id ioctl enum -+ * -+ * If std_id is supported, sets the requested standard. Otherwise, returns -+ * -EINVAL -+ */ -+static int ioctl_s_std(struct v4l2_int_device *s, v4l2_std_id *std_id) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int err, i; -+ -+ if (std_id == NULL) -+ return -EINVAL; -+ -+ for (i = 0; i < decoder->num_stds; i++) -+ if (*std_id & decoder->std_list[i].standard.id) -+ break; -+ -+ if ((i == decoder->num_stds) || (i == MT9V113_STD_INVALID)) -+ return -EINVAL; -+ -+ err = mt9v113_write_reg(decoder->client, REG_VIDEO_STD, -+ decoder->std_list[i].video_std); -+ if (err) -+ return err; -+ -+ decoder->current_std = i; -+ mt9v113_reg_list[REG_VIDEO_STD].val = decoder->std_list[i].video_std; -+ -+ v4l_dbg(1, debug, decoder->client, "Standard set to: %s", -+ decoder->std_list[i].standard.name); -+ return 0; -+} -+ -+/** -+ * ioctl_s_routing - V4L2 decoder interface handler for VIDIOC_S_INPUT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @index: number of the input -+ * -+ * If index is valid, selects the requested input. Otherwise, returns -EINVAL if -+ * the input is not supported or there is no active signal present in the -+ * selected input. -+ */ -+static int ioctl_s_routing(struct v4l2_int_device *s, -+ struct v4l2_routing *route) -+{ -+ return 0; -+} -+ -+/** -+ * ioctl_queryctrl - V4L2 decoder interface handler for VIDIOC_QUERYCTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @qctrl: standard V4L2 v4l2_queryctrl structure -+ * -+ * If the requested control is supported, returns the control information. -+ * Otherwise, returns -EINVAL if the control is not supported. -+ */ -+static int -+ioctl_queryctrl(struct v4l2_int_device *s, struct v4l2_queryctrl *qctrl) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int err = -EINVAL; -+ -+ if (qctrl == NULL) -+ return err; -+ -+ switch (qctrl->id) { -+ case V4L2_CID_BRIGHTNESS: -+ /* Brightness supported is same as standard one (0-255), -+ * so make use of standard API provided. -+ */ -+ err = v4l2_ctrl_query_fill(qctrl, 0, 255, 1, 128); -+ break; -+ case V4L2_CID_CONTRAST: -+ case V4L2_CID_SATURATION: -+ /* Saturation and Contrast supported is - -+ * Contrast: 0 - 255 (Default - 128) -+ * Saturation: 0 - 255 (Default - 128) -+ */ -+ err = v4l2_ctrl_query_fill(qctrl, 0, 255, 1, 128); -+ break; -+ case V4L2_CID_HUE: -+ /* Hue Supported is - -+ * Hue - -180 - +180 (Default - 0, Step - +180) -+ */ -+ err = v4l2_ctrl_query_fill(qctrl, -180, 180, 180, 0); -+ break; -+ case V4L2_CID_AUTOGAIN: -+ /* Autogain is either 0 or 1*/ -+ memcpy(qctrl, &mt9v113_autogain_ctrl, -+ sizeof(struct v4l2_queryctrl)); -+ err = 0; -+ break; -+ default: -+ v4l_err(decoder->client, -+ "invalid control id %d\n", qctrl->id); -+ return err; -+ } -+ -+ v4l_dbg(1, debug, decoder->client, -+ "Query Control: %s : Min - %d, Max - %d, Def - %d", -+ qctrl->name, -+ qctrl->minimum, -+ qctrl->maximum, -+ qctrl->default_value); -+ -+ return err; -+} -+ -+/** -+ * ioctl_g_ctrl - V4L2 decoder interface handler for VIDIOC_G_CTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @ctrl: pointer to v4l2_control structure -+ * -+ * If the requested control is supported, returns the control's current -+ * value from the decoder. Otherwise, returns -EINVAL if the control is not -+ * supported. -+ */ -+static int -+ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *ctrl) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ -+ if (ctrl == NULL) -+ return -EINVAL; -+ -+ switch (ctrl->id) { -+ case V4L2_CID_BRIGHTNESS: -+ ctrl->value = mt9v113_reg_list[REG_BRIGHTNESS].val; -+ break; -+ case V4L2_CID_CONTRAST: -+ ctrl->value = mt9v113_reg_list[REG_CONTRAST].val; -+ break; -+ case V4L2_CID_SATURATION: -+ ctrl->value = mt9v113_reg_list[REG_SATURATION].val; -+ break; -+ case V4L2_CID_HUE: -+ ctrl->value = mt9v113_reg_list[REG_HUE].val; -+ if (ctrl->value == 0x7F) -+ ctrl->value = 180; -+ else if (ctrl->value == 0x80) -+ ctrl->value = -180; -+ else -+ ctrl->value = 0; -+ -+ break; -+ case V4L2_CID_AUTOGAIN: -+ ctrl->value = mt9v113_reg_list[REG_AFE_GAIN_CTRL].val; -+ if ((ctrl->value & 0x3) == 3) -+ ctrl->value = 1; -+ else -+ ctrl->value = 0; -+ -+ break; -+ default: -+ v4l_err(decoder->client, -+ "invalid control id %d\n", ctrl->id); -+ return -EINVAL; -+ } -+ -+ v4l_dbg(1, debug, decoder->client, -+ "Get Control: ID - %d - %d", -+ ctrl->id, ctrl->value); -+ return 0; -+} -+ -+/** -+ * ioctl_s_ctrl - V4L2 decoder interface handler for VIDIOC_S_CTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @ctrl: pointer to v4l2_control structure -+ * -+ * If the requested control is supported, sets the control's current -+ * value in HW. Otherwise, returns -EINVAL if the control is not supported. -+ */ -+static int -+ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *ctrl) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int err = -EINVAL, value; -+ -+ if (ctrl == NULL) -+ return err; -+ -+ value = (__s32) ctrl->value; -+ -+ switch (ctrl->id) { -+ case V4L2_CID_BRIGHTNESS: -+ if (ctrl->value < 0 || ctrl->value > 255) { -+ v4l_err(decoder->client, -+ "invalid brightness setting %d\n", -+ ctrl->value); -+ return -ERANGE; -+ } -+ err = mt9v113_write_reg(decoder->client, REG_BRIGHTNESS, -+ value); -+ if (err) -+ return err; -+ mt9v113_reg_list[REG_BRIGHTNESS].val = value; -+ break; -+ case V4L2_CID_CONTRAST: -+ if (ctrl->value < 0 || ctrl->value > 255) { -+ v4l_err(decoder->client, -+ "invalid contrast setting %d\n", -+ ctrl->value); -+ return -ERANGE; -+ } -+ err = mt9v113_write_reg(decoder->client, REG_CONTRAST, -+ value); -+ if (err) -+ return err; -+ mt9v113_reg_list[REG_CONTRAST].val = value; -+ break; -+ case V4L2_CID_SATURATION: -+ if (ctrl->value < 0 || ctrl->value > 255) { -+ v4l_err(decoder->client, -+ "invalid saturation setting %d\n", -+ ctrl->value); -+ return -ERANGE; -+ } -+ err = mt9v113_write_reg(decoder->client, REG_SATURATION, -+ value); -+ if (err) -+ return err; -+ mt9v113_reg_list[REG_SATURATION].val = value; -+ break; -+ case V4L2_CID_HUE: -+ if (value == 180) -+ value = 0x7F; -+ else if (value == -180) -+ value = 0x80; -+ else if (value == 0) -+ value = 0; -+ else { -+ v4l_err(decoder->client, -+ "invalid hue setting %d\n", -+ ctrl->value); -+ return -ERANGE; -+ } -+ err = mt9v113_write_reg(decoder->client, REG_HUE, -+ value); -+ if (err) -+ return err; -+ mt9v113_reg_list[REG_HUE].val = value; -+ break; -+ case V4L2_CID_AUTOGAIN: -+ if (value == 1) -+ value = 0x0F; -+ else if (value == 0) -+ value = 0x0C; -+ else { -+ v4l_err(decoder->client, -+ "invalid auto gain setting %d\n", -+ ctrl->value); -+ return -ERANGE; -+ } -+ err = mt9v113_write_reg(decoder->client, REG_AFE_GAIN_CTRL, -+ value); -+ if (err) -+ return err; -+ mt9v113_reg_list[REG_AFE_GAIN_CTRL].val = value; -+ break; -+ default: -+ v4l_err(decoder->client, -+ "invalid control id %d\n", ctrl->id); -+ return err; -+ } -+ -+ v4l_dbg(1, debug, decoder->client, -+ "Set Control: ID - %d - %d", -+ ctrl->id, ctrl->value); -+ -+ return err; -+} -+ -+/** -+ * ioctl_enum_fmt_cap - Implement the CAPTURE buffer VIDIOC_ENUM_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @fmt: standard V4L2 VIDIOC_ENUM_FMT ioctl structure -+ * -+ * Implement the VIDIOC_ENUM_FMT ioctl to enumerate supported formats -+ */ -+static int -+ioctl_enum_fmt_cap(struct v4l2_int_device *s, struct v4l2_fmtdesc *fmt) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int index; -+ -+ if (fmt == NULL) -+ return -EINVAL; -+ -+ index = fmt->index; -+ if ((index >= decoder->num_fmts) || (index < 0)) -+ return -EINVAL; /* Index out of bound */ -+ -+ if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; /* only capture is supported */ -+ -+ memcpy(fmt, &decoder->fmt_list[index], -+ sizeof(struct v4l2_fmtdesc)); -+ -+ v4l_dbg(1, debug, decoder->client, -+ "Current FMT: index - %d (%s)", -+ decoder->fmt_list[index].index, -+ decoder->fmt_list[index].description); -+ return 0; -+} -+ -+/** -+ * ioctl_try_fmt_cap - Implement the CAPTURE buffer VIDIOC_TRY_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure -+ * -+ * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This -+ * ioctl is used to negotiate the image capture size and pixel format -+ * without actually making it take effect. -+ */ -+static int -+ioctl_try_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int ifmt; -+ struct v4l2_pix_format *pix; -+ enum mt9v113_std current_std; -+ -+ if (f == NULL) -+ return -EINVAL; -+ -+ if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ -+ pix = &f->fmt.pix; -+ -+ /* Calculate height and width based on current standard */ -+ current_std = mt9v113_get_current_std(decoder); -+ if (current_std == MT9V113_STD_INVALID) -+ return -EINVAL; -+ -+ decoder->current_std = current_std; -+ pix->width = decoder->std_list[current_std].width; -+ pix->height = decoder->std_list[current_std].height; -+ -+ for (ifmt = 0; ifmt < decoder->num_fmts; ifmt++) { -+ if (pix->pixelformat == -+ decoder->fmt_list[ifmt].pixelformat) -+ break; -+ } -+ if (ifmt == decoder->num_fmts) -+ ifmt = 0; /* None of the format matched, select default */ -+ pix->pixelformat = decoder->fmt_list[ifmt].pixelformat; -+ -+ pix->field = V4L2_FIELD_NONE; -+ pix->bytesperline = pix->width * 2; -+ pix->sizeimage = pix->bytesperline * pix->height; -+ pix->colorspace = V4L2_COLORSPACE_SMPTE170M; -+ pix->priv = 0; -+ -+ v4l_dbg(1, debug, decoder->client, -+ "Try FMT: pixelformat - %s, bytesperline - %d" -+ "Width - %d, Height - %d", -+ decoder->fmt_list[ifmt].description, pix->bytesperline, -+ pix->width, pix->height); -+ return 0; -+} -+ -+/** -+ * ioctl_s_fmt_cap - V4L2 decoder interface handler for VIDIOC_S_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure -+ * -+ * If the requested format is supported, configures the HW to use that -+ * format, returns error code if format not supported or HW can't be -+ * correctly configured. -+ */ -+static int -+ioctl_s_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ struct v4l2_pix_format *pix; -+ int rval; -+ -+ if (f == NULL) -+ return -EINVAL; -+ -+ if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; /* only capture is supported */ -+ -+ pix = &f->fmt.pix; -+ rval = ioctl_try_fmt_cap(s, f); -+ if (rval) -+ return rval; -+ -+ decoder->pix = *pix; -+ -+ return rval; -+} -+ -+/** -+ * ioctl_g_fmt_cap - V4L2 decoder interface handler for ioctl_g_fmt_cap -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 v4l2_format structure -+ * -+ * Returns the decoder's current pixel format in the v4l2_format -+ * parameter. -+ */ -+static int -+ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ -+ if (f == NULL) -+ return -EINVAL; -+ -+ if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; /* only capture is supported */ -+ -+ f->fmt.pix = decoder->pix; -+ -+ v4l_dbg(1, debug, decoder->client, -+ "Current FMT: bytesperline - %d" -+ "Width - %d, Height - %d", -+ decoder->pix.bytesperline, -+ decoder->pix.width, decoder->pix.height); -+ return 0; -+} -+ -+/** -+ * ioctl_g_parm - V4L2 decoder interface handler for VIDIOC_G_PARM ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure -+ * -+ * Returns the decoder's video CAPTURE parameters. -+ */ -+static int -+ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ struct v4l2_captureparm *cparm; -+ enum mt9v113_std current_std; -+ -+ if (a == NULL) -+ return -EINVAL; -+ -+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; /* only capture is supported */ -+ -+ memset(a, 0, sizeof(*a)); -+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ -+ /* get the current standard */ -+ current_std = mt9v113_get_current_std(decoder); -+ if (current_std == MT9V113_STD_INVALID) -+ return -EINVAL; -+ -+ decoder->current_std = current_std; -+ -+ cparm = &a->parm.capture; -+ cparm->capability = V4L2_CAP_TIMEPERFRAME; -+ cparm->timeperframe = -+ decoder->std_list[current_std].standard.frameperiod; -+ -+ return 0; -+} -+ -+/** -+ * ioctl_s_parm - V4L2 decoder interface handler for VIDIOC_S_PARM ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure -+ * -+ * Configures the decoder to use the input parameters, if possible. If -+ * not possible, returns the appropriate error code. -+ */ -+static int -+ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ struct v4l2_fract *timeperframe; -+ enum mt9v113_std current_std; -+ -+ if (a == NULL) -+ return -EINVAL; -+ -+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; /* only capture is supported */ -+ -+ timeperframe = &a->parm.capture.timeperframe; -+ -+ /* get the current standard */ -+ current_std = mt9v113_get_current_std(decoder); -+ if (current_std == MT9V113_STD_INVALID) -+ return -EINVAL; -+ -+ decoder->current_std = current_std; -+ -+ *timeperframe = -+ decoder->std_list[current_std].standard.frameperiod; -+ -+ return 0; -+} -+ -+/** -+ * ioctl_g_ifparm - V4L2 decoder interface handler for vidioc_int_g_ifparm_num -+ * @s: pointer to standard V4L2 device structure -+ * @p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure -+ * -+ * Gets slave interface parameters. -+ * Calculates the required xclk value to support the requested -+ * clock parameters in p. This value is returned in the p -+ * parameter. -+ */ -+static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int rval; -+ -+ if (p == NULL) -+ return -EINVAL; -+ -+ if (NULL == decoder->pdata->ifparm) -+ return -EINVAL; -+ -+ rval = decoder->pdata->ifparm(p); -+ if (rval) { -+ v4l_err(decoder->client, "g_ifparm.Err[%d]\n", rval); -+ return rval; -+ } -+ -+ p->u.bt656.clock_curr = 27000000; // TODO: read clock rate from sensor -+ -+ return 0; -+} -+ -+/** -+ * ioctl_g_priv - V4L2 decoder interface handler for vidioc_int_g_priv_num -+ * @s: pointer to standard V4L2 device structure -+ * @p: void pointer to hold decoder's private data address -+ * -+ * Returns device's (decoder's) private data area address in p parameter -+ */ -+static int ioctl_g_priv(struct v4l2_int_device *s, void *p) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ -+ if (NULL == decoder->pdata->priv_data_set) -+ return -EINVAL; -+ -+ return decoder->pdata->priv_data_set(p); -+} -+ -+/** -+ * ioctl_s_power - V4L2 decoder interface handler for vidioc_int_s_power_num -+ * @s: pointer to standard V4L2 device structure -+ * @on: power state to which device is to be set -+ * -+ * Sets devices power state to requrested state, if possible. -+ */ -+static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int err = 0; -+ -+ switch (on) { -+ case V4L2_POWER_OFF: -+ /* Power Down Sequence */ -+ err = -+ mt9v113_write_reg(decoder->client, REG_OPERATION_MODE, -+ 0x01); -+ /* Disable mux for mt9v113 data path */ -+ if (decoder->pdata->power_set) -+ err |= decoder->pdata->power_set(s, on); -+ decoder->state = STATE_NOT_DETECTED; -+ break; -+ -+ case V4L2_POWER_STANDBY: -+ if (decoder->pdata->power_set) -+ err = decoder->pdata->power_set(s, on); -+ break; -+ -+ case V4L2_POWER_ON: -+ /* Enable mux for mt9v113 data path */ -+ if ((decoder->pdata->power_set) && -+ (decoder->state == STATE_NOT_DETECTED)) { -+ -+ err = decoder->pdata->power_set(s, on); -+ -+ /* Detect the sensor is not already detected */ -+ err |= mt9v113_detect(decoder); -+ if (err) { -+ v4l_err(decoder->client, -+ "Unable to detect decoder\n"); -+ return err; -+ } -+ } -+ // Only VGA mode for now -+ err |= mt9v113_vga_mode(decoder); -+ break; -+ -+ default: -+ err = -ENODEV; -+ break; -+ } -+ -+ return err; -+} -+ -+/** -+ * ioctl_init - V4L2 decoder interface handler for VIDIOC_INT_INIT -+ * @s: pointer to standard V4L2 device structure -+ * -+ * Initialize the decoder device (calls mt9v113_configure()) -+ */ -+static int ioctl_init(struct v4l2_int_device *s) -+{ -+// struct mt9v113_decoder *decoder = s->priv; -+ int err = 0; -+ -+ /* Set default standard to auto */ -+ //mt9v113_reg_list[REG_VIDEO_STD].val = -+ // VIDEO_STD_AUTO_SWITCH_BIT; -+// err |= mt9v113_configure(decoder); -+// err |= mt9v113_vga_mode(decoder); -+ -+ return err; -+} -+ -+/** -+ * ioctl_dev_exit - V4L2 decoder interface handler for vidioc_int_dev_exit_num -+ * @s: pointer to standard V4L2 device structure -+ * -+ * Delinitialise the dev. at slave detach. The complement of ioctl_dev_init. -+ */ -+static int ioctl_dev_exit(struct v4l2_int_device *s) -+{ -+ return 0; -+} -+ -+/** -+ * ioctl_dev_init - V4L2 decoder interface handler for vidioc_int_dev_init_num -+ * @s: pointer to standard V4L2 device structure -+ * -+ * Initialise the device when slave attaches to the master. Returns 0 if -+ * mt9v113 device could be found, otherwise returns appropriate error. -+ */ -+static int ioctl_dev_init(struct v4l2_int_device *s) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int err; -+ -+ printk("%s: %d\n", __func__, __LINE__); -+ err = mt9v113_detect(decoder); -+ if (err < 0) { -+ v4l_err(decoder->client, -+ "Unable to detect decoder\n"); -+ return err; -+ } -+ -+ v4l_info(decoder->client, -+ "chip version 0x%.2x detected\n", decoder->ver); -+ -+ err |= mt9v113_configure(decoder); -+ err |= mt9v113_vga_mode(decoder); -+ -+ return 0; -+} -+ -+static struct v4l2_int_ioctl_desc mt9v113_ioctl_desc[] = { -+ {vidioc_int_dev_init_num, (v4l2_int_ioctl_func*) ioctl_dev_init}, -+ {vidioc_int_dev_exit_num, (v4l2_int_ioctl_func*) ioctl_dev_exit}, -+ {vidioc_int_s_power_num, (v4l2_int_ioctl_func*) ioctl_s_power}, -+ {vidioc_int_g_priv_num, (v4l2_int_ioctl_func*) ioctl_g_priv}, -+ {vidioc_int_g_ifparm_num, (v4l2_int_ioctl_func*) ioctl_g_ifparm}, -+ {vidioc_int_init_num, (v4l2_int_ioctl_func*) ioctl_init}, -+ {vidioc_int_enum_fmt_cap_num, -+ (v4l2_int_ioctl_func *) ioctl_enum_fmt_cap}, -+ {vidioc_int_try_fmt_cap_num, -+ (v4l2_int_ioctl_func *) ioctl_try_fmt_cap}, -+ {vidioc_int_g_fmt_cap_num, -+ (v4l2_int_ioctl_func *) ioctl_g_fmt_cap}, -+ {vidioc_int_s_fmt_cap_num, -+ (v4l2_int_ioctl_func *) ioctl_s_fmt_cap}, -+ {vidioc_int_g_parm_num, (v4l2_int_ioctl_func *) ioctl_g_parm}, -+ {vidioc_int_s_parm_num, (v4l2_int_ioctl_func *) ioctl_s_parm}, -+ {vidioc_int_queryctrl_num, -+ (v4l2_int_ioctl_func *) ioctl_queryctrl}, -+ {vidioc_int_g_ctrl_num, (v4l2_int_ioctl_func *) ioctl_g_ctrl}, -+ {vidioc_int_s_ctrl_num, (v4l2_int_ioctl_func *) ioctl_s_ctrl}, -+ {vidioc_int_querystd_num, (v4l2_int_ioctl_func *) ioctl_querystd}, -+ {vidioc_int_s_std_num, (v4l2_int_ioctl_func *) ioctl_s_std}, -+ {vidioc_int_s_video_routing_num, -+ (v4l2_int_ioctl_func *) ioctl_s_routing}, -+}; -+ -+static struct v4l2_int_slave mt9v113_slave = { -+ .ioctls = mt9v113_ioctl_desc, -+ .num_ioctls = ARRAY_SIZE(mt9v113_ioctl_desc), -+}; -+ -+static struct mt9v113_decoder mt9v113_dev = { -+ .state = STATE_NOT_DETECTED, -+ -+ .fmt_list = mt9v113_fmt_list, -+ .num_fmts = ARRAY_SIZE(mt9v113_fmt_list), -+ -+ .pix = { /* Default to 8-bit YUV 422 */ -+ .width = VGA_NUM_ACTIVE_PIXELS, -+ .height = VGA_NUM_ACTIVE_LINES, -+ .pixelformat = V4L2_PIX_FMT_UYVY, -+ .field = V4L2_FIELD_NONE, -+ .bytesperline = VGA_NUM_ACTIVE_PIXELS * 2, -+ .sizeimage = -+ VGA_NUM_ACTIVE_PIXELS * 2 * VGA_NUM_ACTIVE_LINES, -+ .colorspace = V4L2_COLORSPACE_SMPTE170M, -+ }, -+ -+ .current_std = MT9V113_STD_VGA, -+ .std_list = mt9v113_std_list, -+ .num_stds = ARRAY_SIZE(mt9v113_std_list), -+ -+}; -+ -+static struct v4l2_int_device mt9v113_int_device = { -+ .module = THIS_MODULE, -+ .name = MT9V113_MODULE_NAME, -+ .priv = &mt9v113_dev, -+ .type = v4l2_int_type_slave, -+ .u = { -+ .slave = &mt9v113_slave, -+ }, -+}; -+ -+/** -+ * mt9v113_probe - decoder driver i2c probe handler -+ * @client: i2c driver client device structure -+ * -+ * Register decoder as an i2c client device and V4L2 -+ * device. -+ */ -+static int -+mt9v113_probe(struct i2c_client *client, const struct i2c_device_id *id) -+{ -+ struct mt9v113_decoder *decoder = &mt9v113_dev; -+ int err; -+ -+ printk("%s: %d\n", __func__, __LINE__); -+ /* Check if the adapter supports the needed features */ -+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) -+ return -EIO; -+ -+ printk("%s: %d\n", __func__, __LINE__); -+ decoder->pdata = client->dev.platform_data; -+ if (!decoder->pdata) { -+ v4l_err(client, "No platform data!!\n"); -+ return -ENODEV; -+ } -+ printk("%s: %d\n", __func__, __LINE__); -+ /* -+ * Fetch platform specific data, and configure the -+ * mt9v113_reg_list[] accordingly. Since this is one -+ * time configuration, no need to preserve. -+ */ -+ -+ /*mt9v113_reg_list[REG_OUTPUT_FORMATTER2].val |= -+ (decoder->pdata->clk_polarity << 1); -+ mt9v113_reg_list[REG_SYNC_CONTROL].val |= -+ ((decoder->pdata->hs_polarity << 2) | -+ (decoder->pdata->vs_polarity << 3)); -+ */ -+ /* -+ * Save the id data, required for power up sequence -+ */ -+ decoder->id = (struct i2c_device_id *)id; -+ /* Attach to Master */ -+ strcpy(mt9v113_int_device.u.slave->attach_to, decoder->pdata->master); -+ decoder->v4l2_int_device = &mt9v113_int_device; -+ decoder->client = client; -+ i2c_set_clientdata(client, decoder); -+ -+ /* Register with V4L2 layer as slave device */ -+ err = v4l2_int_device_register(decoder->v4l2_int_device); -+ if (err) { -+ i2c_set_clientdata(client, NULL); -+ v4l_err(client, -+ "Unable to register to v4l2. Err[%d]\n", err); -+ -+ } else -+ v4l_info(client, "Registered to v4l2 master %s!!\n", -+ decoder->pdata->master); -+ -+ return 0; -+} -+ -+/** -+ * mt9v113_remove - decoder driver i2c remove handler -+ * @client: i2c driver client device structure -+ * -+ * Unregister decoder as an i2c client device and V4L2 -+ * device. Complement of mt9v113_probe(). -+ */ -+static int __exit mt9v113_remove(struct i2c_client *client) -+{ -+ struct mt9v113_decoder *decoder = i2c_get_clientdata(client); -+ -+ if (!client->adapter) -+ return -ENODEV; /* our client isn't attached */ -+ -+ v4l2_int_device_unregister(decoder->v4l2_int_device); -+ i2c_set_clientdata(client, NULL); -+ -+ return 0; -+} -+/* -+ * mt9v113 Init/Power on Sequence -+ */ -+static const struct mt9v113_reg mt9v113m_init_reg_seq[] = { -+ {TOK_WRITE, REG_OPERATION_MODE, 0x01}, -+ {TOK_WRITE, REG_OPERATION_MODE, 0x00}, -+}; -+static const struct mt9v113_init_seq mt9v113m_init = { -+ .no_regs = ARRAY_SIZE(mt9v113m_init_reg_seq), -+ .init_reg_seq = mt9v113m_init_reg_seq, -+}; -+/* -+ * I2C Device Table - -+ * -+ * name - Name of the actual device/chip. -+ * driver_data - Driver data -+ */ -+static const struct i2c_device_id mt9v113_id[] = { -+ {"mt9v113", (unsigned long)&mt9v113m_init}, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(i2c, mt9v113_id); -+ -+static struct i2c_driver mt9v113_i2c_driver = { -+ .driver = { -+ .name = MT9V113_MODULE_NAME, -+ .owner = THIS_MODULE, -+ }, -+ .probe = mt9v113_probe, -+ .remove = __exit_p(mt9v113_remove), -+ .id_table = mt9v113_id, -+}; -+ -+/** -+ * mt9v113_init -+ * -+ * Module init function -+ */ -+static int __init mt9v113_init(void) -+{ -+ return i2c_add_driver(&mt9v113_i2c_driver); -+} -+ -+/** -+ * mt9v113_cleanup -+ * -+ * Module exit function -+ */ -+static void __exit mt9v113_cleanup(void) -+{ -+ i2c_del_driver(&mt9v113_i2c_driver); -+} -+ -+module_init(mt9v113_init); -+module_exit(mt9v113_cleanup); -+ -+MODULE_AUTHOR("Texas Instruments"); -+MODULE_DESCRIPTION("MT9V113 linux decoder driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/media/video/mt9v113_regs.h b/drivers/media/video/mt9v113_regs.h -new file mode 100644 -index 0000000..64b065f ---- /dev/null -+++ b/drivers/media/video/mt9v113_regs.h -@@ -0,0 +1,294 @@ -+/* -+ * drivers/media/video/mt9v113_regs.h -+ * -+ * Copyright (C) 2008 Texas Instruments Inc -+ * Author: Vaibhav Hiremath <hvaibhav@ti.com> -+ * -+ * Contributors: -+ * Sivaraj R <sivaraj@ti.com> -+ * Brijesh R Jadav <brijesh.j@ti.com> -+ * Hardik Shah <hardik.shah@ti.com> -+ * Manjunath Hadli <mrh@ti.com> -+ * Karicheri Muralidharan <m-karicheri2@ti.com> -+ * -+ * This package is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ */ -+ -+#ifndef _MT9V113_REGS_H -+#define _MT9V113_REGS_H -+ -+/* -+ * MT9V113 registers -+ */ -+#define REG_CHIP_ID (0x00) -+ -+/* -+ * MT9V113 registers -+ */ -+#define REG_INPUT_SEL (0x00) -+#define REG_AFE_GAIN_CTRL (0x01) -+#define REG_VIDEO_STD (0x02) -+#define REG_OPERATION_MODE (0x03) -+#define REG_AUTOSWITCH_MASK (0x04) -+ -+#define REG_COLOR_KILLER (0x05) -+#define REG_LUMA_CONTROL1 (0x06) -+#define REG_LUMA_CONTROL2 (0x07) -+#define REG_LUMA_CONTROL3 (0x08) -+ -+#define REG_BRIGHTNESS (0x09) -+#define REG_CONTRAST (0x0A) -+#define REG_SATURATION (0x0B) -+#define REG_HUE (0x0C) -+ -+#define REG_CHROMA_CONTROL1 (0x0D) -+#define REG_CHROMA_CONTROL2 (0x0E) -+ -+/* 0x0F Reserved */ -+ -+#define REG_COMP_PR_SATURATION (0x10) -+#define REG_COMP_Y_CONTRAST (0x11) -+#define REG_COMP_PB_SATURATION (0x12) -+ -+/* 0x13 Reserved */ -+ -+#define REG_COMP_Y_BRIGHTNESS (0x14) -+ -+/* 0x15 Reserved */ -+ -+#define REG_AVID_START_PIXEL_LSB (0x16) -+#define REG_AVID_START_PIXEL_MSB (0x17) -+#define REG_AVID_STOP_PIXEL_LSB (0x18) -+#define REG_AVID_STOP_PIXEL_MSB (0x19) -+ -+#define REG_HSYNC_START_PIXEL_LSB (0x1A) -+#define REG_HSYNC_START_PIXEL_MSB (0x1B) -+#define REG_HSYNC_STOP_PIXEL_LSB (0x1C) -+#define REG_HSYNC_STOP_PIXEL_MSB (0x1D) -+ -+#define REG_VSYNC_START_LINE_LSB (0x1E) -+#define REG_VSYNC_START_LINE_MSB (0x1F) -+#define REG_VSYNC_STOP_LINE_LSB (0x20) -+#define REG_VSYNC_STOP_LINE_MSB (0x21) -+ -+#define REG_VBLK_START_LINE_LSB (0x22) -+#define REG_VBLK_START_LINE_MSB (0x23) -+#define REG_VBLK_STOP_LINE_LSB (0x24) -+#define REG_VBLK_STOP_LINE_MSB (0x25) -+ -+/* 0x26 - 0x27 Reserved */ -+ -+#define REG_FAST_SWTICH_CONTROL (0x28) -+ -+/* 0x29 Reserved */ -+ -+#define REG_FAST_SWTICH_SCART_DELAY (0x2A) -+ -+/* 0x2B Reserved */ -+ -+#define REG_SCART_DELAY (0x2C) -+#define REG_CTI_DELAY (0x2D) -+#define REG_CTI_CONTROL (0x2E) -+ -+/* 0x2F - 0x31 Reserved */ -+ -+#define REG_SYNC_CONTROL (0x32) -+#define REG_OUTPUT_FORMATTER1 (0x33) -+#define REG_OUTPUT_FORMATTER2 (0x34) -+#define REG_OUTPUT_FORMATTER3 (0x35) -+#define REG_OUTPUT_FORMATTER4 (0x36) -+#define REG_OUTPUT_FORMATTER5 (0x37) -+#define REG_OUTPUT_FORMATTER6 (0x38) -+#define REG_CLEAR_LOST_LOCK (0x39) -+ -+#define REG_STATUS1 (0x3A) -+#define REG_STATUS2 (0x3B) -+ -+#define REG_AGC_GAIN_STATUS_LSB (0x3C) -+#define REG_AGC_GAIN_STATUS_MSB (0x3D) -+ -+/* 0x3E Reserved */ -+ -+#define REG_VIDEO_STD_STATUS (0x3F) -+#define REG_GPIO_INPUT1 (0x40) -+#define REG_GPIO_INPUT2 (0x41) -+ -+/* 0x42 - 0x45 Reserved */ -+ -+#define REG_AFE_COARSE_GAIN_CH1 (0x46) -+#define REG_AFE_COARSE_GAIN_CH2 (0x47) -+#define REG_AFE_COARSE_GAIN_CH3 (0x48) -+#define REG_AFE_COARSE_GAIN_CH4 (0x49) -+ -+#define REG_AFE_FINE_GAIN_PB_B_LSB (0x4A) -+#define REG_AFE_FINE_GAIN_PB_B_MSB (0x4B) -+#define REG_AFE_FINE_GAIN_Y_G_CHROMA_LSB (0x4C) -+#define REG_AFE_FINE_GAIN_Y_G_CHROMA_MSB (0x4D) -+#define REG_AFE_FINE_GAIN_PR_R_LSB (0x4E) -+#define REG_AFE_FINE_GAIN_PR_R_MSB (0x4F) -+#define REG_AFE_FINE_GAIN_CVBS_LUMA_LSB (0x50) -+#define REG_AFE_FINE_GAIN_CVBS_LUMA_MSB (0x51) -+ -+/* 0x52 - 0x68 Reserved */ -+ -+#define REG_FBIT_VBIT_CONTROL1 (0x69) -+ -+/* 0x6A - 0x6B Reserved */ -+ -+#define REG_BACKEND_AGC_CONTROL (0x6C) -+ -+/* 0x6D - 0x6E Reserved */ -+ -+#define REG_AGC_DECREMENT_SPEED_CONTROL (0x6F) -+#define REG_ROM_VERSION (0x70) -+ -+/* 0x71 - 0x73 Reserved */ -+ -+#define REG_AGC_WHITE_PEAK_PROCESSING (0x74) -+#define REG_FBIT_VBIT_CONTROL2 (0x75) -+#define REG_VCR_TRICK_MODE_CONTROL (0x76) -+#define REG_HORIZONTAL_SHAKE_INCREMENT (0x77) -+#define REG_AGC_INCREMENT_SPEED (0x78) -+#define REG_AGC_INCREMENT_DELAY (0x79) -+ -+/* 0x7A - 0x7F Reserved */ -+ -+#define REG_CHIP_ID_MSB (0x80) -+#define REG_CHIP_ID_LSB (0x81) -+ -+/* 0x82 Reserved */ -+ -+#define REG_CPLL_SPEED_CONTROL (0x83) -+ -+/* 0x84 - 0x96 Reserved */ -+ -+#define REG_STATUS_REQUEST (0x97) -+ -+/* 0x98 - 0x99 Reserved */ -+ -+#define REG_VERTICAL_LINE_COUNT_LSB (0x9A) -+#define REG_VERTICAL_LINE_COUNT_MSB (0x9B) -+ -+/* 0x9C - 0x9D Reserved */ -+ -+#define REG_AGC_DECREMENT_DELAY (0x9E) -+ -+/* 0x9F - 0xB0 Reserved */ -+ -+#define REG_VDP_TTX_FILTER_1_MASK1 (0xB1) -+#define REG_VDP_TTX_FILTER_1_MASK2 (0xB2) -+#define REG_VDP_TTX_FILTER_1_MASK3 (0xB3) -+#define REG_VDP_TTX_FILTER_1_MASK4 (0xB4) -+#define REG_VDP_TTX_FILTER_1_MASK5 (0xB5) -+#define REG_VDP_TTX_FILTER_2_MASK1 (0xB6) -+#define REG_VDP_TTX_FILTER_2_MASK2 (0xB7) -+#define REG_VDP_TTX_FILTER_2_MASK3 (0xB8) -+#define REG_VDP_TTX_FILTER_2_MASK4 (0xB9) -+#define REG_VDP_TTX_FILTER_2_MASK5 (0xBA) -+#define REG_VDP_TTX_FILTER_CONTROL (0xBB) -+#define REG_VDP_FIFO_WORD_COUNT (0xBC) -+#define REG_VDP_FIFO_INTERRUPT_THRLD (0xBD) -+ -+/* 0xBE Reserved */ -+ -+#define REG_VDP_FIFO_RESET (0xBF) -+#define REG_VDP_FIFO_OUTPUT_CONTROL (0xC0) -+#define REG_VDP_LINE_NUMBER_INTERRUPT (0xC1) -+#define REG_VDP_PIXEL_ALIGNMENT_LSB (0xC2) -+#define REG_VDP_PIXEL_ALIGNMENT_MSB (0xC3) -+ -+/* 0xC4 - 0xD5 Reserved */ -+ -+#define REG_VDP_LINE_START (0xD6) -+#define REG_VDP_LINE_STOP (0xD7) -+#define REG_VDP_GLOBAL_LINE_MODE (0xD8) -+#define REG_VDP_FULL_FIELD_ENABLE (0xD9) -+#define REG_VDP_FULL_FIELD_MODE (0xDA) -+ -+/* 0xDB - 0xDF Reserved */ -+ -+#define REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR (0xE0) -+#define REG_VBUS_DATA_ACCESS_VBUS_ADDR_INCR (0xE1) -+#define REG_FIFO_READ_DATA (0xE2) -+ -+/* 0xE3 - 0xE7 Reserved */ -+ -+#define REG_VBUS_ADDRESS_ACCESS1 (0xE8) -+#define REG_VBUS_ADDRESS_ACCESS2 (0xE9) -+#define REG_VBUS_ADDRESS_ACCESS3 (0xEA) -+ -+/* 0xEB - 0xEF Reserved */ -+ -+#define REG_INTERRUPT_RAW_STATUS0 (0xF0) -+#define REG_INTERRUPT_RAW_STATUS1 (0xF1) -+#define REG_INTERRUPT_STATUS0 (0xF2) -+#define REG_INTERRUPT_STATUS1 (0xF3) -+#define REG_INTERRUPT_MASK0 (0xF4) -+#define REG_INTERRUPT_MASK1 (0xF5) -+#define REG_INTERRUPT_CLEAR0 (0xF6) -+#define REG_INTERRUPT_CLEAR1 (0xF7) -+ -+/* 0xF8 - 0xFF Reserved */ -+ -+/* The ID values we are looking for */ -+#define MT9V113_CHIP_ID_MSB (0x51) -+ -+#define MT9V113_IMAGE_STD_VGA (0x01) -+#define MT9V113_IMAGE_STD_QVGA (0x02) -+#define MT9V113_IMAGE_STD_INVALID (0xFF) -+ -+/* -+ * Status bit -+ */ -+#define STATUS_TV_VCR_BIT (1<<0) -+#define STATUS_HORZ_SYNC_LOCK_BIT (1<<1) -+#define STATUS_VIRT_SYNC_LOCK_BIT (1<<2) -+#define STATUS_CLR_SUBCAR_LOCK_BIT (1<<3) -+#define STATUS_LOST_LOCK_DETECT_BIT (1<<4) -+#define STATUS_FEILD_RATE_BIT (1<<5) -+#define STATUS_LINE_ALTERNATING_BIT (1<<6) -+#define STATUS_PEAK_WHITE_DETECT_BIT (1<<7) -+ -+/* Tokens for register write */ -+#define TOK_WRITE (0) /* token for write operation */ -+#define TOK_TERM (1) /* terminating token */ -+#define TOK_DELAY (2) /* delay token for reg list */ -+#define TOK_SKIP (3) /* token to skip a register */ -+/** -+ * struct mt9v113_reg - Structure for TVP5146/47 register initialization values -+ * @token - Token: TOK_WRITE, TOK_TERM etc.. -+ * @reg - Register offset -+ * @val - Register Value for TOK_WRITE or delay in ms for TOK_DELAY -+ */ -+struct mt9v113_reg { -+ unsigned short token; -+ unsigned short reg; -+ unsigned short val; -+}; -+ -+/** -+ * struct mt9v113_init_seq - Structure for TVP5146/47/46M2/47M1 power up -+ * Sequence. -+ * @ no_regs - Number of registers to write for power up sequence. -+ * @ init_reg_seq - Array of registers and respective value to write. -+ */ -+struct mt9v113_init_seq { -+ unsigned int no_regs; -+ const struct mt9v113_reg *init_reg_seq; -+}; -+ -+#define MT9V113_CHIP_ID (0x2280) -+ -+#endif /* ifndef _MT9V113_REGS_H */ -diff --git a/include/media/mt9v113.h b/include/media/mt9v113.h -new file mode 100644 -index 0000000..c7ad362 ---- /dev/null -+++ b/include/media/mt9v113.h -@@ -0,0 +1,83 @@ -+/* -+ * drivers/media/video/mt9v113.h -+ * -+ * Copyright (C) 2008 Texas Instruments Inc -+ * Author: Vaibhav Hiremath <hvaibhav@ti.com> -+ * -+ * Contributors: -+ * Sivaraj R <sivaraj@ti.com> -+ * Brijesh R Jadav <brijesh.j@ti.com> -+ * Hardik Shah <hardik.shah@ti.com> -+ * Manjunath Hadli <mrh@ti.com> -+ * Karicheri Muralidharan <m-karicheri2@ti.com> -+ * -+ * This package is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ */ -+ -+#ifndef _MT9V113_H -+#define _MT9V113_H -+ -+/* -+ * Other macros -+ */ -+#define MT9V113_MODULE_NAME "mt9v113" -+ -+/* Number of pixels and number of lines per frame for different standards */ -+#define VGA_NUM_ACTIVE_PIXELS (640*2) -+#define VGA_NUM_ACTIVE_LINES (480) -+#define QVGA_NUM_ACTIVE_PIXELS (320*2) -+#define QVGA_NUM_ACTIVE_LINES (240) -+ -+/** -+ * struct mt9v113_platform_data - Platform data values and access functions. -+ * @power_set: Power state access function, zero is off, non-zero is on. -+ * @ifparm: Interface parameters access function. -+ * @priv_data_set: Device private data (pointer) access function. -+ * @clk_polarity: Clock polarity of the current interface. -+ * @ hs_polarity: HSYNC Polarity configuration for current interface. -+ * @ vs_polarity: VSYNC Polarity configuration for current interface. -+ */ -+struct mt9v113_platform_data { -+ char *master; -+ int (*power_set) (struct v4l2_int_device *s, enum v4l2_power on); -+ int (*ifparm) (struct v4l2_ifparm *p); -+ int (*priv_data_set) (void *); -+ /* Interface control params */ -+ bool clk_polarity; -+ bool hs_polarity; -+ bool vs_polarity; -+}; -+ -+// new -+ -+/*i2c adress for MT9V113*/ -+#define MT9V113_I2C_ADDR (0x78 >>1) -+ -+#define I2C_ONE_BYTE_TRANSFER (1) -+#define I2C_TWO_BYTE_TRANSFER (2) -+#define I2C_THREE_BYTE_TRANSFER (3) -+#define I2C_FOUR_BYTE_TRANSFER (4) -+#define I2C_TXRX_DATA_MASK (0x00FF) -+#define I2C_TXRX_DATA_MASK_UPPER (0xFF00) -+#define I2C_TXRX_DATA_SHIFT (8) -+ -+#define MT9V113_VGA_30FPS (1130) -+#define MT9V113_QVGA_30FPS (1131) -+ -+#define MT9V113_CLK_MAX (54000000) /* 54MHz */ -+#define MT9V113_CLK_MIN (6000000) /* 6Mhz */ -+ -+#endif /* ifndef _MT9V113_H */ -+ -diff --git a/include/media/v4l2-int-device.h b/include/media/v4l2-int-device.h -index ce415ec..7827575 100644 ---- a/include/media/v4l2-int-device.h -+++ b/include/media/v4l2-int-device.h -@@ -115,6 +115,7 @@ enum v4l2_if_type { - V4L2_IF_TYPE_BT656, - V4L2_IF_TYPE_YCbCr, - V4L2_IF_TYPE_RAW, -+ V4L2_IF_TYPE_PARALLEL, - }; - - enum v4l2_if_type_bt656_mode { -@@ -215,12 +216,38 @@ struct v4l2_if_type_raw { - u32 clock_curr; - }; - -+struct v4l2_if_type_parallel { -+ /* -+ * 0: Frame begins when vsync is high. -+ * 1: Frame begins when vsync changes from low to high. -+ */ -+ unsigned frame_start_on_rising_vs:1; -+ /* Swap every two adjacent image data elements. */ -+ unsigned swap:1; -+ /* Inverted latch clock polarity from slave. */ -+ unsigned latch_clk_inv:1; -+ /* Hs polarity. 0 is active high, 1 active low. */ -+ unsigned no_hs_inv:1; -+ /* Vs polarity. 0 is active high, 1 active low. */ -+ unsigned no_vs_inv:1; -+ /* Minimum accepted bus clock for slave (in Hz). */ -+ u32 clock_min; -+ /* Maximum accepted bus clock for slave. */ -+ u32 clock_max; -+ /* -+ * Current wish of the slave. May only change in response to -+ * ioctls that affect image capture. -+ */ -+ u32 clock_curr; -+}; -+ - struct v4l2_ifparm { - enum v4l2_if_type if_type; - union { - struct v4l2_if_type_bt656 bt656; - struct v4l2_if_type_ycbcr ycbcr; - struct v4l2_if_type_raw raw; -+ struct v4l2_if_type_parallel parallel; - } u; - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0032-MT9V113-Fixed-sensor-nitialization-issues.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0032-MT9V113-Fixed-sensor-nitialization-issues.patch deleted file mode 100644 index 72d9aa6..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0032-MT9V113-Fixed-sensor-nitialization-issues.patch +++ /dev/null @@ -1,294 +0,0 @@ -From d35c02203462b5c94c7be1abeba9be2a175646fe Mon Sep 17 00:00:00 2001 -From: Vaibhav Hiremath <hvaibhav@ti.com> -Date: Fri, 9 Jul 2010 17:38:09 +0530 -Subject: [PATCH 32/75] MT9V113: Fixed sensor nitialization issues - -With this patch sensor is now able to generate HS, VS and pixel clock, also -CCDC is able to generate HS/VS, VD0, VD1 interrupts. - -There are some issues with Buffer processing in ISR routine because of which -DQBUF still hangs. ---- - drivers/media/video/mt9v113.c | 155 ++++++++++++++++++++---------------- - drivers/media/video/omap34xxcam.c | 2 +- - 2 files changed, 87 insertions(+), 70 deletions(-) - -diff --git a/drivers/media/video/mt9v113.c b/drivers/media/video/mt9v113.c -index 755a88a..8f8ba35 100644 ---- a/drivers/media/video/mt9v113.c -+++ b/drivers/media/video/mt9v113.c -@@ -389,8 +389,8 @@ static int mt9v113_read_reg(struct i2c_client *client, unsigned short reg) - err = -ENODEV; - return err; - }else { -- // TODO: addr should be set up where else -- msg->addr = MT9V113_I2C_ADDR;//client->addr; -+ /* TODO: addr should be set up where else client->addr */ -+ msg->addr = MT9V113_I2C_ADDR; - msg->flags = 0; - msg->len = I2C_TWO_BYTE_TRANSFER; - msg->buf = data; -@@ -432,8 +432,8 @@ static int mt9v113_write_reg(struct i2c_client *client, unsigned short reg, unsi - if (!client->adapter) { - err = -ENODEV; - } else { -- // TODO: addr should be set up where else -- msg->addr = MT9V113_I2C_ADDR;//client->addr; -+ /* TODO:addr should be set up where else client->addr */ -+ msg->addr = MT9V113_I2C_ADDR; - msg->flags = 0; - msg->len = I2C_FOUR_BYTE_TRANSFER; - msg->buf = data; -@@ -446,51 +446,11 @@ static int mt9v113_write_reg(struct i2c_client *client, unsigned short reg, unsi - err = i2c_transfer(client->adapter, msg, 1); - } - } -- if (err < 0) { -+ if (err < 0) - printk(KERN_INFO "\n I2C write failed"); -- } -- return err; --} -- --/* configure mux, for DM355 EVM only */ --#ifndef CONFIG_MACH_DM355_LEOPARD --static int mt9v113_en_mux(struct i2c_client *client) --{ -- int err = 0; -- int trycnt = 0; -- /* unsigned short readval = 0;*/ -- -- struct i2c_msg msg[1]; -- unsigned char data[4]; -- err = -1; -- printk(KERN_INFO -- "\n entering mt9v113_en_mux \n"); -- -- while ((err < 0) && (trycnt < 5)) { -- trycnt++; -- if (!client->adapter) { -- err = -ENODEV; -- } else { -- msg->addr = 0x25; -- msg->flags = 0; -- msg->len = I2C_TWO_BYTE_TRANSFER; -- msg->buf = data; -- data[0] = (unsigned char)(0x08 & I2C_TXRX_DATA_MASK); -- data[1] = (unsigned char)(0x80 & I2C_TXRX_DATA_MASK); - -- err = i2c_transfer(client->adapter, msg, 1); -- if (err < 0) { -- printk(KERN_INFO -- "\n ERROR in ECP register write\n"); -- } -- } -- } -- if (err < 0) { -- printk(KERN_INFO "\n I2C write failed"); -- } - return err; - } --#endif - - /* - * mt9v113_write_regs : Initializes a list of registers -@@ -550,9 +510,10 @@ static int mt9v113_configure(struct mt9v113_decoder *decoder) - if (err) - return err; - --// if (debug) --// mt9v113_reg_dump(decoder); -- -+#if 0 -+ if (debug) -+ mt9v113_reg_dump(decoder); -+#endif - return 0; - } - -@@ -573,6 +534,62 @@ static int mt9v113_vga_mode(struct mt9v113_decoder *decoder) - } - - -+/** -+ * ioctl_enum_framesizes - V4L2 sensor if handler for vidioc_int_enum_framesizes -+ * @s: pointer to standard V4L2 device structure -+ * @frms: pointer to standard V4L2 framesizes enumeration structure -+ * -+ * Returns possible framesizes depending on choosen pixel format -+ **/ -+static int ioctl_enum_framesizes(struct v4l2_int_device *s, -+ struct v4l2_frmsizeenum *frms) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int ifmt; -+ -+ for (ifmt = 0; ifmt < decoder->num_fmts; ifmt++) { -+ if (frms->pixel_format == decoder->fmt_list[ifmt].pixelformat) -+ break; -+ } -+ /* Is requested pixelformat not found on sensor? */ -+ if (ifmt == decoder->num_fmts) -+ return -EINVAL; -+ -+ /* Do we already reached all discrete framesizes? */ -+ if (frms->index >= decoder->num_stds) -+ return -EINVAL; -+ -+ frms->type = V4L2_FRMSIZE_TYPE_DISCRETE; -+ frms->discrete.width = decoder->std_list[frms->index].width; -+ frms->discrete.height = decoder->std_list[frms->index].height; -+ -+ return 0; -+ -+} -+ -+static int ioctl_enum_frameintervals(struct v4l2_int_device *s, -+ struct v4l2_frmivalenum *frmi) -+{ -+ struct mt9v113_decoder *decoder = s->priv; -+ int ifmt; -+ -+ if (frmi->index >= 1) -+ return -EINVAL; -+ -+ for (ifmt = 0; ifmt < decoder->num_fmts; ifmt++) { -+ if (frmi->pixel_format == decoder->fmt_list[ifmt].pixelformat) -+ break; -+ } -+ /* Is requested pixelformat not found on sensor? */ -+ if (ifmt == decoder->num_fmts) -+ return -EINVAL; -+ -+ frmi->type = V4L2_FRMSIZE_TYPE_DISCRETE; -+ frmi->discrete.numerator = 1; -+ frmi->discrete.denominator = 10; -+ return 0; -+} -+ - /* - * Detect if an mt9v113 is present, and if so which revision. - * A device is considered to be detected if the chip ID (LSB and MSB) -@@ -585,15 +602,9 @@ static int mt9v113_detect(struct mt9v113_decoder *decoder) - { - unsigned short val=0; - --#ifndef CONFIG_MACH_DM355_LEOPARD --// mt9v113_en_mux(decoder->client); --#endif -- - val = mt9v113_read_reg(decoder->client, REG_CHIP_ID); - -- v4l_dbg(1, debug, decoder->client, -- "chip id detected 0x%x\n", -- val); -+ v4l_dbg(1, debug, decoder->client, "chip id detected 0x%x\n", val); - - if (MT9V113_CHIP_ID != val) { - /* We didn't read the values we expected, so this must not be -@@ -1042,7 +1053,7 @@ ioctl_s_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) - if (rval) - return rval; - -- decoder->pix = *pix; -+ decoder->pix = *pix; - - return rval; - } -@@ -1177,7 +1188,7 @@ static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) - return rval; - } - -- p->u.bt656.clock_curr = 27000000; // TODO: read clock rate from sensor -+ p->u.bt656.clock_curr = 27000000; /* TODO:read clock rate from sensor */ - - return 0; - } -@@ -1211,12 +1222,17 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - struct mt9v113_decoder *decoder = s->priv; - int err = 0; - -+ if (decoder->state == STATE_DETECTED) -+ return 0; -+ - switch (on) { - case V4L2_POWER_OFF: - /* Power Down Sequence */ -- err = -- mt9v113_write_reg(decoder->client, REG_OPERATION_MODE, -- 0x01); -+/* TODO: FIXME: implement proper OFF and Standby code here */ -+#if 0 -+ err = mt9v113_write_reg(decoder->client, REG_OPERATION_MODE, -+ 0x01); -+#endif - /* Disable mux for mt9v113 data path */ - if (decoder->pdata->power_set) - err |= decoder->pdata->power_set(s, on); -@@ -1242,9 +1258,10 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - "Unable to detect decoder\n"); - return err; - } -+ /* Only VGA mode for now */ -+ err |= mt9v113_configure(decoder); -+ err |= mt9v113_vga_mode(decoder); - } -- // Only VGA mode for now -- err |= mt9v113_vga_mode(decoder); - break; - - default: -@@ -1263,14 +1280,11 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - */ - static int ioctl_init(struct v4l2_int_device *s) - { --// struct mt9v113_decoder *decoder = s->priv; -+ struct mt9v113_decoder *decoder = s->priv; - int err = 0; - -- /* Set default standard to auto */ -- //mt9v113_reg_list[REG_VIDEO_STD].val = -- // VIDEO_STD_AUTO_SWITCH_BIT; --// err |= mt9v113_configure(decoder); --// err |= mt9v113_vga_mode(decoder); -+ err |= mt9v113_configure(decoder); -+ err |= mt9v113_vga_mode(decoder); - - return err; - } -@@ -1298,7 +1312,6 @@ static int ioctl_dev_init(struct v4l2_int_device *s) - struct mt9v113_decoder *decoder = s->priv; - int err; - -- printk("%s: %d\n", __func__, __LINE__); - err = mt9v113_detect(decoder); - if (err < 0) { - v4l_err(decoder->client, -@@ -1340,6 +1353,10 @@ static struct v4l2_int_ioctl_desc mt9v113_ioctl_desc[] = { - {vidioc_int_s_std_num, (v4l2_int_ioctl_func *) ioctl_s_std}, - {vidioc_int_s_video_routing_num, - (v4l2_int_ioctl_func *) ioctl_s_routing}, -+ {vidioc_int_enum_framesizes_num, -+ (v4l2_int_ioctl_func *)ioctl_enum_framesizes}, -+ {vidioc_int_enum_frameintervals_num, -+ (v4l2_int_ioctl_func *)ioctl_enum_frameintervals}, - }; - - static struct v4l2_int_slave mt9v113_slave = { -diff --git a/drivers/media/video/omap34xxcam.c b/drivers/media/video/omap34xxcam.c -index 6301ed3..2e8153b 100644 ---- a/drivers/media/video/omap34xxcam.c -+++ b/drivers/media/video/omap34xxcam.c -@@ -1852,8 +1852,8 @@ static int omap34xxcam_open(struct file *file) - vdev->slave_config[OMAP34XXCAM_SLAVE_SENSOR] - .cur_input = route.input; - } -- sensor_format.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - } -+ sensor_format.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - - /* Get the format the sensor is using. */ - rval = vidioc_int_g_fmt_cap(vdev->vdev_sensor, &sensor_format); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0033-mt9v113-Fix-wrong-active-widths.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0033-mt9v113-Fix-wrong-active-widths.patch deleted file mode 100644 index 06eec34..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0033-mt9v113-Fix-wrong-active-widths.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 54295e317df7f12a7b9e4f5a55f4801717863bb1 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 9 Jul 2010 16:22:38 -0500 -Subject: [PATCH 33/75] mt9v113: Fix wrong active widths - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - include/media/mt9v113.h | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/include/media/mt9v113.h b/include/media/mt9v113.h -index c7ad362..0a30f4c 100644 ---- a/include/media/mt9v113.h -+++ b/include/media/mt9v113.h -@@ -35,9 +35,9 @@ - #define MT9V113_MODULE_NAME "mt9v113" - - /* Number of pixels and number of lines per frame for different standards */ --#define VGA_NUM_ACTIVE_PIXELS (640*2) -+#define VGA_NUM_ACTIVE_PIXELS (640) - #define VGA_NUM_ACTIVE_LINES (480) --#define QVGA_NUM_ACTIVE_PIXELS (320*2) -+#define QVGA_NUM_ACTIVE_PIXELS (320) - #define QVGA_NUM_ACTIVE_LINES (240) - - /** --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0034-omap3isp-Fix-Wrong-check-on-non-interlaced-sensor-on.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0034-omap3isp-Fix-Wrong-check-on-non-interlaced-sensor-on.patch deleted file mode 100644 index 6bf1824..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0034-omap3isp-Fix-Wrong-check-on-non-interlaced-sensor-on.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 0cd100387c233429ce2b9c8ceb7a36e900785fce Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 9 Jul 2010 16:56:18 -0500 -Subject: [PATCH 34/75] omap3isp: Fix Wrong check on non-interlaced sensor on isr - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/isp/isp.c | 9 +++++---- - 1 files changed, 5 insertions(+), 4 deletions(-) - -diff --git a/drivers/media/video/isp/isp.c b/drivers/media/video/isp/isp.c -index 29dd005..2ef2d58 100644 ---- a/drivers/media/video/isp/isp.c -+++ b/drivers/media/video/isp/isp.c -@@ -978,11 +978,12 @@ static irqreturn_t omap34xx_isp_isr(int irq, void *_pdev) - } - - if (irqstatus & CCDC_VD0) { -- if (isp->pipeline.pix.field == V4L2_FIELD_INTERLACED) { -+ if (((isp->pipeline.pix.field == V4L2_FIELD_INTERLACED) && -+ (isp->current_field != 0)) || -+ (isp->pipeline.pix.field != V4L2_FIELD_INTERLACED)) { - /* Skip even fields, and process only odd fields */ -- if (isp->current_field != 0) -- if (RAW_CAPTURE(isp)) -- isp_buf_process(dev, bufs); -+ if (RAW_CAPTURE(isp)) -+ isp_buf_process(dev, bufs); - } - if (!ispccdc_busy(&isp->isp_ccdc)) - ispccdc_config_shadow_registers(&isp->isp_ccdc); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0035-omap3isp-Fix-bad-YUV_BT-checks-in-datapath_config.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0035-omap3isp-Fix-bad-YUV_BT-checks-in-datapath_config.patch deleted file mode 100644 index e0be1a8..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0035-omap3isp-Fix-bad-YUV_BT-checks-in-datapath_config.patch +++ /dev/null @@ -1,45 +0,0 @@ -From d9c512d63c23d8f60e897357263bef4668660b13 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Sat, 10 Jul 2010 09:51:16 -0500 -Subject: [PATCH 35/75] omap3isp: Fix bad YUV_BT checks in datapath_config - -The use of an external write enable signals (from ISP point of -view) shouldn't depend on the sensor parallel interface type. - -Also, the bit shift selection should NOT be other than 9_0 by -default (i.e. No shift). - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/isp/ispccdc.c | 15 +++++---------- - 1 files changed, 5 insertions(+), 10 deletions(-) - -diff --git a/drivers/media/video/isp/ispccdc.c b/drivers/media/video/isp/ispccdc.c -index 137a5e6..ea6d87c 100644 ---- a/drivers/media/video/isp/ispccdc.c -+++ b/drivers/media/video/isp/ispccdc.c -@@ -602,16 +602,11 @@ static int ispccdc_config_datapath(struct isp_ccdc_device *isp_ccdc, - syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR; - syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ; - syn_mode |= ISPCCDC_SYN_MODE_WEN; -- if (pipe->ccdc_in == CCDC_YUV_BT) { -- syn_mode &= ~ISPCCDC_SYN_MODE_EXWEN; -- isp_reg_and(isp_ccdc->dev, OMAP3_ISP_IOMEM_CCDC, -- ISPCCDC_CFG, ~ISPCCDC_CFG_WENLOG); -- } else { -- syn_mode |= ISPCCDC_SYN_MODE_EXWEN; -- isp_reg_or(isp_ccdc->dev, OMAP3_ISP_IOMEM_CCDC, -- ISPCCDC_CFG, ISPCCDC_CFG_WENLOG); -- } -- vpcfg.bitshift_sel = BIT11_2; -+ syn_mode &= ~ISPCCDC_SYN_MODE_EXWEN; -+ -+ isp_reg_and(isp_ccdc->dev, OMAP3_ISP_IOMEM_CCDC, -+ ISPCCDC_CFG, ~ISPCCDC_CFG_WENLOG); -+ vpcfg.bitshift_sel = BIT9_0; - vpcfg.freq_sel = PIXCLKBY2; - ispccdc_config_vp(isp_ccdc, vpcfg); - ispccdc_enable_vp(isp_ccdc, 0); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0036-omap3isp-Set-vd_pol-to-0-by-default-on-all-cases.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0036-omap3isp-Set-vd_pol-to-0-by-default-on-all-cases.patch deleted file mode 100644 index f5ceb0d..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0036-omap3isp-Set-vd_pol-to-0-by-default-on-all-cases.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 5f87765bb16091048e67bc56f7ce1ab0694d9186 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Sat, 10 Jul 2010 09:57:40 -0500 -Subject: [PATCH 36/75] omap3isp: Set vd_pol to 0 by default on all cases - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/isp/ispccdc.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/media/video/isp/ispccdc.c b/drivers/media/video/isp/ispccdc.c -index ea6d87c..b4691c0 100644 ---- a/drivers/media/video/isp/ispccdc.c -+++ b/drivers/media/video/isp/ispccdc.c -@@ -671,7 +671,7 @@ static int ispccdc_config_datapath(struct isp_ccdc_device *isp_ccdc, - syncif.fldstat = 0; - syncif.hdpol = 0; - syncif.ipmod = YUV16; -- syncif.vdpol = 1; -+ syncif.vdpol = 0; - syncif.bt_r656_en = 0; - ispccdc_config_imgattr(isp_ccdc, 0); - ispccdc_config_sync_if(isp_ccdc, syncif); -@@ -688,7 +688,7 @@ static int ispccdc_config_datapath(struct isp_ccdc_device *isp_ccdc, - syncif.fldstat = 0; - syncif.hdpol = 0; - syncif.ipmod = YUV8; -- syncif.vdpol = 1; -+ syncif.vdpol = 0; - syncif.bt_r656_en = 1; - ispccdc_config_imgattr(isp_ccdc, 0); - ispccdc_config_sync_if(isp_ccdc, syncif); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0037-omap3isp-ccdc-Set-datalines-to-10-for-YUV_SYNC.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0037-omap3isp-ccdc-Set-datalines-to-10-for-YUV_SYNC.patch deleted file mode 100644 index 12e5960..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0037-omap3isp-ccdc-Set-datalines-to-10-for-YUV_SYNC.patch +++ /dev/null @@ -1,29 +0,0 @@ -From d9c257a16e4f4c5c6bff57cbe3b9673d3cf61bfa Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Mon, 12 Jul 2010 14:09:38 -0500 -Subject: [PATCH 37/75] omap3isp: ccdc: Set datalines to 10 for YUV_SYNC - -Most of the sensors we use are 10 bits, so set this as -default. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/isp/ispccdc.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/media/video/isp/ispccdc.c b/drivers/media/video/isp/ispccdc.c -index b4691c0..280a721 100644 ---- a/drivers/media/video/isp/ispccdc.c -+++ b/drivers/media/video/isp/ispccdc.c -@@ -664,7 +664,7 @@ static int ispccdc_config_datapath(struct isp_ccdc_device *isp_ccdc, - case CCDC_YUV_SYNC: - syncif.ccdc_mastermode = 0; - syncif.datapol = 0; -- syncif.datsz = DAT8; -+ syncif.datsz = DAT10; - syncif.fldmode = 0; - syncif.fldout = 0; - syncif.fldpol = 0; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0038-omap3beagle-camera-Fix-parallel-i-f-settings.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0038-omap3beagle-camera-Fix-parallel-i-f-settings.patch deleted file mode 100644 index a958971..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0038-omap3beagle-camera-Fix-parallel-i-f-settings.patch +++ /dev/null @@ -1,43 +0,0 @@ -From cd05a2c5c623cc497f0d56b35b29d28a9206a3bd Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Mon, 12 Jul 2010 14:11:44 -0500 -Subject: [PATCH 38/75] omap3beagle: camera: Fix parallel i/f settings - -This makes the sensor input be shifted from 13:4 -> 9:0, as -in YUV streaming, the 8 least significant pins are used. - -Also, activate the 8 to 16 bit conversion bridge in ISP, in -big endian mode. - -This makes the ISP interpret the data correctly now. ;) - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 6c06265..0a591a1 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -64,7 +64,7 @@ static struct regulator *beagle_mt9v113_1_8v2; - - static struct isp_interface_config mt9v113_if_config = { - .ccdc_par_ser = ISP_PARLL, -- .dataline_shift = 0x0, -+ .dataline_shift = 0x2, - .hsvs_syncdetect = ISPCTRL_SYNC_DETECT_VSRISE, - .strobe = 0x0, - .prestrobe = 0x0, -@@ -72,7 +72,7 @@ static struct isp_interface_config mt9v113_if_config = { - .cam_mclk = ISP_MT9V113_MCLK, - .wenlog = ISPCCDC_CFG_WENLOG_AND, - .wait_hs_vs = 2, -- .u.par.par_bridge = 0x1, -+ .u.par.par_bridge = 0x3, - .u.par.par_clk_pol = 0x0, - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0039-omap3beagle-camera-Clean-up-Remove-unneccessary-code.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0039-omap3beagle-camera-Clean-up-Remove-unneccessary-code.patch deleted file mode 100644 index 77b19fa..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0039-omap3beagle-camera-Clean-up-Remove-unneccessary-code.patch +++ /dev/null @@ -1,118 +0,0 @@ -From 6466bc74ab74cafb6aec47040b3408fc2be3455b Mon Sep 17 00:00:00 2001 -From: Vaibhav Hiremath <hvaibhav@ti.com> -Date: Tue, 13 Jul 2010 19:38:51 +0530 -Subject: [PATCH 39/75] omap3beagle-camera:Clean up: Remove unneccessary code/printf - -Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 25 +++-------------------- - 1 files changed, 4 insertions(+), 21 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 0a591a1..be59040 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -77,7 +77,7 @@ static struct isp_interface_config mt9v113_if_config = { - }; - - static struct v4l2_ifparm mt9v113_ifparm_s = { --#if 1 -+#if 0 - .if_type = V4L2_IF_TYPE_RAW, - .u = { - .raw = { -@@ -192,32 +192,24 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - - /* turn on VDD */ - regulator_enable(beagle_mt9v113_1_8v1); -- - mdelay(1); -- - /* turn on VDD_IO */ - regulator_enable(beagle_mt9v113_1_8v2); -- - mdelay(50); - - /* Enable EXTCLK */ - isp_set_xclk(vdev->cam->isp, MT9V113_CLK_MIN, CAM_USE_XCLKA); -- - /* - * Wait at least 70 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): - * ((1000000 * 70) / 6000000) = aprox 12 us. - */ -- - udelay(12); -- - /* Set RESET_BAR to 1 */ - gpio_set_value(LEOPARD_RESET_GPIO, 1); -- - /* - * Wait at least 100 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): - * ((1000000 * 100) / 6000000) = aprox 17 us. - */ -- - udelay(17); - - break; -@@ -245,15 +237,11 @@ struct mt9v113_platform_data mt9v113_pdata = { - - static int beagle_cam_probe(struct platform_device *pdev) - { -- int err; -- -- printk("%s:%d\n", __func__, __LINE__); - beagle_mt9v113_1_8v1 = regulator_get(&pdev->dev, "vaux3_1"); - if (IS_ERR(beagle_mt9v113_1_8v1)) { - dev_err(&pdev->dev, "vaux3_1 regulator missing\n"); - return PTR_ERR(beagle_mt9v113_1_8v1); - } -- printk("%s:%d\n", __func__, __LINE__); - beagle_mt9v113_1_8v2 = regulator_get(&pdev->dev, "vaux4_1"); - if (IS_ERR(beagle_mt9v113_1_8v2)) { - dev_err(&pdev->dev, "vaux4_1 regulator missing\n"); -@@ -261,7 +249,6 @@ static int beagle_cam_probe(struct platform_device *pdev) - return PTR_ERR(beagle_mt9v113_1_8v2); - } - -- printk("%s:%d\n", __func__, __LINE__); - if (gpio_request(LEOPARD_RESET_GPIO, "cam_rst") != 0) { - dev_err(&pdev->dev, "Could not request GPIO %d", - LEOPARD_RESET_GPIO); -@@ -270,7 +257,6 @@ static int beagle_cam_probe(struct platform_device *pdev) - return -ENODEV; - } - -- printk("%s:%d\n", __func__, __LINE__); - /* set to output mode, default value 0 */ - gpio_direction_output(LEOPARD_RESET_GPIO, 0); - -@@ -281,10 +267,10 @@ static int beagle_cam_probe(struct platform_device *pdev) - - static int beagle_cam_remove(struct platform_device *pdev) - { -- printk("%s:%d\n", __func__, __LINE__); - if (regulator_is_enabled(beagle_mt9v113_1_8v1)) - regulator_disable(beagle_mt9v113_1_8v1); - regulator_put(beagle_mt9v113_1_8v1); -+ - if (regulator_is_enabled(beagle_mt9v113_1_8v2)) - regulator_disable(beagle_mt9v113_1_8v2); - regulator_put(beagle_mt9v113_1_8v2); -@@ -360,12 +346,9 @@ static struct platform_driver beagle_cam_driver = { - */ - int __init omap3beaglelmb_init(void) - { -- printk("%s:%d\n", __func__, __LINE__); -- if (cpu_is_omap3630()) { -- printk("%s:%d\n", __func__, __LINE__); -+ if (cpu_is_omap3630()) - platform_driver_register(&beagle_cam_driver); -- } -- printk("%s:%d\n", __func__, __LINE__); -+ - return 0; - } - late_initcall(omap3beaglelmb_init); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0040-mt9v113-Clean-Up-Remove-unneccessary-code-printf.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0040-mt9v113-Clean-Up-Remove-unneccessary-code-printf.patch deleted file mode 100644 index 8012160..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0040-mt9v113-Clean-Up-Remove-unneccessary-code-printf.patch +++ /dev/null @@ -1,390 +0,0 @@ -From 9c9215eade28a09ac12888e9a02af107955009c5 Mon Sep 17 00:00:00 2001 -From: Vaibhav Hiremath <hvaibhav@ti.com> -Date: Tue, 13 Jul 2010 19:39:34 +0530 -Subject: [PATCH 40/75] mt9v113:Clean Up: Remove unneccessary code/printf - -Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> ---- - drivers/media/video/mt9v113.c | 105 ++++++++++++++++------------------------ - 1 files changed, 42 insertions(+), 63 deletions(-) - -diff --git a/drivers/media/video/mt9v113.c b/drivers/media/video/mt9v113.c -index 8f8ba35..9a86cce 100644 ---- a/drivers/media/video/mt9v113.c -+++ b/drivers/media/video/mt9v113.c -@@ -22,10 +22,10 @@ - #include <linux/i2c.h> - #include <linux/delay.h> - #include <linux/videodev2.h> -+#include <linux/io.h> -+ - #include <media/v4l2-int-device.h> - #include <media/mt9v113.h> --#include <mach/hardware.h> --#include <linux/io.h> - - #include "mt9v113_regs.h" - -@@ -34,21 +34,13 @@ - - /* Private macros for TVP */ - #define I2C_RETRY_COUNT (5) --#define LOCK_RETRY_COUNT (5) --#define LOCK_RETRY_DELAY (200) - - /* Debug functions */ - static int debug = 1; - module_param(debug, bool, 0644); - MODULE_PARM_DESC(debug, "Debug level (0-1)"); - --#define dump_reg(client, reg, val) \ -- do { \ -- val = mt9v113_read_reg(client, reg); \ -- v4l_info(client, "Reg(0x%.2X): 0x%.2X\n", reg, val); \ -- } while (0) -- --/** -+/* - * enum mt9v113_std - enum for supported standards - */ - enum mt9v113_std { -@@ -57,7 +49,7 @@ enum mt9v113_std { - MT9V113_STD_INVALID - }; - --/** -+/* - * enum mt9v113_state - enum for different decoder states - */ - enum mt9v113_state { -@@ -65,7 +57,7 @@ enum mt9v113_state { - STATE_DETECTED - }; - --/** -+/* - * struct mt9v113_std_info - Structure to store standard informations - * @width: Line width in pixels - * @height:Number of active lines -@@ -79,7 +71,7 @@ struct mt9v113_std_info { - struct v4l2_standard standard; - }; - --/** -+/* - * struct mt9v113_decoded - decoder object - * @v4l2_int_device: Slave handle - * @pdata: Board specific -@@ -93,7 +85,6 @@ struct mt9v113_std_info { - * @current_std: Current standard - * @num_stds: Number of standards - * @std_list: Standards list -- * @route: input and output routing at chip level - */ - struct mt9v113_decoder { - struct v4l2_int_device *v4l2_int_device; -@@ -112,8 +103,6 @@ struct mt9v113_decoder { - enum mt9v113_std current_std; - int num_stds; - struct mt9v113_std_info *std_list; -- -- struct v4l2_routing route; - }; - - /* MT9V113 register set for VGA mode */ -@@ -160,7 +149,7 @@ static struct mt9v113_reg mt9v113_reg_list[] = { - {TOK_WRITE, 0x0016, 0x42DF}, - {TOK_WRITE, 0x0014, 0x2145}, - {TOK_WRITE, 0x0014, 0x2145}, -- {TOK_WRITE, 0x0010, 0x0431}, -+ {TOK_WRITE, 0x0010, 0x0231}, - {TOK_WRITE, 0x0012, 0x0000}, - {TOK_WRITE, 0x0014, 0x244B}, - {TOK_WRITE, 0x0014, 0x304B}, -@@ -378,6 +367,10 @@ static const struct v4l2_queryctrl mt9v113_autogain_ctrl = { - .default_value = 1, - }; - -+const struct v4l2_fract mt9v113_frameintervals[] = { -+ { .numerator = 1, .denominator = 10 } -+}; -+ - static int mt9v113_read_reg(struct i2c_client *client, unsigned short reg) - { - int err = 0; -@@ -510,10 +503,6 @@ static int mt9v113_configure(struct mt9v113_decoder *decoder) - if (err) - return err; - --#if 0 -- if (debug) -- mt9v113_reg_dump(decoder); --#endif - return 0; - } - -@@ -534,13 +523,13 @@ static int mt9v113_vga_mode(struct mt9v113_decoder *decoder) - } - - --/** -+/* - * ioctl_enum_framesizes - V4L2 sensor if handler for vidioc_int_enum_framesizes - * @s: pointer to standard V4L2 device structure - * @frms: pointer to standard V4L2 framesizes enumeration structure - * - * Returns possible framesizes depending on choosen pixel format -- **/ -+ */ - static int ioctl_enum_framesizes(struct v4l2_int_device *s, - struct v4l2_frmsizeenum *frms) - { -@@ -584,9 +573,14 @@ static int ioctl_enum_frameintervals(struct v4l2_int_device *s, - if (ifmt == decoder->num_fmts) - return -EINVAL; - -+ if (frmi->index >= ARRAY_SIZE(mt9v113_frameintervals)) -+ return -EINVAL; -+ - frmi->type = V4L2_FRMSIZE_TYPE_DISCRETE; -- frmi->discrete.numerator = 1; -- frmi->discrete.denominator = 10; -+ frmi->discrete.numerator = -+ mt9v113_frameintervals[frmi->index].numerator; -+ frmi->discrete.denominator = -+ mt9v113_frameintervals[frmi->index].denominator; - return 0; - } - -@@ -631,7 +625,7 @@ static int mt9v113_detect(struct mt9v113_decoder *decoder) - * mt9v113 decoder driver. - */ - --/** -+/* - * ioctl_querystd - V4L2 decoder interface handler for VIDIOC_QUERYSTD ioctl - * @s: pointer to standard V4L2 device structure - * @std_id: standard V4L2 std_id ioctl enum -@@ -660,7 +654,7 @@ static int ioctl_querystd(struct v4l2_int_device *s, v4l2_std_id *std_id) - return 0; - } - --/** -+/* - * ioctl_s_std - V4L2 decoder interface handler for VIDIOC_S_STD ioctl - * @s: pointer to standard V4L2 device structure - * @std_id: standard V4L2 v4l2_std_id ioctl enum -@@ -696,7 +690,7 @@ static int ioctl_s_std(struct v4l2_int_device *s, v4l2_std_id *std_id) - return 0; - } - --/** -+/* - * ioctl_s_routing - V4L2 decoder interface handler for VIDIOC_S_INPUT ioctl - * @s: pointer to standard V4L2 device structure - * @index: number of the input -@@ -711,7 +705,7 @@ static int ioctl_s_routing(struct v4l2_int_device *s, - return 0; - } - --/** -+/* - * ioctl_queryctrl - V4L2 decoder interface handler for VIDIOC_QUERYCTRL ioctl - * @s: pointer to standard V4L2 device structure - * @qctrl: standard V4L2 v4l2_queryctrl structure -@@ -771,7 +765,7 @@ ioctl_queryctrl(struct v4l2_int_device *s, struct v4l2_queryctrl *qctrl) - return err; - } - --/** -+/* - * ioctl_g_ctrl - V4L2 decoder interface handler for VIDIOC_G_CTRL ioctl - * @s: pointer to standard V4L2 device structure - * @ctrl: pointer to v4l2_control structure -@@ -828,7 +822,7 @@ ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *ctrl) - return 0; - } - --/** -+/* - * ioctl_s_ctrl - V4L2 decoder interface handler for VIDIOC_S_CTRL ioctl - * @s: pointer to standard V4L2 device structure - * @ctrl: pointer to v4l2_control structure -@@ -936,7 +930,7 @@ ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *ctrl) - return err; - } - --/** -+/* - * ioctl_enum_fmt_cap - Implement the CAPTURE buffer VIDIOC_ENUM_FMT ioctl - * @s: pointer to standard V4L2 device structure - * @fmt: standard V4L2 VIDIOC_ENUM_FMT ioctl structure -@@ -969,7 +963,7 @@ ioctl_enum_fmt_cap(struct v4l2_int_device *s, struct v4l2_fmtdesc *fmt) - return 0; - } - --/** -+/* - * ioctl_try_fmt_cap - Implement the CAPTURE buffer VIDIOC_TRY_FMT ioctl - * @s: pointer to standard V4L2 device structure - * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure -@@ -1026,7 +1020,7 @@ ioctl_try_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) - return 0; - } - --/** -+/* - * ioctl_s_fmt_cap - V4L2 decoder interface handler for VIDIOC_S_FMT ioctl - * @s: pointer to standard V4L2 device structure - * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure -@@ -1058,7 +1052,7 @@ ioctl_s_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) - return rval; - } - --/** -+/* - * ioctl_g_fmt_cap - V4L2 decoder interface handler for ioctl_g_fmt_cap - * @s: pointer to standard V4L2 device structure - * @f: pointer to standard V4L2 v4l2_format structure -@@ -1087,7 +1081,7 @@ ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) - return 0; - } - --/** -+/* - * ioctl_g_parm - V4L2 decoder interface handler for VIDIOC_G_PARM ioctl - * @s: pointer to standard V4L2 device structure - * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure -@@ -1125,7 +1119,7 @@ ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) - return 0; - } - --/** -+/* - * ioctl_s_parm - V4L2 decoder interface handler for VIDIOC_S_PARM ioctl - * @s: pointer to standard V4L2 device structure - * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure -@@ -1161,7 +1155,7 @@ ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) - return 0; - } - --/** -+/* - * ioctl_g_ifparm - V4L2 decoder interface handler for vidioc_int_g_ifparm_num - * @s: pointer to standard V4L2 device structure - * @p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure -@@ -1193,7 +1187,7 @@ static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) - return 0; - } - --/** -+/* - * ioctl_g_priv - V4L2 decoder interface handler for vidioc_int_g_priv_num - * @s: pointer to standard V4L2 device structure - * @p: void pointer to hold decoder's private data address -@@ -1210,7 +1204,7 @@ static int ioctl_g_priv(struct v4l2_int_device *s, void *p) - return decoder->pdata->priv_data_set(p); - } - --/** -+/* - * ioctl_s_power - V4L2 decoder interface handler for vidioc_int_s_power_num - * @s: pointer to standard V4L2 device structure - * @on: power state to which device is to be set -@@ -1272,7 +1266,7 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - return err; - } - --/** -+/* - * ioctl_init - V4L2 decoder interface handler for VIDIOC_INT_INIT - * @s: pointer to standard V4L2 device structure - * -@@ -1289,7 +1283,7 @@ static int ioctl_init(struct v4l2_int_device *s) - return err; - } - --/** -+/* - * ioctl_dev_exit - V4L2 decoder interface handler for vidioc_int_dev_exit_num - * @s: pointer to standard V4L2 device structure - * -@@ -1300,7 +1294,7 @@ static int ioctl_dev_exit(struct v4l2_int_device *s) - return 0; - } - --/** -+/* - * ioctl_dev_init - V4L2 decoder interface handler for vidioc_int_dev_init_num - * @s: pointer to standard V4L2 device structure - * -@@ -1397,7 +1391,7 @@ static struct v4l2_int_device mt9v113_int_device = { - }, - }; - --/** -+/* - * mt9v113_probe - decoder driver i2c probe handler - * @client: i2c driver client device structure - * -@@ -1410,30 +1404,15 @@ mt9v113_probe(struct i2c_client *client, const struct i2c_device_id *id) - struct mt9v113_decoder *decoder = &mt9v113_dev; - int err; - -- printk("%s: %d\n", __func__, __LINE__); - /* Check if the adapter supports the needed features */ - if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) - return -EIO; - -- printk("%s: %d\n", __func__, __LINE__); - decoder->pdata = client->dev.platform_data; - if (!decoder->pdata) { - v4l_err(client, "No platform data!!\n"); - return -ENODEV; - } -- printk("%s: %d\n", __func__, __LINE__); -- /* -- * Fetch platform specific data, and configure the -- * mt9v113_reg_list[] accordingly. Since this is one -- * time configuration, no need to preserve. -- */ -- -- /*mt9v113_reg_list[REG_OUTPUT_FORMATTER2].val |= -- (decoder->pdata->clk_polarity << 1); -- mt9v113_reg_list[REG_SYNC_CONTROL].val |= -- ((decoder->pdata->hs_polarity << 2) | -- (decoder->pdata->vs_polarity << 3)); -- */ - /* - * Save the id data, required for power up sequence - */ -@@ -1458,7 +1437,7 @@ mt9v113_probe(struct i2c_client *client, const struct i2c_device_id *id) - return 0; - } - --/** -+/* - * mt9v113_remove - decoder driver i2c remove handler - * @client: i2c driver client device structure - * -@@ -1511,7 +1490,7 @@ static struct i2c_driver mt9v113_i2c_driver = { - .id_table = mt9v113_id, - }; - --/** -+/* - * mt9v113_init - * - * Module init function -@@ -1521,7 +1500,7 @@ static int __init mt9v113_init(void) - return i2c_add_driver(&mt9v113_i2c_driver); - } - --/** -+/* - * mt9v113_cleanup - * - * Module exit function --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0041-MT9V113-Min-Max-clk-input-changed-as-per-the-spec.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0041-MT9V113-Min-Max-clk-input-changed-as-per-the-spec.patch deleted file mode 100644 index bae5199..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0041-MT9V113-Min-Max-clk-input-changed-as-per-the-spec.patch +++ /dev/null @@ -1,54 +0,0 @@ -From f92ea92f012235a17c04021de470b65aeb7fbe29 Mon Sep 17 00:00:00 2001 -From: Vaibhav Hiremath <hvaibhav@ti.com> -Date: Tue, 13 Jul 2010 19:40:39 +0530 -Subject: [PATCH 41/75] MT9V113: Min, Max clk input changed as per the spec - -Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 2 +- - drivers/media/video/isp/ispreg.h | 2 +- - include/media/mt9v113.h | 2 +- - 3 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index be59040..8d4e5ab 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -198,7 +198,7 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - mdelay(50); - - /* Enable EXTCLK */ -- isp_set_xclk(vdev->cam->isp, MT9V113_CLK_MIN, CAM_USE_XCLKA); -+ isp_set_xclk(vdev->cam->isp, MT9V113_CLK_MIN*2, CAM_USE_XCLKA); - /* - * Wait at least 70 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): - * ((1000000 * 70) / 6000000) = aprox 12 us. -diff --git a/drivers/media/video/isp/ispreg.h b/drivers/media/video/isp/ispreg.h -index 1240e0e..098713e 100644 ---- a/drivers/media/video/isp/ispreg.h -+++ b/drivers/media/video/isp/ispreg.h -@@ -116,7 +116,7 @@ - #define ISP_32B_BOUNDARY_BUF 0xFFFFFFE0 - #define ISP_32B_BOUNDARY_OFFSET 0x0000FFE0 - --#define CM_CAM_MCLK_HZ 172800000 /* Hz */ -+#define CM_CAM_MCLK_HZ 216000000 /* Hz */ - - /* ISP Submodules offset */ - -diff --git a/include/media/mt9v113.h b/include/media/mt9v113.h -index 0a30f4c..4504f26 100644 ---- a/include/media/mt9v113.h -+++ b/include/media/mt9v113.h -@@ -76,7 +76,7 @@ struct mt9v113_platform_data { - #define MT9V113_VGA_30FPS (1130) - #define MT9V113_QVGA_30FPS (1131) - --#define MT9V113_CLK_MAX (54000000) /* 54MHz */ -+#define MT9V113_CLK_MAX (48000000) /* 48MHz */ - #define MT9V113_CLK_MIN (6000000) /* 6Mhz */ - - #endif /* ifndef _MT9V113_H */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0042-omap3beagle-camera-Further-clode-cleanup.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0042-omap3beagle-camera-Further-clode-cleanup.patch deleted file mode 100644 index 8855e6d..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0042-omap3beagle-camera-Further-clode-cleanup.patch +++ /dev/null @@ -1,237 +0,0 @@ -From 7f6cbc648dcf2d7805f12e7b56bb2c7b602ca61d Mon Sep 17 00:00:00 2001 -From: Vaibhav Hiremath <hvaibhav@ti.com> -Date: Wed, 14 Jul 2010 19:07:06 +0530 -Subject: [PATCH 42/75] omap3beagle-camera: Further clode cleanup - -Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 89 ++++-------------------- - drivers/media/video/isp/isp.h | 13 ++++ - 2 files changed, 28 insertions(+), 74 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 8d4e5ab..90eadd0 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -46,21 +46,19 @@ - #include "mux.h" - #include "board-omap3beagle-camera.h" - --#define MODULE_NAME "omap3beaglelmb" -+#define MODULE_NAME "omap3beaglelmb" - --#define CAM_USE_XCLKA 0 -+#define CAM_USE_XCLKA 0 - --#define ISP_MT9V113_MCLK 216000000 -+#define ISP_MT9V113_MCLK 216000000 - --#define LEOPARD_RESET_GPIO 98 -+#define LEOPARD_RESET_GPIO 98 - - static struct regulator *beagle_mt9v113_1_8v1; - static struct regulator *beagle_mt9v113_1_8v2; - --#if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE) -- - /* Arbitrary memory handling limit */ --#define MT9V113_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN(2048 * 1536 * 4) -+#define MT9V113_MAX_FRAME_SIZE PAGE_ALIGN(640 * 480 * 4) - - static struct isp_interface_config mt9v113_if_config = { - .ccdc_par_ser = ISP_PARLL, -@@ -77,21 +75,6 @@ static struct isp_interface_config mt9v113_if_config = { - }; - - static struct v4l2_ifparm mt9v113_ifparm_s = { --#if 0 -- .if_type = V4L2_IF_TYPE_RAW, -- .u = { -- .raw = { -- .frame_start_on_rising_vs = 1, -- .bt_sync_correct = 0, -- .swap = 0, -- .latch_clk_inv = 0, -- .nobt_hs_inv = 0, /* active high */ -- .nobt_vs_inv = 0, /* active high */ -- .clock_min = MT9V113_CLK_MIN, -- .clock_max = MT9V113_CLK_MAX, -- }, -- }, --#else - .if_type = V4L2_IF_TYPE_YCbCr, - .u = { - .ycbcr = { -@@ -99,13 +82,12 @@ static struct v4l2_ifparm mt9v113_ifparm_s = { - .bt_sync_correct = 0, - .swap = 0, - .latch_clk_inv = 0, -- .nobt_hs_inv = 0, /* active high */ -- .nobt_vs_inv = 0, /* active high */ -+ .nobt_hs_inv = 0, -+ .nobt_vs_inv = 0, - .clock_min = MT9V113_CLK_MIN, - .clock_max = MT9V113_CLK_MAX, - }, - }, --#endif - }; - - /** -@@ -124,16 +106,14 @@ static int mt9v113_ifparm(struct v4l2_ifparm *p) - return 0; - } - --#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) - static struct omap34xxcam_hw_config mt9v113_hwc = { - .dev_index = 0, - .dev_minor = 0, - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, - .u.sensor.sensor_isp = 1, -- .u.sensor.capture_mem = MT9V113_BIGGEST_FRAME_BYTE_SIZE * 2, -+ .u.sensor.capture_mem = MT9V113_MAX_FRAME_SIZE * 2, - .u.sensor.ival_default = { 1, 10 }, - }; --#endif - - /** - * @brief mt9v113_set_prv_data - Returns mt9v113 omap34xx driver private data -@@ -144,7 +124,6 @@ static struct omap34xxcam_hw_config mt9v113_hwc = { - */ - static int mt9v113_set_prv_data(void *priv) - { --#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) - struct omap34xxcam_hw_config *hwc = priv; - - if (priv == NULL) -@@ -154,10 +133,8 @@ static int mt9v113_set_prv_data(void *priv) - hwc->dev_index = mt9v113_hwc.dev_index; - hwc->dev_minor = mt9v113_hwc.dev_minor; - hwc->dev_type = mt9v113_hwc.dev_type; -+ - return 0; --#else -- return -EINVAL; --#endif - } - - /** -@@ -172,21 +149,22 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - struct omap34xxcam_videodev *vdev = s->u.slave->master->priv; - - switch (power) { -- case V4L2_POWER_OFF: - case V4L2_POWER_STANDBY: -+ break; -+ -+ case V4L2_POWER_OFF: - isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); - - if (regulator_is_enabled(beagle_mt9v113_1_8v1)) - regulator_disable(beagle_mt9v113_1_8v1); - if (regulator_is_enabled(beagle_mt9v113_1_8v2)) - regulator_disable(beagle_mt9v113_1_8v2); -+ - break; - - case V4L2_POWER_ON: --#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -- isp_configure_interface(vdev->cam->isp, &mt9v113_if_config); --#endif - -+ isp_configure_interface(vdev->cam->isp, &mt9v113_if_config); - /* Set RESET_BAR to 0 */ - gpio_set_value(LEOPARD_RESET_GPIO, 0); - -@@ -216,8 +194,8 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - - default: - return -ENODEV; -- break; - } -+ - return 0; - } - -@@ -232,9 +210,6 @@ struct mt9v113_platform_data mt9v113_pdata = { - .vs_polarity = 1, /* 0 - Active low, 1- Active high */ - }; - --#endif /* #ifdef CONFIG_VIDEO_MT9V113 */ -- -- - static int beagle_cam_probe(struct platform_device *pdev) - { - beagle_mt9v113_1_8v1 = regulator_get(&pdev->dev, "vaux3_1"); -@@ -277,40 +252,6 @@ static int beagle_cam_remove(struct platform_device *pdev) - - gpio_free(LEOPARD_RESET_GPIO); - -- /* MUX init */ -- omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -- 0x10C); /* CAM_HS */ -- omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -- 0x10E); /* CAM_VS */ -- omap_ctrl_writew(OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, -- 0x110); /* CAM_XCLKA */ -- omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -- 0x112); /* CAM_PCLK */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x116); /* CAM_D0 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x118); /* CAM_D1 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x11A); /* CAM_D2 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x11C); /* CAM_D3 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x11E); /* CAM_D4 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x120); /* CAM_D5 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x122); /* CAM_D6 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x124); /* CAM_D7 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x126); /* CAM_D8 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x128); /* CAM_D9 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x12A); /* CAM_D10 */ -- omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -- 0x12C); /* CAM_D11 */ -- - return 0; - } - -diff --git a/drivers/media/video/isp/isp.h b/drivers/media/video/isp/isp.h -index 85c3fa9..4929fad 100644 ---- a/drivers/media/video/isp/isp.h -+++ b/drivers/media/video/isp/isp.h -@@ -482,10 +482,23 @@ int isp_set_callback(struct device *dev, enum isp_callback_type type, - - int isp_unset_callback(struct device *dev, enum isp_callback_type type); - -+#if defined(CONFIG_VIDEO_OMAP3_ISP) - u32 isp_set_xclk(struct device *dev, u32 xclk, u8 xclksel); - - int isp_configure_interface(struct device *dev, - struct isp_interface_config *config); -+#else -+static inline u32 isp_set_xclk(struct device *dev, u32 xclk, u8 xclksel) -+{ -+ return 0; -+} -+static inline int isp_configure_interface(struct device *dev, -+ struct isp_interface_config *config) -+{ -+ return 0; -+} -+ -+#endif - - struct device *isp_get(void); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0043-mt9v113-Settings-from-Aptima-used-to-increase-FPS.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0043-mt9v113-Settings-from-Aptima-used-to-increase-FPS.patch deleted file mode 100644 index af7e4d0..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0043-mt9v113-Settings-from-Aptima-used-to-increase-FPS.patch +++ /dev/null @@ -1,135 +0,0 @@ -From b13a4b53a958c182adf61af6b1ea35826fe97de5 Mon Sep 17 00:00:00 2001 -From: Vaibhav Hiremath <hvaibhav@ti.com> -Date: Wed, 14 Jul 2010 19:07:34 +0530 -Subject: [PATCH 43/75] mt9v113: Settings from Aptima used to increase FPS - -The FPS is still low at around ~15FPS, expected one is 30FPS. - -Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> ---- - drivers/media/video/mt9v113.c | 55 +++++++++++++++++++++++++--------------- - 1 files changed, 34 insertions(+), 21 deletions(-) - -diff --git a/drivers/media/video/mt9v113.c b/drivers/media/video/mt9v113.c -index 9a86cce..466702e 100644 ---- a/drivers/media/video/mt9v113.c -+++ b/drivers/media/video/mt9v113.c -@@ -119,6 +119,21 @@ static struct mt9v113_reg mt9v113_vga_reg[] = { - {TOK_WRITE, 0x0990, 0x0280}, - {TOK_WRITE, 0x098C, 0x2705}, - {TOK_WRITE, 0x0990, 0x01E0}, -+ {TOK_WRITE, 0x098C, 0x2715}, -+ {TOK_WRITE, 0x0990, 0x0001}, -+ {TOK_WRITE, 0x098C, 0x2717}, -+ {TOK_WRITE, 0x0990, 0x0026}, -+ {TOK_WRITE, 0x098C, 0x2719}, -+ {TOK_WRITE, 0x0990, 0x001A}, -+ {TOK_WRITE, 0x098C, 0x271B}, -+ {TOK_WRITE, 0x0990, 0x006B}, -+ {TOK_WRITE, 0x098C, 0x271D}, -+ {TOK_WRITE, 0x0990, 0x006B}, -+ {TOK_WRITE, 0x098C, 0x271F}, -+ {TOK_WRITE, 0x0990, 0x0202}, -+ {TOK_WRITE, 0x098C, 0x2721}, -+ {TOK_WRITE, 0x0990, 0x034A}, -+ - {TOK_WRITE, 0x098C, 0xA103}, - {TOK_WRITE, 0x0990, 0x0005}, - {TOK_DELAY, 0, 100}, -@@ -148,8 +163,7 @@ static struct mt9v113_reg mt9v113_reg_list[] = { - {TOK_WRITE, 0x001E, 0x0777}, - {TOK_WRITE, 0x0016, 0x42DF}, - {TOK_WRITE, 0x0014, 0x2145}, -- {TOK_WRITE, 0x0014, 0x2145}, -- {TOK_WRITE, 0x0010, 0x0231}, -+ {TOK_WRITE, 0x0010, 0x0234}, - {TOK_WRITE, 0x0012, 0x0000}, - {TOK_WRITE, 0x0014, 0x244B}, - {TOK_WRITE, 0x0014, 0x304B}, -@@ -267,29 +281,31 @@ static struct mt9v113_reg mt9v113_reg_list[] = { - {TOK_WRITE, 0x0990, 0x0005}, - {TOK_DELAY, 0, 100}, - {TOK_WRITE, 0x098C, 0x222D}, -- {TOK_WRITE, 0x0990, 0x0088}, -+ {TOK_WRITE, 0x0990, 0x0081}, - {TOK_WRITE, 0x098C, 0xA408}, -- {TOK_WRITE, 0x0990, 0x0020}, -+ {TOK_WRITE, 0x0990, 0x001F}, - {TOK_WRITE, 0x098C, 0xA409}, -- {TOK_WRITE, 0x0990, 0x0023}, -+ {TOK_WRITE, 0x0990, 0x0021}, - {TOK_WRITE, 0x098C, 0xA40A}, -- {TOK_WRITE, 0x0990, 0x0027}, -+ {TOK_WRITE, 0x0990, 0x0025}, - {TOK_WRITE, 0x098C, 0xA40B}, -- {TOK_WRITE, 0x0990, 0x002A}, -+ {TOK_WRITE, 0x0990, 0x0027}, - {TOK_WRITE, 0x098C, 0x2411}, -- {TOK_WRITE, 0x0990, 0x0088}, -+ {TOK_WRITE, 0x0990, 0x0081}, - {TOK_WRITE, 0x098C, 0x2413}, -- {TOK_WRITE, 0x0990, 0x00A4}, -+ {TOK_WRITE, 0x0990, 0x009A}, - {TOK_WRITE, 0x098C, 0x2415}, -- {TOK_WRITE, 0x0990, 0x0088}, -+ {TOK_WRITE, 0x0990, 0x0081}, - {TOK_WRITE, 0x098C, 0x2417}, -- {TOK_WRITE, 0x0990, 0x00A4}, -+ {TOK_WRITE, 0x0990, 0x009A}, - {TOK_WRITE, 0x098C, 0xA404}, - {TOK_WRITE, 0x0990, 0x0010}, - {TOK_WRITE, 0x098C, 0xA40D}, - {TOK_WRITE, 0x0990, 0x0002}, - {TOK_WRITE, 0x098C, 0xA40E}, - {TOK_WRITE, 0x0990, 0x0003}, -+ {TOK_WRITE, 0x098C, 0xA410}, -+ {TOK_WRITE, 0x0990, 0x000A}, - {TOK_WRITE, 0x098C, 0xA103}, - {TOK_WRITE, 0x0990, 0x0006}, - {TOK_DELAY, 0, 100}, -@@ -1216,13 +1232,10 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - struct mt9v113_decoder *decoder = s->priv; - int err = 0; - -- if (decoder->state == STATE_DETECTED) -- return 0; -- - switch (on) { - case V4L2_POWER_OFF: - /* Power Down Sequence */ --/* TODO: FIXME: implement proper OFF and Standby code here */ -+ /* TODO: FIXME: implement proper OFF and Standby code here */ - #if 0 - err = mt9v113_write_reg(decoder->client, REG_OPERATION_MODE, - 0x01); -@@ -1240,10 +1253,10 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - - case V4L2_POWER_ON: - /* Enable mux for mt9v113 data path */ -- if ((decoder->pdata->power_set) && -- (decoder->state == STATE_NOT_DETECTED)) { -+ if (decoder->state == STATE_NOT_DETECTED) { - -- err = decoder->pdata->power_set(s, on); -+ if (decoder->pdata->power_set) -+ err = decoder->pdata->power_set(s, on); - - /* Detect the sensor is not already detected */ - err |= mt9v113_detect(decoder); -@@ -1252,10 +1265,10 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - "Unable to detect decoder\n"); - return err; - } -- /* Only VGA mode for now */ -- err |= mt9v113_configure(decoder); -- err |= mt9v113_vga_mode(decoder); - } -+ /* Only VGA mode for now */ -+ err |= mt9v113_configure(decoder); -+ err |= mt9v113_vga_mode(decoder); - break; - - default: --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0044-mt9v113-AE-param-tuned-to-get-28-30FPS.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0044-mt9v113-AE-param-tuned-to-get-28-30FPS.patch deleted file mode 100644 index bf8347c..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0044-mt9v113-AE-param-tuned-to-get-28-30FPS.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 12b4010768d5bf36bdc1100204be1a9de913d4f4 Mon Sep 17 00:00:00 2001 -From: Vaibhav Hiremath <hvaibhav@ti.com> -Date: Thu, 15 Jul 2010 13:53:03 +0530 -Subject: [PATCH 44/75] mt9v113: AE param tuned to get 28~30FPS - -Please note that with this change we are compromising with -image quality, so should be used only in case of high FPS use-case. ---- - drivers/media/video/mt9v113.c | 8 ++++++++ - 1 files changed, 8 insertions(+), 0 deletions(-) - -diff --git a/drivers/media/video/mt9v113.c b/drivers/media/video/mt9v113.c -index 466702e..6714240 100644 ---- a/drivers/media/video/mt9v113.c -+++ b/drivers/media/video/mt9v113.c -@@ -306,6 +306,14 @@ static struct mt9v113_reg mt9v113_reg_list[] = { - {TOK_WRITE, 0x0990, 0x0003}, - {TOK_WRITE, 0x098C, 0xA410}, - {TOK_WRITE, 0x0990, 0x000A}, -+ -+ {TOK_WRITE, 0x098C, 0xA20C}, -+ {TOK_WRITE, 0x0990, 0x0003}, -+ {TOK_WRITE, 0x098C, 0xA20B}, -+ {TOK_WRITE, 0x0990, 0x0000}, -+ {TOK_WRITE, 0x098C, 0xA215}, -+ {TOK_WRITE, 0x0990, 0x0004}, -+ - {TOK_WRITE, 0x098C, 0xA103}, - {TOK_WRITE, 0x0990, 0x0006}, - {TOK_DELAY, 0, 100}, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0045-omap3beagle-camera-Cleanup-of-boardfile.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0045-omap3beagle-camera-Cleanup-of-boardfile.patch deleted file mode 100644 index f4c6ba0..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0045-omap3beagle-camera-Cleanup-of-boardfile.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 62059bb8a86836a042bf1720a9bc4bdfa301026f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Mon, 12 Jul 2010 15:44:18 -0500 -Subject: [PATCH 45/75] omap3beagle: camera: Cleanup of boardfile - -This removes a lot of dead code. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 51 ++++++++++++++++++------ - arch/arm/mach-omap2/board-omap3beagle-camera.h | 41 ------------------- - 2 files changed, 38 insertions(+), 54 deletions(-) - delete mode 100644 arch/arm/mach-omap2/board-omap3beagle-camera.h - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 90eadd0..befa7d4 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -44,9 +44,6 @@ - #include <../drivers/media/video/isp/ispreg.h> - - #include "mux.h" --#include "board-omap3beagle-camera.h" -- --#define MODULE_NAME "omap3beaglelmb" - - #define CAM_USE_XCLKA 0 - -@@ -129,11 +126,7 @@ static int mt9v113_set_prv_data(void *priv) - if (priv == NULL) - return -EINVAL; - -- hwc->u.sensor = mt9v113_hwc.u.sensor; -- hwc->dev_index = mt9v113_hwc.dev_index; -- hwc->dev_minor = mt9v113_hwc.dev_minor; -- hwc->dev_type = mt9v113_hwc.dev_type; -- -+ *hwc = mt9v113_hwc; - return 0; - } - -@@ -204,10 +197,6 @@ struct mt9v113_platform_data mt9v113_pdata = { - .power_set = mt9v113_power_set, - .priv_data_set = mt9v113_set_prv_data, - .ifparm = mt9v113_ifparm, -- /* Some interface dependent params */ -- .clk_polarity = 0, /* data clocked out on falling edge */ -- .hs_polarity = 1, /* 0 - Active low, 1- Active high */ -- .vs_polarity = 1, /* 0 - Active low, 1- Active high */ - }; - - static int beagle_cam_probe(struct platform_device *pdev) -@@ -217,6 +206,7 @@ static int beagle_cam_probe(struct platform_device *pdev) - dev_err(&pdev->dev, "vaux3_1 regulator missing\n"); - return PTR_ERR(beagle_mt9v113_1_8v1); - } -+ - beagle_mt9v113_1_8v2 = regulator_get(&pdev->dev, "vaux4_1"); - if (IS_ERR(beagle_mt9v113_1_8v2)) { - dev_err(&pdev->dev, "vaux4_1 regulator missing\n"); -@@ -235,7 +225,41 @@ static int beagle_cam_probe(struct platform_device *pdev) - /* set to output mode, default value 0 */ - gpio_direction_output(LEOPARD_RESET_GPIO, 0); - -- printk(KERN_INFO MODULE_NAME ": Driver registration complete \n"); -+ /* MUX init */ -+ omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -+ 0x10C); /* CAM_HS */ -+ omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -+ 0x10E); /* CAM_VS */ -+ omap_ctrl_writew(OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, -+ 0x110); /* CAM_XCLKA */ -+ omap_ctrl_writew(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, -+ 0x112); /* CAM_PCLK */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x116); /* CAM_D0 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x118); /* CAM_D1 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x11A); /* CAM_D2 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x11C); /* CAM_D3 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x11E); /* CAM_D4 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x120); /* CAM_D5 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x122); /* CAM_D6 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x124); /* CAM_D7 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x126); /* CAM_D8 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x128); /* CAM_D9 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x12A); /* CAM_D10 */ -+ omap_ctrl_writew(OMAP_PIN_INPUT | OMAP_MUX_MODE0, -+ 0x12C); /* CAM_D11 */ -+ -+ printk(KERN_INFO "omap3beaglelmb: Driver registration complete\n"); - - return 0; - } -@@ -287,6 +311,7 @@ static struct platform_driver beagle_cam_driver = { - */ - int __init omap3beaglelmb_init(void) - { -+ /* NOTE: Beagle xM boards are the only ones with camera interface */ - if (cpu_is_omap3630()) - platform_driver_register(&beagle_cam_driver); - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.h b/arch/arm/mach-omap2/board-omap3beagle-camera.h -deleted file mode 100644 -index 1026aeb..0000000 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.h -+++ /dev/null -@@ -1,41 +0,0 @@ --/* -- * Copyright (C) 2010 Texas Instruments Inc -- * Author: Sergio Aguirre <saaguirre@ti.com> -- * -- * Based on work done by: -- * Vaibhav Hiremath <hvaibhav@ti.com> -- * Anuj Aggarwal <anuj.aggarwal@ti.com> -- * Sivaraj R <sivaraj@ti.com> -- * -- * This package is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -- */ -- --#ifndef __BOARD_OMAP3BEAGLE_LMB_H_ --#define __BOARD_OMAP3BEAGLE_LMB_H_ -- --/* mux id to enable/disable signal routing to different peripherals */ --enum omap3beaglelmb_mux { -- MUX_TVP5146 = 0, -- MUX_CAMERA_SENSOR, -- MUX_EXP_CAMERA_SENSOR, -- NUM_MUX --}; -- --/* enum to enable or disable mux */ --enum config_mux { -- DISABLE_MUX, -- ENABLE_MUX --}; -- --#endif /* __BOARD_OMAP3BEAGLE_LMB_H_ */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0046-omap3beagle-camera-Cleanup-regulator-usage.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0046-omap3beagle-camera-Cleanup-regulator-usage.patch deleted file mode 100644 index 9f3cbb2..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0046-omap3beagle-camera-Cleanup-regulator-usage.patch +++ /dev/null @@ -1,172 +0,0 @@ -From d3ea23ea580848bb5e0ed423db4d914661cd1d7d Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Mon, 12 Jul 2010 15:53:44 -0500 -Subject: [PATCH 46/75] omap3beagle: camera: Cleanup regulator usage - -We were missing the point of regulator abstraction layer. - -Camera board file shouldn't be aware of what vaux is using, but -just asking for a specific power supply (for cam_1v8 and cam_2v8). - -How is that mapped before, is something that the regulator machine -should figure out. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 50 ++++++++++++------------ - arch/arm/mach-omap2/board-omap3beagle.c | 24 +++++------- - 2 files changed, 35 insertions(+), 39 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index befa7d4..c91529d 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -51,8 +51,8 @@ - - #define LEOPARD_RESET_GPIO 98 - --static struct regulator *beagle_mt9v113_1_8v1; --static struct regulator *beagle_mt9v113_1_8v2; -+static struct regulator *cam_1v8_reg; -+static struct regulator *cam_2v8_reg; - - /* Arbitrary memory handling limit */ - #define MT9V113_MAX_FRAME_SIZE PAGE_ALIGN(640 * 480 * 4) -@@ -148,10 +148,10 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - case V4L2_POWER_OFF: - isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); - -- if (regulator_is_enabled(beagle_mt9v113_1_8v1)) -- regulator_disable(beagle_mt9v113_1_8v1); -- if (regulator_is_enabled(beagle_mt9v113_1_8v2)) -- regulator_disable(beagle_mt9v113_1_8v2); -+ if (regulator_is_enabled(cam_1v8_reg)) -+ regulator_disable(cam_1v8_reg); -+ if (regulator_is_enabled(cam_2v8_reg)) -+ regulator_disable(cam_2v8_reg); - - break; - -@@ -162,10 +162,10 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - gpio_set_value(LEOPARD_RESET_GPIO, 0); - - /* turn on VDD */ -- regulator_enable(beagle_mt9v113_1_8v1); -+ regulator_enable(cam_1v8_reg); - mdelay(1); - /* turn on VDD_IO */ -- regulator_enable(beagle_mt9v113_1_8v2); -+ regulator_enable(cam_2v8_reg); - mdelay(50); - - /* Enable EXTCLK */ -@@ -201,24 +201,24 @@ struct mt9v113_platform_data mt9v113_pdata = { - - static int beagle_cam_probe(struct platform_device *pdev) - { -- beagle_mt9v113_1_8v1 = regulator_get(&pdev->dev, "vaux3_1"); -- if (IS_ERR(beagle_mt9v113_1_8v1)) { -- dev_err(&pdev->dev, "vaux3_1 regulator missing\n"); -- return PTR_ERR(beagle_mt9v113_1_8v1); -+ cam_1v8_reg = regulator_get(&pdev->dev, "cam_1v8"); -+ if (IS_ERR(cam_1v8_reg)) { -+ dev_err(&pdev->dev, "cam_1v8 regulator missing\n"); -+ return PTR_ERR(cam_1v8_reg); - } - -- beagle_mt9v113_1_8v2 = regulator_get(&pdev->dev, "vaux4_1"); -- if (IS_ERR(beagle_mt9v113_1_8v2)) { -- dev_err(&pdev->dev, "vaux4_1 regulator missing\n"); -- regulator_put(beagle_mt9v113_1_8v1); -- return PTR_ERR(beagle_mt9v113_1_8v2); -+ cam_2v8_reg = regulator_get(&pdev->dev, "cam_2v8"); -+ if (IS_ERR(cam_2v8_reg)) { -+ dev_err(&pdev->dev, "cam_2v8 regulator missing\n"); -+ regulator_put(cam_1v8_reg); -+ return PTR_ERR(cam_2v8_reg); - } - - if (gpio_request(LEOPARD_RESET_GPIO, "cam_rst") != 0) { - dev_err(&pdev->dev, "Could not request GPIO %d", - LEOPARD_RESET_GPIO); -- regulator_put(beagle_mt9v113_1_8v2); -- regulator_put(beagle_mt9v113_1_8v1); -+ regulator_put(cam_2v8_reg); -+ regulator_put(cam_1v8_reg); - return -ENODEV; - } - -@@ -266,13 +266,13 @@ static int beagle_cam_probe(struct platform_device *pdev) - - static int beagle_cam_remove(struct platform_device *pdev) - { -- if (regulator_is_enabled(beagle_mt9v113_1_8v1)) -- regulator_disable(beagle_mt9v113_1_8v1); -- regulator_put(beagle_mt9v113_1_8v1); -+ if (regulator_is_enabled(cam_1v8_reg)) -+ regulator_disable(cam_1v8_reg); -+ regulator_put(cam_1v8_reg); - -- if (regulator_is_enabled(beagle_mt9v113_1_8v2)) -- regulator_disable(beagle_mt9v113_1_8v2); -- regulator_put(beagle_mt9v113_1_8v2); -+ if (regulator_is_enabled(cam_2v8_reg)) -+ regulator_disable(cam_2v8_reg); -+ regulator_put(cam_2v8_reg); - - gpio_free(LEOPARD_RESET_GPIO); - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index d4b0b0a..b0da483 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -414,18 +414,14 @@ static struct platform_device beagle_cam_device = { - .id = -1, - }; - --static struct regulator_consumer_supply beagle_vaux3_supplies[] = { -- { -- .supply = "vaux3_1", -- .dev = &beagle_cam_device.dev, -- }, -+static struct regulator_consumer_supply beagle_vaux3_supply = { -+ .supply = "cam_1v8", -+ .dev = &beagle_cam_device.dev, - }; - --static struct regulator_consumer_supply beagle_vaux4_supplies[] = { -- { -- .supply = "vaux4_1", -- .dev = &beagle_cam_device.dev, -- }, -+static struct regulator_consumer_supply beagle_vaux4_supply = { -+ .supply = "cam_2v8", -+ .dev = &beagle_cam_device.dev, - }; - - /* VAUX3 for CAM_1V8 */ -@@ -439,8 +435,8 @@ static struct regulator_init_data beagle_vaux3 = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = ARRAY_SIZE(beagle_vaux3_supplies), -- .consumer_supplies = beagle_vaux3_supplies, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vaux3_supply, - }; - - /* VAUX4 for CAM_2V8 */ -@@ -454,8 +450,8 @@ static struct regulator_init_data beagle_vaux4 = { - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -- .num_consumer_supplies = ARRAY_SIZE(beagle_vaux4_supplies), -- .consumer_supplies = beagle_vaux4_supplies, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vaux4_supply, - }; - - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0047-omap3beagle-camera-Bring-back-mt9t111-support.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0047-omap3beagle-camera-Bring-back-mt9t111-support.patch deleted file mode 100644 index d861477..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0047-omap3beagle-camera-Bring-back-mt9t111-support.patch +++ /dev/null @@ -1,251 +0,0 @@ -From e81cdbd3c914965685e213ceef5a14775bfb9397 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Mon, 12 Jul 2010 16:42:41 -0500 -Subject: [PATCH 47/75] omap3beagle: camera: Bring back mt9t111 support - -Restore MT9T111 sensor support. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 175 +++++++++++++++++++++++- - arch/arm/mach-omap2/board-omap3beagle.c | 12 ++ - 2 files changed, 184 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index c91529d..2e49158 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -37,7 +37,6 @@ - #include <plat/control.h> - - #include <media/v4l2-int-device.h> --#include <media/mt9v113.h> - - /* Include V4L2 ISP-Camera driver related header file */ - #include <../drivers/media/video/omap34xxcam.h> -@@ -47,13 +46,16 @@ - - #define CAM_USE_XCLKA 0 - --#define ISP_MT9V113_MCLK 216000000 -- - #define LEOPARD_RESET_GPIO 98 - - static struct regulator *cam_1v8_reg; - static struct regulator *cam_2v8_reg; - -+#if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE) -+#include <media/mt9v113.h> -+ -+#define ISP_MT9V113_MCLK 216000000 -+ - /* Arbitrary memory handling limit */ - #define MT9V113_MAX_FRAME_SIZE PAGE_ALIGN(640 * 480 * 4) - -@@ -199,6 +201,173 @@ struct mt9v113_platform_data mt9v113_pdata = { - .ifparm = mt9v113_ifparm, - }; - -+#endif /* #ifdef CONFIG_VIDEO_MT9V113 */ -+ -+#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+#include <media/mt9t111.h> -+ -+#define ISP_MT9T111_MCLK 216000000 -+ -+/* Arbitrary memory handling limit */ -+#define MT9T111_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN((2048 * 2) * 1536 * 4) -+ -+static struct isp_interface_config mt9t111_if_config = { -+ .ccdc_par_ser = ISP_PARLL, -+ .dataline_shift = 0x2, -+ .hsvs_syncdetect = ISPCTRL_SYNC_DETECT_VSRISE, -+ .strobe = 0x0, -+ .prestrobe = 0x0, -+ .shutter = 0x0, -+ .cam_mclk = ISP_MT9T111_MCLK, -+ .wenlog = ISPCCDC_CFG_WENLOG_AND, -+ .wait_hs_vs = 2, -+ .u.par.par_bridge = 0x3, -+ .u.par.par_clk_pol = 0x0, -+}; -+ -+static struct v4l2_ifparm mt9t111_ifparm_s = { -+ .if_type = V4L2_IF_TYPE_RAW, -+ .u = { -+ .raw = { -+ .frame_start_on_rising_vs = 1, -+ .bt_sync_correct = 0, -+ .swap = 0, -+ .latch_clk_inv = 0, -+ .nobt_hs_inv = 0, /* active high */ -+ .nobt_vs_inv = 0, /* active high */ -+ .clock_min = MT9T111_CLK_MIN, -+ .clock_max = MT9T111_CLK_MAX, -+ }, -+ }, -+}; -+ -+/** -+ * @brief mt9t111_ifparm - Returns the mt9t111 interface parameters -+ * -+ * @param p - pointer to v4l2_ifparm structure -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9t111_ifparm(struct v4l2_ifparm *p) -+{ -+ if (p == NULL) -+ return -EINVAL; -+ -+ *p = mt9t111_ifparm_s; -+ return 0; -+} -+ -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+static struct omap34xxcam_hw_config mt9t111_hwc = { -+ .dev_index = 0, -+ .dev_minor = 0, -+ .dev_type = OMAP34XXCAM_SLAVE_SENSOR, -+ .u.sensor.sensor_isp = 0, -+ .u.sensor.capture_mem = MT9T111_BIGGEST_FRAME_BYTE_SIZE, -+ .u.sensor.ival_default = { 1, 10 }, -+}; -+#endif -+ -+/** -+ * @brief mt9t111_set_prv_data - Returns mt9t111 omap34xx driver private data -+ * -+ * @param priv - pointer to omap34xxcam_hw_config structure -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9t111_set_prv_data(void *priv) -+{ -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+ struct omap34xxcam_hw_config *hwc = priv; -+ -+ if (priv == NULL) -+ return -EINVAL; -+ -+ *hwc = mt9t111_hwc; -+ return 0; -+#else -+ return -EINVAL; -+#endif -+} -+ -+/** -+ * @brief mt9t111_power_set - Power-on or power-off TVP5146 device -+ * -+ * @param power - enum, Power on/off, resume/standby -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) -+{ -+ struct omap34xxcam_videodev *vdev = s->u.slave->master->priv; -+ -+ switch (power) { -+ case V4L2_POWER_OFF: -+ case V4L2_POWER_STANDBY: -+ isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); -+ -+ if (regulator_is_enabled(cam_1v8_reg)) -+ regulator_disable(cam_1v8_reg); -+ if (regulator_is_enabled(cam_2v8_reg)) -+ regulator_disable(cam_2v8_reg); -+ break; -+ -+ case V4L2_POWER_ON: -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+ isp_configure_interface(vdev->cam->isp, &mt9t111_if_config); -+#endif -+ -+ /* Set RESET_BAR to 0 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 0); -+ -+ /* turn on VDD */ -+ regulator_enable(cam_1v8_reg); -+ -+ mdelay(1); -+ -+ /* turn on VDD_IO */ -+ regulator_enable(cam_2v8_reg); -+ -+ mdelay(50); -+ -+ /* Enable EXTCLK */ -+ isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA); -+ -+ /* -+ * Wait at least 70 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): -+ * ((1000000 * 70) / 6000000) = aprox 12 us. -+ */ -+ -+ udelay(12); -+ -+ /* Set RESET_BAR to 1 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 1); -+ -+ /* -+ * Wait at least 100 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): -+ * ((1000000 * 100) / 6000000) = aprox 17 us. -+ */ -+ -+ udelay(17); -+ -+ break; -+ -+ default: -+ return -ENODEV; -+ break; -+ } -+ return 0; -+} -+ -+struct mt9t111_platform_data mt9t111_pdata = { -+ .master = "omap34xxcam", -+ .power_set = mt9t111_power_set, -+ .priv_data_set = mt9t111_set_prv_data, -+ .ifparm = mt9t111_ifparm, -+}; -+ -+#endif /* #ifdef CONFIG_VIDEO_MT9T111 */ -+ - static int beagle_cam_probe(struct platform_device *pdev) - { - cam_1v8_reg = regulator_get(&pdev->dev, "cam_1v8"); -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index b0da483..0e7e8b2 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -77,6 +77,12 @@ static struct omap_opp * _omap37x_l3_rate_table = NULL; - extern struct mt9v113_platform_data mt9v113_pdata; - #endif - -+#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+#include <media/v4l2-int-device.h> -+#include <media/mt9t111.h> -+extern struct mt9t111_platform_data mt9t111_pdata; -+#endif -+ - #define GPMC_CS0_BASE 0x60 - #define GPMC_CS_SIZE 0x30 - -@@ -596,6 +602,12 @@ static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { - .platform_data = &mt9v113_pdata, - }, - #endif -+#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+ { -+ I2C_BOARD_INFO("mt9t111", MT9T111_I2C_ADDR), -+ .platform_data = &mt9t111_pdata, -+ }, -+#endif - }; - - static int __init omap3_beagle_i2c_init(void) --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0048-REMOVE-v4l2-Delete-MT9T111-sensor-driver.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0048-REMOVE-v4l2-Delete-MT9T111-sensor-driver.patch deleted file mode 100644 index 79ea2b5..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0048-REMOVE-v4l2-Delete-MT9T111-sensor-driver.patch +++ /dev/null @@ -1,2402 +0,0 @@ -From 59d42cae8d60b7e86013293055f6c989ab578f26 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 00:50:07 -0500 -Subject: [PATCH 48/75] REMOVE: v4l2: Delete MT9T111 sensor driver - -This removes MT9T111 support from the kernel. - -Reason? Driver already exists in open source, and we're going to -reuse that one instead. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/Kconfig | 8 - - drivers/media/video/Makefile | 1 - - drivers/media/video/mt9t111.c | 885 ------------------------ - drivers/media/video/mt9t111_reg.h | 1364 ------------------------------------- - include/media/mt9t111.h | 79 --- - 5 files changed, 0 insertions(+), 2337 deletions(-) - delete mode 100644 drivers/media/video/mt9t111.c - delete mode 100644 drivers/media/video/mt9t111_reg.h - delete mode 100644 include/media/mt9t111.h - -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index c14d758..780b246 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -354,14 +354,6 @@ config VIDEO_MT9P012 - MT9P012 camera. It is currently working with the TI OMAP3 - camera controller. - --config VIDEO_MT9T111 -- tristate "Micron MT9T111 raw sensor driver (3MP)" -- depends on I2C && VIDEO_V4L2 -- ---help--- -- This is a Video4Linux2 sensor-level driver for the Micron -- MT9T111 camera. It is currently working with the TI OMAP3 -- camera controller. -- - config VIDEO_DW9710 - tristate "Lens driver for DW9710" - depends on I2C && VIDEO_V4L2 -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index 763c157..3828723 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -128,7 +128,6 @@ obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o - obj-y += isp/ - obj-$(CONFIG_VIDEO_OMAP3) += omap34xxcam.o - obj-$(CONFIG_VIDEO_MT9P012) += mt9p012.o --obj-$(CONFIG_VIDEO_MT9T111) += mt9t111.o - obj-$(CONFIG_VIDEO_DW9710) += dw9710.o - obj-$(CONFIG_VIDEO_TPS61059) += tps61059.o - obj-$(CONFIG_VIDEO_OV3640) += ov3640.o -diff --git a/drivers/media/video/mt9t111.c b/drivers/media/video/mt9t111.c -deleted file mode 100644 -index 10080af..0000000 ---- a/drivers/media/video/mt9t111.c -+++ /dev/null -@@ -1,885 +0,0 @@ --/* -- * drivers/media/video/mt9t111.c -- * -- * mt9t111 sensor driver -- * -- * Copyright (C) 2009 Leopard Imaging -- * -- * This file is licensed under the terms of the GNU General Public License -- * version 2. This program is licensed "as is" without any warranty of any -- * kind, whether express or implied. -- */ -- --#include <linux/i2c.h> --#include <linux/delay.h> --#include <media/v4l2-int-device.h> -- --#include <media/mt9t111.h> --#include "mt9t111_reg.h" -- --/* YCbCr mode does not work yet */ --#define USE_RAW --/* Create a Color bar test pattern, Blue, Green, Red, Grey */ --/* #define COLOR_BAR */ -- --#define SENSOR_DETECTED 1 --#define SENSOR_NOT_DETECTED 0 -- --static void mt9t111_loaddefault(struct i2c_client *client); -- --/* -- * as a place holder for further development -- */ --static void debug_dummy(char *in_msg) --{ --} -- --/* list of image formats supported by mt9t111 sensor */ --const static struct v4l2_fmtdesc mt9t111_formats[] = { --#ifdef USE_RAW -- { -- .description = "RAW ", -- .pixelformat = V4L2_PIX_FMT_SGRBG10, -- }, --#else -- { -- .description = "YUV 422 ", -- .pixelformat = V4L2_PIX_FMT_YUYV, -- }, --#endif --}; -- --#define NUM_CAPTURE_FORMATS ARRAY_SIZE(mt9t111_formats) -- --/* -- * Array of image sizes supported by MT9T111. These must be ordered from -- * smallest image size to largest. -- */ --const static struct capture_size mt9t111_sizes[] = { -- { 640, 480 }, -- /* { 2048, 1536} */ --}; -- --#define NUM_CAPTURE_SIZE ARRAY_SIZE(mt9t111_sizes) -- -- --const struct v4l2_fract mt9t111_frameintervals[] = { -- { .numerator = 1, .denominator = 10 } --}; -- --#define NUM_CAPTURE_FRAMEINTERVALS ARRAY_SIZE(mt9t111_frameintervals) -- --/** -- * struct mt9t111_sensor - main structure for storage of sensor information -- * @pdata: access functions and data for platform level information -- * @v4l2_int_device: V4L2 device structure structure -- * @i2c_client: iic client device structure -- * @pix: V4L2 pixel format information structure -- * @timeperframe: time per frame expressed as V4L fraction -- * @scaler: -- * @ver: mt9t111 chip version -- * @fps: frames per second value -- */ --struct mt9t111_sensor { -- const struct mt9t111_platform_data *pdata; -- struct v4l2_int_device *v4l2_int_device; -- struct i2c_client *i2c_client; -- struct v4l2_pix_format pix; -- struct v4l2_fract timeperframe; -- int scaler; -- int ver; -- int fps; -- int state; --}; -- --static struct mt9t111_sensor mt9t111 = { -- .timeperframe = { -- .numerator = 1, -- .denominator = 10, -- }, -- .state = SENSOR_NOT_DETECTED, --}; -- --/** -- * mt9t111_read_reg - Read a value from a register in an mt9t111 sensor device -- * @client: i2c driver client structure -- * @data_length: length of data to be read -- * @reg: register address / offset -- * @val: stores the value that gets read -- * -- * Read a value from a register in an mt9t111 sensor device. -- * The value is returned in 'val'. -- * Returns zero if successful, or non-zero otherwise. -- */ --static int --mt9t111_read_reg(struct i2c_client *client, u16 reg, u16 *val) --{ -- struct i2c_msg msg[1]; -- u8 data[4]; -- int err; -- -- msg->addr = client->addr; -- msg->flags = 0; -- msg->len = 2; -- msg->buf = data; -- data[0] = (reg & 0xff00) >> 8; -- data[1] = (reg & 0x00ff); -- err = i2c_transfer(client->adapter, msg, 1); -- if (err >= 0) { -- msg->flags = I2C_M_RD; -- msg->len = 2; /* 2 byte read */ -- err = i2c_transfer(client->adapter, msg, 1); -- if (err >= 0) { -- *val = ((data[0] & 0x00ff) << 8) -- | (data[1] & 0x00ff); -- return 0; -- } -- } -- return err; --} -- --/** -- * mt9t111_write_reg - Write a value to a register in an mt9t111 sensor device -- * @client: i2c driver client structure -- * @data_length: length of data to be read -- * @reg: register address / offset -- * @val: value to be written to specified register -- * -- * Write a value to a register in an mt9t111 sensor device. -- * Returns zero if successful, or non-zero otherwise. -- */ --static int --mt9t111_write_reg(struct i2c_client *client, u16 reg, u16 val) --{ -- struct i2c_msg msg[1]; -- u8 data[20]; -- int err; -- -- msg->addr = client->addr; -- msg->flags = 0; -- msg->len = 4; -- msg->buf = data; -- data[0] = (u8)((reg & 0xff00) >> 8); -- data[1] = (u8)(reg & 0x00ff); -- data[2] = (u8)((val & 0xff00) >> 8); -- data[3] = (u8)(val & 0x00ff); -- err = i2c_transfer(client->adapter, msg, 1); -- -- return err; --} -- --/** -- * mt9t111_write_regs - Write registers to an mt9t111 sensor device -- * @client: i2c driver client structure -- * @reg_in: pointer to registers to write -- * @cnt: the number of registers -- * -- * Write registers . -- * Returns zero if successful, or non-zero otherwise. -- */ --static int --mt9t111_write_regs(struct i2c_client *client, mt9t111_regs *reg_in, int cnt) --{ -- int err = 0; -- int i; -- mt9t111_regs *reg = reg_in; -- -- for (i = 0; i < cnt; i++) { -- if (reg->delay_time == 0) { -- err |= mt9t111_write_reg(client, reg->addr, reg->data); -- } else if (reg->addr != 0 || reg->data != 0) { -- err |= mt9t111_write_reg(client, reg->addr, reg->data); -- mdelay(reg->delay_time); -- } else { -- mdelay(reg->delay_time); -- } -- -- if (err < 0) { -- dev_warn(&client->dev, "write reg error, addr = 0x%x," -- " data = 0x%x \n", -- reg->addr, reg->data); -- return err; -- } -- reg++; -- } -- return err; --} -- --/** -- * mt9t111_detect - Detect if an mt9t111 is present, and if so which revision -- * @client: pointer to the i2c client driver structure -- * -- * Detect if an mt9t111 is present -- * Returns a negative error number if no device is detected, or the -- * non-negative value of the version ID register if a device is detected. -- */ --static int --mt9t111_detect(struct i2c_client *client) --{ -- u16 val; -- -- /* chip ID is at address 0 */ -- if (mt9t111_read_reg(client, MT9T111_CHIP_ID, &val) < 0) -- return -ENODEV; -- -- if (val != MT9T111_CHIP_ID_VALUE) { -- dev_warn(&client->dev, "model id mismatch received 0x%x" -- " expecting 0x%x\n", -- val, MT9T111_CHIP_ID_VALUE); -- -- return -ENODEV; -- } -- -- return (int)val; -- --} -- --/** -- * mt9t111_configure - Configure the mt9t111 for the specified image mode -- * @s: pointer to standard V4L2 device structure -- * -- * Configure the mt9t111 for a specified image size, pixel format, and frame -- * period. xclk is the frequency (in Hz) of the xclk input to the mt9t111. -- * fper is the frame period (in seconds) expressed as a fraction. -- * Returns zero if successful, or non-zero otherwise. -- * The actual frame period is returned in fper. -- */ --static int mt9t111_configure(struct v4l2_int_device *s) --{ -- debug_dummy("debug_dummy -- to set imager mode"); -- -- return 0; --} -- --/** -- * ioctl_enum_framesizes - V4L2 sensor if handler for vidioc_int_enum_framesizes -- * @s: pointer to standard V4L2 device structure -- * @frms: pointer to standard V4L2 framesizes enumeration structure -- * -- * Returns possible framesizes depending on choosen pixel format -- **/ --static int ioctl_enum_framesizes(struct v4l2_int_device *s, -- struct v4l2_frmsizeenum *frms) --{ -- int ifmt; -- -- for (ifmt = 0; ifmt < NUM_CAPTURE_FORMATS; ifmt++) { -- if (frms->pixel_format == mt9t111_formats[ifmt].pixelformat) -- break; -- } -- /* Is requested pixelformat not found on sensor? */ -- if (ifmt == NUM_CAPTURE_FORMATS) -- return -EINVAL; -- -- /* Do we already reached all discrete framesizes? */ -- if (frms->index >= NUM_CAPTURE_SIZE) -- return -EINVAL; -- -- frms->type = V4L2_FRMSIZE_TYPE_DISCRETE; -- frms->discrete.width = mt9t111_sizes[frms->index].width; -- frms->discrete.height = mt9t111_sizes[frms->index].height; -- -- return 0; -- --} -- --static int ioctl_enum_frameintervals(struct v4l2_int_device *s, -- struct v4l2_frmivalenum *frmi) --{ -- int ifmt; -- -- if (frmi->index >= NUM_CAPTURE_FRAMEINTERVALS) -- return -EINVAL; -- -- for (ifmt = 0; ifmt < NUM_CAPTURE_FORMATS; ifmt++) { -- if (frmi->pixel_format == mt9t111_formats[ifmt].pixelformat) -- break; -- } -- /* Is requested pixelformat not found on sensor? */ -- if (ifmt == NUM_CAPTURE_FORMATS) -- return -EINVAL; -- -- frmi->type = V4L2_FRMSIZE_TYPE_DISCRETE; -- frmi->discrete.numerator = -- mt9t111_frameintervals[frmi->index].numerator; -- frmi->discrete.denominator = -- mt9t111_frameintervals[frmi->index].denominator; -- return 0; --} -- --/** -- * ioctl_init - V4L2 sensor interface handler for VIDIOC_INT_INIT -- * @s: pointer to standard V4L2 device structure -- * -- * Initialize the sensor device (call mt9t111_configure()) -- */ --static int ioctl_init(struct v4l2_int_device *s) --{ -- return 0; --} -- --/** -- * ioctl_dev_exit - V4L2 sensor interface handler for vidioc_int_dev_exit_num -- * @s: pointer to standard V4L2 device structure -- * -- * Delinitialise the dev. at slave detach. The complement of ioctl_dev_init. -- */ --static int ioctl_dev_exit(struct v4l2_int_device *s) --{ -- return 0; --} -- --/** -- * ioctl_dev_init - V4L2 sensor interface handler for vidioc_int_dev_init_num -- * @s: pointer to standard V4L2 device structure -- * -- * Initialise the device when slave attaches to the master. Returns 0 if -- * mt9t111 device could be found, otherwise returns appropriate error. -- */ --static int ioctl_dev_init(struct v4l2_int_device *s) --{ -- return 0; --} -- --/** -- * ioctl_s_power - V4L2 sensor interface handler for vidioc_int_s_power_num -- * @s: pointer to standard V4L2 device structure -- * @on: power state to which device is to be set -- * -- * Sets devices power state to requrested state, if possible. -- */ --static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) --{ -- struct mt9t111_sensor *sensor = s->priv; -- struct i2c_client *c = sensor->i2c_client; -- int rval; -- -- if ((on == V4L2_POWER_STANDBY) && (sensor->state == SENSOR_DETECTED)) -- debug_dummy("debug_dummy -- put to standby\n"); -- -- if (on != V4L2_POWER_ON) -- debug_dummy("debug_dummy -- stop master clock\n"); -- else -- debug_dummy("debug_dummy -- enable clock\n");; -- -- rval = sensor->pdata->power_set(s, on); -- if (rval < 0) { -- dev_err(&c->dev, "Unable to set the power state: " "mt9t111" -- " sensor\n"); -- /* sensor->pdata->set_xclk(0); */ -- return rval; -- } -- -- if ((on == V4L2_POWER_ON) && (sensor->state == SENSOR_DETECTED)) -- mt9t111_loaddefault(c); -- -- if ((on == V4L2_POWER_ON) && (sensor->state == SENSOR_NOT_DETECTED)) { -- rval = mt9t111_detect(c); -- if (rval < 0) { -- dev_err(&c->dev, "Unable to detect " "mt9t111" -- " sensor\n"); -- sensor->state = SENSOR_NOT_DETECTED; -- return rval; -- } -- dev_info(&c->dev, "chip version 0x%02x detected\n", rval); -- sensor->state = SENSOR_DETECTED; -- sensor->ver = rval; -- } -- return 0; --} -- --/** -- * ioctl_g_priv - V4L2 sensor interface handler for vidioc_int_g_priv_num -- * @s: pointer to standard V4L2 device structure -- * @p: void pointer to hold sensor's private data address -- * -- * Returns device's (sensor's) private data area address in p parameter -- */ --static int ioctl_g_priv(struct v4l2_int_device *s, void *p) --{ -- struct mt9t111_sensor *sensor = s->priv; -- -- return sensor->pdata->priv_data_set(p); --} -- --/** -- * ioctl_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl -- * @s: pointer to standard V4L2 device structure -- * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure -- * -- * Configures the sensor to use the input parameters, if possible. If -- * not possible, reverts to the old parameters and returns the -- * appropriate error code. -- */ --static int ioctl_s_parm(struct v4l2_int_device *s, -- struct v4l2_streamparm *a) --{ -- /* TODO: set paramters */ -- debug_dummy("debug_dummy -- VIDIOC_S_PARM "); -- return 0; --} -- --/** -- * ioctl_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl -- * @s: pointer to standard V4L2 device structure -- * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure -- * -- * Returns the sensor's video CAPTURE parameters. -- */ --static int ioctl_g_parm(struct v4l2_int_device *s, -- struct v4l2_streamparm *a) --{ -- struct mt9t111_sensor *sensor = s->priv; -- struct v4l2_captureparm *cparm = &a->parm.capture; -- -- if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -- return -EINVAL; -- -- memset(a, 0, sizeof(*a)); -- a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -- -- cparm->capability = V4L2_CAP_TIMEPERFRAME; -- cparm->timeperframe = sensor->timeperframe; -- -- return 0; --} -- --/** -- * ioctl_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap -- * @s: pointer to standard V4L2 device structure -- * @f: pointer to standard V4L2 v4l2_format structure -- * -- * Returns the sensor's current pixel format in the v4l2_format -- * parameter. -- */ --static int ioctl_g_fmt_cap(struct v4l2_int_device *s, -- struct v4l2_format *f) --{ -- struct mt9t111_sensor *sensor = s->priv; -- f->fmt.pix = sensor->pix; -- -- return 0; --} -- --/** -- * ioctl_try_fmt_cap - Implement the CAPTURE buffer VIDIOC_TRY_FMT ioctl -- * @s: pointer to standard V4L2 device structure -- * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure -- * -- * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This -- * ioctl is used to negotiate the image capture size and pixel format -- * without actually making it take effect. -- */ --static int ioctl_try_fmt_cap(struct v4l2_int_device *s, -- struct v4l2_format *f) --{ -- struct v4l2_pix_format *pix = &f->fmt.pix; -- struct mt9t111_sensor *sensor = s->priv; -- struct v4l2_pix_format *pix2 = &sensor->pix; -- -- pix->width = 640; -- pix->height = 480; --#ifdef USE_RAW -- pix->pixelformat = V4L2_PIX_FMT_SGRBG10; -- pix->bytesperline = pix->width; -- pix->colorspace = V4L2_COLORSPACE_SRGB; --#else -- pix->pixelformat = V4L2_PIX_FMT_YUYV; -- pix->bytesperline = pix->width * 2; -- pix->colorspace = V4L2_COLORSPACE_JPEG; --#endif -- pix->field = V4L2_FIELD_NONE; -- -- pix->sizeimage = pix->bytesperline * pix->height; -- pix->priv = 0; -- *pix2 = *pix; -- return 0; --} -- --/** -- * ioctl_s_fmt_cap - V4L2 sensor interface handler for VIDIOC_S_FMT ioctl -- * @s: pointer to standard V4L2 device structure -- * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure -- * -- * If the requested format is supported, configures the HW to use that -- * format, returns error code if format not supported or HW can't be -- * correctly configured. -- */ --static int ioctl_s_fmt_cap(struct v4l2_int_device *s, -- struct v4l2_format *f) --{ -- struct mt9t111_sensor *sensor = s->priv; -- struct v4l2_pix_format *pix = &f->fmt.pix; -- int rval; -- -- rval = ioctl_try_fmt_cap(s, f); -- if (!rval) -- sensor->pix = *pix; -- -- return rval; --} -- --/** -- * ioctl_enum_fmt_cap - Implement the CAPTURE buffer VIDIOC_ENUM_FMT ioctl -- * @s: pointer to standard V4L2 device structure -- * @fmt: standard V4L2 VIDIOC_ENUM_FMT ioctl structure -- * -- * Implement the VIDIOC_ENUM_FMT ioctl for the CAPTURE buffer type. -- */ --static int ioctl_enum_fmt_cap(struct v4l2_int_device *s, -- struct v4l2_fmtdesc *fmt) --{ -- int index = fmt->index; -- enum v4l2_buf_type type = fmt->type; -- -- memset(fmt, 0, sizeof(*fmt)); -- fmt->index = index; -- fmt->type = type; -- -- switch (fmt->type) { -- case V4L2_BUF_TYPE_VIDEO_CAPTURE: -- if (index >= NUM_CAPTURE_FORMATS) -- return -EINVAL; -- break; -- default: -- return -EINVAL; -- } -- -- fmt->flags = mt9t111_formats[index].flags; -- strlcpy(fmt->description, mt9t111_formats[index].description, -- sizeof(fmt->description)); -- fmt->pixelformat = mt9t111_formats[index].pixelformat; -- -- return 0; --} -- --/** -- * ioctl_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl -- * @s: pointer to standard V4L2 device structure -- * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure -- * -- * If the requested control is supported, sets the control's current -- * value in HW (and updates the video_control[] array). Otherwise, -- * returns -EINVAL if the control is not supported. -- */ --static int ioctl_s_ctrl(struct v4l2_int_device *s, -- struct v4l2_control *vc) --{ -- debug_dummy("debug_dummy -- s ctrl\n"); -- return 0; --} -- --/** -- * ioctl_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl -- * @s: pointer to standard V4L2 device structure -- * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure -- * -- * If the requested control is supported, returns the control's current -- * value from the video_control[] array. Otherwise, returns -EINVAL -- * if the control is not supported. -- */ --static int ioctl_g_ctrl(struct v4l2_int_device *s, -- struct v4l2_control *vc) --{ -- debug_dummy("debug_dummy -- g ctrl\n"); -- return 0; --} -- --/** -- * ioctl_queryctrl - V4L2 sensor interface handler for VIDIOC_QUERYCTRL ioctl -- * @s: pointer to standard V4L2 device structure -- * @qc: standard V4L2 VIDIOC_QUERYCTRL ioctl structure -- * -- * If the requested control is supported, returns the control information -- * from the video_control[] array. Otherwise, returns -EINVAL if the -- * control is not supported. -- */ --static int ioctl_queryctrl(struct v4l2_int_device *s, -- struct v4l2_queryctrl *qc) --{ -- debug_dummy("debug_dummy -- query ctrl\n"); -- return -EINVAL; --} -- --/** -- * ioctl_s_routing - V4L2 decoder interface handler for VIDIOC_S_INPUT ioctl -- * @s: pointer to standard V4L2 device structure -- * @index: number of the input -- * -- * If index is valid, selects the requested input. Otherwise, returns -EINVAL if -- * the input is not supported or there is no active signal present in the -- * selected input. -- */ --static int ioctl_s_routing(struct v4l2_int_device *s, -- struct v4l2_routing *route) --{ -- return 0; --} -- --/** -- * ioctl_g_ifparm - V4L2 decoder interface handler for vidioc_int_g_ifparm_num -- * @s: pointer to standard V4L2 device structure -- * @p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure -- * -- * Gets slave interface parameters. -- * Calculates the required xclk value to support the requested -- * clock parameters in p. This value is returned in the p -- * parameter. -- */ --static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) --{ -- struct mt9t111_sensor *sensor = s->priv; -- int rval; -- -- if (p == NULL) -- return -EINVAL; -- -- if (NULL == sensor->pdata->ifparm) -- return -EINVAL; -- -- rval = sensor->pdata->ifparm(p); -- if (rval) { -- v4l_err(sensor->i2c_client, "g_ifparm.Err[%d]\n", rval); -- return rval; -- } -- -- p->u.ycbcr.clock_curr = 40 * 1000000; /* temporal value */ -- -- return 0; --} -- --static struct v4l2_int_ioctl_desc mt9t111_ioctl_desc[] = { -- { .num = vidioc_int_enum_framesizes_num, -- .func = (v4l2_int_ioctl_func *)ioctl_enum_framesizes }, -- { .num = vidioc_int_enum_frameintervals_num, -- .func = (v4l2_int_ioctl_func *)ioctl_enum_frameintervals }, -- { .num = vidioc_int_dev_init_num, -- .func = (v4l2_int_ioctl_func *)ioctl_dev_init }, -- { .num = vidioc_int_dev_exit_num, -- .func = (v4l2_int_ioctl_func *)ioctl_dev_exit }, -- { .num = vidioc_int_s_power_num, -- .func = (v4l2_int_ioctl_func *)ioctl_s_power }, -- { .num = vidioc_int_g_priv_num, -- .func = (v4l2_int_ioctl_func *)ioctl_g_priv }, -- { .num = vidioc_int_g_ifparm_num, -- .func = (v4l2_int_ioctl_func *)ioctl_g_ifparm }, -- { .num = vidioc_int_init_num, -- .func = (v4l2_int_ioctl_func *)ioctl_init }, -- { .num = vidioc_int_enum_fmt_cap_num, -- .func = (v4l2_int_ioctl_func *)ioctl_enum_fmt_cap }, -- { .num = vidioc_int_try_fmt_cap_num, -- .func = (v4l2_int_ioctl_func *)ioctl_try_fmt_cap }, -- { .num = vidioc_int_g_fmt_cap_num, -- .func = (v4l2_int_ioctl_func *)ioctl_g_fmt_cap }, -- { .num = vidioc_int_s_fmt_cap_num, -- .func = (v4l2_int_ioctl_func *)ioctl_s_fmt_cap }, -- { .num = vidioc_int_g_parm_num, -- .func = (v4l2_int_ioctl_func *)ioctl_g_parm }, -- { .num = vidioc_int_s_parm_num, -- .func = (v4l2_int_ioctl_func *)ioctl_s_parm }, -- { .num = vidioc_int_queryctrl_num, -- .func = (v4l2_int_ioctl_func *)ioctl_queryctrl }, -- { .num = vidioc_int_g_ctrl_num, -- .func = (v4l2_int_ioctl_func *)ioctl_g_ctrl }, -- { .num = vidioc_int_s_ctrl_num, -- .func = (v4l2_int_ioctl_func *)ioctl_s_ctrl }, -- { .num = vidioc_int_s_video_routing_num, -- .func = (v4l2_int_ioctl_func *)ioctl_s_routing }, --}; -- --static void mt9t111_refresh(struct i2c_client *client) --{ -- int i; -- unsigned short value; -- /* MCU_ADDRESS [SEQ_CMD] -- refresh */ -- mt9t111_write_reg(client, 0x098E, 0x8400); -- mt9t111_write_reg(client, 0x0990, 0x0006); -- for (i = 0; i < 100; i++) { -- mt9t111_write_reg(client, 0x098E, 0x8400); -- mt9t111_read_reg(client, 0x0990, &value); -- if (value == 0) -- break; -- mdelay(5); -- } --} -- --#ifdef COLOR_BAR --static void mt9t111_color_bar(struct i2c_client *client) --{ -- mt9t111_write_reg(client, 0x3210, 0x01B0); /* disable lens correction */ -- -- mt9t111_write_reg(client, 0x098E, 0x6003); -- mt9t111_write_reg(client, 0x0990, 0x0100); -- mt9t111_write_reg(client, 0x098E, 0x6025); -- mt9t111_write_reg(client, 0x0990, 0x0003); --} --#endif -- --static void mt9t111_bayer_format(struct i2c_client *client) --{ -- mt9t111_write_regs(client, bayer_pattern_regs, -- sizeof(bayer_pattern_regs) / sizeof(mt9t111_regs)); --} -- --static void mt9t111_enable_pll(struct i2c_client *client) --{ -- int i; -- unsigned short value; -- -- mt9t111_write_regs(client, pll_regs1, -- sizeof(pll_regs1) / sizeof(mt9t111_regs)); -- for (i = 0; i < 100; i++) { -- mt9t111_read_reg(client, 0x0014, &value); -- if ((value & 0x8000) != 0) -- break; -- mdelay(2); -- } -- mt9t111_write_regs(client, pll_regs2, -- sizeof(pll_regs2) / sizeof(mt9t111_regs)); --} -- -- --static void mt9t111_loaddefault(struct i2c_client *client) --{ -- mt9t111_write_reg(client, 0x001A, 0x0219); -- mt9t111_write_reg(client, 0x001A, 0x0218); -- -- mt9t111_enable_pll(client); -- mt9t111_write_regs(client, def_regs1, -- sizeof(def_regs1) / sizeof(mt9t111_regs)); -- mt9t111_write_regs(client, patch_rev6, -- sizeof(patch_rev6) / sizeof(mt9t111_regs)); -- mt9t111_write_regs(client, def_regs2, -- sizeof(def_regs2) / sizeof(mt9t111_regs)); -- --#ifdef USE_RAW -- mt9t111_bayer_format(client); --#endif -- --#ifdef COLOR_BAR -- mt9t111_color_bar(client); --#endif -- -- mt9t111_refresh(client); --} -- --static struct v4l2_int_slave mt9t111_slave = { -- .ioctls = mt9t111_ioctl_desc, -- .num_ioctls = ARRAY_SIZE(mt9t111_ioctl_desc), --}; -- --static struct v4l2_int_device mt9t111_int_device = { -- .module = THIS_MODULE, -- .name = "mt9t111", -- .priv = &mt9t111, -- .type = v4l2_int_type_slave, -- .u = { -- .slave = &mt9t111_slave, -- }, --}; -- --/** -- * mt9t111_probe - sensor driver i2c probe handler -- * @client: i2c driver client device structure -- * -- * Register sensor as an i2c client device and V4L2 -- * device. -- */ --static int --mt9t111_probe(struct i2c_client *client, const struct i2c_device_id *id) --{ -- struct mt9t111_sensor *sensor = &mt9t111; -- int err; -- -- if (i2c_get_clientdata(client)) -- return -EBUSY; -- -- sensor->pdata = client->dev.platform_data; -- -- if (!sensor->pdata) { -- dev_err(&client->dev, "no platform data?\n"); -- return -ENODEV; -- } -- -- sensor->v4l2_int_device = &mt9t111_int_device; -- sensor->i2c_client = client; -- -- i2c_set_clientdata(client, sensor); -- -- sensor->pix.width = 640; -- sensor->pix.height = 480; --#ifdef USE_RAW -- sensor->pix.pixelformat = V4L2_PIX_FMT_SGRBG10; --#else -- sensor->pix.pixelformat = V4L2_PIX_FMT_YUYV; --#endif -- err = v4l2_int_device_register(sensor->v4l2_int_device); -- if (err) -- i2c_set_clientdata(client, NULL); -- return err; --} -- --/** -- * mt9t111_remove - sensor driver i2c remove handler -- * @client: i2c driver client device structure -- * -- * Unregister sensor as an i2c client device and V4L2 -- * device. Complement of mt9t111_probe(). -- */ --static int __exit --mt9t111_remove(struct i2c_client *client) --{ -- struct mt9t111_sensor *sensor = i2c_get_clientdata(client); -- -- if (!client->adapter) -- return -ENODEV; /* our client isn't attached */ -- -- v4l2_int_device_unregister(sensor->v4l2_int_device); -- i2c_set_clientdata(client, NULL); -- -- return 0; --} -- --static const struct i2c_device_id mt9t111_id[] = { -- { "mt9t111", 0 }, -- { }, --}; --MODULE_DEVICE_TABLE(i2c, mt9t111_id); -- --static struct i2c_driver mt9t111sensor_i2c_driver = { -- .driver = { -- .name = "mt9t111", -- .owner = THIS_MODULE, -- }, -- .probe = mt9t111_probe, -- .remove = __exit_p(mt9t111_remove), -- .id_table = mt9t111_id, --}; -- --/** -- * mt9t111sensor_init - sensor driver module_init handler -- * -- * Registers driver as an i2c client driver. Returns 0 on success, -- * error code otherwise. -- */ --static int __init mt9t111sensor_init(void) --{ --printk(KERN_INFO "entering mt9t111sensor_init\n"); -- return i2c_add_driver(&mt9t111sensor_i2c_driver); --} --module_init(mt9t111sensor_init); -- --/** -- * mt9t111sensor_cleanup - sensor driver module_exit handler -- * -- * Unregisters/deletes driver as an i2c client driver. -- * Complement of mt9t111sensor_init. -- */ --static void __exit mt9t111sensor_cleanup(void) --{ -- i2c_del_driver(&mt9t111sensor_i2c_driver); --} --module_exit(mt9t111sensor_cleanup); -- --MODULE_LICENSE("GPL"); --MODULE_DESCRIPTION("mt9t111 camera sensor driver"); -diff --git a/drivers/media/video/mt9t111_reg.h b/drivers/media/video/mt9t111_reg.h -deleted file mode 100644 -index e226c37..0000000 ---- a/drivers/media/video/mt9t111_reg.h -+++ /dev/null -@@ -1,1364 +0,0 @@ --/* -- * drivers/media/video/mt9t111_reg.h -- * -- * mt9t111 sensor driver header file -- * -- * Copyright (C) 2009 Leopard Imaging -- * -- * This file is licensed under the terms of the GNU General Public License -- * version 2. This program is licensed "as is" without any warranty of any -- * kind, whether express or implied. -- */ -- --#ifndef MT9T111_REG_H --#define MT9T111_REG_H -- --/* register addr */ --#define MT9T111_CHIP_ID (0x0000) -- --/* register value */ --#define MT9T111_CHIP_ID_VALUE (0x2680) -- --typedef struct { -- u16 delay_time; -- u16 addr; -- u16 data; --} mt9t111_regs; -- --mt9t111_regs patch_rev6[] = { -- {0, 0x0982, 0x0}, -- {0, 0x098A, 0xCE7}, -- {0, 0x0990, 0x3C3C}, -- {0, 0x0992, 0x3C3C}, -- {0, 0x0994, 0x3C5F}, -- {0, 0x0996, 0x4F30}, -- {0, 0x0998, 0xED08}, -- {0, 0x099a, 0xBD61}, -- {0, 0x099c, 0xD5CE}, -- {0, 0x099e, 0x4CD}, -- {0, 0x098A, 0xCF7}, -- {0, 0x0990, 0x1F17}, -- {0, 0x0992, 0x211}, -- {0, 0x0994, 0xCC33}, -- {0, 0x0996, 0x2E30}, -- {0, 0x0998, 0xED02}, -- {0, 0x099a, 0xCCFF}, -- {0, 0x099c, 0xFDED}, -- {0, 0x099e, 0xCC}, -- {0, 0x098A, 0xD07}, -- {0, 0x0990, 0x2}, -- {0, 0x0992, 0xBD70}, -- {0, 0x0994, 0x6D18}, -- {0, 0x0996, 0xDE1F}, -- {0, 0x0998, 0x181F}, -- {0, 0x099a, 0x8E01}, -- {0, 0x099c, 0x10CC}, -- {0, 0x099e, 0x3C52}, -- {0, 0x098A, 0xD17}, -- {0, 0x0990, 0x30ED}, -- {0, 0x0992, 0x18}, -- {0, 0x0994, 0xECA0}, -- {0, 0x0996, 0xC4FD}, -- {0, 0x0998, 0xBD70}, -- {0, 0x099a, 0x2120}, -- {0, 0x099c, 0x1ECC}, -- {0, 0x099e, 0x3C52}, -- {0, 0x098A, 0xD27}, -- {0, 0x0990, 0x30ED}, -- {0, 0x0992, 0xDE}, -- {0, 0x0994, 0x1FEC}, -- {0, 0x0996, 0xA0BD}, -- {0, 0x0998, 0x7021}, -- {0, 0x099a, 0xCC3C}, -- {0, 0x099c, 0x5230}, -- {0, 0x099e, 0xED02}, -- {0, 0x098A, 0xD37}, -- {0, 0x0990, 0xCCFF}, -- {0, 0x0992, 0xFCED}, -- {0, 0x0994, 0xCC}, -- {0, 0x0996, 0x2}, -- {0, 0x0998, 0xBD70}, -- {0, 0x099a, 0x6DFC}, -- {0, 0x099c, 0x4E1}, -- {0, 0x099e, 0x1A83}, -- {0, 0x098A, 0xD47}, -- {0, 0x0990, 0x1}, -- {0, 0x0992, 0x2720}, -- {0, 0x0994, 0x1A83}, -- {0, 0x0996, 0x4}, -- {0, 0x0998, 0x271E}, -- {0, 0x099a, 0x1A83}, -- {0, 0x099c, 0x8}, -- {0, 0x099e, 0x271C}, -- {0, 0x098A, 0xD57}, -- {0, 0x0990, 0x1A83}, -- {0, 0x0992, 0x10}, -- {0, 0x0994, 0x271A}, -- {0, 0x0996, 0x1A83}, -- {0, 0x0998, 0x20}, -- {0, 0x099a, 0x2718}, -- {0, 0x099c, 0x1A83}, -- {0, 0x099e, 0x40}, -- {0, 0x098A, 0xD67}, -- {0, 0x0990, 0x2716}, -- {0, 0x0992, 0x2019}, -- {0, 0x0994, 0xC61E}, -- {0, 0x0996, 0x2012}, -- {0, 0x0998, 0xC622}, -- {0, 0x099a, 0x200E}, -- {0, 0x099c, 0xC621}, -- {0, 0x099e, 0x200A}, -- {0, 0x098A, 0xD77}, -- {0, 0x0990, 0xC620}, -- {0, 0x0992, 0x2006}, -- {0, 0x0994, 0xC62A}, -- {0, 0x0996, 0x2002}, -- {0, 0x0998, 0xC62B}, -- {0, 0x099a, 0x30ED}, -- {0, 0x099c, 0x8CC}, -- {0, 0x099e, 0x3400}, -- {0, 0x098A, 0xD87}, -- {0, 0x0990, 0x30ED}, -- {0, 0x0992, 0x34}, -- {0, 0x0994, 0xBD6F}, -- {0, 0x0996, 0xD184}, -- {0, 0x0998, 0x330}, -- {0, 0x099a, 0xED07}, -- {0, 0x099c, 0xA60A}, -- {0, 0x099e, 0x4848}, -- {0, 0x098A, 0xD97}, -- {0, 0x0990, 0x5FED}, -- {0, 0x0992, 0x5EA}, -- {0, 0x0994, 0x8AA}, -- {0, 0x0996, 0x731}, -- {0, 0x0998, 0xBD70}, -- {0, 0x099a, 0x2130}, -- {0, 0x099c, 0xC60A}, -- {0, 0x099e, 0x3A35}, -- {0, 0x098A, 0xDA7}, -- {0, 0x0990, 0x3937}, -- {0, 0x0992, 0x3C3C}, -- {0, 0x0994, 0x3C34}, -- {0, 0x0996, 0xDE2F}, -- {0, 0x0998, 0xEE0E}, -- {0, 0x099a, 0xAD00}, -- {0, 0x099c, 0x7D13}, -- {0, 0x099e, 0xEF27}, -- {0, 0x098A, 0xDB7}, -- {0, 0x0990, 0x7CCE}, -- {0, 0x0992, 0x13E0}, -- {0, 0x0994, 0x1E05}, -- {0, 0x0996, 0x1060}, -- {0, 0x0998, 0xE60E}, -- {0, 0x099a, 0x4FC3}, -- {0, 0x099c, 0x13F0}, -- {0, 0x099e, 0x8FE6}, -- {0, 0x098A, 0xDC7}, -- {0, 0x0990, 0x30}, -- {0, 0x0992, 0xE107}, -- {0, 0x0994, 0x2216}, -- {0, 0x0996, 0xF613}, -- {0, 0x0998, 0xEE4F}, -- {0, 0x099a, 0xC313}, -- {0, 0x099c, 0xF38F}, -- {0, 0x099e, 0xE600}, -- {0, 0x098A, 0xDD7}, -- {0, 0x0990, 0x30E1}, -- {0, 0x0992, 0x725}, -- {0, 0x0994, 0x7F6}, -- {0, 0x0996, 0x13EE}, -- {0, 0x0998, 0xC103}, -- {0, 0x099a, 0x253C}, -- {0, 0x099c, 0x7F13}, -- {0, 0x099e, 0xEEF6}, -- {0, 0x098A, 0xDE7}, -- {0, 0x0990, 0x13EF}, -- {0, 0x0992, 0xE706}, -- {0, 0x0994, 0xCC13}, -- {0, 0x0996, 0xF0ED}, -- {0, 0x0998, 0x4CC}, -- {0, 0x099a, 0x13F3}, -- {0, 0x099c, 0x200F}, -- {0, 0x099e, 0x7C13}, -- {0, 0x098A, 0xDF7}, -- {0, 0x0990, 0xEEEC}, -- {0, 0x0992, 0x4C3}, -- {0, 0x0994, 0x1}, -- {0, 0x0996, 0xED04}, -- {0, 0x0998, 0xEC02}, -- {0, 0x099a, 0xC300}, -- {0, 0x099c, 0x1ED}, -- {0, 0x099e, 0x2F6}, -- {0, 0x098A, 0xE07}, -- {0, 0x0990, 0x13EE}, -- {0, 0x0992, 0xE106}, -- {0, 0x0994, 0x2412}, -- {0, 0x0996, 0xEE04}, -- {0, 0x0998, 0xE600}, -- {0, 0x099a, 0x30E1}, -- {0, 0x099c, 0x722}, -- {0, 0x099e, 0xDFEE}, -- {0, 0x098A, 0xE17}, -- {0, 0x0990, 0x2E6}, -- {0, 0x0992, 0x30}, -- {0, 0x0994, 0xE107}, -- {0, 0x0996, 0x25D6}, -- {0, 0x0998, 0xDE49}, -- {0, 0x099a, 0xEE08}, -- {0, 0x099c, 0xAD00}, -- {0, 0x099e, 0xCC13}, -- {0, 0x098A, 0xE27}, -- {0, 0x0990, 0xF630}, -- {0, 0x0992, 0xED00}, -- {0, 0x0994, 0xDE2F}, -- {0, 0x0996, 0xEE10}, -- {0, 0x0998, 0xCC13}, -- {0, 0x099a, 0xFAAD}, -- {0, 0x099c, 0x38}, -- {0, 0x099e, 0x3838}, -- {0, 0x098A, 0xE37}, -- {0, 0x0990, 0x3839}, -- {0, 0x098A, 0x1000}, -- {0, 0x0990, 0xCC10}, -- {0, 0x0992, 0x9BD}, -- {0, 0x0994, 0x4224}, -- {0, 0x0996, 0x7E10}, -- {0, 0x0998, 0x9C6}, -- {0, 0x099a, 0x1F7}, -- {0, 0x099c, 0x18A}, -- {0, 0x099e, 0xC606}, -- {0, 0x098A, 0x1010}, -- {0, 0x0990, 0xF701}, -- {0, 0x0992, 0x8BDE}, -- {0, 0x0994, 0x3F18}, -- {0, 0x0996, 0xCE0B}, -- {0, 0x0998, 0xF1CC}, -- {0, 0x099a, 0x11}, -- {0, 0x099c, 0xBDD7}, -- {0, 0x099e, 0xCC}, -- {0, 0x098A, 0x1020}, -- {0, 0x0990, 0xBF1}, -- {0, 0x0992, 0xDD3F}, -- {0, 0x0994, 0xDE35}, -- {0, 0x0996, 0x18CE}, -- {0, 0x0998, 0xC03}, -- {0, 0x099a, 0xCC00}, -- {0, 0x099c, 0x3FBD}, -- {0, 0x099e, 0xD700}, -- {0, 0x098A, 0x1030}, -- {0, 0x0990, 0xCC0C}, -- {0, 0x0992, 0x3DD}, -- {0, 0x0994, 0x35DE}, -- {0, 0x0996, 0x4718}, -- {0, 0x0998, 0xCE0C}, -- {0, 0x099a, 0x43CC}, -- {0, 0x099c, 0x15}, -- {0, 0x099e, 0xBDD7}, -- {0, 0x098A, 0x1040}, -- {0, 0x0990, 0xCC}, -- {0, 0x0992, 0xC43}, -- {0, 0x0994, 0xDD47}, -- {0, 0x0996, 0xFE00}, -- {0, 0x0998, 0x3318}, -- {0, 0x099a, 0xCE0C}, -- {0, 0x099c, 0x59CC}, -- {0, 0x099e, 0x9}, -- {0, 0x098A, 0x1050}, -- {0, 0x0990, 0xBDD7}, -- {0, 0x0992, 0xCC}, -- {0, 0x0994, 0xC59}, -- {0, 0x0996, 0xFD00}, -- {0, 0x0998, 0x33DE}, -- {0, 0x099a, 0x4118}, -- {0, 0x099c, 0xCE0C}, -- {0, 0x099e, 0x63CC}, -- {0, 0x098A, 0x1060}, -- {0, 0x0990, 0xD}, -- {0, 0x0992, 0xBDD7}, -- {0, 0x0994, 0xCC}, -- {0, 0x0996, 0xC63}, -- {0, 0x0998, 0xDD41}, -- {0, 0x099a, 0xFE00}, -- {0, 0x099c, 0x3118}, -- {0, 0x099e, 0xCE0C}, -- {0, 0x098A, 0x1070}, -- {0, 0x0990, 0x71CC}, -- {0, 0x0992, 0x29}, -- {0, 0x0994, 0xBDD7}, -- {0, 0x0996, 0xCC}, -- {0, 0x0998, 0xC71}, -- {0, 0x099a, 0xFD00}, -- {0, 0x099c, 0x31DE}, -- {0, 0x099e, 0x3918}, -- {0, 0x098A, 0x1080}, -- {0, 0x0990, 0xCE0C}, -- {0, 0x0992, 0x9BCC}, -- {0, 0x0994, 0x23}, -- {0, 0x0996, 0xBDD7}, -- {0, 0x0998, 0xCC}, -- {0, 0x099a, 0xC9B}, -- {0, 0x099c, 0xDD39}, -- {0, 0x099e, 0xDE49}, -- {0, 0x098A, 0x1090}, -- {0, 0x0990, 0x18CE}, -- {0, 0x0992, 0xCBF}, -- {0, 0x0994, 0xCC00}, -- {0, 0x0996, 0xDBD}, -- {0, 0x0998, 0xD700}, -- {0, 0x099a, 0xCC0C}, -- {0, 0x099c, 0xBFDD}, -- {0, 0x099e, 0x49CC}, -- {0, 0x098A, 0x10A0}, -- {0, 0x0990, 0x1162}, -- {0, 0x0992, 0xFD0B}, -- {0, 0x0994, 0xFDCC}, -- {0, 0x0996, 0xCE7}, -- {0, 0x0998, 0xFD0C}, -- {0, 0x099a, 0x1FCC}, -- {0, 0x099c, 0x1245}, -- {0, 0x099e, 0xFD0C}, -- {0, 0x098A, 0x10B0}, -- {0, 0x0990, 0x51CC}, -- {0, 0x0992, 0x110B}, -- {0, 0x0994, 0xFD0C}, -- {0, 0x0996, 0x5BCC}, -- {0, 0x0998, 0x1108}, -- {0, 0x099a, 0xFD0C}, -- {0, 0x099c, 0x65CC}, -- {0, 0x099e, 0x10D0}, -- {0, 0x098A, 0x10C0}, -- {0, 0x0990, 0xFD0C}, -- {0, 0x0992, 0x7BCC}, -- {0, 0x0994, 0x12DE}, -- {0, 0x0996, 0xFD0C}, -- {0, 0x0998, 0xA7CC}, -- {0, 0x099a, 0xDA8}, -- {0, 0x099c, 0xFD0C}, -- {0, 0x099e, 0xCB39}, -- {0, 0x098A, 0x10D0}, -- {0, 0x0990, 0x37DE}, -- {0, 0x0992, 0x1DEC}, -- {0, 0x0994, 0xC5F}, -- {0, 0x0996, 0x8402}, -- {0, 0x0998, 0x4416}, -- {0, 0x099a, 0x4FF7}, -- {0, 0x099c, 0xCCD}, -- {0, 0x099e, 0xE60B}, -- {0, 0x098A, 0x10E0}, -- {0, 0x0990, 0xC407}, -- {0, 0x0992, 0xF70C}, -- {0, 0x0994, 0xCE7F}, -- {0, 0x0996, 0x30C4}, -- {0, 0x0998, 0xEC25}, -- {0, 0x099a, 0xFD30}, -- {0, 0x099c, 0xC5FC}, -- {0, 0x099e, 0x6D6}, -- {0, 0x098A, 0x10F0}, -- {0, 0x0990, 0xFD30}, -- {0, 0x0992, 0xC701}, -- {0, 0x0994, 0xFC30}, -- {0, 0x0996, 0xC0FD}, -- {0, 0x0998, 0xBED}, -- {0, 0x099a, 0xFC30}, -- {0, 0x099c, 0xC2FD}, -- {0, 0x099e, 0xBEF}, -- {0, 0x098A, 0x1100}, -- {0, 0x0990, 0x30E6}, -- {0, 0x0992, 0xBD}, -- {0, 0x0994, 0x5203}, -- {0, 0x0996, 0x3139}, -- {0, 0x0998, 0x7E9E}, -- {0, 0x099a, 0x143C}, -- {0, 0x099c, 0x3C3C}, -- {0, 0x099e, 0x2101}, -- {0, 0x098A, 0x1110}, -- {0, 0x0990, 0xCC00}, -- {0, 0x0992, 0x18BD}, -- {0, 0x0994, 0x6FD1}, -- {0, 0x0996, 0xC504}, -- {0, 0x0998, 0x26F5}, -- {0, 0x099a, 0xDC25}, -- {0, 0x099c, 0x30ED}, -- {0, 0x099e, 0x420}, -- {0, 0x098A, 0x1120}, -- {0, 0x0990, 0x12EE}, -- {0, 0x0992, 0x43C}, -- {0, 0x0994, 0x1838}, -- {0, 0x0996, 0xE621}, -- {0, 0x0998, 0x18E7}, -- {0, 0x099a, 0xBE30}, -- {0, 0x099c, 0xEE04}, -- {0, 0x099e, 0xEC1D}, -- {0, 0x098A, 0x1130}, -- {0, 0x0990, 0x30ED}, -- {0, 0x0992, 0x4EC}, -- {0, 0x0994, 0x426}, -- {0, 0x0996, 0xEACC}, -- {0, 0x0998, 0x1A}, -- {0, 0x099a, 0xED02}, -- {0, 0x099c, 0xCCFB}, -- {0, 0x099e, 0xFFED}, -- {0, 0x098A, 0x1140}, -- {0, 0x0990, 0xCC}, -- {0, 0x0992, 0x400}, -- {0, 0x0994, 0xBD70}, -- {0, 0x0996, 0x6DCC}, -- {0, 0x0998, 0x1A}, -- {0, 0x099a, 0x30ED}, -- {0, 0x099c, 0x2CC}, -- {0, 0x099e, 0xFBFF}, -- {0, 0x098A, 0x1150}, -- {0, 0x0990, 0xED00}, -- {0, 0x0992, 0x5F4F}, -- {0, 0x0994, 0xBD70}, -- {0, 0x0996, 0x6D5F}, -- {0, 0x0998, 0xBD5B}, -- {0, 0x099a, 0x17BD}, -- {0, 0x099c, 0x558B}, -- {0, 0x099e, 0x3838}, -- {0, 0x098A, 0x1160}, -- {0, 0x0990, 0x3839}, -- {0, 0x0992, 0x3C3C}, -- {0, 0x0994, 0xC640}, -- {0, 0x0996, 0xF730}, -- {0, 0x0998, 0xC4FC}, -- {0, 0x099a, 0xBED}, -- {0, 0x099c, 0xFD30}, -- {0, 0x099e, 0xC0FC}, -- {0, 0x098A, 0x1170}, -- {0, 0x0990, 0xBEF}, -- {0, 0x0992, 0xFD30}, -- {0, 0x0994, 0xC2DE}, -- {0, 0x0996, 0x1DEC}, -- {0, 0x0998, 0x25FD}, -- {0, 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0x0990, 0x0000}, -- {0, 0x098E, 0xEC8E}, -- {0, 0x0990, 0x0000} --}; -- --#endif -diff --git a/include/media/mt9t111.h b/include/media/mt9t111.h -deleted file mode 100644 -index cd34885..0000000 ---- a/include/media/mt9t111.h -+++ /dev/null -@@ -1,79 +0,0 @@ --/* -- * include/media/mt9t111.h -- * -- * mt9t111 sensor driver -- * -- * Copyright (C) 2009 Leopard Imaging -- * -- * This file is licensed under the terms of the GNU General Public License -- * version 2. This program is licensed "as is" without any warranty of any -- * kind, whether express or implied. -- */ -- --#ifndef MT9T111_H --#define MT9T111_H -- --/********************************* -- * Defines and Macros and globals -- ********************************/ -- --#ifdef TRUE --#undef TRUE --#endif -- --#ifdef FALSE --#undef FALSE --#endif -- --#define TRUE 1 --#define FALSE 0 -- --#ifdef DEBUG --#undef DEBUG --#endif -- --#ifndef TYPES --#define TYPES --#endif -- --#define MT9T111_I2C_REGISTERED (1) --#define MT9T111_I2C_UNREGISTERED (0) -- --/*i2c adress for MT9T111*/ --#define MT9T111_I2C_ADDR (0x78 >> 1) -- --#define MT9T111_CLK_MAX (54000000) /* 54MHz */ --#define MT9T111_CLK_MIN (6000000) /* 6Mhz */ -- --#define MT9T111_I2C_CONFIG (1) --#define I2C_ONE_BYTE_TRANSFER (1) --#define I2C_TWO_BYTE_TRANSFER (2) --#define I2C_THREE_BYTE_TRANSFER (3) --#define I2C_FOUR_BYTE_TRANSFER (4) --#define I2C_TXRX_DATA_MASK (0x00FF) --#define I2C_TXRX_DATA_MASK_UPPER (0xFF00) --#define I2C_TXRX_DATA_SHIFT (8) -- --struct mt9t111_platform_data { -- char *master; -- int (*power_set) (struct v4l2_int_device *s, enum v4l2_power on); -- int (*ifparm) (struct v4l2_ifparm *p); -- int (*priv_data_set) (void *); -- /* Interface control params */ -- bool clk_polarity; -- bool hs_polarity; -- bool vs_polarity; --}; -- --/** -- * struct capture_size - image capture size information -- * @width: image width in pixels -- * @height: image height in pixels -- */ --struct capture_size { -- unsigned long width; -- unsigned long height; --}; -- --#endif /*for ifndef MT9T111 */ -- --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0049-V4L-DVB-13670-soc-camera-Add-mt9t112-camera-driver.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0049-V4L-DVB-13670-soc-camera-Add-mt9t112-camera-driver.patch deleted file mode 100644 index b4ca4a6..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0049-V4L-DVB-13670-soc-camera-Add-mt9t112-camera-driver.patch +++ /dev/null @@ -1,1285 +0,0 @@ -From 1164e8b10b5237d1cf60c1e9752324b62f30a6bc Mon Sep 17 00:00:00 2001 -From: Kuninori Morimoto <morimoto.kuninori@renesas.com> -Date: Fri, 11 Dec 2009 11:53:55 -0300 -Subject: [PATCH 49/75] V4L/DVB (13670): soc-camera: Add mt9t112 camera driver - -create mode 100644 drivers/media/video/mt9t112.c - create mode 100644 include/media/mt9t112.h - -Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> -Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> -Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com> ---- - drivers/media/video/Kconfig | 6 + - drivers/media/video/Makefile | 1 + - drivers/media/video/mt9t112.c | 1177 +++++++++++++++++++++++++++++++++++++++ - include/media/mt9t112.h | 30 + - include/media/v4l2-chip-ident.h | 2 + - 5 files changed, 1216 insertions(+), 0 deletions(-) - create mode 100644 drivers/media/video/mt9t112.c - create mode 100644 include/media/mt9t112.h - -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index 780b246..7caade9 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -832,6 +832,12 @@ config SOC_CAMERA_MT9T031 - help - This driver supports MT9T031 cameras from Micron. - -+config SOC_CAMERA_MT9T112 -+ tristate "mt9t112 support" -+ depends on SOC_CAMERA && I2C -+ help -+ This driver supports MT9T112 cameras from Aptina. -+ - config SOC_CAMERA_MT9V022 - tristate "mt9v022 support" - depends on SOC_CAMERA && I2C -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index 3828723..61ae13f 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -80,6 +80,7 @@ obj-$(CONFIG_VIDEO_MT9V113) += mt9v113.o - obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o - obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o - obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o -+obj-$(CONFIG_SOC_CAMERA_MT9T112) += mt9t112.o - obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o - obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o - obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -new file mode 100644 -index 0000000..fc4dd60 ---- /dev/null -+++ b/drivers/media/video/mt9t112.c -@@ -0,0 +1,1177 @@ -+/* -+ * mt9t112 Camera Driver -+ * -+ * Copyright (C) 2009 Renesas Solutions Corp. -+ * Kuninori Morimoto <morimoto.kuninori@renesas.com> -+ * -+ * Based on ov772x driver, mt9m111 driver, -+ * -+ * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> -+ * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr> -+ * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> -+ * Copyright (C) 2008 Magnus Damm -+ * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/delay.h> -+#include <linux/i2c.h> -+#include <linux/init.h> -+#include <linux/module.h> -+#include <linux/slab.h> -+#include <linux/videodev2.h> -+ -+#include <media/mt9t112.h> -+#include <media/soc_camera.h> -+#include <media/soc_mediabus.h> -+#include <media/v4l2-chip-ident.h> -+#include <media/v4l2-common.h> -+ -+/* you can check PLL/clock info */ -+/* #define EXT_CLOCK 24000000 */ -+ -+/************************************************************************ -+ -+ -+ macro -+ -+ -+************************************************************************/ -+/* -+ * frame size -+ */ -+#define MAX_WIDTH 2048 -+#define MAX_HEIGHT 1536 -+ -+#define VGA_WIDTH 640 -+#define VGA_HEIGHT 480 -+ -+/* -+ * macro of read/write -+ */ -+#define ECHECKER(ret, x) \ -+ do { \ -+ (ret) = (x); \ -+ if ((ret) < 0) \ -+ return (ret); \ -+ } while (0) -+ -+#define mt9t112_reg_write(ret, client, a, b) \ -+ ECHECKER(ret, __mt9t112_reg_write(client, a, b)) -+#define mt9t112_mcu_write(ret, client, a, b) \ -+ ECHECKER(ret, __mt9t112_mcu_write(client, a, b)) -+ -+#define mt9t112_reg_mask_set(ret, client, a, b, c) \ -+ ECHECKER(ret, __mt9t112_reg_mask_set(client, a, b, c)) -+#define mt9t112_mcu_mask_set(ret, client, a, b, c) \ -+ ECHECKER(ret, __mt9t112_mcu_mask_set(client, a, b, c)) -+ -+#define mt9t112_reg_read(ret, client, a) \ -+ ECHECKER(ret, __mt9t112_reg_read(client, a)) -+ -+/* -+ * Logical address -+ */ -+#define _VAR(id, offset, base) (base | (id & 0x1f) << 10 | (offset & 0x3ff)) -+#define VAR(id, offset) _VAR(id, offset, 0x0000) -+#define VAR8(id, offset) _VAR(id, offset, 0x8000) -+ -+/************************************************************************ -+ -+ -+ struct -+ -+ -+************************************************************************/ -+struct mt9t112_frame_size { -+ u16 width; -+ u16 height; -+}; -+ -+struct mt9t112_format { -+ enum v4l2_mbus_pixelcode code; -+ enum v4l2_colorspace colorspace; -+ u16 fmt; -+ u16 order; -+}; -+ -+struct mt9t112_priv { -+ struct v4l2_subdev subdev; -+ struct mt9t112_camera_info *info; -+ struct i2c_client *client; -+ struct soc_camera_device icd; -+ struct mt9t112_frame_size frame; -+ const struct mt9t112_format *format; -+ int model; -+ u32 flags; -+/* for flags */ -+#define INIT_DONE (1<<0) -+}; -+ -+/************************************************************************ -+ -+ -+ supported format -+ -+ -+************************************************************************/ -+ -+static const struct mt9t112_format mt9t112_cfmts[] = { -+ { -+ .code = V4L2_MBUS_FMT_YUYV8_2X8_BE, -+ .colorspace = V4L2_COLORSPACE_JPEG, -+ .fmt = 1, -+ .order = 0, -+ }, { -+ .code = V4L2_MBUS_FMT_YVYU8_2X8_BE, -+ .colorspace = V4L2_COLORSPACE_JPEG, -+ .fmt = 1, -+ .order = 1, -+ }, { -+ .code = V4L2_MBUS_FMT_YUYV8_2X8_LE, -+ .colorspace = V4L2_COLORSPACE_JPEG, -+ .fmt = 1, -+ .order = 2, -+ }, { -+ .code = V4L2_MBUS_FMT_YVYU8_2X8_LE, -+ .colorspace = V4L2_COLORSPACE_JPEG, -+ .fmt = 1, -+ .order = 3, -+ }, { -+ .code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .fmt = 8, -+ .order = 2, -+ }, { -+ .code = V4L2_MBUS_FMT_RGB565_2X8_LE, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .fmt = 4, -+ .order = 2, -+ }, -+}; -+ -+/************************************************************************ -+ -+ -+ general function -+ -+ -+************************************************************************/ -+static struct mt9t112_priv *to_mt9t112(const struct i2c_client *client) -+{ -+ return container_of(i2c_get_clientdata(client), -+ struct mt9t112_priv, -+ subdev); -+} -+ -+static int __mt9t112_reg_read(const struct i2c_client *client, u16 command) -+{ -+ struct i2c_msg msg[2]; -+ u8 buf[2]; -+ int ret; -+ -+ command = swab16(command); -+ -+ msg[0].addr = client->addr; -+ msg[0].flags = 0; -+ msg[0].len = 2; -+ msg[0].buf = (u8 *)&command; -+ -+ msg[1].addr = client->addr; -+ msg[1].flags = I2C_M_RD; -+ msg[1].len = 2; -+ msg[1].buf = buf; -+ -+ /* -+ * if return value of this function is < 0, -+ * it mean error. -+ * else, under 16bit is valid data. -+ */ -+ ret = i2c_transfer(client->adapter, msg, 2); -+ if (ret < 0) -+ return ret; -+ -+ memcpy(&ret, buf, 2); -+ return swab16(ret); -+} -+ -+static int __mt9t112_reg_write(const struct i2c_client *client, -+ u16 command, u16 data) -+{ -+ struct i2c_msg msg; -+ u8 buf[4]; -+ int ret; -+ -+ command = swab16(command); -+ data = swab16(data); -+ -+ memcpy(buf + 0, &command, 2); -+ memcpy(buf + 2, &data, 2); -+ -+ msg.addr = client->addr; -+ msg.flags = 0; -+ msg.len = 4; -+ msg.buf = buf; -+ -+ /* -+ * i2c_transfer return message length, -+ * but this function should return 0 if correct case -+ */ -+ ret = i2c_transfer(client->adapter, &msg, 1); -+ if (ret >= 0) -+ ret = 0; -+ -+ return ret; -+} -+ -+static int __mt9t112_reg_mask_set(const struct i2c_client *client, -+ u16 command, -+ u16 mask, -+ u16 set) -+{ -+ int val = __mt9t112_reg_read(client, command); -+ if (val < 0) -+ return val; -+ -+ val &= ~mask; -+ val |= set & mask; -+ -+ return __mt9t112_reg_write(client, command, val); -+} -+ -+/* mcu access */ -+static int __mt9t112_mcu_read(const struct i2c_client *client, u16 command) -+{ -+ int ret; -+ -+ ret = __mt9t112_reg_write(client, 0x098E, command); -+ if (ret < 0) -+ return ret; -+ -+ return __mt9t112_reg_read(client, 0x0990); -+} -+ -+static int __mt9t112_mcu_write(const struct i2c_client *client, -+ u16 command, u16 data) -+{ -+ int ret; -+ -+ ret = __mt9t112_reg_write(client, 0x098E, command); -+ if (ret < 0) -+ return ret; -+ -+ return __mt9t112_reg_write(client, 0x0990, data); -+} -+ -+static int __mt9t112_mcu_mask_set(const struct i2c_client *client, -+ u16 command, -+ u16 mask, -+ u16 set) -+{ -+ int val = __mt9t112_mcu_read(client, command); -+ if (val < 0) -+ return val; -+ -+ val &= ~mask; -+ val |= set & mask; -+ -+ return __mt9t112_mcu_write(client, command, val); -+} -+ -+static int mt9t112_reset(const struct i2c_client *client) -+{ -+ int ret; -+ -+ mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0001); -+ msleep(1); -+ mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0000); -+ -+ return ret; -+} -+ -+#ifndef EXT_CLOCK -+#define CLOCK_INFO(a, b) -+#else -+#define CLOCK_INFO(a, b) mt9t112_clock_info(a, b) -+static int mt9t112_clock_info(const struct i2c_client *client, u32 ext) -+{ -+ int m, n, p1, p2, p3, p4, p5, p6, p7; -+ u32 vco, clk; -+ char *enable; -+ -+ ext /= 1000; /* kbyte order */ -+ -+ mt9t112_reg_read(n, client, 0x0012); -+ p1 = n & 0x000f; -+ n = n >> 4; -+ p2 = n & 0x000f; -+ n = n >> 4; -+ p3 = n & 0x000f; -+ -+ mt9t112_reg_read(n, client, 0x002a); -+ p4 = n & 0x000f; -+ n = n >> 4; -+ p5 = n & 0x000f; -+ n = n >> 4; -+ p6 = n & 0x000f; -+ -+ mt9t112_reg_read(n, client, 0x002c); -+ p7 = n & 0x000f; -+ -+ mt9t112_reg_read(n, client, 0x0010); -+ m = n & 0x00ff; -+ n = (n >> 8) & 0x003f; -+ -+ enable = ((6000 > ext) || (54000 < ext)) ? "X" : ""; -+ dev_info(&client->dev, "EXTCLK : %10u K %s\n", ext, enable); -+ -+ vco = 2 * m * ext / (n+1); -+ enable = ((384000 > vco) || (768000 < vco)) ? "X" : ""; -+ dev_info(&client->dev, "VCO : %10u K %s\n", vco, enable); -+ -+ clk = vco / (p1+1) / (p2+1); -+ enable = (96000 < clk) ? "X" : ""; -+ dev_info(&client->dev, "PIXCLK : %10u K %s\n", clk, enable); -+ -+ clk = vco / (p3+1); -+ enable = (768000 < clk) ? "X" : ""; -+ dev_info(&client->dev, "MIPICLK : %10u K %s\n", clk, enable); -+ -+ clk = vco / (p6+1); -+ enable = (96000 < clk) ? "X" : ""; -+ dev_info(&client->dev, "MCU CLK : %10u K %s\n", clk, enable); -+ -+ clk = vco / (p5+1); -+ enable = (54000 < clk) ? "X" : ""; -+ dev_info(&client->dev, "SOC CLK : %10u K %s\n", clk, enable); -+ -+ clk = vco / (p4+1); -+ enable = (70000 < clk) ? "X" : ""; -+ dev_info(&client->dev, "Sensor CLK : %10u K %s\n", clk, enable); -+ -+ clk = vco / (p7+1); -+ dev_info(&client->dev, "External sensor : %10u K\n", clk); -+ -+ clk = ext / (n+1); -+ enable = ((2000 > clk) || (24000 < clk)) ? "X" : ""; -+ dev_info(&client->dev, "PFD : %10u K %s\n", clk, enable); -+ -+ return 0; -+} -+#endif -+ -+static void mt9t112_frame_check(u32 *width, u32 *height) -+{ -+ if (*width > MAX_WIDTH) -+ *width = MAX_WIDTH; -+ -+ if (*height > MAX_HEIGHT) -+ *height = MAX_HEIGHT; -+} -+ -+static int mt9t112_set_a_frame_size(const struct i2c_client *client, -+ u16 width, -+ u16 height) -+{ -+ int ret; -+ u16 wstart = (MAX_WIDTH - width) / 2; -+ u16 hstart = (MAX_HEIGHT - height) / 2; -+ -+ /* (Context A) Image Width/Height */ -+ mt9t112_mcu_write(ret, client, VAR(26, 0), width); -+ mt9t112_mcu_write(ret, client, VAR(26, 2), height); -+ -+ /* (Context A) Output Width/Height */ -+ mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + width); -+ mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + height); -+ -+ /* (Context A) Start Row/Column */ -+ mt9t112_mcu_write(ret, client, VAR(18, 2), 4 + hstart); -+ mt9t112_mcu_write(ret, client, VAR(18, 4), 4 + wstart); -+ -+ /* (Context A) End Row/Column */ -+ mt9t112_mcu_write(ret, client, VAR(18, 6), 11 + height + hstart); -+ mt9t112_mcu_write(ret, client, VAR(18, 8), 11 + width + wstart); -+ -+ mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); -+ -+ return ret; -+} -+ -+static int mt9t112_set_pll_dividers(const struct i2c_client *client, -+ u8 m, u8 n, -+ u8 p1, u8 p2, u8 p3, -+ u8 p4, u8 p5, u8 p6, -+ u8 p7) -+{ -+ int ret; -+ u16 val; -+ -+ /* N/M */ -+ val = (n << 8) | -+ (m << 0); -+ mt9t112_reg_mask_set(ret, client, 0x0010, 0x3fff, val); -+ -+ /* P1/P2/P3 */ -+ val = ((p3 & 0x0F) << 8) | -+ ((p2 & 0x0F) << 4) | -+ ((p1 & 0x0F) << 0); -+ mt9t112_reg_mask_set(ret, client, 0x0012, 0x0fff, val); -+ -+ /* P4/P5/P6 */ -+ val = (0x7 << 12) | -+ ((p6 & 0x0F) << 8) | -+ ((p5 & 0x0F) << 4) | -+ ((p4 & 0x0F) << 0); -+ mt9t112_reg_mask_set(ret, client, 0x002A, 0x7fff, val); -+ -+ /* P7 */ -+ val = (0x1 << 12) | -+ ((p7 & 0x0F) << 0); -+ mt9t112_reg_mask_set(ret, client, 0x002C, 0x100f, val); -+ -+ return ret; -+} -+ -+static int mt9t112_init_pll(const struct i2c_client *client) -+{ -+ struct mt9t112_priv *priv = to_mt9t112(client); -+ int data, i, ret; -+ -+ mt9t112_reg_mask_set(ret, client, 0x0014, 0x003, 0x0001); -+ -+ /* PLL control: BYPASS PLL = 8517 */ -+ mt9t112_reg_write(ret, client, 0x0014, 0x2145); -+ -+ /* Replace these registers when new timing parameters are generated */ -+ mt9t112_set_pll_dividers(client, -+ priv->info->divider.m, -+ priv->info->divider.n, -+ priv->info->divider.p1, -+ priv->info->divider.p2, -+ priv->info->divider.p3, -+ priv->info->divider.p4, -+ priv->info->divider.p5, -+ priv->info->divider.p6, -+ priv->info->divider.p7); -+ -+ /* -+ * TEST_BYPASS on -+ * PLL_ENABLE on -+ * SEL_LOCK_DET on -+ * TEST_BYPASS off -+ */ -+ mt9t112_reg_write(ret, client, 0x0014, 0x2525); -+ mt9t112_reg_write(ret, client, 0x0014, 0x2527); -+ mt9t112_reg_write(ret, client, 0x0014, 0x3427); -+ mt9t112_reg_write(ret, client, 0x0014, 0x3027); -+ -+ mdelay(10); -+ -+ /* -+ * PLL_BYPASS off -+ * Reference clock count -+ * I2C Master Clock Divider -+ */ -+ mt9t112_reg_write(ret, client, 0x0014, 0x3046); -+ mt9t112_reg_write(ret, client, 0x0022, 0x0190); -+ mt9t112_reg_write(ret, client, 0x3B84, 0x0212); -+ -+ /* External sensor clock is PLL bypass */ -+ mt9t112_reg_write(ret, client, 0x002E, 0x0500); -+ -+ mt9t112_reg_mask_set(ret, client, 0x0018, 0x0002, 0x0002); -+ mt9t112_reg_mask_set(ret, client, 0x3B82, 0x0004, 0x0004); -+ -+ /* MCU disabled */ -+ mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0x0004); -+ -+ /* out of standby */ -+ mt9t112_reg_mask_set(ret, client, 0x0018, 0x0001, 0); -+ -+ mdelay(50); -+ -+ /* -+ * Standby Workaround -+ * Disable Secondary I2C Pads -+ */ -+ mt9t112_reg_write(ret, client, 0x0614, 0x0001); -+ mdelay(1); -+ mt9t112_reg_write(ret, client, 0x0614, 0x0001); -+ mdelay(1); -+ mt9t112_reg_write(ret, client, 0x0614, 0x0001); -+ mdelay(1); -+ mt9t112_reg_write(ret, client, 0x0614, 0x0001); -+ mdelay(1); -+ mt9t112_reg_write(ret, client, 0x0614, 0x0001); -+ mdelay(1); -+ mt9t112_reg_write(ret, client, 0x0614, 0x0001); -+ mdelay(1); -+ -+ /* poll to verify out of standby. Must Poll this bit */ -+ for (i = 0; i < 100; i++) { -+ mt9t112_reg_read(data, client, 0x0018); -+ if (0x4000 & data) -+ break; -+ -+ mdelay(10); -+ } -+ -+ return ret; -+} -+ -+static int mt9t112_init_setting(const struct i2c_client *client) -+{ -+ -+ int ret; -+ -+ /* Adaptive Output Clock (A) */ -+ mt9t112_mcu_mask_set(ret, client, VAR(26, 160), 0x0040, 0x0000); -+ -+ /* Read Mode (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 12), 0x0024); -+ -+ /* Fine Correction (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 15), 0x00CC); -+ -+ /* Fine IT Min (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 17), 0x01f1); -+ -+ /* Fine IT Max Margin (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 19), 0x00fF); -+ -+ /* Base Frame Lines (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 29), 0x032D); -+ -+ /* Min Line Length (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 31), 0x073a); -+ -+ /* Line Length (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 37), 0x07d0); -+ -+ /* Adaptive Output Clock (B) */ -+ mt9t112_mcu_mask_set(ret, client, VAR(27, 160), 0x0040, 0x0000); -+ -+ /* Row Start (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 74), 0x004); -+ -+ /* Column Start (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 76), 0x004); -+ -+ /* Row End (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 78), 0x60B); -+ -+ /* Column End (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 80), 0x80B); -+ -+ /* Fine Correction (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 87), 0x008C); -+ -+ /* Fine IT Min (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 89), 0x01F1); -+ -+ /* Fine IT Max Margin (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 91), 0x00FF); -+ -+ /* Base Frame Lines (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 101), 0x0668); -+ -+ /* Min Line Length (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 103), 0x0AF0); -+ -+ /* Line Length (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0); -+ -+ /* -+ * Flicker Dectection registers -+ * This section should be replaced whenever new Timing file is generated -+ * All the following registers need to be replaced -+ * Following registers are generated from Register Wizard but user can -+ * modify them. For detail see auto flicker detection tuning -+ */ -+ -+ /* FD_FDPERIOD_SELECT */ -+ mt9t112_mcu_write(ret, client, VAR8(8, 5), 0x01); -+ -+ /* PRI_B_CONFIG_FD_ALGO_RUN */ -+ mt9t112_mcu_write(ret, client, VAR(27, 17), 0x0003); -+ -+ /* PRI_A_CONFIG_FD_ALGO_RUN */ -+ mt9t112_mcu_write(ret, client, VAR(26, 17), 0x0003); -+ -+ /* -+ * AFD range detection tuning registers -+ */ -+ -+ /* search_f1_50 */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 165), 0x25); -+ -+ /* search_f2_50 */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 166), 0x28); -+ -+ /* search_f1_60 */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 167), 0x2C); -+ -+ /* search_f2_60 */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 168), 0x2F); -+ -+ /* period_50Hz (A) */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 68), 0xBA); -+ -+ /* secret register by aptina */ -+ /* period_50Hz (A MSB) */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 303), 0x00); -+ -+ /* period_60Hz (A) */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 69), 0x9B); -+ -+ /* secret register by aptina */ -+ /* period_60Hz (A MSB) */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 301), 0x00); -+ -+ /* period_50Hz (B) */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 140), 0x82); -+ -+ /* secret register by aptina */ -+ /* period_50Hz (B) MSB */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 304), 0x00); -+ -+ /* period_60Hz (B) */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 141), 0x6D); -+ -+ /* secret register by aptina */ -+ /* period_60Hz (B) MSB */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 302), 0x00); -+ -+ /* FD Mode */ -+ mt9t112_mcu_write(ret, client, VAR8(8, 2), 0x10); -+ -+ /* Stat_min */ -+ mt9t112_mcu_write(ret, client, VAR8(8, 9), 0x02); -+ -+ /* Stat_max */ -+ mt9t112_mcu_write(ret, client, VAR8(8, 10), 0x03); -+ -+ /* Min_amplitude */ -+ mt9t112_mcu_write(ret, client, VAR8(8, 12), 0x0A); -+ -+ /* RX FIFO Watermark (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 70), 0x0014); -+ -+ /* RX FIFO Watermark (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 142), 0x0014); -+ -+ /* MCLK: 16MHz -+ * PCLK: 73MHz -+ * CorePixCLK: 36.5 MHz -+ */ -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x0044), 133); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x0045), 110); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x008c), 130); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x008d), 108); -+ -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x00A5), 27); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x00a6), 30); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x00a7), 32); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x00a8), 35); -+ -+ return ret; -+} -+ -+static int mt9t112_auto_focus_setting(const struct i2c_client *client) -+{ -+ int ret; -+ -+ mt9t112_mcu_write(ret, client, VAR(12, 13), 0x000F); -+ mt9t112_mcu_write(ret, client, VAR(12, 23), 0x0F0F); -+ mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); -+ -+ mt9t112_reg_write(ret, client, 0x0614, 0x0000); -+ -+ mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x05); -+ mt9t112_mcu_write(ret, client, VAR8(12, 2), 0x02); -+ mt9t112_mcu_write(ret, client, VAR(12, 3), 0x0002); -+ mt9t112_mcu_write(ret, client, VAR(17, 3), 0x8001); -+ mt9t112_mcu_write(ret, client, VAR(17, 11), 0x0025); -+ mt9t112_mcu_write(ret, client, VAR(17, 13), 0x0193); -+ mt9t112_mcu_write(ret, client, VAR8(17, 33), 0x18); -+ mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x05); -+ -+ return ret; -+} -+ -+static int mt9t112_auto_focus_trigger(const struct i2c_client *client) -+{ -+ int ret; -+ -+ mt9t112_mcu_write(ret, client, VAR8(12, 25), 0x01); -+ -+ return ret; -+} -+ -+static int mt9t112_init_camera(const struct i2c_client *client) -+{ -+ int ret; -+ -+ ECHECKER(ret, mt9t112_reset(client)); -+ -+ ECHECKER(ret, mt9t112_init_pll(client)); -+ -+ ECHECKER(ret, mt9t112_init_setting(client)); -+ -+ ECHECKER(ret, mt9t112_auto_focus_setting(client)); -+ -+ mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0); -+ -+ /* Analog setting B */ -+ mt9t112_reg_write(ret, client, 0x3084, 0x2409); -+ mt9t112_reg_write(ret, client, 0x3092, 0x0A49); -+ mt9t112_reg_write(ret, client, 0x3094, 0x4949); -+ mt9t112_reg_write(ret, client, 0x3096, 0x4950); -+ -+ /* -+ * Disable adaptive clock -+ * PRI_A_CONFIG_JPEG_OB_TX_CONTROL_VAR -+ * PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR -+ */ -+ mt9t112_mcu_write(ret, client, VAR(26, 160), 0x0A2E); -+ mt9t112_mcu_write(ret, client, VAR(27, 160), 0x0A2E); -+ -+ /* Configure STatus in Status_before_length Format and enable header */ -+ /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */ -+ mt9t112_mcu_write(ret, client, VAR(27, 144), 0x0CB4); -+ -+ /* Enable JPEG in context B */ -+ /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */ -+ mt9t112_mcu_write(ret, client, VAR8(27, 142), 0x01); -+ -+ /* Disable Dac_TXLO */ -+ mt9t112_reg_write(ret, client, 0x316C, 0x350F); -+ -+ /* Set max slew rates */ -+ mt9t112_reg_write(ret, client, 0x1E, 0x777); -+ -+ return ret; -+} -+ -+/************************************************************************ -+ -+ -+ soc_camera_ops -+ -+ -+************************************************************************/ -+static int mt9t112_set_bus_param(struct soc_camera_device *icd, -+ unsigned long flags) -+{ -+ return 0; -+} -+ -+static unsigned long mt9t112_query_bus_param(struct soc_camera_device *icd) -+{ -+ struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); -+ struct mt9t112_priv *priv = to_mt9t112(client); -+ struct soc_camera_link *icl = to_soc_camera_link(icd); -+ unsigned long flags = SOCAM_MASTER | SOCAM_VSYNC_ACTIVE_HIGH | -+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_HIGH; -+ -+ flags |= (priv->info->flags & MT9T112_FLAG_PCLK_RISING_EDGE) ? -+ SOCAM_PCLK_SAMPLE_RISING : SOCAM_PCLK_SAMPLE_FALLING; -+ -+ if (priv->info->flags & MT9T112_FLAG_DATAWIDTH_8) -+ flags |= SOCAM_DATAWIDTH_8; -+ else -+ flags |= SOCAM_DATAWIDTH_10; -+ -+ return soc_camera_apply_sensor_flags(icl, flags); -+} -+ -+static struct soc_camera_ops mt9t112_ops = { -+ .set_bus_param = mt9t112_set_bus_param, -+ .query_bus_param = mt9t112_query_bus_param, -+}; -+ -+/************************************************************************ -+ -+ -+ v4l2_subdev_core_ops -+ -+ -+************************************************************************/ -+static int mt9t112_g_chip_ident(struct v4l2_subdev *sd, -+ struct v4l2_dbg_chip_ident *id) -+{ -+ struct i2c_client *client = sd->priv; -+ struct mt9t112_priv *priv = to_mt9t112(client); -+ -+ id->ident = priv->model; -+ id->revision = 0; -+ -+ return 0; -+} -+ -+#ifdef CONFIG_VIDEO_ADV_DEBUG -+static int mt9t112_g_register(struct v4l2_subdev *sd, -+ struct v4l2_dbg_register *reg) -+{ -+ struct i2c_client *client = sd->priv; -+ int ret; -+ -+ reg->size = 2; -+ mt9t112_reg_read(ret, client, reg->reg); -+ -+ reg->val = (__u64)ret; -+ -+ return 0; -+} -+ -+static int mt9t112_s_register(struct v4l2_subdev *sd, -+ struct v4l2_dbg_register *reg) -+{ -+ struct i2c_client *client = sd->priv; -+ int ret; -+ -+ mt9t112_reg_write(ret, client, reg->reg, reg->val); -+ -+ return ret; -+} -+#endif -+ -+static struct v4l2_subdev_core_ops mt9t112_subdev_core_ops = { -+ .g_chip_ident = mt9t112_g_chip_ident, -+#ifdef CONFIG_VIDEO_ADV_DEBUG -+ .g_register = mt9t112_g_register, -+ .s_register = mt9t112_s_register, -+#endif -+}; -+ -+ -+/************************************************************************ -+ -+ -+ v4l2_subdev_video_ops -+ -+ -+************************************************************************/ -+static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable) -+{ -+ struct i2c_client *client = sd->priv; -+ struct mt9t112_priv *priv = to_mt9t112(client); -+ int ret = 0; -+ -+ if (!enable) { -+ /* FIXME -+ * -+ * If user selected large output size, -+ * and used it long time, -+ * mt9t112 camera will be very warm. -+ * -+ * But current driver can not stop mt9t112 camera. -+ * So, set small size here to solve this problem. -+ */ -+ mt9t112_set_a_frame_size(client, VGA_WIDTH, VGA_HEIGHT); -+ return ret; -+ } -+ -+ if (!(priv->flags & INIT_DONE)) { -+ u16 param = (MT9T112_FLAG_PCLK_RISING_EDGE & -+ priv->info->flags) ? 0x0001 : 0x0000; -+ -+ ECHECKER(ret, mt9t112_init_camera(client)); -+ -+ /* Invert PCLK (Data sampled on falling edge of pixclk) */ -+ mt9t112_reg_write(ret, client, 0x3C20, param); -+ -+ mdelay(5); -+ -+ priv->flags |= INIT_DONE; -+ } -+ -+ mt9t112_mcu_write(ret, client, VAR(26, 7), priv->format->fmt); -+ mt9t112_mcu_write(ret, client, VAR(26, 9), priv->format->order); -+ mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); -+ -+ mt9t112_set_a_frame_size(client, -+ priv->frame.width, -+ priv->frame.height); -+ -+ ECHECKER(ret, mt9t112_auto_focus_trigger(client)); -+ -+ dev_dbg(&client->dev, "format : %d\n", priv->format->code); -+ dev_dbg(&client->dev, "size : %d x %d\n", -+ priv->frame.width, -+ priv->frame.height); -+ -+ CLOCK_INFO(client, EXT_CLOCK); -+ -+ return ret; -+} -+ -+static int mt9t112_set_params(struct i2c_client *client, u32 width, u32 height, -+ enum v4l2_mbus_pixelcode code) -+{ -+ struct mt9t112_priv *priv = to_mt9t112(client); -+ int i; -+ -+ priv->format = NULL; -+ -+ /* -+ * frame size check -+ */ -+ mt9t112_frame_check(&width, &height); -+ -+ /* -+ * get color format -+ */ -+ for (i = 0; i < ARRAY_SIZE(mt9t112_cfmts); i++) -+ if (mt9t112_cfmts[i].code == code) -+ break; -+ -+ if (i == ARRAY_SIZE(mt9t112_cfmts)) -+ return -EINVAL; -+ -+ priv->frame.width = (u16)width; -+ priv->frame.height = (u16)height; -+ -+ priv->format = mt9t112_cfmts + i; -+ -+ return 0; -+} -+ -+static int mt9t112_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) -+{ -+ a->bounds.left = 0; -+ a->bounds.top = 0; -+ a->bounds.width = VGA_WIDTH; -+ a->bounds.height = VGA_HEIGHT; -+ a->defrect = a->bounds; -+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ a->pixelaspect.numerator = 1; -+ a->pixelaspect.denominator = 1; -+ -+ return 0; -+} -+ -+static int mt9t112_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) -+{ -+ a->c.left = 0; -+ a->c.top = 0; -+ a->c.width = VGA_WIDTH; -+ a->c.height = VGA_HEIGHT; -+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ -+ return 0; -+} -+ -+static int mt9t112_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) -+{ -+ struct i2c_client *client = sd->priv; -+ struct v4l2_rect *rect = &a->c; -+ -+ return mt9t112_set_params(client, rect->width, rect->height, -+ V4L2_MBUS_FMT_YUYV8_2X8_BE); -+} -+ -+static int mt9t112_g_fmt(struct v4l2_subdev *sd, -+ struct v4l2_mbus_framefmt *mf) -+{ -+ struct i2c_client *client = sd->priv; -+ struct mt9t112_priv *priv = to_mt9t112(client); -+ -+ if (!priv->format) { -+ int ret = mt9t112_set_params(client, VGA_WIDTH, VGA_HEIGHT, -+ V4L2_MBUS_FMT_YUYV8_2X8_BE); -+ if (ret < 0) -+ return ret; -+ } -+ -+ mf->width = priv->frame.width; -+ mf->height = priv->frame.height; -+ /* TODO: set colorspace */ -+ mf->code = priv->format->code; -+ mf->field = V4L2_FIELD_NONE; -+ -+ return 0; -+} -+ -+static int mt9t112_s_fmt(struct v4l2_subdev *sd, -+ struct v4l2_mbus_framefmt *mf) -+{ -+ struct i2c_client *client = sd->priv; -+ -+ /* TODO: set colorspace */ -+ return mt9t112_set_params(client, mf->width, mf->height, mf->code); -+} -+ -+static int mt9t112_try_fmt(struct v4l2_subdev *sd, -+ struct v4l2_mbus_framefmt *mf) -+{ -+ mt9t112_frame_check(&mf->width, &mf->height); -+ -+ /* TODO: set colorspace */ -+ mf->field = V4L2_FIELD_NONE; -+ -+ return 0; -+} -+ -+static int mt9t112_enum_fmt(struct v4l2_subdev *sd, int index, -+ enum v4l2_mbus_pixelcode *code) -+{ -+ if ((unsigned int)index >= ARRAY_SIZE(mt9t112_cfmts)) -+ return -EINVAL; -+ -+ *code = mt9t112_cfmts[index].code; -+ return 0; -+} -+ -+static struct v4l2_subdev_video_ops mt9t112_subdev_video_ops = { -+ .s_stream = mt9t112_s_stream, -+ .g_mbus_fmt = mt9t112_g_fmt, -+ .s_mbus_fmt = mt9t112_s_fmt, -+ .try_mbus_fmt = mt9t112_try_fmt, -+ .cropcap = mt9t112_cropcap, -+ .g_crop = mt9t112_g_crop, -+ .s_crop = mt9t112_s_crop, -+ .enum_mbus_fmt = mt9t112_enum_fmt, -+}; -+ -+/************************************************************************ -+ -+ -+ i2c driver -+ -+ -+************************************************************************/ -+static struct v4l2_subdev_ops mt9t112_subdev_ops = { -+ .core = &mt9t112_subdev_core_ops, -+ .video = &mt9t112_subdev_video_ops, -+}; -+ -+static int mt9t112_camera_probe(struct soc_camera_device *icd, -+ struct i2c_client *client) -+{ -+ struct mt9t112_priv *priv = to_mt9t112(client); -+ const char *devname; -+ int chipid; -+ -+ /* -+ * We must have a parent by now. And it cannot be a wrong one. -+ * So this entire test is completely redundant. -+ */ -+ if (!icd->dev.parent || -+ to_soc_camera_host(icd->dev.parent)->nr != icd->iface) -+ return -ENODEV; -+ -+ /* -+ * check and show chip ID -+ */ -+ mt9t112_reg_read(chipid, client, 0x0000); -+ -+ switch (chipid) { -+ case 0x2680: -+ devname = "mt9t111"; -+ priv->model = V4L2_IDENT_MT9T111; -+ break; -+ case 0x2682: -+ devname = "mt9t112"; -+ priv->model = V4L2_IDENT_MT9T112; -+ break; -+ default: -+ dev_err(&client->dev, "Product ID error %04x\n", chipid); -+ return -ENODEV; -+ } -+ -+ dev_info(&client->dev, "%s chip ID %04x\n", devname, chipid); -+ -+ return 0; -+} -+ -+static int mt9t112_probe(struct i2c_client *client, -+ const struct i2c_device_id *did) -+{ -+ struct mt9t112_priv *priv; -+ struct soc_camera_device *icd = client->dev.platform_data; -+ struct soc_camera_link *icl; -+ int ret; -+ -+ if (!icd) { -+ dev_err(&client->dev, "mt9t112: missing soc-camera data!\n"); -+ return -EINVAL; -+ } -+ -+ icl = to_soc_camera_link(icd); -+ if (!icl || !icl->priv) -+ return -EINVAL; -+ -+ priv = kzalloc(sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ priv->info = icl->priv; -+ -+ v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops); -+ -+ icd->ops = &mt9t112_ops; -+ -+ ret = mt9t112_camera_probe(icd, client); -+ if (ret) { -+ icd->ops = NULL; -+ i2c_set_clientdata(client, NULL); -+ kfree(priv); -+ } -+ -+ return ret; -+} -+ -+static int mt9t112_remove(struct i2c_client *client) -+{ -+ struct mt9t112_priv *priv = to_mt9t112(client); -+ struct soc_camera_device *icd = client->dev.platform_data; -+ -+ icd->ops = NULL; -+ i2c_set_clientdata(client, NULL); -+ kfree(priv); -+ return 0; -+} -+ -+static const struct i2c_device_id mt9t112_id[] = { -+ { "mt9t112", 0 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, mt9t112_id); -+ -+static struct i2c_driver mt9t112_i2c_driver = { -+ .driver = { -+ .name = "mt9t112", -+ }, -+ .probe = mt9t112_probe, -+ .remove = mt9t112_remove, -+ .id_table = mt9t112_id, -+}; -+ -+/************************************************************************ -+ -+ -+ module function -+ -+ -+************************************************************************/ -+static int __init mt9t112_module_init(void) -+{ -+ return i2c_add_driver(&mt9t112_i2c_driver); -+} -+ -+static void __exit mt9t112_module_exit(void) -+{ -+ i2c_del_driver(&mt9t112_i2c_driver); -+} -+ -+module_init(mt9t112_module_init); -+module_exit(mt9t112_module_exit); -+ -+MODULE_DESCRIPTION("SoC Camera driver for mt9t112"); -+MODULE_AUTHOR("Kuninori Morimoto"); -+MODULE_LICENSE("GPL v2"); -diff --git a/include/media/mt9t112.h b/include/media/mt9t112.h -new file mode 100644 -index 0000000..a43c74a ---- /dev/null -+++ b/include/media/mt9t112.h -@@ -0,0 +1,30 @@ -+/* mt9t112 Camera -+ * -+ * Copyright (C) 2009 Renesas Solutions Corp. -+ * Kuninori Morimoto <morimoto.kuninori@renesas.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef __MT9T112_H__ -+#define __MT9T112_H__ -+ -+#define MT9T112_FLAG_PCLK_RISING_EDGE (1 << 0) -+#define MT9T112_FLAG_DATAWIDTH_8 (1 << 1) /* default width is 10 */ -+ -+struct mt9t112_pll_divider { -+ u8 m, n; -+ u8 p1, p2, p3, p4, p5, p6, p7; -+}; -+ -+/* -+ * mt9t112 camera info -+ */ -+struct mt9t112_camera_info { -+ u32 flags; -+ struct mt9t112_pll_divider divider; -+}; -+ -+#endif /* __MT9T112_H__ */ -diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h -index 91942db..6cc107d 100644 ---- a/include/media/v4l2-chip-ident.h -+++ b/include/media/v4l2-chip-ident.h -@@ -267,6 +267,8 @@ enum { - V4L2_IDENT_MT9V022IX7ATC = 45010, /* No way to detect "normal" I77ATx */ - V4L2_IDENT_MT9V022IX7ATM = 45015, /* and "lead free" IA7ATx chips */ - V4L2_IDENT_MT9T031 = 45020, -+ V4L2_IDENT_MT9T111 = 45021, -+ V4L2_IDENT_MT9T112 = 45022, - V4L2_IDENT_MT9V111 = 45031, - V4L2_IDENT_MT9V112 = 45032, - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0050-soc-camera-mt9t112-modify-exiting-conditions-from-st.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0050-soc-camera-mt9t112-modify-exiting-conditions-from-st.patch deleted file mode 100644 index 551717d..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0050-soc-camera-mt9t112-modify-exiting-conditions-from-st.patch +++ /dev/null @@ -1,31 +0,0 @@ -From eb14ff193fa8cbe52f47349c0aeca2d91ea5cfd8 Mon Sep 17 00:00:00 2001 -From: Kuninori Morimoto <morimoto.kuninori@renesas.com> -Date: Tue, 2 Feb 2010 13:17:54 +0900 -Subject: [PATCH 50/75] soc-camera: mt9t112: modify exiting conditions from standby mode - -This polling is needed if camera is in standby mode, but current exiting -condition is inverted. - -Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> -Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> -Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com> ---- - drivers/media/video/mt9t112.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index fc4dd60..7438f8d 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -514,7 +514,7 @@ static int mt9t112_init_pll(const struct i2c_client *client) - /* poll to verify out of standby. Must Poll this bit */ - for (i = 0; i < 100; i++) { - mt9t112_reg_read(data, client, 0x0018); -- if (0x4000 & data) -+ if (!(0x4000 & data)) - break; - - mdelay(10); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0051-mt9t112-Migrate-from-soc_camera-to-v4l2-int-device.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0051-mt9t112-Migrate-from-soc_camera-to-v4l2-int-device.patch deleted file mode 100644 index 0c3b7af..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0051-mt9t112-Migrate-from-soc_camera-to-v4l2-int-device.patch +++ /dev/null @@ -1,934 +0,0 @@ -From bd42ce1ffea1be835f54ac61bb7ea4e0cd99e7aa Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 1 Jul 2010 07:26:38 -0500 -Subject: [PATCH 51/75] mt9t112: Migrate from soc_camera to v4l2-int-device - -This is to use the driver with the old OMAP3 Camera-ISP platform. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/Kconfig | 12 +- - drivers/media/video/Makefile | 2 +- - drivers/media/video/mt9t112.c | 658 +++++++++++++++++++++++------------------ - include/media/mt9t112.h | 13 + - 4 files changed, 391 insertions(+), 294 deletions(-) - -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index 7caade9..4c1fb0f 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -354,6 +354,12 @@ config VIDEO_MT9P012 - MT9P012 camera. It is currently working with the TI OMAP3 - camera controller. - -+config VIDEO_MT9T112 -+ tristate "mt9t112 support" -+ depends on I2C && VIDEO_V4L2 -+ help -+ This driver supports MT9T112 cameras from Aptina. -+ - config VIDEO_DW9710 - tristate "Lens driver for DW9710" - depends on I2C && VIDEO_V4L2 -@@ -832,12 +838,6 @@ config SOC_CAMERA_MT9T031 - help - This driver supports MT9T031 cameras from Micron. - --config SOC_CAMERA_MT9T112 -- tristate "mt9t112 support" -- depends on SOC_CAMERA && I2C -- help -- This driver supports MT9T112 cameras from Aptina. -- - config SOC_CAMERA_MT9V022 - tristate "mt9v022 support" - depends on SOC_CAMERA && I2C -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index 61ae13f..fb7e46c 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -80,7 +80,6 @@ obj-$(CONFIG_VIDEO_MT9V113) += mt9v113.o - obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o - obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o - obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o --obj-$(CONFIG_SOC_CAMERA_MT9T112) += mt9t112.o - obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o - obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o - obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o -@@ -129,6 +128,7 @@ obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o - obj-y += isp/ - obj-$(CONFIG_VIDEO_OMAP3) += omap34xxcam.o - obj-$(CONFIG_VIDEO_MT9P012) += mt9p012.o -+obj-$(CONFIG_VIDEO_MT9T112) += mt9t112.o - obj-$(CONFIG_VIDEO_DW9710) += dw9710.o - obj-$(CONFIG_VIDEO_TPS61059) += tps61059.o - obj-$(CONFIG_VIDEO_OV3640) += ov3640.o -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index 7438f8d..6f54394 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -25,10 +25,8 @@ - #include <linux/videodev2.h> - - #include <media/mt9t112.h> --#include <media/soc_camera.h> --#include <media/soc_mediabus.h> -+#include <media/v4l2-int-device.h> - #include <media/v4l2-chip-ident.h> --#include <media/v4l2-common.h> - - /* you can check PLL/clock info */ - /* #define EXT_CLOCK 24000000 */ -@@ -43,8 +41,8 @@ - /* - * frame size - */ --#define MAX_WIDTH 2048 --#define MAX_HEIGHT 1536 -+#define MAX_WIDTH 640 /* 2048 */ -+#define MAX_HEIGHT 480 /* 1536 */ - - #define VGA_WIDTH 640 - #define VGA_HEIGHT 480 -@@ -91,20 +89,12 @@ struct mt9t112_frame_size { - u16 height; - }; - --struct mt9t112_format { -- enum v4l2_mbus_pixelcode code; -- enum v4l2_colorspace colorspace; -- u16 fmt; -- u16 order; --}; -- - struct mt9t112_priv { -- struct v4l2_subdev subdev; -+ struct mt9t112_platform_data *pdata; -+ struct v4l2_int_device *v4l2_int_device; - struct mt9t112_camera_info *info; - struct i2c_client *client; -- struct soc_camera_device icd; -- struct mt9t112_frame_size frame; -- const struct mt9t112_format *format; -+ struct v4l2_pix_format pix; - int model; - u32 flags; - /* for flags */ -@@ -119,38 +109,42 @@ struct mt9t112_priv { - - ************************************************************************/ - --static const struct mt9t112_format mt9t112_cfmts[] = { -+const static struct v4l2_fmtdesc mt9t112_formats[] = { -+ { -+ .description = "YUYV (YUV 4:2:2), packed", -+ .pixelformat = V4L2_PIX_FMT_YUYV, -+ }, - { -- .code = V4L2_MBUS_FMT_YUYV8_2X8_BE, -- .colorspace = V4L2_COLORSPACE_JPEG, -- .fmt = 1, -- .order = 0, -- }, { -- .code = V4L2_MBUS_FMT_YVYU8_2X8_BE, -- .colorspace = V4L2_COLORSPACE_JPEG, -- .fmt = 1, -- .order = 1, -- }, { -- .code = V4L2_MBUS_FMT_YUYV8_2X8_LE, -- .colorspace = V4L2_COLORSPACE_JPEG, -- .fmt = 1, -- .order = 2, -- }, { -- .code = V4L2_MBUS_FMT_YVYU8_2X8_LE, -- .colorspace = V4L2_COLORSPACE_JPEG, -- .fmt = 1, -- .order = 3, -- }, { -- .code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, -- .colorspace = V4L2_COLORSPACE_SRGB, -- .fmt = 8, -- .order = 2, -- }, { -- .code = V4L2_MBUS_FMT_RGB565_2X8_LE, -- .colorspace = V4L2_COLORSPACE_SRGB, -- .fmt = 4, -- .order = 2, -+ .description = "RGB555, le", -+ .pixelformat = V4L2_PIX_FMT_RGB555, - }, -+ { -+ .description = "RGB565, le", -+ .pixelformat = V4L2_PIX_FMT_RGB565, -+ }, -+}; -+ -+/************************************************************************ -+ -+ -+ supported sizes -+ -+ -+************************************************************************/ -+const static struct mt9t112_frame_size mt9t112_sizes[] = { -+ { 640, 480 }, -+ /* { 2048, 1536} */ -+}; -+ -+/************************************************************************ -+ -+ -+ supported sizes -+ -+ -+************************************************************************/ -+const struct v4l2_fract mt9t112_frameintervals[] = { -+ { .numerator = 1, .denominator = 10 } - }; - - /************************************************************************ -@@ -160,11 +154,32 @@ static const struct mt9t112_format mt9t112_cfmts[] = { - - - ************************************************************************/ --static struct mt9t112_priv *to_mt9t112(const struct i2c_client *client) -+static u16 mt9t112_pixfmt_to_fmt(u32 pixelformat) - { -- return container_of(i2c_get_clientdata(client), -- struct mt9t112_priv, -- subdev); -+ switch (pixelformat) { -+ case V4L2_PIX_FMT_RGB555: -+ return 8; -+ case V4L2_PIX_FMT_RGB565: -+ return 4; -+ case V4L2_PIX_FMT_YUYV: -+ /* FALLTHROUGH */ -+ default: -+ return 1; -+ } -+} -+ -+static u16 mt9t112_pixfmt_to_order(u32 pixelformat) -+{ -+ switch (pixelformat) { -+ case V4L2_PIX_FMT_RGB555: -+ /* FALLTHROUGH */ -+ case V4L2_PIX_FMT_RGB565: -+ return 2; -+ case V4L2_PIX_FMT_YUYV: -+ /* FALLTHROUGH */ -+ default: -+ return 0; -+ } - } - - static int __mt9t112_reg_read(const struct i2c_client *client, u16 command) -@@ -438,7 +453,7 @@ static int mt9t112_set_pll_dividers(const struct i2c_client *client, - - static int mt9t112_init_pll(const struct i2c_client *client) - { -- struct mt9t112_priv *priv = to_mt9t112(client); -+ struct mt9t112_priv *priv = i2c_get_clientdata(client); - int data, i, ret; - - mt9t112_reg_mask_set(ret, client, 0x0014, 0x003, 0x0001); -@@ -757,167 +772,12 @@ static int mt9t112_init_camera(const struct i2c_client *client) - return ret; - } - --/************************************************************************ -- -- -- soc_camera_ops -- -- --************************************************************************/ --static int mt9t112_set_bus_param(struct soc_camera_device *icd, -- unsigned long flags) --{ -- return 0; --} -- --static unsigned long mt9t112_query_bus_param(struct soc_camera_device *icd) --{ -- struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); -- struct mt9t112_priv *priv = to_mt9t112(client); -- struct soc_camera_link *icl = to_soc_camera_link(icd); -- unsigned long flags = SOCAM_MASTER | SOCAM_VSYNC_ACTIVE_HIGH | -- SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_HIGH; -- -- flags |= (priv->info->flags & MT9T112_FLAG_PCLK_RISING_EDGE) ? -- SOCAM_PCLK_SAMPLE_RISING : SOCAM_PCLK_SAMPLE_FALLING; -- -- if (priv->info->flags & MT9T112_FLAG_DATAWIDTH_8) -- flags |= SOCAM_DATAWIDTH_8; -- else -- flags |= SOCAM_DATAWIDTH_10; -- -- return soc_camera_apply_sensor_flags(icl, flags); --} -- --static struct soc_camera_ops mt9t112_ops = { -- .set_bus_param = mt9t112_set_bus_param, -- .query_bus_param = mt9t112_query_bus_param, --}; -- --/************************************************************************ -- -- -- v4l2_subdev_core_ops -- -- --************************************************************************/ --static int mt9t112_g_chip_ident(struct v4l2_subdev *sd, -- struct v4l2_dbg_chip_ident *id) --{ -- struct i2c_client *client = sd->priv; -- struct mt9t112_priv *priv = to_mt9t112(client); -- -- id->ident = priv->model; -- id->revision = 0; -- -- return 0; --} -- --#ifdef CONFIG_VIDEO_ADV_DEBUG --static int mt9t112_g_register(struct v4l2_subdev *sd, -- struct v4l2_dbg_register *reg) --{ -- struct i2c_client *client = sd->priv; -- int ret; -- -- reg->size = 2; -- mt9t112_reg_read(ret, client, reg->reg); -- -- reg->val = (__u64)ret; -- -- return 0; --} -- --static int mt9t112_s_register(struct v4l2_subdev *sd, -- struct v4l2_dbg_register *reg) --{ -- struct i2c_client *client = sd->priv; -- int ret; -- -- mt9t112_reg_write(ret, client, reg->reg, reg->val); -- -- return ret; --} --#endif -- --static struct v4l2_subdev_core_ops mt9t112_subdev_core_ops = { -- .g_chip_ident = mt9t112_g_chip_ident, --#ifdef CONFIG_VIDEO_ADV_DEBUG -- .g_register = mt9t112_g_register, -- .s_register = mt9t112_s_register, --#endif --}; -- -- --/************************************************************************ -- -- -- v4l2_subdev_video_ops -- -- --************************************************************************/ --static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable) --{ -- struct i2c_client *client = sd->priv; -- struct mt9t112_priv *priv = to_mt9t112(client); -- int ret = 0; -- -- if (!enable) { -- /* FIXME -- * -- * If user selected large output size, -- * and used it long time, -- * mt9t112 camera will be very warm. -- * -- * But current driver can not stop mt9t112 camera. -- * So, set small size here to solve this problem. -- */ -- mt9t112_set_a_frame_size(client, VGA_WIDTH, VGA_HEIGHT); -- return ret; -- } -- -- if (!(priv->flags & INIT_DONE)) { -- u16 param = (MT9T112_FLAG_PCLK_RISING_EDGE & -- priv->info->flags) ? 0x0001 : 0x0000; -- -- ECHECKER(ret, mt9t112_init_camera(client)); -- -- /* Invert PCLK (Data sampled on falling edge of pixclk) */ -- mt9t112_reg_write(ret, client, 0x3C20, param); -- -- mdelay(5); -- -- priv->flags |= INIT_DONE; -- } -- -- mt9t112_mcu_write(ret, client, VAR(26, 7), priv->format->fmt); -- mt9t112_mcu_write(ret, client, VAR(26, 9), priv->format->order); -- mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); -- -- mt9t112_set_a_frame_size(client, -- priv->frame.width, -- priv->frame.height); -- -- ECHECKER(ret, mt9t112_auto_focus_trigger(client)); -- -- dev_dbg(&client->dev, "format : %d\n", priv->format->code); -- dev_dbg(&client->dev, "size : %d x %d\n", -- priv->frame.width, -- priv->frame.height); -- -- CLOCK_INFO(client, EXT_CLOCK); -- -- return ret; --} -- - static int mt9t112_set_params(struct i2c_client *client, u32 width, u32 height, -- enum v4l2_mbus_pixelcode code) -+ u32 pixelformat) - { -- struct mt9t112_priv *priv = to_mt9t112(client); -+ struct mt9t112_priv *priv = i2c_get_clientdata(client); - int i; - -- priv->format = NULL; -- - /* - * frame size check - */ -@@ -926,22 +786,23 @@ static int mt9t112_set_params(struct i2c_client *client, u32 width, u32 height, - /* - * get color format - */ -- for (i = 0; i < ARRAY_SIZE(mt9t112_cfmts); i++) -- if (mt9t112_cfmts[i].code == code) -+ for (i = 0; i < ARRAY_SIZE(mt9t112_formats); i++) -+ if (mt9t112_formats[i].pixelformat == pixelformat) - break; - -- if (i == ARRAY_SIZE(mt9t112_cfmts)) -+ if (i == ARRAY_SIZE(mt9t112_formats)) - return -EINVAL; - -- priv->frame.width = (u16)width; -- priv->frame.height = (u16)height; -+ priv->pix.width = (u16)width; -+ priv->pix.height = (u16)height; - -- priv->format = mt9t112_cfmts + i; -+ priv->pix.pixelformat = pixelformat; - - return 0; - } - --static int mt9t112_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) -+static int mt9t112_v4l2_int_cropcap(struct v4l2_int_device *s, -+ struct v4l2_cropcap *a) - { - a->bounds.left = 0; - a->bounds.top = 0; -@@ -955,7 +816,8 @@ static int mt9t112_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) - return 0; - } - --static int mt9t112_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) -+static int mt9t112_v4l2_int_g_crop(struct v4l2_int_device *s, -+ struct v4l2_crop *a) - { - a->c.left = 0; - a->c.top = 0; -@@ -966,77 +828,116 @@ static int mt9t112_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) - return 0; - } - --static int mt9t112_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) -+static int mt9t112_v4l2_int_s_crop(struct v4l2_int_device *s, -+ struct v4l2_crop *a) - { -- struct i2c_client *client = sd->priv; -- struct v4l2_rect *rect = &a->c; -- -- return mt9t112_set_params(client, rect->width, rect->height, -- V4L2_MBUS_FMT_YUYV8_2X8_BE); -+ if ((a->c.left != 0) || -+ (a->c.top != 0) || -+ (a->c.width != VGA_WIDTH) || -+ (a->c.height != VGA_HEIGHT)) { -+ return -EINVAL; -+ } -+ return 0; - } - --static int mt9t112_g_fmt(struct v4l2_subdev *sd, -- struct v4l2_mbus_framefmt *mf) -+static int mt9t112_v4l2_int_g_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) - { -- struct i2c_client *client = sd->priv; -- struct mt9t112_priv *priv = to_mt9t112(client); -+ struct mt9t112_priv *priv = s->priv; -+ struct i2c_client *client = priv->client; - -- if (!priv->format) { -+ if ((priv->pix.pixelformat == 0) || -+ (priv->pix.width == 0) || -+ (priv->pix.height == 0)) { - int ret = mt9t112_set_params(client, VGA_WIDTH, VGA_HEIGHT, -- V4L2_MBUS_FMT_YUYV8_2X8_BE); -+ V4L2_PIX_FMT_YUYV); - if (ret < 0) - return ret; - } - -- mf->width = priv->frame.width; -- mf->height = priv->frame.height; -+ f->fmt.pix.width = priv->pix.width; -+ f->fmt.pix.height = priv->pix.height; - /* TODO: set colorspace */ -- mf->code = priv->format->code; -- mf->field = V4L2_FIELD_NONE; -+ f->fmt.pix.pixelformat = priv->pix.pixelformat; -+ f->fmt.pix.field = V4L2_FIELD_NONE; - - return 0; - } - --static int mt9t112_s_fmt(struct v4l2_subdev *sd, -- struct v4l2_mbus_framefmt *mf) -+ -+static int mt9t112_v4l2_int_s_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) - { -- struct i2c_client *client = sd->priv; -+ struct mt9t112_priv *priv = s->priv; -+ struct i2c_client *client = priv->client; - - /* TODO: set colorspace */ -- return mt9t112_set_params(client, mf->width, mf->height, mf->code); -+ return mt9t112_set_params(client, f->fmt.pix.width, f->fmt.pix.height, -+ f->fmt.pix.pixelformat); - } - --static int mt9t112_try_fmt(struct v4l2_subdev *sd, -- struct v4l2_mbus_framefmt *mf) -+static int mt9t112_v4l2_int_try_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) - { -- mt9t112_frame_check(&mf->width, &mf->height); -+ mt9t112_frame_check(&f->fmt.pix.width, &f->fmt.pix.height); - - /* TODO: set colorspace */ -- mf->field = V4L2_FIELD_NONE; -+ f->fmt.pix.field = V4L2_FIELD_NONE; - - return 0; - } - --static int mt9t112_enum_fmt(struct v4l2_subdev *sd, int index, -- enum v4l2_mbus_pixelcode *code) -+static int mt9t112_v4l2_int_enum_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_fmtdesc *fmt) - { -- if ((unsigned int)index >= ARRAY_SIZE(mt9t112_cfmts)) -+ int index = fmt->index; -+ enum v4l2_buf_type type = fmt->type; -+ -+ memset(fmt, 0, sizeof(*fmt)); -+ fmt->index = index; -+ fmt->type = type; -+ -+ switch (fmt->type) { -+ case V4L2_BUF_TYPE_VIDEO_CAPTURE: -+ if (index >= ARRAY_SIZE(mt9t112_formats)) -+ return -EINVAL; -+ break; -+ default: - return -EINVAL; -+ } - -- *code = mt9t112_cfmts[index].code; -+ fmt->flags = mt9t112_formats[index].flags; -+ strlcpy(fmt->description, mt9t112_formats[index].description, -+ sizeof(fmt->description)); -+ fmt->pixelformat = mt9t112_formats[index].pixelformat; - return 0; - } - --static struct v4l2_subdev_video_ops mt9t112_subdev_video_ops = { -- .s_stream = mt9t112_s_stream, -- .g_mbus_fmt = mt9t112_g_fmt, -- .s_mbus_fmt = mt9t112_s_fmt, -- .try_mbus_fmt = mt9t112_try_fmt, -- .cropcap = mt9t112_cropcap, -- .g_crop = mt9t112_g_crop, -- .s_crop = mt9t112_s_crop, -- .enum_mbus_fmt = mt9t112_enum_fmt, --}; -+static int mt9t112_v4l2_int_s_parm(struct v4l2_int_device *s, -+ struct v4l2_streamparm *a) -+{ -+ /* TODO: set paramters */ -+ return 0; -+} -+ -+static int mt9t112_v4l2_int_g_parm(struct v4l2_int_device *s, -+ struct v4l2_streamparm *a) -+{ -+ struct v4l2_captureparm *cparm = &a->parm.capture; -+ -+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; -+ -+ memset(a, 0, sizeof(*a)); -+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ -+ cparm->capability = V4L2_CAP_TIMEPERFRAME; -+ /* FIXME: Is 10 fps really the only option? */ -+ cparm->timeperframe.numerator = 1; -+ cparm->timeperframe.denominator = 10; -+ -+ return 0; -+} - - /************************************************************************ - -@@ -1045,27 +946,14 @@ static struct v4l2_subdev_video_ops mt9t112_subdev_video_ops = { - - - ************************************************************************/ --static struct v4l2_subdev_ops mt9t112_subdev_ops = { -- .core = &mt9t112_subdev_core_ops, -- .video = &mt9t112_subdev_video_ops, --}; - --static int mt9t112_camera_probe(struct soc_camera_device *icd, -- struct i2c_client *client) -+static int mt9t112_detect(struct i2c_client *client) - { -- struct mt9t112_priv *priv = to_mt9t112(client); -+ struct mt9t112_priv *priv = i2c_get_clientdata(client); - const char *devname; - int chipid; - - /* -- * We must have a parent by now. And it cannot be a wrong one. -- * So this entire test is completely redundant. -- */ -- if (!icd->dev.parent || -- to_soc_camera_host(icd->dev.parent)->nr != icd->iface) -- return -ENODEV; -- -- /* - * check and show chip ID - */ - mt9t112_reg_read(chipid, client, 0x0000); -@@ -1089,37 +977,232 @@ static int mt9t112_camera_probe(struct soc_camera_device *icd, - return 0; - } - -+static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, -+ enum v4l2_power power) -+{ -+ struct mt9t112_priv *priv = s->priv; -+ struct i2c_client *client = priv->client; -+ int ret; -+ -+ switch (power) { -+ case V4L2_POWER_STANDBY: -+ /* FALLTHROUGH */ -+ case V4L2_POWER_OFF: -+ /* FIXME -+ * -+ * If user selected large output size, -+ * and used it long time, -+ * mt9t112 camera will be very warm. -+ * -+ * But current driver can not stop mt9t112 camera. -+ * So, set small size here to solve this problem. -+ */ -+ mt9t112_set_a_frame_size(client, VGA_WIDTH, VGA_HEIGHT); -+ -+ ret = priv->pdata->power_set(s, power); -+ if (ret < 0) { -+ dev_err(&client->dev, "Unable to set target board power " -+ "state (OFF/STANDBY)\n"); -+ return ret; -+ } -+ break; -+ case V4L2_POWER_ON: -+ ret = priv->pdata->power_set(s, power); -+ if (ret < 0) { -+ dev_err(&client->dev, "Unable to set target board power " -+ "state (ON)\n"); -+ return ret; -+ } -+ if (!(priv->flags & INIT_DONE)) { -+ u16 param = (MT9T112_FLAG_PCLK_RISING_EDGE & -+ priv->info->flags) ? 0x0001 : 0x0000; -+ -+ ECHECKER(ret, mt9t112_detect(client)); -+ ECHECKER(ret, mt9t112_init_camera(client)); -+ -+ /* Invert PCLK (Data sampled on falling edge of pixclk) */ -+ mt9t112_reg_write(ret, client, 0x3C20, param); -+ -+ mdelay(5); -+ -+ priv->flags |= INIT_DONE; -+ } -+ -+ mt9t112_mcu_write(ret, client, VAR(26, 7), -+ mt9t112_pixfmt_to_fmt(priv->pix.pixelformat)); -+ mt9t112_mcu_write(ret, client, VAR(26, 9), -+ mt9t112_pixfmt_to_order(priv->pix.pixelformat)); -+ mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); -+ -+ mt9t112_set_a_frame_size(client, -+ priv->pix.width, -+ priv->pix.height); -+ -+ ECHECKER(ret, mt9t112_auto_focus_trigger(client)); -+ -+ dev_dbg(&client->dev, "format : %d\n", priv->pix.pixelformat); -+ dev_dbg(&client->dev, "size : %d x %d\n", -+ priv->pix.width, -+ priv->pix.height); -+ -+ CLOCK_INFO(client, EXT_CLOCK); -+ } -+ return 0; -+} -+ -+static int mt9t112_v4l2_int_g_priv(struct v4l2_int_device *s, void *p) -+{ -+ struct mt9t112_priv *priv = s->priv; -+ -+ return priv->pdata->priv_data_set(p); -+} -+ -+static int mt9t112_v4l2_int_g_ifparm(struct v4l2_int_device *s, -+ struct v4l2_ifparm *p) -+{ -+ struct mt9t112_priv *priv = s->priv; -+ int rval; -+ -+ if (p == NULL) -+ return -EINVAL; -+ -+ if (!priv->pdata->ifparm) -+ return -EINVAL; -+ -+ rval = priv->pdata->ifparm(p); -+ if (rval) { -+ v4l_err(priv->client, "g_ifparm.Err[%d]\n", rval); -+ return rval; -+ } -+ -+ p->u.ycbcr.clock_curr = 40 * 1000000; /* temporal value */ -+ -+ return 0; -+} -+ -+static int mt9t112_v4l2_int_enum_framesizes(struct v4l2_int_device *s, -+ struct v4l2_frmsizeenum *frms) -+{ -+ int ifmt; -+ -+ for (ifmt = 0; ifmt < ARRAY_SIZE(mt9t112_formats); ifmt++) -+ if (mt9t112_formats[ifmt].pixelformat == frms->pixel_format) -+ break; -+ -+ if (ifmt == ARRAY_SIZE(mt9t112_formats)) -+ return -EINVAL; -+ -+ /* Do we already reached all discrete framesizes? */ -+ if (frms->index >= ARRAY_SIZE(mt9t112_sizes)) -+ return -EINVAL; -+ -+ frms->type = V4L2_FRMSIZE_TYPE_DISCRETE; -+ frms->discrete.width = mt9t112_sizes[frms->index].width; -+ frms->discrete.height = mt9t112_sizes[frms->index].height; -+ -+ return 0; -+ -+} -+ -+static int mt9t112_v4l2_int_enum_frameintervals(struct v4l2_int_device *s, -+ struct v4l2_frmivalenum *frmi) -+{ -+ int ifmt; -+ -+ for (ifmt = 0; ifmt < ARRAY_SIZE(mt9t112_formats); ifmt++) -+ if (mt9t112_formats[ifmt].pixelformat == frmi->pixel_format) -+ break; -+ -+ if (ifmt == ARRAY_SIZE(mt9t112_formats)) -+ return -EINVAL; -+ -+ if (frmi->index >= ARRAY_SIZE(mt9t112_frameintervals)) -+ return -EINVAL; -+ -+ frmi->type = V4L2_FRMSIZE_TYPE_DISCRETE; -+ frmi->discrete.numerator = -+ mt9t112_frameintervals[frmi->index].numerator; -+ frmi->discrete.denominator = -+ mt9t112_frameintervals[frmi->index].denominator; -+ return 0; -+} -+ -+static struct v4l2_int_ioctl_desc mt9t112_ioctl_desc[] = { -+ { .num = vidioc_int_enum_framesizes_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_enum_framesizes }, -+ { .num = vidioc_int_enum_frameintervals_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_enum_frameintervals }, -+ { .num = vidioc_int_s_power_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_s_power }, -+ { .num = vidioc_int_g_priv_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_g_priv }, -+ { .num = vidioc_int_g_ifparm_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_g_ifparm }, -+ { .num = vidioc_int_enum_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_enum_fmt_cap }, -+ { .num = vidioc_int_try_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_try_fmt_cap }, -+ { .num = vidioc_int_g_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_g_fmt_cap }, -+ { .num = vidioc_int_s_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_s_fmt_cap }, -+ { .num = vidioc_int_g_parm_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_g_parm }, -+ { .num = vidioc_int_s_parm_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_s_parm }, -+ { .num = vidioc_int_cropcap_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_cropcap }, -+ { .num = vidioc_int_g_crop_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_g_crop }, -+ { .num = vidioc_int_s_crop_num, -+ .func = (v4l2_int_ioctl_func *)mt9t112_v4l2_int_s_crop }, -+}; -+ -+static struct v4l2_int_slave mt9t112_slave = { -+ .ioctls = mt9t112_ioctl_desc, -+ .num_ioctls = ARRAY_SIZE(mt9t112_ioctl_desc), -+}; -+ - static int mt9t112_probe(struct i2c_client *client, - const struct i2c_device_id *did) - { - struct mt9t112_priv *priv; -- struct soc_camera_device *icd = client->dev.platform_data; -- struct soc_camera_link *icl; -+ struct v4l2_int_device *v4l2_int_device; - int ret; - -- if (!icd) { -- dev_err(&client->dev, "mt9t112: missing soc-camera data!\n"); -- return -EINVAL; -+ if (!client->dev.platform_data) { -+ dev_err(&client->dev, "no platform data?\n"); -+ return -ENODEV; - } - -- icl = to_soc_camera_link(icd); -- if (!icl || !icl->priv) -- return -EINVAL; -- - priv = kzalloc(sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - -- priv->info = icl->priv; -+ v4l2_int_device = kzalloc(sizeof(*v4l2_int_device), GFP_KERNEL); -+ if (!v4l2_int_device) { -+ kfree(priv); -+ return -ENOMEM; -+ } - -- v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops); -+ v4l2_int_device->module = THIS_MODULE; -+ strncpy(v4l2_int_device->name, "mt9t112", sizeof(v4l2_int_device->name)); -+ v4l2_int_device->type = v4l2_int_type_slave; -+ v4l2_int_device->u.slave = &mt9t112_slave; -+ v4l2_int_device->priv = priv; - -- icd->ops = &mt9t112_ops; -+ priv->v4l2_int_device = v4l2_int_device; -+ priv->client = client; -+ priv->pdata = client->dev.platform_data; - -- ret = mt9t112_camera_probe(icd, client); -+ i2c_set_clientdata(client, priv); -+ -+ //ret = mt9t112_detect(client); -+ -+ ret = v4l2_int_device_register(priv->v4l2_int_device); - if (ret) { -- icd->ops = NULL; - i2c_set_clientdata(client, NULL); -+ kfree(v4l2_int_device); - kfree(priv); - } - -@@ -1128,11 +1211,12 @@ static int mt9t112_probe(struct i2c_client *client, - - static int mt9t112_remove(struct i2c_client *client) - { -- struct mt9t112_priv *priv = to_mt9t112(client); -- struct soc_camera_device *icd = client->dev.platform_data; -+ struct mt9t112_priv *priv = i2c_get_clientdata(client); - -- icd->ops = NULL; -+ v4l2_int_device_unregister(priv->v4l2_int_device); - i2c_set_clientdata(client, NULL); -+ -+ kfree(priv->v4l2_int_device); - kfree(priv); - return 0; - } -@@ -1172,6 +1256,6 @@ static void __exit mt9t112_module_exit(void) - module_init(mt9t112_module_init); - module_exit(mt9t112_module_exit); - --MODULE_DESCRIPTION("SoC Camera driver for mt9t112"); -+MODULE_DESCRIPTION("mt9t112 sensor driver"); - MODULE_AUTHOR("Kuninori Morimoto"); - MODULE_LICENSE("GPL v2"); -diff --git a/include/media/mt9t112.h b/include/media/mt9t112.h -index a43c74a..62caaf5 100644 ---- a/include/media/mt9t112.h -+++ b/include/media/mt9t112.h -@@ -11,6 +11,8 @@ - #ifndef __MT9T112_H__ - #define __MT9T112_H__ - -+#include <media/v4l2-int-device.h> -+ - #define MT9T112_FLAG_PCLK_RISING_EDGE (1 << 0) - #define MT9T112_FLAG_DATAWIDTH_8 (1 << 1) /* default width is 10 */ - -@@ -27,4 +29,15 @@ struct mt9t112_camera_info { - struct mt9t112_pll_divider divider; - }; - -+struct mt9t112_platform_data { -+ char *master; -+ int (*power_set) (struct v4l2_int_device *s, enum v4l2_power on); -+ int (*ifparm) (struct v4l2_ifparm *p); -+ int (*priv_data_set) (void *); -+ /* Interface control params */ -+ bool clk_polarity; -+ bool hs_polarity; -+ bool vs_polarity; -+}; -+ - #endif /* __MT9T112_H__ */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0052-mt9t112-Add-more-info-to-public-header.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0052-mt9t112-Add-more-info-to-public-header.patch deleted file mode 100644 index 3aeea03..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0052-mt9t112-Add-more-info-to-public-header.patch +++ /dev/null @@ -1,29 +0,0 @@ -From d72241c7dc39f0976bcd7d05d43a86935e0deb68 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 1 Jul 2010 07:33:49 -0500 -Subject: [PATCH 52/75] mt9t112: Add more info to public header - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - include/media/mt9t112.h | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/include/media/mt9t112.h b/include/media/mt9t112.h -index 62caaf5..49fa042 100644 ---- a/include/media/mt9t112.h -+++ b/include/media/mt9t112.h -@@ -13,6 +13,11 @@ - - #include <media/v4l2-int-device.h> - -+#define MT9T112_I2C_ADDR (0x78 >> 1) -+ -+#define MT9T112_CLK_MAX (54000000) /* 54MHz */ -+#define MT9T112_CLK_MIN (6000000) /* 6Mhz */ -+ - #define MT9T112_FLAG_PCLK_RISING_EDGE (1 << 0) - #define MT9T112_FLAG_DATAWIDTH_8 (1 << 1) /* default width is 10 */ - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0053-mt9t112-Fix-null-pointer-kernel-bug.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0053-mt9t112-Fix-null-pointer-kernel-bug.patch deleted file mode 100644 index d03795f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0053-mt9t112-Fix-null-pointer-kernel-bug.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 0f6b697fb422f8eb8df539f82df49f0f6f976bc3 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 1 Jul 2010 09:12:37 -0500 -Subject: [PATCH 53/75] mt9t112: Fix null pointer kernel bug - -We were trying to access a null pointer (info) which we weren't -initializing anywhere. - -Fix this. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 34 +++++++++++++++++++++++----------- - 1 files changed, 23 insertions(+), 11 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index 6f54394..98a4ea9 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -92,7 +92,7 @@ struct mt9t112_frame_size { - struct mt9t112_priv { - struct mt9t112_platform_data *pdata; - struct v4l2_int_device *v4l2_int_device; -- struct mt9t112_camera_info *info; -+ struct mt9t112_camera_info info; - struct i2c_client *client; - struct v4l2_pix_format pix; - int model; -@@ -463,15 +463,15 @@ static int mt9t112_init_pll(const struct i2c_client *client) - - /* Replace these registers when new timing parameters are generated */ - mt9t112_set_pll_dividers(client, -- priv->info->divider.m, -- priv->info->divider.n, -- priv->info->divider.p1, -- priv->info->divider.p2, -- priv->info->divider.p3, -- priv->info->divider.p4, -- priv->info->divider.p5, -- priv->info->divider.p6, -- priv->info->divider.p7); -+ priv->info.divider.m, -+ priv->info.divider.n, -+ priv->info.divider.p1, -+ priv->info.divider.p2, -+ priv->info.divider.p3, -+ priv->info.divider.p4, -+ priv->info.divider.p5, -+ priv->info.divider.p6, -+ priv->info.divider.p7); - - /* - * TEST_BYPASS on -@@ -1015,7 +1015,7 @@ static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, - } - if (!(priv->flags & INIT_DONE)) { - u16 param = (MT9T112_FLAG_PCLK_RISING_EDGE & -- priv->info->flags) ? 0x0001 : 0x0000; -+ priv->info.flags) ? 0x0001 : 0x0000; - - ECHECKER(ret, mt9t112_detect(client)); - ECHECKER(ret, mt9t112_init_camera(client)); -@@ -1195,6 +1195,18 @@ static int mt9t112_probe(struct i2c_client *client, - priv->client = client; - priv->pdata = client->dev.platform_data; - -+ /* Revisit: Init Sensor info settings */ -+ priv->info.divider.m = 25; -+ priv->info.divider.n = 2; -+ priv->info.divider.p1 = 0; -+ priv->info.divider.p2 = 9; -+ priv->info.divider.p3 = 0; -+ priv->info.divider.p4 = 13; -+ priv->info.divider.p5 = 13; -+ priv->info.divider.p6 = 9; -+ priv->info.divider.p7 = 0; -+ priv->info.flags = MT9T112_FLAG_PCLK_RISING_EDGE; -+ - i2c_set_clientdata(client, priv); - - //ret = mt9t112_detect(client); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0054-DEBUG-omap3beagle-Add-MT9T112-to-defconfig.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0054-DEBUG-omap3beagle-Add-MT9T112-to-defconfig.patch deleted file mode 100644 index e5ae822..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0054-DEBUG-omap3beagle-Add-MT9T112-to-defconfig.patch +++ /dev/null @@ -1,26 +0,0 @@ -From f66312bff0655778847882a26dfb14a54e9b92ca Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 00:55:43 -0500 -Subject: [PATCH 54/75] DEBUG: omap3beagle: Add MT9T112 to defconfig - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/configs/omap3_beagle_cam_defconfig | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/configs/omap3_beagle_cam_defconfig b/arch/arm/configs/omap3_beagle_cam_defconfig -index 0ea8300..80b64db 100644 ---- a/arch/arm/configs/omap3_beagle_cam_defconfig -+++ b/arch/arm/configs/omap3_beagle_cam_defconfig -@@ -1737,7 +1737,7 @@ CONFIG_VIDEO_WM8775=m - CONFIG_VIDEO_MT9V011=m - # CONFIG_VIDEO_TCM825X is not set - CONFIG_VIDEO_MT9P012=m --CONFIG_VIDEO_MT9T111=y -+CONFIG_VIDEO_MT9T112=y - # CONFIG_VIDEO_DW9710 is not set - # CONFIG_VIDEO_OV3640 is not set - # CONFIG_VIDEO_IMX046 is not set --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0055-omap3beagle-camera-Change-MT9T111-references-to-new-.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0055-omap3beagle-camera-Change-MT9T111-references-to-new-.patch deleted file mode 100644 index 1a58dea..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0055-omap3beagle-camera-Change-MT9T111-references-to-new-.patch +++ /dev/null @@ -1,207 +0,0 @@ -From fad06fbbfb3e25683672d41c3f5649500d5eda73 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 15:47:23 -0500 -Subject: [PATCH 55/75] omap3beagle: camera: Change MT9T111 references to new MT9T112 driver - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 52 ++++++++++++------------ - arch/arm/mach-omap2/board-omap3beagle.c | 12 +++--- - 2 files changed, 32 insertions(+), 32 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 2e49158..0b4dff7 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -203,29 +203,29 @@ struct mt9v113_platform_data mt9v113_pdata = { - - #endif /* #ifdef CONFIG_VIDEO_MT9V113 */ - --#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) --#include <media/mt9t111.h> -+#if defined(CONFIG_VIDEO_MT9T112) || defined(CONFIG_VIDEO_MT9T112_MODULE) -+#include <media/mt9t112.h> - --#define ISP_MT9T111_MCLK 216000000 -+#define ISP_MT9T112_MCLK 216000000 - - /* Arbitrary memory handling limit */ --#define MT9T111_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN((2048 * 2) * 1536 * 4) -+#define MT9T112_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN((2048 * 2) * 1536 * 4) - --static struct isp_interface_config mt9t111_if_config = { -+static struct isp_interface_config mt9t112_if_config = { - .ccdc_par_ser = ISP_PARLL, - .dataline_shift = 0x2, - .hsvs_syncdetect = ISPCTRL_SYNC_DETECT_VSRISE, - .strobe = 0x0, - .prestrobe = 0x0, - .shutter = 0x0, -- .cam_mclk = ISP_MT9T111_MCLK, -+ .cam_mclk = ISP_MT9T112_MCLK, - .wenlog = ISPCCDC_CFG_WENLOG_AND, - .wait_hs_vs = 2, - .u.par.par_bridge = 0x3, - .u.par.par_clk_pol = 0x0, - }; - --static struct v4l2_ifparm mt9t111_ifparm_s = { -+static struct v4l2_ifparm mt9t112_ifparm_s = { - .if_type = V4L2_IF_TYPE_RAW, - .u = { - .raw = { -@@ -235,47 +235,47 @@ static struct v4l2_ifparm mt9t111_ifparm_s = { - .latch_clk_inv = 0, - .nobt_hs_inv = 0, /* active high */ - .nobt_vs_inv = 0, /* active high */ -- .clock_min = MT9T111_CLK_MIN, -- .clock_max = MT9T111_CLK_MAX, -+ .clock_min = MT9T112_CLK_MIN, -+ .clock_max = MT9T112_CLK_MAX, - }, - }, - }; - - /** -- * @brief mt9t111_ifparm - Returns the mt9t111 interface parameters -+ * @brief mt9t112_ifparm - Returns the mt9t112 interface parameters - * - * @param p - pointer to v4l2_ifparm structure - * - * @return result of operation - 0 is success - */ --static int mt9t111_ifparm(struct v4l2_ifparm *p) -+static int mt9t112_ifparm(struct v4l2_ifparm *p) - { - if (p == NULL) - return -EINVAL; - -- *p = mt9t111_ifparm_s; -+ *p = mt9t112_ifparm_s; - return 0; - } - - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) --static struct omap34xxcam_hw_config mt9t111_hwc = { -+static struct omap34xxcam_hw_config mt9t112_hwc = { - .dev_index = 0, - .dev_minor = 0, - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, - .u.sensor.sensor_isp = 0, -- .u.sensor.capture_mem = MT9T111_BIGGEST_FRAME_BYTE_SIZE, -+ .u.sensor.capture_mem = MT9T112_BIGGEST_FRAME_BYTE_SIZE, - .u.sensor.ival_default = { 1, 10 }, - }; - #endif - - /** -- * @brief mt9t111_set_prv_data - Returns mt9t111 omap34xx driver private data -+ * @brief mt9t112_set_prv_data - Returns mt9t112 omap34xx driver private data - * - * @param priv - pointer to omap34xxcam_hw_config structure - * - * @return result of operation - 0 is success - */ --static int mt9t111_set_prv_data(void *priv) -+static int mt9t112_set_prv_data(void *priv) - { - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) - struct omap34xxcam_hw_config *hwc = priv; -@@ -283,7 +283,7 @@ static int mt9t111_set_prv_data(void *priv) - if (priv == NULL) - return -EINVAL; - -- *hwc = mt9t111_hwc; -+ *hwc = mt9t112_hwc; - return 0; - #else - return -EINVAL; -@@ -291,13 +291,13 @@ static int mt9t111_set_prv_data(void *priv) - } - - /** -- * @brief mt9t111_power_set - Power-on or power-off TVP5146 device -+ * @brief mt9t112_power_set - Power-on or power-off TVP5146 device - * - * @param power - enum, Power on/off, resume/standby - * - * @return result of operation - 0 is success - */ --static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) -+static int mt9t112_power_set(struct v4l2_int_device *s, enum v4l2_power power) - { - struct omap34xxcam_videodev *vdev = s->u.slave->master->priv; - -@@ -314,7 +314,7 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - - case V4L2_POWER_ON: - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -- isp_configure_interface(vdev->cam->isp, &mt9t111_if_config); -+ isp_configure_interface(vdev->cam->isp, &mt9t112_if_config); - #endif - - /* Set RESET_BAR to 0 */ -@@ -331,7 +331,7 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - mdelay(50); - - /* Enable EXTCLK */ -- isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA); -+ isp_set_xclk(vdev->cam->isp, MT9T112_CLK_MIN, CAM_USE_XCLKA); - - /* - * Wait at least 70 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): -@@ -359,14 +359,14 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power) - return 0; - } - --struct mt9t111_platform_data mt9t111_pdata = { -+struct mt9t112_platform_data mt9t112_pdata = { - .master = "omap34xxcam", -- .power_set = mt9t111_power_set, -- .priv_data_set = mt9t111_set_prv_data, -- .ifparm = mt9t111_ifparm, -+ .power_set = mt9t112_power_set, -+ .priv_data_set = mt9t112_set_prv_data, -+ .ifparm = mt9t112_ifparm, - }; - --#endif /* #ifdef CONFIG_VIDEO_MT9T111 */ -+#endif /* #ifdef CONFIG_VIDEO_MT9T112 */ - - static int beagle_cam_probe(struct platform_device *pdev) - { -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 0e7e8b2..7c9e40a 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -77,10 +77,10 @@ static struct omap_opp * _omap37x_l3_rate_table = NULL; - extern struct mt9v113_platform_data mt9v113_pdata; - #endif - --#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+#if defined(CONFIG_VIDEO_MT9T112) || defined(CONFIG_VIDEO_MT9T112_MODULE) - #include <media/v4l2-int-device.h> --#include <media/mt9t111.h> --extern struct mt9t111_platform_data mt9t111_pdata; -+#include <media/mt9t112.h> -+extern struct mt9t112_platform_data mt9t112_pdata; - #endif - - #define GPMC_CS0_BASE 0x60 -@@ -602,10 +602,10 @@ static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { - .platform_data = &mt9v113_pdata, - }, - #endif --#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE) -+#if defined(CONFIG_VIDEO_MT9T112) || defined(CONFIG_VIDEO_MT9T112_MODULE) - { -- I2C_BOARD_INFO("mt9t111", MT9T111_I2C_ADDR), -- .platform_data = &mt9t111_pdata, -+ I2C_BOARD_INFO("mt9t112", MT9T112_I2C_ADDR), -+ .platform_data = &mt9t112_pdata, - }, - #endif - }; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0056-omap34xxcam-Fix-multi-pixel-format-negotiation.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0056-omap34xxcam-Fix-multi-pixel-format-negotiation.patch deleted file mode 100644 index 9c041c7..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0056-omap34xxcam-Fix-multi-pixel-format-negotiation.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 13238be1e612ab4113413cf21e83307ea9e18f1e Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 1 Jul 2010 13:57:26 -0500 -Subject: [PATCH 56/75] omap34xxcam: Fix multi pixel format negotiation - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/omap34xxcam.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/media/video/omap34xxcam.c b/drivers/media/video/omap34xxcam.c -index 2e8153b..051c6a7 100644 ---- a/drivers/media/video/omap34xxcam.c -+++ b/drivers/media/video/omap34xxcam.c -@@ -544,7 +544,7 @@ static int try_pix_parm(struct omap34xxcam_videodev *vdev, - pix_tmp_out.height = pix_tmp_in.height; - rval = isp_try_fmt_cap(isp, &pix_tmp_in, &pix_tmp_out); - if (rval) -- return rval; -+ break; - - dev_dbg(&vdev->vfd->dev, "this w %d\th %d\tfmt %8.8x\t" - "-> w %d\th %d\t fmt %8.8x" --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0057-SQUASH-omap3beagle-camera-Bring-back-mt9t111-support.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0057-SQUASH-omap3beagle-camera-Bring-back-mt9t111-support.patch deleted file mode 100644 index 4ee6758..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0057-SQUASH-omap3beagle-camera-Bring-back-mt9t111-support.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 535b7f5333636f7e42f6bea67ed9f298afe0fe3c Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 17:53:07 -0500 -Subject: [PATCH 57/75] SQUASH: omap3beagle: camera: Bring back mt9t111 support - ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 8 ++++---- - 1 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 0b4dff7..3118026 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -221,14 +221,14 @@ static struct isp_interface_config mt9t112_if_config = { - .cam_mclk = ISP_MT9T112_MCLK, - .wenlog = ISPCCDC_CFG_WENLOG_AND, - .wait_hs_vs = 2, -- .u.par.par_bridge = 0x3, -+ .u.par.par_bridge = 0x2, - .u.par.par_clk_pol = 0x0, - }; - - static struct v4l2_ifparm mt9t112_ifparm_s = { -- .if_type = V4L2_IF_TYPE_RAW, -+ .if_type = V4L2_IF_TYPE_YCbCr, - .u = { -- .raw = { -+ .ycbcr = { - .frame_start_on_rising_vs = 1, - .bt_sync_correct = 0, - .swap = 0, -@@ -262,7 +262,7 @@ static struct omap34xxcam_hw_config mt9t112_hwc = { - .dev_index = 0, - .dev_minor = 0, - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, -- .u.sensor.sensor_isp = 0, -+ .u.sensor.sensor_isp = 1, - .u.sensor.capture_mem = MT9T112_BIGGEST_FRAME_BYTE_SIZE, - .u.sensor.ival_default = { 1, 10 }, - }; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0058-mt9t112-Do-init_camera-every-powerup.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0058-mt9t112-Do-init_camera-every-powerup.patch deleted file mode 100644 index 66c4e17..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0058-mt9t112-Do-init_camera-every-powerup.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 52bfcc9b6bcb30cf81589c483f1344c568be7300 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 17:53:44 -0500 -Subject: [PATCH 58/75] mt9t112: Do init_camera every powerup - -This is because we want to ensure we always come from a known state. - -Probably this could be revisited later for optimization. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 17 ++++++++--------- - 1 files changed, 8 insertions(+), 9 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index 98a4ea9..eebc2b5 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -982,6 +982,8 @@ static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, - { - struct mt9t112_priv *priv = s->priv; - struct i2c_client *client = priv->client; -+ u16 param = (MT9T112_FLAG_PCLK_RISING_EDGE & -+ priv->info.flags) ? 0x0001 : 0x0000; - int ret; - - switch (power) { -@@ -1014,20 +1016,17 @@ static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, - return ret; - } - if (!(priv->flags & INIT_DONE)) { -- u16 param = (MT9T112_FLAG_PCLK_RISING_EDGE & -- priv->info.flags) ? 0x0001 : 0x0000; -- - ECHECKER(ret, mt9t112_detect(client)); -- ECHECKER(ret, mt9t112_init_camera(client)); -- -- /* Invert PCLK (Data sampled on falling edge of pixclk) */ -- mt9t112_reg_write(ret, client, 0x3C20, param); -- -- mdelay(5); - - priv->flags |= INIT_DONE; - } - -+ ECHECKER(ret, mt9t112_init_camera(client)); -+ -+ /* Invert PCLK (Data sampled on falling edge of pixclk) */ -+ mt9t112_reg_write(ret, client, 0x3C20, param); -+ -+ mdelay(5); - mt9t112_mcu_write(ret, client, VAR(26, 7), - mt9t112_pixfmt_to_fmt(priv->pix.pixelformat)); - mt9t112_mcu_write(ret, client, VAR(26, 9), --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0059-omap3beagle-camera-Switch-flag-for-no-sensor-ISP.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0059-omap3beagle-camera-Switch-flag-for-no-sensor-ISP.patch deleted file mode 100644 index 9c85674..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0059-omap3beagle-camera-Switch-flag-for-no-sensor-ISP.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 1865b5a5f27a7de1e12d52a096e435e5dd177a48 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 18:15:32 -0500 -Subject: [PATCH 59/75] omap3beagle: camera: Switch flag for no sensor ISP - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 3118026..75622bf 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -262,7 +262,7 @@ static struct omap34xxcam_hw_config mt9t112_hwc = { - .dev_index = 0, - .dev_minor = 0, - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, -- .u.sensor.sensor_isp = 1, -+ .u.sensor.sensor_isp = 0, - .u.sensor.capture_mem = MT9T112_BIGGEST_FRAME_BYTE_SIZE, - .u.sensor.ival_default = { 1, 10 }, - }; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0060-mt9t112-Add-back-3MP-basesize.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0060-mt9t112-Add-back-3MP-basesize.patch deleted file mode 100644 index 32b825b..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0060-mt9t112-Add-back-3MP-basesize.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 9cfb19dd4093463361f279276e67d2c61e0f7d5e Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 18:33:00 -0500 -Subject: [PATCH 60/75] mt9t112: Add back 3MP basesize - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 6 +++--- - 1 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index eebc2b5..46d1bd6 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -41,8 +41,8 @@ - /* - * frame size - */ --#define MAX_WIDTH 640 /* 2048 */ --#define MAX_HEIGHT 480 /* 1536 */ -+#define MAX_WIDTH 2048 -+#define MAX_HEIGHT 1536 - - #define VGA_WIDTH 640 - #define VGA_HEIGHT 480 -@@ -133,7 +133,7 @@ const static struct v4l2_fmtdesc mt9t112_formats[] = { - ************************************************************************/ - const static struct mt9t112_frame_size mt9t112_sizes[] = { - { 640, 480 }, -- /* { 2048, 1536} */ -+ { 2048, 1536} - }; - - /************************************************************************ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0061-mt9t112-Prepare-for-24MHz-EXTCLK-and-30-fps.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0061-mt9t112-Prepare-for-24MHz-EXTCLK-and-30-fps.patch deleted file mode 100644 index af30cb7..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0061-mt9t112-Prepare-for-24MHz-EXTCLK-and-30-fps.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 8da9ec7ae90f238bd9b245bc80a1c6559df61f59 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 23:41:32 -0500 -Subject: [PATCH 61/75] mt9t112: Prepare for 24MHz EXTCLK and 30 fps - -Set Aptina recommended values to get 30 FPS with VGA, which -are achievable given the new PLL divider settings, considering -an input of 24MHz in the master clock. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 18 +++++++++--------- - 1 files changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index 46d1bd6..44234e4 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -144,7 +144,7 @@ const static struct mt9t112_frame_size mt9t112_sizes[] = { - - ************************************************************************/ - const struct v4l2_fract mt9t112_frameintervals[] = { -- { .numerator = 1, .denominator = 10 } -+ { .numerator = 1, .denominator = 30 } - }; - - /************************************************************************ -@@ -932,9 +932,9 @@ static int mt9t112_v4l2_int_g_parm(struct v4l2_int_device *s, - a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - - cparm->capability = V4L2_CAP_TIMEPERFRAME; -- /* FIXME: Is 10 fps really the only option? */ -+ /* FIXME: Is 30 fps really the only option? */ - cparm->timeperframe.numerator = 1; -- cparm->timeperframe.denominator = 10; -+ cparm->timeperframe.denominator = 30; - - return 0; - } -@@ -1195,14 +1195,14 @@ static int mt9t112_probe(struct i2c_client *client, - priv->pdata = client->dev.platform_data; - - /* Revisit: Init Sensor info settings */ -- priv->info.divider.m = 25; -- priv->info.divider.n = 2; -+ priv->info.divider.m = 24; -+ priv->info.divider.n = 1; - priv->info.divider.p1 = 0; -- priv->info.divider.p2 = 9; -+ priv->info.divider.p2 = 8; - priv->info.divider.p3 = 0; -- priv->info.divider.p4 = 13; -- priv->info.divider.p5 = 13; -- priv->info.divider.p6 = 9; -+ priv->info.divider.p4 = 11; -+ priv->info.divider.p5 = 11; -+ priv->info.divider.p6 = 8; - priv->info.divider.p7 = 0; - priv->info.flags = MT9T112_FLAG_PCLK_RISING_EDGE; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0062-omap3beagle-camera-Prepare-24MHz-xclk-for-mt9t112.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0062-omap3beagle-camera-Prepare-24MHz-xclk-for-mt9t112.patch deleted file mode 100644 index 2550430..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0062-omap3beagle-camera-Prepare-24MHz-xclk-for-mt9t112.patch +++ /dev/null @@ -1,62 +0,0 @@ -From b00bc4caeb798661983eca4f548f0f69301bfb32 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 15 Jul 2010 23:43:20 -0500 -Subject: [PATCH 62/75] omap3beagle: camera: Prepare 24MHz xclk for mt9t112 - -Adjust calculations of timings based on # of EXTCLK cycles. - -Also, set default requested framerate to 30 fps. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 16 ++++++++-------- - 1 files changed, 8 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 75622bf..520e1d8 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -264,7 +264,7 @@ static struct omap34xxcam_hw_config mt9t112_hwc = { - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, - .u.sensor.sensor_isp = 0, - .u.sensor.capture_mem = MT9T112_BIGGEST_FRAME_BYTE_SIZE, -- .u.sensor.ival_default = { 1, 10 }, -+ .u.sensor.ival_default = { 1, 30 }, - }; - #endif - -@@ -331,24 +331,24 @@ static int mt9t112_power_set(struct v4l2_int_device *s, enum v4l2_power power) - mdelay(50); - - /* Enable EXTCLK */ -- isp_set_xclk(vdev->cam->isp, MT9T112_CLK_MIN, CAM_USE_XCLKA); -+ isp_set_xclk(vdev->cam->isp, 24000000, CAM_USE_XCLKA); - - /* -- * Wait at least 70 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): -- * ((1000000 * 70) / 6000000) = aprox 12 us. -+ * Wait at least 70 CLK cycles (w/EXTCLK = 24MHz): -+ * ((1000000 * 70) / 24000000) = aprox 2.91 us. - */ - -- udelay(12); -+ udelay(3); - - /* Set RESET_BAR to 1 */ - gpio_set_value(LEOPARD_RESET_GPIO, 1); - - /* -- * Wait at least 100 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): -- * ((1000000 * 100) / 6000000) = aprox 17 us. -+ * Wait at least 100 CLK cycles (w/EXTCLK = 24MHz): -+ * ((1000000 * 100) / 24000000) = aprox 4.16 us. - */ - -- udelay(17); -+ udelay(5); - - break; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0063-mt9t112-Correct-register-settings-for-mt9t111-sensor.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0063-mt9t112-Correct-register-settings-for-mt9t111-sensor.patch deleted file mode 100644 index 7f5261f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0063-mt9t112-Correct-register-settings-for-mt9t111-sensor.patch +++ /dev/null @@ -1,109 +0,0 @@ -From fa6380a53783b185189c372dd5e9d17f46c5c4d7 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 16 Jul 2010 07:52:06 -0500 -Subject: [PATCH 63/75] mt9t112: Correct register settings for mt9t111 sensor - -This now matches with Aptina's recommended values. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 46 ++++++++++++++++++++++++++++------------ - 1 files changed, 32 insertions(+), 14 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index 44234e4..ac295dd 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -44,6 +44,9 @@ - #define MAX_WIDTH 2048 - #define MAX_HEIGHT 1536 - -+#define MAX_WIDTH_PREV 1024 -+#define MAX_HEIGHT_PREV 768 -+ - #define VGA_WIDTH 640 - #define VGA_HEIGHT 480 - -@@ -392,24 +395,39 @@ static int mt9t112_set_a_frame_size(const struct i2c_client *client, - u16 height) - { - int ret; -- u16 wstart = (MAX_WIDTH - width) / 2; -- u16 hstart = (MAX_HEIGHT - height) / 2; -+ u16 wstart, hstart, wend, hend; -+ u16 max_width = MAX_WIDTH_PREV, max_height = MAX_HEIGHT_PREV; -+ -+ if ((width > max_width) || (height > max_height)) { -+ /* Capture case */ -+ max_width = MAX_WIDTH; -+ max_height = MAX_HEIGHT; -+ hstart = 4; -+ wstart = 4; -+ hend = 1547; -+ wend = 2059; -+ } else { -+ hstart = 0; -+ wstart = 0; -+ hend = 1549; -+ wend = 2061; -+ } - - /* (Context A) Image Width/Height */ - mt9t112_mcu_write(ret, client, VAR(26, 0), width); - mt9t112_mcu_write(ret, client, VAR(26, 2), height); - - /* (Context A) Output Width/Height */ -- mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + width); -- mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + height); -+ mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + max_width); -+ mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + max_height); - - /* (Context A) Start Row/Column */ -- mt9t112_mcu_write(ret, client, VAR(18, 2), 4 + hstart); -- mt9t112_mcu_write(ret, client, VAR(18, 4), 4 + wstart); -+ mt9t112_mcu_write(ret, client, VAR(18, 2), hstart); -+ mt9t112_mcu_write(ret, client, VAR(18, 4), wstart); - - /* (Context A) End Row/Column */ -- mt9t112_mcu_write(ret, client, VAR(18, 6), 11 + height + hstart); -- mt9t112_mcu_write(ret, client, VAR(18, 8), 11 + width + wstart); -+ mt9t112_mcu_write(ret, client, VAR(18, 6), hend); -+ mt9t112_mcu_write(ret, client, VAR(18, 8), wend); - - mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); - -@@ -547,25 +565,25 @@ static int mt9t112_init_setting(const struct i2c_client *client) - mt9t112_mcu_mask_set(ret, client, VAR(26, 160), 0x0040, 0x0000); - - /* Read Mode (A) */ -- mt9t112_mcu_write(ret, client, VAR(18, 12), 0x0024); -+ mt9t112_mcu_write(ret, client, VAR(18, 12), 0x046C); - - /* Fine Correction (A) */ - mt9t112_mcu_write(ret, client, VAR(18, 15), 0x00CC); - - /* Fine IT Min (A) */ -- mt9t112_mcu_write(ret, client, VAR(18, 17), 0x01f1); -+ mt9t112_mcu_write(ret, client, VAR(18, 17), 0x0381); - - /* Fine IT Max Margin (A) */ -- mt9t112_mcu_write(ret, client, VAR(18, 19), 0x00fF); -+ mt9t112_mcu_write(ret, client, VAR(18, 19), 0x024F); - - /* Base Frame Lines (A) */ -- mt9t112_mcu_write(ret, client, VAR(18, 29), 0x032D); -+ mt9t112_mcu_write(ret, client, VAR(18, 29), 0x0378); - - /* Min Line Length (A) */ -- mt9t112_mcu_write(ret, client, VAR(18, 31), 0x073a); -+ mt9t112_mcu_write(ret, client, VAR(18, 31), 0x05D0); - - /* Line Length (A) */ -- mt9t112_mcu_write(ret, client, VAR(18, 37), 0x07d0); -+ mt9t112_mcu_write(ret, client, VAR(18, 37), 0x07AC); - - /* Adaptive Output Clock (B) */ - mt9t112_mcu_mask_set(ret, client, VAR(27, 160), 0x0040, 0x0000); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0064-mt9t112-Remove-smart-size-selection.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0064-mt9t112-Remove-smart-size-selection.patch deleted file mode 100644 index b3506dc..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0064-mt9t112-Remove-smart-size-selection.patch +++ /dev/null @@ -1,188 +0,0 @@ -From 2c8e7e157de32ebc5c8d60bf642c2f29f607c3d0 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Fri, 16 Jul 2010 17:09:10 -0500 -Subject: [PATCH 64/75] mt9t112: Remove "smart" size selection - -This code is broken, as it doesn't really adjust all other -settings, but output size to desired size. It isn't really -toggling everything that needs, and giving the false impression -of good size flexibility. - -So, meanwhile, let's put fixed init settings for the contexts, -and toggle between them (implemented in other patch). - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 105 ++++++++++++++++------------------------- - 1 files changed, 41 insertions(+), 64 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index ac295dd..ee991ef 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -390,50 +390,6 @@ static void mt9t112_frame_check(u32 *width, u32 *height) - *height = MAX_HEIGHT; - } - --static int mt9t112_set_a_frame_size(const struct i2c_client *client, -- u16 width, -- u16 height) --{ -- int ret; -- u16 wstart, hstart, wend, hend; -- u16 max_width = MAX_WIDTH_PREV, max_height = MAX_HEIGHT_PREV; -- -- if ((width > max_width) || (height > max_height)) { -- /* Capture case */ -- max_width = MAX_WIDTH; -- max_height = MAX_HEIGHT; -- hstart = 4; -- wstart = 4; -- hend = 1547; -- wend = 2059; -- } else { -- hstart = 0; -- wstart = 0; -- hend = 1549; -- wend = 2061; -- } -- -- /* (Context A) Image Width/Height */ -- mt9t112_mcu_write(ret, client, VAR(26, 0), width); -- mt9t112_mcu_write(ret, client, VAR(26, 2), height); -- -- /* (Context A) Output Width/Height */ -- mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + max_width); -- mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + max_height); -- -- /* (Context A) Start Row/Column */ -- mt9t112_mcu_write(ret, client, VAR(18, 2), hstart); -- mt9t112_mcu_write(ret, client, VAR(18, 4), wstart); -- -- /* (Context A) End Row/Column */ -- mt9t112_mcu_write(ret, client, VAR(18, 6), hend); -- mt9t112_mcu_write(ret, client, VAR(18, 8), wend); -- -- mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); -- -- return ret; --} -- - static int mt9t112_set_pll_dividers(const struct i2c_client *client, - u8 m, u8 n, - u8 p1, u8 p2, u8 p3, -@@ -561,9 +517,27 @@ static int mt9t112_init_setting(const struct i2c_client *client) - - int ret; - -+ /* Output Width (A) */ -+ mt9t112_mcu_write(ret, client, VAR(26, 0), 640); -+ -+ /* Output Height (A) */ -+ mt9t112_mcu_write(ret, client, VAR(26, 2), 480); -+ - /* Adaptive Output Clock (A) */ - mt9t112_mcu_mask_set(ret, client, VAR(26, 160), 0x0040, 0x0000); - -+ /* Row Start (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 2), 0); -+ -+ /* Column Start (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 4), 0); -+ -+ /* Row End (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 6), 1549); -+ -+ /* Column End (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 8), 2061); -+ - /* Read Mode (A) */ - mt9t112_mcu_write(ret, client, VAR(18, 12), 0x046C); - -@@ -585,6 +559,18 @@ static int mt9t112_init_setting(const struct i2c_client *client) - /* Line Length (A) */ - mt9t112_mcu_write(ret, client, VAR(18, 37), 0x07AC); - -+ /* Context Width (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + 1024); -+ -+ /* Context Height (A) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + 768); -+ -+ /* Output Width (B) */ -+ mt9t112_mcu_write(ret, client, VAR(27, 0), 2048); -+ -+ /* Output Hieght (B) */ -+ mt9t112_mcu_write(ret, client, VAR(27, 2), 1536); -+ - /* Adaptive Output Clock (B) */ - mt9t112_mcu_mask_set(ret, client, VAR(27, 160), 0x0040, 0x0000); - -@@ -610,13 +596,19 @@ static int mt9t112_init_setting(const struct i2c_client *client) - mt9t112_mcu_write(ret, client, VAR(18, 91), 0x00FF); - - /* Base Frame Lines (B) */ -- mt9t112_mcu_write(ret, client, VAR(18, 101), 0x0668); -+ mt9t112_mcu_write(ret, client, VAR(18, 101), 0x066C); - - /* Min Line Length (B) */ -- mt9t112_mcu_write(ret, client, VAR(18, 103), 0x0AF0); -+ mt9t112_mcu_write(ret, client, VAR(18, 103), 0x0378); - - /* Line Length (B) */ -- mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0); -+ mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0CB1); -+ -+ /* Context Width (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 115), 8 + 2048); -+ -+ /* Context Height (B) */ -+ mt9t112_mcu_write(ret, client, VAR(18, 117), 8 + 1536); - - /* - * Flicker Dectection registers -@@ -692,10 +684,10 @@ static int mt9t112_init_setting(const struct i2c_client *client) - mt9t112_mcu_write(ret, client, VAR8(8, 12), 0x0A); - - /* RX FIFO Watermark (A) */ -- mt9t112_mcu_write(ret, client, VAR(18, 70), 0x0014); -+ mt9t112_mcu_write(ret, client, VAR(18, 70), 0x0080); - - /* RX FIFO Watermark (B) */ -- mt9t112_mcu_write(ret, client, VAR(18, 142), 0x0014); -+ mt9t112_mcu_write(ret, client, VAR(18, 142), 0x0080); - - /* MCLK: 16MHz - * PCLK: 73MHz -@@ -1008,17 +1000,6 @@ static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, - case V4L2_POWER_STANDBY: - /* FALLTHROUGH */ - case V4L2_POWER_OFF: -- /* FIXME -- * -- * If user selected large output size, -- * and used it long time, -- * mt9t112 camera will be very warm. -- * -- * But current driver can not stop mt9t112 camera. -- * So, set small size here to solve this problem. -- */ -- mt9t112_set_a_frame_size(client, VGA_WIDTH, VGA_HEIGHT); -- - ret = priv->pdata->power_set(s, power); - if (ret < 0) { - dev_err(&client->dev, "Unable to set target board power " -@@ -1051,10 +1032,6 @@ static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, - mt9t112_pixfmt_to_order(priv->pix.pixelformat)); - mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); - -- mt9t112_set_a_frame_size(client, -- priv->pix.width, -- priv->pix.height); -- - ECHECKER(ret, mt9t112_auto_focus_trigger(client)); - - dev_dbg(&client->dev, "format : %d\n", priv->pix.pixelformat); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0065-rtl8192su-remove-bogus-Kconfig-depend-on-PCI-and-add.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0065-rtl8192su-remove-bogus-Kconfig-depend-on-PCI-and-add.patch deleted file mode 100644 index 72697f7..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0065-rtl8192su-remove-bogus-Kconfig-depend-on-PCI-and-add.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 132469e10e712ff4b386fb78a4c78343f151ebc4 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Sun, 18 Jul 2010 11:25:12 +0200 -Subject: [PATCH 65/75] rtl8192su: remove bogus Kconfig depend on PCI and add another product ID - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - drivers/staging/rtl8192su/Kconfig | 2 +- - drivers/staging/rtl8192su/r8192U_core.c | 1 + - 2 files changed, 2 insertions(+), 1 deletions(-) - -diff --git a/drivers/staging/rtl8192su/Kconfig b/drivers/staging/rtl8192su/Kconfig -index 123fa6d..9888927 100644 ---- a/drivers/staging/rtl8192su/Kconfig -+++ b/drivers/staging/rtl8192su/Kconfig -@@ -1,6 +1,6 @@ - config RTL8192SU - tristate "RealTek RTL8192SU Wireless LAN NIC driver" -- depends on PCI && WLAN && USB -+ depends on WLAN && USB - depends on WIRELESS_EXT - default N - ---help--- -diff --git a/drivers/staging/rtl8192su/r8192U_core.c b/drivers/staging/rtl8192su/r8192U_core.c -index 66274d7..48e4c29 100644 ---- a/drivers/staging/rtl8192su/r8192U_core.c -+++ b/drivers/staging/rtl8192su/r8192U_core.c -@@ -112,6 +112,7 @@ u32 rt_global_debug_component = \ - - static struct usb_device_id rtl8192_usb_id_tbl[] = { - /* Realtek */ -+ {USB_DEVICE(0x0bda, 0x8171)}, - {USB_DEVICE(0x0bda, 0x8192)}, - {USB_DEVICE(0x0bda, 0x8709)}, - /* Corega */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0066-mt9t112-Add-Context-selection-to-configuration.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0066-mt9t112-Add-Context-selection-to-configuration.patch deleted file mode 100644 index 0afb340..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0066-mt9t112-Add-Context-selection-to-configuration.patch +++ /dev/null @@ -1,96 +0,0 @@ -From a1066fd19c56f96201b877b394247db9c41c3c18 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Sun, 18 Jul 2010 01:12:41 -0500 -Subject: [PATCH 66/75] mt9t112: Add Context selection to configuration - -Thsi makes always start at least with preview mode -(context A), and then, if needed, transition to capture -mode (context B) - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 54 +++++++++++++++++++++++++++++++++++++++++ - 1 files changed, 54 insertions(+), 0 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index ee991ef..ec7514f 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -73,6 +73,9 @@ - #define mt9t112_reg_read(ret, client, a) \ - ECHECKER(ret, __mt9t112_reg_read(client, a)) - -+#define mt9t112_mcu_read(ret, client, a) \ -+ ECHECKER(ret, __mt9t112_mcu_read(client, a)) -+ - /* - * Logical address - */ -@@ -737,6 +740,50 @@ static int mt9t112_auto_focus_trigger(const struct i2c_client *client) - return ret; - } - -+static int mt9t112_goto_preview(const struct i2c_client *client) -+{ -+ int ret, trycount = 0; -+ -+ /* Is it already in preview mode? */ -+ mt9t112_mcu_read(ret, client, VAR8(1, 1)); -+ if (ret == 0x3) -+ return 0; -+ -+ /* Go to preview mode */ -+ mt9t112_mcu_write(ret, client, VAR8(1, 0), 1); -+ do { -+ mt9t112_mcu_read(ret, client, VAR8(1, 1)); -+ mdelay(1); -+ } while ((ret != 0x3) && (++trycount < 100)); -+ -+ if (trycount >= 100) -+ return -EBUSY; -+ -+ return 0; -+} -+ -+static int mt9t112_goto_capture(const struct i2c_client *client) -+{ -+ int ret, trycount = 0; -+ -+ /* Is it already in capture mode? */ -+ mt9t112_mcu_read(ret, client, VAR8(1, 1)); -+ if (ret == 0x7) -+ return 0; -+ -+ /* Go to capture mode */ -+ mt9t112_mcu_write(ret, client, VAR8(1, 0), 2); -+ do { -+ mt9t112_mcu_read(ret, client, VAR8(1, 1)); -+ mdelay(1); -+ } while ((ret != 0x7) && (++trycount < 100)); -+ -+ if (trycount >= 100) -+ return -EBUSY; -+ -+ return 0; -+} -+ - static int mt9t112_init_camera(const struct i2c_client *client) - { - int ret; -@@ -1034,6 +1081,13 @@ static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, - - ECHECKER(ret, mt9t112_auto_focus_trigger(client)); - -+ ECHECKER(ret, mt9t112_goto_preview(client)); -+ -+ if ((priv->pix.width == MAX_WIDTH) && -+ (priv->pix.height == MAX_HEIGHT)) { -+ ECHECKER(ret, mt9t112_goto_capture(client)); -+ } -+ - dev_dbg(&client->dev, "format : %d\n", priv->pix.pixelformat); - dev_dbg(&client->dev, "size : %d x %d\n", - priv->pix.width, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0067-mt9t112-Disable-JPEG-in-Context-B.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0067-mt9t112-Disable-JPEG-in-Context-B.patch deleted file mode 100644 index 954e076..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0067-mt9t112-Disable-JPEG-in-Context-B.patch +++ /dev/null @@ -1,32 +0,0 @@ -From b1196ec5f007cef5cd3342ed3dbf3415bf721bd4 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Sun, 18 Jul 2010 01:45:29 -0500 -Subject: [PATCH 67/75] mt9t112: Disable JPEG in Context B - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 8 -------- - 1 files changed, 0 insertions(+), 8 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index ec7514f..18d7ce5 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -812,14 +812,6 @@ static int mt9t112_init_camera(const struct i2c_client *client) - mt9t112_mcu_write(ret, client, VAR(26, 160), 0x0A2E); - mt9t112_mcu_write(ret, client, VAR(27, 160), 0x0A2E); - -- /* Configure STatus in Status_before_length Format and enable header */ -- /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */ -- mt9t112_mcu_write(ret, client, VAR(27, 144), 0x0CB4); -- -- /* Enable JPEG in context B */ -- /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */ -- mt9t112_mcu_write(ret, client, VAR8(27, 142), 0x01); -- - /* Disable Dac_TXLO */ - mt9t112_reg_write(ret, client, 0x316C, 0x350F); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0068-mt9t112-Make-context-B-stream-unlimited-frames.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0068-mt9t112-Make-context-B-stream-unlimited-frames.patch deleted file mode 100644 index 6025dc2..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0068-mt9t112-Make-context-B-stream-unlimited-frames.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 362f211f85aa5e0f7519fca599428e03b05cb05f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Sun, 18 Jul 2010 01:47:41 -0500 -Subject: [PATCH 68/75] mt9t112: Make context B stream unlimited frames - -Context A does this by default, so, only context B needs -to be configured like this. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 3 +++ - 1 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index 18d7ce5..3c516b4 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -771,6 +771,9 @@ static int mt9t112_goto_capture(const struct i2c_client *client) - if (ret == 0x7) - return 0; - -+ /* Num Frames Run (B) */ -+ mt9t112_mcu_write(ret, client, VAR(27, 5), 0); -+ - /* Go to capture mode */ - mt9t112_mcu_write(ret, client, VAR8(1, 0), 2); - do { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0069-mt9t112-Fix-pll-p-dividers-abstraction.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0069-mt9t112-Fix-pll-p-dividers-abstraction.patch deleted file mode 100644 index 07c2e20..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0069-mt9t112-Fix-pll-p-dividers-abstraction.patch +++ /dev/null @@ -1,58 +0,0 @@ -From bf70e34844f0a3984d4ca48614fa39896ce5ca5f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Mon, 19 Jul 2010 12:31:47 -0500 -Subject: [PATCH 69/75] mt9t112: Fix pll p-dividers abstraction - -Previously, it wasn't clear that the values needed to be filled -were (val - 1). Fix that. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 16 +++++++++------- - 1 files changed, 9 insertions(+), 7 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index 3c516b4..c1a9b41 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -393,6 +393,8 @@ static void mt9t112_frame_check(u32 *width, u32 *height) - *height = MAX_HEIGHT; - } - -+#define PLL_ADJ(x) ((x != 0) ? x - 1 : 0) -+ - static int mt9t112_set_pll_dividers(const struct i2c_client *client, - u8 m, u8 n, - u8 p1, u8 p2, u8 p3, -@@ -408,21 +410,21 @@ static int mt9t112_set_pll_dividers(const struct i2c_client *client, - mt9t112_reg_mask_set(ret, client, 0x0010, 0x3fff, val); - - /* P1/P2/P3 */ -- val = ((p3 & 0x0F) << 8) | -- ((p2 & 0x0F) << 4) | -- ((p1 & 0x0F) << 0); -+ val = ((PLL_ADJ(p3) & 0x0F) << 8) | -+ ((PLL_ADJ(p2) & 0x0F) << 4) | -+ ((PLL_ADJ(p1) & 0x0F) << 0); - mt9t112_reg_mask_set(ret, client, 0x0012, 0x0fff, val); - - /* P4/P5/P6 */ - val = (0x7 << 12) | -- ((p6 & 0x0F) << 8) | -- ((p5 & 0x0F) << 4) | -- ((p4 & 0x0F) << 0); -+ ((PLL_ADJ(p6) & 0x0F) << 8) | -+ ((PLL_ADJ(p5) & 0x0F) << 4) | -+ ((PLL_ADJ(p4) & 0x0F) << 0); - mt9t112_reg_mask_set(ret, client, 0x002A, 0x7fff, val); - - /* P7 */ - val = (0x1 << 12) | -- ((p7 & 0x0F) << 0); -+ ((PLL_ADJ(p7) & 0x0F) << 0); - mt9t112_reg_mask_set(ret, client, 0x002C, 0x100f, val); - - return ret; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0070-mt9t112-Adjust-50-60Hz-flickering-settings.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0070-mt9t112-Adjust-50-60Hz-flickering-settings.patch deleted file mode 100644 index e9d4fe8..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0070-mt9t112-Adjust-50-60Hz-flickering-settings.patch +++ /dev/null @@ -1,51 +0,0 @@ -From aa90dfe987d42500ff2306baf66f526509fdfae0 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Mon, 19 Jul 2010 17:30:29 -0500 -Subject: [PATCH 70/75] mt9t112: Adjust 50/60Hz flickering settings - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 24 ++++++++++++++---------- - 1 files changed, 14 insertions(+), 10 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index c1a9b41..8528417 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -694,19 +694,23 @@ static int mt9t112_init_setting(const struct i2c_client *client) - /* RX FIFO Watermark (B) */ - mt9t112_mcu_write(ret, client, VAR(18, 142), 0x0080); - -- /* MCLK: 16MHz -+ /* MCLK: 24MHz - * PCLK: 73MHz - * CorePixCLK: 36.5 MHz - */ -- mt9t112_mcu_write(ret, client, VAR8(18, 0x0044), 133); -- mt9t112_mcu_write(ret, client, VAR8(18, 0x0045), 110); -- mt9t112_mcu_write(ret, client, VAR8(18, 0x008c), 130); -- mt9t112_mcu_write(ret, client, VAR8(18, 0x008d), 108); -- -- mt9t112_mcu_write(ret, client, VAR8(18, 0x00A5), 27); -- mt9t112_mcu_write(ret, client, VAR8(18, 0x00a6), 30); -- mt9t112_mcu_write(ret, client, VAR8(18, 0x00a7), 32); -- mt9t112_mcu_write(ret, client, VAR8(18, 0x00a8), 35); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x0044), 11); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x012F), 1); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x0045), 222); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x012D), 0); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x008c), 161); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x0130), 0); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x008d), 134); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x012E), 0); -+ -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x00A5), 36); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x00a6), 38); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x00a7), 43); -+ mt9t112_mcu_write(ret, client, VAR8(18, 0x00a8), 45); - - return ret; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0071-mt9t112-Trigger-autofocus-at-the-end-of-context-swit.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0071-mt9t112-Trigger-autofocus-at-the-end-of-context-swit.patch deleted file mode 100644 index 10ba57d..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0071-mt9t112-Trigger-autofocus-at-the-end-of-context-swit.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 18589703f191cee2568324b475ae479dd7f3b779 Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Mon, 19 Jul 2010 17:45:38 -0500 -Subject: [PATCH 71/75] mt9t112: Trigger autofocus at the end of context switch - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9t112.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c -index 8528417..0769f66 100644 ---- a/drivers/media/video/mt9t112.c -+++ b/drivers/media/video/mt9t112.c -@@ -1080,8 +1080,6 @@ static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, - mt9t112_pixfmt_to_order(priv->pix.pixelformat)); - mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); - -- ECHECKER(ret, mt9t112_auto_focus_trigger(client)); -- - ECHECKER(ret, mt9t112_goto_preview(client)); - - if ((priv->pix.width == MAX_WIDTH) && -@@ -1089,6 +1087,8 @@ static int mt9t112_v4l2_int_s_power(struct v4l2_int_device *s, - ECHECKER(ret, mt9t112_goto_capture(client)); - } - -+ ECHECKER(ret, mt9t112_auto_focus_trigger(client)); -+ - dev_dbg(&client->dev, "format : %d\n", priv->pix.pixelformat); - dev_dbg(&client->dev, "size : %d x %d\n", - priv->pix.width, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0072-omap3beagle-camera-Fix-dual-sensor-registration.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0072-omap3beagle-camera-Fix-dual-sensor-registration.patch deleted file mode 100644 index 409c08f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0072-omap3beagle-camera-Fix-dual-sensor-registration.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 838aed68f8efa16e9915795ddb968157d40fca6b Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 22 Jul 2010 11:03:33 -0500 -Subject: [PATCH 72/75] omap3beagle: camera: Fix dual sensor registration - -dev_index should be different, which represents an internal index -in the master camera driver. - -Also, make device video nodes be alloted with the "first free", by setting -dev_minor to -1. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 6 +++--- - 1 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 520e1d8..c0218e3 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -107,7 +107,7 @@ static int mt9v113_ifparm(struct v4l2_ifparm *p) - - static struct omap34xxcam_hw_config mt9v113_hwc = { - .dev_index = 0, -- .dev_minor = 0, -+ .dev_minor = -1, - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, - .u.sensor.sensor_isp = 1, - .u.sensor.capture_mem = MT9V113_MAX_FRAME_SIZE * 2, -@@ -259,8 +259,8 @@ static int mt9t112_ifparm(struct v4l2_ifparm *p) - - #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) - static struct omap34xxcam_hw_config mt9t112_hwc = { -- .dev_index = 0, -- .dev_minor = 0, -+ .dev_index = 1, -+ .dev_minor = -1, - .dev_type = OMAP34XXCAM_SLAVE_SENSOR, - .u.sensor.sensor_isp = 0, - .u.sensor.capture_mem = MT9T112_BIGGEST_FRAME_BYTE_SIZE, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0073-mt9v113-Fix-State-variable-handling.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0073-mt9v113-Fix-State-variable-handling.patch deleted file mode 100644 index 9bd006e..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0073-mt9v113-Fix-State-variable-handling.patch +++ /dev/null @@ -1,68 +0,0 @@ -From e3d5c3eb67e2ef91e08b0fcd26778b8505268a8a Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 22 Jul 2010 13:29:16 -0500 -Subject: [PATCH 73/75] mt9v113: Fix State variable handling - -State variable was misused, and was running detection all the -time the sensor was powered back on. - -Reason? power off code was putting it to "not detected" always. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - drivers/media/video/mt9v113.c | 23 ++++++++++++++--------- - 1 files changed, 14 insertions(+), 9 deletions(-) - -diff --git a/drivers/media/video/mt9v113.c b/drivers/media/video/mt9v113.c -index 6714240..37e3e19 100644 ---- a/drivers/media/video/mt9v113.c -+++ b/drivers/media/video/mt9v113.c -@@ -1251,7 +1251,6 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - /* Disable mux for mt9v113 data path */ - if (decoder->pdata->power_set) - err |= decoder->pdata->power_set(s, on); -- decoder->state = STATE_NOT_DETECTED; - break; - - case V4L2_POWER_STANDBY: -@@ -1260,23 +1259,29 @@ static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on) - break; - - case V4L2_POWER_ON: -- /* Enable mux for mt9v113 data path */ -- if (decoder->state == STATE_NOT_DETECTED) { -- -- if (decoder->pdata->power_set) -- err = decoder->pdata->power_set(s, on); -+ if (decoder->pdata->power_set) { -+ err = decoder->pdata->power_set(s, on); -+ if (err) -+ return err; -+ } - -+ if (decoder->state == STATE_NOT_DETECTED) { - /* Detect the sensor is not already detected */ -- err |= mt9v113_detect(decoder); -+ err = mt9v113_detect(decoder); - if (err) { - v4l_err(decoder->client, - "Unable to detect decoder\n"); -+ WARN_ON(1); - return err; - } - } - /* Only VGA mode for now */ -- err |= mt9v113_configure(decoder); -- err |= mt9v113_vga_mode(decoder); -+ err = mt9v113_configure(decoder); -+ if (err) -+ return err; -+ err = mt9v113_vga_mode(decoder); -+ if (err) -+ return err; - break; - - default: --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0074-Move-sensor-rest-to-after-applying-power.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0074-Move-sensor-rest-to-after-applying-power.patch deleted file mode 100644 index 24fb458..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0074-Move-sensor-rest-to-after-applying-power.patch +++ /dev/null @@ -1,65 +0,0 @@ -From f68eb83d33624b83b4ddd77daf3966de686ffaf0 Mon Sep 17 00:00:00 2001 -From: Steve Kipisz <s-kipisz2@ti.com> -Date: Thu, 5 Aug 2010 10:51:11 -0500 -Subject: [PATCH 74/75] Move sensor rest to after applying power. - ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 12 ++++++++---- - 1 files changed, 8 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index c0218e3..110c2c9 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -160,8 +160,6 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - case V4L2_POWER_ON: - - isp_configure_interface(vdev->cam->isp, &mt9v113_if_config); -- /* Set RESET_BAR to 0 */ -- gpio_set_value(LEOPARD_RESET_GPIO, 0); - - /* turn on VDD */ - regulator_enable(cam_1v8_reg); -@@ -170,6 +168,9 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - regulator_enable(cam_2v8_reg); - mdelay(50); - -+ /* Set RESET_BAR to 0 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 0); -+ - /* Enable EXTCLK */ - isp_set_xclk(vdev->cam->isp, MT9V113_CLK_MIN*2, CAM_USE_XCLKA); - /* -@@ -177,8 +178,10 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - * ((1000000 * 70) / 6000000) = aprox 12 us. - */ - udelay(12); -+ - /* Set RESET_BAR to 1 */ - gpio_set_value(LEOPARD_RESET_GPIO, 1); -+ - /* - * Wait at least 100 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN): - * ((1000000 * 100) / 6000000) = aprox 17 us. -@@ -317,8 +320,6 @@ static int mt9t112_power_set(struct v4l2_int_device *s, enum v4l2_power power) - isp_configure_interface(vdev->cam->isp, &mt9t112_if_config); - #endif - -- /* Set RESET_BAR to 0 */ -- gpio_set_value(LEOPARD_RESET_GPIO, 0); - - /* turn on VDD */ - regulator_enable(cam_1v8_reg); -@@ -330,6 +331,9 @@ static int mt9t112_power_set(struct v4l2_int_device *s, enum v4l2_power power) - - mdelay(50); - -+ /* Set RESET_BAR to 0 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 0); -+ - /* Enable EXTCLK */ - isp_set_xclk(vdev->cam->isp, 24000000, CAM_USE_XCLKA); - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0075-omap3beagle-Add-camera-bootarg.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0075-omap3beagle-Add-camera-bootarg.patch deleted file mode 100644 index 066bbb4..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0075-omap3beagle-Add-camera-bootarg.patch +++ /dev/null @@ -1,108 +0,0 @@ -From d15c09a8ed5441dd843257b6a4396dd058a2e68f Mon Sep 17 00:00:00 2001 -From: Sergio Aguirre <saaguirre@ti.com> -Date: Thu, 22 Jul 2010 15:38:43 -0500 -Subject: [PATCH 75/75] omap3beagle: Add camera bootarg - -This adds a new 'camera' bootarg, with (so far) 2 new possible types: -- lbcmvga: Leopard Board Camera Module: MT9V113 VGA -- lbcm3m1: Leopard Board Camera Module: MT9T111 3MP - -Also, cleans up a little bit the current i2c2 bus init code. - -Signed-off-by: Sergio Aguirre <saaguirre@ti.com> ---- - arch/arm/mach-omap2/board-omap3beagle.c | 42 +++++++++++++++++++++++++------ - 1 files changed, 34 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 7c9e40a..1e8b77b 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -89,6 +89,7 @@ extern struct mt9t112_platform_data mt9t112_pdata; - #define NAND_BLOCK_SIZE SZ_128K - - char expansionboard_name[16]; -+char cameraboard_name[16]; - - #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) - -@@ -595,13 +596,16 @@ static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = { - static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {}; - #endif - --static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = { -+static struct i2c_board_info __initdata beagle_lbcmvga_i2c2_boardinfo[] = { - #if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE) - { - I2C_BOARD_INFO("mt9v113", MT9V113_I2C_ADDR), - .platform_data = &mt9v113_pdata, - }, - #endif -+}; -+ -+static struct i2c_board_info __initdata beagle_lbcm3m1_i2c2_boardinfo[] = { - #if defined(CONFIG_VIDEO_MT9T112) || defined(CONFIG_VIDEO_MT9T112_MODULE) - { - I2C_BOARD_INFO("mt9t112", MT9T112_I2C_ADDR), -@@ -614,15 +618,27 @@ static int __init omap3_beagle_i2c_init(void) - { - omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo, - ARRAY_SIZE(beagle_i2c1_boardinfo)); -- if(!strcmp(expansionboard_name, "zippy") || !strcmp(expansionboard_name, "zippy2")) -- { -- printk(KERN_INFO "Beagle expansionboard: registering i2c2 bus for zippy/zippy2\n"); -+ -+ if (!strcmp(expansionboard_name, "zippy") || -+ !strcmp(expansionboard_name, "zippy2")) { -+ printk(KERN_INFO "Beagle expansionboard:" -+ " registering i2c2 bus for zippy/zippy2\n"); - omap_register_i2c_bus(2, 400, beagle_zippy_i2c2_boardinfo, - ARRAY_SIZE(beagle_zippy_i2c2_boardinfo)); -- } else -- { -- omap_register_i2c_bus(2, 400, beagle_i2c2_boardinfo, -- ARRAY_SIZE(beagle_i2c2_boardinfo)); -+ } else { -+ if (!strcmp(cameraboard_name, "lbcmvga")) { -+ printk(KERN_INFO "Beagle cameraboard:" -+ " registering i2c2 bus for lbcmvga\n"); -+ omap_register_i2c_bus(2, 400, beagle_lbcmvga_i2c2_boardinfo, -+ ARRAY_SIZE(beagle_lbcmvga_i2c2_boardinfo)); -+ } else if (!strcmp(cameraboard_name, "lbcm3m1")) { -+ printk(KERN_INFO "Beagle cameraboard:" -+ " registering i2c2 bus for lbcm3m1\n"); -+ omap_register_i2c_bus(2, 400, beagle_lbcm3m1_i2c2_boardinfo, -+ ARRAY_SIZE(beagle_lbcm3m1_i2c2_boardinfo)); -+ } else { -+ omap_register_i2c_bus(2, 400, NULL, 0); -+ } - } - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ -@@ -825,6 +841,15 @@ static int __init expansionboard_setup(char *str) - return 0; - } - -+static int __init cameraboard_setup(char *str) -+{ -+ if (!str) -+ return -EINVAL; -+ strncpy(cameraboard_name, str, 16); -+ printk(KERN_INFO "Beagle cameraboard: %s\n", cameraboard_name); -+ return 0; -+} -+ - static void __init omap3_beagle_init(void) - { - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); -@@ -910,6 +935,7 @@ static void __init omap3_beagle_map_io(void) - } - - early_param("buddy", expansionboard_setup); -+early_param("camera", cameraboard_setup); - - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/5m03/0001-mt9p031-import-driver-from-https-github.com-Aptina-B.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/5m03/0001-mt9p031-import-driver-from-https-github.com-Aptina-B.patch deleted file mode 100644 index ee728b9..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/5m03/0001-mt9p031-import-driver-from-https-github.com-Aptina-B.patch +++ /dev/null @@ -1,1547 +0,0 @@ -From eefcf5de4689fbd00119d7a7df75244ca6ca1187 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Sun, 1 May 2011 16:40:54 +0200 -Subject: [PATCH 1/2] mt9p031: import driver from https://github.com/Aptina/BeagleBoard-xM/tree/master/Angstrom/MT9P031 - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - drivers/media/video/Kconfig | 6 + - drivers/media/video/Makefile | 1 + - drivers/media/video/mt9p031.c | 1445 +++++++++++++++++++++++++++++++++++++++ - include/media/mt9p031.h | 30 + - include/media/v4l2-chip-ident.h | 1 + - 5 files changed, 1483 insertions(+), 0 deletions(-) - create mode 100644 drivers/media/video/mt9p031.c - create mode 100644 include/media/mt9p031.h - -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index 4c1fb0f..59f1133 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -832,6 +832,12 @@ config SOC_CAMERA_MT9M111 - help - This driver supports MT9M111 and MT9M112 cameras from Micron - -+config SOC_CAMERA_MT9P031 -+ tristate "mt9p031 support" -+ depends on SOC_CAMERA && I2C -+ help -+ This driver supports MT9P031 cameras from Micron. -+ - config SOC_CAMERA_MT9T031 - tristate "mt9t031 support" - depends on SOC_CAMERA && I2C -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index fb7e46c..f3110e7 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -79,6 +79,7 @@ obj-$(CONFIG_VIDEO_MT9V113) += mt9v113.o - - obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o - obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o -+obj-$(CONFIG_SOC_CAMERA_MT9P031) += mt9p031.o - obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o - obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o - obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o -diff --git a/drivers/media/video/mt9p031.c b/drivers/media/video/mt9p031.c -new file mode 100644 -index 0000000..3047e43 ---- /dev/null -+++ b/drivers/media/video/mt9p031.c -@@ -0,0 +1,1445 @@ -+/* -+ * drivers/media/video/mt9p031.c -+ * -+ * Aptina mt9p031 sensor driver -+ * -+ * -+ * Copyright (C) 2010 Aptina Imaging -+ * -+ * -+ * Leverage mt9p012.c -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ * -+ */ -+ -+ -+#include <linux/delay.h> -+#include <linux/i2c.h> -+#include <linux/init.h> -+#include <linux/module.h> -+#include <linux/slab.h> -+#include <linux/kernel.h> -+#include <linux/videodev2.h> -+#include <linux/sysfs.h> -+ -+#include <media/mt9p031.h> -+#include <media/v4l2-int-device.h> -+#include <media/v4l2-chip-ident.h> -+ -+#define MT9P031_DEBUG -+ -+#ifdef MT9P031_DEBUG -+#define DPRINTK_DRIVER(format, ...) \ -+ printk(KERN_INFO "_MT9P031_DRIVER: " format, ## __VA_ARGS__) -+#else -+#define DPRINTK_DRIVER(format, ...) -+#endif -+/************************************************************************ -+ macro -+************************************************************************/ -+// Macro to configure I2c level shifter. Use only for MT9P031 Headboards from Aptina; not required for Leopard Imaging or elsewise. -+#define MT9P031_HEADBOARD -+ -+#define MT9P031_CHIP_ID 0x1801 -+#define MT9P031_MAX_HEIGHT 1944 -+#define MT9P031_MAX_WIDTH 2592 -+#define MT9P031_MIN_HEIGHT 2 -+#define MT9P031_MIN_WIDTH 2 -+ -+#define VGA_HEIGHT 480 -+#define VGA_WIDTH 640 -+ -+#define MT9P031_NORMAL_OPERATION_MODE (0x1F82) //write -+#define MT9P031_OUTPUT_CTRL_CHIP_UNSELECT (0x1F80) -+#define MT9P031_OUTPUT_CTRL_HALT (0x1F83) -+ -+/* FPS Capabilities */ -+#define MT9P031_MIN_FPS 10 -+#define MT9P031_DEF_FPS 30 -+#define MT9P031_MAX_FPS 50 -+ -+#define MT9P031_XCLK_NOM_1 12000000 -+#define MT9P031_XCLK_NOM_2 24000000 -+ -+/* Analog gain values */ -+#define MT9P031_EV_MIN_GAIN 0 -+#define MT9P031_EV_MAX_GAIN 47 -+#define MT9P031_EV_DEF_GAIN 24 -+#define MT9P031_EV_GAIN_STEP 1 -+ -+/* Exposure time values */ -+#define MT9P031_MIN_EXPOSURE 15000 -+#define MT9P031_MAX_EXPOSURE 128000 -+#define MT9P031_DEF_EXPOSURE 33000 -+#define MT9P031_EXPOSURE_STEP 100 -+#define Q12 4096 -+/************************************************************************ -+ Register Address -+************************************************************************/ -+ -+#define REG_MT9P031_CHIP_VERSION 0x00 -+#define REG_MT9P031_ROWSTART 0x01 -+#define REG_MT9P031_COLSTART 0x02 -+#define REG_MT9P031_HEIGHT 0x03 -+#define REG_MT9P031_WIDTH 0x04 -+#define REG_MT9P031_HBLANK 0x05 -+#define REG_MT9P031_VBLANK 0x06 -+#define REG_MT9P031_OUT_CTRL 0x07 -+#define REG_MT9P031_SHUTTER_WIDTH_U 0x08 -+#define REG_MT9P031_SHUTTER_WIDTH_L 0x09 -+#define REG_MT9P031_PCLK_CTRL 0x0a -+#define REG_MT9P031_RESTART 0x0b -+#define REG_MT9P031_SHUTTER_DELAY 0x0c -+#define REG_MT9P031_RESET 0x0d -+ -+#define REG_MT9P031_PLL_CTRL 0x10 -+#define REG_MT9P031_PLL_CONF1 0x11 -+#define REG_MT9P031_PLL_CONF2 0x12 -+ -+#define REG_MT9P031_READ_MODE1 0x1e -+#define REG_MT9P031_READ_MODE2 0x20 -+#define REG_MT9P031_ROW_ADDR_MODE 0x22 -+#define REG_MT9P031_COL_ADDR_MODE 0x23 -+#define REG_MT9P031_GREEN_1_GAIN 0x2b -+#define REG_MT9P031_BLUE_GAIN 0x2c -+#define REG_MT9P031_RED_GAIN 0x2d -+#define REG_MT9P031_GREEN_2_GAIN 0x2e -+#define REG_MT9P031_GLOBAL_GAIN 0x35 -+#define REG_MT9P031_CHIP_VERSION_ALT 0x0FF -+ -+/************************************************************************ -+ struct -+************************************************************************/ -+struct mt9p031_frame_size { -+ u16 width; -+ u16 height; -+}; -+ -+struct mt9p031_priv { -+ struct mt9p031_platform_data *pdata; -+ struct v4l2_int_device *v4l2_int_device; -+ struct i2c_client *client; -+ struct v4l2_pix_format pix; -+ struct v4l2_fract timeperframe; -+ unsigned long xclk_current; -+ int fps; -+ int scaler; -+ int ver; -+ int model; -+ u32 flags; -+/* for flags */ -+#define INIT_DONE (1<<0) -+}; -+ -+struct mt9p031_priv sysPriv; -+ -+static const struct v4l2_fmtdesc mt9p031_formats[] = { -+ { -+ .description = "Bayer (sRGB) 10 bit", -+ .pixelformat = V4L2_PIX_FMT_SRGGB10, -+ }, -+}; -+ -+static const unsigned int mt9p031_num_formats = ARRAY_SIZE(mt9p031_formats); -+ -+/***********************Minimum Horizontal blanking*********************/ -+int hb_min[4][4] = { -+ { 450, 430, 0, 420 }, -+ { 796, 776, 0, 766 }, -+ { 0, 0, 0, 0 }, -+ { 1488, 1468, 0, 1458 }, -+}; -+ -+/**************************supported sizes******************************/ -+const static struct mt9p031_frame_size mt9p031_sizes[] = { -+ { 640, 480 }, -+ { 1280, 720 }, -+ { 1920, 1080 }, -+ { 2048, 1536 }, //3MP -+ { 2592, 1944 }, //5MP -+}; -+ -+ -+struct mt9p031_format_params { -+ int width; -+ int height; -+ int row_start; -+ int col_start; -+ int row_size; -+ int col_size; -+ int hblank; -+ int vblank; -+ int integ_time; -+ int row_addr_mode; -+ int col_addr_mode; -+ int read_mode_2_config; -+ int shutter_width_hi; -+ int shutter_delay; -+ int row_bin; -+ int col_bin; -+}; -+ -+enum mt9p031_image_size { -+ VGA_BIN_30FPS, -+ HDV_720P_30FPS, -+ //HDV_720P_60FPS, -+ //HDV_720P_60FPS_LVB, -+ HDV_1080P_30FPS, -+ MT9P031_THREE_MP, -+ MT9P031_FIVE_MP, -+}; -+ -+enum mt9p031_image_size mt9p031_current_format; -+ -+const struct mt9p031_format_params mt9p031_supported_formats[] = { -+ { 640, 480, 64, 24, 1919, 2559, 0, 0, 0x0296, 0x0033, 0x0033, 0x0060, 0, 0, 3, 3 }, // VGA_BIN_30FPS -+ { 1280, 720, 64, 24, 1439, 2559, 0, 0, 0x0296, 0x0011, 0x0011, 0x0060, 0, 0, 1, 1 }, // 720P_HD_30FPS -+ //{ 1280, 720, 0x0040, 0x0018, 0x059F, 0x09FF, 0, 0, 0x0296, 0x0011, 0x0011, 0x0060, 0, 0, 1, 1 }, // 720P_HD_60FPS -+ //{ 1280, 720, 0x0040, 0x0018, 0x059F, 0x09FF, 0, 0x02D0, 0x0296, 0x0011, 0x0011, 0x0060, 0, 0, 1, 1 }, // 720P_HD_60FPS_LVB -+ { 1920, 1080, 431, 335, 1079, 1919, 0, 0x0037, 0x01AC, 0, 0, 0x0040, 0, 0, 0, 0 }, // 1080P_30FPS -+ { 2048, 1536, 431, 335, 1535, 2047, 0, 0x0037, 0x01AC, 0, 0, 0x0040, 0, 0, 0, 0 }, // 3MP CAPTURE -+ { 2592, 1944, 431, 335, 1943, 2591, 0, 0x0037, 0x01AC, 0, 0, 0x0040, 0, 0, 0, 0 }, // 5MP CAPTURE -+}; -+ -+ -+const struct v4l2_fract mt9p031_frameintervals[] = { -+ { .numerator = 1, .denominator = 10 }, -+ { .numerator = 1, .denominator = 20 }, -+ { .numerator = 1, .denominator = 30 }, -+ { .numerator = 1, .denominator = 40 }, -+ { .numerator = 1, .denominator = 50 }, -+}; -+ -+ -+const u16 MT9P031_EV_GAIN_TBL[48] = { -+ /* Gain x1 */ -+ 8, 9, 10, 11, 12, 13, 14, 15, -+ /* Gain x2 */ -+ 16, 17, 18, 19, 20, 21, 22, 23, -+ /* Gain x3 */ -+ 24, 25, 26, 27, 28, 29, 30, 31, -+ /* Gain x4 */ -+ 32, 33, 34, 35, -+ /* Gain x5 */ -+ 81, 82, 83, -+ /* Gain x6 */ -+ 84, 85, 86, 87, 88, 89, 90, 91, -+ /* Gain x7 */ -+ 92, 93, 94, 95, 96, 97, 98, 99, -+ /* Gain x8 */ -+ 100, -+}; -+ -+#ifdef MT9P031_HEADBOARD -+/** -+ * mt9p031_config_PCA9543A - configure on-board I2c level-shifter PCA9543A of MT9P031 Headboards from Aptina -+ * @client: pointer to i2c client -+ * Configures the level shifter to enable channel 0 -+ */ -+static int mt9p031_config_PCA9543A(const struct i2c_client *client) -+{ -+ struct i2c_msg msg; -+ int ret; -+ u8 buf; -+ buf = 0x21; -+ -+ msg.addr = (0xE6 >> 1); //slave address of PCA9543A -+ msg.flags = 0; -+ msg.len = 1; -+ msg.buf = &buf; -+ -+ ret = i2c_transfer(client->adapter, &msg, 1); -+ -+ return 0; -+ -+} -+#endif //MT9P031_HEADBOARD -+ -+/** -+ * mt9p031_reg_read - read resgiter value -+ * @client: pointer to i2c client -+ * @command: register address -+ */ -+static int mt9p031_reg_read(const struct i2c_client *client, u16 command, u16 *val) -+{ -+ struct i2c_msg msg[2]; -+ u8 buf[2]; -+ int ret; -+ -+ // 8-bit/ byte addressable register -+ buf[0] = command & 0xff; -+ -+ msg[0].addr = client->addr; -+ msg[0].flags = 0; -+ msg[0].len = 1; -+ msg[0].buf = buf ; -+ ret = i2c_transfer(client->adapter, &msg[0], 1); -+ -+ if(ret >= 0) { -+ msg[1].addr = client->addr; -+ msg[1].flags = I2C_M_RD; //1 -+ msg[1].len = 2; -+ msg[1].buf = buf; -+ ret = i2c_transfer(client->adapter, &msg[1], 1); -+ } -+ /* -+ * if return value of this function is < 0, -+ * it mean error. -+ * else, under 16bit is valid data. -+ */ -+ if(ret >= 0) { -+ *val = 0; -+ *val = buf[1] + (buf[0] << 8); -+ return 0; -+ } -+ -+ v4l_err(client, "read from offset 0x%x error %d", command, ret); -+ return ret; -+} -+ -+/** -+ * mt9p031_reg_write - read resgiter value -+ * @client: pointer to i2c client -+ * @command: register address -+ * @data: value to be written -+ */ -+static int mt9p031_reg_write(const struct i2c_client *client, -+ u16 command, u16 data) -+{ -+ struct i2c_msg msg; -+ u8 buf[3]; -+ int ret; -+ -+ // 8-bit/ byte addressable register -+ -+ buf[0] = command & 0xff; -+ data = swab16(data); -+ memcpy(buf + 1, &data, 2); -+ -+ msg.addr = client->addr; -+ msg.flags = 0; -+ msg.len = 3; -+ msg.buf = buf; -+ -+ /* -+ * i2c_transfer return message length, -+ * but this function should return 0 if correct case -+ */ -+ ret = i2c_transfer(client->adapter, &msg, 1); -+ if (ret >= 0) -+ ret = 0; -+ -+ return ret; -+} -+ -+/** -+ * struct vcontrol - Video controls -+ * @v4l2_queryctrl: V4L2 VIDIOC_QUERYCTRL ioctl structure -+ * @current_value: current value of this control -+ */ -+static struct vcontrol { -+ struct v4l2_queryctrl qc; -+ int current_value; -+} mt9p031_video_control[] = { -+ { -+ { -+ .id = V4L2_CID_EXPOSURE, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Exposure", -+ .minimum = MT9P031_MIN_EXPOSURE, -+ .maximum = MT9P031_MAX_EXPOSURE, -+ .step = MT9P031_EXPOSURE_STEP, -+ .default_value = MT9P031_DEF_EXPOSURE, -+ }, -+ .current_value = MT9P031_DEF_EXPOSURE, -+ }, -+ { -+ { -+ .id = V4L2_CID_GAIN, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Analog Gain", -+ .minimum = MT9P031_EV_MIN_GAIN, -+ .maximum = MT9P031_EV_MAX_GAIN, -+ .step = MT9P031_EV_GAIN_STEP, -+ .default_value = MT9P031_EV_DEF_GAIN, -+ }, -+ .current_value = MT9P031_EV_DEF_GAIN, -+ }, -+}; -+ -+/** -+ * find_vctrl - Finds the requested ID in the video control structure array -+ * @id: ID of control to search the video control array for -+ * -+ * Returns the index of the requested ID from the control structure array -+ */ -+static int -+find_vctrl(int id) -+{ -+ int i; -+ -+ if (id < V4L2_CID_BASE) -+ return -EDOM; -+ -+ for (i = (ARRAY_SIZE(mt9p031_video_control) - 1); i >= 0; i--) -+ if (mt9p031_video_control[i].qc.id == id) -+ break; -+ if (i < 0) -+ i = -EINVAL; -+ return i; -+} -+ -+/** -+ * mt9p031_calc_size - Find the best match for a requested image capture size -+ * @width: requested image width in pixels -+ * @height: requested image height in pixels -+ * -+ * Find the best match for a requested image capture size. The best match -+ * is chosen as the nearest match that has the same number or fewer pixels -+ * as the requested size, or the smallest image size if the requested size -+ * has fewer pixels than the smallest image. -+ */ -+static enum mt9p031_image_size mt9p031_calc_size(unsigned int width, -+ unsigned int height) -+{ -+ enum mt9p031_image_size isize; -+ unsigned long pixels = width * height; -+ -+ for (isize = VGA_BIN_30FPS; isize <= MT9P031_FIVE_MP; isize++) { -+ if (mt9p031_sizes[isize].height * -+ mt9p031_sizes[isize].width >= pixels) { -+ -+ return isize; -+ } -+ } -+ -+ return MT9P031_FIVE_MP; -+} -+ -+/** -+ * mt9p031_find_isize - Find the best match for a requested image capture size -+ * @width: requested image width in pixels -+ * @height: requested image height in pixels -+ * -+ * Find the best match for a requested image capture size. The best match -+ * is chosen as the nearest match that has the same number or fewer pixels -+ * as the requested size, or the smallest image size if the requested size -+ * has fewer pixels than the smallest image. -+ */ -+static enum mt9p031_image_size mt9p031_find_isize(unsigned int width) -+{ -+ enum mt9p031_image_size isize; -+ -+ for (isize = VGA_BIN_30FPS; isize <= MT9P031_FIVE_MP; isize++) { -+ if (mt9p031_sizes[isize].width >= width) -+ break; -+ } -+ -+ return isize; -+} -+ -+/** -+ * mt9p031_calc_xclk - Calculate the required xclk frequency -+ * @c: i2c client driver structure -+ * -+ * Given the image capture format in pix, the nominal frame period in -+ * timeperframe, calculate and return the required xclk frequency -+ */ -+static unsigned long mt9p031_calc_xclk(struct i2c_client *c) -+{ -+ struct mt9p031_priv *priv = i2c_get_clientdata(c); -+ struct v4l2_fract *timeperframe = &priv->timeperframe; -+ -+ if (timeperframe->numerator == 0 || -+ timeperframe->denominator == 0) { -+ /* supply a default nominal_timeperframe */ -+ timeperframe->numerator = 1; -+ timeperframe->denominator = MT9P031_DEF_FPS; -+ } -+ -+ priv->fps = timeperframe->denominator / timeperframe->numerator; -+ if (priv->fps < MT9P031_MIN_FPS) -+ priv->fps = MT9P031_MIN_FPS; -+ else if (priv->fps > MT9P031_MAX_FPS) -+ priv->fps = MT9P031_MAX_FPS; -+ -+ timeperframe->numerator = 1; -+ timeperframe->denominator = priv->fps; -+ -+ return MT9P031_XCLK_NOM_1; -+} -+ -+/** -+ * mt9p031_set_params - sets register settings according to resolution -+ * @client: pointer to standard i2c client -+ * @width: width as queried by ioctl -+ * @height: height as queried by ioctl -+ */ -+static int mt9p031_set_params(struct i2c_client *client, u32 width, u32 height) -+{ -+ struct mt9p031_priv *priv = i2c_get_clientdata(client); -+ struct v4l2_pix_format *pix = &priv->pix; -+ int ret; -+ enum mt9p031_image_size i; -+ -+ i = mt9p031_find_isize(pix->width); -+ priv->pix.width = mt9p031_supported_formats[i].width; -+ priv->pix.height = mt9p031_supported_formats[i].height; -+ -+ ret = mt9p031_reg_write(client, REG_MT9P031_ROWSTART, mt9p031_supported_formats[i].row_start); //ROW_WINDOW_START_REG -+ ret |= mt9p031_reg_write(client, REG_MT9P031_COLSTART, mt9p031_supported_formats[i].col_start); //COL_WINDOW_START_REG -+ ret |= mt9p031_reg_write(client, REG_MT9P031_HEIGHT, mt9p031_supported_formats[i].row_size); //ROW_WINDOW_SIZE_REG=1439 -+ ret |= mt9p031_reg_write(client, REG_MT9P031_WIDTH, mt9p031_supported_formats[i].col_size); //COL_WINDOW_SIZE_REG=2559 -+ ret |= mt9p031_reg_write(client, REG_MT9P031_HBLANK, mt9p031_supported_formats[i].hblank); //HORZ_BLANK=0 -+ ret |= mt9p031_reg_write(client, REG_MT9P031_VBLANK, mt9p031_supported_formats[i].vblank); //VERT_BLANK_REG=720 -+ ret |= mt9p031_reg_write(client, REG_MT9P031_SHUTTER_WIDTH_L, 0x0400); //SHUTTER_WIDTH_LOW (INTEG_TIME_REG = 1024) -+ ret |= mt9p031_reg_write(client, REG_MT9P031_ROW_ADDR_MODE, mt9p031_supported_formats[i].row_addr_mode); //ROW_MODE, ROW_SKIP=1, ROW_BIN=1 -+ ret |= mt9p031_reg_write(client, REG_MT9P031_COL_ADDR_MODE, mt9p031_supported_formats[i].col_addr_mode); //COL_MODE, COL_SKIP=1, COL_BIN=1 -+ ret |= mt9p031_reg_write(client, REG_MT9P031_READ_MODE2, mt9p031_supported_formats[i].read_mode_2_config); //READ_MODE_2, COL_SUM -+ ret |= mt9p031_reg_write(client, REG_MT9P031_SHUTTER_WIDTH_U, mt9p031_supported_formats[i].shutter_width_hi); //SHUTTER_WIDTH_HI -+ ret |= mt9p031_reg_write(client, REG_MT9P031_SHUTTER_WIDTH_L, mt9p031_supported_formats[i].integ_time); //SHUTTER_WIDTH_LOW (INTEG_TIME_REG) -+ ret |= mt9p031_reg_write(client, REG_MT9P031_SHUTTER_DELAY, mt9p031_supported_formats[i].shutter_delay); //SHUTTER_DELAY_REG -+ -+ return ret; -+} -+ -+/** -+ * mt9p031_init_camera - initialize camera settings -+ * @client: pointer to i2c client -+ * Initialize camera settings -+ */ -+static int mt9p031_init_camera(const struct i2c_client *client) -+{ -+ int ret; -+ struct mt9p031_priv *priv = i2c_get_clientdata(client); -+ struct v4l2_pix_format *pix = &priv->pix; -+ -+ ret = mt9p031_reg_write(client, REG_MT9P031_PLL_CTRL, 0x0051); //PLL_CTRL; power up pll -+ ret |= mt9p031_reg_write(client, REG_MT9P031_PLL_CONF1, 0x1801); //PLL_CONFIG_1: m=24, n=1 -+ ret |= mt9p031_reg_write(client, REG_MT9P031_PLL_CONF2, 0x0002); //PLL_CONFIG_2: p1=2, p2=0 -+ mdelay(10); //wait 10 ms for VCO to lock -+ ret |= mt9p031_reg_write(client, REG_MT9P031_PLL_CTRL, 0x0053); //PLL_CONTROL; use PLL -+ mdelay(200); -+ -+ ret |= mt9p031_set_params(priv->client, pix->width, pix->height); -+ -+ ret |= mt9p031_reg_write(client, REG_MT9P031_RESET, 0x0001); //High -+ ret |= mt9p031_reg_write(client, REG_MT9P031_RESET, 0x0000); //Low -+ mdelay(100); -+ -+ ret |= mt9p031_reg_write(client, REG_MT9P031_GREEN_1_GAIN, 0x0051); //Green1_gain_reg -+ ret |= mt9p031_reg_write(client, REG_MT9P031_BLUE_GAIN, 0x0051); //Blue_gain_reg -+ ret |= mt9p031_reg_write(client, REG_MT9P031_RED_GAIN, 0x0051); //Red_gain_reg -+ ret |= mt9p031_reg_write(client, REG_MT9P031_GREEN_2_GAIN, 0x0051); //Green2_gain_reg -+ ret |= mt9p031_reg_write(client, REG_MT9P031_GLOBAL_GAIN, 0x0008); //Analog Gain -+ ret |= mt9p031_reg_write(client, REG_MT9P031_READ_MODE1, 0x0006); //Read_mode_1 //disable AB -+ ret |= mt9p031_reg_write(client, REG_MT9P031_OUT_CTRL, 0x1F8E); //Enable parll fifo data -+ -+ return ret>= 0 ? 0 : -EIO; -+} -+ -+/************************************************************************ -+ i2c driver -+************************************************************************/ -+/** -+ * mt9p031_detect - Detect if an mt9p031 is present, and if so which revision -+ * @client: pointer to the i2c client driver structure -+ * -+ * Returns a negative error number if no device is detected -+ */ -+static int mt9p031_detect(struct i2c_client *client) -+{ -+ struct mt9p031_priv *priv = i2c_get_clientdata(client); -+ const char *devname; -+ u16 chipid; -+ -+ if (!client) -+ return -ENODEV; -+ /* -+ * Set Normal Mode -+ */ -+ if(mt9p031_reg_write(client, REG_MT9P031_OUT_CTRL, MT9P031_NORMAL_OPERATION_MODE)) -+ return -ENODEV; -+ /* -+ * check and show chip ID -+ */ -+ if(mt9p031_reg_read(client, REG_MT9P031_CHIP_VERSION, &chipid)) -+ return -ENODEV; -+ -+ if(chipid == MT9P031_CHIP_ID) { -+ devname = "mt9p031"; -+ priv->model = V4L2_IDENT_MT9P031; -+ dev_info(&client->dev, "%s chip ID %04x\n", devname, chipid); -+ return 0; -+ } -+ -+ dev_err(&client->dev, "Product ID error %04x\n", chipid); -+ return -ENODEV; -+} -+ -+/** -+ * mt9p031_set_exposure_time - sets exposure time per input value -+ * @exp_time: exposure time to be set on device -+ * @client: pointer to standard i2c client -+ * @lvc: pointer to V4L2 exposure entry in video_controls array -+ * -+ * If the requested exposure time is within the allowed limits, the HW -+ * is configured to use the new exposure time, and the video_controls -+ * array is updated with the new current value. -+ * The function returns 0 upon success. Otherwise an error code is -+ * returned. -+ */ -+static int mt9p031_set_exposure_time(u32 exp_time, struct i2c_client *client, -+ struct vcontrol *lvc) -+{ -+ int ret = 0, i, shutter_width, so_p, t_pix_clk, sd_p, shutter_delay; -+ int sw_l ,sw_u ,W ,h_blanking, t_row; -+ -+ if(exp_time < MT9P031_MIN_EXPOSURE) -+ exp_time = MT9P031_MIN_EXPOSURE; -+ else if(exp_time > MT9P031_MAX_EXPOSURE) -+ exp_time = MT9P031_MAX_EXPOSURE; -+ -+ shutter_delay = mt9p031_supported_formats[mt9p031_current_format].shutter_delay; -+ sd_p = min(shutter_delay + 1, 1504); -+ so_p = 208 * (mt9p031_supported_formats[mt9p031_current_format].row_bin + 1) + 98 + sd_p - 94; -+ t_pix_clk = (Q12/96 ); -+ h_blanking = mt9p031_supported_formats[mt9p031_current_format].hblank + 1; -+ W = 2 * (int)((mt9p031_supported_formats[mt9p031_current_format].row_size + 1) / (2 * (mt9p031_supported_formats[mt9p031_current_format].row_bin + 1)) + 1); -+ t_row = 2 * t_pix_clk * max(W/2 + max(h_blanking, hb_min[mt9p031_supported_formats[mt9p031_current_format].row_bin][mt9p031_supported_formats[mt9p031_current_format].col_bin]), -+ (41 + 346 * (mt9p031_supported_formats[mt9p031_current_format].row_bin + 1) + 99))/Q12; -+ -+ shutter_width = (exp_time + 2*so_p*t_pix_clk) / t_row; -+ -+ if (shutter_width< 3) { -+ sd_p = 1232 > shutter_delay ? 1232 : shutter_delay; -+ so_p = 208 * (mt9p031_supported_formats[mt9p031_current_format].row_bin + 1) + 98 + sd_p - 94; -+ shutter_width = ((exp_time*Q12 + 2*so_p*t_pix_clk) / (t_row * Q12)); -+ } -+ -+ if (shutter_width < 1) -+ shutter_width = 1; -+ sw_l = shutter_width& 0xffff; -+ sw_u = (shutter_width)>> 16; -+ ret = mt9p031_reg_write(client, REG_MT9P031_SHUTTER_WIDTH_L,sw_l); -+ mdelay(1); -+ ret = mt9p031_reg_write(client, REG_MT9P031_SHUTTER_WIDTH_U,sw_u); -+ -+ if (ret) -+ dev_err(&client->dev, "Error setting exposure time %d\n", -+ ret); -+ else{ -+ i = find_vctrl(V4L2_CID_EXPOSURE); -+ if (i >= 0) { -+ lvc = &mt9p031_video_control[i]; -+ lvc->current_value = exp_time; -+ } -+ } -+ -+ return ret; -+} -+ -+/** -+ * mt9p031_set_gain - sets sensor analog gain per input value -+ * @lineargain: analog gain value index to be set on device -+ * @client: pointer to standard i2c client -+ * @lvc: pointer to V4L2 analog gain entry in video_controls array -+ * -+ * If the requested analog gain is within the allowed limits, the HW -+ * is configured to use the new gain value, and the video_controls -+ * array is updated with the new current value. -+ * The function returns 0 upon success. Otherwise an error code is -+ * returned. -+ */ -+int mt9p031_set_gain(u16 lineargain, struct i2c_client *client, -+ struct vcontrol *lvc) -+{ -+ int ret= 0, i; -+ u16 reg_gain = 0; -+ -+ if (lineargain < MT9P031_EV_MIN_GAIN) { -+ lineargain = MT9P031_EV_MIN_GAIN; -+ v4l_err(client, "Gain out of legal range."); -+ } -+ if (lineargain > MT9P031_EV_MAX_GAIN) { -+ lineargain = MT9P031_EV_MAX_GAIN; -+ v4l_err(client, "Gain out of legal range."); -+ } -+ -+ reg_gain = MT9P031_EV_GAIN_TBL[lineargain]; -+ ret = mt9p031_reg_write(client, REG_MT9P031_GLOBAL_GAIN, -+ reg_gain); -+ -+ if (ret) { -+ dev_err(&client->dev, "Error setting gain.%d", ret); -+ return ret; -+ } -+ else { -+ i = find_vctrl(V4L2_CID_GAIN); -+ if (i >= 0) { -+ lvc = &mt9p031_video_control[i]; -+ lvc->current_value = lineargain; -+ } -+ } -+ -+ return ret; -+} -+ -+/************************************************************************ -+ v4l2_ioctls -+************************************************************************/ -+ -+/** -+ * mt9p031_v4l2_int_s_power - V4L2 sensor interface handler for vidioc_int_s_power_num -+ * @s: pointer to standard V4L2 device structure -+ * @on: power state to which device is to be set -+ * -+ * Sets devices power state to requrested state, if possible. -+ */ -+static int mt9p031_v4l2_int_s_power(struct v4l2_int_device *s, -+ enum v4l2_power power) -+{ -+ struct mt9p031_priv *priv = s->priv; -+ struct i2c_client *client = priv->client; -+ -+ int ret; -+ -+ switch (power) { -+ case V4L2_POWER_STANDBY: -+ /* FALLTHROUGH */ -+ case V4L2_POWER_OFF: -+ ret = priv->pdata->power_set(s, power); -+ if (ret < 0) { -+ dev_err(&client->dev, "Unable to set target board power " -+ "state (OFF/STANDBY)\n"); -+ return ret; -+ } -+ break; -+ case V4L2_POWER_ON: -+ ret = priv->pdata->power_set(s, power); -+ -+ if (ret < 0) { -+ dev_err(&client->dev, "Unable to set target board power " -+ "state (ON)\n"); -+ return ret; -+ } -+ if (!(priv->flags & INIT_DONE)) { -+ ret = mt9p031_detect(client); -+ if (ret < 0) { -+ dev_err(&client->dev, "Unable to detect sensor\n"); -+ return ret; -+ } -+ priv->flags |= INIT_DONE; -+ } -+ -+ ret = mt9p031_init_camera(client); -+ if (ret < 0) { -+ dev_err(&client->dev, "Unable to initialize sensor\n"); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+/** -+ * mt9p031_v4l2_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure -+ * -+ * If the requested control is supported, sets the control's current -+ * value in HW (and updates the video_control[] array). Otherwise, -+ * returns -EINVAL if the control is not supported. -+ */ -+static int mt9p031_v4l2_s_ctrl(struct v4l2_int_device *s, -+ struct v4l2_control *vc) -+{ -+ int retval = -EINVAL; -+ int i; -+ struct vcontrol *lvc; -+ struct mt9p031_priv *priv = s->priv; -+ struct i2c_client *client = priv->client; -+ -+ i = find_vctrl(vc->id); -+ if (i < 0) -+ return -EINVAL; -+ lvc = &mt9p031_video_control[i]; -+ -+ switch (vc->id) { -+ case V4L2_CID_EXPOSURE: -+ retval = mt9p031_set_exposure_time(vc->value, client, lvc); -+ break; -+ case V4L2_CID_GAIN: -+ retval = mt9p031_set_gain(vc->value, client, lvc); -+ break; -+ } -+ -+ return retval; -+} -+ -+/** -+ * mt9p031_v4l2_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure -+ * -+ * If the requested control is supported, returns the control's current -+ * value from the video_control[] array. Otherwise, returns -EINVAL -+ * if the control is not supported. -+ */ -+static int mt9p031_v4l2_g_ctrl(struct v4l2_int_device *s, -+ struct v4l2_control *vc) -+{ -+ struct vcontrol *lvc; -+ int i; -+ -+ i = find_vctrl(vc->id); -+ if (i < 0) -+ return -EINVAL; -+ lvc = &mt9p031_video_control[i]; -+ -+ switch (vc->id) { -+ case V4L2_CID_EXPOSURE: -+ vc->value = lvc->current_value; -+ break; -+ case V4L2_CID_GAIN: -+ vc->value = lvc->current_value; -+ break; -+ } -+ -+ return 0; -+} -+ -+/** -+ * mt9p031_v4l2_queryctrl - V4L2 sensor interface handler for VIDIOC_QUERYCTRL ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @qc: standard V4L2 VIDIOC_QUERYCTRL ioctl structure -+ * -+ * If the requested control is supported, returns the control information -+ * from the video_control[] array. Otherwise, returns -EINVAL if the -+ * control is not supported. -+ */ -+static int mt9p031_v4l2_queryctrl(struct v4l2_int_device *s, struct v4l2_queryctrl *qc) -+{ -+ int i; -+ -+ i = find_vctrl(qc->id); -+ if (i == -EINVAL) -+ qc->flags = V4L2_CTRL_FLAG_DISABLED; -+ -+ if (i < 0) -+ return -EINVAL; -+ -+ *qc = mt9p031_video_control[i].qc; -+ return 0; -+} -+ -+ -+/** -+ * mt9p031_v4l2_int_enum_fmt_cap - Implement the CAPTURE buffer VIDIOC_ENUM_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @fmt: standard V4L2 VIDIOC_ENUM_FMT ioctl structure -+ * -+ * Implement the VIDIOC_ENUM_FMT ioctl for the CAPTURE buffer type. -+ */ -+static int mt9p031_v4l2_int_enum_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_fmtdesc *fmt) -+{ -+ int index = fmt->index; -+ enum v4l2_buf_type type = fmt->type; -+ -+ memset(fmt, 0, sizeof(*fmt)); -+ fmt->index = index; -+ fmt->type = type; -+ -+ switch (fmt->type) { -+ case V4L2_BUF_TYPE_VIDEO_CAPTURE: -+ if (index >= ARRAY_SIZE(mt9p031_formats)) -+ return -EINVAL; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ strlcpy(fmt->description, mt9p031_formats[index].description, -+ sizeof(fmt->description)); -+ fmt->pixelformat = mt9p031_formats[index].pixelformat; -+ -+ return 0; -+} -+ -+/** -+ * mt9p031_v4l2_int_try_fmt_cap - Implement the CAPTURE buffer VIDIOC_TRY_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure -+ * -+ * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This -+ * ioctl is used to negotiate the image capture size and pixel format -+ * without actually making it take effect. -+ */ -+static int mt9p031_v4l2_int_try_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) -+{ -+ enum mt9p031_image_size isize; -+ int ifmt; -+ struct v4l2_pix_format *pix = &f->fmt.pix; -+ struct mt9p031_priv *priv = s->priv; -+ struct v4l2_pix_format *pix2 = &priv->pix; -+ -+ isize = mt9p031_calc_size(pix->width, pix->height); -+ mt9p031_current_format = isize; -+ -+ pix->width = mt9p031_sizes[isize].width; -+ pix->height = mt9p031_sizes[isize].height; -+ for (ifmt = 0; ifmt < mt9p031_num_formats; ifmt++) { -+ if (pix->pixelformat == mt9p031_formats[ifmt].pixelformat) -+ break; -+ } -+ if (ifmt == mt9p031_num_formats) -+ ifmt = 0; -+ pix->pixelformat = mt9p031_formats[ifmt].pixelformat; -+ pix->field = V4L2_FIELD_NONE; -+ pix->bytesperline = pix->width * 2; -+ pix->sizeimage = pix->bytesperline * pix->height; -+ pix->priv = 0; -+ pix->colorspace = V4L2_COLORSPACE_SRGB; -+ -+ *pix2 = *pix; -+ -+ return 0; -+} -+ -+/** -+ * mt9p031_v4l2_int_s_fmt_cap - V4L2 sensor interface handler for VIDIOC_S_FMT ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure -+ * -+ * If the requested format is supported, configures the HW to use that -+ * format, returns error code if format not supported or HW can't be -+ * correctly configured. -+ */ -+static int mt9p031_v4l2_int_s_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) -+{ -+ struct mt9p031_priv *priv = s->priv; -+ struct v4l2_pix_format *pix = &f->fmt.pix; -+ int rval; -+ -+ rval = mt9p031_v4l2_int_try_fmt_cap(s, f); -+ if (!rval) -+ priv->pix = *pix; -+ -+ return rval; -+} -+ -+/** -+ * mt9p031_v4l2_int_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap -+ * @s: pointer to standard V4L2 device structure -+ * @f: pointer to standard V4L2 v4l2_format structure -+ * -+ * Returns the sensor's current pixel format in the v4l2_format -+ * parameter. -+ */ -+static int mt9p031_v4l2_int_g_fmt_cap(struct v4l2_int_device *s, -+ struct v4l2_format *f) -+{ -+ struct mt9p031_priv *priv = s->priv; -+ -+ f->fmt.pix.width = priv->pix.width; -+ f->fmt.pix.height = priv->pix.height; -+ f->fmt.pix.pixelformat = V4L2_COLORSPACE_SRGB; -+ f->fmt.pix.pixelformat = priv->pix.pixelformat; -+ f->fmt.pix.field = V4L2_FIELD_NONE; -+ -+ return 0; -+} -+ -+/** -+ * mt9p031_v4l2_int_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure -+ * -+ * Configures the sensor to use the input parameters, if possible. If -+ * not possible, reverts to the old parameters and returns the -+ * appropriate error code. -+ */ -+ -+ -+static int mt9p031_v4l2_int_s_parm(struct v4l2_int_device *s, -+ struct v4l2_streamparm *a) -+{ -+ struct mt9p031_priv *priv = s->priv; -+ struct i2c_client *client = priv->client; -+ struct v4l2_fract *timeperframe = &a->parm.capture.timeperframe; -+ -+ priv->timeperframe = *timeperframe; -+ priv->xclk_current = mt9p031_calc_xclk(client); -+ *timeperframe = priv->timeperframe; -+ -+ return 0; -+} -+ -+/** -+ * mt9p031_v4l2_int_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl -+ * @s: pointer to standard V4L2 device structure -+ * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure -+ * -+ * Returns the sensor's video CAPTURE parameters. -+ */ -+static int mt9p031_v4l2_int_g_parm(struct v4l2_int_device *s, -+ struct v4l2_streamparm *a) -+{ -+ struct mt9p031_priv *priv = s->priv; -+ struct v4l2_captureparm *cparm = &a->parm.capture; -+ -+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; -+ -+ memset(a, 0, sizeof(*a)); -+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ -+ cparm->capability = V4L2_CAP_TIMEPERFRAME; -+ cparm->timeperframe.numerator = 1; -+ cparm->timeperframe = priv->timeperframe; -+ -+ return 0; -+} -+ -+/** -+ * mt9p031_v4l2_int_g_priv - V4L2 sensor interface handler for vidioc_int_g_priv_num -+ * @s: pointer to standard V4L2 device structure -+ * @p: void pointer to hold sensor's private data address -+ * -+ * Returns device's (sensor's) private data area address in p parameter -+ */ -+static int mt9p031_v4l2_int_g_priv(struct v4l2_int_device *s, void *p) -+{ -+ struct mt9p031_priv *priv = s->priv; -+ -+ return priv->pdata->priv_data_set(p); -+} -+ -+/** -+ * mt9p031_v4l2_int_g_ifparm - V4L2 sensor interface handler for vidioc_int_g_priv_num -+ * @s: pointer to standard V4L2 device structure -+ * @p: void pointer to hold sensor's ifparm -+ * -+ * Returns device's (sensor's) ifparm in p parameter -+ */ -+static int mt9p031_v4l2_int_g_ifparm(struct v4l2_int_device *s, -+ struct v4l2_ifparm *p) -+{ -+ struct mt9p031_priv *priv = s->priv; -+ int rval; -+ -+ if (p == NULL) -+ return -EINVAL; -+ -+ if (!priv->pdata->ifparm) -+ return -EINVAL; -+ -+ rval = priv->pdata->ifparm(p); -+ if (rval) { -+ v4l_err(priv->client, "g_ifparm.Err[%d]\n", rval); -+ return rval; -+ } -+ -+ return 0; -+} -+ -+/** -+ * mt9p031_v4l2_int_enum_framesizes - V4L2 sensor if handler for vidioc_int_enum_framesizes -+ * @s: pointer to standard V4L2 device structure -+ * @frms: pointer to standard V4L2 framesizes enumeration structure -+ * -+ * Returns possible framesizes depending on choosen pixel format -+ */ -+static int mt9p031_v4l2_int_enum_framesizes(struct v4l2_int_device *s, -+ struct v4l2_frmsizeenum *frms) -+{ -+ int ifmt; -+ -+ for (ifmt = 0; ifmt < ARRAY_SIZE(mt9p031_formats); ifmt++) -+ if (mt9p031_formats[ifmt].pixelformat == frms->pixel_format) -+ break; -+ -+ if (ifmt == ARRAY_SIZE(mt9p031_formats)) -+ return -EINVAL; -+ -+ /* Do we already reached all discrete framesizes? */ -+ if (frms->index >= ARRAY_SIZE(mt9p031_sizes)) -+ return -EINVAL; -+ -+ frms->type = V4L2_FRMSIZE_TYPE_DISCRETE; -+ frms->discrete.width = mt9p031_sizes[frms->index].width; -+ frms->discrete.height = mt9p031_sizes[frms->index].height; -+ -+ return 0; -+} -+ -+static int mt9p031_v4l2_int_enum_frameintervals(struct v4l2_int_device *s, -+ struct v4l2_frmivalenum *frmi) -+{ -+ int ifmt; -+ int max_size; -+ -+ for (ifmt = 0; ifmt < ARRAY_SIZE(mt9p031_formats); ifmt++) -+ if (mt9p031_formats[ifmt].pixelformat == frmi->pixel_format) -+ break; -+ -+ if (ifmt == ARRAY_SIZE(mt9p031_formats)) -+ return -EINVAL; -+ -+ max_size = ARRAY_SIZE(mt9p031_sizes); -+ -+ for(ifmt = 0; ifmt < max_size; ifmt++) { -+ if(frmi->width <= mt9p031_sizes[ifmt].width) { -+ frmi->type = V4L2_FRMSIZE_TYPE_DISCRETE; -+ frmi->discrete.numerator = -+ mt9p031_frameintervals[frmi->index].numerator; -+ frmi->discrete.denominator = -+ mt9p031_frameintervals[frmi->index].denominator; -+ -+ if(frmi->discrete.denominator <= mt9p031_frameintervals[max_size - ifmt - 1].denominator) -+ return 0; -+ else -+ return -EINVAL; -+ } -+ } -+ -+ return 0; -+} -+ -+static struct v4l2_int_ioctl_desc mt9p031_ioctl_desc[] = { -+ { .num = vidioc_int_enum_framesizes_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_enum_framesizes }, -+ { .num = vidioc_int_enum_frameintervals_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_enum_frameintervals }, -+ { .num = vidioc_int_s_power_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_s_power }, -+ { .num = vidioc_int_g_priv_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_g_priv }, -+ { .num = vidioc_int_g_ifparm_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_g_ifparm }, -+ { .num = vidioc_int_enum_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_enum_fmt_cap }, -+ { .num = vidioc_int_try_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_try_fmt_cap }, -+ { .num = vidioc_int_g_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_g_fmt_cap }, -+ { .num = vidioc_int_s_fmt_cap_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_s_fmt_cap }, -+ { .num = vidioc_int_g_parm_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_g_parm }, -+ { .num = vidioc_int_s_parm_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_int_s_parm }, -+ { .num = vidioc_int_g_ctrl_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_g_ctrl }, -+ { .num = vidioc_int_s_ctrl_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_s_ctrl }, -+ { .num = vidioc_int_queryctrl_num, -+ .func = (v4l2_int_ioctl_func *)mt9p031_v4l2_queryctrl }, -+}; -+ -+#ifdef MT9P031_DEBUG -+/** -+ * --------------------------------------------------------------------------------- -+ * Sysfs -+ * --------------------------------------------------------------------------------- -+ */ -+ -+/* Basic register read write support */ -+static u16 mt9p031_attr_basic_addr = 0x0000; -+ -+static ssize_t -+mt9p031_basic_reg_addr_show( struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ return sprintf(buf, "0x%x\n", mt9p031_attr_basic_addr); -+} -+ -+static ssize_t -+mt9p031_basic_reg_addr_store( struct device *dev, struct device_attribute *attr, const char *buf, size_t n) -+{ -+ u16 val; -+ sscanf(buf, "%hx", &val); -+ mt9p031_attr_basic_addr = (u16) val; -+ return n; -+} -+ -+static DEVICE_ATTR( basic_reg_addr, S_IRUGO|S_IWUSR, mt9p031_basic_reg_addr_show, mt9p031_basic_reg_addr_store); -+ -+ -+static ssize_t -+mt9p031_basic_reg_val_show( struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ u16 val; -+ int ret; -+ ret = mt9p031_reg_read(sysPriv.client, mt9p031_attr_basic_addr, &val); -+ if(ret < 0){ -+ printk(KERN_INFO "mt9p031: Basic register read failed"); -+ return 1; // nothing processed -+ } else { -+ return sprintf(buf, "0x%x\n", val); -+ } -+} -+ -+static ssize_t -+mt9p031_basic_reg_val_store( struct device *dev, struct device_attribute *attr, const char *buf, size_t n) -+{ -+ u32 val; -+ sscanf(buf, "%x", &val); -+ -+ if (mt9p031_reg_write(sysPriv.client, mt9p031_attr_basic_addr, (u16)val)) { -+ printk(KERN_INFO "mt9p031: Basic regiser write failed"); -+ return n; // nothing processed -+ } else { -+ return n; -+ } -+} -+static DEVICE_ATTR( basic_reg_val, S_IRUGO|S_IWUSR, mt9p031_basic_reg_val_show, mt9p031_basic_reg_val_store); -+ -+ -+/* Exposure time access support */ -+static ssize_t -+mt9p031_exposure_val_show( struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ u32 val; -+ struct vcontrol *lvc; -+ int i = find_vctrl(V4L2_CID_EXPOSURE); -+ if (i < 0) -+ return -EINVAL; -+ lvc = &mt9p031_video_control[i]; -+ val = lvc->current_value; -+ -+ if(val < 0){ -+ printk(KERN_INFO "mt9p031: Exposure value read failed"); -+ return 1; // nothing processed -+ } else { -+ return sprintf(buf, "%d\n", val); -+ } -+} -+ -+ -+static ssize_t -+mt9p031_exposure_val_store( struct device *dev, struct device_attribute *attr, const char *buf, size_t n) -+{ -+ u32 val; -+ struct i2c_client *client; -+ struct vcontrol *lvc; -+ -+ sscanf(buf, "%d", &val); -+ client = sysPriv.client; -+ -+ lvc = &mt9p031_video_control[V4L2_CID_EXPOSURE]; -+ -+ if (mt9p031_set_exposure_time((u32)val, client, lvc)) { -+ printk(KERN_INFO "mt9p031: Exposure write failed"); -+ return n; // nothing processed -+ } else { -+ return n; -+ } -+} -+ -+static DEVICE_ATTR( exposure_val, S_IRUGO|S_IWUSR, mt9p031_exposure_val_show, mt9p031_exposure_val_store); -+ -+ -+/* Global Gain access support */ -+static ssize_t -+mt9p031_gain_val_show( struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ u16 val; -+ struct vcontrol *lvc; -+ -+ int i = find_vctrl(V4L2_CID_GAIN); -+ if (i < 0) -+ return -EINVAL; -+ lvc = &mt9p031_video_control[i]; -+ val = lvc->current_value; -+ -+ if(val < 0){ -+ printk(KERN_INFO "mt9p031: Global Gain value read failed"); -+ return 1; // nothing processed -+ } else { -+ return sprintf(buf, "%d\n", val); -+ } -+} -+ -+static ssize_t -+mt9p031_gain_val_store( struct device *dev, struct device_attribute *attr, const char *buf, size_t n) -+{ -+ u16 val; -+ struct i2c_client *client; -+ struct vcontrol *lvc; -+ -+ sscanf(buf, "%hd", &val); -+ client = sysPriv.client; -+ -+ lvc = &mt9p031_video_control[V4L2_CID_GAIN]; -+ -+ if (mt9p031_set_gain(val, client, lvc)) { -+ printk(KERN_INFO "mt9p031: Global gain write failed"); -+ return n; // nothing processed -+ } else { -+ return n; -+ } -+} -+ -+static DEVICE_ATTR( gain_val, S_IRUGO|S_IWUSR, mt9p031_gain_val_show, mt9p031_gain_val_store); -+ -+ -+static struct attribute *mt9p031_sysfs_attr[] = { -+ &dev_attr_basic_reg_addr.attr, -+ &dev_attr_basic_reg_val.attr, -+ &dev_attr_exposure_val.attr, -+ &dev_attr_gain_val.attr, -+}; -+ -+static int mt9p031_sysfs_add(struct kobject *kobj) -+{ -+ int i = ARRAY_SIZE(mt9p031_sysfs_attr); -+ int rval = 0; -+ -+ do { -+ rval = sysfs_create_file(kobj, mt9p031_sysfs_attr[--i]); -+ } while((i > 0) && (rval == 0)); -+ return rval; -+} -+ -+static int mt9p031_sysfs_rm(struct kobject *kobj) -+{ -+ int i = ARRAY_SIZE(mt9p031_sysfs_attr); -+ int rval = 0; -+ -+ do { -+ sysfs_remove_file(kobj, mt9p031_sysfs_attr[--i]); -+ } while(i > 0); -+ return rval; -+} -+#endif //MT9P031_DEBUG -+ -+static struct v4l2_int_slave mt9p031_slave = { -+ .ioctls = mt9p031_ioctl_desc, -+ .num_ioctls = ARRAY_SIZE(mt9p031_ioctl_desc), -+}; -+ -+static int mt9p031_probe(struct i2c_client *client, -+ const struct i2c_device_id *did) -+{ -+ struct mt9p031_priv *priv; -+ struct v4l2_int_device *v4l2_int_device; -+ int ret; -+ if (!client->dev.platform_data) { -+ dev_err(&client->dev, "no platform data?\n"); -+ return -ENODEV; -+ } -+ -+ priv = kzalloc(sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ v4l2_int_device = kzalloc(sizeof(*v4l2_int_device), GFP_KERNEL); -+ if (!v4l2_int_device) { -+ kfree(priv); -+ return -ENOMEM; -+ } -+ -+#ifdef MT9P031_HEADBOARD -+ mt9p031_config_PCA9543A(client); //configure i2c level shifter on mt9p031 head-board, no need for Leopard module -+ mdelay(10); -+#endif //MT9P031_HEADBOARD -+ -+ v4l2_int_device->module = THIS_MODULE; -+ strncpy(v4l2_int_device->name, "mt9p031", sizeof(v4l2_int_device->name)); -+ -+ v4l2_int_device->type = v4l2_int_type_slave; -+ v4l2_int_device->u.slave = &mt9p031_slave; -+ -+ v4l2_int_device->priv = priv; -+ -+ priv->v4l2_int_device = v4l2_int_device; -+ priv->client = client; -+ priv->pdata = client->dev.platform_data; -+ -+ priv->pdata->flags = MT9P031_FLAG_PCLK_RISING_EDGE; -+ -+ /* Setting Pixel Values */ -+ priv->pix.width = mt9p031_sizes[0].width; -+ priv->pix.height = mt9p031_sizes[0].height; -+ priv->pix.pixelformat = mt9p031_formats[0].pixelformat; -+ -+ i2c_set_clientdata(client, priv); -+ -+ sysPriv.client = priv->client; -+ -+ ret = v4l2_int_device_register(priv->v4l2_int_device); -+ if (ret) { -+ i2c_set_clientdata(client, NULL); -+ kfree(v4l2_int_device); -+ kfree(priv); -+ } -+ -+#ifdef MT9P031_DEBUG -+ mt9p031_sysfs_add(&client->dev.kobj); -+#endif //MT9P031_DEBUG -+ return ret; -+} -+ -+static int mt9p031_remove(struct i2c_client *client) -+{ -+ struct mt9p031_priv *priv = i2c_get_clientdata(client); -+ -+ v4l2_int_device_unregister(priv->v4l2_int_device); -+ i2c_set_clientdata(client, NULL); -+ mt9p031_sysfs_rm(&client->dev.kobj); -+ -+ kfree(priv->v4l2_int_device); -+ kfree(priv); -+ return 0; -+} -+ -+static const struct i2c_device_id mt9p031_id[] = { -+ { "mt9p031", 0 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, mt9p031_id); -+ -+static struct i2c_driver mt9p031_i2c_driver = { -+ .driver = { -+ .name = "mt9p031", -+ }, -+ .probe = mt9p031_probe, -+ .remove = mt9p031_remove, -+ .id_table = mt9p031_id, -+}; -+ -+/************************************************************************ -+ module function -+************************************************************************/ -+static int __init mt9p031_module_init(void) -+{ -+ return i2c_add_driver(&mt9p031_i2c_driver); -+} -+ -+static void __exit mt9p031_module_exit(void) -+{ -+ i2c_del_driver(&mt9p031_i2c_driver); -+} -+ -+module_init(mt9p031_module_init); -+module_exit(mt9p031_module_exit); -+ -+MODULE_DESCRIPTION("mt9p031 sensor driver"); -+MODULE_AUTHOR("Aptina"); -+MODULE_LICENSE("GPL v2"); -+ -diff --git a/include/media/mt9p031.h b/include/media/mt9p031.h -new file mode 100644 -index 0000000..d119589 ---- /dev/null -+++ b/include/media/mt9p031.h -@@ -0,0 +1,30 @@ -+/* mt9p031 Camera -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef __MT9P031_H__ -+#define __MT9P031_H__ -+ -+#include <media/v4l2-int-device.h> -+ -+#define MT9P031_I2C_ADDR 0x48 //(0x90 >> 1) -+ -+#define MT9P031_CLK_MAX (27000000) /* 27MHz */ -+#define MT9P031_CLK_MIN (6000000) /* 6Mhz */ -+ -+#define MT9P031_FLAG_PCLK_RISING_EDGE (1 << 0) -+#define MT9P031_FLAG_DATAWIDTH_8 (1 << 1) /* default width is 10 */ -+ -+struct mt9p031_platform_data { -+ char *master; -+ int (*power_set) (struct v4l2_int_device *s, enum v4l2_power on); -+ int (*ifparm) (struct v4l2_ifparm *p); -+ int (*priv_data_set) (void *); -+ u32 (*set_xclk) (struct v4l2_int_device *s, u32 xclkfreq); -+ u32 flags; -+}; -+ -+#endif /* __MT9P031_H__ */ -diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h -index 6cc107d..7599bf1 100644 ---- a/include/media/v4l2-chip-ident.h -+++ b/include/media/v4l2-chip-ident.h -@@ -271,6 +271,7 @@ enum { - V4L2_IDENT_MT9T112 = 45022, - V4L2_IDENT_MT9V111 = 45031, - V4L2_IDENT_MT9V112 = 45032, -+ V4L2_IDENT_MT9P031 = 6145, - - /* HV7131R CMOS sensor: just ident 46000 */ - V4L2_IDENT_HV7131R = 46000, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/5m03/0002-board-omap3beagle-import-li5m03-driver-from-https-gi.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/5m03/0002-board-omap3beagle-import-li5m03-driver-from-https-gi.patch deleted file mode 100644 index 2b45f19..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/5m03/0002-board-omap3beagle-import-li5m03-driver-from-https-gi.patch +++ /dev/null @@ -1,294 +0,0 @@ -From 675ad06f53fbb0c7f398aaff8c3508196dfeb9bc Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Sun, 1 May 2011 16:41:57 +0200 -Subject: [PATCH 2/2] board-omap3beagle: import li5m03 driver from https://github.com/Aptina/BeagleBoard-xM/tree/master/Angstrom/MT9P031 - -Properly hook it into the board file and some more updates - -Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> ---- - arch/arm/mach-omap2/board-omap3beagle-camera.c | 186 +++++++++++++++++++++++- - arch/arm/mach-omap2/board-omap3beagle.c | 20 +++ - 2 files changed, 198 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c -index 110c2c9..97f0e7a 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle-camera.c -+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c -@@ -160,6 +160,8 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - case V4L2_POWER_ON: - - isp_configure_interface(vdev->cam->isp, &mt9v113_if_config); -+ /* Set RESET_BAR to 0 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 0); - - /* turn on VDD */ - regulator_enable(cam_1v8_reg); -@@ -168,9 +170,6 @@ static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power) - regulator_enable(cam_2v8_reg); - mdelay(50); - -- /* Set RESET_BAR to 0 */ -- gpio_set_value(LEOPARD_RESET_GPIO, 0); -- - /* Enable EXTCLK */ - isp_set_xclk(vdev->cam->isp, MT9V113_CLK_MIN*2, CAM_USE_XCLKA); - /* -@@ -294,7 +293,7 @@ static int mt9t112_set_prv_data(void *priv) - } - - /** -- * @brief mt9t112_power_set - Power-on or power-off TVP5146 device -+ * @brief mt9t112_power_set - Power-on or power-off MT9T112 device - * - * @param power - enum, Power on/off, resume/standby - * -@@ -320,6 +319,8 @@ static int mt9t112_power_set(struct v4l2_int_device *s, enum v4l2_power power) - isp_configure_interface(vdev->cam->isp, &mt9t112_if_config); - #endif - -+ /* Set RESET_BAR to 0 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 0); - - /* turn on VDD */ - regulator_enable(cam_1v8_reg); -@@ -331,11 +332,8 @@ static int mt9t112_power_set(struct v4l2_int_device *s, enum v4l2_power power) - - mdelay(50); - -- /* Set RESET_BAR to 0 */ -- gpio_set_value(LEOPARD_RESET_GPIO, 0); -- - /* Enable EXTCLK */ -- isp_set_xclk(vdev->cam->isp, 24000000, CAM_USE_XCLKA); -+ isp_set_xclk(vdev->cam->isp, 12000000, CAM_USE_XCLKA); - - /* - * Wait at least 70 CLK cycles (w/EXTCLK = 24MHz): -@@ -372,6 +370,178 @@ struct mt9t112_platform_data mt9t112_pdata = { - - #endif /* #ifdef CONFIG_VIDEO_MT9T112 */ - -+#if defined(CONFIG_SOC_CAMERA_MT9P031) || defined(CONFIG_SOC_CAMERA_MT9P031_MODULE) -+#include <media/mt9p031.h> -+ -+#define ISP_MT9P031_MCLK 216000000 -+ -+/* Arbitrary memory handling limit */ -+#define MT9P031_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN((2592 * 1944) * 2 * 4 ) -+ -+static struct isp_interface_config mt9p031_if_config = { -+ .ccdc_par_ser = ISP_PARLL, -+ .dataline_shift = 0x1, -+ .hsvs_syncdetect = ISPCTRL_SYNC_DETECT_VSRISE, -+ .strobe = 0x0, -+ .prestrobe = 0x0, -+ .shutter = 0x0, -+ .cam_mclk = ISP_MT9P031_MCLK, -+ .wenlog = ISPCCDC_CFG_WENLOG_AND, -+ .wait_hs_vs = 2, -+ .u.par.par_bridge = 0x0, -+ .u.par.par_clk_pol = 0x0, -+}; -+ -+static struct v4l2_ifparm mt9p031_ifparm_s = { -+ .if_type = V4L2_IF_TYPE_RAW, -+ .u = { -+ .raw = { -+ .frame_start_on_rising_vs = 1, -+ .bt_sync_correct = 0, -+ .swap = 0, -+ .latch_clk_inv = 0, -+ .nobt_hs_inv = 0, /* active high */ -+ .nobt_vs_inv = 0, /* active high */ -+ .clock_min = MT9P031_CLK_MIN, -+ .clock_max = MT9P031_CLK_MAX, -+ }, -+ }, -+}; -+ -+/** -+ * @brief mt9p031_ifparm - Returns the mt9p031 interface parameters -+ * -+ * @param p - pointer to v4l2_ifparm structure -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9p031_ifparm(struct v4l2_ifparm *p) -+{ -+ if (p == NULL) -+ return -EINVAL; -+ -+ *p = mt9p031_ifparm_s; -+ return 0; -+} -+ -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+static struct omap34xxcam_hw_config mt9p031_hwc = { -+ .dev_index = 1, -+ .dev_minor = -1, -+ .dev_type = OMAP34XXCAM_SLAVE_SENSOR, -+ .u.sensor.sensor_isp = 0, -+ .u.sensor.capture_mem = MT9P031_BIGGEST_FRAME_BYTE_SIZE, -+ .u.sensor.ival_default = { 1, 30 }, -+}; -+#endif -+ -+/** -+ * @brief mt9p031_set_prv_data - Returns mt9p031 omap34xx driver private data -+ * -+ * @param priv - pointer to omap34xxcam_hw_config structure -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9p031_set_prv_data(void *priv) -+{ -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+ struct omap34xxcam_hw_config *hwc = priv; -+ -+ if (priv == NULL) -+ return -EINVAL; -+ -+ *hwc = mt9p031_hwc; -+ return 0; -+#else -+ return -EINVAL; -+#endif -+} -+ -+/** -+ * @brief mt9p031_power_set - Power-on or power-off mt9p031 device -+ * -+ * @param power - enum, Power on/off, resume/standby -+ * -+ * @return result of operation - 0 is success -+ */ -+static int mt9p031_power_set(struct v4l2_int_device *s, enum v4l2_power power) -+{ -+ struct omap34xxcam_videodev *vdev = s->u.slave->master->priv; -+ switch (power) { -+ case V4L2_POWER_OFF: -+ case V4L2_POWER_STANDBY: -+ isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA); -+ -+ if (regulator_is_enabled(cam_1v8_reg)) -+ regulator_disable(cam_1v8_reg); -+ if (regulator_is_enabled(cam_2v8_reg)) -+ regulator_disable(cam_2v8_reg); -+ break; -+ -+ case V4L2_POWER_ON: -+#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) -+ isp_configure_interface(vdev->cam->isp, &mt9p031_if_config); -+#endif -+ -+ /* Set RESET_BAR to 0 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 0); -+ -+ /* turn on VDD */ -+ regulator_enable(cam_1v8_reg); -+ -+ mdelay(1); -+ -+ /* turn on VDD_IO */ -+ regulator_enable(cam_2v8_reg); -+ -+ mdelay(50); -+ -+ /* Enable EXTCLK */ -+ isp_set_xclk(vdev->cam->isp, 24000000, CAM_USE_XCLKA); //works for 36MHz too; try at lower freq -+ -+ /* -+ * Wait at least 70 CLK cycles (w/EXTCLK = 24MHz): -+ * ((1000000 * 70) / 24000000) = aprox 2.91 us. -+ */ -+ -+ udelay(3); -+ -+ /* Set RESET_BAR to 1 */ -+ gpio_set_value(LEOPARD_RESET_GPIO, 1); -+ -+ /* -+ * Wait at least 100 CLK cycles (w/EXTCLK = 24MHz): -+ * ((1000000 * 100) / 24000000) = aprox 4.16 us. -+ */ -+ -+ udelay(5); -+ -+ break; -+ -+ default: -+ return -ENODEV; -+ break; -+ } -+ return 0; -+} -+ -+static u32 mt9p031_set_xclk(struct v4l2_int_device *s, u32 xclkfreq) -+{ -+ struct omap34xxcam_videodev *vdev = s->u.slave->master->priv; -+ return isp_set_xclk(vdev->cam->isp, xclkfreq, 0); -+} -+ -+ -+struct mt9p031_platform_data mt9p031_pdata = { -+ .master = "omap34xxcam", -+ .power_set = mt9p031_power_set, -+ .set_xclk = mt9p031_set_xclk, -+ .priv_data_set = mt9p031_set_prv_data, -+ .ifparm = mt9p031_ifparm, -+}; -+ -+#endif /* #ifdef CONFIG_SOC_CAMERA_MT9P031 */ -+ - static int beagle_cam_probe(struct platform_device *pdev) - { - cam_1v8_reg = regulator_get(&pdev->dev, "cam_1v8"); -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 2677b41..e561431 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -83,6 +83,12 @@ extern struct mt9v113_platform_data mt9v113_pdata; - extern struct mt9t112_platform_data mt9t112_pdata; - #endif - -+#if defined(CONFIG_SOC_CAMERA_MT9P031) || defined(CONFIG_SOC_CAMERA_MT9P031_MODULE) -+#include <media/v4l2-int-device.h> -+#include <media/mt9p031.h> -+extern struct mt9p031_platform_data mt9p031_pdata; -+#endif -+ - #define GPMC_CS0_BASE 0x60 - #define GPMC_CS_SIZE 0x30 - -@@ -614,6 +620,15 @@ static struct i2c_board_info __initdata beagle_lbcm3m1_i2c2_boardinfo[] = { - #endif - }; - -+static struct i2c_board_info __initdata beagle_lbcm5m03_i2c2_boardinfo[] = { -+#if defined(CONFIG_SOC_CAMERA_MT9P031) || defined(CONFIG_SOC_CAMERA_MT9P031_MODULE) -+ { -+ I2C_BOARD_INFO("mt9p031", MT9P031_I2C_ADDR), -+ .platform_data = &mt9p031_pdata, -+ }, -+#endif -+}; -+ - static int __init omap3_beagle_i2c_init(void) - { - omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo, -@@ -636,6 +651,11 @@ static int __init omap3_beagle_i2c_init(void) - " registering i2c2 bus for lbcm3m1\n"); - omap_register_i2c_bus(2, 400, beagle_lbcm3m1_i2c2_boardinfo, - ARRAY_SIZE(beagle_lbcm3m1_i2c2_boardinfo)); -+ } else if (!strcmp(cameraboard_name, "lbcm5m03")) { -+ printk(KERN_INFO "Beagle cameraboard:" -+ " registering i2c2 bus for lbcm5m03\n"); -+ omap_register_i2c_bus(2, 400, beagle_lbcm5m03_i2c2_boardinfo, -+ ARRAY_SIZE(beagle_lbcm5m03_i2c2_boardinfo)); - } else { - omap_register_i2c_bus(2, 400, NULL, 0); - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/dm37x-evm/defconfig b/recipes-kernel/linux/linux-omap-psp-2.6.32/dm37x-evm/defconfig deleted file mode 100644 index 8f1868d..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/dm37x-evm/defconfig +++ /dev/null @@ -1,2024 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Fri Jul 9 10:08:46 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_OPROFILE_ARMV7=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_COMPAT_BRK=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=m -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX=y -# CONFIG_OMAP_MUX_DEBUG is not set -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_MCBSP=y -# CONFIG_OMAP_MBOX_FWK is not set -CONFIG_OMAP_IOMMU=y -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_DEBOBS is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -CONFIG_OMAP_LL_DEBUG_UART1=y -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -# CONFIG_OMAP_LL_DEBUG_UART3 is not set -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -CONFIG_OMAP_PM_NOOP=y -# CONFIG_OMAP_PM_SRF is not set -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -CONFIG_MACH_OMAP3EVM=y -CONFIG_PMIC_TWL4030=y -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -# CONFIG_USER_L2_PLE is not set -# CONFIG_USER_PMON is not set -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -# CONFIG_CPU_FREQ is not set -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_AMDSTD is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_OMAP_NOR is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -# CONFIG_MTD_NAND_OMAP_PREFETCH is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -# CONFIG_MTD_ONENAND_GENERIC is not set -CONFIG_MTD_ONENAND_OMAP2=y -# CONFIG_MTD_ONENAND_OTP is not set -# CONFIG_MTD_ONENAND_2X_PROGRAM is not set -# CONFIG_MTD_ONENAND_SIM is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_TI_DAVINCI_EMAC is not set -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -CONFIG_SMSC911X=y -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -CONFIG_USB_USBNET=y -# CONFIG_USB_NET_AX8817X is not set -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -# CONFIG_USB_NET_SMSC95XX is not set -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_MCS7830 is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_GPIO is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_XILINX is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -CONFIG_GPIO_TWL4030=y - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TWL4030_CORE=y -# CONFIG_TWL4030_POWER is not set -CONFIG_TWL4030_CODEC=y -# CONFIG_TWL4030_MADC is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=y - -# -# Multimedia drivers -# -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=y -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_MT9P012 is not set -# CONFIG_VIDEO_MT9T111 is not set -# CONFIG_VIDEO_DW9710 is not set -# CONFIG_VIDEO_OV3640 is not set -# CONFIG_VIDEO_IMX046 is not set -# CONFIG_VIDEO_LV8093 is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -CONFIG_TI_MEDIA=y -# CONFIG_VIDEO_VPSS_SYSTEM is not set -# CONFIG_VIDEO_VPFE_CAPTURE is not set -CONFIG_VIDEO_OMAP2_VOUT=y -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_ISP=y -# CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER is not set -CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=y -# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_IBMCAM is not set -# CONFIG_USB_KONICAWC is not set -# CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set -# CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_USB_OV511 is not set -# CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set -# CONFIG_USB_PWC is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=4 -# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=1 -CONFIG_FB_OMAP2=y -# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=1 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -# CONFIG_PANEL_TAAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE is not set -# CONFIG_LOGO is not set -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -# CONFIG_SND_USB_CAIAQ is not set -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OMAP3EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_TI_CPPI41_DMA is not set -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=y -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=y -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FILE_STORAGE is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -# CONFIG_TWL4030_USB is not set -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TWL4030=y -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -# CONFIG_EARLY_PRINTK is not set -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_HW=y -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0001-ARM-OMAP-add-spi-platform-devices.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0001-ARM-OMAP-add-spi-platform-devices.patch deleted file mode 100644 index 8988fd8..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0001-ARM-OMAP-add-spi-platform-devices.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 0031d3fb2d067f4c46e434f5f5c6c14cef2a83a3 Mon Sep 17 00:00:00 2001 -From: Tim Yamin <plasm@roo.me.uk> -Date: Sat, 11 Apr 2009 13:05:21 -0700 -Subject: [PATCH 01/17] ARM: OMAP: add spi platform devices - ---- - arch/arm/mach-omap2/devices.c | 32 ++++++++++++++++++++++++++++++++ - 1 files changed, 32 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c -index 18ad931..ae67ada 100644 ---- a/arch/arm/mach-omap2/devices.c -+++ b/arch/arm/mach-omap2/devices.c -@@ -15,6 +15,7 @@ - #include <linux/platform_device.h> - #include <linux/io.h> - #include <linux/clk.h> -+#include <linux/spi/spi_gpio.h> - - #include <mach/hardware.h> - #include <asm/mach-types.h> -@@ -373,6 +374,37 @@ static struct platform_device omap2_mcspi4 = { - .platform_data = &omap2_mcspi4_config, - }, - }; -+ -+static struct spi_gpio_platform_data spi3_gpio_platform_data = { -+ .miso = 132, -+ .mosi = 131, -+ .sck = 130, -+ .num_chipselect = 1, -+}; -+ -+static struct platform_device spi3_gpio = { -+ .name = "spi_gpio", -+ .id = 3, -+ .dev = { -+ .platform_data = &spi3_gpio_platform_data, -+ }, -+}; -+ -+static struct spi_gpio_platform_data spi4_gpio_platform_data = { -+ .miso = 159, -+ .mosi = 158, -+ .sck = 156, -+ .num_chipselect = 1, -+}; -+ -+static struct platform_device spi4_gpio = { -+ .name = "spi_gpio", -+ .id = 4, -+ .dev = { -+ .platform_data = &spi4_gpio_platform_data, -+ }, -+}; -+ - #endif - - #ifdef CONFIG_ARCH_OMAP4 --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0002-MMA7455L-accelerometer-driver.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0002-MMA7455L-accelerometer-driver.patch deleted file mode 100644 index f9c7702..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0002-MMA7455L-accelerometer-driver.patch +++ /dev/null @@ -1,683 +0,0 @@ -From 0c804b06c04a14da575d592c89408537c21fb26b Mon Sep 17 00:00:00 2001 -From: Tim Yamin <plasm@roo.me.uk> -Date: Tue, 23 Mar 2010 09:52:10 +0100 -Subject: [PATCH 02/17] MMA7455L accelerometer driver - ---- - drivers/input/misc/Kconfig | 9 + - drivers/input/misc/Makefile | 1 + - drivers/input/misc/mma7455l.c | 615 +++++++++++++++++++++++++++++++++++++++++ - include/linux/mma7455l.h | 11 + - 4 files changed, 636 insertions(+), 0 deletions(-) - create mode 100644 drivers/input/misc/mma7455l.c - create mode 100644 include/linux/mma7455l.h - -diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig -index 16ec523..d35ae19 100644 ---- a/drivers/input/misc/Kconfig -+++ b/drivers/input/misc/Kconfig -@@ -319,4 +319,13 @@ config INPUT_PCAP - To compile this driver as a module, choose M here: the - module will be called pcap_keys. - -+config INPUT_MMA7455L -+ tristate "Freescale MMA7455L 3-axis accelerometer" -+ depends on SPI_MASTER -+ help -+ SPI driver for the Freescale MMA7455L 3-axis accelerometer. -+ -+ The userspace interface is a 3-axis (X/Y/Z) relative movement -+ Linux input device, reporting REL_[XYZ] events. -+ - endif -diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile -index a8b8485..75b8baa 100644 ---- a/drivers/input/misc/Makefile -+++ b/drivers/input/misc/Makefile -@@ -30,4 +30,5 @@ obj-$(CONFIG_INPUT_WINBOND_CIR) += winbond-cir.o - obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o - obj-$(CONFIG_INPUT_WM831X_ON) += wm831x-on.o - obj-$(CONFIG_INPUT_YEALINK) += yealink.o -+obj-$(CONFIG_INPUT_MMA7455L) += mma7455l.o - -diff --git a/drivers/input/misc/mma7455l.c b/drivers/input/misc/mma7455l.c -new file mode 100644 -index 0000000..b907cc6 ---- /dev/null -+++ b/drivers/input/misc/mma7455l.c -@@ -0,0 +1,615 @@ -+/* Linux kernel driver for the Freescale MMA7455L 3-axis accelerometer -+ * -+ * Copyright (C) 2009 by Always Innovating, Inc. -+ * Author: Gregoire Gentil <gregoire@gentil.com> -+ * Author: Tim Yamin <plasm@roo.me.uk> -+ * All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+/* -+ * What this driver doesn't yet support: -+ * -+ * - I2C -+ * - INT2 handling -+ * - Pulse detection (and the sysctls to control it) -+ * - 10-bit measurement -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/types.h> -+#include <linux/module.h> -+#include <linux/device.h> -+#include <linux/platform_device.h> -+#include <linux/delay.h> -+#include <linux/input.h> -+#include <linux/irq.h> -+#include <linux/interrupt.h> -+#include <linux/sysfs.h> -+#include <linux/gpio.h> -+ -+#include <linux/mma7455l.h> -+#include <linux/spi/spi.h> -+ -+#define MMA7455L_WHOAMI_MAGIC 0x55 -+ -+enum mma7455l_reg { -+ MMA7455L_REG_XOUTL = 0x00, -+ MMA7455L_REG_XOUTH = 0x01, -+ MMA7455L_REG_YOUTL = 0x02, -+ MMA7455L_REG_YOUTH = 0x03, -+ MMA7455L_REG_ZOUTL = 0x04, -+ MMA7455L_REG_ZOUTH = 0x05, -+ MMA7455L_REG_XOUT8 = 0x06, -+ MMA7455L_REG_YOUT8 = 0x07, -+ MMA7455L_REG_ZOUT8 = 0x08, -+ MMA7455L_REG_STATUS = 0x09, -+ MMA7455L_REG_DETSRC = 0x0a, -+ MMA7455L_REG_TOUT = 0x0b, -+ MMA7455L_REG_RESERVED1 = 0x0c, -+ MMA7455L_REG_I2CAD = 0x0d, -+ MMA7455L_REG_USRINF = 0x0e, -+ MMA7455L_REG_WHOAMI = 0x0f, -+ MMA7455L_REG_XOFFL = 0x10, -+ MMA7455L_REG_XOFFH = 0x11, -+ MMA7455L_REG_YOFFL = 0x12, -+ MMA7455L_REG_YOFFH = 0x13, -+ MMA7455L_REG_ZOFFL = 0x14, -+ MMA7455L_REG_ZOFFH = 0x15, -+ MMA7455L_REG_MCTL = 0x16, -+ MMA7455L_REG_INTRST = 0x17, -+ MMA7455L_REG_CTL1 = 0x18, -+ MMA7455L_REG_CTL2 = 0x19, -+ MMA7455L_REG_LDTH = 0x1a, -+ MMA7455L_REG_PDTH = 0x1b, -+ MMA7455L_REG_PW = 0x1c, -+ MMA7455L_REG_LT = 0x1d, -+ MMA7455L_REG_TW = 0x1e, -+ MMA7455L_REG_RESERVED2 = 0x1f, -+}; -+ -+enum mma7455l_reg_status { -+ MMA7455L_STATUS_XDA = 0x08, -+ MMA7455L_STATUS_YDA = 0x10, -+ MMA7455L_STATUS_ZDA = 0x20, -+}; -+ -+enum mma7455l_mode { -+ MMA7455L_MODE_STANDBY = 0, -+ MMA7455L_MODE_MEASUREMENT = 1, -+ MMA7455L_MODE_LEVELDETECTION = 0x42, /* Set DRPD to on */ -+ MMA7455L_MODE_PULSEDETECTION = 0x43, /* Set DRPD to on */ -+ MMA7455L_MODE_MASK = 0x43, -+}; -+ -+enum mma7455l_gselect { -+ MMA7455L_GSELECT_8 = 0x0, -+ MMA7455L_GSELECT_2 = 0x4, -+ MMA7455L_GSELECT_4 = 0x8, -+ MMA7455L_GSELECT_MASK = 0xC, -+}; -+ -+/* FIXME */ -+#define MMA7455L_F_FS 0x0020 /* ADC full scale */ -+ -+struct mma7455l_info { -+ struct spi_device *spi_dev; -+ struct input_dev *input_dev; -+ struct mutex lock; -+ struct delayed_work work; -+ -+ u8 mode; -+ u8 gSelect; -+ -+ u8 flags; -+ u8 working; -+}; -+ -+/* lowlevel register access functions */ -+ -+#define WRITE_BIT (1 << 7) -+#define ADDR_SHIFT 1 -+ -+static inline u_int8_t __reg_read(struct mma7455l_info *mma, u_int8_t reg) -+{ -+ int rc; -+ u_int8_t cmd; -+ -+ cmd = ((reg & 0x3f) << ADDR_SHIFT); -+ rc = spi_w8r8(mma->spi_dev, cmd); -+ -+ return rc; -+} -+ -+static u_int8_t reg_read(struct mma7455l_info *mma, u_int8_t reg) -+{ -+ u_int8_t ret; -+ -+ mutex_lock(&mma->lock); -+ ret = __reg_read(mma, reg); -+ mutex_unlock(&mma->lock); -+ -+ return ret; -+} -+ -+static s16 __reg_read_10(struct mma7455l_info *mma, u8 reg1, u8 reg2) -+{ -+ u8 v1, v2; -+ -+ v1 = __reg_read(mma, reg1); -+ v2 = __reg_read(mma, reg2); -+ -+ return (v2 & 0x4) << 13 | (v2 & 0x3) << 8 | v1; -+} -+ -+static inline int __reg_write(struct mma7455l_info *mma, u_int8_t reg, u_int8_t val) -+{ -+ u_int8_t buf[2]; -+ -+ buf[0] = ((reg & 0x3f) << ADDR_SHIFT) | WRITE_BIT; -+ buf[1] = val; -+ -+ return spi_write(mma->spi_dev, buf, sizeof(buf)); -+} -+ -+static int reg_write(struct mma7455l_info *mma, u_int8_t reg, u_int8_t val) -+{ -+ int ret; -+ -+ mutex_lock(&mma->lock); -+ ret = __reg_write(mma, reg, val); -+ mutex_unlock(&mma->lock); -+ -+ return ret; -+} -+ -+static s16 __reg_write_10(struct mma7455l_info *mma, u8 reg1, u8 reg2, s16 value) -+{ -+ int ret; -+ u8 v1, v2; -+ -+ v1 = value & 0xFF; -+ if(value < 0) -+ v2 = ((value >> 8) & 0x3) | 0x4; -+ else -+ v2 = 0; -+ -+ ret = __reg_write(mma, reg1, v1); -+ ret = __reg_write(mma, reg2, v2); -+ return ret; -+} -+ -+static void mma7455l_work(struct work_struct *work) -+{ -+ struct mma7455l_info *mma = -+ container_of(work, struct mma7455l_info, work.work); -+ -+ s8 val; -+ mma->working = 1; -+ -+ /* FIXME: 10 bit accuracy? */ -+ if (!(mma->flags & MMA7455L_STATUS_XDA)) { -+ val = reg_read(mma, MMA7455L_REG_XOUT8); -+ input_report_abs(mma->input_dev, ABS_X, val); -+ } -+ if (!(mma->flags & MMA7455L_STATUS_YDA)) { -+ val = reg_read(mma, MMA7455L_REG_YOUT8); -+ input_report_abs(mma->input_dev, ABS_Y, val); -+ } -+ if (!(mma->flags & MMA7455L_STATUS_ZDA)) { -+ val = reg_read(mma, MMA7455L_REG_ZOUT8); -+ input_report_abs(mma->input_dev, ABS_Z, val); -+ } -+ -+ mma->working = 0; -+ input_sync(mma->input_dev); -+ put_device(&mma->spi_dev->dev); -+ -+ /* Enable IRQ and clear out interrupt */ -+ reg_write(mma, MMA7455L_REG_INTRST, 0x3); -+ reg_write(mma, MMA7455L_REG_INTRST, 0x0); -+ enable_irq(mma->spi_dev->irq); -+} -+ -+static void mma7455l_schedule_work(struct mma7455l_info *mma) -+{ -+ int status; -+ -+ get_device(&mma->spi_dev->dev); -+ status = schedule_delayed_work(&mma->work, HZ / 10); -+} -+ -+static irqreturn_t mma7455l_interrupt(int irq, void *_mma) -+{ -+ struct mma7455l_info *mma = _mma; -+ -+ /* Disable any further interrupts until we have processed -+ * the current one */ -+ disable_irq_nosync(mma->spi_dev->irq); -+ -+ mma7455l_schedule_work(mma); -+ return IRQ_HANDLED; -+} -+ -+/* sysfs */ -+ -+static void get_mode(struct mma7455l_info *mma, u8 *mode, u8 *gSelect) -+{ -+ u8 tmp = reg_read(mma, MMA7455L_REG_MCTL); -+ -+ *mode = tmp & MMA7455L_MODE_MASK; -+ *gSelect = tmp & MMA7455L_GSELECT_MASK; -+} -+ -+static void set_mode(struct mma7455l_info *mma, u8 mode, u8 gSelect) -+{ -+ reg_write(mma, MMA7455L_REG_MCTL, mode | gSelect); -+} -+ -+static void update_mode(struct mma7455l_info *mma, u8 mode, u8 gSelect) -+{ -+ mma->mode = mode; -+ mma->gSelect = gSelect; -+ -+ reg_write(mma, MMA7455L_REG_MCTL, mma->mode | mma->gSelect); -+} -+ -+static ssize_t show_measure(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ s8 x, y, z; -+ u8 old_Mode, old_gSelect; -+ -+ get_mode(mma, &old_Mode, &old_gSelect); -+ set_mode(mma, MMA7455L_MODE_MEASUREMENT, MMA7455L_GSELECT_2); -+ -+ while (reg_read(mma, MMA7455L_REG_STATUS) == 0) { -+ msleep(10); -+ } -+ -+ x = reg_read(mma, MMA7455L_REG_XOUT8); -+ y = reg_read(mma, MMA7455L_REG_YOUT8); -+ z = reg_read(mma, MMA7455L_REG_ZOUT8); -+ -+ set_mode(mma, old_Mode, old_gSelect); -+ return sprintf(buf, "%d %d %d\n", x, y, z); -+} -+ -+static ssize_t show_mode(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ -+ switch(mma->mode) -+ { -+ case MMA7455L_MODE_STANDBY: -+ return sprintf(buf, "Standby\n"); -+ break; -+ case MMA7455L_MODE_MEASUREMENT: -+ return sprintf(buf, "Measurement\n"); -+ break; -+ case MMA7455L_MODE_LEVELDETECTION: -+ return sprintf(buf, "Level Detection\n"); -+ break; -+ case MMA7455L_MODE_PULSEDETECTION: -+ return sprintf(buf, "Pulse Detection\n"); -+ break; -+ } -+ -+ return sprintf(buf, "Unknown mode!\n"); -+} -+ -+static ssize_t show_gSelect(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ -+ switch(mma->gSelect) -+ { -+ case MMA7455L_GSELECT_8: -+ return sprintf(buf, "8\n"); -+ break; -+ case MMA7455L_GSELECT_4: -+ return sprintf(buf, "4\n"); -+ break; -+ case MMA7455L_GSELECT_2: -+ return sprintf(buf, "2\n"); -+ break; -+ } -+ -+ return sprintf(buf, "Unknown gSelect!\n"); -+} -+ -+static ssize_t show_level_threshold(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ return sprintf(buf, "%u\n", reg_read(mma, MMA7455L_REG_LDTH)); -+} -+ -+static ssize_t show_calibration(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ s16 x, y, z; -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ -+ mutex_lock(&mma->lock); -+ x = __reg_read_10(mma, MMA7455L_REG_XOFFL, MMA7455L_REG_XOFFH); -+ y = __reg_read_10(mma, MMA7455L_REG_YOFFL, MMA7455L_REG_YOFFH); -+ z = __reg_read_10(mma, MMA7455L_REG_ZOFFL, MMA7455L_REG_ZOFFH); -+ mutex_unlock(&mma->lock); -+ -+ return sprintf(buf, "%d %d %d\n", x, y, z); -+} -+ -+static ssize_t write_mode(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -+{ -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ -+ if (!strncmp(buf, "Standby", count)) -+ update_mode(mma, MMA7455L_MODE_STANDBY, mma->gSelect); -+ else if (!strncmp(buf, "Measurement", count)) -+ update_mode(mma, MMA7455L_MODE_MEASUREMENT, mma->gSelect); -+ else if (!strncmp(buf, "Level Detection", count)) -+ update_mode(mma, MMA7455L_MODE_LEVELDETECTION, mma->gSelect); -+ else if (!strncmp(buf, "Pulse Detection", count)) -+ update_mode(mma, MMA7455L_MODE_PULSEDETECTION, mma->gSelect); -+ -+ return count; -+} -+ -+static ssize_t write_gSelect(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -+{ -+ unsigned long v; -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ -+ if(strict_strtoul(buf, 10, &v) == 0) -+ { -+ switch(v) -+ { -+ case 8: -+ update_mode(mma, mma->mode, MMA7455L_GSELECT_8); -+ break; -+ case 4: -+ update_mode(mma, mma->mode, MMA7455L_GSELECT_4); -+ break; -+ case 2: -+ update_mode(mma, mma->mode, MMA7455L_GSELECT_2); -+ break; -+ default: -+ return -EINVAL; -+ break; -+ } -+ return count; -+ } -+ -+ return -EINVAL; -+} -+ -+static ssize_t write_level_threshold(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -+{ -+ unsigned long v; -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ -+ if(strict_strtoul(buf, 10, &v) == 0) -+ { -+ if(v <= 0xFF) { -+ reg_write(mma, MMA7455L_REG_LDTH, v); -+ return count; -+ } else -+ return -EINVAL; -+ } -+ -+ return -EINVAL; -+} -+ -+static ssize_t write_calibration(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -+{ -+ int x, y, z; -+ struct mma7455l_info *mma = dev_get_drvdata(dev); -+ -+ if (sscanf(buf, "%d %d %d", &x, &y, &z) == 3) -+ { -+ mutex_lock(&mma->lock); -+ __reg_write_10(mma, MMA7455L_REG_XOFFL, MMA7455L_REG_XOFFH, x); -+ __reg_write_10(mma, MMA7455L_REG_YOFFL, MMA7455L_REG_YOFFH, y); -+ __reg_write_10(mma, MMA7455L_REG_ZOFFL, MMA7455L_REG_ZOFFH, z); -+ mutex_unlock(&mma->lock); -+ -+ return count; -+ } -+ -+ return -EINVAL; -+} -+ -+static DEVICE_ATTR(measure, S_IRUGO, show_measure, NULL); -+static DEVICE_ATTR(mode, S_IRUGO | S_IWUGO, show_mode, write_mode); -+static DEVICE_ATTR(gSelect, S_IRUGO | S_IWUGO, show_gSelect, write_gSelect); -+static DEVICE_ATTR(level_threshold, S_IRUGO | S_IWUGO, show_level_threshold, write_level_threshold); -+static DEVICE_ATTR(calibration, S_IRUGO | S_IWUGO, show_calibration, write_calibration); -+ -+static struct attribute *mma7455l_sysfs_entries[] = { -+ &dev_attr_measure.attr, -+ &dev_attr_mode.attr, -+ &dev_attr_gSelect.attr, -+ &dev_attr_level_threshold.attr, -+ &dev_attr_calibration.attr, -+ NULL -+}; -+ -+static struct attribute_group mma7455l_attr_group = { -+ .attrs = mma7455l_sysfs_entries, -+}; -+ -+/* input device handling and driver core interaction */ -+static int mma7455l_input_open(struct input_dev *inp) -+{ -+ struct mma7455l_info *mma = input_get_drvdata(inp); -+ if(mma->mode == MMA7455L_MODE_STANDBY) -+ update_mode(mma, MMA7455L_MODE_MEASUREMENT, mma->gSelect); -+ -+ return 0; -+} -+ -+static void mma7455l_input_close(struct input_dev *inp) -+{ -+ struct mma7455l_info *mma = input_get_drvdata(inp); -+ update_mode(mma, MMA7455L_MODE_STANDBY, MMA7455L_GSELECT_2); -+} -+ -+static int __devinit mma7455l_probe(struct spi_device *spi) -+{ -+ int rc; -+ struct mma7455l_info *mma; -+ struct mma7455l_platform_data *pdata = spi->dev.platform_data; -+ u_int8_t wai; -+ -+ mma = kzalloc(sizeof(*mma), GFP_KERNEL); -+ if (!mma) -+ return -ENOMEM; -+ -+ mutex_init(&mma->lock); -+ INIT_DELAYED_WORK(&mma->work, mma7455l_work); -+ mma->spi_dev = spi; -+ mma->flags = mma->working = 0; -+ -+ spi_set_drvdata(spi, mma); -+ -+ rc = spi_setup(spi); -+ if (rc < 0) { -+ printk(KERN_ERR "mma7455l error durign spi_setup of mma7455l driver\n"); -+ dev_set_drvdata(&spi->dev, NULL); -+ kfree(mma); -+ return rc; -+ } -+ -+ wai = reg_read(mma, MMA7455L_REG_WHOAMI); -+ if (wai != MMA7455L_WHOAMI_MAGIC) { -+ printk(KERN_ERR "mma7455l unknown whoami signature 0x%02x\n", wai); -+ dev_set_drvdata(&spi->dev, NULL); -+ kfree(mma); -+ return -ENODEV; -+ } -+ -+ rc = request_irq(mma->spi_dev->irq, mma7455l_interrupt, IRQF_TRIGGER_HIGH, -+ "mma7455l", mma); -+ if (rc < 0) { -+ dev_err(&spi->dev, "mma7455l error requesting IRQ %d\n", -+ mma->spi_dev->irq); -+ /* FIXME */ -+ return rc; -+ } -+ -+ rc = sysfs_create_group(&spi->dev.kobj, &mma7455l_attr_group); -+ if (rc) { -+ dev_err(&spi->dev, "error creating sysfs group\n"); -+ return rc; -+ } -+ -+ /* initialize input layer details */ -+ mma->input_dev = input_allocate_device(); -+ if (!mma->input_dev) { -+ dev_err(&spi->dev, "mma7455l Unable to allocate input device\n"); -+ /* FIXME */ -+ } -+ -+ set_bit(EV_ABS, mma->input_dev->evbit); -+ set_bit(ABS_X, mma->input_dev->absbit); -+ set_bit(ABS_Y, mma->input_dev->absbit); -+ set_bit(ABS_Z, mma->input_dev->absbit); -+ -+ input_set_drvdata(mma->input_dev, mma); -+ mma->input_dev->name = "MMA7455L"; -+ mma->input_dev->open = mma7455l_input_open; -+ mma->input_dev->close = mma7455l_input_close; -+ -+ rc = input_register_device(mma->input_dev); -+ if(!rc) -+ { -+ update_mode(mma, MMA7455L_MODE_STANDBY, MMA7455L_GSELECT_2); -+ -+ mutex_lock(&mma->lock); -+ __reg_write_10(mma, MMA7455L_REG_XOFFL, MMA7455L_REG_XOFFH, pdata->calibration_x); -+ __reg_write_10(mma, MMA7455L_REG_YOFFL, MMA7455L_REG_YOFFH, pdata->calibration_y); -+ __reg_write_10(mma, MMA7455L_REG_ZOFFL, MMA7455L_REG_ZOFFH, pdata->calibration_z); -+ mutex_unlock(&mma->lock); -+ -+ return 0; -+ } -+ -+ input_free_device(mma->input_dev); -+ return rc; -+} -+ -+static int __devexit mma7455l_remove(struct spi_device *spi) -+{ -+ struct mma7455l_info *mma = dev_get_drvdata(&spi->dev); -+ -+ sysfs_remove_group(&spi->dev.kobj, &mma7455l_attr_group); -+ input_unregister_device(mma->input_dev); -+ dev_set_drvdata(&spi->dev, NULL); -+ kfree(mma); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int mma7455l_suspend(struct spi_device *spi, pm_message_t message) -+{ -+ struct mma7455l_info *mma = dev_get_drvdata(&spi->dev); -+ get_mode(mma, &mma->mode, &mma->gSelect); -+ set_mode(mma, MMA7455L_MODE_STANDBY, MMA7455L_GSELECT_2); -+ -+ return 0; -+} -+ -+static int mma7455l_resume(struct spi_device *spi) -+{ -+ struct mma7455l_info *mma = dev_get_drvdata(&spi->dev); -+ update_mode(mma, mma->mode, mma->gSelect); -+ -+ return 0; -+} -+#else -+#define mma7455l_suspend NULL -+#define mma7455l_resume NULL -+#endif -+ -+static struct spi_driver mma7455l_driver = { -+ .driver = { -+ .name = "mma7455l", -+ .owner = THIS_MODULE, -+ }, -+ -+ .probe = mma7455l_probe, -+ .remove = __devexit_p(mma7455l_remove), -+ .suspend = mma7455l_suspend, -+ .resume = mma7455l_resume, -+}; -+ -+static int __init mma7455l_init(void) -+{ -+ return spi_register_driver(&mma7455l_driver); -+} -+ -+static void __exit mma7455l_exit(void) -+{ -+ spi_unregister_driver(&mma7455l_driver); -+} -+ -+MODULE_AUTHOR("Gregoire Gentil <gregoire@gentil.com>"); -+MODULE_LICENSE("GPL"); -+ -+module_init(mma7455l_init); -+module_exit(mma7455l_exit); -diff --git a/include/linux/mma7455l.h b/include/linux/mma7455l.h -new file mode 100644 -index 0000000..12ab50a ---- /dev/null -+++ b/include/linux/mma7455l.h -@@ -0,0 +1,11 @@ -+#ifndef _LINUX_MMA7455L_H -+#define _LINUX_MMA7455L_H -+ -+struct mma7455l_platform_data { -+ /* Calibration offsets */ -+ s16 calibration_x; -+ s16 calibration_y; -+ s16 calibration_z; -+}; -+ -+#endif /* _LINUX_MMA7455L_H */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0003-bq27x00_battery-remove-error-message-output.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0003-bq27x00_battery-remove-error-message-output.patch deleted file mode 100644 index f8b307e..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0003-bq27x00_battery-remove-error-message-output.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 6837800d92947d25e263bf041ebe7db4e804af68 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Fri, 12 Mar 2010 11:41:17 +0100 -Subject: [PATCH 03/17] bq27x00_battery: remove error message output - ---- - drivers/power/bq27x00_battery.c | 5 ----- - 1 files changed, 0 insertions(+), 5 deletions(-) - -diff --git a/drivers/power/bq27x00_battery.c b/drivers/power/bq27x00_battery.c -index 62bb981..6935bb6 100644 ---- a/drivers/power/bq27x00_battery.c -+++ b/drivers/power/bq27x00_battery.c -@@ -93,7 +93,6 @@ static int bq27x00_battery_temperature(struct bq27x00_device_info *di) - - ret = bq27x00_read(BQ27x00_REG_TEMP, &temp, 0, di); - if (ret) { -- dev_err(di->dev, "error reading temperature\n"); - return ret; - } - -@@ -111,7 +110,6 @@ static int bq27x00_battery_voltage(struct bq27x00_device_info *di) - - ret = bq27x00_read(BQ27x00_REG_VOLT, &volt, 0, di); - if (ret) { -- dev_err(di->dev, "error reading voltage\n"); - return ret; - } - -@@ -131,12 +129,10 @@ static int bq27x00_battery_current(struct bq27x00_device_info *di) - - ret = bq27x00_read(BQ27x00_REG_AI, &curr, 0, di); - if (ret) { -- dev_err(di->dev, "error reading current\n"); - return 0; - } - ret = bq27x00_read(BQ27x00_REG_FLAGS, &flags, 0, di); - if (ret < 0) { -- dev_err(di->dev, "error reading flags\n"); - return 0; - } - if ((flags & (1 << 7)) != 0) { -@@ -157,7 +153,6 @@ static int bq27x00_battery_rsoc(struct bq27x00_device_info *di) - - ret = bq27x00_read(BQ27x00_REG_RSOC, &rsoc, 1, di); - if (ret) { -- dev_err(di->dev, "error reading relative State-of-Charge\n"); - return ret; - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0004-bq27x00_battery-add-charged-gpio.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0004-bq27x00_battery-add-charged-gpio.patch deleted file mode 100644 index 759525f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0004-bq27x00_battery-add-charged-gpio.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 829d500667448b7ea9465615261a988adc3aa645 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Fri, 12 Mar 2010 11:42:45 +0100 -Subject: [PATCH 04/17] bq27x00_battery: add charged gpio - ---- - drivers/power/bq27x00_battery.c | 21 +++++++++++++++++++++ - 1 files changed, 21 insertions(+), 0 deletions(-) - -diff --git a/drivers/power/bq27x00_battery.c b/drivers/power/bq27x00_battery.c -index 6935bb6..4b80f59 100644 ---- a/drivers/power/bq27x00_battery.c -+++ b/drivers/power/bq27x00_battery.c -@@ -28,6 +28,7 @@ - - #define DRIVER_VERSION "1.0.0" - -+#define BQ27x00_REG_MODE 0x00 - #define BQ27x00_REG_TEMP 0x06 - #define BQ27x00_REG_VOLT 0x08 - #define BQ27x00_REG_RSOC 0x0B /* Relative State-of-Charge */ -@@ -65,6 +66,7 @@ static enum power_supply_property bq27x00_battery_props[] = { - POWER_SUPPLY_PROP_CURRENT_NOW, - POWER_SUPPLY_PROP_CAPACITY, - POWER_SUPPLY_PROP_TEMP, -+ POWER_SUPPLY_PROP_ONLINE, - }; - - /* -@@ -83,6 +85,22 @@ static int bq27x00_read(u8 reg, int *rt_value, int b_single, - } - - /* -+ * Return the GPIO status (0 or 1) -+ * Or < 0 if something fails. -+ */ -+static int bq27x00_gpio(struct bq27x00_device_info *di) -+{ -+ int ret; -+ int gpio = 0; -+ -+ ret = bq27x00_read(BQ27x00_REG_MODE, &gpio, 0, di); -+ if (ret) -+ return ret; -+ -+ return (gpio & 0x40) >> 6; -+} -+ -+/* - * Return the battery temperature in Celsius degrees - * Or < 0 if something fails. - */ -@@ -184,6 +202,9 @@ static int bq27x00_battery_get_property(struct power_supply *psy, - case POWER_SUPPLY_PROP_TEMP: - val->intval = bq27x00_battery_temperature(di); - break; -+ case POWER_SUPPLY_PROP_ONLINE: -+ val->intval = bq27x00_gpio(di); -+ break; - default: - return -EINVAL; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0005-adf7846-add-more-debugging.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0005-adf7846-add-more-debugging.patch deleted file mode 100644 index f15e0a2..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0005-adf7846-add-more-debugging.patch +++ /dev/null @@ -1,99 +0,0 @@ -From e00ae0c0fa35b4b67bbc905581c2c7bde0e29901 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Fri, 12 Mar 2010 13:50:38 +0100 -Subject: [PATCH 05/17] adf7846: add more debugging - ---- - drivers/input/touchscreen/ads7846.c | 73 +++++++++++++++++++++++++++++++++++ - 1 files changed, 73 insertions(+), 0 deletions(-) - -diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c -index 45287ab..ebdeeeb 100644 ---- a/drivers/input/touchscreen/ads7846.c -+++ b/drivers/input/touchscreen/ads7846.c -@@ -495,9 +495,82 @@ static ssize_t ads7846_disable_store(struct device *dev, - - static DEVICE_ATTR(disable, 0664, ads7846_disable_show, ads7846_disable_store); - -+static ssize_t show_debounce_max(struct device *dev, struct device_attribute *attr, char *buf) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ return sprintf(buf, "%u\n", ts->debounce_max); -+} -+ -+static ssize_t show_debounce_tol(struct device *dev, struct device_attribute *attr, char *buf) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ return sprintf(buf, "%u\n", ts->debounce_tol); -+} -+ -+static ssize_t show_debounce_rep(struct device *dev, struct device_attribute *attr, char *buf) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ return sprintf(buf, "%u\n", ts->debounce_rep); -+} -+ -+static ssize_t show_x_plate_ohms(struct device *dev, struct device_attribute *attr, char *buf) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ return sprintf(buf, "%u\n", ts->x_plate_ohms); -+} -+ -+static ssize_t write_debounce_max(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ unsigned long i; -+ -+ if (strict_strtoul(buf, 10, &i)) -+ return -EINVAL; -+ -+ ts->debounce_max = i; -+ return count; -+} -+ -+static ssize_t write_debounce_tol(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ unsigned long i; -+ -+ if (strict_strtoul(buf, 10, &i)) -+ return -EINVAL; -+ -+ ts->debounce_tol = i; -+ return count; -+} -+ -+static ssize_t write_debounce_rep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ unsigned long i; -+ -+ if (strict_strtoul(buf, 10, &i)) -+ return -EINVAL; -+ -+ ts->debounce_rep = i; -+ return count; -+} -+ -+static ssize_t write_x_plate_ohms(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ unsigned long i; -+ -+ if (strict_strtoul(buf, 10, &i)) -+ return -EINVAL; -+ -+ ts->x_plate_ohms = i; -+ return count; -+} -+ -+static DEVICE_ATTR(debounce_max, S_IRUGO | S_IWUGO, show_debounce_max, write_debounce_max); -+static DEVICE_ATTR(debounce_tol, S_IRUGO | S_IWUGO, show_debounce_tol, write_debounce_tol); -+static DEVICE_ATTR(debounce_rep, S_IRUGO | S_IWUGO, show_debounce_rep, write_debounce_rep); -+static DEVICE_ATTR(x_plate_ohms, S_IRUGO | S_IWUGO, show_x_plate_ohms, write_x_plate_ohms); -+ - static struct attribute *ads784x_attributes[] = { - &dev_attr_pen_down.attr, - &dev_attr_disable.attr, -+ &dev_attr_debounce_max.attr, -+ &dev_attr_debounce_tol.attr, -+ &dev_attr_debounce_rep.attr, -+ &dev_attr_x_plate_ohms.attr, - NULL, - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0006-ads7846-read-max-mix-x-y-from-pdata.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0006-ads7846-read-max-mix-x-y-from-pdata.patch deleted file mode 100644 index 63a4ebb..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0006-ads7846-read-max-mix-x-y-from-pdata.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 5f227b8aa6083437e2907ca621159228a4a24d9a Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Fri, 12 Mar 2010 13:50:45 +0100 -Subject: [PATCH 06/17] ads7846: read max/mix x/y from pdata - ---- - drivers/input/touchscreen/ads7846.c | 5 +++-- - 1 files changed, 3 insertions(+), 2 deletions(-) - -diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c -index ebdeeeb..56b0ffd 100644 ---- a/drivers/input/touchscreen/ads7846.c -+++ b/drivers/input/touchscreen/ads7846.c -@@ -604,6 +604,7 @@ static void ads7846_rx(void *ads) - { - struct ads7846 *ts = ads; - struct ads7846_packet *packet = ts->packet; -+ struct ads7846_platform_data *pdata = ts->spi->dev.platform_data; - unsigned Rt; - u16 x, y, z1, z2; - -@@ -674,8 +675,8 @@ static void ads7846_rx(void *ads) - if (ts->swap_xy) - swap(x, y); - -- input_report_abs(input, ABS_X, x); -- input_report_abs(input, ABS_Y, y); -+ input_report_abs(input, ABS_X, pdata->x_max - x + pdata->x_min); -+ input_report_abs(input, ABS_Y, pdata->y_max - y + pdata->y_min); - input_report_abs(input, ABS_PRESSURE, ts->pressure_max - Rt); - - input_sync(input); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0007-ads7846-add-settling-delay-to-pdata.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0007-ads7846-add-settling-delay-to-pdata.patch deleted file mode 100644 index a69c783..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0007-ads7846-add-settling-delay-to-pdata.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 7330c695afad64eef62c525cb8e54913265a3b39 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Fri, 12 Mar 2010 13:50:52 +0100 -Subject: [PATCH 07/17] ads7846: add settling delay to pdata - ---- - drivers/input/touchscreen/ads7846.c | 22 ++++++++++++++++++++++ - 1 files changed, 22 insertions(+), 0 deletions(-) - -diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c -index 56b0ffd..1d9f97c 100644 ---- a/drivers/input/touchscreen/ads7846.c -+++ b/drivers/input/touchscreen/ads7846.c -@@ -515,6 +515,26 @@ static ssize_t show_x_plate_ohms(struct device *dev, struct device_attribute *at - return sprintf(buf, "%u\n", ts->x_plate_ohms); - } - -+static ssize_t show_settle_delay_usecs(struct device *dev, struct device_attribute *attr, char *buf) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ struct ads7846_platform_data *pdata = ts->spi->dev.platform_data; -+ -+ return sprintf(buf, "%u\n", pdata->settle_delay_usecs); -+} -+ -+static ssize_t write_settle_delay_usecs(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { -+ struct ads7846 *ts = dev_get_drvdata(dev); -+ struct ads7846_platform_data *pdata = ts->spi->dev.platform_data; -+ -+ unsigned long i; -+ -+ if (strict_strtoul(buf, 10, &i)) -+ return -EINVAL; -+ -+ pdata->settle_delay_usecs = i; -+ return count; -+} -+ - static ssize_t write_debounce_max(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct ads7846 *ts = dev_get_drvdata(dev); - unsigned long i; -@@ -563,6 +583,7 @@ static DEVICE_ATTR(debounce_max, S_IRUGO | S_IWUGO, show_debounce_max, write_deb - static DEVICE_ATTR(debounce_tol, S_IRUGO | S_IWUGO, show_debounce_tol, write_debounce_tol); - static DEVICE_ATTR(debounce_rep, S_IRUGO | S_IWUGO, show_debounce_rep, write_debounce_rep); - static DEVICE_ATTR(x_plate_ohms, S_IRUGO | S_IWUGO, show_x_plate_ohms, write_x_plate_ohms); -+static DEVICE_ATTR(settle_delay_usecs, S_IRUGO | S_IWUGO, show_settle_delay_usecs, write_settle_delay_usecs); - - static struct attribute *ads784x_attributes[] = { - &dev_attr_pen_down.attr, -@@ -571,6 +592,7 @@ static struct attribute *ads784x_attributes[] = { - &dev_attr_debounce_tol.attr, - &dev_attr_debounce_rep.attr, - &dev_attr_x_plate_ohms.attr, -+ &dev_attr_settle_delay_usecs.attr, - NULL, - }; - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0008-DSS2-OMAPFB-Translate-X-Y-coordinates-for-the-video-.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0008-DSS2-OMAPFB-Translate-X-Y-coordinates-for-the-video-.patch deleted file mode 100644 index 5d6ff3f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0008-DSS2-OMAPFB-Translate-X-Y-coordinates-for-the-video-.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 07396a332c4f3d6ed4ff498cb08d0338c98dc612 Mon Sep 17 00:00:00 2001 -From: Tim Yamin <plasm@roo.me.uk> -Date: Mon, 20 Apr 2009 20:29:11 -0700 -Subject: [PATCH 08/17] DSS2: OMAPFB: Translate X/Y coordinates for the video planes when rotating. - -When rotating the video planes, translate the X/Y coordinates such that -a [0,0] from userspace always maps to the correct upper left corner of -the display. This patch assumes that you rotate plane 0 before rotating -plane 1. Patch also corrects the scaling parameters so that the video is -displayed in the correct orientation (vertically, instead of horizontally) -when rotating by 90 / 270 degrees. - -Signed-off-by: Tim Yamin <plasm@roo.me.uk> ---- - drivers/video/omap2/dss/dispc.c | 16 ++++++++++++---- - drivers/video/omap2/dss/manager.c | 2 +- - drivers/video/omap2/dss/overlay.c | 19 ++++++++++++++----- - 3 files changed, 27 insertions(+), 10 deletions(-) - -diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c -index c6d5fc5..1b38c49 100644 ---- a/drivers/video/omap2/dss/dispc.c -+++ b/drivers/video/omap2/dss/dispc.c -@@ -1685,10 +1685,18 @@ static int _dispc_setup_plane(enum omap_plane plane, - _dispc_set_pic_size(plane, width, height); - - if (plane != OMAP_DSS_GFX) { -- _dispc_set_scaling(plane, width, height, -- out_width, out_height, -- ilace, five_taps, fieldmode); -- _dispc_set_vid_size(plane, out_width, out_height); -+ if (rotation == 1 || rotation == 3) { -+ _dispc_set_scaling(plane, width, height, -+ out_height, out_width, -+ ilace, five_taps, fieldmode); -+ _dispc_set_vid_size(plane, out_height, out_width); -+ } else { -+ _dispc_set_scaling(plane, width, height, -+ out_width, out_height, -+ ilace, five_taps, fieldmode); -+ _dispc_set_vid_size(plane, out_width, out_height); -+ } -+ - _dispc_set_vid_color_conv(plane, cconv); - } - -diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/omap2/dss/manager.c -index 27d9c46..7c62dea 100644 ---- a/drivers/video/omap2/dss/manager.c -+++ b/drivers/video/omap2/dss/manager.c -@@ -702,7 +702,7 @@ static int configure_overlay(enum omap_plane plane) - u16 outw, outh; - u16 x, y, w, h; - u32 paddr; -- int r; -+ int r, pos_x = 0, pos_y = 0; - - DSSDBGF("%d", plane); - -diff --git a/drivers/video/omap2/dss/overlay.c b/drivers/video/omap2/dss/overlay.c -index b7f9a73..0bc0592 100644 ---- a/drivers/video/omap2/dss/overlay.c -+++ b/drivers/video/omap2/dss/overlay.c -@@ -374,6 +374,20 @@ int dss_check_overlay(struct omap_overlay *ovl, struct omap_dss_device *dssdev) - outh = info->out_height; - } - -+ if ((ovl->supported_modes & info->color_mode) == 0) { -+ DSSERR("overlay doesn't support mode %d\n", info->color_mode); -+ return -EINVAL; -+ } -+ -+ if (ovl->id != OMAP_DSS_GFX && (info->rotation == 1 || -+ info->rotation == 3)) { -+ if(outw > dh || outh > dw) -+ return -EINVAL; -+ -+ /* If coordinates are invalid, they will be clipped later... */ -+ return 0; -+ } -+ - if (dw < info->pos_x + outw) { - DSSDBG("check_overlay failed 1: %d < %d + %d\n", - dw, info->pos_x, outw); -@@ -386,11 +400,6 @@ int dss_check_overlay(struct omap_overlay *ovl, struct omap_dss_device *dssdev) - return -EINVAL; - } - -- if ((ovl->supported_modes & info->color_mode) == 0) { -- DSSERR("overlay doesn't support mode %d\n", info->color_mode); -- return -EINVAL; -- } -- - return 0; - } - --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0009-DSS2-Fix-scaling-checks-when-rotation-is-90-or-270-d.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0009-DSS2-Fix-scaling-checks-when-rotation-is-90-or-270-d.patch deleted file mode 100644 index 5130598..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0009-DSS2-Fix-scaling-checks-when-rotation-is-90-or-270-d.patch +++ /dev/null @@ -1,52 +0,0 @@ -From fc2e9ddb93cb026ed10900d794dd1db11191dc24 Mon Sep 17 00:00:00 2001 -From: Tim Yamin <plasm@roo.me.uk> -Date: Fri, 12 Mar 2010 13:57:38 +0100 -Subject: [PATCH 09/17] DSS2: Fix scaling checks when rotation is 90 or 270 degrees. - ---- - drivers/video/omap2/dss/dispc.c | 25 +++++++++++++++++++------ - 1 files changed, 19 insertions(+), 6 deletions(-) - -diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c -index 1b38c49..d648c08 100644 ---- a/drivers/video/omap2/dss/dispc.c -+++ b/drivers/video/omap2/dss/dispc.c -@@ -1563,16 +1563,29 @@ static int _dispc_setup_plane(enum omap_plane plane, - } - } else { - /* video plane */ -- -+ u8 error = 0; - unsigned long fclk = 0; - -- if (out_width < width / maxdownscale || -- out_width > width * 8) -- return -EINVAL; -+ if(rotation == 1 || rotation == 3) -+ { -+ if (out_width < height / maxdownscale || out_width > height * 8) -+ error = 1; -+ -+ if (out_height < width / maxdownscale || out_height > width * 8) -+ error = 1; -+ } else { -+ if (out_width < width / maxdownscale || out_width > width * 8) -+ error = 1; - -- if (out_height < height / maxdownscale || -- out_height > height * 8) -+ if (out_height < height / maxdownscale || out_height > height * 8) -+ error = 1; -+ } -+ -+ if(error != 0) -+ { -+ printk("DSS: Unable to down/up scale video plane\n"); - return -EINVAL; -+ } - - switch (color_mode) { - case OMAP_DSS_COLOR_RGBX32: --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0010-add-touchbook-hid-driver.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0010-add-touchbook-hid-driver.patch deleted file mode 100644 index aa3b359..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0010-add-touchbook-hid-driver.patch +++ /dev/null @@ -1,339 +0,0 @@ -From 0f651f19bf9cfecbb76d6f0b251e3d8395f306b8 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Fri, 12 Mar 2010 14:39:07 +0100 -Subject: [PATCH 10/17] add touchbook hid driver - ---- - drivers/hid/Kconfig | 7 ++ - drivers/hid/Makefile | 1 + - drivers/hid/hid-ai.c | 260 ++++++++++++++++++++++++++++++++++++++++++++++++ - drivers/hid/hid-core.c | 1 + - drivers/hid/hid-ids.h | 3 + - 5 files changed, 272 insertions(+), 0 deletions(-) - create mode 100644 drivers/hid/hid-ai.c - -diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig -index 24d90ea..3760565 100644 ---- a/drivers/hid/Kconfig -+++ b/drivers/hid/Kconfig -@@ -62,6 +62,13 @@ config HID_A4TECH - ---help--- - Support for A4 tech X5 and WOP-35 / Trust 450L mice. - -+config HID_AI -+ tristate "Always Innovating" if EMBEDDED -+ depends on USB_HID -+ default !EMBEDDED -+ ---help--- -+ Support for Always Innovating Touch Book. -+ - config HID_APPLE - tristate "Apple" if EMBEDDED - depends on (USB_HID || BT_HIDP) -diff --git a/drivers/hid/Makefile b/drivers/hid/Makefile -index 0de2dff..1787952 100644 ---- a/drivers/hid/Makefile -+++ b/drivers/hid/Makefile -@@ -20,6 +20,7 @@ ifdef CONFIG_LOGIRUMBLEPAD2_FF - endif - - obj-$(CONFIG_HID_A4TECH) += hid-a4tech.o -+obj-$(CONFIG_HID_AI) += hid-ai.o - obj-$(CONFIG_HID_APPLE) += hid-apple.o - obj-$(CONFIG_HID_BELKIN) += hid-belkin.o - obj-$(CONFIG_HID_CHERRY) += hid-cherry.o -diff --git a/drivers/hid/hid-ai.c b/drivers/hid/hid-ai.c -new file mode 100644 -index 0000000..83aecaf ---- /dev/null -+++ b/drivers/hid/hid-ai.c -@@ -0,0 +1,260 @@ -+/* -+ * USB HID quirks support for the Always Innovating Touch Book -+ * Code borrowed from hid-apple.c -+ * -+ * Copyright (c) 2009 Tim Yamin <plasm@roo.me.uk> -+ */ -+ -+/* -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the Free -+ * Software Foundation; either version 2 of the License, or (at your option) -+ * any later version. -+ */ -+ -+#include <linux/device.h> -+#include <linux/hid.h> -+#include <linux/module.h> -+#include <linux/usb.h> -+ -+#include "hid-ids.h" -+ -+struct ai_sc { -+ unsigned long quirks; -+ unsigned int fn_on; -+ DECLARE_BITMAP(pressed_fn, KEY_CNT); -+}; -+ -+struct ai_key_translation { -+ u16 from; -+ u16 to; -+ u8 flags; -+}; -+ -+static struct ai_key_translation ai_fn_keys[] = { -+ { KEY_F6, KEY_BRIGHTNESSDOWN }, -+ { KEY_F7, KEY_BRIGHTNESSUP }, -+ -+ { KEY_F8, KEY_MUTE }, -+ { KEY_F9, KEY_VOLUMEDOWN }, -+ { KEY_F10, KEY_VOLUMEUP }, -+ -+ { KEY_UP, KEY_PAGEUP }, -+ { KEY_DOWN, KEY_PAGEDOWN }, -+ { } -+}; -+ -+extern unsigned int ai_revision; -+int swap_key = 0; -+ -+static struct ai_key_translation *ai_find_translation( -+ struct ai_key_translation *table, u16 from) -+{ -+ struct ai_key_translation *trans; -+ -+ /* Look for the translation */ -+ for (trans = table; trans->from; trans++) -+ if (trans->from == from) -+ return trans; -+ -+ return NULL; -+} -+ -+static int ai_event(struct hid_device *hid, struct hid_field *field, -+ struct hid_usage *usage, __s32 value) -+{ -+ int do_translate; -+ -+ struct input_dev *input = field->hidinput->input; -+ struct ai_sc *asc = hid_get_drvdata(hid); -+ struct ai_key_translation *trans; -+ -+ if (swap_key && usage->code == KEY_RIGHTSHIFT) { -+ input_event(input, usage->type, KEY_END, value); -+ return 1; -+ } -+ -+ if (swap_key && usage->code == KEY_END) { -+ input_event(input, usage->type, KEY_RIGHTSHIFT, value); -+ return 1; -+ } -+ -+ if (usage->code == KEY_POWER) { -+ asc->fn_on = !!value; -+ input_event(input, usage->type, usage->code, value); -+ return 1; -+ } -+ -+ trans = ai_find_translation(ai_fn_keys, usage->code); -+ if (trans) { -+ if (test_bit(usage->code, asc->pressed_fn)) -+ do_translate = 1; -+ else -+ do_translate = asc->fn_on; -+ -+ if (do_translate) { -+ if (value) -+ set_bit(usage->code, asc->pressed_fn); -+ else -+ clear_bit(usage->code, asc->pressed_fn); -+ -+ input_event(input, usage->type, trans->to, -+ value); -+ -+ return 1; -+ } -+ } -+ -+ return 0; -+} -+ -+static int ai_input_mapping(struct hid_device *hdev, struct hid_input *hi, -+ struct hid_field *field, struct hid_usage *usage, -+ unsigned long **bit, int *max) -+{ -+ struct ai_key_translation *trans; -+ -+ /* Enable all other keys */ -+ for (trans = ai_fn_keys; trans->from; trans++) -+ set_bit(trans->to, hi->input->keybit); -+ -+ return 0; -+} -+ -+static ssize_t show_swap_key(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ return snprintf(buf, PAGE_SIZE, "%d\n", swap_key); -+} -+ -+static ssize_t store_swap_key(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ swap_key = simple_strtoul(buf, NULL, 0); -+ -+ if (swap_key != 0 && swap_key != 1) { -+ swap_key = 0; -+ return -EINVAL; -+ } -+ -+ return count; -+} -+ -+static struct device_attribute ai_hid_attrs[] = { -+ __ATTR(swap_key, S_IRUGO | S_IWUGO, show_swap_key, store_swap_key), -+}; -+ -+int ai_create_sysfs(struct hid_device *hdev) -+{ -+ int i; -+ int r; -+ -+ for (i = 0; i < ARRAY_SIZE(ai_hid_attrs); i++) { -+ r = device_create_file(&hdev->dev, -+ &ai_hid_attrs[i]); -+ -+ if (r) { -+ dev_err(&hdev->dev, "failed to create sysfs file\n"); -+ return r; -+ } -+ } -+ -+ return 0; -+} -+ -+void ai_remove_sysfs(struct hid_device *hdev) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(ai_hid_attrs); i++) -+ device_remove_file(&hdev->dev, -+ &ai_hid_attrs[i]); -+} -+ -+static int ai_probe(struct hid_device *hdev, -+ const struct hid_device_id *id) -+{ -+ unsigned long quirks = id->driver_data; -+ struct ai_sc *asc; -+ unsigned int connect_mask = HID_CONNECT_DEFAULT; -+ int ret; -+ -+ asc = kzalloc(sizeof(*asc), GFP_KERNEL); -+ if (asc == NULL) { -+ dev_err(&hdev->dev, "can't alloc ai descriptor\n"); -+ return -ENOMEM; -+ } -+ -+ asc->quirks = quirks; -+ hid_set_drvdata(hdev, asc); -+ -+ ret = hid_parse(hdev); -+ if (ret) { -+ dev_err(&hdev->dev, "parse failed\n"); -+ goto err_free; -+ } -+ -+ ret = ai_create_sysfs(hdev); -+ if (ret) { -+ dev_err(&hdev->dev, "failed to create sysfs entries\n"); -+ goto err_free; -+ } -+ -+ swap_key = (ai_revision >= 4) ? 1 : 0; -+ -+ ret = hid_hw_start(hdev, connect_mask); -+ if (ret) { -+ dev_err(&hdev->dev, "hw start failed\n"); -+ goto err_free; -+ } -+ -+ return 0; -+err_free: -+ kfree(asc); -+ return ret; -+} -+ -+static void ai_remove(struct hid_device *hdev) -+{ -+ hid_hw_stop(hdev); -+ kfree(hid_get_drvdata(hdev)); -+ ai_remove_sysfs(hdev); -+} -+ -+static const struct hid_device_id ai_devices[] = { -+ { HID_USB_DEVICE(USB_VENDOR_ID_AI, USB_DEVICE_ID_AI_TOUCH_BOOK) }, -+ { } -+}; -+ -+MODULE_DEVICE_TABLE(hid, ai_devices); -+ -+static struct hid_driver ai_driver = { -+ .name = "ai", -+ .id_table = ai_devices, -+ .probe = ai_probe, -+ .remove = ai_remove, -+ .event = ai_event, -+ .input_mapping = ai_input_mapping, -+}; -+ -+static int ai_init(void) -+{ -+ int ret; -+ -+ ret = hid_register_driver(&ai_driver); -+ if (ret) -+ printk(KERN_ERR "can't register ai driver\n"); -+ -+ return ret; -+} -+ -+static void ai_exit(void) -+{ -+ hid_unregister_driver(&ai_driver); -+} -+ -+module_init(ai_init); -+module_exit(ai_exit); -+MODULE_LICENSE("GPL"); -+HID_COMPAT_LOAD_DRIVER(ai); -diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c -index 80792d3..f6b5960 100644 ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -1250,6 +1250,7 @@ EXPORT_SYMBOL_GPL(hid_disconnect); - static const struct hid_device_id hid_blacklist[] = { - { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_WCP32PU) }, - { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_X5_005D) }, -+ { HID_USB_DEVICE(USB_VENDOR_ID_AI, USB_DEVICE_ID_AI_TOUCH_BOOK) }, - { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ATV_IRCONTROL) }, - { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL4) }, - { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MIGHTYMOUSE) }, -diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index 3839340..5a0127d 100644 ---- a/drivers/hid/hid-ids.h -+++ b/drivers/hid/hid-ids.h -@@ -54,6 +54,9 @@ - #define USB_VENDOR_ID_ALPS 0x0433 - #define USB_DEVICE_ID_IBM_GAMEPAD 0x1101 - -+#define USB_VENDOR_ID_AI 0xa110 -+#define USB_DEVICE_ID_AI_TOUCH_BOOK 0x0002 -+ - #define USB_VENDOR_ID_APPLE 0x05ac - #define USB_DEVICE_ID_APPLE_MIGHTYMOUSE 0x0304 - #define USB_DEVICE_ID_APPLE_FOUNTAIN_ANSI 0x020e --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0011-Make-backlight-controls-accessible-to-users.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0011-Make-backlight-controls-accessible-to-users.patch deleted file mode 100644 index c6d3678..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0011-Make-backlight-controls-accessible-to-users.patch +++ /dev/null @@ -1,25 +0,0 @@ -From b46a494e0c02450e412db221d75446671b6ef511 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregroire@gentil.com> -Date: Fri, 12 Mar 2010 14:41:05 +0100 -Subject: [PATCH 11/17] Make backlight controls accessible to users - ---- - drivers/video/backlight/backlight.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - -diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c -index 6615ac7..7898707 100644 ---- a/drivers/video/backlight/backlight.c -+++ b/drivers/video/backlight/backlight.c -@@ -228,7 +228,7 @@ static void bl_device_release(struct device *dev) - - static struct device_attribute bl_device_attributes[] = { - __ATTR(bl_power, 0644, backlight_show_power, backlight_store_power), -- __ATTR(brightness, 0644, backlight_show_brightness, -+ __ATTR(brightness, 0666, backlight_show_brightness, - backlight_store_brightness), - __ATTR(actual_brightness, 0444, backlight_show_actual_brightness, - NULL), --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0012-ads7846-don-t-error-out-when-there-s-no-pendown-gpio.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0012-ads7846-don-t-error-out-when-there-s-no-pendown-gpio.patch deleted file mode 100644 index 24fb913..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0012-ads7846-don-t-error-out-when-there-s-no-pendown-gpio.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 4c3ef06a333cf1f873a9a8de05af90959a5d1e68 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Fri, 12 Mar 2010 15:04:58 +0100 -Subject: [PATCH 12/17] ads7846: don't error out when there's no pendown gpio - ---- - drivers/input/touchscreen/ads7846.c | 7 ------- - 1 files changed, 0 insertions(+), 7 deletions(-) - -diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c -index 1d9f97c..c72c3ae 100644 ---- a/drivers/input/touchscreen/ads7846.c -+++ b/drivers/input/touchscreen/ads7846.c -@@ -952,13 +952,6 @@ static int __devinit setup_pendown(struct spi_device *spi, struct ads7846 *ts) - return 0; - } - -- err = gpio_request(pdata->gpio_pendown, "ads7846_pendown"); -- if (err) { -- dev_err(&spi->dev, "failed to request pendown GPIO%d\n", -- pdata->gpio_pendown); -- return err; -- } -- - ts->gpio_pendown = pdata->gpio_pendown; - return 0; - } --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0013-ASoC-add-driver-for-omap3-touchbook.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0013-ASoC-add-driver-for-omap3-touchbook.patch deleted file mode 100644 index 2da7354..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0013-ASoC-add-driver-for-omap3-touchbook.patch +++ /dev/null @@ -1,350 +0,0 @@ -From 96ce6261efe4c194d9188e0f352803bcd92f1c59 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Wed, 31 Mar 2010 11:14:04 +0200 -Subject: [PATCH 13/17] ASoC: add driver for omap3-touchbook - ---- - sound/soc/omap/Kconfig | 8 + - sound/soc/omap/Makefile | 2 + - sound/soc/omap/omap3touchbook.c | 291 +++++++++++++++++++++++++++++++++++++++ - 3 files changed, 301 insertions(+), 0 deletions(-) - create mode 100644 sound/soc/omap/omap3touchbook.c - -diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig -index 61952aa..a7c06ab 100644 ---- a/sound/soc/omap/Kconfig -+++ b/sound/soc/omap/Kconfig -@@ -101,6 +101,14 @@ config SND_OMAP_SOC_OMAP3_BEAGLE - help - Say Y if you want to add support for SoC audio on the Beagleboard. - -+config SND_OMAP_SOC_OMAP3_TOUCHBOOK -+ tristate "SoC Audio support for OMAP3 Touch Book" -+ depends on TWL4030_CORE && SND_OMAP_SOC && MACH_OMAP3_TOUCHBOOK -+ select SND_OMAP_SOC_MCBSP -+ select SND_SOC_TWL4030 -+ help -+ Say Y if you want to add support for SoC audio on the Touch Book. -+ - config SND_OMAP_SOC_ZOOM2 - tristate "SoC Audio support for Zoom2" - depends on TWL4030_CORE && SND_OMAP_SOC && MACH_OMAP_ZOOM2 -diff --git a/sound/soc/omap/Makefile b/sound/soc/omap/Makefile -index 19283e5..e3f172f 100644 ---- a/sound/soc/omap/Makefile -+++ b/sound/soc/omap/Makefile -@@ -16,6 +16,7 @@ snd-soc-am3517evm-objs := am3517evm.o - snd-soc-sdp3430-objs := sdp3430.o - snd-soc-omap3pandora-objs := omap3pandora.o - snd-soc-omap3beagle-objs := omap3beagle.o -+snd-soc-omap3touchbook-objs := omap3touchbook.o - snd-soc-zoom2-objs := zoom2.o - snd-soc-igep0020-objs := igep0020.o - -@@ -29,5 +30,6 @@ obj-$(CONFIG_SND_OMAP_SOC_AM3517EVM) += snd-soc-am3517evm.o - obj-$(CONFIG_SND_OMAP_SOC_SDP3430) += snd-soc-sdp3430.o - obj-$(CONFIG_SND_OMAP_SOC_OMAP3_PANDORA) += snd-soc-omap3pandora.o - obj-$(CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE) += snd-soc-omap3beagle.o -+obj-$(CONFIG_SND_OMAP_SOC_OMAP3_TOUCHBOOK) += snd-soc-omap3touchbook.o - obj-$(CONFIG_SND_OMAP_SOC_ZOOM2) += snd-soc-zoom2.o - obj-$(CONFIG_SND_OMAP_SOC_IGEP0020) += snd-soc-igep0020.o -diff --git a/sound/soc/omap/omap3touchbook.c b/sound/soc/omap/omap3touchbook.c -new file mode 100644 -index 0000000..c5e6eaa ---- /dev/null -+++ b/sound/soc/omap/omap3touchbook.c -@@ -0,0 +1,291 @@ -+/* -+ * omap3touchbook.c -- SoC audio for Touch Book -+ * -+ * Copyright (C) 2009-2010 Always Innovating -+ * -+ * Author: Gregoire Gentil <gregoire@gentil.com> -+ * -+ * Based on: -+ * Author: Steve Sakoman <steve@sakoman.com> -+ * Author: Misael Lopez Cruz <x0052729@ti.com> -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA -+ * 02110-1301 USA -+ * -+ */ -+ -+#include <linux/clk.h> -+#include <linux/platform_device.h> -+#include <linux/i2c/twl.h> -+#include <sound/core.h> -+#include <sound/pcm.h> -+#include <sound/soc.h> -+#include <sound/soc-dapm.h> -+#include <sound/jack.h> -+ -+#include <asm/mach-types.h> -+#include <mach/hardware.h> -+#include <mach/gpio.h> -+#include <plat/mcbsp.h> -+ -+#include "omap-mcbsp.h" -+#include "omap-pcm.h" -+#include "../codecs/twl4030.h" -+ -+static struct snd_soc_card snd_soc_omap3touchbook; -+ -+static int omap3touchbook_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; -+ struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; -+ unsigned int fmt; -+ int ret; -+ -+ switch (params_channels(params)) { -+ case 2: /* Stereo I2S mode */ -+ fmt = SND_SOC_DAIFMT_I2S | -+ SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBM_CFM; -+ break; -+ case 4: /* Four channel TDM mode */ -+ fmt = SND_SOC_DAIFMT_DSP_A | -+ SND_SOC_DAIFMT_IB_NF | -+ SND_SOC_DAIFMT_CBM_CFM; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ /* Set codec DAI configuration */ -+ ret = snd_soc_dai_set_fmt(codec_dai, fmt); -+ if (ret < 0) { -+ printk(KERN_ERR "can't set codec DAI configuration\n"); -+ return ret; -+ } -+ -+ /* Set cpu DAI configuration */ -+ ret = snd_soc_dai_set_fmt(cpu_dai, fmt); -+ if (ret < 0) { -+ printk(KERN_ERR "can't set cpu DAI configuration\n"); -+ return ret; -+ } -+ -+ /* Set the codec system clock for DAC and ADC */ -+ ret = snd_soc_dai_set_sysclk(codec_dai, 0, 26000000, -+ SND_SOC_CLOCK_IN); -+ if (ret < 0) { -+ printk(KERN_ERR "can't set codec system clock\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static struct snd_soc_ops omap3touchbook_ops = { -+ .hw_params = omap3touchbook_hw_params, -+}; -+ -+/* Headset jack */ -+static struct snd_soc_jack hs_jack; -+ -+/* Headset jack detection DAPM pins */ -+static struct snd_soc_jack_pin hs_jack_pins[] = { -+ { -+ .pin = "Headset Stereo", -+ .mask = SND_JACK_HEADPHONE, -+ }, -+ { -+ .pin = "Headset Mic", -+ .mask = SND_JACK_HEADPHONE, -+ }, -+ { -+ .pin = "External Speakers", -+ .mask = SND_JACK_HEADPHONE, -+ .invert = 1, -+ }, -+}; -+ -+/* Headset jack detection gpios */ -+static struct snd_soc_jack_gpio hs_jack_gpios[] = { -+ { -+ .gpio = 56, -+ .name = "hsdet-gpio", -+ .report = SND_JACK_HEADSET, -+ .debounce_time = 200, -+ }, -+}; -+ -+/* omap3touchbook machine DAPM */ -+static const struct snd_soc_dapm_widget omap3touchbook_twl4030_dapm_widgets[] = { -+ SND_SOC_DAPM_SPK("External Speakers", NULL), -+ SND_SOC_DAPM_HP("Headset Stereo", NULL), -+ SND_SOC_DAPM_MIC("Headset Mic", NULL), -+ SND_SOC_DAPM_LINE("Line In", NULL), -+}; -+ -+static const struct snd_soc_dapm_route audio_map[] = { -+ /* External Speakers: HFL, HFR */ -+ {"External Speakers", NULL, "HFL"}, -+ {"External Speakers", NULL, "HFR"}, -+ -+ /* Headset Stereo: HSOL, HSOR */ -+ {"Headset Stereo", NULL, "HSOL"}, -+ {"Headset Stereo", NULL, "HSOR"}, -+ -+ /* Micro: HSMIC */ -+ {"HSMIC", NULL, "Headset Mic Bias"}, -+ {"Headset Mic Bias", NULL, "Headset Mic"}, -+ -+ /* Line In: AUXL, AUXR */ -+ {"AUXL", NULL, "Line In"}, -+ {"AUXR", NULL, "Line In"}, -+}; -+ -+static int omap3touchbook_twl4030_init(struct snd_soc_codec *codec) -+{ -+ int ret; -+ -+ /* Add omap3touchbook specific widgets */ -+ ret = snd_soc_dapm_new_controls(codec, omap3touchbook_twl4030_dapm_widgets, -+ ARRAY_SIZE(omap3touchbook_twl4030_dapm_widgets)); -+ if (ret) -+ return ret; -+ -+ /* Set up omap3touchbook specific audio path audio_map */ -+ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); -+ -+ /* omap3touchbook connected pins */ -+ snd_soc_dapm_enable_pin(codec, "External Speakers"); -+ snd_soc_dapm_enable_pin(codec, "Headset Stereo"); -+ snd_soc_dapm_enable_pin(codec, "Headset Mic"); -+ snd_soc_dapm_enable_pin(codec, "Line In"); -+ -+ /* omap3touchbook not connected pins */ -+ snd_soc_dapm_nc_pin(codec, "CARKITMIC"); -+ snd_soc_dapm_nc_pin(codec, "MAINMIC"); -+ snd_soc_dapm_nc_pin(codec, "SUBMIC"); -+ snd_soc_dapm_nc_pin(codec, "DIGIMIC0"); -+ snd_soc_dapm_nc_pin(codec, "DIGIMIC1"); -+ snd_soc_dapm_nc_pin(codec, "OUTL"); -+ snd_soc_dapm_nc_pin(codec, "OUTR"); -+ snd_soc_dapm_nc_pin(codec, "EARPIECE"); -+ snd_soc_dapm_nc_pin(codec, "PREDRIVEL"); -+ snd_soc_dapm_nc_pin(codec, "PREDRIVER"); -+ snd_soc_dapm_nc_pin(codec, "CARKITL"); -+ snd_soc_dapm_nc_pin(codec, "CARKITR"); -+ snd_soc_dapm_nc_pin(codec, "VIBRA"); -+ -+ ret = snd_soc_dapm_sync(codec); -+ if (ret) -+ return ret; -+ -+ /* Headset jack detection */ -+ ret = snd_soc_jack_new(&snd_soc_omap3touchbook, "Headset Jack", -+ SND_JACK_HEADSET, &hs_jack); -+ if (ret) -+ return ret; -+ -+ ret = snd_soc_jack_add_pins(&hs_jack, ARRAY_SIZE(hs_jack_pins), -+ hs_jack_pins); -+ if (ret) -+ return ret; -+ -+ ret = snd_soc_jack_add_gpios(&hs_jack, ARRAY_SIZE(hs_jack_gpios), -+ hs_jack_gpios); -+ -+ return ret; -+} -+ -+/* Digital audio interface glue - connects codec <--> CPU */ -+static struct snd_soc_dai_link omap3touchbook_dai = { -+ .name = "TWL4030 I2S", -+ .stream_name = "TWL4030 Audio", -+ .cpu_dai = &omap_mcbsp_dai[0], -+ .codec_dai = &twl4030_dai[TWL4030_DAI_HIFI], -+ .init = omap3touchbook_twl4030_init, -+ .ops = &omap3touchbook_ops, -+}; -+ -+/* Audio machine driver */ -+static struct snd_soc_card snd_soc_omap3touchbook = { -+ .name = "omap3touchbook", -+ .platform = &omap_soc_platform, -+ .dai_link = &omap3touchbook_dai, -+ .num_links = 1, -+}; -+ -+/* twl4030 setup */ -+static struct twl4030_setup_data twl4030_setup = { -+ .ramp_delay_value = 3, -+ .sysclk = 26000, -+ .hs_extmute = 1, -+}; -+ -+/* Audio subsystem */ -+static struct snd_soc_device omap3touchbook_snd_devdata = { -+ .card = &snd_soc_omap3touchbook, -+ .codec_dev = &soc_codec_dev_twl4030, -+ .codec_data = &twl4030_setup, -+}; -+ -+static struct platform_device *omap3touchbook_snd_device; -+ -+static int __init omap3touchbook_soc_init(void) -+{ -+ int ret; -+ u8 pin_mux; -+ -+ if (!machine_is_touchbook()) { -+ pr_debug("Not Touch Book!\n"); -+ //return -ENODEV; -+ } -+ printk(KERN_INFO "Touch Book SoC init\n"); -+ -+ omap3touchbook_snd_device = platform_device_alloc("soc-audio", -1); -+ if (!omap3touchbook_snd_device) { -+ printk(KERN_ERR "Platform device allocation failed\n"); -+ return -ENOMEM; -+ } -+ -+ platform_set_drvdata(omap3touchbook_snd_device, &omap3touchbook_snd_devdata); -+ omap3touchbook_snd_devdata.dev = &omap3touchbook_snd_device->dev; -+ *(unsigned int *)omap3touchbook_dai.cpu_dai->private_data = 1; /* McBSP2 */ -+ -+ ret = platform_device_add(omap3touchbook_snd_device); -+ if (ret) -+ goto err1; -+ -+ return 0; -+ -+err1: -+ printk(KERN_ERR "Unable to add platform device\n"); -+ platform_device_put(omap3touchbook_snd_device); -+ -+ return ret; -+} -+module_init(omap3touchbook_soc_init); -+ -+static void __exit omap3touchbook_soc_exit(void) -+{ -+ snd_soc_jack_free_gpios(&hs_jack, ARRAY_SIZE(hs_jack_gpios), -+ hs_jack_gpios); -+ -+ platform_device_unregister(omap3touchbook_snd_device); -+} -+module_exit(omap3touchbook_soc_exit); -+ -+MODULE_AUTHOR("Gregoire Gentil <gregoire@gentil.com>"); -+MODULE_LICENSE("GPL"); --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0014-backlight-add-PWM-support.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0014-backlight-add-PWM-support.patch deleted file mode 100644 index d517f07..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0014-backlight-add-PWM-support.patch +++ /dev/null @@ -1,126 +0,0 @@ -From cc8cb0d0731c7a0517653e65c754051a69f34c3e Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Wed, 31 Mar 2010 11:14:04 +0200 -Subject: [PATCH 14/17] backlight: add PWM support - ---- - drivers/video/backlight/backlight.c | 81 +++++++++++++++++++++++++++++++++++ - include/linux/backlight.h | 3 + - 2 files changed, 84 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c -index 7898707..615f40f 100644 ---- a/drivers/video/backlight/backlight.c -+++ b/drivers/video/backlight/backlight.c -@@ -226,6 +226,84 @@ static void bl_device_release(struct device *dev) - kfree(bd); - } - -+static ssize_t backlight_show_boost(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ struct backlight_device *bd = to_backlight_device(dev); -+ return sprintf(buf, "%u\n", bd->props.boost); -+} -+ -+static ssize_t backlight_store_boost(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -+{ -+ unsigned long i; -+ struct backlight_device *bd = to_backlight_device(dev); -+ -+ if (strict_strtoul(buf, 10, &i)) -+ return -EINVAL; -+ -+ mutex_lock(&bd->ops_lock); -+ if (bd->ops) -+ { -+ if (i) -+ bd->props.boost = 1; -+ else -+ bd->props.boost = 0; -+ backlight_update_status(bd); -+ } -+ mutex_unlock(&bd->ops_lock); -+ -+ return count; -+} -+ -+static ssize_t backlight_show_pwm_fq(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ struct backlight_device *bd = to_backlight_device(dev); -+ return sprintf(buf, "%u\n", bd->props.pwm_fq); -+} -+ -+static ssize_t backlight_store_pwm_fq(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -+{ -+ unsigned long i; -+ struct backlight_device *bd = to_backlight_device(dev); -+ -+ if (strict_strtoul(buf, 10, &i)) -+ return -EINVAL; -+ -+ mutex_lock(&bd->ops_lock); -+ if (bd->ops) -+ { -+ bd->props.pwm_fq = i; -+ backlight_update_status(bd); -+ } -+ mutex_unlock(&bd->ops_lock); -+ -+ return count; -+} -+ -+static ssize_t backlight_show_min_duty(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ struct backlight_device *bd = to_backlight_device(dev); -+ return sprintf(buf, "%u\n", bd->props.min_duty); -+} -+ -+static ssize_t backlight_store_min_duty(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -+{ -+ unsigned long i; -+ struct backlight_device *bd = to_backlight_device(dev); -+ -+ if (strict_strtoul(buf, 10, &i)) -+ return -EINVAL; -+ -+ mutex_lock(&bd->ops_lock); -+ if (bd->ops) -+ { -+ bd->props.min_duty = i; -+ backlight_update_status(bd); -+ } -+ mutex_unlock(&bd->ops_lock); -+ -+ return count; -+} -+ - static struct device_attribute bl_device_attributes[] = { - __ATTR(bl_power, 0644, backlight_show_power, backlight_store_power), - __ATTR(brightness, 0666, backlight_show_brightness, -@@ -233,6 +311,9 @@ static struct device_attribute bl_device_attributes[] = { - __ATTR(actual_brightness, 0444, backlight_show_actual_brightness, - NULL), - __ATTR(max_brightness, 0444, backlight_show_max_brightness, NULL), -+ __ATTR(boost, 0666, backlight_show_boost, backlight_store_boost), -+ __ATTR(pwm_fq, 0666, backlight_show_pwm_fq, backlight_store_pwm_fq), -+ __ATTR(min_duty, 0666, backlight_show_min_duty, backlight_store_min_duty), - __ATTR_NULL, - }; - -diff --git a/include/linux/backlight.h b/include/linux/backlight.h -index 0f5f578..f3a9b9f 100644 ---- a/include/linux/backlight.h -+++ b/include/linux/backlight.h -@@ -64,6 +64,9 @@ struct backlight_properties { - int fb_blank; - /* Flags used to signal drivers of state changes */ - /* Upper 4 bits are reserved for driver internal use */ -+ int boost; -+ int pwm_fq; -+ int min_duty; - unsigned int state; - - #define BL_CORE_SUSPENDED (1 << 0) /* backlight is suspended */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0015-Forward-port-TWL4030-BCI-driver-from-2.6.29-to-2.6.3.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0015-Forward-port-TWL4030-BCI-driver-from-2.6.29-to-2.6.3.patch deleted file mode 100644 index 562c459..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0015-Forward-port-TWL4030-BCI-driver-from-2.6.29-to-2.6.3.patch +++ /dev/null @@ -1,1367 +0,0 @@ -From c3a08f3d696866508ef2b5e2fd065b8295b3e1a8 Mon Sep 17 00:00:00 2001 -From: Tim Yamin <plasm@roo.me.uk> -Date: Sun, 9 May 2010 10:14:23 +0200 -Subject: [PATCH 15/17] Forward port TWL4030 BCI driver from 2.6.29 to 2.6.31 with AI enhancements. - -Signed-off-by: Tim Yamin <plasm@roo.me.uk> ---- - drivers/power/Kconfig | 7 + - drivers/power/Makefile | 1 + - drivers/power/twl4030_bci_battery.c | 1307 +++++++++++++++++++++++++++++++++++ - include/linux/i2c/twl.h | 1 + - 4 files changed, 1316 insertions(+), 0 deletions(-) - create mode 100644 drivers/power/twl4030_bci_battery.c - -diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig -index d4b3d67..8345b3f 100644 ---- a/drivers/power/Kconfig -+++ b/drivers/power/Kconfig -@@ -124,4 +124,11 @@ config CHARGER_PCF50633 - help - Say Y to include support for NXP PCF50633 Main Battery Charger. - -+config TWL4030_BCI_BATTERY -+ tristate "OMAP TWL4030 BCI Battery driver" -+ depends on TWL4030_CORE && TWL4030_MADC -+ help -+ Support for OMAP TWL4030 BCI Battery driver. -+ This driver can give support for TWL4030 Battery Charge Interface. -+ - endif # POWER_SUPPLY -diff --git a/drivers/power/Makefile b/drivers/power/Makefile -index 573597c..7801da7 100644 ---- a/drivers/power/Makefile -+++ b/drivers/power/Makefile -@@ -31,3 +31,4 @@ obj-$(CONFIG_BATTERY_BQ27x00) += bq27x00_battery.o - obj-$(CONFIG_BATTERY_DA9030) += da9030_battery.o - obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o - obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o -+obj-$(CONFIG_TWL4030_BCI_BATTERY) += twl4030_bci_battery.o -diff --git a/drivers/power/twl4030_bci_battery.c b/drivers/power/twl4030_bci_battery.c -new file mode 100644 -index 0000000..0876fc3 ---- /dev/null -+++ b/drivers/power/twl4030_bci_battery.c -@@ -0,0 +1,1307 @@ -+/* -+ * linux/drivers/power/twl4030_bci_battery.c -+ * -+ * OMAP2430/3430 BCI battery driver for Linux -+ * -+ * Copyright (C) 2008 Texas Instruments, Inc. -+ * Author: Texas Instruments, Inc. -+ * -+ * Copyright (C) 2010 Always Innovating -+ * Author: Tim Yamin <plasm@roo.me.uk> -+ * -+ * This package is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED -+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. -+ */ -+ -+/* Boot with automatic charge */ -+#define CHARGE_MODE 1 -+ -+#include <linux/init.h> -+#include <linux/module.h> -+#include <linux/device.h> -+#include <linux/interrupt.h> -+#include <linux/delay.h> -+#include <linux/platform_device.h> -+#include <linux/i2c/twl.h> -+#include <linux/power_supply.h> -+#include <linux/i2c/twl4030-madc.h> -+ -+#define T2_BATTERY_VOLT 0x04 -+#define T2_BATTERY_TEMP 0x06 -+#define T2_BATTERY_CUR 0x08 -+ -+/* charger constants */ -+#define NO_PW_CONN 0 -+#define AC_PW_CONN 0x01 -+#define USB_PW_CONN 0x02 -+ -+/* TWL4030_MODULE_USB */ -+#define REG_POWER_CTRL 0x0AC -+#define OTG_EN 0x020 -+#define REG_PHY_CLK_CTRL 0x0FE -+#define REG_PHY_CLK_CTRL_STS 0x0FF -+#define PHY_DPLL_CLK 0x01 -+ -+#define REG_BCICTL1 0x023 -+#define REG_BCICTL2 0x024 -+#define CGAIN 0x020 -+#define ITHEN 0x010 -+#define ITHSENS 0x007 -+ -+/* Boot BCI flag bits */ -+#define BCIAUTOWEN 0x020 -+#define CONFIG_DONE 0x010 -+#define CVENAC 0x004 -+#define BCIAUTOUSB 0x002 -+#define BCIAUTOAC 0x001 -+#define BCIMSTAT_MASK 0x03F -+ -+/* Boot BCI register */ -+#define REG_BOOT_BCI 0x007 -+#define REG_CTRL1 0x00 -+#define REG_SW1SELECT_MSB 0x07 -+#define SW1_CH9_SEL 0x02 -+#define REG_CTRL_SW1 0x012 -+#define SW1_TRIGGER 0x020 -+#define EOC_SW1 0x002 -+#define REG_GPCH9 0x049 -+#define REG_STS_HW_CONDITIONS 0x0F -+#define STS_VBUS 0x080 -+#define STS_CHG 0x02 -+#define REG_BCIMSTATEC 0x02 -+#define REG_BCIMFSTS4 0x010 -+#define REG_BCIMFSTS2 0x00E -+#define REG_BCIMFSTS3 0x00F -+#define REG_BCIMFSTS1 0x001 -+#define USBFASTMCHG 0x004 -+#define BATSTSPCHG 0x004 -+#define BATSTSMCHG 0x040 -+#define VBATOV4 0x020 -+#define VBATOV3 0x010 -+#define VBATOV2 0x008 -+#define VBATOV1 0x004 -+#define REG_BB_CFG 0x012 -+#define BBCHEN 0x010 -+ -+/* GPBR */ -+#define REG_GPBR1 0x0c -+#define MADC_HFCLK_EN 0x80 -+#define DEFAULT_MADC_CLK_EN 0x10 -+ -+/* Power supply charge interrupt */ -+#define REG_PWR_ISR1 0x00 -+#define REG_PWR_IMR1 0x01 -+#define REG_PWR_EDR1 0x05 -+#define REG_PWR_SIH_CTRL 0x007 -+ -+#define USB_PRES 0x004 -+#define CHG_PRES 0x002 -+ -+#define USB_PRES_RISING 0x020 -+#define USB_PRES_FALLING 0x010 -+#define CHG_PRES_RISING 0x008 -+#define CHG_PRES_FALLING 0x004 -+#define AC_STATEC 0x20 -+#define COR 0x004 -+ -+/* interrupt status registers */ -+#define REG_BCIISR1A 0x0 -+#define REG_BCIISR2A 0x01 -+ -+/* Interrupt flags bits BCIISR1 */ -+#define BATSTS_ISR1 0x080 -+#define VBATLVL_ISR1 0x001 -+ -+/* Interrupt mask registers for int1*/ -+#define REG_BCIIMR1A 0x002 -+#define REG_BCIIMR2A 0x003 -+ -+ /* Interrupt masks for BCIIMR1 */ -+#define BATSTS_IMR1 0x080 -+#define VBATLVL_IMR1 0x001 -+ -+/* Interrupt edge detection register */ -+#define REG_BCIEDR1 0x00A -+#define REG_BCIEDR2 0x00B -+#define REG_BCIEDR3 0x00C -+ -+/* BCIEDR2 */ -+#define BATSTS_EDRRISIN 0x080 -+#define BATSTS_EDRFALLING 0x040 -+ -+/* BCIEDR3 */ -+#define VBATLVL_EDRRISIN 0x02 -+ -+/* BCIIREF1 */ -+#define REG_BCIIREF1 0x027 -+#define REG_BCIIREF2 0x028 -+ -+/* BCIMFTH1 */ -+#define REG_BCIMFTH1 0x016 -+ -+/* Key */ -+#define KEY_IIREF 0xE7 -+#define KEY_FTH1 0xD2 -+#define REG_BCIMFKEY 0x011 -+ -+/* Step size and prescaler ratio */ -+#define TEMP_STEP_SIZE 147 -+#define TEMP_PSR_R 100 -+ -+#define VOLT_STEP_SIZE 588 -+#define VOLT_PSR_R 100 -+ -+#define CURR_STEP_SIZE 147 -+#define CURR_PSR_R1 44 -+#define CURR_PSR_R2 80 -+ -+#define BK_VOLT_STEP_SIZE 441 -+#define BK_VOLT_PSR_R 100 -+ -+#define ENABLE 1 -+#define DISABLE 1 -+ -+struct twl4030_bci_device_info { -+ struct device *dev; -+ -+ unsigned long update_time; -+ int voltage_uV; -+ int bk_voltage_uV; -+ int current_uA; -+ int temp_C; -+ int charge_rsoc; -+ int charge_status; -+ -+ struct power_supply bat; -+ struct power_supply bk_bat; -+ struct delayed_work twl4030_bci_monitor_work; -+ struct delayed_work twl4030_bk_bci_monitor_work; -+ -+ struct twl4030_bci_platform_data *pdata; -+}; -+ -+static int usb_charger_flag; -+static int LVL_1, LVL_2, LVL_3, LVL_4; -+ -+static int read_bci_val(u8 reg_1); -+static inline int clear_n_set(u8 mod_no, u8 clear, u8 set, u8 reg); -+static int twl4030charger_presence(void); -+ -+/* -+ * Report and clear the charger presence event. -+ */ -+static inline int twl4030charger_presence_evt(void) -+{ -+ int ret; -+ u8 chg_sts, set = 0, clear = 0; -+ -+ /* read charger power supply status */ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &chg_sts, -+ REG_STS_HW_CONDITIONS); -+ if (ret) -+ return IRQ_NONE; -+ -+ if (chg_sts & STS_CHG) { /* If the AC charger have been connected */ -+ /* configuring falling edge detection for CHG_PRES */ -+ set = CHG_PRES_FALLING; -+ clear = CHG_PRES_RISING; -+ } else { /* If the AC charger have been disconnected */ -+ /* configuring rising edge detection for CHG_PRES */ -+ set = CHG_PRES_RISING; -+ clear = CHG_PRES_FALLING; -+ } -+ -+ /* Update the interrupt edge detection register */ -+ clear_n_set(TWL4030_MODULE_INT, clear, set, REG_PWR_EDR1); -+ -+ return 0; -+} -+ -+/* -+ * Interrupt service routine -+ * -+ * Attends to TWL 4030 power module interruptions events, specifically -+ * USB_PRES (USB charger presence) CHG_PRES (AC charger presence) events -+ * -+ */ -+static irqreturn_t twl4030charger_interrupt(int irq, void *_di) -+{ -+ struct twl4030_bci_device_info *di = _di; -+ -+#ifdef CONFIG_LOCKDEP -+ /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which -+ * we don't want and can't tolerate. Although it might be -+ * friendlier not to borrow this thread context... -+ */ -+ local_irq_enable(); -+#endif -+ -+ twl4030charger_presence_evt(); -+ power_supply_changed(&di->bat); -+ -+ return IRQ_HANDLED; -+} -+ -+/* -+ * This function handles the twl4030 battery presence interrupt -+ */ -+static int twl4030battery_presence_evt(void) -+{ -+ int ret; -+ u8 batstsmchg, batstspchg; -+ -+ /* check for the battery presence in main charge*/ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, -+ &batstsmchg, REG_BCIMFSTS3); -+ if (ret) -+ return ret; -+ -+ /* check for the battery presence in precharge */ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_PRECHARGE, -+ &batstspchg, REG_BCIMFSTS1); -+ if (ret) -+ return ret; -+ -+ /* -+ * REVISIT: Physically inserting/removing the batt -+ * does not seem to generate an int on 3430ES2 SDP. -+ */ -+ if ((batstspchg & BATSTSPCHG) || (batstsmchg & BATSTSMCHG)) { -+ /* In case of the battery insertion event */ -+ ret = clear_n_set(TWL4030_MODULE_INTERRUPTS, BATSTS_EDRRISIN, -+ BATSTS_EDRFALLING, REG_BCIEDR2); -+ if (ret) -+ return ret; -+ } else { -+ /* In case of the battery removal event */ -+ ret = clear_n_set(TWL4030_MODULE_INTERRUPTS, BATSTS_EDRFALLING, -+ BATSTS_EDRRISIN, REG_BCIEDR2); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+/* -+ * This function handles the twl4030 battery voltage level interrupt. -+ */ -+static int twl4030battery_level_evt(void) -+{ -+ int ret; -+ u8 mfst; -+ -+ /* checking for threshold event */ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, -+ &mfst, REG_BCIMFSTS2); -+ if (ret) -+ return ret; -+ -+ /* REVISIT could use a bitmap */ -+ if (mfst & VBATOV4) { -+ LVL_4 = 1; -+ LVL_3 = 0; -+ LVL_2 = 0; -+ LVL_1 = 0; -+ } else if (mfst & VBATOV3) { -+ LVL_4 = 0; -+ LVL_3 = 1; -+ LVL_2 = 0; -+ LVL_1 = 0; -+ } else if (mfst & VBATOV2) { -+ LVL_4 = 0; -+ LVL_3 = 0; -+ LVL_2 = 1; -+ LVL_1 = 0; -+ } else { -+ LVL_4 = 0; -+ LVL_3 = 0; -+ LVL_2 = 0; -+ LVL_1 = 1; -+ } -+ -+ return 0; -+} -+ -+/* -+ * Interrupt service routine -+ * -+ * Attends to BCI interruptions events, -+ * specifically BATSTS (battery connection and removal) -+ * VBATOV (main battery voltage threshold) events -+ * -+ */ -+static irqreturn_t twl4030battery_interrupt(int irq, void *_di) -+{ -+ u8 isr1a_val, isr2a_val, clear_2a, clear_1a; -+ int ret; -+ -+#ifdef CONFIG_LOCKDEP -+ /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which -+ * we don't want and can't tolerate. Although it might be -+ * friendlier not to borrow this thread context... -+ */ -+ local_irq_enable(); -+#endif -+ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_INTERRUPTS, &isr1a_val, -+ REG_BCIISR1A); -+ if (ret) -+ return IRQ_NONE; -+ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_INTERRUPTS, &isr2a_val, -+ REG_BCIISR2A); -+ if (ret) -+ return IRQ_NONE; -+ -+ clear_2a = (isr2a_val & VBATLVL_ISR1) ? (VBATLVL_ISR1) : 0; -+ clear_1a = (isr1a_val & BATSTS_ISR1) ? (BATSTS_ISR1) : 0; -+ -+ /* cleaning BCI interrupt status flags */ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, -+ clear_1a , REG_BCIISR1A); -+ if (ret) -+ return IRQ_NONE; -+ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, -+ clear_2a , REG_BCIISR2A); -+ if (ret) -+ return IRQ_NONE; -+ -+ /* battery connetion or removal event */ -+ if (isr1a_val & BATSTS_ISR1) -+ twl4030battery_presence_evt(); -+ /* battery voltage threshold event*/ -+ else if (isr2a_val & VBATLVL_ISR1) -+ twl4030battery_level_evt(); -+ else -+ return IRQ_NONE; -+ -+ return IRQ_HANDLED; -+} -+ -+/* -+ * Enable/Disable hardware battery level event notifications. -+ */ -+static int twl4030battery_hw_level_en(int enable) -+{ -+ int ret; -+ -+ if (enable) { -+ /* unmask VBATOV interrupt for INT1 */ -+ ret = clear_n_set(TWL4030_MODULE_INTERRUPTS, VBATLVL_IMR1, -+ 0, REG_BCIIMR2A); -+ if (ret) -+ return ret; -+ -+ /* configuring interrupt edge detection for VBATOv */ -+ ret = clear_n_set(TWL4030_MODULE_INTERRUPTS, 0, -+ VBATLVL_EDRRISIN, REG_BCIEDR3); -+ if (ret) -+ return ret; -+ } else { -+ /* mask VBATOV interrupt for INT1 */ -+ ret = clear_n_set(TWL4030_MODULE_INTERRUPTS, 0, -+ VBATLVL_IMR1, REG_BCIIMR2A); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+/* -+ * Enable/disable hardware battery presence event notifications. -+ */ -+static int twl4030battery_hw_presence_en(int enable) -+{ -+ int ret; -+ -+ if (enable) { -+ /* unmask BATSTS interrupt for INT1 */ -+ ret = clear_n_set(TWL4030_MODULE_INTERRUPTS, BATSTS_IMR1, -+ 0, REG_BCIIMR1A); -+ if (ret) -+ return ret; -+ -+ /* configuring interrupt edge for BATSTS */ -+ ret = clear_n_set(TWL4030_MODULE_INTERRUPTS, 0, -+ BATSTS_EDRRISIN | BATSTS_EDRFALLING, REG_BCIEDR2); -+ if (ret) -+ return ret; -+ } else { -+ /* mask BATSTS interrupt for INT1 */ -+ ret = clear_n_set(TWL4030_MODULE_INTERRUPTS, 0, -+ BATSTS_IMR1, REG_BCIIMR1A); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+/* -+ * Enable/Disable AC Charge funtionality. -+ */ -+static int twl4030charger_ac_en(int enable, int automatic) -+{ -+ int ret; -+ -+ if (enable) { -+ /* forcing the field BCIAUTOAC (BOOT_BCI[0) to 1 */ -+ if(!automatic) { -+ ret = clear_n_set(TWL4030_MODULE_PM_MASTER, BCIAUTOAC | CVENAC, -+ (CONFIG_DONE | BCIAUTOWEN), -+ REG_BOOT_BCI); -+ } else { -+ ret = clear_n_set(TWL4030_MODULE_PM_MASTER, 0, -+ (CONFIG_DONE | BCIAUTOWEN | BCIAUTOAC | CVENAC), -+ REG_BOOT_BCI); -+ } -+ if (ret) -+ return ret; -+ } else { -+ /* forcing the field BCIAUTOAC (BOOT_BCI[0) to 0*/ -+ ret = clear_n_set(TWL4030_MODULE_PM_MASTER, BCIAUTOAC, -+ (CONFIG_DONE | BCIAUTOWEN), -+ REG_BOOT_BCI); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+/* -+ * Enable/Disable USB Charge funtionality. -+ */ -+int twl4030charger_usb_en(int enable) -+{ -+ u8 value; -+ int ret; -+ unsigned long timeout; -+ -+ if (enable) { -+ /* Check for USB charger conneted */ -+ ret = twl4030charger_presence(); -+ if (ret < 0) -+ return ret; -+ -+ if (!(ret & USB_PW_CONN)) -+ return -ENXIO; -+ -+ /* forcing the field BCIAUTOUSB (BOOT_BCI[1]) to 1 */ -+ ret = clear_n_set(TWL4030_MODULE_PM_MASTER, 0, -+ (CONFIG_DONE | BCIAUTOWEN | BCIAUTOUSB), -+ REG_BOOT_BCI); -+ if (ret) -+ return ret; -+ -+ ret = clear_n_set(TWL4030_MODULE_USB, 0, PHY_DPLL_CLK, -+ REG_PHY_CLK_CTRL); -+ if (ret) -+ return ret; -+ -+ value = 0; -+ timeout = jiffies + msecs_to_jiffies(50); -+ -+ while ((!(value & PHY_DPLL_CLK)) && -+ time_before(jiffies, timeout)) { -+ udelay(10); -+ ret = twl_i2c_read_u8(TWL4030_MODULE_USB, &value, -+ REG_PHY_CLK_CTRL_STS); -+ if (ret) -+ return ret; -+ } -+ -+ /* OTG_EN (POWER_CTRL[5]) to 1 */ -+ ret = clear_n_set(TWL4030_MODULE_USB, 0, OTG_EN, -+ REG_POWER_CTRL); -+ if (ret) -+ return ret; -+ -+ mdelay(50); -+ -+ /* forcing USBFASTMCHG(BCIMFSTS4[2]) to 1 */ -+ ret = clear_n_set(TWL4030_MODULE_MAIN_CHARGE, 0, -+ USBFASTMCHG, REG_BCIMFSTS4); -+ if (ret) -+ return ret; -+ } else { -+ twl4030charger_presence(); -+ ret = clear_n_set(TWL4030_MODULE_PM_MASTER, BCIAUTOUSB, -+ (CONFIG_DONE | BCIAUTOWEN), REG_BOOT_BCI); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+/* -+ * Return battery temperature -+ * Or < 0 on failure. -+ */ -+static int twl4030battery_temperature(struct twl4030_bci_device_info *di) -+{ -+ u8 val; -+ int temp, curr, volt, res, ret; -+ -+ /* Is a temperature table specified? */ -+ if (!di->pdata->tblsize) -+ return 0; -+ -+ /* Getting and calculating the thermistor voltage */ -+ ret = read_bci_val(T2_BATTERY_TEMP); -+ if (ret < 0) -+ return ret; -+ -+ volt = (ret * TEMP_STEP_SIZE) / TEMP_PSR_R; -+ -+ /* Getting and calculating the supply current in micro ampers */ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &val, -+ REG_BCICTL2); -+ if (ret) -+ return 0; -+ -+ curr = ((val & ITHSENS) + 1) * 10; -+ -+ /* Getting and calculating the thermistor resistance in ohms*/ -+ res = volt * 1000 / curr; -+ -+ /*calculating temperature*/ -+ for (temp = 58; temp >= 0; temp--) { -+ int actual = di->pdata->battery_tmp_tbl[temp]; -+ if ((actual - res) >= 0) -+ break; -+ } -+ -+ /* Negative temperature */ -+ if (temp < 3) { -+ if (temp == 2) -+ temp = -1; -+ else if (temp == 1) -+ temp = -2; -+ else -+ temp = -3; -+ } -+ -+ return temp + 1; -+} -+ -+/* -+ * Return battery voltage -+ * Or < 0 on failure. -+ */ -+static int twl4030battery_voltage(void) -+{ -+ int volt = read_bci_val(T2_BATTERY_VOLT); -+ return (volt * VOLT_STEP_SIZE) / VOLT_PSR_R; -+} -+ -+/* -+ * Get latest battery voltage (using MADC) -+ * -+ * When the BCI is not charging, the BCI voltage registers are not -+ * updated and are 'frozen' but the data can be read through the -+ * MADC. -+ */ -+static int twl4030battery_voltage_madc(void) -+{ -+ struct twl4030_madc_request req; -+ -+ req.channels = (1 << 12); -+ req.do_avg = 0; -+ req.method = TWL4030_MADC_SW1; -+ req.active = 0; -+ req.func_cb = NULL; -+ twl4030_madc_conversion(&req); -+ -+ return (((int) req.rbuf[12]) * VOLT_STEP_SIZE) / VOLT_PSR_R; -+} -+ -+/* -+ * Return the battery current -+ * Or < 0 on failure. -+ */ -+static int twl4030battery_current(void) -+{ -+ int ret, curr = read_bci_val(T2_BATTERY_CUR); -+ u8 val; -+ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &val, -+ REG_BCICTL1); -+ if (ret) -+ return ret; -+ -+ if (val & CGAIN) /* slope of 0.44 mV/mA */ -+ return (curr * CURR_STEP_SIZE) / CURR_PSR_R1; -+ else /* slope of 0.88 mV/mA */ -+ return (curr * CURR_STEP_SIZE) / CURR_PSR_R2; -+} -+ -+/* -+ * Return the battery backup voltage -+ * Or < 0 on failure. -+ */ -+static int twl4030backupbatt_voltage(void) -+{ -+ struct twl4030_madc_request req; -+ int temp; -+ -+ req.channels = (1 << 9); -+ req.do_avg = 0; -+ req.method = TWL4030_MADC_SW1; -+ req.active = 0; -+ req.func_cb = NULL; -+ twl4030_madc_conversion(&req); -+ temp = (u16)req.rbuf[9]; -+ -+ return (temp * BK_VOLT_STEP_SIZE) / BK_VOLT_PSR_R; -+} -+ -+/* -+ * Returns an integer value, that means, -+ * NO_PW_CONN no power supply is connected -+ * AC_PW_CONN if the AC power supply is connected -+ * USB_PW_CONN if the USB power supply is connected -+ * AC_PW_CONN + USB_PW_CONN if USB and AC power supplies are both connected -+ * -+ * Or < 0 on failure. -+ */ -+static int twl4030charger_presence(void) -+{ -+ int ret; -+ u8 hwsts; -+ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &hwsts, -+ REG_STS_HW_CONDITIONS); -+ if (ret) { -+ pr_err("twl4030_bci: error reading STS_HW_CONDITIONS\n"); -+ return ret; -+ } -+ -+ ret = (hwsts & STS_CHG) ? AC_PW_CONN : NO_PW_CONN; -+ ret += (hwsts & STS_VBUS) ? USB_PW_CONN : NO_PW_CONN; -+ -+ if (ret & USB_PW_CONN) -+ usb_charger_flag = 1; -+ else -+ usb_charger_flag = 0; -+ -+ return ret; -+ -+} -+ -+/* -+ * Returns the main charge FSM status -+ * Or < 0 on failure. -+ */ -+static int twl4030bci_status(void) -+{ -+ int ret; -+ u8 status; -+ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, -+ &status, REG_BCIMSTATEC); -+ if (ret) { -+ pr_err("twl4030_bci: error reading BCIMSTATEC\n"); -+ return ret; -+ } -+ -+#ifdef DEBUG -+ printk("BCI DEBUG: BCIMSTATEC Charge state is 0x%x\n", status); -+#endif -+ return (int) (status & BCIMSTAT_MASK); -+} -+ -+static int read_bci_val(u8 reg) -+{ -+ int ret, temp; -+ u8 val; -+ -+ /* reading MSB */ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &val, -+ reg + 1); -+ if (ret) -+ return ret; -+ -+ temp = ((int)(val & 0x03)) << 8; -+ -+ /* reading LSB */ -+ ret = twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &val, -+ reg); -+ if (ret) -+ return ret; -+ -+ return temp | val; -+} -+ -+/* -+ * Settup the twl4030 BCI module to enable backup -+ * battery charging. -+ */ -+static int twl4030backupbatt_voltage_setup(void) -+{ -+ int ret; -+ -+ /* Starting backup batery charge */ -+ ret = clear_n_set(TWL4030_MODULE_PM_RECEIVER, 0, BBCHEN, -+ REG_BB_CFG); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+/* -+ * Settup the twl4030 BCI module to measure battery -+ * temperature -+ */ -+static int twl4030battery_temp_setup(void) -+{ -+#ifdef DEBUG -+ u8 i; -+#endif -+ u8 ret; -+ -+ /* Enabling thermistor current */ -+ ret = clear_n_set(TWL4030_MODULE_MAIN_CHARGE, 0, 0x1B, -+ REG_BCICTL1); -+ if (ret) -+ return ret; -+ -+#ifdef DEBUG -+ twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &ret, REG_BOOT_BCI); -+ printk("BCI DEBUG: BOOT_BCI Value is 0x%x\n", ret); -+ -+ twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &ret, REG_STS_HW_CONDITIONS); -+ printk("BCI DEBUG: STS_HW_CONDITIONS Value is 0x%x\n", ret); -+ -+ twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &ret, REG_BCICTL1); -+ printk("BCI DEBUG: BCICTL1 Value is 0x%x\n", ret); -+ -+ twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &ret, REG_BCICTL2); -+ printk("BCI DEBUG: BCICTL2 Value is 0x%x\n", ret); -+ -+ twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &ret, 0x0); -+ printk("BCI DEBUG: BCIMDEN Value is 0x%x\n", ret); -+ -+ twl_i2c_read_u8(TWL4030_MODULE_INTBR, &ret, REG_GPBR1); -+ printk("BCI DEBUG: GPBR1 Value is 0x%x\n", ret); -+ -+ for(i = 0x0; i <= 0x32; i++) -+ { -+ twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &ret, i); -+ printk("BCI DEBUG: BCI 0x%x Value is 0x%x\n", i, ret); -+ } -+#endif -+ -+ return 0; -+} -+ -+/* -+ * Sets and clears bits on an given register on a given module -+ */ -+static inline int clear_n_set(u8 mod_no, u8 clear, u8 set, u8 reg) -+{ -+ int ret; -+ u8 val = 0; -+ -+ /* Gets the initial register value */ -+ ret = twl_i2c_read_u8(mod_no, &val, reg); -+ if (ret) -+ return ret; -+ /* Clearing all those bits to clear */ -+ val &= ~(clear); -+ -+ /* Setting all those bits to set */ -+ val |= set; -+ -+ /* Update the register */ -+ ret = twl_i2c_write_u8(mod_no, val, reg); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static enum power_supply_property twl4030_bci_battery_props[] = { -+ POWER_SUPPLY_PROP_STATUS, -+ POWER_SUPPLY_PROP_ONLINE, -+ POWER_SUPPLY_PROP_VOLTAGE_NOW, -+ POWER_SUPPLY_PROP_CURRENT_NOW, -+ POWER_SUPPLY_PROP_CAPACITY, -+ POWER_SUPPLY_PROP_TEMP, -+}; -+ -+static enum power_supply_property twl4030_bk_bci_battery_props[] = { -+ POWER_SUPPLY_PROP_VOLTAGE_NOW, -+}; -+ -+static void -+twl4030_bk_bci_battery_read_status(struct twl4030_bci_device_info *di) -+{ -+ di->bk_voltage_uV = twl4030backupbatt_voltage(); -+} -+ -+static void twl4030_bk_bci_battery_work(struct work_struct *work) -+{ -+ struct twl4030_bci_device_info *di = container_of(work, -+ struct twl4030_bci_device_info, -+ twl4030_bk_bci_monitor_work.work); -+ -+ if(!di->pdata->no_backup_battery) -+ twl4030_bk_bci_battery_read_status(di); -+ schedule_delayed_work(&di->twl4030_bk_bci_monitor_work, 500); -+} -+ -+static void twl4030_bci_battery_read_status(struct twl4030_bci_device_info *di) -+{ -+ if(di->charge_status != POWER_SUPPLY_STATUS_DISCHARGING) { -+ di->temp_C = twl4030battery_temperature(di); -+ di->voltage_uV = twl4030battery_voltage(); -+ di->current_uA = twl4030battery_current(); -+ } -+} -+ -+static void -+twl4030_bci_battery_update_status(struct twl4030_bci_device_info *di) -+{ -+ if (power_supply_am_i_supplied(&di->bat)) -+ di->charge_status = POWER_SUPPLY_STATUS_CHARGING; -+ else -+ di->charge_status = POWER_SUPPLY_STATUS_DISCHARGING; -+ twl4030_bci_battery_read_status(di); -+} -+ -+static void twl4030_bci_battery_work(struct work_struct *work) -+{ -+ struct twl4030_bci_device_info *di = container_of(work, -+ struct twl4030_bci_device_info, twl4030_bci_monitor_work.work); -+ -+ twl4030_bci_battery_update_status(di); -+ schedule_delayed_work(&di->twl4030_bci_monitor_work, 100); -+} -+ -+ -+#define to_twl4030_bci_device_info(x) container_of((x), \ -+ struct twl4030_bci_device_info, bat); -+ -+static void twl4030_bci_battery_external_power_changed(struct power_supply *psy) -+{ -+ struct twl4030_bci_device_info *di = to_twl4030_bci_device_info(psy); -+ -+ cancel_delayed_work(&di->twl4030_bci_monitor_work); -+ schedule_delayed_work(&di->twl4030_bci_monitor_work, 0); -+} -+ -+#define to_twl4030_bk_bci_device_info(x) container_of((x), \ -+ struct twl4030_bci_device_info, bk_bat); -+ -+static ssize_t -+show_charge_current(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ u8 ctl; -+ int ret = read_bci_val(REG_BCIIREF1) & 0x1FF; -+ twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &ctl, REG_BCICTL1); -+ -+ if (ctl & CGAIN) -+ ret |= 0x200; -+ -+#ifdef DEBUG -+ /* Dump debug */ -+ twl4030battery_temp_setup(); -+#endif -+ -+ return sprintf(buf, "%d\n", ret); -+} -+ -+static ssize_t -+set_charge_current(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -+{ -+ unsigned long newCurrent; -+ int ret; -+ -+ ret = strict_strtoul(buf, 10, &newCurrent); -+ if (ret) -+ return -EINVAL; -+ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, KEY_IIREF, REG_BCIMFKEY); -+ if (ret) -+ return ret; -+ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, newCurrent & 0xff, REG_BCIIREF1); -+ if (ret) -+ return ret; -+ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, KEY_IIREF, REG_BCIMFKEY); -+ if (ret) -+ return ret; -+ -+ ret = twl_i2c_write_u8(TWL4030_MODULE_MAIN_CHARGE, (newCurrent >> 8) & 0x1, REG_BCIIREF2); -+ if (ret) -+ return ret; -+ -+ /* Set software-controlled charge */ -+ twl4030charger_ac_en(ENABLE, 0); -+ -+ /* Set CGAIN = 0 or 1 */ -+ if(newCurrent > 511) { -+ u8 tmp; -+ -+ /* Set CGAIN = 1 -- need to wait until automatic charge turns off */ -+ while(!ret) { -+ clear_n_set(TWL4030_MODULE_MAIN_CHARGE, 0, CGAIN | 0x1B, REG_BCICTL1); -+ twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &tmp, REG_BCICTL1); -+ -+ ret = tmp & CGAIN; -+ if(!ret) -+ mdelay(50); -+ } -+ } else { -+ u8 tmp; -+ -+ /* Set CGAIN = 0 -- need to wait until automatic charge turns off */ -+ while(!ret) { -+ clear_n_set(TWL4030_MODULE_MAIN_CHARGE, CGAIN, 0x1B, REG_BCICTL1); -+ twl_i2c_read_u8(TWL4030_MODULE_MAIN_CHARGE, &tmp, REG_BCICTL1); -+ -+ ret = !(tmp & CGAIN); -+ if(!ret) -+ mdelay(50); -+ } -+ } -+ -+ /* Set automatic charge (CGAIN = 0/1 persists) */ -+ twl4030charger_ac_en(ENABLE, 1); -+ -+ return count; -+} -+ -+static ssize_t -+show_voltage(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ return sprintf(buf, "%d\n", twl4030battery_voltage_madc()); -+} -+ -+static DEVICE_ATTR(charge_current, S_IRUGO | S_IWUGO, show_charge_current, set_charge_current); -+static DEVICE_ATTR(voltage_now_madc, S_IRUGO, show_voltage, NULL); -+ -+static int twl4030_bk_bci_battery_get_property(struct power_supply *psy, -+ enum power_supply_property psp, -+ union power_supply_propval *val) -+{ -+ struct twl4030_bci_device_info *di = to_twl4030_bk_bci_device_info(psy); -+ -+ switch (psp) { -+ case POWER_SUPPLY_PROP_VOLTAGE_NOW: -+ val->intval = di->bk_voltage_uV; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int twl4030_bci_battery_get_property(struct power_supply *psy, -+ enum power_supply_property psp, -+ union power_supply_propval *val) -+{ -+ struct twl4030_bci_device_info *di; -+ int status = 0; -+ -+ di = to_twl4030_bci_device_info(psy); -+ -+ switch (psp) { -+ case POWER_SUPPLY_PROP_STATUS: -+ val->intval = di->charge_status; -+ return 0; -+ default: -+ break; -+ } -+ -+ switch (psp) { -+ case POWER_SUPPLY_PROP_VOLTAGE_NOW: -+ { -+ /* Get latest data from MADC -- not done periodically by -+ worker as this is more expensive, so only do it when we -+ are actually asked for the data... */ -+ if(di->charge_status == POWER_SUPPLY_STATUS_DISCHARGING) -+ val->intval = twl4030battery_voltage_madc(); -+ else -+ val->intval = di->voltage_uV; -+ -+ break; -+ } -+ case POWER_SUPPLY_PROP_CURRENT_NOW: -+ /* FIXME: Get from MADC */ -+ if(di->charge_status == POWER_SUPPLY_STATUS_DISCHARGING) -+ val->intval = 0; -+ else -+ val->intval = di->current_uA; -+ break; -+ case POWER_SUPPLY_PROP_TEMP: -+ val->intval = di->temp_C; -+ break; -+ case POWER_SUPPLY_PROP_ONLINE: -+ status = twl4030bci_status(); -+ if ((status & AC_STATEC) == AC_STATEC) -+ val->intval = POWER_SUPPLY_TYPE_MAINS; -+ else if (usb_charger_flag) -+ val->intval = POWER_SUPPLY_TYPE_USB; -+ else -+ val->intval = 0; -+ break; -+ case POWER_SUPPLY_PROP_CAPACITY: -+ /* Get latest data from MADC -- not done periodically by -+ worker as this is more expensive, so only do it when we -+ are actually asked for the data... */ -+ if(di->charge_status == POWER_SUPPLY_STATUS_DISCHARGING) -+ di->voltage_uV = twl4030battery_voltage_madc(); -+ -+ /* -+ * need to get the correct percentage value per the -+ * battery characteristics. Approx values for now. -+ */ -+ if (di->voltage_uV < 2894 || LVL_1) { -+ val->intval = 5; -+ LVL_1 = 0; -+ } else if ((di->voltage_uV < 3451 && di->voltage_uV > 2894) -+ || LVL_2) { -+ val->intval = 20; -+ LVL_2 = 0; -+ } else if ((di->voltage_uV < 3902 && di->voltage_uV > 3451) -+ || LVL_3) { -+ val->intval = 50; -+ LVL_3 = 0; -+ } else if ((di->voltage_uV < 3949 && di->voltage_uV > 3902) -+ || LVL_4) { -+ val->intval = 75; -+ LVL_4 = 0; -+ } else if (di->voltage_uV > 3949) -+ val->intval = 90; -+ break; -+ default: -+ return -EINVAL; -+ } -+ return 0; -+} -+ -+static char *twl4030_bci_supplied_to[] = { -+ "twl4030_bci_battery", -+}; -+ -+static int __init twl4030_bci_battery_probe(struct platform_device *pdev) -+{ -+ struct twl4030_bci_platform_data *pdata = pdev->dev.platform_data; -+ struct twl4030_bci_device_info *di; -+ int irq; -+ int ret; -+ -+ di = kzalloc(sizeof(*di), GFP_KERNEL); -+ if (!di) -+ return -ENOMEM; -+ -+ di->dev = &pdev->dev; -+ di->bat.name = "twl4030_bci_battery"; -+ di->bat.supplied_to = twl4030_bci_supplied_to; -+ di->bat.num_supplicants = ARRAY_SIZE(twl4030_bci_supplied_to); -+ di->bat.type = POWER_SUPPLY_TYPE_BATTERY; -+ di->bat.properties = twl4030_bci_battery_props; -+ di->bat.num_properties = ARRAY_SIZE(twl4030_bci_battery_props); -+ di->bat.get_property = twl4030_bci_battery_get_property; -+ di->bat.external_power_changed = -+ twl4030_bci_battery_external_power_changed; -+ -+ di->charge_status = POWER_SUPPLY_STATUS_UNKNOWN; -+ -+ di->bk_bat.name = "twl4030_bci_bk_battery"; -+ di->bk_bat.type = POWER_SUPPLY_TYPE_BATTERY; -+ di->bk_bat.properties = twl4030_bk_bci_battery_props; -+ di->bk_bat.num_properties = ARRAY_SIZE(twl4030_bk_bci_battery_props); -+ di->bk_bat.get_property = twl4030_bk_bci_battery_get_property; -+ di->bk_bat.external_power_changed = NULL; -+ di->pdata = pdata; -+ -+ /* Set up clocks */ -+ twl_i2c_write_u8(TWL4030_MODULE_INTBR, MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, REG_GPBR1); -+ -+ twl4030charger_ac_en(ENABLE, CHARGE_MODE); -+ twl4030charger_usb_en(ENABLE); -+ twl4030battery_hw_level_en(ENABLE); -+ twl4030battery_hw_presence_en(ENABLE); -+ -+ platform_set_drvdata(pdev, di); -+ -+ /* settings for temperature sensing */ -+ ret = twl4030battery_temp_setup(); -+ if (ret) -+ goto temp_setup_fail; -+ -+ /* enabling GPCH09 for read back battery voltage */ -+ if(!di->pdata->no_backup_battery) -+ { -+ ret = twl4030backupbatt_voltage_setup(); -+ if (ret) -+ goto voltage_setup_fail; -+ } -+ -+ /* REVISIT do we need to request both IRQs ?? */ -+ -+ /* request BCI interruption */ -+ irq = platform_get_irq(pdev, 1); -+ ret = request_irq(irq, twl4030battery_interrupt, -+ 0, pdev->name, NULL); -+ if (ret) { -+ dev_dbg(&pdev->dev, "could not request irq %d, status %d\n", -+ irq, ret); -+ goto batt_irq_fail; -+ } -+ -+ /* request Power interruption */ -+ irq = platform_get_irq(pdev, 0); -+ ret = request_irq(irq, twl4030charger_interrupt, -+ 0, pdev->name, di); -+ -+ if (ret) { -+ dev_dbg(&pdev->dev, "could not request irq %d, status %d\n", -+ irq, ret); -+ goto chg_irq_fail; -+ } -+ -+ ret = power_supply_register(&pdev->dev, &di->bat); -+ if (ret) { -+ dev_dbg(&pdev->dev, "failed to register main battery\n"); -+ goto batt_failed; -+ } -+ -+ INIT_DELAYED_WORK_DEFERRABLE(&di->twl4030_bci_monitor_work, -+ twl4030_bci_battery_work); -+ schedule_delayed_work(&di->twl4030_bci_monitor_work, 0); -+ -+ if(!pdata->no_backup_battery) -+ { -+ ret = power_supply_register(&pdev->dev, &di->bk_bat); -+ if (ret) { -+ dev_dbg(&pdev->dev, "failed to register backup battery\n"); -+ goto bk_batt_failed; -+ } -+ } -+ -+ ret = device_create_file(di->bat.dev, &dev_attr_voltage_now_madc); -+ ret = device_create_file(di->bat.dev, &dev_attr_charge_current); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to create sysfs entries\n"); -+ goto bk_batt_failed; -+ } -+ -+ INIT_DELAYED_WORK_DEFERRABLE(&di->twl4030_bk_bci_monitor_work, -+ twl4030_bk_bci_battery_work); -+ schedule_delayed_work(&di->twl4030_bk_bci_monitor_work, 500); -+ -+ set_charge_current (NULL, NULL, "1023", 4); -+ return 0; -+ -+bk_batt_failed: -+ if(!pdata->no_backup_battery) -+ power_supply_unregister(&di->bat); -+batt_failed: -+ free_irq(irq, di); -+chg_irq_fail: -+ irq = platform_get_irq(pdev, 1); -+ free_irq(irq, NULL); -+batt_irq_fail: -+voltage_setup_fail: -+temp_setup_fail: -+ twl4030charger_ac_en(DISABLE, CHARGE_MODE); -+ twl4030charger_usb_en(DISABLE); -+ twl4030battery_hw_level_en(DISABLE); -+ twl4030battery_hw_presence_en(DISABLE); -+ kfree(di); -+ -+ return ret; -+} -+ -+static int __exit twl4030_bci_battery_remove(struct platform_device *pdev) -+{ -+ struct twl4030_bci_device_info *di = platform_get_drvdata(pdev); -+ int irq; -+ -+ twl4030charger_ac_en(DISABLE, CHARGE_MODE); -+ twl4030charger_usb_en(DISABLE); -+ twl4030battery_hw_level_en(DISABLE); -+ twl4030battery_hw_presence_en(DISABLE); -+ -+ irq = platform_get_irq(pdev, 0); -+ free_irq(irq, di); -+ -+ irq = platform_get_irq(pdev, 1); -+ free_irq(irq, NULL); -+ -+ flush_scheduled_work(); -+ power_supply_unregister(&di->bat); -+ power_supply_unregister(&di->bk_bat); -+ platform_set_drvdata(pdev, NULL); -+ kfree(di); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int twl4030_bci_battery_suspend(struct platform_device *pdev, -+ pm_message_t state) -+{ -+ struct twl4030_bci_device_info *di = platform_get_drvdata(pdev); -+ -+ di->charge_status = POWER_SUPPLY_STATUS_UNKNOWN; -+ cancel_delayed_work(&di->twl4030_bci_monitor_work); -+ cancel_delayed_work(&di->twl4030_bk_bci_monitor_work); -+ return 0; -+} -+ -+static int twl4030_bci_battery_resume(struct platform_device *pdev) -+{ -+ struct twl4030_bci_device_info *di = platform_get_drvdata(pdev); -+ -+ schedule_delayed_work(&di->twl4030_bci_monitor_work, 0); -+ schedule_delayed_work(&di->twl4030_bk_bci_monitor_work, 50); -+ return 0; -+} -+#else -+#define twl4030_bci_battery_suspend NULL -+#define twl4030_bci_battery_resume NULL -+#endif /* CONFIG_PM */ -+ -+static struct platform_driver twl4030_bci_battery_driver = { -+ .probe = twl4030_bci_battery_probe, -+ .remove = __exit_p(twl4030_bci_battery_remove), -+ .suspend = twl4030_bci_battery_suspend, -+ .resume = twl4030_bci_battery_resume, -+ .driver = { -+ .name = "twl4030_bci", -+ }, -+}; -+ -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:twl4030_bci"); -+MODULE_AUTHOR("Texas Instruments Inc"); -+ -+static int __init twl4030_battery_init(void) -+{ -+ return platform_driver_register(&twl4030_bci_battery_driver); -+} -+module_init(twl4030_battery_init); -+ -+static void __exit twl4030_battery_exit(void) -+{ -+ platform_driver_unregister(&twl4030_bci_battery_driver); -+} -+module_exit(twl4030_battery_exit); -+ -diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h -index d975c5b..a3470ce 100644 ---- a/include/linux/i2c/twl.h -+++ b/include/linux/i2c/twl.h -@@ -442,6 +442,7 @@ struct twl4030_clock_init_data { - struct twl4030_bci_platform_data { - int *battery_tmp_tbl; - unsigned int tblsize; -+ bool no_backup_battery; - }; - - /* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */ --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0016-ARM-OMAP-omap3-touchbook-update-boardfile.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0016-ARM-OMAP-omap3-touchbook-update-boardfile.patch deleted file mode 100644 index 0dc58ab..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0016-ARM-OMAP-omap3-touchbook-update-boardfile.patch +++ /dev/null @@ -1,620 +0,0 @@ -From 67a87638586acaf7907f94d2f0d3b09190c23880 Mon Sep 17 00:00:00 2001 -From: Gregoire Gentil <gregoire@gentil.com> -Date: Fri, 12 Mar 2010 11:49:16 +0100 -Subject: [PATCH 16/17] ARM: OMAP: omap3-touchbook: update boardfile - ---- - arch/arm/mach-omap2/board-omap3touchbook.c | 417 +++++++++++++++++++++------- - 1 files changed, 322 insertions(+), 95 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c -index fc3e03c..c22a3e3 100644 ---- a/arch/arm/mach-omap2/board-omap3touchbook.c -+++ b/arch/arm/mach-omap2/board-omap3touchbook.c -@@ -1,7 +1,7 @@ - /* - * linux/arch/arm/mach-omap2/board-omap3touchbook.c - * -- * Copyright (C) 2009 Always Innovating -+ * Copyright (C) 2009-2010 Always Innovating - * - * Modified from mach-omap2/board-omap3beagleboard.c - * -@@ -33,6 +33,7 @@ - #include <linux/spi/spi.h> - - #include <linux/spi/ads7846.h> -+#include <linux/mma7455l.h> - - #include <linux/regulator/machine.h> - #include <linux/i2c/twl.h> -@@ -45,6 +46,7 @@ - - #include <plat/board.h> - #include <plat/common.h> -+#include <plat/display.h> - #include <plat/gpmc.h> - #include <plat/nand.h> - #include <plat/usb.h> -@@ -60,18 +62,22 @@ - - #include <asm/setup.h> - -+#include <plat/dmtimer.h> -+#include <linux/backlight.h> - - #define GPMC_CS0_BASE 0x60 - #define GPMC_CS_SIZE 0x30 - - #define NAND_BLOCK_SIZE SZ_128K - -+#define OMAP3_HJ_GPIO 56 - #define OMAP3_AC_GPIO 136 -+#define OMAP3_TS2_GPIO 154 - #define OMAP3_TS_GPIO 162 - #define TB_BL_PWM_TIMER 9 - #define TB_KILL_POWER_GPIO 168 - --unsigned long touchbook_revision; -+unsigned long ai_revision = 2; - - static struct mtd_partition omap3touchbook_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ -@@ -126,6 +132,103 @@ static struct platform_device omap3touchbook_nand_device = { - .resource = &omap3touchbook_nand_resource, - }; - -+static int touchbook_enable_dvi(struct omap_dss_device *dssdev) -+{ -+ if (dssdev->reset_gpio != -1) -+ gpio_set_value(dssdev->reset_gpio, 1); -+ -+ return 0; -+} -+ -+static void touchbook_disable_dvi(struct omap_dss_device *dssdev) -+{ -+ if (dssdev->reset_gpio != -1) -+ gpio_set_value(dssdev->reset_gpio, 0); -+} -+ -+static struct omap_dss_device touchbook_dvi_device = { -+ .type = OMAP_DISPLAY_TYPE_DPI, -+ .name = "dvi", -+ .driver_name = "generic_panel", -+ .phy.dpi.data_lines = 24, -+ .reset_gpio = 176, -+ .platform_enable = touchbook_enable_dvi, -+ .platform_disable = touchbook_disable_dvi, -+}; -+ -+static int touchbook_panel_enable_tv(struct omap_dss_device *dssdev) -+{ -+#define ENABLE_VDAC_DEDICATED 0x03 -+#define ENABLE_VDAC_DEV_GRP 0x20 -+ -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ ENABLE_VDAC_DEDICATED, -+ TWL4030_VDAC_DEDICATED); -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, -+ ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP); -+ -+ return 0; -+} -+ -+static void touchbook_panel_disable_tv(struct omap_dss_device *dssdev) -+{ -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, -+ TWL4030_VDAC_DEDICATED); -+ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00, -+ TWL4030_VDAC_DEV_GRP); -+} -+ -+static struct omap_dss_device touchbook_tv_device = { -+ .name = "tv", -+ .driver_name = "venc", -+ .type = OMAP_DISPLAY_TYPE_VENC, -+ .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, -+ .platform_enable = touchbook_panel_enable_tv, -+ .platform_disable = touchbook_panel_disable_tv, -+}; -+ -+static struct omap_dss_device *touchbook_dss_devices[] = { -+ &touchbook_dvi_device, -+ &touchbook_tv_device, -+}; -+ -+static struct omap_dss_board_info touchbook_dss_data = { -+ .num_devices = ARRAY_SIZE(touchbook_dss_devices), -+ .devices = touchbook_dss_devices, -+ .default_device = &touchbook_dvi_device, -+}; -+ -+static struct platform_device touchbook_dss_device = { -+ .name = "omapdss", -+ .id = -1, -+ .dev = { -+ .platform_data = &touchbook_dss_data, -+ }, -+}; -+ -+static struct regulator_consumer_supply touchbook_vdac_supply = { -+ .supply = "vdda_dac", -+ .dev = &touchbook_dss_device.dev, -+}; -+ -+static struct regulator_consumer_supply touchbook_vdvi_supply = { -+ .supply = "vdds_dsi", -+ .dev = &touchbook_dss_device.dev, -+}; -+ -+static void __init touchbook_display_init(void) -+{ -+ int r; -+ -+ r = gpio_request(touchbook_dvi_device.reset_gpio, "DVI reset"); -+ if (r < 0) { -+ printk(KERN_ERR "Unable to get DVI reset GPIO\n"); -+ return; -+ } -+ -+ gpio_direction_output(touchbook_dvi_device.reset_gpio, 0); -+} -+ - #include "sdram-micron-mt46h32m32lf-6.h" - - static struct twl4030_hsmmc_info mmc[] = { -@@ -137,15 +240,6 @@ static struct twl4030_hsmmc_info mmc[] = { - {} /* Terminator */ - }; - --static struct platform_device omap3_touchbook_lcd_device = { -- .name = "omap3touchbook_lcd", -- .id = -1, --}; -- --static struct omap_lcd_config omap3_touchbook_lcd_config __initdata = { -- .ctrl_name = "internal", --}; -- - static struct regulator_consumer_supply touchbook_vmmc1_supply = { - .supply = "vmmc", - }; -@@ -177,6 +271,7 @@ static int touchbook_twl_gpio_setup(struct device *dev, - * power switch and overcurrent detect - */ - -+#if 0 - gpio_request(gpio + 1, "EHCI_nOC"); - gpio_direction_input(gpio + 1); - -@@ -187,6 +282,7 @@ static int touchbook_twl_gpio_setup(struct device *dev, - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - -+#endif - return 0; - } - -@@ -201,16 +297,6 @@ static struct twl4030_gpio_platform_data touchbook_gpio_data = { - .setup = touchbook_twl_gpio_setup, - }; - --static struct regulator_consumer_supply touchbook_vdac_supply = { -- .supply = "vdac", -- .dev = &omap3_touchbook_lcd_device.dev, --}; -- --static struct regulator_consumer_supply touchbook_vdvi_supply = { -- .supply = "vdvi", -- .dev = &omap3_touchbook_lcd_device.dev, --}; -- - /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ - static struct regulator_init_data touchbook_vmmc1 = { - .constraints = { -@@ -283,6 +369,15 @@ static struct twl4030_codec_data touchbook_codec_data = { - .audio = &touchbook_audio_data, - }; - -+static struct twl4030_bci_platform_data touchbook_bci_data = { -+ .tblsize = 0, -+ .no_backup_battery = 1, -+}; -+ -+static struct twl4030_madc_platform_data touchbook_madc_data = { -+ .irq_line = 1, -+}; -+ - static struct twl4030_platform_data touchbook_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, -@@ -291,10 +386,15 @@ static struct twl4030_platform_data touchbook_twldata = { - .usb = &touchbook_usb_data, - .gpio = &touchbook_gpio_data, - .codec = &touchbook_codec_data, -+ .madc = &touchbook_madc_data, - .vmmc1 = &touchbook_vmmc1, - .vsim = &touchbook_vsim, - .vdac = &touchbook_vdac, - .vpll2 = &touchbook_vpll2, -+ -+ /* TouchBook BCI */ -+ .bci = &touchbook_bci_data, -+ .madc = &touchbook_madc_data, - }; - - static struct i2c_board_info __initdata touchbook_i2c_boardinfo[] = { -@@ -310,10 +410,18 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { - { - I2C_BOARD_INFO("bq27200", 0x55), - }, -+ { -+ I2C_BOARD_INFO("chacha", 0x40), -+ .irq = OMAP_GPIO_IRQ(OMAP3_TS2_GPIO), -+ }, -+ { -+ I2C_BOARD_INFO("ds1307", 0x68), -+ }, - }; - - static int __init omap3_touchbook_i2c_init(void) - { -+ int ret; - /* Standard TouchBook bus */ - omap_register_i2c_bus(1, 2600, touchbook_i2c_boardinfo, - ARRAY_SIZE(touchbook_i2c_boardinfo)); -@@ -322,53 +430,16 @@ static int __init omap3_touchbook_i2c_init(void) - omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, - ARRAY_SIZE(touchBook_i2c_boardinfo)); - -- return 0; --} -- --static void __init omap3_ads7846_init(void) --{ -- if (gpio_request(OMAP3_TS_GPIO, "ads7846_pen_down")) { -- printk(KERN_ERR "Failed to request GPIO %d for " -- "ads7846 pen down IRQ\n", OMAP3_TS_GPIO); -- return; -+ ret = gpio_request(OMAP3_TS2_GPIO, "chacha"); -+ if (ret < 0) { -+ printk(KERN_ERR "Failed to request GPIO %d for chacha IRQ\n", OMAP3_TS2_GPIO); -+ return 0; - } -+ gpio_direction_input(OMAP3_TS2_GPIO); - -- gpio_direction_input(OMAP3_TS_GPIO); -- omap_set_gpio_debounce(OMAP3_TS_GPIO, 1); -- omap_set_gpio_debounce_time(OMAP3_TS_GPIO, 0xa); -+ return 0; - } - --static struct ads7846_platform_data ads7846_config = { -- .x_min = 100, -- .y_min = 265, -- .x_max = 3950, -- .y_max = 3750, -- .x_plate_ohms = 40, -- .pressure_max = 255, -- .debounce_max = 10, -- .debounce_tol = 5, -- .debounce_rep = 1, -- .gpio_pendown = OMAP3_TS_GPIO, -- .keep_vref_on = 1, --}; -- --static struct omap2_mcspi_device_config ads7846_mcspi_config = { -- .turbo_mode = 0, -- .single_channel = 1, /* 0: slave, 1: master */ --}; -- --static struct spi_board_info omap3_ads7846_spi_board_info[] __initdata = { -- { -- .modalias = "ads7846", -- .bus_num = 4, -- .chip_select = 0, -- .max_speed_hz = 1500000, -- .controller_data = &ads7846_mcspi_config, -- .irq = OMAP_GPIO_IRQ(OMAP3_TS_GPIO), -- .platform_data = &ads7846_config, -- } --}; -- - static struct gpio_led gpio_leds[] = { - { - .name = "touchbook::usr0", -@@ -412,6 +483,7 @@ static struct gpio_keys_button gpio_buttons[] = { - .gpio = 183, - .desc = "power", - .wakeup = 1, -+ .active_low = 1, - }, - }; - -@@ -428,23 +500,8 @@ static struct platform_device keys_gpio = { - }, - }; - --static struct omap_board_config_kernel omap3_touchbook_config[] __initdata = { -- { OMAP_TAG_LCD, &omap3_touchbook_lcd_config }, --}; -- --#ifdef CONFIG_OMAP_MUX --static struct omap_board_mux board_mux[] __initdata = { -- { .reg_offset = OMAP_MUX_TERMINATOR }, --}; --#else --#define board_mux NULL --#endif -- - static void __init omap3_touchbook_init_irq(void) - { -- omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); -- omap_board_config = omap3_touchbook_config; -- omap_board_config_size = ARRAY_SIZE(omap3_touchbook_config); - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params, omap35x_mpu_rate_table, - omap35x_dsp_rate_table, omap35x_l3_rate_table); -@@ -456,9 +513,9 @@ static void __init omap3_touchbook_init_irq(void) - } - - static struct platform_device *omap3_touchbook_devices[] __initdata = { -- &omap3_touchbook_lcd_device, - &leds_gpio, - &keys_gpio, -+ &touchbook_dss_device, - }; - - static void __init omap3touchbook_flash_init(void) -@@ -500,7 +557,7 @@ static void __init omap3touchbook_flash_init(void) - } - } - --static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { -+static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { - - .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, - .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, -@@ -512,6 +569,170 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { - .reset_gpio_port[2] = -EINVAL - }; - -+#ifdef CONFIG_OMAP_MUX -+static struct omap_board_mux board_mux[] __initdata = { -+ { .reg_offset = OMAP_MUX_TERMINATOR }, -+}; -+#else -+#define board_mux NULL -+#endif -+ -+static struct ads7846_platform_data ads7846_config = { -+ .x_min = 100, -+ .y_min = 265, -+ .x_max = 3950, -+ .y_max = 3750, -+ .x_plate_ohms = 40, -+ .pressure_max = 255, -+ .debounce_max = 10, -+ .debounce_tol = 5, -+ .debounce_rep = 1, -+ .gpio_pendown = OMAP3_TS_GPIO, -+ .keep_vref_on = 1, -+}; -+ -+static struct omap2_mcspi_device_config ads7846_mcspi_config = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3_ads7846_spi_board_info[] __initdata = { -+ { -+ .modalias = "ads7846", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 1500000, -+ .controller_data = &ads7846_mcspi_config, -+ .irq = OMAP_GPIO_IRQ(OMAP3_TS_GPIO), -+ .platform_data = &ads7846_config, -+ } -+}; -+ -+static void __init omap3_ads7846_init(void) -+{ -+ if (gpio_request(OMAP3_TS_GPIO, "ads7846_pen_down")) { -+ printk(KERN_ERR "Failed to request GPIO %d for " -+ "ads7846 pen down IRQ\n", OMAP3_TS_GPIO); -+ return; -+ } -+ -+ gpio_direction_input(OMAP3_TS_GPIO); -+ omap_set_gpio_debounce(OMAP3_TS_GPIO, 1); -+ omap_set_gpio_debounce_time(OMAP3_TS_GPIO, 0xa); -+} -+ -+static struct mma7455l_platform_data mma7455l_config = { -+ .calibration_x = -4, -+ .calibration_y = 28, -+ .calibration_z = -28, -+}; -+ -+static struct omap2_mcspi_device_config mma7455l_mcspi_config = { -+ .turbo_mode = 0, -+ .single_channel = 1, /* 0: slave, 1: master */ -+}; -+ -+static struct spi_board_info omap3_mma7455l_spi_board_info[] __initdata = { -+ { -+ .modalias = "mma7455l", -+ .bus_num = 3, -+ .chip_select = 0, -+ .max_speed_hz = 200000, -+ .irq = OMAP_GPIO_IRQ(OMAP3_AC_GPIO), -+ .controller_data = &mma7455l_mcspi_config, //(void *) 135, -+ .platform_data = &mma7455l_config, -+ } -+}; -+ -+static void __init omap3_mma7455l_init(void) -+{ -+ int ret; -+ -+ ret = gpio_request(OMAP3_AC_GPIO, "mma7455l"); -+ if (ret < 0) { -+ printk(KERN_ERR "Failed to request GPIO %d for mma7455l IRQ\n", OMAP3_AC_GPIO); -+ return; -+ } -+ -+ gpio_direction_input(OMAP3_AC_GPIO); -+} -+ -+static int touchbook_backlight_brightness = 50; -+static struct omap_dm_timer *touchbook_backlight_pwm; -+ -+static int touchbook_backlight_read(struct backlight_device *bd) -+{ -+ return touchbook_backlight_brightness; -+} -+ -+static int touchbook_backlight_update(struct backlight_device *bd) -+{ -+ int value = bd->props.brightness; -+ touchbook_backlight_brightness = value; -+ -+ /* Frequency calculation: -+ - For 200Hz PWM, you want to load -164 (=> -32768Hz / 200Hz). -+ - Minimum duty cycle for the backlight is 15%. -+ - You have (164*0.85) => ~140 levels of brightness. -+ */ -+ -+ /* Halve input brightness */ -+ if (!bd->props.boost) -+ value /= 2; -+ -+ /* For maximum brightness, just stop the timer... */ -+ if(value != bd->props.max_brightness) -+ { -+ /* Load the appropriate value for 200Hz PWM */ -+ u32 period = clk_get_rate(omap_dm_timer_get_fclk(touchbook_backlight_pwm)) / bd->props.pwm_fq; -+ -+ /* Minimum duty cycle is 15% */ -+ u32 minimum = (period * bd->props.min_duty) / 100; -+ u32 maximum = (period * 17) / 20; -+ -+ /* Work out match value */ -+ u32 match = (maximum * value) / 100; -+ -+ /* Start... */ -+ omap_dm_timer_set_load(touchbook_backlight_pwm, 1, 0xFFFFFFFF - period - 1); -+ omap_dm_timer_set_match(touchbook_backlight_pwm, 1, 0xFFFFFFFF - minimum - match); -+ omap_dm_timer_write_counter(touchbook_backlight_pwm, -1); -+ omap_dm_timer_start(touchbook_backlight_pwm); -+ } -+ else -+ omap_dm_timer_stop(touchbook_backlight_pwm); -+ -+ -+ return 0; -+} -+ -+static struct backlight_ops touchbook_backlight_properties = { -+ .get_brightness = touchbook_backlight_read, -+ .update_status = touchbook_backlight_update, -+}; -+ -+static void __init omap3_touchbook_backlight_init(void) -+{ -+ static struct backlight_device *bd; -+ bd = backlight_device_register("touchbook", NULL, NULL, &touchbook_backlight_properties); -+ -+ if(bd) -+ { -+ touchbook_backlight_pwm = omap_dm_timer_request_specific(TB_BL_PWM_TIMER); -+ omap_dm_timer_enable(touchbook_backlight_pwm); -+ omap_dm_timer_set_source(touchbook_backlight_pwm, OMAP_TIMER_SRC_SYS_CLK); -+ omap_dm_timer_set_pwm(touchbook_backlight_pwm, 1, 1, OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE); -+ -+ bd->props.max_brightness = 100; -+ bd->props.brightness = touchbook_backlight_brightness; -+ bd->props.boost = 0; -+ bd->props.min_duty = 15; -+ bd->props.pwm_fq = 200; -+ } -+ -+ touchbook_backlight_update(bd); -+} -+ - static void omap3_touchbook_poweroff(void) - { - int r; -@@ -525,33 +746,26 @@ static void omap3_touchbook_poweroff(void) - gpio_direction_output(TB_KILL_POWER_GPIO, 0); - } - --static void __init early_touchbook_revision(char **p) -+static int __init ai_revision_instance(char *str) - { -- if (!*p) -- return; -+ if (!str) -+ return -EINVAL; -+ -+ ai_revision = simple_strtoul(str, NULL, 10); - -- strict_strtoul(*p, 10, &touchbook_revision); -+ return 0; - } --__early_param("tbr=", early_touchbook_revision); - - static void __init omap3_touchbook_init(void) - { - pm_power_off = omap3_touchbook_poweroff; - -+ omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap3_touchbook_i2c_init(); - platform_add_devices(omap3_touchbook_devices, - ARRAY_SIZE(omap3_touchbook_devices)); - omap_serial_init(); - -- omap_mux_init_gpio(170, OMAP_PIN_INPUT); -- gpio_request(176, "DVI_nPD"); -- /* REVISIT leave DVI powered down until it's needed ... */ -- gpio_direction_output(176, true); -- -- /* Touchscreen and accelerometer */ -- spi_register_board_info(omap3_ads7846_spi_board_info, -- ARRAY_SIZE(omap3_ads7846_spi_board_info)); -- omap3_ads7846_init(); - usb_musb_init(); - usb_ehci_init(&ehci_pdata); - omap3touchbook_flash_init(); -@@ -559,6 +773,17 @@ static void __init omap3_touchbook_init(void) - /* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); - omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); -+ -+ touchbook_display_init(); -+ omap3_touchbook_backlight_init(); -+ -+ /* Touchscreen and accelerometer */ -+ spi_register_board_info(omap3_ads7846_spi_board_info, -+ ARRAY_SIZE(omap3_ads7846_spi_board_info)); -+ spi_register_board_info(omap3_mma7455l_spi_board_info, -+ ARRAY_SIZE(omap3_mma7455l_spi_board_info)); -+ omap3_ads7846_init(); -+ omap3_mma7455l_init(); - } - - static void __init omap3_touchbook_map_io(void) -@@ -567,6 +792,8 @@ static void __init omap3_touchbook_map_io(void) - omap2_map_common_io(); - } - -+early_param("air", ai_revision_instance); -+ - MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") - /* Maintainer: Gregoire Gentil - http://www.alwaysinnovating.com */ - .phys_io = 0x48000000, --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0017-ARM-OMAP-add-800MHz-OPP-and-remove-125MHz-one.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0017-ARM-OMAP-add-800MHz-OPP-and-remove-125MHz-one.patch deleted file mode 100644 index 8a06ead..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/0017-ARM-OMAP-add-800MHz-OPP-and-remove-125MHz-one.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 1f36c057ab83a5c5e8162094fb52022edd5ba9b8 Mon Sep 17 00:00:00 2001 -From: Koen Kooi <koen@dominion.thruhere.net> -Date: Tue, 4 May 2010 09:01:21 +0200 -Subject: [PATCH 17/17] ARM: OMAP: add 800MHz OPP and remove 125MHz one - ---- - arch/arm/mach-omap2/pm34xx.c | 6 ++++-- - 1 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c -index d1cc528..42fbcdd 100644 ---- a/arch/arm/mach-omap2/pm34xx.c -+++ b/arch/arm/mach-omap2/pm34xx.c -@@ -120,7 +120,7 @@ static struct prm_setup_vc prm_setup = { - struct omap_opp omap35x_mpu_rate_table[] = { - {0, 0, 0}, - /*OPP1*/ -- {S125M, VDD1_OPP1, 0x1E}, -+// {S125M, VDD1_OPP1, 0x1E}, - /*OPP2*/ - {S250M, VDD1_OPP2, 0x26}, - /*OPP3*/ -@@ -131,12 +131,13 @@ struct omap_opp omap35x_mpu_rate_table[] = { - {S600M, VDD1_OPP5, 0x3C}, - /*OPP6*/ - {S720M, VDD1_OPP6, 0x3C}, -+ {S800M, VDD1_OPP6, 0x3F}, - }; - - struct omap_opp omap35x_dsp_rate_table[] = { - {0, 0, 0}, - /*OPP1*/ -- {S90M, VDD1_OPP1, 0x1E}, -+// {S90M, VDD1_OPP1, 0x1E}, - /*OPP2*/ - {S180M, VDD1_OPP2, 0x26}, - /*OPP3*/ -@@ -147,6 +148,7 @@ struct omap_opp omap35x_dsp_rate_table[] = { - {S430M, VDD1_OPP5, 0x3C}, - /*OPP5*/ - {S520M, VDD1_OPP6, 0x3C}, -+ {S600M, VDD1_OPP6, 0x3F}, - }; - - struct omap_opp omap35x_l3_rate_table[] = { --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/defconfig b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/defconfig deleted file mode 100644 index 6f2b7bd..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3-touchbook/defconfig +++ /dev/null @@ -1,3043 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Mon May 10 12:50:28 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_OPROFILE_ARMV7=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=15 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -# CONFIG_ELF_CORE is not set -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=m -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_SLOW_WORK=y -# CONFIG_SLOW_WORK_DEBUG is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_INTEGRITY=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_DEBOBS is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_LL_DEBUG_UART1 is not set -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -CONFIG_OMAP_LL_DEBUG_UART3=y -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -# CONFIG_OMAP_PM_NOOP is not set -CONFIG_OMAP_PM_SRF=y -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -# CONFIG_MACH_OMAP3EVM is not set -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -CONFIG_MACH_OMAP3_TOUCHBOOK=y -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -# CONFIG_USER_L2_PLE is not set -# CONFIG_USER_PMON is not set -CONFIG_ARM_ERRATA_430973=y -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -# CONFIG_VMSPLIT_3G is not set -CONFIG_VMSPLIT_2G=y -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0x80000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=m - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -# CONFIG_DEFAULT_BIC is not set -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_HTCP is not set -# CONFIG_DEFAULT_VEGAS is not set -# CONFIG_DEFAULT_WESTWOOD is not set -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CT_ACCT=y -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_CCID3_RTO=100 -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -CONFIG_IEEE802154=m -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_ROUTE=y -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT_PID=y -# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_OMAP_PREFETCH=y -# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y -# CONFIG_IWMC3200TOP is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -# CONFIG_ASYNC_RAID6_TEST is not set -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -CONFIG_DM_UEVENT=y -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -# CONFIG_NET_ETHERNET is not set -CONFIG_MII=m -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -# CONFIG_AT76C50X_USB is not set -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -CONFIG_B43=m -# CONFIG_B43_SDIO is not set -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -CONFIG_RT2800USB=m -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_HT=y -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -# CONFIG_WL12XX is not set -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -# CONFIG_WIMAX_I2400M_USB is not set -# CONFIG_WIMAX_I2400M_SDIO is not set - -# -# USB Network Adapters -# -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=m -CONFIG_USB_NET_SMSC95XX=m -CONFIG_USB_NET_GL620A=m -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET=m -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=m -# CONFIG_USB_HSO is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set -CONFIG_IEEE802154_DRIVERS=m -# CONFIG_IEEE802154_FAKEHARD is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -CONFIG_INPUT_POWERMATE=m -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_UINPUT=y -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -CONFIG_INPUT_MMA7455L=y - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -CONFIG_RAW_DRIVER=m -CONFIG_MAX_RAW_DEVS=256 -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -CONFIG_I2C_TINY_USB=m - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_XILINX is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -CONFIG_GPIO_TWL4030=y - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2782 is not set -CONFIG_BATTERY_BQ27x00=y -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_TWL4030_BCI_BATTERY=y -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7473 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_LIS3_SPI is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -CONFIG_TWL4030_WATCHDOG=m - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TWL4030_CORE=y -# CONFIG_TWL4030_POWER is not set -CONFIG_TWL4030_CODEC=y -CONFIG_TWL4030_MADC=y -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_COMMON=m -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_VIDEO_V4L2=m -CONFIG_VIDEO_V4L1=m -CONFIG_VIDEOBUF_GEN=m -CONFIG_VIDEOBUF_DMA_SG=m -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -CONFIG_VIDEO_TVAUDIO=m -CONFIG_VIDEO_TDA7432=m -CONFIG_VIDEO_TDA9840=m -CONFIG_VIDEO_TDA9875=m -CONFIG_VIDEO_TEA6415C=m -CONFIG_VIDEO_TEA6420=m -CONFIG_VIDEO_MSP3400=m -CONFIG_VIDEO_CS5345=m -CONFIG_VIDEO_CS53L32A=m -CONFIG_VIDEO_M52790=m -CONFIG_VIDEO_TLV320AIC23B=m -CONFIG_VIDEO_WM8775=m -CONFIG_VIDEO_WM8739=m -CONFIG_VIDEO_VP27SMPX=m - -# -# RDS decoders -# -CONFIG_VIDEO_SAA6588=m - -# -# Video decoders -# -CONFIG_VIDEO_ADV7180=m -CONFIG_VIDEO_BT819=m -CONFIG_VIDEO_BT856=m -CONFIG_VIDEO_BT866=m -CONFIG_VIDEO_KS0127=m -# CONFIG_VIDEO_OV7670 is not set -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_TCM825X=m -CONFIG_VIDEO_MT9P012=m -CONFIG_VIDEO_DW9710=m -# CONFIG_VIDEO_OV3640 is not set -CONFIG_VIDEO_IMX046=m -CONFIG_VIDEO_LV8093=m -CONFIG_VIDEO_SAA7110=m -CONFIG_VIDEO_SAA711X=m -CONFIG_VIDEO_SAA717X=m -CONFIG_VIDEO_SAA7191=m -CONFIG_VIDEO_TVP514X=m -CONFIG_VIDEO_TVP5150=m -CONFIG_VIDEO_VPX3220=m - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -CONFIG_VIDEO_SAA7127=m -CONFIG_VIDEO_SAA7185=m -CONFIG_VIDEO_ADV7170=m -CONFIG_VIDEO_ADV7175=m -CONFIG_VIDEO_THS7303=m -CONFIG_VIDEO_ADV7343=m - -# -# Video improvement chips -# -CONFIG_VIDEO_UPD64031A=m -CONFIG_VIDEO_UPD64083=m -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=m -CONFIG_VIDEO_VPSS_SYSTEM=m -# CONFIG_VIDEO_VPFE_CAPTURE is not set -CONFIG_VIDEO_OMAP2_VOUT=m -# CONFIG_VIDEO_OMAP3 is not set -# CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER is not set -# CONFIG_VIDEO_OMAP34XX_ISP_RESIZER is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_TEF6862 is not set -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_EC168=m -CONFIG_SMS_SIANO_MDTV=m - -# -# Siano module components -# -# CONFIG_SMS_USB_DRV is not set -# CONFIG_SMS_SDIO_DRV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GL5=m -CONFIG_DAB=y -CONFIG_USB_DABUSB=m - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=18 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=3 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -CONFIG_PANEL_SHARP_LQ043T1DG01=y -# CONFIG_PANEL_TAAL is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -CONFIG_LCD_PLATFORM=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -# CONFIG_LOGO is not set -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -# CONFIG_SND_PCM_OSS is not set -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_VIRMIDI=m -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OMAP3_TOUCHBOOK=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -CONFIG_HID_AI=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_KYE is not set -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_NTRIG=y -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -CONFIG_USB_OXU210HP_HCD=y -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_TI_CPPI41_DMA is not set -# CONFIG_USB_MUSB_DEBUG is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_BERRY_CHARGE=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_VST=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=m -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -CONFIG_USB_ZERO=m -CONFIG_USB_ZERO_HNPTEST=y -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -# CONFIG_USB_MASS_STORAGE is not set -CONFIG_USB_G_SERIAL=m -CONFIG_USB_MIDI_GADGET=m -CONFIG_USB_G_PRINTER=m -CONFIG_USB_CDC_COMPOSITE=m -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_SPI=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=y -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TWL4030=y -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -# CONFIG_UIO_SMX is not set -# CONFIG_UIO_SERCOS3 is not set - -# -# TI VLYNQ -# -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_USB_IP_COMMON is not set -CONFIG_W35UND=m -CONFIG_PRISM2_USB=m -# CONFIG_ECHO is not set -CONFIG_OTUS=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -# CONFIG_INPUT_MIMIO is not set -# CONFIG_TRANZPORT is not set - -# -# Qualcomm MSM Camera And Video -# - -# -# Camera Sensor Selection -# -# CONFIG_INPUT_GPIO is not set -# CONFIG_DST is not set -# CONFIG_POHMELFS is not set -# CONFIG_PLAN9AUTH is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_FB_UDL is not set - -# -# RAR Register Driver -# -# CONFIG_RAR_REGISTER is not set -# CONFIG_IIO is not set -# CONFIG_RAMZSWAP is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_STRIP is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=m -CONFIG_EXT4_FS_XATTR=y -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=m -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=m -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_POSIX_ACL is not set -# CONFIG_XFS_RT is not set -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -# CONFIG_GFS2_FS_LOCKING_DLM is not set -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -# CONFIG_OCFS2_FS_POSIX_ACL is not set -CONFIG_BTRFS_FS=m -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=y -# CONFIG_CUSE is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_ACL_SUPPORT=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DFS_UPCALL is not set -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -CONFIG_9P_FS=m - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_HW=y -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3evm/defconfig b/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3evm/defconfig deleted file mode 100644 index 5508dc5..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/omap3evm/defconfig +++ /dev/null @@ -1,3088 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Wed Jul 28 15:05:34 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_OPROFILE_ARMV7=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_SLOW_WORK=y -# CONFIG_SLOW_WORK_DEBUG is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -CONFIG_OMAP_RESET_CLOCKS=y -CONFIG_OMAP_MUX=y -# CONFIG_OMAP_MUX_DEBUG is not set -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_IOMMU=y -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_DEBOBS is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -CONFIG_OMAP_LL_DEBUG_UART1=y -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -# CONFIG_OMAP_LL_DEBUG_UART3 is not set -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -# CONFIG_OMAP_PM_NOOP is not set -CONFIG_OMAP_PM_SRF=y -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_OMAP_LDP is not set -# CONFIG_MACH_OVERO is not set -CONFIG_MACH_OMAP3EVM=y -CONFIG_PMIC_TWL4030=y -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_USER_L2_PLE=y -CONFIG_USER_PMON=y -CONFIG_ARM_ERRATA_430973=y -CONFIG_ARM_ERRATA_458693=y -CONFIG_ARM_ERRATA_460075=y -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_CPU_V7_SYSFS=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_DEBUG=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -CONFIG_PM_RUNTIME=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -# CONFIG_DEFAULT_BIC is not set -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_HTCP is not set -# CONFIG_DEFAULT_VEGAS is not set -# CONFIG_DEFAULT_WESTWOOD is not set -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -# CONFIG_IPV6_PIMSM_V2 is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CT_ACCT=y -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=m -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_TPROXY is not set -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_QUEUE=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_DCCP=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_TARGET_LOG=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_CCID3_RTO=100 -CONFIG_IP_DCCP_TFRC_LIB=y - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_RDS is not set -CONFIG_TIPC=m -# CONFIG_TIPC_ADVANCED is not set -# CONFIG_TIPC_DEBUG is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -# CONFIG_ATM_CLIP_NO_ICMP is not set -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -# CONFIG_ATM_BR2684_IPFILTER is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_BRIDGE=m -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -CONFIG_WAN_ROUTER=m -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_ROUTE=y -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -# CONFIG_ACT200L_DONGLE is not set -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -CONFIG_AF_RXRPC=m -# CONFIG_AF_RXRPC_DEBUG is not set -# CONFIG_RXKAD is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_NET_9P=m -# CONFIG_NET_9P_DEBUG is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_AMDSTD is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_OMAP_NOR is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_OMAP_PREFETCH=y -# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -CONFIG_MTD_ONENAND=y -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -# CONFIG_MTD_ONENAND_GENERIC is not set -CONFIG_MTD_ONENAND_OMAP2=y -# CONFIG_MTD_ONENAND_OTP is not set -# CONFIG_MTD_ONENAND_2X_PROGRAM is not set -# CONFIG_MTD_ONENAND_SIM is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -# CONFIG_MTD_UBI_GLUEBI is not set - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=32768 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -# CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=m -CONFIG_IWMC3200TOP=m -# CONFIG_IWMC3200TOP_DEBUG is not set -# CONFIG_IWMC3200TOP_DEBUGFS is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -# CONFIG_ASYNC_RAID6_TEST is not set -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_TI_DAVINCI_EMAC is not set -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -CONFIG_SMSC911X=y -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_AT76C50X_USB=m -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -CONFIG_B43=m -# CONFIG_B43_SDIO is not set -CONFIG_B43_PHY_LP=y -CONFIG_B43_LEDS=y -CONFIG_B43_HWRNG=y -# CONFIG_B43_DEBUG is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -# CONFIG_RT2800USB is not set -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WL12XX=m -CONFIG_WL1251=m -CONFIG_WL1251_SPI=m -CONFIG_WL1251_SDIO=m -CONFIG_WL1271=m -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_SDIO=m -CONFIG_WIMAX_IWMC3200_SDIO=y -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 - -# -# USB Network Adapters -# -CONFIG_USB_CATC=y -CONFIG_USB_KAWETH=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_RTL8150=y -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=y -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_GL620A=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_PLUSB=y -CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -# CONFIG_WAN is not set -CONFIG_ATM_DRIVERS=y -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_TCP is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -# CONFIG_PPPOATM is not set -CONFIG_PPPOL2TP=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NETPOLL_TRAP=y -CONFIG_NET_POLL_CONTROLLER=y -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_TWL4030=y -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_TWL4030_PWRBUTTON=y -CONFIG_INPUT_UINPUT=y -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_XILINX is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -CONFIG_GPIO_TWL4030=y - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7473 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_LIS3_SPI is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB=y -CONFIG_SSB_SDIOHOST_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_POWER=y -CONFIG_TWL4030_CODEC=y -# CONFIG_TWL4030_MADC is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMISE=y -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_MT2131=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -CONFIG_VIDEO_IR_I2C=m - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -CONFIG_VIDEO_MSP3400=m -# CONFIG_VIDEO_CS5345 is not set -CONFIG_VIDEO_CS53L32A=m -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -CONFIG_VIDEO_WM8775=m -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_OV7670 is not set -CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_MT9V113=m -# CONFIG_VIDEO_TCM825X is not set -CONFIG_VIDEO_MT9P012=m -CONFIG_VIDEO_MT9T112=m -# CONFIG_VIDEO_DW9710 is not set -# CONFIG_VIDEO_OV3640 is not set -# CONFIG_VIDEO_IMX046 is not set -# CONFIG_VIDEO_LV8093 is not set -# CONFIG_VIDEO_SAA7110 is not set -CONFIG_VIDEO_SAA711X=m -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7191 is not set -CONFIG_VIDEO_TVP514X=y -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_VPX3220 is not set - -# -# Video and audio decoders -# -CONFIG_VIDEO_CX25840=m - -# -# MPEG video encoders -# -CONFIG_VIDEO_CX2341X=m - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_ADV7343 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=y -CONFIG_VIDEO_VPSS_SYSTEM=y -# CONFIG_VIDEO_VPFE_CAPTURE is not set -CONFIG_VIDEO_OMAP2_VOUT=y -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_ISP=y -CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER=y -CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_CX231XX=m -# CONFIG_VIDEO_CX231XX_ALSA is not set -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_TEF6862 is not set -CONFIG_DVB_MAX_ADAPTERS=8 -CONFIG_DVB_DYNAMIC_MINORS=y -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_AF9015=m -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_LGS8GL5=m -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=14 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_USE_DSI_PLL=y -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=3 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -# CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set -CONFIG_PANEL_SHARP_LS037V7DW01=y -# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -# CONFIG_PANEL_TAAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OMAP3EVM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_KYE is not set -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_NTRIG=y -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_TOPSEED=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_U132_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_PERIPHERAL is not set -CONFIG_USB_MUSB_OTG=y -CONFIG_USB_GADGET_MUSB_HDRC=y -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_TI_CPPI41_DMA is not set -# CONFIG_USB_MUSB_DEBUG is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -CONFIG_USB_TMC=m - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -# CONFIG_USB_SERIAL_CP210X is not set -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -CONFIG_USB_SERIAL_SIEMENS_MPI=m -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_BERRY_CHARGE=m -CONFIG_USB_LED=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m -CONFIG_USB_FTDI_ELAN=m -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -CONFIG_USB_VST=m -CONFIG_USB_ATM=m -CONFIG_USB_SPEEDTOUCH=m -CONFIG_USB_CXACRU=m -CONFIG_USB_UEAGLEATM=m -CONFIG_USB_XUSBATM=m -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -CONFIG_USB_GADGET_DUALSPEED=y -CONFIG_USB_ZERO=m -CONFIG_USB_ZERO_HNPTEST=y -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -# CONFIG_USB_MASS_STORAGE is not set -CONFIG_USB_G_SERIAL=m -CONFIG_USB_MIDI_GADGET=m -CONFIG_USB_G_PRINTER=m -CONFIG_USB_CDC_COMPOSITE=m -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_UNSAFE_RESUME=y - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -CONFIG_MMC_SPI=m -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=m - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TWL4030=m -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -CONFIG_UIO=m -CONFIG_UIO_PDRV=m -CONFIG_UIO_PDRV_GENIRQ=m -# CONFIG_UIO_SMX is not set -# CONFIG_UIO_SERCOS3 is not set - -# -# TI VLYNQ -# -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -# CONFIG_USB_IP_COMMON is not set -CONFIG_W35UND=m -# CONFIG_PRISM2_USB is not set -CONFIG_ECHO=m -CONFIG_OTUS=m -# CONFIG_COMEDI is not set -# CONFIG_ASUS_OLED is not set -CONFIG_RTL8192SU=m -# CONFIG_INPUT_MIMIO is not set -# CONFIG_TRANZPORT is not set - -# -# Qualcomm MSM Camera And Video -# - -# -# Camera Sensor Selection -# -# CONFIG_INPUT_GPIO is not set -# CONFIG_DST is not set -# CONFIG_POHMELFS is not set -# CONFIG_PLAN9AUTH is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_USB_SERIAL_QUATECH_USB2 is not set -# CONFIG_VT6656 is not set -# CONFIG_FB_UDL is not set - -# -# RAR Register Driver -# -# CONFIG_RAR_REGISTER is not set -# CONFIG_IIO is not set -# CONFIG_RAMZSWAP is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_STRIP is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_XATTR=y -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_JFS_FS=m -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_POSIX_ACL is not set -# CONFIG_XFS_RT is not set -# CONFIG_XFS_DEBUG is not set -CONFIG_GFS2_FS=m -# CONFIG_GFS2_FS_LOCKING_DLM is not set -CONFIG_OCFS2_FS=m -CONFIG_OCFS2_FS_O2CB=m -CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m -CONFIG_OCFS2_FS_STATS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y -# CONFIG_OCFS2_DEBUG_FS is not set -# CONFIG_OCFS2_FS_POSIX_ACL is not set -CONFIG_BTRFS_FS=m -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -# CONFIG_ECRYPT_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -# CONFIG_UBIFS_FS_DEBUG is not set -CONFIG_CRAMFS=m -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -# CONFIG_ROMFS_BACKED_BY_MTD is not set -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_ACL_SUPPORT=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS=y -CONFIG_CIFS_STATS2=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DFS_UPCALL is not set -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_NCP_FS=m -# CONFIG_NCPFS_PACKET_SIGNING is not set -# CONFIG_NCPFS_IOCTL_LOCKING is not set -# CONFIG_NCPFS_STRONG is not set -# CONFIG_NCPFS_NFS_NS is not set -# CONFIG_NCPFS_OS2_NS is not set -# CONFIG_NCPFS_SMALLDOS is not set -# CONFIG_NCPFS_NLS is not set -# CONFIG_NCPFS_EXTRAS is not set -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -CONFIG_9P_FS=m - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -# CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=y -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_HW=y -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/overo/defconfig b/recipes-kernel/linux/linux-omap-psp-2.6.32/overo/defconfig deleted file mode 100644 index be4375e..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/overo/defconfig +++ /dev/null @@ -1,2467 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.32 -# Thu Mar 11 14:23:41 2010 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_OPROFILE_ARMV7=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_CONSTRUCTORS=y - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set -# CONFIG_RCU_TRACE is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=15 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -# CONFIG_ELF_CORE is not set -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y - -# -# Kernel Performance Events And Counters -# -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_SLOW_WORK is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -CONFIG_INLINE_SPIN_UNLOCK=y -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_STMP3XXX is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PC1XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_DAVINCI is not set -CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set - -# -# TI OMAP Implementations -# -CONFIG_ARCH_OMAP_OTG=y -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set - -# -# OMAP Feature Selections -# -CONFIG_OMAP_SMARTREFLEX=y -# CONFIG_OMAP_SMARTREFLEX_TESTING is not set -# CONFIG_OMAP_RESET_CLOCKS is not set -# CONFIG_OMAP_MUX is not set -CONFIG_OMAP_MCBSP=y -CONFIG_OMAP_MBOX_FWK=m -CONFIG_OMAP_IOMMU=y -# CONFIG_OMAP_MPU_TIMER is not set -CONFIG_OMAP_32K_TIMER=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_DEBOBS is not set -CONFIG_OMAP_32K_TIMER_HZ=128 -CONFIG_OMAP_DM_TIMER=y -# CONFIG_OMAP_LL_DEBUG_UART1 is not set -# CONFIG_OMAP_LL_DEBUG_UART2 is not set -CONFIG_OMAP_LL_DEBUG_UART3=y -# CONFIG_OMAP_LL_DEBUG_NONE is not set -# CONFIG_OMAP_PM_NONE is not set -# CONFIG_OMAP_PM_NOOP is not set -CONFIG_OMAP_PM_SRF=y -CONFIG_ARCH_OMAP34XX=y -CONFIG_ARCH_OMAP3430=y -CONFIG_OMAP_PACKAGE_CBB=y - -# -# OMAP Board Type -# -# CONFIG_MACH_OMAP3_BEAGLE is not set -# CONFIG_MACH_OMAP_LDP is not set -CONFIG_MACH_OVERO=y -# CONFIG_MACH_OMAP3EVM is not set -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP3_TOUCHBOOK is not set -# CONFIG_MACH_OMAP_3430SDP is not set -# CONFIG_MACH_NOKIA_RX51 is not set -# CONFIG_MACH_OMAP_ZOOM2 is not set -# CONFIG_MACH_OMAP_ZOOM3 is not set -# CONFIG_MACH_CM_T35 is not set -# CONFIG_MACH_IGEP0020 is not set -# CONFIG_MACH_OMAP_3630SDP is not set -# CONFIG_OMAP3_EMU is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_V7=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_HAS_TLS_REG=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -# CONFIG_ARM_ERRATA_430973 is not set -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_VOLUNTARY=y -# CONFIG_PREEMPT is not set -CONFIG_HZ=128 -# CONFIG_THUMB2_KERNEL is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_LEDS=y -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE=" debug " -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_DEBUG=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -CONFIG_HAVE_AOUT=y -CONFIG_BINFMT_AOUT=m -CONFIG_BINFMT_MISC=y - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_DEBUG=y -# CONFIG_PM_VERBOSE is not set -CONFIG_CAN_PM_TRACE=y -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -CONFIG_BT=y -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=y -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=y -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=y - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -CONFIG_BT_HCIVHCI=m -# CONFIG_BT_MRVL is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=y -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -CONFIG_CFG80211_WEXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=m -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=y -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT_PID=y -# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set -CONFIG_MAC80211_RC_DEFAULT="pid" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_OMAP_PREFETCH=y -# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -CONFIG_MTD_UBI_GLUEBI=y - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -# CONFIG_BLK_DEV_XIP is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_EEPROM_93CX6=m -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=m -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_CHR_DEV_SG=m -# CONFIG_CHR_DEV_SCH is not set -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_RAID6_PQ=m -# CONFIG_ASYNC_RAID6_TEST is not set -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -# CONFIG_DM_MULTIPATH_QL is not set -# CONFIG_DM_MULTIPATH_ST is not set -CONFIG_DM_DELAY=m -# CONFIG_DM_UEVENT is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -CONFIG_TUN=m -# CONFIG_VETH is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_TI_DAVINCI_EMAC is not set -# CONFIG_DM9000 is not set -CONFIG_ENC28J60=m -# CONFIG_ENC28J60_WRITEVERIFY is not set -# CONFIG_ETHOC is not set -# CONFIG_SMC911X is not set -CONFIG_SMSC911X=y -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -# CONFIG_AT76C50X_USB is not set -CONFIG_USB_ZD1201=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_ATH_COMMON is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_IWM is not set -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -CONFIG_LIBERTAS_SDIO=m -# CONFIG_LIBERTAS_SPI is not set -CONFIG_LIBERTAS_DEBUG=y -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -# CONFIG_RT2800USB is not set -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -# CONFIG_WL12XX is not set -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_DM9601=m -# CONFIG_USB_NET_SMSC95XX is not set -CONFIG_USB_NET_GL620A=m -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET=m -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=m -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_WAN is not set -CONFIG_PPP=m -# CONFIG_PPP_MULTILINK is not set -# CONFIG_PPP_FILTER is not set -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -# CONFIG_PPPOL2TP is not set -# CONFIG_SLIP is not set -CONFIG_SLHC=m -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -CONFIG_INPUT_POLLDEV=m -# CONFIG_INPUT_SPARSEKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_GPIO is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=m -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=32 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_DESIGNWARE is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_OMAP=y -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_OMAP24XX=y -# CONFIG_SPI_XILINX is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_TLE62X0 is not set - -# -# PPS support -# -# CONFIG_PPS is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -CONFIG_DEBUG_GPIO=y -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -CONFIG_GPIO_TWL4030=y - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set - -# -# AC97 GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=m -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7473 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_LIS3_SPI is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_OMAP_WATCHDOG=y -# CONFIG_TWL4030_WATCHDOG is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_TPS65010 is not set -CONFIG_TWL4030_CORE=y -# CONFIG_TWL4030_POWER is not set -CONFIG_TWL4030_CODEC=y -CONFIG_TWL4030_MADC=y -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_MC13783 is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set -CONFIG_REGULATOR=y -CONFIG_REGULATOR_DEBUG=y -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_TWL4030=y -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -CONFIG_MEDIA_SUPPORT=y - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_COMMON=y -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_DVB_CORE=m -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER=m -# CONFIG_MEDIA_TUNER_CUSTOMISE is not set -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA8290=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MT20XX=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEOBUF_GEN=y -CONFIG_VIDEOBUF_DMA_SG=y -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_VIDEO_HELPER_CHIPS_AUTO=y -CONFIG_VIDEO_MSP3400=m -CONFIG_VIDEO_CS53L32A=m -CONFIG_VIDEO_WM8775=m -CONFIG_VIDEO_SAA711X=m -CONFIG_VIDEO_CX25840=m -CONFIG_VIDEO_CX2341X=m -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_AU0828 is not set -CONFIG_TI_MEDIA=y -CONFIG_VIDEO_VPSS_SYSTEM=m -# CONFIG_VIDEO_VPFE_CAPTURE is not set -CONFIG_VIDEO_OMAP2_VOUT=y -CONFIG_VIDEO_OMAP3=y -CONFIG_VIDEO_OMAP3_ISP=y -CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER=y -CONFIG_VIDEO_OMAP34XX_ISP_RESIZER=y -# CONFIG_SOC_CAMERA is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -# CONFIG_USB_GL860 is not set -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -# CONFIG_USB_GSPCA_JEILINJ is not set -CONFIG_USB_GSPCA_MARS=m -# CONFIG_USB_GSPCA_MR97310A is not set -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -# CONFIG_USB_GSPCA_PAC7302 is not set -CONFIG_USB_GSPCA_PAC7311=m -# CONFIG_USB_GSPCA_SN9C20X is not set -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -CONFIG_USB_GSPCA_STK014=m -# CONFIG_USB_GSPCA_STV0680 is not set -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_CX231XX is not set -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -# CONFIG_USB_ZC0301 is not set -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_USB_ZR364XX=m -# CONFIG_USB_STKWEBCAM is not set -CONFIG_USB_S2255=m -CONFIG_RADIO_ADAPTERS=y -# CONFIG_I2C_SI4713 is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SI470X is not set -# CONFIG_USB_MR800 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_TEF6862 is not set -CONFIG_DVB_MAX_ADAPTERS=8 -# CONFIG_DVB_DYNAMIC_MINORS is not set -CONFIG_DVB_CAPTURE_DRIVERS=y -# CONFIG_TTPCI_EEPROM is not set - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -# CONFIG_DVB_USB_DW2102 is not set -# CONFIG_DVB_USB_CINERGY_T2 is not set -# CONFIG_DVB_USB_ANYSEE is not set -# CONFIG_DVB_USB_DTV5100 is not set -# CONFIG_DVB_USB_AF9015 is not set -# CONFIG_DVB_USB_CE6230 is not set -# CONFIG_DVB_USB_FRIIO is not set -# CONFIG_DVB_USB_EC168 is not set -# CONFIG_SMS_SIANO_MDTV is not set - -# -# Supported FlexCopII (B2C2) Adapters -# -# CONFIG_DVB_B2C2_FLEXCOP is not set - -# -# Supported DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set -CONFIG_DVB_STV0299=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_S5H1411=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_LGS8GL5=m -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set -CONFIG_OMAP2_VRAM=y -CONFIG_OMAP2_VRFB=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_VRAM_SIZE=0 -CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y -# CONFIG_OMAP2_DSS_RFBI is not set -CONFIG_OMAP2_DSS_VENC=y -CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO=y -# CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE is not set -# CONFIG_OMAP2_DSS_SDI is not set -# CONFIG_OMAP2_DSS_DSI is not set -# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_FB_OMAP2=y -CONFIG_FB_OMAP2_DEBUG_SUPPORT=y -# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set -CONFIG_FB_OMAP2_NUM_FBS=3 - -# -# OMAP2/3 Display Device Drivers -# -CONFIG_PANEL_GENERIC=y -CONFIG_PANEL_LGPHILIPS_LB035Q02=y -CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C=y -CONFIG_PANEL_SHARP_LS037V7DW01=y -# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -# CONFIG_LCD_PLATFORM is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=m -CONFIG_BACKLIGHT_GENERIC=m - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -# CONFIG_FONT_6x11 is not set -# CONFIG_FONT_7x14 is not set -# CONFIG_FONT_PEARL_8x8 is not set -# CONFIG_FONT_ACORN_8x8 is not set -# CONFIG_FONT_MINI_4x6 is not set -# CONFIG_FONT_SUN8x16 is not set -# CONFIG_FONT_SUN12x22 is not set -# CONFIG_FONT_10x18 is not set -# CONFIG_LOGO is not set -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=y -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -CONFIG_SND_VERBOSE_PRINTK=y -CONFIG_SND_DEBUG=y -# CONFIG_SND_DEBUG_VERBOSE is not set -# CONFIG_SND_PCM_XRUN_DEBUG is not set -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=y -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_SOC=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_OVERO=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_TWL4030=y -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_KYE is not set -CONFIG_HID_GYRATION=y -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -# CONFIG_HID_NTRIG is not set -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_ZEROPLUS is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DEVICE_CLASS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SOC=y - -# -# OMAP 343x high speed USB support -# -CONFIG_USB_MUSB_HOST=y -# CONFIG_USB_MUSB_PERIPHERAL is not set -# CONFIG_USB_MUSB_OTG is not set -# CONFIG_USB_GADGET_MUSB_HDRC is not set -CONFIG_USB_MUSB_HDRC_HCD=y -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_INVENTRA_DMA=y -CONFIG_MUSB_USE_SYSTEM_DMA_RX=y -# CONFIG_USB_TI_CPPI_DMA is not set -# CONFIG_USB_TI_CPPI41_DMA is not set -CONFIG_USB_MUSB_DEBUG=y - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CP210X=m -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MOTOROLA=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -# CONFIG_USB_SERIAL_QUALCOMM is not set -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_HP4X=m -CONFIG_USB_SERIAL_SAFE=m -# CONFIG_USB_SERIAL_SAFE_PADDED is not set -# CONFIG_USB_SERIAL_SIEMENS_MPI is not set -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -# CONFIG_USB_SERIAL_SYMBOL is not set -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -# CONFIG_USB_BERRY_CHARGE is not set -CONFIG_USB_LED=m -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=500 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -CONFIG_USB_GADGET_OMAP=y -CONFIG_USB_OMAP=y -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_R8A66597 is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C_HSOTG is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_LANGWELL is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -# CONFIG_USB_GADGET_DUALSPEED is not set -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -# CONFIG_USB_GADGETFS is not set -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -# CONFIG_USB_MASS_STORAGE is not set -CONFIG_USB_G_SERIAL=m -# CONFIG_USB_MIDI_GADGET is not set -CONFIG_USB_G_PRINTER=m -CONFIG_USB_CDC_COMPOSITE=m -# CONFIG_USB_G_MULTI is not set - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_ISP1301_OMAP is not set -# CONFIG_USB_ULPI is not set -CONFIG_TWL4030_USB=y -# CONFIG_NOP_USB_XCEIV is not set -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -# CONFIG_MMC_AT91 is not set -# CONFIG_MMC_ATMELMCI is not set -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_GPIO_PLATFORM=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -CONFIG_RTC_DRV_TWL4030=y -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -# CONFIG_STAGING is not set - -# -# CBUS support -# -# CONFIG_CBUS is not set - -# -# File systems -# -CONFIG_FS_JOURNAL_INFO=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -CONFIG_UBIFS_FS=y -# CONFIG_UBIFS_FS_XATTR is not set -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UBIFS_FS_DEBUG=y -CONFIG_UBIFS_FS_DEBUG_MSG_LVL=3 -# CONFIG_UBIFS_FS_DEBUG_CHKS is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -# CONFIG_CRYPTO_AUTHENC is not set -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_GHASH is not set -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ZLIB is not set -CONFIG_CRYPTO_LZO=y - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_HW=y -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/recipes-kernel/linux/linux-omap-psp-2.6.32/porches.patch b/recipes-kernel/linux/linux-omap-psp-2.6.32/porches.patch deleted file mode 100644 index d631c6f..0000000 --- a/recipes-kernel/linux/linux-omap-psp-2.6.32/porches.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 91dc9ee523ad7f2a09cabf8082396eca0ef68000 Mon Sep 17 00:00:00 2001 -From: Tasslehoff Kjappfot <tasskjapp@gmail.com> -Date: Wed, 8 Sep 2010 12:46:14 +0200 -Subject: [PATCH] OMAP: DSS2: OMAPFB: swap front and back porches for both hsync and vsync - -Framebuffer's left and right margins are relative to the active pixel -area. Front and back porches are relative to the sync area. - -Left margin was wrongly assigned to front porch (and right to back), -this patch fixes it. - -Signed-off-by: tasskjapp@gmail.com -Reviewed-by: Russ.Dill@gmail.com -Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com> ---- - drivers/video/omap2/omapfb/omapfb-main.c | 16 ++++++++-------- - 1 files changed, 8 insertions(+), 8 deletions(-) - -diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c -index 0fe87e0..4cb8355 100644 ---- a/drivers/video/omap2/omapfb/omapfb-main.c -+++ b/drivers/video/omap2/omapfb/omapfb-main.c -@@ -737,10 +737,10 @@ int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var) - var->pixclock = timings.pixel_clock != 0 ? - KHZ2PICOS(timings.pixel_clock) : - 0; -- var->left_margin = timings.hfp; -- var->right_margin = timings.hbp; -- var->upper_margin = timings.vfp; -- var->lower_margin = timings.vbp; -+ var->left_margin = timings.hbp; -+ var->right_margin = timings.hfp; -+ var->upper_margin = timings.vbp; -+ var->lower_margin = timings.vfp; - var->hsync_len = timings.hsw; - var->vsync_len = timings.vsw; - } else { -@@ -2019,10 +2019,10 @@ static int omapfb_mode_to_timings(const char *mode_str, - - if (r != 0) { - timings->pixel_clock = PICOS2KHZ(var.pixclock); -- timings->hfp = var.left_margin; -- timings->hbp = var.right_margin; -- timings->vfp = var.upper_margin; -- timings->vbp = var.lower_margin; -+ timings->hbp = var.left_margin; -+ timings->hfp = var.right_margin; -+ timings->vbp = var.upper_margin; -+ timings->vfp = var.lower_margin; - timings->hsw = var.hsync_len; - timings->vsw = var.vsync_len; - timings->x_res = var.xres; --- -1.6.6.1 - diff --git a/recipes-kernel/linux/linux-omap-psp_2.6.32.bb b/recipes-kernel/linux/linux-omap-psp_2.6.32.bb deleted file mode 100644 index 9f7c472..0000000 --- a/recipes-kernel/linux/linux-omap-psp_2.6.32.bb +++ /dev/null @@ -1,213 +0,0 @@ -require multi-kernel.inc - -MULTI_CONFIG_BASE_SUFFIX = "" - -DESCRIPTION = "Linux kernel for OMAP processors" - -COMPATIBLE_MACHINE = "am3517-crane|beagleboard|omap3evm|am3517-evm|dm37x-evm|am37x-evm|omap3-touchbook|overo" - -# This is on the master branch -SRCREV = "5fc29e7b2a76a64a739f857858ef0b98294aa155" - -# The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc -MACHINE_KERNEL_PR_append = "c+gitr${SRCREV}" - -SRC_URI += "git://arago-project.org/git/projects/linux-omap3.git;protocol=git;branch=master \ - file://0001-Revert-omap3-beagle-Fix-compile-time-errors.patch \ - file://0002-board-omap3touchbook-make-it-build-against-TI-linux-.patch \ - file://0003-ARM-OMAP-add-support-for-TCT-Zippy-to-Beagle-board-f.patch \ - file://0004-ARM-OMAP-Make-beagle-u-boot-partition-writable.patch \ - file://0005-board-omap3-beagle-add-DSS2-support.patch \ - file://0006-board-omap3beagle-prepare-for-DM3730-based-Beagleboa.patch \ - file://0007-ARM-OMAP-beagleboard-Add-infrastructure-to-do-fixups.patch \ - file://0008-ARM-OMAP-beagleboard-pre-export-GPIOs-to-userspace-w.patch \ - file://0009-ARM-OMAP-beagleboard-initialize-ds1307-and-eeprom-on.patch \ - file://0010-ARM-OMAP-update-beagleboard-defconfig.patch \ - file://0011-ASoC-enable-audio-capture-by-default-for-twl4030.patch \ - file://0012-MTD-NAND-omap2-proper-fix-for-subpage-read-ECC-error.patch \ - file://0013-OMAP3630-DSS2-Enable-Pre-Multiplied-Alpha-Support.patch \ - file://0014-DSS2-add-bootarg-for-selecting-svideo-or-composite-f.patch \ - file://0015-ISP-add-some-more-from-Leopard-imaging-patch.patch \ - file://0016-ARM-OMAP-Overo-Add-support-for-second-ethernet-port.patch \ - file://0017-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch \ - file://0018-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch \ - file://0019-drivers-mfd-add-twl4030-madc-driver.patch \ - file://0020-ARM-OMAP-Add-missing-twl4030-madc-header-file.patch \ - file://0021-ARM-OMAP-Add-twl4030-madc-support-to-Overo.patch \ - file://0022-ARM-OMAP-Add-twl4030-madc-support-to-Beagle.patch \ - file://0023-netdev-rt73usb-add-vendor-device-ID-for-Ceiva-Wirele.patch \ - file://0024-mmc-don-t-display-single-block-read-console-messages.patch \ - file://0025-ARM-OMAP2-mmc-twl4030-move-clock-input-selection-pri.patch \ - file://0026-board-overo-add-PM-code-and-sync-with-http-www.sakom.patch \ - file://0027-twl4030-madc-adjust-for-twl4030-twl-api-changes.patch \ - file://0028-OMAP-DSS2-Re-add-support-for-Samsung-lte430wq-f0c-pa.patch \ - file://0029-OMAP-DSS2-Add-support-for-LG-Philips-LB035Q02-panel.patch \ - file://0030-Fix-for-bus-width-which-improves-SD-card-s-peformanc.patch \ - file://0031-ARM-VFP-add-support-to-sync-the-VFP-state-of-the-cur.patch \ - file://0032-ARM-VFP-preserve-the-HW-context-when-calling-signal-.patch \ - file://0033-Switch-SGX-clocks-to-200MHz-on-DM37xx-OMAP36xx.patch \ - file://0034-modedb.c-add-proper-720p60-mode.patch \ - file://0035-RTC-add-support-for-backup-battery-recharge.patch \ - file://0036-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch \ - file://0037-ARM-Print-warning-on-alignment-trap-in-kernel-mode.patch \ - file://0038-ARM-Expose-some-CPU-control-registers-via-sysfs.patch \ - file://0039-ARM-Add-option-to-allow-userspace-PLE-access.patch \ - file://0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch \ - file://0041-ARM-Expose-some-PMON-registers-through-sysfs.patch \ - file://0042-musb-allow-host-io-without-gadget-module.patch \ - file://0043-MTD-silence-ecc-errors-on-mtdblock0.patch \ - file://0044-ARM-OMAP-beagle-every-known-beagle-except-revB-uses-.patch \ - file://0045-ARM-OMAP-beagle-add-support-for-beagleFPGA-expansion.patch \ - file://cam/0001-mt9t111-first-stab-at-merging-sensor-driver-based-on.patch \ - file://cam/0002-mt9t111-Fix-all-checkpatch-errors.patch \ - file://cam/0003-mt9t111-Pass-v4l2_int_device-data.patch \ - file://cam/0004-omap3beagle-Add-camera-support.patch \ - file://cam/0005-TEMP-omap3beagle-camera-Add-defconfig.patch \ - file://cam/0006-omap3beagle-camera-Add-support-for-regulators.patch \ - file://cam/0007-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch \ - file://cam/0008-omap3beagle-camera-Fix-null-pointer-dereference.patch \ - file://cam/0009-Revert-TEMP-omap3beagle-cam-Enable-OMAP_MUX.patch \ - file://cam/0010-omap3beagle-camera-Change-arch-late_initcall.patch \ - file://cam/0011-omap3beagle-camera-Move-i2c-registration-to-the-main.patch \ - file://cam/0012-ARM-OMAP3-make-camera-code-build-if-MT9T111-is-built.patch \ - file://cam/0013-DEBUG-omap3beagle-camera-Force-mode0-in-cam_xclka.patch \ - file://cam/0014-OMAP3-CLOCK-Add-capability-to-change-rate-of-dpll4_m.patch \ - file://cam/0015-Revert-DEBUG-omap3beagle-camera-Force-mode0-in-cam_x.patch \ - file://cam/0016-omap3beagle-camera-Fix-wrong-XCLKA-selection.patch \ - file://cam/0017-omap3isp-set-CAM_MCLK-to-172.8-MHz-allows-exact-9.6-.patch \ - file://cam/0018-Fix-Moved-MCLK-setting-to-the-board-file.patch \ - file://cam/0019-omap3isp-core-Do-smarter-MCLK-setting.patch \ - file://cam/0020-omap3beagle-camera-set-mclk-for-mt9t111.patch \ - file://cam/0021-mt9t111-Fix-max-supported-xclk.patch \ - file://cam/0022-omap3beagle-camera-Clarify-regulators-names.patch \ - file://cam/0023-omap3beagle-camera-Fix-powerup-sequence.patch \ - file://cam/0024-omap3beagle-camera-Change-vaux4-to-1.8v.patch \ - file://cam/0025-omap3beagle-camera-Rename-regulators-to-match-actual.patch \ - file://cam/0026-omap3beagle-camera-Complement-remainig-sensor-hw-con.patch \ - file://cam/0027-mt9t111-Fix-detect-function-retval-and-cleanup-print.patch \ - file://cam/0028-omap3beagle-camera-Set-padconf-settings-in-cam-init.patch \ - file://cam/0029-omap3beagle-camera-only-register-camera-driver-for-3.patch \ - file://cam/0030-WIP-mt9t111-Work-in-progress-for-camera-enablement.patch \ - file://cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch \ - file://cam/0032-MT9V113-Fixed-sensor-nitialization-issues.patch \ - file://cam/0033-mt9v113-Fix-wrong-active-widths.patch \ - file://cam/0034-omap3isp-Fix-Wrong-check-on-non-interlaced-sensor-on.patch \ - file://cam/0035-omap3isp-Fix-bad-YUV_BT-checks-in-datapath_config.patch \ - file://cam/0036-omap3isp-Set-vd_pol-to-0-by-default-on-all-cases.patch \ - file://cam/0037-omap3isp-ccdc-Set-datalines-to-10-for-YUV_SYNC.patch \ - file://cam/0038-omap3beagle-camera-Fix-parallel-i-f-settings.patch \ - file://cam/0039-omap3beagle-camera-Clean-up-Remove-unneccessary-code.patch \ - file://cam/0040-mt9v113-Clean-Up-Remove-unneccessary-code-printf.patch \ - file://cam/0041-MT9V113-Min-Max-clk-input-changed-as-per-the-spec.patch \ - file://cam/0042-omap3beagle-camera-Further-clode-cleanup.patch \ - file://cam/0043-mt9v113-Settings-from-Aptima-used-to-increase-FPS.patch \ - file://cam/0044-mt9v113-AE-param-tuned-to-get-28-30FPS.patch \ - file://cam/0045-omap3beagle-camera-Cleanup-of-boardfile.patch \ - file://cam/0046-omap3beagle-camera-Cleanup-regulator-usage.patch \ - file://cam/0047-omap3beagle-camera-Bring-back-mt9t111-support.patch \ - file://cam/0048-REMOVE-v4l2-Delete-MT9T111-sensor-driver.patch \ - file://cam/0049-V4L-DVB-13670-soc-camera-Add-mt9t112-camera-driver.patch \ - file://cam/0050-soc-camera-mt9t112-modify-exiting-conditions-from-st.patch \ - file://cam/0051-mt9t112-Migrate-from-soc_camera-to-v4l2-int-device.patch \ - file://cam/0052-mt9t112-Add-more-info-to-public-header.patch \ - file://cam/0053-mt9t112-Fix-null-pointer-kernel-bug.patch \ - file://cam/0054-DEBUG-omap3beagle-Add-MT9T112-to-defconfig.patch \ - file://cam/0055-omap3beagle-camera-Change-MT9T111-references-to-new-.patch \ - file://cam/0056-omap34xxcam-Fix-multi-pixel-format-negotiation.patch \ - file://cam/0057-SQUASH-omap3beagle-camera-Bring-back-mt9t111-support.patch \ - file://cam/0058-mt9t112-Do-init_camera-every-powerup.patch \ - file://cam/0059-omap3beagle-camera-Switch-flag-for-no-sensor-ISP.patch \ - file://cam/0060-mt9t112-Add-back-3MP-basesize.patch \ - file://cam/0061-mt9t112-Prepare-for-24MHz-EXTCLK-and-30-fps.patch \ - file://cam/0062-omap3beagle-camera-Prepare-24MHz-xclk-for-mt9t112.patch \ - file://cam/0063-mt9t112-Correct-register-settings-for-mt9t111-sensor.patch \ - file://cam/0064-mt9t112-Remove-smart-size-selection.patch \ - file://cam/0065-rtl8192su-remove-bogus-Kconfig-depend-on-PCI-and-add.patch \ - file://cam/0066-mt9t112-Add-Context-selection-to-configuration.patch \ - file://cam/0067-mt9t112-Disable-JPEG-in-Context-B.patch \ - file://cam/0068-mt9t112-Make-context-B-stream-unlimited-frames.patch \ - file://cam/0069-mt9t112-Fix-pll-p-dividers-abstraction.patch \ - file://cam/0070-mt9t112-Adjust-50-60Hz-flickering-settings.patch \ - file://cam/0071-mt9t112-Trigger-autofocus-at-the-end-of-context-swit.patch \ - file://cam/0072-omap3beagle-camera-Fix-dual-sensor-registration.patch \ - file://cam/0073-mt9v113-Fix-State-variable-handling.patch \ - file://cam/0074-Move-sensor-rest-to-after-applying-power.patch \ - file://cam/0075-omap3beagle-Add-camera-bootarg.patch \ - file://cam/5m03/0001-mt9p031-import-driver-from-https-github.com-Aptina-B.patch \ - file://0001-BeagleBoard-Adjust-USER-button-pin-for-xM.patch \ - file://0001-PSP-3.0.1.6-kernel-source-patched-with-OCF-Linux.patch \ - file://porches.patch \ - file://0001-cgroupfs-create-sys-fs-cgroup-to-mount-cgroupfs-on.patch \ - file://defconfig" - -SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ - file://beagleboard-xmc/0001-omap-Beagle-revision-detection.patch \ - file://beagleboard-xmc/0002-omap-Beagle-only-Cx-boards-use-pin-23-for-write-prot.patch \ - file://beagleboard-xmc/0003-omap-Beagle-no-gpio_wp-pin-connection-on-xM.patch \ - file://beagleboard-xmc/0004-omap3-beaglexm-fix-EHCI-power-up-GPIO-dir.patch \ - file://beagleboard-xmc/0005-omap3-beaglexm-fix-DVI-reset-GPIO.patch \ - file://beagleboard-xmc/0006-omap3-beaglexm-fix-power-on-of-DVI.patch \ - file://beagleboard-xmc/0007-beagleboard-hack-in-support-from-xM-rev-C.patch \ - file://beagleboard-xmc/0008-omap3-beagle-cleaned-up-board-revision-conditions.patch \ - file://cam/5m03/0002-board-omap3beagle-import-li5m03-driver-from-https-gi.patch \ -" - -SRC_URI_append_omap3-touchbook = " \ - file://0001-ARM-OMAP-add-spi-platform-devices.patch \ - file://0002-MMA7455L-accelerometer-driver.patch \ - file://0003-bq27x00_battery-remove-error-message-output.patch \ - file://0004-bq27x00_battery-add-charged-gpio.patch \ - file://0005-adf7846-add-more-debugging.patch \ - file://0006-ads7846-read-max-mix-x-y-from-pdata.patch \ - file://0007-ads7846-add-settling-delay-to-pdata.patch \ - file://0008-DSS2-OMAPFB-Translate-X-Y-coordinates-for-the-video-.patch \ - file://0009-DSS2-Fix-scaling-checks-when-rotation-is-90-or-270-d.patch \ - file://0010-add-touchbook-hid-driver.patch \ - file://0011-Make-backlight-controls-accessible-to-users.patch \ - file://0012-ads7846-don-t-error-out-when-there-s-no-pendown-gpio.patch \ - file://0013-ASoC-add-driver-for-omap3-touchbook.patch \ - file://0014-backlight-add-PWM-support.patch \ - file://0015-Forward-port-TWL4030-BCI-driver-from-2.6.29-to-2.6.3.patch \ - file://0016-ARM-OMAP-omap3-touchbook-update-boardfile.patch \ -" - -SRC_URI_append_am3517-crane = " \ - file://0001-Added-Crane-Board-support.patch \ - file://0001-OMAP3-craneboard-print-expansionboard-name-detected-.patch \ - file://0002-OMAP3-craneboard-add-support-for-TinCanTools-Trainer.patch \ -" - -addtask quiltfixup before do_patch after do_unpack -do_quiltfixup() { - rm ${S}/.pc -rf -} - -S = "${WORKDIR}/git" - -# Perf in 2.6.32 has broken perl handling, so disable it -do_compile_perf() { - : -} - -do_install_perf() { - : -} - -do_install_prepend() { - mkdir headerstash -p - cp include/linux/bounds.h headerstash/ - cp include/asm-arm/asm-offsets.h headerstash/ -} - -do_install_append() { - cp headerstash/bounds.h $kerneldir/include/linux/ - cp headerstash/asm-offsets.h $kerneldir/include/asm-arm/asm-offsets.h - rm -rf headerstash/ - - install -d ${D}/boot - install -m 0644 Documentation/arm/OMAP/DSS ${D}/boot/ -} - -PACKAGES =+ "omap-dss-doc" -FILES_omap-dss-doc = "/boot/DSS" - -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 6/8] linux-keystone: update from 3.6.6 to 3.8.4 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko ` (4 preceding siblings ...) 2013-09-28 22:54 ` [PATCH 5/8] linux-omap-psp-2.6.32: remove old linux-omap3 PSP kernel Denys Dmytriyenko @ 2013-09-28 22:54 ` Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 7/8] linux-ti-staging: update to 3.12-rc2 with rpmsg, connectivity, audio and display merged Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 8/8] linux: set PR from MACHINE_KERNEL_PR, bypass machine_kernel_pr.bbclass from meta-oe Denys Dmytriyenko 7 siblings, 0 replies; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-28 22:54 UTC (permalink / raw) To: meta-ti From: Denys Dmytriyenko <denys@ti.com> Signed-off-by: Denys Dmytriyenko <denys@ti.com> --- .../linux/linux-keystone-3.6.6/defconfig | 188 --------------------- .../linux/linux-keystone-3.8.4/defconfig | 1 + recipes-kernel/linux/linux-keystone_3.6.6.bb | 16 -- recipes-kernel/linux/linux-keystone_3.8.4.bb | 27 +++ 4 files changed, 28 insertions(+), 204 deletions(-) delete mode 100644 recipes-kernel/linux/linux-keystone-3.6.6/defconfig create mode 100644 recipes-kernel/linux/linux-keystone-3.8.4/defconfig delete mode 100644 recipes-kernel/linux/linux-keystone_3.6.6.bb create mode 100644 recipes-kernel/linux/linux-keystone_3.8.4.bb diff --git a/recipes-kernel/linux/linux-keystone-3.6.6/defconfig b/recipes-kernel/linux/linux-keystone-3.6.6/defconfig deleted file mode 100644 index d326a41..0000000 --- a/recipes-kernel/linux/linux-keystone-3.6.6/defconfig +++ /dev/null @@ -1,188 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_SWAP is not set -CONFIG_POSIX_MQUEUE=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS_ALL=y -# CONFIG_ELF_CORE is not set -# CONFIG_BASE_FULL is not set -CONFIG_EMBEDDED=y -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_KPROBES=y -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_ARCH_KEYSTONE=y -CONFIG_SMP=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_PREEMPT__LL=y -CONFIG_AEABI=y -CONFIG_HIGHMEM=y -CONFIG_VFP=y -CONFIG_NEON=y -# CONFIG_SUSPEND is not set -CONFIG_PM_RUNTIME=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_UNIX_DIAG=y -CONFIG_XFRM_USER=y -CONFIG_XFRM_SUB_POLICY=y -CONFIG_XFRM_STATISTICS=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_NET_IPIP=y -CONFIG_NET_IPGRE_DEMUX=y -CONFIG_NET_IPGRE=y -CONFIG_IP_MROUTE=y -CONFIG_IP_MROUTE_MULTIPLE_TABLES=y -CONFIG_IP_PIMSM_V2=y -CONFIG_INET_AH=y -CONFIG_INET_IPCOMP=y -CONFIG_IPV6=y -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_IPV6_SIT=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -CONFIG_IPV6_PIMSM_V2=y -CONFIG_NETFILTER=y -CONFIG_NF_CONNTRACK=y -CONFIG_NF_CT_NETLINK=y -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y -CONFIG_NETFILTER_XT_TARGET_CONNMARK=y -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y -CONFIG_NETFILTER_XT_TARGET_MARK=y -CONFIG_NETFILTER_XT_MATCH_COMMENT=y -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y -CONFIG_NETFILTER_XT_MATCH_CONNMARK=y -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y -CONFIG_NETFILTER_XT_MATCH_CPU=y -CONFIG_NETFILTER_XT_MATCH_IPRANGE=y -CONFIG_NETFILTER_XT_MATCH_LENGTH=y -CONFIG_NETFILTER_XT_MATCH_MAC=y -CONFIG_NETFILTER_XT_MATCH_MARK=y -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y -CONFIG_NETFILTER_XT_MATCH_STATE=y -CONFIG_NF_CONNTRACK_IPV4=y -CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MATCH_AH=y -CONFIG_IP_NF_MATCH_ECN=y -CONFIG_IP_NF_MATCH_TTL=y -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -CONFIG_IP_NF_TARGET_ULOG=y -CONFIG_NF_NAT=y -CONFIG_IP_NF_TARGET_MASQUERADE=y -CONFIG_IP_NF_TARGET_NETMAP=y -CONFIG_IP_NF_TARGET_REDIRECT=y -CONFIG_IP_NF_MANGLE=y -CONFIG_IP_NF_TARGET_CLUSTERIP=y -CONFIG_IP_NF_TARGET_ECN=y -CONFIG_IP_NF_TARGET_TTL=y -CONFIG_IP_NF_RAW=y -CONFIG_IP_NF_ARPTABLES=y -CONFIG_IP_NF_ARPFILTER=y -CONFIG_IP_NF_ARP_MANGLE=y -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP_SCTP=y -CONFIG_VLAN_8021Q=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_CMA=y -CONFIG_MTD=y -CONFIG_MTD_TESTS=m -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_PLATRAM=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_DAVINCI=y -CONFIG_MTD_UBI=y -CONFIG_PROC_DEVICETREE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_EEPROM_AT24=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_NETDEVICES=y -CONFIG_TI_DAVINCI_MDIO=y -CONFIG_MARVELL_PHY=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -# CONFIG_I2C_COMPAT is not set -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_DAVINCI=y -CONFIG_SPI=y -CONFIG_SPI_DAVINCI=y -CONFIG_SPI_SPIDEV=y -CONFIG_GPIO_SYSFS=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_DAVINCI_WATCHDOG=y -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DWC3=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_DMADEVICES=y -CONFIG_UIO=y -CONFIG_UIO_PDRV=y -CONFIG_COMMON_CLK_DEBUG=y -CONFIG_REMOTEPROC_USER=y -CONFIG_MEMORY=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_NTFS_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_WBUF_VERIFY=y -CONFIG_UBIFS_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_SHIRQ=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_USER=y -CONFIG_CRYPTO_USER=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_XCBC=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_ANSI_CPRNG=y -CONFIG_CRYPTO_USER_API_HASH=y -CONFIG_CRYPTO_USER_API_SKCIPHER=y diff --git a/recipes-kernel/linux/linux-keystone-3.8.4/defconfig b/recipes-kernel/linux/linux-keystone-3.8.4/defconfig new file mode 100644 index 0000000..04e6b17 --- /dev/null +++ b/recipes-kernel/linux/linux-keystone-3.8.4/defconfig @@ -0,0 +1 @@ +use-kernel-config=keystone2_defconfig diff --git a/recipes-kernel/linux/linux-keystone_3.6.6.bb b/recipes-kernel/linux/linux-keystone_3.6.6.bb deleted file mode 100644 index 4dd5d15..0000000 --- a/recipes-kernel/linux/linux-keystone_3.6.6.bb +++ /dev/null @@ -1,16 +0,0 @@ -COMPATIBLE_MACHINE = "keystone" - -require linux.inc - -MACHINE_KERNEL_PR_append = "a" - -CORTEXA8FIXUP = "no" - -# The tree tends to rebase, use literal stable tags -SRCREV = "DEV.MCSDK-03.06.06.07" - -SRC_URI = "git://arago-project.org/git/projects/linux-keystone.git;protocol=git \ - file://defconfig \ - " - -S = "${WORKDIR}/git" diff --git a/recipes-kernel/linux/linux-keystone_3.8.4.bb b/recipes-kernel/linux/linux-keystone_3.8.4.bb new file mode 100644 index 0000000..989fde9 --- /dev/null +++ b/recipes-kernel/linux/linux-keystone_3.8.4.bb @@ -0,0 +1,27 @@ +SECTION = "kernel" +DESCRIPTION = "Linux kernel for TI Keystone devices" +LICENSE = "GPLv2" +LIC_FILES_CHKSUM = "file://COPYING;md5=d7810fab7487fb0aad327b76f1be7cd7" + +inherit kernel + +require recipes-kernel/linux/linux-dtb.inc +require recipes-kernel/linux/setup-defconfig.inc + +KERNEL_DEVICETREE_keystone-evm = "k2hk-evm.dtb" + +COMPATIBLE_MACHINE = "keystone" + +S = "${WORKDIR}/git" + +BRANCH = "sept-2013/master" + +# This commit corresponds to K2_LINUX_03.08.04_13.09 tag +SRCREV = "20a48dc5309c4434650baef2b6072b5f1016f946" + +# Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild +MACHINE_KERNEL_PR_append = "a+gitr${SRCPV}" + +SRC_URI = "git://arago-project.org/git/projects/linux-keystone.git;protocol=git;branch=${BRANCH}\ + file://defconfig\ + " -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 7/8] linux-ti-staging: update to 3.12-rc2 with rpmsg, connectivity, audio and display merged 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko ` (5 preceding siblings ...) 2013-09-28 22:54 ` [PATCH 6/8] linux-keystone: update from 3.6.6 to 3.8.4 Denys Dmytriyenko @ 2013-09-28 22:54 ` Denys Dmytriyenko 2013-09-30 3:38 ` Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 8/8] linux: set PR from MACHINE_KERNEL_PR, bypass machine_kernel_pr.bbclass from meta-oe Denys Dmytriyenko 7 siblings, 1 reply; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-28 22:54 UTC (permalink / raw) To: meta-ti From: Denys Dmytriyenko <denys@ti.com> Signed-off-by: Denys Dmytriyenko <denys@ti.com> --- recipes-kernel/linux/linux-ti-staging_git.bb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/recipes-kernel/linux/linux-ti-staging_git.bb b/recipes-kernel/linux/linux-ti-staging_git.bb index 778ea7f..b28667e 100644 --- a/recipes-kernel/linux/linux-ti-staging_git.bb +++ b/recipes-kernel/linux/linux-ti-staging_git.bb @@ -28,8 +28,8 @@ S = "${WORKDIR}/git" BRANCH = "ti-linux-3.12.y" -SRCREV = "351da8b4c2ff277b2d816a2108ada357a63fadbe" -PV = "3.11+3.12-rc1" +SRCREV = "28e479fa1267cc065b8a2d1a421f2bc1daefabfb" +PV = "3.11+3.12-rc2" # Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild MACHINE_KERNEL_PR_append = "a+gitr${SRCPV}" -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 7/8] linux-ti-staging: update to 3.12-rc2 with rpmsg, connectivity, audio and display merged 2013-09-28 22:54 ` [PATCH 7/8] linux-ti-staging: update to 3.12-rc2 with rpmsg, connectivity, audio and display merged Denys Dmytriyenko @ 2013-09-30 3:38 ` Denys Dmytriyenko 0 siblings, 0 replies; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-30 3:38 UTC (permalink / raw) To: Denys Dmytriyenko; +Cc: meta-ti On Sat, Sep 28, 2013 at 06:54:04PM -0400, Denys Dmytriyenko wrote: > From: Denys Dmytriyenko <denys@ti.com> > > Signed-off-by: Denys Dmytriyenko <denys@ti.com> > --- > recipes-kernel/linux/linux-ti-staging_git.bb | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/recipes-kernel/linux/linux-ti-staging_git.bb b/recipes-kernel/linux/linux-ti-staging_git.bb > index 778ea7f..b28667e 100644 > --- a/recipes-kernel/linux/linux-ti-staging_git.bb > +++ b/recipes-kernel/linux/linux-ti-staging_git.bb > @@ -28,8 +28,8 @@ S = "${WORKDIR}/git" > > BRANCH = "ti-linux-3.12.y" > > -SRCREV = "351da8b4c2ff277b2d816a2108ada357a63fadbe" > -PV = "3.11+3.12-rc1" > +SRCREV = "28e479fa1267cc065b8a2d1a421f2bc1daefabfb" > +PV = "3.11+3.12-rc2" Ok, 3.12-rc3 got merged - I'll update the patch tomorrow: SRCREV = "ad0611b8881792d2ea945444601b647bba8767e1" PV = "3.11+3.12-rc3" > # Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild > MACHINE_KERNEL_PR_append = "a+gitr${SRCPV}" > -- > 1.8.3.2 > ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 8/8] linux: set PR from MACHINE_KERNEL_PR, bypass machine_kernel_pr.bbclass from meta-oe 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko ` (6 preceding siblings ...) 2013-09-28 22:54 ` [PATCH 7/8] linux-ti-staging: update to 3.12-rc2 with rpmsg, connectivity, audio and display merged Denys Dmytriyenko @ 2013-09-28 22:54 ` Denys Dmytriyenko 7 siblings, 0 replies; 13+ messages in thread From: Denys Dmytriyenko @ 2013-09-28 22:54 UTC (permalink / raw) To: meta-ti From: Denys Dmytriyenko <denys@ti.com> Essentially, machine_kernel_pr.bbclass does this one line assignment, but introduces a new unnecessary dependency on meta-openembedded/meta-oe layer. Signed-off-by: Denys Dmytriyenko <denys@ti.com> --- recipes-kernel/linux/linux-am335x-psp_3.2.bb | 1 + recipes-kernel/linux/linux-keystone_3.8.4.bb | 1 + recipes-kernel/linux/linux-mainline_3.2.bb | 1 + recipes-kernel/linux/linux-omap-psp_2.6.37.bb | 1 + recipes-kernel/linux/linux-omap4_3.4.bb | 1 + recipes-kernel/linux/linux-omap_2.6.37.bb | 3 +++ recipes-kernel/linux/linux-omapl138-psp_2.6.37.bb | 1 + recipes-kernel/linux/linux-ti-glsdk_3.8.bb | 1 + recipes-kernel/linux/linux-ti-staging_3.8.bb | 1 + recipes-kernel/linux/linux-ti-staging_git.bb | 1 + recipes-kernel/linux/linux-ti33x-psp_3.2.bb | 2 ++ recipes-kernel/linux/linux_3.3.7.bb | 1 + 12 files changed, 15 insertions(+) diff --git a/recipes-kernel/linux/linux-am335x-psp_3.2.bb b/recipes-kernel/linux/linux-am335x-psp_3.2.bb index eaf788f..9d08a86 100644 --- a/recipes-kernel/linux/linux-am335x-psp_3.2.bb +++ b/recipes-kernel/linux/linux-am335x-psp_3.2.bb @@ -16,6 +16,7 @@ KERNEL_IMAGETYPE = "uImage" # The main PR is now using MACHINE_KERNEL_PR, for ti33x see conf/machine/include/ti33x.inc MACHINE_KERNEL_PR_append = "h+gitr${SRCPV}" +PR = "${MACHINE_KERNEL_PR}" BRANCH = "v3.2-staging" diff --git a/recipes-kernel/linux/linux-keystone_3.8.4.bb b/recipes-kernel/linux/linux-keystone_3.8.4.bb index 989fde9..d176f14 100644 --- a/recipes-kernel/linux/linux-keystone_3.8.4.bb +++ b/recipes-kernel/linux/linux-keystone_3.8.4.bb @@ -21,6 +21,7 @@ SRCREV = "20a48dc5309c4434650baef2b6072b5f1016f946" # Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild MACHINE_KERNEL_PR_append = "a+gitr${SRCPV}" +PR = "${MACHINE_KERNEL_PR}" SRC_URI = "git://arago-project.org/git/projects/linux-keystone.git;protocol=git;branch=${BRANCH}\ file://defconfig\ diff --git a/recipes-kernel/linux/linux-mainline_3.2.bb b/recipes-kernel/linux/linux-mainline_3.2.bb index 7b4a2a2..7398d9a 100644 --- a/recipes-kernel/linux/linux-mainline_3.2.bb +++ b/recipes-kernel/linux/linux-mainline_3.2.bb @@ -10,6 +10,7 @@ SRCREV_pn-${PN} = "1f873aca1c7aa7a574b276c040d304d16f1dbfa4" # The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc MACHINE_KERNEL_PR_append = "b" +PR = "${MACHINE_KERNEL_PR}" FILESPATH =. "${FILE_DIRNAME}/linux-mainline-3.2:${FILE_DIRNAME}/linux-mainline-3.2/${MACHINE}:" diff --git a/recipes-kernel/linux/linux-omap-psp_2.6.37.bb b/recipes-kernel/linux/linux-omap-psp_2.6.37.bb index d1a6478..8333cc8 100644 --- a/recipes-kernel/linux/linux-omap-psp_2.6.37.bb +++ b/recipes-kernel/linux/linux-omap-psp_2.6.37.bb @@ -11,6 +11,7 @@ SRCREV= "adcd067326836777c049e3cb32a5b7d9d401fc31" # The main PR is now using MACHINE_KERNEL_PR, for omap3 devices # see conf/machine/include/omap3.inc MACHINE_KERNEL_PR_append = "b" +PR = "${MACHINE_KERNEL_PR}" SRC_URI = "git://arago-project.org/git/projects/linux-omap3.git;protocol=git \ file://defconfig" diff --git a/recipes-kernel/linux/linux-omap4_3.4.bb b/recipes-kernel/linux/linux-omap4_3.4.bb index 1928060..449e4eb 100644 --- a/recipes-kernel/linux/linux-omap4_3.4.bb +++ b/recipes-kernel/linux/linux-omap4_3.4.bb @@ -4,6 +4,7 @@ require linux.inc # The main PR is now using MACHINE_KERNEL_PR, for omap4 see conf/machine/include/omap4.inc MACHINE_KERNEL_PR_append = "a" +PR = "${MACHINE_KERNEL_PR}" CORTEXA8FIXUP = "no" diff --git a/recipes-kernel/linux/linux-omap_2.6.37.bb b/recipes-kernel/linux/linux-omap_2.6.37.bb index 0a14cc8..1bbdde1 100644 --- a/recipes-kernel/linux/linux-omap_2.6.37.bb +++ b/recipes-kernel/linux/linux-omap_2.6.37.bb @@ -6,7 +6,10 @@ COMPATIBLE_MACHINE = "(beagleboard|overo|omap3evm|omap3-touchbook)" # The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc PV = "2.6.37" + MACHINE_KERNEL_PR_append = "c+gitr${SRCREV}" +PR = "${MACHINE_KERNEL_PR}" + SRCREV = "fa3b4e23ec20cfc944db7cc2b30b0d82c20e4472" FILESEXTRAPATHS_prepend := "{THISDIR}/${PN}-${PV}:" diff --git a/recipes-kernel/linux/linux-omapl138-psp_2.6.37.bb b/recipes-kernel/linux/linux-omapl138-psp_2.6.37.bb index a138fb6..199499a 100644 --- a/recipes-kernel/linux/linux-omapl138-psp_2.6.37.bb +++ b/recipes-kernel/linux/linux-omapl138-psp_2.6.37.bb @@ -7,6 +7,7 @@ require tipspkernel.inc require setup-defconfig.inc MACHINE_KERNEL_PR_append = "c" +PR = "${MACHINE_KERNEL_PR}" S = "${WORKDIR}/git" diff --git a/recipes-kernel/linux/linux-ti-glsdk_3.8.bb b/recipes-kernel/linux/linux-ti-glsdk_3.8.bb index 5fd17f8..291e852 100644 --- a/recipes-kernel/linux/linux-ti-glsdk_3.8.bb +++ b/recipes-kernel/linux/linux-ti-glsdk_3.8.bb @@ -25,6 +25,7 @@ PV = "3.8.13" # Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild MACHINE_KERNEL_PR_append = "c+gitr${SRCPV}" +PR = "${MACHINE_KERNEL_PR}" SRC_URI = "git://git.ti.com/ti-linux-kernel/ti-linux-3-8-y-kernel.git;protocol=git;branch=${BRANCH} \ file://defconfig \ diff --git a/recipes-kernel/linux/linux-ti-staging_3.8.bb b/recipes-kernel/linux/linux-ti-staging_3.8.bb index 833fb48..80b94f6 100644 --- a/recipes-kernel/linux/linux-ti-staging_3.8.bb +++ b/recipes-kernel/linux/linux-ti-staging_3.8.bb @@ -32,6 +32,7 @@ PV = "3.8.13" # Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild MACHINE_KERNEL_PR_append = "g+gitr${SRCPV}" +PR = "${MACHINE_KERNEL_PR}" SRC_URI = "git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git;protocol=git;branch=${BRANCH} \ file://defconfig \ diff --git a/recipes-kernel/linux/linux-ti-staging_git.bb b/recipes-kernel/linux/linux-ti-staging_git.bb index b28667e..5b0c260 100644 --- a/recipes-kernel/linux/linux-ti-staging_git.bb +++ b/recipes-kernel/linux/linux-ti-staging_git.bb @@ -33,6 +33,7 @@ PV = "3.11+3.12-rc2" # Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild MACHINE_KERNEL_PR_append = "a+gitr${SRCPV}" +PR = "${MACHINE_KERNEL_PR}" SRC_URI = "git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git;protocol=git;branch=${BRANCH} \ file://defconfig \ diff --git a/recipes-kernel/linux/linux-ti33x-psp_3.2.bb b/recipes-kernel/linux/linux-ti33x-psp_3.2.bb index 4200d03..1602e3f 100644 --- a/recipes-kernel/linux/linux-ti33x-psp_3.2.bb +++ b/recipes-kernel/linux/linux-ti33x-psp_3.2.bb @@ -15,7 +15,9 @@ PV = "${@base_contains('DISTRO_FEATURES', 'tipspkernel', "3.2", "3.2.28", d)}" BRANCH = "v3.2-staging" SRCREV = "720e07b4c1f687b61b147b31c698cb6816d72f01" + MACHINE_KERNEL_PR_append = "b+gitr${SRCREV}" +PR = "${MACHINE_KERNEL_PR}" COMPATIBLE_MACHINE = "(ti33x)" diff --git a/recipes-kernel/linux/linux_3.3.7.bb b/recipes-kernel/linux/linux_3.3.7.bb index aca5c53..f6d2172 100644 --- a/recipes-kernel/linux/linux_3.3.7.bb +++ b/recipes-kernel/linux/linux_3.3.7.bb @@ -14,6 +14,7 @@ require setup-defconfig.inc # The main PR is now using MACHINE_KERNEL_PR, for beagleboard see # conf/machine/include/omap3.inc MACHINE_KERNEL_PR_append = "b+gitr${SRCREV}" +PR = "${MACHINE_KERNEL_PR}" BRANCH = "linux-3.3.y" SRCREV = "v3.3.7" -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2013-09-30 14:34 UTC | newest] Thread overview: 13+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-09-28 22:53 [PATCH 0/8] linux: various cleanups and updates to kernel recipes Denys Dmytriyenko 2013-09-28 22:53 ` [PATCH 1/8] linux-omap-2.6.39: remove old beagleboard-specific and not supported kernel Denys Dmytriyenko 2013-09-30 14:31 ` Cooper Jr., Franklin 2013-09-28 22:53 ` [PATCH 2/8] linux-3.0: remove old beagleboard-specific 3.0 and 3.1rc kernel recipes Denys Dmytriyenko 2013-09-30 14:32 ` Cooper Jr., Franklin 2013-09-28 22:54 ` [PATCH 3/8] linux-omap4-3.1.0: remove old pandaboard-specific kernel Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 4/8] linux-davinci 2.6.32: remove old hawkboard-specific kernel Denys Dmytriyenko 2013-09-30 14:33 ` Cooper Jr., Franklin 2013-09-28 22:54 ` [PATCH 5/8] linux-omap-psp-2.6.32: remove old linux-omap3 PSP kernel Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 6/8] linux-keystone: update from 3.6.6 to 3.8.4 Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 7/8] linux-ti-staging: update to 3.12-rc2 with rpmsg, connectivity, audio and display merged Denys Dmytriyenko 2013-09-30 3:38 ` Denys Dmytriyenko 2013-09-28 22:54 ` [PATCH 8/8] linux: set PR from MACHINE_KERNEL_PR, bypass machine_kernel_pr.bbclass from meta-oe Denys Dmytriyenko
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